2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
30 #include "assigned-dev.h"
32 #include <linux/clocksource.h>
33 #include <linux/interrupt.h>
34 #include <linux/kvm.h>
36 #include <linux/vmalloc.h>
37 #include <linux/module.h>
38 #include <linux/mman.h>
39 #include <linux/highmem.h>
40 #include <linux/iommu.h>
41 #include <linux/intel-iommu.h>
42 #include <linux/cpufreq.h>
43 #include <linux/user-return-notifier.h>
44 #include <linux/srcu.h>
45 #include <linux/slab.h>
46 #include <linux/perf_event.h>
47 #include <linux/uaccess.h>
48 #include <linux/hash.h>
49 #include <linux/pci.h>
50 #include <linux/timekeeper_internal.h>
51 #include <linux/pvclock_gtod.h>
52 #include <trace/events/kvm.h>
54 #define CREATE_TRACE_POINTS
57 #include <asm/debugreg.h>
63 #include <asm/fpu-internal.h> /* Ugh! */
65 #include <asm/pvclock.h>
66 #include <asm/div64.h>
68 #define MAX_IO_MSRS 256
69 #define KVM_MAX_MCE_BANKS 32
70 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
72 #define emul_to_vcpu(ctxt) \
73 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
76 * - enable syscall per default because its emulated by KVM
77 * - enable LME and LMA per default on 64 bit KVM
81 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
83 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
86 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
87 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
89 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
90 static void process_nmi(struct kvm_vcpu
*vcpu
);
91 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
93 struct kvm_x86_ops
*kvm_x86_ops
;
94 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
96 static bool ignore_msrs
= 0;
97 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
99 unsigned int min_timer_period_us
= 500;
100 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
102 bool kvm_has_tsc_control
;
103 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
104 u32 kvm_max_guest_tsc_khz
;
105 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
107 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
108 static u32 tsc_tolerance_ppm
= 250;
109 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
111 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
112 unsigned int lapic_timer_advance_ns
= 0;
113 module_param(lapic_timer_advance_ns
, uint
, S_IRUGO
| S_IWUSR
);
115 static bool backwards_tsc_observed
= false;
117 #define KVM_NR_SHARED_MSRS 16
119 struct kvm_shared_msrs_global
{
121 u32 msrs
[KVM_NR_SHARED_MSRS
];
124 struct kvm_shared_msrs
{
125 struct user_return_notifier urn
;
127 struct kvm_shared_msr_values
{
130 } values
[KVM_NR_SHARED_MSRS
];
133 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
134 static struct kvm_shared_msrs __percpu
*shared_msrs
;
136 struct kvm_stats_debugfs_item debugfs_entries
[] = {
137 { "pf_fixed", VCPU_STAT(pf_fixed
) },
138 { "pf_guest", VCPU_STAT(pf_guest
) },
139 { "tlb_flush", VCPU_STAT(tlb_flush
) },
140 { "invlpg", VCPU_STAT(invlpg
) },
141 { "exits", VCPU_STAT(exits
) },
142 { "io_exits", VCPU_STAT(io_exits
) },
143 { "mmio_exits", VCPU_STAT(mmio_exits
) },
144 { "signal_exits", VCPU_STAT(signal_exits
) },
145 { "irq_window", VCPU_STAT(irq_window_exits
) },
146 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
147 { "halt_exits", VCPU_STAT(halt_exits
) },
148 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
149 { "hypercalls", VCPU_STAT(hypercalls
) },
150 { "request_irq", VCPU_STAT(request_irq_exits
) },
151 { "irq_exits", VCPU_STAT(irq_exits
) },
152 { "host_state_reload", VCPU_STAT(host_state_reload
) },
153 { "efer_reload", VCPU_STAT(efer_reload
) },
154 { "fpu_reload", VCPU_STAT(fpu_reload
) },
155 { "insn_emulation", VCPU_STAT(insn_emulation
) },
156 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
157 { "irq_injections", VCPU_STAT(irq_injections
) },
158 { "nmi_injections", VCPU_STAT(nmi_injections
) },
159 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
160 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
161 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
162 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
163 { "mmu_flooded", VM_STAT(mmu_flooded
) },
164 { "mmu_recycled", VM_STAT(mmu_recycled
) },
165 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
166 { "mmu_unsync", VM_STAT(mmu_unsync
) },
167 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
168 { "largepages", VM_STAT(lpages
) },
172 u64 __read_mostly host_xcr0
;
174 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
176 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
179 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
180 vcpu
->arch
.apf
.gfns
[i
] = ~0;
183 static void kvm_on_user_return(struct user_return_notifier
*urn
)
186 struct kvm_shared_msrs
*locals
187 = container_of(urn
, struct kvm_shared_msrs
, urn
);
188 struct kvm_shared_msr_values
*values
;
190 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
191 values
= &locals
->values
[slot
];
192 if (values
->host
!= values
->curr
) {
193 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
194 values
->curr
= values
->host
;
197 locals
->registered
= false;
198 user_return_notifier_unregister(urn
);
201 static void shared_msr_update(unsigned slot
, u32 msr
)
204 unsigned int cpu
= smp_processor_id();
205 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
207 /* only read, and nobody should modify it at this time,
208 * so don't need lock */
209 if (slot
>= shared_msrs_global
.nr
) {
210 printk(KERN_ERR
"kvm: invalid MSR slot!");
213 rdmsrl_safe(msr
, &value
);
214 smsr
->values
[slot
].host
= value
;
215 smsr
->values
[slot
].curr
= value
;
218 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
220 BUG_ON(slot
>= KVM_NR_SHARED_MSRS
);
221 if (slot
>= shared_msrs_global
.nr
)
222 shared_msrs_global
.nr
= slot
+ 1;
223 shared_msrs_global
.msrs
[slot
] = msr
;
224 /* we need ensured the shared_msr_global have been updated */
227 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
229 static void kvm_shared_msr_cpu_online(void)
233 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
234 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
237 int kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
239 unsigned int cpu
= smp_processor_id();
240 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
243 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
245 smsr
->values
[slot
].curr
= value
;
246 err
= wrmsrl_safe(shared_msrs_global
.msrs
[slot
], value
);
250 if (!smsr
->registered
) {
251 smsr
->urn
.on_user_return
= kvm_on_user_return
;
252 user_return_notifier_register(&smsr
->urn
);
253 smsr
->registered
= true;
257 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
259 static void drop_user_return_notifiers(void)
261 unsigned int cpu
= smp_processor_id();
262 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
264 if (smsr
->registered
)
265 kvm_on_user_return(&smsr
->urn
);
268 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
270 return vcpu
->arch
.apic_base
;
272 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
274 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
276 u64 old_state
= vcpu
->arch
.apic_base
&
277 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
278 u64 new_state
= msr_info
->data
&
279 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
280 u64 reserved_bits
= ((~0ULL) << cpuid_maxphyaddr(vcpu
)) |
281 0x2ff | (guest_cpuid_has_x2apic(vcpu
) ? 0 : X2APIC_ENABLE
);
283 if (!msr_info
->host_initiated
&&
284 ((msr_info
->data
& reserved_bits
) != 0 ||
285 new_state
== X2APIC_ENABLE
||
286 (new_state
== MSR_IA32_APICBASE_ENABLE
&&
287 old_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
)) ||
288 (new_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
) &&
292 kvm_lapic_set_base(vcpu
, msr_info
->data
);
295 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
297 asmlinkage __visible
void kvm_spurious_fault(void)
299 /* Fault while not rebooting. We want the trace. */
302 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
304 #define EXCPT_BENIGN 0
305 #define EXCPT_CONTRIBUTORY 1
308 static int exception_class(int vector
)
318 return EXCPT_CONTRIBUTORY
;
325 #define EXCPT_FAULT 0
327 #define EXCPT_ABORT 2
328 #define EXCPT_INTERRUPT 3
330 static int exception_type(int vector
)
334 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
335 return EXCPT_INTERRUPT
;
339 /* #DB is trap, as instruction watchpoints are handled elsewhere */
340 if (mask
& ((1 << DB_VECTOR
) | (1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
343 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
346 /* Reserved exceptions will result in fault */
350 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
351 unsigned nr
, bool has_error
, u32 error_code
,
357 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
359 if (!vcpu
->arch
.exception
.pending
) {
361 if (has_error
&& !is_protmode(vcpu
))
363 vcpu
->arch
.exception
.pending
= true;
364 vcpu
->arch
.exception
.has_error_code
= has_error
;
365 vcpu
->arch
.exception
.nr
= nr
;
366 vcpu
->arch
.exception
.error_code
= error_code
;
367 vcpu
->arch
.exception
.reinject
= reinject
;
371 /* to check exception */
372 prev_nr
= vcpu
->arch
.exception
.nr
;
373 if (prev_nr
== DF_VECTOR
) {
374 /* triple fault -> shutdown */
375 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
378 class1
= exception_class(prev_nr
);
379 class2
= exception_class(nr
);
380 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
381 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
382 /* generate double fault per SDM Table 5-5 */
383 vcpu
->arch
.exception
.pending
= true;
384 vcpu
->arch
.exception
.has_error_code
= true;
385 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
386 vcpu
->arch
.exception
.error_code
= 0;
388 /* replace previous exception with a new one in a hope
389 that instruction re-execution will regenerate lost
394 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
396 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
398 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
400 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
402 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
404 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
406 void kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
409 kvm_inject_gp(vcpu
, 0);
411 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
413 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
415 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
417 ++vcpu
->stat
.pf_guest
;
418 vcpu
->arch
.cr2
= fault
->address
;
419 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
421 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
423 static bool kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
425 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
426 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
428 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
430 return fault
->nested_page_fault
;
433 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
435 atomic_inc(&vcpu
->arch
.nmi_queued
);
436 kvm_make_request(KVM_REQ_NMI
, vcpu
);
438 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
440 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
442 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
444 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
446 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
448 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
450 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
453 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
454 * a #GP and return false.
456 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
458 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
460 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
463 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
465 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
467 if ((dr
!= 4 && dr
!= 5) || !kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
470 kvm_queue_exception(vcpu
, UD_VECTOR
);
473 EXPORT_SYMBOL_GPL(kvm_require_dr
);
476 * This function will be used to read from the physical memory of the currently
477 * running guest. The difference to kvm_read_guest_page is that this function
478 * can read from guest physical or from the guest's guest physical memory.
480 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
481 gfn_t ngfn
, void *data
, int offset
, int len
,
484 struct x86_exception exception
;
488 ngpa
= gfn_to_gpa(ngfn
);
489 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
, &exception
);
490 if (real_gfn
== UNMAPPED_GVA
)
493 real_gfn
= gpa_to_gfn(real_gfn
);
495 return kvm_read_guest_page(vcpu
->kvm
, real_gfn
, data
, offset
, len
);
497 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
499 static int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
500 void *data
, int offset
, int len
, u32 access
)
502 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
503 data
, offset
, len
, access
);
507 * Load the pae pdptrs. Return true is they are all valid.
509 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
511 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
512 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
515 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
517 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
518 offset
* sizeof(u64
), sizeof(pdpte
),
519 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
524 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
525 if (is_present_gpte(pdpte
[i
]) &&
526 (pdpte
[i
] & vcpu
->arch
.mmu
.rsvd_bits_mask
[0][2])) {
533 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
534 __set_bit(VCPU_EXREG_PDPTR
,
535 (unsigned long *)&vcpu
->arch
.regs_avail
);
536 __set_bit(VCPU_EXREG_PDPTR
,
537 (unsigned long *)&vcpu
->arch
.regs_dirty
);
542 EXPORT_SYMBOL_GPL(load_pdptrs
);
544 static bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
546 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
552 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
555 if (!test_bit(VCPU_EXREG_PDPTR
,
556 (unsigned long *)&vcpu
->arch
.regs_avail
))
559 gfn
= (kvm_read_cr3(vcpu
) & ~31u) >> PAGE_SHIFT
;
560 offset
= (kvm_read_cr3(vcpu
) & ~31u) & (PAGE_SIZE
- 1);
561 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
562 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
565 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
571 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
573 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
574 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
|
575 X86_CR0_CD
| X86_CR0_NW
;
580 if (cr0
& 0xffffffff00000000UL
)
584 cr0
&= ~CR0_RESERVED_BITS
;
586 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
589 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
592 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
594 if ((vcpu
->arch
.efer
& EFER_LME
)) {
599 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
604 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
609 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
612 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
614 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
615 kvm_clear_async_pf_completion_queue(vcpu
);
616 kvm_async_pf_hash_reset(vcpu
);
619 if ((cr0
^ old_cr0
) & update_bits
)
620 kvm_mmu_reset_context(vcpu
);
623 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
625 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
627 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
629 EXPORT_SYMBOL_GPL(kvm_lmsw
);
631 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
633 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
634 !vcpu
->guest_xcr0_loaded
) {
635 /* kvm_set_xcr() also depends on this */
636 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
637 vcpu
->guest_xcr0_loaded
= 1;
641 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
643 if (vcpu
->guest_xcr0_loaded
) {
644 if (vcpu
->arch
.xcr0
!= host_xcr0
)
645 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
646 vcpu
->guest_xcr0_loaded
= 0;
650 static int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
653 u64 old_xcr0
= vcpu
->arch
.xcr0
;
656 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
657 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
659 if (!(xcr0
& XSTATE_FP
))
661 if ((xcr0
& XSTATE_YMM
) && !(xcr0
& XSTATE_SSE
))
665 * Do not allow the guest to set bits that we do not support
666 * saving. However, xcr0 bit 0 is always set, even if the
667 * emulated CPU does not support XSAVE (see fx_init).
669 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XSTATE_FP
;
670 if (xcr0
& ~valid_bits
)
673 if ((!(xcr0
& XSTATE_BNDREGS
)) != (!(xcr0
& XSTATE_BNDCSR
)))
676 if (xcr0
& XSTATE_AVX512
) {
677 if (!(xcr0
& XSTATE_YMM
))
679 if ((xcr0
& XSTATE_AVX512
) != XSTATE_AVX512
)
682 kvm_put_guest_xcr0(vcpu
);
683 vcpu
->arch
.xcr0
= xcr0
;
685 if ((xcr0
^ old_xcr0
) & XSTATE_EXTEND_MASK
)
686 kvm_update_cpuid(vcpu
);
690 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
692 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 ||
693 __kvm_set_xcr(vcpu
, index
, xcr
)) {
694 kvm_inject_gp(vcpu
, 0);
699 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
701 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
703 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
704 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
|
705 X86_CR4_PAE
| X86_CR4_SMEP
;
706 if (cr4
& CR4_RESERVED_BITS
)
709 if (!guest_cpuid_has_xsave(vcpu
) && (cr4
& X86_CR4_OSXSAVE
))
712 if (!guest_cpuid_has_smep(vcpu
) && (cr4
& X86_CR4_SMEP
))
715 if (!guest_cpuid_has_smap(vcpu
) && (cr4
& X86_CR4_SMAP
))
718 if (!guest_cpuid_has_fsgsbase(vcpu
) && (cr4
& X86_CR4_FSGSBASE
))
721 if (is_long_mode(vcpu
)) {
722 if (!(cr4
& X86_CR4_PAE
))
724 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
725 && ((cr4
^ old_cr4
) & pdptr_bits
)
726 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
730 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
731 if (!guest_cpuid_has_pcid(vcpu
))
734 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
735 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
739 if (kvm_x86_ops
->set_cr4(vcpu
, cr4
))
742 if (((cr4
^ old_cr4
) & pdptr_bits
) ||
743 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
744 kvm_mmu_reset_context(vcpu
);
746 if ((cr4
^ old_cr4
) & X86_CR4_SMAP
)
747 update_permission_bitmask(vcpu
, vcpu
->arch
.walk_mmu
, false);
749 if ((cr4
^ old_cr4
) & X86_CR4_OSXSAVE
)
750 kvm_update_cpuid(vcpu
);
754 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
756 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
759 cr3
&= ~CR3_PCID_INVD
;
762 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
763 kvm_mmu_sync_roots(vcpu
);
764 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
768 if (is_long_mode(vcpu
)) {
769 if (cr3
& CR3_L_MODE_RESERVED_BITS
)
771 } else if (is_pae(vcpu
) && is_paging(vcpu
) &&
772 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
775 vcpu
->arch
.cr3
= cr3
;
776 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
777 kvm_mmu_new_cr3(vcpu
);
780 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
782 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
784 if (cr8
& CR8_RESERVED_BITS
)
786 if (irqchip_in_kernel(vcpu
->kvm
))
787 kvm_lapic_set_tpr(vcpu
, cr8
);
789 vcpu
->arch
.cr8
= cr8
;
792 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
794 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
796 if (irqchip_in_kernel(vcpu
->kvm
))
797 return kvm_lapic_get_cr8(vcpu
);
799 return vcpu
->arch
.cr8
;
801 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
803 static void kvm_update_dr6(struct kvm_vcpu
*vcpu
)
805 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
806 kvm_x86_ops
->set_dr6(vcpu
, vcpu
->arch
.dr6
);
809 static void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
813 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
814 dr7
= vcpu
->arch
.guest_debug_dr7
;
816 dr7
= vcpu
->arch
.dr7
;
817 kvm_x86_ops
->set_dr7(vcpu
, dr7
);
818 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
819 if (dr7
& DR7_BP_EN_MASK
)
820 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
823 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
825 u64 fixed
= DR6_FIXED_1
;
827 if (!guest_cpuid_has_rtm(vcpu
))
832 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
836 vcpu
->arch
.db
[dr
] = val
;
837 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
838 vcpu
->arch
.eff_db
[dr
] = val
;
843 if (val
& 0xffffffff00000000ULL
)
845 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
846 kvm_update_dr6(vcpu
);
851 if (val
& 0xffffffff00000000ULL
)
853 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
854 kvm_update_dr7(vcpu
);
861 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
863 if (__kvm_set_dr(vcpu
, dr
, val
)) {
864 kvm_inject_gp(vcpu
, 0);
869 EXPORT_SYMBOL_GPL(kvm_set_dr
);
871 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
875 *val
= vcpu
->arch
.db
[dr
];
880 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
881 *val
= vcpu
->arch
.dr6
;
883 *val
= kvm_x86_ops
->get_dr6(vcpu
);
888 *val
= vcpu
->arch
.dr7
;
893 EXPORT_SYMBOL_GPL(kvm_get_dr
);
895 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
897 u32 ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
901 err
= kvm_pmu_read_pmc(vcpu
, ecx
, &data
);
904 kvm_register_write(vcpu
, VCPU_REGS_RAX
, (u32
)data
);
905 kvm_register_write(vcpu
, VCPU_REGS_RDX
, data
>> 32);
908 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
911 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
912 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
914 * This list is modified at module load time to reflect the
915 * capabilities of the host cpu. This capabilities test skips MSRs that are
916 * kvm-specific. Those are put in the beginning of the list.
919 #define KVM_SAVE_MSRS_BEGIN 12
920 static u32 msrs_to_save
[] = {
921 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
922 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
923 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
924 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
925 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
927 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
930 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
932 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
933 MSR_IA32_FEATURE_CONTROL
, MSR_IA32_BNDCFGS
936 static unsigned num_msrs_to_save
;
938 static const u32 emulated_msrs
[] = {
940 MSR_IA32_TSCDEADLINE
,
941 MSR_IA32_MISC_ENABLE
,
946 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
948 if (efer
& efer_reserved_bits
)
951 if (efer
& EFER_FFXSR
) {
952 struct kvm_cpuid_entry2
*feat
;
954 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
955 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
)))
959 if (efer
& EFER_SVME
) {
960 struct kvm_cpuid_entry2
*feat
;
962 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
963 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
)))
969 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
971 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
973 u64 old_efer
= vcpu
->arch
.efer
;
975 if (!kvm_valid_efer(vcpu
, efer
))
979 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
983 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
985 kvm_x86_ops
->set_efer(vcpu
, efer
);
987 /* Update reserved bits */
988 if ((efer
^ old_efer
) & EFER_NX
)
989 kvm_mmu_reset_context(vcpu
);
994 void kvm_enable_efer_bits(u64 mask
)
996 efer_reserved_bits
&= ~mask
;
998 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1001 * Writes msr value into into the appropriate "register".
1002 * Returns 0 on success, non-0 otherwise.
1003 * Assumes vcpu_load() was already called.
1005 int kvm_set_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1007 switch (msr
->index
) {
1010 case MSR_KERNEL_GS_BASE
:
1013 if (is_noncanonical_address(msr
->data
))
1016 case MSR_IA32_SYSENTER_EIP
:
1017 case MSR_IA32_SYSENTER_ESP
:
1019 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1020 * non-canonical address is written on Intel but not on
1021 * AMD (which ignores the top 32-bits, because it does
1022 * not implement 64-bit SYSENTER).
1024 * 64-bit code should hence be able to write a non-canonical
1025 * value on AMD. Making the address canonical ensures that
1026 * vmentry does not fail on Intel after writing a non-canonical
1027 * value, and that something deterministic happens if the guest
1028 * invokes 64-bit SYSENTER.
1030 msr
->data
= get_canonical(msr
->data
);
1032 return kvm_x86_ops
->set_msr(vcpu
, msr
);
1034 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1037 * Adapt set_msr() to msr_io()'s calling convention
1039 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1041 struct msr_data msr
;
1045 msr
.host_initiated
= true;
1046 return kvm_set_msr(vcpu
, &msr
);
1049 #ifdef CONFIG_X86_64
1050 struct pvclock_gtod_data
{
1053 struct { /* extract of a clocksource struct */
1065 static struct pvclock_gtod_data pvclock_gtod_data
;
1067 static void update_pvclock_gtod(struct timekeeper
*tk
)
1069 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
1072 boot_ns
= ktime_to_ns(ktime_add(tk
->tkr
.base_mono
, tk
->offs_boot
));
1074 write_seqcount_begin(&vdata
->seq
);
1076 /* copy pvclock gtod data */
1077 vdata
->clock
.vclock_mode
= tk
->tkr
.clock
->archdata
.vclock_mode
;
1078 vdata
->clock
.cycle_last
= tk
->tkr
.cycle_last
;
1079 vdata
->clock
.mask
= tk
->tkr
.mask
;
1080 vdata
->clock
.mult
= tk
->tkr
.mult
;
1081 vdata
->clock
.shift
= tk
->tkr
.shift
;
1083 vdata
->boot_ns
= boot_ns
;
1084 vdata
->nsec_base
= tk
->tkr
.xtime_nsec
;
1086 write_seqcount_end(&vdata
->seq
);
1090 void kvm_set_pending_timer(struct kvm_vcpu
*vcpu
)
1093 * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1094 * vcpu_enter_guest. This function is only called from
1095 * the physical CPU that is running vcpu.
1097 kvm_make_request(KVM_REQ_PENDING_TIMER
, vcpu
);
1100 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
1104 struct pvclock_wall_clock wc
;
1105 struct timespec boot
;
1110 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1115 ++version
; /* first time write, random junk */
1119 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1122 * The guest calculates current wall clock time by adding
1123 * system time (updated by kvm_guest_time_update below) to the
1124 * wall clock specified here. guest system time equals host
1125 * system time for us, thus we must fill in host boot time here.
1129 if (kvm
->arch
.kvmclock_offset
) {
1130 struct timespec ts
= ns_to_timespec(kvm
->arch
.kvmclock_offset
);
1131 boot
= timespec_sub(boot
, ts
);
1133 wc
.sec
= boot
.tv_sec
;
1134 wc
.nsec
= boot
.tv_nsec
;
1135 wc
.version
= version
;
1137 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
1140 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1143 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
1145 uint32_t quotient
, remainder
;
1147 /* Don't try to replace with do_div(), this one calculates
1148 * "(dividend << 32) / divisor" */
1150 : "=a" (quotient
), "=d" (remainder
)
1151 : "0" (0), "1" (dividend
), "r" (divisor
) );
1155 static void kvm_get_time_scale(uint32_t scaled_khz
, uint32_t base_khz
,
1156 s8
*pshift
, u32
*pmultiplier
)
1163 tps64
= base_khz
* 1000LL;
1164 scaled64
= scaled_khz
* 1000LL;
1165 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
1170 tps32
= (uint32_t)tps64
;
1171 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
1172 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
1180 *pmultiplier
= div_frac(scaled64
, tps32
);
1182 pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1183 __func__
, base_khz
, scaled_khz
, shift
, *pmultiplier
);
1186 static inline u64
get_kernel_ns(void)
1188 return ktime_get_boot_ns();
1191 #ifdef CONFIG_X86_64
1192 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
1195 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
1196 static unsigned long max_tsc_khz
;
1198 static inline u64
nsec_to_cycles(struct kvm_vcpu
*vcpu
, u64 nsec
)
1200 return pvclock_scale_delta(nsec
, vcpu
->arch
.virtual_tsc_mult
,
1201 vcpu
->arch
.virtual_tsc_shift
);
1204 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
1206 u64 v
= (u64
)khz
* (1000000 + ppm
);
1211 static void kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 this_tsc_khz
)
1213 u32 thresh_lo
, thresh_hi
;
1214 int use_scaling
= 0;
1216 /* tsc_khz can be zero if TSC calibration fails */
1217 if (this_tsc_khz
== 0)
1220 /* Compute a scale to convert nanoseconds in TSC cycles */
1221 kvm_get_time_scale(this_tsc_khz
, NSEC_PER_SEC
/ 1000,
1222 &vcpu
->arch
.virtual_tsc_shift
,
1223 &vcpu
->arch
.virtual_tsc_mult
);
1224 vcpu
->arch
.virtual_tsc_khz
= this_tsc_khz
;
1227 * Compute the variation in TSC rate which is acceptable
1228 * within the range of tolerance and decide if the
1229 * rate being applied is within that bounds of the hardware
1230 * rate. If so, no scaling or compensation need be done.
1232 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
1233 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
1234 if (this_tsc_khz
< thresh_lo
|| this_tsc_khz
> thresh_hi
) {
1235 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz
, thresh_lo
, thresh_hi
);
1238 kvm_x86_ops
->set_tsc_khz(vcpu
, this_tsc_khz
, use_scaling
);
1241 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1243 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
1244 vcpu
->arch
.virtual_tsc_mult
,
1245 vcpu
->arch
.virtual_tsc_shift
);
1246 tsc
+= vcpu
->arch
.this_tsc_write
;
1250 static void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
1252 #ifdef CONFIG_X86_64
1254 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
1255 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1257 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1258 atomic_read(&vcpu
->kvm
->online_vcpus
));
1261 * Once the masterclock is enabled, always perform request in
1262 * order to update it.
1264 * In order to enable masterclock, the host clocksource must be TSC
1265 * and the vcpus need to have matched TSCs. When that happens,
1266 * perform request to enable masterclock.
1268 if (ka
->use_master_clock
||
1269 (gtod
->clock
.vclock_mode
== VCLOCK_TSC
&& vcpus_matched
))
1270 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
1272 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
1273 atomic_read(&vcpu
->kvm
->online_vcpus
),
1274 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
1278 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu
*vcpu
, s64 offset
)
1280 u64 curr_offset
= kvm_x86_ops
->read_tsc_offset(vcpu
);
1281 vcpu
->arch
.ia32_tsc_adjust_msr
+= offset
- curr_offset
;
1284 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1286 struct kvm
*kvm
= vcpu
->kvm
;
1287 u64 offset
, ns
, elapsed
;
1288 unsigned long flags
;
1291 bool already_matched
;
1292 u64 data
= msr
->data
;
1294 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1295 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
, data
);
1296 ns
= get_kernel_ns();
1297 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1299 if (vcpu
->arch
.virtual_tsc_khz
) {
1302 /* n.b - signed multiplication and division required */
1303 usdiff
= data
- kvm
->arch
.last_tsc_write
;
1304 #ifdef CONFIG_X86_64
1305 usdiff
= (usdiff
* 1000) / vcpu
->arch
.virtual_tsc_khz
;
1307 /* do_div() only does unsigned */
1308 asm("1: idivl %[divisor]\n"
1309 "2: xor %%edx, %%edx\n"
1310 " movl $0, %[faulted]\n"
1312 ".section .fixup,\"ax\"\n"
1313 "4: movl $1, %[faulted]\n"
1317 _ASM_EXTABLE(1b
, 4b
)
1319 : "=A"(usdiff
), [faulted
] "=r" (faulted
)
1320 : "A"(usdiff
* 1000), [divisor
] "rm"(vcpu
->arch
.virtual_tsc_khz
));
1323 do_div(elapsed
, 1000);
1328 /* idivl overflow => difference is larger than USEC_PER_SEC */
1330 usdiff
= USEC_PER_SEC
;
1332 usdiff
= USEC_PER_SEC
; /* disable TSC match window below */
1335 * Special case: TSC write with a small delta (1 second) of virtual
1336 * cycle time against real time is interpreted as an attempt to
1337 * synchronize the CPU.
1339 * For a reliable TSC, we can match TSC offsets, and for an unstable
1340 * TSC, we add elapsed time in this computation. We could let the
1341 * compensation code attempt to catch up if we fall behind, but
1342 * it's better to try to match offsets from the beginning.
1344 if (usdiff
< USEC_PER_SEC
&&
1345 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
1346 if (!check_tsc_unstable()) {
1347 offset
= kvm
->arch
.cur_tsc_offset
;
1348 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1350 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
1352 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
, data
);
1353 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1356 already_matched
= (vcpu
->arch
.this_tsc_generation
== kvm
->arch
.cur_tsc_generation
);
1359 * We split periods of matched TSC writes into generations.
1360 * For each generation, we track the original measured
1361 * nanosecond time, offset, and write, so if TSCs are in
1362 * sync, we can match exact offset, and if not, we can match
1363 * exact software computation in compute_guest_tsc()
1365 * These values are tracked in kvm->arch.cur_xxx variables.
1367 kvm
->arch
.cur_tsc_generation
++;
1368 kvm
->arch
.cur_tsc_nsec
= ns
;
1369 kvm
->arch
.cur_tsc_write
= data
;
1370 kvm
->arch
.cur_tsc_offset
= offset
;
1372 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1373 kvm
->arch
.cur_tsc_generation
, data
);
1377 * We also track th most recent recorded KHZ, write and time to
1378 * allow the matching interval to be extended at each write.
1380 kvm
->arch
.last_tsc_nsec
= ns
;
1381 kvm
->arch
.last_tsc_write
= data
;
1382 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
1384 vcpu
->arch
.last_guest_tsc
= data
;
1386 /* Keep track of which generation this VCPU has synchronized to */
1387 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
1388 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
1389 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
1391 if (guest_cpuid_has_tsc_adjust(vcpu
) && !msr
->host_initiated
)
1392 update_ia32_tsc_adjust_msr(vcpu
, offset
);
1393 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1394 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1396 spin_lock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1398 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
1399 } else if (!already_matched
) {
1400 kvm
->arch
.nr_vcpus_matched_tsc
++;
1403 kvm_track_tsc_matching(vcpu
);
1404 spin_unlock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1407 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1409 #ifdef CONFIG_X86_64
1411 static cycle_t
read_tsc(void)
1417 * Empirically, a fence (of type that depends on the CPU)
1418 * before rdtsc is enough to ensure that rdtsc is ordered
1419 * with respect to loads. The various CPU manuals are unclear
1420 * as to whether rdtsc can be reordered with later loads,
1421 * but no one has ever seen it happen.
1424 ret
= (cycle_t
)vget_cycles();
1426 last
= pvclock_gtod_data
.clock
.cycle_last
;
1428 if (likely(ret
>= last
))
1432 * GCC likes to generate cmov here, but this branch is extremely
1433 * predictable (it's just a funciton of time and the likely is
1434 * very likely) and there's a data dependence, so force GCC
1435 * to generate a branch instead. I don't barrier() because
1436 * we don't actually need a barrier, and if this function
1437 * ever gets inlined it will generate worse code.
1443 static inline u64
vgettsc(cycle_t
*cycle_now
)
1446 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1448 *cycle_now
= read_tsc();
1450 v
= (*cycle_now
- gtod
->clock
.cycle_last
) & gtod
->clock
.mask
;
1451 return v
* gtod
->clock
.mult
;
1454 static int do_monotonic_boot(s64
*t
, cycle_t
*cycle_now
)
1456 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1462 seq
= read_seqcount_begin(>od
->seq
);
1463 mode
= gtod
->clock
.vclock_mode
;
1464 ns
= gtod
->nsec_base
;
1465 ns
+= vgettsc(cycle_now
);
1466 ns
>>= gtod
->clock
.shift
;
1467 ns
+= gtod
->boot_ns
;
1468 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1474 /* returns true if host is using tsc clocksource */
1475 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, cycle_t
*cycle_now
)
1477 /* checked again under seqlock below */
1478 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1481 return do_monotonic_boot(kernel_ns
, cycle_now
) == VCLOCK_TSC
;
1487 * Assuming a stable TSC across physical CPUS, and a stable TSC
1488 * across virtual CPUs, the following condition is possible.
1489 * Each numbered line represents an event visible to both
1490 * CPUs at the next numbered event.
1492 * "timespecX" represents host monotonic time. "tscX" represents
1495 * VCPU0 on CPU0 | VCPU1 on CPU1
1497 * 1. read timespec0,tsc0
1498 * 2. | timespec1 = timespec0 + N
1500 * 3. transition to guest | transition to guest
1501 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1502 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1503 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1505 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1508 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1510 * - 0 < N - M => M < N
1512 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1513 * always the case (the difference between two distinct xtime instances
1514 * might be smaller then the difference between corresponding TSC reads,
1515 * when updating guest vcpus pvclock areas).
1517 * To avoid that problem, do not allow visibility of distinct
1518 * system_timestamp/tsc_timestamp values simultaneously: use a master
1519 * copy of host monotonic time values. Update that master copy
1522 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1526 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
1528 #ifdef CONFIG_X86_64
1529 struct kvm_arch
*ka
= &kvm
->arch
;
1531 bool host_tsc_clocksource
, vcpus_matched
;
1533 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1534 atomic_read(&kvm
->online_vcpus
));
1537 * If the host uses TSC clock, then passthrough TSC as stable
1540 host_tsc_clocksource
= kvm_get_time_and_clockread(
1541 &ka
->master_kernel_ns
,
1542 &ka
->master_cycle_now
);
1544 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
1545 && !backwards_tsc_observed
1546 && !ka
->boot_vcpu_runs_old_kvmclock
;
1548 if (ka
->use_master_clock
)
1549 atomic_set(&kvm_guest_has_master_clock
, 1);
1551 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
1552 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
1557 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
1559 #ifdef CONFIG_X86_64
1561 struct kvm_vcpu
*vcpu
;
1562 struct kvm_arch
*ka
= &kvm
->arch
;
1564 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1565 kvm_make_mclock_inprogress_request(kvm
);
1566 /* no guest entries from this point */
1567 pvclock_update_vm_gtod_copy(kvm
);
1569 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1570 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1572 /* guest entries allowed */
1573 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1574 clear_bit(KVM_REQ_MCLOCK_INPROGRESS
, &vcpu
->requests
);
1576 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1580 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1582 unsigned long flags
, this_tsc_khz
;
1583 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1584 struct kvm_arch
*ka
= &v
->kvm
->arch
;
1586 u64 tsc_timestamp
, host_tsc
;
1587 struct pvclock_vcpu_time_info guest_hv_clock
;
1589 bool use_master_clock
;
1595 * If the host uses TSC clock, then passthrough TSC as stable
1598 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1599 use_master_clock
= ka
->use_master_clock
;
1600 if (use_master_clock
) {
1601 host_tsc
= ka
->master_cycle_now
;
1602 kernel_ns
= ka
->master_kernel_ns
;
1604 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1606 /* Keep irq disabled to prevent changes to the clock */
1607 local_irq_save(flags
);
1608 this_tsc_khz
= __this_cpu_read(cpu_tsc_khz
);
1609 if (unlikely(this_tsc_khz
== 0)) {
1610 local_irq_restore(flags
);
1611 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1614 if (!use_master_clock
) {
1615 host_tsc
= native_read_tsc();
1616 kernel_ns
= get_kernel_ns();
1619 tsc_timestamp
= kvm_x86_ops
->read_l1_tsc(v
, host_tsc
);
1622 * We may have to catch up the TSC to match elapsed wall clock
1623 * time for two reasons, even if kvmclock is used.
1624 * 1) CPU could have been running below the maximum TSC rate
1625 * 2) Broken TSC compensation resets the base at each VCPU
1626 * entry to avoid unknown leaps of TSC even when running
1627 * again on the same CPU. This may cause apparent elapsed
1628 * time to disappear, and the guest to stand still or run
1631 if (vcpu
->tsc_catchup
) {
1632 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1633 if (tsc
> tsc_timestamp
) {
1634 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
1635 tsc_timestamp
= tsc
;
1639 local_irq_restore(flags
);
1641 if (!vcpu
->pv_time_enabled
)
1644 if (unlikely(vcpu
->hw_tsc_khz
!= this_tsc_khz
)) {
1645 kvm_get_time_scale(NSEC_PER_SEC
/ 1000, this_tsc_khz
,
1646 &vcpu
->hv_clock
.tsc_shift
,
1647 &vcpu
->hv_clock
.tsc_to_system_mul
);
1648 vcpu
->hw_tsc_khz
= this_tsc_khz
;
1651 /* With all the info we got, fill in the values */
1652 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
1653 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
1654 vcpu
->last_guest_tsc
= tsc_timestamp
;
1656 if (unlikely(kvm_read_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1657 &guest_hv_clock
, sizeof(guest_hv_clock
))))
1661 * The interface expects us to write an even number signaling that the
1662 * update is finished. Since the guest won't see the intermediate
1663 * state, we just increase by 2 at the end.
1665 vcpu
->hv_clock
.version
= guest_hv_clock
.version
+ 2;
1667 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1668 pvclock_flags
= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
1670 if (vcpu
->pvclock_set_guest_stopped_request
) {
1671 pvclock_flags
|= PVCLOCK_GUEST_STOPPED
;
1672 vcpu
->pvclock_set_guest_stopped_request
= false;
1675 /* If the host uses TSC clocksource, then it is stable */
1676 if (use_master_clock
)
1677 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
1679 vcpu
->hv_clock
.flags
= pvclock_flags
;
1681 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
1683 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1685 sizeof(vcpu
->hv_clock
));
1690 * kvmclock updates which are isolated to a given vcpu, such as
1691 * vcpu->cpu migration, should not allow system_timestamp from
1692 * the rest of the vcpus to remain static. Otherwise ntp frequency
1693 * correction applies to one vcpu's system_timestamp but not
1696 * So in those cases, request a kvmclock update for all vcpus.
1697 * We need to rate-limit these requests though, as they can
1698 * considerably slow guests that have a large number of vcpus.
1699 * The time for a remote vcpu to update its kvmclock is bound
1700 * by the delay we use to rate-limit the updates.
1703 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1705 static void kvmclock_update_fn(struct work_struct
*work
)
1708 struct delayed_work
*dwork
= to_delayed_work(work
);
1709 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1710 kvmclock_update_work
);
1711 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1712 struct kvm_vcpu
*vcpu
;
1714 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
1715 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1716 kvm_vcpu_kick(vcpu
);
1720 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
1722 struct kvm
*kvm
= v
->kvm
;
1724 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1725 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
1726 KVMCLOCK_UPDATE_DELAY
);
1729 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1731 static void kvmclock_sync_fn(struct work_struct
*work
)
1733 struct delayed_work
*dwork
= to_delayed_work(work
);
1734 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1735 kvmclock_sync_work
);
1736 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1738 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
1739 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
1740 KVMCLOCK_SYNC_PERIOD
);
1743 static bool msr_mtrr_valid(unsigned msr
)
1746 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR
- 1:
1747 case MSR_MTRRfix64K_00000
:
1748 case MSR_MTRRfix16K_80000
:
1749 case MSR_MTRRfix16K_A0000
:
1750 case MSR_MTRRfix4K_C0000
:
1751 case MSR_MTRRfix4K_C8000
:
1752 case MSR_MTRRfix4K_D0000
:
1753 case MSR_MTRRfix4K_D8000
:
1754 case MSR_MTRRfix4K_E0000
:
1755 case MSR_MTRRfix4K_E8000
:
1756 case MSR_MTRRfix4K_F0000
:
1757 case MSR_MTRRfix4K_F8000
:
1758 case MSR_MTRRdefType
:
1759 case MSR_IA32_CR_PAT
:
1767 static bool valid_pat_type(unsigned t
)
1769 return t
< 8 && (1 << t
) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1772 static bool valid_mtrr_type(unsigned t
)
1774 return t
< 8 && (1 << t
) & 0x73; /* 0, 1, 4, 5, 6 */
1777 bool kvm_mtrr_valid(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1782 if (!msr_mtrr_valid(msr
))
1785 if (msr
== MSR_IA32_CR_PAT
) {
1786 for (i
= 0; i
< 8; i
++)
1787 if (!valid_pat_type((data
>> (i
* 8)) & 0xff))
1790 } else if (msr
== MSR_MTRRdefType
) {
1793 return valid_mtrr_type(data
& 0xff);
1794 } else if (msr
>= MSR_MTRRfix64K_00000
&& msr
<= MSR_MTRRfix4K_F8000
) {
1795 for (i
= 0; i
< 8 ; i
++)
1796 if (!valid_mtrr_type((data
>> (i
* 8)) & 0xff))
1801 /* variable MTRRs */
1802 WARN_ON(!(msr
>= 0x200 && msr
< 0x200 + 2 * KVM_NR_VAR_MTRR
));
1804 mask
= (~0ULL) << cpuid_maxphyaddr(vcpu
);
1805 if ((msr
& 1) == 0) {
1807 if (!valid_mtrr_type(data
& 0xff))
1814 kvm_inject_gp(vcpu
, 0);
1820 EXPORT_SYMBOL_GPL(kvm_mtrr_valid
);
1822 static int set_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1824 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
1826 if (!kvm_mtrr_valid(vcpu
, msr
, data
))
1829 if (msr
== MSR_MTRRdefType
) {
1830 vcpu
->arch
.mtrr_state
.def_type
= data
;
1831 vcpu
->arch
.mtrr_state
.enabled
= (data
& 0xc00) >> 10;
1832 } else if (msr
== MSR_MTRRfix64K_00000
)
1834 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
1835 p
[1 + msr
- MSR_MTRRfix16K_80000
] = data
;
1836 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
1837 p
[3 + msr
- MSR_MTRRfix4K_C0000
] = data
;
1838 else if (msr
== MSR_IA32_CR_PAT
)
1839 vcpu
->arch
.pat
= data
;
1840 else { /* Variable MTRRs */
1841 int idx
, is_mtrr_mask
;
1844 idx
= (msr
- 0x200) / 2;
1845 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
1848 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
1851 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
1855 kvm_mmu_reset_context(vcpu
);
1859 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1861 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1862 unsigned bank_num
= mcg_cap
& 0xff;
1865 case MSR_IA32_MCG_STATUS
:
1866 vcpu
->arch
.mcg_status
= data
;
1868 case MSR_IA32_MCG_CTL
:
1869 if (!(mcg_cap
& MCG_CTL_P
))
1871 if (data
!= 0 && data
!= ~(u64
)0)
1873 vcpu
->arch
.mcg_ctl
= data
;
1876 if (msr
>= MSR_IA32_MC0_CTL
&&
1877 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
1878 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1879 /* only 0 or all 1s can be written to IA32_MCi_CTL
1880 * some Linux kernels though clear bit 10 in bank 4 to
1881 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1882 * this to avoid an uncatched #GP in the guest
1884 if ((offset
& 0x3) == 0 &&
1885 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
1887 vcpu
->arch
.mce_banks
[offset
] = data
;
1895 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
1897 struct kvm
*kvm
= vcpu
->kvm
;
1898 int lm
= is_long_mode(vcpu
);
1899 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
1900 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
1901 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
1902 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
1903 u32 page_num
= data
& ~PAGE_MASK
;
1904 u64 page_addr
= data
& PAGE_MASK
;
1909 if (page_num
>= blob_size
)
1912 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
1917 if (kvm_write_guest(kvm
, page_addr
, page
, PAGE_SIZE
))
1926 static bool kvm_hv_hypercall_enabled(struct kvm
*kvm
)
1928 return kvm
->arch
.hv_hypercall
& HV_X64_MSR_HYPERCALL_ENABLE
;
1931 static bool kvm_hv_msr_partition_wide(u32 msr
)
1935 case HV_X64_MSR_GUEST_OS_ID
:
1936 case HV_X64_MSR_HYPERCALL
:
1937 case HV_X64_MSR_REFERENCE_TSC
:
1938 case HV_X64_MSR_TIME_REF_COUNT
:
1946 static int set_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1948 struct kvm
*kvm
= vcpu
->kvm
;
1951 case HV_X64_MSR_GUEST_OS_ID
:
1952 kvm
->arch
.hv_guest_os_id
= data
;
1953 /* setting guest os id to zero disables hypercall page */
1954 if (!kvm
->arch
.hv_guest_os_id
)
1955 kvm
->arch
.hv_hypercall
&= ~HV_X64_MSR_HYPERCALL_ENABLE
;
1957 case HV_X64_MSR_HYPERCALL
: {
1962 /* if guest os id is not set hypercall should remain disabled */
1963 if (!kvm
->arch
.hv_guest_os_id
)
1965 if (!(data
& HV_X64_MSR_HYPERCALL_ENABLE
)) {
1966 kvm
->arch
.hv_hypercall
= data
;
1969 gfn
= data
>> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT
;
1970 addr
= gfn_to_hva(kvm
, gfn
);
1971 if (kvm_is_error_hva(addr
))
1973 kvm_x86_ops
->patch_hypercall(vcpu
, instructions
);
1974 ((unsigned char *)instructions
)[3] = 0xc3; /* ret */
1975 if (__copy_to_user((void __user
*)addr
, instructions
, 4))
1977 kvm
->arch
.hv_hypercall
= data
;
1978 mark_page_dirty(kvm
, gfn
);
1981 case HV_X64_MSR_REFERENCE_TSC
: {
1983 HV_REFERENCE_TSC_PAGE tsc_ref
;
1984 memset(&tsc_ref
, 0, sizeof(tsc_ref
));
1985 kvm
->arch
.hv_tsc_page
= data
;
1986 if (!(data
& HV_X64_MSR_TSC_REFERENCE_ENABLE
))
1988 gfn
= data
>> HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT
;
1989 if (kvm_write_guest(kvm
, gfn
<< HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT
,
1990 &tsc_ref
, sizeof(tsc_ref
)))
1992 mark_page_dirty(kvm
, gfn
);
1996 vcpu_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1997 "data 0x%llx\n", msr
, data
);
2003 static int set_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
2006 case HV_X64_MSR_APIC_ASSIST_PAGE
: {
2010 if (!(data
& HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE
)) {
2011 vcpu
->arch
.hv_vapic
= data
;
2012 if (kvm_lapic_enable_pv_eoi(vcpu
, 0))
2016 gfn
= data
>> HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT
;
2017 addr
= gfn_to_hva(vcpu
->kvm
, gfn
);
2018 if (kvm_is_error_hva(addr
))
2020 if (__clear_user((void __user
*)addr
, PAGE_SIZE
))
2022 vcpu
->arch
.hv_vapic
= data
;
2023 mark_page_dirty(vcpu
->kvm
, gfn
);
2024 if (kvm_lapic_enable_pv_eoi(vcpu
, gfn_to_gpa(gfn
) | KVM_MSR_ENABLED
))
2028 case HV_X64_MSR_EOI
:
2029 return kvm_hv_vapic_msr_write(vcpu
, APIC_EOI
, data
);
2030 case HV_X64_MSR_ICR
:
2031 return kvm_hv_vapic_msr_write(vcpu
, APIC_ICR
, data
);
2032 case HV_X64_MSR_TPR
:
2033 return kvm_hv_vapic_msr_write(vcpu
, APIC_TASKPRI
, data
);
2035 vcpu_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
2036 "data 0x%llx\n", msr
, data
);
2043 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
2045 gpa_t gpa
= data
& ~0x3f;
2047 /* Bits 2:5 are reserved, Should be zero */
2051 vcpu
->arch
.apf
.msr_val
= data
;
2053 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
2054 kvm_clear_async_pf_completion_queue(vcpu
);
2055 kvm_async_pf_hash_reset(vcpu
);
2059 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
2063 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
2064 kvm_async_pf_wakeup_all(vcpu
);
2068 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
2070 vcpu
->arch
.pv_time_enabled
= false;
2073 static void accumulate_steal_time(struct kvm_vcpu
*vcpu
)
2077 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2080 delta
= current
->sched_info
.run_delay
- vcpu
->arch
.st
.last_steal
;
2081 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2082 vcpu
->arch
.st
.accum_steal
= delta
;
2085 static void record_steal_time(struct kvm_vcpu
*vcpu
)
2087 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2090 if (unlikely(kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2091 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
))))
2094 vcpu
->arch
.st
.steal
.steal
+= vcpu
->arch
.st
.accum_steal
;
2095 vcpu
->arch
.st
.steal
.version
+= 2;
2096 vcpu
->arch
.st
.accum_steal
= 0;
2098 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2099 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2102 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2105 u32 msr
= msr_info
->index
;
2106 u64 data
= msr_info
->data
;
2109 case MSR_AMD64_NB_CFG
:
2110 case MSR_IA32_UCODE_REV
:
2111 case MSR_IA32_UCODE_WRITE
:
2112 case MSR_VM_HSAVE_PA
:
2113 case MSR_AMD64_PATCH_LOADER
:
2114 case MSR_AMD64_BU_CFG2
:
2118 return set_efer(vcpu
, data
);
2120 data
&= ~(u64
)0x40; /* ignore flush filter disable */
2121 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
2122 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
2123 data
&= ~(u64
)0x40000; /* ignore Mc status write enable */
2125 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
2130 case MSR_FAM10H_MMIO_CONF_BASE
:
2132 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
2137 case MSR_IA32_DEBUGCTLMSR
:
2139 /* We support the non-activated case already */
2141 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
2142 /* Values other than LBR and BTF are vendor-specific,
2143 thus reserved and should throw a #GP */
2146 vcpu_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2149 case 0x200 ... 0x2ff:
2150 return set_msr_mtrr(vcpu
, msr
, data
);
2151 case MSR_IA32_APICBASE
:
2152 return kvm_set_apic_base(vcpu
, msr_info
);
2153 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2154 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
2155 case MSR_IA32_TSCDEADLINE
:
2156 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
2158 case MSR_IA32_TSC_ADJUST
:
2159 if (guest_cpuid_has_tsc_adjust(vcpu
)) {
2160 if (!msr_info
->host_initiated
) {
2161 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
2162 kvm_x86_ops
->adjust_tsc_offset(vcpu
, adj
, true);
2164 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
2167 case MSR_IA32_MISC_ENABLE
:
2168 vcpu
->arch
.ia32_misc_enable_msr
= data
;
2170 case MSR_KVM_WALL_CLOCK_NEW
:
2171 case MSR_KVM_WALL_CLOCK
:
2172 vcpu
->kvm
->arch
.wall_clock
= data
;
2173 kvm_write_wall_clock(vcpu
->kvm
, data
);
2175 case MSR_KVM_SYSTEM_TIME_NEW
:
2176 case MSR_KVM_SYSTEM_TIME
: {
2178 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2180 kvmclock_reset(vcpu
);
2182 if (vcpu
->vcpu_id
== 0 && !msr_info
->host_initiated
) {
2183 bool tmp
= (msr
== MSR_KVM_SYSTEM_TIME
);
2185 if (ka
->boot_vcpu_runs_old_kvmclock
!= tmp
)
2186 set_bit(KVM_REQ_MASTERCLOCK_UPDATE
,
2189 ka
->boot_vcpu_runs_old_kvmclock
= tmp
;
2192 vcpu
->arch
.time
= data
;
2193 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2195 /* we verify if the enable bit is set... */
2199 gpa_offset
= data
& ~(PAGE_MASK
| 1);
2201 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2202 &vcpu
->arch
.pv_time
, data
& ~1ULL,
2203 sizeof(struct pvclock_vcpu_time_info
)))
2204 vcpu
->arch
.pv_time_enabled
= false;
2206 vcpu
->arch
.pv_time_enabled
= true;
2210 case MSR_KVM_ASYNC_PF_EN
:
2211 if (kvm_pv_enable_async_pf(vcpu
, data
))
2214 case MSR_KVM_STEAL_TIME
:
2216 if (unlikely(!sched_info_on()))
2219 if (data
& KVM_STEAL_RESERVED_MASK
)
2222 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2223 data
& KVM_STEAL_VALID_BITS
,
2224 sizeof(struct kvm_steal_time
)))
2227 vcpu
->arch
.st
.msr_val
= data
;
2229 if (!(data
& KVM_MSR_ENABLED
))
2232 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2235 accumulate_steal_time(vcpu
);
2238 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2241 case MSR_KVM_PV_EOI_EN
:
2242 if (kvm_lapic_enable_pv_eoi(vcpu
, data
))
2246 case MSR_IA32_MCG_CTL
:
2247 case MSR_IA32_MCG_STATUS
:
2248 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2249 return set_msr_mce(vcpu
, msr
, data
);
2251 /* Performance counters are not protected by a CPUID bit,
2252 * so we should check all of them in the generic path for the sake of
2253 * cross vendor migration.
2254 * Writing a zero into the event select MSRs disables them,
2255 * which we perfectly emulate ;-). Any other value should be at least
2256 * reported, some guests depend on them.
2258 case MSR_K7_EVNTSEL0
:
2259 case MSR_K7_EVNTSEL1
:
2260 case MSR_K7_EVNTSEL2
:
2261 case MSR_K7_EVNTSEL3
:
2263 vcpu_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
2264 "0x%x data 0x%llx\n", msr
, data
);
2266 /* at least RHEL 4 unconditionally writes to the perfctr registers,
2267 * so we ignore writes to make it happy.
2269 case MSR_K7_PERFCTR0
:
2270 case MSR_K7_PERFCTR1
:
2271 case MSR_K7_PERFCTR2
:
2272 case MSR_K7_PERFCTR3
:
2273 vcpu_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
2274 "0x%x data 0x%llx\n", msr
, data
);
2276 case MSR_P6_PERFCTR0
:
2277 case MSR_P6_PERFCTR1
:
2279 case MSR_P6_EVNTSEL0
:
2280 case MSR_P6_EVNTSEL1
:
2281 if (kvm_pmu_msr(vcpu
, msr
))
2282 return kvm_pmu_set_msr(vcpu
, msr_info
);
2284 if (pr
|| data
!= 0)
2285 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
2286 "0x%x data 0x%llx\n", msr
, data
);
2288 case MSR_K7_CLK_CTL
:
2290 * Ignore all writes to this no longer documented MSR.
2291 * Writes are only relevant for old K7 processors,
2292 * all pre-dating SVM, but a recommended workaround from
2293 * AMD for these chips. It is possible to specify the
2294 * affected processor models on the command line, hence
2295 * the need to ignore the workaround.
2298 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2299 if (kvm_hv_msr_partition_wide(msr
)) {
2301 mutex_lock(&vcpu
->kvm
->lock
);
2302 r
= set_msr_hyperv_pw(vcpu
, msr
, data
);
2303 mutex_unlock(&vcpu
->kvm
->lock
);
2306 return set_msr_hyperv(vcpu
, msr
, data
);
2308 case MSR_IA32_BBL_CR_CTL3
:
2309 /* Drop writes to this legacy MSR -- see rdmsr
2310 * counterpart for further detail.
2312 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n", msr
, data
);
2314 case MSR_AMD64_OSVW_ID_LENGTH
:
2315 if (!guest_cpuid_has_osvw(vcpu
))
2317 vcpu
->arch
.osvw
.length
= data
;
2319 case MSR_AMD64_OSVW_STATUS
:
2320 if (!guest_cpuid_has_osvw(vcpu
))
2322 vcpu
->arch
.osvw
.status
= data
;
2325 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
2326 return xen_hvm_config(vcpu
, data
);
2327 if (kvm_pmu_msr(vcpu
, msr
))
2328 return kvm_pmu_set_msr(vcpu
, msr_info
);
2330 vcpu_unimpl(vcpu
, "unhandled wrmsr: 0x%x data %llx\n",
2334 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n",
2341 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
2345 * Reads an msr value (of 'msr_index') into 'pdata'.
2346 * Returns 0 on success, non-0 otherwise.
2347 * Assumes vcpu_load() was already called.
2349 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
2351 return kvm_x86_ops
->get_msr(vcpu
, msr_index
, pdata
);
2353 EXPORT_SYMBOL_GPL(kvm_get_msr
);
2355 static int get_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2357 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
2359 if (!msr_mtrr_valid(msr
))
2362 if (msr
== MSR_MTRRdefType
)
2363 *pdata
= vcpu
->arch
.mtrr_state
.def_type
+
2364 (vcpu
->arch
.mtrr_state
.enabled
<< 10);
2365 else if (msr
== MSR_MTRRfix64K_00000
)
2367 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
2368 *pdata
= p
[1 + msr
- MSR_MTRRfix16K_80000
];
2369 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
2370 *pdata
= p
[3 + msr
- MSR_MTRRfix4K_C0000
];
2371 else if (msr
== MSR_IA32_CR_PAT
)
2372 *pdata
= vcpu
->arch
.pat
;
2373 else { /* Variable MTRRs */
2374 int idx
, is_mtrr_mask
;
2377 idx
= (msr
- 0x200) / 2;
2378 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
2381 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
2384 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
2391 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2394 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2395 unsigned bank_num
= mcg_cap
& 0xff;
2398 case MSR_IA32_P5_MC_ADDR
:
2399 case MSR_IA32_P5_MC_TYPE
:
2402 case MSR_IA32_MCG_CAP
:
2403 data
= vcpu
->arch
.mcg_cap
;
2405 case MSR_IA32_MCG_CTL
:
2406 if (!(mcg_cap
& MCG_CTL_P
))
2408 data
= vcpu
->arch
.mcg_ctl
;
2410 case MSR_IA32_MCG_STATUS
:
2411 data
= vcpu
->arch
.mcg_status
;
2414 if (msr
>= MSR_IA32_MC0_CTL
&&
2415 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2416 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2417 data
= vcpu
->arch
.mce_banks
[offset
];
2426 static int get_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2429 struct kvm
*kvm
= vcpu
->kvm
;
2432 case HV_X64_MSR_GUEST_OS_ID
:
2433 data
= kvm
->arch
.hv_guest_os_id
;
2435 case HV_X64_MSR_HYPERCALL
:
2436 data
= kvm
->arch
.hv_hypercall
;
2438 case HV_X64_MSR_TIME_REF_COUNT
: {
2440 div_u64(get_kernel_ns() + kvm
->arch
.kvmclock_offset
, 100);
2443 case HV_X64_MSR_REFERENCE_TSC
:
2444 data
= kvm
->arch
.hv_tsc_page
;
2447 vcpu_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
2455 static int get_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2460 case HV_X64_MSR_VP_INDEX
: {
2463 kvm_for_each_vcpu(r
, v
, vcpu
->kvm
) {
2471 case HV_X64_MSR_EOI
:
2472 return kvm_hv_vapic_msr_read(vcpu
, APIC_EOI
, pdata
);
2473 case HV_X64_MSR_ICR
:
2474 return kvm_hv_vapic_msr_read(vcpu
, APIC_ICR
, pdata
);
2475 case HV_X64_MSR_TPR
:
2476 return kvm_hv_vapic_msr_read(vcpu
, APIC_TASKPRI
, pdata
);
2477 case HV_X64_MSR_APIC_ASSIST_PAGE
:
2478 data
= vcpu
->arch
.hv_vapic
;
2481 vcpu_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
2488 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2493 case MSR_IA32_PLATFORM_ID
:
2494 case MSR_IA32_EBL_CR_POWERON
:
2495 case MSR_IA32_DEBUGCTLMSR
:
2496 case MSR_IA32_LASTBRANCHFROMIP
:
2497 case MSR_IA32_LASTBRANCHTOIP
:
2498 case MSR_IA32_LASTINTFROMIP
:
2499 case MSR_IA32_LASTINTTOIP
:
2502 case MSR_VM_HSAVE_PA
:
2503 case MSR_K7_EVNTSEL0
:
2504 case MSR_K7_EVNTSEL1
:
2505 case MSR_K7_EVNTSEL2
:
2506 case MSR_K7_EVNTSEL3
:
2507 case MSR_K7_PERFCTR0
:
2508 case MSR_K7_PERFCTR1
:
2509 case MSR_K7_PERFCTR2
:
2510 case MSR_K7_PERFCTR3
:
2511 case MSR_K8_INT_PENDING_MSG
:
2512 case MSR_AMD64_NB_CFG
:
2513 case MSR_FAM10H_MMIO_CONF_BASE
:
2514 case MSR_AMD64_BU_CFG2
:
2517 case MSR_P6_PERFCTR0
:
2518 case MSR_P6_PERFCTR1
:
2519 case MSR_P6_EVNTSEL0
:
2520 case MSR_P6_EVNTSEL1
:
2521 if (kvm_pmu_msr(vcpu
, msr
))
2522 return kvm_pmu_get_msr(vcpu
, msr
, pdata
);
2525 case MSR_IA32_UCODE_REV
:
2526 data
= 0x100000000ULL
;
2529 data
= 0x500 | KVM_NR_VAR_MTRR
;
2531 case 0x200 ... 0x2ff:
2532 return get_msr_mtrr(vcpu
, msr
, pdata
);
2533 case 0xcd: /* fsb frequency */
2537 * MSR_EBC_FREQUENCY_ID
2538 * Conservative value valid for even the basic CPU models.
2539 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2540 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2541 * and 266MHz for model 3, or 4. Set Core Clock
2542 * Frequency to System Bus Frequency Ratio to 1 (bits
2543 * 31:24) even though these are only valid for CPU
2544 * models > 2, however guests may end up dividing or
2545 * multiplying by zero otherwise.
2547 case MSR_EBC_FREQUENCY_ID
:
2550 case MSR_IA32_APICBASE
:
2551 data
= kvm_get_apic_base(vcpu
);
2553 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2554 return kvm_x2apic_msr_read(vcpu
, msr
, pdata
);
2556 case MSR_IA32_TSCDEADLINE
:
2557 data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
2559 case MSR_IA32_TSC_ADJUST
:
2560 data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
2562 case MSR_IA32_MISC_ENABLE
:
2563 data
= vcpu
->arch
.ia32_misc_enable_msr
;
2565 case MSR_IA32_PERF_STATUS
:
2566 /* TSC increment by tick */
2568 /* CPU multiplier */
2569 data
|= (((uint64_t)4ULL) << 40);
2572 data
= vcpu
->arch
.efer
;
2574 case MSR_KVM_WALL_CLOCK
:
2575 case MSR_KVM_WALL_CLOCK_NEW
:
2576 data
= vcpu
->kvm
->arch
.wall_clock
;
2578 case MSR_KVM_SYSTEM_TIME
:
2579 case MSR_KVM_SYSTEM_TIME_NEW
:
2580 data
= vcpu
->arch
.time
;
2582 case MSR_KVM_ASYNC_PF_EN
:
2583 data
= vcpu
->arch
.apf
.msr_val
;
2585 case MSR_KVM_STEAL_TIME
:
2586 data
= vcpu
->arch
.st
.msr_val
;
2588 case MSR_KVM_PV_EOI_EN
:
2589 data
= vcpu
->arch
.pv_eoi
.msr_val
;
2591 case MSR_IA32_P5_MC_ADDR
:
2592 case MSR_IA32_P5_MC_TYPE
:
2593 case MSR_IA32_MCG_CAP
:
2594 case MSR_IA32_MCG_CTL
:
2595 case MSR_IA32_MCG_STATUS
:
2596 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2597 return get_msr_mce(vcpu
, msr
, pdata
);
2598 case MSR_K7_CLK_CTL
:
2600 * Provide expected ramp-up count for K7. All other
2601 * are set to zero, indicating minimum divisors for
2604 * This prevents guest kernels on AMD host with CPU
2605 * type 6, model 8 and higher from exploding due to
2606 * the rdmsr failing.
2610 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2611 if (kvm_hv_msr_partition_wide(msr
)) {
2613 mutex_lock(&vcpu
->kvm
->lock
);
2614 r
= get_msr_hyperv_pw(vcpu
, msr
, pdata
);
2615 mutex_unlock(&vcpu
->kvm
->lock
);
2618 return get_msr_hyperv(vcpu
, msr
, pdata
);
2620 case MSR_IA32_BBL_CR_CTL3
:
2621 /* This legacy MSR exists but isn't fully documented in current
2622 * silicon. It is however accessed by winxp in very narrow
2623 * scenarios where it sets bit #19, itself documented as
2624 * a "reserved" bit. Best effort attempt to source coherent
2625 * read data here should the balance of the register be
2626 * interpreted by the guest:
2628 * L2 cache control register 3: 64GB range, 256KB size,
2629 * enabled, latency 0x1, configured
2633 case MSR_AMD64_OSVW_ID_LENGTH
:
2634 if (!guest_cpuid_has_osvw(vcpu
))
2636 data
= vcpu
->arch
.osvw
.length
;
2638 case MSR_AMD64_OSVW_STATUS
:
2639 if (!guest_cpuid_has_osvw(vcpu
))
2641 data
= vcpu
->arch
.osvw
.status
;
2644 if (kvm_pmu_msr(vcpu
, msr
))
2645 return kvm_pmu_get_msr(vcpu
, msr
, pdata
);
2647 vcpu_unimpl(vcpu
, "unhandled rdmsr: 0x%x\n", msr
);
2650 vcpu_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr
);
2658 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
2661 * Read or write a bunch of msrs. All parameters are kernel addresses.
2663 * @return number of msrs set successfully.
2665 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
2666 struct kvm_msr_entry
*entries
,
2667 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2668 unsigned index
, u64
*data
))
2672 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2673 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
2674 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
2676 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2682 * Read or write a bunch of msrs. Parameters are user addresses.
2684 * @return number of msrs set successfully.
2686 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
2687 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2688 unsigned index
, u64
*data
),
2691 struct kvm_msrs msrs
;
2692 struct kvm_msr_entry
*entries
;
2697 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
2701 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
2704 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
2705 entries
= memdup_user(user_msrs
->entries
, size
);
2706 if (IS_ERR(entries
)) {
2707 r
= PTR_ERR(entries
);
2711 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
2716 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
2727 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
2732 case KVM_CAP_IRQCHIP
:
2734 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
2735 case KVM_CAP_SET_TSS_ADDR
:
2736 case KVM_CAP_EXT_CPUID
:
2737 case KVM_CAP_EXT_EMUL_CPUID
:
2738 case KVM_CAP_CLOCKSOURCE
:
2740 case KVM_CAP_NOP_IO_DELAY
:
2741 case KVM_CAP_MP_STATE
:
2742 case KVM_CAP_SYNC_MMU
:
2743 case KVM_CAP_USER_NMI
:
2744 case KVM_CAP_REINJECT_CONTROL
:
2745 case KVM_CAP_IRQ_INJECT_STATUS
:
2747 case KVM_CAP_IOEVENTFD
:
2748 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
2750 case KVM_CAP_PIT_STATE2
:
2751 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
2752 case KVM_CAP_XEN_HVM
:
2753 case KVM_CAP_ADJUST_CLOCK
:
2754 case KVM_CAP_VCPU_EVENTS
:
2755 case KVM_CAP_HYPERV
:
2756 case KVM_CAP_HYPERV_VAPIC
:
2757 case KVM_CAP_HYPERV_SPIN
:
2758 case KVM_CAP_PCI_SEGMENT
:
2759 case KVM_CAP_DEBUGREGS
:
2760 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
2762 case KVM_CAP_ASYNC_PF
:
2763 case KVM_CAP_GET_TSC_KHZ
:
2764 case KVM_CAP_KVMCLOCK_CTRL
:
2765 case KVM_CAP_READONLY_MEM
:
2766 case KVM_CAP_HYPERV_TIME
:
2767 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
2768 case KVM_CAP_TSC_DEADLINE_TIMER
:
2769 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2770 case KVM_CAP_ASSIGN_DEV_IRQ
:
2771 case KVM_CAP_PCI_2_3
:
2775 case KVM_CAP_COALESCED_MMIO
:
2776 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
2779 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
2781 case KVM_CAP_NR_VCPUS
:
2782 r
= KVM_SOFT_MAX_VCPUS
;
2784 case KVM_CAP_MAX_VCPUS
:
2787 case KVM_CAP_NR_MEMSLOTS
:
2788 r
= KVM_USER_MEM_SLOTS
;
2790 case KVM_CAP_PV_MMU
: /* obsolete */
2793 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2795 r
= iommu_present(&pci_bus_type
);
2799 r
= KVM_MAX_MCE_BANKS
;
2804 case KVM_CAP_TSC_CONTROL
:
2805 r
= kvm_has_tsc_control
;
2815 long kvm_arch_dev_ioctl(struct file
*filp
,
2816 unsigned int ioctl
, unsigned long arg
)
2818 void __user
*argp
= (void __user
*)arg
;
2822 case KVM_GET_MSR_INDEX_LIST
: {
2823 struct kvm_msr_list __user
*user_msr_list
= argp
;
2824 struct kvm_msr_list msr_list
;
2828 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2831 msr_list
.nmsrs
= num_msrs_to_save
+ ARRAY_SIZE(emulated_msrs
);
2832 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2835 if (n
< msr_list
.nmsrs
)
2838 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2839 num_msrs_to_save
* sizeof(u32
)))
2841 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2843 ARRAY_SIZE(emulated_msrs
) * sizeof(u32
)))
2848 case KVM_GET_SUPPORTED_CPUID
:
2849 case KVM_GET_EMULATED_CPUID
: {
2850 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2851 struct kvm_cpuid2 cpuid
;
2854 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2857 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
2863 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2868 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2871 mce_cap
= KVM_MCE_CAP_SUPPORTED
;
2873 if (copy_to_user(argp
, &mce_cap
, sizeof mce_cap
))
2885 static void wbinvd_ipi(void *garbage
)
2890 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2892 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
2895 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2897 /* Address WBINVD may be executed by guest */
2898 if (need_emulate_wbinvd(vcpu
)) {
2899 if (kvm_x86_ops
->has_wbinvd_exit())
2900 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2901 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2902 smp_call_function_single(vcpu
->cpu
,
2903 wbinvd_ipi
, NULL
, 1);
2906 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2908 /* Apply any externally detected TSC adjustments (due to suspend) */
2909 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
2910 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
2911 vcpu
->arch
.tsc_offset_adjustment
= 0;
2912 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2915 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2916 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
2917 native_read_tsc() - vcpu
->arch
.last_host_tsc
;
2919 mark_tsc_unstable("KVM discovered backwards TSC");
2920 if (check_tsc_unstable()) {
2921 u64 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
,
2922 vcpu
->arch
.last_guest_tsc
);
2923 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
2924 vcpu
->arch
.tsc_catchup
= 1;
2927 * On a host with synchronized TSC, there is no need to update
2928 * kvmclock on vcpu->cpu migration
2930 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
2931 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2932 if (vcpu
->cpu
!= cpu
)
2933 kvm_migrate_timers(vcpu
);
2937 accumulate_steal_time(vcpu
);
2938 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2941 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
2943 kvm_x86_ops
->vcpu_put(vcpu
);
2944 kvm_put_guest_fpu(vcpu
);
2945 vcpu
->arch
.last_host_tsc
= native_read_tsc();
2948 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
2949 struct kvm_lapic_state
*s
)
2951 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
2952 memcpy(s
->regs
, vcpu
->arch
.apic
->regs
, sizeof *s
);
2957 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
2958 struct kvm_lapic_state
*s
)
2960 kvm_apic_post_state_restore(vcpu
, s
);
2961 update_cr8_intercept(vcpu
);
2966 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
2967 struct kvm_interrupt
*irq
)
2969 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
2971 if (irqchip_in_kernel(vcpu
->kvm
))
2974 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
2975 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2980 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
2982 kvm_inject_nmi(vcpu
);
2987 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
2988 struct kvm_tpr_access_ctl
*tac
)
2992 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
2996 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
3000 unsigned bank_num
= mcg_cap
& 0xff, bank
;
3003 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
3005 if (mcg_cap
& ~(KVM_MCE_CAP_SUPPORTED
| 0xff | 0xff0000))
3008 vcpu
->arch
.mcg_cap
= mcg_cap
;
3009 /* Init IA32_MCG_CTL to all 1s */
3010 if (mcg_cap
& MCG_CTL_P
)
3011 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
3012 /* Init IA32_MCi_CTL to all 1s */
3013 for (bank
= 0; bank
< bank_num
; bank
++)
3014 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
3019 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
3020 struct kvm_x86_mce
*mce
)
3022 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
3023 unsigned bank_num
= mcg_cap
& 0xff;
3024 u64
*banks
= vcpu
->arch
.mce_banks
;
3026 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
3029 * if IA32_MCG_CTL is not all 1s, the uncorrected error
3030 * reporting is disabled
3032 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
3033 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
3035 banks
+= 4 * mce
->bank
;
3037 * if IA32_MCi_CTL is not all 1s, the uncorrected error
3038 * reporting is disabled for the bank
3040 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
3042 if (mce
->status
& MCI_STATUS_UC
) {
3043 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
3044 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
3045 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
3048 if (banks
[1] & MCI_STATUS_VAL
)
3049 mce
->status
|= MCI_STATUS_OVER
;
3050 banks
[2] = mce
->addr
;
3051 banks
[3] = mce
->misc
;
3052 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
3053 banks
[1] = mce
->status
;
3054 kvm_queue_exception(vcpu
, MC_VECTOR
);
3055 } else if (!(banks
[1] & MCI_STATUS_VAL
)
3056 || !(banks
[1] & MCI_STATUS_UC
)) {
3057 if (banks
[1] & MCI_STATUS_VAL
)
3058 mce
->status
|= MCI_STATUS_OVER
;
3059 banks
[2] = mce
->addr
;
3060 banks
[3] = mce
->misc
;
3061 banks
[1] = mce
->status
;
3063 banks
[1] |= MCI_STATUS_OVER
;
3067 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
3068 struct kvm_vcpu_events
*events
)
3071 events
->exception
.injected
=
3072 vcpu
->arch
.exception
.pending
&&
3073 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
3074 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
3075 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
3076 events
->exception
.pad
= 0;
3077 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
3079 events
->interrupt
.injected
=
3080 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
3081 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
3082 events
->interrupt
.soft
= 0;
3083 events
->interrupt
.shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
3085 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
3086 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
3087 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
3088 events
->nmi
.pad
= 0;
3090 events
->sipi_vector
= 0; /* never valid when reporting to user space */
3092 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
3093 | KVM_VCPUEVENT_VALID_SHADOW
);
3094 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
3097 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
3098 struct kvm_vcpu_events
*events
)
3100 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3101 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3102 | KVM_VCPUEVENT_VALID_SHADOW
))
3106 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
3107 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
3108 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
3109 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
3111 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
3112 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
3113 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
3114 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
3115 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
3116 events
->interrupt
.shadow
);
3118 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
3119 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
3120 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
3121 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
3123 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
3124 kvm_vcpu_has_lapic(vcpu
))
3125 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
3127 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3132 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
3133 struct kvm_debugregs
*dbgregs
)
3137 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
3138 kvm_get_dr(vcpu
, 6, &val
);
3140 dbgregs
->dr7
= vcpu
->arch
.dr7
;
3142 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
3145 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
3146 struct kvm_debugregs
*dbgregs
)
3151 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
3152 vcpu
->arch
.dr6
= dbgregs
->dr6
;
3153 kvm_update_dr6(vcpu
);
3154 vcpu
->arch
.dr7
= dbgregs
->dr7
;
3155 kvm_update_dr7(vcpu
);
3160 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3162 static void fill_xsave(u8
*dest
, struct kvm_vcpu
*vcpu
)
3164 struct xsave_struct
*xsave
= &vcpu
->arch
.guest_fpu
.state
->xsave
;
3165 u64 xstate_bv
= xsave
->xsave_hdr
.xstate_bv
;
3169 * Copy legacy XSAVE area, to avoid complications with CPUID
3170 * leaves 0 and 1 in the loop below.
3172 memcpy(dest
, xsave
, XSAVE_HDR_OFFSET
);
3175 *(u64
*)(dest
+ XSAVE_HDR_OFFSET
) = xstate_bv
;
3178 * Copy each region from the possibly compacted offset to the
3179 * non-compacted offset.
3181 valid
= xstate_bv
& ~XSTATE_FPSSE
;
3183 u64 feature
= valid
& -valid
;
3184 int index
= fls64(feature
) - 1;
3185 void *src
= get_xsave_addr(xsave
, feature
);
3188 u32 size
, offset
, ecx
, edx
;
3189 cpuid_count(XSTATE_CPUID
, index
,
3190 &size
, &offset
, &ecx
, &edx
);
3191 memcpy(dest
+ offset
, src
, size
);
3198 static void load_xsave(struct kvm_vcpu
*vcpu
, u8
*src
)
3200 struct xsave_struct
*xsave
= &vcpu
->arch
.guest_fpu
.state
->xsave
;
3201 u64 xstate_bv
= *(u64
*)(src
+ XSAVE_HDR_OFFSET
);
3205 * Copy legacy XSAVE area, to avoid complications with CPUID
3206 * leaves 0 and 1 in the loop below.
3208 memcpy(xsave
, src
, XSAVE_HDR_OFFSET
);
3210 /* Set XSTATE_BV and possibly XCOMP_BV. */
3211 xsave
->xsave_hdr
.xstate_bv
= xstate_bv
;
3213 xsave
->xsave_hdr
.xcomp_bv
= host_xcr0
| XSTATE_COMPACTION_ENABLED
;
3216 * Copy each region from the non-compacted offset to the
3217 * possibly compacted offset.
3219 valid
= xstate_bv
& ~XSTATE_FPSSE
;
3221 u64 feature
= valid
& -valid
;
3222 int index
= fls64(feature
) - 1;
3223 void *dest
= get_xsave_addr(xsave
, feature
);
3226 u32 size
, offset
, ecx
, edx
;
3227 cpuid_count(XSTATE_CPUID
, index
,
3228 &size
, &offset
, &ecx
, &edx
);
3229 memcpy(dest
, src
+ offset
, size
);
3237 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
3238 struct kvm_xsave
*guest_xsave
)
3240 if (cpu_has_xsave
) {
3241 memset(guest_xsave
, 0, sizeof(struct kvm_xsave
));
3242 fill_xsave((u8
*) guest_xsave
->region
, vcpu
);
3244 memcpy(guest_xsave
->region
,
3245 &vcpu
->arch
.guest_fpu
.state
->fxsave
,
3246 sizeof(struct i387_fxsave_struct
));
3247 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
3252 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
3253 struct kvm_xsave
*guest_xsave
)
3256 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
3258 if (cpu_has_xsave
) {
3260 * Here we allow setting states that are not present in
3261 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3262 * with old userspace.
3264 if (xstate_bv
& ~kvm_supported_xcr0())
3266 load_xsave(vcpu
, (u8
*)guest_xsave
->region
);
3268 if (xstate_bv
& ~XSTATE_FPSSE
)
3270 memcpy(&vcpu
->arch
.guest_fpu
.state
->fxsave
,
3271 guest_xsave
->region
, sizeof(struct i387_fxsave_struct
));
3276 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
3277 struct kvm_xcrs
*guest_xcrs
)
3279 if (!cpu_has_xsave
) {
3280 guest_xcrs
->nr_xcrs
= 0;
3284 guest_xcrs
->nr_xcrs
= 1;
3285 guest_xcrs
->flags
= 0;
3286 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
3287 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
3290 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
3291 struct kvm_xcrs
*guest_xcrs
)
3298 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
3301 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
3302 /* Only support XCR0 currently */
3303 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
3304 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
3305 guest_xcrs
->xcrs
[i
].value
);
3314 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3315 * stopped by the hypervisor. This function will be called from the host only.
3316 * EINVAL is returned when the host attempts to set the flag for a guest that
3317 * does not support pv clocks.
3319 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
3321 if (!vcpu
->arch
.pv_time_enabled
)
3323 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
3324 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3328 long kvm_arch_vcpu_ioctl(struct file
*filp
,
3329 unsigned int ioctl
, unsigned long arg
)
3331 struct kvm_vcpu
*vcpu
= filp
->private_data
;
3332 void __user
*argp
= (void __user
*)arg
;
3335 struct kvm_lapic_state
*lapic
;
3336 struct kvm_xsave
*xsave
;
3337 struct kvm_xcrs
*xcrs
;
3343 case KVM_GET_LAPIC
: {
3345 if (!vcpu
->arch
.apic
)
3347 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
3352 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
3356 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
3361 case KVM_SET_LAPIC
: {
3363 if (!vcpu
->arch
.apic
)
3365 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
3366 if (IS_ERR(u
.lapic
))
3367 return PTR_ERR(u
.lapic
);
3369 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
3372 case KVM_INTERRUPT
: {
3373 struct kvm_interrupt irq
;
3376 if (copy_from_user(&irq
, argp
, sizeof irq
))
3378 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
3382 r
= kvm_vcpu_ioctl_nmi(vcpu
);
3385 case KVM_SET_CPUID
: {
3386 struct kvm_cpuid __user
*cpuid_arg
= argp
;
3387 struct kvm_cpuid cpuid
;
3390 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3392 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
3395 case KVM_SET_CPUID2
: {
3396 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3397 struct kvm_cpuid2 cpuid
;
3400 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3402 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
3403 cpuid_arg
->entries
);
3406 case KVM_GET_CPUID2
: {
3407 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3408 struct kvm_cpuid2 cpuid
;
3411 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3413 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
3414 cpuid_arg
->entries
);
3418 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
3424 r
= msr_io(vcpu
, argp
, kvm_get_msr
, 1);
3427 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
3429 case KVM_TPR_ACCESS_REPORTING
: {
3430 struct kvm_tpr_access_ctl tac
;
3433 if (copy_from_user(&tac
, argp
, sizeof tac
))
3435 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
3439 if (copy_to_user(argp
, &tac
, sizeof tac
))
3444 case KVM_SET_VAPIC_ADDR
: {
3445 struct kvm_vapic_addr va
;
3448 if (!irqchip_in_kernel(vcpu
->kvm
))
3451 if (copy_from_user(&va
, argp
, sizeof va
))
3453 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
3456 case KVM_X86_SETUP_MCE
: {
3460 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
3462 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
3465 case KVM_X86_SET_MCE
: {
3466 struct kvm_x86_mce mce
;
3469 if (copy_from_user(&mce
, argp
, sizeof mce
))
3471 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
3474 case KVM_GET_VCPU_EVENTS
: {
3475 struct kvm_vcpu_events events
;
3477 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
3480 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
3485 case KVM_SET_VCPU_EVENTS
: {
3486 struct kvm_vcpu_events events
;
3489 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
3492 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
3495 case KVM_GET_DEBUGREGS
: {
3496 struct kvm_debugregs dbgregs
;
3498 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
3501 if (copy_to_user(argp
, &dbgregs
,
3502 sizeof(struct kvm_debugregs
)))
3507 case KVM_SET_DEBUGREGS
: {
3508 struct kvm_debugregs dbgregs
;
3511 if (copy_from_user(&dbgregs
, argp
,
3512 sizeof(struct kvm_debugregs
)))
3515 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
3518 case KVM_GET_XSAVE
: {
3519 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
3524 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
3527 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
3532 case KVM_SET_XSAVE
: {
3533 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
3534 if (IS_ERR(u
.xsave
))
3535 return PTR_ERR(u
.xsave
);
3537 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
3540 case KVM_GET_XCRS
: {
3541 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3546 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
3549 if (copy_to_user(argp
, u
.xcrs
,
3550 sizeof(struct kvm_xcrs
)))
3555 case KVM_SET_XCRS
: {
3556 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
3558 return PTR_ERR(u
.xcrs
);
3560 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
3563 case KVM_SET_TSC_KHZ
: {
3567 user_tsc_khz
= (u32
)arg
;
3569 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
3572 if (user_tsc_khz
== 0)
3573 user_tsc_khz
= tsc_khz
;
3575 kvm_set_tsc_khz(vcpu
, user_tsc_khz
);
3580 case KVM_GET_TSC_KHZ
: {
3581 r
= vcpu
->arch
.virtual_tsc_khz
;
3584 case KVM_KVMCLOCK_CTRL
: {
3585 r
= kvm_set_guest_paused(vcpu
);
3596 int kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
3598 return VM_FAULT_SIGBUS
;
3601 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
3605 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
3607 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
3611 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3614 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3618 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3619 u32 kvm_nr_mmu_pages
)
3621 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3624 mutex_lock(&kvm
->slots_lock
);
3626 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3627 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3629 mutex_unlock(&kvm
->slots_lock
);
3633 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3635 return kvm
->arch
.n_max_mmu_pages
;
3638 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3643 switch (chip
->chip_id
) {
3644 case KVM_IRQCHIP_PIC_MASTER
:
3645 memcpy(&chip
->chip
.pic
,
3646 &pic_irqchip(kvm
)->pics
[0],
3647 sizeof(struct kvm_pic_state
));
3649 case KVM_IRQCHIP_PIC_SLAVE
:
3650 memcpy(&chip
->chip
.pic
,
3651 &pic_irqchip(kvm
)->pics
[1],
3652 sizeof(struct kvm_pic_state
));
3654 case KVM_IRQCHIP_IOAPIC
:
3655 r
= kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3664 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3669 switch (chip
->chip_id
) {
3670 case KVM_IRQCHIP_PIC_MASTER
:
3671 spin_lock(&pic_irqchip(kvm
)->lock
);
3672 memcpy(&pic_irqchip(kvm
)->pics
[0],
3674 sizeof(struct kvm_pic_state
));
3675 spin_unlock(&pic_irqchip(kvm
)->lock
);
3677 case KVM_IRQCHIP_PIC_SLAVE
:
3678 spin_lock(&pic_irqchip(kvm
)->lock
);
3679 memcpy(&pic_irqchip(kvm
)->pics
[1],
3681 sizeof(struct kvm_pic_state
));
3682 spin_unlock(&pic_irqchip(kvm
)->lock
);
3684 case KVM_IRQCHIP_IOAPIC
:
3685 r
= kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3691 kvm_pic_update_irq(pic_irqchip(kvm
));
3695 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3699 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3700 memcpy(ps
, &kvm
->arch
.vpit
->pit_state
, sizeof(struct kvm_pit_state
));
3701 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3705 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3709 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3710 memcpy(&kvm
->arch
.vpit
->pit_state
, ps
, sizeof(struct kvm_pit_state
));
3711 kvm_pit_load_count(kvm
, 0, ps
->channels
[0].count
, 0);
3712 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3716 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3720 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3721 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3722 sizeof(ps
->channels
));
3723 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3724 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3725 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
3729 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3731 int r
= 0, start
= 0;
3732 u32 prev_legacy
, cur_legacy
;
3733 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3734 prev_legacy
= kvm
->arch
.vpit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3735 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3736 if (!prev_legacy
&& cur_legacy
)
3738 memcpy(&kvm
->arch
.vpit
->pit_state
.channels
, &ps
->channels
,
3739 sizeof(kvm
->arch
.vpit
->pit_state
.channels
));
3740 kvm
->arch
.vpit
->pit_state
.flags
= ps
->flags
;
3741 kvm_pit_load_count(kvm
, 0, kvm
->arch
.vpit
->pit_state
.channels
[0].count
, start
);
3742 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3746 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
3747 struct kvm_reinject_control
*control
)
3749 if (!kvm
->arch
.vpit
)
3751 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3752 kvm
->arch
.vpit
->pit_state
.reinject
= control
->pit_reinject
;
3753 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3758 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3759 * @kvm: kvm instance
3760 * @log: slot id and address to which we copy the log
3762 * Steps 1-4 below provide general overview of dirty page logging. See
3763 * kvm_get_dirty_log_protect() function description for additional details.
3765 * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3766 * always flush the TLB (step 4) even if previous step failed and the dirty
3767 * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3768 * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3769 * writes will be marked dirty for next log read.
3771 * 1. Take a snapshot of the bit and clear it if needed.
3772 * 2. Write protect the corresponding page.
3773 * 3. Copy the snapshot to the userspace.
3774 * 4. Flush TLB's if needed.
3776 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
, struct kvm_dirty_log
*log
)
3778 bool is_dirty
= false;
3781 mutex_lock(&kvm
->slots_lock
);
3783 r
= kvm_get_dirty_log_protect(kvm
, log
, &is_dirty
);
3786 * All the TLBs can be flushed out of mmu lock, see the comments in
3787 * kvm_mmu_slot_remove_write_access().
3789 lockdep_assert_held(&kvm
->slots_lock
);
3791 kvm_flush_remote_tlbs(kvm
);
3793 mutex_unlock(&kvm
->slots_lock
);
3797 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
3800 if (!irqchip_in_kernel(kvm
))
3803 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
3804 irq_event
->irq
, irq_event
->level
,
3809 long kvm_arch_vm_ioctl(struct file
*filp
,
3810 unsigned int ioctl
, unsigned long arg
)
3812 struct kvm
*kvm
= filp
->private_data
;
3813 void __user
*argp
= (void __user
*)arg
;
3816 * This union makes it completely explicit to gcc-3.x
3817 * that these two variables' stack usage should be
3818 * combined, not added together.
3821 struct kvm_pit_state ps
;
3822 struct kvm_pit_state2 ps2
;
3823 struct kvm_pit_config pit_config
;
3827 case KVM_SET_TSS_ADDR
:
3828 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
3830 case KVM_SET_IDENTITY_MAP_ADDR
: {
3834 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
3836 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
3839 case KVM_SET_NR_MMU_PAGES
:
3840 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
3842 case KVM_GET_NR_MMU_PAGES
:
3843 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
3845 case KVM_CREATE_IRQCHIP
: {
3846 struct kvm_pic
*vpic
;
3848 mutex_lock(&kvm
->lock
);
3851 goto create_irqchip_unlock
;
3853 if (atomic_read(&kvm
->online_vcpus
))
3854 goto create_irqchip_unlock
;
3856 vpic
= kvm_create_pic(kvm
);
3858 r
= kvm_ioapic_init(kvm
);
3860 mutex_lock(&kvm
->slots_lock
);
3861 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3863 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3865 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3867 mutex_unlock(&kvm
->slots_lock
);
3869 goto create_irqchip_unlock
;
3872 goto create_irqchip_unlock
;
3874 kvm
->arch
.vpic
= vpic
;
3876 r
= kvm_setup_default_irq_routing(kvm
);
3878 mutex_lock(&kvm
->slots_lock
);
3879 mutex_lock(&kvm
->irq_lock
);
3880 kvm_ioapic_destroy(kvm
);
3881 kvm_destroy_pic(kvm
);
3882 mutex_unlock(&kvm
->irq_lock
);
3883 mutex_unlock(&kvm
->slots_lock
);
3885 create_irqchip_unlock
:
3886 mutex_unlock(&kvm
->lock
);
3889 case KVM_CREATE_PIT
:
3890 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
3892 case KVM_CREATE_PIT2
:
3894 if (copy_from_user(&u
.pit_config
, argp
,
3895 sizeof(struct kvm_pit_config
)))
3898 mutex_lock(&kvm
->slots_lock
);
3901 goto create_pit_unlock
;
3903 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
3907 mutex_unlock(&kvm
->slots_lock
);
3909 case KVM_GET_IRQCHIP
: {
3910 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3911 struct kvm_irqchip
*chip
;
3913 chip
= memdup_user(argp
, sizeof(*chip
));
3920 if (!irqchip_in_kernel(kvm
))
3921 goto get_irqchip_out
;
3922 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
3924 goto get_irqchip_out
;
3926 if (copy_to_user(argp
, chip
, sizeof *chip
))
3927 goto get_irqchip_out
;
3933 case KVM_SET_IRQCHIP
: {
3934 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3935 struct kvm_irqchip
*chip
;
3937 chip
= memdup_user(argp
, sizeof(*chip
));
3944 if (!irqchip_in_kernel(kvm
))
3945 goto set_irqchip_out
;
3946 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
3948 goto set_irqchip_out
;
3956 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
3959 if (!kvm
->arch
.vpit
)
3961 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
3965 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
3972 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
3975 if (!kvm
->arch
.vpit
)
3977 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
3980 case KVM_GET_PIT2
: {
3982 if (!kvm
->arch
.vpit
)
3984 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
3988 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
3993 case KVM_SET_PIT2
: {
3995 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
3998 if (!kvm
->arch
.vpit
)
4000 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
4003 case KVM_REINJECT_CONTROL
: {
4004 struct kvm_reinject_control control
;
4006 if (copy_from_user(&control
, argp
, sizeof(control
)))
4008 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
4011 case KVM_XEN_HVM_CONFIG
: {
4013 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
4014 sizeof(struct kvm_xen_hvm_config
)))
4017 if (kvm
->arch
.xen_hvm_config
.flags
)
4022 case KVM_SET_CLOCK
: {
4023 struct kvm_clock_data user_ns
;
4028 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
4036 local_irq_disable();
4037 now_ns
= get_kernel_ns();
4038 delta
= user_ns
.clock
- now_ns
;
4040 kvm
->arch
.kvmclock_offset
= delta
;
4041 kvm_gen_update_masterclock(kvm
);
4044 case KVM_GET_CLOCK
: {
4045 struct kvm_clock_data user_ns
;
4048 local_irq_disable();
4049 now_ns
= get_kernel_ns();
4050 user_ns
.clock
= kvm
->arch
.kvmclock_offset
+ now_ns
;
4053 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
4056 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
4063 r
= kvm_vm_ioctl_assigned_device(kvm
, ioctl
, arg
);
4069 static void kvm_init_msr_list(void)
4074 /* skip the first msrs in the list. KVM-specific */
4075 for (i
= j
= KVM_SAVE_MSRS_BEGIN
; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
4076 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
4080 * Even MSRs that are valid in the host may not be exposed
4081 * to the guests in some cases. We could work around this
4082 * in VMX with the generic MSR save/load machinery, but it
4083 * is not really worthwhile since it will really only
4084 * happen with nested virtualization.
4086 switch (msrs_to_save
[i
]) {
4087 case MSR_IA32_BNDCFGS
:
4088 if (!kvm_x86_ops
->mpx_supported())
4096 msrs_to_save
[j
] = msrs_to_save
[i
];
4099 num_msrs_to_save
= j
;
4102 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
4110 if (!(vcpu
->arch
.apic
&&
4111 !kvm_iodevice_write(&vcpu
->arch
.apic
->dev
, addr
, n
, v
))
4112 && kvm_io_bus_write(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, n
, v
))
4123 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
4130 if (!(vcpu
->arch
.apic
&&
4131 !kvm_iodevice_read(&vcpu
->arch
.apic
->dev
, addr
, n
, v
))
4132 && kvm_io_bus_read(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, n
, v
))
4134 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, *(u64
*)v
);
4144 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
4145 struct kvm_segment
*var
, int seg
)
4147 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
4150 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
4151 struct kvm_segment
*var
, int seg
)
4153 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
4156 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
,
4157 struct x86_exception
*exception
)
4161 BUG_ON(!mmu_is_nested(vcpu
));
4163 /* NPT walks are always user-walks */
4164 access
|= PFERR_USER_MASK
;
4165 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, exception
);
4170 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
4171 struct x86_exception
*exception
)
4173 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4174 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4177 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
4178 struct x86_exception
*exception
)
4180 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4181 access
|= PFERR_FETCH_MASK
;
4182 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4185 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
4186 struct x86_exception
*exception
)
4188 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4189 access
|= PFERR_WRITE_MASK
;
4190 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4193 /* uses this to access any guest's mapped memory without checking CPL */
4194 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
4195 struct x86_exception
*exception
)
4197 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
4200 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
4201 struct kvm_vcpu
*vcpu
, u32 access
,
4202 struct x86_exception
*exception
)
4205 int r
= X86EMUL_CONTINUE
;
4208 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
4210 unsigned offset
= addr
& (PAGE_SIZE
-1);
4211 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4214 if (gpa
== UNMAPPED_GVA
)
4215 return X86EMUL_PROPAGATE_FAULT
;
4216 ret
= kvm_read_guest_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
, data
,
4219 r
= X86EMUL_IO_NEEDED
;
4231 /* used for instruction fetching */
4232 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4233 gva_t addr
, void *val
, unsigned int bytes
,
4234 struct x86_exception
*exception
)
4236 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4237 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4241 /* Inline kvm_read_guest_virt_helper for speed. */
4242 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
|PFERR_FETCH_MASK
,
4244 if (unlikely(gpa
== UNMAPPED_GVA
))
4245 return X86EMUL_PROPAGATE_FAULT
;
4247 offset
= addr
& (PAGE_SIZE
-1);
4248 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
4249 bytes
= (unsigned)PAGE_SIZE
- offset
;
4250 ret
= kvm_read_guest_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
, val
,
4252 if (unlikely(ret
< 0))
4253 return X86EMUL_IO_NEEDED
;
4255 return X86EMUL_CONTINUE
;
4258 int kvm_read_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4259 gva_t addr
, void *val
, unsigned int bytes
,
4260 struct x86_exception
*exception
)
4262 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4263 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4265 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
4268 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
4270 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4271 gva_t addr
, void *val
, unsigned int bytes
,
4272 struct x86_exception
*exception
)
4274 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4275 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, exception
);
4278 int kvm_write_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4279 gva_t addr
, void *val
,
4281 struct x86_exception
*exception
)
4283 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4285 int r
= X86EMUL_CONTINUE
;
4288 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
4291 unsigned offset
= addr
& (PAGE_SIZE
-1);
4292 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4295 if (gpa
== UNMAPPED_GVA
)
4296 return X86EMUL_PROPAGATE_FAULT
;
4297 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, data
, towrite
);
4299 r
= X86EMUL_IO_NEEDED
;
4310 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
4312 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4313 gpa_t
*gpa
, struct x86_exception
*exception
,
4316 u32 access
= ((kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
4317 | (write
? PFERR_WRITE_MASK
: 0);
4319 if (vcpu_match_mmio_gva(vcpu
, gva
)
4320 && !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
4321 vcpu
->arch
.access
, access
)) {
4322 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
4323 (gva
& (PAGE_SIZE
- 1));
4324 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
4328 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4330 if (*gpa
== UNMAPPED_GVA
)
4333 /* For APIC access vmexit */
4334 if ((*gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4337 if (vcpu_match_mmio_gpa(vcpu
, *gpa
)) {
4338 trace_vcpu_match_mmio(gva
, *gpa
, write
, true);
4345 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4346 const void *val
, int bytes
)
4350 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, val
, bytes
);
4353 kvm_mmu_pte_write(vcpu
, gpa
, val
, bytes
);
4357 struct read_write_emulator_ops
{
4358 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
4360 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4361 void *val
, int bytes
);
4362 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4363 int bytes
, void *val
);
4364 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4365 void *val
, int bytes
);
4369 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
4371 if (vcpu
->mmio_read_completed
) {
4372 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
4373 vcpu
->mmio_fragments
[0].gpa
, *(u64
*)val
);
4374 vcpu
->mmio_read_completed
= 0;
4381 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4382 void *val
, int bytes
)
4384 return !kvm_read_guest(vcpu
->kvm
, gpa
, val
, bytes
);
4387 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4388 void *val
, int bytes
)
4390 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
4393 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
4395 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
4396 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
4399 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4400 void *val
, int bytes
)
4402 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
4403 return X86EMUL_IO_NEEDED
;
4406 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4407 void *val
, int bytes
)
4409 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
4411 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
4412 return X86EMUL_CONTINUE
;
4415 static const struct read_write_emulator_ops read_emultor
= {
4416 .read_write_prepare
= read_prepare
,
4417 .read_write_emulate
= read_emulate
,
4418 .read_write_mmio
= vcpu_mmio_read
,
4419 .read_write_exit_mmio
= read_exit_mmio
,
4422 static const struct read_write_emulator_ops write_emultor
= {
4423 .read_write_emulate
= write_emulate
,
4424 .read_write_mmio
= write_mmio
,
4425 .read_write_exit_mmio
= write_exit_mmio
,
4429 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
4431 struct x86_exception
*exception
,
4432 struct kvm_vcpu
*vcpu
,
4433 const struct read_write_emulator_ops
*ops
)
4437 bool write
= ops
->write
;
4438 struct kvm_mmio_fragment
*frag
;
4440 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
4443 return X86EMUL_PROPAGATE_FAULT
;
4445 /* For APIC access vmexit */
4449 if (ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
4450 return X86EMUL_CONTINUE
;
4454 * Is this MMIO handled locally?
4456 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
4457 if (handled
== bytes
)
4458 return X86EMUL_CONTINUE
;
4464 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
4465 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
4469 return X86EMUL_CONTINUE
;
4472 int emulator_read_write(struct x86_emulate_ctxt
*ctxt
, unsigned long addr
,
4473 void *val
, unsigned int bytes
,
4474 struct x86_exception
*exception
,
4475 const struct read_write_emulator_ops
*ops
)
4477 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4481 if (ops
->read_write_prepare
&&
4482 ops
->read_write_prepare(vcpu
, val
, bytes
))
4483 return X86EMUL_CONTINUE
;
4485 vcpu
->mmio_nr_fragments
= 0;
4487 /* Crossing a page boundary? */
4488 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
4491 now
= -addr
& ~PAGE_MASK
;
4492 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
4495 if (rc
!= X86EMUL_CONTINUE
)
4502 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
4504 if (rc
!= X86EMUL_CONTINUE
)
4507 if (!vcpu
->mmio_nr_fragments
)
4510 gpa
= vcpu
->mmio_fragments
[0].gpa
;
4512 vcpu
->mmio_needed
= 1;
4513 vcpu
->mmio_cur_fragment
= 0;
4515 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
4516 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
4517 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
4518 vcpu
->run
->mmio
.phys_addr
= gpa
;
4520 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
4523 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
4527 struct x86_exception
*exception
)
4529 return emulator_read_write(ctxt
, addr
, val
, bytes
,
4530 exception
, &read_emultor
);
4533 int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
4537 struct x86_exception
*exception
)
4539 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
4540 exception
, &write_emultor
);
4543 #define CMPXCHG_TYPE(t, ptr, old, new) \
4544 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4546 #ifdef CONFIG_X86_64
4547 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4549 # define CMPXCHG64(ptr, old, new) \
4550 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4553 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
4558 struct x86_exception
*exception
)
4560 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4566 /* guests cmpxchg8b have to be emulated atomically */
4567 if (bytes
> 8 || (bytes
& (bytes
- 1)))
4570 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
4572 if (gpa
== UNMAPPED_GVA
||
4573 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4576 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
4579 page
= gfn_to_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
4580 if (is_error_page(page
))
4583 kaddr
= kmap_atomic(page
);
4584 kaddr
+= offset_in_page(gpa
);
4587 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
4590 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
4593 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
4596 exchanged
= CMPXCHG64(kaddr
, old
, new);
4601 kunmap_atomic(kaddr
);
4602 kvm_release_page_dirty(page
);
4605 return X86EMUL_CMPXCHG_FAILED
;
4607 mark_page_dirty(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
4608 kvm_mmu_pte_write(vcpu
, gpa
, new, bytes
);
4610 return X86EMUL_CONTINUE
;
4613 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
4615 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
4618 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
4620 /* TODO: String I/O for in kernel device */
4623 if (vcpu
->arch
.pio
.in
)
4624 r
= kvm_io_bus_read(vcpu
->kvm
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
4625 vcpu
->arch
.pio
.size
, pd
);
4627 r
= kvm_io_bus_write(vcpu
->kvm
, KVM_PIO_BUS
,
4628 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
4633 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
4634 unsigned short port
, void *val
,
4635 unsigned int count
, bool in
)
4637 vcpu
->arch
.pio
.port
= port
;
4638 vcpu
->arch
.pio
.in
= in
;
4639 vcpu
->arch
.pio
.count
= count
;
4640 vcpu
->arch
.pio
.size
= size
;
4642 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
4643 vcpu
->arch
.pio
.count
= 0;
4647 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
4648 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
4649 vcpu
->run
->io
.size
= size
;
4650 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
4651 vcpu
->run
->io
.count
= count
;
4652 vcpu
->run
->io
.port
= port
;
4657 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
4658 int size
, unsigned short port
, void *val
,
4661 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4664 if (vcpu
->arch
.pio
.count
)
4667 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
4670 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
4671 trace_kvm_pio(KVM_PIO_IN
, port
, size
, count
, vcpu
->arch
.pio_data
);
4672 vcpu
->arch
.pio
.count
= 0;
4679 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
4680 int size
, unsigned short port
,
4681 const void *val
, unsigned int count
)
4683 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4685 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
4686 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, vcpu
->arch
.pio_data
);
4687 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
4690 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
4692 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
4695 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
4697 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
4700 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4702 if (!need_emulate_wbinvd(vcpu
))
4703 return X86EMUL_CONTINUE
;
4705 if (kvm_x86_ops
->has_wbinvd_exit()) {
4706 int cpu
= get_cpu();
4708 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4709 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
4710 wbinvd_ipi
, NULL
, 1);
4712 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
4715 return X86EMUL_CONTINUE
;
4717 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
4719 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
4721 kvm_emulate_wbinvd(emul_to_vcpu(ctxt
));
4724 int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long *dest
)
4726 return kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
4729 int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long value
)
4732 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
4735 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
4737 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
4740 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
4742 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4743 unsigned long value
;
4747 value
= kvm_read_cr0(vcpu
);
4750 value
= vcpu
->arch
.cr2
;
4753 value
= kvm_read_cr3(vcpu
);
4756 value
= kvm_read_cr4(vcpu
);
4759 value
= kvm_get_cr8(vcpu
);
4762 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4769 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
4771 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4776 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
4779 vcpu
->arch
.cr2
= val
;
4782 res
= kvm_set_cr3(vcpu
, val
);
4785 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
4788 res
= kvm_set_cr8(vcpu
, val
);
4791 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4798 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
4800 return kvm_x86_ops
->get_cpl(emul_to_vcpu(ctxt
));
4803 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4805 kvm_x86_ops
->get_gdt(emul_to_vcpu(ctxt
), dt
);
4808 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4810 kvm_x86_ops
->get_idt(emul_to_vcpu(ctxt
), dt
);
4813 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4815 kvm_x86_ops
->set_gdt(emul_to_vcpu(ctxt
), dt
);
4818 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4820 kvm_x86_ops
->set_idt(emul_to_vcpu(ctxt
), dt
);
4823 static unsigned long emulator_get_cached_segment_base(
4824 struct x86_emulate_ctxt
*ctxt
, int seg
)
4826 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
4829 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
4830 struct desc_struct
*desc
, u32
*base3
,
4833 struct kvm_segment var
;
4835 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
4836 *selector
= var
.selector
;
4839 memset(desc
, 0, sizeof(*desc
));
4845 set_desc_limit(desc
, var
.limit
);
4846 set_desc_base(desc
, (unsigned long)var
.base
);
4847 #ifdef CONFIG_X86_64
4849 *base3
= var
.base
>> 32;
4851 desc
->type
= var
.type
;
4853 desc
->dpl
= var
.dpl
;
4854 desc
->p
= var
.present
;
4855 desc
->avl
= var
.avl
;
4863 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
4864 struct desc_struct
*desc
, u32 base3
,
4867 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4868 struct kvm_segment var
;
4870 var
.selector
= selector
;
4871 var
.base
= get_desc_base(desc
);
4872 #ifdef CONFIG_X86_64
4873 var
.base
|= ((u64
)base3
) << 32;
4875 var
.limit
= get_desc_limit(desc
);
4877 var
.limit
= (var
.limit
<< 12) | 0xfff;
4878 var
.type
= desc
->type
;
4879 var
.dpl
= desc
->dpl
;
4884 var
.avl
= desc
->avl
;
4885 var
.present
= desc
->p
;
4886 var
.unusable
= !var
.present
;
4889 kvm_set_segment(vcpu
, &var
, seg
);
4893 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
4894 u32 msr_index
, u64
*pdata
)
4896 return kvm_get_msr(emul_to_vcpu(ctxt
), msr_index
, pdata
);
4899 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
4900 u32 msr_index
, u64 data
)
4902 struct msr_data msr
;
4905 msr
.index
= msr_index
;
4906 msr
.host_initiated
= false;
4907 return kvm_set_msr(emul_to_vcpu(ctxt
), &msr
);
4910 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
4913 return kvm_pmu_check_pmc(emul_to_vcpu(ctxt
), pmc
);
4916 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
4917 u32 pmc
, u64
*pdata
)
4919 return kvm_pmu_read_pmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
4922 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
4924 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
4927 static void emulator_get_fpu(struct x86_emulate_ctxt
*ctxt
)
4930 kvm_load_guest_fpu(emul_to_vcpu(ctxt
));
4932 * CR0.TS may reference the host fpu state, not the guest fpu state,
4933 * so it may be clear at this point.
4938 static void emulator_put_fpu(struct x86_emulate_ctxt
*ctxt
)
4943 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
4944 struct x86_instruction_info
*info
,
4945 enum x86_intercept_stage stage
)
4947 return kvm_x86_ops
->check_intercept(emul_to_vcpu(ctxt
), info
, stage
);
4950 static void emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
4951 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
)
4953 kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
);
4956 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
4958 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
4961 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
4963 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
4966 static const struct x86_emulate_ops emulate_ops
= {
4967 .read_gpr
= emulator_read_gpr
,
4968 .write_gpr
= emulator_write_gpr
,
4969 .read_std
= kvm_read_guest_virt_system
,
4970 .write_std
= kvm_write_guest_virt_system
,
4971 .fetch
= kvm_fetch_guest_virt
,
4972 .read_emulated
= emulator_read_emulated
,
4973 .write_emulated
= emulator_write_emulated
,
4974 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
4975 .invlpg
= emulator_invlpg
,
4976 .pio_in_emulated
= emulator_pio_in_emulated
,
4977 .pio_out_emulated
= emulator_pio_out_emulated
,
4978 .get_segment
= emulator_get_segment
,
4979 .set_segment
= emulator_set_segment
,
4980 .get_cached_segment_base
= emulator_get_cached_segment_base
,
4981 .get_gdt
= emulator_get_gdt
,
4982 .get_idt
= emulator_get_idt
,
4983 .set_gdt
= emulator_set_gdt
,
4984 .set_idt
= emulator_set_idt
,
4985 .get_cr
= emulator_get_cr
,
4986 .set_cr
= emulator_set_cr
,
4987 .cpl
= emulator_get_cpl
,
4988 .get_dr
= emulator_get_dr
,
4989 .set_dr
= emulator_set_dr
,
4990 .set_msr
= emulator_set_msr
,
4991 .get_msr
= emulator_get_msr
,
4992 .check_pmc
= emulator_check_pmc
,
4993 .read_pmc
= emulator_read_pmc
,
4994 .halt
= emulator_halt
,
4995 .wbinvd
= emulator_wbinvd
,
4996 .fix_hypercall
= emulator_fix_hypercall
,
4997 .get_fpu
= emulator_get_fpu
,
4998 .put_fpu
= emulator_put_fpu
,
4999 .intercept
= emulator_intercept
,
5000 .get_cpuid
= emulator_get_cpuid
,
5003 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
5005 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
5007 * an sti; sti; sequence only disable interrupts for the first
5008 * instruction. So, if the last instruction, be it emulated or
5009 * not, left the system with the INT_STI flag enabled, it
5010 * means that the last instruction is an sti. We should not
5011 * leave the flag on in this case. The same goes for mov ss
5013 if (int_shadow
& mask
)
5015 if (unlikely(int_shadow
|| mask
)) {
5016 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
5018 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5022 static bool inject_emulated_exception(struct kvm_vcpu
*vcpu
)
5024 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5025 if (ctxt
->exception
.vector
== PF_VECTOR
)
5026 return kvm_propagate_fault(vcpu
, &ctxt
->exception
);
5028 if (ctxt
->exception
.error_code_valid
)
5029 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
5030 ctxt
->exception
.error_code
);
5032 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
5036 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
5038 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5041 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
5043 ctxt
->eflags
= kvm_get_rflags(vcpu
);
5044 ctxt
->eip
= kvm_rip_read(vcpu
);
5045 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
5046 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
5047 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
5048 cs_db
? X86EMUL_MODE_PROT32
:
5049 X86EMUL_MODE_PROT16
;
5050 ctxt
->guest_mode
= is_guest_mode(vcpu
);
5052 init_decode_cache(ctxt
);
5053 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5056 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
5058 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5061 init_emulate_ctxt(vcpu
);
5065 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
5066 ret
= emulate_int_real(ctxt
, irq
);
5068 if (ret
!= X86EMUL_CONTINUE
)
5069 return EMULATE_FAIL
;
5071 ctxt
->eip
= ctxt
->_eip
;
5072 kvm_rip_write(vcpu
, ctxt
->eip
);
5073 kvm_set_rflags(vcpu
, ctxt
->eflags
);
5075 if (irq
== NMI_VECTOR
)
5076 vcpu
->arch
.nmi_pending
= 0;
5078 vcpu
->arch
.interrupt
.pending
= false;
5080 return EMULATE_DONE
;
5082 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
5084 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
5086 int r
= EMULATE_DONE
;
5088 ++vcpu
->stat
.insn_emulation_fail
;
5089 trace_kvm_emulate_insn_failed(vcpu
);
5090 if (!is_guest_mode(vcpu
) && kvm_x86_ops
->get_cpl(vcpu
) == 0) {
5091 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
5092 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
5093 vcpu
->run
->internal
.ndata
= 0;
5096 kvm_queue_exception(vcpu
, UD_VECTOR
);
5101 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t cr2
,
5102 bool write_fault_to_shadow_pgtable
,
5108 if (emulation_type
& EMULTYPE_NO_REEXECUTE
)
5111 if (!vcpu
->arch
.mmu
.direct_map
) {
5113 * Write permission should be allowed since only
5114 * write access need to be emulated.
5116 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5119 * If the mapping is invalid in guest, let cpu retry
5120 * it to generate fault.
5122 if (gpa
== UNMAPPED_GVA
)
5127 * Do not retry the unhandleable instruction if it faults on the
5128 * readonly host memory, otherwise it will goto a infinite loop:
5129 * retry instruction -> write #PF -> emulation fail -> retry
5130 * instruction -> ...
5132 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
5135 * If the instruction failed on the error pfn, it can not be fixed,
5136 * report the error to userspace.
5138 if (is_error_noslot_pfn(pfn
))
5141 kvm_release_pfn_clean(pfn
);
5143 /* The instructions are well-emulated on direct mmu. */
5144 if (vcpu
->arch
.mmu
.direct_map
) {
5145 unsigned int indirect_shadow_pages
;
5147 spin_lock(&vcpu
->kvm
->mmu_lock
);
5148 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
5149 spin_unlock(&vcpu
->kvm
->mmu_lock
);
5151 if (indirect_shadow_pages
)
5152 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5158 * if emulation was due to access to shadowed page table
5159 * and it failed try to unshadow page and re-enter the
5160 * guest to let CPU execute the instruction.
5162 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5165 * If the access faults on its page table, it can not
5166 * be fixed by unprotecting shadow page and it should
5167 * be reported to userspace.
5169 return !write_fault_to_shadow_pgtable
;
5172 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
5173 unsigned long cr2
, int emulation_type
)
5175 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5176 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2
;
5178 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
5179 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
5182 * If the emulation is caused by #PF and it is non-page_table
5183 * writing instruction, it means the VM-EXIT is caused by shadow
5184 * page protected, we can zap the shadow page and retry this
5185 * instruction directly.
5187 * Note: if the guest uses a non-page-table modifying instruction
5188 * on the PDE that points to the instruction, then we will unmap
5189 * the instruction and go to an infinite loop. So, we cache the
5190 * last retried eip and the last fault address, if we meet the eip
5191 * and the address again, we can break out of the potential infinite
5194 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
5196 if (!(emulation_type
& EMULTYPE_RETRY
))
5199 if (x86_page_table_writing_insn(ctxt
))
5202 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2
)
5205 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
5206 vcpu
->arch
.last_retry_addr
= cr2
;
5208 if (!vcpu
->arch
.mmu
.direct_map
)
5209 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5211 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5216 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
5217 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
5219 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
5228 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
5229 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
5234 static void kvm_vcpu_check_singlestep(struct kvm_vcpu
*vcpu
, unsigned long rflags
, int *r
)
5236 struct kvm_run
*kvm_run
= vcpu
->run
;
5239 * rflags is the old, "raw" value of the flags. The new value has
5240 * not been saved yet.
5242 * This is correct even for TF set by the guest, because "the
5243 * processor will not generate this exception after the instruction
5244 * that sets the TF flag".
5246 if (unlikely(rflags
& X86_EFLAGS_TF
)) {
5247 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
5248 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_FIXED_1
|
5250 kvm_run
->debug
.arch
.pc
= vcpu
->arch
.singlestep_rip
;
5251 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5252 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5253 *r
= EMULATE_USER_EXIT
;
5255 vcpu
->arch
.emulate_ctxt
.eflags
&= ~X86_EFLAGS_TF
;
5257 * "Certain debug exceptions may clear bit 0-3. The
5258 * remaining contents of the DR6 register are never
5259 * cleared by the processor".
5261 vcpu
->arch
.dr6
&= ~15;
5262 vcpu
->arch
.dr6
|= DR6_BS
| DR6_RTM
;
5263 kvm_queue_exception(vcpu
, DB_VECTOR
);
5268 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
5270 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
5271 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
5272 struct kvm_run
*kvm_run
= vcpu
->run
;
5273 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5274 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5275 vcpu
->arch
.guest_debug_dr7
,
5279 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_FIXED_1
| DR6_RTM
;
5280 kvm_run
->debug
.arch
.pc
= eip
;
5281 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5282 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5283 *r
= EMULATE_USER_EXIT
;
5288 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
5289 !(kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)) {
5290 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5291 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5296 vcpu
->arch
.dr6
&= ~15;
5297 vcpu
->arch
.dr6
|= dr6
| DR6_RTM
;
5298 kvm_queue_exception(vcpu
, DB_VECTOR
);
5307 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
5314 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5315 bool writeback
= true;
5316 bool write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
5319 * Clear write_fault_to_shadow_pgtable here to ensure it is
5322 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
5323 kvm_clear_exception_queue(vcpu
);
5325 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
5326 init_emulate_ctxt(vcpu
);
5329 * We will reenter on the same instruction since
5330 * we do not set complete_userspace_io. This does not
5331 * handle watchpoints yet, those would be handled in
5334 if (kvm_vcpu_check_breakpoint(vcpu
, &r
))
5337 ctxt
->interruptibility
= 0;
5338 ctxt
->have_exception
= false;
5339 ctxt
->exception
.vector
= -1;
5340 ctxt
->perm_ok
= false;
5342 ctxt
->ud
= emulation_type
& EMULTYPE_TRAP_UD
;
5344 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
5346 trace_kvm_emulate_insn_start(vcpu
);
5347 ++vcpu
->stat
.insn_emulation
;
5348 if (r
!= EMULATION_OK
) {
5349 if (emulation_type
& EMULTYPE_TRAP_UD
)
5350 return EMULATE_FAIL
;
5351 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5353 return EMULATE_DONE
;
5354 if (emulation_type
& EMULTYPE_SKIP
)
5355 return EMULATE_FAIL
;
5356 return handle_emulation_failure(vcpu
);
5360 if (emulation_type
& EMULTYPE_SKIP
) {
5361 kvm_rip_write(vcpu
, ctxt
->_eip
);
5362 if (ctxt
->eflags
& X86_EFLAGS_RF
)
5363 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
5364 return EMULATE_DONE
;
5367 if (retry_instruction(ctxt
, cr2
, emulation_type
))
5368 return EMULATE_DONE
;
5370 /* this is needed for vmware backdoor interface to work since it
5371 changes registers values during IO operation */
5372 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
5373 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5374 emulator_invalidate_register_cache(ctxt
);
5378 r
= x86_emulate_insn(ctxt
);
5380 if (r
== EMULATION_INTERCEPTED
)
5381 return EMULATE_DONE
;
5383 if (r
== EMULATION_FAILED
) {
5384 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5386 return EMULATE_DONE
;
5388 return handle_emulation_failure(vcpu
);
5391 if (ctxt
->have_exception
) {
5393 if (inject_emulated_exception(vcpu
))
5395 } else if (vcpu
->arch
.pio
.count
) {
5396 if (!vcpu
->arch
.pio
.in
) {
5397 /* FIXME: return into emulator if single-stepping. */
5398 vcpu
->arch
.pio
.count
= 0;
5401 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
5403 r
= EMULATE_USER_EXIT
;
5404 } else if (vcpu
->mmio_needed
) {
5405 if (!vcpu
->mmio_is_write
)
5407 r
= EMULATE_USER_EXIT
;
5408 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
5409 } else if (r
== EMULATION_RESTART
)
5415 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5416 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
5417 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5418 kvm_rip_write(vcpu
, ctxt
->eip
);
5419 if (r
== EMULATE_DONE
)
5420 kvm_vcpu_check_singlestep(vcpu
, rflags
, &r
);
5421 if (!ctxt
->have_exception
||
5422 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
)
5423 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
5426 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5427 * do nothing, and it will be requested again as soon as
5428 * the shadow expires. But we still need to check here,
5429 * because POPF has no interrupt shadow.
5431 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
5432 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5434 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
5438 EXPORT_SYMBOL_GPL(x86_emulate_instruction
);
5440 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5442 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5443 int ret
= emulator_pio_out_emulated(&vcpu
->arch
.emulate_ctxt
,
5444 size
, port
, &val
, 1);
5445 /* do not return to emulator after return from userspace */
5446 vcpu
->arch
.pio
.count
= 0;
5449 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
5451 static void tsc_bad(void *info
)
5453 __this_cpu_write(cpu_tsc_khz
, 0);
5456 static void tsc_khz_changed(void *data
)
5458 struct cpufreq_freqs
*freq
= data
;
5459 unsigned long khz
= 0;
5463 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5464 khz
= cpufreq_quick_get(raw_smp_processor_id());
5467 __this_cpu_write(cpu_tsc_khz
, khz
);
5470 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
5473 struct cpufreq_freqs
*freq
= data
;
5475 struct kvm_vcpu
*vcpu
;
5476 int i
, send_ipi
= 0;
5479 * We allow guests to temporarily run on slowing clocks,
5480 * provided we notify them after, or to run on accelerating
5481 * clocks, provided we notify them before. Thus time never
5484 * However, we have a problem. We can't atomically update
5485 * the frequency of a given CPU from this function; it is
5486 * merely a notifier, which can be called from any CPU.
5487 * Changing the TSC frequency at arbitrary points in time
5488 * requires a recomputation of local variables related to
5489 * the TSC for each VCPU. We must flag these local variables
5490 * to be updated and be sure the update takes place with the
5491 * new frequency before any guests proceed.
5493 * Unfortunately, the combination of hotplug CPU and frequency
5494 * change creates an intractable locking scenario; the order
5495 * of when these callouts happen is undefined with respect to
5496 * CPU hotplug, and they can race with each other. As such,
5497 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5498 * undefined; you can actually have a CPU frequency change take
5499 * place in between the computation of X and the setting of the
5500 * variable. To protect against this problem, all updates of
5501 * the per_cpu tsc_khz variable are done in an interrupt
5502 * protected IPI, and all callers wishing to update the value
5503 * must wait for a synchronous IPI to complete (which is trivial
5504 * if the caller is on the CPU already). This establishes the
5505 * necessary total order on variable updates.
5507 * Note that because a guest time update may take place
5508 * anytime after the setting of the VCPU's request bit, the
5509 * correct TSC value must be set before the request. However,
5510 * to ensure the update actually makes it to any guest which
5511 * starts running in hardware virtualization between the set
5512 * and the acquisition of the spinlock, we must also ping the
5513 * CPU after setting the request bit.
5517 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
5519 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
5522 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5524 spin_lock(&kvm_lock
);
5525 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
5526 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
5527 if (vcpu
->cpu
!= freq
->cpu
)
5529 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
5530 if (vcpu
->cpu
!= smp_processor_id())
5534 spin_unlock(&kvm_lock
);
5536 if (freq
->old
< freq
->new && send_ipi
) {
5538 * We upscale the frequency. Must make the guest
5539 * doesn't see old kvmclock values while running with
5540 * the new frequency, otherwise we risk the guest sees
5541 * time go backwards.
5543 * In case we update the frequency for another cpu
5544 * (which might be in guest context) send an interrupt
5545 * to kick the cpu out of guest context. Next time
5546 * guest context is entered kvmclock will be updated,
5547 * so the guest will not see stale values.
5549 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5554 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
5555 .notifier_call
= kvmclock_cpufreq_notifier
5558 static int kvmclock_cpu_notifier(struct notifier_block
*nfb
,
5559 unsigned long action
, void *hcpu
)
5561 unsigned int cpu
= (unsigned long)hcpu
;
5565 case CPU_DOWN_FAILED
:
5566 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
5568 case CPU_DOWN_PREPARE
:
5569 smp_call_function_single(cpu
, tsc_bad
, NULL
, 1);
5575 static struct notifier_block kvmclock_cpu_notifier_block
= {
5576 .notifier_call
= kvmclock_cpu_notifier
,
5577 .priority
= -INT_MAX
5580 static void kvm_timer_init(void)
5584 max_tsc_khz
= tsc_khz
;
5586 cpu_notifier_register_begin();
5587 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
5588 #ifdef CONFIG_CPU_FREQ
5589 struct cpufreq_policy policy
;
5590 memset(&policy
, 0, sizeof(policy
));
5592 cpufreq_get_policy(&policy
, cpu
);
5593 if (policy
.cpuinfo
.max_freq
)
5594 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
5597 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
5598 CPUFREQ_TRANSITION_NOTIFIER
);
5600 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
5601 for_each_online_cpu(cpu
)
5602 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
5604 __register_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
5605 cpu_notifier_register_done();
5609 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
5611 int kvm_is_in_guest(void)
5613 return __this_cpu_read(current_vcpu
) != NULL
;
5616 static int kvm_is_user_mode(void)
5620 if (__this_cpu_read(current_vcpu
))
5621 user_mode
= kvm_x86_ops
->get_cpl(__this_cpu_read(current_vcpu
));
5623 return user_mode
!= 0;
5626 static unsigned long kvm_get_guest_ip(void)
5628 unsigned long ip
= 0;
5630 if (__this_cpu_read(current_vcpu
))
5631 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
5636 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
5637 .is_in_guest
= kvm_is_in_guest
,
5638 .is_user_mode
= kvm_is_user_mode
,
5639 .get_guest_ip
= kvm_get_guest_ip
,
5642 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
5644 __this_cpu_write(current_vcpu
, vcpu
);
5646 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
5648 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
5650 __this_cpu_write(current_vcpu
, NULL
);
5652 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
5654 static void kvm_set_mmio_spte_mask(void)
5657 int maxphyaddr
= boot_cpu_data
.x86_phys_bits
;
5660 * Set the reserved bits and the present bit of an paging-structure
5661 * entry to generate page fault with PFER.RSV = 1.
5663 /* Mask the reserved physical address bits. */
5664 mask
= rsvd_bits(maxphyaddr
, 51);
5666 /* Bit 62 is always reserved for 32bit host. */
5667 mask
|= 0x3ull
<< 62;
5669 /* Set the present bit. */
5672 #ifdef CONFIG_X86_64
5674 * If reserved bit is not supported, clear the present bit to disable
5677 if (maxphyaddr
== 52)
5681 kvm_mmu_set_mmio_spte_mask(mask
);
5684 #ifdef CONFIG_X86_64
5685 static void pvclock_gtod_update_fn(struct work_struct
*work
)
5689 struct kvm_vcpu
*vcpu
;
5692 spin_lock(&kvm_lock
);
5693 list_for_each_entry(kvm
, &vm_list
, vm_list
)
5694 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5695 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
5696 atomic_set(&kvm_guest_has_master_clock
, 0);
5697 spin_unlock(&kvm_lock
);
5700 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
5703 * Notification about pvclock gtod data update.
5705 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
5708 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
5709 struct timekeeper
*tk
= priv
;
5711 update_pvclock_gtod(tk
);
5713 /* disable master clock if host does not trust, or does not
5714 * use, TSC clocksource
5716 if (gtod
->clock
.vclock_mode
!= VCLOCK_TSC
&&
5717 atomic_read(&kvm_guest_has_master_clock
) != 0)
5718 queue_work(system_long_wq
, &pvclock_gtod_work
);
5723 static struct notifier_block pvclock_gtod_notifier
= {
5724 .notifier_call
= pvclock_gtod_notify
,
5728 int kvm_arch_init(void *opaque
)
5731 struct kvm_x86_ops
*ops
= opaque
;
5734 printk(KERN_ERR
"kvm: already loaded the other module\n");
5739 if (!ops
->cpu_has_kvm_support()) {
5740 printk(KERN_ERR
"kvm: no hardware support\n");
5744 if (ops
->disabled_by_bios()) {
5745 printk(KERN_ERR
"kvm: disabled by bios\n");
5751 shared_msrs
= alloc_percpu(struct kvm_shared_msrs
);
5753 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_shared_msrs\n");
5757 r
= kvm_mmu_module_init();
5759 goto out_free_percpu
;
5761 kvm_set_mmio_spte_mask();
5764 kvm_init_msr_list();
5766 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
5767 PT_DIRTY_MASK
, PT64_NX_MASK
, 0);
5771 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
5774 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
5777 #ifdef CONFIG_X86_64
5778 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
5784 free_percpu(shared_msrs
);
5789 void kvm_arch_exit(void)
5791 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
5793 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5794 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
5795 CPUFREQ_TRANSITION_NOTIFIER
);
5796 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
5797 #ifdef CONFIG_X86_64
5798 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
5801 kvm_mmu_module_exit();
5802 free_percpu(shared_msrs
);
5805 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
5807 ++vcpu
->stat
.halt_exits
;
5808 if (irqchip_in_kernel(vcpu
->kvm
)) {
5809 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
5812 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
5816 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
5818 int kvm_hv_hypercall(struct kvm_vcpu
*vcpu
)
5820 u64 param
, ingpa
, outgpa
, ret
;
5821 uint16_t code
, rep_idx
, rep_cnt
, res
= HV_STATUS_SUCCESS
, rep_done
= 0;
5822 bool fast
, longmode
;
5825 * hypercall generates UD from non zero cpl and real mode
5828 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 || !is_protmode(vcpu
)) {
5829 kvm_queue_exception(vcpu
, UD_VECTOR
);
5833 longmode
= is_64_bit_mode(vcpu
);
5836 param
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDX
) << 32) |
5837 (kvm_register_read(vcpu
, VCPU_REGS_RAX
) & 0xffffffff);
5838 ingpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RBX
) << 32) |
5839 (kvm_register_read(vcpu
, VCPU_REGS_RCX
) & 0xffffffff);
5840 outgpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDI
) << 32) |
5841 (kvm_register_read(vcpu
, VCPU_REGS_RSI
) & 0xffffffff);
5843 #ifdef CONFIG_X86_64
5845 param
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5846 ingpa
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5847 outgpa
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
5851 code
= param
& 0xffff;
5852 fast
= (param
>> 16) & 0x1;
5853 rep_cnt
= (param
>> 32) & 0xfff;
5854 rep_idx
= (param
>> 48) & 0xfff;
5856 trace_kvm_hv_hypercall(code
, fast
, rep_cnt
, rep_idx
, ingpa
, outgpa
);
5859 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT
:
5860 kvm_vcpu_on_spin(vcpu
);
5863 res
= HV_STATUS_INVALID_HYPERCALL_CODE
;
5867 ret
= res
| (((u64
)rep_done
& 0xfff) << 32);
5869 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
5871 kvm_register_write(vcpu
, VCPU_REGS_RDX
, ret
>> 32);
5872 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
& 0xffffffff);
5879 * kvm_pv_kick_cpu_op: Kick a vcpu.
5881 * @apicid - apicid of vcpu to be kicked.
5883 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
5885 struct kvm_lapic_irq lapic_irq
;
5887 lapic_irq
.shorthand
= 0;
5888 lapic_irq
.dest_mode
= 0;
5889 lapic_irq
.dest_id
= apicid
;
5891 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
5892 kvm_irq_delivery_to_apic(kvm
, 0, &lapic_irq
, NULL
);
5895 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
5897 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
5898 int op_64_bit
, r
= 1;
5900 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
5901 return kvm_hv_hypercall(vcpu
);
5903 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5904 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
5905 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5906 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5907 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
5909 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
5911 op_64_bit
= is_64_bit_mode(vcpu
);
5920 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
5926 case KVM_HC_VAPIC_POLL_IRQ
:
5929 case KVM_HC_KICK_CPU
:
5930 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
5940 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
5941 ++vcpu
->stat
.hypercalls
;
5944 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
5946 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
5948 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5949 char instruction
[3];
5950 unsigned long rip
= kvm_rip_read(vcpu
);
5952 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
5954 return emulator_write_emulated(ctxt
, rip
, instruction
, 3, NULL
);
5958 * Check if userspace requested an interrupt window, and that the
5959 * interrupt window is open.
5961 * No need to exit to userspace if we already have an interrupt queued.
5963 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
5965 return (!irqchip_in_kernel(vcpu
->kvm
) && !kvm_cpu_has_interrupt(vcpu
) &&
5966 vcpu
->run
->request_interrupt_window
&&
5967 kvm_arch_interrupt_allowed(vcpu
));
5970 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
5972 struct kvm_run
*kvm_run
= vcpu
->run
;
5974 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
5975 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
5976 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
5977 if (irqchip_in_kernel(vcpu
->kvm
))
5978 kvm_run
->ready_for_interrupt_injection
= 1;
5980 kvm_run
->ready_for_interrupt_injection
=
5981 kvm_arch_interrupt_allowed(vcpu
) &&
5982 !kvm_cpu_has_interrupt(vcpu
) &&
5983 !kvm_event_needs_reinjection(vcpu
);
5986 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
5990 if (!kvm_x86_ops
->update_cr8_intercept
)
5993 if (!vcpu
->arch
.apic
)
5996 if (!vcpu
->arch
.apic
->vapic_addr
)
5997 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
6004 tpr
= kvm_lapic_get_cr8(vcpu
);
6006 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
6009 static int inject_pending_event(struct kvm_vcpu
*vcpu
, bool req_int_win
)
6013 /* try to reinject previous events if any */
6014 if (vcpu
->arch
.exception
.pending
) {
6015 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
6016 vcpu
->arch
.exception
.has_error_code
,
6017 vcpu
->arch
.exception
.error_code
);
6019 if (exception_type(vcpu
->arch
.exception
.nr
) == EXCPT_FAULT
)
6020 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
6023 if (vcpu
->arch
.exception
.nr
== DB_VECTOR
&&
6024 (vcpu
->arch
.dr7
& DR7_GD
)) {
6025 vcpu
->arch
.dr7
&= ~DR7_GD
;
6026 kvm_update_dr7(vcpu
);
6029 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
6030 vcpu
->arch
.exception
.has_error_code
,
6031 vcpu
->arch
.exception
.error_code
,
6032 vcpu
->arch
.exception
.reinject
);
6036 if (vcpu
->arch
.nmi_injected
) {
6037 kvm_x86_ops
->set_nmi(vcpu
);
6041 if (vcpu
->arch
.interrupt
.pending
) {
6042 kvm_x86_ops
->set_irq(vcpu
);
6046 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6047 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6052 /* try to inject new event if pending */
6053 if (vcpu
->arch
.nmi_pending
) {
6054 if (kvm_x86_ops
->nmi_allowed(vcpu
)) {
6055 --vcpu
->arch
.nmi_pending
;
6056 vcpu
->arch
.nmi_injected
= true;
6057 kvm_x86_ops
->set_nmi(vcpu
);
6059 } else if (kvm_cpu_has_injectable_intr(vcpu
)) {
6061 * Because interrupts can be injected asynchronously, we are
6062 * calling check_nested_events again here to avoid a race condition.
6063 * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6064 * proposal and current concerns. Perhaps we should be setting
6065 * KVM_REQ_EVENT only on certain events and not unconditionally?
6067 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6068 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6072 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
6073 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
6075 kvm_x86_ops
->set_irq(vcpu
);
6081 static void process_nmi(struct kvm_vcpu
*vcpu
)
6086 * x86 is limited to one NMI running, and one NMI pending after it.
6087 * If an NMI is already in progress, limit further NMIs to just one.
6088 * Otherwise, allow two (and we'll inject the first one immediately).
6090 if (kvm_x86_ops
->get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
6093 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
6094 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
6095 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6098 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
6100 u64 eoi_exit_bitmap
[4];
6103 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
6106 memset(eoi_exit_bitmap
, 0, 32);
6109 kvm_ioapic_scan_entry(vcpu
, eoi_exit_bitmap
, tmr
);
6110 kvm_x86_ops
->load_eoi_exitmap(vcpu
, eoi_exit_bitmap
);
6111 kvm_apic_update_tmr(vcpu
, tmr
);
6114 static void kvm_vcpu_flush_tlb(struct kvm_vcpu
*vcpu
)
6116 ++vcpu
->stat
.tlb_flush
;
6117 kvm_x86_ops
->tlb_flush(vcpu
);
6120 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
6122 struct page
*page
= NULL
;
6124 if (!irqchip_in_kernel(vcpu
->kvm
))
6127 if (!kvm_x86_ops
->set_apic_access_page_addr
)
6130 page
= gfn_to_page(vcpu
->kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
6131 kvm_x86_ops
->set_apic_access_page_addr(vcpu
, page_to_phys(page
));
6134 * Do not pin apic access page in memory, the MMU notifier
6135 * will call us again if it is migrated or swapped out.
6139 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page
);
6141 void kvm_arch_mmu_notifier_invalidate_page(struct kvm
*kvm
,
6142 unsigned long address
)
6145 * The physical address of apic access page is stored in the VMCS.
6146 * Update it when it becomes invalid.
6148 if (address
== gfn_to_hva(kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
))
6149 kvm_make_all_cpus_request(kvm
, KVM_REQ_APIC_PAGE_RELOAD
);
6153 * Returns 1 to let __vcpu_run() continue the guest execution loop without
6154 * exiting to the userspace. Otherwise, the value will be returned to the
6157 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
6160 bool req_int_win
= !irqchip_in_kernel(vcpu
->kvm
) &&
6161 vcpu
->run
->request_interrupt_window
;
6162 bool req_immediate_exit
= false;
6164 if (vcpu
->requests
) {
6165 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
6166 kvm_mmu_unload(vcpu
);
6167 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
6168 __kvm_migrate_timers(vcpu
);
6169 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
6170 kvm_gen_update_masterclock(vcpu
->kvm
);
6171 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
6172 kvm_gen_kvmclock_update(vcpu
);
6173 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
6174 r
= kvm_guest_time_update(vcpu
);
6178 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
6179 kvm_mmu_sync_roots(vcpu
);
6180 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
6181 kvm_vcpu_flush_tlb(vcpu
);
6182 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
6183 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
6187 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
6188 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
6192 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
)) {
6193 vcpu
->fpu_active
= 0;
6194 kvm_x86_ops
->fpu_deactivate(vcpu
);
6196 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
6197 /* Page is swapped out. Do synthetic halt */
6198 vcpu
->arch
.apf
.halted
= true;
6202 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
6203 record_steal_time(vcpu
);
6204 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
6206 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
6207 kvm_handle_pmu_event(vcpu
);
6208 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
6209 kvm_deliver_pmi(vcpu
);
6210 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
6211 vcpu_scan_ioapic(vcpu
);
6212 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
6213 kvm_vcpu_reload_apic_access_page(vcpu
);
6216 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
6217 kvm_apic_accept_events(vcpu
);
6218 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
6223 if (inject_pending_event(vcpu
, req_int_win
) != 0)
6224 req_immediate_exit
= true;
6225 /* enable NMI/IRQ window open exits if needed */
6226 else if (vcpu
->arch
.nmi_pending
)
6227 kvm_x86_ops
->enable_nmi_window(vcpu
);
6228 else if (kvm_cpu_has_injectable_intr(vcpu
) || req_int_win
)
6229 kvm_x86_ops
->enable_irq_window(vcpu
);
6231 if (kvm_lapic_enabled(vcpu
)) {
6233 * Update architecture specific hints for APIC
6234 * virtual interrupt delivery.
6236 if (kvm_x86_ops
->hwapic_irr_update
)
6237 kvm_x86_ops
->hwapic_irr_update(vcpu
,
6238 kvm_lapic_find_highest_irr(vcpu
));
6239 update_cr8_intercept(vcpu
);
6240 kvm_lapic_sync_to_vapic(vcpu
);
6244 r
= kvm_mmu_reload(vcpu
);
6246 goto cancel_injection
;
6251 kvm_x86_ops
->prepare_guest_switch(vcpu
);
6252 if (vcpu
->fpu_active
)
6253 kvm_load_guest_fpu(vcpu
);
6254 kvm_load_guest_xcr0(vcpu
);
6256 vcpu
->mode
= IN_GUEST_MODE
;
6258 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6260 /* We should set ->mode before check ->requests,
6261 * see the comment in make_all_cpus_request.
6263 smp_mb__after_srcu_read_unlock();
6265 local_irq_disable();
6267 if (vcpu
->mode
== EXITING_GUEST_MODE
|| vcpu
->requests
6268 || need_resched() || signal_pending(current
)) {
6269 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6273 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6275 goto cancel_injection
;
6278 if (req_immediate_exit
)
6279 smp_send_reschedule(vcpu
->cpu
);
6283 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
6285 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
6286 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
6287 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
6288 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
6289 set_debugreg(vcpu
->arch
.dr6
, 6);
6292 trace_kvm_entry(vcpu
->vcpu_id
);
6293 wait_lapic_expire(vcpu
);
6294 kvm_x86_ops
->run(vcpu
);
6297 * Do this here before restoring debug registers on the host. And
6298 * since we do this before handling the vmexit, a DR access vmexit
6299 * can (a) read the correct value of the debug registers, (b) set
6300 * KVM_DEBUGREG_WONT_EXIT again.
6302 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
6305 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
6306 kvm_x86_ops
->sync_dirty_debug_regs(vcpu
);
6307 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
6308 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
6312 * If the guest has used debug registers, at least dr7
6313 * will be disabled while returning to the host.
6314 * If we don't have active breakpoints in the host, we don't
6315 * care about the messed up debug address registers. But if
6316 * we have some of them active, restore the old state.
6318 if (hw_breakpoint_active())
6319 hw_breakpoint_restore();
6321 vcpu
->arch
.last_guest_tsc
= kvm_x86_ops
->read_l1_tsc(vcpu
,
6324 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6327 /* Interrupt is enabled by handle_external_intr() */
6328 kvm_x86_ops
->handle_external_intr(vcpu
);
6333 * We must have an instruction between local_irq_enable() and
6334 * kvm_guest_exit(), so the timer interrupt isn't delayed by
6335 * the interrupt shadow. The stat.exits increment will do nicely.
6336 * But we need to prevent reordering, hence this barrier():
6344 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6347 * Profile KVM exit RIPs:
6349 if (unlikely(prof_on
== KVM_PROFILING
)) {
6350 unsigned long rip
= kvm_rip_read(vcpu
);
6351 profile_hit(KVM_PROFILING
, (void *)rip
);
6354 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
6355 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
6357 if (vcpu
->arch
.apic_attention
)
6358 kvm_lapic_sync_from_vapic(vcpu
);
6360 r
= kvm_x86_ops
->handle_exit(vcpu
);
6364 kvm_x86_ops
->cancel_injection(vcpu
);
6365 if (unlikely(vcpu
->arch
.apic_attention
))
6366 kvm_lapic_sync_from_vapic(vcpu
);
6372 static int __vcpu_run(struct kvm_vcpu
*vcpu
)
6375 struct kvm
*kvm
= vcpu
->kvm
;
6377 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6381 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
6382 !vcpu
->arch
.apf
.halted
)
6383 r
= vcpu_enter_guest(vcpu
);
6385 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6386 kvm_vcpu_block(vcpu
);
6387 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6388 if (kvm_check_request(KVM_REQ_UNHALT
, vcpu
)) {
6389 kvm_apic_accept_events(vcpu
);
6390 switch(vcpu
->arch
.mp_state
) {
6391 case KVM_MP_STATE_HALTED
:
6392 vcpu
->arch
.pv
.pv_unhalted
= false;
6393 vcpu
->arch
.mp_state
=
6394 KVM_MP_STATE_RUNNABLE
;
6395 case KVM_MP_STATE_RUNNABLE
:
6396 vcpu
->arch
.apf
.halted
= false;
6398 case KVM_MP_STATE_INIT_RECEIVED
:
6410 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
6411 if (kvm_cpu_has_pending_timer(vcpu
))
6412 kvm_inject_pending_timer_irqs(vcpu
);
6414 if (dm_request_for_irq_injection(vcpu
)) {
6416 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
6417 ++vcpu
->stat
.request_irq_exits
;
6420 kvm_check_async_pf_completion(vcpu
);
6422 if (signal_pending(current
)) {
6424 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
6425 ++vcpu
->stat
.signal_exits
;
6427 if (need_resched()) {
6428 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6430 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6434 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6439 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
6442 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6443 r
= emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
6444 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6445 if (r
!= EMULATE_DONE
)
6450 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
6452 BUG_ON(!vcpu
->arch
.pio
.count
);
6454 return complete_emulated_io(vcpu
);
6458 * Implements the following, as a state machine:
6462 * for each mmio piece in the fragment
6470 * for each mmio piece in the fragment
6475 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
6477 struct kvm_run
*run
= vcpu
->run
;
6478 struct kvm_mmio_fragment
*frag
;
6481 BUG_ON(!vcpu
->mmio_needed
);
6483 /* Complete previous fragment */
6484 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
6485 len
= min(8u, frag
->len
);
6486 if (!vcpu
->mmio_is_write
)
6487 memcpy(frag
->data
, run
->mmio
.data
, len
);
6489 if (frag
->len
<= 8) {
6490 /* Switch to the next fragment. */
6492 vcpu
->mmio_cur_fragment
++;
6494 /* Go forward to the next mmio piece. */
6500 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
6501 vcpu
->mmio_needed
= 0;
6503 /* FIXME: return into emulator if single-stepping. */
6504 if (vcpu
->mmio_is_write
)
6506 vcpu
->mmio_read_completed
= 1;
6507 return complete_emulated_io(vcpu
);
6510 run
->exit_reason
= KVM_EXIT_MMIO
;
6511 run
->mmio
.phys_addr
= frag
->gpa
;
6512 if (vcpu
->mmio_is_write
)
6513 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
6514 run
->mmio
.len
= min(8u, frag
->len
);
6515 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
6516 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
6521 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
6526 if (!tsk_used_math(current
) && init_fpu(current
))
6529 if (vcpu
->sigset_active
)
6530 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
6532 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
6533 kvm_vcpu_block(vcpu
);
6534 kvm_apic_accept_events(vcpu
);
6535 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
6540 /* re-sync apic's tpr */
6541 if (!irqchip_in_kernel(vcpu
->kvm
)) {
6542 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
6548 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
6549 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
6550 vcpu
->arch
.complete_userspace_io
= NULL
;
6555 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
6557 r
= __vcpu_run(vcpu
);
6560 post_kvm_run_save(vcpu
);
6561 if (vcpu
->sigset_active
)
6562 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
6567 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
6569 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
6571 * We are here if userspace calls get_regs() in the middle of
6572 * instruction emulation. Registers state needs to be copied
6573 * back from emulation context to vcpu. Userspace shouldn't do
6574 * that usually, but some bad designed PV devices (vmware
6575 * backdoor interface) need this to work
6577 emulator_writeback_register_cache(&vcpu
->arch
.emulate_ctxt
);
6578 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
6580 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
6581 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
6582 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
6583 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
6584 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
6585 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
6586 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
6587 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
6588 #ifdef CONFIG_X86_64
6589 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
6590 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
6591 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
6592 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
6593 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
6594 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
6595 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
6596 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
6599 regs
->rip
= kvm_rip_read(vcpu
);
6600 regs
->rflags
= kvm_get_rflags(vcpu
);
6605 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
6607 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
6608 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
6610 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
6611 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
6612 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
6613 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
6614 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
6615 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
6616 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
6617 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
6618 #ifdef CONFIG_X86_64
6619 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
6620 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
6621 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
6622 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
6623 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
6624 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
6625 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
6626 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
6629 kvm_rip_write(vcpu
, regs
->rip
);
6630 kvm_set_rflags(vcpu
, regs
->rflags
);
6632 vcpu
->arch
.exception
.pending
= false;
6634 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6639 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
6641 struct kvm_segment cs
;
6643 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6647 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
6649 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
6650 struct kvm_sregs
*sregs
)
6654 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
6655 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
6656 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
6657 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
6658 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
6659 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
6661 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
6662 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
6664 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6665 sregs
->idt
.limit
= dt
.size
;
6666 sregs
->idt
.base
= dt
.address
;
6667 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6668 sregs
->gdt
.limit
= dt
.size
;
6669 sregs
->gdt
.base
= dt
.address
;
6671 sregs
->cr0
= kvm_read_cr0(vcpu
);
6672 sregs
->cr2
= vcpu
->arch
.cr2
;
6673 sregs
->cr3
= kvm_read_cr3(vcpu
);
6674 sregs
->cr4
= kvm_read_cr4(vcpu
);
6675 sregs
->cr8
= kvm_get_cr8(vcpu
);
6676 sregs
->efer
= vcpu
->arch
.efer
;
6677 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
6679 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
6681 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
6682 set_bit(vcpu
->arch
.interrupt
.nr
,
6683 (unsigned long *)sregs
->interrupt_bitmap
);
6688 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
6689 struct kvm_mp_state
*mp_state
)
6691 kvm_apic_accept_events(vcpu
);
6692 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
&&
6693 vcpu
->arch
.pv
.pv_unhalted
)
6694 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
6696 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
6701 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
6702 struct kvm_mp_state
*mp_state
)
6704 if (!kvm_vcpu_has_lapic(vcpu
) &&
6705 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
6708 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
6709 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
6710 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
6712 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
6713 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6717 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
6718 int reason
, bool has_error_code
, u32 error_code
)
6720 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
6723 init_emulate_ctxt(vcpu
);
6725 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
6726 has_error_code
, error_code
);
6729 return EMULATE_FAIL
;
6731 kvm_rip_write(vcpu
, ctxt
->eip
);
6732 kvm_set_rflags(vcpu
, ctxt
->eflags
);
6733 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6734 return EMULATE_DONE
;
6736 EXPORT_SYMBOL_GPL(kvm_task_switch
);
6738 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
6739 struct kvm_sregs
*sregs
)
6741 struct msr_data apic_base_msr
;
6742 int mmu_reset_needed
= 0;
6743 int pending_vec
, max_bits
, idx
;
6746 if (!guest_cpuid_has_xsave(vcpu
) && (sregs
->cr4
& X86_CR4_OSXSAVE
))
6749 dt
.size
= sregs
->idt
.limit
;
6750 dt
.address
= sregs
->idt
.base
;
6751 kvm_x86_ops
->set_idt(vcpu
, &dt
);
6752 dt
.size
= sregs
->gdt
.limit
;
6753 dt
.address
= sregs
->gdt
.base
;
6754 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
6756 vcpu
->arch
.cr2
= sregs
->cr2
;
6757 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
6758 vcpu
->arch
.cr3
= sregs
->cr3
;
6759 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
6761 kvm_set_cr8(vcpu
, sregs
->cr8
);
6763 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
6764 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
6765 apic_base_msr
.data
= sregs
->apic_base
;
6766 apic_base_msr
.host_initiated
= true;
6767 kvm_set_apic_base(vcpu
, &apic_base_msr
);
6769 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
6770 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
6771 vcpu
->arch
.cr0
= sregs
->cr0
;
6773 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
6774 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
6775 if (sregs
->cr4
& X86_CR4_OSXSAVE
)
6776 kvm_update_cpuid(vcpu
);
6778 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6779 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
6780 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
6781 mmu_reset_needed
= 1;
6783 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
6785 if (mmu_reset_needed
)
6786 kvm_mmu_reset_context(vcpu
);
6788 max_bits
= KVM_NR_INTERRUPTS
;
6789 pending_vec
= find_first_bit(
6790 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
6791 if (pending_vec
< max_bits
) {
6792 kvm_queue_interrupt(vcpu
, pending_vec
, false);
6793 pr_debug("Set back pending irq %d\n", pending_vec
);
6796 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
6797 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
6798 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
6799 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
6800 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
6801 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
6803 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
6804 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
6806 update_cr8_intercept(vcpu
);
6808 /* Older userspace won't unhalt the vcpu on reset. */
6809 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
6810 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
6812 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
6814 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6819 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
6820 struct kvm_guest_debug
*dbg
)
6822 unsigned long rflags
;
6825 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
6827 if (vcpu
->arch
.exception
.pending
)
6829 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
6830 kvm_queue_exception(vcpu
, DB_VECTOR
);
6832 kvm_queue_exception(vcpu
, BP_VECTOR
);
6836 * Read rflags as long as potentially injected trace flags are still
6839 rflags
= kvm_get_rflags(vcpu
);
6841 vcpu
->guest_debug
= dbg
->control
;
6842 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
6843 vcpu
->guest_debug
= 0;
6845 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
6846 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
6847 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
6848 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
6850 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
6851 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
6853 kvm_update_dr7(vcpu
);
6855 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
6856 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
6857 get_segment_base(vcpu
, VCPU_SREG_CS
);
6860 * Trigger an rflags update that will inject or remove the trace
6863 kvm_set_rflags(vcpu
, rflags
);
6865 kvm_x86_ops
->update_db_bp_intercept(vcpu
);
6875 * Translate a guest virtual address to a guest physical address.
6877 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
6878 struct kvm_translation
*tr
)
6880 unsigned long vaddr
= tr
->linear_address
;
6884 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6885 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
6886 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
6887 tr
->physical_address
= gpa
;
6888 tr
->valid
= gpa
!= UNMAPPED_GVA
;
6895 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
6897 struct i387_fxsave_struct
*fxsave
=
6898 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
6900 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
6901 fpu
->fcw
= fxsave
->cwd
;
6902 fpu
->fsw
= fxsave
->swd
;
6903 fpu
->ftwx
= fxsave
->twd
;
6904 fpu
->last_opcode
= fxsave
->fop
;
6905 fpu
->last_ip
= fxsave
->rip
;
6906 fpu
->last_dp
= fxsave
->rdp
;
6907 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
6912 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
6914 struct i387_fxsave_struct
*fxsave
=
6915 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
6917 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
6918 fxsave
->cwd
= fpu
->fcw
;
6919 fxsave
->swd
= fpu
->fsw
;
6920 fxsave
->twd
= fpu
->ftwx
;
6921 fxsave
->fop
= fpu
->last_opcode
;
6922 fxsave
->rip
= fpu
->last_ip
;
6923 fxsave
->rdp
= fpu
->last_dp
;
6924 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
6929 int fx_init(struct kvm_vcpu
*vcpu
)
6933 err
= fpu_alloc(&vcpu
->arch
.guest_fpu
);
6937 fpu_finit(&vcpu
->arch
.guest_fpu
);
6939 vcpu
->arch
.guest_fpu
.state
->xsave
.xsave_hdr
.xcomp_bv
=
6940 host_xcr0
| XSTATE_COMPACTION_ENABLED
;
6943 * Ensure guest xcr0 is valid for loading
6945 vcpu
->arch
.xcr0
= XSTATE_FP
;
6947 vcpu
->arch
.cr0
|= X86_CR0_ET
;
6951 EXPORT_SYMBOL_GPL(fx_init
);
6953 static void fx_free(struct kvm_vcpu
*vcpu
)
6955 fpu_free(&vcpu
->arch
.guest_fpu
);
6958 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
6960 if (vcpu
->guest_fpu_loaded
)
6964 * Restore all possible states in the guest,
6965 * and assume host would use all available bits.
6966 * Guest xcr0 would be loaded later.
6968 kvm_put_guest_xcr0(vcpu
);
6969 vcpu
->guest_fpu_loaded
= 1;
6970 __kernel_fpu_begin();
6971 fpu_restore_checking(&vcpu
->arch
.guest_fpu
);
6975 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
6977 kvm_put_guest_xcr0(vcpu
);
6979 if (!vcpu
->guest_fpu_loaded
)
6982 vcpu
->guest_fpu_loaded
= 0;
6983 fpu_save_init(&vcpu
->arch
.guest_fpu
);
6985 ++vcpu
->stat
.fpu_reload
;
6986 kvm_make_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
);
6990 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
6992 kvmclock_reset(vcpu
);
6994 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
6996 kvm_x86_ops
->vcpu_free(vcpu
);
6999 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
7002 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
7003 printk_once(KERN_WARNING
7004 "kvm: SMP vm created on host with unstable TSC; "
7005 "guest TSC will not be reliable\n");
7006 return kvm_x86_ops
->vcpu_create(kvm
, id
);
7009 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
7013 vcpu
->arch
.mtrr_state
.have_fixed
= 1;
7014 r
= vcpu_load(vcpu
);
7017 kvm_vcpu_reset(vcpu
);
7018 kvm_mmu_setup(vcpu
);
7024 void kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
7026 struct msr_data msr
;
7027 struct kvm
*kvm
= vcpu
->kvm
;
7029 if (vcpu_load(vcpu
))
7032 msr
.index
= MSR_IA32_TSC
;
7033 msr
.host_initiated
= true;
7034 kvm_write_tsc(vcpu
, &msr
);
7037 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
7038 KVMCLOCK_SYNC_PERIOD
);
7041 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
7044 vcpu
->arch
.apf
.msr_val
= 0;
7046 r
= vcpu_load(vcpu
);
7048 kvm_mmu_unload(vcpu
);
7052 kvm_x86_ops
->vcpu_free(vcpu
);
7055 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
)
7057 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
7058 vcpu
->arch
.nmi_pending
= 0;
7059 vcpu
->arch
.nmi_injected
= false;
7060 kvm_clear_interrupt_queue(vcpu
);
7061 kvm_clear_exception_queue(vcpu
);
7063 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
7064 vcpu
->arch
.dr6
= DR6_INIT
;
7065 kvm_update_dr6(vcpu
);
7066 vcpu
->arch
.dr7
= DR7_FIXED_1
;
7067 kvm_update_dr7(vcpu
);
7069 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7070 vcpu
->arch
.apf
.msr_val
= 0;
7071 vcpu
->arch
.st
.msr_val
= 0;
7073 kvmclock_reset(vcpu
);
7075 kvm_clear_async_pf_completion_queue(vcpu
);
7076 kvm_async_pf_hash_reset(vcpu
);
7077 vcpu
->arch
.apf
.halted
= false;
7079 kvm_pmu_reset(vcpu
);
7081 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
7082 vcpu
->arch
.regs_avail
= ~0;
7083 vcpu
->arch
.regs_dirty
= ~0;
7085 kvm_x86_ops
->vcpu_reset(vcpu
);
7088 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
7090 struct kvm_segment cs
;
7092 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7093 cs
.selector
= vector
<< 8;
7094 cs
.base
= vector
<< 12;
7095 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7096 kvm_rip_write(vcpu
, 0);
7099 int kvm_arch_hardware_enable(void)
7102 struct kvm_vcpu
*vcpu
;
7107 bool stable
, backwards_tsc
= false;
7109 kvm_shared_msr_cpu_online();
7110 ret
= kvm_x86_ops
->hardware_enable();
7114 local_tsc
= native_read_tsc();
7115 stable
= !check_tsc_unstable();
7116 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7117 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7118 if (!stable
&& vcpu
->cpu
== smp_processor_id())
7119 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
7120 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
7121 backwards_tsc
= true;
7122 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
7123 max_tsc
= vcpu
->arch
.last_host_tsc
;
7129 * Sometimes, even reliable TSCs go backwards. This happens on
7130 * platforms that reset TSC during suspend or hibernate actions, but
7131 * maintain synchronization. We must compensate. Fortunately, we can
7132 * detect that condition here, which happens early in CPU bringup,
7133 * before any KVM threads can be running. Unfortunately, we can't
7134 * bring the TSCs fully up to date with real time, as we aren't yet far
7135 * enough into CPU bringup that we know how much real time has actually
7136 * elapsed; our helper function, get_kernel_ns() will be using boot
7137 * variables that haven't been updated yet.
7139 * So we simply find the maximum observed TSC above, then record the
7140 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
7141 * the adjustment will be applied. Note that we accumulate
7142 * adjustments, in case multiple suspend cycles happen before some VCPU
7143 * gets a chance to run again. In the event that no KVM threads get a
7144 * chance to run, we will miss the entire elapsed period, as we'll have
7145 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7146 * loose cycle time. This isn't too big a deal, since the loss will be
7147 * uniform across all VCPUs (not to mention the scenario is extremely
7148 * unlikely). It is possible that a second hibernate recovery happens
7149 * much faster than a first, causing the observed TSC here to be
7150 * smaller; this would require additional padding adjustment, which is
7151 * why we set last_host_tsc to the local tsc observed here.
7153 * N.B. - this code below runs only on platforms with reliable TSC,
7154 * as that is the only way backwards_tsc is set above. Also note
7155 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7156 * have the same delta_cyc adjustment applied if backwards_tsc
7157 * is detected. Note further, this adjustment is only done once,
7158 * as we reset last_host_tsc on all VCPUs to stop this from being
7159 * called multiple times (one for each physical CPU bringup).
7161 * Platforms with unreliable TSCs don't have to deal with this, they
7162 * will be compensated by the logic in vcpu_load, which sets the TSC to
7163 * catchup mode. This will catchup all VCPUs to real time, but cannot
7164 * guarantee that they stay in perfect synchronization.
7166 if (backwards_tsc
) {
7167 u64 delta_cyc
= max_tsc
- local_tsc
;
7168 backwards_tsc_observed
= true;
7169 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7170 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7171 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
7172 vcpu
->arch
.last_host_tsc
= local_tsc
;
7173 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
7177 * We have to disable TSC offset matching.. if you were
7178 * booting a VM while issuing an S4 host suspend....
7179 * you may have some problem. Solving this issue is
7180 * left as an exercise to the reader.
7182 kvm
->arch
.last_tsc_nsec
= 0;
7183 kvm
->arch
.last_tsc_write
= 0;
7190 void kvm_arch_hardware_disable(void)
7192 kvm_x86_ops
->hardware_disable();
7193 drop_user_return_notifiers();
7196 int kvm_arch_hardware_setup(void)
7198 return kvm_x86_ops
->hardware_setup();
7201 void kvm_arch_hardware_unsetup(void)
7203 kvm_x86_ops
->hardware_unsetup();
7206 void kvm_arch_check_processor_compat(void *rtn
)
7208 kvm_x86_ops
->check_processor_compatibility(rtn
);
7211 bool kvm_vcpu_compatible(struct kvm_vcpu
*vcpu
)
7213 return irqchip_in_kernel(vcpu
->kvm
) == (vcpu
->arch
.apic
!= NULL
);
7216 struct static_key kvm_no_apic_vcpu __read_mostly
;
7218 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
7224 BUG_ON(vcpu
->kvm
== NULL
);
7227 vcpu
->arch
.pv
.pv_unhalted
= false;
7228 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
7229 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_bsp(vcpu
))
7230 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7232 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
7234 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
7239 vcpu
->arch
.pio_data
= page_address(page
);
7241 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
7243 r
= kvm_mmu_create(vcpu
);
7245 goto fail_free_pio_data
;
7247 if (irqchip_in_kernel(kvm
)) {
7248 r
= kvm_create_lapic(vcpu
);
7250 goto fail_mmu_destroy
;
7252 static_key_slow_inc(&kvm_no_apic_vcpu
);
7254 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
7256 if (!vcpu
->arch
.mce_banks
) {
7258 goto fail_free_lapic
;
7260 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
7262 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
)) {
7264 goto fail_free_mce_banks
;
7269 goto fail_free_wbinvd_dirty_mask
;
7271 vcpu
->arch
.ia32_tsc_adjust_msr
= 0x0;
7272 vcpu
->arch
.pv_time_enabled
= false;
7274 vcpu
->arch
.guest_supported_xcr0
= 0;
7275 vcpu
->arch
.guest_xstate_size
= XSAVE_HDR_SIZE
+ XSAVE_HDR_OFFSET
;
7277 kvm_async_pf_hash_reset(vcpu
);
7281 fail_free_wbinvd_dirty_mask
:
7282 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
7283 fail_free_mce_banks
:
7284 kfree(vcpu
->arch
.mce_banks
);
7286 kvm_free_lapic(vcpu
);
7288 kvm_mmu_destroy(vcpu
);
7290 free_page((unsigned long)vcpu
->arch
.pio_data
);
7295 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
7299 kvm_pmu_destroy(vcpu
);
7300 kfree(vcpu
->arch
.mce_banks
);
7301 kvm_free_lapic(vcpu
);
7302 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7303 kvm_mmu_destroy(vcpu
);
7304 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7305 free_page((unsigned long)vcpu
->arch
.pio_data
);
7306 if (!irqchip_in_kernel(vcpu
->kvm
))
7307 static_key_slow_dec(&kvm_no_apic_vcpu
);
7310 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
7312 kvm_x86_ops
->sched_in(vcpu
, cpu
);
7315 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
7320 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
7321 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
7322 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
7323 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
7324 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
7326 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7327 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
7328 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7329 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
7330 &kvm
->arch
.irq_sources_bitmap
);
7332 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
7333 mutex_init(&kvm
->arch
.apic_map_lock
);
7334 spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
7336 pvclock_update_vm_gtod_copy(kvm
);
7338 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
7339 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
7344 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
7347 r
= vcpu_load(vcpu
);
7349 kvm_mmu_unload(vcpu
);
7353 static void kvm_free_vcpus(struct kvm
*kvm
)
7356 struct kvm_vcpu
*vcpu
;
7359 * Unpin any mmu pages first.
7361 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7362 kvm_clear_async_pf_completion_queue(vcpu
);
7363 kvm_unload_vcpu_mmu(vcpu
);
7365 kvm_for_each_vcpu(i
, vcpu
, kvm
)
7366 kvm_arch_vcpu_free(vcpu
);
7368 mutex_lock(&kvm
->lock
);
7369 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
7370 kvm
->vcpus
[i
] = NULL
;
7372 atomic_set(&kvm
->online_vcpus
, 0);
7373 mutex_unlock(&kvm
->lock
);
7376 void kvm_arch_sync_events(struct kvm
*kvm
)
7378 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
7379 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
7380 kvm_free_all_assigned_devices(kvm
);
7384 void kvm_arch_destroy_vm(struct kvm
*kvm
)
7386 if (current
->mm
== kvm
->mm
) {
7388 * Free memory regions allocated on behalf of userspace,
7389 * unless the the memory map has changed due to process exit
7392 struct kvm_userspace_memory_region mem
;
7393 memset(&mem
, 0, sizeof(mem
));
7394 mem
.slot
= APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
;
7395 kvm_set_memory_region(kvm
, &mem
);
7397 mem
.slot
= IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
;
7398 kvm_set_memory_region(kvm
, &mem
);
7400 mem
.slot
= TSS_PRIVATE_MEMSLOT
;
7401 kvm_set_memory_region(kvm
, &mem
);
7403 kvm_iommu_unmap_guest(kvm
);
7404 kfree(kvm
->arch
.vpic
);
7405 kfree(kvm
->arch
.vioapic
);
7406 kvm_free_vcpus(kvm
);
7407 kfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
7410 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*free
,
7411 struct kvm_memory_slot
*dont
)
7415 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7416 if (!dont
|| free
->arch
.rmap
[i
] != dont
->arch
.rmap
[i
]) {
7417 kvm_kvfree(free
->arch
.rmap
[i
]);
7418 free
->arch
.rmap
[i
] = NULL
;
7423 if (!dont
|| free
->arch
.lpage_info
[i
- 1] !=
7424 dont
->arch
.lpage_info
[i
- 1]) {
7425 kvm_kvfree(free
->arch
.lpage_info
[i
- 1]);
7426 free
->arch
.lpage_info
[i
- 1] = NULL
;
7431 int kvm_arch_create_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
,
7432 unsigned long npages
)
7436 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7441 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
7442 slot
->base_gfn
, level
) + 1;
7444 slot
->arch
.rmap
[i
] =
7445 kvm_kvzalloc(lpages
* sizeof(*slot
->arch
.rmap
[i
]));
7446 if (!slot
->arch
.rmap
[i
])
7451 slot
->arch
.lpage_info
[i
- 1] = kvm_kvzalloc(lpages
*
7452 sizeof(*slot
->arch
.lpage_info
[i
- 1]));
7453 if (!slot
->arch
.lpage_info
[i
- 1])
7456 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
7457 slot
->arch
.lpage_info
[i
- 1][0].write_count
= 1;
7458 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
7459 slot
->arch
.lpage_info
[i
- 1][lpages
- 1].write_count
= 1;
7460 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
7462 * If the gfn and userspace address are not aligned wrt each
7463 * other, or if explicitly asked to, disable large page
7464 * support for this slot
7466 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1) ||
7467 !kvm_largepages_enabled()) {
7470 for (j
= 0; j
< lpages
; ++j
)
7471 slot
->arch
.lpage_info
[i
- 1][j
].write_count
= 1;
7478 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7479 kvm_kvfree(slot
->arch
.rmap
[i
]);
7480 slot
->arch
.rmap
[i
] = NULL
;
7484 kvm_kvfree(slot
->arch
.lpage_info
[i
- 1]);
7485 slot
->arch
.lpage_info
[i
- 1] = NULL
;
7490 void kvm_arch_memslots_updated(struct kvm
*kvm
)
7493 * memslots->generation has been incremented.
7494 * mmio generation may have reached its maximum value.
7496 kvm_mmu_invalidate_mmio_sptes(kvm
);
7499 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
7500 struct kvm_memory_slot
*memslot
,
7501 struct kvm_userspace_memory_region
*mem
,
7502 enum kvm_mr_change change
)
7505 * Only private memory slots need to be mapped here since
7506 * KVM_SET_MEMORY_REGION ioctl is no longer supported.
7508 if ((memslot
->id
>= KVM_USER_MEM_SLOTS
) && (change
== KVM_MR_CREATE
)) {
7509 unsigned long userspace_addr
;
7512 * MAP_SHARED to prevent internal slot pages from being moved
7515 userspace_addr
= vm_mmap(NULL
, 0, memslot
->npages
* PAGE_SIZE
,
7516 PROT_READ
| PROT_WRITE
,
7517 MAP_SHARED
| MAP_ANONYMOUS
, 0);
7519 if (IS_ERR((void *)userspace_addr
))
7520 return PTR_ERR((void *)userspace_addr
);
7522 memslot
->userspace_addr
= userspace_addr
;
7528 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
7529 struct kvm_userspace_memory_region
*mem
,
7530 const struct kvm_memory_slot
*old
,
7531 enum kvm_mr_change change
)
7534 int nr_mmu_pages
= 0;
7536 if ((mem
->slot
>= KVM_USER_MEM_SLOTS
) && (change
== KVM_MR_DELETE
)) {
7539 ret
= vm_munmap(old
->userspace_addr
,
7540 old
->npages
* PAGE_SIZE
);
7543 "kvm_vm_ioctl_set_memory_region: "
7544 "failed to munmap memory\n");
7547 if (!kvm
->arch
.n_requested_mmu_pages
)
7548 nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
7551 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
7553 * Write protect all pages for dirty logging.
7555 * All the sptes including the large sptes which point to this
7556 * slot are set to readonly. We can not create any new large
7557 * spte on this slot until the end of the logging.
7559 * See the comments in fast_page_fault().
7561 if ((change
!= KVM_MR_DELETE
) && (mem
->flags
& KVM_MEM_LOG_DIRTY_PAGES
))
7562 kvm_mmu_slot_remove_write_access(kvm
, mem
->slot
);
7565 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
7567 kvm_mmu_invalidate_zap_all_pages(kvm
);
7570 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
7571 struct kvm_memory_slot
*slot
)
7573 kvm_mmu_invalidate_zap_all_pages(kvm
);
7576 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
7578 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
)
7579 kvm_x86_ops
->check_nested_events(vcpu
, false);
7581 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
7582 !vcpu
->arch
.apf
.halted
)
7583 || !list_empty_careful(&vcpu
->async_pf
.done
)
7584 || kvm_apic_has_events(vcpu
)
7585 || vcpu
->arch
.pv
.pv_unhalted
7586 || atomic_read(&vcpu
->arch
.nmi_queued
) ||
7587 (kvm_arch_interrupt_allowed(vcpu
) &&
7588 kvm_cpu_has_interrupt(vcpu
));
7591 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
7593 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
7596 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
7598 return kvm_x86_ops
->interrupt_allowed(vcpu
);
7601 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
7603 if (is_64_bit_mode(vcpu
))
7604 return kvm_rip_read(vcpu
);
7605 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
7606 kvm_rip_read(vcpu
));
7608 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
7610 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
7612 return kvm_get_linear_rip(vcpu
) == linear_rip
;
7614 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
7616 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
7618 unsigned long rflags
;
7620 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
7621 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
7622 rflags
&= ~X86_EFLAGS_TF
;
7625 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
7627 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
7629 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
7630 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
7631 rflags
|= X86_EFLAGS_TF
;
7632 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
7635 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
7637 __kvm_set_rflags(vcpu
, rflags
);
7638 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7640 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
7642 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
7646 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
7650 r
= kvm_mmu_reload(vcpu
);
7654 if (!vcpu
->arch
.mmu
.direct_map
&&
7655 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
7658 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
7661 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
7663 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
7666 static inline u32
kvm_async_pf_next_probe(u32 key
)
7668 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
7671 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7673 u32 key
= kvm_async_pf_hash_fn(gfn
);
7675 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
7676 key
= kvm_async_pf_next_probe(key
);
7678 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
7681 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7684 u32 key
= kvm_async_pf_hash_fn(gfn
);
7686 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
7687 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
7688 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
7689 key
= kvm_async_pf_next_probe(key
);
7694 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7696 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
7699 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7703 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
7705 vcpu
->arch
.apf
.gfns
[i
] = ~0;
7707 j
= kvm_async_pf_next_probe(j
);
7708 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
7710 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
7712 * k lies cyclically in ]i,j]
7714 * |....j i.k.| or |.k..j i...|
7716 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
7717 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
7722 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
7725 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
7729 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
7730 struct kvm_async_pf
*work
)
7732 struct x86_exception fault
;
7734 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
7735 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
7737 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
7738 (vcpu
->arch
.apf
.send_user_only
&&
7739 kvm_x86_ops
->get_cpl(vcpu
) == 0))
7740 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
7741 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
7742 fault
.vector
= PF_VECTOR
;
7743 fault
.error_code_valid
= true;
7744 fault
.error_code
= 0;
7745 fault
.nested_page_fault
= false;
7746 fault
.address
= work
->arch
.token
;
7747 kvm_inject_page_fault(vcpu
, &fault
);
7751 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
7752 struct kvm_async_pf
*work
)
7754 struct x86_exception fault
;
7756 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
7757 if (work
->wakeup_all
)
7758 work
->arch
.token
= ~0; /* broadcast wakeup */
7760 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
7762 if ((vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) &&
7763 !apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
7764 fault
.vector
= PF_VECTOR
;
7765 fault
.error_code_valid
= true;
7766 fault
.error_code
= 0;
7767 fault
.nested_page_fault
= false;
7768 fault
.address
= work
->arch
.token
;
7769 kvm_inject_page_fault(vcpu
, &fault
);
7771 vcpu
->arch
.apf
.halted
= false;
7772 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7775 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
7777 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
7780 return !kvm_event_needs_reinjection(vcpu
) &&
7781 kvm_x86_ops
->interrupt_allowed(vcpu
);
7784 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
7786 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
7788 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
7790 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
7792 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
7794 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
7796 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
7798 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
7800 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
7802 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
7803 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
7804 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
7805 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
7806 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
7807 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
7808 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
7809 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
7810 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
7811 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
7812 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
7813 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
7814 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
7815 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window
);