2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
21 #include <linux/kvm_host.h>
26 #include "kvm_cache_regs.h"
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
33 #include <linux/vmalloc.h>
34 #include <linux/module.h>
35 #include <linux/mman.h>
36 #include <linux/highmem.h>
37 #include <linux/iommu.h>
38 #include <linux/intel-iommu.h>
39 #include <linux/cpufreq.h>
40 #include <trace/events/kvm.h>
41 #undef TRACE_INCLUDE_FILE
42 #define CREATE_TRACE_POINTS
45 #include <asm/uaccess.h>
51 #define MAX_IO_MSRS 256
52 #define CR0_RESERVED_BITS \
53 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
54 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
55 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
56 #define CR4_RESERVED_BITS \
57 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
58 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
59 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
60 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
62 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
64 #define KVM_MAX_MCE_BANKS 32
65 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
68 * - enable syscall per default because its emulated by KVM
69 * - enable LME and LMA per default on 64 bit KVM
72 static u64 __read_mostly efer_reserved_bits
= 0xfffffffffffffafeULL
;
74 static u64 __read_mostly efer_reserved_bits
= 0xfffffffffffffffeULL
;
77 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
78 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
80 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
81 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2
*cpuid
,
82 struct kvm_cpuid_entry2 __user
*entries
);
84 struct kvm_x86_ops
*kvm_x86_ops
;
85 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
88 module_param_named(ignore_msrs
, ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
90 struct kvm_stats_debugfs_item debugfs_entries
[] = {
91 { "pf_fixed", VCPU_STAT(pf_fixed
) },
92 { "pf_guest", VCPU_STAT(pf_guest
) },
93 { "tlb_flush", VCPU_STAT(tlb_flush
) },
94 { "invlpg", VCPU_STAT(invlpg
) },
95 { "exits", VCPU_STAT(exits
) },
96 { "io_exits", VCPU_STAT(io_exits
) },
97 { "mmio_exits", VCPU_STAT(mmio_exits
) },
98 { "signal_exits", VCPU_STAT(signal_exits
) },
99 { "irq_window", VCPU_STAT(irq_window_exits
) },
100 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
101 { "halt_exits", VCPU_STAT(halt_exits
) },
102 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
103 { "hypercalls", VCPU_STAT(hypercalls
) },
104 { "request_irq", VCPU_STAT(request_irq_exits
) },
105 { "irq_exits", VCPU_STAT(irq_exits
) },
106 { "host_state_reload", VCPU_STAT(host_state_reload
) },
107 { "efer_reload", VCPU_STAT(efer_reload
) },
108 { "fpu_reload", VCPU_STAT(fpu_reload
) },
109 { "insn_emulation", VCPU_STAT(insn_emulation
) },
110 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
111 { "irq_injections", VCPU_STAT(irq_injections
) },
112 { "nmi_injections", VCPU_STAT(nmi_injections
) },
113 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
114 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
115 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
116 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
117 { "mmu_flooded", VM_STAT(mmu_flooded
) },
118 { "mmu_recycled", VM_STAT(mmu_recycled
) },
119 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
120 { "mmu_unsync", VM_STAT(mmu_unsync
) },
121 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
122 { "largepages", VM_STAT(lpages
) },
126 unsigned long segment_base(u16 selector
)
128 struct descriptor_table gdt
;
129 struct desc_struct
*d
;
130 unsigned long table_base
;
137 table_base
= gdt
.base
;
139 if (selector
& 4) { /* from ldt */
140 u16 ldt_selector
= kvm_read_ldt();
142 table_base
= segment_base(ldt_selector
);
144 d
= (struct desc_struct
*)(table_base
+ (selector
& ~7));
145 v
= get_desc_base(d
);
147 if (d
->s
== 0 && (d
->type
== 2 || d
->type
== 9 || d
->type
== 11))
148 v
|= ((unsigned long)((struct ldttss_desc64
*)d
)->base3
) << 32;
152 EXPORT_SYMBOL_GPL(segment_base
);
154 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
156 if (irqchip_in_kernel(vcpu
->kvm
))
157 return vcpu
->arch
.apic_base
;
159 return vcpu
->arch
.apic_base
;
161 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
163 void kvm_set_apic_base(struct kvm_vcpu
*vcpu
, u64 data
)
165 /* TODO: reserve bits check */
166 if (irqchip_in_kernel(vcpu
->kvm
))
167 kvm_lapic_set_base(vcpu
, data
);
169 vcpu
->arch
.apic_base
= data
;
171 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
173 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
175 WARN_ON(vcpu
->arch
.exception
.pending
);
176 vcpu
->arch
.exception
.pending
= true;
177 vcpu
->arch
.exception
.has_error_code
= false;
178 vcpu
->arch
.exception
.nr
= nr
;
180 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
182 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, unsigned long addr
,
185 ++vcpu
->stat
.pf_guest
;
187 if (vcpu
->arch
.exception
.pending
) {
188 switch(vcpu
->arch
.exception
.nr
) {
190 /* triple fault -> shutdown */
191 set_bit(KVM_REQ_TRIPLE_FAULT
, &vcpu
->requests
);
194 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
195 vcpu
->arch
.exception
.error_code
= 0;
198 /* replace previous exception with a new one in a hope
199 that instruction re-execution will regenerate lost
201 vcpu
->arch
.exception
.pending
= false;
205 vcpu
->arch
.cr2
= addr
;
206 kvm_queue_exception_e(vcpu
, PF_VECTOR
, error_code
);
209 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
211 vcpu
->arch
.nmi_pending
= 1;
213 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
215 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
217 WARN_ON(vcpu
->arch
.exception
.pending
);
218 vcpu
->arch
.exception
.pending
= true;
219 vcpu
->arch
.exception
.has_error_code
= true;
220 vcpu
->arch
.exception
.nr
= nr
;
221 vcpu
->arch
.exception
.error_code
= error_code
;
223 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
226 * Load the pae pdptrs. Return true is they are all valid.
228 int load_pdptrs(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
230 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
231 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
234 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.pdptrs
)];
236 ret
= kvm_read_guest_page(vcpu
->kvm
, pdpt_gfn
, pdpte
,
237 offset
* sizeof(u64
), sizeof(pdpte
));
242 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
243 if (is_present_gpte(pdpte
[i
]) &&
244 (pdpte
[i
] & vcpu
->arch
.mmu
.rsvd_bits_mask
[0][2])) {
251 memcpy(vcpu
->arch
.pdptrs
, pdpte
, sizeof(vcpu
->arch
.pdptrs
));
252 __set_bit(VCPU_EXREG_PDPTR
,
253 (unsigned long *)&vcpu
->arch
.regs_avail
);
254 __set_bit(VCPU_EXREG_PDPTR
,
255 (unsigned long *)&vcpu
->arch
.regs_dirty
);
260 EXPORT_SYMBOL_GPL(load_pdptrs
);
262 static bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
264 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.pdptrs
)];
268 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
271 if (!test_bit(VCPU_EXREG_PDPTR
,
272 (unsigned long *)&vcpu
->arch
.regs_avail
))
275 r
= kvm_read_guest(vcpu
->kvm
, vcpu
->arch
.cr3
& ~31u, pdpte
, sizeof(pdpte
));
278 changed
= memcmp(pdpte
, vcpu
->arch
.pdptrs
, sizeof(pdpte
)) != 0;
284 void kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
286 if (cr0
& CR0_RESERVED_BITS
) {
287 printk(KERN_DEBUG
"set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
288 cr0
, vcpu
->arch
.cr0
);
289 kvm_inject_gp(vcpu
, 0);
293 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
)) {
294 printk(KERN_DEBUG
"set_cr0: #GP, CD == 0 && NW == 1\n");
295 kvm_inject_gp(vcpu
, 0);
299 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
)) {
300 printk(KERN_DEBUG
"set_cr0: #GP, set PG flag "
301 "and a clear PE flag\n");
302 kvm_inject_gp(vcpu
, 0);
306 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
308 if ((vcpu
->arch
.shadow_efer
& EFER_LME
)) {
312 printk(KERN_DEBUG
"set_cr0: #GP, start paging "
313 "in long mode while PAE is disabled\n");
314 kvm_inject_gp(vcpu
, 0);
317 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
319 printk(KERN_DEBUG
"set_cr0: #GP, start paging "
320 "in long mode while CS.L == 1\n");
321 kvm_inject_gp(vcpu
, 0);
327 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.cr3
)) {
328 printk(KERN_DEBUG
"set_cr0: #GP, pdptrs "
330 kvm_inject_gp(vcpu
, 0);
336 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
337 vcpu
->arch
.cr0
= cr0
;
339 kvm_mmu_reset_context(vcpu
);
342 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
344 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
346 kvm_set_cr0(vcpu
, (vcpu
->arch
.cr0
& ~0x0ful
) | (msw
& 0x0f));
348 EXPORT_SYMBOL_GPL(kvm_lmsw
);
350 void kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
352 unsigned long old_cr4
= vcpu
->arch
.cr4
;
353 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
;
355 if (cr4
& CR4_RESERVED_BITS
) {
356 printk(KERN_DEBUG
"set_cr4: #GP, reserved bits\n");
357 kvm_inject_gp(vcpu
, 0);
361 if (is_long_mode(vcpu
)) {
362 if (!(cr4
& X86_CR4_PAE
)) {
363 printk(KERN_DEBUG
"set_cr4: #GP, clearing PAE while "
365 kvm_inject_gp(vcpu
, 0);
368 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
369 && ((cr4
^ old_cr4
) & pdptr_bits
)
370 && !load_pdptrs(vcpu
, vcpu
->arch
.cr3
)) {
371 printk(KERN_DEBUG
"set_cr4: #GP, pdptrs reserved bits\n");
372 kvm_inject_gp(vcpu
, 0);
376 if (cr4
& X86_CR4_VMXE
) {
377 printk(KERN_DEBUG
"set_cr4: #GP, setting VMXE\n");
378 kvm_inject_gp(vcpu
, 0);
381 kvm_x86_ops
->set_cr4(vcpu
, cr4
);
382 vcpu
->arch
.cr4
= cr4
;
383 vcpu
->arch
.mmu
.base_role
.cr4_pge
= (cr4
& X86_CR4_PGE
) && !tdp_enabled
;
384 kvm_mmu_reset_context(vcpu
);
386 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
388 void kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
390 if (cr3
== vcpu
->arch
.cr3
&& !pdptrs_changed(vcpu
)) {
391 kvm_mmu_sync_roots(vcpu
);
392 kvm_mmu_flush_tlb(vcpu
);
396 if (is_long_mode(vcpu
)) {
397 if (cr3
& CR3_L_MODE_RESERVED_BITS
) {
398 printk(KERN_DEBUG
"set_cr3: #GP, reserved bits\n");
399 kvm_inject_gp(vcpu
, 0);
404 if (cr3
& CR3_PAE_RESERVED_BITS
) {
406 "set_cr3: #GP, reserved bits\n");
407 kvm_inject_gp(vcpu
, 0);
410 if (is_paging(vcpu
) && !load_pdptrs(vcpu
, cr3
)) {
411 printk(KERN_DEBUG
"set_cr3: #GP, pdptrs "
413 kvm_inject_gp(vcpu
, 0);
418 * We don't check reserved bits in nonpae mode, because
419 * this isn't enforced, and VMware depends on this.
424 * Does the new cr3 value map to physical memory? (Note, we
425 * catch an invalid cr3 even in real-mode, because it would
426 * cause trouble later on when we turn on paging anyway.)
428 * A real CPU would silently accept an invalid cr3 and would
429 * attempt to use it - with largely undefined (and often hard
430 * to debug) behavior on the guest side.
432 if (unlikely(!gfn_to_memslot(vcpu
->kvm
, cr3
>> PAGE_SHIFT
)))
433 kvm_inject_gp(vcpu
, 0);
435 vcpu
->arch
.cr3
= cr3
;
436 vcpu
->arch
.mmu
.new_cr3(vcpu
);
439 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
441 void kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
443 if (cr8
& CR8_RESERVED_BITS
) {
444 printk(KERN_DEBUG
"set_cr8: #GP, reserved bits 0x%lx\n", cr8
);
445 kvm_inject_gp(vcpu
, 0);
448 if (irqchip_in_kernel(vcpu
->kvm
))
449 kvm_lapic_set_tpr(vcpu
, cr8
);
451 vcpu
->arch
.cr8
= cr8
;
453 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
455 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
457 if (irqchip_in_kernel(vcpu
->kvm
))
458 return kvm_lapic_get_cr8(vcpu
);
460 return vcpu
->arch
.cr8
;
462 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
464 static inline u32
bit(int bitno
)
466 return 1 << (bitno
& 31);
470 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
471 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
473 * This list is modified at module load time to reflect the
474 * capabilities of the host cpu.
476 static u32 msrs_to_save
[] = {
477 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
480 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
482 MSR_IA32_TSC
, MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
483 MSR_IA32_PERF_STATUS
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
486 static unsigned num_msrs_to_save
;
488 static u32 emulated_msrs
[] = {
489 MSR_IA32_MISC_ENABLE
,
492 static void set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
494 if (efer
& efer_reserved_bits
) {
495 printk(KERN_DEBUG
"set_efer: 0x%llx #GP, reserved bits\n",
497 kvm_inject_gp(vcpu
, 0);
502 && (vcpu
->arch
.shadow_efer
& EFER_LME
) != (efer
& EFER_LME
)) {
503 printk(KERN_DEBUG
"set_efer: #GP, change LME while paging\n");
504 kvm_inject_gp(vcpu
, 0);
508 if (efer
& EFER_FFXSR
) {
509 struct kvm_cpuid_entry2
*feat
;
511 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
512 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
))) {
513 printk(KERN_DEBUG
"set_efer: #GP, enable FFXSR w/o CPUID capability\n");
514 kvm_inject_gp(vcpu
, 0);
519 if (efer
& EFER_SVME
) {
520 struct kvm_cpuid_entry2
*feat
;
522 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
523 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
))) {
524 printk(KERN_DEBUG
"set_efer: #GP, enable SVM w/o SVM\n");
525 kvm_inject_gp(vcpu
, 0);
530 kvm_x86_ops
->set_efer(vcpu
, efer
);
533 efer
|= vcpu
->arch
.shadow_efer
& EFER_LMA
;
535 vcpu
->arch
.shadow_efer
= efer
;
537 vcpu
->arch
.mmu
.base_role
.nxe
= (efer
& EFER_NX
) && !tdp_enabled
;
538 kvm_mmu_reset_context(vcpu
);
541 void kvm_enable_efer_bits(u64 mask
)
543 efer_reserved_bits
&= ~mask
;
545 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
549 * Writes msr value into into the appropriate "register".
550 * Returns 0 on success, non-0 otherwise.
551 * Assumes vcpu_load() was already called.
553 int kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64 data
)
555 return kvm_x86_ops
->set_msr(vcpu
, msr_index
, data
);
559 * Adapt set_msr() to msr_io()'s calling convention
561 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
563 return kvm_set_msr(vcpu
, index
, *data
);
566 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
569 struct pvclock_wall_clock wc
;
570 struct timespec now
, sys
, boot
;
577 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
580 * The guest calculates current wall clock time by adding
581 * system time (updated by kvm_write_guest_time below) to the
582 * wall clock specified here. guest system time equals host
583 * system time for us, thus we must fill in host boot time here.
585 now
= current_kernel_time();
587 boot
= ns_to_timespec(timespec_to_ns(&now
) - timespec_to_ns(&sys
));
589 wc
.sec
= boot
.tv_sec
;
590 wc
.nsec
= boot
.tv_nsec
;
591 wc
.version
= version
;
593 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
596 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
599 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
601 uint32_t quotient
, remainder
;
603 /* Don't try to replace with do_div(), this one calculates
604 * "(dividend << 32) / divisor" */
606 : "=a" (quotient
), "=d" (remainder
)
607 : "0" (0), "1" (dividend
), "r" (divisor
) );
611 static void kvm_set_time_scale(uint32_t tsc_khz
, struct pvclock_vcpu_time_info
*hv_clock
)
613 uint64_t nsecs
= 1000000000LL;
618 tps64
= tsc_khz
* 1000LL;
619 while (tps64
> nsecs
*2) {
624 tps32
= (uint32_t)tps64
;
625 while (tps32
<= (uint32_t)nsecs
) {
630 hv_clock
->tsc_shift
= shift
;
631 hv_clock
->tsc_to_system_mul
= div_frac(nsecs
, tps32
);
633 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
634 __func__
, tsc_khz
, hv_clock
->tsc_shift
,
635 hv_clock
->tsc_to_system_mul
);
638 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
640 static void kvm_write_guest_time(struct kvm_vcpu
*v
)
644 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
646 unsigned long this_tsc_khz
;
648 if ((!vcpu
->time_page
))
651 this_tsc_khz
= get_cpu_var(cpu_tsc_khz
);
652 if (unlikely(vcpu
->hv_clock_tsc_khz
!= this_tsc_khz
)) {
653 kvm_set_time_scale(this_tsc_khz
, &vcpu
->hv_clock
);
654 vcpu
->hv_clock_tsc_khz
= this_tsc_khz
;
656 put_cpu_var(cpu_tsc_khz
);
658 /* Keep irq disabled to prevent changes to the clock */
659 local_irq_save(flags
);
660 kvm_get_msr(v
, MSR_IA32_TSC
, &vcpu
->hv_clock
.tsc_timestamp
);
662 local_irq_restore(flags
);
664 /* With all the info we got, fill in the values */
666 vcpu
->hv_clock
.system_time
= ts
.tv_nsec
+
667 (NSEC_PER_SEC
* (u64
)ts
.tv_sec
);
669 * The interface expects us to write an even number signaling that the
670 * update is finished. Since the guest won't see the intermediate
671 * state, we just increase by 2 at the end.
673 vcpu
->hv_clock
.version
+= 2;
675 shared_kaddr
= kmap_atomic(vcpu
->time_page
, KM_USER0
);
677 memcpy(shared_kaddr
+ vcpu
->time_offset
, &vcpu
->hv_clock
,
678 sizeof(vcpu
->hv_clock
));
680 kunmap_atomic(shared_kaddr
, KM_USER0
);
682 mark_page_dirty(v
->kvm
, vcpu
->time
>> PAGE_SHIFT
);
685 static int kvm_request_guest_time_update(struct kvm_vcpu
*v
)
687 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
689 if (!vcpu
->time_page
)
691 set_bit(KVM_REQ_KVMCLOCK_UPDATE
, &v
->requests
);
695 static bool msr_mtrr_valid(unsigned msr
)
698 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR
- 1:
699 case MSR_MTRRfix64K_00000
:
700 case MSR_MTRRfix16K_80000
:
701 case MSR_MTRRfix16K_A0000
:
702 case MSR_MTRRfix4K_C0000
:
703 case MSR_MTRRfix4K_C8000
:
704 case MSR_MTRRfix4K_D0000
:
705 case MSR_MTRRfix4K_D8000
:
706 case MSR_MTRRfix4K_E0000
:
707 case MSR_MTRRfix4K_E8000
:
708 case MSR_MTRRfix4K_F0000
:
709 case MSR_MTRRfix4K_F8000
:
710 case MSR_MTRRdefType
:
711 case MSR_IA32_CR_PAT
:
719 static bool valid_pat_type(unsigned t
)
721 return t
< 8 && (1 << t
) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
724 static bool valid_mtrr_type(unsigned t
)
726 return t
< 8 && (1 << t
) & 0x73; /* 0, 1, 4, 5, 6 */
729 static bool mtrr_valid(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
733 if (!msr_mtrr_valid(msr
))
736 if (msr
== MSR_IA32_CR_PAT
) {
737 for (i
= 0; i
< 8; i
++)
738 if (!valid_pat_type((data
>> (i
* 8)) & 0xff))
741 } else if (msr
== MSR_MTRRdefType
) {
744 return valid_mtrr_type(data
& 0xff);
745 } else if (msr
>= MSR_MTRRfix64K_00000
&& msr
<= MSR_MTRRfix4K_F8000
) {
746 for (i
= 0; i
< 8 ; i
++)
747 if (!valid_mtrr_type((data
>> (i
* 8)) & 0xff))
753 return valid_mtrr_type(data
& 0xff);
756 static int set_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
758 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
760 if (!mtrr_valid(vcpu
, msr
, data
))
763 if (msr
== MSR_MTRRdefType
) {
764 vcpu
->arch
.mtrr_state
.def_type
= data
;
765 vcpu
->arch
.mtrr_state
.enabled
= (data
& 0xc00) >> 10;
766 } else if (msr
== MSR_MTRRfix64K_00000
)
768 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
769 p
[1 + msr
- MSR_MTRRfix16K_80000
] = data
;
770 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
771 p
[3 + msr
- MSR_MTRRfix4K_C0000
] = data
;
772 else if (msr
== MSR_IA32_CR_PAT
)
773 vcpu
->arch
.pat
= data
;
774 else { /* Variable MTRRs */
775 int idx
, is_mtrr_mask
;
778 idx
= (msr
- 0x200) / 2;
779 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
782 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
785 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
789 kvm_mmu_reset_context(vcpu
);
793 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
795 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
796 unsigned bank_num
= mcg_cap
& 0xff;
799 case MSR_IA32_MCG_STATUS
:
800 vcpu
->arch
.mcg_status
= data
;
802 case MSR_IA32_MCG_CTL
:
803 if (!(mcg_cap
& MCG_CTL_P
))
805 if (data
!= 0 && data
!= ~(u64
)0)
807 vcpu
->arch
.mcg_ctl
= data
;
810 if (msr
>= MSR_IA32_MC0_CTL
&&
811 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
812 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
813 /* only 0 or all 1s can be written to IA32_MCi_CTL */
814 if ((offset
& 0x3) == 0 &&
815 data
!= 0 && data
!= ~(u64
)0)
817 vcpu
->arch
.mce_banks
[offset
] = data
;
825 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
829 set_efer(vcpu
, data
);
832 data
&= ~(u64
)0x40; /* ignore flush filter disable */
834 pr_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
839 case MSR_FAM10H_MMIO_CONF_BASE
:
841 pr_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
846 case MSR_AMD64_NB_CFG
:
848 case MSR_IA32_DEBUGCTLMSR
:
850 /* We support the non-activated case already */
852 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
853 /* Values other than LBR and BTF are vendor-specific,
854 thus reserved and should throw a #GP */
857 pr_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
860 case MSR_IA32_UCODE_REV
:
861 case MSR_IA32_UCODE_WRITE
:
862 case MSR_VM_HSAVE_PA
:
863 case MSR_AMD64_PATCH_LOADER
:
865 case 0x200 ... 0x2ff:
866 return set_msr_mtrr(vcpu
, msr
, data
);
867 case MSR_IA32_APICBASE
:
868 kvm_set_apic_base(vcpu
, data
);
870 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
871 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
872 case MSR_IA32_MISC_ENABLE
:
873 vcpu
->arch
.ia32_misc_enable_msr
= data
;
875 case MSR_KVM_WALL_CLOCK
:
876 vcpu
->kvm
->arch
.wall_clock
= data
;
877 kvm_write_wall_clock(vcpu
->kvm
, data
);
879 case MSR_KVM_SYSTEM_TIME
: {
880 if (vcpu
->arch
.time_page
) {
881 kvm_release_page_dirty(vcpu
->arch
.time_page
);
882 vcpu
->arch
.time_page
= NULL
;
885 vcpu
->arch
.time
= data
;
887 /* we verify if the enable bit is set... */
891 /* ...but clean it before doing the actual write */
892 vcpu
->arch
.time_offset
= data
& ~(PAGE_MASK
| 1);
894 vcpu
->arch
.time_page
=
895 gfn_to_page(vcpu
->kvm
, data
>> PAGE_SHIFT
);
897 if (is_error_page(vcpu
->arch
.time_page
)) {
898 kvm_release_page_clean(vcpu
->arch
.time_page
);
899 vcpu
->arch
.time_page
= NULL
;
902 kvm_request_guest_time_update(vcpu
);
905 case MSR_IA32_MCG_CTL
:
906 case MSR_IA32_MCG_STATUS
:
907 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
908 return set_msr_mce(vcpu
, msr
, data
);
910 /* Performance counters are not protected by a CPUID bit,
911 * so we should check all of them in the generic path for the sake of
912 * cross vendor migration.
913 * Writing a zero into the event select MSRs disables them,
914 * which we perfectly emulate ;-). Any other value should be at least
915 * reported, some guests depend on them.
917 case MSR_P6_EVNTSEL0
:
918 case MSR_P6_EVNTSEL1
:
919 case MSR_K7_EVNTSEL0
:
920 case MSR_K7_EVNTSEL1
:
921 case MSR_K7_EVNTSEL2
:
922 case MSR_K7_EVNTSEL3
:
924 pr_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
925 "0x%x data 0x%llx\n", msr
, data
);
927 /* at least RHEL 4 unconditionally writes to the perfctr registers,
928 * so we ignore writes to make it happy.
930 case MSR_P6_PERFCTR0
:
931 case MSR_P6_PERFCTR1
:
932 case MSR_K7_PERFCTR0
:
933 case MSR_K7_PERFCTR1
:
934 case MSR_K7_PERFCTR2
:
935 case MSR_K7_PERFCTR3
:
936 pr_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
937 "0x%x data 0x%llx\n", msr
, data
);
941 pr_unimpl(vcpu
, "unhandled wrmsr: 0x%x data %llx\n",
945 pr_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n",
952 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
956 * Reads an msr value (of 'msr_index') into 'pdata'.
957 * Returns 0 on success, non-0 otherwise.
958 * Assumes vcpu_load() was already called.
960 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
962 return kvm_x86_ops
->get_msr(vcpu
, msr_index
, pdata
);
965 static int get_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
967 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
969 if (!msr_mtrr_valid(msr
))
972 if (msr
== MSR_MTRRdefType
)
973 *pdata
= vcpu
->arch
.mtrr_state
.def_type
+
974 (vcpu
->arch
.mtrr_state
.enabled
<< 10);
975 else if (msr
== MSR_MTRRfix64K_00000
)
977 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
978 *pdata
= p
[1 + msr
- MSR_MTRRfix16K_80000
];
979 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
980 *pdata
= p
[3 + msr
- MSR_MTRRfix4K_C0000
];
981 else if (msr
== MSR_IA32_CR_PAT
)
982 *pdata
= vcpu
->arch
.pat
;
983 else { /* Variable MTRRs */
984 int idx
, is_mtrr_mask
;
987 idx
= (msr
- 0x200) / 2;
988 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
991 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
994 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
1001 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1004 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1005 unsigned bank_num
= mcg_cap
& 0xff;
1008 case MSR_IA32_P5_MC_ADDR
:
1009 case MSR_IA32_P5_MC_TYPE
:
1012 case MSR_IA32_MCG_CAP
:
1013 data
= vcpu
->arch
.mcg_cap
;
1015 case MSR_IA32_MCG_CTL
:
1016 if (!(mcg_cap
& MCG_CTL_P
))
1018 data
= vcpu
->arch
.mcg_ctl
;
1020 case MSR_IA32_MCG_STATUS
:
1021 data
= vcpu
->arch
.mcg_status
;
1024 if (msr
>= MSR_IA32_MC0_CTL
&&
1025 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
1026 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1027 data
= vcpu
->arch
.mce_banks
[offset
];
1036 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1041 case MSR_IA32_PLATFORM_ID
:
1042 case MSR_IA32_UCODE_REV
:
1043 case MSR_IA32_EBL_CR_POWERON
:
1044 case MSR_IA32_DEBUGCTLMSR
:
1045 case MSR_IA32_LASTBRANCHFROMIP
:
1046 case MSR_IA32_LASTBRANCHTOIP
:
1047 case MSR_IA32_LASTINTFROMIP
:
1048 case MSR_IA32_LASTINTTOIP
:
1051 case MSR_VM_HSAVE_PA
:
1052 case MSR_P6_PERFCTR0
:
1053 case MSR_P6_PERFCTR1
:
1054 case MSR_P6_EVNTSEL0
:
1055 case MSR_P6_EVNTSEL1
:
1056 case MSR_K7_EVNTSEL0
:
1057 case MSR_K7_PERFCTR0
:
1058 case MSR_K8_INT_PENDING_MSG
:
1059 case MSR_AMD64_NB_CFG
:
1060 case MSR_FAM10H_MMIO_CONF_BASE
:
1064 data
= 0x500 | KVM_NR_VAR_MTRR
;
1066 case 0x200 ... 0x2ff:
1067 return get_msr_mtrr(vcpu
, msr
, pdata
);
1068 case 0xcd: /* fsb frequency */
1071 case MSR_IA32_APICBASE
:
1072 data
= kvm_get_apic_base(vcpu
);
1074 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
1075 return kvm_x2apic_msr_read(vcpu
, msr
, pdata
);
1077 case MSR_IA32_MISC_ENABLE
:
1078 data
= vcpu
->arch
.ia32_misc_enable_msr
;
1080 case MSR_IA32_PERF_STATUS
:
1081 /* TSC increment by tick */
1083 /* CPU multiplier */
1084 data
|= (((uint64_t)4ULL) << 40);
1087 data
= vcpu
->arch
.shadow_efer
;
1089 case MSR_KVM_WALL_CLOCK
:
1090 data
= vcpu
->kvm
->arch
.wall_clock
;
1092 case MSR_KVM_SYSTEM_TIME
:
1093 data
= vcpu
->arch
.time
;
1095 case MSR_IA32_P5_MC_ADDR
:
1096 case MSR_IA32_P5_MC_TYPE
:
1097 case MSR_IA32_MCG_CAP
:
1098 case MSR_IA32_MCG_CTL
:
1099 case MSR_IA32_MCG_STATUS
:
1100 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
1101 return get_msr_mce(vcpu
, msr
, pdata
);
1104 pr_unimpl(vcpu
, "unhandled rdmsr: 0x%x\n", msr
);
1107 pr_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr
);
1115 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
1118 * Read or write a bunch of msrs. All parameters are kernel addresses.
1120 * @return number of msrs set successfully.
1122 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
1123 struct kvm_msr_entry
*entries
,
1124 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
1125 unsigned index
, u64
*data
))
1131 down_read(&vcpu
->kvm
->slots_lock
);
1132 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
1133 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
1135 up_read(&vcpu
->kvm
->slots_lock
);
1143 * Read or write a bunch of msrs. Parameters are user addresses.
1145 * @return number of msrs set successfully.
1147 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
1148 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
1149 unsigned index
, u64
*data
),
1152 struct kvm_msrs msrs
;
1153 struct kvm_msr_entry
*entries
;
1158 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
1162 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
1166 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
1167 entries
= vmalloc(size
);
1172 if (copy_from_user(entries
, user_msrs
->entries
, size
))
1175 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
1180 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
1191 int kvm_dev_ioctl_check_extension(long ext
)
1196 case KVM_CAP_IRQCHIP
:
1198 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
1199 case KVM_CAP_SET_TSS_ADDR
:
1200 case KVM_CAP_EXT_CPUID
:
1201 case KVM_CAP_CLOCKSOURCE
:
1203 case KVM_CAP_NOP_IO_DELAY
:
1204 case KVM_CAP_MP_STATE
:
1205 case KVM_CAP_SYNC_MMU
:
1206 case KVM_CAP_REINJECT_CONTROL
:
1207 case KVM_CAP_IRQ_INJECT_STATUS
:
1208 case KVM_CAP_ASSIGN_DEV_IRQ
:
1210 case KVM_CAP_IOEVENTFD
:
1212 case KVM_CAP_PIT_STATE2
:
1213 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
1216 case KVM_CAP_COALESCED_MMIO
:
1217 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
1220 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
1222 case KVM_CAP_NR_VCPUS
:
1225 case KVM_CAP_NR_MEMSLOTS
:
1226 r
= KVM_MEMORY_SLOTS
;
1228 case KVM_CAP_PV_MMU
:
1235 r
= KVM_MAX_MCE_BANKS
;
1245 long kvm_arch_dev_ioctl(struct file
*filp
,
1246 unsigned int ioctl
, unsigned long arg
)
1248 void __user
*argp
= (void __user
*)arg
;
1252 case KVM_GET_MSR_INDEX_LIST
: {
1253 struct kvm_msr_list __user
*user_msr_list
= argp
;
1254 struct kvm_msr_list msr_list
;
1258 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
1261 msr_list
.nmsrs
= num_msrs_to_save
+ ARRAY_SIZE(emulated_msrs
);
1262 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
1265 if (n
< msr_list
.nmsrs
)
1268 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
1269 num_msrs_to_save
* sizeof(u32
)))
1271 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
1273 ARRAY_SIZE(emulated_msrs
) * sizeof(u32
)))
1278 case KVM_GET_SUPPORTED_CPUID
: {
1279 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
1280 struct kvm_cpuid2 cpuid
;
1283 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
1285 r
= kvm_dev_ioctl_get_supported_cpuid(&cpuid
,
1286 cpuid_arg
->entries
);
1291 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
1296 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
1299 mce_cap
= KVM_MCE_CAP_SUPPORTED
;
1301 if (copy_to_user(argp
, &mce_cap
, sizeof mce_cap
))
1313 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
1315 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
1316 kvm_request_guest_time_update(vcpu
);
1319 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
1321 kvm_x86_ops
->vcpu_put(vcpu
);
1322 kvm_put_guest_fpu(vcpu
);
1325 static int is_efer_nx(void)
1327 unsigned long long efer
= 0;
1329 rdmsrl_safe(MSR_EFER
, &efer
);
1330 return efer
& EFER_NX
;
1333 static void cpuid_fix_nx_cap(struct kvm_vcpu
*vcpu
)
1336 struct kvm_cpuid_entry2
*e
, *entry
;
1339 for (i
= 0; i
< vcpu
->arch
.cpuid_nent
; ++i
) {
1340 e
= &vcpu
->arch
.cpuid_entries
[i
];
1341 if (e
->function
== 0x80000001) {
1346 if (entry
&& (entry
->edx
& (1 << 20)) && !is_efer_nx()) {
1347 entry
->edx
&= ~(1 << 20);
1348 printk(KERN_INFO
"kvm: guest NX capability removed\n");
1352 /* when an old userspace process fills a new kernel module */
1353 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu
*vcpu
,
1354 struct kvm_cpuid
*cpuid
,
1355 struct kvm_cpuid_entry __user
*entries
)
1358 struct kvm_cpuid_entry
*cpuid_entries
;
1361 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
1364 cpuid_entries
= vmalloc(sizeof(struct kvm_cpuid_entry
) * cpuid
->nent
);
1368 if (copy_from_user(cpuid_entries
, entries
,
1369 cpuid
->nent
* sizeof(struct kvm_cpuid_entry
)))
1371 for (i
= 0; i
< cpuid
->nent
; i
++) {
1372 vcpu
->arch
.cpuid_entries
[i
].function
= cpuid_entries
[i
].function
;
1373 vcpu
->arch
.cpuid_entries
[i
].eax
= cpuid_entries
[i
].eax
;
1374 vcpu
->arch
.cpuid_entries
[i
].ebx
= cpuid_entries
[i
].ebx
;
1375 vcpu
->arch
.cpuid_entries
[i
].ecx
= cpuid_entries
[i
].ecx
;
1376 vcpu
->arch
.cpuid_entries
[i
].edx
= cpuid_entries
[i
].edx
;
1377 vcpu
->arch
.cpuid_entries
[i
].index
= 0;
1378 vcpu
->arch
.cpuid_entries
[i
].flags
= 0;
1379 vcpu
->arch
.cpuid_entries
[i
].padding
[0] = 0;
1380 vcpu
->arch
.cpuid_entries
[i
].padding
[1] = 0;
1381 vcpu
->arch
.cpuid_entries
[i
].padding
[2] = 0;
1383 vcpu
->arch
.cpuid_nent
= cpuid
->nent
;
1384 cpuid_fix_nx_cap(vcpu
);
1386 kvm_apic_set_version(vcpu
);
1389 vfree(cpuid_entries
);
1394 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu
*vcpu
,
1395 struct kvm_cpuid2
*cpuid
,
1396 struct kvm_cpuid_entry2 __user
*entries
)
1401 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
1404 if (copy_from_user(&vcpu
->arch
.cpuid_entries
, entries
,
1405 cpuid
->nent
* sizeof(struct kvm_cpuid_entry2
)))
1407 vcpu
->arch
.cpuid_nent
= cpuid
->nent
;
1408 kvm_apic_set_version(vcpu
);
1415 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu
*vcpu
,
1416 struct kvm_cpuid2
*cpuid
,
1417 struct kvm_cpuid_entry2 __user
*entries
)
1422 if (cpuid
->nent
< vcpu
->arch
.cpuid_nent
)
1425 if (copy_to_user(entries
, &vcpu
->arch
.cpuid_entries
,
1426 vcpu
->arch
.cpuid_nent
* sizeof(struct kvm_cpuid_entry2
)))
1431 cpuid
->nent
= vcpu
->arch
.cpuid_nent
;
1435 static void do_cpuid_1_ent(struct kvm_cpuid_entry2
*entry
, u32 function
,
1438 entry
->function
= function
;
1439 entry
->index
= index
;
1440 cpuid_count(entry
->function
, entry
->index
,
1441 &entry
->eax
, &entry
->ebx
, &entry
->ecx
, &entry
->edx
);
1445 #define F(x) bit(X86_FEATURE_##x)
1447 static void do_cpuid_ent(struct kvm_cpuid_entry2
*entry
, u32 function
,
1448 u32 index
, int *nent
, int maxnent
)
1450 unsigned f_nx
= is_efer_nx() ? F(NX
) : 0;
1451 unsigned f_gbpages
= kvm_x86_ops
->gb_page_enable() ? F(GBPAGES
) : 0;
1452 #ifdef CONFIG_X86_64
1453 unsigned f_lm
= F(LM
);
1459 const u32 kvm_supported_word0_x86_features
=
1460 F(FPU
) | F(VME
) | F(DE
) | F(PSE
) |
1461 F(TSC
) | F(MSR
) | F(PAE
) | F(MCE
) |
1462 F(CX8
) | F(APIC
) | 0 /* Reserved */ | F(SEP
) |
1463 F(MTRR
) | F(PGE
) | F(MCA
) | F(CMOV
) |
1464 F(PAT
) | F(PSE36
) | 0 /* PSN */ | F(CLFLSH
) |
1465 0 /* Reserved, DS, ACPI */ | F(MMX
) |
1466 F(FXSR
) | F(XMM
) | F(XMM2
) | F(SELFSNOOP
) |
1467 0 /* HTT, TM, Reserved, PBE */;
1468 /* cpuid 0x80000001.edx */
1469 const u32 kvm_supported_word1_x86_features
=
1470 F(FPU
) | F(VME
) | F(DE
) | F(PSE
) |
1471 F(TSC
) | F(MSR
) | F(PAE
) | F(MCE
) |
1472 F(CX8
) | F(APIC
) | 0 /* Reserved */ | F(SYSCALL
) |
1473 F(MTRR
) | F(PGE
) | F(MCA
) | F(CMOV
) |
1474 F(PAT
) | F(PSE36
) | 0 /* Reserved */ |
1475 f_nx
| 0 /* Reserved */ | F(MMXEXT
) | F(MMX
) |
1476 F(FXSR
) | F(FXSR_OPT
) | f_gbpages
| 0 /* RDTSCP */ |
1477 0 /* Reserved */ | f_lm
| F(3DNOWEXT
) | F(3DNOW
);
1479 const u32 kvm_supported_word4_x86_features
=
1480 F(XMM3
) | 0 /* Reserved, DTES64, MONITOR */ |
1481 0 /* DS-CPL, VMX, SMX, EST */ |
1482 0 /* TM2 */ | F(SSSE3
) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1483 0 /* Reserved */ | F(CX16
) | 0 /* xTPR Update, PDCM */ |
1484 0 /* Reserved, DCA */ | F(XMM4_1
) |
1485 F(XMM4_2
) | F(X2APIC
) | F(MOVBE
) | F(POPCNT
) |
1486 0 /* Reserved, XSAVE, OSXSAVE */;
1487 /* cpuid 0x80000001.ecx */
1488 const u32 kvm_supported_word6_x86_features
=
1489 F(LAHF_LM
) | F(CMP_LEGACY
) | F(SVM
) | 0 /* ExtApicSpace */ |
1490 F(CR8_LEGACY
) | F(ABM
) | F(SSE4A
) | F(MISALIGNSSE
) |
1491 F(3DNOWPREFETCH
) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5
) |
1492 0 /* SKINIT */ | 0 /* WDT */;
1494 /* all calls to cpuid_count() should be made on the same cpu */
1496 do_cpuid_1_ent(entry
, function
, index
);
1501 entry
->eax
= min(entry
->eax
, (u32
)0xb);
1504 entry
->edx
&= kvm_supported_word0_x86_features
;
1505 entry
->ecx
&= kvm_supported_word4_x86_features
;
1506 /* we support x2apic emulation even if host does not support
1507 * it since we emulate x2apic in software */
1508 entry
->ecx
|= F(X2APIC
);
1510 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1511 * may return different values. This forces us to get_cpu() before
1512 * issuing the first command, and also to emulate this annoying behavior
1513 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1515 int t
, times
= entry
->eax
& 0xff;
1517 entry
->flags
|= KVM_CPUID_FLAG_STATEFUL_FUNC
;
1518 entry
->flags
|= KVM_CPUID_FLAG_STATE_READ_NEXT
;
1519 for (t
= 1; t
< times
&& *nent
< maxnent
; ++t
) {
1520 do_cpuid_1_ent(&entry
[t
], function
, 0);
1521 entry
[t
].flags
|= KVM_CPUID_FLAG_STATEFUL_FUNC
;
1526 /* function 4 and 0xb have additional index. */
1530 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1531 /* read more entries until cache_type is zero */
1532 for (i
= 1; *nent
< maxnent
; ++i
) {
1533 cache_type
= entry
[i
- 1].eax
& 0x1f;
1536 do_cpuid_1_ent(&entry
[i
], function
, i
);
1538 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1546 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1547 /* read more entries until level_type is zero */
1548 for (i
= 1; *nent
< maxnent
; ++i
) {
1549 level_type
= entry
[i
- 1].ecx
& 0xff00;
1552 do_cpuid_1_ent(&entry
[i
], function
, i
);
1554 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1560 entry
->eax
= min(entry
->eax
, 0x8000001a);
1563 entry
->edx
&= kvm_supported_word1_x86_features
;
1564 entry
->ecx
&= kvm_supported_word6_x86_features
;
1572 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2
*cpuid
,
1573 struct kvm_cpuid_entry2 __user
*entries
)
1575 struct kvm_cpuid_entry2
*cpuid_entries
;
1576 int limit
, nent
= 0, r
= -E2BIG
;
1579 if (cpuid
->nent
< 1)
1582 cpuid_entries
= vmalloc(sizeof(struct kvm_cpuid_entry2
) * cpuid
->nent
);
1586 do_cpuid_ent(&cpuid_entries
[0], 0, 0, &nent
, cpuid
->nent
);
1587 limit
= cpuid_entries
[0].eax
;
1588 for (func
= 1; func
<= limit
&& nent
< cpuid
->nent
; ++func
)
1589 do_cpuid_ent(&cpuid_entries
[nent
], func
, 0,
1590 &nent
, cpuid
->nent
);
1592 if (nent
>= cpuid
->nent
)
1595 do_cpuid_ent(&cpuid_entries
[nent
], 0x80000000, 0, &nent
, cpuid
->nent
);
1596 limit
= cpuid_entries
[nent
- 1].eax
;
1597 for (func
= 0x80000001; func
<= limit
&& nent
< cpuid
->nent
; ++func
)
1598 do_cpuid_ent(&cpuid_entries
[nent
], func
, 0,
1599 &nent
, cpuid
->nent
);
1601 if (nent
>= cpuid
->nent
)
1605 if (copy_to_user(entries
, cpuid_entries
,
1606 nent
* sizeof(struct kvm_cpuid_entry2
)))
1612 vfree(cpuid_entries
);
1617 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
1618 struct kvm_lapic_state
*s
)
1621 memcpy(s
->regs
, vcpu
->arch
.apic
->regs
, sizeof *s
);
1627 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
1628 struct kvm_lapic_state
*s
)
1631 memcpy(vcpu
->arch
.apic
->regs
, s
->regs
, sizeof *s
);
1632 kvm_apic_post_state_restore(vcpu
);
1633 update_cr8_intercept(vcpu
);
1639 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
1640 struct kvm_interrupt
*irq
)
1642 if (irq
->irq
< 0 || irq
->irq
>= 256)
1644 if (irqchip_in_kernel(vcpu
->kvm
))
1648 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
1655 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
1658 kvm_inject_nmi(vcpu
);
1664 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
1665 struct kvm_tpr_access_ctl
*tac
)
1669 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
1673 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
1677 unsigned bank_num
= mcg_cap
& 0xff, bank
;
1682 if (mcg_cap
& ~(KVM_MCE_CAP_SUPPORTED
| 0xff | 0xff0000))
1685 vcpu
->arch
.mcg_cap
= mcg_cap
;
1686 /* Init IA32_MCG_CTL to all 1s */
1687 if (mcg_cap
& MCG_CTL_P
)
1688 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
1689 /* Init IA32_MCi_CTL to all 1s */
1690 for (bank
= 0; bank
< bank_num
; bank
++)
1691 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
1696 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
1697 struct kvm_x86_mce
*mce
)
1699 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1700 unsigned bank_num
= mcg_cap
& 0xff;
1701 u64
*banks
= vcpu
->arch
.mce_banks
;
1703 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
1706 * if IA32_MCG_CTL is not all 1s, the uncorrected error
1707 * reporting is disabled
1709 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
1710 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
1712 banks
+= 4 * mce
->bank
;
1714 * if IA32_MCi_CTL is not all 1s, the uncorrected error
1715 * reporting is disabled for the bank
1717 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
1719 if (mce
->status
& MCI_STATUS_UC
) {
1720 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
1721 !(vcpu
->arch
.cr4
& X86_CR4_MCE
)) {
1722 printk(KERN_DEBUG
"kvm: set_mce: "
1723 "injects mce exception while "
1724 "previous one is in progress!\n");
1725 set_bit(KVM_REQ_TRIPLE_FAULT
, &vcpu
->requests
);
1728 if (banks
[1] & MCI_STATUS_VAL
)
1729 mce
->status
|= MCI_STATUS_OVER
;
1730 banks
[2] = mce
->addr
;
1731 banks
[3] = mce
->misc
;
1732 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
1733 banks
[1] = mce
->status
;
1734 kvm_queue_exception(vcpu
, MC_VECTOR
);
1735 } else if (!(banks
[1] & MCI_STATUS_VAL
)
1736 || !(banks
[1] & MCI_STATUS_UC
)) {
1737 if (banks
[1] & MCI_STATUS_VAL
)
1738 mce
->status
|= MCI_STATUS_OVER
;
1739 banks
[2] = mce
->addr
;
1740 banks
[3] = mce
->misc
;
1741 banks
[1] = mce
->status
;
1743 banks
[1] |= MCI_STATUS_OVER
;
1747 long kvm_arch_vcpu_ioctl(struct file
*filp
,
1748 unsigned int ioctl
, unsigned long arg
)
1750 struct kvm_vcpu
*vcpu
= filp
->private_data
;
1751 void __user
*argp
= (void __user
*)arg
;
1753 struct kvm_lapic_state
*lapic
= NULL
;
1756 case KVM_GET_LAPIC
: {
1757 lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
1762 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, lapic
);
1766 if (copy_to_user(argp
, lapic
, sizeof(struct kvm_lapic_state
)))
1771 case KVM_SET_LAPIC
: {
1772 lapic
= kmalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
1777 if (copy_from_user(lapic
, argp
, sizeof(struct kvm_lapic_state
)))
1779 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, lapic
);
1785 case KVM_INTERRUPT
: {
1786 struct kvm_interrupt irq
;
1789 if (copy_from_user(&irq
, argp
, sizeof irq
))
1791 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
1798 r
= kvm_vcpu_ioctl_nmi(vcpu
);
1804 case KVM_SET_CPUID
: {
1805 struct kvm_cpuid __user
*cpuid_arg
= argp
;
1806 struct kvm_cpuid cpuid
;
1809 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
1811 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
1816 case KVM_SET_CPUID2
: {
1817 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
1818 struct kvm_cpuid2 cpuid
;
1821 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
1823 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
1824 cpuid_arg
->entries
);
1829 case KVM_GET_CPUID2
: {
1830 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
1831 struct kvm_cpuid2 cpuid
;
1834 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
1836 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
1837 cpuid_arg
->entries
);
1841 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
1847 r
= msr_io(vcpu
, argp
, kvm_get_msr
, 1);
1850 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
1852 case KVM_TPR_ACCESS_REPORTING
: {
1853 struct kvm_tpr_access_ctl tac
;
1856 if (copy_from_user(&tac
, argp
, sizeof tac
))
1858 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
1862 if (copy_to_user(argp
, &tac
, sizeof tac
))
1867 case KVM_SET_VAPIC_ADDR
: {
1868 struct kvm_vapic_addr va
;
1871 if (!irqchip_in_kernel(vcpu
->kvm
))
1874 if (copy_from_user(&va
, argp
, sizeof va
))
1877 kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
1880 case KVM_X86_SETUP_MCE
: {
1884 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
1886 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
1889 case KVM_X86_SET_MCE
: {
1890 struct kvm_x86_mce mce
;
1893 if (copy_from_user(&mce
, argp
, sizeof mce
))
1895 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
1906 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
1910 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
1912 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
1916 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
1919 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
1923 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
1924 u32 kvm_nr_mmu_pages
)
1926 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
1929 down_write(&kvm
->slots_lock
);
1930 spin_lock(&kvm
->mmu_lock
);
1932 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
1933 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
1935 spin_unlock(&kvm
->mmu_lock
);
1936 up_write(&kvm
->slots_lock
);
1940 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
1942 return kvm
->arch
.n_alloc_mmu_pages
;
1945 gfn_t
unalias_gfn(struct kvm
*kvm
, gfn_t gfn
)
1948 struct kvm_mem_alias
*alias
;
1950 for (i
= 0; i
< kvm
->arch
.naliases
; ++i
) {
1951 alias
= &kvm
->arch
.aliases
[i
];
1952 if (gfn
>= alias
->base_gfn
1953 && gfn
< alias
->base_gfn
+ alias
->npages
)
1954 return alias
->target_gfn
+ gfn
- alias
->base_gfn
;
1960 * Set a new alias region. Aliases map a portion of physical memory into
1961 * another portion. This is useful for memory windows, for example the PC
1964 static int kvm_vm_ioctl_set_memory_alias(struct kvm
*kvm
,
1965 struct kvm_memory_alias
*alias
)
1968 struct kvm_mem_alias
*p
;
1971 /* General sanity checks */
1972 if (alias
->memory_size
& (PAGE_SIZE
- 1))
1974 if (alias
->guest_phys_addr
& (PAGE_SIZE
- 1))
1976 if (alias
->slot
>= KVM_ALIAS_SLOTS
)
1978 if (alias
->guest_phys_addr
+ alias
->memory_size
1979 < alias
->guest_phys_addr
)
1981 if (alias
->target_phys_addr
+ alias
->memory_size
1982 < alias
->target_phys_addr
)
1985 down_write(&kvm
->slots_lock
);
1986 spin_lock(&kvm
->mmu_lock
);
1988 p
= &kvm
->arch
.aliases
[alias
->slot
];
1989 p
->base_gfn
= alias
->guest_phys_addr
>> PAGE_SHIFT
;
1990 p
->npages
= alias
->memory_size
>> PAGE_SHIFT
;
1991 p
->target_gfn
= alias
->target_phys_addr
>> PAGE_SHIFT
;
1993 for (n
= KVM_ALIAS_SLOTS
; n
> 0; --n
)
1994 if (kvm
->arch
.aliases
[n
- 1].npages
)
1996 kvm
->arch
.naliases
= n
;
1998 spin_unlock(&kvm
->mmu_lock
);
1999 kvm_mmu_zap_all(kvm
);
2001 up_write(&kvm
->slots_lock
);
2009 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
2014 switch (chip
->chip_id
) {
2015 case KVM_IRQCHIP_PIC_MASTER
:
2016 memcpy(&chip
->chip
.pic
,
2017 &pic_irqchip(kvm
)->pics
[0],
2018 sizeof(struct kvm_pic_state
));
2020 case KVM_IRQCHIP_PIC_SLAVE
:
2021 memcpy(&chip
->chip
.pic
,
2022 &pic_irqchip(kvm
)->pics
[1],
2023 sizeof(struct kvm_pic_state
));
2025 case KVM_IRQCHIP_IOAPIC
:
2026 memcpy(&chip
->chip
.ioapic
,
2027 ioapic_irqchip(kvm
),
2028 sizeof(struct kvm_ioapic_state
));
2037 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
2042 switch (chip
->chip_id
) {
2043 case KVM_IRQCHIP_PIC_MASTER
:
2044 spin_lock(&pic_irqchip(kvm
)->lock
);
2045 memcpy(&pic_irqchip(kvm
)->pics
[0],
2047 sizeof(struct kvm_pic_state
));
2048 spin_unlock(&pic_irqchip(kvm
)->lock
);
2050 case KVM_IRQCHIP_PIC_SLAVE
:
2051 spin_lock(&pic_irqchip(kvm
)->lock
);
2052 memcpy(&pic_irqchip(kvm
)->pics
[1],
2054 sizeof(struct kvm_pic_state
));
2055 spin_unlock(&pic_irqchip(kvm
)->lock
);
2057 case KVM_IRQCHIP_IOAPIC
:
2058 mutex_lock(&kvm
->irq_lock
);
2059 memcpy(ioapic_irqchip(kvm
),
2061 sizeof(struct kvm_ioapic_state
));
2062 mutex_unlock(&kvm
->irq_lock
);
2068 kvm_pic_update_irq(pic_irqchip(kvm
));
2072 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
2076 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2077 memcpy(ps
, &kvm
->arch
.vpit
->pit_state
, sizeof(struct kvm_pit_state
));
2078 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2082 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
2086 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2087 memcpy(&kvm
->arch
.vpit
->pit_state
, ps
, sizeof(struct kvm_pit_state
));
2088 kvm_pit_load_count(kvm
, 0, ps
->channels
[0].count
, 0);
2089 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2093 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
2097 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2098 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
2099 sizeof(ps
->channels
));
2100 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
2101 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2105 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
2107 int r
= 0, start
= 0;
2108 u32 prev_legacy
, cur_legacy
;
2109 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2110 prev_legacy
= kvm
->arch
.vpit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
2111 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
2112 if (!prev_legacy
&& cur_legacy
)
2114 memcpy(&kvm
->arch
.vpit
->pit_state
.channels
, &ps
->channels
,
2115 sizeof(kvm
->arch
.vpit
->pit_state
.channels
));
2116 kvm
->arch
.vpit
->pit_state
.flags
= ps
->flags
;
2117 kvm_pit_load_count(kvm
, 0, kvm
->arch
.vpit
->pit_state
.channels
[0].count
, start
);
2118 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2122 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
2123 struct kvm_reinject_control
*control
)
2125 if (!kvm
->arch
.vpit
)
2127 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2128 kvm
->arch
.vpit
->pit_state
.pit_timer
.reinject
= control
->pit_reinject
;
2129 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2134 * Get (and clear) the dirty memory log for a memory slot.
2136 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
,
2137 struct kvm_dirty_log
*log
)
2141 struct kvm_memory_slot
*memslot
;
2144 down_write(&kvm
->slots_lock
);
2146 r
= kvm_get_dirty_log(kvm
, log
, &is_dirty
);
2150 /* If nothing is dirty, don't bother messing with page tables. */
2152 spin_lock(&kvm
->mmu_lock
);
2153 kvm_mmu_slot_remove_write_access(kvm
, log
->slot
);
2154 spin_unlock(&kvm
->mmu_lock
);
2155 kvm_flush_remote_tlbs(kvm
);
2156 memslot
= &kvm
->memslots
[log
->slot
];
2157 n
= ALIGN(memslot
->npages
, BITS_PER_LONG
) / 8;
2158 memset(memslot
->dirty_bitmap
, 0, n
);
2162 up_write(&kvm
->slots_lock
);
2166 long kvm_arch_vm_ioctl(struct file
*filp
,
2167 unsigned int ioctl
, unsigned long arg
)
2169 struct kvm
*kvm
= filp
->private_data
;
2170 void __user
*argp
= (void __user
*)arg
;
2173 * This union makes it completely explicit to gcc-3.x
2174 * that these two variables' stack usage should be
2175 * combined, not added together.
2178 struct kvm_pit_state ps
;
2179 struct kvm_pit_state2 ps2
;
2180 struct kvm_memory_alias alias
;
2181 struct kvm_pit_config pit_config
;
2185 case KVM_SET_TSS_ADDR
:
2186 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
2190 case KVM_SET_IDENTITY_MAP_ADDR
: {
2194 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
2196 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
2201 case KVM_SET_MEMORY_REGION
: {
2202 struct kvm_memory_region kvm_mem
;
2203 struct kvm_userspace_memory_region kvm_userspace_mem
;
2206 if (copy_from_user(&kvm_mem
, argp
, sizeof kvm_mem
))
2208 kvm_userspace_mem
.slot
= kvm_mem
.slot
;
2209 kvm_userspace_mem
.flags
= kvm_mem
.flags
;
2210 kvm_userspace_mem
.guest_phys_addr
= kvm_mem
.guest_phys_addr
;
2211 kvm_userspace_mem
.memory_size
= kvm_mem
.memory_size
;
2212 r
= kvm_vm_ioctl_set_memory_region(kvm
, &kvm_userspace_mem
, 0);
2217 case KVM_SET_NR_MMU_PAGES
:
2218 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
2222 case KVM_GET_NR_MMU_PAGES
:
2223 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
2225 case KVM_SET_MEMORY_ALIAS
:
2227 if (copy_from_user(&u
.alias
, argp
, sizeof(struct kvm_memory_alias
)))
2229 r
= kvm_vm_ioctl_set_memory_alias(kvm
, &u
.alias
);
2233 case KVM_CREATE_IRQCHIP
:
2235 kvm
->arch
.vpic
= kvm_create_pic(kvm
);
2236 if (kvm
->arch
.vpic
) {
2237 r
= kvm_ioapic_init(kvm
);
2239 kfree(kvm
->arch
.vpic
);
2240 kvm
->arch
.vpic
= NULL
;
2245 r
= kvm_setup_default_irq_routing(kvm
);
2247 kfree(kvm
->arch
.vpic
);
2248 kfree(kvm
->arch
.vioapic
);
2252 case KVM_CREATE_PIT
:
2253 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
2255 case KVM_CREATE_PIT2
:
2257 if (copy_from_user(&u
.pit_config
, argp
,
2258 sizeof(struct kvm_pit_config
)))
2261 down_write(&kvm
->slots_lock
);
2264 goto create_pit_unlock
;
2266 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
2270 up_write(&kvm
->slots_lock
);
2272 case KVM_IRQ_LINE_STATUS
:
2273 case KVM_IRQ_LINE
: {
2274 struct kvm_irq_level irq_event
;
2277 if (copy_from_user(&irq_event
, argp
, sizeof irq_event
))
2279 if (irqchip_in_kernel(kvm
)) {
2281 mutex_lock(&kvm
->irq_lock
);
2282 status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
2283 irq_event
.irq
, irq_event
.level
);
2284 mutex_unlock(&kvm
->irq_lock
);
2285 if (ioctl
== KVM_IRQ_LINE_STATUS
) {
2286 irq_event
.status
= status
;
2287 if (copy_to_user(argp
, &irq_event
,
2295 case KVM_GET_IRQCHIP
: {
2296 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2297 struct kvm_irqchip
*chip
= kmalloc(sizeof(*chip
), GFP_KERNEL
);
2303 if (copy_from_user(chip
, argp
, sizeof *chip
))
2304 goto get_irqchip_out
;
2306 if (!irqchip_in_kernel(kvm
))
2307 goto get_irqchip_out
;
2308 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
2310 goto get_irqchip_out
;
2312 if (copy_to_user(argp
, chip
, sizeof *chip
))
2313 goto get_irqchip_out
;
2321 case KVM_SET_IRQCHIP
: {
2322 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2323 struct kvm_irqchip
*chip
= kmalloc(sizeof(*chip
), GFP_KERNEL
);
2329 if (copy_from_user(chip
, argp
, sizeof *chip
))
2330 goto set_irqchip_out
;
2332 if (!irqchip_in_kernel(kvm
))
2333 goto set_irqchip_out
;
2334 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
2336 goto set_irqchip_out
;
2346 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
2349 if (!kvm
->arch
.vpit
)
2351 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
2355 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
2362 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
2365 if (!kvm
->arch
.vpit
)
2367 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
2373 case KVM_GET_PIT2
: {
2375 if (!kvm
->arch
.vpit
)
2377 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
2381 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
2386 case KVM_SET_PIT2
: {
2388 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
2391 if (!kvm
->arch
.vpit
)
2393 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
2399 case KVM_REINJECT_CONTROL
: {
2400 struct kvm_reinject_control control
;
2402 if (copy_from_user(&control
, argp
, sizeof(control
)))
2404 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
2417 static void kvm_init_msr_list(void)
2422 for (i
= j
= 0; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
2423 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
2426 msrs_to_save
[j
] = msrs_to_save
[i
];
2429 num_msrs_to_save
= j
;
2432 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
2435 if (vcpu
->arch
.apic
&&
2436 !kvm_iodevice_write(&vcpu
->arch
.apic
->dev
, addr
, len
, v
))
2439 return kvm_io_bus_write(&vcpu
->kvm
->mmio_bus
, addr
, len
, v
);
2442 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
2444 if (vcpu
->arch
.apic
&&
2445 !kvm_iodevice_read(&vcpu
->arch
.apic
->dev
, addr
, len
, v
))
2448 return kvm_io_bus_read(&vcpu
->kvm
->mmio_bus
, addr
, len
, v
);
2451 static int kvm_read_guest_virt(gva_t addr
, void *val
, unsigned int bytes
,
2452 struct kvm_vcpu
*vcpu
)
2455 int r
= X86EMUL_CONTINUE
;
2458 gpa_t gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2459 unsigned offset
= addr
& (PAGE_SIZE
-1);
2460 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
2463 if (gpa
== UNMAPPED_GVA
) {
2464 r
= X86EMUL_PROPAGATE_FAULT
;
2467 ret
= kvm_read_guest(vcpu
->kvm
, gpa
, data
, toread
);
2469 r
= X86EMUL_UNHANDLEABLE
;
2481 static int kvm_write_guest_virt(gva_t addr
, void *val
, unsigned int bytes
,
2482 struct kvm_vcpu
*vcpu
)
2485 int r
= X86EMUL_CONTINUE
;
2488 gpa_t gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2489 unsigned offset
= addr
& (PAGE_SIZE
-1);
2490 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
2493 if (gpa
== UNMAPPED_GVA
) {
2494 r
= X86EMUL_PROPAGATE_FAULT
;
2497 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, data
, towrite
);
2499 r
= X86EMUL_UNHANDLEABLE
;
2512 static int emulator_read_emulated(unsigned long addr
,
2515 struct kvm_vcpu
*vcpu
)
2519 if (vcpu
->mmio_read_completed
) {
2520 memcpy(val
, vcpu
->mmio_data
, bytes
);
2521 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
2522 vcpu
->mmio_phys_addr
, *(u64
*)val
);
2523 vcpu
->mmio_read_completed
= 0;
2524 return X86EMUL_CONTINUE
;
2527 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2529 /* For APIC access vmexit */
2530 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
2533 if (kvm_read_guest_virt(addr
, val
, bytes
, vcpu
)
2534 == X86EMUL_CONTINUE
)
2535 return X86EMUL_CONTINUE
;
2536 if (gpa
== UNMAPPED_GVA
)
2537 return X86EMUL_PROPAGATE_FAULT
;
2541 * Is this MMIO handled locally?
2543 if (!vcpu_mmio_read(vcpu
, gpa
, bytes
, val
)) {
2544 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
, gpa
, *(u64
*)val
);
2545 return X86EMUL_CONTINUE
;
2548 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
2550 vcpu
->mmio_needed
= 1;
2551 vcpu
->mmio_phys_addr
= gpa
;
2552 vcpu
->mmio_size
= bytes
;
2553 vcpu
->mmio_is_write
= 0;
2555 return X86EMUL_UNHANDLEABLE
;
2558 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
2559 const void *val
, int bytes
)
2563 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, val
, bytes
);
2566 kvm_mmu_pte_write(vcpu
, gpa
, val
, bytes
, 1);
2570 static int emulator_write_emulated_onepage(unsigned long addr
,
2573 struct kvm_vcpu
*vcpu
)
2577 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2579 if (gpa
== UNMAPPED_GVA
) {
2580 kvm_inject_page_fault(vcpu
, addr
, 2);
2581 return X86EMUL_PROPAGATE_FAULT
;
2584 /* For APIC access vmexit */
2585 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
2588 if (emulator_write_phys(vcpu
, gpa
, val
, bytes
))
2589 return X86EMUL_CONTINUE
;
2592 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
2594 * Is this MMIO handled locally?
2596 if (!vcpu_mmio_write(vcpu
, gpa
, bytes
, val
))
2597 return X86EMUL_CONTINUE
;
2599 vcpu
->mmio_needed
= 1;
2600 vcpu
->mmio_phys_addr
= gpa
;
2601 vcpu
->mmio_size
= bytes
;
2602 vcpu
->mmio_is_write
= 1;
2603 memcpy(vcpu
->mmio_data
, val
, bytes
);
2605 return X86EMUL_CONTINUE
;
2608 int emulator_write_emulated(unsigned long addr
,
2611 struct kvm_vcpu
*vcpu
)
2613 /* Crossing a page boundary? */
2614 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
2617 now
= -addr
& ~PAGE_MASK
;
2618 rc
= emulator_write_emulated_onepage(addr
, val
, now
, vcpu
);
2619 if (rc
!= X86EMUL_CONTINUE
)
2625 return emulator_write_emulated_onepage(addr
, val
, bytes
, vcpu
);
2627 EXPORT_SYMBOL_GPL(emulator_write_emulated
);
2629 static int emulator_cmpxchg_emulated(unsigned long addr
,
2633 struct kvm_vcpu
*vcpu
)
2635 static int reported
;
2639 printk(KERN_WARNING
"kvm: emulating exchange as write\n");
2641 #ifndef CONFIG_X86_64
2642 /* guests cmpxchg8b have to be emulated atomically */
2649 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2651 if (gpa
== UNMAPPED_GVA
||
2652 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
2655 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
2660 page
= gfn_to_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
2662 kaddr
= kmap_atomic(page
, KM_USER0
);
2663 set_64bit((u64
*)(kaddr
+ offset_in_page(gpa
)), val
);
2664 kunmap_atomic(kaddr
, KM_USER0
);
2665 kvm_release_page_dirty(page
);
2670 return emulator_write_emulated(addr
, new, bytes
, vcpu
);
2673 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
2675 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
2678 int emulate_invlpg(struct kvm_vcpu
*vcpu
, gva_t address
)
2680 kvm_mmu_invlpg(vcpu
, address
);
2681 return X86EMUL_CONTINUE
;
2684 int emulate_clts(struct kvm_vcpu
*vcpu
)
2686 kvm_x86_ops
->set_cr0(vcpu
, vcpu
->arch
.cr0
& ~X86_CR0_TS
);
2687 return X86EMUL_CONTINUE
;
2690 int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long *dest
)
2692 struct kvm_vcpu
*vcpu
= ctxt
->vcpu
;
2696 *dest
= kvm_x86_ops
->get_dr(vcpu
, dr
);
2697 return X86EMUL_CONTINUE
;
2699 pr_unimpl(vcpu
, "%s: unexpected dr %u\n", __func__
, dr
);
2700 return X86EMUL_UNHANDLEABLE
;
2704 int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long value
)
2706 unsigned long mask
= (ctxt
->mode
== X86EMUL_MODE_PROT64
) ? ~0ULL : ~0U;
2709 kvm_x86_ops
->set_dr(ctxt
->vcpu
, dr
, value
& mask
, &exception
);
2711 /* FIXME: better handling */
2712 return X86EMUL_UNHANDLEABLE
;
2714 return X86EMUL_CONTINUE
;
2717 void kvm_report_emulation_failure(struct kvm_vcpu
*vcpu
, const char *context
)
2720 unsigned long rip
= kvm_rip_read(vcpu
);
2721 unsigned long rip_linear
;
2723 if (!printk_ratelimit())
2726 rip_linear
= rip
+ get_segment_base(vcpu
, VCPU_SREG_CS
);
2728 kvm_read_guest_virt(rip_linear
, (void *)opcodes
, 4, vcpu
);
2730 printk(KERN_ERR
"emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
2731 context
, rip
, opcodes
[0], opcodes
[1], opcodes
[2], opcodes
[3]);
2733 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure
);
2735 static struct x86_emulate_ops emulate_ops
= {
2736 .read_std
= kvm_read_guest_virt
,
2737 .read_emulated
= emulator_read_emulated
,
2738 .write_emulated
= emulator_write_emulated
,
2739 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
2742 static void cache_all_regs(struct kvm_vcpu
*vcpu
)
2744 kvm_register_read(vcpu
, VCPU_REGS_RAX
);
2745 kvm_register_read(vcpu
, VCPU_REGS_RSP
);
2746 kvm_register_read(vcpu
, VCPU_REGS_RIP
);
2747 vcpu
->arch
.regs_dirty
= ~0;
2750 int emulate_instruction(struct kvm_vcpu
*vcpu
,
2751 struct kvm_run
*run
,
2757 struct decode_cache
*c
;
2759 kvm_clear_exception_queue(vcpu
);
2760 vcpu
->arch
.mmio_fault_cr2
= cr2
;
2762 * TODO: fix emulate.c to use guest_read/write_register
2763 * instead of direct ->regs accesses, can save hundred cycles
2764 * on Intel for instructions that don't read/change RSP, for
2767 cache_all_regs(vcpu
);
2769 vcpu
->mmio_is_write
= 0;
2770 vcpu
->arch
.pio
.string
= 0;
2772 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
2774 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
2776 vcpu
->arch
.emulate_ctxt
.vcpu
= vcpu
;
2777 vcpu
->arch
.emulate_ctxt
.eflags
= kvm_x86_ops
->get_rflags(vcpu
);
2778 vcpu
->arch
.emulate_ctxt
.mode
=
2779 (vcpu
->arch
.emulate_ctxt
.eflags
& X86_EFLAGS_VM
)
2780 ? X86EMUL_MODE_REAL
: cs_l
2781 ? X86EMUL_MODE_PROT64
: cs_db
2782 ? X86EMUL_MODE_PROT32
: X86EMUL_MODE_PROT16
;
2784 r
= x86_decode_insn(&vcpu
->arch
.emulate_ctxt
, &emulate_ops
);
2786 /* Only allow emulation of specific instructions on #UD
2787 * (namely VMMCALL, sysenter, sysexit, syscall)*/
2788 c
= &vcpu
->arch
.emulate_ctxt
.decode
;
2789 if (emulation_type
& EMULTYPE_TRAP_UD
) {
2791 return EMULATE_FAIL
;
2793 case 0x01: /* VMMCALL */
2794 if (c
->modrm_mod
!= 3 || c
->modrm_rm
!= 1)
2795 return EMULATE_FAIL
;
2797 case 0x34: /* sysenter */
2798 case 0x35: /* sysexit */
2799 if (c
->modrm_mod
!= 0 || c
->modrm_rm
!= 0)
2800 return EMULATE_FAIL
;
2802 case 0x05: /* syscall */
2803 if (c
->modrm_mod
!= 0 || c
->modrm_rm
!= 0)
2804 return EMULATE_FAIL
;
2807 return EMULATE_FAIL
;
2810 if (!(c
->modrm_reg
== 0 || c
->modrm_reg
== 3))
2811 return EMULATE_FAIL
;
2814 ++vcpu
->stat
.insn_emulation
;
2816 ++vcpu
->stat
.insn_emulation_fail
;
2817 if (kvm_mmu_unprotect_page_virt(vcpu
, cr2
))
2818 return EMULATE_DONE
;
2819 return EMULATE_FAIL
;
2823 if (emulation_type
& EMULTYPE_SKIP
) {
2824 kvm_rip_write(vcpu
, vcpu
->arch
.emulate_ctxt
.decode
.eip
);
2825 return EMULATE_DONE
;
2828 r
= x86_emulate_insn(&vcpu
->arch
.emulate_ctxt
, &emulate_ops
);
2829 shadow_mask
= vcpu
->arch
.emulate_ctxt
.interruptibility
;
2832 kvm_x86_ops
->set_interrupt_shadow(vcpu
, shadow_mask
);
2834 if (vcpu
->arch
.pio
.string
)
2835 return EMULATE_DO_MMIO
;
2837 if ((r
|| vcpu
->mmio_is_write
) && run
) {
2838 run
->exit_reason
= KVM_EXIT_MMIO
;
2839 run
->mmio
.phys_addr
= vcpu
->mmio_phys_addr
;
2840 memcpy(run
->mmio
.data
, vcpu
->mmio_data
, 8);
2841 run
->mmio
.len
= vcpu
->mmio_size
;
2842 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
2846 if (kvm_mmu_unprotect_page_virt(vcpu
, cr2
))
2847 return EMULATE_DONE
;
2848 if (!vcpu
->mmio_needed
) {
2849 kvm_report_emulation_failure(vcpu
, "mmio");
2850 return EMULATE_FAIL
;
2852 return EMULATE_DO_MMIO
;
2855 kvm_x86_ops
->set_rflags(vcpu
, vcpu
->arch
.emulate_ctxt
.eflags
);
2857 if (vcpu
->mmio_is_write
) {
2858 vcpu
->mmio_needed
= 0;
2859 return EMULATE_DO_MMIO
;
2862 return EMULATE_DONE
;
2864 EXPORT_SYMBOL_GPL(emulate_instruction
);
2866 static int pio_copy_data(struct kvm_vcpu
*vcpu
)
2868 void *p
= vcpu
->arch
.pio_data
;
2869 gva_t q
= vcpu
->arch
.pio
.guest_gva
;
2873 bytes
= vcpu
->arch
.pio
.size
* vcpu
->arch
.pio
.cur_count
;
2874 if (vcpu
->arch
.pio
.in
)
2875 ret
= kvm_write_guest_virt(q
, p
, bytes
, vcpu
);
2877 ret
= kvm_read_guest_virt(q
, p
, bytes
, vcpu
);
2881 int complete_pio(struct kvm_vcpu
*vcpu
)
2883 struct kvm_pio_request
*io
= &vcpu
->arch
.pio
;
2890 val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
2891 memcpy(&val
, vcpu
->arch
.pio_data
, io
->size
);
2892 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
2896 r
= pio_copy_data(vcpu
);
2903 delta
*= io
->cur_count
;
2905 * The size of the register should really depend on
2906 * current address size.
2908 val
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
2910 kvm_register_write(vcpu
, VCPU_REGS_RCX
, val
);
2916 val
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
2918 kvm_register_write(vcpu
, VCPU_REGS_RDI
, val
);
2920 val
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
2922 kvm_register_write(vcpu
, VCPU_REGS_RSI
, val
);
2926 io
->count
-= io
->cur_count
;
2932 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
2934 /* TODO: String I/O for in kernel device */
2937 if (vcpu
->arch
.pio
.in
)
2938 r
= kvm_io_bus_read(&vcpu
->kvm
->pio_bus
, vcpu
->arch
.pio
.port
,
2939 vcpu
->arch
.pio
.size
, pd
);
2941 r
= kvm_io_bus_write(&vcpu
->kvm
->pio_bus
, vcpu
->arch
.pio
.port
,
2942 vcpu
->arch
.pio
.size
, pd
);
2946 static int pio_string_write(struct kvm_vcpu
*vcpu
)
2948 struct kvm_pio_request
*io
= &vcpu
->arch
.pio
;
2949 void *pd
= vcpu
->arch
.pio_data
;
2952 for (i
= 0; i
< io
->cur_count
; i
++) {
2953 if (kvm_io_bus_write(&vcpu
->kvm
->pio_bus
,
2954 io
->port
, io
->size
, pd
)) {
2963 int kvm_emulate_pio(struct kvm_vcpu
*vcpu
, struct kvm_run
*run
, int in
,
2964 int size
, unsigned port
)
2968 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
2969 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
2970 vcpu
->run
->io
.size
= vcpu
->arch
.pio
.size
= size
;
2971 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
2972 vcpu
->run
->io
.count
= vcpu
->arch
.pio
.count
= vcpu
->arch
.pio
.cur_count
= 1;
2973 vcpu
->run
->io
.port
= vcpu
->arch
.pio
.port
= port
;
2974 vcpu
->arch
.pio
.in
= in
;
2975 vcpu
->arch
.pio
.string
= 0;
2976 vcpu
->arch
.pio
.down
= 0;
2977 vcpu
->arch
.pio
.rep
= 0;
2979 trace_kvm_pio(vcpu
->run
->io
.direction
== KVM_EXIT_IO_OUT
, port
,
2982 val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
2983 memcpy(vcpu
->arch
.pio_data
, &val
, 4);
2985 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
2991 EXPORT_SYMBOL_GPL(kvm_emulate_pio
);
2993 int kvm_emulate_pio_string(struct kvm_vcpu
*vcpu
, struct kvm_run
*run
, int in
,
2994 int size
, unsigned long count
, int down
,
2995 gva_t address
, int rep
, unsigned port
)
2997 unsigned now
, in_page
;
3000 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
3001 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
3002 vcpu
->run
->io
.size
= vcpu
->arch
.pio
.size
= size
;
3003 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
3004 vcpu
->run
->io
.count
= vcpu
->arch
.pio
.count
= vcpu
->arch
.pio
.cur_count
= count
;
3005 vcpu
->run
->io
.port
= vcpu
->arch
.pio
.port
= port
;
3006 vcpu
->arch
.pio
.in
= in
;
3007 vcpu
->arch
.pio
.string
= 1;
3008 vcpu
->arch
.pio
.down
= down
;
3009 vcpu
->arch
.pio
.rep
= rep
;
3011 trace_kvm_pio(vcpu
->run
->io
.direction
== KVM_EXIT_IO_OUT
, port
,
3015 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
3020 in_page
= PAGE_SIZE
- offset_in_page(address
);
3022 in_page
= offset_in_page(address
) + size
;
3023 now
= min(count
, (unsigned long)in_page
/ size
);
3028 * String I/O in reverse. Yuck. Kill the guest, fix later.
3030 pr_unimpl(vcpu
, "guest string pio down\n");
3031 kvm_inject_gp(vcpu
, 0);
3034 vcpu
->run
->io
.count
= now
;
3035 vcpu
->arch
.pio
.cur_count
= now
;
3037 if (vcpu
->arch
.pio
.cur_count
== vcpu
->arch
.pio
.count
)
3038 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
3040 vcpu
->arch
.pio
.guest_gva
= address
;
3042 if (!vcpu
->arch
.pio
.in
) {
3043 /* string PIO write */
3044 ret
= pio_copy_data(vcpu
);
3045 if (ret
== X86EMUL_PROPAGATE_FAULT
) {
3046 kvm_inject_gp(vcpu
, 0);
3049 if (ret
== 0 && !pio_string_write(vcpu
)) {
3051 if (vcpu
->arch
.pio
.count
== 0)
3055 /* no string PIO read support yet */
3059 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string
);
3061 static void bounce_off(void *info
)
3066 static unsigned int ref_freq
;
3067 static unsigned long tsc_khz_ref
;
3069 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
3072 struct cpufreq_freqs
*freq
= data
;
3074 struct kvm_vcpu
*vcpu
;
3075 int i
, send_ipi
= 0;
3078 ref_freq
= freq
->old
;
3080 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
3082 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
3084 per_cpu(cpu_tsc_khz
, freq
->cpu
) = cpufreq_scale(tsc_khz_ref
, ref_freq
, freq
->new);
3086 spin_lock(&kvm_lock
);
3087 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
3088 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
3089 if (vcpu
->cpu
!= freq
->cpu
)
3091 if (!kvm_request_guest_time_update(vcpu
))
3093 if (vcpu
->cpu
!= smp_processor_id())
3097 spin_unlock(&kvm_lock
);
3099 if (freq
->old
< freq
->new && send_ipi
) {
3101 * We upscale the frequency. Must make the guest
3102 * doesn't see old kvmclock values while running with
3103 * the new frequency, otherwise we risk the guest sees
3104 * time go backwards.
3106 * In case we update the frequency for another cpu
3107 * (which might be in guest context) send an interrupt
3108 * to kick the cpu out of guest context. Next time
3109 * guest context is entered kvmclock will be updated,
3110 * so the guest will not see stale values.
3112 smp_call_function_single(freq
->cpu
, bounce_off
, NULL
, 1);
3117 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
3118 .notifier_call
= kvmclock_cpufreq_notifier
3121 int kvm_arch_init(void *opaque
)
3124 struct kvm_x86_ops
*ops
= (struct kvm_x86_ops
*)opaque
;
3127 printk(KERN_ERR
"kvm: already loaded the other module\n");
3132 if (!ops
->cpu_has_kvm_support()) {
3133 printk(KERN_ERR
"kvm: no hardware support\n");
3137 if (ops
->disabled_by_bios()) {
3138 printk(KERN_ERR
"kvm: disabled by bios\n");
3143 r
= kvm_mmu_module_init();
3147 kvm_init_msr_list();
3150 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
3151 kvm_mmu_set_base_ptes(PT_PRESENT_MASK
);
3152 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
3153 PT_DIRTY_MASK
, PT64_NX_MASK
, 0);
3155 for_each_possible_cpu(cpu
)
3156 per_cpu(cpu_tsc_khz
, cpu
) = tsc_khz
;
3157 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
3158 tsc_khz_ref
= tsc_khz
;
3159 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
3160 CPUFREQ_TRANSITION_NOTIFIER
);
3169 void kvm_arch_exit(void)
3171 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
3172 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
3173 CPUFREQ_TRANSITION_NOTIFIER
);
3175 kvm_mmu_module_exit();
3178 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
3180 ++vcpu
->stat
.halt_exits
;
3181 if (irqchip_in_kernel(vcpu
->kvm
)) {
3182 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
3185 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
3189 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
3191 static inline gpa_t
hc_gpa(struct kvm_vcpu
*vcpu
, unsigned long a0
,
3194 if (is_long_mode(vcpu
))
3197 return a0
| ((gpa_t
)a1
<< 32);
3200 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
3202 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
3205 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3206 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
3207 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
3208 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
3209 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
3211 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
3213 if (!is_long_mode(vcpu
)) {
3221 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
3227 case KVM_HC_VAPIC_POLL_IRQ
:
3231 r
= kvm_pv_mmu_op(vcpu
, a0
, hc_gpa(vcpu
, a1
, a2
), &ret
);
3238 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
3239 ++vcpu
->stat
.hypercalls
;
3242 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
3244 int kvm_fix_hypercall(struct kvm_vcpu
*vcpu
)
3246 char instruction
[3];
3248 unsigned long rip
= kvm_rip_read(vcpu
);
3252 * Blow out the MMU to ensure that no other VCPU has an active mapping
3253 * to ensure that the updated hypercall appears atomically across all
3256 kvm_mmu_zap_all(vcpu
->kvm
);
3258 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
3259 if (emulator_write_emulated(rip
, instruction
, 3, vcpu
)
3260 != X86EMUL_CONTINUE
)
3266 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
3268 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
3271 void realmode_lgdt(struct kvm_vcpu
*vcpu
, u16 limit
, unsigned long base
)
3273 struct descriptor_table dt
= { limit
, base
};
3275 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
3278 void realmode_lidt(struct kvm_vcpu
*vcpu
, u16 limit
, unsigned long base
)
3280 struct descriptor_table dt
= { limit
, base
};
3282 kvm_x86_ops
->set_idt(vcpu
, &dt
);
3285 void realmode_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
,
3286 unsigned long *rflags
)
3288 kvm_lmsw(vcpu
, msw
);
3289 *rflags
= kvm_x86_ops
->get_rflags(vcpu
);
3292 unsigned long realmode_get_cr(struct kvm_vcpu
*vcpu
, int cr
)
3294 unsigned long value
;
3296 kvm_x86_ops
->decache_cr4_guest_bits(vcpu
);
3299 value
= vcpu
->arch
.cr0
;
3302 value
= vcpu
->arch
.cr2
;
3305 value
= vcpu
->arch
.cr3
;
3308 value
= vcpu
->arch
.cr4
;
3311 value
= kvm_get_cr8(vcpu
);
3314 vcpu_printf(vcpu
, "%s: unexpected cr %u\n", __func__
, cr
);
3321 void realmode_set_cr(struct kvm_vcpu
*vcpu
, int cr
, unsigned long val
,
3322 unsigned long *rflags
)
3326 kvm_set_cr0(vcpu
, mk_cr_64(vcpu
->arch
.cr0
, val
));
3327 *rflags
= kvm_x86_ops
->get_rflags(vcpu
);
3330 vcpu
->arch
.cr2
= val
;
3333 kvm_set_cr3(vcpu
, val
);
3336 kvm_set_cr4(vcpu
, mk_cr_64(vcpu
->arch
.cr4
, val
));
3339 kvm_set_cr8(vcpu
, val
& 0xfUL
);
3342 vcpu_printf(vcpu
, "%s: unexpected cr %u\n", __func__
, cr
);
3346 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu
*vcpu
, int i
)
3348 struct kvm_cpuid_entry2
*e
= &vcpu
->arch
.cpuid_entries
[i
];
3349 int j
, nent
= vcpu
->arch
.cpuid_nent
;
3351 e
->flags
&= ~KVM_CPUID_FLAG_STATE_READ_NEXT
;
3352 /* when no next entry is found, the current entry[i] is reselected */
3353 for (j
= i
+ 1; ; j
= (j
+ 1) % nent
) {
3354 struct kvm_cpuid_entry2
*ej
= &vcpu
->arch
.cpuid_entries
[j
];
3355 if (ej
->function
== e
->function
) {
3356 ej
->flags
|= KVM_CPUID_FLAG_STATE_READ_NEXT
;
3360 return 0; /* silence gcc, even though control never reaches here */
3363 /* find an entry with matching function, matching index (if needed), and that
3364 * should be read next (if it's stateful) */
3365 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2
*e
,
3366 u32 function
, u32 index
)
3368 if (e
->function
!= function
)
3370 if ((e
->flags
& KVM_CPUID_FLAG_SIGNIFCANT_INDEX
) && e
->index
!= index
)
3372 if ((e
->flags
& KVM_CPUID_FLAG_STATEFUL_FUNC
) &&
3373 !(e
->flags
& KVM_CPUID_FLAG_STATE_READ_NEXT
))
3378 struct kvm_cpuid_entry2
*kvm_find_cpuid_entry(struct kvm_vcpu
*vcpu
,
3379 u32 function
, u32 index
)
3382 struct kvm_cpuid_entry2
*best
= NULL
;
3384 for (i
= 0; i
< vcpu
->arch
.cpuid_nent
; ++i
) {
3385 struct kvm_cpuid_entry2
*e
;
3387 e
= &vcpu
->arch
.cpuid_entries
[i
];
3388 if (is_matching_cpuid_entry(e
, function
, index
)) {
3389 if (e
->flags
& KVM_CPUID_FLAG_STATEFUL_FUNC
)
3390 move_to_next_stateful_cpuid_entry(vcpu
, i
);
3395 * Both basic or both extended?
3397 if (((e
->function
^ function
) & 0x80000000) == 0)
3398 if (!best
|| e
->function
> best
->function
)
3404 int cpuid_maxphyaddr(struct kvm_vcpu
*vcpu
)
3406 struct kvm_cpuid_entry2
*best
;
3408 best
= kvm_find_cpuid_entry(vcpu
, 0x80000008, 0);
3410 return best
->eax
& 0xff;
3414 void kvm_emulate_cpuid(struct kvm_vcpu
*vcpu
)
3416 u32 function
, index
;
3417 struct kvm_cpuid_entry2
*best
;
3419 function
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3420 index
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
3421 kvm_register_write(vcpu
, VCPU_REGS_RAX
, 0);
3422 kvm_register_write(vcpu
, VCPU_REGS_RBX
, 0);
3423 kvm_register_write(vcpu
, VCPU_REGS_RCX
, 0);
3424 kvm_register_write(vcpu
, VCPU_REGS_RDX
, 0);
3425 best
= kvm_find_cpuid_entry(vcpu
, function
, index
);
3427 kvm_register_write(vcpu
, VCPU_REGS_RAX
, best
->eax
);
3428 kvm_register_write(vcpu
, VCPU_REGS_RBX
, best
->ebx
);
3429 kvm_register_write(vcpu
, VCPU_REGS_RCX
, best
->ecx
);
3430 kvm_register_write(vcpu
, VCPU_REGS_RDX
, best
->edx
);
3432 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
3433 trace_kvm_cpuid(function
,
3434 kvm_register_read(vcpu
, VCPU_REGS_RAX
),
3435 kvm_register_read(vcpu
, VCPU_REGS_RBX
),
3436 kvm_register_read(vcpu
, VCPU_REGS_RCX
),
3437 kvm_register_read(vcpu
, VCPU_REGS_RDX
));
3439 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid
);
3442 * Check if userspace requested an interrupt window, and that the
3443 * interrupt window is open.
3445 * No need to exit to userspace if we already have an interrupt queued.
3447 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
,
3448 struct kvm_run
*kvm_run
)
3450 return (!irqchip_in_kernel(vcpu
->kvm
) && !kvm_cpu_has_interrupt(vcpu
) &&
3451 kvm_run
->request_interrupt_window
&&
3452 kvm_arch_interrupt_allowed(vcpu
));
3455 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
,
3456 struct kvm_run
*kvm_run
)
3458 kvm_run
->if_flag
= (kvm_x86_ops
->get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
3459 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
3460 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
3461 if (irqchip_in_kernel(vcpu
->kvm
))
3462 kvm_run
->ready_for_interrupt_injection
= 1;
3464 kvm_run
->ready_for_interrupt_injection
=
3465 kvm_arch_interrupt_allowed(vcpu
) &&
3466 !kvm_cpu_has_interrupt(vcpu
) &&
3467 !kvm_event_needs_reinjection(vcpu
);
3470 static void vapic_enter(struct kvm_vcpu
*vcpu
)
3472 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
3475 if (!apic
|| !apic
->vapic_addr
)
3478 page
= gfn_to_page(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
3480 vcpu
->arch
.apic
->vapic_page
= page
;
3483 static void vapic_exit(struct kvm_vcpu
*vcpu
)
3485 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
3487 if (!apic
|| !apic
->vapic_addr
)
3490 down_read(&vcpu
->kvm
->slots_lock
);
3491 kvm_release_page_dirty(apic
->vapic_page
);
3492 mark_page_dirty(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
3493 up_read(&vcpu
->kvm
->slots_lock
);
3496 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
3500 if (!kvm_x86_ops
->update_cr8_intercept
)
3503 if (!vcpu
->arch
.apic
->vapic_addr
)
3504 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
3511 tpr
= kvm_lapic_get_cr8(vcpu
);
3513 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
3516 static void inject_pending_event(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
3518 /* try to reinject previous events if any */
3519 if (vcpu
->arch
.exception
.pending
) {
3520 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
3521 vcpu
->arch
.exception
.has_error_code
,
3522 vcpu
->arch
.exception
.error_code
);
3526 if (vcpu
->arch
.nmi_injected
) {
3527 kvm_x86_ops
->set_nmi(vcpu
);
3531 if (vcpu
->arch
.interrupt
.pending
) {
3532 kvm_x86_ops
->set_irq(vcpu
);
3536 /* try to inject new event if pending */
3537 if (vcpu
->arch
.nmi_pending
) {
3538 if (kvm_x86_ops
->nmi_allowed(vcpu
)) {
3539 vcpu
->arch
.nmi_pending
= false;
3540 vcpu
->arch
.nmi_injected
= true;
3541 kvm_x86_ops
->set_nmi(vcpu
);
3543 } else if (kvm_cpu_has_interrupt(vcpu
)) {
3544 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
3545 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
3547 kvm_x86_ops
->set_irq(vcpu
);
3552 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
3555 bool req_int_win
= !irqchip_in_kernel(vcpu
->kvm
) &&
3556 kvm_run
->request_interrupt_window
;
3559 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD
, &vcpu
->requests
))
3560 kvm_mmu_unload(vcpu
);
3562 r
= kvm_mmu_reload(vcpu
);
3566 if (vcpu
->requests
) {
3567 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER
, &vcpu
->requests
))
3568 __kvm_migrate_timers(vcpu
);
3569 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE
, &vcpu
->requests
))
3570 kvm_write_guest_time(vcpu
);
3571 if (test_and_clear_bit(KVM_REQ_MMU_SYNC
, &vcpu
->requests
))
3572 kvm_mmu_sync_roots(vcpu
);
3573 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH
, &vcpu
->requests
))
3574 kvm_x86_ops
->tlb_flush(vcpu
);
3575 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS
,
3577 kvm_run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
3581 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT
, &vcpu
->requests
)) {
3582 kvm_run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
3590 kvm_x86_ops
->prepare_guest_switch(vcpu
);
3591 kvm_load_guest_fpu(vcpu
);
3593 local_irq_disable();
3595 clear_bit(KVM_REQ_KICK
, &vcpu
->requests
);
3596 smp_mb__after_clear_bit();
3598 if (vcpu
->requests
|| need_resched() || signal_pending(current
)) {
3599 set_bit(KVM_REQ_KICK
, &vcpu
->requests
);
3606 inject_pending_event(vcpu
, kvm_run
);
3608 /* enable NMI/IRQ window open exits if needed */
3609 if (vcpu
->arch
.nmi_pending
)
3610 kvm_x86_ops
->enable_nmi_window(vcpu
);
3611 else if (kvm_cpu_has_interrupt(vcpu
) || req_int_win
)
3612 kvm_x86_ops
->enable_irq_window(vcpu
);
3614 if (kvm_lapic_enabled(vcpu
)) {
3615 update_cr8_intercept(vcpu
);
3616 kvm_lapic_sync_to_vapic(vcpu
);
3619 up_read(&vcpu
->kvm
->slots_lock
);
3623 get_debugreg(vcpu
->arch
.host_dr6
, 6);
3624 get_debugreg(vcpu
->arch
.host_dr7
, 7);
3625 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
3626 get_debugreg(vcpu
->arch
.host_db
[0], 0);
3627 get_debugreg(vcpu
->arch
.host_db
[1], 1);
3628 get_debugreg(vcpu
->arch
.host_db
[2], 2);
3629 get_debugreg(vcpu
->arch
.host_db
[3], 3);
3632 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
3633 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
3634 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
3635 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
3638 trace_kvm_entry(vcpu
->vcpu_id
);
3639 kvm_x86_ops
->run(vcpu
, kvm_run
);
3641 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
3643 set_debugreg(vcpu
->arch
.host_db
[0], 0);
3644 set_debugreg(vcpu
->arch
.host_db
[1], 1);
3645 set_debugreg(vcpu
->arch
.host_db
[2], 2);
3646 set_debugreg(vcpu
->arch
.host_db
[3], 3);
3648 set_debugreg(vcpu
->arch
.host_dr6
, 6);
3649 set_debugreg(vcpu
->arch
.host_dr7
, 7);
3651 set_bit(KVM_REQ_KICK
, &vcpu
->requests
);
3657 * We must have an instruction between local_irq_enable() and
3658 * kvm_guest_exit(), so the timer interrupt isn't delayed by
3659 * the interrupt shadow. The stat.exits increment will do nicely.
3660 * But we need to prevent reordering, hence this barrier():
3668 down_read(&vcpu
->kvm
->slots_lock
);
3671 * Profile KVM exit RIPs:
3673 if (unlikely(prof_on
== KVM_PROFILING
)) {
3674 unsigned long rip
= kvm_rip_read(vcpu
);
3675 profile_hit(KVM_PROFILING
, (void *)rip
);
3679 kvm_lapic_sync_from_vapic(vcpu
);
3681 r
= kvm_x86_ops
->handle_exit(kvm_run
, vcpu
);
3687 static int __vcpu_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
3691 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
)) {
3692 pr_debug("vcpu %d received sipi with vector # %x\n",
3693 vcpu
->vcpu_id
, vcpu
->arch
.sipi_vector
);
3694 kvm_lapic_reset(vcpu
);
3695 r
= kvm_arch_vcpu_reset(vcpu
);
3698 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
3701 down_read(&vcpu
->kvm
->slots_lock
);
3706 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
)
3707 r
= vcpu_enter_guest(vcpu
, kvm_run
);
3709 up_read(&vcpu
->kvm
->slots_lock
);
3710 kvm_vcpu_block(vcpu
);
3711 down_read(&vcpu
->kvm
->slots_lock
);
3712 if (test_and_clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
))
3714 switch(vcpu
->arch
.mp_state
) {
3715 case KVM_MP_STATE_HALTED
:
3716 vcpu
->arch
.mp_state
=
3717 KVM_MP_STATE_RUNNABLE
;
3718 case KVM_MP_STATE_RUNNABLE
:
3720 case KVM_MP_STATE_SIPI_RECEIVED
:
3731 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
3732 if (kvm_cpu_has_pending_timer(vcpu
))
3733 kvm_inject_pending_timer_irqs(vcpu
);
3735 if (dm_request_for_irq_injection(vcpu
, kvm_run
)) {
3737 kvm_run
->exit_reason
= KVM_EXIT_INTR
;
3738 ++vcpu
->stat
.request_irq_exits
;
3740 if (signal_pending(current
)) {
3742 kvm_run
->exit_reason
= KVM_EXIT_INTR
;
3743 ++vcpu
->stat
.signal_exits
;
3745 if (need_resched()) {
3746 up_read(&vcpu
->kvm
->slots_lock
);
3748 down_read(&vcpu
->kvm
->slots_lock
);
3752 up_read(&vcpu
->kvm
->slots_lock
);
3753 post_kvm_run_save(vcpu
, kvm_run
);
3760 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
3767 if (vcpu
->sigset_active
)
3768 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
3770 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
3771 kvm_vcpu_block(vcpu
);
3772 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
3777 /* re-sync apic's tpr */
3778 if (!irqchip_in_kernel(vcpu
->kvm
))
3779 kvm_set_cr8(vcpu
, kvm_run
->cr8
);
3781 if (vcpu
->arch
.pio
.cur_count
) {
3782 r
= complete_pio(vcpu
);
3786 #if CONFIG_HAS_IOMEM
3787 if (vcpu
->mmio_needed
) {
3788 memcpy(vcpu
->mmio_data
, kvm_run
->mmio
.data
, 8);
3789 vcpu
->mmio_read_completed
= 1;
3790 vcpu
->mmio_needed
= 0;
3792 down_read(&vcpu
->kvm
->slots_lock
);
3793 r
= emulate_instruction(vcpu
, kvm_run
,
3794 vcpu
->arch
.mmio_fault_cr2
, 0,
3795 EMULTYPE_NO_DECODE
);
3796 up_read(&vcpu
->kvm
->slots_lock
);
3797 if (r
== EMULATE_DO_MMIO
) {
3799 * Read-modify-write. Back to userspace.
3806 if (kvm_run
->exit_reason
== KVM_EXIT_HYPERCALL
)
3807 kvm_register_write(vcpu
, VCPU_REGS_RAX
,
3808 kvm_run
->hypercall
.ret
);
3810 r
= __vcpu_run(vcpu
, kvm_run
);
3813 if (vcpu
->sigset_active
)
3814 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
3820 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
3824 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3825 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
3826 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
3827 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
3828 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
3829 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
3830 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
3831 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
3832 #ifdef CONFIG_X86_64
3833 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
3834 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
3835 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
3836 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
3837 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
3838 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
3839 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
3840 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
3843 regs
->rip
= kvm_rip_read(vcpu
);
3844 regs
->rflags
= kvm_x86_ops
->get_rflags(vcpu
);
3847 * Don't leak debug flags in case they were set for guest debugging
3849 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
3850 regs
->rflags
&= ~(X86_EFLAGS_TF
| X86_EFLAGS_RF
);
3857 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
3861 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
3862 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
3863 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
3864 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
3865 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
3866 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
3867 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
3868 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
3869 #ifdef CONFIG_X86_64
3870 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
3871 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
3872 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
3873 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
3874 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
3875 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
3876 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
3877 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
3881 kvm_rip_write(vcpu
, regs
->rip
);
3882 kvm_x86_ops
->set_rflags(vcpu
, regs
->rflags
);
3885 vcpu
->arch
.exception
.pending
= false;
3892 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
3893 struct kvm_segment
*var
, int seg
)
3895 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
3898 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
3900 struct kvm_segment cs
;
3902 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
3906 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
3908 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
3909 struct kvm_sregs
*sregs
)
3911 struct descriptor_table dt
;
3915 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
3916 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
3917 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
3918 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
3919 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
3920 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
3922 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
3923 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
3925 kvm_x86_ops
->get_idt(vcpu
, &dt
);
3926 sregs
->idt
.limit
= dt
.limit
;
3927 sregs
->idt
.base
= dt
.base
;
3928 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
3929 sregs
->gdt
.limit
= dt
.limit
;
3930 sregs
->gdt
.base
= dt
.base
;
3932 kvm_x86_ops
->decache_cr4_guest_bits(vcpu
);
3933 sregs
->cr0
= vcpu
->arch
.cr0
;
3934 sregs
->cr2
= vcpu
->arch
.cr2
;
3935 sregs
->cr3
= vcpu
->arch
.cr3
;
3936 sregs
->cr4
= vcpu
->arch
.cr4
;
3937 sregs
->cr8
= kvm_get_cr8(vcpu
);
3938 sregs
->efer
= vcpu
->arch
.shadow_efer
;
3939 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
3941 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
3943 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
3944 set_bit(vcpu
->arch
.interrupt
.nr
,
3945 (unsigned long *)sregs
->interrupt_bitmap
);
3952 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
3953 struct kvm_mp_state
*mp_state
)
3956 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
3961 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
3962 struct kvm_mp_state
*mp_state
)
3965 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
3970 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
3971 struct kvm_segment
*var
, int seg
)
3973 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
3976 static void seg_desct_to_kvm_desct(struct desc_struct
*seg_desc
, u16 selector
,
3977 struct kvm_segment
*kvm_desct
)
3979 kvm_desct
->base
= get_desc_base(seg_desc
);
3980 kvm_desct
->limit
= get_desc_limit(seg_desc
);
3982 kvm_desct
->limit
<<= 12;
3983 kvm_desct
->limit
|= 0xfff;
3985 kvm_desct
->selector
= selector
;
3986 kvm_desct
->type
= seg_desc
->type
;
3987 kvm_desct
->present
= seg_desc
->p
;
3988 kvm_desct
->dpl
= seg_desc
->dpl
;
3989 kvm_desct
->db
= seg_desc
->d
;
3990 kvm_desct
->s
= seg_desc
->s
;
3991 kvm_desct
->l
= seg_desc
->l
;
3992 kvm_desct
->g
= seg_desc
->g
;
3993 kvm_desct
->avl
= seg_desc
->avl
;
3995 kvm_desct
->unusable
= 1;
3997 kvm_desct
->unusable
= 0;
3998 kvm_desct
->padding
= 0;
4001 static void get_segment_descriptor_dtable(struct kvm_vcpu
*vcpu
,
4003 struct descriptor_table
*dtable
)
4005 if (selector
& 1 << 2) {
4006 struct kvm_segment kvm_seg
;
4008 kvm_get_segment(vcpu
, &kvm_seg
, VCPU_SREG_LDTR
);
4010 if (kvm_seg
.unusable
)
4013 dtable
->limit
= kvm_seg
.limit
;
4014 dtable
->base
= kvm_seg
.base
;
4017 kvm_x86_ops
->get_gdt(vcpu
, dtable
);
4020 /* allowed just for 8 bytes segments */
4021 static int load_guest_segment_descriptor(struct kvm_vcpu
*vcpu
, u16 selector
,
4022 struct desc_struct
*seg_desc
)
4025 struct descriptor_table dtable
;
4026 u16 index
= selector
>> 3;
4028 get_segment_descriptor_dtable(vcpu
, selector
, &dtable
);
4030 if (dtable
.limit
< index
* 8 + 7) {
4031 kvm_queue_exception_e(vcpu
, GP_VECTOR
, selector
& 0xfffc);
4034 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, dtable
.base
);
4036 return kvm_read_guest(vcpu
->kvm
, gpa
, seg_desc
, 8);
4039 /* allowed just for 8 bytes segments */
4040 static int save_guest_segment_descriptor(struct kvm_vcpu
*vcpu
, u16 selector
,
4041 struct desc_struct
*seg_desc
)
4044 struct descriptor_table dtable
;
4045 u16 index
= selector
>> 3;
4047 get_segment_descriptor_dtable(vcpu
, selector
, &dtable
);
4049 if (dtable
.limit
< index
* 8 + 7)
4051 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, dtable
.base
);
4053 return kvm_write_guest(vcpu
->kvm
, gpa
, seg_desc
, 8);
4056 static u32
get_tss_base_addr(struct kvm_vcpu
*vcpu
,
4057 struct desc_struct
*seg_desc
)
4059 u32 base_addr
= get_desc_base(seg_desc
);
4061 return vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, base_addr
);
4064 static u16
get_segment_selector(struct kvm_vcpu
*vcpu
, int seg
)
4066 struct kvm_segment kvm_seg
;
4068 kvm_get_segment(vcpu
, &kvm_seg
, seg
);
4069 return kvm_seg
.selector
;
4072 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu
*vcpu
,
4074 struct kvm_segment
*kvm_seg
)
4076 struct desc_struct seg_desc
;
4078 if (load_guest_segment_descriptor(vcpu
, selector
, &seg_desc
))
4080 seg_desct_to_kvm_desct(&seg_desc
, selector
, kvm_seg
);
4084 static int kvm_load_realmode_segment(struct kvm_vcpu
*vcpu
, u16 selector
, int seg
)
4086 struct kvm_segment segvar
= {
4087 .base
= selector
<< 4,
4089 .selector
= selector
,
4100 kvm_x86_ops
->set_segment(vcpu
, &segvar
, seg
);
4104 static int is_vm86_segment(struct kvm_vcpu
*vcpu
, int seg
)
4106 return (seg
!= VCPU_SREG_LDTR
) &&
4107 (seg
!= VCPU_SREG_TR
) &&
4108 (kvm_x86_ops
->get_rflags(vcpu
) & X86_EFLAGS_VM
);
4111 int kvm_load_segment_descriptor(struct kvm_vcpu
*vcpu
, u16 selector
,
4112 int type_bits
, int seg
)
4114 struct kvm_segment kvm_seg
;
4116 if (is_vm86_segment(vcpu
, seg
) || !(vcpu
->arch
.cr0
& X86_CR0_PE
))
4117 return kvm_load_realmode_segment(vcpu
, selector
, seg
);
4118 if (load_segment_descriptor_to_kvm_desct(vcpu
, selector
, &kvm_seg
))
4120 kvm_seg
.type
|= type_bits
;
4122 if (seg
!= VCPU_SREG_SS
&& seg
!= VCPU_SREG_CS
&&
4123 seg
!= VCPU_SREG_LDTR
)
4125 kvm_seg
.unusable
= 1;
4127 kvm_set_segment(vcpu
, &kvm_seg
, seg
);
4131 static void save_state_to_tss32(struct kvm_vcpu
*vcpu
,
4132 struct tss_segment_32
*tss
)
4134 tss
->cr3
= vcpu
->arch
.cr3
;
4135 tss
->eip
= kvm_rip_read(vcpu
);
4136 tss
->eflags
= kvm_x86_ops
->get_rflags(vcpu
);
4137 tss
->eax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4138 tss
->ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4139 tss
->edx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4140 tss
->ebx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
4141 tss
->esp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
4142 tss
->ebp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
4143 tss
->esi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
4144 tss
->edi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
4145 tss
->es
= get_segment_selector(vcpu
, VCPU_SREG_ES
);
4146 tss
->cs
= get_segment_selector(vcpu
, VCPU_SREG_CS
);
4147 tss
->ss
= get_segment_selector(vcpu
, VCPU_SREG_SS
);
4148 tss
->ds
= get_segment_selector(vcpu
, VCPU_SREG_DS
);
4149 tss
->fs
= get_segment_selector(vcpu
, VCPU_SREG_FS
);
4150 tss
->gs
= get_segment_selector(vcpu
, VCPU_SREG_GS
);
4151 tss
->ldt_selector
= get_segment_selector(vcpu
, VCPU_SREG_LDTR
);
4154 static int load_state_from_tss32(struct kvm_vcpu
*vcpu
,
4155 struct tss_segment_32
*tss
)
4157 kvm_set_cr3(vcpu
, tss
->cr3
);
4159 kvm_rip_write(vcpu
, tss
->eip
);
4160 kvm_x86_ops
->set_rflags(vcpu
, tss
->eflags
| 2);
4162 kvm_register_write(vcpu
, VCPU_REGS_RAX
, tss
->eax
);
4163 kvm_register_write(vcpu
, VCPU_REGS_RCX
, tss
->ecx
);
4164 kvm_register_write(vcpu
, VCPU_REGS_RDX
, tss
->edx
);
4165 kvm_register_write(vcpu
, VCPU_REGS_RBX
, tss
->ebx
);
4166 kvm_register_write(vcpu
, VCPU_REGS_RSP
, tss
->esp
);
4167 kvm_register_write(vcpu
, VCPU_REGS_RBP
, tss
->ebp
);
4168 kvm_register_write(vcpu
, VCPU_REGS_RSI
, tss
->esi
);
4169 kvm_register_write(vcpu
, VCPU_REGS_RDI
, tss
->edi
);
4171 if (kvm_load_segment_descriptor(vcpu
, tss
->ldt_selector
, 0, VCPU_SREG_LDTR
))
4174 if (kvm_load_segment_descriptor(vcpu
, tss
->es
, 1, VCPU_SREG_ES
))
4177 if (kvm_load_segment_descriptor(vcpu
, tss
->cs
, 9, VCPU_SREG_CS
))
4180 if (kvm_load_segment_descriptor(vcpu
, tss
->ss
, 1, VCPU_SREG_SS
))
4183 if (kvm_load_segment_descriptor(vcpu
, tss
->ds
, 1, VCPU_SREG_DS
))
4186 if (kvm_load_segment_descriptor(vcpu
, tss
->fs
, 1, VCPU_SREG_FS
))
4189 if (kvm_load_segment_descriptor(vcpu
, tss
->gs
, 1, VCPU_SREG_GS
))
4194 static void save_state_to_tss16(struct kvm_vcpu
*vcpu
,
4195 struct tss_segment_16
*tss
)
4197 tss
->ip
= kvm_rip_read(vcpu
);
4198 tss
->flag
= kvm_x86_ops
->get_rflags(vcpu
);
4199 tss
->ax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4200 tss
->cx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4201 tss
->dx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4202 tss
->bx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
4203 tss
->sp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
4204 tss
->bp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
4205 tss
->si
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
4206 tss
->di
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
4208 tss
->es
= get_segment_selector(vcpu
, VCPU_SREG_ES
);
4209 tss
->cs
= get_segment_selector(vcpu
, VCPU_SREG_CS
);
4210 tss
->ss
= get_segment_selector(vcpu
, VCPU_SREG_SS
);
4211 tss
->ds
= get_segment_selector(vcpu
, VCPU_SREG_DS
);
4212 tss
->ldt
= get_segment_selector(vcpu
, VCPU_SREG_LDTR
);
4213 tss
->prev_task_link
= get_segment_selector(vcpu
, VCPU_SREG_TR
);
4216 static int load_state_from_tss16(struct kvm_vcpu
*vcpu
,
4217 struct tss_segment_16
*tss
)
4219 kvm_rip_write(vcpu
, tss
->ip
);
4220 kvm_x86_ops
->set_rflags(vcpu
, tss
->flag
| 2);
4221 kvm_register_write(vcpu
, VCPU_REGS_RAX
, tss
->ax
);
4222 kvm_register_write(vcpu
, VCPU_REGS_RCX
, tss
->cx
);
4223 kvm_register_write(vcpu
, VCPU_REGS_RDX
, tss
->dx
);
4224 kvm_register_write(vcpu
, VCPU_REGS_RBX
, tss
->bx
);
4225 kvm_register_write(vcpu
, VCPU_REGS_RSP
, tss
->sp
);
4226 kvm_register_write(vcpu
, VCPU_REGS_RBP
, tss
->bp
);
4227 kvm_register_write(vcpu
, VCPU_REGS_RSI
, tss
->si
);
4228 kvm_register_write(vcpu
, VCPU_REGS_RDI
, tss
->di
);
4230 if (kvm_load_segment_descriptor(vcpu
, tss
->ldt
, 0, VCPU_SREG_LDTR
))
4233 if (kvm_load_segment_descriptor(vcpu
, tss
->es
, 1, VCPU_SREG_ES
))
4236 if (kvm_load_segment_descriptor(vcpu
, tss
->cs
, 9, VCPU_SREG_CS
))
4239 if (kvm_load_segment_descriptor(vcpu
, tss
->ss
, 1, VCPU_SREG_SS
))
4242 if (kvm_load_segment_descriptor(vcpu
, tss
->ds
, 1, VCPU_SREG_DS
))
4247 static int kvm_task_switch_16(struct kvm_vcpu
*vcpu
, u16 tss_selector
,
4248 u16 old_tss_sel
, u32 old_tss_base
,
4249 struct desc_struct
*nseg_desc
)
4251 struct tss_segment_16 tss_segment_16
;
4254 if (kvm_read_guest(vcpu
->kvm
, old_tss_base
, &tss_segment_16
,
4255 sizeof tss_segment_16
))
4258 save_state_to_tss16(vcpu
, &tss_segment_16
);
4260 if (kvm_write_guest(vcpu
->kvm
, old_tss_base
, &tss_segment_16
,
4261 sizeof tss_segment_16
))
4264 if (kvm_read_guest(vcpu
->kvm
, get_tss_base_addr(vcpu
, nseg_desc
),
4265 &tss_segment_16
, sizeof tss_segment_16
))
4268 if (old_tss_sel
!= 0xffff) {
4269 tss_segment_16
.prev_task_link
= old_tss_sel
;
4271 if (kvm_write_guest(vcpu
->kvm
,
4272 get_tss_base_addr(vcpu
, nseg_desc
),
4273 &tss_segment_16
.prev_task_link
,
4274 sizeof tss_segment_16
.prev_task_link
))
4278 if (load_state_from_tss16(vcpu
, &tss_segment_16
))
4286 static int kvm_task_switch_32(struct kvm_vcpu
*vcpu
, u16 tss_selector
,
4287 u16 old_tss_sel
, u32 old_tss_base
,
4288 struct desc_struct
*nseg_desc
)
4290 struct tss_segment_32 tss_segment_32
;
4293 if (kvm_read_guest(vcpu
->kvm
, old_tss_base
, &tss_segment_32
,
4294 sizeof tss_segment_32
))
4297 save_state_to_tss32(vcpu
, &tss_segment_32
);
4299 if (kvm_write_guest(vcpu
->kvm
, old_tss_base
, &tss_segment_32
,
4300 sizeof tss_segment_32
))
4303 if (kvm_read_guest(vcpu
->kvm
, get_tss_base_addr(vcpu
, nseg_desc
),
4304 &tss_segment_32
, sizeof tss_segment_32
))
4307 if (old_tss_sel
!= 0xffff) {
4308 tss_segment_32
.prev_task_link
= old_tss_sel
;
4310 if (kvm_write_guest(vcpu
->kvm
,
4311 get_tss_base_addr(vcpu
, nseg_desc
),
4312 &tss_segment_32
.prev_task_link
,
4313 sizeof tss_segment_32
.prev_task_link
))
4317 if (load_state_from_tss32(vcpu
, &tss_segment_32
))
4325 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int reason
)
4327 struct kvm_segment tr_seg
;
4328 struct desc_struct cseg_desc
;
4329 struct desc_struct nseg_desc
;
4331 u32 old_tss_base
= get_segment_base(vcpu
, VCPU_SREG_TR
);
4332 u16 old_tss_sel
= get_segment_selector(vcpu
, VCPU_SREG_TR
);
4334 old_tss_base
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, old_tss_base
);
4336 /* FIXME: Handle errors. Failure to read either TSS or their
4337 * descriptors should generate a pagefault.
4339 if (load_guest_segment_descriptor(vcpu
, tss_selector
, &nseg_desc
))
4342 if (load_guest_segment_descriptor(vcpu
, old_tss_sel
, &cseg_desc
))
4345 if (reason
!= TASK_SWITCH_IRET
) {
4348 cpl
= kvm_x86_ops
->get_cpl(vcpu
);
4349 if ((tss_selector
& 3) > nseg_desc
.dpl
|| cpl
> nseg_desc
.dpl
) {
4350 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
4355 if (!nseg_desc
.p
|| get_desc_limit(&nseg_desc
) < 0x67) {
4356 kvm_queue_exception_e(vcpu
, TS_VECTOR
, tss_selector
& 0xfffc);
4360 if (reason
== TASK_SWITCH_IRET
|| reason
== TASK_SWITCH_JMP
) {
4361 cseg_desc
.type
&= ~(1 << 1); //clear the B flag
4362 save_guest_segment_descriptor(vcpu
, old_tss_sel
, &cseg_desc
);
4365 if (reason
== TASK_SWITCH_IRET
) {
4366 u32 eflags
= kvm_x86_ops
->get_rflags(vcpu
);
4367 kvm_x86_ops
->set_rflags(vcpu
, eflags
& ~X86_EFLAGS_NT
);
4370 /* set back link to prev task only if NT bit is set in eflags
4371 note that old_tss_sel is not used afetr this point */
4372 if (reason
!= TASK_SWITCH_CALL
&& reason
!= TASK_SWITCH_GATE
)
4373 old_tss_sel
= 0xffff;
4375 /* set back link to prev task only if NT bit is set in eflags
4376 note that old_tss_sel is not used afetr this point */
4377 if (reason
!= TASK_SWITCH_CALL
&& reason
!= TASK_SWITCH_GATE
)
4378 old_tss_sel
= 0xffff;
4380 if (nseg_desc
.type
& 8)
4381 ret
= kvm_task_switch_32(vcpu
, tss_selector
, old_tss_sel
,
4382 old_tss_base
, &nseg_desc
);
4384 ret
= kvm_task_switch_16(vcpu
, tss_selector
, old_tss_sel
,
4385 old_tss_base
, &nseg_desc
);
4387 if (reason
== TASK_SWITCH_CALL
|| reason
== TASK_SWITCH_GATE
) {
4388 u32 eflags
= kvm_x86_ops
->get_rflags(vcpu
);
4389 kvm_x86_ops
->set_rflags(vcpu
, eflags
| X86_EFLAGS_NT
);
4392 if (reason
!= TASK_SWITCH_IRET
) {
4393 nseg_desc
.type
|= (1 << 1);
4394 save_guest_segment_descriptor(vcpu
, tss_selector
,
4398 kvm_x86_ops
->set_cr0(vcpu
, vcpu
->arch
.cr0
| X86_CR0_TS
);
4399 seg_desct_to_kvm_desct(&nseg_desc
, tss_selector
, &tr_seg
);
4401 kvm_set_segment(vcpu
, &tr_seg
, VCPU_SREG_TR
);
4405 EXPORT_SYMBOL_GPL(kvm_task_switch
);
4407 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
4408 struct kvm_sregs
*sregs
)
4410 int mmu_reset_needed
= 0;
4411 int pending_vec
, max_bits
;
4412 struct descriptor_table dt
;
4416 dt
.limit
= sregs
->idt
.limit
;
4417 dt
.base
= sregs
->idt
.base
;
4418 kvm_x86_ops
->set_idt(vcpu
, &dt
);
4419 dt
.limit
= sregs
->gdt
.limit
;
4420 dt
.base
= sregs
->gdt
.base
;
4421 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
4423 vcpu
->arch
.cr2
= sregs
->cr2
;
4424 mmu_reset_needed
|= vcpu
->arch
.cr3
!= sregs
->cr3
;
4425 vcpu
->arch
.cr3
= sregs
->cr3
;
4427 kvm_set_cr8(vcpu
, sregs
->cr8
);
4429 mmu_reset_needed
|= vcpu
->arch
.shadow_efer
!= sregs
->efer
;
4430 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
4431 kvm_set_apic_base(vcpu
, sregs
->apic_base
);
4433 kvm_x86_ops
->decache_cr4_guest_bits(vcpu
);
4435 mmu_reset_needed
|= vcpu
->arch
.cr0
!= sregs
->cr0
;
4436 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
4437 vcpu
->arch
.cr0
= sregs
->cr0
;
4439 mmu_reset_needed
|= vcpu
->arch
.cr4
!= sregs
->cr4
;
4440 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
4441 if (!is_long_mode(vcpu
) && is_pae(vcpu
))
4442 load_pdptrs(vcpu
, vcpu
->arch
.cr3
);
4444 if (mmu_reset_needed
)
4445 kvm_mmu_reset_context(vcpu
);
4447 max_bits
= (sizeof sregs
->interrupt_bitmap
) << 3;
4448 pending_vec
= find_first_bit(
4449 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
4450 if (pending_vec
< max_bits
) {
4451 kvm_queue_interrupt(vcpu
, pending_vec
, false);
4452 pr_debug("Set back pending irq %d\n", pending_vec
);
4453 if (irqchip_in_kernel(vcpu
->kvm
))
4454 kvm_pic_clear_isr_ack(vcpu
->kvm
);
4457 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
4458 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
4459 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
4460 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
4461 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
4462 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
4464 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
4465 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
4467 update_cr8_intercept(vcpu
);
4469 /* Older userspace won't unhalt the vcpu on reset. */
4470 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
4471 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
4472 !(vcpu
->arch
.cr0
& X86_CR0_PE
))
4473 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
4480 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
4481 struct kvm_guest_debug
*dbg
)
4487 if ((dbg
->control
& (KVM_GUESTDBG_ENABLE
| KVM_GUESTDBG_USE_HW_BP
)) ==
4488 (KVM_GUESTDBG_ENABLE
| KVM_GUESTDBG_USE_HW_BP
)) {
4489 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
4490 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
4491 vcpu
->arch
.switch_db_regs
=
4492 (dbg
->arch
.debugreg
[7] & DR7_BP_EN_MASK
);
4494 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
4495 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
4496 vcpu
->arch
.switch_db_regs
= (vcpu
->arch
.dr7
& DR7_BP_EN_MASK
);
4499 r
= kvm_x86_ops
->set_guest_debug(vcpu
, dbg
);
4501 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
4502 kvm_queue_exception(vcpu
, DB_VECTOR
);
4503 else if (dbg
->control
& KVM_GUESTDBG_INJECT_BP
)
4504 kvm_queue_exception(vcpu
, BP_VECTOR
);
4512 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
4513 * we have asm/x86/processor.h
4524 u32 st_space
[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
4525 #ifdef CONFIG_X86_64
4526 u32 xmm_space
[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
4528 u32 xmm_space
[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
4533 * Translate a guest virtual address to a guest physical address.
4535 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
4536 struct kvm_translation
*tr
)
4538 unsigned long vaddr
= tr
->linear_address
;
4542 down_read(&vcpu
->kvm
->slots_lock
);
4543 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, vaddr
);
4544 up_read(&vcpu
->kvm
->slots_lock
);
4545 tr
->physical_address
= gpa
;
4546 tr
->valid
= gpa
!= UNMAPPED_GVA
;
4554 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
4556 struct fxsave
*fxsave
= (struct fxsave
*)&vcpu
->arch
.guest_fx_image
;
4560 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
4561 fpu
->fcw
= fxsave
->cwd
;
4562 fpu
->fsw
= fxsave
->swd
;
4563 fpu
->ftwx
= fxsave
->twd
;
4564 fpu
->last_opcode
= fxsave
->fop
;
4565 fpu
->last_ip
= fxsave
->rip
;
4566 fpu
->last_dp
= fxsave
->rdp
;
4567 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
4574 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
4576 struct fxsave
*fxsave
= (struct fxsave
*)&vcpu
->arch
.guest_fx_image
;
4580 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
4581 fxsave
->cwd
= fpu
->fcw
;
4582 fxsave
->swd
= fpu
->fsw
;
4583 fxsave
->twd
= fpu
->ftwx
;
4584 fxsave
->fop
= fpu
->last_opcode
;
4585 fxsave
->rip
= fpu
->last_ip
;
4586 fxsave
->rdp
= fpu
->last_dp
;
4587 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
4594 void fx_init(struct kvm_vcpu
*vcpu
)
4596 unsigned after_mxcsr_mask
;
4599 * Touch the fpu the first time in non atomic context as if
4600 * this is the first fpu instruction the exception handler
4601 * will fire before the instruction returns and it'll have to
4602 * allocate ram with GFP_KERNEL.
4605 kvm_fx_save(&vcpu
->arch
.host_fx_image
);
4607 /* Initialize guest FPU by resetting ours and saving into guest's */
4609 kvm_fx_save(&vcpu
->arch
.host_fx_image
);
4611 kvm_fx_save(&vcpu
->arch
.guest_fx_image
);
4612 kvm_fx_restore(&vcpu
->arch
.host_fx_image
);
4615 vcpu
->arch
.cr0
|= X86_CR0_ET
;
4616 after_mxcsr_mask
= offsetof(struct i387_fxsave_struct
, st_space
);
4617 vcpu
->arch
.guest_fx_image
.mxcsr
= 0x1f80;
4618 memset((void *)&vcpu
->arch
.guest_fx_image
+ after_mxcsr_mask
,
4619 0, sizeof(struct i387_fxsave_struct
) - after_mxcsr_mask
);
4621 EXPORT_SYMBOL_GPL(fx_init
);
4623 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
4625 if (!vcpu
->fpu_active
|| vcpu
->guest_fpu_loaded
)
4628 vcpu
->guest_fpu_loaded
= 1;
4629 kvm_fx_save(&vcpu
->arch
.host_fx_image
);
4630 kvm_fx_restore(&vcpu
->arch
.guest_fx_image
);
4632 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu
);
4634 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
4636 if (!vcpu
->guest_fpu_loaded
)
4639 vcpu
->guest_fpu_loaded
= 0;
4640 kvm_fx_save(&vcpu
->arch
.guest_fx_image
);
4641 kvm_fx_restore(&vcpu
->arch
.host_fx_image
);
4642 ++vcpu
->stat
.fpu_reload
;
4644 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu
);
4646 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
4648 if (vcpu
->arch
.time_page
) {
4649 kvm_release_page_dirty(vcpu
->arch
.time_page
);
4650 vcpu
->arch
.time_page
= NULL
;
4653 kvm_x86_ops
->vcpu_free(vcpu
);
4656 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
4659 return kvm_x86_ops
->vcpu_create(kvm
, id
);
4662 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
4666 /* We do fxsave: this must be aligned. */
4667 BUG_ON((unsigned long)&vcpu
->arch
.host_fx_image
& 0xF);
4669 vcpu
->arch
.mtrr_state
.have_fixed
= 1;
4671 r
= kvm_arch_vcpu_reset(vcpu
);
4673 r
= kvm_mmu_setup(vcpu
);
4680 kvm_x86_ops
->vcpu_free(vcpu
);
4684 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
4687 kvm_mmu_unload(vcpu
);
4690 kvm_x86_ops
->vcpu_free(vcpu
);
4693 int kvm_arch_vcpu_reset(struct kvm_vcpu
*vcpu
)
4695 vcpu
->arch
.nmi_pending
= false;
4696 vcpu
->arch
.nmi_injected
= false;
4698 vcpu
->arch
.switch_db_regs
= 0;
4699 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
4700 vcpu
->arch
.dr6
= DR6_FIXED_1
;
4701 vcpu
->arch
.dr7
= DR7_FIXED_1
;
4703 return kvm_x86_ops
->vcpu_reset(vcpu
);
4706 void kvm_arch_hardware_enable(void *garbage
)
4708 kvm_x86_ops
->hardware_enable(garbage
);
4711 void kvm_arch_hardware_disable(void *garbage
)
4713 kvm_x86_ops
->hardware_disable(garbage
);
4716 int kvm_arch_hardware_setup(void)
4718 return kvm_x86_ops
->hardware_setup();
4721 void kvm_arch_hardware_unsetup(void)
4723 kvm_x86_ops
->hardware_unsetup();
4726 void kvm_arch_check_processor_compat(void *rtn
)
4728 kvm_x86_ops
->check_processor_compatibility(rtn
);
4731 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
4737 BUG_ON(vcpu
->kvm
== NULL
);
4740 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
4741 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_bsp(vcpu
))
4742 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
4744 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
4746 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
4751 vcpu
->arch
.pio_data
= page_address(page
);
4753 r
= kvm_mmu_create(vcpu
);
4755 goto fail_free_pio_data
;
4757 if (irqchip_in_kernel(kvm
)) {
4758 r
= kvm_create_lapic(vcpu
);
4760 goto fail_mmu_destroy
;
4763 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
4765 if (!vcpu
->arch
.mce_banks
) {
4767 goto fail_mmu_destroy
;
4769 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
4774 kvm_mmu_destroy(vcpu
);
4776 free_page((unsigned long)vcpu
->arch
.pio_data
);
4781 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
4783 kvm_free_lapic(vcpu
);
4784 down_read(&vcpu
->kvm
->slots_lock
);
4785 kvm_mmu_destroy(vcpu
);
4786 up_read(&vcpu
->kvm
->slots_lock
);
4787 free_page((unsigned long)vcpu
->arch
.pio_data
);
4790 struct kvm
*kvm_arch_create_vm(void)
4792 struct kvm
*kvm
= kzalloc(sizeof(struct kvm
), GFP_KERNEL
);
4795 return ERR_PTR(-ENOMEM
);
4797 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
4798 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
4800 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
4801 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
4803 rdtscll(kvm
->arch
.vm_init_tsc
);
4808 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
4811 kvm_mmu_unload(vcpu
);
4815 static void kvm_free_vcpus(struct kvm
*kvm
)
4818 struct kvm_vcpu
*vcpu
;
4821 * Unpin any mmu pages first.
4823 kvm_for_each_vcpu(i
, vcpu
, kvm
)
4824 kvm_unload_vcpu_mmu(vcpu
);
4825 kvm_for_each_vcpu(i
, vcpu
, kvm
)
4826 kvm_arch_vcpu_free(vcpu
);
4828 mutex_lock(&kvm
->lock
);
4829 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
4830 kvm
->vcpus
[i
] = NULL
;
4832 atomic_set(&kvm
->online_vcpus
, 0);
4833 mutex_unlock(&kvm
->lock
);
4836 void kvm_arch_sync_events(struct kvm
*kvm
)
4838 kvm_free_all_assigned_devices(kvm
);
4841 void kvm_arch_destroy_vm(struct kvm
*kvm
)
4843 kvm_iommu_unmap_guest(kvm
);
4845 kfree(kvm
->arch
.vpic
);
4846 kfree(kvm
->arch
.vioapic
);
4847 kvm_free_vcpus(kvm
);
4848 kvm_free_physmem(kvm
);
4849 if (kvm
->arch
.apic_access_page
)
4850 put_page(kvm
->arch
.apic_access_page
);
4851 if (kvm
->arch
.ept_identity_pagetable
)
4852 put_page(kvm
->arch
.ept_identity_pagetable
);
4856 int kvm_arch_set_memory_region(struct kvm
*kvm
,
4857 struct kvm_userspace_memory_region
*mem
,
4858 struct kvm_memory_slot old
,
4861 int npages
= mem
->memory_size
>> PAGE_SHIFT
;
4862 struct kvm_memory_slot
*memslot
= &kvm
->memslots
[mem
->slot
];
4864 /*To keep backward compatibility with older userspace,
4865 *x86 needs to hanlde !user_alloc case.
4868 if (npages
&& !old
.rmap
) {
4869 unsigned long userspace_addr
;
4871 down_write(¤t
->mm
->mmap_sem
);
4872 userspace_addr
= do_mmap(NULL
, 0,
4874 PROT_READ
| PROT_WRITE
,
4875 MAP_PRIVATE
| MAP_ANONYMOUS
,
4877 up_write(¤t
->mm
->mmap_sem
);
4879 if (IS_ERR((void *)userspace_addr
))
4880 return PTR_ERR((void *)userspace_addr
);
4882 /* set userspace_addr atomically for kvm_hva_to_rmapp */
4883 spin_lock(&kvm
->mmu_lock
);
4884 memslot
->userspace_addr
= userspace_addr
;
4885 spin_unlock(&kvm
->mmu_lock
);
4887 if (!old
.user_alloc
&& old
.rmap
) {
4890 down_write(¤t
->mm
->mmap_sem
);
4891 ret
= do_munmap(current
->mm
, old
.userspace_addr
,
4892 old
.npages
* PAGE_SIZE
);
4893 up_write(¤t
->mm
->mmap_sem
);
4896 "kvm_vm_ioctl_set_memory_region: "
4897 "failed to munmap memory\n");
4902 spin_lock(&kvm
->mmu_lock
);
4903 if (!kvm
->arch
.n_requested_mmu_pages
) {
4904 unsigned int nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
4905 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
4908 kvm_mmu_slot_remove_write_access(kvm
, mem
->slot
);
4909 spin_unlock(&kvm
->mmu_lock
);
4910 kvm_flush_remote_tlbs(kvm
);
4915 void kvm_arch_flush_shadow(struct kvm
*kvm
)
4917 kvm_mmu_zap_all(kvm
);
4918 kvm_reload_remote_mmus(kvm
);
4921 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
4923 return vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
4924 || vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
4925 || vcpu
->arch
.nmi_pending
||
4926 (kvm_arch_interrupt_allowed(vcpu
) &&
4927 kvm_cpu_has_interrupt(vcpu
));
4930 void kvm_vcpu_kick(struct kvm_vcpu
*vcpu
)
4933 int cpu
= vcpu
->cpu
;
4935 if (waitqueue_active(&vcpu
->wq
)) {
4936 wake_up_interruptible(&vcpu
->wq
);
4937 ++vcpu
->stat
.halt_wakeup
;
4941 if (cpu
!= me
&& (unsigned)cpu
< nr_cpu_ids
&& cpu_online(cpu
))
4942 if (!test_and_set_bit(KVM_REQ_KICK
, &vcpu
->requests
))
4943 smp_send_reschedule(cpu
);
4947 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
4949 return kvm_x86_ops
->interrupt_allowed(vcpu
);
4952 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
4953 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
4954 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
4955 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
4956 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);