projects / deliverable / linux.git / blob
? search:


d721e2d81a53a0f84580e4f93e40fb05c2c18ffb
[deliverable/linux.git] / arch / x86 / kvm / x86.c
1 /*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * derived from drivers/kvm/kvm_main.c
5 *
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affilates.
10 *
11 * Authors:
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
16 *
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
19 *
20 */
21
22 #include <linux/kvm_host.h>
23 #include "irq.h"
24 #include "mmu.h"
25 #include "i8254.h"
26 #include "tss.h"
27 #include "kvm_cache_regs.h"
28 #include "x86.h"
29
30 #include <linux/clocksource.h>
31 #include <linux/interrupt.h>
32 #include <linux/kvm.h>
33 #include <linux/fs.h>
34 #include <linux/vmalloc.h>
35 #include <linux/module.h>
36 #include <linux/mman.h>
37 #include <linux/highmem.h>
38 #include <linux/iommu.h>
39 #include <linux/intel-iommu.h>
40 #include <linux/cpufreq.h>
41 #include <linux/user-return-notifier.h>
42 #include <linux/srcu.h>
43 #include <linux/slab.h>
44 #include <linux/perf_event.h>
45 #include <linux/uaccess.h>
46 #include <trace/events/kvm.h>
47
48 #define CREATE_TRACE_POINTS
49 #include "trace.h"
50
51 #include <asm/debugreg.h>
52 #include <asm/msr.h>
53 #include <asm/desc.h>
54 #include <asm/mtrr.h>
55 #include <asm/mce.h>
56 #include <asm/i387.h>
57 #include <asm/xcr.h>
58
59 #define MAX_IO_MSRS 256
60 #define CR0_RESERVED_BITS \
61 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
62 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
63 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
64 #define CR4_RESERVED_BITS \
65 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
66 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
67 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
68 | X86_CR4_OSXSAVE \
69 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
70
71 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
72
73 #define KVM_MAX_MCE_BANKS 32
74 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
75
76 /* EFER defaults:
77 * - enable syscall per default because its emulated by KVM
78 * - enable LME and LMA per default on 64 bit KVM
79 */
80 #ifdef CONFIG_X86_64
81 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
82 #else
83 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
84 #endif
85
86 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
87 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
88
89 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
90 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
91 struct kvm_cpuid_entry2 __user *entries);
92
93 struct kvm_x86_ops *kvm_x86_ops;
94 EXPORT_SYMBOL_GPL(kvm_x86_ops);
95
96 int ignore_msrs = 0;
97 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
98
99 #define KVM_NR_SHARED_MSRS 16
100
101 struct kvm_shared_msrs_global {
102 int nr;
103 u32 msrs[KVM_NR_SHARED_MSRS];
104 };
105
106 struct kvm_shared_msrs {
107 struct user_return_notifier urn;
108 bool registered;
109 struct kvm_shared_msr_values {
110 u64 host;
111 u64 curr;
112 } values[KVM_NR_SHARED_MSRS];
113 };
114
115 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
116 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
117
118 struct kvm_stats_debugfs_item debugfs_entries[] = {
119 { "pf_fixed", VCPU_STAT(pf_fixed) },
120 { "pf_guest", VCPU_STAT(pf_guest) },
121 { "tlb_flush", VCPU_STAT(tlb_flush) },
122 { "invlpg", VCPU_STAT(invlpg) },
123 { "exits", VCPU_STAT(exits) },
124 { "io_exits", VCPU_STAT(io_exits) },
125 { "mmio_exits", VCPU_STAT(mmio_exits) },
126 { "signal_exits", VCPU_STAT(signal_exits) },
127 { "irq_window", VCPU_STAT(irq_window_exits) },
128 { "nmi_window", VCPU_STAT(nmi_window_exits) },
129 { "halt_exits", VCPU_STAT(halt_exits) },
130 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
131 { "hypercalls", VCPU_STAT(hypercalls) },
132 { "request_irq", VCPU_STAT(request_irq_exits) },
133 { "irq_exits", VCPU_STAT(irq_exits) },
134 { "host_state_reload", VCPU_STAT(host_state_reload) },
135 { "efer_reload", VCPU_STAT(efer_reload) },
136 { "fpu_reload", VCPU_STAT(fpu_reload) },
137 { "insn_emulation", VCPU_STAT(insn_emulation) },
138 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
139 { "irq_injections", VCPU_STAT(irq_injections) },
140 { "nmi_injections", VCPU_STAT(nmi_injections) },
141 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
142 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
143 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
144 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
145 { "mmu_flooded", VM_STAT(mmu_flooded) },
146 { "mmu_recycled", VM_STAT(mmu_recycled) },
147 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
148 { "mmu_unsync", VM_STAT(mmu_unsync) },
149 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
150 { "largepages", VM_STAT(lpages) },
151 { NULL }
152 };
153
154 u64 __read_mostly host_xcr0;
155
156 static inline u32 bit(int bitno)
157 {
158 return 1 << (bitno & 31);
159 }
160
161 static void kvm_on_user_return(struct user_return_notifier *urn)
162 {
163 unsigned slot;
164 struct kvm_shared_msrs *locals
165 = container_of(urn, struct kvm_shared_msrs, urn);
166 struct kvm_shared_msr_values *values;
167
168 for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
169 values = &locals->values[slot];
170 if (values->host != values->curr) {
171 wrmsrl(shared_msrs_global.msrs[slot], values->host);
172 values->curr = values->host;
173 }
174 }
175 locals->registered = false;
176 user_return_notifier_unregister(urn);
177 }
178
179 static void shared_msr_update(unsigned slot, u32 msr)
180 {
181 struct kvm_shared_msrs *smsr;
182 u64 value;
183
184 smsr = &__get_cpu_var(shared_msrs);
185 /* only read, and nobody should modify it at this time,
186 * so don't need lock */
187 if (slot >= shared_msrs_global.nr) {
188 printk(KERN_ERR "kvm: invalid MSR slot!");
189 return;
190 }
191 rdmsrl_safe(msr, &value);
192 smsr->values[slot].host = value;
193 smsr->values[slot].curr = value;
194 }
195
196 void kvm_define_shared_msr(unsigned slot, u32 msr)
197 {
198 if (slot >= shared_msrs_global.nr)
199 shared_msrs_global.nr = slot + 1;
200 shared_msrs_global.msrs[slot] = msr;
201 /* we need ensured the shared_msr_global have been updated */
202 smp_wmb();
203 }
204 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
205
206 static void kvm_shared_msr_cpu_online(void)
207 {
208 unsigned i;
209
210 for (i = 0; i < shared_msrs_global.nr; ++i)
211 shared_msr_update(i, shared_msrs_global.msrs[i]);
212 }
213
214 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
215 {
216 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
217
218 if (((value ^ smsr->values[slot].curr) & mask) == 0)
219 return;
220 smsr->values[slot].curr = value;
221 wrmsrl(shared_msrs_global.msrs[slot], value);
222 if (!smsr->registered) {
223 smsr->urn.on_user_return = kvm_on_user_return;
224 user_return_notifier_register(&smsr->urn);
225 smsr->registered = true;
226 }
227 }
228 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
229
230 static void drop_user_return_notifiers(void *ignore)
231 {
232 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
233
234 if (smsr->registered)
235 kvm_on_user_return(&smsr->urn);
236 }
237
238 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
239 {
240 if (irqchip_in_kernel(vcpu->kvm))
241 return vcpu->arch.apic_base;
242 else
243 return vcpu->arch.apic_base;
244 }
245 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
246
247 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
248 {
249 /* TODO: reserve bits check */
250 if (irqchip_in_kernel(vcpu->kvm))
251 kvm_lapic_set_base(vcpu, data);
252 else
253 vcpu->arch.apic_base = data;
254 }
255 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
256
257 #define EXCPT_BENIGN 0
258 #define EXCPT_CONTRIBUTORY 1
259 #define EXCPT_PF 2
260
261 static int exception_class(int vector)
262 {
263 switch (vector) {
264 case PF_VECTOR:
265 return EXCPT_PF;
266 case DE_VECTOR:
267 case TS_VECTOR:
268 case NP_VECTOR:
269 case SS_VECTOR:
270 case GP_VECTOR:
271 return EXCPT_CONTRIBUTORY;
272 default:
273 break;
274 }
275 return EXCPT_BENIGN;
276 }
277
278 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
279 unsigned nr, bool has_error, u32 error_code,
280 bool reinject)
281 {
282 u32 prev_nr;
283 int class1, class2;
284
285 if (!vcpu->arch.exception.pending) {
286 queue:
287 vcpu->arch.exception.pending = true;
288 vcpu->arch.exception.has_error_code = has_error;
289 vcpu->arch.exception.nr = nr;
290 vcpu->arch.exception.error_code = error_code;
291 vcpu->arch.exception.reinject = reinject;
292 return;
293 }
294
295 /* to check exception */
296 prev_nr = vcpu->arch.exception.nr;
297 if (prev_nr == DF_VECTOR) {
298 /* triple fault -> shutdown */
299 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
300 return;
301 }
302 class1 = exception_class(prev_nr);
303 class2 = exception_class(nr);
304 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
305 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
306 /* generate double fault per SDM Table 5-5 */
307 vcpu->arch.exception.pending = true;
308 vcpu->arch.exception.has_error_code = true;
309 vcpu->arch.exception.nr = DF_VECTOR;
310 vcpu->arch.exception.error_code = 0;
311 } else
312 /* replace previous exception with a new one in a hope
313 that instruction re-execution will regenerate lost
314 exception */
315 goto queue;
316 }
317
318 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
319 {
320 kvm_multiple_exception(vcpu, nr, false, 0, false);
321 }
322 EXPORT_SYMBOL_GPL(kvm_queue_exception);
323
324 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
325 {
326 kvm_multiple_exception(vcpu, nr, false, 0, true);
327 }
328 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
329
330 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
331 u32 error_code)
332 {
333 ++vcpu->stat.pf_guest;
334 vcpu->arch.cr2 = addr;
335 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
336 }
337
338 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
339 {
340 vcpu->arch.nmi_pending = 1;
341 }
342 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
343
344 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
345 {
346 kvm_multiple_exception(vcpu, nr, true, error_code, false);
347 }
348 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
349
350 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
351 {
352 kvm_multiple_exception(vcpu, nr, true, error_code, true);
353 }
354 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
355
356 /*
357 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
358 * a #GP and return false.
359 */
360 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
361 {
362 if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
363 return true;
364 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
365 return false;
366 }
367 EXPORT_SYMBOL_GPL(kvm_require_cpl);
368
369 /*
370 * Load the pae pdptrs. Return true is they are all valid.
371 */
372 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
373 {
374 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
375 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
376 int i;
377 int ret;
378 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
379
380 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
381 offset * sizeof(u64), sizeof(pdpte));
382 if (ret < 0) {
383 ret = 0;
384 goto out;
385 }
386 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
387 if (is_present_gpte(pdpte[i]) &&
388 (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
389 ret = 0;
390 goto out;
391 }
392 }
393 ret = 1;
394
395 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
396 __set_bit(VCPU_EXREG_PDPTR,
397 (unsigned long *)&vcpu->arch.regs_avail);
398 __set_bit(VCPU_EXREG_PDPTR,
399 (unsigned long *)&vcpu->arch.regs_dirty);
400 out:
401
402 return ret;
403 }
404 EXPORT_SYMBOL_GPL(load_pdptrs);
405
406 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
407 {
408 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
409 bool changed = true;
410 int r;
411
412 if (is_long_mode(vcpu) || !is_pae(vcpu))
413 return false;
414
415 if (!test_bit(VCPU_EXREG_PDPTR,
416 (unsigned long *)&vcpu->arch.regs_avail))
417 return true;
418
419 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
420 if (r < 0)
421 goto out;
422 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
423 out:
424
425 return changed;
426 }
427
428 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
429 {
430 unsigned long old_cr0 = kvm_read_cr0(vcpu);
431 unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
432 X86_CR0_CD | X86_CR0_NW;
433
434 cr0 |= X86_CR0_ET;
435
436 #ifdef CONFIG_X86_64
437 if (cr0 & 0xffffffff00000000UL)
438 return 1;
439 #endif
440
441 cr0 &= ~CR0_RESERVED_BITS;
442
443 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
444 return 1;
445
446 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
447 return 1;
448
449 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
450 #ifdef CONFIG_X86_64
451 if ((vcpu->arch.efer & EFER_LME)) {
452 int cs_db, cs_l;
453
454 if (!is_pae(vcpu))
455 return 1;
456 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
457 if (cs_l)
458 return 1;
459 } else
460 #endif
461 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3))
462 return 1;
463 }
464
465 kvm_x86_ops->set_cr0(vcpu, cr0);
466
467 if ((cr0 ^ old_cr0) & update_bits)
468 kvm_mmu_reset_context(vcpu);
469 return 0;
470 }
471 EXPORT_SYMBOL_GPL(kvm_set_cr0);
472
473 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
474 {
475 (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
476 }
477 EXPORT_SYMBOL_GPL(kvm_lmsw);
478
479 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
480 {
481 u64 xcr0;
482
483 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
484 if (index != XCR_XFEATURE_ENABLED_MASK)
485 return 1;
486 xcr0 = xcr;
487 if (kvm_x86_ops->get_cpl(vcpu) != 0)
488 return 1;
489 if (!(xcr0 & XSTATE_FP))
490 return 1;
491 if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
492 return 1;
493 if (xcr0 & ~host_xcr0)
494 return 1;
495 vcpu->arch.xcr0 = xcr0;
496 vcpu->guest_xcr0_loaded = 0;
497 return 0;
498 }
499
500 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
501 {
502 if (__kvm_set_xcr(vcpu, index, xcr)) {
503 kvm_inject_gp(vcpu, 0);
504 return 1;
505 }
506 return 0;
507 }
508 EXPORT_SYMBOL_GPL(kvm_set_xcr);
509
510 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
511 {
512 struct kvm_cpuid_entry2 *best;
513
514 best = kvm_find_cpuid_entry(vcpu, 1, 0);
515 return best && (best->ecx & bit(X86_FEATURE_XSAVE));
516 }
517
518 static void update_cpuid(struct kvm_vcpu *vcpu)
519 {
520 struct kvm_cpuid_entry2 *best;
521
522 best = kvm_find_cpuid_entry(vcpu, 1, 0);
523 if (!best)
524 return;
525
526 /* Update OSXSAVE bit */
527 if (cpu_has_xsave && best->function == 0x1) {
528 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
529 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
530 best->ecx |= bit(X86_FEATURE_OSXSAVE);
531 }
532 }
533
534 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
535 {
536 unsigned long old_cr4 = kvm_read_cr4(vcpu);
537 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
538
539 if (cr4 & CR4_RESERVED_BITS)
540 return 1;
541
542 if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
543 return 1;
544
545 if (is_long_mode(vcpu)) {
546 if (!(cr4 & X86_CR4_PAE))
547 return 1;
548 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
549 && ((cr4 ^ old_cr4) & pdptr_bits)
550 && !load_pdptrs(vcpu, vcpu->arch.cr3))
551 return 1;
552
553 if (cr4 & X86_CR4_VMXE)
554 return 1;
555
556 kvm_x86_ops->set_cr4(vcpu, cr4);
557
558 if ((cr4 ^ old_cr4) & pdptr_bits)
559 kvm_mmu_reset_context(vcpu);
560
561 if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
562 update_cpuid(vcpu);
563
564 return 0;
565 }
566 EXPORT_SYMBOL_GPL(kvm_set_cr4);
567
568 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
569 {
570 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
571 kvm_mmu_sync_roots(vcpu);
572 kvm_mmu_flush_tlb(vcpu);
573 return 0;
574 }
575
576 if (is_long_mode(vcpu)) {
577 if (cr3 & CR3_L_MODE_RESERVED_BITS)
578 return 1;
579 } else {
580 if (is_pae(vcpu)) {
581 if (cr3 & CR3_PAE_RESERVED_BITS)
582 return 1;
583 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3))
584 return 1;
585 }
586 /*
587 * We don't check reserved bits in nonpae mode, because
588 * this isn't enforced, and VMware depends on this.
589 */
590 }
591
592 /*
593 * Does the new cr3 value map to physical memory? (Note, we
594 * catch an invalid cr3 even in real-mode, because it would
595 * cause trouble later on when we turn on paging anyway.)
596 *
597 * A real CPU would silently accept an invalid cr3 and would
598 * attempt to use it - with largely undefined (and often hard
599 * to debug) behavior on the guest side.
600 */
601 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
602 return 1;
603 vcpu->arch.cr3 = cr3;
604 vcpu->arch.mmu.new_cr3(vcpu);
605 return 0;
606 }
607 EXPORT_SYMBOL_GPL(kvm_set_cr3);
608
609 int __kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
610 {
611 if (cr8 & CR8_RESERVED_BITS)
612 return 1;
613 if (irqchip_in_kernel(vcpu->kvm))
614 kvm_lapic_set_tpr(vcpu, cr8);
615 else
616 vcpu->arch.cr8 = cr8;
617 return 0;
618 }
619
620 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
621 {
622 if (__kvm_set_cr8(vcpu, cr8))
623 kvm_inject_gp(vcpu, 0);
624 }
625 EXPORT_SYMBOL_GPL(kvm_set_cr8);
626
627 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
628 {
629 if (irqchip_in_kernel(vcpu->kvm))
630 return kvm_lapic_get_cr8(vcpu);
631 else
632 return vcpu->arch.cr8;
633 }
634 EXPORT_SYMBOL_GPL(kvm_get_cr8);
635
636 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
637 {
638 switch (dr) {
639 case 0 ... 3:
640 vcpu->arch.db[dr] = val;
641 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
642 vcpu->arch.eff_db[dr] = val;
643 break;
644 case 4:
645 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
646 return 1; /* #UD */
647 /* fall through */
648 case 6:
649 if (val & 0xffffffff00000000ULL)
650 return -1; /* #GP */
651 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
652 break;
653 case 5:
654 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
655 return 1; /* #UD */
656 /* fall through */
657 default: /* 7 */
658 if (val & 0xffffffff00000000ULL)
659 return -1; /* #GP */
660 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
661 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
662 kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
663 vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
664 }
665 break;
666 }
667
668 return 0;
669 }
670
671 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
672 {
673 int res;
674
675 res = __kvm_set_dr(vcpu, dr, val);
676 if (res > 0)
677 kvm_queue_exception(vcpu, UD_VECTOR);
678 else if (res < 0)
679 kvm_inject_gp(vcpu, 0);
680
681 return res;
682 }
683 EXPORT_SYMBOL_GPL(kvm_set_dr);
684
685 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
686 {
687 switch (dr) {
688 case 0 ... 3:
689 *val = vcpu->arch.db[dr];
690 break;
691 case 4:
692 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
693 return 1;
694 /* fall through */
695 case 6:
696 *val = vcpu->arch.dr6;
697 break;
698 case 5:
699 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
700 return 1;
701 /* fall through */
702 default: /* 7 */
703 *val = vcpu->arch.dr7;
704 break;
705 }
706
707 return 0;
708 }
709
710 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
711 {
712 if (_kvm_get_dr(vcpu, dr, val)) {
713 kvm_queue_exception(vcpu, UD_VECTOR);
714 return 1;
715 }
716 return 0;
717 }
718 EXPORT_SYMBOL_GPL(kvm_get_dr);
719
720 /*
721 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
722 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
723 *
724 * This list is modified at module load time to reflect the
725 * capabilities of the host cpu. This capabilities test skips MSRs that are
726 * kvm-specific. Those are put in the beginning of the list.
727 */
728
729 #define KVM_SAVE_MSRS_BEGIN 7
730 static u32 msrs_to_save[] = {
731 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
732 MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
733 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
734 HV_X64_MSR_APIC_ASSIST_PAGE,
735 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
736 MSR_K6_STAR,
737 #ifdef CONFIG_X86_64
738 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
739 #endif
740 MSR_IA32_TSC, MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
741 };
742
743 static unsigned num_msrs_to_save;
744
745 static u32 emulated_msrs[] = {
746 MSR_IA32_MISC_ENABLE,
747 };
748
749 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
750 {
751 u64 old_efer = vcpu->arch.efer;
752
753 if (efer & efer_reserved_bits)
754 return 1;
755
756 if (is_paging(vcpu)
757 && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
758 return 1;
759
760 if (efer & EFER_FFXSR) {
761 struct kvm_cpuid_entry2 *feat;
762
763 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
764 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
765 return 1;
766 }
767
768 if (efer & EFER_SVME) {
769 struct kvm_cpuid_entry2 *feat;
770
771 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
772 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
773 return 1;
774 }
775
776 efer &= ~EFER_LMA;
777 efer |= vcpu->arch.efer & EFER_LMA;
778
779 kvm_x86_ops->set_efer(vcpu, efer);
780
781 vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
782 kvm_mmu_reset_context(vcpu);
783
784 /* Update reserved bits */
785 if ((efer ^ old_efer) & EFER_NX)
786 kvm_mmu_reset_context(vcpu);
787
788 return 0;
789 }
790
791 void kvm_enable_efer_bits(u64 mask)
792 {
793 efer_reserved_bits &= ~mask;
794 }
795 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
796
797
798 /*
799 * Writes msr value into into the appropriate "register".
800 * Returns 0 on success, non-0 otherwise.
801 * Assumes vcpu_load() was already called.
802 */
803 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
804 {
805 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
806 }
807
808 /*
809 * Adapt set_msr() to msr_io()'s calling convention
810 */
811 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
812 {
813 return kvm_set_msr(vcpu, index, *data);
814 }
815
816 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
817 {
818 int version;
819 int r;
820 struct pvclock_wall_clock wc;
821 struct timespec boot;
822
823 if (!wall_clock)
824 return;
825
826 r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
827 if (r)
828 return;
829
830 if (version & 1)
831 ++version; /* first time write, random junk */
832
833 ++version;
834
835 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
836
837 /*
838 * The guest calculates current wall clock time by adding
839 * system time (updated by kvm_write_guest_time below) to the
840 * wall clock specified here. guest system time equals host
841 * system time for us, thus we must fill in host boot time here.
842 */
843 getboottime(&boot);
844
845 wc.sec = boot.tv_sec;
846 wc.nsec = boot.tv_nsec;
847 wc.version = version;
848
849 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
850
851 version++;
852 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
853 }
854
855 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
856 {
857 uint32_t quotient, remainder;
858
859 /* Don't try to replace with do_div(), this one calculates
860 * "(dividend << 32) / divisor" */
861 __asm__ ( "divl %4"
862 : "=a" (quotient), "=d" (remainder)
863 : "0" (0), "1" (dividend), "r" (divisor) );
864 return quotient;
865 }
866
867 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
868 {
869 uint64_t nsecs = 1000000000LL;
870 int32_t shift = 0;
871 uint64_t tps64;
872 uint32_t tps32;
873
874 tps64 = tsc_khz * 1000LL;
875 while (tps64 > nsecs*2) {
876 tps64 >>= 1;
877 shift--;
878 }
879
880 tps32 = (uint32_t)tps64;
881 while (tps32 <= (uint32_t)nsecs) {
882 tps32 <<= 1;
883 shift++;
884 }
885
886 hv_clock->tsc_shift = shift;
887 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
888
889 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
890 __func__, tsc_khz, hv_clock->tsc_shift,
891 hv_clock->tsc_to_system_mul);
892 }
893
894 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
895
896 static void kvm_write_guest_time(struct kvm_vcpu *v)
897 {
898 struct timespec ts;
899 unsigned long flags;
900 struct kvm_vcpu_arch *vcpu = &v->arch;
901 void *shared_kaddr;
902 unsigned long this_tsc_khz;
903
904 if ((!vcpu->time_page))
905 return;
906
907 this_tsc_khz = get_cpu_var(cpu_tsc_khz);
908 if (unlikely(vcpu->hv_clock_tsc_khz != this_tsc_khz)) {
909 kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
910 vcpu->hv_clock_tsc_khz = this_tsc_khz;
911 }
912 put_cpu_var(cpu_tsc_khz);
913
914 /* Keep irq disabled to prevent changes to the clock */
915 local_irq_save(flags);
916 kvm_get_msr(v, MSR_IA32_TSC, &vcpu->hv_clock.tsc_timestamp);
917 ktime_get_ts(&ts);
918 monotonic_to_bootbased(&ts);
919 local_irq_restore(flags);
920
921 /* With all the info we got, fill in the values */
922
923 vcpu->hv_clock.system_time = ts.tv_nsec +
924 (NSEC_PER_SEC * (u64)ts.tv_sec) + v->kvm->arch.kvmclock_offset;
925
926 vcpu->hv_clock.flags = 0;
927
928 /*
929 * The interface expects us to write an even number signaling that the
930 * update is finished. Since the guest won't see the intermediate
931 * state, we just increase by 2 at the end.
932 */
933 vcpu->hv_clock.version += 2;
934
935 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
936
937 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
938 sizeof(vcpu->hv_clock));
939
940 kunmap_atomic(shared_kaddr, KM_USER0);
941
942 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
943 }
944
945 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
946 {
947 struct kvm_vcpu_arch *vcpu = &v->arch;
948
949 if (!vcpu->time_page)
950 return 0;
951 kvm_make_request(KVM_REQ_KVMCLOCK_UPDATE, v);
952 return 1;
953 }
954
955 static bool msr_mtrr_valid(unsigned msr)
956 {
957 switch (msr) {
958 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
959 case MSR_MTRRfix64K_00000:
960 case MSR_MTRRfix16K_80000:
961 case MSR_MTRRfix16K_A0000:
962 case MSR_MTRRfix4K_C0000:
963 case MSR_MTRRfix4K_C8000:
964 case MSR_MTRRfix4K_D0000:
965 case MSR_MTRRfix4K_D8000:
966 case MSR_MTRRfix4K_E0000:
967 case MSR_MTRRfix4K_E8000:
968 case MSR_MTRRfix4K_F0000:
969 case MSR_MTRRfix4K_F8000:
970 case MSR_MTRRdefType:
971 case MSR_IA32_CR_PAT:
972 return true;
973 case 0x2f8:
974 return true;
975 }
976 return false;
977 }
978
979 static bool valid_pat_type(unsigned t)
980 {
981 return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
982 }
983
984 static bool valid_mtrr_type(unsigned t)
985 {
986 return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
987 }
988
989 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
990 {
991 int i;
992
993 if (!msr_mtrr_valid(msr))
994 return false;
995
996 if (msr == MSR_IA32_CR_PAT) {
997 for (i = 0; i < 8; i++)
998 if (!valid_pat_type((data >> (i * 8)) & 0xff))
999 return false;
1000 return true;
1001 } else if (msr == MSR_MTRRdefType) {
1002 if (data & ~0xcff)
1003 return false;
1004 return valid_mtrr_type(data & 0xff);
1005 } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1006 for (i = 0; i < 8 ; i++)
1007 if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1008 return false;
1009 return true;
1010 }
1011
1012 /* variable MTRRs */
1013 return valid_mtrr_type(data & 0xff);
1014 }
1015
1016 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1017 {
1018 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1019
1020 if (!mtrr_valid(vcpu, msr, data))
1021 return 1;
1022
1023 if (msr == MSR_MTRRdefType) {
1024 vcpu->arch.mtrr_state.def_type = data;
1025 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1026 } else if (msr == MSR_MTRRfix64K_00000)
1027 p[0] = data;
1028 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1029 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1030 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1031 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1032 else if (msr == MSR_IA32_CR_PAT)
1033 vcpu->arch.pat = data;
1034 else { /* Variable MTRRs */
1035 int idx, is_mtrr_mask;
1036 u64 *pt;
1037
1038 idx = (msr - 0x200) / 2;
1039 is_mtrr_mask = msr - 0x200 - 2 * idx;
1040 if (!is_mtrr_mask)
1041 pt =
1042 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1043 else
1044 pt =
1045 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1046 *pt = data;
1047 }
1048
1049 kvm_mmu_reset_context(vcpu);
1050 return 0;
1051 }
1052
1053 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1054 {
1055 u64 mcg_cap = vcpu->arch.mcg_cap;
1056 unsigned bank_num = mcg_cap & 0xff;
1057
1058 switch (msr) {
1059 case MSR_IA32_MCG_STATUS:
1060 vcpu->arch.mcg_status = data;
1061 break;
1062 case MSR_IA32_MCG_CTL:
1063 if (!(mcg_cap & MCG_CTL_P))
1064 return 1;
1065 if (data != 0 && data != ~(u64)0)
1066 return -1;
1067 vcpu->arch.mcg_ctl = data;
1068 break;
1069 default:
1070 if (msr >= MSR_IA32_MC0_CTL &&
1071 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1072 u32 offset = msr - MSR_IA32_MC0_CTL;
1073 /* only 0 or all 1s can be written to IA32_MCi_CTL
1074 * some Linux kernels though clear bit 10 in bank 4 to
1075 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1076 * this to avoid an uncatched #GP in the guest
1077 */
1078 if ((offset & 0x3) == 0 &&
1079 data != 0 && (data | (1 << 10)) != ~(u64)0)
1080 return -1;
1081 vcpu->arch.mce_banks[offset] = data;
1082 break;
1083 }
1084 return 1;
1085 }
1086 return 0;
1087 }
1088
1089 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1090 {
1091 struct kvm *kvm = vcpu->kvm;
1092 int lm = is_long_mode(vcpu);
1093 u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1094 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1095 u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1096 : kvm->arch.xen_hvm_config.blob_size_32;
1097 u32 page_num = data & ~PAGE_MASK;
1098 u64 page_addr = data & PAGE_MASK;
1099 u8 *page;
1100 int r;
1101
1102 r = -E2BIG;
1103 if (page_num >= blob_size)
1104 goto out;
1105 r = -ENOMEM;
1106 page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1107 if (!page)
1108 goto out;
1109 r = -EFAULT;
1110 if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1111 goto out_free;
1112 if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1113 goto out_free;
1114 r = 0;
1115 out_free:
1116 kfree(page);
1117 out:
1118 return r;
1119 }
1120
1121 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1122 {
1123 return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1124 }
1125
1126 static bool kvm_hv_msr_partition_wide(u32 msr)
1127 {
1128 bool r = false;
1129 switch (msr) {
1130 case HV_X64_MSR_GUEST_OS_ID:
1131 case HV_X64_MSR_HYPERCALL:
1132 r = true;
1133 break;
1134 }
1135
1136 return r;
1137 }
1138
1139 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1140 {
1141 struct kvm *kvm = vcpu->kvm;
1142
1143 switch (msr) {
1144 case HV_X64_MSR_GUEST_OS_ID:
1145 kvm->arch.hv_guest_os_id = data;
1146 /* setting guest os id to zero disables hypercall page */
1147 if (!kvm->arch.hv_guest_os_id)
1148 kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1149 break;
1150 case HV_X64_MSR_HYPERCALL: {
1151 u64 gfn;
1152 unsigned long addr;
1153 u8 instructions[4];
1154
1155 /* if guest os id is not set hypercall should remain disabled */
1156 if (!kvm->arch.hv_guest_os_id)
1157 break;
1158 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1159 kvm->arch.hv_hypercall = data;
1160 break;
1161 }
1162 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1163 addr = gfn_to_hva(kvm, gfn);
1164 if (kvm_is_error_hva(addr))
1165 return 1;
1166 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1167 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1168 if (copy_to_user((void __user *)addr, instructions, 4))
1169 return 1;
1170 kvm->arch.hv_hypercall = data;
1171 break;
1172 }
1173 default:
1174 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1175 "data 0x%llx\n", msr, data);
1176 return 1;
1177 }
1178 return 0;
1179 }
1180
1181 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1182 {
1183 switch (msr) {
1184 case HV_X64_MSR_APIC_ASSIST_PAGE: {
1185 unsigned long addr;
1186
1187 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1188 vcpu->arch.hv_vapic = data;
1189 break;
1190 }
1191 addr = gfn_to_hva(vcpu->kvm, data >>
1192 HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1193 if (kvm_is_error_hva(addr))
1194 return 1;
1195 if (clear_user((void __user *)addr, PAGE_SIZE))
1196 return 1;
1197 vcpu->arch.hv_vapic = data;
1198 break;
1199 }
1200 case HV_X64_MSR_EOI:
1201 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1202 case HV_X64_MSR_ICR:
1203 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1204 case HV_X64_MSR_TPR:
1205 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1206 default:
1207 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1208 "data 0x%llx\n", msr, data);
1209 return 1;
1210 }
1211
1212 return 0;
1213 }
1214
1215 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1216 {
1217 switch (msr) {
1218 case MSR_EFER:
1219 return set_efer(vcpu, data);
1220 case MSR_K7_HWCR:
1221 data &= ~(u64)0x40; /* ignore flush filter disable */
1222 data &= ~(u64)0x100; /* ignore ignne emulation enable */
1223 if (data != 0) {
1224 pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1225 data);
1226 return 1;
1227 }
1228 break;
1229 case MSR_FAM10H_MMIO_CONF_BASE:
1230 if (data != 0) {
1231 pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1232 "0x%llx\n", data);
1233 return 1;
1234 }
1235 break;
1236 case MSR_AMD64_NB_CFG:
1237 break;
1238 case MSR_IA32_DEBUGCTLMSR:
1239 if (!data) {
1240 /* We support the non-activated case already */
1241 break;
1242 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1243 /* Values other than LBR and BTF are vendor-specific,
1244 thus reserved and should throw a #GP */
1245 return 1;
1246 }
1247 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1248 __func__, data);
1249 break;
1250 case MSR_IA32_UCODE_REV:
1251 case MSR_IA32_UCODE_WRITE:
1252 case MSR_VM_HSAVE_PA:
1253 case MSR_AMD64_PATCH_LOADER:
1254 break;
1255 case 0x200 ... 0x2ff:
1256 return set_msr_mtrr(vcpu, msr, data);
1257 case MSR_IA32_APICBASE:
1258 kvm_set_apic_base(vcpu, data);
1259 break;
1260 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1261 return kvm_x2apic_msr_write(vcpu, msr, data);
1262 case MSR_IA32_MISC_ENABLE:
1263 vcpu->arch.ia32_misc_enable_msr = data;
1264 break;
1265 case MSR_KVM_WALL_CLOCK_NEW:
1266 case MSR_KVM_WALL_CLOCK:
1267 vcpu->kvm->arch.wall_clock = data;
1268 kvm_write_wall_clock(vcpu->kvm, data);
1269 break;
1270 case MSR_KVM_SYSTEM_TIME_NEW:
1271 case MSR_KVM_SYSTEM_TIME: {
1272 if (vcpu->arch.time_page) {
1273 kvm_release_page_dirty(vcpu->arch.time_page);
1274 vcpu->arch.time_page = NULL;
1275 }
1276
1277 vcpu->arch.time = data;
1278
1279 /* we verify if the enable bit is set... */
1280 if (!(data & 1))
1281 break;
1282
1283 /* ...but clean it before doing the actual write */
1284 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1285
1286 vcpu->arch.time_page =
1287 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1288
1289 if (is_error_page(vcpu->arch.time_page)) {
1290 kvm_release_page_clean(vcpu->arch.time_page);
1291 vcpu->arch.time_page = NULL;
1292 }
1293
1294 kvm_request_guest_time_update(vcpu);
1295 break;
1296 }
1297 case MSR_IA32_MCG_CTL:
1298 case MSR_IA32_MCG_STATUS:
1299 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1300 return set_msr_mce(vcpu, msr, data);
1301
1302 /* Performance counters are not protected by a CPUID bit,
1303 * so we should check all of them in the generic path for the sake of
1304 * cross vendor migration.
1305 * Writing a zero into the event select MSRs disables them,
1306 * which we perfectly emulate ;-). Any other value should be at least
1307 * reported, some guests depend on them.
1308 */
1309 case MSR_P6_EVNTSEL0:
1310 case MSR_P6_EVNTSEL1:
1311 case MSR_K7_EVNTSEL0:
1312 case MSR_K7_EVNTSEL1:
1313 case MSR_K7_EVNTSEL2:
1314 case MSR_K7_EVNTSEL3:
1315 if (data != 0)
1316 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1317 "0x%x data 0x%llx\n", msr, data);
1318 break;
1319 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1320 * so we ignore writes to make it happy.
1321 */
1322 case MSR_P6_PERFCTR0:
1323 case MSR_P6_PERFCTR1:
1324 case MSR_K7_PERFCTR0:
1325 case MSR_K7_PERFCTR1:
1326 case MSR_K7_PERFCTR2:
1327 case MSR_K7_PERFCTR3:
1328 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1329 "0x%x data 0x%llx\n", msr, data);
1330 break;
1331 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1332 if (kvm_hv_msr_partition_wide(msr)) {
1333 int r;
1334 mutex_lock(&vcpu->kvm->lock);
1335 r = set_msr_hyperv_pw(vcpu, msr, data);
1336 mutex_unlock(&vcpu->kvm->lock);
1337 return r;
1338 } else
1339 return set_msr_hyperv(vcpu, msr, data);
1340 break;
1341 default:
1342 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1343 return xen_hvm_config(vcpu, data);
1344 if (!ignore_msrs) {
1345 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1346 msr, data);
1347 return 1;
1348 } else {
1349 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1350 msr, data);
1351 break;
1352 }
1353 }
1354 return 0;
1355 }
1356 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1357
1358
1359 /*
1360 * Reads an msr value (of 'msr_index') into 'pdata'.
1361 * Returns 0 on success, non-0 otherwise.
1362 * Assumes vcpu_load() was already called.
1363 */
1364 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1365 {
1366 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1367 }
1368
1369 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1370 {
1371 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1372
1373 if (!msr_mtrr_valid(msr))
1374 return 1;
1375
1376 if (msr == MSR_MTRRdefType)
1377 *pdata = vcpu->arch.mtrr_state.def_type +
1378 (vcpu->arch.mtrr_state.enabled << 10);
1379 else if (msr == MSR_MTRRfix64K_00000)
1380 *pdata = p[0];
1381 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1382 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1383 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1384 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1385 else if (msr == MSR_IA32_CR_PAT)
1386 *pdata = vcpu->arch.pat;
1387 else { /* Variable MTRRs */
1388 int idx, is_mtrr_mask;
1389 u64 *pt;
1390
1391 idx = (msr - 0x200) / 2;
1392 is_mtrr_mask = msr - 0x200 - 2 * idx;
1393 if (!is_mtrr_mask)
1394 pt =
1395 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1396 else
1397 pt =
1398 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1399 *pdata = *pt;
1400 }
1401
1402 return 0;
1403 }
1404
1405 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1406 {
1407 u64 data;
1408 u64 mcg_cap = vcpu->arch.mcg_cap;
1409 unsigned bank_num = mcg_cap & 0xff;
1410
1411 switch (msr) {
1412 case MSR_IA32_P5_MC_ADDR:
1413 case MSR_IA32_P5_MC_TYPE:
1414 data = 0;
1415 break;
1416 case MSR_IA32_MCG_CAP:
1417 data = vcpu->arch.mcg_cap;
1418 break;
1419 case MSR_IA32_MCG_CTL:
1420 if (!(mcg_cap & MCG_CTL_P))
1421 return 1;
1422 data = vcpu->arch.mcg_ctl;
1423 break;
1424 case MSR_IA32_MCG_STATUS:
1425 data = vcpu->arch.mcg_status;
1426 break;
1427 default:
1428 if (msr >= MSR_IA32_MC0_CTL &&
1429 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1430 u32 offset = msr - MSR_IA32_MC0_CTL;
1431 data = vcpu->arch.mce_banks[offset];
1432 break;
1433 }
1434 return 1;
1435 }
1436 *pdata = data;
1437 return 0;
1438 }
1439
1440 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1441 {
1442 u64 data = 0;
1443 struct kvm *kvm = vcpu->kvm;
1444
1445 switch (msr) {
1446 case HV_X64_MSR_GUEST_OS_ID:
1447 data = kvm->arch.hv_guest_os_id;
1448 break;
1449 case HV_X64_MSR_HYPERCALL:
1450 data = kvm->arch.hv_hypercall;
1451 break;
1452 default:
1453 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1454 return 1;
1455 }
1456
1457 *pdata = data;
1458 return 0;
1459 }
1460
1461 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1462 {
1463 u64 data = 0;
1464
1465 switch (msr) {
1466 case HV_X64_MSR_VP_INDEX: {
1467 int r;
1468 struct kvm_vcpu *v;
1469 kvm_for_each_vcpu(r, v, vcpu->kvm)
1470 if (v == vcpu)
1471 data = r;
1472 break;
1473 }
1474 case HV_X64_MSR_EOI:
1475 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1476 case HV_X64_MSR_ICR:
1477 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1478 case HV_X64_MSR_TPR:
1479 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1480 default:
1481 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1482 return 1;
1483 }
1484 *pdata = data;
1485 return 0;
1486 }
1487
1488 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1489 {
1490 u64 data;
1491
1492 switch (msr) {
1493 case MSR_IA32_PLATFORM_ID:
1494 case MSR_IA32_UCODE_REV:
1495 case MSR_IA32_EBL_CR_POWERON:
1496 case MSR_IA32_DEBUGCTLMSR:
1497 case MSR_IA32_LASTBRANCHFROMIP:
1498 case MSR_IA32_LASTBRANCHTOIP:
1499 case MSR_IA32_LASTINTFROMIP:
1500 case MSR_IA32_LASTINTTOIP:
1501 case MSR_K8_SYSCFG:
1502 case MSR_K7_HWCR:
1503 case MSR_VM_HSAVE_PA:
1504 case MSR_P6_PERFCTR0:
1505 case MSR_P6_PERFCTR1:
1506 case MSR_P6_EVNTSEL0:
1507 case MSR_P6_EVNTSEL1:
1508 case MSR_K7_EVNTSEL0:
1509 case MSR_K7_PERFCTR0:
1510 case MSR_K8_INT_PENDING_MSG:
1511 case MSR_AMD64_NB_CFG:
1512 case MSR_FAM10H_MMIO_CONF_BASE:
1513 data = 0;
1514 break;
1515 case MSR_MTRRcap:
1516 data = 0x500 | KVM_NR_VAR_MTRR;
1517 break;
1518 case 0x200 ... 0x2ff:
1519 return get_msr_mtrr(vcpu, msr, pdata);
1520 case 0xcd: /* fsb frequency */
1521 data = 3;
1522 break;
1523 case MSR_IA32_APICBASE:
1524 data = kvm_get_apic_base(vcpu);
1525 break;
1526 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1527 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1528 break;
1529 case MSR_IA32_MISC_ENABLE:
1530 data = vcpu->arch.ia32_misc_enable_msr;
1531 break;
1532 case MSR_IA32_PERF_STATUS:
1533 /* TSC increment by tick */
1534 data = 1000ULL;
1535 /* CPU multiplier */
1536 data |= (((uint64_t)4ULL) << 40);
1537 break;
1538 case MSR_EFER:
1539 data = vcpu->arch.efer;
1540 break;
1541 case MSR_KVM_WALL_CLOCK:
1542 case MSR_KVM_WALL_CLOCK_NEW:
1543 data = vcpu->kvm->arch.wall_clock;
1544 break;
1545 case MSR_KVM_SYSTEM_TIME:
1546 case MSR_KVM_SYSTEM_TIME_NEW:
1547 data = vcpu->arch.time;
1548 break;
1549 case MSR_IA32_P5_MC_ADDR:
1550 case MSR_IA32_P5_MC_TYPE:
1551 case MSR_IA32_MCG_CAP:
1552 case MSR_IA32_MCG_CTL:
1553 case MSR_IA32_MCG_STATUS:
1554 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1555 return get_msr_mce(vcpu, msr, pdata);
1556 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1557 if (kvm_hv_msr_partition_wide(msr)) {
1558 int r;
1559 mutex_lock(&vcpu->kvm->lock);
1560 r = get_msr_hyperv_pw(vcpu, msr, pdata);
1561 mutex_unlock(&vcpu->kvm->lock);
1562 return r;
1563 } else
1564 return get_msr_hyperv(vcpu, msr, pdata);
1565 break;
1566 default:
1567 if (!ignore_msrs) {
1568 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1569 return 1;
1570 } else {
1571 pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1572 data = 0;
1573 }
1574 break;
1575 }
1576 *pdata = data;
1577 return 0;
1578 }
1579 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1580
1581 /*
1582 * Read or write a bunch of msrs. All parameters are kernel addresses.
1583 *
1584 * @return number of msrs set successfully.
1585 */
1586 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1587 struct kvm_msr_entry *entries,
1588 int (*do_msr)(struct kvm_vcpu *vcpu,
1589 unsigned index, u64 *data))
1590 {
1591 int i, idx;
1592
1593 idx = srcu_read_lock(&vcpu->kvm->srcu);
1594 for (i = 0; i < msrs->nmsrs; ++i)
1595 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1596 break;
1597 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1598
1599 return i;
1600 }
1601
1602 /*
1603 * Read or write a bunch of msrs. Parameters are user addresses.
1604 *
1605 * @return number of msrs set successfully.
1606 */
1607 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1608 int (*do_msr)(struct kvm_vcpu *vcpu,
1609 unsigned index, u64 *data),
1610 int writeback)
1611 {
1612 struct kvm_msrs msrs;
1613 struct kvm_msr_entry *entries;
1614 int r, n;
1615 unsigned size;
1616
1617 r = -EFAULT;
1618 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1619 goto out;
1620
1621 r = -E2BIG;
1622 if (msrs.nmsrs >= MAX_IO_MSRS)
1623 goto out;
1624
1625 r = -ENOMEM;
1626 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1627 entries = kmalloc(size, GFP_KERNEL);
1628 if (!entries)
1629 goto out;
1630
1631 r = -EFAULT;
1632 if (copy_from_user(entries, user_msrs->entries, size))
1633 goto out_free;
1634
1635 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1636 if (r < 0)
1637 goto out_free;
1638
1639 r = -EFAULT;
1640 if (writeback && copy_to_user(user_msrs->entries, entries, size))
1641 goto out_free;
1642
1643 r = n;
1644
1645 out_free:
1646 kfree(entries);
1647 out:
1648 return r;
1649 }
1650
1651 int kvm_dev_ioctl_check_extension(long ext)
1652 {
1653 int r;
1654
1655 switch (ext) {
1656 case KVM_CAP_IRQCHIP:
1657 case KVM_CAP_HLT:
1658 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1659 case KVM_CAP_SET_TSS_ADDR:
1660 case KVM_CAP_EXT_CPUID:
1661 case KVM_CAP_CLOCKSOURCE:
1662 case KVM_CAP_PIT:
1663 case KVM_CAP_NOP_IO_DELAY:
1664 case KVM_CAP_MP_STATE:
1665 case KVM_CAP_SYNC_MMU:
1666 case KVM_CAP_REINJECT_CONTROL:
1667 case KVM_CAP_IRQ_INJECT_STATUS:
1668 case KVM_CAP_ASSIGN_DEV_IRQ:
1669 case KVM_CAP_IRQFD:
1670 case KVM_CAP_IOEVENTFD:
1671 case KVM_CAP_PIT2:
1672 case KVM_CAP_PIT_STATE2:
1673 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1674 case KVM_CAP_XEN_HVM:
1675 case KVM_CAP_ADJUST_CLOCK:
1676 case KVM_CAP_VCPU_EVENTS:
1677 case KVM_CAP_HYPERV:
1678 case KVM_CAP_HYPERV_VAPIC:
1679 case KVM_CAP_HYPERV_SPIN:
1680 case KVM_CAP_PCI_SEGMENT:
1681 case KVM_CAP_DEBUGREGS:
1682 case KVM_CAP_X86_ROBUST_SINGLESTEP:
1683 case KVM_CAP_XSAVE:
1684 r = 1;
1685 break;
1686 case KVM_CAP_COALESCED_MMIO:
1687 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1688 break;
1689 case KVM_CAP_VAPIC:
1690 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1691 break;
1692 case KVM_CAP_NR_VCPUS:
1693 r = KVM_MAX_VCPUS;
1694 break;
1695 case KVM_CAP_NR_MEMSLOTS:
1696 r = KVM_MEMORY_SLOTS;
1697 break;
1698 case KVM_CAP_PV_MMU: /* obsolete */
1699 r = 0;
1700 break;
1701 case KVM_CAP_IOMMU:
1702 r = iommu_found();
1703 break;
1704 case KVM_CAP_MCE:
1705 r = KVM_MAX_MCE_BANKS;
1706 break;
1707 case KVM_CAP_XCRS:
1708 r = cpu_has_xsave;
1709 break;
1710 default:
1711 r = 0;
1712 break;
1713 }
1714 return r;
1715
1716 }
1717
1718 long kvm_arch_dev_ioctl(struct file *filp,
1719 unsigned int ioctl, unsigned long arg)
1720 {
1721 void __user *argp = (void __user *)arg;
1722 long r;
1723
1724 switch (ioctl) {
1725 case KVM_GET_MSR_INDEX_LIST: {
1726 struct kvm_msr_list __user *user_msr_list = argp;
1727 struct kvm_msr_list msr_list;
1728 unsigned n;
1729
1730 r = -EFAULT;
1731 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1732 goto out;
1733 n = msr_list.nmsrs;
1734 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1735 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1736 goto out;
1737 r = -E2BIG;
1738 if (n < msr_list.nmsrs)
1739 goto out;
1740 r = -EFAULT;
1741 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1742 num_msrs_to_save * sizeof(u32)))
1743 goto out;
1744 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1745 &emulated_msrs,
1746 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1747 goto out;
1748 r = 0;
1749 break;
1750 }
1751 case KVM_GET_SUPPORTED_CPUID: {
1752 struct kvm_cpuid2 __user *cpuid_arg = argp;
1753 struct kvm_cpuid2 cpuid;
1754
1755 r = -EFAULT;
1756 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1757 goto out;
1758 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1759 cpuid_arg->entries);
1760 if (r)
1761 goto out;
1762
1763 r = -EFAULT;
1764 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1765 goto out;
1766 r = 0;
1767 break;
1768 }
1769 case KVM_X86_GET_MCE_CAP_SUPPORTED: {
1770 u64 mce_cap;
1771
1772 mce_cap = KVM_MCE_CAP_SUPPORTED;
1773 r = -EFAULT;
1774 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
1775 goto out;
1776 r = 0;
1777 break;
1778 }
1779 default:
1780 r = -EINVAL;
1781 }
1782 out:
1783 return r;
1784 }
1785
1786 static void wbinvd_ipi(void *garbage)
1787 {
1788 wbinvd();
1789 }
1790
1791 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
1792 {
1793 return vcpu->kvm->arch.iommu_domain &&
1794 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
1795 }
1796
1797 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1798 {
1799 /* Address WBINVD may be executed by guest */
1800 if (need_emulate_wbinvd(vcpu)) {
1801 if (kvm_x86_ops->has_wbinvd_exit())
1802 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
1803 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
1804 smp_call_function_single(vcpu->cpu,
1805 wbinvd_ipi, NULL, 1);
1806 }
1807
1808 kvm_x86_ops->vcpu_load(vcpu, cpu);
1809 if (unlikely(per_cpu(cpu_tsc_khz, cpu) == 0)) {
1810 unsigned long khz = cpufreq_quick_get(cpu);
1811 if (!khz)
1812 khz = tsc_khz;
1813 per_cpu(cpu_tsc_khz, cpu) = khz;
1814 }
1815 kvm_request_guest_time_update(vcpu);
1816 }
1817
1818 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1819 {
1820 kvm_x86_ops->vcpu_put(vcpu);
1821 kvm_put_guest_fpu(vcpu);
1822 }
1823
1824 static int is_efer_nx(void)
1825 {
1826 unsigned long long efer = 0;
1827
1828 rdmsrl_safe(MSR_EFER, &efer);
1829 return efer & EFER_NX;
1830 }
1831
1832 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1833 {
1834 int i;
1835 struct kvm_cpuid_entry2 *e, *entry;
1836
1837 entry = NULL;
1838 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1839 e = &vcpu->arch.cpuid_entries[i];
1840 if (e->function == 0x80000001) {
1841 entry = e;
1842 break;
1843 }
1844 }
1845 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1846 entry->edx &= ~(1 << 20);
1847 printk(KERN_INFO "kvm: guest NX capability removed\n");
1848 }
1849 }
1850
1851 /* when an old userspace process fills a new kernel module */
1852 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1853 struct kvm_cpuid *cpuid,
1854 struct kvm_cpuid_entry __user *entries)
1855 {
1856 int r, i;
1857 struct kvm_cpuid_entry *cpuid_entries;
1858
1859 r = -E2BIG;
1860 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1861 goto out;
1862 r = -ENOMEM;
1863 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1864 if (!cpuid_entries)
1865 goto out;
1866 r = -EFAULT;
1867 if (copy_from_user(cpuid_entries, entries,
1868 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1869 goto out_free;
1870 for (i = 0; i < cpuid->nent; i++) {
1871 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1872 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1873 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1874 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1875 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1876 vcpu->arch.cpuid_entries[i].index = 0;
1877 vcpu->arch.cpuid_entries[i].flags = 0;
1878 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1879 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1880 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1881 }
1882 vcpu->arch.cpuid_nent = cpuid->nent;
1883 cpuid_fix_nx_cap(vcpu);
1884 r = 0;
1885 kvm_apic_set_version(vcpu);
1886 kvm_x86_ops->cpuid_update(vcpu);
1887 update_cpuid(vcpu);
1888
1889 out_free:
1890 vfree(cpuid_entries);
1891 out:
1892 return r;
1893 }
1894
1895 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1896 struct kvm_cpuid2 *cpuid,
1897 struct kvm_cpuid_entry2 __user *entries)
1898 {
1899 int r;
1900
1901 r = -E2BIG;
1902 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1903 goto out;
1904 r = -EFAULT;
1905 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1906 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1907 goto out;
1908 vcpu->arch.cpuid_nent = cpuid->nent;
1909 kvm_apic_set_version(vcpu);
1910 kvm_x86_ops->cpuid_update(vcpu);
1911 update_cpuid(vcpu);
1912 return 0;
1913
1914 out:
1915 return r;
1916 }
1917
1918 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1919 struct kvm_cpuid2 *cpuid,
1920 struct kvm_cpuid_entry2 __user *entries)
1921 {
1922 int r;
1923
1924 r = -E2BIG;
1925 if (cpuid->nent < vcpu->arch.cpuid_nent)
1926 goto out;
1927 r = -EFAULT;
1928 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1929 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1930 goto out;
1931 return 0;
1932
1933 out:
1934 cpuid->nent = vcpu->arch.cpuid_nent;
1935 return r;
1936 }
1937
1938 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1939 u32 index)
1940 {
1941 entry->function = function;
1942 entry->index = index;
1943 cpuid_count(entry->function, entry->index,
1944 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1945 entry->flags = 0;
1946 }
1947
1948 #define F(x) bit(X86_FEATURE_##x)
1949
1950 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1951 u32 index, int *nent, int maxnent)
1952 {
1953 unsigned f_nx = is_efer_nx() ? F(NX) : 0;
1954 #ifdef CONFIG_X86_64
1955 unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
1956 ? F(GBPAGES) : 0;
1957 unsigned f_lm = F(LM);
1958 #else
1959 unsigned f_gbpages = 0;
1960 unsigned f_lm = 0;
1961 #endif
1962 unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
1963
1964 /* cpuid 1.edx */
1965 const u32 kvm_supported_word0_x86_features =
1966 F(FPU) | F(VME) | F(DE) | F(PSE) |
1967 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1968 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
1969 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1970 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
1971 0 /* Reserved, DS, ACPI */ | F(MMX) |
1972 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
1973 0 /* HTT, TM, Reserved, PBE */;
1974 /* cpuid 0x80000001.edx */
1975 const u32 kvm_supported_word1_x86_features =
1976 F(FPU) | F(VME) | F(DE) | F(PSE) |
1977 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1978 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
1979 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1980 F(PAT) | F(PSE36) | 0 /* Reserved */ |
1981 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
1982 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
1983 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
1984 /* cpuid 1.ecx */
1985 const u32 kvm_supported_word4_x86_features =
1986 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
1987 0 /* DS-CPL, VMX, SMX, EST */ |
1988 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1989 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
1990 0 /* Reserved, DCA */ | F(XMM4_1) |
1991 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
1992 0 /* Reserved, AES */ | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX);
1993 /* cpuid 0x80000001.ecx */
1994 const u32 kvm_supported_word6_x86_features =
1995 F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |
1996 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
1997 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
1998 0 /* SKINIT */ | 0 /* WDT */;
1999
2000 /* all calls to cpuid_count() should be made on the same cpu */
2001 get_cpu();
2002 do_cpuid_1_ent(entry, function, index);
2003 ++*nent;
2004
2005 switch (function) {
2006 case 0:
2007 entry->eax = min(entry->eax, (u32)0xd);
2008 break;
2009 case 1:
2010 entry->edx &= kvm_supported_word0_x86_features;
2011 entry->ecx &= kvm_supported_word4_x86_features;
2012 /* we support x2apic emulation even if host does not support
2013 * it since we emulate x2apic in software */
2014 entry->ecx |= F(X2APIC);
2015 break;
2016 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2017 * may return different values. This forces us to get_cpu() before
2018 * issuing the first command, and also to emulate this annoying behavior
2019 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2020 case 2: {
2021 int t, times = entry->eax & 0xff;
2022
2023 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2024 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2025 for (t = 1; t < times && *nent < maxnent; ++t) {
2026 do_cpuid_1_ent(&entry[t], function, 0);
2027 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2028 ++*nent;
2029 }
2030 break;
2031 }
2032 /* function 4 and 0xb have additional index. */
2033 case 4: {
2034 int i, cache_type;
2035
2036 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2037 /* read more entries until cache_type is zero */
2038 for (i = 1; *nent < maxnent; ++i) {
2039 cache_type = entry[i - 1].eax & 0x1f;
2040 if (!cache_type)
2041 break;
2042 do_cpuid_1_ent(&entry[i], function, i);
2043 entry[i].flags |=
2044 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2045 ++*nent;
2046 }
2047 break;
2048 }
2049 case 0xb: {
2050 int i, level_type;
2051
2052 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2053 /* read more entries until level_type is zero */
2054 for (i = 1; *nent < maxnent; ++i) {
2055 level_type = entry[i - 1].ecx & 0xff00;
2056 if (!level_type)
2057 break;
2058 do_cpuid_1_ent(&entry[i], function, i);
2059 entry[i].flags |=
2060 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2061 ++*nent;
2062 }
2063 break;
2064 }
2065 case 0xd: {
2066 int i;
2067
2068 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2069 for (i = 1; *nent < maxnent; ++i) {
2070 if (entry[i - 1].eax == 0 && i != 2)
2071 break;
2072 do_cpuid_1_ent(&entry[i], function, i);
2073 entry[i].flags |=
2074 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2075 ++*nent;
2076 }
2077 break;
2078 }
2079 case KVM_CPUID_SIGNATURE: {
2080 char signature[12] = "KVMKVMKVM\0\0";
2081 u32 *sigptr = (u32 *)signature;
2082 entry->eax = 0;
2083 entry->ebx = sigptr[0];
2084 entry->ecx = sigptr[1];
2085 entry->edx = sigptr[2];
2086 break;
2087 }
2088 case KVM_CPUID_FEATURES:
2089 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2090 (1 << KVM_FEATURE_NOP_IO_DELAY) |
2091 (1 << KVM_FEATURE_CLOCKSOURCE2) |
2092 (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2093 entry->ebx = 0;
2094 entry->ecx = 0;
2095 entry->edx = 0;
2096 break;
2097 case 0x80000000:
2098 entry->eax = min(entry->eax, 0x8000001a);
2099 break;
2100 case 0x80000001:
2101 entry->edx &= kvm_supported_word1_x86_features;
2102 entry->ecx &= kvm_supported_word6_x86_features;
2103 break;
2104 }
2105
2106 kvm_x86_ops->set_supported_cpuid(function, entry);
2107
2108 put_cpu();
2109 }
2110
2111 #undef F
2112
2113 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2114 struct kvm_cpuid_entry2 __user *entries)
2115 {
2116 struct kvm_cpuid_entry2 *cpuid_entries;
2117 int limit, nent = 0, r = -E2BIG;
2118 u32 func;
2119
2120 if (cpuid->nent < 1)
2121 goto out;
2122 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2123 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2124 r = -ENOMEM;
2125 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2126 if (!cpuid_entries)
2127 goto out;
2128
2129 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2130 limit = cpuid_entries[0].eax;
2131 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2132 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2133 &nent, cpuid->nent);
2134 r = -E2BIG;
2135 if (nent >= cpuid->nent)
2136 goto out_free;
2137
2138 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2139 limit = cpuid_entries[nent - 1].eax;
2140 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2141 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2142 &nent, cpuid->nent);
2143
2144
2145
2146 r = -E2BIG;
2147 if (nent >= cpuid->nent)
2148 goto out_free;
2149
2150 do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2151 cpuid->nent);
2152
2153 r = -E2BIG;
2154 if (nent >= cpuid->nent)
2155 goto out_free;
2156
2157 do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2158 cpuid->nent);
2159
2160 r = -E2BIG;
2161 if (nent >= cpuid->nent)
2162 goto out_free;
2163
2164 r = -EFAULT;
2165 if (copy_to_user(entries, cpuid_entries,
2166 nent * sizeof(struct kvm_cpuid_entry2)))
2167 goto out_free;
2168 cpuid->nent = nent;
2169 r = 0;
2170
2171 out_free:
2172 vfree(cpuid_entries);
2173 out:
2174 return r;
2175 }
2176
2177 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2178 struct kvm_lapic_state *s)
2179 {
2180 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2181
2182 return 0;
2183 }
2184
2185 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2186 struct kvm_lapic_state *s)
2187 {
2188 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2189 kvm_apic_post_state_restore(vcpu);
2190 update_cr8_intercept(vcpu);
2191
2192 return 0;
2193 }
2194
2195 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2196 struct kvm_interrupt *irq)
2197 {
2198 if (irq->irq < 0 || irq->irq >= 256)
2199 return -EINVAL;
2200 if (irqchip_in_kernel(vcpu->kvm))
2201 return -ENXIO;
2202
2203 kvm_queue_interrupt(vcpu, irq->irq, false);
2204
2205 return 0;
2206 }
2207
2208 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2209 {
2210 kvm_inject_nmi(vcpu);
2211
2212 return 0;
2213 }
2214
2215 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2216 struct kvm_tpr_access_ctl *tac)
2217 {
2218 if (tac->flags)
2219 return -EINVAL;
2220 vcpu->arch.tpr_access_reporting = !!tac->enabled;
2221 return 0;
2222 }
2223
2224 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2225 u64 mcg_cap)
2226 {
2227 int r;
2228 unsigned bank_num = mcg_cap & 0xff, bank;
2229
2230 r = -EINVAL;
2231 if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2232 goto out;
2233 if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2234 goto out;
2235 r = 0;
2236 vcpu->arch.mcg_cap = mcg_cap;
2237 /* Init IA32_MCG_CTL to all 1s */
2238 if (mcg_cap & MCG_CTL_P)
2239 vcpu->arch.mcg_ctl = ~(u64)0;
2240 /* Init IA32_MCi_CTL to all 1s */
2241 for (bank = 0; bank < bank_num; bank++)
2242 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2243 out:
2244 return r;
2245 }
2246
2247 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2248 struct kvm_x86_mce *mce)
2249 {
2250 u64 mcg_cap = vcpu->arch.mcg_cap;
2251 unsigned bank_num = mcg_cap & 0xff;
2252 u64 *banks = vcpu->arch.mce_banks;
2253
2254 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2255 return -EINVAL;
2256 /*
2257 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2258 * reporting is disabled
2259 */
2260 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2261 vcpu->arch.mcg_ctl != ~(u64)0)
2262 return 0;
2263 banks += 4 * mce->bank;
2264 /*
2265 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2266 * reporting is disabled for the bank
2267 */
2268 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2269 return 0;
2270 if (mce->status & MCI_STATUS_UC) {
2271 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2272 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2273 printk(KERN_DEBUG "kvm: set_mce: "
2274 "injects mce exception while "
2275 "previous one is in progress!\n");
2276 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2277 return 0;
2278 }
2279 if (banks[1] & MCI_STATUS_VAL)
2280 mce->status |= MCI_STATUS_OVER;
2281 banks[2] = mce->addr;
2282 banks[3] = mce->misc;
2283 vcpu->arch.mcg_status = mce->mcg_status;
2284 banks[1] = mce->status;
2285 kvm_queue_exception(vcpu, MC_VECTOR);
2286 } else if (!(banks[1] & MCI_STATUS_VAL)
2287 || !(banks[1] & MCI_STATUS_UC)) {
2288 if (banks[1] & MCI_STATUS_VAL)
2289 mce->status |= MCI_STATUS_OVER;
2290 banks[2] = mce->addr;
2291 banks[3] = mce->misc;
2292 banks[1] = mce->status;
2293 } else
2294 banks[1] |= MCI_STATUS_OVER;
2295 return 0;
2296 }
2297
2298 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2299 struct kvm_vcpu_events *events)
2300 {
2301 events->exception.injected =
2302 vcpu->arch.exception.pending &&
2303 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2304 events->exception.nr = vcpu->arch.exception.nr;
2305 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2306 events->exception.error_code = vcpu->arch.exception.error_code;
2307
2308 events->interrupt.injected =
2309 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2310 events->interrupt.nr = vcpu->arch.interrupt.nr;
2311 events->interrupt.soft = 0;
2312 events->interrupt.shadow =
2313 kvm_x86_ops->get_interrupt_shadow(vcpu,
2314 KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2315
2316 events->nmi.injected = vcpu->arch.nmi_injected;
2317 events->nmi.pending = vcpu->arch.nmi_pending;
2318 events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2319
2320 events->sipi_vector = vcpu->arch.sipi_vector;
2321
2322 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2323 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2324 | KVM_VCPUEVENT_VALID_SHADOW);
2325 }
2326
2327 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2328 struct kvm_vcpu_events *events)
2329 {
2330 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2331 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2332 | KVM_VCPUEVENT_VALID_SHADOW))
2333 return -EINVAL;
2334
2335 vcpu->arch.exception.pending = events->exception.injected;
2336 vcpu->arch.exception.nr = events->exception.nr;
2337 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2338 vcpu->arch.exception.error_code = events->exception.error_code;
2339
2340 vcpu->arch.interrupt.pending = events->interrupt.injected;
2341 vcpu->arch.interrupt.nr = events->interrupt.nr;
2342 vcpu->arch.interrupt.soft = events->interrupt.soft;
2343 if (vcpu->arch.interrupt.pending && irqchip_in_kernel(vcpu->kvm))
2344 kvm_pic_clear_isr_ack(vcpu->kvm);
2345 if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2346 kvm_x86_ops->set_interrupt_shadow(vcpu,
2347 events->interrupt.shadow);
2348
2349 vcpu->arch.nmi_injected = events->nmi.injected;
2350 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2351 vcpu->arch.nmi_pending = events->nmi.pending;
2352 kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2353
2354 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2355 vcpu->arch.sipi_vector = events->sipi_vector;
2356
2357 return 0;
2358 }
2359
2360 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2361 struct kvm_debugregs *dbgregs)
2362 {
2363 memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2364 dbgregs->dr6 = vcpu->arch.dr6;
2365 dbgregs->dr7 = vcpu->arch.dr7;
2366 dbgregs->flags = 0;
2367 }
2368
2369 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2370 struct kvm_debugregs *dbgregs)
2371 {
2372 if (dbgregs->flags)
2373 return -EINVAL;
2374
2375 memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2376 vcpu->arch.dr6 = dbgregs->dr6;
2377 vcpu->arch.dr7 = dbgregs->dr7;
2378
2379 return 0;
2380 }
2381
2382 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2383 struct kvm_xsave *guest_xsave)
2384 {
2385 if (cpu_has_xsave)
2386 memcpy(guest_xsave->region,
2387 &vcpu->arch.guest_fpu.state->xsave,
2388 sizeof(struct xsave_struct));
2389 else {
2390 memcpy(guest_xsave->region,
2391 &vcpu->arch.guest_fpu.state->fxsave,
2392 sizeof(struct i387_fxsave_struct));
2393 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2394 XSTATE_FPSSE;
2395 }
2396 }
2397
2398 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2399 struct kvm_xsave *guest_xsave)
2400 {
2401 u64 xstate_bv =
2402 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2403
2404 if (cpu_has_xsave)
2405 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2406 guest_xsave->region, sizeof(struct xsave_struct));
2407 else {
2408 if (xstate_bv & ~XSTATE_FPSSE)
2409 return -EINVAL;
2410 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2411 guest_xsave->region, sizeof(struct i387_fxsave_struct));
2412 }
2413 return 0;
2414 }
2415
2416 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2417 struct kvm_xcrs *guest_xcrs)
2418 {
2419 if (!cpu_has_xsave) {
2420 guest_xcrs->nr_xcrs = 0;
2421 return;
2422 }
2423
2424 guest_xcrs->nr_xcrs = 1;
2425 guest_xcrs->flags = 0;
2426 guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2427 guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2428 }
2429
2430 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2431 struct kvm_xcrs *guest_xcrs)
2432 {
2433 int i, r = 0;
2434
2435 if (!cpu_has_xsave)
2436 return -EINVAL;
2437
2438 if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2439 return -EINVAL;
2440
2441 for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2442 /* Only support XCR0 currently */
2443 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2444 r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2445 guest_xcrs->xcrs[0].value);
2446 break;
2447 }
2448 if (r)
2449 r = -EINVAL;
2450 return r;
2451 }
2452
2453 long kvm_arch_vcpu_ioctl(struct file *filp,
2454 unsigned int ioctl, unsigned long arg)
2455 {
2456 struct kvm_vcpu *vcpu = filp->private_data;
2457 void __user *argp = (void __user *)arg;
2458 int r;
2459 union {
2460 struct kvm_lapic_state *lapic;
2461 struct kvm_xsave *xsave;
2462 struct kvm_xcrs *xcrs;
2463 void *buffer;
2464 } u;
2465
2466 u.buffer = NULL;
2467 switch (ioctl) {
2468 case KVM_GET_LAPIC: {
2469 r = -EINVAL;
2470 if (!vcpu->arch.apic)
2471 goto out;
2472 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2473
2474 r = -ENOMEM;
2475 if (!u.lapic)
2476 goto out;
2477 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2478 if (r)
2479 goto out;
2480 r = -EFAULT;
2481 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2482 goto out;
2483 r = 0;
2484 break;
2485 }
2486 case KVM_SET_LAPIC: {
2487 r = -EINVAL;
2488 if (!vcpu->arch.apic)
2489 goto out;
2490 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2491 r = -ENOMEM;
2492 if (!u.lapic)
2493 goto out;
2494 r = -EFAULT;
2495 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
2496 goto out;
2497 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2498 if (r)
2499 goto out;
2500 r = 0;
2501 break;
2502 }
2503 case KVM_INTERRUPT: {
2504 struct kvm_interrupt irq;
2505
2506 r = -EFAULT;
2507 if (copy_from_user(&irq, argp, sizeof irq))
2508 goto out;
2509 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2510 if (r)
2511 goto out;
2512 r = 0;
2513 break;
2514 }
2515 case KVM_NMI: {
2516 r = kvm_vcpu_ioctl_nmi(vcpu);
2517 if (r)
2518 goto out;
2519 r = 0;
2520 break;
2521 }
2522 case KVM_SET_CPUID: {
2523 struct kvm_cpuid __user *cpuid_arg = argp;
2524 struct kvm_cpuid cpuid;
2525
2526 r = -EFAULT;
2527 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2528 goto out;
2529 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2530 if (r)
2531 goto out;
2532 break;
2533 }
2534 case KVM_SET_CPUID2: {
2535 struct kvm_cpuid2 __user *cpuid_arg = argp;
2536 struct kvm_cpuid2 cpuid;
2537
2538 r = -EFAULT;
2539 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2540 goto out;
2541 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2542 cpuid_arg->entries);
2543 if (r)
2544 goto out;
2545 break;
2546 }
2547 case KVM_GET_CPUID2: {
2548 struct kvm_cpuid2 __user *cpuid_arg = argp;
2549 struct kvm_cpuid2 cpuid;
2550
2551 r = -EFAULT;
2552 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2553 goto out;
2554 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2555 cpuid_arg->entries);
2556 if (r)
2557 goto out;
2558 r = -EFAULT;
2559 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2560 goto out;
2561 r = 0;
2562 break;
2563 }
2564 case KVM_GET_MSRS:
2565 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2566 break;
2567 case KVM_SET_MSRS:
2568 r = msr_io(vcpu, argp, do_set_msr, 0);
2569 break;
2570 case KVM_TPR_ACCESS_REPORTING: {
2571 struct kvm_tpr_access_ctl tac;
2572
2573 r = -EFAULT;
2574 if (copy_from_user(&tac, argp, sizeof tac))
2575 goto out;
2576 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2577 if (r)
2578 goto out;
2579 r = -EFAULT;
2580 if (copy_to_user(argp, &tac, sizeof tac))
2581 goto out;
2582 r = 0;
2583 break;
2584 };
2585 case KVM_SET_VAPIC_ADDR: {
2586 struct kvm_vapic_addr va;
2587
2588 r = -EINVAL;
2589 if (!irqchip_in_kernel(vcpu->kvm))
2590 goto out;
2591 r = -EFAULT;
2592 if (copy_from_user(&va, argp, sizeof va))
2593 goto out;
2594 r = 0;
2595 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2596 break;
2597 }
2598 case KVM_X86_SETUP_MCE: {
2599 u64 mcg_cap;
2600
2601 r = -EFAULT;
2602 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2603 goto out;
2604 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2605 break;
2606 }
2607 case KVM_X86_SET_MCE: {
2608 struct kvm_x86_mce mce;
2609
2610 r = -EFAULT;
2611 if (copy_from_user(&mce, argp, sizeof mce))
2612 goto out;
2613 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2614 break;
2615 }
2616 case KVM_GET_VCPU_EVENTS: {
2617 struct kvm_vcpu_events events;
2618
2619 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2620
2621 r = -EFAULT;
2622 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2623 break;
2624 r = 0;
2625 break;
2626 }
2627 case KVM_SET_VCPU_EVENTS: {
2628 struct kvm_vcpu_events events;
2629
2630 r = -EFAULT;
2631 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2632 break;
2633
2634 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2635 break;
2636 }
2637 case KVM_GET_DEBUGREGS: {
2638 struct kvm_debugregs dbgregs;
2639
2640 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2641
2642 r = -EFAULT;
2643 if (copy_to_user(argp, &dbgregs,
2644 sizeof(struct kvm_debugregs)))
2645 break;
2646 r = 0;
2647 break;
2648 }
2649 case KVM_SET_DEBUGREGS: {
2650 struct kvm_debugregs dbgregs;
2651
2652 r = -EFAULT;
2653 if (copy_from_user(&dbgregs, argp,
2654 sizeof(struct kvm_debugregs)))
2655 break;
2656
2657 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2658 break;
2659 }
2660 case KVM_GET_XSAVE: {
2661 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2662 r = -ENOMEM;
2663 if (!u.xsave)
2664 break;
2665
2666 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
2667
2668 r = -EFAULT;
2669 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
2670 break;
2671 r = 0;
2672 break;
2673 }
2674 case KVM_SET_XSAVE: {
2675 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2676 r = -ENOMEM;
2677 if (!u.xsave)
2678 break;
2679
2680 r = -EFAULT;
2681 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
2682 break;
2683
2684 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
2685 break;
2686 }
2687 case KVM_GET_XCRS: {
2688 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2689 r = -ENOMEM;
2690 if (!u.xcrs)
2691 break;
2692
2693 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
2694
2695 r = -EFAULT;
2696 if (copy_to_user(argp, u.xcrs,
2697 sizeof(struct kvm_xcrs)))
2698 break;
2699 r = 0;
2700 break;
2701 }
2702 case KVM_SET_XCRS: {
2703 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2704 r = -ENOMEM;
2705 if (!u.xcrs)
2706 break;
2707
2708 r = -EFAULT;
2709 if (copy_from_user(u.xcrs, argp,
2710 sizeof(struct kvm_xcrs)))
2711 break;
2712
2713 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
2714 break;
2715 }
2716 default:
2717 r = -EINVAL;
2718 }
2719 out:
2720 kfree(u.buffer);
2721 return r;
2722 }
2723
2724 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
2725 {
2726 int ret;
2727
2728 if (addr > (unsigned int)(-3 * PAGE_SIZE))
2729 return -1;
2730 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
2731 return ret;
2732 }
2733
2734 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
2735 u64 ident_addr)
2736 {
2737 kvm->arch.ept_identity_map_addr = ident_addr;
2738 return 0;
2739 }
2740
2741 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
2742 u32 kvm_nr_mmu_pages)
2743 {
2744 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
2745 return -EINVAL;
2746
2747 mutex_lock(&kvm->slots_lock);
2748 spin_lock(&kvm->mmu_lock);
2749
2750 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
2751 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
2752
2753 spin_unlock(&kvm->mmu_lock);
2754 mutex_unlock(&kvm->slots_lock);
2755 return 0;
2756 }
2757
2758 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
2759 {
2760 return kvm->arch.n_alloc_mmu_pages;
2761 }
2762
2763 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2764 {
2765 int r;
2766
2767 r = 0;
2768 switch (chip->chip_id) {
2769 case KVM_IRQCHIP_PIC_MASTER:
2770 memcpy(&chip->chip.pic,
2771 &pic_irqchip(kvm)->pics[0],
2772 sizeof(struct kvm_pic_state));
2773 break;
2774 case KVM_IRQCHIP_PIC_SLAVE:
2775 memcpy(&chip->chip.pic,
2776 &pic_irqchip(kvm)->pics[1],
2777 sizeof(struct kvm_pic_state));
2778 break;
2779 case KVM_IRQCHIP_IOAPIC:
2780 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
2781 break;
2782 default:
2783 r = -EINVAL;
2784 break;
2785 }
2786 return r;
2787 }
2788
2789 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2790 {
2791 int r;
2792
2793 r = 0;
2794 switch (chip->chip_id) {
2795 case KVM_IRQCHIP_PIC_MASTER:
2796 raw_spin_lock(&pic_irqchip(kvm)->lock);
2797 memcpy(&pic_irqchip(kvm)->pics[0],
2798 &chip->chip.pic,
2799 sizeof(struct kvm_pic_state));
2800 raw_spin_unlock(&pic_irqchip(kvm)->lock);
2801 break;
2802 case KVM_IRQCHIP_PIC_SLAVE:
2803 raw_spin_lock(&pic_irqchip(kvm)->lock);
2804 memcpy(&pic_irqchip(kvm)->pics[1],
2805 &chip->chip.pic,
2806 sizeof(struct kvm_pic_state));
2807 raw_spin_unlock(&pic_irqchip(kvm)->lock);
2808 break;
2809 case KVM_IRQCHIP_IOAPIC:
2810 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
2811 break;
2812 default:
2813 r = -EINVAL;
2814 break;
2815 }
2816 kvm_pic_update_irq(pic_irqchip(kvm));
2817 return r;
2818 }
2819
2820 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2821 {
2822 int r = 0;
2823
2824 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2825 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2826 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2827 return r;
2828 }
2829
2830 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2831 {
2832 int r = 0;
2833
2834 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2835 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2836 kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
2837 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2838 return r;
2839 }
2840
2841 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2842 {
2843 int r = 0;
2844
2845 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2846 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
2847 sizeof(ps->channels));
2848 ps->flags = kvm->arch.vpit->pit_state.flags;
2849 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2850 return r;
2851 }
2852
2853 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2854 {
2855 int r = 0, start = 0;
2856 u32 prev_legacy, cur_legacy;
2857 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2858 prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
2859 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
2860 if (!prev_legacy && cur_legacy)
2861 start = 1;
2862 memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
2863 sizeof(kvm->arch.vpit->pit_state.channels));
2864 kvm->arch.vpit->pit_state.flags = ps->flags;
2865 kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
2866 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2867 return r;
2868 }
2869
2870 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
2871 struct kvm_reinject_control *control)
2872 {
2873 if (!kvm->arch.vpit)
2874 return -ENXIO;
2875 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2876 kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
2877 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2878 return 0;
2879 }
2880
2881 /*
2882 * Get (and clear) the dirty memory log for a memory slot.
2883 */
2884 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
2885 struct kvm_dirty_log *log)
2886 {
2887 int r, i;
2888 struct kvm_memory_slot *memslot;
2889 unsigned long n;
2890 unsigned long is_dirty = 0;
2891
2892 mutex_lock(&kvm->slots_lock);
2893
2894 r = -EINVAL;
2895 if (log->slot >= KVM_MEMORY_SLOTS)
2896 goto out;
2897
2898 memslot = &kvm->memslots->memslots[log->slot];
2899 r = -ENOENT;
2900 if (!memslot->dirty_bitmap)
2901 goto out;
2902
2903 n = kvm_dirty_bitmap_bytes(memslot);
2904
2905 for (i = 0; !is_dirty && i < n/sizeof(long); i++)
2906 is_dirty = memslot->dirty_bitmap[i];
2907
2908 /* If nothing is dirty, don't bother messing with page tables. */
2909 if (is_dirty) {
2910 struct kvm_memslots *slots, *old_slots;
2911 unsigned long *dirty_bitmap;
2912
2913 spin_lock(&kvm->mmu_lock);
2914 kvm_mmu_slot_remove_write_access(kvm, log->slot);
2915 spin_unlock(&kvm->mmu_lock);
2916
2917 r = -ENOMEM;
2918 dirty_bitmap = vmalloc(n);
2919 if (!dirty_bitmap)
2920 goto out;
2921 memset(dirty_bitmap, 0, n);
2922
2923 r = -ENOMEM;
2924 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
2925 if (!slots) {
2926 vfree(dirty_bitmap);
2927 goto out;
2928 }
2929 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
2930 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
2931
2932 old_slots = kvm->memslots;
2933 rcu_assign_pointer(kvm->memslots, slots);
2934 synchronize_srcu_expedited(&kvm->srcu);
2935 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
2936 kfree(old_slots);
2937
2938 r = -EFAULT;
2939 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n)) {
2940 vfree(dirty_bitmap);
2941 goto out;
2942 }
2943 vfree(dirty_bitmap);
2944 } else {
2945 r = -EFAULT;
2946 if (clear_user(log->dirty_bitmap, n))
2947 goto out;
2948 }
2949
2950 r = 0;
2951 out:
2952 mutex_unlock(&kvm->slots_lock);
2953 return r;
2954 }
2955
2956 long kvm_arch_vm_ioctl(struct file *filp,
2957 unsigned int ioctl, unsigned long arg)
2958 {
2959 struct kvm *kvm = filp->private_data;
2960 void __user *argp = (void __user *)arg;
2961 int r = -ENOTTY;
2962 /*
2963 * This union makes it completely explicit to gcc-3.x
2964 * that these two variables' stack usage should be
2965 * combined, not added together.
2966 */
2967 union {
2968 struct kvm_pit_state ps;
2969 struct kvm_pit_state2 ps2;
2970 struct kvm_pit_config pit_config;
2971 } u;
2972
2973 switch (ioctl) {
2974 case KVM_SET_TSS_ADDR:
2975 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
2976 if (r < 0)
2977 goto out;
2978 break;
2979 case KVM_SET_IDENTITY_MAP_ADDR: {
2980 u64 ident_addr;
2981
2982 r = -EFAULT;
2983 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
2984 goto out;
2985 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
2986 if (r < 0)
2987 goto out;
2988 break;
2989 }
2990 case KVM_SET_NR_MMU_PAGES:
2991 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
2992 if (r)
2993 goto out;
2994 break;
2995 case KVM_GET_NR_MMU_PAGES:
2996 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
2997 break;
2998 case KVM_CREATE_IRQCHIP: {
2999 struct kvm_pic *vpic;
3000
3001 mutex_lock(&kvm->lock);
3002 r = -EEXIST;
3003 if (kvm->arch.vpic)
3004 goto create_irqchip_unlock;
3005 r = -ENOMEM;
3006 vpic = kvm_create_pic(kvm);
3007 if (vpic) {
3008 r = kvm_ioapic_init(kvm);
3009 if (r) {
3010 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3011 &vpic->dev);
3012 kfree(vpic);
3013 goto create_irqchip_unlock;
3014 }
3015 } else
3016 goto create_irqchip_unlock;
3017 smp_wmb();
3018 kvm->arch.vpic = vpic;
3019 smp_wmb();
3020 r = kvm_setup_default_irq_routing(kvm);
3021 if (r) {
3022 mutex_lock(&kvm->irq_lock);
3023 kvm_ioapic_destroy(kvm);
3024 kvm_destroy_pic(kvm);
3025 mutex_unlock(&kvm->irq_lock);
3026 }
3027 create_irqchip_unlock:
3028 mutex_unlock(&kvm->lock);
3029 break;
3030 }
3031 case KVM_CREATE_PIT:
3032 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3033 goto create_pit;
3034 case KVM_CREATE_PIT2:
3035 r = -EFAULT;
3036 if (copy_from_user(&u.pit_config, argp,
3037 sizeof(struct kvm_pit_config)))
3038 goto out;
3039 create_pit:
3040 mutex_lock(&kvm->slots_lock);
3041 r = -EEXIST;
3042 if (kvm->arch.vpit)
3043 goto create_pit_unlock;
3044 r = -ENOMEM;
3045 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3046 if (kvm->arch.vpit)
3047 r = 0;
3048 create_pit_unlock:
3049 mutex_unlock(&kvm->slots_lock);
3050 break;
3051 case KVM_IRQ_LINE_STATUS:
3052 case KVM_IRQ_LINE: {
3053 struct kvm_irq_level irq_event;
3054
3055 r = -EFAULT;
3056 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3057 goto out;
3058 r = -ENXIO;
3059 if (irqchip_in_kernel(kvm)) {
3060 __s32 status;
3061 status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3062 irq_event.irq, irq_event.level);
3063 if (ioctl == KVM_IRQ_LINE_STATUS) {
3064 r = -EFAULT;
3065 irq_event.status = status;
3066 if (copy_to_user(argp, &irq_event,
3067 sizeof irq_event))
3068 goto out;
3069 }
3070 r = 0;
3071 }
3072 break;
3073 }
3074 case KVM_GET_IRQCHIP: {
3075 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3076 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3077
3078 r = -ENOMEM;
3079 if (!chip)
3080 goto out;
3081 r = -EFAULT;
3082 if (copy_from_user(chip, argp, sizeof *chip))
3083 goto get_irqchip_out;
3084 r = -ENXIO;
3085 if (!irqchip_in_kernel(kvm))
3086 goto get_irqchip_out;
3087 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3088 if (r)
3089 goto get_irqchip_out;
3090 r = -EFAULT;
3091 if (copy_to_user(argp, chip, sizeof *chip))
3092 goto get_irqchip_out;
3093 r = 0;
3094 get_irqchip_out:
3095 kfree(chip);
3096 if (r)
3097 goto out;
3098 break;
3099 }
3100 case KVM_SET_IRQCHIP: {
3101 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3102 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3103
3104 r = -ENOMEM;
3105 if (!chip)
3106 goto out;
3107 r = -EFAULT;
3108 if (copy_from_user(chip, argp, sizeof *chip))
3109 goto set_irqchip_out;
3110 r = -ENXIO;
3111 if (!irqchip_in_kernel(kvm))
3112 goto set_irqchip_out;
3113 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3114 if (r)
3115 goto set_irqchip_out;
3116 r = 0;
3117 set_irqchip_out:
3118 kfree(chip);
3119 if (r)
3120 goto out;
3121 break;
3122 }
3123 case KVM_GET_PIT: {
3124 r = -EFAULT;
3125 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3126 goto out;
3127 r = -ENXIO;
3128 if (!kvm->arch.vpit)
3129 goto out;
3130 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3131 if (r)
3132 goto out;
3133 r = -EFAULT;
3134 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3135 goto out;
3136 r = 0;
3137 break;
3138 }
3139 case KVM_SET_PIT: {
3140 r = -EFAULT;
3141 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3142 goto out;
3143 r = -ENXIO;
3144 if (!kvm->arch.vpit)
3145 goto out;
3146 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3147 if (r)
3148 goto out;
3149 r = 0;
3150 break;
3151 }
3152 case KVM_GET_PIT2: {
3153 r = -ENXIO;
3154 if (!kvm->arch.vpit)
3155 goto out;
3156 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3157 if (r)
3158 goto out;
3159 r = -EFAULT;
3160 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3161 goto out;
3162 r = 0;
3163 break;
3164 }
3165 case KVM_SET_PIT2: {
3166 r = -EFAULT;
3167 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3168 goto out;
3169 r = -ENXIO;
3170 if (!kvm->arch.vpit)
3171 goto out;
3172 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3173 if (r)
3174 goto out;
3175 r = 0;
3176 break;
3177 }
3178 case KVM_REINJECT_CONTROL: {
3179 struct kvm_reinject_control control;
3180 r = -EFAULT;
3181 if (copy_from_user(&control, argp, sizeof(control)))
3182 goto out;
3183 r = kvm_vm_ioctl_reinject(kvm, &control);
3184 if (r)
3185 goto out;
3186 r = 0;
3187 break;
3188 }
3189 case KVM_XEN_HVM_CONFIG: {
3190 r = -EFAULT;
3191 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3192 sizeof(struct kvm_xen_hvm_config)))
3193 goto out;
3194 r = -EINVAL;
3195 if (kvm->arch.xen_hvm_config.flags)
3196 goto out;
3197 r = 0;
3198 break;
3199 }
3200 case KVM_SET_CLOCK: {
3201 struct timespec now;
3202 struct kvm_clock_data user_ns;
3203 u64 now_ns;
3204 s64 delta;
3205
3206 r = -EFAULT;
3207 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3208 goto out;
3209
3210 r = -EINVAL;
3211 if (user_ns.flags)
3212 goto out;
3213
3214 r = 0;
3215 ktime_get_ts(&now);
3216 now_ns = timespec_to_ns(&now);
3217 delta = user_ns.clock - now_ns;
3218 kvm->arch.kvmclock_offset = delta;
3219 break;
3220 }
3221 case KVM_GET_CLOCK: {
3222 struct timespec now;
3223 struct kvm_clock_data user_ns;
3224 u64 now_ns;
3225
3226 ktime_get_ts(&now);
3227 now_ns = timespec_to_ns(&now);
3228 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3229 user_ns.flags = 0;
3230
3231 r = -EFAULT;
3232 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3233 goto out;
3234 r = 0;
3235 break;
3236 }
3237
3238 default:
3239 ;
3240 }
3241 out:
3242 return r;
3243 }
3244
3245 static void kvm_init_msr_list(void)
3246 {
3247 u32 dummy[2];
3248 unsigned i, j;
3249
3250 /* skip the first msrs in the list. KVM-specific */
3251 for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3252 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3253 continue;
3254 if (j < i)
3255 msrs_to_save[j] = msrs_to_save[i];
3256 j++;
3257 }
3258 num_msrs_to_save = j;
3259 }
3260
3261 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3262 const void *v)
3263 {
3264 if (vcpu->arch.apic &&
3265 !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
3266 return 0;
3267
3268 return kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3269 }
3270
3271 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3272 {
3273 if (vcpu->arch.apic &&
3274 !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
3275 return 0;
3276
3277 return kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3278 }
3279
3280 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3281 struct kvm_segment *var, int seg)
3282 {
3283 kvm_x86_ops->set_segment(vcpu, var, seg);
3284 }
3285
3286 void kvm_get_segment(struct kvm_vcpu *vcpu,
3287 struct kvm_segment *var, int seg)
3288 {
3289 kvm_x86_ops->get_segment(vcpu, var, seg);
3290 }
3291
3292 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3293 {
3294 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3295 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3296 }
3297
3298 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3299 {
3300 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3301 access |= PFERR_FETCH_MASK;
3302 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3303 }
3304
3305 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3306 {
3307 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3308 access |= PFERR_WRITE_MASK;
3309 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3310 }
3311
3312 /* uses this to access any guest's mapped memory without checking CPL */
3313 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3314 {
3315 return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, 0, error);
3316 }
3317
3318 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3319 struct kvm_vcpu *vcpu, u32 access,
3320 u32 *error)
3321 {
3322 void *data = val;
3323 int r = X86EMUL_CONTINUE;
3324
3325 while (bytes) {
3326 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr, access, error);
3327 unsigned offset = addr & (PAGE_SIZE-1);
3328 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3329 int ret;
3330
3331 if (gpa == UNMAPPED_GVA) {
3332 r = X86EMUL_PROPAGATE_FAULT;
3333 goto out;
3334 }
3335 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3336 if (ret < 0) {
3337 r = X86EMUL_IO_NEEDED;
3338 goto out;
3339 }
3340
3341 bytes -= toread;
3342 data += toread;
3343 addr += toread;
3344 }
3345 out:
3346 return r;
3347 }
3348
3349 /* used for instruction fetching */
3350 static int kvm_fetch_guest_virt(gva_t addr, void *val, unsigned int bytes,
3351 struct kvm_vcpu *vcpu, u32 *error)
3352 {
3353 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3354 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3355 access | PFERR_FETCH_MASK, error);
3356 }
3357
3358 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
3359 struct kvm_vcpu *vcpu, u32 *error)
3360 {
3361 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3362 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3363 error);
3364 }
3365
3366 static int kvm_read_guest_virt_system(gva_t addr, void *val, unsigned int bytes,
3367 struct kvm_vcpu *vcpu, u32 *error)
3368 {
3369 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, error);
3370 }
3371
3372 static int kvm_write_guest_virt_system(gva_t addr, void *val,
3373 unsigned int bytes,
3374 struct kvm_vcpu *vcpu,
3375 u32 *error)
3376 {
3377 void *data = val;
3378 int r = X86EMUL_CONTINUE;
3379
3380 while (bytes) {
3381 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr,
3382 PFERR_WRITE_MASK, error);
3383 unsigned offset = addr & (PAGE_SIZE-1);
3384 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3385 int ret;
3386
3387 if (gpa == UNMAPPED_GVA) {
3388 r = X86EMUL_PROPAGATE_FAULT;
3389 goto out;
3390 }
3391 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3392 if (ret < 0) {
3393 r = X86EMUL_IO_NEEDED;
3394 goto out;
3395 }
3396
3397 bytes -= towrite;
3398 data += towrite;
3399 addr += towrite;
3400 }
3401 out:
3402 return r;
3403 }
3404
3405 static int emulator_read_emulated(unsigned long addr,
3406 void *val,
3407 unsigned int bytes,
3408 unsigned int *error_code,
3409 struct kvm_vcpu *vcpu)
3410 {
3411 gpa_t gpa;
3412
3413 if (vcpu->mmio_read_completed) {
3414 memcpy(val, vcpu->mmio_data, bytes);
3415 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3416 vcpu->mmio_phys_addr, *(u64 *)val);
3417 vcpu->mmio_read_completed = 0;
3418 return X86EMUL_CONTINUE;
3419 }
3420
3421 gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, error_code);
3422
3423 if (gpa == UNMAPPED_GVA)
3424 return X86EMUL_PROPAGATE_FAULT;
3425
3426 /* For APIC access vmexit */
3427 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3428 goto mmio;
3429
3430 if (kvm_read_guest_virt(addr, val, bytes, vcpu, NULL)
3431 == X86EMUL_CONTINUE)
3432 return X86EMUL_CONTINUE;
3433
3434 mmio:
3435 /*
3436 * Is this MMIO handled locally?
3437 */
3438 if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
3439 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
3440 return X86EMUL_CONTINUE;
3441 }
3442
3443 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3444
3445 vcpu->mmio_needed = 1;
3446 vcpu->run->exit_reason = KVM_EXIT_MMIO;
3447 vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3448 vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3449 vcpu->run->mmio.is_write = vcpu->mmio_is_write = 0;
3450
3451 return X86EMUL_IO_NEEDED;
3452 }
3453
3454 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3455 const void *val, int bytes)
3456 {
3457 int ret;
3458
3459 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3460 if (ret < 0)
3461 return 0;
3462 kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
3463 return 1;
3464 }
3465
3466 static int emulator_write_emulated_onepage(unsigned long addr,
3467 const void *val,
3468 unsigned int bytes,
3469 unsigned int *error_code,
3470 struct kvm_vcpu *vcpu)
3471 {
3472 gpa_t gpa;
3473
3474 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, error_code);
3475
3476 if (gpa == UNMAPPED_GVA)
3477 return X86EMUL_PROPAGATE_FAULT;
3478
3479 /* For APIC access vmexit */
3480 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3481 goto mmio;
3482
3483 if (emulator_write_phys(vcpu, gpa, val, bytes))
3484 return X86EMUL_CONTINUE;
3485
3486 mmio:
3487 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3488 /*
3489 * Is this MMIO handled locally?
3490 */
3491 if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
3492 return X86EMUL_CONTINUE;
3493
3494 vcpu->mmio_needed = 1;
3495 vcpu->run->exit_reason = KVM_EXIT_MMIO;
3496 vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3497 vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3498 vcpu->run->mmio.is_write = vcpu->mmio_is_write = 1;
3499 memcpy(vcpu->run->mmio.data, val, bytes);
3500
3501 return X86EMUL_CONTINUE;
3502 }
3503
3504 int emulator_write_emulated(unsigned long addr,
3505 const void *val,
3506 unsigned int bytes,
3507 unsigned int *error_code,
3508 struct kvm_vcpu *vcpu)
3509 {
3510 /* Crossing a page boundary? */
3511 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3512 int rc, now;
3513
3514 now = -addr & ~PAGE_MASK;
3515 rc = emulator_write_emulated_onepage(addr, val, now, error_code,
3516 vcpu);
3517 if (rc != X86EMUL_CONTINUE)
3518 return rc;
3519 addr += now;
3520 val += now;
3521 bytes -= now;
3522 }
3523 return emulator_write_emulated_onepage(addr, val, bytes, error_code,
3524 vcpu);
3525 }
3526
3527 #define CMPXCHG_TYPE(t, ptr, old, new) \
3528 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3529
3530 #ifdef CONFIG_X86_64
3531 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3532 #else
3533 # define CMPXCHG64(ptr, old, new) \
3534 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3535 #endif
3536
3537 static int emulator_cmpxchg_emulated(unsigned long addr,
3538 const void *old,
3539 const void *new,
3540 unsigned int bytes,
3541 unsigned int *error_code,
3542 struct kvm_vcpu *vcpu)
3543 {
3544 gpa_t gpa;
3545 struct page *page;
3546 char *kaddr;
3547 bool exchanged;
3548
3549 /* guests cmpxchg8b have to be emulated atomically */
3550 if (bytes > 8 || (bytes & (bytes - 1)))
3551 goto emul_write;
3552
3553 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3554
3555 if (gpa == UNMAPPED_GVA ||
3556 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3557 goto emul_write;
3558
3559 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3560 goto emul_write;
3561
3562 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3563
3564 kaddr = kmap_atomic(page, KM_USER0);
3565 kaddr += offset_in_page(gpa);
3566 switch (bytes) {
3567 case 1:
3568 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3569 break;
3570 case 2:
3571 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3572 break;
3573 case 4:
3574 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3575 break;
3576 case 8:
3577 exchanged = CMPXCHG64(kaddr, old, new);
3578 break;
3579 default:
3580 BUG();
3581 }
3582 kunmap_atomic(kaddr, KM_USER0);
3583 kvm_release_page_dirty(page);
3584
3585 if (!exchanged)
3586 return X86EMUL_CMPXCHG_FAILED;
3587
3588 kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
3589
3590 return X86EMUL_CONTINUE;
3591
3592 emul_write:
3593 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3594
3595 return emulator_write_emulated(addr, new, bytes, error_code, vcpu);
3596 }
3597
3598 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3599 {
3600 /* TODO: String I/O for in kernel device */
3601 int r;
3602
3603 if (vcpu->arch.pio.in)
3604 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3605 vcpu->arch.pio.size, pd);
3606 else
3607 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3608 vcpu->arch.pio.port, vcpu->arch.pio.size,
3609 pd);
3610 return r;
3611 }
3612
3613
3614 static int emulator_pio_in_emulated(int size, unsigned short port, void *val,
3615 unsigned int count, struct kvm_vcpu *vcpu)
3616 {
3617 if (vcpu->arch.pio.count)
3618 goto data_avail;
3619
3620 trace_kvm_pio(1, port, size, 1);
3621
3622 vcpu->arch.pio.port = port;
3623 vcpu->arch.pio.in = 1;
3624 vcpu->arch.pio.count = count;
3625 vcpu->arch.pio.size = size;
3626
3627 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3628 data_avail:
3629 memcpy(val, vcpu->arch.pio_data, size * count);
3630 vcpu->arch.pio.count = 0;
3631 return 1;
3632 }
3633
3634 vcpu->run->exit_reason = KVM_EXIT_IO;
3635 vcpu->run->io.direction = KVM_EXIT_IO_IN;
3636 vcpu->run->io.size = size;
3637 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3638 vcpu->run->io.count = count;
3639 vcpu->run->io.port = port;
3640
3641 return 0;
3642 }
3643
3644 static int emulator_pio_out_emulated(int size, unsigned short port,
3645 const void *val, unsigned int count,
3646 struct kvm_vcpu *vcpu)
3647 {
3648 trace_kvm_pio(0, port, size, 1);
3649
3650 vcpu->arch.pio.port = port;
3651 vcpu->arch.pio.in = 0;
3652 vcpu->arch.pio.count = count;
3653 vcpu->arch.pio.size = size;
3654
3655 memcpy(vcpu->arch.pio_data, val, size * count);
3656
3657 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3658 vcpu->arch.pio.count = 0;
3659 return 1;
3660 }
3661
3662 vcpu->run->exit_reason = KVM_EXIT_IO;
3663 vcpu->run->io.direction = KVM_EXIT_IO_OUT;
3664 vcpu->run->io.size = size;
3665 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3666 vcpu->run->io.count = count;
3667 vcpu->run->io.port = port;
3668
3669 return 0;
3670 }
3671
3672 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
3673 {
3674 return kvm_x86_ops->get_segment_base(vcpu, seg);
3675 }
3676
3677 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
3678 {
3679 kvm_mmu_invlpg(vcpu, address);
3680 return X86EMUL_CONTINUE;
3681 }
3682
3683 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
3684 {
3685 if (!need_emulate_wbinvd(vcpu))
3686 return X86EMUL_CONTINUE;
3687
3688 if (kvm_x86_ops->has_wbinvd_exit()) {
3689 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
3690 wbinvd_ipi, NULL, 1);
3691 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
3692 }
3693 wbinvd();
3694 return X86EMUL_CONTINUE;
3695 }
3696 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
3697
3698 int emulate_clts(struct kvm_vcpu *vcpu)
3699 {
3700 kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~X86_CR0_TS));
3701 kvm_x86_ops->fpu_activate(vcpu);
3702 return X86EMUL_CONTINUE;
3703 }
3704
3705 int emulator_get_dr(int dr, unsigned long *dest, struct kvm_vcpu *vcpu)
3706 {
3707 return _kvm_get_dr(vcpu, dr, dest);
3708 }
3709
3710 int emulator_set_dr(int dr, unsigned long value, struct kvm_vcpu *vcpu)
3711 {
3712
3713 return __kvm_set_dr(vcpu, dr, value);
3714 }
3715
3716 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
3717 {
3718 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
3719 }
3720
3721 static unsigned long emulator_get_cr(int cr, struct kvm_vcpu *vcpu)
3722 {
3723 unsigned long value;
3724
3725 switch (cr) {
3726 case 0:
3727 value = kvm_read_cr0(vcpu);
3728 break;
3729 case 2:
3730 value = vcpu->arch.cr2;
3731 break;
3732 case 3:
3733 value = vcpu->arch.cr3;
3734 break;
3735 case 4:
3736 value = kvm_read_cr4(vcpu);
3737 break;
3738 case 8:
3739 value = kvm_get_cr8(vcpu);
3740 break;
3741 default:
3742 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3743 return 0;
3744 }
3745
3746 return value;
3747 }
3748
3749 static int emulator_set_cr(int cr, unsigned long val, struct kvm_vcpu *vcpu)
3750 {
3751 int res = 0;
3752
3753 switch (cr) {
3754 case 0:
3755 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
3756 break;
3757 case 2:
3758 vcpu->arch.cr2 = val;
3759 break;
3760 case 3:
3761 res = kvm_set_cr3(vcpu, val);
3762 break;
3763 case 4:
3764 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
3765 break;
3766 case 8:
3767 res = __kvm_set_cr8(vcpu, val & 0xfUL);
3768 break;
3769 default:
3770 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3771 res = -1;
3772 }
3773
3774 return res;
3775 }
3776
3777 static int emulator_get_cpl(struct kvm_vcpu *vcpu)
3778 {
3779 return kvm_x86_ops->get_cpl(vcpu);
3780 }
3781
3782 static void emulator_get_gdt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
3783 {
3784 kvm_x86_ops->get_gdt(vcpu, dt);
3785 }
3786
3787 static unsigned long emulator_get_cached_segment_base(int seg,
3788 struct kvm_vcpu *vcpu)
3789 {
3790 return get_segment_base(vcpu, seg);
3791 }
3792
3793 static bool emulator_get_cached_descriptor(struct desc_struct *desc, int seg,
3794 struct kvm_vcpu *vcpu)
3795 {
3796 struct kvm_segment var;
3797
3798 kvm_get_segment(vcpu, &var, seg);
3799
3800 if (var.unusable)
3801 return false;
3802
3803 if (var.g)
3804 var.limit >>= 12;
3805 set_desc_limit(desc, var.limit);
3806 set_desc_base(desc, (unsigned long)var.base);
3807 desc->type = var.type;
3808 desc->s = var.s;
3809 desc->dpl = var.dpl;
3810 desc->p = var.present;
3811 desc->avl = var.avl;
3812 desc->l = var.l;
3813 desc->d = var.db;
3814 desc->g = var.g;
3815
3816 return true;
3817 }
3818
3819 static void emulator_set_cached_descriptor(struct desc_struct *desc, int seg,
3820 struct kvm_vcpu *vcpu)
3821 {
3822 struct kvm_segment var;
3823
3824 /* needed to preserve selector */
3825 kvm_get_segment(vcpu, &var, seg);
3826
3827 var.base = get_desc_base(desc);
3828 var.limit = get_desc_limit(desc);
3829 if (desc->g)
3830 var.limit = (var.limit << 12) | 0xfff;
3831 var.type = desc->type;
3832 var.present = desc->p;
3833 var.dpl = desc->dpl;
3834 var.db = desc->d;
3835 var.s = desc->s;
3836 var.l = desc->l;
3837 var.g = desc->g;
3838 var.avl = desc->avl;
3839 var.present = desc->p;
3840 var.unusable = !var.present;
3841 var.padding = 0;
3842
3843 kvm_set_segment(vcpu, &var, seg);
3844 return;
3845 }
3846
3847 static u16 emulator_get_segment_selector(int seg, struct kvm_vcpu *vcpu)
3848 {
3849 struct kvm_segment kvm_seg;
3850
3851 kvm_get_segment(vcpu, &kvm_seg, seg);
3852 return kvm_seg.selector;
3853 }
3854
3855 static void emulator_set_segment_selector(u16 sel, int seg,
3856 struct kvm_vcpu *vcpu)
3857 {
3858 struct kvm_segment kvm_seg;
3859
3860 kvm_get_segment(vcpu, &kvm_seg, seg);
3861 kvm_seg.selector = sel;
3862 kvm_set_segment(vcpu, &kvm_seg, seg);
3863 }
3864
3865 static struct x86_emulate_ops emulate_ops = {
3866 .read_std = kvm_read_guest_virt_system,
3867 .write_std = kvm_write_guest_virt_system,
3868 .fetch = kvm_fetch_guest_virt,
3869 .read_emulated = emulator_read_emulated,
3870 .write_emulated = emulator_write_emulated,
3871 .cmpxchg_emulated = emulator_cmpxchg_emulated,
3872 .pio_in_emulated = emulator_pio_in_emulated,
3873 .pio_out_emulated = emulator_pio_out_emulated,
3874 .get_cached_descriptor = emulator_get_cached_descriptor,
3875 .set_cached_descriptor = emulator_set_cached_descriptor,
3876 .get_segment_selector = emulator_get_segment_selector,
3877 .set_segment_selector = emulator_set_segment_selector,
3878 .get_cached_segment_base = emulator_get_cached_segment_base,
3879 .get_gdt = emulator_get_gdt,
3880 .get_cr = emulator_get_cr,
3881 .set_cr = emulator_set_cr,
3882 .cpl = emulator_get_cpl,
3883 .get_dr = emulator_get_dr,
3884 .set_dr = emulator_set_dr,
3885 .set_msr = kvm_set_msr,
3886 .get_msr = kvm_get_msr,
3887 };
3888
3889 static void cache_all_regs(struct kvm_vcpu *vcpu)
3890 {
3891 kvm_register_read(vcpu, VCPU_REGS_RAX);
3892 kvm_register_read(vcpu, VCPU_REGS_RSP);
3893 kvm_register_read(vcpu, VCPU_REGS_RIP);
3894 vcpu->arch.regs_dirty = ~0;
3895 }
3896
3897 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
3898 {
3899 u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
3900 /*
3901 * an sti; sti; sequence only disable interrupts for the first
3902 * instruction. So, if the last instruction, be it emulated or
3903 * not, left the system with the INT_STI flag enabled, it
3904 * means that the last instruction is an sti. We should not
3905 * leave the flag on in this case. The same goes for mov ss
3906 */
3907 if (!(int_shadow & mask))
3908 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
3909 }
3910
3911 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
3912 {
3913 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
3914 if (ctxt->exception == PF_VECTOR)
3915 kvm_inject_page_fault(vcpu, ctxt->cr2, ctxt->error_code);
3916 else if (ctxt->error_code_valid)
3917 kvm_queue_exception_e(vcpu, ctxt->exception, ctxt->error_code);
3918 else
3919 kvm_queue_exception(vcpu, ctxt->exception);
3920 }
3921
3922 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
3923 {
3924 ++vcpu->stat.insn_emulation_fail;
3925 trace_kvm_emulate_insn_failed(vcpu);
3926 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
3927 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
3928 vcpu->run->internal.ndata = 0;
3929 kvm_queue_exception(vcpu, UD_VECTOR);
3930 return EMULATE_FAIL;
3931 }
3932
3933 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
3934 {
3935 gpa_t gpa;
3936
3937 /*
3938 * if emulation was due to access to shadowed page table
3939 * and it failed try to unshadow page and re-entetr the
3940 * guest to let CPU execute the instruction.
3941 */
3942 if (kvm_mmu_unprotect_page_virt(vcpu, gva))
3943 return true;
3944
3945 gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
3946
3947 if (gpa == UNMAPPED_GVA)
3948 return true; /* let cpu generate fault */
3949
3950 if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
3951 return true;
3952
3953 return false;
3954 }
3955
3956 int emulate_instruction(struct kvm_vcpu *vcpu,
3957 unsigned long cr2,
3958 u16 error_code,
3959 int emulation_type)
3960 {
3961 int r;
3962 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
3963
3964 kvm_clear_exception_queue(vcpu);
3965 vcpu->arch.mmio_fault_cr2 = cr2;
3966 /*
3967 * TODO: fix emulate.c to use guest_read/write_register
3968 * instead of direct ->regs accesses, can save hundred cycles
3969 * on Intel for instructions that don't read/change RSP, for
3970 * for example.
3971 */
3972 cache_all_regs(vcpu);
3973
3974 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
3975 int cs_db, cs_l;
3976 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
3977
3978 vcpu->arch.emulate_ctxt.vcpu = vcpu;
3979 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
3980 vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
3981 vcpu->arch.emulate_ctxt.mode =
3982 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
3983 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
3984 ? X86EMUL_MODE_VM86 : cs_l
3985 ? X86EMUL_MODE_PROT64 : cs_db
3986 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
3987 memset(c, 0, sizeof(struct decode_cache));
3988 memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
3989 vcpu->arch.emulate_ctxt.interruptibility = 0;
3990 vcpu->arch.emulate_ctxt.exception = -1;
3991
3992 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
3993 trace_kvm_emulate_insn_start(vcpu);
3994
3995 /* Only allow emulation of specific instructions on #UD
3996 * (namely VMMCALL, sysenter, sysexit, syscall)*/
3997 if (emulation_type & EMULTYPE_TRAP_UD) {
3998 if (!c->twobyte)
3999 return EMULATE_FAIL;
4000 switch (c->b) {
4001 case 0x01: /* VMMCALL */
4002 if (c->modrm_mod != 3 || c->modrm_rm != 1)
4003 return EMULATE_FAIL;
4004 break;
4005 case 0x34: /* sysenter */
4006 case 0x35: /* sysexit */
4007 if (c->modrm_mod != 0 || c->modrm_rm != 0)
4008 return EMULATE_FAIL;
4009 break;
4010 case 0x05: /* syscall */
4011 if (c->modrm_mod != 0 || c->modrm_rm != 0)
4012 return EMULATE_FAIL;
4013 break;
4014 default:
4015 return EMULATE_FAIL;
4016 }
4017
4018 if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
4019 return EMULATE_FAIL;
4020 }
4021
4022 ++vcpu->stat.insn_emulation;
4023 if (r) {
4024 if (reexecute_instruction(vcpu, cr2))
4025 return EMULATE_DONE;
4026 if (emulation_type & EMULTYPE_SKIP)
4027 return EMULATE_FAIL;
4028 return handle_emulation_failure(vcpu);
4029 }
4030 }
4031
4032 if (emulation_type & EMULTYPE_SKIP) {
4033 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
4034 return EMULATE_DONE;
4035 }
4036
4037 /* this is needed for vmware backdor interface to work since it
4038 changes registers values during IO operation */
4039 memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4040
4041 restart:
4042 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
4043
4044 if (r) { /* emulation failed */
4045 if (reexecute_instruction(vcpu, cr2))
4046 return EMULATE_DONE;
4047
4048 return handle_emulation_failure(vcpu);
4049 }
4050
4051 toggle_interruptibility(vcpu, vcpu->arch.emulate_ctxt.interruptibility);
4052 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4053 memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4054 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4055
4056 if (vcpu->arch.emulate_ctxt.exception >= 0) {
4057 inject_emulated_exception(vcpu);
4058 return EMULATE_DONE;
4059 }
4060
4061 if (vcpu->arch.pio.count) {
4062 if (!vcpu->arch.pio.in)
4063 vcpu->arch.pio.count = 0;
4064 return EMULATE_DO_MMIO;
4065 }
4066
4067 if (vcpu->mmio_needed) {
4068 if (vcpu->mmio_is_write)
4069 vcpu->mmio_needed = 0;
4070 return EMULATE_DO_MMIO;
4071 }
4072
4073 if (vcpu->arch.emulate_ctxt.restart)
4074 goto restart;
4075
4076 return EMULATE_DONE;
4077 }
4078 EXPORT_SYMBOL_GPL(emulate_instruction);
4079
4080 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4081 {
4082 unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4083 int ret = emulator_pio_out_emulated(size, port, &val, 1, vcpu);
4084 /* do not return to emulator after return from userspace */
4085 vcpu->arch.pio.count = 0;
4086 return ret;
4087 }
4088 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4089
4090 static void bounce_off(void *info)
4091 {
4092 /* nothing */
4093 }
4094
4095 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4096 void *data)
4097 {
4098 struct cpufreq_freqs *freq = data;
4099 struct kvm *kvm;
4100 struct kvm_vcpu *vcpu;
4101 int i, send_ipi = 0;
4102
4103 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4104 return 0;
4105 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4106 return 0;
4107 per_cpu(cpu_tsc_khz, freq->cpu) = freq->new;
4108
4109 spin_lock(&kvm_lock);
4110 list_for_each_entry(kvm, &vm_list, vm_list) {
4111 kvm_for_each_vcpu(i, vcpu, kvm) {
4112 if (vcpu->cpu != freq->cpu)
4113 continue;
4114 if (!kvm_request_guest_time_update(vcpu))
4115 continue;
4116 if (vcpu->cpu != smp_processor_id())
4117 send_ipi++;
4118 }
4119 }
4120 spin_unlock(&kvm_lock);
4121
4122 if (freq->old < freq->new && send_ipi) {
4123 /*
4124 * We upscale the frequency. Must make the guest
4125 * doesn't see old kvmclock values while running with
4126 * the new frequency, otherwise we risk the guest sees
4127 * time go backwards.
4128 *
4129 * In case we update the frequency for another cpu
4130 * (which might be in guest context) send an interrupt
4131 * to kick the cpu out of guest context. Next time
4132 * guest context is entered kvmclock will be updated,
4133 * so the guest will not see stale values.
4134 */
4135 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
4136 }
4137 return 0;
4138 }
4139
4140 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4141 .notifier_call = kvmclock_cpufreq_notifier
4142 };
4143
4144 static void kvm_timer_init(void)
4145 {
4146 int cpu;
4147
4148 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4149 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4150 CPUFREQ_TRANSITION_NOTIFIER);
4151 for_each_online_cpu(cpu) {
4152 unsigned long khz = cpufreq_get(cpu);
4153 if (!khz)
4154 khz = tsc_khz;
4155 per_cpu(cpu_tsc_khz, cpu) = khz;
4156 }
4157 } else {
4158 for_each_possible_cpu(cpu)
4159 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
4160 }
4161 }
4162
4163 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4164
4165 static int kvm_is_in_guest(void)
4166 {
4167 return percpu_read(current_vcpu) != NULL;
4168 }
4169
4170 static int kvm_is_user_mode(void)
4171 {
4172 int user_mode = 3;
4173
4174 if (percpu_read(current_vcpu))
4175 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
4176
4177 return user_mode != 0;
4178 }
4179
4180 static unsigned long kvm_get_guest_ip(void)
4181 {
4182 unsigned long ip = 0;
4183
4184 if (percpu_read(current_vcpu))
4185 ip = kvm_rip_read(percpu_read(current_vcpu));
4186
4187 return ip;
4188 }
4189
4190 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4191 .is_in_guest = kvm_is_in_guest,
4192 .is_user_mode = kvm_is_user_mode,
4193 .get_guest_ip = kvm_get_guest_ip,
4194 };
4195
4196 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4197 {
4198 percpu_write(current_vcpu, vcpu);
4199 }
4200 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4201
4202 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4203 {
4204 percpu_write(current_vcpu, NULL);
4205 }
4206 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4207
4208 int kvm_arch_init(void *opaque)
4209 {
4210 int r;
4211 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4212
4213 if (kvm_x86_ops) {
4214 printk(KERN_ERR "kvm: already loaded the other module\n");
4215 r = -EEXIST;
4216 goto out;
4217 }
4218
4219 if (!ops->cpu_has_kvm_support()) {
4220 printk(KERN_ERR "kvm: no hardware support\n");
4221 r = -EOPNOTSUPP;
4222 goto out;
4223 }
4224 if (ops->disabled_by_bios()) {
4225 printk(KERN_ERR "kvm: disabled by bios\n");
4226 r = -EOPNOTSUPP;
4227 goto out;
4228 }
4229
4230 r = kvm_mmu_module_init();
4231 if (r)
4232 goto out;
4233
4234 kvm_init_msr_list();
4235
4236 kvm_x86_ops = ops;
4237 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4238 kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
4239 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4240 PT_DIRTY_MASK, PT64_NX_MASK, 0);
4241
4242 kvm_timer_init();
4243
4244 perf_register_guest_info_callbacks(&kvm_guest_cbs);
4245
4246 if (cpu_has_xsave)
4247 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4248
4249 return 0;
4250
4251 out:
4252 return r;
4253 }
4254
4255 void kvm_arch_exit(void)
4256 {
4257 perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4258
4259 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4260 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4261 CPUFREQ_TRANSITION_NOTIFIER);
4262 kvm_x86_ops = NULL;
4263 kvm_mmu_module_exit();
4264 }
4265
4266 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4267 {
4268 ++vcpu->stat.halt_exits;
4269 if (irqchip_in_kernel(vcpu->kvm)) {
4270 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4271 return 1;
4272 } else {
4273 vcpu->run->exit_reason = KVM_EXIT_HLT;
4274 return 0;
4275 }
4276 }
4277 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4278
4279 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
4280 unsigned long a1)
4281 {
4282 if (is_long_mode(vcpu))
4283 return a0;
4284 else
4285 return a0 | ((gpa_t)a1 << 32);
4286 }
4287
4288 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4289 {
4290 u64 param, ingpa, outgpa, ret;
4291 uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4292 bool fast, longmode;
4293 int cs_db, cs_l;
4294
4295 /*
4296 * hypercall generates UD from non zero cpl and real mode
4297 * per HYPER-V spec
4298 */
4299 if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4300 kvm_queue_exception(vcpu, UD_VECTOR);
4301 return 0;
4302 }
4303
4304 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4305 longmode = is_long_mode(vcpu) && cs_l == 1;
4306
4307 if (!longmode) {
4308 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4309 (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4310 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4311 (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4312 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4313 (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4314 }
4315 #ifdef CONFIG_X86_64
4316 else {
4317 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4318 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4319 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4320 }
4321 #endif
4322
4323 code = param & 0xffff;
4324 fast = (param >> 16) & 0x1;
4325 rep_cnt = (param >> 32) & 0xfff;
4326 rep_idx = (param >> 48) & 0xfff;
4327
4328 trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4329
4330 switch (code) {
4331 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4332 kvm_vcpu_on_spin(vcpu);
4333 break;
4334 default:
4335 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4336 break;
4337 }
4338
4339 ret = res | (((u64)rep_done & 0xfff) << 32);
4340 if (longmode) {
4341 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4342 } else {
4343 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4344 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4345 }
4346
4347 return 1;
4348 }
4349
4350 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4351 {
4352 unsigned long nr, a0, a1, a2, a3, ret;
4353 int r = 1;
4354
4355 if (kvm_hv_hypercall_enabled(vcpu->kvm))
4356 return kvm_hv_hypercall(vcpu);
4357
4358 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
4359 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
4360 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
4361 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
4362 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
4363
4364 trace_kvm_hypercall(nr, a0, a1, a2, a3);
4365
4366 if (!is_long_mode(vcpu)) {
4367 nr &= 0xFFFFFFFF;
4368 a0 &= 0xFFFFFFFF;
4369 a1 &= 0xFFFFFFFF;
4370 a2 &= 0xFFFFFFFF;
4371 a3 &= 0xFFFFFFFF;
4372 }
4373
4374 if (kvm_x86_ops->get_cpl(vcpu) != 0) {
4375 ret = -KVM_EPERM;
4376 goto out;
4377 }
4378
4379 switch (nr) {
4380 case KVM_HC_VAPIC_POLL_IRQ:
4381 ret = 0;
4382 break;
4383 case KVM_HC_MMU_OP:
4384 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
4385 break;
4386 default:
4387 ret = -KVM_ENOSYS;
4388 break;
4389 }
4390 out:
4391 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4392 ++vcpu->stat.hypercalls;
4393 return r;
4394 }
4395 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
4396
4397 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
4398 {
4399 char instruction[3];
4400 unsigned long rip = kvm_rip_read(vcpu);
4401
4402 /*
4403 * Blow out the MMU to ensure that no other VCPU has an active mapping
4404 * to ensure that the updated hypercall appears atomically across all
4405 * VCPUs.
4406 */
4407 kvm_mmu_zap_all(vcpu->kvm);
4408
4409 kvm_x86_ops->patch_hypercall(vcpu, instruction);
4410
4411 return emulator_write_emulated(rip, instruction, 3, NULL, vcpu);
4412 }
4413
4414 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4415 {
4416 struct desc_ptr dt = { limit, base };
4417
4418 kvm_x86_ops->set_gdt(vcpu, &dt);
4419 }
4420
4421 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4422 {
4423 struct desc_ptr dt = { limit, base };
4424
4425 kvm_x86_ops->set_idt(vcpu, &dt);
4426 }
4427
4428 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
4429 {
4430 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
4431 int j, nent = vcpu->arch.cpuid_nent;
4432
4433 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
4434 /* when no next entry is found, the current entry[i] is reselected */
4435 for (j = i + 1; ; j = (j + 1) % nent) {
4436 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
4437 if (ej->function == e->function) {
4438 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
4439 return j;
4440 }
4441 }
4442 return 0; /* silence gcc, even though control never reaches here */
4443 }
4444
4445 /* find an entry with matching function, matching index (if needed), and that
4446 * should be read next (if it's stateful) */
4447 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
4448 u32 function, u32 index)
4449 {
4450 if (e->function != function)
4451 return 0;
4452 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
4453 return 0;
4454 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
4455 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
4456 return 0;
4457 return 1;
4458 }
4459
4460 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
4461 u32 function, u32 index)
4462 {
4463 int i;
4464 struct kvm_cpuid_entry2 *best = NULL;
4465
4466 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
4467 struct kvm_cpuid_entry2 *e;
4468
4469 e = &vcpu->arch.cpuid_entries[i];
4470 if (is_matching_cpuid_entry(e, function, index)) {
4471 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
4472 move_to_next_stateful_cpuid_entry(vcpu, i);
4473 best = e;
4474 break;
4475 }
4476 /*
4477 * Both basic or both extended?
4478 */
4479 if (((e->function ^ function) & 0x80000000) == 0)
4480 if (!best || e->function > best->function)
4481 best = e;
4482 }
4483 return best;
4484 }
4485 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
4486
4487 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
4488 {
4489 struct kvm_cpuid_entry2 *best;
4490
4491 best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
4492 if (!best || best->eax < 0x80000008)
4493 goto not_found;
4494 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
4495 if (best)
4496 return best->eax & 0xff;
4497 not_found:
4498 return 36;
4499 }
4500
4501 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
4502 {
4503 u32 function, index;
4504 struct kvm_cpuid_entry2 *best;
4505
4506 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
4507 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
4508 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
4509 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
4510 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
4511 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
4512 best = kvm_find_cpuid_entry(vcpu, function, index);
4513 if (best) {
4514 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
4515 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
4516 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
4517 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
4518 }
4519 kvm_x86_ops->skip_emulated_instruction(vcpu);
4520 trace_kvm_cpuid(function,
4521 kvm_register_read(vcpu, VCPU_REGS_RAX),
4522 kvm_register_read(vcpu, VCPU_REGS_RBX),
4523 kvm_register_read(vcpu, VCPU_REGS_RCX),
4524 kvm_register_read(vcpu, VCPU_REGS_RDX));
4525 }
4526 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
4527
4528 /*
4529 * Check if userspace requested an interrupt window, and that the
4530 * interrupt window is open.
4531 *
4532 * No need to exit to userspace if we already have an interrupt queued.
4533 */
4534 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
4535 {
4536 return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
4537 vcpu->run->request_interrupt_window &&
4538 kvm_arch_interrupt_allowed(vcpu));
4539 }
4540
4541 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
4542 {
4543 struct kvm_run *kvm_run = vcpu->run;
4544
4545 kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
4546 kvm_run->cr8 = kvm_get_cr8(vcpu);
4547 kvm_run->apic_base = kvm_get_apic_base(vcpu);
4548 if (irqchip_in_kernel(vcpu->kvm))
4549 kvm_run->ready_for_interrupt_injection = 1;
4550 else
4551 kvm_run->ready_for_interrupt_injection =
4552 kvm_arch_interrupt_allowed(vcpu) &&
4553 !kvm_cpu_has_interrupt(vcpu) &&
4554 !kvm_event_needs_reinjection(vcpu);
4555 }
4556
4557 static void vapic_enter(struct kvm_vcpu *vcpu)
4558 {
4559 struct kvm_lapic *apic = vcpu->arch.apic;
4560 struct page *page;
4561
4562 if (!apic || !apic->vapic_addr)
4563 return;
4564
4565 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4566
4567 vcpu->arch.apic->vapic_page = page;
4568 }
4569
4570 static void vapic_exit(struct kvm_vcpu *vcpu)
4571 {
4572 struct kvm_lapic *apic = vcpu->arch.apic;
4573 int idx;
4574
4575 if (!apic || !apic->vapic_addr)
4576 return;
4577
4578 idx = srcu_read_lock(&vcpu->kvm->srcu);
4579 kvm_release_page_dirty(apic->vapic_page);
4580 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4581 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4582 }
4583
4584 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
4585 {
4586 int max_irr, tpr;
4587
4588 if (!kvm_x86_ops->update_cr8_intercept)
4589 return;
4590
4591 if (!vcpu->arch.apic)
4592 return;
4593
4594 if (!vcpu->arch.apic->vapic_addr)
4595 max_irr = kvm_lapic_find_highest_irr(vcpu);
4596 else
4597 max_irr = -1;
4598
4599 if (max_irr != -1)
4600 max_irr >>= 4;
4601
4602 tpr = kvm_lapic_get_cr8(vcpu);
4603
4604 kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
4605 }
4606
4607 static void inject_pending_event(struct kvm_vcpu *vcpu)
4608 {
4609 /* try to reinject previous events if any */
4610 if (vcpu->arch.exception.pending) {
4611 trace_kvm_inj_exception(vcpu->arch.exception.nr,
4612 vcpu->arch.exception.has_error_code,
4613 vcpu->arch.exception.error_code);
4614 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
4615 vcpu->arch.exception.has_error_code,
4616 vcpu->arch.exception.error_code,
4617 vcpu->arch.exception.reinject);
4618 return;
4619 }
4620
4621 if (vcpu->arch.nmi_injected) {
4622 kvm_x86_ops->set_nmi(vcpu);
4623 return;
4624 }
4625
4626 if (vcpu->arch.interrupt.pending) {
4627 kvm_x86_ops->set_irq(vcpu);
4628 return;
4629 }
4630
4631 /* try to inject new event if pending */
4632 if (vcpu->arch.nmi_pending) {
4633 if (kvm_x86_ops->nmi_allowed(vcpu)) {
4634 vcpu->arch.nmi_pending = false;
4635 vcpu->arch.nmi_injected = true;
4636 kvm_x86_ops->set_nmi(vcpu);
4637 }
4638 } else if (kvm_cpu_has_interrupt(vcpu)) {
4639 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
4640 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
4641 false);
4642 kvm_x86_ops->set_irq(vcpu);
4643 }
4644 }
4645 }
4646
4647 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
4648 {
4649 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
4650 !vcpu->guest_xcr0_loaded) {
4651 /* kvm_set_xcr() also depends on this */
4652 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
4653 vcpu->guest_xcr0_loaded = 1;
4654 }
4655 }
4656
4657 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
4658 {
4659 if (vcpu->guest_xcr0_loaded) {
4660 if (vcpu->arch.xcr0 != host_xcr0)
4661 xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
4662 vcpu->guest_xcr0_loaded = 0;
4663 }
4664 }
4665
4666 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
4667 {
4668 int r;
4669 bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
4670 vcpu->run->request_interrupt_window;
4671
4672 if (vcpu->requests) {
4673 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
4674 kvm_mmu_unload(vcpu);
4675 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
4676 __kvm_migrate_timers(vcpu);
4677 if (kvm_check_request(KVM_REQ_KVMCLOCK_UPDATE, vcpu))
4678 kvm_write_guest_time(vcpu);
4679 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
4680 kvm_mmu_sync_roots(vcpu);
4681 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
4682 kvm_x86_ops->tlb_flush(vcpu);
4683 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
4684 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
4685 r = 0;
4686 goto out;
4687 }
4688 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
4689 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
4690 r = 0;
4691 goto out;
4692 }
4693 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
4694 vcpu->fpu_active = 0;
4695 kvm_x86_ops->fpu_deactivate(vcpu);
4696 }
4697 }
4698
4699 r = kvm_mmu_reload(vcpu);
4700 if (unlikely(r))
4701 goto out;
4702
4703 preempt_disable();
4704
4705 kvm_x86_ops->prepare_guest_switch(vcpu);
4706 if (vcpu->fpu_active)
4707 kvm_load_guest_fpu(vcpu);
4708 kvm_load_guest_xcr0(vcpu);
4709
4710 atomic_set(&vcpu->guest_mode, 1);
4711 smp_wmb();
4712
4713 local_irq_disable();
4714
4715 if (!atomic_read(&vcpu->guest_mode) || vcpu->requests
4716 || need_resched() || signal_pending(current)) {
4717 atomic_set(&vcpu->guest_mode, 0);
4718 smp_wmb();
4719 local_irq_enable();
4720 preempt_enable();
4721 r = 1;
4722 goto out;
4723 }
4724
4725 inject_pending_event(vcpu);
4726
4727 /* enable NMI/IRQ window open exits if needed */
4728 if (vcpu->arch.nmi_pending)
4729 kvm_x86_ops->enable_nmi_window(vcpu);
4730 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
4731 kvm_x86_ops->enable_irq_window(vcpu);
4732
4733 if (kvm_lapic_enabled(vcpu)) {
4734 update_cr8_intercept(vcpu);
4735 kvm_lapic_sync_to_vapic(vcpu);
4736 }
4737
4738 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
4739
4740 kvm_guest_enter();
4741
4742 if (unlikely(vcpu->arch.switch_db_regs)) {
4743 set_debugreg(0, 7);
4744 set_debugreg(vcpu->arch.eff_db[0], 0);
4745 set_debugreg(vcpu->arch.eff_db[1], 1);
4746 set_debugreg(vcpu->arch.eff_db[2], 2);
4747 set_debugreg(vcpu->arch.eff_db[3], 3);
4748 }
4749
4750 trace_kvm_entry(vcpu->vcpu_id);
4751 kvm_x86_ops->run(vcpu);
4752
4753 /*
4754 * If the guest has used debug registers, at least dr7
4755 * will be disabled while returning to the host.
4756 * If we don't have active breakpoints in the host, we don't
4757 * care about the messed up debug address registers. But if
4758 * we have some of them active, restore the old state.
4759 */
4760 if (hw_breakpoint_active())
4761 hw_breakpoint_restore();
4762
4763 atomic_set(&vcpu->guest_mode, 0);
4764 smp_wmb();
4765 local_irq_enable();
4766
4767 ++vcpu->stat.exits;
4768
4769 /*
4770 * We must have an instruction between local_irq_enable() and
4771 * kvm_guest_exit(), so the timer interrupt isn't delayed by
4772 * the interrupt shadow. The stat.exits increment will do nicely.
4773 * But we need to prevent reordering, hence this barrier():
4774 */
4775 barrier();
4776
4777 kvm_guest_exit();
4778
4779 preempt_enable();
4780
4781 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
4782
4783 /*
4784 * Profile KVM exit RIPs:
4785 */
4786 if (unlikely(prof_on == KVM_PROFILING)) {
4787 unsigned long rip = kvm_rip_read(vcpu);
4788 profile_hit(KVM_PROFILING, (void *)rip);
4789 }
4790
4791
4792 kvm_lapic_sync_from_vapic(vcpu);
4793
4794 r = kvm_x86_ops->handle_exit(vcpu);
4795 out:
4796 return r;
4797 }
4798
4799
4800 static int __vcpu_run(struct kvm_vcpu *vcpu)
4801 {
4802 int r;
4803 struct kvm *kvm = vcpu->kvm;
4804
4805 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
4806 pr_debug("vcpu %d received sipi with vector # %x\n",
4807 vcpu->vcpu_id, vcpu->arch.sipi_vector);
4808 kvm_lapic_reset(vcpu);
4809 r = kvm_arch_vcpu_reset(vcpu);
4810 if (r)
4811 return r;
4812 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4813 }
4814
4815 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4816 vapic_enter(vcpu);
4817
4818 r = 1;
4819 while (r > 0) {
4820 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
4821 r = vcpu_enter_guest(vcpu);
4822 else {
4823 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4824 kvm_vcpu_block(vcpu);
4825 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4826 if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
4827 {
4828 switch(vcpu->arch.mp_state) {
4829 case KVM_MP_STATE_HALTED:
4830 vcpu->arch.mp_state =
4831 KVM_MP_STATE_RUNNABLE;
4832 case KVM_MP_STATE_RUNNABLE:
4833 break;
4834 case KVM_MP_STATE_SIPI_RECEIVED:
4835 default:
4836 r = -EINTR;
4837 break;
4838 }
4839 }
4840 }
4841
4842 if (r <= 0)
4843 break;
4844
4845 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
4846 if (kvm_cpu_has_pending_timer(vcpu))
4847 kvm_inject_pending_timer_irqs(vcpu);
4848
4849 if (dm_request_for_irq_injection(vcpu)) {
4850 r = -EINTR;
4851 vcpu->run->exit_reason = KVM_EXIT_INTR;
4852 ++vcpu->stat.request_irq_exits;
4853 }
4854 if (signal_pending(current)) {
4855 r = -EINTR;
4856 vcpu->run->exit_reason = KVM_EXIT_INTR;
4857 ++vcpu->stat.signal_exits;
4858 }
4859 if (need_resched()) {
4860 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4861 kvm_resched(vcpu);
4862 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4863 }
4864 }
4865
4866 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4867
4868 vapic_exit(vcpu);
4869
4870 return r;
4871 }
4872
4873 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
4874 {
4875 int r;
4876 sigset_t sigsaved;
4877
4878 if (vcpu->sigset_active)
4879 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
4880
4881 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
4882 kvm_vcpu_block(vcpu);
4883 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
4884 r = -EAGAIN;
4885 goto out;
4886 }
4887
4888 /* re-sync apic's tpr */
4889 if (!irqchip_in_kernel(vcpu->kvm))
4890 kvm_set_cr8(vcpu, kvm_run->cr8);
4891
4892 if (vcpu->arch.pio.count || vcpu->mmio_needed ||
4893 vcpu->arch.emulate_ctxt.restart) {
4894 if (vcpu->mmio_needed) {
4895 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
4896 vcpu->mmio_read_completed = 1;
4897 vcpu->mmio_needed = 0;
4898 }
4899 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
4900 r = emulate_instruction(vcpu, 0, 0, EMULTYPE_NO_DECODE);
4901 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
4902 if (r != EMULATE_DONE) {
4903 r = 0;
4904 goto out;
4905 }
4906 }
4907 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
4908 kvm_register_write(vcpu, VCPU_REGS_RAX,
4909 kvm_run->hypercall.ret);
4910
4911 r = __vcpu_run(vcpu);
4912
4913 out:
4914 post_kvm_run_save(vcpu);
4915 if (vcpu->sigset_active)
4916 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
4917
4918 return r;
4919 }
4920
4921 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
4922 {
4923 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4924 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4925 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4926 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4927 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
4928 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
4929 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4930 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4931 #ifdef CONFIG_X86_64
4932 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
4933 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
4934 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
4935 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
4936 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
4937 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
4938 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
4939 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
4940 #endif
4941
4942 regs->rip = kvm_rip_read(vcpu);
4943 regs->rflags = kvm_get_rflags(vcpu);
4944
4945 return 0;
4946 }
4947
4948 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
4949 {
4950 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
4951 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
4952 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
4953 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
4954 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
4955 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
4956 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
4957 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
4958 #ifdef CONFIG_X86_64
4959 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
4960 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
4961 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
4962 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
4963 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
4964 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
4965 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
4966 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
4967 #endif
4968
4969 kvm_rip_write(vcpu, regs->rip);
4970 kvm_set_rflags(vcpu, regs->rflags);
4971
4972 vcpu->arch.exception.pending = false;
4973
4974 return 0;
4975 }
4976
4977 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
4978 {
4979 struct kvm_segment cs;
4980
4981 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
4982 *db = cs.db;
4983 *l = cs.l;
4984 }
4985 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
4986
4987 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
4988 struct kvm_sregs *sregs)
4989 {
4990 struct desc_ptr dt;
4991
4992 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4993 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4994 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4995 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4996 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4997 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4998
4999 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5000 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5001
5002 kvm_x86_ops->get_idt(vcpu, &dt);
5003 sregs->idt.limit = dt.size;
5004 sregs->idt.base = dt.address;
5005 kvm_x86_ops->get_gdt(vcpu, &dt);
5006 sregs->gdt.limit = dt.size;
5007 sregs->gdt.base = dt.address;
5008
5009 sregs->cr0 = kvm_read_cr0(vcpu);
5010 sregs->cr2 = vcpu->arch.cr2;
5011 sregs->cr3 = vcpu->arch.cr3;
5012 sregs->cr4 = kvm_read_cr4(vcpu);
5013 sregs->cr8 = kvm_get_cr8(vcpu);
5014 sregs->efer = vcpu->arch.efer;
5015 sregs->apic_base = kvm_get_apic_base(vcpu);
5016
5017 memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5018
5019 if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5020 set_bit(vcpu->arch.interrupt.nr,
5021 (unsigned long *)sregs->interrupt_bitmap);
5022
5023 return 0;
5024 }
5025
5026 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5027 struct kvm_mp_state *mp_state)
5028 {
5029 mp_state->mp_state = vcpu->arch.mp_state;
5030 return 0;
5031 }
5032
5033 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5034 struct kvm_mp_state *mp_state)
5035 {
5036 vcpu->arch.mp_state = mp_state->mp_state;
5037 return 0;
5038 }
5039
5040 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5041 bool has_error_code, u32 error_code)
5042 {
5043 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
5044 int cs_db, cs_l, ret;
5045 cache_all_regs(vcpu);
5046
5047 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5048
5049 vcpu->arch.emulate_ctxt.vcpu = vcpu;
5050 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
5051 vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
5052 vcpu->arch.emulate_ctxt.mode =
5053 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
5054 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
5055 ? X86EMUL_MODE_VM86 : cs_l
5056 ? X86EMUL_MODE_PROT64 : cs_db
5057 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
5058 memset(c, 0, sizeof(struct decode_cache));
5059 memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
5060
5061 ret = emulator_task_switch(&vcpu->arch.emulate_ctxt, &emulate_ops,
5062 tss_selector, reason, has_error_code,
5063 error_code);
5064
5065 if (ret)
5066 return EMULATE_FAIL;
5067
5068 memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
5069 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
5070 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
5071 return EMULATE_DONE;
5072 }
5073 EXPORT_SYMBOL_GPL(kvm_task_switch);
5074
5075 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5076 struct kvm_sregs *sregs)
5077 {
5078 int mmu_reset_needed = 0;
5079 int pending_vec, max_bits;
5080 struct desc_ptr dt;
5081
5082 dt.size = sregs->idt.limit;
5083 dt.address = sregs->idt.base;
5084 kvm_x86_ops->set_idt(vcpu, &dt);
5085 dt.size = sregs->gdt.limit;
5086 dt.address = sregs->gdt.base;
5087 kvm_x86_ops->set_gdt(vcpu, &dt);
5088
5089 vcpu->arch.cr2 = sregs->cr2;
5090 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
5091 vcpu->arch.cr3 = sregs->cr3;
5092
5093 kvm_set_cr8(vcpu, sregs->cr8);
5094
5095 mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5096 kvm_x86_ops->set_efer(vcpu, sregs->efer);
5097 kvm_set_apic_base(vcpu, sregs->apic_base);
5098
5099 mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5100 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5101 vcpu->arch.cr0 = sregs->cr0;
5102
5103 mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5104 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5105 if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5106 load_pdptrs(vcpu, vcpu->arch.cr3);
5107 mmu_reset_needed = 1;
5108 }
5109
5110 if (mmu_reset_needed)
5111 kvm_mmu_reset_context(vcpu);
5112
5113 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5114 pending_vec = find_first_bit(
5115 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5116 if (pending_vec < max_bits) {
5117 kvm_queue_interrupt(vcpu, pending_vec, false);
5118 pr_debug("Set back pending irq %d\n", pending_vec);
5119 if (irqchip_in_kernel(vcpu->kvm))
5120 kvm_pic_clear_isr_ack(vcpu->kvm);
5121 }
5122
5123 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5124 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5125 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5126 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5127 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5128 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5129
5130 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5131 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5132
5133 update_cr8_intercept(vcpu);
5134
5135 /* Older userspace won't unhalt the vcpu on reset. */
5136 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5137 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5138 !is_protmode(vcpu))
5139 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5140
5141 return 0;
5142 }
5143
5144 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5145 struct kvm_guest_debug *dbg)
5146 {
5147 unsigned long rflags;
5148 int i, r;
5149
5150 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5151 r = -EBUSY;
5152 if (vcpu->arch.exception.pending)
5153 goto out;
5154 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5155 kvm_queue_exception(vcpu, DB_VECTOR);
5156 else
5157 kvm_queue_exception(vcpu, BP_VECTOR);
5158 }
5159
5160 /*
5161 * Read rflags as long as potentially injected trace flags are still
5162 * filtered out.
5163 */
5164 rflags = kvm_get_rflags(vcpu);
5165
5166 vcpu->guest_debug = dbg->control;
5167 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5168 vcpu->guest_debug = 0;
5169
5170 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5171 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5172 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5173 vcpu->arch.switch_db_regs =
5174 (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5175 } else {
5176 for (i = 0; i < KVM_NR_DB_REGS; i++)
5177 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5178 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5179 }
5180
5181 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5182 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5183 get_segment_base(vcpu, VCPU_SREG_CS);
5184
5185 /*
5186 * Trigger an rflags update that will inject or remove the trace
5187 * flags.
5188 */
5189 kvm_set_rflags(vcpu, rflags);
5190
5191 kvm_x86_ops->set_guest_debug(vcpu, dbg);
5192
5193 r = 0;
5194
5195 out:
5196
5197 return r;
5198 }
5199
5200 /*
5201 * Translate a guest virtual address to a guest physical address.
5202 */
5203 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5204 struct kvm_translation *tr)
5205 {
5206 unsigned long vaddr = tr->linear_address;
5207 gpa_t gpa;
5208 int idx;
5209
5210 idx = srcu_read_lock(&vcpu->kvm->srcu);
5211 gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5212 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5213 tr->physical_address = gpa;
5214 tr->valid = gpa != UNMAPPED_GVA;
5215 tr->writeable = 1;
5216 tr->usermode = 0;
5217
5218 return 0;
5219 }
5220
5221 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5222 {
5223 struct i387_fxsave_struct *fxsave =
5224 &vcpu->arch.guest_fpu.state->fxsave;
5225
5226 memcpy(fpu->fpr, fxsave->st_space, 128);
5227 fpu->fcw = fxsave->cwd;
5228 fpu->fsw = fxsave->swd;
5229 fpu->ftwx = fxsave->twd;
5230 fpu->last_opcode = fxsave->fop;
5231 fpu->last_ip = fxsave->rip;
5232 fpu->last_dp = fxsave->rdp;
5233 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5234
5235 return 0;
5236 }
5237
5238 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5239 {
5240 struct i387_fxsave_struct *fxsave =
5241 &vcpu->arch.guest_fpu.state->fxsave;
5242
5243 memcpy(fxsave->st_space, fpu->fpr, 128);
5244 fxsave->cwd = fpu->fcw;
5245 fxsave->swd = fpu->fsw;
5246 fxsave->twd = fpu->ftwx;
5247 fxsave->fop = fpu->last_opcode;
5248 fxsave->rip = fpu->last_ip;
5249 fxsave->rdp = fpu->last_dp;
5250 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5251
5252 return 0;
5253 }
5254
5255 int fx_init(struct kvm_vcpu *vcpu)
5256 {
5257 int err;
5258
5259 err = fpu_alloc(&vcpu->arch.guest_fpu);
5260 if (err)
5261 return err;
5262
5263 fpu_finit(&vcpu->arch.guest_fpu);
5264
5265 /*
5266 * Ensure guest xcr0 is valid for loading
5267 */
5268 vcpu->arch.xcr0 = XSTATE_FP;
5269
5270 vcpu->arch.cr0 |= X86_CR0_ET;
5271
5272 return 0;
5273 }
5274 EXPORT_SYMBOL_GPL(fx_init);
5275
5276 static void fx_free(struct kvm_vcpu *vcpu)
5277 {
5278 fpu_free(&vcpu->arch.guest_fpu);
5279 }
5280
5281 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5282 {
5283 if (vcpu->guest_fpu_loaded)
5284 return;
5285
5286 /*
5287 * Restore all possible states in the guest,
5288 * and assume host would use all available bits.
5289 * Guest xcr0 would be loaded later.
5290 */
5291 kvm_put_guest_xcr0(vcpu);
5292 vcpu->guest_fpu_loaded = 1;
5293 unlazy_fpu(current);
5294 fpu_restore_checking(&vcpu->arch.guest_fpu);
5295 trace_kvm_fpu(1);
5296 }
5297
5298 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5299 {
5300 kvm_put_guest_xcr0(vcpu);
5301
5302 if (!vcpu->guest_fpu_loaded)
5303 return;
5304
5305 vcpu->guest_fpu_loaded = 0;
5306 fpu_save_init(&vcpu->arch.guest_fpu);
5307 ++vcpu->stat.fpu_reload;
5308 kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
5309 trace_kvm_fpu(0);
5310 }
5311
5312 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5313 {
5314 if (vcpu->arch.time_page) {
5315 kvm_release_page_dirty(vcpu->arch.time_page);
5316 vcpu->arch.time_page = NULL;
5317 }
5318
5319 free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
5320 fx_free(vcpu);
5321 kvm_x86_ops->vcpu_free(vcpu);
5322 }
5323
5324 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5325 unsigned int id)
5326 {
5327 return kvm_x86_ops->vcpu_create(kvm, id);
5328 }
5329
5330 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5331 {
5332 int r;
5333
5334 vcpu->arch.mtrr_state.have_fixed = 1;
5335 vcpu_load(vcpu);
5336 r = kvm_arch_vcpu_reset(vcpu);
5337 if (r == 0)
5338 r = kvm_mmu_setup(vcpu);
5339 vcpu_put(vcpu);
5340 if (r < 0)
5341 goto free_vcpu;
5342
5343 return 0;
5344 free_vcpu:
5345 kvm_x86_ops->vcpu_free(vcpu);
5346 return r;
5347 }
5348
5349 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5350 {
5351 vcpu_load(vcpu);
5352 kvm_mmu_unload(vcpu);
5353 vcpu_put(vcpu);
5354
5355 fx_free(vcpu);
5356 kvm_x86_ops->vcpu_free(vcpu);
5357 }
5358
5359 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5360 {
5361 vcpu->arch.nmi_pending = false;
5362 vcpu->arch.nmi_injected = false;
5363
5364 vcpu->arch.switch_db_regs = 0;
5365 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5366 vcpu->arch.dr6 = DR6_FIXED_1;
5367 vcpu->arch.dr7 = DR7_FIXED_1;
5368
5369 return kvm_x86_ops->vcpu_reset(vcpu);
5370 }
5371
5372 int kvm_arch_hardware_enable(void *garbage)
5373 {
5374 /*
5375 * Since this may be called from a hotplug notifcation,
5376 * we can't get the CPU frequency directly.
5377 */
5378 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5379 int cpu = raw_smp_processor_id();
5380 per_cpu(cpu_tsc_khz, cpu) = 0;
5381 }
5382
5383 kvm_shared_msr_cpu_online();
5384
5385 return kvm_x86_ops->hardware_enable(garbage);
5386 }
5387
5388 void kvm_arch_hardware_disable(void *garbage)
5389 {
5390 kvm_x86_ops->hardware_disable(garbage);
5391 drop_user_return_notifiers(garbage);
5392 }
5393
5394 int kvm_arch_hardware_setup(void)
5395 {
5396 return kvm_x86_ops->hardware_setup();
5397 }
5398
5399 void kvm_arch_hardware_unsetup(void)
5400 {
5401 kvm_x86_ops->hardware_unsetup();
5402 }
5403
5404 void kvm_arch_check_processor_compat(void *rtn)
5405 {
5406 kvm_x86_ops->check_processor_compatibility(rtn);
5407 }
5408
5409 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5410 {
5411 struct page *page;
5412 struct kvm *kvm;
5413 int r;
5414
5415 BUG_ON(vcpu->kvm == NULL);
5416 kvm = vcpu->kvm;
5417
5418 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
5419 if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5420 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5421 else
5422 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5423
5424 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5425 if (!page) {
5426 r = -ENOMEM;
5427 goto fail;
5428 }
5429 vcpu->arch.pio_data = page_address(page);
5430
5431 r = kvm_mmu_create(vcpu);
5432 if (r < 0)
5433 goto fail_free_pio_data;
5434
5435 if (irqchip_in_kernel(kvm)) {
5436 r = kvm_create_lapic(vcpu);
5437 if (r < 0)
5438 goto fail_mmu_destroy;
5439 }
5440
5441 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
5442 GFP_KERNEL);
5443 if (!vcpu->arch.mce_banks) {
5444 r = -ENOMEM;
5445 goto fail_free_lapic;
5446 }
5447 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5448
5449 if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
5450 goto fail_free_mce_banks;
5451
5452 return 0;
5453 fail_free_mce_banks:
5454 kfree(vcpu->arch.mce_banks);
5455 fail_free_lapic:
5456 kvm_free_lapic(vcpu);
5457 fail_mmu_destroy:
5458 kvm_mmu_destroy(vcpu);
5459 fail_free_pio_data:
5460 free_page((unsigned long)vcpu->arch.pio_data);
5461 fail:
5462 return r;
5463 }
5464
5465 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
5466 {
5467 int idx;
5468
5469 kfree(vcpu->arch.mce_banks);
5470 kvm_free_lapic(vcpu);
5471 idx = srcu_read_lock(&vcpu->kvm->srcu);
5472 kvm_mmu_destroy(vcpu);
5473 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5474 free_page((unsigned long)vcpu->arch.pio_data);
5475 }
5476
5477 struct kvm *kvm_arch_create_vm(void)
5478 {
5479 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
5480
5481 if (!kvm)
5482 return ERR_PTR(-ENOMEM);
5483
5484 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
5485 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
5486
5487 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5488 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
5489
5490 rdtscll(kvm->arch.vm_init_tsc);
5491
5492 return kvm;
5493 }
5494
5495 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
5496 {
5497 vcpu_load(vcpu);
5498 kvm_mmu_unload(vcpu);
5499 vcpu_put(vcpu);
5500 }
5501
5502 static void kvm_free_vcpus(struct kvm *kvm)
5503 {
5504 unsigned int i;
5505 struct kvm_vcpu *vcpu;
5506
5507 /*
5508 * Unpin any mmu pages first.
5509 */
5510 kvm_for_each_vcpu(i, vcpu, kvm)
5511 kvm_unload_vcpu_mmu(vcpu);
5512 kvm_for_each_vcpu(i, vcpu, kvm)
5513 kvm_arch_vcpu_free(vcpu);
5514
5515 mutex_lock(&kvm->lock);
5516 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
5517 kvm->vcpus[i] = NULL;
5518
5519 atomic_set(&kvm->online_vcpus, 0);
5520 mutex_unlock(&kvm->lock);
5521 }
5522
5523 void kvm_arch_sync_events(struct kvm *kvm)
5524 {
5525 kvm_free_all_assigned_devices(kvm);
5526 kvm_free_pit(kvm);
5527 }
5528
5529 void kvm_arch_destroy_vm(struct kvm *kvm)
5530 {
5531 kvm_iommu_unmap_guest(kvm);
5532 kfree(kvm->arch.vpic);
5533 kfree(kvm->arch.vioapic);
5534 kvm_free_vcpus(kvm);
5535 kvm_free_physmem(kvm);
5536 if (kvm->arch.apic_access_page)
5537 put_page(kvm->arch.apic_access_page);
5538 if (kvm->arch.ept_identity_pagetable)
5539 put_page(kvm->arch.ept_identity_pagetable);
5540 cleanup_srcu_struct(&kvm->srcu);
5541 kfree(kvm);
5542 }
5543
5544 int kvm_arch_prepare_memory_region(struct kvm *kvm,
5545 struct kvm_memory_slot *memslot,
5546 struct kvm_memory_slot old,
5547 struct kvm_userspace_memory_region *mem,
5548 int user_alloc)
5549 {
5550 int npages = memslot->npages;
5551 int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
5552
5553 /* Prevent internal slot pages from being moved by fork()/COW. */
5554 if (memslot->id >= KVM_MEMORY_SLOTS)
5555 map_flags = MAP_SHARED | MAP_ANONYMOUS;
5556
5557 /*To keep backward compatibility with older userspace,
5558 *x86 needs to hanlde !user_alloc case.
5559 */
5560 if (!user_alloc) {
5561 if (npages && !old.rmap) {
5562 unsigned long userspace_addr;
5563
5564 down_write(&current->mm->mmap_sem);
5565 userspace_addr = do_mmap(NULL, 0,
5566 npages * PAGE_SIZE,
5567 PROT_READ | PROT_WRITE,
5568 map_flags,
5569 0);
5570 up_write(&current->mm->mmap_sem);
5571
5572 if (IS_ERR((void *)userspace_addr))
5573 return PTR_ERR((void *)userspace_addr);
5574
5575 memslot->userspace_addr = userspace_addr;
5576 }
5577 }
5578
5579
5580 return 0;
5581 }
5582
5583 void kvm_arch_commit_memory_region(struct kvm *kvm,
5584 struct kvm_userspace_memory_region *mem,
5585 struct kvm_memory_slot old,
5586 int user_alloc)
5587 {
5588
5589 int npages = mem->memory_size >> PAGE_SHIFT;
5590
5591 if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
5592 int ret;
5593
5594 down_write(&current->mm->mmap_sem);
5595 ret = do_munmap(current->mm, old.userspace_addr,
5596 old.npages * PAGE_SIZE);
5597 up_write(&current->mm->mmap_sem);
5598 if (ret < 0)
5599 printk(KERN_WARNING
5600 "kvm_vm_ioctl_set_memory_region: "
5601 "failed to munmap memory\n");
5602 }
5603
5604 spin_lock(&kvm->mmu_lock);
5605 if (!kvm->arch.n_requested_mmu_pages) {
5606 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
5607 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
5608 }
5609
5610 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
5611 spin_unlock(&kvm->mmu_lock);
5612 }
5613
5614 void kvm_arch_flush_shadow(struct kvm *kvm)
5615 {
5616 kvm_mmu_zap_all(kvm);
5617 kvm_reload_remote_mmus(kvm);
5618 }
5619
5620 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
5621 {
5622 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
5623 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
5624 || vcpu->arch.nmi_pending ||
5625 (kvm_arch_interrupt_allowed(vcpu) &&
5626 kvm_cpu_has_interrupt(vcpu));
5627 }
5628
5629 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
5630 {
5631 int me;
5632 int cpu = vcpu->cpu;
5633
5634 if (waitqueue_active(&vcpu->wq)) {
5635 wake_up_interruptible(&vcpu->wq);
5636 ++vcpu->stat.halt_wakeup;
5637 }
5638
5639 me = get_cpu();
5640 if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
5641 if (atomic_xchg(&vcpu->guest_mode, 0))
5642 smp_send_reschedule(cpu);
5643 put_cpu();
5644 }
5645
5646 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
5647 {
5648 return kvm_x86_ops->interrupt_allowed(vcpu);
5649 }
5650
5651 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
5652 {
5653 unsigned long current_rip = kvm_rip_read(vcpu) +
5654 get_segment_base(vcpu, VCPU_SREG_CS);
5655
5656 return current_rip == linear_rip;
5657 }
5658 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
5659
5660 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
5661 {
5662 unsigned long rflags;
5663
5664 rflags = kvm_x86_ops->get_rflags(vcpu);
5665 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5666 rflags &= ~X86_EFLAGS_TF;
5667 return rflags;
5668 }
5669 EXPORT_SYMBOL_GPL(kvm_get_rflags);
5670
5671 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
5672 {
5673 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
5674 kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
5675 rflags |= X86_EFLAGS_TF;
5676 kvm_x86_ops->set_rflags(vcpu, rflags);
5677 }
5678 EXPORT_SYMBOL_GPL(kvm_set_rflags);
5679
5680 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
5681 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
5682 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
5683 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
5684 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
5685 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
5686 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
5687 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
5688 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
5689 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
5690 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
5691 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
Linux kernel - Deliverables
This page took 0.139016 seconds and 4 git commands to generate.