2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
30 #include "assigned-dev.h"
32 #include <linux/clocksource.h>
33 #include <linux/interrupt.h>
34 #include <linux/kvm.h>
36 #include <linux/vmalloc.h>
37 #include <linux/module.h>
38 #include <linux/mman.h>
39 #include <linux/highmem.h>
40 #include <linux/iommu.h>
41 #include <linux/intel-iommu.h>
42 #include <linux/cpufreq.h>
43 #include <linux/user-return-notifier.h>
44 #include <linux/srcu.h>
45 #include <linux/slab.h>
46 #include <linux/perf_event.h>
47 #include <linux/uaccess.h>
48 #include <linux/hash.h>
49 #include <linux/pci.h>
50 #include <linux/timekeeper_internal.h>
51 #include <linux/pvclock_gtod.h>
52 #include <trace/events/kvm.h>
54 #define CREATE_TRACE_POINTS
57 #include <asm/debugreg.h>
63 #include <asm/fpu-internal.h> /* Ugh! */
65 #include <asm/pvclock.h>
66 #include <asm/div64.h>
68 #define MAX_IO_MSRS 256
69 #define KVM_MAX_MCE_BANKS 32
70 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
72 #define emul_to_vcpu(ctxt) \
73 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
76 * - enable syscall per default because its emulated by KVM
77 * - enable LME and LMA per default on 64 bit KVM
81 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
83 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
86 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
87 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
89 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
90 static void process_nmi(struct kvm_vcpu
*vcpu
);
91 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
93 struct kvm_x86_ops
*kvm_x86_ops
;
94 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
96 static bool ignore_msrs
= 0;
97 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
99 unsigned int min_timer_period_us
= 500;
100 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
102 bool kvm_has_tsc_control
;
103 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
104 u32 kvm_max_guest_tsc_khz
;
105 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
107 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
108 static u32 tsc_tolerance_ppm
= 250;
109 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
111 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
112 unsigned int lapic_timer_advance_ns
= 0;
113 module_param(lapic_timer_advance_ns
, uint
, S_IRUGO
| S_IWUSR
);
115 static bool backwards_tsc_observed
= false;
117 #define KVM_NR_SHARED_MSRS 16
119 struct kvm_shared_msrs_global
{
121 u32 msrs
[KVM_NR_SHARED_MSRS
];
124 struct kvm_shared_msrs
{
125 struct user_return_notifier urn
;
127 struct kvm_shared_msr_values
{
130 } values
[KVM_NR_SHARED_MSRS
];
133 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
134 static struct kvm_shared_msrs __percpu
*shared_msrs
;
136 struct kvm_stats_debugfs_item debugfs_entries
[] = {
137 { "pf_fixed", VCPU_STAT(pf_fixed
) },
138 { "pf_guest", VCPU_STAT(pf_guest
) },
139 { "tlb_flush", VCPU_STAT(tlb_flush
) },
140 { "invlpg", VCPU_STAT(invlpg
) },
141 { "exits", VCPU_STAT(exits
) },
142 { "io_exits", VCPU_STAT(io_exits
) },
143 { "mmio_exits", VCPU_STAT(mmio_exits
) },
144 { "signal_exits", VCPU_STAT(signal_exits
) },
145 { "irq_window", VCPU_STAT(irq_window_exits
) },
146 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
147 { "halt_exits", VCPU_STAT(halt_exits
) },
148 { "halt_successful_poll", VCPU_STAT(halt_successful_poll
) },
149 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
150 { "hypercalls", VCPU_STAT(hypercalls
) },
151 { "request_irq", VCPU_STAT(request_irq_exits
) },
152 { "irq_exits", VCPU_STAT(irq_exits
) },
153 { "host_state_reload", VCPU_STAT(host_state_reload
) },
154 { "efer_reload", VCPU_STAT(efer_reload
) },
155 { "fpu_reload", VCPU_STAT(fpu_reload
) },
156 { "insn_emulation", VCPU_STAT(insn_emulation
) },
157 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
158 { "irq_injections", VCPU_STAT(irq_injections
) },
159 { "nmi_injections", VCPU_STAT(nmi_injections
) },
160 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
161 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
162 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
163 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
164 { "mmu_flooded", VM_STAT(mmu_flooded
) },
165 { "mmu_recycled", VM_STAT(mmu_recycled
) },
166 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
167 { "mmu_unsync", VM_STAT(mmu_unsync
) },
168 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
169 { "largepages", VM_STAT(lpages
) },
173 u64 __read_mostly host_xcr0
;
175 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
177 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
180 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
181 vcpu
->arch
.apf
.gfns
[i
] = ~0;
184 static void kvm_on_user_return(struct user_return_notifier
*urn
)
187 struct kvm_shared_msrs
*locals
188 = container_of(urn
, struct kvm_shared_msrs
, urn
);
189 struct kvm_shared_msr_values
*values
;
191 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
192 values
= &locals
->values
[slot
];
193 if (values
->host
!= values
->curr
) {
194 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
195 values
->curr
= values
->host
;
198 locals
->registered
= false;
199 user_return_notifier_unregister(urn
);
202 static void shared_msr_update(unsigned slot
, u32 msr
)
205 unsigned int cpu
= smp_processor_id();
206 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
208 /* only read, and nobody should modify it at this time,
209 * so don't need lock */
210 if (slot
>= shared_msrs_global
.nr
) {
211 printk(KERN_ERR
"kvm: invalid MSR slot!");
214 rdmsrl_safe(msr
, &value
);
215 smsr
->values
[slot
].host
= value
;
216 smsr
->values
[slot
].curr
= value
;
219 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
221 BUG_ON(slot
>= KVM_NR_SHARED_MSRS
);
222 if (slot
>= shared_msrs_global
.nr
)
223 shared_msrs_global
.nr
= slot
+ 1;
224 shared_msrs_global
.msrs
[slot
] = msr
;
225 /* we need ensured the shared_msr_global have been updated */
228 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
230 static void kvm_shared_msr_cpu_online(void)
234 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
235 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
238 int kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
240 unsigned int cpu
= smp_processor_id();
241 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
244 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
246 smsr
->values
[slot
].curr
= value
;
247 err
= wrmsrl_safe(shared_msrs_global
.msrs
[slot
], value
);
251 if (!smsr
->registered
) {
252 smsr
->urn
.on_user_return
= kvm_on_user_return
;
253 user_return_notifier_register(&smsr
->urn
);
254 smsr
->registered
= true;
258 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
260 static void drop_user_return_notifiers(void)
262 unsigned int cpu
= smp_processor_id();
263 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
265 if (smsr
->registered
)
266 kvm_on_user_return(&smsr
->urn
);
269 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
271 return vcpu
->arch
.apic_base
;
273 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
275 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
277 u64 old_state
= vcpu
->arch
.apic_base
&
278 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
279 u64 new_state
= msr_info
->data
&
280 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
281 u64 reserved_bits
= ((~0ULL) << cpuid_maxphyaddr(vcpu
)) |
282 0x2ff | (guest_cpuid_has_x2apic(vcpu
) ? 0 : X2APIC_ENABLE
);
284 if (!msr_info
->host_initiated
&&
285 ((msr_info
->data
& reserved_bits
) != 0 ||
286 new_state
== X2APIC_ENABLE
||
287 (new_state
== MSR_IA32_APICBASE_ENABLE
&&
288 old_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
)) ||
289 (new_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
) &&
293 kvm_lapic_set_base(vcpu
, msr_info
->data
);
296 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
298 asmlinkage __visible
void kvm_spurious_fault(void)
300 /* Fault while not rebooting. We want the trace. */
303 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
305 #define EXCPT_BENIGN 0
306 #define EXCPT_CONTRIBUTORY 1
309 static int exception_class(int vector
)
319 return EXCPT_CONTRIBUTORY
;
326 #define EXCPT_FAULT 0
328 #define EXCPT_ABORT 2
329 #define EXCPT_INTERRUPT 3
331 static int exception_type(int vector
)
335 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
336 return EXCPT_INTERRUPT
;
340 /* #DB is trap, as instruction watchpoints are handled elsewhere */
341 if (mask
& ((1 << DB_VECTOR
) | (1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
344 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
347 /* Reserved exceptions will result in fault */
351 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
352 unsigned nr
, bool has_error
, u32 error_code
,
358 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
360 if (!vcpu
->arch
.exception
.pending
) {
362 if (has_error
&& !is_protmode(vcpu
))
364 vcpu
->arch
.exception
.pending
= true;
365 vcpu
->arch
.exception
.has_error_code
= has_error
;
366 vcpu
->arch
.exception
.nr
= nr
;
367 vcpu
->arch
.exception
.error_code
= error_code
;
368 vcpu
->arch
.exception
.reinject
= reinject
;
372 /* to check exception */
373 prev_nr
= vcpu
->arch
.exception
.nr
;
374 if (prev_nr
== DF_VECTOR
) {
375 /* triple fault -> shutdown */
376 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
379 class1
= exception_class(prev_nr
);
380 class2
= exception_class(nr
);
381 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
382 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
383 /* generate double fault per SDM Table 5-5 */
384 vcpu
->arch
.exception
.pending
= true;
385 vcpu
->arch
.exception
.has_error_code
= true;
386 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
387 vcpu
->arch
.exception
.error_code
= 0;
389 /* replace previous exception with a new one in a hope
390 that instruction re-execution will regenerate lost
395 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
397 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
399 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
401 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
403 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
405 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
407 void kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
410 kvm_inject_gp(vcpu
, 0);
412 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
414 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
416 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
418 ++vcpu
->stat
.pf_guest
;
419 vcpu
->arch
.cr2
= fault
->address
;
420 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
422 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
424 static bool kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
426 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
427 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
429 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
431 return fault
->nested_page_fault
;
434 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
436 atomic_inc(&vcpu
->arch
.nmi_queued
);
437 kvm_make_request(KVM_REQ_NMI
, vcpu
);
439 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
441 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
443 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
445 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
447 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
449 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
451 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
454 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
455 * a #GP and return false.
457 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
459 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
461 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
464 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
466 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
468 if ((dr
!= 4 && dr
!= 5) || !kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
471 kvm_queue_exception(vcpu
, UD_VECTOR
);
474 EXPORT_SYMBOL_GPL(kvm_require_dr
);
477 * This function will be used to read from the physical memory of the currently
478 * running guest. The difference to kvm_read_guest_page is that this function
479 * can read from guest physical or from the guest's guest physical memory.
481 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
482 gfn_t ngfn
, void *data
, int offset
, int len
,
485 struct x86_exception exception
;
489 ngpa
= gfn_to_gpa(ngfn
);
490 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
, &exception
);
491 if (real_gfn
== UNMAPPED_GVA
)
494 real_gfn
= gpa_to_gfn(real_gfn
);
496 return kvm_read_guest_page(vcpu
->kvm
, real_gfn
, data
, offset
, len
);
498 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
500 static int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
501 void *data
, int offset
, int len
, u32 access
)
503 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
504 data
, offset
, len
, access
);
508 * Load the pae pdptrs. Return true is they are all valid.
510 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
512 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
513 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
516 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
518 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
519 offset
* sizeof(u64
), sizeof(pdpte
),
520 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
525 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
526 if (is_present_gpte(pdpte
[i
]) &&
527 (pdpte
[i
] & vcpu
->arch
.mmu
.rsvd_bits_mask
[0][2])) {
534 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
535 __set_bit(VCPU_EXREG_PDPTR
,
536 (unsigned long *)&vcpu
->arch
.regs_avail
);
537 __set_bit(VCPU_EXREG_PDPTR
,
538 (unsigned long *)&vcpu
->arch
.regs_dirty
);
543 EXPORT_SYMBOL_GPL(load_pdptrs
);
545 static bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
547 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
553 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
556 if (!test_bit(VCPU_EXREG_PDPTR
,
557 (unsigned long *)&vcpu
->arch
.regs_avail
))
560 gfn
= (kvm_read_cr3(vcpu
) & ~31u) >> PAGE_SHIFT
;
561 offset
= (kvm_read_cr3(vcpu
) & ~31u) & (PAGE_SIZE
- 1);
562 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
563 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
566 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
572 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
574 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
575 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
;
580 if (cr0
& 0xffffffff00000000UL
)
584 cr0
&= ~CR0_RESERVED_BITS
;
586 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
589 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
592 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
594 if ((vcpu
->arch
.efer
& EFER_LME
)) {
599 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
604 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
609 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
612 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
614 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
615 kvm_clear_async_pf_completion_queue(vcpu
);
616 kvm_async_pf_hash_reset(vcpu
);
619 if ((cr0
^ old_cr0
) & update_bits
)
620 kvm_mmu_reset_context(vcpu
);
623 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
625 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
627 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
629 EXPORT_SYMBOL_GPL(kvm_lmsw
);
631 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
633 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
634 !vcpu
->guest_xcr0_loaded
) {
635 /* kvm_set_xcr() also depends on this */
636 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
637 vcpu
->guest_xcr0_loaded
= 1;
641 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
643 if (vcpu
->guest_xcr0_loaded
) {
644 if (vcpu
->arch
.xcr0
!= host_xcr0
)
645 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
646 vcpu
->guest_xcr0_loaded
= 0;
650 static int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
653 u64 old_xcr0
= vcpu
->arch
.xcr0
;
656 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
657 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
659 if (!(xcr0
& XSTATE_FP
))
661 if ((xcr0
& XSTATE_YMM
) && !(xcr0
& XSTATE_SSE
))
665 * Do not allow the guest to set bits that we do not support
666 * saving. However, xcr0 bit 0 is always set, even if the
667 * emulated CPU does not support XSAVE (see fx_init).
669 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XSTATE_FP
;
670 if (xcr0
& ~valid_bits
)
673 if ((!(xcr0
& XSTATE_BNDREGS
)) != (!(xcr0
& XSTATE_BNDCSR
)))
676 if (xcr0
& XSTATE_AVX512
) {
677 if (!(xcr0
& XSTATE_YMM
))
679 if ((xcr0
& XSTATE_AVX512
) != XSTATE_AVX512
)
682 kvm_put_guest_xcr0(vcpu
);
683 vcpu
->arch
.xcr0
= xcr0
;
685 if ((xcr0
^ old_xcr0
) & XSTATE_EXTEND_MASK
)
686 kvm_update_cpuid(vcpu
);
690 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
692 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 ||
693 __kvm_set_xcr(vcpu
, index
, xcr
)) {
694 kvm_inject_gp(vcpu
, 0);
699 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
701 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
703 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
704 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
|
705 X86_CR4_SMEP
| X86_CR4_SMAP
;
707 if (cr4
& CR4_RESERVED_BITS
)
710 if (!guest_cpuid_has_xsave(vcpu
) && (cr4
& X86_CR4_OSXSAVE
))
713 if (!guest_cpuid_has_smep(vcpu
) && (cr4
& X86_CR4_SMEP
))
716 if (!guest_cpuid_has_smap(vcpu
) && (cr4
& X86_CR4_SMAP
))
719 if (!guest_cpuid_has_fsgsbase(vcpu
) && (cr4
& X86_CR4_FSGSBASE
))
722 if (is_long_mode(vcpu
)) {
723 if (!(cr4
& X86_CR4_PAE
))
725 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
726 && ((cr4
^ old_cr4
) & pdptr_bits
)
727 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
731 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
732 if (!guest_cpuid_has_pcid(vcpu
))
735 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
736 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
740 if (kvm_x86_ops
->set_cr4(vcpu
, cr4
))
743 if (((cr4
^ old_cr4
) & pdptr_bits
) ||
744 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
745 kvm_mmu_reset_context(vcpu
);
747 if ((cr4
^ old_cr4
) & X86_CR4_OSXSAVE
)
748 kvm_update_cpuid(vcpu
);
752 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
754 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
757 cr3
&= ~CR3_PCID_INVD
;
760 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
761 kvm_mmu_sync_roots(vcpu
);
762 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
766 if (is_long_mode(vcpu
)) {
767 if (cr3
& CR3_L_MODE_RESERVED_BITS
)
769 } else if (is_pae(vcpu
) && is_paging(vcpu
) &&
770 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
773 vcpu
->arch
.cr3
= cr3
;
774 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
775 kvm_mmu_new_cr3(vcpu
);
778 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
780 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
782 if (cr8
& CR8_RESERVED_BITS
)
784 if (irqchip_in_kernel(vcpu
->kvm
))
785 kvm_lapic_set_tpr(vcpu
, cr8
);
787 vcpu
->arch
.cr8
= cr8
;
790 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
792 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
794 if (irqchip_in_kernel(vcpu
->kvm
))
795 return kvm_lapic_get_cr8(vcpu
);
797 return vcpu
->arch
.cr8
;
799 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
801 static void kvm_update_dr0123(struct kvm_vcpu
*vcpu
)
805 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
806 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
807 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
808 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_RELOAD
;
812 static void kvm_update_dr6(struct kvm_vcpu
*vcpu
)
814 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
815 kvm_x86_ops
->set_dr6(vcpu
, vcpu
->arch
.dr6
);
818 static void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
822 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
823 dr7
= vcpu
->arch
.guest_debug_dr7
;
825 dr7
= vcpu
->arch
.dr7
;
826 kvm_x86_ops
->set_dr7(vcpu
, dr7
);
827 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
828 if (dr7
& DR7_BP_EN_MASK
)
829 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
832 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
834 u64 fixed
= DR6_FIXED_1
;
836 if (!guest_cpuid_has_rtm(vcpu
))
841 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
845 vcpu
->arch
.db
[dr
] = val
;
846 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
847 vcpu
->arch
.eff_db
[dr
] = val
;
852 if (val
& 0xffffffff00000000ULL
)
854 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
855 kvm_update_dr6(vcpu
);
860 if (val
& 0xffffffff00000000ULL
)
862 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
863 kvm_update_dr7(vcpu
);
870 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
872 if (__kvm_set_dr(vcpu
, dr
, val
)) {
873 kvm_inject_gp(vcpu
, 0);
878 EXPORT_SYMBOL_GPL(kvm_set_dr
);
880 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
884 *val
= vcpu
->arch
.db
[dr
];
889 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
890 *val
= vcpu
->arch
.dr6
;
892 *val
= kvm_x86_ops
->get_dr6(vcpu
);
897 *val
= vcpu
->arch
.dr7
;
902 EXPORT_SYMBOL_GPL(kvm_get_dr
);
904 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
906 u32 ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
910 err
= kvm_pmu_read_pmc(vcpu
, ecx
, &data
);
913 kvm_register_write(vcpu
, VCPU_REGS_RAX
, (u32
)data
);
914 kvm_register_write(vcpu
, VCPU_REGS_RDX
, data
>> 32);
917 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
920 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
921 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
923 * This list is modified at module load time to reflect the
924 * capabilities of the host cpu. This capabilities test skips MSRs that are
925 * kvm-specific. Those are put in the beginning of the list.
928 #define KVM_SAVE_MSRS_BEGIN 12
929 static u32 msrs_to_save
[] = {
930 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
931 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
932 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
933 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
934 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
936 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
939 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
941 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
942 MSR_IA32_FEATURE_CONTROL
, MSR_IA32_BNDCFGS
945 static unsigned num_msrs_to_save
;
947 static const u32 emulated_msrs
[] = {
949 MSR_IA32_TSCDEADLINE
,
950 MSR_IA32_MISC_ENABLE
,
955 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
957 if (efer
& efer_reserved_bits
)
960 if (efer
& EFER_FFXSR
) {
961 struct kvm_cpuid_entry2
*feat
;
963 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
964 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
)))
968 if (efer
& EFER_SVME
) {
969 struct kvm_cpuid_entry2
*feat
;
971 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
972 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
)))
978 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
980 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
982 u64 old_efer
= vcpu
->arch
.efer
;
984 if (!kvm_valid_efer(vcpu
, efer
))
988 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
992 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
994 kvm_x86_ops
->set_efer(vcpu
, efer
);
996 /* Update reserved bits */
997 if ((efer
^ old_efer
) & EFER_NX
)
998 kvm_mmu_reset_context(vcpu
);
1003 void kvm_enable_efer_bits(u64 mask
)
1005 efer_reserved_bits
&= ~mask
;
1007 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1010 * Writes msr value into into the appropriate "register".
1011 * Returns 0 on success, non-0 otherwise.
1012 * Assumes vcpu_load() was already called.
1014 int kvm_set_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1016 switch (msr
->index
) {
1019 case MSR_KERNEL_GS_BASE
:
1022 if (is_noncanonical_address(msr
->data
))
1025 case MSR_IA32_SYSENTER_EIP
:
1026 case MSR_IA32_SYSENTER_ESP
:
1028 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1029 * non-canonical address is written on Intel but not on
1030 * AMD (which ignores the top 32-bits, because it does
1031 * not implement 64-bit SYSENTER).
1033 * 64-bit code should hence be able to write a non-canonical
1034 * value on AMD. Making the address canonical ensures that
1035 * vmentry does not fail on Intel after writing a non-canonical
1036 * value, and that something deterministic happens if the guest
1037 * invokes 64-bit SYSENTER.
1039 msr
->data
= get_canonical(msr
->data
);
1041 return kvm_x86_ops
->set_msr(vcpu
, msr
);
1043 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1046 * Adapt set_msr() to msr_io()'s calling convention
1048 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1050 struct msr_data msr
;
1054 msr
.host_initiated
= true;
1055 return kvm_set_msr(vcpu
, &msr
);
1058 #ifdef CONFIG_X86_64
1059 struct pvclock_gtod_data
{
1062 struct { /* extract of a clocksource struct */
1074 static struct pvclock_gtod_data pvclock_gtod_data
;
1076 static void update_pvclock_gtod(struct timekeeper
*tk
)
1078 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
1081 boot_ns
= ktime_to_ns(ktime_add(tk
->tkr_mono
.base
, tk
->offs_boot
));
1083 write_seqcount_begin(&vdata
->seq
);
1085 /* copy pvclock gtod data */
1086 vdata
->clock
.vclock_mode
= tk
->tkr_mono
.clock
->archdata
.vclock_mode
;
1087 vdata
->clock
.cycle_last
= tk
->tkr_mono
.cycle_last
;
1088 vdata
->clock
.mask
= tk
->tkr_mono
.mask
;
1089 vdata
->clock
.mult
= tk
->tkr_mono
.mult
;
1090 vdata
->clock
.shift
= tk
->tkr_mono
.shift
;
1092 vdata
->boot_ns
= boot_ns
;
1093 vdata
->nsec_base
= tk
->tkr_mono
.xtime_nsec
;
1095 write_seqcount_end(&vdata
->seq
);
1099 void kvm_set_pending_timer(struct kvm_vcpu
*vcpu
)
1102 * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1103 * vcpu_enter_guest. This function is only called from
1104 * the physical CPU that is running vcpu.
1106 kvm_make_request(KVM_REQ_PENDING_TIMER
, vcpu
);
1109 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
1113 struct pvclock_wall_clock wc
;
1114 struct timespec boot
;
1119 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1124 ++version
; /* first time write, random junk */
1128 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1131 * The guest calculates current wall clock time by adding
1132 * system time (updated by kvm_guest_time_update below) to the
1133 * wall clock specified here. guest system time equals host
1134 * system time for us, thus we must fill in host boot time here.
1138 if (kvm
->arch
.kvmclock_offset
) {
1139 struct timespec ts
= ns_to_timespec(kvm
->arch
.kvmclock_offset
);
1140 boot
= timespec_sub(boot
, ts
);
1142 wc
.sec
= boot
.tv_sec
;
1143 wc
.nsec
= boot
.tv_nsec
;
1144 wc
.version
= version
;
1146 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
1149 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1152 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
1154 uint32_t quotient
, remainder
;
1156 /* Don't try to replace with do_div(), this one calculates
1157 * "(dividend << 32) / divisor" */
1159 : "=a" (quotient
), "=d" (remainder
)
1160 : "0" (0), "1" (dividend
), "r" (divisor
) );
1164 static void kvm_get_time_scale(uint32_t scaled_khz
, uint32_t base_khz
,
1165 s8
*pshift
, u32
*pmultiplier
)
1172 tps64
= base_khz
* 1000LL;
1173 scaled64
= scaled_khz
* 1000LL;
1174 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
1179 tps32
= (uint32_t)tps64
;
1180 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
1181 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
1189 *pmultiplier
= div_frac(scaled64
, tps32
);
1191 pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1192 __func__
, base_khz
, scaled_khz
, shift
, *pmultiplier
);
1195 static inline u64
get_kernel_ns(void)
1197 return ktime_get_boot_ns();
1200 #ifdef CONFIG_X86_64
1201 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
1204 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
1205 static unsigned long max_tsc_khz
;
1207 static inline u64
nsec_to_cycles(struct kvm_vcpu
*vcpu
, u64 nsec
)
1209 return pvclock_scale_delta(nsec
, vcpu
->arch
.virtual_tsc_mult
,
1210 vcpu
->arch
.virtual_tsc_shift
);
1213 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
1215 u64 v
= (u64
)khz
* (1000000 + ppm
);
1220 static void kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 this_tsc_khz
)
1222 u32 thresh_lo
, thresh_hi
;
1223 int use_scaling
= 0;
1225 /* tsc_khz can be zero if TSC calibration fails */
1226 if (this_tsc_khz
== 0)
1229 /* Compute a scale to convert nanoseconds in TSC cycles */
1230 kvm_get_time_scale(this_tsc_khz
, NSEC_PER_SEC
/ 1000,
1231 &vcpu
->arch
.virtual_tsc_shift
,
1232 &vcpu
->arch
.virtual_tsc_mult
);
1233 vcpu
->arch
.virtual_tsc_khz
= this_tsc_khz
;
1236 * Compute the variation in TSC rate which is acceptable
1237 * within the range of tolerance and decide if the
1238 * rate being applied is within that bounds of the hardware
1239 * rate. If so, no scaling or compensation need be done.
1241 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
1242 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
1243 if (this_tsc_khz
< thresh_lo
|| this_tsc_khz
> thresh_hi
) {
1244 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz
, thresh_lo
, thresh_hi
);
1247 kvm_x86_ops
->set_tsc_khz(vcpu
, this_tsc_khz
, use_scaling
);
1250 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1252 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
1253 vcpu
->arch
.virtual_tsc_mult
,
1254 vcpu
->arch
.virtual_tsc_shift
);
1255 tsc
+= vcpu
->arch
.this_tsc_write
;
1259 static void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
1261 #ifdef CONFIG_X86_64
1263 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
1264 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1266 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1267 atomic_read(&vcpu
->kvm
->online_vcpus
));
1270 * Once the masterclock is enabled, always perform request in
1271 * order to update it.
1273 * In order to enable masterclock, the host clocksource must be TSC
1274 * and the vcpus need to have matched TSCs. When that happens,
1275 * perform request to enable masterclock.
1277 if (ka
->use_master_clock
||
1278 (gtod
->clock
.vclock_mode
== VCLOCK_TSC
&& vcpus_matched
))
1279 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
1281 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
1282 atomic_read(&vcpu
->kvm
->online_vcpus
),
1283 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
1287 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu
*vcpu
, s64 offset
)
1289 u64 curr_offset
= kvm_x86_ops
->read_tsc_offset(vcpu
);
1290 vcpu
->arch
.ia32_tsc_adjust_msr
+= offset
- curr_offset
;
1293 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1295 struct kvm
*kvm
= vcpu
->kvm
;
1296 u64 offset
, ns
, elapsed
;
1297 unsigned long flags
;
1300 bool already_matched
;
1301 u64 data
= msr
->data
;
1303 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1304 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
, data
);
1305 ns
= get_kernel_ns();
1306 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1308 if (vcpu
->arch
.virtual_tsc_khz
) {
1311 /* n.b - signed multiplication and division required */
1312 usdiff
= data
- kvm
->arch
.last_tsc_write
;
1313 #ifdef CONFIG_X86_64
1314 usdiff
= (usdiff
* 1000) / vcpu
->arch
.virtual_tsc_khz
;
1316 /* do_div() only does unsigned */
1317 asm("1: idivl %[divisor]\n"
1318 "2: xor %%edx, %%edx\n"
1319 " movl $0, %[faulted]\n"
1321 ".section .fixup,\"ax\"\n"
1322 "4: movl $1, %[faulted]\n"
1326 _ASM_EXTABLE(1b
, 4b
)
1328 : "=A"(usdiff
), [faulted
] "=r" (faulted
)
1329 : "A"(usdiff
* 1000), [divisor
] "rm"(vcpu
->arch
.virtual_tsc_khz
));
1332 do_div(elapsed
, 1000);
1337 /* idivl overflow => difference is larger than USEC_PER_SEC */
1339 usdiff
= USEC_PER_SEC
;
1341 usdiff
= USEC_PER_SEC
; /* disable TSC match window below */
1344 * Special case: TSC write with a small delta (1 second) of virtual
1345 * cycle time against real time is interpreted as an attempt to
1346 * synchronize the CPU.
1348 * For a reliable TSC, we can match TSC offsets, and for an unstable
1349 * TSC, we add elapsed time in this computation. We could let the
1350 * compensation code attempt to catch up if we fall behind, but
1351 * it's better to try to match offsets from the beginning.
1353 if (usdiff
< USEC_PER_SEC
&&
1354 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
1355 if (!check_tsc_unstable()) {
1356 offset
= kvm
->arch
.cur_tsc_offset
;
1357 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1359 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
1361 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
, data
);
1362 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1365 already_matched
= (vcpu
->arch
.this_tsc_generation
== kvm
->arch
.cur_tsc_generation
);
1368 * We split periods of matched TSC writes into generations.
1369 * For each generation, we track the original measured
1370 * nanosecond time, offset, and write, so if TSCs are in
1371 * sync, we can match exact offset, and if not, we can match
1372 * exact software computation in compute_guest_tsc()
1374 * These values are tracked in kvm->arch.cur_xxx variables.
1376 kvm
->arch
.cur_tsc_generation
++;
1377 kvm
->arch
.cur_tsc_nsec
= ns
;
1378 kvm
->arch
.cur_tsc_write
= data
;
1379 kvm
->arch
.cur_tsc_offset
= offset
;
1381 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1382 kvm
->arch
.cur_tsc_generation
, data
);
1386 * We also track th most recent recorded KHZ, write and time to
1387 * allow the matching interval to be extended at each write.
1389 kvm
->arch
.last_tsc_nsec
= ns
;
1390 kvm
->arch
.last_tsc_write
= data
;
1391 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
1393 vcpu
->arch
.last_guest_tsc
= data
;
1395 /* Keep track of which generation this VCPU has synchronized to */
1396 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
1397 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
1398 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
1400 if (guest_cpuid_has_tsc_adjust(vcpu
) && !msr
->host_initiated
)
1401 update_ia32_tsc_adjust_msr(vcpu
, offset
);
1402 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1403 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1405 spin_lock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1407 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
1408 } else if (!already_matched
) {
1409 kvm
->arch
.nr_vcpus_matched_tsc
++;
1412 kvm_track_tsc_matching(vcpu
);
1413 spin_unlock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1416 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1418 #ifdef CONFIG_X86_64
1420 static cycle_t
read_tsc(void)
1426 * Empirically, a fence (of type that depends on the CPU)
1427 * before rdtsc is enough to ensure that rdtsc is ordered
1428 * with respect to loads. The various CPU manuals are unclear
1429 * as to whether rdtsc can be reordered with later loads,
1430 * but no one has ever seen it happen.
1433 ret
= (cycle_t
)vget_cycles();
1435 last
= pvclock_gtod_data
.clock
.cycle_last
;
1437 if (likely(ret
>= last
))
1441 * GCC likes to generate cmov here, but this branch is extremely
1442 * predictable (it's just a funciton of time and the likely is
1443 * very likely) and there's a data dependence, so force GCC
1444 * to generate a branch instead. I don't barrier() because
1445 * we don't actually need a barrier, and if this function
1446 * ever gets inlined it will generate worse code.
1452 static inline u64
vgettsc(cycle_t
*cycle_now
)
1455 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1457 *cycle_now
= read_tsc();
1459 v
= (*cycle_now
- gtod
->clock
.cycle_last
) & gtod
->clock
.mask
;
1460 return v
* gtod
->clock
.mult
;
1463 static int do_monotonic_boot(s64
*t
, cycle_t
*cycle_now
)
1465 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1471 seq
= read_seqcount_begin(>od
->seq
);
1472 mode
= gtod
->clock
.vclock_mode
;
1473 ns
= gtod
->nsec_base
;
1474 ns
+= vgettsc(cycle_now
);
1475 ns
>>= gtod
->clock
.shift
;
1476 ns
+= gtod
->boot_ns
;
1477 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1483 /* returns true if host is using tsc clocksource */
1484 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, cycle_t
*cycle_now
)
1486 /* checked again under seqlock below */
1487 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1490 return do_monotonic_boot(kernel_ns
, cycle_now
) == VCLOCK_TSC
;
1496 * Assuming a stable TSC across physical CPUS, and a stable TSC
1497 * across virtual CPUs, the following condition is possible.
1498 * Each numbered line represents an event visible to both
1499 * CPUs at the next numbered event.
1501 * "timespecX" represents host monotonic time. "tscX" represents
1504 * VCPU0 on CPU0 | VCPU1 on CPU1
1506 * 1. read timespec0,tsc0
1507 * 2. | timespec1 = timespec0 + N
1509 * 3. transition to guest | transition to guest
1510 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1511 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1512 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1514 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1517 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1519 * - 0 < N - M => M < N
1521 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1522 * always the case (the difference between two distinct xtime instances
1523 * might be smaller then the difference between corresponding TSC reads,
1524 * when updating guest vcpus pvclock areas).
1526 * To avoid that problem, do not allow visibility of distinct
1527 * system_timestamp/tsc_timestamp values simultaneously: use a master
1528 * copy of host monotonic time values. Update that master copy
1531 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1535 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
1537 #ifdef CONFIG_X86_64
1538 struct kvm_arch
*ka
= &kvm
->arch
;
1540 bool host_tsc_clocksource
, vcpus_matched
;
1542 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1543 atomic_read(&kvm
->online_vcpus
));
1546 * If the host uses TSC clock, then passthrough TSC as stable
1549 host_tsc_clocksource
= kvm_get_time_and_clockread(
1550 &ka
->master_kernel_ns
,
1551 &ka
->master_cycle_now
);
1553 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
1554 && !backwards_tsc_observed
1555 && !ka
->boot_vcpu_runs_old_kvmclock
;
1557 if (ka
->use_master_clock
)
1558 atomic_set(&kvm_guest_has_master_clock
, 1);
1560 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
1561 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
1566 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
1568 #ifdef CONFIG_X86_64
1570 struct kvm_vcpu
*vcpu
;
1571 struct kvm_arch
*ka
= &kvm
->arch
;
1573 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1574 kvm_make_mclock_inprogress_request(kvm
);
1575 /* no guest entries from this point */
1576 pvclock_update_vm_gtod_copy(kvm
);
1578 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1579 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1581 /* guest entries allowed */
1582 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1583 clear_bit(KVM_REQ_MCLOCK_INPROGRESS
, &vcpu
->requests
);
1585 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1589 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1591 unsigned long flags
, this_tsc_khz
;
1592 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1593 struct kvm_arch
*ka
= &v
->kvm
->arch
;
1595 u64 tsc_timestamp
, host_tsc
;
1596 struct pvclock_vcpu_time_info guest_hv_clock
;
1598 bool use_master_clock
;
1604 * If the host uses TSC clock, then passthrough TSC as stable
1607 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1608 use_master_clock
= ka
->use_master_clock
;
1609 if (use_master_clock
) {
1610 host_tsc
= ka
->master_cycle_now
;
1611 kernel_ns
= ka
->master_kernel_ns
;
1613 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1615 /* Keep irq disabled to prevent changes to the clock */
1616 local_irq_save(flags
);
1617 this_tsc_khz
= __this_cpu_read(cpu_tsc_khz
);
1618 if (unlikely(this_tsc_khz
== 0)) {
1619 local_irq_restore(flags
);
1620 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1623 if (!use_master_clock
) {
1624 host_tsc
= native_read_tsc();
1625 kernel_ns
= get_kernel_ns();
1628 tsc_timestamp
= kvm_x86_ops
->read_l1_tsc(v
, host_tsc
);
1631 * We may have to catch up the TSC to match elapsed wall clock
1632 * time for two reasons, even if kvmclock is used.
1633 * 1) CPU could have been running below the maximum TSC rate
1634 * 2) Broken TSC compensation resets the base at each VCPU
1635 * entry to avoid unknown leaps of TSC even when running
1636 * again on the same CPU. This may cause apparent elapsed
1637 * time to disappear, and the guest to stand still or run
1640 if (vcpu
->tsc_catchup
) {
1641 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1642 if (tsc
> tsc_timestamp
) {
1643 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
1644 tsc_timestamp
= tsc
;
1648 local_irq_restore(flags
);
1650 if (!vcpu
->pv_time_enabled
)
1653 if (unlikely(vcpu
->hw_tsc_khz
!= this_tsc_khz
)) {
1654 kvm_get_time_scale(NSEC_PER_SEC
/ 1000, this_tsc_khz
,
1655 &vcpu
->hv_clock
.tsc_shift
,
1656 &vcpu
->hv_clock
.tsc_to_system_mul
);
1657 vcpu
->hw_tsc_khz
= this_tsc_khz
;
1660 /* With all the info we got, fill in the values */
1661 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
1662 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
1663 vcpu
->last_guest_tsc
= tsc_timestamp
;
1665 if (unlikely(kvm_read_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1666 &guest_hv_clock
, sizeof(guest_hv_clock
))))
1669 /* This VCPU is paused, but it's legal for a guest to read another
1670 * VCPU's kvmclock, so we really have to follow the specification where
1671 * it says that version is odd if data is being modified, and even after
1674 * Version field updates must be kept separate. This is because
1675 * kvm_write_guest_cached might use a "rep movs" instruction, and
1676 * writes within a string instruction are weakly ordered. So there
1677 * are three writes overall.
1679 * As a small optimization, only write the version field in the first
1680 * and third write. The vcpu->pv_time cache is still valid, because the
1681 * version field is the first in the struct.
1683 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info
, version
) != 0);
1685 vcpu
->hv_clock
.version
= guest_hv_clock
.version
+ 1;
1686 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1688 sizeof(vcpu
->hv_clock
.version
));
1692 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1693 pvclock_flags
= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
1695 if (vcpu
->pvclock_set_guest_stopped_request
) {
1696 pvclock_flags
|= PVCLOCK_GUEST_STOPPED
;
1697 vcpu
->pvclock_set_guest_stopped_request
= false;
1700 /* If the host uses TSC clocksource, then it is stable */
1701 if (use_master_clock
)
1702 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
1704 vcpu
->hv_clock
.flags
= pvclock_flags
;
1706 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
1708 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1710 sizeof(vcpu
->hv_clock
));
1714 vcpu
->hv_clock
.version
++;
1715 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1717 sizeof(vcpu
->hv_clock
.version
));
1722 * kvmclock updates which are isolated to a given vcpu, such as
1723 * vcpu->cpu migration, should not allow system_timestamp from
1724 * the rest of the vcpus to remain static. Otherwise ntp frequency
1725 * correction applies to one vcpu's system_timestamp but not
1728 * So in those cases, request a kvmclock update for all vcpus.
1729 * We need to rate-limit these requests though, as they can
1730 * considerably slow guests that have a large number of vcpus.
1731 * The time for a remote vcpu to update its kvmclock is bound
1732 * by the delay we use to rate-limit the updates.
1735 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1737 static void kvmclock_update_fn(struct work_struct
*work
)
1740 struct delayed_work
*dwork
= to_delayed_work(work
);
1741 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1742 kvmclock_update_work
);
1743 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1744 struct kvm_vcpu
*vcpu
;
1746 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
1747 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1748 kvm_vcpu_kick(vcpu
);
1752 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
1754 struct kvm
*kvm
= v
->kvm
;
1756 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1757 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
1758 KVMCLOCK_UPDATE_DELAY
);
1761 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1763 static void kvmclock_sync_fn(struct work_struct
*work
)
1765 struct delayed_work
*dwork
= to_delayed_work(work
);
1766 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1767 kvmclock_sync_work
);
1768 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1770 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
1771 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
1772 KVMCLOCK_SYNC_PERIOD
);
1775 static bool msr_mtrr_valid(unsigned msr
)
1778 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR
- 1:
1779 case MSR_MTRRfix64K_00000
:
1780 case MSR_MTRRfix16K_80000
:
1781 case MSR_MTRRfix16K_A0000
:
1782 case MSR_MTRRfix4K_C0000
:
1783 case MSR_MTRRfix4K_C8000
:
1784 case MSR_MTRRfix4K_D0000
:
1785 case MSR_MTRRfix4K_D8000
:
1786 case MSR_MTRRfix4K_E0000
:
1787 case MSR_MTRRfix4K_E8000
:
1788 case MSR_MTRRfix4K_F0000
:
1789 case MSR_MTRRfix4K_F8000
:
1790 case MSR_MTRRdefType
:
1791 case MSR_IA32_CR_PAT
:
1799 static bool valid_pat_type(unsigned t
)
1801 return t
< 8 && (1 << t
) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1804 static bool valid_mtrr_type(unsigned t
)
1806 return t
< 8 && (1 << t
) & 0x73; /* 0, 1, 4, 5, 6 */
1809 bool kvm_mtrr_valid(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1814 if (!msr_mtrr_valid(msr
))
1817 if (msr
== MSR_IA32_CR_PAT
) {
1818 for (i
= 0; i
< 8; i
++)
1819 if (!valid_pat_type((data
>> (i
* 8)) & 0xff))
1822 } else if (msr
== MSR_MTRRdefType
) {
1825 return valid_mtrr_type(data
& 0xff);
1826 } else if (msr
>= MSR_MTRRfix64K_00000
&& msr
<= MSR_MTRRfix4K_F8000
) {
1827 for (i
= 0; i
< 8 ; i
++)
1828 if (!valid_mtrr_type((data
>> (i
* 8)) & 0xff))
1833 /* variable MTRRs */
1834 WARN_ON(!(msr
>= 0x200 && msr
< 0x200 + 2 * KVM_NR_VAR_MTRR
));
1836 mask
= (~0ULL) << cpuid_maxphyaddr(vcpu
);
1837 if ((msr
& 1) == 0) {
1839 if (!valid_mtrr_type(data
& 0xff))
1846 kvm_inject_gp(vcpu
, 0);
1852 EXPORT_SYMBOL_GPL(kvm_mtrr_valid
);
1854 static void update_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
)
1856 struct mtrr_state_type
*mtrr_state
= &vcpu
->arch
.mtrr_state
;
1857 unsigned char mtrr_enabled
= mtrr_state
->enabled
;
1858 gfn_t start
, end
, mask
;
1860 bool is_fixed
= true;
1862 if (msr
== MSR_IA32_CR_PAT
|| !tdp_enabled
||
1863 !kvm_arch_has_noncoherent_dma(vcpu
->kvm
))
1866 if (!(mtrr_enabled
& 0x2) && msr
!= MSR_MTRRdefType
)
1870 case MSR_MTRRfix64K_00000
:
1874 case MSR_MTRRfix16K_80000
:
1878 case MSR_MTRRfix16K_A0000
:
1882 case MSR_MTRRfix4K_C0000
... MSR_MTRRfix4K_F8000
:
1883 index
= msr
- MSR_MTRRfix4K_C0000
;
1884 start
= 0xc0000 + index
* (32 << 10);
1885 end
= start
+ (32 << 10);
1887 case MSR_MTRRdefType
:
1893 /* variable range MTRRs. */
1895 index
= (msr
- 0x200) / 2;
1896 start
= (((u64
)mtrr_state
->var_ranges
[index
].base_hi
) << 32) +
1897 (mtrr_state
->var_ranges
[index
].base_lo
& PAGE_MASK
);
1898 mask
= (((u64
)mtrr_state
->var_ranges
[index
].mask_hi
) << 32) +
1899 (mtrr_state
->var_ranges
[index
].mask_lo
& PAGE_MASK
);
1900 mask
|= ~0ULL << cpuid_maxphyaddr(vcpu
);
1902 end
= ((start
& mask
) | ~mask
) + 1;
1905 if (is_fixed
&& !(mtrr_enabled
& 0x1))
1908 kvm_zap_gfn_range(vcpu
->kvm
, gpa_to_gfn(start
), gpa_to_gfn(end
));
1911 static int set_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1913 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
1915 if (!kvm_mtrr_valid(vcpu
, msr
, data
))
1918 if (msr
== MSR_MTRRdefType
) {
1919 vcpu
->arch
.mtrr_state
.def_type
= data
;
1920 vcpu
->arch
.mtrr_state
.enabled
= (data
& 0xc00) >> 10;
1921 } else if (msr
== MSR_MTRRfix64K_00000
)
1923 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
1924 p
[1 + msr
- MSR_MTRRfix16K_80000
] = data
;
1925 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
1926 p
[3 + msr
- MSR_MTRRfix4K_C0000
] = data
;
1927 else if (msr
== MSR_IA32_CR_PAT
)
1928 vcpu
->arch
.pat
= data
;
1929 else { /* Variable MTRRs */
1930 int idx
, is_mtrr_mask
;
1933 idx
= (msr
- 0x200) / 2;
1934 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
1937 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
1940 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
1944 update_mtrr(vcpu
, msr
);
1948 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1950 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1951 unsigned bank_num
= mcg_cap
& 0xff;
1954 case MSR_IA32_MCG_STATUS
:
1955 vcpu
->arch
.mcg_status
= data
;
1957 case MSR_IA32_MCG_CTL
:
1958 if (!(mcg_cap
& MCG_CTL_P
))
1960 if (data
!= 0 && data
!= ~(u64
)0)
1962 vcpu
->arch
.mcg_ctl
= data
;
1965 if (msr
>= MSR_IA32_MC0_CTL
&&
1966 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
1967 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1968 /* only 0 or all 1s can be written to IA32_MCi_CTL
1969 * some Linux kernels though clear bit 10 in bank 4 to
1970 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1971 * this to avoid an uncatched #GP in the guest
1973 if ((offset
& 0x3) == 0 &&
1974 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
1976 vcpu
->arch
.mce_banks
[offset
] = data
;
1984 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
1986 struct kvm
*kvm
= vcpu
->kvm
;
1987 int lm
= is_long_mode(vcpu
);
1988 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
1989 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
1990 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
1991 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
1992 u32 page_num
= data
& ~PAGE_MASK
;
1993 u64 page_addr
= data
& PAGE_MASK
;
1998 if (page_num
>= blob_size
)
2001 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
2006 if (kvm_write_guest(kvm
, page_addr
, page
, PAGE_SIZE
))
2015 static bool kvm_hv_hypercall_enabled(struct kvm
*kvm
)
2017 return kvm
->arch
.hv_hypercall
& HV_X64_MSR_HYPERCALL_ENABLE
;
2020 static bool kvm_hv_msr_partition_wide(u32 msr
)
2024 case HV_X64_MSR_GUEST_OS_ID
:
2025 case HV_X64_MSR_HYPERCALL
:
2026 case HV_X64_MSR_REFERENCE_TSC
:
2027 case HV_X64_MSR_TIME_REF_COUNT
:
2035 static int set_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
2037 struct kvm
*kvm
= vcpu
->kvm
;
2040 case HV_X64_MSR_GUEST_OS_ID
:
2041 kvm
->arch
.hv_guest_os_id
= data
;
2042 /* setting guest os id to zero disables hypercall page */
2043 if (!kvm
->arch
.hv_guest_os_id
)
2044 kvm
->arch
.hv_hypercall
&= ~HV_X64_MSR_HYPERCALL_ENABLE
;
2046 case HV_X64_MSR_HYPERCALL
: {
2051 /* if guest os id is not set hypercall should remain disabled */
2052 if (!kvm
->arch
.hv_guest_os_id
)
2054 if (!(data
& HV_X64_MSR_HYPERCALL_ENABLE
)) {
2055 kvm
->arch
.hv_hypercall
= data
;
2058 gfn
= data
>> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT
;
2059 addr
= gfn_to_hva(kvm
, gfn
);
2060 if (kvm_is_error_hva(addr
))
2062 kvm_x86_ops
->patch_hypercall(vcpu
, instructions
);
2063 ((unsigned char *)instructions
)[3] = 0xc3; /* ret */
2064 if (__copy_to_user((void __user
*)addr
, instructions
, 4))
2066 kvm
->arch
.hv_hypercall
= data
;
2067 mark_page_dirty(kvm
, gfn
);
2070 case HV_X64_MSR_REFERENCE_TSC
: {
2072 HV_REFERENCE_TSC_PAGE tsc_ref
;
2073 memset(&tsc_ref
, 0, sizeof(tsc_ref
));
2074 kvm
->arch
.hv_tsc_page
= data
;
2075 if (!(data
& HV_X64_MSR_TSC_REFERENCE_ENABLE
))
2077 gfn
= data
>> HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT
;
2078 if (kvm_write_guest(kvm
, gfn
<< HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT
,
2079 &tsc_ref
, sizeof(tsc_ref
)))
2081 mark_page_dirty(kvm
, gfn
);
2085 vcpu_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
2086 "data 0x%llx\n", msr
, data
);
2092 static int set_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
2095 case HV_X64_MSR_APIC_ASSIST_PAGE
: {
2099 if (!(data
& HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE
)) {
2100 vcpu
->arch
.hv_vapic
= data
;
2101 if (kvm_lapic_enable_pv_eoi(vcpu
, 0))
2105 gfn
= data
>> HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT
;
2106 addr
= gfn_to_hva(vcpu
->kvm
, gfn
);
2107 if (kvm_is_error_hva(addr
))
2109 if (__clear_user((void __user
*)addr
, PAGE_SIZE
))
2111 vcpu
->arch
.hv_vapic
= data
;
2112 mark_page_dirty(vcpu
->kvm
, gfn
);
2113 if (kvm_lapic_enable_pv_eoi(vcpu
, gfn_to_gpa(gfn
) | KVM_MSR_ENABLED
))
2117 case HV_X64_MSR_EOI
:
2118 return kvm_hv_vapic_msr_write(vcpu
, APIC_EOI
, data
);
2119 case HV_X64_MSR_ICR
:
2120 return kvm_hv_vapic_msr_write(vcpu
, APIC_ICR
, data
);
2121 case HV_X64_MSR_TPR
:
2122 return kvm_hv_vapic_msr_write(vcpu
, APIC_TASKPRI
, data
);
2124 vcpu_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
2125 "data 0x%llx\n", msr
, data
);
2132 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
2134 gpa_t gpa
= data
& ~0x3f;
2136 /* Bits 2:5 are reserved, Should be zero */
2140 vcpu
->arch
.apf
.msr_val
= data
;
2142 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
2143 kvm_clear_async_pf_completion_queue(vcpu
);
2144 kvm_async_pf_hash_reset(vcpu
);
2148 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
2152 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
2153 kvm_async_pf_wakeup_all(vcpu
);
2157 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
2159 vcpu
->arch
.pv_time_enabled
= false;
2162 static void accumulate_steal_time(struct kvm_vcpu
*vcpu
)
2166 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2169 delta
= current
->sched_info
.run_delay
- vcpu
->arch
.st
.last_steal
;
2170 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2171 vcpu
->arch
.st
.accum_steal
= delta
;
2174 static void record_steal_time(struct kvm_vcpu
*vcpu
)
2176 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2179 if (unlikely(kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2180 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
))))
2183 vcpu
->arch
.st
.steal
.steal
+= vcpu
->arch
.st
.accum_steal
;
2184 vcpu
->arch
.st
.steal
.version
+= 2;
2185 vcpu
->arch
.st
.accum_steal
= 0;
2187 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2188 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2191 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2194 u32 msr
= msr_info
->index
;
2195 u64 data
= msr_info
->data
;
2198 case MSR_AMD64_NB_CFG
:
2199 case MSR_IA32_UCODE_REV
:
2200 case MSR_IA32_UCODE_WRITE
:
2201 case MSR_VM_HSAVE_PA
:
2202 case MSR_AMD64_PATCH_LOADER
:
2203 case MSR_AMD64_BU_CFG2
:
2207 return set_efer(vcpu
, data
);
2209 data
&= ~(u64
)0x40; /* ignore flush filter disable */
2210 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
2211 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
2212 data
&= ~(u64
)0x40000; /* ignore Mc status write enable */
2214 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
2219 case MSR_FAM10H_MMIO_CONF_BASE
:
2221 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
2226 case MSR_IA32_DEBUGCTLMSR
:
2228 /* We support the non-activated case already */
2230 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
2231 /* Values other than LBR and BTF are vendor-specific,
2232 thus reserved and should throw a #GP */
2235 vcpu_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2238 case 0x200 ... 0x2ff:
2239 return set_msr_mtrr(vcpu
, msr
, data
);
2240 case MSR_IA32_APICBASE
:
2241 return kvm_set_apic_base(vcpu
, msr_info
);
2242 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2243 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
2244 case MSR_IA32_TSCDEADLINE
:
2245 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
2247 case MSR_IA32_TSC_ADJUST
:
2248 if (guest_cpuid_has_tsc_adjust(vcpu
)) {
2249 if (!msr_info
->host_initiated
) {
2250 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
2251 kvm_x86_ops
->adjust_tsc_offset(vcpu
, adj
, true);
2253 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
2256 case MSR_IA32_MISC_ENABLE
:
2257 vcpu
->arch
.ia32_misc_enable_msr
= data
;
2259 case MSR_KVM_WALL_CLOCK_NEW
:
2260 case MSR_KVM_WALL_CLOCK
:
2261 vcpu
->kvm
->arch
.wall_clock
= data
;
2262 kvm_write_wall_clock(vcpu
->kvm
, data
);
2264 case MSR_KVM_SYSTEM_TIME_NEW
:
2265 case MSR_KVM_SYSTEM_TIME
: {
2267 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2269 kvmclock_reset(vcpu
);
2271 if (vcpu
->vcpu_id
== 0 && !msr_info
->host_initiated
) {
2272 bool tmp
= (msr
== MSR_KVM_SYSTEM_TIME
);
2274 if (ka
->boot_vcpu_runs_old_kvmclock
!= tmp
)
2275 set_bit(KVM_REQ_MASTERCLOCK_UPDATE
,
2278 ka
->boot_vcpu_runs_old_kvmclock
= tmp
;
2281 vcpu
->arch
.time
= data
;
2282 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2284 /* we verify if the enable bit is set... */
2288 gpa_offset
= data
& ~(PAGE_MASK
| 1);
2290 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2291 &vcpu
->arch
.pv_time
, data
& ~1ULL,
2292 sizeof(struct pvclock_vcpu_time_info
)))
2293 vcpu
->arch
.pv_time_enabled
= false;
2295 vcpu
->arch
.pv_time_enabled
= true;
2299 case MSR_KVM_ASYNC_PF_EN
:
2300 if (kvm_pv_enable_async_pf(vcpu
, data
))
2303 case MSR_KVM_STEAL_TIME
:
2305 if (unlikely(!sched_info_on()))
2308 if (data
& KVM_STEAL_RESERVED_MASK
)
2311 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2312 data
& KVM_STEAL_VALID_BITS
,
2313 sizeof(struct kvm_steal_time
)))
2316 vcpu
->arch
.st
.msr_val
= data
;
2318 if (!(data
& KVM_MSR_ENABLED
))
2321 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2324 accumulate_steal_time(vcpu
);
2327 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2330 case MSR_KVM_PV_EOI_EN
:
2331 if (kvm_lapic_enable_pv_eoi(vcpu
, data
))
2335 case MSR_IA32_MCG_CTL
:
2336 case MSR_IA32_MCG_STATUS
:
2337 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2338 return set_msr_mce(vcpu
, msr
, data
);
2340 /* Performance counters are not protected by a CPUID bit,
2341 * so we should check all of them in the generic path for the sake of
2342 * cross vendor migration.
2343 * Writing a zero into the event select MSRs disables them,
2344 * which we perfectly emulate ;-). Any other value should be at least
2345 * reported, some guests depend on them.
2347 case MSR_K7_EVNTSEL0
:
2348 case MSR_K7_EVNTSEL1
:
2349 case MSR_K7_EVNTSEL2
:
2350 case MSR_K7_EVNTSEL3
:
2352 vcpu_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
2353 "0x%x data 0x%llx\n", msr
, data
);
2355 /* at least RHEL 4 unconditionally writes to the perfctr registers,
2356 * so we ignore writes to make it happy.
2358 case MSR_K7_PERFCTR0
:
2359 case MSR_K7_PERFCTR1
:
2360 case MSR_K7_PERFCTR2
:
2361 case MSR_K7_PERFCTR3
:
2362 vcpu_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
2363 "0x%x data 0x%llx\n", msr
, data
);
2365 case MSR_P6_PERFCTR0
:
2366 case MSR_P6_PERFCTR1
:
2368 case MSR_P6_EVNTSEL0
:
2369 case MSR_P6_EVNTSEL1
:
2370 if (kvm_pmu_msr(vcpu
, msr
))
2371 return kvm_pmu_set_msr(vcpu
, msr_info
);
2373 if (pr
|| data
!= 0)
2374 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
2375 "0x%x data 0x%llx\n", msr
, data
);
2377 case MSR_K7_CLK_CTL
:
2379 * Ignore all writes to this no longer documented MSR.
2380 * Writes are only relevant for old K7 processors,
2381 * all pre-dating SVM, but a recommended workaround from
2382 * AMD for these chips. It is possible to specify the
2383 * affected processor models on the command line, hence
2384 * the need to ignore the workaround.
2387 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2388 if (kvm_hv_msr_partition_wide(msr
)) {
2390 mutex_lock(&vcpu
->kvm
->lock
);
2391 r
= set_msr_hyperv_pw(vcpu
, msr
, data
);
2392 mutex_unlock(&vcpu
->kvm
->lock
);
2395 return set_msr_hyperv(vcpu
, msr
, data
);
2397 case MSR_IA32_BBL_CR_CTL3
:
2398 /* Drop writes to this legacy MSR -- see rdmsr
2399 * counterpart for further detail.
2401 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n", msr
, data
);
2403 case MSR_AMD64_OSVW_ID_LENGTH
:
2404 if (!guest_cpuid_has_osvw(vcpu
))
2406 vcpu
->arch
.osvw
.length
= data
;
2408 case MSR_AMD64_OSVW_STATUS
:
2409 if (!guest_cpuid_has_osvw(vcpu
))
2411 vcpu
->arch
.osvw
.status
= data
;
2414 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
2415 return xen_hvm_config(vcpu
, data
);
2416 if (kvm_pmu_msr(vcpu
, msr
))
2417 return kvm_pmu_set_msr(vcpu
, msr_info
);
2419 vcpu_unimpl(vcpu
, "unhandled wrmsr: 0x%x data %llx\n",
2423 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n",
2430 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
2434 * Reads an msr value (of 'msr_index') into 'pdata'.
2435 * Returns 0 on success, non-0 otherwise.
2436 * Assumes vcpu_load() was already called.
2438 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
2440 return kvm_x86_ops
->get_msr(vcpu
, msr_index
, pdata
);
2442 EXPORT_SYMBOL_GPL(kvm_get_msr
);
2444 static int get_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2446 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
2448 if (!msr_mtrr_valid(msr
))
2451 if (msr
== MSR_MTRRdefType
)
2452 *pdata
= vcpu
->arch
.mtrr_state
.def_type
+
2453 (vcpu
->arch
.mtrr_state
.enabled
<< 10);
2454 else if (msr
== MSR_MTRRfix64K_00000
)
2456 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
2457 *pdata
= p
[1 + msr
- MSR_MTRRfix16K_80000
];
2458 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
2459 *pdata
= p
[3 + msr
- MSR_MTRRfix4K_C0000
];
2460 else if (msr
== MSR_IA32_CR_PAT
)
2461 *pdata
= vcpu
->arch
.pat
;
2462 else { /* Variable MTRRs */
2463 int idx
, is_mtrr_mask
;
2466 idx
= (msr
- 0x200) / 2;
2467 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
2470 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
2473 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
2480 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2483 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2484 unsigned bank_num
= mcg_cap
& 0xff;
2487 case MSR_IA32_P5_MC_ADDR
:
2488 case MSR_IA32_P5_MC_TYPE
:
2491 case MSR_IA32_MCG_CAP
:
2492 data
= vcpu
->arch
.mcg_cap
;
2494 case MSR_IA32_MCG_CTL
:
2495 if (!(mcg_cap
& MCG_CTL_P
))
2497 data
= vcpu
->arch
.mcg_ctl
;
2499 case MSR_IA32_MCG_STATUS
:
2500 data
= vcpu
->arch
.mcg_status
;
2503 if (msr
>= MSR_IA32_MC0_CTL
&&
2504 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2505 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2506 data
= vcpu
->arch
.mce_banks
[offset
];
2515 static int get_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2518 struct kvm
*kvm
= vcpu
->kvm
;
2521 case HV_X64_MSR_GUEST_OS_ID
:
2522 data
= kvm
->arch
.hv_guest_os_id
;
2524 case HV_X64_MSR_HYPERCALL
:
2525 data
= kvm
->arch
.hv_hypercall
;
2527 case HV_X64_MSR_TIME_REF_COUNT
: {
2529 div_u64(get_kernel_ns() + kvm
->arch
.kvmclock_offset
, 100);
2532 case HV_X64_MSR_REFERENCE_TSC
:
2533 data
= kvm
->arch
.hv_tsc_page
;
2536 vcpu_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
2544 static int get_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2549 case HV_X64_MSR_VP_INDEX
: {
2552 kvm_for_each_vcpu(r
, v
, vcpu
->kvm
) {
2560 case HV_X64_MSR_EOI
:
2561 return kvm_hv_vapic_msr_read(vcpu
, APIC_EOI
, pdata
);
2562 case HV_X64_MSR_ICR
:
2563 return kvm_hv_vapic_msr_read(vcpu
, APIC_ICR
, pdata
);
2564 case HV_X64_MSR_TPR
:
2565 return kvm_hv_vapic_msr_read(vcpu
, APIC_TASKPRI
, pdata
);
2566 case HV_X64_MSR_APIC_ASSIST_PAGE
:
2567 data
= vcpu
->arch
.hv_vapic
;
2570 vcpu_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
2577 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2582 case MSR_IA32_PLATFORM_ID
:
2583 case MSR_IA32_EBL_CR_POWERON
:
2584 case MSR_IA32_DEBUGCTLMSR
:
2585 case MSR_IA32_LASTBRANCHFROMIP
:
2586 case MSR_IA32_LASTBRANCHTOIP
:
2587 case MSR_IA32_LASTINTFROMIP
:
2588 case MSR_IA32_LASTINTTOIP
:
2591 case MSR_VM_HSAVE_PA
:
2592 case MSR_K7_EVNTSEL0
:
2593 case MSR_K7_EVNTSEL1
:
2594 case MSR_K7_EVNTSEL2
:
2595 case MSR_K7_EVNTSEL3
:
2596 case MSR_K7_PERFCTR0
:
2597 case MSR_K7_PERFCTR1
:
2598 case MSR_K7_PERFCTR2
:
2599 case MSR_K7_PERFCTR3
:
2600 case MSR_K8_INT_PENDING_MSG
:
2601 case MSR_AMD64_NB_CFG
:
2602 case MSR_FAM10H_MMIO_CONF_BASE
:
2603 case MSR_AMD64_BU_CFG2
:
2606 case MSR_P6_PERFCTR0
:
2607 case MSR_P6_PERFCTR1
:
2608 case MSR_P6_EVNTSEL0
:
2609 case MSR_P6_EVNTSEL1
:
2610 if (kvm_pmu_msr(vcpu
, msr
))
2611 return kvm_pmu_get_msr(vcpu
, msr
, pdata
);
2614 case MSR_IA32_UCODE_REV
:
2615 data
= 0x100000000ULL
;
2618 data
= 0x500 | KVM_NR_VAR_MTRR
;
2620 case 0x200 ... 0x2ff:
2621 return get_msr_mtrr(vcpu
, msr
, pdata
);
2622 case 0xcd: /* fsb frequency */
2626 * MSR_EBC_FREQUENCY_ID
2627 * Conservative value valid for even the basic CPU models.
2628 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2629 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2630 * and 266MHz for model 3, or 4. Set Core Clock
2631 * Frequency to System Bus Frequency Ratio to 1 (bits
2632 * 31:24) even though these are only valid for CPU
2633 * models > 2, however guests may end up dividing or
2634 * multiplying by zero otherwise.
2636 case MSR_EBC_FREQUENCY_ID
:
2639 case MSR_IA32_APICBASE
:
2640 data
= kvm_get_apic_base(vcpu
);
2642 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2643 return kvm_x2apic_msr_read(vcpu
, msr
, pdata
);
2645 case MSR_IA32_TSCDEADLINE
:
2646 data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
2648 case MSR_IA32_TSC_ADJUST
:
2649 data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
2651 case MSR_IA32_MISC_ENABLE
:
2652 data
= vcpu
->arch
.ia32_misc_enable_msr
;
2654 case MSR_IA32_PERF_STATUS
:
2655 /* TSC increment by tick */
2657 /* CPU multiplier */
2658 data
|= (((uint64_t)4ULL) << 40);
2661 data
= vcpu
->arch
.efer
;
2663 case MSR_KVM_WALL_CLOCK
:
2664 case MSR_KVM_WALL_CLOCK_NEW
:
2665 data
= vcpu
->kvm
->arch
.wall_clock
;
2667 case MSR_KVM_SYSTEM_TIME
:
2668 case MSR_KVM_SYSTEM_TIME_NEW
:
2669 data
= vcpu
->arch
.time
;
2671 case MSR_KVM_ASYNC_PF_EN
:
2672 data
= vcpu
->arch
.apf
.msr_val
;
2674 case MSR_KVM_STEAL_TIME
:
2675 data
= vcpu
->arch
.st
.msr_val
;
2677 case MSR_KVM_PV_EOI_EN
:
2678 data
= vcpu
->arch
.pv_eoi
.msr_val
;
2680 case MSR_IA32_P5_MC_ADDR
:
2681 case MSR_IA32_P5_MC_TYPE
:
2682 case MSR_IA32_MCG_CAP
:
2683 case MSR_IA32_MCG_CTL
:
2684 case MSR_IA32_MCG_STATUS
:
2685 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2686 return get_msr_mce(vcpu
, msr
, pdata
);
2687 case MSR_K7_CLK_CTL
:
2689 * Provide expected ramp-up count for K7. All other
2690 * are set to zero, indicating minimum divisors for
2693 * This prevents guest kernels on AMD host with CPU
2694 * type 6, model 8 and higher from exploding due to
2695 * the rdmsr failing.
2699 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2700 if (kvm_hv_msr_partition_wide(msr
)) {
2702 mutex_lock(&vcpu
->kvm
->lock
);
2703 r
= get_msr_hyperv_pw(vcpu
, msr
, pdata
);
2704 mutex_unlock(&vcpu
->kvm
->lock
);
2707 return get_msr_hyperv(vcpu
, msr
, pdata
);
2709 case MSR_IA32_BBL_CR_CTL3
:
2710 /* This legacy MSR exists but isn't fully documented in current
2711 * silicon. It is however accessed by winxp in very narrow
2712 * scenarios where it sets bit #19, itself documented as
2713 * a "reserved" bit. Best effort attempt to source coherent
2714 * read data here should the balance of the register be
2715 * interpreted by the guest:
2717 * L2 cache control register 3: 64GB range, 256KB size,
2718 * enabled, latency 0x1, configured
2722 case MSR_AMD64_OSVW_ID_LENGTH
:
2723 if (!guest_cpuid_has_osvw(vcpu
))
2725 data
= vcpu
->arch
.osvw
.length
;
2727 case MSR_AMD64_OSVW_STATUS
:
2728 if (!guest_cpuid_has_osvw(vcpu
))
2730 data
= vcpu
->arch
.osvw
.status
;
2733 if (kvm_pmu_msr(vcpu
, msr
))
2734 return kvm_pmu_get_msr(vcpu
, msr
, pdata
);
2736 vcpu_unimpl(vcpu
, "unhandled rdmsr: 0x%x\n", msr
);
2739 vcpu_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr
);
2747 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
2750 * Read or write a bunch of msrs. All parameters are kernel addresses.
2752 * @return number of msrs set successfully.
2754 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
2755 struct kvm_msr_entry
*entries
,
2756 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2757 unsigned index
, u64
*data
))
2761 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2762 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
2763 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
2765 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2771 * Read or write a bunch of msrs. Parameters are user addresses.
2773 * @return number of msrs set successfully.
2775 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
2776 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2777 unsigned index
, u64
*data
),
2780 struct kvm_msrs msrs
;
2781 struct kvm_msr_entry
*entries
;
2786 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
2790 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
2793 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
2794 entries
= memdup_user(user_msrs
->entries
, size
);
2795 if (IS_ERR(entries
)) {
2796 r
= PTR_ERR(entries
);
2800 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
2805 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
2816 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
2821 case KVM_CAP_IRQCHIP
:
2823 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
2824 case KVM_CAP_SET_TSS_ADDR
:
2825 case KVM_CAP_EXT_CPUID
:
2826 case KVM_CAP_EXT_EMUL_CPUID
:
2827 case KVM_CAP_CLOCKSOURCE
:
2829 case KVM_CAP_NOP_IO_DELAY
:
2830 case KVM_CAP_MP_STATE
:
2831 case KVM_CAP_SYNC_MMU
:
2832 case KVM_CAP_USER_NMI
:
2833 case KVM_CAP_REINJECT_CONTROL
:
2834 case KVM_CAP_IRQ_INJECT_STATUS
:
2835 case KVM_CAP_IOEVENTFD
:
2836 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
2838 case KVM_CAP_PIT_STATE2
:
2839 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
2840 case KVM_CAP_XEN_HVM
:
2841 case KVM_CAP_ADJUST_CLOCK
:
2842 case KVM_CAP_VCPU_EVENTS
:
2843 case KVM_CAP_HYPERV
:
2844 case KVM_CAP_HYPERV_VAPIC
:
2845 case KVM_CAP_HYPERV_SPIN
:
2846 case KVM_CAP_PCI_SEGMENT
:
2847 case KVM_CAP_DEBUGREGS
:
2848 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
2850 case KVM_CAP_ASYNC_PF
:
2851 case KVM_CAP_GET_TSC_KHZ
:
2852 case KVM_CAP_KVMCLOCK_CTRL
:
2853 case KVM_CAP_READONLY_MEM
:
2854 case KVM_CAP_HYPERV_TIME
:
2855 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
2856 case KVM_CAP_TSC_DEADLINE_TIMER
:
2857 case KVM_CAP_ENABLE_CAP_VM
:
2858 case KVM_CAP_DISABLE_QUIRKS
:
2859 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2860 case KVM_CAP_ASSIGN_DEV_IRQ
:
2861 case KVM_CAP_PCI_2_3
:
2865 case KVM_CAP_COALESCED_MMIO
:
2866 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
2869 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
2871 case KVM_CAP_NR_VCPUS
:
2872 r
= KVM_SOFT_MAX_VCPUS
;
2874 case KVM_CAP_MAX_VCPUS
:
2877 case KVM_CAP_NR_MEMSLOTS
:
2878 r
= KVM_USER_MEM_SLOTS
;
2880 case KVM_CAP_PV_MMU
: /* obsolete */
2883 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2885 r
= iommu_present(&pci_bus_type
);
2889 r
= KVM_MAX_MCE_BANKS
;
2894 case KVM_CAP_TSC_CONTROL
:
2895 r
= kvm_has_tsc_control
;
2905 long kvm_arch_dev_ioctl(struct file
*filp
,
2906 unsigned int ioctl
, unsigned long arg
)
2908 void __user
*argp
= (void __user
*)arg
;
2912 case KVM_GET_MSR_INDEX_LIST
: {
2913 struct kvm_msr_list __user
*user_msr_list
= argp
;
2914 struct kvm_msr_list msr_list
;
2918 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2921 msr_list
.nmsrs
= num_msrs_to_save
+ ARRAY_SIZE(emulated_msrs
);
2922 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2925 if (n
< msr_list
.nmsrs
)
2928 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2929 num_msrs_to_save
* sizeof(u32
)))
2931 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2933 ARRAY_SIZE(emulated_msrs
) * sizeof(u32
)))
2938 case KVM_GET_SUPPORTED_CPUID
:
2939 case KVM_GET_EMULATED_CPUID
: {
2940 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2941 struct kvm_cpuid2 cpuid
;
2944 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2947 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
2953 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2958 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2961 mce_cap
= KVM_MCE_CAP_SUPPORTED
;
2963 if (copy_to_user(argp
, &mce_cap
, sizeof mce_cap
))
2975 static void wbinvd_ipi(void *garbage
)
2980 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2982 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
2985 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2987 /* Address WBINVD may be executed by guest */
2988 if (need_emulate_wbinvd(vcpu
)) {
2989 if (kvm_x86_ops
->has_wbinvd_exit())
2990 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2991 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2992 smp_call_function_single(vcpu
->cpu
,
2993 wbinvd_ipi
, NULL
, 1);
2996 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2998 /* Apply any externally detected TSC adjustments (due to suspend) */
2999 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
3000 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
3001 vcpu
->arch
.tsc_offset_adjustment
= 0;
3002 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3005 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
3006 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
3007 native_read_tsc() - vcpu
->arch
.last_host_tsc
;
3009 mark_tsc_unstable("KVM discovered backwards TSC");
3010 if (check_tsc_unstable()) {
3011 u64 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
,
3012 vcpu
->arch
.last_guest_tsc
);
3013 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
3014 vcpu
->arch
.tsc_catchup
= 1;
3017 * On a host with synchronized TSC, there is no need to update
3018 * kvmclock on vcpu->cpu migration
3020 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
3021 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
3022 if (vcpu
->cpu
!= cpu
)
3023 kvm_migrate_timers(vcpu
);
3027 accumulate_steal_time(vcpu
);
3028 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
3031 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
3033 kvm_x86_ops
->vcpu_put(vcpu
);
3034 kvm_put_guest_fpu(vcpu
);
3035 vcpu
->arch
.last_host_tsc
= native_read_tsc();
3038 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
3039 struct kvm_lapic_state
*s
)
3041 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
3042 memcpy(s
->regs
, vcpu
->arch
.apic
->regs
, sizeof *s
);
3047 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
3048 struct kvm_lapic_state
*s
)
3050 kvm_apic_post_state_restore(vcpu
, s
);
3051 update_cr8_intercept(vcpu
);
3056 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
3057 struct kvm_interrupt
*irq
)
3059 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
3061 if (irqchip_in_kernel(vcpu
->kvm
))
3064 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
3065 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3070 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
3072 kvm_inject_nmi(vcpu
);
3077 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
3078 struct kvm_tpr_access_ctl
*tac
)
3082 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
3086 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
3090 unsigned bank_num
= mcg_cap
& 0xff, bank
;
3093 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
3095 if (mcg_cap
& ~(KVM_MCE_CAP_SUPPORTED
| 0xff | 0xff0000))
3098 vcpu
->arch
.mcg_cap
= mcg_cap
;
3099 /* Init IA32_MCG_CTL to all 1s */
3100 if (mcg_cap
& MCG_CTL_P
)
3101 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
3102 /* Init IA32_MCi_CTL to all 1s */
3103 for (bank
= 0; bank
< bank_num
; bank
++)
3104 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
3109 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
3110 struct kvm_x86_mce
*mce
)
3112 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
3113 unsigned bank_num
= mcg_cap
& 0xff;
3114 u64
*banks
= vcpu
->arch
.mce_banks
;
3116 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
3119 * if IA32_MCG_CTL is not all 1s, the uncorrected error
3120 * reporting is disabled
3122 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
3123 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
3125 banks
+= 4 * mce
->bank
;
3127 * if IA32_MCi_CTL is not all 1s, the uncorrected error
3128 * reporting is disabled for the bank
3130 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
3132 if (mce
->status
& MCI_STATUS_UC
) {
3133 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
3134 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
3135 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
3138 if (banks
[1] & MCI_STATUS_VAL
)
3139 mce
->status
|= MCI_STATUS_OVER
;
3140 banks
[2] = mce
->addr
;
3141 banks
[3] = mce
->misc
;
3142 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
3143 banks
[1] = mce
->status
;
3144 kvm_queue_exception(vcpu
, MC_VECTOR
);
3145 } else if (!(banks
[1] & MCI_STATUS_VAL
)
3146 || !(banks
[1] & MCI_STATUS_UC
)) {
3147 if (banks
[1] & MCI_STATUS_VAL
)
3148 mce
->status
|= MCI_STATUS_OVER
;
3149 banks
[2] = mce
->addr
;
3150 banks
[3] = mce
->misc
;
3151 banks
[1] = mce
->status
;
3153 banks
[1] |= MCI_STATUS_OVER
;
3157 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
3158 struct kvm_vcpu_events
*events
)
3161 events
->exception
.injected
=
3162 vcpu
->arch
.exception
.pending
&&
3163 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
3164 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
3165 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
3166 events
->exception
.pad
= 0;
3167 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
3169 events
->interrupt
.injected
=
3170 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
3171 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
3172 events
->interrupt
.soft
= 0;
3173 events
->interrupt
.shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
3175 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
3176 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
3177 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
3178 events
->nmi
.pad
= 0;
3180 events
->sipi_vector
= 0; /* never valid when reporting to user space */
3182 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
3183 | KVM_VCPUEVENT_VALID_SHADOW
);
3184 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
3187 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
3188 struct kvm_vcpu_events
*events
)
3190 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3191 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3192 | KVM_VCPUEVENT_VALID_SHADOW
))
3196 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
3197 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
3198 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
3199 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
3201 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
3202 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
3203 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
3204 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
3205 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
3206 events
->interrupt
.shadow
);
3208 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
3209 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
3210 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
3211 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
3213 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
3214 kvm_vcpu_has_lapic(vcpu
))
3215 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
3217 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3222 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
3223 struct kvm_debugregs
*dbgregs
)
3227 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
3228 kvm_get_dr(vcpu
, 6, &val
);
3230 dbgregs
->dr7
= vcpu
->arch
.dr7
;
3232 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
3235 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
3236 struct kvm_debugregs
*dbgregs
)
3241 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
3242 kvm_update_dr0123(vcpu
);
3243 vcpu
->arch
.dr6
= dbgregs
->dr6
;
3244 kvm_update_dr6(vcpu
);
3245 vcpu
->arch
.dr7
= dbgregs
->dr7
;
3246 kvm_update_dr7(vcpu
);
3251 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3253 static void fill_xsave(u8
*dest
, struct kvm_vcpu
*vcpu
)
3255 struct xsave_struct
*xsave
= &vcpu
->arch
.guest_fpu
.state
->xsave
;
3256 u64 xstate_bv
= xsave
->xsave_hdr
.xstate_bv
;
3260 * Copy legacy XSAVE area, to avoid complications with CPUID
3261 * leaves 0 and 1 in the loop below.
3263 memcpy(dest
, xsave
, XSAVE_HDR_OFFSET
);
3266 *(u64
*)(dest
+ XSAVE_HDR_OFFSET
) = xstate_bv
;
3269 * Copy each region from the possibly compacted offset to the
3270 * non-compacted offset.
3272 valid
= xstate_bv
& ~XSTATE_FPSSE
;
3274 u64 feature
= valid
& -valid
;
3275 int index
= fls64(feature
) - 1;
3276 void *src
= get_xsave_addr(xsave
, feature
);
3279 u32 size
, offset
, ecx
, edx
;
3280 cpuid_count(XSTATE_CPUID
, index
,
3281 &size
, &offset
, &ecx
, &edx
);
3282 memcpy(dest
+ offset
, src
, size
);
3289 static void load_xsave(struct kvm_vcpu
*vcpu
, u8
*src
)
3291 struct xsave_struct
*xsave
= &vcpu
->arch
.guest_fpu
.state
->xsave
;
3292 u64 xstate_bv
= *(u64
*)(src
+ XSAVE_HDR_OFFSET
);
3296 * Copy legacy XSAVE area, to avoid complications with CPUID
3297 * leaves 0 and 1 in the loop below.
3299 memcpy(xsave
, src
, XSAVE_HDR_OFFSET
);
3301 /* Set XSTATE_BV and possibly XCOMP_BV. */
3302 xsave
->xsave_hdr
.xstate_bv
= xstate_bv
;
3304 xsave
->xsave_hdr
.xcomp_bv
= host_xcr0
| XSTATE_COMPACTION_ENABLED
;
3307 * Copy each region from the non-compacted offset to the
3308 * possibly compacted offset.
3310 valid
= xstate_bv
& ~XSTATE_FPSSE
;
3312 u64 feature
= valid
& -valid
;
3313 int index
= fls64(feature
) - 1;
3314 void *dest
= get_xsave_addr(xsave
, feature
);
3317 u32 size
, offset
, ecx
, edx
;
3318 cpuid_count(XSTATE_CPUID
, index
,
3319 &size
, &offset
, &ecx
, &edx
);
3320 memcpy(dest
, src
+ offset
, size
);
3328 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
3329 struct kvm_xsave
*guest_xsave
)
3331 if (cpu_has_xsave
) {
3332 memset(guest_xsave
, 0, sizeof(struct kvm_xsave
));
3333 fill_xsave((u8
*) guest_xsave
->region
, vcpu
);
3335 memcpy(guest_xsave
->region
,
3336 &vcpu
->arch
.guest_fpu
.state
->fxsave
,
3337 sizeof(struct i387_fxsave_struct
));
3338 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
3343 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
3344 struct kvm_xsave
*guest_xsave
)
3347 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
3349 if (cpu_has_xsave
) {
3351 * Here we allow setting states that are not present in
3352 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3353 * with old userspace.
3355 if (xstate_bv
& ~kvm_supported_xcr0())
3357 load_xsave(vcpu
, (u8
*)guest_xsave
->region
);
3359 if (xstate_bv
& ~XSTATE_FPSSE
)
3361 memcpy(&vcpu
->arch
.guest_fpu
.state
->fxsave
,
3362 guest_xsave
->region
, sizeof(struct i387_fxsave_struct
));
3367 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
3368 struct kvm_xcrs
*guest_xcrs
)
3370 if (!cpu_has_xsave
) {
3371 guest_xcrs
->nr_xcrs
= 0;
3375 guest_xcrs
->nr_xcrs
= 1;
3376 guest_xcrs
->flags
= 0;
3377 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
3378 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
3381 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
3382 struct kvm_xcrs
*guest_xcrs
)
3389 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
3392 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
3393 /* Only support XCR0 currently */
3394 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
3395 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
3396 guest_xcrs
->xcrs
[i
].value
);
3405 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3406 * stopped by the hypervisor. This function will be called from the host only.
3407 * EINVAL is returned when the host attempts to set the flag for a guest that
3408 * does not support pv clocks.
3410 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
3412 if (!vcpu
->arch
.pv_time_enabled
)
3414 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
3415 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3419 long kvm_arch_vcpu_ioctl(struct file
*filp
,
3420 unsigned int ioctl
, unsigned long arg
)
3422 struct kvm_vcpu
*vcpu
= filp
->private_data
;
3423 void __user
*argp
= (void __user
*)arg
;
3426 struct kvm_lapic_state
*lapic
;
3427 struct kvm_xsave
*xsave
;
3428 struct kvm_xcrs
*xcrs
;
3434 case KVM_GET_LAPIC
: {
3436 if (!vcpu
->arch
.apic
)
3438 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
3443 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
3447 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
3452 case KVM_SET_LAPIC
: {
3454 if (!vcpu
->arch
.apic
)
3456 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
3457 if (IS_ERR(u
.lapic
))
3458 return PTR_ERR(u
.lapic
);
3460 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
3463 case KVM_INTERRUPT
: {
3464 struct kvm_interrupt irq
;
3467 if (copy_from_user(&irq
, argp
, sizeof irq
))
3469 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
3473 r
= kvm_vcpu_ioctl_nmi(vcpu
);
3476 case KVM_SET_CPUID
: {
3477 struct kvm_cpuid __user
*cpuid_arg
= argp
;
3478 struct kvm_cpuid cpuid
;
3481 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3483 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
3486 case KVM_SET_CPUID2
: {
3487 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3488 struct kvm_cpuid2 cpuid
;
3491 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3493 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
3494 cpuid_arg
->entries
);
3497 case KVM_GET_CPUID2
: {
3498 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3499 struct kvm_cpuid2 cpuid
;
3502 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3504 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
3505 cpuid_arg
->entries
);
3509 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
3515 r
= msr_io(vcpu
, argp
, kvm_get_msr
, 1);
3518 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
3520 case KVM_TPR_ACCESS_REPORTING
: {
3521 struct kvm_tpr_access_ctl tac
;
3524 if (copy_from_user(&tac
, argp
, sizeof tac
))
3526 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
3530 if (copy_to_user(argp
, &tac
, sizeof tac
))
3535 case KVM_SET_VAPIC_ADDR
: {
3536 struct kvm_vapic_addr va
;
3539 if (!irqchip_in_kernel(vcpu
->kvm
))
3542 if (copy_from_user(&va
, argp
, sizeof va
))
3544 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
3547 case KVM_X86_SETUP_MCE
: {
3551 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
3553 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
3556 case KVM_X86_SET_MCE
: {
3557 struct kvm_x86_mce mce
;
3560 if (copy_from_user(&mce
, argp
, sizeof mce
))
3562 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
3565 case KVM_GET_VCPU_EVENTS
: {
3566 struct kvm_vcpu_events events
;
3568 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
3571 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
3576 case KVM_SET_VCPU_EVENTS
: {
3577 struct kvm_vcpu_events events
;
3580 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
3583 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
3586 case KVM_GET_DEBUGREGS
: {
3587 struct kvm_debugregs dbgregs
;
3589 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
3592 if (copy_to_user(argp
, &dbgregs
,
3593 sizeof(struct kvm_debugregs
)))
3598 case KVM_SET_DEBUGREGS
: {
3599 struct kvm_debugregs dbgregs
;
3602 if (copy_from_user(&dbgregs
, argp
,
3603 sizeof(struct kvm_debugregs
)))
3606 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
3609 case KVM_GET_XSAVE
: {
3610 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
3615 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
3618 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
3623 case KVM_SET_XSAVE
: {
3624 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
3625 if (IS_ERR(u
.xsave
))
3626 return PTR_ERR(u
.xsave
);
3628 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
3631 case KVM_GET_XCRS
: {
3632 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3637 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
3640 if (copy_to_user(argp
, u
.xcrs
,
3641 sizeof(struct kvm_xcrs
)))
3646 case KVM_SET_XCRS
: {
3647 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
3649 return PTR_ERR(u
.xcrs
);
3651 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
3654 case KVM_SET_TSC_KHZ
: {
3658 user_tsc_khz
= (u32
)arg
;
3660 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
3663 if (user_tsc_khz
== 0)
3664 user_tsc_khz
= tsc_khz
;
3666 kvm_set_tsc_khz(vcpu
, user_tsc_khz
);
3671 case KVM_GET_TSC_KHZ
: {
3672 r
= vcpu
->arch
.virtual_tsc_khz
;
3675 case KVM_KVMCLOCK_CTRL
: {
3676 r
= kvm_set_guest_paused(vcpu
);
3687 int kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
3689 return VM_FAULT_SIGBUS
;
3692 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
3696 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
3698 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
3702 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3705 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3709 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3710 u32 kvm_nr_mmu_pages
)
3712 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3715 mutex_lock(&kvm
->slots_lock
);
3717 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3718 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3720 mutex_unlock(&kvm
->slots_lock
);
3724 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3726 return kvm
->arch
.n_max_mmu_pages
;
3729 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3734 switch (chip
->chip_id
) {
3735 case KVM_IRQCHIP_PIC_MASTER
:
3736 memcpy(&chip
->chip
.pic
,
3737 &pic_irqchip(kvm
)->pics
[0],
3738 sizeof(struct kvm_pic_state
));
3740 case KVM_IRQCHIP_PIC_SLAVE
:
3741 memcpy(&chip
->chip
.pic
,
3742 &pic_irqchip(kvm
)->pics
[1],
3743 sizeof(struct kvm_pic_state
));
3745 case KVM_IRQCHIP_IOAPIC
:
3746 r
= kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3755 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3760 switch (chip
->chip_id
) {
3761 case KVM_IRQCHIP_PIC_MASTER
:
3762 spin_lock(&pic_irqchip(kvm
)->lock
);
3763 memcpy(&pic_irqchip(kvm
)->pics
[0],
3765 sizeof(struct kvm_pic_state
));
3766 spin_unlock(&pic_irqchip(kvm
)->lock
);
3768 case KVM_IRQCHIP_PIC_SLAVE
:
3769 spin_lock(&pic_irqchip(kvm
)->lock
);
3770 memcpy(&pic_irqchip(kvm
)->pics
[1],
3772 sizeof(struct kvm_pic_state
));
3773 spin_unlock(&pic_irqchip(kvm
)->lock
);
3775 case KVM_IRQCHIP_IOAPIC
:
3776 r
= kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3782 kvm_pic_update_irq(pic_irqchip(kvm
));
3786 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3790 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3791 memcpy(ps
, &kvm
->arch
.vpit
->pit_state
, sizeof(struct kvm_pit_state
));
3792 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3796 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3800 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3801 memcpy(&kvm
->arch
.vpit
->pit_state
, ps
, sizeof(struct kvm_pit_state
));
3802 kvm_pit_load_count(kvm
, 0, ps
->channels
[0].count
, 0);
3803 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3807 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3811 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3812 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3813 sizeof(ps
->channels
));
3814 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3815 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3816 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
3820 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3822 int r
= 0, start
= 0;
3823 u32 prev_legacy
, cur_legacy
;
3824 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3825 prev_legacy
= kvm
->arch
.vpit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3826 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3827 if (!prev_legacy
&& cur_legacy
)
3829 memcpy(&kvm
->arch
.vpit
->pit_state
.channels
, &ps
->channels
,
3830 sizeof(kvm
->arch
.vpit
->pit_state
.channels
));
3831 kvm
->arch
.vpit
->pit_state
.flags
= ps
->flags
;
3832 kvm_pit_load_count(kvm
, 0, kvm
->arch
.vpit
->pit_state
.channels
[0].count
, start
);
3833 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3837 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
3838 struct kvm_reinject_control
*control
)
3840 if (!kvm
->arch
.vpit
)
3842 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3843 kvm
->arch
.vpit
->pit_state
.reinject
= control
->pit_reinject
;
3844 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3849 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3850 * @kvm: kvm instance
3851 * @log: slot id and address to which we copy the log
3853 * Steps 1-4 below provide general overview of dirty page logging. See
3854 * kvm_get_dirty_log_protect() function description for additional details.
3856 * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3857 * always flush the TLB (step 4) even if previous step failed and the dirty
3858 * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3859 * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3860 * writes will be marked dirty for next log read.
3862 * 1. Take a snapshot of the bit and clear it if needed.
3863 * 2. Write protect the corresponding page.
3864 * 3. Copy the snapshot to the userspace.
3865 * 4. Flush TLB's if needed.
3867 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
, struct kvm_dirty_log
*log
)
3869 bool is_dirty
= false;
3872 mutex_lock(&kvm
->slots_lock
);
3875 * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3877 if (kvm_x86_ops
->flush_log_dirty
)
3878 kvm_x86_ops
->flush_log_dirty(kvm
);
3880 r
= kvm_get_dirty_log_protect(kvm
, log
, &is_dirty
);
3883 * All the TLBs can be flushed out of mmu lock, see the comments in
3884 * kvm_mmu_slot_remove_write_access().
3886 lockdep_assert_held(&kvm
->slots_lock
);
3888 kvm_flush_remote_tlbs(kvm
);
3890 mutex_unlock(&kvm
->slots_lock
);
3894 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
3897 if (!irqchip_in_kernel(kvm
))
3900 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
3901 irq_event
->irq
, irq_event
->level
,
3906 static int kvm_vm_ioctl_enable_cap(struct kvm
*kvm
,
3907 struct kvm_enable_cap
*cap
)
3915 case KVM_CAP_DISABLE_QUIRKS
:
3916 kvm
->arch
.disabled_quirks
= cap
->args
[0];
3926 long kvm_arch_vm_ioctl(struct file
*filp
,
3927 unsigned int ioctl
, unsigned long arg
)
3929 struct kvm
*kvm
= filp
->private_data
;
3930 void __user
*argp
= (void __user
*)arg
;
3933 * This union makes it completely explicit to gcc-3.x
3934 * that these two variables' stack usage should be
3935 * combined, not added together.
3938 struct kvm_pit_state ps
;
3939 struct kvm_pit_state2 ps2
;
3940 struct kvm_pit_config pit_config
;
3944 case KVM_SET_TSS_ADDR
:
3945 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
3947 case KVM_SET_IDENTITY_MAP_ADDR
: {
3951 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
3953 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
3956 case KVM_SET_NR_MMU_PAGES
:
3957 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
3959 case KVM_GET_NR_MMU_PAGES
:
3960 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
3962 case KVM_CREATE_IRQCHIP
: {
3963 struct kvm_pic
*vpic
;
3965 mutex_lock(&kvm
->lock
);
3968 goto create_irqchip_unlock
;
3970 if (atomic_read(&kvm
->online_vcpus
))
3971 goto create_irqchip_unlock
;
3973 vpic
= kvm_create_pic(kvm
);
3975 r
= kvm_ioapic_init(kvm
);
3977 mutex_lock(&kvm
->slots_lock
);
3978 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3980 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3982 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3984 mutex_unlock(&kvm
->slots_lock
);
3986 goto create_irqchip_unlock
;
3989 goto create_irqchip_unlock
;
3991 kvm
->arch
.vpic
= vpic
;
3993 r
= kvm_setup_default_irq_routing(kvm
);
3995 mutex_lock(&kvm
->slots_lock
);
3996 mutex_lock(&kvm
->irq_lock
);
3997 kvm_ioapic_destroy(kvm
);
3998 kvm_destroy_pic(kvm
);
3999 mutex_unlock(&kvm
->irq_lock
);
4000 mutex_unlock(&kvm
->slots_lock
);
4002 create_irqchip_unlock
:
4003 mutex_unlock(&kvm
->lock
);
4006 case KVM_CREATE_PIT
:
4007 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
4009 case KVM_CREATE_PIT2
:
4011 if (copy_from_user(&u
.pit_config
, argp
,
4012 sizeof(struct kvm_pit_config
)))
4015 mutex_lock(&kvm
->slots_lock
);
4018 goto create_pit_unlock
;
4020 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
4024 mutex_unlock(&kvm
->slots_lock
);
4026 case KVM_GET_IRQCHIP
: {
4027 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4028 struct kvm_irqchip
*chip
;
4030 chip
= memdup_user(argp
, sizeof(*chip
));
4037 if (!irqchip_in_kernel(kvm
))
4038 goto get_irqchip_out
;
4039 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
4041 goto get_irqchip_out
;
4043 if (copy_to_user(argp
, chip
, sizeof *chip
))
4044 goto get_irqchip_out
;
4050 case KVM_SET_IRQCHIP
: {
4051 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4052 struct kvm_irqchip
*chip
;
4054 chip
= memdup_user(argp
, sizeof(*chip
));
4061 if (!irqchip_in_kernel(kvm
))
4062 goto set_irqchip_out
;
4063 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
4065 goto set_irqchip_out
;
4073 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
4076 if (!kvm
->arch
.vpit
)
4078 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
4082 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
4089 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
4092 if (!kvm
->arch
.vpit
)
4094 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
4097 case KVM_GET_PIT2
: {
4099 if (!kvm
->arch
.vpit
)
4101 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
4105 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
4110 case KVM_SET_PIT2
: {
4112 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
4115 if (!kvm
->arch
.vpit
)
4117 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
4120 case KVM_REINJECT_CONTROL
: {
4121 struct kvm_reinject_control control
;
4123 if (copy_from_user(&control
, argp
, sizeof(control
)))
4125 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
4128 case KVM_XEN_HVM_CONFIG
: {
4130 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
4131 sizeof(struct kvm_xen_hvm_config
)))
4134 if (kvm
->arch
.xen_hvm_config
.flags
)
4139 case KVM_SET_CLOCK
: {
4140 struct kvm_clock_data user_ns
;
4145 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
4153 local_irq_disable();
4154 now_ns
= get_kernel_ns();
4155 delta
= user_ns
.clock
- now_ns
;
4157 kvm
->arch
.kvmclock_offset
= delta
;
4158 kvm_gen_update_masterclock(kvm
);
4161 case KVM_GET_CLOCK
: {
4162 struct kvm_clock_data user_ns
;
4165 local_irq_disable();
4166 now_ns
= get_kernel_ns();
4167 user_ns
.clock
= kvm
->arch
.kvmclock_offset
+ now_ns
;
4170 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
4173 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
4178 case KVM_ENABLE_CAP
: {
4179 struct kvm_enable_cap cap
;
4182 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
4184 r
= kvm_vm_ioctl_enable_cap(kvm
, &cap
);
4188 r
= kvm_vm_ioctl_assigned_device(kvm
, ioctl
, arg
);
4194 static void kvm_init_msr_list(void)
4199 /* skip the first msrs in the list. KVM-specific */
4200 for (i
= j
= KVM_SAVE_MSRS_BEGIN
; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
4201 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
4205 * Even MSRs that are valid in the host may not be exposed
4206 * to the guests in some cases. We could work around this
4207 * in VMX with the generic MSR save/load machinery, but it
4208 * is not really worthwhile since it will really only
4209 * happen with nested virtualization.
4211 switch (msrs_to_save
[i
]) {
4212 case MSR_IA32_BNDCFGS
:
4213 if (!kvm_x86_ops
->mpx_supported())
4221 msrs_to_save
[j
] = msrs_to_save
[i
];
4224 num_msrs_to_save
= j
;
4227 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
4235 if (!(vcpu
->arch
.apic
&&
4236 !kvm_iodevice_write(vcpu
, &vcpu
->arch
.apic
->dev
, addr
, n
, v
))
4237 && kvm_io_bus_write(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4248 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
4255 if (!(vcpu
->arch
.apic
&&
4256 !kvm_iodevice_read(vcpu
, &vcpu
->arch
.apic
->dev
,
4258 && kvm_io_bus_read(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4260 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, *(u64
*)v
);
4270 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
4271 struct kvm_segment
*var
, int seg
)
4273 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
4276 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
4277 struct kvm_segment
*var
, int seg
)
4279 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
4282 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
,
4283 struct x86_exception
*exception
)
4287 BUG_ON(!mmu_is_nested(vcpu
));
4289 /* NPT walks are always user-walks */
4290 access
|= PFERR_USER_MASK
;
4291 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, exception
);
4296 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
4297 struct x86_exception
*exception
)
4299 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4300 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4303 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
4304 struct x86_exception
*exception
)
4306 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4307 access
|= PFERR_FETCH_MASK
;
4308 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4311 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
4312 struct x86_exception
*exception
)
4314 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4315 access
|= PFERR_WRITE_MASK
;
4316 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4319 /* uses this to access any guest's mapped memory without checking CPL */
4320 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
4321 struct x86_exception
*exception
)
4323 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
4326 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
4327 struct kvm_vcpu
*vcpu
, u32 access
,
4328 struct x86_exception
*exception
)
4331 int r
= X86EMUL_CONTINUE
;
4334 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
4336 unsigned offset
= addr
& (PAGE_SIZE
-1);
4337 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4340 if (gpa
== UNMAPPED_GVA
)
4341 return X86EMUL_PROPAGATE_FAULT
;
4342 ret
= kvm_read_guest_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
, data
,
4345 r
= X86EMUL_IO_NEEDED
;
4357 /* used for instruction fetching */
4358 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4359 gva_t addr
, void *val
, unsigned int bytes
,
4360 struct x86_exception
*exception
)
4362 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4363 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4367 /* Inline kvm_read_guest_virt_helper for speed. */
4368 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
|PFERR_FETCH_MASK
,
4370 if (unlikely(gpa
== UNMAPPED_GVA
))
4371 return X86EMUL_PROPAGATE_FAULT
;
4373 offset
= addr
& (PAGE_SIZE
-1);
4374 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
4375 bytes
= (unsigned)PAGE_SIZE
- offset
;
4376 ret
= kvm_read_guest_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
, val
,
4378 if (unlikely(ret
< 0))
4379 return X86EMUL_IO_NEEDED
;
4381 return X86EMUL_CONTINUE
;
4384 int kvm_read_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4385 gva_t addr
, void *val
, unsigned int bytes
,
4386 struct x86_exception
*exception
)
4388 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4389 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4391 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
4394 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
4396 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4397 gva_t addr
, void *val
, unsigned int bytes
,
4398 struct x86_exception
*exception
)
4400 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4401 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, exception
);
4404 int kvm_write_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4405 gva_t addr
, void *val
,
4407 struct x86_exception
*exception
)
4409 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4411 int r
= X86EMUL_CONTINUE
;
4414 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
4417 unsigned offset
= addr
& (PAGE_SIZE
-1);
4418 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4421 if (gpa
== UNMAPPED_GVA
)
4422 return X86EMUL_PROPAGATE_FAULT
;
4423 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, data
, towrite
);
4425 r
= X86EMUL_IO_NEEDED
;
4436 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
4438 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4439 gpa_t
*gpa
, struct x86_exception
*exception
,
4442 u32 access
= ((kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
4443 | (write
? PFERR_WRITE_MASK
: 0);
4445 if (vcpu_match_mmio_gva(vcpu
, gva
)
4446 && !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
4447 vcpu
->arch
.access
, access
)) {
4448 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
4449 (gva
& (PAGE_SIZE
- 1));
4450 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
4454 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4456 if (*gpa
== UNMAPPED_GVA
)
4459 /* For APIC access vmexit */
4460 if ((*gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4463 if (vcpu_match_mmio_gpa(vcpu
, *gpa
)) {
4464 trace_vcpu_match_mmio(gva
, *gpa
, write
, true);
4471 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4472 const void *val
, int bytes
)
4476 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, val
, bytes
);
4479 kvm_mmu_pte_write(vcpu
, gpa
, val
, bytes
);
4483 struct read_write_emulator_ops
{
4484 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
4486 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4487 void *val
, int bytes
);
4488 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4489 int bytes
, void *val
);
4490 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4491 void *val
, int bytes
);
4495 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
4497 if (vcpu
->mmio_read_completed
) {
4498 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
4499 vcpu
->mmio_fragments
[0].gpa
, *(u64
*)val
);
4500 vcpu
->mmio_read_completed
= 0;
4507 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4508 void *val
, int bytes
)
4510 return !kvm_read_guest(vcpu
->kvm
, gpa
, val
, bytes
);
4513 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4514 void *val
, int bytes
)
4516 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
4519 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
4521 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
4522 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
4525 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4526 void *val
, int bytes
)
4528 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
4529 return X86EMUL_IO_NEEDED
;
4532 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4533 void *val
, int bytes
)
4535 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
4537 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
4538 return X86EMUL_CONTINUE
;
4541 static const struct read_write_emulator_ops read_emultor
= {
4542 .read_write_prepare
= read_prepare
,
4543 .read_write_emulate
= read_emulate
,
4544 .read_write_mmio
= vcpu_mmio_read
,
4545 .read_write_exit_mmio
= read_exit_mmio
,
4548 static const struct read_write_emulator_ops write_emultor
= {
4549 .read_write_emulate
= write_emulate
,
4550 .read_write_mmio
= write_mmio
,
4551 .read_write_exit_mmio
= write_exit_mmio
,
4555 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
4557 struct x86_exception
*exception
,
4558 struct kvm_vcpu
*vcpu
,
4559 const struct read_write_emulator_ops
*ops
)
4563 bool write
= ops
->write
;
4564 struct kvm_mmio_fragment
*frag
;
4566 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
4569 return X86EMUL_PROPAGATE_FAULT
;
4571 /* For APIC access vmexit */
4575 if (ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
4576 return X86EMUL_CONTINUE
;
4580 * Is this MMIO handled locally?
4582 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
4583 if (handled
== bytes
)
4584 return X86EMUL_CONTINUE
;
4590 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
4591 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
4595 return X86EMUL_CONTINUE
;
4598 static int emulator_read_write(struct x86_emulate_ctxt
*ctxt
,
4600 void *val
, unsigned int bytes
,
4601 struct x86_exception
*exception
,
4602 const struct read_write_emulator_ops
*ops
)
4604 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4608 if (ops
->read_write_prepare
&&
4609 ops
->read_write_prepare(vcpu
, val
, bytes
))
4610 return X86EMUL_CONTINUE
;
4612 vcpu
->mmio_nr_fragments
= 0;
4614 /* Crossing a page boundary? */
4615 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
4618 now
= -addr
& ~PAGE_MASK
;
4619 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
4622 if (rc
!= X86EMUL_CONTINUE
)
4625 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
4631 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
4633 if (rc
!= X86EMUL_CONTINUE
)
4636 if (!vcpu
->mmio_nr_fragments
)
4639 gpa
= vcpu
->mmio_fragments
[0].gpa
;
4641 vcpu
->mmio_needed
= 1;
4642 vcpu
->mmio_cur_fragment
= 0;
4644 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
4645 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
4646 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
4647 vcpu
->run
->mmio
.phys_addr
= gpa
;
4649 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
4652 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
4656 struct x86_exception
*exception
)
4658 return emulator_read_write(ctxt
, addr
, val
, bytes
,
4659 exception
, &read_emultor
);
4662 static int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
4666 struct x86_exception
*exception
)
4668 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
4669 exception
, &write_emultor
);
4672 #define CMPXCHG_TYPE(t, ptr, old, new) \
4673 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4675 #ifdef CONFIG_X86_64
4676 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4678 # define CMPXCHG64(ptr, old, new) \
4679 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4682 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
4687 struct x86_exception
*exception
)
4689 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4695 /* guests cmpxchg8b have to be emulated atomically */
4696 if (bytes
> 8 || (bytes
& (bytes
- 1)))
4699 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
4701 if (gpa
== UNMAPPED_GVA
||
4702 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4705 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
4708 page
= gfn_to_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
4709 if (is_error_page(page
))
4712 kaddr
= kmap_atomic(page
);
4713 kaddr
+= offset_in_page(gpa
);
4716 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
4719 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
4722 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
4725 exchanged
= CMPXCHG64(kaddr
, old
, new);
4730 kunmap_atomic(kaddr
);
4731 kvm_release_page_dirty(page
);
4734 return X86EMUL_CMPXCHG_FAILED
;
4736 mark_page_dirty(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
4737 kvm_mmu_pte_write(vcpu
, gpa
, new, bytes
);
4739 return X86EMUL_CONTINUE
;
4742 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
4744 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
4747 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
4749 /* TODO: String I/O for in kernel device */
4752 if (vcpu
->arch
.pio
.in
)
4753 r
= kvm_io_bus_read(vcpu
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
4754 vcpu
->arch
.pio
.size
, pd
);
4756 r
= kvm_io_bus_write(vcpu
, KVM_PIO_BUS
,
4757 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
4762 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
4763 unsigned short port
, void *val
,
4764 unsigned int count
, bool in
)
4766 vcpu
->arch
.pio
.port
= port
;
4767 vcpu
->arch
.pio
.in
= in
;
4768 vcpu
->arch
.pio
.count
= count
;
4769 vcpu
->arch
.pio
.size
= size
;
4771 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
4772 vcpu
->arch
.pio
.count
= 0;
4776 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
4777 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
4778 vcpu
->run
->io
.size
= size
;
4779 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
4780 vcpu
->run
->io
.count
= count
;
4781 vcpu
->run
->io
.port
= port
;
4786 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
4787 int size
, unsigned short port
, void *val
,
4790 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4793 if (vcpu
->arch
.pio
.count
)
4796 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
4799 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
4800 trace_kvm_pio(KVM_PIO_IN
, port
, size
, count
, vcpu
->arch
.pio_data
);
4801 vcpu
->arch
.pio
.count
= 0;
4808 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
4809 int size
, unsigned short port
,
4810 const void *val
, unsigned int count
)
4812 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4814 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
4815 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, vcpu
->arch
.pio_data
);
4816 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
4819 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
4821 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
4824 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
4826 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
4829 int kvm_emulate_wbinvd_noskip(struct kvm_vcpu
*vcpu
)
4831 if (!need_emulate_wbinvd(vcpu
))
4832 return X86EMUL_CONTINUE
;
4834 if (kvm_x86_ops
->has_wbinvd_exit()) {
4835 int cpu
= get_cpu();
4837 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4838 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
4839 wbinvd_ipi
, NULL
, 1);
4841 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
4844 return X86EMUL_CONTINUE
;
4847 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4849 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
4850 return kvm_emulate_wbinvd_noskip(vcpu
);
4852 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
4856 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
4858 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt
));
4861 static int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
4862 unsigned long *dest
)
4864 return kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
4867 static int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
4868 unsigned long value
)
4871 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
4874 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
4876 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
4879 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
4881 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4882 unsigned long value
;
4886 value
= kvm_read_cr0(vcpu
);
4889 value
= vcpu
->arch
.cr2
;
4892 value
= kvm_read_cr3(vcpu
);
4895 value
= kvm_read_cr4(vcpu
);
4898 value
= kvm_get_cr8(vcpu
);
4901 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4908 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
4910 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4915 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
4918 vcpu
->arch
.cr2
= val
;
4921 res
= kvm_set_cr3(vcpu
, val
);
4924 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
4927 res
= kvm_set_cr8(vcpu
, val
);
4930 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4937 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
4939 return kvm_x86_ops
->get_cpl(emul_to_vcpu(ctxt
));
4942 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4944 kvm_x86_ops
->get_gdt(emul_to_vcpu(ctxt
), dt
);
4947 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4949 kvm_x86_ops
->get_idt(emul_to_vcpu(ctxt
), dt
);
4952 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4954 kvm_x86_ops
->set_gdt(emul_to_vcpu(ctxt
), dt
);
4957 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4959 kvm_x86_ops
->set_idt(emul_to_vcpu(ctxt
), dt
);
4962 static unsigned long emulator_get_cached_segment_base(
4963 struct x86_emulate_ctxt
*ctxt
, int seg
)
4965 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
4968 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
4969 struct desc_struct
*desc
, u32
*base3
,
4972 struct kvm_segment var
;
4974 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
4975 *selector
= var
.selector
;
4978 memset(desc
, 0, sizeof(*desc
));
4984 set_desc_limit(desc
, var
.limit
);
4985 set_desc_base(desc
, (unsigned long)var
.base
);
4986 #ifdef CONFIG_X86_64
4988 *base3
= var
.base
>> 32;
4990 desc
->type
= var
.type
;
4992 desc
->dpl
= var
.dpl
;
4993 desc
->p
= var
.present
;
4994 desc
->avl
= var
.avl
;
5002 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
5003 struct desc_struct
*desc
, u32 base3
,
5006 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5007 struct kvm_segment var
;
5009 var
.selector
= selector
;
5010 var
.base
= get_desc_base(desc
);
5011 #ifdef CONFIG_X86_64
5012 var
.base
|= ((u64
)base3
) << 32;
5014 var
.limit
= get_desc_limit(desc
);
5016 var
.limit
= (var
.limit
<< 12) | 0xfff;
5017 var
.type
= desc
->type
;
5018 var
.dpl
= desc
->dpl
;
5023 var
.avl
= desc
->avl
;
5024 var
.present
= desc
->p
;
5025 var
.unusable
= !var
.present
;
5028 kvm_set_segment(vcpu
, &var
, seg
);
5032 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
5033 u32 msr_index
, u64
*pdata
)
5035 return kvm_get_msr(emul_to_vcpu(ctxt
), msr_index
, pdata
);
5038 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
5039 u32 msr_index
, u64 data
)
5041 struct msr_data msr
;
5044 msr
.index
= msr_index
;
5045 msr
.host_initiated
= false;
5046 return kvm_set_msr(emul_to_vcpu(ctxt
), &msr
);
5049 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
5052 return kvm_pmu_check_pmc(emul_to_vcpu(ctxt
), pmc
);
5055 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
5056 u32 pmc
, u64
*pdata
)
5058 return kvm_pmu_read_pmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
5061 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
5063 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
5066 static void emulator_get_fpu(struct x86_emulate_ctxt
*ctxt
)
5069 kvm_load_guest_fpu(emul_to_vcpu(ctxt
));
5071 * CR0.TS may reference the host fpu state, not the guest fpu state,
5072 * so it may be clear at this point.
5077 static void emulator_put_fpu(struct x86_emulate_ctxt
*ctxt
)
5082 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
5083 struct x86_instruction_info
*info
,
5084 enum x86_intercept_stage stage
)
5086 return kvm_x86_ops
->check_intercept(emul_to_vcpu(ctxt
), info
, stage
);
5089 static void emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
5090 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
)
5092 kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
);
5095 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
5097 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
5100 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
5102 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
5105 static void emulator_set_nmi_mask(struct x86_emulate_ctxt
*ctxt
, bool masked
)
5107 kvm_x86_ops
->set_nmi_mask(emul_to_vcpu(ctxt
), masked
);
5110 static const struct x86_emulate_ops emulate_ops
= {
5111 .read_gpr
= emulator_read_gpr
,
5112 .write_gpr
= emulator_write_gpr
,
5113 .read_std
= kvm_read_guest_virt_system
,
5114 .write_std
= kvm_write_guest_virt_system
,
5115 .fetch
= kvm_fetch_guest_virt
,
5116 .read_emulated
= emulator_read_emulated
,
5117 .write_emulated
= emulator_write_emulated
,
5118 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
5119 .invlpg
= emulator_invlpg
,
5120 .pio_in_emulated
= emulator_pio_in_emulated
,
5121 .pio_out_emulated
= emulator_pio_out_emulated
,
5122 .get_segment
= emulator_get_segment
,
5123 .set_segment
= emulator_set_segment
,
5124 .get_cached_segment_base
= emulator_get_cached_segment_base
,
5125 .get_gdt
= emulator_get_gdt
,
5126 .get_idt
= emulator_get_idt
,
5127 .set_gdt
= emulator_set_gdt
,
5128 .set_idt
= emulator_set_idt
,
5129 .get_cr
= emulator_get_cr
,
5130 .set_cr
= emulator_set_cr
,
5131 .cpl
= emulator_get_cpl
,
5132 .get_dr
= emulator_get_dr
,
5133 .set_dr
= emulator_set_dr
,
5134 .set_msr
= emulator_set_msr
,
5135 .get_msr
= emulator_get_msr
,
5136 .check_pmc
= emulator_check_pmc
,
5137 .read_pmc
= emulator_read_pmc
,
5138 .halt
= emulator_halt
,
5139 .wbinvd
= emulator_wbinvd
,
5140 .fix_hypercall
= emulator_fix_hypercall
,
5141 .get_fpu
= emulator_get_fpu
,
5142 .put_fpu
= emulator_put_fpu
,
5143 .intercept
= emulator_intercept
,
5144 .get_cpuid
= emulator_get_cpuid
,
5145 .set_nmi_mask
= emulator_set_nmi_mask
,
5148 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
5150 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
5152 * an sti; sti; sequence only disable interrupts for the first
5153 * instruction. So, if the last instruction, be it emulated or
5154 * not, left the system with the INT_STI flag enabled, it
5155 * means that the last instruction is an sti. We should not
5156 * leave the flag on in this case. The same goes for mov ss
5158 if (int_shadow
& mask
)
5160 if (unlikely(int_shadow
|| mask
)) {
5161 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
5163 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5167 static bool inject_emulated_exception(struct kvm_vcpu
*vcpu
)
5169 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5170 if (ctxt
->exception
.vector
== PF_VECTOR
)
5171 return kvm_propagate_fault(vcpu
, &ctxt
->exception
);
5173 if (ctxt
->exception
.error_code_valid
)
5174 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
5175 ctxt
->exception
.error_code
);
5177 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
5181 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
5183 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5186 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
5188 ctxt
->eflags
= kvm_get_rflags(vcpu
);
5189 ctxt
->eip
= kvm_rip_read(vcpu
);
5190 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
5191 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
5192 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
5193 cs_db
? X86EMUL_MODE_PROT32
:
5194 X86EMUL_MODE_PROT16
;
5195 ctxt
->guest_mode
= is_guest_mode(vcpu
);
5197 init_decode_cache(ctxt
);
5198 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5201 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
5203 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5206 init_emulate_ctxt(vcpu
);
5210 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
5211 ret
= emulate_int_real(ctxt
, irq
);
5213 if (ret
!= X86EMUL_CONTINUE
)
5214 return EMULATE_FAIL
;
5216 ctxt
->eip
= ctxt
->_eip
;
5217 kvm_rip_write(vcpu
, ctxt
->eip
);
5218 kvm_set_rflags(vcpu
, ctxt
->eflags
);
5220 if (irq
== NMI_VECTOR
)
5221 vcpu
->arch
.nmi_pending
= 0;
5223 vcpu
->arch
.interrupt
.pending
= false;
5225 return EMULATE_DONE
;
5227 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
5229 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
5231 int r
= EMULATE_DONE
;
5233 ++vcpu
->stat
.insn_emulation_fail
;
5234 trace_kvm_emulate_insn_failed(vcpu
);
5235 if (!is_guest_mode(vcpu
) && kvm_x86_ops
->get_cpl(vcpu
) == 0) {
5236 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
5237 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
5238 vcpu
->run
->internal
.ndata
= 0;
5241 kvm_queue_exception(vcpu
, UD_VECTOR
);
5246 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t cr2
,
5247 bool write_fault_to_shadow_pgtable
,
5253 if (emulation_type
& EMULTYPE_NO_REEXECUTE
)
5256 if (!vcpu
->arch
.mmu
.direct_map
) {
5258 * Write permission should be allowed since only
5259 * write access need to be emulated.
5261 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5264 * If the mapping is invalid in guest, let cpu retry
5265 * it to generate fault.
5267 if (gpa
== UNMAPPED_GVA
)
5272 * Do not retry the unhandleable instruction if it faults on the
5273 * readonly host memory, otherwise it will goto a infinite loop:
5274 * retry instruction -> write #PF -> emulation fail -> retry
5275 * instruction -> ...
5277 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
5280 * If the instruction failed on the error pfn, it can not be fixed,
5281 * report the error to userspace.
5283 if (is_error_noslot_pfn(pfn
))
5286 kvm_release_pfn_clean(pfn
);
5288 /* The instructions are well-emulated on direct mmu. */
5289 if (vcpu
->arch
.mmu
.direct_map
) {
5290 unsigned int indirect_shadow_pages
;
5292 spin_lock(&vcpu
->kvm
->mmu_lock
);
5293 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
5294 spin_unlock(&vcpu
->kvm
->mmu_lock
);
5296 if (indirect_shadow_pages
)
5297 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5303 * if emulation was due to access to shadowed page table
5304 * and it failed try to unshadow page and re-enter the
5305 * guest to let CPU execute the instruction.
5307 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5310 * If the access faults on its page table, it can not
5311 * be fixed by unprotecting shadow page and it should
5312 * be reported to userspace.
5314 return !write_fault_to_shadow_pgtable
;
5317 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
5318 unsigned long cr2
, int emulation_type
)
5320 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5321 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2
;
5323 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
5324 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
5327 * If the emulation is caused by #PF and it is non-page_table
5328 * writing instruction, it means the VM-EXIT is caused by shadow
5329 * page protected, we can zap the shadow page and retry this
5330 * instruction directly.
5332 * Note: if the guest uses a non-page-table modifying instruction
5333 * on the PDE that points to the instruction, then we will unmap
5334 * the instruction and go to an infinite loop. So, we cache the
5335 * last retried eip and the last fault address, if we meet the eip
5336 * and the address again, we can break out of the potential infinite
5339 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
5341 if (!(emulation_type
& EMULTYPE_RETRY
))
5344 if (x86_page_table_writing_insn(ctxt
))
5347 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2
)
5350 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
5351 vcpu
->arch
.last_retry_addr
= cr2
;
5353 if (!vcpu
->arch
.mmu
.direct_map
)
5354 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5356 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5361 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
5362 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
5364 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
5373 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
5374 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
5379 static void kvm_vcpu_check_singlestep(struct kvm_vcpu
*vcpu
, unsigned long rflags
, int *r
)
5381 struct kvm_run
*kvm_run
= vcpu
->run
;
5384 * rflags is the old, "raw" value of the flags. The new value has
5385 * not been saved yet.
5387 * This is correct even for TF set by the guest, because "the
5388 * processor will not generate this exception after the instruction
5389 * that sets the TF flag".
5391 if (unlikely(rflags
& X86_EFLAGS_TF
)) {
5392 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
5393 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_FIXED_1
|
5395 kvm_run
->debug
.arch
.pc
= vcpu
->arch
.singlestep_rip
;
5396 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5397 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5398 *r
= EMULATE_USER_EXIT
;
5400 vcpu
->arch
.emulate_ctxt
.eflags
&= ~X86_EFLAGS_TF
;
5402 * "Certain debug exceptions may clear bit 0-3. The
5403 * remaining contents of the DR6 register are never
5404 * cleared by the processor".
5406 vcpu
->arch
.dr6
&= ~15;
5407 vcpu
->arch
.dr6
|= DR6_BS
| DR6_RTM
;
5408 kvm_queue_exception(vcpu
, DB_VECTOR
);
5413 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
5415 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
5416 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
5417 struct kvm_run
*kvm_run
= vcpu
->run
;
5418 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5419 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5420 vcpu
->arch
.guest_debug_dr7
,
5424 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_FIXED_1
| DR6_RTM
;
5425 kvm_run
->debug
.arch
.pc
= eip
;
5426 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5427 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5428 *r
= EMULATE_USER_EXIT
;
5433 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
5434 !(kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)) {
5435 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5436 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5441 vcpu
->arch
.dr6
&= ~15;
5442 vcpu
->arch
.dr6
|= dr6
| DR6_RTM
;
5443 kvm_queue_exception(vcpu
, DB_VECTOR
);
5452 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
5459 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5460 bool writeback
= true;
5461 bool write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
5464 * Clear write_fault_to_shadow_pgtable here to ensure it is
5467 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
5468 kvm_clear_exception_queue(vcpu
);
5470 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
5471 init_emulate_ctxt(vcpu
);
5474 * We will reenter on the same instruction since
5475 * we do not set complete_userspace_io. This does not
5476 * handle watchpoints yet, those would be handled in
5479 if (kvm_vcpu_check_breakpoint(vcpu
, &r
))
5482 ctxt
->interruptibility
= 0;
5483 ctxt
->have_exception
= false;
5484 ctxt
->exception
.vector
= -1;
5485 ctxt
->perm_ok
= false;
5487 ctxt
->ud
= emulation_type
& EMULTYPE_TRAP_UD
;
5489 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
5491 trace_kvm_emulate_insn_start(vcpu
);
5492 ++vcpu
->stat
.insn_emulation
;
5493 if (r
!= EMULATION_OK
) {
5494 if (emulation_type
& EMULTYPE_TRAP_UD
)
5495 return EMULATE_FAIL
;
5496 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5498 return EMULATE_DONE
;
5499 if (emulation_type
& EMULTYPE_SKIP
)
5500 return EMULATE_FAIL
;
5501 return handle_emulation_failure(vcpu
);
5505 if (emulation_type
& EMULTYPE_SKIP
) {
5506 kvm_rip_write(vcpu
, ctxt
->_eip
);
5507 if (ctxt
->eflags
& X86_EFLAGS_RF
)
5508 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
5509 return EMULATE_DONE
;
5512 if (retry_instruction(ctxt
, cr2
, emulation_type
))
5513 return EMULATE_DONE
;
5515 /* this is needed for vmware backdoor interface to work since it
5516 changes registers values during IO operation */
5517 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
5518 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5519 emulator_invalidate_register_cache(ctxt
);
5523 r
= x86_emulate_insn(ctxt
);
5525 if (r
== EMULATION_INTERCEPTED
)
5526 return EMULATE_DONE
;
5528 if (r
== EMULATION_FAILED
) {
5529 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5531 return EMULATE_DONE
;
5533 return handle_emulation_failure(vcpu
);
5536 if (ctxt
->have_exception
) {
5538 if (inject_emulated_exception(vcpu
))
5540 } else if (vcpu
->arch
.pio
.count
) {
5541 if (!vcpu
->arch
.pio
.in
) {
5542 /* FIXME: return into emulator if single-stepping. */
5543 vcpu
->arch
.pio
.count
= 0;
5546 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
5548 r
= EMULATE_USER_EXIT
;
5549 } else if (vcpu
->mmio_needed
) {
5550 if (!vcpu
->mmio_is_write
)
5552 r
= EMULATE_USER_EXIT
;
5553 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
5554 } else if (r
== EMULATION_RESTART
)
5560 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5561 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
5562 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5563 kvm_rip_write(vcpu
, ctxt
->eip
);
5564 if (r
== EMULATE_DONE
)
5565 kvm_vcpu_check_singlestep(vcpu
, rflags
, &r
);
5566 if (!ctxt
->have_exception
||
5567 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
)
5568 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
5571 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5572 * do nothing, and it will be requested again as soon as
5573 * the shadow expires. But we still need to check here,
5574 * because POPF has no interrupt shadow.
5576 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
5577 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5579 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
5583 EXPORT_SYMBOL_GPL(x86_emulate_instruction
);
5585 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5587 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5588 int ret
= emulator_pio_out_emulated(&vcpu
->arch
.emulate_ctxt
,
5589 size
, port
, &val
, 1);
5590 /* do not return to emulator after return from userspace */
5591 vcpu
->arch
.pio
.count
= 0;
5594 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
5596 static void tsc_bad(void *info
)
5598 __this_cpu_write(cpu_tsc_khz
, 0);
5601 static void tsc_khz_changed(void *data
)
5603 struct cpufreq_freqs
*freq
= data
;
5604 unsigned long khz
= 0;
5608 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5609 khz
= cpufreq_quick_get(raw_smp_processor_id());
5612 __this_cpu_write(cpu_tsc_khz
, khz
);
5615 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
5618 struct cpufreq_freqs
*freq
= data
;
5620 struct kvm_vcpu
*vcpu
;
5621 int i
, send_ipi
= 0;
5624 * We allow guests to temporarily run on slowing clocks,
5625 * provided we notify them after, or to run on accelerating
5626 * clocks, provided we notify them before. Thus time never
5629 * However, we have a problem. We can't atomically update
5630 * the frequency of a given CPU from this function; it is
5631 * merely a notifier, which can be called from any CPU.
5632 * Changing the TSC frequency at arbitrary points in time
5633 * requires a recomputation of local variables related to
5634 * the TSC for each VCPU. We must flag these local variables
5635 * to be updated and be sure the update takes place with the
5636 * new frequency before any guests proceed.
5638 * Unfortunately, the combination of hotplug CPU and frequency
5639 * change creates an intractable locking scenario; the order
5640 * of when these callouts happen is undefined with respect to
5641 * CPU hotplug, and they can race with each other. As such,
5642 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5643 * undefined; you can actually have a CPU frequency change take
5644 * place in between the computation of X and the setting of the
5645 * variable. To protect against this problem, all updates of
5646 * the per_cpu tsc_khz variable are done in an interrupt
5647 * protected IPI, and all callers wishing to update the value
5648 * must wait for a synchronous IPI to complete (which is trivial
5649 * if the caller is on the CPU already). This establishes the
5650 * necessary total order on variable updates.
5652 * Note that because a guest time update may take place
5653 * anytime after the setting of the VCPU's request bit, the
5654 * correct TSC value must be set before the request. However,
5655 * to ensure the update actually makes it to any guest which
5656 * starts running in hardware virtualization between the set
5657 * and the acquisition of the spinlock, we must also ping the
5658 * CPU after setting the request bit.
5662 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
5664 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
5667 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5669 spin_lock(&kvm_lock
);
5670 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
5671 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
5672 if (vcpu
->cpu
!= freq
->cpu
)
5674 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
5675 if (vcpu
->cpu
!= smp_processor_id())
5679 spin_unlock(&kvm_lock
);
5681 if (freq
->old
< freq
->new && send_ipi
) {
5683 * We upscale the frequency. Must make the guest
5684 * doesn't see old kvmclock values while running with
5685 * the new frequency, otherwise we risk the guest sees
5686 * time go backwards.
5688 * In case we update the frequency for another cpu
5689 * (which might be in guest context) send an interrupt
5690 * to kick the cpu out of guest context. Next time
5691 * guest context is entered kvmclock will be updated,
5692 * so the guest will not see stale values.
5694 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5699 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
5700 .notifier_call
= kvmclock_cpufreq_notifier
5703 static int kvmclock_cpu_notifier(struct notifier_block
*nfb
,
5704 unsigned long action
, void *hcpu
)
5706 unsigned int cpu
= (unsigned long)hcpu
;
5710 case CPU_DOWN_FAILED
:
5711 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
5713 case CPU_DOWN_PREPARE
:
5714 smp_call_function_single(cpu
, tsc_bad
, NULL
, 1);
5720 static struct notifier_block kvmclock_cpu_notifier_block
= {
5721 .notifier_call
= kvmclock_cpu_notifier
,
5722 .priority
= -INT_MAX
5725 static void kvm_timer_init(void)
5729 max_tsc_khz
= tsc_khz
;
5731 cpu_notifier_register_begin();
5732 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
5733 #ifdef CONFIG_CPU_FREQ
5734 struct cpufreq_policy policy
;
5735 memset(&policy
, 0, sizeof(policy
));
5737 cpufreq_get_policy(&policy
, cpu
);
5738 if (policy
.cpuinfo
.max_freq
)
5739 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
5742 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
5743 CPUFREQ_TRANSITION_NOTIFIER
);
5745 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
5746 for_each_online_cpu(cpu
)
5747 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
5749 __register_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
5750 cpu_notifier_register_done();
5754 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
5756 int kvm_is_in_guest(void)
5758 return __this_cpu_read(current_vcpu
) != NULL
;
5761 static int kvm_is_user_mode(void)
5765 if (__this_cpu_read(current_vcpu
))
5766 user_mode
= kvm_x86_ops
->get_cpl(__this_cpu_read(current_vcpu
));
5768 return user_mode
!= 0;
5771 static unsigned long kvm_get_guest_ip(void)
5773 unsigned long ip
= 0;
5775 if (__this_cpu_read(current_vcpu
))
5776 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
5781 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
5782 .is_in_guest
= kvm_is_in_guest
,
5783 .is_user_mode
= kvm_is_user_mode
,
5784 .get_guest_ip
= kvm_get_guest_ip
,
5787 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
5789 __this_cpu_write(current_vcpu
, vcpu
);
5791 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
5793 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
5795 __this_cpu_write(current_vcpu
, NULL
);
5797 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
5799 static void kvm_set_mmio_spte_mask(void)
5802 int maxphyaddr
= boot_cpu_data
.x86_phys_bits
;
5805 * Set the reserved bits and the present bit of an paging-structure
5806 * entry to generate page fault with PFER.RSV = 1.
5808 /* Mask the reserved physical address bits. */
5809 mask
= rsvd_bits(maxphyaddr
, 51);
5811 /* Bit 62 is always reserved for 32bit host. */
5812 mask
|= 0x3ull
<< 62;
5814 /* Set the present bit. */
5817 #ifdef CONFIG_X86_64
5819 * If reserved bit is not supported, clear the present bit to disable
5822 if (maxphyaddr
== 52)
5826 kvm_mmu_set_mmio_spte_mask(mask
);
5829 #ifdef CONFIG_X86_64
5830 static void pvclock_gtod_update_fn(struct work_struct
*work
)
5834 struct kvm_vcpu
*vcpu
;
5837 spin_lock(&kvm_lock
);
5838 list_for_each_entry(kvm
, &vm_list
, vm_list
)
5839 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5840 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
5841 atomic_set(&kvm_guest_has_master_clock
, 0);
5842 spin_unlock(&kvm_lock
);
5845 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
5848 * Notification about pvclock gtod data update.
5850 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
5853 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
5854 struct timekeeper
*tk
= priv
;
5856 update_pvclock_gtod(tk
);
5858 /* disable master clock if host does not trust, or does not
5859 * use, TSC clocksource
5861 if (gtod
->clock
.vclock_mode
!= VCLOCK_TSC
&&
5862 atomic_read(&kvm_guest_has_master_clock
) != 0)
5863 queue_work(system_long_wq
, &pvclock_gtod_work
);
5868 static struct notifier_block pvclock_gtod_notifier
= {
5869 .notifier_call
= pvclock_gtod_notify
,
5873 int kvm_arch_init(void *opaque
)
5876 struct kvm_x86_ops
*ops
= opaque
;
5879 printk(KERN_ERR
"kvm: already loaded the other module\n");
5884 if (!ops
->cpu_has_kvm_support()) {
5885 printk(KERN_ERR
"kvm: no hardware support\n");
5889 if (ops
->disabled_by_bios()) {
5890 printk(KERN_ERR
"kvm: disabled by bios\n");
5896 shared_msrs
= alloc_percpu(struct kvm_shared_msrs
);
5898 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_shared_msrs\n");
5902 r
= kvm_mmu_module_init();
5904 goto out_free_percpu
;
5906 kvm_set_mmio_spte_mask();
5910 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
5911 PT_DIRTY_MASK
, PT64_NX_MASK
, 0);
5915 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
5918 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
5921 #ifdef CONFIG_X86_64
5922 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
5928 free_percpu(shared_msrs
);
5933 void kvm_arch_exit(void)
5935 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
5937 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5938 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
5939 CPUFREQ_TRANSITION_NOTIFIER
);
5940 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
5941 #ifdef CONFIG_X86_64
5942 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
5945 kvm_mmu_module_exit();
5946 free_percpu(shared_msrs
);
5949 int kvm_vcpu_halt(struct kvm_vcpu
*vcpu
)
5951 ++vcpu
->stat
.halt_exits
;
5952 if (irqchip_in_kernel(vcpu
->kvm
)) {
5953 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
5956 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
5960 EXPORT_SYMBOL_GPL(kvm_vcpu_halt
);
5962 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
5964 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
5965 return kvm_vcpu_halt(vcpu
);
5967 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
5969 int kvm_hv_hypercall(struct kvm_vcpu
*vcpu
)
5971 u64 param
, ingpa
, outgpa
, ret
;
5972 uint16_t code
, rep_idx
, rep_cnt
, res
= HV_STATUS_SUCCESS
, rep_done
= 0;
5973 bool fast
, longmode
;
5976 * hypercall generates UD from non zero cpl and real mode
5979 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 || !is_protmode(vcpu
)) {
5980 kvm_queue_exception(vcpu
, UD_VECTOR
);
5984 longmode
= is_64_bit_mode(vcpu
);
5987 param
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDX
) << 32) |
5988 (kvm_register_read(vcpu
, VCPU_REGS_RAX
) & 0xffffffff);
5989 ingpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RBX
) << 32) |
5990 (kvm_register_read(vcpu
, VCPU_REGS_RCX
) & 0xffffffff);
5991 outgpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDI
) << 32) |
5992 (kvm_register_read(vcpu
, VCPU_REGS_RSI
) & 0xffffffff);
5994 #ifdef CONFIG_X86_64
5996 param
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5997 ingpa
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5998 outgpa
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
6002 code
= param
& 0xffff;
6003 fast
= (param
>> 16) & 0x1;
6004 rep_cnt
= (param
>> 32) & 0xfff;
6005 rep_idx
= (param
>> 48) & 0xfff;
6007 trace_kvm_hv_hypercall(code
, fast
, rep_cnt
, rep_idx
, ingpa
, outgpa
);
6010 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT
:
6011 kvm_vcpu_on_spin(vcpu
);
6014 res
= HV_STATUS_INVALID_HYPERCALL_CODE
;
6018 ret
= res
| (((u64
)rep_done
& 0xfff) << 32);
6020 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
6022 kvm_register_write(vcpu
, VCPU_REGS_RDX
, ret
>> 32);
6023 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
& 0xffffffff);
6030 * kvm_pv_kick_cpu_op: Kick a vcpu.
6032 * @apicid - apicid of vcpu to be kicked.
6034 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
6036 struct kvm_lapic_irq lapic_irq
;
6038 lapic_irq
.shorthand
= 0;
6039 lapic_irq
.dest_mode
= 0;
6040 lapic_irq
.dest_id
= apicid
;
6041 lapic_irq
.msi_redir_hint
= false;
6043 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
6044 kvm_irq_delivery_to_apic(kvm
, NULL
, &lapic_irq
, NULL
);
6047 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
6049 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
6050 int op_64_bit
, r
= 1;
6052 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
6054 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
6055 return kvm_hv_hypercall(vcpu
);
6057 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
6058 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
6059 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
6060 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
6061 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
6063 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
6065 op_64_bit
= is_64_bit_mode(vcpu
);
6074 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
6080 case KVM_HC_VAPIC_POLL_IRQ
:
6083 case KVM_HC_KICK_CPU
:
6084 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
6094 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
6095 ++vcpu
->stat
.hypercalls
;
6098 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
6100 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
6102 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6103 char instruction
[3];
6104 unsigned long rip
= kvm_rip_read(vcpu
);
6106 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
6108 return emulator_write_emulated(ctxt
, rip
, instruction
, 3, NULL
);
6112 * Check if userspace requested an interrupt window, and that the
6113 * interrupt window is open.
6115 * No need to exit to userspace if we already have an interrupt queued.
6117 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
6119 return (!irqchip_in_kernel(vcpu
->kvm
) && !kvm_cpu_has_interrupt(vcpu
) &&
6120 vcpu
->run
->request_interrupt_window
&&
6121 kvm_arch_interrupt_allowed(vcpu
));
6124 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
6126 struct kvm_run
*kvm_run
= vcpu
->run
;
6128 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
6129 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
6130 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
6131 if (irqchip_in_kernel(vcpu
->kvm
))
6132 kvm_run
->ready_for_interrupt_injection
= 1;
6134 kvm_run
->ready_for_interrupt_injection
=
6135 kvm_arch_interrupt_allowed(vcpu
) &&
6136 !kvm_cpu_has_interrupt(vcpu
) &&
6137 !kvm_event_needs_reinjection(vcpu
);
6140 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
6144 if (!kvm_x86_ops
->update_cr8_intercept
)
6147 if (!vcpu
->arch
.apic
)
6150 if (!vcpu
->arch
.apic
->vapic_addr
)
6151 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
6158 tpr
= kvm_lapic_get_cr8(vcpu
);
6160 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
6163 static int inject_pending_event(struct kvm_vcpu
*vcpu
, bool req_int_win
)
6167 /* try to reinject previous events if any */
6168 if (vcpu
->arch
.exception
.pending
) {
6169 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
6170 vcpu
->arch
.exception
.has_error_code
,
6171 vcpu
->arch
.exception
.error_code
);
6173 if (exception_type(vcpu
->arch
.exception
.nr
) == EXCPT_FAULT
)
6174 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
6177 if (vcpu
->arch
.exception
.nr
== DB_VECTOR
&&
6178 (vcpu
->arch
.dr7
& DR7_GD
)) {
6179 vcpu
->arch
.dr7
&= ~DR7_GD
;
6180 kvm_update_dr7(vcpu
);
6183 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
6184 vcpu
->arch
.exception
.has_error_code
,
6185 vcpu
->arch
.exception
.error_code
,
6186 vcpu
->arch
.exception
.reinject
);
6190 if (vcpu
->arch
.nmi_injected
) {
6191 kvm_x86_ops
->set_nmi(vcpu
);
6195 if (vcpu
->arch
.interrupt
.pending
) {
6196 kvm_x86_ops
->set_irq(vcpu
);
6200 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6201 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6206 /* try to inject new event if pending */
6207 if (vcpu
->arch
.nmi_pending
) {
6208 if (kvm_x86_ops
->nmi_allowed(vcpu
)) {
6209 --vcpu
->arch
.nmi_pending
;
6210 vcpu
->arch
.nmi_injected
= true;
6211 kvm_x86_ops
->set_nmi(vcpu
);
6213 } else if (kvm_cpu_has_injectable_intr(vcpu
)) {
6215 * Because interrupts can be injected asynchronously, we are
6216 * calling check_nested_events again here to avoid a race condition.
6217 * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6218 * proposal and current concerns. Perhaps we should be setting
6219 * KVM_REQ_EVENT only on certain events and not unconditionally?
6221 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6222 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6226 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
6227 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
6229 kvm_x86_ops
->set_irq(vcpu
);
6235 static void process_nmi(struct kvm_vcpu
*vcpu
)
6240 * x86 is limited to one NMI running, and one NMI pending after it.
6241 * If an NMI is already in progress, limit further NMIs to just one.
6242 * Otherwise, allow two (and we'll inject the first one immediately).
6244 if (kvm_x86_ops
->get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
6247 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
6248 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
6249 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6252 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
6254 u64 eoi_exit_bitmap
[4];
6257 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
6260 memset(eoi_exit_bitmap
, 0, 32);
6263 kvm_ioapic_scan_entry(vcpu
, eoi_exit_bitmap
, tmr
);
6264 kvm_x86_ops
->load_eoi_exitmap(vcpu
, eoi_exit_bitmap
);
6265 kvm_apic_update_tmr(vcpu
, tmr
);
6268 static void kvm_vcpu_flush_tlb(struct kvm_vcpu
*vcpu
)
6270 ++vcpu
->stat
.tlb_flush
;
6271 kvm_x86_ops
->tlb_flush(vcpu
);
6274 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
6276 struct page
*page
= NULL
;
6278 if (!irqchip_in_kernel(vcpu
->kvm
))
6281 if (!kvm_x86_ops
->set_apic_access_page_addr
)
6284 page
= gfn_to_page(vcpu
->kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
6285 if (is_error_page(page
))
6287 kvm_x86_ops
->set_apic_access_page_addr(vcpu
, page_to_phys(page
));
6290 * Do not pin apic access page in memory, the MMU notifier
6291 * will call us again if it is migrated or swapped out.
6295 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page
);
6297 void kvm_arch_mmu_notifier_invalidate_page(struct kvm
*kvm
,
6298 unsigned long address
)
6301 * The physical address of apic access page is stored in the VMCS.
6302 * Update it when it becomes invalid.
6304 if (address
== gfn_to_hva(kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
))
6305 kvm_make_all_cpus_request(kvm
, KVM_REQ_APIC_PAGE_RELOAD
);
6309 * Returns 1 to let vcpu_run() continue the guest execution loop without
6310 * exiting to the userspace. Otherwise, the value will be returned to the
6313 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
6316 bool req_int_win
= !irqchip_in_kernel(vcpu
->kvm
) &&
6317 vcpu
->run
->request_interrupt_window
;
6318 bool req_immediate_exit
= false;
6320 if (vcpu
->requests
) {
6321 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
6322 kvm_mmu_unload(vcpu
);
6323 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
6324 __kvm_migrate_timers(vcpu
);
6325 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
6326 kvm_gen_update_masterclock(vcpu
->kvm
);
6327 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
6328 kvm_gen_kvmclock_update(vcpu
);
6329 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
6330 r
= kvm_guest_time_update(vcpu
);
6334 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
6335 kvm_mmu_sync_roots(vcpu
);
6336 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
6337 kvm_vcpu_flush_tlb(vcpu
);
6338 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
6339 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
6343 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
6344 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
6348 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
)) {
6349 vcpu
->fpu_active
= 0;
6350 kvm_x86_ops
->fpu_deactivate(vcpu
);
6352 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
6353 /* Page is swapped out. Do synthetic halt */
6354 vcpu
->arch
.apf
.halted
= true;
6358 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
6359 record_steal_time(vcpu
);
6360 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
6362 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
6363 kvm_handle_pmu_event(vcpu
);
6364 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
6365 kvm_deliver_pmi(vcpu
);
6366 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
6367 vcpu_scan_ioapic(vcpu
);
6368 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
6369 kvm_vcpu_reload_apic_access_page(vcpu
);
6372 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
6373 kvm_apic_accept_events(vcpu
);
6374 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
6379 if (inject_pending_event(vcpu
, req_int_win
) != 0)
6380 req_immediate_exit
= true;
6381 /* enable NMI/IRQ window open exits if needed */
6382 else if (vcpu
->arch
.nmi_pending
)
6383 kvm_x86_ops
->enable_nmi_window(vcpu
);
6384 else if (kvm_cpu_has_injectable_intr(vcpu
) || req_int_win
)
6385 kvm_x86_ops
->enable_irq_window(vcpu
);
6387 if (kvm_lapic_enabled(vcpu
)) {
6389 * Update architecture specific hints for APIC
6390 * virtual interrupt delivery.
6392 if (kvm_x86_ops
->hwapic_irr_update
)
6393 kvm_x86_ops
->hwapic_irr_update(vcpu
,
6394 kvm_lapic_find_highest_irr(vcpu
));
6395 update_cr8_intercept(vcpu
);
6396 kvm_lapic_sync_to_vapic(vcpu
);
6400 r
= kvm_mmu_reload(vcpu
);
6402 goto cancel_injection
;
6407 kvm_x86_ops
->prepare_guest_switch(vcpu
);
6408 if (vcpu
->fpu_active
)
6409 kvm_load_guest_fpu(vcpu
);
6410 kvm_load_guest_xcr0(vcpu
);
6412 vcpu
->mode
= IN_GUEST_MODE
;
6414 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6416 /* We should set ->mode before check ->requests,
6417 * see the comment in make_all_cpus_request.
6419 smp_mb__after_srcu_read_unlock();
6421 local_irq_disable();
6423 if (vcpu
->mode
== EXITING_GUEST_MODE
|| vcpu
->requests
6424 || need_resched() || signal_pending(current
)) {
6425 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6429 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6431 goto cancel_injection
;
6434 if (req_immediate_exit
)
6435 smp_send_reschedule(vcpu
->cpu
);
6437 __kvm_guest_enter();
6439 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
6441 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
6442 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
6443 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
6444 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
6445 set_debugreg(vcpu
->arch
.dr6
, 6);
6446 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
6449 trace_kvm_entry(vcpu
->vcpu_id
);
6450 wait_lapic_expire(vcpu
);
6451 kvm_x86_ops
->run(vcpu
);
6454 * Do this here before restoring debug registers on the host. And
6455 * since we do this before handling the vmexit, a DR access vmexit
6456 * can (a) read the correct value of the debug registers, (b) set
6457 * KVM_DEBUGREG_WONT_EXIT again.
6459 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
6462 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
6463 kvm_x86_ops
->sync_dirty_debug_regs(vcpu
);
6464 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
6465 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
6469 * If the guest has used debug registers, at least dr7
6470 * will be disabled while returning to the host.
6471 * If we don't have active breakpoints in the host, we don't
6472 * care about the messed up debug address registers. But if
6473 * we have some of them active, restore the old state.
6475 if (hw_breakpoint_active())
6476 hw_breakpoint_restore();
6478 vcpu
->arch
.last_guest_tsc
= kvm_x86_ops
->read_l1_tsc(vcpu
,
6481 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6484 /* Interrupt is enabled by handle_external_intr() */
6485 kvm_x86_ops
->handle_external_intr(vcpu
);
6490 * We must have an instruction between local_irq_enable() and
6491 * kvm_guest_exit(), so the timer interrupt isn't delayed by
6492 * the interrupt shadow. The stat.exits increment will do nicely.
6493 * But we need to prevent reordering, hence this barrier():
6501 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6504 * Profile KVM exit RIPs:
6506 if (unlikely(prof_on
== KVM_PROFILING
)) {
6507 unsigned long rip
= kvm_rip_read(vcpu
);
6508 profile_hit(KVM_PROFILING
, (void *)rip
);
6511 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
6512 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
6514 if (vcpu
->arch
.apic_attention
)
6515 kvm_lapic_sync_from_vapic(vcpu
);
6517 r
= kvm_x86_ops
->handle_exit(vcpu
);
6521 kvm_x86_ops
->cancel_injection(vcpu
);
6522 if (unlikely(vcpu
->arch
.apic_attention
))
6523 kvm_lapic_sync_from_vapic(vcpu
);
6528 static inline int vcpu_block(struct kvm
*kvm
, struct kvm_vcpu
*vcpu
)
6530 if (!kvm_arch_vcpu_runnable(vcpu
)) {
6531 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6532 kvm_vcpu_block(vcpu
);
6533 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6534 if (!kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
6538 kvm_apic_accept_events(vcpu
);
6539 switch(vcpu
->arch
.mp_state
) {
6540 case KVM_MP_STATE_HALTED
:
6541 vcpu
->arch
.pv
.pv_unhalted
= false;
6542 vcpu
->arch
.mp_state
=
6543 KVM_MP_STATE_RUNNABLE
;
6544 case KVM_MP_STATE_RUNNABLE
:
6545 vcpu
->arch
.apf
.halted
= false;
6547 case KVM_MP_STATE_INIT_RECEIVED
:
6556 static int vcpu_run(struct kvm_vcpu
*vcpu
)
6559 struct kvm
*kvm
= vcpu
->kvm
;
6561 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6564 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
6565 !vcpu
->arch
.apf
.halted
)
6566 r
= vcpu_enter_guest(vcpu
);
6568 r
= vcpu_block(kvm
, vcpu
);
6572 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
6573 if (kvm_cpu_has_pending_timer(vcpu
))
6574 kvm_inject_pending_timer_irqs(vcpu
);
6576 if (dm_request_for_irq_injection(vcpu
)) {
6578 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
6579 ++vcpu
->stat
.request_irq_exits
;
6583 kvm_check_async_pf_completion(vcpu
);
6585 if (signal_pending(current
)) {
6587 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
6588 ++vcpu
->stat
.signal_exits
;
6591 if (need_resched()) {
6592 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6594 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6598 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6603 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
6606 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6607 r
= emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
6608 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6609 if (r
!= EMULATE_DONE
)
6614 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
6616 BUG_ON(!vcpu
->arch
.pio
.count
);
6618 return complete_emulated_io(vcpu
);
6622 * Implements the following, as a state machine:
6626 * for each mmio piece in the fragment
6634 * for each mmio piece in the fragment
6639 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
6641 struct kvm_run
*run
= vcpu
->run
;
6642 struct kvm_mmio_fragment
*frag
;
6645 BUG_ON(!vcpu
->mmio_needed
);
6647 /* Complete previous fragment */
6648 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
6649 len
= min(8u, frag
->len
);
6650 if (!vcpu
->mmio_is_write
)
6651 memcpy(frag
->data
, run
->mmio
.data
, len
);
6653 if (frag
->len
<= 8) {
6654 /* Switch to the next fragment. */
6656 vcpu
->mmio_cur_fragment
++;
6658 /* Go forward to the next mmio piece. */
6664 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
6665 vcpu
->mmio_needed
= 0;
6667 /* FIXME: return into emulator if single-stepping. */
6668 if (vcpu
->mmio_is_write
)
6670 vcpu
->mmio_read_completed
= 1;
6671 return complete_emulated_io(vcpu
);
6674 run
->exit_reason
= KVM_EXIT_MMIO
;
6675 run
->mmio
.phys_addr
= frag
->gpa
;
6676 if (vcpu
->mmio_is_write
)
6677 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
6678 run
->mmio
.len
= min(8u, frag
->len
);
6679 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
6680 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
6685 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
6690 if (!tsk_used_math(current
) && init_fpu(current
))
6693 if (vcpu
->sigset_active
)
6694 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
6696 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
6697 kvm_vcpu_block(vcpu
);
6698 kvm_apic_accept_events(vcpu
);
6699 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
6704 /* re-sync apic's tpr */
6705 if (!irqchip_in_kernel(vcpu
->kvm
)) {
6706 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
6712 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
6713 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
6714 vcpu
->arch
.complete_userspace_io
= NULL
;
6719 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
6724 post_kvm_run_save(vcpu
);
6725 if (vcpu
->sigset_active
)
6726 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
6731 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
6733 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
6735 * We are here if userspace calls get_regs() in the middle of
6736 * instruction emulation. Registers state needs to be copied
6737 * back from emulation context to vcpu. Userspace shouldn't do
6738 * that usually, but some bad designed PV devices (vmware
6739 * backdoor interface) need this to work
6741 emulator_writeback_register_cache(&vcpu
->arch
.emulate_ctxt
);
6742 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
6744 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
6745 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
6746 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
6747 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
6748 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
6749 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
6750 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
6751 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
6752 #ifdef CONFIG_X86_64
6753 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
6754 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
6755 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
6756 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
6757 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
6758 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
6759 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
6760 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
6763 regs
->rip
= kvm_rip_read(vcpu
);
6764 regs
->rflags
= kvm_get_rflags(vcpu
);
6769 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
6771 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
6772 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
6774 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
6775 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
6776 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
6777 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
6778 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
6779 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
6780 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
6781 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
6782 #ifdef CONFIG_X86_64
6783 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
6784 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
6785 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
6786 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
6787 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
6788 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
6789 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
6790 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
6793 kvm_rip_write(vcpu
, regs
->rip
);
6794 kvm_set_rflags(vcpu
, regs
->rflags
);
6796 vcpu
->arch
.exception
.pending
= false;
6798 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6803 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
6805 struct kvm_segment cs
;
6807 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6811 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
6813 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
6814 struct kvm_sregs
*sregs
)
6818 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
6819 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
6820 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
6821 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
6822 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
6823 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
6825 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
6826 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
6828 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6829 sregs
->idt
.limit
= dt
.size
;
6830 sregs
->idt
.base
= dt
.address
;
6831 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6832 sregs
->gdt
.limit
= dt
.size
;
6833 sregs
->gdt
.base
= dt
.address
;
6835 sregs
->cr0
= kvm_read_cr0(vcpu
);
6836 sregs
->cr2
= vcpu
->arch
.cr2
;
6837 sregs
->cr3
= kvm_read_cr3(vcpu
);
6838 sregs
->cr4
= kvm_read_cr4(vcpu
);
6839 sregs
->cr8
= kvm_get_cr8(vcpu
);
6840 sregs
->efer
= vcpu
->arch
.efer
;
6841 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
6843 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
6845 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
6846 set_bit(vcpu
->arch
.interrupt
.nr
,
6847 (unsigned long *)sregs
->interrupt_bitmap
);
6852 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
6853 struct kvm_mp_state
*mp_state
)
6855 kvm_apic_accept_events(vcpu
);
6856 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
&&
6857 vcpu
->arch
.pv
.pv_unhalted
)
6858 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
6860 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
6865 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
6866 struct kvm_mp_state
*mp_state
)
6868 if (!kvm_vcpu_has_lapic(vcpu
) &&
6869 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
6872 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
6873 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
6874 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
6876 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
6877 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6881 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
6882 int reason
, bool has_error_code
, u32 error_code
)
6884 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
6887 init_emulate_ctxt(vcpu
);
6889 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
6890 has_error_code
, error_code
);
6893 return EMULATE_FAIL
;
6895 kvm_rip_write(vcpu
, ctxt
->eip
);
6896 kvm_set_rflags(vcpu
, ctxt
->eflags
);
6897 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6898 return EMULATE_DONE
;
6900 EXPORT_SYMBOL_GPL(kvm_task_switch
);
6902 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
6903 struct kvm_sregs
*sregs
)
6905 struct msr_data apic_base_msr
;
6906 int mmu_reset_needed
= 0;
6907 int pending_vec
, max_bits
, idx
;
6910 if (!guest_cpuid_has_xsave(vcpu
) && (sregs
->cr4
& X86_CR4_OSXSAVE
))
6913 dt
.size
= sregs
->idt
.limit
;
6914 dt
.address
= sregs
->idt
.base
;
6915 kvm_x86_ops
->set_idt(vcpu
, &dt
);
6916 dt
.size
= sregs
->gdt
.limit
;
6917 dt
.address
= sregs
->gdt
.base
;
6918 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
6920 vcpu
->arch
.cr2
= sregs
->cr2
;
6921 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
6922 vcpu
->arch
.cr3
= sregs
->cr3
;
6923 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
6925 kvm_set_cr8(vcpu
, sregs
->cr8
);
6927 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
6928 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
6929 apic_base_msr
.data
= sregs
->apic_base
;
6930 apic_base_msr
.host_initiated
= true;
6931 kvm_set_apic_base(vcpu
, &apic_base_msr
);
6933 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
6934 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
6935 vcpu
->arch
.cr0
= sregs
->cr0
;
6937 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
6938 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
6939 if (sregs
->cr4
& X86_CR4_OSXSAVE
)
6940 kvm_update_cpuid(vcpu
);
6942 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6943 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
6944 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
6945 mmu_reset_needed
= 1;
6947 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
6949 if (mmu_reset_needed
)
6950 kvm_mmu_reset_context(vcpu
);
6952 max_bits
= KVM_NR_INTERRUPTS
;
6953 pending_vec
= find_first_bit(
6954 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
6955 if (pending_vec
< max_bits
) {
6956 kvm_queue_interrupt(vcpu
, pending_vec
, false);
6957 pr_debug("Set back pending irq %d\n", pending_vec
);
6960 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
6961 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
6962 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
6963 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
6964 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
6965 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
6967 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
6968 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
6970 update_cr8_intercept(vcpu
);
6972 /* Older userspace won't unhalt the vcpu on reset. */
6973 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
6974 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
6976 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
6978 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6983 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
6984 struct kvm_guest_debug
*dbg
)
6986 unsigned long rflags
;
6989 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
6991 if (vcpu
->arch
.exception
.pending
)
6993 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
6994 kvm_queue_exception(vcpu
, DB_VECTOR
);
6996 kvm_queue_exception(vcpu
, BP_VECTOR
);
7000 * Read rflags as long as potentially injected trace flags are still
7003 rflags
= kvm_get_rflags(vcpu
);
7005 vcpu
->guest_debug
= dbg
->control
;
7006 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
7007 vcpu
->guest_debug
= 0;
7009 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
7010 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
7011 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
7012 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
7014 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
7015 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
7017 kvm_update_dr7(vcpu
);
7019 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
7020 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
7021 get_segment_base(vcpu
, VCPU_SREG_CS
);
7024 * Trigger an rflags update that will inject or remove the trace
7027 kvm_set_rflags(vcpu
, rflags
);
7029 kvm_x86_ops
->update_db_bp_intercept(vcpu
);
7039 * Translate a guest virtual address to a guest physical address.
7041 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
7042 struct kvm_translation
*tr
)
7044 unsigned long vaddr
= tr
->linear_address
;
7048 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7049 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
7050 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7051 tr
->physical_address
= gpa
;
7052 tr
->valid
= gpa
!= UNMAPPED_GVA
;
7059 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7061 struct i387_fxsave_struct
*fxsave
=
7062 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
7064 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
7065 fpu
->fcw
= fxsave
->cwd
;
7066 fpu
->fsw
= fxsave
->swd
;
7067 fpu
->ftwx
= fxsave
->twd
;
7068 fpu
->last_opcode
= fxsave
->fop
;
7069 fpu
->last_ip
= fxsave
->rip
;
7070 fpu
->last_dp
= fxsave
->rdp
;
7071 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
7076 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7078 struct i387_fxsave_struct
*fxsave
=
7079 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
7081 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
7082 fxsave
->cwd
= fpu
->fcw
;
7083 fxsave
->swd
= fpu
->fsw
;
7084 fxsave
->twd
= fpu
->ftwx
;
7085 fxsave
->fop
= fpu
->last_opcode
;
7086 fxsave
->rip
= fpu
->last_ip
;
7087 fxsave
->rdp
= fpu
->last_dp
;
7088 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
7093 int fx_init(struct kvm_vcpu
*vcpu
, bool init_event
)
7097 err
= fpu_alloc(&vcpu
->arch
.guest_fpu
);
7102 fpu_finit(&vcpu
->arch
.guest_fpu
);
7105 vcpu
->arch
.guest_fpu
.state
->xsave
.xsave_hdr
.xcomp_bv
=
7106 host_xcr0
| XSTATE_COMPACTION_ENABLED
;
7109 * Ensure guest xcr0 is valid for loading
7111 vcpu
->arch
.xcr0
= XSTATE_FP
;
7113 vcpu
->arch
.cr0
|= X86_CR0_ET
;
7117 EXPORT_SYMBOL_GPL(fx_init
);
7119 static void fx_free(struct kvm_vcpu
*vcpu
)
7121 fpu_free(&vcpu
->arch
.guest_fpu
);
7124 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
7126 if (vcpu
->guest_fpu_loaded
)
7130 * Restore all possible states in the guest,
7131 * and assume host would use all available bits.
7132 * Guest xcr0 would be loaded later.
7134 kvm_put_guest_xcr0(vcpu
);
7135 vcpu
->guest_fpu_loaded
= 1;
7136 __kernel_fpu_begin();
7137 fpu_restore_checking(&vcpu
->arch
.guest_fpu
);
7141 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
7143 kvm_put_guest_xcr0(vcpu
);
7145 if (!vcpu
->guest_fpu_loaded
) {
7146 vcpu
->fpu_counter
= 0;
7150 vcpu
->guest_fpu_loaded
= 0;
7151 fpu_save_init(&vcpu
->arch
.guest_fpu
);
7153 ++vcpu
->stat
.fpu_reload
;
7155 * If using eager FPU mode, or if the guest is a frequent user
7156 * of the FPU, just leave the FPU active for next time.
7157 * Every 255 times fpu_counter rolls over to 0; a guest that uses
7158 * the FPU in bursts will revert to loading it on demand.
7160 if (!vcpu
->arch
.eager_fpu
) {
7161 if (++vcpu
->fpu_counter
< 5)
7162 kvm_make_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
);
7167 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
7169 kvmclock_reset(vcpu
);
7171 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
7173 kvm_x86_ops
->vcpu_free(vcpu
);
7176 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
7179 struct kvm_vcpu
*vcpu
;
7181 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
7182 printk_once(KERN_WARNING
7183 "kvm: SMP vm created on host with unstable TSC; "
7184 "guest TSC will not be reliable\n");
7186 vcpu
= kvm_x86_ops
->vcpu_create(kvm
, id
);
7189 * Activate fpu unconditionally in case the guest needs eager FPU. It will be
7190 * deactivated soon if it doesn't.
7192 kvm_x86_ops
->fpu_activate(vcpu
);
7196 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
7200 vcpu
->arch
.mtrr_state
.have_fixed
= 1;
7201 r
= vcpu_load(vcpu
);
7204 kvm_vcpu_reset(vcpu
, false);
7205 kvm_mmu_setup(vcpu
);
7211 void kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
7213 struct msr_data msr
;
7214 struct kvm
*kvm
= vcpu
->kvm
;
7216 if (vcpu_load(vcpu
))
7219 msr
.index
= MSR_IA32_TSC
;
7220 msr
.host_initiated
= true;
7221 kvm_write_tsc(vcpu
, &msr
);
7224 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
7225 KVMCLOCK_SYNC_PERIOD
);
7228 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
7231 vcpu
->arch
.apf
.msr_val
= 0;
7233 r
= vcpu_load(vcpu
);
7235 kvm_mmu_unload(vcpu
);
7239 kvm_x86_ops
->vcpu_free(vcpu
);
7242 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
, bool init_event
)
7244 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
7245 vcpu
->arch
.nmi_pending
= 0;
7246 vcpu
->arch
.nmi_injected
= false;
7247 kvm_clear_interrupt_queue(vcpu
);
7248 kvm_clear_exception_queue(vcpu
);
7250 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
7251 kvm_update_dr0123(vcpu
);
7252 vcpu
->arch
.dr6
= DR6_INIT
;
7253 kvm_update_dr6(vcpu
);
7254 vcpu
->arch
.dr7
= DR7_FIXED_1
;
7255 kvm_update_dr7(vcpu
);
7259 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7260 vcpu
->arch
.apf
.msr_val
= 0;
7261 vcpu
->arch
.st
.msr_val
= 0;
7263 kvmclock_reset(vcpu
);
7265 kvm_clear_async_pf_completion_queue(vcpu
);
7266 kvm_async_pf_hash_reset(vcpu
);
7267 vcpu
->arch
.apf
.halted
= false;
7270 kvm_pmu_reset(vcpu
);
7272 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
7273 vcpu
->arch
.regs_avail
= ~0;
7274 vcpu
->arch
.regs_dirty
= ~0;
7276 kvm_x86_ops
->vcpu_reset(vcpu
, init_event
);
7279 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
7281 struct kvm_segment cs
;
7283 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7284 cs
.selector
= vector
<< 8;
7285 cs
.base
= vector
<< 12;
7286 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7287 kvm_rip_write(vcpu
, 0);
7290 int kvm_arch_hardware_enable(void)
7293 struct kvm_vcpu
*vcpu
;
7298 bool stable
, backwards_tsc
= false;
7300 kvm_shared_msr_cpu_online();
7301 ret
= kvm_x86_ops
->hardware_enable();
7305 local_tsc
= native_read_tsc();
7306 stable
= !check_tsc_unstable();
7307 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7308 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7309 if (!stable
&& vcpu
->cpu
== smp_processor_id())
7310 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
7311 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
7312 backwards_tsc
= true;
7313 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
7314 max_tsc
= vcpu
->arch
.last_host_tsc
;
7320 * Sometimes, even reliable TSCs go backwards. This happens on
7321 * platforms that reset TSC during suspend or hibernate actions, but
7322 * maintain synchronization. We must compensate. Fortunately, we can
7323 * detect that condition here, which happens early in CPU bringup,
7324 * before any KVM threads can be running. Unfortunately, we can't
7325 * bring the TSCs fully up to date with real time, as we aren't yet far
7326 * enough into CPU bringup that we know how much real time has actually
7327 * elapsed; our helper function, get_kernel_ns() will be using boot
7328 * variables that haven't been updated yet.
7330 * So we simply find the maximum observed TSC above, then record the
7331 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
7332 * the adjustment will be applied. Note that we accumulate
7333 * adjustments, in case multiple suspend cycles happen before some VCPU
7334 * gets a chance to run again. In the event that no KVM threads get a
7335 * chance to run, we will miss the entire elapsed period, as we'll have
7336 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7337 * loose cycle time. This isn't too big a deal, since the loss will be
7338 * uniform across all VCPUs (not to mention the scenario is extremely
7339 * unlikely). It is possible that a second hibernate recovery happens
7340 * much faster than a first, causing the observed TSC here to be
7341 * smaller; this would require additional padding adjustment, which is
7342 * why we set last_host_tsc to the local tsc observed here.
7344 * N.B. - this code below runs only on platforms with reliable TSC,
7345 * as that is the only way backwards_tsc is set above. Also note
7346 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7347 * have the same delta_cyc adjustment applied if backwards_tsc
7348 * is detected. Note further, this adjustment is only done once,
7349 * as we reset last_host_tsc on all VCPUs to stop this from being
7350 * called multiple times (one for each physical CPU bringup).
7352 * Platforms with unreliable TSCs don't have to deal with this, they
7353 * will be compensated by the logic in vcpu_load, which sets the TSC to
7354 * catchup mode. This will catchup all VCPUs to real time, but cannot
7355 * guarantee that they stay in perfect synchronization.
7357 if (backwards_tsc
) {
7358 u64 delta_cyc
= max_tsc
- local_tsc
;
7359 backwards_tsc_observed
= true;
7360 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7361 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7362 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
7363 vcpu
->arch
.last_host_tsc
= local_tsc
;
7364 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
7368 * We have to disable TSC offset matching.. if you were
7369 * booting a VM while issuing an S4 host suspend....
7370 * you may have some problem. Solving this issue is
7371 * left as an exercise to the reader.
7373 kvm
->arch
.last_tsc_nsec
= 0;
7374 kvm
->arch
.last_tsc_write
= 0;
7381 void kvm_arch_hardware_disable(void)
7383 kvm_x86_ops
->hardware_disable();
7384 drop_user_return_notifiers();
7387 int kvm_arch_hardware_setup(void)
7391 r
= kvm_x86_ops
->hardware_setup();
7395 kvm_init_msr_list();
7399 void kvm_arch_hardware_unsetup(void)
7401 kvm_x86_ops
->hardware_unsetup();
7404 void kvm_arch_check_processor_compat(void *rtn
)
7406 kvm_x86_ops
->check_processor_compatibility(rtn
);
7409 bool kvm_vcpu_compatible(struct kvm_vcpu
*vcpu
)
7411 return irqchip_in_kernel(vcpu
->kvm
) == (vcpu
->arch
.apic
!= NULL
);
7414 struct static_key kvm_no_apic_vcpu __read_mostly
;
7416 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
7422 BUG_ON(vcpu
->kvm
== NULL
);
7425 vcpu
->arch
.pv
.pv_unhalted
= false;
7426 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
7427 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_reset_bsp(vcpu
))
7428 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7430 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
7432 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
7437 vcpu
->arch
.pio_data
= page_address(page
);
7439 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
7441 r
= kvm_mmu_create(vcpu
);
7443 goto fail_free_pio_data
;
7445 if (irqchip_in_kernel(kvm
)) {
7446 r
= kvm_create_lapic(vcpu
);
7448 goto fail_mmu_destroy
;
7450 static_key_slow_inc(&kvm_no_apic_vcpu
);
7452 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
7454 if (!vcpu
->arch
.mce_banks
) {
7456 goto fail_free_lapic
;
7458 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
7460 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
)) {
7462 goto fail_free_mce_banks
;
7465 r
= fx_init(vcpu
, false);
7467 goto fail_free_wbinvd_dirty_mask
;
7469 vcpu
->arch
.ia32_tsc_adjust_msr
= 0x0;
7470 vcpu
->arch
.pv_time_enabled
= false;
7472 vcpu
->arch
.guest_supported_xcr0
= 0;
7473 vcpu
->arch
.guest_xstate_size
= XSAVE_HDR_SIZE
+ XSAVE_HDR_OFFSET
;
7475 vcpu
->arch
.maxphyaddr
= cpuid_query_maxphyaddr(vcpu
);
7477 vcpu
->arch
.pat
= MSR_IA32_CR_PAT_DEFAULT
;
7479 kvm_async_pf_hash_reset(vcpu
);
7483 fail_free_wbinvd_dirty_mask
:
7484 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
7485 fail_free_mce_banks
:
7486 kfree(vcpu
->arch
.mce_banks
);
7488 kvm_free_lapic(vcpu
);
7490 kvm_mmu_destroy(vcpu
);
7492 free_page((unsigned long)vcpu
->arch
.pio_data
);
7497 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
7501 kvm_pmu_destroy(vcpu
);
7502 kfree(vcpu
->arch
.mce_banks
);
7503 kvm_free_lapic(vcpu
);
7504 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7505 kvm_mmu_destroy(vcpu
);
7506 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7507 free_page((unsigned long)vcpu
->arch
.pio_data
);
7508 if (!irqchip_in_kernel(vcpu
->kvm
))
7509 static_key_slow_dec(&kvm_no_apic_vcpu
);
7512 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
7514 kvm_x86_ops
->sched_in(vcpu
, cpu
);
7517 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
7522 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
7523 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
7524 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
7525 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
7526 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
7528 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7529 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
7530 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7531 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
7532 &kvm
->arch
.irq_sources_bitmap
);
7534 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
7535 mutex_init(&kvm
->arch
.apic_map_lock
);
7536 spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
7538 pvclock_update_vm_gtod_copy(kvm
);
7540 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
7541 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
7546 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
7549 r
= vcpu_load(vcpu
);
7551 kvm_mmu_unload(vcpu
);
7555 static void kvm_free_vcpus(struct kvm
*kvm
)
7558 struct kvm_vcpu
*vcpu
;
7561 * Unpin any mmu pages first.
7563 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7564 kvm_clear_async_pf_completion_queue(vcpu
);
7565 kvm_unload_vcpu_mmu(vcpu
);
7567 kvm_for_each_vcpu(i
, vcpu
, kvm
)
7568 kvm_arch_vcpu_free(vcpu
);
7570 mutex_lock(&kvm
->lock
);
7571 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
7572 kvm
->vcpus
[i
] = NULL
;
7574 atomic_set(&kvm
->online_vcpus
, 0);
7575 mutex_unlock(&kvm
->lock
);
7578 void kvm_arch_sync_events(struct kvm
*kvm
)
7580 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
7581 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
7582 kvm_free_all_assigned_devices(kvm
);
7586 void kvm_arch_destroy_vm(struct kvm
*kvm
)
7588 if (current
->mm
== kvm
->mm
) {
7590 * Free memory regions allocated on behalf of userspace,
7591 * unless the the memory map has changed due to process exit
7594 struct kvm_userspace_memory_region mem
;
7595 memset(&mem
, 0, sizeof(mem
));
7596 mem
.slot
= APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
;
7597 kvm_set_memory_region(kvm
, &mem
);
7599 mem
.slot
= IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
;
7600 kvm_set_memory_region(kvm
, &mem
);
7602 mem
.slot
= TSS_PRIVATE_MEMSLOT
;
7603 kvm_set_memory_region(kvm
, &mem
);
7605 kvm_iommu_unmap_guest(kvm
);
7606 kfree(kvm
->arch
.vpic
);
7607 kfree(kvm
->arch
.vioapic
);
7608 kvm_free_vcpus(kvm
);
7609 kfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
7612 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*free
,
7613 struct kvm_memory_slot
*dont
)
7617 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7618 if (!dont
|| free
->arch
.rmap
[i
] != dont
->arch
.rmap
[i
]) {
7619 kvfree(free
->arch
.rmap
[i
]);
7620 free
->arch
.rmap
[i
] = NULL
;
7625 if (!dont
|| free
->arch
.lpage_info
[i
- 1] !=
7626 dont
->arch
.lpage_info
[i
- 1]) {
7627 kvfree(free
->arch
.lpage_info
[i
- 1]);
7628 free
->arch
.lpage_info
[i
- 1] = NULL
;
7633 int kvm_arch_create_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
,
7634 unsigned long npages
)
7638 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7643 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
7644 slot
->base_gfn
, level
) + 1;
7646 slot
->arch
.rmap
[i
] =
7647 kvm_kvzalloc(lpages
* sizeof(*slot
->arch
.rmap
[i
]));
7648 if (!slot
->arch
.rmap
[i
])
7653 slot
->arch
.lpage_info
[i
- 1] = kvm_kvzalloc(lpages
*
7654 sizeof(*slot
->arch
.lpage_info
[i
- 1]));
7655 if (!slot
->arch
.lpage_info
[i
- 1])
7658 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
7659 slot
->arch
.lpage_info
[i
- 1][0].write_count
= 1;
7660 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
7661 slot
->arch
.lpage_info
[i
- 1][lpages
- 1].write_count
= 1;
7662 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
7664 * If the gfn and userspace address are not aligned wrt each
7665 * other, or if explicitly asked to, disable large page
7666 * support for this slot
7668 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1) ||
7669 !kvm_largepages_enabled()) {
7672 for (j
= 0; j
< lpages
; ++j
)
7673 slot
->arch
.lpage_info
[i
- 1][j
].write_count
= 1;
7680 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7681 kvfree(slot
->arch
.rmap
[i
]);
7682 slot
->arch
.rmap
[i
] = NULL
;
7686 kvfree(slot
->arch
.lpage_info
[i
- 1]);
7687 slot
->arch
.lpage_info
[i
- 1] = NULL
;
7692 void kvm_arch_memslots_updated(struct kvm
*kvm
, struct kvm_memslots
*slots
)
7695 * memslots->generation has been incremented.
7696 * mmio generation may have reached its maximum value.
7698 kvm_mmu_invalidate_mmio_sptes(kvm
);
7701 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
7702 struct kvm_memory_slot
*memslot
,
7703 const struct kvm_userspace_memory_region
*mem
,
7704 enum kvm_mr_change change
)
7707 * Only private memory slots need to be mapped here since
7708 * KVM_SET_MEMORY_REGION ioctl is no longer supported.
7710 if ((memslot
->id
>= KVM_USER_MEM_SLOTS
) && (change
== KVM_MR_CREATE
)) {
7711 unsigned long userspace_addr
;
7714 * MAP_SHARED to prevent internal slot pages from being moved
7717 userspace_addr
= vm_mmap(NULL
, 0, memslot
->npages
* PAGE_SIZE
,
7718 PROT_READ
| PROT_WRITE
,
7719 MAP_SHARED
| MAP_ANONYMOUS
, 0);
7721 if (IS_ERR((void *)userspace_addr
))
7722 return PTR_ERR((void *)userspace_addr
);
7724 memslot
->userspace_addr
= userspace_addr
;
7730 static void kvm_mmu_slot_apply_flags(struct kvm
*kvm
,
7731 struct kvm_memory_slot
*new)
7733 /* Still write protect RO slot */
7734 if (new->flags
& KVM_MEM_READONLY
) {
7735 kvm_mmu_slot_remove_write_access(kvm
, new);
7740 * Call kvm_x86_ops dirty logging hooks when they are valid.
7742 * kvm_x86_ops->slot_disable_log_dirty is called when:
7744 * - KVM_MR_CREATE with dirty logging is disabled
7745 * - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
7747 * The reason is, in case of PML, we need to set D-bit for any slots
7748 * with dirty logging disabled in order to eliminate unnecessary GPA
7749 * logging in PML buffer (and potential PML buffer full VMEXT). This
7750 * guarantees leaving PML enabled during guest's lifetime won't have
7751 * any additonal overhead from PML when guest is running with dirty
7752 * logging disabled for memory slots.
7754 * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
7755 * to dirty logging mode.
7757 * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
7759 * In case of write protect:
7761 * Write protect all pages for dirty logging.
7763 * All the sptes including the large sptes which point to this
7764 * slot are set to readonly. We can not create any new large
7765 * spte on this slot until the end of the logging.
7767 * See the comments in fast_page_fault().
7769 if (new->flags
& KVM_MEM_LOG_DIRTY_PAGES
) {
7770 if (kvm_x86_ops
->slot_enable_log_dirty
)
7771 kvm_x86_ops
->slot_enable_log_dirty(kvm
, new);
7773 kvm_mmu_slot_remove_write_access(kvm
, new);
7775 if (kvm_x86_ops
->slot_disable_log_dirty
)
7776 kvm_x86_ops
->slot_disable_log_dirty(kvm
, new);
7780 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
7781 const struct kvm_userspace_memory_region
*mem
,
7782 const struct kvm_memory_slot
*old
,
7783 enum kvm_mr_change change
)
7785 struct kvm_memslots
*slots
;
7786 struct kvm_memory_slot
*new;
7787 int nr_mmu_pages
= 0;
7789 if ((mem
->slot
>= KVM_USER_MEM_SLOTS
) && (change
== KVM_MR_DELETE
)) {
7792 ret
= vm_munmap(old
->userspace_addr
,
7793 old
->npages
* PAGE_SIZE
);
7796 "kvm_vm_ioctl_set_memory_region: "
7797 "failed to munmap memory\n");
7800 if (!kvm
->arch
.n_requested_mmu_pages
)
7801 nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
7804 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
7806 /* It's OK to get 'new' slot here as it has already been installed */
7807 slots
= kvm_memslots(kvm
);
7808 new = id_to_memslot(slots
, mem
->slot
);
7811 * Dirty logging tracks sptes in 4k granularity, meaning that large
7812 * sptes have to be split. If live migration is successful, the guest
7813 * in the source machine will be destroyed and large sptes will be
7814 * created in the destination. However, if the guest continues to run
7815 * in the source machine (for example if live migration fails), small
7816 * sptes will remain around and cause bad performance.
7818 * Scan sptes if dirty logging has been stopped, dropping those
7819 * which can be collapsed into a single large-page spte. Later
7820 * page faults will create the large-page sptes.
7822 if ((change
!= KVM_MR_DELETE
) &&
7823 (old
->flags
& KVM_MEM_LOG_DIRTY_PAGES
) &&
7824 !(new->flags
& KVM_MEM_LOG_DIRTY_PAGES
))
7825 kvm_mmu_zap_collapsible_sptes(kvm
, new);
7828 * Set up write protection and/or dirty logging for the new slot.
7830 * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
7831 * been zapped so no dirty logging staff is needed for old slot. For
7832 * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
7833 * new and it's also covered when dealing with the new slot.
7835 if (change
!= KVM_MR_DELETE
)
7836 kvm_mmu_slot_apply_flags(kvm
, new);
7839 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
7841 kvm_mmu_invalidate_zap_all_pages(kvm
);
7844 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
7845 struct kvm_memory_slot
*slot
)
7847 kvm_mmu_invalidate_zap_all_pages(kvm
);
7850 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
7852 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
)
7853 kvm_x86_ops
->check_nested_events(vcpu
, false);
7855 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
7856 !vcpu
->arch
.apf
.halted
)
7857 || !list_empty_careful(&vcpu
->async_pf
.done
)
7858 || kvm_apic_has_events(vcpu
)
7859 || vcpu
->arch
.pv
.pv_unhalted
7860 || atomic_read(&vcpu
->arch
.nmi_queued
) ||
7861 (kvm_arch_interrupt_allowed(vcpu
) &&
7862 kvm_cpu_has_interrupt(vcpu
));
7865 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
7867 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
7870 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
7872 return kvm_x86_ops
->interrupt_allowed(vcpu
);
7875 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
7877 if (is_64_bit_mode(vcpu
))
7878 return kvm_rip_read(vcpu
);
7879 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
7880 kvm_rip_read(vcpu
));
7882 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
7884 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
7886 return kvm_get_linear_rip(vcpu
) == linear_rip
;
7888 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
7890 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
7892 unsigned long rflags
;
7894 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
7895 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
7896 rflags
&= ~X86_EFLAGS_TF
;
7899 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
7901 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
7903 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
7904 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
7905 rflags
|= X86_EFLAGS_TF
;
7906 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
7909 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
7911 __kvm_set_rflags(vcpu
, rflags
);
7912 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7914 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
7916 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
7920 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
7924 r
= kvm_mmu_reload(vcpu
);
7928 if (!vcpu
->arch
.mmu
.direct_map
&&
7929 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
7932 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
7935 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
7937 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
7940 static inline u32
kvm_async_pf_next_probe(u32 key
)
7942 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
7945 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7947 u32 key
= kvm_async_pf_hash_fn(gfn
);
7949 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
7950 key
= kvm_async_pf_next_probe(key
);
7952 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
7955 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7958 u32 key
= kvm_async_pf_hash_fn(gfn
);
7960 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
7961 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
7962 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
7963 key
= kvm_async_pf_next_probe(key
);
7968 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7970 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
7973 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7977 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
7979 vcpu
->arch
.apf
.gfns
[i
] = ~0;
7981 j
= kvm_async_pf_next_probe(j
);
7982 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
7984 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
7986 * k lies cyclically in ]i,j]
7988 * |....j i.k.| or |.k..j i...|
7990 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
7991 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
7996 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
7999 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
8003 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
8004 struct kvm_async_pf
*work
)
8006 struct x86_exception fault
;
8008 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
8009 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8011 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
8012 (vcpu
->arch
.apf
.send_user_only
&&
8013 kvm_x86_ops
->get_cpl(vcpu
) == 0))
8014 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
8015 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
8016 fault
.vector
= PF_VECTOR
;
8017 fault
.error_code_valid
= true;
8018 fault
.error_code
= 0;
8019 fault
.nested_page_fault
= false;
8020 fault
.address
= work
->arch
.token
;
8021 kvm_inject_page_fault(vcpu
, &fault
);
8025 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
8026 struct kvm_async_pf
*work
)
8028 struct x86_exception fault
;
8030 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
8031 if (work
->wakeup_all
)
8032 work
->arch
.token
= ~0; /* broadcast wakeup */
8034 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8036 if ((vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) &&
8037 !apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
8038 fault
.vector
= PF_VECTOR
;
8039 fault
.error_code_valid
= true;
8040 fault
.error_code
= 0;
8041 fault
.nested_page_fault
= false;
8042 fault
.address
= work
->arch
.token
;
8043 kvm_inject_page_fault(vcpu
, &fault
);
8045 vcpu
->arch
.apf
.halted
= false;
8046 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
8049 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
8051 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
8054 return !kvm_event_needs_reinjection(vcpu
) &&
8055 kvm_x86_ops
->interrupt_allowed(vcpu
);
8058 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
8060 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
8062 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
8064 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
8066 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
8068 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
8070 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
8072 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
8074 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
8076 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
8077 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
8078 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
8079 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
8080 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
8081 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
8082 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
8083 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
8084 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
8085 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
8086 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
8087 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
8088 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
8089 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window
);
8090 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full
);