2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
21 #include <linux/kvm_host.h>
26 #include "kvm_cache_regs.h"
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
33 #include <linux/vmalloc.h>
34 #include <linux/module.h>
35 #include <linux/mman.h>
36 #include <linux/highmem.h>
37 #include <linux/iommu.h>
38 #include <linux/intel-iommu.h>
39 #include <linux/cpufreq.h>
40 #include <linux/user-return-notifier.h>
41 #include <linux/srcu.h>
42 #include <linux/slab.h>
43 #include <trace/events/kvm.h>
45 #define CREATE_TRACE_POINTS
48 #include <asm/debugreg.h>
49 #include <asm/uaccess.h>
55 #define MAX_IO_MSRS 256
56 #define CR0_RESERVED_BITS \
57 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
58 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
59 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
60 #define CR4_RESERVED_BITS \
61 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
62 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
63 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
64 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
66 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
68 #define KVM_MAX_MCE_BANKS 32
69 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
72 * - enable syscall per default because its emulated by KVM
73 * - enable LME and LMA per default on 64 bit KVM
76 static u64 __read_mostly efer_reserved_bits
= 0xfffffffffffffafeULL
;
78 static u64 __read_mostly efer_reserved_bits
= 0xfffffffffffffffeULL
;
81 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
82 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
84 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
85 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2
*cpuid
,
86 struct kvm_cpuid_entry2 __user
*entries
);
88 struct kvm_x86_ops
*kvm_x86_ops
;
89 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
92 module_param_named(ignore_msrs
, ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
94 #define KVM_NR_SHARED_MSRS 16
96 struct kvm_shared_msrs_global
{
98 u32 msrs
[KVM_NR_SHARED_MSRS
];
101 struct kvm_shared_msrs
{
102 struct user_return_notifier urn
;
104 struct kvm_shared_msr_values
{
107 } values
[KVM_NR_SHARED_MSRS
];
110 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
111 static DEFINE_PER_CPU(struct kvm_shared_msrs
, shared_msrs
);
113 struct kvm_stats_debugfs_item debugfs_entries
[] = {
114 { "pf_fixed", VCPU_STAT(pf_fixed
) },
115 { "pf_guest", VCPU_STAT(pf_guest
) },
116 { "tlb_flush", VCPU_STAT(tlb_flush
) },
117 { "invlpg", VCPU_STAT(invlpg
) },
118 { "exits", VCPU_STAT(exits
) },
119 { "io_exits", VCPU_STAT(io_exits
) },
120 { "mmio_exits", VCPU_STAT(mmio_exits
) },
121 { "signal_exits", VCPU_STAT(signal_exits
) },
122 { "irq_window", VCPU_STAT(irq_window_exits
) },
123 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
124 { "halt_exits", VCPU_STAT(halt_exits
) },
125 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
126 { "hypercalls", VCPU_STAT(hypercalls
) },
127 { "request_irq", VCPU_STAT(request_irq_exits
) },
128 { "irq_exits", VCPU_STAT(irq_exits
) },
129 { "host_state_reload", VCPU_STAT(host_state_reload
) },
130 { "efer_reload", VCPU_STAT(efer_reload
) },
131 { "fpu_reload", VCPU_STAT(fpu_reload
) },
132 { "insn_emulation", VCPU_STAT(insn_emulation
) },
133 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
134 { "irq_injections", VCPU_STAT(irq_injections
) },
135 { "nmi_injections", VCPU_STAT(nmi_injections
) },
136 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
137 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
138 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
139 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
140 { "mmu_flooded", VM_STAT(mmu_flooded
) },
141 { "mmu_recycled", VM_STAT(mmu_recycled
) },
142 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
143 { "mmu_unsync", VM_STAT(mmu_unsync
) },
144 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
145 { "largepages", VM_STAT(lpages
) },
149 static void kvm_on_user_return(struct user_return_notifier
*urn
)
152 struct kvm_shared_msrs
*locals
153 = container_of(urn
, struct kvm_shared_msrs
, urn
);
154 struct kvm_shared_msr_values
*values
;
156 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
157 values
= &locals
->values
[slot
];
158 if (values
->host
!= values
->curr
) {
159 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
160 values
->curr
= values
->host
;
163 locals
->registered
= false;
164 user_return_notifier_unregister(urn
);
167 static void shared_msr_update(unsigned slot
, u32 msr
)
169 struct kvm_shared_msrs
*smsr
;
172 smsr
= &__get_cpu_var(shared_msrs
);
173 /* only read, and nobody should modify it at this time,
174 * so don't need lock */
175 if (slot
>= shared_msrs_global
.nr
) {
176 printk(KERN_ERR
"kvm: invalid MSR slot!");
179 rdmsrl_safe(msr
, &value
);
180 smsr
->values
[slot
].host
= value
;
181 smsr
->values
[slot
].curr
= value
;
184 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
186 if (slot
>= shared_msrs_global
.nr
)
187 shared_msrs_global
.nr
= slot
+ 1;
188 shared_msrs_global
.msrs
[slot
] = msr
;
189 /* we need ensured the shared_msr_global have been updated */
192 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
194 static void kvm_shared_msr_cpu_online(void)
198 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
199 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
202 void kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
204 struct kvm_shared_msrs
*smsr
= &__get_cpu_var(shared_msrs
);
206 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
208 smsr
->values
[slot
].curr
= value
;
209 wrmsrl(shared_msrs_global
.msrs
[slot
], value
);
210 if (!smsr
->registered
) {
211 smsr
->urn
.on_user_return
= kvm_on_user_return
;
212 user_return_notifier_register(&smsr
->urn
);
213 smsr
->registered
= true;
216 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
218 static void drop_user_return_notifiers(void *ignore
)
220 struct kvm_shared_msrs
*smsr
= &__get_cpu_var(shared_msrs
);
222 if (smsr
->registered
)
223 kvm_on_user_return(&smsr
->urn
);
226 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
228 if (irqchip_in_kernel(vcpu
->kvm
))
229 return vcpu
->arch
.apic_base
;
231 return vcpu
->arch
.apic_base
;
233 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
235 void kvm_set_apic_base(struct kvm_vcpu
*vcpu
, u64 data
)
237 /* TODO: reserve bits check */
238 if (irqchip_in_kernel(vcpu
->kvm
))
239 kvm_lapic_set_base(vcpu
, data
);
241 vcpu
->arch
.apic_base
= data
;
243 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
245 #define EXCPT_BENIGN 0
246 #define EXCPT_CONTRIBUTORY 1
249 static int exception_class(int vector
)
259 return EXCPT_CONTRIBUTORY
;
266 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
267 unsigned nr
, bool has_error
, u32 error_code
)
272 if (!vcpu
->arch
.exception
.pending
) {
274 vcpu
->arch
.exception
.pending
= true;
275 vcpu
->arch
.exception
.has_error_code
= has_error
;
276 vcpu
->arch
.exception
.nr
= nr
;
277 vcpu
->arch
.exception
.error_code
= error_code
;
281 /* to check exception */
282 prev_nr
= vcpu
->arch
.exception
.nr
;
283 if (prev_nr
== DF_VECTOR
) {
284 /* triple fault -> shutdown */
285 set_bit(KVM_REQ_TRIPLE_FAULT
, &vcpu
->requests
);
288 class1
= exception_class(prev_nr
);
289 class2
= exception_class(nr
);
290 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
291 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
292 /* generate double fault per SDM Table 5-5 */
293 vcpu
->arch
.exception
.pending
= true;
294 vcpu
->arch
.exception
.has_error_code
= true;
295 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
296 vcpu
->arch
.exception
.error_code
= 0;
298 /* replace previous exception with a new one in a hope
299 that instruction re-execution will regenerate lost
304 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
306 kvm_multiple_exception(vcpu
, nr
, false, 0);
308 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
310 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, unsigned long addr
,
313 ++vcpu
->stat
.pf_guest
;
314 vcpu
->arch
.cr2
= addr
;
315 kvm_queue_exception_e(vcpu
, PF_VECTOR
, error_code
);
318 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
320 vcpu
->arch
.nmi_pending
= 1;
322 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
324 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
326 kvm_multiple_exception(vcpu
, nr
, true, error_code
);
328 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
331 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
332 * a #GP and return false.
334 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
336 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
338 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
341 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
344 * Load the pae pdptrs. Return true is they are all valid.
346 int load_pdptrs(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
348 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
349 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
352 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.pdptrs
)];
354 ret
= kvm_read_guest_page(vcpu
->kvm
, pdpt_gfn
, pdpte
,
355 offset
* sizeof(u64
), sizeof(pdpte
));
360 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
361 if (is_present_gpte(pdpte
[i
]) &&
362 (pdpte
[i
] & vcpu
->arch
.mmu
.rsvd_bits_mask
[0][2])) {
369 memcpy(vcpu
->arch
.pdptrs
, pdpte
, sizeof(vcpu
->arch
.pdptrs
));
370 __set_bit(VCPU_EXREG_PDPTR
,
371 (unsigned long *)&vcpu
->arch
.regs_avail
);
372 __set_bit(VCPU_EXREG_PDPTR
,
373 (unsigned long *)&vcpu
->arch
.regs_dirty
);
378 EXPORT_SYMBOL_GPL(load_pdptrs
);
380 static bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
382 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.pdptrs
)];
386 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
389 if (!test_bit(VCPU_EXREG_PDPTR
,
390 (unsigned long *)&vcpu
->arch
.regs_avail
))
393 r
= kvm_read_guest(vcpu
->kvm
, vcpu
->arch
.cr3
& ~31u, pdpte
, sizeof(pdpte
));
396 changed
= memcmp(pdpte
, vcpu
->arch
.pdptrs
, sizeof(pdpte
)) != 0;
402 void kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
407 if (cr0
& 0xffffffff00000000UL
) {
408 kvm_inject_gp(vcpu
, 0);
413 cr0
&= ~CR0_RESERVED_BITS
;
415 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
)) {
416 kvm_inject_gp(vcpu
, 0);
420 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
)) {
421 kvm_inject_gp(vcpu
, 0);
425 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
427 if ((vcpu
->arch
.efer
& EFER_LME
)) {
431 kvm_inject_gp(vcpu
, 0);
434 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
436 kvm_inject_gp(vcpu
, 0);
442 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.cr3
)) {
443 kvm_inject_gp(vcpu
, 0);
449 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
451 kvm_mmu_reset_context(vcpu
);
454 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
456 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
458 kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0ful
) | (msw
& 0x0f));
460 EXPORT_SYMBOL_GPL(kvm_lmsw
);
462 void kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
464 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
465 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
;
467 if (cr4
& CR4_RESERVED_BITS
) {
468 kvm_inject_gp(vcpu
, 0);
472 if (is_long_mode(vcpu
)) {
473 if (!(cr4
& X86_CR4_PAE
)) {
474 kvm_inject_gp(vcpu
, 0);
477 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
478 && ((cr4
^ old_cr4
) & pdptr_bits
)
479 && !load_pdptrs(vcpu
, vcpu
->arch
.cr3
)) {
480 kvm_inject_gp(vcpu
, 0);
484 if (cr4
& X86_CR4_VMXE
) {
485 kvm_inject_gp(vcpu
, 0);
488 kvm_x86_ops
->set_cr4(vcpu
, cr4
);
489 vcpu
->arch
.cr4
= cr4
;
490 vcpu
->arch
.mmu
.base_role
.cr4_pge
= (cr4
& X86_CR4_PGE
) && !tdp_enabled
;
491 kvm_mmu_reset_context(vcpu
);
493 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
495 void kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
497 if (cr3
== vcpu
->arch
.cr3
&& !pdptrs_changed(vcpu
)) {
498 kvm_mmu_sync_roots(vcpu
);
499 kvm_mmu_flush_tlb(vcpu
);
503 if (is_long_mode(vcpu
)) {
504 if (cr3
& CR3_L_MODE_RESERVED_BITS
) {
505 kvm_inject_gp(vcpu
, 0);
510 if (cr3
& CR3_PAE_RESERVED_BITS
) {
511 kvm_inject_gp(vcpu
, 0);
514 if (is_paging(vcpu
) && !load_pdptrs(vcpu
, cr3
)) {
515 kvm_inject_gp(vcpu
, 0);
520 * We don't check reserved bits in nonpae mode, because
521 * this isn't enforced, and VMware depends on this.
526 * Does the new cr3 value map to physical memory? (Note, we
527 * catch an invalid cr3 even in real-mode, because it would
528 * cause trouble later on when we turn on paging anyway.)
530 * A real CPU would silently accept an invalid cr3 and would
531 * attempt to use it - with largely undefined (and often hard
532 * to debug) behavior on the guest side.
534 if (unlikely(!gfn_to_memslot(vcpu
->kvm
, cr3
>> PAGE_SHIFT
)))
535 kvm_inject_gp(vcpu
, 0);
537 vcpu
->arch
.cr3
= cr3
;
538 vcpu
->arch
.mmu
.new_cr3(vcpu
);
541 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
543 void kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
545 if (cr8
& CR8_RESERVED_BITS
) {
546 kvm_inject_gp(vcpu
, 0);
549 if (irqchip_in_kernel(vcpu
->kvm
))
550 kvm_lapic_set_tpr(vcpu
, cr8
);
552 vcpu
->arch
.cr8
= cr8
;
554 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
556 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
558 if (irqchip_in_kernel(vcpu
->kvm
))
559 return kvm_lapic_get_cr8(vcpu
);
561 return vcpu
->arch
.cr8
;
563 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
565 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
569 vcpu
->arch
.db
[dr
] = val
;
570 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
571 vcpu
->arch
.eff_db
[dr
] = val
;
574 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
)) {
575 kvm_queue_exception(vcpu
, UD_VECTOR
);
580 if (val
& 0xffffffff00000000ULL
) {
581 kvm_inject_gp(vcpu
, 0);
584 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | DR6_FIXED_1
;
587 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
)) {
588 kvm_queue_exception(vcpu
, UD_VECTOR
);
593 if (val
& 0xffffffff00000000ULL
) {
594 kvm_inject_gp(vcpu
, 0);
597 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
598 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
599 kvm_x86_ops
->set_dr7(vcpu
, vcpu
->arch
.dr7
);
600 vcpu
->arch
.switch_db_regs
= (val
& DR7_BP_EN_MASK
);
607 EXPORT_SYMBOL_GPL(kvm_set_dr
);
609 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
613 *val
= vcpu
->arch
.db
[dr
];
616 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
)) {
617 kvm_queue_exception(vcpu
, UD_VECTOR
);
622 *val
= vcpu
->arch
.dr6
;
625 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
)) {
626 kvm_queue_exception(vcpu
, UD_VECTOR
);
631 *val
= vcpu
->arch
.dr7
;
637 EXPORT_SYMBOL_GPL(kvm_get_dr
);
639 static inline u32
bit(int bitno
)
641 return 1 << (bitno
& 31);
645 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
646 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
648 * This list is modified at module load time to reflect the
649 * capabilities of the host cpu. This capabilities test skips MSRs that are
650 * kvm-specific. Those are put in the beginning of the list.
653 #define KVM_SAVE_MSRS_BEGIN 5
654 static u32 msrs_to_save
[] = {
655 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
656 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
657 HV_X64_MSR_APIC_ASSIST_PAGE
,
658 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
661 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
663 MSR_IA32_TSC
, MSR_IA32_PERF_STATUS
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
666 static unsigned num_msrs_to_save
;
668 static u32 emulated_msrs
[] = {
669 MSR_IA32_MISC_ENABLE
,
672 static void set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
674 if (efer
& efer_reserved_bits
) {
675 kvm_inject_gp(vcpu
, 0);
680 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
)) {
681 kvm_inject_gp(vcpu
, 0);
685 if (efer
& EFER_FFXSR
) {
686 struct kvm_cpuid_entry2
*feat
;
688 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
689 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
))) {
690 kvm_inject_gp(vcpu
, 0);
695 if (efer
& EFER_SVME
) {
696 struct kvm_cpuid_entry2
*feat
;
698 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
699 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
))) {
700 kvm_inject_gp(vcpu
, 0);
705 kvm_x86_ops
->set_efer(vcpu
, efer
);
708 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
710 vcpu
->arch
.efer
= efer
;
712 vcpu
->arch
.mmu
.base_role
.nxe
= (efer
& EFER_NX
) && !tdp_enabled
;
713 kvm_mmu_reset_context(vcpu
);
716 void kvm_enable_efer_bits(u64 mask
)
718 efer_reserved_bits
&= ~mask
;
720 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
724 * Writes msr value into into the appropriate "register".
725 * Returns 0 on success, non-0 otherwise.
726 * Assumes vcpu_load() was already called.
728 int kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64 data
)
730 return kvm_x86_ops
->set_msr(vcpu
, msr_index
, data
);
734 * Adapt set_msr() to msr_io()'s calling convention
736 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
738 return kvm_set_msr(vcpu
, index
, *data
);
741 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
744 struct pvclock_wall_clock wc
;
745 struct timespec boot
;
752 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
755 * The guest calculates current wall clock time by adding
756 * system time (updated by kvm_write_guest_time below) to the
757 * wall clock specified here. guest system time equals host
758 * system time for us, thus we must fill in host boot time here.
762 wc
.sec
= boot
.tv_sec
;
763 wc
.nsec
= boot
.tv_nsec
;
764 wc
.version
= version
;
766 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
769 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
772 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
774 uint32_t quotient
, remainder
;
776 /* Don't try to replace with do_div(), this one calculates
777 * "(dividend << 32) / divisor" */
779 : "=a" (quotient
), "=d" (remainder
)
780 : "0" (0), "1" (dividend
), "r" (divisor
) );
784 static void kvm_set_time_scale(uint32_t tsc_khz
, struct pvclock_vcpu_time_info
*hv_clock
)
786 uint64_t nsecs
= 1000000000LL;
791 tps64
= tsc_khz
* 1000LL;
792 while (tps64
> nsecs
*2) {
797 tps32
= (uint32_t)tps64
;
798 while (tps32
<= (uint32_t)nsecs
) {
803 hv_clock
->tsc_shift
= shift
;
804 hv_clock
->tsc_to_system_mul
= div_frac(nsecs
, tps32
);
806 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
807 __func__
, tsc_khz
, hv_clock
->tsc_shift
,
808 hv_clock
->tsc_to_system_mul
);
811 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
813 static void kvm_write_guest_time(struct kvm_vcpu
*v
)
817 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
819 unsigned long this_tsc_khz
;
821 if ((!vcpu
->time_page
))
824 this_tsc_khz
= get_cpu_var(cpu_tsc_khz
);
825 if (unlikely(vcpu
->hv_clock_tsc_khz
!= this_tsc_khz
)) {
826 kvm_set_time_scale(this_tsc_khz
, &vcpu
->hv_clock
);
827 vcpu
->hv_clock_tsc_khz
= this_tsc_khz
;
829 put_cpu_var(cpu_tsc_khz
);
831 /* Keep irq disabled to prevent changes to the clock */
832 local_irq_save(flags
);
833 kvm_get_msr(v
, MSR_IA32_TSC
, &vcpu
->hv_clock
.tsc_timestamp
);
835 monotonic_to_bootbased(&ts
);
836 local_irq_restore(flags
);
838 /* With all the info we got, fill in the values */
840 vcpu
->hv_clock
.system_time
= ts
.tv_nsec
+
841 (NSEC_PER_SEC
* (u64
)ts
.tv_sec
) + v
->kvm
->arch
.kvmclock_offset
;
844 * The interface expects us to write an even number signaling that the
845 * update is finished. Since the guest won't see the intermediate
846 * state, we just increase by 2 at the end.
848 vcpu
->hv_clock
.version
+= 2;
850 shared_kaddr
= kmap_atomic(vcpu
->time_page
, KM_USER0
);
852 memcpy(shared_kaddr
+ vcpu
->time_offset
, &vcpu
->hv_clock
,
853 sizeof(vcpu
->hv_clock
));
855 kunmap_atomic(shared_kaddr
, KM_USER0
);
857 mark_page_dirty(v
->kvm
, vcpu
->time
>> PAGE_SHIFT
);
860 static int kvm_request_guest_time_update(struct kvm_vcpu
*v
)
862 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
864 if (!vcpu
->time_page
)
866 set_bit(KVM_REQ_KVMCLOCK_UPDATE
, &v
->requests
);
870 static bool msr_mtrr_valid(unsigned msr
)
873 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR
- 1:
874 case MSR_MTRRfix64K_00000
:
875 case MSR_MTRRfix16K_80000
:
876 case MSR_MTRRfix16K_A0000
:
877 case MSR_MTRRfix4K_C0000
:
878 case MSR_MTRRfix4K_C8000
:
879 case MSR_MTRRfix4K_D0000
:
880 case MSR_MTRRfix4K_D8000
:
881 case MSR_MTRRfix4K_E0000
:
882 case MSR_MTRRfix4K_E8000
:
883 case MSR_MTRRfix4K_F0000
:
884 case MSR_MTRRfix4K_F8000
:
885 case MSR_MTRRdefType
:
886 case MSR_IA32_CR_PAT
:
894 static bool valid_pat_type(unsigned t
)
896 return t
< 8 && (1 << t
) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
899 static bool valid_mtrr_type(unsigned t
)
901 return t
< 8 && (1 << t
) & 0x73; /* 0, 1, 4, 5, 6 */
904 static bool mtrr_valid(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
908 if (!msr_mtrr_valid(msr
))
911 if (msr
== MSR_IA32_CR_PAT
) {
912 for (i
= 0; i
< 8; i
++)
913 if (!valid_pat_type((data
>> (i
* 8)) & 0xff))
916 } else if (msr
== MSR_MTRRdefType
) {
919 return valid_mtrr_type(data
& 0xff);
920 } else if (msr
>= MSR_MTRRfix64K_00000
&& msr
<= MSR_MTRRfix4K_F8000
) {
921 for (i
= 0; i
< 8 ; i
++)
922 if (!valid_mtrr_type((data
>> (i
* 8)) & 0xff))
928 return valid_mtrr_type(data
& 0xff);
931 static int set_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
933 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
935 if (!mtrr_valid(vcpu
, msr
, data
))
938 if (msr
== MSR_MTRRdefType
) {
939 vcpu
->arch
.mtrr_state
.def_type
= data
;
940 vcpu
->arch
.mtrr_state
.enabled
= (data
& 0xc00) >> 10;
941 } else if (msr
== MSR_MTRRfix64K_00000
)
943 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
944 p
[1 + msr
- MSR_MTRRfix16K_80000
] = data
;
945 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
946 p
[3 + msr
- MSR_MTRRfix4K_C0000
] = data
;
947 else if (msr
== MSR_IA32_CR_PAT
)
948 vcpu
->arch
.pat
= data
;
949 else { /* Variable MTRRs */
950 int idx
, is_mtrr_mask
;
953 idx
= (msr
- 0x200) / 2;
954 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
957 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
960 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
964 kvm_mmu_reset_context(vcpu
);
968 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
970 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
971 unsigned bank_num
= mcg_cap
& 0xff;
974 case MSR_IA32_MCG_STATUS
:
975 vcpu
->arch
.mcg_status
= data
;
977 case MSR_IA32_MCG_CTL
:
978 if (!(mcg_cap
& MCG_CTL_P
))
980 if (data
!= 0 && data
!= ~(u64
)0)
982 vcpu
->arch
.mcg_ctl
= data
;
985 if (msr
>= MSR_IA32_MC0_CTL
&&
986 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
987 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
988 /* only 0 or all 1s can be written to IA32_MCi_CTL
989 * some Linux kernels though clear bit 10 in bank 4 to
990 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
991 * this to avoid an uncatched #GP in the guest
993 if ((offset
& 0x3) == 0 &&
994 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
996 vcpu
->arch
.mce_banks
[offset
] = data
;
1004 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
1006 struct kvm
*kvm
= vcpu
->kvm
;
1007 int lm
= is_long_mode(vcpu
);
1008 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
1009 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
1010 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
1011 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
1012 u32 page_num
= data
& ~PAGE_MASK
;
1013 u64 page_addr
= data
& PAGE_MASK
;
1018 if (page_num
>= blob_size
)
1021 page
= kzalloc(PAGE_SIZE
, GFP_KERNEL
);
1025 if (copy_from_user(page
, blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
))
1027 if (kvm_write_guest(kvm
, page_addr
, page
, PAGE_SIZE
))
1036 static bool kvm_hv_hypercall_enabled(struct kvm
*kvm
)
1038 return kvm
->arch
.hv_hypercall
& HV_X64_MSR_HYPERCALL_ENABLE
;
1041 static bool kvm_hv_msr_partition_wide(u32 msr
)
1045 case HV_X64_MSR_GUEST_OS_ID
:
1046 case HV_X64_MSR_HYPERCALL
:
1054 static int set_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1056 struct kvm
*kvm
= vcpu
->kvm
;
1059 case HV_X64_MSR_GUEST_OS_ID
:
1060 kvm
->arch
.hv_guest_os_id
= data
;
1061 /* setting guest os id to zero disables hypercall page */
1062 if (!kvm
->arch
.hv_guest_os_id
)
1063 kvm
->arch
.hv_hypercall
&= ~HV_X64_MSR_HYPERCALL_ENABLE
;
1065 case HV_X64_MSR_HYPERCALL
: {
1070 /* if guest os id is not set hypercall should remain disabled */
1071 if (!kvm
->arch
.hv_guest_os_id
)
1073 if (!(data
& HV_X64_MSR_HYPERCALL_ENABLE
)) {
1074 kvm
->arch
.hv_hypercall
= data
;
1077 gfn
= data
>> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT
;
1078 addr
= gfn_to_hva(kvm
, gfn
);
1079 if (kvm_is_error_hva(addr
))
1081 kvm_x86_ops
->patch_hypercall(vcpu
, instructions
);
1082 ((unsigned char *)instructions
)[3] = 0xc3; /* ret */
1083 if (copy_to_user((void __user
*)addr
, instructions
, 4))
1085 kvm
->arch
.hv_hypercall
= data
;
1089 pr_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1090 "data 0x%llx\n", msr
, data
);
1096 static int set_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1099 case HV_X64_MSR_APIC_ASSIST_PAGE
: {
1102 if (!(data
& HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE
)) {
1103 vcpu
->arch
.hv_vapic
= data
;
1106 addr
= gfn_to_hva(vcpu
->kvm
, data
>>
1107 HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT
);
1108 if (kvm_is_error_hva(addr
))
1110 if (clear_user((void __user
*)addr
, PAGE_SIZE
))
1112 vcpu
->arch
.hv_vapic
= data
;
1115 case HV_X64_MSR_EOI
:
1116 return kvm_hv_vapic_msr_write(vcpu
, APIC_EOI
, data
);
1117 case HV_X64_MSR_ICR
:
1118 return kvm_hv_vapic_msr_write(vcpu
, APIC_ICR
, data
);
1119 case HV_X64_MSR_TPR
:
1120 return kvm_hv_vapic_msr_write(vcpu
, APIC_TASKPRI
, data
);
1122 pr_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1123 "data 0x%llx\n", msr
, data
);
1130 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1134 set_efer(vcpu
, data
);
1137 data
&= ~(u64
)0x40; /* ignore flush filter disable */
1138 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
1140 pr_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
1145 case MSR_FAM10H_MMIO_CONF_BASE
:
1147 pr_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
1152 case MSR_AMD64_NB_CFG
:
1154 case MSR_IA32_DEBUGCTLMSR
:
1156 /* We support the non-activated case already */
1158 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
1159 /* Values other than LBR and BTF are vendor-specific,
1160 thus reserved and should throw a #GP */
1163 pr_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1166 case MSR_IA32_UCODE_REV
:
1167 case MSR_IA32_UCODE_WRITE
:
1168 case MSR_VM_HSAVE_PA
:
1169 case MSR_AMD64_PATCH_LOADER
:
1171 case 0x200 ... 0x2ff:
1172 return set_msr_mtrr(vcpu
, msr
, data
);
1173 case MSR_IA32_APICBASE
:
1174 kvm_set_apic_base(vcpu
, data
);
1176 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
1177 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
1178 case MSR_IA32_MISC_ENABLE
:
1179 vcpu
->arch
.ia32_misc_enable_msr
= data
;
1181 case MSR_KVM_WALL_CLOCK
:
1182 vcpu
->kvm
->arch
.wall_clock
= data
;
1183 kvm_write_wall_clock(vcpu
->kvm
, data
);
1185 case MSR_KVM_SYSTEM_TIME
: {
1186 if (vcpu
->arch
.time_page
) {
1187 kvm_release_page_dirty(vcpu
->arch
.time_page
);
1188 vcpu
->arch
.time_page
= NULL
;
1191 vcpu
->arch
.time
= data
;
1193 /* we verify if the enable bit is set... */
1197 /* ...but clean it before doing the actual write */
1198 vcpu
->arch
.time_offset
= data
& ~(PAGE_MASK
| 1);
1200 vcpu
->arch
.time_page
=
1201 gfn_to_page(vcpu
->kvm
, data
>> PAGE_SHIFT
);
1203 if (is_error_page(vcpu
->arch
.time_page
)) {
1204 kvm_release_page_clean(vcpu
->arch
.time_page
);
1205 vcpu
->arch
.time_page
= NULL
;
1208 kvm_request_guest_time_update(vcpu
);
1211 case MSR_IA32_MCG_CTL
:
1212 case MSR_IA32_MCG_STATUS
:
1213 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
1214 return set_msr_mce(vcpu
, msr
, data
);
1216 /* Performance counters are not protected by a CPUID bit,
1217 * so we should check all of them in the generic path for the sake of
1218 * cross vendor migration.
1219 * Writing a zero into the event select MSRs disables them,
1220 * which we perfectly emulate ;-). Any other value should be at least
1221 * reported, some guests depend on them.
1223 case MSR_P6_EVNTSEL0
:
1224 case MSR_P6_EVNTSEL1
:
1225 case MSR_K7_EVNTSEL0
:
1226 case MSR_K7_EVNTSEL1
:
1227 case MSR_K7_EVNTSEL2
:
1228 case MSR_K7_EVNTSEL3
:
1230 pr_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
1231 "0x%x data 0x%llx\n", msr
, data
);
1233 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1234 * so we ignore writes to make it happy.
1236 case MSR_P6_PERFCTR0
:
1237 case MSR_P6_PERFCTR1
:
1238 case MSR_K7_PERFCTR0
:
1239 case MSR_K7_PERFCTR1
:
1240 case MSR_K7_PERFCTR2
:
1241 case MSR_K7_PERFCTR3
:
1242 pr_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
1243 "0x%x data 0x%llx\n", msr
, data
);
1245 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
1246 if (kvm_hv_msr_partition_wide(msr
)) {
1248 mutex_lock(&vcpu
->kvm
->lock
);
1249 r
= set_msr_hyperv_pw(vcpu
, msr
, data
);
1250 mutex_unlock(&vcpu
->kvm
->lock
);
1253 return set_msr_hyperv(vcpu
, msr
, data
);
1256 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
1257 return xen_hvm_config(vcpu
, data
);
1259 pr_unimpl(vcpu
, "unhandled wrmsr: 0x%x data %llx\n",
1263 pr_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n",
1270 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
1274 * Reads an msr value (of 'msr_index') into 'pdata'.
1275 * Returns 0 on success, non-0 otherwise.
1276 * Assumes vcpu_load() was already called.
1278 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
1280 return kvm_x86_ops
->get_msr(vcpu
, msr_index
, pdata
);
1283 static int get_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1285 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
1287 if (!msr_mtrr_valid(msr
))
1290 if (msr
== MSR_MTRRdefType
)
1291 *pdata
= vcpu
->arch
.mtrr_state
.def_type
+
1292 (vcpu
->arch
.mtrr_state
.enabled
<< 10);
1293 else if (msr
== MSR_MTRRfix64K_00000
)
1295 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
1296 *pdata
= p
[1 + msr
- MSR_MTRRfix16K_80000
];
1297 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
1298 *pdata
= p
[3 + msr
- MSR_MTRRfix4K_C0000
];
1299 else if (msr
== MSR_IA32_CR_PAT
)
1300 *pdata
= vcpu
->arch
.pat
;
1301 else { /* Variable MTRRs */
1302 int idx
, is_mtrr_mask
;
1305 idx
= (msr
- 0x200) / 2;
1306 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
1309 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
1312 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
1319 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1322 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1323 unsigned bank_num
= mcg_cap
& 0xff;
1326 case MSR_IA32_P5_MC_ADDR
:
1327 case MSR_IA32_P5_MC_TYPE
:
1330 case MSR_IA32_MCG_CAP
:
1331 data
= vcpu
->arch
.mcg_cap
;
1333 case MSR_IA32_MCG_CTL
:
1334 if (!(mcg_cap
& MCG_CTL_P
))
1336 data
= vcpu
->arch
.mcg_ctl
;
1338 case MSR_IA32_MCG_STATUS
:
1339 data
= vcpu
->arch
.mcg_status
;
1342 if (msr
>= MSR_IA32_MC0_CTL
&&
1343 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
1344 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1345 data
= vcpu
->arch
.mce_banks
[offset
];
1354 static int get_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1357 struct kvm
*kvm
= vcpu
->kvm
;
1360 case HV_X64_MSR_GUEST_OS_ID
:
1361 data
= kvm
->arch
.hv_guest_os_id
;
1363 case HV_X64_MSR_HYPERCALL
:
1364 data
= kvm
->arch
.hv_hypercall
;
1367 pr_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
1375 static int get_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1380 case HV_X64_MSR_VP_INDEX
: {
1383 kvm_for_each_vcpu(r
, v
, vcpu
->kvm
)
1388 case HV_X64_MSR_EOI
:
1389 return kvm_hv_vapic_msr_read(vcpu
, APIC_EOI
, pdata
);
1390 case HV_X64_MSR_ICR
:
1391 return kvm_hv_vapic_msr_read(vcpu
, APIC_ICR
, pdata
);
1392 case HV_X64_MSR_TPR
:
1393 return kvm_hv_vapic_msr_read(vcpu
, APIC_TASKPRI
, pdata
);
1395 pr_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
1402 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1407 case MSR_IA32_PLATFORM_ID
:
1408 case MSR_IA32_UCODE_REV
:
1409 case MSR_IA32_EBL_CR_POWERON
:
1410 case MSR_IA32_DEBUGCTLMSR
:
1411 case MSR_IA32_LASTBRANCHFROMIP
:
1412 case MSR_IA32_LASTBRANCHTOIP
:
1413 case MSR_IA32_LASTINTFROMIP
:
1414 case MSR_IA32_LASTINTTOIP
:
1417 case MSR_VM_HSAVE_PA
:
1418 case MSR_P6_PERFCTR0
:
1419 case MSR_P6_PERFCTR1
:
1420 case MSR_P6_EVNTSEL0
:
1421 case MSR_P6_EVNTSEL1
:
1422 case MSR_K7_EVNTSEL0
:
1423 case MSR_K7_PERFCTR0
:
1424 case MSR_K8_INT_PENDING_MSG
:
1425 case MSR_AMD64_NB_CFG
:
1426 case MSR_FAM10H_MMIO_CONF_BASE
:
1430 data
= 0x500 | KVM_NR_VAR_MTRR
;
1432 case 0x200 ... 0x2ff:
1433 return get_msr_mtrr(vcpu
, msr
, pdata
);
1434 case 0xcd: /* fsb frequency */
1437 case MSR_IA32_APICBASE
:
1438 data
= kvm_get_apic_base(vcpu
);
1440 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
1441 return kvm_x2apic_msr_read(vcpu
, msr
, pdata
);
1443 case MSR_IA32_MISC_ENABLE
:
1444 data
= vcpu
->arch
.ia32_misc_enable_msr
;
1446 case MSR_IA32_PERF_STATUS
:
1447 /* TSC increment by tick */
1449 /* CPU multiplier */
1450 data
|= (((uint64_t)4ULL) << 40);
1453 data
= vcpu
->arch
.efer
;
1455 case MSR_KVM_WALL_CLOCK
:
1456 data
= vcpu
->kvm
->arch
.wall_clock
;
1458 case MSR_KVM_SYSTEM_TIME
:
1459 data
= vcpu
->arch
.time
;
1461 case MSR_IA32_P5_MC_ADDR
:
1462 case MSR_IA32_P5_MC_TYPE
:
1463 case MSR_IA32_MCG_CAP
:
1464 case MSR_IA32_MCG_CTL
:
1465 case MSR_IA32_MCG_STATUS
:
1466 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
1467 return get_msr_mce(vcpu
, msr
, pdata
);
1468 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
1469 if (kvm_hv_msr_partition_wide(msr
)) {
1471 mutex_lock(&vcpu
->kvm
->lock
);
1472 r
= get_msr_hyperv_pw(vcpu
, msr
, pdata
);
1473 mutex_unlock(&vcpu
->kvm
->lock
);
1476 return get_msr_hyperv(vcpu
, msr
, pdata
);
1480 pr_unimpl(vcpu
, "unhandled rdmsr: 0x%x\n", msr
);
1483 pr_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr
);
1491 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
1494 * Read or write a bunch of msrs. All parameters are kernel addresses.
1496 * @return number of msrs set successfully.
1498 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
1499 struct kvm_msr_entry
*entries
,
1500 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
1501 unsigned index
, u64
*data
))
1507 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
1508 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
1509 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
1511 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
1519 * Read or write a bunch of msrs. Parameters are user addresses.
1521 * @return number of msrs set successfully.
1523 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
1524 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
1525 unsigned index
, u64
*data
),
1528 struct kvm_msrs msrs
;
1529 struct kvm_msr_entry
*entries
;
1534 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
1538 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
1542 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
1543 entries
= vmalloc(size
);
1548 if (copy_from_user(entries
, user_msrs
->entries
, size
))
1551 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
1556 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
1567 int kvm_dev_ioctl_check_extension(long ext
)
1572 case KVM_CAP_IRQCHIP
:
1574 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
1575 case KVM_CAP_SET_TSS_ADDR
:
1576 case KVM_CAP_EXT_CPUID
:
1577 case KVM_CAP_CLOCKSOURCE
:
1579 case KVM_CAP_NOP_IO_DELAY
:
1580 case KVM_CAP_MP_STATE
:
1581 case KVM_CAP_SYNC_MMU
:
1582 case KVM_CAP_REINJECT_CONTROL
:
1583 case KVM_CAP_IRQ_INJECT_STATUS
:
1584 case KVM_CAP_ASSIGN_DEV_IRQ
:
1586 case KVM_CAP_IOEVENTFD
:
1588 case KVM_CAP_PIT_STATE2
:
1589 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
1590 case KVM_CAP_XEN_HVM
:
1591 case KVM_CAP_ADJUST_CLOCK
:
1592 case KVM_CAP_VCPU_EVENTS
:
1593 case KVM_CAP_HYPERV
:
1594 case KVM_CAP_HYPERV_VAPIC
:
1595 case KVM_CAP_HYPERV_SPIN
:
1596 case KVM_CAP_PCI_SEGMENT
:
1597 case KVM_CAP_DEBUGREGS
:
1598 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
1601 case KVM_CAP_COALESCED_MMIO
:
1602 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
1605 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
1607 case KVM_CAP_NR_VCPUS
:
1610 case KVM_CAP_NR_MEMSLOTS
:
1611 r
= KVM_MEMORY_SLOTS
;
1613 case KVM_CAP_PV_MMU
: /* obsolete */
1620 r
= KVM_MAX_MCE_BANKS
;
1630 long kvm_arch_dev_ioctl(struct file
*filp
,
1631 unsigned int ioctl
, unsigned long arg
)
1633 void __user
*argp
= (void __user
*)arg
;
1637 case KVM_GET_MSR_INDEX_LIST
: {
1638 struct kvm_msr_list __user
*user_msr_list
= argp
;
1639 struct kvm_msr_list msr_list
;
1643 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
1646 msr_list
.nmsrs
= num_msrs_to_save
+ ARRAY_SIZE(emulated_msrs
);
1647 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
1650 if (n
< msr_list
.nmsrs
)
1653 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
1654 num_msrs_to_save
* sizeof(u32
)))
1656 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
1658 ARRAY_SIZE(emulated_msrs
) * sizeof(u32
)))
1663 case KVM_GET_SUPPORTED_CPUID
: {
1664 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
1665 struct kvm_cpuid2 cpuid
;
1668 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
1670 r
= kvm_dev_ioctl_get_supported_cpuid(&cpuid
,
1671 cpuid_arg
->entries
);
1676 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
1681 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
1684 mce_cap
= KVM_MCE_CAP_SUPPORTED
;
1686 if (copy_to_user(argp
, &mce_cap
, sizeof mce_cap
))
1698 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
1700 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
1701 if (unlikely(per_cpu(cpu_tsc_khz
, cpu
) == 0)) {
1702 unsigned long khz
= cpufreq_quick_get(cpu
);
1705 per_cpu(cpu_tsc_khz
, cpu
) = khz
;
1707 kvm_request_guest_time_update(vcpu
);
1710 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
1712 kvm_put_guest_fpu(vcpu
);
1713 kvm_x86_ops
->vcpu_put(vcpu
);
1716 static int is_efer_nx(void)
1718 unsigned long long efer
= 0;
1720 rdmsrl_safe(MSR_EFER
, &efer
);
1721 return efer
& EFER_NX
;
1724 static void cpuid_fix_nx_cap(struct kvm_vcpu
*vcpu
)
1727 struct kvm_cpuid_entry2
*e
, *entry
;
1730 for (i
= 0; i
< vcpu
->arch
.cpuid_nent
; ++i
) {
1731 e
= &vcpu
->arch
.cpuid_entries
[i
];
1732 if (e
->function
== 0x80000001) {
1737 if (entry
&& (entry
->edx
& (1 << 20)) && !is_efer_nx()) {
1738 entry
->edx
&= ~(1 << 20);
1739 printk(KERN_INFO
"kvm: guest NX capability removed\n");
1743 /* when an old userspace process fills a new kernel module */
1744 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu
*vcpu
,
1745 struct kvm_cpuid
*cpuid
,
1746 struct kvm_cpuid_entry __user
*entries
)
1749 struct kvm_cpuid_entry
*cpuid_entries
;
1752 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
1755 cpuid_entries
= vmalloc(sizeof(struct kvm_cpuid_entry
) * cpuid
->nent
);
1759 if (copy_from_user(cpuid_entries
, entries
,
1760 cpuid
->nent
* sizeof(struct kvm_cpuid_entry
)))
1762 for (i
= 0; i
< cpuid
->nent
; i
++) {
1763 vcpu
->arch
.cpuid_entries
[i
].function
= cpuid_entries
[i
].function
;
1764 vcpu
->arch
.cpuid_entries
[i
].eax
= cpuid_entries
[i
].eax
;
1765 vcpu
->arch
.cpuid_entries
[i
].ebx
= cpuid_entries
[i
].ebx
;
1766 vcpu
->arch
.cpuid_entries
[i
].ecx
= cpuid_entries
[i
].ecx
;
1767 vcpu
->arch
.cpuid_entries
[i
].edx
= cpuid_entries
[i
].edx
;
1768 vcpu
->arch
.cpuid_entries
[i
].index
= 0;
1769 vcpu
->arch
.cpuid_entries
[i
].flags
= 0;
1770 vcpu
->arch
.cpuid_entries
[i
].padding
[0] = 0;
1771 vcpu
->arch
.cpuid_entries
[i
].padding
[1] = 0;
1772 vcpu
->arch
.cpuid_entries
[i
].padding
[2] = 0;
1774 vcpu
->arch
.cpuid_nent
= cpuid
->nent
;
1775 cpuid_fix_nx_cap(vcpu
);
1777 kvm_apic_set_version(vcpu
);
1778 kvm_x86_ops
->cpuid_update(vcpu
);
1781 vfree(cpuid_entries
);
1786 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu
*vcpu
,
1787 struct kvm_cpuid2
*cpuid
,
1788 struct kvm_cpuid_entry2 __user
*entries
)
1793 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
1796 if (copy_from_user(&vcpu
->arch
.cpuid_entries
, entries
,
1797 cpuid
->nent
* sizeof(struct kvm_cpuid_entry2
)))
1799 vcpu
->arch
.cpuid_nent
= cpuid
->nent
;
1800 kvm_apic_set_version(vcpu
);
1801 kvm_x86_ops
->cpuid_update(vcpu
);
1808 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu
*vcpu
,
1809 struct kvm_cpuid2
*cpuid
,
1810 struct kvm_cpuid_entry2 __user
*entries
)
1815 if (cpuid
->nent
< vcpu
->arch
.cpuid_nent
)
1818 if (copy_to_user(entries
, &vcpu
->arch
.cpuid_entries
,
1819 vcpu
->arch
.cpuid_nent
* sizeof(struct kvm_cpuid_entry2
)))
1824 cpuid
->nent
= vcpu
->arch
.cpuid_nent
;
1828 static void do_cpuid_1_ent(struct kvm_cpuid_entry2
*entry
, u32 function
,
1831 entry
->function
= function
;
1832 entry
->index
= index
;
1833 cpuid_count(entry
->function
, entry
->index
,
1834 &entry
->eax
, &entry
->ebx
, &entry
->ecx
, &entry
->edx
);
1838 #define F(x) bit(X86_FEATURE_##x)
1840 static void do_cpuid_ent(struct kvm_cpuid_entry2
*entry
, u32 function
,
1841 u32 index
, int *nent
, int maxnent
)
1843 unsigned f_nx
= is_efer_nx() ? F(NX
) : 0;
1844 #ifdef CONFIG_X86_64
1845 unsigned f_gbpages
= (kvm_x86_ops
->get_lpage_level() == PT_PDPE_LEVEL
)
1847 unsigned f_lm
= F(LM
);
1849 unsigned f_gbpages
= 0;
1852 unsigned f_rdtscp
= kvm_x86_ops
->rdtscp_supported() ? F(RDTSCP
) : 0;
1855 const u32 kvm_supported_word0_x86_features
=
1856 F(FPU
) | F(VME
) | F(DE
) | F(PSE
) |
1857 F(TSC
) | F(MSR
) | F(PAE
) | F(MCE
) |
1858 F(CX8
) | F(APIC
) | 0 /* Reserved */ | F(SEP
) |
1859 F(MTRR
) | F(PGE
) | F(MCA
) | F(CMOV
) |
1860 F(PAT
) | F(PSE36
) | 0 /* PSN */ | F(CLFLSH
) |
1861 0 /* Reserved, DS, ACPI */ | F(MMX
) |
1862 F(FXSR
) | F(XMM
) | F(XMM2
) | F(SELFSNOOP
) |
1863 0 /* HTT, TM, Reserved, PBE */;
1864 /* cpuid 0x80000001.edx */
1865 const u32 kvm_supported_word1_x86_features
=
1866 F(FPU
) | F(VME
) | F(DE
) | F(PSE
) |
1867 F(TSC
) | F(MSR
) | F(PAE
) | F(MCE
) |
1868 F(CX8
) | F(APIC
) | 0 /* Reserved */ | F(SYSCALL
) |
1869 F(MTRR
) | F(PGE
) | F(MCA
) | F(CMOV
) |
1870 F(PAT
) | F(PSE36
) | 0 /* Reserved */ |
1871 f_nx
| 0 /* Reserved */ | F(MMXEXT
) | F(MMX
) |
1872 F(FXSR
) | F(FXSR_OPT
) | f_gbpages
| f_rdtscp
|
1873 0 /* Reserved */ | f_lm
| F(3DNOWEXT
) | F(3DNOW
);
1875 const u32 kvm_supported_word4_x86_features
=
1876 F(XMM3
) | 0 /* Reserved, DTES64, MONITOR */ |
1877 0 /* DS-CPL, VMX, SMX, EST */ |
1878 0 /* TM2 */ | F(SSSE3
) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1879 0 /* Reserved */ | F(CX16
) | 0 /* xTPR Update, PDCM */ |
1880 0 /* Reserved, DCA */ | F(XMM4_1
) |
1881 F(XMM4_2
) | F(X2APIC
) | F(MOVBE
) | F(POPCNT
) |
1882 0 /* Reserved, XSAVE, OSXSAVE */;
1883 /* cpuid 0x80000001.ecx */
1884 const u32 kvm_supported_word6_x86_features
=
1885 F(LAHF_LM
) | F(CMP_LEGACY
) | F(SVM
) | 0 /* ExtApicSpace */ |
1886 F(CR8_LEGACY
) | F(ABM
) | F(SSE4A
) | F(MISALIGNSSE
) |
1887 F(3DNOWPREFETCH
) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5
) |
1888 0 /* SKINIT */ | 0 /* WDT */;
1890 /* all calls to cpuid_count() should be made on the same cpu */
1892 do_cpuid_1_ent(entry
, function
, index
);
1897 entry
->eax
= min(entry
->eax
, (u32
)0xb);
1900 entry
->edx
&= kvm_supported_word0_x86_features
;
1901 entry
->ecx
&= kvm_supported_word4_x86_features
;
1902 /* we support x2apic emulation even if host does not support
1903 * it since we emulate x2apic in software */
1904 entry
->ecx
|= F(X2APIC
);
1906 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1907 * may return different values. This forces us to get_cpu() before
1908 * issuing the first command, and also to emulate this annoying behavior
1909 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1911 int t
, times
= entry
->eax
& 0xff;
1913 entry
->flags
|= KVM_CPUID_FLAG_STATEFUL_FUNC
;
1914 entry
->flags
|= KVM_CPUID_FLAG_STATE_READ_NEXT
;
1915 for (t
= 1; t
< times
&& *nent
< maxnent
; ++t
) {
1916 do_cpuid_1_ent(&entry
[t
], function
, 0);
1917 entry
[t
].flags
|= KVM_CPUID_FLAG_STATEFUL_FUNC
;
1922 /* function 4 and 0xb have additional index. */
1926 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1927 /* read more entries until cache_type is zero */
1928 for (i
= 1; *nent
< maxnent
; ++i
) {
1929 cache_type
= entry
[i
- 1].eax
& 0x1f;
1932 do_cpuid_1_ent(&entry
[i
], function
, i
);
1934 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1942 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1943 /* read more entries until level_type is zero */
1944 for (i
= 1; *nent
< maxnent
; ++i
) {
1945 level_type
= entry
[i
- 1].ecx
& 0xff00;
1948 do_cpuid_1_ent(&entry
[i
], function
, i
);
1950 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1956 entry
->eax
= min(entry
->eax
, 0x8000001a);
1959 entry
->edx
&= kvm_supported_word1_x86_features
;
1960 entry
->ecx
&= kvm_supported_word6_x86_features
;
1968 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2
*cpuid
,
1969 struct kvm_cpuid_entry2 __user
*entries
)
1971 struct kvm_cpuid_entry2
*cpuid_entries
;
1972 int limit
, nent
= 0, r
= -E2BIG
;
1975 if (cpuid
->nent
< 1)
1977 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
1978 cpuid
->nent
= KVM_MAX_CPUID_ENTRIES
;
1980 cpuid_entries
= vmalloc(sizeof(struct kvm_cpuid_entry2
) * cpuid
->nent
);
1984 do_cpuid_ent(&cpuid_entries
[0], 0, 0, &nent
, cpuid
->nent
);
1985 limit
= cpuid_entries
[0].eax
;
1986 for (func
= 1; func
<= limit
&& nent
< cpuid
->nent
; ++func
)
1987 do_cpuid_ent(&cpuid_entries
[nent
], func
, 0,
1988 &nent
, cpuid
->nent
);
1990 if (nent
>= cpuid
->nent
)
1993 do_cpuid_ent(&cpuid_entries
[nent
], 0x80000000, 0, &nent
, cpuid
->nent
);
1994 limit
= cpuid_entries
[nent
- 1].eax
;
1995 for (func
= 0x80000001; func
<= limit
&& nent
< cpuid
->nent
; ++func
)
1996 do_cpuid_ent(&cpuid_entries
[nent
], func
, 0,
1997 &nent
, cpuid
->nent
);
1999 if (nent
>= cpuid
->nent
)
2003 if (copy_to_user(entries
, cpuid_entries
,
2004 nent
* sizeof(struct kvm_cpuid_entry2
)))
2010 vfree(cpuid_entries
);
2015 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
2016 struct kvm_lapic_state
*s
)
2019 memcpy(s
->regs
, vcpu
->arch
.apic
->regs
, sizeof *s
);
2025 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
2026 struct kvm_lapic_state
*s
)
2029 memcpy(vcpu
->arch
.apic
->regs
, s
->regs
, sizeof *s
);
2030 kvm_apic_post_state_restore(vcpu
);
2031 update_cr8_intercept(vcpu
);
2037 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
2038 struct kvm_interrupt
*irq
)
2040 if (irq
->irq
< 0 || irq
->irq
>= 256)
2042 if (irqchip_in_kernel(vcpu
->kvm
))
2046 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
2053 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
2056 kvm_inject_nmi(vcpu
);
2062 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
2063 struct kvm_tpr_access_ctl
*tac
)
2067 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
2071 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
2075 unsigned bank_num
= mcg_cap
& 0xff, bank
;
2078 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
2080 if (mcg_cap
& ~(KVM_MCE_CAP_SUPPORTED
| 0xff | 0xff0000))
2083 vcpu
->arch
.mcg_cap
= mcg_cap
;
2084 /* Init IA32_MCG_CTL to all 1s */
2085 if (mcg_cap
& MCG_CTL_P
)
2086 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
2087 /* Init IA32_MCi_CTL to all 1s */
2088 for (bank
= 0; bank
< bank_num
; bank
++)
2089 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
2094 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
2095 struct kvm_x86_mce
*mce
)
2097 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2098 unsigned bank_num
= mcg_cap
& 0xff;
2099 u64
*banks
= vcpu
->arch
.mce_banks
;
2101 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
2104 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2105 * reporting is disabled
2107 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
2108 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
2110 banks
+= 4 * mce
->bank
;
2112 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2113 * reporting is disabled for the bank
2115 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
2117 if (mce
->status
& MCI_STATUS_UC
) {
2118 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
2119 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
2120 printk(KERN_DEBUG
"kvm: set_mce: "
2121 "injects mce exception while "
2122 "previous one is in progress!\n");
2123 set_bit(KVM_REQ_TRIPLE_FAULT
, &vcpu
->requests
);
2126 if (banks
[1] & MCI_STATUS_VAL
)
2127 mce
->status
|= MCI_STATUS_OVER
;
2128 banks
[2] = mce
->addr
;
2129 banks
[3] = mce
->misc
;
2130 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
2131 banks
[1] = mce
->status
;
2132 kvm_queue_exception(vcpu
, MC_VECTOR
);
2133 } else if (!(banks
[1] & MCI_STATUS_VAL
)
2134 || !(banks
[1] & MCI_STATUS_UC
)) {
2135 if (banks
[1] & MCI_STATUS_VAL
)
2136 mce
->status
|= MCI_STATUS_OVER
;
2137 banks
[2] = mce
->addr
;
2138 banks
[3] = mce
->misc
;
2139 banks
[1] = mce
->status
;
2141 banks
[1] |= MCI_STATUS_OVER
;
2145 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
2146 struct kvm_vcpu_events
*events
)
2150 events
->exception
.injected
=
2151 vcpu
->arch
.exception
.pending
&&
2152 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
2153 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
2154 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
2155 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
2157 events
->interrupt
.injected
=
2158 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
2159 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
2160 events
->interrupt
.soft
= 0;
2161 events
->interrupt
.shadow
=
2162 kvm_x86_ops
->get_interrupt_shadow(vcpu
,
2163 KVM_X86_SHADOW_INT_MOV_SS
| KVM_X86_SHADOW_INT_STI
);
2165 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
2166 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
;
2167 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
2169 events
->sipi_vector
= vcpu
->arch
.sipi_vector
;
2171 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
2172 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2173 | KVM_VCPUEVENT_VALID_SHADOW
);
2178 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
2179 struct kvm_vcpu_events
*events
)
2181 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2182 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2183 | KVM_VCPUEVENT_VALID_SHADOW
))
2188 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
2189 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
2190 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
2191 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
2193 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
2194 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
2195 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
2196 if (vcpu
->arch
.interrupt
.pending
&& irqchip_in_kernel(vcpu
->kvm
))
2197 kvm_pic_clear_isr_ack(vcpu
->kvm
);
2198 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
2199 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
2200 events
->interrupt
.shadow
);
2202 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
2203 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
2204 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
2205 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
2207 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
)
2208 vcpu
->arch
.sipi_vector
= events
->sipi_vector
;
2215 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
2216 struct kvm_debugregs
*dbgregs
)
2220 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
2221 dbgregs
->dr6
= vcpu
->arch
.dr6
;
2222 dbgregs
->dr7
= vcpu
->arch
.dr7
;
2228 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
2229 struct kvm_debugregs
*dbgregs
)
2236 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
2237 vcpu
->arch
.dr6
= dbgregs
->dr6
;
2238 vcpu
->arch
.dr7
= dbgregs
->dr7
;
2245 long kvm_arch_vcpu_ioctl(struct file
*filp
,
2246 unsigned int ioctl
, unsigned long arg
)
2248 struct kvm_vcpu
*vcpu
= filp
->private_data
;
2249 void __user
*argp
= (void __user
*)arg
;
2251 struct kvm_lapic_state
*lapic
= NULL
;
2254 case KVM_GET_LAPIC
: {
2256 if (!vcpu
->arch
.apic
)
2258 lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
2263 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, lapic
);
2267 if (copy_to_user(argp
, lapic
, sizeof(struct kvm_lapic_state
)))
2272 case KVM_SET_LAPIC
: {
2274 if (!vcpu
->arch
.apic
)
2276 lapic
= kmalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
2281 if (copy_from_user(lapic
, argp
, sizeof(struct kvm_lapic_state
)))
2283 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, lapic
);
2289 case KVM_INTERRUPT
: {
2290 struct kvm_interrupt irq
;
2293 if (copy_from_user(&irq
, argp
, sizeof irq
))
2295 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
2302 r
= kvm_vcpu_ioctl_nmi(vcpu
);
2308 case KVM_SET_CPUID
: {
2309 struct kvm_cpuid __user
*cpuid_arg
= argp
;
2310 struct kvm_cpuid cpuid
;
2313 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2315 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
2320 case KVM_SET_CPUID2
: {
2321 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2322 struct kvm_cpuid2 cpuid
;
2325 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2327 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
2328 cpuid_arg
->entries
);
2333 case KVM_GET_CPUID2
: {
2334 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2335 struct kvm_cpuid2 cpuid
;
2338 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2340 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
2341 cpuid_arg
->entries
);
2345 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2351 r
= msr_io(vcpu
, argp
, kvm_get_msr
, 1);
2354 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
2356 case KVM_TPR_ACCESS_REPORTING
: {
2357 struct kvm_tpr_access_ctl tac
;
2360 if (copy_from_user(&tac
, argp
, sizeof tac
))
2362 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
2366 if (copy_to_user(argp
, &tac
, sizeof tac
))
2371 case KVM_SET_VAPIC_ADDR
: {
2372 struct kvm_vapic_addr va
;
2375 if (!irqchip_in_kernel(vcpu
->kvm
))
2378 if (copy_from_user(&va
, argp
, sizeof va
))
2381 kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
2384 case KVM_X86_SETUP_MCE
: {
2388 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
2390 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
2393 case KVM_X86_SET_MCE
: {
2394 struct kvm_x86_mce mce
;
2397 if (copy_from_user(&mce
, argp
, sizeof mce
))
2399 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
2402 case KVM_GET_VCPU_EVENTS
: {
2403 struct kvm_vcpu_events events
;
2405 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
2408 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
2413 case KVM_SET_VCPU_EVENTS
: {
2414 struct kvm_vcpu_events events
;
2417 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
2420 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
2423 case KVM_GET_DEBUGREGS
: {
2424 struct kvm_debugregs dbgregs
;
2426 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
2429 if (copy_to_user(argp
, &dbgregs
,
2430 sizeof(struct kvm_debugregs
)))
2435 case KVM_SET_DEBUGREGS
: {
2436 struct kvm_debugregs dbgregs
;
2439 if (copy_from_user(&dbgregs
, argp
,
2440 sizeof(struct kvm_debugregs
)))
2443 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
2454 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
2458 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
2460 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
2464 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
2467 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
2471 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
2472 u32 kvm_nr_mmu_pages
)
2474 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
2477 mutex_lock(&kvm
->slots_lock
);
2478 spin_lock(&kvm
->mmu_lock
);
2480 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
2481 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
2483 spin_unlock(&kvm
->mmu_lock
);
2484 mutex_unlock(&kvm
->slots_lock
);
2488 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
2490 return kvm
->arch
.n_alloc_mmu_pages
;
2493 gfn_t
unalias_gfn_instantiation(struct kvm
*kvm
, gfn_t gfn
)
2496 struct kvm_mem_alias
*alias
;
2497 struct kvm_mem_aliases
*aliases
;
2499 aliases
= rcu_dereference(kvm
->arch
.aliases
);
2501 for (i
= 0; i
< aliases
->naliases
; ++i
) {
2502 alias
= &aliases
->aliases
[i
];
2503 if (alias
->flags
& KVM_ALIAS_INVALID
)
2505 if (gfn
>= alias
->base_gfn
2506 && gfn
< alias
->base_gfn
+ alias
->npages
)
2507 return alias
->target_gfn
+ gfn
- alias
->base_gfn
;
2512 gfn_t
unalias_gfn(struct kvm
*kvm
, gfn_t gfn
)
2515 struct kvm_mem_alias
*alias
;
2516 struct kvm_mem_aliases
*aliases
;
2518 aliases
= rcu_dereference(kvm
->arch
.aliases
);
2520 for (i
= 0; i
< aliases
->naliases
; ++i
) {
2521 alias
= &aliases
->aliases
[i
];
2522 if (gfn
>= alias
->base_gfn
2523 && gfn
< alias
->base_gfn
+ alias
->npages
)
2524 return alias
->target_gfn
+ gfn
- alias
->base_gfn
;
2530 * Set a new alias region. Aliases map a portion of physical memory into
2531 * another portion. This is useful for memory windows, for example the PC
2534 static int kvm_vm_ioctl_set_memory_alias(struct kvm
*kvm
,
2535 struct kvm_memory_alias
*alias
)
2538 struct kvm_mem_alias
*p
;
2539 struct kvm_mem_aliases
*aliases
, *old_aliases
;
2542 /* General sanity checks */
2543 if (alias
->memory_size
& (PAGE_SIZE
- 1))
2545 if (alias
->guest_phys_addr
& (PAGE_SIZE
- 1))
2547 if (alias
->slot
>= KVM_ALIAS_SLOTS
)
2549 if (alias
->guest_phys_addr
+ alias
->memory_size
2550 < alias
->guest_phys_addr
)
2552 if (alias
->target_phys_addr
+ alias
->memory_size
2553 < alias
->target_phys_addr
)
2557 aliases
= kzalloc(sizeof(struct kvm_mem_aliases
), GFP_KERNEL
);
2561 mutex_lock(&kvm
->slots_lock
);
2563 /* invalidate any gfn reference in case of deletion/shrinking */
2564 memcpy(aliases
, kvm
->arch
.aliases
, sizeof(struct kvm_mem_aliases
));
2565 aliases
->aliases
[alias
->slot
].flags
|= KVM_ALIAS_INVALID
;
2566 old_aliases
= kvm
->arch
.aliases
;
2567 rcu_assign_pointer(kvm
->arch
.aliases
, aliases
);
2568 synchronize_srcu_expedited(&kvm
->srcu
);
2569 kvm_mmu_zap_all(kvm
);
2573 aliases
= kzalloc(sizeof(struct kvm_mem_aliases
), GFP_KERNEL
);
2577 memcpy(aliases
, kvm
->arch
.aliases
, sizeof(struct kvm_mem_aliases
));
2579 p
= &aliases
->aliases
[alias
->slot
];
2580 p
->base_gfn
= alias
->guest_phys_addr
>> PAGE_SHIFT
;
2581 p
->npages
= alias
->memory_size
>> PAGE_SHIFT
;
2582 p
->target_gfn
= alias
->target_phys_addr
>> PAGE_SHIFT
;
2583 p
->flags
&= ~(KVM_ALIAS_INVALID
);
2585 for (n
= KVM_ALIAS_SLOTS
; n
> 0; --n
)
2586 if (aliases
->aliases
[n
- 1].npages
)
2588 aliases
->naliases
= n
;
2590 old_aliases
= kvm
->arch
.aliases
;
2591 rcu_assign_pointer(kvm
->arch
.aliases
, aliases
);
2592 synchronize_srcu_expedited(&kvm
->srcu
);
2597 mutex_unlock(&kvm
->slots_lock
);
2602 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
2607 switch (chip
->chip_id
) {
2608 case KVM_IRQCHIP_PIC_MASTER
:
2609 memcpy(&chip
->chip
.pic
,
2610 &pic_irqchip(kvm
)->pics
[0],
2611 sizeof(struct kvm_pic_state
));
2613 case KVM_IRQCHIP_PIC_SLAVE
:
2614 memcpy(&chip
->chip
.pic
,
2615 &pic_irqchip(kvm
)->pics
[1],
2616 sizeof(struct kvm_pic_state
));
2618 case KVM_IRQCHIP_IOAPIC
:
2619 r
= kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
2628 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
2633 switch (chip
->chip_id
) {
2634 case KVM_IRQCHIP_PIC_MASTER
:
2635 raw_spin_lock(&pic_irqchip(kvm
)->lock
);
2636 memcpy(&pic_irqchip(kvm
)->pics
[0],
2638 sizeof(struct kvm_pic_state
));
2639 raw_spin_unlock(&pic_irqchip(kvm
)->lock
);
2641 case KVM_IRQCHIP_PIC_SLAVE
:
2642 raw_spin_lock(&pic_irqchip(kvm
)->lock
);
2643 memcpy(&pic_irqchip(kvm
)->pics
[1],
2645 sizeof(struct kvm_pic_state
));
2646 raw_spin_unlock(&pic_irqchip(kvm
)->lock
);
2648 case KVM_IRQCHIP_IOAPIC
:
2649 r
= kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
2655 kvm_pic_update_irq(pic_irqchip(kvm
));
2659 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
2663 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2664 memcpy(ps
, &kvm
->arch
.vpit
->pit_state
, sizeof(struct kvm_pit_state
));
2665 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2669 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
2673 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2674 memcpy(&kvm
->arch
.vpit
->pit_state
, ps
, sizeof(struct kvm_pit_state
));
2675 kvm_pit_load_count(kvm
, 0, ps
->channels
[0].count
, 0);
2676 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2680 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
2684 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2685 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
2686 sizeof(ps
->channels
));
2687 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
2688 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2692 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
2694 int r
= 0, start
= 0;
2695 u32 prev_legacy
, cur_legacy
;
2696 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2697 prev_legacy
= kvm
->arch
.vpit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
2698 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
2699 if (!prev_legacy
&& cur_legacy
)
2701 memcpy(&kvm
->arch
.vpit
->pit_state
.channels
, &ps
->channels
,
2702 sizeof(kvm
->arch
.vpit
->pit_state
.channels
));
2703 kvm
->arch
.vpit
->pit_state
.flags
= ps
->flags
;
2704 kvm_pit_load_count(kvm
, 0, kvm
->arch
.vpit
->pit_state
.channels
[0].count
, start
);
2705 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2709 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
2710 struct kvm_reinject_control
*control
)
2712 if (!kvm
->arch
.vpit
)
2714 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2715 kvm
->arch
.vpit
->pit_state
.pit_timer
.reinject
= control
->pit_reinject
;
2716 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2721 * Get (and clear) the dirty memory log for a memory slot.
2723 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
,
2724 struct kvm_dirty_log
*log
)
2727 struct kvm_memory_slot
*memslot
;
2729 unsigned long is_dirty
= 0;
2730 unsigned long *dirty_bitmap
= NULL
;
2732 mutex_lock(&kvm
->slots_lock
);
2735 if (log
->slot
>= KVM_MEMORY_SLOTS
)
2738 memslot
= &kvm
->memslots
->memslots
[log
->slot
];
2740 if (!memslot
->dirty_bitmap
)
2743 n
= kvm_dirty_bitmap_bytes(memslot
);
2746 dirty_bitmap
= vmalloc(n
);
2749 memset(dirty_bitmap
, 0, n
);
2751 for (i
= 0; !is_dirty
&& i
< n
/sizeof(long); i
++)
2752 is_dirty
= memslot
->dirty_bitmap
[i
];
2754 /* If nothing is dirty, don't bother messing with page tables. */
2756 struct kvm_memslots
*slots
, *old_slots
;
2758 spin_lock(&kvm
->mmu_lock
);
2759 kvm_mmu_slot_remove_write_access(kvm
, log
->slot
);
2760 spin_unlock(&kvm
->mmu_lock
);
2762 slots
= kzalloc(sizeof(struct kvm_memslots
), GFP_KERNEL
);
2766 memcpy(slots
, kvm
->memslots
, sizeof(struct kvm_memslots
));
2767 slots
->memslots
[log
->slot
].dirty_bitmap
= dirty_bitmap
;
2769 old_slots
= kvm
->memslots
;
2770 rcu_assign_pointer(kvm
->memslots
, slots
);
2771 synchronize_srcu_expedited(&kvm
->srcu
);
2772 dirty_bitmap
= old_slots
->memslots
[log
->slot
].dirty_bitmap
;
2777 if (copy_to_user(log
->dirty_bitmap
, dirty_bitmap
, n
))
2780 vfree(dirty_bitmap
);
2782 mutex_unlock(&kvm
->slots_lock
);
2786 long kvm_arch_vm_ioctl(struct file
*filp
,
2787 unsigned int ioctl
, unsigned long arg
)
2789 struct kvm
*kvm
= filp
->private_data
;
2790 void __user
*argp
= (void __user
*)arg
;
2793 * This union makes it completely explicit to gcc-3.x
2794 * that these two variables' stack usage should be
2795 * combined, not added together.
2798 struct kvm_pit_state ps
;
2799 struct kvm_pit_state2 ps2
;
2800 struct kvm_memory_alias alias
;
2801 struct kvm_pit_config pit_config
;
2805 case KVM_SET_TSS_ADDR
:
2806 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
2810 case KVM_SET_IDENTITY_MAP_ADDR
: {
2814 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
2816 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
2821 case KVM_SET_MEMORY_REGION
: {
2822 struct kvm_memory_region kvm_mem
;
2823 struct kvm_userspace_memory_region kvm_userspace_mem
;
2826 if (copy_from_user(&kvm_mem
, argp
, sizeof kvm_mem
))
2828 kvm_userspace_mem
.slot
= kvm_mem
.slot
;
2829 kvm_userspace_mem
.flags
= kvm_mem
.flags
;
2830 kvm_userspace_mem
.guest_phys_addr
= kvm_mem
.guest_phys_addr
;
2831 kvm_userspace_mem
.memory_size
= kvm_mem
.memory_size
;
2832 r
= kvm_vm_ioctl_set_memory_region(kvm
, &kvm_userspace_mem
, 0);
2837 case KVM_SET_NR_MMU_PAGES
:
2838 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
2842 case KVM_GET_NR_MMU_PAGES
:
2843 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
2845 case KVM_SET_MEMORY_ALIAS
:
2847 if (copy_from_user(&u
.alias
, argp
, sizeof(struct kvm_memory_alias
)))
2849 r
= kvm_vm_ioctl_set_memory_alias(kvm
, &u
.alias
);
2853 case KVM_CREATE_IRQCHIP
: {
2854 struct kvm_pic
*vpic
;
2856 mutex_lock(&kvm
->lock
);
2859 goto create_irqchip_unlock
;
2861 vpic
= kvm_create_pic(kvm
);
2863 r
= kvm_ioapic_init(kvm
);
2865 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
2868 goto create_irqchip_unlock
;
2871 goto create_irqchip_unlock
;
2873 kvm
->arch
.vpic
= vpic
;
2875 r
= kvm_setup_default_irq_routing(kvm
);
2877 mutex_lock(&kvm
->irq_lock
);
2878 kvm_ioapic_destroy(kvm
);
2879 kvm_destroy_pic(kvm
);
2880 mutex_unlock(&kvm
->irq_lock
);
2882 create_irqchip_unlock
:
2883 mutex_unlock(&kvm
->lock
);
2886 case KVM_CREATE_PIT
:
2887 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
2889 case KVM_CREATE_PIT2
:
2891 if (copy_from_user(&u
.pit_config
, argp
,
2892 sizeof(struct kvm_pit_config
)))
2895 mutex_lock(&kvm
->slots_lock
);
2898 goto create_pit_unlock
;
2900 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
2904 mutex_unlock(&kvm
->slots_lock
);
2906 case KVM_IRQ_LINE_STATUS
:
2907 case KVM_IRQ_LINE
: {
2908 struct kvm_irq_level irq_event
;
2911 if (copy_from_user(&irq_event
, argp
, sizeof irq_event
))
2914 if (irqchip_in_kernel(kvm
)) {
2916 status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
2917 irq_event
.irq
, irq_event
.level
);
2918 if (ioctl
== KVM_IRQ_LINE_STATUS
) {
2920 irq_event
.status
= status
;
2921 if (copy_to_user(argp
, &irq_event
,
2929 case KVM_GET_IRQCHIP
: {
2930 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2931 struct kvm_irqchip
*chip
= kmalloc(sizeof(*chip
), GFP_KERNEL
);
2937 if (copy_from_user(chip
, argp
, sizeof *chip
))
2938 goto get_irqchip_out
;
2940 if (!irqchip_in_kernel(kvm
))
2941 goto get_irqchip_out
;
2942 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
2944 goto get_irqchip_out
;
2946 if (copy_to_user(argp
, chip
, sizeof *chip
))
2947 goto get_irqchip_out
;
2955 case KVM_SET_IRQCHIP
: {
2956 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2957 struct kvm_irqchip
*chip
= kmalloc(sizeof(*chip
), GFP_KERNEL
);
2963 if (copy_from_user(chip
, argp
, sizeof *chip
))
2964 goto set_irqchip_out
;
2966 if (!irqchip_in_kernel(kvm
))
2967 goto set_irqchip_out
;
2968 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
2970 goto set_irqchip_out
;
2980 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
2983 if (!kvm
->arch
.vpit
)
2985 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
2989 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
2996 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
2999 if (!kvm
->arch
.vpit
)
3001 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
3007 case KVM_GET_PIT2
: {
3009 if (!kvm
->arch
.vpit
)
3011 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
3015 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
3020 case KVM_SET_PIT2
: {
3022 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
3025 if (!kvm
->arch
.vpit
)
3027 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
3033 case KVM_REINJECT_CONTROL
: {
3034 struct kvm_reinject_control control
;
3036 if (copy_from_user(&control
, argp
, sizeof(control
)))
3038 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
3044 case KVM_XEN_HVM_CONFIG
: {
3046 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
3047 sizeof(struct kvm_xen_hvm_config
)))
3050 if (kvm
->arch
.xen_hvm_config
.flags
)
3055 case KVM_SET_CLOCK
: {
3056 struct timespec now
;
3057 struct kvm_clock_data user_ns
;
3062 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
3071 now_ns
= timespec_to_ns(&now
);
3072 delta
= user_ns
.clock
- now_ns
;
3073 kvm
->arch
.kvmclock_offset
= delta
;
3076 case KVM_GET_CLOCK
: {
3077 struct timespec now
;
3078 struct kvm_clock_data user_ns
;
3082 now_ns
= timespec_to_ns(&now
);
3083 user_ns
.clock
= kvm
->arch
.kvmclock_offset
+ now_ns
;
3087 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
3100 static void kvm_init_msr_list(void)
3105 /* skip the first msrs in the list. KVM-specific */
3106 for (i
= j
= KVM_SAVE_MSRS_BEGIN
; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
3107 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
3110 msrs_to_save
[j
] = msrs_to_save
[i
];
3113 num_msrs_to_save
= j
;
3116 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
3119 if (vcpu
->arch
.apic
&&
3120 !kvm_iodevice_write(&vcpu
->arch
.apic
->dev
, addr
, len
, v
))
3123 return kvm_io_bus_write(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, len
, v
);
3126 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
3128 if (vcpu
->arch
.apic
&&
3129 !kvm_iodevice_read(&vcpu
->arch
.apic
->dev
, addr
, len
, v
))
3132 return kvm_io_bus_read(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, len
, v
);
3135 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
3136 struct kvm_segment
*var
, int seg
)
3138 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
3141 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
3142 struct kvm_segment
*var
, int seg
)
3144 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
3147 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
, u32
*error
)
3149 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3150 return vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gva
, access
, error
);
3153 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
, u32
*error
)
3155 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3156 access
|= PFERR_FETCH_MASK
;
3157 return vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gva
, access
, error
);
3160 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
, u32
*error
)
3162 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3163 access
|= PFERR_WRITE_MASK
;
3164 return vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gva
, access
, error
);
3167 /* uses this to access any guest's mapped memory without checking CPL */
3168 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
, u32
*error
)
3170 return vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gva
, 0, error
);
3173 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
3174 struct kvm_vcpu
*vcpu
, u32 access
,
3178 int r
= X86EMUL_CONTINUE
;
3181 gpa_t gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
, access
, error
);
3182 unsigned offset
= addr
& (PAGE_SIZE
-1);
3183 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
3186 if (gpa
== UNMAPPED_GVA
) {
3187 r
= X86EMUL_PROPAGATE_FAULT
;
3190 ret
= kvm_read_guest(vcpu
->kvm
, gpa
, data
, toread
);
3192 r
= X86EMUL_UNHANDLEABLE
;
3204 /* used for instruction fetching */
3205 static int kvm_fetch_guest_virt(gva_t addr
, void *val
, unsigned int bytes
,
3206 struct kvm_vcpu
*vcpu
, u32
*error
)
3208 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3209 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
,
3210 access
| PFERR_FETCH_MASK
, error
);
3213 static int kvm_read_guest_virt(gva_t addr
, void *val
, unsigned int bytes
,
3214 struct kvm_vcpu
*vcpu
, u32
*error
)
3216 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3217 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
3221 static int kvm_read_guest_virt_system(gva_t addr
, void *val
, unsigned int bytes
,
3222 struct kvm_vcpu
*vcpu
, u32
*error
)
3224 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, error
);
3227 static int kvm_write_guest_virt_system(gva_t addr
, void *val
,
3229 struct kvm_vcpu
*vcpu
,
3233 int r
= X86EMUL_CONTINUE
;
3236 gpa_t gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
,
3237 PFERR_WRITE_MASK
, error
);
3238 unsigned offset
= addr
& (PAGE_SIZE
-1);
3239 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
3242 if (gpa
== UNMAPPED_GVA
) {
3243 r
= X86EMUL_PROPAGATE_FAULT
;
3246 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, data
, towrite
);
3248 r
= X86EMUL_UNHANDLEABLE
;
3260 static int emulator_read_emulated(unsigned long addr
,
3263 struct kvm_vcpu
*vcpu
)
3268 if (vcpu
->mmio_read_completed
) {
3269 memcpy(val
, vcpu
->mmio_data
, bytes
);
3270 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
3271 vcpu
->mmio_phys_addr
, *(u64
*)val
);
3272 vcpu
->mmio_read_completed
= 0;
3273 return X86EMUL_CONTINUE
;
3276 gpa
= kvm_mmu_gva_to_gpa_read(vcpu
, addr
, &error_code
);
3278 if (gpa
== UNMAPPED_GVA
) {
3279 kvm_inject_page_fault(vcpu
, addr
, error_code
);
3280 return X86EMUL_PROPAGATE_FAULT
;
3283 /* For APIC access vmexit */
3284 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
3287 if (kvm_read_guest_virt(addr
, val
, bytes
, vcpu
, NULL
)
3288 == X86EMUL_CONTINUE
)
3289 return X86EMUL_CONTINUE
;
3293 * Is this MMIO handled locally?
3295 if (!vcpu_mmio_read(vcpu
, gpa
, bytes
, val
)) {
3296 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
, gpa
, *(u64
*)val
);
3297 return X86EMUL_CONTINUE
;
3300 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
3302 vcpu
->mmio_needed
= 1;
3303 vcpu
->mmio_phys_addr
= gpa
;
3304 vcpu
->mmio_size
= bytes
;
3305 vcpu
->mmio_is_write
= 0;
3307 return X86EMUL_UNHANDLEABLE
;
3310 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3311 const void *val
, int bytes
)
3315 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, val
, bytes
);
3318 kvm_mmu_pte_write(vcpu
, gpa
, val
, bytes
, 1);
3322 static int emulator_write_emulated_onepage(unsigned long addr
,
3325 struct kvm_vcpu
*vcpu
,
3331 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, &error_code
);
3333 if (gpa
== UNMAPPED_GVA
) {
3334 kvm_inject_page_fault(vcpu
, addr
, error_code
);
3335 return X86EMUL_PROPAGATE_FAULT
;
3338 /* For APIC access vmexit */
3339 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
3343 kvm_mmu_pte_write(vcpu
, gpa
, val
, bytes
, 1);
3344 return X86EMUL_CONTINUE
;
3346 if (emulator_write_phys(vcpu
, gpa
, val
, bytes
))
3347 return X86EMUL_CONTINUE
;
3350 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
3352 * Is this MMIO handled locally?
3354 if (!vcpu_mmio_write(vcpu
, gpa
, bytes
, val
))
3355 return X86EMUL_CONTINUE
;
3357 vcpu
->mmio_needed
= 1;
3358 vcpu
->mmio_phys_addr
= gpa
;
3359 vcpu
->mmio_size
= bytes
;
3360 vcpu
->mmio_is_write
= 1;
3361 memcpy(vcpu
->mmio_data
, val
, bytes
);
3363 return X86EMUL_CONTINUE
;
3366 int __emulator_write_emulated(unsigned long addr
,
3369 struct kvm_vcpu
*vcpu
,
3372 /* Crossing a page boundary? */
3373 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
3376 now
= -addr
& ~PAGE_MASK
;
3377 rc
= emulator_write_emulated_onepage(addr
, val
, now
, vcpu
,
3379 if (rc
!= X86EMUL_CONTINUE
)
3385 return emulator_write_emulated_onepage(addr
, val
, bytes
, vcpu
,
3389 int emulator_write_emulated(unsigned long addr
,
3392 struct kvm_vcpu
*vcpu
)
3394 return __emulator_write_emulated(addr
, val
, bytes
, vcpu
, false);
3396 EXPORT_SYMBOL_GPL(emulator_write_emulated
);
3398 #define CMPXCHG_TYPE(t, ptr, old, new) \
3399 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3401 #ifdef CONFIG_X86_64
3402 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3404 # define CMPXCHG64(ptr, old, new) \
3405 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3408 static int emulator_cmpxchg_emulated(unsigned long addr
,
3412 struct kvm_vcpu
*vcpu
)
3419 /* guests cmpxchg8b have to be emulated atomically */
3420 if (bytes
> 8 || (bytes
& (bytes
- 1)))
3423 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
3425 if (gpa
== UNMAPPED_GVA
||
3426 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
3429 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
3432 page
= gfn_to_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
3434 kaddr
= kmap_atomic(page
, KM_USER0
);
3435 kaddr
+= offset_in_page(gpa
);
3438 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
3441 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
3444 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
3447 exchanged
= CMPXCHG64(kaddr
, old
, new);
3452 kunmap_atomic(kaddr
, KM_USER0
);
3453 kvm_release_page_dirty(page
);
3456 return X86EMUL_CMPXCHG_FAILED
;
3458 return __emulator_write_emulated(addr
, new, bytes
, vcpu
, true);
3461 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
3463 return emulator_write_emulated(addr
, new, bytes
, vcpu
);
3466 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
3468 /* TODO: String I/O for in kernel device */
3471 if (vcpu
->arch
.pio
.in
)
3472 r
= kvm_io_bus_read(vcpu
->kvm
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
3473 vcpu
->arch
.pio
.size
, pd
);
3475 r
= kvm_io_bus_write(vcpu
->kvm
, KVM_PIO_BUS
,
3476 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
3482 static int emulator_pio_in_emulated(int size
, unsigned short port
, void *val
,
3483 unsigned int count
, struct kvm_vcpu
*vcpu
)
3485 if (vcpu
->arch
.pio
.count
)
3488 trace_kvm_pio(1, port
, size
, 1);
3490 vcpu
->arch
.pio
.port
= port
;
3491 vcpu
->arch
.pio
.in
= 1;
3492 vcpu
->arch
.pio
.count
= count
;
3493 vcpu
->arch
.pio
.size
= size
;
3495 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
3497 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
3498 vcpu
->arch
.pio
.count
= 0;
3502 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
3503 vcpu
->run
->io
.direction
= KVM_EXIT_IO_IN
;
3504 vcpu
->run
->io
.size
= size
;
3505 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
3506 vcpu
->run
->io
.count
= count
;
3507 vcpu
->run
->io
.port
= port
;
3512 static int emulator_pio_out_emulated(int size
, unsigned short port
,
3513 const void *val
, unsigned int count
,
3514 struct kvm_vcpu
*vcpu
)
3516 trace_kvm_pio(0, port
, size
, 1);
3518 vcpu
->arch
.pio
.port
= port
;
3519 vcpu
->arch
.pio
.in
= 0;
3520 vcpu
->arch
.pio
.count
= count
;
3521 vcpu
->arch
.pio
.size
= size
;
3523 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
3525 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
3526 vcpu
->arch
.pio
.count
= 0;
3530 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
3531 vcpu
->run
->io
.direction
= KVM_EXIT_IO_OUT
;
3532 vcpu
->run
->io
.size
= size
;
3533 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
3534 vcpu
->run
->io
.count
= count
;
3535 vcpu
->run
->io
.port
= port
;
3540 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
3542 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
3545 int emulate_invlpg(struct kvm_vcpu
*vcpu
, gva_t address
)
3547 kvm_mmu_invlpg(vcpu
, address
);
3548 return X86EMUL_CONTINUE
;
3551 int emulate_clts(struct kvm_vcpu
*vcpu
)
3553 kvm_x86_ops
->set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~X86_CR0_TS
));
3554 kvm_x86_ops
->fpu_activate(vcpu
);
3555 return X86EMUL_CONTINUE
;
3558 int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long *dest
)
3560 return kvm_get_dr(ctxt
->vcpu
, dr
, dest
);
3563 int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long value
)
3565 unsigned long mask
= (ctxt
->mode
== X86EMUL_MODE_PROT64
) ? ~0ULL : ~0U;
3567 return kvm_set_dr(ctxt
->vcpu
, dr
, value
& mask
);
3570 void kvm_report_emulation_failure(struct kvm_vcpu
*vcpu
, const char *context
)
3573 unsigned long rip
= kvm_rip_read(vcpu
);
3574 unsigned long rip_linear
;
3576 if (!printk_ratelimit())
3579 rip_linear
= rip
+ get_segment_base(vcpu
, VCPU_SREG_CS
);
3581 kvm_read_guest_virt(rip_linear
, (void *)opcodes
, 4, vcpu
, NULL
);
3583 printk(KERN_ERR
"emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
3584 context
, rip
, opcodes
[0], opcodes
[1], opcodes
[2], opcodes
[3]);
3586 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure
);
3588 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
3590 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
3593 static unsigned long emulator_get_cr(int cr
, struct kvm_vcpu
*vcpu
)
3595 unsigned long value
;
3599 value
= kvm_read_cr0(vcpu
);
3602 value
= vcpu
->arch
.cr2
;
3605 value
= vcpu
->arch
.cr3
;
3608 value
= kvm_read_cr4(vcpu
);
3611 value
= kvm_get_cr8(vcpu
);
3614 vcpu_printf(vcpu
, "%s: unexpected cr %u\n", __func__
, cr
);
3621 static void emulator_set_cr(int cr
, unsigned long val
, struct kvm_vcpu
*vcpu
)
3625 kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
3628 vcpu
->arch
.cr2
= val
;
3631 kvm_set_cr3(vcpu
, val
);
3634 kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
3637 kvm_set_cr8(vcpu
, val
& 0xfUL
);
3640 vcpu_printf(vcpu
, "%s: unexpected cr %u\n", __func__
, cr
);
3644 static int emulator_get_cpl(struct kvm_vcpu
*vcpu
)
3646 return kvm_x86_ops
->get_cpl(vcpu
);
3649 static void emulator_get_gdt(struct desc_ptr
*dt
, struct kvm_vcpu
*vcpu
)
3651 kvm_x86_ops
->get_gdt(vcpu
, dt
);
3654 static bool emulator_get_cached_descriptor(struct desc_struct
*desc
, int seg
,
3655 struct kvm_vcpu
*vcpu
)
3657 struct kvm_segment var
;
3659 kvm_get_segment(vcpu
, &var
, seg
);
3666 set_desc_limit(desc
, var
.limit
);
3667 set_desc_base(desc
, (unsigned long)var
.base
);
3668 desc
->type
= var
.type
;
3670 desc
->dpl
= var
.dpl
;
3671 desc
->p
= var
.present
;
3672 desc
->avl
= var
.avl
;
3680 static void emulator_set_cached_descriptor(struct desc_struct
*desc
, int seg
,
3681 struct kvm_vcpu
*vcpu
)
3683 struct kvm_segment var
;
3685 /* needed to preserve selector */
3686 kvm_get_segment(vcpu
, &var
, seg
);
3688 var
.base
= get_desc_base(desc
);
3689 var
.limit
= get_desc_limit(desc
);
3691 var
.limit
= (var
.limit
<< 12) | 0xfff;
3692 var
.type
= desc
->type
;
3693 var
.present
= desc
->p
;
3694 var
.dpl
= desc
->dpl
;
3699 var
.avl
= desc
->avl
;
3700 var
.present
= desc
->p
;
3701 var
.unusable
= !var
.present
;
3704 kvm_set_segment(vcpu
, &var
, seg
);
3708 static u16
emulator_get_segment_selector(int seg
, struct kvm_vcpu
*vcpu
)
3710 struct kvm_segment kvm_seg
;
3712 kvm_get_segment(vcpu
, &kvm_seg
, seg
);
3713 return kvm_seg
.selector
;
3716 static void emulator_set_segment_selector(u16 sel
, int seg
,
3717 struct kvm_vcpu
*vcpu
)
3719 struct kvm_segment kvm_seg
;
3721 kvm_get_segment(vcpu
, &kvm_seg
, seg
);
3722 kvm_seg
.selector
= sel
;
3723 kvm_set_segment(vcpu
, &kvm_seg
, seg
);
3726 static void emulator_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
3728 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
3731 static struct x86_emulate_ops emulate_ops
= {
3732 .read_std
= kvm_read_guest_virt_system
,
3733 .write_std
= kvm_write_guest_virt_system
,
3734 .fetch
= kvm_fetch_guest_virt
,
3735 .read_emulated
= emulator_read_emulated
,
3736 .write_emulated
= emulator_write_emulated
,
3737 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
3738 .pio_in_emulated
= emulator_pio_in_emulated
,
3739 .pio_out_emulated
= emulator_pio_out_emulated
,
3740 .get_cached_descriptor
= emulator_get_cached_descriptor
,
3741 .set_cached_descriptor
= emulator_set_cached_descriptor
,
3742 .get_segment_selector
= emulator_get_segment_selector
,
3743 .set_segment_selector
= emulator_set_segment_selector
,
3744 .get_gdt
= emulator_get_gdt
,
3745 .get_cr
= emulator_get_cr
,
3746 .set_cr
= emulator_set_cr
,
3747 .cpl
= emulator_get_cpl
,
3748 .set_rflags
= emulator_set_rflags
,
3751 static void cache_all_regs(struct kvm_vcpu
*vcpu
)
3753 kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3754 kvm_register_read(vcpu
, VCPU_REGS_RSP
);
3755 kvm_register_read(vcpu
, VCPU_REGS_RIP
);
3756 vcpu
->arch
.regs_dirty
= ~0;
3759 int emulate_instruction(struct kvm_vcpu
*vcpu
,
3765 struct decode_cache
*c
;
3766 struct kvm_run
*run
= vcpu
->run
;
3768 kvm_clear_exception_queue(vcpu
);
3769 vcpu
->arch
.mmio_fault_cr2
= cr2
;
3771 * TODO: fix emulate.c to use guest_read/write_register
3772 * instead of direct ->regs accesses, can save hundred cycles
3773 * on Intel for instructions that don't read/change RSP, for
3776 cache_all_regs(vcpu
);
3778 vcpu
->mmio_is_write
= 0;
3780 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
3782 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
3784 vcpu
->arch
.emulate_ctxt
.vcpu
= vcpu
;
3785 vcpu
->arch
.emulate_ctxt
.eflags
= kvm_x86_ops
->get_rflags(vcpu
);
3786 vcpu
->arch
.emulate_ctxt
.eip
= kvm_rip_read(vcpu
);
3787 vcpu
->arch
.emulate_ctxt
.mode
=
3788 (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
3789 (vcpu
->arch
.emulate_ctxt
.eflags
& X86_EFLAGS_VM
)
3790 ? X86EMUL_MODE_VM86
: cs_l
3791 ? X86EMUL_MODE_PROT64
: cs_db
3792 ? X86EMUL_MODE_PROT32
: X86EMUL_MODE_PROT16
;
3794 r
= x86_decode_insn(&vcpu
->arch
.emulate_ctxt
, &emulate_ops
);
3795 trace_kvm_emulate_insn_start(vcpu
);
3797 /* Only allow emulation of specific instructions on #UD
3798 * (namely VMMCALL, sysenter, sysexit, syscall)*/
3799 c
= &vcpu
->arch
.emulate_ctxt
.decode
;
3800 if (emulation_type
& EMULTYPE_TRAP_UD
) {
3802 return EMULATE_FAIL
;
3804 case 0x01: /* VMMCALL */
3805 if (c
->modrm_mod
!= 3 || c
->modrm_rm
!= 1)
3806 return EMULATE_FAIL
;
3808 case 0x34: /* sysenter */
3809 case 0x35: /* sysexit */
3810 if (c
->modrm_mod
!= 0 || c
->modrm_rm
!= 0)
3811 return EMULATE_FAIL
;
3813 case 0x05: /* syscall */
3814 if (c
->modrm_mod
!= 0 || c
->modrm_rm
!= 0)
3815 return EMULATE_FAIL
;
3818 return EMULATE_FAIL
;
3821 if (!(c
->modrm_reg
== 0 || c
->modrm_reg
== 3))
3822 return EMULATE_FAIL
;
3825 ++vcpu
->stat
.insn_emulation
;
3827 ++vcpu
->stat
.insn_emulation_fail
;
3828 trace_kvm_emulate_insn_failed(vcpu
);
3829 if (kvm_mmu_unprotect_page_virt(vcpu
, cr2
))
3830 return EMULATE_DONE
;
3831 return EMULATE_FAIL
;
3835 if (emulation_type
& EMULTYPE_SKIP
) {
3836 kvm_rip_write(vcpu
, vcpu
->arch
.emulate_ctxt
.decode
.eip
);
3837 return EMULATE_DONE
;
3841 r
= x86_emulate_insn(&vcpu
->arch
.emulate_ctxt
, &emulate_ops
);
3842 shadow_mask
= vcpu
->arch
.emulate_ctxt
.interruptibility
;
3845 kvm_x86_ops
->set_interrupt_shadow(vcpu
, shadow_mask
);
3847 if (vcpu
->arch
.pio
.count
) {
3848 if (!vcpu
->arch
.pio
.in
)
3849 vcpu
->arch
.pio
.count
= 0;
3850 return EMULATE_DO_MMIO
;
3853 if (r
|| vcpu
->mmio_is_write
) {
3854 run
->exit_reason
= KVM_EXIT_MMIO
;
3855 run
->mmio
.phys_addr
= vcpu
->mmio_phys_addr
;
3856 memcpy(run
->mmio
.data
, vcpu
->mmio_data
, 8);
3857 run
->mmio
.len
= vcpu
->mmio_size
;
3858 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
3862 if (kvm_mmu_unprotect_page_virt(vcpu
, cr2
))
3864 if (!vcpu
->mmio_needed
) {
3865 ++vcpu
->stat
.insn_emulation_fail
;
3866 trace_kvm_emulate_insn_failed(vcpu
);
3867 kvm_report_emulation_failure(vcpu
, "mmio");
3868 return EMULATE_FAIL
;
3870 return EMULATE_DO_MMIO
;
3873 if (vcpu
->mmio_is_write
) {
3874 vcpu
->mmio_needed
= 0;
3875 return EMULATE_DO_MMIO
;
3879 if (vcpu
->arch
.exception
.pending
)
3880 vcpu
->arch
.emulate_ctxt
.restart
= false;
3882 if (vcpu
->arch
.emulate_ctxt
.restart
)
3885 return EMULATE_DONE
;
3887 EXPORT_SYMBOL_GPL(emulate_instruction
);
3889 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
3891 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3892 int ret
= emulator_pio_out_emulated(size
, port
, &val
, 1, vcpu
);
3893 /* do not return to emulator after return from userspace */
3894 vcpu
->arch
.pio
.count
= 0;
3897 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
3899 static void bounce_off(void *info
)
3904 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
3907 struct cpufreq_freqs
*freq
= data
;
3909 struct kvm_vcpu
*vcpu
;
3910 int i
, send_ipi
= 0;
3912 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
3914 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
3916 per_cpu(cpu_tsc_khz
, freq
->cpu
) = freq
->new;
3918 spin_lock(&kvm_lock
);
3919 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
3920 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
3921 if (vcpu
->cpu
!= freq
->cpu
)
3923 if (!kvm_request_guest_time_update(vcpu
))
3925 if (vcpu
->cpu
!= smp_processor_id())
3929 spin_unlock(&kvm_lock
);
3931 if (freq
->old
< freq
->new && send_ipi
) {
3933 * We upscale the frequency. Must make the guest
3934 * doesn't see old kvmclock values while running with
3935 * the new frequency, otherwise we risk the guest sees
3936 * time go backwards.
3938 * In case we update the frequency for another cpu
3939 * (which might be in guest context) send an interrupt
3940 * to kick the cpu out of guest context. Next time
3941 * guest context is entered kvmclock will be updated,
3942 * so the guest will not see stale values.
3944 smp_call_function_single(freq
->cpu
, bounce_off
, NULL
, 1);
3949 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
3950 .notifier_call
= kvmclock_cpufreq_notifier
3953 static void kvm_timer_init(void)
3957 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
3958 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
3959 CPUFREQ_TRANSITION_NOTIFIER
);
3960 for_each_online_cpu(cpu
) {
3961 unsigned long khz
= cpufreq_get(cpu
);
3964 per_cpu(cpu_tsc_khz
, cpu
) = khz
;
3967 for_each_possible_cpu(cpu
)
3968 per_cpu(cpu_tsc_khz
, cpu
) = tsc_khz
;
3972 int kvm_arch_init(void *opaque
)
3975 struct kvm_x86_ops
*ops
= (struct kvm_x86_ops
*)opaque
;
3978 printk(KERN_ERR
"kvm: already loaded the other module\n");
3983 if (!ops
->cpu_has_kvm_support()) {
3984 printk(KERN_ERR
"kvm: no hardware support\n");
3988 if (ops
->disabled_by_bios()) {
3989 printk(KERN_ERR
"kvm: disabled by bios\n");
3994 r
= kvm_mmu_module_init();
3998 kvm_init_msr_list();
4001 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4002 kvm_mmu_set_base_ptes(PT_PRESENT_MASK
);
4003 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
4004 PT_DIRTY_MASK
, PT64_NX_MASK
, 0);
4014 void kvm_arch_exit(void)
4016 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
4017 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
4018 CPUFREQ_TRANSITION_NOTIFIER
);
4020 kvm_mmu_module_exit();
4023 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
4025 ++vcpu
->stat
.halt_exits
;
4026 if (irqchip_in_kernel(vcpu
->kvm
)) {
4027 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
4030 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
4034 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
4036 static inline gpa_t
hc_gpa(struct kvm_vcpu
*vcpu
, unsigned long a0
,
4039 if (is_long_mode(vcpu
))
4042 return a0
| ((gpa_t
)a1
<< 32);
4045 int kvm_hv_hypercall(struct kvm_vcpu
*vcpu
)
4047 u64 param
, ingpa
, outgpa
, ret
;
4048 uint16_t code
, rep_idx
, rep_cnt
, res
= HV_STATUS_SUCCESS
, rep_done
= 0;
4049 bool fast
, longmode
;
4053 * hypercall generates UD from non zero cpl and real mode
4056 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 || !is_protmode(vcpu
)) {
4057 kvm_queue_exception(vcpu
, UD_VECTOR
);
4061 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
4062 longmode
= is_long_mode(vcpu
) && cs_l
== 1;
4065 param
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDX
) << 32) |
4066 (kvm_register_read(vcpu
, VCPU_REGS_RAX
) & 0xffffffff);
4067 ingpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RBX
) << 32) |
4068 (kvm_register_read(vcpu
, VCPU_REGS_RCX
) & 0xffffffff);
4069 outgpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDI
) << 32) |
4070 (kvm_register_read(vcpu
, VCPU_REGS_RSI
) & 0xffffffff);
4072 #ifdef CONFIG_X86_64
4074 param
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4075 ingpa
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4076 outgpa
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
4080 code
= param
& 0xffff;
4081 fast
= (param
>> 16) & 0x1;
4082 rep_cnt
= (param
>> 32) & 0xfff;
4083 rep_idx
= (param
>> 48) & 0xfff;
4085 trace_kvm_hv_hypercall(code
, fast
, rep_cnt
, rep_idx
, ingpa
, outgpa
);
4088 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT
:
4089 kvm_vcpu_on_spin(vcpu
);
4092 res
= HV_STATUS_INVALID_HYPERCALL_CODE
;
4096 ret
= res
| (((u64
)rep_done
& 0xfff) << 32);
4098 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
4100 kvm_register_write(vcpu
, VCPU_REGS_RDX
, ret
>> 32);
4101 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
& 0xffffffff);
4107 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
4109 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
4112 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
4113 return kvm_hv_hypercall(vcpu
);
4115 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4116 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
4117 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4118 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4119 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
4121 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
4123 if (!is_long_mode(vcpu
)) {
4131 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
4137 case KVM_HC_VAPIC_POLL_IRQ
:
4141 r
= kvm_pv_mmu_op(vcpu
, a0
, hc_gpa(vcpu
, a1
, a2
), &ret
);
4148 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
4149 ++vcpu
->stat
.hypercalls
;
4152 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
4154 int kvm_fix_hypercall(struct kvm_vcpu
*vcpu
)
4156 char instruction
[3];
4157 unsigned long rip
= kvm_rip_read(vcpu
);
4160 * Blow out the MMU to ensure that no other VCPU has an active mapping
4161 * to ensure that the updated hypercall appears atomically across all
4164 kvm_mmu_zap_all(vcpu
->kvm
);
4166 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
4168 return __emulator_write_emulated(rip
, instruction
, 3, vcpu
, false);
4171 void realmode_lgdt(struct kvm_vcpu
*vcpu
, u16 limit
, unsigned long base
)
4173 struct desc_ptr dt
= { limit
, base
};
4175 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
4178 void realmode_lidt(struct kvm_vcpu
*vcpu
, u16 limit
, unsigned long base
)
4180 struct desc_ptr dt
= { limit
, base
};
4182 kvm_x86_ops
->set_idt(vcpu
, &dt
);
4185 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu
*vcpu
, int i
)
4187 struct kvm_cpuid_entry2
*e
= &vcpu
->arch
.cpuid_entries
[i
];
4188 int j
, nent
= vcpu
->arch
.cpuid_nent
;
4190 e
->flags
&= ~KVM_CPUID_FLAG_STATE_READ_NEXT
;
4191 /* when no next entry is found, the current entry[i] is reselected */
4192 for (j
= i
+ 1; ; j
= (j
+ 1) % nent
) {
4193 struct kvm_cpuid_entry2
*ej
= &vcpu
->arch
.cpuid_entries
[j
];
4194 if (ej
->function
== e
->function
) {
4195 ej
->flags
|= KVM_CPUID_FLAG_STATE_READ_NEXT
;
4199 return 0; /* silence gcc, even though control never reaches here */
4202 /* find an entry with matching function, matching index (if needed), and that
4203 * should be read next (if it's stateful) */
4204 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2
*e
,
4205 u32 function
, u32 index
)
4207 if (e
->function
!= function
)
4209 if ((e
->flags
& KVM_CPUID_FLAG_SIGNIFCANT_INDEX
) && e
->index
!= index
)
4211 if ((e
->flags
& KVM_CPUID_FLAG_STATEFUL_FUNC
) &&
4212 !(e
->flags
& KVM_CPUID_FLAG_STATE_READ_NEXT
))
4217 struct kvm_cpuid_entry2
*kvm_find_cpuid_entry(struct kvm_vcpu
*vcpu
,
4218 u32 function
, u32 index
)
4221 struct kvm_cpuid_entry2
*best
= NULL
;
4223 for (i
= 0; i
< vcpu
->arch
.cpuid_nent
; ++i
) {
4224 struct kvm_cpuid_entry2
*e
;
4226 e
= &vcpu
->arch
.cpuid_entries
[i
];
4227 if (is_matching_cpuid_entry(e
, function
, index
)) {
4228 if (e
->flags
& KVM_CPUID_FLAG_STATEFUL_FUNC
)
4229 move_to_next_stateful_cpuid_entry(vcpu
, i
);
4234 * Both basic or both extended?
4236 if (((e
->function
^ function
) & 0x80000000) == 0)
4237 if (!best
|| e
->function
> best
->function
)
4242 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry
);
4244 int cpuid_maxphyaddr(struct kvm_vcpu
*vcpu
)
4246 struct kvm_cpuid_entry2
*best
;
4248 best
= kvm_find_cpuid_entry(vcpu
, 0x80000000, 0);
4249 if (!best
|| best
->eax
< 0x80000008)
4251 best
= kvm_find_cpuid_entry(vcpu
, 0x80000008, 0);
4253 return best
->eax
& 0xff;
4258 void kvm_emulate_cpuid(struct kvm_vcpu
*vcpu
)
4260 u32 function
, index
;
4261 struct kvm_cpuid_entry2
*best
;
4263 function
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4264 index
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4265 kvm_register_write(vcpu
, VCPU_REGS_RAX
, 0);
4266 kvm_register_write(vcpu
, VCPU_REGS_RBX
, 0);
4267 kvm_register_write(vcpu
, VCPU_REGS_RCX
, 0);
4268 kvm_register_write(vcpu
, VCPU_REGS_RDX
, 0);
4269 best
= kvm_find_cpuid_entry(vcpu
, function
, index
);
4271 kvm_register_write(vcpu
, VCPU_REGS_RAX
, best
->eax
);
4272 kvm_register_write(vcpu
, VCPU_REGS_RBX
, best
->ebx
);
4273 kvm_register_write(vcpu
, VCPU_REGS_RCX
, best
->ecx
);
4274 kvm_register_write(vcpu
, VCPU_REGS_RDX
, best
->edx
);
4276 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
4277 trace_kvm_cpuid(function
,
4278 kvm_register_read(vcpu
, VCPU_REGS_RAX
),
4279 kvm_register_read(vcpu
, VCPU_REGS_RBX
),
4280 kvm_register_read(vcpu
, VCPU_REGS_RCX
),
4281 kvm_register_read(vcpu
, VCPU_REGS_RDX
));
4283 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid
);
4286 * Check if userspace requested an interrupt window, and that the
4287 * interrupt window is open.
4289 * No need to exit to userspace if we already have an interrupt queued.
4291 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
4293 return (!irqchip_in_kernel(vcpu
->kvm
) && !kvm_cpu_has_interrupt(vcpu
) &&
4294 vcpu
->run
->request_interrupt_window
&&
4295 kvm_arch_interrupt_allowed(vcpu
));
4298 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
4300 struct kvm_run
*kvm_run
= vcpu
->run
;
4302 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
4303 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
4304 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
4305 if (irqchip_in_kernel(vcpu
->kvm
))
4306 kvm_run
->ready_for_interrupt_injection
= 1;
4308 kvm_run
->ready_for_interrupt_injection
=
4309 kvm_arch_interrupt_allowed(vcpu
) &&
4310 !kvm_cpu_has_interrupt(vcpu
) &&
4311 !kvm_event_needs_reinjection(vcpu
);
4314 static void vapic_enter(struct kvm_vcpu
*vcpu
)
4316 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
4319 if (!apic
|| !apic
->vapic_addr
)
4322 page
= gfn_to_page(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
4324 vcpu
->arch
.apic
->vapic_page
= page
;
4327 static void vapic_exit(struct kvm_vcpu
*vcpu
)
4329 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
4332 if (!apic
|| !apic
->vapic_addr
)
4335 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
4336 kvm_release_page_dirty(apic
->vapic_page
);
4337 mark_page_dirty(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
4338 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
4341 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
4345 if (!kvm_x86_ops
->update_cr8_intercept
)
4348 if (!vcpu
->arch
.apic
)
4351 if (!vcpu
->arch
.apic
->vapic_addr
)
4352 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
4359 tpr
= kvm_lapic_get_cr8(vcpu
);
4361 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
4364 static void inject_pending_event(struct kvm_vcpu
*vcpu
)
4366 /* try to reinject previous events if any */
4367 if (vcpu
->arch
.exception
.pending
) {
4368 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
4369 vcpu
->arch
.exception
.has_error_code
,
4370 vcpu
->arch
.exception
.error_code
);
4371 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
4372 vcpu
->arch
.exception
.has_error_code
,
4373 vcpu
->arch
.exception
.error_code
);
4377 if (vcpu
->arch
.nmi_injected
) {
4378 kvm_x86_ops
->set_nmi(vcpu
);
4382 if (vcpu
->arch
.interrupt
.pending
) {
4383 kvm_x86_ops
->set_irq(vcpu
);
4387 /* try to inject new event if pending */
4388 if (vcpu
->arch
.nmi_pending
) {
4389 if (kvm_x86_ops
->nmi_allowed(vcpu
)) {
4390 vcpu
->arch
.nmi_pending
= false;
4391 vcpu
->arch
.nmi_injected
= true;
4392 kvm_x86_ops
->set_nmi(vcpu
);
4394 } else if (kvm_cpu_has_interrupt(vcpu
)) {
4395 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
4396 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
4398 kvm_x86_ops
->set_irq(vcpu
);
4403 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
4406 bool req_int_win
= !irqchip_in_kernel(vcpu
->kvm
) &&
4407 vcpu
->run
->request_interrupt_window
;
4410 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD
, &vcpu
->requests
))
4411 kvm_mmu_unload(vcpu
);
4413 r
= kvm_mmu_reload(vcpu
);
4417 if (vcpu
->requests
) {
4418 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER
, &vcpu
->requests
))
4419 __kvm_migrate_timers(vcpu
);
4420 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE
, &vcpu
->requests
))
4421 kvm_write_guest_time(vcpu
);
4422 if (test_and_clear_bit(KVM_REQ_MMU_SYNC
, &vcpu
->requests
))
4423 kvm_mmu_sync_roots(vcpu
);
4424 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH
, &vcpu
->requests
))
4425 kvm_x86_ops
->tlb_flush(vcpu
);
4426 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS
,
4428 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
4432 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT
, &vcpu
->requests
)) {
4433 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
4437 if (test_and_clear_bit(KVM_REQ_DEACTIVATE_FPU
, &vcpu
->requests
)) {
4438 vcpu
->fpu_active
= 0;
4439 kvm_x86_ops
->fpu_deactivate(vcpu
);
4445 kvm_x86_ops
->prepare_guest_switch(vcpu
);
4446 if (vcpu
->fpu_active
)
4447 kvm_load_guest_fpu(vcpu
);
4449 local_irq_disable();
4451 clear_bit(KVM_REQ_KICK
, &vcpu
->requests
);
4452 smp_mb__after_clear_bit();
4454 if (vcpu
->requests
|| need_resched() || signal_pending(current
)) {
4455 set_bit(KVM_REQ_KICK
, &vcpu
->requests
);
4462 inject_pending_event(vcpu
);
4464 /* enable NMI/IRQ window open exits if needed */
4465 if (vcpu
->arch
.nmi_pending
)
4466 kvm_x86_ops
->enable_nmi_window(vcpu
);
4467 else if (kvm_cpu_has_interrupt(vcpu
) || req_int_win
)
4468 kvm_x86_ops
->enable_irq_window(vcpu
);
4470 if (kvm_lapic_enabled(vcpu
)) {
4471 update_cr8_intercept(vcpu
);
4472 kvm_lapic_sync_to_vapic(vcpu
);
4475 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
4479 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
4481 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
4482 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
4483 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
4484 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
4487 trace_kvm_entry(vcpu
->vcpu_id
);
4488 kvm_x86_ops
->run(vcpu
);
4491 * If the guest has used debug registers, at least dr7
4492 * will be disabled while returning to the host.
4493 * If we don't have active breakpoints in the host, we don't
4494 * care about the messed up debug address registers. But if
4495 * we have some of them active, restore the old state.
4497 if (hw_breakpoint_active())
4498 hw_breakpoint_restore();
4500 set_bit(KVM_REQ_KICK
, &vcpu
->requests
);
4506 * We must have an instruction between local_irq_enable() and
4507 * kvm_guest_exit(), so the timer interrupt isn't delayed by
4508 * the interrupt shadow. The stat.exits increment will do nicely.
4509 * But we need to prevent reordering, hence this barrier():
4517 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
4520 * Profile KVM exit RIPs:
4522 if (unlikely(prof_on
== KVM_PROFILING
)) {
4523 unsigned long rip
= kvm_rip_read(vcpu
);
4524 profile_hit(KVM_PROFILING
, (void *)rip
);
4528 kvm_lapic_sync_from_vapic(vcpu
);
4530 r
= kvm_x86_ops
->handle_exit(vcpu
);
4536 static int __vcpu_run(struct kvm_vcpu
*vcpu
)
4539 struct kvm
*kvm
= vcpu
->kvm
;
4541 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
)) {
4542 pr_debug("vcpu %d received sipi with vector # %x\n",
4543 vcpu
->vcpu_id
, vcpu
->arch
.sipi_vector
);
4544 kvm_lapic_reset(vcpu
);
4545 r
= kvm_arch_vcpu_reset(vcpu
);
4548 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
4551 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
4556 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
)
4557 r
= vcpu_enter_guest(vcpu
);
4559 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
4560 kvm_vcpu_block(vcpu
);
4561 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
4562 if (test_and_clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
))
4564 switch(vcpu
->arch
.mp_state
) {
4565 case KVM_MP_STATE_HALTED
:
4566 vcpu
->arch
.mp_state
=
4567 KVM_MP_STATE_RUNNABLE
;
4568 case KVM_MP_STATE_RUNNABLE
:
4570 case KVM_MP_STATE_SIPI_RECEIVED
:
4581 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
4582 if (kvm_cpu_has_pending_timer(vcpu
))
4583 kvm_inject_pending_timer_irqs(vcpu
);
4585 if (dm_request_for_irq_injection(vcpu
)) {
4587 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
4588 ++vcpu
->stat
.request_irq_exits
;
4590 if (signal_pending(current
)) {
4592 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
4593 ++vcpu
->stat
.signal_exits
;
4595 if (need_resched()) {
4596 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
4598 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
4602 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
4603 post_kvm_run_save(vcpu
);
4610 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
4617 if (vcpu
->sigset_active
)
4618 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
4620 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
4621 kvm_vcpu_block(vcpu
);
4622 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
4627 /* re-sync apic's tpr */
4628 if (!irqchip_in_kernel(vcpu
->kvm
))
4629 kvm_set_cr8(vcpu
, kvm_run
->cr8
);
4631 if (vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
||
4632 vcpu
->arch
.emulate_ctxt
.restart
) {
4633 if (vcpu
->mmio_needed
) {
4634 memcpy(vcpu
->mmio_data
, kvm_run
->mmio
.data
, 8);
4635 vcpu
->mmio_read_completed
= 1;
4636 vcpu
->mmio_needed
= 0;
4638 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
4639 r
= emulate_instruction(vcpu
, 0, 0, EMULTYPE_NO_DECODE
);
4640 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
4641 if (r
== EMULATE_DO_MMIO
) {
4646 if (kvm_run
->exit_reason
== KVM_EXIT_HYPERCALL
)
4647 kvm_register_write(vcpu
, VCPU_REGS_RAX
,
4648 kvm_run
->hypercall
.ret
);
4650 r
= __vcpu_run(vcpu
);
4653 if (vcpu
->sigset_active
)
4654 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
4660 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
4664 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4665 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
4666 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4667 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4668 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
4669 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
4670 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
4671 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
4672 #ifdef CONFIG_X86_64
4673 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
4674 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
4675 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
4676 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
4677 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
4678 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
4679 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
4680 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
4683 regs
->rip
= kvm_rip_read(vcpu
);
4684 regs
->rflags
= kvm_get_rflags(vcpu
);
4691 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
4695 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
4696 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
4697 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
4698 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
4699 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
4700 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
4701 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
4702 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
4703 #ifdef CONFIG_X86_64
4704 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
4705 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
4706 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
4707 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
4708 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
4709 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
4710 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
4711 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
4714 kvm_rip_write(vcpu
, regs
->rip
);
4715 kvm_set_rflags(vcpu
, regs
->rflags
);
4717 vcpu
->arch
.exception
.pending
= false;
4724 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
4726 struct kvm_segment cs
;
4728 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
4732 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
4734 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
4735 struct kvm_sregs
*sregs
)
4741 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
4742 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
4743 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
4744 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
4745 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
4746 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
4748 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
4749 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
4751 kvm_x86_ops
->get_idt(vcpu
, &dt
);
4752 sregs
->idt
.limit
= dt
.size
;
4753 sregs
->idt
.base
= dt
.address
;
4754 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
4755 sregs
->gdt
.limit
= dt
.size
;
4756 sregs
->gdt
.base
= dt
.address
;
4758 sregs
->cr0
= kvm_read_cr0(vcpu
);
4759 sregs
->cr2
= vcpu
->arch
.cr2
;
4760 sregs
->cr3
= vcpu
->arch
.cr3
;
4761 sregs
->cr4
= kvm_read_cr4(vcpu
);
4762 sregs
->cr8
= kvm_get_cr8(vcpu
);
4763 sregs
->efer
= vcpu
->arch
.efer
;
4764 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
4766 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
4768 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
4769 set_bit(vcpu
->arch
.interrupt
.nr
,
4770 (unsigned long *)sregs
->interrupt_bitmap
);
4777 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
4778 struct kvm_mp_state
*mp_state
)
4781 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
4786 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
4787 struct kvm_mp_state
*mp_state
)
4790 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
4795 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int reason
)
4797 int cs_db
, cs_l
, ret
;
4798 cache_all_regs(vcpu
);
4800 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
4802 vcpu
->arch
.emulate_ctxt
.vcpu
= vcpu
;
4803 vcpu
->arch
.emulate_ctxt
.eflags
= kvm_x86_ops
->get_rflags(vcpu
);
4804 vcpu
->arch
.emulate_ctxt
.eip
= kvm_rip_read(vcpu
);
4805 vcpu
->arch
.emulate_ctxt
.mode
=
4806 (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
4807 (vcpu
->arch
.emulate_ctxt
.eflags
& X86_EFLAGS_VM
)
4808 ? X86EMUL_MODE_VM86
: cs_l
4809 ? X86EMUL_MODE_PROT64
: cs_db
4810 ? X86EMUL_MODE_PROT32
: X86EMUL_MODE_PROT16
;
4812 ret
= emulator_task_switch(&vcpu
->arch
.emulate_ctxt
, &emulate_ops
,
4813 tss_selector
, reason
);
4815 if (ret
== X86EMUL_CONTINUE
)
4816 kvm_x86_ops
->set_rflags(vcpu
, vcpu
->arch
.emulate_ctxt
.eflags
);
4818 return (ret
!= X86EMUL_CONTINUE
);
4820 EXPORT_SYMBOL_GPL(kvm_task_switch
);
4822 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
4823 struct kvm_sregs
*sregs
)
4825 int mmu_reset_needed
= 0;
4826 int pending_vec
, max_bits
;
4831 dt
.size
= sregs
->idt
.limit
;
4832 dt
.address
= sregs
->idt
.base
;
4833 kvm_x86_ops
->set_idt(vcpu
, &dt
);
4834 dt
.size
= sregs
->gdt
.limit
;
4835 dt
.address
= sregs
->gdt
.base
;
4836 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
4838 vcpu
->arch
.cr2
= sregs
->cr2
;
4839 mmu_reset_needed
|= vcpu
->arch
.cr3
!= sregs
->cr3
;
4840 vcpu
->arch
.cr3
= sregs
->cr3
;
4842 kvm_set_cr8(vcpu
, sregs
->cr8
);
4844 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
4845 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
4846 kvm_set_apic_base(vcpu
, sregs
->apic_base
);
4848 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
4849 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
4850 vcpu
->arch
.cr0
= sregs
->cr0
;
4852 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
4853 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
4854 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
4855 load_pdptrs(vcpu
, vcpu
->arch
.cr3
);
4856 mmu_reset_needed
= 1;
4859 if (mmu_reset_needed
)
4860 kvm_mmu_reset_context(vcpu
);
4862 max_bits
= (sizeof sregs
->interrupt_bitmap
) << 3;
4863 pending_vec
= find_first_bit(
4864 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
4865 if (pending_vec
< max_bits
) {
4866 kvm_queue_interrupt(vcpu
, pending_vec
, false);
4867 pr_debug("Set back pending irq %d\n", pending_vec
);
4868 if (irqchip_in_kernel(vcpu
->kvm
))
4869 kvm_pic_clear_isr_ack(vcpu
->kvm
);
4872 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
4873 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
4874 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
4875 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
4876 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
4877 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
4879 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
4880 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
4882 update_cr8_intercept(vcpu
);
4884 /* Older userspace won't unhalt the vcpu on reset. */
4885 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
4886 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
4888 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
4895 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
4896 struct kvm_guest_debug
*dbg
)
4898 unsigned long rflags
;
4903 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
4905 if (vcpu
->arch
.exception
.pending
)
4907 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
4908 kvm_queue_exception(vcpu
, DB_VECTOR
);
4910 kvm_queue_exception(vcpu
, BP_VECTOR
);
4914 * Read rflags as long as potentially injected trace flags are still
4917 rflags
= kvm_get_rflags(vcpu
);
4919 vcpu
->guest_debug
= dbg
->control
;
4920 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
4921 vcpu
->guest_debug
= 0;
4923 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
4924 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
4925 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
4926 vcpu
->arch
.switch_db_regs
=
4927 (dbg
->arch
.debugreg
[7] & DR7_BP_EN_MASK
);
4929 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
4930 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
4931 vcpu
->arch
.switch_db_regs
= (vcpu
->arch
.dr7
& DR7_BP_EN_MASK
);
4934 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
4935 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
4936 get_segment_base(vcpu
, VCPU_SREG_CS
);
4939 * Trigger an rflags update that will inject or remove the trace
4942 kvm_set_rflags(vcpu
, rflags
);
4944 kvm_x86_ops
->set_guest_debug(vcpu
, dbg
);
4955 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
4956 * we have asm/x86/processor.h
4967 u32 st_space
[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
4968 #ifdef CONFIG_X86_64
4969 u32 xmm_space
[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
4971 u32 xmm_space
[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
4976 * Translate a guest virtual address to a guest physical address.
4978 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
4979 struct kvm_translation
*tr
)
4981 unsigned long vaddr
= tr
->linear_address
;
4986 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
4987 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
4988 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
4989 tr
->physical_address
= gpa
;
4990 tr
->valid
= gpa
!= UNMAPPED_GVA
;
4998 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
5000 struct fxsave
*fxsave
= (struct fxsave
*)&vcpu
->arch
.guest_fx_image
;
5004 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
5005 fpu
->fcw
= fxsave
->cwd
;
5006 fpu
->fsw
= fxsave
->swd
;
5007 fpu
->ftwx
= fxsave
->twd
;
5008 fpu
->last_opcode
= fxsave
->fop
;
5009 fpu
->last_ip
= fxsave
->rip
;
5010 fpu
->last_dp
= fxsave
->rdp
;
5011 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
5018 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
5020 struct fxsave
*fxsave
= (struct fxsave
*)&vcpu
->arch
.guest_fx_image
;
5024 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
5025 fxsave
->cwd
= fpu
->fcw
;
5026 fxsave
->swd
= fpu
->fsw
;
5027 fxsave
->twd
= fpu
->ftwx
;
5028 fxsave
->fop
= fpu
->last_opcode
;
5029 fxsave
->rip
= fpu
->last_ip
;
5030 fxsave
->rdp
= fpu
->last_dp
;
5031 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
5038 void fx_init(struct kvm_vcpu
*vcpu
)
5040 unsigned after_mxcsr_mask
;
5043 * Touch the fpu the first time in non atomic context as if
5044 * this is the first fpu instruction the exception handler
5045 * will fire before the instruction returns and it'll have to
5046 * allocate ram with GFP_KERNEL.
5049 kvm_fx_save(&vcpu
->arch
.host_fx_image
);
5051 /* Initialize guest FPU by resetting ours and saving into guest's */
5053 kvm_fx_save(&vcpu
->arch
.host_fx_image
);
5055 kvm_fx_save(&vcpu
->arch
.guest_fx_image
);
5056 kvm_fx_restore(&vcpu
->arch
.host_fx_image
);
5059 vcpu
->arch
.cr0
|= X86_CR0_ET
;
5060 after_mxcsr_mask
= offsetof(struct i387_fxsave_struct
, st_space
);
5061 vcpu
->arch
.guest_fx_image
.mxcsr
= 0x1f80;
5062 memset((void *)&vcpu
->arch
.guest_fx_image
+ after_mxcsr_mask
,
5063 0, sizeof(struct i387_fxsave_struct
) - after_mxcsr_mask
);
5065 EXPORT_SYMBOL_GPL(fx_init
);
5067 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
5069 if (vcpu
->guest_fpu_loaded
)
5072 vcpu
->guest_fpu_loaded
= 1;
5073 kvm_fx_save(&vcpu
->arch
.host_fx_image
);
5074 kvm_fx_restore(&vcpu
->arch
.guest_fx_image
);
5078 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
5080 if (!vcpu
->guest_fpu_loaded
)
5083 vcpu
->guest_fpu_loaded
= 0;
5084 kvm_fx_save(&vcpu
->arch
.guest_fx_image
);
5085 kvm_fx_restore(&vcpu
->arch
.host_fx_image
);
5086 ++vcpu
->stat
.fpu_reload
;
5087 set_bit(KVM_REQ_DEACTIVATE_FPU
, &vcpu
->requests
);
5091 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
5093 if (vcpu
->arch
.time_page
) {
5094 kvm_release_page_dirty(vcpu
->arch
.time_page
);
5095 vcpu
->arch
.time_page
= NULL
;
5098 kvm_x86_ops
->vcpu_free(vcpu
);
5101 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
5104 return kvm_x86_ops
->vcpu_create(kvm
, id
);
5107 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
5111 /* We do fxsave: this must be aligned. */
5112 BUG_ON((unsigned long)&vcpu
->arch
.host_fx_image
& 0xF);
5114 vcpu
->arch
.mtrr_state
.have_fixed
= 1;
5116 r
= kvm_arch_vcpu_reset(vcpu
);
5118 r
= kvm_mmu_setup(vcpu
);
5125 kvm_x86_ops
->vcpu_free(vcpu
);
5129 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
5132 kvm_mmu_unload(vcpu
);
5135 kvm_x86_ops
->vcpu_free(vcpu
);
5138 int kvm_arch_vcpu_reset(struct kvm_vcpu
*vcpu
)
5140 vcpu
->arch
.nmi_pending
= false;
5141 vcpu
->arch
.nmi_injected
= false;
5143 vcpu
->arch
.switch_db_regs
= 0;
5144 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
5145 vcpu
->arch
.dr6
= DR6_FIXED_1
;
5146 vcpu
->arch
.dr7
= DR7_FIXED_1
;
5148 return kvm_x86_ops
->vcpu_reset(vcpu
);
5151 int kvm_arch_hardware_enable(void *garbage
)
5154 * Since this may be called from a hotplug notifcation,
5155 * we can't get the CPU frequency directly.
5157 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
5158 int cpu
= raw_smp_processor_id();
5159 per_cpu(cpu_tsc_khz
, cpu
) = 0;
5162 kvm_shared_msr_cpu_online();
5164 return kvm_x86_ops
->hardware_enable(garbage
);
5167 void kvm_arch_hardware_disable(void *garbage
)
5169 kvm_x86_ops
->hardware_disable(garbage
);
5170 drop_user_return_notifiers(garbage
);
5173 int kvm_arch_hardware_setup(void)
5175 return kvm_x86_ops
->hardware_setup();
5178 void kvm_arch_hardware_unsetup(void)
5180 kvm_x86_ops
->hardware_unsetup();
5183 void kvm_arch_check_processor_compat(void *rtn
)
5185 kvm_x86_ops
->check_processor_compatibility(rtn
);
5188 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
5194 BUG_ON(vcpu
->kvm
== NULL
);
5197 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
5198 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_bsp(vcpu
))
5199 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
5201 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
5203 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
5208 vcpu
->arch
.pio_data
= page_address(page
);
5210 r
= kvm_mmu_create(vcpu
);
5212 goto fail_free_pio_data
;
5214 if (irqchip_in_kernel(kvm
)) {
5215 r
= kvm_create_lapic(vcpu
);
5217 goto fail_mmu_destroy
;
5220 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
5222 if (!vcpu
->arch
.mce_banks
) {
5224 goto fail_free_lapic
;
5226 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
5230 kvm_free_lapic(vcpu
);
5232 kvm_mmu_destroy(vcpu
);
5234 free_page((unsigned long)vcpu
->arch
.pio_data
);
5239 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
5243 kfree(vcpu
->arch
.mce_banks
);
5244 kvm_free_lapic(vcpu
);
5245 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5246 kvm_mmu_destroy(vcpu
);
5247 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5248 free_page((unsigned long)vcpu
->arch
.pio_data
);
5251 struct kvm
*kvm_arch_create_vm(void)
5253 struct kvm
*kvm
= kzalloc(sizeof(struct kvm
), GFP_KERNEL
);
5256 return ERR_PTR(-ENOMEM
);
5258 kvm
->arch
.aliases
= kzalloc(sizeof(struct kvm_mem_aliases
), GFP_KERNEL
);
5259 if (!kvm
->arch
.aliases
) {
5261 return ERR_PTR(-ENOMEM
);
5264 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
5265 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
5267 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5268 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
5270 rdtscll(kvm
->arch
.vm_init_tsc
);
5275 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
5278 kvm_mmu_unload(vcpu
);
5282 static void kvm_free_vcpus(struct kvm
*kvm
)
5285 struct kvm_vcpu
*vcpu
;
5288 * Unpin any mmu pages first.
5290 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5291 kvm_unload_vcpu_mmu(vcpu
);
5292 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5293 kvm_arch_vcpu_free(vcpu
);
5295 mutex_lock(&kvm
->lock
);
5296 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
5297 kvm
->vcpus
[i
] = NULL
;
5299 atomic_set(&kvm
->online_vcpus
, 0);
5300 mutex_unlock(&kvm
->lock
);
5303 void kvm_arch_sync_events(struct kvm
*kvm
)
5305 kvm_free_all_assigned_devices(kvm
);
5308 void kvm_arch_destroy_vm(struct kvm
*kvm
)
5310 kvm_iommu_unmap_guest(kvm
);
5312 kfree(kvm
->arch
.vpic
);
5313 kfree(kvm
->arch
.vioapic
);
5314 kvm_free_vcpus(kvm
);
5315 kvm_free_physmem(kvm
);
5316 if (kvm
->arch
.apic_access_page
)
5317 put_page(kvm
->arch
.apic_access_page
);
5318 if (kvm
->arch
.ept_identity_pagetable
)
5319 put_page(kvm
->arch
.ept_identity_pagetable
);
5320 cleanup_srcu_struct(&kvm
->srcu
);
5321 kfree(kvm
->arch
.aliases
);
5325 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
5326 struct kvm_memory_slot
*memslot
,
5327 struct kvm_memory_slot old
,
5328 struct kvm_userspace_memory_region
*mem
,
5331 int npages
= memslot
->npages
;
5333 /*To keep backward compatibility with older userspace,
5334 *x86 needs to hanlde !user_alloc case.
5337 if (npages
&& !old
.rmap
) {
5338 unsigned long userspace_addr
;
5340 down_write(¤t
->mm
->mmap_sem
);
5341 userspace_addr
= do_mmap(NULL
, 0,
5343 PROT_READ
| PROT_WRITE
,
5344 MAP_PRIVATE
| MAP_ANONYMOUS
,
5346 up_write(¤t
->mm
->mmap_sem
);
5348 if (IS_ERR((void *)userspace_addr
))
5349 return PTR_ERR((void *)userspace_addr
);
5351 memslot
->userspace_addr
= userspace_addr
;
5359 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
5360 struct kvm_userspace_memory_region
*mem
,
5361 struct kvm_memory_slot old
,
5365 int npages
= mem
->memory_size
>> PAGE_SHIFT
;
5367 if (!user_alloc
&& !old
.user_alloc
&& old
.rmap
&& !npages
) {
5370 down_write(¤t
->mm
->mmap_sem
);
5371 ret
= do_munmap(current
->mm
, old
.userspace_addr
,
5372 old
.npages
* PAGE_SIZE
);
5373 up_write(¤t
->mm
->mmap_sem
);
5376 "kvm_vm_ioctl_set_memory_region: "
5377 "failed to munmap memory\n");
5380 spin_lock(&kvm
->mmu_lock
);
5381 if (!kvm
->arch
.n_requested_mmu_pages
) {
5382 unsigned int nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
5383 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
5386 kvm_mmu_slot_remove_write_access(kvm
, mem
->slot
);
5387 spin_unlock(&kvm
->mmu_lock
);
5390 void kvm_arch_flush_shadow(struct kvm
*kvm
)
5392 kvm_mmu_zap_all(kvm
);
5393 kvm_reload_remote_mmus(kvm
);
5396 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
5398 return vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
5399 || vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
5400 || vcpu
->arch
.nmi_pending
||
5401 (kvm_arch_interrupt_allowed(vcpu
) &&
5402 kvm_cpu_has_interrupt(vcpu
));
5405 void kvm_vcpu_kick(struct kvm_vcpu
*vcpu
)
5408 int cpu
= vcpu
->cpu
;
5410 if (waitqueue_active(&vcpu
->wq
)) {
5411 wake_up_interruptible(&vcpu
->wq
);
5412 ++vcpu
->stat
.halt_wakeup
;
5416 if (cpu
!= me
&& (unsigned)cpu
< nr_cpu_ids
&& cpu_online(cpu
))
5417 if (!test_and_set_bit(KVM_REQ_KICK
, &vcpu
->requests
))
5418 smp_send_reschedule(cpu
);
5422 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
5424 return kvm_x86_ops
->interrupt_allowed(vcpu
);
5427 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
5429 unsigned long current_rip
= kvm_rip_read(vcpu
) +
5430 get_segment_base(vcpu
, VCPU_SREG_CS
);
5432 return current_rip
== linear_rip
;
5434 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
5436 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
5438 unsigned long rflags
;
5440 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5441 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
5442 rflags
&= ~X86_EFLAGS_TF
;
5445 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
5447 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
5449 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
5450 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
5451 rflags
|= X86_EFLAGS_TF
;
5452 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
5454 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
5456 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
5457 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
5458 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
5459 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
5460 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
5461 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
5462 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
5463 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
5464 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
5465 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
5466 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
5467 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);