2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
21 #include <linux/kvm_host.h>
26 #include "kvm_cache_regs.h"
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
33 #include <linux/vmalloc.h>
34 #include <linux/module.h>
35 #include <linux/mman.h>
36 #include <linux/highmem.h>
37 #include <linux/iommu.h>
38 #include <linux/intel-iommu.h>
39 #include <linux/cpufreq.h>
40 #include <trace/events/kvm.h>
41 #undef TRACE_INCLUDE_FILE
42 #define CREATE_TRACE_POINTS
45 #include <asm/uaccess.h>
51 #define MAX_IO_MSRS 256
52 #define CR0_RESERVED_BITS \
53 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
54 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
55 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
56 #define CR4_RESERVED_BITS \
57 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
58 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
59 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
60 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
62 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
64 #define KVM_MAX_MCE_BANKS 32
65 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
68 * - enable syscall per default because its emulated by KVM
69 * - enable LME and LMA per default on 64 bit KVM
72 static u64 __read_mostly efer_reserved_bits
= 0xfffffffffffffafeULL
;
74 static u64 __read_mostly efer_reserved_bits
= 0xfffffffffffffffeULL
;
77 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
78 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
80 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
81 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2
*cpuid
,
82 struct kvm_cpuid_entry2 __user
*entries
);
84 struct kvm_x86_ops
*kvm_x86_ops
;
85 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
88 module_param_named(ignore_msrs
, ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
90 struct kvm_stats_debugfs_item debugfs_entries
[] = {
91 { "pf_fixed", VCPU_STAT(pf_fixed
) },
92 { "pf_guest", VCPU_STAT(pf_guest
) },
93 { "tlb_flush", VCPU_STAT(tlb_flush
) },
94 { "invlpg", VCPU_STAT(invlpg
) },
95 { "exits", VCPU_STAT(exits
) },
96 { "io_exits", VCPU_STAT(io_exits
) },
97 { "mmio_exits", VCPU_STAT(mmio_exits
) },
98 { "signal_exits", VCPU_STAT(signal_exits
) },
99 { "irq_window", VCPU_STAT(irq_window_exits
) },
100 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
101 { "halt_exits", VCPU_STAT(halt_exits
) },
102 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
103 { "hypercalls", VCPU_STAT(hypercalls
) },
104 { "request_irq", VCPU_STAT(request_irq_exits
) },
105 { "irq_exits", VCPU_STAT(irq_exits
) },
106 { "host_state_reload", VCPU_STAT(host_state_reload
) },
107 { "efer_reload", VCPU_STAT(efer_reload
) },
108 { "fpu_reload", VCPU_STAT(fpu_reload
) },
109 { "insn_emulation", VCPU_STAT(insn_emulation
) },
110 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
111 { "irq_injections", VCPU_STAT(irq_injections
) },
112 { "nmi_injections", VCPU_STAT(nmi_injections
) },
113 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
114 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
115 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
116 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
117 { "mmu_flooded", VM_STAT(mmu_flooded
) },
118 { "mmu_recycled", VM_STAT(mmu_recycled
) },
119 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
120 { "mmu_unsync", VM_STAT(mmu_unsync
) },
121 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
122 { "largepages", VM_STAT(lpages
) },
126 unsigned long segment_base(u16 selector
)
128 struct descriptor_table gdt
;
129 struct desc_struct
*d
;
130 unsigned long table_base
;
137 table_base
= gdt
.base
;
139 if (selector
& 4) { /* from ldt */
140 u16 ldt_selector
= kvm_read_ldt();
142 table_base
= segment_base(ldt_selector
);
144 d
= (struct desc_struct
*)(table_base
+ (selector
& ~7));
145 v
= get_desc_base(d
);
147 if (d
->s
== 0 && (d
->type
== 2 || d
->type
== 9 || d
->type
== 11))
148 v
|= ((unsigned long)((struct ldttss_desc64
*)d
)->base3
) << 32;
152 EXPORT_SYMBOL_GPL(segment_base
);
154 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
156 if (irqchip_in_kernel(vcpu
->kvm
))
157 return vcpu
->arch
.apic_base
;
159 return vcpu
->arch
.apic_base
;
161 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
163 void kvm_set_apic_base(struct kvm_vcpu
*vcpu
, u64 data
)
165 /* TODO: reserve bits check */
166 if (irqchip_in_kernel(vcpu
->kvm
))
167 kvm_lapic_set_base(vcpu
, data
);
169 vcpu
->arch
.apic_base
= data
;
171 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
173 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
175 WARN_ON(vcpu
->arch
.exception
.pending
);
176 vcpu
->arch
.exception
.pending
= true;
177 vcpu
->arch
.exception
.has_error_code
= false;
178 vcpu
->arch
.exception
.nr
= nr
;
180 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
182 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, unsigned long addr
,
185 ++vcpu
->stat
.pf_guest
;
187 if (vcpu
->arch
.exception
.pending
) {
188 switch(vcpu
->arch
.exception
.nr
) {
190 /* triple fault -> shutdown */
191 set_bit(KVM_REQ_TRIPLE_FAULT
, &vcpu
->requests
);
194 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
195 vcpu
->arch
.exception
.error_code
= 0;
198 /* replace previous exception with a new one in a hope
199 that instruction re-execution will regenerate lost
201 vcpu
->arch
.exception
.pending
= false;
205 vcpu
->arch
.cr2
= addr
;
206 kvm_queue_exception_e(vcpu
, PF_VECTOR
, error_code
);
209 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
211 vcpu
->arch
.nmi_pending
= 1;
213 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
215 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
217 WARN_ON(vcpu
->arch
.exception
.pending
);
218 vcpu
->arch
.exception
.pending
= true;
219 vcpu
->arch
.exception
.has_error_code
= true;
220 vcpu
->arch
.exception
.nr
= nr
;
221 vcpu
->arch
.exception
.error_code
= error_code
;
223 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
226 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
227 * a #GP and return false.
229 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
231 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
233 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
236 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
238 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
240 unsigned long rflags
;
242 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
243 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
244 rflags
&= ~(unsigned long)(X86_EFLAGS_TF
| X86_EFLAGS_RF
);
247 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
249 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
251 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
252 rflags
|= X86_EFLAGS_TF
| X86_EFLAGS_RF
;
253 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
255 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
258 * Load the pae pdptrs. Return true is they are all valid.
260 int load_pdptrs(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
262 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
263 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
266 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.pdptrs
)];
268 ret
= kvm_read_guest_page(vcpu
->kvm
, pdpt_gfn
, pdpte
,
269 offset
* sizeof(u64
), sizeof(pdpte
));
274 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
275 if (is_present_gpte(pdpte
[i
]) &&
276 (pdpte
[i
] & vcpu
->arch
.mmu
.rsvd_bits_mask
[0][2])) {
283 memcpy(vcpu
->arch
.pdptrs
, pdpte
, sizeof(vcpu
->arch
.pdptrs
));
284 __set_bit(VCPU_EXREG_PDPTR
,
285 (unsigned long *)&vcpu
->arch
.regs_avail
);
286 __set_bit(VCPU_EXREG_PDPTR
,
287 (unsigned long *)&vcpu
->arch
.regs_dirty
);
292 EXPORT_SYMBOL_GPL(load_pdptrs
);
294 static bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
296 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.pdptrs
)];
300 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
303 if (!test_bit(VCPU_EXREG_PDPTR
,
304 (unsigned long *)&vcpu
->arch
.regs_avail
))
307 r
= kvm_read_guest(vcpu
->kvm
, vcpu
->arch
.cr3
& ~31u, pdpte
, sizeof(pdpte
));
310 changed
= memcmp(pdpte
, vcpu
->arch
.pdptrs
, sizeof(pdpte
)) != 0;
316 void kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
318 if (cr0
& CR0_RESERVED_BITS
) {
319 printk(KERN_DEBUG
"set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
320 cr0
, vcpu
->arch
.cr0
);
321 kvm_inject_gp(vcpu
, 0);
325 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
)) {
326 printk(KERN_DEBUG
"set_cr0: #GP, CD == 0 && NW == 1\n");
327 kvm_inject_gp(vcpu
, 0);
331 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
)) {
332 printk(KERN_DEBUG
"set_cr0: #GP, set PG flag "
333 "and a clear PE flag\n");
334 kvm_inject_gp(vcpu
, 0);
338 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
340 if ((vcpu
->arch
.shadow_efer
& EFER_LME
)) {
344 printk(KERN_DEBUG
"set_cr0: #GP, start paging "
345 "in long mode while PAE is disabled\n");
346 kvm_inject_gp(vcpu
, 0);
349 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
351 printk(KERN_DEBUG
"set_cr0: #GP, start paging "
352 "in long mode while CS.L == 1\n");
353 kvm_inject_gp(vcpu
, 0);
359 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.cr3
)) {
360 printk(KERN_DEBUG
"set_cr0: #GP, pdptrs "
362 kvm_inject_gp(vcpu
, 0);
368 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
369 vcpu
->arch
.cr0
= cr0
;
371 kvm_mmu_reset_context(vcpu
);
374 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
376 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
378 kvm_set_cr0(vcpu
, (vcpu
->arch
.cr0
& ~0x0ful
) | (msw
& 0x0f));
380 EXPORT_SYMBOL_GPL(kvm_lmsw
);
382 void kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
384 unsigned long old_cr4
= vcpu
->arch
.cr4
;
385 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
;
387 if (cr4
& CR4_RESERVED_BITS
) {
388 printk(KERN_DEBUG
"set_cr4: #GP, reserved bits\n");
389 kvm_inject_gp(vcpu
, 0);
393 if (is_long_mode(vcpu
)) {
394 if (!(cr4
& X86_CR4_PAE
)) {
395 printk(KERN_DEBUG
"set_cr4: #GP, clearing PAE while "
397 kvm_inject_gp(vcpu
, 0);
400 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
401 && ((cr4
^ old_cr4
) & pdptr_bits
)
402 && !load_pdptrs(vcpu
, vcpu
->arch
.cr3
)) {
403 printk(KERN_DEBUG
"set_cr4: #GP, pdptrs reserved bits\n");
404 kvm_inject_gp(vcpu
, 0);
408 if (cr4
& X86_CR4_VMXE
) {
409 printk(KERN_DEBUG
"set_cr4: #GP, setting VMXE\n");
410 kvm_inject_gp(vcpu
, 0);
413 kvm_x86_ops
->set_cr4(vcpu
, cr4
);
414 vcpu
->arch
.cr4
= cr4
;
415 vcpu
->arch
.mmu
.base_role
.cr4_pge
= (cr4
& X86_CR4_PGE
) && !tdp_enabled
;
416 kvm_mmu_reset_context(vcpu
);
418 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
420 void kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
422 if (cr3
== vcpu
->arch
.cr3
&& !pdptrs_changed(vcpu
)) {
423 kvm_mmu_sync_roots(vcpu
);
424 kvm_mmu_flush_tlb(vcpu
);
428 if (is_long_mode(vcpu
)) {
429 if (cr3
& CR3_L_MODE_RESERVED_BITS
) {
430 printk(KERN_DEBUG
"set_cr3: #GP, reserved bits\n");
431 kvm_inject_gp(vcpu
, 0);
436 if (cr3
& CR3_PAE_RESERVED_BITS
) {
438 "set_cr3: #GP, reserved bits\n");
439 kvm_inject_gp(vcpu
, 0);
442 if (is_paging(vcpu
) && !load_pdptrs(vcpu
, cr3
)) {
443 printk(KERN_DEBUG
"set_cr3: #GP, pdptrs "
445 kvm_inject_gp(vcpu
, 0);
450 * We don't check reserved bits in nonpae mode, because
451 * this isn't enforced, and VMware depends on this.
456 * Does the new cr3 value map to physical memory? (Note, we
457 * catch an invalid cr3 even in real-mode, because it would
458 * cause trouble later on when we turn on paging anyway.)
460 * A real CPU would silently accept an invalid cr3 and would
461 * attempt to use it - with largely undefined (and often hard
462 * to debug) behavior on the guest side.
464 if (unlikely(!gfn_to_memslot(vcpu
->kvm
, cr3
>> PAGE_SHIFT
)))
465 kvm_inject_gp(vcpu
, 0);
467 vcpu
->arch
.cr3
= cr3
;
468 vcpu
->arch
.mmu
.new_cr3(vcpu
);
471 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
473 void kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
475 if (cr8
& CR8_RESERVED_BITS
) {
476 printk(KERN_DEBUG
"set_cr8: #GP, reserved bits 0x%lx\n", cr8
);
477 kvm_inject_gp(vcpu
, 0);
480 if (irqchip_in_kernel(vcpu
->kvm
))
481 kvm_lapic_set_tpr(vcpu
, cr8
);
483 vcpu
->arch
.cr8
= cr8
;
485 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
487 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
489 if (irqchip_in_kernel(vcpu
->kvm
))
490 return kvm_lapic_get_cr8(vcpu
);
492 return vcpu
->arch
.cr8
;
494 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
496 static inline u32
bit(int bitno
)
498 return 1 << (bitno
& 31);
502 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
503 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
505 * This list is modified at module load time to reflect the
506 * capabilities of the host cpu. This capabilities test skips MSRs that are
507 * kvm-specific. Those are put in the beginning of the list.
510 #define KVM_SAVE_MSRS_BEGIN 2
511 static u32 msrs_to_save
[] = {
512 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
513 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
516 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
518 MSR_IA32_TSC
, MSR_IA32_PERF_STATUS
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
521 static unsigned num_msrs_to_save
;
523 static u32 emulated_msrs
[] = {
524 MSR_IA32_MISC_ENABLE
,
527 static void set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
529 if (efer
& efer_reserved_bits
) {
530 printk(KERN_DEBUG
"set_efer: 0x%llx #GP, reserved bits\n",
532 kvm_inject_gp(vcpu
, 0);
537 && (vcpu
->arch
.shadow_efer
& EFER_LME
) != (efer
& EFER_LME
)) {
538 printk(KERN_DEBUG
"set_efer: #GP, change LME while paging\n");
539 kvm_inject_gp(vcpu
, 0);
543 if (efer
& EFER_FFXSR
) {
544 struct kvm_cpuid_entry2
*feat
;
546 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
547 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
))) {
548 printk(KERN_DEBUG
"set_efer: #GP, enable FFXSR w/o CPUID capability\n");
549 kvm_inject_gp(vcpu
, 0);
554 if (efer
& EFER_SVME
) {
555 struct kvm_cpuid_entry2
*feat
;
557 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
558 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
))) {
559 printk(KERN_DEBUG
"set_efer: #GP, enable SVM w/o SVM\n");
560 kvm_inject_gp(vcpu
, 0);
565 kvm_x86_ops
->set_efer(vcpu
, efer
);
568 efer
|= vcpu
->arch
.shadow_efer
& EFER_LMA
;
570 vcpu
->arch
.shadow_efer
= efer
;
572 vcpu
->arch
.mmu
.base_role
.nxe
= (efer
& EFER_NX
) && !tdp_enabled
;
573 kvm_mmu_reset_context(vcpu
);
576 void kvm_enable_efer_bits(u64 mask
)
578 efer_reserved_bits
&= ~mask
;
580 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
584 * Writes msr value into into the appropriate "register".
585 * Returns 0 on success, non-0 otherwise.
586 * Assumes vcpu_load() was already called.
588 int kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64 data
)
590 return kvm_x86_ops
->set_msr(vcpu
, msr_index
, data
);
594 * Adapt set_msr() to msr_io()'s calling convention
596 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
598 return kvm_set_msr(vcpu
, index
, *data
);
601 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
604 struct pvclock_wall_clock wc
;
605 struct timespec now
, sys
, boot
;
612 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
615 * The guest calculates current wall clock time by adding
616 * system time (updated by kvm_write_guest_time below) to the
617 * wall clock specified here. guest system time equals host
618 * system time for us, thus we must fill in host boot time here.
620 now
= current_kernel_time();
622 boot
= ns_to_timespec(timespec_to_ns(&now
) - timespec_to_ns(&sys
));
624 wc
.sec
= boot
.tv_sec
;
625 wc
.nsec
= boot
.tv_nsec
;
626 wc
.version
= version
;
628 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
631 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
634 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
636 uint32_t quotient
, remainder
;
638 /* Don't try to replace with do_div(), this one calculates
639 * "(dividend << 32) / divisor" */
641 : "=a" (quotient
), "=d" (remainder
)
642 : "0" (0), "1" (dividend
), "r" (divisor
) );
646 static void kvm_set_time_scale(uint32_t tsc_khz
, struct pvclock_vcpu_time_info
*hv_clock
)
648 uint64_t nsecs
= 1000000000LL;
653 tps64
= tsc_khz
* 1000LL;
654 while (tps64
> nsecs
*2) {
659 tps32
= (uint32_t)tps64
;
660 while (tps32
<= (uint32_t)nsecs
) {
665 hv_clock
->tsc_shift
= shift
;
666 hv_clock
->tsc_to_system_mul
= div_frac(nsecs
, tps32
);
668 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
669 __func__
, tsc_khz
, hv_clock
->tsc_shift
,
670 hv_clock
->tsc_to_system_mul
);
673 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
675 static void kvm_write_guest_time(struct kvm_vcpu
*v
)
679 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
681 unsigned long this_tsc_khz
;
683 if ((!vcpu
->time_page
))
686 this_tsc_khz
= get_cpu_var(cpu_tsc_khz
);
687 if (unlikely(vcpu
->hv_clock_tsc_khz
!= this_tsc_khz
)) {
688 kvm_set_time_scale(this_tsc_khz
, &vcpu
->hv_clock
);
689 vcpu
->hv_clock_tsc_khz
= this_tsc_khz
;
691 put_cpu_var(cpu_tsc_khz
);
693 /* Keep irq disabled to prevent changes to the clock */
694 local_irq_save(flags
);
695 kvm_get_msr(v
, MSR_IA32_TSC
, &vcpu
->hv_clock
.tsc_timestamp
);
697 local_irq_restore(flags
);
699 /* With all the info we got, fill in the values */
701 vcpu
->hv_clock
.system_time
= ts
.tv_nsec
+
702 (NSEC_PER_SEC
* (u64
)ts
.tv_sec
);
704 * The interface expects us to write an even number signaling that the
705 * update is finished. Since the guest won't see the intermediate
706 * state, we just increase by 2 at the end.
708 vcpu
->hv_clock
.version
+= 2;
710 shared_kaddr
= kmap_atomic(vcpu
->time_page
, KM_USER0
);
712 memcpy(shared_kaddr
+ vcpu
->time_offset
, &vcpu
->hv_clock
,
713 sizeof(vcpu
->hv_clock
));
715 kunmap_atomic(shared_kaddr
, KM_USER0
);
717 mark_page_dirty(v
->kvm
, vcpu
->time
>> PAGE_SHIFT
);
720 static int kvm_request_guest_time_update(struct kvm_vcpu
*v
)
722 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
724 if (!vcpu
->time_page
)
726 set_bit(KVM_REQ_KVMCLOCK_UPDATE
, &v
->requests
);
730 static bool msr_mtrr_valid(unsigned msr
)
733 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR
- 1:
734 case MSR_MTRRfix64K_00000
:
735 case MSR_MTRRfix16K_80000
:
736 case MSR_MTRRfix16K_A0000
:
737 case MSR_MTRRfix4K_C0000
:
738 case MSR_MTRRfix4K_C8000
:
739 case MSR_MTRRfix4K_D0000
:
740 case MSR_MTRRfix4K_D8000
:
741 case MSR_MTRRfix4K_E0000
:
742 case MSR_MTRRfix4K_E8000
:
743 case MSR_MTRRfix4K_F0000
:
744 case MSR_MTRRfix4K_F8000
:
745 case MSR_MTRRdefType
:
746 case MSR_IA32_CR_PAT
:
754 static bool valid_pat_type(unsigned t
)
756 return t
< 8 && (1 << t
) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
759 static bool valid_mtrr_type(unsigned t
)
761 return t
< 8 && (1 << t
) & 0x73; /* 0, 1, 4, 5, 6 */
764 static bool mtrr_valid(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
768 if (!msr_mtrr_valid(msr
))
771 if (msr
== MSR_IA32_CR_PAT
) {
772 for (i
= 0; i
< 8; i
++)
773 if (!valid_pat_type((data
>> (i
* 8)) & 0xff))
776 } else if (msr
== MSR_MTRRdefType
) {
779 return valid_mtrr_type(data
& 0xff);
780 } else if (msr
>= MSR_MTRRfix64K_00000
&& msr
<= MSR_MTRRfix4K_F8000
) {
781 for (i
= 0; i
< 8 ; i
++)
782 if (!valid_mtrr_type((data
>> (i
* 8)) & 0xff))
788 return valid_mtrr_type(data
& 0xff);
791 static int set_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
793 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
795 if (!mtrr_valid(vcpu
, msr
, data
))
798 if (msr
== MSR_MTRRdefType
) {
799 vcpu
->arch
.mtrr_state
.def_type
= data
;
800 vcpu
->arch
.mtrr_state
.enabled
= (data
& 0xc00) >> 10;
801 } else if (msr
== MSR_MTRRfix64K_00000
)
803 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
804 p
[1 + msr
- MSR_MTRRfix16K_80000
] = data
;
805 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
806 p
[3 + msr
- MSR_MTRRfix4K_C0000
] = data
;
807 else if (msr
== MSR_IA32_CR_PAT
)
808 vcpu
->arch
.pat
= data
;
809 else { /* Variable MTRRs */
810 int idx
, is_mtrr_mask
;
813 idx
= (msr
- 0x200) / 2;
814 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
817 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
820 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
824 kvm_mmu_reset_context(vcpu
);
828 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
830 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
831 unsigned bank_num
= mcg_cap
& 0xff;
834 case MSR_IA32_MCG_STATUS
:
835 vcpu
->arch
.mcg_status
= data
;
837 case MSR_IA32_MCG_CTL
:
838 if (!(mcg_cap
& MCG_CTL_P
))
840 if (data
!= 0 && data
!= ~(u64
)0)
842 vcpu
->arch
.mcg_ctl
= data
;
845 if (msr
>= MSR_IA32_MC0_CTL
&&
846 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
847 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
848 /* only 0 or all 1s can be written to IA32_MCi_CTL */
849 if ((offset
& 0x3) == 0 &&
850 data
!= 0 && data
!= ~(u64
)0)
852 vcpu
->arch
.mce_banks
[offset
] = data
;
860 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
864 set_efer(vcpu
, data
);
867 data
&= ~(u64
)0x40; /* ignore flush filter disable */
869 pr_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
874 case MSR_FAM10H_MMIO_CONF_BASE
:
876 pr_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
881 case MSR_AMD64_NB_CFG
:
883 case MSR_IA32_DEBUGCTLMSR
:
885 /* We support the non-activated case already */
887 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
888 /* Values other than LBR and BTF are vendor-specific,
889 thus reserved and should throw a #GP */
892 pr_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
895 case MSR_IA32_UCODE_REV
:
896 case MSR_IA32_UCODE_WRITE
:
897 case MSR_VM_HSAVE_PA
:
898 case MSR_AMD64_PATCH_LOADER
:
900 case 0x200 ... 0x2ff:
901 return set_msr_mtrr(vcpu
, msr
, data
);
902 case MSR_IA32_APICBASE
:
903 kvm_set_apic_base(vcpu
, data
);
905 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
906 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
907 case MSR_IA32_MISC_ENABLE
:
908 vcpu
->arch
.ia32_misc_enable_msr
= data
;
910 case MSR_KVM_WALL_CLOCK
:
911 vcpu
->kvm
->arch
.wall_clock
= data
;
912 kvm_write_wall_clock(vcpu
->kvm
, data
);
914 case MSR_KVM_SYSTEM_TIME
: {
915 if (vcpu
->arch
.time_page
) {
916 kvm_release_page_dirty(vcpu
->arch
.time_page
);
917 vcpu
->arch
.time_page
= NULL
;
920 vcpu
->arch
.time
= data
;
922 /* we verify if the enable bit is set... */
926 /* ...but clean it before doing the actual write */
927 vcpu
->arch
.time_offset
= data
& ~(PAGE_MASK
| 1);
929 vcpu
->arch
.time_page
=
930 gfn_to_page(vcpu
->kvm
, data
>> PAGE_SHIFT
);
932 if (is_error_page(vcpu
->arch
.time_page
)) {
933 kvm_release_page_clean(vcpu
->arch
.time_page
);
934 vcpu
->arch
.time_page
= NULL
;
937 kvm_request_guest_time_update(vcpu
);
940 case MSR_IA32_MCG_CTL
:
941 case MSR_IA32_MCG_STATUS
:
942 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
943 return set_msr_mce(vcpu
, msr
, data
);
945 /* Performance counters are not protected by a CPUID bit,
946 * so we should check all of them in the generic path for the sake of
947 * cross vendor migration.
948 * Writing a zero into the event select MSRs disables them,
949 * which we perfectly emulate ;-). Any other value should be at least
950 * reported, some guests depend on them.
952 case MSR_P6_EVNTSEL0
:
953 case MSR_P6_EVNTSEL1
:
954 case MSR_K7_EVNTSEL0
:
955 case MSR_K7_EVNTSEL1
:
956 case MSR_K7_EVNTSEL2
:
957 case MSR_K7_EVNTSEL3
:
959 pr_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
960 "0x%x data 0x%llx\n", msr
, data
);
962 /* at least RHEL 4 unconditionally writes to the perfctr registers,
963 * so we ignore writes to make it happy.
965 case MSR_P6_PERFCTR0
:
966 case MSR_P6_PERFCTR1
:
967 case MSR_K7_PERFCTR0
:
968 case MSR_K7_PERFCTR1
:
969 case MSR_K7_PERFCTR2
:
970 case MSR_K7_PERFCTR3
:
971 pr_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
972 "0x%x data 0x%llx\n", msr
, data
);
976 pr_unimpl(vcpu
, "unhandled wrmsr: 0x%x data %llx\n",
980 pr_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n",
987 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
991 * Reads an msr value (of 'msr_index') into 'pdata'.
992 * Returns 0 on success, non-0 otherwise.
993 * Assumes vcpu_load() was already called.
995 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
997 return kvm_x86_ops
->get_msr(vcpu
, msr_index
, pdata
);
1000 static int get_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1002 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
1004 if (!msr_mtrr_valid(msr
))
1007 if (msr
== MSR_MTRRdefType
)
1008 *pdata
= vcpu
->arch
.mtrr_state
.def_type
+
1009 (vcpu
->arch
.mtrr_state
.enabled
<< 10);
1010 else if (msr
== MSR_MTRRfix64K_00000
)
1012 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
1013 *pdata
= p
[1 + msr
- MSR_MTRRfix16K_80000
];
1014 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
1015 *pdata
= p
[3 + msr
- MSR_MTRRfix4K_C0000
];
1016 else if (msr
== MSR_IA32_CR_PAT
)
1017 *pdata
= vcpu
->arch
.pat
;
1018 else { /* Variable MTRRs */
1019 int idx
, is_mtrr_mask
;
1022 idx
= (msr
- 0x200) / 2;
1023 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
1026 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
1029 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
1036 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1039 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1040 unsigned bank_num
= mcg_cap
& 0xff;
1043 case MSR_IA32_P5_MC_ADDR
:
1044 case MSR_IA32_P5_MC_TYPE
:
1047 case MSR_IA32_MCG_CAP
:
1048 data
= vcpu
->arch
.mcg_cap
;
1050 case MSR_IA32_MCG_CTL
:
1051 if (!(mcg_cap
& MCG_CTL_P
))
1053 data
= vcpu
->arch
.mcg_ctl
;
1055 case MSR_IA32_MCG_STATUS
:
1056 data
= vcpu
->arch
.mcg_status
;
1059 if (msr
>= MSR_IA32_MC0_CTL
&&
1060 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
1061 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1062 data
= vcpu
->arch
.mce_banks
[offset
];
1071 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1076 case MSR_IA32_PLATFORM_ID
:
1077 case MSR_IA32_UCODE_REV
:
1078 case MSR_IA32_EBL_CR_POWERON
:
1079 case MSR_IA32_DEBUGCTLMSR
:
1080 case MSR_IA32_LASTBRANCHFROMIP
:
1081 case MSR_IA32_LASTBRANCHTOIP
:
1082 case MSR_IA32_LASTINTFROMIP
:
1083 case MSR_IA32_LASTINTTOIP
:
1086 case MSR_VM_HSAVE_PA
:
1087 case MSR_P6_PERFCTR0
:
1088 case MSR_P6_PERFCTR1
:
1089 case MSR_P6_EVNTSEL0
:
1090 case MSR_P6_EVNTSEL1
:
1091 case MSR_K7_EVNTSEL0
:
1092 case MSR_K7_PERFCTR0
:
1093 case MSR_K8_INT_PENDING_MSG
:
1094 case MSR_AMD64_NB_CFG
:
1095 case MSR_FAM10H_MMIO_CONF_BASE
:
1099 data
= 0x500 | KVM_NR_VAR_MTRR
;
1101 case 0x200 ... 0x2ff:
1102 return get_msr_mtrr(vcpu
, msr
, pdata
);
1103 case 0xcd: /* fsb frequency */
1106 case MSR_IA32_APICBASE
:
1107 data
= kvm_get_apic_base(vcpu
);
1109 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
1110 return kvm_x2apic_msr_read(vcpu
, msr
, pdata
);
1112 case MSR_IA32_MISC_ENABLE
:
1113 data
= vcpu
->arch
.ia32_misc_enable_msr
;
1115 case MSR_IA32_PERF_STATUS
:
1116 /* TSC increment by tick */
1118 /* CPU multiplier */
1119 data
|= (((uint64_t)4ULL) << 40);
1122 data
= vcpu
->arch
.shadow_efer
;
1124 case MSR_KVM_WALL_CLOCK
:
1125 data
= vcpu
->kvm
->arch
.wall_clock
;
1127 case MSR_KVM_SYSTEM_TIME
:
1128 data
= vcpu
->arch
.time
;
1130 case MSR_IA32_P5_MC_ADDR
:
1131 case MSR_IA32_P5_MC_TYPE
:
1132 case MSR_IA32_MCG_CAP
:
1133 case MSR_IA32_MCG_CTL
:
1134 case MSR_IA32_MCG_STATUS
:
1135 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
1136 return get_msr_mce(vcpu
, msr
, pdata
);
1139 pr_unimpl(vcpu
, "unhandled rdmsr: 0x%x\n", msr
);
1142 pr_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr
);
1150 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
1153 * Read or write a bunch of msrs. All parameters are kernel addresses.
1155 * @return number of msrs set successfully.
1157 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
1158 struct kvm_msr_entry
*entries
,
1159 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
1160 unsigned index
, u64
*data
))
1166 down_read(&vcpu
->kvm
->slots_lock
);
1167 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
1168 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
1170 up_read(&vcpu
->kvm
->slots_lock
);
1178 * Read or write a bunch of msrs. Parameters are user addresses.
1180 * @return number of msrs set successfully.
1182 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
1183 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
1184 unsigned index
, u64
*data
),
1187 struct kvm_msrs msrs
;
1188 struct kvm_msr_entry
*entries
;
1193 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
1197 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
1201 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
1202 entries
= vmalloc(size
);
1207 if (copy_from_user(entries
, user_msrs
->entries
, size
))
1210 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
1215 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
1226 int kvm_dev_ioctl_check_extension(long ext
)
1231 case KVM_CAP_IRQCHIP
:
1233 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
1234 case KVM_CAP_SET_TSS_ADDR
:
1235 case KVM_CAP_EXT_CPUID
:
1236 case KVM_CAP_CLOCKSOURCE
:
1238 case KVM_CAP_NOP_IO_DELAY
:
1239 case KVM_CAP_MP_STATE
:
1240 case KVM_CAP_SYNC_MMU
:
1241 case KVM_CAP_REINJECT_CONTROL
:
1242 case KVM_CAP_IRQ_INJECT_STATUS
:
1243 case KVM_CAP_ASSIGN_DEV_IRQ
:
1245 case KVM_CAP_IOEVENTFD
:
1247 case KVM_CAP_PIT_STATE2
:
1248 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
1251 case KVM_CAP_COALESCED_MMIO
:
1252 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
1255 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
1257 case KVM_CAP_NR_VCPUS
:
1260 case KVM_CAP_NR_MEMSLOTS
:
1261 r
= KVM_MEMORY_SLOTS
;
1263 case KVM_CAP_PV_MMU
: /* obsolete */
1270 r
= KVM_MAX_MCE_BANKS
;
1280 long kvm_arch_dev_ioctl(struct file
*filp
,
1281 unsigned int ioctl
, unsigned long arg
)
1283 void __user
*argp
= (void __user
*)arg
;
1287 case KVM_GET_MSR_INDEX_LIST
: {
1288 struct kvm_msr_list __user
*user_msr_list
= argp
;
1289 struct kvm_msr_list msr_list
;
1293 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
1296 msr_list
.nmsrs
= num_msrs_to_save
+ ARRAY_SIZE(emulated_msrs
);
1297 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
1300 if (n
< msr_list
.nmsrs
)
1303 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
1304 num_msrs_to_save
* sizeof(u32
)))
1306 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
1308 ARRAY_SIZE(emulated_msrs
) * sizeof(u32
)))
1313 case KVM_GET_SUPPORTED_CPUID
: {
1314 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
1315 struct kvm_cpuid2 cpuid
;
1318 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
1320 r
= kvm_dev_ioctl_get_supported_cpuid(&cpuid
,
1321 cpuid_arg
->entries
);
1326 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
1331 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
1334 mce_cap
= KVM_MCE_CAP_SUPPORTED
;
1336 if (copy_to_user(argp
, &mce_cap
, sizeof mce_cap
))
1348 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
1350 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
1351 if (unlikely(per_cpu(cpu_tsc_khz
, cpu
) == 0))
1352 per_cpu(cpu_tsc_khz
, cpu
) = cpufreq_quick_get(cpu
);
1353 kvm_request_guest_time_update(vcpu
);
1356 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
1358 kvm_x86_ops
->vcpu_put(vcpu
);
1359 kvm_put_guest_fpu(vcpu
);
1362 static int is_efer_nx(void)
1364 unsigned long long efer
= 0;
1366 rdmsrl_safe(MSR_EFER
, &efer
);
1367 return efer
& EFER_NX
;
1370 static void cpuid_fix_nx_cap(struct kvm_vcpu
*vcpu
)
1373 struct kvm_cpuid_entry2
*e
, *entry
;
1376 for (i
= 0; i
< vcpu
->arch
.cpuid_nent
; ++i
) {
1377 e
= &vcpu
->arch
.cpuid_entries
[i
];
1378 if (e
->function
== 0x80000001) {
1383 if (entry
&& (entry
->edx
& (1 << 20)) && !is_efer_nx()) {
1384 entry
->edx
&= ~(1 << 20);
1385 printk(KERN_INFO
"kvm: guest NX capability removed\n");
1389 /* when an old userspace process fills a new kernel module */
1390 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu
*vcpu
,
1391 struct kvm_cpuid
*cpuid
,
1392 struct kvm_cpuid_entry __user
*entries
)
1395 struct kvm_cpuid_entry
*cpuid_entries
;
1398 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
1401 cpuid_entries
= vmalloc(sizeof(struct kvm_cpuid_entry
) * cpuid
->nent
);
1405 if (copy_from_user(cpuid_entries
, entries
,
1406 cpuid
->nent
* sizeof(struct kvm_cpuid_entry
)))
1408 for (i
= 0; i
< cpuid
->nent
; i
++) {
1409 vcpu
->arch
.cpuid_entries
[i
].function
= cpuid_entries
[i
].function
;
1410 vcpu
->arch
.cpuid_entries
[i
].eax
= cpuid_entries
[i
].eax
;
1411 vcpu
->arch
.cpuid_entries
[i
].ebx
= cpuid_entries
[i
].ebx
;
1412 vcpu
->arch
.cpuid_entries
[i
].ecx
= cpuid_entries
[i
].ecx
;
1413 vcpu
->arch
.cpuid_entries
[i
].edx
= cpuid_entries
[i
].edx
;
1414 vcpu
->arch
.cpuid_entries
[i
].index
= 0;
1415 vcpu
->arch
.cpuid_entries
[i
].flags
= 0;
1416 vcpu
->arch
.cpuid_entries
[i
].padding
[0] = 0;
1417 vcpu
->arch
.cpuid_entries
[i
].padding
[1] = 0;
1418 vcpu
->arch
.cpuid_entries
[i
].padding
[2] = 0;
1420 vcpu
->arch
.cpuid_nent
= cpuid
->nent
;
1421 cpuid_fix_nx_cap(vcpu
);
1423 kvm_apic_set_version(vcpu
);
1426 vfree(cpuid_entries
);
1431 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu
*vcpu
,
1432 struct kvm_cpuid2
*cpuid
,
1433 struct kvm_cpuid_entry2 __user
*entries
)
1438 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
1441 if (copy_from_user(&vcpu
->arch
.cpuid_entries
, entries
,
1442 cpuid
->nent
* sizeof(struct kvm_cpuid_entry2
)))
1444 vcpu
->arch
.cpuid_nent
= cpuid
->nent
;
1445 kvm_apic_set_version(vcpu
);
1452 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu
*vcpu
,
1453 struct kvm_cpuid2
*cpuid
,
1454 struct kvm_cpuid_entry2 __user
*entries
)
1459 if (cpuid
->nent
< vcpu
->arch
.cpuid_nent
)
1462 if (copy_to_user(entries
, &vcpu
->arch
.cpuid_entries
,
1463 vcpu
->arch
.cpuid_nent
* sizeof(struct kvm_cpuid_entry2
)))
1468 cpuid
->nent
= vcpu
->arch
.cpuid_nent
;
1472 static void do_cpuid_1_ent(struct kvm_cpuid_entry2
*entry
, u32 function
,
1475 entry
->function
= function
;
1476 entry
->index
= index
;
1477 cpuid_count(entry
->function
, entry
->index
,
1478 &entry
->eax
, &entry
->ebx
, &entry
->ecx
, &entry
->edx
);
1482 #define F(x) bit(X86_FEATURE_##x)
1484 static void do_cpuid_ent(struct kvm_cpuid_entry2
*entry
, u32 function
,
1485 u32 index
, int *nent
, int maxnent
)
1487 unsigned f_nx
= is_efer_nx() ? F(NX
) : 0;
1488 unsigned f_gbpages
= kvm_x86_ops
->gb_page_enable() ? F(GBPAGES
) : 0;
1489 #ifdef CONFIG_X86_64
1490 unsigned f_lm
= F(LM
);
1496 const u32 kvm_supported_word0_x86_features
=
1497 F(FPU
) | F(VME
) | F(DE
) | F(PSE
) |
1498 F(TSC
) | F(MSR
) | F(PAE
) | F(MCE
) |
1499 F(CX8
) | F(APIC
) | 0 /* Reserved */ | F(SEP
) |
1500 F(MTRR
) | F(PGE
) | F(MCA
) | F(CMOV
) |
1501 F(PAT
) | F(PSE36
) | 0 /* PSN */ | F(CLFLSH
) |
1502 0 /* Reserved, DS, ACPI */ | F(MMX
) |
1503 F(FXSR
) | F(XMM
) | F(XMM2
) | F(SELFSNOOP
) |
1504 0 /* HTT, TM, Reserved, PBE */;
1505 /* cpuid 0x80000001.edx */
1506 const u32 kvm_supported_word1_x86_features
=
1507 F(FPU
) | F(VME
) | F(DE
) | F(PSE
) |
1508 F(TSC
) | F(MSR
) | F(PAE
) | F(MCE
) |
1509 F(CX8
) | F(APIC
) | 0 /* Reserved */ | F(SYSCALL
) |
1510 F(MTRR
) | F(PGE
) | F(MCA
) | F(CMOV
) |
1511 F(PAT
) | F(PSE36
) | 0 /* Reserved */ |
1512 f_nx
| 0 /* Reserved */ | F(MMXEXT
) | F(MMX
) |
1513 F(FXSR
) | F(FXSR_OPT
) | f_gbpages
| 0 /* RDTSCP */ |
1514 0 /* Reserved */ | f_lm
| F(3DNOWEXT
) | F(3DNOW
);
1516 const u32 kvm_supported_word4_x86_features
=
1517 F(XMM3
) | 0 /* Reserved, DTES64, MONITOR */ |
1518 0 /* DS-CPL, VMX, SMX, EST */ |
1519 0 /* TM2 */ | F(SSSE3
) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1520 0 /* Reserved */ | F(CX16
) | 0 /* xTPR Update, PDCM */ |
1521 0 /* Reserved, DCA */ | F(XMM4_1
) |
1522 F(XMM4_2
) | F(X2APIC
) | F(MOVBE
) | F(POPCNT
) |
1523 0 /* Reserved, XSAVE, OSXSAVE */;
1524 /* cpuid 0x80000001.ecx */
1525 const u32 kvm_supported_word6_x86_features
=
1526 F(LAHF_LM
) | F(CMP_LEGACY
) | F(SVM
) | 0 /* ExtApicSpace */ |
1527 F(CR8_LEGACY
) | F(ABM
) | F(SSE4A
) | F(MISALIGNSSE
) |
1528 F(3DNOWPREFETCH
) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5
) |
1529 0 /* SKINIT */ | 0 /* WDT */;
1531 /* all calls to cpuid_count() should be made on the same cpu */
1533 do_cpuid_1_ent(entry
, function
, index
);
1538 entry
->eax
= min(entry
->eax
, (u32
)0xb);
1541 entry
->edx
&= kvm_supported_word0_x86_features
;
1542 entry
->ecx
&= kvm_supported_word4_x86_features
;
1543 /* we support x2apic emulation even if host does not support
1544 * it since we emulate x2apic in software */
1545 entry
->ecx
|= F(X2APIC
);
1547 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1548 * may return different values. This forces us to get_cpu() before
1549 * issuing the first command, and also to emulate this annoying behavior
1550 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1552 int t
, times
= entry
->eax
& 0xff;
1554 entry
->flags
|= KVM_CPUID_FLAG_STATEFUL_FUNC
;
1555 entry
->flags
|= KVM_CPUID_FLAG_STATE_READ_NEXT
;
1556 for (t
= 1; t
< times
&& *nent
< maxnent
; ++t
) {
1557 do_cpuid_1_ent(&entry
[t
], function
, 0);
1558 entry
[t
].flags
|= KVM_CPUID_FLAG_STATEFUL_FUNC
;
1563 /* function 4 and 0xb have additional index. */
1567 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1568 /* read more entries until cache_type is zero */
1569 for (i
= 1; *nent
< maxnent
; ++i
) {
1570 cache_type
= entry
[i
- 1].eax
& 0x1f;
1573 do_cpuid_1_ent(&entry
[i
], function
, i
);
1575 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1583 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1584 /* read more entries until level_type is zero */
1585 for (i
= 1; *nent
< maxnent
; ++i
) {
1586 level_type
= entry
[i
- 1].ecx
& 0xff00;
1589 do_cpuid_1_ent(&entry
[i
], function
, i
);
1591 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1597 entry
->eax
= min(entry
->eax
, 0x8000001a);
1600 entry
->edx
&= kvm_supported_word1_x86_features
;
1601 entry
->ecx
&= kvm_supported_word6_x86_features
;
1609 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2
*cpuid
,
1610 struct kvm_cpuid_entry2 __user
*entries
)
1612 struct kvm_cpuid_entry2
*cpuid_entries
;
1613 int limit
, nent
= 0, r
= -E2BIG
;
1616 if (cpuid
->nent
< 1)
1618 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
1619 cpuid
->nent
= KVM_MAX_CPUID_ENTRIES
;
1621 cpuid_entries
= vmalloc(sizeof(struct kvm_cpuid_entry2
) * cpuid
->nent
);
1625 do_cpuid_ent(&cpuid_entries
[0], 0, 0, &nent
, cpuid
->nent
);
1626 limit
= cpuid_entries
[0].eax
;
1627 for (func
= 1; func
<= limit
&& nent
< cpuid
->nent
; ++func
)
1628 do_cpuid_ent(&cpuid_entries
[nent
], func
, 0,
1629 &nent
, cpuid
->nent
);
1631 if (nent
>= cpuid
->nent
)
1634 do_cpuid_ent(&cpuid_entries
[nent
], 0x80000000, 0, &nent
, cpuid
->nent
);
1635 limit
= cpuid_entries
[nent
- 1].eax
;
1636 for (func
= 0x80000001; func
<= limit
&& nent
< cpuid
->nent
; ++func
)
1637 do_cpuid_ent(&cpuid_entries
[nent
], func
, 0,
1638 &nent
, cpuid
->nent
);
1640 if (nent
>= cpuid
->nent
)
1644 if (copy_to_user(entries
, cpuid_entries
,
1645 nent
* sizeof(struct kvm_cpuid_entry2
)))
1651 vfree(cpuid_entries
);
1656 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
1657 struct kvm_lapic_state
*s
)
1660 memcpy(s
->regs
, vcpu
->arch
.apic
->regs
, sizeof *s
);
1666 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
1667 struct kvm_lapic_state
*s
)
1670 memcpy(vcpu
->arch
.apic
->regs
, s
->regs
, sizeof *s
);
1671 kvm_apic_post_state_restore(vcpu
);
1672 update_cr8_intercept(vcpu
);
1678 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
1679 struct kvm_interrupt
*irq
)
1681 if (irq
->irq
< 0 || irq
->irq
>= 256)
1683 if (irqchip_in_kernel(vcpu
->kvm
))
1687 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
1694 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
1697 kvm_inject_nmi(vcpu
);
1703 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
1704 struct kvm_tpr_access_ctl
*tac
)
1708 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
1712 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
1716 unsigned bank_num
= mcg_cap
& 0xff, bank
;
1719 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
1721 if (mcg_cap
& ~(KVM_MCE_CAP_SUPPORTED
| 0xff | 0xff0000))
1724 vcpu
->arch
.mcg_cap
= mcg_cap
;
1725 /* Init IA32_MCG_CTL to all 1s */
1726 if (mcg_cap
& MCG_CTL_P
)
1727 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
1728 /* Init IA32_MCi_CTL to all 1s */
1729 for (bank
= 0; bank
< bank_num
; bank
++)
1730 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
1735 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
1736 struct kvm_x86_mce
*mce
)
1738 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1739 unsigned bank_num
= mcg_cap
& 0xff;
1740 u64
*banks
= vcpu
->arch
.mce_banks
;
1742 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
1745 * if IA32_MCG_CTL is not all 1s, the uncorrected error
1746 * reporting is disabled
1748 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
1749 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
1751 banks
+= 4 * mce
->bank
;
1753 * if IA32_MCi_CTL is not all 1s, the uncorrected error
1754 * reporting is disabled for the bank
1756 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
1758 if (mce
->status
& MCI_STATUS_UC
) {
1759 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
1760 !(vcpu
->arch
.cr4
& X86_CR4_MCE
)) {
1761 printk(KERN_DEBUG
"kvm: set_mce: "
1762 "injects mce exception while "
1763 "previous one is in progress!\n");
1764 set_bit(KVM_REQ_TRIPLE_FAULT
, &vcpu
->requests
);
1767 if (banks
[1] & MCI_STATUS_VAL
)
1768 mce
->status
|= MCI_STATUS_OVER
;
1769 banks
[2] = mce
->addr
;
1770 banks
[3] = mce
->misc
;
1771 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
1772 banks
[1] = mce
->status
;
1773 kvm_queue_exception(vcpu
, MC_VECTOR
);
1774 } else if (!(banks
[1] & MCI_STATUS_VAL
)
1775 || !(banks
[1] & MCI_STATUS_UC
)) {
1776 if (banks
[1] & MCI_STATUS_VAL
)
1777 mce
->status
|= MCI_STATUS_OVER
;
1778 banks
[2] = mce
->addr
;
1779 banks
[3] = mce
->misc
;
1780 banks
[1] = mce
->status
;
1782 banks
[1] |= MCI_STATUS_OVER
;
1786 long kvm_arch_vcpu_ioctl(struct file
*filp
,
1787 unsigned int ioctl
, unsigned long arg
)
1789 struct kvm_vcpu
*vcpu
= filp
->private_data
;
1790 void __user
*argp
= (void __user
*)arg
;
1792 struct kvm_lapic_state
*lapic
= NULL
;
1795 case KVM_GET_LAPIC
: {
1796 lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
1801 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, lapic
);
1805 if (copy_to_user(argp
, lapic
, sizeof(struct kvm_lapic_state
)))
1810 case KVM_SET_LAPIC
: {
1811 lapic
= kmalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
1816 if (copy_from_user(lapic
, argp
, sizeof(struct kvm_lapic_state
)))
1818 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, lapic
);
1824 case KVM_INTERRUPT
: {
1825 struct kvm_interrupt irq
;
1828 if (copy_from_user(&irq
, argp
, sizeof irq
))
1830 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
1837 r
= kvm_vcpu_ioctl_nmi(vcpu
);
1843 case KVM_SET_CPUID
: {
1844 struct kvm_cpuid __user
*cpuid_arg
= argp
;
1845 struct kvm_cpuid cpuid
;
1848 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
1850 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
1855 case KVM_SET_CPUID2
: {
1856 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
1857 struct kvm_cpuid2 cpuid
;
1860 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
1862 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
1863 cpuid_arg
->entries
);
1868 case KVM_GET_CPUID2
: {
1869 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
1870 struct kvm_cpuid2 cpuid
;
1873 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
1875 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
1876 cpuid_arg
->entries
);
1880 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
1886 r
= msr_io(vcpu
, argp
, kvm_get_msr
, 1);
1889 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
1891 case KVM_TPR_ACCESS_REPORTING
: {
1892 struct kvm_tpr_access_ctl tac
;
1895 if (copy_from_user(&tac
, argp
, sizeof tac
))
1897 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
1901 if (copy_to_user(argp
, &tac
, sizeof tac
))
1906 case KVM_SET_VAPIC_ADDR
: {
1907 struct kvm_vapic_addr va
;
1910 if (!irqchip_in_kernel(vcpu
->kvm
))
1913 if (copy_from_user(&va
, argp
, sizeof va
))
1916 kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
1919 case KVM_X86_SETUP_MCE
: {
1923 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
1925 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
1928 case KVM_X86_SET_MCE
: {
1929 struct kvm_x86_mce mce
;
1932 if (copy_from_user(&mce
, argp
, sizeof mce
))
1934 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
1945 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
1949 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
1951 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
1955 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
1958 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
1962 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
1963 u32 kvm_nr_mmu_pages
)
1965 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
1968 down_write(&kvm
->slots_lock
);
1969 spin_lock(&kvm
->mmu_lock
);
1971 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
1972 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
1974 spin_unlock(&kvm
->mmu_lock
);
1975 up_write(&kvm
->slots_lock
);
1979 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
1981 return kvm
->arch
.n_alloc_mmu_pages
;
1984 gfn_t
unalias_gfn(struct kvm
*kvm
, gfn_t gfn
)
1987 struct kvm_mem_alias
*alias
;
1989 for (i
= 0; i
< kvm
->arch
.naliases
; ++i
) {
1990 alias
= &kvm
->arch
.aliases
[i
];
1991 if (gfn
>= alias
->base_gfn
1992 && gfn
< alias
->base_gfn
+ alias
->npages
)
1993 return alias
->target_gfn
+ gfn
- alias
->base_gfn
;
1999 * Set a new alias region. Aliases map a portion of physical memory into
2000 * another portion. This is useful for memory windows, for example the PC
2003 static int kvm_vm_ioctl_set_memory_alias(struct kvm
*kvm
,
2004 struct kvm_memory_alias
*alias
)
2007 struct kvm_mem_alias
*p
;
2010 /* General sanity checks */
2011 if (alias
->memory_size
& (PAGE_SIZE
- 1))
2013 if (alias
->guest_phys_addr
& (PAGE_SIZE
- 1))
2015 if (alias
->slot
>= KVM_ALIAS_SLOTS
)
2017 if (alias
->guest_phys_addr
+ alias
->memory_size
2018 < alias
->guest_phys_addr
)
2020 if (alias
->target_phys_addr
+ alias
->memory_size
2021 < alias
->target_phys_addr
)
2024 down_write(&kvm
->slots_lock
);
2025 spin_lock(&kvm
->mmu_lock
);
2027 p
= &kvm
->arch
.aliases
[alias
->slot
];
2028 p
->base_gfn
= alias
->guest_phys_addr
>> PAGE_SHIFT
;
2029 p
->npages
= alias
->memory_size
>> PAGE_SHIFT
;
2030 p
->target_gfn
= alias
->target_phys_addr
>> PAGE_SHIFT
;
2032 for (n
= KVM_ALIAS_SLOTS
; n
> 0; --n
)
2033 if (kvm
->arch
.aliases
[n
- 1].npages
)
2035 kvm
->arch
.naliases
= n
;
2037 spin_unlock(&kvm
->mmu_lock
);
2038 kvm_mmu_zap_all(kvm
);
2040 up_write(&kvm
->slots_lock
);
2048 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
2053 switch (chip
->chip_id
) {
2054 case KVM_IRQCHIP_PIC_MASTER
:
2055 memcpy(&chip
->chip
.pic
,
2056 &pic_irqchip(kvm
)->pics
[0],
2057 sizeof(struct kvm_pic_state
));
2059 case KVM_IRQCHIP_PIC_SLAVE
:
2060 memcpy(&chip
->chip
.pic
,
2061 &pic_irqchip(kvm
)->pics
[1],
2062 sizeof(struct kvm_pic_state
));
2064 case KVM_IRQCHIP_IOAPIC
:
2065 r
= kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
2074 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
2079 switch (chip
->chip_id
) {
2080 case KVM_IRQCHIP_PIC_MASTER
:
2081 spin_lock(&pic_irqchip(kvm
)->lock
);
2082 memcpy(&pic_irqchip(kvm
)->pics
[0],
2084 sizeof(struct kvm_pic_state
));
2085 spin_unlock(&pic_irqchip(kvm
)->lock
);
2087 case KVM_IRQCHIP_PIC_SLAVE
:
2088 spin_lock(&pic_irqchip(kvm
)->lock
);
2089 memcpy(&pic_irqchip(kvm
)->pics
[1],
2091 sizeof(struct kvm_pic_state
));
2092 spin_unlock(&pic_irqchip(kvm
)->lock
);
2094 case KVM_IRQCHIP_IOAPIC
:
2095 r
= kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
2101 kvm_pic_update_irq(pic_irqchip(kvm
));
2105 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
2109 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2110 memcpy(ps
, &kvm
->arch
.vpit
->pit_state
, sizeof(struct kvm_pit_state
));
2111 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2115 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
2119 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2120 memcpy(&kvm
->arch
.vpit
->pit_state
, ps
, sizeof(struct kvm_pit_state
));
2121 kvm_pit_load_count(kvm
, 0, ps
->channels
[0].count
, 0);
2122 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2126 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
2130 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2131 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
2132 sizeof(ps
->channels
));
2133 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
2134 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2138 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
2140 int r
= 0, start
= 0;
2141 u32 prev_legacy
, cur_legacy
;
2142 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2143 prev_legacy
= kvm
->arch
.vpit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
2144 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
2145 if (!prev_legacy
&& cur_legacy
)
2147 memcpy(&kvm
->arch
.vpit
->pit_state
.channels
, &ps
->channels
,
2148 sizeof(kvm
->arch
.vpit
->pit_state
.channels
));
2149 kvm
->arch
.vpit
->pit_state
.flags
= ps
->flags
;
2150 kvm_pit_load_count(kvm
, 0, kvm
->arch
.vpit
->pit_state
.channels
[0].count
, start
);
2151 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2155 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
2156 struct kvm_reinject_control
*control
)
2158 if (!kvm
->arch
.vpit
)
2160 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2161 kvm
->arch
.vpit
->pit_state
.pit_timer
.reinject
= control
->pit_reinject
;
2162 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2167 * Get (and clear) the dirty memory log for a memory slot.
2169 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
,
2170 struct kvm_dirty_log
*log
)
2174 struct kvm_memory_slot
*memslot
;
2177 down_write(&kvm
->slots_lock
);
2179 r
= kvm_get_dirty_log(kvm
, log
, &is_dirty
);
2183 /* If nothing is dirty, don't bother messing with page tables. */
2185 spin_lock(&kvm
->mmu_lock
);
2186 kvm_mmu_slot_remove_write_access(kvm
, log
->slot
);
2187 spin_unlock(&kvm
->mmu_lock
);
2188 memslot
= &kvm
->memslots
[log
->slot
];
2189 n
= ALIGN(memslot
->npages
, BITS_PER_LONG
) / 8;
2190 memset(memslot
->dirty_bitmap
, 0, n
);
2194 up_write(&kvm
->slots_lock
);
2198 long kvm_arch_vm_ioctl(struct file
*filp
,
2199 unsigned int ioctl
, unsigned long arg
)
2201 struct kvm
*kvm
= filp
->private_data
;
2202 void __user
*argp
= (void __user
*)arg
;
2205 * This union makes it completely explicit to gcc-3.x
2206 * that these two variables' stack usage should be
2207 * combined, not added together.
2210 struct kvm_pit_state ps
;
2211 struct kvm_pit_state2 ps2
;
2212 struct kvm_memory_alias alias
;
2213 struct kvm_pit_config pit_config
;
2217 case KVM_SET_TSS_ADDR
:
2218 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
2222 case KVM_SET_IDENTITY_MAP_ADDR
: {
2226 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
2228 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
2233 case KVM_SET_MEMORY_REGION
: {
2234 struct kvm_memory_region kvm_mem
;
2235 struct kvm_userspace_memory_region kvm_userspace_mem
;
2238 if (copy_from_user(&kvm_mem
, argp
, sizeof kvm_mem
))
2240 kvm_userspace_mem
.slot
= kvm_mem
.slot
;
2241 kvm_userspace_mem
.flags
= kvm_mem
.flags
;
2242 kvm_userspace_mem
.guest_phys_addr
= kvm_mem
.guest_phys_addr
;
2243 kvm_userspace_mem
.memory_size
= kvm_mem
.memory_size
;
2244 r
= kvm_vm_ioctl_set_memory_region(kvm
, &kvm_userspace_mem
, 0);
2249 case KVM_SET_NR_MMU_PAGES
:
2250 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
2254 case KVM_GET_NR_MMU_PAGES
:
2255 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
2257 case KVM_SET_MEMORY_ALIAS
:
2259 if (copy_from_user(&u
.alias
, argp
, sizeof(struct kvm_memory_alias
)))
2261 r
= kvm_vm_ioctl_set_memory_alias(kvm
, &u
.alias
);
2265 case KVM_CREATE_IRQCHIP
:
2267 kvm
->arch
.vpic
= kvm_create_pic(kvm
);
2268 if (kvm
->arch
.vpic
) {
2269 r
= kvm_ioapic_init(kvm
);
2271 kfree(kvm
->arch
.vpic
);
2272 kvm
->arch
.vpic
= NULL
;
2277 r
= kvm_setup_default_irq_routing(kvm
);
2279 kfree(kvm
->arch
.vpic
);
2280 kfree(kvm
->arch
.vioapic
);
2284 case KVM_CREATE_PIT
:
2285 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
2287 case KVM_CREATE_PIT2
:
2289 if (copy_from_user(&u
.pit_config
, argp
,
2290 sizeof(struct kvm_pit_config
)))
2293 down_write(&kvm
->slots_lock
);
2296 goto create_pit_unlock
;
2298 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
2302 up_write(&kvm
->slots_lock
);
2304 case KVM_IRQ_LINE_STATUS
:
2305 case KVM_IRQ_LINE
: {
2306 struct kvm_irq_level irq_event
;
2309 if (copy_from_user(&irq_event
, argp
, sizeof irq_event
))
2311 if (irqchip_in_kernel(kvm
)) {
2313 status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
2314 irq_event
.irq
, irq_event
.level
);
2315 if (ioctl
== KVM_IRQ_LINE_STATUS
) {
2316 irq_event
.status
= status
;
2317 if (copy_to_user(argp
, &irq_event
,
2325 case KVM_GET_IRQCHIP
: {
2326 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2327 struct kvm_irqchip
*chip
= kmalloc(sizeof(*chip
), GFP_KERNEL
);
2333 if (copy_from_user(chip
, argp
, sizeof *chip
))
2334 goto get_irqchip_out
;
2336 if (!irqchip_in_kernel(kvm
))
2337 goto get_irqchip_out
;
2338 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
2340 goto get_irqchip_out
;
2342 if (copy_to_user(argp
, chip
, sizeof *chip
))
2343 goto get_irqchip_out
;
2351 case KVM_SET_IRQCHIP
: {
2352 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2353 struct kvm_irqchip
*chip
= kmalloc(sizeof(*chip
), GFP_KERNEL
);
2359 if (copy_from_user(chip
, argp
, sizeof *chip
))
2360 goto set_irqchip_out
;
2362 if (!irqchip_in_kernel(kvm
))
2363 goto set_irqchip_out
;
2364 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
2366 goto set_irqchip_out
;
2376 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
2379 if (!kvm
->arch
.vpit
)
2381 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
2385 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
2392 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
2395 if (!kvm
->arch
.vpit
)
2397 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
2403 case KVM_GET_PIT2
: {
2405 if (!kvm
->arch
.vpit
)
2407 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
2411 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
2416 case KVM_SET_PIT2
: {
2418 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
2421 if (!kvm
->arch
.vpit
)
2423 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
2429 case KVM_REINJECT_CONTROL
: {
2430 struct kvm_reinject_control control
;
2432 if (copy_from_user(&control
, argp
, sizeof(control
)))
2434 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
2447 static void kvm_init_msr_list(void)
2452 /* skip the first msrs in the list. KVM-specific */
2453 for (i
= j
= KVM_SAVE_MSRS_BEGIN
; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
2454 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
2457 msrs_to_save
[j
] = msrs_to_save
[i
];
2460 num_msrs_to_save
= j
;
2463 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
2466 if (vcpu
->arch
.apic
&&
2467 !kvm_iodevice_write(&vcpu
->arch
.apic
->dev
, addr
, len
, v
))
2470 return kvm_io_bus_write(&vcpu
->kvm
->mmio_bus
, addr
, len
, v
);
2473 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
2475 if (vcpu
->arch
.apic
&&
2476 !kvm_iodevice_read(&vcpu
->arch
.apic
->dev
, addr
, len
, v
))
2479 return kvm_io_bus_read(&vcpu
->kvm
->mmio_bus
, addr
, len
, v
);
2482 static int kvm_read_guest_virt(gva_t addr
, void *val
, unsigned int bytes
,
2483 struct kvm_vcpu
*vcpu
)
2486 int r
= X86EMUL_CONTINUE
;
2489 gpa_t gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2490 unsigned offset
= addr
& (PAGE_SIZE
-1);
2491 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
2494 if (gpa
== UNMAPPED_GVA
) {
2495 r
= X86EMUL_PROPAGATE_FAULT
;
2498 ret
= kvm_read_guest(vcpu
->kvm
, gpa
, data
, toread
);
2500 r
= X86EMUL_UNHANDLEABLE
;
2512 static int kvm_write_guest_virt(gva_t addr
, void *val
, unsigned int bytes
,
2513 struct kvm_vcpu
*vcpu
)
2516 int r
= X86EMUL_CONTINUE
;
2519 gpa_t gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2520 unsigned offset
= addr
& (PAGE_SIZE
-1);
2521 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
2524 if (gpa
== UNMAPPED_GVA
) {
2525 r
= X86EMUL_PROPAGATE_FAULT
;
2528 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, data
, towrite
);
2530 r
= X86EMUL_UNHANDLEABLE
;
2543 static int emulator_read_emulated(unsigned long addr
,
2546 struct kvm_vcpu
*vcpu
)
2550 if (vcpu
->mmio_read_completed
) {
2551 memcpy(val
, vcpu
->mmio_data
, bytes
);
2552 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
2553 vcpu
->mmio_phys_addr
, *(u64
*)val
);
2554 vcpu
->mmio_read_completed
= 0;
2555 return X86EMUL_CONTINUE
;
2558 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2560 /* For APIC access vmexit */
2561 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
2564 if (kvm_read_guest_virt(addr
, val
, bytes
, vcpu
)
2565 == X86EMUL_CONTINUE
)
2566 return X86EMUL_CONTINUE
;
2567 if (gpa
== UNMAPPED_GVA
)
2568 return X86EMUL_PROPAGATE_FAULT
;
2572 * Is this MMIO handled locally?
2574 if (!vcpu_mmio_read(vcpu
, gpa
, bytes
, val
)) {
2575 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
, gpa
, *(u64
*)val
);
2576 return X86EMUL_CONTINUE
;
2579 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
2581 vcpu
->mmio_needed
= 1;
2582 vcpu
->mmio_phys_addr
= gpa
;
2583 vcpu
->mmio_size
= bytes
;
2584 vcpu
->mmio_is_write
= 0;
2586 return X86EMUL_UNHANDLEABLE
;
2589 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
2590 const void *val
, int bytes
)
2594 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, val
, bytes
);
2597 kvm_mmu_pte_write(vcpu
, gpa
, val
, bytes
, 1);
2601 static int emulator_write_emulated_onepage(unsigned long addr
,
2604 struct kvm_vcpu
*vcpu
)
2608 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2610 if (gpa
== UNMAPPED_GVA
) {
2611 kvm_inject_page_fault(vcpu
, addr
, 2);
2612 return X86EMUL_PROPAGATE_FAULT
;
2615 /* For APIC access vmexit */
2616 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
2619 if (emulator_write_phys(vcpu
, gpa
, val
, bytes
))
2620 return X86EMUL_CONTINUE
;
2623 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
2625 * Is this MMIO handled locally?
2627 if (!vcpu_mmio_write(vcpu
, gpa
, bytes
, val
))
2628 return X86EMUL_CONTINUE
;
2630 vcpu
->mmio_needed
= 1;
2631 vcpu
->mmio_phys_addr
= gpa
;
2632 vcpu
->mmio_size
= bytes
;
2633 vcpu
->mmio_is_write
= 1;
2634 memcpy(vcpu
->mmio_data
, val
, bytes
);
2636 return X86EMUL_CONTINUE
;
2639 int emulator_write_emulated(unsigned long addr
,
2642 struct kvm_vcpu
*vcpu
)
2644 /* Crossing a page boundary? */
2645 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
2648 now
= -addr
& ~PAGE_MASK
;
2649 rc
= emulator_write_emulated_onepage(addr
, val
, now
, vcpu
);
2650 if (rc
!= X86EMUL_CONTINUE
)
2656 return emulator_write_emulated_onepage(addr
, val
, bytes
, vcpu
);
2658 EXPORT_SYMBOL_GPL(emulator_write_emulated
);
2660 static int emulator_cmpxchg_emulated(unsigned long addr
,
2664 struct kvm_vcpu
*vcpu
)
2666 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
2667 #ifndef CONFIG_X86_64
2668 /* guests cmpxchg8b have to be emulated atomically */
2675 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2677 if (gpa
== UNMAPPED_GVA
||
2678 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
2681 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
2686 page
= gfn_to_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
2688 kaddr
= kmap_atomic(page
, KM_USER0
);
2689 set_64bit((u64
*)(kaddr
+ offset_in_page(gpa
)), val
);
2690 kunmap_atomic(kaddr
, KM_USER0
);
2691 kvm_release_page_dirty(page
);
2696 return emulator_write_emulated(addr
, new, bytes
, vcpu
);
2699 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
2701 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
2704 int emulate_invlpg(struct kvm_vcpu
*vcpu
, gva_t address
)
2706 kvm_mmu_invlpg(vcpu
, address
);
2707 return X86EMUL_CONTINUE
;
2710 int emulate_clts(struct kvm_vcpu
*vcpu
)
2712 kvm_x86_ops
->set_cr0(vcpu
, vcpu
->arch
.cr0
& ~X86_CR0_TS
);
2713 return X86EMUL_CONTINUE
;
2716 int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long *dest
)
2718 struct kvm_vcpu
*vcpu
= ctxt
->vcpu
;
2722 *dest
= kvm_x86_ops
->get_dr(vcpu
, dr
);
2723 return X86EMUL_CONTINUE
;
2725 pr_unimpl(vcpu
, "%s: unexpected dr %u\n", __func__
, dr
);
2726 return X86EMUL_UNHANDLEABLE
;
2730 int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long value
)
2732 unsigned long mask
= (ctxt
->mode
== X86EMUL_MODE_PROT64
) ? ~0ULL : ~0U;
2735 kvm_x86_ops
->set_dr(ctxt
->vcpu
, dr
, value
& mask
, &exception
);
2737 /* FIXME: better handling */
2738 return X86EMUL_UNHANDLEABLE
;
2740 return X86EMUL_CONTINUE
;
2743 void kvm_report_emulation_failure(struct kvm_vcpu
*vcpu
, const char *context
)
2746 unsigned long rip
= kvm_rip_read(vcpu
);
2747 unsigned long rip_linear
;
2749 if (!printk_ratelimit())
2752 rip_linear
= rip
+ get_segment_base(vcpu
, VCPU_SREG_CS
);
2754 kvm_read_guest_virt(rip_linear
, (void *)opcodes
, 4, vcpu
);
2756 printk(KERN_ERR
"emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
2757 context
, rip
, opcodes
[0], opcodes
[1], opcodes
[2], opcodes
[3]);
2759 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure
);
2761 static struct x86_emulate_ops emulate_ops
= {
2762 .read_std
= kvm_read_guest_virt
,
2763 .read_emulated
= emulator_read_emulated
,
2764 .write_emulated
= emulator_write_emulated
,
2765 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
2768 static void cache_all_regs(struct kvm_vcpu
*vcpu
)
2770 kvm_register_read(vcpu
, VCPU_REGS_RAX
);
2771 kvm_register_read(vcpu
, VCPU_REGS_RSP
);
2772 kvm_register_read(vcpu
, VCPU_REGS_RIP
);
2773 vcpu
->arch
.regs_dirty
= ~0;
2776 int emulate_instruction(struct kvm_vcpu
*vcpu
,
2782 struct decode_cache
*c
;
2783 struct kvm_run
*run
= vcpu
->run
;
2785 kvm_clear_exception_queue(vcpu
);
2786 vcpu
->arch
.mmio_fault_cr2
= cr2
;
2788 * TODO: fix emulate.c to use guest_read/write_register
2789 * instead of direct ->regs accesses, can save hundred cycles
2790 * on Intel for instructions that don't read/change RSP, for
2793 cache_all_regs(vcpu
);
2795 vcpu
->mmio_is_write
= 0;
2796 vcpu
->arch
.pio
.string
= 0;
2798 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
2800 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
2802 vcpu
->arch
.emulate_ctxt
.vcpu
= vcpu
;
2803 vcpu
->arch
.emulate_ctxt
.eflags
= kvm_get_rflags(vcpu
);
2804 vcpu
->arch
.emulate_ctxt
.mode
=
2805 (vcpu
->arch
.emulate_ctxt
.eflags
& X86_EFLAGS_VM
)
2806 ? X86EMUL_MODE_REAL
: cs_l
2807 ? X86EMUL_MODE_PROT64
: cs_db
2808 ? X86EMUL_MODE_PROT32
: X86EMUL_MODE_PROT16
;
2810 r
= x86_decode_insn(&vcpu
->arch
.emulate_ctxt
, &emulate_ops
);
2812 /* Only allow emulation of specific instructions on #UD
2813 * (namely VMMCALL, sysenter, sysexit, syscall)*/
2814 c
= &vcpu
->arch
.emulate_ctxt
.decode
;
2815 if (emulation_type
& EMULTYPE_TRAP_UD
) {
2817 return EMULATE_FAIL
;
2819 case 0x01: /* VMMCALL */
2820 if (c
->modrm_mod
!= 3 || c
->modrm_rm
!= 1)
2821 return EMULATE_FAIL
;
2823 case 0x34: /* sysenter */
2824 case 0x35: /* sysexit */
2825 if (c
->modrm_mod
!= 0 || c
->modrm_rm
!= 0)
2826 return EMULATE_FAIL
;
2828 case 0x05: /* syscall */
2829 if (c
->modrm_mod
!= 0 || c
->modrm_rm
!= 0)
2830 return EMULATE_FAIL
;
2833 return EMULATE_FAIL
;
2836 if (!(c
->modrm_reg
== 0 || c
->modrm_reg
== 3))
2837 return EMULATE_FAIL
;
2840 ++vcpu
->stat
.insn_emulation
;
2842 ++vcpu
->stat
.insn_emulation_fail
;
2843 if (kvm_mmu_unprotect_page_virt(vcpu
, cr2
))
2844 return EMULATE_DONE
;
2845 return EMULATE_FAIL
;
2849 if (emulation_type
& EMULTYPE_SKIP
) {
2850 kvm_rip_write(vcpu
, vcpu
->arch
.emulate_ctxt
.decode
.eip
);
2851 return EMULATE_DONE
;
2854 r
= x86_emulate_insn(&vcpu
->arch
.emulate_ctxt
, &emulate_ops
);
2855 shadow_mask
= vcpu
->arch
.emulate_ctxt
.interruptibility
;
2858 kvm_x86_ops
->set_interrupt_shadow(vcpu
, shadow_mask
);
2860 if (vcpu
->arch
.pio
.string
)
2861 return EMULATE_DO_MMIO
;
2863 if ((r
|| vcpu
->mmio_is_write
) && run
) {
2864 run
->exit_reason
= KVM_EXIT_MMIO
;
2865 run
->mmio
.phys_addr
= vcpu
->mmio_phys_addr
;
2866 memcpy(run
->mmio
.data
, vcpu
->mmio_data
, 8);
2867 run
->mmio
.len
= vcpu
->mmio_size
;
2868 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
2872 if (kvm_mmu_unprotect_page_virt(vcpu
, cr2
))
2873 return EMULATE_DONE
;
2874 if (!vcpu
->mmio_needed
) {
2875 kvm_report_emulation_failure(vcpu
, "mmio");
2876 return EMULATE_FAIL
;
2878 return EMULATE_DO_MMIO
;
2881 kvm_set_rflags(vcpu
, vcpu
->arch
.emulate_ctxt
.eflags
);
2883 if (vcpu
->mmio_is_write
) {
2884 vcpu
->mmio_needed
= 0;
2885 return EMULATE_DO_MMIO
;
2888 return EMULATE_DONE
;
2890 EXPORT_SYMBOL_GPL(emulate_instruction
);
2892 static int pio_copy_data(struct kvm_vcpu
*vcpu
)
2894 void *p
= vcpu
->arch
.pio_data
;
2895 gva_t q
= vcpu
->arch
.pio
.guest_gva
;
2899 bytes
= vcpu
->arch
.pio
.size
* vcpu
->arch
.pio
.cur_count
;
2900 if (vcpu
->arch
.pio
.in
)
2901 ret
= kvm_write_guest_virt(q
, p
, bytes
, vcpu
);
2903 ret
= kvm_read_guest_virt(q
, p
, bytes
, vcpu
);
2907 int complete_pio(struct kvm_vcpu
*vcpu
)
2909 struct kvm_pio_request
*io
= &vcpu
->arch
.pio
;
2916 val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
2917 memcpy(&val
, vcpu
->arch
.pio_data
, io
->size
);
2918 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
2922 r
= pio_copy_data(vcpu
);
2929 delta
*= io
->cur_count
;
2931 * The size of the register should really depend on
2932 * current address size.
2934 val
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
2936 kvm_register_write(vcpu
, VCPU_REGS_RCX
, val
);
2942 val
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
2944 kvm_register_write(vcpu
, VCPU_REGS_RDI
, val
);
2946 val
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
2948 kvm_register_write(vcpu
, VCPU_REGS_RSI
, val
);
2952 io
->count
-= io
->cur_count
;
2958 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
2960 /* TODO: String I/O for in kernel device */
2963 if (vcpu
->arch
.pio
.in
)
2964 r
= kvm_io_bus_read(&vcpu
->kvm
->pio_bus
, vcpu
->arch
.pio
.port
,
2965 vcpu
->arch
.pio
.size
, pd
);
2967 r
= kvm_io_bus_write(&vcpu
->kvm
->pio_bus
, vcpu
->arch
.pio
.port
,
2968 vcpu
->arch
.pio
.size
, pd
);
2972 static int pio_string_write(struct kvm_vcpu
*vcpu
)
2974 struct kvm_pio_request
*io
= &vcpu
->arch
.pio
;
2975 void *pd
= vcpu
->arch
.pio_data
;
2978 for (i
= 0; i
< io
->cur_count
; i
++) {
2979 if (kvm_io_bus_write(&vcpu
->kvm
->pio_bus
,
2980 io
->port
, io
->size
, pd
)) {
2989 int kvm_emulate_pio(struct kvm_vcpu
*vcpu
, int in
, int size
, unsigned port
)
2993 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
2994 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
2995 vcpu
->run
->io
.size
= vcpu
->arch
.pio
.size
= size
;
2996 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
2997 vcpu
->run
->io
.count
= vcpu
->arch
.pio
.count
= vcpu
->arch
.pio
.cur_count
= 1;
2998 vcpu
->run
->io
.port
= vcpu
->arch
.pio
.port
= port
;
2999 vcpu
->arch
.pio
.in
= in
;
3000 vcpu
->arch
.pio
.string
= 0;
3001 vcpu
->arch
.pio
.down
= 0;
3002 vcpu
->arch
.pio
.rep
= 0;
3004 trace_kvm_pio(vcpu
->run
->io
.direction
== KVM_EXIT_IO_OUT
, port
,
3007 val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3008 memcpy(vcpu
->arch
.pio_data
, &val
, 4);
3010 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
3016 EXPORT_SYMBOL_GPL(kvm_emulate_pio
);
3018 int kvm_emulate_pio_string(struct kvm_vcpu
*vcpu
, int in
,
3019 int size
, unsigned long count
, int down
,
3020 gva_t address
, int rep
, unsigned port
)
3022 unsigned now
, in_page
;
3025 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
3026 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
3027 vcpu
->run
->io
.size
= vcpu
->arch
.pio
.size
= size
;
3028 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
3029 vcpu
->run
->io
.count
= vcpu
->arch
.pio
.count
= vcpu
->arch
.pio
.cur_count
= count
;
3030 vcpu
->run
->io
.port
= vcpu
->arch
.pio
.port
= port
;
3031 vcpu
->arch
.pio
.in
= in
;
3032 vcpu
->arch
.pio
.string
= 1;
3033 vcpu
->arch
.pio
.down
= down
;
3034 vcpu
->arch
.pio
.rep
= rep
;
3036 trace_kvm_pio(vcpu
->run
->io
.direction
== KVM_EXIT_IO_OUT
, port
,
3040 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
3045 in_page
= PAGE_SIZE
- offset_in_page(address
);
3047 in_page
= offset_in_page(address
) + size
;
3048 now
= min(count
, (unsigned long)in_page
/ size
);
3053 * String I/O in reverse. Yuck. Kill the guest, fix later.
3055 pr_unimpl(vcpu
, "guest string pio down\n");
3056 kvm_inject_gp(vcpu
, 0);
3059 vcpu
->run
->io
.count
= now
;
3060 vcpu
->arch
.pio
.cur_count
= now
;
3062 if (vcpu
->arch
.pio
.cur_count
== vcpu
->arch
.pio
.count
)
3063 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
3065 vcpu
->arch
.pio
.guest_gva
= address
;
3067 if (!vcpu
->arch
.pio
.in
) {
3068 /* string PIO write */
3069 ret
= pio_copy_data(vcpu
);
3070 if (ret
== X86EMUL_PROPAGATE_FAULT
) {
3071 kvm_inject_gp(vcpu
, 0);
3074 if (ret
== 0 && !pio_string_write(vcpu
)) {
3076 if (vcpu
->arch
.pio
.count
== 0)
3080 /* no string PIO read support yet */
3084 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string
);
3086 static void bounce_off(void *info
)
3091 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
3094 struct cpufreq_freqs
*freq
= data
;
3096 struct kvm_vcpu
*vcpu
;
3097 int i
, send_ipi
= 0;
3099 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
3101 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
3103 per_cpu(cpu_tsc_khz
, freq
->cpu
) = freq
->new;
3105 spin_lock(&kvm_lock
);
3106 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
3107 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
3108 if (vcpu
->cpu
!= freq
->cpu
)
3110 if (!kvm_request_guest_time_update(vcpu
))
3112 if (vcpu
->cpu
!= smp_processor_id())
3116 spin_unlock(&kvm_lock
);
3118 if (freq
->old
< freq
->new && send_ipi
) {
3120 * We upscale the frequency. Must make the guest
3121 * doesn't see old kvmclock values while running with
3122 * the new frequency, otherwise we risk the guest sees
3123 * time go backwards.
3125 * In case we update the frequency for another cpu
3126 * (which might be in guest context) send an interrupt
3127 * to kick the cpu out of guest context. Next time
3128 * guest context is entered kvmclock will be updated,
3129 * so the guest will not see stale values.
3131 smp_call_function_single(freq
->cpu
, bounce_off
, NULL
, 1);
3136 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
3137 .notifier_call
= kvmclock_cpufreq_notifier
3140 static void kvm_timer_init(void)
3144 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
3145 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
3146 CPUFREQ_TRANSITION_NOTIFIER
);
3147 for_each_online_cpu(cpu
)
3148 per_cpu(cpu_tsc_khz
, cpu
) = cpufreq_get(cpu
);
3150 for_each_possible_cpu(cpu
)
3151 per_cpu(cpu_tsc_khz
, cpu
) = tsc_khz
;
3155 int kvm_arch_init(void *opaque
)
3158 struct kvm_x86_ops
*ops
= (struct kvm_x86_ops
*)opaque
;
3161 printk(KERN_ERR
"kvm: already loaded the other module\n");
3166 if (!ops
->cpu_has_kvm_support()) {
3167 printk(KERN_ERR
"kvm: no hardware support\n");
3171 if (ops
->disabled_by_bios()) {
3172 printk(KERN_ERR
"kvm: disabled by bios\n");
3177 r
= kvm_mmu_module_init();
3181 kvm_init_msr_list();
3184 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
3185 kvm_mmu_set_base_ptes(PT_PRESENT_MASK
);
3186 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
3187 PT_DIRTY_MASK
, PT64_NX_MASK
, 0);
3197 void kvm_arch_exit(void)
3199 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
3200 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
3201 CPUFREQ_TRANSITION_NOTIFIER
);
3203 kvm_mmu_module_exit();
3206 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
3208 ++vcpu
->stat
.halt_exits
;
3209 if (irqchip_in_kernel(vcpu
->kvm
)) {
3210 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
3213 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
3217 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
3219 static inline gpa_t
hc_gpa(struct kvm_vcpu
*vcpu
, unsigned long a0
,
3222 if (is_long_mode(vcpu
))
3225 return a0
| ((gpa_t
)a1
<< 32);
3228 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
3230 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
3233 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3234 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
3235 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
3236 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
3237 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
3239 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
3241 if (!is_long_mode(vcpu
)) {
3249 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
3255 case KVM_HC_VAPIC_POLL_IRQ
:
3259 r
= kvm_pv_mmu_op(vcpu
, a0
, hc_gpa(vcpu
, a1
, a2
), &ret
);
3266 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
3267 ++vcpu
->stat
.hypercalls
;
3270 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
3272 int kvm_fix_hypercall(struct kvm_vcpu
*vcpu
)
3274 char instruction
[3];
3276 unsigned long rip
= kvm_rip_read(vcpu
);
3280 * Blow out the MMU to ensure that no other VCPU has an active mapping
3281 * to ensure that the updated hypercall appears atomically across all
3284 kvm_mmu_zap_all(vcpu
->kvm
);
3286 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
3287 if (emulator_write_emulated(rip
, instruction
, 3, vcpu
)
3288 != X86EMUL_CONTINUE
)
3294 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
3296 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
3299 void realmode_lgdt(struct kvm_vcpu
*vcpu
, u16 limit
, unsigned long base
)
3301 struct descriptor_table dt
= { limit
, base
};
3303 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
3306 void realmode_lidt(struct kvm_vcpu
*vcpu
, u16 limit
, unsigned long base
)
3308 struct descriptor_table dt
= { limit
, base
};
3310 kvm_x86_ops
->set_idt(vcpu
, &dt
);
3313 void realmode_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
,
3314 unsigned long *rflags
)
3316 kvm_lmsw(vcpu
, msw
);
3317 *rflags
= kvm_get_rflags(vcpu
);
3320 unsigned long realmode_get_cr(struct kvm_vcpu
*vcpu
, int cr
)
3322 unsigned long value
;
3324 kvm_x86_ops
->decache_cr4_guest_bits(vcpu
);
3327 value
= vcpu
->arch
.cr0
;
3330 value
= vcpu
->arch
.cr2
;
3333 value
= vcpu
->arch
.cr3
;
3336 value
= vcpu
->arch
.cr4
;
3339 value
= kvm_get_cr8(vcpu
);
3342 vcpu_printf(vcpu
, "%s: unexpected cr %u\n", __func__
, cr
);
3349 void realmode_set_cr(struct kvm_vcpu
*vcpu
, int cr
, unsigned long val
,
3350 unsigned long *rflags
)
3354 kvm_set_cr0(vcpu
, mk_cr_64(vcpu
->arch
.cr0
, val
));
3355 *rflags
= kvm_get_rflags(vcpu
);
3358 vcpu
->arch
.cr2
= val
;
3361 kvm_set_cr3(vcpu
, val
);
3364 kvm_set_cr4(vcpu
, mk_cr_64(vcpu
->arch
.cr4
, val
));
3367 kvm_set_cr8(vcpu
, val
& 0xfUL
);
3370 vcpu_printf(vcpu
, "%s: unexpected cr %u\n", __func__
, cr
);
3374 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu
*vcpu
, int i
)
3376 struct kvm_cpuid_entry2
*e
= &vcpu
->arch
.cpuid_entries
[i
];
3377 int j
, nent
= vcpu
->arch
.cpuid_nent
;
3379 e
->flags
&= ~KVM_CPUID_FLAG_STATE_READ_NEXT
;
3380 /* when no next entry is found, the current entry[i] is reselected */
3381 for (j
= i
+ 1; ; j
= (j
+ 1) % nent
) {
3382 struct kvm_cpuid_entry2
*ej
= &vcpu
->arch
.cpuid_entries
[j
];
3383 if (ej
->function
== e
->function
) {
3384 ej
->flags
|= KVM_CPUID_FLAG_STATE_READ_NEXT
;
3388 return 0; /* silence gcc, even though control never reaches here */
3391 /* find an entry with matching function, matching index (if needed), and that
3392 * should be read next (if it's stateful) */
3393 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2
*e
,
3394 u32 function
, u32 index
)
3396 if (e
->function
!= function
)
3398 if ((e
->flags
& KVM_CPUID_FLAG_SIGNIFCANT_INDEX
) && e
->index
!= index
)
3400 if ((e
->flags
& KVM_CPUID_FLAG_STATEFUL_FUNC
) &&
3401 !(e
->flags
& KVM_CPUID_FLAG_STATE_READ_NEXT
))
3406 struct kvm_cpuid_entry2
*kvm_find_cpuid_entry(struct kvm_vcpu
*vcpu
,
3407 u32 function
, u32 index
)
3410 struct kvm_cpuid_entry2
*best
= NULL
;
3412 for (i
= 0; i
< vcpu
->arch
.cpuid_nent
; ++i
) {
3413 struct kvm_cpuid_entry2
*e
;
3415 e
= &vcpu
->arch
.cpuid_entries
[i
];
3416 if (is_matching_cpuid_entry(e
, function
, index
)) {
3417 if (e
->flags
& KVM_CPUID_FLAG_STATEFUL_FUNC
)
3418 move_to_next_stateful_cpuid_entry(vcpu
, i
);
3423 * Both basic or both extended?
3425 if (((e
->function
^ function
) & 0x80000000) == 0)
3426 if (!best
|| e
->function
> best
->function
)
3432 int cpuid_maxphyaddr(struct kvm_vcpu
*vcpu
)
3434 struct kvm_cpuid_entry2
*best
;
3436 best
= kvm_find_cpuid_entry(vcpu
, 0x80000008, 0);
3438 return best
->eax
& 0xff;
3442 void kvm_emulate_cpuid(struct kvm_vcpu
*vcpu
)
3444 u32 function
, index
;
3445 struct kvm_cpuid_entry2
*best
;
3447 function
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3448 index
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
3449 kvm_register_write(vcpu
, VCPU_REGS_RAX
, 0);
3450 kvm_register_write(vcpu
, VCPU_REGS_RBX
, 0);
3451 kvm_register_write(vcpu
, VCPU_REGS_RCX
, 0);
3452 kvm_register_write(vcpu
, VCPU_REGS_RDX
, 0);
3453 best
= kvm_find_cpuid_entry(vcpu
, function
, index
);
3455 kvm_register_write(vcpu
, VCPU_REGS_RAX
, best
->eax
);
3456 kvm_register_write(vcpu
, VCPU_REGS_RBX
, best
->ebx
);
3457 kvm_register_write(vcpu
, VCPU_REGS_RCX
, best
->ecx
);
3458 kvm_register_write(vcpu
, VCPU_REGS_RDX
, best
->edx
);
3460 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
3461 trace_kvm_cpuid(function
,
3462 kvm_register_read(vcpu
, VCPU_REGS_RAX
),
3463 kvm_register_read(vcpu
, VCPU_REGS_RBX
),
3464 kvm_register_read(vcpu
, VCPU_REGS_RCX
),
3465 kvm_register_read(vcpu
, VCPU_REGS_RDX
));
3467 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid
);
3470 * Check if userspace requested an interrupt window, and that the
3471 * interrupt window is open.
3473 * No need to exit to userspace if we already have an interrupt queued.
3475 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
3477 return (!irqchip_in_kernel(vcpu
->kvm
) && !kvm_cpu_has_interrupt(vcpu
) &&
3478 vcpu
->run
->request_interrupt_window
&&
3479 kvm_arch_interrupt_allowed(vcpu
));
3482 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
3484 struct kvm_run
*kvm_run
= vcpu
->run
;
3486 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
3487 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
3488 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
3489 if (irqchip_in_kernel(vcpu
->kvm
))
3490 kvm_run
->ready_for_interrupt_injection
= 1;
3492 kvm_run
->ready_for_interrupt_injection
=
3493 kvm_arch_interrupt_allowed(vcpu
) &&
3494 !kvm_cpu_has_interrupt(vcpu
) &&
3495 !kvm_event_needs_reinjection(vcpu
);
3498 static void vapic_enter(struct kvm_vcpu
*vcpu
)
3500 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
3503 if (!apic
|| !apic
->vapic_addr
)
3506 page
= gfn_to_page(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
3508 vcpu
->arch
.apic
->vapic_page
= page
;
3511 static void vapic_exit(struct kvm_vcpu
*vcpu
)
3513 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
3515 if (!apic
|| !apic
->vapic_addr
)
3518 down_read(&vcpu
->kvm
->slots_lock
);
3519 kvm_release_page_dirty(apic
->vapic_page
);
3520 mark_page_dirty(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
3521 up_read(&vcpu
->kvm
->slots_lock
);
3524 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
3528 if (!kvm_x86_ops
->update_cr8_intercept
)
3531 if (!vcpu
->arch
.apic
)
3534 if (!vcpu
->arch
.apic
->vapic_addr
)
3535 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
3542 tpr
= kvm_lapic_get_cr8(vcpu
);
3544 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
3547 static void inject_pending_event(struct kvm_vcpu
*vcpu
)
3549 /* try to reinject previous events if any */
3550 if (vcpu
->arch
.exception
.pending
) {
3551 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
3552 vcpu
->arch
.exception
.has_error_code
,
3553 vcpu
->arch
.exception
.error_code
);
3557 if (vcpu
->arch
.nmi_injected
) {
3558 kvm_x86_ops
->set_nmi(vcpu
);
3562 if (vcpu
->arch
.interrupt
.pending
) {
3563 kvm_x86_ops
->set_irq(vcpu
);
3567 /* try to inject new event if pending */
3568 if (vcpu
->arch
.nmi_pending
) {
3569 if (kvm_x86_ops
->nmi_allowed(vcpu
)) {
3570 vcpu
->arch
.nmi_pending
= false;
3571 vcpu
->arch
.nmi_injected
= true;
3572 kvm_x86_ops
->set_nmi(vcpu
);
3574 } else if (kvm_cpu_has_interrupt(vcpu
)) {
3575 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
3576 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
3578 kvm_x86_ops
->set_irq(vcpu
);
3583 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
3586 bool req_int_win
= !irqchip_in_kernel(vcpu
->kvm
) &&
3587 vcpu
->run
->request_interrupt_window
;
3590 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD
, &vcpu
->requests
))
3591 kvm_mmu_unload(vcpu
);
3593 r
= kvm_mmu_reload(vcpu
);
3597 if (vcpu
->requests
) {
3598 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER
, &vcpu
->requests
))
3599 __kvm_migrate_timers(vcpu
);
3600 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE
, &vcpu
->requests
))
3601 kvm_write_guest_time(vcpu
);
3602 if (test_and_clear_bit(KVM_REQ_MMU_SYNC
, &vcpu
->requests
))
3603 kvm_mmu_sync_roots(vcpu
);
3604 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH
, &vcpu
->requests
))
3605 kvm_x86_ops
->tlb_flush(vcpu
);
3606 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS
,
3608 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
3612 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT
, &vcpu
->requests
)) {
3613 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
3621 kvm_x86_ops
->prepare_guest_switch(vcpu
);
3622 kvm_load_guest_fpu(vcpu
);
3624 local_irq_disable();
3626 clear_bit(KVM_REQ_KICK
, &vcpu
->requests
);
3627 smp_mb__after_clear_bit();
3629 if (vcpu
->requests
|| need_resched() || signal_pending(current
)) {
3630 set_bit(KVM_REQ_KICK
, &vcpu
->requests
);
3637 inject_pending_event(vcpu
);
3639 /* enable NMI/IRQ window open exits if needed */
3640 if (vcpu
->arch
.nmi_pending
)
3641 kvm_x86_ops
->enable_nmi_window(vcpu
);
3642 else if (kvm_cpu_has_interrupt(vcpu
) || req_int_win
)
3643 kvm_x86_ops
->enable_irq_window(vcpu
);
3645 if (kvm_lapic_enabled(vcpu
)) {
3646 update_cr8_intercept(vcpu
);
3647 kvm_lapic_sync_to_vapic(vcpu
);
3650 up_read(&vcpu
->kvm
->slots_lock
);
3654 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
3656 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
3657 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
3658 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
3659 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
3662 trace_kvm_entry(vcpu
->vcpu_id
);
3663 kvm_x86_ops
->run(vcpu
);
3665 if (unlikely(vcpu
->arch
.switch_db_regs
|| test_thread_flag(TIF_DEBUG
))) {
3666 set_debugreg(current
->thread
.debugreg0
, 0);
3667 set_debugreg(current
->thread
.debugreg1
, 1);
3668 set_debugreg(current
->thread
.debugreg2
, 2);
3669 set_debugreg(current
->thread
.debugreg3
, 3);
3670 set_debugreg(current
->thread
.debugreg6
, 6);
3671 set_debugreg(current
->thread
.debugreg7
, 7);
3674 set_bit(KVM_REQ_KICK
, &vcpu
->requests
);
3680 * We must have an instruction between local_irq_enable() and
3681 * kvm_guest_exit(), so the timer interrupt isn't delayed by
3682 * the interrupt shadow. The stat.exits increment will do nicely.
3683 * But we need to prevent reordering, hence this barrier():
3691 down_read(&vcpu
->kvm
->slots_lock
);
3694 * Profile KVM exit RIPs:
3696 if (unlikely(prof_on
== KVM_PROFILING
)) {
3697 unsigned long rip
= kvm_rip_read(vcpu
);
3698 profile_hit(KVM_PROFILING
, (void *)rip
);
3702 kvm_lapic_sync_from_vapic(vcpu
);
3704 r
= kvm_x86_ops
->handle_exit(vcpu
);
3710 static int __vcpu_run(struct kvm_vcpu
*vcpu
)
3714 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
)) {
3715 pr_debug("vcpu %d received sipi with vector # %x\n",
3716 vcpu
->vcpu_id
, vcpu
->arch
.sipi_vector
);
3717 kvm_lapic_reset(vcpu
);
3718 r
= kvm_arch_vcpu_reset(vcpu
);
3721 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
3724 down_read(&vcpu
->kvm
->slots_lock
);
3729 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
)
3730 r
= vcpu_enter_guest(vcpu
);
3732 up_read(&vcpu
->kvm
->slots_lock
);
3733 kvm_vcpu_block(vcpu
);
3734 down_read(&vcpu
->kvm
->slots_lock
);
3735 if (test_and_clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
))
3737 switch(vcpu
->arch
.mp_state
) {
3738 case KVM_MP_STATE_HALTED
:
3739 vcpu
->arch
.mp_state
=
3740 KVM_MP_STATE_RUNNABLE
;
3741 case KVM_MP_STATE_RUNNABLE
:
3743 case KVM_MP_STATE_SIPI_RECEIVED
:
3754 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
3755 if (kvm_cpu_has_pending_timer(vcpu
))
3756 kvm_inject_pending_timer_irqs(vcpu
);
3758 if (dm_request_for_irq_injection(vcpu
)) {
3760 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
3761 ++vcpu
->stat
.request_irq_exits
;
3763 if (signal_pending(current
)) {
3765 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
3766 ++vcpu
->stat
.signal_exits
;
3768 if (need_resched()) {
3769 up_read(&vcpu
->kvm
->slots_lock
);
3771 down_read(&vcpu
->kvm
->slots_lock
);
3775 up_read(&vcpu
->kvm
->slots_lock
);
3776 post_kvm_run_save(vcpu
);
3783 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
3790 if (vcpu
->sigset_active
)
3791 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
3793 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
3794 kvm_vcpu_block(vcpu
);
3795 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
3800 /* re-sync apic's tpr */
3801 if (!irqchip_in_kernel(vcpu
->kvm
))
3802 kvm_set_cr8(vcpu
, kvm_run
->cr8
);
3804 if (vcpu
->arch
.pio
.cur_count
) {
3805 r
= complete_pio(vcpu
);
3809 #if CONFIG_HAS_IOMEM
3810 if (vcpu
->mmio_needed
) {
3811 memcpy(vcpu
->mmio_data
, kvm_run
->mmio
.data
, 8);
3812 vcpu
->mmio_read_completed
= 1;
3813 vcpu
->mmio_needed
= 0;
3815 down_read(&vcpu
->kvm
->slots_lock
);
3816 r
= emulate_instruction(vcpu
, vcpu
->arch
.mmio_fault_cr2
, 0,
3817 EMULTYPE_NO_DECODE
);
3818 up_read(&vcpu
->kvm
->slots_lock
);
3819 if (r
== EMULATE_DO_MMIO
) {
3821 * Read-modify-write. Back to userspace.
3828 if (kvm_run
->exit_reason
== KVM_EXIT_HYPERCALL
)
3829 kvm_register_write(vcpu
, VCPU_REGS_RAX
,
3830 kvm_run
->hypercall
.ret
);
3832 r
= __vcpu_run(vcpu
);
3835 if (vcpu
->sigset_active
)
3836 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
3842 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
3846 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3847 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
3848 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
3849 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
3850 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
3851 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
3852 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
3853 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
3854 #ifdef CONFIG_X86_64
3855 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
3856 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
3857 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
3858 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
3859 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
3860 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
3861 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
3862 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
3865 regs
->rip
= kvm_rip_read(vcpu
);
3866 regs
->rflags
= kvm_get_rflags(vcpu
);
3873 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
3877 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
3878 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
3879 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
3880 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
3881 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
3882 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
3883 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
3884 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
3885 #ifdef CONFIG_X86_64
3886 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
3887 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
3888 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
3889 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
3890 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
3891 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
3892 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
3893 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
3896 kvm_rip_write(vcpu
, regs
->rip
);
3897 kvm_set_rflags(vcpu
, regs
->rflags
);
3899 vcpu
->arch
.exception
.pending
= false;
3906 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
3907 struct kvm_segment
*var
, int seg
)
3909 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
3912 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
3914 struct kvm_segment cs
;
3916 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
3920 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
3922 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
3923 struct kvm_sregs
*sregs
)
3925 struct descriptor_table dt
;
3929 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
3930 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
3931 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
3932 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
3933 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
3934 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
3936 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
3937 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
3939 kvm_x86_ops
->get_idt(vcpu
, &dt
);
3940 sregs
->idt
.limit
= dt
.limit
;
3941 sregs
->idt
.base
= dt
.base
;
3942 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
3943 sregs
->gdt
.limit
= dt
.limit
;
3944 sregs
->gdt
.base
= dt
.base
;
3946 kvm_x86_ops
->decache_cr4_guest_bits(vcpu
);
3947 sregs
->cr0
= vcpu
->arch
.cr0
;
3948 sregs
->cr2
= vcpu
->arch
.cr2
;
3949 sregs
->cr3
= vcpu
->arch
.cr3
;
3950 sregs
->cr4
= vcpu
->arch
.cr4
;
3951 sregs
->cr8
= kvm_get_cr8(vcpu
);
3952 sregs
->efer
= vcpu
->arch
.shadow_efer
;
3953 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
3955 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
3957 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
3958 set_bit(vcpu
->arch
.interrupt
.nr
,
3959 (unsigned long *)sregs
->interrupt_bitmap
);
3966 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
3967 struct kvm_mp_state
*mp_state
)
3970 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
3975 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
3976 struct kvm_mp_state
*mp_state
)
3979 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
3984 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
3985 struct kvm_segment
*var
, int seg
)
3987 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
3990 static void seg_desct_to_kvm_desct(struct desc_struct
*seg_desc
, u16 selector
,
3991 struct kvm_segment
*kvm_desct
)
3993 kvm_desct
->base
= get_desc_base(seg_desc
);
3994 kvm_desct
->limit
= get_desc_limit(seg_desc
);
3996 kvm_desct
->limit
<<= 12;
3997 kvm_desct
->limit
|= 0xfff;
3999 kvm_desct
->selector
= selector
;
4000 kvm_desct
->type
= seg_desc
->type
;
4001 kvm_desct
->present
= seg_desc
->p
;
4002 kvm_desct
->dpl
= seg_desc
->dpl
;
4003 kvm_desct
->db
= seg_desc
->d
;
4004 kvm_desct
->s
= seg_desc
->s
;
4005 kvm_desct
->l
= seg_desc
->l
;
4006 kvm_desct
->g
= seg_desc
->g
;
4007 kvm_desct
->avl
= seg_desc
->avl
;
4009 kvm_desct
->unusable
= 1;
4011 kvm_desct
->unusable
= 0;
4012 kvm_desct
->padding
= 0;
4015 static void get_segment_descriptor_dtable(struct kvm_vcpu
*vcpu
,
4017 struct descriptor_table
*dtable
)
4019 if (selector
& 1 << 2) {
4020 struct kvm_segment kvm_seg
;
4022 kvm_get_segment(vcpu
, &kvm_seg
, VCPU_SREG_LDTR
);
4024 if (kvm_seg
.unusable
)
4027 dtable
->limit
= kvm_seg
.limit
;
4028 dtable
->base
= kvm_seg
.base
;
4031 kvm_x86_ops
->get_gdt(vcpu
, dtable
);
4034 /* allowed just for 8 bytes segments */
4035 static int load_guest_segment_descriptor(struct kvm_vcpu
*vcpu
, u16 selector
,
4036 struct desc_struct
*seg_desc
)
4038 struct descriptor_table dtable
;
4039 u16 index
= selector
>> 3;
4041 get_segment_descriptor_dtable(vcpu
, selector
, &dtable
);
4043 if (dtable
.limit
< index
* 8 + 7) {
4044 kvm_queue_exception_e(vcpu
, GP_VECTOR
, selector
& 0xfffc);
4047 return kvm_read_guest_virt(dtable
.base
+ index
*8, seg_desc
, sizeof(*seg_desc
), vcpu
);
4050 /* allowed just for 8 bytes segments */
4051 static int save_guest_segment_descriptor(struct kvm_vcpu
*vcpu
, u16 selector
,
4052 struct desc_struct
*seg_desc
)
4054 struct descriptor_table dtable
;
4055 u16 index
= selector
>> 3;
4057 get_segment_descriptor_dtable(vcpu
, selector
, &dtable
);
4059 if (dtable
.limit
< index
* 8 + 7)
4061 return kvm_write_guest_virt(dtable
.base
+ index
*8, seg_desc
, sizeof(*seg_desc
), vcpu
);
4064 static gpa_t
get_tss_base_addr(struct kvm_vcpu
*vcpu
,
4065 struct desc_struct
*seg_desc
)
4067 u32 base_addr
= get_desc_base(seg_desc
);
4069 return vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, base_addr
);
4072 static u16
get_segment_selector(struct kvm_vcpu
*vcpu
, int seg
)
4074 struct kvm_segment kvm_seg
;
4076 kvm_get_segment(vcpu
, &kvm_seg
, seg
);
4077 return kvm_seg
.selector
;
4080 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu
*vcpu
,
4082 struct kvm_segment
*kvm_seg
)
4084 struct desc_struct seg_desc
;
4086 if (load_guest_segment_descriptor(vcpu
, selector
, &seg_desc
))
4088 seg_desct_to_kvm_desct(&seg_desc
, selector
, kvm_seg
);
4092 static int kvm_load_realmode_segment(struct kvm_vcpu
*vcpu
, u16 selector
, int seg
)
4094 struct kvm_segment segvar
= {
4095 .base
= selector
<< 4,
4097 .selector
= selector
,
4108 kvm_x86_ops
->set_segment(vcpu
, &segvar
, seg
);
4112 static int is_vm86_segment(struct kvm_vcpu
*vcpu
, int seg
)
4114 return (seg
!= VCPU_SREG_LDTR
) &&
4115 (seg
!= VCPU_SREG_TR
) &&
4116 (kvm_get_rflags(vcpu
) & X86_EFLAGS_VM
);
4119 int kvm_load_segment_descriptor(struct kvm_vcpu
*vcpu
, u16 selector
,
4120 int type_bits
, int seg
)
4122 struct kvm_segment kvm_seg
;
4124 if (is_vm86_segment(vcpu
, seg
) || !(vcpu
->arch
.cr0
& X86_CR0_PE
))
4125 return kvm_load_realmode_segment(vcpu
, selector
, seg
);
4126 if (load_segment_descriptor_to_kvm_desct(vcpu
, selector
, &kvm_seg
))
4128 kvm_seg
.type
|= type_bits
;
4130 if (seg
!= VCPU_SREG_SS
&& seg
!= VCPU_SREG_CS
&&
4131 seg
!= VCPU_SREG_LDTR
)
4133 kvm_seg
.unusable
= 1;
4135 kvm_set_segment(vcpu
, &kvm_seg
, seg
);
4139 static void save_state_to_tss32(struct kvm_vcpu
*vcpu
,
4140 struct tss_segment_32
*tss
)
4142 tss
->cr3
= vcpu
->arch
.cr3
;
4143 tss
->eip
= kvm_rip_read(vcpu
);
4144 tss
->eflags
= kvm_get_rflags(vcpu
);
4145 tss
->eax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4146 tss
->ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4147 tss
->edx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4148 tss
->ebx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
4149 tss
->esp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
4150 tss
->ebp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
4151 tss
->esi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
4152 tss
->edi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
4153 tss
->es
= get_segment_selector(vcpu
, VCPU_SREG_ES
);
4154 tss
->cs
= get_segment_selector(vcpu
, VCPU_SREG_CS
);
4155 tss
->ss
= get_segment_selector(vcpu
, VCPU_SREG_SS
);
4156 tss
->ds
= get_segment_selector(vcpu
, VCPU_SREG_DS
);
4157 tss
->fs
= get_segment_selector(vcpu
, VCPU_SREG_FS
);
4158 tss
->gs
= get_segment_selector(vcpu
, VCPU_SREG_GS
);
4159 tss
->ldt_selector
= get_segment_selector(vcpu
, VCPU_SREG_LDTR
);
4162 static int load_state_from_tss32(struct kvm_vcpu
*vcpu
,
4163 struct tss_segment_32
*tss
)
4165 kvm_set_cr3(vcpu
, tss
->cr3
);
4167 kvm_rip_write(vcpu
, tss
->eip
);
4168 kvm_set_rflags(vcpu
, tss
->eflags
| 2);
4170 kvm_register_write(vcpu
, VCPU_REGS_RAX
, tss
->eax
);
4171 kvm_register_write(vcpu
, VCPU_REGS_RCX
, tss
->ecx
);
4172 kvm_register_write(vcpu
, VCPU_REGS_RDX
, tss
->edx
);
4173 kvm_register_write(vcpu
, VCPU_REGS_RBX
, tss
->ebx
);
4174 kvm_register_write(vcpu
, VCPU_REGS_RSP
, tss
->esp
);
4175 kvm_register_write(vcpu
, VCPU_REGS_RBP
, tss
->ebp
);
4176 kvm_register_write(vcpu
, VCPU_REGS_RSI
, tss
->esi
);
4177 kvm_register_write(vcpu
, VCPU_REGS_RDI
, tss
->edi
);
4179 if (kvm_load_segment_descriptor(vcpu
, tss
->ldt_selector
, 0, VCPU_SREG_LDTR
))
4182 if (kvm_load_segment_descriptor(vcpu
, tss
->es
, 1, VCPU_SREG_ES
))
4185 if (kvm_load_segment_descriptor(vcpu
, tss
->cs
, 9, VCPU_SREG_CS
))
4188 if (kvm_load_segment_descriptor(vcpu
, tss
->ss
, 1, VCPU_SREG_SS
))
4191 if (kvm_load_segment_descriptor(vcpu
, tss
->ds
, 1, VCPU_SREG_DS
))
4194 if (kvm_load_segment_descriptor(vcpu
, tss
->fs
, 1, VCPU_SREG_FS
))
4197 if (kvm_load_segment_descriptor(vcpu
, tss
->gs
, 1, VCPU_SREG_GS
))
4202 static void save_state_to_tss16(struct kvm_vcpu
*vcpu
,
4203 struct tss_segment_16
*tss
)
4205 tss
->ip
= kvm_rip_read(vcpu
);
4206 tss
->flag
= kvm_get_rflags(vcpu
);
4207 tss
->ax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4208 tss
->cx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4209 tss
->dx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4210 tss
->bx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
4211 tss
->sp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
4212 tss
->bp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
4213 tss
->si
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
4214 tss
->di
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
4216 tss
->es
= get_segment_selector(vcpu
, VCPU_SREG_ES
);
4217 tss
->cs
= get_segment_selector(vcpu
, VCPU_SREG_CS
);
4218 tss
->ss
= get_segment_selector(vcpu
, VCPU_SREG_SS
);
4219 tss
->ds
= get_segment_selector(vcpu
, VCPU_SREG_DS
);
4220 tss
->ldt
= get_segment_selector(vcpu
, VCPU_SREG_LDTR
);
4223 static int load_state_from_tss16(struct kvm_vcpu
*vcpu
,
4224 struct tss_segment_16
*tss
)
4226 kvm_rip_write(vcpu
, tss
->ip
);
4227 kvm_set_rflags(vcpu
, tss
->flag
| 2);
4228 kvm_register_write(vcpu
, VCPU_REGS_RAX
, tss
->ax
);
4229 kvm_register_write(vcpu
, VCPU_REGS_RCX
, tss
->cx
);
4230 kvm_register_write(vcpu
, VCPU_REGS_RDX
, tss
->dx
);
4231 kvm_register_write(vcpu
, VCPU_REGS_RBX
, tss
->bx
);
4232 kvm_register_write(vcpu
, VCPU_REGS_RSP
, tss
->sp
);
4233 kvm_register_write(vcpu
, VCPU_REGS_RBP
, tss
->bp
);
4234 kvm_register_write(vcpu
, VCPU_REGS_RSI
, tss
->si
);
4235 kvm_register_write(vcpu
, VCPU_REGS_RDI
, tss
->di
);
4237 if (kvm_load_segment_descriptor(vcpu
, tss
->ldt
, 0, VCPU_SREG_LDTR
))
4240 if (kvm_load_segment_descriptor(vcpu
, tss
->es
, 1, VCPU_SREG_ES
))
4243 if (kvm_load_segment_descriptor(vcpu
, tss
->cs
, 9, VCPU_SREG_CS
))
4246 if (kvm_load_segment_descriptor(vcpu
, tss
->ss
, 1, VCPU_SREG_SS
))
4249 if (kvm_load_segment_descriptor(vcpu
, tss
->ds
, 1, VCPU_SREG_DS
))
4254 static int kvm_task_switch_16(struct kvm_vcpu
*vcpu
, u16 tss_selector
,
4255 u16 old_tss_sel
, u32 old_tss_base
,
4256 struct desc_struct
*nseg_desc
)
4258 struct tss_segment_16 tss_segment_16
;
4261 if (kvm_read_guest(vcpu
->kvm
, old_tss_base
, &tss_segment_16
,
4262 sizeof tss_segment_16
))
4265 save_state_to_tss16(vcpu
, &tss_segment_16
);
4267 if (kvm_write_guest(vcpu
->kvm
, old_tss_base
, &tss_segment_16
,
4268 sizeof tss_segment_16
))
4271 if (kvm_read_guest(vcpu
->kvm
, get_tss_base_addr(vcpu
, nseg_desc
),
4272 &tss_segment_16
, sizeof tss_segment_16
))
4275 if (old_tss_sel
!= 0xffff) {
4276 tss_segment_16
.prev_task_link
= old_tss_sel
;
4278 if (kvm_write_guest(vcpu
->kvm
,
4279 get_tss_base_addr(vcpu
, nseg_desc
),
4280 &tss_segment_16
.prev_task_link
,
4281 sizeof tss_segment_16
.prev_task_link
))
4285 if (load_state_from_tss16(vcpu
, &tss_segment_16
))
4293 static int kvm_task_switch_32(struct kvm_vcpu
*vcpu
, u16 tss_selector
,
4294 u16 old_tss_sel
, u32 old_tss_base
,
4295 struct desc_struct
*nseg_desc
)
4297 struct tss_segment_32 tss_segment_32
;
4300 if (kvm_read_guest(vcpu
->kvm
, old_tss_base
, &tss_segment_32
,
4301 sizeof tss_segment_32
))
4304 save_state_to_tss32(vcpu
, &tss_segment_32
);
4306 if (kvm_write_guest(vcpu
->kvm
, old_tss_base
, &tss_segment_32
,
4307 sizeof tss_segment_32
))
4310 if (kvm_read_guest(vcpu
->kvm
, get_tss_base_addr(vcpu
, nseg_desc
),
4311 &tss_segment_32
, sizeof tss_segment_32
))
4314 if (old_tss_sel
!= 0xffff) {
4315 tss_segment_32
.prev_task_link
= old_tss_sel
;
4317 if (kvm_write_guest(vcpu
->kvm
,
4318 get_tss_base_addr(vcpu
, nseg_desc
),
4319 &tss_segment_32
.prev_task_link
,
4320 sizeof tss_segment_32
.prev_task_link
))
4324 if (load_state_from_tss32(vcpu
, &tss_segment_32
))
4332 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int reason
)
4334 struct kvm_segment tr_seg
;
4335 struct desc_struct cseg_desc
;
4336 struct desc_struct nseg_desc
;
4338 u32 old_tss_base
= get_segment_base(vcpu
, VCPU_SREG_TR
);
4339 u16 old_tss_sel
= get_segment_selector(vcpu
, VCPU_SREG_TR
);
4341 old_tss_base
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, old_tss_base
);
4343 /* FIXME: Handle errors. Failure to read either TSS or their
4344 * descriptors should generate a pagefault.
4346 if (load_guest_segment_descriptor(vcpu
, tss_selector
, &nseg_desc
))
4349 if (load_guest_segment_descriptor(vcpu
, old_tss_sel
, &cseg_desc
))
4352 if (reason
!= TASK_SWITCH_IRET
) {
4355 cpl
= kvm_x86_ops
->get_cpl(vcpu
);
4356 if ((tss_selector
& 3) > nseg_desc
.dpl
|| cpl
> nseg_desc
.dpl
) {
4357 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
4362 if (!nseg_desc
.p
|| get_desc_limit(&nseg_desc
) < 0x67) {
4363 kvm_queue_exception_e(vcpu
, TS_VECTOR
, tss_selector
& 0xfffc);
4367 if (reason
== TASK_SWITCH_IRET
|| reason
== TASK_SWITCH_JMP
) {
4368 cseg_desc
.type
&= ~(1 << 1); //clear the B flag
4369 save_guest_segment_descriptor(vcpu
, old_tss_sel
, &cseg_desc
);
4372 if (reason
== TASK_SWITCH_IRET
) {
4373 u32 eflags
= kvm_get_rflags(vcpu
);
4374 kvm_set_rflags(vcpu
, eflags
& ~X86_EFLAGS_NT
);
4377 /* set back link to prev task only if NT bit is set in eflags
4378 note that old_tss_sel is not used afetr this point */
4379 if (reason
!= TASK_SWITCH_CALL
&& reason
!= TASK_SWITCH_GATE
)
4380 old_tss_sel
= 0xffff;
4382 /* set back link to prev task only if NT bit is set in eflags
4383 note that old_tss_sel is not used afetr this point */
4384 if (reason
!= TASK_SWITCH_CALL
&& reason
!= TASK_SWITCH_GATE
)
4385 old_tss_sel
= 0xffff;
4387 if (nseg_desc
.type
& 8)
4388 ret
= kvm_task_switch_32(vcpu
, tss_selector
, old_tss_sel
,
4389 old_tss_base
, &nseg_desc
);
4391 ret
= kvm_task_switch_16(vcpu
, tss_selector
, old_tss_sel
,
4392 old_tss_base
, &nseg_desc
);
4394 if (reason
== TASK_SWITCH_CALL
|| reason
== TASK_SWITCH_GATE
) {
4395 u32 eflags
= kvm_get_rflags(vcpu
);
4396 kvm_set_rflags(vcpu
, eflags
| X86_EFLAGS_NT
);
4399 if (reason
!= TASK_SWITCH_IRET
) {
4400 nseg_desc
.type
|= (1 << 1);
4401 save_guest_segment_descriptor(vcpu
, tss_selector
,
4405 kvm_x86_ops
->set_cr0(vcpu
, vcpu
->arch
.cr0
| X86_CR0_TS
);
4406 seg_desct_to_kvm_desct(&nseg_desc
, tss_selector
, &tr_seg
);
4408 kvm_set_segment(vcpu
, &tr_seg
, VCPU_SREG_TR
);
4412 EXPORT_SYMBOL_GPL(kvm_task_switch
);
4414 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
4415 struct kvm_sregs
*sregs
)
4417 int mmu_reset_needed
= 0;
4418 int pending_vec
, max_bits
;
4419 struct descriptor_table dt
;
4423 dt
.limit
= sregs
->idt
.limit
;
4424 dt
.base
= sregs
->idt
.base
;
4425 kvm_x86_ops
->set_idt(vcpu
, &dt
);
4426 dt
.limit
= sregs
->gdt
.limit
;
4427 dt
.base
= sregs
->gdt
.base
;
4428 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
4430 vcpu
->arch
.cr2
= sregs
->cr2
;
4431 mmu_reset_needed
|= vcpu
->arch
.cr3
!= sregs
->cr3
;
4432 vcpu
->arch
.cr3
= sregs
->cr3
;
4434 kvm_set_cr8(vcpu
, sregs
->cr8
);
4436 mmu_reset_needed
|= vcpu
->arch
.shadow_efer
!= sregs
->efer
;
4437 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
4438 kvm_set_apic_base(vcpu
, sregs
->apic_base
);
4440 kvm_x86_ops
->decache_cr4_guest_bits(vcpu
);
4442 mmu_reset_needed
|= vcpu
->arch
.cr0
!= sregs
->cr0
;
4443 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
4444 vcpu
->arch
.cr0
= sregs
->cr0
;
4446 mmu_reset_needed
|= vcpu
->arch
.cr4
!= sregs
->cr4
;
4447 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
4448 if (!is_long_mode(vcpu
) && is_pae(vcpu
))
4449 load_pdptrs(vcpu
, vcpu
->arch
.cr3
);
4451 if (mmu_reset_needed
)
4452 kvm_mmu_reset_context(vcpu
);
4454 max_bits
= (sizeof sregs
->interrupt_bitmap
) << 3;
4455 pending_vec
= find_first_bit(
4456 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
4457 if (pending_vec
< max_bits
) {
4458 kvm_queue_interrupt(vcpu
, pending_vec
, false);
4459 pr_debug("Set back pending irq %d\n", pending_vec
);
4460 if (irqchip_in_kernel(vcpu
->kvm
))
4461 kvm_pic_clear_isr_ack(vcpu
->kvm
);
4464 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
4465 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
4466 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
4467 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
4468 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
4469 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
4471 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
4472 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
4474 update_cr8_intercept(vcpu
);
4476 /* Older userspace won't unhalt the vcpu on reset. */
4477 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
4478 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
4479 !(vcpu
->arch
.cr0
& X86_CR0_PE
))
4480 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
4487 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
4488 struct kvm_guest_debug
*dbg
)
4490 unsigned long rflags
;
4496 * Read rflags as long as potentially injected trace flags are still
4499 rflags
= kvm_get_rflags(vcpu
);
4501 vcpu
->guest_debug
= dbg
->control
;
4502 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
4503 vcpu
->guest_debug
= 0;
4505 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
4506 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
4507 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
4508 vcpu
->arch
.switch_db_regs
=
4509 (dbg
->arch
.debugreg
[7] & DR7_BP_EN_MASK
);
4511 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
4512 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
4513 vcpu
->arch
.switch_db_regs
= (vcpu
->arch
.dr7
& DR7_BP_EN_MASK
);
4517 * Trigger an rflags update that will inject or remove the trace
4520 kvm_set_rflags(vcpu
, rflags
);
4522 kvm_x86_ops
->set_guest_debug(vcpu
, dbg
);
4524 if (vcpu
->guest_debug
& KVM_GUESTDBG_INJECT_DB
)
4525 kvm_queue_exception(vcpu
, DB_VECTOR
);
4526 else if (vcpu
->guest_debug
& KVM_GUESTDBG_INJECT_BP
)
4527 kvm_queue_exception(vcpu
, BP_VECTOR
);
4535 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
4536 * we have asm/x86/processor.h
4547 u32 st_space
[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
4548 #ifdef CONFIG_X86_64
4549 u32 xmm_space
[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
4551 u32 xmm_space
[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
4556 * Translate a guest virtual address to a guest physical address.
4558 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
4559 struct kvm_translation
*tr
)
4561 unsigned long vaddr
= tr
->linear_address
;
4565 down_read(&vcpu
->kvm
->slots_lock
);
4566 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, vaddr
);
4567 up_read(&vcpu
->kvm
->slots_lock
);
4568 tr
->physical_address
= gpa
;
4569 tr
->valid
= gpa
!= UNMAPPED_GVA
;
4577 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
4579 struct fxsave
*fxsave
= (struct fxsave
*)&vcpu
->arch
.guest_fx_image
;
4583 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
4584 fpu
->fcw
= fxsave
->cwd
;
4585 fpu
->fsw
= fxsave
->swd
;
4586 fpu
->ftwx
= fxsave
->twd
;
4587 fpu
->last_opcode
= fxsave
->fop
;
4588 fpu
->last_ip
= fxsave
->rip
;
4589 fpu
->last_dp
= fxsave
->rdp
;
4590 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
4597 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
4599 struct fxsave
*fxsave
= (struct fxsave
*)&vcpu
->arch
.guest_fx_image
;
4603 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
4604 fxsave
->cwd
= fpu
->fcw
;
4605 fxsave
->swd
= fpu
->fsw
;
4606 fxsave
->twd
= fpu
->ftwx
;
4607 fxsave
->fop
= fpu
->last_opcode
;
4608 fxsave
->rip
= fpu
->last_ip
;
4609 fxsave
->rdp
= fpu
->last_dp
;
4610 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
4617 void fx_init(struct kvm_vcpu
*vcpu
)
4619 unsigned after_mxcsr_mask
;
4622 * Touch the fpu the first time in non atomic context as if
4623 * this is the first fpu instruction the exception handler
4624 * will fire before the instruction returns and it'll have to
4625 * allocate ram with GFP_KERNEL.
4628 kvm_fx_save(&vcpu
->arch
.host_fx_image
);
4630 /* Initialize guest FPU by resetting ours and saving into guest's */
4632 kvm_fx_save(&vcpu
->arch
.host_fx_image
);
4634 kvm_fx_save(&vcpu
->arch
.guest_fx_image
);
4635 kvm_fx_restore(&vcpu
->arch
.host_fx_image
);
4638 vcpu
->arch
.cr0
|= X86_CR0_ET
;
4639 after_mxcsr_mask
= offsetof(struct i387_fxsave_struct
, st_space
);
4640 vcpu
->arch
.guest_fx_image
.mxcsr
= 0x1f80;
4641 memset((void *)&vcpu
->arch
.guest_fx_image
+ after_mxcsr_mask
,
4642 0, sizeof(struct i387_fxsave_struct
) - after_mxcsr_mask
);
4644 EXPORT_SYMBOL_GPL(fx_init
);
4646 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
4648 if (!vcpu
->fpu_active
|| vcpu
->guest_fpu_loaded
)
4651 vcpu
->guest_fpu_loaded
= 1;
4652 kvm_fx_save(&vcpu
->arch
.host_fx_image
);
4653 kvm_fx_restore(&vcpu
->arch
.guest_fx_image
);
4655 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu
);
4657 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
4659 if (!vcpu
->guest_fpu_loaded
)
4662 vcpu
->guest_fpu_loaded
= 0;
4663 kvm_fx_save(&vcpu
->arch
.guest_fx_image
);
4664 kvm_fx_restore(&vcpu
->arch
.host_fx_image
);
4665 ++vcpu
->stat
.fpu_reload
;
4667 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu
);
4669 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
4671 if (vcpu
->arch
.time_page
) {
4672 kvm_release_page_dirty(vcpu
->arch
.time_page
);
4673 vcpu
->arch
.time_page
= NULL
;
4676 kvm_x86_ops
->vcpu_free(vcpu
);
4679 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
4682 return kvm_x86_ops
->vcpu_create(kvm
, id
);
4685 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
4689 /* We do fxsave: this must be aligned. */
4690 BUG_ON((unsigned long)&vcpu
->arch
.host_fx_image
& 0xF);
4692 vcpu
->arch
.mtrr_state
.have_fixed
= 1;
4694 r
= kvm_arch_vcpu_reset(vcpu
);
4696 r
= kvm_mmu_setup(vcpu
);
4703 kvm_x86_ops
->vcpu_free(vcpu
);
4707 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
4710 kvm_mmu_unload(vcpu
);
4713 kvm_x86_ops
->vcpu_free(vcpu
);
4716 int kvm_arch_vcpu_reset(struct kvm_vcpu
*vcpu
)
4718 vcpu
->arch
.nmi_pending
= false;
4719 vcpu
->arch
.nmi_injected
= false;
4721 vcpu
->arch
.switch_db_regs
= 0;
4722 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
4723 vcpu
->arch
.dr6
= DR6_FIXED_1
;
4724 vcpu
->arch
.dr7
= DR7_FIXED_1
;
4726 return kvm_x86_ops
->vcpu_reset(vcpu
);
4729 int kvm_arch_hardware_enable(void *garbage
)
4732 * Since this may be called from a hotplug notifcation,
4733 * we can't get the CPU frequency directly.
4735 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
4736 int cpu
= raw_smp_processor_id();
4737 per_cpu(cpu_tsc_khz
, cpu
) = 0;
4739 return kvm_x86_ops
->hardware_enable(garbage
);
4742 void kvm_arch_hardware_disable(void *garbage
)
4744 kvm_x86_ops
->hardware_disable(garbage
);
4747 int kvm_arch_hardware_setup(void)
4749 return kvm_x86_ops
->hardware_setup();
4752 void kvm_arch_hardware_unsetup(void)
4754 kvm_x86_ops
->hardware_unsetup();
4757 void kvm_arch_check_processor_compat(void *rtn
)
4759 kvm_x86_ops
->check_processor_compatibility(rtn
);
4762 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
4768 BUG_ON(vcpu
->kvm
== NULL
);
4771 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
4772 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_bsp(vcpu
))
4773 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
4775 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
4777 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
4782 vcpu
->arch
.pio_data
= page_address(page
);
4784 r
= kvm_mmu_create(vcpu
);
4786 goto fail_free_pio_data
;
4788 if (irqchip_in_kernel(kvm
)) {
4789 r
= kvm_create_lapic(vcpu
);
4791 goto fail_mmu_destroy
;
4794 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
4796 if (!vcpu
->arch
.mce_banks
) {
4798 goto fail_mmu_destroy
;
4800 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
4805 kvm_mmu_destroy(vcpu
);
4807 free_page((unsigned long)vcpu
->arch
.pio_data
);
4812 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
4814 kvm_free_lapic(vcpu
);
4815 down_read(&vcpu
->kvm
->slots_lock
);
4816 kvm_mmu_destroy(vcpu
);
4817 up_read(&vcpu
->kvm
->slots_lock
);
4818 free_page((unsigned long)vcpu
->arch
.pio_data
);
4821 struct kvm
*kvm_arch_create_vm(void)
4823 struct kvm
*kvm
= kzalloc(sizeof(struct kvm
), GFP_KERNEL
);
4826 return ERR_PTR(-ENOMEM
);
4828 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
4829 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
4831 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
4832 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
4834 rdtscll(kvm
->arch
.vm_init_tsc
);
4839 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
4842 kvm_mmu_unload(vcpu
);
4846 static void kvm_free_vcpus(struct kvm
*kvm
)
4849 struct kvm_vcpu
*vcpu
;
4852 * Unpin any mmu pages first.
4854 kvm_for_each_vcpu(i
, vcpu
, kvm
)
4855 kvm_unload_vcpu_mmu(vcpu
);
4856 kvm_for_each_vcpu(i
, vcpu
, kvm
)
4857 kvm_arch_vcpu_free(vcpu
);
4859 mutex_lock(&kvm
->lock
);
4860 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
4861 kvm
->vcpus
[i
] = NULL
;
4863 atomic_set(&kvm
->online_vcpus
, 0);
4864 mutex_unlock(&kvm
->lock
);
4867 void kvm_arch_sync_events(struct kvm
*kvm
)
4869 kvm_free_all_assigned_devices(kvm
);
4872 void kvm_arch_destroy_vm(struct kvm
*kvm
)
4874 kvm_iommu_unmap_guest(kvm
);
4876 kfree(kvm
->arch
.vpic
);
4877 kfree(kvm
->arch
.vioapic
);
4878 kvm_free_vcpus(kvm
);
4879 kvm_free_physmem(kvm
);
4880 if (kvm
->arch
.apic_access_page
)
4881 put_page(kvm
->arch
.apic_access_page
);
4882 if (kvm
->arch
.ept_identity_pagetable
)
4883 put_page(kvm
->arch
.ept_identity_pagetable
);
4887 int kvm_arch_set_memory_region(struct kvm
*kvm
,
4888 struct kvm_userspace_memory_region
*mem
,
4889 struct kvm_memory_slot old
,
4892 int npages
= mem
->memory_size
>> PAGE_SHIFT
;
4893 struct kvm_memory_slot
*memslot
= &kvm
->memslots
[mem
->slot
];
4895 /*To keep backward compatibility with older userspace,
4896 *x86 needs to hanlde !user_alloc case.
4899 if (npages
&& !old
.rmap
) {
4900 unsigned long userspace_addr
;
4902 down_write(¤t
->mm
->mmap_sem
);
4903 userspace_addr
= do_mmap(NULL
, 0,
4905 PROT_READ
| PROT_WRITE
,
4906 MAP_PRIVATE
| MAP_ANONYMOUS
,
4908 up_write(¤t
->mm
->mmap_sem
);
4910 if (IS_ERR((void *)userspace_addr
))
4911 return PTR_ERR((void *)userspace_addr
);
4913 /* set userspace_addr atomically for kvm_hva_to_rmapp */
4914 spin_lock(&kvm
->mmu_lock
);
4915 memslot
->userspace_addr
= userspace_addr
;
4916 spin_unlock(&kvm
->mmu_lock
);
4918 if (!old
.user_alloc
&& old
.rmap
) {
4921 down_write(¤t
->mm
->mmap_sem
);
4922 ret
= do_munmap(current
->mm
, old
.userspace_addr
,
4923 old
.npages
* PAGE_SIZE
);
4924 up_write(¤t
->mm
->mmap_sem
);
4927 "kvm_vm_ioctl_set_memory_region: "
4928 "failed to munmap memory\n");
4933 spin_lock(&kvm
->mmu_lock
);
4934 if (!kvm
->arch
.n_requested_mmu_pages
) {
4935 unsigned int nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
4936 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
4939 kvm_mmu_slot_remove_write_access(kvm
, mem
->slot
);
4940 spin_unlock(&kvm
->mmu_lock
);
4945 void kvm_arch_flush_shadow(struct kvm
*kvm
)
4947 kvm_mmu_zap_all(kvm
);
4948 kvm_reload_remote_mmus(kvm
);
4951 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
4953 return vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
4954 || vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
4955 || vcpu
->arch
.nmi_pending
||
4956 (kvm_arch_interrupt_allowed(vcpu
) &&
4957 kvm_cpu_has_interrupt(vcpu
));
4960 void kvm_vcpu_kick(struct kvm_vcpu
*vcpu
)
4963 int cpu
= vcpu
->cpu
;
4965 if (waitqueue_active(&vcpu
->wq
)) {
4966 wake_up_interruptible(&vcpu
->wq
);
4967 ++vcpu
->stat
.halt_wakeup
;
4971 if (cpu
!= me
&& (unsigned)cpu
< nr_cpu_ids
&& cpu_online(cpu
))
4972 if (!test_and_set_bit(KVM_REQ_KICK
, &vcpu
->requests
))
4973 smp_send_reschedule(cpu
);
4977 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
4979 return kvm_x86_ops
->interrupt_allowed(vcpu
);
4982 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
4983 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
4984 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
4985 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
4986 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
4987 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);