2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
31 #include <linux/clocksource.h>
32 #include <linux/interrupt.h>
33 #include <linux/kvm.h>
35 #include <linux/vmalloc.h>
36 #include <linux/module.h>
37 #include <linux/mman.h>
38 #include <linux/highmem.h>
39 #include <linux/iommu.h>
40 #include <linux/intel-iommu.h>
41 #include <linux/cpufreq.h>
42 #include <linux/user-return-notifier.h>
43 #include <linux/srcu.h>
44 #include <linux/slab.h>
45 #include <linux/perf_event.h>
46 #include <linux/uaccess.h>
47 #include <linux/hash.h>
48 #include <linux/pci.h>
49 #include <linux/timekeeper_internal.h>
50 #include <linux/pvclock_gtod.h>
51 #include <trace/events/kvm.h>
53 #define CREATE_TRACE_POINTS
56 #include <asm/debugreg.h>
62 #include <asm/fpu-internal.h> /* Ugh! */
64 #include <asm/pvclock.h>
65 #include <asm/div64.h>
67 #define MAX_IO_MSRS 256
68 #define KVM_MAX_MCE_BANKS 32
69 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
71 #define emul_to_vcpu(ctxt) \
72 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
75 * - enable syscall per default because its emulated by KVM
76 * - enable LME and LMA per default on 64 bit KVM
80 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
82 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
85 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
86 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
88 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
89 static void process_nmi(struct kvm_vcpu
*vcpu
);
91 struct kvm_x86_ops
*kvm_x86_ops
;
92 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
94 static bool ignore_msrs
= 0;
95 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
97 unsigned int min_timer_period_us
= 500;
98 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
100 bool kvm_has_tsc_control
;
101 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
102 u32 kvm_max_guest_tsc_khz
;
103 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
105 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
106 static u32 tsc_tolerance_ppm
= 250;
107 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
109 #define KVM_NR_SHARED_MSRS 16
111 struct kvm_shared_msrs_global
{
113 u32 msrs
[KVM_NR_SHARED_MSRS
];
116 struct kvm_shared_msrs
{
117 struct user_return_notifier urn
;
119 struct kvm_shared_msr_values
{
122 } values
[KVM_NR_SHARED_MSRS
];
125 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
126 static struct kvm_shared_msrs __percpu
*shared_msrs
;
128 struct kvm_stats_debugfs_item debugfs_entries
[] = {
129 { "pf_fixed", VCPU_STAT(pf_fixed
) },
130 { "pf_guest", VCPU_STAT(pf_guest
) },
131 { "tlb_flush", VCPU_STAT(tlb_flush
) },
132 { "invlpg", VCPU_STAT(invlpg
) },
133 { "exits", VCPU_STAT(exits
) },
134 { "io_exits", VCPU_STAT(io_exits
) },
135 { "mmio_exits", VCPU_STAT(mmio_exits
) },
136 { "signal_exits", VCPU_STAT(signal_exits
) },
137 { "irq_window", VCPU_STAT(irq_window_exits
) },
138 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
139 { "halt_exits", VCPU_STAT(halt_exits
) },
140 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
141 { "hypercalls", VCPU_STAT(hypercalls
) },
142 { "request_irq", VCPU_STAT(request_irq_exits
) },
143 { "irq_exits", VCPU_STAT(irq_exits
) },
144 { "host_state_reload", VCPU_STAT(host_state_reload
) },
145 { "efer_reload", VCPU_STAT(efer_reload
) },
146 { "fpu_reload", VCPU_STAT(fpu_reload
) },
147 { "insn_emulation", VCPU_STAT(insn_emulation
) },
148 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
149 { "irq_injections", VCPU_STAT(irq_injections
) },
150 { "nmi_injections", VCPU_STAT(nmi_injections
) },
151 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
152 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
153 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
154 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
155 { "mmu_flooded", VM_STAT(mmu_flooded
) },
156 { "mmu_recycled", VM_STAT(mmu_recycled
) },
157 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
158 { "mmu_unsync", VM_STAT(mmu_unsync
) },
159 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
160 { "largepages", VM_STAT(lpages
) },
164 u64 __read_mostly host_xcr0
;
166 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
168 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
171 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
172 vcpu
->arch
.apf
.gfns
[i
] = ~0;
175 static void kvm_on_user_return(struct user_return_notifier
*urn
)
178 struct kvm_shared_msrs
*locals
179 = container_of(urn
, struct kvm_shared_msrs
, urn
);
180 struct kvm_shared_msr_values
*values
;
182 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
183 values
= &locals
->values
[slot
];
184 if (values
->host
!= values
->curr
) {
185 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
186 values
->curr
= values
->host
;
189 locals
->registered
= false;
190 user_return_notifier_unregister(urn
);
193 static void shared_msr_update(unsigned slot
, u32 msr
)
196 unsigned int cpu
= smp_processor_id();
197 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
199 /* only read, and nobody should modify it at this time,
200 * so don't need lock */
201 if (slot
>= shared_msrs_global
.nr
) {
202 printk(KERN_ERR
"kvm: invalid MSR slot!");
205 rdmsrl_safe(msr
, &value
);
206 smsr
->values
[slot
].host
= value
;
207 smsr
->values
[slot
].curr
= value
;
210 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
212 if (slot
>= shared_msrs_global
.nr
)
213 shared_msrs_global
.nr
= slot
+ 1;
214 shared_msrs_global
.msrs
[slot
] = msr
;
215 /* we need ensured the shared_msr_global have been updated */
218 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
220 static void kvm_shared_msr_cpu_online(void)
224 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
225 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
228 void kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
230 unsigned int cpu
= smp_processor_id();
231 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
233 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
235 smsr
->values
[slot
].curr
= value
;
236 wrmsrl(shared_msrs_global
.msrs
[slot
], value
);
237 if (!smsr
->registered
) {
238 smsr
->urn
.on_user_return
= kvm_on_user_return
;
239 user_return_notifier_register(&smsr
->urn
);
240 smsr
->registered
= true;
243 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
245 static void drop_user_return_notifiers(void *ignore
)
247 unsigned int cpu
= smp_processor_id();
248 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
250 if (smsr
->registered
)
251 kvm_on_user_return(&smsr
->urn
);
254 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
256 return vcpu
->arch
.apic_base
;
258 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
260 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
262 u64 old_state
= vcpu
->arch
.apic_base
&
263 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
264 u64 new_state
= msr_info
->data
&
265 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
266 u64 reserved_bits
= ((~0ULL) << cpuid_maxphyaddr(vcpu
)) |
267 0x2ff | (guest_cpuid_has_x2apic(vcpu
) ? 0 : X2APIC_ENABLE
);
269 if (!msr_info
->host_initiated
&&
270 ((msr_info
->data
& reserved_bits
) != 0 ||
271 new_state
== X2APIC_ENABLE
||
272 (new_state
== MSR_IA32_APICBASE_ENABLE
&&
273 old_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
)) ||
274 (new_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
) &&
278 kvm_lapic_set_base(vcpu
, msr_info
->data
);
281 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
283 asmlinkage
void kvm_spurious_fault(void)
285 /* Fault while not rebooting. We want the trace. */
288 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
290 #define EXCPT_BENIGN 0
291 #define EXCPT_CONTRIBUTORY 1
294 static int exception_class(int vector
)
304 return EXCPT_CONTRIBUTORY
;
311 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
312 unsigned nr
, bool has_error
, u32 error_code
,
318 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
320 if (!vcpu
->arch
.exception
.pending
) {
322 vcpu
->arch
.exception
.pending
= true;
323 vcpu
->arch
.exception
.has_error_code
= has_error
;
324 vcpu
->arch
.exception
.nr
= nr
;
325 vcpu
->arch
.exception
.error_code
= error_code
;
326 vcpu
->arch
.exception
.reinject
= reinject
;
330 /* to check exception */
331 prev_nr
= vcpu
->arch
.exception
.nr
;
332 if (prev_nr
== DF_VECTOR
) {
333 /* triple fault -> shutdown */
334 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
337 class1
= exception_class(prev_nr
);
338 class2
= exception_class(nr
);
339 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
340 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
341 /* generate double fault per SDM Table 5-5 */
342 vcpu
->arch
.exception
.pending
= true;
343 vcpu
->arch
.exception
.has_error_code
= true;
344 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
345 vcpu
->arch
.exception
.error_code
= 0;
347 /* replace previous exception with a new one in a hope
348 that instruction re-execution will regenerate lost
353 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
355 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
357 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
359 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
361 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
363 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
365 void kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
368 kvm_inject_gp(vcpu
, 0);
370 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
372 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
374 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
376 ++vcpu
->stat
.pf_guest
;
377 vcpu
->arch
.cr2
= fault
->address
;
378 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
380 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
382 void kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
384 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
385 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
387 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
390 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
392 atomic_inc(&vcpu
->arch
.nmi_queued
);
393 kvm_make_request(KVM_REQ_NMI
, vcpu
);
395 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
397 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
399 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
401 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
403 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
405 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
407 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
410 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
411 * a #GP and return false.
413 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
415 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
417 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
420 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
423 * This function will be used to read from the physical memory of the currently
424 * running guest. The difference to kvm_read_guest_page is that this function
425 * can read from guest physical or from the guest's guest physical memory.
427 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
428 gfn_t ngfn
, void *data
, int offset
, int len
,
434 ngpa
= gfn_to_gpa(ngfn
);
435 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
);
436 if (real_gfn
== UNMAPPED_GVA
)
439 real_gfn
= gpa_to_gfn(real_gfn
);
441 return kvm_read_guest_page(vcpu
->kvm
, real_gfn
, data
, offset
, len
);
443 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
445 int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
446 void *data
, int offset
, int len
, u32 access
)
448 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
449 data
, offset
, len
, access
);
453 * Load the pae pdptrs. Return true is they are all valid.
455 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
457 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
458 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
461 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
463 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
464 offset
* sizeof(u64
), sizeof(pdpte
),
465 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
470 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
471 if (is_present_gpte(pdpte
[i
]) &&
472 (pdpte
[i
] & vcpu
->arch
.mmu
.rsvd_bits_mask
[0][2])) {
479 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
480 __set_bit(VCPU_EXREG_PDPTR
,
481 (unsigned long *)&vcpu
->arch
.regs_avail
);
482 __set_bit(VCPU_EXREG_PDPTR
,
483 (unsigned long *)&vcpu
->arch
.regs_dirty
);
488 EXPORT_SYMBOL_GPL(load_pdptrs
);
490 static bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
492 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
498 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
501 if (!test_bit(VCPU_EXREG_PDPTR
,
502 (unsigned long *)&vcpu
->arch
.regs_avail
))
505 gfn
= (kvm_read_cr3(vcpu
) & ~31u) >> PAGE_SHIFT
;
506 offset
= (kvm_read_cr3(vcpu
) & ~31u) & (PAGE_SIZE
- 1);
507 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
508 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
511 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
517 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
519 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
520 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
|
521 X86_CR0_CD
| X86_CR0_NW
;
526 if (cr0
& 0xffffffff00000000UL
)
530 cr0
&= ~CR0_RESERVED_BITS
;
532 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
535 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
538 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
540 if ((vcpu
->arch
.efer
& EFER_LME
)) {
545 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
550 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
555 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
558 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
560 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
561 kvm_clear_async_pf_completion_queue(vcpu
);
562 kvm_async_pf_hash_reset(vcpu
);
565 if ((cr0
^ old_cr0
) & update_bits
)
566 kvm_mmu_reset_context(vcpu
);
569 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
571 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
573 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
575 EXPORT_SYMBOL_GPL(kvm_lmsw
);
577 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
579 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
580 !vcpu
->guest_xcr0_loaded
) {
581 /* kvm_set_xcr() also depends on this */
582 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
583 vcpu
->guest_xcr0_loaded
= 1;
587 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
589 if (vcpu
->guest_xcr0_loaded
) {
590 if (vcpu
->arch
.xcr0
!= host_xcr0
)
591 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
592 vcpu
->guest_xcr0_loaded
= 0;
596 int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
601 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
602 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
605 if (!(xcr0
& XSTATE_FP
))
607 if ((xcr0
& XSTATE_YMM
) && !(xcr0
& XSTATE_SSE
))
611 * Do not allow the guest to set bits that we do not support
612 * saving. However, xcr0 bit 0 is always set, even if the
613 * emulated CPU does not support XSAVE (see fx_init).
615 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XSTATE_FP
;
616 if (xcr0
& ~valid_bits
)
619 kvm_put_guest_xcr0(vcpu
);
620 vcpu
->arch
.xcr0
= xcr0
;
624 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
626 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 ||
627 __kvm_set_xcr(vcpu
, index
, xcr
)) {
628 kvm_inject_gp(vcpu
, 0);
633 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
635 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
637 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
638 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
|
639 X86_CR4_PAE
| X86_CR4_SMEP
;
640 if (cr4
& CR4_RESERVED_BITS
)
643 if (!guest_cpuid_has_xsave(vcpu
) && (cr4
& X86_CR4_OSXSAVE
))
646 if (!guest_cpuid_has_smep(vcpu
) && (cr4
& X86_CR4_SMEP
))
649 if (!guest_cpuid_has_fsgsbase(vcpu
) && (cr4
& X86_CR4_FSGSBASE
))
652 if (is_long_mode(vcpu
)) {
653 if (!(cr4
& X86_CR4_PAE
))
655 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
656 && ((cr4
^ old_cr4
) & pdptr_bits
)
657 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
661 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
662 if (!guest_cpuid_has_pcid(vcpu
))
665 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
666 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
670 if (kvm_x86_ops
->set_cr4(vcpu
, cr4
))
673 if (((cr4
^ old_cr4
) & pdptr_bits
) ||
674 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
675 kvm_mmu_reset_context(vcpu
);
677 if ((cr4
^ old_cr4
) & X86_CR4_OSXSAVE
)
678 kvm_update_cpuid(vcpu
);
682 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
684 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
686 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
687 kvm_mmu_sync_roots(vcpu
);
688 kvm_mmu_flush_tlb(vcpu
);
692 if (is_long_mode(vcpu
)) {
693 if (kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
)) {
694 if (cr3
& CR3_PCID_ENABLED_RESERVED_BITS
)
697 if (cr3
& CR3_L_MODE_RESERVED_BITS
)
701 if (cr3
& CR3_PAE_RESERVED_BITS
)
703 if (is_paging(vcpu
) &&
704 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
708 * We don't check reserved bits in nonpae mode, because
709 * this isn't enforced, and VMware depends on this.
713 vcpu
->arch
.cr3
= cr3
;
714 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
715 kvm_mmu_new_cr3(vcpu
);
718 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
720 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
722 if (cr8
& CR8_RESERVED_BITS
)
724 if (irqchip_in_kernel(vcpu
->kvm
))
725 kvm_lapic_set_tpr(vcpu
, cr8
);
727 vcpu
->arch
.cr8
= cr8
;
730 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
732 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
734 if (irqchip_in_kernel(vcpu
->kvm
))
735 return kvm_lapic_get_cr8(vcpu
);
737 return vcpu
->arch
.cr8
;
739 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
741 static void kvm_update_dr6(struct kvm_vcpu
*vcpu
)
743 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
744 kvm_x86_ops
->set_dr6(vcpu
, vcpu
->arch
.dr6
);
747 static void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
751 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
752 dr7
= vcpu
->arch
.guest_debug_dr7
;
754 dr7
= vcpu
->arch
.dr7
;
755 kvm_x86_ops
->set_dr7(vcpu
, dr7
);
756 vcpu
->arch
.switch_db_regs
= (dr7
& DR7_BP_EN_MASK
);
759 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
763 vcpu
->arch
.db
[dr
] = val
;
764 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
765 vcpu
->arch
.eff_db
[dr
] = val
;
768 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
772 if (val
& 0xffffffff00000000ULL
)
774 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | DR6_FIXED_1
;
775 kvm_update_dr6(vcpu
);
778 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
782 if (val
& 0xffffffff00000000ULL
)
784 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
785 kvm_update_dr7(vcpu
);
792 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
796 res
= __kvm_set_dr(vcpu
, dr
, val
);
798 kvm_queue_exception(vcpu
, UD_VECTOR
);
800 kvm_inject_gp(vcpu
, 0);
804 EXPORT_SYMBOL_GPL(kvm_set_dr
);
806 static int _kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
810 *val
= vcpu
->arch
.db
[dr
];
813 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
817 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
818 *val
= vcpu
->arch
.dr6
;
820 *val
= kvm_x86_ops
->get_dr6(vcpu
);
823 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
827 *val
= vcpu
->arch
.dr7
;
834 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
836 if (_kvm_get_dr(vcpu
, dr
, val
)) {
837 kvm_queue_exception(vcpu
, UD_VECTOR
);
842 EXPORT_SYMBOL_GPL(kvm_get_dr
);
844 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
846 u32 ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
850 err
= kvm_pmu_read_pmc(vcpu
, ecx
, &data
);
853 kvm_register_write(vcpu
, VCPU_REGS_RAX
, (u32
)data
);
854 kvm_register_write(vcpu
, VCPU_REGS_RDX
, data
>> 32);
857 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
860 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
861 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
863 * This list is modified at module load time to reflect the
864 * capabilities of the host cpu. This capabilities test skips MSRs that are
865 * kvm-specific. Those are put in the beginning of the list.
868 #define KVM_SAVE_MSRS_BEGIN 12
869 static u32 msrs_to_save
[] = {
870 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
871 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
872 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
873 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
874 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
876 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
879 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
881 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
882 MSR_IA32_FEATURE_CONTROL
885 static unsigned num_msrs_to_save
;
887 static const u32 emulated_msrs
[] = {
889 MSR_IA32_TSCDEADLINE
,
890 MSR_IA32_MISC_ENABLE
,
895 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
897 if (efer
& efer_reserved_bits
)
900 if (efer
& EFER_FFXSR
) {
901 struct kvm_cpuid_entry2
*feat
;
903 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
904 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
)))
908 if (efer
& EFER_SVME
) {
909 struct kvm_cpuid_entry2
*feat
;
911 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
912 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
)))
918 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
920 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
922 u64 old_efer
= vcpu
->arch
.efer
;
924 if (!kvm_valid_efer(vcpu
, efer
))
928 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
932 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
934 kvm_x86_ops
->set_efer(vcpu
, efer
);
936 /* Update reserved bits */
937 if ((efer
^ old_efer
) & EFER_NX
)
938 kvm_mmu_reset_context(vcpu
);
943 void kvm_enable_efer_bits(u64 mask
)
945 efer_reserved_bits
&= ~mask
;
947 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
951 * Writes msr value into into the appropriate "register".
952 * Returns 0 on success, non-0 otherwise.
953 * Assumes vcpu_load() was already called.
955 int kvm_set_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
957 return kvm_x86_ops
->set_msr(vcpu
, msr
);
961 * Adapt set_msr() to msr_io()'s calling convention
963 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
969 msr
.host_initiated
= true;
970 return kvm_set_msr(vcpu
, &msr
);
974 struct pvclock_gtod_data
{
977 struct { /* extract of a clocksource struct */
985 /* open coded 'struct timespec' */
986 u64 monotonic_time_snsec
;
987 time_t monotonic_time_sec
;
990 static struct pvclock_gtod_data pvclock_gtod_data
;
992 static void update_pvclock_gtod(struct timekeeper
*tk
)
994 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
996 write_seqcount_begin(&vdata
->seq
);
998 /* copy pvclock gtod data */
999 vdata
->clock
.vclock_mode
= tk
->clock
->archdata
.vclock_mode
;
1000 vdata
->clock
.cycle_last
= tk
->clock
->cycle_last
;
1001 vdata
->clock
.mask
= tk
->clock
->mask
;
1002 vdata
->clock
.mult
= tk
->mult
;
1003 vdata
->clock
.shift
= tk
->shift
;
1005 vdata
->monotonic_time_sec
= tk
->xtime_sec
1006 + tk
->wall_to_monotonic
.tv_sec
;
1007 vdata
->monotonic_time_snsec
= tk
->xtime_nsec
1008 + (tk
->wall_to_monotonic
.tv_nsec
1010 while (vdata
->monotonic_time_snsec
>=
1011 (((u64
)NSEC_PER_SEC
) << tk
->shift
)) {
1012 vdata
->monotonic_time_snsec
-=
1013 ((u64
)NSEC_PER_SEC
) << tk
->shift
;
1014 vdata
->monotonic_time_sec
++;
1017 write_seqcount_end(&vdata
->seq
);
1022 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
1026 struct pvclock_wall_clock wc
;
1027 struct timespec boot
;
1032 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1037 ++version
; /* first time write, random junk */
1041 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1044 * The guest calculates current wall clock time by adding
1045 * system time (updated by kvm_guest_time_update below) to the
1046 * wall clock specified here. guest system time equals host
1047 * system time for us, thus we must fill in host boot time here.
1051 if (kvm
->arch
.kvmclock_offset
) {
1052 struct timespec ts
= ns_to_timespec(kvm
->arch
.kvmclock_offset
);
1053 boot
= timespec_sub(boot
, ts
);
1055 wc
.sec
= boot
.tv_sec
;
1056 wc
.nsec
= boot
.tv_nsec
;
1057 wc
.version
= version
;
1059 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
1062 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1065 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
1067 uint32_t quotient
, remainder
;
1069 /* Don't try to replace with do_div(), this one calculates
1070 * "(dividend << 32) / divisor" */
1072 : "=a" (quotient
), "=d" (remainder
)
1073 : "0" (0), "1" (dividend
), "r" (divisor
) );
1077 static void kvm_get_time_scale(uint32_t scaled_khz
, uint32_t base_khz
,
1078 s8
*pshift
, u32
*pmultiplier
)
1085 tps64
= base_khz
* 1000LL;
1086 scaled64
= scaled_khz
* 1000LL;
1087 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
1092 tps32
= (uint32_t)tps64
;
1093 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
1094 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
1102 *pmultiplier
= div_frac(scaled64
, tps32
);
1104 pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1105 __func__
, base_khz
, scaled_khz
, shift
, *pmultiplier
);
1108 static inline u64
get_kernel_ns(void)
1112 WARN_ON(preemptible());
1114 monotonic_to_bootbased(&ts
);
1115 return timespec_to_ns(&ts
);
1118 #ifdef CONFIG_X86_64
1119 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
1122 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
1123 unsigned long max_tsc_khz
;
1125 static inline u64
nsec_to_cycles(struct kvm_vcpu
*vcpu
, u64 nsec
)
1127 return pvclock_scale_delta(nsec
, vcpu
->arch
.virtual_tsc_mult
,
1128 vcpu
->arch
.virtual_tsc_shift
);
1131 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
1133 u64 v
= (u64
)khz
* (1000000 + ppm
);
1138 static void kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 this_tsc_khz
)
1140 u32 thresh_lo
, thresh_hi
;
1141 int use_scaling
= 0;
1143 /* tsc_khz can be zero if TSC calibration fails */
1144 if (this_tsc_khz
== 0)
1147 /* Compute a scale to convert nanoseconds in TSC cycles */
1148 kvm_get_time_scale(this_tsc_khz
, NSEC_PER_SEC
/ 1000,
1149 &vcpu
->arch
.virtual_tsc_shift
,
1150 &vcpu
->arch
.virtual_tsc_mult
);
1151 vcpu
->arch
.virtual_tsc_khz
= this_tsc_khz
;
1154 * Compute the variation in TSC rate which is acceptable
1155 * within the range of tolerance and decide if the
1156 * rate being applied is within that bounds of the hardware
1157 * rate. If so, no scaling or compensation need be done.
1159 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
1160 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
1161 if (this_tsc_khz
< thresh_lo
|| this_tsc_khz
> thresh_hi
) {
1162 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz
, thresh_lo
, thresh_hi
);
1165 kvm_x86_ops
->set_tsc_khz(vcpu
, this_tsc_khz
, use_scaling
);
1168 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1170 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
1171 vcpu
->arch
.virtual_tsc_mult
,
1172 vcpu
->arch
.virtual_tsc_shift
);
1173 tsc
+= vcpu
->arch
.this_tsc_write
;
1177 void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
1179 #ifdef CONFIG_X86_64
1181 bool do_request
= false;
1182 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
1183 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1185 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1186 atomic_read(&vcpu
->kvm
->online_vcpus
));
1188 if (vcpus_matched
&& gtod
->clock
.vclock_mode
== VCLOCK_TSC
)
1189 if (!ka
->use_master_clock
)
1192 if (!vcpus_matched
&& ka
->use_master_clock
)
1196 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
1198 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
1199 atomic_read(&vcpu
->kvm
->online_vcpus
),
1200 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
1204 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu
*vcpu
, s64 offset
)
1206 u64 curr_offset
= kvm_x86_ops
->read_tsc_offset(vcpu
);
1207 vcpu
->arch
.ia32_tsc_adjust_msr
+= offset
- curr_offset
;
1210 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1212 struct kvm
*kvm
= vcpu
->kvm
;
1213 u64 offset
, ns
, elapsed
;
1214 unsigned long flags
;
1217 u64 data
= msr
->data
;
1219 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1220 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
, data
);
1221 ns
= get_kernel_ns();
1222 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1224 if (vcpu
->arch
.virtual_tsc_khz
) {
1227 /* n.b - signed multiplication and division required */
1228 usdiff
= data
- kvm
->arch
.last_tsc_write
;
1229 #ifdef CONFIG_X86_64
1230 usdiff
= (usdiff
* 1000) / vcpu
->arch
.virtual_tsc_khz
;
1232 /* do_div() only does unsigned */
1233 asm("1: idivl %[divisor]\n"
1234 "2: xor %%edx, %%edx\n"
1235 " movl $0, %[faulted]\n"
1237 ".section .fixup,\"ax\"\n"
1238 "4: movl $1, %[faulted]\n"
1242 _ASM_EXTABLE(1b
, 4b
)
1244 : "=A"(usdiff
), [faulted
] "=r" (faulted
)
1245 : "A"(usdiff
* 1000), [divisor
] "rm"(vcpu
->arch
.virtual_tsc_khz
));
1248 do_div(elapsed
, 1000);
1253 /* idivl overflow => difference is larger than USEC_PER_SEC */
1255 usdiff
= USEC_PER_SEC
;
1257 usdiff
= USEC_PER_SEC
; /* disable TSC match window below */
1260 * Special case: TSC write with a small delta (1 second) of virtual
1261 * cycle time against real time is interpreted as an attempt to
1262 * synchronize the CPU.
1264 * For a reliable TSC, we can match TSC offsets, and for an unstable
1265 * TSC, we add elapsed time in this computation. We could let the
1266 * compensation code attempt to catch up if we fall behind, but
1267 * it's better to try to match offsets from the beginning.
1269 if (usdiff
< USEC_PER_SEC
&&
1270 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
1271 if (!check_tsc_unstable()) {
1272 offset
= kvm
->arch
.cur_tsc_offset
;
1273 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1275 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
1277 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
, data
);
1278 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1283 * We split periods of matched TSC writes into generations.
1284 * For each generation, we track the original measured
1285 * nanosecond time, offset, and write, so if TSCs are in
1286 * sync, we can match exact offset, and if not, we can match
1287 * exact software computation in compute_guest_tsc()
1289 * These values are tracked in kvm->arch.cur_xxx variables.
1291 kvm
->arch
.cur_tsc_generation
++;
1292 kvm
->arch
.cur_tsc_nsec
= ns
;
1293 kvm
->arch
.cur_tsc_write
= data
;
1294 kvm
->arch
.cur_tsc_offset
= offset
;
1296 pr_debug("kvm: new tsc generation %u, clock %llu\n",
1297 kvm
->arch
.cur_tsc_generation
, data
);
1301 * We also track th most recent recorded KHZ, write and time to
1302 * allow the matching interval to be extended at each write.
1304 kvm
->arch
.last_tsc_nsec
= ns
;
1305 kvm
->arch
.last_tsc_write
= data
;
1306 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
1308 vcpu
->arch
.last_guest_tsc
= data
;
1310 /* Keep track of which generation this VCPU has synchronized to */
1311 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
1312 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
1313 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
1315 if (guest_cpuid_has_tsc_adjust(vcpu
) && !msr
->host_initiated
)
1316 update_ia32_tsc_adjust_msr(vcpu
, offset
);
1317 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1318 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1320 spin_lock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1322 kvm
->arch
.nr_vcpus_matched_tsc
++;
1324 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
1326 kvm_track_tsc_matching(vcpu
);
1327 spin_unlock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1330 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1332 #ifdef CONFIG_X86_64
1334 static cycle_t
read_tsc(void)
1340 * Empirically, a fence (of type that depends on the CPU)
1341 * before rdtsc is enough to ensure that rdtsc is ordered
1342 * with respect to loads. The various CPU manuals are unclear
1343 * as to whether rdtsc can be reordered with later loads,
1344 * but no one has ever seen it happen.
1347 ret
= (cycle_t
)vget_cycles();
1349 last
= pvclock_gtod_data
.clock
.cycle_last
;
1351 if (likely(ret
>= last
))
1355 * GCC likes to generate cmov here, but this branch is extremely
1356 * predictable (it's just a funciton of time and the likely is
1357 * very likely) and there's a data dependence, so force GCC
1358 * to generate a branch instead. I don't barrier() because
1359 * we don't actually need a barrier, and if this function
1360 * ever gets inlined it will generate worse code.
1366 static inline u64
vgettsc(cycle_t
*cycle_now
)
1369 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1371 *cycle_now
= read_tsc();
1373 v
= (*cycle_now
- gtod
->clock
.cycle_last
) & gtod
->clock
.mask
;
1374 return v
* gtod
->clock
.mult
;
1377 static int do_monotonic(struct timespec
*ts
, cycle_t
*cycle_now
)
1382 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1386 seq
= read_seqcount_begin(>od
->seq
);
1387 mode
= gtod
->clock
.vclock_mode
;
1388 ts
->tv_sec
= gtod
->monotonic_time_sec
;
1389 ns
= gtod
->monotonic_time_snsec
;
1390 ns
+= vgettsc(cycle_now
);
1391 ns
>>= gtod
->clock
.shift
;
1392 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1393 timespec_add_ns(ts
, ns
);
1398 /* returns true if host is using tsc clocksource */
1399 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, cycle_t
*cycle_now
)
1403 /* checked again under seqlock below */
1404 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1407 if (do_monotonic(&ts
, cycle_now
) != VCLOCK_TSC
)
1410 monotonic_to_bootbased(&ts
);
1411 *kernel_ns
= timespec_to_ns(&ts
);
1419 * Assuming a stable TSC across physical CPUS, and a stable TSC
1420 * across virtual CPUs, the following condition is possible.
1421 * Each numbered line represents an event visible to both
1422 * CPUs at the next numbered event.
1424 * "timespecX" represents host monotonic time. "tscX" represents
1427 * VCPU0 on CPU0 | VCPU1 on CPU1
1429 * 1. read timespec0,tsc0
1430 * 2. | timespec1 = timespec0 + N
1432 * 3. transition to guest | transition to guest
1433 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1434 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1435 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1437 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1440 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1442 * - 0 < N - M => M < N
1444 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1445 * always the case (the difference between two distinct xtime instances
1446 * might be smaller then the difference between corresponding TSC reads,
1447 * when updating guest vcpus pvclock areas).
1449 * To avoid that problem, do not allow visibility of distinct
1450 * system_timestamp/tsc_timestamp values simultaneously: use a master
1451 * copy of host monotonic time values. Update that master copy
1454 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1458 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
1460 #ifdef CONFIG_X86_64
1461 struct kvm_arch
*ka
= &kvm
->arch
;
1463 bool host_tsc_clocksource
, vcpus_matched
;
1465 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1466 atomic_read(&kvm
->online_vcpus
));
1469 * If the host uses TSC clock, then passthrough TSC as stable
1472 host_tsc_clocksource
= kvm_get_time_and_clockread(
1473 &ka
->master_kernel_ns
,
1474 &ka
->master_cycle_now
);
1476 ka
->use_master_clock
= host_tsc_clocksource
& vcpus_matched
;
1478 if (ka
->use_master_clock
)
1479 atomic_set(&kvm_guest_has_master_clock
, 1);
1481 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
1482 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
1487 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
1489 #ifdef CONFIG_X86_64
1491 struct kvm_vcpu
*vcpu
;
1492 struct kvm_arch
*ka
= &kvm
->arch
;
1494 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1495 kvm_make_mclock_inprogress_request(kvm
);
1496 /* no guest entries from this point */
1497 pvclock_update_vm_gtod_copy(kvm
);
1499 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1500 set_bit(KVM_REQ_CLOCK_UPDATE
, &vcpu
->requests
);
1502 /* guest entries allowed */
1503 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1504 clear_bit(KVM_REQ_MCLOCK_INPROGRESS
, &vcpu
->requests
);
1506 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1510 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1512 unsigned long flags
, this_tsc_khz
;
1513 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1514 struct kvm_arch
*ka
= &v
->kvm
->arch
;
1516 u64 tsc_timestamp
, host_tsc
;
1517 struct pvclock_vcpu_time_info guest_hv_clock
;
1519 bool use_master_clock
;
1525 * If the host uses TSC clock, then passthrough TSC as stable
1528 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1529 use_master_clock
= ka
->use_master_clock
;
1530 if (use_master_clock
) {
1531 host_tsc
= ka
->master_cycle_now
;
1532 kernel_ns
= ka
->master_kernel_ns
;
1534 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1536 /* Keep irq disabled to prevent changes to the clock */
1537 local_irq_save(flags
);
1538 this_tsc_khz
= __get_cpu_var(cpu_tsc_khz
);
1539 if (unlikely(this_tsc_khz
== 0)) {
1540 local_irq_restore(flags
);
1541 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1544 if (!use_master_clock
) {
1545 host_tsc
= native_read_tsc();
1546 kernel_ns
= get_kernel_ns();
1549 tsc_timestamp
= kvm_x86_ops
->read_l1_tsc(v
, host_tsc
);
1552 * We may have to catch up the TSC to match elapsed wall clock
1553 * time for two reasons, even if kvmclock is used.
1554 * 1) CPU could have been running below the maximum TSC rate
1555 * 2) Broken TSC compensation resets the base at each VCPU
1556 * entry to avoid unknown leaps of TSC even when running
1557 * again on the same CPU. This may cause apparent elapsed
1558 * time to disappear, and the guest to stand still or run
1561 if (vcpu
->tsc_catchup
) {
1562 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1563 if (tsc
> tsc_timestamp
) {
1564 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
1565 tsc_timestamp
= tsc
;
1569 local_irq_restore(flags
);
1571 if (!vcpu
->pv_time_enabled
)
1574 if (unlikely(vcpu
->hw_tsc_khz
!= this_tsc_khz
)) {
1575 kvm_get_time_scale(NSEC_PER_SEC
/ 1000, this_tsc_khz
,
1576 &vcpu
->hv_clock
.tsc_shift
,
1577 &vcpu
->hv_clock
.tsc_to_system_mul
);
1578 vcpu
->hw_tsc_khz
= this_tsc_khz
;
1581 /* With all the info we got, fill in the values */
1582 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
1583 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
1584 vcpu
->last_kernel_ns
= kernel_ns
;
1585 vcpu
->last_guest_tsc
= tsc_timestamp
;
1588 * The interface expects us to write an even number signaling that the
1589 * update is finished. Since the guest won't see the intermediate
1590 * state, we just increase by 2 at the end.
1592 vcpu
->hv_clock
.version
+= 2;
1594 if (unlikely(kvm_read_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1595 &guest_hv_clock
, sizeof(guest_hv_clock
))))
1598 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1599 pvclock_flags
= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
1601 if (vcpu
->pvclock_set_guest_stopped_request
) {
1602 pvclock_flags
|= PVCLOCK_GUEST_STOPPED
;
1603 vcpu
->pvclock_set_guest_stopped_request
= false;
1606 /* If the host uses TSC clocksource, then it is stable */
1607 if (use_master_clock
)
1608 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
1610 vcpu
->hv_clock
.flags
= pvclock_flags
;
1612 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1614 sizeof(vcpu
->hv_clock
));
1619 * kvmclock updates which are isolated to a given vcpu, such as
1620 * vcpu->cpu migration, should not allow system_timestamp from
1621 * the rest of the vcpus to remain static. Otherwise ntp frequency
1622 * correction applies to one vcpu's system_timestamp but not
1625 * So in those cases, request a kvmclock update for all vcpus.
1626 * The worst case for a remote vcpu to update its kvmclock
1627 * is then bounded by maximum nohz sleep latency.
1630 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
1633 struct kvm
*kvm
= v
->kvm
;
1634 struct kvm_vcpu
*vcpu
;
1636 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
1637 set_bit(KVM_REQ_CLOCK_UPDATE
, &vcpu
->requests
);
1638 kvm_vcpu_kick(vcpu
);
1642 static bool msr_mtrr_valid(unsigned msr
)
1645 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR
- 1:
1646 case MSR_MTRRfix64K_00000
:
1647 case MSR_MTRRfix16K_80000
:
1648 case MSR_MTRRfix16K_A0000
:
1649 case MSR_MTRRfix4K_C0000
:
1650 case MSR_MTRRfix4K_C8000
:
1651 case MSR_MTRRfix4K_D0000
:
1652 case MSR_MTRRfix4K_D8000
:
1653 case MSR_MTRRfix4K_E0000
:
1654 case MSR_MTRRfix4K_E8000
:
1655 case MSR_MTRRfix4K_F0000
:
1656 case MSR_MTRRfix4K_F8000
:
1657 case MSR_MTRRdefType
:
1658 case MSR_IA32_CR_PAT
:
1666 static bool valid_pat_type(unsigned t
)
1668 return t
< 8 && (1 << t
) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1671 static bool valid_mtrr_type(unsigned t
)
1673 return t
< 8 && (1 << t
) & 0x73; /* 0, 1, 4, 5, 6 */
1676 static bool mtrr_valid(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1680 if (!msr_mtrr_valid(msr
))
1683 if (msr
== MSR_IA32_CR_PAT
) {
1684 for (i
= 0; i
< 8; i
++)
1685 if (!valid_pat_type((data
>> (i
* 8)) & 0xff))
1688 } else if (msr
== MSR_MTRRdefType
) {
1691 return valid_mtrr_type(data
& 0xff);
1692 } else if (msr
>= MSR_MTRRfix64K_00000
&& msr
<= MSR_MTRRfix4K_F8000
) {
1693 for (i
= 0; i
< 8 ; i
++)
1694 if (!valid_mtrr_type((data
>> (i
* 8)) & 0xff))
1699 /* variable MTRRs */
1700 return valid_mtrr_type(data
& 0xff);
1703 static int set_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1705 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
1707 if (!mtrr_valid(vcpu
, msr
, data
))
1710 if (msr
== MSR_MTRRdefType
) {
1711 vcpu
->arch
.mtrr_state
.def_type
= data
;
1712 vcpu
->arch
.mtrr_state
.enabled
= (data
& 0xc00) >> 10;
1713 } else if (msr
== MSR_MTRRfix64K_00000
)
1715 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
1716 p
[1 + msr
- MSR_MTRRfix16K_80000
] = data
;
1717 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
1718 p
[3 + msr
- MSR_MTRRfix4K_C0000
] = data
;
1719 else if (msr
== MSR_IA32_CR_PAT
)
1720 vcpu
->arch
.pat
= data
;
1721 else { /* Variable MTRRs */
1722 int idx
, is_mtrr_mask
;
1725 idx
= (msr
- 0x200) / 2;
1726 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
1729 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
1732 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
1736 kvm_mmu_reset_context(vcpu
);
1740 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1742 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1743 unsigned bank_num
= mcg_cap
& 0xff;
1746 case MSR_IA32_MCG_STATUS
:
1747 vcpu
->arch
.mcg_status
= data
;
1749 case MSR_IA32_MCG_CTL
:
1750 if (!(mcg_cap
& MCG_CTL_P
))
1752 if (data
!= 0 && data
!= ~(u64
)0)
1754 vcpu
->arch
.mcg_ctl
= data
;
1757 if (msr
>= MSR_IA32_MC0_CTL
&&
1758 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
1759 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1760 /* only 0 or all 1s can be written to IA32_MCi_CTL
1761 * some Linux kernels though clear bit 10 in bank 4 to
1762 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1763 * this to avoid an uncatched #GP in the guest
1765 if ((offset
& 0x3) == 0 &&
1766 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
1768 vcpu
->arch
.mce_banks
[offset
] = data
;
1776 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
1778 struct kvm
*kvm
= vcpu
->kvm
;
1779 int lm
= is_long_mode(vcpu
);
1780 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
1781 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
1782 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
1783 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
1784 u32 page_num
= data
& ~PAGE_MASK
;
1785 u64 page_addr
= data
& PAGE_MASK
;
1790 if (page_num
>= blob_size
)
1793 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
1798 if (kvm_write_guest(kvm
, page_addr
, page
, PAGE_SIZE
))
1807 static bool kvm_hv_hypercall_enabled(struct kvm
*kvm
)
1809 return kvm
->arch
.hv_hypercall
& HV_X64_MSR_HYPERCALL_ENABLE
;
1812 static bool kvm_hv_msr_partition_wide(u32 msr
)
1816 case HV_X64_MSR_GUEST_OS_ID
:
1817 case HV_X64_MSR_HYPERCALL
:
1818 case HV_X64_MSR_REFERENCE_TSC
:
1819 case HV_X64_MSR_TIME_REF_COUNT
:
1827 static int set_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1829 struct kvm
*kvm
= vcpu
->kvm
;
1832 case HV_X64_MSR_GUEST_OS_ID
:
1833 kvm
->arch
.hv_guest_os_id
= data
;
1834 /* setting guest os id to zero disables hypercall page */
1835 if (!kvm
->arch
.hv_guest_os_id
)
1836 kvm
->arch
.hv_hypercall
&= ~HV_X64_MSR_HYPERCALL_ENABLE
;
1838 case HV_X64_MSR_HYPERCALL
: {
1843 /* if guest os id is not set hypercall should remain disabled */
1844 if (!kvm
->arch
.hv_guest_os_id
)
1846 if (!(data
& HV_X64_MSR_HYPERCALL_ENABLE
)) {
1847 kvm
->arch
.hv_hypercall
= data
;
1850 gfn
= data
>> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT
;
1851 addr
= gfn_to_hva(kvm
, gfn
);
1852 if (kvm_is_error_hva(addr
))
1854 kvm_x86_ops
->patch_hypercall(vcpu
, instructions
);
1855 ((unsigned char *)instructions
)[3] = 0xc3; /* ret */
1856 if (__copy_to_user((void __user
*)addr
, instructions
, 4))
1858 kvm
->arch
.hv_hypercall
= data
;
1859 mark_page_dirty(kvm
, gfn
);
1862 case HV_X64_MSR_REFERENCE_TSC
: {
1864 HV_REFERENCE_TSC_PAGE tsc_ref
;
1865 memset(&tsc_ref
, 0, sizeof(tsc_ref
));
1866 kvm
->arch
.hv_tsc_page
= data
;
1867 if (!(data
& HV_X64_MSR_TSC_REFERENCE_ENABLE
))
1869 gfn
= data
>> HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT
;
1870 if (kvm_write_guest(kvm
, data
,
1871 &tsc_ref
, sizeof(tsc_ref
)))
1873 mark_page_dirty(kvm
, gfn
);
1877 vcpu_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1878 "data 0x%llx\n", msr
, data
);
1884 static int set_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1887 case HV_X64_MSR_APIC_ASSIST_PAGE
: {
1891 if (!(data
& HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE
)) {
1892 vcpu
->arch
.hv_vapic
= data
;
1895 gfn
= data
>> HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT
;
1896 addr
= gfn_to_hva(vcpu
->kvm
, gfn
);
1897 if (kvm_is_error_hva(addr
))
1899 if (__clear_user((void __user
*)addr
, PAGE_SIZE
))
1901 vcpu
->arch
.hv_vapic
= data
;
1902 mark_page_dirty(vcpu
->kvm
, gfn
);
1905 case HV_X64_MSR_EOI
:
1906 return kvm_hv_vapic_msr_write(vcpu
, APIC_EOI
, data
);
1907 case HV_X64_MSR_ICR
:
1908 return kvm_hv_vapic_msr_write(vcpu
, APIC_ICR
, data
);
1909 case HV_X64_MSR_TPR
:
1910 return kvm_hv_vapic_msr_write(vcpu
, APIC_TASKPRI
, data
);
1912 vcpu_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1913 "data 0x%llx\n", msr
, data
);
1920 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
1922 gpa_t gpa
= data
& ~0x3f;
1924 /* Bits 2:5 are reserved, Should be zero */
1928 vcpu
->arch
.apf
.msr_val
= data
;
1930 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
1931 kvm_clear_async_pf_completion_queue(vcpu
);
1932 kvm_async_pf_hash_reset(vcpu
);
1936 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
1940 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
1941 kvm_async_pf_wakeup_all(vcpu
);
1945 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
1947 vcpu
->arch
.pv_time_enabled
= false;
1950 static void accumulate_steal_time(struct kvm_vcpu
*vcpu
)
1954 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
1957 delta
= current
->sched_info
.run_delay
- vcpu
->arch
.st
.last_steal
;
1958 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
1959 vcpu
->arch
.st
.accum_steal
= delta
;
1962 static void record_steal_time(struct kvm_vcpu
*vcpu
)
1964 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
1967 if (unlikely(kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
1968 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
))))
1971 vcpu
->arch
.st
.steal
.steal
+= vcpu
->arch
.st
.accum_steal
;
1972 vcpu
->arch
.st
.steal
.version
+= 2;
1973 vcpu
->arch
.st
.accum_steal
= 0;
1975 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
1976 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
1979 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
1982 u32 msr
= msr_info
->index
;
1983 u64 data
= msr_info
->data
;
1986 case MSR_AMD64_NB_CFG
:
1987 case MSR_IA32_UCODE_REV
:
1988 case MSR_IA32_UCODE_WRITE
:
1989 case MSR_VM_HSAVE_PA
:
1990 case MSR_AMD64_PATCH_LOADER
:
1991 case MSR_AMD64_BU_CFG2
:
1995 return set_efer(vcpu
, data
);
1997 data
&= ~(u64
)0x40; /* ignore flush filter disable */
1998 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
1999 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
2001 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
2006 case MSR_FAM10H_MMIO_CONF_BASE
:
2008 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
2013 case MSR_IA32_DEBUGCTLMSR
:
2015 /* We support the non-activated case already */
2017 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
2018 /* Values other than LBR and BTF are vendor-specific,
2019 thus reserved and should throw a #GP */
2022 vcpu_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2025 case 0x200 ... 0x2ff:
2026 return set_msr_mtrr(vcpu
, msr
, data
);
2027 case MSR_IA32_APICBASE
:
2028 return kvm_set_apic_base(vcpu
, msr_info
);
2029 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2030 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
2031 case MSR_IA32_TSCDEADLINE
:
2032 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
2034 case MSR_IA32_TSC_ADJUST
:
2035 if (guest_cpuid_has_tsc_adjust(vcpu
)) {
2036 if (!msr_info
->host_initiated
) {
2037 u64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
2038 kvm_x86_ops
->adjust_tsc_offset(vcpu
, adj
, true);
2040 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
2043 case MSR_IA32_MISC_ENABLE
:
2044 vcpu
->arch
.ia32_misc_enable_msr
= data
;
2046 case MSR_KVM_WALL_CLOCK_NEW
:
2047 case MSR_KVM_WALL_CLOCK
:
2048 vcpu
->kvm
->arch
.wall_clock
= data
;
2049 kvm_write_wall_clock(vcpu
->kvm
, data
);
2051 case MSR_KVM_SYSTEM_TIME_NEW
:
2052 case MSR_KVM_SYSTEM_TIME
: {
2054 kvmclock_reset(vcpu
);
2056 vcpu
->arch
.time
= data
;
2057 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2059 /* we verify if the enable bit is set... */
2063 gpa_offset
= data
& ~(PAGE_MASK
| 1);
2065 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2066 &vcpu
->arch
.pv_time
, data
& ~1ULL,
2067 sizeof(struct pvclock_vcpu_time_info
)))
2068 vcpu
->arch
.pv_time_enabled
= false;
2070 vcpu
->arch
.pv_time_enabled
= true;
2074 case MSR_KVM_ASYNC_PF_EN
:
2075 if (kvm_pv_enable_async_pf(vcpu
, data
))
2078 case MSR_KVM_STEAL_TIME
:
2080 if (unlikely(!sched_info_on()))
2083 if (data
& KVM_STEAL_RESERVED_MASK
)
2086 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2087 data
& KVM_STEAL_VALID_BITS
,
2088 sizeof(struct kvm_steal_time
)))
2091 vcpu
->arch
.st
.msr_val
= data
;
2093 if (!(data
& KVM_MSR_ENABLED
))
2096 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2099 accumulate_steal_time(vcpu
);
2102 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2105 case MSR_KVM_PV_EOI_EN
:
2106 if (kvm_lapic_enable_pv_eoi(vcpu
, data
))
2110 case MSR_IA32_MCG_CTL
:
2111 case MSR_IA32_MCG_STATUS
:
2112 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
2113 return set_msr_mce(vcpu
, msr
, data
);
2115 /* Performance counters are not protected by a CPUID bit,
2116 * so we should check all of them in the generic path for the sake of
2117 * cross vendor migration.
2118 * Writing a zero into the event select MSRs disables them,
2119 * which we perfectly emulate ;-). Any other value should be at least
2120 * reported, some guests depend on them.
2122 case MSR_K7_EVNTSEL0
:
2123 case MSR_K7_EVNTSEL1
:
2124 case MSR_K7_EVNTSEL2
:
2125 case MSR_K7_EVNTSEL3
:
2127 vcpu_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
2128 "0x%x data 0x%llx\n", msr
, data
);
2130 /* at least RHEL 4 unconditionally writes to the perfctr registers,
2131 * so we ignore writes to make it happy.
2133 case MSR_K7_PERFCTR0
:
2134 case MSR_K7_PERFCTR1
:
2135 case MSR_K7_PERFCTR2
:
2136 case MSR_K7_PERFCTR3
:
2137 vcpu_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
2138 "0x%x data 0x%llx\n", msr
, data
);
2140 case MSR_P6_PERFCTR0
:
2141 case MSR_P6_PERFCTR1
:
2143 case MSR_P6_EVNTSEL0
:
2144 case MSR_P6_EVNTSEL1
:
2145 if (kvm_pmu_msr(vcpu
, msr
))
2146 return kvm_pmu_set_msr(vcpu
, msr_info
);
2148 if (pr
|| data
!= 0)
2149 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
2150 "0x%x data 0x%llx\n", msr
, data
);
2152 case MSR_K7_CLK_CTL
:
2154 * Ignore all writes to this no longer documented MSR.
2155 * Writes are only relevant for old K7 processors,
2156 * all pre-dating SVM, but a recommended workaround from
2157 * AMD for these chips. It is possible to specify the
2158 * affected processor models on the command line, hence
2159 * the need to ignore the workaround.
2162 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2163 if (kvm_hv_msr_partition_wide(msr
)) {
2165 mutex_lock(&vcpu
->kvm
->lock
);
2166 r
= set_msr_hyperv_pw(vcpu
, msr
, data
);
2167 mutex_unlock(&vcpu
->kvm
->lock
);
2170 return set_msr_hyperv(vcpu
, msr
, data
);
2172 case MSR_IA32_BBL_CR_CTL3
:
2173 /* Drop writes to this legacy MSR -- see rdmsr
2174 * counterpart for further detail.
2176 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n", msr
, data
);
2178 case MSR_AMD64_OSVW_ID_LENGTH
:
2179 if (!guest_cpuid_has_osvw(vcpu
))
2181 vcpu
->arch
.osvw
.length
= data
;
2183 case MSR_AMD64_OSVW_STATUS
:
2184 if (!guest_cpuid_has_osvw(vcpu
))
2186 vcpu
->arch
.osvw
.status
= data
;
2189 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
2190 return xen_hvm_config(vcpu
, data
);
2191 if (kvm_pmu_msr(vcpu
, msr
))
2192 return kvm_pmu_set_msr(vcpu
, msr_info
);
2194 vcpu_unimpl(vcpu
, "unhandled wrmsr: 0x%x data %llx\n",
2198 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n",
2205 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
2209 * Reads an msr value (of 'msr_index') into 'pdata'.
2210 * Returns 0 on success, non-0 otherwise.
2211 * Assumes vcpu_load() was already called.
2213 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
2215 return kvm_x86_ops
->get_msr(vcpu
, msr_index
, pdata
);
2218 static int get_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2220 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
2222 if (!msr_mtrr_valid(msr
))
2225 if (msr
== MSR_MTRRdefType
)
2226 *pdata
= vcpu
->arch
.mtrr_state
.def_type
+
2227 (vcpu
->arch
.mtrr_state
.enabled
<< 10);
2228 else if (msr
== MSR_MTRRfix64K_00000
)
2230 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
2231 *pdata
= p
[1 + msr
- MSR_MTRRfix16K_80000
];
2232 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
2233 *pdata
= p
[3 + msr
- MSR_MTRRfix4K_C0000
];
2234 else if (msr
== MSR_IA32_CR_PAT
)
2235 *pdata
= vcpu
->arch
.pat
;
2236 else { /* Variable MTRRs */
2237 int idx
, is_mtrr_mask
;
2240 idx
= (msr
- 0x200) / 2;
2241 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
2244 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
2247 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
2254 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2257 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2258 unsigned bank_num
= mcg_cap
& 0xff;
2261 case MSR_IA32_P5_MC_ADDR
:
2262 case MSR_IA32_P5_MC_TYPE
:
2265 case MSR_IA32_MCG_CAP
:
2266 data
= vcpu
->arch
.mcg_cap
;
2268 case MSR_IA32_MCG_CTL
:
2269 if (!(mcg_cap
& MCG_CTL_P
))
2271 data
= vcpu
->arch
.mcg_ctl
;
2273 case MSR_IA32_MCG_STATUS
:
2274 data
= vcpu
->arch
.mcg_status
;
2277 if (msr
>= MSR_IA32_MC0_CTL
&&
2278 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
2279 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2280 data
= vcpu
->arch
.mce_banks
[offset
];
2289 static int get_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2292 struct kvm
*kvm
= vcpu
->kvm
;
2295 case HV_X64_MSR_GUEST_OS_ID
:
2296 data
= kvm
->arch
.hv_guest_os_id
;
2298 case HV_X64_MSR_HYPERCALL
:
2299 data
= kvm
->arch
.hv_hypercall
;
2301 case HV_X64_MSR_TIME_REF_COUNT
: {
2303 div_u64(get_kernel_ns() + kvm
->arch
.kvmclock_offset
, 100);
2306 case HV_X64_MSR_REFERENCE_TSC
:
2307 data
= kvm
->arch
.hv_tsc_page
;
2310 vcpu_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
2318 static int get_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2323 case HV_X64_MSR_VP_INDEX
: {
2326 kvm_for_each_vcpu(r
, v
, vcpu
->kvm
)
2331 case HV_X64_MSR_EOI
:
2332 return kvm_hv_vapic_msr_read(vcpu
, APIC_EOI
, pdata
);
2333 case HV_X64_MSR_ICR
:
2334 return kvm_hv_vapic_msr_read(vcpu
, APIC_ICR
, pdata
);
2335 case HV_X64_MSR_TPR
:
2336 return kvm_hv_vapic_msr_read(vcpu
, APIC_TASKPRI
, pdata
);
2337 case HV_X64_MSR_APIC_ASSIST_PAGE
:
2338 data
= vcpu
->arch
.hv_vapic
;
2341 vcpu_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
2348 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2353 case MSR_IA32_PLATFORM_ID
:
2354 case MSR_IA32_EBL_CR_POWERON
:
2355 case MSR_IA32_DEBUGCTLMSR
:
2356 case MSR_IA32_LASTBRANCHFROMIP
:
2357 case MSR_IA32_LASTBRANCHTOIP
:
2358 case MSR_IA32_LASTINTFROMIP
:
2359 case MSR_IA32_LASTINTTOIP
:
2362 case MSR_VM_HSAVE_PA
:
2363 case MSR_K7_EVNTSEL0
:
2364 case MSR_K7_PERFCTR0
:
2365 case MSR_K8_INT_PENDING_MSG
:
2366 case MSR_AMD64_NB_CFG
:
2367 case MSR_FAM10H_MMIO_CONF_BASE
:
2368 case MSR_AMD64_BU_CFG2
:
2371 case MSR_P6_PERFCTR0
:
2372 case MSR_P6_PERFCTR1
:
2373 case MSR_P6_EVNTSEL0
:
2374 case MSR_P6_EVNTSEL1
:
2375 if (kvm_pmu_msr(vcpu
, msr
))
2376 return kvm_pmu_get_msr(vcpu
, msr
, pdata
);
2379 case MSR_IA32_UCODE_REV
:
2380 data
= 0x100000000ULL
;
2383 data
= 0x500 | KVM_NR_VAR_MTRR
;
2385 case 0x200 ... 0x2ff:
2386 return get_msr_mtrr(vcpu
, msr
, pdata
);
2387 case 0xcd: /* fsb frequency */
2391 * MSR_EBC_FREQUENCY_ID
2392 * Conservative value valid for even the basic CPU models.
2393 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2394 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2395 * and 266MHz for model 3, or 4. Set Core Clock
2396 * Frequency to System Bus Frequency Ratio to 1 (bits
2397 * 31:24) even though these are only valid for CPU
2398 * models > 2, however guests may end up dividing or
2399 * multiplying by zero otherwise.
2401 case MSR_EBC_FREQUENCY_ID
:
2404 case MSR_IA32_APICBASE
:
2405 data
= kvm_get_apic_base(vcpu
);
2407 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2408 return kvm_x2apic_msr_read(vcpu
, msr
, pdata
);
2410 case MSR_IA32_TSCDEADLINE
:
2411 data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
2413 case MSR_IA32_TSC_ADJUST
:
2414 data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
2416 case MSR_IA32_MISC_ENABLE
:
2417 data
= vcpu
->arch
.ia32_misc_enable_msr
;
2419 case MSR_IA32_PERF_STATUS
:
2420 /* TSC increment by tick */
2422 /* CPU multiplier */
2423 data
|= (((uint64_t)4ULL) << 40);
2426 data
= vcpu
->arch
.efer
;
2428 case MSR_KVM_WALL_CLOCK
:
2429 case MSR_KVM_WALL_CLOCK_NEW
:
2430 data
= vcpu
->kvm
->arch
.wall_clock
;
2432 case MSR_KVM_SYSTEM_TIME
:
2433 case MSR_KVM_SYSTEM_TIME_NEW
:
2434 data
= vcpu
->arch
.time
;
2436 case MSR_KVM_ASYNC_PF_EN
:
2437 data
= vcpu
->arch
.apf
.msr_val
;
2439 case MSR_KVM_STEAL_TIME
:
2440 data
= vcpu
->arch
.st
.msr_val
;
2442 case MSR_KVM_PV_EOI_EN
:
2443 data
= vcpu
->arch
.pv_eoi
.msr_val
;
2445 case MSR_IA32_P5_MC_ADDR
:
2446 case MSR_IA32_P5_MC_TYPE
:
2447 case MSR_IA32_MCG_CAP
:
2448 case MSR_IA32_MCG_CTL
:
2449 case MSR_IA32_MCG_STATUS
:
2450 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
2451 return get_msr_mce(vcpu
, msr
, pdata
);
2452 case MSR_K7_CLK_CTL
:
2454 * Provide expected ramp-up count for K7. All other
2455 * are set to zero, indicating minimum divisors for
2458 * This prevents guest kernels on AMD host with CPU
2459 * type 6, model 8 and higher from exploding due to
2460 * the rdmsr failing.
2464 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2465 if (kvm_hv_msr_partition_wide(msr
)) {
2467 mutex_lock(&vcpu
->kvm
->lock
);
2468 r
= get_msr_hyperv_pw(vcpu
, msr
, pdata
);
2469 mutex_unlock(&vcpu
->kvm
->lock
);
2472 return get_msr_hyperv(vcpu
, msr
, pdata
);
2474 case MSR_IA32_BBL_CR_CTL3
:
2475 /* This legacy MSR exists but isn't fully documented in current
2476 * silicon. It is however accessed by winxp in very narrow
2477 * scenarios where it sets bit #19, itself documented as
2478 * a "reserved" bit. Best effort attempt to source coherent
2479 * read data here should the balance of the register be
2480 * interpreted by the guest:
2482 * L2 cache control register 3: 64GB range, 256KB size,
2483 * enabled, latency 0x1, configured
2487 case MSR_AMD64_OSVW_ID_LENGTH
:
2488 if (!guest_cpuid_has_osvw(vcpu
))
2490 data
= vcpu
->arch
.osvw
.length
;
2492 case MSR_AMD64_OSVW_STATUS
:
2493 if (!guest_cpuid_has_osvw(vcpu
))
2495 data
= vcpu
->arch
.osvw
.status
;
2498 if (kvm_pmu_msr(vcpu
, msr
))
2499 return kvm_pmu_get_msr(vcpu
, msr
, pdata
);
2501 vcpu_unimpl(vcpu
, "unhandled rdmsr: 0x%x\n", msr
);
2504 vcpu_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr
);
2512 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
2515 * Read or write a bunch of msrs. All parameters are kernel addresses.
2517 * @return number of msrs set successfully.
2519 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
2520 struct kvm_msr_entry
*entries
,
2521 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2522 unsigned index
, u64
*data
))
2526 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2527 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
2528 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
2530 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2536 * Read or write a bunch of msrs. Parameters are user addresses.
2538 * @return number of msrs set successfully.
2540 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
2541 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2542 unsigned index
, u64
*data
),
2545 struct kvm_msrs msrs
;
2546 struct kvm_msr_entry
*entries
;
2551 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
2555 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
2558 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
2559 entries
= memdup_user(user_msrs
->entries
, size
);
2560 if (IS_ERR(entries
)) {
2561 r
= PTR_ERR(entries
);
2565 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
2570 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
2581 int kvm_dev_ioctl_check_extension(long ext
)
2586 case KVM_CAP_IRQCHIP
:
2588 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
2589 case KVM_CAP_SET_TSS_ADDR
:
2590 case KVM_CAP_EXT_CPUID
:
2591 case KVM_CAP_EXT_EMUL_CPUID
:
2592 case KVM_CAP_CLOCKSOURCE
:
2594 case KVM_CAP_NOP_IO_DELAY
:
2595 case KVM_CAP_MP_STATE
:
2596 case KVM_CAP_SYNC_MMU
:
2597 case KVM_CAP_USER_NMI
:
2598 case KVM_CAP_REINJECT_CONTROL
:
2599 case KVM_CAP_IRQ_INJECT_STATUS
:
2601 case KVM_CAP_IOEVENTFD
:
2603 case KVM_CAP_PIT_STATE2
:
2604 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
2605 case KVM_CAP_XEN_HVM
:
2606 case KVM_CAP_ADJUST_CLOCK
:
2607 case KVM_CAP_VCPU_EVENTS
:
2608 case KVM_CAP_HYPERV
:
2609 case KVM_CAP_HYPERV_VAPIC
:
2610 case KVM_CAP_HYPERV_SPIN
:
2611 case KVM_CAP_PCI_SEGMENT
:
2612 case KVM_CAP_DEBUGREGS
:
2613 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
2615 case KVM_CAP_ASYNC_PF
:
2616 case KVM_CAP_GET_TSC_KHZ
:
2617 case KVM_CAP_KVMCLOCK_CTRL
:
2618 case KVM_CAP_READONLY_MEM
:
2619 case KVM_CAP_HYPERV_TIME
:
2620 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2621 case KVM_CAP_ASSIGN_DEV_IRQ
:
2622 case KVM_CAP_PCI_2_3
:
2626 case KVM_CAP_COALESCED_MMIO
:
2627 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
2630 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
2632 case KVM_CAP_NR_VCPUS
:
2633 r
= KVM_SOFT_MAX_VCPUS
;
2635 case KVM_CAP_MAX_VCPUS
:
2638 case KVM_CAP_NR_MEMSLOTS
:
2639 r
= KVM_USER_MEM_SLOTS
;
2641 case KVM_CAP_PV_MMU
: /* obsolete */
2644 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2646 r
= iommu_present(&pci_bus_type
);
2650 r
= KVM_MAX_MCE_BANKS
;
2655 case KVM_CAP_TSC_CONTROL
:
2656 r
= kvm_has_tsc_control
;
2658 case KVM_CAP_TSC_DEADLINE_TIMER
:
2659 r
= boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER
);
2669 long kvm_arch_dev_ioctl(struct file
*filp
,
2670 unsigned int ioctl
, unsigned long arg
)
2672 void __user
*argp
= (void __user
*)arg
;
2676 case KVM_GET_MSR_INDEX_LIST
: {
2677 struct kvm_msr_list __user
*user_msr_list
= argp
;
2678 struct kvm_msr_list msr_list
;
2682 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2685 msr_list
.nmsrs
= num_msrs_to_save
+ ARRAY_SIZE(emulated_msrs
);
2686 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2689 if (n
< msr_list
.nmsrs
)
2692 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2693 num_msrs_to_save
* sizeof(u32
)))
2695 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2697 ARRAY_SIZE(emulated_msrs
) * sizeof(u32
)))
2702 case KVM_GET_SUPPORTED_CPUID
:
2703 case KVM_GET_EMULATED_CPUID
: {
2704 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2705 struct kvm_cpuid2 cpuid
;
2708 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2711 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
2717 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2722 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2725 mce_cap
= KVM_MCE_CAP_SUPPORTED
;
2727 if (copy_to_user(argp
, &mce_cap
, sizeof mce_cap
))
2739 static void wbinvd_ipi(void *garbage
)
2744 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2746 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
2749 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2751 /* Address WBINVD may be executed by guest */
2752 if (need_emulate_wbinvd(vcpu
)) {
2753 if (kvm_x86_ops
->has_wbinvd_exit())
2754 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2755 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2756 smp_call_function_single(vcpu
->cpu
,
2757 wbinvd_ipi
, NULL
, 1);
2760 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2762 /* Apply any externally detected TSC adjustments (due to suspend) */
2763 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
2764 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
2765 vcpu
->arch
.tsc_offset_adjustment
= 0;
2766 set_bit(KVM_REQ_CLOCK_UPDATE
, &vcpu
->requests
);
2769 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2770 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
2771 native_read_tsc() - vcpu
->arch
.last_host_tsc
;
2773 mark_tsc_unstable("KVM discovered backwards TSC");
2774 if (check_tsc_unstable()) {
2775 u64 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
,
2776 vcpu
->arch
.last_guest_tsc
);
2777 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
2778 vcpu
->arch
.tsc_catchup
= 1;
2781 * On a host with synchronized TSC, there is no need to update
2782 * kvmclock on vcpu->cpu migration
2784 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
2785 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2786 if (vcpu
->cpu
!= cpu
)
2787 kvm_migrate_timers(vcpu
);
2791 accumulate_steal_time(vcpu
);
2792 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2795 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
2797 kvm_x86_ops
->vcpu_put(vcpu
);
2798 kvm_put_guest_fpu(vcpu
);
2799 vcpu
->arch
.last_host_tsc
= native_read_tsc();
2802 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
2803 struct kvm_lapic_state
*s
)
2805 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
2806 memcpy(s
->regs
, vcpu
->arch
.apic
->regs
, sizeof *s
);
2811 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
2812 struct kvm_lapic_state
*s
)
2814 kvm_apic_post_state_restore(vcpu
, s
);
2815 update_cr8_intercept(vcpu
);
2820 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
2821 struct kvm_interrupt
*irq
)
2823 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
2825 if (irqchip_in_kernel(vcpu
->kvm
))
2828 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
2829 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2834 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
2836 kvm_inject_nmi(vcpu
);
2841 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
2842 struct kvm_tpr_access_ctl
*tac
)
2846 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
2850 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
2854 unsigned bank_num
= mcg_cap
& 0xff, bank
;
2857 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
2859 if (mcg_cap
& ~(KVM_MCE_CAP_SUPPORTED
| 0xff | 0xff0000))
2862 vcpu
->arch
.mcg_cap
= mcg_cap
;
2863 /* Init IA32_MCG_CTL to all 1s */
2864 if (mcg_cap
& MCG_CTL_P
)
2865 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
2866 /* Init IA32_MCi_CTL to all 1s */
2867 for (bank
= 0; bank
< bank_num
; bank
++)
2868 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
2873 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
2874 struct kvm_x86_mce
*mce
)
2876 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2877 unsigned bank_num
= mcg_cap
& 0xff;
2878 u64
*banks
= vcpu
->arch
.mce_banks
;
2880 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
2883 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2884 * reporting is disabled
2886 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
2887 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
2889 banks
+= 4 * mce
->bank
;
2891 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2892 * reporting is disabled for the bank
2894 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
2896 if (mce
->status
& MCI_STATUS_UC
) {
2897 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
2898 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
2899 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
2902 if (banks
[1] & MCI_STATUS_VAL
)
2903 mce
->status
|= MCI_STATUS_OVER
;
2904 banks
[2] = mce
->addr
;
2905 banks
[3] = mce
->misc
;
2906 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
2907 banks
[1] = mce
->status
;
2908 kvm_queue_exception(vcpu
, MC_VECTOR
);
2909 } else if (!(banks
[1] & MCI_STATUS_VAL
)
2910 || !(banks
[1] & MCI_STATUS_UC
)) {
2911 if (banks
[1] & MCI_STATUS_VAL
)
2912 mce
->status
|= MCI_STATUS_OVER
;
2913 banks
[2] = mce
->addr
;
2914 banks
[3] = mce
->misc
;
2915 banks
[1] = mce
->status
;
2917 banks
[1] |= MCI_STATUS_OVER
;
2921 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
2922 struct kvm_vcpu_events
*events
)
2925 events
->exception
.injected
=
2926 vcpu
->arch
.exception
.pending
&&
2927 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
2928 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
2929 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
2930 events
->exception
.pad
= 0;
2931 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
2933 events
->interrupt
.injected
=
2934 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
2935 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
2936 events
->interrupt
.soft
= 0;
2937 events
->interrupt
.shadow
=
2938 kvm_x86_ops
->get_interrupt_shadow(vcpu
,
2939 KVM_X86_SHADOW_INT_MOV_SS
| KVM_X86_SHADOW_INT_STI
);
2941 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
2942 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
2943 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
2944 events
->nmi
.pad
= 0;
2946 events
->sipi_vector
= 0; /* never valid when reporting to user space */
2948 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
2949 | KVM_VCPUEVENT_VALID_SHADOW
);
2950 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
2953 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
2954 struct kvm_vcpu_events
*events
)
2956 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2957 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2958 | KVM_VCPUEVENT_VALID_SHADOW
))
2962 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
2963 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
2964 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
2965 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
2967 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
2968 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
2969 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
2970 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
2971 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
2972 events
->interrupt
.shadow
);
2974 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
2975 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
2976 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
2977 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
2979 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
2980 kvm_vcpu_has_lapic(vcpu
))
2981 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
2983 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2988 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
2989 struct kvm_debugregs
*dbgregs
)
2993 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
2994 _kvm_get_dr(vcpu
, 6, &val
);
2996 dbgregs
->dr7
= vcpu
->arch
.dr7
;
2998 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
3001 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
3002 struct kvm_debugregs
*dbgregs
)
3007 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
3008 vcpu
->arch
.dr6
= dbgregs
->dr6
;
3009 kvm_update_dr6(vcpu
);
3010 vcpu
->arch
.dr7
= dbgregs
->dr7
;
3011 kvm_update_dr7(vcpu
);
3016 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
3017 struct kvm_xsave
*guest_xsave
)
3019 if (cpu_has_xsave
) {
3020 memcpy(guest_xsave
->region
,
3021 &vcpu
->arch
.guest_fpu
.state
->xsave
,
3022 vcpu
->arch
.guest_xstate_size
);
3023 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] &=
3024 vcpu
->arch
.guest_supported_xcr0
| XSTATE_FPSSE
;
3026 memcpy(guest_xsave
->region
,
3027 &vcpu
->arch
.guest_fpu
.state
->fxsave
,
3028 sizeof(struct i387_fxsave_struct
));
3029 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
3034 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
3035 struct kvm_xsave
*guest_xsave
)
3038 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
3040 if (cpu_has_xsave
) {
3042 * Here we allow setting states that are not present in
3043 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3044 * with old userspace.
3046 if (xstate_bv
& ~KVM_SUPPORTED_XCR0
)
3048 if (xstate_bv
& ~host_xcr0
)
3050 memcpy(&vcpu
->arch
.guest_fpu
.state
->xsave
,
3051 guest_xsave
->region
, vcpu
->arch
.guest_xstate_size
);
3053 if (xstate_bv
& ~XSTATE_FPSSE
)
3055 memcpy(&vcpu
->arch
.guest_fpu
.state
->fxsave
,
3056 guest_xsave
->region
, sizeof(struct i387_fxsave_struct
));
3061 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
3062 struct kvm_xcrs
*guest_xcrs
)
3064 if (!cpu_has_xsave
) {
3065 guest_xcrs
->nr_xcrs
= 0;
3069 guest_xcrs
->nr_xcrs
= 1;
3070 guest_xcrs
->flags
= 0;
3071 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
3072 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
3075 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
3076 struct kvm_xcrs
*guest_xcrs
)
3083 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
3086 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
3087 /* Only support XCR0 currently */
3088 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
3089 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
3090 guest_xcrs
->xcrs
[i
].value
);
3099 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3100 * stopped by the hypervisor. This function will be called from the host only.
3101 * EINVAL is returned when the host attempts to set the flag for a guest that
3102 * does not support pv clocks.
3104 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
3106 if (!vcpu
->arch
.pv_time_enabled
)
3108 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
3109 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3113 long kvm_arch_vcpu_ioctl(struct file
*filp
,
3114 unsigned int ioctl
, unsigned long arg
)
3116 struct kvm_vcpu
*vcpu
= filp
->private_data
;
3117 void __user
*argp
= (void __user
*)arg
;
3120 struct kvm_lapic_state
*lapic
;
3121 struct kvm_xsave
*xsave
;
3122 struct kvm_xcrs
*xcrs
;
3128 case KVM_GET_LAPIC
: {
3130 if (!vcpu
->arch
.apic
)
3132 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
3137 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
3141 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
3146 case KVM_SET_LAPIC
: {
3148 if (!vcpu
->arch
.apic
)
3150 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
3151 if (IS_ERR(u
.lapic
))
3152 return PTR_ERR(u
.lapic
);
3154 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
3157 case KVM_INTERRUPT
: {
3158 struct kvm_interrupt irq
;
3161 if (copy_from_user(&irq
, argp
, sizeof irq
))
3163 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
3167 r
= kvm_vcpu_ioctl_nmi(vcpu
);
3170 case KVM_SET_CPUID
: {
3171 struct kvm_cpuid __user
*cpuid_arg
= argp
;
3172 struct kvm_cpuid cpuid
;
3175 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3177 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
3180 case KVM_SET_CPUID2
: {
3181 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3182 struct kvm_cpuid2 cpuid
;
3185 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3187 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
3188 cpuid_arg
->entries
);
3191 case KVM_GET_CPUID2
: {
3192 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3193 struct kvm_cpuid2 cpuid
;
3196 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3198 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
3199 cpuid_arg
->entries
);
3203 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
3209 r
= msr_io(vcpu
, argp
, kvm_get_msr
, 1);
3212 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
3214 case KVM_TPR_ACCESS_REPORTING
: {
3215 struct kvm_tpr_access_ctl tac
;
3218 if (copy_from_user(&tac
, argp
, sizeof tac
))
3220 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
3224 if (copy_to_user(argp
, &tac
, sizeof tac
))
3229 case KVM_SET_VAPIC_ADDR
: {
3230 struct kvm_vapic_addr va
;
3233 if (!irqchip_in_kernel(vcpu
->kvm
))
3236 if (copy_from_user(&va
, argp
, sizeof va
))
3238 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
3241 case KVM_X86_SETUP_MCE
: {
3245 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
3247 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
3250 case KVM_X86_SET_MCE
: {
3251 struct kvm_x86_mce mce
;
3254 if (copy_from_user(&mce
, argp
, sizeof mce
))
3256 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
3259 case KVM_GET_VCPU_EVENTS
: {
3260 struct kvm_vcpu_events events
;
3262 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
3265 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
3270 case KVM_SET_VCPU_EVENTS
: {
3271 struct kvm_vcpu_events events
;
3274 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
3277 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
3280 case KVM_GET_DEBUGREGS
: {
3281 struct kvm_debugregs dbgregs
;
3283 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
3286 if (copy_to_user(argp
, &dbgregs
,
3287 sizeof(struct kvm_debugregs
)))
3292 case KVM_SET_DEBUGREGS
: {
3293 struct kvm_debugregs dbgregs
;
3296 if (copy_from_user(&dbgregs
, argp
,
3297 sizeof(struct kvm_debugregs
)))
3300 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
3303 case KVM_GET_XSAVE
: {
3304 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
3309 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
3312 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
3317 case KVM_SET_XSAVE
: {
3318 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
3319 if (IS_ERR(u
.xsave
))
3320 return PTR_ERR(u
.xsave
);
3322 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
3325 case KVM_GET_XCRS
: {
3326 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3331 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
3334 if (copy_to_user(argp
, u
.xcrs
,
3335 sizeof(struct kvm_xcrs
)))
3340 case KVM_SET_XCRS
: {
3341 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
3343 return PTR_ERR(u
.xcrs
);
3345 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
3348 case KVM_SET_TSC_KHZ
: {
3352 user_tsc_khz
= (u32
)arg
;
3354 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
3357 if (user_tsc_khz
== 0)
3358 user_tsc_khz
= tsc_khz
;
3360 kvm_set_tsc_khz(vcpu
, user_tsc_khz
);
3365 case KVM_GET_TSC_KHZ
: {
3366 r
= vcpu
->arch
.virtual_tsc_khz
;
3369 case KVM_KVMCLOCK_CTRL
: {
3370 r
= kvm_set_guest_paused(vcpu
);
3381 int kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
3383 return VM_FAULT_SIGBUS
;
3386 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
3390 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
3392 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
3396 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3399 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3403 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3404 u32 kvm_nr_mmu_pages
)
3406 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3409 mutex_lock(&kvm
->slots_lock
);
3411 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3412 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3414 mutex_unlock(&kvm
->slots_lock
);
3418 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3420 return kvm
->arch
.n_max_mmu_pages
;
3423 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3428 switch (chip
->chip_id
) {
3429 case KVM_IRQCHIP_PIC_MASTER
:
3430 memcpy(&chip
->chip
.pic
,
3431 &pic_irqchip(kvm
)->pics
[0],
3432 sizeof(struct kvm_pic_state
));
3434 case KVM_IRQCHIP_PIC_SLAVE
:
3435 memcpy(&chip
->chip
.pic
,
3436 &pic_irqchip(kvm
)->pics
[1],
3437 sizeof(struct kvm_pic_state
));
3439 case KVM_IRQCHIP_IOAPIC
:
3440 r
= kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3449 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3454 switch (chip
->chip_id
) {
3455 case KVM_IRQCHIP_PIC_MASTER
:
3456 spin_lock(&pic_irqchip(kvm
)->lock
);
3457 memcpy(&pic_irqchip(kvm
)->pics
[0],
3459 sizeof(struct kvm_pic_state
));
3460 spin_unlock(&pic_irqchip(kvm
)->lock
);
3462 case KVM_IRQCHIP_PIC_SLAVE
:
3463 spin_lock(&pic_irqchip(kvm
)->lock
);
3464 memcpy(&pic_irqchip(kvm
)->pics
[1],
3466 sizeof(struct kvm_pic_state
));
3467 spin_unlock(&pic_irqchip(kvm
)->lock
);
3469 case KVM_IRQCHIP_IOAPIC
:
3470 r
= kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3476 kvm_pic_update_irq(pic_irqchip(kvm
));
3480 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3484 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3485 memcpy(ps
, &kvm
->arch
.vpit
->pit_state
, sizeof(struct kvm_pit_state
));
3486 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3490 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3494 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3495 memcpy(&kvm
->arch
.vpit
->pit_state
, ps
, sizeof(struct kvm_pit_state
));
3496 kvm_pit_load_count(kvm
, 0, ps
->channels
[0].count
, 0);
3497 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3501 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3505 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3506 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3507 sizeof(ps
->channels
));
3508 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3509 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3510 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
3514 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3516 int r
= 0, start
= 0;
3517 u32 prev_legacy
, cur_legacy
;
3518 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3519 prev_legacy
= kvm
->arch
.vpit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3520 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3521 if (!prev_legacy
&& cur_legacy
)
3523 memcpy(&kvm
->arch
.vpit
->pit_state
.channels
, &ps
->channels
,
3524 sizeof(kvm
->arch
.vpit
->pit_state
.channels
));
3525 kvm
->arch
.vpit
->pit_state
.flags
= ps
->flags
;
3526 kvm_pit_load_count(kvm
, 0, kvm
->arch
.vpit
->pit_state
.channels
[0].count
, start
);
3527 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3531 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
3532 struct kvm_reinject_control
*control
)
3534 if (!kvm
->arch
.vpit
)
3536 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3537 kvm
->arch
.vpit
->pit_state
.reinject
= control
->pit_reinject
;
3538 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3543 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3544 * @kvm: kvm instance
3545 * @log: slot id and address to which we copy the log
3547 * We need to keep it in mind that VCPU threads can write to the bitmap
3548 * concurrently. So, to avoid losing data, we keep the following order for
3551 * 1. Take a snapshot of the bit and clear it if needed.
3552 * 2. Write protect the corresponding page.
3553 * 3. Flush TLB's if needed.
3554 * 4. Copy the snapshot to the userspace.
3556 * Between 2 and 3, the guest may write to the page using the remaining TLB
3557 * entry. This is not a problem because the page will be reported dirty at
3558 * step 4 using the snapshot taken before and step 3 ensures that successive
3559 * writes will be logged for the next call.
3561 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
, struct kvm_dirty_log
*log
)
3564 struct kvm_memory_slot
*memslot
;
3566 unsigned long *dirty_bitmap
;
3567 unsigned long *dirty_bitmap_buffer
;
3568 bool is_dirty
= false;
3570 mutex_lock(&kvm
->slots_lock
);
3573 if (log
->slot
>= KVM_USER_MEM_SLOTS
)
3576 memslot
= id_to_memslot(kvm
->memslots
, log
->slot
);
3578 dirty_bitmap
= memslot
->dirty_bitmap
;
3583 n
= kvm_dirty_bitmap_bytes(memslot
);
3585 dirty_bitmap_buffer
= dirty_bitmap
+ n
/ sizeof(long);
3586 memset(dirty_bitmap_buffer
, 0, n
);
3588 spin_lock(&kvm
->mmu_lock
);
3590 for (i
= 0; i
< n
/ sizeof(long); i
++) {
3594 if (!dirty_bitmap
[i
])
3599 mask
= xchg(&dirty_bitmap
[i
], 0);
3600 dirty_bitmap_buffer
[i
] = mask
;
3602 offset
= i
* BITS_PER_LONG
;
3603 kvm_mmu_write_protect_pt_masked(kvm
, memslot
, offset
, mask
);
3606 kvm_flush_remote_tlbs(kvm
);
3608 spin_unlock(&kvm
->mmu_lock
);
3611 if (copy_to_user(log
->dirty_bitmap
, dirty_bitmap_buffer
, n
))
3616 mutex_unlock(&kvm
->slots_lock
);
3620 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
3623 if (!irqchip_in_kernel(kvm
))
3626 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
3627 irq_event
->irq
, irq_event
->level
,
3632 long kvm_arch_vm_ioctl(struct file
*filp
,
3633 unsigned int ioctl
, unsigned long arg
)
3635 struct kvm
*kvm
= filp
->private_data
;
3636 void __user
*argp
= (void __user
*)arg
;
3639 * This union makes it completely explicit to gcc-3.x
3640 * that these two variables' stack usage should be
3641 * combined, not added together.
3644 struct kvm_pit_state ps
;
3645 struct kvm_pit_state2 ps2
;
3646 struct kvm_pit_config pit_config
;
3650 case KVM_SET_TSS_ADDR
:
3651 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
3653 case KVM_SET_IDENTITY_MAP_ADDR
: {
3657 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
3659 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
3662 case KVM_SET_NR_MMU_PAGES
:
3663 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
3665 case KVM_GET_NR_MMU_PAGES
:
3666 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
3668 case KVM_CREATE_IRQCHIP
: {
3669 struct kvm_pic
*vpic
;
3671 mutex_lock(&kvm
->lock
);
3674 goto create_irqchip_unlock
;
3676 if (atomic_read(&kvm
->online_vcpus
))
3677 goto create_irqchip_unlock
;
3679 vpic
= kvm_create_pic(kvm
);
3681 r
= kvm_ioapic_init(kvm
);
3683 mutex_lock(&kvm
->slots_lock
);
3684 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3686 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3688 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3690 mutex_unlock(&kvm
->slots_lock
);
3692 goto create_irqchip_unlock
;
3695 goto create_irqchip_unlock
;
3697 kvm
->arch
.vpic
= vpic
;
3699 r
= kvm_setup_default_irq_routing(kvm
);
3701 mutex_lock(&kvm
->slots_lock
);
3702 mutex_lock(&kvm
->irq_lock
);
3703 kvm_ioapic_destroy(kvm
);
3704 kvm_destroy_pic(kvm
);
3705 mutex_unlock(&kvm
->irq_lock
);
3706 mutex_unlock(&kvm
->slots_lock
);
3708 create_irqchip_unlock
:
3709 mutex_unlock(&kvm
->lock
);
3712 case KVM_CREATE_PIT
:
3713 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
3715 case KVM_CREATE_PIT2
:
3717 if (copy_from_user(&u
.pit_config
, argp
,
3718 sizeof(struct kvm_pit_config
)))
3721 mutex_lock(&kvm
->slots_lock
);
3724 goto create_pit_unlock
;
3726 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
3730 mutex_unlock(&kvm
->slots_lock
);
3732 case KVM_GET_IRQCHIP
: {
3733 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3734 struct kvm_irqchip
*chip
;
3736 chip
= memdup_user(argp
, sizeof(*chip
));
3743 if (!irqchip_in_kernel(kvm
))
3744 goto get_irqchip_out
;
3745 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
3747 goto get_irqchip_out
;
3749 if (copy_to_user(argp
, chip
, sizeof *chip
))
3750 goto get_irqchip_out
;
3756 case KVM_SET_IRQCHIP
: {
3757 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3758 struct kvm_irqchip
*chip
;
3760 chip
= memdup_user(argp
, sizeof(*chip
));
3767 if (!irqchip_in_kernel(kvm
))
3768 goto set_irqchip_out
;
3769 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
3771 goto set_irqchip_out
;
3779 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
3782 if (!kvm
->arch
.vpit
)
3784 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
3788 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
3795 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
3798 if (!kvm
->arch
.vpit
)
3800 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
3803 case KVM_GET_PIT2
: {
3805 if (!kvm
->arch
.vpit
)
3807 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
3811 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
3816 case KVM_SET_PIT2
: {
3818 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
3821 if (!kvm
->arch
.vpit
)
3823 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
3826 case KVM_REINJECT_CONTROL
: {
3827 struct kvm_reinject_control control
;
3829 if (copy_from_user(&control
, argp
, sizeof(control
)))
3831 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
3834 case KVM_XEN_HVM_CONFIG
: {
3836 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
3837 sizeof(struct kvm_xen_hvm_config
)))
3840 if (kvm
->arch
.xen_hvm_config
.flags
)
3845 case KVM_SET_CLOCK
: {
3846 struct kvm_clock_data user_ns
;
3851 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
3859 local_irq_disable();
3860 now_ns
= get_kernel_ns();
3861 delta
= user_ns
.clock
- now_ns
;
3863 kvm
->arch
.kvmclock_offset
= delta
;
3864 kvm_gen_update_masterclock(kvm
);
3867 case KVM_GET_CLOCK
: {
3868 struct kvm_clock_data user_ns
;
3871 local_irq_disable();
3872 now_ns
= get_kernel_ns();
3873 user_ns
.clock
= kvm
->arch
.kvmclock_offset
+ now_ns
;
3876 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
3879 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
3892 static void kvm_init_msr_list(void)
3897 /* skip the first msrs in the list. KVM-specific */
3898 for (i
= j
= KVM_SAVE_MSRS_BEGIN
; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
3899 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
3902 msrs_to_save
[j
] = msrs_to_save
[i
];
3905 num_msrs_to_save
= j
;
3908 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
3916 if (!(vcpu
->arch
.apic
&&
3917 !kvm_iodevice_write(&vcpu
->arch
.apic
->dev
, addr
, n
, v
))
3918 && kvm_io_bus_write(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, n
, v
))
3929 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
3936 if (!(vcpu
->arch
.apic
&&
3937 !kvm_iodevice_read(&vcpu
->arch
.apic
->dev
, addr
, n
, v
))
3938 && kvm_io_bus_read(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, n
, v
))
3940 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, *(u64
*)v
);
3950 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
3951 struct kvm_segment
*var
, int seg
)
3953 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
3956 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
3957 struct kvm_segment
*var
, int seg
)
3959 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
3962 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
)
3965 struct x86_exception exception
;
3967 BUG_ON(!mmu_is_nested(vcpu
));
3969 /* NPT walks are always user-walks */
3970 access
|= PFERR_USER_MASK
;
3971 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, &exception
);
3976 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
3977 struct x86_exception
*exception
)
3979 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3980 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
3983 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
3984 struct x86_exception
*exception
)
3986 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3987 access
|= PFERR_FETCH_MASK
;
3988 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
3991 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
3992 struct x86_exception
*exception
)
3994 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3995 access
|= PFERR_WRITE_MASK
;
3996 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
3999 /* uses this to access any guest's mapped memory without checking CPL */
4000 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
4001 struct x86_exception
*exception
)
4003 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
4006 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
4007 struct kvm_vcpu
*vcpu
, u32 access
,
4008 struct x86_exception
*exception
)
4011 int r
= X86EMUL_CONTINUE
;
4014 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
4016 unsigned offset
= addr
& (PAGE_SIZE
-1);
4017 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4020 if (gpa
== UNMAPPED_GVA
)
4021 return X86EMUL_PROPAGATE_FAULT
;
4022 ret
= kvm_read_guest(vcpu
->kvm
, gpa
, data
, toread
);
4024 r
= X86EMUL_IO_NEEDED
;
4036 /* used for instruction fetching */
4037 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4038 gva_t addr
, void *val
, unsigned int bytes
,
4039 struct x86_exception
*exception
)
4041 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4042 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4044 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
,
4045 access
| PFERR_FETCH_MASK
,
4049 int kvm_read_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4050 gva_t addr
, void *val
, unsigned int bytes
,
4051 struct x86_exception
*exception
)
4053 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4054 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4056 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
4059 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
4061 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4062 gva_t addr
, void *val
, unsigned int bytes
,
4063 struct x86_exception
*exception
)
4065 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4066 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, exception
);
4069 int kvm_write_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4070 gva_t addr
, void *val
,
4072 struct x86_exception
*exception
)
4074 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4076 int r
= X86EMUL_CONTINUE
;
4079 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
4082 unsigned offset
= addr
& (PAGE_SIZE
-1);
4083 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4086 if (gpa
== UNMAPPED_GVA
)
4087 return X86EMUL_PROPAGATE_FAULT
;
4088 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, data
, towrite
);
4090 r
= X86EMUL_IO_NEEDED
;
4101 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
4103 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4104 gpa_t
*gpa
, struct x86_exception
*exception
,
4107 u32 access
= ((kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
4108 | (write
? PFERR_WRITE_MASK
: 0);
4110 if (vcpu_match_mmio_gva(vcpu
, gva
)
4111 && !permission_fault(vcpu
->arch
.walk_mmu
, vcpu
->arch
.access
, access
)) {
4112 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
4113 (gva
& (PAGE_SIZE
- 1));
4114 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
4118 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4120 if (*gpa
== UNMAPPED_GVA
)
4123 /* For APIC access vmexit */
4124 if ((*gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4127 if (vcpu_match_mmio_gpa(vcpu
, *gpa
)) {
4128 trace_vcpu_match_mmio(gva
, *gpa
, write
, true);
4135 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4136 const void *val
, int bytes
)
4140 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, val
, bytes
);
4143 kvm_mmu_pte_write(vcpu
, gpa
, val
, bytes
);
4147 struct read_write_emulator_ops
{
4148 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
4150 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4151 void *val
, int bytes
);
4152 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4153 int bytes
, void *val
);
4154 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4155 void *val
, int bytes
);
4159 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
4161 if (vcpu
->mmio_read_completed
) {
4162 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
4163 vcpu
->mmio_fragments
[0].gpa
, *(u64
*)val
);
4164 vcpu
->mmio_read_completed
= 0;
4171 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4172 void *val
, int bytes
)
4174 return !kvm_read_guest(vcpu
->kvm
, gpa
, val
, bytes
);
4177 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4178 void *val
, int bytes
)
4180 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
4183 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
4185 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
4186 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
4189 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4190 void *val
, int bytes
)
4192 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
4193 return X86EMUL_IO_NEEDED
;
4196 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4197 void *val
, int bytes
)
4199 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
4201 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
4202 return X86EMUL_CONTINUE
;
4205 static const struct read_write_emulator_ops read_emultor
= {
4206 .read_write_prepare
= read_prepare
,
4207 .read_write_emulate
= read_emulate
,
4208 .read_write_mmio
= vcpu_mmio_read
,
4209 .read_write_exit_mmio
= read_exit_mmio
,
4212 static const struct read_write_emulator_ops write_emultor
= {
4213 .read_write_emulate
= write_emulate
,
4214 .read_write_mmio
= write_mmio
,
4215 .read_write_exit_mmio
= write_exit_mmio
,
4219 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
4221 struct x86_exception
*exception
,
4222 struct kvm_vcpu
*vcpu
,
4223 const struct read_write_emulator_ops
*ops
)
4227 bool write
= ops
->write
;
4228 struct kvm_mmio_fragment
*frag
;
4230 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
4233 return X86EMUL_PROPAGATE_FAULT
;
4235 /* For APIC access vmexit */
4239 if (ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
4240 return X86EMUL_CONTINUE
;
4244 * Is this MMIO handled locally?
4246 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
4247 if (handled
== bytes
)
4248 return X86EMUL_CONTINUE
;
4254 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
4255 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
4259 return X86EMUL_CONTINUE
;
4262 int emulator_read_write(struct x86_emulate_ctxt
*ctxt
, unsigned long addr
,
4263 void *val
, unsigned int bytes
,
4264 struct x86_exception
*exception
,
4265 const struct read_write_emulator_ops
*ops
)
4267 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4271 if (ops
->read_write_prepare
&&
4272 ops
->read_write_prepare(vcpu
, val
, bytes
))
4273 return X86EMUL_CONTINUE
;
4275 vcpu
->mmio_nr_fragments
= 0;
4277 /* Crossing a page boundary? */
4278 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
4281 now
= -addr
& ~PAGE_MASK
;
4282 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
4285 if (rc
!= X86EMUL_CONTINUE
)
4292 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
4294 if (rc
!= X86EMUL_CONTINUE
)
4297 if (!vcpu
->mmio_nr_fragments
)
4300 gpa
= vcpu
->mmio_fragments
[0].gpa
;
4302 vcpu
->mmio_needed
= 1;
4303 vcpu
->mmio_cur_fragment
= 0;
4305 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
4306 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
4307 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
4308 vcpu
->run
->mmio
.phys_addr
= gpa
;
4310 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
4313 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
4317 struct x86_exception
*exception
)
4319 return emulator_read_write(ctxt
, addr
, val
, bytes
,
4320 exception
, &read_emultor
);
4323 int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
4327 struct x86_exception
*exception
)
4329 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
4330 exception
, &write_emultor
);
4333 #define CMPXCHG_TYPE(t, ptr, old, new) \
4334 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4336 #ifdef CONFIG_X86_64
4337 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4339 # define CMPXCHG64(ptr, old, new) \
4340 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4343 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
4348 struct x86_exception
*exception
)
4350 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4356 /* guests cmpxchg8b have to be emulated atomically */
4357 if (bytes
> 8 || (bytes
& (bytes
- 1)))
4360 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
4362 if (gpa
== UNMAPPED_GVA
||
4363 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4366 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
4369 page
= gfn_to_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
4370 if (is_error_page(page
))
4373 kaddr
= kmap_atomic(page
);
4374 kaddr
+= offset_in_page(gpa
);
4377 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
4380 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
4383 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
4386 exchanged
= CMPXCHG64(kaddr
, old
, new);
4391 kunmap_atomic(kaddr
);
4392 kvm_release_page_dirty(page
);
4395 return X86EMUL_CMPXCHG_FAILED
;
4397 kvm_mmu_pte_write(vcpu
, gpa
, new, bytes
);
4399 return X86EMUL_CONTINUE
;
4402 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
4404 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
4407 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
4409 /* TODO: String I/O for in kernel device */
4412 if (vcpu
->arch
.pio
.in
)
4413 r
= kvm_io_bus_read(vcpu
->kvm
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
4414 vcpu
->arch
.pio
.size
, pd
);
4416 r
= kvm_io_bus_write(vcpu
->kvm
, KVM_PIO_BUS
,
4417 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
4422 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
4423 unsigned short port
, void *val
,
4424 unsigned int count
, bool in
)
4426 trace_kvm_pio(!in
, port
, size
, count
);
4428 vcpu
->arch
.pio
.port
= port
;
4429 vcpu
->arch
.pio
.in
= in
;
4430 vcpu
->arch
.pio
.count
= count
;
4431 vcpu
->arch
.pio
.size
= size
;
4433 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
4434 vcpu
->arch
.pio
.count
= 0;
4438 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
4439 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
4440 vcpu
->run
->io
.size
= size
;
4441 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
4442 vcpu
->run
->io
.count
= count
;
4443 vcpu
->run
->io
.port
= port
;
4448 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
4449 int size
, unsigned short port
, void *val
,
4452 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4455 if (vcpu
->arch
.pio
.count
)
4458 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
4461 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
4462 vcpu
->arch
.pio
.count
= 0;
4469 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
4470 int size
, unsigned short port
,
4471 const void *val
, unsigned int count
)
4473 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4475 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
4476 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
4479 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
4481 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
4484 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
4486 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
4489 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4491 if (!need_emulate_wbinvd(vcpu
))
4492 return X86EMUL_CONTINUE
;
4494 if (kvm_x86_ops
->has_wbinvd_exit()) {
4495 int cpu
= get_cpu();
4497 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4498 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
4499 wbinvd_ipi
, NULL
, 1);
4501 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
4504 return X86EMUL_CONTINUE
;
4506 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
4508 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
4510 kvm_emulate_wbinvd(emul_to_vcpu(ctxt
));
4513 int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long *dest
)
4515 return _kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
4518 int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long value
)
4521 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
4524 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
4526 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
4529 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
4531 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4532 unsigned long value
;
4536 value
= kvm_read_cr0(vcpu
);
4539 value
= vcpu
->arch
.cr2
;
4542 value
= kvm_read_cr3(vcpu
);
4545 value
= kvm_read_cr4(vcpu
);
4548 value
= kvm_get_cr8(vcpu
);
4551 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4558 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
4560 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4565 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
4568 vcpu
->arch
.cr2
= val
;
4571 res
= kvm_set_cr3(vcpu
, val
);
4574 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
4577 res
= kvm_set_cr8(vcpu
, val
);
4580 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4587 static void emulator_set_rflags(struct x86_emulate_ctxt
*ctxt
, ulong val
)
4589 kvm_set_rflags(emul_to_vcpu(ctxt
), val
);
4592 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
4594 return kvm_x86_ops
->get_cpl(emul_to_vcpu(ctxt
));
4597 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4599 kvm_x86_ops
->get_gdt(emul_to_vcpu(ctxt
), dt
);
4602 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4604 kvm_x86_ops
->get_idt(emul_to_vcpu(ctxt
), dt
);
4607 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4609 kvm_x86_ops
->set_gdt(emul_to_vcpu(ctxt
), dt
);
4612 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4614 kvm_x86_ops
->set_idt(emul_to_vcpu(ctxt
), dt
);
4617 static unsigned long emulator_get_cached_segment_base(
4618 struct x86_emulate_ctxt
*ctxt
, int seg
)
4620 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
4623 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
4624 struct desc_struct
*desc
, u32
*base3
,
4627 struct kvm_segment var
;
4629 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
4630 *selector
= var
.selector
;
4633 memset(desc
, 0, sizeof(*desc
));
4639 set_desc_limit(desc
, var
.limit
);
4640 set_desc_base(desc
, (unsigned long)var
.base
);
4641 #ifdef CONFIG_X86_64
4643 *base3
= var
.base
>> 32;
4645 desc
->type
= var
.type
;
4647 desc
->dpl
= var
.dpl
;
4648 desc
->p
= var
.present
;
4649 desc
->avl
= var
.avl
;
4657 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
4658 struct desc_struct
*desc
, u32 base3
,
4661 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4662 struct kvm_segment var
;
4664 var
.selector
= selector
;
4665 var
.base
= get_desc_base(desc
);
4666 #ifdef CONFIG_X86_64
4667 var
.base
|= ((u64
)base3
) << 32;
4669 var
.limit
= get_desc_limit(desc
);
4671 var
.limit
= (var
.limit
<< 12) | 0xfff;
4672 var
.type
= desc
->type
;
4673 var
.present
= desc
->p
;
4674 var
.dpl
= desc
->dpl
;
4679 var
.avl
= desc
->avl
;
4680 var
.present
= desc
->p
;
4681 var
.unusable
= !var
.present
;
4684 kvm_set_segment(vcpu
, &var
, seg
);
4688 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
4689 u32 msr_index
, u64
*pdata
)
4691 return kvm_get_msr(emul_to_vcpu(ctxt
), msr_index
, pdata
);
4694 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
4695 u32 msr_index
, u64 data
)
4697 struct msr_data msr
;
4700 msr
.index
= msr_index
;
4701 msr
.host_initiated
= false;
4702 return kvm_set_msr(emul_to_vcpu(ctxt
), &msr
);
4705 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
4706 u32 pmc
, u64
*pdata
)
4708 return kvm_pmu_read_pmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
4711 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
4713 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
4716 static void emulator_get_fpu(struct x86_emulate_ctxt
*ctxt
)
4719 kvm_load_guest_fpu(emul_to_vcpu(ctxt
));
4721 * CR0.TS may reference the host fpu state, not the guest fpu state,
4722 * so it may be clear at this point.
4727 static void emulator_put_fpu(struct x86_emulate_ctxt
*ctxt
)
4732 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
4733 struct x86_instruction_info
*info
,
4734 enum x86_intercept_stage stage
)
4736 return kvm_x86_ops
->check_intercept(emul_to_vcpu(ctxt
), info
, stage
);
4739 static void emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
4740 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
)
4742 kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
);
4745 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
4747 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
4750 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
4752 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
4755 static const struct x86_emulate_ops emulate_ops
= {
4756 .read_gpr
= emulator_read_gpr
,
4757 .write_gpr
= emulator_write_gpr
,
4758 .read_std
= kvm_read_guest_virt_system
,
4759 .write_std
= kvm_write_guest_virt_system
,
4760 .fetch
= kvm_fetch_guest_virt
,
4761 .read_emulated
= emulator_read_emulated
,
4762 .write_emulated
= emulator_write_emulated
,
4763 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
4764 .invlpg
= emulator_invlpg
,
4765 .pio_in_emulated
= emulator_pio_in_emulated
,
4766 .pio_out_emulated
= emulator_pio_out_emulated
,
4767 .get_segment
= emulator_get_segment
,
4768 .set_segment
= emulator_set_segment
,
4769 .get_cached_segment_base
= emulator_get_cached_segment_base
,
4770 .get_gdt
= emulator_get_gdt
,
4771 .get_idt
= emulator_get_idt
,
4772 .set_gdt
= emulator_set_gdt
,
4773 .set_idt
= emulator_set_idt
,
4774 .get_cr
= emulator_get_cr
,
4775 .set_cr
= emulator_set_cr
,
4776 .set_rflags
= emulator_set_rflags
,
4777 .cpl
= emulator_get_cpl
,
4778 .get_dr
= emulator_get_dr
,
4779 .set_dr
= emulator_set_dr
,
4780 .set_msr
= emulator_set_msr
,
4781 .get_msr
= emulator_get_msr
,
4782 .read_pmc
= emulator_read_pmc
,
4783 .halt
= emulator_halt
,
4784 .wbinvd
= emulator_wbinvd
,
4785 .fix_hypercall
= emulator_fix_hypercall
,
4786 .get_fpu
= emulator_get_fpu
,
4787 .put_fpu
= emulator_put_fpu
,
4788 .intercept
= emulator_intercept
,
4789 .get_cpuid
= emulator_get_cpuid
,
4792 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
4794 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
, mask
);
4796 * an sti; sti; sequence only disable interrupts for the first
4797 * instruction. So, if the last instruction, be it emulated or
4798 * not, left the system with the INT_STI flag enabled, it
4799 * means that the last instruction is an sti. We should not
4800 * leave the flag on in this case. The same goes for mov ss
4802 if (!(int_shadow
& mask
))
4803 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
4806 static void inject_emulated_exception(struct kvm_vcpu
*vcpu
)
4808 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4809 if (ctxt
->exception
.vector
== PF_VECTOR
)
4810 kvm_propagate_fault(vcpu
, &ctxt
->exception
);
4811 else if (ctxt
->exception
.error_code_valid
)
4812 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
4813 ctxt
->exception
.error_code
);
4815 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
4818 static void init_decode_cache(struct x86_emulate_ctxt
*ctxt
)
4820 memset(&ctxt
->opcode_len
, 0,
4821 (void *)&ctxt
->_regs
- (void *)&ctxt
->opcode_len
);
4823 ctxt
->fetch
.start
= 0;
4824 ctxt
->fetch
.end
= 0;
4825 ctxt
->io_read
.pos
= 0;
4826 ctxt
->io_read
.end
= 0;
4827 ctxt
->mem_read
.pos
= 0;
4828 ctxt
->mem_read
.end
= 0;
4831 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
4833 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4836 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
4838 ctxt
->eflags
= kvm_get_rflags(vcpu
);
4839 ctxt
->eip
= kvm_rip_read(vcpu
);
4840 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
4841 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
4842 cs_l
? X86EMUL_MODE_PROT64
:
4843 cs_db
? X86EMUL_MODE_PROT32
:
4844 X86EMUL_MODE_PROT16
;
4845 ctxt
->guest_mode
= is_guest_mode(vcpu
);
4847 init_decode_cache(ctxt
);
4848 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
4851 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
4853 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4856 init_emulate_ctxt(vcpu
);
4860 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
4861 ret
= emulate_int_real(ctxt
, irq
);
4863 if (ret
!= X86EMUL_CONTINUE
)
4864 return EMULATE_FAIL
;
4866 ctxt
->eip
= ctxt
->_eip
;
4867 kvm_rip_write(vcpu
, ctxt
->eip
);
4868 kvm_set_rflags(vcpu
, ctxt
->eflags
);
4870 if (irq
== NMI_VECTOR
)
4871 vcpu
->arch
.nmi_pending
= 0;
4873 vcpu
->arch
.interrupt
.pending
= false;
4875 return EMULATE_DONE
;
4877 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
4879 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
4881 int r
= EMULATE_DONE
;
4883 ++vcpu
->stat
.insn_emulation_fail
;
4884 trace_kvm_emulate_insn_failed(vcpu
);
4885 if (!is_guest_mode(vcpu
)) {
4886 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
4887 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
4888 vcpu
->run
->internal
.ndata
= 0;
4891 kvm_queue_exception(vcpu
, UD_VECTOR
);
4896 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t cr2
,
4897 bool write_fault_to_shadow_pgtable
,
4903 if (emulation_type
& EMULTYPE_NO_REEXECUTE
)
4906 if (!vcpu
->arch
.mmu
.direct_map
) {
4908 * Write permission should be allowed since only
4909 * write access need to be emulated.
4911 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
4914 * If the mapping is invalid in guest, let cpu retry
4915 * it to generate fault.
4917 if (gpa
== UNMAPPED_GVA
)
4922 * Do not retry the unhandleable instruction if it faults on the
4923 * readonly host memory, otherwise it will goto a infinite loop:
4924 * retry instruction -> write #PF -> emulation fail -> retry
4925 * instruction -> ...
4927 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
4930 * If the instruction failed on the error pfn, it can not be fixed,
4931 * report the error to userspace.
4933 if (is_error_noslot_pfn(pfn
))
4936 kvm_release_pfn_clean(pfn
);
4938 /* The instructions are well-emulated on direct mmu. */
4939 if (vcpu
->arch
.mmu
.direct_map
) {
4940 unsigned int indirect_shadow_pages
;
4942 spin_lock(&vcpu
->kvm
->mmu_lock
);
4943 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
4944 spin_unlock(&vcpu
->kvm
->mmu_lock
);
4946 if (indirect_shadow_pages
)
4947 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
4953 * if emulation was due to access to shadowed page table
4954 * and it failed try to unshadow page and re-enter the
4955 * guest to let CPU execute the instruction.
4957 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
4960 * If the access faults on its page table, it can not
4961 * be fixed by unprotecting shadow page and it should
4962 * be reported to userspace.
4964 return !write_fault_to_shadow_pgtable
;
4967 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
4968 unsigned long cr2
, int emulation_type
)
4970 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4971 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2
;
4973 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
4974 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
4977 * If the emulation is caused by #PF and it is non-page_table
4978 * writing instruction, it means the VM-EXIT is caused by shadow
4979 * page protected, we can zap the shadow page and retry this
4980 * instruction directly.
4982 * Note: if the guest uses a non-page-table modifying instruction
4983 * on the PDE that points to the instruction, then we will unmap
4984 * the instruction and go to an infinite loop. So, we cache the
4985 * last retried eip and the last fault address, if we meet the eip
4986 * and the address again, we can break out of the potential infinite
4989 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
4991 if (!(emulation_type
& EMULTYPE_RETRY
))
4994 if (x86_page_table_writing_insn(ctxt
))
4997 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2
)
5000 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
5001 vcpu
->arch
.last_retry_addr
= cr2
;
5003 if (!vcpu
->arch
.mmu
.direct_map
)
5004 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5006 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5011 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
5012 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
5014 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
5023 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
5024 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
5029 static void kvm_vcpu_check_singlestep(struct kvm_vcpu
*vcpu
, int *r
)
5031 struct kvm_run
*kvm_run
= vcpu
->run
;
5034 * Use the "raw" value to see if TF was passed to the processor.
5035 * Note that the new value of the flags has not been saved yet.
5037 * This is correct even for TF set by the guest, because "the
5038 * processor will not generate this exception after the instruction
5039 * that sets the TF flag".
5041 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5043 if (unlikely(rflags
& X86_EFLAGS_TF
)) {
5044 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
5045 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_FIXED_1
;
5046 kvm_run
->debug
.arch
.pc
= vcpu
->arch
.singlestep_rip
;
5047 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5048 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5049 *r
= EMULATE_USER_EXIT
;
5051 vcpu
->arch
.emulate_ctxt
.eflags
&= ~X86_EFLAGS_TF
;
5053 * "Certain debug exceptions may clear bit 0-3. The
5054 * remaining contents of the DR6 register are never
5055 * cleared by the processor".
5057 vcpu
->arch
.dr6
&= ~15;
5058 vcpu
->arch
.dr6
|= DR6_BS
;
5059 kvm_queue_exception(vcpu
, DB_VECTOR
);
5064 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
5066 struct kvm_run
*kvm_run
= vcpu
->run
;
5067 unsigned long eip
= vcpu
->arch
.emulate_ctxt
.eip
;
5070 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
5071 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
5072 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5073 vcpu
->arch
.guest_debug_dr7
,
5077 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_FIXED_1
;
5078 kvm_run
->debug
.arch
.pc
= kvm_rip_read(vcpu
) +
5079 get_segment_base(vcpu
, VCPU_SREG_CS
);
5081 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5082 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5083 *r
= EMULATE_USER_EXIT
;
5088 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
)) {
5089 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5094 vcpu
->arch
.dr6
&= ~15;
5095 vcpu
->arch
.dr6
|= dr6
;
5096 kvm_queue_exception(vcpu
, DB_VECTOR
);
5105 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
5112 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5113 bool writeback
= true;
5114 bool write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
5117 * Clear write_fault_to_shadow_pgtable here to ensure it is
5120 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
5121 kvm_clear_exception_queue(vcpu
);
5123 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
5124 init_emulate_ctxt(vcpu
);
5127 * We will reenter on the same instruction since
5128 * we do not set complete_userspace_io. This does not
5129 * handle watchpoints yet, those would be handled in
5132 if (kvm_vcpu_check_breakpoint(vcpu
, &r
))
5135 ctxt
->interruptibility
= 0;
5136 ctxt
->have_exception
= false;
5137 ctxt
->perm_ok
= false;
5139 ctxt
->ud
= emulation_type
& EMULTYPE_TRAP_UD
;
5141 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
5143 trace_kvm_emulate_insn_start(vcpu
);
5144 ++vcpu
->stat
.insn_emulation
;
5145 if (r
!= EMULATION_OK
) {
5146 if (emulation_type
& EMULTYPE_TRAP_UD
)
5147 return EMULATE_FAIL
;
5148 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5150 return EMULATE_DONE
;
5151 if (emulation_type
& EMULTYPE_SKIP
)
5152 return EMULATE_FAIL
;
5153 return handle_emulation_failure(vcpu
);
5157 if (emulation_type
& EMULTYPE_SKIP
) {
5158 kvm_rip_write(vcpu
, ctxt
->_eip
);
5159 return EMULATE_DONE
;
5162 if (retry_instruction(ctxt
, cr2
, emulation_type
))
5163 return EMULATE_DONE
;
5165 /* this is needed for vmware backdoor interface to work since it
5166 changes registers values during IO operation */
5167 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
5168 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5169 emulator_invalidate_register_cache(ctxt
);
5173 r
= x86_emulate_insn(ctxt
);
5175 if (r
== EMULATION_INTERCEPTED
)
5176 return EMULATE_DONE
;
5178 if (r
== EMULATION_FAILED
) {
5179 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5181 return EMULATE_DONE
;
5183 return handle_emulation_failure(vcpu
);
5186 if (ctxt
->have_exception
) {
5187 inject_emulated_exception(vcpu
);
5189 } else if (vcpu
->arch
.pio
.count
) {
5190 if (!vcpu
->arch
.pio
.in
) {
5191 /* FIXME: return into emulator if single-stepping. */
5192 vcpu
->arch
.pio
.count
= 0;
5195 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
5197 r
= EMULATE_USER_EXIT
;
5198 } else if (vcpu
->mmio_needed
) {
5199 if (!vcpu
->mmio_is_write
)
5201 r
= EMULATE_USER_EXIT
;
5202 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
5203 } else if (r
== EMULATION_RESTART
)
5209 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
5210 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5211 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5212 kvm_rip_write(vcpu
, ctxt
->eip
);
5213 if (r
== EMULATE_DONE
)
5214 kvm_vcpu_check_singlestep(vcpu
, &r
);
5215 kvm_set_rflags(vcpu
, ctxt
->eflags
);
5217 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
5221 EXPORT_SYMBOL_GPL(x86_emulate_instruction
);
5223 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5225 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5226 int ret
= emulator_pio_out_emulated(&vcpu
->arch
.emulate_ctxt
,
5227 size
, port
, &val
, 1);
5228 /* do not return to emulator after return from userspace */
5229 vcpu
->arch
.pio
.count
= 0;
5232 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
5234 static void tsc_bad(void *info
)
5236 __this_cpu_write(cpu_tsc_khz
, 0);
5239 static void tsc_khz_changed(void *data
)
5241 struct cpufreq_freqs
*freq
= data
;
5242 unsigned long khz
= 0;
5246 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5247 khz
= cpufreq_quick_get(raw_smp_processor_id());
5250 __this_cpu_write(cpu_tsc_khz
, khz
);
5253 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
5256 struct cpufreq_freqs
*freq
= data
;
5258 struct kvm_vcpu
*vcpu
;
5259 int i
, send_ipi
= 0;
5262 * We allow guests to temporarily run on slowing clocks,
5263 * provided we notify them after, or to run on accelerating
5264 * clocks, provided we notify them before. Thus time never
5267 * However, we have a problem. We can't atomically update
5268 * the frequency of a given CPU from this function; it is
5269 * merely a notifier, which can be called from any CPU.
5270 * Changing the TSC frequency at arbitrary points in time
5271 * requires a recomputation of local variables related to
5272 * the TSC for each VCPU. We must flag these local variables
5273 * to be updated and be sure the update takes place with the
5274 * new frequency before any guests proceed.
5276 * Unfortunately, the combination of hotplug CPU and frequency
5277 * change creates an intractable locking scenario; the order
5278 * of when these callouts happen is undefined with respect to
5279 * CPU hotplug, and they can race with each other. As such,
5280 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5281 * undefined; you can actually have a CPU frequency change take
5282 * place in between the computation of X and the setting of the
5283 * variable. To protect against this problem, all updates of
5284 * the per_cpu tsc_khz variable are done in an interrupt
5285 * protected IPI, and all callers wishing to update the value
5286 * must wait for a synchronous IPI to complete (which is trivial
5287 * if the caller is on the CPU already). This establishes the
5288 * necessary total order on variable updates.
5290 * Note that because a guest time update may take place
5291 * anytime after the setting of the VCPU's request bit, the
5292 * correct TSC value must be set before the request. However,
5293 * to ensure the update actually makes it to any guest which
5294 * starts running in hardware virtualization between the set
5295 * and the acquisition of the spinlock, we must also ping the
5296 * CPU after setting the request bit.
5300 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
5302 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
5305 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5307 spin_lock(&kvm_lock
);
5308 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
5309 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
5310 if (vcpu
->cpu
!= freq
->cpu
)
5312 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
5313 if (vcpu
->cpu
!= smp_processor_id())
5317 spin_unlock(&kvm_lock
);
5319 if (freq
->old
< freq
->new && send_ipi
) {
5321 * We upscale the frequency. Must make the guest
5322 * doesn't see old kvmclock values while running with
5323 * the new frequency, otherwise we risk the guest sees
5324 * time go backwards.
5326 * In case we update the frequency for another cpu
5327 * (which might be in guest context) send an interrupt
5328 * to kick the cpu out of guest context. Next time
5329 * guest context is entered kvmclock will be updated,
5330 * so the guest will not see stale values.
5332 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5337 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
5338 .notifier_call
= kvmclock_cpufreq_notifier
5341 static int kvmclock_cpu_notifier(struct notifier_block
*nfb
,
5342 unsigned long action
, void *hcpu
)
5344 unsigned int cpu
= (unsigned long)hcpu
;
5348 case CPU_DOWN_FAILED
:
5349 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
5351 case CPU_DOWN_PREPARE
:
5352 smp_call_function_single(cpu
, tsc_bad
, NULL
, 1);
5358 static struct notifier_block kvmclock_cpu_notifier_block
= {
5359 .notifier_call
= kvmclock_cpu_notifier
,
5360 .priority
= -INT_MAX
5363 static void kvm_timer_init(void)
5367 max_tsc_khz
= tsc_khz
;
5368 register_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
5369 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
5370 #ifdef CONFIG_CPU_FREQ
5371 struct cpufreq_policy policy
;
5372 memset(&policy
, 0, sizeof(policy
));
5374 cpufreq_get_policy(&policy
, cpu
);
5375 if (policy
.cpuinfo
.max_freq
)
5376 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
5379 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
5380 CPUFREQ_TRANSITION_NOTIFIER
);
5382 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
5383 for_each_online_cpu(cpu
)
5384 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
5387 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
5389 int kvm_is_in_guest(void)
5391 return __this_cpu_read(current_vcpu
) != NULL
;
5394 static int kvm_is_user_mode(void)
5398 if (__this_cpu_read(current_vcpu
))
5399 user_mode
= kvm_x86_ops
->get_cpl(__this_cpu_read(current_vcpu
));
5401 return user_mode
!= 0;
5404 static unsigned long kvm_get_guest_ip(void)
5406 unsigned long ip
= 0;
5408 if (__this_cpu_read(current_vcpu
))
5409 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
5414 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
5415 .is_in_guest
= kvm_is_in_guest
,
5416 .is_user_mode
= kvm_is_user_mode
,
5417 .get_guest_ip
= kvm_get_guest_ip
,
5420 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
5422 __this_cpu_write(current_vcpu
, vcpu
);
5424 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
5426 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
5428 __this_cpu_write(current_vcpu
, NULL
);
5430 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
5432 static void kvm_set_mmio_spte_mask(void)
5435 int maxphyaddr
= boot_cpu_data
.x86_phys_bits
;
5438 * Set the reserved bits and the present bit of an paging-structure
5439 * entry to generate page fault with PFER.RSV = 1.
5441 /* Mask the reserved physical address bits. */
5442 mask
= ((1ull << (51 - maxphyaddr
+ 1)) - 1) << maxphyaddr
;
5444 /* Bit 62 is always reserved for 32bit host. */
5445 mask
|= 0x3ull
<< 62;
5447 /* Set the present bit. */
5450 #ifdef CONFIG_X86_64
5452 * If reserved bit is not supported, clear the present bit to disable
5455 if (maxphyaddr
== 52)
5459 kvm_mmu_set_mmio_spte_mask(mask
);
5462 #ifdef CONFIG_X86_64
5463 static void pvclock_gtod_update_fn(struct work_struct
*work
)
5467 struct kvm_vcpu
*vcpu
;
5470 spin_lock(&kvm_lock
);
5471 list_for_each_entry(kvm
, &vm_list
, vm_list
)
5472 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5473 set_bit(KVM_REQ_MASTERCLOCK_UPDATE
, &vcpu
->requests
);
5474 atomic_set(&kvm_guest_has_master_clock
, 0);
5475 spin_unlock(&kvm_lock
);
5478 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
5481 * Notification about pvclock gtod data update.
5483 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
5486 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
5487 struct timekeeper
*tk
= priv
;
5489 update_pvclock_gtod(tk
);
5491 /* disable master clock if host does not trust, or does not
5492 * use, TSC clocksource
5494 if (gtod
->clock
.vclock_mode
!= VCLOCK_TSC
&&
5495 atomic_read(&kvm_guest_has_master_clock
) != 0)
5496 queue_work(system_long_wq
, &pvclock_gtod_work
);
5501 static struct notifier_block pvclock_gtod_notifier
= {
5502 .notifier_call
= pvclock_gtod_notify
,
5506 int kvm_arch_init(void *opaque
)
5509 struct kvm_x86_ops
*ops
= opaque
;
5512 printk(KERN_ERR
"kvm: already loaded the other module\n");
5517 if (!ops
->cpu_has_kvm_support()) {
5518 printk(KERN_ERR
"kvm: no hardware support\n");
5522 if (ops
->disabled_by_bios()) {
5523 printk(KERN_ERR
"kvm: disabled by bios\n");
5529 shared_msrs
= alloc_percpu(struct kvm_shared_msrs
);
5531 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_shared_msrs\n");
5535 r
= kvm_mmu_module_init();
5537 goto out_free_percpu
;
5539 kvm_set_mmio_spte_mask();
5540 kvm_init_msr_list();
5543 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
5544 PT_DIRTY_MASK
, PT64_NX_MASK
, 0);
5548 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
5551 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
5554 #ifdef CONFIG_X86_64
5555 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
5561 free_percpu(shared_msrs
);
5566 void kvm_arch_exit(void)
5568 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
5570 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5571 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
5572 CPUFREQ_TRANSITION_NOTIFIER
);
5573 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
5574 #ifdef CONFIG_X86_64
5575 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
5578 kvm_mmu_module_exit();
5579 free_percpu(shared_msrs
);
5582 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
5584 ++vcpu
->stat
.halt_exits
;
5585 if (irqchip_in_kernel(vcpu
->kvm
)) {
5586 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
5589 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
5593 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
5595 int kvm_hv_hypercall(struct kvm_vcpu
*vcpu
)
5597 u64 param
, ingpa
, outgpa
, ret
;
5598 uint16_t code
, rep_idx
, rep_cnt
, res
= HV_STATUS_SUCCESS
, rep_done
= 0;
5599 bool fast
, longmode
;
5603 * hypercall generates UD from non zero cpl and real mode
5606 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 || !is_protmode(vcpu
)) {
5607 kvm_queue_exception(vcpu
, UD_VECTOR
);
5611 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
5612 longmode
= is_long_mode(vcpu
) && cs_l
== 1;
5615 param
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDX
) << 32) |
5616 (kvm_register_read(vcpu
, VCPU_REGS_RAX
) & 0xffffffff);
5617 ingpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RBX
) << 32) |
5618 (kvm_register_read(vcpu
, VCPU_REGS_RCX
) & 0xffffffff);
5619 outgpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDI
) << 32) |
5620 (kvm_register_read(vcpu
, VCPU_REGS_RSI
) & 0xffffffff);
5622 #ifdef CONFIG_X86_64
5624 param
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5625 ingpa
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5626 outgpa
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
5630 code
= param
& 0xffff;
5631 fast
= (param
>> 16) & 0x1;
5632 rep_cnt
= (param
>> 32) & 0xfff;
5633 rep_idx
= (param
>> 48) & 0xfff;
5635 trace_kvm_hv_hypercall(code
, fast
, rep_cnt
, rep_idx
, ingpa
, outgpa
);
5638 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT
:
5639 kvm_vcpu_on_spin(vcpu
);
5642 res
= HV_STATUS_INVALID_HYPERCALL_CODE
;
5646 ret
= res
| (((u64
)rep_done
& 0xfff) << 32);
5648 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
5650 kvm_register_write(vcpu
, VCPU_REGS_RDX
, ret
>> 32);
5651 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
& 0xffffffff);
5658 * kvm_pv_kick_cpu_op: Kick a vcpu.
5660 * @apicid - apicid of vcpu to be kicked.
5662 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
5664 struct kvm_lapic_irq lapic_irq
;
5666 lapic_irq
.shorthand
= 0;
5667 lapic_irq
.dest_mode
= 0;
5668 lapic_irq
.dest_id
= apicid
;
5670 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
5671 kvm_irq_delivery_to_apic(kvm
, 0, &lapic_irq
, NULL
);
5674 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
5676 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
5679 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
5680 return kvm_hv_hypercall(vcpu
);
5682 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5683 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
5684 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5685 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5686 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
5688 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
5690 if (!is_long_mode(vcpu
)) {
5698 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
5704 case KVM_HC_VAPIC_POLL_IRQ
:
5707 case KVM_HC_KICK_CPU
:
5708 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
5716 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
5717 ++vcpu
->stat
.hypercalls
;
5720 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
5722 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
5724 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5725 char instruction
[3];
5726 unsigned long rip
= kvm_rip_read(vcpu
);
5728 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
5730 return emulator_write_emulated(ctxt
, rip
, instruction
, 3, NULL
);
5734 * Check if userspace requested an interrupt window, and that the
5735 * interrupt window is open.
5737 * No need to exit to userspace if we already have an interrupt queued.
5739 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
5741 return (!irqchip_in_kernel(vcpu
->kvm
) && !kvm_cpu_has_interrupt(vcpu
) &&
5742 vcpu
->run
->request_interrupt_window
&&
5743 kvm_arch_interrupt_allowed(vcpu
));
5746 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
5748 struct kvm_run
*kvm_run
= vcpu
->run
;
5750 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
5751 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
5752 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
5753 if (irqchip_in_kernel(vcpu
->kvm
))
5754 kvm_run
->ready_for_interrupt_injection
= 1;
5756 kvm_run
->ready_for_interrupt_injection
=
5757 kvm_arch_interrupt_allowed(vcpu
) &&
5758 !kvm_cpu_has_interrupt(vcpu
) &&
5759 !kvm_event_needs_reinjection(vcpu
);
5762 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
5766 if (!kvm_x86_ops
->update_cr8_intercept
)
5769 if (!vcpu
->arch
.apic
)
5772 if (!vcpu
->arch
.apic
->vapic_addr
)
5773 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
5780 tpr
= kvm_lapic_get_cr8(vcpu
);
5782 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
5785 static void inject_pending_event(struct kvm_vcpu
*vcpu
)
5787 /* try to reinject previous events if any */
5788 if (vcpu
->arch
.exception
.pending
) {
5789 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
5790 vcpu
->arch
.exception
.has_error_code
,
5791 vcpu
->arch
.exception
.error_code
);
5792 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
5793 vcpu
->arch
.exception
.has_error_code
,
5794 vcpu
->arch
.exception
.error_code
,
5795 vcpu
->arch
.exception
.reinject
);
5799 if (vcpu
->arch
.nmi_injected
) {
5800 kvm_x86_ops
->set_nmi(vcpu
);
5804 if (vcpu
->arch
.interrupt
.pending
) {
5805 kvm_x86_ops
->set_irq(vcpu
);
5809 /* try to inject new event if pending */
5810 if (vcpu
->arch
.nmi_pending
) {
5811 if (kvm_x86_ops
->nmi_allowed(vcpu
)) {
5812 --vcpu
->arch
.nmi_pending
;
5813 vcpu
->arch
.nmi_injected
= true;
5814 kvm_x86_ops
->set_nmi(vcpu
);
5816 } else if (kvm_cpu_has_injectable_intr(vcpu
)) {
5817 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
5818 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
5820 kvm_x86_ops
->set_irq(vcpu
);
5825 static void process_nmi(struct kvm_vcpu
*vcpu
)
5830 * x86 is limited to one NMI running, and one NMI pending after it.
5831 * If an NMI is already in progress, limit further NMIs to just one.
5832 * Otherwise, allow two (and we'll inject the first one immediately).
5834 if (kvm_x86_ops
->get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
5837 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
5838 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
5839 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5842 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
5844 u64 eoi_exit_bitmap
[4];
5847 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
5850 memset(eoi_exit_bitmap
, 0, 32);
5853 kvm_ioapic_scan_entry(vcpu
, eoi_exit_bitmap
, tmr
);
5854 kvm_x86_ops
->load_eoi_exitmap(vcpu
, eoi_exit_bitmap
);
5855 kvm_apic_update_tmr(vcpu
, tmr
);
5859 * Returns 1 to let __vcpu_run() continue the guest execution loop without
5860 * exiting to the userspace. Otherwise, the value will be returned to the
5863 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
5866 bool req_int_win
= !irqchip_in_kernel(vcpu
->kvm
) &&
5867 vcpu
->run
->request_interrupt_window
;
5868 bool req_immediate_exit
= false;
5870 if (vcpu
->requests
) {
5871 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
5872 kvm_mmu_unload(vcpu
);
5873 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
5874 __kvm_migrate_timers(vcpu
);
5875 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
5876 kvm_gen_update_masterclock(vcpu
->kvm
);
5877 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
5878 kvm_gen_kvmclock_update(vcpu
);
5879 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
5880 r
= kvm_guest_time_update(vcpu
);
5884 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
5885 kvm_mmu_sync_roots(vcpu
);
5886 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
5887 kvm_x86_ops
->tlb_flush(vcpu
);
5888 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
5889 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
5893 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
5894 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
5898 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
)) {
5899 vcpu
->fpu_active
= 0;
5900 kvm_x86_ops
->fpu_deactivate(vcpu
);
5902 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
5903 /* Page is swapped out. Do synthetic halt */
5904 vcpu
->arch
.apf
.halted
= true;
5908 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
5909 record_steal_time(vcpu
);
5910 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
5912 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
5913 kvm_handle_pmu_event(vcpu
);
5914 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
5915 kvm_deliver_pmi(vcpu
);
5916 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
5917 vcpu_scan_ioapic(vcpu
);
5920 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
5921 kvm_apic_accept_events(vcpu
);
5922 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
5927 inject_pending_event(vcpu
);
5929 /* enable NMI/IRQ window open exits if needed */
5930 if (vcpu
->arch
.nmi_pending
)
5931 req_immediate_exit
=
5932 kvm_x86_ops
->enable_nmi_window(vcpu
) != 0;
5933 else if (kvm_cpu_has_injectable_intr(vcpu
) || req_int_win
)
5934 req_immediate_exit
=
5935 kvm_x86_ops
->enable_irq_window(vcpu
) != 0;
5937 if (kvm_lapic_enabled(vcpu
)) {
5939 * Update architecture specific hints for APIC
5940 * virtual interrupt delivery.
5942 if (kvm_x86_ops
->hwapic_irr_update
)
5943 kvm_x86_ops
->hwapic_irr_update(vcpu
,
5944 kvm_lapic_find_highest_irr(vcpu
));
5945 update_cr8_intercept(vcpu
);
5946 kvm_lapic_sync_to_vapic(vcpu
);
5950 r
= kvm_mmu_reload(vcpu
);
5952 goto cancel_injection
;
5957 kvm_x86_ops
->prepare_guest_switch(vcpu
);
5958 if (vcpu
->fpu_active
)
5959 kvm_load_guest_fpu(vcpu
);
5960 kvm_load_guest_xcr0(vcpu
);
5962 vcpu
->mode
= IN_GUEST_MODE
;
5964 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
5966 /* We should set ->mode before check ->requests,
5967 * see the comment in make_all_cpus_request.
5969 smp_mb__after_srcu_read_unlock();
5971 local_irq_disable();
5973 if (vcpu
->mode
== EXITING_GUEST_MODE
|| vcpu
->requests
5974 || need_resched() || signal_pending(current
)) {
5975 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
5979 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5981 goto cancel_injection
;
5984 if (req_immediate_exit
)
5985 smp_send_reschedule(vcpu
->cpu
);
5989 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
5991 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
5992 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
5993 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
5994 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
5997 trace_kvm_entry(vcpu
->vcpu_id
);
5998 kvm_x86_ops
->run(vcpu
);
6001 * If the guest has used debug registers, at least dr7
6002 * will be disabled while returning to the host.
6003 * If we don't have active breakpoints in the host, we don't
6004 * care about the messed up debug address registers. But if
6005 * we have some of them active, restore the old state.
6007 if (hw_breakpoint_active())
6008 hw_breakpoint_restore();
6010 vcpu
->arch
.last_guest_tsc
= kvm_x86_ops
->read_l1_tsc(vcpu
,
6013 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6016 /* Interrupt is enabled by handle_external_intr() */
6017 kvm_x86_ops
->handle_external_intr(vcpu
);
6022 * We must have an instruction between local_irq_enable() and
6023 * kvm_guest_exit(), so the timer interrupt isn't delayed by
6024 * the interrupt shadow. The stat.exits increment will do nicely.
6025 * But we need to prevent reordering, hence this barrier():
6033 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6036 * Profile KVM exit RIPs:
6038 if (unlikely(prof_on
== KVM_PROFILING
)) {
6039 unsigned long rip
= kvm_rip_read(vcpu
);
6040 profile_hit(KVM_PROFILING
, (void *)rip
);
6043 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
6044 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
6046 if (vcpu
->arch
.apic_attention
)
6047 kvm_lapic_sync_from_vapic(vcpu
);
6049 r
= kvm_x86_ops
->handle_exit(vcpu
);
6053 kvm_x86_ops
->cancel_injection(vcpu
);
6054 if (unlikely(vcpu
->arch
.apic_attention
))
6055 kvm_lapic_sync_from_vapic(vcpu
);
6061 static int __vcpu_run(struct kvm_vcpu
*vcpu
)
6064 struct kvm
*kvm
= vcpu
->kvm
;
6066 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6070 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
6071 !vcpu
->arch
.apf
.halted
)
6072 r
= vcpu_enter_guest(vcpu
);
6074 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6075 kvm_vcpu_block(vcpu
);
6076 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6077 if (kvm_check_request(KVM_REQ_UNHALT
, vcpu
)) {
6078 kvm_apic_accept_events(vcpu
);
6079 switch(vcpu
->arch
.mp_state
) {
6080 case KVM_MP_STATE_HALTED
:
6081 vcpu
->arch
.pv
.pv_unhalted
= false;
6082 vcpu
->arch
.mp_state
=
6083 KVM_MP_STATE_RUNNABLE
;
6084 case KVM_MP_STATE_RUNNABLE
:
6085 vcpu
->arch
.apf
.halted
= false;
6087 case KVM_MP_STATE_INIT_RECEIVED
:
6099 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
6100 if (kvm_cpu_has_pending_timer(vcpu
))
6101 kvm_inject_pending_timer_irqs(vcpu
);
6103 if (dm_request_for_irq_injection(vcpu
)) {
6105 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
6106 ++vcpu
->stat
.request_irq_exits
;
6109 kvm_check_async_pf_completion(vcpu
);
6111 if (signal_pending(current
)) {
6113 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
6114 ++vcpu
->stat
.signal_exits
;
6116 if (need_resched()) {
6117 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6119 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6123 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6128 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
6131 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6132 r
= emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
6133 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6134 if (r
!= EMULATE_DONE
)
6139 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
6141 BUG_ON(!vcpu
->arch
.pio
.count
);
6143 return complete_emulated_io(vcpu
);
6147 * Implements the following, as a state machine:
6151 * for each mmio piece in the fragment
6159 * for each mmio piece in the fragment
6164 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
6166 struct kvm_run
*run
= vcpu
->run
;
6167 struct kvm_mmio_fragment
*frag
;
6170 BUG_ON(!vcpu
->mmio_needed
);
6172 /* Complete previous fragment */
6173 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
6174 len
= min(8u, frag
->len
);
6175 if (!vcpu
->mmio_is_write
)
6176 memcpy(frag
->data
, run
->mmio
.data
, len
);
6178 if (frag
->len
<= 8) {
6179 /* Switch to the next fragment. */
6181 vcpu
->mmio_cur_fragment
++;
6183 /* Go forward to the next mmio piece. */
6189 if (vcpu
->mmio_cur_fragment
== vcpu
->mmio_nr_fragments
) {
6190 vcpu
->mmio_needed
= 0;
6192 /* FIXME: return into emulator if single-stepping. */
6193 if (vcpu
->mmio_is_write
)
6195 vcpu
->mmio_read_completed
= 1;
6196 return complete_emulated_io(vcpu
);
6199 run
->exit_reason
= KVM_EXIT_MMIO
;
6200 run
->mmio
.phys_addr
= frag
->gpa
;
6201 if (vcpu
->mmio_is_write
)
6202 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
6203 run
->mmio
.len
= min(8u, frag
->len
);
6204 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
6205 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
6210 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
6215 if (!tsk_used_math(current
) && init_fpu(current
))
6218 if (vcpu
->sigset_active
)
6219 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
6221 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
6222 kvm_vcpu_block(vcpu
);
6223 kvm_apic_accept_events(vcpu
);
6224 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
6229 /* re-sync apic's tpr */
6230 if (!irqchip_in_kernel(vcpu
->kvm
)) {
6231 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
6237 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
6238 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
6239 vcpu
->arch
.complete_userspace_io
= NULL
;
6244 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
6246 r
= __vcpu_run(vcpu
);
6249 post_kvm_run_save(vcpu
);
6250 if (vcpu
->sigset_active
)
6251 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
6256 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
6258 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
6260 * We are here if userspace calls get_regs() in the middle of
6261 * instruction emulation. Registers state needs to be copied
6262 * back from emulation context to vcpu. Userspace shouldn't do
6263 * that usually, but some bad designed PV devices (vmware
6264 * backdoor interface) need this to work
6266 emulator_writeback_register_cache(&vcpu
->arch
.emulate_ctxt
);
6267 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
6269 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
6270 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
6271 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
6272 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
6273 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
6274 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
6275 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
6276 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
6277 #ifdef CONFIG_X86_64
6278 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
6279 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
6280 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
6281 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
6282 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
6283 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
6284 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
6285 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
6288 regs
->rip
= kvm_rip_read(vcpu
);
6289 regs
->rflags
= kvm_get_rflags(vcpu
);
6294 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
6296 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
6297 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
6299 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
6300 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
6301 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
6302 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
6303 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
6304 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
6305 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
6306 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
6307 #ifdef CONFIG_X86_64
6308 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
6309 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
6310 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
6311 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
6312 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
6313 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
6314 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
6315 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
6318 kvm_rip_write(vcpu
, regs
->rip
);
6319 kvm_set_rflags(vcpu
, regs
->rflags
);
6321 vcpu
->arch
.exception
.pending
= false;
6323 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6328 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
6330 struct kvm_segment cs
;
6332 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6336 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
6338 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
6339 struct kvm_sregs
*sregs
)
6343 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
6344 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
6345 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
6346 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
6347 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
6348 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
6350 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
6351 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
6353 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6354 sregs
->idt
.limit
= dt
.size
;
6355 sregs
->idt
.base
= dt
.address
;
6356 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6357 sregs
->gdt
.limit
= dt
.size
;
6358 sregs
->gdt
.base
= dt
.address
;
6360 sregs
->cr0
= kvm_read_cr0(vcpu
);
6361 sregs
->cr2
= vcpu
->arch
.cr2
;
6362 sregs
->cr3
= kvm_read_cr3(vcpu
);
6363 sregs
->cr4
= kvm_read_cr4(vcpu
);
6364 sregs
->cr8
= kvm_get_cr8(vcpu
);
6365 sregs
->efer
= vcpu
->arch
.efer
;
6366 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
6368 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
6370 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
6371 set_bit(vcpu
->arch
.interrupt
.nr
,
6372 (unsigned long *)sregs
->interrupt_bitmap
);
6377 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
6378 struct kvm_mp_state
*mp_state
)
6380 kvm_apic_accept_events(vcpu
);
6381 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
&&
6382 vcpu
->arch
.pv
.pv_unhalted
)
6383 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
6385 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
6390 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
6391 struct kvm_mp_state
*mp_state
)
6393 if (!kvm_vcpu_has_lapic(vcpu
) &&
6394 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
6397 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
6398 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
6399 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
6401 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
6402 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6406 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
6407 int reason
, bool has_error_code
, u32 error_code
)
6409 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
6412 init_emulate_ctxt(vcpu
);
6414 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
6415 has_error_code
, error_code
);
6418 return EMULATE_FAIL
;
6420 kvm_rip_write(vcpu
, ctxt
->eip
);
6421 kvm_set_rflags(vcpu
, ctxt
->eflags
);
6422 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6423 return EMULATE_DONE
;
6425 EXPORT_SYMBOL_GPL(kvm_task_switch
);
6427 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
6428 struct kvm_sregs
*sregs
)
6430 struct msr_data apic_base_msr
;
6431 int mmu_reset_needed
= 0;
6432 int pending_vec
, max_bits
, idx
;
6435 if (!guest_cpuid_has_xsave(vcpu
) && (sregs
->cr4
& X86_CR4_OSXSAVE
))
6438 dt
.size
= sregs
->idt
.limit
;
6439 dt
.address
= sregs
->idt
.base
;
6440 kvm_x86_ops
->set_idt(vcpu
, &dt
);
6441 dt
.size
= sregs
->gdt
.limit
;
6442 dt
.address
= sregs
->gdt
.base
;
6443 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
6445 vcpu
->arch
.cr2
= sregs
->cr2
;
6446 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
6447 vcpu
->arch
.cr3
= sregs
->cr3
;
6448 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
6450 kvm_set_cr8(vcpu
, sregs
->cr8
);
6452 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
6453 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
6454 apic_base_msr
.data
= sregs
->apic_base
;
6455 apic_base_msr
.host_initiated
= true;
6456 kvm_set_apic_base(vcpu
, &apic_base_msr
);
6458 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
6459 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
6460 vcpu
->arch
.cr0
= sregs
->cr0
;
6462 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
6463 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
6464 if (sregs
->cr4
& X86_CR4_OSXSAVE
)
6465 kvm_update_cpuid(vcpu
);
6467 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6468 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
6469 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
6470 mmu_reset_needed
= 1;
6472 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
6474 if (mmu_reset_needed
)
6475 kvm_mmu_reset_context(vcpu
);
6477 max_bits
= KVM_NR_INTERRUPTS
;
6478 pending_vec
= find_first_bit(
6479 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
6480 if (pending_vec
< max_bits
) {
6481 kvm_queue_interrupt(vcpu
, pending_vec
, false);
6482 pr_debug("Set back pending irq %d\n", pending_vec
);
6485 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
6486 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
6487 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
6488 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
6489 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
6490 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
6492 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
6493 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
6495 update_cr8_intercept(vcpu
);
6497 /* Older userspace won't unhalt the vcpu on reset. */
6498 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
6499 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
6501 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
6503 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6508 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
6509 struct kvm_guest_debug
*dbg
)
6511 unsigned long rflags
;
6514 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
6516 if (vcpu
->arch
.exception
.pending
)
6518 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
6519 kvm_queue_exception(vcpu
, DB_VECTOR
);
6521 kvm_queue_exception(vcpu
, BP_VECTOR
);
6525 * Read rflags as long as potentially injected trace flags are still
6528 rflags
= kvm_get_rflags(vcpu
);
6530 vcpu
->guest_debug
= dbg
->control
;
6531 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
6532 vcpu
->guest_debug
= 0;
6534 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
6535 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
6536 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
6537 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
6539 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
6540 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
6542 kvm_update_dr7(vcpu
);
6544 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
6545 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
6546 get_segment_base(vcpu
, VCPU_SREG_CS
);
6549 * Trigger an rflags update that will inject or remove the trace
6552 kvm_set_rflags(vcpu
, rflags
);
6554 kvm_x86_ops
->update_db_bp_intercept(vcpu
);
6564 * Translate a guest virtual address to a guest physical address.
6566 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
6567 struct kvm_translation
*tr
)
6569 unsigned long vaddr
= tr
->linear_address
;
6573 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6574 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
6575 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
6576 tr
->physical_address
= gpa
;
6577 tr
->valid
= gpa
!= UNMAPPED_GVA
;
6584 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
6586 struct i387_fxsave_struct
*fxsave
=
6587 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
6589 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
6590 fpu
->fcw
= fxsave
->cwd
;
6591 fpu
->fsw
= fxsave
->swd
;
6592 fpu
->ftwx
= fxsave
->twd
;
6593 fpu
->last_opcode
= fxsave
->fop
;
6594 fpu
->last_ip
= fxsave
->rip
;
6595 fpu
->last_dp
= fxsave
->rdp
;
6596 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
6601 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
6603 struct i387_fxsave_struct
*fxsave
=
6604 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
6606 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
6607 fxsave
->cwd
= fpu
->fcw
;
6608 fxsave
->swd
= fpu
->fsw
;
6609 fxsave
->twd
= fpu
->ftwx
;
6610 fxsave
->fop
= fpu
->last_opcode
;
6611 fxsave
->rip
= fpu
->last_ip
;
6612 fxsave
->rdp
= fpu
->last_dp
;
6613 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
6618 int fx_init(struct kvm_vcpu
*vcpu
)
6622 err
= fpu_alloc(&vcpu
->arch
.guest_fpu
);
6626 fpu_finit(&vcpu
->arch
.guest_fpu
);
6629 * Ensure guest xcr0 is valid for loading
6631 vcpu
->arch
.xcr0
= XSTATE_FP
;
6633 vcpu
->arch
.cr0
|= X86_CR0_ET
;
6637 EXPORT_SYMBOL_GPL(fx_init
);
6639 static void fx_free(struct kvm_vcpu
*vcpu
)
6641 fpu_free(&vcpu
->arch
.guest_fpu
);
6644 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
6646 if (vcpu
->guest_fpu_loaded
)
6650 * Restore all possible states in the guest,
6651 * and assume host would use all available bits.
6652 * Guest xcr0 would be loaded later.
6654 kvm_put_guest_xcr0(vcpu
);
6655 vcpu
->guest_fpu_loaded
= 1;
6656 __kernel_fpu_begin();
6657 fpu_restore_checking(&vcpu
->arch
.guest_fpu
);
6661 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
6663 kvm_put_guest_xcr0(vcpu
);
6665 if (!vcpu
->guest_fpu_loaded
)
6668 vcpu
->guest_fpu_loaded
= 0;
6669 fpu_save_init(&vcpu
->arch
.guest_fpu
);
6671 ++vcpu
->stat
.fpu_reload
;
6672 kvm_make_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
);
6676 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
6678 kvmclock_reset(vcpu
);
6680 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
6682 kvm_x86_ops
->vcpu_free(vcpu
);
6685 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
6688 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
6689 printk_once(KERN_WARNING
6690 "kvm: SMP vm created on host with unstable TSC; "
6691 "guest TSC will not be reliable\n");
6692 return kvm_x86_ops
->vcpu_create(kvm
, id
);
6695 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
6699 vcpu
->arch
.mtrr_state
.have_fixed
= 1;
6700 r
= vcpu_load(vcpu
);
6703 kvm_vcpu_reset(vcpu
);
6704 kvm_mmu_setup(vcpu
);
6710 int kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
6713 struct msr_data msr
;
6715 r
= vcpu_load(vcpu
);
6719 msr
.index
= MSR_IA32_TSC
;
6720 msr
.host_initiated
= true;
6721 kvm_write_tsc(vcpu
, &msr
);
6727 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
6730 vcpu
->arch
.apf
.msr_val
= 0;
6732 r
= vcpu_load(vcpu
);
6734 kvm_mmu_unload(vcpu
);
6738 kvm_x86_ops
->vcpu_free(vcpu
);
6741 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
)
6743 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
6744 vcpu
->arch
.nmi_pending
= 0;
6745 vcpu
->arch
.nmi_injected
= false;
6747 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
6748 vcpu
->arch
.dr6
= DR6_FIXED_1
;
6749 kvm_update_dr6(vcpu
);
6750 vcpu
->arch
.dr7
= DR7_FIXED_1
;
6751 kvm_update_dr7(vcpu
);
6753 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6754 vcpu
->arch
.apf
.msr_val
= 0;
6755 vcpu
->arch
.st
.msr_val
= 0;
6757 kvmclock_reset(vcpu
);
6759 kvm_clear_async_pf_completion_queue(vcpu
);
6760 kvm_async_pf_hash_reset(vcpu
);
6761 vcpu
->arch
.apf
.halted
= false;
6763 kvm_pmu_reset(vcpu
);
6765 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
6766 vcpu
->arch
.regs_avail
= ~0;
6767 vcpu
->arch
.regs_dirty
= ~0;
6769 kvm_x86_ops
->vcpu_reset(vcpu
);
6772 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, unsigned int vector
)
6774 struct kvm_segment cs
;
6776 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6777 cs
.selector
= vector
<< 8;
6778 cs
.base
= vector
<< 12;
6779 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6780 kvm_rip_write(vcpu
, 0);
6783 int kvm_arch_hardware_enable(void *garbage
)
6786 struct kvm_vcpu
*vcpu
;
6791 bool stable
, backwards_tsc
= false;
6793 kvm_shared_msr_cpu_online();
6794 ret
= kvm_x86_ops
->hardware_enable(garbage
);
6798 local_tsc
= native_read_tsc();
6799 stable
= !check_tsc_unstable();
6800 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
6801 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
6802 if (!stable
&& vcpu
->cpu
== smp_processor_id())
6803 set_bit(KVM_REQ_CLOCK_UPDATE
, &vcpu
->requests
);
6804 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
6805 backwards_tsc
= true;
6806 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
6807 max_tsc
= vcpu
->arch
.last_host_tsc
;
6813 * Sometimes, even reliable TSCs go backwards. This happens on
6814 * platforms that reset TSC during suspend or hibernate actions, but
6815 * maintain synchronization. We must compensate. Fortunately, we can
6816 * detect that condition here, which happens early in CPU bringup,
6817 * before any KVM threads can be running. Unfortunately, we can't
6818 * bring the TSCs fully up to date with real time, as we aren't yet far
6819 * enough into CPU bringup that we know how much real time has actually
6820 * elapsed; our helper function, get_kernel_ns() will be using boot
6821 * variables that haven't been updated yet.
6823 * So we simply find the maximum observed TSC above, then record the
6824 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
6825 * the adjustment will be applied. Note that we accumulate
6826 * adjustments, in case multiple suspend cycles happen before some VCPU
6827 * gets a chance to run again. In the event that no KVM threads get a
6828 * chance to run, we will miss the entire elapsed period, as we'll have
6829 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
6830 * loose cycle time. This isn't too big a deal, since the loss will be
6831 * uniform across all VCPUs (not to mention the scenario is extremely
6832 * unlikely). It is possible that a second hibernate recovery happens
6833 * much faster than a first, causing the observed TSC here to be
6834 * smaller; this would require additional padding adjustment, which is
6835 * why we set last_host_tsc to the local tsc observed here.
6837 * N.B. - this code below runs only on platforms with reliable TSC,
6838 * as that is the only way backwards_tsc is set above. Also note
6839 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
6840 * have the same delta_cyc adjustment applied if backwards_tsc
6841 * is detected. Note further, this adjustment is only done once,
6842 * as we reset last_host_tsc on all VCPUs to stop this from being
6843 * called multiple times (one for each physical CPU bringup).
6845 * Platforms with unreliable TSCs don't have to deal with this, they
6846 * will be compensated by the logic in vcpu_load, which sets the TSC to
6847 * catchup mode. This will catchup all VCPUs to real time, but cannot
6848 * guarantee that they stay in perfect synchronization.
6850 if (backwards_tsc
) {
6851 u64 delta_cyc
= max_tsc
- local_tsc
;
6852 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
6853 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
6854 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
6855 vcpu
->arch
.last_host_tsc
= local_tsc
;
6856 set_bit(KVM_REQ_MASTERCLOCK_UPDATE
,
6861 * We have to disable TSC offset matching.. if you were
6862 * booting a VM while issuing an S4 host suspend....
6863 * you may have some problem. Solving this issue is
6864 * left as an exercise to the reader.
6866 kvm
->arch
.last_tsc_nsec
= 0;
6867 kvm
->arch
.last_tsc_write
= 0;
6874 void kvm_arch_hardware_disable(void *garbage
)
6876 kvm_x86_ops
->hardware_disable(garbage
);
6877 drop_user_return_notifiers(garbage
);
6880 int kvm_arch_hardware_setup(void)
6882 return kvm_x86_ops
->hardware_setup();
6885 void kvm_arch_hardware_unsetup(void)
6887 kvm_x86_ops
->hardware_unsetup();
6890 void kvm_arch_check_processor_compat(void *rtn
)
6892 kvm_x86_ops
->check_processor_compatibility(rtn
);
6895 bool kvm_vcpu_compatible(struct kvm_vcpu
*vcpu
)
6897 return irqchip_in_kernel(vcpu
->kvm
) == (vcpu
->arch
.apic
!= NULL
);
6900 struct static_key kvm_no_apic_vcpu __read_mostly
;
6902 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
6908 BUG_ON(vcpu
->kvm
== NULL
);
6911 vcpu
->arch
.pv
.pv_unhalted
= false;
6912 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
6913 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_bsp(vcpu
))
6914 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
6916 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
6918 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
6923 vcpu
->arch
.pio_data
= page_address(page
);
6925 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
6927 r
= kvm_mmu_create(vcpu
);
6929 goto fail_free_pio_data
;
6931 if (irqchip_in_kernel(kvm
)) {
6932 r
= kvm_create_lapic(vcpu
);
6934 goto fail_mmu_destroy
;
6936 static_key_slow_inc(&kvm_no_apic_vcpu
);
6938 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
6940 if (!vcpu
->arch
.mce_banks
) {
6942 goto fail_free_lapic
;
6944 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
6946 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
)) {
6948 goto fail_free_mce_banks
;
6953 goto fail_free_wbinvd_dirty_mask
;
6955 vcpu
->arch
.ia32_tsc_adjust_msr
= 0x0;
6956 vcpu
->arch
.pv_time_enabled
= false;
6958 vcpu
->arch
.guest_supported_xcr0
= 0;
6959 vcpu
->arch
.guest_xstate_size
= XSAVE_HDR_SIZE
+ XSAVE_HDR_OFFSET
;
6961 kvm_async_pf_hash_reset(vcpu
);
6965 fail_free_wbinvd_dirty_mask
:
6966 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
6967 fail_free_mce_banks
:
6968 kfree(vcpu
->arch
.mce_banks
);
6970 kvm_free_lapic(vcpu
);
6972 kvm_mmu_destroy(vcpu
);
6974 free_page((unsigned long)vcpu
->arch
.pio_data
);
6979 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
6983 kvm_pmu_destroy(vcpu
);
6984 kfree(vcpu
->arch
.mce_banks
);
6985 kvm_free_lapic(vcpu
);
6986 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6987 kvm_mmu_destroy(vcpu
);
6988 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
6989 free_page((unsigned long)vcpu
->arch
.pio_data
);
6990 if (!irqchip_in_kernel(vcpu
->kvm
))
6991 static_key_slow_dec(&kvm_no_apic_vcpu
);
6994 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
6999 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
7000 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
7001 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
7002 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
7004 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7005 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
7006 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7007 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
7008 &kvm
->arch
.irq_sources_bitmap
);
7010 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
7011 mutex_init(&kvm
->arch
.apic_map_lock
);
7012 spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
7014 pvclock_update_vm_gtod_copy(kvm
);
7019 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
7022 r
= vcpu_load(vcpu
);
7024 kvm_mmu_unload(vcpu
);
7028 static void kvm_free_vcpus(struct kvm
*kvm
)
7031 struct kvm_vcpu
*vcpu
;
7034 * Unpin any mmu pages first.
7036 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7037 kvm_clear_async_pf_completion_queue(vcpu
);
7038 kvm_unload_vcpu_mmu(vcpu
);
7040 kvm_for_each_vcpu(i
, vcpu
, kvm
)
7041 kvm_arch_vcpu_free(vcpu
);
7043 mutex_lock(&kvm
->lock
);
7044 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
7045 kvm
->vcpus
[i
] = NULL
;
7047 atomic_set(&kvm
->online_vcpus
, 0);
7048 mutex_unlock(&kvm
->lock
);
7051 void kvm_arch_sync_events(struct kvm
*kvm
)
7053 kvm_free_all_assigned_devices(kvm
);
7057 void kvm_arch_destroy_vm(struct kvm
*kvm
)
7059 if (current
->mm
== kvm
->mm
) {
7061 * Free memory regions allocated on behalf of userspace,
7062 * unless the the memory map has changed due to process exit
7065 struct kvm_userspace_memory_region mem
;
7066 memset(&mem
, 0, sizeof(mem
));
7067 mem
.slot
= APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
;
7068 kvm_set_memory_region(kvm
, &mem
);
7070 mem
.slot
= IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
;
7071 kvm_set_memory_region(kvm
, &mem
);
7073 mem
.slot
= TSS_PRIVATE_MEMSLOT
;
7074 kvm_set_memory_region(kvm
, &mem
);
7076 kvm_iommu_unmap_guest(kvm
);
7077 kfree(kvm
->arch
.vpic
);
7078 kfree(kvm
->arch
.vioapic
);
7079 kvm_free_vcpus(kvm
);
7080 if (kvm
->arch
.apic_access_page
)
7081 put_page(kvm
->arch
.apic_access_page
);
7082 if (kvm
->arch
.ept_identity_pagetable
)
7083 put_page(kvm
->arch
.ept_identity_pagetable
);
7084 kfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
7087 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*free
,
7088 struct kvm_memory_slot
*dont
)
7092 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7093 if (!dont
|| free
->arch
.rmap
[i
] != dont
->arch
.rmap
[i
]) {
7094 kvm_kvfree(free
->arch
.rmap
[i
]);
7095 free
->arch
.rmap
[i
] = NULL
;
7100 if (!dont
|| free
->arch
.lpage_info
[i
- 1] !=
7101 dont
->arch
.lpage_info
[i
- 1]) {
7102 kvm_kvfree(free
->arch
.lpage_info
[i
- 1]);
7103 free
->arch
.lpage_info
[i
- 1] = NULL
;
7108 int kvm_arch_create_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
,
7109 unsigned long npages
)
7113 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7118 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
7119 slot
->base_gfn
, level
) + 1;
7121 slot
->arch
.rmap
[i
] =
7122 kvm_kvzalloc(lpages
* sizeof(*slot
->arch
.rmap
[i
]));
7123 if (!slot
->arch
.rmap
[i
])
7128 slot
->arch
.lpage_info
[i
- 1] = kvm_kvzalloc(lpages
*
7129 sizeof(*slot
->arch
.lpage_info
[i
- 1]));
7130 if (!slot
->arch
.lpage_info
[i
- 1])
7133 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
7134 slot
->arch
.lpage_info
[i
- 1][0].write_count
= 1;
7135 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
7136 slot
->arch
.lpage_info
[i
- 1][lpages
- 1].write_count
= 1;
7137 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
7139 * If the gfn and userspace address are not aligned wrt each
7140 * other, or if explicitly asked to, disable large page
7141 * support for this slot
7143 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1) ||
7144 !kvm_largepages_enabled()) {
7147 for (j
= 0; j
< lpages
; ++j
)
7148 slot
->arch
.lpage_info
[i
- 1][j
].write_count
= 1;
7155 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7156 kvm_kvfree(slot
->arch
.rmap
[i
]);
7157 slot
->arch
.rmap
[i
] = NULL
;
7161 kvm_kvfree(slot
->arch
.lpage_info
[i
- 1]);
7162 slot
->arch
.lpage_info
[i
- 1] = NULL
;
7167 void kvm_arch_memslots_updated(struct kvm
*kvm
)
7170 * memslots->generation has been incremented.
7171 * mmio generation may have reached its maximum value.
7173 kvm_mmu_invalidate_mmio_sptes(kvm
);
7176 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
7177 struct kvm_memory_slot
*memslot
,
7178 struct kvm_userspace_memory_region
*mem
,
7179 enum kvm_mr_change change
)
7182 * Only private memory slots need to be mapped here since
7183 * KVM_SET_MEMORY_REGION ioctl is no longer supported.
7185 if ((memslot
->id
>= KVM_USER_MEM_SLOTS
) && (change
== KVM_MR_CREATE
)) {
7186 unsigned long userspace_addr
;
7189 * MAP_SHARED to prevent internal slot pages from being moved
7192 userspace_addr
= vm_mmap(NULL
, 0, memslot
->npages
* PAGE_SIZE
,
7193 PROT_READ
| PROT_WRITE
,
7194 MAP_SHARED
| MAP_ANONYMOUS
, 0);
7196 if (IS_ERR((void *)userspace_addr
))
7197 return PTR_ERR((void *)userspace_addr
);
7199 memslot
->userspace_addr
= userspace_addr
;
7205 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
7206 struct kvm_userspace_memory_region
*mem
,
7207 const struct kvm_memory_slot
*old
,
7208 enum kvm_mr_change change
)
7211 int nr_mmu_pages
= 0;
7213 if ((mem
->slot
>= KVM_USER_MEM_SLOTS
) && (change
== KVM_MR_DELETE
)) {
7216 ret
= vm_munmap(old
->userspace_addr
,
7217 old
->npages
* PAGE_SIZE
);
7220 "kvm_vm_ioctl_set_memory_region: "
7221 "failed to munmap memory\n");
7224 if (!kvm
->arch
.n_requested_mmu_pages
)
7225 nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
7228 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
7230 * Write protect all pages for dirty logging.
7231 * Existing largepage mappings are destroyed here and new ones will
7232 * not be created until the end of the logging.
7234 if ((change
!= KVM_MR_DELETE
) && (mem
->flags
& KVM_MEM_LOG_DIRTY_PAGES
))
7235 kvm_mmu_slot_remove_write_access(kvm
, mem
->slot
);
7238 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
7240 kvm_mmu_invalidate_zap_all_pages(kvm
);
7243 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
7244 struct kvm_memory_slot
*slot
)
7246 kvm_mmu_invalidate_zap_all_pages(kvm
);
7249 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
7251 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
7252 !vcpu
->arch
.apf
.halted
)
7253 || !list_empty_careful(&vcpu
->async_pf
.done
)
7254 || kvm_apic_has_events(vcpu
)
7255 || vcpu
->arch
.pv
.pv_unhalted
7256 || atomic_read(&vcpu
->arch
.nmi_queued
) ||
7257 (kvm_arch_interrupt_allowed(vcpu
) &&
7258 kvm_cpu_has_interrupt(vcpu
));
7261 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
7263 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
7266 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
7268 return kvm_x86_ops
->interrupt_allowed(vcpu
);
7271 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
7273 unsigned long current_rip
= kvm_rip_read(vcpu
) +
7274 get_segment_base(vcpu
, VCPU_SREG_CS
);
7276 return current_rip
== linear_rip
;
7278 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
7280 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
7282 unsigned long rflags
;
7284 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
7285 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
7286 rflags
&= ~X86_EFLAGS_TF
;
7289 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
7291 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
7293 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
7294 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
7295 rflags
|= X86_EFLAGS_TF
;
7296 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
7297 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7299 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
7301 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
7305 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
7309 r
= kvm_mmu_reload(vcpu
);
7313 if (!vcpu
->arch
.mmu
.direct_map
&&
7314 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
7317 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
7320 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
7322 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
7325 static inline u32
kvm_async_pf_next_probe(u32 key
)
7327 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
7330 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7332 u32 key
= kvm_async_pf_hash_fn(gfn
);
7334 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
7335 key
= kvm_async_pf_next_probe(key
);
7337 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
7340 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7343 u32 key
= kvm_async_pf_hash_fn(gfn
);
7345 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
7346 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
7347 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
7348 key
= kvm_async_pf_next_probe(key
);
7353 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7355 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
7358 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7362 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
7364 vcpu
->arch
.apf
.gfns
[i
] = ~0;
7366 j
= kvm_async_pf_next_probe(j
);
7367 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
7369 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
7371 * k lies cyclically in ]i,j]
7373 * |....j i.k.| or |.k..j i...|
7375 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
7376 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
7381 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
7384 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
7388 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
7389 struct kvm_async_pf
*work
)
7391 struct x86_exception fault
;
7393 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
7394 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
7396 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
7397 (vcpu
->arch
.apf
.send_user_only
&&
7398 kvm_x86_ops
->get_cpl(vcpu
) == 0))
7399 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
7400 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
7401 fault
.vector
= PF_VECTOR
;
7402 fault
.error_code_valid
= true;
7403 fault
.error_code
= 0;
7404 fault
.nested_page_fault
= false;
7405 fault
.address
= work
->arch
.token
;
7406 kvm_inject_page_fault(vcpu
, &fault
);
7410 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
7411 struct kvm_async_pf
*work
)
7413 struct x86_exception fault
;
7415 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
7416 if (work
->wakeup_all
)
7417 work
->arch
.token
= ~0; /* broadcast wakeup */
7419 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
7421 if ((vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) &&
7422 !apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
7423 fault
.vector
= PF_VECTOR
;
7424 fault
.error_code_valid
= true;
7425 fault
.error_code
= 0;
7426 fault
.nested_page_fault
= false;
7427 fault
.address
= work
->arch
.token
;
7428 kvm_inject_page_fault(vcpu
, &fault
);
7430 vcpu
->arch
.apf
.halted
= false;
7431 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7434 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
7436 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
7439 return !kvm_event_needs_reinjection(vcpu
) &&
7440 kvm_x86_ops
->interrupt_allowed(vcpu
);
7443 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
7445 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
7447 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
7449 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
7451 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
7453 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
7455 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
7457 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
7459 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
7461 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
7462 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
7463 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
7464 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
7465 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
7466 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
7467 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
7468 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
7469 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
7470 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
7471 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
7472 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
7473 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);