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KVM: Use kvm_arch_interrupt_allowed() instead of checking interrupt_window_open directly
[deliverable/linux.git] / arch / x86 / kvm / x86.c
1 /*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * derived from drivers/kvm/kvm_main.c
5 *
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 *
10 * Authors:
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
15 *
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
18 *
19 */
20
21 #include <linux/kvm_host.h>
22 #include "irq.h"
23 #include "mmu.h"
24 #include "i8254.h"
25 #include "tss.h"
26 #include "kvm_cache_regs.h"
27 #include "x86.h"
28
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
32 #include <linux/fs.h>
33 #include <linux/vmalloc.h>
34 #include <linux/module.h>
35 #include <linux/mman.h>
36 #include <linux/highmem.h>
37 #include <linux/iommu.h>
38 #include <linux/intel-iommu.h>
39 #include <linux/cpufreq.h>
40
41 #include <asm/uaccess.h>
42 #include <asm/msr.h>
43 #include <asm/desc.h>
44 #include <asm/mtrr.h>
45
46 #define MAX_IO_MSRS 256
47 #define CR0_RESERVED_BITS \
48 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
49 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
50 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
51 #define CR4_RESERVED_BITS \
52 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
53 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
54 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
55 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
56
57 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
58 /* EFER defaults:
59 * - enable syscall per default because its emulated by KVM
60 * - enable LME and LMA per default on 64 bit KVM
61 */
62 #ifdef CONFIG_X86_64
63 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
64 #else
65 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
66 #endif
67
68 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
69 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
70
71 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
72 struct kvm_cpuid_entry2 __user *entries);
73 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
74 u32 function, u32 index);
75
76 struct kvm_x86_ops *kvm_x86_ops;
77 EXPORT_SYMBOL_GPL(kvm_x86_ops);
78
79 struct kvm_stats_debugfs_item debugfs_entries[] = {
80 { "pf_fixed", VCPU_STAT(pf_fixed) },
81 { "pf_guest", VCPU_STAT(pf_guest) },
82 { "tlb_flush", VCPU_STAT(tlb_flush) },
83 { "invlpg", VCPU_STAT(invlpg) },
84 { "exits", VCPU_STAT(exits) },
85 { "io_exits", VCPU_STAT(io_exits) },
86 { "mmio_exits", VCPU_STAT(mmio_exits) },
87 { "signal_exits", VCPU_STAT(signal_exits) },
88 { "irq_window", VCPU_STAT(irq_window_exits) },
89 { "nmi_window", VCPU_STAT(nmi_window_exits) },
90 { "halt_exits", VCPU_STAT(halt_exits) },
91 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
92 { "hypercalls", VCPU_STAT(hypercalls) },
93 { "request_irq", VCPU_STAT(request_irq_exits) },
94 { "request_nmi", VCPU_STAT(request_nmi_exits) },
95 { "irq_exits", VCPU_STAT(irq_exits) },
96 { "host_state_reload", VCPU_STAT(host_state_reload) },
97 { "efer_reload", VCPU_STAT(efer_reload) },
98 { "fpu_reload", VCPU_STAT(fpu_reload) },
99 { "insn_emulation", VCPU_STAT(insn_emulation) },
100 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
101 { "irq_injections", VCPU_STAT(irq_injections) },
102 { "nmi_injections", VCPU_STAT(nmi_injections) },
103 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
104 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
105 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
106 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
107 { "mmu_flooded", VM_STAT(mmu_flooded) },
108 { "mmu_recycled", VM_STAT(mmu_recycled) },
109 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
110 { "mmu_unsync", VM_STAT(mmu_unsync) },
111 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
112 { "largepages", VM_STAT(lpages) },
113 { NULL }
114 };
115
116 unsigned long segment_base(u16 selector)
117 {
118 struct descriptor_table gdt;
119 struct desc_struct *d;
120 unsigned long table_base;
121 unsigned long v;
122
123 if (selector == 0)
124 return 0;
125
126 asm("sgdt %0" : "=m"(gdt));
127 table_base = gdt.base;
128
129 if (selector & 4) { /* from ldt */
130 u16 ldt_selector;
131
132 asm("sldt %0" : "=g"(ldt_selector));
133 table_base = segment_base(ldt_selector);
134 }
135 d = (struct desc_struct *)(table_base + (selector & ~7));
136 v = d->base0 | ((unsigned long)d->base1 << 16) |
137 ((unsigned long)d->base2 << 24);
138 #ifdef CONFIG_X86_64
139 if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
140 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
141 #endif
142 return v;
143 }
144 EXPORT_SYMBOL_GPL(segment_base);
145
146 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
147 {
148 if (irqchip_in_kernel(vcpu->kvm))
149 return vcpu->arch.apic_base;
150 else
151 return vcpu->arch.apic_base;
152 }
153 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
154
155 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
156 {
157 /* TODO: reserve bits check */
158 if (irqchip_in_kernel(vcpu->kvm))
159 kvm_lapic_set_base(vcpu, data);
160 else
161 vcpu->arch.apic_base = data;
162 }
163 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
164
165 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
166 {
167 WARN_ON(vcpu->arch.exception.pending);
168 vcpu->arch.exception.pending = true;
169 vcpu->arch.exception.has_error_code = false;
170 vcpu->arch.exception.nr = nr;
171 }
172 EXPORT_SYMBOL_GPL(kvm_queue_exception);
173
174 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
175 u32 error_code)
176 {
177 ++vcpu->stat.pf_guest;
178
179 if (vcpu->arch.exception.pending) {
180 if (vcpu->arch.exception.nr == PF_VECTOR) {
181 printk(KERN_DEBUG "kvm: inject_page_fault:"
182 " double fault 0x%lx\n", addr);
183 vcpu->arch.exception.nr = DF_VECTOR;
184 vcpu->arch.exception.error_code = 0;
185 } else if (vcpu->arch.exception.nr == DF_VECTOR) {
186 /* triple fault -> shutdown */
187 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
188 }
189 return;
190 }
191 vcpu->arch.cr2 = addr;
192 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
193 }
194
195 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
196 {
197 vcpu->arch.nmi_pending = 1;
198 }
199 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
200
201 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
202 {
203 WARN_ON(vcpu->arch.exception.pending);
204 vcpu->arch.exception.pending = true;
205 vcpu->arch.exception.has_error_code = true;
206 vcpu->arch.exception.nr = nr;
207 vcpu->arch.exception.error_code = error_code;
208 }
209 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
210
211 static void __queue_exception(struct kvm_vcpu *vcpu)
212 {
213 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
214 vcpu->arch.exception.has_error_code,
215 vcpu->arch.exception.error_code);
216 }
217
218 /*
219 * Load the pae pdptrs. Return true is they are all valid.
220 */
221 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
222 {
223 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
224 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
225 int i;
226 int ret;
227 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
228
229 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
230 offset * sizeof(u64), sizeof(pdpte));
231 if (ret < 0) {
232 ret = 0;
233 goto out;
234 }
235 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
236 if (is_present_pte(pdpte[i]) &&
237 (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
238 ret = 0;
239 goto out;
240 }
241 }
242 ret = 1;
243
244 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
245 out:
246
247 return ret;
248 }
249 EXPORT_SYMBOL_GPL(load_pdptrs);
250
251 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
252 {
253 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
254 bool changed = true;
255 int r;
256
257 if (is_long_mode(vcpu) || !is_pae(vcpu))
258 return false;
259
260 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
261 if (r < 0)
262 goto out;
263 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
264 out:
265
266 return changed;
267 }
268
269 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
270 {
271 if (cr0 & CR0_RESERVED_BITS) {
272 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
273 cr0, vcpu->arch.cr0);
274 kvm_inject_gp(vcpu, 0);
275 return;
276 }
277
278 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
279 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
280 kvm_inject_gp(vcpu, 0);
281 return;
282 }
283
284 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
285 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
286 "and a clear PE flag\n");
287 kvm_inject_gp(vcpu, 0);
288 return;
289 }
290
291 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
292 #ifdef CONFIG_X86_64
293 if ((vcpu->arch.shadow_efer & EFER_LME)) {
294 int cs_db, cs_l;
295
296 if (!is_pae(vcpu)) {
297 printk(KERN_DEBUG "set_cr0: #GP, start paging "
298 "in long mode while PAE is disabled\n");
299 kvm_inject_gp(vcpu, 0);
300 return;
301 }
302 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
303 if (cs_l) {
304 printk(KERN_DEBUG "set_cr0: #GP, start paging "
305 "in long mode while CS.L == 1\n");
306 kvm_inject_gp(vcpu, 0);
307 return;
308
309 }
310 } else
311 #endif
312 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
313 printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
314 "reserved bits\n");
315 kvm_inject_gp(vcpu, 0);
316 return;
317 }
318
319 }
320
321 kvm_x86_ops->set_cr0(vcpu, cr0);
322 vcpu->arch.cr0 = cr0;
323
324 kvm_mmu_reset_context(vcpu);
325 return;
326 }
327 EXPORT_SYMBOL_GPL(kvm_set_cr0);
328
329 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
330 {
331 kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
332 KVMTRACE_1D(LMSW, vcpu,
333 (u32)((vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f)),
334 handler);
335 }
336 EXPORT_SYMBOL_GPL(kvm_lmsw);
337
338 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
339 {
340 unsigned long old_cr4 = vcpu->arch.cr4;
341 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
342
343 if (cr4 & CR4_RESERVED_BITS) {
344 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
345 kvm_inject_gp(vcpu, 0);
346 return;
347 }
348
349 if (is_long_mode(vcpu)) {
350 if (!(cr4 & X86_CR4_PAE)) {
351 printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
352 "in long mode\n");
353 kvm_inject_gp(vcpu, 0);
354 return;
355 }
356 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
357 && ((cr4 ^ old_cr4) & pdptr_bits)
358 && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
359 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
360 kvm_inject_gp(vcpu, 0);
361 return;
362 }
363
364 if (cr4 & X86_CR4_VMXE) {
365 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
366 kvm_inject_gp(vcpu, 0);
367 return;
368 }
369 kvm_x86_ops->set_cr4(vcpu, cr4);
370 vcpu->arch.cr4 = cr4;
371 vcpu->arch.mmu.base_role.cr4_pge = (cr4 & X86_CR4_PGE) && !tdp_enabled;
372 kvm_mmu_reset_context(vcpu);
373 }
374 EXPORT_SYMBOL_GPL(kvm_set_cr4);
375
376 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
377 {
378 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
379 kvm_mmu_sync_roots(vcpu);
380 kvm_mmu_flush_tlb(vcpu);
381 return;
382 }
383
384 if (is_long_mode(vcpu)) {
385 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
386 printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
387 kvm_inject_gp(vcpu, 0);
388 return;
389 }
390 } else {
391 if (is_pae(vcpu)) {
392 if (cr3 & CR3_PAE_RESERVED_BITS) {
393 printk(KERN_DEBUG
394 "set_cr3: #GP, reserved bits\n");
395 kvm_inject_gp(vcpu, 0);
396 return;
397 }
398 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
399 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
400 "reserved bits\n");
401 kvm_inject_gp(vcpu, 0);
402 return;
403 }
404 }
405 /*
406 * We don't check reserved bits in nonpae mode, because
407 * this isn't enforced, and VMware depends on this.
408 */
409 }
410
411 /*
412 * Does the new cr3 value map to physical memory? (Note, we
413 * catch an invalid cr3 even in real-mode, because it would
414 * cause trouble later on when we turn on paging anyway.)
415 *
416 * A real CPU would silently accept an invalid cr3 and would
417 * attempt to use it - with largely undefined (and often hard
418 * to debug) behavior on the guest side.
419 */
420 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
421 kvm_inject_gp(vcpu, 0);
422 else {
423 vcpu->arch.cr3 = cr3;
424 vcpu->arch.mmu.new_cr3(vcpu);
425 }
426 }
427 EXPORT_SYMBOL_GPL(kvm_set_cr3);
428
429 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
430 {
431 if (cr8 & CR8_RESERVED_BITS) {
432 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
433 kvm_inject_gp(vcpu, 0);
434 return;
435 }
436 if (irqchip_in_kernel(vcpu->kvm))
437 kvm_lapic_set_tpr(vcpu, cr8);
438 else
439 vcpu->arch.cr8 = cr8;
440 }
441 EXPORT_SYMBOL_GPL(kvm_set_cr8);
442
443 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
444 {
445 if (irqchip_in_kernel(vcpu->kvm))
446 return kvm_lapic_get_cr8(vcpu);
447 else
448 return vcpu->arch.cr8;
449 }
450 EXPORT_SYMBOL_GPL(kvm_get_cr8);
451
452 static inline u32 bit(int bitno)
453 {
454 return 1 << (bitno & 31);
455 }
456
457 /*
458 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
459 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
460 *
461 * This list is modified at module load time to reflect the
462 * capabilities of the host cpu.
463 */
464 static u32 msrs_to_save[] = {
465 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
466 MSR_K6_STAR,
467 #ifdef CONFIG_X86_64
468 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
469 #endif
470 MSR_IA32_TIME_STAMP_COUNTER, MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
471 MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
472 };
473
474 static unsigned num_msrs_to_save;
475
476 static u32 emulated_msrs[] = {
477 MSR_IA32_MISC_ENABLE,
478 };
479
480 static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
481 {
482 if (efer & efer_reserved_bits) {
483 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
484 efer);
485 kvm_inject_gp(vcpu, 0);
486 return;
487 }
488
489 if (is_paging(vcpu)
490 && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
491 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
492 kvm_inject_gp(vcpu, 0);
493 return;
494 }
495
496 if (efer & EFER_FFXSR) {
497 struct kvm_cpuid_entry2 *feat;
498
499 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
500 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT))) {
501 printk(KERN_DEBUG "set_efer: #GP, enable FFXSR w/o CPUID capability\n");
502 kvm_inject_gp(vcpu, 0);
503 return;
504 }
505 }
506
507 if (efer & EFER_SVME) {
508 struct kvm_cpuid_entry2 *feat;
509
510 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
511 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM))) {
512 printk(KERN_DEBUG "set_efer: #GP, enable SVM w/o SVM\n");
513 kvm_inject_gp(vcpu, 0);
514 return;
515 }
516 }
517
518 kvm_x86_ops->set_efer(vcpu, efer);
519
520 efer &= ~EFER_LMA;
521 efer |= vcpu->arch.shadow_efer & EFER_LMA;
522
523 vcpu->arch.shadow_efer = efer;
524
525 vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
526 kvm_mmu_reset_context(vcpu);
527 }
528
529 void kvm_enable_efer_bits(u64 mask)
530 {
531 efer_reserved_bits &= ~mask;
532 }
533 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
534
535
536 /*
537 * Writes msr value into into the appropriate "register".
538 * Returns 0 on success, non-0 otherwise.
539 * Assumes vcpu_load() was already called.
540 */
541 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
542 {
543 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
544 }
545
546 /*
547 * Adapt set_msr() to msr_io()'s calling convention
548 */
549 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
550 {
551 return kvm_set_msr(vcpu, index, *data);
552 }
553
554 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
555 {
556 static int version;
557 struct pvclock_wall_clock wc;
558 struct timespec now, sys, boot;
559
560 if (!wall_clock)
561 return;
562
563 version++;
564
565 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
566
567 /*
568 * The guest calculates current wall clock time by adding
569 * system time (updated by kvm_write_guest_time below) to the
570 * wall clock specified here. guest system time equals host
571 * system time for us, thus we must fill in host boot time here.
572 */
573 now = current_kernel_time();
574 ktime_get_ts(&sys);
575 boot = ns_to_timespec(timespec_to_ns(&now) - timespec_to_ns(&sys));
576
577 wc.sec = boot.tv_sec;
578 wc.nsec = boot.tv_nsec;
579 wc.version = version;
580
581 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
582
583 version++;
584 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
585 }
586
587 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
588 {
589 uint32_t quotient, remainder;
590
591 /* Don't try to replace with do_div(), this one calculates
592 * "(dividend << 32) / divisor" */
593 __asm__ ( "divl %4"
594 : "=a" (quotient), "=d" (remainder)
595 : "0" (0), "1" (dividend), "r" (divisor) );
596 return quotient;
597 }
598
599 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
600 {
601 uint64_t nsecs = 1000000000LL;
602 int32_t shift = 0;
603 uint64_t tps64;
604 uint32_t tps32;
605
606 tps64 = tsc_khz * 1000LL;
607 while (tps64 > nsecs*2) {
608 tps64 >>= 1;
609 shift--;
610 }
611
612 tps32 = (uint32_t)tps64;
613 while (tps32 <= (uint32_t)nsecs) {
614 tps32 <<= 1;
615 shift++;
616 }
617
618 hv_clock->tsc_shift = shift;
619 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
620
621 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
622 __func__, tsc_khz, hv_clock->tsc_shift,
623 hv_clock->tsc_to_system_mul);
624 }
625
626 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
627
628 static void kvm_write_guest_time(struct kvm_vcpu *v)
629 {
630 struct timespec ts;
631 unsigned long flags;
632 struct kvm_vcpu_arch *vcpu = &v->arch;
633 void *shared_kaddr;
634 unsigned long this_tsc_khz;
635
636 if ((!vcpu->time_page))
637 return;
638
639 this_tsc_khz = get_cpu_var(cpu_tsc_khz);
640 if (unlikely(vcpu->hv_clock_tsc_khz != this_tsc_khz)) {
641 kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
642 vcpu->hv_clock_tsc_khz = this_tsc_khz;
643 }
644 put_cpu_var(cpu_tsc_khz);
645
646 /* Keep irq disabled to prevent changes to the clock */
647 local_irq_save(flags);
648 kvm_get_msr(v, MSR_IA32_TIME_STAMP_COUNTER,
649 &vcpu->hv_clock.tsc_timestamp);
650 ktime_get_ts(&ts);
651 local_irq_restore(flags);
652
653 /* With all the info we got, fill in the values */
654
655 vcpu->hv_clock.system_time = ts.tv_nsec +
656 (NSEC_PER_SEC * (u64)ts.tv_sec);
657 /*
658 * The interface expects us to write an even number signaling that the
659 * update is finished. Since the guest won't see the intermediate
660 * state, we just increase by 2 at the end.
661 */
662 vcpu->hv_clock.version += 2;
663
664 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
665
666 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
667 sizeof(vcpu->hv_clock));
668
669 kunmap_atomic(shared_kaddr, KM_USER0);
670
671 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
672 }
673
674 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
675 {
676 struct kvm_vcpu_arch *vcpu = &v->arch;
677
678 if (!vcpu->time_page)
679 return 0;
680 set_bit(KVM_REQ_KVMCLOCK_UPDATE, &v->requests);
681 return 1;
682 }
683
684 static bool msr_mtrr_valid(unsigned msr)
685 {
686 switch (msr) {
687 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
688 case MSR_MTRRfix64K_00000:
689 case MSR_MTRRfix16K_80000:
690 case MSR_MTRRfix16K_A0000:
691 case MSR_MTRRfix4K_C0000:
692 case MSR_MTRRfix4K_C8000:
693 case MSR_MTRRfix4K_D0000:
694 case MSR_MTRRfix4K_D8000:
695 case MSR_MTRRfix4K_E0000:
696 case MSR_MTRRfix4K_E8000:
697 case MSR_MTRRfix4K_F0000:
698 case MSR_MTRRfix4K_F8000:
699 case MSR_MTRRdefType:
700 case MSR_IA32_CR_PAT:
701 return true;
702 case 0x2f8:
703 return true;
704 }
705 return false;
706 }
707
708 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
709 {
710 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
711
712 if (!msr_mtrr_valid(msr))
713 return 1;
714
715 if (msr == MSR_MTRRdefType) {
716 vcpu->arch.mtrr_state.def_type = data;
717 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
718 } else if (msr == MSR_MTRRfix64K_00000)
719 p[0] = data;
720 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
721 p[1 + msr - MSR_MTRRfix16K_80000] = data;
722 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
723 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
724 else if (msr == MSR_IA32_CR_PAT)
725 vcpu->arch.pat = data;
726 else { /* Variable MTRRs */
727 int idx, is_mtrr_mask;
728 u64 *pt;
729
730 idx = (msr - 0x200) / 2;
731 is_mtrr_mask = msr - 0x200 - 2 * idx;
732 if (!is_mtrr_mask)
733 pt =
734 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
735 else
736 pt =
737 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
738 *pt = data;
739 }
740
741 kvm_mmu_reset_context(vcpu);
742 return 0;
743 }
744
745 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
746 {
747 switch (msr) {
748 case MSR_EFER:
749 set_efer(vcpu, data);
750 break;
751 case MSR_IA32_MC0_STATUS:
752 pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
753 __func__, data);
754 break;
755 case MSR_IA32_MCG_STATUS:
756 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
757 __func__, data);
758 break;
759 case MSR_IA32_MCG_CTL:
760 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_CTL 0x%llx, nop\n",
761 __func__, data);
762 break;
763 case MSR_IA32_DEBUGCTLMSR:
764 if (!data) {
765 /* We support the non-activated case already */
766 break;
767 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
768 /* Values other than LBR and BTF are vendor-specific,
769 thus reserved and should throw a #GP */
770 return 1;
771 }
772 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
773 __func__, data);
774 break;
775 case MSR_IA32_UCODE_REV:
776 case MSR_IA32_UCODE_WRITE:
777 case MSR_VM_HSAVE_PA:
778 break;
779 case 0x200 ... 0x2ff:
780 return set_msr_mtrr(vcpu, msr, data);
781 case MSR_IA32_APICBASE:
782 kvm_set_apic_base(vcpu, data);
783 break;
784 case MSR_IA32_MISC_ENABLE:
785 vcpu->arch.ia32_misc_enable_msr = data;
786 break;
787 case MSR_KVM_WALL_CLOCK:
788 vcpu->kvm->arch.wall_clock = data;
789 kvm_write_wall_clock(vcpu->kvm, data);
790 break;
791 case MSR_KVM_SYSTEM_TIME: {
792 if (vcpu->arch.time_page) {
793 kvm_release_page_dirty(vcpu->arch.time_page);
794 vcpu->arch.time_page = NULL;
795 }
796
797 vcpu->arch.time = data;
798
799 /* we verify if the enable bit is set... */
800 if (!(data & 1))
801 break;
802
803 /* ...but clean it before doing the actual write */
804 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
805
806 vcpu->arch.time_page =
807 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
808
809 if (is_error_page(vcpu->arch.time_page)) {
810 kvm_release_page_clean(vcpu->arch.time_page);
811 vcpu->arch.time_page = NULL;
812 }
813
814 kvm_request_guest_time_update(vcpu);
815 break;
816 }
817 default:
818 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n", msr, data);
819 return 1;
820 }
821 return 0;
822 }
823 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
824
825
826 /*
827 * Reads an msr value (of 'msr_index') into 'pdata'.
828 * Returns 0 on success, non-0 otherwise.
829 * Assumes vcpu_load() was already called.
830 */
831 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
832 {
833 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
834 }
835
836 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
837 {
838 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
839
840 if (!msr_mtrr_valid(msr))
841 return 1;
842
843 if (msr == MSR_MTRRdefType)
844 *pdata = vcpu->arch.mtrr_state.def_type +
845 (vcpu->arch.mtrr_state.enabled << 10);
846 else if (msr == MSR_MTRRfix64K_00000)
847 *pdata = p[0];
848 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
849 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
850 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
851 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
852 else if (msr == MSR_IA32_CR_PAT)
853 *pdata = vcpu->arch.pat;
854 else { /* Variable MTRRs */
855 int idx, is_mtrr_mask;
856 u64 *pt;
857
858 idx = (msr - 0x200) / 2;
859 is_mtrr_mask = msr - 0x200 - 2 * idx;
860 if (!is_mtrr_mask)
861 pt =
862 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
863 else
864 pt =
865 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
866 *pdata = *pt;
867 }
868
869 return 0;
870 }
871
872 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
873 {
874 u64 data;
875
876 switch (msr) {
877 case 0xc0010010: /* SYSCFG */
878 case 0xc0010015: /* HWCR */
879 case MSR_IA32_PLATFORM_ID:
880 case MSR_IA32_P5_MC_ADDR:
881 case MSR_IA32_P5_MC_TYPE:
882 case MSR_IA32_MC0_CTL:
883 case MSR_IA32_MCG_STATUS:
884 case MSR_IA32_MCG_CAP:
885 case MSR_IA32_MCG_CTL:
886 case MSR_IA32_MC0_MISC:
887 case MSR_IA32_MC0_MISC+4:
888 case MSR_IA32_MC0_MISC+8:
889 case MSR_IA32_MC0_MISC+12:
890 case MSR_IA32_MC0_MISC+16:
891 case MSR_IA32_MC0_MISC+20:
892 case MSR_IA32_UCODE_REV:
893 case MSR_IA32_EBL_CR_POWERON:
894 case MSR_IA32_DEBUGCTLMSR:
895 case MSR_IA32_LASTBRANCHFROMIP:
896 case MSR_IA32_LASTBRANCHTOIP:
897 case MSR_IA32_LASTINTFROMIP:
898 case MSR_IA32_LASTINTTOIP:
899 case MSR_VM_HSAVE_PA:
900 case MSR_P6_EVNTSEL0:
901 case MSR_P6_EVNTSEL1:
902 data = 0;
903 break;
904 case MSR_MTRRcap:
905 data = 0x500 | KVM_NR_VAR_MTRR;
906 break;
907 case 0x200 ... 0x2ff:
908 return get_msr_mtrr(vcpu, msr, pdata);
909 case 0xcd: /* fsb frequency */
910 data = 3;
911 break;
912 case MSR_IA32_APICBASE:
913 data = kvm_get_apic_base(vcpu);
914 break;
915 case MSR_IA32_MISC_ENABLE:
916 data = vcpu->arch.ia32_misc_enable_msr;
917 break;
918 case MSR_IA32_PERF_STATUS:
919 /* TSC increment by tick */
920 data = 1000ULL;
921 /* CPU multiplier */
922 data |= (((uint64_t)4ULL) << 40);
923 break;
924 case MSR_EFER:
925 data = vcpu->arch.shadow_efer;
926 break;
927 case MSR_KVM_WALL_CLOCK:
928 data = vcpu->kvm->arch.wall_clock;
929 break;
930 case MSR_KVM_SYSTEM_TIME:
931 data = vcpu->arch.time;
932 break;
933 default:
934 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
935 return 1;
936 }
937 *pdata = data;
938 return 0;
939 }
940 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
941
942 /*
943 * Read or write a bunch of msrs. All parameters are kernel addresses.
944 *
945 * @return number of msrs set successfully.
946 */
947 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
948 struct kvm_msr_entry *entries,
949 int (*do_msr)(struct kvm_vcpu *vcpu,
950 unsigned index, u64 *data))
951 {
952 int i;
953
954 vcpu_load(vcpu);
955
956 down_read(&vcpu->kvm->slots_lock);
957 for (i = 0; i < msrs->nmsrs; ++i)
958 if (do_msr(vcpu, entries[i].index, &entries[i].data))
959 break;
960 up_read(&vcpu->kvm->slots_lock);
961
962 vcpu_put(vcpu);
963
964 return i;
965 }
966
967 /*
968 * Read or write a bunch of msrs. Parameters are user addresses.
969 *
970 * @return number of msrs set successfully.
971 */
972 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
973 int (*do_msr)(struct kvm_vcpu *vcpu,
974 unsigned index, u64 *data),
975 int writeback)
976 {
977 struct kvm_msrs msrs;
978 struct kvm_msr_entry *entries;
979 int r, n;
980 unsigned size;
981
982 r = -EFAULT;
983 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
984 goto out;
985
986 r = -E2BIG;
987 if (msrs.nmsrs >= MAX_IO_MSRS)
988 goto out;
989
990 r = -ENOMEM;
991 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
992 entries = vmalloc(size);
993 if (!entries)
994 goto out;
995
996 r = -EFAULT;
997 if (copy_from_user(entries, user_msrs->entries, size))
998 goto out_free;
999
1000 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1001 if (r < 0)
1002 goto out_free;
1003
1004 r = -EFAULT;
1005 if (writeback && copy_to_user(user_msrs->entries, entries, size))
1006 goto out_free;
1007
1008 r = n;
1009
1010 out_free:
1011 vfree(entries);
1012 out:
1013 return r;
1014 }
1015
1016 int kvm_dev_ioctl_check_extension(long ext)
1017 {
1018 int r;
1019
1020 switch (ext) {
1021 case KVM_CAP_IRQCHIP:
1022 case KVM_CAP_HLT:
1023 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1024 case KVM_CAP_SET_TSS_ADDR:
1025 case KVM_CAP_EXT_CPUID:
1026 case KVM_CAP_CLOCKSOURCE:
1027 case KVM_CAP_PIT:
1028 case KVM_CAP_NOP_IO_DELAY:
1029 case KVM_CAP_MP_STATE:
1030 case KVM_CAP_SYNC_MMU:
1031 case KVM_CAP_REINJECT_CONTROL:
1032 case KVM_CAP_IRQ_INJECT_STATUS:
1033 case KVM_CAP_ASSIGN_DEV_IRQ:
1034 r = 1;
1035 break;
1036 case KVM_CAP_COALESCED_MMIO:
1037 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1038 break;
1039 case KVM_CAP_VAPIC:
1040 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1041 break;
1042 case KVM_CAP_NR_VCPUS:
1043 r = KVM_MAX_VCPUS;
1044 break;
1045 case KVM_CAP_NR_MEMSLOTS:
1046 r = KVM_MEMORY_SLOTS;
1047 break;
1048 case KVM_CAP_PV_MMU:
1049 r = !tdp_enabled;
1050 break;
1051 case KVM_CAP_IOMMU:
1052 r = iommu_found();
1053 break;
1054 default:
1055 r = 0;
1056 break;
1057 }
1058 return r;
1059
1060 }
1061
1062 long kvm_arch_dev_ioctl(struct file *filp,
1063 unsigned int ioctl, unsigned long arg)
1064 {
1065 void __user *argp = (void __user *)arg;
1066 long r;
1067
1068 switch (ioctl) {
1069 case KVM_GET_MSR_INDEX_LIST: {
1070 struct kvm_msr_list __user *user_msr_list = argp;
1071 struct kvm_msr_list msr_list;
1072 unsigned n;
1073
1074 r = -EFAULT;
1075 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1076 goto out;
1077 n = msr_list.nmsrs;
1078 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1079 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1080 goto out;
1081 r = -E2BIG;
1082 if (n < num_msrs_to_save)
1083 goto out;
1084 r = -EFAULT;
1085 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1086 num_msrs_to_save * sizeof(u32)))
1087 goto out;
1088 if (copy_to_user(user_msr_list->indices
1089 + num_msrs_to_save * sizeof(u32),
1090 &emulated_msrs,
1091 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1092 goto out;
1093 r = 0;
1094 break;
1095 }
1096 case KVM_GET_SUPPORTED_CPUID: {
1097 struct kvm_cpuid2 __user *cpuid_arg = argp;
1098 struct kvm_cpuid2 cpuid;
1099
1100 r = -EFAULT;
1101 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1102 goto out;
1103 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1104 cpuid_arg->entries);
1105 if (r)
1106 goto out;
1107
1108 r = -EFAULT;
1109 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1110 goto out;
1111 r = 0;
1112 break;
1113 }
1114 default:
1115 r = -EINVAL;
1116 }
1117 out:
1118 return r;
1119 }
1120
1121 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1122 {
1123 kvm_x86_ops->vcpu_load(vcpu, cpu);
1124 kvm_request_guest_time_update(vcpu);
1125 }
1126
1127 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1128 {
1129 kvm_x86_ops->vcpu_put(vcpu);
1130 kvm_put_guest_fpu(vcpu);
1131 }
1132
1133 static int is_efer_nx(void)
1134 {
1135 unsigned long long efer = 0;
1136
1137 rdmsrl_safe(MSR_EFER, &efer);
1138 return efer & EFER_NX;
1139 }
1140
1141 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1142 {
1143 int i;
1144 struct kvm_cpuid_entry2 *e, *entry;
1145
1146 entry = NULL;
1147 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1148 e = &vcpu->arch.cpuid_entries[i];
1149 if (e->function == 0x80000001) {
1150 entry = e;
1151 break;
1152 }
1153 }
1154 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1155 entry->edx &= ~(1 << 20);
1156 printk(KERN_INFO "kvm: guest NX capability removed\n");
1157 }
1158 }
1159
1160 /* when an old userspace process fills a new kernel module */
1161 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1162 struct kvm_cpuid *cpuid,
1163 struct kvm_cpuid_entry __user *entries)
1164 {
1165 int r, i;
1166 struct kvm_cpuid_entry *cpuid_entries;
1167
1168 r = -E2BIG;
1169 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1170 goto out;
1171 r = -ENOMEM;
1172 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1173 if (!cpuid_entries)
1174 goto out;
1175 r = -EFAULT;
1176 if (copy_from_user(cpuid_entries, entries,
1177 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1178 goto out_free;
1179 for (i = 0; i < cpuid->nent; i++) {
1180 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1181 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1182 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1183 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1184 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1185 vcpu->arch.cpuid_entries[i].index = 0;
1186 vcpu->arch.cpuid_entries[i].flags = 0;
1187 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1188 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1189 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1190 }
1191 vcpu->arch.cpuid_nent = cpuid->nent;
1192 cpuid_fix_nx_cap(vcpu);
1193 r = 0;
1194
1195 out_free:
1196 vfree(cpuid_entries);
1197 out:
1198 return r;
1199 }
1200
1201 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1202 struct kvm_cpuid2 *cpuid,
1203 struct kvm_cpuid_entry2 __user *entries)
1204 {
1205 int r;
1206
1207 r = -E2BIG;
1208 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1209 goto out;
1210 r = -EFAULT;
1211 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1212 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1213 goto out;
1214 vcpu->arch.cpuid_nent = cpuid->nent;
1215 return 0;
1216
1217 out:
1218 return r;
1219 }
1220
1221 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1222 struct kvm_cpuid2 *cpuid,
1223 struct kvm_cpuid_entry2 __user *entries)
1224 {
1225 int r;
1226
1227 r = -E2BIG;
1228 if (cpuid->nent < vcpu->arch.cpuid_nent)
1229 goto out;
1230 r = -EFAULT;
1231 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1232 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1233 goto out;
1234 return 0;
1235
1236 out:
1237 cpuid->nent = vcpu->arch.cpuid_nent;
1238 return r;
1239 }
1240
1241 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1242 u32 index)
1243 {
1244 entry->function = function;
1245 entry->index = index;
1246 cpuid_count(entry->function, entry->index,
1247 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1248 entry->flags = 0;
1249 }
1250
1251 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1252 u32 index, int *nent, int maxnent)
1253 {
1254 const u32 kvm_supported_word0_x86_features = bit(X86_FEATURE_FPU) |
1255 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
1256 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
1257 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
1258 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
1259 bit(X86_FEATURE_SEP) | bit(X86_FEATURE_PGE) |
1260 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
1261 bit(X86_FEATURE_CLFLSH) | bit(X86_FEATURE_MMX) |
1262 bit(X86_FEATURE_FXSR) | bit(X86_FEATURE_XMM) |
1263 bit(X86_FEATURE_XMM2) | bit(X86_FEATURE_SELFSNOOP);
1264 const u32 kvm_supported_word1_x86_features = bit(X86_FEATURE_FPU) |
1265 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
1266 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
1267 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
1268 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
1269 bit(X86_FEATURE_PGE) |
1270 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
1271 bit(X86_FEATURE_MMX) | bit(X86_FEATURE_FXSR) |
1272 bit(X86_FEATURE_SYSCALL) |
1273 (is_efer_nx() ? bit(X86_FEATURE_NX) : 0) |
1274 #ifdef CONFIG_X86_64
1275 bit(X86_FEATURE_LM) |
1276 #endif
1277 bit(X86_FEATURE_FXSR_OPT) |
1278 bit(X86_FEATURE_MMXEXT) |
1279 bit(X86_FEATURE_3DNOWEXT) |
1280 bit(X86_FEATURE_3DNOW);
1281 const u32 kvm_supported_word3_x86_features =
1282 bit(X86_FEATURE_XMM3) | bit(X86_FEATURE_CX16);
1283 const u32 kvm_supported_word6_x86_features =
1284 bit(X86_FEATURE_LAHF_LM) | bit(X86_FEATURE_CMP_LEGACY) |
1285 bit(X86_FEATURE_SVM);
1286
1287 /* all calls to cpuid_count() should be made on the same cpu */
1288 get_cpu();
1289 do_cpuid_1_ent(entry, function, index);
1290 ++*nent;
1291
1292 switch (function) {
1293 case 0:
1294 entry->eax = min(entry->eax, (u32)0xb);
1295 break;
1296 case 1:
1297 entry->edx &= kvm_supported_word0_x86_features;
1298 entry->ecx &= kvm_supported_word3_x86_features;
1299 break;
1300 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1301 * may return different values. This forces us to get_cpu() before
1302 * issuing the first command, and also to emulate this annoying behavior
1303 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1304 case 2: {
1305 int t, times = entry->eax & 0xff;
1306
1307 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1308 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
1309 for (t = 1; t < times && *nent < maxnent; ++t) {
1310 do_cpuid_1_ent(&entry[t], function, 0);
1311 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1312 ++*nent;
1313 }
1314 break;
1315 }
1316 /* function 4 and 0xb have additional index. */
1317 case 4: {
1318 int i, cache_type;
1319
1320 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1321 /* read more entries until cache_type is zero */
1322 for (i = 1; *nent < maxnent; ++i) {
1323 cache_type = entry[i - 1].eax & 0x1f;
1324 if (!cache_type)
1325 break;
1326 do_cpuid_1_ent(&entry[i], function, i);
1327 entry[i].flags |=
1328 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1329 ++*nent;
1330 }
1331 break;
1332 }
1333 case 0xb: {
1334 int i, level_type;
1335
1336 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1337 /* read more entries until level_type is zero */
1338 for (i = 1; *nent < maxnent; ++i) {
1339 level_type = entry[i - 1].ecx & 0xff00;
1340 if (!level_type)
1341 break;
1342 do_cpuid_1_ent(&entry[i], function, i);
1343 entry[i].flags |=
1344 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1345 ++*nent;
1346 }
1347 break;
1348 }
1349 case 0x80000000:
1350 entry->eax = min(entry->eax, 0x8000001a);
1351 break;
1352 case 0x80000001:
1353 entry->edx &= kvm_supported_word1_x86_features;
1354 entry->ecx &= kvm_supported_word6_x86_features;
1355 break;
1356 }
1357 put_cpu();
1358 }
1359
1360 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
1361 struct kvm_cpuid_entry2 __user *entries)
1362 {
1363 struct kvm_cpuid_entry2 *cpuid_entries;
1364 int limit, nent = 0, r = -E2BIG;
1365 u32 func;
1366
1367 if (cpuid->nent < 1)
1368 goto out;
1369 r = -ENOMEM;
1370 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1371 if (!cpuid_entries)
1372 goto out;
1373
1374 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1375 limit = cpuid_entries[0].eax;
1376 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1377 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1378 &nent, cpuid->nent);
1379 r = -E2BIG;
1380 if (nent >= cpuid->nent)
1381 goto out_free;
1382
1383 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1384 limit = cpuid_entries[nent - 1].eax;
1385 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1386 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1387 &nent, cpuid->nent);
1388 r = -EFAULT;
1389 if (copy_to_user(entries, cpuid_entries,
1390 nent * sizeof(struct kvm_cpuid_entry2)))
1391 goto out_free;
1392 cpuid->nent = nent;
1393 r = 0;
1394
1395 out_free:
1396 vfree(cpuid_entries);
1397 out:
1398 return r;
1399 }
1400
1401 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1402 struct kvm_lapic_state *s)
1403 {
1404 vcpu_load(vcpu);
1405 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
1406 vcpu_put(vcpu);
1407
1408 return 0;
1409 }
1410
1411 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1412 struct kvm_lapic_state *s)
1413 {
1414 vcpu_load(vcpu);
1415 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
1416 kvm_apic_post_state_restore(vcpu);
1417 vcpu_put(vcpu);
1418
1419 return 0;
1420 }
1421
1422 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1423 struct kvm_interrupt *irq)
1424 {
1425 if (irq->irq < 0 || irq->irq >= 256)
1426 return -EINVAL;
1427 if (irqchip_in_kernel(vcpu->kvm))
1428 return -ENXIO;
1429 vcpu_load(vcpu);
1430
1431 set_bit(irq->irq, vcpu->arch.irq_pending);
1432 set_bit(irq->irq / BITS_PER_LONG, &vcpu->arch.irq_summary);
1433
1434 vcpu_put(vcpu);
1435
1436 return 0;
1437 }
1438
1439 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
1440 {
1441 vcpu_load(vcpu);
1442 kvm_inject_nmi(vcpu);
1443 vcpu_put(vcpu);
1444
1445 return 0;
1446 }
1447
1448 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1449 struct kvm_tpr_access_ctl *tac)
1450 {
1451 if (tac->flags)
1452 return -EINVAL;
1453 vcpu->arch.tpr_access_reporting = !!tac->enabled;
1454 return 0;
1455 }
1456
1457 long kvm_arch_vcpu_ioctl(struct file *filp,
1458 unsigned int ioctl, unsigned long arg)
1459 {
1460 struct kvm_vcpu *vcpu = filp->private_data;
1461 void __user *argp = (void __user *)arg;
1462 int r;
1463 struct kvm_lapic_state *lapic = NULL;
1464
1465 switch (ioctl) {
1466 case KVM_GET_LAPIC: {
1467 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1468
1469 r = -ENOMEM;
1470 if (!lapic)
1471 goto out;
1472 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
1473 if (r)
1474 goto out;
1475 r = -EFAULT;
1476 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
1477 goto out;
1478 r = 0;
1479 break;
1480 }
1481 case KVM_SET_LAPIC: {
1482 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1483 r = -ENOMEM;
1484 if (!lapic)
1485 goto out;
1486 r = -EFAULT;
1487 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
1488 goto out;
1489 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
1490 if (r)
1491 goto out;
1492 r = 0;
1493 break;
1494 }
1495 case KVM_INTERRUPT: {
1496 struct kvm_interrupt irq;
1497
1498 r = -EFAULT;
1499 if (copy_from_user(&irq, argp, sizeof irq))
1500 goto out;
1501 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
1502 if (r)
1503 goto out;
1504 r = 0;
1505 break;
1506 }
1507 case KVM_NMI: {
1508 r = kvm_vcpu_ioctl_nmi(vcpu);
1509 if (r)
1510 goto out;
1511 r = 0;
1512 break;
1513 }
1514 case KVM_SET_CPUID: {
1515 struct kvm_cpuid __user *cpuid_arg = argp;
1516 struct kvm_cpuid cpuid;
1517
1518 r = -EFAULT;
1519 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1520 goto out;
1521 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
1522 if (r)
1523 goto out;
1524 break;
1525 }
1526 case KVM_SET_CPUID2: {
1527 struct kvm_cpuid2 __user *cpuid_arg = argp;
1528 struct kvm_cpuid2 cpuid;
1529
1530 r = -EFAULT;
1531 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1532 goto out;
1533 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
1534 cpuid_arg->entries);
1535 if (r)
1536 goto out;
1537 break;
1538 }
1539 case KVM_GET_CPUID2: {
1540 struct kvm_cpuid2 __user *cpuid_arg = argp;
1541 struct kvm_cpuid2 cpuid;
1542
1543 r = -EFAULT;
1544 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1545 goto out;
1546 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
1547 cpuid_arg->entries);
1548 if (r)
1549 goto out;
1550 r = -EFAULT;
1551 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1552 goto out;
1553 r = 0;
1554 break;
1555 }
1556 case KVM_GET_MSRS:
1557 r = msr_io(vcpu, argp, kvm_get_msr, 1);
1558 break;
1559 case KVM_SET_MSRS:
1560 r = msr_io(vcpu, argp, do_set_msr, 0);
1561 break;
1562 case KVM_TPR_ACCESS_REPORTING: {
1563 struct kvm_tpr_access_ctl tac;
1564
1565 r = -EFAULT;
1566 if (copy_from_user(&tac, argp, sizeof tac))
1567 goto out;
1568 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
1569 if (r)
1570 goto out;
1571 r = -EFAULT;
1572 if (copy_to_user(argp, &tac, sizeof tac))
1573 goto out;
1574 r = 0;
1575 break;
1576 };
1577 case KVM_SET_VAPIC_ADDR: {
1578 struct kvm_vapic_addr va;
1579
1580 r = -EINVAL;
1581 if (!irqchip_in_kernel(vcpu->kvm))
1582 goto out;
1583 r = -EFAULT;
1584 if (copy_from_user(&va, argp, sizeof va))
1585 goto out;
1586 r = 0;
1587 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
1588 break;
1589 }
1590 default:
1591 r = -EINVAL;
1592 }
1593 out:
1594 kfree(lapic);
1595 return r;
1596 }
1597
1598 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
1599 {
1600 int ret;
1601
1602 if (addr > (unsigned int)(-3 * PAGE_SIZE))
1603 return -1;
1604 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
1605 return ret;
1606 }
1607
1608 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
1609 u32 kvm_nr_mmu_pages)
1610 {
1611 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
1612 return -EINVAL;
1613
1614 down_write(&kvm->slots_lock);
1615
1616 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
1617 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
1618
1619 up_write(&kvm->slots_lock);
1620 return 0;
1621 }
1622
1623 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
1624 {
1625 return kvm->arch.n_alloc_mmu_pages;
1626 }
1627
1628 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
1629 {
1630 int i;
1631 struct kvm_mem_alias *alias;
1632
1633 for (i = 0; i < kvm->arch.naliases; ++i) {
1634 alias = &kvm->arch.aliases[i];
1635 if (gfn >= alias->base_gfn
1636 && gfn < alias->base_gfn + alias->npages)
1637 return alias->target_gfn + gfn - alias->base_gfn;
1638 }
1639 return gfn;
1640 }
1641
1642 /*
1643 * Set a new alias region. Aliases map a portion of physical memory into
1644 * another portion. This is useful for memory windows, for example the PC
1645 * VGA region.
1646 */
1647 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
1648 struct kvm_memory_alias *alias)
1649 {
1650 int r, n;
1651 struct kvm_mem_alias *p;
1652
1653 r = -EINVAL;
1654 /* General sanity checks */
1655 if (alias->memory_size & (PAGE_SIZE - 1))
1656 goto out;
1657 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
1658 goto out;
1659 if (alias->slot >= KVM_ALIAS_SLOTS)
1660 goto out;
1661 if (alias->guest_phys_addr + alias->memory_size
1662 < alias->guest_phys_addr)
1663 goto out;
1664 if (alias->target_phys_addr + alias->memory_size
1665 < alias->target_phys_addr)
1666 goto out;
1667
1668 down_write(&kvm->slots_lock);
1669 spin_lock(&kvm->mmu_lock);
1670
1671 p = &kvm->arch.aliases[alias->slot];
1672 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
1673 p->npages = alias->memory_size >> PAGE_SHIFT;
1674 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
1675
1676 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
1677 if (kvm->arch.aliases[n - 1].npages)
1678 break;
1679 kvm->arch.naliases = n;
1680
1681 spin_unlock(&kvm->mmu_lock);
1682 kvm_mmu_zap_all(kvm);
1683
1684 up_write(&kvm->slots_lock);
1685
1686 return 0;
1687
1688 out:
1689 return r;
1690 }
1691
1692 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1693 {
1694 int r;
1695
1696 r = 0;
1697 switch (chip->chip_id) {
1698 case KVM_IRQCHIP_PIC_MASTER:
1699 memcpy(&chip->chip.pic,
1700 &pic_irqchip(kvm)->pics[0],
1701 sizeof(struct kvm_pic_state));
1702 break;
1703 case KVM_IRQCHIP_PIC_SLAVE:
1704 memcpy(&chip->chip.pic,
1705 &pic_irqchip(kvm)->pics[1],
1706 sizeof(struct kvm_pic_state));
1707 break;
1708 case KVM_IRQCHIP_IOAPIC:
1709 memcpy(&chip->chip.ioapic,
1710 ioapic_irqchip(kvm),
1711 sizeof(struct kvm_ioapic_state));
1712 break;
1713 default:
1714 r = -EINVAL;
1715 break;
1716 }
1717 return r;
1718 }
1719
1720 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1721 {
1722 int r;
1723
1724 r = 0;
1725 switch (chip->chip_id) {
1726 case KVM_IRQCHIP_PIC_MASTER:
1727 memcpy(&pic_irqchip(kvm)->pics[0],
1728 &chip->chip.pic,
1729 sizeof(struct kvm_pic_state));
1730 break;
1731 case KVM_IRQCHIP_PIC_SLAVE:
1732 memcpy(&pic_irqchip(kvm)->pics[1],
1733 &chip->chip.pic,
1734 sizeof(struct kvm_pic_state));
1735 break;
1736 case KVM_IRQCHIP_IOAPIC:
1737 memcpy(ioapic_irqchip(kvm),
1738 &chip->chip.ioapic,
1739 sizeof(struct kvm_ioapic_state));
1740 break;
1741 default:
1742 r = -EINVAL;
1743 break;
1744 }
1745 kvm_pic_update_irq(pic_irqchip(kvm));
1746 return r;
1747 }
1748
1749 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1750 {
1751 int r = 0;
1752
1753 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
1754 return r;
1755 }
1756
1757 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1758 {
1759 int r = 0;
1760
1761 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
1762 kvm_pit_load_count(kvm, 0, ps->channels[0].count);
1763 return r;
1764 }
1765
1766 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
1767 struct kvm_reinject_control *control)
1768 {
1769 if (!kvm->arch.vpit)
1770 return -ENXIO;
1771 kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
1772 return 0;
1773 }
1774
1775 /*
1776 * Get (and clear) the dirty memory log for a memory slot.
1777 */
1778 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
1779 struct kvm_dirty_log *log)
1780 {
1781 int r;
1782 int n;
1783 struct kvm_memory_slot *memslot;
1784 int is_dirty = 0;
1785
1786 down_write(&kvm->slots_lock);
1787
1788 r = kvm_get_dirty_log(kvm, log, &is_dirty);
1789 if (r)
1790 goto out;
1791
1792 /* If nothing is dirty, don't bother messing with page tables. */
1793 if (is_dirty) {
1794 kvm_mmu_slot_remove_write_access(kvm, log->slot);
1795 kvm_flush_remote_tlbs(kvm);
1796 memslot = &kvm->memslots[log->slot];
1797 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
1798 memset(memslot->dirty_bitmap, 0, n);
1799 }
1800 r = 0;
1801 out:
1802 up_write(&kvm->slots_lock);
1803 return r;
1804 }
1805
1806 long kvm_arch_vm_ioctl(struct file *filp,
1807 unsigned int ioctl, unsigned long arg)
1808 {
1809 struct kvm *kvm = filp->private_data;
1810 void __user *argp = (void __user *)arg;
1811 int r = -EINVAL;
1812 /*
1813 * This union makes it completely explicit to gcc-3.x
1814 * that these two variables' stack usage should be
1815 * combined, not added together.
1816 */
1817 union {
1818 struct kvm_pit_state ps;
1819 struct kvm_memory_alias alias;
1820 } u;
1821
1822 switch (ioctl) {
1823 case KVM_SET_TSS_ADDR:
1824 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
1825 if (r < 0)
1826 goto out;
1827 break;
1828 case KVM_SET_MEMORY_REGION: {
1829 struct kvm_memory_region kvm_mem;
1830 struct kvm_userspace_memory_region kvm_userspace_mem;
1831
1832 r = -EFAULT;
1833 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
1834 goto out;
1835 kvm_userspace_mem.slot = kvm_mem.slot;
1836 kvm_userspace_mem.flags = kvm_mem.flags;
1837 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
1838 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
1839 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
1840 if (r)
1841 goto out;
1842 break;
1843 }
1844 case KVM_SET_NR_MMU_PAGES:
1845 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
1846 if (r)
1847 goto out;
1848 break;
1849 case KVM_GET_NR_MMU_PAGES:
1850 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
1851 break;
1852 case KVM_SET_MEMORY_ALIAS:
1853 r = -EFAULT;
1854 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
1855 goto out;
1856 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
1857 if (r)
1858 goto out;
1859 break;
1860 case KVM_CREATE_IRQCHIP:
1861 r = -ENOMEM;
1862 kvm->arch.vpic = kvm_create_pic(kvm);
1863 if (kvm->arch.vpic) {
1864 r = kvm_ioapic_init(kvm);
1865 if (r) {
1866 kfree(kvm->arch.vpic);
1867 kvm->arch.vpic = NULL;
1868 goto out;
1869 }
1870 } else
1871 goto out;
1872 r = kvm_setup_default_irq_routing(kvm);
1873 if (r) {
1874 kfree(kvm->arch.vpic);
1875 kfree(kvm->arch.vioapic);
1876 goto out;
1877 }
1878 break;
1879 case KVM_CREATE_PIT:
1880 mutex_lock(&kvm->lock);
1881 r = -EEXIST;
1882 if (kvm->arch.vpit)
1883 goto create_pit_unlock;
1884 r = -ENOMEM;
1885 kvm->arch.vpit = kvm_create_pit(kvm);
1886 if (kvm->arch.vpit)
1887 r = 0;
1888 create_pit_unlock:
1889 mutex_unlock(&kvm->lock);
1890 break;
1891 case KVM_IRQ_LINE_STATUS:
1892 case KVM_IRQ_LINE: {
1893 struct kvm_irq_level irq_event;
1894
1895 r = -EFAULT;
1896 if (copy_from_user(&irq_event, argp, sizeof irq_event))
1897 goto out;
1898 if (irqchip_in_kernel(kvm)) {
1899 __s32 status;
1900 mutex_lock(&kvm->lock);
1901 status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
1902 irq_event.irq, irq_event.level);
1903 mutex_unlock(&kvm->lock);
1904 if (ioctl == KVM_IRQ_LINE_STATUS) {
1905 irq_event.status = status;
1906 if (copy_to_user(argp, &irq_event,
1907 sizeof irq_event))
1908 goto out;
1909 }
1910 r = 0;
1911 }
1912 break;
1913 }
1914 case KVM_GET_IRQCHIP: {
1915 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1916 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
1917
1918 r = -ENOMEM;
1919 if (!chip)
1920 goto out;
1921 r = -EFAULT;
1922 if (copy_from_user(chip, argp, sizeof *chip))
1923 goto get_irqchip_out;
1924 r = -ENXIO;
1925 if (!irqchip_in_kernel(kvm))
1926 goto get_irqchip_out;
1927 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
1928 if (r)
1929 goto get_irqchip_out;
1930 r = -EFAULT;
1931 if (copy_to_user(argp, chip, sizeof *chip))
1932 goto get_irqchip_out;
1933 r = 0;
1934 get_irqchip_out:
1935 kfree(chip);
1936 if (r)
1937 goto out;
1938 break;
1939 }
1940 case KVM_SET_IRQCHIP: {
1941 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1942 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
1943
1944 r = -ENOMEM;
1945 if (!chip)
1946 goto out;
1947 r = -EFAULT;
1948 if (copy_from_user(chip, argp, sizeof *chip))
1949 goto set_irqchip_out;
1950 r = -ENXIO;
1951 if (!irqchip_in_kernel(kvm))
1952 goto set_irqchip_out;
1953 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
1954 if (r)
1955 goto set_irqchip_out;
1956 r = 0;
1957 set_irqchip_out:
1958 kfree(chip);
1959 if (r)
1960 goto out;
1961 break;
1962 }
1963 case KVM_GET_PIT: {
1964 r = -EFAULT;
1965 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
1966 goto out;
1967 r = -ENXIO;
1968 if (!kvm->arch.vpit)
1969 goto out;
1970 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
1971 if (r)
1972 goto out;
1973 r = -EFAULT;
1974 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
1975 goto out;
1976 r = 0;
1977 break;
1978 }
1979 case KVM_SET_PIT: {
1980 r = -EFAULT;
1981 if (copy_from_user(&u.ps, argp, sizeof u.ps))
1982 goto out;
1983 r = -ENXIO;
1984 if (!kvm->arch.vpit)
1985 goto out;
1986 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
1987 if (r)
1988 goto out;
1989 r = 0;
1990 break;
1991 }
1992 case KVM_REINJECT_CONTROL: {
1993 struct kvm_reinject_control control;
1994 r = -EFAULT;
1995 if (copy_from_user(&control, argp, sizeof(control)))
1996 goto out;
1997 r = kvm_vm_ioctl_reinject(kvm, &control);
1998 if (r)
1999 goto out;
2000 r = 0;
2001 break;
2002 }
2003 default:
2004 ;
2005 }
2006 out:
2007 return r;
2008 }
2009
2010 static void kvm_init_msr_list(void)
2011 {
2012 u32 dummy[2];
2013 unsigned i, j;
2014
2015 for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
2016 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
2017 continue;
2018 if (j < i)
2019 msrs_to_save[j] = msrs_to_save[i];
2020 j++;
2021 }
2022 num_msrs_to_save = j;
2023 }
2024
2025 /*
2026 * Only apic need an MMIO device hook, so shortcut now..
2027 */
2028 static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
2029 gpa_t addr, int len,
2030 int is_write)
2031 {
2032 struct kvm_io_device *dev;
2033
2034 if (vcpu->arch.apic) {
2035 dev = &vcpu->arch.apic->dev;
2036 if (dev->in_range(dev, addr, len, is_write))
2037 return dev;
2038 }
2039 return NULL;
2040 }
2041
2042
2043 static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
2044 gpa_t addr, int len,
2045 int is_write)
2046 {
2047 struct kvm_io_device *dev;
2048
2049 dev = vcpu_find_pervcpu_dev(vcpu, addr, len, is_write);
2050 if (dev == NULL)
2051 dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr, len,
2052 is_write);
2053 return dev;
2054 }
2055
2056 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
2057 struct kvm_vcpu *vcpu)
2058 {
2059 void *data = val;
2060 int r = X86EMUL_CONTINUE;
2061
2062 while (bytes) {
2063 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2064 unsigned offset = addr & (PAGE_SIZE-1);
2065 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
2066 int ret;
2067
2068 if (gpa == UNMAPPED_GVA) {
2069 r = X86EMUL_PROPAGATE_FAULT;
2070 goto out;
2071 }
2072 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
2073 if (ret < 0) {
2074 r = X86EMUL_UNHANDLEABLE;
2075 goto out;
2076 }
2077
2078 bytes -= toread;
2079 data += toread;
2080 addr += toread;
2081 }
2082 out:
2083 return r;
2084 }
2085
2086 static int kvm_write_guest_virt(gva_t addr, void *val, unsigned int bytes,
2087 struct kvm_vcpu *vcpu)
2088 {
2089 void *data = val;
2090 int r = X86EMUL_CONTINUE;
2091
2092 while (bytes) {
2093 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2094 unsigned offset = addr & (PAGE_SIZE-1);
2095 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
2096 int ret;
2097
2098 if (gpa == UNMAPPED_GVA) {
2099 r = X86EMUL_PROPAGATE_FAULT;
2100 goto out;
2101 }
2102 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
2103 if (ret < 0) {
2104 r = X86EMUL_UNHANDLEABLE;
2105 goto out;
2106 }
2107
2108 bytes -= towrite;
2109 data += towrite;
2110 addr += towrite;
2111 }
2112 out:
2113 return r;
2114 }
2115
2116
2117 static int emulator_read_emulated(unsigned long addr,
2118 void *val,
2119 unsigned int bytes,
2120 struct kvm_vcpu *vcpu)
2121 {
2122 struct kvm_io_device *mmio_dev;
2123 gpa_t gpa;
2124
2125 if (vcpu->mmio_read_completed) {
2126 memcpy(val, vcpu->mmio_data, bytes);
2127 vcpu->mmio_read_completed = 0;
2128 return X86EMUL_CONTINUE;
2129 }
2130
2131 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2132
2133 /* For APIC access vmexit */
2134 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2135 goto mmio;
2136
2137 if (kvm_read_guest_virt(addr, val, bytes, vcpu)
2138 == X86EMUL_CONTINUE)
2139 return X86EMUL_CONTINUE;
2140 if (gpa == UNMAPPED_GVA)
2141 return X86EMUL_PROPAGATE_FAULT;
2142
2143 mmio:
2144 /*
2145 * Is this MMIO handled locally?
2146 */
2147 mutex_lock(&vcpu->kvm->lock);
2148 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 0);
2149 if (mmio_dev) {
2150 kvm_iodevice_read(mmio_dev, gpa, bytes, val);
2151 mutex_unlock(&vcpu->kvm->lock);
2152 return X86EMUL_CONTINUE;
2153 }
2154 mutex_unlock(&vcpu->kvm->lock);
2155
2156 vcpu->mmio_needed = 1;
2157 vcpu->mmio_phys_addr = gpa;
2158 vcpu->mmio_size = bytes;
2159 vcpu->mmio_is_write = 0;
2160
2161 return X86EMUL_UNHANDLEABLE;
2162 }
2163
2164 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
2165 const void *val, int bytes)
2166 {
2167 int ret;
2168
2169 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
2170 if (ret < 0)
2171 return 0;
2172 kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
2173 return 1;
2174 }
2175
2176 static int emulator_write_emulated_onepage(unsigned long addr,
2177 const void *val,
2178 unsigned int bytes,
2179 struct kvm_vcpu *vcpu)
2180 {
2181 struct kvm_io_device *mmio_dev;
2182 gpa_t gpa;
2183
2184 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2185
2186 if (gpa == UNMAPPED_GVA) {
2187 kvm_inject_page_fault(vcpu, addr, 2);
2188 return X86EMUL_PROPAGATE_FAULT;
2189 }
2190
2191 /* For APIC access vmexit */
2192 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2193 goto mmio;
2194
2195 if (emulator_write_phys(vcpu, gpa, val, bytes))
2196 return X86EMUL_CONTINUE;
2197
2198 mmio:
2199 /*
2200 * Is this MMIO handled locally?
2201 */
2202 mutex_lock(&vcpu->kvm->lock);
2203 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 1);
2204 if (mmio_dev) {
2205 kvm_iodevice_write(mmio_dev, gpa, bytes, val);
2206 mutex_unlock(&vcpu->kvm->lock);
2207 return X86EMUL_CONTINUE;
2208 }
2209 mutex_unlock(&vcpu->kvm->lock);
2210
2211 vcpu->mmio_needed = 1;
2212 vcpu->mmio_phys_addr = gpa;
2213 vcpu->mmio_size = bytes;
2214 vcpu->mmio_is_write = 1;
2215 memcpy(vcpu->mmio_data, val, bytes);
2216
2217 return X86EMUL_CONTINUE;
2218 }
2219
2220 int emulator_write_emulated(unsigned long addr,
2221 const void *val,
2222 unsigned int bytes,
2223 struct kvm_vcpu *vcpu)
2224 {
2225 /* Crossing a page boundary? */
2226 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
2227 int rc, now;
2228
2229 now = -addr & ~PAGE_MASK;
2230 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
2231 if (rc != X86EMUL_CONTINUE)
2232 return rc;
2233 addr += now;
2234 val += now;
2235 bytes -= now;
2236 }
2237 return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
2238 }
2239 EXPORT_SYMBOL_GPL(emulator_write_emulated);
2240
2241 static int emulator_cmpxchg_emulated(unsigned long addr,
2242 const void *old,
2243 const void *new,
2244 unsigned int bytes,
2245 struct kvm_vcpu *vcpu)
2246 {
2247 static int reported;
2248
2249 if (!reported) {
2250 reported = 1;
2251 printk(KERN_WARNING "kvm: emulating exchange as write\n");
2252 }
2253 #ifndef CONFIG_X86_64
2254 /* guests cmpxchg8b have to be emulated atomically */
2255 if (bytes == 8) {
2256 gpa_t gpa;
2257 struct page *page;
2258 char *kaddr;
2259 u64 val;
2260
2261 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2262
2263 if (gpa == UNMAPPED_GVA ||
2264 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2265 goto emul_write;
2266
2267 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
2268 goto emul_write;
2269
2270 val = *(u64 *)new;
2271
2272 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2273
2274 kaddr = kmap_atomic(page, KM_USER0);
2275 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
2276 kunmap_atomic(kaddr, KM_USER0);
2277 kvm_release_page_dirty(page);
2278 }
2279 emul_write:
2280 #endif
2281
2282 return emulator_write_emulated(addr, new, bytes, vcpu);
2283 }
2284
2285 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
2286 {
2287 return kvm_x86_ops->get_segment_base(vcpu, seg);
2288 }
2289
2290 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
2291 {
2292 kvm_mmu_invlpg(vcpu, address);
2293 return X86EMUL_CONTINUE;
2294 }
2295
2296 int emulate_clts(struct kvm_vcpu *vcpu)
2297 {
2298 KVMTRACE_0D(CLTS, vcpu, handler);
2299 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
2300 return X86EMUL_CONTINUE;
2301 }
2302
2303 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
2304 {
2305 struct kvm_vcpu *vcpu = ctxt->vcpu;
2306
2307 switch (dr) {
2308 case 0 ... 3:
2309 *dest = kvm_x86_ops->get_dr(vcpu, dr);
2310 return X86EMUL_CONTINUE;
2311 default:
2312 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr);
2313 return X86EMUL_UNHANDLEABLE;
2314 }
2315 }
2316
2317 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
2318 {
2319 unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
2320 int exception;
2321
2322 kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
2323 if (exception) {
2324 /* FIXME: better handling */
2325 return X86EMUL_UNHANDLEABLE;
2326 }
2327 return X86EMUL_CONTINUE;
2328 }
2329
2330 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
2331 {
2332 u8 opcodes[4];
2333 unsigned long rip = kvm_rip_read(vcpu);
2334 unsigned long rip_linear;
2335
2336 if (!printk_ratelimit())
2337 return;
2338
2339 rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
2340
2341 kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu);
2342
2343 printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
2344 context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
2345 }
2346 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
2347
2348 static struct x86_emulate_ops emulate_ops = {
2349 .read_std = kvm_read_guest_virt,
2350 .read_emulated = emulator_read_emulated,
2351 .write_emulated = emulator_write_emulated,
2352 .cmpxchg_emulated = emulator_cmpxchg_emulated,
2353 };
2354
2355 static void cache_all_regs(struct kvm_vcpu *vcpu)
2356 {
2357 kvm_register_read(vcpu, VCPU_REGS_RAX);
2358 kvm_register_read(vcpu, VCPU_REGS_RSP);
2359 kvm_register_read(vcpu, VCPU_REGS_RIP);
2360 vcpu->arch.regs_dirty = ~0;
2361 }
2362
2363 int emulate_instruction(struct kvm_vcpu *vcpu,
2364 struct kvm_run *run,
2365 unsigned long cr2,
2366 u16 error_code,
2367 int emulation_type)
2368 {
2369 int r;
2370 struct decode_cache *c;
2371
2372 kvm_clear_exception_queue(vcpu);
2373 vcpu->arch.mmio_fault_cr2 = cr2;
2374 /*
2375 * TODO: fix x86_emulate.c to use guest_read/write_register
2376 * instead of direct ->regs accesses, can save hundred cycles
2377 * on Intel for instructions that don't read/change RSP, for
2378 * for example.
2379 */
2380 cache_all_regs(vcpu);
2381
2382 vcpu->mmio_is_write = 0;
2383 vcpu->arch.pio.string = 0;
2384
2385 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
2386 int cs_db, cs_l;
2387 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
2388
2389 vcpu->arch.emulate_ctxt.vcpu = vcpu;
2390 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
2391 vcpu->arch.emulate_ctxt.mode =
2392 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
2393 ? X86EMUL_MODE_REAL : cs_l
2394 ? X86EMUL_MODE_PROT64 : cs_db
2395 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
2396
2397 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2398
2399 /* Reject the instructions other than VMCALL/VMMCALL when
2400 * try to emulate invalid opcode */
2401 c = &vcpu->arch.emulate_ctxt.decode;
2402 if ((emulation_type & EMULTYPE_TRAP_UD) &&
2403 (!(c->twobyte && c->b == 0x01 &&
2404 (c->modrm_reg == 0 || c->modrm_reg == 3) &&
2405 c->modrm_mod == 3 && c->modrm_rm == 1)))
2406 return EMULATE_FAIL;
2407
2408 ++vcpu->stat.insn_emulation;
2409 if (r) {
2410 ++vcpu->stat.insn_emulation_fail;
2411 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2412 return EMULATE_DONE;
2413 return EMULATE_FAIL;
2414 }
2415 }
2416
2417 if (emulation_type & EMULTYPE_SKIP) {
2418 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
2419 return EMULATE_DONE;
2420 }
2421
2422 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2423
2424 if (vcpu->arch.pio.string)
2425 return EMULATE_DO_MMIO;
2426
2427 if ((r || vcpu->mmio_is_write) && run) {
2428 run->exit_reason = KVM_EXIT_MMIO;
2429 run->mmio.phys_addr = vcpu->mmio_phys_addr;
2430 memcpy(run->mmio.data, vcpu->mmio_data, 8);
2431 run->mmio.len = vcpu->mmio_size;
2432 run->mmio.is_write = vcpu->mmio_is_write;
2433 }
2434
2435 if (r) {
2436 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2437 return EMULATE_DONE;
2438 if (!vcpu->mmio_needed) {
2439 kvm_report_emulation_failure(vcpu, "mmio");
2440 return EMULATE_FAIL;
2441 }
2442 return EMULATE_DO_MMIO;
2443 }
2444
2445 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
2446
2447 if (vcpu->mmio_is_write) {
2448 vcpu->mmio_needed = 0;
2449 return EMULATE_DO_MMIO;
2450 }
2451
2452 return EMULATE_DONE;
2453 }
2454 EXPORT_SYMBOL_GPL(emulate_instruction);
2455
2456 static int pio_copy_data(struct kvm_vcpu *vcpu)
2457 {
2458 void *p = vcpu->arch.pio_data;
2459 gva_t q = vcpu->arch.pio.guest_gva;
2460 unsigned bytes;
2461 int ret;
2462
2463 bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
2464 if (vcpu->arch.pio.in)
2465 ret = kvm_write_guest_virt(q, p, bytes, vcpu);
2466 else
2467 ret = kvm_read_guest_virt(q, p, bytes, vcpu);
2468 return ret;
2469 }
2470
2471 int complete_pio(struct kvm_vcpu *vcpu)
2472 {
2473 struct kvm_pio_request *io = &vcpu->arch.pio;
2474 long delta;
2475 int r;
2476 unsigned long val;
2477
2478 if (!io->string) {
2479 if (io->in) {
2480 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2481 memcpy(&val, vcpu->arch.pio_data, io->size);
2482 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
2483 }
2484 } else {
2485 if (io->in) {
2486 r = pio_copy_data(vcpu);
2487 if (r)
2488 return r;
2489 }
2490
2491 delta = 1;
2492 if (io->rep) {
2493 delta *= io->cur_count;
2494 /*
2495 * The size of the register should really depend on
2496 * current address size.
2497 */
2498 val = kvm_register_read(vcpu, VCPU_REGS_RCX);
2499 val -= delta;
2500 kvm_register_write(vcpu, VCPU_REGS_RCX, val);
2501 }
2502 if (io->down)
2503 delta = -delta;
2504 delta *= io->size;
2505 if (io->in) {
2506 val = kvm_register_read(vcpu, VCPU_REGS_RDI);
2507 val += delta;
2508 kvm_register_write(vcpu, VCPU_REGS_RDI, val);
2509 } else {
2510 val = kvm_register_read(vcpu, VCPU_REGS_RSI);
2511 val += delta;
2512 kvm_register_write(vcpu, VCPU_REGS_RSI, val);
2513 }
2514 }
2515
2516 io->count -= io->cur_count;
2517 io->cur_count = 0;
2518
2519 return 0;
2520 }
2521
2522 static void kernel_pio(struct kvm_io_device *pio_dev,
2523 struct kvm_vcpu *vcpu,
2524 void *pd)
2525 {
2526 /* TODO: String I/O for in kernel device */
2527
2528 mutex_lock(&vcpu->kvm->lock);
2529 if (vcpu->arch.pio.in)
2530 kvm_iodevice_read(pio_dev, vcpu->arch.pio.port,
2531 vcpu->arch.pio.size,
2532 pd);
2533 else
2534 kvm_iodevice_write(pio_dev, vcpu->arch.pio.port,
2535 vcpu->arch.pio.size,
2536 pd);
2537 mutex_unlock(&vcpu->kvm->lock);
2538 }
2539
2540 static void pio_string_write(struct kvm_io_device *pio_dev,
2541 struct kvm_vcpu *vcpu)
2542 {
2543 struct kvm_pio_request *io = &vcpu->arch.pio;
2544 void *pd = vcpu->arch.pio_data;
2545 int i;
2546
2547 mutex_lock(&vcpu->kvm->lock);
2548 for (i = 0; i < io->cur_count; i++) {
2549 kvm_iodevice_write(pio_dev, io->port,
2550 io->size,
2551 pd);
2552 pd += io->size;
2553 }
2554 mutex_unlock(&vcpu->kvm->lock);
2555 }
2556
2557 static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
2558 gpa_t addr, int len,
2559 int is_write)
2560 {
2561 return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr, len, is_write);
2562 }
2563
2564 int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2565 int size, unsigned port)
2566 {
2567 struct kvm_io_device *pio_dev;
2568 unsigned long val;
2569
2570 vcpu->run->exit_reason = KVM_EXIT_IO;
2571 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2572 vcpu->run->io.size = vcpu->arch.pio.size = size;
2573 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2574 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
2575 vcpu->run->io.port = vcpu->arch.pio.port = port;
2576 vcpu->arch.pio.in = in;
2577 vcpu->arch.pio.string = 0;
2578 vcpu->arch.pio.down = 0;
2579 vcpu->arch.pio.rep = 0;
2580
2581 if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2582 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2583 handler);
2584 else
2585 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2586 handler);
2587
2588 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2589 memcpy(vcpu->arch.pio_data, &val, 4);
2590
2591 pio_dev = vcpu_find_pio_dev(vcpu, port, size, !in);
2592 if (pio_dev) {
2593 kernel_pio(pio_dev, vcpu, vcpu->arch.pio_data);
2594 complete_pio(vcpu);
2595 return 1;
2596 }
2597 return 0;
2598 }
2599 EXPORT_SYMBOL_GPL(kvm_emulate_pio);
2600
2601 int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2602 int size, unsigned long count, int down,
2603 gva_t address, int rep, unsigned port)
2604 {
2605 unsigned now, in_page;
2606 int ret = 0;
2607 struct kvm_io_device *pio_dev;
2608
2609 vcpu->run->exit_reason = KVM_EXIT_IO;
2610 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2611 vcpu->run->io.size = vcpu->arch.pio.size = size;
2612 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2613 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
2614 vcpu->run->io.port = vcpu->arch.pio.port = port;
2615 vcpu->arch.pio.in = in;
2616 vcpu->arch.pio.string = 1;
2617 vcpu->arch.pio.down = down;
2618 vcpu->arch.pio.rep = rep;
2619
2620 if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2621 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2622 handler);
2623 else
2624 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2625 handler);
2626
2627 if (!count) {
2628 kvm_x86_ops->skip_emulated_instruction(vcpu);
2629 return 1;
2630 }
2631
2632 if (!down)
2633 in_page = PAGE_SIZE - offset_in_page(address);
2634 else
2635 in_page = offset_in_page(address) + size;
2636 now = min(count, (unsigned long)in_page / size);
2637 if (!now)
2638 now = 1;
2639 if (down) {
2640 /*
2641 * String I/O in reverse. Yuck. Kill the guest, fix later.
2642 */
2643 pr_unimpl(vcpu, "guest string pio down\n");
2644 kvm_inject_gp(vcpu, 0);
2645 return 1;
2646 }
2647 vcpu->run->io.count = now;
2648 vcpu->arch.pio.cur_count = now;
2649
2650 if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
2651 kvm_x86_ops->skip_emulated_instruction(vcpu);
2652
2653 vcpu->arch.pio.guest_gva = address;
2654
2655 pio_dev = vcpu_find_pio_dev(vcpu, port,
2656 vcpu->arch.pio.cur_count,
2657 !vcpu->arch.pio.in);
2658 if (!vcpu->arch.pio.in) {
2659 /* string PIO write */
2660 ret = pio_copy_data(vcpu);
2661 if (ret == X86EMUL_PROPAGATE_FAULT) {
2662 kvm_inject_gp(vcpu, 0);
2663 return 1;
2664 }
2665 if (ret == 0 && pio_dev) {
2666 pio_string_write(pio_dev, vcpu);
2667 complete_pio(vcpu);
2668 if (vcpu->arch.pio.count == 0)
2669 ret = 1;
2670 }
2671 } else if (pio_dev)
2672 pr_unimpl(vcpu, "no string pio read support yet, "
2673 "port %x size %d count %ld\n",
2674 port, size, count);
2675
2676 return ret;
2677 }
2678 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
2679
2680 static void bounce_off(void *info)
2681 {
2682 /* nothing */
2683 }
2684
2685 static unsigned int ref_freq;
2686 static unsigned long tsc_khz_ref;
2687
2688 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
2689 void *data)
2690 {
2691 struct cpufreq_freqs *freq = data;
2692 struct kvm *kvm;
2693 struct kvm_vcpu *vcpu;
2694 int i, send_ipi = 0;
2695
2696 if (!ref_freq)
2697 ref_freq = freq->old;
2698
2699 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
2700 return 0;
2701 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
2702 return 0;
2703 per_cpu(cpu_tsc_khz, freq->cpu) = cpufreq_scale(tsc_khz_ref, ref_freq, freq->new);
2704
2705 spin_lock(&kvm_lock);
2706 list_for_each_entry(kvm, &vm_list, vm_list) {
2707 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
2708 vcpu = kvm->vcpus[i];
2709 if (!vcpu)
2710 continue;
2711 if (vcpu->cpu != freq->cpu)
2712 continue;
2713 if (!kvm_request_guest_time_update(vcpu))
2714 continue;
2715 if (vcpu->cpu != smp_processor_id())
2716 send_ipi++;
2717 }
2718 }
2719 spin_unlock(&kvm_lock);
2720
2721 if (freq->old < freq->new && send_ipi) {
2722 /*
2723 * We upscale the frequency. Must make the guest
2724 * doesn't see old kvmclock values while running with
2725 * the new frequency, otherwise we risk the guest sees
2726 * time go backwards.
2727 *
2728 * In case we update the frequency for another cpu
2729 * (which might be in guest context) send an interrupt
2730 * to kick the cpu out of guest context. Next time
2731 * guest context is entered kvmclock will be updated,
2732 * so the guest will not see stale values.
2733 */
2734 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
2735 }
2736 return 0;
2737 }
2738
2739 static struct notifier_block kvmclock_cpufreq_notifier_block = {
2740 .notifier_call = kvmclock_cpufreq_notifier
2741 };
2742
2743 int kvm_arch_init(void *opaque)
2744 {
2745 int r, cpu;
2746 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
2747
2748 if (kvm_x86_ops) {
2749 printk(KERN_ERR "kvm: already loaded the other module\n");
2750 r = -EEXIST;
2751 goto out;
2752 }
2753
2754 if (!ops->cpu_has_kvm_support()) {
2755 printk(KERN_ERR "kvm: no hardware support\n");
2756 r = -EOPNOTSUPP;
2757 goto out;
2758 }
2759 if (ops->disabled_by_bios()) {
2760 printk(KERN_ERR "kvm: disabled by bios\n");
2761 r = -EOPNOTSUPP;
2762 goto out;
2763 }
2764
2765 r = kvm_mmu_module_init();
2766 if (r)
2767 goto out;
2768
2769 kvm_init_msr_list();
2770
2771 kvm_x86_ops = ops;
2772 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
2773 kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
2774 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
2775 PT_DIRTY_MASK, PT64_NX_MASK, 0, 0);
2776
2777 for_each_possible_cpu(cpu)
2778 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
2779 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
2780 tsc_khz_ref = tsc_khz;
2781 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
2782 CPUFREQ_TRANSITION_NOTIFIER);
2783 }
2784
2785 return 0;
2786
2787 out:
2788 return r;
2789 }
2790
2791 void kvm_arch_exit(void)
2792 {
2793 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
2794 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
2795 CPUFREQ_TRANSITION_NOTIFIER);
2796 kvm_x86_ops = NULL;
2797 kvm_mmu_module_exit();
2798 }
2799
2800 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
2801 {
2802 ++vcpu->stat.halt_exits;
2803 KVMTRACE_0D(HLT, vcpu, handler);
2804 if (irqchip_in_kernel(vcpu->kvm)) {
2805 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
2806 return 1;
2807 } else {
2808 vcpu->run->exit_reason = KVM_EXIT_HLT;
2809 return 0;
2810 }
2811 }
2812 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
2813
2814 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
2815 unsigned long a1)
2816 {
2817 if (is_long_mode(vcpu))
2818 return a0;
2819 else
2820 return a0 | ((gpa_t)a1 << 32);
2821 }
2822
2823 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
2824 {
2825 unsigned long nr, a0, a1, a2, a3, ret;
2826 int r = 1;
2827
2828 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
2829 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
2830 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
2831 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
2832 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
2833
2834 KVMTRACE_1D(VMMCALL, vcpu, (u32)nr, handler);
2835
2836 if (!is_long_mode(vcpu)) {
2837 nr &= 0xFFFFFFFF;
2838 a0 &= 0xFFFFFFFF;
2839 a1 &= 0xFFFFFFFF;
2840 a2 &= 0xFFFFFFFF;
2841 a3 &= 0xFFFFFFFF;
2842 }
2843
2844 switch (nr) {
2845 case KVM_HC_VAPIC_POLL_IRQ:
2846 ret = 0;
2847 break;
2848 case KVM_HC_MMU_OP:
2849 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
2850 break;
2851 default:
2852 ret = -KVM_ENOSYS;
2853 break;
2854 }
2855 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
2856 ++vcpu->stat.hypercalls;
2857 return r;
2858 }
2859 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
2860
2861 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
2862 {
2863 char instruction[3];
2864 int ret = 0;
2865 unsigned long rip = kvm_rip_read(vcpu);
2866
2867
2868 /*
2869 * Blow out the MMU to ensure that no other VCPU has an active mapping
2870 * to ensure that the updated hypercall appears atomically across all
2871 * VCPUs.
2872 */
2873 kvm_mmu_zap_all(vcpu->kvm);
2874
2875 kvm_x86_ops->patch_hypercall(vcpu, instruction);
2876 if (emulator_write_emulated(rip, instruction, 3, vcpu)
2877 != X86EMUL_CONTINUE)
2878 ret = -EFAULT;
2879
2880 return ret;
2881 }
2882
2883 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
2884 {
2885 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
2886 }
2887
2888 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2889 {
2890 struct descriptor_table dt = { limit, base };
2891
2892 kvm_x86_ops->set_gdt(vcpu, &dt);
2893 }
2894
2895 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2896 {
2897 struct descriptor_table dt = { limit, base };
2898
2899 kvm_x86_ops->set_idt(vcpu, &dt);
2900 }
2901
2902 void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
2903 unsigned long *rflags)
2904 {
2905 kvm_lmsw(vcpu, msw);
2906 *rflags = kvm_x86_ops->get_rflags(vcpu);
2907 }
2908
2909 unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
2910 {
2911 unsigned long value;
2912
2913 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
2914 switch (cr) {
2915 case 0:
2916 value = vcpu->arch.cr0;
2917 break;
2918 case 2:
2919 value = vcpu->arch.cr2;
2920 break;
2921 case 3:
2922 value = vcpu->arch.cr3;
2923 break;
2924 case 4:
2925 value = vcpu->arch.cr4;
2926 break;
2927 case 8:
2928 value = kvm_get_cr8(vcpu);
2929 break;
2930 default:
2931 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
2932 return 0;
2933 }
2934 KVMTRACE_3D(CR_READ, vcpu, (u32)cr, (u32)value,
2935 (u32)((u64)value >> 32), handler);
2936
2937 return value;
2938 }
2939
2940 void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
2941 unsigned long *rflags)
2942 {
2943 KVMTRACE_3D(CR_WRITE, vcpu, (u32)cr, (u32)val,
2944 (u32)((u64)val >> 32), handler);
2945
2946 switch (cr) {
2947 case 0:
2948 kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
2949 *rflags = kvm_x86_ops->get_rflags(vcpu);
2950 break;
2951 case 2:
2952 vcpu->arch.cr2 = val;
2953 break;
2954 case 3:
2955 kvm_set_cr3(vcpu, val);
2956 break;
2957 case 4:
2958 kvm_set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
2959 break;
2960 case 8:
2961 kvm_set_cr8(vcpu, val & 0xfUL);
2962 break;
2963 default:
2964 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
2965 }
2966 }
2967
2968 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
2969 {
2970 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
2971 int j, nent = vcpu->arch.cpuid_nent;
2972
2973 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
2974 /* when no next entry is found, the current entry[i] is reselected */
2975 for (j = i + 1; ; j = (j + 1) % nent) {
2976 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
2977 if (ej->function == e->function) {
2978 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2979 return j;
2980 }
2981 }
2982 return 0; /* silence gcc, even though control never reaches here */
2983 }
2984
2985 /* find an entry with matching function, matching index (if needed), and that
2986 * should be read next (if it's stateful) */
2987 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
2988 u32 function, u32 index)
2989 {
2990 if (e->function != function)
2991 return 0;
2992 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
2993 return 0;
2994 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
2995 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
2996 return 0;
2997 return 1;
2998 }
2999
3000 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
3001 u32 function, u32 index)
3002 {
3003 int i;
3004 struct kvm_cpuid_entry2 *best = NULL;
3005
3006 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
3007 struct kvm_cpuid_entry2 *e;
3008
3009 e = &vcpu->arch.cpuid_entries[i];
3010 if (is_matching_cpuid_entry(e, function, index)) {
3011 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
3012 move_to_next_stateful_cpuid_entry(vcpu, i);
3013 best = e;
3014 break;
3015 }
3016 /*
3017 * Both basic or both extended?
3018 */
3019 if (((e->function ^ function) & 0x80000000) == 0)
3020 if (!best || e->function > best->function)
3021 best = e;
3022 }
3023 return best;
3024 }
3025
3026 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
3027 {
3028 struct kvm_cpuid_entry2 *best;
3029
3030 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
3031 if (best)
3032 return best->eax & 0xff;
3033 return 36;
3034 }
3035
3036 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
3037 {
3038 u32 function, index;
3039 struct kvm_cpuid_entry2 *best;
3040
3041 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
3042 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
3043 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
3044 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
3045 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
3046 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
3047 best = kvm_find_cpuid_entry(vcpu, function, index);
3048 if (best) {
3049 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
3050 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
3051 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
3052 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
3053 }
3054 kvm_x86_ops->skip_emulated_instruction(vcpu);
3055 KVMTRACE_5D(CPUID, vcpu, function,
3056 (u32)kvm_register_read(vcpu, VCPU_REGS_RAX),
3057 (u32)kvm_register_read(vcpu, VCPU_REGS_RBX),
3058 (u32)kvm_register_read(vcpu, VCPU_REGS_RCX),
3059 (u32)kvm_register_read(vcpu, VCPU_REGS_RDX), handler);
3060 }
3061 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
3062
3063 /*
3064 * Check if userspace requested an interrupt window, and that the
3065 * interrupt window is open.
3066 *
3067 * No need to exit to userspace if we already have an interrupt queued.
3068 */
3069 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
3070 struct kvm_run *kvm_run)
3071 {
3072 return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
3073 kvm_run->request_interrupt_window &&
3074 kvm_arch_interrupt_allowed(vcpu));
3075 }
3076
3077 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
3078 struct kvm_run *kvm_run)
3079 {
3080 kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
3081 kvm_run->cr8 = kvm_get_cr8(vcpu);
3082 kvm_run->apic_base = kvm_get_apic_base(vcpu);
3083 if (irqchip_in_kernel(vcpu->kvm))
3084 kvm_run->ready_for_interrupt_injection = 1;
3085 else
3086 kvm_run->ready_for_interrupt_injection =
3087 (kvm_arch_interrupt_allowed(vcpu) &&
3088 !kvm_cpu_has_interrupt(vcpu));
3089 }
3090
3091 static void vapic_enter(struct kvm_vcpu *vcpu)
3092 {
3093 struct kvm_lapic *apic = vcpu->arch.apic;
3094 struct page *page;
3095
3096 if (!apic || !apic->vapic_addr)
3097 return;
3098
3099 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3100
3101 vcpu->arch.apic->vapic_page = page;
3102 }
3103
3104 static void vapic_exit(struct kvm_vcpu *vcpu)
3105 {
3106 struct kvm_lapic *apic = vcpu->arch.apic;
3107
3108 if (!apic || !apic->vapic_addr)
3109 return;
3110
3111 down_read(&vcpu->kvm->slots_lock);
3112 kvm_release_page_dirty(apic->vapic_page);
3113 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3114 up_read(&vcpu->kvm->slots_lock);
3115 }
3116
3117 static int vcpu_enter_guest(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3118 {
3119 int r;
3120
3121 if (vcpu->requests)
3122 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
3123 kvm_mmu_unload(vcpu);
3124
3125 r = kvm_mmu_reload(vcpu);
3126 if (unlikely(r))
3127 goto out;
3128
3129 if (vcpu->requests) {
3130 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
3131 __kvm_migrate_timers(vcpu);
3132 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE, &vcpu->requests))
3133 kvm_write_guest_time(vcpu);
3134 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
3135 kvm_mmu_sync_roots(vcpu);
3136 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
3137 kvm_x86_ops->tlb_flush(vcpu);
3138 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
3139 &vcpu->requests)) {
3140 kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
3141 r = 0;
3142 goto out;
3143 }
3144 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
3145 kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
3146 r = 0;
3147 goto out;
3148 }
3149 }
3150
3151 preempt_disable();
3152
3153 kvm_x86_ops->prepare_guest_switch(vcpu);
3154 kvm_load_guest_fpu(vcpu);
3155
3156 local_irq_disable();
3157
3158 if (vcpu->requests || need_resched() || signal_pending(current)) {
3159 local_irq_enable();
3160 preempt_enable();
3161 r = 1;
3162 goto out;
3163 }
3164
3165 vcpu->guest_mode = 1;
3166 /*
3167 * Make sure that guest_mode assignment won't happen after
3168 * testing the pending IRQ vector bitmap.
3169 */
3170 smp_wmb();
3171
3172 if (vcpu->arch.exception.pending)
3173 __queue_exception(vcpu);
3174 else if (irqchip_in_kernel(vcpu->kvm))
3175 kvm_x86_ops->inject_pending_irq(vcpu, kvm_run);
3176 else
3177 kvm_x86_ops->inject_pending_vectors(vcpu, kvm_run);
3178
3179 kvm_lapic_sync_to_vapic(vcpu);
3180
3181 up_read(&vcpu->kvm->slots_lock);
3182
3183 kvm_guest_enter();
3184
3185 get_debugreg(vcpu->arch.host_dr6, 6);
3186 get_debugreg(vcpu->arch.host_dr7, 7);
3187 if (unlikely(vcpu->arch.switch_db_regs)) {
3188 get_debugreg(vcpu->arch.host_db[0], 0);
3189 get_debugreg(vcpu->arch.host_db[1], 1);
3190 get_debugreg(vcpu->arch.host_db[2], 2);
3191 get_debugreg(vcpu->arch.host_db[3], 3);
3192
3193 set_debugreg(0, 7);
3194 set_debugreg(vcpu->arch.eff_db[0], 0);
3195 set_debugreg(vcpu->arch.eff_db[1], 1);
3196 set_debugreg(vcpu->arch.eff_db[2], 2);
3197 set_debugreg(vcpu->arch.eff_db[3], 3);
3198 }
3199
3200 KVMTRACE_0D(VMENTRY, vcpu, entryexit);
3201 kvm_x86_ops->run(vcpu, kvm_run);
3202
3203 if (unlikely(vcpu->arch.switch_db_regs)) {
3204 set_debugreg(0, 7);
3205 set_debugreg(vcpu->arch.host_db[0], 0);
3206 set_debugreg(vcpu->arch.host_db[1], 1);
3207 set_debugreg(vcpu->arch.host_db[2], 2);
3208 set_debugreg(vcpu->arch.host_db[3], 3);
3209 }
3210 set_debugreg(vcpu->arch.host_dr6, 6);
3211 set_debugreg(vcpu->arch.host_dr7, 7);
3212
3213 vcpu->guest_mode = 0;
3214 local_irq_enable();
3215
3216 ++vcpu->stat.exits;
3217
3218 /*
3219 * We must have an instruction between local_irq_enable() and
3220 * kvm_guest_exit(), so the timer interrupt isn't delayed by
3221 * the interrupt shadow. The stat.exits increment will do nicely.
3222 * But we need to prevent reordering, hence this barrier():
3223 */
3224 barrier();
3225
3226 kvm_guest_exit();
3227
3228 preempt_enable();
3229
3230 down_read(&vcpu->kvm->slots_lock);
3231
3232 /*
3233 * Profile KVM exit RIPs:
3234 */
3235 if (unlikely(prof_on == KVM_PROFILING)) {
3236 unsigned long rip = kvm_rip_read(vcpu);
3237 profile_hit(KVM_PROFILING, (void *)rip);
3238 }
3239
3240 if (vcpu->arch.exception.pending && kvm_x86_ops->exception_injected(vcpu))
3241 vcpu->arch.exception.pending = false;
3242
3243 kvm_lapic_sync_from_vapic(vcpu);
3244
3245 r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
3246 out:
3247 return r;
3248 }
3249
3250
3251 static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3252 {
3253 int r;
3254
3255 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
3256 pr_debug("vcpu %d received sipi with vector # %x\n",
3257 vcpu->vcpu_id, vcpu->arch.sipi_vector);
3258 kvm_lapic_reset(vcpu);
3259 r = kvm_arch_vcpu_reset(vcpu);
3260 if (r)
3261 return r;
3262 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
3263 }
3264
3265 down_read(&vcpu->kvm->slots_lock);
3266 vapic_enter(vcpu);
3267
3268 r = 1;
3269 while (r > 0) {
3270 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
3271 r = vcpu_enter_guest(vcpu, kvm_run);
3272 else {
3273 up_read(&vcpu->kvm->slots_lock);
3274 kvm_vcpu_block(vcpu);
3275 down_read(&vcpu->kvm->slots_lock);
3276 if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
3277 {
3278 switch(vcpu->arch.mp_state) {
3279 case KVM_MP_STATE_HALTED:
3280 vcpu->arch.mp_state =
3281 KVM_MP_STATE_RUNNABLE;
3282 case KVM_MP_STATE_RUNNABLE:
3283 break;
3284 case KVM_MP_STATE_SIPI_RECEIVED:
3285 default:
3286 r = -EINTR;
3287 break;
3288 }
3289 }
3290 }
3291
3292 if (r <= 0)
3293 break;
3294
3295 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
3296 if (kvm_cpu_has_pending_timer(vcpu))
3297 kvm_inject_pending_timer_irqs(vcpu);
3298
3299 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
3300 r = -EINTR;
3301 kvm_run->exit_reason = KVM_EXIT_INTR;
3302 ++vcpu->stat.request_irq_exits;
3303 }
3304 if (signal_pending(current)) {
3305 r = -EINTR;
3306 kvm_run->exit_reason = KVM_EXIT_INTR;
3307 ++vcpu->stat.signal_exits;
3308 }
3309 if (need_resched()) {
3310 up_read(&vcpu->kvm->slots_lock);
3311 kvm_resched(vcpu);
3312 down_read(&vcpu->kvm->slots_lock);
3313 }
3314 }
3315
3316 up_read(&vcpu->kvm->slots_lock);
3317 post_kvm_run_save(vcpu, kvm_run);
3318
3319 vapic_exit(vcpu);
3320
3321 return r;
3322 }
3323
3324 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3325 {
3326 int r;
3327 sigset_t sigsaved;
3328
3329 vcpu_load(vcpu);
3330
3331 if (vcpu->sigset_active)
3332 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
3333
3334 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
3335 kvm_vcpu_block(vcpu);
3336 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
3337 r = -EAGAIN;
3338 goto out;
3339 }
3340
3341 /* re-sync apic's tpr */
3342 if (!irqchip_in_kernel(vcpu->kvm))
3343 kvm_set_cr8(vcpu, kvm_run->cr8);
3344
3345 if (vcpu->arch.pio.cur_count) {
3346 r = complete_pio(vcpu);
3347 if (r)
3348 goto out;
3349 }
3350 #if CONFIG_HAS_IOMEM
3351 if (vcpu->mmio_needed) {
3352 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
3353 vcpu->mmio_read_completed = 1;
3354 vcpu->mmio_needed = 0;
3355
3356 down_read(&vcpu->kvm->slots_lock);
3357 r = emulate_instruction(vcpu, kvm_run,
3358 vcpu->arch.mmio_fault_cr2, 0,
3359 EMULTYPE_NO_DECODE);
3360 up_read(&vcpu->kvm->slots_lock);
3361 if (r == EMULATE_DO_MMIO) {
3362 /*
3363 * Read-modify-write. Back to userspace.
3364 */
3365 r = 0;
3366 goto out;
3367 }
3368 }
3369 #endif
3370 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
3371 kvm_register_write(vcpu, VCPU_REGS_RAX,
3372 kvm_run->hypercall.ret);
3373
3374 r = __vcpu_run(vcpu, kvm_run);
3375
3376 out:
3377 if (vcpu->sigset_active)
3378 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
3379
3380 vcpu_put(vcpu);
3381 return r;
3382 }
3383
3384 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3385 {
3386 vcpu_load(vcpu);
3387
3388 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3389 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3390 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3391 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3392 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3393 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3394 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3395 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3396 #ifdef CONFIG_X86_64
3397 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
3398 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
3399 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
3400 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
3401 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
3402 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
3403 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
3404 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
3405 #endif
3406
3407 regs->rip = kvm_rip_read(vcpu);
3408 regs->rflags = kvm_x86_ops->get_rflags(vcpu);
3409
3410 /*
3411 * Don't leak debug flags in case they were set for guest debugging
3412 */
3413 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
3414 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
3415
3416 vcpu_put(vcpu);
3417
3418 return 0;
3419 }
3420
3421 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3422 {
3423 vcpu_load(vcpu);
3424
3425 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
3426 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
3427 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
3428 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
3429 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
3430 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
3431 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
3432 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
3433 #ifdef CONFIG_X86_64
3434 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
3435 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
3436 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
3437 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
3438 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
3439 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
3440 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
3441 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
3442
3443 #endif
3444
3445 kvm_rip_write(vcpu, regs->rip);
3446 kvm_x86_ops->set_rflags(vcpu, regs->rflags);
3447
3448
3449 vcpu->arch.exception.pending = false;
3450
3451 vcpu_put(vcpu);
3452
3453 return 0;
3454 }
3455
3456 void kvm_get_segment(struct kvm_vcpu *vcpu,
3457 struct kvm_segment *var, int seg)
3458 {
3459 kvm_x86_ops->get_segment(vcpu, var, seg);
3460 }
3461
3462 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
3463 {
3464 struct kvm_segment cs;
3465
3466 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
3467 *db = cs.db;
3468 *l = cs.l;
3469 }
3470 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
3471
3472 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
3473 struct kvm_sregs *sregs)
3474 {
3475 struct descriptor_table dt;
3476 int pending_vec;
3477
3478 vcpu_load(vcpu);
3479
3480 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3481 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3482 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3483 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3484 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3485 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
3486
3487 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3488 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3489
3490 kvm_x86_ops->get_idt(vcpu, &dt);
3491 sregs->idt.limit = dt.limit;
3492 sregs->idt.base = dt.base;
3493 kvm_x86_ops->get_gdt(vcpu, &dt);
3494 sregs->gdt.limit = dt.limit;
3495 sregs->gdt.base = dt.base;
3496
3497 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3498 sregs->cr0 = vcpu->arch.cr0;
3499 sregs->cr2 = vcpu->arch.cr2;
3500 sregs->cr3 = vcpu->arch.cr3;
3501 sregs->cr4 = vcpu->arch.cr4;
3502 sregs->cr8 = kvm_get_cr8(vcpu);
3503 sregs->efer = vcpu->arch.shadow_efer;
3504 sregs->apic_base = kvm_get_apic_base(vcpu);
3505
3506 if (irqchip_in_kernel(vcpu->kvm)) {
3507 memset(sregs->interrupt_bitmap, 0,
3508 sizeof sregs->interrupt_bitmap);
3509 pending_vec = kvm_x86_ops->get_irq(vcpu);
3510 if (pending_vec >= 0)
3511 set_bit(pending_vec,
3512 (unsigned long *)sregs->interrupt_bitmap);
3513 } else
3514 memcpy(sregs->interrupt_bitmap, vcpu->arch.irq_pending,
3515 sizeof sregs->interrupt_bitmap);
3516
3517 vcpu_put(vcpu);
3518
3519 return 0;
3520 }
3521
3522 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
3523 struct kvm_mp_state *mp_state)
3524 {
3525 vcpu_load(vcpu);
3526 mp_state->mp_state = vcpu->arch.mp_state;
3527 vcpu_put(vcpu);
3528 return 0;
3529 }
3530
3531 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
3532 struct kvm_mp_state *mp_state)
3533 {
3534 vcpu_load(vcpu);
3535 vcpu->arch.mp_state = mp_state->mp_state;
3536 vcpu_put(vcpu);
3537 return 0;
3538 }
3539
3540 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3541 struct kvm_segment *var, int seg)
3542 {
3543 kvm_x86_ops->set_segment(vcpu, var, seg);
3544 }
3545
3546 static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
3547 struct kvm_segment *kvm_desct)
3548 {
3549 kvm_desct->base = seg_desc->base0;
3550 kvm_desct->base |= seg_desc->base1 << 16;
3551 kvm_desct->base |= seg_desc->base2 << 24;
3552 kvm_desct->limit = seg_desc->limit0;
3553 kvm_desct->limit |= seg_desc->limit << 16;
3554 if (seg_desc->g) {
3555 kvm_desct->limit <<= 12;
3556 kvm_desct->limit |= 0xfff;
3557 }
3558 kvm_desct->selector = selector;
3559 kvm_desct->type = seg_desc->type;
3560 kvm_desct->present = seg_desc->p;
3561 kvm_desct->dpl = seg_desc->dpl;
3562 kvm_desct->db = seg_desc->d;
3563 kvm_desct->s = seg_desc->s;
3564 kvm_desct->l = seg_desc->l;
3565 kvm_desct->g = seg_desc->g;
3566 kvm_desct->avl = seg_desc->avl;
3567 if (!selector)
3568 kvm_desct->unusable = 1;
3569 else
3570 kvm_desct->unusable = 0;
3571 kvm_desct->padding = 0;
3572 }
3573
3574 static void get_segment_descriptor_dtable(struct kvm_vcpu *vcpu,
3575 u16 selector,
3576 struct descriptor_table *dtable)
3577 {
3578 if (selector & 1 << 2) {
3579 struct kvm_segment kvm_seg;
3580
3581 kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
3582
3583 if (kvm_seg.unusable)
3584 dtable->limit = 0;
3585 else
3586 dtable->limit = kvm_seg.limit;
3587 dtable->base = kvm_seg.base;
3588 }
3589 else
3590 kvm_x86_ops->get_gdt(vcpu, dtable);
3591 }
3592
3593 /* allowed just for 8 bytes segments */
3594 static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3595 struct desc_struct *seg_desc)
3596 {
3597 gpa_t gpa;
3598 struct descriptor_table dtable;
3599 u16 index = selector >> 3;
3600
3601 get_segment_descriptor_dtable(vcpu, selector, &dtable);
3602
3603 if (dtable.limit < index * 8 + 7) {
3604 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
3605 return 1;
3606 }
3607 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3608 gpa += index * 8;
3609 return kvm_read_guest(vcpu->kvm, gpa, seg_desc, 8);
3610 }
3611
3612 /* allowed just for 8 bytes segments */
3613 static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3614 struct desc_struct *seg_desc)
3615 {
3616 gpa_t gpa;
3617 struct descriptor_table dtable;
3618 u16 index = selector >> 3;
3619
3620 get_segment_descriptor_dtable(vcpu, selector, &dtable);
3621
3622 if (dtable.limit < index * 8 + 7)
3623 return 1;
3624 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3625 gpa += index * 8;
3626 return kvm_write_guest(vcpu->kvm, gpa, seg_desc, 8);
3627 }
3628
3629 static u32 get_tss_base_addr(struct kvm_vcpu *vcpu,
3630 struct desc_struct *seg_desc)
3631 {
3632 u32 base_addr;
3633
3634 base_addr = seg_desc->base0;
3635 base_addr |= (seg_desc->base1 << 16);
3636 base_addr |= (seg_desc->base2 << 24);
3637
3638 return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr);
3639 }
3640
3641 static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
3642 {
3643 struct kvm_segment kvm_seg;
3644
3645 kvm_get_segment(vcpu, &kvm_seg, seg);
3646 return kvm_seg.selector;
3647 }
3648
3649 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
3650 u16 selector,
3651 struct kvm_segment *kvm_seg)
3652 {
3653 struct desc_struct seg_desc;
3654
3655 if (load_guest_segment_descriptor(vcpu, selector, &seg_desc))
3656 return 1;
3657 seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg);
3658 return 0;
3659 }
3660
3661 static int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
3662 {
3663 struct kvm_segment segvar = {
3664 .base = selector << 4,
3665 .limit = 0xffff,
3666 .selector = selector,
3667 .type = 3,
3668 .present = 1,
3669 .dpl = 3,
3670 .db = 0,
3671 .s = 1,
3672 .l = 0,
3673 .g = 0,
3674 .avl = 0,
3675 .unusable = 0,
3676 };
3677 kvm_x86_ops->set_segment(vcpu, &segvar, seg);
3678 return 0;
3679 }
3680
3681 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3682 int type_bits, int seg)
3683 {
3684 struct kvm_segment kvm_seg;
3685
3686 if (!(vcpu->arch.cr0 & X86_CR0_PE))
3687 return kvm_load_realmode_segment(vcpu, selector, seg);
3688 if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
3689 return 1;
3690 kvm_seg.type |= type_bits;
3691
3692 if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS &&
3693 seg != VCPU_SREG_LDTR)
3694 if (!kvm_seg.s)
3695 kvm_seg.unusable = 1;
3696
3697 kvm_set_segment(vcpu, &kvm_seg, seg);
3698 return 0;
3699 }
3700
3701 static void save_state_to_tss32(struct kvm_vcpu *vcpu,
3702 struct tss_segment_32 *tss)
3703 {
3704 tss->cr3 = vcpu->arch.cr3;
3705 tss->eip = kvm_rip_read(vcpu);
3706 tss->eflags = kvm_x86_ops->get_rflags(vcpu);
3707 tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3708 tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3709 tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3710 tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3711 tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3712 tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3713 tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3714 tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3715 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3716 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3717 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3718 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3719 tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
3720 tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
3721 tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3722 }
3723
3724 static int load_state_from_tss32(struct kvm_vcpu *vcpu,
3725 struct tss_segment_32 *tss)
3726 {
3727 kvm_set_cr3(vcpu, tss->cr3);
3728
3729 kvm_rip_write(vcpu, tss->eip);
3730 kvm_x86_ops->set_rflags(vcpu, tss->eflags | 2);
3731
3732 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
3733 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
3734 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
3735 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
3736 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
3737 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
3738 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
3739 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
3740
3741 if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
3742 return 1;
3743
3744 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
3745 return 1;
3746
3747 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
3748 return 1;
3749
3750 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
3751 return 1;
3752
3753 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
3754 return 1;
3755
3756 if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS))
3757 return 1;
3758
3759 if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS))
3760 return 1;
3761 return 0;
3762 }
3763
3764 static void save_state_to_tss16(struct kvm_vcpu *vcpu,
3765 struct tss_segment_16 *tss)
3766 {
3767 tss->ip = kvm_rip_read(vcpu);
3768 tss->flag = kvm_x86_ops->get_rflags(vcpu);
3769 tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3770 tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3771 tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3772 tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3773 tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3774 tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3775 tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
3776 tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
3777
3778 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3779 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3780 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3781 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3782 tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3783 tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
3784 }
3785
3786 static int load_state_from_tss16(struct kvm_vcpu *vcpu,
3787 struct tss_segment_16 *tss)
3788 {
3789 kvm_rip_write(vcpu, tss->ip);
3790 kvm_x86_ops->set_rflags(vcpu, tss->flag | 2);
3791 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
3792 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
3793 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
3794 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
3795 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
3796 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
3797 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
3798 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
3799
3800 if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
3801 return 1;
3802
3803 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
3804 return 1;
3805
3806 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
3807 return 1;
3808
3809 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
3810 return 1;
3811
3812 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
3813 return 1;
3814 return 0;
3815 }
3816
3817 static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
3818 u16 old_tss_sel, u32 old_tss_base,
3819 struct desc_struct *nseg_desc)
3820 {
3821 struct tss_segment_16 tss_segment_16;
3822 int ret = 0;
3823
3824 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
3825 sizeof tss_segment_16))
3826 goto out;
3827
3828 save_state_to_tss16(vcpu, &tss_segment_16);
3829
3830 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
3831 sizeof tss_segment_16))
3832 goto out;
3833
3834 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
3835 &tss_segment_16, sizeof tss_segment_16))
3836 goto out;
3837
3838 if (old_tss_sel != 0xffff) {
3839 tss_segment_16.prev_task_link = old_tss_sel;
3840
3841 if (kvm_write_guest(vcpu->kvm,
3842 get_tss_base_addr(vcpu, nseg_desc),
3843 &tss_segment_16.prev_task_link,
3844 sizeof tss_segment_16.prev_task_link))
3845 goto out;
3846 }
3847
3848 if (load_state_from_tss16(vcpu, &tss_segment_16))
3849 goto out;
3850
3851 ret = 1;
3852 out:
3853 return ret;
3854 }
3855
3856 static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
3857 u16 old_tss_sel, u32 old_tss_base,
3858 struct desc_struct *nseg_desc)
3859 {
3860 struct tss_segment_32 tss_segment_32;
3861 int ret = 0;
3862
3863 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
3864 sizeof tss_segment_32))
3865 goto out;
3866
3867 save_state_to_tss32(vcpu, &tss_segment_32);
3868
3869 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
3870 sizeof tss_segment_32))
3871 goto out;
3872
3873 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
3874 &tss_segment_32, sizeof tss_segment_32))
3875 goto out;
3876
3877 if (old_tss_sel != 0xffff) {
3878 tss_segment_32.prev_task_link = old_tss_sel;
3879
3880 if (kvm_write_guest(vcpu->kvm,
3881 get_tss_base_addr(vcpu, nseg_desc),
3882 &tss_segment_32.prev_task_link,
3883 sizeof tss_segment_32.prev_task_link))
3884 goto out;
3885 }
3886
3887 if (load_state_from_tss32(vcpu, &tss_segment_32))
3888 goto out;
3889
3890 ret = 1;
3891 out:
3892 return ret;
3893 }
3894
3895 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
3896 {
3897 struct kvm_segment tr_seg;
3898 struct desc_struct cseg_desc;
3899 struct desc_struct nseg_desc;
3900 int ret = 0;
3901 u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
3902 u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
3903
3904 old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base);
3905
3906 /* FIXME: Handle errors. Failure to read either TSS or their
3907 * descriptors should generate a pagefault.
3908 */
3909 if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
3910 goto out;
3911
3912 if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
3913 goto out;
3914
3915 if (reason != TASK_SWITCH_IRET) {
3916 int cpl;
3917
3918 cpl = kvm_x86_ops->get_cpl(vcpu);
3919 if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
3920 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
3921 return 1;
3922 }
3923 }
3924
3925 if (!nseg_desc.p || (nseg_desc.limit0 | nseg_desc.limit << 16) < 0x67) {
3926 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
3927 return 1;
3928 }
3929
3930 if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
3931 cseg_desc.type &= ~(1 << 1); //clear the B flag
3932 save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
3933 }
3934
3935 if (reason == TASK_SWITCH_IRET) {
3936 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
3937 kvm_x86_ops->set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
3938 }
3939
3940 /* set back link to prev task only if NT bit is set in eflags
3941 note that old_tss_sel is not used afetr this point */
3942 if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
3943 old_tss_sel = 0xffff;
3944
3945 /* set back link to prev task only if NT bit is set in eflags
3946 note that old_tss_sel is not used afetr this point */
3947 if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
3948 old_tss_sel = 0xffff;
3949
3950 if (nseg_desc.type & 8)
3951 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_sel,
3952 old_tss_base, &nseg_desc);
3953 else
3954 ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_sel,
3955 old_tss_base, &nseg_desc);
3956
3957 if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
3958 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
3959 kvm_x86_ops->set_rflags(vcpu, eflags | X86_EFLAGS_NT);
3960 }
3961
3962 if (reason != TASK_SWITCH_IRET) {
3963 nseg_desc.type |= (1 << 1);
3964 save_guest_segment_descriptor(vcpu, tss_selector,
3965 &nseg_desc);
3966 }
3967
3968 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 | X86_CR0_TS);
3969 seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
3970 tr_seg.type = 11;
3971 kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
3972 out:
3973 return ret;
3974 }
3975 EXPORT_SYMBOL_GPL(kvm_task_switch);
3976
3977 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
3978 struct kvm_sregs *sregs)
3979 {
3980 int mmu_reset_needed = 0;
3981 int i, pending_vec, max_bits;
3982 struct descriptor_table dt;
3983
3984 vcpu_load(vcpu);
3985
3986 dt.limit = sregs->idt.limit;
3987 dt.base = sregs->idt.base;
3988 kvm_x86_ops->set_idt(vcpu, &dt);
3989 dt.limit = sregs->gdt.limit;
3990 dt.base = sregs->gdt.base;
3991 kvm_x86_ops->set_gdt(vcpu, &dt);
3992
3993 vcpu->arch.cr2 = sregs->cr2;
3994 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
3995
3996 down_read(&vcpu->kvm->slots_lock);
3997 if (gfn_to_memslot(vcpu->kvm, sregs->cr3 >> PAGE_SHIFT))
3998 vcpu->arch.cr3 = sregs->cr3;
3999 else
4000 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
4001 up_read(&vcpu->kvm->slots_lock);
4002
4003 kvm_set_cr8(vcpu, sregs->cr8);
4004
4005 mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
4006 kvm_x86_ops->set_efer(vcpu, sregs->efer);
4007 kvm_set_apic_base(vcpu, sregs->apic_base);
4008
4009 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
4010
4011 mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
4012 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
4013 vcpu->arch.cr0 = sregs->cr0;
4014
4015 mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
4016 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
4017 if (!is_long_mode(vcpu) && is_pae(vcpu))
4018 load_pdptrs(vcpu, vcpu->arch.cr3);
4019
4020 if (mmu_reset_needed)
4021 kvm_mmu_reset_context(vcpu);
4022
4023 if (!irqchip_in_kernel(vcpu->kvm)) {
4024 memcpy(vcpu->arch.irq_pending, sregs->interrupt_bitmap,
4025 sizeof vcpu->arch.irq_pending);
4026 vcpu->arch.irq_summary = 0;
4027 for (i = 0; i < ARRAY_SIZE(vcpu->arch.irq_pending); ++i)
4028 if (vcpu->arch.irq_pending[i])
4029 __set_bit(i, &vcpu->arch.irq_summary);
4030 } else {
4031 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
4032 pending_vec = find_first_bit(
4033 (const unsigned long *)sregs->interrupt_bitmap,
4034 max_bits);
4035 /* Only pending external irq is handled here */
4036 if (pending_vec < max_bits) {
4037 kvm_x86_ops->set_irq(vcpu, pending_vec);
4038 pr_debug("Set back pending irq %d\n",
4039 pending_vec);
4040 }
4041 kvm_pic_clear_isr_ack(vcpu->kvm);
4042 }
4043
4044 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4045 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4046 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4047 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4048 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4049 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4050
4051 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4052 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4053
4054 /* Older userspace won't unhalt the vcpu on reset. */
4055 if (vcpu->vcpu_id == 0 && kvm_rip_read(vcpu) == 0xfff0 &&
4056 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
4057 !(vcpu->arch.cr0 & X86_CR0_PE))
4058 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4059
4060 vcpu_put(vcpu);
4061
4062 return 0;
4063 }
4064
4065 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
4066 struct kvm_guest_debug *dbg)
4067 {
4068 int i, r;
4069
4070 vcpu_load(vcpu);
4071
4072 if ((dbg->control & (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) ==
4073 (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) {
4074 for (i = 0; i < KVM_NR_DB_REGS; ++i)
4075 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
4076 vcpu->arch.switch_db_regs =
4077 (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
4078 } else {
4079 for (i = 0; i < KVM_NR_DB_REGS; i++)
4080 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
4081 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
4082 }
4083
4084 r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
4085
4086 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
4087 kvm_queue_exception(vcpu, DB_VECTOR);
4088 else if (dbg->control & KVM_GUESTDBG_INJECT_BP)
4089 kvm_queue_exception(vcpu, BP_VECTOR);
4090
4091 vcpu_put(vcpu);
4092
4093 return r;
4094 }
4095
4096 /*
4097 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
4098 * we have asm/x86/processor.h
4099 */
4100 struct fxsave {
4101 u16 cwd;
4102 u16 swd;
4103 u16 twd;
4104 u16 fop;
4105 u64 rip;
4106 u64 rdp;
4107 u32 mxcsr;
4108 u32 mxcsr_mask;
4109 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
4110 #ifdef CONFIG_X86_64
4111 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
4112 #else
4113 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
4114 #endif
4115 };
4116
4117 /*
4118 * Translate a guest virtual address to a guest physical address.
4119 */
4120 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
4121 struct kvm_translation *tr)
4122 {
4123 unsigned long vaddr = tr->linear_address;
4124 gpa_t gpa;
4125
4126 vcpu_load(vcpu);
4127 down_read(&vcpu->kvm->slots_lock);
4128 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
4129 up_read(&vcpu->kvm->slots_lock);
4130 tr->physical_address = gpa;
4131 tr->valid = gpa != UNMAPPED_GVA;
4132 tr->writeable = 1;
4133 tr->usermode = 0;
4134 vcpu_put(vcpu);
4135
4136 return 0;
4137 }
4138
4139 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4140 {
4141 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4142
4143 vcpu_load(vcpu);
4144
4145 memcpy(fpu->fpr, fxsave->st_space, 128);
4146 fpu->fcw = fxsave->cwd;
4147 fpu->fsw = fxsave->swd;
4148 fpu->ftwx = fxsave->twd;
4149 fpu->last_opcode = fxsave->fop;
4150 fpu->last_ip = fxsave->rip;
4151 fpu->last_dp = fxsave->rdp;
4152 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
4153
4154 vcpu_put(vcpu);
4155
4156 return 0;
4157 }
4158
4159 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4160 {
4161 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4162
4163 vcpu_load(vcpu);
4164
4165 memcpy(fxsave->st_space, fpu->fpr, 128);
4166 fxsave->cwd = fpu->fcw;
4167 fxsave->swd = fpu->fsw;
4168 fxsave->twd = fpu->ftwx;
4169 fxsave->fop = fpu->last_opcode;
4170 fxsave->rip = fpu->last_ip;
4171 fxsave->rdp = fpu->last_dp;
4172 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
4173
4174 vcpu_put(vcpu);
4175
4176 return 0;
4177 }
4178
4179 void fx_init(struct kvm_vcpu *vcpu)
4180 {
4181 unsigned after_mxcsr_mask;
4182
4183 /*
4184 * Touch the fpu the first time in non atomic context as if
4185 * this is the first fpu instruction the exception handler
4186 * will fire before the instruction returns and it'll have to
4187 * allocate ram with GFP_KERNEL.
4188 */
4189 if (!used_math())
4190 kvm_fx_save(&vcpu->arch.host_fx_image);
4191
4192 /* Initialize guest FPU by resetting ours and saving into guest's */
4193 preempt_disable();
4194 kvm_fx_save(&vcpu->arch.host_fx_image);
4195 kvm_fx_finit();
4196 kvm_fx_save(&vcpu->arch.guest_fx_image);
4197 kvm_fx_restore(&vcpu->arch.host_fx_image);
4198 preempt_enable();
4199
4200 vcpu->arch.cr0 |= X86_CR0_ET;
4201 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
4202 vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
4203 memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
4204 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
4205 }
4206 EXPORT_SYMBOL_GPL(fx_init);
4207
4208 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
4209 {
4210 if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
4211 return;
4212
4213 vcpu->guest_fpu_loaded = 1;
4214 kvm_fx_save(&vcpu->arch.host_fx_image);
4215 kvm_fx_restore(&vcpu->arch.guest_fx_image);
4216 }
4217 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
4218
4219 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
4220 {
4221 if (!vcpu->guest_fpu_loaded)
4222 return;
4223
4224 vcpu->guest_fpu_loaded = 0;
4225 kvm_fx_save(&vcpu->arch.guest_fx_image);
4226 kvm_fx_restore(&vcpu->arch.host_fx_image);
4227 ++vcpu->stat.fpu_reload;
4228 }
4229 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
4230
4231 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
4232 {
4233 if (vcpu->arch.time_page) {
4234 kvm_release_page_dirty(vcpu->arch.time_page);
4235 vcpu->arch.time_page = NULL;
4236 }
4237
4238 kvm_x86_ops->vcpu_free(vcpu);
4239 }
4240
4241 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
4242 unsigned int id)
4243 {
4244 return kvm_x86_ops->vcpu_create(kvm, id);
4245 }
4246
4247 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
4248 {
4249 int r;
4250
4251 /* We do fxsave: this must be aligned. */
4252 BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
4253
4254 vcpu->arch.mtrr_state.have_fixed = 1;
4255 vcpu_load(vcpu);
4256 r = kvm_arch_vcpu_reset(vcpu);
4257 if (r == 0)
4258 r = kvm_mmu_setup(vcpu);
4259 vcpu_put(vcpu);
4260 if (r < 0)
4261 goto free_vcpu;
4262
4263 return 0;
4264 free_vcpu:
4265 kvm_x86_ops->vcpu_free(vcpu);
4266 return r;
4267 }
4268
4269 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
4270 {
4271 vcpu_load(vcpu);
4272 kvm_mmu_unload(vcpu);
4273 vcpu_put(vcpu);
4274
4275 kvm_x86_ops->vcpu_free(vcpu);
4276 }
4277
4278 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
4279 {
4280 vcpu->arch.nmi_pending = false;
4281 vcpu->arch.nmi_injected = false;
4282
4283 vcpu->arch.switch_db_regs = 0;
4284 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
4285 vcpu->arch.dr6 = DR6_FIXED_1;
4286 vcpu->arch.dr7 = DR7_FIXED_1;
4287
4288 return kvm_x86_ops->vcpu_reset(vcpu);
4289 }
4290
4291 void kvm_arch_hardware_enable(void *garbage)
4292 {
4293 kvm_x86_ops->hardware_enable(garbage);
4294 }
4295
4296 void kvm_arch_hardware_disable(void *garbage)
4297 {
4298 kvm_x86_ops->hardware_disable(garbage);
4299 }
4300
4301 int kvm_arch_hardware_setup(void)
4302 {
4303 return kvm_x86_ops->hardware_setup();
4304 }
4305
4306 void kvm_arch_hardware_unsetup(void)
4307 {
4308 kvm_x86_ops->hardware_unsetup();
4309 }
4310
4311 void kvm_arch_check_processor_compat(void *rtn)
4312 {
4313 kvm_x86_ops->check_processor_compatibility(rtn);
4314 }
4315
4316 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
4317 {
4318 struct page *page;
4319 struct kvm *kvm;
4320 int r;
4321
4322 BUG_ON(vcpu->kvm == NULL);
4323 kvm = vcpu->kvm;
4324
4325 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
4326 if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0)
4327 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4328 else
4329 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
4330
4331 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
4332 if (!page) {
4333 r = -ENOMEM;
4334 goto fail;
4335 }
4336 vcpu->arch.pio_data = page_address(page);
4337
4338 r = kvm_mmu_create(vcpu);
4339 if (r < 0)
4340 goto fail_free_pio_data;
4341
4342 if (irqchip_in_kernel(kvm)) {
4343 r = kvm_create_lapic(vcpu);
4344 if (r < 0)
4345 goto fail_mmu_destroy;
4346 }
4347
4348 return 0;
4349
4350 fail_mmu_destroy:
4351 kvm_mmu_destroy(vcpu);
4352 fail_free_pio_data:
4353 free_page((unsigned long)vcpu->arch.pio_data);
4354 fail:
4355 return r;
4356 }
4357
4358 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
4359 {
4360 kvm_free_lapic(vcpu);
4361 down_read(&vcpu->kvm->slots_lock);
4362 kvm_mmu_destroy(vcpu);
4363 up_read(&vcpu->kvm->slots_lock);
4364 free_page((unsigned long)vcpu->arch.pio_data);
4365 }
4366
4367 struct kvm *kvm_arch_create_vm(void)
4368 {
4369 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
4370
4371 if (!kvm)
4372 return ERR_PTR(-ENOMEM);
4373
4374 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
4375 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
4376
4377 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
4378 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
4379
4380 rdtscll(kvm->arch.vm_init_tsc);
4381
4382 return kvm;
4383 }
4384
4385 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
4386 {
4387 vcpu_load(vcpu);
4388 kvm_mmu_unload(vcpu);
4389 vcpu_put(vcpu);
4390 }
4391
4392 static void kvm_free_vcpus(struct kvm *kvm)
4393 {
4394 unsigned int i;
4395
4396 /*
4397 * Unpin any mmu pages first.
4398 */
4399 for (i = 0; i < KVM_MAX_VCPUS; ++i)
4400 if (kvm->vcpus[i])
4401 kvm_unload_vcpu_mmu(kvm->vcpus[i]);
4402 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
4403 if (kvm->vcpus[i]) {
4404 kvm_arch_vcpu_free(kvm->vcpus[i]);
4405 kvm->vcpus[i] = NULL;
4406 }
4407 }
4408
4409 }
4410
4411 void kvm_arch_sync_events(struct kvm *kvm)
4412 {
4413 kvm_free_all_assigned_devices(kvm);
4414 }
4415
4416 void kvm_arch_destroy_vm(struct kvm *kvm)
4417 {
4418 kvm_iommu_unmap_guest(kvm);
4419 kvm_free_pit(kvm);
4420 kfree(kvm->arch.vpic);
4421 kfree(kvm->arch.vioapic);
4422 kvm_free_vcpus(kvm);
4423 kvm_free_physmem(kvm);
4424 if (kvm->arch.apic_access_page)
4425 put_page(kvm->arch.apic_access_page);
4426 if (kvm->arch.ept_identity_pagetable)
4427 put_page(kvm->arch.ept_identity_pagetable);
4428 kfree(kvm);
4429 }
4430
4431 int kvm_arch_set_memory_region(struct kvm *kvm,
4432 struct kvm_userspace_memory_region *mem,
4433 struct kvm_memory_slot old,
4434 int user_alloc)
4435 {
4436 int npages = mem->memory_size >> PAGE_SHIFT;
4437 struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
4438
4439 /*To keep backward compatibility with older userspace,
4440 *x86 needs to hanlde !user_alloc case.
4441 */
4442 if (!user_alloc) {
4443 if (npages && !old.rmap) {
4444 unsigned long userspace_addr;
4445
4446 down_write(&current->mm->mmap_sem);
4447 userspace_addr = do_mmap(NULL, 0,
4448 npages * PAGE_SIZE,
4449 PROT_READ | PROT_WRITE,
4450 MAP_PRIVATE | MAP_ANONYMOUS,
4451 0);
4452 up_write(&current->mm->mmap_sem);
4453
4454 if (IS_ERR((void *)userspace_addr))
4455 return PTR_ERR((void *)userspace_addr);
4456
4457 /* set userspace_addr atomically for kvm_hva_to_rmapp */
4458 spin_lock(&kvm->mmu_lock);
4459 memslot->userspace_addr = userspace_addr;
4460 spin_unlock(&kvm->mmu_lock);
4461 } else {
4462 if (!old.user_alloc && old.rmap) {
4463 int ret;
4464
4465 down_write(&current->mm->mmap_sem);
4466 ret = do_munmap(current->mm, old.userspace_addr,
4467 old.npages * PAGE_SIZE);
4468 up_write(&current->mm->mmap_sem);
4469 if (ret < 0)
4470 printk(KERN_WARNING
4471 "kvm_vm_ioctl_set_memory_region: "
4472 "failed to munmap memory\n");
4473 }
4474 }
4475 }
4476
4477 if (!kvm->arch.n_requested_mmu_pages) {
4478 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
4479 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
4480 }
4481
4482 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
4483 kvm_flush_remote_tlbs(kvm);
4484
4485 return 0;
4486 }
4487
4488 void kvm_arch_flush_shadow(struct kvm *kvm)
4489 {
4490 kvm_mmu_zap_all(kvm);
4491 }
4492
4493 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
4494 {
4495 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
4496 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
4497 || vcpu->arch.nmi_pending;
4498 }
4499
4500 static void vcpu_kick_intr(void *info)
4501 {
4502 #ifdef DEBUG
4503 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)info;
4504 printk(KERN_DEBUG "vcpu_kick_intr %p \n", vcpu);
4505 #endif
4506 }
4507
4508 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
4509 {
4510 int ipi_pcpu = vcpu->cpu;
4511 int cpu = get_cpu();
4512
4513 if (waitqueue_active(&vcpu->wq)) {
4514 wake_up_interruptible(&vcpu->wq);
4515 ++vcpu->stat.halt_wakeup;
4516 }
4517 /*
4518 * We may be called synchronously with irqs disabled in guest mode,
4519 * So need not to call smp_call_function_single() in that case.
4520 */
4521 if (vcpu->guest_mode && vcpu->cpu != cpu)
4522 smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0);
4523 put_cpu();
4524 }
4525
4526 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
4527 {
4528 return kvm_x86_ops->interrupt_allowed(vcpu);
4529 }
Linux kernel - Deliverables
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