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KVM: x86 emulator: Add new mode of instruction emulation: skip
[deliverable/linux.git] / arch / x86 / kvm / x86.c
1 /*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * derived from drivers/kvm/kvm_main.c
5 *
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 *
10 * Authors:
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
15 *
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
18 *
19 */
20
21 #include <linux/kvm_host.h>
22 #include "irq.h"
23 #include "mmu.h"
24 #include "i8254.h"
25 #include "tss.h"
26 #include "kvm_cache_regs.h"
27 #include "x86.h"
28
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
32 #include <linux/fs.h>
33 #include <linux/vmalloc.h>
34 #include <linux/module.h>
35 #include <linux/mman.h>
36 #include <linux/highmem.h>
37 #include <linux/iommu.h>
38 #include <linux/intel-iommu.h>
39 #include <linux/cpufreq.h>
40
41 #include <asm/uaccess.h>
42 #include <asm/msr.h>
43 #include <asm/desc.h>
44 #include <asm/mtrr.h>
45
46 #define MAX_IO_MSRS 256
47 #define CR0_RESERVED_BITS \
48 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
49 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
50 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
51 #define CR4_RESERVED_BITS \
52 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
53 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
54 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
55 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
56
57 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
58 /* EFER defaults:
59 * - enable syscall per default because its emulated by KVM
60 * - enable LME and LMA per default on 64 bit KVM
61 */
62 #ifdef CONFIG_X86_64
63 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
64 #else
65 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
66 #endif
67
68 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
69 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
70
71 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
72 struct kvm_cpuid_entry2 __user *entries);
73 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
74 u32 function, u32 index);
75
76 struct kvm_x86_ops *kvm_x86_ops;
77 EXPORT_SYMBOL_GPL(kvm_x86_ops);
78
79 struct kvm_stats_debugfs_item debugfs_entries[] = {
80 { "pf_fixed", VCPU_STAT(pf_fixed) },
81 { "pf_guest", VCPU_STAT(pf_guest) },
82 { "tlb_flush", VCPU_STAT(tlb_flush) },
83 { "invlpg", VCPU_STAT(invlpg) },
84 { "exits", VCPU_STAT(exits) },
85 { "io_exits", VCPU_STAT(io_exits) },
86 { "mmio_exits", VCPU_STAT(mmio_exits) },
87 { "signal_exits", VCPU_STAT(signal_exits) },
88 { "irq_window", VCPU_STAT(irq_window_exits) },
89 { "nmi_window", VCPU_STAT(nmi_window_exits) },
90 { "halt_exits", VCPU_STAT(halt_exits) },
91 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
92 { "hypercalls", VCPU_STAT(hypercalls) },
93 { "request_irq", VCPU_STAT(request_irq_exits) },
94 { "request_nmi", VCPU_STAT(request_nmi_exits) },
95 { "irq_exits", VCPU_STAT(irq_exits) },
96 { "host_state_reload", VCPU_STAT(host_state_reload) },
97 { "efer_reload", VCPU_STAT(efer_reload) },
98 { "fpu_reload", VCPU_STAT(fpu_reload) },
99 { "insn_emulation", VCPU_STAT(insn_emulation) },
100 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
101 { "irq_injections", VCPU_STAT(irq_injections) },
102 { "nmi_injections", VCPU_STAT(nmi_injections) },
103 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
104 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
105 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
106 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
107 { "mmu_flooded", VM_STAT(mmu_flooded) },
108 { "mmu_recycled", VM_STAT(mmu_recycled) },
109 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
110 { "mmu_unsync", VM_STAT(mmu_unsync) },
111 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
112 { "largepages", VM_STAT(lpages) },
113 { NULL }
114 };
115
116 unsigned long segment_base(u16 selector)
117 {
118 struct descriptor_table gdt;
119 struct desc_struct *d;
120 unsigned long table_base;
121 unsigned long v;
122
123 if (selector == 0)
124 return 0;
125
126 asm("sgdt %0" : "=m"(gdt));
127 table_base = gdt.base;
128
129 if (selector & 4) { /* from ldt */
130 u16 ldt_selector;
131
132 asm("sldt %0" : "=g"(ldt_selector));
133 table_base = segment_base(ldt_selector);
134 }
135 d = (struct desc_struct *)(table_base + (selector & ~7));
136 v = d->base0 | ((unsigned long)d->base1 << 16) |
137 ((unsigned long)d->base2 << 24);
138 #ifdef CONFIG_X86_64
139 if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
140 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
141 #endif
142 return v;
143 }
144 EXPORT_SYMBOL_GPL(segment_base);
145
146 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
147 {
148 if (irqchip_in_kernel(vcpu->kvm))
149 return vcpu->arch.apic_base;
150 else
151 return vcpu->arch.apic_base;
152 }
153 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
154
155 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
156 {
157 /* TODO: reserve bits check */
158 if (irqchip_in_kernel(vcpu->kvm))
159 kvm_lapic_set_base(vcpu, data);
160 else
161 vcpu->arch.apic_base = data;
162 }
163 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
164
165 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
166 {
167 WARN_ON(vcpu->arch.exception.pending);
168 vcpu->arch.exception.pending = true;
169 vcpu->arch.exception.has_error_code = false;
170 vcpu->arch.exception.nr = nr;
171 }
172 EXPORT_SYMBOL_GPL(kvm_queue_exception);
173
174 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
175 u32 error_code)
176 {
177 ++vcpu->stat.pf_guest;
178
179 if (vcpu->arch.exception.pending) {
180 if (vcpu->arch.exception.nr == PF_VECTOR) {
181 printk(KERN_DEBUG "kvm: inject_page_fault:"
182 " double fault 0x%lx\n", addr);
183 vcpu->arch.exception.nr = DF_VECTOR;
184 vcpu->arch.exception.error_code = 0;
185 } else if (vcpu->arch.exception.nr == DF_VECTOR) {
186 /* triple fault -> shutdown */
187 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
188 }
189 return;
190 }
191 vcpu->arch.cr2 = addr;
192 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
193 }
194
195 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
196 {
197 vcpu->arch.nmi_pending = 1;
198 }
199 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
200
201 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
202 {
203 WARN_ON(vcpu->arch.exception.pending);
204 vcpu->arch.exception.pending = true;
205 vcpu->arch.exception.has_error_code = true;
206 vcpu->arch.exception.nr = nr;
207 vcpu->arch.exception.error_code = error_code;
208 }
209 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
210
211 static void __queue_exception(struct kvm_vcpu *vcpu)
212 {
213 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
214 vcpu->arch.exception.has_error_code,
215 vcpu->arch.exception.error_code);
216 }
217
218 /*
219 * Load the pae pdptrs. Return true is they are all valid.
220 */
221 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
222 {
223 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
224 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
225 int i;
226 int ret;
227 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
228
229 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
230 offset * sizeof(u64), sizeof(pdpte));
231 if (ret < 0) {
232 ret = 0;
233 goto out;
234 }
235 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
236 if (is_present_pte(pdpte[i]) &&
237 (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
238 ret = 0;
239 goto out;
240 }
241 }
242 ret = 1;
243
244 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
245 out:
246
247 return ret;
248 }
249 EXPORT_SYMBOL_GPL(load_pdptrs);
250
251 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
252 {
253 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
254 bool changed = true;
255 int r;
256
257 if (is_long_mode(vcpu) || !is_pae(vcpu))
258 return false;
259
260 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
261 if (r < 0)
262 goto out;
263 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
264 out:
265
266 return changed;
267 }
268
269 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
270 {
271 if (cr0 & CR0_RESERVED_BITS) {
272 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
273 cr0, vcpu->arch.cr0);
274 kvm_inject_gp(vcpu, 0);
275 return;
276 }
277
278 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
279 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
280 kvm_inject_gp(vcpu, 0);
281 return;
282 }
283
284 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
285 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
286 "and a clear PE flag\n");
287 kvm_inject_gp(vcpu, 0);
288 return;
289 }
290
291 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
292 #ifdef CONFIG_X86_64
293 if ((vcpu->arch.shadow_efer & EFER_LME)) {
294 int cs_db, cs_l;
295
296 if (!is_pae(vcpu)) {
297 printk(KERN_DEBUG "set_cr0: #GP, start paging "
298 "in long mode while PAE is disabled\n");
299 kvm_inject_gp(vcpu, 0);
300 return;
301 }
302 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
303 if (cs_l) {
304 printk(KERN_DEBUG "set_cr0: #GP, start paging "
305 "in long mode while CS.L == 1\n");
306 kvm_inject_gp(vcpu, 0);
307 return;
308
309 }
310 } else
311 #endif
312 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
313 printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
314 "reserved bits\n");
315 kvm_inject_gp(vcpu, 0);
316 return;
317 }
318
319 }
320
321 kvm_x86_ops->set_cr0(vcpu, cr0);
322 vcpu->arch.cr0 = cr0;
323
324 kvm_mmu_reset_context(vcpu);
325 return;
326 }
327 EXPORT_SYMBOL_GPL(kvm_set_cr0);
328
329 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
330 {
331 kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
332 KVMTRACE_1D(LMSW, vcpu,
333 (u32)((vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f)),
334 handler);
335 }
336 EXPORT_SYMBOL_GPL(kvm_lmsw);
337
338 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
339 {
340 unsigned long old_cr4 = vcpu->arch.cr4;
341 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
342
343 if (cr4 & CR4_RESERVED_BITS) {
344 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
345 kvm_inject_gp(vcpu, 0);
346 return;
347 }
348
349 if (is_long_mode(vcpu)) {
350 if (!(cr4 & X86_CR4_PAE)) {
351 printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
352 "in long mode\n");
353 kvm_inject_gp(vcpu, 0);
354 return;
355 }
356 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
357 && ((cr4 ^ old_cr4) & pdptr_bits)
358 && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
359 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
360 kvm_inject_gp(vcpu, 0);
361 return;
362 }
363
364 if (cr4 & X86_CR4_VMXE) {
365 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
366 kvm_inject_gp(vcpu, 0);
367 return;
368 }
369 kvm_x86_ops->set_cr4(vcpu, cr4);
370 vcpu->arch.cr4 = cr4;
371 vcpu->arch.mmu.base_role.cr4_pge = (cr4 & X86_CR4_PGE) && !tdp_enabled;
372 kvm_mmu_reset_context(vcpu);
373 }
374 EXPORT_SYMBOL_GPL(kvm_set_cr4);
375
376 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
377 {
378 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
379 kvm_mmu_sync_roots(vcpu);
380 kvm_mmu_flush_tlb(vcpu);
381 return;
382 }
383
384 if (is_long_mode(vcpu)) {
385 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
386 printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
387 kvm_inject_gp(vcpu, 0);
388 return;
389 }
390 } else {
391 if (is_pae(vcpu)) {
392 if (cr3 & CR3_PAE_RESERVED_BITS) {
393 printk(KERN_DEBUG
394 "set_cr3: #GP, reserved bits\n");
395 kvm_inject_gp(vcpu, 0);
396 return;
397 }
398 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
399 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
400 "reserved bits\n");
401 kvm_inject_gp(vcpu, 0);
402 return;
403 }
404 }
405 /*
406 * We don't check reserved bits in nonpae mode, because
407 * this isn't enforced, and VMware depends on this.
408 */
409 }
410
411 /*
412 * Does the new cr3 value map to physical memory? (Note, we
413 * catch an invalid cr3 even in real-mode, because it would
414 * cause trouble later on when we turn on paging anyway.)
415 *
416 * A real CPU would silently accept an invalid cr3 and would
417 * attempt to use it - with largely undefined (and often hard
418 * to debug) behavior on the guest side.
419 */
420 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
421 kvm_inject_gp(vcpu, 0);
422 else {
423 vcpu->arch.cr3 = cr3;
424 vcpu->arch.mmu.new_cr3(vcpu);
425 }
426 }
427 EXPORT_SYMBOL_GPL(kvm_set_cr3);
428
429 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
430 {
431 if (cr8 & CR8_RESERVED_BITS) {
432 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
433 kvm_inject_gp(vcpu, 0);
434 return;
435 }
436 if (irqchip_in_kernel(vcpu->kvm))
437 kvm_lapic_set_tpr(vcpu, cr8);
438 else
439 vcpu->arch.cr8 = cr8;
440 }
441 EXPORT_SYMBOL_GPL(kvm_set_cr8);
442
443 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
444 {
445 if (irqchip_in_kernel(vcpu->kvm))
446 return kvm_lapic_get_cr8(vcpu);
447 else
448 return vcpu->arch.cr8;
449 }
450 EXPORT_SYMBOL_GPL(kvm_get_cr8);
451
452 static inline u32 bit(int bitno)
453 {
454 return 1 << (bitno & 31);
455 }
456
457 /*
458 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
459 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
460 *
461 * This list is modified at module load time to reflect the
462 * capabilities of the host cpu.
463 */
464 static u32 msrs_to_save[] = {
465 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
466 MSR_K6_STAR,
467 #ifdef CONFIG_X86_64
468 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
469 #endif
470 MSR_IA32_TIME_STAMP_COUNTER, MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
471 MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
472 };
473
474 static unsigned num_msrs_to_save;
475
476 static u32 emulated_msrs[] = {
477 MSR_IA32_MISC_ENABLE,
478 };
479
480 static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
481 {
482 if (efer & efer_reserved_bits) {
483 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
484 efer);
485 kvm_inject_gp(vcpu, 0);
486 return;
487 }
488
489 if (is_paging(vcpu)
490 && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
491 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
492 kvm_inject_gp(vcpu, 0);
493 return;
494 }
495
496 if (efer & EFER_FFXSR) {
497 struct kvm_cpuid_entry2 *feat;
498
499 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
500 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT))) {
501 printk(KERN_DEBUG "set_efer: #GP, enable FFXSR w/o CPUID capability\n");
502 kvm_inject_gp(vcpu, 0);
503 return;
504 }
505 }
506
507 if (efer & EFER_SVME) {
508 struct kvm_cpuid_entry2 *feat;
509
510 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
511 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM))) {
512 printk(KERN_DEBUG "set_efer: #GP, enable SVM w/o SVM\n");
513 kvm_inject_gp(vcpu, 0);
514 return;
515 }
516 }
517
518 kvm_x86_ops->set_efer(vcpu, efer);
519
520 efer &= ~EFER_LMA;
521 efer |= vcpu->arch.shadow_efer & EFER_LMA;
522
523 vcpu->arch.shadow_efer = efer;
524
525 vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
526 kvm_mmu_reset_context(vcpu);
527 }
528
529 void kvm_enable_efer_bits(u64 mask)
530 {
531 efer_reserved_bits &= ~mask;
532 }
533 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
534
535
536 /*
537 * Writes msr value into into the appropriate "register".
538 * Returns 0 on success, non-0 otherwise.
539 * Assumes vcpu_load() was already called.
540 */
541 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
542 {
543 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
544 }
545
546 /*
547 * Adapt set_msr() to msr_io()'s calling convention
548 */
549 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
550 {
551 return kvm_set_msr(vcpu, index, *data);
552 }
553
554 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
555 {
556 static int version;
557 struct pvclock_wall_clock wc;
558 struct timespec now, sys, boot;
559
560 if (!wall_clock)
561 return;
562
563 version++;
564
565 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
566
567 /*
568 * The guest calculates current wall clock time by adding
569 * system time (updated by kvm_write_guest_time below) to the
570 * wall clock specified here. guest system time equals host
571 * system time for us, thus we must fill in host boot time here.
572 */
573 now = current_kernel_time();
574 ktime_get_ts(&sys);
575 boot = ns_to_timespec(timespec_to_ns(&now) - timespec_to_ns(&sys));
576
577 wc.sec = boot.tv_sec;
578 wc.nsec = boot.tv_nsec;
579 wc.version = version;
580
581 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
582
583 version++;
584 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
585 }
586
587 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
588 {
589 uint32_t quotient, remainder;
590
591 /* Don't try to replace with do_div(), this one calculates
592 * "(dividend << 32) / divisor" */
593 __asm__ ( "divl %4"
594 : "=a" (quotient), "=d" (remainder)
595 : "0" (0), "1" (dividend), "r" (divisor) );
596 return quotient;
597 }
598
599 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
600 {
601 uint64_t nsecs = 1000000000LL;
602 int32_t shift = 0;
603 uint64_t tps64;
604 uint32_t tps32;
605
606 tps64 = tsc_khz * 1000LL;
607 while (tps64 > nsecs*2) {
608 tps64 >>= 1;
609 shift--;
610 }
611
612 tps32 = (uint32_t)tps64;
613 while (tps32 <= (uint32_t)nsecs) {
614 tps32 <<= 1;
615 shift++;
616 }
617
618 hv_clock->tsc_shift = shift;
619 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
620
621 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
622 __func__, tsc_khz, hv_clock->tsc_shift,
623 hv_clock->tsc_to_system_mul);
624 }
625
626 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
627
628 static void kvm_write_guest_time(struct kvm_vcpu *v)
629 {
630 struct timespec ts;
631 unsigned long flags;
632 struct kvm_vcpu_arch *vcpu = &v->arch;
633 void *shared_kaddr;
634
635 if ((!vcpu->time_page))
636 return;
637
638 preempt_disable();
639 if (unlikely(vcpu->hv_clock_tsc_khz != __get_cpu_var(cpu_tsc_khz))) {
640 kvm_set_time_scale(__get_cpu_var(cpu_tsc_khz), &vcpu->hv_clock);
641 vcpu->hv_clock_tsc_khz = __get_cpu_var(cpu_tsc_khz);
642 }
643 preempt_enable();
644
645 /* Keep irq disabled to prevent changes to the clock */
646 local_irq_save(flags);
647 kvm_get_msr(v, MSR_IA32_TIME_STAMP_COUNTER,
648 &vcpu->hv_clock.tsc_timestamp);
649 ktime_get_ts(&ts);
650 local_irq_restore(flags);
651
652 /* With all the info we got, fill in the values */
653
654 vcpu->hv_clock.system_time = ts.tv_nsec +
655 (NSEC_PER_SEC * (u64)ts.tv_sec);
656 /*
657 * The interface expects us to write an even number signaling that the
658 * update is finished. Since the guest won't see the intermediate
659 * state, we just increase by 2 at the end.
660 */
661 vcpu->hv_clock.version += 2;
662
663 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
664
665 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
666 sizeof(vcpu->hv_clock));
667
668 kunmap_atomic(shared_kaddr, KM_USER0);
669
670 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
671 }
672
673 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
674 {
675 struct kvm_vcpu_arch *vcpu = &v->arch;
676
677 if (!vcpu->time_page)
678 return 0;
679 set_bit(KVM_REQ_KVMCLOCK_UPDATE, &v->requests);
680 return 1;
681 }
682
683 static bool msr_mtrr_valid(unsigned msr)
684 {
685 switch (msr) {
686 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
687 case MSR_MTRRfix64K_00000:
688 case MSR_MTRRfix16K_80000:
689 case MSR_MTRRfix16K_A0000:
690 case MSR_MTRRfix4K_C0000:
691 case MSR_MTRRfix4K_C8000:
692 case MSR_MTRRfix4K_D0000:
693 case MSR_MTRRfix4K_D8000:
694 case MSR_MTRRfix4K_E0000:
695 case MSR_MTRRfix4K_E8000:
696 case MSR_MTRRfix4K_F0000:
697 case MSR_MTRRfix4K_F8000:
698 case MSR_MTRRdefType:
699 case MSR_IA32_CR_PAT:
700 return true;
701 case 0x2f8:
702 return true;
703 }
704 return false;
705 }
706
707 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
708 {
709 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
710
711 if (!msr_mtrr_valid(msr))
712 return 1;
713
714 if (msr == MSR_MTRRdefType) {
715 vcpu->arch.mtrr_state.def_type = data;
716 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
717 } else if (msr == MSR_MTRRfix64K_00000)
718 p[0] = data;
719 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
720 p[1 + msr - MSR_MTRRfix16K_80000] = data;
721 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
722 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
723 else if (msr == MSR_IA32_CR_PAT)
724 vcpu->arch.pat = data;
725 else { /* Variable MTRRs */
726 int idx, is_mtrr_mask;
727 u64 *pt;
728
729 idx = (msr - 0x200) / 2;
730 is_mtrr_mask = msr - 0x200 - 2 * idx;
731 if (!is_mtrr_mask)
732 pt =
733 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
734 else
735 pt =
736 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
737 *pt = data;
738 }
739
740 kvm_mmu_reset_context(vcpu);
741 return 0;
742 }
743
744 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
745 {
746 switch (msr) {
747 case MSR_EFER:
748 set_efer(vcpu, data);
749 break;
750 case MSR_IA32_MC0_STATUS:
751 pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
752 __func__, data);
753 break;
754 case MSR_IA32_MCG_STATUS:
755 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
756 __func__, data);
757 break;
758 case MSR_IA32_MCG_CTL:
759 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_CTL 0x%llx, nop\n",
760 __func__, data);
761 break;
762 case MSR_IA32_DEBUGCTLMSR:
763 if (!data) {
764 /* We support the non-activated case already */
765 break;
766 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
767 /* Values other than LBR and BTF are vendor-specific,
768 thus reserved and should throw a #GP */
769 return 1;
770 }
771 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
772 __func__, data);
773 break;
774 case MSR_IA32_UCODE_REV:
775 case MSR_IA32_UCODE_WRITE:
776 case MSR_VM_HSAVE_PA:
777 break;
778 case 0x200 ... 0x2ff:
779 return set_msr_mtrr(vcpu, msr, data);
780 case MSR_IA32_APICBASE:
781 kvm_set_apic_base(vcpu, data);
782 break;
783 case MSR_IA32_MISC_ENABLE:
784 vcpu->arch.ia32_misc_enable_msr = data;
785 break;
786 case MSR_KVM_WALL_CLOCK:
787 vcpu->kvm->arch.wall_clock = data;
788 kvm_write_wall_clock(vcpu->kvm, data);
789 break;
790 case MSR_KVM_SYSTEM_TIME: {
791 if (vcpu->arch.time_page) {
792 kvm_release_page_dirty(vcpu->arch.time_page);
793 vcpu->arch.time_page = NULL;
794 }
795
796 vcpu->arch.time = data;
797
798 /* we verify if the enable bit is set... */
799 if (!(data & 1))
800 break;
801
802 /* ...but clean it before doing the actual write */
803 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
804
805 vcpu->arch.time_page =
806 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
807
808 if (is_error_page(vcpu->arch.time_page)) {
809 kvm_release_page_clean(vcpu->arch.time_page);
810 vcpu->arch.time_page = NULL;
811 }
812
813 kvm_request_guest_time_update(vcpu);
814 break;
815 }
816 default:
817 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n", msr, data);
818 return 1;
819 }
820 return 0;
821 }
822 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
823
824
825 /*
826 * Reads an msr value (of 'msr_index') into 'pdata'.
827 * Returns 0 on success, non-0 otherwise.
828 * Assumes vcpu_load() was already called.
829 */
830 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
831 {
832 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
833 }
834
835 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
836 {
837 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
838
839 if (!msr_mtrr_valid(msr))
840 return 1;
841
842 if (msr == MSR_MTRRdefType)
843 *pdata = vcpu->arch.mtrr_state.def_type +
844 (vcpu->arch.mtrr_state.enabled << 10);
845 else if (msr == MSR_MTRRfix64K_00000)
846 *pdata = p[0];
847 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
848 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
849 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
850 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
851 else if (msr == MSR_IA32_CR_PAT)
852 *pdata = vcpu->arch.pat;
853 else { /* Variable MTRRs */
854 int idx, is_mtrr_mask;
855 u64 *pt;
856
857 idx = (msr - 0x200) / 2;
858 is_mtrr_mask = msr - 0x200 - 2 * idx;
859 if (!is_mtrr_mask)
860 pt =
861 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
862 else
863 pt =
864 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
865 *pdata = *pt;
866 }
867
868 return 0;
869 }
870
871 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
872 {
873 u64 data;
874
875 switch (msr) {
876 case 0xc0010010: /* SYSCFG */
877 case 0xc0010015: /* HWCR */
878 case MSR_IA32_PLATFORM_ID:
879 case MSR_IA32_P5_MC_ADDR:
880 case MSR_IA32_P5_MC_TYPE:
881 case MSR_IA32_MC0_CTL:
882 case MSR_IA32_MCG_STATUS:
883 case MSR_IA32_MCG_CAP:
884 case MSR_IA32_MCG_CTL:
885 case MSR_IA32_MC0_MISC:
886 case MSR_IA32_MC0_MISC+4:
887 case MSR_IA32_MC0_MISC+8:
888 case MSR_IA32_MC0_MISC+12:
889 case MSR_IA32_MC0_MISC+16:
890 case MSR_IA32_MC0_MISC+20:
891 case MSR_IA32_UCODE_REV:
892 case MSR_IA32_EBL_CR_POWERON:
893 case MSR_IA32_DEBUGCTLMSR:
894 case MSR_IA32_LASTBRANCHFROMIP:
895 case MSR_IA32_LASTBRANCHTOIP:
896 case MSR_IA32_LASTINTFROMIP:
897 case MSR_IA32_LASTINTTOIP:
898 case MSR_VM_HSAVE_PA:
899 case MSR_P6_EVNTSEL0:
900 case MSR_P6_EVNTSEL1:
901 data = 0;
902 break;
903 case MSR_MTRRcap:
904 data = 0x500 | KVM_NR_VAR_MTRR;
905 break;
906 case 0x200 ... 0x2ff:
907 return get_msr_mtrr(vcpu, msr, pdata);
908 case 0xcd: /* fsb frequency */
909 data = 3;
910 break;
911 case MSR_IA32_APICBASE:
912 data = kvm_get_apic_base(vcpu);
913 break;
914 case MSR_IA32_MISC_ENABLE:
915 data = vcpu->arch.ia32_misc_enable_msr;
916 break;
917 case MSR_IA32_PERF_STATUS:
918 /* TSC increment by tick */
919 data = 1000ULL;
920 /* CPU multiplier */
921 data |= (((uint64_t)4ULL) << 40);
922 break;
923 case MSR_EFER:
924 data = vcpu->arch.shadow_efer;
925 break;
926 case MSR_KVM_WALL_CLOCK:
927 data = vcpu->kvm->arch.wall_clock;
928 break;
929 case MSR_KVM_SYSTEM_TIME:
930 data = vcpu->arch.time;
931 break;
932 default:
933 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
934 return 1;
935 }
936 *pdata = data;
937 return 0;
938 }
939 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
940
941 /*
942 * Read or write a bunch of msrs. All parameters are kernel addresses.
943 *
944 * @return number of msrs set successfully.
945 */
946 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
947 struct kvm_msr_entry *entries,
948 int (*do_msr)(struct kvm_vcpu *vcpu,
949 unsigned index, u64 *data))
950 {
951 int i;
952
953 vcpu_load(vcpu);
954
955 down_read(&vcpu->kvm->slots_lock);
956 for (i = 0; i < msrs->nmsrs; ++i)
957 if (do_msr(vcpu, entries[i].index, &entries[i].data))
958 break;
959 up_read(&vcpu->kvm->slots_lock);
960
961 vcpu_put(vcpu);
962
963 return i;
964 }
965
966 /*
967 * Read or write a bunch of msrs. Parameters are user addresses.
968 *
969 * @return number of msrs set successfully.
970 */
971 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
972 int (*do_msr)(struct kvm_vcpu *vcpu,
973 unsigned index, u64 *data),
974 int writeback)
975 {
976 struct kvm_msrs msrs;
977 struct kvm_msr_entry *entries;
978 int r, n;
979 unsigned size;
980
981 r = -EFAULT;
982 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
983 goto out;
984
985 r = -E2BIG;
986 if (msrs.nmsrs >= MAX_IO_MSRS)
987 goto out;
988
989 r = -ENOMEM;
990 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
991 entries = vmalloc(size);
992 if (!entries)
993 goto out;
994
995 r = -EFAULT;
996 if (copy_from_user(entries, user_msrs->entries, size))
997 goto out_free;
998
999 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1000 if (r < 0)
1001 goto out_free;
1002
1003 r = -EFAULT;
1004 if (writeback && copy_to_user(user_msrs->entries, entries, size))
1005 goto out_free;
1006
1007 r = n;
1008
1009 out_free:
1010 vfree(entries);
1011 out:
1012 return r;
1013 }
1014
1015 int kvm_dev_ioctl_check_extension(long ext)
1016 {
1017 int r;
1018
1019 switch (ext) {
1020 case KVM_CAP_IRQCHIP:
1021 case KVM_CAP_HLT:
1022 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1023 case KVM_CAP_SET_TSS_ADDR:
1024 case KVM_CAP_EXT_CPUID:
1025 case KVM_CAP_CLOCKSOURCE:
1026 case KVM_CAP_PIT:
1027 case KVM_CAP_NOP_IO_DELAY:
1028 case KVM_CAP_MP_STATE:
1029 case KVM_CAP_SYNC_MMU:
1030 case KVM_CAP_REINJECT_CONTROL:
1031 case KVM_CAP_IRQ_INJECT_STATUS:
1032 case KVM_CAP_ASSIGN_DEV_IRQ:
1033 r = 1;
1034 break;
1035 case KVM_CAP_COALESCED_MMIO:
1036 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1037 break;
1038 case KVM_CAP_VAPIC:
1039 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1040 break;
1041 case KVM_CAP_NR_VCPUS:
1042 r = KVM_MAX_VCPUS;
1043 break;
1044 case KVM_CAP_NR_MEMSLOTS:
1045 r = KVM_MEMORY_SLOTS;
1046 break;
1047 case KVM_CAP_PV_MMU:
1048 r = !tdp_enabled;
1049 break;
1050 case KVM_CAP_IOMMU:
1051 r = iommu_found();
1052 break;
1053 default:
1054 r = 0;
1055 break;
1056 }
1057 return r;
1058
1059 }
1060
1061 long kvm_arch_dev_ioctl(struct file *filp,
1062 unsigned int ioctl, unsigned long arg)
1063 {
1064 void __user *argp = (void __user *)arg;
1065 long r;
1066
1067 switch (ioctl) {
1068 case KVM_GET_MSR_INDEX_LIST: {
1069 struct kvm_msr_list __user *user_msr_list = argp;
1070 struct kvm_msr_list msr_list;
1071 unsigned n;
1072
1073 r = -EFAULT;
1074 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1075 goto out;
1076 n = msr_list.nmsrs;
1077 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1078 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1079 goto out;
1080 r = -E2BIG;
1081 if (n < num_msrs_to_save)
1082 goto out;
1083 r = -EFAULT;
1084 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1085 num_msrs_to_save * sizeof(u32)))
1086 goto out;
1087 if (copy_to_user(user_msr_list->indices
1088 + num_msrs_to_save * sizeof(u32),
1089 &emulated_msrs,
1090 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1091 goto out;
1092 r = 0;
1093 break;
1094 }
1095 case KVM_GET_SUPPORTED_CPUID: {
1096 struct kvm_cpuid2 __user *cpuid_arg = argp;
1097 struct kvm_cpuid2 cpuid;
1098
1099 r = -EFAULT;
1100 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1101 goto out;
1102 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1103 cpuid_arg->entries);
1104 if (r)
1105 goto out;
1106
1107 r = -EFAULT;
1108 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1109 goto out;
1110 r = 0;
1111 break;
1112 }
1113 default:
1114 r = -EINVAL;
1115 }
1116 out:
1117 return r;
1118 }
1119
1120 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1121 {
1122 kvm_x86_ops->vcpu_load(vcpu, cpu);
1123 kvm_request_guest_time_update(vcpu);
1124 }
1125
1126 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1127 {
1128 kvm_x86_ops->vcpu_put(vcpu);
1129 kvm_put_guest_fpu(vcpu);
1130 }
1131
1132 static int is_efer_nx(void)
1133 {
1134 unsigned long long efer = 0;
1135
1136 rdmsrl_safe(MSR_EFER, &efer);
1137 return efer & EFER_NX;
1138 }
1139
1140 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1141 {
1142 int i;
1143 struct kvm_cpuid_entry2 *e, *entry;
1144
1145 entry = NULL;
1146 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1147 e = &vcpu->arch.cpuid_entries[i];
1148 if (e->function == 0x80000001) {
1149 entry = e;
1150 break;
1151 }
1152 }
1153 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1154 entry->edx &= ~(1 << 20);
1155 printk(KERN_INFO "kvm: guest NX capability removed\n");
1156 }
1157 }
1158
1159 /* when an old userspace process fills a new kernel module */
1160 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1161 struct kvm_cpuid *cpuid,
1162 struct kvm_cpuid_entry __user *entries)
1163 {
1164 int r, i;
1165 struct kvm_cpuid_entry *cpuid_entries;
1166
1167 r = -E2BIG;
1168 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1169 goto out;
1170 r = -ENOMEM;
1171 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1172 if (!cpuid_entries)
1173 goto out;
1174 r = -EFAULT;
1175 if (copy_from_user(cpuid_entries, entries,
1176 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1177 goto out_free;
1178 for (i = 0; i < cpuid->nent; i++) {
1179 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1180 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1181 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1182 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1183 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1184 vcpu->arch.cpuid_entries[i].index = 0;
1185 vcpu->arch.cpuid_entries[i].flags = 0;
1186 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1187 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1188 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1189 }
1190 vcpu->arch.cpuid_nent = cpuid->nent;
1191 cpuid_fix_nx_cap(vcpu);
1192 r = 0;
1193
1194 out_free:
1195 vfree(cpuid_entries);
1196 out:
1197 return r;
1198 }
1199
1200 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1201 struct kvm_cpuid2 *cpuid,
1202 struct kvm_cpuid_entry2 __user *entries)
1203 {
1204 int r;
1205
1206 r = -E2BIG;
1207 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1208 goto out;
1209 r = -EFAULT;
1210 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1211 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1212 goto out;
1213 vcpu->arch.cpuid_nent = cpuid->nent;
1214 return 0;
1215
1216 out:
1217 return r;
1218 }
1219
1220 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1221 struct kvm_cpuid2 *cpuid,
1222 struct kvm_cpuid_entry2 __user *entries)
1223 {
1224 int r;
1225
1226 r = -E2BIG;
1227 if (cpuid->nent < vcpu->arch.cpuid_nent)
1228 goto out;
1229 r = -EFAULT;
1230 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1231 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1232 goto out;
1233 return 0;
1234
1235 out:
1236 cpuid->nent = vcpu->arch.cpuid_nent;
1237 return r;
1238 }
1239
1240 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1241 u32 index)
1242 {
1243 entry->function = function;
1244 entry->index = index;
1245 cpuid_count(entry->function, entry->index,
1246 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1247 entry->flags = 0;
1248 }
1249
1250 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1251 u32 index, int *nent, int maxnent)
1252 {
1253 const u32 kvm_supported_word0_x86_features = bit(X86_FEATURE_FPU) |
1254 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
1255 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
1256 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
1257 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
1258 bit(X86_FEATURE_SEP) | bit(X86_FEATURE_PGE) |
1259 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
1260 bit(X86_FEATURE_CLFLSH) | bit(X86_FEATURE_MMX) |
1261 bit(X86_FEATURE_FXSR) | bit(X86_FEATURE_XMM) |
1262 bit(X86_FEATURE_XMM2) | bit(X86_FEATURE_SELFSNOOP);
1263 const u32 kvm_supported_word1_x86_features = bit(X86_FEATURE_FPU) |
1264 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
1265 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
1266 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
1267 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
1268 bit(X86_FEATURE_PGE) |
1269 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
1270 bit(X86_FEATURE_MMX) | bit(X86_FEATURE_FXSR) |
1271 bit(X86_FEATURE_SYSCALL) |
1272 (is_efer_nx() ? bit(X86_FEATURE_NX) : 0) |
1273 #ifdef CONFIG_X86_64
1274 bit(X86_FEATURE_LM) |
1275 #endif
1276 bit(X86_FEATURE_FXSR_OPT) |
1277 bit(X86_FEATURE_MMXEXT) |
1278 bit(X86_FEATURE_3DNOWEXT) |
1279 bit(X86_FEATURE_3DNOW);
1280 const u32 kvm_supported_word3_x86_features =
1281 bit(X86_FEATURE_XMM3) | bit(X86_FEATURE_CX16);
1282 const u32 kvm_supported_word6_x86_features =
1283 bit(X86_FEATURE_LAHF_LM) | bit(X86_FEATURE_CMP_LEGACY) |
1284 bit(X86_FEATURE_SVM);
1285
1286 /* all calls to cpuid_count() should be made on the same cpu */
1287 get_cpu();
1288 do_cpuid_1_ent(entry, function, index);
1289 ++*nent;
1290
1291 switch (function) {
1292 case 0:
1293 entry->eax = min(entry->eax, (u32)0xb);
1294 break;
1295 case 1:
1296 entry->edx &= kvm_supported_word0_x86_features;
1297 entry->ecx &= kvm_supported_word3_x86_features;
1298 break;
1299 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1300 * may return different values. This forces us to get_cpu() before
1301 * issuing the first command, and also to emulate this annoying behavior
1302 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1303 case 2: {
1304 int t, times = entry->eax & 0xff;
1305
1306 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1307 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
1308 for (t = 1; t < times && *nent < maxnent; ++t) {
1309 do_cpuid_1_ent(&entry[t], function, 0);
1310 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1311 ++*nent;
1312 }
1313 break;
1314 }
1315 /* function 4 and 0xb have additional index. */
1316 case 4: {
1317 int i, cache_type;
1318
1319 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1320 /* read more entries until cache_type is zero */
1321 for (i = 1; *nent < maxnent; ++i) {
1322 cache_type = entry[i - 1].eax & 0x1f;
1323 if (!cache_type)
1324 break;
1325 do_cpuid_1_ent(&entry[i], function, i);
1326 entry[i].flags |=
1327 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1328 ++*nent;
1329 }
1330 break;
1331 }
1332 case 0xb: {
1333 int i, level_type;
1334
1335 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1336 /* read more entries until level_type is zero */
1337 for (i = 1; *nent < maxnent; ++i) {
1338 level_type = entry[i - 1].ecx & 0xff00;
1339 if (!level_type)
1340 break;
1341 do_cpuid_1_ent(&entry[i], function, i);
1342 entry[i].flags |=
1343 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1344 ++*nent;
1345 }
1346 break;
1347 }
1348 case 0x80000000:
1349 entry->eax = min(entry->eax, 0x8000001a);
1350 break;
1351 case 0x80000001:
1352 entry->edx &= kvm_supported_word1_x86_features;
1353 entry->ecx &= kvm_supported_word6_x86_features;
1354 break;
1355 }
1356 put_cpu();
1357 }
1358
1359 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
1360 struct kvm_cpuid_entry2 __user *entries)
1361 {
1362 struct kvm_cpuid_entry2 *cpuid_entries;
1363 int limit, nent = 0, r = -E2BIG;
1364 u32 func;
1365
1366 if (cpuid->nent < 1)
1367 goto out;
1368 r = -ENOMEM;
1369 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1370 if (!cpuid_entries)
1371 goto out;
1372
1373 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1374 limit = cpuid_entries[0].eax;
1375 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1376 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1377 &nent, cpuid->nent);
1378 r = -E2BIG;
1379 if (nent >= cpuid->nent)
1380 goto out_free;
1381
1382 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1383 limit = cpuid_entries[nent - 1].eax;
1384 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1385 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1386 &nent, cpuid->nent);
1387 r = -EFAULT;
1388 if (copy_to_user(entries, cpuid_entries,
1389 nent * sizeof(struct kvm_cpuid_entry2)))
1390 goto out_free;
1391 cpuid->nent = nent;
1392 r = 0;
1393
1394 out_free:
1395 vfree(cpuid_entries);
1396 out:
1397 return r;
1398 }
1399
1400 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1401 struct kvm_lapic_state *s)
1402 {
1403 vcpu_load(vcpu);
1404 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
1405 vcpu_put(vcpu);
1406
1407 return 0;
1408 }
1409
1410 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1411 struct kvm_lapic_state *s)
1412 {
1413 vcpu_load(vcpu);
1414 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
1415 kvm_apic_post_state_restore(vcpu);
1416 vcpu_put(vcpu);
1417
1418 return 0;
1419 }
1420
1421 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1422 struct kvm_interrupt *irq)
1423 {
1424 if (irq->irq < 0 || irq->irq >= 256)
1425 return -EINVAL;
1426 if (irqchip_in_kernel(vcpu->kvm))
1427 return -ENXIO;
1428 vcpu_load(vcpu);
1429
1430 set_bit(irq->irq, vcpu->arch.irq_pending);
1431 set_bit(irq->irq / BITS_PER_LONG, &vcpu->arch.irq_summary);
1432
1433 vcpu_put(vcpu);
1434
1435 return 0;
1436 }
1437
1438 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
1439 {
1440 vcpu_load(vcpu);
1441 kvm_inject_nmi(vcpu);
1442 vcpu_put(vcpu);
1443
1444 return 0;
1445 }
1446
1447 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1448 struct kvm_tpr_access_ctl *tac)
1449 {
1450 if (tac->flags)
1451 return -EINVAL;
1452 vcpu->arch.tpr_access_reporting = !!tac->enabled;
1453 return 0;
1454 }
1455
1456 long kvm_arch_vcpu_ioctl(struct file *filp,
1457 unsigned int ioctl, unsigned long arg)
1458 {
1459 struct kvm_vcpu *vcpu = filp->private_data;
1460 void __user *argp = (void __user *)arg;
1461 int r;
1462 struct kvm_lapic_state *lapic = NULL;
1463
1464 switch (ioctl) {
1465 case KVM_GET_LAPIC: {
1466 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1467
1468 r = -ENOMEM;
1469 if (!lapic)
1470 goto out;
1471 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
1472 if (r)
1473 goto out;
1474 r = -EFAULT;
1475 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
1476 goto out;
1477 r = 0;
1478 break;
1479 }
1480 case KVM_SET_LAPIC: {
1481 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1482 r = -ENOMEM;
1483 if (!lapic)
1484 goto out;
1485 r = -EFAULT;
1486 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
1487 goto out;
1488 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
1489 if (r)
1490 goto out;
1491 r = 0;
1492 break;
1493 }
1494 case KVM_INTERRUPT: {
1495 struct kvm_interrupt irq;
1496
1497 r = -EFAULT;
1498 if (copy_from_user(&irq, argp, sizeof irq))
1499 goto out;
1500 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
1501 if (r)
1502 goto out;
1503 r = 0;
1504 break;
1505 }
1506 case KVM_NMI: {
1507 r = kvm_vcpu_ioctl_nmi(vcpu);
1508 if (r)
1509 goto out;
1510 r = 0;
1511 break;
1512 }
1513 case KVM_SET_CPUID: {
1514 struct kvm_cpuid __user *cpuid_arg = argp;
1515 struct kvm_cpuid cpuid;
1516
1517 r = -EFAULT;
1518 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1519 goto out;
1520 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
1521 if (r)
1522 goto out;
1523 break;
1524 }
1525 case KVM_SET_CPUID2: {
1526 struct kvm_cpuid2 __user *cpuid_arg = argp;
1527 struct kvm_cpuid2 cpuid;
1528
1529 r = -EFAULT;
1530 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1531 goto out;
1532 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
1533 cpuid_arg->entries);
1534 if (r)
1535 goto out;
1536 break;
1537 }
1538 case KVM_GET_CPUID2: {
1539 struct kvm_cpuid2 __user *cpuid_arg = argp;
1540 struct kvm_cpuid2 cpuid;
1541
1542 r = -EFAULT;
1543 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1544 goto out;
1545 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
1546 cpuid_arg->entries);
1547 if (r)
1548 goto out;
1549 r = -EFAULT;
1550 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1551 goto out;
1552 r = 0;
1553 break;
1554 }
1555 case KVM_GET_MSRS:
1556 r = msr_io(vcpu, argp, kvm_get_msr, 1);
1557 break;
1558 case KVM_SET_MSRS:
1559 r = msr_io(vcpu, argp, do_set_msr, 0);
1560 break;
1561 case KVM_TPR_ACCESS_REPORTING: {
1562 struct kvm_tpr_access_ctl tac;
1563
1564 r = -EFAULT;
1565 if (copy_from_user(&tac, argp, sizeof tac))
1566 goto out;
1567 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
1568 if (r)
1569 goto out;
1570 r = -EFAULT;
1571 if (copy_to_user(argp, &tac, sizeof tac))
1572 goto out;
1573 r = 0;
1574 break;
1575 };
1576 case KVM_SET_VAPIC_ADDR: {
1577 struct kvm_vapic_addr va;
1578
1579 r = -EINVAL;
1580 if (!irqchip_in_kernel(vcpu->kvm))
1581 goto out;
1582 r = -EFAULT;
1583 if (copy_from_user(&va, argp, sizeof va))
1584 goto out;
1585 r = 0;
1586 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
1587 break;
1588 }
1589 default:
1590 r = -EINVAL;
1591 }
1592 out:
1593 kfree(lapic);
1594 return r;
1595 }
1596
1597 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
1598 {
1599 int ret;
1600
1601 if (addr > (unsigned int)(-3 * PAGE_SIZE))
1602 return -1;
1603 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
1604 return ret;
1605 }
1606
1607 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
1608 u32 kvm_nr_mmu_pages)
1609 {
1610 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
1611 return -EINVAL;
1612
1613 down_write(&kvm->slots_lock);
1614
1615 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
1616 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
1617
1618 up_write(&kvm->slots_lock);
1619 return 0;
1620 }
1621
1622 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
1623 {
1624 return kvm->arch.n_alloc_mmu_pages;
1625 }
1626
1627 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
1628 {
1629 int i;
1630 struct kvm_mem_alias *alias;
1631
1632 for (i = 0; i < kvm->arch.naliases; ++i) {
1633 alias = &kvm->arch.aliases[i];
1634 if (gfn >= alias->base_gfn
1635 && gfn < alias->base_gfn + alias->npages)
1636 return alias->target_gfn + gfn - alias->base_gfn;
1637 }
1638 return gfn;
1639 }
1640
1641 /*
1642 * Set a new alias region. Aliases map a portion of physical memory into
1643 * another portion. This is useful for memory windows, for example the PC
1644 * VGA region.
1645 */
1646 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
1647 struct kvm_memory_alias *alias)
1648 {
1649 int r, n;
1650 struct kvm_mem_alias *p;
1651
1652 r = -EINVAL;
1653 /* General sanity checks */
1654 if (alias->memory_size & (PAGE_SIZE - 1))
1655 goto out;
1656 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
1657 goto out;
1658 if (alias->slot >= KVM_ALIAS_SLOTS)
1659 goto out;
1660 if (alias->guest_phys_addr + alias->memory_size
1661 < alias->guest_phys_addr)
1662 goto out;
1663 if (alias->target_phys_addr + alias->memory_size
1664 < alias->target_phys_addr)
1665 goto out;
1666
1667 down_write(&kvm->slots_lock);
1668 spin_lock(&kvm->mmu_lock);
1669
1670 p = &kvm->arch.aliases[alias->slot];
1671 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
1672 p->npages = alias->memory_size >> PAGE_SHIFT;
1673 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
1674
1675 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
1676 if (kvm->arch.aliases[n - 1].npages)
1677 break;
1678 kvm->arch.naliases = n;
1679
1680 spin_unlock(&kvm->mmu_lock);
1681 kvm_mmu_zap_all(kvm);
1682
1683 up_write(&kvm->slots_lock);
1684
1685 return 0;
1686
1687 out:
1688 return r;
1689 }
1690
1691 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1692 {
1693 int r;
1694
1695 r = 0;
1696 switch (chip->chip_id) {
1697 case KVM_IRQCHIP_PIC_MASTER:
1698 memcpy(&chip->chip.pic,
1699 &pic_irqchip(kvm)->pics[0],
1700 sizeof(struct kvm_pic_state));
1701 break;
1702 case KVM_IRQCHIP_PIC_SLAVE:
1703 memcpy(&chip->chip.pic,
1704 &pic_irqchip(kvm)->pics[1],
1705 sizeof(struct kvm_pic_state));
1706 break;
1707 case KVM_IRQCHIP_IOAPIC:
1708 memcpy(&chip->chip.ioapic,
1709 ioapic_irqchip(kvm),
1710 sizeof(struct kvm_ioapic_state));
1711 break;
1712 default:
1713 r = -EINVAL;
1714 break;
1715 }
1716 return r;
1717 }
1718
1719 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1720 {
1721 int r;
1722
1723 r = 0;
1724 switch (chip->chip_id) {
1725 case KVM_IRQCHIP_PIC_MASTER:
1726 memcpy(&pic_irqchip(kvm)->pics[0],
1727 &chip->chip.pic,
1728 sizeof(struct kvm_pic_state));
1729 break;
1730 case KVM_IRQCHIP_PIC_SLAVE:
1731 memcpy(&pic_irqchip(kvm)->pics[1],
1732 &chip->chip.pic,
1733 sizeof(struct kvm_pic_state));
1734 break;
1735 case KVM_IRQCHIP_IOAPIC:
1736 memcpy(ioapic_irqchip(kvm),
1737 &chip->chip.ioapic,
1738 sizeof(struct kvm_ioapic_state));
1739 break;
1740 default:
1741 r = -EINVAL;
1742 break;
1743 }
1744 kvm_pic_update_irq(pic_irqchip(kvm));
1745 return r;
1746 }
1747
1748 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1749 {
1750 int r = 0;
1751
1752 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
1753 return r;
1754 }
1755
1756 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1757 {
1758 int r = 0;
1759
1760 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
1761 kvm_pit_load_count(kvm, 0, ps->channels[0].count);
1762 return r;
1763 }
1764
1765 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
1766 struct kvm_reinject_control *control)
1767 {
1768 if (!kvm->arch.vpit)
1769 return -ENXIO;
1770 kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
1771 return 0;
1772 }
1773
1774 /*
1775 * Get (and clear) the dirty memory log for a memory slot.
1776 */
1777 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
1778 struct kvm_dirty_log *log)
1779 {
1780 int r;
1781 int n;
1782 struct kvm_memory_slot *memslot;
1783 int is_dirty = 0;
1784
1785 down_write(&kvm->slots_lock);
1786
1787 r = kvm_get_dirty_log(kvm, log, &is_dirty);
1788 if (r)
1789 goto out;
1790
1791 /* If nothing is dirty, don't bother messing with page tables. */
1792 if (is_dirty) {
1793 kvm_mmu_slot_remove_write_access(kvm, log->slot);
1794 kvm_flush_remote_tlbs(kvm);
1795 memslot = &kvm->memslots[log->slot];
1796 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
1797 memset(memslot->dirty_bitmap, 0, n);
1798 }
1799 r = 0;
1800 out:
1801 up_write(&kvm->slots_lock);
1802 return r;
1803 }
1804
1805 long kvm_arch_vm_ioctl(struct file *filp,
1806 unsigned int ioctl, unsigned long arg)
1807 {
1808 struct kvm *kvm = filp->private_data;
1809 void __user *argp = (void __user *)arg;
1810 int r = -EINVAL;
1811 /*
1812 * This union makes it completely explicit to gcc-3.x
1813 * that these two variables' stack usage should be
1814 * combined, not added together.
1815 */
1816 union {
1817 struct kvm_pit_state ps;
1818 struct kvm_memory_alias alias;
1819 } u;
1820
1821 switch (ioctl) {
1822 case KVM_SET_TSS_ADDR:
1823 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
1824 if (r < 0)
1825 goto out;
1826 break;
1827 case KVM_SET_MEMORY_REGION: {
1828 struct kvm_memory_region kvm_mem;
1829 struct kvm_userspace_memory_region kvm_userspace_mem;
1830
1831 r = -EFAULT;
1832 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
1833 goto out;
1834 kvm_userspace_mem.slot = kvm_mem.slot;
1835 kvm_userspace_mem.flags = kvm_mem.flags;
1836 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
1837 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
1838 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
1839 if (r)
1840 goto out;
1841 break;
1842 }
1843 case KVM_SET_NR_MMU_PAGES:
1844 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
1845 if (r)
1846 goto out;
1847 break;
1848 case KVM_GET_NR_MMU_PAGES:
1849 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
1850 break;
1851 case KVM_SET_MEMORY_ALIAS:
1852 r = -EFAULT;
1853 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
1854 goto out;
1855 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
1856 if (r)
1857 goto out;
1858 break;
1859 case KVM_CREATE_IRQCHIP:
1860 r = -ENOMEM;
1861 kvm->arch.vpic = kvm_create_pic(kvm);
1862 if (kvm->arch.vpic) {
1863 r = kvm_ioapic_init(kvm);
1864 if (r) {
1865 kfree(kvm->arch.vpic);
1866 kvm->arch.vpic = NULL;
1867 goto out;
1868 }
1869 } else
1870 goto out;
1871 r = kvm_setup_default_irq_routing(kvm);
1872 if (r) {
1873 kfree(kvm->arch.vpic);
1874 kfree(kvm->arch.vioapic);
1875 goto out;
1876 }
1877 break;
1878 case KVM_CREATE_PIT:
1879 mutex_lock(&kvm->lock);
1880 r = -EEXIST;
1881 if (kvm->arch.vpit)
1882 goto create_pit_unlock;
1883 r = -ENOMEM;
1884 kvm->arch.vpit = kvm_create_pit(kvm);
1885 if (kvm->arch.vpit)
1886 r = 0;
1887 create_pit_unlock:
1888 mutex_unlock(&kvm->lock);
1889 break;
1890 case KVM_IRQ_LINE_STATUS:
1891 case KVM_IRQ_LINE: {
1892 struct kvm_irq_level irq_event;
1893
1894 r = -EFAULT;
1895 if (copy_from_user(&irq_event, argp, sizeof irq_event))
1896 goto out;
1897 if (irqchip_in_kernel(kvm)) {
1898 __s32 status;
1899 mutex_lock(&kvm->lock);
1900 status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
1901 irq_event.irq, irq_event.level);
1902 mutex_unlock(&kvm->lock);
1903 if (ioctl == KVM_IRQ_LINE_STATUS) {
1904 irq_event.status = status;
1905 if (copy_to_user(argp, &irq_event,
1906 sizeof irq_event))
1907 goto out;
1908 }
1909 r = 0;
1910 }
1911 break;
1912 }
1913 case KVM_GET_IRQCHIP: {
1914 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1915 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
1916
1917 r = -ENOMEM;
1918 if (!chip)
1919 goto out;
1920 r = -EFAULT;
1921 if (copy_from_user(chip, argp, sizeof *chip))
1922 goto get_irqchip_out;
1923 r = -ENXIO;
1924 if (!irqchip_in_kernel(kvm))
1925 goto get_irqchip_out;
1926 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
1927 if (r)
1928 goto get_irqchip_out;
1929 r = -EFAULT;
1930 if (copy_to_user(argp, chip, sizeof *chip))
1931 goto get_irqchip_out;
1932 r = 0;
1933 get_irqchip_out:
1934 kfree(chip);
1935 if (r)
1936 goto out;
1937 break;
1938 }
1939 case KVM_SET_IRQCHIP: {
1940 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1941 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
1942
1943 r = -ENOMEM;
1944 if (!chip)
1945 goto out;
1946 r = -EFAULT;
1947 if (copy_from_user(chip, argp, sizeof *chip))
1948 goto set_irqchip_out;
1949 r = -ENXIO;
1950 if (!irqchip_in_kernel(kvm))
1951 goto set_irqchip_out;
1952 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
1953 if (r)
1954 goto set_irqchip_out;
1955 r = 0;
1956 set_irqchip_out:
1957 kfree(chip);
1958 if (r)
1959 goto out;
1960 break;
1961 }
1962 case KVM_GET_PIT: {
1963 r = -EFAULT;
1964 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
1965 goto out;
1966 r = -ENXIO;
1967 if (!kvm->arch.vpit)
1968 goto out;
1969 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
1970 if (r)
1971 goto out;
1972 r = -EFAULT;
1973 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
1974 goto out;
1975 r = 0;
1976 break;
1977 }
1978 case KVM_SET_PIT: {
1979 r = -EFAULT;
1980 if (copy_from_user(&u.ps, argp, sizeof u.ps))
1981 goto out;
1982 r = -ENXIO;
1983 if (!kvm->arch.vpit)
1984 goto out;
1985 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
1986 if (r)
1987 goto out;
1988 r = 0;
1989 break;
1990 }
1991 case KVM_REINJECT_CONTROL: {
1992 struct kvm_reinject_control control;
1993 r = -EFAULT;
1994 if (copy_from_user(&control, argp, sizeof(control)))
1995 goto out;
1996 r = kvm_vm_ioctl_reinject(kvm, &control);
1997 if (r)
1998 goto out;
1999 r = 0;
2000 break;
2001 }
2002 default:
2003 ;
2004 }
2005 out:
2006 return r;
2007 }
2008
2009 static void kvm_init_msr_list(void)
2010 {
2011 u32 dummy[2];
2012 unsigned i, j;
2013
2014 for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
2015 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
2016 continue;
2017 if (j < i)
2018 msrs_to_save[j] = msrs_to_save[i];
2019 j++;
2020 }
2021 num_msrs_to_save = j;
2022 }
2023
2024 /*
2025 * Only apic need an MMIO device hook, so shortcut now..
2026 */
2027 static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
2028 gpa_t addr, int len,
2029 int is_write)
2030 {
2031 struct kvm_io_device *dev;
2032
2033 if (vcpu->arch.apic) {
2034 dev = &vcpu->arch.apic->dev;
2035 if (dev->in_range(dev, addr, len, is_write))
2036 return dev;
2037 }
2038 return NULL;
2039 }
2040
2041
2042 static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
2043 gpa_t addr, int len,
2044 int is_write)
2045 {
2046 struct kvm_io_device *dev;
2047
2048 dev = vcpu_find_pervcpu_dev(vcpu, addr, len, is_write);
2049 if (dev == NULL)
2050 dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr, len,
2051 is_write);
2052 return dev;
2053 }
2054
2055 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
2056 struct kvm_vcpu *vcpu)
2057 {
2058 void *data = val;
2059 int r = X86EMUL_CONTINUE;
2060
2061 while (bytes) {
2062 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2063 unsigned offset = addr & (PAGE_SIZE-1);
2064 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
2065 int ret;
2066
2067 if (gpa == UNMAPPED_GVA) {
2068 r = X86EMUL_PROPAGATE_FAULT;
2069 goto out;
2070 }
2071 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
2072 if (ret < 0) {
2073 r = X86EMUL_UNHANDLEABLE;
2074 goto out;
2075 }
2076
2077 bytes -= toread;
2078 data += toread;
2079 addr += toread;
2080 }
2081 out:
2082 return r;
2083 }
2084
2085 static int kvm_write_guest_virt(gva_t addr, void *val, unsigned int bytes,
2086 struct kvm_vcpu *vcpu)
2087 {
2088 void *data = val;
2089 int r = X86EMUL_CONTINUE;
2090
2091 while (bytes) {
2092 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2093 unsigned offset = addr & (PAGE_SIZE-1);
2094 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
2095 int ret;
2096
2097 if (gpa == UNMAPPED_GVA) {
2098 r = X86EMUL_PROPAGATE_FAULT;
2099 goto out;
2100 }
2101 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
2102 if (ret < 0) {
2103 r = X86EMUL_UNHANDLEABLE;
2104 goto out;
2105 }
2106
2107 bytes -= towrite;
2108 data += towrite;
2109 addr += towrite;
2110 }
2111 out:
2112 return r;
2113 }
2114
2115
2116 static int emulator_read_emulated(unsigned long addr,
2117 void *val,
2118 unsigned int bytes,
2119 struct kvm_vcpu *vcpu)
2120 {
2121 struct kvm_io_device *mmio_dev;
2122 gpa_t gpa;
2123
2124 if (vcpu->mmio_read_completed) {
2125 memcpy(val, vcpu->mmio_data, bytes);
2126 vcpu->mmio_read_completed = 0;
2127 return X86EMUL_CONTINUE;
2128 }
2129
2130 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2131
2132 /* For APIC access vmexit */
2133 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2134 goto mmio;
2135
2136 if (kvm_read_guest_virt(addr, val, bytes, vcpu)
2137 == X86EMUL_CONTINUE)
2138 return X86EMUL_CONTINUE;
2139 if (gpa == UNMAPPED_GVA)
2140 return X86EMUL_PROPAGATE_FAULT;
2141
2142 mmio:
2143 /*
2144 * Is this MMIO handled locally?
2145 */
2146 mutex_lock(&vcpu->kvm->lock);
2147 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 0);
2148 if (mmio_dev) {
2149 kvm_iodevice_read(mmio_dev, gpa, bytes, val);
2150 mutex_unlock(&vcpu->kvm->lock);
2151 return X86EMUL_CONTINUE;
2152 }
2153 mutex_unlock(&vcpu->kvm->lock);
2154
2155 vcpu->mmio_needed = 1;
2156 vcpu->mmio_phys_addr = gpa;
2157 vcpu->mmio_size = bytes;
2158 vcpu->mmio_is_write = 0;
2159
2160 return X86EMUL_UNHANDLEABLE;
2161 }
2162
2163 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
2164 const void *val, int bytes)
2165 {
2166 int ret;
2167
2168 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
2169 if (ret < 0)
2170 return 0;
2171 kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
2172 return 1;
2173 }
2174
2175 static int emulator_write_emulated_onepage(unsigned long addr,
2176 const void *val,
2177 unsigned int bytes,
2178 struct kvm_vcpu *vcpu)
2179 {
2180 struct kvm_io_device *mmio_dev;
2181 gpa_t gpa;
2182
2183 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2184
2185 if (gpa == UNMAPPED_GVA) {
2186 kvm_inject_page_fault(vcpu, addr, 2);
2187 return X86EMUL_PROPAGATE_FAULT;
2188 }
2189
2190 /* For APIC access vmexit */
2191 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2192 goto mmio;
2193
2194 if (emulator_write_phys(vcpu, gpa, val, bytes))
2195 return X86EMUL_CONTINUE;
2196
2197 mmio:
2198 /*
2199 * Is this MMIO handled locally?
2200 */
2201 mutex_lock(&vcpu->kvm->lock);
2202 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 1);
2203 if (mmio_dev) {
2204 kvm_iodevice_write(mmio_dev, gpa, bytes, val);
2205 mutex_unlock(&vcpu->kvm->lock);
2206 return X86EMUL_CONTINUE;
2207 }
2208 mutex_unlock(&vcpu->kvm->lock);
2209
2210 vcpu->mmio_needed = 1;
2211 vcpu->mmio_phys_addr = gpa;
2212 vcpu->mmio_size = bytes;
2213 vcpu->mmio_is_write = 1;
2214 memcpy(vcpu->mmio_data, val, bytes);
2215
2216 return X86EMUL_CONTINUE;
2217 }
2218
2219 int emulator_write_emulated(unsigned long addr,
2220 const void *val,
2221 unsigned int bytes,
2222 struct kvm_vcpu *vcpu)
2223 {
2224 /* Crossing a page boundary? */
2225 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
2226 int rc, now;
2227
2228 now = -addr & ~PAGE_MASK;
2229 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
2230 if (rc != X86EMUL_CONTINUE)
2231 return rc;
2232 addr += now;
2233 val += now;
2234 bytes -= now;
2235 }
2236 return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
2237 }
2238 EXPORT_SYMBOL_GPL(emulator_write_emulated);
2239
2240 static int emulator_cmpxchg_emulated(unsigned long addr,
2241 const void *old,
2242 const void *new,
2243 unsigned int bytes,
2244 struct kvm_vcpu *vcpu)
2245 {
2246 static int reported;
2247
2248 if (!reported) {
2249 reported = 1;
2250 printk(KERN_WARNING "kvm: emulating exchange as write\n");
2251 }
2252 #ifndef CONFIG_X86_64
2253 /* guests cmpxchg8b have to be emulated atomically */
2254 if (bytes == 8) {
2255 gpa_t gpa;
2256 struct page *page;
2257 char *kaddr;
2258 u64 val;
2259
2260 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2261
2262 if (gpa == UNMAPPED_GVA ||
2263 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2264 goto emul_write;
2265
2266 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
2267 goto emul_write;
2268
2269 val = *(u64 *)new;
2270
2271 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2272
2273 kaddr = kmap_atomic(page, KM_USER0);
2274 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
2275 kunmap_atomic(kaddr, KM_USER0);
2276 kvm_release_page_dirty(page);
2277 }
2278 emul_write:
2279 #endif
2280
2281 return emulator_write_emulated(addr, new, bytes, vcpu);
2282 }
2283
2284 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
2285 {
2286 return kvm_x86_ops->get_segment_base(vcpu, seg);
2287 }
2288
2289 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
2290 {
2291 kvm_mmu_invlpg(vcpu, address);
2292 return X86EMUL_CONTINUE;
2293 }
2294
2295 int emulate_clts(struct kvm_vcpu *vcpu)
2296 {
2297 KVMTRACE_0D(CLTS, vcpu, handler);
2298 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
2299 return X86EMUL_CONTINUE;
2300 }
2301
2302 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
2303 {
2304 struct kvm_vcpu *vcpu = ctxt->vcpu;
2305
2306 switch (dr) {
2307 case 0 ... 3:
2308 *dest = kvm_x86_ops->get_dr(vcpu, dr);
2309 return X86EMUL_CONTINUE;
2310 default:
2311 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr);
2312 return X86EMUL_UNHANDLEABLE;
2313 }
2314 }
2315
2316 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
2317 {
2318 unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
2319 int exception;
2320
2321 kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
2322 if (exception) {
2323 /* FIXME: better handling */
2324 return X86EMUL_UNHANDLEABLE;
2325 }
2326 return X86EMUL_CONTINUE;
2327 }
2328
2329 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
2330 {
2331 u8 opcodes[4];
2332 unsigned long rip = kvm_rip_read(vcpu);
2333 unsigned long rip_linear;
2334
2335 if (!printk_ratelimit())
2336 return;
2337
2338 rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
2339
2340 kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu);
2341
2342 printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
2343 context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
2344 }
2345 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
2346
2347 static struct x86_emulate_ops emulate_ops = {
2348 .read_std = kvm_read_guest_virt,
2349 .read_emulated = emulator_read_emulated,
2350 .write_emulated = emulator_write_emulated,
2351 .cmpxchg_emulated = emulator_cmpxchg_emulated,
2352 };
2353
2354 static void cache_all_regs(struct kvm_vcpu *vcpu)
2355 {
2356 kvm_register_read(vcpu, VCPU_REGS_RAX);
2357 kvm_register_read(vcpu, VCPU_REGS_RSP);
2358 kvm_register_read(vcpu, VCPU_REGS_RIP);
2359 vcpu->arch.regs_dirty = ~0;
2360 }
2361
2362 int emulate_instruction(struct kvm_vcpu *vcpu,
2363 struct kvm_run *run,
2364 unsigned long cr2,
2365 u16 error_code,
2366 int emulation_type)
2367 {
2368 int r;
2369 struct decode_cache *c;
2370
2371 kvm_clear_exception_queue(vcpu);
2372 vcpu->arch.mmio_fault_cr2 = cr2;
2373 /*
2374 * TODO: fix x86_emulate.c to use guest_read/write_register
2375 * instead of direct ->regs accesses, can save hundred cycles
2376 * on Intel for instructions that don't read/change RSP, for
2377 * for example.
2378 */
2379 cache_all_regs(vcpu);
2380
2381 vcpu->mmio_is_write = 0;
2382 vcpu->arch.pio.string = 0;
2383
2384 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
2385 int cs_db, cs_l;
2386 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
2387
2388 vcpu->arch.emulate_ctxt.vcpu = vcpu;
2389 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
2390 vcpu->arch.emulate_ctxt.mode =
2391 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
2392 ? X86EMUL_MODE_REAL : cs_l
2393 ? X86EMUL_MODE_PROT64 : cs_db
2394 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
2395
2396 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2397
2398 /* Reject the instructions other than VMCALL/VMMCALL when
2399 * try to emulate invalid opcode */
2400 c = &vcpu->arch.emulate_ctxt.decode;
2401 if ((emulation_type & EMULTYPE_TRAP_UD) &&
2402 (!(c->twobyte && c->b == 0x01 &&
2403 (c->modrm_reg == 0 || c->modrm_reg == 3) &&
2404 c->modrm_mod == 3 && c->modrm_rm == 1)))
2405 return EMULATE_FAIL;
2406
2407 ++vcpu->stat.insn_emulation;
2408 if (r) {
2409 ++vcpu->stat.insn_emulation_fail;
2410 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2411 return EMULATE_DONE;
2412 return EMULATE_FAIL;
2413 }
2414 }
2415
2416 if (emulation_type & EMULTYPE_SKIP) {
2417 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
2418 return EMULATE_DONE;
2419 }
2420
2421 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2422
2423 if (vcpu->arch.pio.string)
2424 return EMULATE_DO_MMIO;
2425
2426 if ((r || vcpu->mmio_is_write) && run) {
2427 run->exit_reason = KVM_EXIT_MMIO;
2428 run->mmio.phys_addr = vcpu->mmio_phys_addr;
2429 memcpy(run->mmio.data, vcpu->mmio_data, 8);
2430 run->mmio.len = vcpu->mmio_size;
2431 run->mmio.is_write = vcpu->mmio_is_write;
2432 }
2433
2434 if (r) {
2435 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2436 return EMULATE_DONE;
2437 if (!vcpu->mmio_needed) {
2438 kvm_report_emulation_failure(vcpu, "mmio");
2439 return EMULATE_FAIL;
2440 }
2441 return EMULATE_DO_MMIO;
2442 }
2443
2444 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
2445
2446 if (vcpu->mmio_is_write) {
2447 vcpu->mmio_needed = 0;
2448 return EMULATE_DO_MMIO;
2449 }
2450
2451 return EMULATE_DONE;
2452 }
2453 EXPORT_SYMBOL_GPL(emulate_instruction);
2454
2455 static int pio_copy_data(struct kvm_vcpu *vcpu)
2456 {
2457 void *p = vcpu->arch.pio_data;
2458 gva_t q = vcpu->arch.pio.guest_gva;
2459 unsigned bytes;
2460 int ret;
2461
2462 bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
2463 if (vcpu->arch.pio.in)
2464 ret = kvm_write_guest_virt(q, p, bytes, vcpu);
2465 else
2466 ret = kvm_read_guest_virt(q, p, bytes, vcpu);
2467 return ret;
2468 }
2469
2470 int complete_pio(struct kvm_vcpu *vcpu)
2471 {
2472 struct kvm_pio_request *io = &vcpu->arch.pio;
2473 long delta;
2474 int r;
2475 unsigned long val;
2476
2477 if (!io->string) {
2478 if (io->in) {
2479 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2480 memcpy(&val, vcpu->arch.pio_data, io->size);
2481 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
2482 }
2483 } else {
2484 if (io->in) {
2485 r = pio_copy_data(vcpu);
2486 if (r)
2487 return r;
2488 }
2489
2490 delta = 1;
2491 if (io->rep) {
2492 delta *= io->cur_count;
2493 /*
2494 * The size of the register should really depend on
2495 * current address size.
2496 */
2497 val = kvm_register_read(vcpu, VCPU_REGS_RCX);
2498 val -= delta;
2499 kvm_register_write(vcpu, VCPU_REGS_RCX, val);
2500 }
2501 if (io->down)
2502 delta = -delta;
2503 delta *= io->size;
2504 if (io->in) {
2505 val = kvm_register_read(vcpu, VCPU_REGS_RDI);
2506 val += delta;
2507 kvm_register_write(vcpu, VCPU_REGS_RDI, val);
2508 } else {
2509 val = kvm_register_read(vcpu, VCPU_REGS_RSI);
2510 val += delta;
2511 kvm_register_write(vcpu, VCPU_REGS_RSI, val);
2512 }
2513 }
2514
2515 io->count -= io->cur_count;
2516 io->cur_count = 0;
2517
2518 return 0;
2519 }
2520
2521 static void kernel_pio(struct kvm_io_device *pio_dev,
2522 struct kvm_vcpu *vcpu,
2523 void *pd)
2524 {
2525 /* TODO: String I/O for in kernel device */
2526
2527 mutex_lock(&vcpu->kvm->lock);
2528 if (vcpu->arch.pio.in)
2529 kvm_iodevice_read(pio_dev, vcpu->arch.pio.port,
2530 vcpu->arch.pio.size,
2531 pd);
2532 else
2533 kvm_iodevice_write(pio_dev, vcpu->arch.pio.port,
2534 vcpu->arch.pio.size,
2535 pd);
2536 mutex_unlock(&vcpu->kvm->lock);
2537 }
2538
2539 static void pio_string_write(struct kvm_io_device *pio_dev,
2540 struct kvm_vcpu *vcpu)
2541 {
2542 struct kvm_pio_request *io = &vcpu->arch.pio;
2543 void *pd = vcpu->arch.pio_data;
2544 int i;
2545
2546 mutex_lock(&vcpu->kvm->lock);
2547 for (i = 0; i < io->cur_count; i++) {
2548 kvm_iodevice_write(pio_dev, io->port,
2549 io->size,
2550 pd);
2551 pd += io->size;
2552 }
2553 mutex_unlock(&vcpu->kvm->lock);
2554 }
2555
2556 static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
2557 gpa_t addr, int len,
2558 int is_write)
2559 {
2560 return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr, len, is_write);
2561 }
2562
2563 int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2564 int size, unsigned port)
2565 {
2566 struct kvm_io_device *pio_dev;
2567 unsigned long val;
2568
2569 vcpu->run->exit_reason = KVM_EXIT_IO;
2570 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2571 vcpu->run->io.size = vcpu->arch.pio.size = size;
2572 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2573 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
2574 vcpu->run->io.port = vcpu->arch.pio.port = port;
2575 vcpu->arch.pio.in = in;
2576 vcpu->arch.pio.string = 0;
2577 vcpu->arch.pio.down = 0;
2578 vcpu->arch.pio.rep = 0;
2579
2580 if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2581 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2582 handler);
2583 else
2584 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2585 handler);
2586
2587 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2588 memcpy(vcpu->arch.pio_data, &val, 4);
2589
2590 pio_dev = vcpu_find_pio_dev(vcpu, port, size, !in);
2591 if (pio_dev) {
2592 kernel_pio(pio_dev, vcpu, vcpu->arch.pio_data);
2593 complete_pio(vcpu);
2594 return 1;
2595 }
2596 return 0;
2597 }
2598 EXPORT_SYMBOL_GPL(kvm_emulate_pio);
2599
2600 int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2601 int size, unsigned long count, int down,
2602 gva_t address, int rep, unsigned port)
2603 {
2604 unsigned now, in_page;
2605 int ret = 0;
2606 struct kvm_io_device *pio_dev;
2607
2608 vcpu->run->exit_reason = KVM_EXIT_IO;
2609 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2610 vcpu->run->io.size = vcpu->arch.pio.size = size;
2611 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2612 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
2613 vcpu->run->io.port = vcpu->arch.pio.port = port;
2614 vcpu->arch.pio.in = in;
2615 vcpu->arch.pio.string = 1;
2616 vcpu->arch.pio.down = down;
2617 vcpu->arch.pio.rep = rep;
2618
2619 if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2620 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2621 handler);
2622 else
2623 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2624 handler);
2625
2626 if (!count) {
2627 kvm_x86_ops->skip_emulated_instruction(vcpu);
2628 return 1;
2629 }
2630
2631 if (!down)
2632 in_page = PAGE_SIZE - offset_in_page(address);
2633 else
2634 in_page = offset_in_page(address) + size;
2635 now = min(count, (unsigned long)in_page / size);
2636 if (!now)
2637 now = 1;
2638 if (down) {
2639 /*
2640 * String I/O in reverse. Yuck. Kill the guest, fix later.
2641 */
2642 pr_unimpl(vcpu, "guest string pio down\n");
2643 kvm_inject_gp(vcpu, 0);
2644 return 1;
2645 }
2646 vcpu->run->io.count = now;
2647 vcpu->arch.pio.cur_count = now;
2648
2649 if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
2650 kvm_x86_ops->skip_emulated_instruction(vcpu);
2651
2652 vcpu->arch.pio.guest_gva = address;
2653
2654 pio_dev = vcpu_find_pio_dev(vcpu, port,
2655 vcpu->arch.pio.cur_count,
2656 !vcpu->arch.pio.in);
2657 if (!vcpu->arch.pio.in) {
2658 /* string PIO write */
2659 ret = pio_copy_data(vcpu);
2660 if (ret == X86EMUL_PROPAGATE_FAULT) {
2661 kvm_inject_gp(vcpu, 0);
2662 return 1;
2663 }
2664 if (ret == 0 && pio_dev) {
2665 pio_string_write(pio_dev, vcpu);
2666 complete_pio(vcpu);
2667 if (vcpu->arch.pio.count == 0)
2668 ret = 1;
2669 }
2670 } else if (pio_dev)
2671 pr_unimpl(vcpu, "no string pio read support yet, "
2672 "port %x size %d count %ld\n",
2673 port, size, count);
2674
2675 return ret;
2676 }
2677 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
2678
2679 static void bounce_off(void *info)
2680 {
2681 /* nothing */
2682 }
2683
2684 static unsigned int ref_freq;
2685 static unsigned long tsc_khz_ref;
2686
2687 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
2688 void *data)
2689 {
2690 struct cpufreq_freqs *freq = data;
2691 struct kvm *kvm;
2692 struct kvm_vcpu *vcpu;
2693 int i, send_ipi = 0;
2694
2695 if (!ref_freq)
2696 ref_freq = freq->old;
2697
2698 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
2699 return 0;
2700 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
2701 return 0;
2702 per_cpu(cpu_tsc_khz, freq->cpu) = cpufreq_scale(tsc_khz_ref, ref_freq, freq->new);
2703
2704 spin_lock(&kvm_lock);
2705 list_for_each_entry(kvm, &vm_list, vm_list) {
2706 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
2707 vcpu = kvm->vcpus[i];
2708 if (!vcpu)
2709 continue;
2710 if (vcpu->cpu != freq->cpu)
2711 continue;
2712 if (!kvm_request_guest_time_update(vcpu))
2713 continue;
2714 if (vcpu->cpu != smp_processor_id())
2715 send_ipi++;
2716 }
2717 }
2718 spin_unlock(&kvm_lock);
2719
2720 if (freq->old < freq->new && send_ipi) {
2721 /*
2722 * We upscale the frequency. Must make the guest
2723 * doesn't see old kvmclock values while running with
2724 * the new frequency, otherwise we risk the guest sees
2725 * time go backwards.
2726 *
2727 * In case we update the frequency for another cpu
2728 * (which might be in guest context) send an interrupt
2729 * to kick the cpu out of guest context. Next time
2730 * guest context is entered kvmclock will be updated,
2731 * so the guest will not see stale values.
2732 */
2733 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
2734 }
2735 return 0;
2736 }
2737
2738 static struct notifier_block kvmclock_cpufreq_notifier_block = {
2739 .notifier_call = kvmclock_cpufreq_notifier
2740 };
2741
2742 int kvm_arch_init(void *opaque)
2743 {
2744 int r, cpu;
2745 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
2746
2747 if (kvm_x86_ops) {
2748 printk(KERN_ERR "kvm: already loaded the other module\n");
2749 r = -EEXIST;
2750 goto out;
2751 }
2752
2753 if (!ops->cpu_has_kvm_support()) {
2754 printk(KERN_ERR "kvm: no hardware support\n");
2755 r = -EOPNOTSUPP;
2756 goto out;
2757 }
2758 if (ops->disabled_by_bios()) {
2759 printk(KERN_ERR "kvm: disabled by bios\n");
2760 r = -EOPNOTSUPP;
2761 goto out;
2762 }
2763
2764 r = kvm_mmu_module_init();
2765 if (r)
2766 goto out;
2767
2768 kvm_init_msr_list();
2769
2770 kvm_x86_ops = ops;
2771 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
2772 kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
2773 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
2774 PT_DIRTY_MASK, PT64_NX_MASK, 0, 0);
2775
2776 for_each_possible_cpu(cpu)
2777 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
2778 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
2779 tsc_khz_ref = tsc_khz;
2780 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
2781 CPUFREQ_TRANSITION_NOTIFIER);
2782 }
2783
2784 return 0;
2785
2786 out:
2787 return r;
2788 }
2789
2790 void kvm_arch_exit(void)
2791 {
2792 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
2793 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
2794 CPUFREQ_TRANSITION_NOTIFIER);
2795 kvm_x86_ops = NULL;
2796 kvm_mmu_module_exit();
2797 }
2798
2799 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
2800 {
2801 ++vcpu->stat.halt_exits;
2802 KVMTRACE_0D(HLT, vcpu, handler);
2803 if (irqchip_in_kernel(vcpu->kvm)) {
2804 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
2805 return 1;
2806 } else {
2807 vcpu->run->exit_reason = KVM_EXIT_HLT;
2808 return 0;
2809 }
2810 }
2811 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
2812
2813 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
2814 unsigned long a1)
2815 {
2816 if (is_long_mode(vcpu))
2817 return a0;
2818 else
2819 return a0 | ((gpa_t)a1 << 32);
2820 }
2821
2822 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
2823 {
2824 unsigned long nr, a0, a1, a2, a3, ret;
2825 int r = 1;
2826
2827 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
2828 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
2829 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
2830 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
2831 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
2832
2833 KVMTRACE_1D(VMMCALL, vcpu, (u32)nr, handler);
2834
2835 if (!is_long_mode(vcpu)) {
2836 nr &= 0xFFFFFFFF;
2837 a0 &= 0xFFFFFFFF;
2838 a1 &= 0xFFFFFFFF;
2839 a2 &= 0xFFFFFFFF;
2840 a3 &= 0xFFFFFFFF;
2841 }
2842
2843 switch (nr) {
2844 case KVM_HC_VAPIC_POLL_IRQ:
2845 ret = 0;
2846 break;
2847 case KVM_HC_MMU_OP:
2848 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
2849 break;
2850 default:
2851 ret = -KVM_ENOSYS;
2852 break;
2853 }
2854 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
2855 ++vcpu->stat.hypercalls;
2856 return r;
2857 }
2858 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
2859
2860 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
2861 {
2862 char instruction[3];
2863 int ret = 0;
2864 unsigned long rip = kvm_rip_read(vcpu);
2865
2866
2867 /*
2868 * Blow out the MMU to ensure that no other VCPU has an active mapping
2869 * to ensure that the updated hypercall appears atomically across all
2870 * VCPUs.
2871 */
2872 kvm_mmu_zap_all(vcpu->kvm);
2873
2874 kvm_x86_ops->patch_hypercall(vcpu, instruction);
2875 if (emulator_write_emulated(rip, instruction, 3, vcpu)
2876 != X86EMUL_CONTINUE)
2877 ret = -EFAULT;
2878
2879 return ret;
2880 }
2881
2882 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
2883 {
2884 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
2885 }
2886
2887 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2888 {
2889 struct descriptor_table dt = { limit, base };
2890
2891 kvm_x86_ops->set_gdt(vcpu, &dt);
2892 }
2893
2894 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2895 {
2896 struct descriptor_table dt = { limit, base };
2897
2898 kvm_x86_ops->set_idt(vcpu, &dt);
2899 }
2900
2901 void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
2902 unsigned long *rflags)
2903 {
2904 kvm_lmsw(vcpu, msw);
2905 *rflags = kvm_x86_ops->get_rflags(vcpu);
2906 }
2907
2908 unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
2909 {
2910 unsigned long value;
2911
2912 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
2913 switch (cr) {
2914 case 0:
2915 value = vcpu->arch.cr0;
2916 break;
2917 case 2:
2918 value = vcpu->arch.cr2;
2919 break;
2920 case 3:
2921 value = vcpu->arch.cr3;
2922 break;
2923 case 4:
2924 value = vcpu->arch.cr4;
2925 break;
2926 case 8:
2927 value = kvm_get_cr8(vcpu);
2928 break;
2929 default:
2930 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
2931 return 0;
2932 }
2933 KVMTRACE_3D(CR_READ, vcpu, (u32)cr, (u32)value,
2934 (u32)((u64)value >> 32), handler);
2935
2936 return value;
2937 }
2938
2939 void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
2940 unsigned long *rflags)
2941 {
2942 KVMTRACE_3D(CR_WRITE, vcpu, (u32)cr, (u32)val,
2943 (u32)((u64)val >> 32), handler);
2944
2945 switch (cr) {
2946 case 0:
2947 kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
2948 *rflags = kvm_x86_ops->get_rflags(vcpu);
2949 break;
2950 case 2:
2951 vcpu->arch.cr2 = val;
2952 break;
2953 case 3:
2954 kvm_set_cr3(vcpu, val);
2955 break;
2956 case 4:
2957 kvm_set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
2958 break;
2959 case 8:
2960 kvm_set_cr8(vcpu, val & 0xfUL);
2961 break;
2962 default:
2963 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
2964 }
2965 }
2966
2967 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
2968 {
2969 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
2970 int j, nent = vcpu->arch.cpuid_nent;
2971
2972 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
2973 /* when no next entry is found, the current entry[i] is reselected */
2974 for (j = i + 1; ; j = (j + 1) % nent) {
2975 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
2976 if (ej->function == e->function) {
2977 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2978 return j;
2979 }
2980 }
2981 return 0; /* silence gcc, even though control never reaches here */
2982 }
2983
2984 /* find an entry with matching function, matching index (if needed), and that
2985 * should be read next (if it's stateful) */
2986 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
2987 u32 function, u32 index)
2988 {
2989 if (e->function != function)
2990 return 0;
2991 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
2992 return 0;
2993 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
2994 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
2995 return 0;
2996 return 1;
2997 }
2998
2999 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
3000 u32 function, u32 index)
3001 {
3002 int i;
3003 struct kvm_cpuid_entry2 *best = NULL;
3004
3005 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
3006 struct kvm_cpuid_entry2 *e;
3007
3008 e = &vcpu->arch.cpuid_entries[i];
3009 if (is_matching_cpuid_entry(e, function, index)) {
3010 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
3011 move_to_next_stateful_cpuid_entry(vcpu, i);
3012 best = e;
3013 break;
3014 }
3015 /*
3016 * Both basic or both extended?
3017 */
3018 if (((e->function ^ function) & 0x80000000) == 0)
3019 if (!best || e->function > best->function)
3020 best = e;
3021 }
3022 return best;
3023 }
3024
3025 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
3026 {
3027 struct kvm_cpuid_entry2 *best;
3028
3029 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
3030 if (best)
3031 return best->eax & 0xff;
3032 return 36;
3033 }
3034
3035 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
3036 {
3037 u32 function, index;
3038 struct kvm_cpuid_entry2 *best;
3039
3040 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
3041 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
3042 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
3043 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
3044 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
3045 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
3046 best = kvm_find_cpuid_entry(vcpu, function, index);
3047 if (best) {
3048 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
3049 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
3050 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
3051 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
3052 }
3053 kvm_x86_ops->skip_emulated_instruction(vcpu);
3054 KVMTRACE_5D(CPUID, vcpu, function,
3055 (u32)kvm_register_read(vcpu, VCPU_REGS_RAX),
3056 (u32)kvm_register_read(vcpu, VCPU_REGS_RBX),
3057 (u32)kvm_register_read(vcpu, VCPU_REGS_RCX),
3058 (u32)kvm_register_read(vcpu, VCPU_REGS_RDX), handler);
3059 }
3060 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
3061
3062 /*
3063 * Check if userspace requested an interrupt window, and that the
3064 * interrupt window is open.
3065 *
3066 * No need to exit to userspace if we already have an interrupt queued.
3067 */
3068 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
3069 struct kvm_run *kvm_run)
3070 {
3071 return (!vcpu->arch.irq_summary &&
3072 kvm_run->request_interrupt_window &&
3073 vcpu->arch.interrupt_window_open &&
3074 (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF));
3075 }
3076
3077 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
3078 struct kvm_run *kvm_run)
3079 {
3080 kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
3081 kvm_run->cr8 = kvm_get_cr8(vcpu);
3082 kvm_run->apic_base = kvm_get_apic_base(vcpu);
3083 if (irqchip_in_kernel(vcpu->kvm))
3084 kvm_run->ready_for_interrupt_injection = 1;
3085 else
3086 kvm_run->ready_for_interrupt_injection =
3087 (vcpu->arch.interrupt_window_open &&
3088 vcpu->arch.irq_summary == 0);
3089 }
3090
3091 static void vapic_enter(struct kvm_vcpu *vcpu)
3092 {
3093 struct kvm_lapic *apic = vcpu->arch.apic;
3094 struct page *page;
3095
3096 if (!apic || !apic->vapic_addr)
3097 return;
3098
3099 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3100
3101 vcpu->arch.apic->vapic_page = page;
3102 }
3103
3104 static void vapic_exit(struct kvm_vcpu *vcpu)
3105 {
3106 struct kvm_lapic *apic = vcpu->arch.apic;
3107
3108 if (!apic || !apic->vapic_addr)
3109 return;
3110
3111 down_read(&vcpu->kvm->slots_lock);
3112 kvm_release_page_dirty(apic->vapic_page);
3113 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3114 up_read(&vcpu->kvm->slots_lock);
3115 }
3116
3117 static int vcpu_enter_guest(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3118 {
3119 int r;
3120
3121 if (vcpu->requests)
3122 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
3123 kvm_mmu_unload(vcpu);
3124
3125 r = kvm_mmu_reload(vcpu);
3126 if (unlikely(r))
3127 goto out;
3128
3129 if (vcpu->requests) {
3130 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
3131 __kvm_migrate_timers(vcpu);
3132 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE, &vcpu->requests))
3133 kvm_write_guest_time(vcpu);
3134 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
3135 kvm_mmu_sync_roots(vcpu);
3136 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
3137 kvm_x86_ops->tlb_flush(vcpu);
3138 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
3139 &vcpu->requests)) {
3140 kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
3141 r = 0;
3142 goto out;
3143 }
3144 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
3145 kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
3146 r = 0;
3147 goto out;
3148 }
3149 }
3150
3151 preempt_disable();
3152
3153 kvm_x86_ops->prepare_guest_switch(vcpu);
3154 kvm_load_guest_fpu(vcpu);
3155
3156 local_irq_disable();
3157
3158 if (vcpu->requests || need_resched() || signal_pending(current)) {
3159 local_irq_enable();
3160 preempt_enable();
3161 r = 1;
3162 goto out;
3163 }
3164
3165 vcpu->guest_mode = 1;
3166 /*
3167 * Make sure that guest_mode assignment won't happen after
3168 * testing the pending IRQ vector bitmap.
3169 */
3170 smp_wmb();
3171
3172 if (vcpu->arch.exception.pending)
3173 __queue_exception(vcpu);
3174 else if (irqchip_in_kernel(vcpu->kvm))
3175 kvm_x86_ops->inject_pending_irq(vcpu);
3176 else
3177 kvm_x86_ops->inject_pending_vectors(vcpu, kvm_run);
3178
3179 kvm_lapic_sync_to_vapic(vcpu);
3180
3181 up_read(&vcpu->kvm->slots_lock);
3182
3183 kvm_guest_enter();
3184
3185 get_debugreg(vcpu->arch.host_dr6, 6);
3186 get_debugreg(vcpu->arch.host_dr7, 7);
3187 if (unlikely(vcpu->arch.switch_db_regs)) {
3188 get_debugreg(vcpu->arch.host_db[0], 0);
3189 get_debugreg(vcpu->arch.host_db[1], 1);
3190 get_debugreg(vcpu->arch.host_db[2], 2);
3191 get_debugreg(vcpu->arch.host_db[3], 3);
3192
3193 set_debugreg(0, 7);
3194 set_debugreg(vcpu->arch.eff_db[0], 0);
3195 set_debugreg(vcpu->arch.eff_db[1], 1);
3196 set_debugreg(vcpu->arch.eff_db[2], 2);
3197 set_debugreg(vcpu->arch.eff_db[3], 3);
3198 }
3199
3200 KVMTRACE_0D(VMENTRY, vcpu, entryexit);
3201 kvm_x86_ops->run(vcpu, kvm_run);
3202
3203 if (unlikely(vcpu->arch.switch_db_regs)) {
3204 set_debugreg(0, 7);
3205 set_debugreg(vcpu->arch.host_db[0], 0);
3206 set_debugreg(vcpu->arch.host_db[1], 1);
3207 set_debugreg(vcpu->arch.host_db[2], 2);
3208 set_debugreg(vcpu->arch.host_db[3], 3);
3209 }
3210 set_debugreg(vcpu->arch.host_dr6, 6);
3211 set_debugreg(vcpu->arch.host_dr7, 7);
3212
3213 vcpu->guest_mode = 0;
3214 local_irq_enable();
3215
3216 ++vcpu->stat.exits;
3217
3218 /*
3219 * We must have an instruction between local_irq_enable() and
3220 * kvm_guest_exit(), so the timer interrupt isn't delayed by
3221 * the interrupt shadow. The stat.exits increment will do nicely.
3222 * But we need to prevent reordering, hence this barrier():
3223 */
3224 barrier();
3225
3226 kvm_guest_exit();
3227
3228 preempt_enable();
3229
3230 down_read(&vcpu->kvm->slots_lock);
3231
3232 /*
3233 * Profile KVM exit RIPs:
3234 */
3235 if (unlikely(prof_on == KVM_PROFILING)) {
3236 unsigned long rip = kvm_rip_read(vcpu);
3237 profile_hit(KVM_PROFILING, (void *)rip);
3238 }
3239
3240 if (vcpu->arch.exception.pending && kvm_x86_ops->exception_injected(vcpu))
3241 vcpu->arch.exception.pending = false;
3242
3243 kvm_lapic_sync_from_vapic(vcpu);
3244
3245 r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
3246 out:
3247 return r;
3248 }
3249
3250
3251 static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3252 {
3253 int r;
3254
3255 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
3256 pr_debug("vcpu %d received sipi with vector # %x\n",
3257 vcpu->vcpu_id, vcpu->arch.sipi_vector);
3258 kvm_lapic_reset(vcpu);
3259 r = kvm_arch_vcpu_reset(vcpu);
3260 if (r)
3261 return r;
3262 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
3263 }
3264
3265 down_read(&vcpu->kvm->slots_lock);
3266 vapic_enter(vcpu);
3267
3268 r = 1;
3269 while (r > 0) {
3270 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
3271 r = vcpu_enter_guest(vcpu, kvm_run);
3272 else {
3273 up_read(&vcpu->kvm->slots_lock);
3274 kvm_vcpu_block(vcpu);
3275 down_read(&vcpu->kvm->slots_lock);
3276 if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
3277 {
3278 switch(vcpu->arch.mp_state) {
3279 case KVM_MP_STATE_HALTED:
3280 vcpu->arch.mp_state =
3281 KVM_MP_STATE_RUNNABLE;
3282 case KVM_MP_STATE_RUNNABLE:
3283 break;
3284 case KVM_MP_STATE_SIPI_RECEIVED:
3285 default:
3286 r = -EINTR;
3287 break;
3288 }
3289 }
3290 }
3291
3292 if (r <= 0)
3293 break;
3294
3295 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
3296 if (kvm_cpu_has_pending_timer(vcpu))
3297 kvm_inject_pending_timer_irqs(vcpu);
3298
3299 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
3300 r = -EINTR;
3301 kvm_run->exit_reason = KVM_EXIT_INTR;
3302 ++vcpu->stat.request_irq_exits;
3303 }
3304 if (signal_pending(current)) {
3305 r = -EINTR;
3306 kvm_run->exit_reason = KVM_EXIT_INTR;
3307 ++vcpu->stat.signal_exits;
3308 }
3309 if (need_resched()) {
3310 up_read(&vcpu->kvm->slots_lock);
3311 kvm_resched(vcpu);
3312 down_read(&vcpu->kvm->slots_lock);
3313 }
3314 }
3315
3316 up_read(&vcpu->kvm->slots_lock);
3317 post_kvm_run_save(vcpu, kvm_run);
3318
3319 vapic_exit(vcpu);
3320
3321 return r;
3322 }
3323
3324 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3325 {
3326 int r;
3327 sigset_t sigsaved;
3328
3329 vcpu_load(vcpu);
3330
3331 if (vcpu->sigset_active)
3332 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
3333
3334 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
3335 kvm_vcpu_block(vcpu);
3336 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
3337 r = -EAGAIN;
3338 goto out;
3339 }
3340
3341 /* re-sync apic's tpr */
3342 if (!irqchip_in_kernel(vcpu->kvm))
3343 kvm_set_cr8(vcpu, kvm_run->cr8);
3344
3345 if (vcpu->arch.pio.cur_count) {
3346 r = complete_pio(vcpu);
3347 if (r)
3348 goto out;
3349 }
3350 #if CONFIG_HAS_IOMEM
3351 if (vcpu->mmio_needed) {
3352 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
3353 vcpu->mmio_read_completed = 1;
3354 vcpu->mmio_needed = 0;
3355
3356 down_read(&vcpu->kvm->slots_lock);
3357 r = emulate_instruction(vcpu, kvm_run,
3358 vcpu->arch.mmio_fault_cr2, 0,
3359 EMULTYPE_NO_DECODE);
3360 up_read(&vcpu->kvm->slots_lock);
3361 if (r == EMULATE_DO_MMIO) {
3362 /*
3363 * Read-modify-write. Back to userspace.
3364 */
3365 r = 0;
3366 goto out;
3367 }
3368 }
3369 #endif
3370 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
3371 kvm_register_write(vcpu, VCPU_REGS_RAX,
3372 kvm_run->hypercall.ret);
3373
3374 r = __vcpu_run(vcpu, kvm_run);
3375
3376 out:
3377 if (vcpu->sigset_active)
3378 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
3379
3380 vcpu_put(vcpu);
3381 return r;
3382 }
3383
3384 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3385 {
3386 vcpu_load(vcpu);
3387
3388 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3389 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3390 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3391 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3392 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3393 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3394 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3395 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3396 #ifdef CONFIG_X86_64
3397 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
3398 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
3399 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
3400 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
3401 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
3402 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
3403 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
3404 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
3405 #endif
3406
3407 regs->rip = kvm_rip_read(vcpu);
3408 regs->rflags = kvm_x86_ops->get_rflags(vcpu);
3409
3410 /*
3411 * Don't leak debug flags in case they were set for guest debugging
3412 */
3413 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
3414 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
3415
3416 vcpu_put(vcpu);
3417
3418 return 0;
3419 }
3420
3421 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3422 {
3423 vcpu_load(vcpu);
3424
3425 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
3426 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
3427 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
3428 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
3429 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
3430 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
3431 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
3432 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
3433 #ifdef CONFIG_X86_64
3434 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
3435 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
3436 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
3437 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
3438 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
3439 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
3440 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
3441 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
3442
3443 #endif
3444
3445 kvm_rip_write(vcpu, regs->rip);
3446 kvm_x86_ops->set_rflags(vcpu, regs->rflags);
3447
3448
3449 vcpu->arch.exception.pending = false;
3450
3451 vcpu_put(vcpu);
3452
3453 return 0;
3454 }
3455
3456 void kvm_get_segment(struct kvm_vcpu *vcpu,
3457 struct kvm_segment *var, int seg)
3458 {
3459 kvm_x86_ops->get_segment(vcpu, var, seg);
3460 }
3461
3462 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
3463 {
3464 struct kvm_segment cs;
3465
3466 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
3467 *db = cs.db;
3468 *l = cs.l;
3469 }
3470 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
3471
3472 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
3473 struct kvm_sregs *sregs)
3474 {
3475 struct descriptor_table dt;
3476 int pending_vec;
3477
3478 vcpu_load(vcpu);
3479
3480 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3481 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3482 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3483 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3484 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3485 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
3486
3487 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3488 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3489
3490 kvm_x86_ops->get_idt(vcpu, &dt);
3491 sregs->idt.limit = dt.limit;
3492 sregs->idt.base = dt.base;
3493 kvm_x86_ops->get_gdt(vcpu, &dt);
3494 sregs->gdt.limit = dt.limit;
3495 sregs->gdt.base = dt.base;
3496
3497 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3498 sregs->cr0 = vcpu->arch.cr0;
3499 sregs->cr2 = vcpu->arch.cr2;
3500 sregs->cr3 = vcpu->arch.cr3;
3501 sregs->cr4 = vcpu->arch.cr4;
3502 sregs->cr8 = kvm_get_cr8(vcpu);
3503 sregs->efer = vcpu->arch.shadow_efer;
3504 sregs->apic_base = kvm_get_apic_base(vcpu);
3505
3506 if (irqchip_in_kernel(vcpu->kvm)) {
3507 memset(sregs->interrupt_bitmap, 0,
3508 sizeof sregs->interrupt_bitmap);
3509 pending_vec = kvm_x86_ops->get_irq(vcpu);
3510 if (pending_vec >= 0)
3511 set_bit(pending_vec,
3512 (unsigned long *)sregs->interrupt_bitmap);
3513 } else
3514 memcpy(sregs->interrupt_bitmap, vcpu->arch.irq_pending,
3515 sizeof sregs->interrupt_bitmap);
3516
3517 vcpu_put(vcpu);
3518
3519 return 0;
3520 }
3521
3522 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
3523 struct kvm_mp_state *mp_state)
3524 {
3525 vcpu_load(vcpu);
3526 mp_state->mp_state = vcpu->arch.mp_state;
3527 vcpu_put(vcpu);
3528 return 0;
3529 }
3530
3531 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
3532 struct kvm_mp_state *mp_state)
3533 {
3534 vcpu_load(vcpu);
3535 vcpu->arch.mp_state = mp_state->mp_state;
3536 vcpu_put(vcpu);
3537 return 0;
3538 }
3539
3540 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3541 struct kvm_segment *var, int seg)
3542 {
3543 kvm_x86_ops->set_segment(vcpu, var, seg);
3544 }
3545
3546 static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
3547 struct kvm_segment *kvm_desct)
3548 {
3549 kvm_desct->base = seg_desc->base0;
3550 kvm_desct->base |= seg_desc->base1 << 16;
3551 kvm_desct->base |= seg_desc->base2 << 24;
3552 kvm_desct->limit = seg_desc->limit0;
3553 kvm_desct->limit |= seg_desc->limit << 16;
3554 if (seg_desc->g) {
3555 kvm_desct->limit <<= 12;
3556 kvm_desct->limit |= 0xfff;
3557 }
3558 kvm_desct->selector = selector;
3559 kvm_desct->type = seg_desc->type;
3560 kvm_desct->present = seg_desc->p;
3561 kvm_desct->dpl = seg_desc->dpl;
3562 kvm_desct->db = seg_desc->d;
3563 kvm_desct->s = seg_desc->s;
3564 kvm_desct->l = seg_desc->l;
3565 kvm_desct->g = seg_desc->g;
3566 kvm_desct->avl = seg_desc->avl;
3567 if (!selector)
3568 kvm_desct->unusable = 1;
3569 else
3570 kvm_desct->unusable = 0;
3571 kvm_desct->padding = 0;
3572 }
3573
3574 static void get_segment_descriptor_dtable(struct kvm_vcpu *vcpu,
3575 u16 selector,
3576 struct descriptor_table *dtable)
3577 {
3578 if (selector & 1 << 2) {
3579 struct kvm_segment kvm_seg;
3580
3581 kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
3582
3583 if (kvm_seg.unusable)
3584 dtable->limit = 0;
3585 else
3586 dtable->limit = kvm_seg.limit;
3587 dtable->base = kvm_seg.base;
3588 }
3589 else
3590 kvm_x86_ops->get_gdt(vcpu, dtable);
3591 }
3592
3593 /* allowed just for 8 bytes segments */
3594 static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3595 struct desc_struct *seg_desc)
3596 {
3597 gpa_t gpa;
3598 struct descriptor_table dtable;
3599 u16 index = selector >> 3;
3600
3601 get_segment_descriptor_dtable(vcpu, selector, &dtable);
3602
3603 if (dtable.limit < index * 8 + 7) {
3604 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
3605 return 1;
3606 }
3607 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3608 gpa += index * 8;
3609 return kvm_read_guest(vcpu->kvm, gpa, seg_desc, 8);
3610 }
3611
3612 /* allowed just for 8 bytes segments */
3613 static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3614 struct desc_struct *seg_desc)
3615 {
3616 gpa_t gpa;
3617 struct descriptor_table dtable;
3618 u16 index = selector >> 3;
3619
3620 get_segment_descriptor_dtable(vcpu, selector, &dtable);
3621
3622 if (dtable.limit < index * 8 + 7)
3623 return 1;
3624 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3625 gpa += index * 8;
3626 return kvm_write_guest(vcpu->kvm, gpa, seg_desc, 8);
3627 }
3628
3629 static u32 get_tss_base_addr(struct kvm_vcpu *vcpu,
3630 struct desc_struct *seg_desc)
3631 {
3632 u32 base_addr;
3633
3634 base_addr = seg_desc->base0;
3635 base_addr |= (seg_desc->base1 << 16);
3636 base_addr |= (seg_desc->base2 << 24);
3637
3638 return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr);
3639 }
3640
3641 static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
3642 {
3643 struct kvm_segment kvm_seg;
3644
3645 kvm_get_segment(vcpu, &kvm_seg, seg);
3646 return kvm_seg.selector;
3647 }
3648
3649 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
3650 u16 selector,
3651 struct kvm_segment *kvm_seg)
3652 {
3653 struct desc_struct seg_desc;
3654
3655 if (load_guest_segment_descriptor(vcpu, selector, &seg_desc))
3656 return 1;
3657 seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg);
3658 return 0;
3659 }
3660
3661 static int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
3662 {
3663 struct kvm_segment segvar = {
3664 .base = selector << 4,
3665 .limit = 0xffff,
3666 .selector = selector,
3667 .type = 3,
3668 .present = 1,
3669 .dpl = 3,
3670 .db = 0,
3671 .s = 1,
3672 .l = 0,
3673 .g = 0,
3674 .avl = 0,
3675 .unusable = 0,
3676 };
3677 kvm_x86_ops->set_segment(vcpu, &segvar, seg);
3678 return 0;
3679 }
3680
3681 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3682 int type_bits, int seg)
3683 {
3684 struct kvm_segment kvm_seg;
3685
3686 if (!(vcpu->arch.cr0 & X86_CR0_PE))
3687 return kvm_load_realmode_segment(vcpu, selector, seg);
3688 if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
3689 return 1;
3690 kvm_seg.type |= type_bits;
3691
3692 if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS &&
3693 seg != VCPU_SREG_LDTR)
3694 if (!kvm_seg.s)
3695 kvm_seg.unusable = 1;
3696
3697 kvm_set_segment(vcpu, &kvm_seg, seg);
3698 return 0;
3699 }
3700
3701 static void save_state_to_tss32(struct kvm_vcpu *vcpu,
3702 struct tss_segment_32 *tss)
3703 {
3704 tss->cr3 = vcpu->arch.cr3;
3705 tss->eip = kvm_rip_read(vcpu);
3706 tss->eflags = kvm_x86_ops->get_rflags(vcpu);
3707 tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3708 tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3709 tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3710 tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3711 tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3712 tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3713 tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3714 tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3715 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3716 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3717 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3718 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3719 tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
3720 tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
3721 tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3722 }
3723
3724 static int load_state_from_tss32(struct kvm_vcpu *vcpu,
3725 struct tss_segment_32 *tss)
3726 {
3727 kvm_set_cr3(vcpu, tss->cr3);
3728
3729 kvm_rip_write(vcpu, tss->eip);
3730 kvm_x86_ops->set_rflags(vcpu, tss->eflags | 2);
3731
3732 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
3733 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
3734 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
3735 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
3736 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
3737 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
3738 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
3739 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
3740
3741 if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
3742 return 1;
3743
3744 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
3745 return 1;
3746
3747 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
3748 return 1;
3749
3750 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
3751 return 1;
3752
3753 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
3754 return 1;
3755
3756 if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS))
3757 return 1;
3758
3759 if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS))
3760 return 1;
3761 return 0;
3762 }
3763
3764 static void save_state_to_tss16(struct kvm_vcpu *vcpu,
3765 struct tss_segment_16 *tss)
3766 {
3767 tss->ip = kvm_rip_read(vcpu);
3768 tss->flag = kvm_x86_ops->get_rflags(vcpu);
3769 tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3770 tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3771 tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3772 tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3773 tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3774 tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3775 tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
3776 tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
3777
3778 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3779 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3780 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3781 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3782 tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3783 tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
3784 }
3785
3786 static int load_state_from_tss16(struct kvm_vcpu *vcpu,
3787 struct tss_segment_16 *tss)
3788 {
3789 kvm_rip_write(vcpu, tss->ip);
3790 kvm_x86_ops->set_rflags(vcpu, tss->flag | 2);
3791 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
3792 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
3793 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
3794 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
3795 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
3796 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
3797 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
3798 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
3799
3800 if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
3801 return 1;
3802
3803 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
3804 return 1;
3805
3806 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
3807 return 1;
3808
3809 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
3810 return 1;
3811
3812 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
3813 return 1;
3814 return 0;
3815 }
3816
3817 static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
3818 u16 old_tss_sel, u32 old_tss_base,
3819 struct desc_struct *nseg_desc)
3820 {
3821 struct tss_segment_16 tss_segment_16;
3822 int ret = 0;
3823
3824 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
3825 sizeof tss_segment_16))
3826 goto out;
3827
3828 save_state_to_tss16(vcpu, &tss_segment_16);
3829
3830 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
3831 sizeof tss_segment_16))
3832 goto out;
3833
3834 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
3835 &tss_segment_16, sizeof tss_segment_16))
3836 goto out;
3837
3838 if (old_tss_sel != 0xffff) {
3839 tss_segment_16.prev_task_link = old_tss_sel;
3840
3841 if (kvm_write_guest(vcpu->kvm,
3842 get_tss_base_addr(vcpu, nseg_desc),
3843 &tss_segment_16.prev_task_link,
3844 sizeof tss_segment_16.prev_task_link))
3845 goto out;
3846 }
3847
3848 if (load_state_from_tss16(vcpu, &tss_segment_16))
3849 goto out;
3850
3851 ret = 1;
3852 out:
3853 return ret;
3854 }
3855
3856 static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
3857 u16 old_tss_sel, u32 old_tss_base,
3858 struct desc_struct *nseg_desc)
3859 {
3860 struct tss_segment_32 tss_segment_32;
3861 int ret = 0;
3862
3863 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
3864 sizeof tss_segment_32))
3865 goto out;
3866
3867 save_state_to_tss32(vcpu, &tss_segment_32);
3868
3869 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
3870 sizeof tss_segment_32))
3871 goto out;
3872
3873 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
3874 &tss_segment_32, sizeof tss_segment_32))
3875 goto out;
3876
3877 if (old_tss_sel != 0xffff) {
3878 tss_segment_32.prev_task_link = old_tss_sel;
3879
3880 if (kvm_write_guest(vcpu->kvm,
3881 get_tss_base_addr(vcpu, nseg_desc),
3882 &tss_segment_32.prev_task_link,
3883 sizeof tss_segment_32.prev_task_link))
3884 goto out;
3885 }
3886
3887 if (load_state_from_tss32(vcpu, &tss_segment_32))
3888 goto out;
3889
3890 ret = 1;
3891 out:
3892 return ret;
3893 }
3894
3895 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
3896 {
3897 struct kvm_segment tr_seg;
3898 struct desc_struct cseg_desc;
3899 struct desc_struct nseg_desc;
3900 int ret = 0;
3901 u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
3902 u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
3903
3904 old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base);
3905
3906 /* FIXME: Handle errors. Failure to read either TSS or their
3907 * descriptors should generate a pagefault.
3908 */
3909 if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
3910 goto out;
3911
3912 if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
3913 goto out;
3914
3915 if (reason != TASK_SWITCH_IRET) {
3916 int cpl;
3917
3918 cpl = kvm_x86_ops->get_cpl(vcpu);
3919 if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
3920 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
3921 return 1;
3922 }
3923 }
3924
3925 if (!nseg_desc.p || (nseg_desc.limit0 | nseg_desc.limit << 16) < 0x67) {
3926 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
3927 return 1;
3928 }
3929
3930 if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
3931 cseg_desc.type &= ~(1 << 1); //clear the B flag
3932 save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
3933 }
3934
3935 if (reason == TASK_SWITCH_IRET) {
3936 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
3937 kvm_x86_ops->set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
3938 }
3939
3940 /* set back link to prev task only if NT bit is set in eflags
3941 note that old_tss_sel is not used afetr this point */
3942 if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
3943 old_tss_sel = 0xffff;
3944
3945 /* set back link to prev task only if NT bit is set in eflags
3946 note that old_tss_sel is not used afetr this point */
3947 if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
3948 old_tss_sel = 0xffff;
3949
3950 if (nseg_desc.type & 8)
3951 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_sel,
3952 old_tss_base, &nseg_desc);
3953 else
3954 ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_sel,
3955 old_tss_base, &nseg_desc);
3956
3957 if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
3958 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
3959 kvm_x86_ops->set_rflags(vcpu, eflags | X86_EFLAGS_NT);
3960 }
3961
3962 if (reason != TASK_SWITCH_IRET) {
3963 nseg_desc.type |= (1 << 1);
3964 save_guest_segment_descriptor(vcpu, tss_selector,
3965 &nseg_desc);
3966 }
3967
3968 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 | X86_CR0_TS);
3969 seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
3970 tr_seg.type = 11;
3971 kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
3972 out:
3973 return ret;
3974 }
3975 EXPORT_SYMBOL_GPL(kvm_task_switch);
3976
3977 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
3978 struct kvm_sregs *sregs)
3979 {
3980 int mmu_reset_needed = 0;
3981 int i, pending_vec, max_bits;
3982 struct descriptor_table dt;
3983
3984 vcpu_load(vcpu);
3985
3986 dt.limit = sregs->idt.limit;
3987 dt.base = sregs->idt.base;
3988 kvm_x86_ops->set_idt(vcpu, &dt);
3989 dt.limit = sregs->gdt.limit;
3990 dt.base = sregs->gdt.base;
3991 kvm_x86_ops->set_gdt(vcpu, &dt);
3992
3993 vcpu->arch.cr2 = sregs->cr2;
3994 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
3995 vcpu->arch.cr3 = sregs->cr3;
3996
3997 kvm_set_cr8(vcpu, sregs->cr8);
3998
3999 mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
4000 kvm_x86_ops->set_efer(vcpu, sregs->efer);
4001 kvm_set_apic_base(vcpu, sregs->apic_base);
4002
4003 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
4004
4005 mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
4006 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
4007 vcpu->arch.cr0 = sregs->cr0;
4008
4009 mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
4010 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
4011 if (!is_long_mode(vcpu) && is_pae(vcpu))
4012 load_pdptrs(vcpu, vcpu->arch.cr3);
4013
4014 if (mmu_reset_needed)
4015 kvm_mmu_reset_context(vcpu);
4016
4017 if (!irqchip_in_kernel(vcpu->kvm)) {
4018 memcpy(vcpu->arch.irq_pending, sregs->interrupt_bitmap,
4019 sizeof vcpu->arch.irq_pending);
4020 vcpu->arch.irq_summary = 0;
4021 for (i = 0; i < ARRAY_SIZE(vcpu->arch.irq_pending); ++i)
4022 if (vcpu->arch.irq_pending[i])
4023 __set_bit(i, &vcpu->arch.irq_summary);
4024 } else {
4025 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
4026 pending_vec = find_first_bit(
4027 (const unsigned long *)sregs->interrupt_bitmap,
4028 max_bits);
4029 /* Only pending external irq is handled here */
4030 if (pending_vec < max_bits) {
4031 kvm_x86_ops->set_irq(vcpu, pending_vec);
4032 pr_debug("Set back pending irq %d\n",
4033 pending_vec);
4034 }
4035 kvm_pic_clear_isr_ack(vcpu->kvm);
4036 }
4037
4038 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4039 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4040 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4041 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4042 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4043 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4044
4045 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4046 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4047
4048 /* Older userspace won't unhalt the vcpu on reset. */
4049 if (vcpu->vcpu_id == 0 && kvm_rip_read(vcpu) == 0xfff0 &&
4050 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
4051 !(vcpu->arch.cr0 & X86_CR0_PE))
4052 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4053
4054 vcpu_put(vcpu);
4055
4056 return 0;
4057 }
4058
4059 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
4060 struct kvm_guest_debug *dbg)
4061 {
4062 int i, r;
4063
4064 vcpu_load(vcpu);
4065
4066 if ((dbg->control & (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) ==
4067 (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) {
4068 for (i = 0; i < KVM_NR_DB_REGS; ++i)
4069 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
4070 vcpu->arch.switch_db_regs =
4071 (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
4072 } else {
4073 for (i = 0; i < KVM_NR_DB_REGS; i++)
4074 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
4075 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
4076 }
4077
4078 r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
4079
4080 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
4081 kvm_queue_exception(vcpu, DB_VECTOR);
4082 else if (dbg->control & KVM_GUESTDBG_INJECT_BP)
4083 kvm_queue_exception(vcpu, BP_VECTOR);
4084
4085 vcpu_put(vcpu);
4086
4087 return r;
4088 }
4089
4090 /*
4091 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
4092 * we have asm/x86/processor.h
4093 */
4094 struct fxsave {
4095 u16 cwd;
4096 u16 swd;
4097 u16 twd;
4098 u16 fop;
4099 u64 rip;
4100 u64 rdp;
4101 u32 mxcsr;
4102 u32 mxcsr_mask;
4103 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
4104 #ifdef CONFIG_X86_64
4105 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
4106 #else
4107 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
4108 #endif
4109 };
4110
4111 /*
4112 * Translate a guest virtual address to a guest physical address.
4113 */
4114 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
4115 struct kvm_translation *tr)
4116 {
4117 unsigned long vaddr = tr->linear_address;
4118 gpa_t gpa;
4119
4120 vcpu_load(vcpu);
4121 down_read(&vcpu->kvm->slots_lock);
4122 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
4123 up_read(&vcpu->kvm->slots_lock);
4124 tr->physical_address = gpa;
4125 tr->valid = gpa != UNMAPPED_GVA;
4126 tr->writeable = 1;
4127 tr->usermode = 0;
4128 vcpu_put(vcpu);
4129
4130 return 0;
4131 }
4132
4133 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4134 {
4135 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4136
4137 vcpu_load(vcpu);
4138
4139 memcpy(fpu->fpr, fxsave->st_space, 128);
4140 fpu->fcw = fxsave->cwd;
4141 fpu->fsw = fxsave->swd;
4142 fpu->ftwx = fxsave->twd;
4143 fpu->last_opcode = fxsave->fop;
4144 fpu->last_ip = fxsave->rip;
4145 fpu->last_dp = fxsave->rdp;
4146 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
4147
4148 vcpu_put(vcpu);
4149
4150 return 0;
4151 }
4152
4153 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4154 {
4155 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4156
4157 vcpu_load(vcpu);
4158
4159 memcpy(fxsave->st_space, fpu->fpr, 128);
4160 fxsave->cwd = fpu->fcw;
4161 fxsave->swd = fpu->fsw;
4162 fxsave->twd = fpu->ftwx;
4163 fxsave->fop = fpu->last_opcode;
4164 fxsave->rip = fpu->last_ip;
4165 fxsave->rdp = fpu->last_dp;
4166 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
4167
4168 vcpu_put(vcpu);
4169
4170 return 0;
4171 }
4172
4173 void fx_init(struct kvm_vcpu *vcpu)
4174 {
4175 unsigned after_mxcsr_mask;
4176
4177 /*
4178 * Touch the fpu the first time in non atomic context as if
4179 * this is the first fpu instruction the exception handler
4180 * will fire before the instruction returns and it'll have to
4181 * allocate ram with GFP_KERNEL.
4182 */
4183 if (!used_math())
4184 kvm_fx_save(&vcpu->arch.host_fx_image);
4185
4186 /* Initialize guest FPU by resetting ours and saving into guest's */
4187 preempt_disable();
4188 kvm_fx_save(&vcpu->arch.host_fx_image);
4189 kvm_fx_finit();
4190 kvm_fx_save(&vcpu->arch.guest_fx_image);
4191 kvm_fx_restore(&vcpu->arch.host_fx_image);
4192 preempt_enable();
4193
4194 vcpu->arch.cr0 |= X86_CR0_ET;
4195 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
4196 vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
4197 memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
4198 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
4199 }
4200 EXPORT_SYMBOL_GPL(fx_init);
4201
4202 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
4203 {
4204 if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
4205 return;
4206
4207 vcpu->guest_fpu_loaded = 1;
4208 kvm_fx_save(&vcpu->arch.host_fx_image);
4209 kvm_fx_restore(&vcpu->arch.guest_fx_image);
4210 }
4211 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
4212
4213 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
4214 {
4215 if (!vcpu->guest_fpu_loaded)
4216 return;
4217
4218 vcpu->guest_fpu_loaded = 0;
4219 kvm_fx_save(&vcpu->arch.guest_fx_image);
4220 kvm_fx_restore(&vcpu->arch.host_fx_image);
4221 ++vcpu->stat.fpu_reload;
4222 }
4223 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
4224
4225 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
4226 {
4227 if (vcpu->arch.time_page) {
4228 kvm_release_page_dirty(vcpu->arch.time_page);
4229 vcpu->arch.time_page = NULL;
4230 }
4231
4232 kvm_x86_ops->vcpu_free(vcpu);
4233 }
4234
4235 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
4236 unsigned int id)
4237 {
4238 return kvm_x86_ops->vcpu_create(kvm, id);
4239 }
4240
4241 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
4242 {
4243 int r;
4244
4245 /* We do fxsave: this must be aligned. */
4246 BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
4247
4248 vcpu->arch.mtrr_state.have_fixed = 1;
4249 vcpu_load(vcpu);
4250 r = kvm_arch_vcpu_reset(vcpu);
4251 if (r == 0)
4252 r = kvm_mmu_setup(vcpu);
4253 vcpu_put(vcpu);
4254 if (r < 0)
4255 goto free_vcpu;
4256
4257 return 0;
4258 free_vcpu:
4259 kvm_x86_ops->vcpu_free(vcpu);
4260 return r;
4261 }
4262
4263 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
4264 {
4265 vcpu_load(vcpu);
4266 kvm_mmu_unload(vcpu);
4267 vcpu_put(vcpu);
4268
4269 kvm_x86_ops->vcpu_free(vcpu);
4270 }
4271
4272 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
4273 {
4274 vcpu->arch.nmi_pending = false;
4275 vcpu->arch.nmi_injected = false;
4276
4277 vcpu->arch.switch_db_regs = 0;
4278 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
4279 vcpu->arch.dr6 = DR6_FIXED_1;
4280 vcpu->arch.dr7 = DR7_FIXED_1;
4281
4282 return kvm_x86_ops->vcpu_reset(vcpu);
4283 }
4284
4285 void kvm_arch_hardware_enable(void *garbage)
4286 {
4287 kvm_x86_ops->hardware_enable(garbage);
4288 }
4289
4290 void kvm_arch_hardware_disable(void *garbage)
4291 {
4292 kvm_x86_ops->hardware_disable(garbage);
4293 }
4294
4295 int kvm_arch_hardware_setup(void)
4296 {
4297 return kvm_x86_ops->hardware_setup();
4298 }
4299
4300 void kvm_arch_hardware_unsetup(void)
4301 {
4302 kvm_x86_ops->hardware_unsetup();
4303 }
4304
4305 void kvm_arch_check_processor_compat(void *rtn)
4306 {
4307 kvm_x86_ops->check_processor_compatibility(rtn);
4308 }
4309
4310 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
4311 {
4312 struct page *page;
4313 struct kvm *kvm;
4314 int r;
4315
4316 BUG_ON(vcpu->kvm == NULL);
4317 kvm = vcpu->kvm;
4318
4319 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
4320 if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0)
4321 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4322 else
4323 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
4324
4325 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
4326 if (!page) {
4327 r = -ENOMEM;
4328 goto fail;
4329 }
4330 vcpu->arch.pio_data = page_address(page);
4331
4332 r = kvm_mmu_create(vcpu);
4333 if (r < 0)
4334 goto fail_free_pio_data;
4335
4336 if (irqchip_in_kernel(kvm)) {
4337 r = kvm_create_lapic(vcpu);
4338 if (r < 0)
4339 goto fail_mmu_destroy;
4340 }
4341
4342 return 0;
4343
4344 fail_mmu_destroy:
4345 kvm_mmu_destroy(vcpu);
4346 fail_free_pio_data:
4347 free_page((unsigned long)vcpu->arch.pio_data);
4348 fail:
4349 return r;
4350 }
4351
4352 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
4353 {
4354 kvm_free_lapic(vcpu);
4355 down_read(&vcpu->kvm->slots_lock);
4356 kvm_mmu_destroy(vcpu);
4357 up_read(&vcpu->kvm->slots_lock);
4358 free_page((unsigned long)vcpu->arch.pio_data);
4359 }
4360
4361 struct kvm *kvm_arch_create_vm(void)
4362 {
4363 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
4364
4365 if (!kvm)
4366 return ERR_PTR(-ENOMEM);
4367
4368 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
4369 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
4370
4371 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
4372 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
4373
4374 rdtscll(kvm->arch.vm_init_tsc);
4375
4376 return kvm;
4377 }
4378
4379 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
4380 {
4381 vcpu_load(vcpu);
4382 kvm_mmu_unload(vcpu);
4383 vcpu_put(vcpu);
4384 }
4385
4386 static void kvm_free_vcpus(struct kvm *kvm)
4387 {
4388 unsigned int i;
4389
4390 /*
4391 * Unpin any mmu pages first.
4392 */
4393 for (i = 0; i < KVM_MAX_VCPUS; ++i)
4394 if (kvm->vcpus[i])
4395 kvm_unload_vcpu_mmu(kvm->vcpus[i]);
4396 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
4397 if (kvm->vcpus[i]) {
4398 kvm_arch_vcpu_free(kvm->vcpus[i]);
4399 kvm->vcpus[i] = NULL;
4400 }
4401 }
4402
4403 }
4404
4405 void kvm_arch_sync_events(struct kvm *kvm)
4406 {
4407 kvm_free_all_assigned_devices(kvm);
4408 }
4409
4410 void kvm_arch_destroy_vm(struct kvm *kvm)
4411 {
4412 kvm_iommu_unmap_guest(kvm);
4413 kvm_free_pit(kvm);
4414 kfree(kvm->arch.vpic);
4415 kfree(kvm->arch.vioapic);
4416 kvm_free_vcpus(kvm);
4417 kvm_free_physmem(kvm);
4418 if (kvm->arch.apic_access_page)
4419 put_page(kvm->arch.apic_access_page);
4420 if (kvm->arch.ept_identity_pagetable)
4421 put_page(kvm->arch.ept_identity_pagetable);
4422 kfree(kvm);
4423 }
4424
4425 int kvm_arch_set_memory_region(struct kvm *kvm,
4426 struct kvm_userspace_memory_region *mem,
4427 struct kvm_memory_slot old,
4428 int user_alloc)
4429 {
4430 int npages = mem->memory_size >> PAGE_SHIFT;
4431 struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
4432
4433 /*To keep backward compatibility with older userspace,
4434 *x86 needs to hanlde !user_alloc case.
4435 */
4436 if (!user_alloc) {
4437 if (npages && !old.rmap) {
4438 unsigned long userspace_addr;
4439
4440 down_write(&current->mm->mmap_sem);
4441 userspace_addr = do_mmap(NULL, 0,
4442 npages * PAGE_SIZE,
4443 PROT_READ | PROT_WRITE,
4444 MAP_PRIVATE | MAP_ANONYMOUS,
4445 0);
4446 up_write(&current->mm->mmap_sem);
4447
4448 if (IS_ERR((void *)userspace_addr))
4449 return PTR_ERR((void *)userspace_addr);
4450
4451 /* set userspace_addr atomically for kvm_hva_to_rmapp */
4452 spin_lock(&kvm->mmu_lock);
4453 memslot->userspace_addr = userspace_addr;
4454 spin_unlock(&kvm->mmu_lock);
4455 } else {
4456 if (!old.user_alloc && old.rmap) {
4457 int ret;
4458
4459 down_write(&current->mm->mmap_sem);
4460 ret = do_munmap(current->mm, old.userspace_addr,
4461 old.npages * PAGE_SIZE);
4462 up_write(&current->mm->mmap_sem);
4463 if (ret < 0)
4464 printk(KERN_WARNING
4465 "kvm_vm_ioctl_set_memory_region: "
4466 "failed to munmap memory\n");
4467 }
4468 }
4469 }
4470
4471 if (!kvm->arch.n_requested_mmu_pages) {
4472 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
4473 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
4474 }
4475
4476 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
4477 kvm_flush_remote_tlbs(kvm);
4478
4479 return 0;
4480 }
4481
4482 void kvm_arch_flush_shadow(struct kvm *kvm)
4483 {
4484 kvm_mmu_zap_all(kvm);
4485 }
4486
4487 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
4488 {
4489 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
4490 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
4491 || vcpu->arch.nmi_pending;
4492 }
4493
4494 static void vcpu_kick_intr(void *info)
4495 {
4496 #ifdef DEBUG
4497 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)info;
4498 printk(KERN_DEBUG "vcpu_kick_intr %p \n", vcpu);
4499 #endif
4500 }
4501
4502 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
4503 {
4504 int ipi_pcpu = vcpu->cpu;
4505 int cpu = get_cpu();
4506
4507 if (waitqueue_active(&vcpu->wq)) {
4508 wake_up_interruptible(&vcpu->wq);
4509 ++vcpu->stat.halt_wakeup;
4510 }
4511 /*
4512 * We may be called synchronously with irqs disabled in guest mode,
4513 * So need not to call smp_call_function_single() in that case.
4514 */
4515 if (vcpu->guest_mode && vcpu->cpu != cpu)
4516 smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0);
4517 put_cpu();
4518 }
4519
4520 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
4521 {
4522 return kvm_x86_ops->interrupt_allowed(vcpu);
4523 }
Linux kernel - Deliverables
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