2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
30 #include "assigned-dev.h"
32 #include <linux/clocksource.h>
33 #include <linux/interrupt.h>
34 #include <linux/kvm.h>
36 #include <linux/vmalloc.h>
37 #include <linux/module.h>
38 #include <linux/mman.h>
39 #include <linux/highmem.h>
40 #include <linux/iommu.h>
41 #include <linux/intel-iommu.h>
42 #include <linux/cpufreq.h>
43 #include <linux/user-return-notifier.h>
44 #include <linux/srcu.h>
45 #include <linux/slab.h>
46 #include <linux/perf_event.h>
47 #include <linux/uaccess.h>
48 #include <linux/hash.h>
49 #include <linux/pci.h>
50 #include <linux/timekeeper_internal.h>
51 #include <linux/pvclock_gtod.h>
52 #include <trace/events/kvm.h>
54 #define CREATE_TRACE_POINTS
57 #include <asm/debugreg.h>
63 #include <asm/fpu-internal.h> /* Ugh! */
65 #include <asm/pvclock.h>
66 #include <asm/div64.h>
68 #define MAX_IO_MSRS 256
69 #define KVM_MAX_MCE_BANKS 32
70 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
72 #define emul_to_vcpu(ctxt) \
73 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
76 * - enable syscall per default because its emulated by KVM
77 * - enable LME and LMA per default on 64 bit KVM
81 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
83 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
86 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
87 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
89 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
90 static void process_nmi(struct kvm_vcpu
*vcpu
);
91 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
93 struct kvm_x86_ops
*kvm_x86_ops
;
94 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
96 static bool ignore_msrs
= 0;
97 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
99 unsigned int min_timer_period_us
= 500;
100 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
102 bool kvm_has_tsc_control
;
103 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
104 u32 kvm_max_guest_tsc_khz
;
105 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
107 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
108 static u32 tsc_tolerance_ppm
= 250;
109 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
111 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
112 unsigned int lapic_timer_advance_ns
= 0;
113 module_param(lapic_timer_advance_ns
, uint
, S_IRUGO
| S_IWUSR
);
115 static bool backwards_tsc_observed
= false;
117 #define KVM_NR_SHARED_MSRS 16
119 struct kvm_shared_msrs_global
{
121 u32 msrs
[KVM_NR_SHARED_MSRS
];
124 struct kvm_shared_msrs
{
125 struct user_return_notifier urn
;
127 struct kvm_shared_msr_values
{
130 } values
[KVM_NR_SHARED_MSRS
];
133 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
134 static struct kvm_shared_msrs __percpu
*shared_msrs
;
136 struct kvm_stats_debugfs_item debugfs_entries
[] = {
137 { "pf_fixed", VCPU_STAT(pf_fixed
) },
138 { "pf_guest", VCPU_STAT(pf_guest
) },
139 { "tlb_flush", VCPU_STAT(tlb_flush
) },
140 { "invlpg", VCPU_STAT(invlpg
) },
141 { "exits", VCPU_STAT(exits
) },
142 { "io_exits", VCPU_STAT(io_exits
) },
143 { "mmio_exits", VCPU_STAT(mmio_exits
) },
144 { "signal_exits", VCPU_STAT(signal_exits
) },
145 { "irq_window", VCPU_STAT(irq_window_exits
) },
146 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
147 { "halt_exits", VCPU_STAT(halt_exits
) },
148 { "halt_successful_poll", VCPU_STAT(halt_successful_poll
) },
149 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
150 { "hypercalls", VCPU_STAT(hypercalls
) },
151 { "request_irq", VCPU_STAT(request_irq_exits
) },
152 { "irq_exits", VCPU_STAT(irq_exits
) },
153 { "host_state_reload", VCPU_STAT(host_state_reload
) },
154 { "efer_reload", VCPU_STAT(efer_reload
) },
155 { "fpu_reload", VCPU_STAT(fpu_reload
) },
156 { "insn_emulation", VCPU_STAT(insn_emulation
) },
157 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
158 { "irq_injections", VCPU_STAT(irq_injections
) },
159 { "nmi_injections", VCPU_STAT(nmi_injections
) },
160 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
161 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
162 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
163 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
164 { "mmu_flooded", VM_STAT(mmu_flooded
) },
165 { "mmu_recycled", VM_STAT(mmu_recycled
) },
166 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
167 { "mmu_unsync", VM_STAT(mmu_unsync
) },
168 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
169 { "largepages", VM_STAT(lpages
) },
173 u64 __read_mostly host_xcr0
;
175 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
177 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
180 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
181 vcpu
->arch
.apf
.gfns
[i
] = ~0;
184 static void kvm_on_user_return(struct user_return_notifier
*urn
)
187 struct kvm_shared_msrs
*locals
188 = container_of(urn
, struct kvm_shared_msrs
, urn
);
189 struct kvm_shared_msr_values
*values
;
191 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
192 values
= &locals
->values
[slot
];
193 if (values
->host
!= values
->curr
) {
194 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
195 values
->curr
= values
->host
;
198 locals
->registered
= false;
199 user_return_notifier_unregister(urn
);
202 static void shared_msr_update(unsigned slot
, u32 msr
)
205 unsigned int cpu
= smp_processor_id();
206 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
208 /* only read, and nobody should modify it at this time,
209 * so don't need lock */
210 if (slot
>= shared_msrs_global
.nr
) {
211 printk(KERN_ERR
"kvm: invalid MSR slot!");
214 rdmsrl_safe(msr
, &value
);
215 smsr
->values
[slot
].host
= value
;
216 smsr
->values
[slot
].curr
= value
;
219 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
221 BUG_ON(slot
>= KVM_NR_SHARED_MSRS
);
222 if (slot
>= shared_msrs_global
.nr
)
223 shared_msrs_global
.nr
= slot
+ 1;
224 shared_msrs_global
.msrs
[slot
] = msr
;
225 /* we need ensured the shared_msr_global have been updated */
228 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
230 static void kvm_shared_msr_cpu_online(void)
234 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
235 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
238 int kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
240 unsigned int cpu
= smp_processor_id();
241 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
244 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
246 smsr
->values
[slot
].curr
= value
;
247 err
= wrmsrl_safe(shared_msrs_global
.msrs
[slot
], value
);
251 if (!smsr
->registered
) {
252 smsr
->urn
.on_user_return
= kvm_on_user_return
;
253 user_return_notifier_register(&smsr
->urn
);
254 smsr
->registered
= true;
258 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
260 static void drop_user_return_notifiers(void)
262 unsigned int cpu
= smp_processor_id();
263 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
265 if (smsr
->registered
)
266 kvm_on_user_return(&smsr
->urn
);
269 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
271 return vcpu
->arch
.apic_base
;
273 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
275 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
277 u64 old_state
= vcpu
->arch
.apic_base
&
278 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
279 u64 new_state
= msr_info
->data
&
280 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
281 u64 reserved_bits
= ((~0ULL) << cpuid_maxphyaddr(vcpu
)) |
282 0x2ff | (guest_cpuid_has_x2apic(vcpu
) ? 0 : X2APIC_ENABLE
);
284 if (!msr_info
->host_initiated
&&
285 ((msr_info
->data
& reserved_bits
) != 0 ||
286 new_state
== X2APIC_ENABLE
||
287 (new_state
== MSR_IA32_APICBASE_ENABLE
&&
288 old_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
)) ||
289 (new_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
) &&
293 kvm_lapic_set_base(vcpu
, msr_info
->data
);
296 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
298 asmlinkage __visible
void kvm_spurious_fault(void)
300 /* Fault while not rebooting. We want the trace. */
303 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
305 #define EXCPT_BENIGN 0
306 #define EXCPT_CONTRIBUTORY 1
309 static int exception_class(int vector
)
319 return EXCPT_CONTRIBUTORY
;
326 #define EXCPT_FAULT 0
328 #define EXCPT_ABORT 2
329 #define EXCPT_INTERRUPT 3
331 static int exception_type(int vector
)
335 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
336 return EXCPT_INTERRUPT
;
340 /* #DB is trap, as instruction watchpoints are handled elsewhere */
341 if (mask
& ((1 << DB_VECTOR
) | (1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
344 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
347 /* Reserved exceptions will result in fault */
351 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
352 unsigned nr
, bool has_error
, u32 error_code
,
358 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
360 if (!vcpu
->arch
.exception
.pending
) {
362 if (has_error
&& !is_protmode(vcpu
))
364 vcpu
->arch
.exception
.pending
= true;
365 vcpu
->arch
.exception
.has_error_code
= has_error
;
366 vcpu
->arch
.exception
.nr
= nr
;
367 vcpu
->arch
.exception
.error_code
= error_code
;
368 vcpu
->arch
.exception
.reinject
= reinject
;
372 /* to check exception */
373 prev_nr
= vcpu
->arch
.exception
.nr
;
374 if (prev_nr
== DF_VECTOR
) {
375 /* triple fault -> shutdown */
376 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
379 class1
= exception_class(prev_nr
);
380 class2
= exception_class(nr
);
381 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
382 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
383 /* generate double fault per SDM Table 5-5 */
384 vcpu
->arch
.exception
.pending
= true;
385 vcpu
->arch
.exception
.has_error_code
= true;
386 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
387 vcpu
->arch
.exception
.error_code
= 0;
389 /* replace previous exception with a new one in a hope
390 that instruction re-execution will regenerate lost
395 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
397 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
399 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
401 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
403 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
405 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
407 void kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
410 kvm_inject_gp(vcpu
, 0);
412 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
414 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
416 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
418 ++vcpu
->stat
.pf_guest
;
419 vcpu
->arch
.cr2
= fault
->address
;
420 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
422 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
424 static bool kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
426 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
427 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
429 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
431 return fault
->nested_page_fault
;
434 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
436 atomic_inc(&vcpu
->arch
.nmi_queued
);
437 kvm_make_request(KVM_REQ_NMI
, vcpu
);
439 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
441 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
443 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
445 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
447 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
449 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
451 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
454 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
455 * a #GP and return false.
457 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
459 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
461 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
464 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
466 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
468 if ((dr
!= 4 && dr
!= 5) || !kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
471 kvm_queue_exception(vcpu
, UD_VECTOR
);
474 EXPORT_SYMBOL_GPL(kvm_require_dr
);
477 * This function will be used to read from the physical memory of the currently
478 * running guest. The difference to kvm_read_guest_page is that this function
479 * can read from guest physical or from the guest's guest physical memory.
481 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
482 gfn_t ngfn
, void *data
, int offset
, int len
,
485 struct x86_exception exception
;
489 ngpa
= gfn_to_gpa(ngfn
);
490 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
, &exception
);
491 if (real_gfn
== UNMAPPED_GVA
)
494 real_gfn
= gpa_to_gfn(real_gfn
);
496 return kvm_read_guest_page(vcpu
->kvm
, real_gfn
, data
, offset
, len
);
498 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
500 static int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
501 void *data
, int offset
, int len
, u32 access
)
503 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
504 data
, offset
, len
, access
);
508 * Load the pae pdptrs. Return true is they are all valid.
510 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
512 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
513 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
516 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
518 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
519 offset
* sizeof(u64
), sizeof(pdpte
),
520 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
525 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
526 if (is_present_gpte(pdpte
[i
]) &&
527 (pdpte
[i
] & vcpu
->arch
.mmu
.rsvd_bits_mask
[0][2])) {
534 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
535 __set_bit(VCPU_EXREG_PDPTR
,
536 (unsigned long *)&vcpu
->arch
.regs_avail
);
537 __set_bit(VCPU_EXREG_PDPTR
,
538 (unsigned long *)&vcpu
->arch
.regs_dirty
);
543 EXPORT_SYMBOL_GPL(load_pdptrs
);
545 static bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
547 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
553 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
556 if (!test_bit(VCPU_EXREG_PDPTR
,
557 (unsigned long *)&vcpu
->arch
.regs_avail
))
560 gfn
= (kvm_read_cr3(vcpu
) & ~31u) >> PAGE_SHIFT
;
561 offset
= (kvm_read_cr3(vcpu
) & ~31u) & (PAGE_SIZE
- 1);
562 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
563 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
566 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
572 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
574 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
575 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
|
576 X86_CR0_CD
| X86_CR0_NW
;
581 if (cr0
& 0xffffffff00000000UL
)
585 cr0
&= ~CR0_RESERVED_BITS
;
587 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
590 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
593 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
595 if ((vcpu
->arch
.efer
& EFER_LME
)) {
600 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
605 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
610 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
613 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
615 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
616 kvm_clear_async_pf_completion_queue(vcpu
);
617 kvm_async_pf_hash_reset(vcpu
);
620 if ((cr0
^ old_cr0
) & update_bits
)
621 kvm_mmu_reset_context(vcpu
);
624 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
626 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
628 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
630 EXPORT_SYMBOL_GPL(kvm_lmsw
);
632 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
634 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
635 !vcpu
->guest_xcr0_loaded
) {
636 /* kvm_set_xcr() also depends on this */
637 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
638 vcpu
->guest_xcr0_loaded
= 1;
642 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
644 if (vcpu
->guest_xcr0_loaded
) {
645 if (vcpu
->arch
.xcr0
!= host_xcr0
)
646 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
647 vcpu
->guest_xcr0_loaded
= 0;
651 static int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
654 u64 old_xcr0
= vcpu
->arch
.xcr0
;
657 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
658 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
660 if (!(xcr0
& XSTATE_FP
))
662 if ((xcr0
& XSTATE_YMM
) && !(xcr0
& XSTATE_SSE
))
666 * Do not allow the guest to set bits that we do not support
667 * saving. However, xcr0 bit 0 is always set, even if the
668 * emulated CPU does not support XSAVE (see fx_init).
670 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XSTATE_FP
;
671 if (xcr0
& ~valid_bits
)
674 if ((!(xcr0
& XSTATE_BNDREGS
)) != (!(xcr0
& XSTATE_BNDCSR
)))
677 if (xcr0
& XSTATE_AVX512
) {
678 if (!(xcr0
& XSTATE_YMM
))
680 if ((xcr0
& XSTATE_AVX512
) != XSTATE_AVX512
)
683 kvm_put_guest_xcr0(vcpu
);
684 vcpu
->arch
.xcr0
= xcr0
;
686 if ((xcr0
^ old_xcr0
) & XSTATE_EXTEND_MASK
)
687 kvm_update_cpuid(vcpu
);
691 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
693 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 ||
694 __kvm_set_xcr(vcpu
, index
, xcr
)) {
695 kvm_inject_gp(vcpu
, 0);
700 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
702 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
704 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
705 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
|
706 X86_CR4_SMEP
| X86_CR4_SMAP
;
708 if (cr4
& CR4_RESERVED_BITS
)
711 if (!guest_cpuid_has_xsave(vcpu
) && (cr4
& X86_CR4_OSXSAVE
))
714 if (!guest_cpuid_has_smep(vcpu
) && (cr4
& X86_CR4_SMEP
))
717 if (!guest_cpuid_has_smap(vcpu
) && (cr4
& X86_CR4_SMAP
))
720 if (!guest_cpuid_has_fsgsbase(vcpu
) && (cr4
& X86_CR4_FSGSBASE
))
723 if (is_long_mode(vcpu
)) {
724 if (!(cr4
& X86_CR4_PAE
))
726 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
727 && ((cr4
^ old_cr4
) & pdptr_bits
)
728 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
732 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
733 if (!guest_cpuid_has_pcid(vcpu
))
736 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
737 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
741 if (kvm_x86_ops
->set_cr4(vcpu
, cr4
))
744 if (((cr4
^ old_cr4
) & pdptr_bits
) ||
745 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
746 kvm_mmu_reset_context(vcpu
);
748 if ((cr4
^ old_cr4
) & X86_CR4_OSXSAVE
)
749 kvm_update_cpuid(vcpu
);
753 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
755 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
758 cr3
&= ~CR3_PCID_INVD
;
761 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
762 kvm_mmu_sync_roots(vcpu
);
763 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
767 if (is_long_mode(vcpu
)) {
768 if (cr3
& CR3_L_MODE_RESERVED_BITS
)
770 } else if (is_pae(vcpu
) && is_paging(vcpu
) &&
771 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
774 vcpu
->arch
.cr3
= cr3
;
775 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
776 kvm_mmu_new_cr3(vcpu
);
779 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
781 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
783 if (cr8
& CR8_RESERVED_BITS
)
785 if (irqchip_in_kernel(vcpu
->kvm
))
786 kvm_lapic_set_tpr(vcpu
, cr8
);
788 vcpu
->arch
.cr8
= cr8
;
791 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
793 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
795 if (irqchip_in_kernel(vcpu
->kvm
))
796 return kvm_lapic_get_cr8(vcpu
);
798 return vcpu
->arch
.cr8
;
800 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
802 static void kvm_update_dr0123(struct kvm_vcpu
*vcpu
)
806 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
807 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
808 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
809 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_RELOAD
;
813 static void kvm_update_dr6(struct kvm_vcpu
*vcpu
)
815 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
816 kvm_x86_ops
->set_dr6(vcpu
, vcpu
->arch
.dr6
);
819 static void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
823 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
824 dr7
= vcpu
->arch
.guest_debug_dr7
;
826 dr7
= vcpu
->arch
.dr7
;
827 kvm_x86_ops
->set_dr7(vcpu
, dr7
);
828 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
829 if (dr7
& DR7_BP_EN_MASK
)
830 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
833 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
835 u64 fixed
= DR6_FIXED_1
;
837 if (!guest_cpuid_has_rtm(vcpu
))
842 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
846 vcpu
->arch
.db
[dr
] = val
;
847 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
848 vcpu
->arch
.eff_db
[dr
] = val
;
853 if (val
& 0xffffffff00000000ULL
)
855 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
856 kvm_update_dr6(vcpu
);
861 if (val
& 0xffffffff00000000ULL
)
863 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
864 kvm_update_dr7(vcpu
);
871 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
873 if (__kvm_set_dr(vcpu
, dr
, val
)) {
874 kvm_inject_gp(vcpu
, 0);
879 EXPORT_SYMBOL_GPL(kvm_set_dr
);
881 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
885 *val
= vcpu
->arch
.db
[dr
];
890 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
891 *val
= vcpu
->arch
.dr6
;
893 *val
= kvm_x86_ops
->get_dr6(vcpu
);
898 *val
= vcpu
->arch
.dr7
;
903 EXPORT_SYMBOL_GPL(kvm_get_dr
);
905 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
907 u32 ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
911 err
= kvm_pmu_read_pmc(vcpu
, ecx
, &data
);
914 kvm_register_write(vcpu
, VCPU_REGS_RAX
, (u32
)data
);
915 kvm_register_write(vcpu
, VCPU_REGS_RDX
, data
>> 32);
918 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
921 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
922 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
924 * This list is modified at module load time to reflect the
925 * capabilities of the host cpu. This capabilities test skips MSRs that are
926 * kvm-specific. Those are put in the beginning of the list.
929 #define KVM_SAVE_MSRS_BEGIN 12
930 static u32 msrs_to_save
[] = {
931 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
932 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
933 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
934 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
935 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
937 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
940 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
942 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
943 MSR_IA32_FEATURE_CONTROL
, MSR_IA32_BNDCFGS
946 static unsigned num_msrs_to_save
;
948 static const u32 emulated_msrs
[] = {
950 MSR_IA32_TSCDEADLINE
,
951 MSR_IA32_MISC_ENABLE
,
956 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
958 if (efer
& efer_reserved_bits
)
961 if (efer
& EFER_FFXSR
) {
962 struct kvm_cpuid_entry2
*feat
;
964 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
965 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
)))
969 if (efer
& EFER_SVME
) {
970 struct kvm_cpuid_entry2
*feat
;
972 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
973 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
)))
979 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
981 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
983 u64 old_efer
= vcpu
->arch
.efer
;
985 if (!kvm_valid_efer(vcpu
, efer
))
989 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
993 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
995 kvm_x86_ops
->set_efer(vcpu
, efer
);
997 /* Update reserved bits */
998 if ((efer
^ old_efer
) & EFER_NX
)
999 kvm_mmu_reset_context(vcpu
);
1004 void kvm_enable_efer_bits(u64 mask
)
1006 efer_reserved_bits
&= ~mask
;
1008 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1011 * Writes msr value into into the appropriate "register".
1012 * Returns 0 on success, non-0 otherwise.
1013 * Assumes vcpu_load() was already called.
1015 int kvm_set_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1017 switch (msr
->index
) {
1020 case MSR_KERNEL_GS_BASE
:
1023 if (is_noncanonical_address(msr
->data
))
1026 case MSR_IA32_SYSENTER_EIP
:
1027 case MSR_IA32_SYSENTER_ESP
:
1029 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1030 * non-canonical address is written on Intel but not on
1031 * AMD (which ignores the top 32-bits, because it does
1032 * not implement 64-bit SYSENTER).
1034 * 64-bit code should hence be able to write a non-canonical
1035 * value on AMD. Making the address canonical ensures that
1036 * vmentry does not fail on Intel after writing a non-canonical
1037 * value, and that something deterministic happens if the guest
1038 * invokes 64-bit SYSENTER.
1040 msr
->data
= get_canonical(msr
->data
);
1042 return kvm_x86_ops
->set_msr(vcpu
, msr
);
1044 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1047 * Adapt set_msr() to msr_io()'s calling convention
1049 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1051 struct msr_data msr
;
1055 msr
.host_initiated
= true;
1056 return kvm_set_msr(vcpu
, &msr
);
1059 #ifdef CONFIG_X86_64
1060 struct pvclock_gtod_data
{
1063 struct { /* extract of a clocksource struct */
1075 static struct pvclock_gtod_data pvclock_gtod_data
;
1077 static void update_pvclock_gtod(struct timekeeper
*tk
)
1079 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
1082 boot_ns
= ktime_to_ns(ktime_add(tk
->tkr_mono
.base
, tk
->offs_boot
));
1084 write_seqcount_begin(&vdata
->seq
);
1086 /* copy pvclock gtod data */
1087 vdata
->clock
.vclock_mode
= tk
->tkr_mono
.clock
->archdata
.vclock_mode
;
1088 vdata
->clock
.cycle_last
= tk
->tkr_mono
.cycle_last
;
1089 vdata
->clock
.mask
= tk
->tkr_mono
.mask
;
1090 vdata
->clock
.mult
= tk
->tkr_mono
.mult
;
1091 vdata
->clock
.shift
= tk
->tkr_mono
.shift
;
1093 vdata
->boot_ns
= boot_ns
;
1094 vdata
->nsec_base
= tk
->tkr_mono
.xtime_nsec
;
1096 write_seqcount_end(&vdata
->seq
);
1100 void kvm_set_pending_timer(struct kvm_vcpu
*vcpu
)
1103 * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1104 * vcpu_enter_guest. This function is only called from
1105 * the physical CPU that is running vcpu.
1107 kvm_make_request(KVM_REQ_PENDING_TIMER
, vcpu
);
1110 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
1114 struct pvclock_wall_clock wc
;
1115 struct timespec boot
;
1120 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1125 ++version
; /* first time write, random junk */
1129 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1132 * The guest calculates current wall clock time by adding
1133 * system time (updated by kvm_guest_time_update below) to the
1134 * wall clock specified here. guest system time equals host
1135 * system time for us, thus we must fill in host boot time here.
1139 if (kvm
->arch
.kvmclock_offset
) {
1140 struct timespec ts
= ns_to_timespec(kvm
->arch
.kvmclock_offset
);
1141 boot
= timespec_sub(boot
, ts
);
1143 wc
.sec
= boot
.tv_sec
;
1144 wc
.nsec
= boot
.tv_nsec
;
1145 wc
.version
= version
;
1147 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
1150 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1153 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
1155 uint32_t quotient
, remainder
;
1157 /* Don't try to replace with do_div(), this one calculates
1158 * "(dividend << 32) / divisor" */
1160 : "=a" (quotient
), "=d" (remainder
)
1161 : "0" (0), "1" (dividend
), "r" (divisor
) );
1165 static void kvm_get_time_scale(uint32_t scaled_khz
, uint32_t base_khz
,
1166 s8
*pshift
, u32
*pmultiplier
)
1173 tps64
= base_khz
* 1000LL;
1174 scaled64
= scaled_khz
* 1000LL;
1175 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
1180 tps32
= (uint32_t)tps64
;
1181 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
1182 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
1190 *pmultiplier
= div_frac(scaled64
, tps32
);
1192 pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1193 __func__
, base_khz
, scaled_khz
, shift
, *pmultiplier
);
1196 static inline u64
get_kernel_ns(void)
1198 return ktime_get_boot_ns();
1201 #ifdef CONFIG_X86_64
1202 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
1205 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
1206 static unsigned long max_tsc_khz
;
1208 static inline u64
nsec_to_cycles(struct kvm_vcpu
*vcpu
, u64 nsec
)
1210 return pvclock_scale_delta(nsec
, vcpu
->arch
.virtual_tsc_mult
,
1211 vcpu
->arch
.virtual_tsc_shift
);
1214 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
1216 u64 v
= (u64
)khz
* (1000000 + ppm
);
1221 static void kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 this_tsc_khz
)
1223 u32 thresh_lo
, thresh_hi
;
1224 int use_scaling
= 0;
1226 /* tsc_khz can be zero if TSC calibration fails */
1227 if (this_tsc_khz
== 0)
1230 /* Compute a scale to convert nanoseconds in TSC cycles */
1231 kvm_get_time_scale(this_tsc_khz
, NSEC_PER_SEC
/ 1000,
1232 &vcpu
->arch
.virtual_tsc_shift
,
1233 &vcpu
->arch
.virtual_tsc_mult
);
1234 vcpu
->arch
.virtual_tsc_khz
= this_tsc_khz
;
1237 * Compute the variation in TSC rate which is acceptable
1238 * within the range of tolerance and decide if the
1239 * rate being applied is within that bounds of the hardware
1240 * rate. If so, no scaling or compensation need be done.
1242 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
1243 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
1244 if (this_tsc_khz
< thresh_lo
|| this_tsc_khz
> thresh_hi
) {
1245 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz
, thresh_lo
, thresh_hi
);
1248 kvm_x86_ops
->set_tsc_khz(vcpu
, this_tsc_khz
, use_scaling
);
1251 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1253 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
1254 vcpu
->arch
.virtual_tsc_mult
,
1255 vcpu
->arch
.virtual_tsc_shift
);
1256 tsc
+= vcpu
->arch
.this_tsc_write
;
1260 static void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
1262 #ifdef CONFIG_X86_64
1264 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
1265 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1267 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1268 atomic_read(&vcpu
->kvm
->online_vcpus
));
1271 * Once the masterclock is enabled, always perform request in
1272 * order to update it.
1274 * In order to enable masterclock, the host clocksource must be TSC
1275 * and the vcpus need to have matched TSCs. When that happens,
1276 * perform request to enable masterclock.
1278 if (ka
->use_master_clock
||
1279 (gtod
->clock
.vclock_mode
== VCLOCK_TSC
&& vcpus_matched
))
1280 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
1282 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
1283 atomic_read(&vcpu
->kvm
->online_vcpus
),
1284 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
1288 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu
*vcpu
, s64 offset
)
1290 u64 curr_offset
= kvm_x86_ops
->read_tsc_offset(vcpu
);
1291 vcpu
->arch
.ia32_tsc_adjust_msr
+= offset
- curr_offset
;
1294 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1296 struct kvm
*kvm
= vcpu
->kvm
;
1297 u64 offset
, ns
, elapsed
;
1298 unsigned long flags
;
1301 bool already_matched
;
1302 u64 data
= msr
->data
;
1304 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1305 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
, data
);
1306 ns
= get_kernel_ns();
1307 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1309 if (vcpu
->arch
.virtual_tsc_khz
) {
1312 /* n.b - signed multiplication and division required */
1313 usdiff
= data
- kvm
->arch
.last_tsc_write
;
1314 #ifdef CONFIG_X86_64
1315 usdiff
= (usdiff
* 1000) / vcpu
->arch
.virtual_tsc_khz
;
1317 /* do_div() only does unsigned */
1318 asm("1: idivl %[divisor]\n"
1319 "2: xor %%edx, %%edx\n"
1320 " movl $0, %[faulted]\n"
1322 ".section .fixup,\"ax\"\n"
1323 "4: movl $1, %[faulted]\n"
1327 _ASM_EXTABLE(1b
, 4b
)
1329 : "=A"(usdiff
), [faulted
] "=r" (faulted
)
1330 : "A"(usdiff
* 1000), [divisor
] "rm"(vcpu
->arch
.virtual_tsc_khz
));
1333 do_div(elapsed
, 1000);
1338 /* idivl overflow => difference is larger than USEC_PER_SEC */
1340 usdiff
= USEC_PER_SEC
;
1342 usdiff
= USEC_PER_SEC
; /* disable TSC match window below */
1345 * Special case: TSC write with a small delta (1 second) of virtual
1346 * cycle time against real time is interpreted as an attempt to
1347 * synchronize the CPU.
1349 * For a reliable TSC, we can match TSC offsets, and for an unstable
1350 * TSC, we add elapsed time in this computation. We could let the
1351 * compensation code attempt to catch up if we fall behind, but
1352 * it's better to try to match offsets from the beginning.
1354 if (usdiff
< USEC_PER_SEC
&&
1355 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
1356 if (!check_tsc_unstable()) {
1357 offset
= kvm
->arch
.cur_tsc_offset
;
1358 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1360 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
1362 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
, data
);
1363 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1366 already_matched
= (vcpu
->arch
.this_tsc_generation
== kvm
->arch
.cur_tsc_generation
);
1369 * We split periods of matched TSC writes into generations.
1370 * For each generation, we track the original measured
1371 * nanosecond time, offset, and write, so if TSCs are in
1372 * sync, we can match exact offset, and if not, we can match
1373 * exact software computation in compute_guest_tsc()
1375 * These values are tracked in kvm->arch.cur_xxx variables.
1377 kvm
->arch
.cur_tsc_generation
++;
1378 kvm
->arch
.cur_tsc_nsec
= ns
;
1379 kvm
->arch
.cur_tsc_write
= data
;
1380 kvm
->arch
.cur_tsc_offset
= offset
;
1382 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1383 kvm
->arch
.cur_tsc_generation
, data
);
1387 * We also track th most recent recorded KHZ, write and time to
1388 * allow the matching interval to be extended at each write.
1390 kvm
->arch
.last_tsc_nsec
= ns
;
1391 kvm
->arch
.last_tsc_write
= data
;
1392 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
1394 vcpu
->arch
.last_guest_tsc
= data
;
1396 /* Keep track of which generation this VCPU has synchronized to */
1397 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
1398 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
1399 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
1401 if (guest_cpuid_has_tsc_adjust(vcpu
) && !msr
->host_initiated
)
1402 update_ia32_tsc_adjust_msr(vcpu
, offset
);
1403 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1404 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1406 spin_lock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1408 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
1409 } else if (!already_matched
) {
1410 kvm
->arch
.nr_vcpus_matched_tsc
++;
1413 kvm_track_tsc_matching(vcpu
);
1414 spin_unlock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1417 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1419 #ifdef CONFIG_X86_64
1421 static cycle_t
read_tsc(void)
1427 * Empirically, a fence (of type that depends on the CPU)
1428 * before rdtsc is enough to ensure that rdtsc is ordered
1429 * with respect to loads. The various CPU manuals are unclear
1430 * as to whether rdtsc can be reordered with later loads,
1431 * but no one has ever seen it happen.
1434 ret
= (cycle_t
)vget_cycles();
1436 last
= pvclock_gtod_data
.clock
.cycle_last
;
1438 if (likely(ret
>= last
))
1442 * GCC likes to generate cmov here, but this branch is extremely
1443 * predictable (it's just a funciton of time and the likely is
1444 * very likely) and there's a data dependence, so force GCC
1445 * to generate a branch instead. I don't barrier() because
1446 * we don't actually need a barrier, and if this function
1447 * ever gets inlined it will generate worse code.
1453 static inline u64
vgettsc(cycle_t
*cycle_now
)
1456 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1458 *cycle_now
= read_tsc();
1460 v
= (*cycle_now
- gtod
->clock
.cycle_last
) & gtod
->clock
.mask
;
1461 return v
* gtod
->clock
.mult
;
1464 static int do_monotonic_boot(s64
*t
, cycle_t
*cycle_now
)
1466 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1472 seq
= read_seqcount_begin(>od
->seq
);
1473 mode
= gtod
->clock
.vclock_mode
;
1474 ns
= gtod
->nsec_base
;
1475 ns
+= vgettsc(cycle_now
);
1476 ns
>>= gtod
->clock
.shift
;
1477 ns
+= gtod
->boot_ns
;
1478 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1484 /* returns true if host is using tsc clocksource */
1485 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, cycle_t
*cycle_now
)
1487 /* checked again under seqlock below */
1488 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1491 return do_monotonic_boot(kernel_ns
, cycle_now
) == VCLOCK_TSC
;
1497 * Assuming a stable TSC across physical CPUS, and a stable TSC
1498 * across virtual CPUs, the following condition is possible.
1499 * Each numbered line represents an event visible to both
1500 * CPUs at the next numbered event.
1502 * "timespecX" represents host monotonic time. "tscX" represents
1505 * VCPU0 on CPU0 | VCPU1 on CPU1
1507 * 1. read timespec0,tsc0
1508 * 2. | timespec1 = timespec0 + N
1510 * 3. transition to guest | transition to guest
1511 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1512 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1513 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1515 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1518 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1520 * - 0 < N - M => M < N
1522 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1523 * always the case (the difference between two distinct xtime instances
1524 * might be smaller then the difference between corresponding TSC reads,
1525 * when updating guest vcpus pvclock areas).
1527 * To avoid that problem, do not allow visibility of distinct
1528 * system_timestamp/tsc_timestamp values simultaneously: use a master
1529 * copy of host monotonic time values. Update that master copy
1532 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1536 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
1538 #ifdef CONFIG_X86_64
1539 struct kvm_arch
*ka
= &kvm
->arch
;
1541 bool host_tsc_clocksource
, vcpus_matched
;
1543 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1544 atomic_read(&kvm
->online_vcpus
));
1547 * If the host uses TSC clock, then passthrough TSC as stable
1550 host_tsc_clocksource
= kvm_get_time_and_clockread(
1551 &ka
->master_kernel_ns
,
1552 &ka
->master_cycle_now
);
1554 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
1555 && !backwards_tsc_observed
1556 && !ka
->boot_vcpu_runs_old_kvmclock
;
1558 if (ka
->use_master_clock
)
1559 atomic_set(&kvm_guest_has_master_clock
, 1);
1561 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
1562 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
1567 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
1569 #ifdef CONFIG_X86_64
1571 struct kvm_vcpu
*vcpu
;
1572 struct kvm_arch
*ka
= &kvm
->arch
;
1574 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1575 kvm_make_mclock_inprogress_request(kvm
);
1576 /* no guest entries from this point */
1577 pvclock_update_vm_gtod_copy(kvm
);
1579 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1580 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1582 /* guest entries allowed */
1583 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1584 clear_bit(KVM_REQ_MCLOCK_INPROGRESS
, &vcpu
->requests
);
1586 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1590 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1592 unsigned long flags
, this_tsc_khz
;
1593 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1594 struct kvm_arch
*ka
= &v
->kvm
->arch
;
1596 u64 tsc_timestamp
, host_tsc
;
1597 struct pvclock_vcpu_time_info guest_hv_clock
;
1599 bool use_master_clock
;
1605 * If the host uses TSC clock, then passthrough TSC as stable
1608 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1609 use_master_clock
= ka
->use_master_clock
;
1610 if (use_master_clock
) {
1611 host_tsc
= ka
->master_cycle_now
;
1612 kernel_ns
= ka
->master_kernel_ns
;
1614 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1616 /* Keep irq disabled to prevent changes to the clock */
1617 local_irq_save(flags
);
1618 this_tsc_khz
= __this_cpu_read(cpu_tsc_khz
);
1619 if (unlikely(this_tsc_khz
== 0)) {
1620 local_irq_restore(flags
);
1621 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1624 if (!use_master_clock
) {
1625 host_tsc
= native_read_tsc();
1626 kernel_ns
= get_kernel_ns();
1629 tsc_timestamp
= kvm_x86_ops
->read_l1_tsc(v
, host_tsc
);
1632 * We may have to catch up the TSC to match elapsed wall clock
1633 * time for two reasons, even if kvmclock is used.
1634 * 1) CPU could have been running below the maximum TSC rate
1635 * 2) Broken TSC compensation resets the base at each VCPU
1636 * entry to avoid unknown leaps of TSC even when running
1637 * again on the same CPU. This may cause apparent elapsed
1638 * time to disappear, and the guest to stand still or run
1641 if (vcpu
->tsc_catchup
) {
1642 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1643 if (tsc
> tsc_timestamp
) {
1644 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
1645 tsc_timestamp
= tsc
;
1649 local_irq_restore(flags
);
1651 if (!vcpu
->pv_time_enabled
)
1654 if (unlikely(vcpu
->hw_tsc_khz
!= this_tsc_khz
)) {
1655 kvm_get_time_scale(NSEC_PER_SEC
/ 1000, this_tsc_khz
,
1656 &vcpu
->hv_clock
.tsc_shift
,
1657 &vcpu
->hv_clock
.tsc_to_system_mul
);
1658 vcpu
->hw_tsc_khz
= this_tsc_khz
;
1661 /* With all the info we got, fill in the values */
1662 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
1663 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
1664 vcpu
->last_guest_tsc
= tsc_timestamp
;
1666 if (unlikely(kvm_read_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1667 &guest_hv_clock
, sizeof(guest_hv_clock
))))
1670 /* This VCPU is paused, but it's legal for a guest to read another
1671 * VCPU's kvmclock, so we really have to follow the specification where
1672 * it says that version is odd if data is being modified, and even after
1675 * Version field updates must be kept separate. This is because
1676 * kvm_write_guest_cached might use a "rep movs" instruction, and
1677 * writes within a string instruction are weakly ordered. So there
1678 * are three writes overall.
1680 * As a small optimization, only write the version field in the first
1681 * and third write. The vcpu->pv_time cache is still valid, because the
1682 * version field is the first in the struct.
1684 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info
, version
) != 0);
1686 vcpu
->hv_clock
.version
= guest_hv_clock
.version
+ 1;
1687 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1689 sizeof(vcpu
->hv_clock
.version
));
1693 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1694 pvclock_flags
= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
1696 if (vcpu
->pvclock_set_guest_stopped_request
) {
1697 pvclock_flags
|= PVCLOCK_GUEST_STOPPED
;
1698 vcpu
->pvclock_set_guest_stopped_request
= false;
1701 /* If the host uses TSC clocksource, then it is stable */
1702 if (use_master_clock
)
1703 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
1705 vcpu
->hv_clock
.flags
= pvclock_flags
;
1707 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
1709 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1711 sizeof(vcpu
->hv_clock
));
1715 vcpu
->hv_clock
.version
++;
1716 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1718 sizeof(vcpu
->hv_clock
.version
));
1723 * kvmclock updates which are isolated to a given vcpu, such as
1724 * vcpu->cpu migration, should not allow system_timestamp from
1725 * the rest of the vcpus to remain static. Otherwise ntp frequency
1726 * correction applies to one vcpu's system_timestamp but not
1729 * So in those cases, request a kvmclock update for all vcpus.
1730 * We need to rate-limit these requests though, as they can
1731 * considerably slow guests that have a large number of vcpus.
1732 * The time for a remote vcpu to update its kvmclock is bound
1733 * by the delay we use to rate-limit the updates.
1736 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1738 static void kvmclock_update_fn(struct work_struct
*work
)
1741 struct delayed_work
*dwork
= to_delayed_work(work
);
1742 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1743 kvmclock_update_work
);
1744 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1745 struct kvm_vcpu
*vcpu
;
1747 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
1748 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1749 kvm_vcpu_kick(vcpu
);
1753 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
1755 struct kvm
*kvm
= v
->kvm
;
1757 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1758 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
1759 KVMCLOCK_UPDATE_DELAY
);
1762 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1764 static void kvmclock_sync_fn(struct work_struct
*work
)
1766 struct delayed_work
*dwork
= to_delayed_work(work
);
1767 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1768 kvmclock_sync_work
);
1769 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1771 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
1772 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
1773 KVMCLOCK_SYNC_PERIOD
);
1776 static bool msr_mtrr_valid(unsigned msr
)
1779 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR
- 1:
1780 case MSR_MTRRfix64K_00000
:
1781 case MSR_MTRRfix16K_80000
:
1782 case MSR_MTRRfix16K_A0000
:
1783 case MSR_MTRRfix4K_C0000
:
1784 case MSR_MTRRfix4K_C8000
:
1785 case MSR_MTRRfix4K_D0000
:
1786 case MSR_MTRRfix4K_D8000
:
1787 case MSR_MTRRfix4K_E0000
:
1788 case MSR_MTRRfix4K_E8000
:
1789 case MSR_MTRRfix4K_F0000
:
1790 case MSR_MTRRfix4K_F8000
:
1791 case MSR_MTRRdefType
:
1792 case MSR_IA32_CR_PAT
:
1800 static bool valid_pat_type(unsigned t
)
1802 return t
< 8 && (1 << t
) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1805 static bool valid_mtrr_type(unsigned t
)
1807 return t
< 8 && (1 << t
) & 0x73; /* 0, 1, 4, 5, 6 */
1810 bool kvm_mtrr_valid(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1815 if (!msr_mtrr_valid(msr
))
1818 if (msr
== MSR_IA32_CR_PAT
) {
1819 for (i
= 0; i
< 8; i
++)
1820 if (!valid_pat_type((data
>> (i
* 8)) & 0xff))
1823 } else if (msr
== MSR_MTRRdefType
) {
1826 return valid_mtrr_type(data
& 0xff);
1827 } else if (msr
>= MSR_MTRRfix64K_00000
&& msr
<= MSR_MTRRfix4K_F8000
) {
1828 for (i
= 0; i
< 8 ; i
++)
1829 if (!valid_mtrr_type((data
>> (i
* 8)) & 0xff))
1834 /* variable MTRRs */
1835 WARN_ON(!(msr
>= 0x200 && msr
< 0x200 + 2 * KVM_NR_VAR_MTRR
));
1837 mask
= (~0ULL) << cpuid_maxphyaddr(vcpu
);
1838 if ((msr
& 1) == 0) {
1840 if (!valid_mtrr_type(data
& 0xff))
1847 kvm_inject_gp(vcpu
, 0);
1853 EXPORT_SYMBOL_GPL(kvm_mtrr_valid
);
1855 static int set_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1857 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
1859 if (!kvm_mtrr_valid(vcpu
, msr
, data
))
1862 if (msr
== MSR_MTRRdefType
) {
1863 vcpu
->arch
.mtrr_state
.def_type
= data
;
1864 vcpu
->arch
.mtrr_state
.enabled
= (data
& 0xc00) >> 10;
1865 } else if (msr
== MSR_MTRRfix64K_00000
)
1867 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
1868 p
[1 + msr
- MSR_MTRRfix16K_80000
] = data
;
1869 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
1870 p
[3 + msr
- MSR_MTRRfix4K_C0000
] = data
;
1871 else if (msr
== MSR_IA32_CR_PAT
)
1872 vcpu
->arch
.pat
= data
;
1873 else { /* Variable MTRRs */
1874 int idx
, is_mtrr_mask
;
1877 idx
= (msr
- 0x200) / 2;
1878 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
1881 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
1884 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
1888 kvm_mmu_reset_context(vcpu
);
1892 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1894 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1895 unsigned bank_num
= mcg_cap
& 0xff;
1898 case MSR_IA32_MCG_STATUS
:
1899 vcpu
->arch
.mcg_status
= data
;
1901 case MSR_IA32_MCG_CTL
:
1902 if (!(mcg_cap
& MCG_CTL_P
))
1904 if (data
!= 0 && data
!= ~(u64
)0)
1906 vcpu
->arch
.mcg_ctl
= data
;
1909 if (msr
>= MSR_IA32_MC0_CTL
&&
1910 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
1911 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1912 /* only 0 or all 1s can be written to IA32_MCi_CTL
1913 * some Linux kernels though clear bit 10 in bank 4 to
1914 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1915 * this to avoid an uncatched #GP in the guest
1917 if ((offset
& 0x3) == 0 &&
1918 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
1920 vcpu
->arch
.mce_banks
[offset
] = data
;
1928 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
1930 struct kvm
*kvm
= vcpu
->kvm
;
1931 int lm
= is_long_mode(vcpu
);
1932 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
1933 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
1934 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
1935 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
1936 u32 page_num
= data
& ~PAGE_MASK
;
1937 u64 page_addr
= data
& PAGE_MASK
;
1942 if (page_num
>= blob_size
)
1945 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
1950 if (kvm_write_guest(kvm
, page_addr
, page
, PAGE_SIZE
))
1959 static bool kvm_hv_hypercall_enabled(struct kvm
*kvm
)
1961 return kvm
->arch
.hv_hypercall
& HV_X64_MSR_HYPERCALL_ENABLE
;
1964 static bool kvm_hv_msr_partition_wide(u32 msr
)
1968 case HV_X64_MSR_GUEST_OS_ID
:
1969 case HV_X64_MSR_HYPERCALL
:
1970 case HV_X64_MSR_REFERENCE_TSC
:
1971 case HV_X64_MSR_TIME_REF_COUNT
:
1979 static int set_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1981 struct kvm
*kvm
= vcpu
->kvm
;
1984 case HV_X64_MSR_GUEST_OS_ID
:
1985 kvm
->arch
.hv_guest_os_id
= data
;
1986 /* setting guest os id to zero disables hypercall page */
1987 if (!kvm
->arch
.hv_guest_os_id
)
1988 kvm
->arch
.hv_hypercall
&= ~HV_X64_MSR_HYPERCALL_ENABLE
;
1990 case HV_X64_MSR_HYPERCALL
: {
1995 /* if guest os id is not set hypercall should remain disabled */
1996 if (!kvm
->arch
.hv_guest_os_id
)
1998 if (!(data
& HV_X64_MSR_HYPERCALL_ENABLE
)) {
1999 kvm
->arch
.hv_hypercall
= data
;
2002 gfn
= data
>> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT
;
2003 addr
= gfn_to_hva(kvm
, gfn
);
2004 if (kvm_is_error_hva(addr
))
2006 kvm_x86_ops
->patch_hypercall(vcpu
, instructions
);
2007 ((unsigned char *)instructions
)[3] = 0xc3; /* ret */
2008 if (__copy_to_user((void __user
*)addr
, instructions
, 4))
2010 kvm
->arch
.hv_hypercall
= data
;
2011 mark_page_dirty(kvm
, gfn
);
2014 case HV_X64_MSR_REFERENCE_TSC
: {
2016 HV_REFERENCE_TSC_PAGE tsc_ref
;
2017 memset(&tsc_ref
, 0, sizeof(tsc_ref
));
2018 kvm
->arch
.hv_tsc_page
= data
;
2019 if (!(data
& HV_X64_MSR_TSC_REFERENCE_ENABLE
))
2021 gfn
= data
>> HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT
;
2022 if (kvm_write_guest(kvm
, gfn
<< HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT
,
2023 &tsc_ref
, sizeof(tsc_ref
)))
2025 mark_page_dirty(kvm
, gfn
);
2029 vcpu_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
2030 "data 0x%llx\n", msr
, data
);
2036 static int set_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
2039 case HV_X64_MSR_APIC_ASSIST_PAGE
: {
2043 if (!(data
& HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE
)) {
2044 vcpu
->arch
.hv_vapic
= data
;
2045 if (kvm_lapic_enable_pv_eoi(vcpu
, 0))
2049 gfn
= data
>> HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT
;
2050 addr
= gfn_to_hva(vcpu
->kvm
, gfn
);
2051 if (kvm_is_error_hva(addr
))
2053 if (__clear_user((void __user
*)addr
, PAGE_SIZE
))
2055 vcpu
->arch
.hv_vapic
= data
;
2056 mark_page_dirty(vcpu
->kvm
, gfn
);
2057 if (kvm_lapic_enable_pv_eoi(vcpu
, gfn_to_gpa(gfn
) | KVM_MSR_ENABLED
))
2061 case HV_X64_MSR_EOI
:
2062 return kvm_hv_vapic_msr_write(vcpu
, APIC_EOI
, data
);
2063 case HV_X64_MSR_ICR
:
2064 return kvm_hv_vapic_msr_write(vcpu
, APIC_ICR
, data
);
2065 case HV_X64_MSR_TPR
:
2066 return kvm_hv_vapic_msr_write(vcpu
, APIC_TASKPRI
, data
);
2068 vcpu_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
2069 "data 0x%llx\n", msr
, data
);
2076 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
2078 gpa_t gpa
= data
& ~0x3f;
2080 /* Bits 2:5 are reserved, Should be zero */
2084 vcpu
->arch
.apf
.msr_val
= data
;
2086 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
2087 kvm_clear_async_pf_completion_queue(vcpu
);
2088 kvm_async_pf_hash_reset(vcpu
);
2092 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
2096 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
2097 kvm_async_pf_wakeup_all(vcpu
);
2101 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
2103 vcpu
->arch
.pv_time_enabled
= false;
2106 static void accumulate_steal_time(struct kvm_vcpu
*vcpu
)
2110 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2113 delta
= current
->sched_info
.run_delay
- vcpu
->arch
.st
.last_steal
;
2114 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2115 vcpu
->arch
.st
.accum_steal
= delta
;
2118 static void record_steal_time(struct kvm_vcpu
*vcpu
)
2120 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2123 if (unlikely(kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2124 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
))))
2127 vcpu
->arch
.st
.steal
.steal
+= vcpu
->arch
.st
.accum_steal
;
2128 vcpu
->arch
.st
.steal
.version
+= 2;
2129 vcpu
->arch
.st
.accum_steal
= 0;
2131 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2132 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2135 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2138 u32 msr
= msr_info
->index
;
2139 u64 data
= msr_info
->data
;
2142 case MSR_AMD64_NB_CFG
:
2143 case MSR_IA32_UCODE_REV
:
2144 case MSR_IA32_UCODE_WRITE
:
2145 case MSR_VM_HSAVE_PA
:
2146 case MSR_AMD64_PATCH_LOADER
:
2147 case MSR_AMD64_BU_CFG2
:
2151 return set_efer(vcpu
, data
);
2153 data
&= ~(u64
)0x40; /* ignore flush filter disable */
2154 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
2155 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
2156 data
&= ~(u64
)0x40000; /* ignore Mc status write enable */
2158 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
2163 case MSR_FAM10H_MMIO_CONF_BASE
:
2165 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
2170 case MSR_IA32_DEBUGCTLMSR
:
2172 /* We support the non-activated case already */
2174 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
2175 /* Values other than LBR and BTF are vendor-specific,
2176 thus reserved and should throw a #GP */
2179 vcpu_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2182 case 0x200 ... 0x2ff:
2183 return set_msr_mtrr(vcpu
, msr
, data
);
2184 case MSR_IA32_APICBASE
:
2185 return kvm_set_apic_base(vcpu
, msr_info
);
2186 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2187 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
2188 case MSR_IA32_TSCDEADLINE
:
2189 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
2191 case MSR_IA32_TSC_ADJUST
:
2192 if (guest_cpuid_has_tsc_adjust(vcpu
)) {
2193 if (!msr_info
->host_initiated
) {
2194 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
2195 kvm_x86_ops
->adjust_tsc_offset(vcpu
, adj
, true);
2197 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
2200 case MSR_IA32_MISC_ENABLE
:
2201 vcpu
->arch
.ia32_misc_enable_msr
= data
;
2203 case MSR_KVM_WALL_CLOCK_NEW
:
2204 case MSR_KVM_WALL_CLOCK
:
2205 vcpu
->kvm
->arch
.wall_clock
= data
;
2206 kvm_write_wall_clock(vcpu
->kvm
, data
);
2208 case MSR_KVM_SYSTEM_TIME_NEW
:
2209 case MSR_KVM_SYSTEM_TIME
: {
2211 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2213 kvmclock_reset(vcpu
);
2215 if (vcpu
->vcpu_id
== 0 && !msr_info
->host_initiated
) {
2216 bool tmp
= (msr
== MSR_KVM_SYSTEM_TIME
);
2218 if (ka
->boot_vcpu_runs_old_kvmclock
!= tmp
)
2219 set_bit(KVM_REQ_MASTERCLOCK_UPDATE
,
2222 ka
->boot_vcpu_runs_old_kvmclock
= tmp
;
2225 vcpu
->arch
.time
= data
;
2226 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2228 /* we verify if the enable bit is set... */
2232 gpa_offset
= data
& ~(PAGE_MASK
| 1);
2234 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2235 &vcpu
->arch
.pv_time
, data
& ~1ULL,
2236 sizeof(struct pvclock_vcpu_time_info
)))
2237 vcpu
->arch
.pv_time_enabled
= false;
2239 vcpu
->arch
.pv_time_enabled
= true;
2243 case MSR_KVM_ASYNC_PF_EN
:
2244 if (kvm_pv_enable_async_pf(vcpu
, data
))
2247 case MSR_KVM_STEAL_TIME
:
2249 if (unlikely(!sched_info_on()))
2252 if (data
& KVM_STEAL_RESERVED_MASK
)
2255 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2256 data
& KVM_STEAL_VALID_BITS
,
2257 sizeof(struct kvm_steal_time
)))
2260 vcpu
->arch
.st
.msr_val
= data
;
2262 if (!(data
& KVM_MSR_ENABLED
))
2265 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2268 accumulate_steal_time(vcpu
);
2271 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2274 case MSR_KVM_PV_EOI_EN
:
2275 if (kvm_lapic_enable_pv_eoi(vcpu
, data
))
2279 case MSR_IA32_MCG_CTL
:
2280 case MSR_IA32_MCG_STATUS
:
2281 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2282 return set_msr_mce(vcpu
, msr
, data
);
2284 /* Performance counters are not protected by a CPUID bit,
2285 * so we should check all of them in the generic path for the sake of
2286 * cross vendor migration.
2287 * Writing a zero into the event select MSRs disables them,
2288 * which we perfectly emulate ;-). Any other value should be at least
2289 * reported, some guests depend on them.
2291 case MSR_K7_EVNTSEL0
:
2292 case MSR_K7_EVNTSEL1
:
2293 case MSR_K7_EVNTSEL2
:
2294 case MSR_K7_EVNTSEL3
:
2296 vcpu_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
2297 "0x%x data 0x%llx\n", msr
, data
);
2299 /* at least RHEL 4 unconditionally writes to the perfctr registers,
2300 * so we ignore writes to make it happy.
2302 case MSR_K7_PERFCTR0
:
2303 case MSR_K7_PERFCTR1
:
2304 case MSR_K7_PERFCTR2
:
2305 case MSR_K7_PERFCTR3
:
2306 vcpu_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
2307 "0x%x data 0x%llx\n", msr
, data
);
2309 case MSR_P6_PERFCTR0
:
2310 case MSR_P6_PERFCTR1
:
2312 case MSR_P6_EVNTSEL0
:
2313 case MSR_P6_EVNTSEL1
:
2314 if (kvm_pmu_msr(vcpu
, msr
))
2315 return kvm_pmu_set_msr(vcpu
, msr_info
);
2317 if (pr
|| data
!= 0)
2318 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
2319 "0x%x data 0x%llx\n", msr
, data
);
2321 case MSR_K7_CLK_CTL
:
2323 * Ignore all writes to this no longer documented MSR.
2324 * Writes are only relevant for old K7 processors,
2325 * all pre-dating SVM, but a recommended workaround from
2326 * AMD for these chips. It is possible to specify the
2327 * affected processor models on the command line, hence
2328 * the need to ignore the workaround.
2331 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2332 if (kvm_hv_msr_partition_wide(msr
)) {
2334 mutex_lock(&vcpu
->kvm
->lock
);
2335 r
= set_msr_hyperv_pw(vcpu
, msr
, data
);
2336 mutex_unlock(&vcpu
->kvm
->lock
);
2339 return set_msr_hyperv(vcpu
, msr
, data
);
2341 case MSR_IA32_BBL_CR_CTL3
:
2342 /* Drop writes to this legacy MSR -- see rdmsr
2343 * counterpart for further detail.
2345 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n", msr
, data
);
2347 case MSR_AMD64_OSVW_ID_LENGTH
:
2348 if (!guest_cpuid_has_osvw(vcpu
))
2350 vcpu
->arch
.osvw
.length
= data
;
2352 case MSR_AMD64_OSVW_STATUS
:
2353 if (!guest_cpuid_has_osvw(vcpu
))
2355 vcpu
->arch
.osvw
.status
= data
;
2358 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
2359 return xen_hvm_config(vcpu
, data
);
2360 if (kvm_pmu_msr(vcpu
, msr
))
2361 return kvm_pmu_set_msr(vcpu
, msr_info
);
2363 vcpu_unimpl(vcpu
, "unhandled wrmsr: 0x%x data %llx\n",
2367 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n",
2374 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
2378 * Reads an msr value (of 'msr_index') into 'pdata'.
2379 * Returns 0 on success, non-0 otherwise.
2380 * Assumes vcpu_load() was already called.
2382 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
2384 return kvm_x86_ops
->get_msr(vcpu
, msr_index
, pdata
);
2386 EXPORT_SYMBOL_GPL(kvm_get_msr
);
2388 static int get_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2390 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
2392 if (!msr_mtrr_valid(msr
))
2395 if (msr
== MSR_MTRRdefType
)
2396 *pdata
= vcpu
->arch
.mtrr_state
.def_type
+
2397 (vcpu
->arch
.mtrr_state
.enabled
<< 10);
2398 else if (msr
== MSR_MTRRfix64K_00000
)
2400 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
2401 *pdata
= p
[1 + msr
- MSR_MTRRfix16K_80000
];
2402 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
2403 *pdata
= p
[3 + msr
- MSR_MTRRfix4K_C0000
];
2404 else if (msr
== MSR_IA32_CR_PAT
)
2405 *pdata
= vcpu
->arch
.pat
;
2406 else { /* Variable MTRRs */
2407 int idx
, is_mtrr_mask
;
2410 idx
= (msr
- 0x200) / 2;
2411 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
2414 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
2417 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
2424 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2427 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2428 unsigned bank_num
= mcg_cap
& 0xff;
2431 case MSR_IA32_P5_MC_ADDR
:
2432 case MSR_IA32_P5_MC_TYPE
:
2435 case MSR_IA32_MCG_CAP
:
2436 data
= vcpu
->arch
.mcg_cap
;
2438 case MSR_IA32_MCG_CTL
:
2439 if (!(mcg_cap
& MCG_CTL_P
))
2441 data
= vcpu
->arch
.mcg_ctl
;
2443 case MSR_IA32_MCG_STATUS
:
2444 data
= vcpu
->arch
.mcg_status
;
2447 if (msr
>= MSR_IA32_MC0_CTL
&&
2448 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2449 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2450 data
= vcpu
->arch
.mce_banks
[offset
];
2459 static int get_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2462 struct kvm
*kvm
= vcpu
->kvm
;
2465 case HV_X64_MSR_GUEST_OS_ID
:
2466 data
= kvm
->arch
.hv_guest_os_id
;
2468 case HV_X64_MSR_HYPERCALL
:
2469 data
= kvm
->arch
.hv_hypercall
;
2471 case HV_X64_MSR_TIME_REF_COUNT
: {
2473 div_u64(get_kernel_ns() + kvm
->arch
.kvmclock_offset
, 100);
2476 case HV_X64_MSR_REFERENCE_TSC
:
2477 data
= kvm
->arch
.hv_tsc_page
;
2480 vcpu_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
2488 static int get_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2493 case HV_X64_MSR_VP_INDEX
: {
2496 kvm_for_each_vcpu(r
, v
, vcpu
->kvm
) {
2504 case HV_X64_MSR_EOI
:
2505 return kvm_hv_vapic_msr_read(vcpu
, APIC_EOI
, pdata
);
2506 case HV_X64_MSR_ICR
:
2507 return kvm_hv_vapic_msr_read(vcpu
, APIC_ICR
, pdata
);
2508 case HV_X64_MSR_TPR
:
2509 return kvm_hv_vapic_msr_read(vcpu
, APIC_TASKPRI
, pdata
);
2510 case HV_X64_MSR_APIC_ASSIST_PAGE
:
2511 data
= vcpu
->arch
.hv_vapic
;
2514 vcpu_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
2521 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2526 case MSR_IA32_PLATFORM_ID
:
2527 case MSR_IA32_EBL_CR_POWERON
:
2528 case MSR_IA32_DEBUGCTLMSR
:
2529 case MSR_IA32_LASTBRANCHFROMIP
:
2530 case MSR_IA32_LASTBRANCHTOIP
:
2531 case MSR_IA32_LASTINTFROMIP
:
2532 case MSR_IA32_LASTINTTOIP
:
2535 case MSR_VM_HSAVE_PA
:
2536 case MSR_K7_EVNTSEL0
:
2537 case MSR_K7_EVNTSEL1
:
2538 case MSR_K7_EVNTSEL2
:
2539 case MSR_K7_EVNTSEL3
:
2540 case MSR_K7_PERFCTR0
:
2541 case MSR_K7_PERFCTR1
:
2542 case MSR_K7_PERFCTR2
:
2543 case MSR_K7_PERFCTR3
:
2544 case MSR_K8_INT_PENDING_MSG
:
2545 case MSR_AMD64_NB_CFG
:
2546 case MSR_FAM10H_MMIO_CONF_BASE
:
2547 case MSR_AMD64_BU_CFG2
:
2550 case MSR_P6_PERFCTR0
:
2551 case MSR_P6_PERFCTR1
:
2552 case MSR_P6_EVNTSEL0
:
2553 case MSR_P6_EVNTSEL1
:
2554 if (kvm_pmu_msr(vcpu
, msr
))
2555 return kvm_pmu_get_msr(vcpu
, msr
, pdata
);
2558 case MSR_IA32_UCODE_REV
:
2559 data
= 0x100000000ULL
;
2562 data
= 0x500 | KVM_NR_VAR_MTRR
;
2564 case 0x200 ... 0x2ff:
2565 return get_msr_mtrr(vcpu
, msr
, pdata
);
2566 case 0xcd: /* fsb frequency */
2570 * MSR_EBC_FREQUENCY_ID
2571 * Conservative value valid for even the basic CPU models.
2572 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2573 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2574 * and 266MHz for model 3, or 4. Set Core Clock
2575 * Frequency to System Bus Frequency Ratio to 1 (bits
2576 * 31:24) even though these are only valid for CPU
2577 * models > 2, however guests may end up dividing or
2578 * multiplying by zero otherwise.
2580 case MSR_EBC_FREQUENCY_ID
:
2583 case MSR_IA32_APICBASE
:
2584 data
= kvm_get_apic_base(vcpu
);
2586 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2587 return kvm_x2apic_msr_read(vcpu
, msr
, pdata
);
2589 case MSR_IA32_TSCDEADLINE
:
2590 data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
2592 case MSR_IA32_TSC_ADJUST
:
2593 data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
2595 case MSR_IA32_MISC_ENABLE
:
2596 data
= vcpu
->arch
.ia32_misc_enable_msr
;
2598 case MSR_IA32_PERF_STATUS
:
2599 /* TSC increment by tick */
2601 /* CPU multiplier */
2602 data
|= (((uint64_t)4ULL) << 40);
2605 data
= vcpu
->arch
.efer
;
2607 case MSR_KVM_WALL_CLOCK
:
2608 case MSR_KVM_WALL_CLOCK_NEW
:
2609 data
= vcpu
->kvm
->arch
.wall_clock
;
2611 case MSR_KVM_SYSTEM_TIME
:
2612 case MSR_KVM_SYSTEM_TIME_NEW
:
2613 data
= vcpu
->arch
.time
;
2615 case MSR_KVM_ASYNC_PF_EN
:
2616 data
= vcpu
->arch
.apf
.msr_val
;
2618 case MSR_KVM_STEAL_TIME
:
2619 data
= vcpu
->arch
.st
.msr_val
;
2621 case MSR_KVM_PV_EOI_EN
:
2622 data
= vcpu
->arch
.pv_eoi
.msr_val
;
2624 case MSR_IA32_P5_MC_ADDR
:
2625 case MSR_IA32_P5_MC_TYPE
:
2626 case MSR_IA32_MCG_CAP
:
2627 case MSR_IA32_MCG_CTL
:
2628 case MSR_IA32_MCG_STATUS
:
2629 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2630 return get_msr_mce(vcpu
, msr
, pdata
);
2631 case MSR_K7_CLK_CTL
:
2633 * Provide expected ramp-up count for K7. All other
2634 * are set to zero, indicating minimum divisors for
2637 * This prevents guest kernels on AMD host with CPU
2638 * type 6, model 8 and higher from exploding due to
2639 * the rdmsr failing.
2643 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2644 if (kvm_hv_msr_partition_wide(msr
)) {
2646 mutex_lock(&vcpu
->kvm
->lock
);
2647 r
= get_msr_hyperv_pw(vcpu
, msr
, pdata
);
2648 mutex_unlock(&vcpu
->kvm
->lock
);
2651 return get_msr_hyperv(vcpu
, msr
, pdata
);
2653 case MSR_IA32_BBL_CR_CTL3
:
2654 /* This legacy MSR exists but isn't fully documented in current
2655 * silicon. It is however accessed by winxp in very narrow
2656 * scenarios where it sets bit #19, itself documented as
2657 * a "reserved" bit. Best effort attempt to source coherent
2658 * read data here should the balance of the register be
2659 * interpreted by the guest:
2661 * L2 cache control register 3: 64GB range, 256KB size,
2662 * enabled, latency 0x1, configured
2666 case MSR_AMD64_OSVW_ID_LENGTH
:
2667 if (!guest_cpuid_has_osvw(vcpu
))
2669 data
= vcpu
->arch
.osvw
.length
;
2671 case MSR_AMD64_OSVW_STATUS
:
2672 if (!guest_cpuid_has_osvw(vcpu
))
2674 data
= vcpu
->arch
.osvw
.status
;
2677 if (kvm_pmu_msr(vcpu
, msr
))
2678 return kvm_pmu_get_msr(vcpu
, msr
, pdata
);
2680 vcpu_unimpl(vcpu
, "unhandled rdmsr: 0x%x\n", msr
);
2683 vcpu_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr
);
2691 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
2694 * Read or write a bunch of msrs. All parameters are kernel addresses.
2696 * @return number of msrs set successfully.
2698 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
2699 struct kvm_msr_entry
*entries
,
2700 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2701 unsigned index
, u64
*data
))
2705 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2706 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
2707 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
2709 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2715 * Read or write a bunch of msrs. Parameters are user addresses.
2717 * @return number of msrs set successfully.
2719 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
2720 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2721 unsigned index
, u64
*data
),
2724 struct kvm_msrs msrs
;
2725 struct kvm_msr_entry
*entries
;
2730 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
2734 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
2737 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
2738 entries
= memdup_user(user_msrs
->entries
, size
);
2739 if (IS_ERR(entries
)) {
2740 r
= PTR_ERR(entries
);
2744 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
2749 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
2760 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
2765 case KVM_CAP_IRQCHIP
:
2767 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
2768 case KVM_CAP_SET_TSS_ADDR
:
2769 case KVM_CAP_EXT_CPUID
:
2770 case KVM_CAP_EXT_EMUL_CPUID
:
2771 case KVM_CAP_CLOCKSOURCE
:
2773 case KVM_CAP_NOP_IO_DELAY
:
2774 case KVM_CAP_MP_STATE
:
2775 case KVM_CAP_SYNC_MMU
:
2776 case KVM_CAP_USER_NMI
:
2777 case KVM_CAP_REINJECT_CONTROL
:
2778 case KVM_CAP_IRQ_INJECT_STATUS
:
2779 case KVM_CAP_IOEVENTFD
:
2780 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
2782 case KVM_CAP_PIT_STATE2
:
2783 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
2784 case KVM_CAP_XEN_HVM
:
2785 case KVM_CAP_ADJUST_CLOCK
:
2786 case KVM_CAP_VCPU_EVENTS
:
2787 case KVM_CAP_HYPERV
:
2788 case KVM_CAP_HYPERV_VAPIC
:
2789 case KVM_CAP_HYPERV_SPIN
:
2790 case KVM_CAP_PCI_SEGMENT
:
2791 case KVM_CAP_DEBUGREGS
:
2792 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
2794 case KVM_CAP_ASYNC_PF
:
2795 case KVM_CAP_GET_TSC_KHZ
:
2796 case KVM_CAP_KVMCLOCK_CTRL
:
2797 case KVM_CAP_READONLY_MEM
:
2798 case KVM_CAP_HYPERV_TIME
:
2799 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
2800 case KVM_CAP_TSC_DEADLINE_TIMER
:
2801 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2802 case KVM_CAP_ASSIGN_DEV_IRQ
:
2803 case KVM_CAP_PCI_2_3
:
2807 case KVM_CAP_COALESCED_MMIO
:
2808 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
2811 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
2813 case KVM_CAP_NR_VCPUS
:
2814 r
= KVM_SOFT_MAX_VCPUS
;
2816 case KVM_CAP_MAX_VCPUS
:
2819 case KVM_CAP_NR_MEMSLOTS
:
2820 r
= KVM_USER_MEM_SLOTS
;
2822 case KVM_CAP_PV_MMU
: /* obsolete */
2825 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2827 r
= iommu_present(&pci_bus_type
);
2831 r
= KVM_MAX_MCE_BANKS
;
2836 case KVM_CAP_TSC_CONTROL
:
2837 r
= kvm_has_tsc_control
;
2847 long kvm_arch_dev_ioctl(struct file
*filp
,
2848 unsigned int ioctl
, unsigned long arg
)
2850 void __user
*argp
= (void __user
*)arg
;
2854 case KVM_GET_MSR_INDEX_LIST
: {
2855 struct kvm_msr_list __user
*user_msr_list
= argp
;
2856 struct kvm_msr_list msr_list
;
2860 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2863 msr_list
.nmsrs
= num_msrs_to_save
+ ARRAY_SIZE(emulated_msrs
);
2864 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2867 if (n
< msr_list
.nmsrs
)
2870 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2871 num_msrs_to_save
* sizeof(u32
)))
2873 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2875 ARRAY_SIZE(emulated_msrs
) * sizeof(u32
)))
2880 case KVM_GET_SUPPORTED_CPUID
:
2881 case KVM_GET_EMULATED_CPUID
: {
2882 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2883 struct kvm_cpuid2 cpuid
;
2886 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2889 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
2895 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2900 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2903 mce_cap
= KVM_MCE_CAP_SUPPORTED
;
2905 if (copy_to_user(argp
, &mce_cap
, sizeof mce_cap
))
2917 static void wbinvd_ipi(void *garbage
)
2922 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2924 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
2927 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2929 /* Address WBINVD may be executed by guest */
2930 if (need_emulate_wbinvd(vcpu
)) {
2931 if (kvm_x86_ops
->has_wbinvd_exit())
2932 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2933 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2934 smp_call_function_single(vcpu
->cpu
,
2935 wbinvd_ipi
, NULL
, 1);
2938 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2940 /* Apply any externally detected TSC adjustments (due to suspend) */
2941 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
2942 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
2943 vcpu
->arch
.tsc_offset_adjustment
= 0;
2944 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2947 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2948 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
2949 native_read_tsc() - vcpu
->arch
.last_host_tsc
;
2951 mark_tsc_unstable("KVM discovered backwards TSC");
2952 if (check_tsc_unstable()) {
2953 u64 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
,
2954 vcpu
->arch
.last_guest_tsc
);
2955 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
2956 vcpu
->arch
.tsc_catchup
= 1;
2959 * On a host with synchronized TSC, there is no need to update
2960 * kvmclock on vcpu->cpu migration
2962 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
2963 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2964 if (vcpu
->cpu
!= cpu
)
2965 kvm_migrate_timers(vcpu
);
2969 accumulate_steal_time(vcpu
);
2970 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2973 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
2975 kvm_x86_ops
->vcpu_put(vcpu
);
2976 kvm_put_guest_fpu(vcpu
);
2977 vcpu
->arch
.last_host_tsc
= native_read_tsc();
2980 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
2981 struct kvm_lapic_state
*s
)
2983 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
2984 memcpy(s
->regs
, vcpu
->arch
.apic
->regs
, sizeof *s
);
2989 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
2990 struct kvm_lapic_state
*s
)
2992 kvm_apic_post_state_restore(vcpu
, s
);
2993 update_cr8_intercept(vcpu
);
2998 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
2999 struct kvm_interrupt
*irq
)
3001 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
3003 if (irqchip_in_kernel(vcpu
->kvm
))
3006 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
3007 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3012 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
3014 kvm_inject_nmi(vcpu
);
3019 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
3020 struct kvm_tpr_access_ctl
*tac
)
3024 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
3028 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
3032 unsigned bank_num
= mcg_cap
& 0xff, bank
;
3035 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
3037 if (mcg_cap
& ~(KVM_MCE_CAP_SUPPORTED
| 0xff | 0xff0000))
3040 vcpu
->arch
.mcg_cap
= mcg_cap
;
3041 /* Init IA32_MCG_CTL to all 1s */
3042 if (mcg_cap
& MCG_CTL_P
)
3043 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
3044 /* Init IA32_MCi_CTL to all 1s */
3045 for (bank
= 0; bank
< bank_num
; bank
++)
3046 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
3051 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
3052 struct kvm_x86_mce
*mce
)
3054 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
3055 unsigned bank_num
= mcg_cap
& 0xff;
3056 u64
*banks
= vcpu
->arch
.mce_banks
;
3058 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
3061 * if IA32_MCG_CTL is not all 1s, the uncorrected error
3062 * reporting is disabled
3064 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
3065 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
3067 banks
+= 4 * mce
->bank
;
3069 * if IA32_MCi_CTL is not all 1s, the uncorrected error
3070 * reporting is disabled for the bank
3072 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
3074 if (mce
->status
& MCI_STATUS_UC
) {
3075 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
3076 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
3077 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
3080 if (banks
[1] & MCI_STATUS_VAL
)
3081 mce
->status
|= MCI_STATUS_OVER
;
3082 banks
[2] = mce
->addr
;
3083 banks
[3] = mce
->misc
;
3084 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
3085 banks
[1] = mce
->status
;
3086 kvm_queue_exception(vcpu
, MC_VECTOR
);
3087 } else if (!(banks
[1] & MCI_STATUS_VAL
)
3088 || !(banks
[1] & MCI_STATUS_UC
)) {
3089 if (banks
[1] & MCI_STATUS_VAL
)
3090 mce
->status
|= MCI_STATUS_OVER
;
3091 banks
[2] = mce
->addr
;
3092 banks
[3] = mce
->misc
;
3093 banks
[1] = mce
->status
;
3095 banks
[1] |= MCI_STATUS_OVER
;
3099 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
3100 struct kvm_vcpu_events
*events
)
3103 events
->exception
.injected
=
3104 vcpu
->arch
.exception
.pending
&&
3105 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
3106 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
3107 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
3108 events
->exception
.pad
= 0;
3109 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
3111 events
->interrupt
.injected
=
3112 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
3113 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
3114 events
->interrupt
.soft
= 0;
3115 events
->interrupt
.shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
3117 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
3118 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
3119 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
3120 events
->nmi
.pad
= 0;
3122 events
->sipi_vector
= 0; /* never valid when reporting to user space */
3124 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
3125 | KVM_VCPUEVENT_VALID_SHADOW
);
3126 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
3129 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
3130 struct kvm_vcpu_events
*events
)
3132 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3133 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3134 | KVM_VCPUEVENT_VALID_SHADOW
))
3138 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
3139 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
3140 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
3141 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
3143 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
3144 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
3145 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
3146 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
3147 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
3148 events
->interrupt
.shadow
);
3150 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
3151 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
3152 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
3153 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
3155 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
3156 kvm_vcpu_has_lapic(vcpu
))
3157 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
3159 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3164 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
3165 struct kvm_debugregs
*dbgregs
)
3169 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
3170 kvm_get_dr(vcpu
, 6, &val
);
3172 dbgregs
->dr7
= vcpu
->arch
.dr7
;
3174 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
3177 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
3178 struct kvm_debugregs
*dbgregs
)
3183 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
3184 kvm_update_dr0123(vcpu
);
3185 vcpu
->arch
.dr6
= dbgregs
->dr6
;
3186 kvm_update_dr6(vcpu
);
3187 vcpu
->arch
.dr7
= dbgregs
->dr7
;
3188 kvm_update_dr7(vcpu
);
3193 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3195 static void fill_xsave(u8
*dest
, struct kvm_vcpu
*vcpu
)
3197 struct xsave_struct
*xsave
= &vcpu
->arch
.guest_fpu
.state
->xsave
;
3198 u64 xstate_bv
= xsave
->xsave_hdr
.xstate_bv
;
3202 * Copy legacy XSAVE area, to avoid complications with CPUID
3203 * leaves 0 and 1 in the loop below.
3205 memcpy(dest
, xsave
, XSAVE_HDR_OFFSET
);
3208 *(u64
*)(dest
+ XSAVE_HDR_OFFSET
) = xstate_bv
;
3211 * Copy each region from the possibly compacted offset to the
3212 * non-compacted offset.
3214 valid
= xstate_bv
& ~XSTATE_FPSSE
;
3216 u64 feature
= valid
& -valid
;
3217 int index
= fls64(feature
) - 1;
3218 void *src
= get_xsave_addr(xsave
, feature
);
3221 u32 size
, offset
, ecx
, edx
;
3222 cpuid_count(XSTATE_CPUID
, index
,
3223 &size
, &offset
, &ecx
, &edx
);
3224 memcpy(dest
+ offset
, src
, size
);
3231 static void load_xsave(struct kvm_vcpu
*vcpu
, u8
*src
)
3233 struct xsave_struct
*xsave
= &vcpu
->arch
.guest_fpu
.state
->xsave
;
3234 u64 xstate_bv
= *(u64
*)(src
+ XSAVE_HDR_OFFSET
);
3238 * Copy legacy XSAVE area, to avoid complications with CPUID
3239 * leaves 0 and 1 in the loop below.
3241 memcpy(xsave
, src
, XSAVE_HDR_OFFSET
);
3243 /* Set XSTATE_BV and possibly XCOMP_BV. */
3244 xsave
->xsave_hdr
.xstate_bv
= xstate_bv
;
3246 xsave
->xsave_hdr
.xcomp_bv
= host_xcr0
| XSTATE_COMPACTION_ENABLED
;
3249 * Copy each region from the non-compacted offset to the
3250 * possibly compacted offset.
3252 valid
= xstate_bv
& ~XSTATE_FPSSE
;
3254 u64 feature
= valid
& -valid
;
3255 int index
= fls64(feature
) - 1;
3256 void *dest
= get_xsave_addr(xsave
, feature
);
3259 u32 size
, offset
, ecx
, edx
;
3260 cpuid_count(XSTATE_CPUID
, index
,
3261 &size
, &offset
, &ecx
, &edx
);
3262 memcpy(dest
, src
+ offset
, size
);
3270 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
3271 struct kvm_xsave
*guest_xsave
)
3273 if (cpu_has_xsave
) {
3274 memset(guest_xsave
, 0, sizeof(struct kvm_xsave
));
3275 fill_xsave((u8
*) guest_xsave
->region
, vcpu
);
3277 memcpy(guest_xsave
->region
,
3278 &vcpu
->arch
.guest_fpu
.state
->fxsave
,
3279 sizeof(struct i387_fxsave_struct
));
3280 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
3285 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
3286 struct kvm_xsave
*guest_xsave
)
3289 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
3291 if (cpu_has_xsave
) {
3293 * Here we allow setting states that are not present in
3294 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3295 * with old userspace.
3297 if (xstate_bv
& ~kvm_supported_xcr0())
3299 load_xsave(vcpu
, (u8
*)guest_xsave
->region
);
3301 if (xstate_bv
& ~XSTATE_FPSSE
)
3303 memcpy(&vcpu
->arch
.guest_fpu
.state
->fxsave
,
3304 guest_xsave
->region
, sizeof(struct i387_fxsave_struct
));
3309 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
3310 struct kvm_xcrs
*guest_xcrs
)
3312 if (!cpu_has_xsave
) {
3313 guest_xcrs
->nr_xcrs
= 0;
3317 guest_xcrs
->nr_xcrs
= 1;
3318 guest_xcrs
->flags
= 0;
3319 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
3320 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
3323 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
3324 struct kvm_xcrs
*guest_xcrs
)
3331 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
3334 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
3335 /* Only support XCR0 currently */
3336 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
3337 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
3338 guest_xcrs
->xcrs
[i
].value
);
3347 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3348 * stopped by the hypervisor. This function will be called from the host only.
3349 * EINVAL is returned when the host attempts to set the flag for a guest that
3350 * does not support pv clocks.
3352 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
3354 if (!vcpu
->arch
.pv_time_enabled
)
3356 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
3357 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3361 long kvm_arch_vcpu_ioctl(struct file
*filp
,
3362 unsigned int ioctl
, unsigned long arg
)
3364 struct kvm_vcpu
*vcpu
= filp
->private_data
;
3365 void __user
*argp
= (void __user
*)arg
;
3368 struct kvm_lapic_state
*lapic
;
3369 struct kvm_xsave
*xsave
;
3370 struct kvm_xcrs
*xcrs
;
3376 case KVM_GET_LAPIC
: {
3378 if (!vcpu
->arch
.apic
)
3380 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
3385 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
3389 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
3394 case KVM_SET_LAPIC
: {
3396 if (!vcpu
->arch
.apic
)
3398 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
3399 if (IS_ERR(u
.lapic
))
3400 return PTR_ERR(u
.lapic
);
3402 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
3405 case KVM_INTERRUPT
: {
3406 struct kvm_interrupt irq
;
3409 if (copy_from_user(&irq
, argp
, sizeof irq
))
3411 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
3415 r
= kvm_vcpu_ioctl_nmi(vcpu
);
3418 case KVM_SET_CPUID
: {
3419 struct kvm_cpuid __user
*cpuid_arg
= argp
;
3420 struct kvm_cpuid cpuid
;
3423 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3425 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
3428 case KVM_SET_CPUID2
: {
3429 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3430 struct kvm_cpuid2 cpuid
;
3433 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3435 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
3436 cpuid_arg
->entries
);
3439 case KVM_GET_CPUID2
: {
3440 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3441 struct kvm_cpuid2 cpuid
;
3444 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3446 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
3447 cpuid_arg
->entries
);
3451 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
3457 r
= msr_io(vcpu
, argp
, kvm_get_msr
, 1);
3460 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
3462 case KVM_TPR_ACCESS_REPORTING
: {
3463 struct kvm_tpr_access_ctl tac
;
3466 if (copy_from_user(&tac
, argp
, sizeof tac
))
3468 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
3472 if (copy_to_user(argp
, &tac
, sizeof tac
))
3477 case KVM_SET_VAPIC_ADDR
: {
3478 struct kvm_vapic_addr va
;
3481 if (!irqchip_in_kernel(vcpu
->kvm
))
3484 if (copy_from_user(&va
, argp
, sizeof va
))
3486 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
3489 case KVM_X86_SETUP_MCE
: {
3493 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
3495 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
3498 case KVM_X86_SET_MCE
: {
3499 struct kvm_x86_mce mce
;
3502 if (copy_from_user(&mce
, argp
, sizeof mce
))
3504 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
3507 case KVM_GET_VCPU_EVENTS
: {
3508 struct kvm_vcpu_events events
;
3510 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
3513 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
3518 case KVM_SET_VCPU_EVENTS
: {
3519 struct kvm_vcpu_events events
;
3522 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
3525 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
3528 case KVM_GET_DEBUGREGS
: {
3529 struct kvm_debugregs dbgregs
;
3531 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
3534 if (copy_to_user(argp
, &dbgregs
,
3535 sizeof(struct kvm_debugregs
)))
3540 case KVM_SET_DEBUGREGS
: {
3541 struct kvm_debugregs dbgregs
;
3544 if (copy_from_user(&dbgregs
, argp
,
3545 sizeof(struct kvm_debugregs
)))
3548 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
3551 case KVM_GET_XSAVE
: {
3552 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
3557 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
3560 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
3565 case KVM_SET_XSAVE
: {
3566 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
3567 if (IS_ERR(u
.xsave
))
3568 return PTR_ERR(u
.xsave
);
3570 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
3573 case KVM_GET_XCRS
: {
3574 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3579 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
3582 if (copy_to_user(argp
, u
.xcrs
,
3583 sizeof(struct kvm_xcrs
)))
3588 case KVM_SET_XCRS
: {
3589 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
3591 return PTR_ERR(u
.xcrs
);
3593 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
3596 case KVM_SET_TSC_KHZ
: {
3600 user_tsc_khz
= (u32
)arg
;
3602 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
3605 if (user_tsc_khz
== 0)
3606 user_tsc_khz
= tsc_khz
;
3608 kvm_set_tsc_khz(vcpu
, user_tsc_khz
);
3613 case KVM_GET_TSC_KHZ
: {
3614 r
= vcpu
->arch
.virtual_tsc_khz
;
3617 case KVM_KVMCLOCK_CTRL
: {
3618 r
= kvm_set_guest_paused(vcpu
);
3629 int kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
3631 return VM_FAULT_SIGBUS
;
3634 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
3638 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
3640 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
3644 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3647 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3651 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3652 u32 kvm_nr_mmu_pages
)
3654 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3657 mutex_lock(&kvm
->slots_lock
);
3659 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3660 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3662 mutex_unlock(&kvm
->slots_lock
);
3666 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3668 return kvm
->arch
.n_max_mmu_pages
;
3671 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3676 switch (chip
->chip_id
) {
3677 case KVM_IRQCHIP_PIC_MASTER
:
3678 memcpy(&chip
->chip
.pic
,
3679 &pic_irqchip(kvm
)->pics
[0],
3680 sizeof(struct kvm_pic_state
));
3682 case KVM_IRQCHIP_PIC_SLAVE
:
3683 memcpy(&chip
->chip
.pic
,
3684 &pic_irqchip(kvm
)->pics
[1],
3685 sizeof(struct kvm_pic_state
));
3687 case KVM_IRQCHIP_IOAPIC
:
3688 r
= kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3697 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3702 switch (chip
->chip_id
) {
3703 case KVM_IRQCHIP_PIC_MASTER
:
3704 spin_lock(&pic_irqchip(kvm
)->lock
);
3705 memcpy(&pic_irqchip(kvm
)->pics
[0],
3707 sizeof(struct kvm_pic_state
));
3708 spin_unlock(&pic_irqchip(kvm
)->lock
);
3710 case KVM_IRQCHIP_PIC_SLAVE
:
3711 spin_lock(&pic_irqchip(kvm
)->lock
);
3712 memcpy(&pic_irqchip(kvm
)->pics
[1],
3714 sizeof(struct kvm_pic_state
));
3715 spin_unlock(&pic_irqchip(kvm
)->lock
);
3717 case KVM_IRQCHIP_IOAPIC
:
3718 r
= kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3724 kvm_pic_update_irq(pic_irqchip(kvm
));
3728 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3732 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3733 memcpy(ps
, &kvm
->arch
.vpit
->pit_state
, sizeof(struct kvm_pit_state
));
3734 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3738 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3742 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3743 memcpy(&kvm
->arch
.vpit
->pit_state
, ps
, sizeof(struct kvm_pit_state
));
3744 kvm_pit_load_count(kvm
, 0, ps
->channels
[0].count
, 0);
3745 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3749 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3753 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3754 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3755 sizeof(ps
->channels
));
3756 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3757 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3758 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
3762 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3764 int r
= 0, start
= 0;
3765 u32 prev_legacy
, cur_legacy
;
3766 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3767 prev_legacy
= kvm
->arch
.vpit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3768 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3769 if (!prev_legacy
&& cur_legacy
)
3771 memcpy(&kvm
->arch
.vpit
->pit_state
.channels
, &ps
->channels
,
3772 sizeof(kvm
->arch
.vpit
->pit_state
.channels
));
3773 kvm
->arch
.vpit
->pit_state
.flags
= ps
->flags
;
3774 kvm_pit_load_count(kvm
, 0, kvm
->arch
.vpit
->pit_state
.channels
[0].count
, start
);
3775 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3779 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
3780 struct kvm_reinject_control
*control
)
3782 if (!kvm
->arch
.vpit
)
3784 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3785 kvm
->arch
.vpit
->pit_state
.reinject
= control
->pit_reinject
;
3786 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3791 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3792 * @kvm: kvm instance
3793 * @log: slot id and address to which we copy the log
3795 * Steps 1-4 below provide general overview of dirty page logging. See
3796 * kvm_get_dirty_log_protect() function description for additional details.
3798 * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3799 * always flush the TLB (step 4) even if previous step failed and the dirty
3800 * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3801 * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3802 * writes will be marked dirty for next log read.
3804 * 1. Take a snapshot of the bit and clear it if needed.
3805 * 2. Write protect the corresponding page.
3806 * 3. Copy the snapshot to the userspace.
3807 * 4. Flush TLB's if needed.
3809 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
, struct kvm_dirty_log
*log
)
3811 bool is_dirty
= false;
3814 mutex_lock(&kvm
->slots_lock
);
3817 * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3819 if (kvm_x86_ops
->flush_log_dirty
)
3820 kvm_x86_ops
->flush_log_dirty(kvm
);
3822 r
= kvm_get_dirty_log_protect(kvm
, log
, &is_dirty
);
3825 * All the TLBs can be flushed out of mmu lock, see the comments in
3826 * kvm_mmu_slot_remove_write_access().
3828 lockdep_assert_held(&kvm
->slots_lock
);
3830 kvm_flush_remote_tlbs(kvm
);
3832 mutex_unlock(&kvm
->slots_lock
);
3836 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
3839 if (!irqchip_in_kernel(kvm
))
3842 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
3843 irq_event
->irq
, irq_event
->level
,
3848 long kvm_arch_vm_ioctl(struct file
*filp
,
3849 unsigned int ioctl
, unsigned long arg
)
3851 struct kvm
*kvm
= filp
->private_data
;
3852 void __user
*argp
= (void __user
*)arg
;
3855 * This union makes it completely explicit to gcc-3.x
3856 * that these two variables' stack usage should be
3857 * combined, not added together.
3860 struct kvm_pit_state ps
;
3861 struct kvm_pit_state2 ps2
;
3862 struct kvm_pit_config pit_config
;
3866 case KVM_SET_TSS_ADDR
:
3867 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
3869 case KVM_SET_IDENTITY_MAP_ADDR
: {
3873 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
3875 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
3878 case KVM_SET_NR_MMU_PAGES
:
3879 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
3881 case KVM_GET_NR_MMU_PAGES
:
3882 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
3884 case KVM_CREATE_IRQCHIP
: {
3885 struct kvm_pic
*vpic
;
3887 mutex_lock(&kvm
->lock
);
3890 goto create_irqchip_unlock
;
3892 if (atomic_read(&kvm
->online_vcpus
))
3893 goto create_irqchip_unlock
;
3895 vpic
= kvm_create_pic(kvm
);
3897 r
= kvm_ioapic_init(kvm
);
3899 mutex_lock(&kvm
->slots_lock
);
3900 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3902 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3904 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3906 mutex_unlock(&kvm
->slots_lock
);
3908 goto create_irqchip_unlock
;
3911 goto create_irqchip_unlock
;
3913 kvm
->arch
.vpic
= vpic
;
3915 r
= kvm_setup_default_irq_routing(kvm
);
3917 mutex_lock(&kvm
->slots_lock
);
3918 mutex_lock(&kvm
->irq_lock
);
3919 kvm_ioapic_destroy(kvm
);
3920 kvm_destroy_pic(kvm
);
3921 mutex_unlock(&kvm
->irq_lock
);
3922 mutex_unlock(&kvm
->slots_lock
);
3924 create_irqchip_unlock
:
3925 mutex_unlock(&kvm
->lock
);
3928 case KVM_CREATE_PIT
:
3929 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
3931 case KVM_CREATE_PIT2
:
3933 if (copy_from_user(&u
.pit_config
, argp
,
3934 sizeof(struct kvm_pit_config
)))
3937 mutex_lock(&kvm
->slots_lock
);
3940 goto create_pit_unlock
;
3942 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
3946 mutex_unlock(&kvm
->slots_lock
);
3948 case KVM_GET_IRQCHIP
: {
3949 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3950 struct kvm_irqchip
*chip
;
3952 chip
= memdup_user(argp
, sizeof(*chip
));
3959 if (!irqchip_in_kernel(kvm
))
3960 goto get_irqchip_out
;
3961 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
3963 goto get_irqchip_out
;
3965 if (copy_to_user(argp
, chip
, sizeof *chip
))
3966 goto get_irqchip_out
;
3972 case KVM_SET_IRQCHIP
: {
3973 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3974 struct kvm_irqchip
*chip
;
3976 chip
= memdup_user(argp
, sizeof(*chip
));
3983 if (!irqchip_in_kernel(kvm
))
3984 goto set_irqchip_out
;
3985 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
3987 goto set_irqchip_out
;
3995 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
3998 if (!kvm
->arch
.vpit
)
4000 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
4004 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
4011 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
4014 if (!kvm
->arch
.vpit
)
4016 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
4019 case KVM_GET_PIT2
: {
4021 if (!kvm
->arch
.vpit
)
4023 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
4027 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
4032 case KVM_SET_PIT2
: {
4034 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
4037 if (!kvm
->arch
.vpit
)
4039 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
4042 case KVM_REINJECT_CONTROL
: {
4043 struct kvm_reinject_control control
;
4045 if (copy_from_user(&control
, argp
, sizeof(control
)))
4047 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
4050 case KVM_XEN_HVM_CONFIG
: {
4052 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
4053 sizeof(struct kvm_xen_hvm_config
)))
4056 if (kvm
->arch
.xen_hvm_config
.flags
)
4061 case KVM_SET_CLOCK
: {
4062 struct kvm_clock_data user_ns
;
4067 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
4075 local_irq_disable();
4076 now_ns
= get_kernel_ns();
4077 delta
= user_ns
.clock
- now_ns
;
4079 kvm
->arch
.kvmclock_offset
= delta
;
4080 kvm_gen_update_masterclock(kvm
);
4083 case KVM_GET_CLOCK
: {
4084 struct kvm_clock_data user_ns
;
4087 local_irq_disable();
4088 now_ns
= get_kernel_ns();
4089 user_ns
.clock
= kvm
->arch
.kvmclock_offset
+ now_ns
;
4092 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
4095 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
4102 r
= kvm_vm_ioctl_assigned_device(kvm
, ioctl
, arg
);
4108 static void kvm_init_msr_list(void)
4113 /* skip the first msrs in the list. KVM-specific */
4114 for (i
= j
= KVM_SAVE_MSRS_BEGIN
; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
4115 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
4119 * Even MSRs that are valid in the host may not be exposed
4120 * to the guests in some cases. We could work around this
4121 * in VMX with the generic MSR save/load machinery, but it
4122 * is not really worthwhile since it will really only
4123 * happen with nested virtualization.
4125 switch (msrs_to_save
[i
]) {
4126 case MSR_IA32_BNDCFGS
:
4127 if (!kvm_x86_ops
->mpx_supported())
4135 msrs_to_save
[j
] = msrs_to_save
[i
];
4138 num_msrs_to_save
= j
;
4141 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
4149 if (!(vcpu
->arch
.apic
&&
4150 !kvm_iodevice_write(vcpu
, &vcpu
->arch
.apic
->dev
, addr
, n
, v
))
4151 && kvm_io_bus_write(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4162 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
4169 if (!(vcpu
->arch
.apic
&&
4170 !kvm_iodevice_read(vcpu
, &vcpu
->arch
.apic
->dev
,
4172 && kvm_io_bus_read(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4174 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, *(u64
*)v
);
4184 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
4185 struct kvm_segment
*var
, int seg
)
4187 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
4190 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
4191 struct kvm_segment
*var
, int seg
)
4193 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
4196 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
,
4197 struct x86_exception
*exception
)
4201 BUG_ON(!mmu_is_nested(vcpu
));
4203 /* NPT walks are always user-walks */
4204 access
|= PFERR_USER_MASK
;
4205 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, exception
);
4210 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
4211 struct x86_exception
*exception
)
4213 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4214 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4217 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
4218 struct x86_exception
*exception
)
4220 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4221 access
|= PFERR_FETCH_MASK
;
4222 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4225 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
4226 struct x86_exception
*exception
)
4228 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4229 access
|= PFERR_WRITE_MASK
;
4230 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4233 /* uses this to access any guest's mapped memory without checking CPL */
4234 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
4235 struct x86_exception
*exception
)
4237 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
4240 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
4241 struct kvm_vcpu
*vcpu
, u32 access
,
4242 struct x86_exception
*exception
)
4245 int r
= X86EMUL_CONTINUE
;
4248 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
4250 unsigned offset
= addr
& (PAGE_SIZE
-1);
4251 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4254 if (gpa
== UNMAPPED_GVA
)
4255 return X86EMUL_PROPAGATE_FAULT
;
4256 ret
= kvm_read_guest_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
, data
,
4259 r
= X86EMUL_IO_NEEDED
;
4271 /* used for instruction fetching */
4272 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4273 gva_t addr
, void *val
, unsigned int bytes
,
4274 struct x86_exception
*exception
)
4276 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4277 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4281 /* Inline kvm_read_guest_virt_helper for speed. */
4282 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
|PFERR_FETCH_MASK
,
4284 if (unlikely(gpa
== UNMAPPED_GVA
))
4285 return X86EMUL_PROPAGATE_FAULT
;
4287 offset
= addr
& (PAGE_SIZE
-1);
4288 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
4289 bytes
= (unsigned)PAGE_SIZE
- offset
;
4290 ret
= kvm_read_guest_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
, val
,
4292 if (unlikely(ret
< 0))
4293 return X86EMUL_IO_NEEDED
;
4295 return X86EMUL_CONTINUE
;
4298 int kvm_read_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4299 gva_t addr
, void *val
, unsigned int bytes
,
4300 struct x86_exception
*exception
)
4302 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4303 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4305 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
4308 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
4310 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4311 gva_t addr
, void *val
, unsigned int bytes
,
4312 struct x86_exception
*exception
)
4314 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4315 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, exception
);
4318 int kvm_write_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4319 gva_t addr
, void *val
,
4321 struct x86_exception
*exception
)
4323 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4325 int r
= X86EMUL_CONTINUE
;
4328 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
4331 unsigned offset
= addr
& (PAGE_SIZE
-1);
4332 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4335 if (gpa
== UNMAPPED_GVA
)
4336 return X86EMUL_PROPAGATE_FAULT
;
4337 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, data
, towrite
);
4339 r
= X86EMUL_IO_NEEDED
;
4350 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
4352 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4353 gpa_t
*gpa
, struct x86_exception
*exception
,
4356 u32 access
= ((kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
4357 | (write
? PFERR_WRITE_MASK
: 0);
4359 if (vcpu_match_mmio_gva(vcpu
, gva
)
4360 && !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
4361 vcpu
->arch
.access
, access
)) {
4362 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
4363 (gva
& (PAGE_SIZE
- 1));
4364 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
4368 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4370 if (*gpa
== UNMAPPED_GVA
)
4373 /* For APIC access vmexit */
4374 if ((*gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4377 if (vcpu_match_mmio_gpa(vcpu
, *gpa
)) {
4378 trace_vcpu_match_mmio(gva
, *gpa
, write
, true);
4385 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4386 const void *val
, int bytes
)
4390 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, val
, bytes
);
4393 kvm_mmu_pte_write(vcpu
, gpa
, val
, bytes
);
4397 struct read_write_emulator_ops
{
4398 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
4400 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4401 void *val
, int bytes
);
4402 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4403 int bytes
, void *val
);
4404 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4405 void *val
, int bytes
);
4409 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
4411 if (vcpu
->mmio_read_completed
) {
4412 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
4413 vcpu
->mmio_fragments
[0].gpa
, *(u64
*)val
);
4414 vcpu
->mmio_read_completed
= 0;
4421 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4422 void *val
, int bytes
)
4424 return !kvm_read_guest(vcpu
->kvm
, gpa
, val
, bytes
);
4427 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4428 void *val
, int bytes
)
4430 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
4433 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
4435 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
4436 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
4439 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4440 void *val
, int bytes
)
4442 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
4443 return X86EMUL_IO_NEEDED
;
4446 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4447 void *val
, int bytes
)
4449 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
4451 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
4452 return X86EMUL_CONTINUE
;
4455 static const struct read_write_emulator_ops read_emultor
= {
4456 .read_write_prepare
= read_prepare
,
4457 .read_write_emulate
= read_emulate
,
4458 .read_write_mmio
= vcpu_mmio_read
,
4459 .read_write_exit_mmio
= read_exit_mmio
,
4462 static const struct read_write_emulator_ops write_emultor
= {
4463 .read_write_emulate
= write_emulate
,
4464 .read_write_mmio
= write_mmio
,
4465 .read_write_exit_mmio
= write_exit_mmio
,
4469 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
4471 struct x86_exception
*exception
,
4472 struct kvm_vcpu
*vcpu
,
4473 const struct read_write_emulator_ops
*ops
)
4477 bool write
= ops
->write
;
4478 struct kvm_mmio_fragment
*frag
;
4480 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
4483 return X86EMUL_PROPAGATE_FAULT
;
4485 /* For APIC access vmexit */
4489 if (ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
4490 return X86EMUL_CONTINUE
;
4494 * Is this MMIO handled locally?
4496 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
4497 if (handled
== bytes
)
4498 return X86EMUL_CONTINUE
;
4504 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
4505 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
4509 return X86EMUL_CONTINUE
;
4512 static int emulator_read_write(struct x86_emulate_ctxt
*ctxt
,
4514 void *val
, unsigned int bytes
,
4515 struct x86_exception
*exception
,
4516 const struct read_write_emulator_ops
*ops
)
4518 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4522 if (ops
->read_write_prepare
&&
4523 ops
->read_write_prepare(vcpu
, val
, bytes
))
4524 return X86EMUL_CONTINUE
;
4526 vcpu
->mmio_nr_fragments
= 0;
4528 /* Crossing a page boundary? */
4529 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
4532 now
= -addr
& ~PAGE_MASK
;
4533 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
4536 if (rc
!= X86EMUL_CONTINUE
)
4539 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
4545 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
4547 if (rc
!= X86EMUL_CONTINUE
)
4550 if (!vcpu
->mmio_nr_fragments
)
4553 gpa
= vcpu
->mmio_fragments
[0].gpa
;
4555 vcpu
->mmio_needed
= 1;
4556 vcpu
->mmio_cur_fragment
= 0;
4558 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
4559 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
4560 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
4561 vcpu
->run
->mmio
.phys_addr
= gpa
;
4563 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
4566 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
4570 struct x86_exception
*exception
)
4572 return emulator_read_write(ctxt
, addr
, val
, bytes
,
4573 exception
, &read_emultor
);
4576 static int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
4580 struct x86_exception
*exception
)
4582 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
4583 exception
, &write_emultor
);
4586 #define CMPXCHG_TYPE(t, ptr, old, new) \
4587 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4589 #ifdef CONFIG_X86_64
4590 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4592 # define CMPXCHG64(ptr, old, new) \
4593 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4596 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
4601 struct x86_exception
*exception
)
4603 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4609 /* guests cmpxchg8b have to be emulated atomically */
4610 if (bytes
> 8 || (bytes
& (bytes
- 1)))
4613 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
4615 if (gpa
== UNMAPPED_GVA
||
4616 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4619 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
4622 page
= gfn_to_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
4623 if (is_error_page(page
))
4626 kaddr
= kmap_atomic(page
);
4627 kaddr
+= offset_in_page(gpa
);
4630 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
4633 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
4636 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
4639 exchanged
= CMPXCHG64(kaddr
, old
, new);
4644 kunmap_atomic(kaddr
);
4645 kvm_release_page_dirty(page
);
4648 return X86EMUL_CMPXCHG_FAILED
;
4650 mark_page_dirty(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
4651 kvm_mmu_pte_write(vcpu
, gpa
, new, bytes
);
4653 return X86EMUL_CONTINUE
;
4656 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
4658 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
4661 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
4663 /* TODO: String I/O for in kernel device */
4666 if (vcpu
->arch
.pio
.in
)
4667 r
= kvm_io_bus_read(vcpu
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
4668 vcpu
->arch
.pio
.size
, pd
);
4670 r
= kvm_io_bus_write(vcpu
, KVM_PIO_BUS
,
4671 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
4676 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
4677 unsigned short port
, void *val
,
4678 unsigned int count
, bool in
)
4680 vcpu
->arch
.pio
.port
= port
;
4681 vcpu
->arch
.pio
.in
= in
;
4682 vcpu
->arch
.pio
.count
= count
;
4683 vcpu
->arch
.pio
.size
= size
;
4685 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
4686 vcpu
->arch
.pio
.count
= 0;
4690 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
4691 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
4692 vcpu
->run
->io
.size
= size
;
4693 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
4694 vcpu
->run
->io
.count
= count
;
4695 vcpu
->run
->io
.port
= port
;
4700 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
4701 int size
, unsigned short port
, void *val
,
4704 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4707 if (vcpu
->arch
.pio
.count
)
4710 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
4713 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
4714 trace_kvm_pio(KVM_PIO_IN
, port
, size
, count
, vcpu
->arch
.pio_data
);
4715 vcpu
->arch
.pio
.count
= 0;
4722 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
4723 int size
, unsigned short port
,
4724 const void *val
, unsigned int count
)
4726 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4728 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
4729 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, vcpu
->arch
.pio_data
);
4730 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
4733 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
4735 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
4738 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
4740 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
4743 int kvm_emulate_wbinvd_noskip(struct kvm_vcpu
*vcpu
)
4745 if (!need_emulate_wbinvd(vcpu
))
4746 return X86EMUL_CONTINUE
;
4748 if (kvm_x86_ops
->has_wbinvd_exit()) {
4749 int cpu
= get_cpu();
4751 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4752 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
4753 wbinvd_ipi
, NULL
, 1);
4755 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
4758 return X86EMUL_CONTINUE
;
4761 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4763 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
4764 return kvm_emulate_wbinvd_noskip(vcpu
);
4766 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
4770 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
4772 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt
));
4775 static int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
4776 unsigned long *dest
)
4778 return kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
4781 static int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
4782 unsigned long value
)
4785 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
4788 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
4790 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
4793 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
4795 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4796 unsigned long value
;
4800 value
= kvm_read_cr0(vcpu
);
4803 value
= vcpu
->arch
.cr2
;
4806 value
= kvm_read_cr3(vcpu
);
4809 value
= kvm_read_cr4(vcpu
);
4812 value
= kvm_get_cr8(vcpu
);
4815 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4822 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
4824 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4829 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
4832 vcpu
->arch
.cr2
= val
;
4835 res
= kvm_set_cr3(vcpu
, val
);
4838 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
4841 res
= kvm_set_cr8(vcpu
, val
);
4844 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4851 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
4853 return kvm_x86_ops
->get_cpl(emul_to_vcpu(ctxt
));
4856 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4858 kvm_x86_ops
->get_gdt(emul_to_vcpu(ctxt
), dt
);
4861 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4863 kvm_x86_ops
->get_idt(emul_to_vcpu(ctxt
), dt
);
4866 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4868 kvm_x86_ops
->set_gdt(emul_to_vcpu(ctxt
), dt
);
4871 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4873 kvm_x86_ops
->set_idt(emul_to_vcpu(ctxt
), dt
);
4876 static unsigned long emulator_get_cached_segment_base(
4877 struct x86_emulate_ctxt
*ctxt
, int seg
)
4879 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
4882 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
4883 struct desc_struct
*desc
, u32
*base3
,
4886 struct kvm_segment var
;
4888 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
4889 *selector
= var
.selector
;
4892 memset(desc
, 0, sizeof(*desc
));
4898 set_desc_limit(desc
, var
.limit
);
4899 set_desc_base(desc
, (unsigned long)var
.base
);
4900 #ifdef CONFIG_X86_64
4902 *base3
= var
.base
>> 32;
4904 desc
->type
= var
.type
;
4906 desc
->dpl
= var
.dpl
;
4907 desc
->p
= var
.present
;
4908 desc
->avl
= var
.avl
;
4916 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
4917 struct desc_struct
*desc
, u32 base3
,
4920 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4921 struct kvm_segment var
;
4923 var
.selector
= selector
;
4924 var
.base
= get_desc_base(desc
);
4925 #ifdef CONFIG_X86_64
4926 var
.base
|= ((u64
)base3
) << 32;
4928 var
.limit
= get_desc_limit(desc
);
4930 var
.limit
= (var
.limit
<< 12) | 0xfff;
4931 var
.type
= desc
->type
;
4932 var
.dpl
= desc
->dpl
;
4937 var
.avl
= desc
->avl
;
4938 var
.present
= desc
->p
;
4939 var
.unusable
= !var
.present
;
4942 kvm_set_segment(vcpu
, &var
, seg
);
4946 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
4947 u32 msr_index
, u64
*pdata
)
4949 return kvm_get_msr(emul_to_vcpu(ctxt
), msr_index
, pdata
);
4952 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
4953 u32 msr_index
, u64 data
)
4955 struct msr_data msr
;
4958 msr
.index
= msr_index
;
4959 msr
.host_initiated
= false;
4960 return kvm_set_msr(emul_to_vcpu(ctxt
), &msr
);
4963 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
4966 return kvm_pmu_check_pmc(emul_to_vcpu(ctxt
), pmc
);
4969 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
4970 u32 pmc
, u64
*pdata
)
4972 return kvm_pmu_read_pmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
4975 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
4977 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
4980 static void emulator_get_fpu(struct x86_emulate_ctxt
*ctxt
)
4983 kvm_load_guest_fpu(emul_to_vcpu(ctxt
));
4985 * CR0.TS may reference the host fpu state, not the guest fpu state,
4986 * so it may be clear at this point.
4991 static void emulator_put_fpu(struct x86_emulate_ctxt
*ctxt
)
4996 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
4997 struct x86_instruction_info
*info
,
4998 enum x86_intercept_stage stage
)
5000 return kvm_x86_ops
->check_intercept(emul_to_vcpu(ctxt
), info
, stage
);
5003 static void emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
5004 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
)
5006 kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
);
5009 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
5011 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
5014 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
5016 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
5019 static void emulator_set_nmi_mask(struct x86_emulate_ctxt
*ctxt
, bool masked
)
5021 kvm_x86_ops
->set_nmi_mask(emul_to_vcpu(ctxt
), masked
);
5024 static const struct x86_emulate_ops emulate_ops
= {
5025 .read_gpr
= emulator_read_gpr
,
5026 .write_gpr
= emulator_write_gpr
,
5027 .read_std
= kvm_read_guest_virt_system
,
5028 .write_std
= kvm_write_guest_virt_system
,
5029 .fetch
= kvm_fetch_guest_virt
,
5030 .read_emulated
= emulator_read_emulated
,
5031 .write_emulated
= emulator_write_emulated
,
5032 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
5033 .invlpg
= emulator_invlpg
,
5034 .pio_in_emulated
= emulator_pio_in_emulated
,
5035 .pio_out_emulated
= emulator_pio_out_emulated
,
5036 .get_segment
= emulator_get_segment
,
5037 .set_segment
= emulator_set_segment
,
5038 .get_cached_segment_base
= emulator_get_cached_segment_base
,
5039 .get_gdt
= emulator_get_gdt
,
5040 .get_idt
= emulator_get_idt
,
5041 .set_gdt
= emulator_set_gdt
,
5042 .set_idt
= emulator_set_idt
,
5043 .get_cr
= emulator_get_cr
,
5044 .set_cr
= emulator_set_cr
,
5045 .cpl
= emulator_get_cpl
,
5046 .get_dr
= emulator_get_dr
,
5047 .set_dr
= emulator_set_dr
,
5048 .set_msr
= emulator_set_msr
,
5049 .get_msr
= emulator_get_msr
,
5050 .check_pmc
= emulator_check_pmc
,
5051 .read_pmc
= emulator_read_pmc
,
5052 .halt
= emulator_halt
,
5053 .wbinvd
= emulator_wbinvd
,
5054 .fix_hypercall
= emulator_fix_hypercall
,
5055 .get_fpu
= emulator_get_fpu
,
5056 .put_fpu
= emulator_put_fpu
,
5057 .intercept
= emulator_intercept
,
5058 .get_cpuid
= emulator_get_cpuid
,
5059 .set_nmi_mask
= emulator_set_nmi_mask
,
5062 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
5064 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
5066 * an sti; sti; sequence only disable interrupts for the first
5067 * instruction. So, if the last instruction, be it emulated or
5068 * not, left the system with the INT_STI flag enabled, it
5069 * means that the last instruction is an sti. We should not
5070 * leave the flag on in this case. The same goes for mov ss
5072 if (int_shadow
& mask
)
5074 if (unlikely(int_shadow
|| mask
)) {
5075 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
5077 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5081 static bool inject_emulated_exception(struct kvm_vcpu
*vcpu
)
5083 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5084 if (ctxt
->exception
.vector
== PF_VECTOR
)
5085 return kvm_propagate_fault(vcpu
, &ctxt
->exception
);
5087 if (ctxt
->exception
.error_code_valid
)
5088 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
5089 ctxt
->exception
.error_code
);
5091 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
5095 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
5097 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5100 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
5102 ctxt
->eflags
= kvm_get_rflags(vcpu
);
5103 ctxt
->eip
= kvm_rip_read(vcpu
);
5104 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
5105 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
5106 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
5107 cs_db
? X86EMUL_MODE_PROT32
:
5108 X86EMUL_MODE_PROT16
;
5109 ctxt
->guest_mode
= is_guest_mode(vcpu
);
5111 init_decode_cache(ctxt
);
5112 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5115 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
5117 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5120 init_emulate_ctxt(vcpu
);
5124 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
5125 ret
= emulate_int_real(ctxt
, irq
);
5127 if (ret
!= X86EMUL_CONTINUE
)
5128 return EMULATE_FAIL
;
5130 ctxt
->eip
= ctxt
->_eip
;
5131 kvm_rip_write(vcpu
, ctxt
->eip
);
5132 kvm_set_rflags(vcpu
, ctxt
->eflags
);
5134 if (irq
== NMI_VECTOR
)
5135 vcpu
->arch
.nmi_pending
= 0;
5137 vcpu
->arch
.interrupt
.pending
= false;
5139 return EMULATE_DONE
;
5141 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
5143 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
5145 int r
= EMULATE_DONE
;
5147 ++vcpu
->stat
.insn_emulation_fail
;
5148 trace_kvm_emulate_insn_failed(vcpu
);
5149 if (!is_guest_mode(vcpu
) && kvm_x86_ops
->get_cpl(vcpu
) == 0) {
5150 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
5151 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
5152 vcpu
->run
->internal
.ndata
= 0;
5155 kvm_queue_exception(vcpu
, UD_VECTOR
);
5160 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t cr2
,
5161 bool write_fault_to_shadow_pgtable
,
5167 if (emulation_type
& EMULTYPE_NO_REEXECUTE
)
5170 if (!vcpu
->arch
.mmu
.direct_map
) {
5172 * Write permission should be allowed since only
5173 * write access need to be emulated.
5175 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5178 * If the mapping is invalid in guest, let cpu retry
5179 * it to generate fault.
5181 if (gpa
== UNMAPPED_GVA
)
5186 * Do not retry the unhandleable instruction if it faults on the
5187 * readonly host memory, otherwise it will goto a infinite loop:
5188 * retry instruction -> write #PF -> emulation fail -> retry
5189 * instruction -> ...
5191 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
5194 * If the instruction failed on the error pfn, it can not be fixed,
5195 * report the error to userspace.
5197 if (is_error_noslot_pfn(pfn
))
5200 kvm_release_pfn_clean(pfn
);
5202 /* The instructions are well-emulated on direct mmu. */
5203 if (vcpu
->arch
.mmu
.direct_map
) {
5204 unsigned int indirect_shadow_pages
;
5206 spin_lock(&vcpu
->kvm
->mmu_lock
);
5207 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
5208 spin_unlock(&vcpu
->kvm
->mmu_lock
);
5210 if (indirect_shadow_pages
)
5211 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5217 * if emulation was due to access to shadowed page table
5218 * and it failed try to unshadow page and re-enter the
5219 * guest to let CPU execute the instruction.
5221 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5224 * If the access faults on its page table, it can not
5225 * be fixed by unprotecting shadow page and it should
5226 * be reported to userspace.
5228 return !write_fault_to_shadow_pgtable
;
5231 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
5232 unsigned long cr2
, int emulation_type
)
5234 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5235 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2
;
5237 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
5238 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
5241 * If the emulation is caused by #PF and it is non-page_table
5242 * writing instruction, it means the VM-EXIT is caused by shadow
5243 * page protected, we can zap the shadow page and retry this
5244 * instruction directly.
5246 * Note: if the guest uses a non-page-table modifying instruction
5247 * on the PDE that points to the instruction, then we will unmap
5248 * the instruction and go to an infinite loop. So, we cache the
5249 * last retried eip and the last fault address, if we meet the eip
5250 * and the address again, we can break out of the potential infinite
5253 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
5255 if (!(emulation_type
& EMULTYPE_RETRY
))
5258 if (x86_page_table_writing_insn(ctxt
))
5261 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2
)
5264 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
5265 vcpu
->arch
.last_retry_addr
= cr2
;
5267 if (!vcpu
->arch
.mmu
.direct_map
)
5268 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5270 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5275 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
5276 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
5278 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
5287 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
5288 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
5293 static void kvm_vcpu_check_singlestep(struct kvm_vcpu
*vcpu
, unsigned long rflags
, int *r
)
5295 struct kvm_run
*kvm_run
= vcpu
->run
;
5298 * rflags is the old, "raw" value of the flags. The new value has
5299 * not been saved yet.
5301 * This is correct even for TF set by the guest, because "the
5302 * processor will not generate this exception after the instruction
5303 * that sets the TF flag".
5305 if (unlikely(rflags
& X86_EFLAGS_TF
)) {
5306 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
5307 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_FIXED_1
|
5309 kvm_run
->debug
.arch
.pc
= vcpu
->arch
.singlestep_rip
;
5310 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5311 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5312 *r
= EMULATE_USER_EXIT
;
5314 vcpu
->arch
.emulate_ctxt
.eflags
&= ~X86_EFLAGS_TF
;
5316 * "Certain debug exceptions may clear bit 0-3. The
5317 * remaining contents of the DR6 register are never
5318 * cleared by the processor".
5320 vcpu
->arch
.dr6
&= ~15;
5321 vcpu
->arch
.dr6
|= DR6_BS
| DR6_RTM
;
5322 kvm_queue_exception(vcpu
, DB_VECTOR
);
5327 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
5329 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
5330 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
5331 struct kvm_run
*kvm_run
= vcpu
->run
;
5332 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5333 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5334 vcpu
->arch
.guest_debug_dr7
,
5338 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_FIXED_1
| DR6_RTM
;
5339 kvm_run
->debug
.arch
.pc
= eip
;
5340 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5341 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5342 *r
= EMULATE_USER_EXIT
;
5347 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
5348 !(kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)) {
5349 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5350 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5355 vcpu
->arch
.dr6
&= ~15;
5356 vcpu
->arch
.dr6
|= dr6
| DR6_RTM
;
5357 kvm_queue_exception(vcpu
, DB_VECTOR
);
5366 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
5373 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5374 bool writeback
= true;
5375 bool write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
5378 * Clear write_fault_to_shadow_pgtable here to ensure it is
5381 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
5382 kvm_clear_exception_queue(vcpu
);
5384 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
5385 init_emulate_ctxt(vcpu
);
5388 * We will reenter on the same instruction since
5389 * we do not set complete_userspace_io. This does not
5390 * handle watchpoints yet, those would be handled in
5393 if (kvm_vcpu_check_breakpoint(vcpu
, &r
))
5396 ctxt
->interruptibility
= 0;
5397 ctxt
->have_exception
= false;
5398 ctxt
->exception
.vector
= -1;
5399 ctxt
->perm_ok
= false;
5401 ctxt
->ud
= emulation_type
& EMULTYPE_TRAP_UD
;
5403 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
5405 trace_kvm_emulate_insn_start(vcpu
);
5406 ++vcpu
->stat
.insn_emulation
;
5407 if (r
!= EMULATION_OK
) {
5408 if (emulation_type
& EMULTYPE_TRAP_UD
)
5409 return EMULATE_FAIL
;
5410 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5412 return EMULATE_DONE
;
5413 if (emulation_type
& EMULTYPE_SKIP
)
5414 return EMULATE_FAIL
;
5415 return handle_emulation_failure(vcpu
);
5419 if (emulation_type
& EMULTYPE_SKIP
) {
5420 kvm_rip_write(vcpu
, ctxt
->_eip
);
5421 if (ctxt
->eflags
& X86_EFLAGS_RF
)
5422 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
5423 return EMULATE_DONE
;
5426 if (retry_instruction(ctxt
, cr2
, emulation_type
))
5427 return EMULATE_DONE
;
5429 /* this is needed for vmware backdoor interface to work since it
5430 changes registers values during IO operation */
5431 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
5432 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5433 emulator_invalidate_register_cache(ctxt
);
5437 r
= x86_emulate_insn(ctxt
);
5439 if (r
== EMULATION_INTERCEPTED
)
5440 return EMULATE_DONE
;
5442 if (r
== EMULATION_FAILED
) {
5443 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5445 return EMULATE_DONE
;
5447 return handle_emulation_failure(vcpu
);
5450 if (ctxt
->have_exception
) {
5452 if (inject_emulated_exception(vcpu
))
5454 } else if (vcpu
->arch
.pio
.count
) {
5455 if (!vcpu
->arch
.pio
.in
) {
5456 /* FIXME: return into emulator if single-stepping. */
5457 vcpu
->arch
.pio
.count
= 0;
5460 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
5462 r
= EMULATE_USER_EXIT
;
5463 } else if (vcpu
->mmio_needed
) {
5464 if (!vcpu
->mmio_is_write
)
5466 r
= EMULATE_USER_EXIT
;
5467 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
5468 } else if (r
== EMULATION_RESTART
)
5474 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5475 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
5476 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5477 kvm_rip_write(vcpu
, ctxt
->eip
);
5478 if (r
== EMULATE_DONE
)
5479 kvm_vcpu_check_singlestep(vcpu
, rflags
, &r
);
5480 if (!ctxt
->have_exception
||
5481 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
)
5482 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
5485 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5486 * do nothing, and it will be requested again as soon as
5487 * the shadow expires. But we still need to check here,
5488 * because POPF has no interrupt shadow.
5490 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
5491 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5493 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
5497 EXPORT_SYMBOL_GPL(x86_emulate_instruction
);
5499 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5501 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5502 int ret
= emulator_pio_out_emulated(&vcpu
->arch
.emulate_ctxt
,
5503 size
, port
, &val
, 1);
5504 /* do not return to emulator after return from userspace */
5505 vcpu
->arch
.pio
.count
= 0;
5508 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
5510 static void tsc_bad(void *info
)
5512 __this_cpu_write(cpu_tsc_khz
, 0);
5515 static void tsc_khz_changed(void *data
)
5517 struct cpufreq_freqs
*freq
= data
;
5518 unsigned long khz
= 0;
5522 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5523 khz
= cpufreq_quick_get(raw_smp_processor_id());
5526 __this_cpu_write(cpu_tsc_khz
, khz
);
5529 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
5532 struct cpufreq_freqs
*freq
= data
;
5534 struct kvm_vcpu
*vcpu
;
5535 int i
, send_ipi
= 0;
5538 * We allow guests to temporarily run on slowing clocks,
5539 * provided we notify them after, or to run on accelerating
5540 * clocks, provided we notify them before. Thus time never
5543 * However, we have a problem. We can't atomically update
5544 * the frequency of a given CPU from this function; it is
5545 * merely a notifier, which can be called from any CPU.
5546 * Changing the TSC frequency at arbitrary points in time
5547 * requires a recomputation of local variables related to
5548 * the TSC for each VCPU. We must flag these local variables
5549 * to be updated and be sure the update takes place with the
5550 * new frequency before any guests proceed.
5552 * Unfortunately, the combination of hotplug CPU and frequency
5553 * change creates an intractable locking scenario; the order
5554 * of when these callouts happen is undefined with respect to
5555 * CPU hotplug, and they can race with each other. As such,
5556 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5557 * undefined; you can actually have a CPU frequency change take
5558 * place in between the computation of X and the setting of the
5559 * variable. To protect against this problem, all updates of
5560 * the per_cpu tsc_khz variable are done in an interrupt
5561 * protected IPI, and all callers wishing to update the value
5562 * must wait for a synchronous IPI to complete (which is trivial
5563 * if the caller is on the CPU already). This establishes the
5564 * necessary total order on variable updates.
5566 * Note that because a guest time update may take place
5567 * anytime after the setting of the VCPU's request bit, the
5568 * correct TSC value must be set before the request. However,
5569 * to ensure the update actually makes it to any guest which
5570 * starts running in hardware virtualization between the set
5571 * and the acquisition of the spinlock, we must also ping the
5572 * CPU after setting the request bit.
5576 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
5578 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
5581 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5583 spin_lock(&kvm_lock
);
5584 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
5585 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
5586 if (vcpu
->cpu
!= freq
->cpu
)
5588 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
5589 if (vcpu
->cpu
!= smp_processor_id())
5593 spin_unlock(&kvm_lock
);
5595 if (freq
->old
< freq
->new && send_ipi
) {
5597 * We upscale the frequency. Must make the guest
5598 * doesn't see old kvmclock values while running with
5599 * the new frequency, otherwise we risk the guest sees
5600 * time go backwards.
5602 * In case we update the frequency for another cpu
5603 * (which might be in guest context) send an interrupt
5604 * to kick the cpu out of guest context. Next time
5605 * guest context is entered kvmclock will be updated,
5606 * so the guest will not see stale values.
5608 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5613 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
5614 .notifier_call
= kvmclock_cpufreq_notifier
5617 static int kvmclock_cpu_notifier(struct notifier_block
*nfb
,
5618 unsigned long action
, void *hcpu
)
5620 unsigned int cpu
= (unsigned long)hcpu
;
5624 case CPU_DOWN_FAILED
:
5625 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
5627 case CPU_DOWN_PREPARE
:
5628 smp_call_function_single(cpu
, tsc_bad
, NULL
, 1);
5634 static struct notifier_block kvmclock_cpu_notifier_block
= {
5635 .notifier_call
= kvmclock_cpu_notifier
,
5636 .priority
= -INT_MAX
5639 static void kvm_timer_init(void)
5643 max_tsc_khz
= tsc_khz
;
5645 cpu_notifier_register_begin();
5646 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
5647 #ifdef CONFIG_CPU_FREQ
5648 struct cpufreq_policy policy
;
5649 memset(&policy
, 0, sizeof(policy
));
5651 cpufreq_get_policy(&policy
, cpu
);
5652 if (policy
.cpuinfo
.max_freq
)
5653 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
5656 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
5657 CPUFREQ_TRANSITION_NOTIFIER
);
5659 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
5660 for_each_online_cpu(cpu
)
5661 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
5663 __register_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
5664 cpu_notifier_register_done();
5668 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
5670 int kvm_is_in_guest(void)
5672 return __this_cpu_read(current_vcpu
) != NULL
;
5675 static int kvm_is_user_mode(void)
5679 if (__this_cpu_read(current_vcpu
))
5680 user_mode
= kvm_x86_ops
->get_cpl(__this_cpu_read(current_vcpu
));
5682 return user_mode
!= 0;
5685 static unsigned long kvm_get_guest_ip(void)
5687 unsigned long ip
= 0;
5689 if (__this_cpu_read(current_vcpu
))
5690 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
5695 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
5696 .is_in_guest
= kvm_is_in_guest
,
5697 .is_user_mode
= kvm_is_user_mode
,
5698 .get_guest_ip
= kvm_get_guest_ip
,
5701 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
5703 __this_cpu_write(current_vcpu
, vcpu
);
5705 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
5707 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
5709 __this_cpu_write(current_vcpu
, NULL
);
5711 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
5713 static void kvm_set_mmio_spte_mask(void)
5716 int maxphyaddr
= boot_cpu_data
.x86_phys_bits
;
5719 * Set the reserved bits and the present bit of an paging-structure
5720 * entry to generate page fault with PFER.RSV = 1.
5722 /* Mask the reserved physical address bits. */
5723 mask
= rsvd_bits(maxphyaddr
, 51);
5725 /* Bit 62 is always reserved for 32bit host. */
5726 mask
|= 0x3ull
<< 62;
5728 /* Set the present bit. */
5731 #ifdef CONFIG_X86_64
5733 * If reserved bit is not supported, clear the present bit to disable
5736 if (maxphyaddr
== 52)
5740 kvm_mmu_set_mmio_spte_mask(mask
);
5743 #ifdef CONFIG_X86_64
5744 static void pvclock_gtod_update_fn(struct work_struct
*work
)
5748 struct kvm_vcpu
*vcpu
;
5751 spin_lock(&kvm_lock
);
5752 list_for_each_entry(kvm
, &vm_list
, vm_list
)
5753 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5754 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
5755 atomic_set(&kvm_guest_has_master_clock
, 0);
5756 spin_unlock(&kvm_lock
);
5759 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
5762 * Notification about pvclock gtod data update.
5764 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
5767 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
5768 struct timekeeper
*tk
= priv
;
5770 update_pvclock_gtod(tk
);
5772 /* disable master clock if host does not trust, or does not
5773 * use, TSC clocksource
5775 if (gtod
->clock
.vclock_mode
!= VCLOCK_TSC
&&
5776 atomic_read(&kvm_guest_has_master_clock
) != 0)
5777 queue_work(system_long_wq
, &pvclock_gtod_work
);
5782 static struct notifier_block pvclock_gtod_notifier
= {
5783 .notifier_call
= pvclock_gtod_notify
,
5787 int kvm_arch_init(void *opaque
)
5790 struct kvm_x86_ops
*ops
= opaque
;
5793 printk(KERN_ERR
"kvm: already loaded the other module\n");
5798 if (!ops
->cpu_has_kvm_support()) {
5799 printk(KERN_ERR
"kvm: no hardware support\n");
5803 if (ops
->disabled_by_bios()) {
5804 printk(KERN_ERR
"kvm: disabled by bios\n");
5810 shared_msrs
= alloc_percpu(struct kvm_shared_msrs
);
5812 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_shared_msrs\n");
5816 r
= kvm_mmu_module_init();
5818 goto out_free_percpu
;
5820 kvm_set_mmio_spte_mask();
5824 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
5825 PT_DIRTY_MASK
, PT64_NX_MASK
, 0);
5829 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
5832 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
5835 #ifdef CONFIG_X86_64
5836 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
5842 free_percpu(shared_msrs
);
5847 void kvm_arch_exit(void)
5849 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
5851 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5852 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
5853 CPUFREQ_TRANSITION_NOTIFIER
);
5854 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
5855 #ifdef CONFIG_X86_64
5856 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
5859 kvm_mmu_module_exit();
5860 free_percpu(shared_msrs
);
5863 int kvm_vcpu_halt(struct kvm_vcpu
*vcpu
)
5865 ++vcpu
->stat
.halt_exits
;
5866 if (irqchip_in_kernel(vcpu
->kvm
)) {
5867 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
5870 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
5874 EXPORT_SYMBOL_GPL(kvm_vcpu_halt
);
5876 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
5878 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
5879 return kvm_vcpu_halt(vcpu
);
5881 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
5883 int kvm_hv_hypercall(struct kvm_vcpu
*vcpu
)
5885 u64 param
, ingpa
, outgpa
, ret
;
5886 uint16_t code
, rep_idx
, rep_cnt
, res
= HV_STATUS_SUCCESS
, rep_done
= 0;
5887 bool fast
, longmode
;
5890 * hypercall generates UD from non zero cpl and real mode
5893 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 || !is_protmode(vcpu
)) {
5894 kvm_queue_exception(vcpu
, UD_VECTOR
);
5898 longmode
= is_64_bit_mode(vcpu
);
5901 param
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDX
) << 32) |
5902 (kvm_register_read(vcpu
, VCPU_REGS_RAX
) & 0xffffffff);
5903 ingpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RBX
) << 32) |
5904 (kvm_register_read(vcpu
, VCPU_REGS_RCX
) & 0xffffffff);
5905 outgpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDI
) << 32) |
5906 (kvm_register_read(vcpu
, VCPU_REGS_RSI
) & 0xffffffff);
5908 #ifdef CONFIG_X86_64
5910 param
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5911 ingpa
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5912 outgpa
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
5916 code
= param
& 0xffff;
5917 fast
= (param
>> 16) & 0x1;
5918 rep_cnt
= (param
>> 32) & 0xfff;
5919 rep_idx
= (param
>> 48) & 0xfff;
5921 trace_kvm_hv_hypercall(code
, fast
, rep_cnt
, rep_idx
, ingpa
, outgpa
);
5924 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT
:
5925 kvm_vcpu_on_spin(vcpu
);
5928 res
= HV_STATUS_INVALID_HYPERCALL_CODE
;
5932 ret
= res
| (((u64
)rep_done
& 0xfff) << 32);
5934 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
5936 kvm_register_write(vcpu
, VCPU_REGS_RDX
, ret
>> 32);
5937 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
& 0xffffffff);
5944 * kvm_pv_kick_cpu_op: Kick a vcpu.
5946 * @apicid - apicid of vcpu to be kicked.
5948 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
5950 struct kvm_lapic_irq lapic_irq
;
5952 lapic_irq
.shorthand
= 0;
5953 lapic_irq
.dest_mode
= 0;
5954 lapic_irq
.dest_id
= apicid
;
5956 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
5957 kvm_irq_delivery_to_apic(kvm
, NULL
, &lapic_irq
, NULL
);
5960 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
5962 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
5963 int op_64_bit
, r
= 1;
5965 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
5967 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
5968 return kvm_hv_hypercall(vcpu
);
5970 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5971 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
5972 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5973 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5974 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
5976 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
5978 op_64_bit
= is_64_bit_mode(vcpu
);
5987 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
5993 case KVM_HC_VAPIC_POLL_IRQ
:
5996 case KVM_HC_KICK_CPU
:
5997 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
6007 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
6008 ++vcpu
->stat
.hypercalls
;
6011 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
6013 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
6015 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6016 char instruction
[3];
6017 unsigned long rip
= kvm_rip_read(vcpu
);
6019 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
6021 return emulator_write_emulated(ctxt
, rip
, instruction
, 3, NULL
);
6025 * Check if userspace requested an interrupt window, and that the
6026 * interrupt window is open.
6028 * No need to exit to userspace if we already have an interrupt queued.
6030 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
6032 return (!irqchip_in_kernel(vcpu
->kvm
) && !kvm_cpu_has_interrupt(vcpu
) &&
6033 vcpu
->run
->request_interrupt_window
&&
6034 kvm_arch_interrupt_allowed(vcpu
));
6037 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
6039 struct kvm_run
*kvm_run
= vcpu
->run
;
6041 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
6042 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
6043 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
6044 if (irqchip_in_kernel(vcpu
->kvm
))
6045 kvm_run
->ready_for_interrupt_injection
= 1;
6047 kvm_run
->ready_for_interrupt_injection
=
6048 kvm_arch_interrupt_allowed(vcpu
) &&
6049 !kvm_cpu_has_interrupt(vcpu
) &&
6050 !kvm_event_needs_reinjection(vcpu
);
6053 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
6057 if (!kvm_x86_ops
->update_cr8_intercept
)
6060 if (!vcpu
->arch
.apic
)
6063 if (!vcpu
->arch
.apic
->vapic_addr
)
6064 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
6071 tpr
= kvm_lapic_get_cr8(vcpu
);
6073 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
6076 static int inject_pending_event(struct kvm_vcpu
*vcpu
, bool req_int_win
)
6080 /* try to reinject previous events if any */
6081 if (vcpu
->arch
.exception
.pending
) {
6082 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
6083 vcpu
->arch
.exception
.has_error_code
,
6084 vcpu
->arch
.exception
.error_code
);
6086 if (exception_type(vcpu
->arch
.exception
.nr
) == EXCPT_FAULT
)
6087 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
6090 if (vcpu
->arch
.exception
.nr
== DB_VECTOR
&&
6091 (vcpu
->arch
.dr7
& DR7_GD
)) {
6092 vcpu
->arch
.dr7
&= ~DR7_GD
;
6093 kvm_update_dr7(vcpu
);
6096 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
6097 vcpu
->arch
.exception
.has_error_code
,
6098 vcpu
->arch
.exception
.error_code
,
6099 vcpu
->arch
.exception
.reinject
);
6103 if (vcpu
->arch
.nmi_injected
) {
6104 kvm_x86_ops
->set_nmi(vcpu
);
6108 if (vcpu
->arch
.interrupt
.pending
) {
6109 kvm_x86_ops
->set_irq(vcpu
);
6113 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6114 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6119 /* try to inject new event if pending */
6120 if (vcpu
->arch
.nmi_pending
) {
6121 if (kvm_x86_ops
->nmi_allowed(vcpu
)) {
6122 --vcpu
->arch
.nmi_pending
;
6123 vcpu
->arch
.nmi_injected
= true;
6124 kvm_x86_ops
->set_nmi(vcpu
);
6126 } else if (kvm_cpu_has_injectable_intr(vcpu
)) {
6128 * Because interrupts can be injected asynchronously, we are
6129 * calling check_nested_events again here to avoid a race condition.
6130 * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6131 * proposal and current concerns. Perhaps we should be setting
6132 * KVM_REQ_EVENT only on certain events and not unconditionally?
6134 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6135 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6139 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
6140 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
6142 kvm_x86_ops
->set_irq(vcpu
);
6148 static void process_nmi(struct kvm_vcpu
*vcpu
)
6153 * x86 is limited to one NMI running, and one NMI pending after it.
6154 * If an NMI is already in progress, limit further NMIs to just one.
6155 * Otherwise, allow two (and we'll inject the first one immediately).
6157 if (kvm_x86_ops
->get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
6160 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
6161 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
6162 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6165 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
6167 u64 eoi_exit_bitmap
[4];
6170 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
6173 memset(eoi_exit_bitmap
, 0, 32);
6176 kvm_ioapic_scan_entry(vcpu
, eoi_exit_bitmap
, tmr
);
6177 kvm_x86_ops
->load_eoi_exitmap(vcpu
, eoi_exit_bitmap
);
6178 kvm_apic_update_tmr(vcpu
, tmr
);
6181 static void kvm_vcpu_flush_tlb(struct kvm_vcpu
*vcpu
)
6183 ++vcpu
->stat
.tlb_flush
;
6184 kvm_x86_ops
->tlb_flush(vcpu
);
6187 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
6189 struct page
*page
= NULL
;
6191 if (!irqchip_in_kernel(vcpu
->kvm
))
6194 if (!kvm_x86_ops
->set_apic_access_page_addr
)
6197 page
= gfn_to_page(vcpu
->kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
6198 if (is_error_page(page
))
6200 kvm_x86_ops
->set_apic_access_page_addr(vcpu
, page_to_phys(page
));
6203 * Do not pin apic access page in memory, the MMU notifier
6204 * will call us again if it is migrated or swapped out.
6208 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page
);
6210 void kvm_arch_mmu_notifier_invalidate_page(struct kvm
*kvm
,
6211 unsigned long address
)
6214 * The physical address of apic access page is stored in the VMCS.
6215 * Update it when it becomes invalid.
6217 if (address
== gfn_to_hva(kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
))
6218 kvm_make_all_cpus_request(kvm
, KVM_REQ_APIC_PAGE_RELOAD
);
6222 * Returns 1 to let vcpu_run() continue the guest execution loop without
6223 * exiting to the userspace. Otherwise, the value will be returned to the
6226 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
6229 bool req_int_win
= !irqchip_in_kernel(vcpu
->kvm
) &&
6230 vcpu
->run
->request_interrupt_window
;
6231 bool req_immediate_exit
= false;
6233 if (vcpu
->requests
) {
6234 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
6235 kvm_mmu_unload(vcpu
);
6236 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
6237 __kvm_migrate_timers(vcpu
);
6238 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
6239 kvm_gen_update_masterclock(vcpu
->kvm
);
6240 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
6241 kvm_gen_kvmclock_update(vcpu
);
6242 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
6243 r
= kvm_guest_time_update(vcpu
);
6247 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
6248 kvm_mmu_sync_roots(vcpu
);
6249 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
6250 kvm_vcpu_flush_tlb(vcpu
);
6251 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
6252 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
6256 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
6257 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
6261 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
)) {
6262 vcpu
->fpu_active
= 0;
6263 kvm_x86_ops
->fpu_deactivate(vcpu
);
6265 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
6266 /* Page is swapped out. Do synthetic halt */
6267 vcpu
->arch
.apf
.halted
= true;
6271 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
6272 record_steal_time(vcpu
);
6273 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
6275 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
6276 kvm_handle_pmu_event(vcpu
);
6277 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
6278 kvm_deliver_pmi(vcpu
);
6279 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
6280 vcpu_scan_ioapic(vcpu
);
6281 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
6282 kvm_vcpu_reload_apic_access_page(vcpu
);
6285 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
6286 kvm_apic_accept_events(vcpu
);
6287 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
6292 if (inject_pending_event(vcpu
, req_int_win
) != 0)
6293 req_immediate_exit
= true;
6294 /* enable NMI/IRQ window open exits if needed */
6295 else if (vcpu
->arch
.nmi_pending
)
6296 kvm_x86_ops
->enable_nmi_window(vcpu
);
6297 else if (kvm_cpu_has_injectable_intr(vcpu
) || req_int_win
)
6298 kvm_x86_ops
->enable_irq_window(vcpu
);
6300 if (kvm_lapic_enabled(vcpu
)) {
6302 * Update architecture specific hints for APIC
6303 * virtual interrupt delivery.
6305 if (kvm_x86_ops
->hwapic_irr_update
)
6306 kvm_x86_ops
->hwapic_irr_update(vcpu
,
6307 kvm_lapic_find_highest_irr(vcpu
));
6308 update_cr8_intercept(vcpu
);
6309 kvm_lapic_sync_to_vapic(vcpu
);
6313 r
= kvm_mmu_reload(vcpu
);
6315 goto cancel_injection
;
6320 kvm_x86_ops
->prepare_guest_switch(vcpu
);
6321 if (vcpu
->fpu_active
)
6322 kvm_load_guest_fpu(vcpu
);
6323 kvm_load_guest_xcr0(vcpu
);
6325 vcpu
->mode
= IN_GUEST_MODE
;
6327 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6329 /* We should set ->mode before check ->requests,
6330 * see the comment in make_all_cpus_request.
6332 smp_mb__after_srcu_read_unlock();
6334 local_irq_disable();
6336 if (vcpu
->mode
== EXITING_GUEST_MODE
|| vcpu
->requests
6337 || need_resched() || signal_pending(current
)) {
6338 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6342 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6344 goto cancel_injection
;
6347 if (req_immediate_exit
)
6348 smp_send_reschedule(vcpu
->cpu
);
6352 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
6354 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
6355 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
6356 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
6357 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
6358 set_debugreg(vcpu
->arch
.dr6
, 6);
6359 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
6362 trace_kvm_entry(vcpu
->vcpu_id
);
6363 wait_lapic_expire(vcpu
);
6364 kvm_x86_ops
->run(vcpu
);
6367 * Do this here before restoring debug registers on the host. And
6368 * since we do this before handling the vmexit, a DR access vmexit
6369 * can (a) read the correct value of the debug registers, (b) set
6370 * KVM_DEBUGREG_WONT_EXIT again.
6372 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
6375 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
6376 kvm_x86_ops
->sync_dirty_debug_regs(vcpu
);
6377 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
6378 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
6382 * If the guest has used debug registers, at least dr7
6383 * will be disabled while returning to the host.
6384 * If we don't have active breakpoints in the host, we don't
6385 * care about the messed up debug address registers. But if
6386 * we have some of them active, restore the old state.
6388 if (hw_breakpoint_active())
6389 hw_breakpoint_restore();
6391 vcpu
->arch
.last_guest_tsc
= kvm_x86_ops
->read_l1_tsc(vcpu
,
6394 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6397 /* Interrupt is enabled by handle_external_intr() */
6398 kvm_x86_ops
->handle_external_intr(vcpu
);
6403 * We must have an instruction between local_irq_enable() and
6404 * kvm_guest_exit(), so the timer interrupt isn't delayed by
6405 * the interrupt shadow. The stat.exits increment will do nicely.
6406 * But we need to prevent reordering, hence this barrier():
6414 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6417 * Profile KVM exit RIPs:
6419 if (unlikely(prof_on
== KVM_PROFILING
)) {
6420 unsigned long rip
= kvm_rip_read(vcpu
);
6421 profile_hit(KVM_PROFILING
, (void *)rip
);
6424 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
6425 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
6427 if (vcpu
->arch
.apic_attention
)
6428 kvm_lapic_sync_from_vapic(vcpu
);
6430 r
= kvm_x86_ops
->handle_exit(vcpu
);
6434 kvm_x86_ops
->cancel_injection(vcpu
);
6435 if (unlikely(vcpu
->arch
.apic_attention
))
6436 kvm_lapic_sync_from_vapic(vcpu
);
6441 static inline int vcpu_block(struct kvm
*kvm
, struct kvm_vcpu
*vcpu
)
6443 if (!kvm_arch_vcpu_runnable(vcpu
)) {
6444 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6445 kvm_vcpu_block(vcpu
);
6446 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6447 if (!kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
6451 kvm_apic_accept_events(vcpu
);
6452 switch(vcpu
->arch
.mp_state
) {
6453 case KVM_MP_STATE_HALTED
:
6454 vcpu
->arch
.pv
.pv_unhalted
= false;
6455 vcpu
->arch
.mp_state
=
6456 KVM_MP_STATE_RUNNABLE
;
6457 case KVM_MP_STATE_RUNNABLE
:
6458 vcpu
->arch
.apf
.halted
= false;
6460 case KVM_MP_STATE_INIT_RECEIVED
:
6469 static int vcpu_run(struct kvm_vcpu
*vcpu
)
6472 struct kvm
*kvm
= vcpu
->kvm
;
6474 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6477 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
6478 !vcpu
->arch
.apf
.halted
)
6479 r
= vcpu_enter_guest(vcpu
);
6481 r
= vcpu_block(kvm
, vcpu
);
6485 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
6486 if (kvm_cpu_has_pending_timer(vcpu
))
6487 kvm_inject_pending_timer_irqs(vcpu
);
6489 if (dm_request_for_irq_injection(vcpu
)) {
6491 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
6492 ++vcpu
->stat
.request_irq_exits
;
6496 kvm_check_async_pf_completion(vcpu
);
6498 if (signal_pending(current
)) {
6500 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
6501 ++vcpu
->stat
.signal_exits
;
6504 if (need_resched()) {
6505 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6507 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6511 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6516 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
6519 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6520 r
= emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
6521 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6522 if (r
!= EMULATE_DONE
)
6527 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
6529 BUG_ON(!vcpu
->arch
.pio
.count
);
6531 return complete_emulated_io(vcpu
);
6535 * Implements the following, as a state machine:
6539 * for each mmio piece in the fragment
6547 * for each mmio piece in the fragment
6552 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
6554 struct kvm_run
*run
= vcpu
->run
;
6555 struct kvm_mmio_fragment
*frag
;
6558 BUG_ON(!vcpu
->mmio_needed
);
6560 /* Complete previous fragment */
6561 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
6562 len
= min(8u, frag
->len
);
6563 if (!vcpu
->mmio_is_write
)
6564 memcpy(frag
->data
, run
->mmio
.data
, len
);
6566 if (frag
->len
<= 8) {
6567 /* Switch to the next fragment. */
6569 vcpu
->mmio_cur_fragment
++;
6571 /* Go forward to the next mmio piece. */
6577 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
6578 vcpu
->mmio_needed
= 0;
6580 /* FIXME: return into emulator if single-stepping. */
6581 if (vcpu
->mmio_is_write
)
6583 vcpu
->mmio_read_completed
= 1;
6584 return complete_emulated_io(vcpu
);
6587 run
->exit_reason
= KVM_EXIT_MMIO
;
6588 run
->mmio
.phys_addr
= frag
->gpa
;
6589 if (vcpu
->mmio_is_write
)
6590 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
6591 run
->mmio
.len
= min(8u, frag
->len
);
6592 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
6593 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
6598 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
6603 if (!tsk_used_math(current
) && init_fpu(current
))
6606 if (vcpu
->sigset_active
)
6607 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
6609 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
6610 kvm_vcpu_block(vcpu
);
6611 kvm_apic_accept_events(vcpu
);
6612 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
6617 /* re-sync apic's tpr */
6618 if (!irqchip_in_kernel(vcpu
->kvm
)) {
6619 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
6625 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
6626 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
6627 vcpu
->arch
.complete_userspace_io
= NULL
;
6632 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
6637 post_kvm_run_save(vcpu
);
6638 if (vcpu
->sigset_active
)
6639 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
6644 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
6646 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
6648 * We are here if userspace calls get_regs() in the middle of
6649 * instruction emulation. Registers state needs to be copied
6650 * back from emulation context to vcpu. Userspace shouldn't do
6651 * that usually, but some bad designed PV devices (vmware
6652 * backdoor interface) need this to work
6654 emulator_writeback_register_cache(&vcpu
->arch
.emulate_ctxt
);
6655 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
6657 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
6658 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
6659 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
6660 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
6661 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
6662 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
6663 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
6664 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
6665 #ifdef CONFIG_X86_64
6666 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
6667 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
6668 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
6669 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
6670 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
6671 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
6672 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
6673 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
6676 regs
->rip
= kvm_rip_read(vcpu
);
6677 regs
->rflags
= kvm_get_rflags(vcpu
);
6682 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
6684 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
6685 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
6687 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
6688 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
6689 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
6690 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
6691 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
6692 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
6693 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
6694 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
6695 #ifdef CONFIG_X86_64
6696 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
6697 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
6698 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
6699 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
6700 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
6701 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
6702 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
6703 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
6706 kvm_rip_write(vcpu
, regs
->rip
);
6707 kvm_set_rflags(vcpu
, regs
->rflags
);
6709 vcpu
->arch
.exception
.pending
= false;
6711 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6716 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
6718 struct kvm_segment cs
;
6720 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6724 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
6726 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
6727 struct kvm_sregs
*sregs
)
6731 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
6732 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
6733 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
6734 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
6735 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
6736 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
6738 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
6739 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
6741 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6742 sregs
->idt
.limit
= dt
.size
;
6743 sregs
->idt
.base
= dt
.address
;
6744 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6745 sregs
->gdt
.limit
= dt
.size
;
6746 sregs
->gdt
.base
= dt
.address
;
6748 sregs
->cr0
= kvm_read_cr0(vcpu
);
6749 sregs
->cr2
= vcpu
->arch
.cr2
;
6750 sregs
->cr3
= kvm_read_cr3(vcpu
);
6751 sregs
->cr4
= kvm_read_cr4(vcpu
);
6752 sregs
->cr8
= kvm_get_cr8(vcpu
);
6753 sregs
->efer
= vcpu
->arch
.efer
;
6754 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
6756 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
6758 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
6759 set_bit(vcpu
->arch
.interrupt
.nr
,
6760 (unsigned long *)sregs
->interrupt_bitmap
);
6765 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
6766 struct kvm_mp_state
*mp_state
)
6768 kvm_apic_accept_events(vcpu
);
6769 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
&&
6770 vcpu
->arch
.pv
.pv_unhalted
)
6771 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
6773 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
6778 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
6779 struct kvm_mp_state
*mp_state
)
6781 if (!kvm_vcpu_has_lapic(vcpu
) &&
6782 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
6785 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
6786 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
6787 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
6789 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
6790 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6794 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
6795 int reason
, bool has_error_code
, u32 error_code
)
6797 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
6800 init_emulate_ctxt(vcpu
);
6802 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
6803 has_error_code
, error_code
);
6806 return EMULATE_FAIL
;
6808 kvm_rip_write(vcpu
, ctxt
->eip
);
6809 kvm_set_rflags(vcpu
, ctxt
->eflags
);
6810 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6811 return EMULATE_DONE
;
6813 EXPORT_SYMBOL_GPL(kvm_task_switch
);
6815 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
6816 struct kvm_sregs
*sregs
)
6818 struct msr_data apic_base_msr
;
6819 int mmu_reset_needed
= 0;
6820 int pending_vec
, max_bits
, idx
;
6823 if (!guest_cpuid_has_xsave(vcpu
) && (sregs
->cr4
& X86_CR4_OSXSAVE
))
6826 dt
.size
= sregs
->idt
.limit
;
6827 dt
.address
= sregs
->idt
.base
;
6828 kvm_x86_ops
->set_idt(vcpu
, &dt
);
6829 dt
.size
= sregs
->gdt
.limit
;
6830 dt
.address
= sregs
->gdt
.base
;
6831 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
6833 vcpu
->arch
.cr2
= sregs
->cr2
;
6834 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
6835 vcpu
->arch
.cr3
= sregs
->cr3
;
6836 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
6838 kvm_set_cr8(vcpu
, sregs
->cr8
);
6840 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
6841 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
6842 apic_base_msr
.data
= sregs
->apic_base
;
6843 apic_base_msr
.host_initiated
= true;
6844 kvm_set_apic_base(vcpu
, &apic_base_msr
);
6846 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
6847 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
6848 vcpu
->arch
.cr0
= sregs
->cr0
;
6850 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
6851 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
6852 if (sregs
->cr4
& X86_CR4_OSXSAVE
)
6853 kvm_update_cpuid(vcpu
);
6855 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6856 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
6857 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
6858 mmu_reset_needed
= 1;
6860 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
6862 if (mmu_reset_needed
)
6863 kvm_mmu_reset_context(vcpu
);
6865 max_bits
= KVM_NR_INTERRUPTS
;
6866 pending_vec
= find_first_bit(
6867 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
6868 if (pending_vec
< max_bits
) {
6869 kvm_queue_interrupt(vcpu
, pending_vec
, false);
6870 pr_debug("Set back pending irq %d\n", pending_vec
);
6873 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
6874 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
6875 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
6876 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
6877 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
6878 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
6880 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
6881 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
6883 update_cr8_intercept(vcpu
);
6885 /* Older userspace won't unhalt the vcpu on reset. */
6886 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
6887 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
6889 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
6891 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6896 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
6897 struct kvm_guest_debug
*dbg
)
6899 unsigned long rflags
;
6902 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
6904 if (vcpu
->arch
.exception
.pending
)
6906 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
6907 kvm_queue_exception(vcpu
, DB_VECTOR
);
6909 kvm_queue_exception(vcpu
, BP_VECTOR
);
6913 * Read rflags as long as potentially injected trace flags are still
6916 rflags
= kvm_get_rflags(vcpu
);
6918 vcpu
->guest_debug
= dbg
->control
;
6919 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
6920 vcpu
->guest_debug
= 0;
6922 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
6923 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
6924 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
6925 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
6927 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
6928 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
6930 kvm_update_dr7(vcpu
);
6932 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
6933 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
6934 get_segment_base(vcpu
, VCPU_SREG_CS
);
6937 * Trigger an rflags update that will inject or remove the trace
6940 kvm_set_rflags(vcpu
, rflags
);
6942 kvm_x86_ops
->update_db_bp_intercept(vcpu
);
6952 * Translate a guest virtual address to a guest physical address.
6954 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
6955 struct kvm_translation
*tr
)
6957 unsigned long vaddr
= tr
->linear_address
;
6961 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6962 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
6963 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
6964 tr
->physical_address
= gpa
;
6965 tr
->valid
= gpa
!= UNMAPPED_GVA
;
6972 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
6974 struct i387_fxsave_struct
*fxsave
=
6975 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
6977 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
6978 fpu
->fcw
= fxsave
->cwd
;
6979 fpu
->fsw
= fxsave
->swd
;
6980 fpu
->ftwx
= fxsave
->twd
;
6981 fpu
->last_opcode
= fxsave
->fop
;
6982 fpu
->last_ip
= fxsave
->rip
;
6983 fpu
->last_dp
= fxsave
->rdp
;
6984 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
6989 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
6991 struct i387_fxsave_struct
*fxsave
=
6992 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
6994 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
6995 fxsave
->cwd
= fpu
->fcw
;
6996 fxsave
->swd
= fpu
->fsw
;
6997 fxsave
->twd
= fpu
->ftwx
;
6998 fxsave
->fop
= fpu
->last_opcode
;
6999 fxsave
->rip
= fpu
->last_ip
;
7000 fxsave
->rdp
= fpu
->last_dp
;
7001 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
7006 int fx_init(struct kvm_vcpu
*vcpu
)
7010 err
= fpu_alloc(&vcpu
->arch
.guest_fpu
);
7014 fpu_finit(&vcpu
->arch
.guest_fpu
);
7016 vcpu
->arch
.guest_fpu
.state
->xsave
.xsave_hdr
.xcomp_bv
=
7017 host_xcr0
| XSTATE_COMPACTION_ENABLED
;
7020 * Ensure guest xcr0 is valid for loading
7022 vcpu
->arch
.xcr0
= XSTATE_FP
;
7024 vcpu
->arch
.cr0
|= X86_CR0_ET
;
7028 EXPORT_SYMBOL_GPL(fx_init
);
7030 static void fx_free(struct kvm_vcpu
*vcpu
)
7032 fpu_free(&vcpu
->arch
.guest_fpu
);
7035 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
7037 if (vcpu
->guest_fpu_loaded
)
7041 * Restore all possible states in the guest,
7042 * and assume host would use all available bits.
7043 * Guest xcr0 would be loaded later.
7045 kvm_put_guest_xcr0(vcpu
);
7046 vcpu
->guest_fpu_loaded
= 1;
7047 __kernel_fpu_begin();
7048 fpu_restore_checking(&vcpu
->arch
.guest_fpu
);
7052 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
7054 kvm_put_guest_xcr0(vcpu
);
7056 if (!vcpu
->guest_fpu_loaded
)
7059 vcpu
->guest_fpu_loaded
= 0;
7060 fpu_save_init(&vcpu
->arch
.guest_fpu
);
7062 ++vcpu
->stat
.fpu_reload
;
7063 if (!vcpu
->arch
.eager_fpu
)
7064 kvm_make_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
);
7069 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
7071 kvmclock_reset(vcpu
);
7073 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
7075 kvm_x86_ops
->vcpu_free(vcpu
);
7078 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
7081 struct kvm_vcpu
*vcpu
;
7083 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
7084 printk_once(KERN_WARNING
7085 "kvm: SMP vm created on host with unstable TSC; "
7086 "guest TSC will not be reliable\n");
7088 vcpu
= kvm_x86_ops
->vcpu_create(kvm
, id
);
7091 * Activate fpu unconditionally in case the guest needs eager FPU. It will be
7092 * deactivated soon if it doesn't.
7094 kvm_x86_ops
->fpu_activate(vcpu
);
7098 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
7102 vcpu
->arch
.mtrr_state
.have_fixed
= 1;
7103 r
= vcpu_load(vcpu
);
7106 kvm_vcpu_reset(vcpu
);
7107 kvm_mmu_setup(vcpu
);
7113 void kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
7115 struct msr_data msr
;
7116 struct kvm
*kvm
= vcpu
->kvm
;
7118 if (vcpu_load(vcpu
))
7121 msr
.index
= MSR_IA32_TSC
;
7122 msr
.host_initiated
= true;
7123 kvm_write_tsc(vcpu
, &msr
);
7126 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
7127 KVMCLOCK_SYNC_PERIOD
);
7130 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
7133 vcpu
->arch
.apf
.msr_val
= 0;
7135 r
= vcpu_load(vcpu
);
7137 kvm_mmu_unload(vcpu
);
7141 kvm_x86_ops
->vcpu_free(vcpu
);
7144 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
)
7146 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
7147 vcpu
->arch
.nmi_pending
= 0;
7148 vcpu
->arch
.nmi_injected
= false;
7149 kvm_clear_interrupt_queue(vcpu
);
7150 kvm_clear_exception_queue(vcpu
);
7152 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
7153 kvm_update_dr0123(vcpu
);
7154 vcpu
->arch
.dr6
= DR6_INIT
;
7155 kvm_update_dr6(vcpu
);
7156 vcpu
->arch
.dr7
= DR7_FIXED_1
;
7157 kvm_update_dr7(vcpu
);
7161 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7162 vcpu
->arch
.apf
.msr_val
= 0;
7163 vcpu
->arch
.st
.msr_val
= 0;
7165 kvmclock_reset(vcpu
);
7167 kvm_clear_async_pf_completion_queue(vcpu
);
7168 kvm_async_pf_hash_reset(vcpu
);
7169 vcpu
->arch
.apf
.halted
= false;
7171 kvm_pmu_reset(vcpu
);
7173 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
7174 vcpu
->arch
.regs_avail
= ~0;
7175 vcpu
->arch
.regs_dirty
= ~0;
7177 kvm_x86_ops
->vcpu_reset(vcpu
);
7180 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
7182 struct kvm_segment cs
;
7184 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7185 cs
.selector
= vector
<< 8;
7186 cs
.base
= vector
<< 12;
7187 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7188 kvm_rip_write(vcpu
, 0);
7191 int kvm_arch_hardware_enable(void)
7194 struct kvm_vcpu
*vcpu
;
7199 bool stable
, backwards_tsc
= false;
7201 kvm_shared_msr_cpu_online();
7202 ret
= kvm_x86_ops
->hardware_enable();
7206 local_tsc
= native_read_tsc();
7207 stable
= !check_tsc_unstable();
7208 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7209 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7210 if (!stable
&& vcpu
->cpu
== smp_processor_id())
7211 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
7212 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
7213 backwards_tsc
= true;
7214 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
7215 max_tsc
= vcpu
->arch
.last_host_tsc
;
7221 * Sometimes, even reliable TSCs go backwards. This happens on
7222 * platforms that reset TSC during suspend or hibernate actions, but
7223 * maintain synchronization. We must compensate. Fortunately, we can
7224 * detect that condition here, which happens early in CPU bringup,
7225 * before any KVM threads can be running. Unfortunately, we can't
7226 * bring the TSCs fully up to date with real time, as we aren't yet far
7227 * enough into CPU bringup that we know how much real time has actually
7228 * elapsed; our helper function, get_kernel_ns() will be using boot
7229 * variables that haven't been updated yet.
7231 * So we simply find the maximum observed TSC above, then record the
7232 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
7233 * the adjustment will be applied. Note that we accumulate
7234 * adjustments, in case multiple suspend cycles happen before some VCPU
7235 * gets a chance to run again. In the event that no KVM threads get a
7236 * chance to run, we will miss the entire elapsed period, as we'll have
7237 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7238 * loose cycle time. This isn't too big a deal, since the loss will be
7239 * uniform across all VCPUs (not to mention the scenario is extremely
7240 * unlikely). It is possible that a second hibernate recovery happens
7241 * much faster than a first, causing the observed TSC here to be
7242 * smaller; this would require additional padding adjustment, which is
7243 * why we set last_host_tsc to the local tsc observed here.
7245 * N.B. - this code below runs only on platforms with reliable TSC,
7246 * as that is the only way backwards_tsc is set above. Also note
7247 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7248 * have the same delta_cyc adjustment applied if backwards_tsc
7249 * is detected. Note further, this adjustment is only done once,
7250 * as we reset last_host_tsc on all VCPUs to stop this from being
7251 * called multiple times (one for each physical CPU bringup).
7253 * Platforms with unreliable TSCs don't have to deal with this, they
7254 * will be compensated by the logic in vcpu_load, which sets the TSC to
7255 * catchup mode. This will catchup all VCPUs to real time, but cannot
7256 * guarantee that they stay in perfect synchronization.
7258 if (backwards_tsc
) {
7259 u64 delta_cyc
= max_tsc
- local_tsc
;
7260 backwards_tsc_observed
= true;
7261 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7262 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7263 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
7264 vcpu
->arch
.last_host_tsc
= local_tsc
;
7265 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
7269 * We have to disable TSC offset matching.. if you were
7270 * booting a VM while issuing an S4 host suspend....
7271 * you may have some problem. Solving this issue is
7272 * left as an exercise to the reader.
7274 kvm
->arch
.last_tsc_nsec
= 0;
7275 kvm
->arch
.last_tsc_write
= 0;
7282 void kvm_arch_hardware_disable(void)
7284 kvm_x86_ops
->hardware_disable();
7285 drop_user_return_notifiers();
7288 int kvm_arch_hardware_setup(void)
7292 r
= kvm_x86_ops
->hardware_setup();
7296 kvm_init_msr_list();
7300 void kvm_arch_hardware_unsetup(void)
7302 kvm_x86_ops
->hardware_unsetup();
7305 void kvm_arch_check_processor_compat(void *rtn
)
7307 kvm_x86_ops
->check_processor_compatibility(rtn
);
7310 bool kvm_vcpu_compatible(struct kvm_vcpu
*vcpu
)
7312 return irqchip_in_kernel(vcpu
->kvm
) == (vcpu
->arch
.apic
!= NULL
);
7315 struct static_key kvm_no_apic_vcpu __read_mostly
;
7317 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
7323 BUG_ON(vcpu
->kvm
== NULL
);
7326 vcpu
->arch
.pv
.pv_unhalted
= false;
7327 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
7328 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_reset_bsp(vcpu
))
7329 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7331 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
7333 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
7338 vcpu
->arch
.pio_data
= page_address(page
);
7340 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
7342 r
= kvm_mmu_create(vcpu
);
7344 goto fail_free_pio_data
;
7346 if (irqchip_in_kernel(kvm
)) {
7347 r
= kvm_create_lapic(vcpu
);
7349 goto fail_mmu_destroy
;
7351 static_key_slow_inc(&kvm_no_apic_vcpu
);
7353 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
7355 if (!vcpu
->arch
.mce_banks
) {
7357 goto fail_free_lapic
;
7359 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
7361 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
)) {
7363 goto fail_free_mce_banks
;
7368 goto fail_free_wbinvd_dirty_mask
;
7370 vcpu
->arch
.ia32_tsc_adjust_msr
= 0x0;
7371 vcpu
->arch
.pv_time_enabled
= false;
7373 vcpu
->arch
.guest_supported_xcr0
= 0;
7374 vcpu
->arch
.guest_xstate_size
= XSAVE_HDR_SIZE
+ XSAVE_HDR_OFFSET
;
7376 vcpu
->arch
.maxphyaddr
= cpuid_query_maxphyaddr(vcpu
);
7378 kvm_async_pf_hash_reset(vcpu
);
7382 fail_free_wbinvd_dirty_mask
:
7383 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
7384 fail_free_mce_banks
:
7385 kfree(vcpu
->arch
.mce_banks
);
7387 kvm_free_lapic(vcpu
);
7389 kvm_mmu_destroy(vcpu
);
7391 free_page((unsigned long)vcpu
->arch
.pio_data
);
7396 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
7400 kvm_pmu_destroy(vcpu
);
7401 kfree(vcpu
->arch
.mce_banks
);
7402 kvm_free_lapic(vcpu
);
7403 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7404 kvm_mmu_destroy(vcpu
);
7405 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7406 free_page((unsigned long)vcpu
->arch
.pio_data
);
7407 if (!irqchip_in_kernel(vcpu
->kvm
))
7408 static_key_slow_dec(&kvm_no_apic_vcpu
);
7411 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
7413 kvm_x86_ops
->sched_in(vcpu
, cpu
);
7416 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
7421 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
7422 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
7423 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
7424 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
7425 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
7427 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7428 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
7429 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7430 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
7431 &kvm
->arch
.irq_sources_bitmap
);
7433 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
7434 mutex_init(&kvm
->arch
.apic_map_lock
);
7435 spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
7437 pvclock_update_vm_gtod_copy(kvm
);
7439 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
7440 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
7445 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
7448 r
= vcpu_load(vcpu
);
7450 kvm_mmu_unload(vcpu
);
7454 static void kvm_free_vcpus(struct kvm
*kvm
)
7457 struct kvm_vcpu
*vcpu
;
7460 * Unpin any mmu pages first.
7462 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7463 kvm_clear_async_pf_completion_queue(vcpu
);
7464 kvm_unload_vcpu_mmu(vcpu
);
7466 kvm_for_each_vcpu(i
, vcpu
, kvm
)
7467 kvm_arch_vcpu_free(vcpu
);
7469 mutex_lock(&kvm
->lock
);
7470 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
7471 kvm
->vcpus
[i
] = NULL
;
7473 atomic_set(&kvm
->online_vcpus
, 0);
7474 mutex_unlock(&kvm
->lock
);
7477 void kvm_arch_sync_events(struct kvm
*kvm
)
7479 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
7480 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
7481 kvm_free_all_assigned_devices(kvm
);
7485 void kvm_arch_destroy_vm(struct kvm
*kvm
)
7487 if (current
->mm
== kvm
->mm
) {
7489 * Free memory regions allocated on behalf of userspace,
7490 * unless the the memory map has changed due to process exit
7493 struct kvm_userspace_memory_region mem
;
7494 memset(&mem
, 0, sizeof(mem
));
7495 mem
.slot
= APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
;
7496 kvm_set_memory_region(kvm
, &mem
);
7498 mem
.slot
= IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
;
7499 kvm_set_memory_region(kvm
, &mem
);
7501 mem
.slot
= TSS_PRIVATE_MEMSLOT
;
7502 kvm_set_memory_region(kvm
, &mem
);
7504 kvm_iommu_unmap_guest(kvm
);
7505 kfree(kvm
->arch
.vpic
);
7506 kfree(kvm
->arch
.vioapic
);
7507 kvm_free_vcpus(kvm
);
7508 kfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
7511 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*free
,
7512 struct kvm_memory_slot
*dont
)
7516 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7517 if (!dont
|| free
->arch
.rmap
[i
] != dont
->arch
.rmap
[i
]) {
7518 kvfree(free
->arch
.rmap
[i
]);
7519 free
->arch
.rmap
[i
] = NULL
;
7524 if (!dont
|| free
->arch
.lpage_info
[i
- 1] !=
7525 dont
->arch
.lpage_info
[i
- 1]) {
7526 kvfree(free
->arch
.lpage_info
[i
- 1]);
7527 free
->arch
.lpage_info
[i
- 1] = NULL
;
7532 int kvm_arch_create_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
,
7533 unsigned long npages
)
7537 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7542 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
7543 slot
->base_gfn
, level
) + 1;
7545 slot
->arch
.rmap
[i
] =
7546 kvm_kvzalloc(lpages
* sizeof(*slot
->arch
.rmap
[i
]));
7547 if (!slot
->arch
.rmap
[i
])
7552 slot
->arch
.lpage_info
[i
- 1] = kvm_kvzalloc(lpages
*
7553 sizeof(*slot
->arch
.lpage_info
[i
- 1]));
7554 if (!slot
->arch
.lpage_info
[i
- 1])
7557 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
7558 slot
->arch
.lpage_info
[i
- 1][0].write_count
= 1;
7559 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
7560 slot
->arch
.lpage_info
[i
- 1][lpages
- 1].write_count
= 1;
7561 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
7563 * If the gfn and userspace address are not aligned wrt each
7564 * other, or if explicitly asked to, disable large page
7565 * support for this slot
7567 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1) ||
7568 !kvm_largepages_enabled()) {
7571 for (j
= 0; j
< lpages
; ++j
)
7572 slot
->arch
.lpage_info
[i
- 1][j
].write_count
= 1;
7579 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7580 kvfree(slot
->arch
.rmap
[i
]);
7581 slot
->arch
.rmap
[i
] = NULL
;
7585 kvfree(slot
->arch
.lpage_info
[i
- 1]);
7586 slot
->arch
.lpage_info
[i
- 1] = NULL
;
7591 void kvm_arch_memslots_updated(struct kvm
*kvm
)
7594 * memslots->generation has been incremented.
7595 * mmio generation may have reached its maximum value.
7597 kvm_mmu_invalidate_mmio_sptes(kvm
);
7600 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
7601 struct kvm_memory_slot
*memslot
,
7602 struct kvm_userspace_memory_region
*mem
,
7603 enum kvm_mr_change change
)
7606 * Only private memory slots need to be mapped here since
7607 * KVM_SET_MEMORY_REGION ioctl is no longer supported.
7609 if ((memslot
->id
>= KVM_USER_MEM_SLOTS
) && (change
== KVM_MR_CREATE
)) {
7610 unsigned long userspace_addr
;
7613 * MAP_SHARED to prevent internal slot pages from being moved
7616 userspace_addr
= vm_mmap(NULL
, 0, memslot
->npages
* PAGE_SIZE
,
7617 PROT_READ
| PROT_WRITE
,
7618 MAP_SHARED
| MAP_ANONYMOUS
, 0);
7620 if (IS_ERR((void *)userspace_addr
))
7621 return PTR_ERR((void *)userspace_addr
);
7623 memslot
->userspace_addr
= userspace_addr
;
7629 static void kvm_mmu_slot_apply_flags(struct kvm
*kvm
,
7630 struct kvm_memory_slot
*new)
7632 /* Still write protect RO slot */
7633 if (new->flags
& KVM_MEM_READONLY
) {
7634 kvm_mmu_slot_remove_write_access(kvm
, new);
7639 * Call kvm_x86_ops dirty logging hooks when they are valid.
7641 * kvm_x86_ops->slot_disable_log_dirty is called when:
7643 * - KVM_MR_CREATE with dirty logging is disabled
7644 * - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
7646 * The reason is, in case of PML, we need to set D-bit for any slots
7647 * with dirty logging disabled in order to eliminate unnecessary GPA
7648 * logging in PML buffer (and potential PML buffer full VMEXT). This
7649 * guarantees leaving PML enabled during guest's lifetime won't have
7650 * any additonal overhead from PML when guest is running with dirty
7651 * logging disabled for memory slots.
7653 * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
7654 * to dirty logging mode.
7656 * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
7658 * In case of write protect:
7660 * Write protect all pages for dirty logging.
7662 * All the sptes including the large sptes which point to this
7663 * slot are set to readonly. We can not create any new large
7664 * spte on this slot until the end of the logging.
7666 * See the comments in fast_page_fault().
7668 if (new->flags
& KVM_MEM_LOG_DIRTY_PAGES
) {
7669 if (kvm_x86_ops
->slot_enable_log_dirty
)
7670 kvm_x86_ops
->slot_enable_log_dirty(kvm
, new);
7672 kvm_mmu_slot_remove_write_access(kvm
, new);
7674 if (kvm_x86_ops
->slot_disable_log_dirty
)
7675 kvm_x86_ops
->slot_disable_log_dirty(kvm
, new);
7679 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
7680 struct kvm_userspace_memory_region
*mem
,
7681 const struct kvm_memory_slot
*old
,
7682 enum kvm_mr_change change
)
7684 struct kvm_memory_slot
*new;
7685 int nr_mmu_pages
= 0;
7687 if ((mem
->slot
>= KVM_USER_MEM_SLOTS
) && (change
== KVM_MR_DELETE
)) {
7690 ret
= vm_munmap(old
->userspace_addr
,
7691 old
->npages
* PAGE_SIZE
);
7694 "kvm_vm_ioctl_set_memory_region: "
7695 "failed to munmap memory\n");
7698 if (!kvm
->arch
.n_requested_mmu_pages
)
7699 nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
7702 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
7704 /* It's OK to get 'new' slot here as it has already been installed */
7705 new = id_to_memslot(kvm
->memslots
, mem
->slot
);
7708 * Dirty logging tracks sptes in 4k granularity, meaning that large
7709 * sptes have to be split. If live migration is successful, the guest
7710 * in the source machine will be destroyed and large sptes will be
7711 * created in the destination. However, if the guest continues to run
7712 * in the source machine (for example if live migration fails), small
7713 * sptes will remain around and cause bad performance.
7715 * Scan sptes if dirty logging has been stopped, dropping those
7716 * which can be collapsed into a single large-page spte. Later
7717 * page faults will create the large-page sptes.
7719 if ((change
!= KVM_MR_DELETE
) &&
7720 (old
->flags
& KVM_MEM_LOG_DIRTY_PAGES
) &&
7721 !(new->flags
& KVM_MEM_LOG_DIRTY_PAGES
))
7722 kvm_mmu_zap_collapsible_sptes(kvm
, new);
7725 * Set up write protection and/or dirty logging for the new slot.
7727 * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
7728 * been zapped so no dirty logging staff is needed for old slot. For
7729 * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
7730 * new and it's also covered when dealing with the new slot.
7732 if (change
!= KVM_MR_DELETE
)
7733 kvm_mmu_slot_apply_flags(kvm
, new);
7736 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
7738 kvm_mmu_invalidate_zap_all_pages(kvm
);
7741 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
7742 struct kvm_memory_slot
*slot
)
7744 kvm_mmu_invalidate_zap_all_pages(kvm
);
7747 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
7749 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
)
7750 kvm_x86_ops
->check_nested_events(vcpu
, false);
7752 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
7753 !vcpu
->arch
.apf
.halted
)
7754 || !list_empty_careful(&vcpu
->async_pf
.done
)
7755 || kvm_apic_has_events(vcpu
)
7756 || vcpu
->arch
.pv
.pv_unhalted
7757 || atomic_read(&vcpu
->arch
.nmi_queued
) ||
7758 (kvm_arch_interrupt_allowed(vcpu
) &&
7759 kvm_cpu_has_interrupt(vcpu
));
7762 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
7764 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
7767 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
7769 return kvm_x86_ops
->interrupt_allowed(vcpu
);
7772 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
7774 if (is_64_bit_mode(vcpu
))
7775 return kvm_rip_read(vcpu
);
7776 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
7777 kvm_rip_read(vcpu
));
7779 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
7781 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
7783 return kvm_get_linear_rip(vcpu
) == linear_rip
;
7785 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
7787 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
7789 unsigned long rflags
;
7791 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
7792 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
7793 rflags
&= ~X86_EFLAGS_TF
;
7796 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
7798 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
7800 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
7801 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
7802 rflags
|= X86_EFLAGS_TF
;
7803 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
7806 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
7808 __kvm_set_rflags(vcpu
, rflags
);
7809 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7811 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
7813 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
7817 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
7821 r
= kvm_mmu_reload(vcpu
);
7825 if (!vcpu
->arch
.mmu
.direct_map
&&
7826 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
7829 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
7832 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
7834 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
7837 static inline u32
kvm_async_pf_next_probe(u32 key
)
7839 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
7842 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7844 u32 key
= kvm_async_pf_hash_fn(gfn
);
7846 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
7847 key
= kvm_async_pf_next_probe(key
);
7849 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
7852 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7855 u32 key
= kvm_async_pf_hash_fn(gfn
);
7857 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
7858 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
7859 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
7860 key
= kvm_async_pf_next_probe(key
);
7865 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7867 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
7870 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7874 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
7876 vcpu
->arch
.apf
.gfns
[i
] = ~0;
7878 j
= kvm_async_pf_next_probe(j
);
7879 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
7881 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
7883 * k lies cyclically in ]i,j]
7885 * |....j i.k.| or |.k..j i...|
7887 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
7888 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
7893 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
7896 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
7900 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
7901 struct kvm_async_pf
*work
)
7903 struct x86_exception fault
;
7905 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
7906 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
7908 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
7909 (vcpu
->arch
.apf
.send_user_only
&&
7910 kvm_x86_ops
->get_cpl(vcpu
) == 0))
7911 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
7912 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
7913 fault
.vector
= PF_VECTOR
;
7914 fault
.error_code_valid
= true;
7915 fault
.error_code
= 0;
7916 fault
.nested_page_fault
= false;
7917 fault
.address
= work
->arch
.token
;
7918 kvm_inject_page_fault(vcpu
, &fault
);
7922 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
7923 struct kvm_async_pf
*work
)
7925 struct x86_exception fault
;
7927 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
7928 if (work
->wakeup_all
)
7929 work
->arch
.token
= ~0; /* broadcast wakeup */
7931 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
7933 if ((vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) &&
7934 !apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
7935 fault
.vector
= PF_VECTOR
;
7936 fault
.error_code_valid
= true;
7937 fault
.error_code
= 0;
7938 fault
.nested_page_fault
= false;
7939 fault
.address
= work
->arch
.token
;
7940 kvm_inject_page_fault(vcpu
, &fault
);
7942 vcpu
->arch
.apf
.halted
= false;
7943 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7946 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
7948 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
7951 return !kvm_event_needs_reinjection(vcpu
) &&
7952 kvm_x86_ops
->interrupt_allowed(vcpu
);
7955 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
7957 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
7959 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
7961 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
7963 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
7965 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
7967 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
7969 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
7971 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
7973 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
7974 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
7975 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
7976 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
7977 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
7978 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
7979 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
7980 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
7981 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
7982 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
7983 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
7984 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
7985 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
7986 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window
);
7987 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full
);