2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
31 #include <linux/clocksource.h>
32 #include <linux/interrupt.h>
33 #include <linux/kvm.h>
35 #include <linux/vmalloc.h>
36 #include <linux/module.h>
37 #include <linux/mman.h>
38 #include <linux/highmem.h>
39 #include <linux/iommu.h>
40 #include <linux/intel-iommu.h>
41 #include <linux/cpufreq.h>
42 #include <linux/user-return-notifier.h>
43 #include <linux/srcu.h>
44 #include <linux/slab.h>
45 #include <linux/perf_event.h>
46 #include <linux/uaccess.h>
47 #include <linux/hash.h>
48 #include <linux/pci.h>
49 #include <trace/events/kvm.h>
51 #define CREATE_TRACE_POINTS
54 #include <asm/debugreg.h>
60 #include <asm/fpu-internal.h> /* Ugh! */
62 #include <asm/pvclock.h>
63 #include <asm/div64.h>
65 #define MAX_IO_MSRS 256
66 #define KVM_MAX_MCE_BANKS 32
67 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
69 #define emul_to_vcpu(ctxt) \
70 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
73 * - enable syscall per default because its emulated by KVM
74 * - enable LME and LMA per default on 64 bit KVM
78 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
80 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
83 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
84 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
86 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
87 static void process_nmi(struct kvm_vcpu
*vcpu
);
89 struct kvm_x86_ops
*kvm_x86_ops
;
90 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
92 static bool ignore_msrs
= 0;
93 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
95 bool kvm_has_tsc_control
;
96 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
97 u32 kvm_max_guest_tsc_khz
;
98 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
100 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
101 static u32 tsc_tolerance_ppm
= 250;
102 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
104 #define KVM_NR_SHARED_MSRS 16
106 struct kvm_shared_msrs_global
{
108 u32 msrs
[KVM_NR_SHARED_MSRS
];
111 struct kvm_shared_msrs
{
112 struct user_return_notifier urn
;
114 struct kvm_shared_msr_values
{
117 } values
[KVM_NR_SHARED_MSRS
];
120 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
121 static DEFINE_PER_CPU(struct kvm_shared_msrs
, shared_msrs
);
123 struct kvm_stats_debugfs_item debugfs_entries
[] = {
124 { "pf_fixed", VCPU_STAT(pf_fixed
) },
125 { "pf_guest", VCPU_STAT(pf_guest
) },
126 { "tlb_flush", VCPU_STAT(tlb_flush
) },
127 { "invlpg", VCPU_STAT(invlpg
) },
128 { "exits", VCPU_STAT(exits
) },
129 { "io_exits", VCPU_STAT(io_exits
) },
130 { "mmio_exits", VCPU_STAT(mmio_exits
) },
131 { "signal_exits", VCPU_STAT(signal_exits
) },
132 { "irq_window", VCPU_STAT(irq_window_exits
) },
133 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
134 { "halt_exits", VCPU_STAT(halt_exits
) },
135 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
136 { "hypercalls", VCPU_STAT(hypercalls
) },
137 { "request_irq", VCPU_STAT(request_irq_exits
) },
138 { "irq_exits", VCPU_STAT(irq_exits
) },
139 { "host_state_reload", VCPU_STAT(host_state_reload
) },
140 { "efer_reload", VCPU_STAT(efer_reload
) },
141 { "fpu_reload", VCPU_STAT(fpu_reload
) },
142 { "insn_emulation", VCPU_STAT(insn_emulation
) },
143 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
144 { "irq_injections", VCPU_STAT(irq_injections
) },
145 { "nmi_injections", VCPU_STAT(nmi_injections
) },
146 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
147 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
148 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
149 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
150 { "mmu_flooded", VM_STAT(mmu_flooded
) },
151 { "mmu_recycled", VM_STAT(mmu_recycled
) },
152 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
153 { "mmu_unsync", VM_STAT(mmu_unsync
) },
154 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
155 { "largepages", VM_STAT(lpages
) },
159 u64 __read_mostly host_xcr0
;
161 int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
163 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
166 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
167 vcpu
->arch
.apf
.gfns
[i
] = ~0;
170 static void kvm_on_user_return(struct user_return_notifier
*urn
)
173 struct kvm_shared_msrs
*locals
174 = container_of(urn
, struct kvm_shared_msrs
, urn
);
175 struct kvm_shared_msr_values
*values
;
177 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
178 values
= &locals
->values
[slot
];
179 if (values
->host
!= values
->curr
) {
180 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
181 values
->curr
= values
->host
;
184 locals
->registered
= false;
185 user_return_notifier_unregister(urn
);
188 static void shared_msr_update(unsigned slot
, u32 msr
)
190 struct kvm_shared_msrs
*smsr
;
193 smsr
= &__get_cpu_var(shared_msrs
);
194 /* only read, and nobody should modify it at this time,
195 * so don't need lock */
196 if (slot
>= shared_msrs_global
.nr
) {
197 printk(KERN_ERR
"kvm: invalid MSR slot!");
200 rdmsrl_safe(msr
, &value
);
201 smsr
->values
[slot
].host
= value
;
202 smsr
->values
[slot
].curr
= value
;
205 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
207 if (slot
>= shared_msrs_global
.nr
)
208 shared_msrs_global
.nr
= slot
+ 1;
209 shared_msrs_global
.msrs
[slot
] = msr
;
210 /* we need ensured the shared_msr_global have been updated */
213 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
215 static void kvm_shared_msr_cpu_online(void)
219 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
220 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
223 void kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
225 struct kvm_shared_msrs
*smsr
= &__get_cpu_var(shared_msrs
);
227 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
229 smsr
->values
[slot
].curr
= value
;
230 wrmsrl(shared_msrs_global
.msrs
[slot
], value
);
231 if (!smsr
->registered
) {
232 smsr
->urn
.on_user_return
= kvm_on_user_return
;
233 user_return_notifier_register(&smsr
->urn
);
234 smsr
->registered
= true;
237 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
239 static void drop_user_return_notifiers(void *ignore
)
241 struct kvm_shared_msrs
*smsr
= &__get_cpu_var(shared_msrs
);
243 if (smsr
->registered
)
244 kvm_on_user_return(&smsr
->urn
);
247 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
249 return vcpu
->arch
.apic_base
;
251 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
253 void kvm_set_apic_base(struct kvm_vcpu
*vcpu
, u64 data
)
255 /* TODO: reserve bits check */
256 kvm_lapic_set_base(vcpu
, data
);
258 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
260 #define EXCPT_BENIGN 0
261 #define EXCPT_CONTRIBUTORY 1
264 static int exception_class(int vector
)
274 return EXCPT_CONTRIBUTORY
;
281 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
282 unsigned nr
, bool has_error
, u32 error_code
,
288 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
290 if (!vcpu
->arch
.exception
.pending
) {
292 vcpu
->arch
.exception
.pending
= true;
293 vcpu
->arch
.exception
.has_error_code
= has_error
;
294 vcpu
->arch
.exception
.nr
= nr
;
295 vcpu
->arch
.exception
.error_code
= error_code
;
296 vcpu
->arch
.exception
.reinject
= reinject
;
300 /* to check exception */
301 prev_nr
= vcpu
->arch
.exception
.nr
;
302 if (prev_nr
== DF_VECTOR
) {
303 /* triple fault -> shutdown */
304 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
307 class1
= exception_class(prev_nr
);
308 class2
= exception_class(nr
);
309 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
310 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
311 /* generate double fault per SDM Table 5-5 */
312 vcpu
->arch
.exception
.pending
= true;
313 vcpu
->arch
.exception
.has_error_code
= true;
314 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
315 vcpu
->arch
.exception
.error_code
= 0;
317 /* replace previous exception with a new one in a hope
318 that instruction re-execution will regenerate lost
323 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
325 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
327 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
329 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
331 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
333 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
335 void kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
338 kvm_inject_gp(vcpu
, 0);
340 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
342 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
344 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
346 ++vcpu
->stat
.pf_guest
;
347 vcpu
->arch
.cr2
= fault
->address
;
348 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
350 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
352 void kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
354 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
355 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
357 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
360 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
362 atomic_inc(&vcpu
->arch
.nmi_queued
);
363 kvm_make_request(KVM_REQ_NMI
, vcpu
);
365 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
367 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
369 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
371 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
373 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
375 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
377 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
380 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
381 * a #GP and return false.
383 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
385 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
387 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
390 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
393 * This function will be used to read from the physical memory of the currently
394 * running guest. The difference to kvm_read_guest_page is that this function
395 * can read from guest physical or from the guest's guest physical memory.
397 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
398 gfn_t ngfn
, void *data
, int offset
, int len
,
404 ngpa
= gfn_to_gpa(ngfn
);
405 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
);
406 if (real_gfn
== UNMAPPED_GVA
)
409 real_gfn
= gpa_to_gfn(real_gfn
);
411 return kvm_read_guest_page(vcpu
->kvm
, real_gfn
, data
, offset
, len
);
413 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
415 int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
416 void *data
, int offset
, int len
, u32 access
)
418 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
419 data
, offset
, len
, access
);
423 * Load the pae pdptrs. Return true is they are all valid.
425 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
427 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
428 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
431 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
433 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
434 offset
* sizeof(u64
), sizeof(pdpte
),
435 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
440 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
441 if (is_present_gpte(pdpte
[i
]) &&
442 (pdpte
[i
] & vcpu
->arch
.mmu
.rsvd_bits_mask
[0][2])) {
449 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
450 __set_bit(VCPU_EXREG_PDPTR
,
451 (unsigned long *)&vcpu
->arch
.regs_avail
);
452 __set_bit(VCPU_EXREG_PDPTR
,
453 (unsigned long *)&vcpu
->arch
.regs_dirty
);
458 EXPORT_SYMBOL_GPL(load_pdptrs
);
460 static bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
462 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
468 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
471 if (!test_bit(VCPU_EXREG_PDPTR
,
472 (unsigned long *)&vcpu
->arch
.regs_avail
))
475 gfn
= (kvm_read_cr3(vcpu
) & ~31u) >> PAGE_SHIFT
;
476 offset
= (kvm_read_cr3(vcpu
) & ~31u) & (PAGE_SIZE
- 1);
477 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
478 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
481 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
487 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
489 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
490 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
|
491 X86_CR0_CD
| X86_CR0_NW
;
496 if (cr0
& 0xffffffff00000000UL
)
500 cr0
&= ~CR0_RESERVED_BITS
;
502 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
505 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
508 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
510 if ((vcpu
->arch
.efer
& EFER_LME
)) {
515 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
520 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
525 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
528 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
530 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
531 kvm_clear_async_pf_completion_queue(vcpu
);
532 kvm_async_pf_hash_reset(vcpu
);
535 if ((cr0
^ old_cr0
) & update_bits
)
536 kvm_mmu_reset_context(vcpu
);
539 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
541 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
543 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
545 EXPORT_SYMBOL_GPL(kvm_lmsw
);
547 int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
551 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
552 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
555 if (kvm_x86_ops
->get_cpl(vcpu
) != 0)
557 if (!(xcr0
& XSTATE_FP
))
559 if ((xcr0
& XSTATE_YMM
) && !(xcr0
& XSTATE_SSE
))
561 if (xcr0
& ~host_xcr0
)
563 vcpu
->arch
.xcr0
= xcr0
;
564 vcpu
->guest_xcr0_loaded
= 0;
568 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
570 if (__kvm_set_xcr(vcpu
, index
, xcr
)) {
571 kvm_inject_gp(vcpu
, 0);
576 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
578 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
580 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
581 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
|
582 X86_CR4_PAE
| X86_CR4_SMEP
;
583 if (cr4
& CR4_RESERVED_BITS
)
586 if (!guest_cpuid_has_xsave(vcpu
) && (cr4
& X86_CR4_OSXSAVE
))
589 if (!guest_cpuid_has_smep(vcpu
) && (cr4
& X86_CR4_SMEP
))
592 if (!guest_cpuid_has_fsgsbase(vcpu
) && (cr4
& X86_CR4_RDWRGSFS
))
595 if (is_long_mode(vcpu
)) {
596 if (!(cr4
& X86_CR4_PAE
))
598 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
599 && ((cr4
^ old_cr4
) & pdptr_bits
)
600 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
604 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
605 if (!guest_cpuid_has_pcid(vcpu
))
608 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
609 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
613 if (kvm_x86_ops
->set_cr4(vcpu
, cr4
))
616 if (((cr4
^ old_cr4
) & pdptr_bits
) ||
617 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
618 kvm_mmu_reset_context(vcpu
);
620 if ((cr4
^ old_cr4
) & X86_CR4_OSXSAVE
)
621 kvm_update_cpuid(vcpu
);
625 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
627 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
629 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
630 kvm_mmu_sync_roots(vcpu
);
631 kvm_mmu_flush_tlb(vcpu
);
635 if (is_long_mode(vcpu
)) {
636 if (kvm_read_cr4(vcpu
) & X86_CR4_PCIDE
) {
637 if (cr3
& CR3_PCID_ENABLED_RESERVED_BITS
)
640 if (cr3
& CR3_L_MODE_RESERVED_BITS
)
644 if (cr3
& CR3_PAE_RESERVED_BITS
)
646 if (is_paging(vcpu
) &&
647 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
651 * We don't check reserved bits in nonpae mode, because
652 * this isn't enforced, and VMware depends on this.
657 * Does the new cr3 value map to physical memory? (Note, we
658 * catch an invalid cr3 even in real-mode, because it would
659 * cause trouble later on when we turn on paging anyway.)
661 * A real CPU would silently accept an invalid cr3 and would
662 * attempt to use it - with largely undefined (and often hard
663 * to debug) behavior on the guest side.
665 if (unlikely(!gfn_to_memslot(vcpu
->kvm
, cr3
>> PAGE_SHIFT
)))
667 vcpu
->arch
.cr3
= cr3
;
668 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
669 vcpu
->arch
.mmu
.new_cr3(vcpu
);
672 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
674 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
676 if (cr8
& CR8_RESERVED_BITS
)
678 if (irqchip_in_kernel(vcpu
->kvm
))
679 kvm_lapic_set_tpr(vcpu
, cr8
);
681 vcpu
->arch
.cr8
= cr8
;
684 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
686 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
688 if (irqchip_in_kernel(vcpu
->kvm
))
689 return kvm_lapic_get_cr8(vcpu
);
691 return vcpu
->arch
.cr8
;
693 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
695 static void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
699 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
700 dr7
= vcpu
->arch
.guest_debug_dr7
;
702 dr7
= vcpu
->arch
.dr7
;
703 kvm_x86_ops
->set_dr7(vcpu
, dr7
);
704 vcpu
->arch
.switch_db_regs
= (dr7
& DR7_BP_EN_MASK
);
707 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
711 vcpu
->arch
.db
[dr
] = val
;
712 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
713 vcpu
->arch
.eff_db
[dr
] = val
;
716 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
720 if (val
& 0xffffffff00000000ULL
)
722 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | DR6_FIXED_1
;
725 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
729 if (val
& 0xffffffff00000000ULL
)
731 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
732 kvm_update_dr7(vcpu
);
739 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
743 res
= __kvm_set_dr(vcpu
, dr
, val
);
745 kvm_queue_exception(vcpu
, UD_VECTOR
);
747 kvm_inject_gp(vcpu
, 0);
751 EXPORT_SYMBOL_GPL(kvm_set_dr
);
753 static int _kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
757 *val
= vcpu
->arch
.db
[dr
];
760 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
764 *val
= vcpu
->arch
.dr6
;
767 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
771 *val
= vcpu
->arch
.dr7
;
778 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
780 if (_kvm_get_dr(vcpu
, dr
, val
)) {
781 kvm_queue_exception(vcpu
, UD_VECTOR
);
786 EXPORT_SYMBOL_GPL(kvm_get_dr
);
788 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
790 u32 ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
794 err
= kvm_pmu_read_pmc(vcpu
, ecx
, &data
);
797 kvm_register_write(vcpu
, VCPU_REGS_RAX
, (u32
)data
);
798 kvm_register_write(vcpu
, VCPU_REGS_RDX
, data
>> 32);
801 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
804 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
805 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
807 * This list is modified at module load time to reflect the
808 * capabilities of the host cpu. This capabilities test skips MSRs that are
809 * kvm-specific. Those are put in the beginning of the list.
812 #define KVM_SAVE_MSRS_BEGIN 10
813 static u32 msrs_to_save
[] = {
814 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
815 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
816 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
817 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
819 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
822 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
824 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
827 static unsigned num_msrs_to_save
;
829 static const u32 emulated_msrs
[] = {
830 MSR_IA32_TSCDEADLINE
,
831 MSR_IA32_MISC_ENABLE
,
836 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
838 u64 old_efer
= vcpu
->arch
.efer
;
840 if (efer
& efer_reserved_bits
)
844 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
847 if (efer
& EFER_FFXSR
) {
848 struct kvm_cpuid_entry2
*feat
;
850 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
851 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
)))
855 if (efer
& EFER_SVME
) {
856 struct kvm_cpuid_entry2
*feat
;
858 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
859 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
)))
864 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
866 kvm_x86_ops
->set_efer(vcpu
, efer
);
868 vcpu
->arch
.mmu
.base_role
.nxe
= (efer
& EFER_NX
) && !tdp_enabled
;
870 /* Update reserved bits */
871 if ((efer
^ old_efer
) & EFER_NX
)
872 kvm_mmu_reset_context(vcpu
);
877 void kvm_enable_efer_bits(u64 mask
)
879 efer_reserved_bits
&= ~mask
;
881 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
885 * Writes msr value into into the appropriate "register".
886 * Returns 0 on success, non-0 otherwise.
887 * Assumes vcpu_load() was already called.
889 int kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64 data
)
891 return kvm_x86_ops
->set_msr(vcpu
, msr_index
, data
);
895 * Adapt set_msr() to msr_io()'s calling convention
897 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
899 return kvm_set_msr(vcpu
, index
, *data
);
902 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
906 struct pvclock_wall_clock wc
;
907 struct timespec boot
;
912 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
917 ++version
; /* first time write, random junk */
921 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
924 * The guest calculates current wall clock time by adding
925 * system time (updated by kvm_guest_time_update below) to the
926 * wall clock specified here. guest system time equals host
927 * system time for us, thus we must fill in host boot time here.
931 if (kvm
->arch
.kvmclock_offset
) {
932 struct timespec ts
= ns_to_timespec(kvm
->arch
.kvmclock_offset
);
933 boot
= timespec_sub(boot
, ts
);
935 wc
.sec
= boot
.tv_sec
;
936 wc
.nsec
= boot
.tv_nsec
;
937 wc
.version
= version
;
939 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
942 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
945 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
947 uint32_t quotient
, remainder
;
949 /* Don't try to replace with do_div(), this one calculates
950 * "(dividend << 32) / divisor" */
952 : "=a" (quotient
), "=d" (remainder
)
953 : "0" (0), "1" (dividend
), "r" (divisor
) );
957 static void kvm_get_time_scale(uint32_t scaled_khz
, uint32_t base_khz
,
958 s8
*pshift
, u32
*pmultiplier
)
965 tps64
= base_khz
* 1000LL;
966 scaled64
= scaled_khz
* 1000LL;
967 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
972 tps32
= (uint32_t)tps64
;
973 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
974 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
982 *pmultiplier
= div_frac(scaled64
, tps32
);
984 pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
985 __func__
, base_khz
, scaled_khz
, shift
, *pmultiplier
);
988 static inline u64
get_kernel_ns(void)
992 WARN_ON(preemptible());
994 monotonic_to_bootbased(&ts
);
995 return timespec_to_ns(&ts
);
998 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
999 unsigned long max_tsc_khz
;
1001 static inline u64
nsec_to_cycles(struct kvm_vcpu
*vcpu
, u64 nsec
)
1003 return pvclock_scale_delta(nsec
, vcpu
->arch
.virtual_tsc_mult
,
1004 vcpu
->arch
.virtual_tsc_shift
);
1007 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
1009 u64 v
= (u64
)khz
* (1000000 + ppm
);
1014 static void kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 this_tsc_khz
)
1016 u32 thresh_lo
, thresh_hi
;
1017 int use_scaling
= 0;
1019 /* Compute a scale to convert nanoseconds in TSC cycles */
1020 kvm_get_time_scale(this_tsc_khz
, NSEC_PER_SEC
/ 1000,
1021 &vcpu
->arch
.virtual_tsc_shift
,
1022 &vcpu
->arch
.virtual_tsc_mult
);
1023 vcpu
->arch
.virtual_tsc_khz
= this_tsc_khz
;
1026 * Compute the variation in TSC rate which is acceptable
1027 * within the range of tolerance and decide if the
1028 * rate being applied is within that bounds of the hardware
1029 * rate. If so, no scaling or compensation need be done.
1031 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
1032 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
1033 if (this_tsc_khz
< thresh_lo
|| this_tsc_khz
> thresh_hi
) {
1034 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz
, thresh_lo
, thresh_hi
);
1037 kvm_x86_ops
->set_tsc_khz(vcpu
, this_tsc_khz
, use_scaling
);
1040 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1042 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
1043 vcpu
->arch
.virtual_tsc_mult
,
1044 vcpu
->arch
.virtual_tsc_shift
);
1045 tsc
+= vcpu
->arch
.this_tsc_write
;
1049 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, u64 data
)
1051 struct kvm
*kvm
= vcpu
->kvm
;
1052 u64 offset
, ns
, elapsed
;
1053 unsigned long flags
;
1056 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1057 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
, data
);
1058 ns
= get_kernel_ns();
1059 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1061 /* n.b - signed multiplication and division required */
1062 usdiff
= data
- kvm
->arch
.last_tsc_write
;
1063 #ifdef CONFIG_X86_64
1064 usdiff
= (usdiff
* 1000) / vcpu
->arch
.virtual_tsc_khz
;
1066 /* do_div() only does unsigned */
1067 asm("idivl %2; xor %%edx, %%edx"
1069 : "A"(usdiff
* 1000), "rm"(vcpu
->arch
.virtual_tsc_khz
));
1071 do_div(elapsed
, 1000);
1077 * Special case: TSC write with a small delta (1 second) of virtual
1078 * cycle time against real time is interpreted as an attempt to
1079 * synchronize the CPU.
1081 * For a reliable TSC, we can match TSC offsets, and for an unstable
1082 * TSC, we add elapsed time in this computation. We could let the
1083 * compensation code attempt to catch up if we fall behind, but
1084 * it's better to try to match offsets from the beginning.
1086 if (usdiff
< USEC_PER_SEC
&&
1087 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
1088 if (!check_tsc_unstable()) {
1089 offset
= kvm
->arch
.cur_tsc_offset
;
1090 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1092 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
1094 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
, data
);
1095 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1099 * We split periods of matched TSC writes into generations.
1100 * For each generation, we track the original measured
1101 * nanosecond time, offset, and write, so if TSCs are in
1102 * sync, we can match exact offset, and if not, we can match
1103 * exact software computation in compute_guest_tsc()
1105 * These values are tracked in kvm->arch.cur_xxx variables.
1107 kvm
->arch
.cur_tsc_generation
++;
1108 kvm
->arch
.cur_tsc_nsec
= ns
;
1109 kvm
->arch
.cur_tsc_write
= data
;
1110 kvm
->arch
.cur_tsc_offset
= offset
;
1111 pr_debug("kvm: new tsc generation %u, clock %llu\n",
1112 kvm
->arch
.cur_tsc_generation
, data
);
1116 * We also track th most recent recorded KHZ, write and time to
1117 * allow the matching interval to be extended at each write.
1119 kvm
->arch
.last_tsc_nsec
= ns
;
1120 kvm
->arch
.last_tsc_write
= data
;
1121 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
1123 /* Reset of TSC must disable overshoot protection below */
1124 vcpu
->arch
.hv_clock
.tsc_timestamp
= 0;
1125 vcpu
->arch
.last_guest_tsc
= data
;
1127 /* Keep track of which generation this VCPU has synchronized to */
1128 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
1129 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
1130 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
1132 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1133 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1136 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1138 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1140 unsigned long flags
;
1141 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1143 unsigned long this_tsc_khz
;
1144 s64 kernel_ns
, max_kernel_ns
;
1148 /* Keep irq disabled to prevent changes to the clock */
1149 local_irq_save(flags
);
1150 tsc_timestamp
= kvm_x86_ops
->read_l1_tsc(v
);
1151 kernel_ns
= get_kernel_ns();
1152 this_tsc_khz
= __get_cpu_var(cpu_tsc_khz
);
1153 if (unlikely(this_tsc_khz
== 0)) {
1154 local_irq_restore(flags
);
1155 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1160 * We may have to catch up the TSC to match elapsed wall clock
1161 * time for two reasons, even if kvmclock is used.
1162 * 1) CPU could have been running below the maximum TSC rate
1163 * 2) Broken TSC compensation resets the base at each VCPU
1164 * entry to avoid unknown leaps of TSC even when running
1165 * again on the same CPU. This may cause apparent elapsed
1166 * time to disappear, and the guest to stand still or run
1169 if (vcpu
->tsc_catchup
) {
1170 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1171 if (tsc
> tsc_timestamp
) {
1172 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
1173 tsc_timestamp
= tsc
;
1177 local_irq_restore(flags
);
1179 if (!vcpu
->time_page
)
1183 * Time as measured by the TSC may go backwards when resetting the base
1184 * tsc_timestamp. The reason for this is that the TSC resolution is
1185 * higher than the resolution of the other clock scales. Thus, many
1186 * possible measurments of the TSC correspond to one measurement of any
1187 * other clock, and so a spread of values is possible. This is not a
1188 * problem for the computation of the nanosecond clock; with TSC rates
1189 * around 1GHZ, there can only be a few cycles which correspond to one
1190 * nanosecond value, and any path through this code will inevitably
1191 * take longer than that. However, with the kernel_ns value itself,
1192 * the precision may be much lower, down to HZ granularity. If the
1193 * first sampling of TSC against kernel_ns ends in the low part of the
1194 * range, and the second in the high end of the range, we can get:
1196 * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1198 * As the sampling errors potentially range in the thousands of cycles,
1199 * it is possible such a time value has already been observed by the
1200 * guest. To protect against this, we must compute the system time as
1201 * observed by the guest and ensure the new system time is greater.
1204 if (vcpu
->hv_clock
.tsc_timestamp
) {
1205 max_kernel_ns
= vcpu
->last_guest_tsc
-
1206 vcpu
->hv_clock
.tsc_timestamp
;
1207 max_kernel_ns
= pvclock_scale_delta(max_kernel_ns
,
1208 vcpu
->hv_clock
.tsc_to_system_mul
,
1209 vcpu
->hv_clock
.tsc_shift
);
1210 max_kernel_ns
+= vcpu
->last_kernel_ns
;
1213 if (unlikely(vcpu
->hw_tsc_khz
!= this_tsc_khz
)) {
1214 kvm_get_time_scale(NSEC_PER_SEC
/ 1000, this_tsc_khz
,
1215 &vcpu
->hv_clock
.tsc_shift
,
1216 &vcpu
->hv_clock
.tsc_to_system_mul
);
1217 vcpu
->hw_tsc_khz
= this_tsc_khz
;
1220 if (max_kernel_ns
> kernel_ns
)
1221 kernel_ns
= max_kernel_ns
;
1223 /* With all the info we got, fill in the values */
1224 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
1225 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
1226 vcpu
->last_kernel_ns
= kernel_ns
;
1227 vcpu
->last_guest_tsc
= tsc_timestamp
;
1230 if (vcpu
->pvclock_set_guest_stopped_request
) {
1231 pvclock_flags
|= PVCLOCK_GUEST_STOPPED
;
1232 vcpu
->pvclock_set_guest_stopped_request
= false;
1235 vcpu
->hv_clock
.flags
= pvclock_flags
;
1238 * The interface expects us to write an even number signaling that the
1239 * update is finished. Since the guest won't see the intermediate
1240 * state, we just increase by 2 at the end.
1242 vcpu
->hv_clock
.version
+= 2;
1244 shared_kaddr
= kmap_atomic(vcpu
->time_page
);
1246 memcpy(shared_kaddr
+ vcpu
->time_offset
, &vcpu
->hv_clock
,
1247 sizeof(vcpu
->hv_clock
));
1249 kunmap_atomic(shared_kaddr
);
1251 mark_page_dirty(v
->kvm
, vcpu
->time
>> PAGE_SHIFT
);
1255 static bool msr_mtrr_valid(unsigned msr
)
1258 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR
- 1:
1259 case MSR_MTRRfix64K_00000
:
1260 case MSR_MTRRfix16K_80000
:
1261 case MSR_MTRRfix16K_A0000
:
1262 case MSR_MTRRfix4K_C0000
:
1263 case MSR_MTRRfix4K_C8000
:
1264 case MSR_MTRRfix4K_D0000
:
1265 case MSR_MTRRfix4K_D8000
:
1266 case MSR_MTRRfix4K_E0000
:
1267 case MSR_MTRRfix4K_E8000
:
1268 case MSR_MTRRfix4K_F0000
:
1269 case MSR_MTRRfix4K_F8000
:
1270 case MSR_MTRRdefType
:
1271 case MSR_IA32_CR_PAT
:
1279 static bool valid_pat_type(unsigned t
)
1281 return t
< 8 && (1 << t
) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1284 static bool valid_mtrr_type(unsigned t
)
1286 return t
< 8 && (1 << t
) & 0x73; /* 0, 1, 4, 5, 6 */
1289 static bool mtrr_valid(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1293 if (!msr_mtrr_valid(msr
))
1296 if (msr
== MSR_IA32_CR_PAT
) {
1297 for (i
= 0; i
< 8; i
++)
1298 if (!valid_pat_type((data
>> (i
* 8)) & 0xff))
1301 } else if (msr
== MSR_MTRRdefType
) {
1304 return valid_mtrr_type(data
& 0xff);
1305 } else if (msr
>= MSR_MTRRfix64K_00000
&& msr
<= MSR_MTRRfix4K_F8000
) {
1306 for (i
= 0; i
< 8 ; i
++)
1307 if (!valid_mtrr_type((data
>> (i
* 8)) & 0xff))
1312 /* variable MTRRs */
1313 return valid_mtrr_type(data
& 0xff);
1316 static int set_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1318 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
1320 if (!mtrr_valid(vcpu
, msr
, data
))
1323 if (msr
== MSR_MTRRdefType
) {
1324 vcpu
->arch
.mtrr_state
.def_type
= data
;
1325 vcpu
->arch
.mtrr_state
.enabled
= (data
& 0xc00) >> 10;
1326 } else if (msr
== MSR_MTRRfix64K_00000
)
1328 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
1329 p
[1 + msr
- MSR_MTRRfix16K_80000
] = data
;
1330 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
1331 p
[3 + msr
- MSR_MTRRfix4K_C0000
] = data
;
1332 else if (msr
== MSR_IA32_CR_PAT
)
1333 vcpu
->arch
.pat
= data
;
1334 else { /* Variable MTRRs */
1335 int idx
, is_mtrr_mask
;
1338 idx
= (msr
- 0x200) / 2;
1339 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
1342 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
1345 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
1349 kvm_mmu_reset_context(vcpu
);
1353 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1355 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1356 unsigned bank_num
= mcg_cap
& 0xff;
1359 case MSR_IA32_MCG_STATUS
:
1360 vcpu
->arch
.mcg_status
= data
;
1362 case MSR_IA32_MCG_CTL
:
1363 if (!(mcg_cap
& MCG_CTL_P
))
1365 if (data
!= 0 && data
!= ~(u64
)0)
1367 vcpu
->arch
.mcg_ctl
= data
;
1370 if (msr
>= MSR_IA32_MC0_CTL
&&
1371 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
1372 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1373 /* only 0 or all 1s can be written to IA32_MCi_CTL
1374 * some Linux kernels though clear bit 10 in bank 4 to
1375 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1376 * this to avoid an uncatched #GP in the guest
1378 if ((offset
& 0x3) == 0 &&
1379 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
1381 vcpu
->arch
.mce_banks
[offset
] = data
;
1389 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
1391 struct kvm
*kvm
= vcpu
->kvm
;
1392 int lm
= is_long_mode(vcpu
);
1393 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
1394 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
1395 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
1396 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
1397 u32 page_num
= data
& ~PAGE_MASK
;
1398 u64 page_addr
= data
& PAGE_MASK
;
1403 if (page_num
>= blob_size
)
1406 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
1411 if (kvm_write_guest(kvm
, page_addr
, page
, PAGE_SIZE
))
1420 static bool kvm_hv_hypercall_enabled(struct kvm
*kvm
)
1422 return kvm
->arch
.hv_hypercall
& HV_X64_MSR_HYPERCALL_ENABLE
;
1425 static bool kvm_hv_msr_partition_wide(u32 msr
)
1429 case HV_X64_MSR_GUEST_OS_ID
:
1430 case HV_X64_MSR_HYPERCALL
:
1438 static int set_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1440 struct kvm
*kvm
= vcpu
->kvm
;
1443 case HV_X64_MSR_GUEST_OS_ID
:
1444 kvm
->arch
.hv_guest_os_id
= data
;
1445 /* setting guest os id to zero disables hypercall page */
1446 if (!kvm
->arch
.hv_guest_os_id
)
1447 kvm
->arch
.hv_hypercall
&= ~HV_X64_MSR_HYPERCALL_ENABLE
;
1449 case HV_X64_MSR_HYPERCALL
: {
1454 /* if guest os id is not set hypercall should remain disabled */
1455 if (!kvm
->arch
.hv_guest_os_id
)
1457 if (!(data
& HV_X64_MSR_HYPERCALL_ENABLE
)) {
1458 kvm
->arch
.hv_hypercall
= data
;
1461 gfn
= data
>> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT
;
1462 addr
= gfn_to_hva(kvm
, gfn
);
1463 if (kvm_is_error_hva(addr
))
1465 kvm_x86_ops
->patch_hypercall(vcpu
, instructions
);
1466 ((unsigned char *)instructions
)[3] = 0xc3; /* ret */
1467 if (__copy_to_user((void __user
*)addr
, instructions
, 4))
1469 kvm
->arch
.hv_hypercall
= data
;
1473 vcpu_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1474 "data 0x%llx\n", msr
, data
);
1480 static int set_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1483 case HV_X64_MSR_APIC_ASSIST_PAGE
: {
1486 if (!(data
& HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE
)) {
1487 vcpu
->arch
.hv_vapic
= data
;
1490 addr
= gfn_to_hva(vcpu
->kvm
, data
>>
1491 HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT
);
1492 if (kvm_is_error_hva(addr
))
1494 if (__clear_user((void __user
*)addr
, PAGE_SIZE
))
1496 vcpu
->arch
.hv_vapic
= data
;
1499 case HV_X64_MSR_EOI
:
1500 return kvm_hv_vapic_msr_write(vcpu
, APIC_EOI
, data
);
1501 case HV_X64_MSR_ICR
:
1502 return kvm_hv_vapic_msr_write(vcpu
, APIC_ICR
, data
);
1503 case HV_X64_MSR_TPR
:
1504 return kvm_hv_vapic_msr_write(vcpu
, APIC_TASKPRI
, data
);
1506 vcpu_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1507 "data 0x%llx\n", msr
, data
);
1514 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
1516 gpa_t gpa
= data
& ~0x3f;
1518 /* Bits 2:5 are reserved, Should be zero */
1522 vcpu
->arch
.apf
.msr_val
= data
;
1524 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
1525 kvm_clear_async_pf_completion_queue(vcpu
);
1526 kvm_async_pf_hash_reset(vcpu
);
1530 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
))
1533 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
1534 kvm_async_pf_wakeup_all(vcpu
);
1538 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
1540 if (vcpu
->arch
.time_page
) {
1541 kvm_release_page_dirty(vcpu
->arch
.time_page
);
1542 vcpu
->arch
.time_page
= NULL
;
1546 static void accumulate_steal_time(struct kvm_vcpu
*vcpu
)
1550 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
1553 delta
= current
->sched_info
.run_delay
- vcpu
->arch
.st
.last_steal
;
1554 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
1555 vcpu
->arch
.st
.accum_steal
= delta
;
1558 static void record_steal_time(struct kvm_vcpu
*vcpu
)
1560 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
1563 if (unlikely(kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
1564 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
))))
1567 vcpu
->arch
.st
.steal
.steal
+= vcpu
->arch
.st
.accum_steal
;
1568 vcpu
->arch
.st
.steal
.version
+= 2;
1569 vcpu
->arch
.st
.accum_steal
= 0;
1571 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
1572 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
1575 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1581 return set_efer(vcpu
, data
);
1583 data
&= ~(u64
)0x40; /* ignore flush filter disable */
1584 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
1585 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
1587 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
1592 case MSR_FAM10H_MMIO_CONF_BASE
:
1594 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
1599 case MSR_AMD64_NB_CFG
:
1601 case MSR_IA32_DEBUGCTLMSR
:
1603 /* We support the non-activated case already */
1605 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
1606 /* Values other than LBR and BTF are vendor-specific,
1607 thus reserved and should throw a #GP */
1610 vcpu_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1613 case MSR_IA32_UCODE_REV
:
1614 case MSR_IA32_UCODE_WRITE
:
1615 case MSR_VM_HSAVE_PA
:
1616 case MSR_AMD64_PATCH_LOADER
:
1618 case 0x200 ... 0x2ff:
1619 return set_msr_mtrr(vcpu
, msr
, data
);
1620 case MSR_IA32_APICBASE
:
1621 kvm_set_apic_base(vcpu
, data
);
1623 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
1624 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
1625 case MSR_IA32_TSCDEADLINE
:
1626 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
1628 case MSR_IA32_MISC_ENABLE
:
1629 vcpu
->arch
.ia32_misc_enable_msr
= data
;
1631 case MSR_KVM_WALL_CLOCK_NEW
:
1632 case MSR_KVM_WALL_CLOCK
:
1633 vcpu
->kvm
->arch
.wall_clock
= data
;
1634 kvm_write_wall_clock(vcpu
->kvm
, data
);
1636 case MSR_KVM_SYSTEM_TIME_NEW
:
1637 case MSR_KVM_SYSTEM_TIME
: {
1638 kvmclock_reset(vcpu
);
1640 vcpu
->arch
.time
= data
;
1641 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1643 /* we verify if the enable bit is set... */
1647 /* ...but clean it before doing the actual write */
1648 vcpu
->arch
.time_offset
= data
& ~(PAGE_MASK
| 1);
1650 vcpu
->arch
.time_page
=
1651 gfn_to_page(vcpu
->kvm
, data
>> PAGE_SHIFT
);
1653 if (is_error_page(vcpu
->arch
.time_page
))
1654 vcpu
->arch
.time_page
= NULL
;
1658 case MSR_KVM_ASYNC_PF_EN
:
1659 if (kvm_pv_enable_async_pf(vcpu
, data
))
1662 case MSR_KVM_STEAL_TIME
:
1664 if (unlikely(!sched_info_on()))
1667 if (data
& KVM_STEAL_RESERVED_MASK
)
1670 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
1671 data
& KVM_STEAL_VALID_BITS
))
1674 vcpu
->arch
.st
.msr_val
= data
;
1676 if (!(data
& KVM_MSR_ENABLED
))
1679 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
1682 accumulate_steal_time(vcpu
);
1685 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
1688 case MSR_KVM_PV_EOI_EN
:
1689 if (kvm_lapic_enable_pv_eoi(vcpu
, data
))
1693 case MSR_IA32_MCG_CTL
:
1694 case MSR_IA32_MCG_STATUS
:
1695 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
1696 return set_msr_mce(vcpu
, msr
, data
);
1698 /* Performance counters are not protected by a CPUID bit,
1699 * so we should check all of them in the generic path for the sake of
1700 * cross vendor migration.
1701 * Writing a zero into the event select MSRs disables them,
1702 * which we perfectly emulate ;-). Any other value should be at least
1703 * reported, some guests depend on them.
1705 case MSR_K7_EVNTSEL0
:
1706 case MSR_K7_EVNTSEL1
:
1707 case MSR_K7_EVNTSEL2
:
1708 case MSR_K7_EVNTSEL3
:
1710 vcpu_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
1711 "0x%x data 0x%llx\n", msr
, data
);
1713 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1714 * so we ignore writes to make it happy.
1716 case MSR_K7_PERFCTR0
:
1717 case MSR_K7_PERFCTR1
:
1718 case MSR_K7_PERFCTR2
:
1719 case MSR_K7_PERFCTR3
:
1720 vcpu_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
1721 "0x%x data 0x%llx\n", msr
, data
);
1723 case MSR_P6_PERFCTR0
:
1724 case MSR_P6_PERFCTR1
:
1726 case MSR_P6_EVNTSEL0
:
1727 case MSR_P6_EVNTSEL1
:
1728 if (kvm_pmu_msr(vcpu
, msr
))
1729 return kvm_pmu_set_msr(vcpu
, msr
, data
);
1731 if (pr
|| data
!= 0)
1732 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
1733 "0x%x data 0x%llx\n", msr
, data
);
1735 case MSR_K7_CLK_CTL
:
1737 * Ignore all writes to this no longer documented MSR.
1738 * Writes are only relevant for old K7 processors,
1739 * all pre-dating SVM, but a recommended workaround from
1740 * AMD for these chips. It is possible to specify the
1741 * affected processor models on the command line, hence
1742 * the need to ignore the workaround.
1745 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
1746 if (kvm_hv_msr_partition_wide(msr
)) {
1748 mutex_lock(&vcpu
->kvm
->lock
);
1749 r
= set_msr_hyperv_pw(vcpu
, msr
, data
);
1750 mutex_unlock(&vcpu
->kvm
->lock
);
1753 return set_msr_hyperv(vcpu
, msr
, data
);
1755 case MSR_IA32_BBL_CR_CTL3
:
1756 /* Drop writes to this legacy MSR -- see rdmsr
1757 * counterpart for further detail.
1759 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n", msr
, data
);
1761 case MSR_AMD64_OSVW_ID_LENGTH
:
1762 if (!guest_cpuid_has_osvw(vcpu
))
1764 vcpu
->arch
.osvw
.length
= data
;
1766 case MSR_AMD64_OSVW_STATUS
:
1767 if (!guest_cpuid_has_osvw(vcpu
))
1769 vcpu
->arch
.osvw
.status
= data
;
1772 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
1773 return xen_hvm_config(vcpu
, data
);
1774 if (kvm_pmu_msr(vcpu
, msr
))
1775 return kvm_pmu_set_msr(vcpu
, msr
, data
);
1777 vcpu_unimpl(vcpu
, "unhandled wrmsr: 0x%x data %llx\n",
1781 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n",
1788 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
1792 * Reads an msr value (of 'msr_index') into 'pdata'.
1793 * Returns 0 on success, non-0 otherwise.
1794 * Assumes vcpu_load() was already called.
1796 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
1798 return kvm_x86_ops
->get_msr(vcpu
, msr_index
, pdata
);
1801 static int get_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1803 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
1805 if (!msr_mtrr_valid(msr
))
1808 if (msr
== MSR_MTRRdefType
)
1809 *pdata
= vcpu
->arch
.mtrr_state
.def_type
+
1810 (vcpu
->arch
.mtrr_state
.enabled
<< 10);
1811 else if (msr
== MSR_MTRRfix64K_00000
)
1813 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
1814 *pdata
= p
[1 + msr
- MSR_MTRRfix16K_80000
];
1815 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
1816 *pdata
= p
[3 + msr
- MSR_MTRRfix4K_C0000
];
1817 else if (msr
== MSR_IA32_CR_PAT
)
1818 *pdata
= vcpu
->arch
.pat
;
1819 else { /* Variable MTRRs */
1820 int idx
, is_mtrr_mask
;
1823 idx
= (msr
- 0x200) / 2;
1824 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
1827 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
1830 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
1837 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1840 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1841 unsigned bank_num
= mcg_cap
& 0xff;
1844 case MSR_IA32_P5_MC_ADDR
:
1845 case MSR_IA32_P5_MC_TYPE
:
1848 case MSR_IA32_MCG_CAP
:
1849 data
= vcpu
->arch
.mcg_cap
;
1851 case MSR_IA32_MCG_CTL
:
1852 if (!(mcg_cap
& MCG_CTL_P
))
1854 data
= vcpu
->arch
.mcg_ctl
;
1856 case MSR_IA32_MCG_STATUS
:
1857 data
= vcpu
->arch
.mcg_status
;
1860 if (msr
>= MSR_IA32_MC0_CTL
&&
1861 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
1862 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1863 data
= vcpu
->arch
.mce_banks
[offset
];
1872 static int get_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1875 struct kvm
*kvm
= vcpu
->kvm
;
1878 case HV_X64_MSR_GUEST_OS_ID
:
1879 data
= kvm
->arch
.hv_guest_os_id
;
1881 case HV_X64_MSR_HYPERCALL
:
1882 data
= kvm
->arch
.hv_hypercall
;
1885 vcpu_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
1893 static int get_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1898 case HV_X64_MSR_VP_INDEX
: {
1901 kvm_for_each_vcpu(r
, v
, vcpu
->kvm
)
1906 case HV_X64_MSR_EOI
:
1907 return kvm_hv_vapic_msr_read(vcpu
, APIC_EOI
, pdata
);
1908 case HV_X64_MSR_ICR
:
1909 return kvm_hv_vapic_msr_read(vcpu
, APIC_ICR
, pdata
);
1910 case HV_X64_MSR_TPR
:
1911 return kvm_hv_vapic_msr_read(vcpu
, APIC_TASKPRI
, pdata
);
1912 case HV_X64_MSR_APIC_ASSIST_PAGE
:
1913 data
= vcpu
->arch
.hv_vapic
;
1916 vcpu_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
1923 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1928 case MSR_IA32_PLATFORM_ID
:
1929 case MSR_IA32_EBL_CR_POWERON
:
1930 case MSR_IA32_DEBUGCTLMSR
:
1931 case MSR_IA32_LASTBRANCHFROMIP
:
1932 case MSR_IA32_LASTBRANCHTOIP
:
1933 case MSR_IA32_LASTINTFROMIP
:
1934 case MSR_IA32_LASTINTTOIP
:
1937 case MSR_VM_HSAVE_PA
:
1938 case MSR_K7_EVNTSEL0
:
1939 case MSR_K7_PERFCTR0
:
1940 case MSR_K8_INT_PENDING_MSG
:
1941 case MSR_AMD64_NB_CFG
:
1942 case MSR_FAM10H_MMIO_CONF_BASE
:
1945 case MSR_P6_PERFCTR0
:
1946 case MSR_P6_PERFCTR1
:
1947 case MSR_P6_EVNTSEL0
:
1948 case MSR_P6_EVNTSEL1
:
1949 if (kvm_pmu_msr(vcpu
, msr
))
1950 return kvm_pmu_get_msr(vcpu
, msr
, pdata
);
1953 case MSR_IA32_UCODE_REV
:
1954 data
= 0x100000000ULL
;
1957 data
= 0x500 | KVM_NR_VAR_MTRR
;
1959 case 0x200 ... 0x2ff:
1960 return get_msr_mtrr(vcpu
, msr
, pdata
);
1961 case 0xcd: /* fsb frequency */
1965 * MSR_EBC_FREQUENCY_ID
1966 * Conservative value valid for even the basic CPU models.
1967 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1968 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1969 * and 266MHz for model 3, or 4. Set Core Clock
1970 * Frequency to System Bus Frequency Ratio to 1 (bits
1971 * 31:24) even though these are only valid for CPU
1972 * models > 2, however guests may end up dividing or
1973 * multiplying by zero otherwise.
1975 case MSR_EBC_FREQUENCY_ID
:
1978 case MSR_IA32_APICBASE
:
1979 data
= kvm_get_apic_base(vcpu
);
1981 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
1982 return kvm_x2apic_msr_read(vcpu
, msr
, pdata
);
1984 case MSR_IA32_TSCDEADLINE
:
1985 data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
1987 case MSR_IA32_MISC_ENABLE
:
1988 data
= vcpu
->arch
.ia32_misc_enable_msr
;
1990 case MSR_IA32_PERF_STATUS
:
1991 /* TSC increment by tick */
1993 /* CPU multiplier */
1994 data
|= (((uint64_t)4ULL) << 40);
1997 data
= vcpu
->arch
.efer
;
1999 case MSR_KVM_WALL_CLOCK
:
2000 case MSR_KVM_WALL_CLOCK_NEW
:
2001 data
= vcpu
->kvm
->arch
.wall_clock
;
2003 case MSR_KVM_SYSTEM_TIME
:
2004 case MSR_KVM_SYSTEM_TIME_NEW
:
2005 data
= vcpu
->arch
.time
;
2007 case MSR_KVM_ASYNC_PF_EN
:
2008 data
= vcpu
->arch
.apf
.msr_val
;
2010 case MSR_KVM_STEAL_TIME
:
2011 data
= vcpu
->arch
.st
.msr_val
;
2013 case MSR_KVM_PV_EOI_EN
:
2014 data
= vcpu
->arch
.pv_eoi
.msr_val
;
2016 case MSR_IA32_P5_MC_ADDR
:
2017 case MSR_IA32_P5_MC_TYPE
:
2018 case MSR_IA32_MCG_CAP
:
2019 case MSR_IA32_MCG_CTL
:
2020 case MSR_IA32_MCG_STATUS
:
2021 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
2022 return get_msr_mce(vcpu
, msr
, pdata
);
2023 case MSR_K7_CLK_CTL
:
2025 * Provide expected ramp-up count for K7. All other
2026 * are set to zero, indicating minimum divisors for
2029 * This prevents guest kernels on AMD host with CPU
2030 * type 6, model 8 and higher from exploding due to
2031 * the rdmsr failing.
2035 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2036 if (kvm_hv_msr_partition_wide(msr
)) {
2038 mutex_lock(&vcpu
->kvm
->lock
);
2039 r
= get_msr_hyperv_pw(vcpu
, msr
, pdata
);
2040 mutex_unlock(&vcpu
->kvm
->lock
);
2043 return get_msr_hyperv(vcpu
, msr
, pdata
);
2045 case MSR_IA32_BBL_CR_CTL3
:
2046 /* This legacy MSR exists but isn't fully documented in current
2047 * silicon. It is however accessed by winxp in very narrow
2048 * scenarios where it sets bit #19, itself documented as
2049 * a "reserved" bit. Best effort attempt to source coherent
2050 * read data here should the balance of the register be
2051 * interpreted by the guest:
2053 * L2 cache control register 3: 64GB range, 256KB size,
2054 * enabled, latency 0x1, configured
2058 case MSR_AMD64_OSVW_ID_LENGTH
:
2059 if (!guest_cpuid_has_osvw(vcpu
))
2061 data
= vcpu
->arch
.osvw
.length
;
2063 case MSR_AMD64_OSVW_STATUS
:
2064 if (!guest_cpuid_has_osvw(vcpu
))
2066 data
= vcpu
->arch
.osvw
.status
;
2069 if (kvm_pmu_msr(vcpu
, msr
))
2070 return kvm_pmu_get_msr(vcpu
, msr
, pdata
);
2072 vcpu_unimpl(vcpu
, "unhandled rdmsr: 0x%x\n", msr
);
2075 vcpu_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr
);
2083 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
2086 * Read or write a bunch of msrs. All parameters are kernel addresses.
2088 * @return number of msrs set successfully.
2090 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
2091 struct kvm_msr_entry
*entries
,
2092 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2093 unsigned index
, u64
*data
))
2097 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2098 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
2099 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
2101 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2107 * Read or write a bunch of msrs. Parameters are user addresses.
2109 * @return number of msrs set successfully.
2111 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
2112 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2113 unsigned index
, u64
*data
),
2116 struct kvm_msrs msrs
;
2117 struct kvm_msr_entry
*entries
;
2122 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
2126 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
2129 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
2130 entries
= memdup_user(user_msrs
->entries
, size
);
2131 if (IS_ERR(entries
)) {
2132 r
= PTR_ERR(entries
);
2136 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
2141 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
2152 int kvm_dev_ioctl_check_extension(long ext
)
2157 case KVM_CAP_IRQCHIP
:
2159 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
2160 case KVM_CAP_SET_TSS_ADDR
:
2161 case KVM_CAP_EXT_CPUID
:
2162 case KVM_CAP_CLOCKSOURCE
:
2164 case KVM_CAP_NOP_IO_DELAY
:
2165 case KVM_CAP_MP_STATE
:
2166 case KVM_CAP_SYNC_MMU
:
2167 case KVM_CAP_USER_NMI
:
2168 case KVM_CAP_REINJECT_CONTROL
:
2169 case KVM_CAP_IRQ_INJECT_STATUS
:
2170 case KVM_CAP_ASSIGN_DEV_IRQ
:
2172 case KVM_CAP_IOEVENTFD
:
2174 case KVM_CAP_PIT_STATE2
:
2175 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
2176 case KVM_CAP_XEN_HVM
:
2177 case KVM_CAP_ADJUST_CLOCK
:
2178 case KVM_CAP_VCPU_EVENTS
:
2179 case KVM_CAP_HYPERV
:
2180 case KVM_CAP_HYPERV_VAPIC
:
2181 case KVM_CAP_HYPERV_SPIN
:
2182 case KVM_CAP_PCI_SEGMENT
:
2183 case KVM_CAP_DEBUGREGS
:
2184 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
2186 case KVM_CAP_ASYNC_PF
:
2187 case KVM_CAP_GET_TSC_KHZ
:
2188 case KVM_CAP_PCI_2_3
:
2189 case KVM_CAP_KVMCLOCK_CTRL
:
2190 case KVM_CAP_READONLY_MEM
:
2191 case KVM_CAP_IRQFD_RESAMPLE
:
2194 case KVM_CAP_COALESCED_MMIO
:
2195 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
2198 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
2200 case KVM_CAP_NR_VCPUS
:
2201 r
= KVM_SOFT_MAX_VCPUS
;
2203 case KVM_CAP_MAX_VCPUS
:
2206 case KVM_CAP_NR_MEMSLOTS
:
2207 r
= KVM_MEMORY_SLOTS
;
2209 case KVM_CAP_PV_MMU
: /* obsolete */
2213 r
= iommu_present(&pci_bus_type
);
2216 r
= KVM_MAX_MCE_BANKS
;
2221 case KVM_CAP_TSC_CONTROL
:
2222 r
= kvm_has_tsc_control
;
2224 case KVM_CAP_TSC_DEADLINE_TIMER
:
2225 r
= boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER
);
2235 long kvm_arch_dev_ioctl(struct file
*filp
,
2236 unsigned int ioctl
, unsigned long arg
)
2238 void __user
*argp
= (void __user
*)arg
;
2242 case KVM_GET_MSR_INDEX_LIST
: {
2243 struct kvm_msr_list __user
*user_msr_list
= argp
;
2244 struct kvm_msr_list msr_list
;
2248 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2251 msr_list
.nmsrs
= num_msrs_to_save
+ ARRAY_SIZE(emulated_msrs
);
2252 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2255 if (n
< msr_list
.nmsrs
)
2258 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2259 num_msrs_to_save
* sizeof(u32
)))
2261 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2263 ARRAY_SIZE(emulated_msrs
) * sizeof(u32
)))
2268 case KVM_GET_SUPPORTED_CPUID
: {
2269 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2270 struct kvm_cpuid2 cpuid
;
2273 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2275 r
= kvm_dev_ioctl_get_supported_cpuid(&cpuid
,
2276 cpuid_arg
->entries
);
2281 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2286 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2289 mce_cap
= KVM_MCE_CAP_SUPPORTED
;
2291 if (copy_to_user(argp
, &mce_cap
, sizeof mce_cap
))
2303 static void wbinvd_ipi(void *garbage
)
2308 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2310 return vcpu
->kvm
->arch
.iommu_domain
&&
2311 !(vcpu
->kvm
->arch
.iommu_flags
& KVM_IOMMU_CACHE_COHERENCY
);
2314 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2316 /* Address WBINVD may be executed by guest */
2317 if (need_emulate_wbinvd(vcpu
)) {
2318 if (kvm_x86_ops
->has_wbinvd_exit())
2319 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2320 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2321 smp_call_function_single(vcpu
->cpu
,
2322 wbinvd_ipi
, NULL
, 1);
2325 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2327 /* Apply any externally detected TSC adjustments (due to suspend) */
2328 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
2329 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
2330 vcpu
->arch
.tsc_offset_adjustment
= 0;
2331 set_bit(KVM_REQ_CLOCK_UPDATE
, &vcpu
->requests
);
2334 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2335 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
2336 native_read_tsc() - vcpu
->arch
.last_host_tsc
;
2338 mark_tsc_unstable("KVM discovered backwards TSC");
2339 if (check_tsc_unstable()) {
2340 u64 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
,
2341 vcpu
->arch
.last_guest_tsc
);
2342 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
2343 vcpu
->arch
.tsc_catchup
= 1;
2345 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2346 if (vcpu
->cpu
!= cpu
)
2347 kvm_migrate_timers(vcpu
);
2351 accumulate_steal_time(vcpu
);
2352 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2355 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
2357 kvm_x86_ops
->vcpu_put(vcpu
);
2358 kvm_put_guest_fpu(vcpu
);
2359 vcpu
->arch
.last_host_tsc
= native_read_tsc();
2362 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
2363 struct kvm_lapic_state
*s
)
2365 memcpy(s
->regs
, vcpu
->arch
.apic
->regs
, sizeof *s
);
2370 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
2371 struct kvm_lapic_state
*s
)
2373 kvm_apic_post_state_restore(vcpu
, s
);
2374 update_cr8_intercept(vcpu
);
2379 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
2380 struct kvm_interrupt
*irq
)
2382 if (irq
->irq
< 0 || irq
->irq
>= KVM_NR_INTERRUPTS
)
2384 if (irqchip_in_kernel(vcpu
->kvm
))
2387 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
2388 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2393 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
2395 kvm_inject_nmi(vcpu
);
2400 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
2401 struct kvm_tpr_access_ctl
*tac
)
2405 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
2409 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
2413 unsigned bank_num
= mcg_cap
& 0xff, bank
;
2416 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
2418 if (mcg_cap
& ~(KVM_MCE_CAP_SUPPORTED
| 0xff | 0xff0000))
2421 vcpu
->arch
.mcg_cap
= mcg_cap
;
2422 /* Init IA32_MCG_CTL to all 1s */
2423 if (mcg_cap
& MCG_CTL_P
)
2424 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
2425 /* Init IA32_MCi_CTL to all 1s */
2426 for (bank
= 0; bank
< bank_num
; bank
++)
2427 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
2432 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
2433 struct kvm_x86_mce
*mce
)
2435 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2436 unsigned bank_num
= mcg_cap
& 0xff;
2437 u64
*banks
= vcpu
->arch
.mce_banks
;
2439 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
2442 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2443 * reporting is disabled
2445 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
2446 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
2448 banks
+= 4 * mce
->bank
;
2450 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2451 * reporting is disabled for the bank
2453 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
2455 if (mce
->status
& MCI_STATUS_UC
) {
2456 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
2457 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
2458 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
2461 if (banks
[1] & MCI_STATUS_VAL
)
2462 mce
->status
|= MCI_STATUS_OVER
;
2463 banks
[2] = mce
->addr
;
2464 banks
[3] = mce
->misc
;
2465 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
2466 banks
[1] = mce
->status
;
2467 kvm_queue_exception(vcpu
, MC_VECTOR
);
2468 } else if (!(banks
[1] & MCI_STATUS_VAL
)
2469 || !(banks
[1] & MCI_STATUS_UC
)) {
2470 if (banks
[1] & MCI_STATUS_VAL
)
2471 mce
->status
|= MCI_STATUS_OVER
;
2472 banks
[2] = mce
->addr
;
2473 banks
[3] = mce
->misc
;
2474 banks
[1] = mce
->status
;
2476 banks
[1] |= MCI_STATUS_OVER
;
2480 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
2481 struct kvm_vcpu_events
*events
)
2484 events
->exception
.injected
=
2485 vcpu
->arch
.exception
.pending
&&
2486 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
2487 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
2488 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
2489 events
->exception
.pad
= 0;
2490 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
2492 events
->interrupt
.injected
=
2493 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
2494 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
2495 events
->interrupt
.soft
= 0;
2496 events
->interrupt
.shadow
=
2497 kvm_x86_ops
->get_interrupt_shadow(vcpu
,
2498 KVM_X86_SHADOW_INT_MOV_SS
| KVM_X86_SHADOW_INT_STI
);
2500 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
2501 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
2502 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
2503 events
->nmi
.pad
= 0;
2505 events
->sipi_vector
= vcpu
->arch
.sipi_vector
;
2507 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
2508 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2509 | KVM_VCPUEVENT_VALID_SHADOW
);
2510 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
2513 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
2514 struct kvm_vcpu_events
*events
)
2516 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2517 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2518 | KVM_VCPUEVENT_VALID_SHADOW
))
2522 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
2523 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
2524 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
2525 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
2527 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
2528 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
2529 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
2530 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
2531 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
2532 events
->interrupt
.shadow
);
2534 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
2535 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
2536 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
2537 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
2539 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
)
2540 vcpu
->arch
.sipi_vector
= events
->sipi_vector
;
2542 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2547 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
2548 struct kvm_debugregs
*dbgregs
)
2550 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
2551 dbgregs
->dr6
= vcpu
->arch
.dr6
;
2552 dbgregs
->dr7
= vcpu
->arch
.dr7
;
2554 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
2557 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
2558 struct kvm_debugregs
*dbgregs
)
2563 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
2564 vcpu
->arch
.dr6
= dbgregs
->dr6
;
2565 vcpu
->arch
.dr7
= dbgregs
->dr7
;
2570 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
2571 struct kvm_xsave
*guest_xsave
)
2574 memcpy(guest_xsave
->region
,
2575 &vcpu
->arch
.guest_fpu
.state
->xsave
,
2578 memcpy(guest_xsave
->region
,
2579 &vcpu
->arch
.guest_fpu
.state
->fxsave
,
2580 sizeof(struct i387_fxsave_struct
));
2581 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
2586 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
2587 struct kvm_xsave
*guest_xsave
)
2590 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
2593 memcpy(&vcpu
->arch
.guest_fpu
.state
->xsave
,
2594 guest_xsave
->region
, xstate_size
);
2596 if (xstate_bv
& ~XSTATE_FPSSE
)
2598 memcpy(&vcpu
->arch
.guest_fpu
.state
->fxsave
,
2599 guest_xsave
->region
, sizeof(struct i387_fxsave_struct
));
2604 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
2605 struct kvm_xcrs
*guest_xcrs
)
2607 if (!cpu_has_xsave
) {
2608 guest_xcrs
->nr_xcrs
= 0;
2612 guest_xcrs
->nr_xcrs
= 1;
2613 guest_xcrs
->flags
= 0;
2614 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
2615 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
2618 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
2619 struct kvm_xcrs
*guest_xcrs
)
2626 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
2629 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
2630 /* Only support XCR0 currently */
2631 if (guest_xcrs
->xcrs
[0].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
2632 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
2633 guest_xcrs
->xcrs
[0].value
);
2642 * kvm_set_guest_paused() indicates to the guest kernel that it has been
2643 * stopped by the hypervisor. This function will be called from the host only.
2644 * EINVAL is returned when the host attempts to set the flag for a guest that
2645 * does not support pv clocks.
2647 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
2649 if (!vcpu
->arch
.time_page
)
2651 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
2652 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2656 long kvm_arch_vcpu_ioctl(struct file
*filp
,
2657 unsigned int ioctl
, unsigned long arg
)
2659 struct kvm_vcpu
*vcpu
= filp
->private_data
;
2660 void __user
*argp
= (void __user
*)arg
;
2663 struct kvm_lapic_state
*lapic
;
2664 struct kvm_xsave
*xsave
;
2665 struct kvm_xcrs
*xcrs
;
2671 case KVM_GET_LAPIC
: {
2673 if (!vcpu
->arch
.apic
)
2675 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
2680 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
2684 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
2689 case KVM_SET_LAPIC
: {
2691 if (!vcpu
->arch
.apic
)
2693 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
2694 if (IS_ERR(u
.lapic
)) {
2695 r
= PTR_ERR(u
.lapic
);
2699 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
2705 case KVM_INTERRUPT
: {
2706 struct kvm_interrupt irq
;
2709 if (copy_from_user(&irq
, argp
, sizeof irq
))
2711 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
2718 r
= kvm_vcpu_ioctl_nmi(vcpu
);
2724 case KVM_SET_CPUID
: {
2725 struct kvm_cpuid __user
*cpuid_arg
= argp
;
2726 struct kvm_cpuid cpuid
;
2729 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2731 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
2736 case KVM_SET_CPUID2
: {
2737 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2738 struct kvm_cpuid2 cpuid
;
2741 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2743 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
2744 cpuid_arg
->entries
);
2749 case KVM_GET_CPUID2
: {
2750 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2751 struct kvm_cpuid2 cpuid
;
2754 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2756 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
2757 cpuid_arg
->entries
);
2761 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2767 r
= msr_io(vcpu
, argp
, kvm_get_msr
, 1);
2770 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
2772 case KVM_TPR_ACCESS_REPORTING
: {
2773 struct kvm_tpr_access_ctl tac
;
2776 if (copy_from_user(&tac
, argp
, sizeof tac
))
2778 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
2782 if (copy_to_user(argp
, &tac
, sizeof tac
))
2787 case KVM_SET_VAPIC_ADDR
: {
2788 struct kvm_vapic_addr va
;
2791 if (!irqchip_in_kernel(vcpu
->kvm
))
2794 if (copy_from_user(&va
, argp
, sizeof va
))
2797 kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
2800 case KVM_X86_SETUP_MCE
: {
2804 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
2806 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
2809 case KVM_X86_SET_MCE
: {
2810 struct kvm_x86_mce mce
;
2813 if (copy_from_user(&mce
, argp
, sizeof mce
))
2815 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
2818 case KVM_GET_VCPU_EVENTS
: {
2819 struct kvm_vcpu_events events
;
2821 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
2824 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
2829 case KVM_SET_VCPU_EVENTS
: {
2830 struct kvm_vcpu_events events
;
2833 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
2836 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
2839 case KVM_GET_DEBUGREGS
: {
2840 struct kvm_debugregs dbgregs
;
2842 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
2845 if (copy_to_user(argp
, &dbgregs
,
2846 sizeof(struct kvm_debugregs
)))
2851 case KVM_SET_DEBUGREGS
: {
2852 struct kvm_debugregs dbgregs
;
2855 if (copy_from_user(&dbgregs
, argp
,
2856 sizeof(struct kvm_debugregs
)))
2859 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
2862 case KVM_GET_XSAVE
: {
2863 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
2868 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
2871 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
2876 case KVM_SET_XSAVE
: {
2877 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
2878 if (IS_ERR(u
.xsave
)) {
2879 r
= PTR_ERR(u
.xsave
);
2883 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
2886 case KVM_GET_XCRS
: {
2887 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
2892 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
2895 if (copy_to_user(argp
, u
.xcrs
,
2896 sizeof(struct kvm_xcrs
)))
2901 case KVM_SET_XCRS
: {
2902 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
2903 if (IS_ERR(u
.xcrs
)) {
2904 r
= PTR_ERR(u
.xcrs
);
2908 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
2911 case KVM_SET_TSC_KHZ
: {
2915 user_tsc_khz
= (u32
)arg
;
2917 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
2920 if (user_tsc_khz
== 0)
2921 user_tsc_khz
= tsc_khz
;
2923 kvm_set_tsc_khz(vcpu
, user_tsc_khz
);
2928 case KVM_GET_TSC_KHZ
: {
2929 r
= vcpu
->arch
.virtual_tsc_khz
;
2932 case KVM_KVMCLOCK_CTRL
: {
2933 r
= kvm_set_guest_paused(vcpu
);
2944 int kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
2946 return VM_FAULT_SIGBUS
;
2949 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
2953 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
2955 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
2959 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
2962 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
2966 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
2967 u32 kvm_nr_mmu_pages
)
2969 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
2972 mutex_lock(&kvm
->slots_lock
);
2973 spin_lock(&kvm
->mmu_lock
);
2975 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
2976 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
2978 spin_unlock(&kvm
->mmu_lock
);
2979 mutex_unlock(&kvm
->slots_lock
);
2983 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
2985 return kvm
->arch
.n_max_mmu_pages
;
2988 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
2993 switch (chip
->chip_id
) {
2994 case KVM_IRQCHIP_PIC_MASTER
:
2995 memcpy(&chip
->chip
.pic
,
2996 &pic_irqchip(kvm
)->pics
[0],
2997 sizeof(struct kvm_pic_state
));
2999 case KVM_IRQCHIP_PIC_SLAVE
:
3000 memcpy(&chip
->chip
.pic
,
3001 &pic_irqchip(kvm
)->pics
[1],
3002 sizeof(struct kvm_pic_state
));
3004 case KVM_IRQCHIP_IOAPIC
:
3005 r
= kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3014 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3019 switch (chip
->chip_id
) {
3020 case KVM_IRQCHIP_PIC_MASTER
:
3021 spin_lock(&pic_irqchip(kvm
)->lock
);
3022 memcpy(&pic_irqchip(kvm
)->pics
[0],
3024 sizeof(struct kvm_pic_state
));
3025 spin_unlock(&pic_irqchip(kvm
)->lock
);
3027 case KVM_IRQCHIP_PIC_SLAVE
:
3028 spin_lock(&pic_irqchip(kvm
)->lock
);
3029 memcpy(&pic_irqchip(kvm
)->pics
[1],
3031 sizeof(struct kvm_pic_state
));
3032 spin_unlock(&pic_irqchip(kvm
)->lock
);
3034 case KVM_IRQCHIP_IOAPIC
:
3035 r
= kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3041 kvm_pic_update_irq(pic_irqchip(kvm
));
3045 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3049 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3050 memcpy(ps
, &kvm
->arch
.vpit
->pit_state
, sizeof(struct kvm_pit_state
));
3051 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3055 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3059 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3060 memcpy(&kvm
->arch
.vpit
->pit_state
, ps
, sizeof(struct kvm_pit_state
));
3061 kvm_pit_load_count(kvm
, 0, ps
->channels
[0].count
, 0);
3062 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3066 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3070 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3071 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3072 sizeof(ps
->channels
));
3073 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3074 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3075 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
3079 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3081 int r
= 0, start
= 0;
3082 u32 prev_legacy
, cur_legacy
;
3083 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3084 prev_legacy
= kvm
->arch
.vpit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3085 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3086 if (!prev_legacy
&& cur_legacy
)
3088 memcpy(&kvm
->arch
.vpit
->pit_state
.channels
, &ps
->channels
,
3089 sizeof(kvm
->arch
.vpit
->pit_state
.channels
));
3090 kvm
->arch
.vpit
->pit_state
.flags
= ps
->flags
;
3091 kvm_pit_load_count(kvm
, 0, kvm
->arch
.vpit
->pit_state
.channels
[0].count
, start
);
3092 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3096 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
3097 struct kvm_reinject_control
*control
)
3099 if (!kvm
->arch
.vpit
)
3101 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3102 kvm
->arch
.vpit
->pit_state
.reinject
= control
->pit_reinject
;
3103 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3108 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3109 * @kvm: kvm instance
3110 * @log: slot id and address to which we copy the log
3112 * We need to keep it in mind that VCPU threads can write to the bitmap
3113 * concurrently. So, to avoid losing data, we keep the following order for
3116 * 1. Take a snapshot of the bit and clear it if needed.
3117 * 2. Write protect the corresponding page.
3118 * 3. Flush TLB's if needed.
3119 * 4. Copy the snapshot to the userspace.
3121 * Between 2 and 3, the guest may write to the page using the remaining TLB
3122 * entry. This is not a problem because the page will be reported dirty at
3123 * step 4 using the snapshot taken before and step 3 ensures that successive
3124 * writes will be logged for the next call.
3126 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
, struct kvm_dirty_log
*log
)
3129 struct kvm_memory_slot
*memslot
;
3131 unsigned long *dirty_bitmap
;
3132 unsigned long *dirty_bitmap_buffer
;
3133 bool is_dirty
= false;
3135 mutex_lock(&kvm
->slots_lock
);
3138 if (log
->slot
>= KVM_MEMORY_SLOTS
)
3141 memslot
= id_to_memslot(kvm
->memslots
, log
->slot
);
3143 dirty_bitmap
= memslot
->dirty_bitmap
;
3148 n
= kvm_dirty_bitmap_bytes(memslot
);
3150 dirty_bitmap_buffer
= dirty_bitmap
+ n
/ sizeof(long);
3151 memset(dirty_bitmap_buffer
, 0, n
);
3153 spin_lock(&kvm
->mmu_lock
);
3155 for (i
= 0; i
< n
/ sizeof(long); i
++) {
3159 if (!dirty_bitmap
[i
])
3164 mask
= xchg(&dirty_bitmap
[i
], 0);
3165 dirty_bitmap_buffer
[i
] = mask
;
3167 offset
= i
* BITS_PER_LONG
;
3168 kvm_mmu_write_protect_pt_masked(kvm
, memslot
, offset
, mask
);
3171 kvm_flush_remote_tlbs(kvm
);
3173 spin_unlock(&kvm
->mmu_lock
);
3176 if (copy_to_user(log
->dirty_bitmap
, dirty_bitmap_buffer
, n
))
3181 mutex_unlock(&kvm
->slots_lock
);
3185 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
)
3187 if (!irqchip_in_kernel(kvm
))
3190 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
3191 irq_event
->irq
, irq_event
->level
);
3195 long kvm_arch_vm_ioctl(struct file
*filp
,
3196 unsigned int ioctl
, unsigned long arg
)
3198 struct kvm
*kvm
= filp
->private_data
;
3199 void __user
*argp
= (void __user
*)arg
;
3202 * This union makes it completely explicit to gcc-3.x
3203 * that these two variables' stack usage should be
3204 * combined, not added together.
3207 struct kvm_pit_state ps
;
3208 struct kvm_pit_state2 ps2
;
3209 struct kvm_pit_config pit_config
;
3213 case KVM_SET_TSS_ADDR
:
3214 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
3218 case KVM_SET_IDENTITY_MAP_ADDR
: {
3222 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
3224 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
3229 case KVM_SET_NR_MMU_PAGES
:
3230 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
3234 case KVM_GET_NR_MMU_PAGES
:
3235 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
3237 case KVM_CREATE_IRQCHIP
: {
3238 struct kvm_pic
*vpic
;
3240 mutex_lock(&kvm
->lock
);
3243 goto create_irqchip_unlock
;
3245 if (atomic_read(&kvm
->online_vcpus
))
3246 goto create_irqchip_unlock
;
3248 vpic
= kvm_create_pic(kvm
);
3250 r
= kvm_ioapic_init(kvm
);
3252 mutex_lock(&kvm
->slots_lock
);
3253 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3255 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3257 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3259 mutex_unlock(&kvm
->slots_lock
);
3261 goto create_irqchip_unlock
;
3264 goto create_irqchip_unlock
;
3266 kvm
->arch
.vpic
= vpic
;
3268 r
= kvm_setup_default_irq_routing(kvm
);
3270 mutex_lock(&kvm
->slots_lock
);
3271 mutex_lock(&kvm
->irq_lock
);
3272 kvm_ioapic_destroy(kvm
);
3273 kvm_destroy_pic(kvm
);
3274 mutex_unlock(&kvm
->irq_lock
);
3275 mutex_unlock(&kvm
->slots_lock
);
3277 create_irqchip_unlock
:
3278 mutex_unlock(&kvm
->lock
);
3281 case KVM_CREATE_PIT
:
3282 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
3284 case KVM_CREATE_PIT2
:
3286 if (copy_from_user(&u
.pit_config
, argp
,
3287 sizeof(struct kvm_pit_config
)))
3290 mutex_lock(&kvm
->slots_lock
);
3293 goto create_pit_unlock
;
3295 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
3299 mutex_unlock(&kvm
->slots_lock
);
3301 case KVM_GET_IRQCHIP
: {
3302 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3303 struct kvm_irqchip
*chip
;
3305 chip
= memdup_user(argp
, sizeof(*chip
));
3312 if (!irqchip_in_kernel(kvm
))
3313 goto get_irqchip_out
;
3314 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
3316 goto get_irqchip_out
;
3318 if (copy_to_user(argp
, chip
, sizeof *chip
))
3319 goto get_irqchip_out
;
3327 case KVM_SET_IRQCHIP
: {
3328 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3329 struct kvm_irqchip
*chip
;
3331 chip
= memdup_user(argp
, sizeof(*chip
));
3338 if (!irqchip_in_kernel(kvm
))
3339 goto set_irqchip_out
;
3340 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
3342 goto set_irqchip_out
;
3352 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
3355 if (!kvm
->arch
.vpit
)
3357 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
3361 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
3368 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
3371 if (!kvm
->arch
.vpit
)
3373 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
3379 case KVM_GET_PIT2
: {
3381 if (!kvm
->arch
.vpit
)
3383 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
3387 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
3392 case KVM_SET_PIT2
: {
3394 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
3397 if (!kvm
->arch
.vpit
)
3399 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
3405 case KVM_REINJECT_CONTROL
: {
3406 struct kvm_reinject_control control
;
3408 if (copy_from_user(&control
, argp
, sizeof(control
)))
3410 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
3416 case KVM_XEN_HVM_CONFIG
: {
3418 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
3419 sizeof(struct kvm_xen_hvm_config
)))
3422 if (kvm
->arch
.xen_hvm_config
.flags
)
3427 case KVM_SET_CLOCK
: {
3428 struct kvm_clock_data user_ns
;
3433 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
3441 local_irq_disable();
3442 now_ns
= get_kernel_ns();
3443 delta
= user_ns
.clock
- now_ns
;
3445 kvm
->arch
.kvmclock_offset
= delta
;
3448 case KVM_GET_CLOCK
: {
3449 struct kvm_clock_data user_ns
;
3452 local_irq_disable();
3453 now_ns
= get_kernel_ns();
3454 user_ns
.clock
= kvm
->arch
.kvmclock_offset
+ now_ns
;
3457 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
3460 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
3473 static void kvm_init_msr_list(void)
3478 /* skip the first msrs in the list. KVM-specific */
3479 for (i
= j
= KVM_SAVE_MSRS_BEGIN
; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
3480 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
3483 msrs_to_save
[j
] = msrs_to_save
[i
];
3486 num_msrs_to_save
= j
;
3489 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
3497 if (!(vcpu
->arch
.apic
&&
3498 !kvm_iodevice_write(&vcpu
->arch
.apic
->dev
, addr
, n
, v
))
3499 && kvm_io_bus_write(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, n
, v
))
3510 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
3517 if (!(vcpu
->arch
.apic
&&
3518 !kvm_iodevice_read(&vcpu
->arch
.apic
->dev
, addr
, n
, v
))
3519 && kvm_io_bus_read(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, n
, v
))
3521 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, *(u64
*)v
);
3531 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
3532 struct kvm_segment
*var
, int seg
)
3534 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
3537 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
3538 struct kvm_segment
*var
, int seg
)
3540 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
3543 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
)
3546 struct x86_exception exception
;
3548 BUG_ON(!mmu_is_nested(vcpu
));
3550 /* NPT walks are always user-walks */
3551 access
|= PFERR_USER_MASK
;
3552 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, &exception
);
3557 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
3558 struct x86_exception
*exception
)
3560 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3561 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
3564 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
3565 struct x86_exception
*exception
)
3567 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3568 access
|= PFERR_FETCH_MASK
;
3569 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
3572 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
3573 struct x86_exception
*exception
)
3575 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3576 access
|= PFERR_WRITE_MASK
;
3577 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
3580 /* uses this to access any guest's mapped memory without checking CPL */
3581 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
3582 struct x86_exception
*exception
)
3584 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
3587 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
3588 struct kvm_vcpu
*vcpu
, u32 access
,
3589 struct x86_exception
*exception
)
3592 int r
= X86EMUL_CONTINUE
;
3595 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
3597 unsigned offset
= addr
& (PAGE_SIZE
-1);
3598 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
3601 if (gpa
== UNMAPPED_GVA
)
3602 return X86EMUL_PROPAGATE_FAULT
;
3603 ret
= kvm_read_guest(vcpu
->kvm
, gpa
, data
, toread
);
3605 r
= X86EMUL_IO_NEEDED
;
3617 /* used for instruction fetching */
3618 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
3619 gva_t addr
, void *val
, unsigned int bytes
,
3620 struct x86_exception
*exception
)
3622 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
3623 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3625 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
,
3626 access
| PFERR_FETCH_MASK
,
3630 int kvm_read_guest_virt(struct x86_emulate_ctxt
*ctxt
,
3631 gva_t addr
, void *val
, unsigned int bytes
,
3632 struct x86_exception
*exception
)
3634 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
3635 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3637 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
3640 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
3642 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
3643 gva_t addr
, void *val
, unsigned int bytes
,
3644 struct x86_exception
*exception
)
3646 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
3647 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, exception
);
3650 int kvm_write_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
3651 gva_t addr
, void *val
,
3653 struct x86_exception
*exception
)
3655 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
3657 int r
= X86EMUL_CONTINUE
;
3660 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
3663 unsigned offset
= addr
& (PAGE_SIZE
-1);
3664 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
3667 if (gpa
== UNMAPPED_GVA
)
3668 return X86EMUL_PROPAGATE_FAULT
;
3669 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, data
, towrite
);
3671 r
= X86EMUL_IO_NEEDED
;
3682 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
3684 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
3685 gpa_t
*gpa
, struct x86_exception
*exception
,
3688 u32 access
= ((kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
3689 | (write
? PFERR_WRITE_MASK
: 0);
3691 if (vcpu_match_mmio_gva(vcpu
, gva
)
3692 && !permission_fault(vcpu
->arch
.walk_mmu
, vcpu
->arch
.access
, access
)) {
3693 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
3694 (gva
& (PAGE_SIZE
- 1));
3695 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
3699 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
3701 if (*gpa
== UNMAPPED_GVA
)
3704 /* For APIC access vmexit */
3705 if ((*gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
3708 if (vcpu_match_mmio_gpa(vcpu
, *gpa
)) {
3709 trace_vcpu_match_mmio(gva
, *gpa
, write
, true);
3716 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3717 const void *val
, int bytes
)
3721 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, val
, bytes
);
3724 kvm_mmu_pte_write(vcpu
, gpa
, val
, bytes
);
3728 struct read_write_emulator_ops
{
3729 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
3731 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3732 void *val
, int bytes
);
3733 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3734 int bytes
, void *val
);
3735 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3736 void *val
, int bytes
);
3740 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
3742 if (vcpu
->mmio_read_completed
) {
3743 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
3744 vcpu
->mmio_fragments
[0].gpa
, *(u64
*)val
);
3745 vcpu
->mmio_read_completed
= 0;
3752 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3753 void *val
, int bytes
)
3755 return !kvm_read_guest(vcpu
->kvm
, gpa
, val
, bytes
);
3758 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3759 void *val
, int bytes
)
3761 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
3764 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
3766 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
3767 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
3770 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3771 void *val
, int bytes
)
3773 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
3774 return X86EMUL_IO_NEEDED
;
3777 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3778 void *val
, int bytes
)
3780 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
3782 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, frag
->len
);
3783 return X86EMUL_CONTINUE
;
3786 static const struct read_write_emulator_ops read_emultor
= {
3787 .read_write_prepare
= read_prepare
,
3788 .read_write_emulate
= read_emulate
,
3789 .read_write_mmio
= vcpu_mmio_read
,
3790 .read_write_exit_mmio
= read_exit_mmio
,
3793 static const struct read_write_emulator_ops write_emultor
= {
3794 .read_write_emulate
= write_emulate
,
3795 .read_write_mmio
= write_mmio
,
3796 .read_write_exit_mmio
= write_exit_mmio
,
3800 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
3802 struct x86_exception
*exception
,
3803 struct kvm_vcpu
*vcpu
,
3804 const struct read_write_emulator_ops
*ops
)
3808 bool write
= ops
->write
;
3809 struct kvm_mmio_fragment
*frag
;
3811 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
3814 return X86EMUL_PROPAGATE_FAULT
;
3816 /* For APIC access vmexit */
3820 if (ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
3821 return X86EMUL_CONTINUE
;
3825 * Is this MMIO handled locally?
3827 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
3828 if (handled
== bytes
)
3829 return X86EMUL_CONTINUE
;
3836 unsigned now
= min(bytes
, 8U);
3838 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
3847 return X86EMUL_CONTINUE
;
3850 int emulator_read_write(struct x86_emulate_ctxt
*ctxt
, unsigned long addr
,
3851 void *val
, unsigned int bytes
,
3852 struct x86_exception
*exception
,
3853 const struct read_write_emulator_ops
*ops
)
3855 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
3859 if (ops
->read_write_prepare
&&
3860 ops
->read_write_prepare(vcpu
, val
, bytes
))
3861 return X86EMUL_CONTINUE
;
3863 vcpu
->mmio_nr_fragments
= 0;
3865 /* Crossing a page boundary? */
3866 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
3869 now
= -addr
& ~PAGE_MASK
;
3870 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
3873 if (rc
!= X86EMUL_CONTINUE
)
3880 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
3882 if (rc
!= X86EMUL_CONTINUE
)
3885 if (!vcpu
->mmio_nr_fragments
)
3888 gpa
= vcpu
->mmio_fragments
[0].gpa
;
3890 vcpu
->mmio_needed
= 1;
3891 vcpu
->mmio_cur_fragment
= 0;
3893 vcpu
->run
->mmio
.len
= vcpu
->mmio_fragments
[0].len
;
3894 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
3895 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
3896 vcpu
->run
->mmio
.phys_addr
= gpa
;
3898 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
3901 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
3905 struct x86_exception
*exception
)
3907 return emulator_read_write(ctxt
, addr
, val
, bytes
,
3908 exception
, &read_emultor
);
3911 int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
3915 struct x86_exception
*exception
)
3917 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
3918 exception
, &write_emultor
);
3921 #define CMPXCHG_TYPE(t, ptr, old, new) \
3922 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3924 #ifdef CONFIG_X86_64
3925 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3927 # define CMPXCHG64(ptr, old, new) \
3928 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3931 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
3936 struct x86_exception
*exception
)
3938 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
3944 /* guests cmpxchg8b have to be emulated atomically */
3945 if (bytes
> 8 || (bytes
& (bytes
- 1)))
3948 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
3950 if (gpa
== UNMAPPED_GVA
||
3951 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
3954 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
3957 page
= gfn_to_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
3958 if (is_error_page(page
))
3961 kaddr
= kmap_atomic(page
);
3962 kaddr
+= offset_in_page(gpa
);
3965 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
3968 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
3971 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
3974 exchanged
= CMPXCHG64(kaddr
, old
, new);
3979 kunmap_atomic(kaddr
);
3980 kvm_release_page_dirty(page
);
3983 return X86EMUL_CMPXCHG_FAILED
;
3985 kvm_mmu_pte_write(vcpu
, gpa
, new, bytes
);
3987 return X86EMUL_CONTINUE
;
3990 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
3992 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
3995 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
3997 /* TODO: String I/O for in kernel device */
4000 if (vcpu
->arch
.pio
.in
)
4001 r
= kvm_io_bus_read(vcpu
->kvm
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
4002 vcpu
->arch
.pio
.size
, pd
);
4004 r
= kvm_io_bus_write(vcpu
->kvm
, KVM_PIO_BUS
,
4005 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
4010 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
4011 unsigned short port
, void *val
,
4012 unsigned int count
, bool in
)
4014 trace_kvm_pio(!in
, port
, size
, count
);
4016 vcpu
->arch
.pio
.port
= port
;
4017 vcpu
->arch
.pio
.in
= in
;
4018 vcpu
->arch
.pio
.count
= count
;
4019 vcpu
->arch
.pio
.size
= size
;
4021 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
4022 vcpu
->arch
.pio
.count
= 0;
4026 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
4027 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
4028 vcpu
->run
->io
.size
= size
;
4029 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
4030 vcpu
->run
->io
.count
= count
;
4031 vcpu
->run
->io
.port
= port
;
4036 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
4037 int size
, unsigned short port
, void *val
,
4040 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4043 if (vcpu
->arch
.pio
.count
)
4046 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
4049 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
4050 vcpu
->arch
.pio
.count
= 0;
4057 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
4058 int size
, unsigned short port
,
4059 const void *val
, unsigned int count
)
4061 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4063 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
4064 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
4067 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
4069 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
4072 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
4074 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
4077 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4079 if (!need_emulate_wbinvd(vcpu
))
4080 return X86EMUL_CONTINUE
;
4082 if (kvm_x86_ops
->has_wbinvd_exit()) {
4083 int cpu
= get_cpu();
4085 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4086 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
4087 wbinvd_ipi
, NULL
, 1);
4089 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
4092 return X86EMUL_CONTINUE
;
4094 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
4096 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
4098 kvm_emulate_wbinvd(emul_to_vcpu(ctxt
));
4101 int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long *dest
)
4103 return _kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
4106 int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long value
)
4109 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
4112 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
4114 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
4117 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
4119 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4120 unsigned long value
;
4124 value
= kvm_read_cr0(vcpu
);
4127 value
= vcpu
->arch
.cr2
;
4130 value
= kvm_read_cr3(vcpu
);
4133 value
= kvm_read_cr4(vcpu
);
4136 value
= kvm_get_cr8(vcpu
);
4139 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4146 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
4148 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4153 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
4156 vcpu
->arch
.cr2
= val
;
4159 res
= kvm_set_cr3(vcpu
, val
);
4162 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
4165 res
= kvm_set_cr8(vcpu
, val
);
4168 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4175 static void emulator_set_rflags(struct x86_emulate_ctxt
*ctxt
, ulong val
)
4177 kvm_set_rflags(emul_to_vcpu(ctxt
), val
);
4180 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
4182 return kvm_x86_ops
->get_cpl(emul_to_vcpu(ctxt
));
4185 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4187 kvm_x86_ops
->get_gdt(emul_to_vcpu(ctxt
), dt
);
4190 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4192 kvm_x86_ops
->get_idt(emul_to_vcpu(ctxt
), dt
);
4195 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4197 kvm_x86_ops
->set_gdt(emul_to_vcpu(ctxt
), dt
);
4200 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4202 kvm_x86_ops
->set_idt(emul_to_vcpu(ctxt
), dt
);
4205 static unsigned long emulator_get_cached_segment_base(
4206 struct x86_emulate_ctxt
*ctxt
, int seg
)
4208 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
4211 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
4212 struct desc_struct
*desc
, u32
*base3
,
4215 struct kvm_segment var
;
4217 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
4218 *selector
= var
.selector
;
4225 set_desc_limit(desc
, var
.limit
);
4226 set_desc_base(desc
, (unsigned long)var
.base
);
4227 #ifdef CONFIG_X86_64
4229 *base3
= var
.base
>> 32;
4231 desc
->type
= var
.type
;
4233 desc
->dpl
= var
.dpl
;
4234 desc
->p
= var
.present
;
4235 desc
->avl
= var
.avl
;
4243 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
4244 struct desc_struct
*desc
, u32 base3
,
4247 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4248 struct kvm_segment var
;
4250 var
.selector
= selector
;
4251 var
.base
= get_desc_base(desc
);
4252 #ifdef CONFIG_X86_64
4253 var
.base
|= ((u64
)base3
) << 32;
4255 var
.limit
= get_desc_limit(desc
);
4257 var
.limit
= (var
.limit
<< 12) | 0xfff;
4258 var
.type
= desc
->type
;
4259 var
.present
= desc
->p
;
4260 var
.dpl
= desc
->dpl
;
4265 var
.avl
= desc
->avl
;
4266 var
.present
= desc
->p
;
4267 var
.unusable
= !var
.present
;
4270 kvm_set_segment(vcpu
, &var
, seg
);
4274 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
4275 u32 msr_index
, u64
*pdata
)
4277 return kvm_get_msr(emul_to_vcpu(ctxt
), msr_index
, pdata
);
4280 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
4281 u32 msr_index
, u64 data
)
4283 return kvm_set_msr(emul_to_vcpu(ctxt
), msr_index
, data
);
4286 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
4287 u32 pmc
, u64
*pdata
)
4289 return kvm_pmu_read_pmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
4292 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
4294 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
4297 static void emulator_get_fpu(struct x86_emulate_ctxt
*ctxt
)
4300 kvm_load_guest_fpu(emul_to_vcpu(ctxt
));
4302 * CR0.TS may reference the host fpu state, not the guest fpu state,
4303 * so it may be clear at this point.
4308 static void emulator_put_fpu(struct x86_emulate_ctxt
*ctxt
)
4313 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
4314 struct x86_instruction_info
*info
,
4315 enum x86_intercept_stage stage
)
4317 return kvm_x86_ops
->check_intercept(emul_to_vcpu(ctxt
), info
, stage
);
4320 static void emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
4321 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
)
4323 kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
);
4326 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
4328 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
4331 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
4333 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
4336 static const struct x86_emulate_ops emulate_ops
= {
4337 .read_gpr
= emulator_read_gpr
,
4338 .write_gpr
= emulator_write_gpr
,
4339 .read_std
= kvm_read_guest_virt_system
,
4340 .write_std
= kvm_write_guest_virt_system
,
4341 .fetch
= kvm_fetch_guest_virt
,
4342 .read_emulated
= emulator_read_emulated
,
4343 .write_emulated
= emulator_write_emulated
,
4344 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
4345 .invlpg
= emulator_invlpg
,
4346 .pio_in_emulated
= emulator_pio_in_emulated
,
4347 .pio_out_emulated
= emulator_pio_out_emulated
,
4348 .get_segment
= emulator_get_segment
,
4349 .set_segment
= emulator_set_segment
,
4350 .get_cached_segment_base
= emulator_get_cached_segment_base
,
4351 .get_gdt
= emulator_get_gdt
,
4352 .get_idt
= emulator_get_idt
,
4353 .set_gdt
= emulator_set_gdt
,
4354 .set_idt
= emulator_set_idt
,
4355 .get_cr
= emulator_get_cr
,
4356 .set_cr
= emulator_set_cr
,
4357 .set_rflags
= emulator_set_rflags
,
4358 .cpl
= emulator_get_cpl
,
4359 .get_dr
= emulator_get_dr
,
4360 .set_dr
= emulator_set_dr
,
4361 .set_msr
= emulator_set_msr
,
4362 .get_msr
= emulator_get_msr
,
4363 .read_pmc
= emulator_read_pmc
,
4364 .halt
= emulator_halt
,
4365 .wbinvd
= emulator_wbinvd
,
4366 .fix_hypercall
= emulator_fix_hypercall
,
4367 .get_fpu
= emulator_get_fpu
,
4368 .put_fpu
= emulator_put_fpu
,
4369 .intercept
= emulator_intercept
,
4370 .get_cpuid
= emulator_get_cpuid
,
4373 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
4375 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
, mask
);
4377 * an sti; sti; sequence only disable interrupts for the first
4378 * instruction. So, if the last instruction, be it emulated or
4379 * not, left the system with the INT_STI flag enabled, it
4380 * means that the last instruction is an sti. We should not
4381 * leave the flag on in this case. The same goes for mov ss
4383 if (!(int_shadow
& mask
))
4384 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
4387 static void inject_emulated_exception(struct kvm_vcpu
*vcpu
)
4389 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4390 if (ctxt
->exception
.vector
== PF_VECTOR
)
4391 kvm_propagate_fault(vcpu
, &ctxt
->exception
);
4392 else if (ctxt
->exception
.error_code_valid
)
4393 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
4394 ctxt
->exception
.error_code
);
4396 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
4399 static void init_decode_cache(struct x86_emulate_ctxt
*ctxt
)
4401 memset(&ctxt
->twobyte
, 0,
4402 (void *)&ctxt
->_regs
- (void *)&ctxt
->twobyte
);
4404 ctxt
->fetch
.start
= 0;
4405 ctxt
->fetch
.end
= 0;
4406 ctxt
->io_read
.pos
= 0;
4407 ctxt
->io_read
.end
= 0;
4408 ctxt
->mem_read
.pos
= 0;
4409 ctxt
->mem_read
.end
= 0;
4412 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
4414 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4417 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
4419 ctxt
->eflags
= kvm_get_rflags(vcpu
);
4420 ctxt
->eip
= kvm_rip_read(vcpu
);
4421 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
4422 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
4423 cs_l
? X86EMUL_MODE_PROT64
:
4424 cs_db
? X86EMUL_MODE_PROT32
:
4425 X86EMUL_MODE_PROT16
;
4426 ctxt
->guest_mode
= is_guest_mode(vcpu
);
4428 init_decode_cache(ctxt
);
4429 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
4432 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
4434 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4437 init_emulate_ctxt(vcpu
);
4441 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
4442 ret
= emulate_int_real(ctxt
, irq
);
4444 if (ret
!= X86EMUL_CONTINUE
)
4445 return EMULATE_FAIL
;
4447 ctxt
->eip
= ctxt
->_eip
;
4448 kvm_rip_write(vcpu
, ctxt
->eip
);
4449 kvm_set_rflags(vcpu
, ctxt
->eflags
);
4451 if (irq
== NMI_VECTOR
)
4452 vcpu
->arch
.nmi_pending
= 0;
4454 vcpu
->arch
.interrupt
.pending
= false;
4456 return EMULATE_DONE
;
4458 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
4460 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
4462 int r
= EMULATE_DONE
;
4464 ++vcpu
->stat
.insn_emulation_fail
;
4465 trace_kvm_emulate_insn_failed(vcpu
);
4466 if (!is_guest_mode(vcpu
)) {
4467 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
4468 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
4469 vcpu
->run
->internal
.ndata
= 0;
4472 kvm_queue_exception(vcpu
, UD_VECTOR
);
4477 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t gva
)
4486 * if emulation was due to access to shadowed page table
4487 * and it failed try to unshadow page and re-enter the
4488 * guest to let CPU execute the instruction.
4490 if (kvm_mmu_unprotect_page_virt(vcpu
, gva
))
4493 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, gva
, NULL
);
4495 if (gpa
== UNMAPPED_GVA
)
4496 return true; /* let cpu generate fault */
4499 * Do not retry the unhandleable instruction if it faults on the
4500 * readonly host memory, otherwise it will goto a infinite loop:
4501 * retry instruction -> write #PF -> emulation fail -> retry
4502 * instruction -> ...
4504 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
4505 if (!is_error_pfn(pfn
)) {
4506 kvm_release_pfn_clean(pfn
);
4513 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
4514 unsigned long cr2
, int emulation_type
)
4516 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4517 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2
;
4519 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
4520 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
4523 * If the emulation is caused by #PF and it is non-page_table
4524 * writing instruction, it means the VM-EXIT is caused by shadow
4525 * page protected, we can zap the shadow page and retry this
4526 * instruction directly.
4528 * Note: if the guest uses a non-page-table modifying instruction
4529 * on the PDE that points to the instruction, then we will unmap
4530 * the instruction and go to an infinite loop. So, we cache the
4531 * last retried eip and the last fault address, if we meet the eip
4532 * and the address again, we can break out of the potential infinite
4535 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
4537 if (!(emulation_type
& EMULTYPE_RETRY
))
4540 if (x86_page_table_writing_insn(ctxt
))
4543 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2
)
4546 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
4547 vcpu
->arch
.last_retry_addr
= cr2
;
4549 if (!vcpu
->arch
.mmu
.direct_map
)
4550 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
4552 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
4557 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
4558 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
4560 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
4567 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4568 bool writeback
= true;
4570 kvm_clear_exception_queue(vcpu
);
4572 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
4573 init_emulate_ctxt(vcpu
);
4574 ctxt
->interruptibility
= 0;
4575 ctxt
->have_exception
= false;
4576 ctxt
->perm_ok
= false;
4578 ctxt
->only_vendor_specific_insn
4579 = emulation_type
& EMULTYPE_TRAP_UD
;
4581 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
4583 trace_kvm_emulate_insn_start(vcpu
);
4584 ++vcpu
->stat
.insn_emulation
;
4585 if (r
!= EMULATION_OK
) {
4586 if (emulation_type
& EMULTYPE_TRAP_UD
)
4587 return EMULATE_FAIL
;
4588 if (reexecute_instruction(vcpu
, cr2
))
4589 return EMULATE_DONE
;
4590 if (emulation_type
& EMULTYPE_SKIP
)
4591 return EMULATE_FAIL
;
4592 return handle_emulation_failure(vcpu
);
4596 if (emulation_type
& EMULTYPE_SKIP
) {
4597 kvm_rip_write(vcpu
, ctxt
->_eip
);
4598 return EMULATE_DONE
;
4601 if (retry_instruction(ctxt
, cr2
, emulation_type
))
4602 return EMULATE_DONE
;
4604 /* this is needed for vmware backdoor interface to work since it
4605 changes registers values during IO operation */
4606 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
4607 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
4608 emulator_invalidate_register_cache(ctxt
);
4612 r
= x86_emulate_insn(ctxt
);
4614 if (r
== EMULATION_INTERCEPTED
)
4615 return EMULATE_DONE
;
4617 if (r
== EMULATION_FAILED
) {
4618 if (reexecute_instruction(vcpu
, cr2
))
4619 return EMULATE_DONE
;
4621 return handle_emulation_failure(vcpu
);
4624 if (ctxt
->have_exception
) {
4625 inject_emulated_exception(vcpu
);
4627 } else if (vcpu
->arch
.pio
.count
) {
4628 if (!vcpu
->arch
.pio
.in
)
4629 vcpu
->arch
.pio
.count
= 0;
4632 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
4634 r
= EMULATE_DO_MMIO
;
4635 } else if (vcpu
->mmio_needed
) {
4636 if (!vcpu
->mmio_is_write
)
4638 r
= EMULATE_DO_MMIO
;
4639 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
4640 } else if (r
== EMULATION_RESTART
)
4646 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
4647 kvm_set_rflags(vcpu
, ctxt
->eflags
);
4648 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
4649 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
4650 kvm_rip_write(vcpu
, ctxt
->eip
);
4652 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
4656 EXPORT_SYMBOL_GPL(x86_emulate_instruction
);
4658 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
4660 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4661 int ret
= emulator_pio_out_emulated(&vcpu
->arch
.emulate_ctxt
,
4662 size
, port
, &val
, 1);
4663 /* do not return to emulator after return from userspace */
4664 vcpu
->arch
.pio
.count
= 0;
4667 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
4669 static void tsc_bad(void *info
)
4671 __this_cpu_write(cpu_tsc_khz
, 0);
4674 static void tsc_khz_changed(void *data
)
4676 struct cpufreq_freqs
*freq
= data
;
4677 unsigned long khz
= 0;
4681 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
4682 khz
= cpufreq_quick_get(raw_smp_processor_id());
4685 __this_cpu_write(cpu_tsc_khz
, khz
);
4688 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
4691 struct cpufreq_freqs
*freq
= data
;
4693 struct kvm_vcpu
*vcpu
;
4694 int i
, send_ipi
= 0;
4697 * We allow guests to temporarily run on slowing clocks,
4698 * provided we notify them after, or to run on accelerating
4699 * clocks, provided we notify them before. Thus time never
4702 * However, we have a problem. We can't atomically update
4703 * the frequency of a given CPU from this function; it is
4704 * merely a notifier, which can be called from any CPU.
4705 * Changing the TSC frequency at arbitrary points in time
4706 * requires a recomputation of local variables related to
4707 * the TSC for each VCPU. We must flag these local variables
4708 * to be updated and be sure the update takes place with the
4709 * new frequency before any guests proceed.
4711 * Unfortunately, the combination of hotplug CPU and frequency
4712 * change creates an intractable locking scenario; the order
4713 * of when these callouts happen is undefined with respect to
4714 * CPU hotplug, and they can race with each other. As such,
4715 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4716 * undefined; you can actually have a CPU frequency change take
4717 * place in between the computation of X and the setting of the
4718 * variable. To protect against this problem, all updates of
4719 * the per_cpu tsc_khz variable are done in an interrupt
4720 * protected IPI, and all callers wishing to update the value
4721 * must wait for a synchronous IPI to complete (which is trivial
4722 * if the caller is on the CPU already). This establishes the
4723 * necessary total order on variable updates.
4725 * Note that because a guest time update may take place
4726 * anytime after the setting of the VCPU's request bit, the
4727 * correct TSC value must be set before the request. However,
4728 * to ensure the update actually makes it to any guest which
4729 * starts running in hardware virtualization between the set
4730 * and the acquisition of the spinlock, we must also ping the
4731 * CPU after setting the request bit.
4735 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
4737 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
4740 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
4742 raw_spin_lock(&kvm_lock
);
4743 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
4744 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
4745 if (vcpu
->cpu
!= freq
->cpu
)
4747 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
4748 if (vcpu
->cpu
!= smp_processor_id())
4752 raw_spin_unlock(&kvm_lock
);
4754 if (freq
->old
< freq
->new && send_ipi
) {
4756 * We upscale the frequency. Must make the guest
4757 * doesn't see old kvmclock values while running with
4758 * the new frequency, otherwise we risk the guest sees
4759 * time go backwards.
4761 * In case we update the frequency for another cpu
4762 * (which might be in guest context) send an interrupt
4763 * to kick the cpu out of guest context. Next time
4764 * guest context is entered kvmclock will be updated,
4765 * so the guest will not see stale values.
4767 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
4772 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
4773 .notifier_call
= kvmclock_cpufreq_notifier
4776 static int kvmclock_cpu_notifier(struct notifier_block
*nfb
,
4777 unsigned long action
, void *hcpu
)
4779 unsigned int cpu
= (unsigned long)hcpu
;
4783 case CPU_DOWN_FAILED
:
4784 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
4786 case CPU_DOWN_PREPARE
:
4787 smp_call_function_single(cpu
, tsc_bad
, NULL
, 1);
4793 static struct notifier_block kvmclock_cpu_notifier_block
= {
4794 .notifier_call
= kvmclock_cpu_notifier
,
4795 .priority
= -INT_MAX
4798 static void kvm_timer_init(void)
4802 max_tsc_khz
= tsc_khz
;
4803 register_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
4804 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
4805 #ifdef CONFIG_CPU_FREQ
4806 struct cpufreq_policy policy
;
4807 memset(&policy
, 0, sizeof(policy
));
4809 cpufreq_get_policy(&policy
, cpu
);
4810 if (policy
.cpuinfo
.max_freq
)
4811 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
4814 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
4815 CPUFREQ_TRANSITION_NOTIFIER
);
4817 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
4818 for_each_online_cpu(cpu
)
4819 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
4822 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
4824 int kvm_is_in_guest(void)
4826 return __this_cpu_read(current_vcpu
) != NULL
;
4829 static int kvm_is_user_mode(void)
4833 if (__this_cpu_read(current_vcpu
))
4834 user_mode
= kvm_x86_ops
->get_cpl(__this_cpu_read(current_vcpu
));
4836 return user_mode
!= 0;
4839 static unsigned long kvm_get_guest_ip(void)
4841 unsigned long ip
= 0;
4843 if (__this_cpu_read(current_vcpu
))
4844 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
4849 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
4850 .is_in_guest
= kvm_is_in_guest
,
4851 .is_user_mode
= kvm_is_user_mode
,
4852 .get_guest_ip
= kvm_get_guest_ip
,
4855 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
4857 __this_cpu_write(current_vcpu
, vcpu
);
4859 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
4861 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
4863 __this_cpu_write(current_vcpu
, NULL
);
4865 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
4867 static void kvm_set_mmio_spte_mask(void)
4870 int maxphyaddr
= boot_cpu_data
.x86_phys_bits
;
4873 * Set the reserved bits and the present bit of an paging-structure
4874 * entry to generate page fault with PFER.RSV = 1.
4876 mask
= ((1ull << (62 - maxphyaddr
+ 1)) - 1) << maxphyaddr
;
4879 #ifdef CONFIG_X86_64
4881 * If reserved bit is not supported, clear the present bit to disable
4884 if (maxphyaddr
== 52)
4888 kvm_mmu_set_mmio_spte_mask(mask
);
4891 int kvm_arch_init(void *opaque
)
4894 struct kvm_x86_ops
*ops
= (struct kvm_x86_ops
*)opaque
;
4897 printk(KERN_ERR
"kvm: already loaded the other module\n");
4902 if (!ops
->cpu_has_kvm_support()) {
4903 printk(KERN_ERR
"kvm: no hardware support\n");
4907 if (ops
->disabled_by_bios()) {
4908 printk(KERN_ERR
"kvm: disabled by bios\n");
4913 r
= kvm_mmu_module_init();
4917 kvm_set_mmio_spte_mask();
4918 kvm_init_msr_list();
4921 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
4922 PT_DIRTY_MASK
, PT64_NX_MASK
, 0);
4926 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
4929 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
4938 void kvm_arch_exit(void)
4940 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
4942 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
4943 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
4944 CPUFREQ_TRANSITION_NOTIFIER
);
4945 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
4947 kvm_mmu_module_exit();
4950 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
4952 ++vcpu
->stat
.halt_exits
;
4953 if (irqchip_in_kernel(vcpu
->kvm
)) {
4954 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
4957 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
4961 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
4963 int kvm_hv_hypercall(struct kvm_vcpu
*vcpu
)
4965 u64 param
, ingpa
, outgpa
, ret
;
4966 uint16_t code
, rep_idx
, rep_cnt
, res
= HV_STATUS_SUCCESS
, rep_done
= 0;
4967 bool fast
, longmode
;
4971 * hypercall generates UD from non zero cpl and real mode
4974 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 || !is_protmode(vcpu
)) {
4975 kvm_queue_exception(vcpu
, UD_VECTOR
);
4979 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
4980 longmode
= is_long_mode(vcpu
) && cs_l
== 1;
4983 param
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDX
) << 32) |
4984 (kvm_register_read(vcpu
, VCPU_REGS_RAX
) & 0xffffffff);
4985 ingpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RBX
) << 32) |
4986 (kvm_register_read(vcpu
, VCPU_REGS_RCX
) & 0xffffffff);
4987 outgpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDI
) << 32) |
4988 (kvm_register_read(vcpu
, VCPU_REGS_RSI
) & 0xffffffff);
4990 #ifdef CONFIG_X86_64
4992 param
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4993 ingpa
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4994 outgpa
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
4998 code
= param
& 0xffff;
4999 fast
= (param
>> 16) & 0x1;
5000 rep_cnt
= (param
>> 32) & 0xfff;
5001 rep_idx
= (param
>> 48) & 0xfff;
5003 trace_kvm_hv_hypercall(code
, fast
, rep_cnt
, rep_idx
, ingpa
, outgpa
);
5006 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT
:
5007 kvm_vcpu_on_spin(vcpu
);
5010 res
= HV_STATUS_INVALID_HYPERCALL_CODE
;
5014 ret
= res
| (((u64
)rep_done
& 0xfff) << 32);
5016 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
5018 kvm_register_write(vcpu
, VCPU_REGS_RDX
, ret
>> 32);
5019 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
& 0xffffffff);
5025 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
5027 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
5030 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
5031 return kvm_hv_hypercall(vcpu
);
5033 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5034 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
5035 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5036 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5037 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
5039 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
5041 if (!is_long_mode(vcpu
)) {
5049 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
5055 case KVM_HC_VAPIC_POLL_IRQ
:
5063 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
5064 ++vcpu
->stat
.hypercalls
;
5067 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
5069 int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
5071 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5072 char instruction
[3];
5073 unsigned long rip
= kvm_rip_read(vcpu
);
5076 * Blow out the MMU to ensure that no other VCPU has an active mapping
5077 * to ensure that the updated hypercall appears atomically across all
5080 kvm_mmu_zap_all(vcpu
->kvm
);
5082 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
5084 return emulator_write_emulated(ctxt
, rip
, instruction
, 3, NULL
);
5088 * Check if userspace requested an interrupt window, and that the
5089 * interrupt window is open.
5091 * No need to exit to userspace if we already have an interrupt queued.
5093 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
5095 return (!irqchip_in_kernel(vcpu
->kvm
) && !kvm_cpu_has_interrupt(vcpu
) &&
5096 vcpu
->run
->request_interrupt_window
&&
5097 kvm_arch_interrupt_allowed(vcpu
));
5100 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
5102 struct kvm_run
*kvm_run
= vcpu
->run
;
5104 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
5105 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
5106 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
5107 if (irqchip_in_kernel(vcpu
->kvm
))
5108 kvm_run
->ready_for_interrupt_injection
= 1;
5110 kvm_run
->ready_for_interrupt_injection
=
5111 kvm_arch_interrupt_allowed(vcpu
) &&
5112 !kvm_cpu_has_interrupt(vcpu
) &&
5113 !kvm_event_needs_reinjection(vcpu
);
5116 static int vapic_enter(struct kvm_vcpu
*vcpu
)
5118 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
5121 if (!apic
|| !apic
->vapic_addr
)
5124 page
= gfn_to_page(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
5125 if (is_error_page(page
))
5128 vcpu
->arch
.apic
->vapic_page
= page
;
5132 static void vapic_exit(struct kvm_vcpu
*vcpu
)
5134 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
5137 if (!apic
|| !apic
->vapic_addr
)
5140 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5141 kvm_release_page_dirty(apic
->vapic_page
);
5142 mark_page_dirty(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
5143 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5146 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
5150 if (!kvm_x86_ops
->update_cr8_intercept
)
5153 if (!vcpu
->arch
.apic
)
5156 if (!vcpu
->arch
.apic
->vapic_addr
)
5157 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
5164 tpr
= kvm_lapic_get_cr8(vcpu
);
5166 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
5169 static void inject_pending_event(struct kvm_vcpu
*vcpu
)
5171 /* try to reinject previous events if any */
5172 if (vcpu
->arch
.exception
.pending
) {
5173 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
5174 vcpu
->arch
.exception
.has_error_code
,
5175 vcpu
->arch
.exception
.error_code
);
5176 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
5177 vcpu
->arch
.exception
.has_error_code
,
5178 vcpu
->arch
.exception
.error_code
,
5179 vcpu
->arch
.exception
.reinject
);
5183 if (vcpu
->arch
.nmi_injected
) {
5184 kvm_x86_ops
->set_nmi(vcpu
);
5188 if (vcpu
->arch
.interrupt
.pending
) {
5189 kvm_x86_ops
->set_irq(vcpu
);
5193 /* try to inject new event if pending */
5194 if (vcpu
->arch
.nmi_pending
) {
5195 if (kvm_x86_ops
->nmi_allowed(vcpu
)) {
5196 --vcpu
->arch
.nmi_pending
;
5197 vcpu
->arch
.nmi_injected
= true;
5198 kvm_x86_ops
->set_nmi(vcpu
);
5200 } else if (kvm_cpu_has_interrupt(vcpu
)) {
5201 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
5202 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
5204 kvm_x86_ops
->set_irq(vcpu
);
5209 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
5211 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
5212 !vcpu
->guest_xcr0_loaded
) {
5213 /* kvm_set_xcr() also depends on this */
5214 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
5215 vcpu
->guest_xcr0_loaded
= 1;
5219 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
5221 if (vcpu
->guest_xcr0_loaded
) {
5222 if (vcpu
->arch
.xcr0
!= host_xcr0
)
5223 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
5224 vcpu
->guest_xcr0_loaded
= 0;
5228 static void process_nmi(struct kvm_vcpu
*vcpu
)
5233 * x86 is limited to one NMI running, and one NMI pending after it.
5234 * If an NMI is already in progress, limit further NMIs to just one.
5235 * Otherwise, allow two (and we'll inject the first one immediately).
5237 if (kvm_x86_ops
->get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
5240 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
5241 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
5242 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5245 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
5248 bool req_int_win
= !irqchip_in_kernel(vcpu
->kvm
) &&
5249 vcpu
->run
->request_interrupt_window
;
5250 bool req_immediate_exit
= 0;
5252 if (vcpu
->requests
) {
5253 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
5254 kvm_mmu_unload(vcpu
);
5255 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
5256 __kvm_migrate_timers(vcpu
);
5257 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
5258 r
= kvm_guest_time_update(vcpu
);
5262 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
5263 kvm_mmu_sync_roots(vcpu
);
5264 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
5265 kvm_x86_ops
->tlb_flush(vcpu
);
5266 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
5267 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
5271 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
5272 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
5276 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
)) {
5277 vcpu
->fpu_active
= 0;
5278 kvm_x86_ops
->fpu_deactivate(vcpu
);
5280 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
5281 /* Page is swapped out. Do synthetic halt */
5282 vcpu
->arch
.apf
.halted
= true;
5286 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
5287 record_steal_time(vcpu
);
5288 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
5290 req_immediate_exit
=
5291 kvm_check_request(KVM_REQ_IMMEDIATE_EXIT
, vcpu
);
5292 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
5293 kvm_handle_pmu_event(vcpu
);
5294 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
5295 kvm_deliver_pmi(vcpu
);
5298 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
5299 inject_pending_event(vcpu
);
5301 /* enable NMI/IRQ window open exits if needed */
5302 if (vcpu
->arch
.nmi_pending
)
5303 kvm_x86_ops
->enable_nmi_window(vcpu
);
5304 else if (kvm_cpu_has_interrupt(vcpu
) || req_int_win
)
5305 kvm_x86_ops
->enable_irq_window(vcpu
);
5307 if (kvm_lapic_enabled(vcpu
)) {
5308 update_cr8_intercept(vcpu
);
5309 kvm_lapic_sync_to_vapic(vcpu
);
5313 r
= kvm_mmu_reload(vcpu
);
5315 goto cancel_injection
;
5320 kvm_x86_ops
->prepare_guest_switch(vcpu
);
5321 if (vcpu
->fpu_active
)
5322 kvm_load_guest_fpu(vcpu
);
5323 kvm_load_guest_xcr0(vcpu
);
5325 vcpu
->mode
= IN_GUEST_MODE
;
5327 /* We should set ->mode before check ->requests,
5328 * see the comment in make_all_cpus_request.
5332 local_irq_disable();
5334 if (vcpu
->mode
== EXITING_GUEST_MODE
|| vcpu
->requests
5335 || need_resched() || signal_pending(current
)) {
5336 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
5341 goto cancel_injection
;
5344 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
5346 if (req_immediate_exit
)
5347 smp_send_reschedule(vcpu
->cpu
);
5351 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
5353 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
5354 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
5355 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
5356 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
5359 trace_kvm_entry(vcpu
->vcpu_id
);
5360 kvm_x86_ops
->run(vcpu
);
5363 * If the guest has used debug registers, at least dr7
5364 * will be disabled while returning to the host.
5365 * If we don't have active breakpoints in the host, we don't
5366 * care about the messed up debug address registers. But if
5367 * we have some of them active, restore the old state.
5369 if (hw_breakpoint_active())
5370 hw_breakpoint_restore();
5372 vcpu
->arch
.last_guest_tsc
= kvm_x86_ops
->read_l1_tsc(vcpu
);
5374 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
5381 * We must have an instruction between local_irq_enable() and
5382 * kvm_guest_exit(), so the timer interrupt isn't delayed by
5383 * the interrupt shadow. The stat.exits increment will do nicely.
5384 * But we need to prevent reordering, hence this barrier():
5392 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5395 * Profile KVM exit RIPs:
5397 if (unlikely(prof_on
== KVM_PROFILING
)) {
5398 unsigned long rip
= kvm_rip_read(vcpu
);
5399 profile_hit(KVM_PROFILING
, (void *)rip
);
5402 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
5403 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
5405 if (vcpu
->arch
.apic_attention
)
5406 kvm_lapic_sync_from_vapic(vcpu
);
5408 r
= kvm_x86_ops
->handle_exit(vcpu
);
5412 kvm_x86_ops
->cancel_injection(vcpu
);
5413 if (unlikely(vcpu
->arch
.apic_attention
))
5414 kvm_lapic_sync_from_vapic(vcpu
);
5420 static int __vcpu_run(struct kvm_vcpu
*vcpu
)
5423 struct kvm
*kvm
= vcpu
->kvm
;
5425 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
)) {
5426 pr_debug("vcpu %d received sipi with vector # %x\n",
5427 vcpu
->vcpu_id
, vcpu
->arch
.sipi_vector
);
5428 kvm_lapic_reset(vcpu
);
5429 r
= kvm_arch_vcpu_reset(vcpu
);
5432 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
5435 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
5436 r
= vapic_enter(vcpu
);
5438 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
5444 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
5445 !vcpu
->arch
.apf
.halted
)
5446 r
= vcpu_enter_guest(vcpu
);
5448 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
5449 kvm_vcpu_block(vcpu
);
5450 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
5451 if (kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
5453 switch(vcpu
->arch
.mp_state
) {
5454 case KVM_MP_STATE_HALTED
:
5455 vcpu
->arch
.mp_state
=
5456 KVM_MP_STATE_RUNNABLE
;
5457 case KVM_MP_STATE_RUNNABLE
:
5458 vcpu
->arch
.apf
.halted
= false;
5460 case KVM_MP_STATE_SIPI_RECEIVED
:
5471 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
5472 if (kvm_cpu_has_pending_timer(vcpu
))
5473 kvm_inject_pending_timer_irqs(vcpu
);
5475 if (dm_request_for_irq_injection(vcpu
)) {
5477 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
5478 ++vcpu
->stat
.request_irq_exits
;
5481 kvm_check_async_pf_completion(vcpu
);
5483 if (signal_pending(current
)) {
5485 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
5486 ++vcpu
->stat
.signal_exits
;
5488 if (need_resched()) {
5489 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
5491 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
5495 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
5502 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
5505 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5506 r
= emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
5507 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
5508 if (r
!= EMULATE_DONE
)
5513 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
5515 BUG_ON(!vcpu
->arch
.pio
.count
);
5517 return complete_emulated_io(vcpu
);
5521 * Implements the following, as a state machine:
5536 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
5538 struct kvm_run
*run
= vcpu
->run
;
5539 struct kvm_mmio_fragment
*frag
;
5541 BUG_ON(!vcpu
->mmio_needed
);
5543 /* Complete previous fragment */
5544 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
++];
5545 if (!vcpu
->mmio_is_write
)
5546 memcpy(frag
->data
, run
->mmio
.data
, frag
->len
);
5547 if (vcpu
->mmio_cur_fragment
== vcpu
->mmio_nr_fragments
) {
5548 vcpu
->mmio_needed
= 0;
5549 if (vcpu
->mmio_is_write
)
5551 vcpu
->mmio_read_completed
= 1;
5552 return complete_emulated_io(vcpu
);
5554 /* Initiate next fragment */
5556 run
->exit_reason
= KVM_EXIT_MMIO
;
5557 run
->mmio
.phys_addr
= frag
->gpa
;
5558 if (vcpu
->mmio_is_write
)
5559 memcpy(run
->mmio
.data
, frag
->data
, frag
->len
);
5560 run
->mmio
.len
= frag
->len
;
5561 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
5562 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
5567 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
5572 if (!tsk_used_math(current
) && init_fpu(current
))
5575 if (vcpu
->sigset_active
)
5576 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
5578 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
5579 kvm_vcpu_block(vcpu
);
5580 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
5585 /* re-sync apic's tpr */
5586 if (!irqchip_in_kernel(vcpu
->kvm
)) {
5587 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
5593 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
5594 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
5595 vcpu
->arch
.complete_userspace_io
= NULL
;
5600 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
5602 r
= __vcpu_run(vcpu
);
5605 post_kvm_run_save(vcpu
);
5606 if (vcpu
->sigset_active
)
5607 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
5612 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
5614 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
5616 * We are here if userspace calls get_regs() in the middle of
5617 * instruction emulation. Registers state needs to be copied
5618 * back from emulation context to vcpu. Userspace shouldn't do
5619 * that usually, but some bad designed PV devices (vmware
5620 * backdoor interface) need this to work
5622 emulator_writeback_register_cache(&vcpu
->arch
.emulate_ctxt
);
5623 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5625 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5626 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
5627 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5628 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5629 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
5630 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
5631 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
5632 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
5633 #ifdef CONFIG_X86_64
5634 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
5635 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
5636 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
5637 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
5638 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
5639 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
5640 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
5641 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
5644 regs
->rip
= kvm_rip_read(vcpu
);
5645 regs
->rflags
= kvm_get_rflags(vcpu
);
5650 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
5652 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
5653 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5655 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
5656 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
5657 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
5658 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
5659 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
5660 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
5661 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
5662 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
5663 #ifdef CONFIG_X86_64
5664 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
5665 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
5666 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
5667 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
5668 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
5669 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
5670 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
5671 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
5674 kvm_rip_write(vcpu
, regs
->rip
);
5675 kvm_set_rflags(vcpu
, regs
->rflags
);
5677 vcpu
->arch
.exception
.pending
= false;
5679 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5684 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
5686 struct kvm_segment cs
;
5688 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
5692 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
5694 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
5695 struct kvm_sregs
*sregs
)
5699 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
5700 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
5701 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
5702 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
5703 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
5704 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
5706 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
5707 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
5709 kvm_x86_ops
->get_idt(vcpu
, &dt
);
5710 sregs
->idt
.limit
= dt
.size
;
5711 sregs
->idt
.base
= dt
.address
;
5712 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
5713 sregs
->gdt
.limit
= dt
.size
;
5714 sregs
->gdt
.base
= dt
.address
;
5716 sregs
->cr0
= kvm_read_cr0(vcpu
);
5717 sregs
->cr2
= vcpu
->arch
.cr2
;
5718 sregs
->cr3
= kvm_read_cr3(vcpu
);
5719 sregs
->cr4
= kvm_read_cr4(vcpu
);
5720 sregs
->cr8
= kvm_get_cr8(vcpu
);
5721 sregs
->efer
= vcpu
->arch
.efer
;
5722 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
5724 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
5726 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
5727 set_bit(vcpu
->arch
.interrupt
.nr
,
5728 (unsigned long *)sregs
->interrupt_bitmap
);
5733 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
5734 struct kvm_mp_state
*mp_state
)
5736 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
5740 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
5741 struct kvm_mp_state
*mp_state
)
5743 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
5744 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5748 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
5749 int reason
, bool has_error_code
, u32 error_code
)
5751 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5754 init_emulate_ctxt(vcpu
);
5756 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
5757 has_error_code
, error_code
);
5760 return EMULATE_FAIL
;
5762 kvm_rip_write(vcpu
, ctxt
->eip
);
5763 kvm_set_rflags(vcpu
, ctxt
->eflags
);
5764 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5765 return EMULATE_DONE
;
5767 EXPORT_SYMBOL_GPL(kvm_task_switch
);
5769 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
5770 struct kvm_sregs
*sregs
)
5772 int mmu_reset_needed
= 0;
5773 int pending_vec
, max_bits
, idx
;
5776 dt
.size
= sregs
->idt
.limit
;
5777 dt
.address
= sregs
->idt
.base
;
5778 kvm_x86_ops
->set_idt(vcpu
, &dt
);
5779 dt
.size
= sregs
->gdt
.limit
;
5780 dt
.address
= sregs
->gdt
.base
;
5781 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
5783 vcpu
->arch
.cr2
= sregs
->cr2
;
5784 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
5785 vcpu
->arch
.cr3
= sregs
->cr3
;
5786 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
5788 kvm_set_cr8(vcpu
, sregs
->cr8
);
5790 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
5791 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
5792 kvm_set_apic_base(vcpu
, sregs
->apic_base
);
5794 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
5795 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
5796 vcpu
->arch
.cr0
= sregs
->cr0
;
5798 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
5799 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
5800 if (sregs
->cr4
& X86_CR4_OSXSAVE
)
5801 kvm_update_cpuid(vcpu
);
5803 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5804 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
5805 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
5806 mmu_reset_needed
= 1;
5808 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5810 if (mmu_reset_needed
)
5811 kvm_mmu_reset_context(vcpu
);
5813 max_bits
= KVM_NR_INTERRUPTS
;
5814 pending_vec
= find_first_bit(
5815 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
5816 if (pending_vec
< max_bits
) {
5817 kvm_queue_interrupt(vcpu
, pending_vec
, false);
5818 pr_debug("Set back pending irq %d\n", pending_vec
);
5821 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
5822 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
5823 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
5824 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
5825 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
5826 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
5828 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
5829 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
5831 update_cr8_intercept(vcpu
);
5833 /* Older userspace won't unhalt the vcpu on reset. */
5834 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
5835 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
5837 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
5839 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5844 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
5845 struct kvm_guest_debug
*dbg
)
5847 unsigned long rflags
;
5850 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
5852 if (vcpu
->arch
.exception
.pending
)
5854 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
5855 kvm_queue_exception(vcpu
, DB_VECTOR
);
5857 kvm_queue_exception(vcpu
, BP_VECTOR
);
5861 * Read rflags as long as potentially injected trace flags are still
5864 rflags
= kvm_get_rflags(vcpu
);
5866 vcpu
->guest_debug
= dbg
->control
;
5867 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
5868 vcpu
->guest_debug
= 0;
5870 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
5871 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
5872 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
5873 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
5875 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
5876 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
5878 kvm_update_dr7(vcpu
);
5880 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
5881 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
5882 get_segment_base(vcpu
, VCPU_SREG_CS
);
5885 * Trigger an rflags update that will inject or remove the trace
5888 kvm_set_rflags(vcpu
, rflags
);
5890 kvm_x86_ops
->update_db_bp_intercept(vcpu
);
5900 * Translate a guest virtual address to a guest physical address.
5902 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
5903 struct kvm_translation
*tr
)
5905 unsigned long vaddr
= tr
->linear_address
;
5909 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5910 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
5911 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5912 tr
->physical_address
= gpa
;
5913 tr
->valid
= gpa
!= UNMAPPED_GVA
;
5920 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
5922 struct i387_fxsave_struct
*fxsave
=
5923 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
5925 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
5926 fpu
->fcw
= fxsave
->cwd
;
5927 fpu
->fsw
= fxsave
->swd
;
5928 fpu
->ftwx
= fxsave
->twd
;
5929 fpu
->last_opcode
= fxsave
->fop
;
5930 fpu
->last_ip
= fxsave
->rip
;
5931 fpu
->last_dp
= fxsave
->rdp
;
5932 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
5937 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
5939 struct i387_fxsave_struct
*fxsave
=
5940 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
5942 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
5943 fxsave
->cwd
= fpu
->fcw
;
5944 fxsave
->swd
= fpu
->fsw
;
5945 fxsave
->twd
= fpu
->ftwx
;
5946 fxsave
->fop
= fpu
->last_opcode
;
5947 fxsave
->rip
= fpu
->last_ip
;
5948 fxsave
->rdp
= fpu
->last_dp
;
5949 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
5954 int fx_init(struct kvm_vcpu
*vcpu
)
5958 err
= fpu_alloc(&vcpu
->arch
.guest_fpu
);
5962 fpu_finit(&vcpu
->arch
.guest_fpu
);
5965 * Ensure guest xcr0 is valid for loading
5967 vcpu
->arch
.xcr0
= XSTATE_FP
;
5969 vcpu
->arch
.cr0
|= X86_CR0_ET
;
5973 EXPORT_SYMBOL_GPL(fx_init
);
5975 static void fx_free(struct kvm_vcpu
*vcpu
)
5977 fpu_free(&vcpu
->arch
.guest_fpu
);
5980 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
5982 if (vcpu
->guest_fpu_loaded
)
5986 * Restore all possible states in the guest,
5987 * and assume host would use all available bits.
5988 * Guest xcr0 would be loaded later.
5990 kvm_put_guest_xcr0(vcpu
);
5991 vcpu
->guest_fpu_loaded
= 1;
5992 __kernel_fpu_begin();
5993 fpu_restore_checking(&vcpu
->arch
.guest_fpu
);
5997 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
5999 kvm_put_guest_xcr0(vcpu
);
6001 if (!vcpu
->guest_fpu_loaded
)
6004 vcpu
->guest_fpu_loaded
= 0;
6005 fpu_save_init(&vcpu
->arch
.guest_fpu
);
6007 ++vcpu
->stat
.fpu_reload
;
6008 kvm_make_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
);
6012 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
6014 kvmclock_reset(vcpu
);
6016 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
6018 kvm_x86_ops
->vcpu_free(vcpu
);
6021 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
6024 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
6025 printk_once(KERN_WARNING
6026 "kvm: SMP vm created on host with unstable TSC; "
6027 "guest TSC will not be reliable\n");
6028 return kvm_x86_ops
->vcpu_create(kvm
, id
);
6031 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
6035 vcpu
->arch
.mtrr_state
.have_fixed
= 1;
6036 r
= vcpu_load(vcpu
);
6039 r
= kvm_arch_vcpu_reset(vcpu
);
6041 r
= kvm_mmu_setup(vcpu
);
6047 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
6050 vcpu
->arch
.apf
.msr_val
= 0;
6052 r
= vcpu_load(vcpu
);
6054 kvm_mmu_unload(vcpu
);
6058 kvm_x86_ops
->vcpu_free(vcpu
);
6061 int kvm_arch_vcpu_reset(struct kvm_vcpu
*vcpu
)
6063 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
6064 vcpu
->arch
.nmi_pending
= 0;
6065 vcpu
->arch
.nmi_injected
= false;
6067 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
6068 vcpu
->arch
.dr6
= DR6_FIXED_1
;
6069 vcpu
->arch
.dr7
= DR7_FIXED_1
;
6070 kvm_update_dr7(vcpu
);
6072 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6073 vcpu
->arch
.apf
.msr_val
= 0;
6074 vcpu
->arch
.st
.msr_val
= 0;
6076 kvmclock_reset(vcpu
);
6078 kvm_clear_async_pf_completion_queue(vcpu
);
6079 kvm_async_pf_hash_reset(vcpu
);
6080 vcpu
->arch
.apf
.halted
= false;
6082 kvm_pmu_reset(vcpu
);
6084 return kvm_x86_ops
->vcpu_reset(vcpu
);
6087 int kvm_arch_hardware_enable(void *garbage
)
6090 struct kvm_vcpu
*vcpu
;
6095 bool stable
, backwards_tsc
= false;
6097 kvm_shared_msr_cpu_online();
6098 ret
= kvm_x86_ops
->hardware_enable(garbage
);
6102 local_tsc
= native_read_tsc();
6103 stable
= !check_tsc_unstable();
6104 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
6105 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
6106 if (!stable
&& vcpu
->cpu
== smp_processor_id())
6107 set_bit(KVM_REQ_CLOCK_UPDATE
, &vcpu
->requests
);
6108 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
6109 backwards_tsc
= true;
6110 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
6111 max_tsc
= vcpu
->arch
.last_host_tsc
;
6117 * Sometimes, even reliable TSCs go backwards. This happens on
6118 * platforms that reset TSC during suspend or hibernate actions, but
6119 * maintain synchronization. We must compensate. Fortunately, we can
6120 * detect that condition here, which happens early in CPU bringup,
6121 * before any KVM threads can be running. Unfortunately, we can't
6122 * bring the TSCs fully up to date with real time, as we aren't yet far
6123 * enough into CPU bringup that we know how much real time has actually
6124 * elapsed; our helper function, get_kernel_ns() will be using boot
6125 * variables that haven't been updated yet.
6127 * So we simply find the maximum observed TSC above, then record the
6128 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
6129 * the adjustment will be applied. Note that we accumulate
6130 * adjustments, in case multiple suspend cycles happen before some VCPU
6131 * gets a chance to run again. In the event that no KVM threads get a
6132 * chance to run, we will miss the entire elapsed period, as we'll have
6133 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
6134 * loose cycle time. This isn't too big a deal, since the loss will be
6135 * uniform across all VCPUs (not to mention the scenario is extremely
6136 * unlikely). It is possible that a second hibernate recovery happens
6137 * much faster than a first, causing the observed TSC here to be
6138 * smaller; this would require additional padding adjustment, which is
6139 * why we set last_host_tsc to the local tsc observed here.
6141 * N.B. - this code below runs only on platforms with reliable TSC,
6142 * as that is the only way backwards_tsc is set above. Also note
6143 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
6144 * have the same delta_cyc adjustment applied if backwards_tsc
6145 * is detected. Note further, this adjustment is only done once,
6146 * as we reset last_host_tsc on all VCPUs to stop this from being
6147 * called multiple times (one for each physical CPU bringup).
6149 * Platforms with unreliable TSCs don't have to deal with this, they
6150 * will be compensated by the logic in vcpu_load, which sets the TSC to
6151 * catchup mode. This will catchup all VCPUs to real time, but cannot
6152 * guarantee that they stay in perfect synchronization.
6154 if (backwards_tsc
) {
6155 u64 delta_cyc
= max_tsc
- local_tsc
;
6156 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
6157 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
6158 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
6159 vcpu
->arch
.last_host_tsc
= local_tsc
;
6163 * We have to disable TSC offset matching.. if you were
6164 * booting a VM while issuing an S4 host suspend....
6165 * you may have some problem. Solving this issue is
6166 * left as an exercise to the reader.
6168 kvm
->arch
.last_tsc_nsec
= 0;
6169 kvm
->arch
.last_tsc_write
= 0;
6176 void kvm_arch_hardware_disable(void *garbage
)
6178 kvm_x86_ops
->hardware_disable(garbage
);
6179 drop_user_return_notifiers(garbage
);
6182 int kvm_arch_hardware_setup(void)
6184 return kvm_x86_ops
->hardware_setup();
6187 void kvm_arch_hardware_unsetup(void)
6189 kvm_x86_ops
->hardware_unsetup();
6192 void kvm_arch_check_processor_compat(void *rtn
)
6194 kvm_x86_ops
->check_processor_compatibility(rtn
);
6197 bool kvm_vcpu_compatible(struct kvm_vcpu
*vcpu
)
6199 return irqchip_in_kernel(vcpu
->kvm
) == (vcpu
->arch
.apic
!= NULL
);
6202 struct static_key kvm_no_apic_vcpu __read_mostly
;
6204 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
6210 BUG_ON(vcpu
->kvm
== NULL
);
6213 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
6214 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_bsp(vcpu
))
6215 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
6217 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
6219 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
6224 vcpu
->arch
.pio_data
= page_address(page
);
6226 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
6228 r
= kvm_mmu_create(vcpu
);
6230 goto fail_free_pio_data
;
6232 if (irqchip_in_kernel(kvm
)) {
6233 r
= kvm_create_lapic(vcpu
);
6235 goto fail_mmu_destroy
;
6237 static_key_slow_inc(&kvm_no_apic_vcpu
);
6239 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
6241 if (!vcpu
->arch
.mce_banks
) {
6243 goto fail_free_lapic
;
6245 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
6247 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
))
6248 goto fail_free_mce_banks
;
6250 kvm_async_pf_hash_reset(vcpu
);
6254 fail_free_mce_banks
:
6255 kfree(vcpu
->arch
.mce_banks
);
6257 kvm_free_lapic(vcpu
);
6259 kvm_mmu_destroy(vcpu
);
6261 free_page((unsigned long)vcpu
->arch
.pio_data
);
6266 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
6270 kvm_pmu_destroy(vcpu
);
6271 kfree(vcpu
->arch
.mce_banks
);
6272 kvm_free_lapic(vcpu
);
6273 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6274 kvm_mmu_destroy(vcpu
);
6275 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
6276 free_page((unsigned long)vcpu
->arch
.pio_data
);
6277 if (!irqchip_in_kernel(vcpu
->kvm
))
6278 static_key_slow_dec(&kvm_no_apic_vcpu
);
6281 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
6286 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
6287 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
6289 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6290 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
6291 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
6292 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
6293 &kvm
->arch
.irq_sources_bitmap
);
6295 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
6296 mutex_init(&kvm
->arch
.apic_map_lock
);
6301 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
6304 r
= vcpu_load(vcpu
);
6306 kvm_mmu_unload(vcpu
);
6310 static void kvm_free_vcpus(struct kvm
*kvm
)
6313 struct kvm_vcpu
*vcpu
;
6316 * Unpin any mmu pages first.
6318 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
6319 kvm_clear_async_pf_completion_queue(vcpu
);
6320 kvm_unload_vcpu_mmu(vcpu
);
6322 kvm_for_each_vcpu(i
, vcpu
, kvm
)
6323 kvm_arch_vcpu_free(vcpu
);
6325 mutex_lock(&kvm
->lock
);
6326 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
6327 kvm
->vcpus
[i
] = NULL
;
6329 atomic_set(&kvm
->online_vcpus
, 0);
6330 mutex_unlock(&kvm
->lock
);
6333 void kvm_arch_sync_events(struct kvm
*kvm
)
6335 kvm_free_all_assigned_devices(kvm
);
6339 void kvm_arch_destroy_vm(struct kvm
*kvm
)
6341 kvm_iommu_unmap_guest(kvm
);
6342 kfree(kvm
->arch
.vpic
);
6343 kfree(kvm
->arch
.vioapic
);
6344 kvm_free_vcpus(kvm
);
6345 if (kvm
->arch
.apic_access_page
)
6346 put_page(kvm
->arch
.apic_access_page
);
6347 if (kvm
->arch
.ept_identity_pagetable
)
6348 put_page(kvm
->arch
.ept_identity_pagetable
);
6349 kfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
6352 void kvm_arch_free_memslot(struct kvm_memory_slot
*free
,
6353 struct kvm_memory_slot
*dont
)
6357 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
6358 if (!dont
|| free
->arch
.rmap
[i
] != dont
->arch
.rmap
[i
]) {
6359 kvm_kvfree(free
->arch
.rmap
[i
]);
6360 free
->arch
.rmap
[i
] = NULL
;
6365 if (!dont
|| free
->arch
.lpage_info
[i
- 1] !=
6366 dont
->arch
.lpage_info
[i
- 1]) {
6367 kvm_kvfree(free
->arch
.lpage_info
[i
- 1]);
6368 free
->arch
.lpage_info
[i
- 1] = NULL
;
6373 int kvm_arch_create_memslot(struct kvm_memory_slot
*slot
, unsigned long npages
)
6377 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
6382 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
6383 slot
->base_gfn
, level
) + 1;
6385 slot
->arch
.rmap
[i
] =
6386 kvm_kvzalloc(lpages
* sizeof(*slot
->arch
.rmap
[i
]));
6387 if (!slot
->arch
.rmap
[i
])
6392 slot
->arch
.lpage_info
[i
- 1] = kvm_kvzalloc(lpages
*
6393 sizeof(*slot
->arch
.lpage_info
[i
- 1]));
6394 if (!slot
->arch
.lpage_info
[i
- 1])
6397 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
6398 slot
->arch
.lpage_info
[i
- 1][0].write_count
= 1;
6399 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
6400 slot
->arch
.lpage_info
[i
- 1][lpages
- 1].write_count
= 1;
6401 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
6403 * If the gfn and userspace address are not aligned wrt each
6404 * other, or if explicitly asked to, disable large page
6405 * support for this slot
6407 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1) ||
6408 !kvm_largepages_enabled()) {
6411 for (j
= 0; j
< lpages
; ++j
)
6412 slot
->arch
.lpage_info
[i
- 1][j
].write_count
= 1;
6419 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
6420 kvm_kvfree(slot
->arch
.rmap
[i
]);
6421 slot
->arch
.rmap
[i
] = NULL
;
6425 kvm_kvfree(slot
->arch
.lpage_info
[i
- 1]);
6426 slot
->arch
.lpage_info
[i
- 1] = NULL
;
6431 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
6432 struct kvm_memory_slot
*memslot
,
6433 struct kvm_memory_slot old
,
6434 struct kvm_userspace_memory_region
*mem
,
6437 int npages
= memslot
->npages
;
6438 int map_flags
= MAP_PRIVATE
| MAP_ANONYMOUS
;
6440 /* Prevent internal slot pages from being moved by fork()/COW. */
6441 if (memslot
->id
>= KVM_MEMORY_SLOTS
)
6442 map_flags
= MAP_SHARED
| MAP_ANONYMOUS
;
6444 /*To keep backward compatibility with older userspace,
6445 *x86 needs to handle !user_alloc case.
6448 if (npages
&& !old
.npages
) {
6449 unsigned long userspace_addr
;
6451 userspace_addr
= vm_mmap(NULL
, 0,
6453 PROT_READ
| PROT_WRITE
,
6457 if (IS_ERR((void *)userspace_addr
))
6458 return PTR_ERR((void *)userspace_addr
);
6460 memslot
->userspace_addr
= userspace_addr
;
6468 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
6469 struct kvm_userspace_memory_region
*mem
,
6470 struct kvm_memory_slot old
,
6474 int nr_mmu_pages
= 0, npages
= mem
->memory_size
>> PAGE_SHIFT
;
6476 if (!user_alloc
&& !old
.user_alloc
&& old
.npages
&& !npages
) {
6479 ret
= vm_munmap(old
.userspace_addr
,
6480 old
.npages
* PAGE_SIZE
);
6483 "kvm_vm_ioctl_set_memory_region: "
6484 "failed to munmap memory\n");
6487 if (!kvm
->arch
.n_requested_mmu_pages
)
6488 nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
6490 spin_lock(&kvm
->mmu_lock
);
6492 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
6493 kvm_mmu_slot_remove_write_access(kvm
, mem
->slot
);
6494 spin_unlock(&kvm
->mmu_lock
);
6496 * If memory slot is created, or moved, we need to clear all
6499 if (npages
&& old
.base_gfn
!= mem
->guest_phys_addr
>> PAGE_SHIFT
) {
6500 kvm_mmu_zap_all(kvm
);
6501 kvm_reload_remote_mmus(kvm
);
6505 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
6507 kvm_mmu_zap_all(kvm
);
6508 kvm_reload_remote_mmus(kvm
);
6511 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
6512 struct kvm_memory_slot
*slot
)
6514 kvm_arch_flush_shadow_all(kvm
);
6517 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
6519 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
6520 !vcpu
->arch
.apf
.halted
)
6521 || !list_empty_careful(&vcpu
->async_pf
.done
)
6522 || vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
6523 || atomic_read(&vcpu
->arch
.nmi_queued
) ||
6524 (kvm_arch_interrupt_allowed(vcpu
) &&
6525 kvm_cpu_has_interrupt(vcpu
));
6528 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
6530 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
6533 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
6535 return kvm_x86_ops
->interrupt_allowed(vcpu
);
6538 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
6540 unsigned long current_rip
= kvm_rip_read(vcpu
) +
6541 get_segment_base(vcpu
, VCPU_SREG_CS
);
6543 return current_rip
== linear_rip
;
6545 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
6547 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
6549 unsigned long rflags
;
6551 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
6552 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
6553 rflags
&= ~X86_EFLAGS_TF
;
6556 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
6558 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
6560 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
6561 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
6562 rflags
|= X86_EFLAGS_TF
;
6563 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
6564 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6566 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
6568 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
6572 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
6573 is_error_page(work
->page
))
6576 r
= kvm_mmu_reload(vcpu
);
6580 if (!vcpu
->arch
.mmu
.direct_map
&&
6581 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
6584 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
6587 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
6589 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
6592 static inline u32
kvm_async_pf_next_probe(u32 key
)
6594 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
6597 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
6599 u32 key
= kvm_async_pf_hash_fn(gfn
);
6601 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
6602 key
= kvm_async_pf_next_probe(key
);
6604 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
6607 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
6610 u32 key
= kvm_async_pf_hash_fn(gfn
);
6612 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
6613 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
6614 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
6615 key
= kvm_async_pf_next_probe(key
);
6620 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
6622 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
6625 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
6629 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
6631 vcpu
->arch
.apf
.gfns
[i
] = ~0;
6633 j
= kvm_async_pf_next_probe(j
);
6634 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
6636 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
6638 * k lies cyclically in ]i,j]
6640 * |....j i.k.| or |.k..j i...|
6642 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
6643 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
6648 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
6651 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
6655 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
6656 struct kvm_async_pf
*work
)
6658 struct x86_exception fault
;
6660 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
6661 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
6663 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
6664 (vcpu
->arch
.apf
.send_user_only
&&
6665 kvm_x86_ops
->get_cpl(vcpu
) == 0))
6666 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
6667 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
6668 fault
.vector
= PF_VECTOR
;
6669 fault
.error_code_valid
= true;
6670 fault
.error_code
= 0;
6671 fault
.nested_page_fault
= false;
6672 fault
.address
= work
->arch
.token
;
6673 kvm_inject_page_fault(vcpu
, &fault
);
6677 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
6678 struct kvm_async_pf
*work
)
6680 struct x86_exception fault
;
6682 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
6683 if (is_error_page(work
->page
))
6684 work
->arch
.token
= ~0; /* broadcast wakeup */
6686 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
6688 if ((vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) &&
6689 !apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
6690 fault
.vector
= PF_VECTOR
;
6691 fault
.error_code_valid
= true;
6692 fault
.error_code
= 0;
6693 fault
.nested_page_fault
= false;
6694 fault
.address
= work
->arch
.token
;
6695 kvm_inject_page_fault(vcpu
, &fault
);
6697 vcpu
->arch
.apf
.halted
= false;
6698 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
6701 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
6703 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
6706 return !kvm_event_needs_reinjection(vcpu
) &&
6707 kvm_x86_ops
->interrupt_allowed(vcpu
);
6710 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
6711 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
6712 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
6713 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
6714 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
6715 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
6716 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
6717 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
6718 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
6719 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
6720 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
6721 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);