2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
30 #include "assigned-dev.h"
33 #include <linux/clocksource.h>
34 #include <linux/interrupt.h>
35 #include <linux/kvm.h>
37 #include <linux/vmalloc.h>
38 #include <linux/module.h>
39 #include <linux/mman.h>
40 #include <linux/highmem.h>
41 #include <linux/iommu.h>
42 #include <linux/intel-iommu.h>
43 #include <linux/cpufreq.h>
44 #include <linux/user-return-notifier.h>
45 #include <linux/srcu.h>
46 #include <linux/slab.h>
47 #include <linux/perf_event.h>
48 #include <linux/uaccess.h>
49 #include <linux/hash.h>
50 #include <linux/pci.h>
51 #include <linux/timekeeper_internal.h>
52 #include <linux/pvclock_gtod.h>
53 #include <trace/events/kvm.h>
55 #define CREATE_TRACE_POINTS
58 #include <asm/debugreg.h>
62 #include <linux/kernel_stat.h>
63 #include <asm/fpu/internal.h> /* Ugh! */
64 #include <asm/pvclock.h>
65 #include <asm/div64.h>
67 #define MAX_IO_MSRS 256
68 #define KVM_MAX_MCE_BANKS 32
69 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
71 #define emul_to_vcpu(ctxt) \
72 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
75 * - enable syscall per default because its emulated by KVM
76 * - enable LME and LMA per default on 64 bit KVM
80 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
82 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
85 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
86 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
88 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
89 static void process_nmi(struct kvm_vcpu
*vcpu
);
90 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
92 struct kvm_x86_ops
*kvm_x86_ops
;
93 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
95 static bool ignore_msrs
= 0;
96 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
98 unsigned int min_timer_period_us
= 500;
99 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
101 static bool __read_mostly kvmclock_periodic_sync
= true;
102 module_param(kvmclock_periodic_sync
, bool, S_IRUGO
);
104 bool kvm_has_tsc_control
;
105 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
106 u32 kvm_max_guest_tsc_khz
;
107 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
109 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
110 static u32 tsc_tolerance_ppm
= 250;
111 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
113 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
114 unsigned int lapic_timer_advance_ns
= 0;
115 module_param(lapic_timer_advance_ns
, uint
, S_IRUGO
| S_IWUSR
);
117 static bool backwards_tsc_observed
= false;
119 #define KVM_NR_SHARED_MSRS 16
121 struct kvm_shared_msrs_global
{
123 u32 msrs
[KVM_NR_SHARED_MSRS
];
126 struct kvm_shared_msrs
{
127 struct user_return_notifier urn
;
129 struct kvm_shared_msr_values
{
132 } values
[KVM_NR_SHARED_MSRS
];
135 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
136 static struct kvm_shared_msrs __percpu
*shared_msrs
;
138 struct kvm_stats_debugfs_item debugfs_entries
[] = {
139 { "pf_fixed", VCPU_STAT(pf_fixed
) },
140 { "pf_guest", VCPU_STAT(pf_guest
) },
141 { "tlb_flush", VCPU_STAT(tlb_flush
) },
142 { "invlpg", VCPU_STAT(invlpg
) },
143 { "exits", VCPU_STAT(exits
) },
144 { "io_exits", VCPU_STAT(io_exits
) },
145 { "mmio_exits", VCPU_STAT(mmio_exits
) },
146 { "signal_exits", VCPU_STAT(signal_exits
) },
147 { "irq_window", VCPU_STAT(irq_window_exits
) },
148 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
149 { "halt_exits", VCPU_STAT(halt_exits
) },
150 { "halt_successful_poll", VCPU_STAT(halt_successful_poll
) },
151 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
152 { "hypercalls", VCPU_STAT(hypercalls
) },
153 { "request_irq", VCPU_STAT(request_irq_exits
) },
154 { "irq_exits", VCPU_STAT(irq_exits
) },
155 { "host_state_reload", VCPU_STAT(host_state_reload
) },
156 { "efer_reload", VCPU_STAT(efer_reload
) },
157 { "fpu_reload", VCPU_STAT(fpu_reload
) },
158 { "insn_emulation", VCPU_STAT(insn_emulation
) },
159 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
160 { "irq_injections", VCPU_STAT(irq_injections
) },
161 { "nmi_injections", VCPU_STAT(nmi_injections
) },
162 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
163 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
164 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
165 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
166 { "mmu_flooded", VM_STAT(mmu_flooded
) },
167 { "mmu_recycled", VM_STAT(mmu_recycled
) },
168 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
169 { "mmu_unsync", VM_STAT(mmu_unsync
) },
170 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
171 { "largepages", VM_STAT(lpages
) },
175 u64 __read_mostly host_xcr0
;
177 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
179 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
182 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
183 vcpu
->arch
.apf
.gfns
[i
] = ~0;
186 static void kvm_on_user_return(struct user_return_notifier
*urn
)
189 struct kvm_shared_msrs
*locals
190 = container_of(urn
, struct kvm_shared_msrs
, urn
);
191 struct kvm_shared_msr_values
*values
;
193 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
194 values
= &locals
->values
[slot
];
195 if (values
->host
!= values
->curr
) {
196 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
197 values
->curr
= values
->host
;
200 locals
->registered
= false;
201 user_return_notifier_unregister(urn
);
204 static void shared_msr_update(unsigned slot
, u32 msr
)
207 unsigned int cpu
= smp_processor_id();
208 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
210 /* only read, and nobody should modify it at this time,
211 * so don't need lock */
212 if (slot
>= shared_msrs_global
.nr
) {
213 printk(KERN_ERR
"kvm: invalid MSR slot!");
216 rdmsrl_safe(msr
, &value
);
217 smsr
->values
[slot
].host
= value
;
218 smsr
->values
[slot
].curr
= value
;
221 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
223 BUG_ON(slot
>= KVM_NR_SHARED_MSRS
);
224 if (slot
>= shared_msrs_global
.nr
)
225 shared_msrs_global
.nr
= slot
+ 1;
226 shared_msrs_global
.msrs
[slot
] = msr
;
227 /* we need ensured the shared_msr_global have been updated */
230 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
232 static void kvm_shared_msr_cpu_online(void)
236 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
237 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
240 int kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
242 unsigned int cpu
= smp_processor_id();
243 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
246 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
248 smsr
->values
[slot
].curr
= value
;
249 err
= wrmsrl_safe(shared_msrs_global
.msrs
[slot
], value
);
253 if (!smsr
->registered
) {
254 smsr
->urn
.on_user_return
= kvm_on_user_return
;
255 user_return_notifier_register(&smsr
->urn
);
256 smsr
->registered
= true;
260 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
262 static void drop_user_return_notifiers(void)
264 unsigned int cpu
= smp_processor_id();
265 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
267 if (smsr
->registered
)
268 kvm_on_user_return(&smsr
->urn
);
271 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
273 return vcpu
->arch
.apic_base
;
275 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
277 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
279 u64 old_state
= vcpu
->arch
.apic_base
&
280 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
281 u64 new_state
= msr_info
->data
&
282 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
283 u64 reserved_bits
= ((~0ULL) << cpuid_maxphyaddr(vcpu
)) |
284 0x2ff | (guest_cpuid_has_x2apic(vcpu
) ? 0 : X2APIC_ENABLE
);
286 if (!msr_info
->host_initiated
&&
287 ((msr_info
->data
& reserved_bits
) != 0 ||
288 new_state
== X2APIC_ENABLE
||
289 (new_state
== MSR_IA32_APICBASE_ENABLE
&&
290 old_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
)) ||
291 (new_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
) &&
295 kvm_lapic_set_base(vcpu
, msr_info
->data
);
298 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
300 asmlinkage __visible
void kvm_spurious_fault(void)
302 /* Fault while not rebooting. We want the trace. */
305 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
307 #define EXCPT_BENIGN 0
308 #define EXCPT_CONTRIBUTORY 1
311 static int exception_class(int vector
)
321 return EXCPT_CONTRIBUTORY
;
328 #define EXCPT_FAULT 0
330 #define EXCPT_ABORT 2
331 #define EXCPT_INTERRUPT 3
333 static int exception_type(int vector
)
337 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
338 return EXCPT_INTERRUPT
;
342 /* #DB is trap, as instruction watchpoints are handled elsewhere */
343 if (mask
& ((1 << DB_VECTOR
) | (1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
346 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
349 /* Reserved exceptions will result in fault */
353 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
354 unsigned nr
, bool has_error
, u32 error_code
,
360 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
362 if (!vcpu
->arch
.exception
.pending
) {
364 if (has_error
&& !is_protmode(vcpu
))
366 vcpu
->arch
.exception
.pending
= true;
367 vcpu
->arch
.exception
.has_error_code
= has_error
;
368 vcpu
->arch
.exception
.nr
= nr
;
369 vcpu
->arch
.exception
.error_code
= error_code
;
370 vcpu
->arch
.exception
.reinject
= reinject
;
374 /* to check exception */
375 prev_nr
= vcpu
->arch
.exception
.nr
;
376 if (prev_nr
== DF_VECTOR
) {
377 /* triple fault -> shutdown */
378 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
381 class1
= exception_class(prev_nr
);
382 class2
= exception_class(nr
);
383 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
384 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
385 /* generate double fault per SDM Table 5-5 */
386 vcpu
->arch
.exception
.pending
= true;
387 vcpu
->arch
.exception
.has_error_code
= true;
388 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
389 vcpu
->arch
.exception
.error_code
= 0;
391 /* replace previous exception with a new one in a hope
392 that instruction re-execution will regenerate lost
397 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
399 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
401 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
403 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
405 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
407 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
409 void kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
412 kvm_inject_gp(vcpu
, 0);
414 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
416 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
418 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
420 ++vcpu
->stat
.pf_guest
;
421 vcpu
->arch
.cr2
= fault
->address
;
422 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
424 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
426 static bool kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
428 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
429 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
431 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
433 return fault
->nested_page_fault
;
436 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
438 atomic_inc(&vcpu
->arch
.nmi_queued
);
439 kvm_make_request(KVM_REQ_NMI
, vcpu
);
441 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
443 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
445 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
447 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
449 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
451 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
453 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
456 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
457 * a #GP and return false.
459 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
461 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
463 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
466 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
468 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
470 if ((dr
!= 4 && dr
!= 5) || !kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
473 kvm_queue_exception(vcpu
, UD_VECTOR
);
476 EXPORT_SYMBOL_GPL(kvm_require_dr
);
479 * This function will be used to read from the physical memory of the currently
480 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
481 * can read from guest physical or from the guest's guest physical memory.
483 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
484 gfn_t ngfn
, void *data
, int offset
, int len
,
487 struct x86_exception exception
;
491 ngpa
= gfn_to_gpa(ngfn
);
492 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
, &exception
);
493 if (real_gfn
== UNMAPPED_GVA
)
496 real_gfn
= gpa_to_gfn(real_gfn
);
498 return kvm_vcpu_read_guest_page(vcpu
, real_gfn
, data
, offset
, len
);
500 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
502 static int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
503 void *data
, int offset
, int len
, u32 access
)
505 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
506 data
, offset
, len
, access
);
510 * Load the pae pdptrs. Return true is they are all valid.
512 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
514 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
515 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
518 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
520 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
521 offset
* sizeof(u64
), sizeof(pdpte
),
522 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
527 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
528 if (is_present_gpte(pdpte
[i
]) &&
529 (pdpte
[i
] & vcpu
->arch
.mmu
.rsvd_bits_mask
[0][2])) {
536 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
537 __set_bit(VCPU_EXREG_PDPTR
,
538 (unsigned long *)&vcpu
->arch
.regs_avail
);
539 __set_bit(VCPU_EXREG_PDPTR
,
540 (unsigned long *)&vcpu
->arch
.regs_dirty
);
545 EXPORT_SYMBOL_GPL(load_pdptrs
);
547 static bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
549 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
555 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
558 if (!test_bit(VCPU_EXREG_PDPTR
,
559 (unsigned long *)&vcpu
->arch
.regs_avail
))
562 gfn
= (kvm_read_cr3(vcpu
) & ~31u) >> PAGE_SHIFT
;
563 offset
= (kvm_read_cr3(vcpu
) & ~31u) & (PAGE_SIZE
- 1);
564 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
565 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
568 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
574 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
576 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
577 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
;
582 if (cr0
& 0xffffffff00000000UL
)
586 cr0
&= ~CR0_RESERVED_BITS
;
588 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
591 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
594 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
596 if ((vcpu
->arch
.efer
& EFER_LME
)) {
601 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
606 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
611 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
614 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
616 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
617 kvm_clear_async_pf_completion_queue(vcpu
);
618 kvm_async_pf_hash_reset(vcpu
);
621 if ((cr0
^ old_cr0
) & update_bits
)
622 kvm_mmu_reset_context(vcpu
);
624 if ((cr0
^ old_cr0
) & X86_CR0_CD
)
625 kvm_zap_gfn_range(vcpu
->kvm
, 0, ~0ULL);
629 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
631 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
633 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
635 EXPORT_SYMBOL_GPL(kvm_lmsw
);
637 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
639 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
640 !vcpu
->guest_xcr0_loaded
) {
641 /* kvm_set_xcr() also depends on this */
642 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
643 vcpu
->guest_xcr0_loaded
= 1;
647 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
649 if (vcpu
->guest_xcr0_loaded
) {
650 if (vcpu
->arch
.xcr0
!= host_xcr0
)
651 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
652 vcpu
->guest_xcr0_loaded
= 0;
656 static int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
659 u64 old_xcr0
= vcpu
->arch
.xcr0
;
662 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
663 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
665 if (!(xcr0
& XSTATE_FP
))
667 if ((xcr0
& XSTATE_YMM
) && !(xcr0
& XSTATE_SSE
))
671 * Do not allow the guest to set bits that we do not support
672 * saving. However, xcr0 bit 0 is always set, even if the
673 * emulated CPU does not support XSAVE (see fx_init).
675 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XSTATE_FP
;
676 if (xcr0
& ~valid_bits
)
679 if ((!(xcr0
& XSTATE_BNDREGS
)) != (!(xcr0
& XSTATE_BNDCSR
)))
682 if (xcr0
& XSTATE_AVX512
) {
683 if (!(xcr0
& XSTATE_YMM
))
685 if ((xcr0
& XSTATE_AVX512
) != XSTATE_AVX512
)
688 kvm_put_guest_xcr0(vcpu
);
689 vcpu
->arch
.xcr0
= xcr0
;
691 if ((xcr0
^ old_xcr0
) & XSTATE_EXTEND_MASK
)
692 kvm_update_cpuid(vcpu
);
696 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
698 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 ||
699 __kvm_set_xcr(vcpu
, index
, xcr
)) {
700 kvm_inject_gp(vcpu
, 0);
705 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
707 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
709 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
710 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
|
711 X86_CR4_SMEP
| X86_CR4_SMAP
;
713 if (cr4
& CR4_RESERVED_BITS
)
716 if (!guest_cpuid_has_xsave(vcpu
) && (cr4
& X86_CR4_OSXSAVE
))
719 if (!guest_cpuid_has_smep(vcpu
) && (cr4
& X86_CR4_SMEP
))
722 if (!guest_cpuid_has_smap(vcpu
) && (cr4
& X86_CR4_SMAP
))
725 if (!guest_cpuid_has_fsgsbase(vcpu
) && (cr4
& X86_CR4_FSGSBASE
))
728 if (is_long_mode(vcpu
)) {
729 if (!(cr4
& X86_CR4_PAE
))
731 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
732 && ((cr4
^ old_cr4
) & pdptr_bits
)
733 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
737 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
738 if (!guest_cpuid_has_pcid(vcpu
))
741 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
742 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
746 if (kvm_x86_ops
->set_cr4(vcpu
, cr4
))
749 if (((cr4
^ old_cr4
) & pdptr_bits
) ||
750 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
751 kvm_mmu_reset_context(vcpu
);
753 if ((cr4
^ old_cr4
) & X86_CR4_OSXSAVE
)
754 kvm_update_cpuid(vcpu
);
758 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
760 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
763 cr3
&= ~CR3_PCID_INVD
;
766 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
767 kvm_mmu_sync_roots(vcpu
);
768 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
772 if (is_long_mode(vcpu
)) {
773 if (cr3
& CR3_L_MODE_RESERVED_BITS
)
775 } else if (is_pae(vcpu
) && is_paging(vcpu
) &&
776 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
779 vcpu
->arch
.cr3
= cr3
;
780 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
781 kvm_mmu_new_cr3(vcpu
);
784 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
786 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
788 if (cr8
& CR8_RESERVED_BITS
)
790 if (irqchip_in_kernel(vcpu
->kvm
))
791 kvm_lapic_set_tpr(vcpu
, cr8
);
793 vcpu
->arch
.cr8
= cr8
;
796 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
798 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
800 if (irqchip_in_kernel(vcpu
->kvm
))
801 return kvm_lapic_get_cr8(vcpu
);
803 return vcpu
->arch
.cr8
;
805 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
807 static void kvm_update_dr0123(struct kvm_vcpu
*vcpu
)
811 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
812 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
813 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
814 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_RELOAD
;
818 static void kvm_update_dr6(struct kvm_vcpu
*vcpu
)
820 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
821 kvm_x86_ops
->set_dr6(vcpu
, vcpu
->arch
.dr6
);
824 static void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
828 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
829 dr7
= vcpu
->arch
.guest_debug_dr7
;
831 dr7
= vcpu
->arch
.dr7
;
832 kvm_x86_ops
->set_dr7(vcpu
, dr7
);
833 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
834 if (dr7
& DR7_BP_EN_MASK
)
835 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
838 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
840 u64 fixed
= DR6_FIXED_1
;
842 if (!guest_cpuid_has_rtm(vcpu
))
847 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
851 vcpu
->arch
.db
[dr
] = val
;
852 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
853 vcpu
->arch
.eff_db
[dr
] = val
;
858 if (val
& 0xffffffff00000000ULL
)
860 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
861 kvm_update_dr6(vcpu
);
866 if (val
& 0xffffffff00000000ULL
)
868 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
869 kvm_update_dr7(vcpu
);
876 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
878 if (__kvm_set_dr(vcpu
, dr
, val
)) {
879 kvm_inject_gp(vcpu
, 0);
884 EXPORT_SYMBOL_GPL(kvm_set_dr
);
886 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
890 *val
= vcpu
->arch
.db
[dr
];
895 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
896 *val
= vcpu
->arch
.dr6
;
898 *val
= kvm_x86_ops
->get_dr6(vcpu
);
903 *val
= vcpu
->arch
.dr7
;
908 EXPORT_SYMBOL_GPL(kvm_get_dr
);
910 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
912 u32 ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
916 err
= kvm_pmu_rdpmc(vcpu
, ecx
, &data
);
919 kvm_register_write(vcpu
, VCPU_REGS_RAX
, (u32
)data
);
920 kvm_register_write(vcpu
, VCPU_REGS_RDX
, data
>> 32);
923 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
926 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
927 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
929 * This list is modified at module load time to reflect the
930 * capabilities of the host cpu. This capabilities test skips MSRs that are
931 * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
932 * may depend on host virtualization features rather than host cpu features.
935 static u32 msrs_to_save
[] = {
936 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
939 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
941 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
942 MSR_IA32_FEATURE_CONTROL
, MSR_IA32_BNDCFGS
945 static unsigned num_msrs_to_save
;
947 static u32 emulated_msrs
[] = {
948 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
949 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
950 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
951 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
952 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
956 MSR_IA32_TSCDEADLINE
,
957 MSR_IA32_MISC_ENABLE
,
963 static unsigned num_emulated_msrs
;
965 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
967 if (efer
& efer_reserved_bits
)
970 if (efer
& EFER_FFXSR
) {
971 struct kvm_cpuid_entry2
*feat
;
973 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
974 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
)))
978 if (efer
& EFER_SVME
) {
979 struct kvm_cpuid_entry2
*feat
;
981 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
982 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
)))
988 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
990 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
992 u64 old_efer
= vcpu
->arch
.efer
;
994 if (!kvm_valid_efer(vcpu
, efer
))
998 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
1002 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
1004 kvm_x86_ops
->set_efer(vcpu
, efer
);
1006 /* Update reserved bits */
1007 if ((efer
^ old_efer
) & EFER_NX
)
1008 kvm_mmu_reset_context(vcpu
);
1013 void kvm_enable_efer_bits(u64 mask
)
1015 efer_reserved_bits
&= ~mask
;
1017 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1020 * Writes msr value into into the appropriate "register".
1021 * Returns 0 on success, non-0 otherwise.
1022 * Assumes vcpu_load() was already called.
1024 int kvm_set_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1026 switch (msr
->index
) {
1029 case MSR_KERNEL_GS_BASE
:
1032 if (is_noncanonical_address(msr
->data
))
1035 case MSR_IA32_SYSENTER_EIP
:
1036 case MSR_IA32_SYSENTER_ESP
:
1038 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1039 * non-canonical address is written on Intel but not on
1040 * AMD (which ignores the top 32-bits, because it does
1041 * not implement 64-bit SYSENTER).
1043 * 64-bit code should hence be able to write a non-canonical
1044 * value on AMD. Making the address canonical ensures that
1045 * vmentry does not fail on Intel after writing a non-canonical
1046 * value, and that something deterministic happens if the guest
1047 * invokes 64-bit SYSENTER.
1049 msr
->data
= get_canonical(msr
->data
);
1051 return kvm_x86_ops
->set_msr(vcpu
, msr
);
1053 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1056 * Adapt set_msr() to msr_io()'s calling convention
1058 static int do_get_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1060 struct msr_data msr
;
1064 msr
.host_initiated
= true;
1065 r
= kvm_get_msr(vcpu
, &msr
);
1073 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1075 struct msr_data msr
;
1079 msr
.host_initiated
= true;
1080 return kvm_set_msr(vcpu
, &msr
);
1083 #ifdef CONFIG_X86_64
1084 struct pvclock_gtod_data
{
1087 struct { /* extract of a clocksource struct */
1099 static struct pvclock_gtod_data pvclock_gtod_data
;
1101 static void update_pvclock_gtod(struct timekeeper
*tk
)
1103 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
1106 boot_ns
= ktime_to_ns(ktime_add(tk
->tkr_mono
.base
, tk
->offs_boot
));
1108 write_seqcount_begin(&vdata
->seq
);
1110 /* copy pvclock gtod data */
1111 vdata
->clock
.vclock_mode
= tk
->tkr_mono
.clock
->archdata
.vclock_mode
;
1112 vdata
->clock
.cycle_last
= tk
->tkr_mono
.cycle_last
;
1113 vdata
->clock
.mask
= tk
->tkr_mono
.mask
;
1114 vdata
->clock
.mult
= tk
->tkr_mono
.mult
;
1115 vdata
->clock
.shift
= tk
->tkr_mono
.shift
;
1117 vdata
->boot_ns
= boot_ns
;
1118 vdata
->nsec_base
= tk
->tkr_mono
.xtime_nsec
;
1120 write_seqcount_end(&vdata
->seq
);
1124 void kvm_set_pending_timer(struct kvm_vcpu
*vcpu
)
1127 * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1128 * vcpu_enter_guest. This function is only called from
1129 * the physical CPU that is running vcpu.
1131 kvm_make_request(KVM_REQ_PENDING_TIMER
, vcpu
);
1134 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
1138 struct pvclock_wall_clock wc
;
1139 struct timespec boot
;
1144 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1149 ++version
; /* first time write, random junk */
1153 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1156 * The guest calculates current wall clock time by adding
1157 * system time (updated by kvm_guest_time_update below) to the
1158 * wall clock specified here. guest system time equals host
1159 * system time for us, thus we must fill in host boot time here.
1163 if (kvm
->arch
.kvmclock_offset
) {
1164 struct timespec ts
= ns_to_timespec(kvm
->arch
.kvmclock_offset
);
1165 boot
= timespec_sub(boot
, ts
);
1167 wc
.sec
= boot
.tv_sec
;
1168 wc
.nsec
= boot
.tv_nsec
;
1169 wc
.version
= version
;
1171 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
1174 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1177 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
1179 uint32_t quotient
, remainder
;
1181 /* Don't try to replace with do_div(), this one calculates
1182 * "(dividend << 32) / divisor" */
1184 : "=a" (quotient
), "=d" (remainder
)
1185 : "0" (0), "1" (dividend
), "r" (divisor
) );
1189 static void kvm_get_time_scale(uint32_t scaled_khz
, uint32_t base_khz
,
1190 s8
*pshift
, u32
*pmultiplier
)
1197 tps64
= base_khz
* 1000LL;
1198 scaled64
= scaled_khz
* 1000LL;
1199 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
1204 tps32
= (uint32_t)tps64
;
1205 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
1206 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
1214 *pmultiplier
= div_frac(scaled64
, tps32
);
1216 pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1217 __func__
, base_khz
, scaled_khz
, shift
, *pmultiplier
);
1220 static inline u64
get_kernel_ns(void)
1222 return ktime_get_boot_ns();
1225 #ifdef CONFIG_X86_64
1226 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
1229 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
1230 static unsigned long max_tsc_khz
;
1232 static inline u64
nsec_to_cycles(struct kvm_vcpu
*vcpu
, u64 nsec
)
1234 return pvclock_scale_delta(nsec
, vcpu
->arch
.virtual_tsc_mult
,
1235 vcpu
->arch
.virtual_tsc_shift
);
1238 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
1240 u64 v
= (u64
)khz
* (1000000 + ppm
);
1245 static void kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 this_tsc_khz
)
1247 u32 thresh_lo
, thresh_hi
;
1248 int use_scaling
= 0;
1250 /* tsc_khz can be zero if TSC calibration fails */
1251 if (this_tsc_khz
== 0)
1254 /* Compute a scale to convert nanoseconds in TSC cycles */
1255 kvm_get_time_scale(this_tsc_khz
, NSEC_PER_SEC
/ 1000,
1256 &vcpu
->arch
.virtual_tsc_shift
,
1257 &vcpu
->arch
.virtual_tsc_mult
);
1258 vcpu
->arch
.virtual_tsc_khz
= this_tsc_khz
;
1261 * Compute the variation in TSC rate which is acceptable
1262 * within the range of tolerance and decide if the
1263 * rate being applied is within that bounds of the hardware
1264 * rate. If so, no scaling or compensation need be done.
1266 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
1267 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
1268 if (this_tsc_khz
< thresh_lo
|| this_tsc_khz
> thresh_hi
) {
1269 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz
, thresh_lo
, thresh_hi
);
1272 kvm_x86_ops
->set_tsc_khz(vcpu
, this_tsc_khz
, use_scaling
);
1275 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1277 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
1278 vcpu
->arch
.virtual_tsc_mult
,
1279 vcpu
->arch
.virtual_tsc_shift
);
1280 tsc
+= vcpu
->arch
.this_tsc_write
;
1284 static void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
1286 #ifdef CONFIG_X86_64
1288 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
1289 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1291 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1292 atomic_read(&vcpu
->kvm
->online_vcpus
));
1295 * Once the masterclock is enabled, always perform request in
1296 * order to update it.
1298 * In order to enable masterclock, the host clocksource must be TSC
1299 * and the vcpus need to have matched TSCs. When that happens,
1300 * perform request to enable masterclock.
1302 if (ka
->use_master_clock
||
1303 (gtod
->clock
.vclock_mode
== VCLOCK_TSC
&& vcpus_matched
))
1304 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
1306 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
1307 atomic_read(&vcpu
->kvm
->online_vcpus
),
1308 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
1312 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu
*vcpu
, s64 offset
)
1314 u64 curr_offset
= kvm_x86_ops
->read_tsc_offset(vcpu
);
1315 vcpu
->arch
.ia32_tsc_adjust_msr
+= offset
- curr_offset
;
1318 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1320 struct kvm
*kvm
= vcpu
->kvm
;
1321 u64 offset
, ns
, elapsed
;
1322 unsigned long flags
;
1325 bool already_matched
;
1326 u64 data
= msr
->data
;
1328 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1329 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
, data
);
1330 ns
= get_kernel_ns();
1331 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1333 if (vcpu
->arch
.virtual_tsc_khz
) {
1336 /* n.b - signed multiplication and division required */
1337 usdiff
= data
- kvm
->arch
.last_tsc_write
;
1338 #ifdef CONFIG_X86_64
1339 usdiff
= (usdiff
* 1000) / vcpu
->arch
.virtual_tsc_khz
;
1341 /* do_div() only does unsigned */
1342 asm("1: idivl %[divisor]\n"
1343 "2: xor %%edx, %%edx\n"
1344 " movl $0, %[faulted]\n"
1346 ".section .fixup,\"ax\"\n"
1347 "4: movl $1, %[faulted]\n"
1351 _ASM_EXTABLE(1b
, 4b
)
1353 : "=A"(usdiff
), [faulted
] "=r" (faulted
)
1354 : "A"(usdiff
* 1000), [divisor
] "rm"(vcpu
->arch
.virtual_tsc_khz
));
1357 do_div(elapsed
, 1000);
1362 /* idivl overflow => difference is larger than USEC_PER_SEC */
1364 usdiff
= USEC_PER_SEC
;
1366 usdiff
= USEC_PER_SEC
; /* disable TSC match window below */
1369 * Special case: TSC write with a small delta (1 second) of virtual
1370 * cycle time against real time is interpreted as an attempt to
1371 * synchronize the CPU.
1373 * For a reliable TSC, we can match TSC offsets, and for an unstable
1374 * TSC, we add elapsed time in this computation. We could let the
1375 * compensation code attempt to catch up if we fall behind, but
1376 * it's better to try to match offsets from the beginning.
1378 if (usdiff
< USEC_PER_SEC
&&
1379 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
1380 if (!check_tsc_unstable()) {
1381 offset
= kvm
->arch
.cur_tsc_offset
;
1382 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1384 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
1386 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
, data
);
1387 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1390 already_matched
= (vcpu
->arch
.this_tsc_generation
== kvm
->arch
.cur_tsc_generation
);
1393 * We split periods of matched TSC writes into generations.
1394 * For each generation, we track the original measured
1395 * nanosecond time, offset, and write, so if TSCs are in
1396 * sync, we can match exact offset, and if not, we can match
1397 * exact software computation in compute_guest_tsc()
1399 * These values are tracked in kvm->arch.cur_xxx variables.
1401 kvm
->arch
.cur_tsc_generation
++;
1402 kvm
->arch
.cur_tsc_nsec
= ns
;
1403 kvm
->arch
.cur_tsc_write
= data
;
1404 kvm
->arch
.cur_tsc_offset
= offset
;
1406 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1407 kvm
->arch
.cur_tsc_generation
, data
);
1411 * We also track th most recent recorded KHZ, write and time to
1412 * allow the matching interval to be extended at each write.
1414 kvm
->arch
.last_tsc_nsec
= ns
;
1415 kvm
->arch
.last_tsc_write
= data
;
1416 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
1418 vcpu
->arch
.last_guest_tsc
= data
;
1420 /* Keep track of which generation this VCPU has synchronized to */
1421 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
1422 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
1423 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
1425 if (guest_cpuid_has_tsc_adjust(vcpu
) && !msr
->host_initiated
)
1426 update_ia32_tsc_adjust_msr(vcpu
, offset
);
1427 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1428 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1430 spin_lock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1432 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
1433 } else if (!already_matched
) {
1434 kvm
->arch
.nr_vcpus_matched_tsc
++;
1437 kvm_track_tsc_matching(vcpu
);
1438 spin_unlock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1441 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1443 #ifdef CONFIG_X86_64
1445 static cycle_t
read_tsc(void)
1451 * Empirically, a fence (of type that depends on the CPU)
1452 * before rdtsc is enough to ensure that rdtsc is ordered
1453 * with respect to loads. The various CPU manuals are unclear
1454 * as to whether rdtsc can be reordered with later loads,
1455 * but no one has ever seen it happen.
1458 ret
= (cycle_t
)vget_cycles();
1460 last
= pvclock_gtod_data
.clock
.cycle_last
;
1462 if (likely(ret
>= last
))
1466 * GCC likes to generate cmov here, but this branch is extremely
1467 * predictable (it's just a funciton of time and the likely is
1468 * very likely) and there's a data dependence, so force GCC
1469 * to generate a branch instead. I don't barrier() because
1470 * we don't actually need a barrier, and if this function
1471 * ever gets inlined it will generate worse code.
1477 static inline u64
vgettsc(cycle_t
*cycle_now
)
1480 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1482 *cycle_now
= read_tsc();
1484 v
= (*cycle_now
- gtod
->clock
.cycle_last
) & gtod
->clock
.mask
;
1485 return v
* gtod
->clock
.mult
;
1488 static int do_monotonic_boot(s64
*t
, cycle_t
*cycle_now
)
1490 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1496 seq
= read_seqcount_begin(>od
->seq
);
1497 mode
= gtod
->clock
.vclock_mode
;
1498 ns
= gtod
->nsec_base
;
1499 ns
+= vgettsc(cycle_now
);
1500 ns
>>= gtod
->clock
.shift
;
1501 ns
+= gtod
->boot_ns
;
1502 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1508 /* returns true if host is using tsc clocksource */
1509 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, cycle_t
*cycle_now
)
1511 /* checked again under seqlock below */
1512 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1515 return do_monotonic_boot(kernel_ns
, cycle_now
) == VCLOCK_TSC
;
1521 * Assuming a stable TSC across physical CPUS, and a stable TSC
1522 * across virtual CPUs, the following condition is possible.
1523 * Each numbered line represents an event visible to both
1524 * CPUs at the next numbered event.
1526 * "timespecX" represents host monotonic time. "tscX" represents
1529 * VCPU0 on CPU0 | VCPU1 on CPU1
1531 * 1. read timespec0,tsc0
1532 * 2. | timespec1 = timespec0 + N
1534 * 3. transition to guest | transition to guest
1535 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1536 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1537 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1539 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1542 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1544 * - 0 < N - M => M < N
1546 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1547 * always the case (the difference between two distinct xtime instances
1548 * might be smaller then the difference between corresponding TSC reads,
1549 * when updating guest vcpus pvclock areas).
1551 * To avoid that problem, do not allow visibility of distinct
1552 * system_timestamp/tsc_timestamp values simultaneously: use a master
1553 * copy of host monotonic time values. Update that master copy
1556 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1560 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
1562 #ifdef CONFIG_X86_64
1563 struct kvm_arch
*ka
= &kvm
->arch
;
1565 bool host_tsc_clocksource
, vcpus_matched
;
1567 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1568 atomic_read(&kvm
->online_vcpus
));
1571 * If the host uses TSC clock, then passthrough TSC as stable
1574 host_tsc_clocksource
= kvm_get_time_and_clockread(
1575 &ka
->master_kernel_ns
,
1576 &ka
->master_cycle_now
);
1578 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
1579 && !backwards_tsc_observed
1580 && !ka
->boot_vcpu_runs_old_kvmclock
;
1582 if (ka
->use_master_clock
)
1583 atomic_set(&kvm_guest_has_master_clock
, 1);
1585 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
1586 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
1591 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
1593 #ifdef CONFIG_X86_64
1595 struct kvm_vcpu
*vcpu
;
1596 struct kvm_arch
*ka
= &kvm
->arch
;
1598 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1599 kvm_make_mclock_inprogress_request(kvm
);
1600 /* no guest entries from this point */
1601 pvclock_update_vm_gtod_copy(kvm
);
1603 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1604 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1606 /* guest entries allowed */
1607 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1608 clear_bit(KVM_REQ_MCLOCK_INPROGRESS
, &vcpu
->requests
);
1610 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1614 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1616 unsigned long flags
, this_tsc_khz
;
1617 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1618 struct kvm_arch
*ka
= &v
->kvm
->arch
;
1620 u64 tsc_timestamp
, host_tsc
;
1621 struct pvclock_vcpu_time_info guest_hv_clock
;
1623 bool use_master_clock
;
1629 * If the host uses TSC clock, then passthrough TSC as stable
1632 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1633 use_master_clock
= ka
->use_master_clock
;
1634 if (use_master_clock
) {
1635 host_tsc
= ka
->master_cycle_now
;
1636 kernel_ns
= ka
->master_kernel_ns
;
1638 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1640 /* Keep irq disabled to prevent changes to the clock */
1641 local_irq_save(flags
);
1642 this_tsc_khz
= __this_cpu_read(cpu_tsc_khz
);
1643 if (unlikely(this_tsc_khz
== 0)) {
1644 local_irq_restore(flags
);
1645 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1648 if (!use_master_clock
) {
1649 host_tsc
= native_read_tsc();
1650 kernel_ns
= get_kernel_ns();
1653 tsc_timestamp
= kvm_x86_ops
->read_l1_tsc(v
, host_tsc
);
1656 * We may have to catch up the TSC to match elapsed wall clock
1657 * time for two reasons, even if kvmclock is used.
1658 * 1) CPU could have been running below the maximum TSC rate
1659 * 2) Broken TSC compensation resets the base at each VCPU
1660 * entry to avoid unknown leaps of TSC even when running
1661 * again on the same CPU. This may cause apparent elapsed
1662 * time to disappear, and the guest to stand still or run
1665 if (vcpu
->tsc_catchup
) {
1666 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1667 if (tsc
> tsc_timestamp
) {
1668 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
1669 tsc_timestamp
= tsc
;
1673 local_irq_restore(flags
);
1675 if (!vcpu
->pv_time_enabled
)
1678 if (unlikely(vcpu
->hw_tsc_khz
!= this_tsc_khz
)) {
1679 kvm_get_time_scale(NSEC_PER_SEC
/ 1000, this_tsc_khz
,
1680 &vcpu
->hv_clock
.tsc_shift
,
1681 &vcpu
->hv_clock
.tsc_to_system_mul
);
1682 vcpu
->hw_tsc_khz
= this_tsc_khz
;
1685 /* With all the info we got, fill in the values */
1686 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
1687 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
1688 vcpu
->last_guest_tsc
= tsc_timestamp
;
1690 if (unlikely(kvm_read_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1691 &guest_hv_clock
, sizeof(guest_hv_clock
))))
1694 /* This VCPU is paused, but it's legal for a guest to read another
1695 * VCPU's kvmclock, so we really have to follow the specification where
1696 * it says that version is odd if data is being modified, and even after
1699 * Version field updates must be kept separate. This is because
1700 * kvm_write_guest_cached might use a "rep movs" instruction, and
1701 * writes within a string instruction are weakly ordered. So there
1702 * are three writes overall.
1704 * As a small optimization, only write the version field in the first
1705 * and third write. The vcpu->pv_time cache is still valid, because the
1706 * version field is the first in the struct.
1708 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info
, version
) != 0);
1710 vcpu
->hv_clock
.version
= guest_hv_clock
.version
+ 1;
1711 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1713 sizeof(vcpu
->hv_clock
.version
));
1717 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1718 pvclock_flags
= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
1720 if (vcpu
->pvclock_set_guest_stopped_request
) {
1721 pvclock_flags
|= PVCLOCK_GUEST_STOPPED
;
1722 vcpu
->pvclock_set_guest_stopped_request
= false;
1725 pvclock_flags
|= PVCLOCK_COUNTS_FROM_ZERO
;
1727 /* If the host uses TSC clocksource, then it is stable */
1728 if (use_master_clock
)
1729 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
1731 vcpu
->hv_clock
.flags
= pvclock_flags
;
1733 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
1735 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1737 sizeof(vcpu
->hv_clock
));
1741 vcpu
->hv_clock
.version
++;
1742 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1744 sizeof(vcpu
->hv_clock
.version
));
1749 * kvmclock updates which are isolated to a given vcpu, such as
1750 * vcpu->cpu migration, should not allow system_timestamp from
1751 * the rest of the vcpus to remain static. Otherwise ntp frequency
1752 * correction applies to one vcpu's system_timestamp but not
1755 * So in those cases, request a kvmclock update for all vcpus.
1756 * We need to rate-limit these requests though, as they can
1757 * considerably slow guests that have a large number of vcpus.
1758 * The time for a remote vcpu to update its kvmclock is bound
1759 * by the delay we use to rate-limit the updates.
1762 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1764 static void kvmclock_update_fn(struct work_struct
*work
)
1767 struct delayed_work
*dwork
= to_delayed_work(work
);
1768 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1769 kvmclock_update_work
);
1770 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1771 struct kvm_vcpu
*vcpu
;
1773 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
1774 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1775 kvm_vcpu_kick(vcpu
);
1779 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
1781 struct kvm
*kvm
= v
->kvm
;
1783 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1784 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
1785 KVMCLOCK_UPDATE_DELAY
);
1788 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1790 static void kvmclock_sync_fn(struct work_struct
*work
)
1792 struct delayed_work
*dwork
= to_delayed_work(work
);
1793 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1794 kvmclock_sync_work
);
1795 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1797 if (!kvmclock_periodic_sync
)
1800 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
1801 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
1802 KVMCLOCK_SYNC_PERIOD
);
1805 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1807 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1808 unsigned bank_num
= mcg_cap
& 0xff;
1811 case MSR_IA32_MCG_STATUS
:
1812 vcpu
->arch
.mcg_status
= data
;
1814 case MSR_IA32_MCG_CTL
:
1815 if (!(mcg_cap
& MCG_CTL_P
))
1817 if (data
!= 0 && data
!= ~(u64
)0)
1819 vcpu
->arch
.mcg_ctl
= data
;
1822 if (msr
>= MSR_IA32_MC0_CTL
&&
1823 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
1824 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1825 /* only 0 or all 1s can be written to IA32_MCi_CTL
1826 * some Linux kernels though clear bit 10 in bank 4 to
1827 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1828 * this to avoid an uncatched #GP in the guest
1830 if ((offset
& 0x3) == 0 &&
1831 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
1833 vcpu
->arch
.mce_banks
[offset
] = data
;
1841 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
1843 struct kvm
*kvm
= vcpu
->kvm
;
1844 int lm
= is_long_mode(vcpu
);
1845 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
1846 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
1847 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
1848 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
1849 u32 page_num
= data
& ~PAGE_MASK
;
1850 u64 page_addr
= data
& PAGE_MASK
;
1855 if (page_num
>= blob_size
)
1858 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
1863 if (kvm_vcpu_write_guest(vcpu
, page_addr
, page
, PAGE_SIZE
))
1872 static bool kvm_hv_hypercall_enabled(struct kvm
*kvm
)
1874 return kvm
->arch
.hv_hypercall
& HV_X64_MSR_HYPERCALL_ENABLE
;
1877 static bool kvm_hv_msr_partition_wide(u32 msr
)
1881 case HV_X64_MSR_GUEST_OS_ID
:
1882 case HV_X64_MSR_HYPERCALL
:
1883 case HV_X64_MSR_REFERENCE_TSC
:
1884 case HV_X64_MSR_TIME_REF_COUNT
:
1892 static int set_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1894 struct kvm
*kvm
= vcpu
->kvm
;
1897 case HV_X64_MSR_GUEST_OS_ID
:
1898 kvm
->arch
.hv_guest_os_id
= data
;
1899 /* setting guest os id to zero disables hypercall page */
1900 if (!kvm
->arch
.hv_guest_os_id
)
1901 kvm
->arch
.hv_hypercall
&= ~HV_X64_MSR_HYPERCALL_ENABLE
;
1903 case HV_X64_MSR_HYPERCALL
: {
1908 /* if guest os id is not set hypercall should remain disabled */
1909 if (!kvm
->arch
.hv_guest_os_id
)
1911 if (!(data
& HV_X64_MSR_HYPERCALL_ENABLE
)) {
1912 kvm
->arch
.hv_hypercall
= data
;
1915 gfn
= data
>> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT
;
1916 addr
= gfn_to_hva(kvm
, gfn
);
1917 if (kvm_is_error_hva(addr
))
1919 kvm_x86_ops
->patch_hypercall(vcpu
, instructions
);
1920 ((unsigned char *)instructions
)[3] = 0xc3; /* ret */
1921 if (__copy_to_user((void __user
*)addr
, instructions
, 4))
1923 kvm
->arch
.hv_hypercall
= data
;
1924 mark_page_dirty(kvm
, gfn
);
1927 case HV_X64_MSR_REFERENCE_TSC
: {
1929 HV_REFERENCE_TSC_PAGE tsc_ref
;
1930 memset(&tsc_ref
, 0, sizeof(tsc_ref
));
1931 kvm
->arch
.hv_tsc_page
= data
;
1932 if (!(data
& HV_X64_MSR_TSC_REFERENCE_ENABLE
))
1934 gfn
= data
>> HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT
;
1935 if (kvm_write_guest(kvm
, gfn
<< HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT
,
1936 &tsc_ref
, sizeof(tsc_ref
)))
1938 mark_page_dirty(kvm
, gfn
);
1942 vcpu_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1943 "data 0x%llx\n", msr
, data
);
1949 static int set_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1952 case HV_X64_MSR_APIC_ASSIST_PAGE
: {
1956 if (!(data
& HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE
)) {
1957 vcpu
->arch
.hv_vapic
= data
;
1958 if (kvm_lapic_enable_pv_eoi(vcpu
, 0))
1962 gfn
= data
>> HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT
;
1963 addr
= kvm_vcpu_gfn_to_hva(vcpu
, gfn
);
1964 if (kvm_is_error_hva(addr
))
1966 if (__clear_user((void __user
*)addr
, PAGE_SIZE
))
1968 vcpu
->arch
.hv_vapic
= data
;
1969 kvm_vcpu_mark_page_dirty(vcpu
, gfn
);
1970 if (kvm_lapic_enable_pv_eoi(vcpu
, gfn_to_gpa(gfn
) | KVM_MSR_ENABLED
))
1974 case HV_X64_MSR_EOI
:
1975 return kvm_hv_vapic_msr_write(vcpu
, APIC_EOI
, data
);
1976 case HV_X64_MSR_ICR
:
1977 return kvm_hv_vapic_msr_write(vcpu
, APIC_ICR
, data
);
1978 case HV_X64_MSR_TPR
:
1979 return kvm_hv_vapic_msr_write(vcpu
, APIC_TASKPRI
, data
);
1981 vcpu_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1982 "data 0x%llx\n", msr
, data
);
1989 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
1991 gpa_t gpa
= data
& ~0x3f;
1993 /* Bits 2:5 are reserved, Should be zero */
1997 vcpu
->arch
.apf
.msr_val
= data
;
1999 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
2000 kvm_clear_async_pf_completion_queue(vcpu
);
2001 kvm_async_pf_hash_reset(vcpu
);
2005 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
2009 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
2010 kvm_async_pf_wakeup_all(vcpu
);
2014 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
2016 vcpu
->arch
.pv_time_enabled
= false;
2019 static void accumulate_steal_time(struct kvm_vcpu
*vcpu
)
2023 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2026 delta
= current
->sched_info
.run_delay
- vcpu
->arch
.st
.last_steal
;
2027 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2028 vcpu
->arch
.st
.accum_steal
= delta
;
2031 static void record_steal_time(struct kvm_vcpu
*vcpu
)
2033 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2036 if (unlikely(kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2037 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
))))
2040 vcpu
->arch
.st
.steal
.steal
+= vcpu
->arch
.st
.accum_steal
;
2041 vcpu
->arch
.st
.steal
.version
+= 2;
2042 vcpu
->arch
.st
.accum_steal
= 0;
2044 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2045 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2048 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2051 u32 msr
= msr_info
->index
;
2052 u64 data
= msr_info
->data
;
2055 case MSR_AMD64_NB_CFG
:
2056 case MSR_IA32_UCODE_REV
:
2057 case MSR_IA32_UCODE_WRITE
:
2058 case MSR_VM_HSAVE_PA
:
2059 case MSR_AMD64_PATCH_LOADER
:
2060 case MSR_AMD64_BU_CFG2
:
2064 return set_efer(vcpu
, data
);
2066 data
&= ~(u64
)0x40; /* ignore flush filter disable */
2067 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
2068 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
2069 data
&= ~(u64
)0x40000; /* ignore Mc status write enable */
2071 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
2076 case MSR_FAM10H_MMIO_CONF_BASE
:
2078 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
2083 case MSR_IA32_DEBUGCTLMSR
:
2085 /* We support the non-activated case already */
2087 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
2088 /* Values other than LBR and BTF are vendor-specific,
2089 thus reserved and should throw a #GP */
2092 vcpu_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2095 case 0x200 ... 0x2ff:
2096 return kvm_mtrr_set_msr(vcpu
, msr
, data
);
2097 case MSR_IA32_APICBASE
:
2098 return kvm_set_apic_base(vcpu
, msr_info
);
2099 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2100 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
2101 case MSR_IA32_TSCDEADLINE
:
2102 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
2104 case MSR_IA32_TSC_ADJUST
:
2105 if (guest_cpuid_has_tsc_adjust(vcpu
)) {
2106 if (!msr_info
->host_initiated
) {
2107 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
2108 kvm_x86_ops
->adjust_tsc_offset(vcpu
, adj
, true);
2110 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
2113 case MSR_IA32_MISC_ENABLE
:
2114 vcpu
->arch
.ia32_misc_enable_msr
= data
;
2116 case MSR_IA32_SMBASE
:
2117 if (!msr_info
->host_initiated
)
2119 vcpu
->arch
.smbase
= data
;
2121 case MSR_KVM_WALL_CLOCK_NEW
:
2122 case MSR_KVM_WALL_CLOCK
:
2123 vcpu
->kvm
->arch
.wall_clock
= data
;
2124 kvm_write_wall_clock(vcpu
->kvm
, data
);
2126 case MSR_KVM_SYSTEM_TIME_NEW
:
2127 case MSR_KVM_SYSTEM_TIME
: {
2129 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2131 kvmclock_reset(vcpu
);
2133 if (vcpu
->vcpu_id
== 0 && !msr_info
->host_initiated
) {
2134 bool tmp
= (msr
== MSR_KVM_SYSTEM_TIME
);
2136 if (ka
->boot_vcpu_runs_old_kvmclock
!= tmp
)
2137 set_bit(KVM_REQ_MASTERCLOCK_UPDATE
,
2140 ka
->boot_vcpu_runs_old_kvmclock
= tmp
;
2142 ka
->kvmclock_offset
= -get_kernel_ns();
2145 vcpu
->arch
.time
= data
;
2146 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2148 /* we verify if the enable bit is set... */
2152 gpa_offset
= data
& ~(PAGE_MASK
| 1);
2154 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2155 &vcpu
->arch
.pv_time
, data
& ~1ULL,
2156 sizeof(struct pvclock_vcpu_time_info
)))
2157 vcpu
->arch
.pv_time_enabled
= false;
2159 vcpu
->arch
.pv_time_enabled
= true;
2163 case MSR_KVM_ASYNC_PF_EN
:
2164 if (kvm_pv_enable_async_pf(vcpu
, data
))
2167 case MSR_KVM_STEAL_TIME
:
2169 if (unlikely(!sched_info_on()))
2172 if (data
& KVM_STEAL_RESERVED_MASK
)
2175 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2176 data
& KVM_STEAL_VALID_BITS
,
2177 sizeof(struct kvm_steal_time
)))
2180 vcpu
->arch
.st
.msr_val
= data
;
2182 if (!(data
& KVM_MSR_ENABLED
))
2185 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2188 accumulate_steal_time(vcpu
);
2191 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2194 case MSR_KVM_PV_EOI_EN
:
2195 if (kvm_lapic_enable_pv_eoi(vcpu
, data
))
2199 case MSR_IA32_MCG_CTL
:
2200 case MSR_IA32_MCG_STATUS
:
2201 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2202 return set_msr_mce(vcpu
, msr
, data
);
2204 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2205 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2206 pr
= true; /* fall through */
2207 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2208 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2209 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2210 return kvm_pmu_set_msr(vcpu
, msr_info
);
2212 if (pr
|| data
!= 0)
2213 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
2214 "0x%x data 0x%llx\n", msr
, data
);
2216 case MSR_K7_CLK_CTL
:
2218 * Ignore all writes to this no longer documented MSR.
2219 * Writes are only relevant for old K7 processors,
2220 * all pre-dating SVM, but a recommended workaround from
2221 * AMD for these chips. It is possible to specify the
2222 * affected processor models on the command line, hence
2223 * the need to ignore the workaround.
2226 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2227 if (kvm_hv_msr_partition_wide(msr
)) {
2229 mutex_lock(&vcpu
->kvm
->lock
);
2230 r
= set_msr_hyperv_pw(vcpu
, msr
, data
);
2231 mutex_unlock(&vcpu
->kvm
->lock
);
2234 return set_msr_hyperv(vcpu
, msr
, data
);
2236 case MSR_IA32_BBL_CR_CTL3
:
2237 /* Drop writes to this legacy MSR -- see rdmsr
2238 * counterpart for further detail.
2240 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n", msr
, data
);
2242 case MSR_AMD64_OSVW_ID_LENGTH
:
2243 if (!guest_cpuid_has_osvw(vcpu
))
2245 vcpu
->arch
.osvw
.length
= data
;
2247 case MSR_AMD64_OSVW_STATUS
:
2248 if (!guest_cpuid_has_osvw(vcpu
))
2250 vcpu
->arch
.osvw
.status
= data
;
2253 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
2254 return xen_hvm_config(vcpu
, data
);
2255 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2256 return kvm_pmu_set_msr(vcpu
, msr_info
);
2258 vcpu_unimpl(vcpu
, "unhandled wrmsr: 0x%x data %llx\n",
2262 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n",
2269 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
2273 * Reads an msr value (of 'msr_index') into 'pdata'.
2274 * Returns 0 on success, non-0 otherwise.
2275 * Assumes vcpu_load() was already called.
2277 int kvm_get_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
2279 return kvm_x86_ops
->get_msr(vcpu
, msr
);
2281 EXPORT_SYMBOL_GPL(kvm_get_msr
);
2283 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2286 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2287 unsigned bank_num
= mcg_cap
& 0xff;
2290 case MSR_IA32_P5_MC_ADDR
:
2291 case MSR_IA32_P5_MC_TYPE
:
2294 case MSR_IA32_MCG_CAP
:
2295 data
= vcpu
->arch
.mcg_cap
;
2297 case MSR_IA32_MCG_CTL
:
2298 if (!(mcg_cap
& MCG_CTL_P
))
2300 data
= vcpu
->arch
.mcg_ctl
;
2302 case MSR_IA32_MCG_STATUS
:
2303 data
= vcpu
->arch
.mcg_status
;
2306 if (msr
>= MSR_IA32_MC0_CTL
&&
2307 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2308 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2309 data
= vcpu
->arch
.mce_banks
[offset
];
2318 static int get_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2321 struct kvm
*kvm
= vcpu
->kvm
;
2324 case HV_X64_MSR_GUEST_OS_ID
:
2325 data
= kvm
->arch
.hv_guest_os_id
;
2327 case HV_X64_MSR_HYPERCALL
:
2328 data
= kvm
->arch
.hv_hypercall
;
2330 case HV_X64_MSR_TIME_REF_COUNT
: {
2332 div_u64(get_kernel_ns() + kvm
->arch
.kvmclock_offset
, 100);
2335 case HV_X64_MSR_REFERENCE_TSC
:
2336 data
= kvm
->arch
.hv_tsc_page
;
2339 vcpu_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
2347 static int get_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2352 case HV_X64_MSR_VP_INDEX
: {
2355 kvm_for_each_vcpu(r
, v
, vcpu
->kvm
) {
2363 case HV_X64_MSR_EOI
:
2364 return kvm_hv_vapic_msr_read(vcpu
, APIC_EOI
, pdata
);
2365 case HV_X64_MSR_ICR
:
2366 return kvm_hv_vapic_msr_read(vcpu
, APIC_ICR
, pdata
);
2367 case HV_X64_MSR_TPR
:
2368 return kvm_hv_vapic_msr_read(vcpu
, APIC_TASKPRI
, pdata
);
2369 case HV_X64_MSR_APIC_ASSIST_PAGE
:
2370 data
= vcpu
->arch
.hv_vapic
;
2373 vcpu_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
2380 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2384 switch (msr_info
->index
) {
2385 case MSR_IA32_PLATFORM_ID
:
2386 case MSR_IA32_EBL_CR_POWERON
:
2387 case MSR_IA32_DEBUGCTLMSR
:
2388 case MSR_IA32_LASTBRANCHFROMIP
:
2389 case MSR_IA32_LASTBRANCHTOIP
:
2390 case MSR_IA32_LASTINTFROMIP
:
2391 case MSR_IA32_LASTINTTOIP
:
2394 case MSR_VM_HSAVE_PA
:
2395 case MSR_K8_INT_PENDING_MSG
:
2396 case MSR_AMD64_NB_CFG
:
2397 case MSR_FAM10H_MMIO_CONF_BASE
:
2398 case MSR_AMD64_BU_CFG2
:
2401 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2402 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2403 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2404 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2405 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2406 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2409 case MSR_IA32_UCODE_REV
:
2410 msr_info
->data
= 0x100000000ULL
;
2413 case 0x200 ... 0x2ff:
2414 return kvm_mtrr_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2415 case 0xcd: /* fsb frequency */
2419 * MSR_EBC_FREQUENCY_ID
2420 * Conservative value valid for even the basic CPU models.
2421 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2422 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2423 * and 266MHz for model 3, or 4. Set Core Clock
2424 * Frequency to System Bus Frequency Ratio to 1 (bits
2425 * 31:24) even though these are only valid for CPU
2426 * models > 2, however guests may end up dividing or
2427 * multiplying by zero otherwise.
2429 case MSR_EBC_FREQUENCY_ID
:
2430 msr_info
->data
= 1 << 24;
2432 case MSR_IA32_APICBASE
:
2433 msr_info
->data
= kvm_get_apic_base(vcpu
);
2435 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2436 return kvm_x2apic_msr_read(vcpu
, msr_info
->index
, &msr_info
->data
);
2438 case MSR_IA32_TSCDEADLINE
:
2439 msr_info
->data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
2441 case MSR_IA32_TSC_ADJUST
:
2442 msr_info
->data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
2444 case MSR_IA32_MISC_ENABLE
:
2445 msr_info
->data
= vcpu
->arch
.ia32_misc_enable_msr
;
2447 case MSR_IA32_SMBASE
:
2448 if (!msr_info
->host_initiated
)
2450 msr_info
->data
= vcpu
->arch
.smbase
;
2452 case MSR_IA32_PERF_STATUS
:
2453 /* TSC increment by tick */
2454 msr_info
->data
= 1000ULL;
2455 /* CPU multiplier */
2456 data
|= (((uint64_t)4ULL) << 40);
2459 msr_info
->data
= vcpu
->arch
.efer
;
2461 case MSR_KVM_WALL_CLOCK
:
2462 case MSR_KVM_WALL_CLOCK_NEW
:
2463 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
2465 case MSR_KVM_SYSTEM_TIME
:
2466 case MSR_KVM_SYSTEM_TIME_NEW
:
2467 msr_info
->data
= vcpu
->arch
.time
;
2469 case MSR_KVM_ASYNC_PF_EN
:
2470 msr_info
->data
= vcpu
->arch
.apf
.msr_val
;
2472 case MSR_KVM_STEAL_TIME
:
2473 msr_info
->data
= vcpu
->arch
.st
.msr_val
;
2475 case MSR_KVM_PV_EOI_EN
:
2476 msr_info
->data
= vcpu
->arch
.pv_eoi
.msr_val
;
2478 case MSR_IA32_P5_MC_ADDR
:
2479 case MSR_IA32_P5_MC_TYPE
:
2480 case MSR_IA32_MCG_CAP
:
2481 case MSR_IA32_MCG_CTL
:
2482 case MSR_IA32_MCG_STATUS
:
2483 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2484 return get_msr_mce(vcpu
, msr_info
->index
, &msr_info
->data
);
2485 case MSR_K7_CLK_CTL
:
2487 * Provide expected ramp-up count for K7. All other
2488 * are set to zero, indicating minimum divisors for
2491 * This prevents guest kernels on AMD host with CPU
2492 * type 6, model 8 and higher from exploding due to
2493 * the rdmsr failing.
2495 msr_info
->data
= 0x20000000;
2497 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2498 if (kvm_hv_msr_partition_wide(msr_info
->index
)) {
2500 mutex_lock(&vcpu
->kvm
->lock
);
2501 r
= get_msr_hyperv_pw(vcpu
, msr_info
->index
, &msr_info
->data
);
2502 mutex_unlock(&vcpu
->kvm
->lock
);
2505 return get_msr_hyperv(vcpu
, msr_info
->index
, &msr_info
->data
);
2507 case MSR_IA32_BBL_CR_CTL3
:
2508 /* This legacy MSR exists but isn't fully documented in current
2509 * silicon. It is however accessed by winxp in very narrow
2510 * scenarios where it sets bit #19, itself documented as
2511 * a "reserved" bit. Best effort attempt to source coherent
2512 * read data here should the balance of the register be
2513 * interpreted by the guest:
2515 * L2 cache control register 3: 64GB range, 256KB size,
2516 * enabled, latency 0x1, configured
2518 msr_info
->data
= 0xbe702111;
2520 case MSR_AMD64_OSVW_ID_LENGTH
:
2521 if (!guest_cpuid_has_osvw(vcpu
))
2523 msr_info
->data
= vcpu
->arch
.osvw
.length
;
2525 case MSR_AMD64_OSVW_STATUS
:
2526 if (!guest_cpuid_has_osvw(vcpu
))
2528 msr_info
->data
= vcpu
->arch
.osvw
.status
;
2531 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2532 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2534 vcpu_unimpl(vcpu
, "unhandled rdmsr: 0x%x\n", msr_info
->index
);
2537 vcpu_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr_info
->index
);
2544 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
2547 * Read or write a bunch of msrs. All parameters are kernel addresses.
2549 * @return number of msrs set successfully.
2551 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
2552 struct kvm_msr_entry
*entries
,
2553 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2554 unsigned index
, u64
*data
))
2558 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2559 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
2560 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
2562 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2568 * Read or write a bunch of msrs. Parameters are user addresses.
2570 * @return number of msrs set successfully.
2572 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
2573 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2574 unsigned index
, u64
*data
),
2577 struct kvm_msrs msrs
;
2578 struct kvm_msr_entry
*entries
;
2583 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
2587 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
2590 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
2591 entries
= memdup_user(user_msrs
->entries
, size
);
2592 if (IS_ERR(entries
)) {
2593 r
= PTR_ERR(entries
);
2597 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
2602 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
2613 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
2618 case KVM_CAP_IRQCHIP
:
2620 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
2621 case KVM_CAP_SET_TSS_ADDR
:
2622 case KVM_CAP_EXT_CPUID
:
2623 case KVM_CAP_EXT_EMUL_CPUID
:
2624 case KVM_CAP_CLOCKSOURCE
:
2626 case KVM_CAP_NOP_IO_DELAY
:
2627 case KVM_CAP_MP_STATE
:
2628 case KVM_CAP_SYNC_MMU
:
2629 case KVM_CAP_USER_NMI
:
2630 case KVM_CAP_REINJECT_CONTROL
:
2631 case KVM_CAP_IRQ_INJECT_STATUS
:
2632 case KVM_CAP_IOEVENTFD
:
2633 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
2635 case KVM_CAP_PIT_STATE2
:
2636 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
2637 case KVM_CAP_XEN_HVM
:
2638 case KVM_CAP_ADJUST_CLOCK
:
2639 case KVM_CAP_VCPU_EVENTS
:
2640 case KVM_CAP_HYPERV
:
2641 case KVM_CAP_HYPERV_VAPIC
:
2642 case KVM_CAP_HYPERV_SPIN
:
2643 case KVM_CAP_PCI_SEGMENT
:
2644 case KVM_CAP_DEBUGREGS
:
2645 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
2647 case KVM_CAP_ASYNC_PF
:
2648 case KVM_CAP_GET_TSC_KHZ
:
2649 case KVM_CAP_KVMCLOCK_CTRL
:
2650 case KVM_CAP_READONLY_MEM
:
2651 case KVM_CAP_HYPERV_TIME
:
2652 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
2653 case KVM_CAP_TSC_DEADLINE_TIMER
:
2654 case KVM_CAP_ENABLE_CAP_VM
:
2655 case KVM_CAP_DISABLE_QUIRKS
:
2656 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2657 case KVM_CAP_ASSIGN_DEV_IRQ
:
2658 case KVM_CAP_PCI_2_3
:
2662 case KVM_CAP_X86_SMM
:
2663 /* SMBASE is usually relocated above 1M on modern chipsets,
2664 * and SMM handlers might indeed rely on 4G segment limits,
2665 * so do not report SMM to be available if real mode is
2666 * emulated via vm86 mode. Still, do not go to great lengths
2667 * to avoid userspace's usage of the feature, because it is a
2668 * fringe case that is not enabled except via specific settings
2669 * of the module parameters.
2671 r
= kvm_x86_ops
->cpu_has_high_real_mode_segbase();
2673 case KVM_CAP_COALESCED_MMIO
:
2674 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
2677 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
2679 case KVM_CAP_NR_VCPUS
:
2680 r
= KVM_SOFT_MAX_VCPUS
;
2682 case KVM_CAP_MAX_VCPUS
:
2685 case KVM_CAP_NR_MEMSLOTS
:
2686 r
= KVM_USER_MEM_SLOTS
;
2688 case KVM_CAP_PV_MMU
: /* obsolete */
2691 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2693 r
= iommu_present(&pci_bus_type
);
2697 r
= KVM_MAX_MCE_BANKS
;
2702 case KVM_CAP_TSC_CONTROL
:
2703 r
= kvm_has_tsc_control
;
2713 long kvm_arch_dev_ioctl(struct file
*filp
,
2714 unsigned int ioctl
, unsigned long arg
)
2716 void __user
*argp
= (void __user
*)arg
;
2720 case KVM_GET_MSR_INDEX_LIST
: {
2721 struct kvm_msr_list __user
*user_msr_list
= argp
;
2722 struct kvm_msr_list msr_list
;
2726 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2729 msr_list
.nmsrs
= num_msrs_to_save
+ num_emulated_msrs
;
2730 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2733 if (n
< msr_list
.nmsrs
)
2736 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2737 num_msrs_to_save
* sizeof(u32
)))
2739 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2741 num_emulated_msrs
* sizeof(u32
)))
2746 case KVM_GET_SUPPORTED_CPUID
:
2747 case KVM_GET_EMULATED_CPUID
: {
2748 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2749 struct kvm_cpuid2 cpuid
;
2752 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2755 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
2761 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2766 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2769 mce_cap
= KVM_MCE_CAP_SUPPORTED
;
2771 if (copy_to_user(argp
, &mce_cap
, sizeof mce_cap
))
2783 static void wbinvd_ipi(void *garbage
)
2788 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2790 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
2793 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2795 /* Address WBINVD may be executed by guest */
2796 if (need_emulate_wbinvd(vcpu
)) {
2797 if (kvm_x86_ops
->has_wbinvd_exit())
2798 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2799 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2800 smp_call_function_single(vcpu
->cpu
,
2801 wbinvd_ipi
, NULL
, 1);
2804 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2806 /* Apply any externally detected TSC adjustments (due to suspend) */
2807 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
2808 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
2809 vcpu
->arch
.tsc_offset_adjustment
= 0;
2810 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2813 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2814 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
2815 native_read_tsc() - vcpu
->arch
.last_host_tsc
;
2817 mark_tsc_unstable("KVM discovered backwards TSC");
2818 if (check_tsc_unstable()) {
2819 u64 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
,
2820 vcpu
->arch
.last_guest_tsc
);
2821 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
2822 vcpu
->arch
.tsc_catchup
= 1;
2825 * On a host with synchronized TSC, there is no need to update
2826 * kvmclock on vcpu->cpu migration
2828 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
2829 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2830 if (vcpu
->cpu
!= cpu
)
2831 kvm_migrate_timers(vcpu
);
2835 accumulate_steal_time(vcpu
);
2836 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2839 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
2841 kvm_x86_ops
->vcpu_put(vcpu
);
2842 kvm_put_guest_fpu(vcpu
);
2843 vcpu
->arch
.last_host_tsc
= native_read_tsc();
2846 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
2847 struct kvm_lapic_state
*s
)
2849 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
2850 memcpy(s
->regs
, vcpu
->arch
.apic
->regs
, sizeof *s
);
2855 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
2856 struct kvm_lapic_state
*s
)
2858 kvm_apic_post_state_restore(vcpu
, s
);
2859 update_cr8_intercept(vcpu
);
2864 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
2865 struct kvm_interrupt
*irq
)
2867 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
2869 if (irqchip_in_kernel(vcpu
->kvm
))
2872 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
2873 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2878 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
2880 kvm_inject_nmi(vcpu
);
2885 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu
*vcpu
)
2887 kvm_make_request(KVM_REQ_SMI
, vcpu
);
2892 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
2893 struct kvm_tpr_access_ctl
*tac
)
2897 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
2901 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
2905 unsigned bank_num
= mcg_cap
& 0xff, bank
;
2908 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
2910 if (mcg_cap
& ~(KVM_MCE_CAP_SUPPORTED
| 0xff | 0xff0000))
2913 vcpu
->arch
.mcg_cap
= mcg_cap
;
2914 /* Init IA32_MCG_CTL to all 1s */
2915 if (mcg_cap
& MCG_CTL_P
)
2916 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
2917 /* Init IA32_MCi_CTL to all 1s */
2918 for (bank
= 0; bank
< bank_num
; bank
++)
2919 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
2924 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
2925 struct kvm_x86_mce
*mce
)
2927 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2928 unsigned bank_num
= mcg_cap
& 0xff;
2929 u64
*banks
= vcpu
->arch
.mce_banks
;
2931 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
2934 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2935 * reporting is disabled
2937 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
2938 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
2940 banks
+= 4 * mce
->bank
;
2942 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2943 * reporting is disabled for the bank
2945 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
2947 if (mce
->status
& MCI_STATUS_UC
) {
2948 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
2949 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
2950 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
2953 if (banks
[1] & MCI_STATUS_VAL
)
2954 mce
->status
|= MCI_STATUS_OVER
;
2955 banks
[2] = mce
->addr
;
2956 banks
[3] = mce
->misc
;
2957 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
2958 banks
[1] = mce
->status
;
2959 kvm_queue_exception(vcpu
, MC_VECTOR
);
2960 } else if (!(banks
[1] & MCI_STATUS_VAL
)
2961 || !(banks
[1] & MCI_STATUS_UC
)) {
2962 if (banks
[1] & MCI_STATUS_VAL
)
2963 mce
->status
|= MCI_STATUS_OVER
;
2964 banks
[2] = mce
->addr
;
2965 banks
[3] = mce
->misc
;
2966 banks
[1] = mce
->status
;
2968 banks
[1] |= MCI_STATUS_OVER
;
2972 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
2973 struct kvm_vcpu_events
*events
)
2976 events
->exception
.injected
=
2977 vcpu
->arch
.exception
.pending
&&
2978 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
2979 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
2980 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
2981 events
->exception
.pad
= 0;
2982 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
2984 events
->interrupt
.injected
=
2985 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
2986 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
2987 events
->interrupt
.soft
= 0;
2988 events
->interrupt
.shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
2990 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
2991 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
2992 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
2993 events
->nmi
.pad
= 0;
2995 events
->sipi_vector
= 0; /* never valid when reporting to user space */
2997 events
->smi
.smm
= is_smm(vcpu
);
2998 events
->smi
.pending
= vcpu
->arch
.smi_pending
;
2999 events
->smi
.smm_inside_nmi
=
3000 !!(vcpu
->arch
.hflags
& HF_SMM_INSIDE_NMI_MASK
);
3001 events
->smi
.latched_init
= kvm_lapic_latched_init(vcpu
);
3003 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
3004 | KVM_VCPUEVENT_VALID_SHADOW
3005 | KVM_VCPUEVENT_VALID_SMM
);
3006 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
3009 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
3010 struct kvm_vcpu_events
*events
)
3012 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3013 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3014 | KVM_VCPUEVENT_VALID_SHADOW
3015 | KVM_VCPUEVENT_VALID_SMM
))
3019 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
3020 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
3021 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
3022 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
3024 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
3025 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
3026 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
3027 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
3028 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
3029 events
->interrupt
.shadow
);
3031 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
3032 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
3033 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
3034 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
3036 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
3037 kvm_vcpu_has_lapic(vcpu
))
3038 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
3040 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
) {
3041 if (events
->smi
.smm
)
3042 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
3044 vcpu
->arch
.hflags
&= ~HF_SMM_MASK
;
3045 vcpu
->arch
.smi_pending
= events
->smi
.pending
;
3046 if (events
->smi
.smm_inside_nmi
)
3047 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
3049 vcpu
->arch
.hflags
&= ~HF_SMM_INSIDE_NMI_MASK
;
3050 if (kvm_vcpu_has_lapic(vcpu
)) {
3051 if (events
->smi
.latched_init
)
3052 set_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3054 clear_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3058 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3063 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
3064 struct kvm_debugregs
*dbgregs
)
3068 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
3069 kvm_get_dr(vcpu
, 6, &val
);
3071 dbgregs
->dr7
= vcpu
->arch
.dr7
;
3073 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
3076 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
3077 struct kvm_debugregs
*dbgregs
)
3082 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
3083 kvm_update_dr0123(vcpu
);
3084 vcpu
->arch
.dr6
= dbgregs
->dr6
;
3085 kvm_update_dr6(vcpu
);
3086 vcpu
->arch
.dr7
= dbgregs
->dr7
;
3087 kvm_update_dr7(vcpu
);
3092 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3094 static void fill_xsave(u8
*dest
, struct kvm_vcpu
*vcpu
)
3096 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3097 u64 xstate_bv
= xsave
->header
.xfeatures
;
3101 * Copy legacy XSAVE area, to avoid complications with CPUID
3102 * leaves 0 and 1 in the loop below.
3104 memcpy(dest
, xsave
, XSAVE_HDR_OFFSET
);
3107 *(u64
*)(dest
+ XSAVE_HDR_OFFSET
) = xstate_bv
;
3110 * Copy each region from the possibly compacted offset to the
3111 * non-compacted offset.
3113 valid
= xstate_bv
& ~XSTATE_FPSSE
;
3115 u64 feature
= valid
& -valid
;
3116 int index
= fls64(feature
) - 1;
3117 void *src
= get_xsave_addr(xsave
, feature
);
3120 u32 size
, offset
, ecx
, edx
;
3121 cpuid_count(XSTATE_CPUID
, index
,
3122 &size
, &offset
, &ecx
, &edx
);
3123 memcpy(dest
+ offset
, src
, size
);
3130 static void load_xsave(struct kvm_vcpu
*vcpu
, u8
*src
)
3132 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3133 u64 xstate_bv
= *(u64
*)(src
+ XSAVE_HDR_OFFSET
);
3137 * Copy legacy XSAVE area, to avoid complications with CPUID
3138 * leaves 0 and 1 in the loop below.
3140 memcpy(xsave
, src
, XSAVE_HDR_OFFSET
);
3142 /* Set XSTATE_BV and possibly XCOMP_BV. */
3143 xsave
->header
.xfeatures
= xstate_bv
;
3145 xsave
->header
.xcomp_bv
= host_xcr0
| XSTATE_COMPACTION_ENABLED
;
3148 * Copy each region from the non-compacted offset to the
3149 * possibly compacted offset.
3151 valid
= xstate_bv
& ~XSTATE_FPSSE
;
3153 u64 feature
= valid
& -valid
;
3154 int index
= fls64(feature
) - 1;
3155 void *dest
= get_xsave_addr(xsave
, feature
);
3158 u32 size
, offset
, ecx
, edx
;
3159 cpuid_count(XSTATE_CPUID
, index
,
3160 &size
, &offset
, &ecx
, &edx
);
3161 memcpy(dest
, src
+ offset
, size
);
3169 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
3170 struct kvm_xsave
*guest_xsave
)
3172 if (cpu_has_xsave
) {
3173 memset(guest_xsave
, 0, sizeof(struct kvm_xsave
));
3174 fill_xsave((u8
*) guest_xsave
->region
, vcpu
);
3176 memcpy(guest_xsave
->region
,
3177 &vcpu
->arch
.guest_fpu
.state
.fxsave
,
3178 sizeof(struct fxregs_state
));
3179 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
3184 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
3185 struct kvm_xsave
*guest_xsave
)
3188 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
3190 if (cpu_has_xsave
) {
3192 * Here we allow setting states that are not present in
3193 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3194 * with old userspace.
3196 if (xstate_bv
& ~kvm_supported_xcr0())
3198 load_xsave(vcpu
, (u8
*)guest_xsave
->region
);
3200 if (xstate_bv
& ~XSTATE_FPSSE
)
3202 memcpy(&vcpu
->arch
.guest_fpu
.state
.fxsave
,
3203 guest_xsave
->region
, sizeof(struct fxregs_state
));
3208 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
3209 struct kvm_xcrs
*guest_xcrs
)
3211 if (!cpu_has_xsave
) {
3212 guest_xcrs
->nr_xcrs
= 0;
3216 guest_xcrs
->nr_xcrs
= 1;
3217 guest_xcrs
->flags
= 0;
3218 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
3219 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
3222 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
3223 struct kvm_xcrs
*guest_xcrs
)
3230 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
3233 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
3234 /* Only support XCR0 currently */
3235 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
3236 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
3237 guest_xcrs
->xcrs
[i
].value
);
3246 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3247 * stopped by the hypervisor. This function will be called from the host only.
3248 * EINVAL is returned when the host attempts to set the flag for a guest that
3249 * does not support pv clocks.
3251 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
3253 if (!vcpu
->arch
.pv_time_enabled
)
3255 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
3256 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3260 long kvm_arch_vcpu_ioctl(struct file
*filp
,
3261 unsigned int ioctl
, unsigned long arg
)
3263 struct kvm_vcpu
*vcpu
= filp
->private_data
;
3264 void __user
*argp
= (void __user
*)arg
;
3267 struct kvm_lapic_state
*lapic
;
3268 struct kvm_xsave
*xsave
;
3269 struct kvm_xcrs
*xcrs
;
3275 case KVM_GET_LAPIC
: {
3277 if (!vcpu
->arch
.apic
)
3279 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
3284 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
3288 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
3293 case KVM_SET_LAPIC
: {
3295 if (!vcpu
->arch
.apic
)
3297 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
3298 if (IS_ERR(u
.lapic
))
3299 return PTR_ERR(u
.lapic
);
3301 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
3304 case KVM_INTERRUPT
: {
3305 struct kvm_interrupt irq
;
3308 if (copy_from_user(&irq
, argp
, sizeof irq
))
3310 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
3314 r
= kvm_vcpu_ioctl_nmi(vcpu
);
3318 r
= kvm_vcpu_ioctl_smi(vcpu
);
3321 case KVM_SET_CPUID
: {
3322 struct kvm_cpuid __user
*cpuid_arg
= argp
;
3323 struct kvm_cpuid cpuid
;
3326 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3328 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
3331 case KVM_SET_CPUID2
: {
3332 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3333 struct kvm_cpuid2 cpuid
;
3336 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3338 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
3339 cpuid_arg
->entries
);
3342 case KVM_GET_CPUID2
: {
3343 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3344 struct kvm_cpuid2 cpuid
;
3347 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3349 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
3350 cpuid_arg
->entries
);
3354 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
3360 r
= msr_io(vcpu
, argp
, do_get_msr
, 1);
3363 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
3365 case KVM_TPR_ACCESS_REPORTING
: {
3366 struct kvm_tpr_access_ctl tac
;
3369 if (copy_from_user(&tac
, argp
, sizeof tac
))
3371 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
3375 if (copy_to_user(argp
, &tac
, sizeof tac
))
3380 case KVM_SET_VAPIC_ADDR
: {
3381 struct kvm_vapic_addr va
;
3384 if (!irqchip_in_kernel(vcpu
->kvm
))
3387 if (copy_from_user(&va
, argp
, sizeof va
))
3389 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
3392 case KVM_X86_SETUP_MCE
: {
3396 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
3398 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
3401 case KVM_X86_SET_MCE
: {
3402 struct kvm_x86_mce mce
;
3405 if (copy_from_user(&mce
, argp
, sizeof mce
))
3407 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
3410 case KVM_GET_VCPU_EVENTS
: {
3411 struct kvm_vcpu_events events
;
3413 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
3416 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
3421 case KVM_SET_VCPU_EVENTS
: {
3422 struct kvm_vcpu_events events
;
3425 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
3428 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
3431 case KVM_GET_DEBUGREGS
: {
3432 struct kvm_debugregs dbgregs
;
3434 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
3437 if (copy_to_user(argp
, &dbgregs
,
3438 sizeof(struct kvm_debugregs
)))
3443 case KVM_SET_DEBUGREGS
: {
3444 struct kvm_debugregs dbgregs
;
3447 if (copy_from_user(&dbgregs
, argp
,
3448 sizeof(struct kvm_debugregs
)))
3451 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
3454 case KVM_GET_XSAVE
: {
3455 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
3460 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
3463 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
3468 case KVM_SET_XSAVE
: {
3469 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
3470 if (IS_ERR(u
.xsave
))
3471 return PTR_ERR(u
.xsave
);
3473 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
3476 case KVM_GET_XCRS
: {
3477 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3482 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
3485 if (copy_to_user(argp
, u
.xcrs
,
3486 sizeof(struct kvm_xcrs
)))
3491 case KVM_SET_XCRS
: {
3492 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
3494 return PTR_ERR(u
.xcrs
);
3496 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
3499 case KVM_SET_TSC_KHZ
: {
3503 user_tsc_khz
= (u32
)arg
;
3505 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
3508 if (user_tsc_khz
== 0)
3509 user_tsc_khz
= tsc_khz
;
3511 kvm_set_tsc_khz(vcpu
, user_tsc_khz
);
3516 case KVM_GET_TSC_KHZ
: {
3517 r
= vcpu
->arch
.virtual_tsc_khz
;
3520 case KVM_KVMCLOCK_CTRL
: {
3521 r
= kvm_set_guest_paused(vcpu
);
3532 int kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
3534 return VM_FAULT_SIGBUS
;
3537 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
3541 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
3543 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
3547 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3550 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3554 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3555 u32 kvm_nr_mmu_pages
)
3557 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3560 mutex_lock(&kvm
->slots_lock
);
3562 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3563 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3565 mutex_unlock(&kvm
->slots_lock
);
3569 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3571 return kvm
->arch
.n_max_mmu_pages
;
3574 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3579 switch (chip
->chip_id
) {
3580 case KVM_IRQCHIP_PIC_MASTER
:
3581 memcpy(&chip
->chip
.pic
,
3582 &pic_irqchip(kvm
)->pics
[0],
3583 sizeof(struct kvm_pic_state
));
3585 case KVM_IRQCHIP_PIC_SLAVE
:
3586 memcpy(&chip
->chip
.pic
,
3587 &pic_irqchip(kvm
)->pics
[1],
3588 sizeof(struct kvm_pic_state
));
3590 case KVM_IRQCHIP_IOAPIC
:
3591 r
= kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3600 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3605 switch (chip
->chip_id
) {
3606 case KVM_IRQCHIP_PIC_MASTER
:
3607 spin_lock(&pic_irqchip(kvm
)->lock
);
3608 memcpy(&pic_irqchip(kvm
)->pics
[0],
3610 sizeof(struct kvm_pic_state
));
3611 spin_unlock(&pic_irqchip(kvm
)->lock
);
3613 case KVM_IRQCHIP_PIC_SLAVE
:
3614 spin_lock(&pic_irqchip(kvm
)->lock
);
3615 memcpy(&pic_irqchip(kvm
)->pics
[1],
3617 sizeof(struct kvm_pic_state
));
3618 spin_unlock(&pic_irqchip(kvm
)->lock
);
3620 case KVM_IRQCHIP_IOAPIC
:
3621 r
= kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3627 kvm_pic_update_irq(pic_irqchip(kvm
));
3631 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3635 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3636 memcpy(ps
, &kvm
->arch
.vpit
->pit_state
, sizeof(struct kvm_pit_state
));
3637 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3641 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3645 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3646 memcpy(&kvm
->arch
.vpit
->pit_state
, ps
, sizeof(struct kvm_pit_state
));
3647 kvm_pit_load_count(kvm
, 0, ps
->channels
[0].count
, 0);
3648 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3652 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3656 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3657 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3658 sizeof(ps
->channels
));
3659 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3660 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3661 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
3665 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3667 int r
= 0, start
= 0;
3668 u32 prev_legacy
, cur_legacy
;
3669 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3670 prev_legacy
= kvm
->arch
.vpit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3671 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3672 if (!prev_legacy
&& cur_legacy
)
3674 memcpy(&kvm
->arch
.vpit
->pit_state
.channels
, &ps
->channels
,
3675 sizeof(kvm
->arch
.vpit
->pit_state
.channels
));
3676 kvm
->arch
.vpit
->pit_state
.flags
= ps
->flags
;
3677 kvm_pit_load_count(kvm
, 0, kvm
->arch
.vpit
->pit_state
.channels
[0].count
, start
);
3678 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3682 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
3683 struct kvm_reinject_control
*control
)
3685 if (!kvm
->arch
.vpit
)
3687 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3688 kvm
->arch
.vpit
->pit_state
.reinject
= control
->pit_reinject
;
3689 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3694 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3695 * @kvm: kvm instance
3696 * @log: slot id and address to which we copy the log
3698 * Steps 1-4 below provide general overview of dirty page logging. See
3699 * kvm_get_dirty_log_protect() function description for additional details.
3701 * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3702 * always flush the TLB (step 4) even if previous step failed and the dirty
3703 * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3704 * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3705 * writes will be marked dirty for next log read.
3707 * 1. Take a snapshot of the bit and clear it if needed.
3708 * 2. Write protect the corresponding page.
3709 * 3. Copy the snapshot to the userspace.
3710 * 4. Flush TLB's if needed.
3712 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
, struct kvm_dirty_log
*log
)
3714 bool is_dirty
= false;
3717 mutex_lock(&kvm
->slots_lock
);
3720 * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3722 if (kvm_x86_ops
->flush_log_dirty
)
3723 kvm_x86_ops
->flush_log_dirty(kvm
);
3725 r
= kvm_get_dirty_log_protect(kvm
, log
, &is_dirty
);
3728 * All the TLBs can be flushed out of mmu lock, see the comments in
3729 * kvm_mmu_slot_remove_write_access().
3731 lockdep_assert_held(&kvm
->slots_lock
);
3733 kvm_flush_remote_tlbs(kvm
);
3735 mutex_unlock(&kvm
->slots_lock
);
3739 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
3742 if (!irqchip_in_kernel(kvm
))
3745 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
3746 irq_event
->irq
, irq_event
->level
,
3751 static int kvm_vm_ioctl_enable_cap(struct kvm
*kvm
,
3752 struct kvm_enable_cap
*cap
)
3760 case KVM_CAP_DISABLE_QUIRKS
:
3761 kvm
->arch
.disabled_quirks
= cap
->args
[0];
3771 long kvm_arch_vm_ioctl(struct file
*filp
,
3772 unsigned int ioctl
, unsigned long arg
)
3774 struct kvm
*kvm
= filp
->private_data
;
3775 void __user
*argp
= (void __user
*)arg
;
3778 * This union makes it completely explicit to gcc-3.x
3779 * that these two variables' stack usage should be
3780 * combined, not added together.
3783 struct kvm_pit_state ps
;
3784 struct kvm_pit_state2 ps2
;
3785 struct kvm_pit_config pit_config
;
3789 case KVM_SET_TSS_ADDR
:
3790 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
3792 case KVM_SET_IDENTITY_MAP_ADDR
: {
3796 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
3798 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
3801 case KVM_SET_NR_MMU_PAGES
:
3802 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
3804 case KVM_GET_NR_MMU_PAGES
:
3805 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
3807 case KVM_CREATE_IRQCHIP
: {
3808 struct kvm_pic
*vpic
;
3810 mutex_lock(&kvm
->lock
);
3813 goto create_irqchip_unlock
;
3815 if (atomic_read(&kvm
->online_vcpus
))
3816 goto create_irqchip_unlock
;
3818 vpic
= kvm_create_pic(kvm
);
3820 r
= kvm_ioapic_init(kvm
);
3822 mutex_lock(&kvm
->slots_lock
);
3823 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3825 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3827 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3829 mutex_unlock(&kvm
->slots_lock
);
3831 goto create_irqchip_unlock
;
3834 goto create_irqchip_unlock
;
3836 kvm
->arch
.vpic
= vpic
;
3838 r
= kvm_setup_default_irq_routing(kvm
);
3840 mutex_lock(&kvm
->slots_lock
);
3841 mutex_lock(&kvm
->irq_lock
);
3842 kvm_ioapic_destroy(kvm
);
3843 kvm_destroy_pic(kvm
);
3844 mutex_unlock(&kvm
->irq_lock
);
3845 mutex_unlock(&kvm
->slots_lock
);
3847 create_irqchip_unlock
:
3848 mutex_unlock(&kvm
->lock
);
3851 case KVM_CREATE_PIT
:
3852 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
3854 case KVM_CREATE_PIT2
:
3856 if (copy_from_user(&u
.pit_config
, argp
,
3857 sizeof(struct kvm_pit_config
)))
3860 mutex_lock(&kvm
->slots_lock
);
3863 goto create_pit_unlock
;
3865 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
3869 mutex_unlock(&kvm
->slots_lock
);
3871 case KVM_GET_IRQCHIP
: {
3872 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3873 struct kvm_irqchip
*chip
;
3875 chip
= memdup_user(argp
, sizeof(*chip
));
3882 if (!irqchip_in_kernel(kvm
))
3883 goto get_irqchip_out
;
3884 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
3886 goto get_irqchip_out
;
3888 if (copy_to_user(argp
, chip
, sizeof *chip
))
3889 goto get_irqchip_out
;
3895 case KVM_SET_IRQCHIP
: {
3896 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3897 struct kvm_irqchip
*chip
;
3899 chip
= memdup_user(argp
, sizeof(*chip
));
3906 if (!irqchip_in_kernel(kvm
))
3907 goto set_irqchip_out
;
3908 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
3910 goto set_irqchip_out
;
3918 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
3921 if (!kvm
->arch
.vpit
)
3923 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
3927 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
3934 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
3937 if (!kvm
->arch
.vpit
)
3939 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
3942 case KVM_GET_PIT2
: {
3944 if (!kvm
->arch
.vpit
)
3946 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
3950 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
3955 case KVM_SET_PIT2
: {
3957 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
3960 if (!kvm
->arch
.vpit
)
3962 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
3965 case KVM_REINJECT_CONTROL
: {
3966 struct kvm_reinject_control control
;
3968 if (copy_from_user(&control
, argp
, sizeof(control
)))
3970 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
3973 case KVM_XEN_HVM_CONFIG
: {
3975 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
3976 sizeof(struct kvm_xen_hvm_config
)))
3979 if (kvm
->arch
.xen_hvm_config
.flags
)
3984 case KVM_SET_CLOCK
: {
3985 struct kvm_clock_data user_ns
;
3990 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
3998 local_irq_disable();
3999 now_ns
= get_kernel_ns();
4000 delta
= user_ns
.clock
- now_ns
;
4002 kvm
->arch
.kvmclock_offset
= delta
;
4003 kvm_gen_update_masterclock(kvm
);
4006 case KVM_GET_CLOCK
: {
4007 struct kvm_clock_data user_ns
;
4010 local_irq_disable();
4011 now_ns
= get_kernel_ns();
4012 user_ns
.clock
= kvm
->arch
.kvmclock_offset
+ now_ns
;
4015 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
4018 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
4023 case KVM_ENABLE_CAP
: {
4024 struct kvm_enable_cap cap
;
4027 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
4029 r
= kvm_vm_ioctl_enable_cap(kvm
, &cap
);
4033 r
= kvm_vm_ioctl_assigned_device(kvm
, ioctl
, arg
);
4039 static void kvm_init_msr_list(void)
4044 for (i
= j
= 0; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
4045 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
4049 * Even MSRs that are valid in the host may not be exposed
4050 * to the guests in some cases. We could work around this
4051 * in VMX with the generic MSR save/load machinery, but it
4052 * is not really worthwhile since it will really only
4053 * happen with nested virtualization.
4055 switch (msrs_to_save
[i
]) {
4056 case MSR_IA32_BNDCFGS
:
4057 if (!kvm_x86_ops
->mpx_supported())
4065 msrs_to_save
[j
] = msrs_to_save
[i
];
4068 num_msrs_to_save
= j
;
4070 for (i
= j
= 0; i
< ARRAY_SIZE(emulated_msrs
); i
++) {
4071 switch (emulated_msrs
[i
]) {
4072 case MSR_IA32_SMBASE
:
4073 if (!kvm_x86_ops
->cpu_has_high_real_mode_segbase())
4081 emulated_msrs
[j
] = emulated_msrs
[i
];
4084 num_emulated_msrs
= j
;
4087 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
4095 if (!(vcpu
->arch
.apic
&&
4096 !kvm_iodevice_write(vcpu
, &vcpu
->arch
.apic
->dev
, addr
, n
, v
))
4097 && kvm_io_bus_write(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4108 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
4115 if (!(vcpu
->arch
.apic
&&
4116 !kvm_iodevice_read(vcpu
, &vcpu
->arch
.apic
->dev
,
4118 && kvm_io_bus_read(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4120 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, *(u64
*)v
);
4130 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
4131 struct kvm_segment
*var
, int seg
)
4133 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
4136 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
4137 struct kvm_segment
*var
, int seg
)
4139 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
4142 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
,
4143 struct x86_exception
*exception
)
4147 BUG_ON(!mmu_is_nested(vcpu
));
4149 /* NPT walks are always user-walks */
4150 access
|= PFERR_USER_MASK
;
4151 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, exception
);
4156 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
4157 struct x86_exception
*exception
)
4159 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4160 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4163 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
4164 struct x86_exception
*exception
)
4166 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4167 access
|= PFERR_FETCH_MASK
;
4168 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4171 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
4172 struct x86_exception
*exception
)
4174 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4175 access
|= PFERR_WRITE_MASK
;
4176 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4179 /* uses this to access any guest's mapped memory without checking CPL */
4180 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
4181 struct x86_exception
*exception
)
4183 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
4186 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
4187 struct kvm_vcpu
*vcpu
, u32 access
,
4188 struct x86_exception
*exception
)
4191 int r
= X86EMUL_CONTINUE
;
4194 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
4196 unsigned offset
= addr
& (PAGE_SIZE
-1);
4197 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4200 if (gpa
== UNMAPPED_GVA
)
4201 return X86EMUL_PROPAGATE_FAULT
;
4202 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, data
,
4205 r
= X86EMUL_IO_NEEDED
;
4217 /* used for instruction fetching */
4218 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4219 gva_t addr
, void *val
, unsigned int bytes
,
4220 struct x86_exception
*exception
)
4222 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4223 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4227 /* Inline kvm_read_guest_virt_helper for speed. */
4228 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
|PFERR_FETCH_MASK
,
4230 if (unlikely(gpa
== UNMAPPED_GVA
))
4231 return X86EMUL_PROPAGATE_FAULT
;
4233 offset
= addr
& (PAGE_SIZE
-1);
4234 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
4235 bytes
= (unsigned)PAGE_SIZE
- offset
;
4236 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, val
,
4238 if (unlikely(ret
< 0))
4239 return X86EMUL_IO_NEEDED
;
4241 return X86EMUL_CONTINUE
;
4244 int kvm_read_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4245 gva_t addr
, void *val
, unsigned int bytes
,
4246 struct x86_exception
*exception
)
4248 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4249 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4251 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
4254 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
4256 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4257 gva_t addr
, void *val
, unsigned int bytes
,
4258 struct x86_exception
*exception
)
4260 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4261 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, exception
);
4264 int kvm_write_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4265 gva_t addr
, void *val
,
4267 struct x86_exception
*exception
)
4269 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4271 int r
= X86EMUL_CONTINUE
;
4274 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
4277 unsigned offset
= addr
& (PAGE_SIZE
-1);
4278 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4281 if (gpa
== UNMAPPED_GVA
)
4282 return X86EMUL_PROPAGATE_FAULT
;
4283 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, data
, towrite
);
4285 r
= X86EMUL_IO_NEEDED
;
4296 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
4298 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4299 gpa_t
*gpa
, struct x86_exception
*exception
,
4302 u32 access
= ((kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
4303 | (write
? PFERR_WRITE_MASK
: 0);
4305 if (vcpu_match_mmio_gva(vcpu
, gva
)
4306 && !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
4307 vcpu
->arch
.access
, access
)) {
4308 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
4309 (gva
& (PAGE_SIZE
- 1));
4310 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
4314 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4316 if (*gpa
== UNMAPPED_GVA
)
4319 /* For APIC access vmexit */
4320 if ((*gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4323 if (vcpu_match_mmio_gpa(vcpu
, *gpa
)) {
4324 trace_vcpu_match_mmio(gva
, *gpa
, write
, true);
4331 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4332 const void *val
, int bytes
)
4336 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, val
, bytes
);
4339 kvm_mmu_pte_write(vcpu
, gpa
, val
, bytes
);
4343 struct read_write_emulator_ops
{
4344 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
4346 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4347 void *val
, int bytes
);
4348 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4349 int bytes
, void *val
);
4350 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4351 void *val
, int bytes
);
4355 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
4357 if (vcpu
->mmio_read_completed
) {
4358 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
4359 vcpu
->mmio_fragments
[0].gpa
, *(u64
*)val
);
4360 vcpu
->mmio_read_completed
= 0;
4367 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4368 void *val
, int bytes
)
4370 return !kvm_vcpu_read_guest(vcpu
, gpa
, val
, bytes
);
4373 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4374 void *val
, int bytes
)
4376 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
4379 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
4381 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
4382 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
4385 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4386 void *val
, int bytes
)
4388 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
4389 return X86EMUL_IO_NEEDED
;
4392 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4393 void *val
, int bytes
)
4395 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
4397 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
4398 return X86EMUL_CONTINUE
;
4401 static const struct read_write_emulator_ops read_emultor
= {
4402 .read_write_prepare
= read_prepare
,
4403 .read_write_emulate
= read_emulate
,
4404 .read_write_mmio
= vcpu_mmio_read
,
4405 .read_write_exit_mmio
= read_exit_mmio
,
4408 static const struct read_write_emulator_ops write_emultor
= {
4409 .read_write_emulate
= write_emulate
,
4410 .read_write_mmio
= write_mmio
,
4411 .read_write_exit_mmio
= write_exit_mmio
,
4415 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
4417 struct x86_exception
*exception
,
4418 struct kvm_vcpu
*vcpu
,
4419 const struct read_write_emulator_ops
*ops
)
4423 bool write
= ops
->write
;
4424 struct kvm_mmio_fragment
*frag
;
4426 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
4429 return X86EMUL_PROPAGATE_FAULT
;
4431 /* For APIC access vmexit */
4435 if (ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
4436 return X86EMUL_CONTINUE
;
4440 * Is this MMIO handled locally?
4442 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
4443 if (handled
== bytes
)
4444 return X86EMUL_CONTINUE
;
4450 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
4451 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
4455 return X86EMUL_CONTINUE
;
4458 static int emulator_read_write(struct x86_emulate_ctxt
*ctxt
,
4460 void *val
, unsigned int bytes
,
4461 struct x86_exception
*exception
,
4462 const struct read_write_emulator_ops
*ops
)
4464 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4468 if (ops
->read_write_prepare
&&
4469 ops
->read_write_prepare(vcpu
, val
, bytes
))
4470 return X86EMUL_CONTINUE
;
4472 vcpu
->mmio_nr_fragments
= 0;
4474 /* Crossing a page boundary? */
4475 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
4478 now
= -addr
& ~PAGE_MASK
;
4479 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
4482 if (rc
!= X86EMUL_CONTINUE
)
4485 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
4491 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
4493 if (rc
!= X86EMUL_CONTINUE
)
4496 if (!vcpu
->mmio_nr_fragments
)
4499 gpa
= vcpu
->mmio_fragments
[0].gpa
;
4501 vcpu
->mmio_needed
= 1;
4502 vcpu
->mmio_cur_fragment
= 0;
4504 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
4505 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
4506 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
4507 vcpu
->run
->mmio
.phys_addr
= gpa
;
4509 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
4512 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
4516 struct x86_exception
*exception
)
4518 return emulator_read_write(ctxt
, addr
, val
, bytes
,
4519 exception
, &read_emultor
);
4522 static int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
4526 struct x86_exception
*exception
)
4528 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
4529 exception
, &write_emultor
);
4532 #define CMPXCHG_TYPE(t, ptr, old, new) \
4533 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4535 #ifdef CONFIG_X86_64
4536 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4538 # define CMPXCHG64(ptr, old, new) \
4539 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4542 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
4547 struct x86_exception
*exception
)
4549 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4555 /* guests cmpxchg8b have to be emulated atomically */
4556 if (bytes
> 8 || (bytes
& (bytes
- 1)))
4559 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
4561 if (gpa
== UNMAPPED_GVA
||
4562 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4565 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
4568 page
= kvm_vcpu_gfn_to_page(vcpu
, gpa
>> PAGE_SHIFT
);
4569 if (is_error_page(page
))
4572 kaddr
= kmap_atomic(page
);
4573 kaddr
+= offset_in_page(gpa
);
4576 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
4579 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
4582 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
4585 exchanged
= CMPXCHG64(kaddr
, old
, new);
4590 kunmap_atomic(kaddr
);
4591 kvm_release_page_dirty(page
);
4594 return X86EMUL_CMPXCHG_FAILED
;
4596 kvm_vcpu_mark_page_dirty(vcpu
, gpa
>> PAGE_SHIFT
);
4597 kvm_mmu_pte_write(vcpu
, gpa
, new, bytes
);
4599 return X86EMUL_CONTINUE
;
4602 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
4604 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
4607 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
4609 /* TODO: String I/O for in kernel device */
4612 if (vcpu
->arch
.pio
.in
)
4613 r
= kvm_io_bus_read(vcpu
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
4614 vcpu
->arch
.pio
.size
, pd
);
4616 r
= kvm_io_bus_write(vcpu
, KVM_PIO_BUS
,
4617 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
4622 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
4623 unsigned short port
, void *val
,
4624 unsigned int count
, bool in
)
4626 vcpu
->arch
.pio
.port
= port
;
4627 vcpu
->arch
.pio
.in
= in
;
4628 vcpu
->arch
.pio
.count
= count
;
4629 vcpu
->arch
.pio
.size
= size
;
4631 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
4632 vcpu
->arch
.pio
.count
= 0;
4636 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
4637 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
4638 vcpu
->run
->io
.size
= size
;
4639 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
4640 vcpu
->run
->io
.count
= count
;
4641 vcpu
->run
->io
.port
= port
;
4646 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
4647 int size
, unsigned short port
, void *val
,
4650 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4653 if (vcpu
->arch
.pio
.count
)
4656 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
4659 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
4660 trace_kvm_pio(KVM_PIO_IN
, port
, size
, count
, vcpu
->arch
.pio_data
);
4661 vcpu
->arch
.pio
.count
= 0;
4668 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
4669 int size
, unsigned short port
,
4670 const void *val
, unsigned int count
)
4672 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4674 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
4675 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, vcpu
->arch
.pio_data
);
4676 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
4679 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
4681 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
4684 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
4686 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
4689 int kvm_emulate_wbinvd_noskip(struct kvm_vcpu
*vcpu
)
4691 if (!need_emulate_wbinvd(vcpu
))
4692 return X86EMUL_CONTINUE
;
4694 if (kvm_x86_ops
->has_wbinvd_exit()) {
4695 int cpu
= get_cpu();
4697 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4698 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
4699 wbinvd_ipi
, NULL
, 1);
4701 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
4704 return X86EMUL_CONTINUE
;
4707 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4709 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
4710 return kvm_emulate_wbinvd_noskip(vcpu
);
4712 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
4716 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
4718 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt
));
4721 static int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
4722 unsigned long *dest
)
4724 return kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
4727 static int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
4728 unsigned long value
)
4731 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
4734 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
4736 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
4739 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
4741 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4742 unsigned long value
;
4746 value
= kvm_read_cr0(vcpu
);
4749 value
= vcpu
->arch
.cr2
;
4752 value
= kvm_read_cr3(vcpu
);
4755 value
= kvm_read_cr4(vcpu
);
4758 value
= kvm_get_cr8(vcpu
);
4761 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4768 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
4770 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4775 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
4778 vcpu
->arch
.cr2
= val
;
4781 res
= kvm_set_cr3(vcpu
, val
);
4784 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
4787 res
= kvm_set_cr8(vcpu
, val
);
4790 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4797 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
4799 return kvm_x86_ops
->get_cpl(emul_to_vcpu(ctxt
));
4802 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4804 kvm_x86_ops
->get_gdt(emul_to_vcpu(ctxt
), dt
);
4807 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4809 kvm_x86_ops
->get_idt(emul_to_vcpu(ctxt
), dt
);
4812 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4814 kvm_x86_ops
->set_gdt(emul_to_vcpu(ctxt
), dt
);
4817 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4819 kvm_x86_ops
->set_idt(emul_to_vcpu(ctxt
), dt
);
4822 static unsigned long emulator_get_cached_segment_base(
4823 struct x86_emulate_ctxt
*ctxt
, int seg
)
4825 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
4828 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
4829 struct desc_struct
*desc
, u32
*base3
,
4832 struct kvm_segment var
;
4834 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
4835 *selector
= var
.selector
;
4838 memset(desc
, 0, sizeof(*desc
));
4844 set_desc_limit(desc
, var
.limit
);
4845 set_desc_base(desc
, (unsigned long)var
.base
);
4846 #ifdef CONFIG_X86_64
4848 *base3
= var
.base
>> 32;
4850 desc
->type
= var
.type
;
4852 desc
->dpl
= var
.dpl
;
4853 desc
->p
= var
.present
;
4854 desc
->avl
= var
.avl
;
4862 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
4863 struct desc_struct
*desc
, u32 base3
,
4866 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4867 struct kvm_segment var
;
4869 var
.selector
= selector
;
4870 var
.base
= get_desc_base(desc
);
4871 #ifdef CONFIG_X86_64
4872 var
.base
|= ((u64
)base3
) << 32;
4874 var
.limit
= get_desc_limit(desc
);
4876 var
.limit
= (var
.limit
<< 12) | 0xfff;
4877 var
.type
= desc
->type
;
4878 var
.dpl
= desc
->dpl
;
4883 var
.avl
= desc
->avl
;
4884 var
.present
= desc
->p
;
4885 var
.unusable
= !var
.present
;
4888 kvm_set_segment(vcpu
, &var
, seg
);
4892 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
4893 u32 msr_index
, u64
*pdata
)
4895 struct msr_data msr
;
4898 msr
.index
= msr_index
;
4899 msr
.host_initiated
= false;
4900 r
= kvm_get_msr(emul_to_vcpu(ctxt
), &msr
);
4908 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
4909 u32 msr_index
, u64 data
)
4911 struct msr_data msr
;
4914 msr
.index
= msr_index
;
4915 msr
.host_initiated
= false;
4916 return kvm_set_msr(emul_to_vcpu(ctxt
), &msr
);
4919 static u64
emulator_get_smbase(struct x86_emulate_ctxt
*ctxt
)
4921 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4923 return vcpu
->arch
.smbase
;
4926 static void emulator_set_smbase(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
4928 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4930 vcpu
->arch
.smbase
= smbase
;
4933 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
4936 return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt
), pmc
);
4939 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
4940 u32 pmc
, u64
*pdata
)
4942 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
4945 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
4947 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
4950 static void emulator_get_fpu(struct x86_emulate_ctxt
*ctxt
)
4953 kvm_load_guest_fpu(emul_to_vcpu(ctxt
));
4955 * CR0.TS may reference the host fpu state, not the guest fpu state,
4956 * so it may be clear at this point.
4961 static void emulator_put_fpu(struct x86_emulate_ctxt
*ctxt
)
4966 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
4967 struct x86_instruction_info
*info
,
4968 enum x86_intercept_stage stage
)
4970 return kvm_x86_ops
->check_intercept(emul_to_vcpu(ctxt
), info
, stage
);
4973 static void emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
4974 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
)
4976 kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
);
4979 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
4981 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
4984 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
4986 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
4989 static void emulator_set_nmi_mask(struct x86_emulate_ctxt
*ctxt
, bool masked
)
4991 kvm_x86_ops
->set_nmi_mask(emul_to_vcpu(ctxt
), masked
);
4994 static const struct x86_emulate_ops emulate_ops
= {
4995 .read_gpr
= emulator_read_gpr
,
4996 .write_gpr
= emulator_write_gpr
,
4997 .read_std
= kvm_read_guest_virt_system
,
4998 .write_std
= kvm_write_guest_virt_system
,
4999 .fetch
= kvm_fetch_guest_virt
,
5000 .read_emulated
= emulator_read_emulated
,
5001 .write_emulated
= emulator_write_emulated
,
5002 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
5003 .invlpg
= emulator_invlpg
,
5004 .pio_in_emulated
= emulator_pio_in_emulated
,
5005 .pio_out_emulated
= emulator_pio_out_emulated
,
5006 .get_segment
= emulator_get_segment
,
5007 .set_segment
= emulator_set_segment
,
5008 .get_cached_segment_base
= emulator_get_cached_segment_base
,
5009 .get_gdt
= emulator_get_gdt
,
5010 .get_idt
= emulator_get_idt
,
5011 .set_gdt
= emulator_set_gdt
,
5012 .set_idt
= emulator_set_idt
,
5013 .get_cr
= emulator_get_cr
,
5014 .set_cr
= emulator_set_cr
,
5015 .cpl
= emulator_get_cpl
,
5016 .get_dr
= emulator_get_dr
,
5017 .set_dr
= emulator_set_dr
,
5018 .get_smbase
= emulator_get_smbase
,
5019 .set_smbase
= emulator_set_smbase
,
5020 .set_msr
= emulator_set_msr
,
5021 .get_msr
= emulator_get_msr
,
5022 .check_pmc
= emulator_check_pmc
,
5023 .read_pmc
= emulator_read_pmc
,
5024 .halt
= emulator_halt
,
5025 .wbinvd
= emulator_wbinvd
,
5026 .fix_hypercall
= emulator_fix_hypercall
,
5027 .get_fpu
= emulator_get_fpu
,
5028 .put_fpu
= emulator_put_fpu
,
5029 .intercept
= emulator_intercept
,
5030 .get_cpuid
= emulator_get_cpuid
,
5031 .set_nmi_mask
= emulator_set_nmi_mask
,
5034 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
5036 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
5038 * an sti; sti; sequence only disable interrupts for the first
5039 * instruction. So, if the last instruction, be it emulated or
5040 * not, left the system with the INT_STI flag enabled, it
5041 * means that the last instruction is an sti. We should not
5042 * leave the flag on in this case. The same goes for mov ss
5044 if (int_shadow
& mask
)
5046 if (unlikely(int_shadow
|| mask
)) {
5047 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
5049 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5053 static bool inject_emulated_exception(struct kvm_vcpu
*vcpu
)
5055 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5056 if (ctxt
->exception
.vector
== PF_VECTOR
)
5057 return kvm_propagate_fault(vcpu
, &ctxt
->exception
);
5059 if (ctxt
->exception
.error_code_valid
)
5060 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
5061 ctxt
->exception
.error_code
);
5063 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
5067 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
5069 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5072 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
5074 ctxt
->eflags
= kvm_get_rflags(vcpu
);
5075 ctxt
->eip
= kvm_rip_read(vcpu
);
5076 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
5077 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
5078 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
5079 cs_db
? X86EMUL_MODE_PROT32
:
5080 X86EMUL_MODE_PROT16
;
5081 BUILD_BUG_ON(HF_GUEST_MASK
!= X86EMUL_GUEST_MASK
);
5082 BUILD_BUG_ON(HF_SMM_MASK
!= X86EMUL_SMM_MASK
);
5083 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK
!= X86EMUL_SMM_INSIDE_NMI_MASK
);
5084 ctxt
->emul_flags
= vcpu
->arch
.hflags
;
5086 init_decode_cache(ctxt
);
5087 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5090 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
5092 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5095 init_emulate_ctxt(vcpu
);
5099 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
5100 ret
= emulate_int_real(ctxt
, irq
);
5102 if (ret
!= X86EMUL_CONTINUE
)
5103 return EMULATE_FAIL
;
5105 ctxt
->eip
= ctxt
->_eip
;
5106 kvm_rip_write(vcpu
, ctxt
->eip
);
5107 kvm_set_rflags(vcpu
, ctxt
->eflags
);
5109 if (irq
== NMI_VECTOR
)
5110 vcpu
->arch
.nmi_pending
= 0;
5112 vcpu
->arch
.interrupt
.pending
= false;
5114 return EMULATE_DONE
;
5116 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
5118 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
5120 int r
= EMULATE_DONE
;
5122 ++vcpu
->stat
.insn_emulation_fail
;
5123 trace_kvm_emulate_insn_failed(vcpu
);
5124 if (!is_guest_mode(vcpu
) && kvm_x86_ops
->get_cpl(vcpu
) == 0) {
5125 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
5126 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
5127 vcpu
->run
->internal
.ndata
= 0;
5130 kvm_queue_exception(vcpu
, UD_VECTOR
);
5135 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t cr2
,
5136 bool write_fault_to_shadow_pgtable
,
5142 if (emulation_type
& EMULTYPE_NO_REEXECUTE
)
5145 if (!vcpu
->arch
.mmu
.direct_map
) {
5147 * Write permission should be allowed since only
5148 * write access need to be emulated.
5150 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5153 * If the mapping is invalid in guest, let cpu retry
5154 * it to generate fault.
5156 if (gpa
== UNMAPPED_GVA
)
5161 * Do not retry the unhandleable instruction if it faults on the
5162 * readonly host memory, otherwise it will goto a infinite loop:
5163 * retry instruction -> write #PF -> emulation fail -> retry
5164 * instruction -> ...
5166 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
5169 * If the instruction failed on the error pfn, it can not be fixed,
5170 * report the error to userspace.
5172 if (is_error_noslot_pfn(pfn
))
5175 kvm_release_pfn_clean(pfn
);
5177 /* The instructions are well-emulated on direct mmu. */
5178 if (vcpu
->arch
.mmu
.direct_map
) {
5179 unsigned int indirect_shadow_pages
;
5181 spin_lock(&vcpu
->kvm
->mmu_lock
);
5182 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
5183 spin_unlock(&vcpu
->kvm
->mmu_lock
);
5185 if (indirect_shadow_pages
)
5186 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5192 * if emulation was due to access to shadowed page table
5193 * and it failed try to unshadow page and re-enter the
5194 * guest to let CPU execute the instruction.
5196 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5199 * If the access faults on its page table, it can not
5200 * be fixed by unprotecting shadow page and it should
5201 * be reported to userspace.
5203 return !write_fault_to_shadow_pgtable
;
5206 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
5207 unsigned long cr2
, int emulation_type
)
5209 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5210 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2
;
5212 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
5213 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
5216 * If the emulation is caused by #PF and it is non-page_table
5217 * writing instruction, it means the VM-EXIT is caused by shadow
5218 * page protected, we can zap the shadow page and retry this
5219 * instruction directly.
5221 * Note: if the guest uses a non-page-table modifying instruction
5222 * on the PDE that points to the instruction, then we will unmap
5223 * the instruction and go to an infinite loop. So, we cache the
5224 * last retried eip and the last fault address, if we meet the eip
5225 * and the address again, we can break out of the potential infinite
5228 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
5230 if (!(emulation_type
& EMULTYPE_RETRY
))
5233 if (x86_page_table_writing_insn(ctxt
))
5236 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2
)
5239 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
5240 vcpu
->arch
.last_retry_addr
= cr2
;
5242 if (!vcpu
->arch
.mmu
.direct_map
)
5243 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5245 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5250 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
5251 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
5253 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
)
5255 if (!(vcpu
->arch
.hflags
& HF_SMM_MASK
)) {
5256 /* This is a good place to trace that we are exiting SMM. */
5257 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, false);
5259 if (unlikely(vcpu
->arch
.smi_pending
)) {
5260 kvm_make_request(KVM_REQ_SMI
, vcpu
);
5261 vcpu
->arch
.smi_pending
= 0;
5263 /* Process a latched INIT, if any. */
5264 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5268 kvm_mmu_reset_context(vcpu
);
5271 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
)
5273 unsigned changed
= vcpu
->arch
.hflags
^ emul_flags
;
5275 vcpu
->arch
.hflags
= emul_flags
;
5277 if (changed
& HF_SMM_MASK
)
5278 kvm_smm_changed(vcpu
);
5281 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
5290 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
5291 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
5296 static void kvm_vcpu_check_singlestep(struct kvm_vcpu
*vcpu
, unsigned long rflags
, int *r
)
5298 struct kvm_run
*kvm_run
= vcpu
->run
;
5301 * rflags is the old, "raw" value of the flags. The new value has
5302 * not been saved yet.
5304 * This is correct even for TF set by the guest, because "the
5305 * processor will not generate this exception after the instruction
5306 * that sets the TF flag".
5308 if (unlikely(rflags
& X86_EFLAGS_TF
)) {
5309 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
5310 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_FIXED_1
|
5312 kvm_run
->debug
.arch
.pc
= vcpu
->arch
.singlestep_rip
;
5313 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5314 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5315 *r
= EMULATE_USER_EXIT
;
5317 vcpu
->arch
.emulate_ctxt
.eflags
&= ~X86_EFLAGS_TF
;
5319 * "Certain debug exceptions may clear bit 0-3. The
5320 * remaining contents of the DR6 register are never
5321 * cleared by the processor".
5323 vcpu
->arch
.dr6
&= ~15;
5324 vcpu
->arch
.dr6
|= DR6_BS
| DR6_RTM
;
5325 kvm_queue_exception(vcpu
, DB_VECTOR
);
5330 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
5332 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
5333 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
5334 struct kvm_run
*kvm_run
= vcpu
->run
;
5335 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5336 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5337 vcpu
->arch
.guest_debug_dr7
,
5341 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_FIXED_1
| DR6_RTM
;
5342 kvm_run
->debug
.arch
.pc
= eip
;
5343 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5344 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5345 *r
= EMULATE_USER_EXIT
;
5350 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
5351 !(kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)) {
5352 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5353 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5358 vcpu
->arch
.dr6
&= ~15;
5359 vcpu
->arch
.dr6
|= dr6
| DR6_RTM
;
5360 kvm_queue_exception(vcpu
, DB_VECTOR
);
5369 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
5376 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5377 bool writeback
= true;
5378 bool write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
5381 * Clear write_fault_to_shadow_pgtable here to ensure it is
5384 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
5385 kvm_clear_exception_queue(vcpu
);
5387 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
5388 init_emulate_ctxt(vcpu
);
5391 * We will reenter on the same instruction since
5392 * we do not set complete_userspace_io. This does not
5393 * handle watchpoints yet, those would be handled in
5396 if (kvm_vcpu_check_breakpoint(vcpu
, &r
))
5399 ctxt
->interruptibility
= 0;
5400 ctxt
->have_exception
= false;
5401 ctxt
->exception
.vector
= -1;
5402 ctxt
->perm_ok
= false;
5404 ctxt
->ud
= emulation_type
& EMULTYPE_TRAP_UD
;
5406 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
5408 trace_kvm_emulate_insn_start(vcpu
);
5409 ++vcpu
->stat
.insn_emulation
;
5410 if (r
!= EMULATION_OK
) {
5411 if (emulation_type
& EMULTYPE_TRAP_UD
)
5412 return EMULATE_FAIL
;
5413 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5415 return EMULATE_DONE
;
5416 if (emulation_type
& EMULTYPE_SKIP
)
5417 return EMULATE_FAIL
;
5418 return handle_emulation_failure(vcpu
);
5422 if (emulation_type
& EMULTYPE_SKIP
) {
5423 kvm_rip_write(vcpu
, ctxt
->_eip
);
5424 if (ctxt
->eflags
& X86_EFLAGS_RF
)
5425 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
5426 return EMULATE_DONE
;
5429 if (retry_instruction(ctxt
, cr2
, emulation_type
))
5430 return EMULATE_DONE
;
5432 /* this is needed for vmware backdoor interface to work since it
5433 changes registers values during IO operation */
5434 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
5435 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5436 emulator_invalidate_register_cache(ctxt
);
5440 r
= x86_emulate_insn(ctxt
);
5442 if (r
== EMULATION_INTERCEPTED
)
5443 return EMULATE_DONE
;
5445 if (r
== EMULATION_FAILED
) {
5446 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5448 return EMULATE_DONE
;
5450 return handle_emulation_failure(vcpu
);
5453 if (ctxt
->have_exception
) {
5455 if (inject_emulated_exception(vcpu
))
5457 } else if (vcpu
->arch
.pio
.count
) {
5458 if (!vcpu
->arch
.pio
.in
) {
5459 /* FIXME: return into emulator if single-stepping. */
5460 vcpu
->arch
.pio
.count
= 0;
5463 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
5465 r
= EMULATE_USER_EXIT
;
5466 } else if (vcpu
->mmio_needed
) {
5467 if (!vcpu
->mmio_is_write
)
5469 r
= EMULATE_USER_EXIT
;
5470 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
5471 } else if (r
== EMULATION_RESTART
)
5477 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5478 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
5479 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5480 if (vcpu
->arch
.hflags
!= ctxt
->emul_flags
)
5481 kvm_set_hflags(vcpu
, ctxt
->emul_flags
);
5482 kvm_rip_write(vcpu
, ctxt
->eip
);
5483 if (r
== EMULATE_DONE
)
5484 kvm_vcpu_check_singlestep(vcpu
, rflags
, &r
);
5485 if (!ctxt
->have_exception
||
5486 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
)
5487 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
5490 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5491 * do nothing, and it will be requested again as soon as
5492 * the shadow expires. But we still need to check here,
5493 * because POPF has no interrupt shadow.
5495 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
5496 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5498 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
5502 EXPORT_SYMBOL_GPL(x86_emulate_instruction
);
5504 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5506 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5507 int ret
= emulator_pio_out_emulated(&vcpu
->arch
.emulate_ctxt
,
5508 size
, port
, &val
, 1);
5509 /* do not return to emulator after return from userspace */
5510 vcpu
->arch
.pio
.count
= 0;
5513 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
5515 static void tsc_bad(void *info
)
5517 __this_cpu_write(cpu_tsc_khz
, 0);
5520 static void tsc_khz_changed(void *data
)
5522 struct cpufreq_freqs
*freq
= data
;
5523 unsigned long khz
= 0;
5527 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5528 khz
= cpufreq_quick_get(raw_smp_processor_id());
5531 __this_cpu_write(cpu_tsc_khz
, khz
);
5534 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
5537 struct cpufreq_freqs
*freq
= data
;
5539 struct kvm_vcpu
*vcpu
;
5540 int i
, send_ipi
= 0;
5543 * We allow guests to temporarily run on slowing clocks,
5544 * provided we notify them after, or to run on accelerating
5545 * clocks, provided we notify them before. Thus time never
5548 * However, we have a problem. We can't atomically update
5549 * the frequency of a given CPU from this function; it is
5550 * merely a notifier, which can be called from any CPU.
5551 * Changing the TSC frequency at arbitrary points in time
5552 * requires a recomputation of local variables related to
5553 * the TSC for each VCPU. We must flag these local variables
5554 * to be updated and be sure the update takes place with the
5555 * new frequency before any guests proceed.
5557 * Unfortunately, the combination of hotplug CPU and frequency
5558 * change creates an intractable locking scenario; the order
5559 * of when these callouts happen is undefined with respect to
5560 * CPU hotplug, and they can race with each other. As such,
5561 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5562 * undefined; you can actually have a CPU frequency change take
5563 * place in between the computation of X and the setting of the
5564 * variable. To protect against this problem, all updates of
5565 * the per_cpu tsc_khz variable are done in an interrupt
5566 * protected IPI, and all callers wishing to update the value
5567 * must wait for a synchronous IPI to complete (which is trivial
5568 * if the caller is on the CPU already). This establishes the
5569 * necessary total order on variable updates.
5571 * Note that because a guest time update may take place
5572 * anytime after the setting of the VCPU's request bit, the
5573 * correct TSC value must be set before the request. However,
5574 * to ensure the update actually makes it to any guest which
5575 * starts running in hardware virtualization between the set
5576 * and the acquisition of the spinlock, we must also ping the
5577 * CPU after setting the request bit.
5581 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
5583 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
5586 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5588 spin_lock(&kvm_lock
);
5589 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
5590 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
5591 if (vcpu
->cpu
!= freq
->cpu
)
5593 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
5594 if (vcpu
->cpu
!= smp_processor_id())
5598 spin_unlock(&kvm_lock
);
5600 if (freq
->old
< freq
->new && send_ipi
) {
5602 * We upscale the frequency. Must make the guest
5603 * doesn't see old kvmclock values while running with
5604 * the new frequency, otherwise we risk the guest sees
5605 * time go backwards.
5607 * In case we update the frequency for another cpu
5608 * (which might be in guest context) send an interrupt
5609 * to kick the cpu out of guest context. Next time
5610 * guest context is entered kvmclock will be updated,
5611 * so the guest will not see stale values.
5613 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5618 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
5619 .notifier_call
= kvmclock_cpufreq_notifier
5622 static int kvmclock_cpu_notifier(struct notifier_block
*nfb
,
5623 unsigned long action
, void *hcpu
)
5625 unsigned int cpu
= (unsigned long)hcpu
;
5629 case CPU_DOWN_FAILED
:
5630 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
5632 case CPU_DOWN_PREPARE
:
5633 smp_call_function_single(cpu
, tsc_bad
, NULL
, 1);
5639 static struct notifier_block kvmclock_cpu_notifier_block
= {
5640 .notifier_call
= kvmclock_cpu_notifier
,
5641 .priority
= -INT_MAX
5644 static void kvm_timer_init(void)
5648 max_tsc_khz
= tsc_khz
;
5650 cpu_notifier_register_begin();
5651 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
5652 #ifdef CONFIG_CPU_FREQ
5653 struct cpufreq_policy policy
;
5654 memset(&policy
, 0, sizeof(policy
));
5656 cpufreq_get_policy(&policy
, cpu
);
5657 if (policy
.cpuinfo
.max_freq
)
5658 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
5661 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
5662 CPUFREQ_TRANSITION_NOTIFIER
);
5664 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
5665 for_each_online_cpu(cpu
)
5666 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
5668 __register_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
5669 cpu_notifier_register_done();
5673 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
5675 int kvm_is_in_guest(void)
5677 return __this_cpu_read(current_vcpu
) != NULL
;
5680 static int kvm_is_user_mode(void)
5684 if (__this_cpu_read(current_vcpu
))
5685 user_mode
= kvm_x86_ops
->get_cpl(__this_cpu_read(current_vcpu
));
5687 return user_mode
!= 0;
5690 static unsigned long kvm_get_guest_ip(void)
5692 unsigned long ip
= 0;
5694 if (__this_cpu_read(current_vcpu
))
5695 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
5700 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
5701 .is_in_guest
= kvm_is_in_guest
,
5702 .is_user_mode
= kvm_is_user_mode
,
5703 .get_guest_ip
= kvm_get_guest_ip
,
5706 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
5708 __this_cpu_write(current_vcpu
, vcpu
);
5710 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
5712 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
5714 __this_cpu_write(current_vcpu
, NULL
);
5716 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
5718 static void kvm_set_mmio_spte_mask(void)
5721 int maxphyaddr
= boot_cpu_data
.x86_phys_bits
;
5724 * Set the reserved bits and the present bit of an paging-structure
5725 * entry to generate page fault with PFER.RSV = 1.
5727 /* Mask the reserved physical address bits. */
5728 mask
= rsvd_bits(maxphyaddr
, 51);
5730 /* Bit 62 is always reserved for 32bit host. */
5731 mask
|= 0x3ull
<< 62;
5733 /* Set the present bit. */
5736 #ifdef CONFIG_X86_64
5738 * If reserved bit is not supported, clear the present bit to disable
5741 if (maxphyaddr
== 52)
5745 kvm_mmu_set_mmio_spte_mask(mask
);
5748 #ifdef CONFIG_X86_64
5749 static void pvclock_gtod_update_fn(struct work_struct
*work
)
5753 struct kvm_vcpu
*vcpu
;
5756 spin_lock(&kvm_lock
);
5757 list_for_each_entry(kvm
, &vm_list
, vm_list
)
5758 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5759 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
5760 atomic_set(&kvm_guest_has_master_clock
, 0);
5761 spin_unlock(&kvm_lock
);
5764 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
5767 * Notification about pvclock gtod data update.
5769 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
5772 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
5773 struct timekeeper
*tk
= priv
;
5775 update_pvclock_gtod(tk
);
5777 /* disable master clock if host does not trust, or does not
5778 * use, TSC clocksource
5780 if (gtod
->clock
.vclock_mode
!= VCLOCK_TSC
&&
5781 atomic_read(&kvm_guest_has_master_clock
) != 0)
5782 queue_work(system_long_wq
, &pvclock_gtod_work
);
5787 static struct notifier_block pvclock_gtod_notifier
= {
5788 .notifier_call
= pvclock_gtod_notify
,
5792 int kvm_arch_init(void *opaque
)
5795 struct kvm_x86_ops
*ops
= opaque
;
5798 printk(KERN_ERR
"kvm: already loaded the other module\n");
5803 if (!ops
->cpu_has_kvm_support()) {
5804 printk(KERN_ERR
"kvm: no hardware support\n");
5808 if (ops
->disabled_by_bios()) {
5809 printk(KERN_ERR
"kvm: disabled by bios\n");
5815 shared_msrs
= alloc_percpu(struct kvm_shared_msrs
);
5817 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_shared_msrs\n");
5821 r
= kvm_mmu_module_init();
5823 goto out_free_percpu
;
5825 kvm_set_mmio_spte_mask();
5829 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
5830 PT_DIRTY_MASK
, PT64_NX_MASK
, 0);
5834 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
5837 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
5840 #ifdef CONFIG_X86_64
5841 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
5847 free_percpu(shared_msrs
);
5852 void kvm_arch_exit(void)
5854 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
5856 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5857 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
5858 CPUFREQ_TRANSITION_NOTIFIER
);
5859 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
5860 #ifdef CONFIG_X86_64
5861 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
5864 kvm_mmu_module_exit();
5865 free_percpu(shared_msrs
);
5868 int kvm_vcpu_halt(struct kvm_vcpu
*vcpu
)
5870 ++vcpu
->stat
.halt_exits
;
5871 if (irqchip_in_kernel(vcpu
->kvm
)) {
5872 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
5875 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
5879 EXPORT_SYMBOL_GPL(kvm_vcpu_halt
);
5881 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
5883 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
5884 return kvm_vcpu_halt(vcpu
);
5886 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
5888 int kvm_hv_hypercall(struct kvm_vcpu
*vcpu
)
5890 u64 param
, ingpa
, outgpa
, ret
;
5891 uint16_t code
, rep_idx
, rep_cnt
, res
= HV_STATUS_SUCCESS
, rep_done
= 0;
5892 bool fast
, longmode
;
5895 * hypercall generates UD from non zero cpl and real mode
5898 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 || !is_protmode(vcpu
)) {
5899 kvm_queue_exception(vcpu
, UD_VECTOR
);
5903 longmode
= is_64_bit_mode(vcpu
);
5906 param
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDX
) << 32) |
5907 (kvm_register_read(vcpu
, VCPU_REGS_RAX
) & 0xffffffff);
5908 ingpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RBX
) << 32) |
5909 (kvm_register_read(vcpu
, VCPU_REGS_RCX
) & 0xffffffff);
5910 outgpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDI
) << 32) |
5911 (kvm_register_read(vcpu
, VCPU_REGS_RSI
) & 0xffffffff);
5913 #ifdef CONFIG_X86_64
5915 param
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5916 ingpa
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5917 outgpa
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
5921 code
= param
& 0xffff;
5922 fast
= (param
>> 16) & 0x1;
5923 rep_cnt
= (param
>> 32) & 0xfff;
5924 rep_idx
= (param
>> 48) & 0xfff;
5926 trace_kvm_hv_hypercall(code
, fast
, rep_cnt
, rep_idx
, ingpa
, outgpa
);
5929 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT
:
5930 kvm_vcpu_on_spin(vcpu
);
5933 res
= HV_STATUS_INVALID_HYPERCALL_CODE
;
5937 ret
= res
| (((u64
)rep_done
& 0xfff) << 32);
5939 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
5941 kvm_register_write(vcpu
, VCPU_REGS_RDX
, ret
>> 32);
5942 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
& 0xffffffff);
5949 * kvm_pv_kick_cpu_op: Kick a vcpu.
5951 * @apicid - apicid of vcpu to be kicked.
5953 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
5955 struct kvm_lapic_irq lapic_irq
;
5957 lapic_irq
.shorthand
= 0;
5958 lapic_irq
.dest_mode
= 0;
5959 lapic_irq
.dest_id
= apicid
;
5960 lapic_irq
.msi_redir_hint
= false;
5962 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
5963 kvm_irq_delivery_to_apic(kvm
, NULL
, &lapic_irq
, NULL
);
5966 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
5968 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
5969 int op_64_bit
, r
= 1;
5971 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
5973 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
5974 return kvm_hv_hypercall(vcpu
);
5976 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5977 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
5978 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5979 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5980 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
5982 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
5984 op_64_bit
= is_64_bit_mode(vcpu
);
5993 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
5999 case KVM_HC_VAPIC_POLL_IRQ
:
6002 case KVM_HC_KICK_CPU
:
6003 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
6013 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
6014 ++vcpu
->stat
.hypercalls
;
6017 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
6019 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
6021 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6022 char instruction
[3];
6023 unsigned long rip
= kvm_rip_read(vcpu
);
6025 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
6027 return emulator_write_emulated(ctxt
, rip
, instruction
, 3, NULL
);
6031 * Check if userspace requested an interrupt window, and that the
6032 * interrupt window is open.
6034 * No need to exit to userspace if we already have an interrupt queued.
6036 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
6038 return (!irqchip_in_kernel(vcpu
->kvm
) && !kvm_cpu_has_interrupt(vcpu
) &&
6039 vcpu
->run
->request_interrupt_window
&&
6040 kvm_arch_interrupt_allowed(vcpu
));
6043 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
6045 struct kvm_run
*kvm_run
= vcpu
->run
;
6047 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
6048 kvm_run
->flags
= is_smm(vcpu
) ? KVM_RUN_X86_SMM
: 0;
6049 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
6050 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
6051 if (irqchip_in_kernel(vcpu
->kvm
))
6052 kvm_run
->ready_for_interrupt_injection
= 1;
6054 kvm_run
->ready_for_interrupt_injection
=
6055 kvm_arch_interrupt_allowed(vcpu
) &&
6056 !kvm_cpu_has_interrupt(vcpu
) &&
6057 !kvm_event_needs_reinjection(vcpu
);
6060 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
6064 if (!kvm_x86_ops
->update_cr8_intercept
)
6067 if (!vcpu
->arch
.apic
)
6070 if (!vcpu
->arch
.apic
->vapic_addr
)
6071 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
6078 tpr
= kvm_lapic_get_cr8(vcpu
);
6080 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
6083 static int inject_pending_event(struct kvm_vcpu
*vcpu
, bool req_int_win
)
6087 /* try to reinject previous events if any */
6088 if (vcpu
->arch
.exception
.pending
) {
6089 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
6090 vcpu
->arch
.exception
.has_error_code
,
6091 vcpu
->arch
.exception
.error_code
);
6093 if (exception_type(vcpu
->arch
.exception
.nr
) == EXCPT_FAULT
)
6094 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
6097 if (vcpu
->arch
.exception
.nr
== DB_VECTOR
&&
6098 (vcpu
->arch
.dr7
& DR7_GD
)) {
6099 vcpu
->arch
.dr7
&= ~DR7_GD
;
6100 kvm_update_dr7(vcpu
);
6103 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
6104 vcpu
->arch
.exception
.has_error_code
,
6105 vcpu
->arch
.exception
.error_code
,
6106 vcpu
->arch
.exception
.reinject
);
6110 if (vcpu
->arch
.nmi_injected
) {
6111 kvm_x86_ops
->set_nmi(vcpu
);
6115 if (vcpu
->arch
.interrupt
.pending
) {
6116 kvm_x86_ops
->set_irq(vcpu
);
6120 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6121 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6126 /* try to inject new event if pending */
6127 if (vcpu
->arch
.nmi_pending
) {
6128 if (kvm_x86_ops
->nmi_allowed(vcpu
)) {
6129 --vcpu
->arch
.nmi_pending
;
6130 vcpu
->arch
.nmi_injected
= true;
6131 kvm_x86_ops
->set_nmi(vcpu
);
6133 } else if (kvm_cpu_has_injectable_intr(vcpu
)) {
6135 * Because interrupts can be injected asynchronously, we are
6136 * calling check_nested_events again here to avoid a race condition.
6137 * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6138 * proposal and current concerns. Perhaps we should be setting
6139 * KVM_REQ_EVENT only on certain events and not unconditionally?
6141 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6142 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6146 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
6147 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
6149 kvm_x86_ops
->set_irq(vcpu
);
6155 static void process_nmi(struct kvm_vcpu
*vcpu
)
6160 * x86 is limited to one NMI running, and one NMI pending after it.
6161 * If an NMI is already in progress, limit further NMIs to just one.
6162 * Otherwise, allow two (and we'll inject the first one immediately).
6164 if (kvm_x86_ops
->get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
6167 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
6168 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
6169 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6172 #define put_smstate(type, buf, offset, val) \
6173 *(type *)((buf) + (offset) - 0x7e00) = val
6175 static u32
process_smi_get_segment_flags(struct kvm_segment
*seg
)
6178 flags
|= seg
->g
<< 23;
6179 flags
|= seg
->db
<< 22;
6180 flags
|= seg
->l
<< 21;
6181 flags
|= seg
->avl
<< 20;
6182 flags
|= seg
->present
<< 15;
6183 flags
|= seg
->dpl
<< 13;
6184 flags
|= seg
->s
<< 12;
6185 flags
|= seg
->type
<< 8;
6189 static void process_smi_save_seg_32(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6191 struct kvm_segment seg
;
6194 kvm_get_segment(vcpu
, &seg
, n
);
6195 put_smstate(u32
, buf
, 0x7fa8 + n
* 4, seg
.selector
);
6198 offset
= 0x7f84 + n
* 12;
6200 offset
= 0x7f2c + (n
- 3) * 12;
6202 put_smstate(u32
, buf
, offset
+ 8, seg
.base
);
6203 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6204 put_smstate(u32
, buf
, offset
, process_smi_get_segment_flags(&seg
));
6207 static void process_smi_save_seg_64(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6209 struct kvm_segment seg
;
6213 kvm_get_segment(vcpu
, &seg
, n
);
6214 offset
= 0x7e00 + n
* 16;
6216 flags
= process_smi_get_segment_flags(&seg
) >> 8;
6217 put_smstate(u16
, buf
, offset
, seg
.selector
);
6218 put_smstate(u16
, buf
, offset
+ 2, flags
);
6219 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6220 put_smstate(u64
, buf
, offset
+ 8, seg
.base
);
6223 static void process_smi_save_state_32(struct kvm_vcpu
*vcpu
, char *buf
)
6226 struct kvm_segment seg
;
6230 put_smstate(u32
, buf
, 0x7ffc, kvm_read_cr0(vcpu
));
6231 put_smstate(u32
, buf
, 0x7ff8, kvm_read_cr3(vcpu
));
6232 put_smstate(u32
, buf
, 0x7ff4, kvm_get_rflags(vcpu
));
6233 put_smstate(u32
, buf
, 0x7ff0, kvm_rip_read(vcpu
));
6235 for (i
= 0; i
< 8; i
++)
6236 put_smstate(u32
, buf
, 0x7fd0 + i
* 4, kvm_register_read(vcpu
, i
));
6238 kvm_get_dr(vcpu
, 6, &val
);
6239 put_smstate(u32
, buf
, 0x7fcc, (u32
)val
);
6240 kvm_get_dr(vcpu
, 7, &val
);
6241 put_smstate(u32
, buf
, 0x7fc8, (u32
)val
);
6243 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6244 put_smstate(u32
, buf
, 0x7fc4, seg
.selector
);
6245 put_smstate(u32
, buf
, 0x7f64, seg
.base
);
6246 put_smstate(u32
, buf
, 0x7f60, seg
.limit
);
6247 put_smstate(u32
, buf
, 0x7f5c, process_smi_get_segment_flags(&seg
));
6249 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6250 put_smstate(u32
, buf
, 0x7fc0, seg
.selector
);
6251 put_smstate(u32
, buf
, 0x7f80, seg
.base
);
6252 put_smstate(u32
, buf
, 0x7f7c, seg
.limit
);
6253 put_smstate(u32
, buf
, 0x7f78, process_smi_get_segment_flags(&seg
));
6255 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6256 put_smstate(u32
, buf
, 0x7f74, dt
.address
);
6257 put_smstate(u32
, buf
, 0x7f70, dt
.size
);
6259 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6260 put_smstate(u32
, buf
, 0x7f58, dt
.address
);
6261 put_smstate(u32
, buf
, 0x7f54, dt
.size
);
6263 for (i
= 0; i
< 6; i
++)
6264 process_smi_save_seg_32(vcpu
, buf
, i
);
6266 put_smstate(u32
, buf
, 0x7f14, kvm_read_cr4(vcpu
));
6269 put_smstate(u32
, buf
, 0x7efc, 0x00020000);
6270 put_smstate(u32
, buf
, 0x7ef8, vcpu
->arch
.smbase
);
6273 static void process_smi_save_state_64(struct kvm_vcpu
*vcpu
, char *buf
)
6275 #ifdef CONFIG_X86_64
6277 struct kvm_segment seg
;
6281 for (i
= 0; i
< 16; i
++)
6282 put_smstate(u64
, buf
, 0x7ff8 - i
* 8, kvm_register_read(vcpu
, i
));
6284 put_smstate(u64
, buf
, 0x7f78, kvm_rip_read(vcpu
));
6285 put_smstate(u32
, buf
, 0x7f70, kvm_get_rflags(vcpu
));
6287 kvm_get_dr(vcpu
, 6, &val
);
6288 put_smstate(u64
, buf
, 0x7f68, val
);
6289 kvm_get_dr(vcpu
, 7, &val
);
6290 put_smstate(u64
, buf
, 0x7f60, val
);
6292 put_smstate(u64
, buf
, 0x7f58, kvm_read_cr0(vcpu
));
6293 put_smstate(u64
, buf
, 0x7f50, kvm_read_cr3(vcpu
));
6294 put_smstate(u64
, buf
, 0x7f48, kvm_read_cr4(vcpu
));
6296 put_smstate(u32
, buf
, 0x7f00, vcpu
->arch
.smbase
);
6299 put_smstate(u32
, buf
, 0x7efc, 0x00020064);
6301 put_smstate(u64
, buf
, 0x7ed0, vcpu
->arch
.efer
);
6303 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6304 put_smstate(u16
, buf
, 0x7e90, seg
.selector
);
6305 put_smstate(u16
, buf
, 0x7e92, process_smi_get_segment_flags(&seg
) >> 8);
6306 put_smstate(u32
, buf
, 0x7e94, seg
.limit
);
6307 put_smstate(u64
, buf
, 0x7e98, seg
.base
);
6309 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6310 put_smstate(u32
, buf
, 0x7e84, dt
.size
);
6311 put_smstate(u64
, buf
, 0x7e88, dt
.address
);
6313 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6314 put_smstate(u16
, buf
, 0x7e70, seg
.selector
);
6315 put_smstate(u16
, buf
, 0x7e72, process_smi_get_segment_flags(&seg
) >> 8);
6316 put_smstate(u32
, buf
, 0x7e74, seg
.limit
);
6317 put_smstate(u64
, buf
, 0x7e78, seg
.base
);
6319 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6320 put_smstate(u32
, buf
, 0x7e64, dt
.size
);
6321 put_smstate(u64
, buf
, 0x7e68, dt
.address
);
6323 for (i
= 0; i
< 6; i
++)
6324 process_smi_save_seg_64(vcpu
, buf
, i
);
6330 static void process_smi(struct kvm_vcpu
*vcpu
)
6332 struct kvm_segment cs
, ds
;
6337 vcpu
->arch
.smi_pending
= true;
6341 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, true);
6342 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
6343 memset(buf
, 0, 512);
6344 if (guest_cpuid_has_longmode(vcpu
))
6345 process_smi_save_state_64(vcpu
, buf
);
6347 process_smi_save_state_32(vcpu
, buf
);
6349 kvm_vcpu_write_guest(vcpu
, vcpu
->arch
.smbase
+ 0xfe00, buf
, sizeof(buf
));
6351 if (kvm_x86_ops
->get_nmi_mask(vcpu
))
6352 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
6354 kvm_x86_ops
->set_nmi_mask(vcpu
, true);
6356 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
6357 kvm_rip_write(vcpu
, 0x8000);
6359 cr0
= vcpu
->arch
.cr0
& ~(X86_CR0_PE
| X86_CR0_EM
| X86_CR0_TS
| X86_CR0_PG
);
6360 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
6361 vcpu
->arch
.cr0
= cr0
;
6363 kvm_x86_ops
->set_cr4(vcpu
, 0);
6365 __kvm_set_dr(vcpu
, 7, DR7_FIXED_1
);
6367 cs
.selector
= (vcpu
->arch
.smbase
>> 4) & 0xffff;
6368 cs
.base
= vcpu
->arch
.smbase
;
6373 cs
.limit
= ds
.limit
= 0xffffffff;
6374 cs
.type
= ds
.type
= 0x3;
6375 cs
.dpl
= ds
.dpl
= 0;
6380 cs
.avl
= ds
.avl
= 0;
6381 cs
.present
= ds
.present
= 1;
6382 cs
.unusable
= ds
.unusable
= 0;
6383 cs
.padding
= ds
.padding
= 0;
6385 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6386 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_DS
);
6387 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_ES
);
6388 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_FS
);
6389 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_GS
);
6390 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_SS
);
6392 if (guest_cpuid_has_longmode(vcpu
))
6393 kvm_x86_ops
->set_efer(vcpu
, 0);
6395 kvm_update_cpuid(vcpu
);
6396 kvm_mmu_reset_context(vcpu
);
6399 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
6401 u64 eoi_exit_bitmap
[4];
6404 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
6407 memset(eoi_exit_bitmap
, 0, 32);
6410 kvm_ioapic_scan_entry(vcpu
, eoi_exit_bitmap
, tmr
);
6411 kvm_x86_ops
->load_eoi_exitmap(vcpu
, eoi_exit_bitmap
);
6412 kvm_apic_update_tmr(vcpu
, tmr
);
6415 static void kvm_vcpu_flush_tlb(struct kvm_vcpu
*vcpu
)
6417 ++vcpu
->stat
.tlb_flush
;
6418 kvm_x86_ops
->tlb_flush(vcpu
);
6421 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
6423 struct page
*page
= NULL
;
6425 if (!irqchip_in_kernel(vcpu
->kvm
))
6428 if (!kvm_x86_ops
->set_apic_access_page_addr
)
6431 page
= gfn_to_page(vcpu
->kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
6432 if (is_error_page(page
))
6434 kvm_x86_ops
->set_apic_access_page_addr(vcpu
, page_to_phys(page
));
6437 * Do not pin apic access page in memory, the MMU notifier
6438 * will call us again if it is migrated or swapped out.
6442 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page
);
6444 void kvm_arch_mmu_notifier_invalidate_page(struct kvm
*kvm
,
6445 unsigned long address
)
6448 * The physical address of apic access page is stored in the VMCS.
6449 * Update it when it becomes invalid.
6451 if (address
== gfn_to_hva(kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
))
6452 kvm_make_all_cpus_request(kvm
, KVM_REQ_APIC_PAGE_RELOAD
);
6456 * Returns 1 to let vcpu_run() continue the guest execution loop without
6457 * exiting to the userspace. Otherwise, the value will be returned to the
6460 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
6463 bool req_int_win
= !irqchip_in_kernel(vcpu
->kvm
) &&
6464 vcpu
->run
->request_interrupt_window
;
6465 bool req_immediate_exit
= false;
6467 if (vcpu
->requests
) {
6468 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
6469 kvm_mmu_unload(vcpu
);
6470 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
6471 __kvm_migrate_timers(vcpu
);
6472 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
6473 kvm_gen_update_masterclock(vcpu
->kvm
);
6474 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
6475 kvm_gen_kvmclock_update(vcpu
);
6476 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
6477 r
= kvm_guest_time_update(vcpu
);
6481 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
6482 kvm_mmu_sync_roots(vcpu
);
6483 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
6484 kvm_vcpu_flush_tlb(vcpu
);
6485 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
6486 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
6490 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
6491 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
6495 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
)) {
6496 vcpu
->fpu_active
= 0;
6497 kvm_x86_ops
->fpu_deactivate(vcpu
);
6499 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
6500 /* Page is swapped out. Do synthetic halt */
6501 vcpu
->arch
.apf
.halted
= true;
6505 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
6506 record_steal_time(vcpu
);
6507 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
6509 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
6511 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
6512 kvm_pmu_handle_event(vcpu
);
6513 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
6514 kvm_pmu_deliver_pmi(vcpu
);
6515 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
6516 vcpu_scan_ioapic(vcpu
);
6517 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
6518 kvm_vcpu_reload_apic_access_page(vcpu
);
6521 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
6522 kvm_apic_accept_events(vcpu
);
6523 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
6528 if (inject_pending_event(vcpu
, req_int_win
) != 0)
6529 req_immediate_exit
= true;
6530 /* enable NMI/IRQ window open exits if needed */
6531 else if (vcpu
->arch
.nmi_pending
)
6532 kvm_x86_ops
->enable_nmi_window(vcpu
);
6533 else if (kvm_cpu_has_injectable_intr(vcpu
) || req_int_win
)
6534 kvm_x86_ops
->enable_irq_window(vcpu
);
6536 if (kvm_lapic_enabled(vcpu
)) {
6538 * Update architecture specific hints for APIC
6539 * virtual interrupt delivery.
6541 if (kvm_x86_ops
->hwapic_irr_update
)
6542 kvm_x86_ops
->hwapic_irr_update(vcpu
,
6543 kvm_lapic_find_highest_irr(vcpu
));
6544 update_cr8_intercept(vcpu
);
6545 kvm_lapic_sync_to_vapic(vcpu
);
6549 r
= kvm_mmu_reload(vcpu
);
6551 goto cancel_injection
;
6556 kvm_x86_ops
->prepare_guest_switch(vcpu
);
6557 if (vcpu
->fpu_active
)
6558 kvm_load_guest_fpu(vcpu
);
6559 kvm_load_guest_xcr0(vcpu
);
6561 vcpu
->mode
= IN_GUEST_MODE
;
6563 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6565 /* We should set ->mode before check ->requests,
6566 * see the comment in make_all_cpus_request.
6568 smp_mb__after_srcu_read_unlock();
6570 local_irq_disable();
6572 if (vcpu
->mode
== EXITING_GUEST_MODE
|| vcpu
->requests
6573 || need_resched() || signal_pending(current
)) {
6574 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6578 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6580 goto cancel_injection
;
6583 if (req_immediate_exit
)
6584 smp_send_reschedule(vcpu
->cpu
);
6586 __kvm_guest_enter();
6588 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
6590 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
6591 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
6592 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
6593 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
6594 set_debugreg(vcpu
->arch
.dr6
, 6);
6595 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
6598 trace_kvm_entry(vcpu
->vcpu_id
);
6599 wait_lapic_expire(vcpu
);
6600 kvm_x86_ops
->run(vcpu
);
6603 * Do this here before restoring debug registers on the host. And
6604 * since we do this before handling the vmexit, a DR access vmexit
6605 * can (a) read the correct value of the debug registers, (b) set
6606 * KVM_DEBUGREG_WONT_EXIT again.
6608 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
6611 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
6612 kvm_x86_ops
->sync_dirty_debug_regs(vcpu
);
6613 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
6614 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
6618 * If the guest has used debug registers, at least dr7
6619 * will be disabled while returning to the host.
6620 * If we don't have active breakpoints in the host, we don't
6621 * care about the messed up debug address registers. But if
6622 * we have some of them active, restore the old state.
6624 if (hw_breakpoint_active())
6625 hw_breakpoint_restore();
6627 vcpu
->arch
.last_guest_tsc
= kvm_x86_ops
->read_l1_tsc(vcpu
,
6630 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6633 /* Interrupt is enabled by handle_external_intr() */
6634 kvm_x86_ops
->handle_external_intr(vcpu
);
6639 * We must have an instruction between local_irq_enable() and
6640 * kvm_guest_exit(), so the timer interrupt isn't delayed by
6641 * the interrupt shadow. The stat.exits increment will do nicely.
6642 * But we need to prevent reordering, hence this barrier():
6650 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6653 * Profile KVM exit RIPs:
6655 if (unlikely(prof_on
== KVM_PROFILING
)) {
6656 unsigned long rip
= kvm_rip_read(vcpu
);
6657 profile_hit(KVM_PROFILING
, (void *)rip
);
6660 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
6661 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
6663 if (vcpu
->arch
.apic_attention
)
6664 kvm_lapic_sync_from_vapic(vcpu
);
6666 r
= kvm_x86_ops
->handle_exit(vcpu
);
6670 kvm_x86_ops
->cancel_injection(vcpu
);
6671 if (unlikely(vcpu
->arch
.apic_attention
))
6672 kvm_lapic_sync_from_vapic(vcpu
);
6677 static inline int vcpu_block(struct kvm
*kvm
, struct kvm_vcpu
*vcpu
)
6679 if (!kvm_arch_vcpu_runnable(vcpu
)) {
6680 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6681 kvm_vcpu_block(vcpu
);
6682 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6683 if (!kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
6687 kvm_apic_accept_events(vcpu
);
6688 switch(vcpu
->arch
.mp_state
) {
6689 case KVM_MP_STATE_HALTED
:
6690 vcpu
->arch
.pv
.pv_unhalted
= false;
6691 vcpu
->arch
.mp_state
=
6692 KVM_MP_STATE_RUNNABLE
;
6693 case KVM_MP_STATE_RUNNABLE
:
6694 vcpu
->arch
.apf
.halted
= false;
6696 case KVM_MP_STATE_INIT_RECEIVED
:
6705 static int vcpu_run(struct kvm_vcpu
*vcpu
)
6708 struct kvm
*kvm
= vcpu
->kvm
;
6710 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6713 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
6714 !vcpu
->arch
.apf
.halted
)
6715 r
= vcpu_enter_guest(vcpu
);
6717 r
= vcpu_block(kvm
, vcpu
);
6721 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
6722 if (kvm_cpu_has_pending_timer(vcpu
))
6723 kvm_inject_pending_timer_irqs(vcpu
);
6725 if (dm_request_for_irq_injection(vcpu
)) {
6727 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
6728 ++vcpu
->stat
.request_irq_exits
;
6732 kvm_check_async_pf_completion(vcpu
);
6734 if (signal_pending(current
)) {
6736 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
6737 ++vcpu
->stat
.signal_exits
;
6740 if (need_resched()) {
6741 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6743 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6747 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6752 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
6755 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6756 r
= emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
6757 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6758 if (r
!= EMULATE_DONE
)
6763 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
6765 BUG_ON(!vcpu
->arch
.pio
.count
);
6767 return complete_emulated_io(vcpu
);
6771 * Implements the following, as a state machine:
6775 * for each mmio piece in the fragment
6783 * for each mmio piece in the fragment
6788 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
6790 struct kvm_run
*run
= vcpu
->run
;
6791 struct kvm_mmio_fragment
*frag
;
6794 BUG_ON(!vcpu
->mmio_needed
);
6796 /* Complete previous fragment */
6797 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
6798 len
= min(8u, frag
->len
);
6799 if (!vcpu
->mmio_is_write
)
6800 memcpy(frag
->data
, run
->mmio
.data
, len
);
6802 if (frag
->len
<= 8) {
6803 /* Switch to the next fragment. */
6805 vcpu
->mmio_cur_fragment
++;
6807 /* Go forward to the next mmio piece. */
6813 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
6814 vcpu
->mmio_needed
= 0;
6816 /* FIXME: return into emulator if single-stepping. */
6817 if (vcpu
->mmio_is_write
)
6819 vcpu
->mmio_read_completed
= 1;
6820 return complete_emulated_io(vcpu
);
6823 run
->exit_reason
= KVM_EXIT_MMIO
;
6824 run
->mmio
.phys_addr
= frag
->gpa
;
6825 if (vcpu
->mmio_is_write
)
6826 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
6827 run
->mmio
.len
= min(8u, frag
->len
);
6828 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
6829 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
6834 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
6836 struct fpu
*fpu
= ¤t
->thread
.fpu
;
6840 fpu__activate_curr(fpu
);
6842 if (vcpu
->sigset_active
)
6843 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
6845 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
6846 kvm_vcpu_block(vcpu
);
6847 kvm_apic_accept_events(vcpu
);
6848 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
6853 /* re-sync apic's tpr */
6854 if (!irqchip_in_kernel(vcpu
->kvm
)) {
6855 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
6861 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
6862 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
6863 vcpu
->arch
.complete_userspace_io
= NULL
;
6868 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
6873 post_kvm_run_save(vcpu
);
6874 if (vcpu
->sigset_active
)
6875 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
6880 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
6882 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
6884 * We are here if userspace calls get_regs() in the middle of
6885 * instruction emulation. Registers state needs to be copied
6886 * back from emulation context to vcpu. Userspace shouldn't do
6887 * that usually, but some bad designed PV devices (vmware
6888 * backdoor interface) need this to work
6890 emulator_writeback_register_cache(&vcpu
->arch
.emulate_ctxt
);
6891 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
6893 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
6894 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
6895 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
6896 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
6897 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
6898 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
6899 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
6900 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
6901 #ifdef CONFIG_X86_64
6902 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
6903 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
6904 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
6905 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
6906 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
6907 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
6908 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
6909 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
6912 regs
->rip
= kvm_rip_read(vcpu
);
6913 regs
->rflags
= kvm_get_rflags(vcpu
);
6918 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
6920 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
6921 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
6923 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
6924 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
6925 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
6926 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
6927 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
6928 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
6929 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
6930 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
6931 #ifdef CONFIG_X86_64
6932 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
6933 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
6934 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
6935 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
6936 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
6937 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
6938 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
6939 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
6942 kvm_rip_write(vcpu
, regs
->rip
);
6943 kvm_set_rflags(vcpu
, regs
->rflags
);
6945 vcpu
->arch
.exception
.pending
= false;
6947 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6952 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
6954 struct kvm_segment cs
;
6956 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6960 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
6962 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
6963 struct kvm_sregs
*sregs
)
6967 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
6968 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
6969 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
6970 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
6971 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
6972 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
6974 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
6975 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
6977 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6978 sregs
->idt
.limit
= dt
.size
;
6979 sregs
->idt
.base
= dt
.address
;
6980 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6981 sregs
->gdt
.limit
= dt
.size
;
6982 sregs
->gdt
.base
= dt
.address
;
6984 sregs
->cr0
= kvm_read_cr0(vcpu
);
6985 sregs
->cr2
= vcpu
->arch
.cr2
;
6986 sregs
->cr3
= kvm_read_cr3(vcpu
);
6987 sregs
->cr4
= kvm_read_cr4(vcpu
);
6988 sregs
->cr8
= kvm_get_cr8(vcpu
);
6989 sregs
->efer
= vcpu
->arch
.efer
;
6990 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
6992 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
6994 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
6995 set_bit(vcpu
->arch
.interrupt
.nr
,
6996 (unsigned long *)sregs
->interrupt_bitmap
);
7001 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
7002 struct kvm_mp_state
*mp_state
)
7004 kvm_apic_accept_events(vcpu
);
7005 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
&&
7006 vcpu
->arch
.pv
.pv_unhalted
)
7007 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
7009 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
7014 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
7015 struct kvm_mp_state
*mp_state
)
7017 if (!kvm_vcpu_has_lapic(vcpu
) &&
7018 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
7021 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
7022 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
7023 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
7025 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
7026 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7030 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
7031 int reason
, bool has_error_code
, u32 error_code
)
7033 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
7036 init_emulate_ctxt(vcpu
);
7038 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
7039 has_error_code
, error_code
);
7042 return EMULATE_FAIL
;
7044 kvm_rip_write(vcpu
, ctxt
->eip
);
7045 kvm_set_rflags(vcpu
, ctxt
->eflags
);
7046 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7047 return EMULATE_DONE
;
7049 EXPORT_SYMBOL_GPL(kvm_task_switch
);
7051 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
7052 struct kvm_sregs
*sregs
)
7054 struct msr_data apic_base_msr
;
7055 int mmu_reset_needed
= 0;
7056 int pending_vec
, max_bits
, idx
;
7059 if (!guest_cpuid_has_xsave(vcpu
) && (sregs
->cr4
& X86_CR4_OSXSAVE
))
7062 dt
.size
= sregs
->idt
.limit
;
7063 dt
.address
= sregs
->idt
.base
;
7064 kvm_x86_ops
->set_idt(vcpu
, &dt
);
7065 dt
.size
= sregs
->gdt
.limit
;
7066 dt
.address
= sregs
->gdt
.base
;
7067 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
7069 vcpu
->arch
.cr2
= sregs
->cr2
;
7070 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
7071 vcpu
->arch
.cr3
= sregs
->cr3
;
7072 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
7074 kvm_set_cr8(vcpu
, sregs
->cr8
);
7076 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
7077 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
7078 apic_base_msr
.data
= sregs
->apic_base
;
7079 apic_base_msr
.host_initiated
= true;
7080 kvm_set_apic_base(vcpu
, &apic_base_msr
);
7082 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
7083 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
7084 vcpu
->arch
.cr0
= sregs
->cr0
;
7086 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
7087 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
7088 if (sregs
->cr4
& X86_CR4_OSXSAVE
)
7089 kvm_update_cpuid(vcpu
);
7091 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7092 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
7093 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
7094 mmu_reset_needed
= 1;
7096 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7098 if (mmu_reset_needed
)
7099 kvm_mmu_reset_context(vcpu
);
7101 max_bits
= KVM_NR_INTERRUPTS
;
7102 pending_vec
= find_first_bit(
7103 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
7104 if (pending_vec
< max_bits
) {
7105 kvm_queue_interrupt(vcpu
, pending_vec
, false);
7106 pr_debug("Set back pending irq %d\n", pending_vec
);
7109 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7110 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7111 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7112 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7113 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7114 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7116 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7117 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7119 update_cr8_intercept(vcpu
);
7121 /* Older userspace won't unhalt the vcpu on reset. */
7122 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
7123 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
7125 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7127 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7132 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
7133 struct kvm_guest_debug
*dbg
)
7135 unsigned long rflags
;
7138 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
7140 if (vcpu
->arch
.exception
.pending
)
7142 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
7143 kvm_queue_exception(vcpu
, DB_VECTOR
);
7145 kvm_queue_exception(vcpu
, BP_VECTOR
);
7149 * Read rflags as long as potentially injected trace flags are still
7152 rflags
= kvm_get_rflags(vcpu
);
7154 vcpu
->guest_debug
= dbg
->control
;
7155 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
7156 vcpu
->guest_debug
= 0;
7158 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
7159 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
7160 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
7161 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
7163 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
7164 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
7166 kvm_update_dr7(vcpu
);
7168 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
7169 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
7170 get_segment_base(vcpu
, VCPU_SREG_CS
);
7173 * Trigger an rflags update that will inject or remove the trace
7176 kvm_set_rflags(vcpu
, rflags
);
7178 kvm_x86_ops
->update_db_bp_intercept(vcpu
);
7188 * Translate a guest virtual address to a guest physical address.
7190 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
7191 struct kvm_translation
*tr
)
7193 unsigned long vaddr
= tr
->linear_address
;
7197 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7198 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
7199 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7200 tr
->physical_address
= gpa
;
7201 tr
->valid
= gpa
!= UNMAPPED_GVA
;
7208 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7210 struct fxregs_state
*fxsave
=
7211 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7213 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
7214 fpu
->fcw
= fxsave
->cwd
;
7215 fpu
->fsw
= fxsave
->swd
;
7216 fpu
->ftwx
= fxsave
->twd
;
7217 fpu
->last_opcode
= fxsave
->fop
;
7218 fpu
->last_ip
= fxsave
->rip
;
7219 fpu
->last_dp
= fxsave
->rdp
;
7220 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
7225 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7227 struct fxregs_state
*fxsave
=
7228 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7230 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
7231 fxsave
->cwd
= fpu
->fcw
;
7232 fxsave
->swd
= fpu
->fsw
;
7233 fxsave
->twd
= fpu
->ftwx
;
7234 fxsave
->fop
= fpu
->last_opcode
;
7235 fxsave
->rip
= fpu
->last_ip
;
7236 fxsave
->rdp
= fpu
->last_dp
;
7237 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
7242 static void fx_init(struct kvm_vcpu
*vcpu
)
7244 fpstate_init(&vcpu
->arch
.guest_fpu
.state
);
7246 vcpu
->arch
.guest_fpu
.state
.xsave
.header
.xcomp_bv
=
7247 host_xcr0
| XSTATE_COMPACTION_ENABLED
;
7250 * Ensure guest xcr0 is valid for loading
7252 vcpu
->arch
.xcr0
= XSTATE_FP
;
7254 vcpu
->arch
.cr0
|= X86_CR0_ET
;
7257 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
7259 if (vcpu
->guest_fpu_loaded
)
7263 * Restore all possible states in the guest,
7264 * and assume host would use all available bits.
7265 * Guest xcr0 would be loaded later.
7267 kvm_put_guest_xcr0(vcpu
);
7268 vcpu
->guest_fpu_loaded
= 1;
7269 __kernel_fpu_begin();
7270 __copy_kernel_to_fpregs(&vcpu
->arch
.guest_fpu
.state
);
7274 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
7276 kvm_put_guest_xcr0(vcpu
);
7278 if (!vcpu
->guest_fpu_loaded
) {
7279 vcpu
->fpu_counter
= 0;
7283 vcpu
->guest_fpu_loaded
= 0;
7284 copy_fpregs_to_fpstate(&vcpu
->arch
.guest_fpu
);
7286 ++vcpu
->stat
.fpu_reload
;
7288 * If using eager FPU mode, or if the guest is a frequent user
7289 * of the FPU, just leave the FPU active for next time.
7290 * Every 255 times fpu_counter rolls over to 0; a guest that uses
7291 * the FPU in bursts will revert to loading it on demand.
7293 if (!vcpu
->arch
.eager_fpu
) {
7294 if (++vcpu
->fpu_counter
< 5)
7295 kvm_make_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
);
7300 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
7302 kvmclock_reset(vcpu
);
7304 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
7305 kvm_x86_ops
->vcpu_free(vcpu
);
7308 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
7311 struct kvm_vcpu
*vcpu
;
7313 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
7314 printk_once(KERN_WARNING
7315 "kvm: SMP vm created on host with unstable TSC; "
7316 "guest TSC will not be reliable\n");
7318 vcpu
= kvm_x86_ops
->vcpu_create(kvm
, id
);
7321 * Activate fpu unconditionally in case the guest needs eager FPU. It will be
7322 * deactivated soon if it doesn't.
7324 kvm_x86_ops
->fpu_activate(vcpu
);
7328 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
7332 kvm_vcpu_mtrr_init(vcpu
);
7333 r
= vcpu_load(vcpu
);
7336 kvm_vcpu_reset(vcpu
, false);
7337 kvm_mmu_setup(vcpu
);
7342 void kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
7344 struct msr_data msr
;
7345 struct kvm
*kvm
= vcpu
->kvm
;
7347 if (vcpu_load(vcpu
))
7350 msr
.index
= MSR_IA32_TSC
;
7351 msr
.host_initiated
= true;
7352 kvm_write_tsc(vcpu
, &msr
);
7355 if (!kvmclock_periodic_sync
)
7358 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
7359 KVMCLOCK_SYNC_PERIOD
);
7362 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
7365 vcpu
->arch
.apf
.msr_val
= 0;
7367 r
= vcpu_load(vcpu
);
7369 kvm_mmu_unload(vcpu
);
7372 kvm_x86_ops
->vcpu_free(vcpu
);
7375 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
, bool init_event
)
7377 vcpu
->arch
.hflags
= 0;
7379 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
7380 vcpu
->arch
.nmi_pending
= 0;
7381 vcpu
->arch
.nmi_injected
= false;
7382 kvm_clear_interrupt_queue(vcpu
);
7383 kvm_clear_exception_queue(vcpu
);
7385 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
7386 kvm_update_dr0123(vcpu
);
7387 vcpu
->arch
.dr6
= DR6_INIT
;
7388 kvm_update_dr6(vcpu
);
7389 vcpu
->arch
.dr7
= DR7_FIXED_1
;
7390 kvm_update_dr7(vcpu
);
7394 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7395 vcpu
->arch
.apf
.msr_val
= 0;
7396 vcpu
->arch
.st
.msr_val
= 0;
7398 kvmclock_reset(vcpu
);
7400 kvm_clear_async_pf_completion_queue(vcpu
);
7401 kvm_async_pf_hash_reset(vcpu
);
7402 vcpu
->arch
.apf
.halted
= false;
7405 kvm_pmu_reset(vcpu
);
7406 vcpu
->arch
.smbase
= 0x30000;
7409 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
7410 vcpu
->arch
.regs_avail
= ~0;
7411 vcpu
->arch
.regs_dirty
= ~0;
7413 kvm_x86_ops
->vcpu_reset(vcpu
, init_event
);
7416 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
7418 struct kvm_segment cs
;
7420 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7421 cs
.selector
= vector
<< 8;
7422 cs
.base
= vector
<< 12;
7423 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7424 kvm_rip_write(vcpu
, 0);
7427 int kvm_arch_hardware_enable(void)
7430 struct kvm_vcpu
*vcpu
;
7435 bool stable
, backwards_tsc
= false;
7437 kvm_shared_msr_cpu_online();
7438 ret
= kvm_x86_ops
->hardware_enable();
7442 local_tsc
= native_read_tsc();
7443 stable
= !check_tsc_unstable();
7444 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7445 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7446 if (!stable
&& vcpu
->cpu
== smp_processor_id())
7447 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
7448 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
7449 backwards_tsc
= true;
7450 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
7451 max_tsc
= vcpu
->arch
.last_host_tsc
;
7457 * Sometimes, even reliable TSCs go backwards. This happens on
7458 * platforms that reset TSC during suspend or hibernate actions, but
7459 * maintain synchronization. We must compensate. Fortunately, we can
7460 * detect that condition here, which happens early in CPU bringup,
7461 * before any KVM threads can be running. Unfortunately, we can't
7462 * bring the TSCs fully up to date with real time, as we aren't yet far
7463 * enough into CPU bringup that we know how much real time has actually
7464 * elapsed; our helper function, get_kernel_ns() will be using boot
7465 * variables that haven't been updated yet.
7467 * So we simply find the maximum observed TSC above, then record the
7468 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
7469 * the adjustment will be applied. Note that we accumulate
7470 * adjustments, in case multiple suspend cycles happen before some VCPU
7471 * gets a chance to run again. In the event that no KVM threads get a
7472 * chance to run, we will miss the entire elapsed period, as we'll have
7473 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7474 * loose cycle time. This isn't too big a deal, since the loss will be
7475 * uniform across all VCPUs (not to mention the scenario is extremely
7476 * unlikely). It is possible that a second hibernate recovery happens
7477 * much faster than a first, causing the observed TSC here to be
7478 * smaller; this would require additional padding adjustment, which is
7479 * why we set last_host_tsc to the local tsc observed here.
7481 * N.B. - this code below runs only on platforms with reliable TSC,
7482 * as that is the only way backwards_tsc is set above. Also note
7483 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7484 * have the same delta_cyc adjustment applied if backwards_tsc
7485 * is detected. Note further, this adjustment is only done once,
7486 * as we reset last_host_tsc on all VCPUs to stop this from being
7487 * called multiple times (one for each physical CPU bringup).
7489 * Platforms with unreliable TSCs don't have to deal with this, they
7490 * will be compensated by the logic in vcpu_load, which sets the TSC to
7491 * catchup mode. This will catchup all VCPUs to real time, but cannot
7492 * guarantee that they stay in perfect synchronization.
7494 if (backwards_tsc
) {
7495 u64 delta_cyc
= max_tsc
- local_tsc
;
7496 backwards_tsc_observed
= true;
7497 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7498 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7499 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
7500 vcpu
->arch
.last_host_tsc
= local_tsc
;
7501 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
7505 * We have to disable TSC offset matching.. if you were
7506 * booting a VM while issuing an S4 host suspend....
7507 * you may have some problem. Solving this issue is
7508 * left as an exercise to the reader.
7510 kvm
->arch
.last_tsc_nsec
= 0;
7511 kvm
->arch
.last_tsc_write
= 0;
7518 void kvm_arch_hardware_disable(void)
7520 kvm_x86_ops
->hardware_disable();
7521 drop_user_return_notifiers();
7524 int kvm_arch_hardware_setup(void)
7528 r
= kvm_x86_ops
->hardware_setup();
7532 kvm_init_msr_list();
7536 void kvm_arch_hardware_unsetup(void)
7538 kvm_x86_ops
->hardware_unsetup();
7541 void kvm_arch_check_processor_compat(void *rtn
)
7543 kvm_x86_ops
->check_processor_compatibility(rtn
);
7546 bool kvm_vcpu_compatible(struct kvm_vcpu
*vcpu
)
7548 return irqchip_in_kernel(vcpu
->kvm
) == (vcpu
->arch
.apic
!= NULL
);
7551 struct static_key kvm_no_apic_vcpu __read_mostly
;
7553 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
7559 BUG_ON(vcpu
->kvm
== NULL
);
7562 vcpu
->arch
.pv
.pv_unhalted
= false;
7563 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
7564 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_reset_bsp(vcpu
))
7565 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7567 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
7569 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
7574 vcpu
->arch
.pio_data
= page_address(page
);
7576 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
7578 r
= kvm_mmu_create(vcpu
);
7580 goto fail_free_pio_data
;
7582 if (irqchip_in_kernel(kvm
)) {
7583 r
= kvm_create_lapic(vcpu
);
7585 goto fail_mmu_destroy
;
7587 static_key_slow_inc(&kvm_no_apic_vcpu
);
7589 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
7591 if (!vcpu
->arch
.mce_banks
) {
7593 goto fail_free_lapic
;
7595 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
7597 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
)) {
7599 goto fail_free_mce_banks
;
7604 vcpu
->arch
.ia32_tsc_adjust_msr
= 0x0;
7605 vcpu
->arch
.pv_time_enabled
= false;
7607 vcpu
->arch
.guest_supported_xcr0
= 0;
7608 vcpu
->arch
.guest_xstate_size
= XSAVE_HDR_SIZE
+ XSAVE_HDR_OFFSET
;
7610 vcpu
->arch
.maxphyaddr
= cpuid_query_maxphyaddr(vcpu
);
7612 vcpu
->arch
.pat
= MSR_IA32_CR_PAT_DEFAULT
;
7614 kvm_async_pf_hash_reset(vcpu
);
7619 fail_free_mce_banks
:
7620 kfree(vcpu
->arch
.mce_banks
);
7622 kvm_free_lapic(vcpu
);
7624 kvm_mmu_destroy(vcpu
);
7626 free_page((unsigned long)vcpu
->arch
.pio_data
);
7631 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
7635 kvm_pmu_destroy(vcpu
);
7636 kfree(vcpu
->arch
.mce_banks
);
7637 kvm_free_lapic(vcpu
);
7638 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7639 kvm_mmu_destroy(vcpu
);
7640 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7641 free_page((unsigned long)vcpu
->arch
.pio_data
);
7642 if (!irqchip_in_kernel(vcpu
->kvm
))
7643 static_key_slow_dec(&kvm_no_apic_vcpu
);
7646 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
7648 kvm_x86_ops
->sched_in(vcpu
, cpu
);
7651 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
7656 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
7657 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
7658 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
7659 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
7660 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
7662 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7663 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
7664 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7665 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
7666 &kvm
->arch
.irq_sources_bitmap
);
7668 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
7669 mutex_init(&kvm
->arch
.apic_map_lock
);
7670 spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
7672 pvclock_update_vm_gtod_copy(kvm
);
7674 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
7675 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
7680 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
7683 r
= vcpu_load(vcpu
);
7685 kvm_mmu_unload(vcpu
);
7689 static void kvm_free_vcpus(struct kvm
*kvm
)
7692 struct kvm_vcpu
*vcpu
;
7695 * Unpin any mmu pages first.
7697 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7698 kvm_clear_async_pf_completion_queue(vcpu
);
7699 kvm_unload_vcpu_mmu(vcpu
);
7701 kvm_for_each_vcpu(i
, vcpu
, kvm
)
7702 kvm_arch_vcpu_free(vcpu
);
7704 mutex_lock(&kvm
->lock
);
7705 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
7706 kvm
->vcpus
[i
] = NULL
;
7708 atomic_set(&kvm
->online_vcpus
, 0);
7709 mutex_unlock(&kvm
->lock
);
7712 void kvm_arch_sync_events(struct kvm
*kvm
)
7714 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
7715 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
7716 kvm_free_all_assigned_devices(kvm
);
7720 int __x86_set_memory_region(struct kvm
*kvm
,
7721 const struct kvm_userspace_memory_region
*mem
)
7725 /* Called with kvm->slots_lock held. */
7726 BUG_ON(mem
->slot
>= KVM_MEM_SLOTS_NUM
);
7728 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
7729 struct kvm_userspace_memory_region m
= *mem
;
7732 r
= __kvm_set_memory_region(kvm
, &m
);
7739 EXPORT_SYMBOL_GPL(__x86_set_memory_region
);
7741 int x86_set_memory_region(struct kvm
*kvm
,
7742 const struct kvm_userspace_memory_region
*mem
)
7746 mutex_lock(&kvm
->slots_lock
);
7747 r
= __x86_set_memory_region(kvm
, mem
);
7748 mutex_unlock(&kvm
->slots_lock
);
7752 EXPORT_SYMBOL_GPL(x86_set_memory_region
);
7754 void kvm_arch_destroy_vm(struct kvm
*kvm
)
7756 if (current
->mm
== kvm
->mm
) {
7758 * Free memory regions allocated on behalf of userspace,
7759 * unless the the memory map has changed due to process exit
7762 struct kvm_userspace_memory_region mem
;
7763 memset(&mem
, 0, sizeof(mem
));
7764 mem
.slot
= APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
;
7765 x86_set_memory_region(kvm
, &mem
);
7767 mem
.slot
= IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
;
7768 x86_set_memory_region(kvm
, &mem
);
7770 mem
.slot
= TSS_PRIVATE_MEMSLOT
;
7771 x86_set_memory_region(kvm
, &mem
);
7773 kvm_iommu_unmap_guest(kvm
);
7774 kfree(kvm
->arch
.vpic
);
7775 kfree(kvm
->arch
.vioapic
);
7776 kvm_free_vcpus(kvm
);
7777 kfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
7780 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*free
,
7781 struct kvm_memory_slot
*dont
)
7785 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7786 if (!dont
|| free
->arch
.rmap
[i
] != dont
->arch
.rmap
[i
]) {
7787 kvfree(free
->arch
.rmap
[i
]);
7788 free
->arch
.rmap
[i
] = NULL
;
7793 if (!dont
|| free
->arch
.lpage_info
[i
- 1] !=
7794 dont
->arch
.lpage_info
[i
- 1]) {
7795 kvfree(free
->arch
.lpage_info
[i
- 1]);
7796 free
->arch
.lpage_info
[i
- 1] = NULL
;
7801 int kvm_arch_create_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
,
7802 unsigned long npages
)
7806 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7811 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
7812 slot
->base_gfn
, level
) + 1;
7814 slot
->arch
.rmap
[i
] =
7815 kvm_kvzalloc(lpages
* sizeof(*slot
->arch
.rmap
[i
]));
7816 if (!slot
->arch
.rmap
[i
])
7821 slot
->arch
.lpage_info
[i
- 1] = kvm_kvzalloc(lpages
*
7822 sizeof(*slot
->arch
.lpage_info
[i
- 1]));
7823 if (!slot
->arch
.lpage_info
[i
- 1])
7826 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
7827 slot
->arch
.lpage_info
[i
- 1][0].write_count
= 1;
7828 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
7829 slot
->arch
.lpage_info
[i
- 1][lpages
- 1].write_count
= 1;
7830 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
7832 * If the gfn and userspace address are not aligned wrt each
7833 * other, or if explicitly asked to, disable large page
7834 * support for this slot
7836 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1) ||
7837 !kvm_largepages_enabled()) {
7840 for (j
= 0; j
< lpages
; ++j
)
7841 slot
->arch
.lpage_info
[i
- 1][j
].write_count
= 1;
7848 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7849 kvfree(slot
->arch
.rmap
[i
]);
7850 slot
->arch
.rmap
[i
] = NULL
;
7854 kvfree(slot
->arch
.lpage_info
[i
- 1]);
7855 slot
->arch
.lpage_info
[i
- 1] = NULL
;
7860 void kvm_arch_memslots_updated(struct kvm
*kvm
, struct kvm_memslots
*slots
)
7863 * memslots->generation has been incremented.
7864 * mmio generation may have reached its maximum value.
7866 kvm_mmu_invalidate_mmio_sptes(kvm
, slots
);
7869 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
7870 struct kvm_memory_slot
*memslot
,
7871 const struct kvm_userspace_memory_region
*mem
,
7872 enum kvm_mr_change change
)
7875 * Only private memory slots need to be mapped here since
7876 * KVM_SET_MEMORY_REGION ioctl is no longer supported.
7878 if ((memslot
->id
>= KVM_USER_MEM_SLOTS
) && (change
== KVM_MR_CREATE
)) {
7879 unsigned long userspace_addr
;
7882 * MAP_SHARED to prevent internal slot pages from being moved
7885 userspace_addr
= vm_mmap(NULL
, 0, memslot
->npages
* PAGE_SIZE
,
7886 PROT_READ
| PROT_WRITE
,
7887 MAP_SHARED
| MAP_ANONYMOUS
, 0);
7889 if (IS_ERR((void *)userspace_addr
))
7890 return PTR_ERR((void *)userspace_addr
);
7892 memslot
->userspace_addr
= userspace_addr
;
7898 static void kvm_mmu_slot_apply_flags(struct kvm
*kvm
,
7899 struct kvm_memory_slot
*new)
7901 /* Still write protect RO slot */
7902 if (new->flags
& KVM_MEM_READONLY
) {
7903 kvm_mmu_slot_remove_write_access(kvm
, new);
7908 * Call kvm_x86_ops dirty logging hooks when they are valid.
7910 * kvm_x86_ops->slot_disable_log_dirty is called when:
7912 * - KVM_MR_CREATE with dirty logging is disabled
7913 * - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
7915 * The reason is, in case of PML, we need to set D-bit for any slots
7916 * with dirty logging disabled in order to eliminate unnecessary GPA
7917 * logging in PML buffer (and potential PML buffer full VMEXT). This
7918 * guarantees leaving PML enabled during guest's lifetime won't have
7919 * any additonal overhead from PML when guest is running with dirty
7920 * logging disabled for memory slots.
7922 * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
7923 * to dirty logging mode.
7925 * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
7927 * In case of write protect:
7929 * Write protect all pages for dirty logging.
7931 * All the sptes including the large sptes which point to this
7932 * slot are set to readonly. We can not create any new large
7933 * spte on this slot until the end of the logging.
7935 * See the comments in fast_page_fault().
7937 if (new->flags
& KVM_MEM_LOG_DIRTY_PAGES
) {
7938 if (kvm_x86_ops
->slot_enable_log_dirty
)
7939 kvm_x86_ops
->slot_enable_log_dirty(kvm
, new);
7941 kvm_mmu_slot_remove_write_access(kvm
, new);
7943 if (kvm_x86_ops
->slot_disable_log_dirty
)
7944 kvm_x86_ops
->slot_disable_log_dirty(kvm
, new);
7948 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
7949 const struct kvm_userspace_memory_region
*mem
,
7950 const struct kvm_memory_slot
*old
,
7951 const struct kvm_memory_slot
*new,
7952 enum kvm_mr_change change
)
7954 int nr_mmu_pages
= 0;
7956 if (change
== KVM_MR_DELETE
&& old
->id
>= KVM_USER_MEM_SLOTS
) {
7959 ret
= vm_munmap(old
->userspace_addr
,
7960 old
->npages
* PAGE_SIZE
);
7963 "kvm_vm_ioctl_set_memory_region: "
7964 "failed to munmap memory\n");
7967 if (!kvm
->arch
.n_requested_mmu_pages
)
7968 nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
7971 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
7974 * Dirty logging tracks sptes in 4k granularity, meaning that large
7975 * sptes have to be split. If live migration is successful, the guest
7976 * in the source machine will be destroyed and large sptes will be
7977 * created in the destination. However, if the guest continues to run
7978 * in the source machine (for example if live migration fails), small
7979 * sptes will remain around and cause bad performance.
7981 * Scan sptes if dirty logging has been stopped, dropping those
7982 * which can be collapsed into a single large-page spte. Later
7983 * page faults will create the large-page sptes.
7985 if ((change
!= KVM_MR_DELETE
) &&
7986 (old
->flags
& KVM_MEM_LOG_DIRTY_PAGES
) &&
7987 !(new->flags
& KVM_MEM_LOG_DIRTY_PAGES
))
7988 kvm_mmu_zap_collapsible_sptes(kvm
, new);
7991 * Set up write protection and/or dirty logging for the new slot.
7993 * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
7994 * been zapped so no dirty logging staff is needed for old slot. For
7995 * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
7996 * new and it's also covered when dealing with the new slot.
7998 * FIXME: const-ify all uses of struct kvm_memory_slot.
8000 if (change
!= KVM_MR_DELETE
)
8001 kvm_mmu_slot_apply_flags(kvm
, (struct kvm_memory_slot
*) new);
8004 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
8006 kvm_mmu_invalidate_zap_all_pages(kvm
);
8009 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
8010 struct kvm_memory_slot
*slot
)
8012 kvm_mmu_invalidate_zap_all_pages(kvm
);
8015 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
8017 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
)
8018 kvm_x86_ops
->check_nested_events(vcpu
, false);
8020 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
8021 !vcpu
->arch
.apf
.halted
)
8022 || !list_empty_careful(&vcpu
->async_pf
.done
)
8023 || kvm_apic_has_events(vcpu
)
8024 || vcpu
->arch
.pv
.pv_unhalted
8025 || atomic_read(&vcpu
->arch
.nmi_queued
) ||
8026 (kvm_arch_interrupt_allowed(vcpu
) &&
8027 kvm_cpu_has_interrupt(vcpu
));
8030 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
8032 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
8035 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
8037 return kvm_x86_ops
->interrupt_allowed(vcpu
);
8040 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
8042 if (is_64_bit_mode(vcpu
))
8043 return kvm_rip_read(vcpu
);
8044 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
8045 kvm_rip_read(vcpu
));
8047 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
8049 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
8051 return kvm_get_linear_rip(vcpu
) == linear_rip
;
8053 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
8055 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
8057 unsigned long rflags
;
8059 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
8060 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
8061 rflags
&= ~X86_EFLAGS_TF
;
8064 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
8066 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8068 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
8069 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
8070 rflags
|= X86_EFLAGS_TF
;
8071 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
8074 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8076 __kvm_set_rflags(vcpu
, rflags
);
8077 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8079 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
8081 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
8085 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
8089 r
= kvm_mmu_reload(vcpu
);
8093 if (!vcpu
->arch
.mmu
.direct_map
&&
8094 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
8097 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
8100 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
8102 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
8105 static inline u32
kvm_async_pf_next_probe(u32 key
)
8107 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
8110 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8112 u32 key
= kvm_async_pf_hash_fn(gfn
);
8114 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
8115 key
= kvm_async_pf_next_probe(key
);
8117 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
8120 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8123 u32 key
= kvm_async_pf_hash_fn(gfn
);
8125 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
8126 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
8127 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
8128 key
= kvm_async_pf_next_probe(key
);
8133 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8135 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
8138 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8142 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
8144 vcpu
->arch
.apf
.gfns
[i
] = ~0;
8146 j
= kvm_async_pf_next_probe(j
);
8147 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
8149 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
8151 * k lies cyclically in ]i,j]
8153 * |....j i.k.| or |.k..j i...|
8155 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
8156 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
8161 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
8164 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
8168 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
8169 struct kvm_async_pf
*work
)
8171 struct x86_exception fault
;
8173 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
8174 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8176 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
8177 (vcpu
->arch
.apf
.send_user_only
&&
8178 kvm_x86_ops
->get_cpl(vcpu
) == 0))
8179 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
8180 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
8181 fault
.vector
= PF_VECTOR
;
8182 fault
.error_code_valid
= true;
8183 fault
.error_code
= 0;
8184 fault
.nested_page_fault
= false;
8185 fault
.address
= work
->arch
.token
;
8186 kvm_inject_page_fault(vcpu
, &fault
);
8190 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
8191 struct kvm_async_pf
*work
)
8193 struct x86_exception fault
;
8195 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
8196 if (work
->wakeup_all
)
8197 work
->arch
.token
= ~0; /* broadcast wakeup */
8199 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8201 if ((vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) &&
8202 !apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
8203 fault
.vector
= PF_VECTOR
;
8204 fault
.error_code_valid
= true;
8205 fault
.error_code
= 0;
8206 fault
.nested_page_fault
= false;
8207 fault
.address
= work
->arch
.token
;
8208 kvm_inject_page_fault(vcpu
, &fault
);
8210 vcpu
->arch
.apf
.halted
= false;
8211 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
8214 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
8216 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
8219 return !kvm_event_needs_reinjection(vcpu
) &&
8220 kvm_x86_ops
->interrupt_allowed(vcpu
);
8223 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
8225 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
8227 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
8229 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
8231 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
8233 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
8235 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
8237 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
8239 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
8241 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
8242 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
8243 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
8244 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
8245 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
8246 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
8247 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
8248 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
8249 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
8250 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
8251 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
8252 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
8253 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
8254 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window
);
8255 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full
);