2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
31 #include <linux/clocksource.h>
32 #include <linux/interrupt.h>
33 #include <linux/kvm.h>
35 #include <linux/vmalloc.h>
36 #include <linux/module.h>
37 #include <linux/mman.h>
38 #include <linux/highmem.h>
39 #include <linux/iommu.h>
40 #include <linux/intel-iommu.h>
41 #include <linux/cpufreq.h>
42 #include <linux/user-return-notifier.h>
43 #include <linux/srcu.h>
44 #include <linux/slab.h>
45 #include <linux/perf_event.h>
46 #include <linux/uaccess.h>
47 #include <linux/hash.h>
48 #include <linux/pci.h>
49 #include <linux/timekeeper_internal.h>
50 #include <linux/pvclock_gtod.h>
51 #include <trace/events/kvm.h>
53 #define CREATE_TRACE_POINTS
56 #include <asm/debugreg.h>
62 #include <asm/fpu-internal.h> /* Ugh! */
64 #include <asm/pvclock.h>
65 #include <asm/div64.h>
67 #define MAX_IO_MSRS 256
68 #define KVM_MAX_MCE_BANKS 32
69 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
71 #define emul_to_vcpu(ctxt) \
72 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
75 * - enable syscall per default because its emulated by KVM
76 * - enable LME and LMA per default on 64 bit KVM
80 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
82 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
85 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
86 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
88 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
89 static void process_nmi(struct kvm_vcpu
*vcpu
);
91 struct kvm_x86_ops
*kvm_x86_ops
;
92 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
94 static bool ignore_msrs
= 0;
95 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
97 unsigned int min_timer_period_us
= 500;
98 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
100 bool kvm_has_tsc_control
;
101 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
102 u32 kvm_max_guest_tsc_khz
;
103 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
105 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
106 static u32 tsc_tolerance_ppm
= 250;
107 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
109 #define KVM_NR_SHARED_MSRS 16
111 struct kvm_shared_msrs_global
{
113 u32 msrs
[KVM_NR_SHARED_MSRS
];
116 struct kvm_shared_msrs
{
117 struct user_return_notifier urn
;
119 struct kvm_shared_msr_values
{
122 } values
[KVM_NR_SHARED_MSRS
];
125 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
126 static struct kvm_shared_msrs __percpu
*shared_msrs
;
128 struct kvm_stats_debugfs_item debugfs_entries
[] = {
129 { "pf_fixed", VCPU_STAT(pf_fixed
) },
130 { "pf_guest", VCPU_STAT(pf_guest
) },
131 { "tlb_flush", VCPU_STAT(tlb_flush
) },
132 { "invlpg", VCPU_STAT(invlpg
) },
133 { "exits", VCPU_STAT(exits
) },
134 { "io_exits", VCPU_STAT(io_exits
) },
135 { "mmio_exits", VCPU_STAT(mmio_exits
) },
136 { "signal_exits", VCPU_STAT(signal_exits
) },
137 { "irq_window", VCPU_STAT(irq_window_exits
) },
138 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
139 { "halt_exits", VCPU_STAT(halt_exits
) },
140 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
141 { "hypercalls", VCPU_STAT(hypercalls
) },
142 { "request_irq", VCPU_STAT(request_irq_exits
) },
143 { "irq_exits", VCPU_STAT(irq_exits
) },
144 { "host_state_reload", VCPU_STAT(host_state_reload
) },
145 { "efer_reload", VCPU_STAT(efer_reload
) },
146 { "fpu_reload", VCPU_STAT(fpu_reload
) },
147 { "insn_emulation", VCPU_STAT(insn_emulation
) },
148 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
149 { "irq_injections", VCPU_STAT(irq_injections
) },
150 { "nmi_injections", VCPU_STAT(nmi_injections
) },
151 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
152 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
153 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
154 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
155 { "mmu_flooded", VM_STAT(mmu_flooded
) },
156 { "mmu_recycled", VM_STAT(mmu_recycled
) },
157 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
158 { "mmu_unsync", VM_STAT(mmu_unsync
) },
159 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
160 { "largepages", VM_STAT(lpages
) },
164 u64 __read_mostly host_xcr0
;
166 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
168 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
171 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
172 vcpu
->arch
.apf
.gfns
[i
] = ~0;
175 static void kvm_on_user_return(struct user_return_notifier
*urn
)
178 struct kvm_shared_msrs
*locals
179 = container_of(urn
, struct kvm_shared_msrs
, urn
);
180 struct kvm_shared_msr_values
*values
;
182 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
183 values
= &locals
->values
[slot
];
184 if (values
->host
!= values
->curr
) {
185 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
186 values
->curr
= values
->host
;
189 locals
->registered
= false;
190 user_return_notifier_unregister(urn
);
193 static void shared_msr_update(unsigned slot
, u32 msr
)
196 unsigned int cpu
= smp_processor_id();
197 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
199 /* only read, and nobody should modify it at this time,
200 * so don't need lock */
201 if (slot
>= shared_msrs_global
.nr
) {
202 printk(KERN_ERR
"kvm: invalid MSR slot!");
205 rdmsrl_safe(msr
, &value
);
206 smsr
->values
[slot
].host
= value
;
207 smsr
->values
[slot
].curr
= value
;
210 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
212 if (slot
>= shared_msrs_global
.nr
)
213 shared_msrs_global
.nr
= slot
+ 1;
214 shared_msrs_global
.msrs
[slot
] = msr
;
215 /* we need ensured the shared_msr_global have been updated */
218 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
220 static void kvm_shared_msr_cpu_online(void)
224 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
225 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
228 void kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
230 unsigned int cpu
= smp_processor_id();
231 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
233 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
235 smsr
->values
[slot
].curr
= value
;
236 wrmsrl(shared_msrs_global
.msrs
[slot
], value
);
237 if (!smsr
->registered
) {
238 smsr
->urn
.on_user_return
= kvm_on_user_return
;
239 user_return_notifier_register(&smsr
->urn
);
240 smsr
->registered
= true;
243 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
245 static void drop_user_return_notifiers(void *ignore
)
247 unsigned int cpu
= smp_processor_id();
248 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
250 if (smsr
->registered
)
251 kvm_on_user_return(&smsr
->urn
);
254 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
256 return vcpu
->arch
.apic_base
;
258 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
260 void kvm_set_apic_base(struct kvm_vcpu
*vcpu
, u64 data
)
262 /* TODO: reserve bits check */
263 kvm_lapic_set_base(vcpu
, data
);
265 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
267 asmlinkage
void kvm_spurious_fault(void)
269 /* Fault while not rebooting. We want the trace. */
272 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
274 #define EXCPT_BENIGN 0
275 #define EXCPT_CONTRIBUTORY 1
278 static int exception_class(int vector
)
288 return EXCPT_CONTRIBUTORY
;
295 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
296 unsigned nr
, bool has_error
, u32 error_code
,
302 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
304 if (!vcpu
->arch
.exception
.pending
) {
306 vcpu
->arch
.exception
.pending
= true;
307 vcpu
->arch
.exception
.has_error_code
= has_error
;
308 vcpu
->arch
.exception
.nr
= nr
;
309 vcpu
->arch
.exception
.error_code
= error_code
;
310 vcpu
->arch
.exception
.reinject
= reinject
;
314 /* to check exception */
315 prev_nr
= vcpu
->arch
.exception
.nr
;
316 if (prev_nr
== DF_VECTOR
) {
317 /* triple fault -> shutdown */
318 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
321 class1
= exception_class(prev_nr
);
322 class2
= exception_class(nr
);
323 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
324 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
325 /* generate double fault per SDM Table 5-5 */
326 vcpu
->arch
.exception
.pending
= true;
327 vcpu
->arch
.exception
.has_error_code
= true;
328 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
329 vcpu
->arch
.exception
.error_code
= 0;
331 /* replace previous exception with a new one in a hope
332 that instruction re-execution will regenerate lost
337 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
339 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
341 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
343 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
345 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
347 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
349 void kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
352 kvm_inject_gp(vcpu
, 0);
354 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
356 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
358 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
360 ++vcpu
->stat
.pf_guest
;
361 vcpu
->arch
.cr2
= fault
->address
;
362 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
364 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
366 void kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
368 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
369 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
371 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
374 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
376 atomic_inc(&vcpu
->arch
.nmi_queued
);
377 kvm_make_request(KVM_REQ_NMI
, vcpu
);
379 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
381 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
383 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
385 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
387 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
389 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
391 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
394 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
395 * a #GP and return false.
397 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
399 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
401 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
404 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
407 * This function will be used to read from the physical memory of the currently
408 * running guest. The difference to kvm_read_guest_page is that this function
409 * can read from guest physical or from the guest's guest physical memory.
411 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
412 gfn_t ngfn
, void *data
, int offset
, int len
,
418 ngpa
= gfn_to_gpa(ngfn
);
419 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
);
420 if (real_gfn
== UNMAPPED_GVA
)
423 real_gfn
= gpa_to_gfn(real_gfn
);
425 return kvm_read_guest_page(vcpu
->kvm
, real_gfn
, data
, offset
, len
);
427 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
429 int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
430 void *data
, int offset
, int len
, u32 access
)
432 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
433 data
, offset
, len
, access
);
437 * Load the pae pdptrs. Return true is they are all valid.
439 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
441 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
442 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
445 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
447 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
448 offset
* sizeof(u64
), sizeof(pdpte
),
449 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
454 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
455 if (is_present_gpte(pdpte
[i
]) &&
456 (pdpte
[i
] & vcpu
->arch
.mmu
.rsvd_bits_mask
[0][2])) {
463 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
464 __set_bit(VCPU_EXREG_PDPTR
,
465 (unsigned long *)&vcpu
->arch
.regs_avail
);
466 __set_bit(VCPU_EXREG_PDPTR
,
467 (unsigned long *)&vcpu
->arch
.regs_dirty
);
472 EXPORT_SYMBOL_GPL(load_pdptrs
);
474 static bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
476 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
482 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
485 if (!test_bit(VCPU_EXREG_PDPTR
,
486 (unsigned long *)&vcpu
->arch
.regs_avail
))
489 gfn
= (kvm_read_cr3(vcpu
) & ~31u) >> PAGE_SHIFT
;
490 offset
= (kvm_read_cr3(vcpu
) & ~31u) & (PAGE_SIZE
- 1);
491 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
492 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
495 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
501 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
503 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
504 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
|
505 X86_CR0_CD
| X86_CR0_NW
;
510 if (cr0
& 0xffffffff00000000UL
)
514 cr0
&= ~CR0_RESERVED_BITS
;
516 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
519 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
522 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
524 if ((vcpu
->arch
.efer
& EFER_LME
)) {
529 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
534 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
539 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
542 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
544 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
545 kvm_clear_async_pf_completion_queue(vcpu
);
546 kvm_async_pf_hash_reset(vcpu
);
549 if ((cr0
^ old_cr0
) & update_bits
)
550 kvm_mmu_reset_context(vcpu
);
553 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
555 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
557 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
559 EXPORT_SYMBOL_GPL(kvm_lmsw
);
561 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
563 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
564 !vcpu
->guest_xcr0_loaded
) {
565 /* kvm_set_xcr() also depends on this */
566 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
567 vcpu
->guest_xcr0_loaded
= 1;
571 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
573 if (vcpu
->guest_xcr0_loaded
) {
574 if (vcpu
->arch
.xcr0
!= host_xcr0
)
575 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
576 vcpu
->guest_xcr0_loaded
= 0;
580 int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
585 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
586 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
589 if (!(xcr0
& XSTATE_FP
))
591 if ((xcr0
& XSTATE_YMM
) && !(xcr0
& XSTATE_SSE
))
595 * Do not allow the guest to set bits that we do not support
596 * saving. However, xcr0 bit 0 is always set, even if the
597 * emulated CPU does not support XSAVE (see fx_init).
599 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XSTATE_FP
;
600 if (xcr0
& ~valid_bits
)
603 kvm_put_guest_xcr0(vcpu
);
604 vcpu
->arch
.xcr0
= xcr0
;
608 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
610 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 ||
611 __kvm_set_xcr(vcpu
, index
, xcr
)) {
612 kvm_inject_gp(vcpu
, 0);
617 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
619 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
621 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
622 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
|
623 X86_CR4_PAE
| X86_CR4_SMEP
;
624 if (cr4
& CR4_RESERVED_BITS
)
627 if (!guest_cpuid_has_xsave(vcpu
) && (cr4
& X86_CR4_OSXSAVE
))
630 if (!guest_cpuid_has_smep(vcpu
) && (cr4
& X86_CR4_SMEP
))
633 if (!guest_cpuid_has_fsgsbase(vcpu
) && (cr4
& X86_CR4_FSGSBASE
))
636 if (is_long_mode(vcpu
)) {
637 if (!(cr4
& X86_CR4_PAE
))
639 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
640 && ((cr4
^ old_cr4
) & pdptr_bits
)
641 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
645 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
646 if (!guest_cpuid_has_pcid(vcpu
))
649 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
650 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
654 if (kvm_x86_ops
->set_cr4(vcpu
, cr4
))
657 if (((cr4
^ old_cr4
) & pdptr_bits
) ||
658 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
659 kvm_mmu_reset_context(vcpu
);
661 if ((cr4
^ old_cr4
) & X86_CR4_OSXSAVE
)
662 kvm_update_cpuid(vcpu
);
666 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
668 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
670 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
671 kvm_mmu_sync_roots(vcpu
);
672 kvm_mmu_flush_tlb(vcpu
);
676 if (is_long_mode(vcpu
)) {
677 if (kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
)) {
678 if (cr3
& CR3_PCID_ENABLED_RESERVED_BITS
)
681 if (cr3
& CR3_L_MODE_RESERVED_BITS
)
685 if (cr3
& CR3_PAE_RESERVED_BITS
)
687 if (is_paging(vcpu
) &&
688 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
692 * We don't check reserved bits in nonpae mode, because
693 * this isn't enforced, and VMware depends on this.
697 vcpu
->arch
.cr3
= cr3
;
698 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
699 kvm_mmu_new_cr3(vcpu
);
702 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
704 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
706 if (cr8
& CR8_RESERVED_BITS
)
708 if (irqchip_in_kernel(vcpu
->kvm
))
709 kvm_lapic_set_tpr(vcpu
, cr8
);
711 vcpu
->arch
.cr8
= cr8
;
714 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
716 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
718 if (irqchip_in_kernel(vcpu
->kvm
))
719 return kvm_lapic_get_cr8(vcpu
);
721 return vcpu
->arch
.cr8
;
723 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
725 static void kvm_update_dr6(struct kvm_vcpu
*vcpu
)
727 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
728 kvm_x86_ops
->set_dr6(vcpu
, vcpu
->arch
.dr6
);
731 static void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
735 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
736 dr7
= vcpu
->arch
.guest_debug_dr7
;
738 dr7
= vcpu
->arch
.dr7
;
739 kvm_x86_ops
->set_dr7(vcpu
, dr7
);
740 vcpu
->arch
.switch_db_regs
= (dr7
& DR7_BP_EN_MASK
);
743 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
747 vcpu
->arch
.db
[dr
] = val
;
748 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
749 vcpu
->arch
.eff_db
[dr
] = val
;
752 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
756 if (val
& 0xffffffff00000000ULL
)
758 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | DR6_FIXED_1
;
759 kvm_update_dr6(vcpu
);
762 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
766 if (val
& 0xffffffff00000000ULL
)
768 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
769 kvm_update_dr7(vcpu
);
776 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
780 res
= __kvm_set_dr(vcpu
, dr
, val
);
782 kvm_queue_exception(vcpu
, UD_VECTOR
);
784 kvm_inject_gp(vcpu
, 0);
788 EXPORT_SYMBOL_GPL(kvm_set_dr
);
790 static int _kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
794 *val
= vcpu
->arch
.db
[dr
];
797 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
801 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
802 *val
= vcpu
->arch
.dr6
;
804 *val
= kvm_x86_ops
->get_dr6(vcpu
);
807 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
811 *val
= vcpu
->arch
.dr7
;
818 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
820 if (_kvm_get_dr(vcpu
, dr
, val
)) {
821 kvm_queue_exception(vcpu
, UD_VECTOR
);
826 EXPORT_SYMBOL_GPL(kvm_get_dr
);
828 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
830 u32 ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
834 err
= kvm_pmu_read_pmc(vcpu
, ecx
, &data
);
837 kvm_register_write(vcpu
, VCPU_REGS_RAX
, (u32
)data
);
838 kvm_register_write(vcpu
, VCPU_REGS_RDX
, data
>> 32);
841 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
844 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
845 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
847 * This list is modified at module load time to reflect the
848 * capabilities of the host cpu. This capabilities test skips MSRs that are
849 * kvm-specific. Those are put in the beginning of the list.
852 #define KVM_SAVE_MSRS_BEGIN 12
853 static u32 msrs_to_save
[] = {
854 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
855 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
856 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
857 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
858 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
860 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
863 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
865 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
866 MSR_IA32_FEATURE_CONTROL
869 static unsigned num_msrs_to_save
;
871 static const u32 emulated_msrs
[] = {
873 MSR_IA32_TSCDEADLINE
,
874 MSR_IA32_MISC_ENABLE
,
879 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
881 if (efer
& efer_reserved_bits
)
884 if (efer
& EFER_FFXSR
) {
885 struct kvm_cpuid_entry2
*feat
;
887 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
888 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
)))
892 if (efer
& EFER_SVME
) {
893 struct kvm_cpuid_entry2
*feat
;
895 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
896 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
)))
902 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
904 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
906 u64 old_efer
= vcpu
->arch
.efer
;
908 if (!kvm_valid_efer(vcpu
, efer
))
912 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
916 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
918 kvm_x86_ops
->set_efer(vcpu
, efer
);
920 /* Update reserved bits */
921 if ((efer
^ old_efer
) & EFER_NX
)
922 kvm_mmu_reset_context(vcpu
);
927 void kvm_enable_efer_bits(u64 mask
)
929 efer_reserved_bits
&= ~mask
;
931 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
935 * Writes msr value into into the appropriate "register".
936 * Returns 0 on success, non-0 otherwise.
937 * Assumes vcpu_load() was already called.
939 int kvm_set_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
941 return kvm_x86_ops
->set_msr(vcpu
, msr
);
945 * Adapt set_msr() to msr_io()'s calling convention
947 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
953 msr
.host_initiated
= true;
954 return kvm_set_msr(vcpu
, &msr
);
958 struct pvclock_gtod_data
{
961 struct { /* extract of a clocksource struct */
969 /* open coded 'struct timespec' */
970 u64 monotonic_time_snsec
;
971 time_t monotonic_time_sec
;
974 static struct pvclock_gtod_data pvclock_gtod_data
;
976 static void update_pvclock_gtod(struct timekeeper
*tk
)
978 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
980 write_seqcount_begin(&vdata
->seq
);
982 /* copy pvclock gtod data */
983 vdata
->clock
.vclock_mode
= tk
->clock
->archdata
.vclock_mode
;
984 vdata
->clock
.cycle_last
= tk
->clock
->cycle_last
;
985 vdata
->clock
.mask
= tk
->clock
->mask
;
986 vdata
->clock
.mult
= tk
->mult
;
987 vdata
->clock
.shift
= tk
->shift
;
989 vdata
->monotonic_time_sec
= tk
->xtime_sec
990 + tk
->wall_to_monotonic
.tv_sec
;
991 vdata
->monotonic_time_snsec
= tk
->xtime_nsec
992 + (tk
->wall_to_monotonic
.tv_nsec
994 while (vdata
->monotonic_time_snsec
>=
995 (((u64
)NSEC_PER_SEC
) << tk
->shift
)) {
996 vdata
->monotonic_time_snsec
-=
997 ((u64
)NSEC_PER_SEC
) << tk
->shift
;
998 vdata
->monotonic_time_sec
++;
1001 write_seqcount_end(&vdata
->seq
);
1006 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
1010 struct pvclock_wall_clock wc
;
1011 struct timespec boot
;
1016 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1021 ++version
; /* first time write, random junk */
1025 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1028 * The guest calculates current wall clock time by adding
1029 * system time (updated by kvm_guest_time_update below) to the
1030 * wall clock specified here. guest system time equals host
1031 * system time for us, thus we must fill in host boot time here.
1035 if (kvm
->arch
.kvmclock_offset
) {
1036 struct timespec ts
= ns_to_timespec(kvm
->arch
.kvmclock_offset
);
1037 boot
= timespec_sub(boot
, ts
);
1039 wc
.sec
= boot
.tv_sec
;
1040 wc
.nsec
= boot
.tv_nsec
;
1041 wc
.version
= version
;
1043 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
1046 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1049 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
1051 uint32_t quotient
, remainder
;
1053 /* Don't try to replace with do_div(), this one calculates
1054 * "(dividend << 32) / divisor" */
1056 : "=a" (quotient
), "=d" (remainder
)
1057 : "0" (0), "1" (dividend
), "r" (divisor
) );
1061 static void kvm_get_time_scale(uint32_t scaled_khz
, uint32_t base_khz
,
1062 s8
*pshift
, u32
*pmultiplier
)
1069 tps64
= base_khz
* 1000LL;
1070 scaled64
= scaled_khz
* 1000LL;
1071 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
1076 tps32
= (uint32_t)tps64
;
1077 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
1078 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
1086 *pmultiplier
= div_frac(scaled64
, tps32
);
1088 pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1089 __func__
, base_khz
, scaled_khz
, shift
, *pmultiplier
);
1092 static inline u64
get_kernel_ns(void)
1096 WARN_ON(preemptible());
1098 monotonic_to_bootbased(&ts
);
1099 return timespec_to_ns(&ts
);
1102 #ifdef CONFIG_X86_64
1103 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
1106 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
1107 unsigned long max_tsc_khz
;
1109 static inline u64
nsec_to_cycles(struct kvm_vcpu
*vcpu
, u64 nsec
)
1111 return pvclock_scale_delta(nsec
, vcpu
->arch
.virtual_tsc_mult
,
1112 vcpu
->arch
.virtual_tsc_shift
);
1115 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
1117 u64 v
= (u64
)khz
* (1000000 + ppm
);
1122 static void kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 this_tsc_khz
)
1124 u32 thresh_lo
, thresh_hi
;
1125 int use_scaling
= 0;
1127 /* tsc_khz can be zero if TSC calibration fails */
1128 if (this_tsc_khz
== 0)
1131 /* Compute a scale to convert nanoseconds in TSC cycles */
1132 kvm_get_time_scale(this_tsc_khz
, NSEC_PER_SEC
/ 1000,
1133 &vcpu
->arch
.virtual_tsc_shift
,
1134 &vcpu
->arch
.virtual_tsc_mult
);
1135 vcpu
->arch
.virtual_tsc_khz
= this_tsc_khz
;
1138 * Compute the variation in TSC rate which is acceptable
1139 * within the range of tolerance and decide if the
1140 * rate being applied is within that bounds of the hardware
1141 * rate. If so, no scaling or compensation need be done.
1143 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
1144 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
1145 if (this_tsc_khz
< thresh_lo
|| this_tsc_khz
> thresh_hi
) {
1146 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz
, thresh_lo
, thresh_hi
);
1149 kvm_x86_ops
->set_tsc_khz(vcpu
, this_tsc_khz
, use_scaling
);
1152 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1154 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
1155 vcpu
->arch
.virtual_tsc_mult
,
1156 vcpu
->arch
.virtual_tsc_shift
);
1157 tsc
+= vcpu
->arch
.this_tsc_write
;
1161 void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
1163 #ifdef CONFIG_X86_64
1165 bool do_request
= false;
1166 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
1167 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1169 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1170 atomic_read(&vcpu
->kvm
->online_vcpus
));
1172 if (vcpus_matched
&& gtod
->clock
.vclock_mode
== VCLOCK_TSC
)
1173 if (!ka
->use_master_clock
)
1176 if (!vcpus_matched
&& ka
->use_master_clock
)
1180 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
1182 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
1183 atomic_read(&vcpu
->kvm
->online_vcpus
),
1184 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
1188 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu
*vcpu
, s64 offset
)
1190 u64 curr_offset
= kvm_x86_ops
->read_tsc_offset(vcpu
);
1191 vcpu
->arch
.ia32_tsc_adjust_msr
+= offset
- curr_offset
;
1194 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1196 struct kvm
*kvm
= vcpu
->kvm
;
1197 u64 offset
, ns
, elapsed
;
1198 unsigned long flags
;
1201 u64 data
= msr
->data
;
1203 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1204 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
, data
);
1205 ns
= get_kernel_ns();
1206 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1208 if (vcpu
->arch
.virtual_tsc_khz
) {
1211 /* n.b - signed multiplication and division required */
1212 usdiff
= data
- kvm
->arch
.last_tsc_write
;
1213 #ifdef CONFIG_X86_64
1214 usdiff
= (usdiff
* 1000) / vcpu
->arch
.virtual_tsc_khz
;
1216 /* do_div() only does unsigned */
1217 asm("1: idivl %[divisor]\n"
1218 "2: xor %%edx, %%edx\n"
1219 " movl $0, %[faulted]\n"
1221 ".section .fixup,\"ax\"\n"
1222 "4: movl $1, %[faulted]\n"
1226 _ASM_EXTABLE(1b
, 4b
)
1228 : "=A"(usdiff
), [faulted
] "=r" (faulted
)
1229 : "A"(usdiff
* 1000), [divisor
] "rm"(vcpu
->arch
.virtual_tsc_khz
));
1232 do_div(elapsed
, 1000);
1237 /* idivl overflow => difference is larger than USEC_PER_SEC */
1239 usdiff
= USEC_PER_SEC
;
1241 usdiff
= USEC_PER_SEC
; /* disable TSC match window below */
1244 * Special case: TSC write with a small delta (1 second) of virtual
1245 * cycle time against real time is interpreted as an attempt to
1246 * synchronize the CPU.
1248 * For a reliable TSC, we can match TSC offsets, and for an unstable
1249 * TSC, we add elapsed time in this computation. We could let the
1250 * compensation code attempt to catch up if we fall behind, but
1251 * it's better to try to match offsets from the beginning.
1253 if (usdiff
< USEC_PER_SEC
&&
1254 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
1255 if (!check_tsc_unstable()) {
1256 offset
= kvm
->arch
.cur_tsc_offset
;
1257 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1259 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
1261 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
, data
);
1262 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1267 * We split periods of matched TSC writes into generations.
1268 * For each generation, we track the original measured
1269 * nanosecond time, offset, and write, so if TSCs are in
1270 * sync, we can match exact offset, and if not, we can match
1271 * exact software computation in compute_guest_tsc()
1273 * These values are tracked in kvm->arch.cur_xxx variables.
1275 kvm
->arch
.cur_tsc_generation
++;
1276 kvm
->arch
.cur_tsc_nsec
= ns
;
1277 kvm
->arch
.cur_tsc_write
= data
;
1278 kvm
->arch
.cur_tsc_offset
= offset
;
1280 pr_debug("kvm: new tsc generation %u, clock %llu\n",
1281 kvm
->arch
.cur_tsc_generation
, data
);
1285 * We also track th most recent recorded KHZ, write and time to
1286 * allow the matching interval to be extended at each write.
1288 kvm
->arch
.last_tsc_nsec
= ns
;
1289 kvm
->arch
.last_tsc_write
= data
;
1290 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
1292 vcpu
->arch
.last_guest_tsc
= data
;
1294 /* Keep track of which generation this VCPU has synchronized to */
1295 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
1296 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
1297 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
1299 if (guest_cpuid_has_tsc_adjust(vcpu
) && !msr
->host_initiated
)
1300 update_ia32_tsc_adjust_msr(vcpu
, offset
);
1301 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1302 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1304 spin_lock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1306 kvm
->arch
.nr_vcpus_matched_tsc
++;
1308 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
1310 kvm_track_tsc_matching(vcpu
);
1311 spin_unlock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1314 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1316 #ifdef CONFIG_X86_64
1318 static cycle_t
read_tsc(void)
1324 * Empirically, a fence (of type that depends on the CPU)
1325 * before rdtsc is enough to ensure that rdtsc is ordered
1326 * with respect to loads. The various CPU manuals are unclear
1327 * as to whether rdtsc can be reordered with later loads,
1328 * but no one has ever seen it happen.
1331 ret
= (cycle_t
)vget_cycles();
1333 last
= pvclock_gtod_data
.clock
.cycle_last
;
1335 if (likely(ret
>= last
))
1339 * GCC likes to generate cmov here, but this branch is extremely
1340 * predictable (it's just a funciton of time and the likely is
1341 * very likely) and there's a data dependence, so force GCC
1342 * to generate a branch instead. I don't barrier() because
1343 * we don't actually need a barrier, and if this function
1344 * ever gets inlined it will generate worse code.
1350 static inline u64
vgettsc(cycle_t
*cycle_now
)
1353 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1355 *cycle_now
= read_tsc();
1357 v
= (*cycle_now
- gtod
->clock
.cycle_last
) & gtod
->clock
.mask
;
1358 return v
* gtod
->clock
.mult
;
1361 static int do_monotonic(struct timespec
*ts
, cycle_t
*cycle_now
)
1366 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1370 seq
= read_seqcount_begin(>od
->seq
);
1371 mode
= gtod
->clock
.vclock_mode
;
1372 ts
->tv_sec
= gtod
->monotonic_time_sec
;
1373 ns
= gtod
->monotonic_time_snsec
;
1374 ns
+= vgettsc(cycle_now
);
1375 ns
>>= gtod
->clock
.shift
;
1376 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1377 timespec_add_ns(ts
, ns
);
1382 /* returns true if host is using tsc clocksource */
1383 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, cycle_t
*cycle_now
)
1387 /* checked again under seqlock below */
1388 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1391 if (do_monotonic(&ts
, cycle_now
) != VCLOCK_TSC
)
1394 monotonic_to_bootbased(&ts
);
1395 *kernel_ns
= timespec_to_ns(&ts
);
1403 * Assuming a stable TSC across physical CPUS, and a stable TSC
1404 * across virtual CPUs, the following condition is possible.
1405 * Each numbered line represents an event visible to both
1406 * CPUs at the next numbered event.
1408 * "timespecX" represents host monotonic time. "tscX" represents
1411 * VCPU0 on CPU0 | VCPU1 on CPU1
1413 * 1. read timespec0,tsc0
1414 * 2. | timespec1 = timespec0 + N
1416 * 3. transition to guest | transition to guest
1417 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1418 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1419 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1421 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1424 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1426 * - 0 < N - M => M < N
1428 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1429 * always the case (the difference between two distinct xtime instances
1430 * might be smaller then the difference between corresponding TSC reads,
1431 * when updating guest vcpus pvclock areas).
1433 * To avoid that problem, do not allow visibility of distinct
1434 * system_timestamp/tsc_timestamp values simultaneously: use a master
1435 * copy of host monotonic time values. Update that master copy
1438 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1442 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
1444 #ifdef CONFIG_X86_64
1445 struct kvm_arch
*ka
= &kvm
->arch
;
1447 bool host_tsc_clocksource
, vcpus_matched
;
1449 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1450 atomic_read(&kvm
->online_vcpus
));
1453 * If the host uses TSC clock, then passthrough TSC as stable
1456 host_tsc_clocksource
= kvm_get_time_and_clockread(
1457 &ka
->master_kernel_ns
,
1458 &ka
->master_cycle_now
);
1460 ka
->use_master_clock
= host_tsc_clocksource
& vcpus_matched
;
1462 if (ka
->use_master_clock
)
1463 atomic_set(&kvm_guest_has_master_clock
, 1);
1465 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
1466 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
1471 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
1473 #ifdef CONFIG_X86_64
1475 struct kvm_vcpu
*vcpu
;
1476 struct kvm_arch
*ka
= &kvm
->arch
;
1478 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1479 kvm_make_mclock_inprogress_request(kvm
);
1480 /* no guest entries from this point */
1481 pvclock_update_vm_gtod_copy(kvm
);
1483 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1484 set_bit(KVM_REQ_CLOCK_UPDATE
, &vcpu
->requests
);
1486 /* guest entries allowed */
1487 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1488 clear_bit(KVM_REQ_MCLOCK_INPROGRESS
, &vcpu
->requests
);
1490 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1494 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1496 unsigned long flags
, this_tsc_khz
;
1497 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1498 struct kvm_arch
*ka
= &v
->kvm
->arch
;
1500 u64 tsc_timestamp
, host_tsc
;
1501 struct pvclock_vcpu_time_info guest_hv_clock
;
1503 bool use_master_clock
;
1509 * If the host uses TSC clock, then passthrough TSC as stable
1512 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1513 use_master_clock
= ka
->use_master_clock
;
1514 if (use_master_clock
) {
1515 host_tsc
= ka
->master_cycle_now
;
1516 kernel_ns
= ka
->master_kernel_ns
;
1518 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1520 /* Keep irq disabled to prevent changes to the clock */
1521 local_irq_save(flags
);
1522 this_tsc_khz
= __get_cpu_var(cpu_tsc_khz
);
1523 if (unlikely(this_tsc_khz
== 0)) {
1524 local_irq_restore(flags
);
1525 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1528 if (!use_master_clock
) {
1529 host_tsc
= native_read_tsc();
1530 kernel_ns
= get_kernel_ns();
1533 tsc_timestamp
= kvm_x86_ops
->read_l1_tsc(v
, host_tsc
);
1536 * We may have to catch up the TSC to match elapsed wall clock
1537 * time for two reasons, even if kvmclock is used.
1538 * 1) CPU could have been running below the maximum TSC rate
1539 * 2) Broken TSC compensation resets the base at each VCPU
1540 * entry to avoid unknown leaps of TSC even when running
1541 * again on the same CPU. This may cause apparent elapsed
1542 * time to disappear, and the guest to stand still or run
1545 if (vcpu
->tsc_catchup
) {
1546 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1547 if (tsc
> tsc_timestamp
) {
1548 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
1549 tsc_timestamp
= tsc
;
1553 local_irq_restore(flags
);
1555 if (!vcpu
->pv_time_enabled
)
1558 if (unlikely(vcpu
->hw_tsc_khz
!= this_tsc_khz
)) {
1559 kvm_get_time_scale(NSEC_PER_SEC
/ 1000, this_tsc_khz
,
1560 &vcpu
->hv_clock
.tsc_shift
,
1561 &vcpu
->hv_clock
.tsc_to_system_mul
);
1562 vcpu
->hw_tsc_khz
= this_tsc_khz
;
1565 /* With all the info we got, fill in the values */
1566 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
1567 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
1568 vcpu
->last_kernel_ns
= kernel_ns
;
1569 vcpu
->last_guest_tsc
= tsc_timestamp
;
1572 * The interface expects us to write an even number signaling that the
1573 * update is finished. Since the guest won't see the intermediate
1574 * state, we just increase by 2 at the end.
1576 vcpu
->hv_clock
.version
+= 2;
1578 if (unlikely(kvm_read_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1579 &guest_hv_clock
, sizeof(guest_hv_clock
))))
1582 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1583 pvclock_flags
= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
1585 if (vcpu
->pvclock_set_guest_stopped_request
) {
1586 pvclock_flags
|= PVCLOCK_GUEST_STOPPED
;
1587 vcpu
->pvclock_set_guest_stopped_request
= false;
1590 /* If the host uses TSC clocksource, then it is stable */
1591 if (use_master_clock
)
1592 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
1594 vcpu
->hv_clock
.flags
= pvclock_flags
;
1596 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1598 sizeof(vcpu
->hv_clock
));
1603 * kvmclock updates which are isolated to a given vcpu, such as
1604 * vcpu->cpu migration, should not allow system_timestamp from
1605 * the rest of the vcpus to remain static. Otherwise ntp frequency
1606 * correction applies to one vcpu's system_timestamp but not
1609 * So in those cases, request a kvmclock update for all vcpus.
1610 * The worst case for a remote vcpu to update its kvmclock
1611 * is then bounded by maximum nohz sleep latency.
1614 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
1617 struct kvm
*kvm
= v
->kvm
;
1618 struct kvm_vcpu
*vcpu
;
1620 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
1621 set_bit(KVM_REQ_CLOCK_UPDATE
, &vcpu
->requests
);
1622 kvm_vcpu_kick(vcpu
);
1626 static bool msr_mtrr_valid(unsigned msr
)
1629 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR
- 1:
1630 case MSR_MTRRfix64K_00000
:
1631 case MSR_MTRRfix16K_80000
:
1632 case MSR_MTRRfix16K_A0000
:
1633 case MSR_MTRRfix4K_C0000
:
1634 case MSR_MTRRfix4K_C8000
:
1635 case MSR_MTRRfix4K_D0000
:
1636 case MSR_MTRRfix4K_D8000
:
1637 case MSR_MTRRfix4K_E0000
:
1638 case MSR_MTRRfix4K_E8000
:
1639 case MSR_MTRRfix4K_F0000
:
1640 case MSR_MTRRfix4K_F8000
:
1641 case MSR_MTRRdefType
:
1642 case MSR_IA32_CR_PAT
:
1650 static bool valid_pat_type(unsigned t
)
1652 return t
< 8 && (1 << t
) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1655 static bool valid_mtrr_type(unsigned t
)
1657 return t
< 8 && (1 << t
) & 0x73; /* 0, 1, 4, 5, 6 */
1660 static bool mtrr_valid(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1664 if (!msr_mtrr_valid(msr
))
1667 if (msr
== MSR_IA32_CR_PAT
) {
1668 for (i
= 0; i
< 8; i
++)
1669 if (!valid_pat_type((data
>> (i
* 8)) & 0xff))
1672 } else if (msr
== MSR_MTRRdefType
) {
1675 return valid_mtrr_type(data
& 0xff);
1676 } else if (msr
>= MSR_MTRRfix64K_00000
&& msr
<= MSR_MTRRfix4K_F8000
) {
1677 for (i
= 0; i
< 8 ; i
++)
1678 if (!valid_mtrr_type((data
>> (i
* 8)) & 0xff))
1683 /* variable MTRRs */
1684 return valid_mtrr_type(data
& 0xff);
1687 static int set_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1689 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
1691 if (!mtrr_valid(vcpu
, msr
, data
))
1694 if (msr
== MSR_MTRRdefType
) {
1695 vcpu
->arch
.mtrr_state
.def_type
= data
;
1696 vcpu
->arch
.mtrr_state
.enabled
= (data
& 0xc00) >> 10;
1697 } else if (msr
== MSR_MTRRfix64K_00000
)
1699 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
1700 p
[1 + msr
- MSR_MTRRfix16K_80000
] = data
;
1701 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
1702 p
[3 + msr
- MSR_MTRRfix4K_C0000
] = data
;
1703 else if (msr
== MSR_IA32_CR_PAT
)
1704 vcpu
->arch
.pat
= data
;
1705 else { /* Variable MTRRs */
1706 int idx
, is_mtrr_mask
;
1709 idx
= (msr
- 0x200) / 2;
1710 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
1713 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
1716 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
1720 kvm_mmu_reset_context(vcpu
);
1724 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1726 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1727 unsigned bank_num
= mcg_cap
& 0xff;
1730 case MSR_IA32_MCG_STATUS
:
1731 vcpu
->arch
.mcg_status
= data
;
1733 case MSR_IA32_MCG_CTL
:
1734 if (!(mcg_cap
& MCG_CTL_P
))
1736 if (data
!= 0 && data
!= ~(u64
)0)
1738 vcpu
->arch
.mcg_ctl
= data
;
1741 if (msr
>= MSR_IA32_MC0_CTL
&&
1742 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
1743 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1744 /* only 0 or all 1s can be written to IA32_MCi_CTL
1745 * some Linux kernels though clear bit 10 in bank 4 to
1746 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1747 * this to avoid an uncatched #GP in the guest
1749 if ((offset
& 0x3) == 0 &&
1750 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
1752 vcpu
->arch
.mce_banks
[offset
] = data
;
1760 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
1762 struct kvm
*kvm
= vcpu
->kvm
;
1763 int lm
= is_long_mode(vcpu
);
1764 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
1765 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
1766 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
1767 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
1768 u32 page_num
= data
& ~PAGE_MASK
;
1769 u64 page_addr
= data
& PAGE_MASK
;
1774 if (page_num
>= blob_size
)
1777 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
1782 if (kvm_write_guest(kvm
, page_addr
, page
, PAGE_SIZE
))
1791 static bool kvm_hv_hypercall_enabled(struct kvm
*kvm
)
1793 return kvm
->arch
.hv_hypercall
& HV_X64_MSR_HYPERCALL_ENABLE
;
1796 static bool kvm_hv_msr_partition_wide(u32 msr
)
1800 case HV_X64_MSR_GUEST_OS_ID
:
1801 case HV_X64_MSR_HYPERCALL
:
1802 case HV_X64_MSR_REFERENCE_TSC
:
1803 case HV_X64_MSR_TIME_REF_COUNT
:
1811 static int set_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1813 struct kvm
*kvm
= vcpu
->kvm
;
1816 case HV_X64_MSR_GUEST_OS_ID
:
1817 kvm
->arch
.hv_guest_os_id
= data
;
1818 /* setting guest os id to zero disables hypercall page */
1819 if (!kvm
->arch
.hv_guest_os_id
)
1820 kvm
->arch
.hv_hypercall
&= ~HV_X64_MSR_HYPERCALL_ENABLE
;
1822 case HV_X64_MSR_HYPERCALL
: {
1827 /* if guest os id is not set hypercall should remain disabled */
1828 if (!kvm
->arch
.hv_guest_os_id
)
1830 if (!(data
& HV_X64_MSR_HYPERCALL_ENABLE
)) {
1831 kvm
->arch
.hv_hypercall
= data
;
1834 gfn
= data
>> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT
;
1835 addr
= gfn_to_hva(kvm
, gfn
);
1836 if (kvm_is_error_hva(addr
))
1838 kvm_x86_ops
->patch_hypercall(vcpu
, instructions
);
1839 ((unsigned char *)instructions
)[3] = 0xc3; /* ret */
1840 if (__copy_to_user((void __user
*)addr
, instructions
, 4))
1842 kvm
->arch
.hv_hypercall
= data
;
1845 case HV_X64_MSR_REFERENCE_TSC
: {
1847 HV_REFERENCE_TSC_PAGE tsc_ref
;
1848 memset(&tsc_ref
, 0, sizeof(tsc_ref
));
1849 kvm
->arch
.hv_tsc_page
= data
;
1850 if (!(data
& HV_X64_MSR_TSC_REFERENCE_ENABLE
))
1852 gfn
= data
>> HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT
;
1853 if (kvm_write_guest(kvm
, data
,
1854 &tsc_ref
, sizeof(tsc_ref
)))
1856 mark_page_dirty(kvm
, gfn
);
1860 vcpu_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1861 "data 0x%llx\n", msr
, data
);
1867 static int set_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1870 case HV_X64_MSR_APIC_ASSIST_PAGE
: {
1873 if (!(data
& HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE
)) {
1874 vcpu
->arch
.hv_vapic
= data
;
1877 addr
= gfn_to_hva(vcpu
->kvm
, data
>>
1878 HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT
);
1879 if (kvm_is_error_hva(addr
))
1881 if (__clear_user((void __user
*)addr
, PAGE_SIZE
))
1883 vcpu
->arch
.hv_vapic
= data
;
1886 case HV_X64_MSR_EOI
:
1887 return kvm_hv_vapic_msr_write(vcpu
, APIC_EOI
, data
);
1888 case HV_X64_MSR_ICR
:
1889 return kvm_hv_vapic_msr_write(vcpu
, APIC_ICR
, data
);
1890 case HV_X64_MSR_TPR
:
1891 return kvm_hv_vapic_msr_write(vcpu
, APIC_TASKPRI
, data
);
1893 vcpu_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1894 "data 0x%llx\n", msr
, data
);
1901 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
1903 gpa_t gpa
= data
& ~0x3f;
1905 /* Bits 2:5 are reserved, Should be zero */
1909 vcpu
->arch
.apf
.msr_val
= data
;
1911 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
1912 kvm_clear_async_pf_completion_queue(vcpu
);
1913 kvm_async_pf_hash_reset(vcpu
);
1917 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
1921 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
1922 kvm_async_pf_wakeup_all(vcpu
);
1926 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
1928 vcpu
->arch
.pv_time_enabled
= false;
1931 static void accumulate_steal_time(struct kvm_vcpu
*vcpu
)
1935 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
1938 delta
= current
->sched_info
.run_delay
- vcpu
->arch
.st
.last_steal
;
1939 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
1940 vcpu
->arch
.st
.accum_steal
= delta
;
1943 static void record_steal_time(struct kvm_vcpu
*vcpu
)
1945 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
1948 if (unlikely(kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
1949 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
))))
1952 vcpu
->arch
.st
.steal
.steal
+= vcpu
->arch
.st
.accum_steal
;
1953 vcpu
->arch
.st
.steal
.version
+= 2;
1954 vcpu
->arch
.st
.accum_steal
= 0;
1956 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
1957 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
1960 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
1963 u32 msr
= msr_info
->index
;
1964 u64 data
= msr_info
->data
;
1967 case MSR_AMD64_NB_CFG
:
1968 case MSR_IA32_UCODE_REV
:
1969 case MSR_IA32_UCODE_WRITE
:
1970 case MSR_VM_HSAVE_PA
:
1971 case MSR_AMD64_PATCH_LOADER
:
1972 case MSR_AMD64_BU_CFG2
:
1976 return set_efer(vcpu
, data
);
1978 data
&= ~(u64
)0x40; /* ignore flush filter disable */
1979 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
1980 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
1982 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
1987 case MSR_FAM10H_MMIO_CONF_BASE
:
1989 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
1994 case MSR_IA32_DEBUGCTLMSR
:
1996 /* We support the non-activated case already */
1998 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
1999 /* Values other than LBR and BTF are vendor-specific,
2000 thus reserved and should throw a #GP */
2003 vcpu_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2006 case 0x200 ... 0x2ff:
2007 return set_msr_mtrr(vcpu
, msr
, data
);
2008 case MSR_IA32_APICBASE
:
2009 kvm_set_apic_base(vcpu
, data
);
2011 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2012 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
2013 case MSR_IA32_TSCDEADLINE
:
2014 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
2016 case MSR_IA32_TSC_ADJUST
:
2017 if (guest_cpuid_has_tsc_adjust(vcpu
)) {
2018 if (!msr_info
->host_initiated
) {
2019 u64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
2020 kvm_x86_ops
->adjust_tsc_offset(vcpu
, adj
, true);
2022 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
2025 case MSR_IA32_MISC_ENABLE
:
2026 vcpu
->arch
.ia32_misc_enable_msr
= data
;
2028 case MSR_KVM_WALL_CLOCK_NEW
:
2029 case MSR_KVM_WALL_CLOCK
:
2030 vcpu
->kvm
->arch
.wall_clock
= data
;
2031 kvm_write_wall_clock(vcpu
->kvm
, data
);
2033 case MSR_KVM_SYSTEM_TIME_NEW
:
2034 case MSR_KVM_SYSTEM_TIME
: {
2036 kvmclock_reset(vcpu
);
2038 vcpu
->arch
.time
= data
;
2039 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2041 /* we verify if the enable bit is set... */
2045 gpa_offset
= data
& ~(PAGE_MASK
| 1);
2047 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2048 &vcpu
->arch
.pv_time
, data
& ~1ULL,
2049 sizeof(struct pvclock_vcpu_time_info
)))
2050 vcpu
->arch
.pv_time_enabled
= false;
2052 vcpu
->arch
.pv_time_enabled
= true;
2056 case MSR_KVM_ASYNC_PF_EN
:
2057 if (kvm_pv_enable_async_pf(vcpu
, data
))
2060 case MSR_KVM_STEAL_TIME
:
2062 if (unlikely(!sched_info_on()))
2065 if (data
& KVM_STEAL_RESERVED_MASK
)
2068 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2069 data
& KVM_STEAL_VALID_BITS
,
2070 sizeof(struct kvm_steal_time
)))
2073 vcpu
->arch
.st
.msr_val
= data
;
2075 if (!(data
& KVM_MSR_ENABLED
))
2078 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2081 accumulate_steal_time(vcpu
);
2084 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2087 case MSR_KVM_PV_EOI_EN
:
2088 if (kvm_lapic_enable_pv_eoi(vcpu
, data
))
2092 case MSR_IA32_MCG_CTL
:
2093 case MSR_IA32_MCG_STATUS
:
2094 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
2095 return set_msr_mce(vcpu
, msr
, data
);
2097 /* Performance counters are not protected by a CPUID bit,
2098 * so we should check all of them in the generic path for the sake of
2099 * cross vendor migration.
2100 * Writing a zero into the event select MSRs disables them,
2101 * which we perfectly emulate ;-). Any other value should be at least
2102 * reported, some guests depend on them.
2104 case MSR_K7_EVNTSEL0
:
2105 case MSR_K7_EVNTSEL1
:
2106 case MSR_K7_EVNTSEL2
:
2107 case MSR_K7_EVNTSEL3
:
2109 vcpu_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
2110 "0x%x data 0x%llx\n", msr
, data
);
2112 /* at least RHEL 4 unconditionally writes to the perfctr registers,
2113 * so we ignore writes to make it happy.
2115 case MSR_K7_PERFCTR0
:
2116 case MSR_K7_PERFCTR1
:
2117 case MSR_K7_PERFCTR2
:
2118 case MSR_K7_PERFCTR3
:
2119 vcpu_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
2120 "0x%x data 0x%llx\n", msr
, data
);
2122 case MSR_P6_PERFCTR0
:
2123 case MSR_P6_PERFCTR1
:
2125 case MSR_P6_EVNTSEL0
:
2126 case MSR_P6_EVNTSEL1
:
2127 if (kvm_pmu_msr(vcpu
, msr
))
2128 return kvm_pmu_set_msr(vcpu
, msr_info
);
2130 if (pr
|| data
!= 0)
2131 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
2132 "0x%x data 0x%llx\n", msr
, data
);
2134 case MSR_K7_CLK_CTL
:
2136 * Ignore all writes to this no longer documented MSR.
2137 * Writes are only relevant for old K7 processors,
2138 * all pre-dating SVM, but a recommended workaround from
2139 * AMD for these chips. It is possible to specify the
2140 * affected processor models on the command line, hence
2141 * the need to ignore the workaround.
2144 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2145 if (kvm_hv_msr_partition_wide(msr
)) {
2147 mutex_lock(&vcpu
->kvm
->lock
);
2148 r
= set_msr_hyperv_pw(vcpu
, msr
, data
);
2149 mutex_unlock(&vcpu
->kvm
->lock
);
2152 return set_msr_hyperv(vcpu
, msr
, data
);
2154 case MSR_IA32_BBL_CR_CTL3
:
2155 /* Drop writes to this legacy MSR -- see rdmsr
2156 * counterpart for further detail.
2158 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n", msr
, data
);
2160 case MSR_AMD64_OSVW_ID_LENGTH
:
2161 if (!guest_cpuid_has_osvw(vcpu
))
2163 vcpu
->arch
.osvw
.length
= data
;
2165 case MSR_AMD64_OSVW_STATUS
:
2166 if (!guest_cpuid_has_osvw(vcpu
))
2168 vcpu
->arch
.osvw
.status
= data
;
2171 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
2172 return xen_hvm_config(vcpu
, data
);
2173 if (kvm_pmu_msr(vcpu
, msr
))
2174 return kvm_pmu_set_msr(vcpu
, msr_info
);
2176 vcpu_unimpl(vcpu
, "unhandled wrmsr: 0x%x data %llx\n",
2180 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n",
2187 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
2191 * Reads an msr value (of 'msr_index') into 'pdata'.
2192 * Returns 0 on success, non-0 otherwise.
2193 * Assumes vcpu_load() was already called.
2195 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
2197 return kvm_x86_ops
->get_msr(vcpu
, msr_index
, pdata
);
2200 static int get_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2202 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
2204 if (!msr_mtrr_valid(msr
))
2207 if (msr
== MSR_MTRRdefType
)
2208 *pdata
= vcpu
->arch
.mtrr_state
.def_type
+
2209 (vcpu
->arch
.mtrr_state
.enabled
<< 10);
2210 else if (msr
== MSR_MTRRfix64K_00000
)
2212 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
2213 *pdata
= p
[1 + msr
- MSR_MTRRfix16K_80000
];
2214 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
2215 *pdata
= p
[3 + msr
- MSR_MTRRfix4K_C0000
];
2216 else if (msr
== MSR_IA32_CR_PAT
)
2217 *pdata
= vcpu
->arch
.pat
;
2218 else { /* Variable MTRRs */
2219 int idx
, is_mtrr_mask
;
2222 idx
= (msr
- 0x200) / 2;
2223 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
2226 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
2229 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
2236 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2239 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2240 unsigned bank_num
= mcg_cap
& 0xff;
2243 case MSR_IA32_P5_MC_ADDR
:
2244 case MSR_IA32_P5_MC_TYPE
:
2247 case MSR_IA32_MCG_CAP
:
2248 data
= vcpu
->arch
.mcg_cap
;
2250 case MSR_IA32_MCG_CTL
:
2251 if (!(mcg_cap
& MCG_CTL_P
))
2253 data
= vcpu
->arch
.mcg_ctl
;
2255 case MSR_IA32_MCG_STATUS
:
2256 data
= vcpu
->arch
.mcg_status
;
2259 if (msr
>= MSR_IA32_MC0_CTL
&&
2260 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
2261 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2262 data
= vcpu
->arch
.mce_banks
[offset
];
2271 static int get_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2274 struct kvm
*kvm
= vcpu
->kvm
;
2277 case HV_X64_MSR_GUEST_OS_ID
:
2278 data
= kvm
->arch
.hv_guest_os_id
;
2280 case HV_X64_MSR_HYPERCALL
:
2281 data
= kvm
->arch
.hv_hypercall
;
2283 case HV_X64_MSR_TIME_REF_COUNT
: {
2285 div_u64(get_kernel_ns() + kvm
->arch
.kvmclock_offset
, 100);
2288 case HV_X64_MSR_REFERENCE_TSC
:
2289 data
= kvm
->arch
.hv_tsc_page
;
2292 vcpu_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
2300 static int get_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2305 case HV_X64_MSR_VP_INDEX
: {
2308 kvm_for_each_vcpu(r
, v
, vcpu
->kvm
)
2313 case HV_X64_MSR_EOI
:
2314 return kvm_hv_vapic_msr_read(vcpu
, APIC_EOI
, pdata
);
2315 case HV_X64_MSR_ICR
:
2316 return kvm_hv_vapic_msr_read(vcpu
, APIC_ICR
, pdata
);
2317 case HV_X64_MSR_TPR
:
2318 return kvm_hv_vapic_msr_read(vcpu
, APIC_TASKPRI
, pdata
);
2319 case HV_X64_MSR_APIC_ASSIST_PAGE
:
2320 data
= vcpu
->arch
.hv_vapic
;
2323 vcpu_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
2330 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2335 case MSR_IA32_PLATFORM_ID
:
2336 case MSR_IA32_EBL_CR_POWERON
:
2337 case MSR_IA32_DEBUGCTLMSR
:
2338 case MSR_IA32_LASTBRANCHFROMIP
:
2339 case MSR_IA32_LASTBRANCHTOIP
:
2340 case MSR_IA32_LASTINTFROMIP
:
2341 case MSR_IA32_LASTINTTOIP
:
2344 case MSR_VM_HSAVE_PA
:
2345 case MSR_K7_EVNTSEL0
:
2346 case MSR_K7_PERFCTR0
:
2347 case MSR_K8_INT_PENDING_MSG
:
2348 case MSR_AMD64_NB_CFG
:
2349 case MSR_FAM10H_MMIO_CONF_BASE
:
2350 case MSR_AMD64_BU_CFG2
:
2353 case MSR_P6_PERFCTR0
:
2354 case MSR_P6_PERFCTR1
:
2355 case MSR_P6_EVNTSEL0
:
2356 case MSR_P6_EVNTSEL1
:
2357 if (kvm_pmu_msr(vcpu
, msr
))
2358 return kvm_pmu_get_msr(vcpu
, msr
, pdata
);
2361 case MSR_IA32_UCODE_REV
:
2362 data
= 0x100000000ULL
;
2365 data
= 0x500 | KVM_NR_VAR_MTRR
;
2367 case 0x200 ... 0x2ff:
2368 return get_msr_mtrr(vcpu
, msr
, pdata
);
2369 case 0xcd: /* fsb frequency */
2373 * MSR_EBC_FREQUENCY_ID
2374 * Conservative value valid for even the basic CPU models.
2375 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2376 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2377 * and 266MHz for model 3, or 4. Set Core Clock
2378 * Frequency to System Bus Frequency Ratio to 1 (bits
2379 * 31:24) even though these are only valid for CPU
2380 * models > 2, however guests may end up dividing or
2381 * multiplying by zero otherwise.
2383 case MSR_EBC_FREQUENCY_ID
:
2386 case MSR_IA32_APICBASE
:
2387 data
= kvm_get_apic_base(vcpu
);
2389 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2390 return kvm_x2apic_msr_read(vcpu
, msr
, pdata
);
2392 case MSR_IA32_TSCDEADLINE
:
2393 data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
2395 case MSR_IA32_TSC_ADJUST
:
2396 data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
2398 case MSR_IA32_MISC_ENABLE
:
2399 data
= vcpu
->arch
.ia32_misc_enable_msr
;
2401 case MSR_IA32_PERF_STATUS
:
2402 /* TSC increment by tick */
2404 /* CPU multiplier */
2405 data
|= (((uint64_t)4ULL) << 40);
2408 data
= vcpu
->arch
.efer
;
2410 case MSR_KVM_WALL_CLOCK
:
2411 case MSR_KVM_WALL_CLOCK_NEW
:
2412 data
= vcpu
->kvm
->arch
.wall_clock
;
2414 case MSR_KVM_SYSTEM_TIME
:
2415 case MSR_KVM_SYSTEM_TIME_NEW
:
2416 data
= vcpu
->arch
.time
;
2418 case MSR_KVM_ASYNC_PF_EN
:
2419 data
= vcpu
->arch
.apf
.msr_val
;
2421 case MSR_KVM_STEAL_TIME
:
2422 data
= vcpu
->arch
.st
.msr_val
;
2424 case MSR_KVM_PV_EOI_EN
:
2425 data
= vcpu
->arch
.pv_eoi
.msr_val
;
2427 case MSR_IA32_P5_MC_ADDR
:
2428 case MSR_IA32_P5_MC_TYPE
:
2429 case MSR_IA32_MCG_CAP
:
2430 case MSR_IA32_MCG_CTL
:
2431 case MSR_IA32_MCG_STATUS
:
2432 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
2433 return get_msr_mce(vcpu
, msr
, pdata
);
2434 case MSR_K7_CLK_CTL
:
2436 * Provide expected ramp-up count for K7. All other
2437 * are set to zero, indicating minimum divisors for
2440 * This prevents guest kernels on AMD host with CPU
2441 * type 6, model 8 and higher from exploding due to
2442 * the rdmsr failing.
2446 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2447 if (kvm_hv_msr_partition_wide(msr
)) {
2449 mutex_lock(&vcpu
->kvm
->lock
);
2450 r
= get_msr_hyperv_pw(vcpu
, msr
, pdata
);
2451 mutex_unlock(&vcpu
->kvm
->lock
);
2454 return get_msr_hyperv(vcpu
, msr
, pdata
);
2456 case MSR_IA32_BBL_CR_CTL3
:
2457 /* This legacy MSR exists but isn't fully documented in current
2458 * silicon. It is however accessed by winxp in very narrow
2459 * scenarios where it sets bit #19, itself documented as
2460 * a "reserved" bit. Best effort attempt to source coherent
2461 * read data here should the balance of the register be
2462 * interpreted by the guest:
2464 * L2 cache control register 3: 64GB range, 256KB size,
2465 * enabled, latency 0x1, configured
2469 case MSR_AMD64_OSVW_ID_LENGTH
:
2470 if (!guest_cpuid_has_osvw(vcpu
))
2472 data
= vcpu
->arch
.osvw
.length
;
2474 case MSR_AMD64_OSVW_STATUS
:
2475 if (!guest_cpuid_has_osvw(vcpu
))
2477 data
= vcpu
->arch
.osvw
.status
;
2480 if (kvm_pmu_msr(vcpu
, msr
))
2481 return kvm_pmu_get_msr(vcpu
, msr
, pdata
);
2483 vcpu_unimpl(vcpu
, "unhandled rdmsr: 0x%x\n", msr
);
2486 vcpu_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr
);
2494 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
2497 * Read or write a bunch of msrs. All parameters are kernel addresses.
2499 * @return number of msrs set successfully.
2501 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
2502 struct kvm_msr_entry
*entries
,
2503 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2504 unsigned index
, u64
*data
))
2508 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2509 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
2510 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
2512 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2518 * Read or write a bunch of msrs. Parameters are user addresses.
2520 * @return number of msrs set successfully.
2522 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
2523 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2524 unsigned index
, u64
*data
),
2527 struct kvm_msrs msrs
;
2528 struct kvm_msr_entry
*entries
;
2533 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
2537 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
2540 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
2541 entries
= memdup_user(user_msrs
->entries
, size
);
2542 if (IS_ERR(entries
)) {
2543 r
= PTR_ERR(entries
);
2547 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
2552 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
2563 int kvm_dev_ioctl_check_extension(long ext
)
2568 case KVM_CAP_IRQCHIP
:
2570 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
2571 case KVM_CAP_SET_TSS_ADDR
:
2572 case KVM_CAP_EXT_CPUID
:
2573 case KVM_CAP_EXT_EMUL_CPUID
:
2574 case KVM_CAP_CLOCKSOURCE
:
2576 case KVM_CAP_NOP_IO_DELAY
:
2577 case KVM_CAP_MP_STATE
:
2578 case KVM_CAP_SYNC_MMU
:
2579 case KVM_CAP_USER_NMI
:
2580 case KVM_CAP_REINJECT_CONTROL
:
2581 case KVM_CAP_IRQ_INJECT_STATUS
:
2583 case KVM_CAP_IOEVENTFD
:
2585 case KVM_CAP_PIT_STATE2
:
2586 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
2587 case KVM_CAP_XEN_HVM
:
2588 case KVM_CAP_ADJUST_CLOCK
:
2589 case KVM_CAP_VCPU_EVENTS
:
2590 case KVM_CAP_HYPERV
:
2591 case KVM_CAP_HYPERV_VAPIC
:
2592 case KVM_CAP_HYPERV_SPIN
:
2593 case KVM_CAP_PCI_SEGMENT
:
2594 case KVM_CAP_DEBUGREGS
:
2595 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
2597 case KVM_CAP_ASYNC_PF
:
2598 case KVM_CAP_GET_TSC_KHZ
:
2599 case KVM_CAP_KVMCLOCK_CTRL
:
2600 case KVM_CAP_READONLY_MEM
:
2601 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2602 case KVM_CAP_ASSIGN_DEV_IRQ
:
2603 case KVM_CAP_PCI_2_3
:
2604 case KVM_CAP_HYPERV_TIME
:
2608 case KVM_CAP_COALESCED_MMIO
:
2609 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
2612 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
2614 case KVM_CAP_NR_VCPUS
:
2615 r
= KVM_SOFT_MAX_VCPUS
;
2617 case KVM_CAP_MAX_VCPUS
:
2620 case KVM_CAP_NR_MEMSLOTS
:
2621 r
= KVM_USER_MEM_SLOTS
;
2623 case KVM_CAP_PV_MMU
: /* obsolete */
2626 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2628 r
= iommu_present(&pci_bus_type
);
2632 r
= KVM_MAX_MCE_BANKS
;
2637 case KVM_CAP_TSC_CONTROL
:
2638 r
= kvm_has_tsc_control
;
2640 case KVM_CAP_TSC_DEADLINE_TIMER
:
2641 r
= boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER
);
2651 long kvm_arch_dev_ioctl(struct file
*filp
,
2652 unsigned int ioctl
, unsigned long arg
)
2654 void __user
*argp
= (void __user
*)arg
;
2658 case KVM_GET_MSR_INDEX_LIST
: {
2659 struct kvm_msr_list __user
*user_msr_list
= argp
;
2660 struct kvm_msr_list msr_list
;
2664 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2667 msr_list
.nmsrs
= num_msrs_to_save
+ ARRAY_SIZE(emulated_msrs
);
2668 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2671 if (n
< msr_list
.nmsrs
)
2674 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2675 num_msrs_to_save
* sizeof(u32
)))
2677 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2679 ARRAY_SIZE(emulated_msrs
) * sizeof(u32
)))
2684 case KVM_GET_SUPPORTED_CPUID
:
2685 case KVM_GET_EMULATED_CPUID
: {
2686 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2687 struct kvm_cpuid2 cpuid
;
2690 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2693 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
2699 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2704 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2707 mce_cap
= KVM_MCE_CAP_SUPPORTED
;
2709 if (copy_to_user(argp
, &mce_cap
, sizeof mce_cap
))
2721 static void wbinvd_ipi(void *garbage
)
2726 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2728 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
2731 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2733 /* Address WBINVD may be executed by guest */
2734 if (need_emulate_wbinvd(vcpu
)) {
2735 if (kvm_x86_ops
->has_wbinvd_exit())
2736 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2737 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2738 smp_call_function_single(vcpu
->cpu
,
2739 wbinvd_ipi
, NULL
, 1);
2742 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2744 /* Apply any externally detected TSC adjustments (due to suspend) */
2745 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
2746 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
2747 vcpu
->arch
.tsc_offset_adjustment
= 0;
2748 set_bit(KVM_REQ_CLOCK_UPDATE
, &vcpu
->requests
);
2751 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2752 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
2753 native_read_tsc() - vcpu
->arch
.last_host_tsc
;
2755 mark_tsc_unstable("KVM discovered backwards TSC");
2756 if (check_tsc_unstable()) {
2757 u64 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
,
2758 vcpu
->arch
.last_guest_tsc
);
2759 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
2760 vcpu
->arch
.tsc_catchup
= 1;
2763 * On a host with synchronized TSC, there is no need to update
2764 * kvmclock on vcpu->cpu migration
2766 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
2767 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2768 if (vcpu
->cpu
!= cpu
)
2769 kvm_migrate_timers(vcpu
);
2773 accumulate_steal_time(vcpu
);
2774 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2777 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
2779 kvm_x86_ops
->vcpu_put(vcpu
);
2780 kvm_put_guest_fpu(vcpu
);
2781 vcpu
->arch
.last_host_tsc
= native_read_tsc();
2784 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
2785 struct kvm_lapic_state
*s
)
2787 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
2788 memcpy(s
->regs
, vcpu
->arch
.apic
->regs
, sizeof *s
);
2793 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
2794 struct kvm_lapic_state
*s
)
2796 kvm_apic_post_state_restore(vcpu
, s
);
2797 update_cr8_intercept(vcpu
);
2802 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
2803 struct kvm_interrupt
*irq
)
2805 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
2807 if (irqchip_in_kernel(vcpu
->kvm
))
2810 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
2811 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2816 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
2818 kvm_inject_nmi(vcpu
);
2823 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
2824 struct kvm_tpr_access_ctl
*tac
)
2828 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
2832 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
2836 unsigned bank_num
= mcg_cap
& 0xff, bank
;
2839 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
2841 if (mcg_cap
& ~(KVM_MCE_CAP_SUPPORTED
| 0xff | 0xff0000))
2844 vcpu
->arch
.mcg_cap
= mcg_cap
;
2845 /* Init IA32_MCG_CTL to all 1s */
2846 if (mcg_cap
& MCG_CTL_P
)
2847 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
2848 /* Init IA32_MCi_CTL to all 1s */
2849 for (bank
= 0; bank
< bank_num
; bank
++)
2850 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
2855 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
2856 struct kvm_x86_mce
*mce
)
2858 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2859 unsigned bank_num
= mcg_cap
& 0xff;
2860 u64
*banks
= vcpu
->arch
.mce_banks
;
2862 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
2865 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2866 * reporting is disabled
2868 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
2869 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
2871 banks
+= 4 * mce
->bank
;
2873 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2874 * reporting is disabled for the bank
2876 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
2878 if (mce
->status
& MCI_STATUS_UC
) {
2879 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
2880 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
2881 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
2884 if (banks
[1] & MCI_STATUS_VAL
)
2885 mce
->status
|= MCI_STATUS_OVER
;
2886 banks
[2] = mce
->addr
;
2887 banks
[3] = mce
->misc
;
2888 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
2889 banks
[1] = mce
->status
;
2890 kvm_queue_exception(vcpu
, MC_VECTOR
);
2891 } else if (!(banks
[1] & MCI_STATUS_VAL
)
2892 || !(banks
[1] & MCI_STATUS_UC
)) {
2893 if (banks
[1] & MCI_STATUS_VAL
)
2894 mce
->status
|= MCI_STATUS_OVER
;
2895 banks
[2] = mce
->addr
;
2896 banks
[3] = mce
->misc
;
2897 banks
[1] = mce
->status
;
2899 banks
[1] |= MCI_STATUS_OVER
;
2903 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
2904 struct kvm_vcpu_events
*events
)
2907 events
->exception
.injected
=
2908 vcpu
->arch
.exception
.pending
&&
2909 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
2910 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
2911 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
2912 events
->exception
.pad
= 0;
2913 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
2915 events
->interrupt
.injected
=
2916 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
2917 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
2918 events
->interrupt
.soft
= 0;
2919 events
->interrupt
.shadow
=
2920 kvm_x86_ops
->get_interrupt_shadow(vcpu
,
2921 KVM_X86_SHADOW_INT_MOV_SS
| KVM_X86_SHADOW_INT_STI
);
2923 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
2924 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
2925 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
2926 events
->nmi
.pad
= 0;
2928 events
->sipi_vector
= 0; /* never valid when reporting to user space */
2930 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
2931 | KVM_VCPUEVENT_VALID_SHADOW
);
2932 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
2935 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
2936 struct kvm_vcpu_events
*events
)
2938 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2939 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2940 | KVM_VCPUEVENT_VALID_SHADOW
))
2944 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
2945 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
2946 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
2947 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
2949 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
2950 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
2951 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
2952 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
2953 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
2954 events
->interrupt
.shadow
);
2956 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
2957 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
2958 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
2959 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
2961 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
2962 kvm_vcpu_has_lapic(vcpu
))
2963 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
2965 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2970 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
2971 struct kvm_debugregs
*dbgregs
)
2975 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
2976 _kvm_get_dr(vcpu
, 6, &val
);
2978 dbgregs
->dr7
= vcpu
->arch
.dr7
;
2980 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
2983 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
2984 struct kvm_debugregs
*dbgregs
)
2989 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
2990 vcpu
->arch
.dr6
= dbgregs
->dr6
;
2991 kvm_update_dr6(vcpu
);
2992 vcpu
->arch
.dr7
= dbgregs
->dr7
;
2993 kvm_update_dr7(vcpu
);
2998 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
2999 struct kvm_xsave
*guest_xsave
)
3001 if (cpu_has_xsave
) {
3002 memcpy(guest_xsave
->region
,
3003 &vcpu
->arch
.guest_fpu
.state
->xsave
,
3004 vcpu
->arch
.guest_xstate_size
);
3005 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] &=
3006 vcpu
->arch
.guest_supported_xcr0
| XSTATE_FPSSE
;
3008 memcpy(guest_xsave
->region
,
3009 &vcpu
->arch
.guest_fpu
.state
->fxsave
,
3010 sizeof(struct i387_fxsave_struct
));
3011 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
3016 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
3017 struct kvm_xsave
*guest_xsave
)
3020 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
3022 if (cpu_has_xsave
) {
3024 * Here we allow setting states that are not present in
3025 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3026 * with old userspace.
3028 if (xstate_bv
& ~KVM_SUPPORTED_XCR0
)
3030 if (xstate_bv
& ~host_xcr0
)
3032 memcpy(&vcpu
->arch
.guest_fpu
.state
->xsave
,
3033 guest_xsave
->region
, vcpu
->arch
.guest_xstate_size
);
3035 if (xstate_bv
& ~XSTATE_FPSSE
)
3037 memcpy(&vcpu
->arch
.guest_fpu
.state
->fxsave
,
3038 guest_xsave
->region
, sizeof(struct i387_fxsave_struct
));
3043 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
3044 struct kvm_xcrs
*guest_xcrs
)
3046 if (!cpu_has_xsave
) {
3047 guest_xcrs
->nr_xcrs
= 0;
3051 guest_xcrs
->nr_xcrs
= 1;
3052 guest_xcrs
->flags
= 0;
3053 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
3054 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
3057 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
3058 struct kvm_xcrs
*guest_xcrs
)
3065 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
3068 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
3069 /* Only support XCR0 currently */
3070 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
3071 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
3072 guest_xcrs
->xcrs
[i
].value
);
3081 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3082 * stopped by the hypervisor. This function will be called from the host only.
3083 * EINVAL is returned when the host attempts to set the flag for a guest that
3084 * does not support pv clocks.
3086 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
3088 if (!vcpu
->arch
.pv_time_enabled
)
3090 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
3091 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3095 long kvm_arch_vcpu_ioctl(struct file
*filp
,
3096 unsigned int ioctl
, unsigned long arg
)
3098 struct kvm_vcpu
*vcpu
= filp
->private_data
;
3099 void __user
*argp
= (void __user
*)arg
;
3102 struct kvm_lapic_state
*lapic
;
3103 struct kvm_xsave
*xsave
;
3104 struct kvm_xcrs
*xcrs
;
3110 case KVM_GET_LAPIC
: {
3112 if (!vcpu
->arch
.apic
)
3114 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
3119 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
3123 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
3128 case KVM_SET_LAPIC
: {
3130 if (!vcpu
->arch
.apic
)
3132 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
3133 if (IS_ERR(u
.lapic
))
3134 return PTR_ERR(u
.lapic
);
3136 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
3139 case KVM_INTERRUPT
: {
3140 struct kvm_interrupt irq
;
3143 if (copy_from_user(&irq
, argp
, sizeof irq
))
3145 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
3149 r
= kvm_vcpu_ioctl_nmi(vcpu
);
3152 case KVM_SET_CPUID
: {
3153 struct kvm_cpuid __user
*cpuid_arg
= argp
;
3154 struct kvm_cpuid cpuid
;
3157 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3159 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
3162 case KVM_SET_CPUID2
: {
3163 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3164 struct kvm_cpuid2 cpuid
;
3167 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3169 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
3170 cpuid_arg
->entries
);
3173 case KVM_GET_CPUID2
: {
3174 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3175 struct kvm_cpuid2 cpuid
;
3178 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3180 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
3181 cpuid_arg
->entries
);
3185 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
3191 r
= msr_io(vcpu
, argp
, kvm_get_msr
, 1);
3194 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
3196 case KVM_TPR_ACCESS_REPORTING
: {
3197 struct kvm_tpr_access_ctl tac
;
3200 if (copy_from_user(&tac
, argp
, sizeof tac
))
3202 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
3206 if (copy_to_user(argp
, &tac
, sizeof tac
))
3211 case KVM_SET_VAPIC_ADDR
: {
3212 struct kvm_vapic_addr va
;
3215 if (!irqchip_in_kernel(vcpu
->kvm
))
3218 if (copy_from_user(&va
, argp
, sizeof va
))
3220 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
3223 case KVM_X86_SETUP_MCE
: {
3227 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
3229 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
3232 case KVM_X86_SET_MCE
: {
3233 struct kvm_x86_mce mce
;
3236 if (copy_from_user(&mce
, argp
, sizeof mce
))
3238 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
3241 case KVM_GET_VCPU_EVENTS
: {
3242 struct kvm_vcpu_events events
;
3244 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
3247 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
3252 case KVM_SET_VCPU_EVENTS
: {
3253 struct kvm_vcpu_events events
;
3256 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
3259 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
3262 case KVM_GET_DEBUGREGS
: {
3263 struct kvm_debugregs dbgregs
;
3265 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
3268 if (copy_to_user(argp
, &dbgregs
,
3269 sizeof(struct kvm_debugregs
)))
3274 case KVM_SET_DEBUGREGS
: {
3275 struct kvm_debugregs dbgregs
;
3278 if (copy_from_user(&dbgregs
, argp
,
3279 sizeof(struct kvm_debugregs
)))
3282 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
3285 case KVM_GET_XSAVE
: {
3286 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
3291 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
3294 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
3299 case KVM_SET_XSAVE
: {
3300 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
3301 if (IS_ERR(u
.xsave
))
3302 return PTR_ERR(u
.xsave
);
3304 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
3307 case KVM_GET_XCRS
: {
3308 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3313 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
3316 if (copy_to_user(argp
, u
.xcrs
,
3317 sizeof(struct kvm_xcrs
)))
3322 case KVM_SET_XCRS
: {
3323 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
3325 return PTR_ERR(u
.xcrs
);
3327 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
3330 case KVM_SET_TSC_KHZ
: {
3334 user_tsc_khz
= (u32
)arg
;
3336 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
3339 if (user_tsc_khz
== 0)
3340 user_tsc_khz
= tsc_khz
;
3342 kvm_set_tsc_khz(vcpu
, user_tsc_khz
);
3347 case KVM_GET_TSC_KHZ
: {
3348 r
= vcpu
->arch
.virtual_tsc_khz
;
3351 case KVM_KVMCLOCK_CTRL
: {
3352 r
= kvm_set_guest_paused(vcpu
);
3363 int kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
3365 return VM_FAULT_SIGBUS
;
3368 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
3372 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
3374 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
3378 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3381 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3385 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3386 u32 kvm_nr_mmu_pages
)
3388 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3391 mutex_lock(&kvm
->slots_lock
);
3393 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3394 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3396 mutex_unlock(&kvm
->slots_lock
);
3400 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3402 return kvm
->arch
.n_max_mmu_pages
;
3405 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3410 switch (chip
->chip_id
) {
3411 case KVM_IRQCHIP_PIC_MASTER
:
3412 memcpy(&chip
->chip
.pic
,
3413 &pic_irqchip(kvm
)->pics
[0],
3414 sizeof(struct kvm_pic_state
));
3416 case KVM_IRQCHIP_PIC_SLAVE
:
3417 memcpy(&chip
->chip
.pic
,
3418 &pic_irqchip(kvm
)->pics
[1],
3419 sizeof(struct kvm_pic_state
));
3421 case KVM_IRQCHIP_IOAPIC
:
3422 r
= kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3431 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3436 switch (chip
->chip_id
) {
3437 case KVM_IRQCHIP_PIC_MASTER
:
3438 spin_lock(&pic_irqchip(kvm
)->lock
);
3439 memcpy(&pic_irqchip(kvm
)->pics
[0],
3441 sizeof(struct kvm_pic_state
));
3442 spin_unlock(&pic_irqchip(kvm
)->lock
);
3444 case KVM_IRQCHIP_PIC_SLAVE
:
3445 spin_lock(&pic_irqchip(kvm
)->lock
);
3446 memcpy(&pic_irqchip(kvm
)->pics
[1],
3448 sizeof(struct kvm_pic_state
));
3449 spin_unlock(&pic_irqchip(kvm
)->lock
);
3451 case KVM_IRQCHIP_IOAPIC
:
3452 r
= kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3458 kvm_pic_update_irq(pic_irqchip(kvm
));
3462 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3466 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3467 memcpy(ps
, &kvm
->arch
.vpit
->pit_state
, sizeof(struct kvm_pit_state
));
3468 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3472 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3476 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3477 memcpy(&kvm
->arch
.vpit
->pit_state
, ps
, sizeof(struct kvm_pit_state
));
3478 kvm_pit_load_count(kvm
, 0, ps
->channels
[0].count
, 0);
3479 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3483 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3487 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3488 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3489 sizeof(ps
->channels
));
3490 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3491 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3492 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
3496 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3498 int r
= 0, start
= 0;
3499 u32 prev_legacy
, cur_legacy
;
3500 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3501 prev_legacy
= kvm
->arch
.vpit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3502 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3503 if (!prev_legacy
&& cur_legacy
)
3505 memcpy(&kvm
->arch
.vpit
->pit_state
.channels
, &ps
->channels
,
3506 sizeof(kvm
->arch
.vpit
->pit_state
.channels
));
3507 kvm
->arch
.vpit
->pit_state
.flags
= ps
->flags
;
3508 kvm_pit_load_count(kvm
, 0, kvm
->arch
.vpit
->pit_state
.channels
[0].count
, start
);
3509 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3513 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
3514 struct kvm_reinject_control
*control
)
3516 if (!kvm
->arch
.vpit
)
3518 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3519 kvm
->arch
.vpit
->pit_state
.reinject
= control
->pit_reinject
;
3520 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3525 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3526 * @kvm: kvm instance
3527 * @log: slot id and address to which we copy the log
3529 * We need to keep it in mind that VCPU threads can write to the bitmap
3530 * concurrently. So, to avoid losing data, we keep the following order for
3533 * 1. Take a snapshot of the bit and clear it if needed.
3534 * 2. Write protect the corresponding page.
3535 * 3. Flush TLB's if needed.
3536 * 4. Copy the snapshot to the userspace.
3538 * Between 2 and 3, the guest may write to the page using the remaining TLB
3539 * entry. This is not a problem because the page will be reported dirty at
3540 * step 4 using the snapshot taken before and step 3 ensures that successive
3541 * writes will be logged for the next call.
3543 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
, struct kvm_dirty_log
*log
)
3546 struct kvm_memory_slot
*memslot
;
3548 unsigned long *dirty_bitmap
;
3549 unsigned long *dirty_bitmap_buffer
;
3550 bool is_dirty
= false;
3552 mutex_lock(&kvm
->slots_lock
);
3555 if (log
->slot
>= KVM_USER_MEM_SLOTS
)
3558 memslot
= id_to_memslot(kvm
->memslots
, log
->slot
);
3560 dirty_bitmap
= memslot
->dirty_bitmap
;
3565 n
= kvm_dirty_bitmap_bytes(memslot
);
3567 dirty_bitmap_buffer
= dirty_bitmap
+ n
/ sizeof(long);
3568 memset(dirty_bitmap_buffer
, 0, n
);
3570 spin_lock(&kvm
->mmu_lock
);
3572 for (i
= 0; i
< n
/ sizeof(long); i
++) {
3576 if (!dirty_bitmap
[i
])
3581 mask
= xchg(&dirty_bitmap
[i
], 0);
3582 dirty_bitmap_buffer
[i
] = mask
;
3584 offset
= i
* BITS_PER_LONG
;
3585 kvm_mmu_write_protect_pt_masked(kvm
, memslot
, offset
, mask
);
3588 kvm_flush_remote_tlbs(kvm
);
3590 spin_unlock(&kvm
->mmu_lock
);
3593 if (copy_to_user(log
->dirty_bitmap
, dirty_bitmap_buffer
, n
))
3598 mutex_unlock(&kvm
->slots_lock
);
3602 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
3605 if (!irqchip_in_kernel(kvm
))
3608 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
3609 irq_event
->irq
, irq_event
->level
,
3614 long kvm_arch_vm_ioctl(struct file
*filp
,
3615 unsigned int ioctl
, unsigned long arg
)
3617 struct kvm
*kvm
= filp
->private_data
;
3618 void __user
*argp
= (void __user
*)arg
;
3621 * This union makes it completely explicit to gcc-3.x
3622 * that these two variables' stack usage should be
3623 * combined, not added together.
3626 struct kvm_pit_state ps
;
3627 struct kvm_pit_state2 ps2
;
3628 struct kvm_pit_config pit_config
;
3632 case KVM_SET_TSS_ADDR
:
3633 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
3635 case KVM_SET_IDENTITY_MAP_ADDR
: {
3639 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
3641 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
3644 case KVM_SET_NR_MMU_PAGES
:
3645 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
3647 case KVM_GET_NR_MMU_PAGES
:
3648 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
3650 case KVM_CREATE_IRQCHIP
: {
3651 struct kvm_pic
*vpic
;
3653 mutex_lock(&kvm
->lock
);
3656 goto create_irqchip_unlock
;
3658 if (atomic_read(&kvm
->online_vcpus
))
3659 goto create_irqchip_unlock
;
3661 vpic
= kvm_create_pic(kvm
);
3663 r
= kvm_ioapic_init(kvm
);
3665 mutex_lock(&kvm
->slots_lock
);
3666 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3668 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3670 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3672 mutex_unlock(&kvm
->slots_lock
);
3674 goto create_irqchip_unlock
;
3677 goto create_irqchip_unlock
;
3679 kvm
->arch
.vpic
= vpic
;
3681 r
= kvm_setup_default_irq_routing(kvm
);
3683 mutex_lock(&kvm
->slots_lock
);
3684 mutex_lock(&kvm
->irq_lock
);
3685 kvm_ioapic_destroy(kvm
);
3686 kvm_destroy_pic(kvm
);
3687 mutex_unlock(&kvm
->irq_lock
);
3688 mutex_unlock(&kvm
->slots_lock
);
3690 create_irqchip_unlock
:
3691 mutex_unlock(&kvm
->lock
);
3694 case KVM_CREATE_PIT
:
3695 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
3697 case KVM_CREATE_PIT2
:
3699 if (copy_from_user(&u
.pit_config
, argp
,
3700 sizeof(struct kvm_pit_config
)))
3703 mutex_lock(&kvm
->slots_lock
);
3706 goto create_pit_unlock
;
3708 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
3712 mutex_unlock(&kvm
->slots_lock
);
3714 case KVM_GET_IRQCHIP
: {
3715 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3716 struct kvm_irqchip
*chip
;
3718 chip
= memdup_user(argp
, sizeof(*chip
));
3725 if (!irqchip_in_kernel(kvm
))
3726 goto get_irqchip_out
;
3727 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
3729 goto get_irqchip_out
;
3731 if (copy_to_user(argp
, chip
, sizeof *chip
))
3732 goto get_irqchip_out
;
3738 case KVM_SET_IRQCHIP
: {
3739 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3740 struct kvm_irqchip
*chip
;
3742 chip
= memdup_user(argp
, sizeof(*chip
));
3749 if (!irqchip_in_kernel(kvm
))
3750 goto set_irqchip_out
;
3751 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
3753 goto set_irqchip_out
;
3761 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
3764 if (!kvm
->arch
.vpit
)
3766 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
3770 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
3777 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
3780 if (!kvm
->arch
.vpit
)
3782 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
3785 case KVM_GET_PIT2
: {
3787 if (!kvm
->arch
.vpit
)
3789 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
3793 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
3798 case KVM_SET_PIT2
: {
3800 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
3803 if (!kvm
->arch
.vpit
)
3805 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
3808 case KVM_REINJECT_CONTROL
: {
3809 struct kvm_reinject_control control
;
3811 if (copy_from_user(&control
, argp
, sizeof(control
)))
3813 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
3816 case KVM_XEN_HVM_CONFIG
: {
3818 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
3819 sizeof(struct kvm_xen_hvm_config
)))
3822 if (kvm
->arch
.xen_hvm_config
.flags
)
3827 case KVM_SET_CLOCK
: {
3828 struct kvm_clock_data user_ns
;
3833 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
3841 local_irq_disable();
3842 now_ns
= get_kernel_ns();
3843 delta
= user_ns
.clock
- now_ns
;
3845 kvm
->arch
.kvmclock_offset
= delta
;
3846 kvm_gen_update_masterclock(kvm
);
3849 case KVM_GET_CLOCK
: {
3850 struct kvm_clock_data user_ns
;
3853 local_irq_disable();
3854 now_ns
= get_kernel_ns();
3855 user_ns
.clock
= kvm
->arch
.kvmclock_offset
+ now_ns
;
3858 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
3861 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
3874 static void kvm_init_msr_list(void)
3879 /* skip the first msrs in the list. KVM-specific */
3880 for (i
= j
= KVM_SAVE_MSRS_BEGIN
; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
3881 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
3884 msrs_to_save
[j
] = msrs_to_save
[i
];
3887 num_msrs_to_save
= j
;
3890 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
3898 if (!(vcpu
->arch
.apic
&&
3899 !kvm_iodevice_write(&vcpu
->arch
.apic
->dev
, addr
, n
, v
))
3900 && kvm_io_bus_write(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, n
, v
))
3911 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
3918 if (!(vcpu
->arch
.apic
&&
3919 !kvm_iodevice_read(&vcpu
->arch
.apic
->dev
, addr
, n
, v
))
3920 && kvm_io_bus_read(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, n
, v
))
3922 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, *(u64
*)v
);
3932 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
3933 struct kvm_segment
*var
, int seg
)
3935 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
3938 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
3939 struct kvm_segment
*var
, int seg
)
3941 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
3944 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
)
3947 struct x86_exception exception
;
3949 BUG_ON(!mmu_is_nested(vcpu
));
3951 /* NPT walks are always user-walks */
3952 access
|= PFERR_USER_MASK
;
3953 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, &exception
);
3958 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
3959 struct x86_exception
*exception
)
3961 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3962 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
3965 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
3966 struct x86_exception
*exception
)
3968 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3969 access
|= PFERR_FETCH_MASK
;
3970 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
3973 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
3974 struct x86_exception
*exception
)
3976 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3977 access
|= PFERR_WRITE_MASK
;
3978 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
3981 /* uses this to access any guest's mapped memory without checking CPL */
3982 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
3983 struct x86_exception
*exception
)
3985 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
3988 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
3989 struct kvm_vcpu
*vcpu
, u32 access
,
3990 struct x86_exception
*exception
)
3993 int r
= X86EMUL_CONTINUE
;
3996 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
3998 unsigned offset
= addr
& (PAGE_SIZE
-1);
3999 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4002 if (gpa
== UNMAPPED_GVA
)
4003 return X86EMUL_PROPAGATE_FAULT
;
4004 ret
= kvm_read_guest(vcpu
->kvm
, gpa
, data
, toread
);
4006 r
= X86EMUL_IO_NEEDED
;
4018 /* used for instruction fetching */
4019 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4020 gva_t addr
, void *val
, unsigned int bytes
,
4021 struct x86_exception
*exception
)
4023 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4024 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4026 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
,
4027 access
| PFERR_FETCH_MASK
,
4031 int kvm_read_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4032 gva_t addr
, void *val
, unsigned int bytes
,
4033 struct x86_exception
*exception
)
4035 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4036 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4038 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
4041 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
4043 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4044 gva_t addr
, void *val
, unsigned int bytes
,
4045 struct x86_exception
*exception
)
4047 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4048 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, exception
);
4051 int kvm_write_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4052 gva_t addr
, void *val
,
4054 struct x86_exception
*exception
)
4056 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4058 int r
= X86EMUL_CONTINUE
;
4061 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
4064 unsigned offset
= addr
& (PAGE_SIZE
-1);
4065 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4068 if (gpa
== UNMAPPED_GVA
)
4069 return X86EMUL_PROPAGATE_FAULT
;
4070 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, data
, towrite
);
4072 r
= X86EMUL_IO_NEEDED
;
4083 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
4085 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4086 gpa_t
*gpa
, struct x86_exception
*exception
,
4089 u32 access
= ((kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
4090 | (write
? PFERR_WRITE_MASK
: 0);
4092 if (vcpu_match_mmio_gva(vcpu
, gva
)
4093 && !permission_fault(vcpu
->arch
.walk_mmu
, vcpu
->arch
.access
, access
)) {
4094 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
4095 (gva
& (PAGE_SIZE
- 1));
4096 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
4100 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4102 if (*gpa
== UNMAPPED_GVA
)
4105 /* For APIC access vmexit */
4106 if ((*gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4109 if (vcpu_match_mmio_gpa(vcpu
, *gpa
)) {
4110 trace_vcpu_match_mmio(gva
, *gpa
, write
, true);
4117 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4118 const void *val
, int bytes
)
4122 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, val
, bytes
);
4125 kvm_mmu_pte_write(vcpu
, gpa
, val
, bytes
);
4129 struct read_write_emulator_ops
{
4130 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
4132 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4133 void *val
, int bytes
);
4134 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4135 int bytes
, void *val
);
4136 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4137 void *val
, int bytes
);
4141 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
4143 if (vcpu
->mmio_read_completed
) {
4144 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
4145 vcpu
->mmio_fragments
[0].gpa
, *(u64
*)val
);
4146 vcpu
->mmio_read_completed
= 0;
4153 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4154 void *val
, int bytes
)
4156 return !kvm_read_guest(vcpu
->kvm
, gpa
, val
, bytes
);
4159 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4160 void *val
, int bytes
)
4162 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
4165 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
4167 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
4168 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
4171 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4172 void *val
, int bytes
)
4174 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
4175 return X86EMUL_IO_NEEDED
;
4178 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4179 void *val
, int bytes
)
4181 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
4183 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
4184 return X86EMUL_CONTINUE
;
4187 static const struct read_write_emulator_ops read_emultor
= {
4188 .read_write_prepare
= read_prepare
,
4189 .read_write_emulate
= read_emulate
,
4190 .read_write_mmio
= vcpu_mmio_read
,
4191 .read_write_exit_mmio
= read_exit_mmio
,
4194 static const struct read_write_emulator_ops write_emultor
= {
4195 .read_write_emulate
= write_emulate
,
4196 .read_write_mmio
= write_mmio
,
4197 .read_write_exit_mmio
= write_exit_mmio
,
4201 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
4203 struct x86_exception
*exception
,
4204 struct kvm_vcpu
*vcpu
,
4205 const struct read_write_emulator_ops
*ops
)
4209 bool write
= ops
->write
;
4210 struct kvm_mmio_fragment
*frag
;
4212 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
4215 return X86EMUL_PROPAGATE_FAULT
;
4217 /* For APIC access vmexit */
4221 if (ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
4222 return X86EMUL_CONTINUE
;
4226 * Is this MMIO handled locally?
4228 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
4229 if (handled
== bytes
)
4230 return X86EMUL_CONTINUE
;
4236 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
4237 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
4241 return X86EMUL_CONTINUE
;
4244 int emulator_read_write(struct x86_emulate_ctxt
*ctxt
, unsigned long addr
,
4245 void *val
, unsigned int bytes
,
4246 struct x86_exception
*exception
,
4247 const struct read_write_emulator_ops
*ops
)
4249 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4253 if (ops
->read_write_prepare
&&
4254 ops
->read_write_prepare(vcpu
, val
, bytes
))
4255 return X86EMUL_CONTINUE
;
4257 vcpu
->mmio_nr_fragments
= 0;
4259 /* Crossing a page boundary? */
4260 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
4263 now
= -addr
& ~PAGE_MASK
;
4264 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
4267 if (rc
!= X86EMUL_CONTINUE
)
4274 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
4276 if (rc
!= X86EMUL_CONTINUE
)
4279 if (!vcpu
->mmio_nr_fragments
)
4282 gpa
= vcpu
->mmio_fragments
[0].gpa
;
4284 vcpu
->mmio_needed
= 1;
4285 vcpu
->mmio_cur_fragment
= 0;
4287 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
4288 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
4289 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
4290 vcpu
->run
->mmio
.phys_addr
= gpa
;
4292 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
4295 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
4299 struct x86_exception
*exception
)
4301 return emulator_read_write(ctxt
, addr
, val
, bytes
,
4302 exception
, &read_emultor
);
4305 int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
4309 struct x86_exception
*exception
)
4311 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
4312 exception
, &write_emultor
);
4315 #define CMPXCHG_TYPE(t, ptr, old, new) \
4316 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4318 #ifdef CONFIG_X86_64
4319 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4321 # define CMPXCHG64(ptr, old, new) \
4322 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4325 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
4330 struct x86_exception
*exception
)
4332 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4338 /* guests cmpxchg8b have to be emulated atomically */
4339 if (bytes
> 8 || (bytes
& (bytes
- 1)))
4342 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
4344 if (gpa
== UNMAPPED_GVA
||
4345 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4348 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
4351 page
= gfn_to_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
4352 if (is_error_page(page
))
4355 kaddr
= kmap_atomic(page
);
4356 kaddr
+= offset_in_page(gpa
);
4359 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
4362 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
4365 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
4368 exchanged
= CMPXCHG64(kaddr
, old
, new);
4373 kunmap_atomic(kaddr
);
4374 kvm_release_page_dirty(page
);
4377 return X86EMUL_CMPXCHG_FAILED
;
4379 kvm_mmu_pte_write(vcpu
, gpa
, new, bytes
);
4381 return X86EMUL_CONTINUE
;
4384 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
4386 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
4389 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
4391 /* TODO: String I/O for in kernel device */
4394 if (vcpu
->arch
.pio
.in
)
4395 r
= kvm_io_bus_read(vcpu
->kvm
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
4396 vcpu
->arch
.pio
.size
, pd
);
4398 r
= kvm_io_bus_write(vcpu
->kvm
, KVM_PIO_BUS
,
4399 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
4404 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
4405 unsigned short port
, void *val
,
4406 unsigned int count
, bool in
)
4408 trace_kvm_pio(!in
, port
, size
, count
);
4410 vcpu
->arch
.pio
.port
= port
;
4411 vcpu
->arch
.pio
.in
= in
;
4412 vcpu
->arch
.pio
.count
= count
;
4413 vcpu
->arch
.pio
.size
= size
;
4415 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
4416 vcpu
->arch
.pio
.count
= 0;
4420 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
4421 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
4422 vcpu
->run
->io
.size
= size
;
4423 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
4424 vcpu
->run
->io
.count
= count
;
4425 vcpu
->run
->io
.port
= port
;
4430 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
4431 int size
, unsigned short port
, void *val
,
4434 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4437 if (vcpu
->arch
.pio
.count
)
4440 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
4443 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
4444 vcpu
->arch
.pio
.count
= 0;
4451 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
4452 int size
, unsigned short port
,
4453 const void *val
, unsigned int count
)
4455 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4457 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
4458 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
4461 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
4463 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
4466 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
4468 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
4471 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4473 if (!need_emulate_wbinvd(vcpu
))
4474 return X86EMUL_CONTINUE
;
4476 if (kvm_x86_ops
->has_wbinvd_exit()) {
4477 int cpu
= get_cpu();
4479 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4480 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
4481 wbinvd_ipi
, NULL
, 1);
4483 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
4486 return X86EMUL_CONTINUE
;
4488 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
4490 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
4492 kvm_emulate_wbinvd(emul_to_vcpu(ctxt
));
4495 int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long *dest
)
4497 return _kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
4500 int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long value
)
4503 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
4506 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
4508 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
4511 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
4513 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4514 unsigned long value
;
4518 value
= kvm_read_cr0(vcpu
);
4521 value
= vcpu
->arch
.cr2
;
4524 value
= kvm_read_cr3(vcpu
);
4527 value
= kvm_read_cr4(vcpu
);
4530 value
= kvm_get_cr8(vcpu
);
4533 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4540 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
4542 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4547 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
4550 vcpu
->arch
.cr2
= val
;
4553 res
= kvm_set_cr3(vcpu
, val
);
4556 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
4559 res
= kvm_set_cr8(vcpu
, val
);
4562 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4569 static void emulator_set_rflags(struct x86_emulate_ctxt
*ctxt
, ulong val
)
4571 kvm_set_rflags(emul_to_vcpu(ctxt
), val
);
4574 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
4576 return kvm_x86_ops
->get_cpl(emul_to_vcpu(ctxt
));
4579 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4581 kvm_x86_ops
->get_gdt(emul_to_vcpu(ctxt
), dt
);
4584 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4586 kvm_x86_ops
->get_idt(emul_to_vcpu(ctxt
), dt
);
4589 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4591 kvm_x86_ops
->set_gdt(emul_to_vcpu(ctxt
), dt
);
4594 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4596 kvm_x86_ops
->set_idt(emul_to_vcpu(ctxt
), dt
);
4599 static unsigned long emulator_get_cached_segment_base(
4600 struct x86_emulate_ctxt
*ctxt
, int seg
)
4602 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
4605 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
4606 struct desc_struct
*desc
, u32
*base3
,
4609 struct kvm_segment var
;
4611 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
4612 *selector
= var
.selector
;
4615 memset(desc
, 0, sizeof(*desc
));
4621 set_desc_limit(desc
, var
.limit
);
4622 set_desc_base(desc
, (unsigned long)var
.base
);
4623 #ifdef CONFIG_X86_64
4625 *base3
= var
.base
>> 32;
4627 desc
->type
= var
.type
;
4629 desc
->dpl
= var
.dpl
;
4630 desc
->p
= var
.present
;
4631 desc
->avl
= var
.avl
;
4639 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
4640 struct desc_struct
*desc
, u32 base3
,
4643 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4644 struct kvm_segment var
;
4646 var
.selector
= selector
;
4647 var
.base
= get_desc_base(desc
);
4648 #ifdef CONFIG_X86_64
4649 var
.base
|= ((u64
)base3
) << 32;
4651 var
.limit
= get_desc_limit(desc
);
4653 var
.limit
= (var
.limit
<< 12) | 0xfff;
4654 var
.type
= desc
->type
;
4655 var
.present
= desc
->p
;
4656 var
.dpl
= desc
->dpl
;
4661 var
.avl
= desc
->avl
;
4662 var
.present
= desc
->p
;
4663 var
.unusable
= !var
.present
;
4666 kvm_set_segment(vcpu
, &var
, seg
);
4670 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
4671 u32 msr_index
, u64
*pdata
)
4673 return kvm_get_msr(emul_to_vcpu(ctxt
), msr_index
, pdata
);
4676 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
4677 u32 msr_index
, u64 data
)
4679 struct msr_data msr
;
4682 msr
.index
= msr_index
;
4683 msr
.host_initiated
= false;
4684 return kvm_set_msr(emul_to_vcpu(ctxt
), &msr
);
4687 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
4688 u32 pmc
, u64
*pdata
)
4690 return kvm_pmu_read_pmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
4693 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
4695 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
4698 static void emulator_get_fpu(struct x86_emulate_ctxt
*ctxt
)
4701 kvm_load_guest_fpu(emul_to_vcpu(ctxt
));
4703 * CR0.TS may reference the host fpu state, not the guest fpu state,
4704 * so it may be clear at this point.
4709 static void emulator_put_fpu(struct x86_emulate_ctxt
*ctxt
)
4714 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
4715 struct x86_instruction_info
*info
,
4716 enum x86_intercept_stage stage
)
4718 return kvm_x86_ops
->check_intercept(emul_to_vcpu(ctxt
), info
, stage
);
4721 static void emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
4722 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
)
4724 kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
);
4727 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
4729 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
4732 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
4734 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
4737 static const struct x86_emulate_ops emulate_ops
= {
4738 .read_gpr
= emulator_read_gpr
,
4739 .write_gpr
= emulator_write_gpr
,
4740 .read_std
= kvm_read_guest_virt_system
,
4741 .write_std
= kvm_write_guest_virt_system
,
4742 .fetch
= kvm_fetch_guest_virt
,
4743 .read_emulated
= emulator_read_emulated
,
4744 .write_emulated
= emulator_write_emulated
,
4745 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
4746 .invlpg
= emulator_invlpg
,
4747 .pio_in_emulated
= emulator_pio_in_emulated
,
4748 .pio_out_emulated
= emulator_pio_out_emulated
,
4749 .get_segment
= emulator_get_segment
,
4750 .set_segment
= emulator_set_segment
,
4751 .get_cached_segment_base
= emulator_get_cached_segment_base
,
4752 .get_gdt
= emulator_get_gdt
,
4753 .get_idt
= emulator_get_idt
,
4754 .set_gdt
= emulator_set_gdt
,
4755 .set_idt
= emulator_set_idt
,
4756 .get_cr
= emulator_get_cr
,
4757 .set_cr
= emulator_set_cr
,
4758 .set_rflags
= emulator_set_rflags
,
4759 .cpl
= emulator_get_cpl
,
4760 .get_dr
= emulator_get_dr
,
4761 .set_dr
= emulator_set_dr
,
4762 .set_msr
= emulator_set_msr
,
4763 .get_msr
= emulator_get_msr
,
4764 .read_pmc
= emulator_read_pmc
,
4765 .halt
= emulator_halt
,
4766 .wbinvd
= emulator_wbinvd
,
4767 .fix_hypercall
= emulator_fix_hypercall
,
4768 .get_fpu
= emulator_get_fpu
,
4769 .put_fpu
= emulator_put_fpu
,
4770 .intercept
= emulator_intercept
,
4771 .get_cpuid
= emulator_get_cpuid
,
4774 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
4776 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
, mask
);
4778 * an sti; sti; sequence only disable interrupts for the first
4779 * instruction. So, if the last instruction, be it emulated or
4780 * not, left the system with the INT_STI flag enabled, it
4781 * means that the last instruction is an sti. We should not
4782 * leave the flag on in this case. The same goes for mov ss
4784 if (!(int_shadow
& mask
))
4785 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
4788 static void inject_emulated_exception(struct kvm_vcpu
*vcpu
)
4790 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4791 if (ctxt
->exception
.vector
== PF_VECTOR
)
4792 kvm_propagate_fault(vcpu
, &ctxt
->exception
);
4793 else if (ctxt
->exception
.error_code_valid
)
4794 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
4795 ctxt
->exception
.error_code
);
4797 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
4800 static void init_decode_cache(struct x86_emulate_ctxt
*ctxt
)
4802 memset(&ctxt
->opcode_len
, 0,
4803 (void *)&ctxt
->_regs
- (void *)&ctxt
->opcode_len
);
4805 ctxt
->fetch
.start
= 0;
4806 ctxt
->fetch
.end
= 0;
4807 ctxt
->io_read
.pos
= 0;
4808 ctxt
->io_read
.end
= 0;
4809 ctxt
->mem_read
.pos
= 0;
4810 ctxt
->mem_read
.end
= 0;
4813 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
4815 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4818 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
4820 ctxt
->eflags
= kvm_get_rflags(vcpu
);
4821 ctxt
->eip
= kvm_rip_read(vcpu
);
4822 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
4823 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
4824 cs_l
? X86EMUL_MODE_PROT64
:
4825 cs_db
? X86EMUL_MODE_PROT32
:
4826 X86EMUL_MODE_PROT16
;
4827 ctxt
->guest_mode
= is_guest_mode(vcpu
);
4829 init_decode_cache(ctxt
);
4830 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
4833 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
4835 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4838 init_emulate_ctxt(vcpu
);
4842 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
4843 ret
= emulate_int_real(ctxt
, irq
);
4845 if (ret
!= X86EMUL_CONTINUE
)
4846 return EMULATE_FAIL
;
4848 ctxt
->eip
= ctxt
->_eip
;
4849 kvm_rip_write(vcpu
, ctxt
->eip
);
4850 kvm_set_rflags(vcpu
, ctxt
->eflags
);
4852 if (irq
== NMI_VECTOR
)
4853 vcpu
->arch
.nmi_pending
= 0;
4855 vcpu
->arch
.interrupt
.pending
= false;
4857 return EMULATE_DONE
;
4859 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
4861 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
4863 int r
= EMULATE_DONE
;
4865 ++vcpu
->stat
.insn_emulation_fail
;
4866 trace_kvm_emulate_insn_failed(vcpu
);
4867 if (!is_guest_mode(vcpu
)) {
4868 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
4869 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
4870 vcpu
->run
->internal
.ndata
= 0;
4873 kvm_queue_exception(vcpu
, UD_VECTOR
);
4878 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t cr2
,
4879 bool write_fault_to_shadow_pgtable
,
4885 if (emulation_type
& EMULTYPE_NO_REEXECUTE
)
4888 if (!vcpu
->arch
.mmu
.direct_map
) {
4890 * Write permission should be allowed since only
4891 * write access need to be emulated.
4893 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
4896 * If the mapping is invalid in guest, let cpu retry
4897 * it to generate fault.
4899 if (gpa
== UNMAPPED_GVA
)
4904 * Do not retry the unhandleable instruction if it faults on the
4905 * readonly host memory, otherwise it will goto a infinite loop:
4906 * retry instruction -> write #PF -> emulation fail -> retry
4907 * instruction -> ...
4909 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
4912 * If the instruction failed on the error pfn, it can not be fixed,
4913 * report the error to userspace.
4915 if (is_error_noslot_pfn(pfn
))
4918 kvm_release_pfn_clean(pfn
);
4920 /* The instructions are well-emulated on direct mmu. */
4921 if (vcpu
->arch
.mmu
.direct_map
) {
4922 unsigned int indirect_shadow_pages
;
4924 spin_lock(&vcpu
->kvm
->mmu_lock
);
4925 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
4926 spin_unlock(&vcpu
->kvm
->mmu_lock
);
4928 if (indirect_shadow_pages
)
4929 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
4935 * if emulation was due to access to shadowed page table
4936 * and it failed try to unshadow page and re-enter the
4937 * guest to let CPU execute the instruction.
4939 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
4942 * If the access faults on its page table, it can not
4943 * be fixed by unprotecting shadow page and it should
4944 * be reported to userspace.
4946 return !write_fault_to_shadow_pgtable
;
4949 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
4950 unsigned long cr2
, int emulation_type
)
4952 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4953 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2
;
4955 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
4956 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
4959 * If the emulation is caused by #PF and it is non-page_table
4960 * writing instruction, it means the VM-EXIT is caused by shadow
4961 * page protected, we can zap the shadow page and retry this
4962 * instruction directly.
4964 * Note: if the guest uses a non-page-table modifying instruction
4965 * on the PDE that points to the instruction, then we will unmap
4966 * the instruction and go to an infinite loop. So, we cache the
4967 * last retried eip and the last fault address, if we meet the eip
4968 * and the address again, we can break out of the potential infinite
4971 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
4973 if (!(emulation_type
& EMULTYPE_RETRY
))
4976 if (x86_page_table_writing_insn(ctxt
))
4979 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2
)
4982 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
4983 vcpu
->arch
.last_retry_addr
= cr2
;
4985 if (!vcpu
->arch
.mmu
.direct_map
)
4986 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
4988 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
4993 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
4994 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
4996 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
5005 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
5006 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
5011 static void kvm_vcpu_check_singlestep(struct kvm_vcpu
*vcpu
, int *r
)
5013 struct kvm_run
*kvm_run
= vcpu
->run
;
5016 * Use the "raw" value to see if TF was passed to the processor.
5017 * Note that the new value of the flags has not been saved yet.
5019 * This is correct even for TF set by the guest, because "the
5020 * processor will not generate this exception after the instruction
5021 * that sets the TF flag".
5023 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5025 if (unlikely(rflags
& X86_EFLAGS_TF
)) {
5026 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
5027 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_FIXED_1
;
5028 kvm_run
->debug
.arch
.pc
= vcpu
->arch
.singlestep_rip
;
5029 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5030 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5031 *r
= EMULATE_USER_EXIT
;
5033 vcpu
->arch
.emulate_ctxt
.eflags
&= ~X86_EFLAGS_TF
;
5035 * "Certain debug exceptions may clear bit 0-3. The
5036 * remaining contents of the DR6 register are never
5037 * cleared by the processor".
5039 vcpu
->arch
.dr6
&= ~15;
5040 vcpu
->arch
.dr6
|= DR6_BS
;
5041 kvm_queue_exception(vcpu
, DB_VECTOR
);
5046 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
5048 struct kvm_run
*kvm_run
= vcpu
->run
;
5049 unsigned long eip
= vcpu
->arch
.emulate_ctxt
.eip
;
5052 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
5053 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
5054 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5055 vcpu
->arch
.guest_debug_dr7
,
5059 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_FIXED_1
;
5060 kvm_run
->debug
.arch
.pc
= kvm_rip_read(vcpu
) +
5061 get_segment_base(vcpu
, VCPU_SREG_CS
);
5063 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5064 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5065 *r
= EMULATE_USER_EXIT
;
5070 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
)) {
5071 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5076 vcpu
->arch
.dr6
&= ~15;
5077 vcpu
->arch
.dr6
|= dr6
;
5078 kvm_queue_exception(vcpu
, DB_VECTOR
);
5087 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
5094 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5095 bool writeback
= true;
5096 bool write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
5099 * Clear write_fault_to_shadow_pgtable here to ensure it is
5102 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
5103 kvm_clear_exception_queue(vcpu
);
5105 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
5106 init_emulate_ctxt(vcpu
);
5109 * We will reenter on the same instruction since
5110 * we do not set complete_userspace_io. This does not
5111 * handle watchpoints yet, those would be handled in
5114 if (kvm_vcpu_check_breakpoint(vcpu
, &r
))
5117 ctxt
->interruptibility
= 0;
5118 ctxt
->have_exception
= false;
5119 ctxt
->perm_ok
= false;
5121 ctxt
->ud
= emulation_type
& EMULTYPE_TRAP_UD
;
5123 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
5125 trace_kvm_emulate_insn_start(vcpu
);
5126 ++vcpu
->stat
.insn_emulation
;
5127 if (r
!= EMULATION_OK
) {
5128 if (emulation_type
& EMULTYPE_TRAP_UD
)
5129 return EMULATE_FAIL
;
5130 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5132 return EMULATE_DONE
;
5133 if (emulation_type
& EMULTYPE_SKIP
)
5134 return EMULATE_FAIL
;
5135 return handle_emulation_failure(vcpu
);
5139 if (emulation_type
& EMULTYPE_SKIP
) {
5140 kvm_rip_write(vcpu
, ctxt
->_eip
);
5141 return EMULATE_DONE
;
5144 if (retry_instruction(ctxt
, cr2
, emulation_type
))
5145 return EMULATE_DONE
;
5147 /* this is needed for vmware backdoor interface to work since it
5148 changes registers values during IO operation */
5149 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
5150 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5151 emulator_invalidate_register_cache(ctxt
);
5155 r
= x86_emulate_insn(ctxt
);
5157 if (r
== EMULATION_INTERCEPTED
)
5158 return EMULATE_DONE
;
5160 if (r
== EMULATION_FAILED
) {
5161 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5163 return EMULATE_DONE
;
5165 return handle_emulation_failure(vcpu
);
5168 if (ctxt
->have_exception
) {
5169 inject_emulated_exception(vcpu
);
5171 } else if (vcpu
->arch
.pio
.count
) {
5172 if (!vcpu
->arch
.pio
.in
) {
5173 /* FIXME: return into emulator if single-stepping. */
5174 vcpu
->arch
.pio
.count
= 0;
5177 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
5179 r
= EMULATE_USER_EXIT
;
5180 } else if (vcpu
->mmio_needed
) {
5181 if (!vcpu
->mmio_is_write
)
5183 r
= EMULATE_USER_EXIT
;
5184 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
5185 } else if (r
== EMULATION_RESTART
)
5191 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
5192 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5193 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5194 kvm_rip_write(vcpu
, ctxt
->eip
);
5195 if (r
== EMULATE_DONE
)
5196 kvm_vcpu_check_singlestep(vcpu
, &r
);
5197 kvm_set_rflags(vcpu
, ctxt
->eflags
);
5199 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
5203 EXPORT_SYMBOL_GPL(x86_emulate_instruction
);
5205 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5207 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5208 int ret
= emulator_pio_out_emulated(&vcpu
->arch
.emulate_ctxt
,
5209 size
, port
, &val
, 1);
5210 /* do not return to emulator after return from userspace */
5211 vcpu
->arch
.pio
.count
= 0;
5214 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
5216 static void tsc_bad(void *info
)
5218 __this_cpu_write(cpu_tsc_khz
, 0);
5221 static void tsc_khz_changed(void *data
)
5223 struct cpufreq_freqs
*freq
= data
;
5224 unsigned long khz
= 0;
5228 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5229 khz
= cpufreq_quick_get(raw_smp_processor_id());
5232 __this_cpu_write(cpu_tsc_khz
, khz
);
5235 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
5238 struct cpufreq_freqs
*freq
= data
;
5240 struct kvm_vcpu
*vcpu
;
5241 int i
, send_ipi
= 0;
5244 * We allow guests to temporarily run on slowing clocks,
5245 * provided we notify them after, or to run on accelerating
5246 * clocks, provided we notify them before. Thus time never
5249 * However, we have a problem. We can't atomically update
5250 * the frequency of a given CPU from this function; it is
5251 * merely a notifier, which can be called from any CPU.
5252 * Changing the TSC frequency at arbitrary points in time
5253 * requires a recomputation of local variables related to
5254 * the TSC for each VCPU. We must flag these local variables
5255 * to be updated and be sure the update takes place with the
5256 * new frequency before any guests proceed.
5258 * Unfortunately, the combination of hotplug CPU and frequency
5259 * change creates an intractable locking scenario; the order
5260 * of when these callouts happen is undefined with respect to
5261 * CPU hotplug, and they can race with each other. As such,
5262 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5263 * undefined; you can actually have a CPU frequency change take
5264 * place in between the computation of X and the setting of the
5265 * variable. To protect against this problem, all updates of
5266 * the per_cpu tsc_khz variable are done in an interrupt
5267 * protected IPI, and all callers wishing to update the value
5268 * must wait for a synchronous IPI to complete (which is trivial
5269 * if the caller is on the CPU already). This establishes the
5270 * necessary total order on variable updates.
5272 * Note that because a guest time update may take place
5273 * anytime after the setting of the VCPU's request bit, the
5274 * correct TSC value must be set before the request. However,
5275 * to ensure the update actually makes it to any guest which
5276 * starts running in hardware virtualization between the set
5277 * and the acquisition of the spinlock, we must also ping the
5278 * CPU after setting the request bit.
5282 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
5284 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
5287 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5289 spin_lock(&kvm_lock
);
5290 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
5291 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
5292 if (vcpu
->cpu
!= freq
->cpu
)
5294 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
5295 if (vcpu
->cpu
!= smp_processor_id())
5299 spin_unlock(&kvm_lock
);
5301 if (freq
->old
< freq
->new && send_ipi
) {
5303 * We upscale the frequency. Must make the guest
5304 * doesn't see old kvmclock values while running with
5305 * the new frequency, otherwise we risk the guest sees
5306 * time go backwards.
5308 * In case we update the frequency for another cpu
5309 * (which might be in guest context) send an interrupt
5310 * to kick the cpu out of guest context. Next time
5311 * guest context is entered kvmclock will be updated,
5312 * so the guest will not see stale values.
5314 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5319 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
5320 .notifier_call
= kvmclock_cpufreq_notifier
5323 static int kvmclock_cpu_notifier(struct notifier_block
*nfb
,
5324 unsigned long action
, void *hcpu
)
5326 unsigned int cpu
= (unsigned long)hcpu
;
5330 case CPU_DOWN_FAILED
:
5331 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
5333 case CPU_DOWN_PREPARE
:
5334 smp_call_function_single(cpu
, tsc_bad
, NULL
, 1);
5340 static struct notifier_block kvmclock_cpu_notifier_block
= {
5341 .notifier_call
= kvmclock_cpu_notifier
,
5342 .priority
= -INT_MAX
5345 static void kvm_timer_init(void)
5349 max_tsc_khz
= tsc_khz
;
5350 register_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
5351 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
5352 #ifdef CONFIG_CPU_FREQ
5353 struct cpufreq_policy policy
;
5354 memset(&policy
, 0, sizeof(policy
));
5356 cpufreq_get_policy(&policy
, cpu
);
5357 if (policy
.cpuinfo
.max_freq
)
5358 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
5361 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
5362 CPUFREQ_TRANSITION_NOTIFIER
);
5364 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
5365 for_each_online_cpu(cpu
)
5366 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
5369 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
5371 int kvm_is_in_guest(void)
5373 return __this_cpu_read(current_vcpu
) != NULL
;
5376 static int kvm_is_user_mode(void)
5380 if (__this_cpu_read(current_vcpu
))
5381 user_mode
= kvm_x86_ops
->get_cpl(__this_cpu_read(current_vcpu
));
5383 return user_mode
!= 0;
5386 static unsigned long kvm_get_guest_ip(void)
5388 unsigned long ip
= 0;
5390 if (__this_cpu_read(current_vcpu
))
5391 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
5396 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
5397 .is_in_guest
= kvm_is_in_guest
,
5398 .is_user_mode
= kvm_is_user_mode
,
5399 .get_guest_ip
= kvm_get_guest_ip
,
5402 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
5404 __this_cpu_write(current_vcpu
, vcpu
);
5406 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
5408 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
5410 __this_cpu_write(current_vcpu
, NULL
);
5412 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
5414 static void kvm_set_mmio_spte_mask(void)
5417 int maxphyaddr
= boot_cpu_data
.x86_phys_bits
;
5420 * Set the reserved bits and the present bit of an paging-structure
5421 * entry to generate page fault with PFER.RSV = 1.
5423 /* Mask the reserved physical address bits. */
5424 mask
= ((1ull << (51 - maxphyaddr
+ 1)) - 1) << maxphyaddr
;
5426 /* Bit 62 is always reserved for 32bit host. */
5427 mask
|= 0x3ull
<< 62;
5429 /* Set the present bit. */
5432 #ifdef CONFIG_X86_64
5434 * If reserved bit is not supported, clear the present bit to disable
5437 if (maxphyaddr
== 52)
5441 kvm_mmu_set_mmio_spte_mask(mask
);
5444 #ifdef CONFIG_X86_64
5445 static void pvclock_gtod_update_fn(struct work_struct
*work
)
5449 struct kvm_vcpu
*vcpu
;
5452 spin_lock(&kvm_lock
);
5453 list_for_each_entry(kvm
, &vm_list
, vm_list
)
5454 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5455 set_bit(KVM_REQ_MASTERCLOCK_UPDATE
, &vcpu
->requests
);
5456 atomic_set(&kvm_guest_has_master_clock
, 0);
5457 spin_unlock(&kvm_lock
);
5460 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
5463 * Notification about pvclock gtod data update.
5465 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
5468 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
5469 struct timekeeper
*tk
= priv
;
5471 update_pvclock_gtod(tk
);
5473 /* disable master clock if host does not trust, or does not
5474 * use, TSC clocksource
5476 if (gtod
->clock
.vclock_mode
!= VCLOCK_TSC
&&
5477 atomic_read(&kvm_guest_has_master_clock
) != 0)
5478 queue_work(system_long_wq
, &pvclock_gtod_work
);
5483 static struct notifier_block pvclock_gtod_notifier
= {
5484 .notifier_call
= pvclock_gtod_notify
,
5488 int kvm_arch_init(void *opaque
)
5491 struct kvm_x86_ops
*ops
= opaque
;
5494 printk(KERN_ERR
"kvm: already loaded the other module\n");
5499 if (!ops
->cpu_has_kvm_support()) {
5500 printk(KERN_ERR
"kvm: no hardware support\n");
5504 if (ops
->disabled_by_bios()) {
5505 printk(KERN_ERR
"kvm: disabled by bios\n");
5511 shared_msrs
= alloc_percpu(struct kvm_shared_msrs
);
5513 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_shared_msrs\n");
5517 r
= kvm_mmu_module_init();
5519 goto out_free_percpu
;
5521 kvm_set_mmio_spte_mask();
5522 kvm_init_msr_list();
5525 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
5526 PT_DIRTY_MASK
, PT64_NX_MASK
, 0);
5530 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
5533 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
5536 #ifdef CONFIG_X86_64
5537 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
5543 free_percpu(shared_msrs
);
5548 void kvm_arch_exit(void)
5550 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
5552 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5553 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
5554 CPUFREQ_TRANSITION_NOTIFIER
);
5555 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
5556 #ifdef CONFIG_X86_64
5557 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
5560 kvm_mmu_module_exit();
5561 free_percpu(shared_msrs
);
5564 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
5566 ++vcpu
->stat
.halt_exits
;
5567 if (irqchip_in_kernel(vcpu
->kvm
)) {
5568 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
5571 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
5575 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
5577 int kvm_hv_hypercall(struct kvm_vcpu
*vcpu
)
5579 u64 param
, ingpa
, outgpa
, ret
;
5580 uint16_t code
, rep_idx
, rep_cnt
, res
= HV_STATUS_SUCCESS
, rep_done
= 0;
5581 bool fast
, longmode
;
5585 * hypercall generates UD from non zero cpl and real mode
5588 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 || !is_protmode(vcpu
)) {
5589 kvm_queue_exception(vcpu
, UD_VECTOR
);
5593 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
5594 longmode
= is_long_mode(vcpu
) && cs_l
== 1;
5597 param
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDX
) << 32) |
5598 (kvm_register_read(vcpu
, VCPU_REGS_RAX
) & 0xffffffff);
5599 ingpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RBX
) << 32) |
5600 (kvm_register_read(vcpu
, VCPU_REGS_RCX
) & 0xffffffff);
5601 outgpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDI
) << 32) |
5602 (kvm_register_read(vcpu
, VCPU_REGS_RSI
) & 0xffffffff);
5604 #ifdef CONFIG_X86_64
5606 param
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5607 ingpa
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5608 outgpa
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
5612 code
= param
& 0xffff;
5613 fast
= (param
>> 16) & 0x1;
5614 rep_cnt
= (param
>> 32) & 0xfff;
5615 rep_idx
= (param
>> 48) & 0xfff;
5617 trace_kvm_hv_hypercall(code
, fast
, rep_cnt
, rep_idx
, ingpa
, outgpa
);
5620 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT
:
5621 kvm_vcpu_on_spin(vcpu
);
5624 res
= HV_STATUS_INVALID_HYPERCALL_CODE
;
5628 ret
= res
| (((u64
)rep_done
& 0xfff) << 32);
5630 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
5632 kvm_register_write(vcpu
, VCPU_REGS_RDX
, ret
>> 32);
5633 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
& 0xffffffff);
5640 * kvm_pv_kick_cpu_op: Kick a vcpu.
5642 * @apicid - apicid of vcpu to be kicked.
5644 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
5646 struct kvm_lapic_irq lapic_irq
;
5648 lapic_irq
.shorthand
= 0;
5649 lapic_irq
.dest_mode
= 0;
5650 lapic_irq
.dest_id
= apicid
;
5652 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
5653 kvm_irq_delivery_to_apic(kvm
, 0, &lapic_irq
, NULL
);
5656 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
5658 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
5661 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
5662 return kvm_hv_hypercall(vcpu
);
5664 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5665 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
5666 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5667 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5668 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
5670 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
5672 if (!is_long_mode(vcpu
)) {
5680 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
5686 case KVM_HC_VAPIC_POLL_IRQ
:
5689 case KVM_HC_KICK_CPU
:
5690 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
5698 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
5699 ++vcpu
->stat
.hypercalls
;
5702 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
5704 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
5706 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5707 char instruction
[3];
5708 unsigned long rip
= kvm_rip_read(vcpu
);
5710 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
5712 return emulator_write_emulated(ctxt
, rip
, instruction
, 3, NULL
);
5716 * Check if userspace requested an interrupt window, and that the
5717 * interrupt window is open.
5719 * No need to exit to userspace if we already have an interrupt queued.
5721 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
5723 return (!irqchip_in_kernel(vcpu
->kvm
) && !kvm_cpu_has_interrupt(vcpu
) &&
5724 vcpu
->run
->request_interrupt_window
&&
5725 kvm_arch_interrupt_allowed(vcpu
));
5728 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
5730 struct kvm_run
*kvm_run
= vcpu
->run
;
5732 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
5733 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
5734 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
5735 if (irqchip_in_kernel(vcpu
->kvm
))
5736 kvm_run
->ready_for_interrupt_injection
= 1;
5738 kvm_run
->ready_for_interrupt_injection
=
5739 kvm_arch_interrupt_allowed(vcpu
) &&
5740 !kvm_cpu_has_interrupt(vcpu
) &&
5741 !kvm_event_needs_reinjection(vcpu
);
5744 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
5748 if (!kvm_x86_ops
->update_cr8_intercept
)
5751 if (!vcpu
->arch
.apic
)
5754 if (!vcpu
->arch
.apic
->vapic_addr
)
5755 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
5762 tpr
= kvm_lapic_get_cr8(vcpu
);
5764 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
5767 static void inject_pending_event(struct kvm_vcpu
*vcpu
)
5769 /* try to reinject previous events if any */
5770 if (vcpu
->arch
.exception
.pending
) {
5771 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
5772 vcpu
->arch
.exception
.has_error_code
,
5773 vcpu
->arch
.exception
.error_code
);
5774 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
5775 vcpu
->arch
.exception
.has_error_code
,
5776 vcpu
->arch
.exception
.error_code
,
5777 vcpu
->arch
.exception
.reinject
);
5781 if (vcpu
->arch
.nmi_injected
) {
5782 kvm_x86_ops
->set_nmi(vcpu
);
5786 if (vcpu
->arch
.interrupt
.pending
) {
5787 kvm_x86_ops
->set_irq(vcpu
);
5791 /* try to inject new event if pending */
5792 if (vcpu
->arch
.nmi_pending
) {
5793 if (kvm_x86_ops
->nmi_allowed(vcpu
)) {
5794 --vcpu
->arch
.nmi_pending
;
5795 vcpu
->arch
.nmi_injected
= true;
5796 kvm_x86_ops
->set_nmi(vcpu
);
5798 } else if (kvm_cpu_has_injectable_intr(vcpu
)) {
5799 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
5800 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
5802 kvm_x86_ops
->set_irq(vcpu
);
5807 static void process_nmi(struct kvm_vcpu
*vcpu
)
5812 * x86 is limited to one NMI running, and one NMI pending after it.
5813 * If an NMI is already in progress, limit further NMIs to just one.
5814 * Otherwise, allow two (and we'll inject the first one immediately).
5816 if (kvm_x86_ops
->get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
5819 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
5820 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
5821 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5824 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
5826 u64 eoi_exit_bitmap
[4];
5829 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
5832 memset(eoi_exit_bitmap
, 0, 32);
5835 kvm_ioapic_scan_entry(vcpu
, eoi_exit_bitmap
, tmr
);
5836 kvm_x86_ops
->load_eoi_exitmap(vcpu
, eoi_exit_bitmap
);
5837 kvm_apic_update_tmr(vcpu
, tmr
);
5841 * Returns 1 to let __vcpu_run() continue the guest execution loop without
5842 * exiting to the userspace. Otherwise, the value will be returned to the
5845 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
5848 bool req_int_win
= !irqchip_in_kernel(vcpu
->kvm
) &&
5849 vcpu
->run
->request_interrupt_window
;
5850 bool req_immediate_exit
= false;
5852 if (vcpu
->requests
) {
5853 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
5854 kvm_mmu_unload(vcpu
);
5855 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
5856 __kvm_migrate_timers(vcpu
);
5857 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
5858 kvm_gen_update_masterclock(vcpu
->kvm
);
5859 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
5860 kvm_gen_kvmclock_update(vcpu
);
5861 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
5862 r
= kvm_guest_time_update(vcpu
);
5866 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
5867 kvm_mmu_sync_roots(vcpu
);
5868 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
5869 kvm_x86_ops
->tlb_flush(vcpu
);
5870 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
5871 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
5875 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
5876 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
5880 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
)) {
5881 vcpu
->fpu_active
= 0;
5882 kvm_x86_ops
->fpu_deactivate(vcpu
);
5884 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
5885 /* Page is swapped out. Do synthetic halt */
5886 vcpu
->arch
.apf
.halted
= true;
5890 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
5891 record_steal_time(vcpu
);
5892 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
5894 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
5895 kvm_handle_pmu_event(vcpu
);
5896 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
5897 kvm_deliver_pmi(vcpu
);
5898 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
5899 vcpu_scan_ioapic(vcpu
);
5902 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
5903 kvm_apic_accept_events(vcpu
);
5904 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
5909 inject_pending_event(vcpu
);
5911 /* enable NMI/IRQ window open exits if needed */
5912 if (vcpu
->arch
.nmi_pending
)
5913 req_immediate_exit
=
5914 kvm_x86_ops
->enable_nmi_window(vcpu
) != 0;
5915 else if (kvm_cpu_has_injectable_intr(vcpu
) || req_int_win
)
5916 req_immediate_exit
=
5917 kvm_x86_ops
->enable_irq_window(vcpu
) != 0;
5919 if (kvm_lapic_enabled(vcpu
)) {
5921 * Update architecture specific hints for APIC
5922 * virtual interrupt delivery.
5924 if (kvm_x86_ops
->hwapic_irr_update
)
5925 kvm_x86_ops
->hwapic_irr_update(vcpu
,
5926 kvm_lapic_find_highest_irr(vcpu
));
5927 update_cr8_intercept(vcpu
);
5928 kvm_lapic_sync_to_vapic(vcpu
);
5932 r
= kvm_mmu_reload(vcpu
);
5934 goto cancel_injection
;
5939 kvm_x86_ops
->prepare_guest_switch(vcpu
);
5940 if (vcpu
->fpu_active
)
5941 kvm_load_guest_fpu(vcpu
);
5942 kvm_load_guest_xcr0(vcpu
);
5944 vcpu
->mode
= IN_GUEST_MODE
;
5946 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
5948 /* We should set ->mode before check ->requests,
5949 * see the comment in make_all_cpus_request.
5951 smp_mb__after_srcu_read_unlock();
5953 local_irq_disable();
5955 if (vcpu
->mode
== EXITING_GUEST_MODE
|| vcpu
->requests
5956 || need_resched() || signal_pending(current
)) {
5957 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
5961 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5963 goto cancel_injection
;
5966 if (req_immediate_exit
)
5967 smp_send_reschedule(vcpu
->cpu
);
5971 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
5973 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
5974 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
5975 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
5976 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
5979 trace_kvm_entry(vcpu
->vcpu_id
);
5980 kvm_x86_ops
->run(vcpu
);
5983 * If the guest has used debug registers, at least dr7
5984 * will be disabled while returning to the host.
5985 * If we don't have active breakpoints in the host, we don't
5986 * care about the messed up debug address registers. But if
5987 * we have some of them active, restore the old state.
5989 if (hw_breakpoint_active())
5990 hw_breakpoint_restore();
5992 vcpu
->arch
.last_guest_tsc
= kvm_x86_ops
->read_l1_tsc(vcpu
,
5995 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
5998 /* Interrupt is enabled by handle_external_intr() */
5999 kvm_x86_ops
->handle_external_intr(vcpu
);
6004 * We must have an instruction between local_irq_enable() and
6005 * kvm_guest_exit(), so the timer interrupt isn't delayed by
6006 * the interrupt shadow. The stat.exits increment will do nicely.
6007 * But we need to prevent reordering, hence this barrier():
6015 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6018 * Profile KVM exit RIPs:
6020 if (unlikely(prof_on
== KVM_PROFILING
)) {
6021 unsigned long rip
= kvm_rip_read(vcpu
);
6022 profile_hit(KVM_PROFILING
, (void *)rip
);
6025 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
6026 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
6028 if (vcpu
->arch
.apic_attention
)
6029 kvm_lapic_sync_from_vapic(vcpu
);
6031 r
= kvm_x86_ops
->handle_exit(vcpu
);
6035 kvm_x86_ops
->cancel_injection(vcpu
);
6036 if (unlikely(vcpu
->arch
.apic_attention
))
6037 kvm_lapic_sync_from_vapic(vcpu
);
6043 static int __vcpu_run(struct kvm_vcpu
*vcpu
)
6046 struct kvm
*kvm
= vcpu
->kvm
;
6048 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6052 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
6053 !vcpu
->arch
.apf
.halted
)
6054 r
= vcpu_enter_guest(vcpu
);
6056 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6057 kvm_vcpu_block(vcpu
);
6058 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6059 if (kvm_check_request(KVM_REQ_UNHALT
, vcpu
)) {
6060 kvm_apic_accept_events(vcpu
);
6061 switch(vcpu
->arch
.mp_state
) {
6062 case KVM_MP_STATE_HALTED
:
6063 vcpu
->arch
.pv
.pv_unhalted
= false;
6064 vcpu
->arch
.mp_state
=
6065 KVM_MP_STATE_RUNNABLE
;
6066 case KVM_MP_STATE_RUNNABLE
:
6067 vcpu
->arch
.apf
.halted
= false;
6069 case KVM_MP_STATE_INIT_RECEIVED
:
6081 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
6082 if (kvm_cpu_has_pending_timer(vcpu
))
6083 kvm_inject_pending_timer_irqs(vcpu
);
6085 if (dm_request_for_irq_injection(vcpu
)) {
6087 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
6088 ++vcpu
->stat
.request_irq_exits
;
6091 kvm_check_async_pf_completion(vcpu
);
6093 if (signal_pending(current
)) {
6095 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
6096 ++vcpu
->stat
.signal_exits
;
6098 if (need_resched()) {
6099 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6101 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6105 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6110 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
6113 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6114 r
= emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
6115 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6116 if (r
!= EMULATE_DONE
)
6121 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
6123 BUG_ON(!vcpu
->arch
.pio
.count
);
6125 return complete_emulated_io(vcpu
);
6129 * Implements the following, as a state machine:
6133 * for each mmio piece in the fragment
6141 * for each mmio piece in the fragment
6146 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
6148 struct kvm_run
*run
= vcpu
->run
;
6149 struct kvm_mmio_fragment
*frag
;
6152 BUG_ON(!vcpu
->mmio_needed
);
6154 /* Complete previous fragment */
6155 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
6156 len
= min(8u, frag
->len
);
6157 if (!vcpu
->mmio_is_write
)
6158 memcpy(frag
->data
, run
->mmio
.data
, len
);
6160 if (frag
->len
<= 8) {
6161 /* Switch to the next fragment. */
6163 vcpu
->mmio_cur_fragment
++;
6165 /* Go forward to the next mmio piece. */
6171 if (vcpu
->mmio_cur_fragment
== vcpu
->mmio_nr_fragments
) {
6172 vcpu
->mmio_needed
= 0;
6174 /* FIXME: return into emulator if single-stepping. */
6175 if (vcpu
->mmio_is_write
)
6177 vcpu
->mmio_read_completed
= 1;
6178 return complete_emulated_io(vcpu
);
6181 run
->exit_reason
= KVM_EXIT_MMIO
;
6182 run
->mmio
.phys_addr
= frag
->gpa
;
6183 if (vcpu
->mmio_is_write
)
6184 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
6185 run
->mmio
.len
= min(8u, frag
->len
);
6186 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
6187 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
6192 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
6197 if (!tsk_used_math(current
) && init_fpu(current
))
6200 if (vcpu
->sigset_active
)
6201 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
6203 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
6204 kvm_vcpu_block(vcpu
);
6205 kvm_apic_accept_events(vcpu
);
6206 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
6211 /* re-sync apic's tpr */
6212 if (!irqchip_in_kernel(vcpu
->kvm
)) {
6213 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
6219 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
6220 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
6221 vcpu
->arch
.complete_userspace_io
= NULL
;
6226 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
6228 r
= __vcpu_run(vcpu
);
6231 post_kvm_run_save(vcpu
);
6232 if (vcpu
->sigset_active
)
6233 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
6238 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
6240 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
6242 * We are here if userspace calls get_regs() in the middle of
6243 * instruction emulation. Registers state needs to be copied
6244 * back from emulation context to vcpu. Userspace shouldn't do
6245 * that usually, but some bad designed PV devices (vmware
6246 * backdoor interface) need this to work
6248 emulator_writeback_register_cache(&vcpu
->arch
.emulate_ctxt
);
6249 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
6251 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
6252 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
6253 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
6254 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
6255 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
6256 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
6257 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
6258 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
6259 #ifdef CONFIG_X86_64
6260 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
6261 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
6262 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
6263 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
6264 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
6265 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
6266 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
6267 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
6270 regs
->rip
= kvm_rip_read(vcpu
);
6271 regs
->rflags
= kvm_get_rflags(vcpu
);
6276 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
6278 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
6279 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
6281 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
6282 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
6283 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
6284 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
6285 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
6286 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
6287 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
6288 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
6289 #ifdef CONFIG_X86_64
6290 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
6291 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
6292 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
6293 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
6294 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
6295 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
6296 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
6297 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
6300 kvm_rip_write(vcpu
, regs
->rip
);
6301 kvm_set_rflags(vcpu
, regs
->rflags
);
6303 vcpu
->arch
.exception
.pending
= false;
6305 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6310 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
6312 struct kvm_segment cs
;
6314 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6318 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
6320 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
6321 struct kvm_sregs
*sregs
)
6325 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
6326 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
6327 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
6328 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
6329 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
6330 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
6332 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
6333 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
6335 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6336 sregs
->idt
.limit
= dt
.size
;
6337 sregs
->idt
.base
= dt
.address
;
6338 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6339 sregs
->gdt
.limit
= dt
.size
;
6340 sregs
->gdt
.base
= dt
.address
;
6342 sregs
->cr0
= kvm_read_cr0(vcpu
);
6343 sregs
->cr2
= vcpu
->arch
.cr2
;
6344 sregs
->cr3
= kvm_read_cr3(vcpu
);
6345 sregs
->cr4
= kvm_read_cr4(vcpu
);
6346 sregs
->cr8
= kvm_get_cr8(vcpu
);
6347 sregs
->efer
= vcpu
->arch
.efer
;
6348 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
6350 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
6352 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
6353 set_bit(vcpu
->arch
.interrupt
.nr
,
6354 (unsigned long *)sregs
->interrupt_bitmap
);
6359 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
6360 struct kvm_mp_state
*mp_state
)
6362 kvm_apic_accept_events(vcpu
);
6363 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
&&
6364 vcpu
->arch
.pv
.pv_unhalted
)
6365 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
6367 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
6372 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
6373 struct kvm_mp_state
*mp_state
)
6375 if (!kvm_vcpu_has_lapic(vcpu
) &&
6376 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
6379 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
6380 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
6381 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
6383 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
6384 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6388 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
6389 int reason
, bool has_error_code
, u32 error_code
)
6391 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
6394 init_emulate_ctxt(vcpu
);
6396 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
6397 has_error_code
, error_code
);
6400 return EMULATE_FAIL
;
6402 kvm_rip_write(vcpu
, ctxt
->eip
);
6403 kvm_set_rflags(vcpu
, ctxt
->eflags
);
6404 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6405 return EMULATE_DONE
;
6407 EXPORT_SYMBOL_GPL(kvm_task_switch
);
6409 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
6410 struct kvm_sregs
*sregs
)
6412 int mmu_reset_needed
= 0;
6413 int pending_vec
, max_bits
, idx
;
6416 if (!guest_cpuid_has_xsave(vcpu
) && (sregs
->cr4
& X86_CR4_OSXSAVE
))
6419 dt
.size
= sregs
->idt
.limit
;
6420 dt
.address
= sregs
->idt
.base
;
6421 kvm_x86_ops
->set_idt(vcpu
, &dt
);
6422 dt
.size
= sregs
->gdt
.limit
;
6423 dt
.address
= sregs
->gdt
.base
;
6424 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
6426 vcpu
->arch
.cr2
= sregs
->cr2
;
6427 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
6428 vcpu
->arch
.cr3
= sregs
->cr3
;
6429 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
6431 kvm_set_cr8(vcpu
, sregs
->cr8
);
6433 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
6434 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
6435 kvm_set_apic_base(vcpu
, sregs
->apic_base
);
6437 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
6438 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
6439 vcpu
->arch
.cr0
= sregs
->cr0
;
6441 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
6442 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
6443 if (sregs
->cr4
& X86_CR4_OSXSAVE
)
6444 kvm_update_cpuid(vcpu
);
6446 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6447 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
6448 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
6449 mmu_reset_needed
= 1;
6451 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
6453 if (mmu_reset_needed
)
6454 kvm_mmu_reset_context(vcpu
);
6456 max_bits
= KVM_NR_INTERRUPTS
;
6457 pending_vec
= find_first_bit(
6458 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
6459 if (pending_vec
< max_bits
) {
6460 kvm_queue_interrupt(vcpu
, pending_vec
, false);
6461 pr_debug("Set back pending irq %d\n", pending_vec
);
6464 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
6465 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
6466 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
6467 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
6468 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
6469 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
6471 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
6472 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
6474 update_cr8_intercept(vcpu
);
6476 /* Older userspace won't unhalt the vcpu on reset. */
6477 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
6478 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
6480 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
6482 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6487 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
6488 struct kvm_guest_debug
*dbg
)
6490 unsigned long rflags
;
6493 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
6495 if (vcpu
->arch
.exception
.pending
)
6497 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
6498 kvm_queue_exception(vcpu
, DB_VECTOR
);
6500 kvm_queue_exception(vcpu
, BP_VECTOR
);
6504 * Read rflags as long as potentially injected trace flags are still
6507 rflags
= kvm_get_rflags(vcpu
);
6509 vcpu
->guest_debug
= dbg
->control
;
6510 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
6511 vcpu
->guest_debug
= 0;
6513 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
6514 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
6515 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
6516 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
6518 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
6519 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
6521 kvm_update_dr7(vcpu
);
6523 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
6524 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
6525 get_segment_base(vcpu
, VCPU_SREG_CS
);
6528 * Trigger an rflags update that will inject or remove the trace
6531 kvm_set_rflags(vcpu
, rflags
);
6533 kvm_x86_ops
->update_db_bp_intercept(vcpu
);
6543 * Translate a guest virtual address to a guest physical address.
6545 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
6546 struct kvm_translation
*tr
)
6548 unsigned long vaddr
= tr
->linear_address
;
6552 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6553 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
6554 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
6555 tr
->physical_address
= gpa
;
6556 tr
->valid
= gpa
!= UNMAPPED_GVA
;
6563 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
6565 struct i387_fxsave_struct
*fxsave
=
6566 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
6568 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
6569 fpu
->fcw
= fxsave
->cwd
;
6570 fpu
->fsw
= fxsave
->swd
;
6571 fpu
->ftwx
= fxsave
->twd
;
6572 fpu
->last_opcode
= fxsave
->fop
;
6573 fpu
->last_ip
= fxsave
->rip
;
6574 fpu
->last_dp
= fxsave
->rdp
;
6575 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
6580 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
6582 struct i387_fxsave_struct
*fxsave
=
6583 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
6585 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
6586 fxsave
->cwd
= fpu
->fcw
;
6587 fxsave
->swd
= fpu
->fsw
;
6588 fxsave
->twd
= fpu
->ftwx
;
6589 fxsave
->fop
= fpu
->last_opcode
;
6590 fxsave
->rip
= fpu
->last_ip
;
6591 fxsave
->rdp
= fpu
->last_dp
;
6592 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
6597 int fx_init(struct kvm_vcpu
*vcpu
)
6601 err
= fpu_alloc(&vcpu
->arch
.guest_fpu
);
6605 fpu_finit(&vcpu
->arch
.guest_fpu
);
6608 * Ensure guest xcr0 is valid for loading
6610 vcpu
->arch
.xcr0
= XSTATE_FP
;
6612 vcpu
->arch
.cr0
|= X86_CR0_ET
;
6616 EXPORT_SYMBOL_GPL(fx_init
);
6618 static void fx_free(struct kvm_vcpu
*vcpu
)
6620 fpu_free(&vcpu
->arch
.guest_fpu
);
6623 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
6625 if (vcpu
->guest_fpu_loaded
)
6629 * Restore all possible states in the guest,
6630 * and assume host would use all available bits.
6631 * Guest xcr0 would be loaded later.
6633 kvm_put_guest_xcr0(vcpu
);
6634 vcpu
->guest_fpu_loaded
= 1;
6635 __kernel_fpu_begin();
6636 fpu_restore_checking(&vcpu
->arch
.guest_fpu
);
6640 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
6642 kvm_put_guest_xcr0(vcpu
);
6644 if (!vcpu
->guest_fpu_loaded
)
6647 vcpu
->guest_fpu_loaded
= 0;
6648 fpu_save_init(&vcpu
->arch
.guest_fpu
);
6650 ++vcpu
->stat
.fpu_reload
;
6651 kvm_make_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
);
6655 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
6657 kvmclock_reset(vcpu
);
6659 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
6661 kvm_x86_ops
->vcpu_free(vcpu
);
6664 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
6667 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
6668 printk_once(KERN_WARNING
6669 "kvm: SMP vm created on host with unstable TSC; "
6670 "guest TSC will not be reliable\n");
6671 return kvm_x86_ops
->vcpu_create(kvm
, id
);
6674 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
6678 vcpu
->arch
.mtrr_state
.have_fixed
= 1;
6679 r
= vcpu_load(vcpu
);
6682 kvm_vcpu_reset(vcpu
);
6683 kvm_mmu_setup(vcpu
);
6689 int kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
6692 struct msr_data msr
;
6694 r
= vcpu_load(vcpu
);
6698 msr
.index
= MSR_IA32_TSC
;
6699 msr
.host_initiated
= true;
6700 kvm_write_tsc(vcpu
, &msr
);
6706 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
6709 vcpu
->arch
.apf
.msr_val
= 0;
6711 r
= vcpu_load(vcpu
);
6713 kvm_mmu_unload(vcpu
);
6717 kvm_x86_ops
->vcpu_free(vcpu
);
6720 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
)
6722 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
6723 vcpu
->arch
.nmi_pending
= 0;
6724 vcpu
->arch
.nmi_injected
= false;
6726 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
6727 vcpu
->arch
.dr6
= DR6_FIXED_1
;
6728 kvm_update_dr6(vcpu
);
6729 vcpu
->arch
.dr7
= DR7_FIXED_1
;
6730 kvm_update_dr7(vcpu
);
6732 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6733 vcpu
->arch
.apf
.msr_val
= 0;
6734 vcpu
->arch
.st
.msr_val
= 0;
6736 kvmclock_reset(vcpu
);
6738 kvm_clear_async_pf_completion_queue(vcpu
);
6739 kvm_async_pf_hash_reset(vcpu
);
6740 vcpu
->arch
.apf
.halted
= false;
6742 kvm_pmu_reset(vcpu
);
6744 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
6745 vcpu
->arch
.regs_avail
= ~0;
6746 vcpu
->arch
.regs_dirty
= ~0;
6748 kvm_x86_ops
->vcpu_reset(vcpu
);
6751 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, unsigned int vector
)
6753 struct kvm_segment cs
;
6755 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6756 cs
.selector
= vector
<< 8;
6757 cs
.base
= vector
<< 12;
6758 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6759 kvm_rip_write(vcpu
, 0);
6762 int kvm_arch_hardware_enable(void *garbage
)
6765 struct kvm_vcpu
*vcpu
;
6770 bool stable
, backwards_tsc
= false;
6772 kvm_shared_msr_cpu_online();
6773 ret
= kvm_x86_ops
->hardware_enable(garbage
);
6777 local_tsc
= native_read_tsc();
6778 stable
= !check_tsc_unstable();
6779 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
6780 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
6781 if (!stable
&& vcpu
->cpu
== smp_processor_id())
6782 set_bit(KVM_REQ_CLOCK_UPDATE
, &vcpu
->requests
);
6783 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
6784 backwards_tsc
= true;
6785 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
6786 max_tsc
= vcpu
->arch
.last_host_tsc
;
6792 * Sometimes, even reliable TSCs go backwards. This happens on
6793 * platforms that reset TSC during suspend or hibernate actions, but
6794 * maintain synchronization. We must compensate. Fortunately, we can
6795 * detect that condition here, which happens early in CPU bringup,
6796 * before any KVM threads can be running. Unfortunately, we can't
6797 * bring the TSCs fully up to date with real time, as we aren't yet far
6798 * enough into CPU bringup that we know how much real time has actually
6799 * elapsed; our helper function, get_kernel_ns() will be using boot
6800 * variables that haven't been updated yet.
6802 * So we simply find the maximum observed TSC above, then record the
6803 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
6804 * the adjustment will be applied. Note that we accumulate
6805 * adjustments, in case multiple suspend cycles happen before some VCPU
6806 * gets a chance to run again. In the event that no KVM threads get a
6807 * chance to run, we will miss the entire elapsed period, as we'll have
6808 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
6809 * loose cycle time. This isn't too big a deal, since the loss will be
6810 * uniform across all VCPUs (not to mention the scenario is extremely
6811 * unlikely). It is possible that a second hibernate recovery happens
6812 * much faster than a first, causing the observed TSC here to be
6813 * smaller; this would require additional padding adjustment, which is
6814 * why we set last_host_tsc to the local tsc observed here.
6816 * N.B. - this code below runs only on platforms with reliable TSC,
6817 * as that is the only way backwards_tsc is set above. Also note
6818 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
6819 * have the same delta_cyc adjustment applied if backwards_tsc
6820 * is detected. Note further, this adjustment is only done once,
6821 * as we reset last_host_tsc on all VCPUs to stop this from being
6822 * called multiple times (one for each physical CPU bringup).
6824 * Platforms with unreliable TSCs don't have to deal with this, they
6825 * will be compensated by the logic in vcpu_load, which sets the TSC to
6826 * catchup mode. This will catchup all VCPUs to real time, but cannot
6827 * guarantee that they stay in perfect synchronization.
6829 if (backwards_tsc
) {
6830 u64 delta_cyc
= max_tsc
- local_tsc
;
6831 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
6832 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
6833 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
6834 vcpu
->arch
.last_host_tsc
= local_tsc
;
6835 set_bit(KVM_REQ_MASTERCLOCK_UPDATE
,
6840 * We have to disable TSC offset matching.. if you were
6841 * booting a VM while issuing an S4 host suspend....
6842 * you may have some problem. Solving this issue is
6843 * left as an exercise to the reader.
6845 kvm
->arch
.last_tsc_nsec
= 0;
6846 kvm
->arch
.last_tsc_write
= 0;
6853 void kvm_arch_hardware_disable(void *garbage
)
6855 kvm_x86_ops
->hardware_disable(garbage
);
6856 drop_user_return_notifiers(garbage
);
6859 int kvm_arch_hardware_setup(void)
6861 return kvm_x86_ops
->hardware_setup();
6864 void kvm_arch_hardware_unsetup(void)
6866 kvm_x86_ops
->hardware_unsetup();
6869 void kvm_arch_check_processor_compat(void *rtn
)
6871 kvm_x86_ops
->check_processor_compatibility(rtn
);
6874 bool kvm_vcpu_compatible(struct kvm_vcpu
*vcpu
)
6876 return irqchip_in_kernel(vcpu
->kvm
) == (vcpu
->arch
.apic
!= NULL
);
6879 struct static_key kvm_no_apic_vcpu __read_mostly
;
6881 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
6887 BUG_ON(vcpu
->kvm
== NULL
);
6890 vcpu
->arch
.pv
.pv_unhalted
= false;
6891 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
6892 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_bsp(vcpu
))
6893 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
6895 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
6897 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
6902 vcpu
->arch
.pio_data
= page_address(page
);
6904 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
6906 r
= kvm_mmu_create(vcpu
);
6908 goto fail_free_pio_data
;
6910 if (irqchip_in_kernel(kvm
)) {
6911 r
= kvm_create_lapic(vcpu
);
6913 goto fail_mmu_destroy
;
6915 static_key_slow_inc(&kvm_no_apic_vcpu
);
6917 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
6919 if (!vcpu
->arch
.mce_banks
) {
6921 goto fail_free_lapic
;
6923 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
6925 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
)) {
6927 goto fail_free_mce_banks
;
6932 goto fail_free_wbinvd_dirty_mask
;
6934 vcpu
->arch
.ia32_tsc_adjust_msr
= 0x0;
6935 vcpu
->arch
.pv_time_enabled
= false;
6937 vcpu
->arch
.guest_supported_xcr0
= 0;
6938 vcpu
->arch
.guest_xstate_size
= XSAVE_HDR_SIZE
+ XSAVE_HDR_OFFSET
;
6940 kvm_async_pf_hash_reset(vcpu
);
6944 fail_free_wbinvd_dirty_mask
:
6945 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
6946 fail_free_mce_banks
:
6947 kfree(vcpu
->arch
.mce_banks
);
6949 kvm_free_lapic(vcpu
);
6951 kvm_mmu_destroy(vcpu
);
6953 free_page((unsigned long)vcpu
->arch
.pio_data
);
6958 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
6962 kvm_pmu_destroy(vcpu
);
6963 kfree(vcpu
->arch
.mce_banks
);
6964 kvm_free_lapic(vcpu
);
6965 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6966 kvm_mmu_destroy(vcpu
);
6967 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
6968 free_page((unsigned long)vcpu
->arch
.pio_data
);
6969 if (!irqchip_in_kernel(vcpu
->kvm
))
6970 static_key_slow_dec(&kvm_no_apic_vcpu
);
6973 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
6978 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
6979 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
6980 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
6981 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
6983 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6984 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
6985 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
6986 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
6987 &kvm
->arch
.irq_sources_bitmap
);
6989 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
6990 mutex_init(&kvm
->arch
.apic_map_lock
);
6991 spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
6993 pvclock_update_vm_gtod_copy(kvm
);
6998 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
7001 r
= vcpu_load(vcpu
);
7003 kvm_mmu_unload(vcpu
);
7007 static void kvm_free_vcpus(struct kvm
*kvm
)
7010 struct kvm_vcpu
*vcpu
;
7013 * Unpin any mmu pages first.
7015 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7016 kvm_clear_async_pf_completion_queue(vcpu
);
7017 kvm_unload_vcpu_mmu(vcpu
);
7019 kvm_for_each_vcpu(i
, vcpu
, kvm
)
7020 kvm_arch_vcpu_free(vcpu
);
7022 mutex_lock(&kvm
->lock
);
7023 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
7024 kvm
->vcpus
[i
] = NULL
;
7026 atomic_set(&kvm
->online_vcpus
, 0);
7027 mutex_unlock(&kvm
->lock
);
7030 void kvm_arch_sync_events(struct kvm
*kvm
)
7032 kvm_free_all_assigned_devices(kvm
);
7036 void kvm_arch_destroy_vm(struct kvm
*kvm
)
7038 if (current
->mm
== kvm
->mm
) {
7040 * Free memory regions allocated on behalf of userspace,
7041 * unless the the memory map has changed due to process exit
7044 struct kvm_userspace_memory_region mem
;
7045 memset(&mem
, 0, sizeof(mem
));
7046 mem
.slot
= APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
;
7047 kvm_set_memory_region(kvm
, &mem
);
7049 mem
.slot
= IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
;
7050 kvm_set_memory_region(kvm
, &mem
);
7052 mem
.slot
= TSS_PRIVATE_MEMSLOT
;
7053 kvm_set_memory_region(kvm
, &mem
);
7055 kvm_iommu_unmap_guest(kvm
);
7056 kfree(kvm
->arch
.vpic
);
7057 kfree(kvm
->arch
.vioapic
);
7058 kvm_free_vcpus(kvm
);
7059 if (kvm
->arch
.apic_access_page
)
7060 put_page(kvm
->arch
.apic_access_page
);
7061 if (kvm
->arch
.ept_identity_pagetable
)
7062 put_page(kvm
->arch
.ept_identity_pagetable
);
7063 kfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
7066 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*free
,
7067 struct kvm_memory_slot
*dont
)
7071 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7072 if (!dont
|| free
->arch
.rmap
[i
] != dont
->arch
.rmap
[i
]) {
7073 kvm_kvfree(free
->arch
.rmap
[i
]);
7074 free
->arch
.rmap
[i
] = NULL
;
7079 if (!dont
|| free
->arch
.lpage_info
[i
- 1] !=
7080 dont
->arch
.lpage_info
[i
- 1]) {
7081 kvm_kvfree(free
->arch
.lpage_info
[i
- 1]);
7082 free
->arch
.lpage_info
[i
- 1] = NULL
;
7087 int kvm_arch_create_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
,
7088 unsigned long npages
)
7092 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7097 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
7098 slot
->base_gfn
, level
) + 1;
7100 slot
->arch
.rmap
[i
] =
7101 kvm_kvzalloc(lpages
* sizeof(*slot
->arch
.rmap
[i
]));
7102 if (!slot
->arch
.rmap
[i
])
7107 slot
->arch
.lpage_info
[i
- 1] = kvm_kvzalloc(lpages
*
7108 sizeof(*slot
->arch
.lpage_info
[i
- 1]));
7109 if (!slot
->arch
.lpage_info
[i
- 1])
7112 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
7113 slot
->arch
.lpage_info
[i
- 1][0].write_count
= 1;
7114 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
7115 slot
->arch
.lpage_info
[i
- 1][lpages
- 1].write_count
= 1;
7116 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
7118 * If the gfn and userspace address are not aligned wrt each
7119 * other, or if explicitly asked to, disable large page
7120 * support for this slot
7122 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1) ||
7123 !kvm_largepages_enabled()) {
7126 for (j
= 0; j
< lpages
; ++j
)
7127 slot
->arch
.lpage_info
[i
- 1][j
].write_count
= 1;
7134 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
7135 kvm_kvfree(slot
->arch
.rmap
[i
]);
7136 slot
->arch
.rmap
[i
] = NULL
;
7140 kvm_kvfree(slot
->arch
.lpage_info
[i
- 1]);
7141 slot
->arch
.lpage_info
[i
- 1] = NULL
;
7146 void kvm_arch_memslots_updated(struct kvm
*kvm
)
7149 * memslots->generation has been incremented.
7150 * mmio generation may have reached its maximum value.
7152 kvm_mmu_invalidate_mmio_sptes(kvm
);
7155 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
7156 struct kvm_memory_slot
*memslot
,
7157 struct kvm_userspace_memory_region
*mem
,
7158 enum kvm_mr_change change
)
7161 * Only private memory slots need to be mapped here since
7162 * KVM_SET_MEMORY_REGION ioctl is no longer supported.
7164 if ((memslot
->id
>= KVM_USER_MEM_SLOTS
) && (change
== KVM_MR_CREATE
)) {
7165 unsigned long userspace_addr
;
7168 * MAP_SHARED to prevent internal slot pages from being moved
7171 userspace_addr
= vm_mmap(NULL
, 0, memslot
->npages
* PAGE_SIZE
,
7172 PROT_READ
| PROT_WRITE
,
7173 MAP_SHARED
| MAP_ANONYMOUS
, 0);
7175 if (IS_ERR((void *)userspace_addr
))
7176 return PTR_ERR((void *)userspace_addr
);
7178 memslot
->userspace_addr
= userspace_addr
;
7184 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
7185 struct kvm_userspace_memory_region
*mem
,
7186 const struct kvm_memory_slot
*old
,
7187 enum kvm_mr_change change
)
7190 int nr_mmu_pages
= 0;
7192 if ((mem
->slot
>= KVM_USER_MEM_SLOTS
) && (change
== KVM_MR_DELETE
)) {
7195 ret
= vm_munmap(old
->userspace_addr
,
7196 old
->npages
* PAGE_SIZE
);
7199 "kvm_vm_ioctl_set_memory_region: "
7200 "failed to munmap memory\n");
7203 if (!kvm
->arch
.n_requested_mmu_pages
)
7204 nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
7207 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
7209 * Write protect all pages for dirty logging.
7210 * Existing largepage mappings are destroyed here and new ones will
7211 * not be created until the end of the logging.
7213 if ((change
!= KVM_MR_DELETE
) && (mem
->flags
& KVM_MEM_LOG_DIRTY_PAGES
))
7214 kvm_mmu_slot_remove_write_access(kvm
, mem
->slot
);
7217 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
7219 kvm_mmu_invalidate_zap_all_pages(kvm
);
7222 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
7223 struct kvm_memory_slot
*slot
)
7225 kvm_mmu_invalidate_zap_all_pages(kvm
);
7228 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
7230 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
7231 !vcpu
->arch
.apf
.halted
)
7232 || !list_empty_careful(&vcpu
->async_pf
.done
)
7233 || kvm_apic_has_events(vcpu
)
7234 || vcpu
->arch
.pv
.pv_unhalted
7235 || atomic_read(&vcpu
->arch
.nmi_queued
) ||
7236 (kvm_arch_interrupt_allowed(vcpu
) &&
7237 kvm_cpu_has_interrupt(vcpu
));
7240 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
7242 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
7245 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
7247 return kvm_x86_ops
->interrupt_allowed(vcpu
);
7250 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
7252 unsigned long current_rip
= kvm_rip_read(vcpu
) +
7253 get_segment_base(vcpu
, VCPU_SREG_CS
);
7255 return current_rip
== linear_rip
;
7257 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
7259 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
7261 unsigned long rflags
;
7263 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
7264 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
7265 rflags
&= ~X86_EFLAGS_TF
;
7268 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
7270 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
7272 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
7273 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
7274 rflags
|= X86_EFLAGS_TF
;
7275 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
7276 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7278 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
7280 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
7284 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
7288 r
= kvm_mmu_reload(vcpu
);
7292 if (!vcpu
->arch
.mmu
.direct_map
&&
7293 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
7296 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
7299 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
7301 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
7304 static inline u32
kvm_async_pf_next_probe(u32 key
)
7306 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
7309 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7311 u32 key
= kvm_async_pf_hash_fn(gfn
);
7313 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
7314 key
= kvm_async_pf_next_probe(key
);
7316 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
7319 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7322 u32 key
= kvm_async_pf_hash_fn(gfn
);
7324 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
7325 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
7326 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
7327 key
= kvm_async_pf_next_probe(key
);
7332 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7334 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
7337 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
7341 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
7343 vcpu
->arch
.apf
.gfns
[i
] = ~0;
7345 j
= kvm_async_pf_next_probe(j
);
7346 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
7348 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
7350 * k lies cyclically in ]i,j]
7352 * |....j i.k.| or |.k..j i...|
7354 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
7355 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
7360 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
7363 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
7367 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
7368 struct kvm_async_pf
*work
)
7370 struct x86_exception fault
;
7372 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
7373 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
7375 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
7376 (vcpu
->arch
.apf
.send_user_only
&&
7377 kvm_x86_ops
->get_cpl(vcpu
) == 0))
7378 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
7379 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
7380 fault
.vector
= PF_VECTOR
;
7381 fault
.error_code_valid
= true;
7382 fault
.error_code
= 0;
7383 fault
.nested_page_fault
= false;
7384 fault
.address
= work
->arch
.token
;
7385 kvm_inject_page_fault(vcpu
, &fault
);
7389 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
7390 struct kvm_async_pf
*work
)
7392 struct x86_exception fault
;
7394 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
7395 if (work
->wakeup_all
)
7396 work
->arch
.token
= ~0; /* broadcast wakeup */
7398 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
7400 if ((vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) &&
7401 !apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
7402 fault
.vector
= PF_VECTOR
;
7403 fault
.error_code_valid
= true;
7404 fault
.error_code
= 0;
7405 fault
.nested_page_fault
= false;
7406 fault
.address
= work
->arch
.token
;
7407 kvm_inject_page_fault(vcpu
, &fault
);
7409 vcpu
->arch
.apf
.halted
= false;
7410 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7413 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
7415 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
7418 return !kvm_event_needs_reinjection(vcpu
) &&
7419 kvm_x86_ops
->interrupt_allowed(vcpu
);
7422 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
7424 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
7426 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
7428 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
7430 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
7432 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
7434 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
7436 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
7438 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
7440 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
7441 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
7442 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
7443 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
7444 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
7445 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
7446 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
7447 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
7448 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
7449 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
7450 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
7451 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
7452 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);