2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
21 #include <linux/kvm_host.h>
26 #include "kvm_cache_regs.h"
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
33 #include <linux/vmalloc.h>
34 #include <linux/module.h>
35 #include <linux/mman.h>
36 #include <linux/highmem.h>
37 #include <linux/iommu.h>
38 #include <linux/intel-iommu.h>
39 #include <linux/cpufreq.h>
40 #include <linux/user-return-notifier.h>
41 #include <linux/srcu.h>
42 #include <trace/events/kvm.h>
43 #undef TRACE_INCLUDE_FILE
44 #define CREATE_TRACE_POINTS
47 #include <asm/debugreg.h>
48 #include <asm/uaccess.h>
54 #define MAX_IO_MSRS 256
55 #define CR0_RESERVED_BITS \
56 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
57 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
58 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
59 #define CR4_RESERVED_BITS \
60 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
61 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
62 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
63 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
65 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
67 #define KVM_MAX_MCE_BANKS 32
68 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
71 * - enable syscall per default because its emulated by KVM
72 * - enable LME and LMA per default on 64 bit KVM
75 static u64 __read_mostly efer_reserved_bits
= 0xfffffffffffffafeULL
;
77 static u64 __read_mostly efer_reserved_bits
= 0xfffffffffffffffeULL
;
80 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
81 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
83 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
84 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2
*cpuid
,
85 struct kvm_cpuid_entry2 __user
*entries
);
87 struct kvm_x86_ops
*kvm_x86_ops
;
88 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
91 module_param_named(ignore_msrs
, ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
93 #define KVM_NR_SHARED_MSRS 16
95 struct kvm_shared_msrs_global
{
97 u32 msrs
[KVM_NR_SHARED_MSRS
];
100 struct kvm_shared_msrs
{
101 struct user_return_notifier urn
;
103 struct kvm_shared_msr_values
{
106 } values
[KVM_NR_SHARED_MSRS
];
109 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
110 static DEFINE_PER_CPU(struct kvm_shared_msrs
, shared_msrs
);
112 struct kvm_stats_debugfs_item debugfs_entries
[] = {
113 { "pf_fixed", VCPU_STAT(pf_fixed
) },
114 { "pf_guest", VCPU_STAT(pf_guest
) },
115 { "tlb_flush", VCPU_STAT(tlb_flush
) },
116 { "invlpg", VCPU_STAT(invlpg
) },
117 { "exits", VCPU_STAT(exits
) },
118 { "io_exits", VCPU_STAT(io_exits
) },
119 { "mmio_exits", VCPU_STAT(mmio_exits
) },
120 { "signal_exits", VCPU_STAT(signal_exits
) },
121 { "irq_window", VCPU_STAT(irq_window_exits
) },
122 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
123 { "halt_exits", VCPU_STAT(halt_exits
) },
124 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
125 { "hypercalls", VCPU_STAT(hypercalls
) },
126 { "request_irq", VCPU_STAT(request_irq_exits
) },
127 { "irq_exits", VCPU_STAT(irq_exits
) },
128 { "host_state_reload", VCPU_STAT(host_state_reload
) },
129 { "efer_reload", VCPU_STAT(efer_reload
) },
130 { "fpu_reload", VCPU_STAT(fpu_reload
) },
131 { "insn_emulation", VCPU_STAT(insn_emulation
) },
132 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
133 { "irq_injections", VCPU_STAT(irq_injections
) },
134 { "nmi_injections", VCPU_STAT(nmi_injections
) },
135 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
136 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
137 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
138 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
139 { "mmu_flooded", VM_STAT(mmu_flooded
) },
140 { "mmu_recycled", VM_STAT(mmu_recycled
) },
141 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
142 { "mmu_unsync", VM_STAT(mmu_unsync
) },
143 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
144 { "largepages", VM_STAT(lpages
) },
148 static void kvm_on_user_return(struct user_return_notifier
*urn
)
151 struct kvm_shared_msrs
*locals
152 = container_of(urn
, struct kvm_shared_msrs
, urn
);
153 struct kvm_shared_msr_values
*values
;
155 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
156 values
= &locals
->values
[slot
];
157 if (values
->host
!= values
->curr
) {
158 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
159 values
->curr
= values
->host
;
162 locals
->registered
= false;
163 user_return_notifier_unregister(urn
);
166 static void shared_msr_update(unsigned slot
, u32 msr
)
168 struct kvm_shared_msrs
*smsr
;
171 smsr
= &__get_cpu_var(shared_msrs
);
172 /* only read, and nobody should modify it at this time,
173 * so don't need lock */
174 if (slot
>= shared_msrs_global
.nr
) {
175 printk(KERN_ERR
"kvm: invalid MSR slot!");
178 rdmsrl_safe(msr
, &value
);
179 smsr
->values
[slot
].host
= value
;
180 smsr
->values
[slot
].curr
= value
;
183 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
185 if (slot
>= shared_msrs_global
.nr
)
186 shared_msrs_global
.nr
= slot
+ 1;
187 shared_msrs_global
.msrs
[slot
] = msr
;
188 /* we need ensured the shared_msr_global have been updated */
191 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
193 static void kvm_shared_msr_cpu_online(void)
197 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
198 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
201 void kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
203 struct kvm_shared_msrs
*smsr
= &__get_cpu_var(shared_msrs
);
205 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
207 smsr
->values
[slot
].curr
= value
;
208 wrmsrl(shared_msrs_global
.msrs
[slot
], value
);
209 if (!smsr
->registered
) {
210 smsr
->urn
.on_user_return
= kvm_on_user_return
;
211 user_return_notifier_register(&smsr
->urn
);
212 smsr
->registered
= true;
215 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
217 static void drop_user_return_notifiers(void *ignore
)
219 struct kvm_shared_msrs
*smsr
= &__get_cpu_var(shared_msrs
);
221 if (smsr
->registered
)
222 kvm_on_user_return(&smsr
->urn
);
225 unsigned long segment_base(u16 selector
)
227 struct descriptor_table gdt
;
228 struct desc_struct
*d
;
229 unsigned long table_base
;
236 table_base
= gdt
.base
;
238 if (selector
& 4) { /* from ldt */
239 u16 ldt_selector
= kvm_read_ldt();
241 table_base
= segment_base(ldt_selector
);
243 d
= (struct desc_struct
*)(table_base
+ (selector
& ~7));
244 v
= get_desc_base(d
);
246 if (d
->s
== 0 && (d
->type
== 2 || d
->type
== 9 || d
->type
== 11))
247 v
|= ((unsigned long)((struct ldttss_desc64
*)d
)->base3
) << 32;
251 EXPORT_SYMBOL_GPL(segment_base
);
253 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
255 if (irqchip_in_kernel(vcpu
->kvm
))
256 return vcpu
->arch
.apic_base
;
258 return vcpu
->arch
.apic_base
;
260 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
262 void kvm_set_apic_base(struct kvm_vcpu
*vcpu
, u64 data
)
264 /* TODO: reserve bits check */
265 if (irqchip_in_kernel(vcpu
->kvm
))
266 kvm_lapic_set_base(vcpu
, data
);
268 vcpu
->arch
.apic_base
= data
;
270 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
272 #define EXCPT_BENIGN 0
273 #define EXCPT_CONTRIBUTORY 1
276 static int exception_class(int vector
)
286 return EXCPT_CONTRIBUTORY
;
293 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
294 unsigned nr
, bool has_error
, u32 error_code
)
299 if (!vcpu
->arch
.exception
.pending
) {
301 vcpu
->arch
.exception
.pending
= true;
302 vcpu
->arch
.exception
.has_error_code
= has_error
;
303 vcpu
->arch
.exception
.nr
= nr
;
304 vcpu
->arch
.exception
.error_code
= error_code
;
308 /* to check exception */
309 prev_nr
= vcpu
->arch
.exception
.nr
;
310 if (prev_nr
== DF_VECTOR
) {
311 /* triple fault -> shutdown */
312 set_bit(KVM_REQ_TRIPLE_FAULT
, &vcpu
->requests
);
315 class1
= exception_class(prev_nr
);
316 class2
= exception_class(nr
);
317 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
318 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
319 /* generate double fault per SDM Table 5-5 */
320 vcpu
->arch
.exception
.pending
= true;
321 vcpu
->arch
.exception
.has_error_code
= true;
322 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
323 vcpu
->arch
.exception
.error_code
= 0;
325 /* replace previous exception with a new one in a hope
326 that instruction re-execution will regenerate lost
331 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
333 kvm_multiple_exception(vcpu
, nr
, false, 0);
335 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
337 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, unsigned long addr
,
340 ++vcpu
->stat
.pf_guest
;
341 vcpu
->arch
.cr2
= addr
;
342 kvm_queue_exception_e(vcpu
, PF_VECTOR
, error_code
);
345 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
347 vcpu
->arch
.nmi_pending
= 1;
349 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
351 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
353 kvm_multiple_exception(vcpu
, nr
, true, error_code
);
355 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
358 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
359 * a #GP and return false.
361 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
363 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
365 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
368 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
371 * Load the pae pdptrs. Return true is they are all valid.
373 int load_pdptrs(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
375 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
376 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
379 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.pdptrs
)];
381 ret
= kvm_read_guest_page(vcpu
->kvm
, pdpt_gfn
, pdpte
,
382 offset
* sizeof(u64
), sizeof(pdpte
));
387 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
388 if (is_present_gpte(pdpte
[i
]) &&
389 (pdpte
[i
] & vcpu
->arch
.mmu
.rsvd_bits_mask
[0][2])) {
396 memcpy(vcpu
->arch
.pdptrs
, pdpte
, sizeof(vcpu
->arch
.pdptrs
));
397 __set_bit(VCPU_EXREG_PDPTR
,
398 (unsigned long *)&vcpu
->arch
.regs_avail
);
399 __set_bit(VCPU_EXREG_PDPTR
,
400 (unsigned long *)&vcpu
->arch
.regs_dirty
);
405 EXPORT_SYMBOL_GPL(load_pdptrs
);
407 static bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
409 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.pdptrs
)];
413 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
416 if (!test_bit(VCPU_EXREG_PDPTR
,
417 (unsigned long *)&vcpu
->arch
.regs_avail
))
420 r
= kvm_read_guest(vcpu
->kvm
, vcpu
->arch
.cr3
& ~31u, pdpte
, sizeof(pdpte
));
423 changed
= memcmp(pdpte
, vcpu
->arch
.pdptrs
, sizeof(pdpte
)) != 0;
429 void kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
433 if (cr0
& CR0_RESERVED_BITS
) {
434 printk(KERN_DEBUG
"set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
435 cr0
, kvm_read_cr0(vcpu
));
436 kvm_inject_gp(vcpu
, 0);
440 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
)) {
441 printk(KERN_DEBUG
"set_cr0: #GP, CD == 0 && NW == 1\n");
442 kvm_inject_gp(vcpu
, 0);
446 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
)) {
447 printk(KERN_DEBUG
"set_cr0: #GP, set PG flag "
448 "and a clear PE flag\n");
449 kvm_inject_gp(vcpu
, 0);
453 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
455 if ((vcpu
->arch
.shadow_efer
& EFER_LME
)) {
459 printk(KERN_DEBUG
"set_cr0: #GP, start paging "
460 "in long mode while PAE is disabled\n");
461 kvm_inject_gp(vcpu
, 0);
464 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
466 printk(KERN_DEBUG
"set_cr0: #GP, start paging "
467 "in long mode while CS.L == 1\n");
468 kvm_inject_gp(vcpu
, 0);
474 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.cr3
)) {
475 printk(KERN_DEBUG
"set_cr0: #GP, pdptrs "
477 kvm_inject_gp(vcpu
, 0);
483 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
484 vcpu
->arch
.cr0
= cr0
;
486 kvm_mmu_reset_context(vcpu
);
489 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
491 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
493 kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0ful
) | (msw
& 0x0f));
495 EXPORT_SYMBOL_GPL(kvm_lmsw
);
497 void kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
499 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
500 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
;
502 if (cr4
& CR4_RESERVED_BITS
) {
503 printk(KERN_DEBUG
"set_cr4: #GP, reserved bits\n");
504 kvm_inject_gp(vcpu
, 0);
508 if (is_long_mode(vcpu
)) {
509 if (!(cr4
& X86_CR4_PAE
)) {
510 printk(KERN_DEBUG
"set_cr4: #GP, clearing PAE while "
512 kvm_inject_gp(vcpu
, 0);
515 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
516 && ((cr4
^ old_cr4
) & pdptr_bits
)
517 && !load_pdptrs(vcpu
, vcpu
->arch
.cr3
)) {
518 printk(KERN_DEBUG
"set_cr4: #GP, pdptrs reserved bits\n");
519 kvm_inject_gp(vcpu
, 0);
523 if (cr4
& X86_CR4_VMXE
) {
524 printk(KERN_DEBUG
"set_cr4: #GP, setting VMXE\n");
525 kvm_inject_gp(vcpu
, 0);
528 kvm_x86_ops
->set_cr4(vcpu
, cr4
);
529 vcpu
->arch
.cr4
= cr4
;
530 vcpu
->arch
.mmu
.base_role
.cr4_pge
= (cr4
& X86_CR4_PGE
) && !tdp_enabled
;
531 kvm_mmu_reset_context(vcpu
);
533 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
535 void kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
537 if (cr3
== vcpu
->arch
.cr3
&& !pdptrs_changed(vcpu
)) {
538 kvm_mmu_sync_roots(vcpu
);
539 kvm_mmu_flush_tlb(vcpu
);
543 if (is_long_mode(vcpu
)) {
544 if (cr3
& CR3_L_MODE_RESERVED_BITS
) {
545 printk(KERN_DEBUG
"set_cr3: #GP, reserved bits\n");
546 kvm_inject_gp(vcpu
, 0);
551 if (cr3
& CR3_PAE_RESERVED_BITS
) {
553 "set_cr3: #GP, reserved bits\n");
554 kvm_inject_gp(vcpu
, 0);
557 if (is_paging(vcpu
) && !load_pdptrs(vcpu
, cr3
)) {
558 printk(KERN_DEBUG
"set_cr3: #GP, pdptrs "
560 kvm_inject_gp(vcpu
, 0);
565 * We don't check reserved bits in nonpae mode, because
566 * this isn't enforced, and VMware depends on this.
571 * Does the new cr3 value map to physical memory? (Note, we
572 * catch an invalid cr3 even in real-mode, because it would
573 * cause trouble later on when we turn on paging anyway.)
575 * A real CPU would silently accept an invalid cr3 and would
576 * attempt to use it - with largely undefined (and often hard
577 * to debug) behavior on the guest side.
579 if (unlikely(!gfn_to_memslot(vcpu
->kvm
, cr3
>> PAGE_SHIFT
)))
580 kvm_inject_gp(vcpu
, 0);
582 vcpu
->arch
.cr3
= cr3
;
583 vcpu
->arch
.mmu
.new_cr3(vcpu
);
586 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
588 void kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
590 if (cr8
& CR8_RESERVED_BITS
) {
591 printk(KERN_DEBUG
"set_cr8: #GP, reserved bits 0x%lx\n", cr8
);
592 kvm_inject_gp(vcpu
, 0);
595 if (irqchip_in_kernel(vcpu
->kvm
))
596 kvm_lapic_set_tpr(vcpu
, cr8
);
598 vcpu
->arch
.cr8
= cr8
;
600 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
602 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
604 if (irqchip_in_kernel(vcpu
->kvm
))
605 return kvm_lapic_get_cr8(vcpu
);
607 return vcpu
->arch
.cr8
;
609 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
611 static inline u32
bit(int bitno
)
613 return 1 << (bitno
& 31);
617 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
618 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
620 * This list is modified at module load time to reflect the
621 * capabilities of the host cpu. This capabilities test skips MSRs that are
622 * kvm-specific. Those are put in the beginning of the list.
625 #define KVM_SAVE_MSRS_BEGIN 2
626 static u32 msrs_to_save
[] = {
627 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
628 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
631 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
633 MSR_IA32_TSC
, MSR_IA32_PERF_STATUS
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
636 static unsigned num_msrs_to_save
;
638 static u32 emulated_msrs
[] = {
639 MSR_IA32_MISC_ENABLE
,
642 static void set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
644 if (efer
& efer_reserved_bits
) {
645 printk(KERN_DEBUG
"set_efer: 0x%llx #GP, reserved bits\n",
647 kvm_inject_gp(vcpu
, 0);
652 && (vcpu
->arch
.shadow_efer
& EFER_LME
) != (efer
& EFER_LME
)) {
653 printk(KERN_DEBUG
"set_efer: #GP, change LME while paging\n");
654 kvm_inject_gp(vcpu
, 0);
658 if (efer
& EFER_FFXSR
) {
659 struct kvm_cpuid_entry2
*feat
;
661 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
662 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
))) {
663 printk(KERN_DEBUG
"set_efer: #GP, enable FFXSR w/o CPUID capability\n");
664 kvm_inject_gp(vcpu
, 0);
669 if (efer
& EFER_SVME
) {
670 struct kvm_cpuid_entry2
*feat
;
672 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
673 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
))) {
674 printk(KERN_DEBUG
"set_efer: #GP, enable SVM w/o SVM\n");
675 kvm_inject_gp(vcpu
, 0);
680 kvm_x86_ops
->set_efer(vcpu
, efer
);
683 efer
|= vcpu
->arch
.shadow_efer
& EFER_LMA
;
685 vcpu
->arch
.shadow_efer
= efer
;
687 vcpu
->arch
.mmu
.base_role
.nxe
= (efer
& EFER_NX
) && !tdp_enabled
;
688 kvm_mmu_reset_context(vcpu
);
691 void kvm_enable_efer_bits(u64 mask
)
693 efer_reserved_bits
&= ~mask
;
695 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
699 * Writes msr value into into the appropriate "register".
700 * Returns 0 on success, non-0 otherwise.
701 * Assumes vcpu_load() was already called.
703 int kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64 data
)
705 return kvm_x86_ops
->set_msr(vcpu
, msr_index
, data
);
709 * Adapt set_msr() to msr_io()'s calling convention
711 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
713 return kvm_set_msr(vcpu
, index
, *data
);
716 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
719 struct pvclock_wall_clock wc
;
720 struct timespec boot
;
727 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
730 * The guest calculates current wall clock time by adding
731 * system time (updated by kvm_write_guest_time below) to the
732 * wall clock specified here. guest system time equals host
733 * system time for us, thus we must fill in host boot time here.
737 wc
.sec
= boot
.tv_sec
;
738 wc
.nsec
= boot
.tv_nsec
;
739 wc
.version
= version
;
741 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
744 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
747 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
749 uint32_t quotient
, remainder
;
751 /* Don't try to replace with do_div(), this one calculates
752 * "(dividend << 32) / divisor" */
754 : "=a" (quotient
), "=d" (remainder
)
755 : "0" (0), "1" (dividend
), "r" (divisor
) );
759 static void kvm_set_time_scale(uint32_t tsc_khz
, struct pvclock_vcpu_time_info
*hv_clock
)
761 uint64_t nsecs
= 1000000000LL;
766 tps64
= tsc_khz
* 1000LL;
767 while (tps64
> nsecs
*2) {
772 tps32
= (uint32_t)tps64
;
773 while (tps32
<= (uint32_t)nsecs
) {
778 hv_clock
->tsc_shift
= shift
;
779 hv_clock
->tsc_to_system_mul
= div_frac(nsecs
, tps32
);
781 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
782 __func__
, tsc_khz
, hv_clock
->tsc_shift
,
783 hv_clock
->tsc_to_system_mul
);
786 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
788 static void kvm_write_guest_time(struct kvm_vcpu
*v
)
792 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
794 unsigned long this_tsc_khz
;
796 if ((!vcpu
->time_page
))
799 this_tsc_khz
= get_cpu_var(cpu_tsc_khz
);
800 if (unlikely(vcpu
->hv_clock_tsc_khz
!= this_tsc_khz
)) {
801 kvm_set_time_scale(this_tsc_khz
, &vcpu
->hv_clock
);
802 vcpu
->hv_clock_tsc_khz
= this_tsc_khz
;
804 put_cpu_var(cpu_tsc_khz
);
806 /* Keep irq disabled to prevent changes to the clock */
807 local_irq_save(flags
);
808 kvm_get_msr(v
, MSR_IA32_TSC
, &vcpu
->hv_clock
.tsc_timestamp
);
810 monotonic_to_bootbased(&ts
);
811 local_irq_restore(flags
);
813 /* With all the info we got, fill in the values */
815 vcpu
->hv_clock
.system_time
= ts
.tv_nsec
+
816 (NSEC_PER_SEC
* (u64
)ts
.tv_sec
) + v
->kvm
->arch
.kvmclock_offset
;
819 * The interface expects us to write an even number signaling that the
820 * update is finished. Since the guest won't see the intermediate
821 * state, we just increase by 2 at the end.
823 vcpu
->hv_clock
.version
+= 2;
825 shared_kaddr
= kmap_atomic(vcpu
->time_page
, KM_USER0
);
827 memcpy(shared_kaddr
+ vcpu
->time_offset
, &vcpu
->hv_clock
,
828 sizeof(vcpu
->hv_clock
));
830 kunmap_atomic(shared_kaddr
, KM_USER0
);
832 mark_page_dirty(v
->kvm
, vcpu
->time
>> PAGE_SHIFT
);
835 static int kvm_request_guest_time_update(struct kvm_vcpu
*v
)
837 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
839 if (!vcpu
->time_page
)
841 set_bit(KVM_REQ_KVMCLOCK_UPDATE
, &v
->requests
);
845 static bool msr_mtrr_valid(unsigned msr
)
848 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR
- 1:
849 case MSR_MTRRfix64K_00000
:
850 case MSR_MTRRfix16K_80000
:
851 case MSR_MTRRfix16K_A0000
:
852 case MSR_MTRRfix4K_C0000
:
853 case MSR_MTRRfix4K_C8000
:
854 case MSR_MTRRfix4K_D0000
:
855 case MSR_MTRRfix4K_D8000
:
856 case MSR_MTRRfix4K_E0000
:
857 case MSR_MTRRfix4K_E8000
:
858 case MSR_MTRRfix4K_F0000
:
859 case MSR_MTRRfix4K_F8000
:
860 case MSR_MTRRdefType
:
861 case MSR_IA32_CR_PAT
:
869 static bool valid_pat_type(unsigned t
)
871 return t
< 8 && (1 << t
) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
874 static bool valid_mtrr_type(unsigned t
)
876 return t
< 8 && (1 << t
) & 0x73; /* 0, 1, 4, 5, 6 */
879 static bool mtrr_valid(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
883 if (!msr_mtrr_valid(msr
))
886 if (msr
== MSR_IA32_CR_PAT
) {
887 for (i
= 0; i
< 8; i
++)
888 if (!valid_pat_type((data
>> (i
* 8)) & 0xff))
891 } else if (msr
== MSR_MTRRdefType
) {
894 return valid_mtrr_type(data
& 0xff);
895 } else if (msr
>= MSR_MTRRfix64K_00000
&& msr
<= MSR_MTRRfix4K_F8000
) {
896 for (i
= 0; i
< 8 ; i
++)
897 if (!valid_mtrr_type((data
>> (i
* 8)) & 0xff))
903 return valid_mtrr_type(data
& 0xff);
906 static int set_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
908 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
910 if (!mtrr_valid(vcpu
, msr
, data
))
913 if (msr
== MSR_MTRRdefType
) {
914 vcpu
->arch
.mtrr_state
.def_type
= data
;
915 vcpu
->arch
.mtrr_state
.enabled
= (data
& 0xc00) >> 10;
916 } else if (msr
== MSR_MTRRfix64K_00000
)
918 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
919 p
[1 + msr
- MSR_MTRRfix16K_80000
] = data
;
920 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
921 p
[3 + msr
- MSR_MTRRfix4K_C0000
] = data
;
922 else if (msr
== MSR_IA32_CR_PAT
)
923 vcpu
->arch
.pat
= data
;
924 else { /* Variable MTRRs */
925 int idx
, is_mtrr_mask
;
928 idx
= (msr
- 0x200) / 2;
929 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
932 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
935 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
939 kvm_mmu_reset_context(vcpu
);
943 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
945 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
946 unsigned bank_num
= mcg_cap
& 0xff;
949 case MSR_IA32_MCG_STATUS
:
950 vcpu
->arch
.mcg_status
= data
;
952 case MSR_IA32_MCG_CTL
:
953 if (!(mcg_cap
& MCG_CTL_P
))
955 if (data
!= 0 && data
!= ~(u64
)0)
957 vcpu
->arch
.mcg_ctl
= data
;
960 if (msr
>= MSR_IA32_MC0_CTL
&&
961 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
962 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
963 /* only 0 or all 1s can be written to IA32_MCi_CTL */
964 if ((offset
& 0x3) == 0 &&
965 data
!= 0 && data
!= ~(u64
)0)
967 vcpu
->arch
.mce_banks
[offset
] = data
;
975 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
977 struct kvm
*kvm
= vcpu
->kvm
;
978 int lm
= is_long_mode(vcpu
);
979 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
980 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
981 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
982 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
983 u32 page_num
= data
& ~PAGE_MASK
;
984 u64 page_addr
= data
& PAGE_MASK
;
989 if (page_num
>= blob_size
)
992 page
= kzalloc(PAGE_SIZE
, GFP_KERNEL
);
996 if (copy_from_user(page
, blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
))
998 if (kvm_write_guest(kvm
, page_addr
, page
, PAGE_SIZE
))
1007 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1011 set_efer(vcpu
, data
);
1014 data
&= ~(u64
)0x40; /* ignore flush filter disable */
1016 pr_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
1021 case MSR_FAM10H_MMIO_CONF_BASE
:
1023 pr_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
1028 case MSR_AMD64_NB_CFG
:
1030 case MSR_IA32_DEBUGCTLMSR
:
1032 /* We support the non-activated case already */
1034 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
1035 /* Values other than LBR and BTF are vendor-specific,
1036 thus reserved and should throw a #GP */
1039 pr_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1042 case MSR_IA32_UCODE_REV
:
1043 case MSR_IA32_UCODE_WRITE
:
1044 case MSR_VM_HSAVE_PA
:
1045 case MSR_AMD64_PATCH_LOADER
:
1047 case 0x200 ... 0x2ff:
1048 return set_msr_mtrr(vcpu
, msr
, data
);
1049 case MSR_IA32_APICBASE
:
1050 kvm_set_apic_base(vcpu
, data
);
1052 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
1053 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
1054 case MSR_IA32_MISC_ENABLE
:
1055 vcpu
->arch
.ia32_misc_enable_msr
= data
;
1057 case MSR_KVM_WALL_CLOCK
:
1058 vcpu
->kvm
->arch
.wall_clock
= data
;
1059 kvm_write_wall_clock(vcpu
->kvm
, data
);
1061 case MSR_KVM_SYSTEM_TIME
: {
1062 if (vcpu
->arch
.time_page
) {
1063 kvm_release_page_dirty(vcpu
->arch
.time_page
);
1064 vcpu
->arch
.time_page
= NULL
;
1067 vcpu
->arch
.time
= data
;
1069 /* we verify if the enable bit is set... */
1073 /* ...but clean it before doing the actual write */
1074 vcpu
->arch
.time_offset
= data
& ~(PAGE_MASK
| 1);
1076 vcpu
->arch
.time_page
=
1077 gfn_to_page(vcpu
->kvm
, data
>> PAGE_SHIFT
);
1079 if (is_error_page(vcpu
->arch
.time_page
)) {
1080 kvm_release_page_clean(vcpu
->arch
.time_page
);
1081 vcpu
->arch
.time_page
= NULL
;
1084 kvm_request_guest_time_update(vcpu
);
1087 case MSR_IA32_MCG_CTL
:
1088 case MSR_IA32_MCG_STATUS
:
1089 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
1090 return set_msr_mce(vcpu
, msr
, data
);
1092 /* Performance counters are not protected by a CPUID bit,
1093 * so we should check all of them in the generic path for the sake of
1094 * cross vendor migration.
1095 * Writing a zero into the event select MSRs disables them,
1096 * which we perfectly emulate ;-). Any other value should be at least
1097 * reported, some guests depend on them.
1099 case MSR_P6_EVNTSEL0
:
1100 case MSR_P6_EVNTSEL1
:
1101 case MSR_K7_EVNTSEL0
:
1102 case MSR_K7_EVNTSEL1
:
1103 case MSR_K7_EVNTSEL2
:
1104 case MSR_K7_EVNTSEL3
:
1106 pr_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
1107 "0x%x data 0x%llx\n", msr
, data
);
1109 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1110 * so we ignore writes to make it happy.
1112 case MSR_P6_PERFCTR0
:
1113 case MSR_P6_PERFCTR1
:
1114 case MSR_K7_PERFCTR0
:
1115 case MSR_K7_PERFCTR1
:
1116 case MSR_K7_PERFCTR2
:
1117 case MSR_K7_PERFCTR3
:
1118 pr_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
1119 "0x%x data 0x%llx\n", msr
, data
);
1122 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
1123 return xen_hvm_config(vcpu
, data
);
1125 pr_unimpl(vcpu
, "unhandled wrmsr: 0x%x data %llx\n",
1129 pr_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n",
1136 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
1140 * Reads an msr value (of 'msr_index') into 'pdata'.
1141 * Returns 0 on success, non-0 otherwise.
1142 * Assumes vcpu_load() was already called.
1144 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
1146 return kvm_x86_ops
->get_msr(vcpu
, msr_index
, pdata
);
1149 static int get_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1151 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
1153 if (!msr_mtrr_valid(msr
))
1156 if (msr
== MSR_MTRRdefType
)
1157 *pdata
= vcpu
->arch
.mtrr_state
.def_type
+
1158 (vcpu
->arch
.mtrr_state
.enabled
<< 10);
1159 else if (msr
== MSR_MTRRfix64K_00000
)
1161 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
1162 *pdata
= p
[1 + msr
- MSR_MTRRfix16K_80000
];
1163 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
1164 *pdata
= p
[3 + msr
- MSR_MTRRfix4K_C0000
];
1165 else if (msr
== MSR_IA32_CR_PAT
)
1166 *pdata
= vcpu
->arch
.pat
;
1167 else { /* Variable MTRRs */
1168 int idx
, is_mtrr_mask
;
1171 idx
= (msr
- 0x200) / 2;
1172 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
1175 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
1178 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
1185 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1188 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1189 unsigned bank_num
= mcg_cap
& 0xff;
1192 case MSR_IA32_P5_MC_ADDR
:
1193 case MSR_IA32_P5_MC_TYPE
:
1196 case MSR_IA32_MCG_CAP
:
1197 data
= vcpu
->arch
.mcg_cap
;
1199 case MSR_IA32_MCG_CTL
:
1200 if (!(mcg_cap
& MCG_CTL_P
))
1202 data
= vcpu
->arch
.mcg_ctl
;
1204 case MSR_IA32_MCG_STATUS
:
1205 data
= vcpu
->arch
.mcg_status
;
1208 if (msr
>= MSR_IA32_MC0_CTL
&&
1209 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
1210 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1211 data
= vcpu
->arch
.mce_banks
[offset
];
1220 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1225 case MSR_IA32_PLATFORM_ID
:
1226 case MSR_IA32_UCODE_REV
:
1227 case MSR_IA32_EBL_CR_POWERON
:
1228 case MSR_IA32_DEBUGCTLMSR
:
1229 case MSR_IA32_LASTBRANCHFROMIP
:
1230 case MSR_IA32_LASTBRANCHTOIP
:
1231 case MSR_IA32_LASTINTFROMIP
:
1232 case MSR_IA32_LASTINTTOIP
:
1235 case MSR_VM_HSAVE_PA
:
1236 case MSR_P6_PERFCTR0
:
1237 case MSR_P6_PERFCTR1
:
1238 case MSR_P6_EVNTSEL0
:
1239 case MSR_P6_EVNTSEL1
:
1240 case MSR_K7_EVNTSEL0
:
1241 case MSR_K7_PERFCTR0
:
1242 case MSR_K8_INT_PENDING_MSG
:
1243 case MSR_AMD64_NB_CFG
:
1244 case MSR_FAM10H_MMIO_CONF_BASE
:
1248 data
= 0x500 | KVM_NR_VAR_MTRR
;
1250 case 0x200 ... 0x2ff:
1251 return get_msr_mtrr(vcpu
, msr
, pdata
);
1252 case 0xcd: /* fsb frequency */
1255 case MSR_IA32_APICBASE
:
1256 data
= kvm_get_apic_base(vcpu
);
1258 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
1259 return kvm_x2apic_msr_read(vcpu
, msr
, pdata
);
1261 case MSR_IA32_MISC_ENABLE
:
1262 data
= vcpu
->arch
.ia32_misc_enable_msr
;
1264 case MSR_IA32_PERF_STATUS
:
1265 /* TSC increment by tick */
1267 /* CPU multiplier */
1268 data
|= (((uint64_t)4ULL) << 40);
1271 data
= vcpu
->arch
.shadow_efer
;
1273 case MSR_KVM_WALL_CLOCK
:
1274 data
= vcpu
->kvm
->arch
.wall_clock
;
1276 case MSR_KVM_SYSTEM_TIME
:
1277 data
= vcpu
->arch
.time
;
1279 case MSR_IA32_P5_MC_ADDR
:
1280 case MSR_IA32_P5_MC_TYPE
:
1281 case MSR_IA32_MCG_CAP
:
1282 case MSR_IA32_MCG_CTL
:
1283 case MSR_IA32_MCG_STATUS
:
1284 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
1285 return get_msr_mce(vcpu
, msr
, pdata
);
1288 pr_unimpl(vcpu
, "unhandled rdmsr: 0x%x\n", msr
);
1291 pr_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr
);
1299 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
1302 * Read or write a bunch of msrs. All parameters are kernel addresses.
1304 * @return number of msrs set successfully.
1306 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
1307 struct kvm_msr_entry
*entries
,
1308 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
1309 unsigned index
, u64
*data
))
1315 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
1316 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
1317 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
1319 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
1327 * Read or write a bunch of msrs. Parameters are user addresses.
1329 * @return number of msrs set successfully.
1331 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
1332 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
1333 unsigned index
, u64
*data
),
1336 struct kvm_msrs msrs
;
1337 struct kvm_msr_entry
*entries
;
1342 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
1346 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
1350 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
1351 entries
= vmalloc(size
);
1356 if (copy_from_user(entries
, user_msrs
->entries
, size
))
1359 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
1364 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
1375 int kvm_dev_ioctl_check_extension(long ext
)
1380 case KVM_CAP_IRQCHIP
:
1382 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
1383 case KVM_CAP_SET_TSS_ADDR
:
1384 case KVM_CAP_EXT_CPUID
:
1385 case KVM_CAP_CLOCKSOURCE
:
1387 case KVM_CAP_NOP_IO_DELAY
:
1388 case KVM_CAP_MP_STATE
:
1389 case KVM_CAP_SYNC_MMU
:
1390 case KVM_CAP_REINJECT_CONTROL
:
1391 case KVM_CAP_IRQ_INJECT_STATUS
:
1392 case KVM_CAP_ASSIGN_DEV_IRQ
:
1394 case KVM_CAP_IOEVENTFD
:
1396 case KVM_CAP_PIT_STATE2
:
1397 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
1398 case KVM_CAP_XEN_HVM
:
1399 case KVM_CAP_ADJUST_CLOCK
:
1400 case KVM_CAP_VCPU_EVENTS
:
1403 case KVM_CAP_COALESCED_MMIO
:
1404 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
1407 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
1409 case KVM_CAP_NR_VCPUS
:
1412 case KVM_CAP_NR_MEMSLOTS
:
1413 r
= KVM_MEMORY_SLOTS
;
1415 case KVM_CAP_PV_MMU
: /* obsolete */
1422 r
= KVM_MAX_MCE_BANKS
;
1432 long kvm_arch_dev_ioctl(struct file
*filp
,
1433 unsigned int ioctl
, unsigned long arg
)
1435 void __user
*argp
= (void __user
*)arg
;
1439 case KVM_GET_MSR_INDEX_LIST
: {
1440 struct kvm_msr_list __user
*user_msr_list
= argp
;
1441 struct kvm_msr_list msr_list
;
1445 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
1448 msr_list
.nmsrs
= num_msrs_to_save
+ ARRAY_SIZE(emulated_msrs
);
1449 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
1452 if (n
< msr_list
.nmsrs
)
1455 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
1456 num_msrs_to_save
* sizeof(u32
)))
1458 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
1460 ARRAY_SIZE(emulated_msrs
) * sizeof(u32
)))
1465 case KVM_GET_SUPPORTED_CPUID
: {
1466 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
1467 struct kvm_cpuid2 cpuid
;
1470 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
1472 r
= kvm_dev_ioctl_get_supported_cpuid(&cpuid
,
1473 cpuid_arg
->entries
);
1478 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
1483 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
1486 mce_cap
= KVM_MCE_CAP_SUPPORTED
;
1488 if (copy_to_user(argp
, &mce_cap
, sizeof mce_cap
))
1500 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
1502 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
1503 if (unlikely(per_cpu(cpu_tsc_khz
, cpu
) == 0)) {
1504 unsigned long khz
= cpufreq_quick_get(cpu
);
1507 per_cpu(cpu_tsc_khz
, cpu
) = khz
;
1509 kvm_request_guest_time_update(vcpu
);
1512 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
1514 kvm_put_guest_fpu(vcpu
);
1515 kvm_x86_ops
->vcpu_put(vcpu
);
1518 static int is_efer_nx(void)
1520 unsigned long long efer
= 0;
1522 rdmsrl_safe(MSR_EFER
, &efer
);
1523 return efer
& EFER_NX
;
1526 static void cpuid_fix_nx_cap(struct kvm_vcpu
*vcpu
)
1529 struct kvm_cpuid_entry2
*e
, *entry
;
1532 for (i
= 0; i
< vcpu
->arch
.cpuid_nent
; ++i
) {
1533 e
= &vcpu
->arch
.cpuid_entries
[i
];
1534 if (e
->function
== 0x80000001) {
1539 if (entry
&& (entry
->edx
& (1 << 20)) && !is_efer_nx()) {
1540 entry
->edx
&= ~(1 << 20);
1541 printk(KERN_INFO
"kvm: guest NX capability removed\n");
1545 /* when an old userspace process fills a new kernel module */
1546 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu
*vcpu
,
1547 struct kvm_cpuid
*cpuid
,
1548 struct kvm_cpuid_entry __user
*entries
)
1551 struct kvm_cpuid_entry
*cpuid_entries
;
1554 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
1557 cpuid_entries
= vmalloc(sizeof(struct kvm_cpuid_entry
) * cpuid
->nent
);
1561 if (copy_from_user(cpuid_entries
, entries
,
1562 cpuid
->nent
* sizeof(struct kvm_cpuid_entry
)))
1564 for (i
= 0; i
< cpuid
->nent
; i
++) {
1565 vcpu
->arch
.cpuid_entries
[i
].function
= cpuid_entries
[i
].function
;
1566 vcpu
->arch
.cpuid_entries
[i
].eax
= cpuid_entries
[i
].eax
;
1567 vcpu
->arch
.cpuid_entries
[i
].ebx
= cpuid_entries
[i
].ebx
;
1568 vcpu
->arch
.cpuid_entries
[i
].ecx
= cpuid_entries
[i
].ecx
;
1569 vcpu
->arch
.cpuid_entries
[i
].edx
= cpuid_entries
[i
].edx
;
1570 vcpu
->arch
.cpuid_entries
[i
].index
= 0;
1571 vcpu
->arch
.cpuid_entries
[i
].flags
= 0;
1572 vcpu
->arch
.cpuid_entries
[i
].padding
[0] = 0;
1573 vcpu
->arch
.cpuid_entries
[i
].padding
[1] = 0;
1574 vcpu
->arch
.cpuid_entries
[i
].padding
[2] = 0;
1576 vcpu
->arch
.cpuid_nent
= cpuid
->nent
;
1577 cpuid_fix_nx_cap(vcpu
);
1579 kvm_apic_set_version(vcpu
);
1580 kvm_x86_ops
->cpuid_update(vcpu
);
1583 vfree(cpuid_entries
);
1588 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu
*vcpu
,
1589 struct kvm_cpuid2
*cpuid
,
1590 struct kvm_cpuid_entry2 __user
*entries
)
1595 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
1598 if (copy_from_user(&vcpu
->arch
.cpuid_entries
, entries
,
1599 cpuid
->nent
* sizeof(struct kvm_cpuid_entry2
)))
1601 vcpu
->arch
.cpuid_nent
= cpuid
->nent
;
1602 kvm_apic_set_version(vcpu
);
1603 kvm_x86_ops
->cpuid_update(vcpu
);
1610 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu
*vcpu
,
1611 struct kvm_cpuid2
*cpuid
,
1612 struct kvm_cpuid_entry2 __user
*entries
)
1617 if (cpuid
->nent
< vcpu
->arch
.cpuid_nent
)
1620 if (copy_to_user(entries
, &vcpu
->arch
.cpuid_entries
,
1621 vcpu
->arch
.cpuid_nent
* sizeof(struct kvm_cpuid_entry2
)))
1626 cpuid
->nent
= vcpu
->arch
.cpuid_nent
;
1630 static void do_cpuid_1_ent(struct kvm_cpuid_entry2
*entry
, u32 function
,
1633 entry
->function
= function
;
1634 entry
->index
= index
;
1635 cpuid_count(entry
->function
, entry
->index
,
1636 &entry
->eax
, &entry
->ebx
, &entry
->ecx
, &entry
->edx
);
1640 #define F(x) bit(X86_FEATURE_##x)
1642 static void do_cpuid_ent(struct kvm_cpuid_entry2
*entry
, u32 function
,
1643 u32 index
, int *nent
, int maxnent
)
1645 unsigned f_nx
= is_efer_nx() ? F(NX
) : 0;
1646 #ifdef CONFIG_X86_64
1647 unsigned f_gbpages
= (kvm_x86_ops
->get_lpage_level() == PT_PDPE_LEVEL
)
1649 unsigned f_lm
= F(LM
);
1651 unsigned f_gbpages
= 0;
1654 unsigned f_rdtscp
= kvm_x86_ops
->rdtscp_supported() ? F(RDTSCP
) : 0;
1657 const u32 kvm_supported_word0_x86_features
=
1658 F(FPU
) | F(VME
) | F(DE
) | F(PSE
) |
1659 F(TSC
) | F(MSR
) | F(PAE
) | F(MCE
) |
1660 F(CX8
) | F(APIC
) | 0 /* Reserved */ | F(SEP
) |
1661 F(MTRR
) | F(PGE
) | F(MCA
) | F(CMOV
) |
1662 F(PAT
) | F(PSE36
) | 0 /* PSN */ | F(CLFLSH
) |
1663 0 /* Reserved, DS, ACPI */ | F(MMX
) |
1664 F(FXSR
) | F(XMM
) | F(XMM2
) | F(SELFSNOOP
) |
1665 0 /* HTT, TM, Reserved, PBE */;
1666 /* cpuid 0x80000001.edx */
1667 const u32 kvm_supported_word1_x86_features
=
1668 F(FPU
) | F(VME
) | F(DE
) | F(PSE
) |
1669 F(TSC
) | F(MSR
) | F(PAE
) | F(MCE
) |
1670 F(CX8
) | F(APIC
) | 0 /* Reserved */ | F(SYSCALL
) |
1671 F(MTRR
) | F(PGE
) | F(MCA
) | F(CMOV
) |
1672 F(PAT
) | F(PSE36
) | 0 /* Reserved */ |
1673 f_nx
| 0 /* Reserved */ | F(MMXEXT
) | F(MMX
) |
1674 F(FXSR
) | F(FXSR_OPT
) | f_gbpages
| f_rdtscp
|
1675 0 /* Reserved */ | f_lm
| F(3DNOWEXT
) | F(3DNOW
);
1677 const u32 kvm_supported_word4_x86_features
=
1678 F(XMM3
) | 0 /* Reserved, DTES64, MONITOR */ |
1679 0 /* DS-CPL, VMX, SMX, EST */ |
1680 0 /* TM2 */ | F(SSSE3
) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1681 0 /* Reserved */ | F(CX16
) | 0 /* xTPR Update, PDCM */ |
1682 0 /* Reserved, DCA */ | F(XMM4_1
) |
1683 F(XMM4_2
) | F(X2APIC
) | F(MOVBE
) | F(POPCNT
) |
1684 0 /* Reserved, XSAVE, OSXSAVE */;
1685 /* cpuid 0x80000001.ecx */
1686 const u32 kvm_supported_word6_x86_features
=
1687 F(LAHF_LM
) | F(CMP_LEGACY
) | F(SVM
) | 0 /* ExtApicSpace */ |
1688 F(CR8_LEGACY
) | F(ABM
) | F(SSE4A
) | F(MISALIGNSSE
) |
1689 F(3DNOWPREFETCH
) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5
) |
1690 0 /* SKINIT */ | 0 /* WDT */;
1692 /* all calls to cpuid_count() should be made on the same cpu */
1694 do_cpuid_1_ent(entry
, function
, index
);
1699 entry
->eax
= min(entry
->eax
, (u32
)0xb);
1702 entry
->edx
&= kvm_supported_word0_x86_features
;
1703 entry
->ecx
&= kvm_supported_word4_x86_features
;
1704 /* we support x2apic emulation even if host does not support
1705 * it since we emulate x2apic in software */
1706 entry
->ecx
|= F(X2APIC
);
1708 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1709 * may return different values. This forces us to get_cpu() before
1710 * issuing the first command, and also to emulate this annoying behavior
1711 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1713 int t
, times
= entry
->eax
& 0xff;
1715 entry
->flags
|= KVM_CPUID_FLAG_STATEFUL_FUNC
;
1716 entry
->flags
|= KVM_CPUID_FLAG_STATE_READ_NEXT
;
1717 for (t
= 1; t
< times
&& *nent
< maxnent
; ++t
) {
1718 do_cpuid_1_ent(&entry
[t
], function
, 0);
1719 entry
[t
].flags
|= KVM_CPUID_FLAG_STATEFUL_FUNC
;
1724 /* function 4 and 0xb have additional index. */
1728 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1729 /* read more entries until cache_type is zero */
1730 for (i
= 1; *nent
< maxnent
; ++i
) {
1731 cache_type
= entry
[i
- 1].eax
& 0x1f;
1734 do_cpuid_1_ent(&entry
[i
], function
, i
);
1736 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1744 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1745 /* read more entries until level_type is zero */
1746 for (i
= 1; *nent
< maxnent
; ++i
) {
1747 level_type
= entry
[i
- 1].ecx
& 0xff00;
1750 do_cpuid_1_ent(&entry
[i
], function
, i
);
1752 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1758 entry
->eax
= min(entry
->eax
, 0x8000001a);
1761 entry
->edx
&= kvm_supported_word1_x86_features
;
1762 entry
->ecx
&= kvm_supported_word6_x86_features
;
1770 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2
*cpuid
,
1771 struct kvm_cpuid_entry2 __user
*entries
)
1773 struct kvm_cpuid_entry2
*cpuid_entries
;
1774 int limit
, nent
= 0, r
= -E2BIG
;
1777 if (cpuid
->nent
< 1)
1779 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
1780 cpuid
->nent
= KVM_MAX_CPUID_ENTRIES
;
1782 cpuid_entries
= vmalloc(sizeof(struct kvm_cpuid_entry2
) * cpuid
->nent
);
1786 do_cpuid_ent(&cpuid_entries
[0], 0, 0, &nent
, cpuid
->nent
);
1787 limit
= cpuid_entries
[0].eax
;
1788 for (func
= 1; func
<= limit
&& nent
< cpuid
->nent
; ++func
)
1789 do_cpuid_ent(&cpuid_entries
[nent
], func
, 0,
1790 &nent
, cpuid
->nent
);
1792 if (nent
>= cpuid
->nent
)
1795 do_cpuid_ent(&cpuid_entries
[nent
], 0x80000000, 0, &nent
, cpuid
->nent
);
1796 limit
= cpuid_entries
[nent
- 1].eax
;
1797 for (func
= 0x80000001; func
<= limit
&& nent
< cpuid
->nent
; ++func
)
1798 do_cpuid_ent(&cpuid_entries
[nent
], func
, 0,
1799 &nent
, cpuid
->nent
);
1801 if (nent
>= cpuid
->nent
)
1805 if (copy_to_user(entries
, cpuid_entries
,
1806 nent
* sizeof(struct kvm_cpuid_entry2
)))
1812 vfree(cpuid_entries
);
1817 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
1818 struct kvm_lapic_state
*s
)
1821 memcpy(s
->regs
, vcpu
->arch
.apic
->regs
, sizeof *s
);
1827 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
1828 struct kvm_lapic_state
*s
)
1831 memcpy(vcpu
->arch
.apic
->regs
, s
->regs
, sizeof *s
);
1832 kvm_apic_post_state_restore(vcpu
);
1833 update_cr8_intercept(vcpu
);
1839 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
1840 struct kvm_interrupt
*irq
)
1842 if (irq
->irq
< 0 || irq
->irq
>= 256)
1844 if (irqchip_in_kernel(vcpu
->kvm
))
1848 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
1855 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
1858 kvm_inject_nmi(vcpu
);
1864 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
1865 struct kvm_tpr_access_ctl
*tac
)
1869 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
1873 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
1877 unsigned bank_num
= mcg_cap
& 0xff, bank
;
1880 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
1882 if (mcg_cap
& ~(KVM_MCE_CAP_SUPPORTED
| 0xff | 0xff0000))
1885 vcpu
->arch
.mcg_cap
= mcg_cap
;
1886 /* Init IA32_MCG_CTL to all 1s */
1887 if (mcg_cap
& MCG_CTL_P
)
1888 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
1889 /* Init IA32_MCi_CTL to all 1s */
1890 for (bank
= 0; bank
< bank_num
; bank
++)
1891 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
1896 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
1897 struct kvm_x86_mce
*mce
)
1899 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1900 unsigned bank_num
= mcg_cap
& 0xff;
1901 u64
*banks
= vcpu
->arch
.mce_banks
;
1903 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
1906 * if IA32_MCG_CTL is not all 1s, the uncorrected error
1907 * reporting is disabled
1909 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
1910 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
1912 banks
+= 4 * mce
->bank
;
1914 * if IA32_MCi_CTL is not all 1s, the uncorrected error
1915 * reporting is disabled for the bank
1917 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
1919 if (mce
->status
& MCI_STATUS_UC
) {
1920 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
1921 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
1922 printk(KERN_DEBUG
"kvm: set_mce: "
1923 "injects mce exception while "
1924 "previous one is in progress!\n");
1925 set_bit(KVM_REQ_TRIPLE_FAULT
, &vcpu
->requests
);
1928 if (banks
[1] & MCI_STATUS_VAL
)
1929 mce
->status
|= MCI_STATUS_OVER
;
1930 banks
[2] = mce
->addr
;
1931 banks
[3] = mce
->misc
;
1932 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
1933 banks
[1] = mce
->status
;
1934 kvm_queue_exception(vcpu
, MC_VECTOR
);
1935 } else if (!(banks
[1] & MCI_STATUS_VAL
)
1936 || !(banks
[1] & MCI_STATUS_UC
)) {
1937 if (banks
[1] & MCI_STATUS_VAL
)
1938 mce
->status
|= MCI_STATUS_OVER
;
1939 banks
[2] = mce
->addr
;
1940 banks
[3] = mce
->misc
;
1941 banks
[1] = mce
->status
;
1943 banks
[1] |= MCI_STATUS_OVER
;
1947 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
1948 struct kvm_vcpu_events
*events
)
1952 events
->exception
.injected
= vcpu
->arch
.exception
.pending
;
1953 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
1954 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
1955 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
1957 events
->interrupt
.injected
= vcpu
->arch
.interrupt
.pending
;
1958 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
1959 events
->interrupt
.soft
= vcpu
->arch
.interrupt
.soft
;
1961 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
1962 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
;
1963 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
1965 events
->sipi_vector
= vcpu
->arch
.sipi_vector
;
1967 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
1968 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
);
1973 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
1974 struct kvm_vcpu_events
*events
)
1976 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
1977 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
))
1982 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
1983 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
1984 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
1985 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
1987 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
1988 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
1989 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
1990 if (vcpu
->arch
.interrupt
.pending
&& irqchip_in_kernel(vcpu
->kvm
))
1991 kvm_pic_clear_isr_ack(vcpu
->kvm
);
1993 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
1994 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
1995 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
1996 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
1998 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
)
1999 vcpu
->arch
.sipi_vector
= events
->sipi_vector
;
2006 long kvm_arch_vcpu_ioctl(struct file
*filp
,
2007 unsigned int ioctl
, unsigned long arg
)
2009 struct kvm_vcpu
*vcpu
= filp
->private_data
;
2010 void __user
*argp
= (void __user
*)arg
;
2012 struct kvm_lapic_state
*lapic
= NULL
;
2015 case KVM_GET_LAPIC
: {
2017 if (!vcpu
->arch
.apic
)
2019 lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
2024 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, lapic
);
2028 if (copy_to_user(argp
, lapic
, sizeof(struct kvm_lapic_state
)))
2033 case KVM_SET_LAPIC
: {
2035 if (!vcpu
->arch
.apic
)
2037 lapic
= kmalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
2042 if (copy_from_user(lapic
, argp
, sizeof(struct kvm_lapic_state
)))
2044 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, lapic
);
2050 case KVM_INTERRUPT
: {
2051 struct kvm_interrupt irq
;
2054 if (copy_from_user(&irq
, argp
, sizeof irq
))
2056 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
2063 r
= kvm_vcpu_ioctl_nmi(vcpu
);
2069 case KVM_SET_CPUID
: {
2070 struct kvm_cpuid __user
*cpuid_arg
= argp
;
2071 struct kvm_cpuid cpuid
;
2074 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2076 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
2081 case KVM_SET_CPUID2
: {
2082 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2083 struct kvm_cpuid2 cpuid
;
2086 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2088 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
2089 cpuid_arg
->entries
);
2094 case KVM_GET_CPUID2
: {
2095 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2096 struct kvm_cpuid2 cpuid
;
2099 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2101 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
2102 cpuid_arg
->entries
);
2106 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2112 r
= msr_io(vcpu
, argp
, kvm_get_msr
, 1);
2115 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
2117 case KVM_TPR_ACCESS_REPORTING
: {
2118 struct kvm_tpr_access_ctl tac
;
2121 if (copy_from_user(&tac
, argp
, sizeof tac
))
2123 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
2127 if (copy_to_user(argp
, &tac
, sizeof tac
))
2132 case KVM_SET_VAPIC_ADDR
: {
2133 struct kvm_vapic_addr va
;
2136 if (!irqchip_in_kernel(vcpu
->kvm
))
2139 if (copy_from_user(&va
, argp
, sizeof va
))
2142 kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
2145 case KVM_X86_SETUP_MCE
: {
2149 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
2151 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
2154 case KVM_X86_SET_MCE
: {
2155 struct kvm_x86_mce mce
;
2158 if (copy_from_user(&mce
, argp
, sizeof mce
))
2160 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
2163 case KVM_GET_VCPU_EVENTS
: {
2164 struct kvm_vcpu_events events
;
2166 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
2169 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
2174 case KVM_SET_VCPU_EVENTS
: {
2175 struct kvm_vcpu_events events
;
2178 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
2181 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
2192 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
2196 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
2198 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
2202 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
2205 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
2209 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
2210 u32 kvm_nr_mmu_pages
)
2212 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
2215 mutex_lock(&kvm
->slots_lock
);
2216 spin_lock(&kvm
->mmu_lock
);
2218 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
2219 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
2221 spin_unlock(&kvm
->mmu_lock
);
2222 mutex_unlock(&kvm
->slots_lock
);
2226 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
2228 return kvm
->arch
.n_alloc_mmu_pages
;
2231 gfn_t
unalias_gfn_instantiation(struct kvm
*kvm
, gfn_t gfn
)
2234 struct kvm_mem_alias
*alias
;
2235 struct kvm_mem_aliases
*aliases
;
2237 aliases
= rcu_dereference(kvm
->arch
.aliases
);
2239 for (i
= 0; i
< aliases
->naliases
; ++i
) {
2240 alias
= &aliases
->aliases
[i
];
2241 if (alias
->flags
& KVM_ALIAS_INVALID
)
2243 if (gfn
>= alias
->base_gfn
2244 && gfn
< alias
->base_gfn
+ alias
->npages
)
2245 return alias
->target_gfn
+ gfn
- alias
->base_gfn
;
2250 gfn_t
unalias_gfn(struct kvm
*kvm
, gfn_t gfn
)
2253 struct kvm_mem_alias
*alias
;
2254 struct kvm_mem_aliases
*aliases
;
2256 aliases
= rcu_dereference(kvm
->arch
.aliases
);
2258 for (i
= 0; i
< aliases
->naliases
; ++i
) {
2259 alias
= &aliases
->aliases
[i
];
2260 if (gfn
>= alias
->base_gfn
2261 && gfn
< alias
->base_gfn
+ alias
->npages
)
2262 return alias
->target_gfn
+ gfn
- alias
->base_gfn
;
2268 * Set a new alias region. Aliases map a portion of physical memory into
2269 * another portion. This is useful for memory windows, for example the PC
2272 static int kvm_vm_ioctl_set_memory_alias(struct kvm
*kvm
,
2273 struct kvm_memory_alias
*alias
)
2276 struct kvm_mem_alias
*p
;
2277 struct kvm_mem_aliases
*aliases
, *old_aliases
;
2280 /* General sanity checks */
2281 if (alias
->memory_size
& (PAGE_SIZE
- 1))
2283 if (alias
->guest_phys_addr
& (PAGE_SIZE
- 1))
2285 if (alias
->slot
>= KVM_ALIAS_SLOTS
)
2287 if (alias
->guest_phys_addr
+ alias
->memory_size
2288 < alias
->guest_phys_addr
)
2290 if (alias
->target_phys_addr
+ alias
->memory_size
2291 < alias
->target_phys_addr
)
2295 aliases
= kzalloc(sizeof(struct kvm_mem_aliases
), GFP_KERNEL
);
2299 mutex_lock(&kvm
->slots_lock
);
2301 /* invalidate any gfn reference in case of deletion/shrinking */
2302 memcpy(aliases
, kvm
->arch
.aliases
, sizeof(struct kvm_mem_aliases
));
2303 aliases
->aliases
[alias
->slot
].flags
|= KVM_ALIAS_INVALID
;
2304 old_aliases
= kvm
->arch
.aliases
;
2305 rcu_assign_pointer(kvm
->arch
.aliases
, aliases
);
2306 synchronize_srcu_expedited(&kvm
->srcu
);
2307 kvm_mmu_zap_all(kvm
);
2311 aliases
= kzalloc(sizeof(struct kvm_mem_aliases
), GFP_KERNEL
);
2315 memcpy(aliases
, kvm
->arch
.aliases
, sizeof(struct kvm_mem_aliases
));
2317 p
= &aliases
->aliases
[alias
->slot
];
2318 p
->base_gfn
= alias
->guest_phys_addr
>> PAGE_SHIFT
;
2319 p
->npages
= alias
->memory_size
>> PAGE_SHIFT
;
2320 p
->target_gfn
= alias
->target_phys_addr
>> PAGE_SHIFT
;
2321 p
->flags
&= ~(KVM_ALIAS_INVALID
);
2323 for (n
= KVM_ALIAS_SLOTS
; n
> 0; --n
)
2324 if (aliases
->aliases
[n
- 1].npages
)
2326 aliases
->naliases
= n
;
2328 old_aliases
= kvm
->arch
.aliases
;
2329 rcu_assign_pointer(kvm
->arch
.aliases
, aliases
);
2330 synchronize_srcu_expedited(&kvm
->srcu
);
2335 mutex_unlock(&kvm
->slots_lock
);
2340 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
2345 switch (chip
->chip_id
) {
2346 case KVM_IRQCHIP_PIC_MASTER
:
2347 memcpy(&chip
->chip
.pic
,
2348 &pic_irqchip(kvm
)->pics
[0],
2349 sizeof(struct kvm_pic_state
));
2351 case KVM_IRQCHIP_PIC_SLAVE
:
2352 memcpy(&chip
->chip
.pic
,
2353 &pic_irqchip(kvm
)->pics
[1],
2354 sizeof(struct kvm_pic_state
));
2356 case KVM_IRQCHIP_IOAPIC
:
2357 r
= kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
2366 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
2371 switch (chip
->chip_id
) {
2372 case KVM_IRQCHIP_PIC_MASTER
:
2373 spin_lock(&pic_irqchip(kvm
)->lock
);
2374 memcpy(&pic_irqchip(kvm
)->pics
[0],
2376 sizeof(struct kvm_pic_state
));
2377 spin_unlock(&pic_irqchip(kvm
)->lock
);
2379 case KVM_IRQCHIP_PIC_SLAVE
:
2380 spin_lock(&pic_irqchip(kvm
)->lock
);
2381 memcpy(&pic_irqchip(kvm
)->pics
[1],
2383 sizeof(struct kvm_pic_state
));
2384 spin_unlock(&pic_irqchip(kvm
)->lock
);
2386 case KVM_IRQCHIP_IOAPIC
:
2387 r
= kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
2393 kvm_pic_update_irq(pic_irqchip(kvm
));
2397 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
2401 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2402 memcpy(ps
, &kvm
->arch
.vpit
->pit_state
, sizeof(struct kvm_pit_state
));
2403 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2407 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
2411 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2412 memcpy(&kvm
->arch
.vpit
->pit_state
, ps
, sizeof(struct kvm_pit_state
));
2413 kvm_pit_load_count(kvm
, 0, ps
->channels
[0].count
, 0);
2414 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2418 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
2422 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2423 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
2424 sizeof(ps
->channels
));
2425 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
2426 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2430 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
2432 int r
= 0, start
= 0;
2433 u32 prev_legacy
, cur_legacy
;
2434 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2435 prev_legacy
= kvm
->arch
.vpit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
2436 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
2437 if (!prev_legacy
&& cur_legacy
)
2439 memcpy(&kvm
->arch
.vpit
->pit_state
.channels
, &ps
->channels
,
2440 sizeof(kvm
->arch
.vpit
->pit_state
.channels
));
2441 kvm
->arch
.vpit
->pit_state
.flags
= ps
->flags
;
2442 kvm_pit_load_count(kvm
, 0, kvm
->arch
.vpit
->pit_state
.channels
[0].count
, start
);
2443 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2447 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
2448 struct kvm_reinject_control
*control
)
2450 if (!kvm
->arch
.vpit
)
2452 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2453 kvm
->arch
.vpit
->pit_state
.pit_timer
.reinject
= control
->pit_reinject
;
2454 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2459 * Get (and clear) the dirty memory log for a memory slot.
2461 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
,
2462 struct kvm_dirty_log
*log
)
2465 struct kvm_memory_slot
*memslot
;
2466 unsigned long is_dirty
= 0;
2467 unsigned long *dirty_bitmap
= NULL
;
2469 mutex_lock(&kvm
->slots_lock
);
2472 if (log
->slot
>= KVM_MEMORY_SLOTS
)
2475 memslot
= &kvm
->memslots
->memslots
[log
->slot
];
2477 if (!memslot
->dirty_bitmap
)
2480 n
= ALIGN(memslot
->npages
, BITS_PER_LONG
) / 8;
2483 dirty_bitmap
= vmalloc(n
);
2486 memset(dirty_bitmap
, 0, n
);
2488 for (i
= 0; !is_dirty
&& i
< n
/sizeof(long); i
++)
2489 is_dirty
= memslot
->dirty_bitmap
[i
];
2491 /* If nothing is dirty, don't bother messing with page tables. */
2493 struct kvm_memslots
*slots
, *old_slots
;
2495 spin_lock(&kvm
->mmu_lock
);
2496 kvm_mmu_slot_remove_write_access(kvm
, log
->slot
);
2497 spin_unlock(&kvm
->mmu_lock
);
2499 slots
= kzalloc(sizeof(struct kvm_memslots
), GFP_KERNEL
);
2503 memcpy(slots
, kvm
->memslots
, sizeof(struct kvm_memslots
));
2504 slots
->memslots
[log
->slot
].dirty_bitmap
= dirty_bitmap
;
2506 old_slots
= kvm
->memslots
;
2507 rcu_assign_pointer(kvm
->memslots
, slots
);
2508 synchronize_srcu_expedited(&kvm
->srcu
);
2509 dirty_bitmap
= old_slots
->memslots
[log
->slot
].dirty_bitmap
;
2514 if (copy_to_user(log
->dirty_bitmap
, dirty_bitmap
, n
))
2517 vfree(dirty_bitmap
);
2519 mutex_unlock(&kvm
->slots_lock
);
2523 long kvm_arch_vm_ioctl(struct file
*filp
,
2524 unsigned int ioctl
, unsigned long arg
)
2526 struct kvm
*kvm
= filp
->private_data
;
2527 void __user
*argp
= (void __user
*)arg
;
2530 * This union makes it completely explicit to gcc-3.x
2531 * that these two variables' stack usage should be
2532 * combined, not added together.
2535 struct kvm_pit_state ps
;
2536 struct kvm_pit_state2 ps2
;
2537 struct kvm_memory_alias alias
;
2538 struct kvm_pit_config pit_config
;
2542 case KVM_SET_TSS_ADDR
:
2543 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
2547 case KVM_SET_IDENTITY_MAP_ADDR
: {
2551 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
2553 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
2558 case KVM_SET_MEMORY_REGION
: {
2559 struct kvm_memory_region kvm_mem
;
2560 struct kvm_userspace_memory_region kvm_userspace_mem
;
2563 if (copy_from_user(&kvm_mem
, argp
, sizeof kvm_mem
))
2565 kvm_userspace_mem
.slot
= kvm_mem
.slot
;
2566 kvm_userspace_mem
.flags
= kvm_mem
.flags
;
2567 kvm_userspace_mem
.guest_phys_addr
= kvm_mem
.guest_phys_addr
;
2568 kvm_userspace_mem
.memory_size
= kvm_mem
.memory_size
;
2569 r
= kvm_vm_ioctl_set_memory_region(kvm
, &kvm_userspace_mem
, 0);
2574 case KVM_SET_NR_MMU_PAGES
:
2575 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
2579 case KVM_GET_NR_MMU_PAGES
:
2580 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
2582 case KVM_SET_MEMORY_ALIAS
:
2584 if (copy_from_user(&u
.alias
, argp
, sizeof(struct kvm_memory_alias
)))
2586 r
= kvm_vm_ioctl_set_memory_alias(kvm
, &u
.alias
);
2590 case KVM_CREATE_IRQCHIP
: {
2591 struct kvm_pic
*vpic
;
2593 mutex_lock(&kvm
->lock
);
2596 goto create_irqchip_unlock
;
2598 vpic
= kvm_create_pic(kvm
);
2600 r
= kvm_ioapic_init(kvm
);
2603 goto create_irqchip_unlock
;
2606 goto create_irqchip_unlock
;
2608 kvm
->arch
.vpic
= vpic
;
2610 r
= kvm_setup_default_irq_routing(kvm
);
2612 mutex_lock(&kvm
->irq_lock
);
2613 kfree(kvm
->arch
.vpic
);
2614 kfree(kvm
->arch
.vioapic
);
2615 kvm
->arch
.vpic
= NULL
;
2616 kvm
->arch
.vioapic
= NULL
;
2617 mutex_unlock(&kvm
->irq_lock
);
2619 create_irqchip_unlock
:
2620 mutex_unlock(&kvm
->lock
);
2623 case KVM_CREATE_PIT
:
2624 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
2626 case KVM_CREATE_PIT2
:
2628 if (copy_from_user(&u
.pit_config
, argp
,
2629 sizeof(struct kvm_pit_config
)))
2632 mutex_lock(&kvm
->slots_lock
);
2635 goto create_pit_unlock
;
2637 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
2641 mutex_unlock(&kvm
->slots_lock
);
2643 case KVM_IRQ_LINE_STATUS
:
2644 case KVM_IRQ_LINE
: {
2645 struct kvm_irq_level irq_event
;
2648 if (copy_from_user(&irq_event
, argp
, sizeof irq_event
))
2650 if (irqchip_in_kernel(kvm
)) {
2652 status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
2653 irq_event
.irq
, irq_event
.level
);
2654 if (ioctl
== KVM_IRQ_LINE_STATUS
) {
2655 irq_event
.status
= status
;
2656 if (copy_to_user(argp
, &irq_event
,
2664 case KVM_GET_IRQCHIP
: {
2665 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2666 struct kvm_irqchip
*chip
= kmalloc(sizeof(*chip
), GFP_KERNEL
);
2672 if (copy_from_user(chip
, argp
, sizeof *chip
))
2673 goto get_irqchip_out
;
2675 if (!irqchip_in_kernel(kvm
))
2676 goto get_irqchip_out
;
2677 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
2679 goto get_irqchip_out
;
2681 if (copy_to_user(argp
, chip
, sizeof *chip
))
2682 goto get_irqchip_out
;
2690 case KVM_SET_IRQCHIP
: {
2691 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2692 struct kvm_irqchip
*chip
= kmalloc(sizeof(*chip
), GFP_KERNEL
);
2698 if (copy_from_user(chip
, argp
, sizeof *chip
))
2699 goto set_irqchip_out
;
2701 if (!irqchip_in_kernel(kvm
))
2702 goto set_irqchip_out
;
2703 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
2705 goto set_irqchip_out
;
2715 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
2718 if (!kvm
->arch
.vpit
)
2720 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
2724 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
2731 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
2734 if (!kvm
->arch
.vpit
)
2736 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
2742 case KVM_GET_PIT2
: {
2744 if (!kvm
->arch
.vpit
)
2746 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
2750 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
2755 case KVM_SET_PIT2
: {
2757 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
2760 if (!kvm
->arch
.vpit
)
2762 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
2768 case KVM_REINJECT_CONTROL
: {
2769 struct kvm_reinject_control control
;
2771 if (copy_from_user(&control
, argp
, sizeof(control
)))
2773 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
2779 case KVM_XEN_HVM_CONFIG
: {
2781 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
2782 sizeof(struct kvm_xen_hvm_config
)))
2785 if (kvm
->arch
.xen_hvm_config
.flags
)
2790 case KVM_SET_CLOCK
: {
2791 struct timespec now
;
2792 struct kvm_clock_data user_ns
;
2797 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
2806 now_ns
= timespec_to_ns(&now
);
2807 delta
= user_ns
.clock
- now_ns
;
2808 kvm
->arch
.kvmclock_offset
= delta
;
2811 case KVM_GET_CLOCK
: {
2812 struct timespec now
;
2813 struct kvm_clock_data user_ns
;
2817 now_ns
= timespec_to_ns(&now
);
2818 user_ns
.clock
= kvm
->arch
.kvmclock_offset
+ now_ns
;
2822 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
2835 static void kvm_init_msr_list(void)
2840 /* skip the first msrs in the list. KVM-specific */
2841 for (i
= j
= KVM_SAVE_MSRS_BEGIN
; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
2842 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
2845 msrs_to_save
[j
] = msrs_to_save
[i
];
2848 num_msrs_to_save
= j
;
2851 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
2854 if (vcpu
->arch
.apic
&&
2855 !kvm_iodevice_write(&vcpu
->arch
.apic
->dev
, addr
, len
, v
))
2858 return kvm_io_bus_write(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, len
, v
);
2861 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
2863 if (vcpu
->arch
.apic
&&
2864 !kvm_iodevice_read(&vcpu
->arch
.apic
->dev
, addr
, len
, v
))
2867 return kvm_io_bus_read(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, len
, v
);
2870 static int kvm_read_guest_virt(gva_t addr
, void *val
, unsigned int bytes
,
2871 struct kvm_vcpu
*vcpu
)
2874 int r
= X86EMUL_CONTINUE
;
2877 gpa_t gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2878 unsigned offset
= addr
& (PAGE_SIZE
-1);
2879 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
2882 if (gpa
== UNMAPPED_GVA
) {
2883 r
= X86EMUL_PROPAGATE_FAULT
;
2886 ret
= kvm_read_guest(vcpu
->kvm
, gpa
, data
, toread
);
2888 r
= X86EMUL_UNHANDLEABLE
;
2900 static int kvm_write_guest_virt(gva_t addr
, void *val
, unsigned int bytes
,
2901 struct kvm_vcpu
*vcpu
)
2904 int r
= X86EMUL_CONTINUE
;
2907 gpa_t gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2908 unsigned offset
= addr
& (PAGE_SIZE
-1);
2909 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
2912 if (gpa
== UNMAPPED_GVA
) {
2913 r
= X86EMUL_PROPAGATE_FAULT
;
2916 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, data
, towrite
);
2918 r
= X86EMUL_UNHANDLEABLE
;
2931 static int emulator_read_emulated(unsigned long addr
,
2934 struct kvm_vcpu
*vcpu
)
2938 if (vcpu
->mmio_read_completed
) {
2939 memcpy(val
, vcpu
->mmio_data
, bytes
);
2940 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
2941 vcpu
->mmio_phys_addr
, *(u64
*)val
);
2942 vcpu
->mmio_read_completed
= 0;
2943 return X86EMUL_CONTINUE
;
2946 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2948 /* For APIC access vmexit */
2949 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
2952 if (kvm_read_guest_virt(addr
, val
, bytes
, vcpu
)
2953 == X86EMUL_CONTINUE
)
2954 return X86EMUL_CONTINUE
;
2955 if (gpa
== UNMAPPED_GVA
)
2956 return X86EMUL_PROPAGATE_FAULT
;
2960 * Is this MMIO handled locally?
2962 if (!vcpu_mmio_read(vcpu
, gpa
, bytes
, val
)) {
2963 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
, gpa
, *(u64
*)val
);
2964 return X86EMUL_CONTINUE
;
2967 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
2969 vcpu
->mmio_needed
= 1;
2970 vcpu
->mmio_phys_addr
= gpa
;
2971 vcpu
->mmio_size
= bytes
;
2972 vcpu
->mmio_is_write
= 0;
2974 return X86EMUL_UNHANDLEABLE
;
2977 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
2978 const void *val
, int bytes
)
2982 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, val
, bytes
);
2985 kvm_mmu_pte_write(vcpu
, gpa
, val
, bytes
, 1);
2989 static int emulator_write_emulated_onepage(unsigned long addr
,
2992 struct kvm_vcpu
*vcpu
)
2996 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2998 if (gpa
== UNMAPPED_GVA
) {
2999 kvm_inject_page_fault(vcpu
, addr
, 2);
3000 return X86EMUL_PROPAGATE_FAULT
;
3003 /* For APIC access vmexit */
3004 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
3007 if (emulator_write_phys(vcpu
, gpa
, val
, bytes
))
3008 return X86EMUL_CONTINUE
;
3011 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
3013 * Is this MMIO handled locally?
3015 if (!vcpu_mmio_write(vcpu
, gpa
, bytes
, val
))
3016 return X86EMUL_CONTINUE
;
3018 vcpu
->mmio_needed
= 1;
3019 vcpu
->mmio_phys_addr
= gpa
;
3020 vcpu
->mmio_size
= bytes
;
3021 vcpu
->mmio_is_write
= 1;
3022 memcpy(vcpu
->mmio_data
, val
, bytes
);
3024 return X86EMUL_CONTINUE
;
3027 int emulator_write_emulated(unsigned long addr
,
3030 struct kvm_vcpu
*vcpu
)
3032 /* Crossing a page boundary? */
3033 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
3036 now
= -addr
& ~PAGE_MASK
;
3037 rc
= emulator_write_emulated_onepage(addr
, val
, now
, vcpu
);
3038 if (rc
!= X86EMUL_CONTINUE
)
3044 return emulator_write_emulated_onepage(addr
, val
, bytes
, vcpu
);
3046 EXPORT_SYMBOL_GPL(emulator_write_emulated
);
3048 static int emulator_cmpxchg_emulated(unsigned long addr
,
3052 struct kvm_vcpu
*vcpu
)
3054 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
3055 #ifndef CONFIG_X86_64
3056 /* guests cmpxchg8b have to be emulated atomically */
3063 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
3065 if (gpa
== UNMAPPED_GVA
||
3066 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
3069 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
3074 page
= gfn_to_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
3076 kaddr
= kmap_atomic(page
, KM_USER0
);
3077 set_64bit((u64
*)(kaddr
+ offset_in_page(gpa
)), val
);
3078 kunmap_atomic(kaddr
, KM_USER0
);
3079 kvm_release_page_dirty(page
);
3084 return emulator_write_emulated(addr
, new, bytes
, vcpu
);
3087 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
3089 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
3092 int emulate_invlpg(struct kvm_vcpu
*vcpu
, gva_t address
)
3094 kvm_mmu_invlpg(vcpu
, address
);
3095 return X86EMUL_CONTINUE
;
3098 int emulate_clts(struct kvm_vcpu
*vcpu
)
3100 kvm_x86_ops
->set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~X86_CR0_TS
));
3101 return X86EMUL_CONTINUE
;
3104 int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long *dest
)
3106 struct kvm_vcpu
*vcpu
= ctxt
->vcpu
;
3110 *dest
= kvm_x86_ops
->get_dr(vcpu
, dr
);
3111 return X86EMUL_CONTINUE
;
3113 pr_unimpl(vcpu
, "%s: unexpected dr %u\n", __func__
, dr
);
3114 return X86EMUL_UNHANDLEABLE
;
3118 int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long value
)
3120 unsigned long mask
= (ctxt
->mode
== X86EMUL_MODE_PROT64
) ? ~0ULL : ~0U;
3123 kvm_x86_ops
->set_dr(ctxt
->vcpu
, dr
, value
& mask
, &exception
);
3125 /* FIXME: better handling */
3126 return X86EMUL_UNHANDLEABLE
;
3128 return X86EMUL_CONTINUE
;
3131 void kvm_report_emulation_failure(struct kvm_vcpu
*vcpu
, const char *context
)
3134 unsigned long rip
= kvm_rip_read(vcpu
);
3135 unsigned long rip_linear
;
3137 if (!printk_ratelimit())
3140 rip_linear
= rip
+ get_segment_base(vcpu
, VCPU_SREG_CS
);
3142 kvm_read_guest_virt(rip_linear
, (void *)opcodes
, 4, vcpu
);
3144 printk(KERN_ERR
"emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
3145 context
, rip
, opcodes
[0], opcodes
[1], opcodes
[2], opcodes
[3]);
3147 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure
);
3149 static struct x86_emulate_ops emulate_ops
= {
3150 .read_std
= kvm_read_guest_virt
,
3151 .read_emulated
= emulator_read_emulated
,
3152 .write_emulated
= emulator_write_emulated
,
3153 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
3156 static void cache_all_regs(struct kvm_vcpu
*vcpu
)
3158 kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3159 kvm_register_read(vcpu
, VCPU_REGS_RSP
);
3160 kvm_register_read(vcpu
, VCPU_REGS_RIP
);
3161 vcpu
->arch
.regs_dirty
= ~0;
3164 int emulate_instruction(struct kvm_vcpu
*vcpu
,
3170 struct decode_cache
*c
;
3171 struct kvm_run
*run
= vcpu
->run
;
3173 kvm_clear_exception_queue(vcpu
);
3174 vcpu
->arch
.mmio_fault_cr2
= cr2
;
3176 * TODO: fix emulate.c to use guest_read/write_register
3177 * instead of direct ->regs accesses, can save hundred cycles
3178 * on Intel for instructions that don't read/change RSP, for
3181 cache_all_regs(vcpu
);
3183 vcpu
->mmio_is_write
= 0;
3184 vcpu
->arch
.pio
.string
= 0;
3186 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
3188 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
3190 vcpu
->arch
.emulate_ctxt
.vcpu
= vcpu
;
3191 vcpu
->arch
.emulate_ctxt
.eflags
= kvm_get_rflags(vcpu
);
3192 vcpu
->arch
.emulate_ctxt
.mode
=
3193 (vcpu
->arch
.emulate_ctxt
.eflags
& X86_EFLAGS_VM
)
3194 ? X86EMUL_MODE_REAL
: cs_l
3195 ? X86EMUL_MODE_PROT64
: cs_db
3196 ? X86EMUL_MODE_PROT32
: X86EMUL_MODE_PROT16
;
3198 r
= x86_decode_insn(&vcpu
->arch
.emulate_ctxt
, &emulate_ops
);
3200 /* Only allow emulation of specific instructions on #UD
3201 * (namely VMMCALL, sysenter, sysexit, syscall)*/
3202 c
= &vcpu
->arch
.emulate_ctxt
.decode
;
3203 if (emulation_type
& EMULTYPE_TRAP_UD
) {
3205 return EMULATE_FAIL
;
3207 case 0x01: /* VMMCALL */
3208 if (c
->modrm_mod
!= 3 || c
->modrm_rm
!= 1)
3209 return EMULATE_FAIL
;
3211 case 0x34: /* sysenter */
3212 case 0x35: /* sysexit */
3213 if (c
->modrm_mod
!= 0 || c
->modrm_rm
!= 0)
3214 return EMULATE_FAIL
;
3216 case 0x05: /* syscall */
3217 if (c
->modrm_mod
!= 0 || c
->modrm_rm
!= 0)
3218 return EMULATE_FAIL
;
3221 return EMULATE_FAIL
;
3224 if (!(c
->modrm_reg
== 0 || c
->modrm_reg
== 3))
3225 return EMULATE_FAIL
;
3228 ++vcpu
->stat
.insn_emulation
;
3230 ++vcpu
->stat
.insn_emulation_fail
;
3231 if (kvm_mmu_unprotect_page_virt(vcpu
, cr2
))
3232 return EMULATE_DONE
;
3233 return EMULATE_FAIL
;
3237 if (emulation_type
& EMULTYPE_SKIP
) {
3238 kvm_rip_write(vcpu
, vcpu
->arch
.emulate_ctxt
.decode
.eip
);
3239 return EMULATE_DONE
;
3242 r
= x86_emulate_insn(&vcpu
->arch
.emulate_ctxt
, &emulate_ops
);
3243 shadow_mask
= vcpu
->arch
.emulate_ctxt
.interruptibility
;
3246 kvm_x86_ops
->set_interrupt_shadow(vcpu
, shadow_mask
);
3248 if (vcpu
->arch
.pio
.string
)
3249 return EMULATE_DO_MMIO
;
3251 if ((r
|| vcpu
->mmio_is_write
) && run
) {
3252 run
->exit_reason
= KVM_EXIT_MMIO
;
3253 run
->mmio
.phys_addr
= vcpu
->mmio_phys_addr
;
3254 memcpy(run
->mmio
.data
, vcpu
->mmio_data
, 8);
3255 run
->mmio
.len
= vcpu
->mmio_size
;
3256 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
3260 if (kvm_mmu_unprotect_page_virt(vcpu
, cr2
))
3261 return EMULATE_DONE
;
3262 if (!vcpu
->mmio_needed
) {
3263 kvm_report_emulation_failure(vcpu
, "mmio");
3264 return EMULATE_FAIL
;
3266 return EMULATE_DO_MMIO
;
3269 kvm_set_rflags(vcpu
, vcpu
->arch
.emulate_ctxt
.eflags
);
3271 if (vcpu
->mmio_is_write
) {
3272 vcpu
->mmio_needed
= 0;
3273 return EMULATE_DO_MMIO
;
3276 return EMULATE_DONE
;
3278 EXPORT_SYMBOL_GPL(emulate_instruction
);
3280 static int pio_copy_data(struct kvm_vcpu
*vcpu
)
3282 void *p
= vcpu
->arch
.pio_data
;
3283 gva_t q
= vcpu
->arch
.pio
.guest_gva
;
3287 bytes
= vcpu
->arch
.pio
.size
* vcpu
->arch
.pio
.cur_count
;
3288 if (vcpu
->arch
.pio
.in
)
3289 ret
= kvm_write_guest_virt(q
, p
, bytes
, vcpu
);
3291 ret
= kvm_read_guest_virt(q
, p
, bytes
, vcpu
);
3295 int complete_pio(struct kvm_vcpu
*vcpu
)
3297 struct kvm_pio_request
*io
= &vcpu
->arch
.pio
;
3304 val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3305 memcpy(&val
, vcpu
->arch
.pio_data
, io
->size
);
3306 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
3310 r
= pio_copy_data(vcpu
);
3317 delta
*= io
->cur_count
;
3319 * The size of the register should really depend on
3320 * current address size.
3322 val
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
3324 kvm_register_write(vcpu
, VCPU_REGS_RCX
, val
);
3330 val
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
3332 kvm_register_write(vcpu
, VCPU_REGS_RDI
, val
);
3334 val
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
3336 kvm_register_write(vcpu
, VCPU_REGS_RSI
, val
);
3340 io
->count
-= io
->cur_count
;
3346 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
3348 /* TODO: String I/O for in kernel device */
3351 if (vcpu
->arch
.pio
.in
)
3352 r
= kvm_io_bus_read(vcpu
->kvm
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
3353 vcpu
->arch
.pio
.size
, pd
);
3355 r
= kvm_io_bus_write(vcpu
->kvm
, KVM_PIO_BUS
,
3356 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
3361 static int pio_string_write(struct kvm_vcpu
*vcpu
)
3363 struct kvm_pio_request
*io
= &vcpu
->arch
.pio
;
3364 void *pd
= vcpu
->arch
.pio_data
;
3367 for (i
= 0; i
< io
->cur_count
; i
++) {
3368 if (kvm_io_bus_write(vcpu
->kvm
, KVM_PIO_BUS
,
3369 io
->port
, io
->size
, pd
)) {
3378 int kvm_emulate_pio(struct kvm_vcpu
*vcpu
, int in
, int size
, unsigned port
)
3382 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
3383 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
3384 vcpu
->run
->io
.size
= vcpu
->arch
.pio
.size
= size
;
3385 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
3386 vcpu
->run
->io
.count
= vcpu
->arch
.pio
.count
= vcpu
->arch
.pio
.cur_count
= 1;
3387 vcpu
->run
->io
.port
= vcpu
->arch
.pio
.port
= port
;
3388 vcpu
->arch
.pio
.in
= in
;
3389 vcpu
->arch
.pio
.string
= 0;
3390 vcpu
->arch
.pio
.down
= 0;
3391 vcpu
->arch
.pio
.rep
= 0;
3393 trace_kvm_pio(vcpu
->run
->io
.direction
== KVM_EXIT_IO_OUT
, port
,
3396 val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3397 memcpy(vcpu
->arch
.pio_data
, &val
, 4);
3399 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
3405 EXPORT_SYMBOL_GPL(kvm_emulate_pio
);
3407 int kvm_emulate_pio_string(struct kvm_vcpu
*vcpu
, int in
,
3408 int size
, unsigned long count
, int down
,
3409 gva_t address
, int rep
, unsigned port
)
3411 unsigned now
, in_page
;
3414 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
3415 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
3416 vcpu
->run
->io
.size
= vcpu
->arch
.pio
.size
= size
;
3417 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
3418 vcpu
->run
->io
.count
= vcpu
->arch
.pio
.count
= vcpu
->arch
.pio
.cur_count
= count
;
3419 vcpu
->run
->io
.port
= vcpu
->arch
.pio
.port
= port
;
3420 vcpu
->arch
.pio
.in
= in
;
3421 vcpu
->arch
.pio
.string
= 1;
3422 vcpu
->arch
.pio
.down
= down
;
3423 vcpu
->arch
.pio
.rep
= rep
;
3425 trace_kvm_pio(vcpu
->run
->io
.direction
== KVM_EXIT_IO_OUT
, port
,
3429 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
3434 in_page
= PAGE_SIZE
- offset_in_page(address
);
3436 in_page
= offset_in_page(address
) + size
;
3437 now
= min(count
, (unsigned long)in_page
/ size
);
3442 * String I/O in reverse. Yuck. Kill the guest, fix later.
3444 pr_unimpl(vcpu
, "guest string pio down\n");
3445 kvm_inject_gp(vcpu
, 0);
3448 vcpu
->run
->io
.count
= now
;
3449 vcpu
->arch
.pio
.cur_count
= now
;
3451 if (vcpu
->arch
.pio
.cur_count
== vcpu
->arch
.pio
.count
)
3452 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
3454 vcpu
->arch
.pio
.guest_gva
= address
;
3456 if (!vcpu
->arch
.pio
.in
) {
3457 /* string PIO write */
3458 ret
= pio_copy_data(vcpu
);
3459 if (ret
== X86EMUL_PROPAGATE_FAULT
) {
3460 kvm_inject_gp(vcpu
, 0);
3463 if (ret
== 0 && !pio_string_write(vcpu
)) {
3465 if (vcpu
->arch
.pio
.count
== 0)
3469 /* no string PIO read support yet */
3473 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string
);
3475 static void bounce_off(void *info
)
3480 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
3483 struct cpufreq_freqs
*freq
= data
;
3485 struct kvm_vcpu
*vcpu
;
3486 int i
, send_ipi
= 0;
3488 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
3490 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
3492 per_cpu(cpu_tsc_khz
, freq
->cpu
) = freq
->new;
3494 spin_lock(&kvm_lock
);
3495 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
3496 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
3497 if (vcpu
->cpu
!= freq
->cpu
)
3499 if (!kvm_request_guest_time_update(vcpu
))
3501 if (vcpu
->cpu
!= smp_processor_id())
3505 spin_unlock(&kvm_lock
);
3507 if (freq
->old
< freq
->new && send_ipi
) {
3509 * We upscale the frequency. Must make the guest
3510 * doesn't see old kvmclock values while running with
3511 * the new frequency, otherwise we risk the guest sees
3512 * time go backwards.
3514 * In case we update the frequency for another cpu
3515 * (which might be in guest context) send an interrupt
3516 * to kick the cpu out of guest context. Next time
3517 * guest context is entered kvmclock will be updated,
3518 * so the guest will not see stale values.
3520 smp_call_function_single(freq
->cpu
, bounce_off
, NULL
, 1);
3525 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
3526 .notifier_call
= kvmclock_cpufreq_notifier
3529 static void kvm_timer_init(void)
3533 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
3534 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
3535 CPUFREQ_TRANSITION_NOTIFIER
);
3536 for_each_online_cpu(cpu
) {
3537 unsigned long khz
= cpufreq_get(cpu
);
3540 per_cpu(cpu_tsc_khz
, cpu
) = khz
;
3543 for_each_possible_cpu(cpu
)
3544 per_cpu(cpu_tsc_khz
, cpu
) = tsc_khz
;
3548 int kvm_arch_init(void *opaque
)
3551 struct kvm_x86_ops
*ops
= (struct kvm_x86_ops
*)opaque
;
3554 printk(KERN_ERR
"kvm: already loaded the other module\n");
3559 if (!ops
->cpu_has_kvm_support()) {
3560 printk(KERN_ERR
"kvm: no hardware support\n");
3564 if (ops
->disabled_by_bios()) {
3565 printk(KERN_ERR
"kvm: disabled by bios\n");
3570 r
= kvm_mmu_module_init();
3574 kvm_init_msr_list();
3577 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
3578 kvm_mmu_set_base_ptes(PT_PRESENT_MASK
);
3579 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
3580 PT_DIRTY_MASK
, PT64_NX_MASK
, 0);
3590 void kvm_arch_exit(void)
3592 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
3593 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
3594 CPUFREQ_TRANSITION_NOTIFIER
);
3596 kvm_mmu_module_exit();
3599 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
3601 ++vcpu
->stat
.halt_exits
;
3602 if (irqchip_in_kernel(vcpu
->kvm
)) {
3603 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
3606 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
3610 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
3612 static inline gpa_t
hc_gpa(struct kvm_vcpu
*vcpu
, unsigned long a0
,
3615 if (is_long_mode(vcpu
))
3618 return a0
| ((gpa_t
)a1
<< 32);
3621 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
3623 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
3626 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3627 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
3628 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
3629 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
3630 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
3632 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
3634 if (!is_long_mode(vcpu
)) {
3642 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
3648 case KVM_HC_VAPIC_POLL_IRQ
:
3652 r
= kvm_pv_mmu_op(vcpu
, a0
, hc_gpa(vcpu
, a1
, a2
), &ret
);
3659 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
3660 ++vcpu
->stat
.hypercalls
;
3663 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
3665 int kvm_fix_hypercall(struct kvm_vcpu
*vcpu
)
3667 char instruction
[3];
3669 unsigned long rip
= kvm_rip_read(vcpu
);
3673 * Blow out the MMU to ensure that no other VCPU has an active mapping
3674 * to ensure that the updated hypercall appears atomically across all
3677 kvm_mmu_zap_all(vcpu
->kvm
);
3679 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
3680 if (emulator_write_emulated(rip
, instruction
, 3, vcpu
)
3681 != X86EMUL_CONTINUE
)
3687 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
3689 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
3692 void realmode_lgdt(struct kvm_vcpu
*vcpu
, u16 limit
, unsigned long base
)
3694 struct descriptor_table dt
= { limit
, base
};
3696 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
3699 void realmode_lidt(struct kvm_vcpu
*vcpu
, u16 limit
, unsigned long base
)
3701 struct descriptor_table dt
= { limit
, base
};
3703 kvm_x86_ops
->set_idt(vcpu
, &dt
);
3706 void realmode_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
,
3707 unsigned long *rflags
)
3709 kvm_lmsw(vcpu
, msw
);
3710 *rflags
= kvm_get_rflags(vcpu
);
3713 unsigned long realmode_get_cr(struct kvm_vcpu
*vcpu
, int cr
)
3715 unsigned long value
;
3719 value
= kvm_read_cr0(vcpu
);
3722 value
= vcpu
->arch
.cr2
;
3725 value
= vcpu
->arch
.cr3
;
3728 value
= kvm_read_cr4(vcpu
);
3731 value
= kvm_get_cr8(vcpu
);
3734 vcpu_printf(vcpu
, "%s: unexpected cr %u\n", __func__
, cr
);
3741 void realmode_set_cr(struct kvm_vcpu
*vcpu
, int cr
, unsigned long val
,
3742 unsigned long *rflags
)
3746 kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
3747 *rflags
= kvm_get_rflags(vcpu
);
3750 vcpu
->arch
.cr2
= val
;
3753 kvm_set_cr3(vcpu
, val
);
3756 kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
3759 kvm_set_cr8(vcpu
, val
& 0xfUL
);
3762 vcpu_printf(vcpu
, "%s: unexpected cr %u\n", __func__
, cr
);
3766 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu
*vcpu
, int i
)
3768 struct kvm_cpuid_entry2
*e
= &vcpu
->arch
.cpuid_entries
[i
];
3769 int j
, nent
= vcpu
->arch
.cpuid_nent
;
3771 e
->flags
&= ~KVM_CPUID_FLAG_STATE_READ_NEXT
;
3772 /* when no next entry is found, the current entry[i] is reselected */
3773 for (j
= i
+ 1; ; j
= (j
+ 1) % nent
) {
3774 struct kvm_cpuid_entry2
*ej
= &vcpu
->arch
.cpuid_entries
[j
];
3775 if (ej
->function
== e
->function
) {
3776 ej
->flags
|= KVM_CPUID_FLAG_STATE_READ_NEXT
;
3780 return 0; /* silence gcc, even though control never reaches here */
3783 /* find an entry with matching function, matching index (if needed), and that
3784 * should be read next (if it's stateful) */
3785 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2
*e
,
3786 u32 function
, u32 index
)
3788 if (e
->function
!= function
)
3790 if ((e
->flags
& KVM_CPUID_FLAG_SIGNIFCANT_INDEX
) && e
->index
!= index
)
3792 if ((e
->flags
& KVM_CPUID_FLAG_STATEFUL_FUNC
) &&
3793 !(e
->flags
& KVM_CPUID_FLAG_STATE_READ_NEXT
))
3798 struct kvm_cpuid_entry2
*kvm_find_cpuid_entry(struct kvm_vcpu
*vcpu
,
3799 u32 function
, u32 index
)
3802 struct kvm_cpuid_entry2
*best
= NULL
;
3804 for (i
= 0; i
< vcpu
->arch
.cpuid_nent
; ++i
) {
3805 struct kvm_cpuid_entry2
*e
;
3807 e
= &vcpu
->arch
.cpuid_entries
[i
];
3808 if (is_matching_cpuid_entry(e
, function
, index
)) {
3809 if (e
->flags
& KVM_CPUID_FLAG_STATEFUL_FUNC
)
3810 move_to_next_stateful_cpuid_entry(vcpu
, i
);
3815 * Both basic or both extended?
3817 if (((e
->function
^ function
) & 0x80000000) == 0)
3818 if (!best
|| e
->function
> best
->function
)
3823 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry
);
3825 int cpuid_maxphyaddr(struct kvm_vcpu
*vcpu
)
3827 struct kvm_cpuid_entry2
*best
;
3829 best
= kvm_find_cpuid_entry(vcpu
, 0x80000008, 0);
3831 return best
->eax
& 0xff;
3835 void kvm_emulate_cpuid(struct kvm_vcpu
*vcpu
)
3837 u32 function
, index
;
3838 struct kvm_cpuid_entry2
*best
;
3840 function
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3841 index
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
3842 kvm_register_write(vcpu
, VCPU_REGS_RAX
, 0);
3843 kvm_register_write(vcpu
, VCPU_REGS_RBX
, 0);
3844 kvm_register_write(vcpu
, VCPU_REGS_RCX
, 0);
3845 kvm_register_write(vcpu
, VCPU_REGS_RDX
, 0);
3846 best
= kvm_find_cpuid_entry(vcpu
, function
, index
);
3848 kvm_register_write(vcpu
, VCPU_REGS_RAX
, best
->eax
);
3849 kvm_register_write(vcpu
, VCPU_REGS_RBX
, best
->ebx
);
3850 kvm_register_write(vcpu
, VCPU_REGS_RCX
, best
->ecx
);
3851 kvm_register_write(vcpu
, VCPU_REGS_RDX
, best
->edx
);
3853 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
3854 trace_kvm_cpuid(function
,
3855 kvm_register_read(vcpu
, VCPU_REGS_RAX
),
3856 kvm_register_read(vcpu
, VCPU_REGS_RBX
),
3857 kvm_register_read(vcpu
, VCPU_REGS_RCX
),
3858 kvm_register_read(vcpu
, VCPU_REGS_RDX
));
3860 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid
);
3863 * Check if userspace requested an interrupt window, and that the
3864 * interrupt window is open.
3866 * No need to exit to userspace if we already have an interrupt queued.
3868 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
3870 return (!irqchip_in_kernel(vcpu
->kvm
) && !kvm_cpu_has_interrupt(vcpu
) &&
3871 vcpu
->run
->request_interrupt_window
&&
3872 kvm_arch_interrupt_allowed(vcpu
));
3875 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
3877 struct kvm_run
*kvm_run
= vcpu
->run
;
3879 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
3880 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
3881 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
3882 if (irqchip_in_kernel(vcpu
->kvm
))
3883 kvm_run
->ready_for_interrupt_injection
= 1;
3885 kvm_run
->ready_for_interrupt_injection
=
3886 kvm_arch_interrupt_allowed(vcpu
) &&
3887 !kvm_cpu_has_interrupt(vcpu
) &&
3888 !kvm_event_needs_reinjection(vcpu
);
3891 static void vapic_enter(struct kvm_vcpu
*vcpu
)
3893 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
3896 if (!apic
|| !apic
->vapic_addr
)
3899 page
= gfn_to_page(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
3901 vcpu
->arch
.apic
->vapic_page
= page
;
3904 static void vapic_exit(struct kvm_vcpu
*vcpu
)
3906 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
3909 if (!apic
|| !apic
->vapic_addr
)
3912 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
3913 kvm_release_page_dirty(apic
->vapic_page
);
3914 mark_page_dirty(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
3915 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
3918 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
3922 if (!kvm_x86_ops
->update_cr8_intercept
)
3925 if (!vcpu
->arch
.apic
)
3928 if (!vcpu
->arch
.apic
->vapic_addr
)
3929 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
3936 tpr
= kvm_lapic_get_cr8(vcpu
);
3938 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
3941 static void inject_pending_event(struct kvm_vcpu
*vcpu
)
3943 /* try to reinject previous events if any */
3944 if (vcpu
->arch
.exception
.pending
) {
3945 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
3946 vcpu
->arch
.exception
.has_error_code
,
3947 vcpu
->arch
.exception
.error_code
);
3951 if (vcpu
->arch
.nmi_injected
) {
3952 kvm_x86_ops
->set_nmi(vcpu
);
3956 if (vcpu
->arch
.interrupt
.pending
) {
3957 kvm_x86_ops
->set_irq(vcpu
);
3961 /* try to inject new event if pending */
3962 if (vcpu
->arch
.nmi_pending
) {
3963 if (kvm_x86_ops
->nmi_allowed(vcpu
)) {
3964 vcpu
->arch
.nmi_pending
= false;
3965 vcpu
->arch
.nmi_injected
= true;
3966 kvm_x86_ops
->set_nmi(vcpu
);
3968 } else if (kvm_cpu_has_interrupt(vcpu
)) {
3969 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
3970 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
3972 kvm_x86_ops
->set_irq(vcpu
);
3977 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
3980 bool req_int_win
= !irqchip_in_kernel(vcpu
->kvm
) &&
3981 vcpu
->run
->request_interrupt_window
;
3984 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD
, &vcpu
->requests
))
3985 kvm_mmu_unload(vcpu
);
3987 r
= kvm_mmu_reload(vcpu
);
3991 if (vcpu
->requests
) {
3992 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER
, &vcpu
->requests
))
3993 __kvm_migrate_timers(vcpu
);
3994 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE
, &vcpu
->requests
))
3995 kvm_write_guest_time(vcpu
);
3996 if (test_and_clear_bit(KVM_REQ_MMU_SYNC
, &vcpu
->requests
))
3997 kvm_mmu_sync_roots(vcpu
);
3998 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH
, &vcpu
->requests
))
3999 kvm_x86_ops
->tlb_flush(vcpu
);
4000 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS
,
4002 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
4006 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT
, &vcpu
->requests
)) {
4007 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
4011 if (test_and_clear_bit(KVM_REQ_DEACTIVATE_FPU
, &vcpu
->requests
)) {
4012 vcpu
->fpu_active
= 0;
4013 kvm_x86_ops
->fpu_deactivate(vcpu
);
4019 kvm_x86_ops
->prepare_guest_switch(vcpu
);
4020 kvm_load_guest_fpu(vcpu
);
4022 local_irq_disable();
4024 clear_bit(KVM_REQ_KICK
, &vcpu
->requests
);
4025 smp_mb__after_clear_bit();
4027 if (vcpu
->requests
|| need_resched() || signal_pending(current
)) {
4028 set_bit(KVM_REQ_KICK
, &vcpu
->requests
);
4035 inject_pending_event(vcpu
);
4037 /* enable NMI/IRQ window open exits if needed */
4038 if (vcpu
->arch
.nmi_pending
)
4039 kvm_x86_ops
->enable_nmi_window(vcpu
);
4040 else if (kvm_cpu_has_interrupt(vcpu
) || req_int_win
)
4041 kvm_x86_ops
->enable_irq_window(vcpu
);
4043 if (kvm_lapic_enabled(vcpu
)) {
4044 update_cr8_intercept(vcpu
);
4045 kvm_lapic_sync_to_vapic(vcpu
);
4048 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
4052 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
4054 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
4055 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
4056 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
4057 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
4060 trace_kvm_entry(vcpu
->vcpu_id
);
4061 kvm_x86_ops
->run(vcpu
);
4064 * If the guest has used debug registers, at least dr7
4065 * will be disabled while returning to the host.
4066 * If we don't have active breakpoints in the host, we don't
4067 * care about the messed up debug address registers. But if
4068 * we have some of them active, restore the old state.
4070 if (hw_breakpoint_active())
4071 hw_breakpoint_restore();
4073 set_bit(KVM_REQ_KICK
, &vcpu
->requests
);
4079 * We must have an instruction between local_irq_enable() and
4080 * kvm_guest_exit(), so the timer interrupt isn't delayed by
4081 * the interrupt shadow. The stat.exits increment will do nicely.
4082 * But we need to prevent reordering, hence this barrier():
4090 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
4093 * Profile KVM exit RIPs:
4095 if (unlikely(prof_on
== KVM_PROFILING
)) {
4096 unsigned long rip
= kvm_rip_read(vcpu
);
4097 profile_hit(KVM_PROFILING
, (void *)rip
);
4101 kvm_lapic_sync_from_vapic(vcpu
);
4103 r
= kvm_x86_ops
->handle_exit(vcpu
);
4109 static int __vcpu_run(struct kvm_vcpu
*vcpu
)
4112 struct kvm
*kvm
= vcpu
->kvm
;
4114 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
)) {
4115 pr_debug("vcpu %d received sipi with vector # %x\n",
4116 vcpu
->vcpu_id
, vcpu
->arch
.sipi_vector
);
4117 kvm_lapic_reset(vcpu
);
4118 r
= kvm_arch_vcpu_reset(vcpu
);
4121 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
4124 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
4129 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
)
4130 r
= vcpu_enter_guest(vcpu
);
4132 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
4133 kvm_vcpu_block(vcpu
);
4134 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
4135 if (test_and_clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
))
4137 switch(vcpu
->arch
.mp_state
) {
4138 case KVM_MP_STATE_HALTED
:
4139 vcpu
->arch
.mp_state
=
4140 KVM_MP_STATE_RUNNABLE
;
4141 case KVM_MP_STATE_RUNNABLE
:
4143 case KVM_MP_STATE_SIPI_RECEIVED
:
4154 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
4155 if (kvm_cpu_has_pending_timer(vcpu
))
4156 kvm_inject_pending_timer_irqs(vcpu
);
4158 if (dm_request_for_irq_injection(vcpu
)) {
4160 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
4161 ++vcpu
->stat
.request_irq_exits
;
4163 if (signal_pending(current
)) {
4165 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
4166 ++vcpu
->stat
.signal_exits
;
4168 if (need_resched()) {
4169 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
4171 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
4175 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
4176 post_kvm_run_save(vcpu
);
4183 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
4190 if (vcpu
->sigset_active
)
4191 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
4193 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
4194 kvm_vcpu_block(vcpu
);
4195 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
4200 /* re-sync apic's tpr */
4201 if (!irqchip_in_kernel(vcpu
->kvm
))
4202 kvm_set_cr8(vcpu
, kvm_run
->cr8
);
4204 if (vcpu
->arch
.pio
.cur_count
) {
4205 r
= complete_pio(vcpu
);
4209 if (vcpu
->mmio_needed
) {
4210 memcpy(vcpu
->mmio_data
, kvm_run
->mmio
.data
, 8);
4211 vcpu
->mmio_read_completed
= 1;
4212 vcpu
->mmio_needed
= 0;
4214 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
4215 r
= emulate_instruction(vcpu
, vcpu
->arch
.mmio_fault_cr2
, 0,
4216 EMULTYPE_NO_DECODE
);
4217 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
4218 if (r
== EMULATE_DO_MMIO
) {
4220 * Read-modify-write. Back to userspace.
4226 if (kvm_run
->exit_reason
== KVM_EXIT_HYPERCALL
)
4227 kvm_register_write(vcpu
, VCPU_REGS_RAX
,
4228 kvm_run
->hypercall
.ret
);
4230 r
= __vcpu_run(vcpu
);
4233 if (vcpu
->sigset_active
)
4234 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
4240 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
4244 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4245 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
4246 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4247 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4248 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
4249 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
4250 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
4251 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
4252 #ifdef CONFIG_X86_64
4253 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
4254 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
4255 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
4256 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
4257 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
4258 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
4259 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
4260 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
4263 regs
->rip
= kvm_rip_read(vcpu
);
4264 regs
->rflags
= kvm_get_rflags(vcpu
);
4271 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
4275 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
4276 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
4277 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
4278 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
4279 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
4280 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
4281 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
4282 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
4283 #ifdef CONFIG_X86_64
4284 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
4285 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
4286 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
4287 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
4288 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
4289 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
4290 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
4291 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
4294 kvm_rip_write(vcpu
, regs
->rip
);
4295 kvm_set_rflags(vcpu
, regs
->rflags
);
4297 vcpu
->arch
.exception
.pending
= false;
4304 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
4305 struct kvm_segment
*var
, int seg
)
4307 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
4310 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
4312 struct kvm_segment cs
;
4314 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
4318 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
4320 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
4321 struct kvm_sregs
*sregs
)
4323 struct descriptor_table dt
;
4327 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
4328 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
4329 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
4330 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
4331 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
4332 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
4334 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
4335 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
4337 kvm_x86_ops
->get_idt(vcpu
, &dt
);
4338 sregs
->idt
.limit
= dt
.limit
;
4339 sregs
->idt
.base
= dt
.base
;
4340 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
4341 sregs
->gdt
.limit
= dt
.limit
;
4342 sregs
->gdt
.base
= dt
.base
;
4344 sregs
->cr0
= kvm_read_cr0(vcpu
);
4345 sregs
->cr2
= vcpu
->arch
.cr2
;
4346 sregs
->cr3
= vcpu
->arch
.cr3
;
4347 sregs
->cr4
= kvm_read_cr4(vcpu
);
4348 sregs
->cr8
= kvm_get_cr8(vcpu
);
4349 sregs
->efer
= vcpu
->arch
.shadow_efer
;
4350 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
4352 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
4354 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
4355 set_bit(vcpu
->arch
.interrupt
.nr
,
4356 (unsigned long *)sregs
->interrupt_bitmap
);
4363 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
4364 struct kvm_mp_state
*mp_state
)
4367 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
4372 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
4373 struct kvm_mp_state
*mp_state
)
4376 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
4381 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
4382 struct kvm_segment
*var
, int seg
)
4384 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
4387 static void seg_desct_to_kvm_desct(struct desc_struct
*seg_desc
, u16 selector
,
4388 struct kvm_segment
*kvm_desct
)
4390 kvm_desct
->base
= get_desc_base(seg_desc
);
4391 kvm_desct
->limit
= get_desc_limit(seg_desc
);
4393 kvm_desct
->limit
<<= 12;
4394 kvm_desct
->limit
|= 0xfff;
4396 kvm_desct
->selector
= selector
;
4397 kvm_desct
->type
= seg_desc
->type
;
4398 kvm_desct
->present
= seg_desc
->p
;
4399 kvm_desct
->dpl
= seg_desc
->dpl
;
4400 kvm_desct
->db
= seg_desc
->d
;
4401 kvm_desct
->s
= seg_desc
->s
;
4402 kvm_desct
->l
= seg_desc
->l
;
4403 kvm_desct
->g
= seg_desc
->g
;
4404 kvm_desct
->avl
= seg_desc
->avl
;
4406 kvm_desct
->unusable
= 1;
4408 kvm_desct
->unusable
= 0;
4409 kvm_desct
->padding
= 0;
4412 static void get_segment_descriptor_dtable(struct kvm_vcpu
*vcpu
,
4414 struct descriptor_table
*dtable
)
4416 if (selector
& 1 << 2) {
4417 struct kvm_segment kvm_seg
;
4419 kvm_get_segment(vcpu
, &kvm_seg
, VCPU_SREG_LDTR
);
4421 if (kvm_seg
.unusable
)
4424 dtable
->limit
= kvm_seg
.limit
;
4425 dtable
->base
= kvm_seg
.base
;
4428 kvm_x86_ops
->get_gdt(vcpu
, dtable
);
4431 /* allowed just for 8 bytes segments */
4432 static int load_guest_segment_descriptor(struct kvm_vcpu
*vcpu
, u16 selector
,
4433 struct desc_struct
*seg_desc
)
4435 struct descriptor_table dtable
;
4436 u16 index
= selector
>> 3;
4438 get_segment_descriptor_dtable(vcpu
, selector
, &dtable
);
4440 if (dtable
.limit
< index
* 8 + 7) {
4441 kvm_queue_exception_e(vcpu
, GP_VECTOR
, selector
& 0xfffc);
4444 return kvm_read_guest_virt(dtable
.base
+ index
*8, seg_desc
, sizeof(*seg_desc
), vcpu
);
4447 /* allowed just for 8 bytes segments */
4448 static int save_guest_segment_descriptor(struct kvm_vcpu
*vcpu
, u16 selector
,
4449 struct desc_struct
*seg_desc
)
4451 struct descriptor_table dtable
;
4452 u16 index
= selector
>> 3;
4454 get_segment_descriptor_dtable(vcpu
, selector
, &dtable
);
4456 if (dtable
.limit
< index
* 8 + 7)
4458 return kvm_write_guest_virt(dtable
.base
+ index
*8, seg_desc
, sizeof(*seg_desc
), vcpu
);
4461 static gpa_t
get_tss_base_addr(struct kvm_vcpu
*vcpu
,
4462 struct desc_struct
*seg_desc
)
4464 u32 base_addr
= get_desc_base(seg_desc
);
4466 return vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, base_addr
);
4469 static u16
get_segment_selector(struct kvm_vcpu
*vcpu
, int seg
)
4471 struct kvm_segment kvm_seg
;
4473 kvm_get_segment(vcpu
, &kvm_seg
, seg
);
4474 return kvm_seg
.selector
;
4477 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu
*vcpu
,
4479 struct kvm_segment
*kvm_seg
)
4481 struct desc_struct seg_desc
;
4483 if (load_guest_segment_descriptor(vcpu
, selector
, &seg_desc
))
4485 seg_desct_to_kvm_desct(&seg_desc
, selector
, kvm_seg
);
4489 static int kvm_load_realmode_segment(struct kvm_vcpu
*vcpu
, u16 selector
, int seg
)
4491 struct kvm_segment segvar
= {
4492 .base
= selector
<< 4,
4494 .selector
= selector
,
4505 kvm_x86_ops
->set_segment(vcpu
, &segvar
, seg
);
4509 static int is_vm86_segment(struct kvm_vcpu
*vcpu
, int seg
)
4511 return (seg
!= VCPU_SREG_LDTR
) &&
4512 (seg
!= VCPU_SREG_TR
) &&
4513 (kvm_get_rflags(vcpu
) & X86_EFLAGS_VM
);
4516 static void kvm_check_segment_descriptor(struct kvm_vcpu
*vcpu
, int seg
,
4519 /* NULL selector is not valid for CS and SS */
4520 if (seg
== VCPU_SREG_CS
|| seg
== VCPU_SREG_SS
)
4522 kvm_queue_exception_e(vcpu
, TS_VECTOR
, selector
>> 3);
4525 int kvm_load_segment_descriptor(struct kvm_vcpu
*vcpu
, u16 selector
,
4526 int type_bits
, int seg
)
4528 struct kvm_segment kvm_seg
;
4530 if (is_vm86_segment(vcpu
, seg
) || !(kvm_read_cr0_bits(vcpu
, X86_CR0_PE
)))
4531 return kvm_load_realmode_segment(vcpu
, selector
, seg
);
4532 if (load_segment_descriptor_to_kvm_desct(vcpu
, selector
, &kvm_seg
))
4535 kvm_check_segment_descriptor(vcpu
, seg
, selector
);
4536 kvm_seg
.type
|= type_bits
;
4538 if (seg
!= VCPU_SREG_SS
&& seg
!= VCPU_SREG_CS
&&
4539 seg
!= VCPU_SREG_LDTR
)
4541 kvm_seg
.unusable
= 1;
4543 kvm_set_segment(vcpu
, &kvm_seg
, seg
);
4547 static void save_state_to_tss32(struct kvm_vcpu
*vcpu
,
4548 struct tss_segment_32
*tss
)
4550 tss
->cr3
= vcpu
->arch
.cr3
;
4551 tss
->eip
= kvm_rip_read(vcpu
);
4552 tss
->eflags
= kvm_get_rflags(vcpu
);
4553 tss
->eax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4554 tss
->ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4555 tss
->edx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4556 tss
->ebx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
4557 tss
->esp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
4558 tss
->ebp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
4559 tss
->esi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
4560 tss
->edi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
4561 tss
->es
= get_segment_selector(vcpu
, VCPU_SREG_ES
);
4562 tss
->cs
= get_segment_selector(vcpu
, VCPU_SREG_CS
);
4563 tss
->ss
= get_segment_selector(vcpu
, VCPU_SREG_SS
);
4564 tss
->ds
= get_segment_selector(vcpu
, VCPU_SREG_DS
);
4565 tss
->fs
= get_segment_selector(vcpu
, VCPU_SREG_FS
);
4566 tss
->gs
= get_segment_selector(vcpu
, VCPU_SREG_GS
);
4567 tss
->ldt_selector
= get_segment_selector(vcpu
, VCPU_SREG_LDTR
);
4570 static int load_state_from_tss32(struct kvm_vcpu
*vcpu
,
4571 struct tss_segment_32
*tss
)
4573 kvm_set_cr3(vcpu
, tss
->cr3
);
4575 kvm_rip_write(vcpu
, tss
->eip
);
4576 kvm_set_rflags(vcpu
, tss
->eflags
| 2);
4578 kvm_register_write(vcpu
, VCPU_REGS_RAX
, tss
->eax
);
4579 kvm_register_write(vcpu
, VCPU_REGS_RCX
, tss
->ecx
);
4580 kvm_register_write(vcpu
, VCPU_REGS_RDX
, tss
->edx
);
4581 kvm_register_write(vcpu
, VCPU_REGS_RBX
, tss
->ebx
);
4582 kvm_register_write(vcpu
, VCPU_REGS_RSP
, tss
->esp
);
4583 kvm_register_write(vcpu
, VCPU_REGS_RBP
, tss
->ebp
);
4584 kvm_register_write(vcpu
, VCPU_REGS_RSI
, tss
->esi
);
4585 kvm_register_write(vcpu
, VCPU_REGS_RDI
, tss
->edi
);
4587 if (kvm_load_segment_descriptor(vcpu
, tss
->ldt_selector
, 0, VCPU_SREG_LDTR
))
4590 if (kvm_load_segment_descriptor(vcpu
, tss
->es
, 1, VCPU_SREG_ES
))
4593 if (kvm_load_segment_descriptor(vcpu
, tss
->cs
, 9, VCPU_SREG_CS
))
4596 if (kvm_load_segment_descriptor(vcpu
, tss
->ss
, 1, VCPU_SREG_SS
))
4599 if (kvm_load_segment_descriptor(vcpu
, tss
->ds
, 1, VCPU_SREG_DS
))
4602 if (kvm_load_segment_descriptor(vcpu
, tss
->fs
, 1, VCPU_SREG_FS
))
4605 if (kvm_load_segment_descriptor(vcpu
, tss
->gs
, 1, VCPU_SREG_GS
))
4610 static void save_state_to_tss16(struct kvm_vcpu
*vcpu
,
4611 struct tss_segment_16
*tss
)
4613 tss
->ip
= kvm_rip_read(vcpu
);
4614 tss
->flag
= kvm_get_rflags(vcpu
);
4615 tss
->ax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4616 tss
->cx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4617 tss
->dx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4618 tss
->bx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
4619 tss
->sp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
4620 tss
->bp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
4621 tss
->si
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
4622 tss
->di
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
4624 tss
->es
= get_segment_selector(vcpu
, VCPU_SREG_ES
);
4625 tss
->cs
= get_segment_selector(vcpu
, VCPU_SREG_CS
);
4626 tss
->ss
= get_segment_selector(vcpu
, VCPU_SREG_SS
);
4627 tss
->ds
= get_segment_selector(vcpu
, VCPU_SREG_DS
);
4628 tss
->ldt
= get_segment_selector(vcpu
, VCPU_SREG_LDTR
);
4631 static int load_state_from_tss16(struct kvm_vcpu
*vcpu
,
4632 struct tss_segment_16
*tss
)
4634 kvm_rip_write(vcpu
, tss
->ip
);
4635 kvm_set_rflags(vcpu
, tss
->flag
| 2);
4636 kvm_register_write(vcpu
, VCPU_REGS_RAX
, tss
->ax
);
4637 kvm_register_write(vcpu
, VCPU_REGS_RCX
, tss
->cx
);
4638 kvm_register_write(vcpu
, VCPU_REGS_RDX
, tss
->dx
);
4639 kvm_register_write(vcpu
, VCPU_REGS_RBX
, tss
->bx
);
4640 kvm_register_write(vcpu
, VCPU_REGS_RSP
, tss
->sp
);
4641 kvm_register_write(vcpu
, VCPU_REGS_RBP
, tss
->bp
);
4642 kvm_register_write(vcpu
, VCPU_REGS_RSI
, tss
->si
);
4643 kvm_register_write(vcpu
, VCPU_REGS_RDI
, tss
->di
);
4645 if (kvm_load_segment_descriptor(vcpu
, tss
->ldt
, 0, VCPU_SREG_LDTR
))
4648 if (kvm_load_segment_descriptor(vcpu
, tss
->es
, 1, VCPU_SREG_ES
))
4651 if (kvm_load_segment_descriptor(vcpu
, tss
->cs
, 9, VCPU_SREG_CS
))
4654 if (kvm_load_segment_descriptor(vcpu
, tss
->ss
, 1, VCPU_SREG_SS
))
4657 if (kvm_load_segment_descriptor(vcpu
, tss
->ds
, 1, VCPU_SREG_DS
))
4662 static int kvm_task_switch_16(struct kvm_vcpu
*vcpu
, u16 tss_selector
,
4663 u16 old_tss_sel
, u32 old_tss_base
,
4664 struct desc_struct
*nseg_desc
)
4666 struct tss_segment_16 tss_segment_16
;
4669 if (kvm_read_guest(vcpu
->kvm
, old_tss_base
, &tss_segment_16
,
4670 sizeof tss_segment_16
))
4673 save_state_to_tss16(vcpu
, &tss_segment_16
);
4675 if (kvm_write_guest(vcpu
->kvm
, old_tss_base
, &tss_segment_16
,
4676 sizeof tss_segment_16
))
4679 if (kvm_read_guest(vcpu
->kvm
, get_tss_base_addr(vcpu
, nseg_desc
),
4680 &tss_segment_16
, sizeof tss_segment_16
))
4683 if (old_tss_sel
!= 0xffff) {
4684 tss_segment_16
.prev_task_link
= old_tss_sel
;
4686 if (kvm_write_guest(vcpu
->kvm
,
4687 get_tss_base_addr(vcpu
, nseg_desc
),
4688 &tss_segment_16
.prev_task_link
,
4689 sizeof tss_segment_16
.prev_task_link
))
4693 if (load_state_from_tss16(vcpu
, &tss_segment_16
))
4701 static int kvm_task_switch_32(struct kvm_vcpu
*vcpu
, u16 tss_selector
,
4702 u16 old_tss_sel
, u32 old_tss_base
,
4703 struct desc_struct
*nseg_desc
)
4705 struct tss_segment_32 tss_segment_32
;
4708 if (kvm_read_guest(vcpu
->kvm
, old_tss_base
, &tss_segment_32
,
4709 sizeof tss_segment_32
))
4712 save_state_to_tss32(vcpu
, &tss_segment_32
);
4714 if (kvm_write_guest(vcpu
->kvm
, old_tss_base
, &tss_segment_32
,
4715 sizeof tss_segment_32
))
4718 if (kvm_read_guest(vcpu
->kvm
, get_tss_base_addr(vcpu
, nseg_desc
),
4719 &tss_segment_32
, sizeof tss_segment_32
))
4722 if (old_tss_sel
!= 0xffff) {
4723 tss_segment_32
.prev_task_link
= old_tss_sel
;
4725 if (kvm_write_guest(vcpu
->kvm
,
4726 get_tss_base_addr(vcpu
, nseg_desc
),
4727 &tss_segment_32
.prev_task_link
,
4728 sizeof tss_segment_32
.prev_task_link
))
4732 if (load_state_from_tss32(vcpu
, &tss_segment_32
))
4740 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int reason
)
4742 struct kvm_segment tr_seg
;
4743 struct desc_struct cseg_desc
;
4744 struct desc_struct nseg_desc
;
4746 u32 old_tss_base
= get_segment_base(vcpu
, VCPU_SREG_TR
);
4747 u16 old_tss_sel
= get_segment_selector(vcpu
, VCPU_SREG_TR
);
4749 old_tss_base
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, old_tss_base
);
4751 /* FIXME: Handle errors. Failure to read either TSS or their
4752 * descriptors should generate a pagefault.
4754 if (load_guest_segment_descriptor(vcpu
, tss_selector
, &nseg_desc
))
4757 if (load_guest_segment_descriptor(vcpu
, old_tss_sel
, &cseg_desc
))
4760 if (reason
!= TASK_SWITCH_IRET
) {
4763 cpl
= kvm_x86_ops
->get_cpl(vcpu
);
4764 if ((tss_selector
& 3) > nseg_desc
.dpl
|| cpl
> nseg_desc
.dpl
) {
4765 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
4770 if (!nseg_desc
.p
|| get_desc_limit(&nseg_desc
) < 0x67) {
4771 kvm_queue_exception_e(vcpu
, TS_VECTOR
, tss_selector
& 0xfffc);
4775 if (reason
== TASK_SWITCH_IRET
|| reason
== TASK_SWITCH_JMP
) {
4776 cseg_desc
.type
&= ~(1 << 1); //clear the B flag
4777 save_guest_segment_descriptor(vcpu
, old_tss_sel
, &cseg_desc
);
4780 if (reason
== TASK_SWITCH_IRET
) {
4781 u32 eflags
= kvm_get_rflags(vcpu
);
4782 kvm_set_rflags(vcpu
, eflags
& ~X86_EFLAGS_NT
);
4785 /* set back link to prev task only if NT bit is set in eflags
4786 note that old_tss_sel is not used afetr this point */
4787 if (reason
!= TASK_SWITCH_CALL
&& reason
!= TASK_SWITCH_GATE
)
4788 old_tss_sel
= 0xffff;
4790 if (nseg_desc
.type
& 8)
4791 ret
= kvm_task_switch_32(vcpu
, tss_selector
, old_tss_sel
,
4792 old_tss_base
, &nseg_desc
);
4794 ret
= kvm_task_switch_16(vcpu
, tss_selector
, old_tss_sel
,
4795 old_tss_base
, &nseg_desc
);
4797 if (reason
== TASK_SWITCH_CALL
|| reason
== TASK_SWITCH_GATE
) {
4798 u32 eflags
= kvm_get_rflags(vcpu
);
4799 kvm_set_rflags(vcpu
, eflags
| X86_EFLAGS_NT
);
4802 if (reason
!= TASK_SWITCH_IRET
) {
4803 nseg_desc
.type
|= (1 << 1);
4804 save_guest_segment_descriptor(vcpu
, tss_selector
,
4808 kvm_x86_ops
->set_cr0(vcpu
, kvm_read_cr0(vcpu
) | X86_CR0_TS
);
4809 seg_desct_to_kvm_desct(&nseg_desc
, tss_selector
, &tr_seg
);
4811 kvm_set_segment(vcpu
, &tr_seg
, VCPU_SREG_TR
);
4815 EXPORT_SYMBOL_GPL(kvm_task_switch
);
4817 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
4818 struct kvm_sregs
*sregs
)
4820 int mmu_reset_needed
= 0;
4821 int pending_vec
, max_bits
;
4822 struct descriptor_table dt
;
4826 dt
.limit
= sregs
->idt
.limit
;
4827 dt
.base
= sregs
->idt
.base
;
4828 kvm_x86_ops
->set_idt(vcpu
, &dt
);
4829 dt
.limit
= sregs
->gdt
.limit
;
4830 dt
.base
= sregs
->gdt
.base
;
4831 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
4833 vcpu
->arch
.cr2
= sregs
->cr2
;
4834 mmu_reset_needed
|= vcpu
->arch
.cr3
!= sregs
->cr3
;
4835 vcpu
->arch
.cr3
= sregs
->cr3
;
4837 kvm_set_cr8(vcpu
, sregs
->cr8
);
4839 mmu_reset_needed
|= vcpu
->arch
.shadow_efer
!= sregs
->efer
;
4840 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
4841 kvm_set_apic_base(vcpu
, sregs
->apic_base
);
4843 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
4844 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
4845 vcpu
->arch
.cr0
= sregs
->cr0
;
4847 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
4848 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
4849 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
4850 load_pdptrs(vcpu
, vcpu
->arch
.cr3
);
4851 mmu_reset_needed
= 1;
4854 if (mmu_reset_needed
)
4855 kvm_mmu_reset_context(vcpu
);
4857 max_bits
= (sizeof sregs
->interrupt_bitmap
) << 3;
4858 pending_vec
= find_first_bit(
4859 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
4860 if (pending_vec
< max_bits
) {
4861 kvm_queue_interrupt(vcpu
, pending_vec
, false);
4862 pr_debug("Set back pending irq %d\n", pending_vec
);
4863 if (irqchip_in_kernel(vcpu
->kvm
))
4864 kvm_pic_clear_isr_ack(vcpu
->kvm
);
4867 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
4868 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
4869 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
4870 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
4871 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
4872 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
4874 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
4875 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
4877 update_cr8_intercept(vcpu
);
4879 /* Older userspace won't unhalt the vcpu on reset. */
4880 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
4881 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
4882 !(kvm_read_cr0_bits(vcpu
, X86_CR0_PE
)))
4883 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
4890 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
4891 struct kvm_guest_debug
*dbg
)
4893 unsigned long rflags
;
4898 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
4900 if (vcpu
->arch
.exception
.pending
)
4902 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
4903 kvm_queue_exception(vcpu
, DB_VECTOR
);
4905 kvm_queue_exception(vcpu
, BP_VECTOR
);
4909 * Read rflags as long as potentially injected trace flags are still
4912 rflags
= kvm_get_rflags(vcpu
);
4914 vcpu
->guest_debug
= dbg
->control
;
4915 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
4916 vcpu
->guest_debug
= 0;
4918 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
4919 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
4920 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
4921 vcpu
->arch
.switch_db_regs
=
4922 (dbg
->arch
.debugreg
[7] & DR7_BP_EN_MASK
);
4924 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
4925 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
4926 vcpu
->arch
.switch_db_regs
= (vcpu
->arch
.dr7
& DR7_BP_EN_MASK
);
4929 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
4930 vcpu
->arch
.singlestep_cs
=
4931 get_segment_selector(vcpu
, VCPU_SREG_CS
);
4932 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
);
4936 * Trigger an rflags update that will inject or remove the trace
4939 kvm_set_rflags(vcpu
, rflags
);
4941 kvm_x86_ops
->set_guest_debug(vcpu
, dbg
);
4952 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
4953 * we have asm/x86/processor.h
4964 u32 st_space
[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
4965 #ifdef CONFIG_X86_64
4966 u32 xmm_space
[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
4968 u32 xmm_space
[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
4973 * Translate a guest virtual address to a guest physical address.
4975 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
4976 struct kvm_translation
*tr
)
4978 unsigned long vaddr
= tr
->linear_address
;
4983 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
4984 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, vaddr
);
4985 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
4986 tr
->physical_address
= gpa
;
4987 tr
->valid
= gpa
!= UNMAPPED_GVA
;
4995 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
4997 struct fxsave
*fxsave
= (struct fxsave
*)&vcpu
->arch
.guest_fx_image
;
5001 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
5002 fpu
->fcw
= fxsave
->cwd
;
5003 fpu
->fsw
= fxsave
->swd
;
5004 fpu
->ftwx
= fxsave
->twd
;
5005 fpu
->last_opcode
= fxsave
->fop
;
5006 fpu
->last_ip
= fxsave
->rip
;
5007 fpu
->last_dp
= fxsave
->rdp
;
5008 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
5015 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
5017 struct fxsave
*fxsave
= (struct fxsave
*)&vcpu
->arch
.guest_fx_image
;
5021 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
5022 fxsave
->cwd
= fpu
->fcw
;
5023 fxsave
->swd
= fpu
->fsw
;
5024 fxsave
->twd
= fpu
->ftwx
;
5025 fxsave
->fop
= fpu
->last_opcode
;
5026 fxsave
->rip
= fpu
->last_ip
;
5027 fxsave
->rdp
= fpu
->last_dp
;
5028 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
5035 void fx_init(struct kvm_vcpu
*vcpu
)
5037 unsigned after_mxcsr_mask
;
5040 * Touch the fpu the first time in non atomic context as if
5041 * this is the first fpu instruction the exception handler
5042 * will fire before the instruction returns and it'll have to
5043 * allocate ram with GFP_KERNEL.
5046 kvm_fx_save(&vcpu
->arch
.host_fx_image
);
5048 /* Initialize guest FPU by resetting ours and saving into guest's */
5050 kvm_fx_save(&vcpu
->arch
.host_fx_image
);
5052 kvm_fx_save(&vcpu
->arch
.guest_fx_image
);
5053 kvm_fx_restore(&vcpu
->arch
.host_fx_image
);
5056 vcpu
->arch
.cr0
|= X86_CR0_ET
;
5057 after_mxcsr_mask
= offsetof(struct i387_fxsave_struct
, st_space
);
5058 vcpu
->arch
.guest_fx_image
.mxcsr
= 0x1f80;
5059 memset((void *)&vcpu
->arch
.guest_fx_image
+ after_mxcsr_mask
,
5060 0, sizeof(struct i387_fxsave_struct
) - after_mxcsr_mask
);
5062 EXPORT_SYMBOL_GPL(fx_init
);
5064 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
5066 if (!vcpu
->fpu_active
|| vcpu
->guest_fpu_loaded
)
5069 vcpu
->guest_fpu_loaded
= 1;
5070 kvm_fx_save(&vcpu
->arch
.host_fx_image
);
5071 kvm_fx_restore(&vcpu
->arch
.guest_fx_image
);
5073 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu
);
5075 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
5077 if (!vcpu
->guest_fpu_loaded
)
5080 vcpu
->guest_fpu_loaded
= 0;
5081 kvm_fx_save(&vcpu
->arch
.guest_fx_image
);
5082 kvm_fx_restore(&vcpu
->arch
.host_fx_image
);
5083 ++vcpu
->stat
.fpu_reload
;
5084 set_bit(KVM_REQ_DEACTIVATE_FPU
, &vcpu
->requests
);
5086 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu
);
5088 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
5090 if (vcpu
->arch
.time_page
) {
5091 kvm_release_page_dirty(vcpu
->arch
.time_page
);
5092 vcpu
->arch
.time_page
= NULL
;
5095 kvm_x86_ops
->vcpu_free(vcpu
);
5098 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
5101 return kvm_x86_ops
->vcpu_create(kvm
, id
);
5104 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
5108 /* We do fxsave: this must be aligned. */
5109 BUG_ON((unsigned long)&vcpu
->arch
.host_fx_image
& 0xF);
5111 vcpu
->arch
.mtrr_state
.have_fixed
= 1;
5113 r
= kvm_arch_vcpu_reset(vcpu
);
5115 r
= kvm_mmu_setup(vcpu
);
5122 kvm_x86_ops
->vcpu_free(vcpu
);
5126 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
5129 kvm_mmu_unload(vcpu
);
5132 kvm_x86_ops
->vcpu_free(vcpu
);
5135 int kvm_arch_vcpu_reset(struct kvm_vcpu
*vcpu
)
5137 vcpu
->arch
.nmi_pending
= false;
5138 vcpu
->arch
.nmi_injected
= false;
5140 vcpu
->arch
.switch_db_regs
= 0;
5141 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
5142 vcpu
->arch
.dr6
= DR6_FIXED_1
;
5143 vcpu
->arch
.dr7
= DR7_FIXED_1
;
5145 return kvm_x86_ops
->vcpu_reset(vcpu
);
5148 int kvm_arch_hardware_enable(void *garbage
)
5151 * Since this may be called from a hotplug notifcation,
5152 * we can't get the CPU frequency directly.
5154 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
5155 int cpu
= raw_smp_processor_id();
5156 per_cpu(cpu_tsc_khz
, cpu
) = 0;
5159 kvm_shared_msr_cpu_online();
5161 return kvm_x86_ops
->hardware_enable(garbage
);
5164 void kvm_arch_hardware_disable(void *garbage
)
5166 kvm_x86_ops
->hardware_disable(garbage
);
5167 drop_user_return_notifiers(garbage
);
5170 int kvm_arch_hardware_setup(void)
5172 return kvm_x86_ops
->hardware_setup();
5175 void kvm_arch_hardware_unsetup(void)
5177 kvm_x86_ops
->hardware_unsetup();
5180 void kvm_arch_check_processor_compat(void *rtn
)
5182 kvm_x86_ops
->check_processor_compatibility(rtn
);
5185 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
5191 BUG_ON(vcpu
->kvm
== NULL
);
5194 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
5195 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_bsp(vcpu
))
5196 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
5198 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
5200 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
5205 vcpu
->arch
.pio_data
= page_address(page
);
5207 r
= kvm_mmu_create(vcpu
);
5209 goto fail_free_pio_data
;
5211 if (irqchip_in_kernel(kvm
)) {
5212 r
= kvm_create_lapic(vcpu
);
5214 goto fail_mmu_destroy
;
5217 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
5219 if (!vcpu
->arch
.mce_banks
) {
5221 goto fail_free_lapic
;
5223 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
5227 kvm_free_lapic(vcpu
);
5229 kvm_mmu_destroy(vcpu
);
5231 free_page((unsigned long)vcpu
->arch
.pio_data
);
5236 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
5240 kfree(vcpu
->arch
.mce_banks
);
5241 kvm_free_lapic(vcpu
);
5242 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5243 kvm_mmu_destroy(vcpu
);
5244 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5245 free_page((unsigned long)vcpu
->arch
.pio_data
);
5248 struct kvm
*kvm_arch_create_vm(void)
5250 struct kvm
*kvm
= kzalloc(sizeof(struct kvm
), GFP_KERNEL
);
5253 return ERR_PTR(-ENOMEM
);
5255 kvm
->arch
.aliases
= kzalloc(sizeof(struct kvm_mem_aliases
), GFP_KERNEL
);
5256 if (!kvm
->arch
.aliases
) {
5258 return ERR_PTR(-ENOMEM
);
5261 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
5262 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
5264 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5265 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
5267 rdtscll(kvm
->arch
.vm_init_tsc
);
5272 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
5275 kvm_mmu_unload(vcpu
);
5279 static void kvm_free_vcpus(struct kvm
*kvm
)
5282 struct kvm_vcpu
*vcpu
;
5285 * Unpin any mmu pages first.
5287 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5288 kvm_unload_vcpu_mmu(vcpu
);
5289 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5290 kvm_arch_vcpu_free(vcpu
);
5292 mutex_lock(&kvm
->lock
);
5293 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
5294 kvm
->vcpus
[i
] = NULL
;
5296 atomic_set(&kvm
->online_vcpus
, 0);
5297 mutex_unlock(&kvm
->lock
);
5300 void kvm_arch_sync_events(struct kvm
*kvm
)
5302 kvm_free_all_assigned_devices(kvm
);
5305 void kvm_arch_destroy_vm(struct kvm
*kvm
)
5307 kvm_iommu_unmap_guest(kvm
);
5309 kfree(kvm
->arch
.vpic
);
5310 kfree(kvm
->arch
.vioapic
);
5311 kvm_free_vcpus(kvm
);
5312 kvm_free_physmem(kvm
);
5313 if (kvm
->arch
.apic_access_page
)
5314 put_page(kvm
->arch
.apic_access_page
);
5315 if (kvm
->arch
.ept_identity_pagetable
)
5316 put_page(kvm
->arch
.ept_identity_pagetable
);
5317 kfree(kvm
->arch
.aliases
);
5321 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
5322 struct kvm_memory_slot
*memslot
,
5323 struct kvm_memory_slot old
,
5324 struct kvm_userspace_memory_region
*mem
,
5327 int npages
= memslot
->npages
;
5329 /*To keep backward compatibility with older userspace,
5330 *x86 needs to hanlde !user_alloc case.
5333 if (npages
&& !old
.rmap
) {
5334 unsigned long userspace_addr
;
5336 down_write(¤t
->mm
->mmap_sem
);
5337 userspace_addr
= do_mmap(NULL
, 0,
5339 PROT_READ
| PROT_WRITE
,
5340 MAP_PRIVATE
| MAP_ANONYMOUS
,
5342 up_write(¤t
->mm
->mmap_sem
);
5344 if (IS_ERR((void *)userspace_addr
))
5345 return PTR_ERR((void *)userspace_addr
);
5347 memslot
->userspace_addr
= userspace_addr
;
5355 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
5356 struct kvm_userspace_memory_region
*mem
,
5357 struct kvm_memory_slot old
,
5361 int npages
= mem
->memory_size
>> PAGE_SHIFT
;
5363 if (!user_alloc
&& !old
.user_alloc
&& old
.rmap
&& !npages
) {
5366 down_write(¤t
->mm
->mmap_sem
);
5367 ret
= do_munmap(current
->mm
, old
.userspace_addr
,
5368 old
.npages
* PAGE_SIZE
);
5369 up_write(¤t
->mm
->mmap_sem
);
5372 "kvm_vm_ioctl_set_memory_region: "
5373 "failed to munmap memory\n");
5376 spin_lock(&kvm
->mmu_lock
);
5377 if (!kvm
->arch
.n_requested_mmu_pages
) {
5378 unsigned int nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
5379 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
5382 kvm_mmu_slot_remove_write_access(kvm
, mem
->slot
);
5383 spin_unlock(&kvm
->mmu_lock
);
5386 void kvm_arch_flush_shadow(struct kvm
*kvm
)
5388 kvm_mmu_zap_all(kvm
);
5389 kvm_reload_remote_mmus(kvm
);
5392 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
5394 return vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
5395 || vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
5396 || vcpu
->arch
.nmi_pending
||
5397 (kvm_arch_interrupt_allowed(vcpu
) &&
5398 kvm_cpu_has_interrupt(vcpu
));
5401 void kvm_vcpu_kick(struct kvm_vcpu
*vcpu
)
5404 int cpu
= vcpu
->cpu
;
5406 if (waitqueue_active(&vcpu
->wq
)) {
5407 wake_up_interruptible(&vcpu
->wq
);
5408 ++vcpu
->stat
.halt_wakeup
;
5412 if (cpu
!= me
&& (unsigned)cpu
< nr_cpu_ids
&& cpu_online(cpu
))
5413 if (!test_and_set_bit(KVM_REQ_KICK
, &vcpu
->requests
))
5414 smp_send_reschedule(cpu
);
5418 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
5420 return kvm_x86_ops
->interrupt_allowed(vcpu
);
5423 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
5425 unsigned long rflags
;
5427 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5428 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
5429 rflags
&= ~(unsigned long)(X86_EFLAGS_TF
| X86_EFLAGS_RF
);
5432 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
5434 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
5436 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
5437 vcpu
->arch
.singlestep_cs
==
5438 get_segment_selector(vcpu
, VCPU_SREG_CS
) &&
5439 vcpu
->arch
.singlestep_rip
== kvm_rip_read(vcpu
))
5440 rflags
|= X86_EFLAGS_TF
| X86_EFLAGS_RF
;
5441 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
5443 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
5445 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
5446 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
5447 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
5448 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
5449 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
5450 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
5451 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
5452 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
5453 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
5454 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
5455 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);