2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
21 #include <linux/kvm_host.h>
26 #include "kvm_cache_regs.h"
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
33 #include <linux/vmalloc.h>
34 #include <linux/module.h>
35 #include <linux/mman.h>
36 #include <linux/highmem.h>
37 #include <linux/iommu.h>
38 #include <linux/intel-iommu.h>
39 #include <linux/cpufreq.h>
40 #include <linux/user-return-notifier.h>
41 #include <trace/events/kvm.h>
42 #undef TRACE_INCLUDE_FILE
43 #define CREATE_TRACE_POINTS
46 #include <asm/debugreg.h>
47 #include <asm/uaccess.h>
53 #define MAX_IO_MSRS 256
54 #define CR0_RESERVED_BITS \
55 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
56 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
57 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
58 #define CR4_RESERVED_BITS \
59 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
60 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
61 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
62 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
64 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
66 #define KVM_MAX_MCE_BANKS 32
67 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
70 * - enable syscall per default because its emulated by KVM
71 * - enable LME and LMA per default on 64 bit KVM
74 static u64 __read_mostly efer_reserved_bits
= 0xfffffffffffffafeULL
;
76 static u64 __read_mostly efer_reserved_bits
= 0xfffffffffffffffeULL
;
79 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
80 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
82 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
83 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2
*cpuid
,
84 struct kvm_cpuid_entry2 __user
*entries
);
86 struct kvm_x86_ops
*kvm_x86_ops
;
87 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
90 module_param_named(ignore_msrs
, ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
92 #define KVM_NR_SHARED_MSRS 16
94 struct kvm_shared_msrs_global
{
96 u32 msrs
[KVM_NR_SHARED_MSRS
];
99 struct kvm_shared_msrs
{
100 struct user_return_notifier urn
;
102 struct kvm_shared_msr_values
{
105 } values
[KVM_NR_SHARED_MSRS
];
108 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
109 static DEFINE_PER_CPU(struct kvm_shared_msrs
, shared_msrs
);
111 struct kvm_stats_debugfs_item debugfs_entries
[] = {
112 { "pf_fixed", VCPU_STAT(pf_fixed
) },
113 { "pf_guest", VCPU_STAT(pf_guest
) },
114 { "tlb_flush", VCPU_STAT(tlb_flush
) },
115 { "invlpg", VCPU_STAT(invlpg
) },
116 { "exits", VCPU_STAT(exits
) },
117 { "io_exits", VCPU_STAT(io_exits
) },
118 { "mmio_exits", VCPU_STAT(mmio_exits
) },
119 { "signal_exits", VCPU_STAT(signal_exits
) },
120 { "irq_window", VCPU_STAT(irq_window_exits
) },
121 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
122 { "halt_exits", VCPU_STAT(halt_exits
) },
123 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
124 { "hypercalls", VCPU_STAT(hypercalls
) },
125 { "request_irq", VCPU_STAT(request_irq_exits
) },
126 { "irq_exits", VCPU_STAT(irq_exits
) },
127 { "host_state_reload", VCPU_STAT(host_state_reload
) },
128 { "efer_reload", VCPU_STAT(efer_reload
) },
129 { "fpu_reload", VCPU_STAT(fpu_reload
) },
130 { "insn_emulation", VCPU_STAT(insn_emulation
) },
131 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
132 { "irq_injections", VCPU_STAT(irq_injections
) },
133 { "nmi_injections", VCPU_STAT(nmi_injections
) },
134 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
135 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
136 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
137 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
138 { "mmu_flooded", VM_STAT(mmu_flooded
) },
139 { "mmu_recycled", VM_STAT(mmu_recycled
) },
140 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
141 { "mmu_unsync", VM_STAT(mmu_unsync
) },
142 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
143 { "largepages", VM_STAT(lpages
) },
147 static void kvm_on_user_return(struct user_return_notifier
*urn
)
150 struct kvm_shared_msrs
*locals
151 = container_of(urn
, struct kvm_shared_msrs
, urn
);
152 struct kvm_shared_msr_values
*values
;
154 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
155 values
= &locals
->values
[slot
];
156 if (values
->host
!= values
->curr
) {
157 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
158 values
->curr
= values
->host
;
161 locals
->registered
= false;
162 user_return_notifier_unregister(urn
);
165 static void shared_msr_update(unsigned slot
, u32 msr
)
167 struct kvm_shared_msrs
*smsr
;
170 smsr
= &__get_cpu_var(shared_msrs
);
171 /* only read, and nobody should modify it at this time,
172 * so don't need lock */
173 if (slot
>= shared_msrs_global
.nr
) {
174 printk(KERN_ERR
"kvm: invalid MSR slot!");
177 rdmsrl_safe(msr
, &value
);
178 smsr
->values
[slot
].host
= value
;
179 smsr
->values
[slot
].curr
= value
;
182 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
184 if (slot
>= shared_msrs_global
.nr
)
185 shared_msrs_global
.nr
= slot
+ 1;
186 shared_msrs_global
.msrs
[slot
] = msr
;
187 /* we need ensured the shared_msr_global have been updated */
190 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
192 static void kvm_shared_msr_cpu_online(void)
196 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
197 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
200 void kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
202 struct kvm_shared_msrs
*smsr
= &__get_cpu_var(shared_msrs
);
204 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
206 smsr
->values
[slot
].curr
= value
;
207 wrmsrl(shared_msrs_global
.msrs
[slot
], value
);
208 if (!smsr
->registered
) {
209 smsr
->urn
.on_user_return
= kvm_on_user_return
;
210 user_return_notifier_register(&smsr
->urn
);
211 smsr
->registered
= true;
214 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
216 static void drop_user_return_notifiers(void *ignore
)
218 struct kvm_shared_msrs
*smsr
= &__get_cpu_var(shared_msrs
);
220 if (smsr
->registered
)
221 kvm_on_user_return(&smsr
->urn
);
224 unsigned long segment_base(u16 selector
)
226 struct descriptor_table gdt
;
227 struct desc_struct
*d
;
228 unsigned long table_base
;
235 table_base
= gdt
.base
;
237 if (selector
& 4) { /* from ldt */
238 u16 ldt_selector
= kvm_read_ldt();
240 table_base
= segment_base(ldt_selector
);
242 d
= (struct desc_struct
*)(table_base
+ (selector
& ~7));
243 v
= get_desc_base(d
);
245 if (d
->s
== 0 && (d
->type
== 2 || d
->type
== 9 || d
->type
== 11))
246 v
|= ((unsigned long)((struct ldttss_desc64
*)d
)->base3
) << 32;
250 EXPORT_SYMBOL_GPL(segment_base
);
252 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
254 if (irqchip_in_kernel(vcpu
->kvm
))
255 return vcpu
->arch
.apic_base
;
257 return vcpu
->arch
.apic_base
;
259 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
261 void kvm_set_apic_base(struct kvm_vcpu
*vcpu
, u64 data
)
263 /* TODO: reserve bits check */
264 if (irqchip_in_kernel(vcpu
->kvm
))
265 kvm_lapic_set_base(vcpu
, data
);
267 vcpu
->arch
.apic_base
= data
;
269 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
271 #define EXCPT_BENIGN 0
272 #define EXCPT_CONTRIBUTORY 1
275 static int exception_class(int vector
)
285 return EXCPT_CONTRIBUTORY
;
292 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
293 unsigned nr
, bool has_error
, u32 error_code
)
298 if (!vcpu
->arch
.exception
.pending
) {
300 vcpu
->arch
.exception
.pending
= true;
301 vcpu
->arch
.exception
.has_error_code
= has_error
;
302 vcpu
->arch
.exception
.nr
= nr
;
303 vcpu
->arch
.exception
.error_code
= error_code
;
307 /* to check exception */
308 prev_nr
= vcpu
->arch
.exception
.nr
;
309 if (prev_nr
== DF_VECTOR
) {
310 /* triple fault -> shutdown */
311 set_bit(KVM_REQ_TRIPLE_FAULT
, &vcpu
->requests
);
314 class1
= exception_class(prev_nr
);
315 class2
= exception_class(nr
);
316 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
317 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
318 /* generate double fault per SDM Table 5-5 */
319 vcpu
->arch
.exception
.pending
= true;
320 vcpu
->arch
.exception
.has_error_code
= true;
321 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
322 vcpu
->arch
.exception
.error_code
= 0;
324 /* replace previous exception with a new one in a hope
325 that instruction re-execution will regenerate lost
330 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
332 kvm_multiple_exception(vcpu
, nr
, false, 0);
334 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
336 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, unsigned long addr
,
339 ++vcpu
->stat
.pf_guest
;
340 vcpu
->arch
.cr2
= addr
;
341 kvm_queue_exception_e(vcpu
, PF_VECTOR
, error_code
);
344 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
346 vcpu
->arch
.nmi_pending
= 1;
348 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
350 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
352 kvm_multiple_exception(vcpu
, nr
, true, error_code
);
354 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
357 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
358 * a #GP and return false.
360 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
362 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
364 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
367 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
370 * Load the pae pdptrs. Return true is they are all valid.
372 int load_pdptrs(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
374 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
375 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
378 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.pdptrs
)];
380 ret
= kvm_read_guest_page(vcpu
->kvm
, pdpt_gfn
, pdpte
,
381 offset
* sizeof(u64
), sizeof(pdpte
));
386 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
387 if (is_present_gpte(pdpte
[i
]) &&
388 (pdpte
[i
] & vcpu
->arch
.mmu
.rsvd_bits_mask
[0][2])) {
395 memcpy(vcpu
->arch
.pdptrs
, pdpte
, sizeof(vcpu
->arch
.pdptrs
));
396 __set_bit(VCPU_EXREG_PDPTR
,
397 (unsigned long *)&vcpu
->arch
.regs_avail
);
398 __set_bit(VCPU_EXREG_PDPTR
,
399 (unsigned long *)&vcpu
->arch
.regs_dirty
);
404 EXPORT_SYMBOL_GPL(load_pdptrs
);
406 static bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
408 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.pdptrs
)];
412 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
415 if (!test_bit(VCPU_EXREG_PDPTR
,
416 (unsigned long *)&vcpu
->arch
.regs_avail
))
419 r
= kvm_read_guest(vcpu
->kvm
, vcpu
->arch
.cr3
& ~31u, pdpte
, sizeof(pdpte
));
422 changed
= memcmp(pdpte
, vcpu
->arch
.pdptrs
, sizeof(pdpte
)) != 0;
428 void kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
430 if (cr0
& CR0_RESERVED_BITS
) {
431 printk(KERN_DEBUG
"set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
432 cr0
, vcpu
->arch
.cr0
);
433 kvm_inject_gp(vcpu
, 0);
437 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
)) {
438 printk(KERN_DEBUG
"set_cr0: #GP, CD == 0 && NW == 1\n");
439 kvm_inject_gp(vcpu
, 0);
443 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
)) {
444 printk(KERN_DEBUG
"set_cr0: #GP, set PG flag "
445 "and a clear PE flag\n");
446 kvm_inject_gp(vcpu
, 0);
450 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
452 if ((vcpu
->arch
.shadow_efer
& EFER_LME
)) {
456 printk(KERN_DEBUG
"set_cr0: #GP, start paging "
457 "in long mode while PAE is disabled\n");
458 kvm_inject_gp(vcpu
, 0);
461 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
463 printk(KERN_DEBUG
"set_cr0: #GP, start paging "
464 "in long mode while CS.L == 1\n");
465 kvm_inject_gp(vcpu
, 0);
471 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.cr3
)) {
472 printk(KERN_DEBUG
"set_cr0: #GP, pdptrs "
474 kvm_inject_gp(vcpu
, 0);
480 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
481 vcpu
->arch
.cr0
= cr0
;
483 kvm_mmu_reset_context(vcpu
);
486 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
488 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
490 kvm_set_cr0(vcpu
, (vcpu
->arch
.cr0
& ~0x0ful
) | (msw
& 0x0f));
492 EXPORT_SYMBOL_GPL(kvm_lmsw
);
494 void kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
496 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
497 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
;
499 if (cr4
& CR4_RESERVED_BITS
) {
500 printk(KERN_DEBUG
"set_cr4: #GP, reserved bits\n");
501 kvm_inject_gp(vcpu
, 0);
505 if (is_long_mode(vcpu
)) {
506 if (!(cr4
& X86_CR4_PAE
)) {
507 printk(KERN_DEBUG
"set_cr4: #GP, clearing PAE while "
509 kvm_inject_gp(vcpu
, 0);
512 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
513 && ((cr4
^ old_cr4
) & pdptr_bits
)
514 && !load_pdptrs(vcpu
, vcpu
->arch
.cr3
)) {
515 printk(KERN_DEBUG
"set_cr4: #GP, pdptrs reserved bits\n");
516 kvm_inject_gp(vcpu
, 0);
520 if (cr4
& X86_CR4_VMXE
) {
521 printk(KERN_DEBUG
"set_cr4: #GP, setting VMXE\n");
522 kvm_inject_gp(vcpu
, 0);
525 kvm_x86_ops
->set_cr4(vcpu
, cr4
);
526 vcpu
->arch
.cr4
= cr4
;
527 vcpu
->arch
.mmu
.base_role
.cr4_pge
= (cr4
& X86_CR4_PGE
) && !tdp_enabled
;
528 kvm_mmu_reset_context(vcpu
);
530 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
532 void kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
534 if (cr3
== vcpu
->arch
.cr3
&& !pdptrs_changed(vcpu
)) {
535 kvm_mmu_sync_roots(vcpu
);
536 kvm_mmu_flush_tlb(vcpu
);
540 if (is_long_mode(vcpu
)) {
541 if (cr3
& CR3_L_MODE_RESERVED_BITS
) {
542 printk(KERN_DEBUG
"set_cr3: #GP, reserved bits\n");
543 kvm_inject_gp(vcpu
, 0);
548 if (cr3
& CR3_PAE_RESERVED_BITS
) {
550 "set_cr3: #GP, reserved bits\n");
551 kvm_inject_gp(vcpu
, 0);
554 if (is_paging(vcpu
) && !load_pdptrs(vcpu
, cr3
)) {
555 printk(KERN_DEBUG
"set_cr3: #GP, pdptrs "
557 kvm_inject_gp(vcpu
, 0);
562 * We don't check reserved bits in nonpae mode, because
563 * this isn't enforced, and VMware depends on this.
568 * Does the new cr3 value map to physical memory? (Note, we
569 * catch an invalid cr3 even in real-mode, because it would
570 * cause trouble later on when we turn on paging anyway.)
572 * A real CPU would silently accept an invalid cr3 and would
573 * attempt to use it - with largely undefined (and often hard
574 * to debug) behavior on the guest side.
576 if (unlikely(!gfn_to_memslot(vcpu
->kvm
, cr3
>> PAGE_SHIFT
)))
577 kvm_inject_gp(vcpu
, 0);
579 vcpu
->arch
.cr3
= cr3
;
580 vcpu
->arch
.mmu
.new_cr3(vcpu
);
583 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
585 void kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
587 if (cr8
& CR8_RESERVED_BITS
) {
588 printk(KERN_DEBUG
"set_cr8: #GP, reserved bits 0x%lx\n", cr8
);
589 kvm_inject_gp(vcpu
, 0);
592 if (irqchip_in_kernel(vcpu
->kvm
))
593 kvm_lapic_set_tpr(vcpu
, cr8
);
595 vcpu
->arch
.cr8
= cr8
;
597 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
599 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
601 if (irqchip_in_kernel(vcpu
->kvm
))
602 return kvm_lapic_get_cr8(vcpu
);
604 return vcpu
->arch
.cr8
;
606 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
608 static inline u32
bit(int bitno
)
610 return 1 << (bitno
& 31);
614 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
615 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
617 * This list is modified at module load time to reflect the
618 * capabilities of the host cpu. This capabilities test skips MSRs that are
619 * kvm-specific. Those are put in the beginning of the list.
622 #define KVM_SAVE_MSRS_BEGIN 2
623 static u32 msrs_to_save
[] = {
624 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
625 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
628 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
630 MSR_IA32_TSC
, MSR_IA32_PERF_STATUS
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
633 static unsigned num_msrs_to_save
;
635 static u32 emulated_msrs
[] = {
636 MSR_IA32_MISC_ENABLE
,
639 static void set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
641 if (efer
& efer_reserved_bits
) {
642 printk(KERN_DEBUG
"set_efer: 0x%llx #GP, reserved bits\n",
644 kvm_inject_gp(vcpu
, 0);
649 && (vcpu
->arch
.shadow_efer
& EFER_LME
) != (efer
& EFER_LME
)) {
650 printk(KERN_DEBUG
"set_efer: #GP, change LME while paging\n");
651 kvm_inject_gp(vcpu
, 0);
655 if (efer
& EFER_FFXSR
) {
656 struct kvm_cpuid_entry2
*feat
;
658 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
659 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
))) {
660 printk(KERN_DEBUG
"set_efer: #GP, enable FFXSR w/o CPUID capability\n");
661 kvm_inject_gp(vcpu
, 0);
666 if (efer
& EFER_SVME
) {
667 struct kvm_cpuid_entry2
*feat
;
669 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
670 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
))) {
671 printk(KERN_DEBUG
"set_efer: #GP, enable SVM w/o SVM\n");
672 kvm_inject_gp(vcpu
, 0);
677 kvm_x86_ops
->set_efer(vcpu
, efer
);
680 efer
|= vcpu
->arch
.shadow_efer
& EFER_LMA
;
682 vcpu
->arch
.shadow_efer
= efer
;
684 vcpu
->arch
.mmu
.base_role
.nxe
= (efer
& EFER_NX
) && !tdp_enabled
;
685 kvm_mmu_reset_context(vcpu
);
688 void kvm_enable_efer_bits(u64 mask
)
690 efer_reserved_bits
&= ~mask
;
692 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
696 * Writes msr value into into the appropriate "register".
697 * Returns 0 on success, non-0 otherwise.
698 * Assumes vcpu_load() was already called.
700 int kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64 data
)
702 return kvm_x86_ops
->set_msr(vcpu
, msr_index
, data
);
706 * Adapt set_msr() to msr_io()'s calling convention
708 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
710 return kvm_set_msr(vcpu
, index
, *data
);
713 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
716 struct pvclock_wall_clock wc
;
717 struct timespec boot
;
724 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
727 * The guest calculates current wall clock time by adding
728 * system time (updated by kvm_write_guest_time below) to the
729 * wall clock specified here. guest system time equals host
730 * system time for us, thus we must fill in host boot time here.
734 wc
.sec
= boot
.tv_sec
;
735 wc
.nsec
= boot
.tv_nsec
;
736 wc
.version
= version
;
738 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
741 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
744 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
746 uint32_t quotient
, remainder
;
748 /* Don't try to replace with do_div(), this one calculates
749 * "(dividend << 32) / divisor" */
751 : "=a" (quotient
), "=d" (remainder
)
752 : "0" (0), "1" (dividend
), "r" (divisor
) );
756 static void kvm_set_time_scale(uint32_t tsc_khz
, struct pvclock_vcpu_time_info
*hv_clock
)
758 uint64_t nsecs
= 1000000000LL;
763 tps64
= tsc_khz
* 1000LL;
764 while (tps64
> nsecs
*2) {
769 tps32
= (uint32_t)tps64
;
770 while (tps32
<= (uint32_t)nsecs
) {
775 hv_clock
->tsc_shift
= shift
;
776 hv_clock
->tsc_to_system_mul
= div_frac(nsecs
, tps32
);
778 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
779 __func__
, tsc_khz
, hv_clock
->tsc_shift
,
780 hv_clock
->tsc_to_system_mul
);
783 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
785 static void kvm_write_guest_time(struct kvm_vcpu
*v
)
789 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
791 unsigned long this_tsc_khz
;
793 if ((!vcpu
->time_page
))
796 this_tsc_khz
= get_cpu_var(cpu_tsc_khz
);
797 if (unlikely(vcpu
->hv_clock_tsc_khz
!= this_tsc_khz
)) {
798 kvm_set_time_scale(this_tsc_khz
, &vcpu
->hv_clock
);
799 vcpu
->hv_clock_tsc_khz
= this_tsc_khz
;
801 put_cpu_var(cpu_tsc_khz
);
803 /* Keep irq disabled to prevent changes to the clock */
804 local_irq_save(flags
);
805 kvm_get_msr(v
, MSR_IA32_TSC
, &vcpu
->hv_clock
.tsc_timestamp
);
807 monotonic_to_bootbased(&ts
);
808 local_irq_restore(flags
);
810 /* With all the info we got, fill in the values */
812 vcpu
->hv_clock
.system_time
= ts
.tv_nsec
+
813 (NSEC_PER_SEC
* (u64
)ts
.tv_sec
) + v
->kvm
->arch
.kvmclock_offset
;
816 * The interface expects us to write an even number signaling that the
817 * update is finished. Since the guest won't see the intermediate
818 * state, we just increase by 2 at the end.
820 vcpu
->hv_clock
.version
+= 2;
822 shared_kaddr
= kmap_atomic(vcpu
->time_page
, KM_USER0
);
824 memcpy(shared_kaddr
+ vcpu
->time_offset
, &vcpu
->hv_clock
,
825 sizeof(vcpu
->hv_clock
));
827 kunmap_atomic(shared_kaddr
, KM_USER0
);
829 mark_page_dirty(v
->kvm
, vcpu
->time
>> PAGE_SHIFT
);
832 static int kvm_request_guest_time_update(struct kvm_vcpu
*v
)
834 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
836 if (!vcpu
->time_page
)
838 set_bit(KVM_REQ_KVMCLOCK_UPDATE
, &v
->requests
);
842 static bool msr_mtrr_valid(unsigned msr
)
845 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR
- 1:
846 case MSR_MTRRfix64K_00000
:
847 case MSR_MTRRfix16K_80000
:
848 case MSR_MTRRfix16K_A0000
:
849 case MSR_MTRRfix4K_C0000
:
850 case MSR_MTRRfix4K_C8000
:
851 case MSR_MTRRfix4K_D0000
:
852 case MSR_MTRRfix4K_D8000
:
853 case MSR_MTRRfix4K_E0000
:
854 case MSR_MTRRfix4K_E8000
:
855 case MSR_MTRRfix4K_F0000
:
856 case MSR_MTRRfix4K_F8000
:
857 case MSR_MTRRdefType
:
858 case MSR_IA32_CR_PAT
:
866 static bool valid_pat_type(unsigned t
)
868 return t
< 8 && (1 << t
) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
871 static bool valid_mtrr_type(unsigned t
)
873 return t
< 8 && (1 << t
) & 0x73; /* 0, 1, 4, 5, 6 */
876 static bool mtrr_valid(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
880 if (!msr_mtrr_valid(msr
))
883 if (msr
== MSR_IA32_CR_PAT
) {
884 for (i
= 0; i
< 8; i
++)
885 if (!valid_pat_type((data
>> (i
* 8)) & 0xff))
888 } else if (msr
== MSR_MTRRdefType
) {
891 return valid_mtrr_type(data
& 0xff);
892 } else if (msr
>= MSR_MTRRfix64K_00000
&& msr
<= MSR_MTRRfix4K_F8000
) {
893 for (i
= 0; i
< 8 ; i
++)
894 if (!valid_mtrr_type((data
>> (i
* 8)) & 0xff))
900 return valid_mtrr_type(data
& 0xff);
903 static int set_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
905 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
907 if (!mtrr_valid(vcpu
, msr
, data
))
910 if (msr
== MSR_MTRRdefType
) {
911 vcpu
->arch
.mtrr_state
.def_type
= data
;
912 vcpu
->arch
.mtrr_state
.enabled
= (data
& 0xc00) >> 10;
913 } else if (msr
== MSR_MTRRfix64K_00000
)
915 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
916 p
[1 + msr
- MSR_MTRRfix16K_80000
] = data
;
917 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
918 p
[3 + msr
- MSR_MTRRfix4K_C0000
] = data
;
919 else if (msr
== MSR_IA32_CR_PAT
)
920 vcpu
->arch
.pat
= data
;
921 else { /* Variable MTRRs */
922 int idx
, is_mtrr_mask
;
925 idx
= (msr
- 0x200) / 2;
926 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
929 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
932 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
936 kvm_mmu_reset_context(vcpu
);
940 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
942 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
943 unsigned bank_num
= mcg_cap
& 0xff;
946 case MSR_IA32_MCG_STATUS
:
947 vcpu
->arch
.mcg_status
= data
;
949 case MSR_IA32_MCG_CTL
:
950 if (!(mcg_cap
& MCG_CTL_P
))
952 if (data
!= 0 && data
!= ~(u64
)0)
954 vcpu
->arch
.mcg_ctl
= data
;
957 if (msr
>= MSR_IA32_MC0_CTL
&&
958 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
959 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
960 /* only 0 or all 1s can be written to IA32_MCi_CTL */
961 if ((offset
& 0x3) == 0 &&
962 data
!= 0 && data
!= ~(u64
)0)
964 vcpu
->arch
.mce_banks
[offset
] = data
;
972 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
974 struct kvm
*kvm
= vcpu
->kvm
;
975 int lm
= is_long_mode(vcpu
);
976 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
977 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
978 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
979 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
980 u32 page_num
= data
& ~PAGE_MASK
;
981 u64 page_addr
= data
& PAGE_MASK
;
986 if (page_num
>= blob_size
)
989 page
= kzalloc(PAGE_SIZE
, GFP_KERNEL
);
993 if (copy_from_user(page
, blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
))
995 if (kvm_write_guest(kvm
, page_addr
, page
, PAGE_SIZE
))
1004 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1008 set_efer(vcpu
, data
);
1011 data
&= ~(u64
)0x40; /* ignore flush filter disable */
1013 pr_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
1018 case MSR_FAM10H_MMIO_CONF_BASE
:
1020 pr_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
1025 case MSR_AMD64_NB_CFG
:
1027 case MSR_IA32_DEBUGCTLMSR
:
1029 /* We support the non-activated case already */
1031 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
1032 /* Values other than LBR and BTF are vendor-specific,
1033 thus reserved and should throw a #GP */
1036 pr_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1039 case MSR_IA32_UCODE_REV
:
1040 case MSR_IA32_UCODE_WRITE
:
1041 case MSR_VM_HSAVE_PA
:
1042 case MSR_AMD64_PATCH_LOADER
:
1044 case 0x200 ... 0x2ff:
1045 return set_msr_mtrr(vcpu
, msr
, data
);
1046 case MSR_IA32_APICBASE
:
1047 kvm_set_apic_base(vcpu
, data
);
1049 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
1050 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
1051 case MSR_IA32_MISC_ENABLE
:
1052 vcpu
->arch
.ia32_misc_enable_msr
= data
;
1054 case MSR_KVM_WALL_CLOCK
:
1055 vcpu
->kvm
->arch
.wall_clock
= data
;
1056 kvm_write_wall_clock(vcpu
->kvm
, data
);
1058 case MSR_KVM_SYSTEM_TIME
: {
1059 if (vcpu
->arch
.time_page
) {
1060 kvm_release_page_dirty(vcpu
->arch
.time_page
);
1061 vcpu
->arch
.time_page
= NULL
;
1064 vcpu
->arch
.time
= data
;
1066 /* we verify if the enable bit is set... */
1070 /* ...but clean it before doing the actual write */
1071 vcpu
->arch
.time_offset
= data
& ~(PAGE_MASK
| 1);
1073 vcpu
->arch
.time_page
=
1074 gfn_to_page(vcpu
->kvm
, data
>> PAGE_SHIFT
);
1076 if (is_error_page(vcpu
->arch
.time_page
)) {
1077 kvm_release_page_clean(vcpu
->arch
.time_page
);
1078 vcpu
->arch
.time_page
= NULL
;
1081 kvm_request_guest_time_update(vcpu
);
1084 case MSR_IA32_MCG_CTL
:
1085 case MSR_IA32_MCG_STATUS
:
1086 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
1087 return set_msr_mce(vcpu
, msr
, data
);
1089 /* Performance counters are not protected by a CPUID bit,
1090 * so we should check all of them in the generic path for the sake of
1091 * cross vendor migration.
1092 * Writing a zero into the event select MSRs disables them,
1093 * which we perfectly emulate ;-). Any other value should be at least
1094 * reported, some guests depend on them.
1096 case MSR_P6_EVNTSEL0
:
1097 case MSR_P6_EVNTSEL1
:
1098 case MSR_K7_EVNTSEL0
:
1099 case MSR_K7_EVNTSEL1
:
1100 case MSR_K7_EVNTSEL2
:
1101 case MSR_K7_EVNTSEL3
:
1103 pr_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
1104 "0x%x data 0x%llx\n", msr
, data
);
1106 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1107 * so we ignore writes to make it happy.
1109 case MSR_P6_PERFCTR0
:
1110 case MSR_P6_PERFCTR1
:
1111 case MSR_K7_PERFCTR0
:
1112 case MSR_K7_PERFCTR1
:
1113 case MSR_K7_PERFCTR2
:
1114 case MSR_K7_PERFCTR3
:
1115 pr_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
1116 "0x%x data 0x%llx\n", msr
, data
);
1119 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
1120 return xen_hvm_config(vcpu
, data
);
1122 pr_unimpl(vcpu
, "unhandled wrmsr: 0x%x data %llx\n",
1126 pr_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n",
1133 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
1137 * Reads an msr value (of 'msr_index') into 'pdata'.
1138 * Returns 0 on success, non-0 otherwise.
1139 * Assumes vcpu_load() was already called.
1141 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
1143 return kvm_x86_ops
->get_msr(vcpu
, msr_index
, pdata
);
1146 static int get_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1148 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
1150 if (!msr_mtrr_valid(msr
))
1153 if (msr
== MSR_MTRRdefType
)
1154 *pdata
= vcpu
->arch
.mtrr_state
.def_type
+
1155 (vcpu
->arch
.mtrr_state
.enabled
<< 10);
1156 else if (msr
== MSR_MTRRfix64K_00000
)
1158 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
1159 *pdata
= p
[1 + msr
- MSR_MTRRfix16K_80000
];
1160 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
1161 *pdata
= p
[3 + msr
- MSR_MTRRfix4K_C0000
];
1162 else if (msr
== MSR_IA32_CR_PAT
)
1163 *pdata
= vcpu
->arch
.pat
;
1164 else { /* Variable MTRRs */
1165 int idx
, is_mtrr_mask
;
1168 idx
= (msr
- 0x200) / 2;
1169 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
1172 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
1175 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
1182 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1185 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1186 unsigned bank_num
= mcg_cap
& 0xff;
1189 case MSR_IA32_P5_MC_ADDR
:
1190 case MSR_IA32_P5_MC_TYPE
:
1193 case MSR_IA32_MCG_CAP
:
1194 data
= vcpu
->arch
.mcg_cap
;
1196 case MSR_IA32_MCG_CTL
:
1197 if (!(mcg_cap
& MCG_CTL_P
))
1199 data
= vcpu
->arch
.mcg_ctl
;
1201 case MSR_IA32_MCG_STATUS
:
1202 data
= vcpu
->arch
.mcg_status
;
1205 if (msr
>= MSR_IA32_MC0_CTL
&&
1206 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
1207 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1208 data
= vcpu
->arch
.mce_banks
[offset
];
1217 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1222 case MSR_IA32_PLATFORM_ID
:
1223 case MSR_IA32_UCODE_REV
:
1224 case MSR_IA32_EBL_CR_POWERON
:
1225 case MSR_IA32_DEBUGCTLMSR
:
1226 case MSR_IA32_LASTBRANCHFROMIP
:
1227 case MSR_IA32_LASTBRANCHTOIP
:
1228 case MSR_IA32_LASTINTFROMIP
:
1229 case MSR_IA32_LASTINTTOIP
:
1232 case MSR_VM_HSAVE_PA
:
1233 case MSR_P6_PERFCTR0
:
1234 case MSR_P6_PERFCTR1
:
1235 case MSR_P6_EVNTSEL0
:
1236 case MSR_P6_EVNTSEL1
:
1237 case MSR_K7_EVNTSEL0
:
1238 case MSR_K7_PERFCTR0
:
1239 case MSR_K8_INT_PENDING_MSG
:
1240 case MSR_AMD64_NB_CFG
:
1241 case MSR_FAM10H_MMIO_CONF_BASE
:
1245 data
= 0x500 | KVM_NR_VAR_MTRR
;
1247 case 0x200 ... 0x2ff:
1248 return get_msr_mtrr(vcpu
, msr
, pdata
);
1249 case 0xcd: /* fsb frequency */
1252 case MSR_IA32_APICBASE
:
1253 data
= kvm_get_apic_base(vcpu
);
1255 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
1256 return kvm_x2apic_msr_read(vcpu
, msr
, pdata
);
1258 case MSR_IA32_MISC_ENABLE
:
1259 data
= vcpu
->arch
.ia32_misc_enable_msr
;
1261 case MSR_IA32_PERF_STATUS
:
1262 /* TSC increment by tick */
1264 /* CPU multiplier */
1265 data
|= (((uint64_t)4ULL) << 40);
1268 data
= vcpu
->arch
.shadow_efer
;
1270 case MSR_KVM_WALL_CLOCK
:
1271 data
= vcpu
->kvm
->arch
.wall_clock
;
1273 case MSR_KVM_SYSTEM_TIME
:
1274 data
= vcpu
->arch
.time
;
1276 case MSR_IA32_P5_MC_ADDR
:
1277 case MSR_IA32_P5_MC_TYPE
:
1278 case MSR_IA32_MCG_CAP
:
1279 case MSR_IA32_MCG_CTL
:
1280 case MSR_IA32_MCG_STATUS
:
1281 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
1282 return get_msr_mce(vcpu
, msr
, pdata
);
1285 pr_unimpl(vcpu
, "unhandled rdmsr: 0x%x\n", msr
);
1288 pr_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr
);
1296 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
1299 * Read or write a bunch of msrs. All parameters are kernel addresses.
1301 * @return number of msrs set successfully.
1303 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
1304 struct kvm_msr_entry
*entries
,
1305 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
1306 unsigned index
, u64
*data
))
1312 down_read(&vcpu
->kvm
->slots_lock
);
1313 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
1314 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
1316 up_read(&vcpu
->kvm
->slots_lock
);
1324 * Read or write a bunch of msrs. Parameters are user addresses.
1326 * @return number of msrs set successfully.
1328 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
1329 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
1330 unsigned index
, u64
*data
),
1333 struct kvm_msrs msrs
;
1334 struct kvm_msr_entry
*entries
;
1339 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
1343 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
1347 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
1348 entries
= vmalloc(size
);
1353 if (copy_from_user(entries
, user_msrs
->entries
, size
))
1356 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
1361 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
1372 int kvm_dev_ioctl_check_extension(long ext
)
1377 case KVM_CAP_IRQCHIP
:
1379 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
1380 case KVM_CAP_SET_TSS_ADDR
:
1381 case KVM_CAP_EXT_CPUID
:
1382 case KVM_CAP_CLOCKSOURCE
:
1384 case KVM_CAP_NOP_IO_DELAY
:
1385 case KVM_CAP_MP_STATE
:
1386 case KVM_CAP_SYNC_MMU
:
1387 case KVM_CAP_REINJECT_CONTROL
:
1388 case KVM_CAP_IRQ_INJECT_STATUS
:
1389 case KVM_CAP_ASSIGN_DEV_IRQ
:
1391 case KVM_CAP_IOEVENTFD
:
1393 case KVM_CAP_PIT_STATE2
:
1394 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
1395 case KVM_CAP_XEN_HVM
:
1396 case KVM_CAP_ADJUST_CLOCK
:
1397 case KVM_CAP_VCPU_EVENTS
:
1400 case KVM_CAP_COALESCED_MMIO
:
1401 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
1404 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
1406 case KVM_CAP_NR_VCPUS
:
1409 case KVM_CAP_NR_MEMSLOTS
:
1410 r
= KVM_MEMORY_SLOTS
;
1412 case KVM_CAP_PV_MMU
: /* obsolete */
1419 r
= KVM_MAX_MCE_BANKS
;
1429 long kvm_arch_dev_ioctl(struct file
*filp
,
1430 unsigned int ioctl
, unsigned long arg
)
1432 void __user
*argp
= (void __user
*)arg
;
1436 case KVM_GET_MSR_INDEX_LIST
: {
1437 struct kvm_msr_list __user
*user_msr_list
= argp
;
1438 struct kvm_msr_list msr_list
;
1442 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
1445 msr_list
.nmsrs
= num_msrs_to_save
+ ARRAY_SIZE(emulated_msrs
);
1446 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
1449 if (n
< msr_list
.nmsrs
)
1452 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
1453 num_msrs_to_save
* sizeof(u32
)))
1455 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
1457 ARRAY_SIZE(emulated_msrs
) * sizeof(u32
)))
1462 case KVM_GET_SUPPORTED_CPUID
: {
1463 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
1464 struct kvm_cpuid2 cpuid
;
1467 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
1469 r
= kvm_dev_ioctl_get_supported_cpuid(&cpuid
,
1470 cpuid_arg
->entries
);
1475 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
1480 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
1483 mce_cap
= KVM_MCE_CAP_SUPPORTED
;
1485 if (copy_to_user(argp
, &mce_cap
, sizeof mce_cap
))
1497 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
1499 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
1500 if (unlikely(per_cpu(cpu_tsc_khz
, cpu
) == 0)) {
1501 unsigned long khz
= cpufreq_quick_get(cpu
);
1504 per_cpu(cpu_tsc_khz
, cpu
) = khz
;
1506 kvm_request_guest_time_update(vcpu
);
1509 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
1511 kvm_x86_ops
->vcpu_put(vcpu
);
1512 kvm_put_guest_fpu(vcpu
);
1515 static int is_efer_nx(void)
1517 unsigned long long efer
= 0;
1519 rdmsrl_safe(MSR_EFER
, &efer
);
1520 return efer
& EFER_NX
;
1523 static void cpuid_fix_nx_cap(struct kvm_vcpu
*vcpu
)
1526 struct kvm_cpuid_entry2
*e
, *entry
;
1529 for (i
= 0; i
< vcpu
->arch
.cpuid_nent
; ++i
) {
1530 e
= &vcpu
->arch
.cpuid_entries
[i
];
1531 if (e
->function
== 0x80000001) {
1536 if (entry
&& (entry
->edx
& (1 << 20)) && !is_efer_nx()) {
1537 entry
->edx
&= ~(1 << 20);
1538 printk(KERN_INFO
"kvm: guest NX capability removed\n");
1542 /* when an old userspace process fills a new kernel module */
1543 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu
*vcpu
,
1544 struct kvm_cpuid
*cpuid
,
1545 struct kvm_cpuid_entry __user
*entries
)
1548 struct kvm_cpuid_entry
*cpuid_entries
;
1551 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
1554 cpuid_entries
= vmalloc(sizeof(struct kvm_cpuid_entry
) * cpuid
->nent
);
1558 if (copy_from_user(cpuid_entries
, entries
,
1559 cpuid
->nent
* sizeof(struct kvm_cpuid_entry
)))
1561 for (i
= 0; i
< cpuid
->nent
; i
++) {
1562 vcpu
->arch
.cpuid_entries
[i
].function
= cpuid_entries
[i
].function
;
1563 vcpu
->arch
.cpuid_entries
[i
].eax
= cpuid_entries
[i
].eax
;
1564 vcpu
->arch
.cpuid_entries
[i
].ebx
= cpuid_entries
[i
].ebx
;
1565 vcpu
->arch
.cpuid_entries
[i
].ecx
= cpuid_entries
[i
].ecx
;
1566 vcpu
->arch
.cpuid_entries
[i
].edx
= cpuid_entries
[i
].edx
;
1567 vcpu
->arch
.cpuid_entries
[i
].index
= 0;
1568 vcpu
->arch
.cpuid_entries
[i
].flags
= 0;
1569 vcpu
->arch
.cpuid_entries
[i
].padding
[0] = 0;
1570 vcpu
->arch
.cpuid_entries
[i
].padding
[1] = 0;
1571 vcpu
->arch
.cpuid_entries
[i
].padding
[2] = 0;
1573 vcpu
->arch
.cpuid_nent
= cpuid
->nent
;
1574 cpuid_fix_nx_cap(vcpu
);
1576 kvm_apic_set_version(vcpu
);
1577 kvm_x86_ops
->cpuid_update(vcpu
);
1580 vfree(cpuid_entries
);
1585 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu
*vcpu
,
1586 struct kvm_cpuid2
*cpuid
,
1587 struct kvm_cpuid_entry2 __user
*entries
)
1592 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
1595 if (copy_from_user(&vcpu
->arch
.cpuid_entries
, entries
,
1596 cpuid
->nent
* sizeof(struct kvm_cpuid_entry2
)))
1598 vcpu
->arch
.cpuid_nent
= cpuid
->nent
;
1599 kvm_apic_set_version(vcpu
);
1600 kvm_x86_ops
->cpuid_update(vcpu
);
1607 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu
*vcpu
,
1608 struct kvm_cpuid2
*cpuid
,
1609 struct kvm_cpuid_entry2 __user
*entries
)
1614 if (cpuid
->nent
< vcpu
->arch
.cpuid_nent
)
1617 if (copy_to_user(entries
, &vcpu
->arch
.cpuid_entries
,
1618 vcpu
->arch
.cpuid_nent
* sizeof(struct kvm_cpuid_entry2
)))
1623 cpuid
->nent
= vcpu
->arch
.cpuid_nent
;
1627 static void do_cpuid_1_ent(struct kvm_cpuid_entry2
*entry
, u32 function
,
1630 entry
->function
= function
;
1631 entry
->index
= index
;
1632 cpuid_count(entry
->function
, entry
->index
,
1633 &entry
->eax
, &entry
->ebx
, &entry
->ecx
, &entry
->edx
);
1637 #define F(x) bit(X86_FEATURE_##x)
1639 static void do_cpuid_ent(struct kvm_cpuid_entry2
*entry
, u32 function
,
1640 u32 index
, int *nent
, int maxnent
)
1642 unsigned f_nx
= is_efer_nx() ? F(NX
) : 0;
1643 unsigned f_gbpages
= kvm_x86_ops
->gb_page_enable() ? F(GBPAGES
) : 0;
1644 #ifdef CONFIG_X86_64
1645 unsigned f_lm
= F(LM
);
1649 unsigned f_rdtscp
= kvm_x86_ops
->rdtscp_supported() ? F(RDTSCP
) : 0;
1652 const u32 kvm_supported_word0_x86_features
=
1653 F(FPU
) | F(VME
) | F(DE
) | F(PSE
) |
1654 F(TSC
) | F(MSR
) | F(PAE
) | F(MCE
) |
1655 F(CX8
) | F(APIC
) | 0 /* Reserved */ | F(SEP
) |
1656 F(MTRR
) | F(PGE
) | F(MCA
) | F(CMOV
) |
1657 F(PAT
) | F(PSE36
) | 0 /* PSN */ | F(CLFLSH
) |
1658 0 /* Reserved, DS, ACPI */ | F(MMX
) |
1659 F(FXSR
) | F(XMM
) | F(XMM2
) | F(SELFSNOOP
) |
1660 0 /* HTT, TM, Reserved, PBE */;
1661 /* cpuid 0x80000001.edx */
1662 const u32 kvm_supported_word1_x86_features
=
1663 F(FPU
) | F(VME
) | F(DE
) | F(PSE
) |
1664 F(TSC
) | F(MSR
) | F(PAE
) | F(MCE
) |
1665 F(CX8
) | F(APIC
) | 0 /* Reserved */ | F(SYSCALL
) |
1666 F(MTRR
) | F(PGE
) | F(MCA
) | F(CMOV
) |
1667 F(PAT
) | F(PSE36
) | 0 /* Reserved */ |
1668 f_nx
| 0 /* Reserved */ | F(MMXEXT
) | F(MMX
) |
1669 F(FXSR
) | F(FXSR_OPT
) | f_gbpages
| f_rdtscp
|
1670 0 /* Reserved */ | f_lm
| F(3DNOWEXT
) | F(3DNOW
);
1672 const u32 kvm_supported_word4_x86_features
=
1673 F(XMM3
) | 0 /* Reserved, DTES64, MONITOR */ |
1674 0 /* DS-CPL, VMX, SMX, EST */ |
1675 0 /* TM2 */ | F(SSSE3
) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1676 0 /* Reserved */ | F(CX16
) | 0 /* xTPR Update, PDCM */ |
1677 0 /* Reserved, DCA */ | F(XMM4_1
) |
1678 F(XMM4_2
) | F(X2APIC
) | F(MOVBE
) | F(POPCNT
) |
1679 0 /* Reserved, XSAVE, OSXSAVE */;
1680 /* cpuid 0x80000001.ecx */
1681 const u32 kvm_supported_word6_x86_features
=
1682 F(LAHF_LM
) | F(CMP_LEGACY
) | F(SVM
) | 0 /* ExtApicSpace */ |
1683 F(CR8_LEGACY
) | F(ABM
) | F(SSE4A
) | F(MISALIGNSSE
) |
1684 F(3DNOWPREFETCH
) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5
) |
1685 0 /* SKINIT */ | 0 /* WDT */;
1687 /* all calls to cpuid_count() should be made on the same cpu */
1689 do_cpuid_1_ent(entry
, function
, index
);
1694 entry
->eax
= min(entry
->eax
, (u32
)0xb);
1697 entry
->edx
&= kvm_supported_word0_x86_features
;
1698 entry
->ecx
&= kvm_supported_word4_x86_features
;
1699 /* we support x2apic emulation even if host does not support
1700 * it since we emulate x2apic in software */
1701 entry
->ecx
|= F(X2APIC
);
1703 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1704 * may return different values. This forces us to get_cpu() before
1705 * issuing the first command, and also to emulate this annoying behavior
1706 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1708 int t
, times
= entry
->eax
& 0xff;
1710 entry
->flags
|= KVM_CPUID_FLAG_STATEFUL_FUNC
;
1711 entry
->flags
|= KVM_CPUID_FLAG_STATE_READ_NEXT
;
1712 for (t
= 1; t
< times
&& *nent
< maxnent
; ++t
) {
1713 do_cpuid_1_ent(&entry
[t
], function
, 0);
1714 entry
[t
].flags
|= KVM_CPUID_FLAG_STATEFUL_FUNC
;
1719 /* function 4 and 0xb have additional index. */
1723 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1724 /* read more entries until cache_type is zero */
1725 for (i
= 1; *nent
< maxnent
; ++i
) {
1726 cache_type
= entry
[i
- 1].eax
& 0x1f;
1729 do_cpuid_1_ent(&entry
[i
], function
, i
);
1731 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1739 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1740 /* read more entries until level_type is zero */
1741 for (i
= 1; *nent
< maxnent
; ++i
) {
1742 level_type
= entry
[i
- 1].ecx
& 0xff00;
1745 do_cpuid_1_ent(&entry
[i
], function
, i
);
1747 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1753 entry
->eax
= min(entry
->eax
, 0x8000001a);
1756 entry
->edx
&= kvm_supported_word1_x86_features
;
1757 entry
->ecx
&= kvm_supported_word6_x86_features
;
1765 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2
*cpuid
,
1766 struct kvm_cpuid_entry2 __user
*entries
)
1768 struct kvm_cpuid_entry2
*cpuid_entries
;
1769 int limit
, nent
= 0, r
= -E2BIG
;
1772 if (cpuid
->nent
< 1)
1774 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
1775 cpuid
->nent
= KVM_MAX_CPUID_ENTRIES
;
1777 cpuid_entries
= vmalloc(sizeof(struct kvm_cpuid_entry2
) * cpuid
->nent
);
1781 do_cpuid_ent(&cpuid_entries
[0], 0, 0, &nent
, cpuid
->nent
);
1782 limit
= cpuid_entries
[0].eax
;
1783 for (func
= 1; func
<= limit
&& nent
< cpuid
->nent
; ++func
)
1784 do_cpuid_ent(&cpuid_entries
[nent
], func
, 0,
1785 &nent
, cpuid
->nent
);
1787 if (nent
>= cpuid
->nent
)
1790 do_cpuid_ent(&cpuid_entries
[nent
], 0x80000000, 0, &nent
, cpuid
->nent
);
1791 limit
= cpuid_entries
[nent
- 1].eax
;
1792 for (func
= 0x80000001; func
<= limit
&& nent
< cpuid
->nent
; ++func
)
1793 do_cpuid_ent(&cpuid_entries
[nent
], func
, 0,
1794 &nent
, cpuid
->nent
);
1796 if (nent
>= cpuid
->nent
)
1800 if (copy_to_user(entries
, cpuid_entries
,
1801 nent
* sizeof(struct kvm_cpuid_entry2
)))
1807 vfree(cpuid_entries
);
1812 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
1813 struct kvm_lapic_state
*s
)
1816 memcpy(s
->regs
, vcpu
->arch
.apic
->regs
, sizeof *s
);
1822 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
1823 struct kvm_lapic_state
*s
)
1826 memcpy(vcpu
->arch
.apic
->regs
, s
->regs
, sizeof *s
);
1827 kvm_apic_post_state_restore(vcpu
);
1828 update_cr8_intercept(vcpu
);
1834 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
1835 struct kvm_interrupt
*irq
)
1837 if (irq
->irq
< 0 || irq
->irq
>= 256)
1839 if (irqchip_in_kernel(vcpu
->kvm
))
1843 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
1850 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
1853 kvm_inject_nmi(vcpu
);
1859 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
1860 struct kvm_tpr_access_ctl
*tac
)
1864 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
1868 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
1872 unsigned bank_num
= mcg_cap
& 0xff, bank
;
1875 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
1877 if (mcg_cap
& ~(KVM_MCE_CAP_SUPPORTED
| 0xff | 0xff0000))
1880 vcpu
->arch
.mcg_cap
= mcg_cap
;
1881 /* Init IA32_MCG_CTL to all 1s */
1882 if (mcg_cap
& MCG_CTL_P
)
1883 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
1884 /* Init IA32_MCi_CTL to all 1s */
1885 for (bank
= 0; bank
< bank_num
; bank
++)
1886 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
1891 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
1892 struct kvm_x86_mce
*mce
)
1894 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1895 unsigned bank_num
= mcg_cap
& 0xff;
1896 u64
*banks
= vcpu
->arch
.mce_banks
;
1898 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
1901 * if IA32_MCG_CTL is not all 1s, the uncorrected error
1902 * reporting is disabled
1904 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
1905 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
1907 banks
+= 4 * mce
->bank
;
1909 * if IA32_MCi_CTL is not all 1s, the uncorrected error
1910 * reporting is disabled for the bank
1912 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
1914 if (mce
->status
& MCI_STATUS_UC
) {
1915 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
1916 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
1917 printk(KERN_DEBUG
"kvm: set_mce: "
1918 "injects mce exception while "
1919 "previous one is in progress!\n");
1920 set_bit(KVM_REQ_TRIPLE_FAULT
, &vcpu
->requests
);
1923 if (banks
[1] & MCI_STATUS_VAL
)
1924 mce
->status
|= MCI_STATUS_OVER
;
1925 banks
[2] = mce
->addr
;
1926 banks
[3] = mce
->misc
;
1927 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
1928 banks
[1] = mce
->status
;
1929 kvm_queue_exception(vcpu
, MC_VECTOR
);
1930 } else if (!(banks
[1] & MCI_STATUS_VAL
)
1931 || !(banks
[1] & MCI_STATUS_UC
)) {
1932 if (banks
[1] & MCI_STATUS_VAL
)
1933 mce
->status
|= MCI_STATUS_OVER
;
1934 banks
[2] = mce
->addr
;
1935 banks
[3] = mce
->misc
;
1936 banks
[1] = mce
->status
;
1938 banks
[1] |= MCI_STATUS_OVER
;
1942 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
1943 struct kvm_vcpu_events
*events
)
1947 events
->exception
.injected
= vcpu
->arch
.exception
.pending
;
1948 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
1949 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
1950 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
1952 events
->interrupt
.injected
= vcpu
->arch
.interrupt
.pending
;
1953 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
1954 events
->interrupt
.soft
= vcpu
->arch
.interrupt
.soft
;
1956 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
1957 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
;
1958 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
1960 events
->sipi_vector
= vcpu
->arch
.sipi_vector
;
1962 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
1963 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
);
1968 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
1969 struct kvm_vcpu_events
*events
)
1971 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
1972 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
))
1977 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
1978 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
1979 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
1980 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
1982 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
1983 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
1984 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
1985 if (vcpu
->arch
.interrupt
.pending
&& irqchip_in_kernel(vcpu
->kvm
))
1986 kvm_pic_clear_isr_ack(vcpu
->kvm
);
1988 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
1989 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
1990 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
1991 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
1993 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
)
1994 vcpu
->arch
.sipi_vector
= events
->sipi_vector
;
2001 long kvm_arch_vcpu_ioctl(struct file
*filp
,
2002 unsigned int ioctl
, unsigned long arg
)
2004 struct kvm_vcpu
*vcpu
= filp
->private_data
;
2005 void __user
*argp
= (void __user
*)arg
;
2007 struct kvm_lapic_state
*lapic
= NULL
;
2010 case KVM_GET_LAPIC
: {
2012 if (!vcpu
->arch
.apic
)
2014 lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
2019 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, lapic
);
2023 if (copy_to_user(argp
, lapic
, sizeof(struct kvm_lapic_state
)))
2028 case KVM_SET_LAPIC
: {
2030 if (!vcpu
->arch
.apic
)
2032 lapic
= kmalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
2037 if (copy_from_user(lapic
, argp
, sizeof(struct kvm_lapic_state
)))
2039 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, lapic
);
2045 case KVM_INTERRUPT
: {
2046 struct kvm_interrupt irq
;
2049 if (copy_from_user(&irq
, argp
, sizeof irq
))
2051 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
2058 r
= kvm_vcpu_ioctl_nmi(vcpu
);
2064 case KVM_SET_CPUID
: {
2065 struct kvm_cpuid __user
*cpuid_arg
= argp
;
2066 struct kvm_cpuid cpuid
;
2069 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2071 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
2076 case KVM_SET_CPUID2
: {
2077 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2078 struct kvm_cpuid2 cpuid
;
2081 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2083 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
2084 cpuid_arg
->entries
);
2089 case KVM_GET_CPUID2
: {
2090 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2091 struct kvm_cpuid2 cpuid
;
2094 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2096 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
2097 cpuid_arg
->entries
);
2101 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2107 r
= msr_io(vcpu
, argp
, kvm_get_msr
, 1);
2110 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
2112 case KVM_TPR_ACCESS_REPORTING
: {
2113 struct kvm_tpr_access_ctl tac
;
2116 if (copy_from_user(&tac
, argp
, sizeof tac
))
2118 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
2122 if (copy_to_user(argp
, &tac
, sizeof tac
))
2127 case KVM_SET_VAPIC_ADDR
: {
2128 struct kvm_vapic_addr va
;
2131 if (!irqchip_in_kernel(vcpu
->kvm
))
2134 if (copy_from_user(&va
, argp
, sizeof va
))
2137 kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
2140 case KVM_X86_SETUP_MCE
: {
2144 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
2146 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
2149 case KVM_X86_SET_MCE
: {
2150 struct kvm_x86_mce mce
;
2153 if (copy_from_user(&mce
, argp
, sizeof mce
))
2155 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
2158 case KVM_GET_VCPU_EVENTS
: {
2159 struct kvm_vcpu_events events
;
2161 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
2164 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
2169 case KVM_SET_VCPU_EVENTS
: {
2170 struct kvm_vcpu_events events
;
2173 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
2176 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
2187 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
2191 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
2193 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
2197 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
2200 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
2204 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
2205 u32 kvm_nr_mmu_pages
)
2207 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
2210 down_write(&kvm
->slots_lock
);
2211 spin_lock(&kvm
->mmu_lock
);
2213 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
2214 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
2216 spin_unlock(&kvm
->mmu_lock
);
2217 up_write(&kvm
->slots_lock
);
2221 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
2223 return kvm
->arch
.n_alloc_mmu_pages
;
2226 gfn_t
unalias_gfn(struct kvm
*kvm
, gfn_t gfn
)
2229 struct kvm_mem_alias
*alias
;
2230 struct kvm_mem_aliases
*aliases
= kvm
->arch
.aliases
;
2232 for (i
= 0; i
< aliases
->naliases
; ++i
) {
2233 alias
= &aliases
->aliases
[i
];
2234 if (gfn
>= alias
->base_gfn
2235 && gfn
< alias
->base_gfn
+ alias
->npages
)
2236 return alias
->target_gfn
+ gfn
- alias
->base_gfn
;
2242 * Set a new alias region. Aliases map a portion of physical memory into
2243 * another portion. This is useful for memory windows, for example the PC
2246 static int kvm_vm_ioctl_set_memory_alias(struct kvm
*kvm
,
2247 struct kvm_memory_alias
*alias
)
2250 struct kvm_mem_alias
*p
;
2251 struct kvm_mem_aliases
*aliases
;
2254 /* General sanity checks */
2255 if (alias
->memory_size
& (PAGE_SIZE
- 1))
2257 if (alias
->guest_phys_addr
& (PAGE_SIZE
- 1))
2259 if (alias
->slot
>= KVM_ALIAS_SLOTS
)
2261 if (alias
->guest_phys_addr
+ alias
->memory_size
2262 < alias
->guest_phys_addr
)
2264 if (alias
->target_phys_addr
+ alias
->memory_size
2265 < alias
->target_phys_addr
)
2268 down_write(&kvm
->slots_lock
);
2269 spin_lock(&kvm
->mmu_lock
);
2271 aliases
= kvm
->arch
.aliases
;
2273 p
= &aliases
->aliases
[alias
->slot
];
2274 p
->base_gfn
= alias
->guest_phys_addr
>> PAGE_SHIFT
;
2275 p
->npages
= alias
->memory_size
>> PAGE_SHIFT
;
2276 p
->target_gfn
= alias
->target_phys_addr
>> PAGE_SHIFT
;
2278 for (n
= KVM_ALIAS_SLOTS
; n
> 0; --n
)
2279 if (aliases
->aliases
[n
- 1].npages
)
2281 aliases
->naliases
= n
;
2283 spin_unlock(&kvm
->mmu_lock
);
2284 kvm_mmu_zap_all(kvm
);
2286 up_write(&kvm
->slots_lock
);
2294 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
2299 switch (chip
->chip_id
) {
2300 case KVM_IRQCHIP_PIC_MASTER
:
2301 memcpy(&chip
->chip
.pic
,
2302 &pic_irqchip(kvm
)->pics
[0],
2303 sizeof(struct kvm_pic_state
));
2305 case KVM_IRQCHIP_PIC_SLAVE
:
2306 memcpy(&chip
->chip
.pic
,
2307 &pic_irqchip(kvm
)->pics
[1],
2308 sizeof(struct kvm_pic_state
));
2310 case KVM_IRQCHIP_IOAPIC
:
2311 r
= kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
2320 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
2325 switch (chip
->chip_id
) {
2326 case KVM_IRQCHIP_PIC_MASTER
:
2327 spin_lock(&pic_irqchip(kvm
)->lock
);
2328 memcpy(&pic_irqchip(kvm
)->pics
[0],
2330 sizeof(struct kvm_pic_state
));
2331 spin_unlock(&pic_irqchip(kvm
)->lock
);
2333 case KVM_IRQCHIP_PIC_SLAVE
:
2334 spin_lock(&pic_irqchip(kvm
)->lock
);
2335 memcpy(&pic_irqchip(kvm
)->pics
[1],
2337 sizeof(struct kvm_pic_state
));
2338 spin_unlock(&pic_irqchip(kvm
)->lock
);
2340 case KVM_IRQCHIP_IOAPIC
:
2341 r
= kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
2347 kvm_pic_update_irq(pic_irqchip(kvm
));
2351 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
2355 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2356 memcpy(ps
, &kvm
->arch
.vpit
->pit_state
, sizeof(struct kvm_pit_state
));
2357 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2361 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
2365 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2366 memcpy(&kvm
->arch
.vpit
->pit_state
, ps
, sizeof(struct kvm_pit_state
));
2367 kvm_pit_load_count(kvm
, 0, ps
->channels
[0].count
, 0);
2368 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2372 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
2376 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2377 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
2378 sizeof(ps
->channels
));
2379 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
2380 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2384 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
2386 int r
= 0, start
= 0;
2387 u32 prev_legacy
, cur_legacy
;
2388 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2389 prev_legacy
= kvm
->arch
.vpit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
2390 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
2391 if (!prev_legacy
&& cur_legacy
)
2393 memcpy(&kvm
->arch
.vpit
->pit_state
.channels
, &ps
->channels
,
2394 sizeof(kvm
->arch
.vpit
->pit_state
.channels
));
2395 kvm
->arch
.vpit
->pit_state
.flags
= ps
->flags
;
2396 kvm_pit_load_count(kvm
, 0, kvm
->arch
.vpit
->pit_state
.channels
[0].count
, start
);
2397 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2401 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
2402 struct kvm_reinject_control
*control
)
2404 if (!kvm
->arch
.vpit
)
2406 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2407 kvm
->arch
.vpit
->pit_state
.pit_timer
.reinject
= control
->pit_reinject
;
2408 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2413 * Get (and clear) the dirty memory log for a memory slot.
2415 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
,
2416 struct kvm_dirty_log
*log
)
2420 struct kvm_memory_slot
*memslot
;
2423 down_write(&kvm
->slots_lock
);
2425 r
= kvm_get_dirty_log(kvm
, log
, &is_dirty
);
2429 /* If nothing is dirty, don't bother messing with page tables. */
2431 spin_lock(&kvm
->mmu_lock
);
2432 kvm_mmu_slot_remove_write_access(kvm
, log
->slot
);
2433 spin_unlock(&kvm
->mmu_lock
);
2434 memslot
= &kvm
->memslots
->memslots
[log
->slot
];
2435 n
= ALIGN(memslot
->npages
, BITS_PER_LONG
) / 8;
2436 memset(memslot
->dirty_bitmap
, 0, n
);
2440 up_write(&kvm
->slots_lock
);
2444 long kvm_arch_vm_ioctl(struct file
*filp
,
2445 unsigned int ioctl
, unsigned long arg
)
2447 struct kvm
*kvm
= filp
->private_data
;
2448 void __user
*argp
= (void __user
*)arg
;
2451 * This union makes it completely explicit to gcc-3.x
2452 * that these two variables' stack usage should be
2453 * combined, not added together.
2456 struct kvm_pit_state ps
;
2457 struct kvm_pit_state2 ps2
;
2458 struct kvm_memory_alias alias
;
2459 struct kvm_pit_config pit_config
;
2463 case KVM_SET_TSS_ADDR
:
2464 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
2468 case KVM_SET_IDENTITY_MAP_ADDR
: {
2472 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
2474 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
2479 case KVM_SET_MEMORY_REGION
: {
2480 struct kvm_memory_region kvm_mem
;
2481 struct kvm_userspace_memory_region kvm_userspace_mem
;
2484 if (copy_from_user(&kvm_mem
, argp
, sizeof kvm_mem
))
2486 kvm_userspace_mem
.slot
= kvm_mem
.slot
;
2487 kvm_userspace_mem
.flags
= kvm_mem
.flags
;
2488 kvm_userspace_mem
.guest_phys_addr
= kvm_mem
.guest_phys_addr
;
2489 kvm_userspace_mem
.memory_size
= kvm_mem
.memory_size
;
2490 r
= kvm_vm_ioctl_set_memory_region(kvm
, &kvm_userspace_mem
, 0);
2495 case KVM_SET_NR_MMU_PAGES
:
2496 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
2500 case KVM_GET_NR_MMU_PAGES
:
2501 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
2503 case KVM_SET_MEMORY_ALIAS
:
2505 if (copy_from_user(&u
.alias
, argp
, sizeof(struct kvm_memory_alias
)))
2507 r
= kvm_vm_ioctl_set_memory_alias(kvm
, &u
.alias
);
2511 case KVM_CREATE_IRQCHIP
: {
2512 struct kvm_pic
*vpic
;
2514 mutex_lock(&kvm
->lock
);
2517 goto create_irqchip_unlock
;
2519 vpic
= kvm_create_pic(kvm
);
2521 r
= kvm_ioapic_init(kvm
);
2524 goto create_irqchip_unlock
;
2527 goto create_irqchip_unlock
;
2529 kvm
->arch
.vpic
= vpic
;
2531 r
= kvm_setup_default_irq_routing(kvm
);
2533 mutex_lock(&kvm
->irq_lock
);
2534 kfree(kvm
->arch
.vpic
);
2535 kfree(kvm
->arch
.vioapic
);
2536 kvm
->arch
.vpic
= NULL
;
2537 kvm
->arch
.vioapic
= NULL
;
2538 mutex_unlock(&kvm
->irq_lock
);
2540 create_irqchip_unlock
:
2541 mutex_unlock(&kvm
->lock
);
2544 case KVM_CREATE_PIT
:
2545 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
2547 case KVM_CREATE_PIT2
:
2549 if (copy_from_user(&u
.pit_config
, argp
,
2550 sizeof(struct kvm_pit_config
)))
2553 down_write(&kvm
->slots_lock
);
2556 goto create_pit_unlock
;
2558 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
2562 up_write(&kvm
->slots_lock
);
2564 case KVM_IRQ_LINE_STATUS
:
2565 case KVM_IRQ_LINE
: {
2566 struct kvm_irq_level irq_event
;
2569 if (copy_from_user(&irq_event
, argp
, sizeof irq_event
))
2571 if (irqchip_in_kernel(kvm
)) {
2573 status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
2574 irq_event
.irq
, irq_event
.level
);
2575 if (ioctl
== KVM_IRQ_LINE_STATUS
) {
2576 irq_event
.status
= status
;
2577 if (copy_to_user(argp
, &irq_event
,
2585 case KVM_GET_IRQCHIP
: {
2586 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2587 struct kvm_irqchip
*chip
= kmalloc(sizeof(*chip
), GFP_KERNEL
);
2593 if (copy_from_user(chip
, argp
, sizeof *chip
))
2594 goto get_irqchip_out
;
2596 if (!irqchip_in_kernel(kvm
))
2597 goto get_irqchip_out
;
2598 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
2600 goto get_irqchip_out
;
2602 if (copy_to_user(argp
, chip
, sizeof *chip
))
2603 goto get_irqchip_out
;
2611 case KVM_SET_IRQCHIP
: {
2612 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2613 struct kvm_irqchip
*chip
= kmalloc(sizeof(*chip
), GFP_KERNEL
);
2619 if (copy_from_user(chip
, argp
, sizeof *chip
))
2620 goto set_irqchip_out
;
2622 if (!irqchip_in_kernel(kvm
))
2623 goto set_irqchip_out
;
2624 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
2626 goto set_irqchip_out
;
2636 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
2639 if (!kvm
->arch
.vpit
)
2641 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
2645 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
2652 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
2655 if (!kvm
->arch
.vpit
)
2657 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
2663 case KVM_GET_PIT2
: {
2665 if (!kvm
->arch
.vpit
)
2667 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
2671 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
2676 case KVM_SET_PIT2
: {
2678 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
2681 if (!kvm
->arch
.vpit
)
2683 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
2689 case KVM_REINJECT_CONTROL
: {
2690 struct kvm_reinject_control control
;
2692 if (copy_from_user(&control
, argp
, sizeof(control
)))
2694 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
2700 case KVM_XEN_HVM_CONFIG
: {
2702 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
2703 sizeof(struct kvm_xen_hvm_config
)))
2706 if (kvm
->arch
.xen_hvm_config
.flags
)
2711 case KVM_SET_CLOCK
: {
2712 struct timespec now
;
2713 struct kvm_clock_data user_ns
;
2718 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
2727 now_ns
= timespec_to_ns(&now
);
2728 delta
= user_ns
.clock
- now_ns
;
2729 kvm
->arch
.kvmclock_offset
= delta
;
2732 case KVM_GET_CLOCK
: {
2733 struct timespec now
;
2734 struct kvm_clock_data user_ns
;
2738 now_ns
= timespec_to_ns(&now
);
2739 user_ns
.clock
= kvm
->arch
.kvmclock_offset
+ now_ns
;
2743 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
2756 static void kvm_init_msr_list(void)
2761 /* skip the first msrs in the list. KVM-specific */
2762 for (i
= j
= KVM_SAVE_MSRS_BEGIN
; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
2763 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
2766 msrs_to_save
[j
] = msrs_to_save
[i
];
2769 num_msrs_to_save
= j
;
2772 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
2775 if (vcpu
->arch
.apic
&&
2776 !kvm_iodevice_write(&vcpu
->arch
.apic
->dev
, addr
, len
, v
))
2779 return kvm_io_bus_write(&vcpu
->kvm
->mmio_bus
, addr
, len
, v
);
2782 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
2784 if (vcpu
->arch
.apic
&&
2785 !kvm_iodevice_read(&vcpu
->arch
.apic
->dev
, addr
, len
, v
))
2788 return kvm_io_bus_read(&vcpu
->kvm
->mmio_bus
, addr
, len
, v
);
2791 static int kvm_read_guest_virt(gva_t addr
, void *val
, unsigned int bytes
,
2792 struct kvm_vcpu
*vcpu
)
2795 int r
= X86EMUL_CONTINUE
;
2798 gpa_t gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2799 unsigned offset
= addr
& (PAGE_SIZE
-1);
2800 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
2803 if (gpa
== UNMAPPED_GVA
) {
2804 r
= X86EMUL_PROPAGATE_FAULT
;
2807 ret
= kvm_read_guest(vcpu
->kvm
, gpa
, data
, toread
);
2809 r
= X86EMUL_UNHANDLEABLE
;
2821 static int kvm_write_guest_virt(gva_t addr
, void *val
, unsigned int bytes
,
2822 struct kvm_vcpu
*vcpu
)
2825 int r
= X86EMUL_CONTINUE
;
2828 gpa_t gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2829 unsigned offset
= addr
& (PAGE_SIZE
-1);
2830 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
2833 if (gpa
== UNMAPPED_GVA
) {
2834 r
= X86EMUL_PROPAGATE_FAULT
;
2837 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, data
, towrite
);
2839 r
= X86EMUL_UNHANDLEABLE
;
2852 static int emulator_read_emulated(unsigned long addr
,
2855 struct kvm_vcpu
*vcpu
)
2859 if (vcpu
->mmio_read_completed
) {
2860 memcpy(val
, vcpu
->mmio_data
, bytes
);
2861 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
2862 vcpu
->mmio_phys_addr
, *(u64
*)val
);
2863 vcpu
->mmio_read_completed
= 0;
2864 return X86EMUL_CONTINUE
;
2867 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2869 /* For APIC access vmexit */
2870 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
2873 if (kvm_read_guest_virt(addr
, val
, bytes
, vcpu
)
2874 == X86EMUL_CONTINUE
)
2875 return X86EMUL_CONTINUE
;
2876 if (gpa
== UNMAPPED_GVA
)
2877 return X86EMUL_PROPAGATE_FAULT
;
2881 * Is this MMIO handled locally?
2883 if (!vcpu_mmio_read(vcpu
, gpa
, bytes
, val
)) {
2884 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
, gpa
, *(u64
*)val
);
2885 return X86EMUL_CONTINUE
;
2888 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
2890 vcpu
->mmio_needed
= 1;
2891 vcpu
->mmio_phys_addr
= gpa
;
2892 vcpu
->mmio_size
= bytes
;
2893 vcpu
->mmio_is_write
= 0;
2895 return X86EMUL_UNHANDLEABLE
;
2898 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
2899 const void *val
, int bytes
)
2903 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, val
, bytes
);
2906 kvm_mmu_pte_write(vcpu
, gpa
, val
, bytes
, 1);
2910 static int emulator_write_emulated_onepage(unsigned long addr
,
2913 struct kvm_vcpu
*vcpu
)
2917 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2919 if (gpa
== UNMAPPED_GVA
) {
2920 kvm_inject_page_fault(vcpu
, addr
, 2);
2921 return X86EMUL_PROPAGATE_FAULT
;
2924 /* For APIC access vmexit */
2925 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
2928 if (emulator_write_phys(vcpu
, gpa
, val
, bytes
))
2929 return X86EMUL_CONTINUE
;
2932 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
2934 * Is this MMIO handled locally?
2936 if (!vcpu_mmio_write(vcpu
, gpa
, bytes
, val
))
2937 return X86EMUL_CONTINUE
;
2939 vcpu
->mmio_needed
= 1;
2940 vcpu
->mmio_phys_addr
= gpa
;
2941 vcpu
->mmio_size
= bytes
;
2942 vcpu
->mmio_is_write
= 1;
2943 memcpy(vcpu
->mmio_data
, val
, bytes
);
2945 return X86EMUL_CONTINUE
;
2948 int emulator_write_emulated(unsigned long addr
,
2951 struct kvm_vcpu
*vcpu
)
2953 /* Crossing a page boundary? */
2954 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
2957 now
= -addr
& ~PAGE_MASK
;
2958 rc
= emulator_write_emulated_onepage(addr
, val
, now
, vcpu
);
2959 if (rc
!= X86EMUL_CONTINUE
)
2965 return emulator_write_emulated_onepage(addr
, val
, bytes
, vcpu
);
2967 EXPORT_SYMBOL_GPL(emulator_write_emulated
);
2969 static int emulator_cmpxchg_emulated(unsigned long addr
,
2973 struct kvm_vcpu
*vcpu
)
2975 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
2976 #ifndef CONFIG_X86_64
2977 /* guests cmpxchg8b have to be emulated atomically */
2984 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2986 if (gpa
== UNMAPPED_GVA
||
2987 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
2990 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
2995 page
= gfn_to_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
2997 kaddr
= kmap_atomic(page
, KM_USER0
);
2998 set_64bit((u64
*)(kaddr
+ offset_in_page(gpa
)), val
);
2999 kunmap_atomic(kaddr
, KM_USER0
);
3000 kvm_release_page_dirty(page
);
3005 return emulator_write_emulated(addr
, new, bytes
, vcpu
);
3008 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
3010 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
3013 int emulate_invlpg(struct kvm_vcpu
*vcpu
, gva_t address
)
3015 kvm_mmu_invlpg(vcpu
, address
);
3016 return X86EMUL_CONTINUE
;
3019 int emulate_clts(struct kvm_vcpu
*vcpu
)
3021 kvm_x86_ops
->set_cr0(vcpu
, vcpu
->arch
.cr0
& ~X86_CR0_TS
);
3022 return X86EMUL_CONTINUE
;
3025 int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long *dest
)
3027 struct kvm_vcpu
*vcpu
= ctxt
->vcpu
;
3031 *dest
= kvm_x86_ops
->get_dr(vcpu
, dr
);
3032 return X86EMUL_CONTINUE
;
3034 pr_unimpl(vcpu
, "%s: unexpected dr %u\n", __func__
, dr
);
3035 return X86EMUL_UNHANDLEABLE
;
3039 int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long value
)
3041 unsigned long mask
= (ctxt
->mode
== X86EMUL_MODE_PROT64
) ? ~0ULL : ~0U;
3044 kvm_x86_ops
->set_dr(ctxt
->vcpu
, dr
, value
& mask
, &exception
);
3046 /* FIXME: better handling */
3047 return X86EMUL_UNHANDLEABLE
;
3049 return X86EMUL_CONTINUE
;
3052 void kvm_report_emulation_failure(struct kvm_vcpu
*vcpu
, const char *context
)
3055 unsigned long rip
= kvm_rip_read(vcpu
);
3056 unsigned long rip_linear
;
3058 if (!printk_ratelimit())
3061 rip_linear
= rip
+ get_segment_base(vcpu
, VCPU_SREG_CS
);
3063 kvm_read_guest_virt(rip_linear
, (void *)opcodes
, 4, vcpu
);
3065 printk(KERN_ERR
"emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
3066 context
, rip
, opcodes
[0], opcodes
[1], opcodes
[2], opcodes
[3]);
3068 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure
);
3070 static struct x86_emulate_ops emulate_ops
= {
3071 .read_std
= kvm_read_guest_virt
,
3072 .read_emulated
= emulator_read_emulated
,
3073 .write_emulated
= emulator_write_emulated
,
3074 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
3077 static void cache_all_regs(struct kvm_vcpu
*vcpu
)
3079 kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3080 kvm_register_read(vcpu
, VCPU_REGS_RSP
);
3081 kvm_register_read(vcpu
, VCPU_REGS_RIP
);
3082 vcpu
->arch
.regs_dirty
= ~0;
3085 int emulate_instruction(struct kvm_vcpu
*vcpu
,
3091 struct decode_cache
*c
;
3092 struct kvm_run
*run
= vcpu
->run
;
3094 kvm_clear_exception_queue(vcpu
);
3095 vcpu
->arch
.mmio_fault_cr2
= cr2
;
3097 * TODO: fix emulate.c to use guest_read/write_register
3098 * instead of direct ->regs accesses, can save hundred cycles
3099 * on Intel for instructions that don't read/change RSP, for
3102 cache_all_regs(vcpu
);
3104 vcpu
->mmio_is_write
= 0;
3105 vcpu
->arch
.pio
.string
= 0;
3107 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
3109 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
3111 vcpu
->arch
.emulate_ctxt
.vcpu
= vcpu
;
3112 vcpu
->arch
.emulate_ctxt
.eflags
= kvm_get_rflags(vcpu
);
3113 vcpu
->arch
.emulate_ctxt
.mode
=
3114 (vcpu
->arch
.emulate_ctxt
.eflags
& X86_EFLAGS_VM
)
3115 ? X86EMUL_MODE_REAL
: cs_l
3116 ? X86EMUL_MODE_PROT64
: cs_db
3117 ? X86EMUL_MODE_PROT32
: X86EMUL_MODE_PROT16
;
3119 r
= x86_decode_insn(&vcpu
->arch
.emulate_ctxt
, &emulate_ops
);
3121 /* Only allow emulation of specific instructions on #UD
3122 * (namely VMMCALL, sysenter, sysexit, syscall)*/
3123 c
= &vcpu
->arch
.emulate_ctxt
.decode
;
3124 if (emulation_type
& EMULTYPE_TRAP_UD
) {
3126 return EMULATE_FAIL
;
3128 case 0x01: /* VMMCALL */
3129 if (c
->modrm_mod
!= 3 || c
->modrm_rm
!= 1)
3130 return EMULATE_FAIL
;
3132 case 0x34: /* sysenter */
3133 case 0x35: /* sysexit */
3134 if (c
->modrm_mod
!= 0 || c
->modrm_rm
!= 0)
3135 return EMULATE_FAIL
;
3137 case 0x05: /* syscall */
3138 if (c
->modrm_mod
!= 0 || c
->modrm_rm
!= 0)
3139 return EMULATE_FAIL
;
3142 return EMULATE_FAIL
;
3145 if (!(c
->modrm_reg
== 0 || c
->modrm_reg
== 3))
3146 return EMULATE_FAIL
;
3149 ++vcpu
->stat
.insn_emulation
;
3151 ++vcpu
->stat
.insn_emulation_fail
;
3152 if (kvm_mmu_unprotect_page_virt(vcpu
, cr2
))
3153 return EMULATE_DONE
;
3154 return EMULATE_FAIL
;
3158 if (emulation_type
& EMULTYPE_SKIP
) {
3159 kvm_rip_write(vcpu
, vcpu
->arch
.emulate_ctxt
.decode
.eip
);
3160 return EMULATE_DONE
;
3163 r
= x86_emulate_insn(&vcpu
->arch
.emulate_ctxt
, &emulate_ops
);
3164 shadow_mask
= vcpu
->arch
.emulate_ctxt
.interruptibility
;
3167 kvm_x86_ops
->set_interrupt_shadow(vcpu
, shadow_mask
);
3169 if (vcpu
->arch
.pio
.string
)
3170 return EMULATE_DO_MMIO
;
3172 if ((r
|| vcpu
->mmio_is_write
) && run
) {
3173 run
->exit_reason
= KVM_EXIT_MMIO
;
3174 run
->mmio
.phys_addr
= vcpu
->mmio_phys_addr
;
3175 memcpy(run
->mmio
.data
, vcpu
->mmio_data
, 8);
3176 run
->mmio
.len
= vcpu
->mmio_size
;
3177 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
3181 if (kvm_mmu_unprotect_page_virt(vcpu
, cr2
))
3182 return EMULATE_DONE
;
3183 if (!vcpu
->mmio_needed
) {
3184 kvm_report_emulation_failure(vcpu
, "mmio");
3185 return EMULATE_FAIL
;
3187 return EMULATE_DO_MMIO
;
3190 kvm_set_rflags(vcpu
, vcpu
->arch
.emulate_ctxt
.eflags
);
3192 if (vcpu
->mmio_is_write
) {
3193 vcpu
->mmio_needed
= 0;
3194 return EMULATE_DO_MMIO
;
3197 return EMULATE_DONE
;
3199 EXPORT_SYMBOL_GPL(emulate_instruction
);
3201 static int pio_copy_data(struct kvm_vcpu
*vcpu
)
3203 void *p
= vcpu
->arch
.pio_data
;
3204 gva_t q
= vcpu
->arch
.pio
.guest_gva
;
3208 bytes
= vcpu
->arch
.pio
.size
* vcpu
->arch
.pio
.cur_count
;
3209 if (vcpu
->arch
.pio
.in
)
3210 ret
= kvm_write_guest_virt(q
, p
, bytes
, vcpu
);
3212 ret
= kvm_read_guest_virt(q
, p
, bytes
, vcpu
);
3216 int complete_pio(struct kvm_vcpu
*vcpu
)
3218 struct kvm_pio_request
*io
= &vcpu
->arch
.pio
;
3225 val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3226 memcpy(&val
, vcpu
->arch
.pio_data
, io
->size
);
3227 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
3231 r
= pio_copy_data(vcpu
);
3238 delta
*= io
->cur_count
;
3240 * The size of the register should really depend on
3241 * current address size.
3243 val
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
3245 kvm_register_write(vcpu
, VCPU_REGS_RCX
, val
);
3251 val
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
3253 kvm_register_write(vcpu
, VCPU_REGS_RDI
, val
);
3255 val
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
3257 kvm_register_write(vcpu
, VCPU_REGS_RSI
, val
);
3261 io
->count
-= io
->cur_count
;
3267 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
3269 /* TODO: String I/O for in kernel device */
3272 if (vcpu
->arch
.pio
.in
)
3273 r
= kvm_io_bus_read(&vcpu
->kvm
->pio_bus
, vcpu
->arch
.pio
.port
,
3274 vcpu
->arch
.pio
.size
, pd
);
3276 r
= kvm_io_bus_write(&vcpu
->kvm
->pio_bus
, vcpu
->arch
.pio
.port
,
3277 vcpu
->arch
.pio
.size
, pd
);
3281 static int pio_string_write(struct kvm_vcpu
*vcpu
)
3283 struct kvm_pio_request
*io
= &vcpu
->arch
.pio
;
3284 void *pd
= vcpu
->arch
.pio_data
;
3287 for (i
= 0; i
< io
->cur_count
; i
++) {
3288 if (kvm_io_bus_write(&vcpu
->kvm
->pio_bus
,
3289 io
->port
, io
->size
, pd
)) {
3298 int kvm_emulate_pio(struct kvm_vcpu
*vcpu
, int in
, int size
, unsigned port
)
3302 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
3303 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
3304 vcpu
->run
->io
.size
= vcpu
->arch
.pio
.size
= size
;
3305 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
3306 vcpu
->run
->io
.count
= vcpu
->arch
.pio
.count
= vcpu
->arch
.pio
.cur_count
= 1;
3307 vcpu
->run
->io
.port
= vcpu
->arch
.pio
.port
= port
;
3308 vcpu
->arch
.pio
.in
= in
;
3309 vcpu
->arch
.pio
.string
= 0;
3310 vcpu
->arch
.pio
.down
= 0;
3311 vcpu
->arch
.pio
.rep
= 0;
3313 trace_kvm_pio(vcpu
->run
->io
.direction
== KVM_EXIT_IO_OUT
, port
,
3316 val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3317 memcpy(vcpu
->arch
.pio_data
, &val
, 4);
3319 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
3325 EXPORT_SYMBOL_GPL(kvm_emulate_pio
);
3327 int kvm_emulate_pio_string(struct kvm_vcpu
*vcpu
, int in
,
3328 int size
, unsigned long count
, int down
,
3329 gva_t address
, int rep
, unsigned port
)
3331 unsigned now
, in_page
;
3334 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
3335 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
3336 vcpu
->run
->io
.size
= vcpu
->arch
.pio
.size
= size
;
3337 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
3338 vcpu
->run
->io
.count
= vcpu
->arch
.pio
.count
= vcpu
->arch
.pio
.cur_count
= count
;
3339 vcpu
->run
->io
.port
= vcpu
->arch
.pio
.port
= port
;
3340 vcpu
->arch
.pio
.in
= in
;
3341 vcpu
->arch
.pio
.string
= 1;
3342 vcpu
->arch
.pio
.down
= down
;
3343 vcpu
->arch
.pio
.rep
= rep
;
3345 trace_kvm_pio(vcpu
->run
->io
.direction
== KVM_EXIT_IO_OUT
, port
,
3349 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
3354 in_page
= PAGE_SIZE
- offset_in_page(address
);
3356 in_page
= offset_in_page(address
) + size
;
3357 now
= min(count
, (unsigned long)in_page
/ size
);
3362 * String I/O in reverse. Yuck. Kill the guest, fix later.
3364 pr_unimpl(vcpu
, "guest string pio down\n");
3365 kvm_inject_gp(vcpu
, 0);
3368 vcpu
->run
->io
.count
= now
;
3369 vcpu
->arch
.pio
.cur_count
= now
;
3371 if (vcpu
->arch
.pio
.cur_count
== vcpu
->arch
.pio
.count
)
3372 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
3374 vcpu
->arch
.pio
.guest_gva
= address
;
3376 if (!vcpu
->arch
.pio
.in
) {
3377 /* string PIO write */
3378 ret
= pio_copy_data(vcpu
);
3379 if (ret
== X86EMUL_PROPAGATE_FAULT
) {
3380 kvm_inject_gp(vcpu
, 0);
3383 if (ret
== 0 && !pio_string_write(vcpu
)) {
3385 if (vcpu
->arch
.pio
.count
== 0)
3389 /* no string PIO read support yet */
3393 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string
);
3395 static void bounce_off(void *info
)
3400 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
3403 struct cpufreq_freqs
*freq
= data
;
3405 struct kvm_vcpu
*vcpu
;
3406 int i
, send_ipi
= 0;
3408 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
3410 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
3412 per_cpu(cpu_tsc_khz
, freq
->cpu
) = freq
->new;
3414 spin_lock(&kvm_lock
);
3415 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
3416 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
3417 if (vcpu
->cpu
!= freq
->cpu
)
3419 if (!kvm_request_guest_time_update(vcpu
))
3421 if (vcpu
->cpu
!= smp_processor_id())
3425 spin_unlock(&kvm_lock
);
3427 if (freq
->old
< freq
->new && send_ipi
) {
3429 * We upscale the frequency. Must make the guest
3430 * doesn't see old kvmclock values while running with
3431 * the new frequency, otherwise we risk the guest sees
3432 * time go backwards.
3434 * In case we update the frequency for another cpu
3435 * (which might be in guest context) send an interrupt
3436 * to kick the cpu out of guest context. Next time
3437 * guest context is entered kvmclock will be updated,
3438 * so the guest will not see stale values.
3440 smp_call_function_single(freq
->cpu
, bounce_off
, NULL
, 1);
3445 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
3446 .notifier_call
= kvmclock_cpufreq_notifier
3449 static void kvm_timer_init(void)
3453 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
3454 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
3455 CPUFREQ_TRANSITION_NOTIFIER
);
3456 for_each_online_cpu(cpu
) {
3457 unsigned long khz
= cpufreq_get(cpu
);
3460 per_cpu(cpu_tsc_khz
, cpu
) = khz
;
3463 for_each_possible_cpu(cpu
)
3464 per_cpu(cpu_tsc_khz
, cpu
) = tsc_khz
;
3468 int kvm_arch_init(void *opaque
)
3471 struct kvm_x86_ops
*ops
= (struct kvm_x86_ops
*)opaque
;
3474 printk(KERN_ERR
"kvm: already loaded the other module\n");
3479 if (!ops
->cpu_has_kvm_support()) {
3480 printk(KERN_ERR
"kvm: no hardware support\n");
3484 if (ops
->disabled_by_bios()) {
3485 printk(KERN_ERR
"kvm: disabled by bios\n");
3490 r
= kvm_mmu_module_init();
3494 kvm_init_msr_list();
3497 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
3498 kvm_mmu_set_base_ptes(PT_PRESENT_MASK
);
3499 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
3500 PT_DIRTY_MASK
, PT64_NX_MASK
, 0);
3510 void kvm_arch_exit(void)
3512 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
3513 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
3514 CPUFREQ_TRANSITION_NOTIFIER
);
3516 kvm_mmu_module_exit();
3519 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
3521 ++vcpu
->stat
.halt_exits
;
3522 if (irqchip_in_kernel(vcpu
->kvm
)) {
3523 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
3526 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
3530 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
3532 static inline gpa_t
hc_gpa(struct kvm_vcpu
*vcpu
, unsigned long a0
,
3535 if (is_long_mode(vcpu
))
3538 return a0
| ((gpa_t
)a1
<< 32);
3541 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
3543 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
3546 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3547 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
3548 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
3549 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
3550 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
3552 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
3554 if (!is_long_mode(vcpu
)) {
3562 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
3568 case KVM_HC_VAPIC_POLL_IRQ
:
3572 r
= kvm_pv_mmu_op(vcpu
, a0
, hc_gpa(vcpu
, a1
, a2
), &ret
);
3579 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
3580 ++vcpu
->stat
.hypercalls
;
3583 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
3585 int kvm_fix_hypercall(struct kvm_vcpu
*vcpu
)
3587 char instruction
[3];
3589 unsigned long rip
= kvm_rip_read(vcpu
);
3593 * Blow out the MMU to ensure that no other VCPU has an active mapping
3594 * to ensure that the updated hypercall appears atomically across all
3597 kvm_mmu_zap_all(vcpu
->kvm
);
3599 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
3600 if (emulator_write_emulated(rip
, instruction
, 3, vcpu
)
3601 != X86EMUL_CONTINUE
)
3607 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
3609 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
3612 void realmode_lgdt(struct kvm_vcpu
*vcpu
, u16 limit
, unsigned long base
)
3614 struct descriptor_table dt
= { limit
, base
};
3616 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
3619 void realmode_lidt(struct kvm_vcpu
*vcpu
, u16 limit
, unsigned long base
)
3621 struct descriptor_table dt
= { limit
, base
};
3623 kvm_x86_ops
->set_idt(vcpu
, &dt
);
3626 void realmode_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
,
3627 unsigned long *rflags
)
3629 kvm_lmsw(vcpu
, msw
);
3630 *rflags
= kvm_get_rflags(vcpu
);
3633 unsigned long realmode_get_cr(struct kvm_vcpu
*vcpu
, int cr
)
3635 unsigned long value
;
3639 value
= vcpu
->arch
.cr0
;
3642 value
= vcpu
->arch
.cr2
;
3645 value
= vcpu
->arch
.cr3
;
3648 value
= kvm_read_cr4(vcpu
);
3651 value
= kvm_get_cr8(vcpu
);
3654 vcpu_printf(vcpu
, "%s: unexpected cr %u\n", __func__
, cr
);
3661 void realmode_set_cr(struct kvm_vcpu
*vcpu
, int cr
, unsigned long val
,
3662 unsigned long *rflags
)
3666 kvm_set_cr0(vcpu
, mk_cr_64(vcpu
->arch
.cr0
, val
));
3667 *rflags
= kvm_get_rflags(vcpu
);
3670 vcpu
->arch
.cr2
= val
;
3673 kvm_set_cr3(vcpu
, val
);
3676 kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
3679 kvm_set_cr8(vcpu
, val
& 0xfUL
);
3682 vcpu_printf(vcpu
, "%s: unexpected cr %u\n", __func__
, cr
);
3686 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu
*vcpu
, int i
)
3688 struct kvm_cpuid_entry2
*e
= &vcpu
->arch
.cpuid_entries
[i
];
3689 int j
, nent
= vcpu
->arch
.cpuid_nent
;
3691 e
->flags
&= ~KVM_CPUID_FLAG_STATE_READ_NEXT
;
3692 /* when no next entry is found, the current entry[i] is reselected */
3693 for (j
= i
+ 1; ; j
= (j
+ 1) % nent
) {
3694 struct kvm_cpuid_entry2
*ej
= &vcpu
->arch
.cpuid_entries
[j
];
3695 if (ej
->function
== e
->function
) {
3696 ej
->flags
|= KVM_CPUID_FLAG_STATE_READ_NEXT
;
3700 return 0; /* silence gcc, even though control never reaches here */
3703 /* find an entry with matching function, matching index (if needed), and that
3704 * should be read next (if it's stateful) */
3705 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2
*e
,
3706 u32 function
, u32 index
)
3708 if (e
->function
!= function
)
3710 if ((e
->flags
& KVM_CPUID_FLAG_SIGNIFCANT_INDEX
) && e
->index
!= index
)
3712 if ((e
->flags
& KVM_CPUID_FLAG_STATEFUL_FUNC
) &&
3713 !(e
->flags
& KVM_CPUID_FLAG_STATE_READ_NEXT
))
3718 struct kvm_cpuid_entry2
*kvm_find_cpuid_entry(struct kvm_vcpu
*vcpu
,
3719 u32 function
, u32 index
)
3722 struct kvm_cpuid_entry2
*best
= NULL
;
3724 for (i
= 0; i
< vcpu
->arch
.cpuid_nent
; ++i
) {
3725 struct kvm_cpuid_entry2
*e
;
3727 e
= &vcpu
->arch
.cpuid_entries
[i
];
3728 if (is_matching_cpuid_entry(e
, function
, index
)) {
3729 if (e
->flags
& KVM_CPUID_FLAG_STATEFUL_FUNC
)
3730 move_to_next_stateful_cpuid_entry(vcpu
, i
);
3735 * Both basic or both extended?
3737 if (((e
->function
^ function
) & 0x80000000) == 0)
3738 if (!best
|| e
->function
> best
->function
)
3743 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry
);
3745 int cpuid_maxphyaddr(struct kvm_vcpu
*vcpu
)
3747 struct kvm_cpuid_entry2
*best
;
3749 best
= kvm_find_cpuid_entry(vcpu
, 0x80000008, 0);
3751 return best
->eax
& 0xff;
3755 void kvm_emulate_cpuid(struct kvm_vcpu
*vcpu
)
3757 u32 function
, index
;
3758 struct kvm_cpuid_entry2
*best
;
3760 function
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3761 index
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
3762 kvm_register_write(vcpu
, VCPU_REGS_RAX
, 0);
3763 kvm_register_write(vcpu
, VCPU_REGS_RBX
, 0);
3764 kvm_register_write(vcpu
, VCPU_REGS_RCX
, 0);
3765 kvm_register_write(vcpu
, VCPU_REGS_RDX
, 0);
3766 best
= kvm_find_cpuid_entry(vcpu
, function
, index
);
3768 kvm_register_write(vcpu
, VCPU_REGS_RAX
, best
->eax
);
3769 kvm_register_write(vcpu
, VCPU_REGS_RBX
, best
->ebx
);
3770 kvm_register_write(vcpu
, VCPU_REGS_RCX
, best
->ecx
);
3771 kvm_register_write(vcpu
, VCPU_REGS_RDX
, best
->edx
);
3773 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
3774 trace_kvm_cpuid(function
,
3775 kvm_register_read(vcpu
, VCPU_REGS_RAX
),
3776 kvm_register_read(vcpu
, VCPU_REGS_RBX
),
3777 kvm_register_read(vcpu
, VCPU_REGS_RCX
),
3778 kvm_register_read(vcpu
, VCPU_REGS_RDX
));
3780 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid
);
3783 * Check if userspace requested an interrupt window, and that the
3784 * interrupt window is open.
3786 * No need to exit to userspace if we already have an interrupt queued.
3788 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
3790 return (!irqchip_in_kernel(vcpu
->kvm
) && !kvm_cpu_has_interrupt(vcpu
) &&
3791 vcpu
->run
->request_interrupt_window
&&
3792 kvm_arch_interrupt_allowed(vcpu
));
3795 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
3797 struct kvm_run
*kvm_run
= vcpu
->run
;
3799 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
3800 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
3801 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
3802 if (irqchip_in_kernel(vcpu
->kvm
))
3803 kvm_run
->ready_for_interrupt_injection
= 1;
3805 kvm_run
->ready_for_interrupt_injection
=
3806 kvm_arch_interrupt_allowed(vcpu
) &&
3807 !kvm_cpu_has_interrupt(vcpu
) &&
3808 !kvm_event_needs_reinjection(vcpu
);
3811 static void vapic_enter(struct kvm_vcpu
*vcpu
)
3813 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
3816 if (!apic
|| !apic
->vapic_addr
)
3819 page
= gfn_to_page(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
3821 vcpu
->arch
.apic
->vapic_page
= page
;
3824 static void vapic_exit(struct kvm_vcpu
*vcpu
)
3826 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
3828 if (!apic
|| !apic
->vapic_addr
)
3831 down_read(&vcpu
->kvm
->slots_lock
);
3832 kvm_release_page_dirty(apic
->vapic_page
);
3833 mark_page_dirty(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
3834 up_read(&vcpu
->kvm
->slots_lock
);
3837 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
3841 if (!kvm_x86_ops
->update_cr8_intercept
)
3844 if (!vcpu
->arch
.apic
)
3847 if (!vcpu
->arch
.apic
->vapic_addr
)
3848 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
3855 tpr
= kvm_lapic_get_cr8(vcpu
);
3857 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
3860 static void inject_pending_event(struct kvm_vcpu
*vcpu
)
3862 /* try to reinject previous events if any */
3863 if (vcpu
->arch
.exception
.pending
) {
3864 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
3865 vcpu
->arch
.exception
.has_error_code
,
3866 vcpu
->arch
.exception
.error_code
);
3870 if (vcpu
->arch
.nmi_injected
) {
3871 kvm_x86_ops
->set_nmi(vcpu
);
3875 if (vcpu
->arch
.interrupt
.pending
) {
3876 kvm_x86_ops
->set_irq(vcpu
);
3880 /* try to inject new event if pending */
3881 if (vcpu
->arch
.nmi_pending
) {
3882 if (kvm_x86_ops
->nmi_allowed(vcpu
)) {
3883 vcpu
->arch
.nmi_pending
= false;
3884 vcpu
->arch
.nmi_injected
= true;
3885 kvm_x86_ops
->set_nmi(vcpu
);
3887 } else if (kvm_cpu_has_interrupt(vcpu
)) {
3888 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
3889 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
3891 kvm_x86_ops
->set_irq(vcpu
);
3896 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
3899 bool req_int_win
= !irqchip_in_kernel(vcpu
->kvm
) &&
3900 vcpu
->run
->request_interrupt_window
;
3903 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD
, &vcpu
->requests
))
3904 kvm_mmu_unload(vcpu
);
3906 r
= kvm_mmu_reload(vcpu
);
3910 if (vcpu
->requests
) {
3911 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER
, &vcpu
->requests
))
3912 __kvm_migrate_timers(vcpu
);
3913 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE
, &vcpu
->requests
))
3914 kvm_write_guest_time(vcpu
);
3915 if (test_and_clear_bit(KVM_REQ_MMU_SYNC
, &vcpu
->requests
))
3916 kvm_mmu_sync_roots(vcpu
);
3917 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH
, &vcpu
->requests
))
3918 kvm_x86_ops
->tlb_flush(vcpu
);
3919 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS
,
3921 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
3925 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT
, &vcpu
->requests
)) {
3926 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
3934 kvm_x86_ops
->prepare_guest_switch(vcpu
);
3935 kvm_load_guest_fpu(vcpu
);
3937 local_irq_disable();
3939 clear_bit(KVM_REQ_KICK
, &vcpu
->requests
);
3940 smp_mb__after_clear_bit();
3942 if (vcpu
->requests
|| need_resched() || signal_pending(current
)) {
3943 set_bit(KVM_REQ_KICK
, &vcpu
->requests
);
3950 inject_pending_event(vcpu
);
3952 /* enable NMI/IRQ window open exits if needed */
3953 if (vcpu
->arch
.nmi_pending
)
3954 kvm_x86_ops
->enable_nmi_window(vcpu
);
3955 else if (kvm_cpu_has_interrupt(vcpu
) || req_int_win
)
3956 kvm_x86_ops
->enable_irq_window(vcpu
);
3958 if (kvm_lapic_enabled(vcpu
)) {
3959 update_cr8_intercept(vcpu
);
3960 kvm_lapic_sync_to_vapic(vcpu
);
3963 up_read(&vcpu
->kvm
->slots_lock
);
3967 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
3969 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
3970 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
3971 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
3972 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
3975 trace_kvm_entry(vcpu
->vcpu_id
);
3976 kvm_x86_ops
->run(vcpu
);
3979 * If the guest has used debug registers, at least dr7
3980 * will be disabled while returning to the host.
3981 * If we don't have active breakpoints in the host, we don't
3982 * care about the messed up debug address registers. But if
3983 * we have some of them active, restore the old state.
3985 if (hw_breakpoint_active())
3986 hw_breakpoint_restore();
3988 set_bit(KVM_REQ_KICK
, &vcpu
->requests
);
3994 * We must have an instruction between local_irq_enable() and
3995 * kvm_guest_exit(), so the timer interrupt isn't delayed by
3996 * the interrupt shadow. The stat.exits increment will do nicely.
3997 * But we need to prevent reordering, hence this barrier():
4005 down_read(&vcpu
->kvm
->slots_lock
);
4008 * Profile KVM exit RIPs:
4010 if (unlikely(prof_on
== KVM_PROFILING
)) {
4011 unsigned long rip
= kvm_rip_read(vcpu
);
4012 profile_hit(KVM_PROFILING
, (void *)rip
);
4016 kvm_lapic_sync_from_vapic(vcpu
);
4018 r
= kvm_x86_ops
->handle_exit(vcpu
);
4024 static int __vcpu_run(struct kvm_vcpu
*vcpu
)
4028 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
)) {
4029 pr_debug("vcpu %d received sipi with vector # %x\n",
4030 vcpu
->vcpu_id
, vcpu
->arch
.sipi_vector
);
4031 kvm_lapic_reset(vcpu
);
4032 r
= kvm_arch_vcpu_reset(vcpu
);
4035 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
4038 down_read(&vcpu
->kvm
->slots_lock
);
4043 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
)
4044 r
= vcpu_enter_guest(vcpu
);
4046 up_read(&vcpu
->kvm
->slots_lock
);
4047 kvm_vcpu_block(vcpu
);
4048 down_read(&vcpu
->kvm
->slots_lock
);
4049 if (test_and_clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
))
4051 switch(vcpu
->arch
.mp_state
) {
4052 case KVM_MP_STATE_HALTED
:
4053 vcpu
->arch
.mp_state
=
4054 KVM_MP_STATE_RUNNABLE
;
4055 case KVM_MP_STATE_RUNNABLE
:
4057 case KVM_MP_STATE_SIPI_RECEIVED
:
4068 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
4069 if (kvm_cpu_has_pending_timer(vcpu
))
4070 kvm_inject_pending_timer_irqs(vcpu
);
4072 if (dm_request_for_irq_injection(vcpu
)) {
4074 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
4075 ++vcpu
->stat
.request_irq_exits
;
4077 if (signal_pending(current
)) {
4079 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
4080 ++vcpu
->stat
.signal_exits
;
4082 if (need_resched()) {
4083 up_read(&vcpu
->kvm
->slots_lock
);
4085 down_read(&vcpu
->kvm
->slots_lock
);
4089 up_read(&vcpu
->kvm
->slots_lock
);
4090 post_kvm_run_save(vcpu
);
4097 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
4104 if (vcpu
->sigset_active
)
4105 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
4107 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
4108 kvm_vcpu_block(vcpu
);
4109 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
4114 /* re-sync apic's tpr */
4115 if (!irqchip_in_kernel(vcpu
->kvm
))
4116 kvm_set_cr8(vcpu
, kvm_run
->cr8
);
4118 if (vcpu
->arch
.pio
.cur_count
) {
4119 r
= complete_pio(vcpu
);
4123 if (vcpu
->mmio_needed
) {
4124 memcpy(vcpu
->mmio_data
, kvm_run
->mmio
.data
, 8);
4125 vcpu
->mmio_read_completed
= 1;
4126 vcpu
->mmio_needed
= 0;
4128 down_read(&vcpu
->kvm
->slots_lock
);
4129 r
= emulate_instruction(vcpu
, vcpu
->arch
.mmio_fault_cr2
, 0,
4130 EMULTYPE_NO_DECODE
);
4131 up_read(&vcpu
->kvm
->slots_lock
);
4132 if (r
== EMULATE_DO_MMIO
) {
4134 * Read-modify-write. Back to userspace.
4140 if (kvm_run
->exit_reason
== KVM_EXIT_HYPERCALL
)
4141 kvm_register_write(vcpu
, VCPU_REGS_RAX
,
4142 kvm_run
->hypercall
.ret
);
4144 r
= __vcpu_run(vcpu
);
4147 if (vcpu
->sigset_active
)
4148 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
4154 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
4158 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4159 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
4160 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4161 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4162 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
4163 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
4164 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
4165 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
4166 #ifdef CONFIG_X86_64
4167 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
4168 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
4169 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
4170 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
4171 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
4172 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
4173 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
4174 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
4177 regs
->rip
= kvm_rip_read(vcpu
);
4178 regs
->rflags
= kvm_get_rflags(vcpu
);
4185 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
4189 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
4190 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
4191 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
4192 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
4193 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
4194 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
4195 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
4196 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
4197 #ifdef CONFIG_X86_64
4198 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
4199 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
4200 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
4201 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
4202 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
4203 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
4204 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
4205 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
4208 kvm_rip_write(vcpu
, regs
->rip
);
4209 kvm_set_rflags(vcpu
, regs
->rflags
);
4211 vcpu
->arch
.exception
.pending
= false;
4218 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
4219 struct kvm_segment
*var
, int seg
)
4221 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
4224 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
4226 struct kvm_segment cs
;
4228 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
4232 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
4234 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
4235 struct kvm_sregs
*sregs
)
4237 struct descriptor_table dt
;
4241 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
4242 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
4243 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
4244 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
4245 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
4246 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
4248 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
4249 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
4251 kvm_x86_ops
->get_idt(vcpu
, &dt
);
4252 sregs
->idt
.limit
= dt
.limit
;
4253 sregs
->idt
.base
= dt
.base
;
4254 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
4255 sregs
->gdt
.limit
= dt
.limit
;
4256 sregs
->gdt
.base
= dt
.base
;
4258 sregs
->cr0
= vcpu
->arch
.cr0
;
4259 sregs
->cr2
= vcpu
->arch
.cr2
;
4260 sregs
->cr3
= vcpu
->arch
.cr3
;
4261 sregs
->cr4
= kvm_read_cr4(vcpu
);
4262 sregs
->cr8
= kvm_get_cr8(vcpu
);
4263 sregs
->efer
= vcpu
->arch
.shadow_efer
;
4264 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
4266 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
4268 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
4269 set_bit(vcpu
->arch
.interrupt
.nr
,
4270 (unsigned long *)sregs
->interrupt_bitmap
);
4277 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
4278 struct kvm_mp_state
*mp_state
)
4281 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
4286 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
4287 struct kvm_mp_state
*mp_state
)
4290 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
4295 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
4296 struct kvm_segment
*var
, int seg
)
4298 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
4301 static void seg_desct_to_kvm_desct(struct desc_struct
*seg_desc
, u16 selector
,
4302 struct kvm_segment
*kvm_desct
)
4304 kvm_desct
->base
= get_desc_base(seg_desc
);
4305 kvm_desct
->limit
= get_desc_limit(seg_desc
);
4307 kvm_desct
->limit
<<= 12;
4308 kvm_desct
->limit
|= 0xfff;
4310 kvm_desct
->selector
= selector
;
4311 kvm_desct
->type
= seg_desc
->type
;
4312 kvm_desct
->present
= seg_desc
->p
;
4313 kvm_desct
->dpl
= seg_desc
->dpl
;
4314 kvm_desct
->db
= seg_desc
->d
;
4315 kvm_desct
->s
= seg_desc
->s
;
4316 kvm_desct
->l
= seg_desc
->l
;
4317 kvm_desct
->g
= seg_desc
->g
;
4318 kvm_desct
->avl
= seg_desc
->avl
;
4320 kvm_desct
->unusable
= 1;
4322 kvm_desct
->unusable
= 0;
4323 kvm_desct
->padding
= 0;
4326 static void get_segment_descriptor_dtable(struct kvm_vcpu
*vcpu
,
4328 struct descriptor_table
*dtable
)
4330 if (selector
& 1 << 2) {
4331 struct kvm_segment kvm_seg
;
4333 kvm_get_segment(vcpu
, &kvm_seg
, VCPU_SREG_LDTR
);
4335 if (kvm_seg
.unusable
)
4338 dtable
->limit
= kvm_seg
.limit
;
4339 dtable
->base
= kvm_seg
.base
;
4342 kvm_x86_ops
->get_gdt(vcpu
, dtable
);
4345 /* allowed just for 8 bytes segments */
4346 static int load_guest_segment_descriptor(struct kvm_vcpu
*vcpu
, u16 selector
,
4347 struct desc_struct
*seg_desc
)
4349 struct descriptor_table dtable
;
4350 u16 index
= selector
>> 3;
4352 get_segment_descriptor_dtable(vcpu
, selector
, &dtable
);
4354 if (dtable
.limit
< index
* 8 + 7) {
4355 kvm_queue_exception_e(vcpu
, GP_VECTOR
, selector
& 0xfffc);
4358 return kvm_read_guest_virt(dtable
.base
+ index
*8, seg_desc
, sizeof(*seg_desc
), vcpu
);
4361 /* allowed just for 8 bytes segments */
4362 static int save_guest_segment_descriptor(struct kvm_vcpu
*vcpu
, u16 selector
,
4363 struct desc_struct
*seg_desc
)
4365 struct descriptor_table dtable
;
4366 u16 index
= selector
>> 3;
4368 get_segment_descriptor_dtable(vcpu
, selector
, &dtable
);
4370 if (dtable
.limit
< index
* 8 + 7)
4372 return kvm_write_guest_virt(dtable
.base
+ index
*8, seg_desc
, sizeof(*seg_desc
), vcpu
);
4375 static gpa_t
get_tss_base_addr(struct kvm_vcpu
*vcpu
,
4376 struct desc_struct
*seg_desc
)
4378 u32 base_addr
= get_desc_base(seg_desc
);
4380 return vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, base_addr
);
4383 static u16
get_segment_selector(struct kvm_vcpu
*vcpu
, int seg
)
4385 struct kvm_segment kvm_seg
;
4387 kvm_get_segment(vcpu
, &kvm_seg
, seg
);
4388 return kvm_seg
.selector
;
4391 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu
*vcpu
,
4393 struct kvm_segment
*kvm_seg
)
4395 struct desc_struct seg_desc
;
4397 if (load_guest_segment_descriptor(vcpu
, selector
, &seg_desc
))
4399 seg_desct_to_kvm_desct(&seg_desc
, selector
, kvm_seg
);
4403 static int kvm_load_realmode_segment(struct kvm_vcpu
*vcpu
, u16 selector
, int seg
)
4405 struct kvm_segment segvar
= {
4406 .base
= selector
<< 4,
4408 .selector
= selector
,
4419 kvm_x86_ops
->set_segment(vcpu
, &segvar
, seg
);
4423 static int is_vm86_segment(struct kvm_vcpu
*vcpu
, int seg
)
4425 return (seg
!= VCPU_SREG_LDTR
) &&
4426 (seg
!= VCPU_SREG_TR
) &&
4427 (kvm_get_rflags(vcpu
) & X86_EFLAGS_VM
);
4430 static void kvm_check_segment_descriptor(struct kvm_vcpu
*vcpu
, int seg
,
4433 /* NULL selector is not valid for CS and SS */
4434 if (seg
== VCPU_SREG_CS
|| seg
== VCPU_SREG_SS
)
4436 kvm_queue_exception_e(vcpu
, TS_VECTOR
, selector
>> 3);
4439 int kvm_load_segment_descriptor(struct kvm_vcpu
*vcpu
, u16 selector
,
4440 int type_bits
, int seg
)
4442 struct kvm_segment kvm_seg
;
4444 if (is_vm86_segment(vcpu
, seg
) || !(vcpu
->arch
.cr0
& X86_CR0_PE
))
4445 return kvm_load_realmode_segment(vcpu
, selector
, seg
);
4446 if (load_segment_descriptor_to_kvm_desct(vcpu
, selector
, &kvm_seg
))
4449 kvm_check_segment_descriptor(vcpu
, seg
, selector
);
4450 kvm_seg
.type
|= type_bits
;
4452 if (seg
!= VCPU_SREG_SS
&& seg
!= VCPU_SREG_CS
&&
4453 seg
!= VCPU_SREG_LDTR
)
4455 kvm_seg
.unusable
= 1;
4457 kvm_set_segment(vcpu
, &kvm_seg
, seg
);
4461 static void save_state_to_tss32(struct kvm_vcpu
*vcpu
,
4462 struct tss_segment_32
*tss
)
4464 tss
->cr3
= vcpu
->arch
.cr3
;
4465 tss
->eip
= kvm_rip_read(vcpu
);
4466 tss
->eflags
= kvm_get_rflags(vcpu
);
4467 tss
->eax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4468 tss
->ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4469 tss
->edx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4470 tss
->ebx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
4471 tss
->esp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
4472 tss
->ebp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
4473 tss
->esi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
4474 tss
->edi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
4475 tss
->es
= get_segment_selector(vcpu
, VCPU_SREG_ES
);
4476 tss
->cs
= get_segment_selector(vcpu
, VCPU_SREG_CS
);
4477 tss
->ss
= get_segment_selector(vcpu
, VCPU_SREG_SS
);
4478 tss
->ds
= get_segment_selector(vcpu
, VCPU_SREG_DS
);
4479 tss
->fs
= get_segment_selector(vcpu
, VCPU_SREG_FS
);
4480 tss
->gs
= get_segment_selector(vcpu
, VCPU_SREG_GS
);
4481 tss
->ldt_selector
= get_segment_selector(vcpu
, VCPU_SREG_LDTR
);
4484 static int load_state_from_tss32(struct kvm_vcpu
*vcpu
,
4485 struct tss_segment_32
*tss
)
4487 kvm_set_cr3(vcpu
, tss
->cr3
);
4489 kvm_rip_write(vcpu
, tss
->eip
);
4490 kvm_set_rflags(vcpu
, tss
->eflags
| 2);
4492 kvm_register_write(vcpu
, VCPU_REGS_RAX
, tss
->eax
);
4493 kvm_register_write(vcpu
, VCPU_REGS_RCX
, tss
->ecx
);
4494 kvm_register_write(vcpu
, VCPU_REGS_RDX
, tss
->edx
);
4495 kvm_register_write(vcpu
, VCPU_REGS_RBX
, tss
->ebx
);
4496 kvm_register_write(vcpu
, VCPU_REGS_RSP
, tss
->esp
);
4497 kvm_register_write(vcpu
, VCPU_REGS_RBP
, tss
->ebp
);
4498 kvm_register_write(vcpu
, VCPU_REGS_RSI
, tss
->esi
);
4499 kvm_register_write(vcpu
, VCPU_REGS_RDI
, tss
->edi
);
4501 if (kvm_load_segment_descriptor(vcpu
, tss
->ldt_selector
, 0, VCPU_SREG_LDTR
))
4504 if (kvm_load_segment_descriptor(vcpu
, tss
->es
, 1, VCPU_SREG_ES
))
4507 if (kvm_load_segment_descriptor(vcpu
, tss
->cs
, 9, VCPU_SREG_CS
))
4510 if (kvm_load_segment_descriptor(vcpu
, tss
->ss
, 1, VCPU_SREG_SS
))
4513 if (kvm_load_segment_descriptor(vcpu
, tss
->ds
, 1, VCPU_SREG_DS
))
4516 if (kvm_load_segment_descriptor(vcpu
, tss
->fs
, 1, VCPU_SREG_FS
))
4519 if (kvm_load_segment_descriptor(vcpu
, tss
->gs
, 1, VCPU_SREG_GS
))
4524 static void save_state_to_tss16(struct kvm_vcpu
*vcpu
,
4525 struct tss_segment_16
*tss
)
4527 tss
->ip
= kvm_rip_read(vcpu
);
4528 tss
->flag
= kvm_get_rflags(vcpu
);
4529 tss
->ax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4530 tss
->cx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4531 tss
->dx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4532 tss
->bx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
4533 tss
->sp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
4534 tss
->bp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
4535 tss
->si
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
4536 tss
->di
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
4538 tss
->es
= get_segment_selector(vcpu
, VCPU_SREG_ES
);
4539 tss
->cs
= get_segment_selector(vcpu
, VCPU_SREG_CS
);
4540 tss
->ss
= get_segment_selector(vcpu
, VCPU_SREG_SS
);
4541 tss
->ds
= get_segment_selector(vcpu
, VCPU_SREG_DS
);
4542 tss
->ldt
= get_segment_selector(vcpu
, VCPU_SREG_LDTR
);
4545 static int load_state_from_tss16(struct kvm_vcpu
*vcpu
,
4546 struct tss_segment_16
*tss
)
4548 kvm_rip_write(vcpu
, tss
->ip
);
4549 kvm_set_rflags(vcpu
, tss
->flag
| 2);
4550 kvm_register_write(vcpu
, VCPU_REGS_RAX
, tss
->ax
);
4551 kvm_register_write(vcpu
, VCPU_REGS_RCX
, tss
->cx
);
4552 kvm_register_write(vcpu
, VCPU_REGS_RDX
, tss
->dx
);
4553 kvm_register_write(vcpu
, VCPU_REGS_RBX
, tss
->bx
);
4554 kvm_register_write(vcpu
, VCPU_REGS_RSP
, tss
->sp
);
4555 kvm_register_write(vcpu
, VCPU_REGS_RBP
, tss
->bp
);
4556 kvm_register_write(vcpu
, VCPU_REGS_RSI
, tss
->si
);
4557 kvm_register_write(vcpu
, VCPU_REGS_RDI
, tss
->di
);
4559 if (kvm_load_segment_descriptor(vcpu
, tss
->ldt
, 0, VCPU_SREG_LDTR
))
4562 if (kvm_load_segment_descriptor(vcpu
, tss
->es
, 1, VCPU_SREG_ES
))
4565 if (kvm_load_segment_descriptor(vcpu
, tss
->cs
, 9, VCPU_SREG_CS
))
4568 if (kvm_load_segment_descriptor(vcpu
, tss
->ss
, 1, VCPU_SREG_SS
))
4571 if (kvm_load_segment_descriptor(vcpu
, tss
->ds
, 1, VCPU_SREG_DS
))
4576 static int kvm_task_switch_16(struct kvm_vcpu
*vcpu
, u16 tss_selector
,
4577 u16 old_tss_sel
, u32 old_tss_base
,
4578 struct desc_struct
*nseg_desc
)
4580 struct tss_segment_16 tss_segment_16
;
4583 if (kvm_read_guest(vcpu
->kvm
, old_tss_base
, &tss_segment_16
,
4584 sizeof tss_segment_16
))
4587 save_state_to_tss16(vcpu
, &tss_segment_16
);
4589 if (kvm_write_guest(vcpu
->kvm
, old_tss_base
, &tss_segment_16
,
4590 sizeof tss_segment_16
))
4593 if (kvm_read_guest(vcpu
->kvm
, get_tss_base_addr(vcpu
, nseg_desc
),
4594 &tss_segment_16
, sizeof tss_segment_16
))
4597 if (old_tss_sel
!= 0xffff) {
4598 tss_segment_16
.prev_task_link
= old_tss_sel
;
4600 if (kvm_write_guest(vcpu
->kvm
,
4601 get_tss_base_addr(vcpu
, nseg_desc
),
4602 &tss_segment_16
.prev_task_link
,
4603 sizeof tss_segment_16
.prev_task_link
))
4607 if (load_state_from_tss16(vcpu
, &tss_segment_16
))
4615 static int kvm_task_switch_32(struct kvm_vcpu
*vcpu
, u16 tss_selector
,
4616 u16 old_tss_sel
, u32 old_tss_base
,
4617 struct desc_struct
*nseg_desc
)
4619 struct tss_segment_32 tss_segment_32
;
4622 if (kvm_read_guest(vcpu
->kvm
, old_tss_base
, &tss_segment_32
,
4623 sizeof tss_segment_32
))
4626 save_state_to_tss32(vcpu
, &tss_segment_32
);
4628 if (kvm_write_guest(vcpu
->kvm
, old_tss_base
, &tss_segment_32
,
4629 sizeof tss_segment_32
))
4632 if (kvm_read_guest(vcpu
->kvm
, get_tss_base_addr(vcpu
, nseg_desc
),
4633 &tss_segment_32
, sizeof tss_segment_32
))
4636 if (old_tss_sel
!= 0xffff) {
4637 tss_segment_32
.prev_task_link
= old_tss_sel
;
4639 if (kvm_write_guest(vcpu
->kvm
,
4640 get_tss_base_addr(vcpu
, nseg_desc
),
4641 &tss_segment_32
.prev_task_link
,
4642 sizeof tss_segment_32
.prev_task_link
))
4646 if (load_state_from_tss32(vcpu
, &tss_segment_32
))
4654 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int reason
)
4656 struct kvm_segment tr_seg
;
4657 struct desc_struct cseg_desc
;
4658 struct desc_struct nseg_desc
;
4660 u32 old_tss_base
= get_segment_base(vcpu
, VCPU_SREG_TR
);
4661 u16 old_tss_sel
= get_segment_selector(vcpu
, VCPU_SREG_TR
);
4663 old_tss_base
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, old_tss_base
);
4665 /* FIXME: Handle errors. Failure to read either TSS or their
4666 * descriptors should generate a pagefault.
4668 if (load_guest_segment_descriptor(vcpu
, tss_selector
, &nseg_desc
))
4671 if (load_guest_segment_descriptor(vcpu
, old_tss_sel
, &cseg_desc
))
4674 if (reason
!= TASK_SWITCH_IRET
) {
4677 cpl
= kvm_x86_ops
->get_cpl(vcpu
);
4678 if ((tss_selector
& 3) > nseg_desc
.dpl
|| cpl
> nseg_desc
.dpl
) {
4679 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
4684 if (!nseg_desc
.p
|| get_desc_limit(&nseg_desc
) < 0x67) {
4685 kvm_queue_exception_e(vcpu
, TS_VECTOR
, tss_selector
& 0xfffc);
4689 if (reason
== TASK_SWITCH_IRET
|| reason
== TASK_SWITCH_JMP
) {
4690 cseg_desc
.type
&= ~(1 << 1); //clear the B flag
4691 save_guest_segment_descriptor(vcpu
, old_tss_sel
, &cseg_desc
);
4694 if (reason
== TASK_SWITCH_IRET
) {
4695 u32 eflags
= kvm_get_rflags(vcpu
);
4696 kvm_set_rflags(vcpu
, eflags
& ~X86_EFLAGS_NT
);
4699 /* set back link to prev task only if NT bit is set in eflags
4700 note that old_tss_sel is not used afetr this point */
4701 if (reason
!= TASK_SWITCH_CALL
&& reason
!= TASK_SWITCH_GATE
)
4702 old_tss_sel
= 0xffff;
4704 if (nseg_desc
.type
& 8)
4705 ret
= kvm_task_switch_32(vcpu
, tss_selector
, old_tss_sel
,
4706 old_tss_base
, &nseg_desc
);
4708 ret
= kvm_task_switch_16(vcpu
, tss_selector
, old_tss_sel
,
4709 old_tss_base
, &nseg_desc
);
4711 if (reason
== TASK_SWITCH_CALL
|| reason
== TASK_SWITCH_GATE
) {
4712 u32 eflags
= kvm_get_rflags(vcpu
);
4713 kvm_set_rflags(vcpu
, eflags
| X86_EFLAGS_NT
);
4716 if (reason
!= TASK_SWITCH_IRET
) {
4717 nseg_desc
.type
|= (1 << 1);
4718 save_guest_segment_descriptor(vcpu
, tss_selector
,
4722 kvm_x86_ops
->set_cr0(vcpu
, vcpu
->arch
.cr0
| X86_CR0_TS
);
4723 seg_desct_to_kvm_desct(&nseg_desc
, tss_selector
, &tr_seg
);
4725 kvm_set_segment(vcpu
, &tr_seg
, VCPU_SREG_TR
);
4729 EXPORT_SYMBOL_GPL(kvm_task_switch
);
4731 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
4732 struct kvm_sregs
*sregs
)
4734 int mmu_reset_needed
= 0;
4735 int pending_vec
, max_bits
;
4736 struct descriptor_table dt
;
4740 dt
.limit
= sregs
->idt
.limit
;
4741 dt
.base
= sregs
->idt
.base
;
4742 kvm_x86_ops
->set_idt(vcpu
, &dt
);
4743 dt
.limit
= sregs
->gdt
.limit
;
4744 dt
.base
= sregs
->gdt
.base
;
4745 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
4747 vcpu
->arch
.cr2
= sregs
->cr2
;
4748 mmu_reset_needed
|= vcpu
->arch
.cr3
!= sregs
->cr3
;
4749 vcpu
->arch
.cr3
= sregs
->cr3
;
4751 kvm_set_cr8(vcpu
, sregs
->cr8
);
4753 mmu_reset_needed
|= vcpu
->arch
.shadow_efer
!= sregs
->efer
;
4754 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
4755 kvm_set_apic_base(vcpu
, sregs
->apic_base
);
4757 mmu_reset_needed
|= vcpu
->arch
.cr0
!= sregs
->cr0
;
4758 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
4759 vcpu
->arch
.cr0
= sregs
->cr0
;
4761 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
4762 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
4763 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
4764 load_pdptrs(vcpu
, vcpu
->arch
.cr3
);
4765 mmu_reset_needed
= 1;
4768 if (mmu_reset_needed
)
4769 kvm_mmu_reset_context(vcpu
);
4771 max_bits
= (sizeof sregs
->interrupt_bitmap
) << 3;
4772 pending_vec
= find_first_bit(
4773 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
4774 if (pending_vec
< max_bits
) {
4775 kvm_queue_interrupt(vcpu
, pending_vec
, false);
4776 pr_debug("Set back pending irq %d\n", pending_vec
);
4777 if (irqchip_in_kernel(vcpu
->kvm
))
4778 kvm_pic_clear_isr_ack(vcpu
->kvm
);
4781 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
4782 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
4783 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
4784 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
4785 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
4786 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
4788 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
4789 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
4791 update_cr8_intercept(vcpu
);
4793 /* Older userspace won't unhalt the vcpu on reset. */
4794 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
4795 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
4796 !(vcpu
->arch
.cr0
& X86_CR0_PE
))
4797 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
4804 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
4805 struct kvm_guest_debug
*dbg
)
4807 unsigned long rflags
;
4812 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
4814 if (vcpu
->arch
.exception
.pending
)
4816 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
4817 kvm_queue_exception(vcpu
, DB_VECTOR
);
4819 kvm_queue_exception(vcpu
, BP_VECTOR
);
4823 * Read rflags as long as potentially injected trace flags are still
4826 rflags
= kvm_get_rflags(vcpu
);
4828 vcpu
->guest_debug
= dbg
->control
;
4829 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
4830 vcpu
->guest_debug
= 0;
4832 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
4833 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
4834 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
4835 vcpu
->arch
.switch_db_regs
=
4836 (dbg
->arch
.debugreg
[7] & DR7_BP_EN_MASK
);
4838 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
4839 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
4840 vcpu
->arch
.switch_db_regs
= (vcpu
->arch
.dr7
& DR7_BP_EN_MASK
);
4843 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
4844 vcpu
->arch
.singlestep_cs
=
4845 get_segment_selector(vcpu
, VCPU_SREG_CS
);
4846 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
);
4850 * Trigger an rflags update that will inject or remove the trace
4853 kvm_set_rflags(vcpu
, rflags
);
4855 kvm_x86_ops
->set_guest_debug(vcpu
, dbg
);
4866 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
4867 * we have asm/x86/processor.h
4878 u32 st_space
[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
4879 #ifdef CONFIG_X86_64
4880 u32 xmm_space
[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
4882 u32 xmm_space
[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
4887 * Translate a guest virtual address to a guest physical address.
4889 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
4890 struct kvm_translation
*tr
)
4892 unsigned long vaddr
= tr
->linear_address
;
4896 down_read(&vcpu
->kvm
->slots_lock
);
4897 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, vaddr
);
4898 up_read(&vcpu
->kvm
->slots_lock
);
4899 tr
->physical_address
= gpa
;
4900 tr
->valid
= gpa
!= UNMAPPED_GVA
;
4908 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
4910 struct fxsave
*fxsave
= (struct fxsave
*)&vcpu
->arch
.guest_fx_image
;
4914 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
4915 fpu
->fcw
= fxsave
->cwd
;
4916 fpu
->fsw
= fxsave
->swd
;
4917 fpu
->ftwx
= fxsave
->twd
;
4918 fpu
->last_opcode
= fxsave
->fop
;
4919 fpu
->last_ip
= fxsave
->rip
;
4920 fpu
->last_dp
= fxsave
->rdp
;
4921 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
4928 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
4930 struct fxsave
*fxsave
= (struct fxsave
*)&vcpu
->arch
.guest_fx_image
;
4934 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
4935 fxsave
->cwd
= fpu
->fcw
;
4936 fxsave
->swd
= fpu
->fsw
;
4937 fxsave
->twd
= fpu
->ftwx
;
4938 fxsave
->fop
= fpu
->last_opcode
;
4939 fxsave
->rip
= fpu
->last_ip
;
4940 fxsave
->rdp
= fpu
->last_dp
;
4941 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
4948 void fx_init(struct kvm_vcpu
*vcpu
)
4950 unsigned after_mxcsr_mask
;
4953 * Touch the fpu the first time in non atomic context as if
4954 * this is the first fpu instruction the exception handler
4955 * will fire before the instruction returns and it'll have to
4956 * allocate ram with GFP_KERNEL.
4959 kvm_fx_save(&vcpu
->arch
.host_fx_image
);
4961 /* Initialize guest FPU by resetting ours and saving into guest's */
4963 kvm_fx_save(&vcpu
->arch
.host_fx_image
);
4965 kvm_fx_save(&vcpu
->arch
.guest_fx_image
);
4966 kvm_fx_restore(&vcpu
->arch
.host_fx_image
);
4969 vcpu
->arch
.cr0
|= X86_CR0_ET
;
4970 after_mxcsr_mask
= offsetof(struct i387_fxsave_struct
, st_space
);
4971 vcpu
->arch
.guest_fx_image
.mxcsr
= 0x1f80;
4972 memset((void *)&vcpu
->arch
.guest_fx_image
+ after_mxcsr_mask
,
4973 0, sizeof(struct i387_fxsave_struct
) - after_mxcsr_mask
);
4975 EXPORT_SYMBOL_GPL(fx_init
);
4977 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
4979 if (!vcpu
->fpu_active
|| vcpu
->guest_fpu_loaded
)
4982 vcpu
->guest_fpu_loaded
= 1;
4983 kvm_fx_save(&vcpu
->arch
.host_fx_image
);
4984 kvm_fx_restore(&vcpu
->arch
.guest_fx_image
);
4986 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu
);
4988 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
4990 if (!vcpu
->guest_fpu_loaded
)
4993 vcpu
->guest_fpu_loaded
= 0;
4994 kvm_fx_save(&vcpu
->arch
.guest_fx_image
);
4995 kvm_fx_restore(&vcpu
->arch
.host_fx_image
);
4996 ++vcpu
->stat
.fpu_reload
;
4998 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu
);
5000 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
5002 if (vcpu
->arch
.time_page
) {
5003 kvm_release_page_dirty(vcpu
->arch
.time_page
);
5004 vcpu
->arch
.time_page
= NULL
;
5007 kvm_x86_ops
->vcpu_free(vcpu
);
5010 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
5013 return kvm_x86_ops
->vcpu_create(kvm
, id
);
5016 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
5020 /* We do fxsave: this must be aligned. */
5021 BUG_ON((unsigned long)&vcpu
->arch
.host_fx_image
& 0xF);
5023 vcpu
->arch
.mtrr_state
.have_fixed
= 1;
5025 r
= kvm_arch_vcpu_reset(vcpu
);
5027 r
= kvm_mmu_setup(vcpu
);
5034 kvm_x86_ops
->vcpu_free(vcpu
);
5038 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
5041 kvm_mmu_unload(vcpu
);
5044 kvm_x86_ops
->vcpu_free(vcpu
);
5047 int kvm_arch_vcpu_reset(struct kvm_vcpu
*vcpu
)
5049 vcpu
->arch
.nmi_pending
= false;
5050 vcpu
->arch
.nmi_injected
= false;
5052 vcpu
->arch
.switch_db_regs
= 0;
5053 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
5054 vcpu
->arch
.dr6
= DR6_FIXED_1
;
5055 vcpu
->arch
.dr7
= DR7_FIXED_1
;
5057 return kvm_x86_ops
->vcpu_reset(vcpu
);
5060 int kvm_arch_hardware_enable(void *garbage
)
5063 * Since this may be called from a hotplug notifcation,
5064 * we can't get the CPU frequency directly.
5066 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
5067 int cpu
= raw_smp_processor_id();
5068 per_cpu(cpu_tsc_khz
, cpu
) = 0;
5071 kvm_shared_msr_cpu_online();
5073 return kvm_x86_ops
->hardware_enable(garbage
);
5076 void kvm_arch_hardware_disable(void *garbage
)
5078 kvm_x86_ops
->hardware_disable(garbage
);
5079 drop_user_return_notifiers(garbage
);
5082 int kvm_arch_hardware_setup(void)
5084 return kvm_x86_ops
->hardware_setup();
5087 void kvm_arch_hardware_unsetup(void)
5089 kvm_x86_ops
->hardware_unsetup();
5092 void kvm_arch_check_processor_compat(void *rtn
)
5094 kvm_x86_ops
->check_processor_compatibility(rtn
);
5097 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
5103 BUG_ON(vcpu
->kvm
== NULL
);
5106 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
5107 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_bsp(vcpu
))
5108 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
5110 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
5112 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
5117 vcpu
->arch
.pio_data
= page_address(page
);
5119 r
= kvm_mmu_create(vcpu
);
5121 goto fail_free_pio_data
;
5123 if (irqchip_in_kernel(kvm
)) {
5124 r
= kvm_create_lapic(vcpu
);
5126 goto fail_mmu_destroy
;
5129 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
5131 if (!vcpu
->arch
.mce_banks
) {
5133 goto fail_free_lapic
;
5135 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
5139 kvm_free_lapic(vcpu
);
5141 kvm_mmu_destroy(vcpu
);
5143 free_page((unsigned long)vcpu
->arch
.pio_data
);
5148 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
5150 kfree(vcpu
->arch
.mce_banks
);
5151 kvm_free_lapic(vcpu
);
5152 down_read(&vcpu
->kvm
->slots_lock
);
5153 kvm_mmu_destroy(vcpu
);
5154 up_read(&vcpu
->kvm
->slots_lock
);
5155 free_page((unsigned long)vcpu
->arch
.pio_data
);
5158 struct kvm
*kvm_arch_create_vm(void)
5160 struct kvm
*kvm
= kzalloc(sizeof(struct kvm
), GFP_KERNEL
);
5163 return ERR_PTR(-ENOMEM
);
5165 kvm
->arch
.aliases
= kzalloc(sizeof(struct kvm_mem_aliases
), GFP_KERNEL
);
5166 if (!kvm
->arch
.aliases
) {
5168 return ERR_PTR(-ENOMEM
);
5171 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
5172 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
5174 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5175 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
5177 rdtscll(kvm
->arch
.vm_init_tsc
);
5182 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
5185 kvm_mmu_unload(vcpu
);
5189 static void kvm_free_vcpus(struct kvm
*kvm
)
5192 struct kvm_vcpu
*vcpu
;
5195 * Unpin any mmu pages first.
5197 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5198 kvm_unload_vcpu_mmu(vcpu
);
5199 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5200 kvm_arch_vcpu_free(vcpu
);
5202 mutex_lock(&kvm
->lock
);
5203 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
5204 kvm
->vcpus
[i
] = NULL
;
5206 atomic_set(&kvm
->online_vcpus
, 0);
5207 mutex_unlock(&kvm
->lock
);
5210 void kvm_arch_sync_events(struct kvm
*kvm
)
5212 kvm_free_all_assigned_devices(kvm
);
5215 void kvm_arch_destroy_vm(struct kvm
*kvm
)
5217 kvm_iommu_unmap_guest(kvm
);
5219 kfree(kvm
->arch
.vpic
);
5220 kfree(kvm
->arch
.vioapic
);
5221 kvm_free_vcpus(kvm
);
5222 kvm_free_physmem(kvm
);
5223 if (kvm
->arch
.apic_access_page
)
5224 put_page(kvm
->arch
.apic_access_page
);
5225 if (kvm
->arch
.ept_identity_pagetable
)
5226 put_page(kvm
->arch
.ept_identity_pagetable
);
5227 kfree(kvm
->arch
.aliases
);
5231 int kvm_arch_set_memory_region(struct kvm
*kvm
,
5232 struct kvm_userspace_memory_region
*mem
,
5233 struct kvm_memory_slot old
,
5236 int npages
= mem
->memory_size
>> PAGE_SHIFT
;
5237 struct kvm_memory_slot
*memslot
= &kvm
->memslots
->memslots
[mem
->slot
];
5239 /*To keep backward compatibility with older userspace,
5240 *x86 needs to hanlde !user_alloc case.
5243 if (npages
&& !old
.rmap
) {
5244 unsigned long userspace_addr
;
5246 down_write(¤t
->mm
->mmap_sem
);
5247 userspace_addr
= do_mmap(NULL
, 0,
5249 PROT_READ
| PROT_WRITE
,
5250 MAP_PRIVATE
| MAP_ANONYMOUS
,
5252 up_write(¤t
->mm
->mmap_sem
);
5254 if (IS_ERR((void *)userspace_addr
))
5255 return PTR_ERR((void *)userspace_addr
);
5257 /* set userspace_addr atomically for kvm_hva_to_rmapp */
5258 spin_lock(&kvm
->mmu_lock
);
5259 memslot
->userspace_addr
= userspace_addr
;
5260 spin_unlock(&kvm
->mmu_lock
);
5262 if (!old
.user_alloc
&& old
.rmap
) {
5265 down_write(¤t
->mm
->mmap_sem
);
5266 ret
= do_munmap(current
->mm
, old
.userspace_addr
,
5267 old
.npages
* PAGE_SIZE
);
5268 up_write(¤t
->mm
->mmap_sem
);
5271 "kvm_vm_ioctl_set_memory_region: "
5272 "failed to munmap memory\n");
5277 spin_lock(&kvm
->mmu_lock
);
5278 if (!kvm
->arch
.n_requested_mmu_pages
) {
5279 unsigned int nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
5280 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
5283 kvm_mmu_slot_remove_write_access(kvm
, mem
->slot
);
5284 spin_unlock(&kvm
->mmu_lock
);
5289 void kvm_arch_flush_shadow(struct kvm
*kvm
)
5291 kvm_mmu_zap_all(kvm
);
5292 kvm_reload_remote_mmus(kvm
);
5295 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
5297 return vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
5298 || vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
5299 || vcpu
->arch
.nmi_pending
||
5300 (kvm_arch_interrupt_allowed(vcpu
) &&
5301 kvm_cpu_has_interrupt(vcpu
));
5304 void kvm_vcpu_kick(struct kvm_vcpu
*vcpu
)
5307 int cpu
= vcpu
->cpu
;
5309 if (waitqueue_active(&vcpu
->wq
)) {
5310 wake_up_interruptible(&vcpu
->wq
);
5311 ++vcpu
->stat
.halt_wakeup
;
5315 if (cpu
!= me
&& (unsigned)cpu
< nr_cpu_ids
&& cpu_online(cpu
))
5316 if (!test_and_set_bit(KVM_REQ_KICK
, &vcpu
->requests
))
5317 smp_send_reschedule(cpu
);
5321 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
5323 return kvm_x86_ops
->interrupt_allowed(vcpu
);
5326 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
5328 unsigned long rflags
;
5330 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5331 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
5332 rflags
&= ~(unsigned long)(X86_EFLAGS_TF
| X86_EFLAGS_RF
);
5335 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
5337 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
5339 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
5340 vcpu
->arch
.singlestep_cs
==
5341 get_segment_selector(vcpu
, VCPU_SREG_CS
) &&
5342 vcpu
->arch
.singlestep_rip
== kvm_rip_read(vcpu
))
5343 rflags
|= X86_EFLAGS_TF
| X86_EFLAGS_RF
;
5344 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
5346 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
5348 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
5349 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
5350 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
5351 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
5352 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
5353 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
5354 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
5355 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
5356 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
5357 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
5358 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);