x86: PAT infrastructure patch
[deliverable/linux.git] / arch / x86 / mm / pageattr.c
1 /*
2 * Copyright 2002 Andi Kleen, SuSE Labs.
3 * Thanks to Ben LaHaise for precious feedback.
4 */
5 #include <linux/highmem.h>
6 #include <linux/bootmem.h>
7 #include <linux/module.h>
8 #include <linux/sched.h>
9 #include <linux/slab.h>
10 #include <linux/mm.h>
11 #include <linux/interrupt.h>
12 #include <linux/seq_file.h>
13 #include <linux/debugfs.h>
14
15 #include <asm/e820.h>
16 #include <asm/processor.h>
17 #include <asm/tlbflush.h>
18 #include <asm/sections.h>
19 #include <asm/uaccess.h>
20 #include <asm/pgalloc.h>
21 #include <asm/proto.h>
22
23 /*
24 * The current flushing context - we pass it instead of 5 arguments:
25 */
26 struct cpa_data {
27 unsigned long vaddr;
28 pgprot_t mask_set;
29 pgprot_t mask_clr;
30 int numpages;
31 int flushtlb;
32 unsigned long pfn;
33 };
34
35 #ifdef CONFIG_X86_64
36
37 static inline unsigned long highmap_start_pfn(void)
38 {
39 return __pa(_text) >> PAGE_SHIFT;
40 }
41
42 static inline unsigned long highmap_end_pfn(void)
43 {
44 return __pa(round_up((unsigned long)_end, PMD_SIZE)) >> PAGE_SHIFT;
45 }
46
47 #endif
48
49 #ifdef CONFIG_DEBUG_PAGEALLOC
50 # define debug_pagealloc 1
51 #else
52 # define debug_pagealloc 0
53 #endif
54
55 static inline int
56 within(unsigned long addr, unsigned long start, unsigned long end)
57 {
58 return addr >= start && addr < end;
59 }
60
61 /*
62 * Flushing functions
63 */
64
65 /**
66 * clflush_cache_range - flush a cache range with clflush
67 * @addr: virtual start address
68 * @size: number of bytes to flush
69 *
70 * clflush is an unordered instruction which needs fencing with mfence
71 * to avoid ordering issues.
72 */
73 void clflush_cache_range(void *vaddr, unsigned int size)
74 {
75 void *vend = vaddr + size - 1;
76
77 mb();
78
79 for (; vaddr < vend; vaddr += boot_cpu_data.x86_clflush_size)
80 clflush(vaddr);
81 /*
82 * Flush any possible final partial cacheline:
83 */
84 clflush(vend);
85
86 mb();
87 }
88
89 static void __cpa_flush_all(void *arg)
90 {
91 unsigned long cache = (unsigned long)arg;
92
93 /*
94 * Flush all to work around Errata in early athlons regarding
95 * large page flushing.
96 */
97 __flush_tlb_all();
98
99 if (cache && boot_cpu_data.x86_model >= 4)
100 wbinvd();
101 }
102
103 static void cpa_flush_all(unsigned long cache)
104 {
105 BUG_ON(irqs_disabled());
106
107 on_each_cpu(__cpa_flush_all, (void *) cache, 1, 1);
108 }
109
110 static void __cpa_flush_range(void *arg)
111 {
112 /*
113 * We could optimize that further and do individual per page
114 * tlb invalidates for a low number of pages. Caveat: we must
115 * flush the high aliases on 64bit as well.
116 */
117 __flush_tlb_all();
118 }
119
120 static void cpa_flush_range(unsigned long start, int numpages, int cache)
121 {
122 unsigned int i, level;
123 unsigned long addr;
124
125 BUG_ON(irqs_disabled());
126 WARN_ON(PAGE_ALIGN(start) != start);
127
128 on_each_cpu(__cpa_flush_range, NULL, 1, 1);
129
130 if (!cache)
131 return;
132
133 /*
134 * We only need to flush on one CPU,
135 * clflush is a MESI-coherent instruction that
136 * will cause all other CPUs to flush the same
137 * cachelines:
138 */
139 for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
140 pte_t *pte = lookup_address(addr, &level);
141
142 /*
143 * Only flush present addresses:
144 */
145 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
146 clflush_cache_range((void *) addr, PAGE_SIZE);
147 }
148 }
149
150 /*
151 * Certain areas of memory on x86 require very specific protection flags,
152 * for example the BIOS area or kernel text. Callers don't always get this
153 * right (again, ioremap() on BIOS memory is not uncommon) so this function
154 * checks and fixes these known static required protection bits.
155 */
156 static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
157 unsigned long pfn)
158 {
159 pgprot_t forbidden = __pgprot(0);
160
161 /*
162 * The BIOS area between 640k and 1Mb needs to be executable for
163 * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
164 */
165 if (within(pfn, BIOS_BEGIN >> PAGE_SHIFT, BIOS_END >> PAGE_SHIFT))
166 pgprot_val(forbidden) |= _PAGE_NX;
167
168 /*
169 * The kernel text needs to be executable for obvious reasons
170 * Does not cover __inittext since that is gone later on. On
171 * 64bit we do not enforce !NX on the low mapping
172 */
173 if (within(address, (unsigned long)_text, (unsigned long)_etext))
174 pgprot_val(forbidden) |= _PAGE_NX;
175
176 /*
177 * The .rodata section needs to be read-only. Using the pfn
178 * catches all aliases.
179 */
180 if (within(pfn, __pa((unsigned long)__start_rodata) >> PAGE_SHIFT,
181 __pa((unsigned long)__end_rodata) >> PAGE_SHIFT))
182 pgprot_val(forbidden) |= _PAGE_RW;
183
184 prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
185
186 return prot;
187 }
188
189 /*
190 * Lookup the page table entry for a virtual address. Return a pointer
191 * to the entry and the level of the mapping.
192 *
193 * Note: We return pud and pmd either when the entry is marked large
194 * or when the present bit is not set. Otherwise we would return a
195 * pointer to a nonexisting mapping.
196 */
197 pte_t *lookup_address(unsigned long address, unsigned int *level)
198 {
199 pgd_t *pgd = pgd_offset_k(address);
200 pud_t *pud;
201 pmd_t *pmd;
202
203 *level = PG_LEVEL_NONE;
204
205 if (pgd_none(*pgd))
206 return NULL;
207
208 pud = pud_offset(pgd, address);
209 if (pud_none(*pud))
210 return NULL;
211
212 *level = PG_LEVEL_1G;
213 if (pud_large(*pud) || !pud_present(*pud))
214 return (pte_t *)pud;
215
216 pmd = pmd_offset(pud, address);
217 if (pmd_none(*pmd))
218 return NULL;
219
220 *level = PG_LEVEL_2M;
221 if (pmd_large(*pmd) || !pmd_present(*pmd))
222 return (pte_t *)pmd;
223
224 *level = PG_LEVEL_4K;
225
226 return pte_offset_kernel(pmd, address);
227 }
228
229 /*
230 * Set the new pmd in all the pgds we know about:
231 */
232 static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
233 {
234 /* change init_mm */
235 set_pte_atomic(kpte, pte);
236 #ifdef CONFIG_X86_32
237 if (!SHARED_KERNEL_PMD) {
238 struct page *page;
239
240 list_for_each_entry(page, &pgd_list, lru) {
241 pgd_t *pgd;
242 pud_t *pud;
243 pmd_t *pmd;
244
245 pgd = (pgd_t *)page_address(page) + pgd_index(address);
246 pud = pud_offset(pgd, address);
247 pmd = pmd_offset(pud, address);
248 set_pte_atomic((pte_t *)pmd, pte);
249 }
250 }
251 #endif
252 }
253
254 static int
255 try_preserve_large_page(pte_t *kpte, unsigned long address,
256 struct cpa_data *cpa)
257 {
258 unsigned long nextpage_addr, numpages, pmask, psize, flags, addr, pfn;
259 pte_t new_pte, old_pte, *tmp;
260 pgprot_t old_prot, new_prot;
261 int i, do_split = 1;
262 unsigned int level;
263
264 spin_lock_irqsave(&pgd_lock, flags);
265 /*
266 * Check for races, another CPU might have split this page
267 * up already:
268 */
269 tmp = lookup_address(address, &level);
270 if (tmp != kpte)
271 goto out_unlock;
272
273 switch (level) {
274 case PG_LEVEL_2M:
275 psize = PMD_PAGE_SIZE;
276 pmask = PMD_PAGE_MASK;
277 break;
278 #ifdef CONFIG_X86_64
279 case PG_LEVEL_1G:
280 psize = PUD_PAGE_SIZE;
281 pmask = PUD_PAGE_MASK;
282 break;
283 #endif
284 default:
285 do_split = -EINVAL;
286 goto out_unlock;
287 }
288
289 /*
290 * Calculate the number of pages, which fit into this large
291 * page starting at address:
292 */
293 nextpage_addr = (address + psize) & pmask;
294 numpages = (nextpage_addr - address) >> PAGE_SHIFT;
295 if (numpages < cpa->numpages)
296 cpa->numpages = numpages;
297
298 /*
299 * We are safe now. Check whether the new pgprot is the same:
300 */
301 old_pte = *kpte;
302 old_prot = new_prot = pte_pgprot(old_pte);
303
304 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
305 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
306
307 /*
308 * old_pte points to the large page base address. So we need
309 * to add the offset of the virtual address:
310 */
311 pfn = pte_pfn(old_pte) + ((address & (psize - 1)) >> PAGE_SHIFT);
312 cpa->pfn = pfn;
313
314 new_prot = static_protections(new_prot, address, pfn);
315
316 /*
317 * We need to check the full range, whether
318 * static_protection() requires a different pgprot for one of
319 * the pages in the range we try to preserve:
320 */
321 addr = address + PAGE_SIZE;
322 pfn++;
323 for (i = 1; i < cpa->numpages; i++, addr += PAGE_SIZE, pfn++) {
324 pgprot_t chk_prot = static_protections(new_prot, addr, pfn);
325
326 if (pgprot_val(chk_prot) != pgprot_val(new_prot))
327 goto out_unlock;
328 }
329
330 /*
331 * If there are no changes, return. maxpages has been updated
332 * above:
333 */
334 if (pgprot_val(new_prot) == pgprot_val(old_prot)) {
335 do_split = 0;
336 goto out_unlock;
337 }
338
339 /*
340 * We need to change the attributes. Check, whether we can
341 * change the large page in one go. We request a split, when
342 * the address is not aligned and the number of pages is
343 * smaller than the number of pages in the large page. Note
344 * that we limited the number of possible pages already to
345 * the number of pages in the large page.
346 */
347 if (address == (nextpage_addr - psize) && cpa->numpages == numpages) {
348 /*
349 * The address is aligned and the number of pages
350 * covers the full page.
351 */
352 new_pte = pfn_pte(pte_pfn(old_pte), canon_pgprot(new_prot));
353 __set_pmd_pte(kpte, address, new_pte);
354 cpa->flushtlb = 1;
355 do_split = 0;
356 }
357
358 out_unlock:
359 spin_unlock_irqrestore(&pgd_lock, flags);
360
361 return do_split;
362 }
363
364 static LIST_HEAD(page_pool);
365 static unsigned long pool_size, pool_pages, pool_low;
366 static unsigned long pool_used, pool_failed;
367
368 static void cpa_fill_pool(struct page **ret)
369 {
370 gfp_t gfp = GFP_KERNEL;
371 unsigned long flags;
372 struct page *p;
373
374 /*
375 * Avoid recursion (on debug-pagealloc) and also signal
376 * our priority to get to these pagetables:
377 */
378 if (current->flags & PF_MEMALLOC)
379 return;
380 current->flags |= PF_MEMALLOC;
381
382 /*
383 * Allocate atomically from atomic contexts:
384 */
385 if (in_atomic() || irqs_disabled() || debug_pagealloc)
386 gfp = GFP_ATOMIC | __GFP_NORETRY | __GFP_NOWARN;
387
388 while (pool_pages < pool_size || (ret && !*ret)) {
389 p = alloc_pages(gfp, 0);
390 if (!p) {
391 pool_failed++;
392 break;
393 }
394 /*
395 * If the call site needs a page right now, provide it:
396 */
397 if (ret && !*ret) {
398 *ret = p;
399 continue;
400 }
401 spin_lock_irqsave(&pgd_lock, flags);
402 list_add(&p->lru, &page_pool);
403 pool_pages++;
404 spin_unlock_irqrestore(&pgd_lock, flags);
405 }
406
407 current->flags &= ~PF_MEMALLOC;
408 }
409
410 #define SHIFT_MB (20 - PAGE_SHIFT)
411 #define ROUND_MB_GB ((1 << 10) - 1)
412 #define SHIFT_MB_GB 10
413 #define POOL_PAGES_PER_GB 16
414
415 void __init cpa_init(void)
416 {
417 struct sysinfo si;
418 unsigned long gb;
419
420 si_meminfo(&si);
421 /*
422 * Calculate the number of pool pages:
423 *
424 * Convert totalram (nr of pages) to MiB and round to the next
425 * GiB. Shift MiB to Gib and multiply the result by
426 * POOL_PAGES_PER_GB:
427 */
428 if (debug_pagealloc) {
429 gb = ((si.totalram >> SHIFT_MB) + ROUND_MB_GB) >> SHIFT_MB_GB;
430 pool_size = POOL_PAGES_PER_GB * gb;
431 } else {
432 pool_size = 1;
433 }
434 pool_low = pool_size;
435
436 cpa_fill_pool(NULL);
437 printk(KERN_DEBUG
438 "CPA: page pool initialized %lu of %lu pages preallocated\n",
439 pool_pages, pool_size);
440 }
441
442 static int split_large_page(pte_t *kpte, unsigned long address)
443 {
444 unsigned long flags, pfn, pfninc = 1;
445 unsigned int i, level;
446 pte_t *pbase, *tmp;
447 pgprot_t ref_prot;
448 struct page *base;
449
450 /*
451 * Get a page from the pool. The pool list is protected by the
452 * pgd_lock, which we have to take anyway for the split
453 * operation:
454 */
455 spin_lock_irqsave(&pgd_lock, flags);
456 if (list_empty(&page_pool)) {
457 spin_unlock_irqrestore(&pgd_lock, flags);
458 base = NULL;
459 cpa_fill_pool(&base);
460 if (!base)
461 return -ENOMEM;
462 spin_lock_irqsave(&pgd_lock, flags);
463 } else {
464 base = list_first_entry(&page_pool, struct page, lru);
465 list_del(&base->lru);
466 pool_pages--;
467
468 if (pool_pages < pool_low)
469 pool_low = pool_pages;
470 }
471
472 /*
473 * Check for races, another CPU might have split this page
474 * up for us already:
475 */
476 tmp = lookup_address(address, &level);
477 if (tmp != kpte)
478 goto out_unlock;
479
480 pbase = (pte_t *)page_address(base);
481 #ifdef CONFIG_X86_32
482 paravirt_alloc_pt(&init_mm, page_to_pfn(base));
483 #endif
484 ref_prot = pte_pgprot(pte_clrhuge(*kpte));
485
486 #ifdef CONFIG_X86_64
487 if (level == PG_LEVEL_1G) {
488 pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT;
489 pgprot_val(ref_prot) |= _PAGE_PSE;
490 }
491 #endif
492
493 /*
494 * Get the target pfn from the original entry:
495 */
496 pfn = pte_pfn(*kpte);
497 for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc)
498 set_pte(&pbase[i], pfn_pte(pfn, ref_prot));
499
500 /*
501 * Install the new, split up pagetable. Important details here:
502 *
503 * On Intel the NX bit of all levels must be cleared to make a
504 * page executable. See section 4.13.2 of Intel 64 and IA-32
505 * Architectures Software Developer's Manual).
506 *
507 * Mark the entry present. The current mapping might be
508 * set to not present, which we preserved above.
509 */
510 ref_prot = pte_pgprot(pte_mkexec(pte_clrhuge(*kpte)));
511 pgprot_val(ref_prot) |= _PAGE_PRESENT;
512 __set_pmd_pte(kpte, address, mk_pte(base, ref_prot));
513 base = NULL;
514
515 out_unlock:
516 /*
517 * If we dropped out via the lookup_address check under
518 * pgd_lock then stick the page back into the pool:
519 */
520 if (base) {
521 list_add(&base->lru, &page_pool);
522 pool_pages++;
523 } else
524 pool_used++;
525 spin_unlock_irqrestore(&pgd_lock, flags);
526
527 return 0;
528 }
529
530 static int __change_page_attr(struct cpa_data *cpa, int primary)
531 {
532 unsigned long address = cpa->vaddr;
533 int do_split, err;
534 unsigned int level;
535 pte_t *kpte, old_pte;
536
537 repeat:
538 kpte = lookup_address(address, &level);
539 if (!kpte)
540 return primary ? -EINVAL : 0;
541
542 old_pte = *kpte;
543 if (!pte_val(old_pte)) {
544 if (!primary)
545 return 0;
546 printk(KERN_WARNING "CPA: called for zero pte. "
547 "vaddr = %lx cpa->vaddr = %lx\n", address,
548 cpa->vaddr);
549 WARN_ON(1);
550 return -EINVAL;
551 }
552
553 if (level == PG_LEVEL_4K) {
554 pte_t new_pte;
555 pgprot_t new_prot = pte_pgprot(old_pte);
556 unsigned long pfn = pte_pfn(old_pte);
557
558 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
559 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
560
561 new_prot = static_protections(new_prot, address, pfn);
562
563 /*
564 * We need to keep the pfn from the existing PTE,
565 * after all we're only going to change it's attributes
566 * not the memory it points to
567 */
568 new_pte = pfn_pte(pfn, canon_pgprot(new_prot));
569 cpa->pfn = pfn;
570 /*
571 * Do we really change anything ?
572 */
573 if (pte_val(old_pte) != pte_val(new_pte)) {
574 set_pte_atomic(kpte, new_pte);
575 cpa->flushtlb = 1;
576 }
577 cpa->numpages = 1;
578 return 0;
579 }
580
581 /*
582 * Check, whether we can keep the large page intact
583 * and just change the pte:
584 */
585 do_split = try_preserve_large_page(kpte, address, cpa);
586 /*
587 * When the range fits into the existing large page,
588 * return. cp->numpages and cpa->tlbflush have been updated in
589 * try_large_page:
590 */
591 if (do_split <= 0)
592 return do_split;
593
594 /*
595 * We have to split the large page:
596 */
597 err = split_large_page(kpte, address);
598 if (!err) {
599 cpa->flushtlb = 1;
600 goto repeat;
601 }
602
603 return err;
604 }
605
606 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias);
607
608 static int cpa_process_alias(struct cpa_data *cpa)
609 {
610 struct cpa_data alias_cpa;
611 int ret = 0;
612
613 if (cpa->pfn > max_pfn_mapped)
614 return 0;
615
616 /*
617 * No need to redo, when the primary call touched the direct
618 * mapping already:
619 */
620 if (!within(cpa->vaddr, PAGE_OFFSET,
621 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT))) {
622
623 alias_cpa = *cpa;
624 alias_cpa.vaddr = (unsigned long) __va(cpa->pfn << PAGE_SHIFT);
625
626 ret = __change_page_attr_set_clr(&alias_cpa, 0);
627 }
628
629 #ifdef CONFIG_X86_64
630 if (ret)
631 return ret;
632 /*
633 * No need to redo, when the primary call touched the high
634 * mapping already:
635 */
636 if (within(cpa->vaddr, (unsigned long) _text, (unsigned long) _end))
637 return 0;
638
639 /*
640 * If the physical address is inside the kernel map, we need
641 * to touch the high mapped kernel as well:
642 */
643 if (!within(cpa->pfn, highmap_start_pfn(), highmap_end_pfn()))
644 return 0;
645
646 alias_cpa = *cpa;
647 alias_cpa.vaddr =
648 (cpa->pfn << PAGE_SHIFT) + __START_KERNEL_map - phys_base;
649
650 /*
651 * The high mapping range is imprecise, so ignore the return value.
652 */
653 __change_page_attr_set_clr(&alias_cpa, 0);
654 #endif
655 return ret;
656 }
657
658 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias)
659 {
660 int ret, numpages = cpa->numpages;
661
662 while (numpages) {
663 /*
664 * Store the remaining nr of pages for the large page
665 * preservation check.
666 */
667 cpa->numpages = numpages;
668
669 ret = __change_page_attr(cpa, checkalias);
670 if (ret)
671 return ret;
672
673 if (checkalias) {
674 ret = cpa_process_alias(cpa);
675 if (ret)
676 return ret;
677 }
678
679 /*
680 * Adjust the number of pages with the result of the
681 * CPA operation. Either a large page has been
682 * preserved or a single page update happened.
683 */
684 BUG_ON(cpa->numpages > numpages);
685 numpages -= cpa->numpages;
686 cpa->vaddr += cpa->numpages * PAGE_SIZE;
687 }
688 return 0;
689 }
690
691 static inline int cache_attr(pgprot_t attr)
692 {
693 return pgprot_val(attr) &
694 (_PAGE_PAT | _PAGE_PAT_LARGE | _PAGE_PWT | _PAGE_PCD);
695 }
696
697 static int change_page_attr_set_clr(unsigned long addr, int numpages,
698 pgprot_t mask_set, pgprot_t mask_clr)
699 {
700 struct cpa_data cpa;
701 int ret, cache, checkalias;
702
703 /*
704 * Check, if we are requested to change a not supported
705 * feature:
706 */
707 mask_set = canon_pgprot(mask_set);
708 mask_clr = canon_pgprot(mask_clr);
709 if (!pgprot_val(mask_set) && !pgprot_val(mask_clr))
710 return 0;
711
712 /* Ensure we are PAGE_SIZE aligned */
713 if (addr & ~PAGE_MASK) {
714 addr &= PAGE_MASK;
715 /*
716 * People should not be passing in unaligned addresses:
717 */
718 WARN_ON_ONCE(1);
719 }
720
721 cpa.vaddr = addr;
722 cpa.numpages = numpages;
723 cpa.mask_set = mask_set;
724 cpa.mask_clr = mask_clr;
725 cpa.flushtlb = 0;
726
727 /* No alias checking for _NX bit modifications */
728 checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX;
729
730 ret = __change_page_attr_set_clr(&cpa, checkalias);
731
732 /*
733 * Check whether we really changed something:
734 */
735 if (!cpa.flushtlb)
736 goto out;
737
738 /*
739 * No need to flush, when we did not set any of the caching
740 * attributes:
741 */
742 cache = cache_attr(mask_set);
743
744 /*
745 * On success we use clflush, when the CPU supports it to
746 * avoid the wbindv. If the CPU does not support it and in the
747 * error case we fall back to cpa_flush_all (which uses
748 * wbindv):
749 */
750 if (!ret && cpu_has_clflush)
751 cpa_flush_range(addr, numpages, cache);
752 else
753 cpa_flush_all(cache);
754
755 out:
756 cpa_fill_pool(NULL);
757
758 return ret;
759 }
760
761 static inline int change_page_attr_set(unsigned long addr, int numpages,
762 pgprot_t mask)
763 {
764 return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0));
765 }
766
767 static inline int change_page_attr_clear(unsigned long addr, int numpages,
768 pgprot_t mask)
769 {
770 return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask);
771 }
772
773 int set_memory_uc(unsigned long addr, int numpages)
774 {
775 return change_page_attr_set(addr, numpages,
776 __pgprot(_PAGE_CACHE_UC));
777 }
778 EXPORT_SYMBOL(set_memory_uc);
779
780 int set_memory_wb(unsigned long addr, int numpages)
781 {
782 return change_page_attr_clear(addr, numpages,
783 __pgprot(_PAGE_CACHE_MASK));
784 }
785 EXPORT_SYMBOL(set_memory_wb);
786
787 int set_memory_x(unsigned long addr, int numpages)
788 {
789 return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_NX));
790 }
791 EXPORT_SYMBOL(set_memory_x);
792
793 int set_memory_nx(unsigned long addr, int numpages)
794 {
795 return change_page_attr_set(addr, numpages, __pgprot(_PAGE_NX));
796 }
797 EXPORT_SYMBOL(set_memory_nx);
798
799 int set_memory_ro(unsigned long addr, int numpages)
800 {
801 return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_RW));
802 }
803
804 int set_memory_rw(unsigned long addr, int numpages)
805 {
806 return change_page_attr_set(addr, numpages, __pgprot(_PAGE_RW));
807 }
808
809 int set_memory_np(unsigned long addr, int numpages)
810 {
811 return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_PRESENT));
812 }
813
814 int set_pages_uc(struct page *page, int numpages)
815 {
816 unsigned long addr = (unsigned long)page_address(page);
817
818 return set_memory_uc(addr, numpages);
819 }
820 EXPORT_SYMBOL(set_pages_uc);
821
822 int set_pages_wb(struct page *page, int numpages)
823 {
824 unsigned long addr = (unsigned long)page_address(page);
825
826 return set_memory_wb(addr, numpages);
827 }
828 EXPORT_SYMBOL(set_pages_wb);
829
830 int set_pages_x(struct page *page, int numpages)
831 {
832 unsigned long addr = (unsigned long)page_address(page);
833
834 return set_memory_x(addr, numpages);
835 }
836 EXPORT_SYMBOL(set_pages_x);
837
838 int set_pages_nx(struct page *page, int numpages)
839 {
840 unsigned long addr = (unsigned long)page_address(page);
841
842 return set_memory_nx(addr, numpages);
843 }
844 EXPORT_SYMBOL(set_pages_nx);
845
846 int set_pages_ro(struct page *page, int numpages)
847 {
848 unsigned long addr = (unsigned long)page_address(page);
849
850 return set_memory_ro(addr, numpages);
851 }
852
853 int set_pages_rw(struct page *page, int numpages)
854 {
855 unsigned long addr = (unsigned long)page_address(page);
856
857 return set_memory_rw(addr, numpages);
858 }
859
860 #ifdef CONFIG_DEBUG_PAGEALLOC
861
862 static int __set_pages_p(struct page *page, int numpages)
863 {
864 struct cpa_data cpa = { .vaddr = (unsigned long) page_address(page),
865 .numpages = numpages,
866 .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
867 .mask_clr = __pgprot(0)};
868
869 return __change_page_attr_set_clr(&cpa, 1);
870 }
871
872 static int __set_pages_np(struct page *page, int numpages)
873 {
874 struct cpa_data cpa = { .vaddr = (unsigned long) page_address(page),
875 .numpages = numpages,
876 .mask_set = __pgprot(0),
877 .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW)};
878
879 return __change_page_attr_set_clr(&cpa, 1);
880 }
881
882 void kernel_map_pages(struct page *page, int numpages, int enable)
883 {
884 if (PageHighMem(page))
885 return;
886 if (!enable) {
887 debug_check_no_locks_freed(page_address(page),
888 numpages * PAGE_SIZE);
889 }
890
891 /*
892 * If page allocator is not up yet then do not call c_p_a():
893 */
894 if (!debug_pagealloc_enabled)
895 return;
896
897 /*
898 * The return value is ignored as the calls cannot fail.
899 * Large pages are kept enabled at boot time, and are
900 * split up quickly with DEBUG_PAGEALLOC. If a splitup
901 * fails here (due to temporary memory shortage) no damage
902 * is done because we just keep the largepage intact up
903 * to the next attempt when it will likely be split up:
904 */
905 if (enable)
906 __set_pages_p(page, numpages);
907 else
908 __set_pages_np(page, numpages);
909
910 /*
911 * We should perform an IPI and flush all tlbs,
912 * but that can deadlock->flush only current cpu:
913 */
914 __flush_tlb_all();
915
916 /*
917 * Try to refill the page pool here. We can do this only after
918 * the tlb flush.
919 */
920 cpa_fill_pool(NULL);
921 }
922
923 #ifdef CONFIG_DEBUG_FS
924 static int dpa_show(struct seq_file *m, void *v)
925 {
926 seq_puts(m, "DEBUG_PAGEALLOC\n");
927 seq_printf(m, "pool_size : %lu\n", pool_size);
928 seq_printf(m, "pool_pages : %lu\n", pool_pages);
929 seq_printf(m, "pool_low : %lu\n", pool_low);
930 seq_printf(m, "pool_used : %lu\n", pool_used);
931 seq_printf(m, "pool_failed : %lu\n", pool_failed);
932
933 return 0;
934 }
935
936 static int dpa_open(struct inode *inode, struct file *filp)
937 {
938 return single_open(filp, dpa_show, NULL);
939 }
940
941 static const struct file_operations dpa_fops = {
942 .open = dpa_open,
943 .read = seq_read,
944 .llseek = seq_lseek,
945 .release = single_release,
946 };
947
948 int __init debug_pagealloc_proc_init(void)
949 {
950 struct dentry *de;
951
952 de = debugfs_create_file("debug_pagealloc", 0600, NULL, NULL,
953 &dpa_fops);
954 if (!de)
955 return -ENOMEM;
956
957 return 0;
958 }
959 __initcall(debug_pagealloc_proc_init);
960 #endif
961
962 #ifdef CONFIG_HIBERNATION
963
964 bool kernel_page_present(struct page *page)
965 {
966 unsigned int level;
967 pte_t *pte;
968
969 if (PageHighMem(page))
970 return false;
971
972 pte = lookup_address((unsigned long)page_address(page), &level);
973 return (pte_val(*pte) & _PAGE_PRESENT);
974 }
975
976 #endif /* CONFIG_HIBERNATION */
977
978 #endif /* CONFIG_DEBUG_PAGEALLOC */
979
980 /*
981 * The testcases use internal knowledge of the implementation that shouldn't
982 * be exposed to the rest of the kernel. Include these directly here.
983 */
984 #ifdef CONFIG_CPA_DEBUG
985 #include "pageattr-test.c"
986 #endif
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