Merge tag 'v4.5-rc5' into devel
[deliverable/linux.git] / arch / x86 / mm / pageattr.c
1 /*
2 * Copyright 2002 Andi Kleen, SuSE Labs.
3 * Thanks to Ben LaHaise for precious feedback.
4 */
5 #include <linux/highmem.h>
6 #include <linux/bootmem.h>
7 #include <linux/sched.h>
8 #include <linux/mm.h>
9 #include <linux/interrupt.h>
10 #include <linux/seq_file.h>
11 #include <linux/debugfs.h>
12 #include <linux/pfn.h>
13 #include <linux/percpu.h>
14 #include <linux/gfp.h>
15 #include <linux/pci.h>
16 #include <linux/vmalloc.h>
17
18 #include <asm/e820.h>
19 #include <asm/processor.h>
20 #include <asm/tlbflush.h>
21 #include <asm/sections.h>
22 #include <asm/setup.h>
23 #include <asm/uaccess.h>
24 #include <asm/pgalloc.h>
25 #include <asm/proto.h>
26 #include <asm/pat.h>
27
28 /*
29 * The current flushing context - we pass it instead of 5 arguments:
30 */
31 struct cpa_data {
32 unsigned long *vaddr;
33 pgd_t *pgd;
34 pgprot_t mask_set;
35 pgprot_t mask_clr;
36 unsigned long numpages;
37 int flags;
38 unsigned long pfn;
39 unsigned force_split : 1;
40 int curpage;
41 struct page **pages;
42 };
43
44 /*
45 * Serialize cpa() (for !DEBUG_PAGEALLOC which uses large identity mappings)
46 * using cpa_lock. So that we don't allow any other cpu, with stale large tlb
47 * entries change the page attribute in parallel to some other cpu
48 * splitting a large page entry along with changing the attribute.
49 */
50 static DEFINE_SPINLOCK(cpa_lock);
51
52 #define CPA_FLUSHTLB 1
53 #define CPA_ARRAY 2
54 #define CPA_PAGES_ARRAY 4
55
56 #ifdef CONFIG_PROC_FS
57 static unsigned long direct_pages_count[PG_LEVEL_NUM];
58
59 void update_page_count(int level, unsigned long pages)
60 {
61 /* Protect against CPA */
62 spin_lock(&pgd_lock);
63 direct_pages_count[level] += pages;
64 spin_unlock(&pgd_lock);
65 }
66
67 static void split_page_count(int level)
68 {
69 if (direct_pages_count[level] == 0)
70 return;
71
72 direct_pages_count[level]--;
73 direct_pages_count[level - 1] += PTRS_PER_PTE;
74 }
75
76 void arch_report_meminfo(struct seq_file *m)
77 {
78 seq_printf(m, "DirectMap4k: %8lu kB\n",
79 direct_pages_count[PG_LEVEL_4K] << 2);
80 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
81 seq_printf(m, "DirectMap2M: %8lu kB\n",
82 direct_pages_count[PG_LEVEL_2M] << 11);
83 #else
84 seq_printf(m, "DirectMap4M: %8lu kB\n",
85 direct_pages_count[PG_LEVEL_2M] << 12);
86 #endif
87 if (direct_gbpages)
88 seq_printf(m, "DirectMap1G: %8lu kB\n",
89 direct_pages_count[PG_LEVEL_1G] << 20);
90 }
91 #else
92 static inline void split_page_count(int level) { }
93 #endif
94
95 #ifdef CONFIG_X86_64
96
97 static inline unsigned long highmap_start_pfn(void)
98 {
99 return __pa_symbol(_text) >> PAGE_SHIFT;
100 }
101
102 static inline unsigned long highmap_end_pfn(void)
103 {
104 return __pa_symbol(roundup(_brk_end, PMD_SIZE)) >> PAGE_SHIFT;
105 }
106
107 #endif
108
109 #ifdef CONFIG_DEBUG_PAGEALLOC
110 # define debug_pagealloc 1
111 #else
112 # define debug_pagealloc 0
113 #endif
114
115 static inline int
116 within(unsigned long addr, unsigned long start, unsigned long end)
117 {
118 return addr >= start && addr < end;
119 }
120
121 /*
122 * Flushing functions
123 */
124
125 /**
126 * clflush_cache_range - flush a cache range with clflush
127 * @vaddr: virtual start address
128 * @size: number of bytes to flush
129 *
130 * clflushopt is an unordered instruction which needs fencing with mfence or
131 * sfence to avoid ordering issues.
132 */
133 void clflush_cache_range(void *vaddr, unsigned int size)
134 {
135 const unsigned long clflush_size = boot_cpu_data.x86_clflush_size;
136 void *p = (void *)((unsigned long)vaddr & ~(clflush_size - 1));
137 void *vend = vaddr + size;
138
139 if (p >= vend)
140 return;
141
142 mb();
143
144 for (; p < vend; p += clflush_size)
145 clflushopt(p);
146
147 mb();
148 }
149 EXPORT_SYMBOL_GPL(clflush_cache_range);
150
151 static void __cpa_flush_all(void *arg)
152 {
153 unsigned long cache = (unsigned long)arg;
154
155 /*
156 * Flush all to work around Errata in early athlons regarding
157 * large page flushing.
158 */
159 __flush_tlb_all();
160
161 if (cache && boot_cpu_data.x86 >= 4)
162 wbinvd();
163 }
164
165 static void cpa_flush_all(unsigned long cache)
166 {
167 BUG_ON(irqs_disabled());
168
169 on_each_cpu(__cpa_flush_all, (void *) cache, 1);
170 }
171
172 static void __cpa_flush_range(void *arg)
173 {
174 /*
175 * We could optimize that further and do individual per page
176 * tlb invalidates for a low number of pages. Caveat: we must
177 * flush the high aliases on 64bit as well.
178 */
179 __flush_tlb_all();
180 }
181
182 static void cpa_flush_range(unsigned long start, int numpages, int cache)
183 {
184 unsigned int i, level;
185 unsigned long addr;
186
187 BUG_ON(irqs_disabled());
188 WARN_ON(PAGE_ALIGN(start) != start);
189
190 on_each_cpu(__cpa_flush_range, NULL, 1);
191
192 if (!cache)
193 return;
194
195 /*
196 * We only need to flush on one CPU,
197 * clflush is a MESI-coherent instruction that
198 * will cause all other CPUs to flush the same
199 * cachelines:
200 */
201 for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
202 pte_t *pte = lookup_address(addr, &level);
203
204 /*
205 * Only flush present addresses:
206 */
207 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
208 clflush_cache_range((void *) addr, PAGE_SIZE);
209 }
210 }
211
212 static void cpa_flush_array(unsigned long *start, int numpages, int cache,
213 int in_flags, struct page **pages)
214 {
215 unsigned int i, level;
216 unsigned long do_wbinvd = cache && numpages >= 1024; /* 4M threshold */
217
218 BUG_ON(irqs_disabled());
219
220 on_each_cpu(__cpa_flush_all, (void *) do_wbinvd, 1);
221
222 if (!cache || do_wbinvd)
223 return;
224
225 /*
226 * We only need to flush on one CPU,
227 * clflush is a MESI-coherent instruction that
228 * will cause all other CPUs to flush the same
229 * cachelines:
230 */
231 for (i = 0; i < numpages; i++) {
232 unsigned long addr;
233 pte_t *pte;
234
235 if (in_flags & CPA_PAGES_ARRAY)
236 addr = (unsigned long)page_address(pages[i]);
237 else
238 addr = start[i];
239
240 pte = lookup_address(addr, &level);
241
242 /*
243 * Only flush present addresses:
244 */
245 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
246 clflush_cache_range((void *)addr, PAGE_SIZE);
247 }
248 }
249
250 /*
251 * Certain areas of memory on x86 require very specific protection flags,
252 * for example the BIOS area or kernel text. Callers don't always get this
253 * right (again, ioremap() on BIOS memory is not uncommon) so this function
254 * checks and fixes these known static required protection bits.
255 */
256 static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
257 unsigned long pfn)
258 {
259 pgprot_t forbidden = __pgprot(0);
260
261 /*
262 * The BIOS area between 640k and 1Mb needs to be executable for
263 * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
264 */
265 #ifdef CONFIG_PCI_BIOS
266 if (pcibios_enabled && within(pfn, BIOS_BEGIN >> PAGE_SHIFT, BIOS_END >> PAGE_SHIFT))
267 pgprot_val(forbidden) |= _PAGE_NX;
268 #endif
269
270 /*
271 * The kernel text needs to be executable for obvious reasons
272 * Does not cover __inittext since that is gone later on. On
273 * 64bit we do not enforce !NX on the low mapping
274 */
275 if (within(address, (unsigned long)_text, (unsigned long)_etext))
276 pgprot_val(forbidden) |= _PAGE_NX;
277
278 /*
279 * The .rodata section needs to be read-only. Using the pfn
280 * catches all aliases.
281 */
282 if (within(pfn, __pa_symbol(__start_rodata) >> PAGE_SHIFT,
283 __pa_symbol(__end_rodata) >> PAGE_SHIFT))
284 pgprot_val(forbidden) |= _PAGE_RW;
285
286 #if defined(CONFIG_X86_64) && defined(CONFIG_DEBUG_RODATA)
287 /*
288 * Once the kernel maps the text as RO (kernel_set_to_readonly is set),
289 * kernel text mappings for the large page aligned text, rodata sections
290 * will be always read-only. For the kernel identity mappings covering
291 * the holes caused by this alignment can be anything that user asks.
292 *
293 * This will preserve the large page mappings for kernel text/data
294 * at no extra cost.
295 */
296 if (kernel_set_to_readonly &&
297 within(address, (unsigned long)_text,
298 (unsigned long)__end_rodata_hpage_align)) {
299 unsigned int level;
300
301 /*
302 * Don't enforce the !RW mapping for the kernel text mapping,
303 * if the current mapping is already using small page mapping.
304 * No need to work hard to preserve large page mappings in this
305 * case.
306 *
307 * This also fixes the Linux Xen paravirt guest boot failure
308 * (because of unexpected read-only mappings for kernel identity
309 * mappings). In this paravirt guest case, the kernel text
310 * mapping and the kernel identity mapping share the same
311 * page-table pages. Thus we can't really use different
312 * protections for the kernel text and identity mappings. Also,
313 * these shared mappings are made of small page mappings.
314 * Thus this don't enforce !RW mapping for small page kernel
315 * text mapping logic will help Linux Xen parvirt guest boot
316 * as well.
317 */
318 if (lookup_address(address, &level) && (level != PG_LEVEL_4K))
319 pgprot_val(forbidden) |= _PAGE_RW;
320 }
321 #endif
322
323 prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
324
325 return prot;
326 }
327
328 /*
329 * Lookup the page table entry for a virtual address in a specific pgd.
330 * Return a pointer to the entry and the level of the mapping.
331 */
332 pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned long address,
333 unsigned int *level)
334 {
335 pud_t *pud;
336 pmd_t *pmd;
337
338 *level = PG_LEVEL_NONE;
339
340 if (pgd_none(*pgd))
341 return NULL;
342
343 pud = pud_offset(pgd, address);
344 if (pud_none(*pud))
345 return NULL;
346
347 *level = PG_LEVEL_1G;
348 if (pud_large(*pud) || !pud_present(*pud))
349 return (pte_t *)pud;
350
351 pmd = pmd_offset(pud, address);
352 if (pmd_none(*pmd))
353 return NULL;
354
355 *level = PG_LEVEL_2M;
356 if (pmd_large(*pmd) || !pmd_present(*pmd))
357 return (pte_t *)pmd;
358
359 *level = PG_LEVEL_4K;
360
361 return pte_offset_kernel(pmd, address);
362 }
363
364 /*
365 * Lookup the page table entry for a virtual address. Return a pointer
366 * to the entry and the level of the mapping.
367 *
368 * Note: We return pud and pmd either when the entry is marked large
369 * or when the present bit is not set. Otherwise we would return a
370 * pointer to a nonexisting mapping.
371 */
372 pte_t *lookup_address(unsigned long address, unsigned int *level)
373 {
374 return lookup_address_in_pgd(pgd_offset_k(address), address, level);
375 }
376 EXPORT_SYMBOL_GPL(lookup_address);
377
378 static pte_t *_lookup_address_cpa(struct cpa_data *cpa, unsigned long address,
379 unsigned int *level)
380 {
381 if (cpa->pgd)
382 return lookup_address_in_pgd(cpa->pgd + pgd_index(address),
383 address, level);
384
385 return lookup_address(address, level);
386 }
387
388 /*
389 * Lookup the PMD entry for a virtual address. Return a pointer to the entry
390 * or NULL if not present.
391 */
392 pmd_t *lookup_pmd_address(unsigned long address)
393 {
394 pgd_t *pgd;
395 pud_t *pud;
396
397 pgd = pgd_offset_k(address);
398 if (pgd_none(*pgd))
399 return NULL;
400
401 pud = pud_offset(pgd, address);
402 if (pud_none(*pud) || pud_large(*pud) || !pud_present(*pud))
403 return NULL;
404
405 return pmd_offset(pud, address);
406 }
407
408 /*
409 * This is necessary because __pa() does not work on some
410 * kinds of memory, like vmalloc() or the alloc_remap()
411 * areas on 32-bit NUMA systems. The percpu areas can
412 * end up in this kind of memory, for instance.
413 *
414 * This could be optimized, but it is only intended to be
415 * used at inititalization time, and keeping it
416 * unoptimized should increase the testing coverage for
417 * the more obscure platforms.
418 */
419 phys_addr_t slow_virt_to_phys(void *__virt_addr)
420 {
421 unsigned long virt_addr = (unsigned long)__virt_addr;
422 unsigned long phys_addr, offset;
423 enum pg_level level;
424 pte_t *pte;
425
426 pte = lookup_address(virt_addr, &level);
427 BUG_ON(!pte);
428
429 switch (level) {
430 case PG_LEVEL_1G:
431 phys_addr = pud_pfn(*(pud_t *)pte) << PAGE_SHIFT;
432 offset = virt_addr & ~PUD_PAGE_MASK;
433 break;
434 case PG_LEVEL_2M:
435 phys_addr = pmd_pfn(*(pmd_t *)pte) << PAGE_SHIFT;
436 offset = virt_addr & ~PMD_PAGE_MASK;
437 break;
438 default:
439 phys_addr = pte_pfn(*pte) << PAGE_SHIFT;
440 offset = virt_addr & ~PAGE_MASK;
441 }
442
443 return (phys_addr_t)(phys_addr | offset);
444 }
445 EXPORT_SYMBOL_GPL(slow_virt_to_phys);
446
447 /*
448 * Set the new pmd in all the pgds we know about:
449 */
450 static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
451 {
452 /* change init_mm */
453 set_pte_atomic(kpte, pte);
454 #ifdef CONFIG_X86_32
455 if (!SHARED_KERNEL_PMD) {
456 struct page *page;
457
458 list_for_each_entry(page, &pgd_list, lru) {
459 pgd_t *pgd;
460 pud_t *pud;
461 pmd_t *pmd;
462
463 pgd = (pgd_t *)page_address(page) + pgd_index(address);
464 pud = pud_offset(pgd, address);
465 pmd = pmd_offset(pud, address);
466 set_pte_atomic((pte_t *)pmd, pte);
467 }
468 }
469 #endif
470 }
471
472 static int
473 try_preserve_large_page(pte_t *kpte, unsigned long address,
474 struct cpa_data *cpa)
475 {
476 unsigned long nextpage_addr, numpages, pmask, psize, addr, pfn, old_pfn;
477 pte_t new_pte, old_pte, *tmp;
478 pgprot_t old_prot, new_prot, req_prot;
479 int i, do_split = 1;
480 enum pg_level level;
481
482 if (cpa->force_split)
483 return 1;
484
485 spin_lock(&pgd_lock);
486 /*
487 * Check for races, another CPU might have split this page
488 * up already:
489 */
490 tmp = _lookup_address_cpa(cpa, address, &level);
491 if (tmp != kpte)
492 goto out_unlock;
493
494 switch (level) {
495 case PG_LEVEL_2M:
496 old_prot = pmd_pgprot(*(pmd_t *)kpte);
497 old_pfn = pmd_pfn(*(pmd_t *)kpte);
498 break;
499 case PG_LEVEL_1G:
500 old_prot = pud_pgprot(*(pud_t *)kpte);
501 old_pfn = pud_pfn(*(pud_t *)kpte);
502 break;
503 default:
504 do_split = -EINVAL;
505 goto out_unlock;
506 }
507
508 psize = page_level_size(level);
509 pmask = page_level_mask(level);
510
511 /*
512 * Calculate the number of pages, which fit into this large
513 * page starting at address:
514 */
515 nextpage_addr = (address + psize) & pmask;
516 numpages = (nextpage_addr - address) >> PAGE_SHIFT;
517 if (numpages < cpa->numpages)
518 cpa->numpages = numpages;
519
520 /*
521 * We are safe now. Check whether the new pgprot is the same:
522 * Convert protection attributes to 4k-format, as cpa->mask* are set
523 * up accordingly.
524 */
525 old_pte = *kpte;
526 req_prot = pgprot_large_2_4k(old_prot);
527
528 pgprot_val(req_prot) &= ~pgprot_val(cpa->mask_clr);
529 pgprot_val(req_prot) |= pgprot_val(cpa->mask_set);
530
531 /*
532 * req_prot is in format of 4k pages. It must be converted to large
533 * page format: the caching mode includes the PAT bit located at
534 * different bit positions in the two formats.
535 */
536 req_prot = pgprot_4k_2_large(req_prot);
537
538 /*
539 * Set the PSE and GLOBAL flags only if the PRESENT flag is
540 * set otherwise pmd_present/pmd_huge will return true even on
541 * a non present pmd. The canon_pgprot will clear _PAGE_GLOBAL
542 * for the ancient hardware that doesn't support it.
543 */
544 if (pgprot_val(req_prot) & _PAGE_PRESENT)
545 pgprot_val(req_prot) |= _PAGE_PSE | _PAGE_GLOBAL;
546 else
547 pgprot_val(req_prot) &= ~(_PAGE_PSE | _PAGE_GLOBAL);
548
549 req_prot = canon_pgprot(req_prot);
550
551 /*
552 * old_pfn points to the large page base pfn. So we need
553 * to add the offset of the virtual address:
554 */
555 pfn = old_pfn + ((address & (psize - 1)) >> PAGE_SHIFT);
556 cpa->pfn = pfn;
557
558 new_prot = static_protections(req_prot, address, pfn);
559
560 /*
561 * We need to check the full range, whether
562 * static_protection() requires a different pgprot for one of
563 * the pages in the range we try to preserve:
564 */
565 addr = address & pmask;
566 pfn = old_pfn;
567 for (i = 0; i < (psize >> PAGE_SHIFT); i++, addr += PAGE_SIZE, pfn++) {
568 pgprot_t chk_prot = static_protections(req_prot, addr, pfn);
569
570 if (pgprot_val(chk_prot) != pgprot_val(new_prot))
571 goto out_unlock;
572 }
573
574 /*
575 * If there are no changes, return. maxpages has been updated
576 * above:
577 */
578 if (pgprot_val(new_prot) == pgprot_val(old_prot)) {
579 do_split = 0;
580 goto out_unlock;
581 }
582
583 /*
584 * We need to change the attributes. Check, whether we can
585 * change the large page in one go. We request a split, when
586 * the address is not aligned and the number of pages is
587 * smaller than the number of pages in the large page. Note
588 * that we limited the number of possible pages already to
589 * the number of pages in the large page.
590 */
591 if (address == (address & pmask) && cpa->numpages == (psize >> PAGE_SHIFT)) {
592 /*
593 * The address is aligned and the number of pages
594 * covers the full page.
595 */
596 new_pte = pfn_pte(old_pfn, new_prot);
597 __set_pmd_pte(kpte, address, new_pte);
598 cpa->flags |= CPA_FLUSHTLB;
599 do_split = 0;
600 }
601
602 out_unlock:
603 spin_unlock(&pgd_lock);
604
605 return do_split;
606 }
607
608 static int
609 __split_large_page(struct cpa_data *cpa, pte_t *kpte, unsigned long address,
610 struct page *base)
611 {
612 pte_t *pbase = (pte_t *)page_address(base);
613 unsigned long ref_pfn, pfn, pfninc = 1;
614 unsigned int i, level;
615 pte_t *tmp;
616 pgprot_t ref_prot;
617
618 spin_lock(&pgd_lock);
619 /*
620 * Check for races, another CPU might have split this page
621 * up for us already:
622 */
623 tmp = _lookup_address_cpa(cpa, address, &level);
624 if (tmp != kpte) {
625 spin_unlock(&pgd_lock);
626 return 1;
627 }
628
629 paravirt_alloc_pte(&init_mm, page_to_pfn(base));
630
631 switch (level) {
632 case PG_LEVEL_2M:
633 ref_prot = pmd_pgprot(*(pmd_t *)kpte);
634 /* clear PSE and promote PAT bit to correct position */
635 ref_prot = pgprot_large_2_4k(ref_prot);
636 ref_pfn = pmd_pfn(*(pmd_t *)kpte);
637 break;
638
639 case PG_LEVEL_1G:
640 ref_prot = pud_pgprot(*(pud_t *)kpte);
641 ref_pfn = pud_pfn(*(pud_t *)kpte);
642 pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT;
643
644 /*
645 * Clear the PSE flags if the PRESENT flag is not set
646 * otherwise pmd_present/pmd_huge will return true
647 * even on a non present pmd.
648 */
649 if (!(pgprot_val(ref_prot) & _PAGE_PRESENT))
650 pgprot_val(ref_prot) &= ~_PAGE_PSE;
651 break;
652
653 default:
654 spin_unlock(&pgd_lock);
655 return 1;
656 }
657
658 /*
659 * Set the GLOBAL flags only if the PRESENT flag is set
660 * otherwise pmd/pte_present will return true even on a non
661 * present pmd/pte. The canon_pgprot will clear _PAGE_GLOBAL
662 * for the ancient hardware that doesn't support it.
663 */
664 if (pgprot_val(ref_prot) & _PAGE_PRESENT)
665 pgprot_val(ref_prot) |= _PAGE_GLOBAL;
666 else
667 pgprot_val(ref_prot) &= ~_PAGE_GLOBAL;
668
669 /*
670 * Get the target pfn from the original entry:
671 */
672 pfn = ref_pfn;
673 for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc)
674 set_pte(&pbase[i], pfn_pte(pfn, canon_pgprot(ref_prot)));
675
676 if (virt_addr_valid(address)) {
677 unsigned long pfn = PFN_DOWN(__pa(address));
678
679 if (pfn_range_is_mapped(pfn, pfn + 1))
680 split_page_count(level);
681 }
682
683 /*
684 * Install the new, split up pagetable.
685 *
686 * We use the standard kernel pagetable protections for the new
687 * pagetable protections, the actual ptes set above control the
688 * primary protection behavior:
689 */
690 __set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE)));
691
692 /*
693 * Intel Atom errata AAH41 workaround.
694 *
695 * The real fix should be in hw or in a microcode update, but
696 * we also probabilistically try to reduce the window of having
697 * a large TLB mixed with 4K TLBs while instruction fetches are
698 * going on.
699 */
700 __flush_tlb_all();
701 spin_unlock(&pgd_lock);
702
703 return 0;
704 }
705
706 static int split_large_page(struct cpa_data *cpa, pte_t *kpte,
707 unsigned long address)
708 {
709 struct page *base;
710
711 if (!debug_pagealloc)
712 spin_unlock(&cpa_lock);
713 base = alloc_pages(GFP_KERNEL | __GFP_NOTRACK, 0);
714 if (!debug_pagealloc)
715 spin_lock(&cpa_lock);
716 if (!base)
717 return -ENOMEM;
718
719 if (__split_large_page(cpa, kpte, address, base))
720 __free_page(base);
721
722 return 0;
723 }
724
725 static bool try_to_free_pte_page(pte_t *pte)
726 {
727 int i;
728
729 for (i = 0; i < PTRS_PER_PTE; i++)
730 if (!pte_none(pte[i]))
731 return false;
732
733 free_page((unsigned long)pte);
734 return true;
735 }
736
737 static bool try_to_free_pmd_page(pmd_t *pmd)
738 {
739 int i;
740
741 for (i = 0; i < PTRS_PER_PMD; i++)
742 if (!pmd_none(pmd[i]))
743 return false;
744
745 free_page((unsigned long)pmd);
746 return true;
747 }
748
749 static bool try_to_free_pud_page(pud_t *pud)
750 {
751 int i;
752
753 for (i = 0; i < PTRS_PER_PUD; i++)
754 if (!pud_none(pud[i]))
755 return false;
756
757 free_page((unsigned long)pud);
758 return true;
759 }
760
761 static bool unmap_pte_range(pmd_t *pmd, unsigned long start, unsigned long end)
762 {
763 pte_t *pte = pte_offset_kernel(pmd, start);
764
765 while (start < end) {
766 set_pte(pte, __pte(0));
767
768 start += PAGE_SIZE;
769 pte++;
770 }
771
772 if (try_to_free_pte_page((pte_t *)pmd_page_vaddr(*pmd))) {
773 pmd_clear(pmd);
774 return true;
775 }
776 return false;
777 }
778
779 static void __unmap_pmd_range(pud_t *pud, pmd_t *pmd,
780 unsigned long start, unsigned long end)
781 {
782 if (unmap_pte_range(pmd, start, end))
783 if (try_to_free_pmd_page((pmd_t *)pud_page_vaddr(*pud)))
784 pud_clear(pud);
785 }
786
787 static void unmap_pmd_range(pud_t *pud, unsigned long start, unsigned long end)
788 {
789 pmd_t *pmd = pmd_offset(pud, start);
790
791 /*
792 * Not on a 2MB page boundary?
793 */
794 if (start & (PMD_SIZE - 1)) {
795 unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
796 unsigned long pre_end = min_t(unsigned long, end, next_page);
797
798 __unmap_pmd_range(pud, pmd, start, pre_end);
799
800 start = pre_end;
801 pmd++;
802 }
803
804 /*
805 * Try to unmap in 2M chunks.
806 */
807 while (end - start >= PMD_SIZE) {
808 if (pmd_large(*pmd))
809 pmd_clear(pmd);
810 else
811 __unmap_pmd_range(pud, pmd, start, start + PMD_SIZE);
812
813 start += PMD_SIZE;
814 pmd++;
815 }
816
817 /*
818 * 4K leftovers?
819 */
820 if (start < end)
821 return __unmap_pmd_range(pud, pmd, start, end);
822
823 /*
824 * Try again to free the PMD page if haven't succeeded above.
825 */
826 if (!pud_none(*pud))
827 if (try_to_free_pmd_page((pmd_t *)pud_page_vaddr(*pud)))
828 pud_clear(pud);
829 }
830
831 static void unmap_pud_range(pgd_t *pgd, unsigned long start, unsigned long end)
832 {
833 pud_t *pud = pud_offset(pgd, start);
834
835 /*
836 * Not on a GB page boundary?
837 */
838 if (start & (PUD_SIZE - 1)) {
839 unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
840 unsigned long pre_end = min_t(unsigned long, end, next_page);
841
842 unmap_pmd_range(pud, start, pre_end);
843
844 start = pre_end;
845 pud++;
846 }
847
848 /*
849 * Try to unmap in 1G chunks?
850 */
851 while (end - start >= PUD_SIZE) {
852
853 if (pud_large(*pud))
854 pud_clear(pud);
855 else
856 unmap_pmd_range(pud, start, start + PUD_SIZE);
857
858 start += PUD_SIZE;
859 pud++;
860 }
861
862 /*
863 * 2M leftovers?
864 */
865 if (start < end)
866 unmap_pmd_range(pud, start, end);
867
868 /*
869 * No need to try to free the PUD page because we'll free it in
870 * populate_pgd's error path
871 */
872 }
873
874 static void unmap_pgd_range(pgd_t *root, unsigned long addr, unsigned long end)
875 {
876 pgd_t *pgd_entry = root + pgd_index(addr);
877
878 unmap_pud_range(pgd_entry, addr, end);
879
880 if (try_to_free_pud_page((pud_t *)pgd_page_vaddr(*pgd_entry)))
881 pgd_clear(pgd_entry);
882 }
883
884 static int alloc_pte_page(pmd_t *pmd)
885 {
886 pte_t *pte = (pte_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
887 if (!pte)
888 return -1;
889
890 set_pmd(pmd, __pmd(__pa(pte) | _KERNPG_TABLE));
891 return 0;
892 }
893
894 static int alloc_pmd_page(pud_t *pud)
895 {
896 pmd_t *pmd = (pmd_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
897 if (!pmd)
898 return -1;
899
900 set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE));
901 return 0;
902 }
903
904 static void populate_pte(struct cpa_data *cpa,
905 unsigned long start, unsigned long end,
906 unsigned num_pages, pmd_t *pmd, pgprot_t pgprot)
907 {
908 pte_t *pte;
909
910 pte = pte_offset_kernel(pmd, start);
911
912 while (num_pages-- && start < end) {
913
914 /* deal with the NX bit */
915 if (!(pgprot_val(pgprot) & _PAGE_NX))
916 cpa->pfn &= ~_PAGE_NX;
917
918 set_pte(pte, pfn_pte(cpa->pfn >> PAGE_SHIFT, pgprot));
919
920 start += PAGE_SIZE;
921 cpa->pfn += PAGE_SIZE;
922 pte++;
923 }
924 }
925
926 static int populate_pmd(struct cpa_data *cpa,
927 unsigned long start, unsigned long end,
928 unsigned num_pages, pud_t *pud, pgprot_t pgprot)
929 {
930 unsigned int cur_pages = 0;
931 pmd_t *pmd;
932 pgprot_t pmd_pgprot;
933
934 /*
935 * Not on a 2M boundary?
936 */
937 if (start & (PMD_SIZE - 1)) {
938 unsigned long pre_end = start + (num_pages << PAGE_SHIFT);
939 unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
940
941 pre_end = min_t(unsigned long, pre_end, next_page);
942 cur_pages = (pre_end - start) >> PAGE_SHIFT;
943 cur_pages = min_t(unsigned int, num_pages, cur_pages);
944
945 /*
946 * Need a PTE page?
947 */
948 pmd = pmd_offset(pud, start);
949 if (pmd_none(*pmd))
950 if (alloc_pte_page(pmd))
951 return -1;
952
953 populate_pte(cpa, start, pre_end, cur_pages, pmd, pgprot);
954
955 start = pre_end;
956 }
957
958 /*
959 * We mapped them all?
960 */
961 if (num_pages == cur_pages)
962 return cur_pages;
963
964 pmd_pgprot = pgprot_4k_2_large(pgprot);
965
966 while (end - start >= PMD_SIZE) {
967
968 /*
969 * We cannot use a 1G page so allocate a PMD page if needed.
970 */
971 if (pud_none(*pud))
972 if (alloc_pmd_page(pud))
973 return -1;
974
975 pmd = pmd_offset(pud, start);
976
977 set_pmd(pmd, __pmd(cpa->pfn | _PAGE_PSE |
978 massage_pgprot(pmd_pgprot)));
979
980 start += PMD_SIZE;
981 cpa->pfn += PMD_SIZE;
982 cur_pages += PMD_SIZE >> PAGE_SHIFT;
983 }
984
985 /*
986 * Map trailing 4K pages.
987 */
988 if (start < end) {
989 pmd = pmd_offset(pud, start);
990 if (pmd_none(*pmd))
991 if (alloc_pte_page(pmd))
992 return -1;
993
994 populate_pte(cpa, start, end, num_pages - cur_pages,
995 pmd, pgprot);
996 }
997 return num_pages;
998 }
999
1000 static int populate_pud(struct cpa_data *cpa, unsigned long start, pgd_t *pgd,
1001 pgprot_t pgprot)
1002 {
1003 pud_t *pud;
1004 unsigned long end;
1005 int cur_pages = 0;
1006 pgprot_t pud_pgprot;
1007
1008 end = start + (cpa->numpages << PAGE_SHIFT);
1009
1010 /*
1011 * Not on a Gb page boundary? => map everything up to it with
1012 * smaller pages.
1013 */
1014 if (start & (PUD_SIZE - 1)) {
1015 unsigned long pre_end;
1016 unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
1017
1018 pre_end = min_t(unsigned long, end, next_page);
1019 cur_pages = (pre_end - start) >> PAGE_SHIFT;
1020 cur_pages = min_t(int, (int)cpa->numpages, cur_pages);
1021
1022 pud = pud_offset(pgd, start);
1023
1024 /*
1025 * Need a PMD page?
1026 */
1027 if (pud_none(*pud))
1028 if (alloc_pmd_page(pud))
1029 return -1;
1030
1031 cur_pages = populate_pmd(cpa, start, pre_end, cur_pages,
1032 pud, pgprot);
1033 if (cur_pages < 0)
1034 return cur_pages;
1035
1036 start = pre_end;
1037 }
1038
1039 /* We mapped them all? */
1040 if (cpa->numpages == cur_pages)
1041 return cur_pages;
1042
1043 pud = pud_offset(pgd, start);
1044 pud_pgprot = pgprot_4k_2_large(pgprot);
1045
1046 /*
1047 * Map everything starting from the Gb boundary, possibly with 1G pages
1048 */
1049 while (end - start >= PUD_SIZE) {
1050 set_pud(pud, __pud(cpa->pfn | _PAGE_PSE |
1051 massage_pgprot(pud_pgprot)));
1052
1053 start += PUD_SIZE;
1054 cpa->pfn += PUD_SIZE;
1055 cur_pages += PUD_SIZE >> PAGE_SHIFT;
1056 pud++;
1057 }
1058
1059 /* Map trailing leftover */
1060 if (start < end) {
1061 int tmp;
1062
1063 pud = pud_offset(pgd, start);
1064 if (pud_none(*pud))
1065 if (alloc_pmd_page(pud))
1066 return -1;
1067
1068 tmp = populate_pmd(cpa, start, end, cpa->numpages - cur_pages,
1069 pud, pgprot);
1070 if (tmp < 0)
1071 return cur_pages;
1072
1073 cur_pages += tmp;
1074 }
1075 return cur_pages;
1076 }
1077
1078 /*
1079 * Restrictions for kernel page table do not necessarily apply when mapping in
1080 * an alternate PGD.
1081 */
1082 static int populate_pgd(struct cpa_data *cpa, unsigned long addr)
1083 {
1084 pgprot_t pgprot = __pgprot(_KERNPG_TABLE);
1085 pud_t *pud = NULL; /* shut up gcc */
1086 pgd_t *pgd_entry;
1087 int ret;
1088
1089 pgd_entry = cpa->pgd + pgd_index(addr);
1090
1091 /*
1092 * Allocate a PUD page and hand it down for mapping.
1093 */
1094 if (pgd_none(*pgd_entry)) {
1095 pud = (pud_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
1096 if (!pud)
1097 return -1;
1098
1099 set_pgd(pgd_entry, __pgd(__pa(pud) | _KERNPG_TABLE));
1100 }
1101
1102 pgprot_val(pgprot) &= ~pgprot_val(cpa->mask_clr);
1103 pgprot_val(pgprot) |= pgprot_val(cpa->mask_set);
1104
1105 ret = populate_pud(cpa, addr, pgd_entry, pgprot);
1106 if (ret < 0) {
1107 unmap_pgd_range(cpa->pgd, addr,
1108 addr + (cpa->numpages << PAGE_SHIFT));
1109 return ret;
1110 }
1111
1112 cpa->numpages = ret;
1113 return 0;
1114 }
1115
1116 static int __cpa_process_fault(struct cpa_data *cpa, unsigned long vaddr,
1117 int primary)
1118 {
1119 if (cpa->pgd)
1120 return populate_pgd(cpa, vaddr);
1121
1122 /*
1123 * Ignore all non primary paths.
1124 */
1125 if (!primary)
1126 return 0;
1127
1128 /*
1129 * Ignore the NULL PTE for kernel identity mapping, as it is expected
1130 * to have holes.
1131 * Also set numpages to '1' indicating that we processed cpa req for
1132 * one virtual address page and its pfn. TBD: numpages can be set based
1133 * on the initial value and the level returned by lookup_address().
1134 */
1135 if (within(vaddr, PAGE_OFFSET,
1136 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT))) {
1137 cpa->numpages = 1;
1138 cpa->pfn = __pa(vaddr) >> PAGE_SHIFT;
1139 return 0;
1140 } else {
1141 WARN(1, KERN_WARNING "CPA: called for zero pte. "
1142 "vaddr = %lx cpa->vaddr = %lx\n", vaddr,
1143 *cpa->vaddr);
1144
1145 return -EFAULT;
1146 }
1147 }
1148
1149 static int __change_page_attr(struct cpa_data *cpa, int primary)
1150 {
1151 unsigned long address;
1152 int do_split, err;
1153 unsigned int level;
1154 pte_t *kpte, old_pte;
1155
1156 if (cpa->flags & CPA_PAGES_ARRAY) {
1157 struct page *page = cpa->pages[cpa->curpage];
1158 if (unlikely(PageHighMem(page)))
1159 return 0;
1160 address = (unsigned long)page_address(page);
1161 } else if (cpa->flags & CPA_ARRAY)
1162 address = cpa->vaddr[cpa->curpage];
1163 else
1164 address = *cpa->vaddr;
1165 repeat:
1166 kpte = _lookup_address_cpa(cpa, address, &level);
1167 if (!kpte)
1168 return __cpa_process_fault(cpa, address, primary);
1169
1170 old_pte = *kpte;
1171 if (!pte_val(old_pte))
1172 return __cpa_process_fault(cpa, address, primary);
1173
1174 if (level == PG_LEVEL_4K) {
1175 pte_t new_pte;
1176 pgprot_t new_prot = pte_pgprot(old_pte);
1177 unsigned long pfn = pte_pfn(old_pte);
1178
1179 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
1180 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
1181
1182 new_prot = static_protections(new_prot, address, pfn);
1183
1184 /*
1185 * Set the GLOBAL flags only if the PRESENT flag is
1186 * set otherwise pte_present will return true even on
1187 * a non present pte. The canon_pgprot will clear
1188 * _PAGE_GLOBAL for the ancient hardware that doesn't
1189 * support it.
1190 */
1191 if (pgprot_val(new_prot) & _PAGE_PRESENT)
1192 pgprot_val(new_prot) |= _PAGE_GLOBAL;
1193 else
1194 pgprot_val(new_prot) &= ~_PAGE_GLOBAL;
1195
1196 /*
1197 * We need to keep the pfn from the existing PTE,
1198 * after all we're only going to change it's attributes
1199 * not the memory it points to
1200 */
1201 new_pte = pfn_pte(pfn, canon_pgprot(new_prot));
1202 cpa->pfn = pfn;
1203 /*
1204 * Do we really change anything ?
1205 */
1206 if (pte_val(old_pte) != pte_val(new_pte)) {
1207 set_pte_atomic(kpte, new_pte);
1208 cpa->flags |= CPA_FLUSHTLB;
1209 }
1210 cpa->numpages = 1;
1211 return 0;
1212 }
1213
1214 /*
1215 * Check, whether we can keep the large page intact
1216 * and just change the pte:
1217 */
1218 do_split = try_preserve_large_page(kpte, address, cpa);
1219 /*
1220 * When the range fits into the existing large page,
1221 * return. cp->numpages and cpa->tlbflush have been updated in
1222 * try_large_page:
1223 */
1224 if (do_split <= 0)
1225 return do_split;
1226
1227 /*
1228 * We have to split the large page:
1229 */
1230 err = split_large_page(cpa, kpte, address);
1231 if (!err) {
1232 /*
1233 * Do a global flush tlb after splitting the large page
1234 * and before we do the actual change page attribute in the PTE.
1235 *
1236 * With out this, we violate the TLB application note, that says
1237 * "The TLBs may contain both ordinary and large-page
1238 * translations for a 4-KByte range of linear addresses. This
1239 * may occur if software modifies the paging structures so that
1240 * the page size used for the address range changes. If the two
1241 * translations differ with respect to page frame or attributes
1242 * (e.g., permissions), processor behavior is undefined and may
1243 * be implementation-specific."
1244 *
1245 * We do this global tlb flush inside the cpa_lock, so that we
1246 * don't allow any other cpu, with stale tlb entries change the
1247 * page attribute in parallel, that also falls into the
1248 * just split large page entry.
1249 */
1250 flush_tlb_all();
1251 goto repeat;
1252 }
1253
1254 return err;
1255 }
1256
1257 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias);
1258
1259 static int cpa_process_alias(struct cpa_data *cpa)
1260 {
1261 struct cpa_data alias_cpa;
1262 unsigned long laddr = (unsigned long)__va(cpa->pfn << PAGE_SHIFT);
1263 unsigned long vaddr;
1264 int ret;
1265
1266 if (!pfn_range_is_mapped(cpa->pfn, cpa->pfn + 1))
1267 return 0;
1268
1269 /*
1270 * No need to redo, when the primary call touched the direct
1271 * mapping already:
1272 */
1273 if (cpa->flags & CPA_PAGES_ARRAY) {
1274 struct page *page = cpa->pages[cpa->curpage];
1275 if (unlikely(PageHighMem(page)))
1276 return 0;
1277 vaddr = (unsigned long)page_address(page);
1278 } else if (cpa->flags & CPA_ARRAY)
1279 vaddr = cpa->vaddr[cpa->curpage];
1280 else
1281 vaddr = *cpa->vaddr;
1282
1283 if (!(within(vaddr, PAGE_OFFSET,
1284 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT)))) {
1285
1286 alias_cpa = *cpa;
1287 alias_cpa.vaddr = &laddr;
1288 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
1289
1290 ret = __change_page_attr_set_clr(&alias_cpa, 0);
1291 if (ret)
1292 return ret;
1293 }
1294
1295 #ifdef CONFIG_X86_64
1296 /*
1297 * If the primary call didn't touch the high mapping already
1298 * and the physical address is inside the kernel map, we need
1299 * to touch the high mapped kernel as well:
1300 */
1301 if (!within(vaddr, (unsigned long)_text, _brk_end) &&
1302 within(cpa->pfn, highmap_start_pfn(), highmap_end_pfn())) {
1303 unsigned long temp_cpa_vaddr = (cpa->pfn << PAGE_SHIFT) +
1304 __START_KERNEL_map - phys_base;
1305 alias_cpa = *cpa;
1306 alias_cpa.vaddr = &temp_cpa_vaddr;
1307 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
1308
1309 /*
1310 * The high mapping range is imprecise, so ignore the
1311 * return value.
1312 */
1313 __change_page_attr_set_clr(&alias_cpa, 0);
1314 }
1315 #endif
1316
1317 return 0;
1318 }
1319
1320 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias)
1321 {
1322 int ret, numpages = cpa->numpages;
1323
1324 while (numpages) {
1325 /*
1326 * Store the remaining nr of pages for the large page
1327 * preservation check.
1328 */
1329 cpa->numpages = numpages;
1330 /* for array changes, we can't use large page */
1331 if (cpa->flags & (CPA_ARRAY | CPA_PAGES_ARRAY))
1332 cpa->numpages = 1;
1333
1334 if (!debug_pagealloc)
1335 spin_lock(&cpa_lock);
1336 ret = __change_page_attr(cpa, checkalias);
1337 if (!debug_pagealloc)
1338 spin_unlock(&cpa_lock);
1339 if (ret)
1340 return ret;
1341
1342 if (checkalias) {
1343 ret = cpa_process_alias(cpa);
1344 if (ret)
1345 return ret;
1346 }
1347
1348 /*
1349 * Adjust the number of pages with the result of the
1350 * CPA operation. Either a large page has been
1351 * preserved or a single page update happened.
1352 */
1353 BUG_ON(cpa->numpages > numpages || !cpa->numpages);
1354 numpages -= cpa->numpages;
1355 if (cpa->flags & (CPA_PAGES_ARRAY | CPA_ARRAY))
1356 cpa->curpage++;
1357 else
1358 *cpa->vaddr += cpa->numpages * PAGE_SIZE;
1359
1360 }
1361 return 0;
1362 }
1363
1364 static int change_page_attr_set_clr(unsigned long *addr, int numpages,
1365 pgprot_t mask_set, pgprot_t mask_clr,
1366 int force_split, int in_flag,
1367 struct page **pages)
1368 {
1369 struct cpa_data cpa;
1370 int ret, cache, checkalias;
1371 unsigned long baddr = 0;
1372
1373 memset(&cpa, 0, sizeof(cpa));
1374
1375 /*
1376 * Check, if we are requested to change a not supported
1377 * feature:
1378 */
1379 mask_set = canon_pgprot(mask_set);
1380 mask_clr = canon_pgprot(mask_clr);
1381 if (!pgprot_val(mask_set) && !pgprot_val(mask_clr) && !force_split)
1382 return 0;
1383
1384 /* Ensure we are PAGE_SIZE aligned */
1385 if (in_flag & CPA_ARRAY) {
1386 int i;
1387 for (i = 0; i < numpages; i++) {
1388 if (addr[i] & ~PAGE_MASK) {
1389 addr[i] &= PAGE_MASK;
1390 WARN_ON_ONCE(1);
1391 }
1392 }
1393 } else if (!(in_flag & CPA_PAGES_ARRAY)) {
1394 /*
1395 * in_flag of CPA_PAGES_ARRAY implies it is aligned.
1396 * No need to cehck in that case
1397 */
1398 if (*addr & ~PAGE_MASK) {
1399 *addr &= PAGE_MASK;
1400 /*
1401 * People should not be passing in unaligned addresses:
1402 */
1403 WARN_ON_ONCE(1);
1404 }
1405 /*
1406 * Save address for cache flush. *addr is modified in the call
1407 * to __change_page_attr_set_clr() below.
1408 */
1409 baddr = *addr;
1410 }
1411
1412 /* Must avoid aliasing mappings in the highmem code */
1413 kmap_flush_unused();
1414
1415 vm_unmap_aliases();
1416
1417 cpa.vaddr = addr;
1418 cpa.pages = pages;
1419 cpa.numpages = numpages;
1420 cpa.mask_set = mask_set;
1421 cpa.mask_clr = mask_clr;
1422 cpa.flags = 0;
1423 cpa.curpage = 0;
1424 cpa.force_split = force_split;
1425
1426 if (in_flag & (CPA_ARRAY | CPA_PAGES_ARRAY))
1427 cpa.flags |= in_flag;
1428
1429 /* No alias checking for _NX bit modifications */
1430 checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX;
1431
1432 ret = __change_page_attr_set_clr(&cpa, checkalias);
1433
1434 /*
1435 * Check whether we really changed something:
1436 */
1437 if (!(cpa.flags & CPA_FLUSHTLB))
1438 goto out;
1439
1440 /*
1441 * No need to flush, when we did not set any of the caching
1442 * attributes:
1443 */
1444 cache = !!pgprot2cachemode(mask_set);
1445
1446 /*
1447 * On success we use CLFLUSH, when the CPU supports it to
1448 * avoid the WBINVD. If the CPU does not support it and in the
1449 * error case we fall back to cpa_flush_all (which uses
1450 * WBINVD):
1451 */
1452 if (!ret && cpu_has_clflush) {
1453 if (cpa.flags & (CPA_PAGES_ARRAY | CPA_ARRAY)) {
1454 cpa_flush_array(addr, numpages, cache,
1455 cpa.flags, pages);
1456 } else
1457 cpa_flush_range(baddr, numpages, cache);
1458 } else
1459 cpa_flush_all(cache);
1460
1461 out:
1462 return ret;
1463 }
1464
1465 static inline int change_page_attr_set(unsigned long *addr, int numpages,
1466 pgprot_t mask, int array)
1467 {
1468 return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0), 0,
1469 (array ? CPA_ARRAY : 0), NULL);
1470 }
1471
1472 static inline int change_page_attr_clear(unsigned long *addr, int numpages,
1473 pgprot_t mask, int array)
1474 {
1475 return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask, 0,
1476 (array ? CPA_ARRAY : 0), NULL);
1477 }
1478
1479 static inline int cpa_set_pages_array(struct page **pages, int numpages,
1480 pgprot_t mask)
1481 {
1482 return change_page_attr_set_clr(NULL, numpages, mask, __pgprot(0), 0,
1483 CPA_PAGES_ARRAY, pages);
1484 }
1485
1486 static inline int cpa_clear_pages_array(struct page **pages, int numpages,
1487 pgprot_t mask)
1488 {
1489 return change_page_attr_set_clr(NULL, numpages, __pgprot(0), mask, 0,
1490 CPA_PAGES_ARRAY, pages);
1491 }
1492
1493 int _set_memory_uc(unsigned long addr, int numpages)
1494 {
1495 /*
1496 * for now UC MINUS. see comments in ioremap_nocache()
1497 * If you really need strong UC use ioremap_uc(), but note
1498 * that you cannot override IO areas with set_memory_*() as
1499 * these helpers cannot work with IO memory.
1500 */
1501 return change_page_attr_set(&addr, numpages,
1502 cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1503 0);
1504 }
1505
1506 int set_memory_uc(unsigned long addr, int numpages)
1507 {
1508 int ret;
1509
1510 /*
1511 * for now UC MINUS. see comments in ioremap_nocache()
1512 */
1513 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1514 _PAGE_CACHE_MODE_UC_MINUS, NULL);
1515 if (ret)
1516 goto out_err;
1517
1518 ret = _set_memory_uc(addr, numpages);
1519 if (ret)
1520 goto out_free;
1521
1522 return 0;
1523
1524 out_free:
1525 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1526 out_err:
1527 return ret;
1528 }
1529 EXPORT_SYMBOL(set_memory_uc);
1530
1531 static int _set_memory_array(unsigned long *addr, int addrinarray,
1532 enum page_cache_mode new_type)
1533 {
1534 enum page_cache_mode set_type;
1535 int i, j;
1536 int ret;
1537
1538 for (i = 0; i < addrinarray; i++) {
1539 ret = reserve_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE,
1540 new_type, NULL);
1541 if (ret)
1542 goto out_free;
1543 }
1544
1545 /* If WC, set to UC- first and then WC */
1546 set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
1547 _PAGE_CACHE_MODE_UC_MINUS : new_type;
1548
1549 ret = change_page_attr_set(addr, addrinarray,
1550 cachemode2pgprot(set_type), 1);
1551
1552 if (!ret && new_type == _PAGE_CACHE_MODE_WC)
1553 ret = change_page_attr_set_clr(addr, addrinarray,
1554 cachemode2pgprot(
1555 _PAGE_CACHE_MODE_WC),
1556 __pgprot(_PAGE_CACHE_MASK),
1557 0, CPA_ARRAY, NULL);
1558 if (ret)
1559 goto out_free;
1560
1561 return 0;
1562
1563 out_free:
1564 for (j = 0; j < i; j++)
1565 free_memtype(__pa(addr[j]), __pa(addr[j]) + PAGE_SIZE);
1566
1567 return ret;
1568 }
1569
1570 int set_memory_array_uc(unsigned long *addr, int addrinarray)
1571 {
1572 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_UC_MINUS);
1573 }
1574 EXPORT_SYMBOL(set_memory_array_uc);
1575
1576 int set_memory_array_wc(unsigned long *addr, int addrinarray)
1577 {
1578 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WC);
1579 }
1580 EXPORT_SYMBOL(set_memory_array_wc);
1581
1582 int set_memory_array_wt(unsigned long *addr, int addrinarray)
1583 {
1584 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WT);
1585 }
1586 EXPORT_SYMBOL_GPL(set_memory_array_wt);
1587
1588 int _set_memory_wc(unsigned long addr, int numpages)
1589 {
1590 int ret;
1591 unsigned long addr_copy = addr;
1592
1593 ret = change_page_attr_set(&addr, numpages,
1594 cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1595 0);
1596 if (!ret) {
1597 ret = change_page_attr_set_clr(&addr_copy, numpages,
1598 cachemode2pgprot(
1599 _PAGE_CACHE_MODE_WC),
1600 __pgprot(_PAGE_CACHE_MASK),
1601 0, 0, NULL);
1602 }
1603 return ret;
1604 }
1605
1606 int set_memory_wc(unsigned long addr, int numpages)
1607 {
1608 int ret;
1609
1610 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1611 _PAGE_CACHE_MODE_WC, NULL);
1612 if (ret)
1613 return ret;
1614
1615 ret = _set_memory_wc(addr, numpages);
1616 if (ret)
1617 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1618
1619 return ret;
1620 }
1621 EXPORT_SYMBOL(set_memory_wc);
1622
1623 int _set_memory_wt(unsigned long addr, int numpages)
1624 {
1625 return change_page_attr_set(&addr, numpages,
1626 cachemode2pgprot(_PAGE_CACHE_MODE_WT), 0);
1627 }
1628
1629 int set_memory_wt(unsigned long addr, int numpages)
1630 {
1631 int ret;
1632
1633 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1634 _PAGE_CACHE_MODE_WT, NULL);
1635 if (ret)
1636 return ret;
1637
1638 ret = _set_memory_wt(addr, numpages);
1639 if (ret)
1640 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1641
1642 return ret;
1643 }
1644 EXPORT_SYMBOL_GPL(set_memory_wt);
1645
1646 int _set_memory_wb(unsigned long addr, int numpages)
1647 {
1648 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1649 return change_page_attr_clear(&addr, numpages,
1650 __pgprot(_PAGE_CACHE_MASK), 0);
1651 }
1652
1653 int set_memory_wb(unsigned long addr, int numpages)
1654 {
1655 int ret;
1656
1657 ret = _set_memory_wb(addr, numpages);
1658 if (ret)
1659 return ret;
1660
1661 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1662 return 0;
1663 }
1664 EXPORT_SYMBOL(set_memory_wb);
1665
1666 int set_memory_array_wb(unsigned long *addr, int addrinarray)
1667 {
1668 int i;
1669 int ret;
1670
1671 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1672 ret = change_page_attr_clear(addr, addrinarray,
1673 __pgprot(_PAGE_CACHE_MASK), 1);
1674 if (ret)
1675 return ret;
1676
1677 for (i = 0; i < addrinarray; i++)
1678 free_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE);
1679
1680 return 0;
1681 }
1682 EXPORT_SYMBOL(set_memory_array_wb);
1683
1684 int set_memory_x(unsigned long addr, int numpages)
1685 {
1686 if (!(__supported_pte_mask & _PAGE_NX))
1687 return 0;
1688
1689 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_NX), 0);
1690 }
1691 EXPORT_SYMBOL(set_memory_x);
1692
1693 int set_memory_nx(unsigned long addr, int numpages)
1694 {
1695 if (!(__supported_pte_mask & _PAGE_NX))
1696 return 0;
1697
1698 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_NX), 0);
1699 }
1700 EXPORT_SYMBOL(set_memory_nx);
1701
1702 int set_memory_ro(unsigned long addr, int numpages)
1703 {
1704 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_RW), 0);
1705 }
1706
1707 int set_memory_rw(unsigned long addr, int numpages)
1708 {
1709 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_RW), 0);
1710 }
1711
1712 int set_memory_np(unsigned long addr, int numpages)
1713 {
1714 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_PRESENT), 0);
1715 }
1716
1717 int set_memory_4k(unsigned long addr, int numpages)
1718 {
1719 return change_page_attr_set_clr(&addr, numpages, __pgprot(0),
1720 __pgprot(0), 1, 0, NULL);
1721 }
1722
1723 int set_pages_uc(struct page *page, int numpages)
1724 {
1725 unsigned long addr = (unsigned long)page_address(page);
1726
1727 return set_memory_uc(addr, numpages);
1728 }
1729 EXPORT_SYMBOL(set_pages_uc);
1730
1731 static int _set_pages_array(struct page **pages, int addrinarray,
1732 enum page_cache_mode new_type)
1733 {
1734 unsigned long start;
1735 unsigned long end;
1736 enum page_cache_mode set_type;
1737 int i;
1738 int free_idx;
1739 int ret;
1740
1741 for (i = 0; i < addrinarray; i++) {
1742 if (PageHighMem(pages[i]))
1743 continue;
1744 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1745 end = start + PAGE_SIZE;
1746 if (reserve_memtype(start, end, new_type, NULL))
1747 goto err_out;
1748 }
1749
1750 /* If WC, set to UC- first and then WC */
1751 set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
1752 _PAGE_CACHE_MODE_UC_MINUS : new_type;
1753
1754 ret = cpa_set_pages_array(pages, addrinarray,
1755 cachemode2pgprot(set_type));
1756 if (!ret && new_type == _PAGE_CACHE_MODE_WC)
1757 ret = change_page_attr_set_clr(NULL, addrinarray,
1758 cachemode2pgprot(
1759 _PAGE_CACHE_MODE_WC),
1760 __pgprot(_PAGE_CACHE_MASK),
1761 0, CPA_PAGES_ARRAY, pages);
1762 if (ret)
1763 goto err_out;
1764 return 0; /* Success */
1765 err_out:
1766 free_idx = i;
1767 for (i = 0; i < free_idx; i++) {
1768 if (PageHighMem(pages[i]))
1769 continue;
1770 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1771 end = start + PAGE_SIZE;
1772 free_memtype(start, end);
1773 }
1774 return -EINVAL;
1775 }
1776
1777 int set_pages_array_uc(struct page **pages, int addrinarray)
1778 {
1779 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_UC_MINUS);
1780 }
1781 EXPORT_SYMBOL(set_pages_array_uc);
1782
1783 int set_pages_array_wc(struct page **pages, int addrinarray)
1784 {
1785 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WC);
1786 }
1787 EXPORT_SYMBOL(set_pages_array_wc);
1788
1789 int set_pages_array_wt(struct page **pages, int addrinarray)
1790 {
1791 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WT);
1792 }
1793 EXPORT_SYMBOL_GPL(set_pages_array_wt);
1794
1795 int set_pages_wb(struct page *page, int numpages)
1796 {
1797 unsigned long addr = (unsigned long)page_address(page);
1798
1799 return set_memory_wb(addr, numpages);
1800 }
1801 EXPORT_SYMBOL(set_pages_wb);
1802
1803 int set_pages_array_wb(struct page **pages, int addrinarray)
1804 {
1805 int retval;
1806 unsigned long start;
1807 unsigned long end;
1808 int i;
1809
1810 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1811 retval = cpa_clear_pages_array(pages, addrinarray,
1812 __pgprot(_PAGE_CACHE_MASK));
1813 if (retval)
1814 return retval;
1815
1816 for (i = 0; i < addrinarray; i++) {
1817 if (PageHighMem(pages[i]))
1818 continue;
1819 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1820 end = start + PAGE_SIZE;
1821 free_memtype(start, end);
1822 }
1823
1824 return 0;
1825 }
1826 EXPORT_SYMBOL(set_pages_array_wb);
1827
1828 int set_pages_x(struct page *page, int numpages)
1829 {
1830 unsigned long addr = (unsigned long)page_address(page);
1831
1832 return set_memory_x(addr, numpages);
1833 }
1834 EXPORT_SYMBOL(set_pages_x);
1835
1836 int set_pages_nx(struct page *page, int numpages)
1837 {
1838 unsigned long addr = (unsigned long)page_address(page);
1839
1840 return set_memory_nx(addr, numpages);
1841 }
1842 EXPORT_SYMBOL(set_pages_nx);
1843
1844 int set_pages_ro(struct page *page, int numpages)
1845 {
1846 unsigned long addr = (unsigned long)page_address(page);
1847
1848 return set_memory_ro(addr, numpages);
1849 }
1850
1851 int set_pages_rw(struct page *page, int numpages)
1852 {
1853 unsigned long addr = (unsigned long)page_address(page);
1854
1855 return set_memory_rw(addr, numpages);
1856 }
1857
1858 #ifdef CONFIG_DEBUG_PAGEALLOC
1859
1860 static int __set_pages_p(struct page *page, int numpages)
1861 {
1862 unsigned long tempaddr = (unsigned long) page_address(page);
1863 struct cpa_data cpa = { .vaddr = &tempaddr,
1864 .pgd = NULL,
1865 .numpages = numpages,
1866 .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1867 .mask_clr = __pgprot(0),
1868 .flags = 0};
1869
1870 /*
1871 * No alias checking needed for setting present flag. otherwise,
1872 * we may need to break large pages for 64-bit kernel text
1873 * mappings (this adds to complexity if we want to do this from
1874 * atomic context especially). Let's keep it simple!
1875 */
1876 return __change_page_attr_set_clr(&cpa, 0);
1877 }
1878
1879 static int __set_pages_np(struct page *page, int numpages)
1880 {
1881 unsigned long tempaddr = (unsigned long) page_address(page);
1882 struct cpa_data cpa = { .vaddr = &tempaddr,
1883 .pgd = NULL,
1884 .numpages = numpages,
1885 .mask_set = __pgprot(0),
1886 .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1887 .flags = 0};
1888
1889 /*
1890 * No alias checking needed for setting not present flag. otherwise,
1891 * we may need to break large pages for 64-bit kernel text
1892 * mappings (this adds to complexity if we want to do this from
1893 * atomic context especially). Let's keep it simple!
1894 */
1895 return __change_page_attr_set_clr(&cpa, 0);
1896 }
1897
1898 void __kernel_map_pages(struct page *page, int numpages, int enable)
1899 {
1900 if (PageHighMem(page))
1901 return;
1902 if (!enable) {
1903 debug_check_no_locks_freed(page_address(page),
1904 numpages * PAGE_SIZE);
1905 }
1906
1907 /*
1908 * The return value is ignored as the calls cannot fail.
1909 * Large pages for identity mappings are not used at boot time
1910 * and hence no memory allocations during large page split.
1911 */
1912 if (enable)
1913 __set_pages_p(page, numpages);
1914 else
1915 __set_pages_np(page, numpages);
1916
1917 /*
1918 * We should perform an IPI and flush all tlbs,
1919 * but that can deadlock->flush only current cpu:
1920 */
1921 __flush_tlb_all();
1922
1923 arch_flush_lazy_mmu_mode();
1924 }
1925
1926 #ifdef CONFIG_HIBERNATION
1927
1928 bool kernel_page_present(struct page *page)
1929 {
1930 unsigned int level;
1931 pte_t *pte;
1932
1933 if (PageHighMem(page))
1934 return false;
1935
1936 pte = lookup_address((unsigned long)page_address(page), &level);
1937 return (pte_val(*pte) & _PAGE_PRESENT);
1938 }
1939
1940 #endif /* CONFIG_HIBERNATION */
1941
1942 #endif /* CONFIG_DEBUG_PAGEALLOC */
1943
1944 int kernel_map_pages_in_pgd(pgd_t *pgd, u64 pfn, unsigned long address,
1945 unsigned numpages, unsigned long page_flags)
1946 {
1947 int retval = -EINVAL;
1948
1949 struct cpa_data cpa = {
1950 .vaddr = &address,
1951 .pfn = pfn,
1952 .pgd = pgd,
1953 .numpages = numpages,
1954 .mask_set = __pgprot(0),
1955 .mask_clr = __pgprot(0),
1956 .flags = 0,
1957 };
1958
1959 if (!(__supported_pte_mask & _PAGE_NX))
1960 goto out;
1961
1962 if (!(page_flags & _PAGE_NX))
1963 cpa.mask_clr = __pgprot(_PAGE_NX);
1964
1965 cpa.mask_set = __pgprot(_PAGE_PRESENT | page_flags);
1966
1967 retval = __change_page_attr_set_clr(&cpa, 0);
1968 __flush_tlb_all();
1969
1970 out:
1971 return retval;
1972 }
1973
1974 void kernel_unmap_pages_in_pgd(pgd_t *root, unsigned long address,
1975 unsigned numpages)
1976 {
1977 unmap_pgd_range(root, address, address + (numpages << PAGE_SHIFT));
1978 }
1979
1980 /*
1981 * The testcases use internal knowledge of the implementation that shouldn't
1982 * be exposed to the rest of the kernel. Include these directly here.
1983 */
1984 #ifdef CONFIG_CPA_DEBUG
1985 #include "pageattr-test.c"
1986 #endif
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