x86: add PAT related debug prints
[deliverable/linux.git] / arch / x86 / mm / pat.c
1 /*
2 * Handle caching attributes in page tables (PAT)
3 *
4 * Authors: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
5 * Suresh B Siddha <suresh.b.siddha@intel.com>
6 *
7 * Loosely based on earlier PAT patchset from Eric Biederman and Andi Kleen.
8 */
9
10 #include <linux/mm.h>
11 #include <linux/kernel.h>
12 #include <linux/gfp.h>
13 #include <linux/fs.h>
14
15 #include <asm/msr.h>
16 #include <asm/tlbflush.h>
17 #include <asm/processor.h>
18 #include <asm/pgtable.h>
19 #include <asm/pat.h>
20 #include <asm/e820.h>
21 #include <asm/cacheflush.h>
22 #include <asm/fcntl.h>
23 #include <asm/mtrr.h>
24
25 int pat_wc_enabled = 1;
26
27 static u64 __read_mostly boot_pat_state;
28
29 static int nopat(char *str)
30 {
31 pat_wc_enabled = 0;
32 printk(KERN_INFO "x86: PAT support disabled.\n");
33
34 return 0;
35 }
36 early_param("nopat", nopat);
37
38 static int pat_known_cpu(void)
39 {
40 if (!pat_wc_enabled)
41 return 0;
42
43 if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL &&
44 (boot_cpu_data.x86 == 0xF ||
45 (boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model >= 15))) {
46 if (cpu_has_pat) {
47 return 1;
48 }
49 }
50
51 pat_wc_enabled = 0;
52 printk(KERN_INFO "CPU and/or kernel does not support PAT.\n");
53 return 0;
54 }
55
56 enum {
57 PAT_UC = 0, /* uncached */
58 PAT_WC = 1, /* Write combining */
59 PAT_WT = 4, /* Write Through */
60 PAT_WP = 5, /* Write Protected */
61 PAT_WB = 6, /* Write Back (default) */
62 PAT_UC_MINUS = 7, /* UC, but can be overriden by MTRR */
63 };
64
65 #define PAT(x,y) ((u64)PAT_ ## y << ((x)*8))
66
67 void pat_init(void)
68 {
69 u64 pat;
70
71 #ifndef CONFIG_X86_PAT
72 nopat(NULL);
73 #endif
74
75 /* Boot CPU enables PAT based on CPU feature */
76 if (!smp_processor_id() && !pat_known_cpu())
77 return;
78
79 /* APs enable PAT iff boot CPU has enabled it before */
80 if (smp_processor_id() && !pat_wc_enabled)
81 return;
82
83 /* Set PWT to Write-Combining. All other bits stay the same */
84 /*
85 * PTE encoding used in Linux:
86 * PAT
87 * |PCD
88 * ||PWT
89 * |||
90 * 000 WB _PAGE_CACHE_WB
91 * 001 WC _PAGE_CACHE_WC
92 * 010 UC- _PAGE_CACHE_UC_MINUS
93 * 011 UC _PAGE_CACHE_UC
94 * PAT bit unused
95 */
96 pat = PAT(0,WB) | PAT(1,WC) | PAT(2,UC_MINUS) | PAT(3,UC) |
97 PAT(4,WB) | PAT(5,WC) | PAT(6,UC_MINUS) | PAT(7,UC);
98
99 /* Boot CPU check */
100 if (!smp_processor_id()) {
101 rdmsrl(MSR_IA32_CR_PAT, boot_pat_state);
102 }
103
104 wrmsrl(MSR_IA32_CR_PAT, pat);
105 printk(KERN_INFO "x86 PAT enabled: cpu %d, old 0x%Lx, new 0x%Lx\n",
106 smp_processor_id(), boot_pat_state, pat);
107 }
108
109 #undef PAT
110
111 static char *cattr_name(unsigned long flags)
112 {
113 switch (flags & _PAGE_CACHE_MASK) {
114 case _PAGE_CACHE_UC: return "uncached";
115 case _PAGE_CACHE_UC_MINUS: return "uncached-minus";
116 case _PAGE_CACHE_WB: return "write-back";
117 case _PAGE_CACHE_WC: return "write-combining";
118 default: return "broken";
119 }
120 }
121
122 /*
123 * The global memtype list keeps track of memory type for specific
124 * physical memory areas. Conflicting memory types in different
125 * mappings can cause CPU cache corruption. To avoid this we keep track.
126 *
127 * The list is sorted based on starting address and can contain multiple
128 * entries for each address (this allows reference counting for overlapping
129 * areas). All the aliases have the same cache attributes of course.
130 * Zero attributes are represented as holes.
131 *
132 * Currently the data structure is a list because the number of mappings
133 * are expected to be relatively small. If this should be a problem
134 * it could be changed to a rbtree or similar.
135 *
136 * memtype_lock protects the whole list.
137 */
138
139 struct memtype {
140 u64 start;
141 u64 end;
142 unsigned long type;
143 struct list_head nd;
144 };
145
146 static LIST_HEAD(memtype_list);
147 static DEFINE_SPINLOCK(memtype_lock); /* protects memtype list */
148
149 /*
150 * Does intersection of PAT memory type and MTRR memory type and returns
151 * the resulting memory type as PAT understands it.
152 * (Type in pat and mtrr will not have same value)
153 * The intersection is based on "Effective Memory Type" tables in IA-32
154 * SDM vol 3a
155 */
156 static int pat_x_mtrr_type(u64 start, u64 end, unsigned long prot,
157 unsigned long *ret_prot)
158 {
159 unsigned long pat_type;
160 u8 mtrr_type;
161
162 mtrr_type = mtrr_type_lookup(start, end);
163 if (mtrr_type == 0xFF) { /* MTRR not enabled */
164 *ret_prot = prot;
165 return 0;
166 }
167 if (mtrr_type == 0xFE) { /* MTRR match error */
168 *ret_prot = _PAGE_CACHE_UC;
169 return -1;
170 }
171 if (mtrr_type != MTRR_TYPE_UNCACHABLE &&
172 mtrr_type != MTRR_TYPE_WRBACK &&
173 mtrr_type != MTRR_TYPE_WRCOMB) { /* MTRR type unhandled */
174 *ret_prot = _PAGE_CACHE_UC;
175 return -1;
176 }
177
178 pat_type = prot & _PAGE_CACHE_MASK;
179 prot &= (~_PAGE_CACHE_MASK);
180
181 /* Currently doing intersection by hand. Optimize it later. */
182 if (pat_type == _PAGE_CACHE_WC) {
183 *ret_prot = prot | _PAGE_CACHE_WC;
184 } else if (pat_type == _PAGE_CACHE_UC_MINUS) {
185 *ret_prot = prot | _PAGE_CACHE_UC_MINUS;
186 } else if (pat_type == _PAGE_CACHE_UC ||
187 mtrr_type == MTRR_TYPE_UNCACHABLE) {
188 *ret_prot = prot | _PAGE_CACHE_UC;
189 } else if (mtrr_type == MTRR_TYPE_WRCOMB) {
190 *ret_prot = prot | _PAGE_CACHE_WC;
191 } else {
192 *ret_prot = prot | _PAGE_CACHE_WB;
193 }
194
195 return 0;
196 }
197
198 int reserve_memtype(u64 start, u64 end, unsigned long req_type,
199 unsigned long *ret_type)
200 {
201 struct memtype *new_entry = NULL;
202 struct memtype *parse;
203 unsigned long actual_type;
204 int err = 0;
205
206 /* Only track when pat_wc_enabled */
207 if (!pat_wc_enabled) {
208 if (ret_type)
209 *ret_type = req_type;
210
211 return 0;
212 }
213
214 /* Low ISA region is always mapped WB in page table. No need to track */
215 if (start >= ISA_START_ADDRESS && (end - 1) <= ISA_END_ADDRESS) {
216 if (ret_type)
217 *ret_type = _PAGE_CACHE_WB;
218
219 return 0;
220 }
221
222 req_type &= _PAGE_CACHE_MASK;
223 err = pat_x_mtrr_type(start, end, req_type, &actual_type);
224 if (err) {
225 if (ret_type)
226 *ret_type = actual_type;
227
228 return -EINVAL;
229 }
230
231 new_entry = kmalloc(sizeof(struct memtype), GFP_KERNEL);
232 if (!new_entry)
233 return -ENOMEM;
234
235 new_entry->start = start;
236 new_entry->end = end;
237 new_entry->type = actual_type;
238
239 if (ret_type)
240 *ret_type = actual_type;
241
242 spin_lock(&memtype_lock);
243
244 /* Search for existing mapping that overlaps the current range */
245 list_for_each_entry(parse, &memtype_list, nd) {
246 struct memtype *saved_ptr;
247
248 if (parse->start >= end) {
249 printk("New Entry\n");
250 list_add(&new_entry->nd, parse->nd.prev);
251 new_entry = NULL;
252 break;
253 }
254
255 if (start <= parse->start && end >= parse->start) {
256 if (actual_type != parse->type && ret_type) {
257 actual_type = parse->type;
258 *ret_type = actual_type;
259 new_entry->type = actual_type;
260 }
261
262 if (actual_type != parse->type) {
263 printk(
264 KERN_INFO "%s:%d conflicting memory types %Lx-%Lx %s<->%s\n",
265 current->comm, current->pid,
266 start, end,
267 cattr_name(actual_type),
268 cattr_name(parse->type));
269 err = -EBUSY;
270 break;
271 }
272
273 saved_ptr = parse;
274 /*
275 * Check to see whether the request overlaps more
276 * than one entry in the list
277 */
278 list_for_each_entry_continue(parse, &memtype_list, nd) {
279 if (end <= parse->start) {
280 break;
281 }
282
283 if (actual_type != parse->type) {
284 printk(
285 KERN_INFO "%s:%d conflicting memory types %Lx-%Lx %s<->%s\n",
286 current->comm, current->pid,
287 start, end,
288 cattr_name(actual_type),
289 cattr_name(parse->type));
290 err = -EBUSY;
291 break;
292 }
293 }
294
295 if (err) {
296 break;
297 }
298
299 printk("Overlap at 0x%Lx-0x%Lx\n",
300 saved_ptr->start, saved_ptr->end);
301 /* No conflict. Go ahead and add this new entry */
302 list_add(&new_entry->nd, saved_ptr->nd.prev);
303 new_entry = NULL;
304 break;
305 }
306
307 if (start < parse->end) {
308 if (actual_type != parse->type && ret_type) {
309 actual_type = parse->type;
310 *ret_type = actual_type;
311 new_entry->type = actual_type;
312 }
313
314 if (actual_type != parse->type) {
315 printk(
316 KERN_INFO "%s:%d conflicting memory types %Lx-%Lx %s<->%s\n",
317 current->comm, current->pid,
318 start, end,
319 cattr_name(actual_type),
320 cattr_name(parse->type));
321 err = -EBUSY;
322 break;
323 }
324
325 saved_ptr = parse;
326 /*
327 * Check to see whether the request overlaps more
328 * than one entry in the list
329 */
330 list_for_each_entry_continue(parse, &memtype_list, nd) {
331 if (end <= parse->start) {
332 break;
333 }
334
335 if (actual_type != parse->type) {
336 printk(
337 KERN_INFO "%s:%d conflicting memory types %Lx-%Lx %s<->%s\n",
338 current->comm, current->pid,
339 start, end,
340 cattr_name(actual_type),
341 cattr_name(parse->type));
342 err = -EBUSY;
343 break;
344 }
345 }
346
347 if (err) {
348 break;
349 }
350
351 printk("Overlap at 0x%Lx-0x%Lx\n",
352 saved_ptr->start, saved_ptr->end);
353 /* No conflict. Go ahead and add this new entry */
354 list_add(&new_entry->nd, &saved_ptr->nd);
355 new_entry = NULL;
356 break;
357 }
358 }
359
360 if (err) {
361 printk(
362 "reserve_memtype failed 0x%Lx-0x%Lx, track %s, req %s\n",
363 start, end, cattr_name(new_entry->type),
364 cattr_name(req_type));
365 kfree(new_entry);
366 spin_unlock(&memtype_lock);
367 return err;
368 }
369
370 if (new_entry) {
371 /* No conflict. Not yet added to the list. Add to the tail */
372 list_add_tail(&new_entry->nd, &memtype_list);
373 printk("New Entry\n");
374 }
375
376 if (ret_type) {
377 printk(
378 "reserve_memtype added 0x%Lx-0x%Lx, track %s, req %s, ret %s\n",
379 start, end, cattr_name(actual_type),
380 cattr_name(req_type), cattr_name(*ret_type));
381 } else {
382 printk(
383 "reserve_memtype added 0x%Lx-0x%Lx, track %s, req %s\n",
384 start, end, cattr_name(actual_type),
385 cattr_name(req_type));
386 }
387
388 spin_unlock(&memtype_lock);
389 return err;
390 }
391
392 int free_memtype(u64 start, u64 end)
393 {
394 struct memtype *ml;
395 int err = -EINVAL;
396
397 /* Only track when pat_wc_enabled */
398 if (!pat_wc_enabled) {
399 return 0;
400 }
401
402 /* Low ISA region is always mapped WB. No need to track */
403 if (start >= ISA_START_ADDRESS && end <= ISA_END_ADDRESS) {
404 return 0;
405 }
406
407 spin_lock(&memtype_lock);
408 list_for_each_entry(ml, &memtype_list, nd) {
409 if (ml->start == start && ml->end == end) {
410 list_del(&ml->nd);
411 kfree(ml);
412 err = 0;
413 break;
414 }
415 }
416 spin_unlock(&memtype_lock);
417
418 if (err) {
419 printk(KERN_DEBUG "%s:%d freeing invalid memtype %Lx-%Lx\n",
420 current->comm, current->pid, start, end);
421 }
422
423 printk( "free_memtype request 0x%Lx-0x%Lx\n", start, end);
424 return err;
425 }
426
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