arch/x86/platform/ce4100/ce4100.c

   1 /*
   2  * Intel CE4100  platform specific setup code
   3  *
   4  * (C) Copyright 2010 Intel Corporation
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; version 2
   9  * of the License.
  10  */
  11 #include <linux/init.h>
  12 #include <linux/kernel.h>
  13 #include <linux/irq.h>
  14 #include <linux/module.h>
  15 #include <linux/reboot.h>
  16 #include <linux/serial_reg.h>
  17 #include <linux/serial_8250.h>
  18 #include <linux/reboot.h>
  19
  20 #include <asm/ce4100.h>
  21 #include <asm/prom.h>
  22 #include <asm/setup.h>
  23 #include <asm/i8259.h>
  24 #include <asm/io.h>
  25 #include <asm/io_apic.h>
  26 #include <asm/emergency-restart.h>
  27
  28 static int ce4100_i8042_detect(void)
  29 {
  30         return 0;
  31 }
  32
  33 /*
  34  * The CE4100 platform has an internal 8051 Microcontroller which is
  35  * responsible for signaling to the external Power Management Unit the
  36  * intention to reset, reboot or power off the system. This 8051 device has
  37  * its command register mapped at I/O port 0xcf9 and the value 0x4 is used
  38  * to power off the system.
  39  */
  40 static void ce4100_power_off(void)
  41 {
  42         outb(0x4, 0xcf9);
  43 }
  44
  45 #ifdef CONFIG_SERIAL_8250
  46
  47 static unsigned int mem_serial_in(struct uart_port *p, int offset)
  48 {
  49         offset = offset << p->regshift;
  50         return readl(p->membase + offset);
  51 }
  52
  53 /*
  54  * The UART Tx interrupts are not set under some conditions and therefore serial
  55  * transmission hangs. This is a silicon issue and has not been root caused. The
  56  * workaround for this silicon issue checks UART_LSR_THRE bit and UART_LSR_TEMT
  57  * bit of LSR register in interrupt handler to see whether at least one of these
  58  * two bits is set, if so then process the transmit request. If this workaround
  59  * is not applied, then the serial transmission may hang. This workaround is for
  60  * errata number 9 in Errata - B step.
  61 */
  62
  63 static unsigned int ce4100_mem_serial_in(struct uart_port *p, int offset)
  64 {
  65         unsigned int ret, ier, lsr;
  66
  67         if (offset == UART_IIR) {
  68                 offset = offset << p->regshift;
  69                 ret = readl(p->membase + offset);
  70                 if (ret & UART_IIR_NO_INT) {
  71                         /* see if the TX interrupt should have really set */
  72                         ier = mem_serial_in(p, UART_IER);
  73                         /* see if the UART's XMIT interrupt is enabled */
  74                         if (ier & UART_IER_THRI) {
  75                                 lsr = mem_serial_in(p, UART_LSR);
  76                                 /* now check to see if the UART should be
  77                                    generating an interrupt (but isn't) */
  78                                 if (lsr & (UART_LSR_THRE | UART_LSR_TEMT))
  79                                         ret &= ~UART_IIR_NO_INT;
  80                         }
  81                 }
  82         } else
  83                 ret =  mem_serial_in(p, offset);
  84         return ret;
  85 }
  86
  87 static void ce4100_mem_serial_out(struct uart_port *p, int offset, int value)
  88 {
  89         offset = offset << p->regshift;
  90         writel(value, p->membase + offset);
  91 }
  92
  93 static void ce4100_serial_fixup(int port, struct uart_port *up,
  94         unsigned short *capabilites)
  95 {
  96 #ifdef CONFIG_EARLY_PRINTK
  97         /*
  98          * Over ride the legacy port configuration that comes from
  99          * asm/serial.h. Using the ioport driver then switching to the
 100          * PCI memmaped driver hangs the IOAPIC
 101          */
 102         if (up->iotype !=  UPIO_MEM32) {
 103                 up->uartclk  = 14745600;
 104                 up->mapbase = 0xdffe0200;
 105                 set_fixmap_nocache(FIX_EARLYCON_MEM_BASE,
 106                                 up->mapbase & PAGE_MASK);
 107                 up->membase =
 108                         (void __iomem *)__fix_to_virt(FIX_EARLYCON_MEM_BASE);
 109                 up->membase += up->mapbase & ~PAGE_MASK;
 110                 up->mapbase += port * 0x100;
 111                 up->membase += port * 0x100;
 112                 up->iotype   = UPIO_MEM32;
 113                 up->regshift = 2;
 114                 up->irq = 4;
 115         }
 116 #endif
 117         up->iobase = 0;
 118         up->serial_in = ce4100_mem_serial_in;
 119         up->serial_out = ce4100_mem_serial_out;
 120
 121         *capabilites |= (1 << 12);
 122 }
 123
 124 static __init void sdv_serial_fixup(void)
 125 {
 126         serial8250_set_isa_configurator(ce4100_serial_fixup);
 127 }
 128
 129 #else
 130 static inline void sdv_serial_fixup(void) {};
 131 #endif
 132
 133 static void __init sdv_arch_setup(void)
 134 {
 135         sdv_serial_fixup();
 136 }
 137
 138 #ifdef CONFIG_X86_IO_APIC
 139 static void sdv_pci_init(void)
 140 {
 141         x86_of_pci_init();
 142         /* We can't set this earlier, because we need to calibrate the timer */
 143         legacy_pic = &null_legacy_pic;
 144 }
 145 #endif
 146
 147 /*
 148  * CE4100 specific x86_init function overrides and early setup
 149  * calls.
 150  */
 151 void __init x86_ce4100_early_setup(void)
 152 {
 153         x86_init.oem.arch_setup = sdv_arch_setup;
 154         x86_platform.i8042_detect = ce4100_i8042_detect;
 155         x86_init.resources.probe_roms = x86_init_noop;
 156         x86_init.mpparse.get_smp_config = x86_init_uint_noop;
 157         x86_init.mpparse.find_smp_config = x86_init_noop;
 158         x86_init.pci.init = ce4100_pci_init;
 159
 160         /*
 161          * By default, the reboot method is ACPI which is supported by the
 162          * CE4100 bootloader CEFDK using FADT.ResetReg Address and ResetValue
 163          * the bootloader will however issue a system power off instead of
 164          * reboot. By using BOOT_KBD we ensure proper system reboot as
 165          * expected.
 166          */
 167         reboot_type = BOOT_KBD;
 168
 169 #ifdef CONFIG_X86_IO_APIC
 170         x86_init.pci.init_irq = sdv_pci_init;
 171         x86_init.mpparse.setup_ioapic_ids = setup_ioapic_ids_from_mpc_nocheck;
 172 #endif
 173
 174         pm_power_off = ce4100_power_off;
 175 }