arch/x86/platform/uv/uv_nmi.c

   1 /*
   2  * SGI NMI support routines
   3  *
   4  *  This program is free software; you can redistribute it and/or modify
   5  *  it under the terms of the GNU General Public License as published by
   6  *  the Free Software Foundation; either version 2 of the License, or
   7  *  (at your option) any later version.
   8  *
   9  *  This program is distributed in the hope that it will be useful,
  10  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  *  GNU General Public License for more details.
  13  *
  14  *  You should have received a copy of the GNU General Public License
  15  *  along with this program; if not, write to the Free Software
  16  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  17  *
  18  *  Copyright (c) 2009-2013 Silicon Graphics, Inc.  All Rights Reserved.
  19  *  Copyright (c) Mike Travis
  20  */
  21
  22 #include <linux/cpu.h>
  23 #include <linux/delay.h>
  24 #include <linux/kdb.h>
  25 #include <linux/kexec.h>
  26 #include <linux/kgdb.h>
  27 #include <linux/module.h>
  28 #include <linux/nmi.h>
  29 #include <linux/sched.h>
  30 #include <linux/slab.h>
  31
  32 #include <asm/apic.h>
  33 #include <asm/current.h>
  34 #include <asm/kdebug.h>
  35 #include <asm/local64.h>
  36 #include <asm/nmi.h>
  37 #include <asm/traps.h>
  38 #include <asm/uv/uv.h>
  39 #include <asm/uv/uv_hub.h>
  40 #include <asm/uv/uv_mmrs.h>
  41
  42 /*
  43  * UV handler for NMI
  44  *
  45  * Handle system-wide NMI events generated by the global 'power nmi' command.
  46  *
  47  * Basic operation is to field the NMI interrupt on each cpu and wait
  48  * until all cpus have arrived into the nmi handler.  If some cpus do not
  49  * make it into the handler, try and force them in with the IPI(NMI) signal.
  50  *
  51  * We also have to lessen UV Hub MMR accesses as much as possible as this
  52  * disrupts the UV Hub's primary mission of directing NumaLink traffic and
  53  * can cause system problems to occur.
  54  *
  55  * To do this we register our primary NMI notifier on the NMI_UNKNOWN
  56  * chain.  This reduces the number of false NMI calls when the perf
  57  * tools are running which generate an enormous number of NMIs per
  58  * second (~4M/s for 1024 cpu threads).  Our secondary NMI handler is
  59  * very short as it only checks that if it has been "pinged" with the
  60  * IPI(NMI) signal as mentioned above, and does not read the UV Hub's MMR.
  61  *
  62  */
  63
  64 static struct uv_hub_nmi_s **uv_hub_nmi_list;
  65
  66 DEFINE_PER_CPU(struct uv_cpu_nmi_s, __uv_cpu_nmi);
  67 EXPORT_PER_CPU_SYMBOL_GPL(__uv_cpu_nmi);
  68
  69 static unsigned long nmi_mmr;
  70 static unsigned long nmi_mmr_clear;
  71 static unsigned long nmi_mmr_pending;
  72
  73 static atomic_t uv_in_nmi;
  74 static atomic_t uv_nmi_cpu = ATOMIC_INIT(-1);
  75 static atomic_t uv_nmi_cpus_in_nmi = ATOMIC_INIT(-1);
  76 static atomic_t uv_nmi_slave_continue;
  77 static cpumask_var_t uv_nmi_cpu_mask;
  78
  79 /* Values for uv_nmi_slave_continue */
  80 #define SLAVE_CLEAR     0
  81 #define SLAVE_CONTINUE  1
  82 #define SLAVE_EXIT      2
  83
  84 /*
  85  * Default is all stack dumps go to the console and buffer.
  86  * Lower level to send to log buffer only.
  87  */
  88 static int uv_nmi_loglevel = 7;
  89 module_param_named(dump_loglevel, uv_nmi_loglevel, int, 0644);
  90
  91 /*
  92  * The following values show statistics on how perf events are affecting
  93  * this system.
  94  */
  95 static int param_get_local64(char *buffer, const struct kernel_param *kp)
  96 {
  97         return sprintf(buffer, "%lu\n", local64_read((local64_t *)kp->arg));
  98 }
  99
 100 static int param_set_local64(const char *val, const struct kernel_param *kp)
 101 {
 102         /* clear on any write */
 103         local64_set((local64_t *)kp->arg, 0);
 104         return 0;
 105 }
 106
 107 static struct kernel_param_ops param_ops_local64 = {
 108         .get = param_get_local64,
 109         .set = param_set_local64,
 110 };
 111 #define param_check_local64(name, p) __param_check(name, p, local64_t)
 112
 113 static local64_t uv_nmi_count;
 114 module_param_named(nmi_count, uv_nmi_count, local64, 0644);
 115
 116 static local64_t uv_nmi_misses;
 117 module_param_named(nmi_misses, uv_nmi_misses, local64, 0644);
 118
 119 static local64_t uv_nmi_ping_count;
 120 module_param_named(ping_count, uv_nmi_ping_count, local64, 0644);
 121
 122 static local64_t uv_nmi_ping_misses;
 123 module_param_named(ping_misses, uv_nmi_ping_misses, local64, 0644);
 124
 125 /*
 126  * Following values allow tuning for large systems under heavy loading
 127  */
 128 static int uv_nmi_initial_delay = 100;
 129 module_param_named(initial_delay, uv_nmi_initial_delay, int, 0644);
 130
 131 static int uv_nmi_slave_delay = 100;
 132 module_param_named(slave_delay, uv_nmi_slave_delay, int, 0644);
 133
 134 static int uv_nmi_loop_delay = 100;
 135 module_param_named(loop_delay, uv_nmi_loop_delay, int, 0644);
 136
 137 static int uv_nmi_trigger_delay = 10000;
 138 module_param_named(trigger_delay, uv_nmi_trigger_delay, int, 0644);
 139
 140 static int uv_nmi_wait_count = 100;
 141 module_param_named(wait_count, uv_nmi_wait_count, int, 0644);
 142
 143 static int uv_nmi_retry_count = 500;
 144 module_param_named(retry_count, uv_nmi_retry_count, int, 0644);
 145
 146 /*
 147  * Valid NMI Actions:
 148  *  "dump"      - dump process stack for each cpu
 149  *  "ips"       - dump IP info for each cpu
 150  *  "kdump"     - do crash dump
 151  *  "kdb"       - enter KDB (default)
 152  *  "kgdb"      - enter KGDB
 153  */
 154 static char uv_nmi_action[8] = "kdb";
 155 module_param_string(action, uv_nmi_action, sizeof(uv_nmi_action), 0644);
 156
 157 static inline bool uv_nmi_action_is(const char *action)
 158 {
 159         return (strncmp(uv_nmi_action, action, strlen(action)) == 0);
 160 }
 161
 162 /* Setup which NMI support is present in system */
 163 static void uv_nmi_setup_mmrs(void)
 164 {
 165         if (uv_read_local_mmr(UVH_NMI_MMRX_SUPPORTED)) {
 166                 uv_write_local_mmr(UVH_NMI_MMRX_REQ,
 167                                         1UL << UVH_NMI_MMRX_REQ_SHIFT);
 168                 nmi_mmr = UVH_NMI_MMRX;
 169                 nmi_mmr_clear = UVH_NMI_MMRX_CLEAR;
 170                 nmi_mmr_pending = 1UL << UVH_NMI_MMRX_SHIFT;
 171                 pr_info("UV: SMI NMI support: %s\n", UVH_NMI_MMRX_TYPE);
 172         } else {
 173                 nmi_mmr = UVH_NMI_MMR;
 174                 nmi_mmr_clear = UVH_NMI_MMR_CLEAR;
 175                 nmi_mmr_pending = 1UL << UVH_NMI_MMR_SHIFT;
 176                 pr_info("UV: SMI NMI support: %s\n", UVH_NMI_MMR_TYPE);
 177         }
 178 }
 179
 180 /* Read NMI MMR and check if NMI flag was set by BMC. */
 181 static inline int uv_nmi_test_mmr(struct uv_hub_nmi_s *hub_nmi)
 182 {
 183         hub_nmi->nmi_value = uv_read_local_mmr(nmi_mmr);
 184         atomic_inc(&hub_nmi->read_mmr_count);
 185         return !!(hub_nmi->nmi_value & nmi_mmr_pending);
 186 }
 187
 188 static inline void uv_local_mmr_clear_nmi(void)
 189 {
 190         uv_write_local_mmr(nmi_mmr_clear, nmi_mmr_pending);
 191 }
 192
 193 /*
 194  * If first cpu in on this hub, set hub_nmi "in_nmi" and "owner" values and
 195  * return true.  If first cpu in on the system, set global "in_nmi" flag.
 196  */
 197 static int uv_set_in_nmi(int cpu, struct uv_hub_nmi_s *hub_nmi)
 198 {
 199         int first = atomic_add_unless(&hub_nmi->in_nmi, 1, 1);
 200
 201         if (first) {
 202                 atomic_set(&hub_nmi->cpu_owner, cpu);
 203                 if (atomic_add_unless(&uv_in_nmi, 1, 1))
 204                         atomic_set(&uv_nmi_cpu, cpu);
 205
 206                 atomic_inc(&hub_nmi->nmi_count);
 207         }
 208         return first;
 209 }
 210
 211 /* Check if this is a system NMI event */
 212 static int uv_check_nmi(struct uv_hub_nmi_s *hub_nmi)
 213 {
 214         int cpu = smp_processor_id();
 215         int nmi = 0;
 216
 217         local64_inc(&uv_nmi_count);
 218         uv_cpu_nmi.queries++;
 219
 220         do {
 221                 nmi = atomic_read(&hub_nmi->in_nmi);
 222                 if (nmi)
 223                         break;
 224
 225                 if (raw_spin_trylock(&hub_nmi->nmi_lock)) {
 226
 227                         /* check hub MMR NMI flag */
 228                         if (uv_nmi_test_mmr(hub_nmi)) {
 229                                 uv_set_in_nmi(cpu, hub_nmi);
 230                                 nmi = 1;
 231                                 break;
 232                         }
 233
 234                         /* MMR NMI flag is clear */
 235                         raw_spin_unlock(&hub_nmi->nmi_lock);
 236
 237                 } else {
 238                         /* wait a moment for the hub nmi locker to set flag */
 239                         cpu_relax();
 240                         udelay(uv_nmi_slave_delay);
 241
 242                         /* re-check hub in_nmi flag */
 243                         nmi = atomic_read(&hub_nmi->in_nmi);
 244                         if (nmi)
 245                                 break;
 246                 }
 247
 248                 /* check if this BMC missed setting the MMR NMI flag */
 249                 if (!nmi) {
 250                         nmi = atomic_read(&uv_in_nmi);
 251                         if (nmi)
 252                                 uv_set_in_nmi(cpu, hub_nmi);
 253                 }
 254
 255         } while (0);
 256
 257         if (!nmi)
 258                 local64_inc(&uv_nmi_misses);
 259
 260         return nmi;
 261 }
 262
 263 /* Need to reset the NMI MMR register, but only once per hub. */
 264 static inline void uv_clear_nmi(int cpu)
 265 {
 266         struct uv_hub_nmi_s *hub_nmi = uv_hub_nmi;
 267
 268         if (cpu == atomic_read(&hub_nmi->cpu_owner)) {
 269                 atomic_set(&hub_nmi->cpu_owner, -1);
 270                 atomic_set(&hub_nmi->in_nmi, 0);
 271                 uv_local_mmr_clear_nmi();
 272                 raw_spin_unlock(&hub_nmi->nmi_lock);
 273         }
 274 }
 275
 276 /* Print non-responding cpus */
 277 static void uv_nmi_nr_cpus_pr(char *fmt)
 278 {
 279         static char cpu_list[1024];
 280         int len = sizeof(cpu_list);
 281         int c = cpumask_weight(uv_nmi_cpu_mask);
 282         int n = cpulist_scnprintf(cpu_list, len, uv_nmi_cpu_mask);
 283
 284         if (n >= len-1)
 285                 strcpy(&cpu_list[len - 6], "...\n");
 286
 287         printk(fmt, c, cpu_list);
 288 }
 289
 290 /* Ping non-responding cpus attemping to force them into the NMI handler */
 291 static void uv_nmi_nr_cpus_ping(void)
 292 {
 293         int cpu;
 294
 295         for_each_cpu(cpu, uv_nmi_cpu_mask)
 296                 atomic_set(&uv_cpu_nmi_per(cpu).pinging, 1);
 297
 298         apic->send_IPI_mask(uv_nmi_cpu_mask, APIC_DM_NMI);
 299 }
 300
 301 /* Clean up flags for cpus that ignored both NMI and ping */
 302 static void uv_nmi_cleanup_mask(void)
 303 {
 304         int cpu;
 305
 306         for_each_cpu(cpu, uv_nmi_cpu_mask) {
 307                 atomic_set(&uv_cpu_nmi_per(cpu).pinging, 0);
 308                 atomic_set(&uv_cpu_nmi_per(cpu).state, UV_NMI_STATE_OUT);
 309                 cpumask_clear_cpu(cpu, uv_nmi_cpu_mask);
 310         }
 311 }
 312
 313 /* Loop waiting as cpus enter nmi handler */
 314 static int uv_nmi_wait_cpus(int first)
 315 {
 316         int i, j, k, n = num_online_cpus();
 317         int last_k = 0, waiting = 0;
 318
 319         if (first) {
 320                 cpumask_copy(uv_nmi_cpu_mask, cpu_online_mask);
 321                 k = 0;
 322         } else {
 323                 k = n - cpumask_weight(uv_nmi_cpu_mask);
 324         }
 325
 326         udelay(uv_nmi_initial_delay);
 327         for (i = 0; i < uv_nmi_retry_count; i++) {
 328                 int loop_delay = uv_nmi_loop_delay;
 329
 330                 for_each_cpu(j, uv_nmi_cpu_mask) {
 331                         if (atomic_read(&uv_cpu_nmi_per(j).state)) {
 332                                 cpumask_clear_cpu(j, uv_nmi_cpu_mask);
 333                                 if (++k >= n)
 334                                         break;
 335                         }
 336                 }
 337                 if (k >= n) {           /* all in? */
 338                         k = n;
 339                         break;
 340                 }
 341                 if (last_k != k) {      /* abort if no new cpus coming in */
 342                         last_k = k;
 343                         waiting = 0;
 344                 } else if (++waiting > uv_nmi_wait_count)
 345                         break;
 346
 347                 /* extend delay if waiting only for cpu 0 */
 348                 if (waiting && (n - k) == 1 &&
 349                     cpumask_test_cpu(0, uv_nmi_cpu_mask))
 350                         loop_delay *= 100;
 351
 352                 udelay(loop_delay);
 353         }
 354         atomic_set(&uv_nmi_cpus_in_nmi, k);
 355         return n - k;
 356 }
 357
 358 /* Wait until all slave cpus have entered UV NMI handler */
 359 static void uv_nmi_wait(int master)
 360 {
 361         /* indicate this cpu is in */
 362         atomic_set(&uv_cpu_nmi.state, UV_NMI_STATE_IN);
 363
 364         /* if not the first cpu in (the master), then we are a slave cpu */
 365         if (!master)
 366                 return;
 367
 368         do {
 369                 /* wait for all other cpus to gather here */
 370                 if (!uv_nmi_wait_cpus(1))
 371                         break;
 372
 373                 /* if not all made it in, send IPI NMI to them */
 374                 uv_nmi_nr_cpus_pr(KERN_ALERT
 375                         "UV: Sending NMI IPI to %d non-responding CPUs: %s\n");
 376                 uv_nmi_nr_cpus_ping();
 377
 378                 /* if all cpus are in, then done */
 379                 if (!uv_nmi_wait_cpus(0))
 380                         break;
 381
 382                 uv_nmi_nr_cpus_pr(KERN_ALERT
 383                         "UV: %d CPUs not in NMI loop: %s\n");
 384         } while (0);
 385
 386         pr_alert("UV: %d of %d CPUs in NMI\n",
 387                 atomic_read(&uv_nmi_cpus_in_nmi), num_online_cpus());
 388 }
 389
 390 static void uv_nmi_dump_cpu_ip_hdr(void)
 391 {
 392         printk(KERN_DEFAULT
 393                 "\nUV: %4s %6s %-32s %s   (Note: PID 0 not listed)\n",
 394                 "CPU", "PID", "COMMAND", "IP");
 395 }
 396
 397 static void uv_nmi_dump_cpu_ip(int cpu, struct pt_regs *regs)
 398 {
 399         printk(KERN_DEFAULT "UV: %4d %6d %-32.32s ",
 400                 cpu, current->pid, current->comm);
 401
 402         printk_address(regs->ip);
 403 }
 404
 405 /* Dump this cpu's state */
 406 static void uv_nmi_dump_state_cpu(int cpu, struct pt_regs *regs)
 407 {
 408         const char *dots = " ................................. ";
 409
 410         if (uv_nmi_action_is("ips")) {
 411                 if (cpu == 0)
 412                         uv_nmi_dump_cpu_ip_hdr();
 413
 414                 if (current->pid != 0)
 415                         uv_nmi_dump_cpu_ip(cpu, regs);
 416
 417         } else if (uv_nmi_action_is("dump")) {
 418                 printk(KERN_DEFAULT
 419                         "UV:%sNMI process trace for CPU %d\n", dots, cpu);
 420                 show_regs(regs);
 421         }
 422         atomic_set(&uv_cpu_nmi.state, UV_NMI_STATE_DUMP_DONE);
 423 }
 424
 425 /* Trigger a slave cpu to dump it's state */
 426 static void uv_nmi_trigger_dump(int cpu)
 427 {
 428         int retry = uv_nmi_trigger_delay;
 429
 430         if (atomic_read(&uv_cpu_nmi_per(cpu).state) != UV_NMI_STATE_IN)
 431                 return;
 432
 433         atomic_set(&uv_cpu_nmi_per(cpu).state, UV_NMI_STATE_DUMP);
 434         do {
 435                 cpu_relax();
 436                 udelay(10);
 437                 if (atomic_read(&uv_cpu_nmi_per(cpu).state)
 438                                 != UV_NMI_STATE_DUMP)
 439                         return;
 440         } while (--retry > 0);
 441
 442         pr_crit("UV: CPU %d stuck in process dump function\n", cpu);
 443         atomic_set(&uv_cpu_nmi_per(cpu).state, UV_NMI_STATE_DUMP_DONE);
 444 }
 445
 446 /* Wait until all cpus ready to exit */
 447 static void uv_nmi_sync_exit(int master)
 448 {
 449         atomic_dec(&uv_nmi_cpus_in_nmi);
 450         if (master) {
 451                 while (atomic_read(&uv_nmi_cpus_in_nmi) > 0)
 452                         cpu_relax();
 453                 atomic_set(&uv_nmi_slave_continue, SLAVE_CLEAR);
 454         } else {
 455                 while (atomic_read(&uv_nmi_slave_continue))
 456                         cpu_relax();
 457         }
 458 }
 459
 460 /* Walk through cpu list and dump state of each */
 461 static void uv_nmi_dump_state(int cpu, struct pt_regs *regs, int master)
 462 {
 463         if (master) {
 464                 int tcpu;
 465                 int ignored = 0;
 466                 int saved_console_loglevel = console_loglevel;
 467
 468                 pr_alert("UV: tracing %s for %d CPUs from CPU %d\n",
 469                         uv_nmi_action_is("ips") ? "IPs" : "processes",
 470                         atomic_read(&uv_nmi_cpus_in_nmi), cpu);
 471
 472                 console_loglevel = uv_nmi_loglevel;
 473                 atomic_set(&uv_nmi_slave_continue, SLAVE_EXIT);
 474                 for_each_online_cpu(tcpu) {
 475                         if (cpumask_test_cpu(tcpu, uv_nmi_cpu_mask))
 476                                 ignored++;
 477                         else if (tcpu == cpu)
 478                                 uv_nmi_dump_state_cpu(tcpu, regs);
 479                         else
 480                                 uv_nmi_trigger_dump(tcpu);
 481                 }
 482                 if (ignored)
 483                         printk(KERN_DEFAULT "UV: %d CPUs ignored NMI\n",
 484                                 ignored);
 485
 486                 console_loglevel = saved_console_loglevel;
 487                 pr_alert("UV: process trace complete\n");
 488         } else {
 489                 while (!atomic_read(&uv_nmi_slave_continue))
 490                         cpu_relax();
 491                 while (atomic_read(&uv_cpu_nmi.state) != UV_NMI_STATE_DUMP)
 492                         cpu_relax();
 493                 uv_nmi_dump_state_cpu(cpu, regs);
 494         }
 495         uv_nmi_sync_exit(master);
 496 }
 497
 498 static void uv_nmi_touch_watchdogs(void)
 499 {
 500         touch_softlockup_watchdog_sync();
 501         clocksource_touch_watchdog();
 502         rcu_cpu_stall_reset();
 503         touch_nmi_watchdog();
 504 }
 505
 506 #if defined(CONFIG_KEXEC)
 507 static atomic_t uv_nmi_kexec_failed;
 508 static void uv_nmi_kdump(int cpu, int master, struct pt_regs *regs)
 509 {
 510         /* Call crash to dump system state */
 511         if (master) {
 512                 pr_emerg("UV: NMI executing crash_kexec on CPU%d\n", cpu);
 513                 crash_kexec(regs);
 514
 515                 pr_emerg("UV: crash_kexec unexpectedly returned, ");
 516                 if (!kexec_crash_image) {
 517                         pr_cont("crash kernel not loaded\n");
 518                         atomic_set(&uv_nmi_kexec_failed, 1);
 519                         uv_nmi_sync_exit(1);
 520                         return;
 521                 }
 522                 pr_cont("kexec busy, stalling cpus while waiting\n");
 523         }
 524
 525         /* If crash exec fails the slaves should return, otherwise stall */
 526         while (atomic_read(&uv_nmi_kexec_failed) == 0)
 527                 mdelay(10);
 528
 529         /* Crash kernel most likely not loaded, return in an orderly fashion */
 530         uv_nmi_sync_exit(0);
 531 }
 532
 533 #else /* !CONFIG_KEXEC */
 534 static inline void uv_nmi_kdump(int cpu, int master, struct pt_regs *regs)
 535 {
 536         if (master)
 537                 pr_err("UV: NMI kdump: KEXEC not supported in this kernel\n");
 538 }
 539 #endif /* !CONFIG_KEXEC */
 540
 541 #ifdef CONFIG_KGDB
 542 #ifdef CONFIG_KGDB_KDB
 543 static inline int uv_nmi_kdb_reason(void)
 544 {
 545         return KDB_REASON_SYSTEM_NMI;
 546 }
 547 #else /* !CONFIG_KGDB_KDB */
 548 static inline int uv_nmi_kdb_reason(void)
 549 {
 550         /* Insure user is expecting to attach gdb remote */
 551         if (uv_nmi_action_is("kgdb"))
 552                 return 0;
 553
 554         pr_err("UV: NMI error: KDB is not enabled in this kernel\n");
 555         return -1;
 556 }
 557 #endif /* CONFIG_KGDB_KDB */
 558
 559 /*
 560  * Call KGDB/KDB from NMI handler
 561  *
 562  * Note that if both KGDB and KDB are configured, then the action of 'kgdb' or
 563  * 'kdb' has no affect on which is used.  See the KGDB documention for further
 564  * information.
 565  */
 566 static void uv_call_kgdb_kdb(int cpu, struct pt_regs *regs, int master)
 567 {
 568         if (master) {
 569                 int reason = uv_nmi_kdb_reason();
 570                 int ret;
 571
 572                 if (reason < 0)
 573                         return;
 574
 575                 /* call KGDB NMI handler as MASTER */
 576                 ret = kgdb_nmicallin(cpu, X86_TRAP_NMI, regs, reason,
 577                                 &uv_nmi_slave_continue);
 578                 if (ret) {
 579                         pr_alert("KGDB returned error, is kgdboc set?\n");
 580                         atomic_set(&uv_nmi_slave_continue, SLAVE_EXIT);
 581                 }
 582         } else {
 583                 /* wait for KGDB signal that it's ready for slaves to enter */
 584                 int sig;
 585
 586                 do {
 587                         cpu_relax();
 588                         sig = atomic_read(&uv_nmi_slave_continue);
 589                 } while (!sig);
 590
 591                 /* call KGDB as slave */
 592                 if (sig == SLAVE_CONTINUE)
 593                         kgdb_nmicallback(cpu, regs);
 594         }
 595         uv_nmi_sync_exit(master);
 596 }
 597
 598 #else /* !CONFIG_KGDB */
 599 static inline void uv_call_kgdb_kdb(int cpu, struct pt_regs *regs, int master)
 600 {
 601         pr_err("UV: NMI error: KGDB is not enabled in this kernel\n");
 602 }
 603 #endif /* !CONFIG_KGDB */
 604
 605 /*
 606  * UV NMI handler
 607  */
 608 int uv_handle_nmi(unsigned int reason, struct pt_regs *regs)
 609 {
 610         struct uv_hub_nmi_s *hub_nmi = uv_hub_nmi;
 611         int cpu = smp_processor_id();
 612         int master = 0;
 613         unsigned long flags;
 614
 615         local_irq_save(flags);
 616
 617         /* If not a UV System NMI, ignore */
 618         if (!atomic_read(&uv_cpu_nmi.pinging) && !uv_check_nmi(hub_nmi)) {
 619                 local_irq_restore(flags);
 620                 return NMI_DONE;
 621         }
 622
 623         /* Indicate we are the first CPU into the NMI handler */
 624         master = (atomic_read(&uv_nmi_cpu) == cpu);
 625
 626         /* If NMI action is "kdump", then attempt to do it */
 627         if (uv_nmi_action_is("kdump"))
 628                 uv_nmi_kdump(cpu, master, regs);
 629
 630         /* Pause as all cpus enter the NMI handler */
 631         uv_nmi_wait(master);
 632
 633         /* Dump state of each cpu */
 634         if (uv_nmi_action_is("ips") || uv_nmi_action_is("dump"))
 635                 uv_nmi_dump_state(cpu, regs, master);
 636
 637         /* Call KGDB/KDB if enabled */
 638         else if (uv_nmi_action_is("kdb") || uv_nmi_action_is("kgdb"))
 639                 uv_call_kgdb_kdb(cpu, regs, master);
 640
 641         /* Clear per_cpu "in nmi" flag */
 642         atomic_set(&uv_cpu_nmi.state, UV_NMI_STATE_OUT);
 643
 644         /* Clear MMR NMI flag on each hub */
 645         uv_clear_nmi(cpu);
 646
 647         /* Clear global flags */
 648         if (master) {
 649                 if (cpumask_weight(uv_nmi_cpu_mask))
 650                         uv_nmi_cleanup_mask();
 651                 atomic_set(&uv_nmi_cpus_in_nmi, -1);
 652                 atomic_set(&uv_nmi_cpu, -1);
 653                 atomic_set(&uv_in_nmi, 0);
 654         }
 655
 656         uv_nmi_touch_watchdogs();
 657         local_irq_restore(flags);
 658
 659         return NMI_HANDLED;
 660 }
 661
 662 /*
 663  * NMI handler for pulling in CPUs when perf events are grabbing our NMI
 664  */
 665 static int uv_handle_nmi_ping(unsigned int reason, struct pt_regs *regs)
 666 {
 667         int ret;
 668
 669         uv_cpu_nmi.queries++;
 670         if (!atomic_read(&uv_cpu_nmi.pinging)) {
 671                 local64_inc(&uv_nmi_ping_misses);
 672                 return NMI_DONE;
 673         }
 674
 675         uv_cpu_nmi.pings++;
 676         local64_inc(&uv_nmi_ping_count);
 677         ret = uv_handle_nmi(reason, regs);
 678         atomic_set(&uv_cpu_nmi.pinging, 0);
 679         return ret;
 680 }
 681
 682 static void uv_register_nmi_notifier(void)
 683 {
 684         if (register_nmi_handler(NMI_UNKNOWN, uv_handle_nmi, 0, "uv"))
 685                 pr_warn("UV: NMI handler failed to register\n");
 686
 687         if (register_nmi_handler(NMI_LOCAL, uv_handle_nmi_ping, 0, "uvping"))
 688                 pr_warn("UV: PING NMI handler failed to register\n");
 689 }
 690
 691 void uv_nmi_init(void)
 692 {
 693         unsigned int value;
 694
 695         /*
 696          * Unmask NMI on all cpus
 697          */
 698         value = apic_read(APIC_LVT1) | APIC_DM_NMI;
 699         value &= ~APIC_LVT_MASKED;
 700         apic_write(APIC_LVT1, value);
 701 }
 702
 703 void uv_nmi_setup(void)
 704 {
 705         int size = sizeof(void *) * (1 << NODES_SHIFT);
 706         int cpu, nid;
 707
 708         /* Setup hub nmi info */
 709         uv_nmi_setup_mmrs();
 710         uv_hub_nmi_list = kzalloc(size, GFP_KERNEL);
 711         pr_info("UV: NMI hub list @ 0x%p (%d)\n", uv_hub_nmi_list, size);
 712         BUG_ON(!uv_hub_nmi_list);
 713         size = sizeof(struct uv_hub_nmi_s);
 714         for_each_present_cpu(cpu) {
 715                 nid = cpu_to_node(cpu);
 716                 if (uv_hub_nmi_list[nid] == NULL) {
 717                         uv_hub_nmi_list[nid] = kzalloc_node(size,
 718                                                             GFP_KERNEL, nid);
 719                         BUG_ON(!uv_hub_nmi_list[nid]);
 720                         raw_spin_lock_init(&(uv_hub_nmi_list[nid]->nmi_lock));
 721                         atomic_set(&uv_hub_nmi_list[nid]->cpu_owner, -1);
 722                 }
 723                 uv_hub_nmi_per(cpu) = uv_hub_nmi_list[nid];
 724         }
 725         BUG_ON(!alloc_cpumask_var(&uv_nmi_cpu_mask, GFP_KERNEL));
 726         uv_register_nmi_notifier();
 727 }