arch/x86/realmode/rm/reboot.S

   1 #include <linux/linkage.h>
   2 #include <asm/segment.h>
   3 #include <asm/page_types.h>
   4 #include <asm/processor-flags.h>
   5 #include <asm/msr-index.h>
   6 #include "realmode.h"
   7
   8 /*
   9  * The following code and data reboots the machine by switching to real
  10  * mode and jumping to the BIOS reset entry point, as if the CPU has
  11  * really been reset.  The previous version asked the keyboard
  12  * controller to pulse the CPU reset line, which is more thorough, but
  13  * doesn't work with at least one type of 486 motherboard.  It is easy
  14  * to stop this code working; hence the copious comments.
  15  *
  16  * This code is called with the restart type (0 = BIOS, 1 = APM) in
  17  * the primary argument register (%eax for 32 bit, %edi for 64 bit).
  18  */
  19         .section ".text32", "ax"
  20         .code32
  21 ENTRY(machine_real_restart_asm)
  22
  23 #ifdef CONFIG_X86_64
  24         /* Switch to trampoline GDT as it is guaranteed < 4 GiB */
  25         movl    $__KERNEL_DS, %eax
  26         movl    %eax, %ds
  27         lgdtl   pa_tr_gdt
  28
  29         /* Disable paging to drop us out of long mode */
  30         movl    %cr0, %eax
  31         andl    $~X86_CR0_PG, %eax
  32         movl    %eax, %cr0
  33         ljmpl   $__KERNEL32_CS, $pa_machine_real_restart_paging_off
  34
  35 GLOBAL(machine_real_restart_paging_off)
  36         xorl    %eax, %eax
  37         xorl    %edx, %edx
  38         movl    $MSR_EFER, %ecx
  39         wrmsr
  40
  41         movl    %edi, %eax
  42
  43 #endif /* CONFIG_X86_64 */
  44
  45         /* Set up the IDT for real mode. */
  46         lidtl   pa_machine_real_restart_idt
  47
  48         /*
  49          * Set up a GDT from which we can load segment descriptors for real
  50          * mode.  The GDT is not used in real mode; it is just needed here to
  51          * prepare the descriptors.
  52          */
  53         lgdtl   pa_machine_real_restart_gdt
  54
  55         /*
  56          * Load the data segment registers with 16-bit compatible values
  57          */
  58         movl    $16, %ecx
  59         movl    %ecx, %ds
  60         movl    %ecx, %es
  61         movl    %ecx, %fs
  62         movl    %ecx, %gs
  63         movl    %ecx, %ss
  64         ljmpw   $8, $1f
  65
  66 /*
  67  * This is 16-bit protected mode code to disable paging and the cache,
  68  * switch to real mode and jump to the BIOS reset code.
  69  *
  70  * The instruction that switches to real mode by writing to CR0 must be
  71  * followed immediately by a far jump instruction, which set CS to a
  72  * valid value for real mode, and flushes the prefetch queue to avoid
  73  * running instructions that have already been decoded in protected
  74  * mode.
  75  *
  76  * Clears all the flags except ET, especially PG (paging), PE
  77  * (protected-mode enable) and TS (task switch for coprocessor state
  78  * save).  Flushes the TLB after paging has been disabled.  Sets CD and
  79  * NW, to disable the cache on a 486, and invalidates the cache.  This
  80  * is more like the state of a 486 after reset.  I don't know if
  81  * something else should be done for other chips.
  82  *
  83  * More could be done here to set up the registers as if a CPU reset had
  84  * occurred; hopefully real BIOSs don't assume much.  This is not the
  85  * actual BIOS entry point, anyway (that is at 0xfffffff0).
  86  *
  87  * Most of this work is probably excessive, but it is what is tested.
  88  */
  89         .text
  90         .code16
  91
  92         .balign 16
  93 machine_real_restart_asm16:
  94 1:
  95         xorl    %ecx, %ecx
  96         movl    %cr0, %edx
  97         andl    $0x00000011, %edx
  98         orl     $0x60000000, %edx
  99         movl    %edx, %cr0
 100         movl    %ecx, %cr3
 101         movl    %cr0, %edx
 102         testl   $0x60000000, %edx       /* If no cache bits -> no wbinvd */
 103         jz      2f
 104         wbinvd
 105 2:
 106         andb    $0x10, %dl
 107         movl    %edx, %cr0
 108         LJMPW_RM(3f)
 109 3:
 110         andw    %ax, %ax
 111         jz      bios
 112
 113 apm:
 114         movw    $0x1000, %ax
 115         movw    %ax, %ss
 116         movw    $0xf000, %sp
 117         movw    $0x5307, %ax
 118         movw    $0x0001, %bx
 119         movw    $0x0003, %cx
 120         int     $0x15
 121         /* This should never return... */
 122
 123 bios:
 124         ljmpw   $0xf000, $0xfff0
 125
 126         .section ".rodata", "a"
 127
 128         .balign 16
 129 GLOBAL(machine_real_restart_idt)
 130         .word   0xffff          /* Length - real mode default value */
 131         .long   0               /* Base - real mode default value */
 132 END(machine_real_restart_idt)
 133
 134         .balign 16
 135 GLOBAL(machine_real_restart_gdt)
 136         /* Self-pointer */
 137         .word   0xffff          /* Length - real mode default value */
 138         .long   pa_machine_real_restart_gdt
 139         .word   0
 140
 141         /*
 142          * 16-bit code segment pointing to real_mode_seg
 143          * Selector value 8
 144          */
 145         .word   0xffff          /* Limit */
 146         .long   0x9b000000 + pa_real_mode_base
 147         .word   0
 148
 149         /*
 150          * 16-bit data segment with the selector value 16 = 0x10 and
 151          * base value 0x100; since this is consistent with real mode
 152          * semantics we don't have to reload the segments once CR0.PE = 0.
 153          */
 154         .quad   GDT_ENTRY(0x0093, 0x100, 0xffff)
 155 END(machine_real_restart_gdt)