x86/xen: Make sure X2APIC_ENABLE bit of MSR_IA32_APICBASE is not set
[deliverable/linux.git] / arch / x86 / xen / mmu.c
1 /*
2 * Xen mmu operations
3 *
4 * This file contains the various mmu fetch and update operations.
5 * The most important job they must perform is the mapping between the
6 * domain's pfn and the overall machine mfns.
7 *
8 * Xen allows guests to directly update the pagetable, in a controlled
9 * fashion. In other words, the guest modifies the same pagetable
10 * that the CPU actually uses, which eliminates the overhead of having
11 * a separate shadow pagetable.
12 *
13 * In order to allow this, it falls on the guest domain to map its
14 * notion of a "physical" pfn - which is just a domain-local linear
15 * address - into a real "machine address" which the CPU's MMU can
16 * use.
17 *
18 * A pgd_t/pmd_t/pte_t will typically contain an mfn, and so can be
19 * inserted directly into the pagetable. When creating a new
20 * pte/pmd/pgd, it converts the passed pfn into an mfn. Conversely,
21 * when reading the content back with __(pgd|pmd|pte)_val, it converts
22 * the mfn back into a pfn.
23 *
24 * The other constraint is that all pages which make up a pagetable
25 * must be mapped read-only in the guest. This prevents uncontrolled
26 * guest updates to the pagetable. Xen strictly enforces this, and
27 * will disallow any pagetable update which will end up mapping a
28 * pagetable page RW, and will disallow using any writable page as a
29 * pagetable.
30 *
31 * Naively, when loading %cr3 with the base of a new pagetable, Xen
32 * would need to validate the whole pagetable before going on.
33 * Naturally, this is quite slow. The solution is to "pin" a
34 * pagetable, which enforces all the constraints on the pagetable even
35 * when it is not actively in use. This menas that Xen can be assured
36 * that it is still valid when you do load it into %cr3, and doesn't
37 * need to revalidate it.
38 *
39 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
40 */
41 #include <linux/sched.h>
42 #include <linux/highmem.h>
43 #include <linux/debugfs.h>
44 #include <linux/bug.h>
45 #include <linux/vmalloc.h>
46 #include <linux/module.h>
47 #include <linux/gfp.h>
48 #include <linux/memblock.h>
49 #include <linux/seq_file.h>
50 #include <linux/crash_dump.h>
51
52 #include <trace/events/xen.h>
53
54 #include <asm/pgtable.h>
55 #include <asm/tlbflush.h>
56 #include <asm/fixmap.h>
57 #include <asm/mmu_context.h>
58 #include <asm/setup.h>
59 #include <asm/paravirt.h>
60 #include <asm/e820.h>
61 #include <asm/linkage.h>
62 #include <asm/page.h>
63 #include <asm/init.h>
64 #include <asm/pat.h>
65 #include <asm/smp.h>
66
67 #include <asm/xen/hypercall.h>
68 #include <asm/xen/hypervisor.h>
69
70 #include <xen/xen.h>
71 #include <xen/page.h>
72 #include <xen/interface/xen.h>
73 #include <xen/interface/hvm/hvm_op.h>
74 #include <xen/interface/version.h>
75 #include <xen/interface/memory.h>
76 #include <xen/hvc-console.h>
77
78 #include "multicalls.h"
79 #include "mmu.h"
80 #include "debugfs.h"
81
82 /*
83 * Protects atomic reservation decrease/increase against concurrent increases.
84 * Also protects non-atomic updates of current_pages and balloon lists.
85 */
86 DEFINE_SPINLOCK(xen_reservation_lock);
87
88 #ifdef CONFIG_X86_32
89 /*
90 * Identity map, in addition to plain kernel map. This needs to be
91 * large enough to allocate page table pages to allocate the rest.
92 * Each page can map 2MB.
93 */
94 #define LEVEL1_IDENT_ENTRIES (PTRS_PER_PTE * 4)
95 static RESERVE_BRK_ARRAY(pte_t, level1_ident_pgt, LEVEL1_IDENT_ENTRIES);
96 #endif
97 #ifdef CONFIG_X86_64
98 /* l3 pud for userspace vsyscall mapping */
99 static pud_t level3_user_vsyscall[PTRS_PER_PUD] __page_aligned_bss;
100 #endif /* CONFIG_X86_64 */
101
102 /*
103 * Note about cr3 (pagetable base) values:
104 *
105 * xen_cr3 contains the current logical cr3 value; it contains the
106 * last set cr3. This may not be the current effective cr3, because
107 * its update may be being lazily deferred. However, a vcpu looking
108 * at its own cr3 can use this value knowing that it everything will
109 * be self-consistent.
110 *
111 * xen_current_cr3 contains the actual vcpu cr3; it is set once the
112 * hypercall to set the vcpu cr3 is complete (so it may be a little
113 * out of date, but it will never be set early). If one vcpu is
114 * looking at another vcpu's cr3 value, it should use this variable.
115 */
116 DEFINE_PER_CPU(unsigned long, xen_cr3); /* cr3 stored as physaddr */
117 DEFINE_PER_CPU(unsigned long, xen_current_cr3); /* actual vcpu cr3 */
118
119
120 /*
121 * Just beyond the highest usermode address. STACK_TOP_MAX has a
122 * redzone above it, so round it up to a PGD boundary.
123 */
124 #define USER_LIMIT ((STACK_TOP_MAX + PGDIR_SIZE - 1) & PGDIR_MASK)
125
126 unsigned long arbitrary_virt_to_mfn(void *vaddr)
127 {
128 xmaddr_t maddr = arbitrary_virt_to_machine(vaddr);
129
130 return PFN_DOWN(maddr.maddr);
131 }
132
133 xmaddr_t arbitrary_virt_to_machine(void *vaddr)
134 {
135 unsigned long address = (unsigned long)vaddr;
136 unsigned int level;
137 pte_t *pte;
138 unsigned offset;
139
140 /*
141 * if the PFN is in the linear mapped vaddr range, we can just use
142 * the (quick) virt_to_machine() p2m lookup
143 */
144 if (virt_addr_valid(vaddr))
145 return virt_to_machine(vaddr);
146
147 /* otherwise we have to do a (slower) full page-table walk */
148
149 pte = lookup_address(address, &level);
150 BUG_ON(pte == NULL);
151 offset = address & ~PAGE_MASK;
152 return XMADDR(((phys_addr_t)pte_mfn(*pte) << PAGE_SHIFT) + offset);
153 }
154 EXPORT_SYMBOL_GPL(arbitrary_virt_to_machine);
155
156 void make_lowmem_page_readonly(void *vaddr)
157 {
158 pte_t *pte, ptev;
159 unsigned long address = (unsigned long)vaddr;
160 unsigned int level;
161
162 pte = lookup_address(address, &level);
163 if (pte == NULL)
164 return; /* vaddr missing */
165
166 ptev = pte_wrprotect(*pte);
167
168 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
169 BUG();
170 }
171
172 void make_lowmem_page_readwrite(void *vaddr)
173 {
174 pte_t *pte, ptev;
175 unsigned long address = (unsigned long)vaddr;
176 unsigned int level;
177
178 pte = lookup_address(address, &level);
179 if (pte == NULL)
180 return; /* vaddr missing */
181
182 ptev = pte_mkwrite(*pte);
183
184 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
185 BUG();
186 }
187
188
189 static bool xen_page_pinned(void *ptr)
190 {
191 struct page *page = virt_to_page(ptr);
192
193 return PagePinned(page);
194 }
195
196 void xen_set_domain_pte(pte_t *ptep, pte_t pteval, unsigned domid)
197 {
198 struct multicall_space mcs;
199 struct mmu_update *u;
200
201 trace_xen_mmu_set_domain_pte(ptep, pteval, domid);
202
203 mcs = xen_mc_entry(sizeof(*u));
204 u = mcs.args;
205
206 /* ptep might be kmapped when using 32-bit HIGHPTE */
207 u->ptr = virt_to_machine(ptep).maddr;
208 u->val = pte_val_ma(pteval);
209
210 MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, domid);
211
212 xen_mc_issue(PARAVIRT_LAZY_MMU);
213 }
214 EXPORT_SYMBOL_GPL(xen_set_domain_pte);
215
216 static void xen_extend_mmu_update(const struct mmu_update *update)
217 {
218 struct multicall_space mcs;
219 struct mmu_update *u;
220
221 mcs = xen_mc_extend_args(__HYPERVISOR_mmu_update, sizeof(*u));
222
223 if (mcs.mc != NULL) {
224 mcs.mc->args[1]++;
225 } else {
226 mcs = __xen_mc_entry(sizeof(*u));
227 MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
228 }
229
230 u = mcs.args;
231 *u = *update;
232 }
233
234 static void xen_extend_mmuext_op(const struct mmuext_op *op)
235 {
236 struct multicall_space mcs;
237 struct mmuext_op *u;
238
239 mcs = xen_mc_extend_args(__HYPERVISOR_mmuext_op, sizeof(*u));
240
241 if (mcs.mc != NULL) {
242 mcs.mc->args[1]++;
243 } else {
244 mcs = __xen_mc_entry(sizeof(*u));
245 MULTI_mmuext_op(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
246 }
247
248 u = mcs.args;
249 *u = *op;
250 }
251
252 static void xen_set_pmd_hyper(pmd_t *ptr, pmd_t val)
253 {
254 struct mmu_update u;
255
256 preempt_disable();
257
258 xen_mc_batch();
259
260 /* ptr may be ioremapped for 64-bit pagetable setup */
261 u.ptr = arbitrary_virt_to_machine(ptr).maddr;
262 u.val = pmd_val_ma(val);
263 xen_extend_mmu_update(&u);
264
265 xen_mc_issue(PARAVIRT_LAZY_MMU);
266
267 preempt_enable();
268 }
269
270 static void xen_set_pmd(pmd_t *ptr, pmd_t val)
271 {
272 trace_xen_mmu_set_pmd(ptr, val);
273
274 /* If page is not pinned, we can just update the entry
275 directly */
276 if (!xen_page_pinned(ptr)) {
277 *ptr = val;
278 return;
279 }
280
281 xen_set_pmd_hyper(ptr, val);
282 }
283
284 /*
285 * Associate a virtual page frame with a given physical page frame
286 * and protection flags for that frame.
287 */
288 void set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags)
289 {
290 set_pte_vaddr(vaddr, mfn_pte(mfn, flags));
291 }
292
293 static bool xen_batched_set_pte(pte_t *ptep, pte_t pteval)
294 {
295 struct mmu_update u;
296
297 if (paravirt_get_lazy_mode() != PARAVIRT_LAZY_MMU)
298 return false;
299
300 xen_mc_batch();
301
302 u.ptr = virt_to_machine(ptep).maddr | MMU_NORMAL_PT_UPDATE;
303 u.val = pte_val_ma(pteval);
304 xen_extend_mmu_update(&u);
305
306 xen_mc_issue(PARAVIRT_LAZY_MMU);
307
308 return true;
309 }
310
311 static inline void __xen_set_pte(pte_t *ptep, pte_t pteval)
312 {
313 if (!xen_batched_set_pte(ptep, pteval)) {
314 /*
315 * Could call native_set_pte() here and trap and
316 * emulate the PTE write but with 32-bit guests this
317 * needs two traps (one for each of the two 32-bit
318 * words in the PTE) so do one hypercall directly
319 * instead.
320 */
321 struct mmu_update u;
322
323 u.ptr = virt_to_machine(ptep).maddr | MMU_NORMAL_PT_UPDATE;
324 u.val = pte_val_ma(pteval);
325 HYPERVISOR_mmu_update(&u, 1, NULL, DOMID_SELF);
326 }
327 }
328
329 static void xen_set_pte(pte_t *ptep, pte_t pteval)
330 {
331 trace_xen_mmu_set_pte(ptep, pteval);
332 __xen_set_pte(ptep, pteval);
333 }
334
335 static void xen_set_pte_at(struct mm_struct *mm, unsigned long addr,
336 pte_t *ptep, pte_t pteval)
337 {
338 trace_xen_mmu_set_pte_at(mm, addr, ptep, pteval);
339 __xen_set_pte(ptep, pteval);
340 }
341
342 pte_t xen_ptep_modify_prot_start(struct mm_struct *mm,
343 unsigned long addr, pte_t *ptep)
344 {
345 /* Just return the pte as-is. We preserve the bits on commit */
346 trace_xen_mmu_ptep_modify_prot_start(mm, addr, ptep, *ptep);
347 return *ptep;
348 }
349
350 void xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
351 pte_t *ptep, pte_t pte)
352 {
353 struct mmu_update u;
354
355 trace_xen_mmu_ptep_modify_prot_commit(mm, addr, ptep, pte);
356 xen_mc_batch();
357
358 u.ptr = virt_to_machine(ptep).maddr | MMU_PT_UPDATE_PRESERVE_AD;
359 u.val = pte_val_ma(pte);
360 xen_extend_mmu_update(&u);
361
362 xen_mc_issue(PARAVIRT_LAZY_MMU);
363 }
364
365 /* Assume pteval_t is equivalent to all the other *val_t types. */
366 static pteval_t pte_mfn_to_pfn(pteval_t val)
367 {
368 if (val & _PAGE_PRESENT) {
369 unsigned long mfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
370 unsigned long pfn = mfn_to_pfn(mfn);
371
372 pteval_t flags = val & PTE_FLAGS_MASK;
373 if (unlikely(pfn == ~0))
374 val = flags & ~_PAGE_PRESENT;
375 else
376 val = ((pteval_t)pfn << PAGE_SHIFT) | flags;
377 }
378
379 return val;
380 }
381
382 static pteval_t pte_pfn_to_mfn(pteval_t val)
383 {
384 if (val & _PAGE_PRESENT) {
385 unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
386 pteval_t flags = val & PTE_FLAGS_MASK;
387 unsigned long mfn;
388
389 if (!xen_feature(XENFEAT_auto_translated_physmap))
390 mfn = __pfn_to_mfn(pfn);
391 else
392 mfn = pfn;
393 /*
394 * If there's no mfn for the pfn, then just create an
395 * empty non-present pte. Unfortunately this loses
396 * information about the original pfn, so
397 * pte_mfn_to_pfn is asymmetric.
398 */
399 if (unlikely(mfn == INVALID_P2M_ENTRY)) {
400 mfn = 0;
401 flags = 0;
402 } else
403 mfn &= ~(FOREIGN_FRAME_BIT | IDENTITY_FRAME_BIT);
404 val = ((pteval_t)mfn << PAGE_SHIFT) | flags;
405 }
406
407 return val;
408 }
409
410 __visible pteval_t xen_pte_val(pte_t pte)
411 {
412 pteval_t pteval = pte.pte;
413
414 return pte_mfn_to_pfn(pteval);
415 }
416 PV_CALLEE_SAVE_REGS_THUNK(xen_pte_val);
417
418 __visible pgdval_t xen_pgd_val(pgd_t pgd)
419 {
420 return pte_mfn_to_pfn(pgd.pgd);
421 }
422 PV_CALLEE_SAVE_REGS_THUNK(xen_pgd_val);
423
424 __visible pte_t xen_make_pte(pteval_t pte)
425 {
426 pte = pte_pfn_to_mfn(pte);
427
428 return native_make_pte(pte);
429 }
430 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte);
431
432 __visible pgd_t xen_make_pgd(pgdval_t pgd)
433 {
434 pgd = pte_pfn_to_mfn(pgd);
435 return native_make_pgd(pgd);
436 }
437 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pgd);
438
439 __visible pmdval_t xen_pmd_val(pmd_t pmd)
440 {
441 return pte_mfn_to_pfn(pmd.pmd);
442 }
443 PV_CALLEE_SAVE_REGS_THUNK(xen_pmd_val);
444
445 static void xen_set_pud_hyper(pud_t *ptr, pud_t val)
446 {
447 struct mmu_update u;
448
449 preempt_disable();
450
451 xen_mc_batch();
452
453 /* ptr may be ioremapped for 64-bit pagetable setup */
454 u.ptr = arbitrary_virt_to_machine(ptr).maddr;
455 u.val = pud_val_ma(val);
456 xen_extend_mmu_update(&u);
457
458 xen_mc_issue(PARAVIRT_LAZY_MMU);
459
460 preempt_enable();
461 }
462
463 static void xen_set_pud(pud_t *ptr, pud_t val)
464 {
465 trace_xen_mmu_set_pud(ptr, val);
466
467 /* If page is not pinned, we can just update the entry
468 directly */
469 if (!xen_page_pinned(ptr)) {
470 *ptr = val;
471 return;
472 }
473
474 xen_set_pud_hyper(ptr, val);
475 }
476
477 #ifdef CONFIG_X86_PAE
478 static void xen_set_pte_atomic(pte_t *ptep, pte_t pte)
479 {
480 trace_xen_mmu_set_pte_atomic(ptep, pte);
481 set_64bit((u64 *)ptep, native_pte_val(pte));
482 }
483
484 static void xen_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
485 {
486 trace_xen_mmu_pte_clear(mm, addr, ptep);
487 if (!xen_batched_set_pte(ptep, native_make_pte(0)))
488 native_pte_clear(mm, addr, ptep);
489 }
490
491 static void xen_pmd_clear(pmd_t *pmdp)
492 {
493 trace_xen_mmu_pmd_clear(pmdp);
494 set_pmd(pmdp, __pmd(0));
495 }
496 #endif /* CONFIG_X86_PAE */
497
498 __visible pmd_t xen_make_pmd(pmdval_t pmd)
499 {
500 pmd = pte_pfn_to_mfn(pmd);
501 return native_make_pmd(pmd);
502 }
503 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pmd);
504
505 #if PAGETABLE_LEVELS == 4
506 __visible pudval_t xen_pud_val(pud_t pud)
507 {
508 return pte_mfn_to_pfn(pud.pud);
509 }
510 PV_CALLEE_SAVE_REGS_THUNK(xen_pud_val);
511
512 __visible pud_t xen_make_pud(pudval_t pud)
513 {
514 pud = pte_pfn_to_mfn(pud);
515
516 return native_make_pud(pud);
517 }
518 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pud);
519
520 static pgd_t *xen_get_user_pgd(pgd_t *pgd)
521 {
522 pgd_t *pgd_page = (pgd_t *)(((unsigned long)pgd) & PAGE_MASK);
523 unsigned offset = pgd - pgd_page;
524 pgd_t *user_ptr = NULL;
525
526 if (offset < pgd_index(USER_LIMIT)) {
527 struct page *page = virt_to_page(pgd_page);
528 user_ptr = (pgd_t *)page->private;
529 if (user_ptr)
530 user_ptr += offset;
531 }
532
533 return user_ptr;
534 }
535
536 static void __xen_set_pgd_hyper(pgd_t *ptr, pgd_t val)
537 {
538 struct mmu_update u;
539
540 u.ptr = virt_to_machine(ptr).maddr;
541 u.val = pgd_val_ma(val);
542 xen_extend_mmu_update(&u);
543 }
544
545 /*
546 * Raw hypercall-based set_pgd, intended for in early boot before
547 * there's a page structure. This implies:
548 * 1. The only existing pagetable is the kernel's
549 * 2. It is always pinned
550 * 3. It has no user pagetable attached to it
551 */
552 static void __init xen_set_pgd_hyper(pgd_t *ptr, pgd_t val)
553 {
554 preempt_disable();
555
556 xen_mc_batch();
557
558 __xen_set_pgd_hyper(ptr, val);
559
560 xen_mc_issue(PARAVIRT_LAZY_MMU);
561
562 preempt_enable();
563 }
564
565 static void xen_set_pgd(pgd_t *ptr, pgd_t val)
566 {
567 pgd_t *user_ptr = xen_get_user_pgd(ptr);
568
569 trace_xen_mmu_set_pgd(ptr, user_ptr, val);
570
571 /* If page is not pinned, we can just update the entry
572 directly */
573 if (!xen_page_pinned(ptr)) {
574 *ptr = val;
575 if (user_ptr) {
576 WARN_ON(xen_page_pinned(user_ptr));
577 *user_ptr = val;
578 }
579 return;
580 }
581
582 /* If it's pinned, then we can at least batch the kernel and
583 user updates together. */
584 xen_mc_batch();
585
586 __xen_set_pgd_hyper(ptr, val);
587 if (user_ptr)
588 __xen_set_pgd_hyper(user_ptr, val);
589
590 xen_mc_issue(PARAVIRT_LAZY_MMU);
591 }
592 #endif /* PAGETABLE_LEVELS == 4 */
593
594 /*
595 * (Yet another) pagetable walker. This one is intended for pinning a
596 * pagetable. This means that it walks a pagetable and calls the
597 * callback function on each page it finds making up the page table,
598 * at every level. It walks the entire pagetable, but it only bothers
599 * pinning pte pages which are below limit. In the normal case this
600 * will be STACK_TOP_MAX, but at boot we need to pin up to
601 * FIXADDR_TOP.
602 *
603 * For 32-bit the important bit is that we don't pin beyond there,
604 * because then we start getting into Xen's ptes.
605 *
606 * For 64-bit, we must skip the Xen hole in the middle of the address
607 * space, just after the big x86-64 virtual hole.
608 */
609 static int __xen_pgd_walk(struct mm_struct *mm, pgd_t *pgd,
610 int (*func)(struct mm_struct *mm, struct page *,
611 enum pt_level),
612 unsigned long limit)
613 {
614 int flush = 0;
615 unsigned hole_low, hole_high;
616 unsigned pgdidx_limit, pudidx_limit, pmdidx_limit;
617 unsigned pgdidx, pudidx, pmdidx;
618
619 /* The limit is the last byte to be touched */
620 limit--;
621 BUG_ON(limit >= FIXADDR_TOP);
622
623 if (xen_feature(XENFEAT_auto_translated_physmap))
624 return 0;
625
626 /*
627 * 64-bit has a great big hole in the middle of the address
628 * space, which contains the Xen mappings. On 32-bit these
629 * will end up making a zero-sized hole and so is a no-op.
630 */
631 hole_low = pgd_index(USER_LIMIT);
632 hole_high = pgd_index(PAGE_OFFSET);
633
634 pgdidx_limit = pgd_index(limit);
635 #if PTRS_PER_PUD > 1
636 pudidx_limit = pud_index(limit);
637 #else
638 pudidx_limit = 0;
639 #endif
640 #if PTRS_PER_PMD > 1
641 pmdidx_limit = pmd_index(limit);
642 #else
643 pmdidx_limit = 0;
644 #endif
645
646 for (pgdidx = 0; pgdidx <= pgdidx_limit; pgdidx++) {
647 pud_t *pud;
648
649 if (pgdidx >= hole_low && pgdidx < hole_high)
650 continue;
651
652 if (!pgd_val(pgd[pgdidx]))
653 continue;
654
655 pud = pud_offset(&pgd[pgdidx], 0);
656
657 if (PTRS_PER_PUD > 1) /* not folded */
658 flush |= (*func)(mm, virt_to_page(pud), PT_PUD);
659
660 for (pudidx = 0; pudidx < PTRS_PER_PUD; pudidx++) {
661 pmd_t *pmd;
662
663 if (pgdidx == pgdidx_limit &&
664 pudidx > pudidx_limit)
665 goto out;
666
667 if (pud_none(pud[pudidx]))
668 continue;
669
670 pmd = pmd_offset(&pud[pudidx], 0);
671
672 if (PTRS_PER_PMD > 1) /* not folded */
673 flush |= (*func)(mm, virt_to_page(pmd), PT_PMD);
674
675 for (pmdidx = 0; pmdidx < PTRS_PER_PMD; pmdidx++) {
676 struct page *pte;
677
678 if (pgdidx == pgdidx_limit &&
679 pudidx == pudidx_limit &&
680 pmdidx > pmdidx_limit)
681 goto out;
682
683 if (pmd_none(pmd[pmdidx]))
684 continue;
685
686 pte = pmd_page(pmd[pmdidx]);
687 flush |= (*func)(mm, pte, PT_PTE);
688 }
689 }
690 }
691
692 out:
693 /* Do the top level last, so that the callbacks can use it as
694 a cue to do final things like tlb flushes. */
695 flush |= (*func)(mm, virt_to_page(pgd), PT_PGD);
696
697 return flush;
698 }
699
700 static int xen_pgd_walk(struct mm_struct *mm,
701 int (*func)(struct mm_struct *mm, struct page *,
702 enum pt_level),
703 unsigned long limit)
704 {
705 return __xen_pgd_walk(mm, mm->pgd, func, limit);
706 }
707
708 /* If we're using split pte locks, then take the page's lock and
709 return a pointer to it. Otherwise return NULL. */
710 static spinlock_t *xen_pte_lock(struct page *page, struct mm_struct *mm)
711 {
712 spinlock_t *ptl = NULL;
713
714 #if USE_SPLIT_PTE_PTLOCKS
715 ptl = ptlock_ptr(page);
716 spin_lock_nest_lock(ptl, &mm->page_table_lock);
717 #endif
718
719 return ptl;
720 }
721
722 static void xen_pte_unlock(void *v)
723 {
724 spinlock_t *ptl = v;
725 spin_unlock(ptl);
726 }
727
728 static void xen_do_pin(unsigned level, unsigned long pfn)
729 {
730 struct mmuext_op op;
731
732 op.cmd = level;
733 op.arg1.mfn = pfn_to_mfn(pfn);
734
735 xen_extend_mmuext_op(&op);
736 }
737
738 static int xen_pin_page(struct mm_struct *mm, struct page *page,
739 enum pt_level level)
740 {
741 unsigned pgfl = TestSetPagePinned(page);
742 int flush;
743
744 if (pgfl)
745 flush = 0; /* already pinned */
746 else if (PageHighMem(page))
747 /* kmaps need flushing if we found an unpinned
748 highpage */
749 flush = 1;
750 else {
751 void *pt = lowmem_page_address(page);
752 unsigned long pfn = page_to_pfn(page);
753 struct multicall_space mcs = __xen_mc_entry(0);
754 spinlock_t *ptl;
755
756 flush = 0;
757
758 /*
759 * We need to hold the pagetable lock between the time
760 * we make the pagetable RO and when we actually pin
761 * it. If we don't, then other users may come in and
762 * attempt to update the pagetable by writing it,
763 * which will fail because the memory is RO but not
764 * pinned, so Xen won't do the trap'n'emulate.
765 *
766 * If we're using split pte locks, we can't hold the
767 * entire pagetable's worth of locks during the
768 * traverse, because we may wrap the preempt count (8
769 * bits). The solution is to mark RO and pin each PTE
770 * page while holding the lock. This means the number
771 * of locks we end up holding is never more than a
772 * batch size (~32 entries, at present).
773 *
774 * If we're not using split pte locks, we needn't pin
775 * the PTE pages independently, because we're
776 * protected by the overall pagetable lock.
777 */
778 ptl = NULL;
779 if (level == PT_PTE)
780 ptl = xen_pte_lock(page, mm);
781
782 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
783 pfn_pte(pfn, PAGE_KERNEL_RO),
784 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
785
786 if (ptl) {
787 xen_do_pin(MMUEXT_PIN_L1_TABLE, pfn);
788
789 /* Queue a deferred unlock for when this batch
790 is completed. */
791 xen_mc_callback(xen_pte_unlock, ptl);
792 }
793 }
794
795 return flush;
796 }
797
798 /* This is called just after a mm has been created, but it has not
799 been used yet. We need to make sure that its pagetable is all
800 read-only, and can be pinned. */
801 static void __xen_pgd_pin(struct mm_struct *mm, pgd_t *pgd)
802 {
803 trace_xen_mmu_pgd_pin(mm, pgd);
804
805 xen_mc_batch();
806
807 if (__xen_pgd_walk(mm, pgd, xen_pin_page, USER_LIMIT)) {
808 /* re-enable interrupts for flushing */
809 xen_mc_issue(0);
810
811 kmap_flush_unused();
812
813 xen_mc_batch();
814 }
815
816 #ifdef CONFIG_X86_64
817 {
818 pgd_t *user_pgd = xen_get_user_pgd(pgd);
819
820 xen_do_pin(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa(pgd)));
821
822 if (user_pgd) {
823 xen_pin_page(mm, virt_to_page(user_pgd), PT_PGD);
824 xen_do_pin(MMUEXT_PIN_L4_TABLE,
825 PFN_DOWN(__pa(user_pgd)));
826 }
827 }
828 #else /* CONFIG_X86_32 */
829 #ifdef CONFIG_X86_PAE
830 /* Need to make sure unshared kernel PMD is pinnable */
831 xen_pin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
832 PT_PMD);
833 #endif
834 xen_do_pin(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(pgd)));
835 #endif /* CONFIG_X86_64 */
836 xen_mc_issue(0);
837 }
838
839 static void xen_pgd_pin(struct mm_struct *mm)
840 {
841 __xen_pgd_pin(mm, mm->pgd);
842 }
843
844 /*
845 * On save, we need to pin all pagetables to make sure they get their
846 * mfns turned into pfns. Search the list for any unpinned pgds and pin
847 * them (unpinned pgds are not currently in use, probably because the
848 * process is under construction or destruction).
849 *
850 * Expected to be called in stop_machine() ("equivalent to taking
851 * every spinlock in the system"), so the locking doesn't really
852 * matter all that much.
853 */
854 void xen_mm_pin_all(void)
855 {
856 struct page *page;
857
858 spin_lock(&pgd_lock);
859
860 list_for_each_entry(page, &pgd_list, lru) {
861 if (!PagePinned(page)) {
862 __xen_pgd_pin(&init_mm, (pgd_t *)page_address(page));
863 SetPageSavePinned(page);
864 }
865 }
866
867 spin_unlock(&pgd_lock);
868 }
869
870 /*
871 * The init_mm pagetable is really pinned as soon as its created, but
872 * that's before we have page structures to store the bits. So do all
873 * the book-keeping now.
874 */
875 static int __init xen_mark_pinned(struct mm_struct *mm, struct page *page,
876 enum pt_level level)
877 {
878 SetPagePinned(page);
879 return 0;
880 }
881
882 static void __init xen_mark_init_mm_pinned(void)
883 {
884 xen_pgd_walk(&init_mm, xen_mark_pinned, FIXADDR_TOP);
885 }
886
887 static int xen_unpin_page(struct mm_struct *mm, struct page *page,
888 enum pt_level level)
889 {
890 unsigned pgfl = TestClearPagePinned(page);
891
892 if (pgfl && !PageHighMem(page)) {
893 void *pt = lowmem_page_address(page);
894 unsigned long pfn = page_to_pfn(page);
895 spinlock_t *ptl = NULL;
896 struct multicall_space mcs;
897
898 /*
899 * Do the converse to pin_page. If we're using split
900 * pte locks, we must be holding the lock for while
901 * the pte page is unpinned but still RO to prevent
902 * concurrent updates from seeing it in this
903 * partially-pinned state.
904 */
905 if (level == PT_PTE) {
906 ptl = xen_pte_lock(page, mm);
907
908 if (ptl)
909 xen_do_pin(MMUEXT_UNPIN_TABLE, pfn);
910 }
911
912 mcs = __xen_mc_entry(0);
913
914 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
915 pfn_pte(pfn, PAGE_KERNEL),
916 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
917
918 if (ptl) {
919 /* unlock when batch completed */
920 xen_mc_callback(xen_pte_unlock, ptl);
921 }
922 }
923
924 return 0; /* never need to flush on unpin */
925 }
926
927 /* Release a pagetables pages back as normal RW */
928 static void __xen_pgd_unpin(struct mm_struct *mm, pgd_t *pgd)
929 {
930 trace_xen_mmu_pgd_unpin(mm, pgd);
931
932 xen_mc_batch();
933
934 xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
935
936 #ifdef CONFIG_X86_64
937 {
938 pgd_t *user_pgd = xen_get_user_pgd(pgd);
939
940 if (user_pgd) {
941 xen_do_pin(MMUEXT_UNPIN_TABLE,
942 PFN_DOWN(__pa(user_pgd)));
943 xen_unpin_page(mm, virt_to_page(user_pgd), PT_PGD);
944 }
945 }
946 #endif
947
948 #ifdef CONFIG_X86_PAE
949 /* Need to make sure unshared kernel PMD is unpinned */
950 xen_unpin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
951 PT_PMD);
952 #endif
953
954 __xen_pgd_walk(mm, pgd, xen_unpin_page, USER_LIMIT);
955
956 xen_mc_issue(0);
957 }
958
959 static void xen_pgd_unpin(struct mm_struct *mm)
960 {
961 __xen_pgd_unpin(mm, mm->pgd);
962 }
963
964 /*
965 * On resume, undo any pinning done at save, so that the rest of the
966 * kernel doesn't see any unexpected pinned pagetables.
967 */
968 void xen_mm_unpin_all(void)
969 {
970 struct page *page;
971
972 spin_lock(&pgd_lock);
973
974 list_for_each_entry(page, &pgd_list, lru) {
975 if (PageSavePinned(page)) {
976 BUG_ON(!PagePinned(page));
977 __xen_pgd_unpin(&init_mm, (pgd_t *)page_address(page));
978 ClearPageSavePinned(page);
979 }
980 }
981
982 spin_unlock(&pgd_lock);
983 }
984
985 static void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next)
986 {
987 spin_lock(&next->page_table_lock);
988 xen_pgd_pin(next);
989 spin_unlock(&next->page_table_lock);
990 }
991
992 static void xen_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm)
993 {
994 spin_lock(&mm->page_table_lock);
995 xen_pgd_pin(mm);
996 spin_unlock(&mm->page_table_lock);
997 }
998
999
1000 #ifdef CONFIG_SMP
1001 /* Another cpu may still have their %cr3 pointing at the pagetable, so
1002 we need to repoint it somewhere else before we can unpin it. */
1003 static void drop_other_mm_ref(void *info)
1004 {
1005 struct mm_struct *mm = info;
1006 struct mm_struct *active_mm;
1007
1008 active_mm = this_cpu_read(cpu_tlbstate.active_mm);
1009
1010 if (active_mm == mm && this_cpu_read(cpu_tlbstate.state) != TLBSTATE_OK)
1011 leave_mm(smp_processor_id());
1012
1013 /* If this cpu still has a stale cr3 reference, then make sure
1014 it has been flushed. */
1015 if (this_cpu_read(xen_current_cr3) == __pa(mm->pgd))
1016 load_cr3(swapper_pg_dir);
1017 }
1018
1019 static void xen_drop_mm_ref(struct mm_struct *mm)
1020 {
1021 cpumask_var_t mask;
1022 unsigned cpu;
1023
1024 if (current->active_mm == mm) {
1025 if (current->mm == mm)
1026 load_cr3(swapper_pg_dir);
1027 else
1028 leave_mm(smp_processor_id());
1029 }
1030
1031 /* Get the "official" set of cpus referring to our pagetable. */
1032 if (!alloc_cpumask_var(&mask, GFP_ATOMIC)) {
1033 for_each_online_cpu(cpu) {
1034 if (!cpumask_test_cpu(cpu, mm_cpumask(mm))
1035 && per_cpu(xen_current_cr3, cpu) != __pa(mm->pgd))
1036 continue;
1037 smp_call_function_single(cpu, drop_other_mm_ref, mm, 1);
1038 }
1039 return;
1040 }
1041 cpumask_copy(mask, mm_cpumask(mm));
1042
1043 /* It's possible that a vcpu may have a stale reference to our
1044 cr3, because its in lazy mode, and it hasn't yet flushed
1045 its set of pending hypercalls yet. In this case, we can
1046 look at its actual current cr3 value, and force it to flush
1047 if needed. */
1048 for_each_online_cpu(cpu) {
1049 if (per_cpu(xen_current_cr3, cpu) == __pa(mm->pgd))
1050 cpumask_set_cpu(cpu, mask);
1051 }
1052
1053 if (!cpumask_empty(mask))
1054 smp_call_function_many(mask, drop_other_mm_ref, mm, 1);
1055 free_cpumask_var(mask);
1056 }
1057 #else
1058 static void xen_drop_mm_ref(struct mm_struct *mm)
1059 {
1060 if (current->active_mm == mm)
1061 load_cr3(swapper_pg_dir);
1062 }
1063 #endif
1064
1065 /*
1066 * While a process runs, Xen pins its pagetables, which means that the
1067 * hypervisor forces it to be read-only, and it controls all updates
1068 * to it. This means that all pagetable updates have to go via the
1069 * hypervisor, which is moderately expensive.
1070 *
1071 * Since we're pulling the pagetable down, we switch to use init_mm,
1072 * unpin old process pagetable and mark it all read-write, which
1073 * allows further operations on it to be simple memory accesses.
1074 *
1075 * The only subtle point is that another CPU may be still using the
1076 * pagetable because of lazy tlb flushing. This means we need need to
1077 * switch all CPUs off this pagetable before we can unpin it.
1078 */
1079 static void xen_exit_mmap(struct mm_struct *mm)
1080 {
1081 get_cpu(); /* make sure we don't move around */
1082 xen_drop_mm_ref(mm);
1083 put_cpu();
1084
1085 spin_lock(&mm->page_table_lock);
1086
1087 /* pgd may not be pinned in the error exit path of execve */
1088 if (xen_page_pinned(mm->pgd))
1089 xen_pgd_unpin(mm);
1090
1091 spin_unlock(&mm->page_table_lock);
1092 }
1093
1094 static void xen_post_allocator_init(void);
1095
1096 #ifdef CONFIG_X86_64
1097 static void __init xen_cleanhighmap(unsigned long vaddr,
1098 unsigned long vaddr_end)
1099 {
1100 unsigned long kernel_end = roundup((unsigned long)_brk_end, PMD_SIZE) - 1;
1101 pmd_t *pmd = level2_kernel_pgt + pmd_index(vaddr);
1102
1103 /* NOTE: The loop is more greedy than the cleanup_highmap variant.
1104 * We include the PMD passed in on _both_ boundaries. */
1105 for (; vaddr <= vaddr_end && (pmd < (level2_kernel_pgt + PAGE_SIZE));
1106 pmd++, vaddr += PMD_SIZE) {
1107 if (pmd_none(*pmd))
1108 continue;
1109 if (vaddr < (unsigned long) _text || vaddr > kernel_end)
1110 set_pmd(pmd, __pmd(0));
1111 }
1112 /* In case we did something silly, we should crash in this function
1113 * instead of somewhere later and be confusing. */
1114 xen_mc_flush();
1115 }
1116
1117 static void __init xen_pagetable_p2m_free(void)
1118 {
1119 unsigned long size;
1120 unsigned long addr;
1121
1122 size = PAGE_ALIGN(xen_start_info->nr_pages * sizeof(unsigned long));
1123
1124 /* No memory or already called. */
1125 if ((unsigned long)xen_p2m_addr == xen_start_info->mfn_list)
1126 return;
1127
1128 /* using __ka address and sticking INVALID_P2M_ENTRY! */
1129 memset((void *)xen_start_info->mfn_list, 0xff, size);
1130
1131 /* We should be in __ka space. */
1132 BUG_ON(xen_start_info->mfn_list < __START_KERNEL_map);
1133 addr = xen_start_info->mfn_list;
1134 /* We roundup to the PMD, which means that if anybody at this stage is
1135 * using the __ka address of xen_start_info or xen_start_info->shared_info
1136 * they are in going to crash. Fortunatly we have already revectored
1137 * in xen_setup_kernel_pagetable and in xen_setup_shared_info. */
1138 size = roundup(size, PMD_SIZE);
1139 xen_cleanhighmap(addr, addr + size);
1140
1141 size = PAGE_ALIGN(xen_start_info->nr_pages * sizeof(unsigned long));
1142 memblock_free(__pa(xen_start_info->mfn_list), size);
1143
1144 /* At this stage, cleanup_highmap has already cleaned __ka space
1145 * from _brk_limit way up to the max_pfn_mapped (which is the end of
1146 * the ramdisk). We continue on, erasing PMD entries that point to page
1147 * tables - do note that they are accessible at this stage via __va.
1148 * For good measure we also round up to the PMD - which means that if
1149 * anybody is using __ka address to the initial boot-stack - and try
1150 * to use it - they are going to crash. The xen_start_info has been
1151 * taken care of already in xen_setup_kernel_pagetable. */
1152 addr = xen_start_info->pt_base;
1153 size = roundup(xen_start_info->nr_pt_frames * PAGE_SIZE, PMD_SIZE);
1154
1155 xen_cleanhighmap(addr, addr + size);
1156 xen_start_info->pt_base = (unsigned long)__va(__pa(xen_start_info->pt_base));
1157 #ifdef DEBUG
1158 /* This is superflous and is not neccessary, but you know what
1159 * lets do it. The MODULES_VADDR -> MODULES_END should be clear of
1160 * anything at this stage. */
1161 xen_cleanhighmap(MODULES_VADDR, roundup(MODULES_VADDR, PUD_SIZE) - 1);
1162 #endif
1163 }
1164 #endif
1165
1166 static void __init xen_pagetable_p2m_setup(void)
1167 {
1168 if (xen_feature(XENFEAT_auto_translated_physmap))
1169 return;
1170
1171 xen_vmalloc_p2m_tree();
1172
1173 #ifdef CONFIG_X86_64
1174 xen_pagetable_p2m_free();
1175 #endif
1176 /* And revector! Bye bye old array */
1177 xen_start_info->mfn_list = (unsigned long)xen_p2m_addr;
1178 }
1179
1180 static void __init xen_pagetable_init(void)
1181 {
1182 paging_init();
1183 xen_post_allocator_init();
1184
1185 xen_pagetable_p2m_setup();
1186
1187 /* Allocate and initialize top and mid mfn levels for p2m structure */
1188 xen_build_mfn_list_list();
1189
1190 /* Remap memory freed due to conflicts with E820 map */
1191 if (!xen_feature(XENFEAT_auto_translated_physmap))
1192 xen_remap_memory();
1193
1194 xen_setup_shared_info();
1195 }
1196 static void xen_write_cr2(unsigned long cr2)
1197 {
1198 this_cpu_read(xen_vcpu)->arch.cr2 = cr2;
1199 }
1200
1201 static unsigned long xen_read_cr2(void)
1202 {
1203 return this_cpu_read(xen_vcpu)->arch.cr2;
1204 }
1205
1206 unsigned long xen_read_cr2_direct(void)
1207 {
1208 return this_cpu_read(xen_vcpu_info.arch.cr2);
1209 }
1210
1211 void xen_flush_tlb_all(void)
1212 {
1213 struct mmuext_op *op;
1214 struct multicall_space mcs;
1215
1216 trace_xen_mmu_flush_tlb_all(0);
1217
1218 preempt_disable();
1219
1220 mcs = xen_mc_entry(sizeof(*op));
1221
1222 op = mcs.args;
1223 op->cmd = MMUEXT_TLB_FLUSH_ALL;
1224 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1225
1226 xen_mc_issue(PARAVIRT_LAZY_MMU);
1227
1228 preempt_enable();
1229 }
1230 static void xen_flush_tlb(void)
1231 {
1232 struct mmuext_op *op;
1233 struct multicall_space mcs;
1234
1235 trace_xen_mmu_flush_tlb(0);
1236
1237 preempt_disable();
1238
1239 mcs = xen_mc_entry(sizeof(*op));
1240
1241 op = mcs.args;
1242 op->cmd = MMUEXT_TLB_FLUSH_LOCAL;
1243 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1244
1245 xen_mc_issue(PARAVIRT_LAZY_MMU);
1246
1247 preempt_enable();
1248 }
1249
1250 static void xen_flush_tlb_single(unsigned long addr)
1251 {
1252 struct mmuext_op *op;
1253 struct multicall_space mcs;
1254
1255 trace_xen_mmu_flush_tlb_single(addr);
1256
1257 preempt_disable();
1258
1259 mcs = xen_mc_entry(sizeof(*op));
1260 op = mcs.args;
1261 op->cmd = MMUEXT_INVLPG_LOCAL;
1262 op->arg1.linear_addr = addr & PAGE_MASK;
1263 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1264
1265 xen_mc_issue(PARAVIRT_LAZY_MMU);
1266
1267 preempt_enable();
1268 }
1269
1270 static void xen_flush_tlb_others(const struct cpumask *cpus,
1271 struct mm_struct *mm, unsigned long start,
1272 unsigned long end)
1273 {
1274 struct {
1275 struct mmuext_op op;
1276 #ifdef CONFIG_SMP
1277 DECLARE_BITMAP(mask, num_processors);
1278 #else
1279 DECLARE_BITMAP(mask, NR_CPUS);
1280 #endif
1281 } *args;
1282 struct multicall_space mcs;
1283
1284 trace_xen_mmu_flush_tlb_others(cpus, mm, start, end);
1285
1286 if (cpumask_empty(cpus))
1287 return; /* nothing to do */
1288
1289 mcs = xen_mc_entry(sizeof(*args));
1290 args = mcs.args;
1291 args->op.arg2.vcpumask = to_cpumask(args->mask);
1292
1293 /* Remove us, and any offline CPUS. */
1294 cpumask_and(to_cpumask(args->mask), cpus, cpu_online_mask);
1295 cpumask_clear_cpu(smp_processor_id(), to_cpumask(args->mask));
1296
1297 args->op.cmd = MMUEXT_TLB_FLUSH_MULTI;
1298 if (end != TLB_FLUSH_ALL && (end - start) <= PAGE_SIZE) {
1299 args->op.cmd = MMUEXT_INVLPG_MULTI;
1300 args->op.arg1.linear_addr = start;
1301 }
1302
1303 MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF);
1304
1305 xen_mc_issue(PARAVIRT_LAZY_MMU);
1306 }
1307
1308 static unsigned long xen_read_cr3(void)
1309 {
1310 return this_cpu_read(xen_cr3);
1311 }
1312
1313 static void set_current_cr3(void *v)
1314 {
1315 this_cpu_write(xen_current_cr3, (unsigned long)v);
1316 }
1317
1318 static void __xen_write_cr3(bool kernel, unsigned long cr3)
1319 {
1320 struct mmuext_op op;
1321 unsigned long mfn;
1322
1323 trace_xen_mmu_write_cr3(kernel, cr3);
1324
1325 if (cr3)
1326 mfn = pfn_to_mfn(PFN_DOWN(cr3));
1327 else
1328 mfn = 0;
1329
1330 WARN_ON(mfn == 0 && kernel);
1331
1332 op.cmd = kernel ? MMUEXT_NEW_BASEPTR : MMUEXT_NEW_USER_BASEPTR;
1333 op.arg1.mfn = mfn;
1334
1335 xen_extend_mmuext_op(&op);
1336
1337 if (kernel) {
1338 this_cpu_write(xen_cr3, cr3);
1339
1340 /* Update xen_current_cr3 once the batch has actually
1341 been submitted. */
1342 xen_mc_callback(set_current_cr3, (void *)cr3);
1343 }
1344 }
1345 static void xen_write_cr3(unsigned long cr3)
1346 {
1347 BUG_ON(preemptible());
1348
1349 xen_mc_batch(); /* disables interrupts */
1350
1351 /* Update while interrupts are disabled, so its atomic with
1352 respect to ipis */
1353 this_cpu_write(xen_cr3, cr3);
1354
1355 __xen_write_cr3(true, cr3);
1356
1357 #ifdef CONFIG_X86_64
1358 {
1359 pgd_t *user_pgd = xen_get_user_pgd(__va(cr3));
1360 if (user_pgd)
1361 __xen_write_cr3(false, __pa(user_pgd));
1362 else
1363 __xen_write_cr3(false, 0);
1364 }
1365 #endif
1366
1367 xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */
1368 }
1369
1370 #ifdef CONFIG_X86_64
1371 /*
1372 * At the start of the day - when Xen launches a guest, it has already
1373 * built pagetables for the guest. We diligently look over them
1374 * in xen_setup_kernel_pagetable and graft as appropiate them in the
1375 * init_level4_pgt and its friends. Then when we are happy we load
1376 * the new init_level4_pgt - and continue on.
1377 *
1378 * The generic code starts (start_kernel) and 'init_mem_mapping' sets
1379 * up the rest of the pagetables. When it has completed it loads the cr3.
1380 * N.B. that baremetal would start at 'start_kernel' (and the early
1381 * #PF handler would create bootstrap pagetables) - so we are running
1382 * with the same assumptions as what to do when write_cr3 is executed
1383 * at this point.
1384 *
1385 * Since there are no user-page tables at all, we have two variants
1386 * of xen_write_cr3 - the early bootup (this one), and the late one
1387 * (xen_write_cr3). The reason we have to do that is that in 64-bit
1388 * the Linux kernel and user-space are both in ring 3 while the
1389 * hypervisor is in ring 0.
1390 */
1391 static void __init xen_write_cr3_init(unsigned long cr3)
1392 {
1393 BUG_ON(preemptible());
1394
1395 xen_mc_batch(); /* disables interrupts */
1396
1397 /* Update while interrupts are disabled, so its atomic with
1398 respect to ipis */
1399 this_cpu_write(xen_cr3, cr3);
1400
1401 __xen_write_cr3(true, cr3);
1402
1403 xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */
1404 }
1405 #endif
1406
1407 static int xen_pgd_alloc(struct mm_struct *mm)
1408 {
1409 pgd_t *pgd = mm->pgd;
1410 int ret = 0;
1411
1412 BUG_ON(PagePinned(virt_to_page(pgd)));
1413
1414 #ifdef CONFIG_X86_64
1415 {
1416 struct page *page = virt_to_page(pgd);
1417 pgd_t *user_pgd;
1418
1419 BUG_ON(page->private != 0);
1420
1421 ret = -ENOMEM;
1422
1423 user_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
1424 page->private = (unsigned long)user_pgd;
1425
1426 if (user_pgd != NULL) {
1427 #ifdef CONFIG_X86_VSYSCALL_EMULATION
1428 user_pgd[pgd_index(VSYSCALL_ADDR)] =
1429 __pgd(__pa(level3_user_vsyscall) | _PAGE_TABLE);
1430 #endif
1431 ret = 0;
1432 }
1433
1434 BUG_ON(PagePinned(virt_to_page(xen_get_user_pgd(pgd))));
1435 }
1436 #endif
1437
1438 return ret;
1439 }
1440
1441 static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd)
1442 {
1443 #ifdef CONFIG_X86_64
1444 pgd_t *user_pgd = xen_get_user_pgd(pgd);
1445
1446 if (user_pgd)
1447 free_page((unsigned long)user_pgd);
1448 #endif
1449 }
1450
1451 #ifdef CONFIG_X86_32
1452 static pte_t __init mask_rw_pte(pte_t *ptep, pte_t pte)
1453 {
1454 /* If there's an existing pte, then don't allow _PAGE_RW to be set */
1455 if (pte_val_ma(*ptep) & _PAGE_PRESENT)
1456 pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) &
1457 pte_val_ma(pte));
1458
1459 return pte;
1460 }
1461 #else /* CONFIG_X86_64 */
1462 static pte_t __init mask_rw_pte(pte_t *ptep, pte_t pte)
1463 {
1464 return pte;
1465 }
1466 #endif /* CONFIG_X86_64 */
1467
1468 /*
1469 * Init-time set_pte while constructing initial pagetables, which
1470 * doesn't allow RO page table pages to be remapped RW.
1471 *
1472 * If there is no MFN for this PFN then this page is initially
1473 * ballooned out so clear the PTE (as in decrease_reservation() in
1474 * drivers/xen/balloon.c).
1475 *
1476 * Many of these PTE updates are done on unpinned and writable pages
1477 * and doing a hypercall for these is unnecessary and expensive. At
1478 * this point it is not possible to tell if a page is pinned or not,
1479 * so always write the PTE directly and rely on Xen trapping and
1480 * emulating any updates as necessary.
1481 */
1482 static void __init xen_set_pte_init(pte_t *ptep, pte_t pte)
1483 {
1484 if (pte_mfn(pte) != INVALID_P2M_ENTRY)
1485 pte = mask_rw_pte(ptep, pte);
1486 else
1487 pte = __pte_ma(0);
1488
1489 native_set_pte(ptep, pte);
1490 }
1491
1492 static void __init pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
1493 {
1494 struct mmuext_op op;
1495 op.cmd = cmd;
1496 op.arg1.mfn = pfn_to_mfn(pfn);
1497 if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF))
1498 BUG();
1499 }
1500
1501 /* Early in boot, while setting up the initial pagetable, assume
1502 everything is pinned. */
1503 static void __init xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn)
1504 {
1505 #ifdef CONFIG_FLATMEM
1506 BUG_ON(mem_map); /* should only be used early */
1507 #endif
1508 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
1509 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
1510 }
1511
1512 /* Used for pmd and pud */
1513 static void __init xen_alloc_pmd_init(struct mm_struct *mm, unsigned long pfn)
1514 {
1515 #ifdef CONFIG_FLATMEM
1516 BUG_ON(mem_map); /* should only be used early */
1517 #endif
1518 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
1519 }
1520
1521 /* Early release_pte assumes that all pts are pinned, since there's
1522 only init_mm and anything attached to that is pinned. */
1523 static void __init xen_release_pte_init(unsigned long pfn)
1524 {
1525 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
1526 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1527 }
1528
1529 static void __init xen_release_pmd_init(unsigned long pfn)
1530 {
1531 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1532 }
1533
1534 static inline void __pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
1535 {
1536 struct multicall_space mcs;
1537 struct mmuext_op *op;
1538
1539 mcs = __xen_mc_entry(sizeof(*op));
1540 op = mcs.args;
1541 op->cmd = cmd;
1542 op->arg1.mfn = pfn_to_mfn(pfn);
1543
1544 MULTI_mmuext_op(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
1545 }
1546
1547 static inline void __set_pfn_prot(unsigned long pfn, pgprot_t prot)
1548 {
1549 struct multicall_space mcs;
1550 unsigned long addr = (unsigned long)__va(pfn << PAGE_SHIFT);
1551
1552 mcs = __xen_mc_entry(0);
1553 MULTI_update_va_mapping(mcs.mc, (unsigned long)addr,
1554 pfn_pte(pfn, prot), 0);
1555 }
1556
1557 /* This needs to make sure the new pte page is pinned iff its being
1558 attached to a pinned pagetable. */
1559 static inline void xen_alloc_ptpage(struct mm_struct *mm, unsigned long pfn,
1560 unsigned level)
1561 {
1562 bool pinned = PagePinned(virt_to_page(mm->pgd));
1563
1564 trace_xen_mmu_alloc_ptpage(mm, pfn, level, pinned);
1565
1566 if (pinned) {
1567 struct page *page = pfn_to_page(pfn);
1568
1569 SetPagePinned(page);
1570
1571 if (!PageHighMem(page)) {
1572 xen_mc_batch();
1573
1574 __set_pfn_prot(pfn, PAGE_KERNEL_RO);
1575
1576 if (level == PT_PTE && USE_SPLIT_PTE_PTLOCKS)
1577 __pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
1578
1579 xen_mc_issue(PARAVIRT_LAZY_MMU);
1580 } else {
1581 /* make sure there are no stray mappings of
1582 this page */
1583 kmap_flush_unused();
1584 }
1585 }
1586 }
1587
1588 static void xen_alloc_pte(struct mm_struct *mm, unsigned long pfn)
1589 {
1590 xen_alloc_ptpage(mm, pfn, PT_PTE);
1591 }
1592
1593 static void xen_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
1594 {
1595 xen_alloc_ptpage(mm, pfn, PT_PMD);
1596 }
1597
1598 /* This should never happen until we're OK to use struct page */
1599 static inline void xen_release_ptpage(unsigned long pfn, unsigned level)
1600 {
1601 struct page *page = pfn_to_page(pfn);
1602 bool pinned = PagePinned(page);
1603
1604 trace_xen_mmu_release_ptpage(pfn, level, pinned);
1605
1606 if (pinned) {
1607 if (!PageHighMem(page)) {
1608 xen_mc_batch();
1609
1610 if (level == PT_PTE && USE_SPLIT_PTE_PTLOCKS)
1611 __pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
1612
1613 __set_pfn_prot(pfn, PAGE_KERNEL);
1614
1615 xen_mc_issue(PARAVIRT_LAZY_MMU);
1616 }
1617 ClearPagePinned(page);
1618 }
1619 }
1620
1621 static void xen_release_pte(unsigned long pfn)
1622 {
1623 xen_release_ptpage(pfn, PT_PTE);
1624 }
1625
1626 static void xen_release_pmd(unsigned long pfn)
1627 {
1628 xen_release_ptpage(pfn, PT_PMD);
1629 }
1630
1631 #if PAGETABLE_LEVELS == 4
1632 static void xen_alloc_pud(struct mm_struct *mm, unsigned long pfn)
1633 {
1634 xen_alloc_ptpage(mm, pfn, PT_PUD);
1635 }
1636
1637 static void xen_release_pud(unsigned long pfn)
1638 {
1639 xen_release_ptpage(pfn, PT_PUD);
1640 }
1641 #endif
1642
1643 void __init xen_reserve_top(void)
1644 {
1645 #ifdef CONFIG_X86_32
1646 unsigned long top = HYPERVISOR_VIRT_START;
1647 struct xen_platform_parameters pp;
1648
1649 if (HYPERVISOR_xen_version(XENVER_platform_parameters, &pp) == 0)
1650 top = pp.virt_start;
1651
1652 reserve_top_address(-top);
1653 #endif /* CONFIG_X86_32 */
1654 }
1655
1656 /*
1657 * Like __va(), but returns address in the kernel mapping (which is
1658 * all we have until the physical memory mapping has been set up.
1659 */
1660 static void * __init __ka(phys_addr_t paddr)
1661 {
1662 #ifdef CONFIG_X86_64
1663 return (void *)(paddr + __START_KERNEL_map);
1664 #else
1665 return __va(paddr);
1666 #endif
1667 }
1668
1669 /* Convert a machine address to physical address */
1670 static unsigned long __init m2p(phys_addr_t maddr)
1671 {
1672 phys_addr_t paddr;
1673
1674 maddr &= PTE_PFN_MASK;
1675 paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT;
1676
1677 return paddr;
1678 }
1679
1680 /* Convert a machine address to kernel virtual */
1681 static void * __init m2v(phys_addr_t maddr)
1682 {
1683 return __ka(m2p(maddr));
1684 }
1685
1686 /* Set the page permissions on an identity-mapped pages */
1687 static void __init set_page_prot_flags(void *addr, pgprot_t prot,
1688 unsigned long flags)
1689 {
1690 unsigned long pfn = __pa(addr) >> PAGE_SHIFT;
1691 pte_t pte = pfn_pte(pfn, prot);
1692
1693 /* For PVH no need to set R/O or R/W to pin them or unpin them. */
1694 if (xen_feature(XENFEAT_auto_translated_physmap))
1695 return;
1696
1697 if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, flags))
1698 BUG();
1699 }
1700 static void __init set_page_prot(void *addr, pgprot_t prot)
1701 {
1702 return set_page_prot_flags(addr, prot, UVMF_NONE);
1703 }
1704 #ifdef CONFIG_X86_32
1705 static void __init xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn)
1706 {
1707 unsigned pmdidx, pteidx;
1708 unsigned ident_pte;
1709 unsigned long pfn;
1710
1711 level1_ident_pgt = extend_brk(sizeof(pte_t) * LEVEL1_IDENT_ENTRIES,
1712 PAGE_SIZE);
1713
1714 ident_pte = 0;
1715 pfn = 0;
1716 for (pmdidx = 0; pmdidx < PTRS_PER_PMD && pfn < max_pfn; pmdidx++) {
1717 pte_t *pte_page;
1718
1719 /* Reuse or allocate a page of ptes */
1720 if (pmd_present(pmd[pmdidx]))
1721 pte_page = m2v(pmd[pmdidx].pmd);
1722 else {
1723 /* Check for free pte pages */
1724 if (ident_pte == LEVEL1_IDENT_ENTRIES)
1725 break;
1726
1727 pte_page = &level1_ident_pgt[ident_pte];
1728 ident_pte += PTRS_PER_PTE;
1729
1730 pmd[pmdidx] = __pmd(__pa(pte_page) | _PAGE_TABLE);
1731 }
1732
1733 /* Install mappings */
1734 for (pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) {
1735 pte_t pte;
1736
1737 if (pfn > max_pfn_mapped)
1738 max_pfn_mapped = pfn;
1739
1740 if (!pte_none(pte_page[pteidx]))
1741 continue;
1742
1743 pte = pfn_pte(pfn, PAGE_KERNEL_EXEC);
1744 pte_page[pteidx] = pte;
1745 }
1746 }
1747
1748 for (pteidx = 0; pteidx < ident_pte; pteidx += PTRS_PER_PTE)
1749 set_page_prot(&level1_ident_pgt[pteidx], PAGE_KERNEL_RO);
1750
1751 set_page_prot(pmd, PAGE_KERNEL_RO);
1752 }
1753 #endif
1754 void __init xen_setup_machphys_mapping(void)
1755 {
1756 struct xen_machphys_mapping mapping;
1757
1758 if (HYPERVISOR_memory_op(XENMEM_machphys_mapping, &mapping) == 0) {
1759 machine_to_phys_mapping = (unsigned long *)mapping.v_start;
1760 machine_to_phys_nr = mapping.max_mfn + 1;
1761 } else {
1762 machine_to_phys_nr = MACH2PHYS_NR_ENTRIES;
1763 }
1764 #ifdef CONFIG_X86_32
1765 WARN_ON((machine_to_phys_mapping + (machine_to_phys_nr - 1))
1766 < machine_to_phys_mapping);
1767 #endif
1768 }
1769
1770 #ifdef CONFIG_X86_64
1771 static void __init convert_pfn_mfn(void *v)
1772 {
1773 pte_t *pte = v;
1774 int i;
1775
1776 /* All levels are converted the same way, so just treat them
1777 as ptes. */
1778 for (i = 0; i < PTRS_PER_PTE; i++)
1779 pte[i] = xen_make_pte(pte[i].pte);
1780 }
1781 static void __init check_pt_base(unsigned long *pt_base, unsigned long *pt_end,
1782 unsigned long addr)
1783 {
1784 if (*pt_base == PFN_DOWN(__pa(addr))) {
1785 set_page_prot_flags((void *)addr, PAGE_KERNEL, UVMF_INVLPG);
1786 clear_page((void *)addr);
1787 (*pt_base)++;
1788 }
1789 if (*pt_end == PFN_DOWN(__pa(addr))) {
1790 set_page_prot_flags((void *)addr, PAGE_KERNEL, UVMF_INVLPG);
1791 clear_page((void *)addr);
1792 (*pt_end)--;
1793 }
1794 }
1795 /*
1796 * Set up the initial kernel pagetable.
1797 *
1798 * We can construct this by grafting the Xen provided pagetable into
1799 * head_64.S's preconstructed pagetables. We copy the Xen L2's into
1800 * level2_ident_pgt, and level2_kernel_pgt. This means that only the
1801 * kernel has a physical mapping to start with - but that's enough to
1802 * get __va working. We need to fill in the rest of the physical
1803 * mapping once some sort of allocator has been set up. NOTE: for
1804 * PVH, the page tables are native.
1805 */
1806 void __init xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn)
1807 {
1808 pud_t *l3;
1809 pmd_t *l2;
1810 unsigned long addr[3];
1811 unsigned long pt_base, pt_end;
1812 unsigned i;
1813
1814 /* max_pfn_mapped is the last pfn mapped in the initial memory
1815 * mappings. Considering that on Xen after the kernel mappings we
1816 * have the mappings of some pages that don't exist in pfn space, we
1817 * set max_pfn_mapped to the last real pfn mapped. */
1818 max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->mfn_list));
1819
1820 pt_base = PFN_DOWN(__pa(xen_start_info->pt_base));
1821 pt_end = pt_base + xen_start_info->nr_pt_frames;
1822
1823 /* Zap identity mapping */
1824 init_level4_pgt[0] = __pgd(0);
1825
1826 if (!xen_feature(XENFEAT_auto_translated_physmap)) {
1827 /* Pre-constructed entries are in pfn, so convert to mfn */
1828 /* L4[272] -> level3_ident_pgt
1829 * L4[511] -> level3_kernel_pgt */
1830 convert_pfn_mfn(init_level4_pgt);
1831
1832 /* L3_i[0] -> level2_ident_pgt */
1833 convert_pfn_mfn(level3_ident_pgt);
1834 /* L3_k[510] -> level2_kernel_pgt
1835 * L3_k[511] -> level2_fixmap_pgt */
1836 convert_pfn_mfn(level3_kernel_pgt);
1837
1838 /* L3_k[511][506] -> level1_fixmap_pgt */
1839 convert_pfn_mfn(level2_fixmap_pgt);
1840 }
1841 /* We get [511][511] and have Xen's version of level2_kernel_pgt */
1842 l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd);
1843 l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud);
1844
1845 addr[0] = (unsigned long)pgd;
1846 addr[1] = (unsigned long)l3;
1847 addr[2] = (unsigned long)l2;
1848 /* Graft it onto L4[272][0]. Note that we creating an aliasing problem:
1849 * Both L4[272][0] and L4[511][510] have entries that point to the same
1850 * L2 (PMD) tables. Meaning that if you modify it in __va space
1851 * it will be also modified in the __ka space! (But if you just
1852 * modify the PMD table to point to other PTE's or none, then you
1853 * are OK - which is what cleanup_highmap does) */
1854 copy_page(level2_ident_pgt, l2);
1855 /* Graft it onto L4[511][510] */
1856 copy_page(level2_kernel_pgt, l2);
1857
1858 if (!xen_feature(XENFEAT_auto_translated_physmap)) {
1859 /* Make pagetable pieces RO */
1860 set_page_prot(init_level4_pgt, PAGE_KERNEL_RO);
1861 set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO);
1862 set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO);
1863 set_page_prot(level3_user_vsyscall, PAGE_KERNEL_RO);
1864 set_page_prot(level2_ident_pgt, PAGE_KERNEL_RO);
1865 set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
1866 set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO);
1867 set_page_prot(level1_fixmap_pgt, PAGE_KERNEL_RO);
1868
1869 /* Pin down new L4 */
1870 pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE,
1871 PFN_DOWN(__pa_symbol(init_level4_pgt)));
1872
1873 /* Unpin Xen-provided one */
1874 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1875
1876 /*
1877 * At this stage there can be no user pgd, and no page
1878 * structure to attach it to, so make sure we just set kernel
1879 * pgd.
1880 */
1881 xen_mc_batch();
1882 __xen_write_cr3(true, __pa(init_level4_pgt));
1883 xen_mc_issue(PARAVIRT_LAZY_CPU);
1884 } else
1885 native_write_cr3(__pa(init_level4_pgt));
1886
1887 /* We can't that easily rip out L3 and L2, as the Xen pagetables are
1888 * set out this way: [L4], [L1], [L2], [L3], [L1], [L1] ... for
1889 * the initial domain. For guests using the toolstack, they are in:
1890 * [L4], [L3], [L2], [L1], [L1], order .. So for dom0 we can only
1891 * rip out the [L4] (pgd), but for guests we shave off three pages.
1892 */
1893 for (i = 0; i < ARRAY_SIZE(addr); i++)
1894 check_pt_base(&pt_base, &pt_end, addr[i]);
1895
1896 /* Our (by three pages) smaller Xen pagetable that we are using */
1897 memblock_reserve(PFN_PHYS(pt_base), (pt_end - pt_base) * PAGE_SIZE);
1898 /* Revector the xen_start_info */
1899 xen_start_info = (struct start_info *)__va(__pa(xen_start_info));
1900 }
1901 #else /* !CONFIG_X86_64 */
1902 static RESERVE_BRK_ARRAY(pmd_t, initial_kernel_pmd, PTRS_PER_PMD);
1903 static RESERVE_BRK_ARRAY(pmd_t, swapper_kernel_pmd, PTRS_PER_PMD);
1904
1905 static void __init xen_write_cr3_init(unsigned long cr3)
1906 {
1907 unsigned long pfn = PFN_DOWN(__pa(swapper_pg_dir));
1908
1909 BUG_ON(read_cr3() != __pa(initial_page_table));
1910 BUG_ON(cr3 != __pa(swapper_pg_dir));
1911
1912 /*
1913 * We are switching to swapper_pg_dir for the first time (from
1914 * initial_page_table) and therefore need to mark that page
1915 * read-only and then pin it.
1916 *
1917 * Xen disallows sharing of kernel PMDs for PAE
1918 * guests. Therefore we must copy the kernel PMD from
1919 * initial_page_table into a new kernel PMD to be used in
1920 * swapper_pg_dir.
1921 */
1922 swapper_kernel_pmd =
1923 extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE);
1924 copy_page(swapper_kernel_pmd, initial_kernel_pmd);
1925 swapper_pg_dir[KERNEL_PGD_BOUNDARY] =
1926 __pgd(__pa(swapper_kernel_pmd) | _PAGE_PRESENT);
1927 set_page_prot(swapper_kernel_pmd, PAGE_KERNEL_RO);
1928
1929 set_page_prot(swapper_pg_dir, PAGE_KERNEL_RO);
1930 xen_write_cr3(cr3);
1931 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, pfn);
1932
1933 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE,
1934 PFN_DOWN(__pa(initial_page_table)));
1935 set_page_prot(initial_page_table, PAGE_KERNEL);
1936 set_page_prot(initial_kernel_pmd, PAGE_KERNEL);
1937
1938 pv_mmu_ops.write_cr3 = &xen_write_cr3;
1939 }
1940
1941 void __init xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn)
1942 {
1943 pmd_t *kernel_pmd;
1944
1945 initial_kernel_pmd =
1946 extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE);
1947
1948 max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->pt_base) +
1949 xen_start_info->nr_pt_frames * PAGE_SIZE +
1950 512*1024);
1951
1952 kernel_pmd = m2v(pgd[KERNEL_PGD_BOUNDARY].pgd);
1953 copy_page(initial_kernel_pmd, kernel_pmd);
1954
1955 xen_map_identity_early(initial_kernel_pmd, max_pfn);
1956
1957 copy_page(initial_page_table, pgd);
1958 initial_page_table[KERNEL_PGD_BOUNDARY] =
1959 __pgd(__pa(initial_kernel_pmd) | _PAGE_PRESENT);
1960
1961 set_page_prot(initial_kernel_pmd, PAGE_KERNEL_RO);
1962 set_page_prot(initial_page_table, PAGE_KERNEL_RO);
1963 set_page_prot(empty_zero_page, PAGE_KERNEL_RO);
1964
1965 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1966
1967 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE,
1968 PFN_DOWN(__pa(initial_page_table)));
1969 xen_write_cr3(__pa(initial_page_table));
1970
1971 memblock_reserve(__pa(xen_start_info->pt_base),
1972 xen_start_info->nr_pt_frames * PAGE_SIZE);
1973 }
1974 #endif /* CONFIG_X86_64 */
1975
1976 static unsigned char dummy_mapping[PAGE_SIZE] __page_aligned_bss;
1977
1978 static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot)
1979 {
1980 pte_t pte;
1981
1982 phys >>= PAGE_SHIFT;
1983
1984 switch (idx) {
1985 case FIX_BTMAP_END ... FIX_BTMAP_BEGIN:
1986 case FIX_RO_IDT:
1987 #ifdef CONFIG_X86_32
1988 case FIX_WP_TEST:
1989 # ifdef CONFIG_HIGHMEM
1990 case FIX_KMAP_BEGIN ... FIX_KMAP_END:
1991 # endif
1992 #elif defined(CONFIG_X86_VSYSCALL_EMULATION)
1993 case VSYSCALL_PAGE:
1994 #endif
1995 case FIX_TEXT_POKE0:
1996 case FIX_TEXT_POKE1:
1997 /* All local page mappings */
1998 pte = pfn_pte(phys, prot);
1999 break;
2000
2001 #ifdef CONFIG_X86_LOCAL_APIC
2002 case FIX_APIC_BASE: /* maps dummy local APIC */
2003 pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL);
2004 break;
2005 #endif
2006
2007 #ifdef CONFIG_X86_IO_APIC
2008 case FIX_IO_APIC_BASE_0 ... FIX_IO_APIC_BASE_END:
2009 /*
2010 * We just don't map the IO APIC - all access is via
2011 * hypercalls. Keep the address in the pte for reference.
2012 */
2013 pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL);
2014 break;
2015 #endif
2016
2017 case FIX_PARAVIRT_BOOTMAP:
2018 /* This is an MFN, but it isn't an IO mapping from the
2019 IO domain */
2020 pte = mfn_pte(phys, prot);
2021 break;
2022
2023 default:
2024 /* By default, set_fixmap is used for hardware mappings */
2025 pte = mfn_pte(phys, prot);
2026 break;
2027 }
2028
2029 __native_set_fixmap(idx, pte);
2030
2031 #ifdef CONFIG_X86_VSYSCALL_EMULATION
2032 /* Replicate changes to map the vsyscall page into the user
2033 pagetable vsyscall mapping. */
2034 if (idx == VSYSCALL_PAGE) {
2035 unsigned long vaddr = __fix_to_virt(idx);
2036 set_pte_vaddr_pud(level3_user_vsyscall, vaddr, pte);
2037 }
2038 #endif
2039 }
2040
2041 static void __init xen_post_allocator_init(void)
2042 {
2043 if (xen_feature(XENFEAT_auto_translated_physmap))
2044 return;
2045
2046 pv_mmu_ops.set_pte = xen_set_pte;
2047 pv_mmu_ops.set_pmd = xen_set_pmd;
2048 pv_mmu_ops.set_pud = xen_set_pud;
2049 #if PAGETABLE_LEVELS == 4
2050 pv_mmu_ops.set_pgd = xen_set_pgd;
2051 #endif
2052
2053 /* This will work as long as patching hasn't happened yet
2054 (which it hasn't) */
2055 pv_mmu_ops.alloc_pte = xen_alloc_pte;
2056 pv_mmu_ops.alloc_pmd = xen_alloc_pmd;
2057 pv_mmu_ops.release_pte = xen_release_pte;
2058 pv_mmu_ops.release_pmd = xen_release_pmd;
2059 #if PAGETABLE_LEVELS == 4
2060 pv_mmu_ops.alloc_pud = xen_alloc_pud;
2061 pv_mmu_ops.release_pud = xen_release_pud;
2062 #endif
2063
2064 #ifdef CONFIG_X86_64
2065 pv_mmu_ops.write_cr3 = &xen_write_cr3;
2066 SetPagePinned(virt_to_page(level3_user_vsyscall));
2067 #endif
2068 xen_mark_init_mm_pinned();
2069 }
2070
2071 static void xen_leave_lazy_mmu(void)
2072 {
2073 preempt_disable();
2074 xen_mc_flush();
2075 paravirt_leave_lazy_mmu();
2076 preempt_enable();
2077 }
2078
2079 static const struct pv_mmu_ops xen_mmu_ops __initconst = {
2080 .read_cr2 = xen_read_cr2,
2081 .write_cr2 = xen_write_cr2,
2082
2083 .read_cr3 = xen_read_cr3,
2084 .write_cr3 = xen_write_cr3_init,
2085
2086 .flush_tlb_user = xen_flush_tlb,
2087 .flush_tlb_kernel = xen_flush_tlb,
2088 .flush_tlb_single = xen_flush_tlb_single,
2089 .flush_tlb_others = xen_flush_tlb_others,
2090
2091 .pte_update = paravirt_nop,
2092 .pte_update_defer = paravirt_nop,
2093
2094 .pgd_alloc = xen_pgd_alloc,
2095 .pgd_free = xen_pgd_free,
2096
2097 .alloc_pte = xen_alloc_pte_init,
2098 .release_pte = xen_release_pte_init,
2099 .alloc_pmd = xen_alloc_pmd_init,
2100 .release_pmd = xen_release_pmd_init,
2101
2102 .set_pte = xen_set_pte_init,
2103 .set_pte_at = xen_set_pte_at,
2104 .set_pmd = xen_set_pmd_hyper,
2105
2106 .ptep_modify_prot_start = __ptep_modify_prot_start,
2107 .ptep_modify_prot_commit = __ptep_modify_prot_commit,
2108
2109 .pte_val = PV_CALLEE_SAVE(xen_pte_val),
2110 .pgd_val = PV_CALLEE_SAVE(xen_pgd_val),
2111
2112 .make_pte = PV_CALLEE_SAVE(xen_make_pte),
2113 .make_pgd = PV_CALLEE_SAVE(xen_make_pgd),
2114
2115 #ifdef CONFIG_X86_PAE
2116 .set_pte_atomic = xen_set_pte_atomic,
2117 .pte_clear = xen_pte_clear,
2118 .pmd_clear = xen_pmd_clear,
2119 #endif /* CONFIG_X86_PAE */
2120 .set_pud = xen_set_pud_hyper,
2121
2122 .make_pmd = PV_CALLEE_SAVE(xen_make_pmd),
2123 .pmd_val = PV_CALLEE_SAVE(xen_pmd_val),
2124
2125 #if PAGETABLE_LEVELS == 4
2126 .pud_val = PV_CALLEE_SAVE(xen_pud_val),
2127 .make_pud = PV_CALLEE_SAVE(xen_make_pud),
2128 .set_pgd = xen_set_pgd_hyper,
2129
2130 .alloc_pud = xen_alloc_pmd_init,
2131 .release_pud = xen_release_pmd_init,
2132 #endif /* PAGETABLE_LEVELS == 4 */
2133
2134 .activate_mm = xen_activate_mm,
2135 .dup_mmap = xen_dup_mmap,
2136 .exit_mmap = xen_exit_mmap,
2137
2138 .lazy_mode = {
2139 .enter = paravirt_enter_lazy_mmu,
2140 .leave = xen_leave_lazy_mmu,
2141 .flush = paravirt_flush_lazy_mmu,
2142 },
2143
2144 .set_fixmap = xen_set_fixmap,
2145 };
2146
2147 void __init xen_init_mmu_ops(void)
2148 {
2149 x86_init.paging.pagetable_init = xen_pagetable_init;
2150
2151 /* Optimization - we can use the HVM one but it has no idea which
2152 * VCPUs are descheduled - which means that it will needlessly IPI
2153 * them. Xen knows so let it do the job.
2154 */
2155 if (xen_feature(XENFEAT_auto_translated_physmap)) {
2156 pv_mmu_ops.flush_tlb_others = xen_flush_tlb_others;
2157 return;
2158 }
2159 pv_mmu_ops = xen_mmu_ops;
2160
2161 memset(dummy_mapping, 0xff, PAGE_SIZE);
2162 }
2163
2164 /* Protected by xen_reservation_lock. */
2165 #define MAX_CONTIG_ORDER 9 /* 2MB */
2166 static unsigned long discontig_frames[1<<MAX_CONTIG_ORDER];
2167
2168 #define VOID_PTE (mfn_pte(0, __pgprot(0)))
2169 static void xen_zap_pfn_range(unsigned long vaddr, unsigned int order,
2170 unsigned long *in_frames,
2171 unsigned long *out_frames)
2172 {
2173 int i;
2174 struct multicall_space mcs;
2175
2176 xen_mc_batch();
2177 for (i = 0; i < (1UL<<order); i++, vaddr += PAGE_SIZE) {
2178 mcs = __xen_mc_entry(0);
2179
2180 if (in_frames)
2181 in_frames[i] = virt_to_mfn(vaddr);
2182
2183 MULTI_update_va_mapping(mcs.mc, vaddr, VOID_PTE, 0);
2184 __set_phys_to_machine(virt_to_pfn(vaddr), INVALID_P2M_ENTRY);
2185
2186 if (out_frames)
2187 out_frames[i] = virt_to_pfn(vaddr);
2188 }
2189 xen_mc_issue(0);
2190 }
2191
2192 /*
2193 * Update the pfn-to-mfn mappings for a virtual address range, either to
2194 * point to an array of mfns, or contiguously from a single starting
2195 * mfn.
2196 */
2197 static void xen_remap_exchanged_ptes(unsigned long vaddr, int order,
2198 unsigned long *mfns,
2199 unsigned long first_mfn)
2200 {
2201 unsigned i, limit;
2202 unsigned long mfn;
2203
2204 xen_mc_batch();
2205
2206 limit = 1u << order;
2207 for (i = 0; i < limit; i++, vaddr += PAGE_SIZE) {
2208 struct multicall_space mcs;
2209 unsigned flags;
2210
2211 mcs = __xen_mc_entry(0);
2212 if (mfns)
2213 mfn = mfns[i];
2214 else
2215 mfn = first_mfn + i;
2216
2217 if (i < (limit - 1))
2218 flags = 0;
2219 else {
2220 if (order == 0)
2221 flags = UVMF_INVLPG | UVMF_ALL;
2222 else
2223 flags = UVMF_TLB_FLUSH | UVMF_ALL;
2224 }
2225
2226 MULTI_update_va_mapping(mcs.mc, vaddr,
2227 mfn_pte(mfn, PAGE_KERNEL), flags);
2228
2229 set_phys_to_machine(virt_to_pfn(vaddr), mfn);
2230 }
2231
2232 xen_mc_issue(0);
2233 }
2234
2235 /*
2236 * Perform the hypercall to exchange a region of our pfns to point to
2237 * memory with the required contiguous alignment. Takes the pfns as
2238 * input, and populates mfns as output.
2239 *
2240 * Returns a success code indicating whether the hypervisor was able to
2241 * satisfy the request or not.
2242 */
2243 static int xen_exchange_memory(unsigned long extents_in, unsigned int order_in,
2244 unsigned long *pfns_in,
2245 unsigned long extents_out,
2246 unsigned int order_out,
2247 unsigned long *mfns_out,
2248 unsigned int address_bits)
2249 {
2250 long rc;
2251 int success;
2252
2253 struct xen_memory_exchange exchange = {
2254 .in = {
2255 .nr_extents = extents_in,
2256 .extent_order = order_in,
2257 .extent_start = pfns_in,
2258 .domid = DOMID_SELF
2259 },
2260 .out = {
2261 .nr_extents = extents_out,
2262 .extent_order = order_out,
2263 .extent_start = mfns_out,
2264 .address_bits = address_bits,
2265 .domid = DOMID_SELF
2266 }
2267 };
2268
2269 BUG_ON(extents_in << order_in != extents_out << order_out);
2270
2271 rc = HYPERVISOR_memory_op(XENMEM_exchange, &exchange);
2272 success = (exchange.nr_exchanged == extents_in);
2273
2274 BUG_ON(!success && ((exchange.nr_exchanged != 0) || (rc == 0)));
2275 BUG_ON(success && (rc != 0));
2276
2277 return success;
2278 }
2279
2280 int xen_create_contiguous_region(phys_addr_t pstart, unsigned int order,
2281 unsigned int address_bits,
2282 dma_addr_t *dma_handle)
2283 {
2284 unsigned long *in_frames = discontig_frames, out_frame;
2285 unsigned long flags;
2286 int success;
2287 unsigned long vstart = (unsigned long)phys_to_virt(pstart);
2288
2289 /*
2290 * Currently an auto-translated guest will not perform I/O, nor will
2291 * it require PAE page directories below 4GB. Therefore any calls to
2292 * this function are redundant and can be ignored.
2293 */
2294
2295 if (xen_feature(XENFEAT_auto_translated_physmap))
2296 return 0;
2297
2298 if (unlikely(order > MAX_CONTIG_ORDER))
2299 return -ENOMEM;
2300
2301 memset((void *) vstart, 0, PAGE_SIZE << order);
2302
2303 spin_lock_irqsave(&xen_reservation_lock, flags);
2304
2305 /* 1. Zap current PTEs, remembering MFNs. */
2306 xen_zap_pfn_range(vstart, order, in_frames, NULL);
2307
2308 /* 2. Get a new contiguous memory extent. */
2309 out_frame = virt_to_pfn(vstart);
2310 success = xen_exchange_memory(1UL << order, 0, in_frames,
2311 1, order, &out_frame,
2312 address_bits);
2313
2314 /* 3. Map the new extent in place of old pages. */
2315 if (success)
2316 xen_remap_exchanged_ptes(vstart, order, NULL, out_frame);
2317 else
2318 xen_remap_exchanged_ptes(vstart, order, in_frames, 0);
2319
2320 spin_unlock_irqrestore(&xen_reservation_lock, flags);
2321
2322 *dma_handle = virt_to_machine(vstart).maddr;
2323 return success ? 0 : -ENOMEM;
2324 }
2325 EXPORT_SYMBOL_GPL(xen_create_contiguous_region);
2326
2327 void xen_destroy_contiguous_region(phys_addr_t pstart, unsigned int order)
2328 {
2329 unsigned long *out_frames = discontig_frames, in_frame;
2330 unsigned long flags;
2331 int success;
2332 unsigned long vstart;
2333
2334 if (xen_feature(XENFEAT_auto_translated_physmap))
2335 return;
2336
2337 if (unlikely(order > MAX_CONTIG_ORDER))
2338 return;
2339
2340 vstart = (unsigned long)phys_to_virt(pstart);
2341 memset((void *) vstart, 0, PAGE_SIZE << order);
2342
2343 spin_lock_irqsave(&xen_reservation_lock, flags);
2344
2345 /* 1. Find start MFN of contiguous extent. */
2346 in_frame = virt_to_mfn(vstart);
2347
2348 /* 2. Zap current PTEs. */
2349 xen_zap_pfn_range(vstart, order, NULL, out_frames);
2350
2351 /* 3. Do the exchange for non-contiguous MFNs. */
2352 success = xen_exchange_memory(1, order, &in_frame, 1UL << order,
2353 0, out_frames, 0);
2354
2355 /* 4. Map new pages in place of old pages. */
2356 if (success)
2357 xen_remap_exchanged_ptes(vstart, order, out_frames, 0);
2358 else
2359 xen_remap_exchanged_ptes(vstart, order, NULL, in_frame);
2360
2361 spin_unlock_irqrestore(&xen_reservation_lock, flags);
2362 }
2363 EXPORT_SYMBOL_GPL(xen_destroy_contiguous_region);
2364
2365 #ifdef CONFIG_XEN_PVHVM
2366 #ifdef CONFIG_PROC_VMCORE
2367 /*
2368 * This function is used in two contexts:
2369 * - the kdump kernel has to check whether a pfn of the crashed kernel
2370 * was a ballooned page. vmcore is using this function to decide
2371 * whether to access a pfn of the crashed kernel.
2372 * - the kexec kernel has to check whether a pfn was ballooned by the
2373 * previous kernel. If the pfn is ballooned, handle it properly.
2374 * Returns 0 if the pfn is not backed by a RAM page, the caller may
2375 * handle the pfn special in this case.
2376 */
2377 static int xen_oldmem_pfn_is_ram(unsigned long pfn)
2378 {
2379 struct xen_hvm_get_mem_type a = {
2380 .domid = DOMID_SELF,
2381 .pfn = pfn,
2382 };
2383 int ram;
2384
2385 if (HYPERVISOR_hvm_op(HVMOP_get_mem_type, &a))
2386 return -ENXIO;
2387
2388 switch (a.mem_type) {
2389 case HVMMEM_mmio_dm:
2390 ram = 0;
2391 break;
2392 case HVMMEM_ram_rw:
2393 case HVMMEM_ram_ro:
2394 default:
2395 ram = 1;
2396 break;
2397 }
2398
2399 return ram;
2400 }
2401 #endif
2402
2403 static void xen_hvm_exit_mmap(struct mm_struct *mm)
2404 {
2405 struct xen_hvm_pagetable_dying a;
2406 int rc;
2407
2408 a.domid = DOMID_SELF;
2409 a.gpa = __pa(mm->pgd);
2410 rc = HYPERVISOR_hvm_op(HVMOP_pagetable_dying, &a);
2411 WARN_ON_ONCE(rc < 0);
2412 }
2413
2414 static int is_pagetable_dying_supported(void)
2415 {
2416 struct xen_hvm_pagetable_dying a;
2417 int rc = 0;
2418
2419 a.domid = DOMID_SELF;
2420 a.gpa = 0x00;
2421 rc = HYPERVISOR_hvm_op(HVMOP_pagetable_dying, &a);
2422 if (rc < 0) {
2423 printk(KERN_DEBUG "HVMOP_pagetable_dying not supported\n");
2424 return 0;
2425 }
2426 return 1;
2427 }
2428
2429 void __init xen_hvm_init_mmu_ops(void)
2430 {
2431 if (is_pagetable_dying_supported())
2432 pv_mmu_ops.exit_mmap = xen_hvm_exit_mmap;
2433 #ifdef CONFIG_PROC_VMCORE
2434 register_oldmem_pfn_is_ram(&xen_oldmem_pfn_is_ram);
2435 #endif
2436 }
2437 #endif
2438
2439 #ifdef CONFIG_XEN_PVH
2440 /*
2441 * Map foreign gfn (fgfn), to local pfn (lpfn). This for the user
2442 * space creating new guest on pvh dom0 and needing to map domU pages.
2443 */
2444 static int xlate_add_to_p2m(unsigned long lpfn, unsigned long fgfn,
2445 unsigned int domid)
2446 {
2447 int rc, err = 0;
2448 xen_pfn_t gpfn = lpfn;
2449 xen_ulong_t idx = fgfn;
2450
2451 struct xen_add_to_physmap_range xatp = {
2452 .domid = DOMID_SELF,
2453 .foreign_domid = domid,
2454 .size = 1,
2455 .space = XENMAPSPACE_gmfn_foreign,
2456 };
2457 set_xen_guest_handle(xatp.idxs, &idx);
2458 set_xen_guest_handle(xatp.gpfns, &gpfn);
2459 set_xen_guest_handle(xatp.errs, &err);
2460
2461 rc = HYPERVISOR_memory_op(XENMEM_add_to_physmap_range, &xatp);
2462 if (rc < 0)
2463 return rc;
2464 return err;
2465 }
2466
2467 static int xlate_remove_from_p2m(unsigned long spfn, int count)
2468 {
2469 struct xen_remove_from_physmap xrp;
2470 int i, rc;
2471
2472 for (i = 0; i < count; i++) {
2473 xrp.domid = DOMID_SELF;
2474 xrp.gpfn = spfn+i;
2475 rc = HYPERVISOR_memory_op(XENMEM_remove_from_physmap, &xrp);
2476 if (rc)
2477 break;
2478 }
2479 return rc;
2480 }
2481
2482 struct xlate_remap_data {
2483 unsigned long fgfn; /* foreign domain's gfn */
2484 pgprot_t prot;
2485 domid_t domid;
2486 int index;
2487 struct page **pages;
2488 };
2489
2490 static int xlate_map_pte_fn(pte_t *ptep, pgtable_t token, unsigned long addr,
2491 void *data)
2492 {
2493 int rc;
2494 struct xlate_remap_data *remap = data;
2495 unsigned long pfn = page_to_pfn(remap->pages[remap->index++]);
2496 pte_t pteval = pte_mkspecial(pfn_pte(pfn, remap->prot));
2497
2498 rc = xlate_add_to_p2m(pfn, remap->fgfn, remap->domid);
2499 if (rc)
2500 return rc;
2501 native_set_pte(ptep, pteval);
2502
2503 return 0;
2504 }
2505
2506 static int xlate_remap_gfn_range(struct vm_area_struct *vma,
2507 unsigned long addr, unsigned long mfn,
2508 int nr, pgprot_t prot, unsigned domid,
2509 struct page **pages)
2510 {
2511 int err;
2512 struct xlate_remap_data pvhdata;
2513
2514 BUG_ON(!pages);
2515
2516 pvhdata.fgfn = mfn;
2517 pvhdata.prot = prot;
2518 pvhdata.domid = domid;
2519 pvhdata.index = 0;
2520 pvhdata.pages = pages;
2521 err = apply_to_page_range(vma->vm_mm, addr, nr << PAGE_SHIFT,
2522 xlate_map_pte_fn, &pvhdata);
2523 flush_tlb_all();
2524 return err;
2525 }
2526 #endif
2527
2528 #define REMAP_BATCH_SIZE 16
2529
2530 struct remap_data {
2531 unsigned long mfn;
2532 pgprot_t prot;
2533 struct mmu_update *mmu_update;
2534 };
2535
2536 static int remap_area_mfn_pte_fn(pte_t *ptep, pgtable_t token,
2537 unsigned long addr, void *data)
2538 {
2539 struct remap_data *rmd = data;
2540 pte_t pte = pte_mkspecial(mfn_pte(rmd->mfn++, rmd->prot));
2541
2542 rmd->mmu_update->ptr = virt_to_machine(ptep).maddr;
2543 rmd->mmu_update->val = pte_val_ma(pte);
2544 rmd->mmu_update++;
2545
2546 return 0;
2547 }
2548
2549 int xen_remap_domain_mfn_range(struct vm_area_struct *vma,
2550 unsigned long addr,
2551 xen_pfn_t mfn, int nr,
2552 pgprot_t prot, unsigned domid,
2553 struct page **pages)
2554
2555 {
2556 struct remap_data rmd;
2557 struct mmu_update mmu_update[REMAP_BATCH_SIZE];
2558 int batch;
2559 unsigned long range;
2560 int err = 0;
2561
2562 BUG_ON(!((vma->vm_flags & (VM_PFNMAP | VM_IO)) == (VM_PFNMAP | VM_IO)));
2563
2564 if (xen_feature(XENFEAT_auto_translated_physmap)) {
2565 #ifdef CONFIG_XEN_PVH
2566 /* We need to update the local page tables and the xen HAP */
2567 return xlate_remap_gfn_range(vma, addr, mfn, nr, prot,
2568 domid, pages);
2569 #else
2570 return -EINVAL;
2571 #endif
2572 }
2573
2574 rmd.mfn = mfn;
2575 rmd.prot = prot;
2576
2577 while (nr) {
2578 batch = min(REMAP_BATCH_SIZE, nr);
2579 range = (unsigned long)batch << PAGE_SHIFT;
2580
2581 rmd.mmu_update = mmu_update;
2582 err = apply_to_page_range(vma->vm_mm, addr, range,
2583 remap_area_mfn_pte_fn, &rmd);
2584 if (err)
2585 goto out;
2586
2587 err = HYPERVISOR_mmu_update(mmu_update, batch, NULL, domid);
2588 if (err < 0)
2589 goto out;
2590
2591 nr -= batch;
2592 addr += range;
2593 }
2594
2595 err = 0;
2596 out:
2597
2598 xen_flush_tlb_all();
2599
2600 return err;
2601 }
2602 EXPORT_SYMBOL_GPL(xen_remap_domain_mfn_range);
2603
2604 /* Returns: 0 success */
2605 int xen_unmap_domain_mfn_range(struct vm_area_struct *vma,
2606 int numpgs, struct page **pages)
2607 {
2608 if (!pages || !xen_feature(XENFEAT_auto_translated_physmap))
2609 return 0;
2610
2611 #ifdef CONFIG_XEN_PVH
2612 while (numpgs--) {
2613 /*
2614 * The mmu has already cleaned up the process mmu
2615 * resources at this point (lookup_address will return
2616 * NULL).
2617 */
2618 unsigned long pfn = page_to_pfn(pages[numpgs]);
2619
2620 xlate_remove_from_p2m(pfn, 1);
2621 }
2622 /*
2623 * We don't need to flush tlbs because as part of
2624 * xlate_remove_from_p2m, the hypervisor will do tlb flushes
2625 * after removing the p2m entries from the EPT/NPT
2626 */
2627 return 0;
2628 #else
2629 return -EINVAL;
2630 #endif
2631 }
2632 EXPORT_SYMBOL_GPL(xen_unmap_domain_mfn_range);
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