c3abba17ab00c853b5e35852be24623bf871ef5f
[deliverable/linux.git] / arch / x86 / xen / mmu.c
1 /*
2 * Xen mmu operations
3 *
4 * This file contains the various mmu fetch and update operations.
5 * The most important job they must perform is the mapping between the
6 * domain's pfn and the overall machine mfns.
7 *
8 * Xen allows guests to directly update the pagetable, in a controlled
9 * fashion. In other words, the guest modifies the same pagetable
10 * that the CPU actually uses, which eliminates the overhead of having
11 * a separate shadow pagetable.
12 *
13 * In order to allow this, it falls on the guest domain to map its
14 * notion of a "physical" pfn - which is just a domain-local linear
15 * address - into a real "machine address" which the CPU's MMU can
16 * use.
17 *
18 * A pgd_t/pmd_t/pte_t will typically contain an mfn, and so can be
19 * inserted directly into the pagetable. When creating a new
20 * pte/pmd/pgd, it converts the passed pfn into an mfn. Conversely,
21 * when reading the content back with __(pgd|pmd|pte)_val, it converts
22 * the mfn back into a pfn.
23 *
24 * The other constraint is that all pages which make up a pagetable
25 * must be mapped read-only in the guest. This prevents uncontrolled
26 * guest updates to the pagetable. Xen strictly enforces this, and
27 * will disallow any pagetable update which will end up mapping a
28 * pagetable page RW, and will disallow using any writable page as a
29 * pagetable.
30 *
31 * Naively, when loading %cr3 with the base of a new pagetable, Xen
32 * would need to validate the whole pagetable before going on.
33 * Naturally, this is quite slow. The solution is to "pin" a
34 * pagetable, which enforces all the constraints on the pagetable even
35 * when it is not actively in use. This menas that Xen can be assured
36 * that it is still valid when you do load it into %cr3, and doesn't
37 * need to revalidate it.
38 *
39 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
40 */
41 #include <linux/sched.h>
42 #include <linux/highmem.h>
43 #include <linux/debugfs.h>
44 #include <linux/bug.h>
45 #include <linux/vmalloc.h>
46 #include <linux/module.h>
47 #include <linux/gfp.h>
48 #include <linux/memblock.h>
49 #include <linux/seq_file.h>
50
51 #include <trace/events/xen.h>
52
53 #include <asm/pgtable.h>
54 #include <asm/tlbflush.h>
55 #include <asm/fixmap.h>
56 #include <asm/mmu_context.h>
57 #include <asm/setup.h>
58 #include <asm/paravirt.h>
59 #include <asm/e820.h>
60 #include <asm/linkage.h>
61 #include <asm/page.h>
62 #include <asm/init.h>
63 #include <asm/pat.h>
64 #include <asm/smp.h>
65
66 #include <asm/xen/hypercall.h>
67 #include <asm/xen/hypervisor.h>
68
69 #include <xen/xen.h>
70 #include <xen/page.h>
71 #include <xen/interface/xen.h>
72 #include <xen/interface/hvm/hvm_op.h>
73 #include <xen/interface/version.h>
74 #include <xen/interface/memory.h>
75 #include <xen/hvc-console.h>
76
77 #include "multicalls.h"
78 #include "mmu.h"
79 #include "debugfs.h"
80
81 /*
82 * Protects atomic reservation decrease/increase against concurrent increases.
83 * Also protects non-atomic updates of current_pages and balloon lists.
84 */
85 DEFINE_SPINLOCK(xen_reservation_lock);
86
87 /*
88 * Identity map, in addition to plain kernel map. This needs to be
89 * large enough to allocate page table pages to allocate the rest.
90 * Each page can map 2MB.
91 */
92 #define LEVEL1_IDENT_ENTRIES (PTRS_PER_PTE * 4)
93 static RESERVE_BRK_ARRAY(pte_t, level1_ident_pgt, LEVEL1_IDENT_ENTRIES);
94
95 #ifdef CONFIG_X86_64
96 /* l3 pud for userspace vsyscall mapping */
97 static pud_t level3_user_vsyscall[PTRS_PER_PUD] __page_aligned_bss;
98 #endif /* CONFIG_X86_64 */
99
100 /*
101 * Note about cr3 (pagetable base) values:
102 *
103 * xen_cr3 contains the current logical cr3 value; it contains the
104 * last set cr3. This may not be the current effective cr3, because
105 * its update may be being lazily deferred. However, a vcpu looking
106 * at its own cr3 can use this value knowing that it everything will
107 * be self-consistent.
108 *
109 * xen_current_cr3 contains the actual vcpu cr3; it is set once the
110 * hypercall to set the vcpu cr3 is complete (so it may be a little
111 * out of date, but it will never be set early). If one vcpu is
112 * looking at another vcpu's cr3 value, it should use this variable.
113 */
114 DEFINE_PER_CPU(unsigned long, xen_cr3); /* cr3 stored as physaddr */
115 DEFINE_PER_CPU(unsigned long, xen_current_cr3); /* actual vcpu cr3 */
116
117
118 /*
119 * Just beyond the highest usermode address. STACK_TOP_MAX has a
120 * redzone above it, so round it up to a PGD boundary.
121 */
122 #define USER_LIMIT ((STACK_TOP_MAX + PGDIR_SIZE - 1) & PGDIR_MASK)
123
124 unsigned long arbitrary_virt_to_mfn(void *vaddr)
125 {
126 xmaddr_t maddr = arbitrary_virt_to_machine(vaddr);
127
128 return PFN_DOWN(maddr.maddr);
129 }
130
131 xmaddr_t arbitrary_virt_to_machine(void *vaddr)
132 {
133 unsigned long address = (unsigned long)vaddr;
134 unsigned int level;
135 pte_t *pte;
136 unsigned offset;
137
138 /*
139 * if the PFN is in the linear mapped vaddr range, we can just use
140 * the (quick) virt_to_machine() p2m lookup
141 */
142 if (virt_addr_valid(vaddr))
143 return virt_to_machine(vaddr);
144
145 /* otherwise we have to do a (slower) full page-table walk */
146
147 pte = lookup_address(address, &level);
148 BUG_ON(pte == NULL);
149 offset = address & ~PAGE_MASK;
150 return XMADDR(((phys_addr_t)pte_mfn(*pte) << PAGE_SHIFT) + offset);
151 }
152 EXPORT_SYMBOL_GPL(arbitrary_virt_to_machine);
153
154 void make_lowmem_page_readonly(void *vaddr)
155 {
156 pte_t *pte, ptev;
157 unsigned long address = (unsigned long)vaddr;
158 unsigned int level;
159
160 pte = lookup_address(address, &level);
161 if (pte == NULL)
162 return; /* vaddr missing */
163
164 ptev = pte_wrprotect(*pte);
165
166 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
167 BUG();
168 }
169
170 void make_lowmem_page_readwrite(void *vaddr)
171 {
172 pte_t *pte, ptev;
173 unsigned long address = (unsigned long)vaddr;
174 unsigned int level;
175
176 pte = lookup_address(address, &level);
177 if (pte == NULL)
178 return; /* vaddr missing */
179
180 ptev = pte_mkwrite(*pte);
181
182 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
183 BUG();
184 }
185
186
187 static bool xen_page_pinned(void *ptr)
188 {
189 struct page *page = virt_to_page(ptr);
190
191 return PagePinned(page);
192 }
193
194 void xen_set_domain_pte(pte_t *ptep, pte_t pteval, unsigned domid)
195 {
196 struct multicall_space mcs;
197 struct mmu_update *u;
198
199 trace_xen_mmu_set_domain_pte(ptep, pteval, domid);
200
201 mcs = xen_mc_entry(sizeof(*u));
202 u = mcs.args;
203
204 /* ptep might be kmapped when using 32-bit HIGHPTE */
205 u->ptr = virt_to_machine(ptep).maddr;
206 u->val = pte_val_ma(pteval);
207
208 MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, domid);
209
210 xen_mc_issue(PARAVIRT_LAZY_MMU);
211 }
212 EXPORT_SYMBOL_GPL(xen_set_domain_pte);
213
214 static void xen_extend_mmu_update(const struct mmu_update *update)
215 {
216 struct multicall_space mcs;
217 struct mmu_update *u;
218
219 mcs = xen_mc_extend_args(__HYPERVISOR_mmu_update, sizeof(*u));
220
221 if (mcs.mc != NULL) {
222 mcs.mc->args[1]++;
223 } else {
224 mcs = __xen_mc_entry(sizeof(*u));
225 MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
226 }
227
228 u = mcs.args;
229 *u = *update;
230 }
231
232 static void xen_set_pmd_hyper(pmd_t *ptr, pmd_t val)
233 {
234 struct mmu_update u;
235
236 preempt_disable();
237
238 xen_mc_batch();
239
240 /* ptr may be ioremapped for 64-bit pagetable setup */
241 u.ptr = arbitrary_virt_to_machine(ptr).maddr;
242 u.val = pmd_val_ma(val);
243 xen_extend_mmu_update(&u);
244
245 xen_mc_issue(PARAVIRT_LAZY_MMU);
246
247 preempt_enable();
248 }
249
250 static void xen_set_pmd(pmd_t *ptr, pmd_t val)
251 {
252 trace_xen_mmu_set_pmd(ptr, val);
253
254 /* If page is not pinned, we can just update the entry
255 directly */
256 if (!xen_page_pinned(ptr)) {
257 *ptr = val;
258 return;
259 }
260
261 xen_set_pmd_hyper(ptr, val);
262 }
263
264 /*
265 * Associate a virtual page frame with a given physical page frame
266 * and protection flags for that frame.
267 */
268 void set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags)
269 {
270 set_pte_vaddr(vaddr, mfn_pte(mfn, flags));
271 }
272
273 static bool xen_batched_set_pte(pte_t *ptep, pte_t pteval)
274 {
275 struct mmu_update u;
276
277 if (paravirt_get_lazy_mode() != PARAVIRT_LAZY_MMU)
278 return false;
279
280 xen_mc_batch();
281
282 u.ptr = virt_to_machine(ptep).maddr | MMU_NORMAL_PT_UPDATE;
283 u.val = pte_val_ma(pteval);
284 xen_extend_mmu_update(&u);
285
286 xen_mc_issue(PARAVIRT_LAZY_MMU);
287
288 return true;
289 }
290
291 static inline void __xen_set_pte(pte_t *ptep, pte_t pteval)
292 {
293 if (!xen_batched_set_pte(ptep, pteval))
294 native_set_pte(ptep, pteval);
295 }
296
297 static void xen_set_pte(pte_t *ptep, pte_t pteval)
298 {
299 trace_xen_mmu_set_pte(ptep, pteval);
300 __xen_set_pte(ptep, pteval);
301 }
302
303 static void xen_set_pte_at(struct mm_struct *mm, unsigned long addr,
304 pte_t *ptep, pte_t pteval)
305 {
306 trace_xen_mmu_set_pte_at(mm, addr, ptep, pteval);
307 __xen_set_pte(ptep, pteval);
308 }
309
310 pte_t xen_ptep_modify_prot_start(struct mm_struct *mm,
311 unsigned long addr, pte_t *ptep)
312 {
313 /* Just return the pte as-is. We preserve the bits on commit */
314 trace_xen_mmu_ptep_modify_prot_start(mm, addr, ptep, *ptep);
315 return *ptep;
316 }
317
318 void xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
319 pte_t *ptep, pte_t pte)
320 {
321 struct mmu_update u;
322
323 trace_xen_mmu_ptep_modify_prot_commit(mm, addr, ptep, pte);
324 xen_mc_batch();
325
326 u.ptr = virt_to_machine(ptep).maddr | MMU_PT_UPDATE_PRESERVE_AD;
327 u.val = pte_val_ma(pte);
328 xen_extend_mmu_update(&u);
329
330 xen_mc_issue(PARAVIRT_LAZY_MMU);
331 }
332
333 /* Assume pteval_t is equivalent to all the other *val_t types. */
334 static pteval_t pte_mfn_to_pfn(pteval_t val)
335 {
336 if (val & _PAGE_PRESENT) {
337 unsigned long mfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
338 pteval_t flags = val & PTE_FLAGS_MASK;
339 val = ((pteval_t)mfn_to_pfn(mfn) << PAGE_SHIFT) | flags;
340 }
341
342 return val;
343 }
344
345 static pteval_t pte_pfn_to_mfn(pteval_t val)
346 {
347 if (val & _PAGE_PRESENT) {
348 unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
349 pteval_t flags = val & PTE_FLAGS_MASK;
350 unsigned long mfn;
351
352 if (!xen_feature(XENFEAT_auto_translated_physmap))
353 mfn = get_phys_to_machine(pfn);
354 else
355 mfn = pfn;
356 /*
357 * If there's no mfn for the pfn, then just create an
358 * empty non-present pte. Unfortunately this loses
359 * information about the original pfn, so
360 * pte_mfn_to_pfn is asymmetric.
361 */
362 if (unlikely(mfn == INVALID_P2M_ENTRY)) {
363 mfn = 0;
364 flags = 0;
365 } else {
366 /*
367 * Paramount to do this test _after_ the
368 * INVALID_P2M_ENTRY as INVALID_P2M_ENTRY &
369 * IDENTITY_FRAME_BIT resolves to true.
370 */
371 mfn &= ~FOREIGN_FRAME_BIT;
372 if (mfn & IDENTITY_FRAME_BIT) {
373 mfn &= ~IDENTITY_FRAME_BIT;
374 flags |= _PAGE_IOMAP;
375 }
376 }
377 val = ((pteval_t)mfn << PAGE_SHIFT) | flags;
378 }
379
380 return val;
381 }
382
383 static pteval_t iomap_pte(pteval_t val)
384 {
385 if (val & _PAGE_PRESENT) {
386 unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
387 pteval_t flags = val & PTE_FLAGS_MASK;
388
389 /* We assume the pte frame number is a MFN, so
390 just use it as-is. */
391 val = ((pteval_t)pfn << PAGE_SHIFT) | flags;
392 }
393
394 return val;
395 }
396
397 static pteval_t xen_pte_val(pte_t pte)
398 {
399 pteval_t pteval = pte.pte;
400
401 /* If this is a WC pte, convert back from Xen WC to Linux WC */
402 if ((pteval & (_PAGE_PAT | _PAGE_PCD | _PAGE_PWT)) == _PAGE_PAT) {
403 WARN_ON(!pat_enabled);
404 pteval = (pteval & ~_PAGE_PAT) | _PAGE_PWT;
405 }
406
407 if (xen_initial_domain() && (pteval & _PAGE_IOMAP))
408 return pteval;
409
410 return pte_mfn_to_pfn(pteval);
411 }
412 PV_CALLEE_SAVE_REGS_THUNK(xen_pte_val);
413
414 static pgdval_t xen_pgd_val(pgd_t pgd)
415 {
416 return pte_mfn_to_pfn(pgd.pgd);
417 }
418 PV_CALLEE_SAVE_REGS_THUNK(xen_pgd_val);
419
420 /*
421 * Xen's PAT setup is part of its ABI, though I assume entries 6 & 7
422 * are reserved for now, to correspond to the Intel-reserved PAT
423 * types.
424 *
425 * We expect Linux's PAT set as follows:
426 *
427 * Idx PTE flags Linux Xen Default
428 * 0 WB WB WB
429 * 1 PWT WC WT WT
430 * 2 PCD UC- UC- UC-
431 * 3 PCD PWT UC UC UC
432 * 4 PAT WB WC WB
433 * 5 PAT PWT WC WP WT
434 * 6 PAT PCD UC- UC UC-
435 * 7 PAT PCD PWT UC UC UC
436 */
437
438 void xen_set_pat(u64 pat)
439 {
440 /* We expect Linux to use a PAT setting of
441 * UC UC- WC WB (ignoring the PAT flag) */
442 WARN_ON(pat != 0x0007010600070106ull);
443 }
444
445 static pte_t xen_make_pte(pteval_t pte)
446 {
447 phys_addr_t addr = (pte & PTE_PFN_MASK);
448
449 /* If Linux is trying to set a WC pte, then map to the Xen WC.
450 * If _PAGE_PAT is set, then it probably means it is really
451 * _PAGE_PSE, so avoid fiddling with the PAT mapping and hope
452 * things work out OK...
453 *
454 * (We should never see kernel mappings with _PAGE_PSE set,
455 * but we could see hugetlbfs mappings, I think.).
456 */
457 if (pat_enabled && !WARN_ON(pte & _PAGE_PAT)) {
458 if ((pte & (_PAGE_PCD | _PAGE_PWT)) == _PAGE_PWT)
459 pte = (pte & ~(_PAGE_PCD | _PAGE_PWT)) | _PAGE_PAT;
460 }
461
462 /*
463 * Unprivileged domains are allowed to do IOMAPpings for
464 * PCI passthrough, but not map ISA space. The ISA
465 * mappings are just dummy local mappings to keep other
466 * parts of the kernel happy.
467 */
468 if (unlikely(pte & _PAGE_IOMAP) &&
469 (xen_initial_domain() || addr >= ISA_END_ADDRESS)) {
470 pte = iomap_pte(pte);
471 } else {
472 pte &= ~_PAGE_IOMAP;
473 pte = pte_pfn_to_mfn(pte);
474 }
475
476 return native_make_pte(pte);
477 }
478 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte);
479
480 #ifdef CONFIG_XEN_DEBUG
481 pte_t xen_make_pte_debug(pteval_t pte)
482 {
483 phys_addr_t addr = (pte & PTE_PFN_MASK);
484 phys_addr_t other_addr;
485 bool io_page = false;
486 pte_t _pte;
487
488 if (pte & _PAGE_IOMAP)
489 io_page = true;
490
491 _pte = xen_make_pte(pte);
492
493 if (!addr)
494 return _pte;
495
496 if (io_page &&
497 (xen_initial_domain() || addr >= ISA_END_ADDRESS)) {
498 other_addr = pfn_to_mfn(addr >> PAGE_SHIFT) << PAGE_SHIFT;
499 WARN_ONCE(addr != other_addr,
500 "0x%lx is using VM_IO, but it is 0x%lx!\n",
501 (unsigned long)addr, (unsigned long)other_addr);
502 } else {
503 pteval_t iomap_set = (_pte.pte & PTE_FLAGS_MASK) & _PAGE_IOMAP;
504 other_addr = (_pte.pte & PTE_PFN_MASK);
505 WARN_ONCE((addr == other_addr) && (!io_page) && (!iomap_set),
506 "0x%lx is missing VM_IO (and wasn't fixed)!\n",
507 (unsigned long)addr);
508 }
509
510 return _pte;
511 }
512 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte_debug);
513 #endif
514
515 static pgd_t xen_make_pgd(pgdval_t pgd)
516 {
517 pgd = pte_pfn_to_mfn(pgd);
518 return native_make_pgd(pgd);
519 }
520 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pgd);
521
522 static pmdval_t xen_pmd_val(pmd_t pmd)
523 {
524 return pte_mfn_to_pfn(pmd.pmd);
525 }
526 PV_CALLEE_SAVE_REGS_THUNK(xen_pmd_val);
527
528 static void xen_set_pud_hyper(pud_t *ptr, pud_t val)
529 {
530 struct mmu_update u;
531
532 preempt_disable();
533
534 xen_mc_batch();
535
536 /* ptr may be ioremapped for 64-bit pagetable setup */
537 u.ptr = arbitrary_virt_to_machine(ptr).maddr;
538 u.val = pud_val_ma(val);
539 xen_extend_mmu_update(&u);
540
541 xen_mc_issue(PARAVIRT_LAZY_MMU);
542
543 preempt_enable();
544 }
545
546 static void xen_set_pud(pud_t *ptr, pud_t val)
547 {
548 trace_xen_mmu_set_pud(ptr, val);
549
550 /* If page is not pinned, we can just update the entry
551 directly */
552 if (!xen_page_pinned(ptr)) {
553 *ptr = val;
554 return;
555 }
556
557 xen_set_pud_hyper(ptr, val);
558 }
559
560 #ifdef CONFIG_X86_PAE
561 static void xen_set_pte_atomic(pte_t *ptep, pte_t pte)
562 {
563 trace_xen_mmu_set_pte_atomic(ptep, pte);
564 set_64bit((u64 *)ptep, native_pte_val(pte));
565 }
566
567 static void xen_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
568 {
569 trace_xen_mmu_pte_clear(mm, addr, ptep);
570 if (!xen_batched_set_pte(ptep, native_make_pte(0)))
571 native_pte_clear(mm, addr, ptep);
572 }
573
574 static void xen_pmd_clear(pmd_t *pmdp)
575 {
576 trace_xen_mmu_pmd_clear(pmdp);
577 set_pmd(pmdp, __pmd(0));
578 }
579 #endif /* CONFIG_X86_PAE */
580
581 static pmd_t xen_make_pmd(pmdval_t pmd)
582 {
583 pmd = pte_pfn_to_mfn(pmd);
584 return native_make_pmd(pmd);
585 }
586 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pmd);
587
588 #if PAGETABLE_LEVELS == 4
589 static pudval_t xen_pud_val(pud_t pud)
590 {
591 return pte_mfn_to_pfn(pud.pud);
592 }
593 PV_CALLEE_SAVE_REGS_THUNK(xen_pud_val);
594
595 static pud_t xen_make_pud(pudval_t pud)
596 {
597 pud = pte_pfn_to_mfn(pud);
598
599 return native_make_pud(pud);
600 }
601 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pud);
602
603 static pgd_t *xen_get_user_pgd(pgd_t *pgd)
604 {
605 pgd_t *pgd_page = (pgd_t *)(((unsigned long)pgd) & PAGE_MASK);
606 unsigned offset = pgd - pgd_page;
607 pgd_t *user_ptr = NULL;
608
609 if (offset < pgd_index(USER_LIMIT)) {
610 struct page *page = virt_to_page(pgd_page);
611 user_ptr = (pgd_t *)page->private;
612 if (user_ptr)
613 user_ptr += offset;
614 }
615
616 return user_ptr;
617 }
618
619 static void __xen_set_pgd_hyper(pgd_t *ptr, pgd_t val)
620 {
621 struct mmu_update u;
622
623 u.ptr = virt_to_machine(ptr).maddr;
624 u.val = pgd_val_ma(val);
625 xen_extend_mmu_update(&u);
626 }
627
628 /*
629 * Raw hypercall-based set_pgd, intended for in early boot before
630 * there's a page structure. This implies:
631 * 1. The only existing pagetable is the kernel's
632 * 2. It is always pinned
633 * 3. It has no user pagetable attached to it
634 */
635 static void __init xen_set_pgd_hyper(pgd_t *ptr, pgd_t val)
636 {
637 preempt_disable();
638
639 xen_mc_batch();
640
641 __xen_set_pgd_hyper(ptr, val);
642
643 xen_mc_issue(PARAVIRT_LAZY_MMU);
644
645 preempt_enable();
646 }
647
648 static void xen_set_pgd(pgd_t *ptr, pgd_t val)
649 {
650 pgd_t *user_ptr = xen_get_user_pgd(ptr);
651
652 trace_xen_mmu_set_pgd(ptr, user_ptr, val);
653
654 /* If page is not pinned, we can just update the entry
655 directly */
656 if (!xen_page_pinned(ptr)) {
657 *ptr = val;
658 if (user_ptr) {
659 WARN_ON(xen_page_pinned(user_ptr));
660 *user_ptr = val;
661 }
662 return;
663 }
664
665 /* If it's pinned, then we can at least batch the kernel and
666 user updates together. */
667 xen_mc_batch();
668
669 __xen_set_pgd_hyper(ptr, val);
670 if (user_ptr)
671 __xen_set_pgd_hyper(user_ptr, val);
672
673 xen_mc_issue(PARAVIRT_LAZY_MMU);
674 }
675 #endif /* PAGETABLE_LEVELS == 4 */
676
677 /*
678 * (Yet another) pagetable walker. This one is intended for pinning a
679 * pagetable. This means that it walks a pagetable and calls the
680 * callback function on each page it finds making up the page table,
681 * at every level. It walks the entire pagetable, but it only bothers
682 * pinning pte pages which are below limit. In the normal case this
683 * will be STACK_TOP_MAX, but at boot we need to pin up to
684 * FIXADDR_TOP.
685 *
686 * For 32-bit the important bit is that we don't pin beyond there,
687 * because then we start getting into Xen's ptes.
688 *
689 * For 64-bit, we must skip the Xen hole in the middle of the address
690 * space, just after the big x86-64 virtual hole.
691 */
692 static int __xen_pgd_walk(struct mm_struct *mm, pgd_t *pgd,
693 int (*func)(struct mm_struct *mm, struct page *,
694 enum pt_level),
695 unsigned long limit)
696 {
697 int flush = 0;
698 unsigned hole_low, hole_high;
699 unsigned pgdidx_limit, pudidx_limit, pmdidx_limit;
700 unsigned pgdidx, pudidx, pmdidx;
701
702 /* The limit is the last byte to be touched */
703 limit--;
704 BUG_ON(limit >= FIXADDR_TOP);
705
706 if (xen_feature(XENFEAT_auto_translated_physmap))
707 return 0;
708
709 /*
710 * 64-bit has a great big hole in the middle of the address
711 * space, which contains the Xen mappings. On 32-bit these
712 * will end up making a zero-sized hole and so is a no-op.
713 */
714 hole_low = pgd_index(USER_LIMIT);
715 hole_high = pgd_index(PAGE_OFFSET);
716
717 pgdidx_limit = pgd_index(limit);
718 #if PTRS_PER_PUD > 1
719 pudidx_limit = pud_index(limit);
720 #else
721 pudidx_limit = 0;
722 #endif
723 #if PTRS_PER_PMD > 1
724 pmdidx_limit = pmd_index(limit);
725 #else
726 pmdidx_limit = 0;
727 #endif
728
729 for (pgdidx = 0; pgdidx <= pgdidx_limit; pgdidx++) {
730 pud_t *pud;
731
732 if (pgdidx >= hole_low && pgdidx < hole_high)
733 continue;
734
735 if (!pgd_val(pgd[pgdidx]))
736 continue;
737
738 pud = pud_offset(&pgd[pgdidx], 0);
739
740 if (PTRS_PER_PUD > 1) /* not folded */
741 flush |= (*func)(mm, virt_to_page(pud), PT_PUD);
742
743 for (pudidx = 0; pudidx < PTRS_PER_PUD; pudidx++) {
744 pmd_t *pmd;
745
746 if (pgdidx == pgdidx_limit &&
747 pudidx > pudidx_limit)
748 goto out;
749
750 if (pud_none(pud[pudidx]))
751 continue;
752
753 pmd = pmd_offset(&pud[pudidx], 0);
754
755 if (PTRS_PER_PMD > 1) /* not folded */
756 flush |= (*func)(mm, virt_to_page(pmd), PT_PMD);
757
758 for (pmdidx = 0; pmdidx < PTRS_PER_PMD; pmdidx++) {
759 struct page *pte;
760
761 if (pgdidx == pgdidx_limit &&
762 pudidx == pudidx_limit &&
763 pmdidx > pmdidx_limit)
764 goto out;
765
766 if (pmd_none(pmd[pmdidx]))
767 continue;
768
769 pte = pmd_page(pmd[pmdidx]);
770 flush |= (*func)(mm, pte, PT_PTE);
771 }
772 }
773 }
774
775 out:
776 /* Do the top level last, so that the callbacks can use it as
777 a cue to do final things like tlb flushes. */
778 flush |= (*func)(mm, virt_to_page(pgd), PT_PGD);
779
780 return flush;
781 }
782
783 static int xen_pgd_walk(struct mm_struct *mm,
784 int (*func)(struct mm_struct *mm, struct page *,
785 enum pt_level),
786 unsigned long limit)
787 {
788 return __xen_pgd_walk(mm, mm->pgd, func, limit);
789 }
790
791 /* If we're using split pte locks, then take the page's lock and
792 return a pointer to it. Otherwise return NULL. */
793 static spinlock_t *xen_pte_lock(struct page *page, struct mm_struct *mm)
794 {
795 spinlock_t *ptl = NULL;
796
797 #if USE_SPLIT_PTLOCKS
798 ptl = __pte_lockptr(page);
799 spin_lock_nest_lock(ptl, &mm->page_table_lock);
800 #endif
801
802 return ptl;
803 }
804
805 static void xen_pte_unlock(void *v)
806 {
807 spinlock_t *ptl = v;
808 spin_unlock(ptl);
809 }
810
811 static void xen_do_pin(unsigned level, unsigned long pfn)
812 {
813 struct mmuext_op *op;
814 struct multicall_space mcs;
815
816 mcs = __xen_mc_entry(sizeof(*op));
817 op = mcs.args;
818 op->cmd = level;
819 op->arg1.mfn = pfn_to_mfn(pfn);
820 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
821 }
822
823 static int xen_pin_page(struct mm_struct *mm, struct page *page,
824 enum pt_level level)
825 {
826 unsigned pgfl = TestSetPagePinned(page);
827 int flush;
828
829 if (pgfl)
830 flush = 0; /* already pinned */
831 else if (PageHighMem(page))
832 /* kmaps need flushing if we found an unpinned
833 highpage */
834 flush = 1;
835 else {
836 void *pt = lowmem_page_address(page);
837 unsigned long pfn = page_to_pfn(page);
838 struct multicall_space mcs = __xen_mc_entry(0);
839 spinlock_t *ptl;
840
841 flush = 0;
842
843 /*
844 * We need to hold the pagetable lock between the time
845 * we make the pagetable RO and when we actually pin
846 * it. If we don't, then other users may come in and
847 * attempt to update the pagetable by writing it,
848 * which will fail because the memory is RO but not
849 * pinned, so Xen won't do the trap'n'emulate.
850 *
851 * If we're using split pte locks, we can't hold the
852 * entire pagetable's worth of locks during the
853 * traverse, because we may wrap the preempt count (8
854 * bits). The solution is to mark RO and pin each PTE
855 * page while holding the lock. This means the number
856 * of locks we end up holding is never more than a
857 * batch size (~32 entries, at present).
858 *
859 * If we're not using split pte locks, we needn't pin
860 * the PTE pages independently, because we're
861 * protected by the overall pagetable lock.
862 */
863 ptl = NULL;
864 if (level == PT_PTE)
865 ptl = xen_pte_lock(page, mm);
866
867 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
868 pfn_pte(pfn, PAGE_KERNEL_RO),
869 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
870
871 if (ptl) {
872 xen_do_pin(MMUEXT_PIN_L1_TABLE, pfn);
873
874 /* Queue a deferred unlock for when this batch
875 is completed. */
876 xen_mc_callback(xen_pte_unlock, ptl);
877 }
878 }
879
880 return flush;
881 }
882
883 /* This is called just after a mm has been created, but it has not
884 been used yet. We need to make sure that its pagetable is all
885 read-only, and can be pinned. */
886 static void __xen_pgd_pin(struct mm_struct *mm, pgd_t *pgd)
887 {
888 trace_xen_mmu_pgd_pin(mm, pgd);
889
890 xen_mc_batch();
891
892 if (__xen_pgd_walk(mm, pgd, xen_pin_page, USER_LIMIT)) {
893 /* re-enable interrupts for flushing */
894 xen_mc_issue(0);
895
896 kmap_flush_unused();
897
898 xen_mc_batch();
899 }
900
901 #ifdef CONFIG_X86_64
902 {
903 pgd_t *user_pgd = xen_get_user_pgd(pgd);
904
905 xen_do_pin(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa(pgd)));
906
907 if (user_pgd) {
908 xen_pin_page(mm, virt_to_page(user_pgd), PT_PGD);
909 xen_do_pin(MMUEXT_PIN_L4_TABLE,
910 PFN_DOWN(__pa(user_pgd)));
911 }
912 }
913 #else /* CONFIG_X86_32 */
914 #ifdef CONFIG_X86_PAE
915 /* Need to make sure unshared kernel PMD is pinnable */
916 xen_pin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
917 PT_PMD);
918 #endif
919 xen_do_pin(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(pgd)));
920 #endif /* CONFIG_X86_64 */
921 xen_mc_issue(0);
922 }
923
924 static void xen_pgd_pin(struct mm_struct *mm)
925 {
926 __xen_pgd_pin(mm, mm->pgd);
927 }
928
929 /*
930 * On save, we need to pin all pagetables to make sure they get their
931 * mfns turned into pfns. Search the list for any unpinned pgds and pin
932 * them (unpinned pgds are not currently in use, probably because the
933 * process is under construction or destruction).
934 *
935 * Expected to be called in stop_machine() ("equivalent to taking
936 * every spinlock in the system"), so the locking doesn't really
937 * matter all that much.
938 */
939 void xen_mm_pin_all(void)
940 {
941 struct page *page;
942
943 spin_lock(&pgd_lock);
944
945 list_for_each_entry(page, &pgd_list, lru) {
946 if (!PagePinned(page)) {
947 __xen_pgd_pin(&init_mm, (pgd_t *)page_address(page));
948 SetPageSavePinned(page);
949 }
950 }
951
952 spin_unlock(&pgd_lock);
953 }
954
955 /*
956 * The init_mm pagetable is really pinned as soon as its created, but
957 * that's before we have page structures to store the bits. So do all
958 * the book-keeping now.
959 */
960 static int __init xen_mark_pinned(struct mm_struct *mm, struct page *page,
961 enum pt_level level)
962 {
963 SetPagePinned(page);
964 return 0;
965 }
966
967 static void __init xen_mark_init_mm_pinned(void)
968 {
969 xen_pgd_walk(&init_mm, xen_mark_pinned, FIXADDR_TOP);
970 }
971
972 static int xen_unpin_page(struct mm_struct *mm, struct page *page,
973 enum pt_level level)
974 {
975 unsigned pgfl = TestClearPagePinned(page);
976
977 if (pgfl && !PageHighMem(page)) {
978 void *pt = lowmem_page_address(page);
979 unsigned long pfn = page_to_pfn(page);
980 spinlock_t *ptl = NULL;
981 struct multicall_space mcs;
982
983 /*
984 * Do the converse to pin_page. If we're using split
985 * pte locks, we must be holding the lock for while
986 * the pte page is unpinned but still RO to prevent
987 * concurrent updates from seeing it in this
988 * partially-pinned state.
989 */
990 if (level == PT_PTE) {
991 ptl = xen_pte_lock(page, mm);
992
993 if (ptl)
994 xen_do_pin(MMUEXT_UNPIN_TABLE, pfn);
995 }
996
997 mcs = __xen_mc_entry(0);
998
999 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
1000 pfn_pte(pfn, PAGE_KERNEL),
1001 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
1002
1003 if (ptl) {
1004 /* unlock when batch completed */
1005 xen_mc_callback(xen_pte_unlock, ptl);
1006 }
1007 }
1008
1009 return 0; /* never need to flush on unpin */
1010 }
1011
1012 /* Release a pagetables pages back as normal RW */
1013 static void __xen_pgd_unpin(struct mm_struct *mm, pgd_t *pgd)
1014 {
1015 trace_xen_mmu_pgd_unpin(mm, pgd);
1016
1017 xen_mc_batch();
1018
1019 xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1020
1021 #ifdef CONFIG_X86_64
1022 {
1023 pgd_t *user_pgd = xen_get_user_pgd(pgd);
1024
1025 if (user_pgd) {
1026 xen_do_pin(MMUEXT_UNPIN_TABLE,
1027 PFN_DOWN(__pa(user_pgd)));
1028 xen_unpin_page(mm, virt_to_page(user_pgd), PT_PGD);
1029 }
1030 }
1031 #endif
1032
1033 #ifdef CONFIG_X86_PAE
1034 /* Need to make sure unshared kernel PMD is unpinned */
1035 xen_unpin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
1036 PT_PMD);
1037 #endif
1038
1039 __xen_pgd_walk(mm, pgd, xen_unpin_page, USER_LIMIT);
1040
1041 xen_mc_issue(0);
1042 }
1043
1044 static void xen_pgd_unpin(struct mm_struct *mm)
1045 {
1046 __xen_pgd_unpin(mm, mm->pgd);
1047 }
1048
1049 /*
1050 * On resume, undo any pinning done at save, so that the rest of the
1051 * kernel doesn't see any unexpected pinned pagetables.
1052 */
1053 void xen_mm_unpin_all(void)
1054 {
1055 struct page *page;
1056
1057 spin_lock(&pgd_lock);
1058
1059 list_for_each_entry(page, &pgd_list, lru) {
1060 if (PageSavePinned(page)) {
1061 BUG_ON(!PagePinned(page));
1062 __xen_pgd_unpin(&init_mm, (pgd_t *)page_address(page));
1063 ClearPageSavePinned(page);
1064 }
1065 }
1066
1067 spin_unlock(&pgd_lock);
1068 }
1069
1070 static void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next)
1071 {
1072 spin_lock(&next->page_table_lock);
1073 xen_pgd_pin(next);
1074 spin_unlock(&next->page_table_lock);
1075 }
1076
1077 static void xen_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm)
1078 {
1079 spin_lock(&mm->page_table_lock);
1080 xen_pgd_pin(mm);
1081 spin_unlock(&mm->page_table_lock);
1082 }
1083
1084
1085 #ifdef CONFIG_SMP
1086 /* Another cpu may still have their %cr3 pointing at the pagetable, so
1087 we need to repoint it somewhere else before we can unpin it. */
1088 static void drop_other_mm_ref(void *info)
1089 {
1090 struct mm_struct *mm = info;
1091 struct mm_struct *active_mm;
1092
1093 active_mm = percpu_read(cpu_tlbstate.active_mm);
1094
1095 if (active_mm == mm && percpu_read(cpu_tlbstate.state) != TLBSTATE_OK)
1096 leave_mm(smp_processor_id());
1097
1098 /* If this cpu still has a stale cr3 reference, then make sure
1099 it has been flushed. */
1100 if (percpu_read(xen_current_cr3) == __pa(mm->pgd))
1101 load_cr3(swapper_pg_dir);
1102 }
1103
1104 static void xen_drop_mm_ref(struct mm_struct *mm)
1105 {
1106 cpumask_var_t mask;
1107 unsigned cpu;
1108
1109 if (current->active_mm == mm) {
1110 if (current->mm == mm)
1111 load_cr3(swapper_pg_dir);
1112 else
1113 leave_mm(smp_processor_id());
1114 }
1115
1116 /* Get the "official" set of cpus referring to our pagetable. */
1117 if (!alloc_cpumask_var(&mask, GFP_ATOMIC)) {
1118 for_each_online_cpu(cpu) {
1119 if (!cpumask_test_cpu(cpu, mm_cpumask(mm))
1120 && per_cpu(xen_current_cr3, cpu) != __pa(mm->pgd))
1121 continue;
1122 smp_call_function_single(cpu, drop_other_mm_ref, mm, 1);
1123 }
1124 return;
1125 }
1126 cpumask_copy(mask, mm_cpumask(mm));
1127
1128 /* It's possible that a vcpu may have a stale reference to our
1129 cr3, because its in lazy mode, and it hasn't yet flushed
1130 its set of pending hypercalls yet. In this case, we can
1131 look at its actual current cr3 value, and force it to flush
1132 if needed. */
1133 for_each_online_cpu(cpu) {
1134 if (per_cpu(xen_current_cr3, cpu) == __pa(mm->pgd))
1135 cpumask_set_cpu(cpu, mask);
1136 }
1137
1138 if (!cpumask_empty(mask))
1139 smp_call_function_many(mask, drop_other_mm_ref, mm, 1);
1140 free_cpumask_var(mask);
1141 }
1142 #else
1143 static void xen_drop_mm_ref(struct mm_struct *mm)
1144 {
1145 if (current->active_mm == mm)
1146 load_cr3(swapper_pg_dir);
1147 }
1148 #endif
1149
1150 /*
1151 * While a process runs, Xen pins its pagetables, which means that the
1152 * hypervisor forces it to be read-only, and it controls all updates
1153 * to it. This means that all pagetable updates have to go via the
1154 * hypervisor, which is moderately expensive.
1155 *
1156 * Since we're pulling the pagetable down, we switch to use init_mm,
1157 * unpin old process pagetable and mark it all read-write, which
1158 * allows further operations on it to be simple memory accesses.
1159 *
1160 * The only subtle point is that another CPU may be still using the
1161 * pagetable because of lazy tlb flushing. This means we need need to
1162 * switch all CPUs off this pagetable before we can unpin it.
1163 */
1164 static void xen_exit_mmap(struct mm_struct *mm)
1165 {
1166 get_cpu(); /* make sure we don't move around */
1167 xen_drop_mm_ref(mm);
1168 put_cpu();
1169
1170 spin_lock(&mm->page_table_lock);
1171
1172 /* pgd may not be pinned in the error exit path of execve */
1173 if (xen_page_pinned(mm->pgd))
1174 xen_pgd_unpin(mm);
1175
1176 spin_unlock(&mm->page_table_lock);
1177 }
1178
1179 static void __init xen_pagetable_setup_start(pgd_t *base)
1180 {
1181 }
1182
1183 static __init void xen_mapping_pagetable_reserve(u64 start, u64 end)
1184 {
1185 /* reserve the range used */
1186 native_pagetable_reserve(start, end);
1187
1188 /* set as RW the rest */
1189 printk(KERN_DEBUG "xen: setting RW the range %llx - %llx\n", end,
1190 PFN_PHYS(pgt_buf_top));
1191 while (end < PFN_PHYS(pgt_buf_top)) {
1192 make_lowmem_page_readwrite(__va(end));
1193 end += PAGE_SIZE;
1194 }
1195 }
1196
1197 static void xen_post_allocator_init(void);
1198
1199 static void __init xen_pagetable_setup_done(pgd_t *base)
1200 {
1201 xen_setup_shared_info();
1202 xen_post_allocator_init();
1203 }
1204
1205 static void xen_write_cr2(unsigned long cr2)
1206 {
1207 percpu_read(xen_vcpu)->arch.cr2 = cr2;
1208 }
1209
1210 static unsigned long xen_read_cr2(void)
1211 {
1212 return percpu_read(xen_vcpu)->arch.cr2;
1213 }
1214
1215 unsigned long xen_read_cr2_direct(void)
1216 {
1217 return percpu_read(xen_vcpu_info.arch.cr2);
1218 }
1219
1220 static void xen_flush_tlb(void)
1221 {
1222 struct mmuext_op *op;
1223 struct multicall_space mcs;
1224
1225 trace_xen_mmu_flush_tlb(0);
1226
1227 preempt_disable();
1228
1229 mcs = xen_mc_entry(sizeof(*op));
1230
1231 op = mcs.args;
1232 op->cmd = MMUEXT_TLB_FLUSH_LOCAL;
1233 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1234
1235 xen_mc_issue(PARAVIRT_LAZY_MMU);
1236
1237 preempt_enable();
1238 }
1239
1240 static void xen_flush_tlb_single(unsigned long addr)
1241 {
1242 struct mmuext_op *op;
1243 struct multicall_space mcs;
1244
1245 trace_xen_mmu_flush_tlb_single(addr);
1246
1247 preempt_disable();
1248
1249 mcs = xen_mc_entry(sizeof(*op));
1250 op = mcs.args;
1251 op->cmd = MMUEXT_INVLPG_LOCAL;
1252 op->arg1.linear_addr = addr & PAGE_MASK;
1253 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1254
1255 xen_mc_issue(PARAVIRT_LAZY_MMU);
1256
1257 preempt_enable();
1258 }
1259
1260 static void xen_flush_tlb_others(const struct cpumask *cpus,
1261 struct mm_struct *mm, unsigned long va)
1262 {
1263 struct {
1264 struct mmuext_op op;
1265 #ifdef CONFIG_SMP
1266 DECLARE_BITMAP(mask, num_processors);
1267 #else
1268 DECLARE_BITMAP(mask, NR_CPUS);
1269 #endif
1270 } *args;
1271 struct multicall_space mcs;
1272
1273 trace_xen_mmu_flush_tlb_others(cpus, mm, va);
1274
1275 if (cpumask_empty(cpus))
1276 return; /* nothing to do */
1277
1278 mcs = xen_mc_entry(sizeof(*args));
1279 args = mcs.args;
1280 args->op.arg2.vcpumask = to_cpumask(args->mask);
1281
1282 /* Remove us, and any offline CPUS. */
1283 cpumask_and(to_cpumask(args->mask), cpus, cpu_online_mask);
1284 cpumask_clear_cpu(smp_processor_id(), to_cpumask(args->mask));
1285
1286 if (va == TLB_FLUSH_ALL) {
1287 args->op.cmd = MMUEXT_TLB_FLUSH_MULTI;
1288 } else {
1289 args->op.cmd = MMUEXT_INVLPG_MULTI;
1290 args->op.arg1.linear_addr = va;
1291 }
1292
1293 MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF);
1294
1295 xen_mc_issue(PARAVIRT_LAZY_MMU);
1296 }
1297
1298 static unsigned long xen_read_cr3(void)
1299 {
1300 return percpu_read(xen_cr3);
1301 }
1302
1303 static void set_current_cr3(void *v)
1304 {
1305 percpu_write(xen_current_cr3, (unsigned long)v);
1306 }
1307
1308 static void __xen_write_cr3(bool kernel, unsigned long cr3)
1309 {
1310 struct mmuext_op *op;
1311 struct multicall_space mcs;
1312 unsigned long mfn;
1313
1314 trace_xen_mmu_write_cr3(kernel, cr3);
1315
1316 if (cr3)
1317 mfn = pfn_to_mfn(PFN_DOWN(cr3));
1318 else
1319 mfn = 0;
1320
1321 WARN_ON(mfn == 0 && kernel);
1322
1323 mcs = __xen_mc_entry(sizeof(*op));
1324
1325 op = mcs.args;
1326 op->cmd = kernel ? MMUEXT_NEW_BASEPTR : MMUEXT_NEW_USER_BASEPTR;
1327 op->arg1.mfn = mfn;
1328
1329 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1330
1331 if (kernel) {
1332 percpu_write(xen_cr3, cr3);
1333
1334 /* Update xen_current_cr3 once the batch has actually
1335 been submitted. */
1336 xen_mc_callback(set_current_cr3, (void *)cr3);
1337 }
1338 }
1339
1340 static void xen_write_cr3(unsigned long cr3)
1341 {
1342 BUG_ON(preemptible());
1343
1344 xen_mc_batch(); /* disables interrupts */
1345
1346 /* Update while interrupts are disabled, so its atomic with
1347 respect to ipis */
1348 percpu_write(xen_cr3, cr3);
1349
1350 __xen_write_cr3(true, cr3);
1351
1352 #ifdef CONFIG_X86_64
1353 {
1354 pgd_t *user_pgd = xen_get_user_pgd(__va(cr3));
1355 if (user_pgd)
1356 __xen_write_cr3(false, __pa(user_pgd));
1357 else
1358 __xen_write_cr3(false, 0);
1359 }
1360 #endif
1361
1362 xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */
1363 }
1364
1365 static int xen_pgd_alloc(struct mm_struct *mm)
1366 {
1367 pgd_t *pgd = mm->pgd;
1368 int ret = 0;
1369
1370 BUG_ON(PagePinned(virt_to_page(pgd)));
1371
1372 #ifdef CONFIG_X86_64
1373 {
1374 struct page *page = virt_to_page(pgd);
1375 pgd_t *user_pgd;
1376
1377 BUG_ON(page->private != 0);
1378
1379 ret = -ENOMEM;
1380
1381 user_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
1382 page->private = (unsigned long)user_pgd;
1383
1384 if (user_pgd != NULL) {
1385 user_pgd[pgd_index(VSYSCALL_START)] =
1386 __pgd(__pa(level3_user_vsyscall) | _PAGE_TABLE);
1387 ret = 0;
1388 }
1389
1390 BUG_ON(PagePinned(virt_to_page(xen_get_user_pgd(pgd))));
1391 }
1392 #endif
1393
1394 return ret;
1395 }
1396
1397 static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd)
1398 {
1399 #ifdef CONFIG_X86_64
1400 pgd_t *user_pgd = xen_get_user_pgd(pgd);
1401
1402 if (user_pgd)
1403 free_page((unsigned long)user_pgd);
1404 #endif
1405 }
1406
1407 #ifdef CONFIG_X86_32
1408 static pte_t __init mask_rw_pte(pte_t *ptep, pte_t pte)
1409 {
1410 /* If there's an existing pte, then don't allow _PAGE_RW to be set */
1411 if (pte_val_ma(*ptep) & _PAGE_PRESENT)
1412 pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) &
1413 pte_val_ma(pte));
1414
1415 return pte;
1416 }
1417 #else /* CONFIG_X86_64 */
1418 static pte_t __init mask_rw_pte(pte_t *ptep, pte_t pte)
1419 {
1420 unsigned long pfn = pte_pfn(pte);
1421
1422 /*
1423 * If the new pfn is within the range of the newly allocated
1424 * kernel pagetable, and it isn't being mapped into an
1425 * early_ioremap fixmap slot as a freshly allocated page, make sure
1426 * it is RO.
1427 */
1428 if (((!is_early_ioremap_ptep(ptep) &&
1429 pfn >= pgt_buf_start && pfn < pgt_buf_top)) ||
1430 (is_early_ioremap_ptep(ptep) && pfn != (pgt_buf_end - 1)))
1431 pte = pte_wrprotect(pte);
1432
1433 return pte;
1434 }
1435 #endif /* CONFIG_X86_64 */
1436
1437 /* Init-time set_pte while constructing initial pagetables, which
1438 doesn't allow RO pagetable pages to be remapped RW */
1439 static void __init xen_set_pte_init(pte_t *ptep, pte_t pte)
1440 {
1441 pte = mask_rw_pte(ptep, pte);
1442
1443 xen_set_pte(ptep, pte);
1444 }
1445
1446 static void pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
1447 {
1448 struct mmuext_op op;
1449 op.cmd = cmd;
1450 op.arg1.mfn = pfn_to_mfn(pfn);
1451 if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF))
1452 BUG();
1453 }
1454
1455 /* Early in boot, while setting up the initial pagetable, assume
1456 everything is pinned. */
1457 static void __init xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn)
1458 {
1459 #ifdef CONFIG_FLATMEM
1460 BUG_ON(mem_map); /* should only be used early */
1461 #endif
1462 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
1463 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
1464 }
1465
1466 /* Used for pmd and pud */
1467 static void __init xen_alloc_pmd_init(struct mm_struct *mm, unsigned long pfn)
1468 {
1469 #ifdef CONFIG_FLATMEM
1470 BUG_ON(mem_map); /* should only be used early */
1471 #endif
1472 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
1473 }
1474
1475 /* Early release_pte assumes that all pts are pinned, since there's
1476 only init_mm and anything attached to that is pinned. */
1477 static void __init xen_release_pte_init(unsigned long pfn)
1478 {
1479 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
1480 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1481 }
1482
1483 static void __init xen_release_pmd_init(unsigned long pfn)
1484 {
1485 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1486 }
1487
1488 /* This needs to make sure the new pte page is pinned iff its being
1489 attached to a pinned pagetable. */
1490 static void xen_alloc_ptpage(struct mm_struct *mm, unsigned long pfn, unsigned level)
1491 {
1492 struct page *page = pfn_to_page(pfn);
1493 int pinned = PagePinned(virt_to_page(mm->pgd));
1494
1495 trace_xen_mmu_alloc_ptpage(mm, pfn, level, pinned);
1496
1497 if (pinned) {
1498 SetPagePinned(page);
1499
1500 if (!PageHighMem(page)) {
1501 make_lowmem_page_readonly(__va(PFN_PHYS((unsigned long)pfn)));
1502 if (level == PT_PTE && USE_SPLIT_PTLOCKS)
1503 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
1504 } else {
1505 /* make sure there are no stray mappings of
1506 this page */
1507 kmap_flush_unused();
1508 }
1509 }
1510 }
1511
1512 static void xen_alloc_pte(struct mm_struct *mm, unsigned long pfn)
1513 {
1514 xen_alloc_ptpage(mm, pfn, PT_PTE);
1515 }
1516
1517 static void xen_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
1518 {
1519 xen_alloc_ptpage(mm, pfn, PT_PMD);
1520 }
1521
1522 /* This should never happen until we're OK to use struct page */
1523 static void xen_release_ptpage(unsigned long pfn, unsigned level)
1524 {
1525 struct page *page = pfn_to_page(pfn);
1526 bool pinned = PagePinned(page);
1527
1528 trace_xen_mmu_release_ptpage(pfn, level, pinned);
1529
1530 if (pinned) {
1531 if (!PageHighMem(page)) {
1532 if (level == PT_PTE && USE_SPLIT_PTLOCKS)
1533 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
1534 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1535 }
1536 ClearPagePinned(page);
1537 }
1538 }
1539
1540 static void xen_release_pte(unsigned long pfn)
1541 {
1542 xen_release_ptpage(pfn, PT_PTE);
1543 }
1544
1545 static void xen_release_pmd(unsigned long pfn)
1546 {
1547 xen_release_ptpage(pfn, PT_PMD);
1548 }
1549
1550 #if PAGETABLE_LEVELS == 4
1551 static void xen_alloc_pud(struct mm_struct *mm, unsigned long pfn)
1552 {
1553 xen_alloc_ptpage(mm, pfn, PT_PUD);
1554 }
1555
1556 static void xen_release_pud(unsigned long pfn)
1557 {
1558 xen_release_ptpage(pfn, PT_PUD);
1559 }
1560 #endif
1561
1562 void __init xen_reserve_top(void)
1563 {
1564 #ifdef CONFIG_X86_32
1565 unsigned long top = HYPERVISOR_VIRT_START;
1566 struct xen_platform_parameters pp;
1567
1568 if (HYPERVISOR_xen_version(XENVER_platform_parameters, &pp) == 0)
1569 top = pp.virt_start;
1570
1571 reserve_top_address(-top);
1572 #endif /* CONFIG_X86_32 */
1573 }
1574
1575 /*
1576 * Like __va(), but returns address in the kernel mapping (which is
1577 * all we have until the physical memory mapping has been set up.
1578 */
1579 static void *__ka(phys_addr_t paddr)
1580 {
1581 #ifdef CONFIG_X86_64
1582 return (void *)(paddr + __START_KERNEL_map);
1583 #else
1584 return __va(paddr);
1585 #endif
1586 }
1587
1588 /* Convert a machine address to physical address */
1589 static unsigned long m2p(phys_addr_t maddr)
1590 {
1591 phys_addr_t paddr;
1592
1593 maddr &= PTE_PFN_MASK;
1594 paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT;
1595
1596 return paddr;
1597 }
1598
1599 /* Convert a machine address to kernel virtual */
1600 static void *m2v(phys_addr_t maddr)
1601 {
1602 return __ka(m2p(maddr));
1603 }
1604
1605 /* Set the page permissions on an identity-mapped pages */
1606 static void set_page_prot(void *addr, pgprot_t prot)
1607 {
1608 unsigned long pfn = __pa(addr) >> PAGE_SHIFT;
1609 pte_t pte = pfn_pte(pfn, prot);
1610
1611 if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, 0))
1612 BUG();
1613 }
1614
1615 static void __init xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn)
1616 {
1617 unsigned pmdidx, pteidx;
1618 unsigned ident_pte;
1619 unsigned long pfn;
1620
1621 level1_ident_pgt = extend_brk(sizeof(pte_t) * LEVEL1_IDENT_ENTRIES,
1622 PAGE_SIZE);
1623
1624 ident_pte = 0;
1625 pfn = 0;
1626 for (pmdidx = 0; pmdidx < PTRS_PER_PMD && pfn < max_pfn; pmdidx++) {
1627 pte_t *pte_page;
1628
1629 /* Reuse or allocate a page of ptes */
1630 if (pmd_present(pmd[pmdidx]))
1631 pte_page = m2v(pmd[pmdidx].pmd);
1632 else {
1633 /* Check for free pte pages */
1634 if (ident_pte == LEVEL1_IDENT_ENTRIES)
1635 break;
1636
1637 pte_page = &level1_ident_pgt[ident_pte];
1638 ident_pte += PTRS_PER_PTE;
1639
1640 pmd[pmdidx] = __pmd(__pa(pte_page) | _PAGE_TABLE);
1641 }
1642
1643 /* Install mappings */
1644 for (pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) {
1645 pte_t pte;
1646
1647 #ifdef CONFIG_X86_32
1648 if (pfn > max_pfn_mapped)
1649 max_pfn_mapped = pfn;
1650 #endif
1651
1652 if (!pte_none(pte_page[pteidx]))
1653 continue;
1654
1655 pte = pfn_pte(pfn, PAGE_KERNEL_EXEC);
1656 pte_page[pteidx] = pte;
1657 }
1658 }
1659
1660 for (pteidx = 0; pteidx < ident_pte; pteidx += PTRS_PER_PTE)
1661 set_page_prot(&level1_ident_pgt[pteidx], PAGE_KERNEL_RO);
1662
1663 set_page_prot(pmd, PAGE_KERNEL_RO);
1664 }
1665
1666 void __init xen_setup_machphys_mapping(void)
1667 {
1668 struct xen_machphys_mapping mapping;
1669 unsigned long machine_to_phys_nr_ents;
1670
1671 if (HYPERVISOR_memory_op(XENMEM_machphys_mapping, &mapping) == 0) {
1672 machine_to_phys_mapping = (unsigned long *)mapping.v_start;
1673 machine_to_phys_nr_ents = mapping.max_mfn + 1;
1674 } else {
1675 machine_to_phys_nr_ents = MACH2PHYS_NR_ENTRIES;
1676 }
1677 machine_to_phys_order = fls(machine_to_phys_nr_ents - 1);
1678 }
1679
1680 #ifdef CONFIG_X86_64
1681 static void convert_pfn_mfn(void *v)
1682 {
1683 pte_t *pte = v;
1684 int i;
1685
1686 /* All levels are converted the same way, so just treat them
1687 as ptes. */
1688 for (i = 0; i < PTRS_PER_PTE; i++)
1689 pte[i] = xen_make_pte(pte[i].pte);
1690 }
1691
1692 /*
1693 * Set up the initial kernel pagetable.
1694 *
1695 * We can construct this by grafting the Xen provided pagetable into
1696 * head_64.S's preconstructed pagetables. We copy the Xen L2's into
1697 * level2_ident_pgt, level2_kernel_pgt and level2_fixmap_pgt. This
1698 * means that only the kernel has a physical mapping to start with -
1699 * but that's enough to get __va working. We need to fill in the rest
1700 * of the physical mapping once some sort of allocator has been set
1701 * up.
1702 */
1703 pgd_t * __init xen_setup_kernel_pagetable(pgd_t *pgd,
1704 unsigned long max_pfn)
1705 {
1706 pud_t *l3;
1707 pmd_t *l2;
1708
1709 /* max_pfn_mapped is the last pfn mapped in the initial memory
1710 * mappings. Considering that on Xen after the kernel mappings we
1711 * have the mappings of some pages that don't exist in pfn space, we
1712 * set max_pfn_mapped to the last real pfn mapped. */
1713 max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->mfn_list));
1714
1715 /* Zap identity mapping */
1716 init_level4_pgt[0] = __pgd(0);
1717
1718 /* Pre-constructed entries are in pfn, so convert to mfn */
1719 convert_pfn_mfn(init_level4_pgt);
1720 convert_pfn_mfn(level3_ident_pgt);
1721 convert_pfn_mfn(level3_kernel_pgt);
1722
1723 l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd);
1724 l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud);
1725
1726 memcpy(level2_ident_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1727 memcpy(level2_kernel_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1728
1729 l3 = m2v(pgd[pgd_index(__START_KERNEL_map + PMD_SIZE)].pgd);
1730 l2 = m2v(l3[pud_index(__START_KERNEL_map + PMD_SIZE)].pud);
1731 memcpy(level2_fixmap_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1732
1733 /* Set up identity map */
1734 xen_map_identity_early(level2_ident_pgt, max_pfn);
1735
1736 /* Make pagetable pieces RO */
1737 set_page_prot(init_level4_pgt, PAGE_KERNEL_RO);
1738 set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO);
1739 set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO);
1740 set_page_prot(level3_user_vsyscall, PAGE_KERNEL_RO);
1741 set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
1742 set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO);
1743
1744 /* Pin down new L4 */
1745 pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE,
1746 PFN_DOWN(__pa_symbol(init_level4_pgt)));
1747
1748 /* Unpin Xen-provided one */
1749 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1750
1751 /* Switch over */
1752 pgd = init_level4_pgt;
1753
1754 /*
1755 * At this stage there can be no user pgd, and no page
1756 * structure to attach it to, so make sure we just set kernel
1757 * pgd.
1758 */
1759 xen_mc_batch();
1760 __xen_write_cr3(true, __pa(pgd));
1761 xen_mc_issue(PARAVIRT_LAZY_CPU);
1762
1763 memblock_x86_reserve_range(__pa(xen_start_info->pt_base),
1764 __pa(xen_start_info->pt_base +
1765 xen_start_info->nr_pt_frames * PAGE_SIZE),
1766 "XEN PAGETABLES");
1767
1768 return pgd;
1769 }
1770 #else /* !CONFIG_X86_64 */
1771 static RESERVE_BRK_ARRAY(pmd_t, initial_kernel_pmd, PTRS_PER_PMD);
1772 static RESERVE_BRK_ARRAY(pmd_t, swapper_kernel_pmd, PTRS_PER_PMD);
1773
1774 static void __init xen_write_cr3_init(unsigned long cr3)
1775 {
1776 unsigned long pfn = PFN_DOWN(__pa(swapper_pg_dir));
1777
1778 BUG_ON(read_cr3() != __pa(initial_page_table));
1779 BUG_ON(cr3 != __pa(swapper_pg_dir));
1780
1781 /*
1782 * We are switching to swapper_pg_dir for the first time (from
1783 * initial_page_table) and therefore need to mark that page
1784 * read-only and then pin it.
1785 *
1786 * Xen disallows sharing of kernel PMDs for PAE
1787 * guests. Therefore we must copy the kernel PMD from
1788 * initial_page_table into a new kernel PMD to be used in
1789 * swapper_pg_dir.
1790 */
1791 swapper_kernel_pmd =
1792 extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE);
1793 memcpy(swapper_kernel_pmd, initial_kernel_pmd,
1794 sizeof(pmd_t) * PTRS_PER_PMD);
1795 swapper_pg_dir[KERNEL_PGD_BOUNDARY] =
1796 __pgd(__pa(swapper_kernel_pmd) | _PAGE_PRESENT);
1797 set_page_prot(swapper_kernel_pmd, PAGE_KERNEL_RO);
1798
1799 set_page_prot(swapper_pg_dir, PAGE_KERNEL_RO);
1800 xen_write_cr3(cr3);
1801 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, pfn);
1802
1803 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE,
1804 PFN_DOWN(__pa(initial_page_table)));
1805 set_page_prot(initial_page_table, PAGE_KERNEL);
1806 set_page_prot(initial_kernel_pmd, PAGE_KERNEL);
1807
1808 pv_mmu_ops.write_cr3 = &xen_write_cr3;
1809 }
1810
1811 pgd_t * __init xen_setup_kernel_pagetable(pgd_t *pgd,
1812 unsigned long max_pfn)
1813 {
1814 pmd_t *kernel_pmd;
1815
1816 initial_kernel_pmd =
1817 extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE);
1818
1819 max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->pt_base) +
1820 xen_start_info->nr_pt_frames * PAGE_SIZE +
1821 512*1024);
1822
1823 kernel_pmd = m2v(pgd[KERNEL_PGD_BOUNDARY].pgd);
1824 memcpy(initial_kernel_pmd, kernel_pmd, sizeof(pmd_t) * PTRS_PER_PMD);
1825
1826 xen_map_identity_early(initial_kernel_pmd, max_pfn);
1827
1828 memcpy(initial_page_table, pgd, sizeof(pgd_t) * PTRS_PER_PGD);
1829 initial_page_table[KERNEL_PGD_BOUNDARY] =
1830 __pgd(__pa(initial_kernel_pmd) | _PAGE_PRESENT);
1831
1832 set_page_prot(initial_kernel_pmd, PAGE_KERNEL_RO);
1833 set_page_prot(initial_page_table, PAGE_KERNEL_RO);
1834 set_page_prot(empty_zero_page, PAGE_KERNEL_RO);
1835
1836 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1837
1838 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE,
1839 PFN_DOWN(__pa(initial_page_table)));
1840 xen_write_cr3(__pa(initial_page_table));
1841
1842 memblock_x86_reserve_range(__pa(xen_start_info->pt_base),
1843 __pa(xen_start_info->pt_base +
1844 xen_start_info->nr_pt_frames * PAGE_SIZE),
1845 "XEN PAGETABLES");
1846
1847 return initial_page_table;
1848 }
1849 #endif /* CONFIG_X86_64 */
1850
1851 static unsigned char dummy_mapping[PAGE_SIZE] __page_aligned_bss;
1852
1853 static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot)
1854 {
1855 pte_t pte;
1856
1857 phys >>= PAGE_SHIFT;
1858
1859 switch (idx) {
1860 case FIX_BTMAP_END ... FIX_BTMAP_BEGIN:
1861 #ifdef CONFIG_X86_F00F_BUG
1862 case FIX_F00F_IDT:
1863 #endif
1864 #ifdef CONFIG_X86_32
1865 case FIX_WP_TEST:
1866 case FIX_VDSO:
1867 # ifdef CONFIG_HIGHMEM
1868 case FIX_KMAP_BEGIN ... FIX_KMAP_END:
1869 # endif
1870 #else
1871 case VSYSCALL_LAST_PAGE ... VSYSCALL_FIRST_PAGE:
1872 #endif
1873 case FIX_TEXT_POKE0:
1874 case FIX_TEXT_POKE1:
1875 /* All local page mappings */
1876 pte = pfn_pte(phys, prot);
1877 break;
1878
1879 #ifdef CONFIG_X86_LOCAL_APIC
1880 case FIX_APIC_BASE: /* maps dummy local APIC */
1881 pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL);
1882 break;
1883 #endif
1884
1885 #ifdef CONFIG_X86_IO_APIC
1886 case FIX_IO_APIC_BASE_0 ... FIX_IO_APIC_BASE_END:
1887 /*
1888 * We just don't map the IO APIC - all access is via
1889 * hypercalls. Keep the address in the pte for reference.
1890 */
1891 pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL);
1892 break;
1893 #endif
1894
1895 case FIX_PARAVIRT_BOOTMAP:
1896 /* This is an MFN, but it isn't an IO mapping from the
1897 IO domain */
1898 pte = mfn_pte(phys, prot);
1899 break;
1900
1901 default:
1902 /* By default, set_fixmap is used for hardware mappings */
1903 pte = mfn_pte(phys, __pgprot(pgprot_val(prot) | _PAGE_IOMAP));
1904 break;
1905 }
1906
1907 __native_set_fixmap(idx, pte);
1908
1909 #ifdef CONFIG_X86_64
1910 /* Replicate changes to map the vsyscall page into the user
1911 pagetable vsyscall mapping. */
1912 if (idx >= VSYSCALL_LAST_PAGE && idx <= VSYSCALL_FIRST_PAGE) {
1913 unsigned long vaddr = __fix_to_virt(idx);
1914 set_pte_vaddr_pud(level3_user_vsyscall, vaddr, pte);
1915 }
1916 #endif
1917 }
1918
1919 void __init xen_ident_map_ISA(void)
1920 {
1921 unsigned long pa;
1922
1923 /*
1924 * If we're dom0, then linear map the ISA machine addresses into
1925 * the kernel's address space.
1926 */
1927 if (!xen_initial_domain())
1928 return;
1929
1930 xen_raw_printk("Xen: setup ISA identity maps\n");
1931
1932 for (pa = ISA_START_ADDRESS; pa < ISA_END_ADDRESS; pa += PAGE_SIZE) {
1933 pte_t pte = mfn_pte(PFN_DOWN(pa), PAGE_KERNEL_IO);
1934
1935 if (HYPERVISOR_update_va_mapping(PAGE_OFFSET + pa, pte, 0))
1936 BUG();
1937 }
1938
1939 xen_flush_tlb();
1940 }
1941
1942 static void __init xen_post_allocator_init(void)
1943 {
1944 #ifdef CONFIG_XEN_DEBUG
1945 pv_mmu_ops.make_pte = PV_CALLEE_SAVE(xen_make_pte_debug);
1946 #endif
1947 pv_mmu_ops.set_pte = xen_set_pte;
1948 pv_mmu_ops.set_pmd = xen_set_pmd;
1949 pv_mmu_ops.set_pud = xen_set_pud;
1950 #if PAGETABLE_LEVELS == 4
1951 pv_mmu_ops.set_pgd = xen_set_pgd;
1952 #endif
1953
1954 /* This will work as long as patching hasn't happened yet
1955 (which it hasn't) */
1956 pv_mmu_ops.alloc_pte = xen_alloc_pte;
1957 pv_mmu_ops.alloc_pmd = xen_alloc_pmd;
1958 pv_mmu_ops.release_pte = xen_release_pte;
1959 pv_mmu_ops.release_pmd = xen_release_pmd;
1960 #if PAGETABLE_LEVELS == 4
1961 pv_mmu_ops.alloc_pud = xen_alloc_pud;
1962 pv_mmu_ops.release_pud = xen_release_pud;
1963 #endif
1964
1965 #ifdef CONFIG_X86_64
1966 SetPagePinned(virt_to_page(level3_user_vsyscall));
1967 #endif
1968 xen_mark_init_mm_pinned();
1969 }
1970
1971 static void xen_leave_lazy_mmu(void)
1972 {
1973 preempt_disable();
1974 xen_mc_flush();
1975 paravirt_leave_lazy_mmu();
1976 preempt_enable();
1977 }
1978
1979 static const struct pv_mmu_ops xen_mmu_ops __initconst = {
1980 .read_cr2 = xen_read_cr2,
1981 .write_cr2 = xen_write_cr2,
1982
1983 .read_cr3 = xen_read_cr3,
1984 #ifdef CONFIG_X86_32
1985 .write_cr3 = xen_write_cr3_init,
1986 #else
1987 .write_cr3 = xen_write_cr3,
1988 #endif
1989
1990 .flush_tlb_user = xen_flush_tlb,
1991 .flush_tlb_kernel = xen_flush_tlb,
1992 .flush_tlb_single = xen_flush_tlb_single,
1993 .flush_tlb_others = xen_flush_tlb_others,
1994
1995 .pte_update = paravirt_nop,
1996 .pte_update_defer = paravirt_nop,
1997
1998 .pgd_alloc = xen_pgd_alloc,
1999 .pgd_free = xen_pgd_free,
2000
2001 .alloc_pte = xen_alloc_pte_init,
2002 .release_pte = xen_release_pte_init,
2003 .alloc_pmd = xen_alloc_pmd_init,
2004 .release_pmd = xen_release_pmd_init,
2005
2006 .set_pte = xen_set_pte_init,
2007 .set_pte_at = xen_set_pte_at,
2008 .set_pmd = xen_set_pmd_hyper,
2009
2010 .ptep_modify_prot_start = __ptep_modify_prot_start,
2011 .ptep_modify_prot_commit = __ptep_modify_prot_commit,
2012
2013 .pte_val = PV_CALLEE_SAVE(xen_pte_val),
2014 .pgd_val = PV_CALLEE_SAVE(xen_pgd_val),
2015
2016 .make_pte = PV_CALLEE_SAVE(xen_make_pte),
2017 .make_pgd = PV_CALLEE_SAVE(xen_make_pgd),
2018
2019 #ifdef CONFIG_X86_PAE
2020 .set_pte_atomic = xen_set_pte_atomic,
2021 .pte_clear = xen_pte_clear,
2022 .pmd_clear = xen_pmd_clear,
2023 #endif /* CONFIG_X86_PAE */
2024 .set_pud = xen_set_pud_hyper,
2025
2026 .make_pmd = PV_CALLEE_SAVE(xen_make_pmd),
2027 .pmd_val = PV_CALLEE_SAVE(xen_pmd_val),
2028
2029 #if PAGETABLE_LEVELS == 4
2030 .pud_val = PV_CALLEE_SAVE(xen_pud_val),
2031 .make_pud = PV_CALLEE_SAVE(xen_make_pud),
2032 .set_pgd = xen_set_pgd_hyper,
2033
2034 .alloc_pud = xen_alloc_pmd_init,
2035 .release_pud = xen_release_pmd_init,
2036 #endif /* PAGETABLE_LEVELS == 4 */
2037
2038 .activate_mm = xen_activate_mm,
2039 .dup_mmap = xen_dup_mmap,
2040 .exit_mmap = xen_exit_mmap,
2041
2042 .lazy_mode = {
2043 .enter = paravirt_enter_lazy_mmu,
2044 .leave = xen_leave_lazy_mmu,
2045 },
2046
2047 .set_fixmap = xen_set_fixmap,
2048 };
2049
2050 void __init xen_init_mmu_ops(void)
2051 {
2052 x86_init.mapping.pagetable_reserve = xen_mapping_pagetable_reserve;
2053 x86_init.paging.pagetable_setup_start = xen_pagetable_setup_start;
2054 x86_init.paging.pagetable_setup_done = xen_pagetable_setup_done;
2055 pv_mmu_ops = xen_mmu_ops;
2056
2057 memset(dummy_mapping, 0xff, PAGE_SIZE);
2058 }
2059
2060 /* Protected by xen_reservation_lock. */
2061 #define MAX_CONTIG_ORDER 9 /* 2MB */
2062 static unsigned long discontig_frames[1<<MAX_CONTIG_ORDER];
2063
2064 #define VOID_PTE (mfn_pte(0, __pgprot(0)))
2065 static void xen_zap_pfn_range(unsigned long vaddr, unsigned int order,
2066 unsigned long *in_frames,
2067 unsigned long *out_frames)
2068 {
2069 int i;
2070 struct multicall_space mcs;
2071
2072 xen_mc_batch();
2073 for (i = 0; i < (1UL<<order); i++, vaddr += PAGE_SIZE) {
2074 mcs = __xen_mc_entry(0);
2075
2076 if (in_frames)
2077 in_frames[i] = virt_to_mfn(vaddr);
2078
2079 MULTI_update_va_mapping(mcs.mc, vaddr, VOID_PTE, 0);
2080 __set_phys_to_machine(virt_to_pfn(vaddr), INVALID_P2M_ENTRY);
2081
2082 if (out_frames)
2083 out_frames[i] = virt_to_pfn(vaddr);
2084 }
2085 xen_mc_issue(0);
2086 }
2087
2088 /*
2089 * Update the pfn-to-mfn mappings for a virtual address range, either to
2090 * point to an array of mfns, or contiguously from a single starting
2091 * mfn.
2092 */
2093 static void xen_remap_exchanged_ptes(unsigned long vaddr, int order,
2094 unsigned long *mfns,
2095 unsigned long first_mfn)
2096 {
2097 unsigned i, limit;
2098 unsigned long mfn;
2099
2100 xen_mc_batch();
2101
2102 limit = 1u << order;
2103 for (i = 0; i < limit; i++, vaddr += PAGE_SIZE) {
2104 struct multicall_space mcs;
2105 unsigned flags;
2106
2107 mcs = __xen_mc_entry(0);
2108 if (mfns)
2109 mfn = mfns[i];
2110 else
2111 mfn = first_mfn + i;
2112
2113 if (i < (limit - 1))
2114 flags = 0;
2115 else {
2116 if (order == 0)
2117 flags = UVMF_INVLPG | UVMF_ALL;
2118 else
2119 flags = UVMF_TLB_FLUSH | UVMF_ALL;
2120 }
2121
2122 MULTI_update_va_mapping(mcs.mc, vaddr,
2123 mfn_pte(mfn, PAGE_KERNEL), flags);
2124
2125 set_phys_to_machine(virt_to_pfn(vaddr), mfn);
2126 }
2127
2128 xen_mc_issue(0);
2129 }
2130
2131 /*
2132 * Perform the hypercall to exchange a region of our pfns to point to
2133 * memory with the required contiguous alignment. Takes the pfns as
2134 * input, and populates mfns as output.
2135 *
2136 * Returns a success code indicating whether the hypervisor was able to
2137 * satisfy the request or not.
2138 */
2139 static int xen_exchange_memory(unsigned long extents_in, unsigned int order_in,
2140 unsigned long *pfns_in,
2141 unsigned long extents_out,
2142 unsigned int order_out,
2143 unsigned long *mfns_out,
2144 unsigned int address_bits)
2145 {
2146 long rc;
2147 int success;
2148
2149 struct xen_memory_exchange exchange = {
2150 .in = {
2151 .nr_extents = extents_in,
2152 .extent_order = order_in,
2153 .extent_start = pfns_in,
2154 .domid = DOMID_SELF
2155 },
2156 .out = {
2157 .nr_extents = extents_out,
2158 .extent_order = order_out,
2159 .extent_start = mfns_out,
2160 .address_bits = address_bits,
2161 .domid = DOMID_SELF
2162 }
2163 };
2164
2165 BUG_ON(extents_in << order_in != extents_out << order_out);
2166
2167 rc = HYPERVISOR_memory_op(XENMEM_exchange, &exchange);
2168 success = (exchange.nr_exchanged == extents_in);
2169
2170 BUG_ON(!success && ((exchange.nr_exchanged != 0) || (rc == 0)));
2171 BUG_ON(success && (rc != 0));
2172
2173 return success;
2174 }
2175
2176 int xen_create_contiguous_region(unsigned long vstart, unsigned int order,
2177 unsigned int address_bits)
2178 {
2179 unsigned long *in_frames = discontig_frames, out_frame;
2180 unsigned long flags;
2181 int success;
2182
2183 /*
2184 * Currently an auto-translated guest will not perform I/O, nor will
2185 * it require PAE page directories below 4GB. Therefore any calls to
2186 * this function are redundant and can be ignored.
2187 */
2188
2189 if (xen_feature(XENFEAT_auto_translated_physmap))
2190 return 0;
2191
2192 if (unlikely(order > MAX_CONTIG_ORDER))
2193 return -ENOMEM;
2194
2195 memset((void *) vstart, 0, PAGE_SIZE << order);
2196
2197 spin_lock_irqsave(&xen_reservation_lock, flags);
2198
2199 /* 1. Zap current PTEs, remembering MFNs. */
2200 xen_zap_pfn_range(vstart, order, in_frames, NULL);
2201
2202 /* 2. Get a new contiguous memory extent. */
2203 out_frame = virt_to_pfn(vstart);
2204 success = xen_exchange_memory(1UL << order, 0, in_frames,
2205 1, order, &out_frame,
2206 address_bits);
2207
2208 /* 3. Map the new extent in place of old pages. */
2209 if (success)
2210 xen_remap_exchanged_ptes(vstart, order, NULL, out_frame);
2211 else
2212 xen_remap_exchanged_ptes(vstart, order, in_frames, 0);
2213
2214 spin_unlock_irqrestore(&xen_reservation_lock, flags);
2215
2216 return success ? 0 : -ENOMEM;
2217 }
2218 EXPORT_SYMBOL_GPL(xen_create_contiguous_region);
2219
2220 void xen_destroy_contiguous_region(unsigned long vstart, unsigned int order)
2221 {
2222 unsigned long *out_frames = discontig_frames, in_frame;
2223 unsigned long flags;
2224 int success;
2225
2226 if (xen_feature(XENFEAT_auto_translated_physmap))
2227 return;
2228
2229 if (unlikely(order > MAX_CONTIG_ORDER))
2230 return;
2231
2232 memset((void *) vstart, 0, PAGE_SIZE << order);
2233
2234 spin_lock_irqsave(&xen_reservation_lock, flags);
2235
2236 /* 1. Find start MFN of contiguous extent. */
2237 in_frame = virt_to_mfn(vstart);
2238
2239 /* 2. Zap current PTEs. */
2240 xen_zap_pfn_range(vstart, order, NULL, out_frames);
2241
2242 /* 3. Do the exchange for non-contiguous MFNs. */
2243 success = xen_exchange_memory(1, order, &in_frame, 1UL << order,
2244 0, out_frames, 0);
2245
2246 /* 4. Map new pages in place of old pages. */
2247 if (success)
2248 xen_remap_exchanged_ptes(vstart, order, out_frames, 0);
2249 else
2250 xen_remap_exchanged_ptes(vstart, order, NULL, in_frame);
2251
2252 spin_unlock_irqrestore(&xen_reservation_lock, flags);
2253 }
2254 EXPORT_SYMBOL_GPL(xen_destroy_contiguous_region);
2255
2256 #ifdef CONFIG_XEN_PVHVM
2257 static void xen_hvm_exit_mmap(struct mm_struct *mm)
2258 {
2259 struct xen_hvm_pagetable_dying a;
2260 int rc;
2261
2262 a.domid = DOMID_SELF;
2263 a.gpa = __pa(mm->pgd);
2264 rc = HYPERVISOR_hvm_op(HVMOP_pagetable_dying, &a);
2265 WARN_ON_ONCE(rc < 0);
2266 }
2267
2268 static int is_pagetable_dying_supported(void)
2269 {
2270 struct xen_hvm_pagetable_dying a;
2271 int rc = 0;
2272
2273 a.domid = DOMID_SELF;
2274 a.gpa = 0x00;
2275 rc = HYPERVISOR_hvm_op(HVMOP_pagetable_dying, &a);
2276 if (rc < 0) {
2277 printk(KERN_DEBUG "HVMOP_pagetable_dying not supported\n");
2278 return 0;
2279 }
2280 return 1;
2281 }
2282
2283 void __init xen_hvm_init_mmu_ops(void)
2284 {
2285 if (is_pagetable_dying_supported())
2286 pv_mmu_ops.exit_mmap = xen_hvm_exit_mmap;
2287 }
2288 #endif
2289
2290 #define REMAP_BATCH_SIZE 16
2291
2292 struct remap_data {
2293 unsigned long mfn;
2294 pgprot_t prot;
2295 struct mmu_update *mmu_update;
2296 };
2297
2298 static int remap_area_mfn_pte_fn(pte_t *ptep, pgtable_t token,
2299 unsigned long addr, void *data)
2300 {
2301 struct remap_data *rmd = data;
2302 pte_t pte = pte_mkspecial(pfn_pte(rmd->mfn++, rmd->prot));
2303
2304 rmd->mmu_update->ptr = virt_to_machine(ptep).maddr;
2305 rmd->mmu_update->val = pte_val_ma(pte);
2306 rmd->mmu_update++;
2307
2308 return 0;
2309 }
2310
2311 int xen_remap_domain_mfn_range(struct vm_area_struct *vma,
2312 unsigned long addr,
2313 unsigned long mfn, int nr,
2314 pgprot_t prot, unsigned domid)
2315 {
2316 struct remap_data rmd;
2317 struct mmu_update mmu_update[REMAP_BATCH_SIZE];
2318 int batch;
2319 unsigned long range;
2320 int err = 0;
2321
2322 prot = __pgprot(pgprot_val(prot) | _PAGE_IOMAP);
2323
2324 BUG_ON(!((vma->vm_flags & (VM_PFNMAP | VM_RESERVED | VM_IO)) ==
2325 (VM_PFNMAP | VM_RESERVED | VM_IO)));
2326
2327 rmd.mfn = mfn;
2328 rmd.prot = prot;
2329
2330 while (nr) {
2331 batch = min(REMAP_BATCH_SIZE, nr);
2332 range = (unsigned long)batch << PAGE_SHIFT;
2333
2334 rmd.mmu_update = mmu_update;
2335 err = apply_to_page_range(vma->vm_mm, addr, range,
2336 remap_area_mfn_pte_fn, &rmd);
2337 if (err)
2338 goto out;
2339
2340 err = -EFAULT;
2341 if (HYPERVISOR_mmu_update(mmu_update, batch, NULL, domid) < 0)
2342 goto out;
2343
2344 nr -= batch;
2345 addr += range;
2346 }
2347
2348 err = 0;
2349 out:
2350
2351 flush_tlb_all();
2352
2353 return err;
2354 }
2355 EXPORT_SYMBOL_GPL(xen_remap_domain_mfn_range);
2356
2357 #ifdef CONFIG_XEN_DEBUG_FS
2358 static int p2m_dump_open(struct inode *inode, struct file *filp)
2359 {
2360 return single_open(filp, p2m_dump_show, NULL);
2361 }
2362
2363 static const struct file_operations p2m_dump_fops = {
2364 .open = p2m_dump_open,
2365 .read = seq_read,
2366 .llseek = seq_lseek,
2367 .release = single_release,
2368 };
2369 #endif /* CONFIG_XEN_DEBUG_FS */
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