projects / deliverable / linux.git / blob
? search:


4be29832e3dcd870452592b1467e2c7a1f095e48
[deliverable/linux.git] / arch / x86_64 / kernel / setup.c
1 /*
2 * linux/arch/x86-64/kernel/setup.c
3 *
4 * Copyright (C) 1995 Linus Torvalds
5 *
6 * Nov 2001 Dave Jones <davej@suse.de>
7 * Forked from i386 setup code.
8 */
9
10 /*
11 * This file handles the architecture-dependent parts of initialization
12 */
13
14 #include <linux/errno.h>
15 #include <linux/sched.h>
16 #include <linux/kernel.h>
17 #include <linux/mm.h>
18 #include <linux/stddef.h>
19 #include <linux/unistd.h>
20 #include <linux/ptrace.h>
21 #include <linux/slab.h>
22 #include <linux/user.h>
23 #include <linux/a.out.h>
24 #include <linux/screen_info.h>
25 #include <linux/ioport.h>
26 #include <linux/delay.h>
27 #include <linux/init.h>
28 #include <linux/initrd.h>
29 #include <linux/highmem.h>
30 #include <linux/bootmem.h>
31 #include <linux/module.h>
32 #include <asm/processor.h>
33 #include <linux/console.h>
34 #include <linux/seq_file.h>
35 #include <linux/crash_dump.h>
36 #include <linux/root_dev.h>
37 #include <linux/pci.h>
38 #include <linux/acpi.h>
39 #include <linux/kallsyms.h>
40 #include <linux/edd.h>
41 #include <linux/mmzone.h>
42 #include <linux/kexec.h>
43 #include <linux/cpufreq.h>
44 #include <linux/dmi.h>
45 #include <linux/dma-mapping.h>
46 #include <linux/ctype.h>
47
48 #include <asm/mtrr.h>
49 #include <asm/uaccess.h>
50 #include <asm/system.h>
51 #include <asm/io.h>
52 #include <asm/smp.h>
53 #include <asm/msr.h>
54 #include <asm/desc.h>
55 #include <video/edid.h>
56 #include <asm/e820.h>
57 #include <asm/dma.h>
58 #include <asm/mpspec.h>
59 #include <asm/mmu_context.h>
60 #include <asm/bootsetup.h>
61 #include <asm/proto.h>
62 #include <asm/setup.h>
63 #include <asm/mach_apic.h>
64 #include <asm/numa.h>
65 #include <asm/sections.h>
66 #include <asm/dmi.h>
67
68 /*
69 * Machine setup..
70 */
71
72 struct cpuinfo_x86 boot_cpu_data __read_mostly;
73 EXPORT_SYMBOL(boot_cpu_data);
74
75 unsigned long mmu_cr4_features;
76
77 /* Boot loader ID as an integer, for the benefit of proc_dointvec */
78 int bootloader_type;
79
80 unsigned long saved_video_mode;
81
82 /*
83 * Early DMI memory
84 */
85 int dmi_alloc_index;
86 char dmi_alloc_data[DMI_MAX_DATA];
87
88 /*
89 * Setup options
90 */
91 struct screen_info screen_info;
92 EXPORT_SYMBOL(screen_info);
93 struct sys_desc_table_struct {
94 unsigned short length;
95 unsigned char table[0];
96 };
97
98 struct edid_info edid_info;
99 EXPORT_SYMBOL_GPL(edid_info);
100
101 extern int root_mountflags;
102
103 char command_line[COMMAND_LINE_SIZE];
104
105 struct resource standard_io_resources[] = {
106 { .name = "dma1", .start = 0x00, .end = 0x1f,
107 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
108 { .name = "pic1", .start = 0x20, .end = 0x21,
109 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
110 { .name = "timer0", .start = 0x40, .end = 0x43,
111 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
112 { .name = "timer1", .start = 0x50, .end = 0x53,
113 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
114 { .name = "keyboard", .start = 0x60, .end = 0x6f,
115 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
116 { .name = "dma page reg", .start = 0x80, .end = 0x8f,
117 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
118 { .name = "pic2", .start = 0xa0, .end = 0xa1,
119 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
120 { .name = "dma2", .start = 0xc0, .end = 0xdf,
121 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
122 { .name = "fpu", .start = 0xf0, .end = 0xff,
123 .flags = IORESOURCE_BUSY | IORESOURCE_IO }
124 };
125
126 #define STANDARD_IO_RESOURCES \
127 (sizeof standard_io_resources / sizeof standard_io_resources[0])
128
129 #define IORESOURCE_RAM (IORESOURCE_BUSY | IORESOURCE_MEM)
130
131 struct resource data_resource = {
132 .name = "Kernel data",
133 .start = 0,
134 .end = 0,
135 .flags = IORESOURCE_RAM,
136 };
137 struct resource code_resource = {
138 .name = "Kernel code",
139 .start = 0,
140 .end = 0,
141 .flags = IORESOURCE_RAM,
142 };
143
144 #define IORESOURCE_ROM (IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM)
145
146 static struct resource system_rom_resource = {
147 .name = "System ROM",
148 .start = 0xf0000,
149 .end = 0xfffff,
150 .flags = IORESOURCE_ROM,
151 };
152
153 static struct resource extension_rom_resource = {
154 .name = "Extension ROM",
155 .start = 0xe0000,
156 .end = 0xeffff,
157 .flags = IORESOURCE_ROM,
158 };
159
160 static struct resource adapter_rom_resources[] = {
161 { .name = "Adapter ROM", .start = 0xc8000, .end = 0,
162 .flags = IORESOURCE_ROM },
163 { .name = "Adapter ROM", .start = 0, .end = 0,
164 .flags = IORESOURCE_ROM },
165 { .name = "Adapter ROM", .start = 0, .end = 0,
166 .flags = IORESOURCE_ROM },
167 { .name = "Adapter ROM", .start = 0, .end = 0,
168 .flags = IORESOURCE_ROM },
169 { .name = "Adapter ROM", .start = 0, .end = 0,
170 .flags = IORESOURCE_ROM },
171 { .name = "Adapter ROM", .start = 0, .end = 0,
172 .flags = IORESOURCE_ROM }
173 };
174
175 #define ADAPTER_ROM_RESOURCES \
176 (sizeof adapter_rom_resources / sizeof adapter_rom_resources[0])
177
178 static struct resource video_rom_resource = {
179 .name = "Video ROM",
180 .start = 0xc0000,
181 .end = 0xc7fff,
182 .flags = IORESOURCE_ROM,
183 };
184
185 static struct resource video_ram_resource = {
186 .name = "Video RAM area",
187 .start = 0xa0000,
188 .end = 0xbffff,
189 .flags = IORESOURCE_RAM,
190 };
191
192 #define romsignature(x) (*(unsigned short *)(x) == 0xaa55)
193
194 static int __init romchecksum(unsigned char *rom, unsigned long length)
195 {
196 unsigned char *p, sum = 0;
197
198 for (p = rom; p < rom + length; p++)
199 sum += *p;
200 return sum == 0;
201 }
202
203 static void __init probe_roms(void)
204 {
205 unsigned long start, length, upper;
206 unsigned char *rom;
207 int i;
208
209 /* video rom */
210 upper = adapter_rom_resources[0].start;
211 for (start = video_rom_resource.start; start < upper; start += 2048) {
212 rom = isa_bus_to_virt(start);
213 if (!romsignature(rom))
214 continue;
215
216 video_rom_resource.start = start;
217
218 /* 0 < length <= 0x7f * 512, historically */
219 length = rom[2] * 512;
220
221 /* if checksum okay, trust length byte */
222 if (length && romchecksum(rom, length))
223 video_rom_resource.end = start + length - 1;
224
225 request_resource(&iomem_resource, &video_rom_resource);
226 break;
227 }
228
229 start = (video_rom_resource.end + 1 + 2047) & ~2047UL;
230 if (start < upper)
231 start = upper;
232
233 /* system rom */
234 request_resource(&iomem_resource, &system_rom_resource);
235 upper = system_rom_resource.start;
236
237 /* check for extension rom (ignore length byte!) */
238 rom = isa_bus_to_virt(extension_rom_resource.start);
239 if (romsignature(rom)) {
240 length = extension_rom_resource.end - extension_rom_resource.start + 1;
241 if (romchecksum(rom, length)) {
242 request_resource(&iomem_resource, &extension_rom_resource);
243 upper = extension_rom_resource.start;
244 }
245 }
246
247 /* check for adapter roms on 2k boundaries */
248 for (i = 0; i < ADAPTER_ROM_RESOURCES && start < upper; start += 2048) {
249 rom = isa_bus_to_virt(start);
250 if (!romsignature(rom))
251 continue;
252
253 /* 0 < length <= 0x7f * 512, historically */
254 length = rom[2] * 512;
255
256 /* but accept any length that fits if checksum okay */
257 if (!length || start + length > upper || !romchecksum(rom, length))
258 continue;
259
260 adapter_rom_resources[i].start = start;
261 adapter_rom_resources[i].end = start + length - 1;
262 request_resource(&iomem_resource, &adapter_rom_resources[i]);
263
264 start = adapter_rom_resources[i++].end & ~2047UL;
265 }
266 }
267
268 #ifdef CONFIG_PROC_VMCORE
269 /* elfcorehdr= specifies the location of elf core header
270 * stored by the crashed kernel. This option will be passed
271 * by kexec loader to the capture kernel.
272 */
273 static int __init setup_elfcorehdr(char *arg)
274 {
275 char *end;
276 if (!arg)
277 return -EINVAL;
278 elfcorehdr_addr = memparse(arg, &end);
279 return end > arg ? 0 : -EINVAL;
280 }
281 early_param("elfcorehdr", setup_elfcorehdr);
282 #endif
283
284 #ifndef CONFIG_NUMA
285 static void __init
286 contig_initmem_init(unsigned long start_pfn, unsigned long end_pfn)
287 {
288 unsigned long bootmap_size, bootmap;
289
290 bootmap_size = bootmem_bootmap_pages(end_pfn)<<PAGE_SHIFT;
291 bootmap = find_e820_area(0, end_pfn<<PAGE_SHIFT, bootmap_size);
292 if (bootmap == -1L)
293 panic("Cannot find bootmem map of size %ld\n",bootmap_size);
294 bootmap_size = init_bootmem(bootmap >> PAGE_SHIFT, end_pfn);
295 e820_bootmem_free(NODE_DATA(0), 0, end_pfn << PAGE_SHIFT);
296 reserve_bootmem(bootmap, bootmap_size);
297 }
298 #endif
299
300 #if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE)
301 struct edd edd;
302 #ifdef CONFIG_EDD_MODULE
303 EXPORT_SYMBOL(edd);
304 #endif
305 /**
306 * copy_edd() - Copy the BIOS EDD information
307 * from boot_params into a safe place.
308 *
309 */
310 static inline void copy_edd(void)
311 {
312 memcpy(edd.mbr_signature, EDD_MBR_SIGNATURE, sizeof(edd.mbr_signature));
313 memcpy(edd.edd_info, EDD_BUF, sizeof(edd.edd_info));
314 edd.mbr_signature_nr = EDD_MBR_SIG_NR;
315 edd.edd_info_nr = EDD_NR;
316 }
317 #else
318 static inline void copy_edd(void)
319 {
320 }
321 #endif
322
323 #define EBDA_ADDR_POINTER 0x40E
324
325 unsigned __initdata ebda_addr;
326 unsigned __initdata ebda_size;
327
328 static void discover_ebda(void)
329 {
330 /*
331 * there is a real-mode segmented pointer pointing to the
332 * 4K EBDA area at 0x40E
333 */
334 ebda_addr = *(unsigned short *)EBDA_ADDR_POINTER;
335 ebda_addr <<= 4;
336
337 ebda_size = *(unsigned short *)(unsigned long)ebda_addr;
338
339 /* Round EBDA up to pages */
340 if (ebda_size == 0)
341 ebda_size = 1;
342 ebda_size <<= 10;
343 ebda_size = round_up(ebda_size + (ebda_addr & ~PAGE_MASK), PAGE_SIZE);
344 if (ebda_size > 64*1024)
345 ebda_size = 64*1024;
346 }
347
348 void __init setup_arch(char **cmdline_p)
349 {
350 printk(KERN_INFO "Command line: %s\n", saved_command_line);
351
352 ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
353 screen_info = SCREEN_INFO;
354 edid_info = EDID_INFO;
355 saved_video_mode = SAVED_VIDEO_MODE;
356 bootloader_type = LOADER_TYPE;
357
358 #ifdef CONFIG_BLK_DEV_RAM
359 rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK;
360 rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0);
361 rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0);
362 #endif
363 setup_memory_region();
364 copy_edd();
365
366 if (!MOUNT_ROOT_RDONLY)
367 root_mountflags &= ~MS_RDONLY;
368 init_mm.start_code = (unsigned long) &_text;
369 init_mm.end_code = (unsigned long) &_etext;
370 init_mm.end_data = (unsigned long) &_edata;
371 init_mm.brk = (unsigned long) &_end;
372
373 code_resource.start = virt_to_phys(&_text);
374 code_resource.end = virt_to_phys(&_etext)-1;
375 data_resource.start = virt_to_phys(&_etext);
376 data_resource.end = virt_to_phys(&_edata)-1;
377
378 early_identify_cpu(&boot_cpu_data);
379
380 strlcpy(command_line, saved_command_line, COMMAND_LINE_SIZE);
381 *cmdline_p = command_line;
382
383 parse_early_param();
384
385 finish_e820_parsing();
386
387 /*
388 * partially used pages are not usable - thus
389 * we are rounding upwards:
390 */
391 end_pfn = e820_end_of_ram();
392 num_physpages = end_pfn;
393
394 check_efer();
395
396 discover_ebda();
397
398 init_memory_mapping(0, (end_pfn_map << PAGE_SHIFT));
399
400 dmi_scan_machine();
401
402 zap_low_mappings(0);
403
404 #ifdef CONFIG_ACPI
405 /*
406 * Initialize the ACPI boot-time table parser (gets the RSDP and SDT).
407 * Call this early for SRAT node setup.
408 */
409 acpi_boot_table_init();
410 #endif
411
412 /* How many end-of-memory variables you have, grandma! */
413 max_low_pfn = end_pfn;
414 max_pfn = end_pfn;
415 high_memory = (void *)__va(end_pfn * PAGE_SIZE - 1) + 1;
416
417 #ifdef CONFIG_ACPI_NUMA
418 /*
419 * Parse SRAT to discover nodes.
420 */
421 acpi_numa_init();
422 #endif
423
424 #ifdef CONFIG_NUMA
425 numa_initmem_init(0, end_pfn);
426 #else
427 contig_initmem_init(0, end_pfn);
428 #endif
429
430 /* Reserve direct mapping */
431 reserve_bootmem_generic(table_start << PAGE_SHIFT,
432 (table_end - table_start) << PAGE_SHIFT);
433
434 /* reserve kernel */
435 reserve_bootmem_generic(__pa_symbol(&_text),
436 __pa_symbol(&_end) - __pa_symbol(&_text));
437
438 /*
439 * reserve physical page 0 - it's a special BIOS page on many boxes,
440 * enabling clean reboots, SMP operation, laptop functions.
441 */
442 reserve_bootmem_generic(0, PAGE_SIZE);
443
444 /* reserve ebda region */
445 if (ebda_addr)
446 reserve_bootmem_generic(ebda_addr, ebda_size);
447
448 #ifdef CONFIG_SMP
449 /*
450 * But first pinch a few for the stack/trampoline stuff
451 * FIXME: Don't need the extra page at 4K, but need to fix
452 * trampoline before removing it. (see the GDT stuff)
453 */
454 reserve_bootmem_generic(PAGE_SIZE, PAGE_SIZE);
455
456 /* Reserve SMP trampoline */
457 reserve_bootmem_generic(SMP_TRAMPOLINE_BASE, PAGE_SIZE);
458 #endif
459
460 #ifdef CONFIG_ACPI_SLEEP
461 /*
462 * Reserve low memory region for sleep support.
463 */
464 acpi_reserve_bootmem();
465 #endif
466 /*
467 * Find and reserve possible boot-time SMP configuration:
468 */
469 find_smp_config();
470 #ifdef CONFIG_BLK_DEV_INITRD
471 if (LOADER_TYPE && INITRD_START) {
472 if (INITRD_START + INITRD_SIZE <= (end_pfn << PAGE_SHIFT)) {
473 reserve_bootmem_generic(INITRD_START, INITRD_SIZE);
474 initrd_start =
475 INITRD_START ? INITRD_START + PAGE_OFFSET : 0;
476 initrd_end = initrd_start+INITRD_SIZE;
477 }
478 else {
479 printk(KERN_ERR "initrd extends beyond end of memory "
480 "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
481 (unsigned long)(INITRD_START + INITRD_SIZE),
482 (unsigned long)(end_pfn << PAGE_SHIFT));
483 initrd_start = 0;
484 }
485 }
486 #endif
487 #ifdef CONFIG_KEXEC
488 if (crashk_res.start != crashk_res.end) {
489 reserve_bootmem_generic(crashk_res.start,
490 crashk_res.end - crashk_res.start + 1);
491 }
492 #endif
493
494 paging_init();
495
496 early_quirks();
497
498 /*
499 * set this early, so we dont allocate cpu0
500 * if MADT list doesnt list BSP first
501 * mpparse.c/MP_processor_info() allocates logical cpu numbers.
502 */
503 cpu_set(0, cpu_present_map);
504 #ifdef CONFIG_ACPI
505 /*
506 * Read APIC and some other early information from ACPI tables.
507 */
508 acpi_boot_init();
509 #endif
510
511 init_cpu_to_node();
512
513 /*
514 * get boot-time SMP configuration:
515 */
516 if (smp_found_config)
517 get_smp_config();
518 init_apic_mappings();
519
520 /*
521 * Request address space for all standard RAM and ROM resources
522 * and also for regions reported as reserved by the e820.
523 */
524 probe_roms();
525 e820_reserve_resources();
526
527 request_resource(&iomem_resource, &video_ram_resource);
528
529 {
530 unsigned i;
531 /* request I/O space for devices used on all i[345]86 PCs */
532 for (i = 0; i < STANDARD_IO_RESOURCES; i++)
533 request_resource(&ioport_resource, &standard_io_resources[i]);
534 }
535
536 e820_setup_gap();
537
538 #ifdef CONFIG_VT
539 #if defined(CONFIG_VGA_CONSOLE)
540 conswitchp = &vga_con;
541 #elif defined(CONFIG_DUMMY_CONSOLE)
542 conswitchp = &dummy_con;
543 #endif
544 #endif
545 }
546
547 static int __cpuinit get_model_name(struct cpuinfo_x86 *c)
548 {
549 unsigned int *v;
550
551 if (c->extended_cpuid_level < 0x80000004)
552 return 0;
553
554 v = (unsigned int *) c->x86_model_id;
555 cpuid(0x80000002, &v[0], &v[1], &v[2], &v[3]);
556 cpuid(0x80000003, &v[4], &v[5], &v[6], &v[7]);
557 cpuid(0x80000004, &v[8], &v[9], &v[10], &v[11]);
558 c->x86_model_id[48] = 0;
559 return 1;
560 }
561
562
563 static void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c)
564 {
565 unsigned int n, dummy, eax, ebx, ecx, edx;
566
567 n = c->extended_cpuid_level;
568
569 if (n >= 0x80000005) {
570 cpuid(0x80000005, &dummy, &ebx, &ecx, &edx);
571 printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n",
572 edx>>24, edx&0xFF, ecx>>24, ecx&0xFF);
573 c->x86_cache_size=(ecx>>24)+(edx>>24);
574 /* On K8 L1 TLB is inclusive, so don't count it */
575 c->x86_tlbsize = 0;
576 }
577
578 if (n >= 0x80000006) {
579 cpuid(0x80000006, &dummy, &ebx, &ecx, &edx);
580 ecx = cpuid_ecx(0x80000006);
581 c->x86_cache_size = ecx >> 16;
582 c->x86_tlbsize += ((ebx >> 16) & 0xfff) + (ebx & 0xfff);
583
584 printk(KERN_INFO "CPU: L2 Cache: %dK (%d bytes/line)\n",
585 c->x86_cache_size, ecx & 0xFF);
586 }
587
588 if (n >= 0x80000007)
589 cpuid(0x80000007, &dummy, &dummy, &dummy, &c->x86_power);
590 if (n >= 0x80000008) {
591 cpuid(0x80000008, &eax, &dummy, &dummy, &dummy);
592 c->x86_virt_bits = (eax >> 8) & 0xff;
593 c->x86_phys_bits = eax & 0xff;
594 }
595 }
596
597 #ifdef CONFIG_NUMA
598 static int nearby_node(int apicid)
599 {
600 int i;
601 for (i = apicid - 1; i >= 0; i--) {
602 int node = apicid_to_node[i];
603 if (node != NUMA_NO_NODE && node_online(node))
604 return node;
605 }
606 for (i = apicid + 1; i < MAX_LOCAL_APIC; i++) {
607 int node = apicid_to_node[i];
608 if (node != NUMA_NO_NODE && node_online(node))
609 return node;
610 }
611 return first_node(node_online_map); /* Shouldn't happen */
612 }
613 #endif
614
615 /*
616 * On a AMD dual core setup the lower bits of the APIC id distingush the cores.
617 * Assumes number of cores is a power of two.
618 */
619 static void __init amd_detect_cmp(struct cpuinfo_x86 *c)
620 {
621 #ifdef CONFIG_SMP
622 unsigned bits;
623 #ifdef CONFIG_NUMA
624 int cpu = smp_processor_id();
625 int node = 0;
626 unsigned apicid = hard_smp_processor_id();
627 #endif
628 unsigned ecx = cpuid_ecx(0x80000008);
629
630 c->x86_max_cores = (ecx & 0xff) + 1;
631
632 /* CPU telling us the core id bits shift? */
633 bits = (ecx >> 12) & 0xF;
634
635 /* Otherwise recompute */
636 if (bits == 0) {
637 while ((1 << bits) < c->x86_max_cores)
638 bits++;
639 }
640
641 /* Low order bits define the core id (index of core in socket) */
642 c->cpu_core_id = c->phys_proc_id & ((1 << bits)-1);
643 /* Convert the APIC ID into the socket ID */
644 c->phys_proc_id = phys_pkg_id(bits);
645
646 #ifdef CONFIG_NUMA
647 node = c->phys_proc_id;
648 if (apicid_to_node[apicid] != NUMA_NO_NODE)
649 node = apicid_to_node[apicid];
650 if (!node_online(node)) {
651 /* Two possibilities here:
652 - The CPU is missing memory and no node was created.
653 In that case try picking one from a nearby CPU
654 - The APIC IDs differ from the HyperTransport node IDs
655 which the K8 northbridge parsing fills in.
656 Assume they are all increased by a constant offset,
657 but in the same order as the HT nodeids.
658 If that doesn't result in a usable node fall back to the
659 path for the previous case. */
660 int ht_nodeid = apicid - (cpu_data[0].phys_proc_id << bits);
661 if (ht_nodeid >= 0 &&
662 apicid_to_node[ht_nodeid] != NUMA_NO_NODE)
663 node = apicid_to_node[ht_nodeid];
664 /* Pick a nearby node */
665 if (!node_online(node))
666 node = nearby_node(apicid);
667 }
668 numa_set_node(cpu, node);
669
670 printk(KERN_INFO "CPU %d/%x -> Node %d\n", cpu, apicid, node);
671 #endif
672 #endif
673 }
674
675 static void __init init_amd(struct cpuinfo_x86 *c)
676 {
677 unsigned level;
678
679 #ifdef CONFIG_SMP
680 unsigned long value;
681
682 /*
683 * Disable TLB flush filter by setting HWCR.FFDIS on K8
684 * bit 6 of msr C001_0015
685 *
686 * Errata 63 for SH-B3 steppings
687 * Errata 122 for all steppings (F+ have it disabled by default)
688 */
689 if (c->x86 == 15) {
690 rdmsrl(MSR_K8_HWCR, value);
691 value |= 1 << 6;
692 wrmsrl(MSR_K8_HWCR, value);
693 }
694 #endif
695
696 /* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
697 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
698 clear_bit(0*32+31, &c->x86_capability);
699
700 /* On C+ stepping K8 rep microcode works well for copy/memset */
701 level = cpuid_eax(1);
702 if (c->x86 == 15 && ((level >= 0x0f48 && level < 0x0f50) || level >= 0x0f58))
703 set_bit(X86_FEATURE_REP_GOOD, &c->x86_capability);
704
705 /* Enable workaround for FXSAVE leak */
706 if (c->x86 >= 6)
707 set_bit(X86_FEATURE_FXSAVE_LEAK, &c->x86_capability);
708
709 level = get_model_name(c);
710 if (!level) {
711 switch (c->x86) {
712 case 15:
713 /* Should distinguish Models here, but this is only
714 a fallback anyways. */
715 strcpy(c->x86_model_id, "Hammer");
716 break;
717 }
718 }
719 display_cacheinfo(c);
720
721 /* c->x86_power is 8000_0007 edx. Bit 8 is constant TSC */
722 if (c->x86_power & (1<<8))
723 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
724
725 /* Multi core CPU? */
726 if (c->extended_cpuid_level >= 0x80000008)
727 amd_detect_cmp(c);
728
729 /* Fix cpuid4 emulation for more */
730 num_cache_leaves = 3;
731 }
732
733 static void __cpuinit detect_ht(struct cpuinfo_x86 *c)
734 {
735 #ifdef CONFIG_SMP
736 u32 eax, ebx, ecx, edx;
737 int index_msb, core_bits;
738
739 cpuid(1, &eax, &ebx, &ecx, &edx);
740
741
742 if (!cpu_has(c, X86_FEATURE_HT))
743 return;
744 if (cpu_has(c, X86_FEATURE_CMP_LEGACY))
745 goto out;
746
747 smp_num_siblings = (ebx & 0xff0000) >> 16;
748
749 if (smp_num_siblings == 1) {
750 printk(KERN_INFO "CPU: Hyper-Threading is disabled\n");
751 } else if (smp_num_siblings > 1 ) {
752
753 if (smp_num_siblings > NR_CPUS) {
754 printk(KERN_WARNING "CPU: Unsupported number of the siblings %d", smp_num_siblings);
755 smp_num_siblings = 1;
756 return;
757 }
758
759 index_msb = get_count_order(smp_num_siblings);
760 c->phys_proc_id = phys_pkg_id(index_msb);
761
762 smp_num_siblings = smp_num_siblings / c->x86_max_cores;
763
764 index_msb = get_count_order(smp_num_siblings) ;
765
766 core_bits = get_count_order(c->x86_max_cores);
767
768 c->cpu_core_id = phys_pkg_id(index_msb) &
769 ((1 << core_bits) - 1);
770 }
771 out:
772 if ((c->x86_max_cores * smp_num_siblings) > 1) {
773 printk(KERN_INFO "CPU: Physical Processor ID: %d\n", c->phys_proc_id);
774 printk(KERN_INFO "CPU: Processor Core ID: %d\n", c->cpu_core_id);
775 }
776
777 #endif
778 }
779
780 /*
781 * find out the number of processor cores on the die
782 */
783 static int __cpuinit intel_num_cpu_cores(struct cpuinfo_x86 *c)
784 {
785 unsigned int eax, t;
786
787 if (c->cpuid_level < 4)
788 return 1;
789
790 cpuid_count(4, 0, &eax, &t, &t, &t);
791
792 if (eax & 0x1f)
793 return ((eax >> 26) + 1);
794 else
795 return 1;
796 }
797
798 static void srat_detect_node(void)
799 {
800 #ifdef CONFIG_NUMA
801 unsigned node;
802 int cpu = smp_processor_id();
803 int apicid = hard_smp_processor_id();
804
805 /* Don't do the funky fallback heuristics the AMD version employs
806 for now. */
807 node = apicid_to_node[apicid];
808 if (node == NUMA_NO_NODE)
809 node = first_node(node_online_map);
810 numa_set_node(cpu, node);
811
812 printk(KERN_INFO "CPU %d/%x -> Node %d\n", cpu, apicid, node);
813 #endif
814 }
815
816 static void __cpuinit init_intel(struct cpuinfo_x86 *c)
817 {
818 /* Cache sizes */
819 unsigned n;
820
821 init_intel_cacheinfo(c);
822 if (c->cpuid_level > 9 ) {
823 unsigned eax = cpuid_eax(10);
824 /* Check for version and the number of counters */
825 if ((eax & 0xff) && (((eax>>8) & 0xff) > 1))
826 set_bit(X86_FEATURE_ARCH_PERFMON, &c->x86_capability);
827 }
828
829 n = c->extended_cpuid_level;
830 if (n >= 0x80000008) {
831 unsigned eax = cpuid_eax(0x80000008);
832 c->x86_virt_bits = (eax >> 8) & 0xff;
833 c->x86_phys_bits = eax & 0xff;
834 /* CPUID workaround for Intel 0F34 CPU */
835 if (c->x86_vendor == X86_VENDOR_INTEL &&
836 c->x86 == 0xF && c->x86_model == 0x3 &&
837 c->x86_mask == 0x4)
838 c->x86_phys_bits = 36;
839 }
840
841 if (c->x86 == 15)
842 c->x86_cache_alignment = c->x86_clflush_size * 2;
843 if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
844 (c->x86 == 0x6 && c->x86_model >= 0x0e))
845 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
846 set_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability);
847 c->x86_max_cores = intel_num_cpu_cores(c);
848
849 srat_detect_node();
850 }
851
852 static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c)
853 {
854 char *v = c->x86_vendor_id;
855
856 if (!strcmp(v, "AuthenticAMD"))
857 c->x86_vendor = X86_VENDOR_AMD;
858 else if (!strcmp(v, "GenuineIntel"))
859 c->x86_vendor = X86_VENDOR_INTEL;
860 else
861 c->x86_vendor = X86_VENDOR_UNKNOWN;
862 }
863
864 struct cpu_model_info {
865 int vendor;
866 int family;
867 char *model_names[16];
868 };
869
870 /* Do some early cpuid on the boot CPU to get some parameter that are
871 needed before check_bugs. Everything advanced is in identify_cpu
872 below. */
873 void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
874 {
875 u32 tfms;
876
877 c->loops_per_jiffy = loops_per_jiffy;
878 c->x86_cache_size = -1;
879 c->x86_vendor = X86_VENDOR_UNKNOWN;
880 c->x86_model = c->x86_mask = 0; /* So far unknown... */
881 c->x86_vendor_id[0] = '\0'; /* Unset */
882 c->x86_model_id[0] = '\0'; /* Unset */
883 c->x86_clflush_size = 64;
884 c->x86_cache_alignment = c->x86_clflush_size;
885 c->x86_max_cores = 1;
886 c->extended_cpuid_level = 0;
887 memset(&c->x86_capability, 0, sizeof c->x86_capability);
888
889 /* Get vendor name */
890 cpuid(0x00000000, (unsigned int *)&c->cpuid_level,
891 (unsigned int *)&c->x86_vendor_id[0],
892 (unsigned int *)&c->x86_vendor_id[8],
893 (unsigned int *)&c->x86_vendor_id[4]);
894
895 get_cpu_vendor(c);
896
897 /* Initialize the standard set of capabilities */
898 /* Note that the vendor-specific code below might override */
899
900 /* Intel-defined flags: level 0x00000001 */
901 if (c->cpuid_level >= 0x00000001) {
902 __u32 misc;
903 cpuid(0x00000001, &tfms, &misc, &c->x86_capability[4],
904 &c->x86_capability[0]);
905 c->x86 = (tfms >> 8) & 0xf;
906 c->x86_model = (tfms >> 4) & 0xf;
907 c->x86_mask = tfms & 0xf;
908 if (c->x86 == 0xf)
909 c->x86 += (tfms >> 20) & 0xff;
910 if (c->x86 >= 0x6)
911 c->x86_model += ((tfms >> 16) & 0xF) << 4;
912 if (c->x86_capability[0] & (1<<19))
913 c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;
914 } else {
915 /* Have CPUID level 0 only - unheard of */
916 c->x86 = 4;
917 }
918
919 #ifdef CONFIG_SMP
920 c->phys_proc_id = (cpuid_ebx(1) >> 24) & 0xff;
921 #endif
922 }
923
924 /*
925 * This does the hard work of actually picking apart the CPU stuff...
926 */
927 void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
928 {
929 int i;
930 u32 xlvl;
931
932 early_identify_cpu(c);
933
934 /* AMD-defined flags: level 0x80000001 */
935 xlvl = cpuid_eax(0x80000000);
936 c->extended_cpuid_level = xlvl;
937 if ((xlvl & 0xffff0000) == 0x80000000) {
938 if (xlvl >= 0x80000001) {
939 c->x86_capability[1] = cpuid_edx(0x80000001);
940 c->x86_capability[6] = cpuid_ecx(0x80000001);
941 }
942 if (xlvl >= 0x80000004)
943 get_model_name(c); /* Default name */
944 }
945
946 /* Transmeta-defined flags: level 0x80860001 */
947 xlvl = cpuid_eax(0x80860000);
948 if ((xlvl & 0xffff0000) == 0x80860000) {
949 /* Don't set x86_cpuid_level here for now to not confuse. */
950 if (xlvl >= 0x80860001)
951 c->x86_capability[2] = cpuid_edx(0x80860001);
952 }
953
954 c->apicid = phys_pkg_id(0);
955
956 /*
957 * Vendor-specific initialization. In this section we
958 * canonicalize the feature flags, meaning if there are
959 * features a certain CPU supports which CPUID doesn't
960 * tell us, CPUID claiming incorrect flags, or other bugs,
961 * we handle them here.
962 *
963 * At the end of this section, c->x86_capability better
964 * indicate the features this CPU genuinely supports!
965 */
966 switch (c->x86_vendor) {
967 case X86_VENDOR_AMD:
968 init_amd(c);
969 break;
970
971 case X86_VENDOR_INTEL:
972 init_intel(c);
973 break;
974
975 case X86_VENDOR_UNKNOWN:
976 default:
977 display_cacheinfo(c);
978 break;
979 }
980
981 select_idle_routine(c);
982 detect_ht(c);
983
984 /*
985 * On SMP, boot_cpu_data holds the common feature set between
986 * all CPUs; so make sure that we indicate which features are
987 * common between the CPUs. The first time this routine gets
988 * executed, c == &boot_cpu_data.
989 */
990 if (c != &boot_cpu_data) {
991 /* AND the already accumulated flags with these */
992 for (i = 0 ; i < NCAPINTS ; i++)
993 boot_cpu_data.x86_capability[i] &= c->x86_capability[i];
994 }
995
996 #ifdef CONFIG_X86_MCE
997 mcheck_init(c);
998 #endif
999 if (c == &boot_cpu_data)
1000 mtrr_bp_init();
1001 else
1002 mtrr_ap_init();
1003 #ifdef CONFIG_NUMA
1004 numa_add_cpu(smp_processor_id());
1005 #endif
1006 }
1007
1008
1009 void __cpuinit print_cpu_info(struct cpuinfo_x86 *c)
1010 {
1011 if (c->x86_model_id[0])
1012 printk("%s", c->x86_model_id);
1013
1014 if (c->x86_mask || c->cpuid_level >= 0)
1015 printk(" stepping %02x\n", c->x86_mask);
1016 else
1017 printk("\n");
1018 }
1019
1020 /*
1021 * Get CPU information for use by the procfs.
1022 */
1023
1024 static int show_cpuinfo(struct seq_file *m, void *v)
1025 {
1026 struct cpuinfo_x86 *c = v;
1027
1028 /*
1029 * These flag bits must match the definitions in <asm/cpufeature.h>.
1030 * NULL means this bit is undefined or reserved; either way it doesn't
1031 * have meaning as far as Linux is concerned. Note that it's important
1032 * to realize there is a difference between this table and CPUID -- if
1033 * applications want to get the raw CPUID data, they should access
1034 * /dev/cpu/<cpu_nr>/cpuid instead.
1035 */
1036 static char *x86_cap_flags[] = {
1037 /* Intel-defined */
1038 "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
1039 "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
1040 "pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx",
1041 "fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", NULL,
1042
1043 /* AMD-defined */
1044 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1045 NULL, NULL, NULL, "syscall", NULL, NULL, NULL, NULL,
1046 NULL, NULL, NULL, NULL, "nx", NULL, "mmxext", NULL,
1047 NULL, "fxsr_opt", NULL, "rdtscp", NULL, "lm", "3dnowext", "3dnow",
1048
1049 /* Transmeta-defined */
1050 "recovery", "longrun", NULL, "lrti", NULL, NULL, NULL, NULL,
1051 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1052 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1053 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1054
1055 /* Other (Linux-defined) */
1056 "cxmmx", NULL, "cyrix_arr", "centaur_mcr", NULL,
1057 "constant_tsc", NULL, NULL,
1058 "up", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1059 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1060 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1061
1062 /* Intel-defined (#2) */
1063 "pni", NULL, NULL, "monitor", "ds_cpl", "vmx", "smx", "est",
1064 "tm2", NULL, "cid", NULL, NULL, "cx16", "xtpr", NULL,
1065 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1066 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1067
1068 /* VIA/Cyrix/Centaur-defined */
1069 NULL, NULL, "rng", "rng_en", NULL, NULL, "ace", "ace_en",
1070 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1071 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1072 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1073
1074 /* AMD-defined (#2) */
1075 "lahf_lm", "cmp_legacy", "svm", NULL, "cr8_legacy", NULL, NULL, NULL,
1076 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1077 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1078 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1079 };
1080 static char *x86_power_flags[] = {
1081 "ts", /* temperature sensor */
1082 "fid", /* frequency id control */
1083 "vid", /* voltage id control */
1084 "ttp", /* thermal trip */
1085 "tm",
1086 "stc",
1087 NULL,
1088 /* nothing */ /* constant_tsc - moved to flags */
1089 };
1090
1091
1092 #ifdef CONFIG_SMP
1093 if (!cpu_online(c-cpu_data))
1094 return 0;
1095 #endif
1096
1097 seq_printf(m,"processor\t: %u\n"
1098 "vendor_id\t: %s\n"
1099 "cpu family\t: %d\n"
1100 "model\t\t: %d\n"
1101 "model name\t: %s\n",
1102 (unsigned)(c-cpu_data),
1103 c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",
1104 c->x86,
1105 (int)c->x86_model,
1106 c->x86_model_id[0] ? c->x86_model_id : "unknown");
1107
1108 if (c->x86_mask || c->cpuid_level >= 0)
1109 seq_printf(m, "stepping\t: %d\n", c->x86_mask);
1110 else
1111 seq_printf(m, "stepping\t: unknown\n");
1112
1113 if (cpu_has(c,X86_FEATURE_TSC)) {
1114 unsigned int freq = cpufreq_quick_get((unsigned)(c-cpu_data));
1115 if (!freq)
1116 freq = cpu_khz;
1117 seq_printf(m, "cpu MHz\t\t: %u.%03u\n",
1118 freq / 1000, (freq % 1000));
1119 }
1120
1121 /* Cache size */
1122 if (c->x86_cache_size >= 0)
1123 seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);
1124
1125 #ifdef CONFIG_SMP
1126 if (smp_num_siblings * c->x86_max_cores > 1) {
1127 int cpu = c - cpu_data;
1128 seq_printf(m, "physical id\t: %d\n", c->phys_proc_id);
1129 seq_printf(m, "siblings\t: %d\n", cpus_weight(cpu_core_map[cpu]));
1130 seq_printf(m, "core id\t\t: %d\n", c->cpu_core_id);
1131 seq_printf(m, "cpu cores\t: %d\n", c->booted_cores);
1132 }
1133 #endif
1134
1135 seq_printf(m,
1136 "fpu\t\t: yes\n"
1137 "fpu_exception\t: yes\n"
1138 "cpuid level\t: %d\n"
1139 "wp\t\t: yes\n"
1140 "flags\t\t:",
1141 c->cpuid_level);
1142
1143 {
1144 int i;
1145 for ( i = 0 ; i < 32*NCAPINTS ; i++ )
1146 if (cpu_has(c, i) && x86_cap_flags[i] != NULL)
1147 seq_printf(m, " %s", x86_cap_flags[i]);
1148 }
1149
1150 seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
1151 c->loops_per_jiffy/(500000/HZ),
1152 (c->loops_per_jiffy/(5000/HZ)) % 100);
1153
1154 if (c->x86_tlbsize > 0)
1155 seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize);
1156 seq_printf(m, "clflush size\t: %d\n", c->x86_clflush_size);
1157 seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment);
1158
1159 seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n",
1160 c->x86_phys_bits, c->x86_virt_bits);
1161
1162 seq_printf(m, "power management:");
1163 {
1164 unsigned i;
1165 for (i = 0; i < 32; i++)
1166 if (c->x86_power & (1 << i)) {
1167 if (i < ARRAY_SIZE(x86_power_flags) &&
1168 x86_power_flags[i])
1169 seq_printf(m, "%s%s",
1170 x86_power_flags[i][0]?" ":"",
1171 x86_power_flags[i]);
1172 else
1173 seq_printf(m, " [%d]", i);
1174 }
1175 }
1176
1177 seq_printf(m, "\n\n");
1178
1179 return 0;
1180 }
1181
1182 static void *c_start(struct seq_file *m, loff_t *pos)
1183 {
1184 return *pos < NR_CPUS ? cpu_data + *pos : NULL;
1185 }
1186
1187 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1188 {
1189 ++*pos;
1190 return c_start(m, pos);
1191 }
1192
1193 static void c_stop(struct seq_file *m, void *v)
1194 {
1195 }
1196
1197 struct seq_operations cpuinfo_op = {
1198 .start =c_start,
1199 .next = c_next,
1200 .stop = c_stop,
1201 .show = show_cpuinfo,
1202 };
1203
1204 #if defined(CONFIG_INPUT_PCSPKR) || defined(CONFIG_INPUT_PCSPKR_MODULE)
1205 #include <linux/platform_device.h>
1206 static __init int add_pcspkr(void)
1207 {
1208 struct platform_device *pd;
1209 int ret;
1210
1211 pd = platform_device_alloc("pcspkr", -1);
1212 if (!pd)
1213 return -ENOMEM;
1214
1215 ret = platform_device_add(pd);
1216 if (ret)
1217 platform_device_put(pd);
1218
1219 return ret;
1220 }
1221 device_initcall(add_pcspkr);
1222 #endif
Linux kernel - Deliverables
This page took 0.060423 seconds and 4 git commands to generate.