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Merge master.kernel.org:/pub/scm/linux/kernel/git/herbert/crypto-2.6
[deliverable/linux.git] / arch / x86_64 / kernel / setup.c
1 /*
2 * linux/arch/x86-64/kernel/setup.c
3 *
4 * Copyright (C) 1995 Linus Torvalds
5 *
6 * Nov 2001 Dave Jones <davej@suse.de>
7 * Forked from i386 setup code.
8 */
9
10 /*
11 * This file handles the architecture-dependent parts of initialization
12 */
13
14 #include <linux/errno.h>
15 #include <linux/sched.h>
16 #include <linux/kernel.h>
17 #include <linux/mm.h>
18 #include <linux/stddef.h>
19 #include <linux/unistd.h>
20 #include <linux/ptrace.h>
21 #include <linux/slab.h>
22 #include <linux/user.h>
23 #include <linux/a.out.h>
24 #include <linux/tty.h>
25 #include <linux/ioport.h>
26 #include <linux/delay.h>
27 #include <linux/config.h>
28 #include <linux/init.h>
29 #include <linux/initrd.h>
30 #include <linux/highmem.h>
31 #include <linux/bootmem.h>
32 #include <linux/module.h>
33 #include <asm/processor.h>
34 #include <linux/console.h>
35 #include <linux/seq_file.h>
36 #include <linux/crash_dump.h>
37 #include <linux/root_dev.h>
38 #include <linux/pci.h>
39 #include <linux/acpi.h>
40 #include <linux/kallsyms.h>
41 #include <linux/edd.h>
42 #include <linux/mmzone.h>
43 #include <linux/kexec.h>
44 #include <linux/cpufreq.h>
45 #include <linux/dmi.h>
46 #include <linux/dma-mapping.h>
47 #include <linux/ctype.h>
48
49 #include <asm/mtrr.h>
50 #include <asm/uaccess.h>
51 #include <asm/system.h>
52 #include <asm/io.h>
53 #include <asm/smp.h>
54 #include <asm/msr.h>
55 #include <asm/desc.h>
56 #include <video/edid.h>
57 #include <asm/e820.h>
58 #include <asm/dma.h>
59 #include <asm/mpspec.h>
60 #include <asm/mmu_context.h>
61 #include <asm/bootsetup.h>
62 #include <asm/proto.h>
63 #include <asm/setup.h>
64 #include <asm/mach_apic.h>
65 #include <asm/numa.h>
66 #include <asm/sections.h>
67 #include <asm/dmi.h>
68
69 /*
70 * Machine setup..
71 */
72
73 struct cpuinfo_x86 boot_cpu_data __read_mostly;
74 EXPORT_SYMBOL(boot_cpu_data);
75
76 unsigned long mmu_cr4_features;
77
78 int acpi_disabled;
79 EXPORT_SYMBOL(acpi_disabled);
80 #ifdef CONFIG_ACPI
81 extern int __initdata acpi_ht;
82 extern acpi_interrupt_flags acpi_sci_flags;
83 int __initdata acpi_force = 0;
84 #endif
85
86 int acpi_numa __initdata;
87
88 /* Boot loader ID as an integer, for the benefit of proc_dointvec */
89 int bootloader_type;
90
91 unsigned long saved_video_mode;
92
93 /*
94 * Early DMI memory
95 */
96 int dmi_alloc_index;
97 char dmi_alloc_data[DMI_MAX_DATA];
98
99 /*
100 * Setup options
101 */
102 struct screen_info screen_info;
103 EXPORT_SYMBOL(screen_info);
104 struct sys_desc_table_struct {
105 unsigned short length;
106 unsigned char table[0];
107 };
108
109 struct edid_info edid_info;
110 EXPORT_SYMBOL_GPL(edid_info);
111 struct e820map e820;
112
113 extern int root_mountflags;
114
115 char command_line[COMMAND_LINE_SIZE];
116
117 struct resource standard_io_resources[] = {
118 { .name = "dma1", .start = 0x00, .end = 0x1f,
119 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
120 { .name = "pic1", .start = 0x20, .end = 0x21,
121 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
122 { .name = "timer0", .start = 0x40, .end = 0x43,
123 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
124 { .name = "timer1", .start = 0x50, .end = 0x53,
125 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
126 { .name = "keyboard", .start = 0x60, .end = 0x6f,
127 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
128 { .name = "dma page reg", .start = 0x80, .end = 0x8f,
129 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
130 { .name = "pic2", .start = 0xa0, .end = 0xa1,
131 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
132 { .name = "dma2", .start = 0xc0, .end = 0xdf,
133 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
134 { .name = "fpu", .start = 0xf0, .end = 0xff,
135 .flags = IORESOURCE_BUSY | IORESOURCE_IO }
136 };
137
138 #define STANDARD_IO_RESOURCES \
139 (sizeof standard_io_resources / sizeof standard_io_resources[0])
140
141 #define IORESOURCE_RAM (IORESOURCE_BUSY | IORESOURCE_MEM)
142
143 struct resource data_resource = {
144 .name = "Kernel data",
145 .start = 0,
146 .end = 0,
147 .flags = IORESOURCE_RAM,
148 };
149 struct resource code_resource = {
150 .name = "Kernel code",
151 .start = 0,
152 .end = 0,
153 .flags = IORESOURCE_RAM,
154 };
155
156 #define IORESOURCE_ROM (IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM)
157
158 static struct resource system_rom_resource = {
159 .name = "System ROM",
160 .start = 0xf0000,
161 .end = 0xfffff,
162 .flags = IORESOURCE_ROM,
163 };
164
165 static struct resource extension_rom_resource = {
166 .name = "Extension ROM",
167 .start = 0xe0000,
168 .end = 0xeffff,
169 .flags = IORESOURCE_ROM,
170 };
171
172 static struct resource adapter_rom_resources[] = {
173 { .name = "Adapter ROM", .start = 0xc8000, .end = 0,
174 .flags = IORESOURCE_ROM },
175 { .name = "Adapter ROM", .start = 0, .end = 0,
176 .flags = IORESOURCE_ROM },
177 { .name = "Adapter ROM", .start = 0, .end = 0,
178 .flags = IORESOURCE_ROM },
179 { .name = "Adapter ROM", .start = 0, .end = 0,
180 .flags = IORESOURCE_ROM },
181 { .name = "Adapter ROM", .start = 0, .end = 0,
182 .flags = IORESOURCE_ROM },
183 { .name = "Adapter ROM", .start = 0, .end = 0,
184 .flags = IORESOURCE_ROM }
185 };
186
187 #define ADAPTER_ROM_RESOURCES \
188 (sizeof adapter_rom_resources / sizeof adapter_rom_resources[0])
189
190 static struct resource video_rom_resource = {
191 .name = "Video ROM",
192 .start = 0xc0000,
193 .end = 0xc7fff,
194 .flags = IORESOURCE_ROM,
195 };
196
197 static struct resource video_ram_resource = {
198 .name = "Video RAM area",
199 .start = 0xa0000,
200 .end = 0xbffff,
201 .flags = IORESOURCE_RAM,
202 };
203
204 #define romsignature(x) (*(unsigned short *)(x) == 0xaa55)
205
206 static int __init romchecksum(unsigned char *rom, unsigned long length)
207 {
208 unsigned char *p, sum = 0;
209
210 for (p = rom; p < rom + length; p++)
211 sum += *p;
212 return sum == 0;
213 }
214
215 static void __init probe_roms(void)
216 {
217 unsigned long start, length, upper;
218 unsigned char *rom;
219 int i;
220
221 /* video rom */
222 upper = adapter_rom_resources[0].start;
223 for (start = video_rom_resource.start; start < upper; start += 2048) {
224 rom = isa_bus_to_virt(start);
225 if (!romsignature(rom))
226 continue;
227
228 video_rom_resource.start = start;
229
230 /* 0 < length <= 0x7f * 512, historically */
231 length = rom[2] * 512;
232
233 /* if checksum okay, trust length byte */
234 if (length && romchecksum(rom, length))
235 video_rom_resource.end = start + length - 1;
236
237 request_resource(&iomem_resource, &video_rom_resource);
238 break;
239 }
240
241 start = (video_rom_resource.end + 1 + 2047) & ~2047UL;
242 if (start < upper)
243 start = upper;
244
245 /* system rom */
246 request_resource(&iomem_resource, &system_rom_resource);
247 upper = system_rom_resource.start;
248
249 /* check for extension rom (ignore length byte!) */
250 rom = isa_bus_to_virt(extension_rom_resource.start);
251 if (romsignature(rom)) {
252 length = extension_rom_resource.end - extension_rom_resource.start + 1;
253 if (romchecksum(rom, length)) {
254 request_resource(&iomem_resource, &extension_rom_resource);
255 upper = extension_rom_resource.start;
256 }
257 }
258
259 /* check for adapter roms on 2k boundaries */
260 for (i = 0; i < ADAPTER_ROM_RESOURCES && start < upper; start += 2048) {
261 rom = isa_bus_to_virt(start);
262 if (!romsignature(rom))
263 continue;
264
265 /* 0 < length <= 0x7f * 512, historically */
266 length = rom[2] * 512;
267
268 /* but accept any length that fits if checksum okay */
269 if (!length || start + length > upper || !romchecksum(rom, length))
270 continue;
271
272 adapter_rom_resources[i].start = start;
273 adapter_rom_resources[i].end = start + length - 1;
274 request_resource(&iomem_resource, &adapter_rom_resources[i]);
275
276 start = adapter_rom_resources[i++].end & ~2047UL;
277 }
278 }
279
280 /* Check for full argument with no trailing characters */
281 static int fullarg(char *p, char *arg)
282 {
283 int l = strlen(arg);
284 return !memcmp(p, arg, l) && (p[l] == 0 || isspace(p[l]));
285 }
286
287 static __init void parse_cmdline_early (char ** cmdline_p)
288 {
289 char c = ' ', *to = command_line, *from = COMMAND_LINE;
290 int len = 0;
291 int userdef = 0;
292
293 for (;;) {
294 if (c != ' ')
295 goto next_char;
296
297 #ifdef CONFIG_SMP
298 /*
299 * If the BIOS enumerates physical processors before logical,
300 * maxcpus=N at enumeration-time can be used to disable HT.
301 */
302 else if (!memcmp(from, "maxcpus=", 8)) {
303 extern unsigned int maxcpus;
304
305 maxcpus = simple_strtoul(from + 8, NULL, 0);
306 }
307 #endif
308 #ifdef CONFIG_ACPI
309 /* "acpi=off" disables both ACPI table parsing and interpreter init */
310 if (fullarg(from,"acpi=off"))
311 disable_acpi();
312
313 if (fullarg(from, "acpi=force")) {
314 /* add later when we do DMI horrors: */
315 acpi_force = 1;
316 acpi_disabled = 0;
317 }
318
319 /* acpi=ht just means: do ACPI MADT parsing
320 at bootup, but don't enable the full ACPI interpreter */
321 if (fullarg(from, "acpi=ht")) {
322 if (!acpi_force)
323 disable_acpi();
324 acpi_ht = 1;
325 }
326 else if (fullarg(from, "pci=noacpi"))
327 acpi_disable_pci();
328 else if (fullarg(from, "acpi=noirq"))
329 acpi_noirq_set();
330
331 else if (fullarg(from, "acpi_sci=edge"))
332 acpi_sci_flags.trigger = 1;
333 else if (fullarg(from, "acpi_sci=level"))
334 acpi_sci_flags.trigger = 3;
335 else if (fullarg(from, "acpi_sci=high"))
336 acpi_sci_flags.polarity = 1;
337 else if (fullarg(from, "acpi_sci=low"))
338 acpi_sci_flags.polarity = 3;
339
340 /* acpi=strict disables out-of-spec workarounds */
341 else if (fullarg(from, "acpi=strict")) {
342 acpi_strict = 1;
343 }
344 #ifdef CONFIG_X86_IO_APIC
345 else if (fullarg(from, "acpi_skip_timer_override"))
346 acpi_skip_timer_override = 1;
347 #endif
348 #endif
349
350 if (fullarg(from, "disable_timer_pin_1"))
351 disable_timer_pin_1 = 1;
352 if (fullarg(from, "enable_timer_pin_1"))
353 disable_timer_pin_1 = -1;
354
355 if (fullarg(from, "nolapic") || fullarg(from, "disableapic")) {
356 clear_bit(X86_FEATURE_APIC, boot_cpu_data.x86_capability);
357 disable_apic = 1;
358 }
359
360 if (fullarg(from, "noapic"))
361 skip_ioapic_setup = 1;
362
363 if (fullarg(from,"apic")) {
364 skip_ioapic_setup = 0;
365 ioapic_force = 1;
366 }
367
368 if (!memcmp(from, "mem=", 4))
369 parse_memopt(from+4, &from);
370
371 if (!memcmp(from, "memmap=", 7)) {
372 /* exactmap option is for used defined memory */
373 if (!memcmp(from+7, "exactmap", 8)) {
374 #ifdef CONFIG_CRASH_DUMP
375 /* If we are doing a crash dump, we
376 * still need to know the real mem
377 * size before original memory map is
378 * reset.
379 */
380 saved_max_pfn = e820_end_of_ram();
381 #endif
382 from += 8+7;
383 end_pfn_map = 0;
384 e820.nr_map = 0;
385 userdef = 1;
386 }
387 else {
388 parse_memmapopt(from+7, &from);
389 userdef = 1;
390 }
391 }
392
393 #ifdef CONFIG_NUMA
394 if (!memcmp(from, "numa=", 5))
395 numa_setup(from+5);
396 #endif
397
398 if (!memcmp(from,"iommu=",6)) {
399 iommu_setup(from+6);
400 }
401
402 if (fullarg(from,"oops=panic"))
403 panic_on_oops = 1;
404
405 if (!memcmp(from, "noexec=", 7))
406 nonx_setup(from + 7);
407
408 #ifdef CONFIG_KEXEC
409 /* crashkernel=size@addr specifies the location to reserve for
410 * a crash kernel. By reserving this memory we guarantee
411 * that linux never set's it up as a DMA target.
412 * Useful for holding code to do something appropriate
413 * after a kernel panic.
414 */
415 else if (!memcmp(from, "crashkernel=", 12)) {
416 unsigned long size, base;
417 size = memparse(from+12, &from);
418 if (*from == '@') {
419 base = memparse(from+1, &from);
420 /* FIXME: Do I want a sanity check
421 * to validate the memory range?
422 */
423 crashk_res.start = base;
424 crashk_res.end = base + size - 1;
425 }
426 }
427 #endif
428
429 #ifdef CONFIG_PROC_VMCORE
430 /* elfcorehdr= specifies the location of elf core header
431 * stored by the crashed kernel. This option will be passed
432 * by kexec loader to the capture kernel.
433 */
434 else if(!memcmp(from, "elfcorehdr=", 11))
435 elfcorehdr_addr = memparse(from+11, &from);
436 #endif
437
438 #ifdef CONFIG_HOTPLUG_CPU
439 else if (!memcmp(from, "additional_cpus=", 16))
440 setup_additional_cpus(from+16);
441 #endif
442
443 next_char:
444 c = *(from++);
445 if (!c)
446 break;
447 if (COMMAND_LINE_SIZE <= ++len)
448 break;
449 *(to++) = c;
450 }
451 if (userdef) {
452 printk(KERN_INFO "user-defined physical RAM map:\n");
453 e820_print_map("user");
454 }
455 *to = '\0';
456 *cmdline_p = command_line;
457 }
458
459 #ifndef CONFIG_NUMA
460 static void __init
461 contig_initmem_init(unsigned long start_pfn, unsigned long end_pfn)
462 {
463 unsigned long bootmap_size, bootmap;
464
465 bootmap_size = bootmem_bootmap_pages(end_pfn)<<PAGE_SHIFT;
466 bootmap = find_e820_area(0, end_pfn<<PAGE_SHIFT, bootmap_size);
467 if (bootmap == -1L)
468 panic("Cannot find bootmem map of size %ld\n",bootmap_size);
469 bootmap_size = init_bootmem(bootmap >> PAGE_SHIFT, end_pfn);
470 e820_bootmem_free(NODE_DATA(0), 0, end_pfn << PAGE_SHIFT);
471 reserve_bootmem(bootmap, bootmap_size);
472 }
473 #endif
474
475 #if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE)
476 struct edd edd;
477 #ifdef CONFIG_EDD_MODULE
478 EXPORT_SYMBOL(edd);
479 #endif
480 /**
481 * copy_edd() - Copy the BIOS EDD information
482 * from boot_params into a safe place.
483 *
484 */
485 static inline void copy_edd(void)
486 {
487 memcpy(edd.mbr_signature, EDD_MBR_SIGNATURE, sizeof(edd.mbr_signature));
488 memcpy(edd.edd_info, EDD_BUF, sizeof(edd.edd_info));
489 edd.mbr_signature_nr = EDD_MBR_SIG_NR;
490 edd.edd_info_nr = EDD_NR;
491 }
492 #else
493 static inline void copy_edd(void)
494 {
495 }
496 #endif
497
498 #define EBDA_ADDR_POINTER 0x40E
499
500 unsigned __initdata ebda_addr;
501 unsigned __initdata ebda_size;
502
503 static void discover_ebda(void)
504 {
505 /*
506 * there is a real-mode segmented pointer pointing to the
507 * 4K EBDA area at 0x40E
508 */
509 ebda_addr = *(unsigned short *)EBDA_ADDR_POINTER;
510 ebda_addr <<= 4;
511
512 ebda_size = *(unsigned short *)(unsigned long)ebda_addr;
513
514 /* Round EBDA up to pages */
515 if (ebda_size == 0)
516 ebda_size = 1;
517 ebda_size <<= 10;
518 ebda_size = round_up(ebda_size + (ebda_addr & ~PAGE_MASK), PAGE_SIZE);
519 if (ebda_size > 64*1024)
520 ebda_size = 64*1024;
521 }
522
523 void __init setup_arch(char **cmdline_p)
524 {
525 unsigned long kernel_end;
526
527 ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
528 screen_info = SCREEN_INFO;
529 edid_info = EDID_INFO;
530 saved_video_mode = SAVED_VIDEO_MODE;
531 bootloader_type = LOADER_TYPE;
532
533 #ifdef CONFIG_BLK_DEV_RAM
534 rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK;
535 rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0);
536 rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0);
537 #endif
538 setup_memory_region();
539 copy_edd();
540
541 if (!MOUNT_ROOT_RDONLY)
542 root_mountflags &= ~MS_RDONLY;
543 init_mm.start_code = (unsigned long) &_text;
544 init_mm.end_code = (unsigned long) &_etext;
545 init_mm.end_data = (unsigned long) &_edata;
546 init_mm.brk = (unsigned long) &_end;
547
548 code_resource.start = virt_to_phys(&_text);
549 code_resource.end = virt_to_phys(&_etext)-1;
550 data_resource.start = virt_to_phys(&_etext);
551 data_resource.end = virt_to_phys(&_edata)-1;
552
553 parse_cmdline_early(cmdline_p);
554
555 early_identify_cpu(&boot_cpu_data);
556
557 /*
558 * partially used pages are not usable - thus
559 * we are rounding upwards:
560 */
561 end_pfn = e820_end_of_ram();
562 num_physpages = end_pfn; /* for pfn_valid */
563
564 check_efer();
565
566 discover_ebda();
567
568 init_memory_mapping(0, (end_pfn_map << PAGE_SHIFT));
569
570 dmi_scan_machine();
571
572 zap_low_mappings(0);
573
574 #ifdef CONFIG_ACPI
575 /*
576 * Initialize the ACPI boot-time table parser (gets the RSDP and SDT).
577 * Call this early for SRAT node setup.
578 */
579 acpi_boot_table_init();
580 #endif
581
582 #ifdef CONFIG_ACPI_NUMA
583 /*
584 * Parse SRAT to discover nodes.
585 */
586 acpi_numa_init();
587 #endif
588
589 #ifdef CONFIG_NUMA
590 numa_initmem_init(0, end_pfn);
591 #else
592 contig_initmem_init(0, end_pfn);
593 #endif
594
595 /* Reserve direct mapping */
596 reserve_bootmem_generic(table_start << PAGE_SHIFT,
597 (table_end - table_start) << PAGE_SHIFT);
598
599 /* reserve kernel */
600 kernel_end = round_up(__pa_symbol(&_end),PAGE_SIZE);
601 reserve_bootmem_generic(HIGH_MEMORY, kernel_end - HIGH_MEMORY);
602
603 /*
604 * reserve physical page 0 - it's a special BIOS page on many boxes,
605 * enabling clean reboots, SMP operation, laptop functions.
606 */
607 reserve_bootmem_generic(0, PAGE_SIZE);
608
609 /* reserve ebda region */
610 if (ebda_addr)
611 reserve_bootmem_generic(ebda_addr, ebda_size);
612
613 #ifdef CONFIG_SMP
614 /*
615 * But first pinch a few for the stack/trampoline stuff
616 * FIXME: Don't need the extra page at 4K, but need to fix
617 * trampoline before removing it. (see the GDT stuff)
618 */
619 reserve_bootmem_generic(PAGE_SIZE, PAGE_SIZE);
620
621 /* Reserve SMP trampoline */
622 reserve_bootmem_generic(SMP_TRAMPOLINE_BASE, PAGE_SIZE);
623 #endif
624
625 #ifdef CONFIG_ACPI_SLEEP
626 /*
627 * Reserve low memory region for sleep support.
628 */
629 acpi_reserve_bootmem();
630 #endif
631 #ifdef CONFIG_X86_LOCAL_APIC
632 /*
633 * Find and reserve possible boot-time SMP configuration:
634 */
635 find_smp_config();
636 #endif
637 #ifdef CONFIG_BLK_DEV_INITRD
638 if (LOADER_TYPE && INITRD_START) {
639 if (INITRD_START + INITRD_SIZE <= (end_pfn << PAGE_SHIFT)) {
640 reserve_bootmem_generic(INITRD_START, INITRD_SIZE);
641 initrd_start =
642 INITRD_START ? INITRD_START + PAGE_OFFSET : 0;
643 initrd_end = initrd_start+INITRD_SIZE;
644 }
645 else {
646 printk(KERN_ERR "initrd extends beyond end of memory "
647 "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
648 (unsigned long)(INITRD_START + INITRD_SIZE),
649 (unsigned long)(end_pfn << PAGE_SHIFT));
650 initrd_start = 0;
651 }
652 }
653 #endif
654 #ifdef CONFIG_KEXEC
655 if (crashk_res.start != crashk_res.end) {
656 reserve_bootmem_generic(crashk_res.start,
657 crashk_res.end - crashk_res.start + 1);
658 }
659 #endif
660
661 paging_init();
662
663 check_ioapic();
664
665 /*
666 * set this early, so we dont allocate cpu0
667 * if MADT list doesnt list BSP first
668 * mpparse.c/MP_processor_info() allocates logical cpu numbers.
669 */
670 cpu_set(0, cpu_present_map);
671 #ifdef CONFIG_ACPI
672 /*
673 * Read APIC and some other early information from ACPI tables.
674 */
675 acpi_boot_init();
676 #endif
677
678 init_cpu_to_node();
679
680 #ifdef CONFIG_X86_LOCAL_APIC
681 /*
682 * get boot-time SMP configuration:
683 */
684 if (smp_found_config)
685 get_smp_config();
686 init_apic_mappings();
687 #endif
688
689 /*
690 * Request address space for all standard RAM and ROM resources
691 * and also for regions reported as reserved by the e820.
692 */
693 probe_roms();
694 e820_reserve_resources();
695
696 request_resource(&iomem_resource, &video_ram_resource);
697
698 {
699 unsigned i;
700 /* request I/O space for devices used on all i[345]86 PCs */
701 for (i = 0; i < STANDARD_IO_RESOURCES; i++)
702 request_resource(&ioport_resource, &standard_io_resources[i]);
703 }
704
705 e820_setup_gap();
706
707 #ifdef CONFIG_VT
708 #if defined(CONFIG_VGA_CONSOLE)
709 conswitchp = &vga_con;
710 #elif defined(CONFIG_DUMMY_CONSOLE)
711 conswitchp = &dummy_con;
712 #endif
713 #endif
714 }
715
716 static int __cpuinit get_model_name(struct cpuinfo_x86 *c)
717 {
718 unsigned int *v;
719
720 if (c->extended_cpuid_level < 0x80000004)
721 return 0;
722
723 v = (unsigned int *) c->x86_model_id;
724 cpuid(0x80000002, &v[0], &v[1], &v[2], &v[3]);
725 cpuid(0x80000003, &v[4], &v[5], &v[6], &v[7]);
726 cpuid(0x80000004, &v[8], &v[9], &v[10], &v[11]);
727 c->x86_model_id[48] = 0;
728 return 1;
729 }
730
731
732 static void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c)
733 {
734 unsigned int n, dummy, eax, ebx, ecx, edx;
735
736 n = c->extended_cpuid_level;
737
738 if (n >= 0x80000005) {
739 cpuid(0x80000005, &dummy, &ebx, &ecx, &edx);
740 printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n",
741 edx>>24, edx&0xFF, ecx>>24, ecx&0xFF);
742 c->x86_cache_size=(ecx>>24)+(edx>>24);
743 /* On K8 L1 TLB is inclusive, so don't count it */
744 c->x86_tlbsize = 0;
745 }
746
747 if (n >= 0x80000006) {
748 cpuid(0x80000006, &dummy, &ebx, &ecx, &edx);
749 ecx = cpuid_ecx(0x80000006);
750 c->x86_cache_size = ecx >> 16;
751 c->x86_tlbsize += ((ebx >> 16) & 0xfff) + (ebx & 0xfff);
752
753 printk(KERN_INFO "CPU: L2 Cache: %dK (%d bytes/line)\n",
754 c->x86_cache_size, ecx & 0xFF);
755 }
756
757 if (n >= 0x80000007)
758 cpuid(0x80000007, &dummy, &dummy, &dummy, &c->x86_power);
759 if (n >= 0x80000008) {
760 cpuid(0x80000008, &eax, &dummy, &dummy, &dummy);
761 c->x86_virt_bits = (eax >> 8) & 0xff;
762 c->x86_phys_bits = eax & 0xff;
763 }
764 }
765
766 #ifdef CONFIG_NUMA
767 static int nearby_node(int apicid)
768 {
769 int i;
770 for (i = apicid - 1; i >= 0; i--) {
771 int node = apicid_to_node[i];
772 if (node != NUMA_NO_NODE && node_online(node))
773 return node;
774 }
775 for (i = apicid + 1; i < MAX_LOCAL_APIC; i++) {
776 int node = apicid_to_node[i];
777 if (node != NUMA_NO_NODE && node_online(node))
778 return node;
779 }
780 return first_node(node_online_map); /* Shouldn't happen */
781 }
782 #endif
783
784 /*
785 * On a AMD dual core setup the lower bits of the APIC id distingush the cores.
786 * Assumes number of cores is a power of two.
787 */
788 static void __init amd_detect_cmp(struct cpuinfo_x86 *c)
789 {
790 #ifdef CONFIG_SMP
791 unsigned bits;
792 #ifdef CONFIG_NUMA
793 int cpu = smp_processor_id();
794 int node = 0;
795 unsigned apicid = hard_smp_processor_id();
796 #endif
797 unsigned ecx = cpuid_ecx(0x80000008);
798
799 c->x86_max_cores = (ecx & 0xff) + 1;
800
801 /* CPU telling us the core id bits shift? */
802 bits = (ecx >> 12) & 0xF;
803
804 /* Otherwise recompute */
805 if (bits == 0) {
806 while ((1 << bits) < c->x86_max_cores)
807 bits++;
808 }
809
810 /* Low order bits define the core id (index of core in socket) */
811 c->cpu_core_id = c->phys_proc_id & ((1 << bits)-1);
812 /* Convert the APIC ID into the socket ID */
813 c->phys_proc_id = phys_pkg_id(bits);
814
815 #ifdef CONFIG_NUMA
816 node = c->phys_proc_id;
817 if (apicid_to_node[apicid] != NUMA_NO_NODE)
818 node = apicid_to_node[apicid];
819 if (!node_online(node)) {
820 /* Two possibilities here:
821 - The CPU is missing memory and no node was created.
822 In that case try picking one from a nearby CPU
823 - The APIC IDs differ from the HyperTransport node IDs
824 which the K8 northbridge parsing fills in.
825 Assume they are all increased by a constant offset,
826 but in the same order as the HT nodeids.
827 If that doesn't result in a usable node fall back to the
828 path for the previous case. */
829 int ht_nodeid = apicid - (cpu_data[0].phys_proc_id << bits);
830 if (ht_nodeid >= 0 &&
831 apicid_to_node[ht_nodeid] != NUMA_NO_NODE)
832 node = apicid_to_node[ht_nodeid];
833 /* Pick a nearby node */
834 if (!node_online(node))
835 node = nearby_node(apicid);
836 }
837 numa_set_node(cpu, node);
838
839 printk(KERN_INFO "CPU %d/%x -> Node %d\n", cpu, apicid, node);
840 #endif
841 #endif
842 }
843
844 static void __init init_amd(struct cpuinfo_x86 *c)
845 {
846 unsigned level;
847
848 #ifdef CONFIG_SMP
849 unsigned long value;
850
851 /*
852 * Disable TLB flush filter by setting HWCR.FFDIS on K8
853 * bit 6 of msr C001_0015
854 *
855 * Errata 63 for SH-B3 steppings
856 * Errata 122 for all steppings (F+ have it disabled by default)
857 */
858 if (c->x86 == 15) {
859 rdmsrl(MSR_K8_HWCR, value);
860 value |= 1 << 6;
861 wrmsrl(MSR_K8_HWCR, value);
862 }
863 #endif
864
865 /* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
866 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
867 clear_bit(0*32+31, &c->x86_capability);
868
869 /* On C+ stepping K8 rep microcode works well for copy/memset */
870 level = cpuid_eax(1);
871 if (c->x86 == 15 && ((level >= 0x0f48 && level < 0x0f50) || level >= 0x0f58))
872 set_bit(X86_FEATURE_REP_GOOD, &c->x86_capability);
873
874 /* Enable workaround for FXSAVE leak */
875 if (c->x86 >= 6)
876 set_bit(X86_FEATURE_FXSAVE_LEAK, &c->x86_capability);
877
878 level = get_model_name(c);
879 if (!level) {
880 switch (c->x86) {
881 case 15:
882 /* Should distinguish Models here, but this is only
883 a fallback anyways. */
884 strcpy(c->x86_model_id, "Hammer");
885 break;
886 }
887 }
888 display_cacheinfo(c);
889
890 /* c->x86_power is 8000_0007 edx. Bit 8 is constant TSC */
891 if (c->x86_power & (1<<8))
892 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
893
894 /* Multi core CPU? */
895 if (c->extended_cpuid_level >= 0x80000008)
896 amd_detect_cmp(c);
897
898 /* Fix cpuid4 emulation for more */
899 num_cache_leaves = 3;
900 }
901
902 static void __cpuinit detect_ht(struct cpuinfo_x86 *c)
903 {
904 #ifdef CONFIG_SMP
905 u32 eax, ebx, ecx, edx;
906 int index_msb, core_bits;
907
908 cpuid(1, &eax, &ebx, &ecx, &edx);
909
910
911 if (!cpu_has(c, X86_FEATURE_HT))
912 return;
913 if (cpu_has(c, X86_FEATURE_CMP_LEGACY))
914 goto out;
915
916 smp_num_siblings = (ebx & 0xff0000) >> 16;
917
918 if (smp_num_siblings == 1) {
919 printk(KERN_INFO "CPU: Hyper-Threading is disabled\n");
920 } else if (smp_num_siblings > 1 ) {
921
922 if (smp_num_siblings > NR_CPUS) {
923 printk(KERN_WARNING "CPU: Unsupported number of the siblings %d", smp_num_siblings);
924 smp_num_siblings = 1;
925 return;
926 }
927
928 index_msb = get_count_order(smp_num_siblings);
929 c->phys_proc_id = phys_pkg_id(index_msb);
930
931 smp_num_siblings = smp_num_siblings / c->x86_max_cores;
932
933 index_msb = get_count_order(smp_num_siblings) ;
934
935 core_bits = get_count_order(c->x86_max_cores);
936
937 c->cpu_core_id = phys_pkg_id(index_msb) &
938 ((1 << core_bits) - 1);
939 }
940 out:
941 if ((c->x86_max_cores * smp_num_siblings) > 1) {
942 printk(KERN_INFO "CPU: Physical Processor ID: %d\n", c->phys_proc_id);
943 printk(KERN_INFO "CPU: Processor Core ID: %d\n", c->cpu_core_id);
944 }
945
946 #endif
947 }
948
949 /*
950 * find out the number of processor cores on the die
951 */
952 static int __cpuinit intel_num_cpu_cores(struct cpuinfo_x86 *c)
953 {
954 unsigned int eax, t;
955
956 if (c->cpuid_level < 4)
957 return 1;
958
959 cpuid_count(4, 0, &eax, &t, &t, &t);
960
961 if (eax & 0x1f)
962 return ((eax >> 26) + 1);
963 else
964 return 1;
965 }
966
967 static void srat_detect_node(void)
968 {
969 #ifdef CONFIG_NUMA
970 unsigned node;
971 int cpu = smp_processor_id();
972 int apicid = hard_smp_processor_id();
973
974 /* Don't do the funky fallback heuristics the AMD version employs
975 for now. */
976 node = apicid_to_node[apicid];
977 if (node == NUMA_NO_NODE)
978 node = first_node(node_online_map);
979 numa_set_node(cpu, node);
980
981 if (acpi_numa > 0)
982 printk(KERN_INFO "CPU %d/%x -> Node %d\n", cpu, apicid, node);
983 #endif
984 }
985
986 static void __cpuinit init_intel(struct cpuinfo_x86 *c)
987 {
988 /* Cache sizes */
989 unsigned n;
990
991 init_intel_cacheinfo(c);
992 if (c->cpuid_level > 9 ) {
993 unsigned eax = cpuid_eax(10);
994 /* Check for version and the number of counters */
995 if ((eax & 0xff) && (((eax>>8) & 0xff) > 1))
996 set_bit(X86_FEATURE_ARCH_PERFMON, &c->x86_capability);
997 }
998
999 n = c->extended_cpuid_level;
1000 if (n >= 0x80000008) {
1001 unsigned eax = cpuid_eax(0x80000008);
1002 c->x86_virt_bits = (eax >> 8) & 0xff;
1003 c->x86_phys_bits = eax & 0xff;
1004 /* CPUID workaround for Intel 0F34 CPU */
1005 if (c->x86_vendor == X86_VENDOR_INTEL &&
1006 c->x86 == 0xF && c->x86_model == 0x3 &&
1007 c->x86_mask == 0x4)
1008 c->x86_phys_bits = 36;
1009 }
1010
1011 if (c->x86 == 15)
1012 c->x86_cache_alignment = c->x86_clflush_size * 2;
1013 if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
1014 (c->x86 == 0x6 && c->x86_model >= 0x0e))
1015 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
1016 set_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability);
1017 c->x86_max_cores = intel_num_cpu_cores(c);
1018
1019 srat_detect_node();
1020 }
1021
1022 static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c)
1023 {
1024 char *v = c->x86_vendor_id;
1025
1026 if (!strcmp(v, "AuthenticAMD"))
1027 c->x86_vendor = X86_VENDOR_AMD;
1028 else if (!strcmp(v, "GenuineIntel"))
1029 c->x86_vendor = X86_VENDOR_INTEL;
1030 else
1031 c->x86_vendor = X86_VENDOR_UNKNOWN;
1032 }
1033
1034 struct cpu_model_info {
1035 int vendor;
1036 int family;
1037 char *model_names[16];
1038 };
1039
1040 /* Do some early cpuid on the boot CPU to get some parameter that are
1041 needed before check_bugs. Everything advanced is in identify_cpu
1042 below. */
1043 void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
1044 {
1045 u32 tfms;
1046
1047 c->loops_per_jiffy = loops_per_jiffy;
1048 c->x86_cache_size = -1;
1049 c->x86_vendor = X86_VENDOR_UNKNOWN;
1050 c->x86_model = c->x86_mask = 0; /* So far unknown... */
1051 c->x86_vendor_id[0] = '\0'; /* Unset */
1052 c->x86_model_id[0] = '\0'; /* Unset */
1053 c->x86_clflush_size = 64;
1054 c->x86_cache_alignment = c->x86_clflush_size;
1055 c->x86_max_cores = 1;
1056 c->extended_cpuid_level = 0;
1057 memset(&c->x86_capability, 0, sizeof c->x86_capability);
1058
1059 /* Get vendor name */
1060 cpuid(0x00000000, (unsigned int *)&c->cpuid_level,
1061 (unsigned int *)&c->x86_vendor_id[0],
1062 (unsigned int *)&c->x86_vendor_id[8],
1063 (unsigned int *)&c->x86_vendor_id[4]);
1064
1065 get_cpu_vendor(c);
1066
1067 /* Initialize the standard set of capabilities */
1068 /* Note that the vendor-specific code below might override */
1069
1070 /* Intel-defined flags: level 0x00000001 */
1071 if (c->cpuid_level >= 0x00000001) {
1072 __u32 misc;
1073 cpuid(0x00000001, &tfms, &misc, &c->x86_capability[4],
1074 &c->x86_capability[0]);
1075 c->x86 = (tfms >> 8) & 0xf;
1076 c->x86_model = (tfms >> 4) & 0xf;
1077 c->x86_mask = tfms & 0xf;
1078 if (c->x86 == 0xf)
1079 c->x86 += (tfms >> 20) & 0xff;
1080 if (c->x86 >= 0x6)
1081 c->x86_model += ((tfms >> 16) & 0xF) << 4;
1082 if (c->x86_capability[0] & (1<<19))
1083 c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;
1084 } else {
1085 /* Have CPUID level 0 only - unheard of */
1086 c->x86 = 4;
1087 }
1088
1089 #ifdef CONFIG_SMP
1090 c->phys_proc_id = (cpuid_ebx(1) >> 24) & 0xff;
1091 #endif
1092 }
1093
1094 /*
1095 * This does the hard work of actually picking apart the CPU stuff...
1096 */
1097 void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
1098 {
1099 int i;
1100 u32 xlvl;
1101
1102 early_identify_cpu(c);
1103
1104 /* AMD-defined flags: level 0x80000001 */
1105 xlvl = cpuid_eax(0x80000000);
1106 c->extended_cpuid_level = xlvl;
1107 if ((xlvl & 0xffff0000) == 0x80000000) {
1108 if (xlvl >= 0x80000001) {
1109 c->x86_capability[1] = cpuid_edx(0x80000001);
1110 c->x86_capability[6] = cpuid_ecx(0x80000001);
1111 }
1112 if (xlvl >= 0x80000004)
1113 get_model_name(c); /* Default name */
1114 }
1115
1116 /* Transmeta-defined flags: level 0x80860001 */
1117 xlvl = cpuid_eax(0x80860000);
1118 if ((xlvl & 0xffff0000) == 0x80860000) {
1119 /* Don't set x86_cpuid_level here for now to not confuse. */
1120 if (xlvl >= 0x80860001)
1121 c->x86_capability[2] = cpuid_edx(0x80860001);
1122 }
1123
1124 c->apicid = phys_pkg_id(0);
1125
1126 /*
1127 * Vendor-specific initialization. In this section we
1128 * canonicalize the feature flags, meaning if there are
1129 * features a certain CPU supports which CPUID doesn't
1130 * tell us, CPUID claiming incorrect flags, or other bugs,
1131 * we handle them here.
1132 *
1133 * At the end of this section, c->x86_capability better
1134 * indicate the features this CPU genuinely supports!
1135 */
1136 switch (c->x86_vendor) {
1137 case X86_VENDOR_AMD:
1138 init_amd(c);
1139 break;
1140
1141 case X86_VENDOR_INTEL:
1142 init_intel(c);
1143 break;
1144
1145 case X86_VENDOR_UNKNOWN:
1146 default:
1147 display_cacheinfo(c);
1148 break;
1149 }
1150
1151 select_idle_routine(c);
1152 detect_ht(c);
1153
1154 /*
1155 * On SMP, boot_cpu_data holds the common feature set between
1156 * all CPUs; so make sure that we indicate which features are
1157 * common between the CPUs. The first time this routine gets
1158 * executed, c == &boot_cpu_data.
1159 */
1160 if (c != &boot_cpu_data) {
1161 /* AND the already accumulated flags with these */
1162 for (i = 0 ; i < NCAPINTS ; i++)
1163 boot_cpu_data.x86_capability[i] &= c->x86_capability[i];
1164 }
1165
1166 #ifdef CONFIG_X86_MCE
1167 mcheck_init(c);
1168 #endif
1169 if (c == &boot_cpu_data)
1170 mtrr_bp_init();
1171 else
1172 mtrr_ap_init();
1173 #ifdef CONFIG_NUMA
1174 numa_add_cpu(smp_processor_id());
1175 #endif
1176 }
1177
1178
1179 void __cpuinit print_cpu_info(struct cpuinfo_x86 *c)
1180 {
1181 if (c->x86_model_id[0])
1182 printk("%s", c->x86_model_id);
1183
1184 if (c->x86_mask || c->cpuid_level >= 0)
1185 printk(" stepping %02x\n", c->x86_mask);
1186 else
1187 printk("\n");
1188 }
1189
1190 /*
1191 * Get CPU information for use by the procfs.
1192 */
1193
1194 static int show_cpuinfo(struct seq_file *m, void *v)
1195 {
1196 struct cpuinfo_x86 *c = v;
1197
1198 /*
1199 * These flag bits must match the definitions in <asm/cpufeature.h>.
1200 * NULL means this bit is undefined or reserved; either way it doesn't
1201 * have meaning as far as Linux is concerned. Note that it's important
1202 * to realize there is a difference between this table and CPUID -- if
1203 * applications want to get the raw CPUID data, they should access
1204 * /dev/cpu/<cpu_nr>/cpuid instead.
1205 */
1206 static char *x86_cap_flags[] = {
1207 /* Intel-defined */
1208 "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
1209 "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
1210 "pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx",
1211 "fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", NULL,
1212
1213 /* AMD-defined */
1214 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1215 NULL, NULL, NULL, "syscall", NULL, NULL, NULL, NULL,
1216 NULL, NULL, NULL, NULL, "nx", NULL, "mmxext", NULL,
1217 NULL, "fxsr_opt", NULL, "rdtscp", NULL, "lm", "3dnowext", "3dnow",
1218
1219 /* Transmeta-defined */
1220 "recovery", "longrun", NULL, "lrti", NULL, NULL, NULL, NULL,
1221 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1222 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1223 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1224
1225 /* Other (Linux-defined) */
1226 "cxmmx", NULL, "cyrix_arr", "centaur_mcr", NULL,
1227 "constant_tsc", NULL, NULL,
1228 "up", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1229 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1230 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1231
1232 /* Intel-defined (#2) */
1233 "pni", NULL, NULL, "monitor", "ds_cpl", "vmx", "smx", "est",
1234 "tm2", NULL, "cid", NULL, NULL, "cx16", "xtpr", NULL,
1235 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1236 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1237
1238 /* VIA/Cyrix/Centaur-defined */
1239 NULL, NULL, "rng", "rng_en", NULL, NULL, "ace", "ace_en",
1240 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1241 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1242 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1243
1244 /* AMD-defined (#2) */
1245 "lahf_lm", "cmp_legacy", "svm", NULL, "cr8_legacy", NULL, NULL, NULL,
1246 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1247 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1248 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1249 };
1250 static char *x86_power_flags[] = {
1251 "ts", /* temperature sensor */
1252 "fid", /* frequency id control */
1253 "vid", /* voltage id control */
1254 "ttp", /* thermal trip */
1255 "tm",
1256 "stc",
1257 NULL,
1258 /* nothing */ /* constant_tsc - moved to flags */
1259 };
1260
1261
1262 #ifdef CONFIG_SMP
1263 if (!cpu_online(c-cpu_data))
1264 return 0;
1265 #endif
1266
1267 seq_printf(m,"processor\t: %u\n"
1268 "vendor_id\t: %s\n"
1269 "cpu family\t: %d\n"
1270 "model\t\t: %d\n"
1271 "model name\t: %s\n",
1272 (unsigned)(c-cpu_data),
1273 c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",
1274 c->x86,
1275 (int)c->x86_model,
1276 c->x86_model_id[0] ? c->x86_model_id : "unknown");
1277
1278 if (c->x86_mask || c->cpuid_level >= 0)
1279 seq_printf(m, "stepping\t: %d\n", c->x86_mask);
1280 else
1281 seq_printf(m, "stepping\t: unknown\n");
1282
1283 if (cpu_has(c,X86_FEATURE_TSC)) {
1284 unsigned int freq = cpufreq_quick_get((unsigned)(c-cpu_data));
1285 if (!freq)
1286 freq = cpu_khz;
1287 seq_printf(m, "cpu MHz\t\t: %u.%03u\n",
1288 freq / 1000, (freq % 1000));
1289 }
1290
1291 /* Cache size */
1292 if (c->x86_cache_size >= 0)
1293 seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);
1294
1295 #ifdef CONFIG_SMP
1296 if (smp_num_siblings * c->x86_max_cores > 1) {
1297 int cpu = c - cpu_data;
1298 seq_printf(m, "physical id\t: %d\n", c->phys_proc_id);
1299 seq_printf(m, "siblings\t: %d\n", cpus_weight(cpu_core_map[cpu]));
1300 seq_printf(m, "core id\t\t: %d\n", c->cpu_core_id);
1301 seq_printf(m, "cpu cores\t: %d\n", c->booted_cores);
1302 }
1303 #endif
1304
1305 seq_printf(m,
1306 "fpu\t\t: yes\n"
1307 "fpu_exception\t: yes\n"
1308 "cpuid level\t: %d\n"
1309 "wp\t\t: yes\n"
1310 "flags\t\t:",
1311 c->cpuid_level);
1312
1313 {
1314 int i;
1315 for ( i = 0 ; i < 32*NCAPINTS ; i++ )
1316 if (cpu_has(c, i) && x86_cap_flags[i] != NULL)
1317 seq_printf(m, " %s", x86_cap_flags[i]);
1318 }
1319
1320 seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
1321 c->loops_per_jiffy/(500000/HZ),
1322 (c->loops_per_jiffy/(5000/HZ)) % 100);
1323
1324 if (c->x86_tlbsize > 0)
1325 seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize);
1326 seq_printf(m, "clflush size\t: %d\n", c->x86_clflush_size);
1327 seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment);
1328
1329 seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n",
1330 c->x86_phys_bits, c->x86_virt_bits);
1331
1332 seq_printf(m, "power management:");
1333 {
1334 unsigned i;
1335 for (i = 0; i < 32; i++)
1336 if (c->x86_power & (1 << i)) {
1337 if (i < ARRAY_SIZE(x86_power_flags) &&
1338 x86_power_flags[i])
1339 seq_printf(m, "%s%s",
1340 x86_power_flags[i][0]?" ":"",
1341 x86_power_flags[i]);
1342 else
1343 seq_printf(m, " [%d]", i);
1344 }
1345 }
1346
1347 seq_printf(m, "\n\n");
1348
1349 return 0;
1350 }
1351
1352 static void *c_start(struct seq_file *m, loff_t *pos)
1353 {
1354 return *pos < NR_CPUS ? cpu_data + *pos : NULL;
1355 }
1356
1357 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1358 {
1359 ++*pos;
1360 return c_start(m, pos);
1361 }
1362
1363 static void c_stop(struct seq_file *m, void *v)
1364 {
1365 }
1366
1367 struct seq_operations cpuinfo_op = {
1368 .start =c_start,
1369 .next = c_next,
1370 .stop = c_stop,
1371 .show = show_cpuinfo,
1372 };
1373
1374 #if defined(CONFIG_INPUT_PCSPKR) || defined(CONFIG_INPUT_PCSPKR_MODULE)
1375 #include <linux/platform_device.h>
1376 static __init int add_pcspkr(void)
1377 {
1378 struct platform_device *pd;
1379 int ret;
1380
1381 pd = platform_device_alloc("pcspkr", -1);
1382 if (!pd)
1383 return -ENOMEM;
1384
1385 ret = platform_device_add(pd);
1386 if (ret)
1387 platform_device_put(pd);
1388
1389 return ret;
1390 }
1391 device_initcall(add_pcspkr);
1392 #endif
Linux kernel - Deliverables
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