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[PATCH] Clean up acpi_numa variable
[deliverable/linux.git] / arch / x86_64 / kernel / setup.c
1 /*
2 * linux/arch/x86-64/kernel/setup.c
3 *
4 * Copyright (C) 1995 Linus Torvalds
5 *
6 * Nov 2001 Dave Jones <davej@suse.de>
7 * Forked from i386 setup code.
8 */
9
10 /*
11 * This file handles the architecture-dependent parts of initialization
12 */
13
14 #include <linux/errno.h>
15 #include <linux/sched.h>
16 #include <linux/kernel.h>
17 #include <linux/mm.h>
18 #include <linux/stddef.h>
19 #include <linux/unistd.h>
20 #include <linux/ptrace.h>
21 #include <linux/slab.h>
22 #include <linux/user.h>
23 #include <linux/a.out.h>
24 #include <linux/screen_info.h>
25 #include <linux/ioport.h>
26 #include <linux/delay.h>
27 #include <linux/init.h>
28 #include <linux/initrd.h>
29 #include <linux/highmem.h>
30 #include <linux/bootmem.h>
31 #include <linux/module.h>
32 #include <asm/processor.h>
33 #include <linux/console.h>
34 #include <linux/seq_file.h>
35 #include <linux/crash_dump.h>
36 #include <linux/root_dev.h>
37 #include <linux/pci.h>
38 #include <linux/acpi.h>
39 #include <linux/kallsyms.h>
40 #include <linux/edd.h>
41 #include <linux/mmzone.h>
42 #include <linux/kexec.h>
43 #include <linux/cpufreq.h>
44 #include <linux/dmi.h>
45 #include <linux/dma-mapping.h>
46 #include <linux/ctype.h>
47
48 #include <asm/mtrr.h>
49 #include <asm/uaccess.h>
50 #include <asm/system.h>
51 #include <asm/io.h>
52 #include <asm/smp.h>
53 #include <asm/msr.h>
54 #include <asm/desc.h>
55 #include <video/edid.h>
56 #include <asm/e820.h>
57 #include <asm/dma.h>
58 #include <asm/mpspec.h>
59 #include <asm/mmu_context.h>
60 #include <asm/bootsetup.h>
61 #include <asm/proto.h>
62 #include <asm/setup.h>
63 #include <asm/mach_apic.h>
64 #include <asm/numa.h>
65 #include <asm/sections.h>
66 #include <asm/dmi.h>
67
68 /*
69 * Machine setup..
70 */
71
72 struct cpuinfo_x86 boot_cpu_data __read_mostly;
73 EXPORT_SYMBOL(boot_cpu_data);
74
75 unsigned long mmu_cr4_features;
76
77 /* Boot loader ID as an integer, for the benefit of proc_dointvec */
78 int bootloader_type;
79
80 unsigned long saved_video_mode;
81
82 /*
83 * Early DMI memory
84 */
85 int dmi_alloc_index;
86 char dmi_alloc_data[DMI_MAX_DATA];
87
88 /*
89 * Setup options
90 */
91 struct screen_info screen_info;
92 EXPORT_SYMBOL(screen_info);
93 struct sys_desc_table_struct {
94 unsigned short length;
95 unsigned char table[0];
96 };
97
98 struct edid_info edid_info;
99 EXPORT_SYMBOL_GPL(edid_info);
100 struct e820map e820;
101
102 extern int root_mountflags;
103
104 char command_line[COMMAND_LINE_SIZE];
105
106 struct resource standard_io_resources[] = {
107 { .name = "dma1", .start = 0x00, .end = 0x1f,
108 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
109 { .name = "pic1", .start = 0x20, .end = 0x21,
110 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
111 { .name = "timer0", .start = 0x40, .end = 0x43,
112 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
113 { .name = "timer1", .start = 0x50, .end = 0x53,
114 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
115 { .name = "keyboard", .start = 0x60, .end = 0x6f,
116 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
117 { .name = "dma page reg", .start = 0x80, .end = 0x8f,
118 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
119 { .name = "pic2", .start = 0xa0, .end = 0xa1,
120 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
121 { .name = "dma2", .start = 0xc0, .end = 0xdf,
122 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
123 { .name = "fpu", .start = 0xf0, .end = 0xff,
124 .flags = IORESOURCE_BUSY | IORESOURCE_IO }
125 };
126
127 #define STANDARD_IO_RESOURCES \
128 (sizeof standard_io_resources / sizeof standard_io_resources[0])
129
130 #define IORESOURCE_RAM (IORESOURCE_BUSY | IORESOURCE_MEM)
131
132 struct resource data_resource = {
133 .name = "Kernel data",
134 .start = 0,
135 .end = 0,
136 .flags = IORESOURCE_RAM,
137 };
138 struct resource code_resource = {
139 .name = "Kernel code",
140 .start = 0,
141 .end = 0,
142 .flags = IORESOURCE_RAM,
143 };
144
145 #define IORESOURCE_ROM (IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM)
146
147 static struct resource system_rom_resource = {
148 .name = "System ROM",
149 .start = 0xf0000,
150 .end = 0xfffff,
151 .flags = IORESOURCE_ROM,
152 };
153
154 static struct resource extension_rom_resource = {
155 .name = "Extension ROM",
156 .start = 0xe0000,
157 .end = 0xeffff,
158 .flags = IORESOURCE_ROM,
159 };
160
161 static struct resource adapter_rom_resources[] = {
162 { .name = "Adapter ROM", .start = 0xc8000, .end = 0,
163 .flags = IORESOURCE_ROM },
164 { .name = "Adapter ROM", .start = 0, .end = 0,
165 .flags = IORESOURCE_ROM },
166 { .name = "Adapter ROM", .start = 0, .end = 0,
167 .flags = IORESOURCE_ROM },
168 { .name = "Adapter ROM", .start = 0, .end = 0,
169 .flags = IORESOURCE_ROM },
170 { .name = "Adapter ROM", .start = 0, .end = 0,
171 .flags = IORESOURCE_ROM },
172 { .name = "Adapter ROM", .start = 0, .end = 0,
173 .flags = IORESOURCE_ROM }
174 };
175
176 #define ADAPTER_ROM_RESOURCES \
177 (sizeof adapter_rom_resources / sizeof adapter_rom_resources[0])
178
179 static struct resource video_rom_resource = {
180 .name = "Video ROM",
181 .start = 0xc0000,
182 .end = 0xc7fff,
183 .flags = IORESOURCE_ROM,
184 };
185
186 static struct resource video_ram_resource = {
187 .name = "Video RAM area",
188 .start = 0xa0000,
189 .end = 0xbffff,
190 .flags = IORESOURCE_RAM,
191 };
192
193 #define romsignature(x) (*(unsigned short *)(x) == 0xaa55)
194
195 static int __init romchecksum(unsigned char *rom, unsigned long length)
196 {
197 unsigned char *p, sum = 0;
198
199 for (p = rom; p < rom + length; p++)
200 sum += *p;
201 return sum == 0;
202 }
203
204 static void __init probe_roms(void)
205 {
206 unsigned long start, length, upper;
207 unsigned char *rom;
208 int i;
209
210 /* video rom */
211 upper = adapter_rom_resources[0].start;
212 for (start = video_rom_resource.start; start < upper; start += 2048) {
213 rom = isa_bus_to_virt(start);
214 if (!romsignature(rom))
215 continue;
216
217 video_rom_resource.start = start;
218
219 /* 0 < length <= 0x7f * 512, historically */
220 length = rom[2] * 512;
221
222 /* if checksum okay, trust length byte */
223 if (length && romchecksum(rom, length))
224 video_rom_resource.end = start + length - 1;
225
226 request_resource(&iomem_resource, &video_rom_resource);
227 break;
228 }
229
230 start = (video_rom_resource.end + 1 + 2047) & ~2047UL;
231 if (start < upper)
232 start = upper;
233
234 /* system rom */
235 request_resource(&iomem_resource, &system_rom_resource);
236 upper = system_rom_resource.start;
237
238 /* check for extension rom (ignore length byte!) */
239 rom = isa_bus_to_virt(extension_rom_resource.start);
240 if (romsignature(rom)) {
241 length = extension_rom_resource.end - extension_rom_resource.start + 1;
242 if (romchecksum(rom, length)) {
243 request_resource(&iomem_resource, &extension_rom_resource);
244 upper = extension_rom_resource.start;
245 }
246 }
247
248 /* check for adapter roms on 2k boundaries */
249 for (i = 0; i < ADAPTER_ROM_RESOURCES && start < upper; start += 2048) {
250 rom = isa_bus_to_virt(start);
251 if (!romsignature(rom))
252 continue;
253
254 /* 0 < length <= 0x7f * 512, historically */
255 length = rom[2] * 512;
256
257 /* but accept any length that fits if checksum okay */
258 if (!length || start + length > upper || !romchecksum(rom, length))
259 continue;
260
261 adapter_rom_resources[i].start = start;
262 adapter_rom_resources[i].end = start + length - 1;
263 request_resource(&iomem_resource, &adapter_rom_resources[i]);
264
265 start = adapter_rom_resources[i++].end & ~2047UL;
266 }
267 }
268
269 #ifdef CONFIG_PROC_VMCORE
270 /* elfcorehdr= specifies the location of elf core header
271 * stored by the crashed kernel. This option will be passed
272 * by kexec loader to the capture kernel.
273 */
274 static int __init setup_elfcorehdr(char *arg)
275 {
276 char *end;
277 if (!arg)
278 return -EINVAL;
279 elfcorehdr_addr = memparse(arg, &end);
280 return end > arg ? 0 : -EINVAL;
281 }
282 early_param("elfcorehdr", setup_elfcorehdr);
283 #endif
284
285 #ifndef CONFIG_NUMA
286 static void __init
287 contig_initmem_init(unsigned long start_pfn, unsigned long end_pfn)
288 {
289 unsigned long bootmap_size, bootmap;
290
291 bootmap_size = bootmem_bootmap_pages(end_pfn)<<PAGE_SHIFT;
292 bootmap = find_e820_area(0, end_pfn<<PAGE_SHIFT, bootmap_size);
293 if (bootmap == -1L)
294 panic("Cannot find bootmem map of size %ld\n",bootmap_size);
295 bootmap_size = init_bootmem(bootmap >> PAGE_SHIFT, end_pfn);
296 e820_bootmem_free(NODE_DATA(0), 0, end_pfn << PAGE_SHIFT);
297 reserve_bootmem(bootmap, bootmap_size);
298 }
299 #endif
300
301 #if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE)
302 struct edd edd;
303 #ifdef CONFIG_EDD_MODULE
304 EXPORT_SYMBOL(edd);
305 #endif
306 /**
307 * copy_edd() - Copy the BIOS EDD information
308 * from boot_params into a safe place.
309 *
310 */
311 static inline void copy_edd(void)
312 {
313 memcpy(edd.mbr_signature, EDD_MBR_SIGNATURE, sizeof(edd.mbr_signature));
314 memcpy(edd.edd_info, EDD_BUF, sizeof(edd.edd_info));
315 edd.mbr_signature_nr = EDD_MBR_SIG_NR;
316 edd.edd_info_nr = EDD_NR;
317 }
318 #else
319 static inline void copy_edd(void)
320 {
321 }
322 #endif
323
324 #define EBDA_ADDR_POINTER 0x40E
325
326 unsigned __initdata ebda_addr;
327 unsigned __initdata ebda_size;
328
329 static void discover_ebda(void)
330 {
331 /*
332 * there is a real-mode segmented pointer pointing to the
333 * 4K EBDA area at 0x40E
334 */
335 ebda_addr = *(unsigned short *)EBDA_ADDR_POINTER;
336 ebda_addr <<= 4;
337
338 ebda_size = *(unsigned short *)(unsigned long)ebda_addr;
339
340 /* Round EBDA up to pages */
341 if (ebda_size == 0)
342 ebda_size = 1;
343 ebda_size <<= 10;
344 ebda_size = round_up(ebda_size + (ebda_addr & ~PAGE_MASK), PAGE_SIZE);
345 if (ebda_size > 64*1024)
346 ebda_size = 64*1024;
347 }
348
349 void __init setup_arch(char **cmdline_p)
350 {
351 printk(KERN_INFO "Command line: %s\n", saved_command_line);
352
353 ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
354 screen_info = SCREEN_INFO;
355 edid_info = EDID_INFO;
356 saved_video_mode = SAVED_VIDEO_MODE;
357 bootloader_type = LOADER_TYPE;
358
359 #ifdef CONFIG_BLK_DEV_RAM
360 rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK;
361 rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0);
362 rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0);
363 #endif
364 setup_memory_region();
365 copy_edd();
366
367 if (!MOUNT_ROOT_RDONLY)
368 root_mountflags &= ~MS_RDONLY;
369 init_mm.start_code = (unsigned long) &_text;
370 init_mm.end_code = (unsigned long) &_etext;
371 init_mm.end_data = (unsigned long) &_edata;
372 init_mm.brk = (unsigned long) &_end;
373
374 code_resource.start = virt_to_phys(&_text);
375 code_resource.end = virt_to_phys(&_etext)-1;
376 data_resource.start = virt_to_phys(&_etext);
377 data_resource.end = virt_to_phys(&_edata)-1;
378
379 early_identify_cpu(&boot_cpu_data);
380
381 strlcpy(command_line, saved_command_line, COMMAND_LINE_SIZE);
382 *cmdline_p = command_line;
383
384 parse_early_param();
385
386 finish_e820_parsing();
387
388 /*
389 * partially used pages are not usable - thus
390 * we are rounding upwards:
391 */
392 end_pfn = e820_end_of_ram();
393 num_physpages = end_pfn;
394
395 check_efer();
396
397 discover_ebda();
398
399 init_memory_mapping(0, (end_pfn_map << PAGE_SHIFT));
400
401 dmi_scan_machine();
402
403 zap_low_mappings(0);
404
405 #ifdef CONFIG_ACPI
406 /*
407 * Initialize the ACPI boot-time table parser (gets the RSDP and SDT).
408 * Call this early for SRAT node setup.
409 */
410 acpi_boot_table_init();
411 #endif
412
413 /* How many end-of-memory variables you have, grandma! */
414 max_low_pfn = end_pfn;
415 max_pfn = end_pfn;
416 high_memory = (void *)__va(end_pfn * PAGE_SIZE - 1) + 1;
417
418 #ifdef CONFIG_ACPI_NUMA
419 /*
420 * Parse SRAT to discover nodes.
421 */
422 acpi_numa_init();
423 #endif
424
425 #ifdef CONFIG_NUMA
426 numa_initmem_init(0, end_pfn);
427 #else
428 contig_initmem_init(0, end_pfn);
429 #endif
430
431 /* Reserve direct mapping */
432 reserve_bootmem_generic(table_start << PAGE_SHIFT,
433 (table_end - table_start) << PAGE_SHIFT);
434
435 /* reserve kernel */
436 reserve_bootmem_generic(__pa_symbol(&_text),
437 __pa_symbol(&_end) - __pa_symbol(&_text));
438
439 /*
440 * reserve physical page 0 - it's a special BIOS page on many boxes,
441 * enabling clean reboots, SMP operation, laptop functions.
442 */
443 reserve_bootmem_generic(0, PAGE_SIZE);
444
445 /* reserve ebda region */
446 if (ebda_addr)
447 reserve_bootmem_generic(ebda_addr, ebda_size);
448
449 #ifdef CONFIG_SMP
450 /*
451 * But first pinch a few for the stack/trampoline stuff
452 * FIXME: Don't need the extra page at 4K, but need to fix
453 * trampoline before removing it. (see the GDT stuff)
454 */
455 reserve_bootmem_generic(PAGE_SIZE, PAGE_SIZE);
456
457 /* Reserve SMP trampoline */
458 reserve_bootmem_generic(SMP_TRAMPOLINE_BASE, PAGE_SIZE);
459 #endif
460
461 #ifdef CONFIG_ACPI_SLEEP
462 /*
463 * Reserve low memory region for sleep support.
464 */
465 acpi_reserve_bootmem();
466 #endif
467 /*
468 * Find and reserve possible boot-time SMP configuration:
469 */
470 find_smp_config();
471 #ifdef CONFIG_BLK_DEV_INITRD
472 if (LOADER_TYPE && INITRD_START) {
473 if (INITRD_START + INITRD_SIZE <= (end_pfn << PAGE_SHIFT)) {
474 reserve_bootmem_generic(INITRD_START, INITRD_SIZE);
475 initrd_start =
476 INITRD_START ? INITRD_START + PAGE_OFFSET : 0;
477 initrd_end = initrd_start+INITRD_SIZE;
478 }
479 else {
480 printk(KERN_ERR "initrd extends beyond end of memory "
481 "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
482 (unsigned long)(INITRD_START + INITRD_SIZE),
483 (unsigned long)(end_pfn << PAGE_SHIFT));
484 initrd_start = 0;
485 }
486 }
487 #endif
488 #ifdef CONFIG_KEXEC
489 if (crashk_res.start != crashk_res.end) {
490 reserve_bootmem_generic(crashk_res.start,
491 crashk_res.end - crashk_res.start + 1);
492 }
493 #endif
494
495 paging_init();
496
497 early_quirks();
498
499 /*
500 * set this early, so we dont allocate cpu0
501 * if MADT list doesnt list BSP first
502 * mpparse.c/MP_processor_info() allocates logical cpu numbers.
503 */
504 cpu_set(0, cpu_present_map);
505 #ifdef CONFIG_ACPI
506 /*
507 * Read APIC and some other early information from ACPI tables.
508 */
509 acpi_boot_init();
510 #endif
511
512 init_cpu_to_node();
513
514 /*
515 * get boot-time SMP configuration:
516 */
517 if (smp_found_config)
518 get_smp_config();
519 init_apic_mappings();
520
521 /*
522 * Request address space for all standard RAM and ROM resources
523 * and also for regions reported as reserved by the e820.
524 */
525 probe_roms();
526 e820_reserve_resources();
527
528 request_resource(&iomem_resource, &video_ram_resource);
529
530 {
531 unsigned i;
532 /* request I/O space for devices used on all i[345]86 PCs */
533 for (i = 0; i < STANDARD_IO_RESOURCES; i++)
534 request_resource(&ioport_resource, &standard_io_resources[i]);
535 }
536
537 e820_setup_gap();
538
539 #ifdef CONFIG_VT
540 #if defined(CONFIG_VGA_CONSOLE)
541 conswitchp = &vga_con;
542 #elif defined(CONFIG_DUMMY_CONSOLE)
543 conswitchp = &dummy_con;
544 #endif
545 #endif
546 }
547
548 static int __cpuinit get_model_name(struct cpuinfo_x86 *c)
549 {
550 unsigned int *v;
551
552 if (c->extended_cpuid_level < 0x80000004)
553 return 0;
554
555 v = (unsigned int *) c->x86_model_id;
556 cpuid(0x80000002, &v[0], &v[1], &v[2], &v[3]);
557 cpuid(0x80000003, &v[4], &v[5], &v[6], &v[7]);
558 cpuid(0x80000004, &v[8], &v[9], &v[10], &v[11]);
559 c->x86_model_id[48] = 0;
560 return 1;
561 }
562
563
564 static void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c)
565 {
566 unsigned int n, dummy, eax, ebx, ecx, edx;
567
568 n = c->extended_cpuid_level;
569
570 if (n >= 0x80000005) {
571 cpuid(0x80000005, &dummy, &ebx, &ecx, &edx);
572 printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n",
573 edx>>24, edx&0xFF, ecx>>24, ecx&0xFF);
574 c->x86_cache_size=(ecx>>24)+(edx>>24);
575 /* On K8 L1 TLB is inclusive, so don't count it */
576 c->x86_tlbsize = 0;
577 }
578
579 if (n >= 0x80000006) {
580 cpuid(0x80000006, &dummy, &ebx, &ecx, &edx);
581 ecx = cpuid_ecx(0x80000006);
582 c->x86_cache_size = ecx >> 16;
583 c->x86_tlbsize += ((ebx >> 16) & 0xfff) + (ebx & 0xfff);
584
585 printk(KERN_INFO "CPU: L2 Cache: %dK (%d bytes/line)\n",
586 c->x86_cache_size, ecx & 0xFF);
587 }
588
589 if (n >= 0x80000007)
590 cpuid(0x80000007, &dummy, &dummy, &dummy, &c->x86_power);
591 if (n >= 0x80000008) {
592 cpuid(0x80000008, &eax, &dummy, &dummy, &dummy);
593 c->x86_virt_bits = (eax >> 8) & 0xff;
594 c->x86_phys_bits = eax & 0xff;
595 }
596 }
597
598 #ifdef CONFIG_NUMA
599 static int nearby_node(int apicid)
600 {
601 int i;
602 for (i = apicid - 1; i >= 0; i--) {
603 int node = apicid_to_node[i];
604 if (node != NUMA_NO_NODE && node_online(node))
605 return node;
606 }
607 for (i = apicid + 1; i < MAX_LOCAL_APIC; i++) {
608 int node = apicid_to_node[i];
609 if (node != NUMA_NO_NODE && node_online(node))
610 return node;
611 }
612 return first_node(node_online_map); /* Shouldn't happen */
613 }
614 #endif
615
616 /*
617 * On a AMD dual core setup the lower bits of the APIC id distingush the cores.
618 * Assumes number of cores is a power of two.
619 */
620 static void __init amd_detect_cmp(struct cpuinfo_x86 *c)
621 {
622 #ifdef CONFIG_SMP
623 unsigned bits;
624 #ifdef CONFIG_NUMA
625 int cpu = smp_processor_id();
626 int node = 0;
627 unsigned apicid = hard_smp_processor_id();
628 #endif
629 unsigned ecx = cpuid_ecx(0x80000008);
630
631 c->x86_max_cores = (ecx & 0xff) + 1;
632
633 /* CPU telling us the core id bits shift? */
634 bits = (ecx >> 12) & 0xF;
635
636 /* Otherwise recompute */
637 if (bits == 0) {
638 while ((1 << bits) < c->x86_max_cores)
639 bits++;
640 }
641
642 /* Low order bits define the core id (index of core in socket) */
643 c->cpu_core_id = c->phys_proc_id & ((1 << bits)-1);
644 /* Convert the APIC ID into the socket ID */
645 c->phys_proc_id = phys_pkg_id(bits);
646
647 #ifdef CONFIG_NUMA
648 node = c->phys_proc_id;
649 if (apicid_to_node[apicid] != NUMA_NO_NODE)
650 node = apicid_to_node[apicid];
651 if (!node_online(node)) {
652 /* Two possibilities here:
653 - The CPU is missing memory and no node was created.
654 In that case try picking one from a nearby CPU
655 - The APIC IDs differ from the HyperTransport node IDs
656 which the K8 northbridge parsing fills in.
657 Assume they are all increased by a constant offset,
658 but in the same order as the HT nodeids.
659 If that doesn't result in a usable node fall back to the
660 path for the previous case. */
661 int ht_nodeid = apicid - (cpu_data[0].phys_proc_id << bits);
662 if (ht_nodeid >= 0 &&
663 apicid_to_node[ht_nodeid] != NUMA_NO_NODE)
664 node = apicid_to_node[ht_nodeid];
665 /* Pick a nearby node */
666 if (!node_online(node))
667 node = nearby_node(apicid);
668 }
669 numa_set_node(cpu, node);
670
671 printk(KERN_INFO "CPU %d/%x -> Node %d\n", cpu, apicid, node);
672 #endif
673 #endif
674 }
675
676 static void __init init_amd(struct cpuinfo_x86 *c)
677 {
678 unsigned level;
679
680 #ifdef CONFIG_SMP
681 unsigned long value;
682
683 /*
684 * Disable TLB flush filter by setting HWCR.FFDIS on K8
685 * bit 6 of msr C001_0015
686 *
687 * Errata 63 for SH-B3 steppings
688 * Errata 122 for all steppings (F+ have it disabled by default)
689 */
690 if (c->x86 == 15) {
691 rdmsrl(MSR_K8_HWCR, value);
692 value |= 1 << 6;
693 wrmsrl(MSR_K8_HWCR, value);
694 }
695 #endif
696
697 /* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
698 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
699 clear_bit(0*32+31, &c->x86_capability);
700
701 /* On C+ stepping K8 rep microcode works well for copy/memset */
702 level = cpuid_eax(1);
703 if (c->x86 == 15 && ((level >= 0x0f48 && level < 0x0f50) || level >= 0x0f58))
704 set_bit(X86_FEATURE_REP_GOOD, &c->x86_capability);
705
706 /* Enable workaround for FXSAVE leak */
707 if (c->x86 >= 6)
708 set_bit(X86_FEATURE_FXSAVE_LEAK, &c->x86_capability);
709
710 level = get_model_name(c);
711 if (!level) {
712 switch (c->x86) {
713 case 15:
714 /* Should distinguish Models here, but this is only
715 a fallback anyways. */
716 strcpy(c->x86_model_id, "Hammer");
717 break;
718 }
719 }
720 display_cacheinfo(c);
721
722 /* c->x86_power is 8000_0007 edx. Bit 8 is constant TSC */
723 if (c->x86_power & (1<<8))
724 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
725
726 /* Multi core CPU? */
727 if (c->extended_cpuid_level >= 0x80000008)
728 amd_detect_cmp(c);
729
730 /* Fix cpuid4 emulation for more */
731 num_cache_leaves = 3;
732 }
733
734 static void __cpuinit detect_ht(struct cpuinfo_x86 *c)
735 {
736 #ifdef CONFIG_SMP
737 u32 eax, ebx, ecx, edx;
738 int index_msb, core_bits;
739
740 cpuid(1, &eax, &ebx, &ecx, &edx);
741
742
743 if (!cpu_has(c, X86_FEATURE_HT))
744 return;
745 if (cpu_has(c, X86_FEATURE_CMP_LEGACY))
746 goto out;
747
748 smp_num_siblings = (ebx & 0xff0000) >> 16;
749
750 if (smp_num_siblings == 1) {
751 printk(KERN_INFO "CPU: Hyper-Threading is disabled\n");
752 } else if (smp_num_siblings > 1 ) {
753
754 if (smp_num_siblings > NR_CPUS) {
755 printk(KERN_WARNING "CPU: Unsupported number of the siblings %d", smp_num_siblings);
756 smp_num_siblings = 1;
757 return;
758 }
759
760 index_msb = get_count_order(smp_num_siblings);
761 c->phys_proc_id = phys_pkg_id(index_msb);
762
763 smp_num_siblings = smp_num_siblings / c->x86_max_cores;
764
765 index_msb = get_count_order(smp_num_siblings) ;
766
767 core_bits = get_count_order(c->x86_max_cores);
768
769 c->cpu_core_id = phys_pkg_id(index_msb) &
770 ((1 << core_bits) - 1);
771 }
772 out:
773 if ((c->x86_max_cores * smp_num_siblings) > 1) {
774 printk(KERN_INFO "CPU: Physical Processor ID: %d\n", c->phys_proc_id);
775 printk(KERN_INFO "CPU: Processor Core ID: %d\n", c->cpu_core_id);
776 }
777
778 #endif
779 }
780
781 /*
782 * find out the number of processor cores on the die
783 */
784 static int __cpuinit intel_num_cpu_cores(struct cpuinfo_x86 *c)
785 {
786 unsigned int eax, t;
787
788 if (c->cpuid_level < 4)
789 return 1;
790
791 cpuid_count(4, 0, &eax, &t, &t, &t);
792
793 if (eax & 0x1f)
794 return ((eax >> 26) + 1);
795 else
796 return 1;
797 }
798
799 static void srat_detect_node(void)
800 {
801 #ifdef CONFIG_NUMA
802 unsigned node;
803 int cpu = smp_processor_id();
804 int apicid = hard_smp_processor_id();
805
806 /* Don't do the funky fallback heuristics the AMD version employs
807 for now. */
808 node = apicid_to_node[apicid];
809 if (node == NUMA_NO_NODE)
810 node = first_node(node_online_map);
811 numa_set_node(cpu, node);
812
813 printk(KERN_INFO "CPU %d/%x -> Node %d\n", cpu, apicid, node);
814 #endif
815 }
816
817 static void __cpuinit init_intel(struct cpuinfo_x86 *c)
818 {
819 /* Cache sizes */
820 unsigned n;
821
822 init_intel_cacheinfo(c);
823 if (c->cpuid_level > 9 ) {
824 unsigned eax = cpuid_eax(10);
825 /* Check for version and the number of counters */
826 if ((eax & 0xff) && (((eax>>8) & 0xff) > 1))
827 set_bit(X86_FEATURE_ARCH_PERFMON, &c->x86_capability);
828 }
829
830 n = c->extended_cpuid_level;
831 if (n >= 0x80000008) {
832 unsigned eax = cpuid_eax(0x80000008);
833 c->x86_virt_bits = (eax >> 8) & 0xff;
834 c->x86_phys_bits = eax & 0xff;
835 /* CPUID workaround for Intel 0F34 CPU */
836 if (c->x86_vendor == X86_VENDOR_INTEL &&
837 c->x86 == 0xF && c->x86_model == 0x3 &&
838 c->x86_mask == 0x4)
839 c->x86_phys_bits = 36;
840 }
841
842 if (c->x86 == 15)
843 c->x86_cache_alignment = c->x86_clflush_size * 2;
844 if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
845 (c->x86 == 0x6 && c->x86_model >= 0x0e))
846 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
847 set_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability);
848 c->x86_max_cores = intel_num_cpu_cores(c);
849
850 srat_detect_node();
851 }
852
853 static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c)
854 {
855 char *v = c->x86_vendor_id;
856
857 if (!strcmp(v, "AuthenticAMD"))
858 c->x86_vendor = X86_VENDOR_AMD;
859 else if (!strcmp(v, "GenuineIntel"))
860 c->x86_vendor = X86_VENDOR_INTEL;
861 else
862 c->x86_vendor = X86_VENDOR_UNKNOWN;
863 }
864
865 struct cpu_model_info {
866 int vendor;
867 int family;
868 char *model_names[16];
869 };
870
871 /* Do some early cpuid on the boot CPU to get some parameter that are
872 needed before check_bugs. Everything advanced is in identify_cpu
873 below. */
874 void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
875 {
876 u32 tfms;
877
878 c->loops_per_jiffy = loops_per_jiffy;
879 c->x86_cache_size = -1;
880 c->x86_vendor = X86_VENDOR_UNKNOWN;
881 c->x86_model = c->x86_mask = 0; /* So far unknown... */
882 c->x86_vendor_id[0] = '\0'; /* Unset */
883 c->x86_model_id[0] = '\0'; /* Unset */
884 c->x86_clflush_size = 64;
885 c->x86_cache_alignment = c->x86_clflush_size;
886 c->x86_max_cores = 1;
887 c->extended_cpuid_level = 0;
888 memset(&c->x86_capability, 0, sizeof c->x86_capability);
889
890 /* Get vendor name */
891 cpuid(0x00000000, (unsigned int *)&c->cpuid_level,
892 (unsigned int *)&c->x86_vendor_id[0],
893 (unsigned int *)&c->x86_vendor_id[8],
894 (unsigned int *)&c->x86_vendor_id[4]);
895
896 get_cpu_vendor(c);
897
898 /* Initialize the standard set of capabilities */
899 /* Note that the vendor-specific code below might override */
900
901 /* Intel-defined flags: level 0x00000001 */
902 if (c->cpuid_level >= 0x00000001) {
903 __u32 misc;
904 cpuid(0x00000001, &tfms, &misc, &c->x86_capability[4],
905 &c->x86_capability[0]);
906 c->x86 = (tfms >> 8) & 0xf;
907 c->x86_model = (tfms >> 4) & 0xf;
908 c->x86_mask = tfms & 0xf;
909 if (c->x86 == 0xf)
910 c->x86 += (tfms >> 20) & 0xff;
911 if (c->x86 >= 0x6)
912 c->x86_model += ((tfms >> 16) & 0xF) << 4;
913 if (c->x86_capability[0] & (1<<19))
914 c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;
915 } else {
916 /* Have CPUID level 0 only - unheard of */
917 c->x86 = 4;
918 }
919
920 #ifdef CONFIG_SMP
921 c->phys_proc_id = (cpuid_ebx(1) >> 24) & 0xff;
922 #endif
923 }
924
925 /*
926 * This does the hard work of actually picking apart the CPU stuff...
927 */
928 void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
929 {
930 int i;
931 u32 xlvl;
932
933 early_identify_cpu(c);
934
935 /* AMD-defined flags: level 0x80000001 */
936 xlvl = cpuid_eax(0x80000000);
937 c->extended_cpuid_level = xlvl;
938 if ((xlvl & 0xffff0000) == 0x80000000) {
939 if (xlvl >= 0x80000001) {
940 c->x86_capability[1] = cpuid_edx(0x80000001);
941 c->x86_capability[6] = cpuid_ecx(0x80000001);
942 }
943 if (xlvl >= 0x80000004)
944 get_model_name(c); /* Default name */
945 }
946
947 /* Transmeta-defined flags: level 0x80860001 */
948 xlvl = cpuid_eax(0x80860000);
949 if ((xlvl & 0xffff0000) == 0x80860000) {
950 /* Don't set x86_cpuid_level here for now to not confuse. */
951 if (xlvl >= 0x80860001)
952 c->x86_capability[2] = cpuid_edx(0x80860001);
953 }
954
955 c->apicid = phys_pkg_id(0);
956
957 /*
958 * Vendor-specific initialization. In this section we
959 * canonicalize the feature flags, meaning if there are
960 * features a certain CPU supports which CPUID doesn't
961 * tell us, CPUID claiming incorrect flags, or other bugs,
962 * we handle them here.
963 *
964 * At the end of this section, c->x86_capability better
965 * indicate the features this CPU genuinely supports!
966 */
967 switch (c->x86_vendor) {
968 case X86_VENDOR_AMD:
969 init_amd(c);
970 break;
971
972 case X86_VENDOR_INTEL:
973 init_intel(c);
974 break;
975
976 case X86_VENDOR_UNKNOWN:
977 default:
978 display_cacheinfo(c);
979 break;
980 }
981
982 select_idle_routine(c);
983 detect_ht(c);
984
985 /*
986 * On SMP, boot_cpu_data holds the common feature set between
987 * all CPUs; so make sure that we indicate which features are
988 * common between the CPUs. The first time this routine gets
989 * executed, c == &boot_cpu_data.
990 */
991 if (c != &boot_cpu_data) {
992 /* AND the already accumulated flags with these */
993 for (i = 0 ; i < NCAPINTS ; i++)
994 boot_cpu_data.x86_capability[i] &= c->x86_capability[i];
995 }
996
997 #ifdef CONFIG_X86_MCE
998 mcheck_init(c);
999 #endif
1000 if (c == &boot_cpu_data)
1001 mtrr_bp_init();
1002 else
1003 mtrr_ap_init();
1004 #ifdef CONFIG_NUMA
1005 numa_add_cpu(smp_processor_id());
1006 #endif
1007 }
1008
1009
1010 void __cpuinit print_cpu_info(struct cpuinfo_x86 *c)
1011 {
1012 if (c->x86_model_id[0])
1013 printk("%s", c->x86_model_id);
1014
1015 if (c->x86_mask || c->cpuid_level >= 0)
1016 printk(" stepping %02x\n", c->x86_mask);
1017 else
1018 printk("\n");
1019 }
1020
1021 /*
1022 * Get CPU information for use by the procfs.
1023 */
1024
1025 static int show_cpuinfo(struct seq_file *m, void *v)
1026 {
1027 struct cpuinfo_x86 *c = v;
1028
1029 /*
1030 * These flag bits must match the definitions in <asm/cpufeature.h>.
1031 * NULL means this bit is undefined or reserved; either way it doesn't
1032 * have meaning as far as Linux is concerned. Note that it's important
1033 * to realize there is a difference between this table and CPUID -- if
1034 * applications want to get the raw CPUID data, they should access
1035 * /dev/cpu/<cpu_nr>/cpuid instead.
1036 */
1037 static char *x86_cap_flags[] = {
1038 /* Intel-defined */
1039 "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
1040 "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
1041 "pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx",
1042 "fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", NULL,
1043
1044 /* AMD-defined */
1045 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1046 NULL, NULL, NULL, "syscall", NULL, NULL, NULL, NULL,
1047 NULL, NULL, NULL, NULL, "nx", NULL, "mmxext", NULL,
1048 NULL, "fxsr_opt", NULL, "rdtscp", NULL, "lm", "3dnowext", "3dnow",
1049
1050 /* Transmeta-defined */
1051 "recovery", "longrun", NULL, "lrti", NULL, NULL, NULL, NULL,
1052 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1053 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1054 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1055
1056 /* Other (Linux-defined) */
1057 "cxmmx", NULL, "cyrix_arr", "centaur_mcr", NULL,
1058 "constant_tsc", NULL, NULL,
1059 "up", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1060 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1061 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1062
1063 /* Intel-defined (#2) */
1064 "pni", NULL, NULL, "monitor", "ds_cpl", "vmx", "smx", "est",
1065 "tm2", NULL, "cid", NULL, NULL, "cx16", "xtpr", NULL,
1066 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1067 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1068
1069 /* VIA/Cyrix/Centaur-defined */
1070 NULL, NULL, "rng", "rng_en", NULL, NULL, "ace", "ace_en",
1071 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1072 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1073 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1074
1075 /* AMD-defined (#2) */
1076 "lahf_lm", "cmp_legacy", "svm", NULL, "cr8_legacy", NULL, NULL, NULL,
1077 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1078 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1079 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1080 };
1081 static char *x86_power_flags[] = {
1082 "ts", /* temperature sensor */
1083 "fid", /* frequency id control */
1084 "vid", /* voltage id control */
1085 "ttp", /* thermal trip */
1086 "tm",
1087 "stc",
1088 NULL,
1089 /* nothing */ /* constant_tsc - moved to flags */
1090 };
1091
1092
1093 #ifdef CONFIG_SMP
1094 if (!cpu_online(c-cpu_data))
1095 return 0;
1096 #endif
1097
1098 seq_printf(m,"processor\t: %u\n"
1099 "vendor_id\t: %s\n"
1100 "cpu family\t: %d\n"
1101 "model\t\t: %d\n"
1102 "model name\t: %s\n",
1103 (unsigned)(c-cpu_data),
1104 c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",
1105 c->x86,
1106 (int)c->x86_model,
1107 c->x86_model_id[0] ? c->x86_model_id : "unknown");
1108
1109 if (c->x86_mask || c->cpuid_level >= 0)
1110 seq_printf(m, "stepping\t: %d\n", c->x86_mask);
1111 else
1112 seq_printf(m, "stepping\t: unknown\n");
1113
1114 if (cpu_has(c,X86_FEATURE_TSC)) {
1115 unsigned int freq = cpufreq_quick_get((unsigned)(c-cpu_data));
1116 if (!freq)
1117 freq = cpu_khz;
1118 seq_printf(m, "cpu MHz\t\t: %u.%03u\n",
1119 freq / 1000, (freq % 1000));
1120 }
1121
1122 /* Cache size */
1123 if (c->x86_cache_size >= 0)
1124 seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);
1125
1126 #ifdef CONFIG_SMP
1127 if (smp_num_siblings * c->x86_max_cores > 1) {
1128 int cpu = c - cpu_data;
1129 seq_printf(m, "physical id\t: %d\n", c->phys_proc_id);
1130 seq_printf(m, "siblings\t: %d\n", cpus_weight(cpu_core_map[cpu]));
1131 seq_printf(m, "core id\t\t: %d\n", c->cpu_core_id);
1132 seq_printf(m, "cpu cores\t: %d\n", c->booted_cores);
1133 }
1134 #endif
1135
1136 seq_printf(m,
1137 "fpu\t\t: yes\n"
1138 "fpu_exception\t: yes\n"
1139 "cpuid level\t: %d\n"
1140 "wp\t\t: yes\n"
1141 "flags\t\t:",
1142 c->cpuid_level);
1143
1144 {
1145 int i;
1146 for ( i = 0 ; i < 32*NCAPINTS ; i++ )
1147 if (cpu_has(c, i) && x86_cap_flags[i] != NULL)
1148 seq_printf(m, " %s", x86_cap_flags[i]);
1149 }
1150
1151 seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
1152 c->loops_per_jiffy/(500000/HZ),
1153 (c->loops_per_jiffy/(5000/HZ)) % 100);
1154
1155 if (c->x86_tlbsize > 0)
1156 seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize);
1157 seq_printf(m, "clflush size\t: %d\n", c->x86_clflush_size);
1158 seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment);
1159
1160 seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n",
1161 c->x86_phys_bits, c->x86_virt_bits);
1162
1163 seq_printf(m, "power management:");
1164 {
1165 unsigned i;
1166 for (i = 0; i < 32; i++)
1167 if (c->x86_power & (1 << i)) {
1168 if (i < ARRAY_SIZE(x86_power_flags) &&
1169 x86_power_flags[i])
1170 seq_printf(m, "%s%s",
1171 x86_power_flags[i][0]?" ":"",
1172 x86_power_flags[i]);
1173 else
1174 seq_printf(m, " [%d]", i);
1175 }
1176 }
1177
1178 seq_printf(m, "\n\n");
1179
1180 return 0;
1181 }
1182
1183 static void *c_start(struct seq_file *m, loff_t *pos)
1184 {
1185 return *pos < NR_CPUS ? cpu_data + *pos : NULL;
1186 }
1187
1188 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1189 {
1190 ++*pos;
1191 return c_start(m, pos);
1192 }
1193
1194 static void c_stop(struct seq_file *m, void *v)
1195 {
1196 }
1197
1198 struct seq_operations cpuinfo_op = {
1199 .start =c_start,
1200 .next = c_next,
1201 .stop = c_stop,
1202 .show = show_cpuinfo,
1203 };
1204
1205 #if defined(CONFIG_INPUT_PCSPKR) || defined(CONFIG_INPUT_PCSPKR_MODULE)
1206 #include <linux/platform_device.h>
1207 static __init int add_pcspkr(void)
1208 {
1209 struct platform_device *pd;
1210 int ret;
1211
1212 pd = platform_device_alloc("pcspkr", -1);
1213 if (!pd)
1214 return -ENOMEM;
1215
1216 ret = platform_device_add(pd);
1217 if (ret)
1218 platform_device_put(pd);
1219
1220 return ret;
1221 }
1222 device_initcall(add_pcspkr);
1223 #endif
Linux kernel - Deliverables
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