2 * linux/arch/x86-64/kernel/setup.c
4 * Copyright (C) 1995 Linus Torvalds
6 * Nov 2001 Dave Jones <davej@suse.de>
7 * Forked from i386 setup code.
13 * This file handles the architecture-dependent parts of initialization
16 #include <linux/errno.h>
17 #include <linux/sched.h>
18 #include <linux/kernel.h>
20 #include <linux/stddef.h>
21 #include <linux/unistd.h>
22 #include <linux/ptrace.h>
23 #include <linux/slab.h>
24 #include <linux/user.h>
25 #include <linux/a.out.h>
26 #include <linux/tty.h>
27 #include <linux/ioport.h>
28 #include <linux/delay.h>
29 #include <linux/config.h>
30 #include <linux/init.h>
31 #include <linux/initrd.h>
32 #include <linux/highmem.h>
33 #include <linux/bootmem.h>
34 #include <linux/module.h>
35 #include <asm/processor.h>
36 #include <linux/console.h>
37 #include <linux/seq_file.h>
38 #include <linux/crash_dump.h>
39 #include <linux/root_dev.h>
40 #include <linux/pci.h>
41 #include <linux/acpi.h>
42 #include <linux/kallsyms.h>
43 #include <linux/edd.h>
44 #include <linux/mmzone.h>
45 #include <linux/kexec.h>
46 #include <linux/cpufreq.h>
47 #include <linux/dmi.h>
48 #include <linux/dma-mapping.h>
49 #include <linux/ctype.h>
52 #include <asm/uaccess.h>
53 #include <asm/system.h>
58 #include <video/edid.h>
61 #include <asm/mpspec.h>
62 #include <asm/mmu_context.h>
63 #include <asm/bootsetup.h>
64 #include <asm/proto.h>
65 #include <asm/setup.h>
66 #include <asm/mach_apic.h>
68 #include <asm/swiotlb.h>
69 #include <asm/sections.h>
70 #include <asm/gart-mapping.h>
77 struct cpuinfo_x86 boot_cpu_data __read_mostly
;
79 unsigned long mmu_cr4_features
;
82 EXPORT_SYMBOL(acpi_disabled
);
84 extern int __initdata acpi_ht
;
85 extern acpi_interrupt_flags acpi_sci_flags
;
86 int __initdata acpi_force
= 0;
89 int acpi_numa __initdata
;
91 /* Boot loader ID as an integer, for the benefit of proc_dointvec */
94 unsigned long saved_video_mode
;
100 char dmi_alloc_data
[DMI_MAX_DATA
];
105 struct screen_info screen_info
;
106 struct sys_desc_table_struct
{
107 unsigned short length
;
108 unsigned char table
[0];
111 struct edid_info edid_info
;
114 extern int root_mountflags
;
116 char command_line
[COMMAND_LINE_SIZE
];
118 struct resource standard_io_resources
[] = {
119 { .name
= "dma1", .start
= 0x00, .end
= 0x1f,
120 .flags
= IORESOURCE_BUSY
| IORESOURCE_IO
},
121 { .name
= "pic1", .start
= 0x20, .end
= 0x21,
122 .flags
= IORESOURCE_BUSY
| IORESOURCE_IO
},
123 { .name
= "timer0", .start
= 0x40, .end
= 0x43,
124 .flags
= IORESOURCE_BUSY
| IORESOURCE_IO
},
125 { .name
= "timer1", .start
= 0x50, .end
= 0x53,
126 .flags
= IORESOURCE_BUSY
| IORESOURCE_IO
},
127 { .name
= "keyboard", .start
= 0x60, .end
= 0x6f,
128 .flags
= IORESOURCE_BUSY
| IORESOURCE_IO
},
129 { .name
= "dma page reg", .start
= 0x80, .end
= 0x8f,
130 .flags
= IORESOURCE_BUSY
| IORESOURCE_IO
},
131 { .name
= "pic2", .start
= 0xa0, .end
= 0xa1,
132 .flags
= IORESOURCE_BUSY
| IORESOURCE_IO
},
133 { .name
= "dma2", .start
= 0xc0, .end
= 0xdf,
134 .flags
= IORESOURCE_BUSY
| IORESOURCE_IO
},
135 { .name
= "fpu", .start
= 0xf0, .end
= 0xff,
136 .flags
= IORESOURCE_BUSY
| IORESOURCE_IO
}
139 #define STANDARD_IO_RESOURCES \
140 (sizeof standard_io_resources / sizeof standard_io_resources[0])
142 #define IORESOURCE_RAM (IORESOURCE_BUSY | IORESOURCE_MEM)
144 struct resource data_resource
= {
145 .name
= "Kernel data",
148 .flags
= IORESOURCE_RAM
,
150 struct resource code_resource
= {
151 .name
= "Kernel code",
154 .flags
= IORESOURCE_RAM
,
157 #define IORESOURCE_ROM (IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM)
159 static struct resource system_rom_resource
= {
160 .name
= "System ROM",
163 .flags
= IORESOURCE_ROM
,
166 static struct resource extension_rom_resource
= {
167 .name
= "Extension ROM",
170 .flags
= IORESOURCE_ROM
,
173 static struct resource adapter_rom_resources
[] = {
174 { .name
= "Adapter ROM", .start
= 0xc8000, .end
= 0,
175 .flags
= IORESOURCE_ROM
},
176 { .name
= "Adapter ROM", .start
= 0, .end
= 0,
177 .flags
= IORESOURCE_ROM
},
178 { .name
= "Adapter ROM", .start
= 0, .end
= 0,
179 .flags
= IORESOURCE_ROM
},
180 { .name
= "Adapter ROM", .start
= 0, .end
= 0,
181 .flags
= IORESOURCE_ROM
},
182 { .name
= "Adapter ROM", .start
= 0, .end
= 0,
183 .flags
= IORESOURCE_ROM
},
184 { .name
= "Adapter ROM", .start
= 0, .end
= 0,
185 .flags
= IORESOURCE_ROM
}
188 #define ADAPTER_ROM_RESOURCES \
189 (sizeof adapter_rom_resources / sizeof adapter_rom_resources[0])
191 static struct resource video_rom_resource
= {
195 .flags
= IORESOURCE_ROM
,
198 static struct resource video_ram_resource
= {
199 .name
= "Video RAM area",
202 .flags
= IORESOURCE_RAM
,
205 #define romsignature(x) (*(unsigned short *)(x) == 0xaa55)
207 static int __init
romchecksum(unsigned char *rom
, unsigned long length
)
209 unsigned char *p
, sum
= 0;
211 for (p
= rom
; p
< rom
+ length
; p
++)
216 static void __init
probe_roms(void)
218 unsigned long start
, length
, upper
;
223 upper
= adapter_rom_resources
[0].start
;
224 for (start
= video_rom_resource
.start
; start
< upper
; start
+= 2048) {
225 rom
= isa_bus_to_virt(start
);
226 if (!romsignature(rom
))
229 video_rom_resource
.start
= start
;
231 /* 0 < length <= 0x7f * 512, historically */
232 length
= rom
[2] * 512;
234 /* if checksum okay, trust length byte */
235 if (length
&& romchecksum(rom
, length
))
236 video_rom_resource
.end
= start
+ length
- 1;
238 request_resource(&iomem_resource
, &video_rom_resource
);
242 start
= (video_rom_resource
.end
+ 1 + 2047) & ~2047UL;
247 request_resource(&iomem_resource
, &system_rom_resource
);
248 upper
= system_rom_resource
.start
;
250 /* check for extension rom (ignore length byte!) */
251 rom
= isa_bus_to_virt(extension_rom_resource
.start
);
252 if (romsignature(rom
)) {
253 length
= extension_rom_resource
.end
- extension_rom_resource
.start
+ 1;
254 if (romchecksum(rom
, length
)) {
255 request_resource(&iomem_resource
, &extension_rom_resource
);
256 upper
= extension_rom_resource
.start
;
260 /* check for adapter roms on 2k boundaries */
261 for (i
= 0; i
< ADAPTER_ROM_RESOURCES
&& start
< upper
; start
+= 2048) {
262 rom
= isa_bus_to_virt(start
);
263 if (!romsignature(rom
))
266 /* 0 < length <= 0x7f * 512, historically */
267 length
= rom
[2] * 512;
269 /* but accept any length that fits if checksum okay */
270 if (!length
|| start
+ length
> upper
|| !romchecksum(rom
, length
))
273 adapter_rom_resources
[i
].start
= start
;
274 adapter_rom_resources
[i
].end
= start
+ length
- 1;
275 request_resource(&iomem_resource
, &adapter_rom_resources
[i
]);
277 start
= adapter_rom_resources
[i
++].end
& ~2047UL;
281 /* Check for full argument with no trailing characters */
282 static int fullarg(char *p
, char *arg
)
285 return !memcmp(p
, arg
, l
) && (p
[l
] == 0 || isspace(p
[l
]));
288 static __init
void parse_cmdline_early (char ** cmdline_p
)
290 char c
= ' ', *to
= command_line
, *from
= COMMAND_LINE
;
300 * If the BIOS enumerates physical processors before logical,
301 * maxcpus=N at enumeration-time can be used to disable HT.
303 else if (!memcmp(from
, "maxcpus=", 8)) {
304 extern unsigned int maxcpus
;
306 maxcpus
= simple_strtoul(from
+ 8, NULL
, 0);
310 /* "acpi=off" disables both ACPI table parsing and interpreter init */
311 if (fullarg(from
,"acpi=off"))
314 if (fullarg(from
, "acpi=force")) {
315 /* add later when we do DMI horrors: */
320 /* acpi=ht just means: do ACPI MADT parsing
321 at bootup, but don't enable the full ACPI interpreter */
322 if (fullarg(from
, "acpi=ht")) {
327 else if (fullarg(from
, "pci=noacpi"))
329 else if (fullarg(from
, "acpi=noirq"))
332 else if (fullarg(from
, "acpi_sci=edge"))
333 acpi_sci_flags
.trigger
= 1;
334 else if (fullarg(from
, "acpi_sci=level"))
335 acpi_sci_flags
.trigger
= 3;
336 else if (fullarg(from
, "acpi_sci=high"))
337 acpi_sci_flags
.polarity
= 1;
338 else if (fullarg(from
, "acpi_sci=low"))
339 acpi_sci_flags
.polarity
= 3;
341 /* acpi=strict disables out-of-spec workarounds */
342 else if (fullarg(from
, "acpi=strict")) {
345 #ifdef CONFIG_X86_IO_APIC
346 else if (fullarg(from
, "acpi_skip_timer_override"))
347 acpi_skip_timer_override
= 1;
351 if (fullarg(from
, "disable_timer_pin_1"))
352 disable_timer_pin_1
= 1;
353 if (fullarg(from
, "enable_timer_pin_1"))
354 disable_timer_pin_1
= -1;
356 if (fullarg(from
, "nolapic") || fullarg(from
, "disableapic")) {
357 clear_bit(X86_FEATURE_APIC
, boot_cpu_data
.x86_capability
);
361 if (fullarg(from
, "noapic"))
362 skip_ioapic_setup
= 1;
364 if (fullarg(from
,"apic")) {
365 skip_ioapic_setup
= 0;
369 if (!memcmp(from
, "mem=", 4))
370 parse_memopt(from
+4, &from
);
372 if (!memcmp(from
, "memmap=", 7)) {
373 /* exactmap option is for used defined memory */
374 if (!memcmp(from
+7, "exactmap", 8)) {
375 #ifdef CONFIG_CRASH_DUMP
376 /* If we are doing a crash dump, we
377 * still need to know the real mem
378 * size before original memory map is
381 saved_max_pfn
= e820_end_of_ram();
389 parse_memmapopt(from
+7, &from
);
395 if (!memcmp(from
, "numa=", 5))
399 if (!memcmp(from
,"iommu=",6)) {
403 if (fullarg(from
,"oops=panic"))
406 if (!memcmp(from
, "noexec=", 7))
407 nonx_setup(from
+ 7);
410 /* crashkernel=size@addr specifies the location to reserve for
411 * a crash kernel. By reserving this memory we guarantee
412 * that linux never set's it up as a DMA target.
413 * Useful for holding code to do something appropriate
414 * after a kernel panic.
416 else if (!memcmp(from
, "crashkernel=", 12)) {
417 unsigned long size
, base
;
418 size
= memparse(from
+12, &from
);
420 base
= memparse(from
+1, &from
);
421 /* FIXME: Do I want a sanity check
422 * to validate the memory range?
424 crashk_res
.start
= base
;
425 crashk_res
.end
= base
+ size
- 1;
430 #ifdef CONFIG_PROC_VMCORE
431 /* elfcorehdr= specifies the location of elf core header
432 * stored by the crashed kernel. This option will be passed
433 * by kexec loader to the capture kernel.
435 else if(!memcmp(from
, "elfcorehdr=", 11))
436 elfcorehdr_addr
= memparse(from
+11, &from
);
439 #ifdef CONFIG_HOTPLUG_CPU
440 else if (!memcmp(from
, "additional_cpus=", 16))
441 setup_additional_cpus(from
+16);
448 if (COMMAND_LINE_SIZE
<= ++len
)
453 printk(KERN_INFO
"user-defined physical RAM map:\n");
454 e820_print_map("user");
457 *cmdline_p
= command_line
;
462 contig_initmem_init(unsigned long start_pfn
, unsigned long end_pfn
)
464 unsigned long bootmap_size
, bootmap
;
466 bootmap_size
= bootmem_bootmap_pages(end_pfn
)<<PAGE_SHIFT
;
467 bootmap
= find_e820_area(0, end_pfn
<<PAGE_SHIFT
, bootmap_size
);
469 panic("Cannot find bootmem map of size %ld\n",bootmap_size
);
470 bootmap_size
= init_bootmem(bootmap
>> PAGE_SHIFT
, end_pfn
);
471 e820_bootmem_free(NODE_DATA(0), 0, end_pfn
<< PAGE_SHIFT
);
472 reserve_bootmem(bootmap
, bootmap_size
);
476 /* Use inline assembly to define this because the nops are defined
477 as inline assembly strings in the include files and we cannot
478 get them easily into strings. */
479 asm("\t.data\nk8nops: "
480 K8_NOP1 K8_NOP2 K8_NOP3 K8_NOP4 K8_NOP5 K8_NOP6
483 extern unsigned char k8nops
[];
484 static unsigned char *k8_nops
[ASM_NOP_MAX
+1] = {
490 k8nops
+ 1 + 2 + 3 + 4,
491 k8nops
+ 1 + 2 + 3 + 4 + 5,
492 k8nops
+ 1 + 2 + 3 + 4 + 5 + 6,
493 k8nops
+ 1 + 2 + 3 + 4 + 5 + 6 + 7,
496 extern char __vsyscall_0
;
498 /* Replace instructions with better alternatives for this CPU type.
500 This runs before SMP is initialized to avoid SMP problems with
501 self modifying code. This implies that assymetric systems where
502 APs have less capabilities than the boot processor are not handled.
503 In this case boot with "noreplacement". */
504 void apply_alternatives(void *start
, void *end
)
508 for (a
= start
; (void *)a
< end
; a
++) {
511 if (!boot_cpu_has(a
->cpuid
))
514 BUG_ON(a
->replacementlen
> a
->instrlen
);
516 /* vsyscall code is not mapped yet. resolve it manually. */
517 if (instr
>= (u8
*)VSYSCALL_START
&& instr
< (u8
*)VSYSCALL_END
)
518 instr
= __va(instr
- (u8
*)VSYSCALL_START
+ (u8
*)__pa_symbol(&__vsyscall_0
));
519 __inline_memcpy(instr
, a
->replacement
, a
->replacementlen
);
520 diff
= a
->instrlen
- a
->replacementlen
;
522 /* Pad the rest with nops */
523 for (i
= a
->replacementlen
; diff
> 0; diff
-= k
, i
+= k
) {
527 __inline_memcpy(instr
+ i
, k8_nops
[k
], k
);
532 static int no_replacement __initdata
= 0;
534 void __init
alternative_instructions(void)
536 extern struct alt_instr __alt_instructions
[], __alt_instructions_end
[];
539 apply_alternatives(__alt_instructions
, __alt_instructions_end
);
542 static int __init
noreplacement_setup(char *s
)
548 __setup("noreplacement", noreplacement_setup
);
550 #if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE)
552 #ifdef CONFIG_EDD_MODULE
556 * copy_edd() - Copy the BIOS EDD information
557 * from boot_params into a safe place.
560 static inline void copy_edd(void)
562 memcpy(edd
.mbr_signature
, EDD_MBR_SIGNATURE
, sizeof(edd
.mbr_signature
));
563 memcpy(edd
.edd_info
, EDD_BUF
, sizeof(edd
.edd_info
));
564 edd
.mbr_signature_nr
= EDD_MBR_SIG_NR
;
565 edd
.edd_info_nr
= EDD_NR
;
568 static inline void copy_edd(void)
573 #define EBDA_ADDR_POINTER 0x40E
575 unsigned __initdata ebda_addr
;
576 unsigned __initdata ebda_size
;
578 static void discover_ebda(void)
581 * there is a real-mode segmented pointer pointing to the
582 * 4K EBDA area at 0x40E
584 ebda_addr
= *(unsigned short *)EBDA_ADDR_POINTER
;
587 ebda_size
= *(unsigned short *)(unsigned long)ebda_addr
;
589 /* Round EBDA up to pages */
593 ebda_size
= round_up(ebda_size
+ (ebda_addr
& ~PAGE_MASK
), PAGE_SIZE
);
594 if (ebda_size
> 64*1024)
598 void __init
setup_arch(char **cmdline_p
)
600 unsigned long kernel_end
;
602 ROOT_DEV
= old_decode_dev(ORIG_ROOT_DEV
);
603 screen_info
= SCREEN_INFO
;
604 edid_info
= EDID_INFO
;
605 saved_video_mode
= SAVED_VIDEO_MODE
;
606 bootloader_type
= LOADER_TYPE
;
608 #ifdef CONFIG_BLK_DEV_RAM
609 rd_image_start
= RAMDISK_FLAGS
& RAMDISK_IMAGE_START_MASK
;
610 rd_prompt
= ((RAMDISK_FLAGS
& RAMDISK_PROMPT_FLAG
) != 0);
611 rd_doload
= ((RAMDISK_FLAGS
& RAMDISK_LOAD_FLAG
) != 0);
613 setup_memory_region();
616 if (!MOUNT_ROOT_RDONLY
)
617 root_mountflags
&= ~MS_RDONLY
;
618 init_mm
.start_code
= (unsigned long) &_text
;
619 init_mm
.end_code
= (unsigned long) &_etext
;
620 init_mm
.end_data
= (unsigned long) &_edata
;
621 init_mm
.brk
= (unsigned long) &_end
;
623 code_resource
.start
= virt_to_phys(&_text
);
624 code_resource
.end
= virt_to_phys(&_etext
)-1;
625 data_resource
.start
= virt_to_phys(&_etext
);
626 data_resource
.end
= virt_to_phys(&_edata
)-1;
628 parse_cmdline_early(cmdline_p
);
630 early_identify_cpu(&boot_cpu_data
);
633 * partially used pages are not usable - thus
634 * we are rounding upwards:
636 end_pfn
= e820_end_of_ram();
637 num_physpages
= end_pfn
; /* for pfn_valid */
643 init_memory_mapping(0, (end_pfn_map
<< PAGE_SHIFT
));
651 * Initialize the ACPI boot-time table parser (gets the RSDP and SDT).
652 * Call this early for SRAT node setup.
654 acpi_boot_table_init();
657 #ifdef CONFIG_ACPI_NUMA
659 * Parse SRAT to discover nodes.
665 numa_initmem_init(0, end_pfn
);
667 contig_initmem_init(0, end_pfn
);
670 /* Reserve direct mapping */
671 reserve_bootmem_generic(table_start
<< PAGE_SHIFT
,
672 (table_end
- table_start
) << PAGE_SHIFT
);
675 kernel_end
= round_up(__pa_symbol(&_end
),PAGE_SIZE
);
676 reserve_bootmem_generic(HIGH_MEMORY
, kernel_end
- HIGH_MEMORY
);
679 * reserve physical page 0 - it's a special BIOS page on many boxes,
680 * enabling clean reboots, SMP operation, laptop functions.
682 reserve_bootmem_generic(0, PAGE_SIZE
);
684 /* reserve ebda region */
686 reserve_bootmem_generic(ebda_addr
, ebda_size
);
690 * But first pinch a few for the stack/trampoline stuff
691 * FIXME: Don't need the extra page at 4K, but need to fix
692 * trampoline before removing it. (see the GDT stuff)
694 reserve_bootmem_generic(PAGE_SIZE
, PAGE_SIZE
);
696 /* Reserve SMP trampoline */
697 reserve_bootmem_generic(SMP_TRAMPOLINE_BASE
, PAGE_SIZE
);
700 #ifdef CONFIG_ACPI_SLEEP
702 * Reserve low memory region for sleep support.
704 acpi_reserve_bootmem();
706 #ifdef CONFIG_X86_LOCAL_APIC
708 * Find and reserve possible boot-time SMP configuration:
712 #ifdef CONFIG_BLK_DEV_INITRD
713 if (LOADER_TYPE
&& INITRD_START
) {
714 if (INITRD_START
+ INITRD_SIZE
<= (end_pfn
<< PAGE_SHIFT
)) {
715 reserve_bootmem_generic(INITRD_START
, INITRD_SIZE
);
717 INITRD_START
? INITRD_START
+ PAGE_OFFSET
: 0;
718 initrd_end
= initrd_start
+INITRD_SIZE
;
721 printk(KERN_ERR
"initrd extends beyond end of memory "
722 "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
723 (unsigned long)(INITRD_START
+ INITRD_SIZE
),
724 (unsigned long)(end_pfn
<< PAGE_SHIFT
));
730 if (crashk_res
.start
!= crashk_res
.end
) {
731 reserve_bootmem_generic(crashk_res
.start
,
732 crashk_res
.end
- crashk_res
.start
+ 1);
741 * set this early, so we dont allocate cpu0
742 * if MADT list doesnt list BSP first
743 * mpparse.c/MP_processor_info() allocates logical cpu numbers.
745 cpu_set(0, cpu_present_map
);
748 * Read APIC and some other early information from ACPI tables.
755 #ifdef CONFIG_X86_LOCAL_APIC
757 * get boot-time SMP configuration:
759 if (smp_found_config
)
761 init_apic_mappings();
765 * Request address space for all standard RAM and ROM resources
766 * and also for regions reported as reserved by the e820.
769 e820_reserve_resources();
771 request_resource(&iomem_resource
, &video_ram_resource
);
775 /* request I/O space for devices used on all i[345]86 PCs */
776 for (i
= 0; i
< STANDARD_IO_RESOURCES
; i
++)
777 request_resource(&ioport_resource
, &standard_io_resources
[i
]);
782 #ifdef CONFIG_GART_IOMMU
787 #if defined(CONFIG_VGA_CONSOLE)
788 conswitchp
= &vga_con
;
789 #elif defined(CONFIG_DUMMY_CONSOLE)
790 conswitchp
= &dummy_con
;
795 static int __cpuinit
get_model_name(struct cpuinfo_x86
*c
)
799 if (c
->extended_cpuid_level
< 0x80000004)
802 v
= (unsigned int *) c
->x86_model_id
;
803 cpuid(0x80000002, &v
[0], &v
[1], &v
[2], &v
[3]);
804 cpuid(0x80000003, &v
[4], &v
[5], &v
[6], &v
[7]);
805 cpuid(0x80000004, &v
[8], &v
[9], &v
[10], &v
[11]);
806 c
->x86_model_id
[48] = 0;
811 static void __cpuinit
display_cacheinfo(struct cpuinfo_x86
*c
)
813 unsigned int n
, dummy
, eax
, ebx
, ecx
, edx
;
815 n
= c
->extended_cpuid_level
;
817 if (n
>= 0x80000005) {
818 cpuid(0x80000005, &dummy
, &ebx
, &ecx
, &edx
);
819 printk(KERN_INFO
"CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n",
820 edx
>>24, edx
&0xFF, ecx
>>24, ecx
&0xFF);
821 c
->x86_cache_size
=(ecx
>>24)+(edx
>>24);
822 /* On K8 L1 TLB is inclusive, so don't count it */
826 if (n
>= 0x80000006) {
827 cpuid(0x80000006, &dummy
, &ebx
, &ecx
, &edx
);
828 ecx
= cpuid_ecx(0x80000006);
829 c
->x86_cache_size
= ecx
>> 16;
830 c
->x86_tlbsize
+= ((ebx
>> 16) & 0xfff) + (ebx
& 0xfff);
832 printk(KERN_INFO
"CPU: L2 Cache: %dK (%d bytes/line)\n",
833 c
->x86_cache_size
, ecx
& 0xFF);
837 cpuid(0x80000007, &dummy
, &dummy
, &dummy
, &c
->x86_power
);
838 if (n
>= 0x80000008) {
839 cpuid(0x80000008, &eax
, &dummy
, &dummy
, &dummy
);
840 c
->x86_virt_bits
= (eax
>> 8) & 0xff;
841 c
->x86_phys_bits
= eax
& 0xff;
846 static int nearby_node(int apicid
)
849 for (i
= apicid
- 1; i
>= 0; i
--) {
850 int node
= apicid_to_node
[i
];
851 if (node
!= NUMA_NO_NODE
&& node_online(node
))
854 for (i
= apicid
+ 1; i
< MAX_LOCAL_APIC
; i
++) {
855 int node
= apicid_to_node
[i
];
856 if (node
!= NUMA_NO_NODE
&& node_online(node
))
859 return first_node(node_online_map
); /* Shouldn't happen */
864 * On a AMD dual core setup the lower bits of the APIC id distingush the cores.
865 * Assumes number of cores is a power of two.
867 static void __init
amd_detect_cmp(struct cpuinfo_x86
*c
)
870 int cpu
= smp_processor_id();
874 unsigned apicid
= hard_smp_processor_id();
876 unsigned ecx
= cpuid_ecx(0x80000008);
878 c
->x86_max_cores
= (ecx
& 0xff) + 1;
880 /* CPU telling us the core id bits shift? */
881 bits
= (ecx
>> 12) & 0xF;
883 /* Otherwise recompute */
885 while ((1 << bits
) < c
->x86_max_cores
)
889 /* Low order bits define the core id (index of core in socket) */
890 cpu_core_id
[cpu
] = phys_proc_id
[cpu
] & ((1 << bits
)-1);
891 /* Convert the APIC ID into the socket ID */
892 phys_proc_id
[cpu
] = phys_pkg_id(bits
);
895 node
= phys_proc_id
[cpu
];
896 if (apicid_to_node
[apicid
] != NUMA_NO_NODE
)
897 node
= apicid_to_node
[apicid
];
898 if (!node_online(node
)) {
899 /* Two possibilities here:
900 - The CPU is missing memory and no node was created.
901 In that case try picking one from a nearby CPU
902 - The APIC IDs differ from the HyperTransport node IDs
903 which the K8 northbridge parsing fills in.
904 Assume they are all increased by a constant offset,
905 but in the same order as the HT nodeids.
906 If that doesn't result in a usable node fall back to the
907 path for the previous case. */
908 int ht_nodeid
= apicid
- (phys_proc_id
[0] << bits
);
909 if (ht_nodeid
>= 0 &&
910 apicid_to_node
[ht_nodeid
] != NUMA_NO_NODE
)
911 node
= apicid_to_node
[ht_nodeid
];
912 /* Pick a nearby node */
913 if (!node_online(node
))
914 node
= nearby_node(apicid
);
916 numa_set_node(cpu
, node
);
918 printk(KERN_INFO
"CPU %d/%x(%d) -> Node %d -> Core %d\n",
919 cpu
, apicid
, c
->x86_max_cores
, node
, cpu_core_id
[cpu
]);
924 static int __init
init_amd(struct cpuinfo_x86
*c
)
933 * Disable TLB flush filter by setting HWCR.FFDIS on K8
934 * bit 6 of msr C001_0015
936 * Errata 63 for SH-B3 steppings
937 * Errata 122 for all steppings (F+ have it disabled by default)
940 rdmsrl(MSR_K8_HWCR
, value
);
942 wrmsrl(MSR_K8_HWCR
, value
);
946 /* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
947 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
948 clear_bit(0*32+31, &c
->x86_capability
);
950 /* On C+ stepping K8 rep microcode works well for copy/memset */
951 level
= cpuid_eax(1);
952 if (c
->x86
== 15 && ((level
>= 0x0f48 && level
< 0x0f50) || level
>= 0x0f58))
953 set_bit(X86_FEATURE_REP_GOOD
, &c
->x86_capability
);
955 /* Enable workaround for FXSAVE leak */
957 set_bit(X86_FEATURE_FXSAVE_LEAK
, &c
->x86_capability
);
959 r
= get_model_name(c
);
963 /* Should distinguish Models here, but this is only
964 a fallback anyways. */
965 strcpy(c
->x86_model_id
, "Hammer");
969 display_cacheinfo(c
);
971 /* c->x86_power is 8000_0007 edx. Bit 8 is constant TSC */
972 if (c
->x86_power
& (1<<8))
973 set_bit(X86_FEATURE_CONSTANT_TSC
, &c
->x86_capability
);
975 /* Multi core CPU? */
976 if (c
->extended_cpuid_level
>= 0x80000008)
982 static void __cpuinit
detect_ht(struct cpuinfo_x86
*c
)
985 u32 eax
, ebx
, ecx
, edx
;
986 int index_msb
, core_bits
;
987 int cpu
= smp_processor_id();
989 cpuid(1, &eax
, &ebx
, &ecx
, &edx
);
992 if (!cpu_has(c
, X86_FEATURE_HT
) || cpu_has(c
, X86_FEATURE_CMP_LEGACY
))
995 smp_num_siblings
= (ebx
& 0xff0000) >> 16;
997 if (smp_num_siblings
== 1) {
998 printk(KERN_INFO
"CPU: Hyper-Threading is disabled\n");
999 } else if (smp_num_siblings
> 1 ) {
1001 if (smp_num_siblings
> NR_CPUS
) {
1002 printk(KERN_WARNING
"CPU: Unsupported number of the siblings %d", smp_num_siblings
);
1003 smp_num_siblings
= 1;
1007 index_msb
= get_count_order(smp_num_siblings
);
1008 phys_proc_id
[cpu
] = phys_pkg_id(index_msb
);
1010 printk(KERN_INFO
"CPU: Physical Processor ID: %d\n",
1013 smp_num_siblings
= smp_num_siblings
/ c
->x86_max_cores
;
1015 index_msb
= get_count_order(smp_num_siblings
) ;
1017 core_bits
= get_count_order(c
->x86_max_cores
);
1019 cpu_core_id
[cpu
] = phys_pkg_id(index_msb
) &
1020 ((1 << core_bits
) - 1);
1022 if (c
->x86_max_cores
> 1)
1023 printk(KERN_INFO
"CPU: Processor Core ID: %d\n",
1030 * find out the number of processor cores on the die
1032 static int __cpuinit
intel_num_cpu_cores(struct cpuinfo_x86
*c
)
1036 if (c
->cpuid_level
< 4)
1045 return ((eax
>> 26) + 1);
1050 static void srat_detect_node(void)
1054 int cpu
= smp_processor_id();
1056 /* Don't do the funky fallback heuristics the AMD version employs
1058 node
= apicid_to_node
[hard_smp_processor_id()];
1059 if (node
== NUMA_NO_NODE
)
1060 node
= first_node(node_online_map
);
1061 numa_set_node(cpu
, node
);
1064 printk(KERN_INFO
"CPU %d -> Node %d\n", cpu
, node
);
1068 static void __cpuinit
init_intel(struct cpuinfo_x86
*c
)
1073 init_intel_cacheinfo(c
);
1074 n
= c
->extended_cpuid_level
;
1075 if (n
>= 0x80000008) {
1076 unsigned eax
= cpuid_eax(0x80000008);
1077 c
->x86_virt_bits
= (eax
>> 8) & 0xff;
1078 c
->x86_phys_bits
= eax
& 0xff;
1079 /* CPUID workaround for Intel 0F34 CPU */
1080 if (c
->x86_vendor
== X86_VENDOR_INTEL
&&
1081 c
->x86
== 0xF && c
->x86_model
== 0x3 &&
1083 c
->x86_phys_bits
= 36;
1087 c
->x86_cache_alignment
= c
->x86_clflush_size
* 2;
1088 if ((c
->x86
== 0xf && c
->x86_model
>= 0x03) ||
1089 (c
->x86
== 0x6 && c
->x86_model
>= 0x0e))
1090 set_bit(X86_FEATURE_CONSTANT_TSC
, &c
->x86_capability
);
1091 set_bit(X86_FEATURE_SYNC_RDTSC
, &c
->x86_capability
);
1092 c
->x86_max_cores
= intel_num_cpu_cores(c
);
1097 static void __cpuinit
get_cpu_vendor(struct cpuinfo_x86
*c
)
1099 char *v
= c
->x86_vendor_id
;
1101 if (!strcmp(v
, "AuthenticAMD"))
1102 c
->x86_vendor
= X86_VENDOR_AMD
;
1103 else if (!strcmp(v
, "GenuineIntel"))
1104 c
->x86_vendor
= X86_VENDOR_INTEL
;
1106 c
->x86_vendor
= X86_VENDOR_UNKNOWN
;
1109 struct cpu_model_info
{
1112 char *model_names
[16];
1115 /* Do some early cpuid on the boot CPU to get some parameter that are
1116 needed before check_bugs. Everything advanced is in identify_cpu
1118 void __cpuinit
early_identify_cpu(struct cpuinfo_x86
*c
)
1122 c
->loops_per_jiffy
= loops_per_jiffy
;
1123 c
->x86_cache_size
= -1;
1124 c
->x86_vendor
= X86_VENDOR_UNKNOWN
;
1125 c
->x86_model
= c
->x86_mask
= 0; /* So far unknown... */
1126 c
->x86_vendor_id
[0] = '\0'; /* Unset */
1127 c
->x86_model_id
[0] = '\0'; /* Unset */
1128 c
->x86_clflush_size
= 64;
1129 c
->x86_cache_alignment
= c
->x86_clflush_size
;
1130 c
->x86_max_cores
= 1;
1131 c
->extended_cpuid_level
= 0;
1132 memset(&c
->x86_capability
, 0, sizeof c
->x86_capability
);
1134 /* Get vendor name */
1135 cpuid(0x00000000, (unsigned int *)&c
->cpuid_level
,
1136 (unsigned int *)&c
->x86_vendor_id
[0],
1137 (unsigned int *)&c
->x86_vendor_id
[8],
1138 (unsigned int *)&c
->x86_vendor_id
[4]);
1142 /* Initialize the standard set of capabilities */
1143 /* Note that the vendor-specific code below might override */
1145 /* Intel-defined flags: level 0x00000001 */
1146 if (c
->cpuid_level
>= 0x00000001) {
1148 cpuid(0x00000001, &tfms
, &misc
, &c
->x86_capability
[4],
1149 &c
->x86_capability
[0]);
1150 c
->x86
= (tfms
>> 8) & 0xf;
1151 c
->x86_model
= (tfms
>> 4) & 0xf;
1152 c
->x86_mask
= tfms
& 0xf;
1154 c
->x86
+= (tfms
>> 20) & 0xff;
1156 c
->x86_model
+= ((tfms
>> 16) & 0xF) << 4;
1157 if (c
->x86_capability
[0] & (1<<19))
1158 c
->x86_clflush_size
= ((misc
>> 8) & 0xff) * 8;
1160 /* Have CPUID level 0 only - unheard of */
1165 phys_proc_id
[smp_processor_id()] = (cpuid_ebx(1) >> 24) & 0xff;
1170 * This does the hard work of actually picking apart the CPU stuff...
1172 void __cpuinit
identify_cpu(struct cpuinfo_x86
*c
)
1177 early_identify_cpu(c
);
1179 /* AMD-defined flags: level 0x80000001 */
1180 xlvl
= cpuid_eax(0x80000000);
1181 c
->extended_cpuid_level
= xlvl
;
1182 if ((xlvl
& 0xffff0000) == 0x80000000) {
1183 if (xlvl
>= 0x80000001) {
1184 c
->x86_capability
[1] = cpuid_edx(0x80000001);
1185 c
->x86_capability
[6] = cpuid_ecx(0x80000001);
1187 if (xlvl
>= 0x80000004)
1188 get_model_name(c
); /* Default name */
1191 /* Transmeta-defined flags: level 0x80860001 */
1192 xlvl
= cpuid_eax(0x80860000);
1193 if ((xlvl
& 0xffff0000) == 0x80860000) {
1194 /* Don't set x86_cpuid_level here for now to not confuse. */
1195 if (xlvl
>= 0x80860001)
1196 c
->x86_capability
[2] = cpuid_edx(0x80860001);
1199 c
->apicid
= phys_pkg_id(0);
1202 * Vendor-specific initialization. In this section we
1203 * canonicalize the feature flags, meaning if there are
1204 * features a certain CPU supports which CPUID doesn't
1205 * tell us, CPUID claiming incorrect flags, or other bugs,
1206 * we handle them here.
1208 * At the end of this section, c->x86_capability better
1209 * indicate the features this CPU genuinely supports!
1211 switch (c
->x86_vendor
) {
1212 case X86_VENDOR_AMD
:
1216 case X86_VENDOR_INTEL
:
1220 case X86_VENDOR_UNKNOWN
:
1222 display_cacheinfo(c
);
1226 select_idle_routine(c
);
1230 * On SMP, boot_cpu_data holds the common feature set between
1231 * all CPUs; so make sure that we indicate which features are
1232 * common between the CPUs. The first time this routine gets
1233 * executed, c == &boot_cpu_data.
1235 if (c
!= &boot_cpu_data
) {
1236 /* AND the already accumulated flags with these */
1237 for (i
= 0 ; i
< NCAPINTS
; i
++)
1238 boot_cpu_data
.x86_capability
[i
] &= c
->x86_capability
[i
];
1241 #ifdef CONFIG_X86_MCE
1244 if (c
== &boot_cpu_data
)
1249 numa_add_cpu(smp_processor_id());
1254 void __cpuinit
print_cpu_info(struct cpuinfo_x86
*c
)
1256 if (c
->x86_model_id
[0])
1257 printk("%s", c
->x86_model_id
);
1259 if (c
->x86_mask
|| c
->cpuid_level
>= 0)
1260 printk(" stepping %02x\n", c
->x86_mask
);
1266 * Get CPU information for use by the procfs.
1269 static int show_cpuinfo(struct seq_file
*m
, void *v
)
1271 struct cpuinfo_x86
*c
= v
;
1274 * These flag bits must match the definitions in <asm/cpufeature.h>.
1275 * NULL means this bit is undefined or reserved; either way it doesn't
1276 * have meaning as far as Linux is concerned. Note that it's important
1277 * to realize there is a difference between this table and CPUID -- if
1278 * applications want to get the raw CPUID data, they should access
1279 * /dev/cpu/<cpu_nr>/cpuid instead.
1281 static char *x86_cap_flags
[] = {
1283 "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
1284 "cx8", "apic", NULL
, "sep", "mtrr", "pge", "mca", "cmov",
1285 "pat", "pse36", "pn", "clflush", NULL
, "dts", "acpi", "mmx",
1286 "fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", NULL
,
1289 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1290 NULL
, NULL
, NULL
, "syscall", NULL
, NULL
, NULL
, NULL
,
1291 NULL
, NULL
, NULL
, NULL
, "nx", NULL
, "mmxext", NULL
,
1292 NULL
, "fxsr_opt", "rdtscp", NULL
, NULL
, "lm", "3dnowext", "3dnow",
1294 /* Transmeta-defined */
1295 "recovery", "longrun", NULL
, "lrti", NULL
, NULL
, NULL
, NULL
,
1296 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1297 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1298 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1300 /* Other (Linux-defined) */
1301 "cxmmx", NULL
, "cyrix_arr", "centaur_mcr", NULL
,
1302 "constant_tsc", NULL
, NULL
,
1303 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1304 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1305 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1307 /* Intel-defined (#2) */
1308 "pni", NULL
, NULL
, "monitor", "ds_cpl", "vmx", "smx", "est",
1309 "tm2", NULL
, "cid", NULL
, NULL
, "cx16", "xtpr", NULL
,
1310 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1311 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1313 /* VIA/Cyrix/Centaur-defined */
1314 NULL
, NULL
, "rng", "rng_en", NULL
, NULL
, "ace", "ace_en",
1315 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1316 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1317 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1319 /* AMD-defined (#2) */
1320 "lahf_lm", "cmp_legacy", "svm", NULL
, "cr8_legacy", NULL
, NULL
, NULL
,
1321 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1322 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1323 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
1325 static char *x86_power_flags
[] = {
1326 "ts", /* temperature sensor */
1327 "fid", /* frequency id control */
1328 "vid", /* voltage id control */
1329 "ttp", /* thermal trip */
1333 /* nothing */ /* constant_tsc - moved to flags */
1338 if (!cpu_online(c
-cpu_data
))
1342 seq_printf(m
,"processor\t: %u\n"
1344 "cpu family\t: %d\n"
1346 "model name\t: %s\n",
1347 (unsigned)(c
-cpu_data
),
1348 c
->x86_vendor_id
[0] ? c
->x86_vendor_id
: "unknown",
1351 c
->x86_model_id
[0] ? c
->x86_model_id
: "unknown");
1353 if (c
->x86_mask
|| c
->cpuid_level
>= 0)
1354 seq_printf(m
, "stepping\t: %d\n", c
->x86_mask
);
1356 seq_printf(m
, "stepping\t: unknown\n");
1358 if (cpu_has(c
,X86_FEATURE_TSC
)) {
1359 unsigned int freq
= cpufreq_quick_get((unsigned)(c
-cpu_data
));
1362 seq_printf(m
, "cpu MHz\t\t: %u.%03u\n",
1363 freq
/ 1000, (freq
% 1000));
1367 if (c
->x86_cache_size
>= 0)
1368 seq_printf(m
, "cache size\t: %d KB\n", c
->x86_cache_size
);
1371 if (smp_num_siblings
* c
->x86_max_cores
> 1) {
1372 int cpu
= c
- cpu_data
;
1373 seq_printf(m
, "physical id\t: %d\n", phys_proc_id
[cpu
]);
1374 seq_printf(m
, "siblings\t: %d\n", cpus_weight(cpu_core_map
[cpu
]));
1375 seq_printf(m
, "core id\t\t: %d\n", cpu_core_id
[cpu
]);
1376 seq_printf(m
, "cpu cores\t: %d\n", c
->booted_cores
);
1382 "fpu_exception\t: yes\n"
1383 "cpuid level\t: %d\n"
1390 for ( i
= 0 ; i
< 32*NCAPINTS
; i
++ )
1391 if (cpu_has(c
, i
) && x86_cap_flags
[i
] != NULL
)
1392 seq_printf(m
, " %s", x86_cap_flags
[i
]);
1395 seq_printf(m
, "\nbogomips\t: %lu.%02lu\n",
1396 c
->loops_per_jiffy
/(500000/HZ
),
1397 (c
->loops_per_jiffy
/(5000/HZ
)) % 100);
1399 if (c
->x86_tlbsize
> 0)
1400 seq_printf(m
, "TLB size\t: %d 4K pages\n", c
->x86_tlbsize
);
1401 seq_printf(m
, "clflush size\t: %d\n", c
->x86_clflush_size
);
1402 seq_printf(m
, "cache_alignment\t: %d\n", c
->x86_cache_alignment
);
1404 seq_printf(m
, "address sizes\t: %u bits physical, %u bits virtual\n",
1405 c
->x86_phys_bits
, c
->x86_virt_bits
);
1407 seq_printf(m
, "power management:");
1410 for (i
= 0; i
< 32; i
++)
1411 if (c
->x86_power
& (1 << i
)) {
1412 if (i
< ARRAY_SIZE(x86_power_flags
) &&
1414 seq_printf(m
, "%s%s",
1415 x86_power_flags
[i
][0]?" ":"",
1416 x86_power_flags
[i
]);
1418 seq_printf(m
, " [%d]", i
);
1422 seq_printf(m
, "\n\n");
1427 static void *c_start(struct seq_file
*m
, loff_t
*pos
)
1429 return *pos
< NR_CPUS
? cpu_data
+ *pos
: NULL
;
1432 static void *c_next(struct seq_file
*m
, void *v
, loff_t
*pos
)
1435 return c_start(m
, pos
);
1438 static void c_stop(struct seq_file
*m
, void *v
)
1442 struct seq_operations cpuinfo_op
= {
1446 .show
= show_cpuinfo
,
1449 #ifdef CONFIG_INPUT_PCSPKR
1450 #include <linux/platform_device.h>
1451 static __init
int add_pcspkr(void)
1453 struct platform_device
*pd
;
1456 pd
= platform_device_alloc("pcspkr", -1);
1460 ret
= platform_device_add(pd
);
1462 platform_device_put(pd
);
1466 device_initcall(add_pcspkr
);