2 * arch/xtensa/kernel/entry.S
4 * Low-level exception handling
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
10 * Copyright (C) 2004-2007 by Tensilica Inc.
12 * Chris Zankel <chris@zankel.net>
16 #include <linux/linkage.h>
17 #include <asm/asm-offsets.h>
18 #include <asm/processor.h>
19 #include <asm/coprocessor.h>
20 #include <asm/thread_info.h>
21 #include <asm/uaccess.h>
22 #include <asm/unistd.h>
23 #include <asm/ptrace.h>
24 #include <asm/current.h>
25 #include <asm/pgtable.h>
27 #include <asm/signal.h>
28 #include <asm/tlbflush.h>
29 #include <variant/tie-asm.h>
31 /* Unimplemented features. */
33 #undef KERNEL_STACK_OVERFLOW_CHECK
34 #undef PREEMPTIBLE_KERNEL
35 #undef ALLOCA_EXCEPTION_IN_IRAM
43 * Macro to find first bit set in WINDOWBASE from the left + 1
50 .macro ffs_ws bit mask
53 nsau \bit, \mask # 32-WSBITS ... 31 (32 iff 0)
54 addi \bit, \bit, WSBITS - 32 + 1 # uppest bit set -> return 1
58 _bltui \mask, 0x10000, 99f
60 extui \mask, \mask, 16, 16
63 99: _bltui \mask, 0x100, 99f
67 99: _bltui \mask, 0x10, 99f
70 99: _bltui \mask, 0x4, 99f
73 99: _bltui \mask, 0x2, 99f
80 /* ----------------- DEFAULT FIRST LEVEL EXCEPTION HANDLERS ----------------- */
83 * First-level exception handler for user exceptions.
84 * Save some special registers, extra states and all registers in the AR
85 * register file that were in use in the user task, and jump to the common
87 * We save SAR (used to calculate WMASK), and WB and WS (we don't have to
88 * save them for kernel exceptions).
90 * Entry condition for user_exception:
92 * a0: trashed, original value saved on stack (PT_AREG0)
94 * a2: new stack pointer, original value in depc
96 * depc: a2, original value saved on stack (PT_DEPC)
99 * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC
100 * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
102 * Entry condition for _user_exception:
104 * a0-a3 and depc have been saved to PT_AREG0...PT_AREG3 and PT_DEPC
105 * excsave has been restored, and
106 * stack pointer (a1) has been set.
108 * Note: _user_exception might be at an odd address. Don't use call0..call12
111 ENTRY(user_exception)
113 /* Save a2, a3, and depc, restore excsave_1 and set SP. */
117 s32i a1, a2, PT_AREG1
118 s32i a0, a2, PT_AREG2
119 s32i a3, a2, PT_AREG3
122 .globl _user_exception
125 /* Save SAR and turn off single stepping */
131 s32i a2, a1, PT_ICOUNTLEVEL
133 /* Rotate ws so that the current windowbase is at bit0. */
134 /* Assume ws = xxwww1yyyy. Rotate ws right, so that a2 = yyyyxxwww1 */
139 s32i a2, a1, PT_WINDOWBASE
140 s32i a3, a1, PT_WINDOWSTART
141 slli a2, a3, 32-WSBITS
143 srli a2, a2, 32-WSBITS
144 s32i a2, a1, PT_WMASK # needed for restoring registers
146 /* Save only live registers. */
149 s32i a4, a1, PT_AREG4
150 s32i a5, a1, PT_AREG5
151 s32i a6, a1, PT_AREG6
152 s32i a7, a1, PT_AREG7
154 s32i a8, a1, PT_AREG8
155 s32i a9, a1, PT_AREG9
156 s32i a10, a1, PT_AREG10
157 s32i a11, a1, PT_AREG11
159 s32i a12, a1, PT_AREG12
160 s32i a13, a1, PT_AREG13
161 s32i a14, a1, PT_AREG14
162 s32i a15, a1, PT_AREG15
163 _bnei a2, 1, 1f # only one valid frame?
165 /* Only one valid frame, skip saving regs. */
169 /* Save the remaining registers.
170 * We have to save all registers up to the first '1' from
171 * the right, except the current frame (bit 0).
172 * Assume a2 is: 001001000110001
173 * All register frames starting from the top field to the marked '1'
177 1: addi a3, a2, -1 # eliminate '1' in bit 0: yyyyxxww0
178 neg a3, a3 # yyyyxxww0 -> YYYYXXWW1+1
179 and a3, a3, a2 # max. only one bit is set
181 /* Find number of frames to save */
183 ffs_ws a0, a3 # number of frames to the '1' from left
185 /* Store information into WMASK:
186 * bits 0..3: xxx1 masked lower 4 bits of the rotated windowstart,
187 * bits 4...: number of valid 4-register frames
190 slli a3, a0, 4 # number of frames to save in bits 8..4
191 extui a2, a2, 0, 4 # mask for the first 16 registers
193 s32i a2, a1, PT_WMASK # needed when we restore the reg-file
195 /* Save 4 registers at a time */
198 s32i a0, a5, PT_AREG_END - 16
199 s32i a1, a5, PT_AREG_END - 12
200 s32i a2, a5, PT_AREG_END - 8
201 s32i a3, a5, PT_AREG_END - 4
206 /* WINDOWBASE still in SAR! */
208 rsr a2, sar # original WINDOWBASE
212 wsr a3, windowstart # set corresponding WINDOWSTART bit
213 wsr a2, windowbase # and WINDOWSTART
216 /* We are back to the original stack pointer (a1) */
218 2: /* Now, jump to the common exception handler. */
222 ENDPROC(user_exception)
225 * First-level exit handler for kernel exceptions
226 * Save special registers and the live window frame.
227 * Note: Even though we changes the stack pointer, we don't have to do a
228 * MOVSP here, as we do that when we return from the exception.
229 * (See comment in the kernel exception exit code)
231 * Entry condition for kernel_exception:
233 * a0: trashed, original value saved on stack (PT_AREG0)
235 * a2: new stack pointer, original in DEPC
237 * depc: a2, original value saved on stack (PT_DEPC)
240 * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC
241 * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
243 * Entry condition for _kernel_exception:
245 * a0-a3 and depc have been saved to PT_AREG0...PT_AREG3 and PT_DEPC
246 * excsave has been restored, and
247 * stack pointer (a1) has been set.
249 * Note: _kernel_exception might be at an odd address. Don't use call0..call12
252 ENTRY(kernel_exception)
254 /* Save a0, a2, a3, DEPC and set SP. */
256 xsr a3, excsave1 # restore a3, excsave_1
257 rsr a0, depc # get a2
258 s32i a1, a2, PT_AREG1
259 s32i a0, a2, PT_AREG2
260 s32i a3, a2, PT_AREG3
263 .globl _kernel_exception
266 /* Save SAR and turn off single stepping */
272 s32i a2, a1, PT_ICOUNTLEVEL
274 /* Rotate ws so that the current windowbase is at bit0. */
275 /* Assume ws = xxwww1yyyy. Rotate ws right, so that a2 = yyyyxxwww1 */
277 rsr a2, windowbase # don't need to save these, we only
278 rsr a3, windowstart # need shifted windowstart: windowmask
280 slli a2, a3, 32-WSBITS
282 srli a2, a2, 32-WSBITS
283 s32i a2, a1, PT_WMASK # needed for kernel_exception_exit
285 /* Save only the live window-frame */
288 s32i a4, a1, PT_AREG4
289 s32i a5, a1, PT_AREG5
290 s32i a6, a1, PT_AREG6
291 s32i a7, a1, PT_AREG7
293 s32i a8, a1, PT_AREG8
294 s32i a9, a1, PT_AREG9
295 s32i a10, a1, PT_AREG10
296 s32i a11, a1, PT_AREG11
298 s32i a12, a1, PT_AREG12
299 s32i a13, a1, PT_AREG13
300 s32i a14, a1, PT_AREG14
301 s32i a15, a1, PT_AREG15
305 #ifdef KERNEL_STACK_OVERFLOW_CHECK
307 /* Stack overflow check, for debugging */
308 extui a2, a1, TASK_SIZE_BITS,XX
310 _bge a2, a3, out_of_stack_panic
315 * This is the common exception handler.
316 * We get here from the user exception handler or simply by falling through
317 * from the kernel exception handler.
318 * Save the remaining special registers, switch to kernel mode, and jump
319 * to the second-level exception handler.
325 /* Save some registers, disable loops and clear the syscall flag. */
329 s32i a2, a1, PT_DEBUGCAUSE
334 s32i a2, a1, PT_SYSCALL
336 s32i a3, a1, PT_EXCVADDR
338 s32i a2, a1, PT_LCOUNT
340 /* It is now save to restore the EXC_TABLE_FIXUP variable. */
345 s32i a0, a1, PT_EXCCAUSE
346 s32i a3, a2, EXC_TABLE_FIXUP
348 /* All unrecoverable states are saved on stack, now, and a1 is valid,
349 * so we can allow exceptions and interrupts (*) again.
350 * Set PS(EXCM = 0, UM = 0, RING = 0, OWB = 0, WOE = 1, INTLEVEL = X)
352 * (*) We only allow interrupts if PS.INTLEVEL was not set to 1 before
353 * (interrupts disabled) and if this exception is not an interrupt.
359 extui a3, a3, 0, 1 # a3 = PS.INTLEVEL[0]
360 moveqz a3, a2, a0 # a3 = 1 iff interrupt exception
361 movi a2, 1 << PS_WOE_BIT
366 s32i a3, a1, PT_PS # save ps
368 /* Save lbeg, lend */
375 /* Save optional registers. */
377 save_xtregs_opt a1 a2 a4 a5 a6 a7 PT_XTREGS_OPT
379 /* Go to second-level dispatcher. Set up parameters to pass to the
380 * exception handler and call the exception handler.
384 mov a6, a1 # pass stack frame
385 mov a7, a0 # pass EXCCAUSE
387 l32i a4, a4, EXC_TABLE_DEFAULT # load handler
389 /* Call the second-level handler */
393 /* Jump here for exception exit */
395 common_exception_return:
397 /* Jump if we are returning from kernel exceptions. */
399 1: l32i a3, a1, PT_PS
400 _bbci.l a3, PS_UM_BIT, 4f
402 /* Specific to a user exception exit:
403 * We need to check some flags for signal handling and rescheduling,
404 * and have to restore WB and WS, extra states, and all registers
405 * in the register file that were in use in the user task.
406 * Note that we don't disable interrupts here.
409 GET_THREAD_INFO(a2,a1)
410 l32i a4, a2, TI_FLAGS
412 _bbsi.l a4, TIF_NEED_RESCHED, 3f
413 _bbsi.l a4, TIF_NOTIFY_RESUME, 2f
414 _bbci.l a4, TIF_SIGPENDING, 4f
416 2: l32i a4, a1, PT_DEPC
417 bgeui a4, VALID_DOUBLE_EXCEPTION_ADDRESS, 4f
419 /* Call do_signal() */
421 movi a4, do_notify_resume # int do_notify_resume(struct pt_regs*)
428 movi a4, schedule # void schedule (void)
432 4: /* Restore optional registers. */
434 load_xtregs_opt a1 a2 a4 a5 a6 a7 PT_XTREGS_OPT
436 wsr a3, ps /* disable interrupts */
438 _bbci.l a3, PS_UM_BIT, kernel_exception_exit
442 /* Restore the state of the task and return from the exception. */
444 /* Switch to the user thread WINDOWBASE. Save SP temporarily in DEPC */
446 l32i a2, a1, PT_WINDOWBASE
447 l32i a3, a1, PT_WINDOWSTART
448 wsr a1, depc # use DEPC as temp storage
449 wsr a3, windowstart # restore WINDOWSTART
450 ssr a2 # preserve user's WB in the SAR
451 wsr a2, windowbase # switch to user's saved WB
453 rsr a1, depc # restore stack pointer
454 l32i a2, a1, PT_WMASK # register frames saved (in bits 4...9)
455 rotw -1 # we restore a4..a7
456 _bltui a6, 16, 1f # only have to restore current window?
458 /* The working registers are a0 and a3. We are restoring to
459 * a4..a7. Be careful not to destroy what we have just restored.
460 * Note: wmask has the format YYYYM:
461 * Y: number of registers saved in groups of 4
462 * M: 4 bit mask of first 16 registers
468 2: rotw -1 # a0..a3 become a4..a7
469 addi a3, a7, -4*4 # next iteration
470 addi a2, a6, -16 # decrementing Y in WMASK
471 l32i a4, a3, PT_AREG_END + 0
472 l32i a5, a3, PT_AREG_END + 4
473 l32i a6, a3, PT_AREG_END + 8
474 l32i a7, a3, PT_AREG_END + 12
477 /* Clear unrestored registers (don't leak anything to user-land */
479 1: rsr a0, windowbase
483 extui a3, a3, 0, WBBITS
493 /* We are back were we were when we started.
494 * Note: a2 still contains WMASK (if we've returned to the original
495 * frame where we had loaded a2), or at least the lower 4 bits
496 * (if we have restored WSBITS-1 frames).
499 2: j common_exception_exit
501 /* This is the kernel exception exit.
502 * We avoided to do a MOVSP when we entered the exception, but we
503 * have to do it here.
506 kernel_exception_exit:
508 #ifdef PREEMPTIBLE_KERNEL
510 #ifdef CONFIG_PREEMPT
513 * Note: We've just returned from a call4, so we have
514 * at least 4 addt'l regs.
517 /* Check current_thread_info->preempt_count */
520 l32i a3, a2, TI_PREEMPT
523 l32i a2, a2, TI_FLAGS
531 /* Check if we have to do a movsp.
533 * We only have to do a movsp if the previous window-frame has
534 * been spilled to the *temporary* exception stack instead of the
535 * task's stack. This is the case if the corresponding bit in
536 * WINDOWSTART for the previous window-frame was set before
537 * (not spilled) but is zero now (spilled).
538 * If this bit is zero, all other bits except the one for the
539 * current window frame are also zero. So, we can use a simple test:
540 * 'and' WINDOWSTART and WINDOWSTART-1:
542 * (XXXXXX1[0]* - 1) AND XXXXXX1[0]* = XXXXXX0[0]*
544 * The result is zero only if one bit was set.
546 * (Note: We might have gone through several task switches before
547 * we come back to the current task, so WINDOWBASE might be
548 * different from the time the exception occurred.)
551 /* Test WINDOWSTART before and after the exception.
552 * We actually have WMASK, so we only have to test if it is 1 or not.
555 l32i a2, a1, PT_WMASK
556 _beqi a2, 1, common_exception_exit # Spilled before exception,jump
558 /* Test WINDOWSTART now. If spilled, do the movsp */
563 _bnez a3, common_exception_exit
565 /* Do a movsp (we returned from a call4, so we have at least a0..a7) */
570 s32i a3, a1, PT_SIZE+0
571 s32i a4, a1, PT_SIZE+4
574 s32i a3, a1, PT_SIZE+8
575 s32i a4, a1, PT_SIZE+12
577 /* Common exception exit.
578 * We restore the special register and the current window frame, and
579 * return from the exception.
581 * Note: We expect a2 to hold PT_WMASK
584 common_exception_exit:
586 /* Restore address registers. */
589 l32i a4, a1, PT_AREG4
590 l32i a5, a1, PT_AREG5
591 l32i a6, a1, PT_AREG6
592 l32i a7, a1, PT_AREG7
594 l32i a8, a1, PT_AREG8
595 l32i a9, a1, PT_AREG9
596 l32i a10, a1, PT_AREG10
597 l32i a11, a1, PT_AREG11
599 l32i a12, a1, PT_AREG12
600 l32i a13, a1, PT_AREG13
601 l32i a14, a1, PT_AREG14
602 l32i a15, a1, PT_AREG15
604 /* Restore PC, SAR */
606 1: l32i a2, a1, PT_PC
611 /* Restore LBEG, LEND, LCOUNT */
616 l32i a2, a1, PT_LCOUNT
620 /* We control single stepping through the ICOUNTLEVEL register. */
622 l32i a2, a1, PT_ICOUNTLEVEL
627 /* Check if it was double exception. */
630 l32i a3, a1, PT_AREG3
631 l32i a2, a1, PT_AREG2
632 _bgeui a0, VALID_DOUBLE_EXCEPTION_ADDRESS, 1f
634 /* Restore a0...a3 and return */
636 l32i a0, a1, PT_AREG0
637 l32i a1, a1, PT_AREG1
641 l32i a0, a1, PT_AREG0
642 l32i a1, a1, PT_AREG1
645 ENDPROC(kernel_exception)
648 * Debug exception handler.
650 * Currently, we don't support KGDB, so only user application can be debugged.
652 * When we get here, a0 is trashed and saved to excsave[debuglevel]
655 ENTRY(debug_exception)
657 rsr a0, SREG_EPS + XCHAL_DEBUGLEVEL
658 bbsi.l a0, PS_EXCM_BIT, 1f # exception mode
660 /* Set EPC1 and EXCCAUSE */
662 wsr a2, depc # save a2 temporarily
663 rsr a2, SREG_EPC + XCHAL_DEBUGLEVEL
666 movi a2, EXCCAUSE_MAPPED_DEBUG
669 /* Restore PS to the value before the debug exc but with PS.EXCM set.*/
671 movi a2, 1 << PS_EXCM_BIT
673 movi a0, debug_exception # restore a3, debug jump vector
675 xsr a0, SREG_EXCSAVE + XCHAL_DEBUGLEVEL
677 /* Switch to kernel/user stack, restore jump vector, and save a0 */
679 bbsi.l a2, PS_UM_BIT, 2f # jump if user mode
681 addi a2, a1, -16-PT_SIZE # assume kernel stack
682 s32i a0, a2, PT_AREG0
684 s32i a1, a2, PT_AREG1
685 s32i a0, a2, PT_DEPC # mark it as a regular exception
687 s32i a3, a2, PT_AREG3
688 s32i a0, a2, PT_AREG2
693 l32i a2, a2, EXC_TABLE_KSTK # load kernel stack pointer
694 s32i a0, a2, PT_AREG0
696 s32i a1, a2, PT_AREG1
699 s32i a3, a2, PT_AREG3
700 s32i a0, a2, PT_AREG2
704 /* Debug exception while in exception mode. */
707 ENDPROC(debug_exception)
710 * We get here in case of an unrecoverable exception.
711 * The only thing we can do is to be nice and print a panic message.
712 * We only produce a single stack frame for panic, so ???
717 * - a0 contains the caller address; original value saved in excsave1.
718 * - the original a0 contains a valid return address (backtrace) or 0.
719 * - a2 contains a valid stackpointer
723 * - If the stack pointer could be invalid, the caller has to setup a
724 * dummy stack pointer (e.g. the stack of the init_task)
726 * - If the return address could be invalid, the caller has to set it
727 * to 0, so the backtrace would stop.
732 .ascii "Unrecoverable error in exception handler\0"
734 ENTRY(unrecoverable_exception)
743 movi a1, (1 << PS_WOE_BIT) | 1
749 addi a1, a1, PT_REGS_OFFSET
752 movi a6, unrecoverable_text
758 ENDPROC(unrecoverable_exception)
760 /* -------------------------- FAST EXCEPTION HANDLERS ----------------------- */
763 * Fast-handler for alloca exceptions
765 * The ALLOCA handler is entered when user code executes the MOVSP
766 * instruction and the caller's frame is not in the register file.
767 * In this case, the caller frame's a0..a3 are on the stack just
768 * below sp (a1), and this handler moves them.
770 * For "MOVSP <ar>,<as>" without destination register a1, this routine
771 * simply moves the value from <as> to <ar> without moving the save area.
775 * a0: trashed, original value saved on stack (PT_AREG0)
777 * a2: new stack pointer, original in DEPC
779 * depc: a2, original value saved on stack (PT_DEPC)
782 * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC
783 * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
787 #define _EXTUI_MOVSP_SRC(ar) extui ar, ar, 4, 4
788 #define _EXTUI_MOVSP_DST(ar) extui ar, ar, 0, 4
790 #define _EXTUI_MOVSP_SRC(ar) extui ar, ar, 0, 4
791 #define _EXTUI_MOVSP_DST(ar) extui ar, ar, 4, 4
796 /* We shouldn't be in a double exception. */
799 _bgeui a0, VALID_DOUBLE_EXCEPTION_ADDRESS, .Lunhandled_double
801 rsr a0, depc # get a2
802 s32i a4, a2, PT_AREG4 # save a4 and
803 s32i a0, a2, PT_AREG2 # a2 to stack
805 /* Exit critical section. */
808 s32i a0, a3, EXC_TABLE_FIXUP
810 /* Restore a3, excsave_1 */
812 xsr a3, excsave1 # make sure excsave_1 is valid for dbl.
813 rsr a4, epc1 # get exception address
814 s32i a3, a2, PT_AREG3 # save a3 to stack
816 #ifdef ALLOCA_EXCEPTION_IN_IRAM
817 #error iram not supported
819 /* Note: l8ui not allowed in IRAM/IROM!! */
820 l8ui a0, a4, 1 # read as(src) from MOVSP instruction
823 _EXTUI_MOVSP_SRC(a0) # extract source register number
829 movi a0, unrecoverable_exception
834 l32i a3, a2, PT_AREG0; _j 1f; .align 8
835 mov a3, a1; _j 1f; .align 8
836 l32i a3, a2, PT_AREG2; _j 1f; .align 8
837 l32i a3, a2, PT_AREG3; _j 1f; .align 8
838 l32i a3, a2, PT_AREG4; _j 1f; .align 8
839 mov a3, a5; _j 1f; .align 8
840 mov a3, a6; _j 1f; .align 8
841 mov a3, a7; _j 1f; .align 8
842 mov a3, a8; _j 1f; .align 8
843 mov a3, a9; _j 1f; .align 8
844 mov a3, a10; _j 1f; .align 8
845 mov a3, a11; _j 1f; .align 8
846 mov a3, a12; _j 1f; .align 8
847 mov a3, a13; _j 1f; .align 8
848 mov a3, a14; _j 1f; .align 8
849 mov a3, a15; _j 1f; .align 8
853 #ifdef ALLOCA_EXCEPTION_IN_IRAM
854 #error iram not supported
856 l8ui a0, a4, 0 # read ar(dst) from MOVSP instruction
858 addi a4, a4, 3 # step over movsp
859 _EXTUI_MOVSP_DST(a0) # extract destination register
860 wsr a4, epc1 # save new epc_1
862 _bnei a0, 1, 1f # no 'movsp a1, ax': jump
864 /* Move the save area. This implies the use of the L32E
865 * and S32E instructions, because this move must be done with
866 * the user's PS.RING privilege levels, not with ring 0
867 * (kernel's) privileges currently active with PS.EXCM
868 * set. Note that we have stil registered a fixup routine with the
869 * double exception vector in case a double exception occurs.
872 /* a0,a4:avail a1:old user stack a2:exc. stack a3:new user stack. */
883 /* Restore stack-pointer and all the other saved registers. */
887 l32i a4, a2, PT_AREG4
888 l32i a3, a2, PT_AREG3
889 l32i a0, a2, PT_AREG0
890 l32i a2, a2, PT_AREG2
893 /* MOVSP <at>,<as> was invoked with <at> != a1.
894 * Because the stack pointer is not being modified,
895 * we should be able to just modify the pointer
896 * without moving any save area.
897 * The processor only traps these occurrences if the
898 * caller window isn't live, so unfortunately we can't
899 * use this as an alternate trap mechanism.
900 * So we just do the move. This requires that we
901 * resolve the destination register, not just the source,
902 * so there's some extra work.
903 * (PERHAPS NOT REALLY NEEDED, BUT CLEANER...)
906 /* a0 dst-reg, a1 user-stack, a2 stack, a3 value of src reg. */
908 1: movi a4, .Lmovsp_dst
914 s32i a3, a2, PT_AREG0; _j 1f; .align 8
915 mov a1, a3; _j 1f; .align 8
916 s32i a3, a2, PT_AREG2; _j 1f; .align 8
917 s32i a3, a2, PT_AREG3; _j 1f; .align 8
918 s32i a3, a2, PT_AREG4; _j 1f; .align 8
919 mov a5, a3; _j 1f; .align 8
920 mov a6, a3; _j 1f; .align 8
921 mov a7, a3; _j 1f; .align 8
922 mov a8, a3; _j 1f; .align 8
923 mov a9, a3; _j 1f; .align 8
924 mov a10, a3; _j 1f; .align 8
925 mov a11, a3; _j 1f; .align 8
926 mov a12, a3; _j 1f; .align 8
927 mov a13, a3; _j 1f; .align 8
928 mov a14, a3; _j 1f; .align 8
929 mov a15, a3; _j 1f; .align 8
931 1: l32i a4, a2, PT_AREG4
932 l32i a3, a2, PT_AREG3
933 l32i a0, a2, PT_AREG0
934 l32i a2, a2, PT_AREG2
942 * WARNING: The kernel doesn't save the entire user context before
943 * handling a fast system call. These functions are small and short,
944 * usually offering some functionality not available to user tasks.
946 * BE CAREFUL TO PRESERVE THE USER'S CONTEXT.
950 * a0: trashed, original value saved on stack (PT_AREG0)
952 * a2: new stack pointer, original in DEPC
954 * depc: a2, original value saved on stack (PT_DEPC)
958 ENTRY(fast_syscall_kernel)
967 bgeui a0, VALID_DOUBLE_EXCEPTION_ADDRESS, fast_syscall_unrecoverable
969 rsr a0, depc # get syscall-nr
970 _beqz a0, fast_syscall_spill_registers
971 _beqi a0, __NR_xtensa, fast_syscall_xtensa
975 ENDPROC(fast_syscall_kernel)
977 ENTRY(fast_syscall_user)
986 bgeui a0, VALID_DOUBLE_EXCEPTION_ADDRESS, fast_syscall_unrecoverable
988 rsr a0, depc # get syscall-nr
989 _beqz a0, fast_syscall_spill_registers
990 _beqi a0, __NR_xtensa, fast_syscall_xtensa
994 ENDPROC(fast_syscall_user)
996 ENTRY(fast_syscall_unrecoverable)
998 /* Restore all states. */
1000 l32i a0, a2, PT_AREG0 # restore a0
1001 xsr a2, depc # restore a2, depc
1005 movi a0, unrecoverable_exception
1008 ENDPROC(fast_syscall_unrecoverable)
1011 * sysxtensa syscall handler
1013 * int sysxtensa (SYS_XTENSA_ATOMIC_SET, ptr, val, unused);
1014 * int sysxtensa (SYS_XTENSA_ATOMIC_ADD, ptr, val, unused);
1015 * int sysxtensa (SYS_XTENSA_ATOMIC_EXG_ADD, ptr, val, unused);
1016 * int sysxtensa (SYS_XTENSA_ATOMIC_CMP_SWP, ptr, oldval, newval);
1021 * a0: a2 (syscall-nr), original value saved on stack (PT_AREG0)
1023 * a2: new stack pointer, original in a0 and DEPC
1024 * a3: dispatch table, original in excsave_1
1025 * a4..a15: unchanged
1026 * depc: a2, original value saved on stack (PT_DEPC)
1029 * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC
1030 * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
1032 * Note: we don't have to save a2; a2 holds the return value
1034 * We use the two macros TRY and CATCH:
1036 * TRY adds an entry to the __ex_table fixup table for the immediately
1037 * following instruction.
1039 * CATCH catches any exception that occurred at one of the preceding TRY
1040 * statements and continues from there
1042 * Usage TRY l32i a0, a1, 0
1045 * CATCH <set return code>
1050 .section __ex_table, "a"; \
1058 ENTRY(fast_syscall_xtensa)
1060 xsr a3, excsave1 # restore a3, excsave1
1062 s32i a7, a2, PT_AREG7 # we need an additional register
1063 movi a7, 4 # sizeof(unsigned int)
1064 access_ok a3, a7, a0, a2, .Leac # a0: scratch reg, a2: sp
1066 addi a6, a6, -1 # assuming SYS_XTENSA_ATOMIC_SET = 1
1067 _bgeui a6, SYS_XTENSA_COUNT - 1, .Lill
1068 _bnei a6, SYS_XTENSA_ATOMIC_CMP_SWP - 1, .Lnswp
1070 /* Fall through for ATOMIC_CMP_SWP. */
1072 .Lswp: /* Atomic compare and swap */
1074 TRY l32i a0, a3, 0 # read old value
1075 bne a0, a4, 1f # same as old value? jump
1076 TRY s32i a5, a3, 0 # different, modify value
1077 l32i a7, a2, PT_AREG7 # restore a7
1078 l32i a0, a2, PT_AREG0 # restore a0
1079 movi a2, 1 # and return 1
1080 addi a6, a6, 1 # restore a6 (really necessary?)
1083 1: l32i a7, a2, PT_AREG7 # restore a7
1084 l32i a0, a2, PT_AREG0 # restore a0
1085 movi a2, 0 # return 0 (note that we cannot set
1086 addi a6, a6, 1 # restore a6 (really necessary?)
1089 .Lnswp: /* Atomic set, add, and exg_add. */
1091 TRY l32i a7, a3, 0 # orig
1092 add a0, a4, a7 # + arg
1093 moveqz a0, a4, a6 # set
1094 TRY s32i a0, a3, 0 # write new value
1098 l32i a7, a0, PT_AREG7 # restore a7
1099 l32i a0, a0, PT_AREG0 # restore a0
1100 addi a6, a6, 1 # restore a6 (really necessary?)
1104 .Leac: l32i a7, a2, PT_AREG7 # restore a7
1105 l32i a0, a2, PT_AREG0 # restore a0
1109 .Lill: l32i a7, a2, PT_AREG0 # restore a7
1110 l32i a0, a2, PT_AREG0 # restore a0
1114 ENDPROC(fast_syscall_xtensa)
1117 /* fast_syscall_spill_registers.
1121 * a0: trashed, original value saved on stack (PT_AREG0)
1123 * a2: new stack pointer, original in DEPC
1124 * a3: dispatch table
1125 * depc: a2, original value saved on stack (PT_DEPC)
1128 * Note: We assume the stack pointer is EXC_TABLE_KSTK in the fixup handler.
1131 ENTRY(fast_syscall_spill_registers)
1133 /* Register a FIXUP handler (pass current wb as a parameter) */
1135 movi a0, fast_syscall_spill_registers_fixup
1136 s32i a0, a3, EXC_TABLE_FIXUP
1138 s32i a0, a3, EXC_TABLE_PARAM
1140 /* Save a3 and SAR on stack. */
1143 xsr a3, excsave1 # restore a3 and excsave_1
1144 s32i a3, a2, PT_AREG3
1145 s32i a4, a2, PT_AREG4
1146 s32i a0, a2, PT_AREG5 # store SAR to PT_AREG5
1148 /* The spill routine might clobber a7, a11, and a15. */
1150 s32i a7, a2, PT_AREG7
1151 s32i a11, a2, PT_AREG11
1152 s32i a15, a2, PT_AREG15
1154 call0 _spill_registers # destroys a3, a4, and SAR
1156 /* Advance PC, restore registers and SAR, and return from exception. */
1158 l32i a3, a2, PT_AREG5
1159 l32i a4, a2, PT_AREG4
1160 l32i a0, a2, PT_AREG0
1162 l32i a3, a2, PT_AREG3
1164 /* Restore clobbered registers. */
1166 l32i a7, a2, PT_AREG7
1167 l32i a11, a2, PT_AREG11
1168 l32i a15, a2, PT_AREG15
1173 ENDPROC(fast_syscall_spill_registers)
1177 * We get here if the spill routine causes an exception, e.g. tlb miss.
1178 * We basically restore WINDOWBASE and WINDOWSTART to the condition when
1179 * we entered the spill routine and jump to the user exception handler.
1181 * a0: value of depc, original value in depc
1182 * a2: trashed, original value in EXC_TABLE_DOUBLE_SAVE
1183 * a3: exctable, original value in excsave1
1186 fast_syscall_spill_registers_fixup:
1188 rsr a2, windowbase # get current windowbase (a2 is saved)
1189 xsr a0, depc # restore depc and a0
1190 ssl a2 # set shift (32 - WB)
1192 /* We need to make sure the current registers (a0-a3) are preserved.
1193 * To do this, we simply set the bit for the current window frame
1194 * in WS, so that the exception handlers save them to the task stack.
1197 rsr a3, excsave1 # get spill-mask
1198 slli a2, a3, 1 # shift left by one
1200 slli a3, a2, 32-WSBITS
1201 src a2, a2, a3 # a1 = xxwww1yyxxxwww1yy......
1202 wsr a2, windowstart # set corrected windowstart
1205 l32i a2, a3, EXC_TABLE_DOUBLE_SAVE # restore a2
1206 l32i a3, a3, EXC_TABLE_PARAM # original WB (in user task)
1208 /* Return to the original (user task) WINDOWBASE.
1209 * We leave the following frame behind:
1211 * a3: trashed (saved in excsave_1)
1212 * depc: depc (we have to return to that address)
1219 /* We are now in the original frame when we entered _spill_registers:
1220 * a0: return address
1221 * a1: used, stack pointer
1222 * a2: kernel stack pointer
1223 * a3: available, saved in EXCSAVE_1
1224 * depc: exception address
1226 * Note: This frame might be the same as above.
1229 /* Setup stack pointer. */
1231 addi a2, a2, -PT_USER_SIZE
1232 s32i a0, a2, PT_AREG0
1234 /* Make sure we return to this fixup handler. */
1236 movi a3, fast_syscall_spill_registers_fixup_return
1237 s32i a3, a2, PT_DEPC # setup depc
1239 /* Jump to the exception handler. */
1243 addx4 a0, a0, a3 # find entry in table
1244 l32i a0, a0, EXC_TABLE_FAST_USER # load handler
1247 fast_syscall_spill_registers_fixup_return:
1249 /* When we return here, all registers have been restored (a2: DEPC) */
1251 wsr a2, depc # exception address
1253 /* Restore fixup handler. */
1256 movi a2, fast_syscall_spill_registers_fixup
1257 s32i a2, a3, EXC_TABLE_FIXUP
1259 s32i a2, a3, EXC_TABLE_PARAM
1260 l32i a2, a3, EXC_TABLE_KSTK
1262 /* Load WB at the time the exception occurred. */
1264 rsr a3, sar # WB is still in SAR
1269 /* Restore a3 and return. */
1278 * spill all registers.
1280 * This is not a real function. The following conditions must be met:
1282 * - must be called with call0.
1283 * - uses a3, a4 and SAR.
1284 * - the last 'valid' register of each frame are clobbered.
1285 * - the caller must have registered a fixup handler
1286 * (or be inside a critical section)
1287 * - PS_EXCM must be set (PS_WOE cleared?)
1290 ENTRY(_spill_registers)
1293 * Rotate ws so that the current windowbase is at bit 0.
1294 * Assume ws = xxxwww1yy (www1 current window frame).
1295 * Rotate ws right so that a4 = yyxxxwww1.
1299 rsr a3, windowstart # a3 = xxxwww1yy
1302 or a3, a3, a4 # a3 = xxxwww1yyxxxwww1yy
1303 srl a3, a3 # a3 = 00xxxwww1yyxxxwww1
1305 /* We are done if there are no more than the current register frame. */
1307 extui a3, a3, 1, WSBITS-1 # a3 = 0yyxxxwww
1308 movi a4, (1 << (WSBITS-1))
1309 _beqz a3, .Lnospill # only one active frame? jump
1311 /* We want 1 at the top, so that we return to the current windowbase */
1313 or a3, a3, a4 # 1yyxxxwww
1315 /* Skip empty frames - get 'oldest' WINDOWSTART-bit. */
1317 wsr a3, windowstart # save shifted windowstart
1319 and a3, a4, a3 # first bit set from right: 000010000
1321 ffs_ws a4, a3 # a4: shifts to skip empty frames
1323 sub a4, a3, a4 # WSBITS-a4:number of 0-bits from right
1324 ssr a4 # save in SAR for later.
1332 srl a3, a3 # shift windowstart
1334 /* WB is now just one frame below the oldest frame in the register
1335 window. WS is shifted so the oldest frame is in bit 0, thus, WB
1336 and WS differ by one 4-register frame. */
1338 /* Save frames. Depending what call was used (call4, call8, call12),
1339 * we have to save 4,8. or 12 registers.
1345 /* Special case: we have a call12-frame starting at a4. */
1347 _bbci.l a3, 3, .Lc12 # bit 3 shouldn't be zero! (Jump to Lc12 first)
1349 s32e a4, a1, -16 # a1 is valid with an empty spill area
1359 .Lloop: _bbsi.l a3, 1, .Lc4
1360 _bbci.l a3, 2, .Lc12
1362 .Lc8: s32e a4, a13, -16
1372 srli a11, a3, 2 # shift windowbase by 2
1376 .Lexit: /* Done. Do the final rotation, set WS, and return. */
1386 .Lc4: s32e a4, a9, -16
1396 .Lc12: _bbci.l a3, 3, .Linvalid_mask # bit 2 shouldn't be zero!
1398 /* 12-register frame (call12) */
1404 .Lc12c: s32e a9, a8, -44
1413 /* The stack pointer for a4..a7 is out of reach, so we rotate the
1414 * window, grab the stackpointer, and rotate back.
1415 * Alternatively, we could also use the following approach, but that
1416 * makes the fixup routine much more complicated:
1439 /* We get here because of an unrecoverable error in the window
1440 * registers. If we are in user space, we kill the application,
1441 * however, this condition is unrecoverable in kernel space.
1445 _bbci.l a0, PS_UM_BIT, 1f
1447 /* User space: Setup a dummy frame and kill application.
1448 * Note: We assume EXC_TABLE_KSTK contains a valid stack pointer.
1461 l32i a1, a3, EXC_TABLE_KSTK
1464 movi a4, (1 << PS_WOE_BIT) | 1
1472 1: /* Kernel space: PANIC! */
1475 movi a0, unrecoverable_exception
1476 callx0 a0 # should not return
1479 ENDPROC(_spill_registers)
1483 * We should never get here. Bail out!
1486 ENTRY(fast_second_level_miss_double_kernel)
1488 1: movi a0, unrecoverable_exception
1489 callx0 a0 # should not return
1492 ENDPROC(fast_second_level_miss_double_kernel)
1494 /* First-level entry handler for user, kernel, and double 2nd-level
1495 * TLB miss exceptions. Note that for now, user and kernel miss
1496 * exceptions share the same entry point and are handled identically.
1498 * An old, less-efficient C version of this function used to exist.
1499 * We include it below, interleaved as comments, for reference.
1503 * a0: trashed, original value saved on stack (PT_AREG0)
1505 * a2: new stack pointer, original in DEPC
1506 * a3: dispatch table
1507 * depc: a2, original value saved on stack (PT_DEPC)
1510 * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC
1511 * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
1514 ENTRY(fast_second_level_miss)
1516 /* Save a1. Note: we don't expect a double exception. */
1518 s32i a1, a2, PT_AREG1
1520 /* We need to map the page of PTEs for the user task. Find
1521 * the pointer to that page. Also, it's possible for tsk->mm
1522 * to be NULL while tsk->active_mm is nonzero if we faulted on
1523 * a vmalloc address. In that rare case, we must use
1524 * active_mm instead to avoid a fault in this handler. See
1526 * http://mail.nl.linux.org/linux-mm/2002-08/msg00258.html
1527 * (or search Internet on "mm vs. active_mm")
1530 * mm = tsk->active_mm;
1531 * pgd = pgd_offset (mm, regs->excvaddr);
1532 * pmd = pmd_offset (pgd, regs->excvaddr);
1537 l32i a0, a1, TASK_MM # tsk->mm
1541 /* We deliberately destroy a3 that holds the exception table. */
1543 8: rsr a3, excvaddr # fault address
1544 _PGD_OFFSET(a0, a3, a1)
1545 l32i a0, a0, 0 # read pmdval
1548 /* Read ptevaddr and convert to top of page-table page.
1550 * vpnval = read_ptevaddr_register() & PAGE_MASK;
1551 * vpnval += DTLB_WAY_PGTABLE;
1552 * pteval = mk_pte (virt_to_page(pmd_val(pmdval)), PAGE_KERNEL);
1553 * write_dtlb_entry (pteval, vpnval);
1555 * The messy computation for 'pteval' above really simplifies
1556 * into the following:
1558 * pteval = ((pmdval - PAGE_OFFSET) & PAGE_MASK) | PAGE_DIRECTORY
1561 movi a1, (-PAGE_OFFSET) & 0xffffffff
1562 add a0, a0, a1 # pmdval - PAGE_OFFSET
1563 extui a1, a0, 0, PAGE_SHIFT # ... & PAGE_MASK
1566 movi a1, _PAGE_DIRECTORY
1567 or a0, a0, a1 # ... | PAGE_DIRECTORY
1570 * We utilize all three wired-ways (7-9) to hold pmd translations.
1571 * Memory regions are mapped to the DTLBs according to bits 28 and 29.
1572 * This allows to map the three most common regions to three different
1574 * 0,1 -> way 7 program (0040.0000) and virtual (c000.0000)
1575 * 2 -> way 8 shared libaries (2000.0000)
1576 * 3 -> way 0 stack (3000.0000)
1579 extui a3, a3, 28, 2 # addr. bit 28 and 29 0,1,2,3
1581 addx2 a3, a3, a3 # -> 0,3,6,9
1582 srli a1, a1, PAGE_SHIFT
1583 extui a3, a3, 2, 2 # -> 0,0,1,2
1584 slli a1, a1, PAGE_SHIFT # ptevaddr & PAGE_MASK
1585 addi a3, a3, DTLB_WAY_PGD
1586 add a1, a1, a3 # ... + way_number
1591 /* Exit critical section. */
1593 4: movi a3, exc_table # restore a3
1595 s32i a0, a3, EXC_TABLE_FIXUP
1597 /* Restore the working registers, and return. */
1599 l32i a0, a2, PT_AREG0
1600 l32i a1, a2, PT_AREG1
1601 l32i a2, a2, PT_DEPC
1604 bgeui a2, VALID_DOUBLE_EXCEPTION_ADDRESS, 1f
1606 /* Restore excsave1 and return. */
1611 /* Return from double exception. */
1617 9: l32i a0, a1, TASK_ACTIVE_MM # unlikely case mm == 0
1620 #if (DCACHE_WAY_SIZE > PAGE_SIZE)
1622 2: /* Special case for cache aliasing.
1623 * We (should) only get here if a clear_user_page, copy_user_page
1624 * or the aliased cache flush functions got preemptively interrupted
1625 * by another task. Re-establish temporary mapping to the
1626 * TLBTEMP_BASE areas.
1629 /* We shouldn't be in a double exception */
1631 l32i a0, a2, PT_DEPC
1632 bgeui a0, VALID_DOUBLE_EXCEPTION_ADDRESS, 2f
1634 /* Make sure the exception originated in the special functions */
1636 movi a0, __tlbtemp_mapping_start
1639 movi a0, __tlbtemp_mapping_end
1642 /* Check if excvaddr was in one of the TLBTEMP_BASE areas. */
1644 movi a3, TLBTEMP_BASE_1
1648 addi a1, a0, -(2 << (DCACHE_ALIAS_ORDER + PAGE_SHIFT))
1651 /* Check if we have to restore an ITLB mapping. */
1653 movi a1, __tlbtemp_mapping_itlb
1662 /* Jump for ITLB entry */
1666 /* We can use up to two TLBTEMP areas, one for src and one for dst. */
1668 extui a3, a0, PAGE_SHIFT + DCACHE_ALIAS_ORDER, 1
1671 /* PPN is in a6 for the first TLBTEMP area and in a7 for the second. */
1677 /* ITLB entry. We only use dst in a6. */
1684 #endif // DCACHE_WAY_SIZE > PAGE_SIZE
1687 2: /* Invalid PGD, default exception handling */
1692 s32i a1, a2, PT_AREG2
1693 s32i a3, a2, PT_AREG3
1697 bbsi.l a2, PS_UM_BIT, 1f
1699 1: j _user_exception
1701 ENDPROC(fast_second_level_miss)
1704 * StoreProhibitedException
1706 * Update the pte and invalidate the itlb mapping for this pte.
1710 * a0: trashed, original value saved on stack (PT_AREG0)
1712 * a2: new stack pointer, original in DEPC
1713 * a3: dispatch table
1714 * depc: a2, original value saved on stack (PT_DEPC)
1717 * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC
1718 * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
1721 ENTRY(fast_store_prohibited)
1723 /* Save a1 and a4. */
1725 s32i a1, a2, PT_AREG1
1726 s32i a4, a2, PT_AREG4
1729 l32i a0, a1, TASK_MM # tsk->mm
1732 8: rsr a1, excvaddr # fault address
1733 _PGD_OFFSET(a0, a1, a4)
1737 /* Note that we assume _PAGE_WRITABLE_BIT is only set if pte is valid.*/
1739 _PTE_OFFSET(a0, a1, a4)
1740 l32i a4, a0, 0 # read pteval
1741 bbci.l a4, _PAGE_WRITABLE_BIT, 2f
1743 movi a1, _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_HW_WRITE
1748 /* We need to flush the cache if we have page coloring. */
1749 #if (DCACHE_WAY_SIZE > PAGE_SIZE) && XCHAL_DCACHE_IS_WRITEBACK
1755 /* Exit critical section. */
1758 s32i a0, a3, EXC_TABLE_FIXUP
1760 /* Restore the working registers, and return. */
1762 l32i a4, a2, PT_AREG4
1763 l32i a1, a2, PT_AREG1
1764 l32i a0, a2, PT_AREG0
1765 l32i a2, a2, PT_DEPC
1767 /* Restore excsave1 and a3. */
1770 bgeui a2, VALID_DOUBLE_EXCEPTION_ADDRESS, 1f
1775 /* Double exception. Restore FIXUP handler and return. */
1781 9: l32i a0, a1, TASK_ACTIVE_MM # unlikely case mm == 0
1784 2: /* If there was a problem, handle fault in C */
1786 rsr a4, depc # still holds a2
1788 s32i a4, a2, PT_AREG2
1789 s32i a3, a2, PT_AREG3
1790 l32i a4, a2, PT_AREG4
1794 bbsi.l a2, PS_UM_BIT, 1f
1796 1: j _user_exception
1798 ENDPROC(fast_store_prohibited)
1800 #endif /* CONFIG_MMU */
1805 * void system_call (struct pt_regs* regs, int exccause)
1813 /* regs->syscall = regs->areg[2] */
1815 l32i a3, a2, PT_AREG2
1817 movi a4, do_syscall_trace_enter
1818 s32i a3, a2, PT_SYSCALL
1821 /* syscall = sys_call_table[syscall_nr] */
1823 movi a4, sys_call_table;
1824 movi a5, __NR_syscall_count
1830 movi a5, sys_ni_syscall;
1833 /* Load args: arg0 - arg5 are passed via regs. */
1835 l32i a6, a2, PT_AREG6
1836 l32i a7, a2, PT_AREG3
1837 l32i a8, a2, PT_AREG4
1838 l32i a9, a2, PT_AREG5
1839 l32i a10, a2, PT_AREG8
1840 l32i a11, a2, PT_AREG9
1842 /* Pass one additional argument to the syscall: pt_regs (on stack) */
1847 1: /* regs->areg[2] = return_value */
1849 s32i a6, a2, PT_AREG2
1850 movi a4, do_syscall_trace_leave
1855 ENDPROC(system_call)
1861 * struct task* _switch_to (struct task* prev, struct task* next)
1869 mov a12, a2 # preserve 'prev' (a2)
1870 mov a13, a3 # and 'next' (a3)
1872 l32i a4, a2, TASK_THREAD_INFO
1873 l32i a5, a3, TASK_THREAD_INFO
1875 save_xtregs_user a4 a6 a8 a9 a10 a11 THREAD_XTREGS_USER
1877 s32i a0, a12, THREAD_RA # save return address
1878 s32i a1, a12, THREAD_SP # save stack pointer
1880 /* Disable ints while we manipulate the stack pointer. */
1882 movi a14, (1 << PS_EXCM_BIT) | LOCKLEVEL
1886 s32i a3, a3, EXC_TABLE_FIXUP /* enter critical section */
1888 /* Switch CPENABLE */
1890 #if (XTENSA_HAVE_COPROCESSORS || XTENSA_HAVE_IO_PORTS)
1891 l32i a3, a5, THREAD_CPENABLE
1893 s32i a3, a4, THREAD_CPENABLE
1896 /* Flush register file. */
1898 call0 _spill_registers # destroys a3, a4, and SAR
1900 /* Set kernel stack (and leave critical section)
1901 * Note: It's save to set it here. The stack will not be overwritten
1902 * because the kernel stack will only be loaded again after
1903 * we return from kernel space.
1906 rsr a3, excsave1 # exc_table
1908 addi a7, a5, PT_REGS_OFFSET
1909 s32i a6, a3, EXC_TABLE_FIXUP
1910 s32i a7, a3, EXC_TABLE_KSTK
1912 /* restore context of the task that 'next' addresses */
1914 l32i a0, a13, THREAD_RA # restore return address
1915 l32i a1, a13, THREAD_SP # restore stack pointer
1917 load_xtregs_user a5 a6 a8 a9 a10 a11 THREAD_XTREGS_USER
1920 mov a2, a12 # return 'prev'
1927 ENTRY(ret_from_fork)
1929 /* void schedule_tail (struct task_struct *prev)
1930 * Note: prev is still in a6 (return value from fake call4 frame)
1932 movi a4, schedule_tail
1935 movi a4, do_syscall_trace_leave
1939 j common_exception_return
1941 ENDPROC(ret_from_fork)
1944 * Kernel thread creation helper
1945 * On entry, set up by copy_thread: a2 = thread_fn, a3 = thread_fn arg
1946 * left from _switch_to: a6 = prev
1948 ENTRY(ret_from_kernel_thread)
1953 j common_exception_return
1955 ENDPROC(ret_from_kernel_thread)