2 * arch/xtensa/kernel/setup.c
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
8 * Copyright (C) 1995 Linus Torvalds
9 * Copyright (C) 2001 - 2005 Tensilica Inc.
10 * Copyright (C) 2014 - 2016 Cadence Design Systems Inc.
12 * Chris Zankel <chris@zankel.net>
13 * Joe Taylor <joe@tensilica.com, joetylr@yahoo.com>
15 * Marc Gauthier<marc@tensilica.com> <marc@alumni.uwaterloo.ca>
18 #include <linux/errno.h>
19 #include <linux/init.h>
21 #include <linux/proc_fs.h>
22 #include <linux/screen_info.h>
23 #include <linux/bootmem.h>
24 #include <linux/kernel.h>
25 #include <linux/percpu.h>
26 #include <linux/clk-provider.h>
27 #include <linux/cpu.h>
29 #include <linux/of_fdt.h>
31 #if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
32 # include <linux/console.h>
36 # include <linux/timex.h>
40 # include <linux/seq_file.h>
43 #include <asm/bootparam.h>
44 #include <asm/mmu_context.h>
45 #include <asm/pgtable.h>
46 #include <asm/processor.h>
47 #include <asm/timex.h>
48 #include <asm/platform.h>
50 #include <asm/setup.h>
51 #include <asm/param.h>
52 #include <asm/traps.h>
54 #include <asm/sysmem.h>
56 #include <platform/hardware.h>
58 #if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
59 struct screen_info screen_info
= { 0, 24, 0, 0, 0, 80, 0, 0, 0, 24, 1, 16};
62 #ifdef CONFIG_BLK_DEV_FD
63 extern struct fd_ops no_fd_ops
;
64 struct fd_ops
*fd_ops
;
67 extern struct rtc_ops no_rtc_ops
;
68 struct rtc_ops
*rtc_ops
;
70 #ifdef CONFIG_BLK_DEV_INITRD
71 extern unsigned long initrd_start
;
72 extern unsigned long initrd_end
;
73 int initrd_is_mapped
= 0;
74 extern int initrd_below_start_ok
;
78 void *dtb_start
= __dtb_start
;
81 unsigned char aux_device_present
;
82 extern unsigned long loops_per_jiffy
;
84 /* Command line specified as configuration option. */
86 static char __initdata command_line
[COMMAND_LINE_SIZE
];
88 #ifdef CONFIG_CMDLINE_BOOL
89 static char default_command_line
[COMMAND_LINE_SIZE
] __initdata
= CONFIG_CMDLINE
;
93 * Boot parameter parsing.
95 * The Xtensa port uses a list of variable-sized tags to pass data to
96 * the kernel. The first tag must be a BP_TAG_FIRST tag for the list
97 * to be recognised. The list is terminated with a zero-sized
101 typedef struct tagtable
{
103 int (*parse
)(const bp_tag_t
*);
106 #define __tagtable(tag, fn) static tagtable_t __tagtable_##fn \
107 __attribute__((used, section(".taglist"))) = { tag, fn }
109 /* parse current tag */
111 static int __init
parse_tag_mem(const bp_tag_t
*tag
)
113 struct bp_meminfo
*mi
= (struct bp_meminfo
*)(tag
->data
);
115 if (mi
->type
!= MEMORY_TYPE_CONVENTIONAL
)
118 return memblock_add(mi
->start
, mi
->end
- mi
->start
);
121 __tagtable(BP_TAG_MEMORY
, parse_tag_mem
);
123 #ifdef CONFIG_BLK_DEV_INITRD
125 static int __init
parse_tag_initrd(const bp_tag_t
* tag
)
127 struct bp_meminfo
*mi
= (struct bp_meminfo
*)(tag
->data
);
129 initrd_start
= (unsigned long)__va(mi
->start
);
130 initrd_end
= (unsigned long)__va(mi
->end
);
135 __tagtable(BP_TAG_INITRD
, parse_tag_initrd
);
139 static int __init
parse_tag_fdt(const bp_tag_t
*tag
)
141 dtb_start
= __va(tag
->data
[0]);
145 __tagtable(BP_TAG_FDT
, parse_tag_fdt
);
147 #endif /* CONFIG_OF */
149 #endif /* CONFIG_BLK_DEV_INITRD */
151 static int __init
parse_tag_cmdline(const bp_tag_t
* tag
)
153 strlcpy(command_line
, (char *)(tag
->data
), COMMAND_LINE_SIZE
);
157 __tagtable(BP_TAG_COMMAND_LINE
, parse_tag_cmdline
);
159 static int __init
parse_bootparam(const bp_tag_t
* tag
)
161 extern tagtable_t __tagtable_begin
, __tagtable_end
;
164 /* Boot parameters must start with a BP_TAG_FIRST tag. */
166 if (tag
->id
!= BP_TAG_FIRST
) {
167 printk(KERN_WARNING
"Invalid boot parameters!\n");
171 tag
= (bp_tag_t
*)((unsigned long)tag
+ sizeof(bp_tag_t
) + tag
->size
);
173 /* Parse all tags. */
175 while (tag
!= NULL
&& tag
->id
!= BP_TAG_LAST
) {
176 for (t
= &__tagtable_begin
; t
< &__tagtable_end
; t
++) {
177 if (tag
->id
== t
->tag
) {
182 if (t
== &__tagtable_end
)
183 printk(KERN_WARNING
"Ignoring tag "
184 "0x%08x\n", tag
->id
);
185 tag
= (bp_tag_t
*)((unsigned long)(tag
+ 1) + tag
->size
);
193 #if !XCHAL_HAVE_PTP_MMU || XCHAL_HAVE_SPANNING_WAY
194 unsigned long xtensa_kio_paddr
= XCHAL_KIO_DEFAULT_PADDR
;
195 EXPORT_SYMBOL(xtensa_kio_paddr
);
197 static int __init
xtensa_dt_io_area(unsigned long node
, const char *uname
,
198 int depth
, void *data
)
200 const __be32
*ranges
;
206 if (!of_flat_dt_is_compatible(node
, "simple-bus"))
209 ranges
= of_get_flat_dt_prop(node
, "ranges", &len
);
215 xtensa_kio_paddr
= of_read_ulong(ranges
+1, 1);
216 /* round down to nearest 256MB boundary */
217 xtensa_kio_paddr
&= 0xf0000000;
222 static int __init
xtensa_dt_io_area(unsigned long node
, const char *uname
,
223 int depth
, void *data
)
229 void __init
early_init_dt_add_memory_arch(u64 base
, u64 size
)
232 memblock_add(base
, size
);
235 void * __init
early_init_dt_alloc_memory_arch(u64 size
, u64 align
)
237 return __alloc_bootmem(size
, align
, 0);
240 void __init
early_init_devtree(void *params
)
242 early_init_dt_scan(params
);
243 of_scan_flat_dt(xtensa_dt_io_area
, NULL
);
245 if (!command_line
[0])
246 strlcpy(command_line
, boot_command_line
, COMMAND_LINE_SIZE
);
249 static int __init
xtensa_device_probe(void)
255 device_initcall(xtensa_device_probe
);
257 #endif /* CONFIG_OF */
260 * Initialize architecture. (Early stage)
263 void __init
init_arch(bp_tag_t
*bp_start
)
265 /* Parse boot parameters */
268 parse_bootparam(bp_start
);
271 early_init_devtree(dtb_start
);
274 #ifdef CONFIG_CMDLINE_BOOL
275 if (!command_line
[0])
276 strlcpy(command_line
, default_command_line
, COMMAND_LINE_SIZE
);
279 /* Early hook for platforms */
281 platform_init(bp_start
);
283 /* Initialize MMU. */
289 * Initialize system. Setup memory and reserve regions.
294 extern char _WindowVectors_text_start
;
295 extern char _WindowVectors_text_end
;
296 extern char _DebugInterruptVector_literal_start
;
297 extern char _DebugInterruptVector_text_end
;
298 extern char _KernelExceptionVector_literal_start
;
299 extern char _KernelExceptionVector_text_end
;
300 extern char _UserExceptionVector_literal_start
;
301 extern char _UserExceptionVector_text_end
;
302 extern char _DoubleExceptionVector_literal_start
;
303 extern char _DoubleExceptionVector_text_end
;
304 #if XCHAL_EXCM_LEVEL >= 2
305 extern char _Level2InterruptVector_text_start
;
306 extern char _Level2InterruptVector_text_end
;
308 #if XCHAL_EXCM_LEVEL >= 3
309 extern char _Level3InterruptVector_text_start
;
310 extern char _Level3InterruptVector_text_end
;
312 #if XCHAL_EXCM_LEVEL >= 4
313 extern char _Level4InterruptVector_text_start
;
314 extern char _Level4InterruptVector_text_end
;
316 #if XCHAL_EXCM_LEVEL >= 5
317 extern char _Level5InterruptVector_text_start
;
318 extern char _Level5InterruptVector_text_end
;
320 #if XCHAL_EXCM_LEVEL >= 6
321 extern char _Level6InterruptVector_text_start
;
322 extern char _Level6InterruptVector_text_end
;
325 extern char _SecondaryResetVector_text_start
;
326 extern char _SecondaryResetVector_text_end
;
330 #ifdef CONFIG_S32C1I_SELFTEST
331 #if XCHAL_HAVE_S32C1I
333 static int __initdata rcw_word
, rcw_probe_pc
, rcw_exc
;
336 * Basic atomic compare-and-swap, that records PC of S32C1I for probing.
338 * If *v == cmp, set *v = set. Return previous *v.
340 static inline int probed_compare_swap(int *v
, int cmp
, int set
)
344 __asm__
__volatile__(
347 " wsr %2, scompare1\n"
348 "1: s32c1i %0, %3, 0\n"
349 : "=a" (set
), "=&a" (tmp
)
350 : "a" (cmp
), "a" (v
), "a" (&rcw_probe_pc
), "0" (set
)
356 /* Handle probed exception */
358 static void __init
do_probed_exception(struct pt_regs
*regs
,
359 unsigned long exccause
)
361 if (regs
->pc
== rcw_probe_pc
) { /* exception on s32c1i ? */
362 regs
->pc
+= 3; /* skip the s32c1i instruction */
365 do_unhandled(regs
, exccause
);
369 /* Simple test of S32C1I (soc bringup assist) */
371 static int __init
check_s32c1i(void)
373 int n
, cause1
, cause2
;
374 void *handbus
, *handdata
, *handaddr
; /* temporarily saved handlers */
377 handbus
= trap_set_handler(EXCCAUSE_LOAD_STORE_ERROR
,
378 do_probed_exception
);
379 handdata
= trap_set_handler(EXCCAUSE_LOAD_STORE_DATA_ERROR
,
380 do_probed_exception
);
381 handaddr
= trap_set_handler(EXCCAUSE_LOAD_STORE_ADDR_ERROR
,
382 do_probed_exception
);
384 /* First try an S32C1I that does not store: */
387 n
= probed_compare_swap(&rcw_word
, 0, 2);
390 /* took exception? */
392 /* unclean exception? */
393 if (n
!= 2 || rcw_word
!= 1)
394 panic("S32C1I exception error");
395 } else if (rcw_word
!= 1 || n
!= 1) {
396 panic("S32C1I compare error");
399 /* Then an S32C1I that stores: */
401 rcw_word
= 0x1234567;
402 n
= probed_compare_swap(&rcw_word
, 0x1234567, 0xabcde);
406 /* unclean exception? */
407 if (n
!= 0xabcde || rcw_word
!= 0x1234567)
408 panic("S32C1I exception error (b)");
409 } else if (rcw_word
!= 0xabcde || n
!= 0x1234567) {
410 panic("S32C1I store error");
413 /* Verify consistency of exceptions: */
414 if (cause1
|| cause2
) {
415 pr_warn("S32C1I took exception %d, %d\n", cause1
, cause2
);
416 /* If emulation of S32C1I upon bus error gets implemented,
417 we can get rid of this panic for single core (not SMP) */
418 panic("S32C1I exceptions not currently supported");
420 if (cause1
!= cause2
)
421 panic("inconsistent S32C1I exceptions");
423 trap_set_handler(EXCCAUSE_LOAD_STORE_ERROR
, handbus
);
424 trap_set_handler(EXCCAUSE_LOAD_STORE_DATA_ERROR
, handdata
);
425 trap_set_handler(EXCCAUSE_LOAD_STORE_ADDR_ERROR
, handaddr
);
429 #else /* XCHAL_HAVE_S32C1I */
431 /* This condition should not occur with a commercially deployed processor.
432 Display reminder for early engr test or demo chips / FPGA bitstreams */
433 static int __init
check_s32c1i(void)
435 pr_warn("Processor configuration lacks atomic compare-and-swap support!\n");
439 #endif /* XCHAL_HAVE_S32C1I */
440 early_initcall(check_s32c1i
);
441 #endif /* CONFIG_S32C1I_SELFTEST */
443 static inline int mem_reserve(unsigned long start
, unsigned long end
)
445 return memblock_reserve(start
, end
- start
);
448 void __init
setup_arch(char **cmdline_p
)
450 strlcpy(boot_command_line
, command_line
, COMMAND_LINE_SIZE
);
451 *cmdline_p
= command_line
;
453 /* Reserve some memory regions */
455 #ifdef CONFIG_BLK_DEV_INITRD
456 if (initrd_start
< initrd_end
) {
457 initrd_is_mapped
= mem_reserve(__pa(initrd_start
),
458 __pa(initrd_end
)) == 0;
459 initrd_below_start_ok
= 1;
465 mem_reserve(__pa(&_stext
), __pa(&_end
));
467 mem_reserve(__pa(&_WindowVectors_text_start
),
468 __pa(&_WindowVectors_text_end
));
470 mem_reserve(__pa(&_DebugInterruptVector_literal_start
),
471 __pa(&_DebugInterruptVector_text_end
));
473 mem_reserve(__pa(&_KernelExceptionVector_literal_start
),
474 __pa(&_KernelExceptionVector_text_end
));
476 mem_reserve(__pa(&_UserExceptionVector_literal_start
),
477 __pa(&_UserExceptionVector_text_end
));
479 mem_reserve(__pa(&_DoubleExceptionVector_literal_start
),
480 __pa(&_DoubleExceptionVector_text_end
));
482 #if XCHAL_EXCM_LEVEL >= 2
483 mem_reserve(__pa(&_Level2InterruptVector_text_start
),
484 __pa(&_Level2InterruptVector_text_end
));
486 #if XCHAL_EXCM_LEVEL >= 3
487 mem_reserve(__pa(&_Level3InterruptVector_text_start
),
488 __pa(&_Level3InterruptVector_text_end
));
490 #if XCHAL_EXCM_LEVEL >= 4
491 mem_reserve(__pa(&_Level4InterruptVector_text_start
),
492 __pa(&_Level4InterruptVector_text_end
));
494 #if XCHAL_EXCM_LEVEL >= 5
495 mem_reserve(__pa(&_Level5InterruptVector_text_start
),
496 __pa(&_Level5InterruptVector_text_end
));
498 #if XCHAL_EXCM_LEVEL >= 6
499 mem_reserve(__pa(&_Level6InterruptVector_text_start
),
500 __pa(&_Level6InterruptVector_text_end
));
504 mem_reserve(__pa(&_SecondaryResetVector_text_start
),
505 __pa(&_SecondaryResetVector_text_end
));
510 unflatten_and_copy_device_tree();
512 platform_setup(cmdline_p
);
522 # if defined(CONFIG_VGA_CONSOLE)
523 conswitchp
= &vga_con
;
524 # elif defined(CONFIG_DUMMY_CONSOLE)
525 conswitchp
= &dummy_con
;
530 platform_pcibios_init();
534 static DEFINE_PER_CPU(struct cpu
, cpu_data
);
536 static int __init
topology_init(void)
540 for_each_possible_cpu(i
) {
541 struct cpu
*cpu
= &per_cpu(cpu_data
, i
);
542 cpu
->hotpluggable
= !!i
;
543 register_cpu(cpu
, i
);
548 subsys_initcall(topology_init
);
550 void machine_restart(char * cmd
)
555 void machine_halt(void)
561 void machine_power_off(void)
563 platform_power_off();
566 #ifdef CONFIG_PROC_FS
569 * Display some core information through /proc/cpuinfo.
573 c_show(struct seq_file
*f
, void *slot
)
575 /* high-level stuff */
576 seq_printf(f
, "CPU count\t: %u\n"
577 "CPU list\t: %*pbl\n"
578 "vendor_id\t: Tensilica\n"
579 "model\t\t: Xtensa " XCHAL_HW_VERSION_NAME
"\n"
580 "core ID\t\t: " XCHAL_CORE_ID
"\n"
583 "cpu MHz\t\t: %lu.%02lu\n"
584 "bogomips\t: %lu.%02lu\n",
586 cpumask_pr_args(cpu_online_mask
),
587 XCHAL_BUILD_UNIQUE_ID
,
588 XCHAL_HAVE_BE
? "big" : "little",
590 (ccount_freq
/10000) % 100,
591 loops_per_jiffy
/(500000/HZ
),
592 (loops_per_jiffy
/(5000/HZ
)) % 100);
594 seq_printf(f
,"flags\t\t: "
604 #if XCHAL_HAVE_DENSITY
607 #if XCHAL_HAVE_BOOLEANS
616 #if XCHAL_HAVE_MINMAX
622 #if XCHAL_HAVE_CLAMPS
634 #if XCHAL_HAVE_MUL32_HIGH
640 #if XCHAL_HAVE_S32C1I
646 seq_printf(f
,"physical aregs\t: %d\n"
657 seq_printf(f
,"num ints\t: %d\n"
661 "debug level\t: %d\n",
662 XCHAL_NUM_INTERRUPTS
,
663 XCHAL_NUM_EXTINTERRUPTS
,
669 seq_printf(f
,"icache line size: %d\n"
670 "icache ways\t: %d\n"
671 "icache size\t: %d\n"
673 #if XCHAL_ICACHE_LINE_LOCKABLE
677 "dcache line size: %d\n"
678 "dcache ways\t: %d\n"
679 "dcache size\t: %d\n"
681 #if XCHAL_DCACHE_IS_WRITEBACK
684 #if XCHAL_DCACHE_LINE_LOCKABLE
688 XCHAL_ICACHE_LINESIZE
,
691 XCHAL_DCACHE_LINESIZE
,
699 * We show only CPU #0 info.
702 c_start(struct seq_file
*f
, loff_t
*pos
)
704 return (*pos
== 0) ? (void *)1 : NULL
;
708 c_next(struct seq_file
*f
, void *v
, loff_t
*pos
)
714 c_stop(struct seq_file
*f
, void *v
)
718 const struct seq_operations cpuinfo_op
=
726 #endif /* CONFIG_PROC_FS */