ext3: Flush disk caches on fsync when needed
[deliverable/linux.git] / arch / xtensa / kernel / time.c
1 /*
2 * arch/xtensa/kernel/time.c
3 *
4 * Timer and clock support.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 *
10 * Copyright (C) 2005 Tensilica Inc.
11 *
12 * Chris Zankel <chris@zankel.net>
13 */
14
15 #include <linux/errno.h>
16 #include <linux/time.h>
17 #include <linux/clocksource.h>
18 #include <linux/interrupt.h>
19 #include <linux/module.h>
20 #include <linux/init.h>
21 #include <linux/irq.h>
22 #include <linux/profile.h>
23 #include <linux/delay.h>
24
25 #include <asm/timex.h>
26 #include <asm/platform.h>
27
28 #ifdef CONFIG_XTENSA_CALIBRATE_CCOUNT
29 unsigned long ccount_per_jiffy; /* per 1/HZ */
30 unsigned long nsec_per_ccount; /* nsec per ccount increment */
31 #endif
32
33 static cycle_t ccount_read(void)
34 {
35 return (cycle_t)get_ccount();
36 }
37
38 static struct clocksource ccount_clocksource = {
39 .name = "ccount",
40 .rating = 200,
41 .read = ccount_read,
42 .mask = CLOCKSOURCE_MASK(32),
43 /*
44 * With a shift of 22 the lower limit of the cpu clock is
45 * 1MHz, where NSEC_PER_CCOUNT is 1000 or a bit less than
46 * 2^10: Since we have 32 bits and the multiplicator can
47 * already take up as much as 10 bits, this leaves us with
48 * remaining upper 22 bits.
49 */
50 .shift = 22,
51 };
52
53 static irqreturn_t timer_interrupt(int irq, void *dev_id);
54 static struct irqaction timer_irqaction = {
55 .handler = timer_interrupt,
56 .flags = IRQF_DISABLED,
57 .name = "timer",
58 };
59
60 void __init time_init(void)
61 {
62 xtime.tv_nsec = 0;
63 xtime.tv_sec = read_persistent_clock();
64
65 set_normalized_timespec(&wall_to_monotonic,
66 -xtime.tv_sec, -xtime.tv_nsec);
67
68 #ifdef CONFIG_XTENSA_CALIBRATE_CCOUNT
69 printk("Calibrating CPU frequency ");
70 platform_calibrate_ccount();
71 printk("%d.%02d MHz\n", (int)ccount_per_jiffy/(1000000/HZ),
72 (int)(ccount_per_jiffy/(10000/HZ))%100);
73 #endif
74 ccount_clocksource.mult =
75 clocksource_hz2mult(CCOUNT_PER_JIFFY * HZ,
76 ccount_clocksource.shift);
77 clocksource_register(&ccount_clocksource);
78
79 /* Initialize the linux timer interrupt. */
80
81 setup_irq(LINUX_TIMER_INT, &timer_irqaction);
82 set_linux_timer(get_ccount() + CCOUNT_PER_JIFFY);
83 }
84
85 /*
86 * The timer interrupt is called HZ times per second.
87 */
88
89 irqreturn_t timer_interrupt (int irq, void *dev_id)
90 {
91
92 unsigned long next;
93
94 next = get_linux_timer();
95
96 again:
97 while ((signed long)(get_ccount() - next) > 0) {
98
99 profile_tick(CPU_PROFILING);
100 #ifndef CONFIG_SMP
101 update_process_times(user_mode(get_irq_regs()));
102 #endif
103
104 write_seqlock(&xtime_lock);
105
106 do_timer(1); /* Linux handler in kernel/timer.c */
107
108 /* Note that writing CCOMPARE clears the interrupt. */
109
110 next += CCOUNT_PER_JIFFY;
111 set_linux_timer(next);
112
113 write_sequnlock(&xtime_lock);
114 }
115
116 /* Allow platform to do something useful (Wdog). */
117
118 platform_heartbeat();
119
120 /* Make sure we didn't miss any tick... */
121
122 if ((signed long)(get_ccount() - next) > 0)
123 goto again;
124
125 return IRQ_HANDLED;
126 }
127
128 #ifndef CONFIG_GENERIC_CALIBRATE_DELAY
129 void __cpuinit calibrate_delay(void)
130 {
131 loops_per_jiffy = CCOUNT_PER_JIFFY;
132 printk("Calibrating delay loop (skipped)... "
133 "%lu.%02lu BogoMIPS preset\n",
134 loops_per_jiffy/(1000000/HZ),
135 (loops_per_jiffy/(10000/HZ)) % 100);
136 }
137 #endif
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