Tue Jun 25 11:41:24 1996 Richard Henderson <rth@tamu.edu>
[deliverable/binutils-gdb.git] / bfd / coff-h8300.c
1 /* BFD back-end for Hitachi H8/300 COFF binaries.
2 Copyright 1990, 91, 92, 93, 94, 95, 1996 Free Software Foundation, Inc.
3 Written by Steve Chamberlain, <sac@cygnus.com>.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
20
21 #include "bfd.h"
22 #include "sysdep.h"
23 #include "obstack.h"
24 #include "libbfd.h"
25 #include "bfdlink.h"
26 #include "genlink.h"
27 #include "coff/h8300.h"
28 #include "coff/internal.h"
29 #include "libcoff.h"
30
31 #define COFF_DEFAULT_SECTION_ALIGNMENT_POWER (1)
32
33 /* We derive a hash table from the basic BFD hash table to
34 hold entries in the function vector. Aside from the
35 info stored by the basic hash table, we need the offset
36 of a particular entry within the hash table as well as
37 the offset where we'll add the next entry. */
38
39 struct funcvec_hash_entry
40 {
41 /* The basic hash table entry. */
42 struct bfd_hash_entry root;
43
44 /* The offset within the vectors section where
45 this entry lives. */
46 bfd_vma offset;
47 };
48
49 struct funcvec_hash_table
50 {
51 /* The basic hash table. */
52 struct bfd_hash_table root;
53
54 bfd *abfd;
55
56 /* Offset at which we'll add the next entry. */
57 unsigned int offset;
58 };
59
60 static struct bfd_hash_entry *
61 funcvec_hash_newfunc
62 PARAMS ((struct bfd_hash_entry *, struct bfd_hash_table *, const char *));
63
64 static boolean
65 funcvec_hash_table_init
66 PARAMS ((struct funcvec_hash_table *, bfd *,
67 struct bfd_hash_entry *(*) PARAMS ((struct bfd_hash_entry *,
68 struct bfd_hash_table *,
69 const char *))));
70
71 /* To lookup a value in the function vector hash table. */
72 #define funcvec_hash_lookup(table, string, create, copy) \
73 ((struct funcvec_hash_entry *) \
74 bfd_hash_lookup (&(table)->root, (string), (create), (copy)))
75
76 /* The derived h8300 COFF linker table. Note it's derived from
77 the generic linker hash table, not the COFF backend linker hash
78 table! We use this to attach additional data structures we
79 need while linking on the h8300. */
80 struct h8300_coff_link_hash_table
81 {
82 /* The main hash table. */
83 struct generic_link_hash_table root;
84
85 /* Section for the vectors table. This gets attached to a
86 random input bfd, we keep it here for easy access. */
87 asection *vectors_sec;
88
89 /* Hash table of the functions we need to enter into the function
90 vector. */
91 struct funcvec_hash_table *funcvec_hash_table;
92 };
93
94 static struct bfd_link_hash_table *h8300_coff_link_hash_table_create
95 PARAMS ((bfd *));
96
97 /* Get the H8/300 COFF linker hash table from a link_info structure. */
98
99 #define h8300_coff_hash_table(p) \
100 ((struct h8300_coff_link_hash_table *) ((coff_hash_table (p))))
101
102 /* Initialize fields within a funcvec hash table entry. Called whenever
103 a new entry is added to the funcvec hash table. */
104
105 static struct bfd_hash_entry *
106 funcvec_hash_newfunc (entry, gen_table, string)
107 struct bfd_hash_entry *entry;
108 struct bfd_hash_table *gen_table;
109 const char *string;
110 {
111 struct funcvec_hash_entry *ret;
112 struct funcvec_hash_table *table;
113
114 ret = (struct funcvec_hash_entry *) entry;
115 table = (struct funcvec_hash_table *) gen_table;
116
117 /* Allocate the structure if it has not already been allocated by a
118 subclass. */
119 if (ret == NULL)
120 ret = ((struct funcvec_hash_entry *)
121 bfd_hash_allocate (gen_table,
122 sizeof (struct funcvec_hash_entry)));
123 if (ret == NULL)
124 return NULL;
125
126 /* Call the allocation method of the superclass. */
127 ret = ((struct funcvec_hash_entry *)
128 bfd_hash_newfunc ((struct bfd_hash_entry *) ret, gen_table, string));
129
130 if (ret == NULL)
131 return NULL;
132
133 /* Note where this entry will reside in the function vector table. */
134 ret->offset = table->offset;
135
136 /* Bump the offset at which we store entries in the function
137 vector. We'd like to bump up the size of the vectors section,
138 but it's not easily available here. */
139 if (bfd_get_mach (table->abfd) == bfd_mach_h8300)
140 table->offset += 2;
141 else if (bfd_get_mach (table->abfd) == bfd_mach_h8300h)
142 table->offset += 4;
143 else
144 return NULL;
145
146 /* Everything went OK. */
147 return (struct bfd_hash_entry *) ret;
148 }
149
150 /* Initialize the function vector hash table. */
151
152 static boolean
153 funcvec_hash_table_init (table, abfd, newfunc)
154 struct funcvec_hash_table *table;
155 bfd *abfd;
156 struct bfd_hash_entry *(*newfunc) PARAMS ((struct bfd_hash_entry *,
157 struct bfd_hash_table *,
158 const char *));
159 {
160 /* Initialize our local fields, then call the generic initialization
161 routine. */
162 table->offset = 0;
163 table->abfd = abfd;
164 return (bfd_hash_table_init (&table->root, newfunc));
165 }
166
167 /* Create the derived linker hash table. We use a derived hash table
168 basically to hold "static" information during an h8/300 coff link
169 without using static variables. */
170
171 static struct bfd_link_hash_table *
172 h8300_coff_link_hash_table_create (abfd)
173 bfd *abfd;
174 {
175 struct h8300_coff_link_hash_table *ret;
176 ret = ((struct h8300_coff_link_hash_table *)
177 bfd_alloc (abfd, sizeof (struct h8300_coff_link_hash_table)));
178 if (ret == NULL)
179 return NULL;
180 if (!_bfd_link_hash_table_init (&ret->root.root, abfd, _bfd_generic_link_hash_newfunc))
181 {
182 bfd_release (abfd, ret);
183 return NULL;
184 }
185
186 /* Initialize our data. */
187 ret->vectors_sec = NULL;
188 ret->funcvec_hash_table = NULL;
189
190 /* OK. Everything's intialized, return the base pointer. */
191 return &ret->root.root;
192 }
193
194 /* special handling for H8/300 relocs.
195 We only come here for pcrel stuff and return normally if not an -r link.
196 When doing -r, we can't do any arithmetic for the pcrel stuff, because
197 the code in reloc.c assumes that we can manipulate the targets of
198 the pcrel branches. This isn't so, since the H8/300 can do relaxing,
199 which means that the gap after the instruction may not be enough to
200 contain the offset required for the branch, so we have to use the only
201 the addend until the final link */
202
203 static bfd_reloc_status_type
204 special (abfd, reloc_entry, symbol, data, input_section, output_bfd,
205 error_message)
206 bfd *abfd;
207 arelent *reloc_entry;
208 asymbol *symbol;
209 PTR data;
210 asection *input_section;
211 bfd *output_bfd;
212 char **error_message;
213 {
214 if (output_bfd == (bfd *) NULL)
215 return bfd_reloc_continue;
216
217 return bfd_reloc_ok;
218 }
219
220 static reloc_howto_type howto_table[] =
221 {
222 HOWTO (R_RELBYTE, 0, 0, 8, false, 0, complain_overflow_bitfield, special, "8", false, 0x000000ff, 0x000000ff, false),
223 HOWTO (R_RELWORD, 0, 1, 16, false, 0, complain_overflow_bitfield, special, "16", false, 0x0000ffff, 0x0000ffff, false),
224 HOWTO (R_RELLONG, 0, 2, 32, false, 0, complain_overflow_bitfield, special, "32", false, 0xffffffff, 0xffffffff, false),
225 HOWTO (R_PCRBYTE, 0, 0, 8, true, 0, complain_overflow_signed, special, "DISP8", false, 0x000000ff, 0x000000ff, true),
226 HOWTO (R_PCRWORD, 0, 1, 16, true, 0, complain_overflow_signed, special, "DISP16", false, 0x0000ffff, 0x0000ffff, true),
227 HOWTO (R_PCRLONG, 0, 2, 32, true, 0, complain_overflow_signed, special, "DISP32", false, 0xffffffff, 0xffffffff, true),
228 HOWTO (R_MOV16B1, 0, 1, 16, false, 0, complain_overflow_bitfield, special, "relaxable mov.b:16", false, 0x0000ffff, 0x0000ffff, false),
229 HOWTO (R_MOV16B2, 0, 1, 8, false, 0, complain_overflow_bitfield, special, "relaxed mov.b:16", false, 0x000000ff, 0x000000ff, false),
230 HOWTO (R_JMP1, 0, 1, 16, false, 0, complain_overflow_bitfield, special, "16/pcrel", false, 0x0000ffff, 0x0000ffff, false),
231 HOWTO (R_JMP2, 0, 0, 8, false, 0, complain_overflow_bitfield, special, "pcrecl/16", false, 0x000000ff, 0x000000ff, false),
232 HOWTO (R_JMPL1, 0, 2, 32, false, 0, complain_overflow_bitfield, special, "24/pcrell", false, 0x00ffffff, 0x00ffffff, false),
233 HOWTO (R_JMPL2, 0, 0, 8, false, 0, complain_overflow_bitfield, special, "pc8/24", false, 0x000000ff, 0x000000ff, false),
234 HOWTO (R_MOV24B1, 0, 1, 32, false, 0, complain_overflow_bitfield, special, "relaxable mov.b:24", false, 0xffffffff, 0xffffffff, false),
235 HOWTO (R_MOV24B2, 0, 1, 8, false, 0, complain_overflow_bitfield, special, "relaxed mov.b:24", false, 0x0000ffff, 0x0000ffff, false),
236
237 /* An indirect reference to a function. This causes the function's address
238 to be added to the function vector in lo-mem and puts the address of
239 the function vector's entry in the jsr instruction. */
240 HOWTO (R_MEM_INDIRECT, 0, 0, 8, false, 0, complain_overflow_bitfield, special, "8/indirect", false, 0x000000ff, 0x000000ff, false),
241
242 /* Internal reloc for relaxing. This is created when a 16bit pc-relative
243 branch is turned into an 8bit pc-relative branch. */
244 HOWTO (R_PCRWORD_B, 0, 0, 8, true, 0, complain_overflow_bitfield, special, "relaxed bCC:16", false, 0x000000ff, 0x000000ff, false),
245
246 HOWTO (R_MOVL1, 0, 2, 32, false, 0, complain_overflow_bitfield,special, "32/24 relaxable move", false, 0xffffffff, 0xffffffff, false),
247
248 HOWTO (R_MOVL2, 0, 1, 16, false, 0, complain_overflow_bitfield, special, "32/24 relaxed move", false, 0x0000ffff, 0x0000ffff, false),
249
250 HOWTO (R_BCC_INV, 0, 0, 8, true, 0, complain_overflow_signed, special, "DISP8 inverted", false, 0x000000ff, 0x000000ff, true),
251
252 HOWTO (R_JMP_DEL, 0, 0, 8, true, 0, complain_overflow_signed, special, "Deleted jump", false, 0x000000ff, 0x000000ff, true),
253 };
254
255
256 /* Turn a howto into a reloc number */
257
258 #define SELECT_RELOC(x,howto) \
259 { x.r_type = select_reloc(howto); }
260
261 #define BADMAG(x) (H8300BADMAG(x)&& H8300HBADMAG(x))
262 #define H8300 1 /* Customize coffcode.h */
263 #define __A_MAGIC_SET__
264
265
266
267 /* Code to swap in the reloc */
268 #define SWAP_IN_RELOC_OFFSET bfd_h_get_32
269 #define SWAP_OUT_RELOC_OFFSET bfd_h_put_32
270 #define SWAP_OUT_RELOC_EXTRA(abfd, src, dst) \
271 dst->r_stuff[0] = 'S'; \
272 dst->r_stuff[1] = 'C';
273
274
275 static int
276 select_reloc (howto)
277 reloc_howto_type *howto;
278 {
279 return howto->type;
280 }
281
282 /* Code to turn a r_type into a howto ptr, uses the above howto table
283 */
284
285 static void
286 rtype2howto (internal, dst)
287 arelent *internal;
288 struct internal_reloc *dst;
289 {
290 switch (dst->r_type)
291 {
292 case R_RELBYTE:
293 internal->howto = howto_table + 0;
294 break;
295 case R_RELWORD:
296 internal->howto = howto_table + 1;
297 break;
298 case R_RELLONG:
299 internal->howto = howto_table + 2;
300 break;
301 case R_PCRBYTE:
302 internal->howto = howto_table + 3;
303 break;
304 case R_PCRWORD:
305 internal->howto = howto_table + 4;
306 break;
307 case R_PCRLONG:
308 internal->howto = howto_table + 5;
309 break;
310 case R_MOV16B1:
311 internal->howto = howto_table + 6;
312 break;
313 case R_MOV16B2:
314 internal->howto = howto_table + 7;
315 break;
316 case R_JMP1:
317 internal->howto = howto_table + 8;
318 break;
319 case R_JMP2:
320 internal->howto = howto_table + 9;
321 break;
322 case R_JMPL1:
323 internal->howto = howto_table + 10;
324 break;
325 case R_JMPL2:
326 internal->howto = howto_table + 11;
327 break;
328 case R_MOV24B1:
329 internal->howto = howto_table + 12;
330 break;
331 case R_MOV24B2:
332 internal->howto = howto_table + 13;
333 break;
334 case R_MEM_INDIRECT:
335 internal->howto = howto_table + 14;
336 break;
337 case R_PCRWORD_B:
338 internal->howto = howto_table + 15;
339 break;
340 case R_MOVL1:
341 internal->howto = howto_table + 16;
342 break;
343 case R_MOVL2:
344 internal->howto = howto_table + 17;
345 break;
346 case R_BCC_INV:
347 internal->howto = howto_table + 18;
348 break;
349 case R_JMP_DEL:
350 internal->howto = howto_table + 19;
351 break;
352 default:
353 abort ();
354 break;
355 }
356 }
357
358 #define RTYPE2HOWTO(internal, relocentry) rtype2howto(internal,relocentry)
359
360
361 /* Perform any necessaru magic to the addend in a reloc entry */
362
363
364 #define CALC_ADDEND(abfd, symbol, ext_reloc, cache_ptr) \
365 cache_ptr->addend = ext_reloc.r_offset;
366
367
368 #define RELOC_PROCESSING(relent,reloc,symbols,abfd,section) \
369 reloc_processing(relent, reloc, symbols, abfd, section)
370
371 static void
372 reloc_processing (relent, reloc, symbols, abfd, section)
373 arelent * relent;
374 struct internal_reloc *reloc;
375 asymbol ** symbols;
376 bfd * abfd;
377 asection * section;
378 {
379 relent->address = reloc->r_vaddr;
380 rtype2howto (relent, reloc);
381
382 if (((int) reloc->r_symndx) > 0)
383 {
384 relent->sym_ptr_ptr = symbols + obj_convert (abfd)[reloc->r_symndx];
385 }
386 else
387 {
388 relent->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
389 }
390
391
392
393 relent->addend = reloc->r_offset;
394
395 relent->address -= section->vma;
396 /* relent->section = 0;*/
397 }
398
399 static boolean
400 h8300_symbol_address_p (abfd, input_section, address)
401 bfd *abfd;
402 asection *input_section;
403 bfd_vma address;
404 {
405 asymbol **s;
406
407 s = _bfd_generic_link_get_symbols (abfd);
408 BFD_ASSERT (s != (asymbol **) NULL);
409
410 /* Search all the symbols for one in INPUT_SECTION with
411 address ADDRESS. */
412 while (*s)
413 {
414 asymbol *p = *s;
415 if (p->section == input_section
416 && (input_section->output_section->vma
417 + input_section->output_offset
418 + p->value) == address)
419 return true;
420 s++;
421 }
422 return false;
423 }
424
425
426 /* If RELOC represents a relaxable instruction/reloc, change it into
427 the relaxed reloc, notify the linker that symbol addresses
428 have changed (bfd_perform_slip) and return how much the current
429 section has shrunk by.
430
431 FIXME: Much of this code has knowledge of the ordering of entries
432 in the howto table. This needs to be fixed. */
433
434 static int
435 h8300_reloc16_estimate(abfd, input_section, reloc, shrink, link_info)
436 bfd *abfd;
437 asection *input_section;
438 arelent *reloc;
439 unsigned int shrink;
440 struct bfd_link_info *link_info;
441 {
442 bfd_vma value;
443 bfd_vma dot;
444 bfd_vma gap;
445 static asection *last_input_section = NULL;
446 static arelent *last_reloc = NULL;
447
448 /* The address of the thing to be relocated will have moved back by
449 the size of the shrink - but we don't change reloc->address here,
450 since we need it to know where the relocation lives in the source
451 uncooked section. */
452 bfd_vma address = reloc->address - shrink;
453
454 if (input_section != last_input_section)
455 last_reloc = NULL;
456
457 /* Only examine the relocs which might be relaxable. */
458 switch (reloc->howto->type)
459 {
460
461 /* This is the 16/24 bit absolute branch which could become an 8 bit
462 pc-relative branch. */
463 case R_JMP1:
464 case R_JMPL1:
465 /* Get the address of the target of this branch. */
466 value = bfd_coff_reloc16_get_value(reloc, link_info, input_section);
467
468 /* Get the address of the next instruction (not the reloc). */
469 dot = (input_section->output_section->vma
470 + input_section->output_offset + address);
471
472 /* Adjust for R_JMP1 vs R_JMPL1. */
473 dot += (reloc->howto->type == R_JMP1 ? 1 : 2);
474
475 /* Compute the distance from this insn to the branch target. */
476 gap = value - dot;
477
478 /* If the distance is within -128..+128 inclusive, then we can relax
479 this jump. +128 is valid since the target will move two bytes
480 closer if we do relax this branch. */
481 if ((int)gap >= -128 && (int)gap <= 128 )
482 {
483
484 /* It's possible we may be able to eliminate this branch entirely;
485 if the previous instruction is a branch around this instruction,
486 and there's no label at this instruction, then we can reverse
487 the condition on the previous branch and eliminate this jump.
488
489 original: new:
490 bCC lab1 bCC' lab2
491 jmp lab2
492 lab1: lab1:
493
494 This saves 4 bytes instead of two, and should be relatively
495 common. */
496
497 if (gap <= 126
498 && last_reloc
499 && last_reloc->howto->type == R_PCRBYTE)
500 {
501 bfd_vma last_value;
502 last_value = bfd_coff_reloc16_get_value (last_reloc, link_info,
503 input_section) + 1;
504
505 if (last_value == dot + 2
506 && last_reloc->address + 1 == reloc->address
507 && ! h8300_symbol_address_p (abfd, input_section, dot - 2))
508 {
509 reloc->howto = howto_table + 19;
510 last_reloc->howto = howto_table + 18;
511 last_reloc->sym_ptr_ptr = reloc->sym_ptr_ptr;
512 last_reloc->addend = reloc->addend;
513 shrink += 4;
514 bfd_perform_slip (abfd, 4, input_section, address);
515 break;
516 }
517 }
518
519 /* Change the reloc type. */
520 reloc->howto = reloc->howto + 1;
521
522 /* This shrinks this section by two bytes. */
523 shrink += 2;
524 bfd_perform_slip(abfd, 2, input_section, address);
525 }
526 break;
527
528 /* This is the 16 bit pc-relative branch which could become an 8 bit
529 pc-relative branch. */
530 case R_PCRWORD:
531 /* Get the address of the target of this branch, add one to the value
532 because the addend field in PCrel jumps is off by -1. */
533 value = bfd_coff_reloc16_get_value(reloc, link_info, input_section) + 1;
534
535 /* Get the address of the next instruction if we were to relax. */
536 dot = input_section->output_section->vma +
537 input_section->output_offset + address;
538
539 /* Compute the distance from this insn to the branch target. */
540 gap = value - dot;
541
542 /* If the distance is within -128..+128 inclusive, then we can relax
543 this jump. +128 is valid since the target will move two bytes
544 closer if we do relax this branch. */
545 if ((int)gap >= -128 && (int)gap <= 128 )
546 {
547 /* Change the reloc type. */
548 reloc->howto = howto_table + 15;
549
550 /* This shrinks this section by two bytes. */
551 shrink += 2;
552 bfd_perform_slip(abfd, 2, input_section, address);
553 }
554 break;
555
556 /* This is a 16 bit absolute address in a mov.b insn, which can
557 become an 8 bit absolute address if it's in the right range. */
558 case R_MOV16B1:
559 /* Get the address of the data referenced by this mov.b insn. */
560 value = bfd_coff_reloc16_get_value(reloc, link_info, input_section);
561
562 /* The address is in 0xff00..0xffff inclusive on the h8300 or
563 0xffff00..0xffffff inclusive on the h8300h, then we can
564 relax this mov.b */
565 if ((bfd_get_mach (abfd) == bfd_mach_h8300
566 && value >= 0xff00
567 && value <= 0xffff)
568 || (bfd_get_mach (abfd) == bfd_mach_h8300h
569 && value >= 0xffff00
570 && value <= 0xffffff))
571 {
572 /* Change the reloc type. */
573 reloc->howto = reloc->howto + 1;
574
575 /* This shrinks this section by two bytes. */
576 shrink += 2;
577 bfd_perform_slip(abfd, 2, input_section, address);
578 }
579 break;
580
581 /* Similarly for a 24 bit absolute address in a mov.b. Note that
582 if we can't relax this into an 8 bit absolute, we'll fall through
583 and try to relax it into a 16bit absolute. */
584 case R_MOV24B1:
585 /* Get the address of the data referenced by this mov.b insn. */
586 value = bfd_coff_reloc16_get_value(reloc, link_info, input_section);
587
588 /* The address is in 0xffff00..0xffffff inclusive on the h8300h,
589 then we can relax this mov.b */
590 if (bfd_get_mach (abfd) == bfd_mach_h8300h
591 && value >= 0xffff00
592 && value <= 0xffffff)
593 {
594 /* Change the reloc type. */
595 reloc->howto = reloc->howto + 1;
596
597 /* This shrinks this section by four bytes. */
598 shrink += 4;
599 bfd_perform_slip(abfd, 4, input_section, address);
600
601 /* Done with this reloc. */
602 break;
603 }
604
605 /* FALLTHROUGH and try to turn the 32/24 bit reloc into a 16 bit
606 reloc. */
607
608 /* This is a 24/32 bit absolute address in a mov insn, which can
609 become an 16 bit absolute address if it's in the right range. */
610 case R_MOVL1:
611 /* Get the address of the data referenced by this mov insn. */
612 value = bfd_coff_reloc16_get_value(reloc, link_info, input_section);
613
614 /* If this address is in 0x0000..0x7fff inclusive or
615 0xff8000..0xffffff inclusive, then it can be relaxed. */
616 if (value <= 0x7fff || value >= 0xff8000)
617 {
618 /* Change the reloc type. */
619 reloc->howto = howto_table + 17;
620
621 /* This shrinks this section by two bytes. */
622 shrink += 2;
623 bfd_perform_slip(abfd, 2, input_section, address);
624 }
625 break;
626
627 /* No other reloc types represent relaxing opportunities. */
628 default:
629 break;
630 }
631
632 last_reloc = reloc;
633 last_input_section = input_section;
634 return shrink;
635 }
636
637
638 /* Handle relocations for the H8/300, including relocs for relaxed
639 instructions.
640
641 FIXME: Not all relocations check for overflow! */
642
643 static void
644 h8300_reloc16_extra_cases (abfd, link_info, link_order, reloc, data, src_ptr,
645 dst_ptr)
646 bfd *abfd;
647 struct bfd_link_info *link_info;
648 struct bfd_link_order *link_order;
649 arelent *reloc;
650 bfd_byte *data;
651 unsigned int *src_ptr;
652 unsigned int *dst_ptr;
653 {
654 unsigned int src_address = *src_ptr;
655 unsigned int dst_address = *dst_ptr;
656 asection *input_section = link_order->u.indirect.section;
657 bfd_vma value;
658 bfd_vma dot;
659 int gap,tmp;
660
661 switch (reloc->howto->type)
662 {
663
664 /* Generic 8bit pc-relative relocation. */
665 case R_PCRBYTE:
666 /* Get the address of the target of this branch. */
667 value = bfd_coff_reloc16_get_value(reloc, link_info, input_section);
668
669 dot = (link_order->offset
670 + dst_address
671 + link_order->u.indirect.section->output_section->vma);
672
673 gap = value - dot;
674
675 /* Sanity check. */
676 if (gap < -128 || gap > 126)
677 {
678 if (! ((*link_info->callbacks->reloc_overflow)
679 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
680 reloc->howto->name, reloc->addend, input_section->owner,
681 input_section, reloc->address)))
682 abort ();
683 }
684
685 /* Everything looks OK. Apply the relocation and update the
686 src/dst address appropriately. */
687
688 bfd_put_8 (abfd, gap, data + dst_address);
689 dst_address++;
690 src_address++;
691
692 /* All done. */
693 break;
694
695 /* Generic 16bit pc-relative relocation. */
696 case R_PCRWORD:
697 /* Get the address of the target of this branch. */
698 value = bfd_coff_reloc16_get_value(reloc, link_info, input_section);
699
700 /* Get the address of the instruction (not the reloc). */
701 dot = (link_order->offset
702 + dst_address
703 + link_order->u.indirect.section->output_section->vma + 1);
704
705 gap = value - dot;
706
707 /* Sanity check. */
708 if (gap > 32766 || gap < -32768)
709 {
710 if (! ((*link_info->callbacks->reloc_overflow)
711 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
712 reloc->howto->name, reloc->addend, input_section->owner,
713 input_section, reloc->address)))
714 abort ();
715 }
716
717 /* Everything looks OK. Apply the relocation and update the
718 src/dst address appropriately. */
719
720 bfd_put_16 (abfd, gap, data + dst_address);
721 dst_address += 2;
722 src_address += 2;
723
724 /* All done. */
725 break;
726
727 /* Generic 8bit absolute relocation. */
728 case R_RELBYTE:
729 /* Get the address of the object referenced by this insn. */
730 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
731
732 /* Sanity check. */
733 if (value < 0xff
734 || (value >= 0x0000ff00 && value <= 0x0000ffff)
735 || (value >= 0x00ffff00 && value <= 0x00ffffff)
736 || (value >= 0xffffff00 && value <= 0xffffffff))
737 {
738 /* Everything looks OK. Apply the relocation and update the
739 src/dst address appropriately. */
740
741 bfd_put_8 (abfd, gap, data + dst_address);
742 dst_address += 1;
743 src_address += 1;
744 }
745 else
746 {
747 if (! ((*link_info->callbacks->reloc_overflow)
748 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
749 reloc->howto->name, reloc->addend, input_section->owner,
750 input_section, reloc->address)))
751 abort ();
752 }
753
754 /* All done. */
755 break;
756
757 /* Various simple 16bit absolute relocations. */
758 case R_MOV16B1:
759 case R_JMP1:
760 case R_RELWORD:
761 value = bfd_coff_reloc16_get_value(reloc, link_info, input_section);
762 bfd_put_16 (abfd, value, data + dst_address);
763 dst_address += 2;
764 src_address += 2;
765 break;
766
767 /* Various simple 24/32bit absolute relocations. */
768 case R_MOV24B1:
769 case R_MOVL1:
770 case R_RELLONG:
771 /* Get the address of the target of this branch. */
772 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section),
773 bfd_put_32 (abfd, value, data + dst_address);
774 dst_address += 4;
775 src_address += 4;
776 break;
777
778 /* Another 24/32bit absolute relocation. */
779 case R_JMPL1:
780 /* Get the address of the target of this branch. */
781 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
782
783 value = ((value & 0x00ffffff)
784 | (bfd_get_32 (abfd, data + src_address) & 0xff000000));
785 bfd_put_32 (abfd, value, data + dst_address);
786 dst_address += 4;
787 src_address += 4;
788 break;
789
790 /* A 16bit abolute relocation that was formerlly a 24/32bit
791 absolute relocation. */
792 case R_MOVL2:
793 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
794
795 /* Sanity check. */
796 if (value < 0x8000 || value > 0xff8000)
797 {
798 /* Insert the 16bit value into the proper location. */
799 bfd_put_16 (abfd, value, data + dst_address);
800
801 /* Fix the opcode. For all the move insns, we simply
802 need to turn off bit 0x20 in the previous byte. */
803 data[dst_address - 1] &= ~0x20;
804 dst_address += 2;
805 src_address += 4;
806 }
807 else
808 {
809 if (! ((*link_info->callbacks->reloc_overflow)
810 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
811 reloc->howto->name, reloc->addend, input_section->owner,
812 input_section, reloc->address)))
813 abort ();
814 }
815 break;
816
817 /* A 16bit absolute branch that is now an 8-bit pc-relative branch. */
818 case R_JMP2:
819 /* Get the address of the target of this branch. */
820 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
821
822 /* Get the address of the next instruction. */
823 dot = (link_order->offset
824 + dst_address
825 + link_order->u.indirect.section->output_section->vma + 1);
826
827 gap = value - dot;
828
829 /* Sanity check. */
830 if (gap < -128 || gap > 126)
831 {
832 if (! ((*link_info->callbacks->reloc_overflow)
833 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
834 reloc->howto->name, reloc->addend, input_section->owner,
835 input_section, reloc->address)))
836 abort ();
837 }
838
839 /* Now fix the instruction itself. */
840 switch (data[dst_address - 1])
841 {
842 case 0x5e:
843 /* jsr -> bsr */
844 bfd_put_8 (abfd, 0x55, data + dst_address - 1);
845 break;
846 case 0x5a:
847 /* jmp ->bra */
848 bfd_put_8 (abfd, 0x40, data + dst_address - 1);
849 break;
850
851 default:
852 abort ();
853 }
854
855 /* Write out the 8bit value. */
856 bfd_put_8 (abfd, gap, data + dst_address);
857
858 dst_address += 1;
859 src_address += 3;
860
861 break;
862
863 /* A 16bit pc-relative branch that is now an 8-bit pc-relative branch. */
864 case R_PCRWORD_B:
865 /* Get the address of the target of this branch. */
866 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
867
868 /* Get the address of the instruction (not the reloc). */
869 dot = (link_order->offset
870 + dst_address
871 + link_order->u.indirect.section->output_section->vma - 1);
872
873 gap = value - dot;
874
875 /* Sanity check. */
876 if (gap < -128 || gap > 126)
877 {
878 if (! ((*link_info->callbacks->reloc_overflow)
879 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
880 reloc->howto->name, reloc->addend, input_section->owner,
881 input_section, reloc->address)))
882 abort ();
883 }
884
885 /* Now fix the instruction. */
886 switch (data[dst_address - 2])
887 {
888 case 0x58:
889 /* bCC:16 -> bCC:8 */
890 /* Get the condition code from the original insn. */
891 tmp = data[dst_address - 1];
892 tmp &= 0xf0;
893 tmp >>= 4;
894
895 /* Now or in the high nibble of the opcode. */
896 tmp |= 0x40;
897
898 /* Write it. */
899 bfd_put_8 (abfd, tmp, data + dst_address - 2);
900 break;
901
902 default:
903 abort ();
904 }
905
906 /* Output the target. */
907 bfd_put_8 (abfd, gap, data + dst_address - 1);
908
909 /* We don't advance dst_address -- the 8bit reloc is applied at
910 dst_address - 1, so the next insn should begin at dst_address. */
911 src_address += 2;
912
913 break;
914
915 /* Similarly for a 24bit absolute that is now 8 bits. */
916 case R_JMPL2:
917 /* Get the address of the target of this branch. */
918 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
919
920 /* Get the address of the instruction (not the reloc). */
921 dot = (link_order->offset
922 + dst_address
923 + link_order->u.indirect.section->output_section->vma + 2);
924
925 gap = value - dot;
926
927 /* Fix the instruction. */
928 switch (data[src_address])
929 {
930 case 0x5e:
931 /* jsr -> bsr */
932 bfd_put_8 (abfd, 0x55, data + dst_address);
933 break;
934 case 0x5a:
935 /* jmp ->bra */
936 bfd_put_8 (abfd, 0x40, data + dst_address);
937 break;
938 default:
939 abort ();
940 }
941
942 bfd_put_8 (abfd, gap, data + dst_address + 1);
943 dst_address += 2;
944 src_address += 4;
945
946 break;
947
948 /* A 16bit absolute mov.b that is now an 8bit absolute mov.b. */
949 case R_MOV16B2:
950 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
951
952 /* Sanity check. */
953 if (data[dst_address - 2] != 0x6a)
954 abort ();
955
956 /* Fix up the opcode. */
957 switch (data[src_address-1] & 0xf0)
958 {
959 case 0x00:
960 data[dst_address - 2] = (data[src_address-1] & 0xf) | 0x20;
961 break;
962 case 0x80:
963 data[dst_address - 2] = (data[src_address-1] & 0xf) | 0x30;
964 break;
965 default:
966 abort ();
967 }
968
969 bfd_put_8 (abfd, value & 0xff, data + dst_address - 1);
970 src_address += 2;
971 break;
972
973 /* Similarly for a 24bit mov.b */
974 case R_MOV24B2:
975 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
976
977 /* Sanity check. */
978 if (data[dst_address - 2] != 0x6a)
979 abort ();
980
981 /* Fix up the opcode. */
982 switch (data[src_address-1] & 0xf0)
983 {
984 case 0x20:
985 data[dst_address - 2] = (data[src_address-1] & 0xf) | 0x20;
986 break;
987 case 0xa0:
988 data[dst_address - 2] = (data[src_address-1] & 0xf) | 0x30;
989 break;
990 default:
991 abort ();
992 }
993
994 bfd_put_8 (abfd, value & 0xff, data + dst_address - 1);
995 src_address += 4;
996 break;
997
998 case R_BCC_INV:
999 /* Get the address of the target of this branch. */
1000 value = bfd_coff_reloc16_get_value(reloc, link_info, input_section);
1001
1002 dot = (link_order->offset
1003 + dst_address
1004 + link_order->u.indirect.section->output_section->vma) + 1;
1005
1006 gap = value - dot;
1007
1008 /* Sanity check. */
1009 if (gap < -128 || gap > 126)
1010 {
1011 if (! ((*link_info->callbacks->reloc_overflow)
1012 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
1013 reloc->howto->name, reloc->addend, input_section->owner,
1014 input_section, reloc->address)))
1015 abort ();
1016 }
1017
1018 /* Everything looks OK. Fix the condition in the instruction, apply
1019 the relocation, and update the src/dst address appropriately. */
1020
1021 bfd_put_8 (abfd, bfd_get_8 (abfd, data + dst_address - 1) ^ 1,
1022 data + dst_address - 1);
1023 bfd_put_8 (abfd, gap, data + dst_address);
1024 dst_address++;
1025 src_address++;
1026
1027 /* All done. */
1028 break;
1029
1030 case R_JMP_DEL:
1031 src_address += 4;
1032 break;
1033
1034 /* An 8bit memory indirect instruction (jmp/jsr).
1035
1036 There's several things that need to be done to handle
1037 this relocation.
1038
1039 If this is a reloc against the absolute symbol, then
1040 we should handle it just R_RELBYTE. Likewise if it's
1041 for a symbol with a value ge 0 and le 0xff.
1042
1043 Otherwise it's a jump/call through the function vector,
1044 and the linker is expected to set up the function vector
1045 and put the right value into the jump/call instruction. */
1046 case R_MEM_INDIRECT:
1047 {
1048 /* We need to find the symbol so we can determine it's
1049 address in the function vector table. */
1050 asymbol *symbol;
1051 bfd_vma value;
1052 const char *name;
1053 struct funcvec_hash_entry *h;
1054 asection *vectors_sec = h8300_coff_hash_table (link_info)->vectors_sec;
1055
1056 /* First see if this is a reloc against the absolute symbol
1057 or against a symbol with a nonnegative value <= 0xff. */
1058 symbol = *(reloc->sym_ptr_ptr);
1059 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
1060 if (symbol == bfd_abs_section_ptr->symbol
1061 || (value >= 0 && value <= 0xff))
1062 {
1063 /* This should be handled in a manner very similar to
1064 R_RELBYTES. If the value is in range, then just slam
1065 the value into the right location. Else trigger a
1066 reloc overflow callback. */
1067 if (value >= 0 && value <= 0xff)
1068 {
1069 bfd_put_8 (abfd, value, data + dst_address);
1070 dst_address += 1;
1071 src_address += 1;
1072 }
1073 else
1074 {
1075 if (! ((*link_info->callbacks->reloc_overflow)
1076 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
1077 reloc->howto->name, reloc->addend, input_section->owner,
1078 input_section, reloc->address)))
1079 abort ();
1080 }
1081 break;
1082 }
1083
1084 /* This is a jump/call through a function vector, and we're
1085 expected to create the function vector ourselves.
1086
1087 First look up this symbol in the linker hash table -- we need
1088 the derived linker symbol which holds this symbol's index
1089 in the function vector. */
1090 name = symbol->name;
1091 if (symbol->flags & BSF_LOCAL)
1092 {
1093 char *new_name = bfd_malloc (strlen (name) + 9);
1094 if (new_name == NULL)
1095 abort ();
1096
1097 strcpy (new_name, name);
1098 sprintf (new_name + strlen (name), "_%08x",
1099 (int)symbol->section);
1100 name = new_name;
1101 }
1102
1103 h = funcvec_hash_lookup (h8300_coff_hash_table (link_info)->funcvec_hash_table,
1104 name, false, false);
1105
1106 /* This shouldn't ever happen. If it does that means we've got
1107 data corruption of some kind. Aborting seems like a reasonable
1108 think to do here. */
1109 if (h == NULL || vectors_sec == NULL)
1110 abort ();
1111
1112 /* Place the address of the function vector entry into the
1113 reloc's address. */
1114 bfd_put_8 (abfd,
1115 vectors_sec->output_offset + h->offset,
1116 data + dst_address);
1117
1118 dst_address++;
1119 src_address++;
1120
1121 /* Now create an entry in the function vector itself. */
1122 if (bfd_get_mach (input_section->owner) == bfd_mach_h8300)
1123 bfd_put_16 (abfd,
1124 bfd_coff_reloc16_get_value (reloc,
1125 link_info,
1126 input_section),
1127 vectors_sec->contents + h->offset);
1128 else if (bfd_get_mach (input_section->owner) == bfd_mach_h8300h)
1129 bfd_put_32 (abfd,
1130 bfd_coff_reloc16_get_value (reloc,
1131 link_info,
1132 input_section),
1133 vectors_sec->contents + h->offset);
1134 else
1135 abort ();
1136
1137 /* Gross. We've already written the contents of the vector section
1138 before we get here... So we write it again with the new data. */
1139 bfd_set_section_contents (vectors_sec->output_section->owner,
1140 vectors_sec->output_section,
1141 vectors_sec->contents,
1142 vectors_sec->output_offset,
1143 vectors_sec->_raw_size);
1144 break;
1145 }
1146
1147 default:
1148 abort ();
1149 break;
1150
1151 }
1152
1153 *src_ptr = src_address;
1154 *dst_ptr = dst_address;
1155 }
1156
1157
1158 /* Routine for the h8300 linker.
1159
1160 This routine is necessary to handle the special R_MEM_INDIRECT
1161 relocs on the h8300. It's responsible for generating a vectors
1162 section and attaching it to an input bfd as well as sizing
1163 the vectors section. It also creates our vectors hash table.
1164
1165 It uses the generic linker routines to actually add the symbols.
1166 from this BFD to the bfd linker hash table. It may add a few
1167 selected static symbols to the bfd linker hash table. */
1168
1169 static boolean
1170 h8300_bfd_link_add_symbols(abfd, info)
1171 bfd *abfd;
1172 struct bfd_link_info *info;
1173 {
1174 asection *sec;
1175 struct funcvec_hash_table *funcvec_hash_table;
1176
1177 /* If we haven't created a vectors section, do so now. */
1178 if (!h8300_coff_hash_table (info)->vectors_sec)
1179 {
1180 flagword flags;
1181
1182 /* Make sure the appropriate flags are set, including SEC_IN_MEMORY. */
1183 flags = (SEC_ALLOC | SEC_LOAD
1184 | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_READONLY);
1185 h8300_coff_hash_table (info)->vectors_sec = bfd_make_section (abfd,
1186 ".vectors");
1187
1188 /* If the section wasn't created, or we couldn't set the flags,
1189 quit quickly now, rather than dieing a painful death later. */
1190 if (! h8300_coff_hash_table (info)->vectors_sec
1191 || ! bfd_set_section_flags (abfd,
1192 h8300_coff_hash_table(info)->vectors_sec,
1193 flags))
1194 return false;
1195
1196 /* Also create the vector hash table. */
1197 funcvec_hash_table = ((struct funcvec_hash_table *)
1198 bfd_alloc (abfd, sizeof (struct funcvec_hash_table)));
1199
1200 if (!funcvec_hash_table)
1201 return false;
1202
1203 /* And initialize the funcvec hash table. */
1204 if (!funcvec_hash_table_init (funcvec_hash_table, abfd,
1205 funcvec_hash_newfunc))
1206 {
1207 bfd_release (abfd, funcvec_hash_table);
1208 return false;
1209 }
1210
1211 /* Store away a pointer to the funcvec hash table. */
1212 h8300_coff_hash_table (info)->funcvec_hash_table = funcvec_hash_table;
1213 }
1214
1215 /* Load up the function vector hash table. */
1216 funcvec_hash_table = h8300_coff_hash_table (info)->funcvec_hash_table;
1217
1218 /* Add the symbols using the generic code. */
1219 _bfd_generic_link_add_symbols (abfd, info);
1220
1221 /* Now scan the relocs for all the sections in this bfd; create
1222 additional space in the .vectors section as needed. */
1223 for (sec = abfd->sections; sec; sec = sec->next)
1224 {
1225 unsigned long reloc_size, reloc_count, i;
1226 asymbol **symbols;
1227 arelent **relocs;
1228
1229 /* Suck in the relocs, symbols & canonicalize them. */
1230 reloc_size = bfd_get_reloc_upper_bound (abfd, sec);
1231 if (reloc_size <= 0)
1232 continue;
1233
1234 relocs = (arelent **)bfd_malloc ((size_t)reloc_size);
1235 if (!relocs)
1236 return false;
1237
1238 /* The symbols should have been read in by _bfd_generic link_add_symbols
1239 call abovec, so we can cheat and use the pointer to them that was
1240 saved in the above call. */
1241 symbols = _bfd_generic_link_get_symbols(abfd);
1242 reloc_count = bfd_canonicalize_reloc (abfd, sec, relocs, symbols);
1243
1244 /* Now walk through all the relocations in this section. */
1245 for (i = 0; i < reloc_count; i++)
1246 {
1247 arelent *reloc = relocs[i];
1248 asymbol *symbol = *(reloc->sym_ptr_ptr);
1249 const char *name;
1250
1251 /* We've got an indirect reloc. See if we need to add it
1252 to the function vector table. At this point, we have
1253 to add a new entry for each unique symbol referenced
1254 by an R_MEM_INDIRECT relocation except for a reloc
1255 against the absolute section symbol. */
1256 if (reloc->howto->type == R_MEM_INDIRECT
1257 && symbol != bfd_abs_section_ptr->symbol)
1258
1259 {
1260 struct funcvec_hash_entry *h;
1261
1262 name = symbol->name;
1263 if (symbol->flags & BSF_LOCAL)
1264 {
1265 char *new_name = bfd_malloc (strlen (name) + 9);
1266
1267 if (new_name == NULL)
1268 abort ();
1269
1270 strcpy (new_name, name);
1271 sprintf (new_name + strlen (name), "_%08x",
1272 (int)symbol->section);
1273 name = new_name;
1274 }
1275
1276 /* Look this symbol up in the function vector hash table. */
1277 h = funcvec_hash_lookup (h8300_coff_hash_table (info)->funcvec_hash_table,
1278 name, false, false);
1279
1280
1281 /* If this symbol isn't already in the hash table, add
1282 it and bump up the size of the hash table. */
1283 if (h == NULL)
1284 {
1285 h = funcvec_hash_lookup (h8300_coff_hash_table (info)->funcvec_hash_table,
1286 name, true, true);
1287 if (h == NULL)
1288 {
1289 free (relocs);
1290 return false;
1291 }
1292
1293 /* Bump the size of the vectors section. Each vector
1294 takes 2 bytes on the h8300 and 4 bytes on the h8300h. */
1295 if (bfd_get_mach (abfd) == bfd_mach_h8300)
1296 h8300_coff_hash_table (info)->vectors_sec->_raw_size += 2;
1297 else if (bfd_get_mach (abfd) == bfd_mach_h8300h)
1298 h8300_coff_hash_table (info)->vectors_sec->_raw_size += 4;
1299 }
1300 }
1301 }
1302
1303 /* We're done with the relocations, release them. */
1304 free (relocs);
1305 }
1306
1307 /* Now actually allocate some space for the function vector. It's
1308 wasteful to do this more than once, but this is easier. */
1309 if (h8300_coff_hash_table (info)->vectors_sec->_raw_size != 0)
1310 {
1311 /* Free the old contents. */
1312 if (h8300_coff_hash_table (info)->vectors_sec->contents)
1313 free (h8300_coff_hash_table (info)->vectors_sec->contents);
1314
1315 /* Allocate new contents. */
1316 h8300_coff_hash_table (info)->vectors_sec->contents
1317 = bfd_malloc (h8300_coff_hash_table (info)->vectors_sec->_raw_size);
1318 }
1319
1320 return true;
1321 }
1322
1323 #define coff_reloc16_extra_cases h8300_reloc16_extra_cases
1324 #define coff_reloc16_estimate h8300_reloc16_estimate
1325 #define coff_bfd_link_add_symbols h8300_bfd_link_add_symbols
1326 #define coff_bfd_link_hash_table_create h8300_coff_link_hash_table_create
1327
1328 #define COFF_LONG_FILENAMES
1329 #include "coffcode.h"
1330
1331
1332 #undef coff_bfd_get_relocated_section_contents
1333 #undef coff_bfd_relax_section
1334 #define coff_bfd_get_relocated_section_contents \
1335 bfd_coff_reloc16_get_relocated_section_contents
1336 #define coff_bfd_relax_section bfd_coff_reloc16_relax_section
1337
1338
1339
1340 const bfd_target h8300coff_vec =
1341 {
1342 "coff-h8300", /* name */
1343 bfd_target_coff_flavour,
1344 BFD_ENDIAN_BIG, /* data byte order is big */
1345 BFD_ENDIAN_BIG, /* header byte order is big */
1346
1347 (HAS_RELOC | EXEC_P | /* object flags */
1348 HAS_LINENO | HAS_DEBUG |
1349 HAS_SYMS | HAS_LOCALS | WP_TEXT | BFD_IS_RELAXABLE ),
1350 (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), /* section flags */
1351 '_', /* leading char */
1352 '/', /* ar_pad_char */
1353 15, /* ar_max_namelen */
1354 bfd_getb64, bfd_getb_signed_64, bfd_putb64,
1355 bfd_getb32, bfd_getb_signed_32, bfd_putb32,
1356 bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* data */
1357 bfd_getb64, bfd_getb_signed_64, bfd_putb64,
1358 bfd_getb32, bfd_getb_signed_32, bfd_putb32,
1359 bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* hdrs */
1360
1361 {_bfd_dummy_target, coff_object_p, /* bfd_check_format */
1362 bfd_generic_archive_p, _bfd_dummy_target},
1363 {bfd_false, coff_mkobject, _bfd_generic_mkarchive, /* bfd_set_format */
1364 bfd_false},
1365 {bfd_false, coff_write_object_contents, /* bfd_write_contents */
1366 _bfd_write_archive_contents, bfd_false},
1367
1368 BFD_JUMP_TABLE_GENERIC (coff),
1369 BFD_JUMP_TABLE_COPY (coff),
1370 BFD_JUMP_TABLE_CORE (_bfd_nocore),
1371 BFD_JUMP_TABLE_ARCHIVE (_bfd_archive_coff),
1372 BFD_JUMP_TABLE_SYMBOLS (coff),
1373 BFD_JUMP_TABLE_RELOCS (coff),
1374 BFD_JUMP_TABLE_WRITE (coff),
1375 BFD_JUMP_TABLE_LINK (coff),
1376 BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic),
1377
1378 COFF_SWAP_TABLE,
1379 };
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