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[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
1 /* 32-bit ELF support for ARM
2 Copyright (C) 1998-2016 Free Software Foundation, Inc.
3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
20
21 #include "sysdep.h"
22 #include <limits.h>
23
24 #include "bfd.h"
25 #include "bfd_stdint.h"
26 #include "libiberty.h"
27 #include "libbfd.h"
28 #include "elf-bfd.h"
29 #include "elf-nacl.h"
30 #include "elf-vxworks.h"
31 #include "elf/arm.h"
32
33 /* Return the relocation section associated with NAME. HTAB is the
34 bfd's elf32_arm_link_hash_entry. */
35 #define RELOC_SECTION(HTAB, NAME) \
36 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
37
38 /* Return size of a relocation entry. HTAB is the bfd's
39 elf32_arm_link_hash_entry. */
40 #define RELOC_SIZE(HTAB) \
41 ((HTAB)->use_rel \
42 ? sizeof (Elf32_External_Rel) \
43 : sizeof (Elf32_External_Rela))
44
45 /* Return function to swap relocations in. HTAB is the bfd's
46 elf32_arm_link_hash_entry. */
47 #define SWAP_RELOC_IN(HTAB) \
48 ((HTAB)->use_rel \
49 ? bfd_elf32_swap_reloc_in \
50 : bfd_elf32_swap_reloca_in)
51
52 /* Return function to swap relocations out. HTAB is the bfd's
53 elf32_arm_link_hash_entry. */
54 #define SWAP_RELOC_OUT(HTAB) \
55 ((HTAB)->use_rel \
56 ? bfd_elf32_swap_reloc_out \
57 : bfd_elf32_swap_reloca_out)
58
59 #define elf_info_to_howto 0
60 #define elf_info_to_howto_rel elf32_arm_info_to_howto
61
62 #define ARM_ELF_ABI_VERSION 0
63 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
64
65 /* The Adjusted Place, as defined by AAELF. */
66 #define Pa(X) ((X) & 0xfffffffc)
67
68 static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
69 struct bfd_link_info *link_info,
70 asection *sec,
71 bfd_byte *contents);
72
73 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
74 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
75 in that slot. */
76
77 static reloc_howto_type elf32_arm_howto_table_1[] =
78 {
79 /* No relocation. */
80 HOWTO (R_ARM_NONE, /* type */
81 0, /* rightshift */
82 3, /* size (0 = byte, 1 = short, 2 = long) */
83 0, /* bitsize */
84 FALSE, /* pc_relative */
85 0, /* bitpos */
86 complain_overflow_dont,/* complain_on_overflow */
87 bfd_elf_generic_reloc, /* special_function */
88 "R_ARM_NONE", /* name */
89 FALSE, /* partial_inplace */
90 0, /* src_mask */
91 0, /* dst_mask */
92 FALSE), /* pcrel_offset */
93
94 HOWTO (R_ARM_PC24, /* type */
95 2, /* rightshift */
96 2, /* size (0 = byte, 1 = short, 2 = long) */
97 24, /* bitsize */
98 TRUE, /* pc_relative */
99 0, /* bitpos */
100 complain_overflow_signed,/* complain_on_overflow */
101 bfd_elf_generic_reloc, /* special_function */
102 "R_ARM_PC24", /* name */
103 FALSE, /* partial_inplace */
104 0x00ffffff, /* src_mask */
105 0x00ffffff, /* dst_mask */
106 TRUE), /* pcrel_offset */
107
108 /* 32 bit absolute */
109 HOWTO (R_ARM_ABS32, /* type */
110 0, /* rightshift */
111 2, /* size (0 = byte, 1 = short, 2 = long) */
112 32, /* bitsize */
113 FALSE, /* pc_relative */
114 0, /* bitpos */
115 complain_overflow_bitfield,/* complain_on_overflow */
116 bfd_elf_generic_reloc, /* special_function */
117 "R_ARM_ABS32", /* name */
118 FALSE, /* partial_inplace */
119 0xffffffff, /* src_mask */
120 0xffffffff, /* dst_mask */
121 FALSE), /* pcrel_offset */
122
123 /* standard 32bit pc-relative reloc */
124 HOWTO (R_ARM_REL32, /* type */
125 0, /* rightshift */
126 2, /* size (0 = byte, 1 = short, 2 = long) */
127 32, /* bitsize */
128 TRUE, /* pc_relative */
129 0, /* bitpos */
130 complain_overflow_bitfield,/* complain_on_overflow */
131 bfd_elf_generic_reloc, /* special_function */
132 "R_ARM_REL32", /* name */
133 FALSE, /* partial_inplace */
134 0xffffffff, /* src_mask */
135 0xffffffff, /* dst_mask */
136 TRUE), /* pcrel_offset */
137
138 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
139 HOWTO (R_ARM_LDR_PC_G0, /* type */
140 0, /* rightshift */
141 0, /* size (0 = byte, 1 = short, 2 = long) */
142 32, /* bitsize */
143 TRUE, /* pc_relative */
144 0, /* bitpos */
145 complain_overflow_dont,/* complain_on_overflow */
146 bfd_elf_generic_reloc, /* special_function */
147 "R_ARM_LDR_PC_G0", /* name */
148 FALSE, /* partial_inplace */
149 0xffffffff, /* src_mask */
150 0xffffffff, /* dst_mask */
151 TRUE), /* pcrel_offset */
152
153 /* 16 bit absolute */
154 HOWTO (R_ARM_ABS16, /* type */
155 0, /* rightshift */
156 1, /* size (0 = byte, 1 = short, 2 = long) */
157 16, /* bitsize */
158 FALSE, /* pc_relative */
159 0, /* bitpos */
160 complain_overflow_bitfield,/* complain_on_overflow */
161 bfd_elf_generic_reloc, /* special_function */
162 "R_ARM_ABS16", /* name */
163 FALSE, /* partial_inplace */
164 0x0000ffff, /* src_mask */
165 0x0000ffff, /* dst_mask */
166 FALSE), /* pcrel_offset */
167
168 /* 12 bit absolute */
169 HOWTO (R_ARM_ABS12, /* type */
170 0, /* rightshift */
171 2, /* size (0 = byte, 1 = short, 2 = long) */
172 12, /* bitsize */
173 FALSE, /* pc_relative */
174 0, /* bitpos */
175 complain_overflow_bitfield,/* complain_on_overflow */
176 bfd_elf_generic_reloc, /* special_function */
177 "R_ARM_ABS12", /* name */
178 FALSE, /* partial_inplace */
179 0x00000fff, /* src_mask */
180 0x00000fff, /* dst_mask */
181 FALSE), /* pcrel_offset */
182
183 HOWTO (R_ARM_THM_ABS5, /* type */
184 6, /* rightshift */
185 1, /* size (0 = byte, 1 = short, 2 = long) */
186 5, /* bitsize */
187 FALSE, /* pc_relative */
188 0, /* bitpos */
189 complain_overflow_bitfield,/* complain_on_overflow */
190 bfd_elf_generic_reloc, /* special_function */
191 "R_ARM_THM_ABS5", /* name */
192 FALSE, /* partial_inplace */
193 0x000007e0, /* src_mask */
194 0x000007e0, /* dst_mask */
195 FALSE), /* pcrel_offset */
196
197 /* 8 bit absolute */
198 HOWTO (R_ARM_ABS8, /* type */
199 0, /* rightshift */
200 0, /* size (0 = byte, 1 = short, 2 = long) */
201 8, /* bitsize */
202 FALSE, /* pc_relative */
203 0, /* bitpos */
204 complain_overflow_bitfield,/* complain_on_overflow */
205 bfd_elf_generic_reloc, /* special_function */
206 "R_ARM_ABS8", /* name */
207 FALSE, /* partial_inplace */
208 0x000000ff, /* src_mask */
209 0x000000ff, /* dst_mask */
210 FALSE), /* pcrel_offset */
211
212 HOWTO (R_ARM_SBREL32, /* type */
213 0, /* rightshift */
214 2, /* size (0 = byte, 1 = short, 2 = long) */
215 32, /* bitsize */
216 FALSE, /* pc_relative */
217 0, /* bitpos */
218 complain_overflow_dont,/* complain_on_overflow */
219 bfd_elf_generic_reloc, /* special_function */
220 "R_ARM_SBREL32", /* name */
221 FALSE, /* partial_inplace */
222 0xffffffff, /* src_mask */
223 0xffffffff, /* dst_mask */
224 FALSE), /* pcrel_offset */
225
226 HOWTO (R_ARM_THM_CALL, /* type */
227 1, /* rightshift */
228 2, /* size (0 = byte, 1 = short, 2 = long) */
229 24, /* bitsize */
230 TRUE, /* pc_relative */
231 0, /* bitpos */
232 complain_overflow_signed,/* complain_on_overflow */
233 bfd_elf_generic_reloc, /* special_function */
234 "R_ARM_THM_CALL", /* name */
235 FALSE, /* partial_inplace */
236 0x07ff2fff, /* src_mask */
237 0x07ff2fff, /* dst_mask */
238 TRUE), /* pcrel_offset */
239
240 HOWTO (R_ARM_THM_PC8, /* type */
241 1, /* rightshift */
242 1, /* size (0 = byte, 1 = short, 2 = long) */
243 8, /* bitsize */
244 TRUE, /* pc_relative */
245 0, /* bitpos */
246 complain_overflow_signed,/* complain_on_overflow */
247 bfd_elf_generic_reloc, /* special_function */
248 "R_ARM_THM_PC8", /* name */
249 FALSE, /* partial_inplace */
250 0x000000ff, /* src_mask */
251 0x000000ff, /* dst_mask */
252 TRUE), /* pcrel_offset */
253
254 HOWTO (R_ARM_BREL_ADJ, /* type */
255 1, /* rightshift */
256 1, /* size (0 = byte, 1 = short, 2 = long) */
257 32, /* bitsize */
258 FALSE, /* pc_relative */
259 0, /* bitpos */
260 complain_overflow_signed,/* complain_on_overflow */
261 bfd_elf_generic_reloc, /* special_function */
262 "R_ARM_BREL_ADJ", /* name */
263 FALSE, /* partial_inplace */
264 0xffffffff, /* src_mask */
265 0xffffffff, /* dst_mask */
266 FALSE), /* pcrel_offset */
267
268 HOWTO (R_ARM_TLS_DESC, /* type */
269 0, /* rightshift */
270 2, /* size (0 = byte, 1 = short, 2 = long) */
271 32, /* bitsize */
272 FALSE, /* pc_relative */
273 0, /* bitpos */
274 complain_overflow_bitfield,/* complain_on_overflow */
275 bfd_elf_generic_reloc, /* special_function */
276 "R_ARM_TLS_DESC", /* name */
277 FALSE, /* partial_inplace */
278 0xffffffff, /* src_mask */
279 0xffffffff, /* dst_mask */
280 FALSE), /* pcrel_offset */
281
282 HOWTO (R_ARM_THM_SWI8, /* type */
283 0, /* rightshift */
284 0, /* size (0 = byte, 1 = short, 2 = long) */
285 0, /* bitsize */
286 FALSE, /* pc_relative */
287 0, /* bitpos */
288 complain_overflow_signed,/* complain_on_overflow */
289 bfd_elf_generic_reloc, /* special_function */
290 "R_ARM_SWI8", /* name */
291 FALSE, /* partial_inplace */
292 0x00000000, /* src_mask */
293 0x00000000, /* dst_mask */
294 FALSE), /* pcrel_offset */
295
296 /* BLX instruction for the ARM. */
297 HOWTO (R_ARM_XPC25, /* type */
298 2, /* rightshift */
299 2, /* size (0 = byte, 1 = short, 2 = long) */
300 24, /* bitsize */
301 TRUE, /* pc_relative */
302 0, /* bitpos */
303 complain_overflow_signed,/* complain_on_overflow */
304 bfd_elf_generic_reloc, /* special_function */
305 "R_ARM_XPC25", /* name */
306 FALSE, /* partial_inplace */
307 0x00ffffff, /* src_mask */
308 0x00ffffff, /* dst_mask */
309 TRUE), /* pcrel_offset */
310
311 /* BLX instruction for the Thumb. */
312 HOWTO (R_ARM_THM_XPC22, /* type */
313 2, /* rightshift */
314 2, /* size (0 = byte, 1 = short, 2 = long) */
315 24, /* bitsize */
316 TRUE, /* pc_relative */
317 0, /* bitpos */
318 complain_overflow_signed,/* complain_on_overflow */
319 bfd_elf_generic_reloc, /* special_function */
320 "R_ARM_THM_XPC22", /* name */
321 FALSE, /* partial_inplace */
322 0x07ff2fff, /* src_mask */
323 0x07ff2fff, /* dst_mask */
324 TRUE), /* pcrel_offset */
325
326 /* Dynamic TLS relocations. */
327
328 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
329 0, /* rightshift */
330 2, /* size (0 = byte, 1 = short, 2 = long) */
331 32, /* bitsize */
332 FALSE, /* pc_relative */
333 0, /* bitpos */
334 complain_overflow_bitfield,/* complain_on_overflow */
335 bfd_elf_generic_reloc, /* special_function */
336 "R_ARM_TLS_DTPMOD32", /* name */
337 TRUE, /* partial_inplace */
338 0xffffffff, /* src_mask */
339 0xffffffff, /* dst_mask */
340 FALSE), /* pcrel_offset */
341
342 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
343 0, /* rightshift */
344 2, /* size (0 = byte, 1 = short, 2 = long) */
345 32, /* bitsize */
346 FALSE, /* pc_relative */
347 0, /* bitpos */
348 complain_overflow_bitfield,/* complain_on_overflow */
349 bfd_elf_generic_reloc, /* special_function */
350 "R_ARM_TLS_DTPOFF32", /* name */
351 TRUE, /* partial_inplace */
352 0xffffffff, /* src_mask */
353 0xffffffff, /* dst_mask */
354 FALSE), /* pcrel_offset */
355
356 HOWTO (R_ARM_TLS_TPOFF32, /* type */
357 0, /* rightshift */
358 2, /* size (0 = byte, 1 = short, 2 = long) */
359 32, /* bitsize */
360 FALSE, /* pc_relative */
361 0, /* bitpos */
362 complain_overflow_bitfield,/* complain_on_overflow */
363 bfd_elf_generic_reloc, /* special_function */
364 "R_ARM_TLS_TPOFF32", /* name */
365 TRUE, /* partial_inplace */
366 0xffffffff, /* src_mask */
367 0xffffffff, /* dst_mask */
368 FALSE), /* pcrel_offset */
369
370 /* Relocs used in ARM Linux */
371
372 HOWTO (R_ARM_COPY, /* type */
373 0, /* rightshift */
374 2, /* size (0 = byte, 1 = short, 2 = long) */
375 32, /* bitsize */
376 FALSE, /* pc_relative */
377 0, /* bitpos */
378 complain_overflow_bitfield,/* complain_on_overflow */
379 bfd_elf_generic_reloc, /* special_function */
380 "R_ARM_COPY", /* name */
381 TRUE, /* partial_inplace */
382 0xffffffff, /* src_mask */
383 0xffffffff, /* dst_mask */
384 FALSE), /* pcrel_offset */
385
386 HOWTO (R_ARM_GLOB_DAT, /* type */
387 0, /* rightshift */
388 2, /* size (0 = byte, 1 = short, 2 = long) */
389 32, /* bitsize */
390 FALSE, /* pc_relative */
391 0, /* bitpos */
392 complain_overflow_bitfield,/* complain_on_overflow */
393 bfd_elf_generic_reloc, /* special_function */
394 "R_ARM_GLOB_DAT", /* name */
395 TRUE, /* partial_inplace */
396 0xffffffff, /* src_mask */
397 0xffffffff, /* dst_mask */
398 FALSE), /* pcrel_offset */
399
400 HOWTO (R_ARM_JUMP_SLOT, /* type */
401 0, /* rightshift */
402 2, /* size (0 = byte, 1 = short, 2 = long) */
403 32, /* bitsize */
404 FALSE, /* pc_relative */
405 0, /* bitpos */
406 complain_overflow_bitfield,/* complain_on_overflow */
407 bfd_elf_generic_reloc, /* special_function */
408 "R_ARM_JUMP_SLOT", /* name */
409 TRUE, /* partial_inplace */
410 0xffffffff, /* src_mask */
411 0xffffffff, /* dst_mask */
412 FALSE), /* pcrel_offset */
413
414 HOWTO (R_ARM_RELATIVE, /* type */
415 0, /* rightshift */
416 2, /* size (0 = byte, 1 = short, 2 = long) */
417 32, /* bitsize */
418 FALSE, /* pc_relative */
419 0, /* bitpos */
420 complain_overflow_bitfield,/* complain_on_overflow */
421 bfd_elf_generic_reloc, /* special_function */
422 "R_ARM_RELATIVE", /* name */
423 TRUE, /* partial_inplace */
424 0xffffffff, /* src_mask */
425 0xffffffff, /* dst_mask */
426 FALSE), /* pcrel_offset */
427
428 HOWTO (R_ARM_GOTOFF32, /* type */
429 0, /* rightshift */
430 2, /* size (0 = byte, 1 = short, 2 = long) */
431 32, /* bitsize */
432 FALSE, /* pc_relative */
433 0, /* bitpos */
434 complain_overflow_bitfield,/* complain_on_overflow */
435 bfd_elf_generic_reloc, /* special_function */
436 "R_ARM_GOTOFF32", /* name */
437 TRUE, /* partial_inplace */
438 0xffffffff, /* src_mask */
439 0xffffffff, /* dst_mask */
440 FALSE), /* pcrel_offset */
441
442 HOWTO (R_ARM_GOTPC, /* type */
443 0, /* rightshift */
444 2, /* size (0 = byte, 1 = short, 2 = long) */
445 32, /* bitsize */
446 TRUE, /* pc_relative */
447 0, /* bitpos */
448 complain_overflow_bitfield,/* complain_on_overflow */
449 bfd_elf_generic_reloc, /* special_function */
450 "R_ARM_GOTPC", /* name */
451 TRUE, /* partial_inplace */
452 0xffffffff, /* src_mask */
453 0xffffffff, /* dst_mask */
454 TRUE), /* pcrel_offset */
455
456 HOWTO (R_ARM_GOT32, /* type */
457 0, /* rightshift */
458 2, /* size (0 = byte, 1 = short, 2 = long) */
459 32, /* bitsize */
460 FALSE, /* pc_relative */
461 0, /* bitpos */
462 complain_overflow_bitfield,/* complain_on_overflow */
463 bfd_elf_generic_reloc, /* special_function */
464 "R_ARM_GOT32", /* name */
465 TRUE, /* partial_inplace */
466 0xffffffff, /* src_mask */
467 0xffffffff, /* dst_mask */
468 FALSE), /* pcrel_offset */
469
470 HOWTO (R_ARM_PLT32, /* type */
471 2, /* rightshift */
472 2, /* size (0 = byte, 1 = short, 2 = long) */
473 24, /* bitsize */
474 TRUE, /* pc_relative */
475 0, /* bitpos */
476 complain_overflow_bitfield,/* complain_on_overflow */
477 bfd_elf_generic_reloc, /* special_function */
478 "R_ARM_PLT32", /* name */
479 FALSE, /* partial_inplace */
480 0x00ffffff, /* src_mask */
481 0x00ffffff, /* dst_mask */
482 TRUE), /* pcrel_offset */
483
484 HOWTO (R_ARM_CALL, /* type */
485 2, /* rightshift */
486 2, /* size (0 = byte, 1 = short, 2 = long) */
487 24, /* bitsize */
488 TRUE, /* pc_relative */
489 0, /* bitpos */
490 complain_overflow_signed,/* complain_on_overflow */
491 bfd_elf_generic_reloc, /* special_function */
492 "R_ARM_CALL", /* name */
493 FALSE, /* partial_inplace */
494 0x00ffffff, /* src_mask */
495 0x00ffffff, /* dst_mask */
496 TRUE), /* pcrel_offset */
497
498 HOWTO (R_ARM_JUMP24, /* type */
499 2, /* rightshift */
500 2, /* size (0 = byte, 1 = short, 2 = long) */
501 24, /* bitsize */
502 TRUE, /* pc_relative */
503 0, /* bitpos */
504 complain_overflow_signed,/* complain_on_overflow */
505 bfd_elf_generic_reloc, /* special_function */
506 "R_ARM_JUMP24", /* name */
507 FALSE, /* partial_inplace */
508 0x00ffffff, /* src_mask */
509 0x00ffffff, /* dst_mask */
510 TRUE), /* pcrel_offset */
511
512 HOWTO (R_ARM_THM_JUMP24, /* type */
513 1, /* rightshift */
514 2, /* size (0 = byte, 1 = short, 2 = long) */
515 24, /* bitsize */
516 TRUE, /* pc_relative */
517 0, /* bitpos */
518 complain_overflow_signed,/* complain_on_overflow */
519 bfd_elf_generic_reloc, /* special_function */
520 "R_ARM_THM_JUMP24", /* name */
521 FALSE, /* partial_inplace */
522 0x07ff2fff, /* src_mask */
523 0x07ff2fff, /* dst_mask */
524 TRUE), /* pcrel_offset */
525
526 HOWTO (R_ARM_BASE_ABS, /* type */
527 0, /* rightshift */
528 2, /* size (0 = byte, 1 = short, 2 = long) */
529 32, /* bitsize */
530 FALSE, /* pc_relative */
531 0, /* bitpos */
532 complain_overflow_dont,/* complain_on_overflow */
533 bfd_elf_generic_reloc, /* special_function */
534 "R_ARM_BASE_ABS", /* name */
535 FALSE, /* partial_inplace */
536 0xffffffff, /* src_mask */
537 0xffffffff, /* dst_mask */
538 FALSE), /* pcrel_offset */
539
540 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
541 0, /* rightshift */
542 2, /* size (0 = byte, 1 = short, 2 = long) */
543 12, /* bitsize */
544 TRUE, /* pc_relative */
545 0, /* bitpos */
546 complain_overflow_dont,/* complain_on_overflow */
547 bfd_elf_generic_reloc, /* special_function */
548 "R_ARM_ALU_PCREL_7_0", /* name */
549 FALSE, /* partial_inplace */
550 0x00000fff, /* src_mask */
551 0x00000fff, /* dst_mask */
552 TRUE), /* pcrel_offset */
553
554 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
555 0, /* rightshift */
556 2, /* size (0 = byte, 1 = short, 2 = long) */
557 12, /* bitsize */
558 TRUE, /* pc_relative */
559 8, /* bitpos */
560 complain_overflow_dont,/* complain_on_overflow */
561 bfd_elf_generic_reloc, /* special_function */
562 "R_ARM_ALU_PCREL_15_8",/* name */
563 FALSE, /* partial_inplace */
564 0x00000fff, /* src_mask */
565 0x00000fff, /* dst_mask */
566 TRUE), /* pcrel_offset */
567
568 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
569 0, /* rightshift */
570 2, /* size (0 = byte, 1 = short, 2 = long) */
571 12, /* bitsize */
572 TRUE, /* pc_relative */
573 16, /* bitpos */
574 complain_overflow_dont,/* complain_on_overflow */
575 bfd_elf_generic_reloc, /* special_function */
576 "R_ARM_ALU_PCREL_23_15",/* name */
577 FALSE, /* partial_inplace */
578 0x00000fff, /* src_mask */
579 0x00000fff, /* dst_mask */
580 TRUE), /* pcrel_offset */
581
582 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
583 0, /* rightshift */
584 2, /* size (0 = byte, 1 = short, 2 = long) */
585 12, /* bitsize */
586 FALSE, /* pc_relative */
587 0, /* bitpos */
588 complain_overflow_dont,/* complain_on_overflow */
589 bfd_elf_generic_reloc, /* special_function */
590 "R_ARM_LDR_SBREL_11_0",/* name */
591 FALSE, /* partial_inplace */
592 0x00000fff, /* src_mask */
593 0x00000fff, /* dst_mask */
594 FALSE), /* pcrel_offset */
595
596 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
597 0, /* rightshift */
598 2, /* size (0 = byte, 1 = short, 2 = long) */
599 8, /* bitsize */
600 FALSE, /* pc_relative */
601 12, /* bitpos */
602 complain_overflow_dont,/* complain_on_overflow */
603 bfd_elf_generic_reloc, /* special_function */
604 "R_ARM_ALU_SBREL_19_12",/* name */
605 FALSE, /* partial_inplace */
606 0x000ff000, /* src_mask */
607 0x000ff000, /* dst_mask */
608 FALSE), /* pcrel_offset */
609
610 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
611 0, /* rightshift */
612 2, /* size (0 = byte, 1 = short, 2 = long) */
613 8, /* bitsize */
614 FALSE, /* pc_relative */
615 20, /* bitpos */
616 complain_overflow_dont,/* complain_on_overflow */
617 bfd_elf_generic_reloc, /* special_function */
618 "R_ARM_ALU_SBREL_27_20",/* name */
619 FALSE, /* partial_inplace */
620 0x0ff00000, /* src_mask */
621 0x0ff00000, /* dst_mask */
622 FALSE), /* pcrel_offset */
623
624 HOWTO (R_ARM_TARGET1, /* type */
625 0, /* rightshift */
626 2, /* size (0 = byte, 1 = short, 2 = long) */
627 32, /* bitsize */
628 FALSE, /* pc_relative */
629 0, /* bitpos */
630 complain_overflow_dont,/* complain_on_overflow */
631 bfd_elf_generic_reloc, /* special_function */
632 "R_ARM_TARGET1", /* name */
633 FALSE, /* partial_inplace */
634 0xffffffff, /* src_mask */
635 0xffffffff, /* dst_mask */
636 FALSE), /* pcrel_offset */
637
638 HOWTO (R_ARM_ROSEGREL32, /* type */
639 0, /* rightshift */
640 2, /* size (0 = byte, 1 = short, 2 = long) */
641 32, /* bitsize */
642 FALSE, /* pc_relative */
643 0, /* bitpos */
644 complain_overflow_dont,/* complain_on_overflow */
645 bfd_elf_generic_reloc, /* special_function */
646 "R_ARM_ROSEGREL32", /* name */
647 FALSE, /* partial_inplace */
648 0xffffffff, /* src_mask */
649 0xffffffff, /* dst_mask */
650 FALSE), /* pcrel_offset */
651
652 HOWTO (R_ARM_V4BX, /* type */
653 0, /* rightshift */
654 2, /* size (0 = byte, 1 = short, 2 = long) */
655 32, /* bitsize */
656 FALSE, /* pc_relative */
657 0, /* bitpos */
658 complain_overflow_dont,/* complain_on_overflow */
659 bfd_elf_generic_reloc, /* special_function */
660 "R_ARM_V4BX", /* name */
661 FALSE, /* partial_inplace */
662 0xffffffff, /* src_mask */
663 0xffffffff, /* dst_mask */
664 FALSE), /* pcrel_offset */
665
666 HOWTO (R_ARM_TARGET2, /* type */
667 0, /* rightshift */
668 2, /* size (0 = byte, 1 = short, 2 = long) */
669 32, /* bitsize */
670 FALSE, /* pc_relative */
671 0, /* bitpos */
672 complain_overflow_signed,/* complain_on_overflow */
673 bfd_elf_generic_reloc, /* special_function */
674 "R_ARM_TARGET2", /* name */
675 FALSE, /* partial_inplace */
676 0xffffffff, /* src_mask */
677 0xffffffff, /* dst_mask */
678 TRUE), /* pcrel_offset */
679
680 HOWTO (R_ARM_PREL31, /* type */
681 0, /* rightshift */
682 2, /* size (0 = byte, 1 = short, 2 = long) */
683 31, /* bitsize */
684 TRUE, /* pc_relative */
685 0, /* bitpos */
686 complain_overflow_signed,/* complain_on_overflow */
687 bfd_elf_generic_reloc, /* special_function */
688 "R_ARM_PREL31", /* name */
689 FALSE, /* partial_inplace */
690 0x7fffffff, /* src_mask */
691 0x7fffffff, /* dst_mask */
692 TRUE), /* pcrel_offset */
693
694 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
695 0, /* rightshift */
696 2, /* size (0 = byte, 1 = short, 2 = long) */
697 16, /* bitsize */
698 FALSE, /* pc_relative */
699 0, /* bitpos */
700 complain_overflow_dont,/* complain_on_overflow */
701 bfd_elf_generic_reloc, /* special_function */
702 "R_ARM_MOVW_ABS_NC", /* name */
703 FALSE, /* partial_inplace */
704 0x000f0fff, /* src_mask */
705 0x000f0fff, /* dst_mask */
706 FALSE), /* pcrel_offset */
707
708 HOWTO (R_ARM_MOVT_ABS, /* type */
709 0, /* rightshift */
710 2, /* size (0 = byte, 1 = short, 2 = long) */
711 16, /* bitsize */
712 FALSE, /* pc_relative */
713 0, /* bitpos */
714 complain_overflow_bitfield,/* complain_on_overflow */
715 bfd_elf_generic_reloc, /* special_function */
716 "R_ARM_MOVT_ABS", /* name */
717 FALSE, /* partial_inplace */
718 0x000f0fff, /* src_mask */
719 0x000f0fff, /* dst_mask */
720 FALSE), /* pcrel_offset */
721
722 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
723 0, /* rightshift */
724 2, /* size (0 = byte, 1 = short, 2 = long) */
725 16, /* bitsize */
726 TRUE, /* pc_relative */
727 0, /* bitpos */
728 complain_overflow_dont,/* complain_on_overflow */
729 bfd_elf_generic_reloc, /* special_function */
730 "R_ARM_MOVW_PREL_NC", /* name */
731 FALSE, /* partial_inplace */
732 0x000f0fff, /* src_mask */
733 0x000f0fff, /* dst_mask */
734 TRUE), /* pcrel_offset */
735
736 HOWTO (R_ARM_MOVT_PREL, /* type */
737 0, /* rightshift */
738 2, /* size (0 = byte, 1 = short, 2 = long) */
739 16, /* bitsize */
740 TRUE, /* pc_relative */
741 0, /* bitpos */
742 complain_overflow_bitfield,/* complain_on_overflow */
743 bfd_elf_generic_reloc, /* special_function */
744 "R_ARM_MOVT_PREL", /* name */
745 FALSE, /* partial_inplace */
746 0x000f0fff, /* src_mask */
747 0x000f0fff, /* dst_mask */
748 TRUE), /* pcrel_offset */
749
750 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
751 0, /* rightshift */
752 2, /* size (0 = byte, 1 = short, 2 = long) */
753 16, /* bitsize */
754 FALSE, /* pc_relative */
755 0, /* bitpos */
756 complain_overflow_dont,/* complain_on_overflow */
757 bfd_elf_generic_reloc, /* special_function */
758 "R_ARM_THM_MOVW_ABS_NC",/* name */
759 FALSE, /* partial_inplace */
760 0x040f70ff, /* src_mask */
761 0x040f70ff, /* dst_mask */
762 FALSE), /* pcrel_offset */
763
764 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
765 0, /* rightshift */
766 2, /* size (0 = byte, 1 = short, 2 = long) */
767 16, /* bitsize */
768 FALSE, /* pc_relative */
769 0, /* bitpos */
770 complain_overflow_bitfield,/* complain_on_overflow */
771 bfd_elf_generic_reloc, /* special_function */
772 "R_ARM_THM_MOVT_ABS", /* name */
773 FALSE, /* partial_inplace */
774 0x040f70ff, /* src_mask */
775 0x040f70ff, /* dst_mask */
776 FALSE), /* pcrel_offset */
777
778 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
779 0, /* rightshift */
780 2, /* size (0 = byte, 1 = short, 2 = long) */
781 16, /* bitsize */
782 TRUE, /* pc_relative */
783 0, /* bitpos */
784 complain_overflow_dont,/* complain_on_overflow */
785 bfd_elf_generic_reloc, /* special_function */
786 "R_ARM_THM_MOVW_PREL_NC",/* name */
787 FALSE, /* partial_inplace */
788 0x040f70ff, /* src_mask */
789 0x040f70ff, /* dst_mask */
790 TRUE), /* pcrel_offset */
791
792 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
793 0, /* rightshift */
794 2, /* size (0 = byte, 1 = short, 2 = long) */
795 16, /* bitsize */
796 TRUE, /* pc_relative */
797 0, /* bitpos */
798 complain_overflow_bitfield,/* complain_on_overflow */
799 bfd_elf_generic_reloc, /* special_function */
800 "R_ARM_THM_MOVT_PREL", /* name */
801 FALSE, /* partial_inplace */
802 0x040f70ff, /* src_mask */
803 0x040f70ff, /* dst_mask */
804 TRUE), /* pcrel_offset */
805
806 HOWTO (R_ARM_THM_JUMP19, /* type */
807 1, /* rightshift */
808 2, /* size (0 = byte, 1 = short, 2 = long) */
809 19, /* bitsize */
810 TRUE, /* pc_relative */
811 0, /* bitpos */
812 complain_overflow_signed,/* complain_on_overflow */
813 bfd_elf_generic_reloc, /* special_function */
814 "R_ARM_THM_JUMP19", /* name */
815 FALSE, /* partial_inplace */
816 0x043f2fff, /* src_mask */
817 0x043f2fff, /* dst_mask */
818 TRUE), /* pcrel_offset */
819
820 HOWTO (R_ARM_THM_JUMP6, /* type */
821 1, /* rightshift */
822 1, /* size (0 = byte, 1 = short, 2 = long) */
823 6, /* bitsize */
824 TRUE, /* pc_relative */
825 0, /* bitpos */
826 complain_overflow_unsigned,/* complain_on_overflow */
827 bfd_elf_generic_reloc, /* special_function */
828 "R_ARM_THM_JUMP6", /* name */
829 FALSE, /* partial_inplace */
830 0x02f8, /* src_mask */
831 0x02f8, /* dst_mask */
832 TRUE), /* pcrel_offset */
833
834 /* These are declared as 13-bit signed relocations because we can
835 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
836 versa. */
837 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
838 0, /* rightshift */
839 2, /* size (0 = byte, 1 = short, 2 = long) */
840 13, /* bitsize */
841 TRUE, /* pc_relative */
842 0, /* bitpos */
843 complain_overflow_dont,/* complain_on_overflow */
844 bfd_elf_generic_reloc, /* special_function */
845 "R_ARM_THM_ALU_PREL_11_0",/* name */
846 FALSE, /* partial_inplace */
847 0xffffffff, /* src_mask */
848 0xffffffff, /* dst_mask */
849 TRUE), /* pcrel_offset */
850
851 HOWTO (R_ARM_THM_PC12, /* type */
852 0, /* rightshift */
853 2, /* size (0 = byte, 1 = short, 2 = long) */
854 13, /* bitsize */
855 TRUE, /* pc_relative */
856 0, /* bitpos */
857 complain_overflow_dont,/* complain_on_overflow */
858 bfd_elf_generic_reloc, /* special_function */
859 "R_ARM_THM_PC12", /* name */
860 FALSE, /* partial_inplace */
861 0xffffffff, /* src_mask */
862 0xffffffff, /* dst_mask */
863 TRUE), /* pcrel_offset */
864
865 HOWTO (R_ARM_ABS32_NOI, /* type */
866 0, /* rightshift */
867 2, /* size (0 = byte, 1 = short, 2 = long) */
868 32, /* bitsize */
869 FALSE, /* pc_relative */
870 0, /* bitpos */
871 complain_overflow_dont,/* complain_on_overflow */
872 bfd_elf_generic_reloc, /* special_function */
873 "R_ARM_ABS32_NOI", /* name */
874 FALSE, /* partial_inplace */
875 0xffffffff, /* src_mask */
876 0xffffffff, /* dst_mask */
877 FALSE), /* pcrel_offset */
878
879 HOWTO (R_ARM_REL32_NOI, /* type */
880 0, /* rightshift */
881 2, /* size (0 = byte, 1 = short, 2 = long) */
882 32, /* bitsize */
883 TRUE, /* pc_relative */
884 0, /* bitpos */
885 complain_overflow_dont,/* complain_on_overflow */
886 bfd_elf_generic_reloc, /* special_function */
887 "R_ARM_REL32_NOI", /* name */
888 FALSE, /* partial_inplace */
889 0xffffffff, /* src_mask */
890 0xffffffff, /* dst_mask */
891 FALSE), /* pcrel_offset */
892
893 /* Group relocations. */
894
895 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
896 0, /* rightshift */
897 2, /* size (0 = byte, 1 = short, 2 = long) */
898 32, /* bitsize */
899 TRUE, /* pc_relative */
900 0, /* bitpos */
901 complain_overflow_dont,/* complain_on_overflow */
902 bfd_elf_generic_reloc, /* special_function */
903 "R_ARM_ALU_PC_G0_NC", /* name */
904 FALSE, /* partial_inplace */
905 0xffffffff, /* src_mask */
906 0xffffffff, /* dst_mask */
907 TRUE), /* pcrel_offset */
908
909 HOWTO (R_ARM_ALU_PC_G0, /* type */
910 0, /* rightshift */
911 2, /* size (0 = byte, 1 = short, 2 = long) */
912 32, /* bitsize */
913 TRUE, /* pc_relative */
914 0, /* bitpos */
915 complain_overflow_dont,/* complain_on_overflow */
916 bfd_elf_generic_reloc, /* special_function */
917 "R_ARM_ALU_PC_G0", /* name */
918 FALSE, /* partial_inplace */
919 0xffffffff, /* src_mask */
920 0xffffffff, /* dst_mask */
921 TRUE), /* pcrel_offset */
922
923 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
924 0, /* rightshift */
925 2, /* size (0 = byte, 1 = short, 2 = long) */
926 32, /* bitsize */
927 TRUE, /* pc_relative */
928 0, /* bitpos */
929 complain_overflow_dont,/* complain_on_overflow */
930 bfd_elf_generic_reloc, /* special_function */
931 "R_ARM_ALU_PC_G1_NC", /* name */
932 FALSE, /* partial_inplace */
933 0xffffffff, /* src_mask */
934 0xffffffff, /* dst_mask */
935 TRUE), /* pcrel_offset */
936
937 HOWTO (R_ARM_ALU_PC_G1, /* type */
938 0, /* rightshift */
939 2, /* size (0 = byte, 1 = short, 2 = long) */
940 32, /* bitsize */
941 TRUE, /* pc_relative */
942 0, /* bitpos */
943 complain_overflow_dont,/* complain_on_overflow */
944 bfd_elf_generic_reloc, /* special_function */
945 "R_ARM_ALU_PC_G1", /* name */
946 FALSE, /* partial_inplace */
947 0xffffffff, /* src_mask */
948 0xffffffff, /* dst_mask */
949 TRUE), /* pcrel_offset */
950
951 HOWTO (R_ARM_ALU_PC_G2, /* type */
952 0, /* rightshift */
953 2, /* size (0 = byte, 1 = short, 2 = long) */
954 32, /* bitsize */
955 TRUE, /* pc_relative */
956 0, /* bitpos */
957 complain_overflow_dont,/* complain_on_overflow */
958 bfd_elf_generic_reloc, /* special_function */
959 "R_ARM_ALU_PC_G2", /* name */
960 FALSE, /* partial_inplace */
961 0xffffffff, /* src_mask */
962 0xffffffff, /* dst_mask */
963 TRUE), /* pcrel_offset */
964
965 HOWTO (R_ARM_LDR_PC_G1, /* type */
966 0, /* rightshift */
967 2, /* size (0 = byte, 1 = short, 2 = long) */
968 32, /* bitsize */
969 TRUE, /* pc_relative */
970 0, /* bitpos */
971 complain_overflow_dont,/* complain_on_overflow */
972 bfd_elf_generic_reloc, /* special_function */
973 "R_ARM_LDR_PC_G1", /* name */
974 FALSE, /* partial_inplace */
975 0xffffffff, /* src_mask */
976 0xffffffff, /* dst_mask */
977 TRUE), /* pcrel_offset */
978
979 HOWTO (R_ARM_LDR_PC_G2, /* type */
980 0, /* rightshift */
981 2, /* size (0 = byte, 1 = short, 2 = long) */
982 32, /* bitsize */
983 TRUE, /* pc_relative */
984 0, /* bitpos */
985 complain_overflow_dont,/* complain_on_overflow */
986 bfd_elf_generic_reloc, /* special_function */
987 "R_ARM_LDR_PC_G2", /* name */
988 FALSE, /* partial_inplace */
989 0xffffffff, /* src_mask */
990 0xffffffff, /* dst_mask */
991 TRUE), /* pcrel_offset */
992
993 HOWTO (R_ARM_LDRS_PC_G0, /* type */
994 0, /* rightshift */
995 2, /* size (0 = byte, 1 = short, 2 = long) */
996 32, /* bitsize */
997 TRUE, /* pc_relative */
998 0, /* bitpos */
999 complain_overflow_dont,/* complain_on_overflow */
1000 bfd_elf_generic_reloc, /* special_function */
1001 "R_ARM_LDRS_PC_G0", /* name */
1002 FALSE, /* partial_inplace */
1003 0xffffffff, /* src_mask */
1004 0xffffffff, /* dst_mask */
1005 TRUE), /* pcrel_offset */
1006
1007 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1008 0, /* rightshift */
1009 2, /* size (0 = byte, 1 = short, 2 = long) */
1010 32, /* bitsize */
1011 TRUE, /* pc_relative */
1012 0, /* bitpos */
1013 complain_overflow_dont,/* complain_on_overflow */
1014 bfd_elf_generic_reloc, /* special_function */
1015 "R_ARM_LDRS_PC_G1", /* name */
1016 FALSE, /* partial_inplace */
1017 0xffffffff, /* src_mask */
1018 0xffffffff, /* dst_mask */
1019 TRUE), /* pcrel_offset */
1020
1021 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1022 0, /* rightshift */
1023 2, /* size (0 = byte, 1 = short, 2 = long) */
1024 32, /* bitsize */
1025 TRUE, /* pc_relative */
1026 0, /* bitpos */
1027 complain_overflow_dont,/* complain_on_overflow */
1028 bfd_elf_generic_reloc, /* special_function */
1029 "R_ARM_LDRS_PC_G2", /* name */
1030 FALSE, /* partial_inplace */
1031 0xffffffff, /* src_mask */
1032 0xffffffff, /* dst_mask */
1033 TRUE), /* pcrel_offset */
1034
1035 HOWTO (R_ARM_LDC_PC_G0, /* type */
1036 0, /* rightshift */
1037 2, /* size (0 = byte, 1 = short, 2 = long) */
1038 32, /* bitsize */
1039 TRUE, /* pc_relative */
1040 0, /* bitpos */
1041 complain_overflow_dont,/* complain_on_overflow */
1042 bfd_elf_generic_reloc, /* special_function */
1043 "R_ARM_LDC_PC_G0", /* name */
1044 FALSE, /* partial_inplace */
1045 0xffffffff, /* src_mask */
1046 0xffffffff, /* dst_mask */
1047 TRUE), /* pcrel_offset */
1048
1049 HOWTO (R_ARM_LDC_PC_G1, /* type */
1050 0, /* rightshift */
1051 2, /* size (0 = byte, 1 = short, 2 = long) */
1052 32, /* bitsize */
1053 TRUE, /* pc_relative */
1054 0, /* bitpos */
1055 complain_overflow_dont,/* complain_on_overflow */
1056 bfd_elf_generic_reloc, /* special_function */
1057 "R_ARM_LDC_PC_G1", /* name */
1058 FALSE, /* partial_inplace */
1059 0xffffffff, /* src_mask */
1060 0xffffffff, /* dst_mask */
1061 TRUE), /* pcrel_offset */
1062
1063 HOWTO (R_ARM_LDC_PC_G2, /* type */
1064 0, /* rightshift */
1065 2, /* size (0 = byte, 1 = short, 2 = long) */
1066 32, /* bitsize */
1067 TRUE, /* pc_relative */
1068 0, /* bitpos */
1069 complain_overflow_dont,/* complain_on_overflow */
1070 bfd_elf_generic_reloc, /* special_function */
1071 "R_ARM_LDC_PC_G2", /* name */
1072 FALSE, /* partial_inplace */
1073 0xffffffff, /* src_mask */
1074 0xffffffff, /* dst_mask */
1075 TRUE), /* pcrel_offset */
1076
1077 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1078 0, /* rightshift */
1079 2, /* size (0 = byte, 1 = short, 2 = long) */
1080 32, /* bitsize */
1081 TRUE, /* pc_relative */
1082 0, /* bitpos */
1083 complain_overflow_dont,/* complain_on_overflow */
1084 bfd_elf_generic_reloc, /* special_function */
1085 "R_ARM_ALU_SB_G0_NC", /* name */
1086 FALSE, /* partial_inplace */
1087 0xffffffff, /* src_mask */
1088 0xffffffff, /* dst_mask */
1089 TRUE), /* pcrel_offset */
1090
1091 HOWTO (R_ARM_ALU_SB_G0, /* type */
1092 0, /* rightshift */
1093 2, /* size (0 = byte, 1 = short, 2 = long) */
1094 32, /* bitsize */
1095 TRUE, /* pc_relative */
1096 0, /* bitpos */
1097 complain_overflow_dont,/* complain_on_overflow */
1098 bfd_elf_generic_reloc, /* special_function */
1099 "R_ARM_ALU_SB_G0", /* name */
1100 FALSE, /* partial_inplace */
1101 0xffffffff, /* src_mask */
1102 0xffffffff, /* dst_mask */
1103 TRUE), /* pcrel_offset */
1104
1105 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1106 0, /* rightshift */
1107 2, /* size (0 = byte, 1 = short, 2 = long) */
1108 32, /* bitsize */
1109 TRUE, /* pc_relative */
1110 0, /* bitpos */
1111 complain_overflow_dont,/* complain_on_overflow */
1112 bfd_elf_generic_reloc, /* special_function */
1113 "R_ARM_ALU_SB_G1_NC", /* name */
1114 FALSE, /* partial_inplace */
1115 0xffffffff, /* src_mask */
1116 0xffffffff, /* dst_mask */
1117 TRUE), /* pcrel_offset */
1118
1119 HOWTO (R_ARM_ALU_SB_G1, /* type */
1120 0, /* rightshift */
1121 2, /* size (0 = byte, 1 = short, 2 = long) */
1122 32, /* bitsize */
1123 TRUE, /* pc_relative */
1124 0, /* bitpos */
1125 complain_overflow_dont,/* complain_on_overflow */
1126 bfd_elf_generic_reloc, /* special_function */
1127 "R_ARM_ALU_SB_G1", /* name */
1128 FALSE, /* partial_inplace */
1129 0xffffffff, /* src_mask */
1130 0xffffffff, /* dst_mask */
1131 TRUE), /* pcrel_offset */
1132
1133 HOWTO (R_ARM_ALU_SB_G2, /* type */
1134 0, /* rightshift */
1135 2, /* size (0 = byte, 1 = short, 2 = long) */
1136 32, /* bitsize */
1137 TRUE, /* pc_relative */
1138 0, /* bitpos */
1139 complain_overflow_dont,/* complain_on_overflow */
1140 bfd_elf_generic_reloc, /* special_function */
1141 "R_ARM_ALU_SB_G2", /* name */
1142 FALSE, /* partial_inplace */
1143 0xffffffff, /* src_mask */
1144 0xffffffff, /* dst_mask */
1145 TRUE), /* pcrel_offset */
1146
1147 HOWTO (R_ARM_LDR_SB_G0, /* type */
1148 0, /* rightshift */
1149 2, /* size (0 = byte, 1 = short, 2 = long) */
1150 32, /* bitsize */
1151 TRUE, /* pc_relative */
1152 0, /* bitpos */
1153 complain_overflow_dont,/* complain_on_overflow */
1154 bfd_elf_generic_reloc, /* special_function */
1155 "R_ARM_LDR_SB_G0", /* name */
1156 FALSE, /* partial_inplace */
1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
1159 TRUE), /* pcrel_offset */
1160
1161 HOWTO (R_ARM_LDR_SB_G1, /* type */
1162 0, /* rightshift */
1163 2, /* size (0 = byte, 1 = short, 2 = long) */
1164 32, /* bitsize */
1165 TRUE, /* pc_relative */
1166 0, /* bitpos */
1167 complain_overflow_dont,/* complain_on_overflow */
1168 bfd_elf_generic_reloc, /* special_function */
1169 "R_ARM_LDR_SB_G1", /* name */
1170 FALSE, /* partial_inplace */
1171 0xffffffff, /* src_mask */
1172 0xffffffff, /* dst_mask */
1173 TRUE), /* pcrel_offset */
1174
1175 HOWTO (R_ARM_LDR_SB_G2, /* type */
1176 0, /* rightshift */
1177 2, /* size (0 = byte, 1 = short, 2 = long) */
1178 32, /* bitsize */
1179 TRUE, /* pc_relative */
1180 0, /* bitpos */
1181 complain_overflow_dont,/* complain_on_overflow */
1182 bfd_elf_generic_reloc, /* special_function */
1183 "R_ARM_LDR_SB_G2", /* name */
1184 FALSE, /* partial_inplace */
1185 0xffffffff, /* src_mask */
1186 0xffffffff, /* dst_mask */
1187 TRUE), /* pcrel_offset */
1188
1189 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1190 0, /* rightshift */
1191 2, /* size (0 = byte, 1 = short, 2 = long) */
1192 32, /* bitsize */
1193 TRUE, /* pc_relative */
1194 0, /* bitpos */
1195 complain_overflow_dont,/* complain_on_overflow */
1196 bfd_elf_generic_reloc, /* special_function */
1197 "R_ARM_LDRS_SB_G0", /* name */
1198 FALSE, /* partial_inplace */
1199 0xffffffff, /* src_mask */
1200 0xffffffff, /* dst_mask */
1201 TRUE), /* pcrel_offset */
1202
1203 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1204 0, /* rightshift */
1205 2, /* size (0 = byte, 1 = short, 2 = long) */
1206 32, /* bitsize */
1207 TRUE, /* pc_relative */
1208 0, /* bitpos */
1209 complain_overflow_dont,/* complain_on_overflow */
1210 bfd_elf_generic_reloc, /* special_function */
1211 "R_ARM_LDRS_SB_G1", /* name */
1212 FALSE, /* partial_inplace */
1213 0xffffffff, /* src_mask */
1214 0xffffffff, /* dst_mask */
1215 TRUE), /* pcrel_offset */
1216
1217 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1218 0, /* rightshift */
1219 2, /* size (0 = byte, 1 = short, 2 = long) */
1220 32, /* bitsize */
1221 TRUE, /* pc_relative */
1222 0, /* bitpos */
1223 complain_overflow_dont,/* complain_on_overflow */
1224 bfd_elf_generic_reloc, /* special_function */
1225 "R_ARM_LDRS_SB_G2", /* name */
1226 FALSE, /* partial_inplace */
1227 0xffffffff, /* src_mask */
1228 0xffffffff, /* dst_mask */
1229 TRUE), /* pcrel_offset */
1230
1231 HOWTO (R_ARM_LDC_SB_G0, /* type */
1232 0, /* rightshift */
1233 2, /* size (0 = byte, 1 = short, 2 = long) */
1234 32, /* bitsize */
1235 TRUE, /* pc_relative */
1236 0, /* bitpos */
1237 complain_overflow_dont,/* complain_on_overflow */
1238 bfd_elf_generic_reloc, /* special_function */
1239 "R_ARM_LDC_SB_G0", /* name */
1240 FALSE, /* partial_inplace */
1241 0xffffffff, /* src_mask */
1242 0xffffffff, /* dst_mask */
1243 TRUE), /* pcrel_offset */
1244
1245 HOWTO (R_ARM_LDC_SB_G1, /* type */
1246 0, /* rightshift */
1247 2, /* size (0 = byte, 1 = short, 2 = long) */
1248 32, /* bitsize */
1249 TRUE, /* pc_relative */
1250 0, /* bitpos */
1251 complain_overflow_dont,/* complain_on_overflow */
1252 bfd_elf_generic_reloc, /* special_function */
1253 "R_ARM_LDC_SB_G1", /* name */
1254 FALSE, /* partial_inplace */
1255 0xffffffff, /* src_mask */
1256 0xffffffff, /* dst_mask */
1257 TRUE), /* pcrel_offset */
1258
1259 HOWTO (R_ARM_LDC_SB_G2, /* type */
1260 0, /* rightshift */
1261 2, /* size (0 = byte, 1 = short, 2 = long) */
1262 32, /* bitsize */
1263 TRUE, /* pc_relative */
1264 0, /* bitpos */
1265 complain_overflow_dont,/* complain_on_overflow */
1266 bfd_elf_generic_reloc, /* special_function */
1267 "R_ARM_LDC_SB_G2", /* name */
1268 FALSE, /* partial_inplace */
1269 0xffffffff, /* src_mask */
1270 0xffffffff, /* dst_mask */
1271 TRUE), /* pcrel_offset */
1272
1273 /* End of group relocations. */
1274
1275 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1276 0, /* rightshift */
1277 2, /* size (0 = byte, 1 = short, 2 = long) */
1278 16, /* bitsize */
1279 FALSE, /* pc_relative */
1280 0, /* bitpos */
1281 complain_overflow_dont,/* complain_on_overflow */
1282 bfd_elf_generic_reloc, /* special_function */
1283 "R_ARM_MOVW_BREL_NC", /* name */
1284 FALSE, /* partial_inplace */
1285 0x0000ffff, /* src_mask */
1286 0x0000ffff, /* dst_mask */
1287 FALSE), /* pcrel_offset */
1288
1289 HOWTO (R_ARM_MOVT_BREL, /* type */
1290 0, /* rightshift */
1291 2, /* size (0 = byte, 1 = short, 2 = long) */
1292 16, /* bitsize */
1293 FALSE, /* pc_relative */
1294 0, /* bitpos */
1295 complain_overflow_bitfield,/* complain_on_overflow */
1296 bfd_elf_generic_reloc, /* special_function */
1297 "R_ARM_MOVT_BREL", /* name */
1298 FALSE, /* partial_inplace */
1299 0x0000ffff, /* src_mask */
1300 0x0000ffff, /* dst_mask */
1301 FALSE), /* pcrel_offset */
1302
1303 HOWTO (R_ARM_MOVW_BREL, /* type */
1304 0, /* rightshift */
1305 2, /* size (0 = byte, 1 = short, 2 = long) */
1306 16, /* bitsize */
1307 FALSE, /* pc_relative */
1308 0, /* bitpos */
1309 complain_overflow_dont,/* complain_on_overflow */
1310 bfd_elf_generic_reloc, /* special_function */
1311 "R_ARM_MOVW_BREL", /* name */
1312 FALSE, /* partial_inplace */
1313 0x0000ffff, /* src_mask */
1314 0x0000ffff, /* dst_mask */
1315 FALSE), /* pcrel_offset */
1316
1317 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1318 0, /* rightshift */
1319 2, /* size (0 = byte, 1 = short, 2 = long) */
1320 16, /* bitsize */
1321 FALSE, /* pc_relative */
1322 0, /* bitpos */
1323 complain_overflow_dont,/* complain_on_overflow */
1324 bfd_elf_generic_reloc, /* special_function */
1325 "R_ARM_THM_MOVW_BREL_NC",/* name */
1326 FALSE, /* partial_inplace */
1327 0x040f70ff, /* src_mask */
1328 0x040f70ff, /* dst_mask */
1329 FALSE), /* pcrel_offset */
1330
1331 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1332 0, /* rightshift */
1333 2, /* size (0 = byte, 1 = short, 2 = long) */
1334 16, /* bitsize */
1335 FALSE, /* pc_relative */
1336 0, /* bitpos */
1337 complain_overflow_bitfield,/* complain_on_overflow */
1338 bfd_elf_generic_reloc, /* special_function */
1339 "R_ARM_THM_MOVT_BREL", /* name */
1340 FALSE, /* partial_inplace */
1341 0x040f70ff, /* src_mask */
1342 0x040f70ff, /* dst_mask */
1343 FALSE), /* pcrel_offset */
1344
1345 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1346 0, /* rightshift */
1347 2, /* size (0 = byte, 1 = short, 2 = long) */
1348 16, /* bitsize */
1349 FALSE, /* pc_relative */
1350 0, /* bitpos */
1351 complain_overflow_dont,/* complain_on_overflow */
1352 bfd_elf_generic_reloc, /* special_function */
1353 "R_ARM_THM_MOVW_BREL", /* name */
1354 FALSE, /* partial_inplace */
1355 0x040f70ff, /* src_mask */
1356 0x040f70ff, /* dst_mask */
1357 FALSE), /* pcrel_offset */
1358
1359 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1360 0, /* rightshift */
1361 2, /* size (0 = byte, 1 = short, 2 = long) */
1362 32, /* bitsize */
1363 FALSE, /* pc_relative */
1364 0, /* bitpos */
1365 complain_overflow_bitfield,/* complain_on_overflow */
1366 NULL, /* special_function */
1367 "R_ARM_TLS_GOTDESC", /* name */
1368 TRUE, /* partial_inplace */
1369 0xffffffff, /* src_mask */
1370 0xffffffff, /* dst_mask */
1371 FALSE), /* pcrel_offset */
1372
1373 HOWTO (R_ARM_TLS_CALL, /* type */
1374 0, /* rightshift */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1376 24, /* bitsize */
1377 FALSE, /* pc_relative */
1378 0, /* bitpos */
1379 complain_overflow_dont,/* complain_on_overflow */
1380 bfd_elf_generic_reloc, /* special_function */
1381 "R_ARM_TLS_CALL", /* name */
1382 FALSE, /* partial_inplace */
1383 0x00ffffff, /* src_mask */
1384 0x00ffffff, /* dst_mask */
1385 FALSE), /* pcrel_offset */
1386
1387 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1388 0, /* rightshift */
1389 2, /* size (0 = byte, 1 = short, 2 = long) */
1390 0, /* bitsize */
1391 FALSE, /* pc_relative */
1392 0, /* bitpos */
1393 complain_overflow_bitfield,/* complain_on_overflow */
1394 bfd_elf_generic_reloc, /* special_function */
1395 "R_ARM_TLS_DESCSEQ", /* name */
1396 FALSE, /* partial_inplace */
1397 0x00000000, /* src_mask */
1398 0x00000000, /* dst_mask */
1399 FALSE), /* pcrel_offset */
1400
1401 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1402 0, /* rightshift */
1403 2, /* size (0 = byte, 1 = short, 2 = long) */
1404 24, /* bitsize */
1405 FALSE, /* pc_relative */
1406 0, /* bitpos */
1407 complain_overflow_dont,/* complain_on_overflow */
1408 bfd_elf_generic_reloc, /* special_function */
1409 "R_ARM_THM_TLS_CALL", /* name */
1410 FALSE, /* partial_inplace */
1411 0x07ff07ff, /* src_mask */
1412 0x07ff07ff, /* dst_mask */
1413 FALSE), /* pcrel_offset */
1414
1415 HOWTO (R_ARM_PLT32_ABS, /* type */
1416 0, /* rightshift */
1417 2, /* size (0 = byte, 1 = short, 2 = long) */
1418 32, /* bitsize */
1419 FALSE, /* pc_relative */
1420 0, /* bitpos */
1421 complain_overflow_dont,/* complain_on_overflow */
1422 bfd_elf_generic_reloc, /* special_function */
1423 "R_ARM_PLT32_ABS", /* name */
1424 FALSE, /* partial_inplace */
1425 0xffffffff, /* src_mask */
1426 0xffffffff, /* dst_mask */
1427 FALSE), /* pcrel_offset */
1428
1429 HOWTO (R_ARM_GOT_ABS, /* type */
1430 0, /* rightshift */
1431 2, /* size (0 = byte, 1 = short, 2 = long) */
1432 32, /* bitsize */
1433 FALSE, /* pc_relative */
1434 0, /* bitpos */
1435 complain_overflow_dont,/* complain_on_overflow */
1436 bfd_elf_generic_reloc, /* special_function */
1437 "R_ARM_GOT_ABS", /* name */
1438 FALSE, /* partial_inplace */
1439 0xffffffff, /* src_mask */
1440 0xffffffff, /* dst_mask */
1441 FALSE), /* pcrel_offset */
1442
1443 HOWTO (R_ARM_GOT_PREL, /* type */
1444 0, /* rightshift */
1445 2, /* size (0 = byte, 1 = short, 2 = long) */
1446 32, /* bitsize */
1447 TRUE, /* pc_relative */
1448 0, /* bitpos */
1449 complain_overflow_dont, /* complain_on_overflow */
1450 bfd_elf_generic_reloc, /* special_function */
1451 "R_ARM_GOT_PREL", /* name */
1452 FALSE, /* partial_inplace */
1453 0xffffffff, /* src_mask */
1454 0xffffffff, /* dst_mask */
1455 TRUE), /* pcrel_offset */
1456
1457 HOWTO (R_ARM_GOT_BREL12, /* type */
1458 0, /* rightshift */
1459 2, /* size (0 = byte, 1 = short, 2 = long) */
1460 12, /* bitsize */
1461 FALSE, /* pc_relative */
1462 0, /* bitpos */
1463 complain_overflow_bitfield,/* complain_on_overflow */
1464 bfd_elf_generic_reloc, /* special_function */
1465 "R_ARM_GOT_BREL12", /* name */
1466 FALSE, /* partial_inplace */
1467 0x00000fff, /* src_mask */
1468 0x00000fff, /* dst_mask */
1469 FALSE), /* pcrel_offset */
1470
1471 HOWTO (R_ARM_GOTOFF12, /* type */
1472 0, /* rightshift */
1473 2, /* size (0 = byte, 1 = short, 2 = long) */
1474 12, /* bitsize */
1475 FALSE, /* pc_relative */
1476 0, /* bitpos */
1477 complain_overflow_bitfield,/* complain_on_overflow */
1478 bfd_elf_generic_reloc, /* special_function */
1479 "R_ARM_GOTOFF12", /* name */
1480 FALSE, /* partial_inplace */
1481 0x00000fff, /* src_mask */
1482 0x00000fff, /* dst_mask */
1483 FALSE), /* pcrel_offset */
1484
1485 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1486
1487 /* GNU extension to record C++ vtable member usage */
1488 HOWTO (R_ARM_GNU_VTENTRY, /* type */
1489 0, /* rightshift */
1490 2, /* size (0 = byte, 1 = short, 2 = long) */
1491 0, /* bitsize */
1492 FALSE, /* pc_relative */
1493 0, /* bitpos */
1494 complain_overflow_dont, /* complain_on_overflow */
1495 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1496 "R_ARM_GNU_VTENTRY", /* name */
1497 FALSE, /* partial_inplace */
1498 0, /* src_mask */
1499 0, /* dst_mask */
1500 FALSE), /* pcrel_offset */
1501
1502 /* GNU extension to record C++ vtable hierarchy */
1503 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1504 0, /* rightshift */
1505 2, /* size (0 = byte, 1 = short, 2 = long) */
1506 0, /* bitsize */
1507 FALSE, /* pc_relative */
1508 0, /* bitpos */
1509 complain_overflow_dont, /* complain_on_overflow */
1510 NULL, /* special_function */
1511 "R_ARM_GNU_VTINHERIT", /* name */
1512 FALSE, /* partial_inplace */
1513 0, /* src_mask */
1514 0, /* dst_mask */
1515 FALSE), /* pcrel_offset */
1516
1517 HOWTO (R_ARM_THM_JUMP11, /* type */
1518 1, /* rightshift */
1519 1, /* size (0 = byte, 1 = short, 2 = long) */
1520 11, /* bitsize */
1521 TRUE, /* pc_relative */
1522 0, /* bitpos */
1523 complain_overflow_signed, /* complain_on_overflow */
1524 bfd_elf_generic_reloc, /* special_function */
1525 "R_ARM_THM_JUMP11", /* name */
1526 FALSE, /* partial_inplace */
1527 0x000007ff, /* src_mask */
1528 0x000007ff, /* dst_mask */
1529 TRUE), /* pcrel_offset */
1530
1531 HOWTO (R_ARM_THM_JUMP8, /* type */
1532 1, /* rightshift */
1533 1, /* size (0 = byte, 1 = short, 2 = long) */
1534 8, /* bitsize */
1535 TRUE, /* pc_relative */
1536 0, /* bitpos */
1537 complain_overflow_signed, /* complain_on_overflow */
1538 bfd_elf_generic_reloc, /* special_function */
1539 "R_ARM_THM_JUMP8", /* name */
1540 FALSE, /* partial_inplace */
1541 0x000000ff, /* src_mask */
1542 0x000000ff, /* dst_mask */
1543 TRUE), /* pcrel_offset */
1544
1545 /* TLS relocations */
1546 HOWTO (R_ARM_TLS_GD32, /* type */
1547 0, /* rightshift */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
1549 32, /* bitsize */
1550 FALSE, /* pc_relative */
1551 0, /* bitpos */
1552 complain_overflow_bitfield,/* complain_on_overflow */
1553 NULL, /* special_function */
1554 "R_ARM_TLS_GD32", /* name */
1555 TRUE, /* partial_inplace */
1556 0xffffffff, /* src_mask */
1557 0xffffffff, /* dst_mask */
1558 FALSE), /* pcrel_offset */
1559
1560 HOWTO (R_ARM_TLS_LDM32, /* type */
1561 0, /* rightshift */
1562 2, /* size (0 = byte, 1 = short, 2 = long) */
1563 32, /* bitsize */
1564 FALSE, /* pc_relative */
1565 0, /* bitpos */
1566 complain_overflow_bitfield,/* complain_on_overflow */
1567 bfd_elf_generic_reloc, /* special_function */
1568 "R_ARM_TLS_LDM32", /* name */
1569 TRUE, /* partial_inplace */
1570 0xffffffff, /* src_mask */
1571 0xffffffff, /* dst_mask */
1572 FALSE), /* pcrel_offset */
1573
1574 HOWTO (R_ARM_TLS_LDO32, /* type */
1575 0, /* rightshift */
1576 2, /* size (0 = byte, 1 = short, 2 = long) */
1577 32, /* bitsize */
1578 FALSE, /* pc_relative */
1579 0, /* bitpos */
1580 complain_overflow_bitfield,/* complain_on_overflow */
1581 bfd_elf_generic_reloc, /* special_function */
1582 "R_ARM_TLS_LDO32", /* name */
1583 TRUE, /* partial_inplace */
1584 0xffffffff, /* src_mask */
1585 0xffffffff, /* dst_mask */
1586 FALSE), /* pcrel_offset */
1587
1588 HOWTO (R_ARM_TLS_IE32, /* type */
1589 0, /* rightshift */
1590 2, /* size (0 = byte, 1 = short, 2 = long) */
1591 32, /* bitsize */
1592 FALSE, /* pc_relative */
1593 0, /* bitpos */
1594 complain_overflow_bitfield,/* complain_on_overflow */
1595 NULL, /* special_function */
1596 "R_ARM_TLS_IE32", /* name */
1597 TRUE, /* partial_inplace */
1598 0xffffffff, /* src_mask */
1599 0xffffffff, /* dst_mask */
1600 FALSE), /* pcrel_offset */
1601
1602 HOWTO (R_ARM_TLS_LE32, /* type */
1603 0, /* rightshift */
1604 2, /* size (0 = byte, 1 = short, 2 = long) */
1605 32, /* bitsize */
1606 FALSE, /* pc_relative */
1607 0, /* bitpos */
1608 complain_overflow_bitfield,/* complain_on_overflow */
1609 NULL, /* special_function */
1610 "R_ARM_TLS_LE32", /* name */
1611 TRUE, /* partial_inplace */
1612 0xffffffff, /* src_mask */
1613 0xffffffff, /* dst_mask */
1614 FALSE), /* pcrel_offset */
1615
1616 HOWTO (R_ARM_TLS_LDO12, /* type */
1617 0, /* rightshift */
1618 2, /* size (0 = byte, 1 = short, 2 = long) */
1619 12, /* bitsize */
1620 FALSE, /* pc_relative */
1621 0, /* bitpos */
1622 complain_overflow_bitfield,/* complain_on_overflow */
1623 bfd_elf_generic_reloc, /* special_function */
1624 "R_ARM_TLS_LDO12", /* name */
1625 FALSE, /* partial_inplace */
1626 0x00000fff, /* src_mask */
1627 0x00000fff, /* dst_mask */
1628 FALSE), /* pcrel_offset */
1629
1630 HOWTO (R_ARM_TLS_LE12, /* type */
1631 0, /* rightshift */
1632 2, /* size (0 = byte, 1 = short, 2 = long) */
1633 12, /* bitsize */
1634 FALSE, /* pc_relative */
1635 0, /* bitpos */
1636 complain_overflow_bitfield,/* complain_on_overflow */
1637 bfd_elf_generic_reloc, /* special_function */
1638 "R_ARM_TLS_LE12", /* name */
1639 FALSE, /* partial_inplace */
1640 0x00000fff, /* src_mask */
1641 0x00000fff, /* dst_mask */
1642 FALSE), /* pcrel_offset */
1643
1644 HOWTO (R_ARM_TLS_IE12GP, /* type */
1645 0, /* rightshift */
1646 2, /* size (0 = byte, 1 = short, 2 = long) */
1647 12, /* bitsize */
1648 FALSE, /* pc_relative */
1649 0, /* bitpos */
1650 complain_overflow_bitfield,/* complain_on_overflow */
1651 bfd_elf_generic_reloc, /* special_function */
1652 "R_ARM_TLS_IE12GP", /* name */
1653 FALSE, /* partial_inplace */
1654 0x00000fff, /* src_mask */
1655 0x00000fff, /* dst_mask */
1656 FALSE), /* pcrel_offset */
1657
1658 /* 112-127 private relocations. */
1659 EMPTY_HOWTO (112),
1660 EMPTY_HOWTO (113),
1661 EMPTY_HOWTO (114),
1662 EMPTY_HOWTO (115),
1663 EMPTY_HOWTO (116),
1664 EMPTY_HOWTO (117),
1665 EMPTY_HOWTO (118),
1666 EMPTY_HOWTO (119),
1667 EMPTY_HOWTO (120),
1668 EMPTY_HOWTO (121),
1669 EMPTY_HOWTO (122),
1670 EMPTY_HOWTO (123),
1671 EMPTY_HOWTO (124),
1672 EMPTY_HOWTO (125),
1673 EMPTY_HOWTO (126),
1674 EMPTY_HOWTO (127),
1675
1676 /* R_ARM_ME_TOO, obsolete. */
1677 EMPTY_HOWTO (128),
1678
1679 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1680 0, /* rightshift */
1681 1, /* size (0 = byte, 1 = short, 2 = long) */
1682 0, /* bitsize */
1683 FALSE, /* pc_relative */
1684 0, /* bitpos */
1685 complain_overflow_bitfield,/* complain_on_overflow */
1686 bfd_elf_generic_reloc, /* special_function */
1687 "R_ARM_THM_TLS_DESCSEQ",/* name */
1688 FALSE, /* partial_inplace */
1689 0x00000000, /* src_mask */
1690 0x00000000, /* dst_mask */
1691 FALSE), /* pcrel_offset */
1692 EMPTY_HOWTO (130),
1693 EMPTY_HOWTO (131),
1694 HOWTO (R_ARM_THM_ALU_ABS_G0_NC,/* type. */
1695 0, /* rightshift. */
1696 1, /* size (0 = byte, 1 = short, 2 = long). */
1697 16, /* bitsize. */
1698 FALSE, /* pc_relative. */
1699 0, /* bitpos. */
1700 complain_overflow_bitfield,/* complain_on_overflow. */
1701 bfd_elf_generic_reloc, /* special_function. */
1702 "R_ARM_THM_ALU_ABS_G0_NC",/* name. */
1703 FALSE, /* partial_inplace. */
1704 0x00000000, /* src_mask. */
1705 0x00000000, /* dst_mask. */
1706 FALSE), /* pcrel_offset. */
1707 HOWTO (R_ARM_THM_ALU_ABS_G1_NC,/* type. */
1708 0, /* rightshift. */
1709 1, /* size (0 = byte, 1 = short, 2 = long). */
1710 16, /* bitsize. */
1711 FALSE, /* pc_relative. */
1712 0, /* bitpos. */
1713 complain_overflow_bitfield,/* complain_on_overflow. */
1714 bfd_elf_generic_reloc, /* special_function. */
1715 "R_ARM_THM_ALU_ABS_G1_NC",/* name. */
1716 FALSE, /* partial_inplace. */
1717 0x00000000, /* src_mask. */
1718 0x00000000, /* dst_mask. */
1719 FALSE), /* pcrel_offset. */
1720 HOWTO (R_ARM_THM_ALU_ABS_G2_NC,/* type. */
1721 0, /* rightshift. */
1722 1, /* size (0 = byte, 1 = short, 2 = long). */
1723 16, /* bitsize. */
1724 FALSE, /* pc_relative. */
1725 0, /* bitpos. */
1726 complain_overflow_bitfield,/* complain_on_overflow. */
1727 bfd_elf_generic_reloc, /* special_function. */
1728 "R_ARM_THM_ALU_ABS_G2_NC",/* name. */
1729 FALSE, /* partial_inplace. */
1730 0x00000000, /* src_mask. */
1731 0x00000000, /* dst_mask. */
1732 FALSE), /* pcrel_offset. */
1733 HOWTO (R_ARM_THM_ALU_ABS_G3_NC,/* type. */
1734 0, /* rightshift. */
1735 1, /* size (0 = byte, 1 = short, 2 = long). */
1736 16, /* bitsize. */
1737 FALSE, /* pc_relative. */
1738 0, /* bitpos. */
1739 complain_overflow_bitfield,/* complain_on_overflow. */
1740 bfd_elf_generic_reloc, /* special_function. */
1741 "R_ARM_THM_ALU_ABS_G3_NC",/* name. */
1742 FALSE, /* partial_inplace. */
1743 0x00000000, /* src_mask. */
1744 0x00000000, /* dst_mask. */
1745 FALSE), /* pcrel_offset. */
1746 };
1747
1748 /* 160 onwards: */
1749 static reloc_howto_type elf32_arm_howto_table_2[1] =
1750 {
1751 HOWTO (R_ARM_IRELATIVE, /* type */
1752 0, /* rightshift */
1753 2, /* size (0 = byte, 1 = short, 2 = long) */
1754 32, /* bitsize */
1755 FALSE, /* pc_relative */
1756 0, /* bitpos */
1757 complain_overflow_bitfield,/* complain_on_overflow */
1758 bfd_elf_generic_reloc, /* special_function */
1759 "R_ARM_IRELATIVE", /* name */
1760 TRUE, /* partial_inplace */
1761 0xffffffff, /* src_mask */
1762 0xffffffff, /* dst_mask */
1763 FALSE) /* pcrel_offset */
1764 };
1765
1766 /* 249-255 extended, currently unused, relocations: */
1767 static reloc_howto_type elf32_arm_howto_table_3[4] =
1768 {
1769 HOWTO (R_ARM_RREL32, /* type */
1770 0, /* rightshift */
1771 0, /* size (0 = byte, 1 = short, 2 = long) */
1772 0, /* bitsize */
1773 FALSE, /* pc_relative */
1774 0, /* bitpos */
1775 complain_overflow_dont,/* complain_on_overflow */
1776 bfd_elf_generic_reloc, /* special_function */
1777 "R_ARM_RREL32", /* name */
1778 FALSE, /* partial_inplace */
1779 0, /* src_mask */
1780 0, /* dst_mask */
1781 FALSE), /* pcrel_offset */
1782
1783 HOWTO (R_ARM_RABS32, /* type */
1784 0, /* rightshift */
1785 0, /* size (0 = byte, 1 = short, 2 = long) */
1786 0, /* bitsize */
1787 FALSE, /* pc_relative */
1788 0, /* bitpos */
1789 complain_overflow_dont,/* complain_on_overflow */
1790 bfd_elf_generic_reloc, /* special_function */
1791 "R_ARM_RABS32", /* name */
1792 FALSE, /* partial_inplace */
1793 0, /* src_mask */
1794 0, /* dst_mask */
1795 FALSE), /* pcrel_offset */
1796
1797 HOWTO (R_ARM_RPC24, /* type */
1798 0, /* rightshift */
1799 0, /* size (0 = byte, 1 = short, 2 = long) */
1800 0, /* bitsize */
1801 FALSE, /* pc_relative */
1802 0, /* bitpos */
1803 complain_overflow_dont,/* complain_on_overflow */
1804 bfd_elf_generic_reloc, /* special_function */
1805 "R_ARM_RPC24", /* name */
1806 FALSE, /* partial_inplace */
1807 0, /* src_mask */
1808 0, /* dst_mask */
1809 FALSE), /* pcrel_offset */
1810
1811 HOWTO (R_ARM_RBASE, /* type */
1812 0, /* rightshift */
1813 0, /* size (0 = byte, 1 = short, 2 = long) */
1814 0, /* bitsize */
1815 FALSE, /* pc_relative */
1816 0, /* bitpos */
1817 complain_overflow_dont,/* complain_on_overflow */
1818 bfd_elf_generic_reloc, /* special_function */
1819 "R_ARM_RBASE", /* name */
1820 FALSE, /* partial_inplace */
1821 0, /* src_mask */
1822 0, /* dst_mask */
1823 FALSE) /* pcrel_offset */
1824 };
1825
1826 static reloc_howto_type *
1827 elf32_arm_howto_from_type (unsigned int r_type)
1828 {
1829 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
1830 return &elf32_arm_howto_table_1[r_type];
1831
1832 if (r_type == R_ARM_IRELATIVE)
1833 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1834
1835 if (r_type >= R_ARM_RREL32
1836 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1837 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
1838
1839 return NULL;
1840 }
1841
1842 static void
1843 elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1844 Elf_Internal_Rela * elf_reloc)
1845 {
1846 unsigned int r_type;
1847
1848 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1849 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1850 }
1851
1852 struct elf32_arm_reloc_map
1853 {
1854 bfd_reloc_code_real_type bfd_reloc_val;
1855 unsigned char elf_reloc_val;
1856 };
1857
1858 /* All entries in this list must also be present in elf32_arm_howto_table. */
1859 static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1860 {
1861 {BFD_RELOC_NONE, R_ARM_NONE},
1862 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
1863 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1864 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
1865 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1866 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1867 {BFD_RELOC_32, R_ARM_ABS32},
1868 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1869 {BFD_RELOC_8, R_ARM_ABS8},
1870 {BFD_RELOC_16, R_ARM_ABS16},
1871 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1872 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
1873 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1874 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1875 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1876 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1877 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1878 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
1879 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1880 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1881 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
1882 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
1883 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1884 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
1885 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1886 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1887 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1888 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1889 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1890 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
1891 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1892 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1893 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1894 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1895 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1896 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1897 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1898 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
1899 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1900 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1901 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1902 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1903 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1904 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1905 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1906 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
1907 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
1908 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1909 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
1910 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1911 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1912 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1913 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1914 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1915 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1916 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1917 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
1918 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1919 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1920 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1921 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1922 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1923 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1924 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1925 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1926 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1927 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1928 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1929 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1930 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1931 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1932 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1933 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1934 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1935 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1936 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1937 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1938 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1939 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1940 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1941 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1942 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1943 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1944 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
1945 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1946 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX},
1947 {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC, R_ARM_THM_ALU_ABS_G3_NC},
1948 {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC, R_ARM_THM_ALU_ABS_G2_NC},
1949 {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC, R_ARM_THM_ALU_ABS_G1_NC},
1950 {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G0_NC}
1951 };
1952
1953 static reloc_howto_type *
1954 elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1955 bfd_reloc_code_real_type code)
1956 {
1957 unsigned int i;
1958
1959 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
1960 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1961 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
1962
1963 return NULL;
1964 }
1965
1966 static reloc_howto_type *
1967 elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1968 const char *r_name)
1969 {
1970 unsigned int i;
1971
1972 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
1973 if (elf32_arm_howto_table_1[i].name != NULL
1974 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1975 return &elf32_arm_howto_table_1[i];
1976
1977 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
1978 if (elf32_arm_howto_table_2[i].name != NULL
1979 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1980 return &elf32_arm_howto_table_2[i];
1981
1982 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
1983 if (elf32_arm_howto_table_3[i].name != NULL
1984 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
1985 return &elf32_arm_howto_table_3[i];
1986
1987 return NULL;
1988 }
1989
1990 /* Support for core dump NOTE sections. */
1991
1992 static bfd_boolean
1993 elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
1994 {
1995 int offset;
1996 size_t size;
1997
1998 switch (note->descsz)
1999 {
2000 default:
2001 return FALSE;
2002
2003 case 148: /* Linux/ARM 32-bit. */
2004 /* pr_cursig */
2005 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2006
2007 /* pr_pid */
2008 elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
2009
2010 /* pr_reg */
2011 offset = 72;
2012 size = 72;
2013
2014 break;
2015 }
2016
2017 /* Make a ".reg/999" section. */
2018 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
2019 size, note->descpos + offset);
2020 }
2021
2022 static bfd_boolean
2023 elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
2024 {
2025 switch (note->descsz)
2026 {
2027 default:
2028 return FALSE;
2029
2030 case 124: /* Linux/ARM elf_prpsinfo. */
2031 elf_tdata (abfd)->core->pid
2032 = bfd_get_32 (abfd, note->descdata + 12);
2033 elf_tdata (abfd)->core->program
2034 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
2035 elf_tdata (abfd)->core->command
2036 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
2037 }
2038
2039 /* Note that for some reason, a spurious space is tacked
2040 onto the end of the args in some (at least one anyway)
2041 implementations, so strip it off if it exists. */
2042 {
2043 char *command = elf_tdata (abfd)->core->command;
2044 int n = strlen (command);
2045
2046 if (0 < n && command[n - 1] == ' ')
2047 command[n - 1] = '\0';
2048 }
2049
2050 return TRUE;
2051 }
2052
2053 static char *
2054 elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
2055 int note_type, ...)
2056 {
2057 switch (note_type)
2058 {
2059 default:
2060 return NULL;
2061
2062 case NT_PRPSINFO:
2063 {
2064 char data[124];
2065 va_list ap;
2066
2067 va_start (ap, note_type);
2068 memset (data, 0, sizeof (data));
2069 strncpy (data + 28, va_arg (ap, const char *), 16);
2070 strncpy (data + 44, va_arg (ap, const char *), 80);
2071 va_end (ap);
2072
2073 return elfcore_write_note (abfd, buf, bufsiz,
2074 "CORE", note_type, data, sizeof (data));
2075 }
2076
2077 case NT_PRSTATUS:
2078 {
2079 char data[148];
2080 va_list ap;
2081 long pid;
2082 int cursig;
2083 const void *greg;
2084
2085 va_start (ap, note_type);
2086 memset (data, 0, sizeof (data));
2087 pid = va_arg (ap, long);
2088 bfd_put_32 (abfd, pid, data + 24);
2089 cursig = va_arg (ap, int);
2090 bfd_put_16 (abfd, cursig, data + 12);
2091 greg = va_arg (ap, const void *);
2092 memcpy (data + 72, greg, 72);
2093 va_end (ap);
2094
2095 return elfcore_write_note (abfd, buf, bufsiz,
2096 "CORE", note_type, data, sizeof (data));
2097 }
2098 }
2099 }
2100
2101 #define TARGET_LITTLE_SYM arm_elf32_le_vec
2102 #define TARGET_LITTLE_NAME "elf32-littlearm"
2103 #define TARGET_BIG_SYM arm_elf32_be_vec
2104 #define TARGET_BIG_NAME "elf32-bigarm"
2105
2106 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2107 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2108 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2109
2110 typedef unsigned long int insn32;
2111 typedef unsigned short int insn16;
2112
2113 /* In lieu of proper flags, assume all EABIv4 or later objects are
2114 interworkable. */
2115 #define INTERWORK_FLAG(abfd) \
2116 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2117 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2118 || ((abfd)->flags & BFD_LINKER_CREATED))
2119
2120 /* The linker script knows the section names for placement.
2121 The entry_names are used to do simple name mangling on the stubs.
2122 Given a function name, and its type, the stub can be found. The
2123 name can be changed. The only requirement is the %s be present. */
2124 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2125 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2126
2127 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2128 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2129
2130 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2131 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2132
2133 #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer"
2134 #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "__stm32l4xx_veneer_%x"
2135
2136 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2137 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2138
2139 #define STUB_ENTRY_NAME "__%s_veneer"
2140
2141 #define CMSE_PREFIX "__acle_se_"
2142
2143 /* The name of the dynamic interpreter. This is put in the .interp
2144 section. */
2145 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2146
2147 static const unsigned long tls_trampoline [] =
2148 {
2149 0xe08e0000, /* add r0, lr, r0 */
2150 0xe5901004, /* ldr r1, [r0,#4] */
2151 0xe12fff11, /* bx r1 */
2152 };
2153
2154 static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2155 {
2156 0xe52d2004, /* push {r2} */
2157 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2158 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2159 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2160 0xe081100f, /* 2: add r1, pc */
2161 0xe12fff12, /* bx r2 */
2162 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2163 + dl_tlsdesc_lazy_resolver(GOT) */
2164 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2165 };
2166
2167 #ifdef FOUR_WORD_PLT
2168
2169 /* The first entry in a procedure linkage table looks like
2170 this. It is set up so that any shared library function that is
2171 called before the relocation has been set up calls the dynamic
2172 linker first. */
2173 static const bfd_vma elf32_arm_plt0_entry [] =
2174 {
2175 0xe52de004, /* str lr, [sp, #-4]! */
2176 0xe59fe010, /* ldr lr, [pc, #16] */
2177 0xe08fe00e, /* add lr, pc, lr */
2178 0xe5bef008, /* ldr pc, [lr, #8]! */
2179 };
2180
2181 /* Subsequent entries in a procedure linkage table look like
2182 this. */
2183 static const bfd_vma elf32_arm_plt_entry [] =
2184 {
2185 0xe28fc600, /* add ip, pc, #NN */
2186 0xe28cca00, /* add ip, ip, #NN */
2187 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2188 0x00000000, /* unused */
2189 };
2190
2191 #else /* not FOUR_WORD_PLT */
2192
2193 /* The first entry in a procedure linkage table looks like
2194 this. It is set up so that any shared library function that is
2195 called before the relocation has been set up calls the dynamic
2196 linker first. */
2197 static const bfd_vma elf32_arm_plt0_entry [] =
2198 {
2199 0xe52de004, /* str lr, [sp, #-4]! */
2200 0xe59fe004, /* ldr lr, [pc, #4] */
2201 0xe08fe00e, /* add lr, pc, lr */
2202 0xe5bef008, /* ldr pc, [lr, #8]! */
2203 0x00000000, /* &GOT[0] - . */
2204 };
2205
2206 /* By default subsequent entries in a procedure linkage table look like
2207 this. Offsets that don't fit into 28 bits will cause link error. */
2208 static const bfd_vma elf32_arm_plt_entry_short [] =
2209 {
2210 0xe28fc600, /* add ip, pc, #0xNN00000 */
2211 0xe28cca00, /* add ip, ip, #0xNN000 */
2212 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2213 };
2214
2215 /* When explicitly asked, we'll use this "long" entry format
2216 which can cope with arbitrary displacements. */
2217 static const bfd_vma elf32_arm_plt_entry_long [] =
2218 {
2219 0xe28fc200, /* add ip, pc, #0xN0000000 */
2220 0xe28cc600, /* add ip, ip, #0xNN00000 */
2221 0xe28cca00, /* add ip, ip, #0xNN000 */
2222 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2223 };
2224
2225 static bfd_boolean elf32_arm_use_long_plt_entry = FALSE;
2226
2227 #endif /* not FOUR_WORD_PLT */
2228
2229 /* The first entry in a procedure linkage table looks like this.
2230 It is set up so that any shared library function that is called before the
2231 relocation has been set up calls the dynamic linker first. */
2232 static const bfd_vma elf32_thumb2_plt0_entry [] =
2233 {
2234 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2235 an instruction maybe encoded to one or two array elements. */
2236 0xf8dfb500, /* push {lr} */
2237 0x44fee008, /* ldr.w lr, [pc, #8] */
2238 /* add lr, pc */
2239 0xff08f85e, /* ldr.w pc, [lr, #8]! */
2240 0x00000000, /* &GOT[0] - . */
2241 };
2242
2243 /* Subsequent entries in a procedure linkage table for thumb only target
2244 look like this. */
2245 static const bfd_vma elf32_thumb2_plt_entry [] =
2246 {
2247 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2248 an instruction maybe encoded to one or two array elements. */
2249 0x0c00f240, /* movw ip, #0xNNNN */
2250 0x0c00f2c0, /* movt ip, #0xNNNN */
2251 0xf8dc44fc, /* add ip, pc */
2252 0xbf00f000 /* ldr.w pc, [ip] */
2253 /* nop */
2254 };
2255
2256 /* The format of the first entry in the procedure linkage table
2257 for a VxWorks executable. */
2258 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2259 {
2260 0xe52dc008, /* str ip,[sp,#-8]! */
2261 0xe59fc000, /* ldr ip,[pc] */
2262 0xe59cf008, /* ldr pc,[ip,#8] */
2263 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2264 };
2265
2266 /* The format of subsequent entries in a VxWorks executable. */
2267 static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2268 {
2269 0xe59fc000, /* ldr ip,[pc] */
2270 0xe59cf000, /* ldr pc,[ip] */
2271 0x00000000, /* .long @got */
2272 0xe59fc000, /* ldr ip,[pc] */
2273 0xea000000, /* b _PLT */
2274 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2275 };
2276
2277 /* The format of entries in a VxWorks shared library. */
2278 static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2279 {
2280 0xe59fc000, /* ldr ip,[pc] */
2281 0xe79cf009, /* ldr pc,[ip,r9] */
2282 0x00000000, /* .long @got */
2283 0xe59fc000, /* ldr ip,[pc] */
2284 0xe599f008, /* ldr pc,[r9,#8] */
2285 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2286 };
2287
2288 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2289 #define PLT_THUMB_STUB_SIZE 4
2290 static const bfd_vma elf32_arm_plt_thumb_stub [] =
2291 {
2292 0x4778, /* bx pc */
2293 0x46c0 /* nop */
2294 };
2295
2296 /* The entries in a PLT when using a DLL-based target with multiple
2297 address spaces. */
2298 static const bfd_vma elf32_arm_symbian_plt_entry [] =
2299 {
2300 0xe51ff004, /* ldr pc, [pc, #-4] */
2301 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2302 };
2303
2304 /* The first entry in a procedure linkage table looks like
2305 this. It is set up so that any shared library function that is
2306 called before the relocation has been set up calls the dynamic
2307 linker first. */
2308 static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2309 {
2310 /* First bundle: */
2311 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2312 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2313 0xe08cc00f, /* add ip, ip, pc */
2314 0xe52dc008, /* str ip, [sp, #-8]! */
2315 /* Second bundle: */
2316 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2317 0xe59cc000, /* ldr ip, [ip] */
2318 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2319 0xe12fff1c, /* bx ip */
2320 /* Third bundle: */
2321 0xe320f000, /* nop */
2322 0xe320f000, /* nop */
2323 0xe320f000, /* nop */
2324 /* .Lplt_tail: */
2325 0xe50dc004, /* str ip, [sp, #-4] */
2326 /* Fourth bundle: */
2327 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2328 0xe59cc000, /* ldr ip, [ip] */
2329 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2330 0xe12fff1c, /* bx ip */
2331 };
2332 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2333
2334 /* Subsequent entries in a procedure linkage table look like this. */
2335 static const bfd_vma elf32_arm_nacl_plt_entry [] =
2336 {
2337 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2338 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2339 0xe08cc00f, /* add ip, ip, pc */
2340 0xea000000, /* b .Lplt_tail */
2341 };
2342
2343 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2344 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2345 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2346 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2347 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2348 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2349 #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4)
2350 #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4)
2351
2352 enum stub_insn_type
2353 {
2354 THUMB16_TYPE = 1,
2355 THUMB32_TYPE,
2356 ARM_TYPE,
2357 DATA_TYPE
2358 };
2359
2360 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2361 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2362 is inserted in arm_build_one_stub(). */
2363 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2364 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2365 #define THUMB32_MOVT(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVT_ABS, 0}
2366 #define THUMB32_MOVW(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVW_ABS_NC, 0}
2367 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2368 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2369 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2370 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2371
2372 typedef struct
2373 {
2374 bfd_vma data;
2375 enum stub_insn_type type;
2376 unsigned int r_type;
2377 int reloc_addend;
2378 } insn_sequence;
2379
2380 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2381 to reach the stub if necessary. */
2382 static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
2383 {
2384 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2385 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2386 };
2387
2388 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2389 available. */
2390 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
2391 {
2392 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2393 ARM_INSN (0xe12fff1c), /* bx ip */
2394 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2395 };
2396
2397 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2398 static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
2399 {
2400 THUMB16_INSN (0xb401), /* push {r0} */
2401 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2402 THUMB16_INSN (0x4684), /* mov ip, r0 */
2403 THUMB16_INSN (0xbc01), /* pop {r0} */
2404 THUMB16_INSN (0x4760), /* bx ip */
2405 THUMB16_INSN (0xbf00), /* nop */
2406 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2407 };
2408
2409 /* Thumb -> Thumb long branch stub in thumb2 encoding. Used on armv7. */
2410 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only[] =
2411 {
2412 THUMB32_INSN (0xf85ff000), /* ldr.w pc, [pc, #-0] */
2413 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(x) */
2414 };
2415
2416 /* Thumb -> Thumb long branch stub. Used for PureCode sections on Thumb2
2417 M-profile architectures. */
2418 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only_pure[] =
2419 {
2420 THUMB32_MOVW (0xf2400c00), /* mov.w ip, R_ARM_MOVW_ABS_NC */
2421 THUMB32_MOVT (0xf2c00c00), /* movt ip, R_ARM_MOVT_ABS << 16 */
2422 THUMB16_INSN (0x4760), /* bx ip */
2423 };
2424
2425 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2426 allowed. */
2427 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2428 {
2429 THUMB16_INSN (0x4778), /* bx pc */
2430 THUMB16_INSN (0x46c0), /* nop */
2431 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2432 ARM_INSN (0xe12fff1c), /* bx ip */
2433 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2434 };
2435
2436 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2437 available. */
2438 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
2439 {
2440 THUMB16_INSN (0x4778), /* bx pc */
2441 THUMB16_INSN (0x46c0), /* nop */
2442 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2443 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2444 };
2445
2446 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2447 one, when the destination is close enough. */
2448 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
2449 {
2450 THUMB16_INSN (0x4778), /* bx pc */
2451 THUMB16_INSN (0x46c0), /* nop */
2452 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2453 };
2454
2455 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2456 blx to reach the stub if necessary. */
2457 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
2458 {
2459 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2460 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2461 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2462 };
2463
2464 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2465 blx to reach the stub if necessary. We can not add into pc;
2466 it is not guaranteed to mode switch (different in ARMv6 and
2467 ARMv7). */
2468 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2469 {
2470 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2471 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2472 ARM_INSN (0xe12fff1c), /* bx ip */
2473 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2474 };
2475
2476 /* V4T ARM -> ARM long branch stub, PIC. */
2477 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2478 {
2479 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2480 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2481 ARM_INSN (0xe12fff1c), /* bx ip */
2482 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2483 };
2484
2485 /* V4T Thumb -> ARM long branch stub, PIC. */
2486 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2487 {
2488 THUMB16_INSN (0x4778), /* bx pc */
2489 THUMB16_INSN (0x46c0), /* nop */
2490 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2491 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2492 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2493 };
2494
2495 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2496 architectures. */
2497 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2498 {
2499 THUMB16_INSN (0xb401), /* push {r0} */
2500 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2501 THUMB16_INSN (0x46fc), /* mov ip, pc */
2502 THUMB16_INSN (0x4484), /* add ip, r0 */
2503 THUMB16_INSN (0xbc01), /* pop {r0} */
2504 THUMB16_INSN (0x4760), /* bx ip */
2505 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2506 };
2507
2508 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2509 allowed. */
2510 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2511 {
2512 THUMB16_INSN (0x4778), /* bx pc */
2513 THUMB16_INSN (0x46c0), /* nop */
2514 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2515 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2516 ARM_INSN (0xe12fff1c), /* bx ip */
2517 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2518 };
2519
2520 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2521 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2522 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2523 {
2524 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2525 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2526 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2527 };
2528
2529 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2530 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2531 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2532 {
2533 THUMB16_INSN (0x4778), /* bx pc */
2534 THUMB16_INSN (0x46c0), /* nop */
2535 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2536 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2537 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2538 };
2539
2540 /* NaCl ARM -> ARM long branch stub. */
2541 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] =
2542 {
2543 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2544 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2545 ARM_INSN (0xe12fff1c), /* bx ip */
2546 ARM_INSN (0xe320f000), /* nop */
2547 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2548 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2549 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2550 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2551 };
2552
2553 /* NaCl ARM -> ARM long branch stub, PIC. */
2554 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] =
2555 {
2556 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2557 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2558 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2559 ARM_INSN (0xe12fff1c), /* bx ip */
2560 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2561 DATA_WORD (0, R_ARM_REL32, 8), /* dcd R_ARM_REL32(X+8) */
2562 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2563 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2564 };
2565
2566 /* Stub used for transition to secure state (aka SG veneer). */
2567 static const insn_sequence elf32_arm_stub_cmse_branch_thumb_only[] =
2568 {
2569 THUMB32_INSN (0xe97fe97f), /* sg. */
2570 THUMB32_B_INSN (0xf000b800, -4), /* b.w original_branch_dest. */
2571 };
2572
2573
2574 /* Cortex-A8 erratum-workaround stubs. */
2575
2576 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2577 can't use a conditional branch to reach this stub). */
2578
2579 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2580 {
2581 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2582 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2583 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2584 };
2585
2586 /* Stub used for b.w and bl.w instructions. */
2587
2588 static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2589 {
2590 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2591 };
2592
2593 static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2594 {
2595 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2596 };
2597
2598 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2599 instruction (which switches to ARM mode) to point to this stub. Jump to the
2600 real destination using an ARM-mode branch. */
2601
2602 static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2603 {
2604 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2605 };
2606
2607 /* For each section group there can be a specially created linker section
2608 to hold the stubs for that group. The name of the stub section is based
2609 upon the name of another section within that group with the suffix below
2610 applied.
2611
2612 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2613 create what appeared to be a linker stub section when it actually
2614 contained user code/data. For example, consider this fragment:
2615
2616 const char * stubborn_problems[] = { "np" };
2617
2618 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2619 section called:
2620
2621 .data.rel.local.stubborn_problems
2622
2623 This then causes problems in arm32_arm_build_stubs() as it triggers:
2624
2625 // Ignore non-stub sections.
2626 if (!strstr (stub_sec->name, STUB_SUFFIX))
2627 continue;
2628
2629 And so the section would be ignored instead of being processed. Hence
2630 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2631 C identifier. */
2632 #define STUB_SUFFIX ".__stub"
2633
2634 /* One entry per long/short branch stub defined above. */
2635 #define DEF_STUBS \
2636 DEF_STUB(long_branch_any_any) \
2637 DEF_STUB(long_branch_v4t_arm_thumb) \
2638 DEF_STUB(long_branch_thumb_only) \
2639 DEF_STUB(long_branch_v4t_thumb_thumb) \
2640 DEF_STUB(long_branch_v4t_thumb_arm) \
2641 DEF_STUB(short_branch_v4t_thumb_arm) \
2642 DEF_STUB(long_branch_any_arm_pic) \
2643 DEF_STUB(long_branch_any_thumb_pic) \
2644 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2645 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2646 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2647 DEF_STUB(long_branch_thumb_only_pic) \
2648 DEF_STUB(long_branch_any_tls_pic) \
2649 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2650 DEF_STUB(long_branch_arm_nacl) \
2651 DEF_STUB(long_branch_arm_nacl_pic) \
2652 DEF_STUB(cmse_branch_thumb_only) \
2653 DEF_STUB(a8_veneer_b_cond) \
2654 DEF_STUB(a8_veneer_b) \
2655 DEF_STUB(a8_veneer_bl) \
2656 DEF_STUB(a8_veneer_blx) \
2657 DEF_STUB(long_branch_thumb2_only) \
2658 DEF_STUB(long_branch_thumb2_only_pure)
2659
2660 #define DEF_STUB(x) arm_stub_##x,
2661 enum elf32_arm_stub_type
2662 {
2663 arm_stub_none,
2664 DEF_STUBS
2665 max_stub_type
2666 };
2667 #undef DEF_STUB
2668
2669 /* Note the first a8_veneer type. */
2670 const unsigned arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond;
2671
2672 typedef struct
2673 {
2674 const insn_sequence* template_sequence;
2675 int template_size;
2676 } stub_def;
2677
2678 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2679 static const stub_def stub_definitions[] =
2680 {
2681 {NULL, 0},
2682 DEF_STUBS
2683 };
2684
2685 struct elf32_arm_stub_hash_entry
2686 {
2687 /* Base hash table entry structure. */
2688 struct bfd_hash_entry root;
2689
2690 /* The stub section. */
2691 asection *stub_sec;
2692
2693 /* Offset within stub_sec of the beginning of this stub. */
2694 bfd_vma stub_offset;
2695
2696 /* Given the symbol's value and its section we can determine its final
2697 value when building the stubs (so the stub knows where to jump). */
2698 bfd_vma target_value;
2699 asection *target_section;
2700
2701 /* Same as above but for the source of the branch to the stub. Used for
2702 Cortex-A8 erratum workaround to patch it to branch to the stub. As
2703 such, source section does not need to be recorded since Cortex-A8 erratum
2704 workaround stubs are only generated when both source and target are in the
2705 same section. */
2706 bfd_vma source_value;
2707
2708 /* The instruction which caused this stub to be generated (only valid for
2709 Cortex-A8 erratum workaround stubs at present). */
2710 unsigned long orig_insn;
2711
2712 /* The stub type. */
2713 enum elf32_arm_stub_type stub_type;
2714 /* Its encoding size in bytes. */
2715 int stub_size;
2716 /* Its template. */
2717 const insn_sequence *stub_template;
2718 /* The size of the template (number of entries). */
2719 int stub_template_size;
2720
2721 /* The symbol table entry, if any, that this was derived from. */
2722 struct elf32_arm_link_hash_entry *h;
2723
2724 /* Type of branch. */
2725 enum arm_st_branch_type branch_type;
2726
2727 /* Where this stub is being called from, or, in the case of combined
2728 stub sections, the first input section in the group. */
2729 asection *id_sec;
2730
2731 /* The name for the local symbol at the start of this stub. The
2732 stub name in the hash table has to be unique; this does not, so
2733 it can be friendlier. */
2734 char *output_name;
2735 };
2736
2737 /* Used to build a map of a section. This is required for mixed-endian
2738 code/data. */
2739
2740 typedef struct elf32_elf_section_map
2741 {
2742 bfd_vma vma;
2743 char type;
2744 }
2745 elf32_arm_section_map;
2746
2747 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2748
2749 typedef enum
2750 {
2751 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2752 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2753 VFP11_ERRATUM_ARM_VENEER,
2754 VFP11_ERRATUM_THUMB_VENEER
2755 }
2756 elf32_vfp11_erratum_type;
2757
2758 typedef struct elf32_vfp11_erratum_list
2759 {
2760 struct elf32_vfp11_erratum_list *next;
2761 bfd_vma vma;
2762 union
2763 {
2764 struct
2765 {
2766 struct elf32_vfp11_erratum_list *veneer;
2767 unsigned int vfp_insn;
2768 } b;
2769 struct
2770 {
2771 struct elf32_vfp11_erratum_list *branch;
2772 unsigned int id;
2773 } v;
2774 } u;
2775 elf32_vfp11_erratum_type type;
2776 }
2777 elf32_vfp11_erratum_list;
2778
2779 /* Information about a STM32L4XX erratum veneer, or a branch to such a
2780 veneer. */
2781 typedef enum
2782 {
2783 STM32L4XX_ERRATUM_BRANCH_TO_VENEER,
2784 STM32L4XX_ERRATUM_VENEER
2785 }
2786 elf32_stm32l4xx_erratum_type;
2787
2788 typedef struct elf32_stm32l4xx_erratum_list
2789 {
2790 struct elf32_stm32l4xx_erratum_list *next;
2791 bfd_vma vma;
2792 union
2793 {
2794 struct
2795 {
2796 struct elf32_stm32l4xx_erratum_list *veneer;
2797 unsigned int insn;
2798 } b;
2799 struct
2800 {
2801 struct elf32_stm32l4xx_erratum_list *branch;
2802 unsigned int id;
2803 } v;
2804 } u;
2805 elf32_stm32l4xx_erratum_type type;
2806 }
2807 elf32_stm32l4xx_erratum_list;
2808
2809 typedef enum
2810 {
2811 DELETE_EXIDX_ENTRY,
2812 INSERT_EXIDX_CANTUNWIND_AT_END
2813 }
2814 arm_unwind_edit_type;
2815
2816 /* A (sorted) list of edits to apply to an unwind table. */
2817 typedef struct arm_unwind_table_edit
2818 {
2819 arm_unwind_edit_type type;
2820 /* Note: we sometimes want to insert an unwind entry corresponding to a
2821 section different from the one we're currently writing out, so record the
2822 (text) section this edit relates to here. */
2823 asection *linked_section;
2824 unsigned int index;
2825 struct arm_unwind_table_edit *next;
2826 }
2827 arm_unwind_table_edit;
2828
2829 typedef struct _arm_elf_section_data
2830 {
2831 /* Information about mapping symbols. */
2832 struct bfd_elf_section_data elf;
2833 unsigned int mapcount;
2834 unsigned int mapsize;
2835 elf32_arm_section_map *map;
2836 /* Information about CPU errata. */
2837 unsigned int erratumcount;
2838 elf32_vfp11_erratum_list *erratumlist;
2839 unsigned int stm32l4xx_erratumcount;
2840 elf32_stm32l4xx_erratum_list *stm32l4xx_erratumlist;
2841 unsigned int additional_reloc_count;
2842 /* Information about unwind tables. */
2843 union
2844 {
2845 /* Unwind info attached to a text section. */
2846 struct
2847 {
2848 asection *arm_exidx_sec;
2849 } text;
2850
2851 /* Unwind info attached to an .ARM.exidx section. */
2852 struct
2853 {
2854 arm_unwind_table_edit *unwind_edit_list;
2855 arm_unwind_table_edit *unwind_edit_tail;
2856 } exidx;
2857 } u;
2858 }
2859 _arm_elf_section_data;
2860
2861 #define elf32_arm_section_data(sec) \
2862 ((_arm_elf_section_data *) elf_section_data (sec))
2863
2864 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2865 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2866 so may be created multiple times: we use an array of these entries whilst
2867 relaxing which we can refresh easily, then create stubs for each potentially
2868 erratum-triggering instruction once we've settled on a solution. */
2869
2870 struct a8_erratum_fix
2871 {
2872 bfd *input_bfd;
2873 asection *section;
2874 bfd_vma offset;
2875 bfd_vma target_offset;
2876 unsigned long orig_insn;
2877 char *stub_name;
2878 enum elf32_arm_stub_type stub_type;
2879 enum arm_st_branch_type branch_type;
2880 };
2881
2882 /* A table of relocs applied to branches which might trigger Cortex-A8
2883 erratum. */
2884
2885 struct a8_erratum_reloc
2886 {
2887 bfd_vma from;
2888 bfd_vma destination;
2889 struct elf32_arm_link_hash_entry *hash;
2890 const char *sym_name;
2891 unsigned int r_type;
2892 enum arm_st_branch_type branch_type;
2893 bfd_boolean non_a8_stub;
2894 };
2895
2896 /* The size of the thread control block. */
2897 #define TCB_SIZE 8
2898
2899 /* ARM-specific information about a PLT entry, over and above the usual
2900 gotplt_union. */
2901 struct arm_plt_info
2902 {
2903 /* We reference count Thumb references to a PLT entry separately,
2904 so that we can emit the Thumb trampoline only if needed. */
2905 bfd_signed_vma thumb_refcount;
2906
2907 /* Some references from Thumb code may be eliminated by BL->BLX
2908 conversion, so record them separately. */
2909 bfd_signed_vma maybe_thumb_refcount;
2910
2911 /* How many of the recorded PLT accesses were from non-call relocations.
2912 This information is useful when deciding whether anything takes the
2913 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2914 non-call references to the function should resolve directly to the
2915 real runtime target. */
2916 unsigned int noncall_refcount;
2917
2918 /* Since PLT entries have variable size if the Thumb prologue is
2919 used, we need to record the index into .got.plt instead of
2920 recomputing it from the PLT offset. */
2921 bfd_signed_vma got_offset;
2922 };
2923
2924 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
2925 struct arm_local_iplt_info
2926 {
2927 /* The information that is usually found in the generic ELF part of
2928 the hash table entry. */
2929 union gotplt_union root;
2930
2931 /* The information that is usually found in the ARM-specific part of
2932 the hash table entry. */
2933 struct arm_plt_info arm;
2934
2935 /* A list of all potential dynamic relocations against this symbol. */
2936 struct elf_dyn_relocs *dyn_relocs;
2937 };
2938
2939 struct elf_arm_obj_tdata
2940 {
2941 struct elf_obj_tdata root;
2942
2943 /* tls_type for each local got entry. */
2944 char *local_got_tls_type;
2945
2946 /* GOTPLT entries for TLS descriptors. */
2947 bfd_vma *local_tlsdesc_gotent;
2948
2949 /* Information for local symbols that need entries in .iplt. */
2950 struct arm_local_iplt_info **local_iplt;
2951
2952 /* Zero to warn when linking objects with incompatible enum sizes. */
2953 int no_enum_size_warning;
2954
2955 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2956 int no_wchar_size_warning;
2957 };
2958
2959 #define elf_arm_tdata(bfd) \
2960 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
2961
2962 #define elf32_arm_local_got_tls_type(bfd) \
2963 (elf_arm_tdata (bfd)->local_got_tls_type)
2964
2965 #define elf32_arm_local_tlsdesc_gotent(bfd) \
2966 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2967
2968 #define elf32_arm_local_iplt(bfd) \
2969 (elf_arm_tdata (bfd)->local_iplt)
2970
2971 #define is_arm_elf(bfd) \
2972 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2973 && elf_tdata (bfd) != NULL \
2974 && elf_object_id (bfd) == ARM_ELF_DATA)
2975
2976 static bfd_boolean
2977 elf32_arm_mkobject (bfd *abfd)
2978 {
2979 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
2980 ARM_ELF_DATA);
2981 }
2982
2983 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2984
2985 /* Arm ELF linker hash entry. */
2986 struct elf32_arm_link_hash_entry
2987 {
2988 struct elf_link_hash_entry root;
2989
2990 /* Track dynamic relocs copied for this symbol. */
2991 struct elf_dyn_relocs *dyn_relocs;
2992
2993 /* ARM-specific PLT information. */
2994 struct arm_plt_info plt;
2995
2996 #define GOT_UNKNOWN 0
2997 #define GOT_NORMAL 1
2998 #define GOT_TLS_GD 2
2999 #define GOT_TLS_IE 4
3000 #define GOT_TLS_GDESC 8
3001 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
3002 unsigned int tls_type : 8;
3003
3004 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
3005 unsigned int is_iplt : 1;
3006
3007 unsigned int unused : 23;
3008
3009 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
3010 starting at the end of the jump table. */
3011 bfd_vma tlsdesc_got;
3012
3013 /* The symbol marking the real symbol location for exported thumb
3014 symbols with Arm stubs. */
3015 struct elf_link_hash_entry *export_glue;
3016
3017 /* A pointer to the most recently used stub hash entry against this
3018 symbol. */
3019 struct elf32_arm_stub_hash_entry *stub_cache;
3020 };
3021
3022 /* Traverse an arm ELF linker hash table. */
3023 #define elf32_arm_link_hash_traverse(table, func, info) \
3024 (elf_link_hash_traverse \
3025 (&(table)->root, \
3026 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
3027 (info)))
3028
3029 /* Get the ARM elf linker hash table from a link_info structure. */
3030 #define elf32_arm_hash_table(info) \
3031 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
3032 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
3033
3034 #define arm_stub_hash_lookup(table, string, create, copy) \
3035 ((struct elf32_arm_stub_hash_entry *) \
3036 bfd_hash_lookup ((table), (string), (create), (copy)))
3037
3038 /* Array to keep track of which stub sections have been created, and
3039 information on stub grouping. */
3040 struct map_stub
3041 {
3042 /* This is the section to which stubs in the group will be
3043 attached. */
3044 asection *link_sec;
3045 /* The stub section. */
3046 asection *stub_sec;
3047 };
3048
3049 #define elf32_arm_compute_jump_table_size(htab) \
3050 ((htab)->next_tls_desc_index * 4)
3051
3052 /* ARM ELF linker hash table. */
3053 struct elf32_arm_link_hash_table
3054 {
3055 /* The main hash table. */
3056 struct elf_link_hash_table root;
3057
3058 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
3059 bfd_size_type thumb_glue_size;
3060
3061 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
3062 bfd_size_type arm_glue_size;
3063
3064 /* The size in bytes of section containing the ARMv4 BX veneers. */
3065 bfd_size_type bx_glue_size;
3066
3067 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
3068 veneer has been populated. */
3069 bfd_vma bx_glue_offset[15];
3070
3071 /* The size in bytes of the section containing glue for VFP11 erratum
3072 veneers. */
3073 bfd_size_type vfp11_erratum_glue_size;
3074
3075 /* The size in bytes of the section containing glue for STM32L4XX erratum
3076 veneers. */
3077 bfd_size_type stm32l4xx_erratum_glue_size;
3078
3079 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
3080 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
3081 elf32_arm_write_section(). */
3082 struct a8_erratum_fix *a8_erratum_fixes;
3083 unsigned int num_a8_erratum_fixes;
3084
3085 /* An arbitrary input BFD chosen to hold the glue sections. */
3086 bfd * bfd_of_glue_owner;
3087
3088 /* Nonzero to output a BE8 image. */
3089 int byteswap_code;
3090
3091 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
3092 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
3093 int target1_is_rel;
3094
3095 /* The relocation to use for R_ARM_TARGET2 relocations. */
3096 int target2_reloc;
3097
3098 /* 0 = Ignore R_ARM_V4BX.
3099 1 = Convert BX to MOV PC.
3100 2 = Generate v4 interworing stubs. */
3101 int fix_v4bx;
3102
3103 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
3104 int fix_cortex_a8;
3105
3106 /* Whether we should fix the ARM1176 BLX immediate issue. */
3107 int fix_arm1176;
3108
3109 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
3110 int use_blx;
3111
3112 /* What sort of code sequences we should look for which may trigger the
3113 VFP11 denorm erratum. */
3114 bfd_arm_vfp11_fix vfp11_fix;
3115
3116 /* Global counter for the number of fixes we have emitted. */
3117 int num_vfp11_fixes;
3118
3119 /* What sort of code sequences we should look for which may trigger the
3120 STM32L4XX erratum. */
3121 bfd_arm_stm32l4xx_fix stm32l4xx_fix;
3122
3123 /* Global counter for the number of fixes we have emitted. */
3124 int num_stm32l4xx_fixes;
3125
3126 /* Nonzero to force PIC branch veneers. */
3127 int pic_veneer;
3128
3129 /* The number of bytes in the initial entry in the PLT. */
3130 bfd_size_type plt_header_size;
3131
3132 /* The number of bytes in the subsequent PLT etries. */
3133 bfd_size_type plt_entry_size;
3134
3135 /* True if the target system is VxWorks. */
3136 int vxworks_p;
3137
3138 /* True if the target system is Symbian OS. */
3139 int symbian_p;
3140
3141 /* True if the target system is Native Client. */
3142 int nacl_p;
3143
3144 /* True if the target uses REL relocations. */
3145 int use_rel;
3146
3147 /* Nonzero if import library must be a secure gateway import library
3148 as per ARMv8-M Security Extensions. */
3149 int cmse_implib;
3150
3151 /* The import library whose symbols' address must remain stable in
3152 the import library generated. */
3153 bfd *in_implib_bfd;
3154
3155 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
3156 bfd_vma next_tls_desc_index;
3157
3158 /* How many R_ARM_TLS_DESC relocations were generated so far. */
3159 bfd_vma num_tls_desc;
3160
3161 /* Short-cuts to get to dynamic linker sections. */
3162 asection *sdynbss;
3163 asection *srelbss;
3164
3165 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
3166 asection *srelplt2;
3167
3168 /* The offset into splt of the PLT entry for the TLS descriptor
3169 resolver. Special values are 0, if not necessary (or not found
3170 to be necessary yet), and -1 if needed but not determined
3171 yet. */
3172 bfd_vma dt_tlsdesc_plt;
3173
3174 /* The offset into sgot of the GOT entry used by the PLT entry
3175 above. */
3176 bfd_vma dt_tlsdesc_got;
3177
3178 /* Offset in .plt section of tls_arm_trampoline. */
3179 bfd_vma tls_trampoline;
3180
3181 /* Data for R_ARM_TLS_LDM32 relocations. */
3182 union
3183 {
3184 bfd_signed_vma refcount;
3185 bfd_vma offset;
3186 } tls_ldm_got;
3187
3188 /* Small local sym cache. */
3189 struct sym_cache sym_cache;
3190
3191 /* For convenience in allocate_dynrelocs. */
3192 bfd * obfd;
3193
3194 /* The amount of space used by the reserved portion of the sgotplt
3195 section, plus whatever space is used by the jump slots. */
3196 bfd_vma sgotplt_jump_table_size;
3197
3198 /* The stub hash table. */
3199 struct bfd_hash_table stub_hash_table;
3200
3201 /* Linker stub bfd. */
3202 bfd *stub_bfd;
3203
3204 /* Linker call-backs. */
3205 asection * (*add_stub_section) (const char *, asection *, asection *,
3206 unsigned int);
3207 void (*layout_sections_again) (void);
3208
3209 /* Array to keep track of which stub sections have been created, and
3210 information on stub grouping. */
3211 struct map_stub *stub_group;
3212
3213 /* Input stub section holding secure gateway veneers. */
3214 asection *cmse_stub_sec;
3215
3216 /* Offset in cmse_stub_sec where new SG veneers (not in input import library)
3217 start to be allocated. */
3218 bfd_vma new_cmse_stub_offset;
3219
3220 /* Number of elements in stub_group. */
3221 unsigned int top_id;
3222
3223 /* Assorted information used by elf32_arm_size_stubs. */
3224 unsigned int bfd_count;
3225 unsigned int top_index;
3226 asection **input_list;
3227 };
3228
3229 static inline int
3230 ctz (unsigned int mask)
3231 {
3232 #if GCC_VERSION >= 3004
3233 return __builtin_ctz (mask);
3234 #else
3235 unsigned int i;
3236
3237 for (i = 0; i < 8 * sizeof (mask); i++)
3238 {
3239 if (mask & 0x1)
3240 break;
3241 mask = (mask >> 1);
3242 }
3243 return i;
3244 #endif
3245 }
3246
3247 static inline int
3248 popcount (unsigned int mask)
3249 {
3250 #if GCC_VERSION >= 3004
3251 return __builtin_popcount (mask);
3252 #else
3253 unsigned int i, sum = 0;
3254
3255 for (i = 0; i < 8 * sizeof (mask); i++)
3256 {
3257 if (mask & 0x1)
3258 sum++;
3259 mask = (mask >> 1);
3260 }
3261 return sum;
3262 #endif
3263 }
3264
3265 /* Create an entry in an ARM ELF linker hash table. */
3266
3267 static struct bfd_hash_entry *
3268 elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
3269 struct bfd_hash_table * table,
3270 const char * string)
3271 {
3272 struct elf32_arm_link_hash_entry * ret =
3273 (struct elf32_arm_link_hash_entry *) entry;
3274
3275 /* Allocate the structure if it has not already been allocated by a
3276 subclass. */
3277 if (ret == NULL)
3278 ret = (struct elf32_arm_link_hash_entry *)
3279 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
3280 if (ret == NULL)
3281 return (struct bfd_hash_entry *) ret;
3282
3283 /* Call the allocation method of the superclass. */
3284 ret = ((struct elf32_arm_link_hash_entry *)
3285 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3286 table, string));
3287 if (ret != NULL)
3288 {
3289 ret->dyn_relocs = NULL;
3290 ret->tls_type = GOT_UNKNOWN;
3291 ret->tlsdesc_got = (bfd_vma) -1;
3292 ret->plt.thumb_refcount = 0;
3293 ret->plt.maybe_thumb_refcount = 0;
3294 ret->plt.noncall_refcount = 0;
3295 ret->plt.got_offset = -1;
3296 ret->is_iplt = FALSE;
3297 ret->export_glue = NULL;
3298
3299 ret->stub_cache = NULL;
3300 }
3301
3302 return (struct bfd_hash_entry *) ret;
3303 }
3304
3305 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3306 symbols. */
3307
3308 static bfd_boolean
3309 elf32_arm_allocate_local_sym_info (bfd *abfd)
3310 {
3311 if (elf_local_got_refcounts (abfd) == NULL)
3312 {
3313 bfd_size_type num_syms;
3314 bfd_size_type size;
3315 char *data;
3316
3317 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3318 size = num_syms * (sizeof (bfd_signed_vma)
3319 + sizeof (struct arm_local_iplt_info *)
3320 + sizeof (bfd_vma)
3321 + sizeof (char));
3322 data = bfd_zalloc (abfd, size);
3323 if (data == NULL)
3324 return FALSE;
3325
3326 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3327 data += num_syms * sizeof (bfd_signed_vma);
3328
3329 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3330 data += num_syms * sizeof (struct arm_local_iplt_info *);
3331
3332 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3333 data += num_syms * sizeof (bfd_vma);
3334
3335 elf32_arm_local_got_tls_type (abfd) = data;
3336 }
3337 return TRUE;
3338 }
3339
3340 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3341 to input bfd ABFD. Create the information if it doesn't already exist.
3342 Return null if an allocation fails. */
3343
3344 static struct arm_local_iplt_info *
3345 elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3346 {
3347 struct arm_local_iplt_info **ptr;
3348
3349 if (!elf32_arm_allocate_local_sym_info (abfd))
3350 return NULL;
3351
3352 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3353 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3354 if (*ptr == NULL)
3355 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3356 return *ptr;
3357 }
3358
3359 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3360 in ABFD's symbol table. If the symbol is global, H points to its
3361 hash table entry, otherwise H is null.
3362
3363 Return true if the symbol does have PLT information. When returning
3364 true, point *ROOT_PLT at the target-independent reference count/offset
3365 union and *ARM_PLT at the ARM-specific information. */
3366
3367 static bfd_boolean
3368 elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_table *globals,
3369 struct elf32_arm_link_hash_entry *h,
3370 unsigned long r_symndx, union gotplt_union **root_plt,
3371 struct arm_plt_info **arm_plt)
3372 {
3373 struct arm_local_iplt_info *local_iplt;
3374
3375 if (globals->root.splt == NULL && globals->root.iplt == NULL)
3376 return FALSE;
3377
3378 if (h != NULL)
3379 {
3380 *root_plt = &h->root.plt;
3381 *arm_plt = &h->plt;
3382 return TRUE;
3383 }
3384
3385 if (elf32_arm_local_iplt (abfd) == NULL)
3386 return FALSE;
3387
3388 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3389 if (local_iplt == NULL)
3390 return FALSE;
3391
3392 *root_plt = &local_iplt->root;
3393 *arm_plt = &local_iplt->arm;
3394 return TRUE;
3395 }
3396
3397 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3398 before it. */
3399
3400 static bfd_boolean
3401 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3402 struct arm_plt_info *arm_plt)
3403 {
3404 struct elf32_arm_link_hash_table *htab;
3405
3406 htab = elf32_arm_hash_table (info);
3407 return (arm_plt->thumb_refcount != 0
3408 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0));
3409 }
3410
3411 /* Return a pointer to the head of the dynamic reloc list that should
3412 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3413 ABFD's symbol table. Return null if an error occurs. */
3414
3415 static struct elf_dyn_relocs **
3416 elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3417 Elf_Internal_Sym *isym)
3418 {
3419 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3420 {
3421 struct arm_local_iplt_info *local_iplt;
3422
3423 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3424 if (local_iplt == NULL)
3425 return NULL;
3426 return &local_iplt->dyn_relocs;
3427 }
3428 else
3429 {
3430 /* Track dynamic relocs needed for local syms too.
3431 We really need local syms available to do this
3432 easily. Oh well. */
3433 asection *s;
3434 void *vpp;
3435
3436 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3437 if (s == NULL)
3438 abort ();
3439
3440 vpp = &elf_section_data (s)->local_dynrel;
3441 return (struct elf_dyn_relocs **) vpp;
3442 }
3443 }
3444
3445 /* Initialize an entry in the stub hash table. */
3446
3447 static struct bfd_hash_entry *
3448 stub_hash_newfunc (struct bfd_hash_entry *entry,
3449 struct bfd_hash_table *table,
3450 const char *string)
3451 {
3452 /* Allocate the structure if it has not already been allocated by a
3453 subclass. */
3454 if (entry == NULL)
3455 {
3456 entry = (struct bfd_hash_entry *)
3457 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
3458 if (entry == NULL)
3459 return entry;
3460 }
3461
3462 /* Call the allocation method of the superclass. */
3463 entry = bfd_hash_newfunc (entry, table, string);
3464 if (entry != NULL)
3465 {
3466 struct elf32_arm_stub_hash_entry *eh;
3467
3468 /* Initialize the local fields. */
3469 eh = (struct elf32_arm_stub_hash_entry *) entry;
3470 eh->stub_sec = NULL;
3471 eh->stub_offset = (bfd_vma) -1;
3472 eh->source_value = 0;
3473 eh->target_value = 0;
3474 eh->target_section = NULL;
3475 eh->orig_insn = 0;
3476 eh->stub_type = arm_stub_none;
3477 eh->stub_size = 0;
3478 eh->stub_template = NULL;
3479 eh->stub_template_size = -1;
3480 eh->h = NULL;
3481 eh->id_sec = NULL;
3482 eh->output_name = NULL;
3483 }
3484
3485 return entry;
3486 }
3487
3488 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3489 shortcuts to them in our hash table. */
3490
3491 static bfd_boolean
3492 create_got_section (bfd *dynobj, struct bfd_link_info *info)
3493 {
3494 struct elf32_arm_link_hash_table *htab;
3495
3496 htab = elf32_arm_hash_table (info);
3497 if (htab == NULL)
3498 return FALSE;
3499
3500 /* BPABI objects never have a GOT, or associated sections. */
3501 if (htab->symbian_p)
3502 return TRUE;
3503
3504 if (! _bfd_elf_create_got_section (dynobj, info))
3505 return FALSE;
3506
3507 return TRUE;
3508 }
3509
3510 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3511
3512 static bfd_boolean
3513 create_ifunc_sections (struct bfd_link_info *info)
3514 {
3515 struct elf32_arm_link_hash_table *htab;
3516 const struct elf_backend_data *bed;
3517 bfd *dynobj;
3518 asection *s;
3519 flagword flags;
3520
3521 htab = elf32_arm_hash_table (info);
3522 dynobj = htab->root.dynobj;
3523 bed = get_elf_backend_data (dynobj);
3524 flags = bed->dynamic_sec_flags;
3525
3526 if (htab->root.iplt == NULL)
3527 {
3528 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3529 flags | SEC_READONLY | SEC_CODE);
3530 if (s == NULL
3531 || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment))
3532 return FALSE;
3533 htab->root.iplt = s;
3534 }
3535
3536 if (htab->root.irelplt == NULL)
3537 {
3538 s = bfd_make_section_anyway_with_flags (dynobj,
3539 RELOC_SECTION (htab, ".iplt"),
3540 flags | SEC_READONLY);
3541 if (s == NULL
3542 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3543 return FALSE;
3544 htab->root.irelplt = s;
3545 }
3546
3547 if (htab->root.igotplt == NULL)
3548 {
3549 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
3550 if (s == NULL
3551 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3552 return FALSE;
3553 htab->root.igotplt = s;
3554 }
3555 return TRUE;
3556 }
3557
3558 /* Determine if we're dealing with a Thumb only architecture. */
3559
3560 static bfd_boolean
3561 using_thumb_only (struct elf32_arm_link_hash_table *globals)
3562 {
3563 int arch;
3564 int profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3565 Tag_CPU_arch_profile);
3566
3567 if (profile)
3568 return profile == 'M';
3569
3570 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3571
3572 /* Force return logic to be reviewed for each new architecture. */
3573 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8
3574 || arch == TAG_CPU_ARCH_V8M_BASE
3575 || arch == TAG_CPU_ARCH_V8M_MAIN);
3576
3577 if (arch == TAG_CPU_ARCH_V6_M
3578 || arch == TAG_CPU_ARCH_V6S_M
3579 || arch == TAG_CPU_ARCH_V7E_M
3580 || arch == TAG_CPU_ARCH_V8M_BASE
3581 || arch == TAG_CPU_ARCH_V8M_MAIN)
3582 return TRUE;
3583
3584 return FALSE;
3585 }
3586
3587 /* Determine if we're dealing with a Thumb-2 object. */
3588
3589 static bfd_boolean
3590 using_thumb2 (struct elf32_arm_link_hash_table *globals)
3591 {
3592 int arch;
3593 int thumb_isa = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3594 Tag_THUMB_ISA_use);
3595
3596 if (thumb_isa)
3597 return thumb_isa == 2;
3598
3599 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3600
3601 /* Force return logic to be reviewed for each new architecture. */
3602 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8
3603 || arch == TAG_CPU_ARCH_V8M_BASE
3604 || arch == TAG_CPU_ARCH_V8M_MAIN);
3605
3606 return (arch == TAG_CPU_ARCH_V6T2
3607 || arch == TAG_CPU_ARCH_V7
3608 || arch == TAG_CPU_ARCH_V7E_M
3609 || arch == TAG_CPU_ARCH_V8
3610 || arch == TAG_CPU_ARCH_V8M_MAIN);
3611 }
3612
3613 /* Determine whether Thumb-2 BL instruction is available. */
3614
3615 static bfd_boolean
3616 using_thumb2_bl (struct elf32_arm_link_hash_table *globals)
3617 {
3618 int arch =
3619 bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3620
3621 /* Force return logic to be reviewed for each new architecture. */
3622 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8
3623 || arch == TAG_CPU_ARCH_V8M_BASE
3624 || arch == TAG_CPU_ARCH_V8M_MAIN);
3625
3626 /* Architecture was introduced after ARMv6T2 (eg. ARMv6-M). */
3627 return (arch == TAG_CPU_ARCH_V6T2
3628 || arch >= TAG_CPU_ARCH_V7);
3629 }
3630
3631 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3632 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3633 hash table. */
3634
3635 static bfd_boolean
3636 elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
3637 {
3638 struct elf32_arm_link_hash_table *htab;
3639
3640 htab = elf32_arm_hash_table (info);
3641 if (htab == NULL)
3642 return FALSE;
3643
3644 if (!htab->root.sgot && !create_got_section (dynobj, info))
3645 return FALSE;
3646
3647 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3648 return FALSE;
3649
3650 htab->sdynbss = bfd_get_linker_section (dynobj, ".dynbss");
3651 if (!bfd_link_pic (info))
3652 htab->srelbss = bfd_get_linker_section (dynobj,
3653 RELOC_SECTION (htab, ".bss"));
3654
3655 if (htab->vxworks_p)
3656 {
3657 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3658 return FALSE;
3659
3660 if (bfd_link_pic (info))
3661 {
3662 htab->plt_header_size = 0;
3663 htab->plt_entry_size
3664 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3665 }
3666 else
3667 {
3668 htab->plt_header_size
3669 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3670 htab->plt_entry_size
3671 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3672 }
3673
3674 if (elf_elfheader (dynobj))
3675 elf_elfheader (dynobj)->e_ident[EI_CLASS] = ELFCLASS32;
3676 }
3677 else
3678 {
3679 /* PR ld/16017
3680 Test for thumb only architectures. Note - we cannot just call
3681 using_thumb_only() as the attributes in the output bfd have not been
3682 initialised at this point, so instead we use the input bfd. */
3683 bfd * saved_obfd = htab->obfd;
3684
3685 htab->obfd = dynobj;
3686 if (using_thumb_only (htab))
3687 {
3688 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
3689 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
3690 }
3691 htab->obfd = saved_obfd;
3692 }
3693
3694 if (!htab->root.splt
3695 || !htab->root.srelplt
3696 || !htab->sdynbss
3697 || (!bfd_link_pic (info) && !htab->srelbss))
3698 abort ();
3699
3700 return TRUE;
3701 }
3702
3703 /* Copy the extra info we tack onto an elf_link_hash_entry. */
3704
3705 static void
3706 elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
3707 struct elf_link_hash_entry *dir,
3708 struct elf_link_hash_entry *ind)
3709 {
3710 struct elf32_arm_link_hash_entry *edir, *eind;
3711
3712 edir = (struct elf32_arm_link_hash_entry *) dir;
3713 eind = (struct elf32_arm_link_hash_entry *) ind;
3714
3715 if (eind->dyn_relocs != NULL)
3716 {
3717 if (edir->dyn_relocs != NULL)
3718 {
3719 struct elf_dyn_relocs **pp;
3720 struct elf_dyn_relocs *p;
3721
3722 /* Add reloc counts against the indirect sym to the direct sym
3723 list. Merge any entries against the same section. */
3724 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
3725 {
3726 struct elf_dyn_relocs *q;
3727
3728 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3729 if (q->sec == p->sec)
3730 {
3731 q->pc_count += p->pc_count;
3732 q->count += p->count;
3733 *pp = p->next;
3734 break;
3735 }
3736 if (q == NULL)
3737 pp = &p->next;
3738 }
3739 *pp = edir->dyn_relocs;
3740 }
3741
3742 edir->dyn_relocs = eind->dyn_relocs;
3743 eind->dyn_relocs = NULL;
3744 }
3745
3746 if (ind->root.type == bfd_link_hash_indirect)
3747 {
3748 /* Copy over PLT info. */
3749 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
3750 eind->plt.thumb_refcount = 0;
3751 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
3752 eind->plt.maybe_thumb_refcount = 0;
3753 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
3754 eind->plt.noncall_refcount = 0;
3755
3756 /* We should only allocate a function to .iplt once the final
3757 symbol information is known. */
3758 BFD_ASSERT (!eind->is_iplt);
3759
3760 if (dir->got.refcount <= 0)
3761 {
3762 edir->tls_type = eind->tls_type;
3763 eind->tls_type = GOT_UNKNOWN;
3764 }
3765 }
3766
3767 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3768 }
3769
3770 /* Destroy an ARM elf linker hash table. */
3771
3772 static void
3773 elf32_arm_link_hash_table_free (bfd *obfd)
3774 {
3775 struct elf32_arm_link_hash_table *ret
3776 = (struct elf32_arm_link_hash_table *) obfd->link.hash;
3777
3778 bfd_hash_table_free (&ret->stub_hash_table);
3779 _bfd_elf_link_hash_table_free (obfd);
3780 }
3781
3782 /* Create an ARM elf linker hash table. */
3783
3784 static struct bfd_link_hash_table *
3785 elf32_arm_link_hash_table_create (bfd *abfd)
3786 {
3787 struct elf32_arm_link_hash_table *ret;
3788 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
3789
3790 ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt);
3791 if (ret == NULL)
3792 return NULL;
3793
3794 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
3795 elf32_arm_link_hash_newfunc,
3796 sizeof (struct elf32_arm_link_hash_entry),
3797 ARM_ELF_DATA))
3798 {
3799 free (ret);
3800 return NULL;
3801 }
3802
3803 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3804 ret->stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE;
3805 #ifdef FOUR_WORD_PLT
3806 ret->plt_header_size = 16;
3807 ret->plt_entry_size = 16;
3808 #else
3809 ret->plt_header_size = 20;
3810 ret->plt_entry_size = elf32_arm_use_long_plt_entry ? 16 : 12;
3811 #endif
3812 ret->use_rel = 1;
3813 ret->obfd = abfd;
3814
3815 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
3816 sizeof (struct elf32_arm_stub_hash_entry)))
3817 {
3818 _bfd_elf_link_hash_table_free (abfd);
3819 return NULL;
3820 }
3821 ret->root.root.hash_table_free = elf32_arm_link_hash_table_free;
3822
3823 return &ret->root.root;
3824 }
3825
3826 /* Determine what kind of NOPs are available. */
3827
3828 static bfd_boolean
3829 arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3830 {
3831 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3832 Tag_CPU_arch);
3833
3834 /* Force return logic to be reviewed for each new architecture. */
3835 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8
3836 || arch == TAG_CPU_ARCH_V8M_BASE
3837 || arch == TAG_CPU_ARCH_V8M_MAIN);
3838
3839 return (arch == TAG_CPU_ARCH_V6T2
3840 || arch == TAG_CPU_ARCH_V6K
3841 || arch == TAG_CPU_ARCH_V7
3842 || arch == TAG_CPU_ARCH_V8);
3843 }
3844
3845 static bfd_boolean
3846 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3847 {
3848 switch (stub_type)
3849 {
3850 case arm_stub_long_branch_thumb_only:
3851 case arm_stub_long_branch_thumb2_only:
3852 case arm_stub_long_branch_thumb2_only_pure:
3853 case arm_stub_long_branch_v4t_thumb_arm:
3854 case arm_stub_short_branch_v4t_thumb_arm:
3855 case arm_stub_long_branch_v4t_thumb_arm_pic:
3856 case arm_stub_long_branch_v4t_thumb_tls_pic:
3857 case arm_stub_long_branch_thumb_only_pic:
3858 case arm_stub_cmse_branch_thumb_only:
3859 return TRUE;
3860 case arm_stub_none:
3861 BFD_FAIL ();
3862 return FALSE;
3863 break;
3864 default:
3865 return FALSE;
3866 }
3867 }
3868
3869 /* Determine the type of stub needed, if any, for a call. */
3870
3871 static enum elf32_arm_stub_type
3872 arm_type_of_stub (struct bfd_link_info *info,
3873 asection *input_sec,
3874 const Elf_Internal_Rela *rel,
3875 unsigned char st_type,
3876 enum arm_st_branch_type *actual_branch_type,
3877 struct elf32_arm_link_hash_entry *hash,
3878 bfd_vma destination,
3879 asection *sym_sec,
3880 bfd *input_bfd,
3881 const char *name)
3882 {
3883 bfd_vma location;
3884 bfd_signed_vma branch_offset;
3885 unsigned int r_type;
3886 struct elf32_arm_link_hash_table * globals;
3887 bfd_boolean thumb2, thumb2_bl, thumb_only;
3888 enum elf32_arm_stub_type stub_type = arm_stub_none;
3889 int use_plt = 0;
3890 enum arm_st_branch_type branch_type = *actual_branch_type;
3891 union gotplt_union *root_plt;
3892 struct arm_plt_info *arm_plt;
3893 int arch;
3894 int thumb2_movw;
3895
3896 if (branch_type == ST_BRANCH_LONG)
3897 return stub_type;
3898
3899 globals = elf32_arm_hash_table (info);
3900 if (globals == NULL)
3901 return stub_type;
3902
3903 thumb_only = using_thumb_only (globals);
3904 thumb2 = using_thumb2 (globals);
3905 thumb2_bl = using_thumb2_bl (globals);
3906
3907 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3908
3909 /* True for architectures that implement the thumb2 movw instruction. */
3910 thumb2_movw = thumb2 || (arch == TAG_CPU_ARCH_V8M_BASE);
3911
3912 /* Determine where the call point is. */
3913 location = (input_sec->output_offset
3914 + input_sec->output_section->vma
3915 + rel->r_offset);
3916
3917 r_type = ELF32_R_TYPE (rel->r_info);
3918
3919 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
3920 are considering a function call relocation. */
3921 if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3922 || r_type == R_ARM_THM_JUMP19)
3923 && branch_type == ST_BRANCH_TO_ARM)
3924 branch_type = ST_BRANCH_TO_THUMB;
3925
3926 /* For TLS call relocs, it is the caller's responsibility to provide
3927 the address of the appropriate trampoline. */
3928 if (r_type != R_ARM_TLS_CALL
3929 && r_type != R_ARM_THM_TLS_CALL
3930 && elf32_arm_get_plt_info (input_bfd, globals, hash,
3931 ELF32_R_SYM (rel->r_info), &root_plt,
3932 &arm_plt)
3933 && root_plt->offset != (bfd_vma) -1)
3934 {
3935 asection *splt;
3936
3937 if (hash == NULL || hash->is_iplt)
3938 splt = globals->root.iplt;
3939 else
3940 splt = globals->root.splt;
3941 if (splt != NULL)
3942 {
3943 use_plt = 1;
3944
3945 /* Note when dealing with PLT entries: the main PLT stub is in
3946 ARM mode, so if the branch is in Thumb mode, another
3947 Thumb->ARM stub will be inserted later just before the ARM
3948 PLT stub. We don't take this extra distance into account
3949 here, because if a long branch stub is needed, we'll add a
3950 Thumb->Arm one and branch directly to the ARM PLT entry
3951 because it avoids spreading offset corrections in several
3952 places. */
3953
3954 destination = (splt->output_section->vma
3955 + splt->output_offset
3956 + root_plt->offset);
3957 st_type = STT_FUNC;
3958 branch_type = ST_BRANCH_TO_ARM;
3959 }
3960 }
3961 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
3962 BFD_ASSERT (st_type != STT_GNU_IFUNC);
3963
3964 branch_offset = (bfd_signed_vma)(destination - location);
3965
3966 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3967 || r_type == R_ARM_THM_TLS_CALL || r_type == R_ARM_THM_JUMP19)
3968 {
3969 /* Handle cases where:
3970 - this call goes too far (different Thumb/Thumb2 max
3971 distance)
3972 - it's a Thumb->Arm call and blx is not available, or it's a
3973 Thumb->Arm branch (not bl). A stub is needed in this case,
3974 but only if this call is not through a PLT entry. Indeed,
3975 PLT stubs handle mode switching already.
3976 */
3977 if ((!thumb2_bl
3978 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3979 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3980 || (thumb2_bl
3981 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3982 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
3983 || (thumb2
3984 && (branch_offset > THM2_MAX_FWD_COND_BRANCH_OFFSET
3985 || (branch_offset < THM2_MAX_BWD_COND_BRANCH_OFFSET))
3986 && (r_type == R_ARM_THM_JUMP19))
3987 || (branch_type == ST_BRANCH_TO_ARM
3988 && (((r_type == R_ARM_THM_CALL
3989 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
3990 || (r_type == R_ARM_THM_JUMP24)
3991 || (r_type == R_ARM_THM_JUMP19))
3992 && !use_plt))
3993 {
3994 if (branch_type == ST_BRANCH_TO_THUMB)
3995 {
3996 /* Thumb to thumb. */
3997 if (!thumb_only)
3998 {
3999 if (input_sec->flags & SEC_ELF_PURECODE)
4000 (*_bfd_error_handler) (_("%B(%s): warning: long branch "
4001 " veneers used in section with "
4002 "SHF_ARM_PURECODE section "
4003 "attribute is only supported"
4004 " for M-profile targets that "
4005 "implement the movw "
4006 "instruction."));
4007
4008 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4009 /* PIC stubs. */
4010 ? ((globals->use_blx
4011 && (r_type == R_ARM_THM_CALL))
4012 /* V5T and above. Stub starts with ARM code, so
4013 we must be able to switch mode before
4014 reaching it, which is only possible for 'bl'
4015 (ie R_ARM_THM_CALL relocation). */
4016 ? arm_stub_long_branch_any_thumb_pic
4017 /* On V4T, use Thumb code only. */
4018 : arm_stub_long_branch_v4t_thumb_thumb_pic)
4019
4020 /* non-PIC stubs. */
4021 : ((globals->use_blx
4022 && (r_type == R_ARM_THM_CALL))
4023 /* V5T and above. */
4024 ? arm_stub_long_branch_any_any
4025 /* V4T. */
4026 : arm_stub_long_branch_v4t_thumb_thumb);
4027 }
4028 else
4029 {
4030 if (thumb2_movw && (input_sec->flags & SEC_ELF_PURECODE))
4031 stub_type = arm_stub_long_branch_thumb2_only_pure;
4032 else
4033 {
4034 if (input_sec->flags & SEC_ELF_PURECODE)
4035 (*_bfd_error_handler) (_("%B(%s): warning: long branch "
4036 " veneers used in section with "
4037 "SHF_ARM_PURECODE section "
4038 "attribute is only supported"
4039 " for M-profile targets that "
4040 "implement the movw "
4041 "instruction."));
4042
4043 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4044 /* PIC stub. */
4045 ? arm_stub_long_branch_thumb_only_pic
4046 /* non-PIC stub. */
4047 : (thumb2 ? arm_stub_long_branch_thumb2_only
4048 : arm_stub_long_branch_thumb_only);
4049 }
4050 }
4051 }
4052 else
4053 {
4054 if (input_sec->flags & SEC_ELF_PURECODE)
4055 (*_bfd_error_handler) (_("%B(%s): warning: long branch "
4056 " veneers used in section with "
4057 "SHF_ARM_PURECODE section "
4058 "attribute is only supported"
4059 " for M-profile targets that "
4060 "implement the movw "
4061 "instruction."));
4062
4063 /* Thumb to arm. */
4064 if (sym_sec != NULL
4065 && sym_sec->owner != NULL
4066 && !INTERWORK_FLAG (sym_sec->owner))
4067 {
4068 (*_bfd_error_handler)
4069 (_("%B(%s): warning: interworking not enabled.\n"
4070 " first occurrence: %B: Thumb call to ARM"),
4071 sym_sec->owner, input_bfd, name);
4072 }
4073
4074 stub_type =
4075 (bfd_link_pic (info) | globals->pic_veneer)
4076 /* PIC stubs. */
4077 ? (r_type == R_ARM_THM_TLS_CALL
4078 /* TLS PIC stubs. */
4079 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
4080 : arm_stub_long_branch_v4t_thumb_tls_pic)
4081 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4082 /* V5T PIC and above. */
4083 ? arm_stub_long_branch_any_arm_pic
4084 /* V4T PIC stub. */
4085 : arm_stub_long_branch_v4t_thumb_arm_pic))
4086
4087 /* non-PIC stubs. */
4088 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4089 /* V5T and above. */
4090 ? arm_stub_long_branch_any_any
4091 /* V4T. */
4092 : arm_stub_long_branch_v4t_thumb_arm);
4093
4094 /* Handle v4t short branches. */
4095 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
4096 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
4097 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
4098 stub_type = arm_stub_short_branch_v4t_thumb_arm;
4099 }
4100 }
4101 }
4102 else if (r_type == R_ARM_CALL
4103 || r_type == R_ARM_JUMP24
4104 || r_type == R_ARM_PLT32
4105 || r_type == R_ARM_TLS_CALL)
4106 {
4107 if (input_sec->flags & SEC_ELF_PURECODE)
4108 (*_bfd_error_handler) (_("%B(%s): warning: long branch "
4109 " veneers used in section with "
4110 "SHF_ARM_PURECODE section "
4111 "attribute is only supported"
4112 " for M-profile targets that "
4113 "implement the movw "
4114 "instruction."));
4115 if (branch_type == ST_BRANCH_TO_THUMB)
4116 {
4117 /* Arm to thumb. */
4118
4119 if (sym_sec != NULL
4120 && sym_sec->owner != NULL
4121 && !INTERWORK_FLAG (sym_sec->owner))
4122 {
4123 (*_bfd_error_handler)
4124 (_("%B(%s): warning: interworking not enabled.\n"
4125 " first occurrence: %B: ARM call to Thumb"),
4126 sym_sec->owner, input_bfd, name);
4127 }
4128
4129 /* We have an extra 2-bytes reach because of
4130 the mode change (bit 24 (H) of BLX encoding). */
4131 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
4132 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
4133 || (r_type == R_ARM_CALL && !globals->use_blx)
4134 || (r_type == R_ARM_JUMP24)
4135 || (r_type == R_ARM_PLT32))
4136 {
4137 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4138 /* PIC stubs. */
4139 ? ((globals->use_blx)
4140 /* V5T and above. */
4141 ? arm_stub_long_branch_any_thumb_pic
4142 /* V4T stub. */
4143 : arm_stub_long_branch_v4t_arm_thumb_pic)
4144
4145 /* non-PIC stubs. */
4146 : ((globals->use_blx)
4147 /* V5T and above. */
4148 ? arm_stub_long_branch_any_any
4149 /* V4T. */
4150 : arm_stub_long_branch_v4t_arm_thumb);
4151 }
4152 }
4153 else
4154 {
4155 /* Arm to arm. */
4156 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
4157 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
4158 {
4159 stub_type =
4160 (bfd_link_pic (info) | globals->pic_veneer)
4161 /* PIC stubs. */
4162 ? (r_type == R_ARM_TLS_CALL
4163 /* TLS PIC Stub. */
4164 ? arm_stub_long_branch_any_tls_pic
4165 : (globals->nacl_p
4166 ? arm_stub_long_branch_arm_nacl_pic
4167 : arm_stub_long_branch_any_arm_pic))
4168 /* non-PIC stubs. */
4169 : (globals->nacl_p
4170 ? arm_stub_long_branch_arm_nacl
4171 : arm_stub_long_branch_any_any);
4172 }
4173 }
4174 }
4175
4176 /* If a stub is needed, record the actual destination type. */
4177 if (stub_type != arm_stub_none)
4178 *actual_branch_type = branch_type;
4179
4180 return stub_type;
4181 }
4182
4183 /* Build a name for an entry in the stub hash table. */
4184
4185 static char *
4186 elf32_arm_stub_name (const asection *input_section,
4187 const asection *sym_sec,
4188 const struct elf32_arm_link_hash_entry *hash,
4189 const Elf_Internal_Rela *rel,
4190 enum elf32_arm_stub_type stub_type)
4191 {
4192 char *stub_name;
4193 bfd_size_type len;
4194
4195 if (hash)
4196 {
4197 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
4198 stub_name = (char *) bfd_malloc (len);
4199 if (stub_name != NULL)
4200 sprintf (stub_name, "%08x_%s+%x_%d",
4201 input_section->id & 0xffffffff,
4202 hash->root.root.root.string,
4203 (int) rel->r_addend & 0xffffffff,
4204 (int) stub_type);
4205 }
4206 else
4207 {
4208 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
4209 stub_name = (char *) bfd_malloc (len);
4210 if (stub_name != NULL)
4211 sprintf (stub_name, "%08x_%x:%x+%x_%d",
4212 input_section->id & 0xffffffff,
4213 sym_sec->id & 0xffffffff,
4214 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
4215 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
4216 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
4217 (int) rel->r_addend & 0xffffffff,
4218 (int) stub_type);
4219 }
4220
4221 return stub_name;
4222 }
4223
4224 /* Look up an entry in the stub hash. Stub entries are cached because
4225 creating the stub name takes a bit of time. */
4226
4227 static struct elf32_arm_stub_hash_entry *
4228 elf32_arm_get_stub_entry (const asection *input_section,
4229 const asection *sym_sec,
4230 struct elf_link_hash_entry *hash,
4231 const Elf_Internal_Rela *rel,
4232 struct elf32_arm_link_hash_table *htab,
4233 enum elf32_arm_stub_type stub_type)
4234 {
4235 struct elf32_arm_stub_hash_entry *stub_entry;
4236 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
4237 const asection *id_sec;
4238
4239 if ((input_section->flags & SEC_CODE) == 0)
4240 return NULL;
4241
4242 /* If this input section is part of a group of sections sharing one
4243 stub section, then use the id of the first section in the group.
4244 Stub names need to include a section id, as there may well be
4245 more than one stub used to reach say, printf, and we need to
4246 distinguish between them. */
4247 BFD_ASSERT (input_section->id <= htab->top_id);
4248 id_sec = htab->stub_group[input_section->id].link_sec;
4249
4250 if (h != NULL && h->stub_cache != NULL
4251 && h->stub_cache->h == h
4252 && h->stub_cache->id_sec == id_sec
4253 && h->stub_cache->stub_type == stub_type)
4254 {
4255 stub_entry = h->stub_cache;
4256 }
4257 else
4258 {
4259 char *stub_name;
4260
4261 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
4262 if (stub_name == NULL)
4263 return NULL;
4264
4265 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
4266 stub_name, FALSE, FALSE);
4267 if (h != NULL)
4268 h->stub_cache = stub_entry;
4269
4270 free (stub_name);
4271 }
4272
4273 return stub_entry;
4274 }
4275
4276 /* Whether veneers of type STUB_TYPE require to be in a dedicated output
4277 section. */
4278
4279 static bfd_boolean
4280 arm_dedicated_stub_output_section_required (enum elf32_arm_stub_type stub_type)
4281 {
4282 if (stub_type >= max_stub_type)
4283 abort (); /* Should be unreachable. */
4284
4285 switch (stub_type)
4286 {
4287 case arm_stub_cmse_branch_thumb_only:
4288 return TRUE;
4289
4290 default:
4291 return FALSE;
4292 }
4293
4294 abort (); /* Should be unreachable. */
4295 }
4296
4297 /* Required alignment (as a power of 2) for the dedicated section holding
4298 veneers of type STUB_TYPE, or 0 if veneers of this type are interspersed
4299 with input sections. */
4300
4301 static int
4302 arm_dedicated_stub_output_section_required_alignment
4303 (enum elf32_arm_stub_type stub_type)
4304 {
4305 if (stub_type >= max_stub_type)
4306 abort (); /* Should be unreachable. */
4307
4308 switch (stub_type)
4309 {
4310 /* Vectors of Secure Gateway veneers must be aligned on 32byte
4311 boundary. */
4312 case arm_stub_cmse_branch_thumb_only:
4313 return 5;
4314
4315 default:
4316 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4317 return 0;
4318 }
4319
4320 abort (); /* Should be unreachable. */
4321 }
4322
4323 /* Name of the dedicated output section to put veneers of type STUB_TYPE, or
4324 NULL if veneers of this type are interspersed with input sections. */
4325
4326 static const char *
4327 arm_dedicated_stub_output_section_name (enum elf32_arm_stub_type stub_type)
4328 {
4329 if (stub_type >= max_stub_type)
4330 abort (); /* Should be unreachable. */
4331
4332 switch (stub_type)
4333 {
4334 case arm_stub_cmse_branch_thumb_only:
4335 return ".gnu.sgstubs";
4336
4337 default:
4338 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4339 return NULL;
4340 }
4341
4342 abort (); /* Should be unreachable. */
4343 }
4344
4345 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4346 returns the address of the hash table field in HTAB holding a pointer to the
4347 corresponding input section. Otherwise, returns NULL. */
4348
4349 static asection **
4350 arm_dedicated_stub_input_section_ptr (struct elf32_arm_link_hash_table *htab,
4351 enum elf32_arm_stub_type stub_type)
4352 {
4353 if (stub_type >= max_stub_type)
4354 abort (); /* Should be unreachable. */
4355
4356 switch (stub_type)
4357 {
4358 case arm_stub_cmse_branch_thumb_only:
4359 return &htab->cmse_stub_sec;
4360
4361 default:
4362 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4363 return NULL;
4364 }
4365
4366 abort (); /* Should be unreachable. */
4367 }
4368
4369 /* Find or create a stub section to contain a stub of type STUB_TYPE. SECTION
4370 is the section that branch into veneer and can be NULL if stub should go in
4371 a dedicated output section. Returns a pointer to the stub section, and the
4372 section to which the stub section will be attached (in *LINK_SEC_P).
4373 LINK_SEC_P may be NULL. */
4374
4375 static asection *
4376 elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
4377 struct elf32_arm_link_hash_table *htab,
4378 enum elf32_arm_stub_type stub_type)
4379 {
4380 asection *link_sec, *out_sec, **stub_sec_p;
4381 const char *stub_sec_prefix;
4382 bfd_boolean dedicated_output_section =
4383 arm_dedicated_stub_output_section_required (stub_type);
4384 int align;
4385
4386 if (dedicated_output_section)
4387 {
4388 bfd *output_bfd = htab->obfd;
4389 const char *out_sec_name =
4390 arm_dedicated_stub_output_section_name (stub_type);
4391 link_sec = NULL;
4392 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
4393 stub_sec_prefix = out_sec_name;
4394 align = arm_dedicated_stub_output_section_required_alignment (stub_type);
4395 out_sec = bfd_get_section_by_name (output_bfd, out_sec_name);
4396 if (out_sec == NULL)
4397 {
4398 (*_bfd_error_handler) (_("No address assigned to the veneers output "
4399 "section %s"), out_sec_name);
4400 return NULL;
4401 }
4402 }
4403 else
4404 {
4405 BFD_ASSERT (section->id <= htab->top_id);
4406 link_sec = htab->stub_group[section->id].link_sec;
4407 BFD_ASSERT (link_sec != NULL);
4408 stub_sec_p = &htab->stub_group[section->id].stub_sec;
4409 if (*stub_sec_p == NULL)
4410 stub_sec_p = &htab->stub_group[link_sec->id].stub_sec;
4411 stub_sec_prefix = link_sec->name;
4412 out_sec = link_sec->output_section;
4413 align = htab->nacl_p ? 4 : 3;
4414 }
4415
4416 if (*stub_sec_p == NULL)
4417 {
4418 size_t namelen;
4419 bfd_size_type len;
4420 char *s_name;
4421
4422 namelen = strlen (stub_sec_prefix);
4423 len = namelen + sizeof (STUB_SUFFIX);
4424 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
4425 if (s_name == NULL)
4426 return NULL;
4427
4428 memcpy (s_name, stub_sec_prefix, namelen);
4429 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
4430 *stub_sec_p = (*htab->add_stub_section) (s_name, out_sec, link_sec,
4431 align);
4432 if (*stub_sec_p == NULL)
4433 return NULL;
4434
4435 out_sec->flags |= SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE
4436 | SEC_HAS_CONTENTS | SEC_RELOC | SEC_IN_MEMORY
4437 | SEC_KEEP;
4438 }
4439
4440 if (!dedicated_output_section)
4441 htab->stub_group[section->id].stub_sec = *stub_sec_p;
4442
4443 if (link_sec_p)
4444 *link_sec_p = link_sec;
4445
4446 return *stub_sec_p;
4447 }
4448
4449 /* Add a new stub entry to the stub hash. Not all fields of the new
4450 stub entry are initialised. */
4451
4452 static struct elf32_arm_stub_hash_entry *
4453 elf32_arm_add_stub (const char *stub_name, asection *section,
4454 struct elf32_arm_link_hash_table *htab,
4455 enum elf32_arm_stub_type stub_type)
4456 {
4457 asection *link_sec;
4458 asection *stub_sec;
4459 struct elf32_arm_stub_hash_entry *stub_entry;
4460
4461 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab,
4462 stub_type);
4463 if (stub_sec == NULL)
4464 return NULL;
4465
4466 /* Enter this entry into the linker stub hash table. */
4467 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4468 TRUE, FALSE);
4469 if (stub_entry == NULL)
4470 {
4471 if (section == NULL)
4472 section = stub_sec;
4473 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
4474 section->owner,
4475 stub_name);
4476 return NULL;
4477 }
4478
4479 stub_entry->stub_sec = stub_sec;
4480 stub_entry->stub_offset = (bfd_vma) -1;
4481 stub_entry->id_sec = link_sec;
4482
4483 return stub_entry;
4484 }
4485
4486 /* Store an Arm insn into an output section not processed by
4487 elf32_arm_write_section. */
4488
4489 static void
4490 put_arm_insn (struct elf32_arm_link_hash_table * htab,
4491 bfd * output_bfd, bfd_vma val, void * ptr)
4492 {
4493 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4494 bfd_putl32 (val, ptr);
4495 else
4496 bfd_putb32 (val, ptr);
4497 }
4498
4499 /* Store a 16-bit Thumb insn into an output section not processed by
4500 elf32_arm_write_section. */
4501
4502 static void
4503 put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4504 bfd * output_bfd, bfd_vma val, void * ptr)
4505 {
4506 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4507 bfd_putl16 (val, ptr);
4508 else
4509 bfd_putb16 (val, ptr);
4510 }
4511
4512 /* Store a Thumb2 insn into an output section not processed by
4513 elf32_arm_write_section. */
4514
4515 static void
4516 put_thumb2_insn (struct elf32_arm_link_hash_table * htab,
4517 bfd * output_bfd, bfd_vma val, bfd_byte * ptr)
4518 {
4519 /* T2 instructions are 16-bit streamed. */
4520 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4521 {
4522 bfd_putl16 ((val >> 16) & 0xffff, ptr);
4523 bfd_putl16 ((val & 0xffff), ptr + 2);
4524 }
4525 else
4526 {
4527 bfd_putb16 ((val >> 16) & 0xffff, ptr);
4528 bfd_putb16 ((val & 0xffff), ptr + 2);
4529 }
4530 }
4531
4532 /* If it's possible to change R_TYPE to a more efficient access
4533 model, return the new reloc type. */
4534
4535 static unsigned
4536 elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
4537 struct elf_link_hash_entry *h)
4538 {
4539 int is_local = (h == NULL);
4540
4541 if (bfd_link_pic (info)
4542 || (h && h->root.type == bfd_link_hash_undefweak))
4543 return r_type;
4544
4545 /* We do not support relaxations for Old TLS models. */
4546 switch (r_type)
4547 {
4548 case R_ARM_TLS_GOTDESC:
4549 case R_ARM_TLS_CALL:
4550 case R_ARM_THM_TLS_CALL:
4551 case R_ARM_TLS_DESCSEQ:
4552 case R_ARM_THM_TLS_DESCSEQ:
4553 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4554 }
4555
4556 return r_type;
4557 }
4558
4559 static bfd_reloc_status_type elf32_arm_final_link_relocate
4560 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4561 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
4562 const char *, unsigned char, enum arm_st_branch_type,
4563 struct elf_link_hash_entry *, bfd_boolean *, char **);
4564
4565 static unsigned int
4566 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4567 {
4568 switch (stub_type)
4569 {
4570 case arm_stub_a8_veneer_b_cond:
4571 case arm_stub_a8_veneer_b:
4572 case arm_stub_a8_veneer_bl:
4573 return 2;
4574
4575 case arm_stub_long_branch_any_any:
4576 case arm_stub_long_branch_v4t_arm_thumb:
4577 case arm_stub_long_branch_thumb_only:
4578 case arm_stub_long_branch_thumb2_only:
4579 case arm_stub_long_branch_thumb2_only_pure:
4580 case arm_stub_long_branch_v4t_thumb_thumb:
4581 case arm_stub_long_branch_v4t_thumb_arm:
4582 case arm_stub_short_branch_v4t_thumb_arm:
4583 case arm_stub_long_branch_any_arm_pic:
4584 case arm_stub_long_branch_any_thumb_pic:
4585 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4586 case arm_stub_long_branch_v4t_arm_thumb_pic:
4587 case arm_stub_long_branch_v4t_thumb_arm_pic:
4588 case arm_stub_long_branch_thumb_only_pic:
4589 case arm_stub_long_branch_any_tls_pic:
4590 case arm_stub_long_branch_v4t_thumb_tls_pic:
4591 case arm_stub_cmse_branch_thumb_only:
4592 case arm_stub_a8_veneer_blx:
4593 return 4;
4594
4595 case arm_stub_long_branch_arm_nacl:
4596 case arm_stub_long_branch_arm_nacl_pic:
4597 return 16;
4598
4599 default:
4600 abort (); /* Should be unreachable. */
4601 }
4602 }
4603
4604 /* Returns whether stubs of type STUB_TYPE take over the symbol they are
4605 veneering (TRUE) or have their own symbol (FALSE). */
4606
4607 static bfd_boolean
4608 arm_stub_sym_claimed (enum elf32_arm_stub_type stub_type)
4609 {
4610 if (stub_type >= max_stub_type)
4611 abort (); /* Should be unreachable. */
4612
4613 switch (stub_type)
4614 {
4615 case arm_stub_cmse_branch_thumb_only:
4616 return TRUE;
4617
4618 default:
4619 return FALSE;
4620 }
4621
4622 abort (); /* Should be unreachable. */
4623 }
4624
4625 /* Returns the padding needed for the dedicated section used stubs of type
4626 STUB_TYPE. */
4627
4628 static int
4629 arm_dedicated_stub_section_padding (enum elf32_arm_stub_type stub_type)
4630 {
4631 if (stub_type >= max_stub_type)
4632 abort (); /* Should be unreachable. */
4633
4634 switch (stub_type)
4635 {
4636 case arm_stub_cmse_branch_thumb_only:
4637 return 32;
4638
4639 default:
4640 return 0;
4641 }
4642
4643 abort (); /* Should be unreachable. */
4644 }
4645
4646 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4647 returns the address of the hash table field in HTAB holding the offset at
4648 which new veneers should be layed out in the stub section. */
4649
4650 static bfd_vma*
4651 arm_new_stubs_start_offset_ptr (struct elf32_arm_link_hash_table *htab,
4652 enum elf32_arm_stub_type stub_type)
4653 {
4654 switch (stub_type)
4655 {
4656 case arm_stub_cmse_branch_thumb_only:
4657 return &htab->new_cmse_stub_offset;
4658
4659 default:
4660 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4661 return NULL;
4662 }
4663 }
4664
4665 static bfd_boolean
4666 arm_build_one_stub (struct bfd_hash_entry *gen_entry,
4667 void * in_arg)
4668 {
4669 #define MAXRELOCS 3
4670 bfd_boolean removed_sg_veneer;
4671 struct elf32_arm_stub_hash_entry *stub_entry;
4672 struct elf32_arm_link_hash_table *globals;
4673 struct bfd_link_info *info;
4674 asection *stub_sec;
4675 bfd *stub_bfd;
4676 bfd_byte *loc;
4677 bfd_vma sym_value;
4678 int template_size;
4679 int size;
4680 const insn_sequence *template_sequence;
4681 int i;
4682 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
4683 int stub_reloc_offset[MAXRELOCS] = {0, 0};
4684 int nrelocs = 0;
4685 int just_allocated = 0;
4686
4687 /* Massage our args to the form they really have. */
4688 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4689 info = (struct bfd_link_info *) in_arg;
4690
4691 globals = elf32_arm_hash_table (info);
4692 if (globals == NULL)
4693 return FALSE;
4694
4695 stub_sec = stub_entry->stub_sec;
4696
4697 if ((globals->fix_cortex_a8 < 0)
4698 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
4699 /* We have to do less-strictly-aligned fixes last. */
4700 return TRUE;
4701
4702 /* Assign a slot at the end of section if none assigned yet. */
4703 if (stub_entry->stub_offset == (bfd_vma) -1)
4704 {
4705 stub_entry->stub_offset = stub_sec->size;
4706 just_allocated = 1;
4707 }
4708 loc = stub_sec->contents + stub_entry->stub_offset;
4709
4710 stub_bfd = stub_sec->owner;
4711
4712 /* This is the address of the stub destination. */
4713 sym_value = (stub_entry->target_value
4714 + stub_entry->target_section->output_offset
4715 + stub_entry->target_section->output_section->vma);
4716
4717 template_sequence = stub_entry->stub_template;
4718 template_size = stub_entry->stub_template_size;
4719
4720 size = 0;
4721 for (i = 0; i < template_size; i++)
4722 {
4723 switch (template_sequence[i].type)
4724 {
4725 case THUMB16_TYPE:
4726 {
4727 bfd_vma data = (bfd_vma) template_sequence[i].data;
4728 if (template_sequence[i].reloc_addend != 0)
4729 {
4730 /* We've borrowed the reloc_addend field to mean we should
4731 insert a condition code into this (Thumb-1 branch)
4732 instruction. See THUMB16_BCOND_INSN. */
4733 BFD_ASSERT ((data & 0xff00) == 0xd000);
4734 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
4735 }
4736 bfd_put_16 (stub_bfd, data, loc + size);
4737 size += 2;
4738 }
4739 break;
4740
4741 case THUMB32_TYPE:
4742 bfd_put_16 (stub_bfd,
4743 (template_sequence[i].data >> 16) & 0xffff,
4744 loc + size);
4745 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
4746 loc + size + 2);
4747 if (template_sequence[i].r_type != R_ARM_NONE)
4748 {
4749 stub_reloc_idx[nrelocs] = i;
4750 stub_reloc_offset[nrelocs++] = size;
4751 }
4752 size += 4;
4753 break;
4754
4755 case ARM_TYPE:
4756 bfd_put_32 (stub_bfd, template_sequence[i].data,
4757 loc + size);
4758 /* Handle cases where the target is encoded within the
4759 instruction. */
4760 if (template_sequence[i].r_type == R_ARM_JUMP24)
4761 {
4762 stub_reloc_idx[nrelocs] = i;
4763 stub_reloc_offset[nrelocs++] = size;
4764 }
4765 size += 4;
4766 break;
4767
4768 case DATA_TYPE:
4769 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
4770 stub_reloc_idx[nrelocs] = i;
4771 stub_reloc_offset[nrelocs++] = size;
4772 size += 4;
4773 break;
4774
4775 default:
4776 BFD_FAIL ();
4777 return FALSE;
4778 }
4779 }
4780
4781 if (just_allocated)
4782 stub_sec->size += size;
4783
4784 /* Stub size has already been computed in arm_size_one_stub. Check
4785 consistency. */
4786 BFD_ASSERT (size == stub_entry->stub_size);
4787
4788 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
4789 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
4790 sym_value |= 1;
4791
4792 /* Assume non empty slots have at least one and at most MAXRELOCS entries
4793 to relocate in each stub. */
4794 removed_sg_veneer =
4795 (size == 0 && stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
4796 BFD_ASSERT (removed_sg_veneer || (nrelocs != 0 && nrelocs <= MAXRELOCS));
4797
4798 for (i = 0; i < nrelocs; i++)
4799 {
4800 Elf_Internal_Rela rel;
4801 bfd_boolean unresolved_reloc;
4802 char *error_message;
4803 bfd_vma points_to =
4804 sym_value + template_sequence[stub_reloc_idx[i]].reloc_addend;
4805
4806 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4807 rel.r_info = ELF32_R_INFO (0,
4808 template_sequence[stub_reloc_idx[i]].r_type);
4809 rel.r_addend = 0;
4810
4811 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
4812 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
4813 template should refer back to the instruction after the original
4814 branch. We use target_section as Cortex-A8 erratum workaround stubs
4815 are only generated when both source and target are in the same
4816 section. */
4817 points_to = stub_entry->target_section->output_section->vma
4818 + stub_entry->target_section->output_offset
4819 + stub_entry->source_value;
4820
4821 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4822 (template_sequence[stub_reloc_idx[i]].r_type),
4823 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
4824 points_to, info, stub_entry->target_section, "", STT_FUNC,
4825 stub_entry->branch_type,
4826 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
4827 &error_message);
4828 }
4829
4830 return TRUE;
4831 #undef MAXRELOCS
4832 }
4833
4834 /* Calculate the template, template size and instruction size for a stub.
4835 Return value is the instruction size. */
4836
4837 static unsigned int
4838 find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
4839 const insn_sequence **stub_template,
4840 int *stub_template_size)
4841 {
4842 const insn_sequence *template_sequence = NULL;
4843 int template_size = 0, i;
4844 unsigned int size;
4845
4846 template_sequence = stub_definitions[stub_type].template_sequence;
4847 if (stub_template)
4848 *stub_template = template_sequence;
4849
4850 template_size = stub_definitions[stub_type].template_size;
4851 if (stub_template_size)
4852 *stub_template_size = template_size;
4853
4854 size = 0;
4855 for (i = 0; i < template_size; i++)
4856 {
4857 switch (template_sequence[i].type)
4858 {
4859 case THUMB16_TYPE:
4860 size += 2;
4861 break;
4862
4863 case ARM_TYPE:
4864 case THUMB32_TYPE:
4865 case DATA_TYPE:
4866 size += 4;
4867 break;
4868
4869 default:
4870 BFD_FAIL ();
4871 return 0;
4872 }
4873 }
4874
4875 return size;
4876 }
4877
4878 /* As above, but don't actually build the stub. Just bump offset so
4879 we know stub section sizes. */
4880
4881 static bfd_boolean
4882 arm_size_one_stub (struct bfd_hash_entry *gen_entry,
4883 void *in_arg ATTRIBUTE_UNUSED)
4884 {
4885 struct elf32_arm_stub_hash_entry *stub_entry;
4886 const insn_sequence *template_sequence;
4887 int template_size, size;
4888
4889 /* Massage our args to the form they really have. */
4890 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4891
4892 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
4893 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
4894
4895 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
4896 &template_size);
4897
4898 /* Initialized to -1. Null size indicates an empty slot full of zeros. */
4899 if (stub_entry->stub_template_size)
4900 {
4901 stub_entry->stub_size = size;
4902 stub_entry->stub_template = template_sequence;
4903 stub_entry->stub_template_size = template_size;
4904 }
4905
4906 /* Already accounted for. */
4907 if (stub_entry->stub_offset != (bfd_vma) -1)
4908 return TRUE;
4909
4910 size = (size + 7) & ~7;
4911 stub_entry->stub_sec->size += size;
4912
4913 return TRUE;
4914 }
4915
4916 /* External entry points for sizing and building linker stubs. */
4917
4918 /* Set up various things so that we can make a list of input sections
4919 for each output section included in the link. Returns -1 on error,
4920 0 when no stubs will be needed, and 1 on success. */
4921
4922 int
4923 elf32_arm_setup_section_lists (bfd *output_bfd,
4924 struct bfd_link_info *info)
4925 {
4926 bfd *input_bfd;
4927 unsigned int bfd_count;
4928 unsigned int top_id, top_index;
4929 asection *section;
4930 asection **input_list, **list;
4931 bfd_size_type amt;
4932 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4933
4934 if (htab == NULL)
4935 return 0;
4936 if (! is_elf_hash_table (htab))
4937 return 0;
4938
4939 /* Count the number of input BFDs and find the top input section id. */
4940 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
4941 input_bfd != NULL;
4942 input_bfd = input_bfd->link.next)
4943 {
4944 bfd_count += 1;
4945 for (section = input_bfd->sections;
4946 section != NULL;
4947 section = section->next)
4948 {
4949 if (top_id < section->id)
4950 top_id = section->id;
4951 }
4952 }
4953 htab->bfd_count = bfd_count;
4954
4955 amt = sizeof (struct map_stub) * (top_id + 1);
4956 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
4957 if (htab->stub_group == NULL)
4958 return -1;
4959 htab->top_id = top_id;
4960
4961 /* We can't use output_bfd->section_count here to find the top output
4962 section index as some sections may have been removed, and
4963 _bfd_strip_section_from_output doesn't renumber the indices. */
4964 for (section = output_bfd->sections, top_index = 0;
4965 section != NULL;
4966 section = section->next)
4967 {
4968 if (top_index < section->index)
4969 top_index = section->index;
4970 }
4971
4972 htab->top_index = top_index;
4973 amt = sizeof (asection *) * (top_index + 1);
4974 input_list = (asection **) bfd_malloc (amt);
4975 htab->input_list = input_list;
4976 if (input_list == NULL)
4977 return -1;
4978
4979 /* For sections we aren't interested in, mark their entries with a
4980 value we can check later. */
4981 list = input_list + top_index;
4982 do
4983 *list = bfd_abs_section_ptr;
4984 while (list-- != input_list);
4985
4986 for (section = output_bfd->sections;
4987 section != NULL;
4988 section = section->next)
4989 {
4990 if ((section->flags & SEC_CODE) != 0)
4991 input_list[section->index] = NULL;
4992 }
4993
4994 return 1;
4995 }
4996
4997 /* The linker repeatedly calls this function for each input section,
4998 in the order that input sections are linked into output sections.
4999 Build lists of input sections to determine groupings between which
5000 we may insert linker stubs. */
5001
5002 void
5003 elf32_arm_next_input_section (struct bfd_link_info *info,
5004 asection *isec)
5005 {
5006 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5007
5008 if (htab == NULL)
5009 return;
5010
5011 if (isec->output_section->index <= htab->top_index)
5012 {
5013 asection **list = htab->input_list + isec->output_section->index;
5014
5015 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
5016 {
5017 /* Steal the link_sec pointer for our list. */
5018 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
5019 /* This happens to make the list in reverse order,
5020 which we reverse later. */
5021 PREV_SEC (isec) = *list;
5022 *list = isec;
5023 }
5024 }
5025 }
5026
5027 /* See whether we can group stub sections together. Grouping stub
5028 sections may result in fewer stubs. More importantly, we need to
5029 put all .init* and .fini* stubs at the end of the .init or
5030 .fini output sections respectively, because glibc splits the
5031 _init and _fini functions into multiple parts. Putting a stub in
5032 the middle of a function is not a good idea. */
5033
5034 static void
5035 group_sections (struct elf32_arm_link_hash_table *htab,
5036 bfd_size_type stub_group_size,
5037 bfd_boolean stubs_always_after_branch)
5038 {
5039 asection **list = htab->input_list;
5040
5041 do
5042 {
5043 asection *tail = *list;
5044 asection *head;
5045
5046 if (tail == bfd_abs_section_ptr)
5047 continue;
5048
5049 /* Reverse the list: we must avoid placing stubs at the
5050 beginning of the section because the beginning of the text
5051 section may be required for an interrupt vector in bare metal
5052 code. */
5053 #define NEXT_SEC PREV_SEC
5054 head = NULL;
5055 while (tail != NULL)
5056 {
5057 /* Pop from tail. */
5058 asection *item = tail;
5059 tail = PREV_SEC (item);
5060
5061 /* Push on head. */
5062 NEXT_SEC (item) = head;
5063 head = item;
5064 }
5065
5066 while (head != NULL)
5067 {
5068 asection *curr;
5069 asection *next;
5070 bfd_vma stub_group_start = head->output_offset;
5071 bfd_vma end_of_next;
5072
5073 curr = head;
5074 while (NEXT_SEC (curr) != NULL)
5075 {
5076 next = NEXT_SEC (curr);
5077 end_of_next = next->output_offset + next->size;
5078 if (end_of_next - stub_group_start >= stub_group_size)
5079 /* End of NEXT is too far from start, so stop. */
5080 break;
5081 /* Add NEXT to the group. */
5082 curr = next;
5083 }
5084
5085 /* OK, the size from the start to the start of CURR is less
5086 than stub_group_size and thus can be handled by one stub
5087 section. (Or the head section is itself larger than
5088 stub_group_size, in which case we may be toast.)
5089 We should really be keeping track of the total size of
5090 stubs added here, as stubs contribute to the final output
5091 section size. */
5092 do
5093 {
5094 next = NEXT_SEC (head);
5095 /* Set up this stub group. */
5096 htab->stub_group[head->id].link_sec = curr;
5097 }
5098 while (head != curr && (head = next) != NULL);
5099
5100 /* But wait, there's more! Input sections up to stub_group_size
5101 bytes after the stub section can be handled by it too. */
5102 if (!stubs_always_after_branch)
5103 {
5104 stub_group_start = curr->output_offset + curr->size;
5105
5106 while (next != NULL)
5107 {
5108 end_of_next = next->output_offset + next->size;
5109 if (end_of_next - stub_group_start >= stub_group_size)
5110 /* End of NEXT is too far from stubs, so stop. */
5111 break;
5112 /* Add NEXT to the stub group. */
5113 head = next;
5114 next = NEXT_SEC (head);
5115 htab->stub_group[head->id].link_sec = curr;
5116 }
5117 }
5118 head = next;
5119 }
5120 }
5121 while (list++ != htab->input_list + htab->top_index);
5122
5123 free (htab->input_list);
5124 #undef PREV_SEC
5125 #undef NEXT_SEC
5126 }
5127
5128 /* Comparison function for sorting/searching relocations relating to Cortex-A8
5129 erratum fix. */
5130
5131 static int
5132 a8_reloc_compare (const void *a, const void *b)
5133 {
5134 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
5135 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
5136
5137 if (ra->from < rb->from)
5138 return -1;
5139 else if (ra->from > rb->from)
5140 return 1;
5141 else
5142 return 0;
5143 }
5144
5145 static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
5146 const char *, char **);
5147
5148 /* Helper function to scan code for sequences which might trigger the Cortex-A8
5149 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
5150 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
5151 otherwise. */
5152
5153 static bfd_boolean
5154 cortex_a8_erratum_scan (bfd *input_bfd,
5155 struct bfd_link_info *info,
5156 struct a8_erratum_fix **a8_fixes_p,
5157 unsigned int *num_a8_fixes_p,
5158 unsigned int *a8_fix_table_size_p,
5159 struct a8_erratum_reloc *a8_relocs,
5160 unsigned int num_a8_relocs,
5161 unsigned prev_num_a8_fixes,
5162 bfd_boolean *stub_changed_p)
5163 {
5164 asection *section;
5165 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5166 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
5167 unsigned int num_a8_fixes = *num_a8_fixes_p;
5168 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
5169
5170 if (htab == NULL)
5171 return FALSE;
5172
5173 for (section = input_bfd->sections;
5174 section != NULL;
5175 section = section->next)
5176 {
5177 bfd_byte *contents = NULL;
5178 struct _arm_elf_section_data *sec_data;
5179 unsigned int span;
5180 bfd_vma base_vma;
5181
5182 if (elf_section_type (section) != SHT_PROGBITS
5183 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
5184 || (section->flags & SEC_EXCLUDE) != 0
5185 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
5186 || (section->output_section == bfd_abs_section_ptr))
5187 continue;
5188
5189 base_vma = section->output_section->vma + section->output_offset;
5190
5191 if (elf_section_data (section)->this_hdr.contents != NULL)
5192 contents = elf_section_data (section)->this_hdr.contents;
5193 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
5194 return TRUE;
5195
5196 sec_data = elf32_arm_section_data (section);
5197
5198 for (span = 0; span < sec_data->mapcount; span++)
5199 {
5200 unsigned int span_start = sec_data->map[span].vma;
5201 unsigned int span_end = (span == sec_data->mapcount - 1)
5202 ? section->size : sec_data->map[span + 1].vma;
5203 unsigned int i;
5204 char span_type = sec_data->map[span].type;
5205 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
5206
5207 if (span_type != 't')
5208 continue;
5209
5210 /* Span is entirely within a single 4KB region: skip scanning. */
5211 if (((base_vma + span_start) & ~0xfff)
5212 == ((base_vma + span_end) & ~0xfff))
5213 continue;
5214
5215 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
5216
5217 * The opcode is BLX.W, BL.W, B.W, Bcc.W
5218 * The branch target is in the same 4KB region as the
5219 first half of the branch.
5220 * The instruction before the branch is a 32-bit
5221 length non-branch instruction. */
5222 for (i = span_start; i < span_end;)
5223 {
5224 unsigned int insn = bfd_getl16 (&contents[i]);
5225 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
5226 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
5227
5228 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
5229 insn_32bit = TRUE;
5230
5231 if (insn_32bit)
5232 {
5233 /* Load the rest of the insn (in manual-friendly order). */
5234 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
5235
5236 /* Encoding T4: B<c>.W. */
5237 is_b = (insn & 0xf800d000) == 0xf0009000;
5238 /* Encoding T1: BL<c>.W. */
5239 is_bl = (insn & 0xf800d000) == 0xf000d000;
5240 /* Encoding T2: BLX<c>.W. */
5241 is_blx = (insn & 0xf800d000) == 0xf000c000;
5242 /* Encoding T3: B<c>.W (not permitted in IT block). */
5243 is_bcc = (insn & 0xf800d000) == 0xf0008000
5244 && (insn & 0x07f00000) != 0x03800000;
5245 }
5246
5247 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
5248
5249 if (((base_vma + i) & 0xfff) == 0xffe
5250 && insn_32bit
5251 && is_32bit_branch
5252 && last_was_32bit
5253 && ! last_was_branch)
5254 {
5255 bfd_signed_vma offset = 0;
5256 bfd_boolean force_target_arm = FALSE;
5257 bfd_boolean force_target_thumb = FALSE;
5258 bfd_vma target;
5259 enum elf32_arm_stub_type stub_type = arm_stub_none;
5260 struct a8_erratum_reloc key, *found;
5261 bfd_boolean use_plt = FALSE;
5262
5263 key.from = base_vma + i;
5264 found = (struct a8_erratum_reloc *)
5265 bsearch (&key, a8_relocs, num_a8_relocs,
5266 sizeof (struct a8_erratum_reloc),
5267 &a8_reloc_compare);
5268
5269 if (found)
5270 {
5271 char *error_message = NULL;
5272 struct elf_link_hash_entry *entry;
5273
5274 /* We don't care about the error returned from this
5275 function, only if there is glue or not. */
5276 entry = find_thumb_glue (info, found->sym_name,
5277 &error_message);
5278
5279 if (entry)
5280 found->non_a8_stub = TRUE;
5281
5282 /* Keep a simpler condition, for the sake of clarity. */
5283 if (htab->root.splt != NULL && found->hash != NULL
5284 && found->hash->root.plt.offset != (bfd_vma) -1)
5285 use_plt = TRUE;
5286
5287 if (found->r_type == R_ARM_THM_CALL)
5288 {
5289 if (found->branch_type == ST_BRANCH_TO_ARM
5290 || use_plt)
5291 force_target_arm = TRUE;
5292 else
5293 force_target_thumb = TRUE;
5294 }
5295 }
5296
5297 /* Check if we have an offending branch instruction. */
5298
5299 if (found && found->non_a8_stub)
5300 /* We've already made a stub for this instruction, e.g.
5301 it's a long branch or a Thumb->ARM stub. Assume that
5302 stub will suffice to work around the A8 erratum (see
5303 setting of always_after_branch above). */
5304 ;
5305 else if (is_bcc)
5306 {
5307 offset = (insn & 0x7ff) << 1;
5308 offset |= (insn & 0x3f0000) >> 4;
5309 offset |= (insn & 0x2000) ? 0x40000 : 0;
5310 offset |= (insn & 0x800) ? 0x80000 : 0;
5311 offset |= (insn & 0x4000000) ? 0x100000 : 0;
5312 if (offset & 0x100000)
5313 offset |= ~ ((bfd_signed_vma) 0xfffff);
5314 stub_type = arm_stub_a8_veneer_b_cond;
5315 }
5316 else if (is_b || is_bl || is_blx)
5317 {
5318 int s = (insn & 0x4000000) != 0;
5319 int j1 = (insn & 0x2000) != 0;
5320 int j2 = (insn & 0x800) != 0;
5321 int i1 = !(j1 ^ s);
5322 int i2 = !(j2 ^ s);
5323
5324 offset = (insn & 0x7ff) << 1;
5325 offset |= (insn & 0x3ff0000) >> 4;
5326 offset |= i2 << 22;
5327 offset |= i1 << 23;
5328 offset |= s << 24;
5329 if (offset & 0x1000000)
5330 offset |= ~ ((bfd_signed_vma) 0xffffff);
5331
5332 if (is_blx)
5333 offset &= ~ ((bfd_signed_vma) 3);
5334
5335 stub_type = is_blx ? arm_stub_a8_veneer_blx :
5336 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
5337 }
5338
5339 if (stub_type != arm_stub_none)
5340 {
5341 bfd_vma pc_for_insn = base_vma + i + 4;
5342
5343 /* The original instruction is a BL, but the target is
5344 an ARM instruction. If we were not making a stub,
5345 the BL would have been converted to a BLX. Use the
5346 BLX stub instead in that case. */
5347 if (htab->use_blx && force_target_arm
5348 && stub_type == arm_stub_a8_veneer_bl)
5349 {
5350 stub_type = arm_stub_a8_veneer_blx;
5351 is_blx = TRUE;
5352 is_bl = FALSE;
5353 }
5354 /* Conversely, if the original instruction was
5355 BLX but the target is Thumb mode, use the BL
5356 stub. */
5357 else if (force_target_thumb
5358 && stub_type == arm_stub_a8_veneer_blx)
5359 {
5360 stub_type = arm_stub_a8_veneer_bl;
5361 is_blx = FALSE;
5362 is_bl = TRUE;
5363 }
5364
5365 if (is_blx)
5366 pc_for_insn &= ~ ((bfd_vma) 3);
5367
5368 /* If we found a relocation, use the proper destination,
5369 not the offset in the (unrelocated) instruction.
5370 Note this is always done if we switched the stub type
5371 above. */
5372 if (found)
5373 offset =
5374 (bfd_signed_vma) (found->destination - pc_for_insn);
5375
5376 /* If the stub will use a Thumb-mode branch to a
5377 PLT target, redirect it to the preceding Thumb
5378 entry point. */
5379 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
5380 offset -= PLT_THUMB_STUB_SIZE;
5381
5382 target = pc_for_insn + offset;
5383
5384 /* The BLX stub is ARM-mode code. Adjust the offset to
5385 take the different PC value (+8 instead of +4) into
5386 account. */
5387 if (stub_type == arm_stub_a8_veneer_blx)
5388 offset += 4;
5389
5390 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
5391 {
5392 char *stub_name = NULL;
5393
5394 if (num_a8_fixes == a8_fix_table_size)
5395 {
5396 a8_fix_table_size *= 2;
5397 a8_fixes = (struct a8_erratum_fix *)
5398 bfd_realloc (a8_fixes,
5399 sizeof (struct a8_erratum_fix)
5400 * a8_fix_table_size);
5401 }
5402
5403 if (num_a8_fixes < prev_num_a8_fixes)
5404 {
5405 /* If we're doing a subsequent scan,
5406 check if we've found the same fix as
5407 before, and try and reuse the stub
5408 name. */
5409 stub_name = a8_fixes[num_a8_fixes].stub_name;
5410 if ((a8_fixes[num_a8_fixes].section != section)
5411 || (a8_fixes[num_a8_fixes].offset != i))
5412 {
5413 free (stub_name);
5414 stub_name = NULL;
5415 *stub_changed_p = TRUE;
5416 }
5417 }
5418
5419 if (!stub_name)
5420 {
5421 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
5422 if (stub_name != NULL)
5423 sprintf (stub_name, "%x:%x", section->id, i);
5424 }
5425
5426 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
5427 a8_fixes[num_a8_fixes].section = section;
5428 a8_fixes[num_a8_fixes].offset = i;
5429 a8_fixes[num_a8_fixes].target_offset =
5430 target - base_vma;
5431 a8_fixes[num_a8_fixes].orig_insn = insn;
5432 a8_fixes[num_a8_fixes].stub_name = stub_name;
5433 a8_fixes[num_a8_fixes].stub_type = stub_type;
5434 a8_fixes[num_a8_fixes].branch_type =
5435 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
5436
5437 num_a8_fixes++;
5438 }
5439 }
5440 }
5441
5442 i += insn_32bit ? 4 : 2;
5443 last_was_32bit = insn_32bit;
5444 last_was_branch = is_32bit_branch;
5445 }
5446 }
5447
5448 if (elf_section_data (section)->this_hdr.contents == NULL)
5449 free (contents);
5450 }
5451
5452 *a8_fixes_p = a8_fixes;
5453 *num_a8_fixes_p = num_a8_fixes;
5454 *a8_fix_table_size_p = a8_fix_table_size;
5455
5456 return FALSE;
5457 }
5458
5459 /* Create or update a stub entry depending on whether the stub can already be
5460 found in HTAB. The stub is identified by:
5461 - its type STUB_TYPE
5462 - its source branch (note that several can share the same stub) whose
5463 section and relocation (if any) are given by SECTION and IRELA
5464 respectively
5465 - its target symbol whose input section, hash, name, value and branch type
5466 are given in SYM_SEC, HASH, SYM_NAME, SYM_VALUE and BRANCH_TYPE
5467 respectively
5468
5469 If found, the value of the stub's target symbol is updated from SYM_VALUE
5470 and *NEW_STUB is set to FALSE. Otherwise, *NEW_STUB is set to
5471 TRUE and the stub entry is initialized.
5472
5473 Returns the stub that was created or updated, or NULL if an error
5474 occurred. */
5475
5476 static struct elf32_arm_stub_hash_entry *
5477 elf32_arm_create_stub (struct elf32_arm_link_hash_table *htab,
5478 enum elf32_arm_stub_type stub_type, asection *section,
5479 Elf_Internal_Rela *irela, asection *sym_sec,
5480 struct elf32_arm_link_hash_entry *hash, char *sym_name,
5481 bfd_vma sym_value, enum arm_st_branch_type branch_type,
5482 bfd_boolean *new_stub)
5483 {
5484 const asection *id_sec;
5485 char *stub_name;
5486 struct elf32_arm_stub_hash_entry *stub_entry;
5487 unsigned int r_type;
5488 bfd_boolean sym_claimed = arm_stub_sym_claimed (stub_type);
5489
5490 BFD_ASSERT (stub_type != arm_stub_none);
5491 *new_stub = FALSE;
5492
5493 if (sym_claimed)
5494 stub_name = sym_name;
5495 else
5496 {
5497 BFD_ASSERT (irela);
5498 BFD_ASSERT (section);
5499 BFD_ASSERT (section->id <= htab->top_id);
5500
5501 /* Support for grouping stub sections. */
5502 id_sec = htab->stub_group[section->id].link_sec;
5503
5504 /* Get the name of this stub. */
5505 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash, irela,
5506 stub_type);
5507 if (!stub_name)
5508 return NULL;
5509 }
5510
5511 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, FALSE,
5512 FALSE);
5513 /* The proper stub has already been created, just update its value. */
5514 if (stub_entry != NULL)
5515 {
5516 if (!sym_claimed)
5517 free (stub_name);
5518 stub_entry->target_value = sym_value;
5519 return stub_entry;
5520 }
5521
5522 stub_entry = elf32_arm_add_stub (stub_name, section, htab, stub_type);
5523 if (stub_entry == NULL)
5524 {
5525 if (!sym_claimed)
5526 free (stub_name);
5527 return NULL;
5528 }
5529
5530 stub_entry->target_value = sym_value;
5531 stub_entry->target_section = sym_sec;
5532 stub_entry->stub_type = stub_type;
5533 stub_entry->h = hash;
5534 stub_entry->branch_type = branch_type;
5535
5536 if (sym_claimed)
5537 stub_entry->output_name = sym_name;
5538 else
5539 {
5540 if (sym_name == NULL)
5541 sym_name = "unnamed";
5542 stub_entry->output_name = (char *)
5543 bfd_alloc (htab->stub_bfd, sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5544 + strlen (sym_name));
5545 if (stub_entry->output_name == NULL)
5546 {
5547 free (stub_name);
5548 return NULL;
5549 }
5550
5551 /* For historical reasons, use the existing names for ARM-to-Thumb and
5552 Thumb-to-ARM stubs. */
5553 r_type = ELF32_R_TYPE (irela->r_info);
5554 if ((r_type == (unsigned int) R_ARM_THM_CALL
5555 || r_type == (unsigned int) R_ARM_THM_JUMP24
5556 || r_type == (unsigned int) R_ARM_THM_JUMP19)
5557 && branch_type == ST_BRANCH_TO_ARM)
5558 sprintf (stub_entry->output_name, THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5559 else if ((r_type == (unsigned int) R_ARM_CALL
5560 || r_type == (unsigned int) R_ARM_JUMP24)
5561 && branch_type == ST_BRANCH_TO_THUMB)
5562 sprintf (stub_entry->output_name, ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5563 else
5564 sprintf (stub_entry->output_name, STUB_ENTRY_NAME, sym_name);
5565 }
5566
5567 *new_stub = TRUE;
5568 return stub_entry;
5569 }
5570
5571 /* Scan symbols in INPUT_BFD to identify secure entry functions needing a
5572 gateway veneer to transition from non secure to secure state and create them
5573 accordingly.
5574
5575 "ARMv8-M Security Extensions: Requirements on Development Tools" document
5576 defines the conditions that govern Secure Gateway veneer creation for a
5577 given symbol <SYM> as follows:
5578 - it has function type
5579 - it has non local binding
5580 - a symbol named __acle_se_<SYM> (called special symbol) exists with the
5581 same type, binding and value as <SYM> (called normal symbol).
5582 An entry function can handle secure state transition itself in which case
5583 its special symbol would have a different value from the normal symbol.
5584
5585 OUT_ATTR gives the output attributes, SYM_HASHES the symbol index to hash
5586 entry mapping while HTAB gives the name to hash entry mapping.
5587 *CMSE_STUB_CREATED is increased by the number of secure gateway veneer
5588 created.
5589
5590 The return value gives whether a stub failed to be allocated. */
5591
5592 static bfd_boolean
5593 cmse_scan (bfd *input_bfd, struct elf32_arm_link_hash_table *htab,
5594 obj_attribute *out_attr, struct elf_link_hash_entry **sym_hashes,
5595 int *cmse_stub_created)
5596 {
5597 const struct elf_backend_data *bed;
5598 Elf_Internal_Shdr *symtab_hdr;
5599 unsigned i, j, sym_count, ext_start;
5600 Elf_Internal_Sym *cmse_sym, *local_syms;
5601 struct elf32_arm_link_hash_entry *hash, *cmse_hash = NULL;
5602 enum arm_st_branch_type branch_type;
5603 char *sym_name, *lsym_name;
5604 bfd_vma sym_value;
5605 asection *section;
5606 struct elf32_arm_stub_hash_entry *stub_entry;
5607 bfd_boolean is_v8m, new_stub, cmse_invalid, ret = TRUE;
5608
5609 bed = get_elf_backend_data (input_bfd);
5610 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5611 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
5612 ext_start = symtab_hdr->sh_info;
5613 is_v8m = (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
5614 && out_attr[Tag_CPU_arch_profile].i == 'M');
5615
5616 local_syms = (Elf_Internal_Sym *) symtab_hdr->contents;
5617 if (local_syms == NULL)
5618 local_syms = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5619 symtab_hdr->sh_info, 0, NULL, NULL,
5620 NULL);
5621 if (symtab_hdr->sh_info && local_syms == NULL)
5622 return FALSE;
5623
5624 /* Scan symbols. */
5625 for (i = 0; i < sym_count; i++)
5626 {
5627 cmse_invalid = FALSE;
5628
5629 if (i < ext_start)
5630 {
5631 cmse_sym = &local_syms[i];
5632 /* Not a special symbol. */
5633 if (!ARM_GET_SYM_CMSE_SPCL (cmse_sym->st_target_internal))
5634 continue;
5635 sym_name = bfd_elf_string_from_elf_section (input_bfd,
5636 symtab_hdr->sh_link,
5637 cmse_sym->st_name);
5638 /* Special symbol with local binding. */
5639 cmse_invalid = TRUE;
5640 }
5641 else
5642 {
5643 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
5644 sym_name = (char *) cmse_hash->root.root.root.string;
5645
5646 /* Not a special symbol. */
5647 if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
5648 continue;
5649
5650 /* Special symbol has incorrect binding or type. */
5651 if ((cmse_hash->root.root.type != bfd_link_hash_defined
5652 && cmse_hash->root.root.type != bfd_link_hash_defweak)
5653 || cmse_hash->root.type != STT_FUNC)
5654 cmse_invalid = TRUE;
5655 }
5656
5657 if (!is_v8m)
5658 {
5659 (*_bfd_error_handler) (_("%B: Special symbol `%s' only allowed for "
5660 "ARMv8-M architecture or later."),
5661 input_bfd, sym_name);
5662 is_v8m = TRUE; /* Avoid multiple warning. */
5663 ret = FALSE;
5664 }
5665
5666 if (cmse_invalid)
5667 {
5668 (*_bfd_error_handler) (_("%B: invalid special symbol `%s'."),
5669 input_bfd, sym_name);
5670 (*_bfd_error_handler) (_("It must be a global or weak function "
5671 "symbol."));
5672 ret = FALSE;
5673 if (i < ext_start)
5674 continue;
5675 }
5676
5677 sym_name += strlen (CMSE_PREFIX);
5678 hash = (struct elf32_arm_link_hash_entry *)
5679 elf_link_hash_lookup (&(htab)->root, sym_name, FALSE, FALSE, TRUE);
5680
5681 /* No associated normal symbol or it is neither global nor weak. */
5682 if (!hash
5683 || (hash->root.root.type != bfd_link_hash_defined
5684 && hash->root.root.type != bfd_link_hash_defweak)
5685 || hash->root.type != STT_FUNC)
5686 {
5687 /* Initialize here to avoid warning about use of possibly
5688 uninitialized variable. */
5689 j = 0;
5690
5691 if (!hash)
5692 {
5693 /* Searching for a normal symbol with local binding. */
5694 for (; j < ext_start; j++)
5695 {
5696 lsym_name =
5697 bfd_elf_string_from_elf_section (input_bfd,
5698 symtab_hdr->sh_link,
5699 local_syms[j].st_name);
5700 if (!strcmp (sym_name, lsym_name))
5701 break;
5702 }
5703 }
5704
5705 if (hash || j < ext_start)
5706 {
5707 (*_bfd_error_handler)
5708 (_("%B: invalid standard symbol `%s'."), input_bfd, sym_name);
5709 (*_bfd_error_handler)
5710 (_("It must be a global or weak function symbol."));
5711 }
5712 else
5713 (*_bfd_error_handler)
5714 (_("%B: absent standard symbol `%s'."), input_bfd, sym_name);
5715 ret = FALSE;
5716 if (!hash)
5717 continue;
5718 }
5719
5720 sym_value = hash->root.root.u.def.value;
5721 section = hash->root.root.u.def.section;
5722
5723 if (cmse_hash->root.root.u.def.section != section)
5724 {
5725 (*_bfd_error_handler)
5726 (_("%B: `%s' and its special symbol are in different sections."),
5727 input_bfd, sym_name);
5728 ret = FALSE;
5729 }
5730 if (cmse_hash->root.root.u.def.value != sym_value)
5731 continue; /* Ignore: could be an entry function starting with SG. */
5732
5733 /* If this section is a link-once section that will be discarded, then
5734 don't create any stubs. */
5735 if (section->output_section == NULL)
5736 {
5737 (*_bfd_error_handler)
5738 (_("%B: entry function `%s' not output."), input_bfd, sym_name);
5739 continue;
5740 }
5741
5742 if (hash->root.size == 0)
5743 {
5744 (*_bfd_error_handler)
5745 (_("%B: entry function `%s' is empty."), input_bfd, sym_name);
5746 ret = FALSE;
5747 }
5748
5749 if (!ret)
5750 continue;
5751 branch_type = ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
5752 stub_entry
5753 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
5754 NULL, NULL, section, hash, sym_name,
5755 sym_value, branch_type, &new_stub);
5756
5757 if (stub_entry == NULL)
5758 ret = FALSE;
5759 else
5760 {
5761 BFD_ASSERT (new_stub);
5762 (*cmse_stub_created)++;
5763 }
5764 }
5765
5766 if (!symtab_hdr->contents)
5767 free (local_syms);
5768 return ret;
5769 }
5770
5771 /* Return TRUE iff a symbol identified by its linker HASH entry is a secure
5772 code entry function, ie can be called from non secure code without using a
5773 veneer. */
5774
5775 static bfd_boolean
5776 cmse_entry_fct_p (struct elf32_arm_link_hash_entry *hash)
5777 {
5778 uint32_t first_insn;
5779 asection *section;
5780 file_ptr offset;
5781 bfd *abfd;
5782
5783 /* Defined symbol of function type. */
5784 if (hash->root.root.type != bfd_link_hash_defined
5785 && hash->root.root.type != bfd_link_hash_defweak)
5786 return FALSE;
5787 if (hash->root.type != STT_FUNC)
5788 return FALSE;
5789
5790 /* Read first instruction. */
5791 section = hash->root.root.u.def.section;
5792 abfd = section->owner;
5793 offset = hash->root.root.u.def.value - section->vma;
5794 if (!bfd_get_section_contents (abfd, section, &first_insn, offset,
5795 sizeof (first_insn)))
5796 return FALSE;
5797
5798 /* Start by SG instruction. */
5799 return first_insn == 0xe97fe97f;
5800 }
5801
5802 /* Output the name (in symbol table) of the veneer GEN_ENTRY if it is a new
5803 secure gateway veneers (ie. the veneers was not in the input import library)
5804 and there is no output import library (GEN_INFO->out_implib_bfd is NULL. */
5805
5806 static bfd_boolean
5807 arm_list_new_cmse_stub (struct bfd_hash_entry *gen_entry, void *gen_info)
5808 {
5809 struct elf32_arm_stub_hash_entry *stub_entry;
5810 struct bfd_link_info *info;
5811
5812 /* Massage our args to the form they really have. */
5813 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
5814 info = (struct bfd_link_info *) gen_info;
5815
5816 if (info->out_implib_bfd)
5817 return TRUE;
5818
5819 if (stub_entry->stub_type != arm_stub_cmse_branch_thumb_only)
5820 return TRUE;
5821
5822 if (stub_entry->stub_offset == (bfd_vma) -1)
5823 (*_bfd_error_handler) (" %s", stub_entry->output_name);
5824
5825 return TRUE;
5826 }
5827
5828 /* Set offset of each secure gateway veneers so that its address remain
5829 identical to the one in the input import library referred by
5830 HTAB->in_implib_bfd. A warning is issued for veneers that disappeared
5831 (present in input import library but absent from the executable being
5832 linked) or if new veneers appeared and there is no output import library
5833 (INFO->out_implib_bfd is NULL and *CMSE_STUB_CREATED is bigger than the
5834 number of secure gateway veneers found in the input import library.
5835
5836 The function returns whether an error occurred. If no error occurred,
5837 *CMSE_STUB_CREATED gives the number of SG veneers created by both cmse_scan
5838 and this function and HTAB->new_cmse_stub_offset is set to the biggest
5839 veneer observed set for new veneers to be layed out after. */
5840
5841 static bfd_boolean
5842 set_cmse_veneer_addr_from_implib (struct bfd_link_info *info,
5843 struct elf32_arm_link_hash_table *htab,
5844 int *cmse_stub_created)
5845 {
5846 long symsize;
5847 char *sym_name;
5848 flagword flags;
5849 long i, symcount;
5850 bfd *in_implib_bfd;
5851 asection *stub_out_sec;
5852 bfd_boolean ret = TRUE;
5853 Elf_Internal_Sym *intsym;
5854 const char *out_sec_name;
5855 bfd_size_type cmse_stub_size;
5856 asymbol **sympp = NULL, *sym;
5857 struct elf32_arm_link_hash_entry *hash;
5858 const insn_sequence *cmse_stub_template;
5859 struct elf32_arm_stub_hash_entry *stub_entry;
5860 int cmse_stub_template_size, new_cmse_stubs_created = *cmse_stub_created;
5861 bfd_vma veneer_value, stub_offset, next_cmse_stub_offset;
5862 bfd_vma cmse_stub_array_start = (bfd_vma) -1, cmse_stub_sec_vma = 0;
5863
5864 /* No input secure gateway import library. */
5865 if (!htab->in_implib_bfd)
5866 return TRUE;
5867
5868 in_implib_bfd = htab->in_implib_bfd;
5869 if (!htab->cmse_implib)
5870 {
5871 (*_bfd_error_handler) (_("%B: --in-implib only supported for Secure "
5872 "Gateway import libraries."), in_implib_bfd);
5873 return FALSE;
5874 }
5875
5876 /* Get symbol table size. */
5877 symsize = bfd_get_symtab_upper_bound (in_implib_bfd);
5878 if (symsize < 0)
5879 return FALSE;
5880
5881 /* Read in the input secure gateway import library's symbol table. */
5882 sympp = (asymbol **) xmalloc (symsize);
5883 symcount = bfd_canonicalize_symtab (in_implib_bfd, sympp);
5884 if (symcount < 0)
5885 {
5886 ret = FALSE;
5887 goto free_sym_buf;
5888 }
5889
5890 htab->new_cmse_stub_offset = 0;
5891 cmse_stub_size =
5892 find_stub_size_and_template (arm_stub_cmse_branch_thumb_only,
5893 &cmse_stub_template,
5894 &cmse_stub_template_size);
5895 out_sec_name =
5896 arm_dedicated_stub_output_section_name (arm_stub_cmse_branch_thumb_only);
5897 stub_out_sec =
5898 bfd_get_section_by_name (htab->obfd, out_sec_name);
5899 if (stub_out_sec != NULL)
5900 cmse_stub_sec_vma = stub_out_sec->vma;
5901
5902 /* Set addresses of veneers mentionned in input secure gateway import
5903 library's symbol table. */
5904 for (i = 0; i < symcount; i++)
5905 {
5906 sym = sympp[i];
5907 flags = sym->flags;
5908 sym_name = (char *) bfd_asymbol_name (sym);
5909 intsym = &((elf_symbol_type *) sym)->internal_elf_sym;
5910
5911 if (sym->section != bfd_abs_section_ptr
5912 || !(flags & (BSF_GLOBAL | BSF_WEAK))
5913 || (flags & BSF_FUNCTION) != BSF_FUNCTION
5914 || (ARM_GET_SYM_BRANCH_TYPE (intsym->st_target_internal)
5915 != ST_BRANCH_TO_THUMB))
5916 {
5917 (*_bfd_error_handler) (_("%B: invalid import library entry: `%s'."),
5918 in_implib_bfd, sym_name);
5919 (*_bfd_error_handler) (_("Symbol should be absolute, global and "
5920 "refer to Thumb functions."));
5921 ret = FALSE;
5922 continue;
5923 }
5924
5925 veneer_value = bfd_asymbol_value (sym);
5926 stub_offset = veneer_value - cmse_stub_sec_vma;
5927 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, sym_name,
5928 FALSE, FALSE);
5929 hash = (struct elf32_arm_link_hash_entry *)
5930 elf_link_hash_lookup (&(htab)->root, sym_name, FALSE, FALSE, TRUE);
5931
5932 /* Stub entry should have been created by cmse_scan or the symbol be of
5933 a secure function callable from non secure code. */
5934 if (!stub_entry && !hash)
5935 {
5936 bfd_boolean new_stub;
5937
5938 (*_bfd_error_handler)
5939 (_("Entry function `%s' disappeared from secure code."), sym_name);
5940 hash = (struct elf32_arm_link_hash_entry *)
5941 elf_link_hash_lookup (&(htab)->root, sym_name, TRUE, TRUE, TRUE);
5942 stub_entry
5943 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
5944 NULL, NULL, bfd_abs_section_ptr, hash,
5945 sym_name, veneer_value,
5946 ST_BRANCH_TO_THUMB, &new_stub);
5947 if (stub_entry == NULL)
5948 ret = FALSE;
5949 else
5950 {
5951 BFD_ASSERT (new_stub);
5952 new_cmse_stubs_created++;
5953 (*cmse_stub_created)++;
5954 }
5955 stub_entry->stub_template_size = stub_entry->stub_size = 0;
5956 stub_entry->stub_offset = stub_offset;
5957 }
5958 /* Symbol found is not callable from non secure code. */
5959 else if (!stub_entry)
5960 {
5961 if (!cmse_entry_fct_p (hash))
5962 {
5963 (*_bfd_error_handler) (_("`%s' refers to a non entry function."),
5964 sym_name);
5965 ret = FALSE;
5966 }
5967 continue;
5968 }
5969 else
5970 {
5971 /* Only stubs for SG veneers should have been created. */
5972 BFD_ASSERT (stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
5973
5974 /* Check visibility hasn't changed. */
5975 if (!!(flags & BSF_GLOBAL)
5976 != (hash->root.root.type == bfd_link_hash_defined))
5977 (*_bfd_error_handler)
5978 (_("%B: visibility of symbol `%s' has changed."), in_implib_bfd,
5979 sym_name);
5980
5981 stub_entry->stub_offset = stub_offset;
5982 }
5983
5984 /* Size should match that of a SG veneer. */
5985 if (intsym->st_size != cmse_stub_size)
5986 {
5987 (*_bfd_error_handler) (_("%B: incorrect size for symbol `%s'."),
5988 in_implib_bfd, sym_name);
5989 ret = FALSE;
5990 }
5991
5992 /* Previous veneer address is before current SG veneer section. */
5993 if (veneer_value < cmse_stub_sec_vma)
5994 {
5995 /* Avoid offset underflow. */
5996 if (stub_entry)
5997 stub_entry->stub_offset = 0;
5998 stub_offset = 0;
5999 ret = FALSE;
6000 }
6001
6002 /* Complain if stub offset not a multiple of stub size. */
6003 if (stub_offset % cmse_stub_size)
6004 {
6005 (*_bfd_error_handler)
6006 (_("Offset of veneer for entry function `%s' not a multiple of "
6007 "its size."), sym_name);
6008 ret = FALSE;
6009 }
6010
6011 if (!ret)
6012 continue;
6013
6014 new_cmse_stubs_created--;
6015 if (veneer_value < cmse_stub_array_start)
6016 cmse_stub_array_start = veneer_value;
6017 next_cmse_stub_offset = stub_offset + ((cmse_stub_size + 7) & ~7);
6018 if (next_cmse_stub_offset > htab->new_cmse_stub_offset)
6019 htab->new_cmse_stub_offset = next_cmse_stub_offset;
6020 }
6021
6022 if (!info->out_implib_bfd && new_cmse_stubs_created != 0)
6023 {
6024 BFD_ASSERT (new_cmse_stubs_created > 0);
6025 (*_bfd_error_handler)
6026 (_("new entry function(s) introduced but no output import library "
6027 "specified:"));
6028 bfd_hash_traverse (&htab->stub_hash_table, arm_list_new_cmse_stub, info);
6029 }
6030
6031 if (cmse_stub_array_start != cmse_stub_sec_vma)
6032 {
6033 (*_bfd_error_handler)
6034 (_("Start address of `%s' is different from previous link."),
6035 out_sec_name);
6036 ret = FALSE;
6037 }
6038
6039 free_sym_buf:
6040 free (sympp);
6041 return ret;
6042 }
6043
6044 /* Determine and set the size of the stub section for a final link.
6045
6046 The basic idea here is to examine all the relocations looking for
6047 PC-relative calls to a target that is unreachable with a "bl"
6048 instruction. */
6049
6050 bfd_boolean
6051 elf32_arm_size_stubs (bfd *output_bfd,
6052 bfd *stub_bfd,
6053 struct bfd_link_info *info,
6054 bfd_signed_vma group_size,
6055 asection * (*add_stub_section) (const char *, asection *,
6056 asection *,
6057 unsigned int),
6058 void (*layout_sections_again) (void))
6059 {
6060 bfd_boolean ret = TRUE;
6061 obj_attribute *out_attr;
6062 int cmse_stub_created = 0;
6063 bfd_size_type stub_group_size;
6064 bfd_boolean m_profile, stubs_always_after_branch, first_veneer_scan = TRUE;
6065 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
6066 struct a8_erratum_fix *a8_fixes = NULL;
6067 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
6068 struct a8_erratum_reloc *a8_relocs = NULL;
6069 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
6070
6071 if (htab == NULL)
6072 return FALSE;
6073
6074 if (htab->fix_cortex_a8)
6075 {
6076 a8_fixes = (struct a8_erratum_fix *)
6077 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
6078 a8_relocs = (struct a8_erratum_reloc *)
6079 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
6080 }
6081
6082 /* Propagate mach to stub bfd, because it may not have been
6083 finalized when we created stub_bfd. */
6084 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
6085 bfd_get_mach (output_bfd));
6086
6087 /* Stash our params away. */
6088 htab->stub_bfd = stub_bfd;
6089 htab->add_stub_section = add_stub_section;
6090 htab->layout_sections_again = layout_sections_again;
6091 stubs_always_after_branch = group_size < 0;
6092
6093 out_attr = elf_known_obj_attributes_proc (output_bfd);
6094 m_profile = out_attr[Tag_CPU_arch_profile].i == 'M';
6095
6096 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
6097 as the first half of a 32-bit branch straddling two 4K pages. This is a
6098 crude way of enforcing that. */
6099 if (htab->fix_cortex_a8)
6100 stubs_always_after_branch = 1;
6101
6102 if (group_size < 0)
6103 stub_group_size = -group_size;
6104 else
6105 stub_group_size = group_size;
6106
6107 if (stub_group_size == 1)
6108 {
6109 /* Default values. */
6110 /* Thumb branch range is +-4MB has to be used as the default
6111 maximum size (a given section can contain both ARM and Thumb
6112 code, so the worst case has to be taken into account).
6113
6114 This value is 24K less than that, which allows for 2025
6115 12-byte stubs. If we exceed that, then we will fail to link.
6116 The user will have to relink with an explicit group size
6117 option. */
6118 stub_group_size = 4170000;
6119 }
6120
6121 group_sections (htab, stub_group_size, stubs_always_after_branch);
6122
6123 /* If we're applying the cortex A8 fix, we need to determine the
6124 program header size now, because we cannot change it later --
6125 that could alter section placements. Notice the A8 erratum fix
6126 ends up requiring the section addresses to remain unchanged
6127 modulo the page size. That's something we cannot represent
6128 inside BFD, and we don't want to force the section alignment to
6129 be the page size. */
6130 if (htab->fix_cortex_a8)
6131 (*htab->layout_sections_again) ();
6132
6133 while (1)
6134 {
6135 bfd *input_bfd;
6136 unsigned int bfd_indx;
6137 asection *stub_sec;
6138 enum elf32_arm_stub_type stub_type;
6139 bfd_boolean stub_changed = FALSE;
6140 unsigned prev_num_a8_fixes = num_a8_fixes;
6141
6142 num_a8_fixes = 0;
6143 for (input_bfd = info->input_bfds, bfd_indx = 0;
6144 input_bfd != NULL;
6145 input_bfd = input_bfd->link.next, bfd_indx++)
6146 {
6147 Elf_Internal_Shdr *symtab_hdr;
6148 asection *section;
6149 Elf_Internal_Sym *local_syms = NULL;
6150
6151 if (!is_arm_elf (input_bfd))
6152 continue;
6153
6154 num_a8_relocs = 0;
6155
6156 /* We'll need the symbol table in a second. */
6157 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
6158 if (symtab_hdr->sh_info == 0)
6159 continue;
6160
6161 /* Limit scan of symbols to object file whose profile is
6162 Microcontroller to not hinder performance in the general case. */
6163 if (m_profile && first_veneer_scan)
6164 {
6165 struct elf_link_hash_entry **sym_hashes;
6166
6167 sym_hashes = elf_sym_hashes (input_bfd);
6168 if (!cmse_scan (input_bfd, htab, out_attr, sym_hashes,
6169 &cmse_stub_created))
6170 goto error_ret_free_local;
6171
6172 if (cmse_stub_created != 0)
6173 stub_changed = TRUE;
6174 }
6175
6176 /* Walk over each section attached to the input bfd. */
6177 for (section = input_bfd->sections;
6178 section != NULL;
6179 section = section->next)
6180 {
6181 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
6182
6183 /* If there aren't any relocs, then there's nothing more
6184 to do. */
6185 if ((section->flags & SEC_RELOC) == 0
6186 || section->reloc_count == 0
6187 || (section->flags & SEC_CODE) == 0)
6188 continue;
6189
6190 /* If this section is a link-once section that will be
6191 discarded, then don't create any stubs. */
6192 if (section->output_section == NULL
6193 || section->output_section->owner != output_bfd)
6194 continue;
6195
6196 /* Get the relocs. */
6197 internal_relocs
6198 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
6199 NULL, info->keep_memory);
6200 if (internal_relocs == NULL)
6201 goto error_ret_free_local;
6202
6203 /* Now examine each relocation. */
6204 irela = internal_relocs;
6205 irelaend = irela + section->reloc_count;
6206 for (; irela < irelaend; irela++)
6207 {
6208 unsigned int r_type, r_indx;
6209 asection *sym_sec;
6210 bfd_vma sym_value;
6211 bfd_vma destination;
6212 struct elf32_arm_link_hash_entry *hash;
6213 const char *sym_name;
6214 unsigned char st_type;
6215 enum arm_st_branch_type branch_type;
6216 bfd_boolean created_stub = FALSE;
6217
6218 r_type = ELF32_R_TYPE (irela->r_info);
6219 r_indx = ELF32_R_SYM (irela->r_info);
6220
6221 if (r_type >= (unsigned int) R_ARM_max)
6222 {
6223 bfd_set_error (bfd_error_bad_value);
6224 error_ret_free_internal:
6225 if (elf_section_data (section)->relocs == NULL)
6226 free (internal_relocs);
6227 /* Fall through. */
6228 error_ret_free_local:
6229 if (local_syms != NULL
6230 && (symtab_hdr->contents
6231 != (unsigned char *) local_syms))
6232 free (local_syms);
6233 return FALSE;
6234 }
6235
6236 hash = NULL;
6237 if (r_indx >= symtab_hdr->sh_info)
6238 hash = elf32_arm_hash_entry
6239 (elf_sym_hashes (input_bfd)
6240 [r_indx - symtab_hdr->sh_info]);
6241
6242 /* Only look for stubs on branch instructions, or
6243 non-relaxed TLSCALL */
6244 if ((r_type != (unsigned int) R_ARM_CALL)
6245 && (r_type != (unsigned int) R_ARM_THM_CALL)
6246 && (r_type != (unsigned int) R_ARM_JUMP24)
6247 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
6248 && (r_type != (unsigned int) R_ARM_THM_XPC22)
6249 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
6250 && (r_type != (unsigned int) R_ARM_PLT32)
6251 && !((r_type == (unsigned int) R_ARM_TLS_CALL
6252 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6253 && r_type == elf32_arm_tls_transition
6254 (info, r_type, &hash->root)
6255 && ((hash ? hash->tls_type
6256 : (elf32_arm_local_got_tls_type
6257 (input_bfd)[r_indx]))
6258 & GOT_TLS_GDESC) != 0))
6259 continue;
6260
6261 /* Now determine the call target, its name, value,
6262 section. */
6263 sym_sec = NULL;
6264 sym_value = 0;
6265 destination = 0;
6266 sym_name = NULL;
6267
6268 if (r_type == (unsigned int) R_ARM_TLS_CALL
6269 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6270 {
6271 /* A non-relaxed TLS call. The target is the
6272 plt-resident trampoline and nothing to do
6273 with the symbol. */
6274 BFD_ASSERT (htab->tls_trampoline > 0);
6275 sym_sec = htab->root.splt;
6276 sym_value = htab->tls_trampoline;
6277 hash = 0;
6278 st_type = STT_FUNC;
6279 branch_type = ST_BRANCH_TO_ARM;
6280 }
6281 else if (!hash)
6282 {
6283 /* It's a local symbol. */
6284 Elf_Internal_Sym *sym;
6285
6286 if (local_syms == NULL)
6287 {
6288 local_syms
6289 = (Elf_Internal_Sym *) symtab_hdr->contents;
6290 if (local_syms == NULL)
6291 local_syms
6292 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
6293 symtab_hdr->sh_info, 0,
6294 NULL, NULL, NULL);
6295 if (local_syms == NULL)
6296 goto error_ret_free_internal;
6297 }
6298
6299 sym = local_syms + r_indx;
6300 if (sym->st_shndx == SHN_UNDEF)
6301 sym_sec = bfd_und_section_ptr;
6302 else if (sym->st_shndx == SHN_ABS)
6303 sym_sec = bfd_abs_section_ptr;
6304 else if (sym->st_shndx == SHN_COMMON)
6305 sym_sec = bfd_com_section_ptr;
6306 else
6307 sym_sec =
6308 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
6309
6310 if (!sym_sec)
6311 /* This is an undefined symbol. It can never
6312 be resolved. */
6313 continue;
6314
6315 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
6316 sym_value = sym->st_value;
6317 destination = (sym_value + irela->r_addend
6318 + sym_sec->output_offset
6319 + sym_sec->output_section->vma);
6320 st_type = ELF_ST_TYPE (sym->st_info);
6321 branch_type =
6322 ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
6323 sym_name
6324 = bfd_elf_string_from_elf_section (input_bfd,
6325 symtab_hdr->sh_link,
6326 sym->st_name);
6327 }
6328 else
6329 {
6330 /* It's an external symbol. */
6331 while (hash->root.root.type == bfd_link_hash_indirect
6332 || hash->root.root.type == bfd_link_hash_warning)
6333 hash = ((struct elf32_arm_link_hash_entry *)
6334 hash->root.root.u.i.link);
6335
6336 if (hash->root.root.type == bfd_link_hash_defined
6337 || hash->root.root.type == bfd_link_hash_defweak)
6338 {
6339 sym_sec = hash->root.root.u.def.section;
6340 sym_value = hash->root.root.u.def.value;
6341
6342 struct elf32_arm_link_hash_table *globals =
6343 elf32_arm_hash_table (info);
6344
6345 /* For a destination in a shared library,
6346 use the PLT stub as target address to
6347 decide whether a branch stub is
6348 needed. */
6349 if (globals != NULL
6350 && globals->root.splt != NULL
6351 && hash != NULL
6352 && hash->root.plt.offset != (bfd_vma) -1)
6353 {
6354 sym_sec = globals->root.splt;
6355 sym_value = hash->root.plt.offset;
6356 if (sym_sec->output_section != NULL)
6357 destination = (sym_value
6358 + sym_sec->output_offset
6359 + sym_sec->output_section->vma);
6360 }
6361 else if (sym_sec->output_section != NULL)
6362 destination = (sym_value + irela->r_addend
6363 + sym_sec->output_offset
6364 + sym_sec->output_section->vma);
6365 }
6366 else if ((hash->root.root.type == bfd_link_hash_undefined)
6367 || (hash->root.root.type == bfd_link_hash_undefweak))
6368 {
6369 /* For a shared library, use the PLT stub as
6370 target address to decide whether a long
6371 branch stub is needed.
6372 For absolute code, they cannot be handled. */
6373 struct elf32_arm_link_hash_table *globals =
6374 elf32_arm_hash_table (info);
6375
6376 if (globals != NULL
6377 && globals->root.splt != NULL
6378 && hash != NULL
6379 && hash->root.plt.offset != (bfd_vma) -1)
6380 {
6381 sym_sec = globals->root.splt;
6382 sym_value = hash->root.plt.offset;
6383 if (sym_sec->output_section != NULL)
6384 destination = (sym_value
6385 + sym_sec->output_offset
6386 + sym_sec->output_section->vma);
6387 }
6388 else
6389 continue;
6390 }
6391 else
6392 {
6393 bfd_set_error (bfd_error_bad_value);
6394 goto error_ret_free_internal;
6395 }
6396 st_type = hash->root.type;
6397 branch_type =
6398 ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
6399 sym_name = hash->root.root.root.string;
6400 }
6401
6402 do
6403 {
6404 bfd_boolean new_stub;
6405 struct elf32_arm_stub_hash_entry *stub_entry;
6406
6407 /* Determine what (if any) linker stub is needed. */
6408 stub_type = arm_type_of_stub (info, section, irela,
6409 st_type, &branch_type,
6410 hash, destination, sym_sec,
6411 input_bfd, sym_name);
6412 if (stub_type == arm_stub_none)
6413 break;
6414
6415 /* We've either created a stub for this reloc already,
6416 or we are about to. */
6417 stub_entry =
6418 elf32_arm_create_stub (htab, stub_type, section, irela,
6419 sym_sec, hash,
6420 (char *) sym_name, sym_value,
6421 branch_type, &new_stub);
6422
6423 created_stub = stub_entry != NULL;
6424 if (!created_stub)
6425 goto error_ret_free_internal;
6426 else if (!new_stub)
6427 break;
6428 else
6429 stub_changed = TRUE;
6430 }
6431 while (0);
6432
6433 /* Look for relocations which might trigger Cortex-A8
6434 erratum. */
6435 if (htab->fix_cortex_a8
6436 && (r_type == (unsigned int) R_ARM_THM_JUMP24
6437 || r_type == (unsigned int) R_ARM_THM_JUMP19
6438 || r_type == (unsigned int) R_ARM_THM_CALL
6439 || r_type == (unsigned int) R_ARM_THM_XPC22))
6440 {
6441 bfd_vma from = section->output_section->vma
6442 + section->output_offset
6443 + irela->r_offset;
6444
6445 if ((from & 0xfff) == 0xffe)
6446 {
6447 /* Found a candidate. Note we haven't checked the
6448 destination is within 4K here: if we do so (and
6449 don't create an entry in a8_relocs) we can't tell
6450 that a branch should have been relocated when
6451 scanning later. */
6452 if (num_a8_relocs == a8_reloc_table_size)
6453 {
6454 a8_reloc_table_size *= 2;
6455 a8_relocs = (struct a8_erratum_reloc *)
6456 bfd_realloc (a8_relocs,
6457 sizeof (struct a8_erratum_reloc)
6458 * a8_reloc_table_size);
6459 }
6460
6461 a8_relocs[num_a8_relocs].from = from;
6462 a8_relocs[num_a8_relocs].destination = destination;
6463 a8_relocs[num_a8_relocs].r_type = r_type;
6464 a8_relocs[num_a8_relocs].branch_type = branch_type;
6465 a8_relocs[num_a8_relocs].sym_name = sym_name;
6466 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
6467 a8_relocs[num_a8_relocs].hash = hash;
6468
6469 num_a8_relocs++;
6470 }
6471 }
6472 }
6473
6474 /* We're done with the internal relocs, free them. */
6475 if (elf_section_data (section)->relocs == NULL)
6476 free (internal_relocs);
6477 }
6478
6479 if (htab->fix_cortex_a8)
6480 {
6481 /* Sort relocs which might apply to Cortex-A8 erratum. */
6482 qsort (a8_relocs, num_a8_relocs,
6483 sizeof (struct a8_erratum_reloc),
6484 &a8_reloc_compare);
6485
6486 /* Scan for branches which might trigger Cortex-A8 erratum. */
6487 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
6488 &num_a8_fixes, &a8_fix_table_size,
6489 a8_relocs, num_a8_relocs,
6490 prev_num_a8_fixes, &stub_changed)
6491 != 0)
6492 goto error_ret_free_local;
6493 }
6494
6495 if (local_syms != NULL
6496 && symtab_hdr->contents != (unsigned char *) local_syms)
6497 {
6498 if (!info->keep_memory)
6499 free (local_syms);
6500 else
6501 symtab_hdr->contents = (unsigned char *) local_syms;
6502 }
6503 }
6504
6505 if (first_veneer_scan
6506 && !set_cmse_veneer_addr_from_implib (info, htab,
6507 &cmse_stub_created))
6508 ret = FALSE;
6509
6510 if (prev_num_a8_fixes != num_a8_fixes)
6511 stub_changed = TRUE;
6512
6513 if (!stub_changed)
6514 break;
6515
6516 /* OK, we've added some stubs. Find out the new size of the
6517 stub sections. */
6518 for (stub_sec = htab->stub_bfd->sections;
6519 stub_sec != NULL;
6520 stub_sec = stub_sec->next)
6521 {
6522 /* Ignore non-stub sections. */
6523 if (!strstr (stub_sec->name, STUB_SUFFIX))
6524 continue;
6525
6526 stub_sec->size = 0;
6527 }
6528
6529 /* Add new SG veneers after those already in the input import
6530 library. */
6531 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6532 stub_type++)
6533 {
6534 bfd_vma *start_offset_p;
6535 asection **stub_sec_p;
6536
6537 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
6538 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6539 if (start_offset_p == NULL)
6540 continue;
6541
6542 BFD_ASSERT (stub_sec_p != NULL);
6543 if (*stub_sec_p != NULL)
6544 (*stub_sec_p)->size = *start_offset_p;
6545 }
6546
6547 /* Compute stub section size, considering padding. */
6548 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
6549 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6550 stub_type++)
6551 {
6552 int size, padding;
6553 asection **stub_sec_p;
6554
6555 padding = arm_dedicated_stub_section_padding (stub_type);
6556 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6557 /* Skip if no stub input section or no stub section padding
6558 required. */
6559 if ((stub_sec_p != NULL && *stub_sec_p == NULL) || padding == 0)
6560 continue;
6561 /* Stub section padding required but no dedicated section. */
6562 BFD_ASSERT (stub_sec_p);
6563
6564 size = (*stub_sec_p)->size;
6565 size = (size + padding - 1) & ~(padding - 1);
6566 (*stub_sec_p)->size = size;
6567 }
6568
6569 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
6570 if (htab->fix_cortex_a8)
6571 for (i = 0; i < num_a8_fixes; i++)
6572 {
6573 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
6574 a8_fixes[i].section, htab, a8_fixes[i].stub_type);
6575
6576 if (stub_sec == NULL)
6577 return FALSE;
6578
6579 stub_sec->size
6580 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
6581 NULL);
6582 }
6583
6584
6585 /* Ask the linker to do its stuff. */
6586 (*htab->layout_sections_again) ();
6587 first_veneer_scan = FALSE;
6588 }
6589
6590 /* Add stubs for Cortex-A8 erratum fixes now. */
6591 if (htab->fix_cortex_a8)
6592 {
6593 for (i = 0; i < num_a8_fixes; i++)
6594 {
6595 struct elf32_arm_stub_hash_entry *stub_entry;
6596 char *stub_name = a8_fixes[i].stub_name;
6597 asection *section = a8_fixes[i].section;
6598 unsigned int section_id = a8_fixes[i].section->id;
6599 asection *link_sec = htab->stub_group[section_id].link_sec;
6600 asection *stub_sec = htab->stub_group[section_id].stub_sec;
6601 const insn_sequence *template_sequence;
6602 int template_size, size = 0;
6603
6604 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
6605 TRUE, FALSE);
6606 if (stub_entry == NULL)
6607 {
6608 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
6609 section->owner,
6610 stub_name);
6611 return FALSE;
6612 }
6613
6614 stub_entry->stub_sec = stub_sec;
6615 stub_entry->stub_offset = (bfd_vma) -1;
6616 stub_entry->id_sec = link_sec;
6617 stub_entry->stub_type = a8_fixes[i].stub_type;
6618 stub_entry->source_value = a8_fixes[i].offset;
6619 stub_entry->target_section = a8_fixes[i].section;
6620 stub_entry->target_value = a8_fixes[i].target_offset;
6621 stub_entry->orig_insn = a8_fixes[i].orig_insn;
6622 stub_entry->branch_type = a8_fixes[i].branch_type;
6623
6624 size = find_stub_size_and_template (a8_fixes[i].stub_type,
6625 &template_sequence,
6626 &template_size);
6627
6628 stub_entry->stub_size = size;
6629 stub_entry->stub_template = template_sequence;
6630 stub_entry->stub_template_size = template_size;
6631 }
6632
6633 /* Stash the Cortex-A8 erratum fix array for use later in
6634 elf32_arm_write_section(). */
6635 htab->a8_erratum_fixes = a8_fixes;
6636 htab->num_a8_erratum_fixes = num_a8_fixes;
6637 }
6638 else
6639 {
6640 htab->a8_erratum_fixes = NULL;
6641 htab->num_a8_erratum_fixes = 0;
6642 }
6643 return ret;
6644 }
6645
6646 /* Build all the stubs associated with the current output file. The
6647 stubs are kept in a hash table attached to the main linker hash
6648 table. We also set up the .plt entries for statically linked PIC
6649 functions here. This function is called via arm_elf_finish in the
6650 linker. */
6651
6652 bfd_boolean
6653 elf32_arm_build_stubs (struct bfd_link_info *info)
6654 {
6655 asection *stub_sec;
6656 struct bfd_hash_table *table;
6657 enum elf32_arm_stub_type stub_type;
6658 struct elf32_arm_link_hash_table *htab;
6659
6660 htab = elf32_arm_hash_table (info);
6661 if (htab == NULL)
6662 return FALSE;
6663
6664 for (stub_sec = htab->stub_bfd->sections;
6665 stub_sec != NULL;
6666 stub_sec = stub_sec->next)
6667 {
6668 bfd_size_type size;
6669
6670 /* Ignore non-stub sections. */
6671 if (!strstr (stub_sec->name, STUB_SUFFIX))
6672 continue;
6673
6674 /* Allocate memory to hold the linker stubs. Zeroing the stub sections
6675 must at least be done for stub section requiring padding and for SG
6676 veneers to ensure that a non secure code branching to a removed SG
6677 veneer causes an error. */
6678 size = stub_sec->size;
6679 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
6680 if (stub_sec->contents == NULL && size != 0)
6681 return FALSE;
6682
6683 stub_sec->size = 0;
6684 }
6685
6686 /* Add new SG veneers after those already in the input import library. */
6687 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
6688 {
6689 bfd_vma *start_offset_p;
6690 asection **stub_sec_p;
6691
6692 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
6693 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6694 if (start_offset_p == NULL)
6695 continue;
6696
6697 BFD_ASSERT (stub_sec_p != NULL);
6698 if (*stub_sec_p != NULL)
6699 (*stub_sec_p)->size = *start_offset_p;
6700 }
6701
6702 /* Build the stubs as directed by the stub hash table. */
6703 table = &htab->stub_hash_table;
6704 bfd_hash_traverse (table, arm_build_one_stub, info);
6705 if (htab->fix_cortex_a8)
6706 {
6707 /* Place the cortex a8 stubs last. */
6708 htab->fix_cortex_a8 = -1;
6709 bfd_hash_traverse (table, arm_build_one_stub, info);
6710 }
6711
6712 return TRUE;
6713 }
6714
6715 /* Locate the Thumb encoded calling stub for NAME. */
6716
6717 static struct elf_link_hash_entry *
6718 find_thumb_glue (struct bfd_link_info *link_info,
6719 const char *name,
6720 char **error_message)
6721 {
6722 char *tmp_name;
6723 struct elf_link_hash_entry *hash;
6724 struct elf32_arm_link_hash_table *hash_table;
6725
6726 /* We need a pointer to the armelf specific hash table. */
6727 hash_table = elf32_arm_hash_table (link_info);
6728 if (hash_table == NULL)
6729 return NULL;
6730
6731 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
6732 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
6733
6734 BFD_ASSERT (tmp_name);
6735
6736 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
6737
6738 hash = elf_link_hash_lookup
6739 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
6740
6741 if (hash == NULL
6742 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
6743 tmp_name, name) == -1)
6744 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
6745
6746 free (tmp_name);
6747
6748 return hash;
6749 }
6750
6751 /* Locate the ARM encoded calling stub for NAME. */
6752
6753 static struct elf_link_hash_entry *
6754 find_arm_glue (struct bfd_link_info *link_info,
6755 const char *name,
6756 char **error_message)
6757 {
6758 char *tmp_name;
6759 struct elf_link_hash_entry *myh;
6760 struct elf32_arm_link_hash_table *hash_table;
6761
6762 /* We need a pointer to the elfarm specific hash table. */
6763 hash_table = elf32_arm_hash_table (link_info);
6764 if (hash_table == NULL)
6765 return NULL;
6766
6767 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
6768 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
6769
6770 BFD_ASSERT (tmp_name);
6771
6772 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
6773
6774 myh = elf_link_hash_lookup
6775 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
6776
6777 if (myh == NULL
6778 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
6779 tmp_name, name) == -1)
6780 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
6781
6782 free (tmp_name);
6783
6784 return myh;
6785 }
6786
6787 /* ARM->Thumb glue (static images):
6788
6789 .arm
6790 __func_from_arm:
6791 ldr r12, __func_addr
6792 bx r12
6793 __func_addr:
6794 .word func @ behave as if you saw a ARM_32 reloc.
6795
6796 (v5t static images)
6797 .arm
6798 __func_from_arm:
6799 ldr pc, __func_addr
6800 __func_addr:
6801 .word func @ behave as if you saw a ARM_32 reloc.
6802
6803 (relocatable images)
6804 .arm
6805 __func_from_arm:
6806 ldr r12, __func_offset
6807 add r12, r12, pc
6808 bx r12
6809 __func_offset:
6810 .word func - . */
6811
6812 #define ARM2THUMB_STATIC_GLUE_SIZE 12
6813 static const insn32 a2t1_ldr_insn = 0xe59fc000;
6814 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
6815 static const insn32 a2t3_func_addr_insn = 0x00000001;
6816
6817 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
6818 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
6819 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
6820
6821 #define ARM2THUMB_PIC_GLUE_SIZE 16
6822 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
6823 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
6824 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
6825
6826 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
6827
6828 .thumb .thumb
6829 .align 2 .align 2
6830 __func_from_thumb: __func_from_thumb:
6831 bx pc push {r6, lr}
6832 nop ldr r6, __func_addr
6833 .arm mov lr, pc
6834 b func bx r6
6835 .arm
6836 ;; back_to_thumb
6837 ldmia r13! {r6, lr}
6838 bx lr
6839 __func_addr:
6840 .word func */
6841
6842 #define THUMB2ARM_GLUE_SIZE 8
6843 static const insn16 t2a1_bx_pc_insn = 0x4778;
6844 static const insn16 t2a2_noop_insn = 0x46c0;
6845 static const insn32 t2a3_b_insn = 0xea000000;
6846
6847 #define VFP11_ERRATUM_VENEER_SIZE 8
6848 #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16
6849 #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24
6850
6851 #define ARM_BX_VENEER_SIZE 12
6852 static const insn32 armbx1_tst_insn = 0xe3100001;
6853 static const insn32 armbx2_moveq_insn = 0x01a0f000;
6854 static const insn32 armbx3_bx_insn = 0xe12fff10;
6855
6856 #ifndef ELFARM_NABI_C_INCLUDED
6857 static void
6858 arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
6859 {
6860 asection * s;
6861 bfd_byte * contents;
6862
6863 if (size == 0)
6864 {
6865 /* Do not include empty glue sections in the output. */
6866 if (abfd != NULL)
6867 {
6868 s = bfd_get_linker_section (abfd, name);
6869 if (s != NULL)
6870 s->flags |= SEC_EXCLUDE;
6871 }
6872 return;
6873 }
6874
6875 BFD_ASSERT (abfd != NULL);
6876
6877 s = bfd_get_linker_section (abfd, name);
6878 BFD_ASSERT (s != NULL);
6879
6880 contents = (bfd_byte *) bfd_alloc (abfd, size);
6881
6882 BFD_ASSERT (s->size == size);
6883 s->contents = contents;
6884 }
6885
6886 bfd_boolean
6887 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
6888 {
6889 struct elf32_arm_link_hash_table * globals;
6890
6891 globals = elf32_arm_hash_table (info);
6892 BFD_ASSERT (globals != NULL);
6893
6894 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6895 globals->arm_glue_size,
6896 ARM2THUMB_GLUE_SECTION_NAME);
6897
6898 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6899 globals->thumb_glue_size,
6900 THUMB2ARM_GLUE_SECTION_NAME);
6901
6902 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6903 globals->vfp11_erratum_glue_size,
6904 VFP11_ERRATUM_VENEER_SECTION_NAME);
6905
6906 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6907 globals->stm32l4xx_erratum_glue_size,
6908 STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
6909
6910 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6911 globals->bx_glue_size,
6912 ARM_BX_GLUE_SECTION_NAME);
6913
6914 return TRUE;
6915 }
6916
6917 /* Allocate space and symbols for calling a Thumb function from Arm mode.
6918 returns the symbol identifying the stub. */
6919
6920 static struct elf_link_hash_entry *
6921 record_arm_to_thumb_glue (struct bfd_link_info * link_info,
6922 struct elf_link_hash_entry * h)
6923 {
6924 const char * name = h->root.root.string;
6925 asection * s;
6926 char * tmp_name;
6927 struct elf_link_hash_entry * myh;
6928 struct bfd_link_hash_entry * bh;
6929 struct elf32_arm_link_hash_table * globals;
6930 bfd_vma val;
6931 bfd_size_type size;
6932
6933 globals = elf32_arm_hash_table (link_info);
6934 BFD_ASSERT (globals != NULL);
6935 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6936
6937 s = bfd_get_linker_section
6938 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
6939
6940 BFD_ASSERT (s != NULL);
6941
6942 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
6943 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
6944
6945 BFD_ASSERT (tmp_name);
6946
6947 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
6948
6949 myh = elf_link_hash_lookup
6950 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6951
6952 if (myh != NULL)
6953 {
6954 /* We've already seen this guy. */
6955 free (tmp_name);
6956 return myh;
6957 }
6958
6959 /* The only trick here is using hash_table->arm_glue_size as the value.
6960 Even though the section isn't allocated yet, this is where we will be
6961 putting it. The +1 on the value marks that the stub has not been
6962 output yet - not that it is a Thumb function. */
6963 bh = NULL;
6964 val = globals->arm_glue_size + 1;
6965 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
6966 tmp_name, BSF_GLOBAL, s, val,
6967 NULL, TRUE, FALSE, &bh);
6968
6969 myh = (struct elf_link_hash_entry *) bh;
6970 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
6971 myh->forced_local = 1;
6972
6973 free (tmp_name);
6974
6975 if (bfd_link_pic (link_info)
6976 || globals->root.is_relocatable_executable
6977 || globals->pic_veneer)
6978 size = ARM2THUMB_PIC_GLUE_SIZE;
6979 else if (globals->use_blx)
6980 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
6981 else
6982 size = ARM2THUMB_STATIC_GLUE_SIZE;
6983
6984 s->size += size;
6985 globals->arm_glue_size += size;
6986
6987 return myh;
6988 }
6989
6990 /* Allocate space for ARMv4 BX veneers. */
6991
6992 static void
6993 record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
6994 {
6995 asection * s;
6996 struct elf32_arm_link_hash_table *globals;
6997 char *tmp_name;
6998 struct elf_link_hash_entry *myh;
6999 struct bfd_link_hash_entry *bh;
7000 bfd_vma val;
7001
7002 /* BX PC does not need a veneer. */
7003 if (reg == 15)
7004 return;
7005
7006 globals = elf32_arm_hash_table (link_info);
7007 BFD_ASSERT (globals != NULL);
7008 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7009
7010 /* Check if this veneer has already been allocated. */
7011 if (globals->bx_glue_offset[reg])
7012 return;
7013
7014 s = bfd_get_linker_section
7015 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
7016
7017 BFD_ASSERT (s != NULL);
7018
7019 /* Add symbol for veneer. */
7020 tmp_name = (char *)
7021 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
7022
7023 BFD_ASSERT (tmp_name);
7024
7025 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
7026
7027 myh = elf_link_hash_lookup
7028 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
7029
7030 BFD_ASSERT (myh == NULL);
7031
7032 bh = NULL;
7033 val = globals->bx_glue_size;
7034 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
7035 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7036 NULL, TRUE, FALSE, &bh);
7037
7038 myh = (struct elf_link_hash_entry *) bh;
7039 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7040 myh->forced_local = 1;
7041
7042 s->size += ARM_BX_VENEER_SIZE;
7043 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
7044 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
7045 }
7046
7047
7048 /* Add an entry to the code/data map for section SEC. */
7049
7050 static void
7051 elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
7052 {
7053 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
7054 unsigned int newidx;
7055
7056 if (sec_data->map == NULL)
7057 {
7058 sec_data->map = (elf32_arm_section_map *)
7059 bfd_malloc (sizeof (elf32_arm_section_map));
7060 sec_data->mapcount = 0;
7061 sec_data->mapsize = 1;
7062 }
7063
7064 newidx = sec_data->mapcount++;
7065
7066 if (sec_data->mapcount > sec_data->mapsize)
7067 {
7068 sec_data->mapsize *= 2;
7069 sec_data->map = (elf32_arm_section_map *)
7070 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
7071 * sizeof (elf32_arm_section_map));
7072 }
7073
7074 if (sec_data->map)
7075 {
7076 sec_data->map[newidx].vma = vma;
7077 sec_data->map[newidx].type = type;
7078 }
7079 }
7080
7081
7082 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
7083 veneers are handled for now. */
7084
7085 static bfd_vma
7086 record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
7087 elf32_vfp11_erratum_list *branch,
7088 bfd *branch_bfd,
7089 asection *branch_sec,
7090 unsigned int offset)
7091 {
7092 asection *s;
7093 struct elf32_arm_link_hash_table *hash_table;
7094 char *tmp_name;
7095 struct elf_link_hash_entry *myh;
7096 struct bfd_link_hash_entry *bh;
7097 bfd_vma val;
7098 struct _arm_elf_section_data *sec_data;
7099 elf32_vfp11_erratum_list *newerr;
7100
7101 hash_table = elf32_arm_hash_table (link_info);
7102 BFD_ASSERT (hash_table != NULL);
7103 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7104
7105 s = bfd_get_linker_section
7106 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
7107
7108 sec_data = elf32_arm_section_data (s);
7109
7110 BFD_ASSERT (s != NULL);
7111
7112 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7113 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
7114
7115 BFD_ASSERT (tmp_name);
7116
7117 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
7118 hash_table->num_vfp11_fixes);
7119
7120 myh = elf_link_hash_lookup
7121 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7122
7123 BFD_ASSERT (myh == NULL);
7124
7125 bh = NULL;
7126 val = hash_table->vfp11_erratum_glue_size;
7127 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7128 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7129 NULL, TRUE, FALSE, &bh);
7130
7131 myh = (struct elf_link_hash_entry *) bh;
7132 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7133 myh->forced_local = 1;
7134
7135 /* Link veneer back to calling location. */
7136 sec_data->erratumcount += 1;
7137 newerr = (elf32_vfp11_erratum_list *)
7138 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
7139
7140 newerr->type = VFP11_ERRATUM_ARM_VENEER;
7141 newerr->vma = -1;
7142 newerr->u.v.branch = branch;
7143 newerr->u.v.id = hash_table->num_vfp11_fixes;
7144 branch->u.b.veneer = newerr;
7145
7146 newerr->next = sec_data->erratumlist;
7147 sec_data->erratumlist = newerr;
7148
7149 /* A symbol for the return from the veneer. */
7150 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
7151 hash_table->num_vfp11_fixes);
7152
7153 myh = elf_link_hash_lookup
7154 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7155
7156 if (myh != NULL)
7157 abort ();
7158
7159 bh = NULL;
7160 val = offset + 4;
7161 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7162 branch_sec, val, NULL, TRUE, FALSE, &bh);
7163
7164 myh = (struct elf_link_hash_entry *) bh;
7165 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7166 myh->forced_local = 1;
7167
7168 free (tmp_name);
7169
7170 /* Generate a mapping symbol for the veneer section, and explicitly add an
7171 entry for that symbol to the code/data map for the section. */
7172 if (hash_table->vfp11_erratum_glue_size == 0)
7173 {
7174 bh = NULL;
7175 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
7176 ever requires this erratum fix. */
7177 _bfd_generic_link_add_one_symbol (link_info,
7178 hash_table->bfd_of_glue_owner, "$a",
7179 BSF_LOCAL, s, 0, NULL,
7180 TRUE, FALSE, &bh);
7181
7182 myh = (struct elf_link_hash_entry *) bh;
7183 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7184 myh->forced_local = 1;
7185
7186 /* The elf32_arm_init_maps function only cares about symbols from input
7187 BFDs. We must make a note of this generated mapping symbol
7188 ourselves so that code byteswapping works properly in
7189 elf32_arm_write_section. */
7190 elf32_arm_section_map_add (s, 'a', 0);
7191 }
7192
7193 s->size += VFP11_ERRATUM_VENEER_SIZE;
7194 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
7195 hash_table->num_vfp11_fixes++;
7196
7197 /* The offset of the veneer. */
7198 return val;
7199 }
7200
7201 /* Record information about a STM32L4XX STM erratum veneer. Only THUMB-mode
7202 veneers need to be handled because used only in Cortex-M. */
7203
7204 static bfd_vma
7205 record_stm32l4xx_erratum_veneer (struct bfd_link_info *link_info,
7206 elf32_stm32l4xx_erratum_list *branch,
7207 bfd *branch_bfd,
7208 asection *branch_sec,
7209 unsigned int offset,
7210 bfd_size_type veneer_size)
7211 {
7212 asection *s;
7213 struct elf32_arm_link_hash_table *hash_table;
7214 char *tmp_name;
7215 struct elf_link_hash_entry *myh;
7216 struct bfd_link_hash_entry *bh;
7217 bfd_vma val;
7218 struct _arm_elf_section_data *sec_data;
7219 elf32_stm32l4xx_erratum_list *newerr;
7220
7221 hash_table = elf32_arm_hash_table (link_info);
7222 BFD_ASSERT (hash_table != NULL);
7223 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7224
7225 s = bfd_get_linker_section
7226 (hash_table->bfd_of_glue_owner, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7227
7228 BFD_ASSERT (s != NULL);
7229
7230 sec_data = elf32_arm_section_data (s);
7231
7232 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7233 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
7234
7235 BFD_ASSERT (tmp_name);
7236
7237 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
7238 hash_table->num_stm32l4xx_fixes);
7239
7240 myh = elf_link_hash_lookup
7241 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7242
7243 BFD_ASSERT (myh == NULL);
7244
7245 bh = NULL;
7246 val = hash_table->stm32l4xx_erratum_glue_size;
7247 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7248 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7249 NULL, TRUE, FALSE, &bh);
7250
7251 myh = (struct elf_link_hash_entry *) bh;
7252 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7253 myh->forced_local = 1;
7254
7255 /* Link veneer back to calling location. */
7256 sec_data->stm32l4xx_erratumcount += 1;
7257 newerr = (elf32_stm32l4xx_erratum_list *)
7258 bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list));
7259
7260 newerr->type = STM32L4XX_ERRATUM_VENEER;
7261 newerr->vma = -1;
7262 newerr->u.v.branch = branch;
7263 newerr->u.v.id = hash_table->num_stm32l4xx_fixes;
7264 branch->u.b.veneer = newerr;
7265
7266 newerr->next = sec_data->stm32l4xx_erratumlist;
7267 sec_data->stm32l4xx_erratumlist = newerr;
7268
7269 /* A symbol for the return from the veneer. */
7270 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
7271 hash_table->num_stm32l4xx_fixes);
7272
7273 myh = elf_link_hash_lookup
7274 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7275
7276 if (myh != NULL)
7277 abort ();
7278
7279 bh = NULL;
7280 val = offset + 4;
7281 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7282 branch_sec, val, NULL, TRUE, FALSE, &bh);
7283
7284 myh = (struct elf_link_hash_entry *) bh;
7285 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7286 myh->forced_local = 1;
7287
7288 free (tmp_name);
7289
7290 /* Generate a mapping symbol for the veneer section, and explicitly add an
7291 entry for that symbol to the code/data map for the section. */
7292 if (hash_table->stm32l4xx_erratum_glue_size == 0)
7293 {
7294 bh = NULL;
7295 /* Creates a THUMB symbol since there is no other choice. */
7296 _bfd_generic_link_add_one_symbol (link_info,
7297 hash_table->bfd_of_glue_owner, "$t",
7298 BSF_LOCAL, s, 0, NULL,
7299 TRUE, FALSE, &bh);
7300
7301 myh = (struct elf_link_hash_entry *) bh;
7302 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7303 myh->forced_local = 1;
7304
7305 /* The elf32_arm_init_maps function only cares about symbols from input
7306 BFDs. We must make a note of this generated mapping symbol
7307 ourselves so that code byteswapping works properly in
7308 elf32_arm_write_section. */
7309 elf32_arm_section_map_add (s, 't', 0);
7310 }
7311
7312 s->size += veneer_size;
7313 hash_table->stm32l4xx_erratum_glue_size += veneer_size;
7314 hash_table->num_stm32l4xx_fixes++;
7315
7316 /* The offset of the veneer. */
7317 return val;
7318 }
7319
7320 #define ARM_GLUE_SECTION_FLAGS \
7321 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
7322 | SEC_READONLY | SEC_LINKER_CREATED)
7323
7324 /* Create a fake section for use by the ARM backend of the linker. */
7325
7326 static bfd_boolean
7327 arm_make_glue_section (bfd * abfd, const char * name)
7328 {
7329 asection * sec;
7330
7331 sec = bfd_get_linker_section (abfd, name);
7332 if (sec != NULL)
7333 /* Already made. */
7334 return TRUE;
7335
7336 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
7337
7338 if (sec == NULL
7339 || !bfd_set_section_alignment (abfd, sec, 2))
7340 return FALSE;
7341
7342 /* Set the gc mark to prevent the section from being removed by garbage
7343 collection, despite the fact that no relocs refer to this section. */
7344 sec->gc_mark = 1;
7345
7346 return TRUE;
7347 }
7348
7349 /* Set size of .plt entries. This function is called from the
7350 linker scripts in ld/emultempl/{armelf}.em. */
7351
7352 void
7353 bfd_elf32_arm_use_long_plt (void)
7354 {
7355 elf32_arm_use_long_plt_entry = TRUE;
7356 }
7357
7358 /* Add the glue sections to ABFD. This function is called from the
7359 linker scripts in ld/emultempl/{armelf}.em. */
7360
7361 bfd_boolean
7362 bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
7363 struct bfd_link_info *info)
7364 {
7365 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
7366 bfd_boolean dostm32l4xx = globals
7367 && globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE;
7368 bfd_boolean addglue;
7369
7370 /* If we are only performing a partial
7371 link do not bother adding the glue. */
7372 if (bfd_link_relocatable (info))
7373 return TRUE;
7374
7375 addglue = arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
7376 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
7377 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
7378 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
7379
7380 if (!dostm32l4xx)
7381 return addglue;
7382
7383 return addglue
7384 && arm_make_glue_section (abfd, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7385 }
7386
7387 /* Mark output sections of veneers needing a dedicated one with SEC_KEEP. This
7388 ensures they are not marked for deletion by
7389 strip_excluded_output_sections () when veneers are going to be created
7390 later. Not doing so would trigger assert on empty section size in
7391 lang_size_sections_1 (). */
7392
7393 void
7394 bfd_elf32_arm_keep_private_stub_output_sections (struct bfd_link_info *info)
7395 {
7396 enum elf32_arm_stub_type stub_type;
7397
7398 /* If we are only performing a partial
7399 link do not bother adding the glue. */
7400 if (bfd_link_relocatable (info))
7401 return;
7402
7403 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
7404 {
7405 asection *out_sec;
7406 const char *out_sec_name;
7407
7408 if (!arm_dedicated_stub_output_section_required (stub_type))
7409 continue;
7410
7411 out_sec_name = arm_dedicated_stub_output_section_name (stub_type);
7412 out_sec = bfd_get_section_by_name (info->output_bfd, out_sec_name);
7413 if (out_sec != NULL)
7414 out_sec->flags |= SEC_KEEP;
7415 }
7416 }
7417
7418 /* Select a BFD to be used to hold the sections used by the glue code.
7419 This function is called from the linker scripts in ld/emultempl/
7420 {armelf/pe}.em. */
7421
7422 bfd_boolean
7423 bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
7424 {
7425 struct elf32_arm_link_hash_table *globals;
7426
7427 /* If we are only performing a partial link
7428 do not bother getting a bfd to hold the glue. */
7429 if (bfd_link_relocatable (info))
7430 return TRUE;
7431
7432 /* Make sure we don't attach the glue sections to a dynamic object. */
7433 BFD_ASSERT (!(abfd->flags & DYNAMIC));
7434
7435 globals = elf32_arm_hash_table (info);
7436 BFD_ASSERT (globals != NULL);
7437
7438 if (globals->bfd_of_glue_owner != NULL)
7439 return TRUE;
7440
7441 /* Save the bfd for later use. */
7442 globals->bfd_of_glue_owner = abfd;
7443
7444 return TRUE;
7445 }
7446
7447 static void
7448 check_use_blx (struct elf32_arm_link_hash_table *globals)
7449 {
7450 int cpu_arch;
7451
7452 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
7453 Tag_CPU_arch);
7454
7455 if (globals->fix_arm1176)
7456 {
7457 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
7458 globals->use_blx = 1;
7459 }
7460 else
7461 {
7462 if (cpu_arch > TAG_CPU_ARCH_V4T)
7463 globals->use_blx = 1;
7464 }
7465 }
7466
7467 bfd_boolean
7468 bfd_elf32_arm_process_before_allocation (bfd *abfd,
7469 struct bfd_link_info *link_info)
7470 {
7471 Elf_Internal_Shdr *symtab_hdr;
7472 Elf_Internal_Rela *internal_relocs = NULL;
7473 Elf_Internal_Rela *irel, *irelend;
7474 bfd_byte *contents = NULL;
7475
7476 asection *sec;
7477 struct elf32_arm_link_hash_table *globals;
7478
7479 /* If we are only performing a partial link do not bother
7480 to construct any glue. */
7481 if (bfd_link_relocatable (link_info))
7482 return TRUE;
7483
7484 /* Here we have a bfd that is to be included on the link. We have a
7485 hook to do reloc rummaging, before section sizes are nailed down. */
7486 globals = elf32_arm_hash_table (link_info);
7487 BFD_ASSERT (globals != NULL);
7488
7489 check_use_blx (globals);
7490
7491 if (globals->byteswap_code && !bfd_big_endian (abfd))
7492 {
7493 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
7494 abfd);
7495 return FALSE;
7496 }
7497
7498 /* PR 5398: If we have not decided to include any loadable sections in
7499 the output then we will not have a glue owner bfd. This is OK, it
7500 just means that there is nothing else for us to do here. */
7501 if (globals->bfd_of_glue_owner == NULL)
7502 return TRUE;
7503
7504 /* Rummage around all the relocs and map the glue vectors. */
7505 sec = abfd->sections;
7506
7507 if (sec == NULL)
7508 return TRUE;
7509
7510 for (; sec != NULL; sec = sec->next)
7511 {
7512 if (sec->reloc_count == 0)
7513 continue;
7514
7515 if ((sec->flags & SEC_EXCLUDE) != 0)
7516 continue;
7517
7518 symtab_hdr = & elf_symtab_hdr (abfd);
7519
7520 /* Load the relocs. */
7521 internal_relocs
7522 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
7523
7524 if (internal_relocs == NULL)
7525 goto error_return;
7526
7527 irelend = internal_relocs + sec->reloc_count;
7528 for (irel = internal_relocs; irel < irelend; irel++)
7529 {
7530 long r_type;
7531 unsigned long r_index;
7532
7533 struct elf_link_hash_entry *h;
7534
7535 r_type = ELF32_R_TYPE (irel->r_info);
7536 r_index = ELF32_R_SYM (irel->r_info);
7537
7538 /* These are the only relocation types we care about. */
7539 if ( r_type != R_ARM_PC24
7540 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
7541 continue;
7542
7543 /* Get the section contents if we haven't done so already. */
7544 if (contents == NULL)
7545 {
7546 /* Get cached copy if it exists. */
7547 if (elf_section_data (sec)->this_hdr.contents != NULL)
7548 contents = elf_section_data (sec)->this_hdr.contents;
7549 else
7550 {
7551 /* Go get them off disk. */
7552 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
7553 goto error_return;
7554 }
7555 }
7556
7557 if (r_type == R_ARM_V4BX)
7558 {
7559 int reg;
7560
7561 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
7562 record_arm_bx_glue (link_info, reg);
7563 continue;
7564 }
7565
7566 /* If the relocation is not against a symbol it cannot concern us. */
7567 h = NULL;
7568
7569 /* We don't care about local symbols. */
7570 if (r_index < symtab_hdr->sh_info)
7571 continue;
7572
7573 /* This is an external symbol. */
7574 r_index -= symtab_hdr->sh_info;
7575 h = (struct elf_link_hash_entry *)
7576 elf_sym_hashes (abfd)[r_index];
7577
7578 /* If the relocation is against a static symbol it must be within
7579 the current section and so cannot be a cross ARM/Thumb relocation. */
7580 if (h == NULL)
7581 continue;
7582
7583 /* If the call will go through a PLT entry then we do not need
7584 glue. */
7585 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
7586 continue;
7587
7588 switch (r_type)
7589 {
7590 case R_ARM_PC24:
7591 /* This one is a call from arm code. We need to look up
7592 the target of the call. If it is a thumb target, we
7593 insert glue. */
7594 if (ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
7595 == ST_BRANCH_TO_THUMB)
7596 record_arm_to_thumb_glue (link_info, h);
7597 break;
7598
7599 default:
7600 abort ();
7601 }
7602 }
7603
7604 if (contents != NULL
7605 && elf_section_data (sec)->this_hdr.contents != contents)
7606 free (contents);
7607 contents = NULL;
7608
7609 if (internal_relocs != NULL
7610 && elf_section_data (sec)->relocs != internal_relocs)
7611 free (internal_relocs);
7612 internal_relocs = NULL;
7613 }
7614
7615 return TRUE;
7616
7617 error_return:
7618 if (contents != NULL
7619 && elf_section_data (sec)->this_hdr.contents != contents)
7620 free (contents);
7621 if (internal_relocs != NULL
7622 && elf_section_data (sec)->relocs != internal_relocs)
7623 free (internal_relocs);
7624
7625 return FALSE;
7626 }
7627 #endif
7628
7629
7630 /* Initialise maps of ARM/Thumb/data for input BFDs. */
7631
7632 void
7633 bfd_elf32_arm_init_maps (bfd *abfd)
7634 {
7635 Elf_Internal_Sym *isymbuf;
7636 Elf_Internal_Shdr *hdr;
7637 unsigned int i, localsyms;
7638
7639 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
7640 if (! is_arm_elf (abfd))
7641 return;
7642
7643 if ((abfd->flags & DYNAMIC) != 0)
7644 return;
7645
7646 hdr = & elf_symtab_hdr (abfd);
7647 localsyms = hdr->sh_info;
7648
7649 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
7650 should contain the number of local symbols, which should come before any
7651 global symbols. Mapping symbols are always local. */
7652 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
7653 NULL);
7654
7655 /* No internal symbols read? Skip this BFD. */
7656 if (isymbuf == NULL)
7657 return;
7658
7659 for (i = 0; i < localsyms; i++)
7660 {
7661 Elf_Internal_Sym *isym = &isymbuf[i];
7662 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
7663 const char *name;
7664
7665 if (sec != NULL
7666 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
7667 {
7668 name = bfd_elf_string_from_elf_section (abfd,
7669 hdr->sh_link, isym->st_name);
7670
7671 if (bfd_is_arm_special_symbol_name (name,
7672 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
7673 elf32_arm_section_map_add (sec, name[1], isym->st_value);
7674 }
7675 }
7676 }
7677
7678
7679 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
7680 say what they wanted. */
7681
7682 void
7683 bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
7684 {
7685 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7686 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
7687
7688 if (globals == NULL)
7689 return;
7690
7691 if (globals->fix_cortex_a8 == -1)
7692 {
7693 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
7694 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
7695 && (out_attr[Tag_CPU_arch_profile].i == 'A'
7696 || out_attr[Tag_CPU_arch_profile].i == 0))
7697 globals->fix_cortex_a8 = 1;
7698 else
7699 globals->fix_cortex_a8 = 0;
7700 }
7701 }
7702
7703
7704 void
7705 bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
7706 {
7707 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7708 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
7709
7710 if (globals == NULL)
7711 return;
7712 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
7713 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
7714 {
7715 switch (globals->vfp11_fix)
7716 {
7717 case BFD_ARM_VFP11_FIX_DEFAULT:
7718 case BFD_ARM_VFP11_FIX_NONE:
7719 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
7720 break;
7721
7722 default:
7723 /* Give a warning, but do as the user requests anyway. */
7724 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
7725 "workaround is not necessary for target architecture"), obfd);
7726 }
7727 }
7728 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
7729 /* For earlier architectures, we might need the workaround, but do not
7730 enable it by default. If users is running with broken hardware, they
7731 must enable the erratum fix explicitly. */
7732 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
7733 }
7734
7735 void
7736 bfd_elf32_arm_set_stm32l4xx_fix (bfd *obfd, struct bfd_link_info *link_info)
7737 {
7738 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7739 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
7740
7741 if (globals == NULL)
7742 return;
7743
7744 /* We assume only Cortex-M4 may require the fix. */
7745 if (out_attr[Tag_CPU_arch].i != TAG_CPU_ARCH_V7E_M
7746 || out_attr[Tag_CPU_arch_profile].i != 'M')
7747 {
7748 if (globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE)
7749 /* Give a warning, but do as the user requests anyway. */
7750 (*_bfd_error_handler)
7751 (_("%B: warning: selected STM32L4XX erratum "
7752 "workaround is not necessary for target architecture"), obfd);
7753 }
7754 }
7755
7756 enum bfd_arm_vfp11_pipe
7757 {
7758 VFP11_FMAC,
7759 VFP11_LS,
7760 VFP11_DS,
7761 VFP11_BAD
7762 };
7763
7764 /* Return a VFP register number. This is encoded as RX:X for single-precision
7765 registers, or X:RX for double-precision registers, where RX is the group of
7766 four bits in the instruction encoding and X is the single extension bit.
7767 RX and X fields are specified using their lowest (starting) bit. The return
7768 value is:
7769
7770 0...31: single-precision registers s0...s31
7771 32...63: double-precision registers d0...d31.
7772
7773 Although X should be zero for VFP11 (encoding d0...d15 only), we might
7774 encounter VFP3 instructions, so we allow the full range for DP registers. */
7775
7776 static unsigned int
7777 bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
7778 unsigned int x)
7779 {
7780 if (is_double)
7781 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
7782 else
7783 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
7784 }
7785
7786 /* Set bits in *WMASK according to a register number REG as encoded by
7787 bfd_arm_vfp11_regno(). Ignore d16-d31. */
7788
7789 static void
7790 bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
7791 {
7792 if (reg < 32)
7793 *wmask |= 1 << reg;
7794 else if (reg < 48)
7795 *wmask |= 3 << ((reg - 32) * 2);
7796 }
7797
7798 /* Return TRUE if WMASK overwrites anything in REGS. */
7799
7800 static bfd_boolean
7801 bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
7802 {
7803 int i;
7804
7805 for (i = 0; i < numregs; i++)
7806 {
7807 unsigned int reg = regs[i];
7808
7809 if (reg < 32 && (wmask & (1 << reg)) != 0)
7810 return TRUE;
7811
7812 reg -= 32;
7813
7814 if (reg >= 16)
7815 continue;
7816
7817 if ((wmask & (3 << (reg * 2))) != 0)
7818 return TRUE;
7819 }
7820
7821 return FALSE;
7822 }
7823
7824 /* In this function, we're interested in two things: finding input registers
7825 for VFP data-processing instructions, and finding the set of registers which
7826 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
7827 hold the written set, so FLDM etc. are easy to deal with (we're only
7828 interested in 32 SP registers or 16 dp registers, due to the VFP version
7829 implemented by the chip in question). DP registers are marked by setting
7830 both SP registers in the write mask). */
7831
7832 static enum bfd_arm_vfp11_pipe
7833 bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
7834 int *numregs)
7835 {
7836 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
7837 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
7838
7839 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
7840 {
7841 unsigned int pqrs;
7842 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
7843 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
7844
7845 pqrs = ((insn & 0x00800000) >> 20)
7846 | ((insn & 0x00300000) >> 19)
7847 | ((insn & 0x00000040) >> 6);
7848
7849 switch (pqrs)
7850 {
7851 case 0: /* fmac[sd]. */
7852 case 1: /* fnmac[sd]. */
7853 case 2: /* fmsc[sd]. */
7854 case 3: /* fnmsc[sd]. */
7855 vpipe = VFP11_FMAC;
7856 bfd_arm_vfp11_write_mask (destmask, fd);
7857 regs[0] = fd;
7858 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
7859 regs[2] = fm;
7860 *numregs = 3;
7861 break;
7862
7863 case 4: /* fmul[sd]. */
7864 case 5: /* fnmul[sd]. */
7865 case 6: /* fadd[sd]. */
7866 case 7: /* fsub[sd]. */
7867 vpipe = VFP11_FMAC;
7868 goto vfp_binop;
7869
7870 case 8: /* fdiv[sd]. */
7871 vpipe = VFP11_DS;
7872 vfp_binop:
7873 bfd_arm_vfp11_write_mask (destmask, fd);
7874 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
7875 regs[1] = fm;
7876 *numregs = 2;
7877 break;
7878
7879 case 15: /* extended opcode. */
7880 {
7881 unsigned int extn = ((insn >> 15) & 0x1e)
7882 | ((insn >> 7) & 1);
7883
7884 switch (extn)
7885 {
7886 case 0: /* fcpy[sd]. */
7887 case 1: /* fabs[sd]. */
7888 case 2: /* fneg[sd]. */
7889 case 8: /* fcmp[sd]. */
7890 case 9: /* fcmpe[sd]. */
7891 case 10: /* fcmpz[sd]. */
7892 case 11: /* fcmpez[sd]. */
7893 case 16: /* fuito[sd]. */
7894 case 17: /* fsito[sd]. */
7895 case 24: /* ftoui[sd]. */
7896 case 25: /* ftouiz[sd]. */
7897 case 26: /* ftosi[sd]. */
7898 case 27: /* ftosiz[sd]. */
7899 /* These instructions will not bounce due to underflow. */
7900 *numregs = 0;
7901 vpipe = VFP11_FMAC;
7902 break;
7903
7904 case 3: /* fsqrt[sd]. */
7905 /* fsqrt cannot underflow, but it can (perhaps) overwrite
7906 registers to cause the erratum in previous instructions. */
7907 bfd_arm_vfp11_write_mask (destmask, fd);
7908 vpipe = VFP11_DS;
7909 break;
7910
7911 case 15: /* fcvt{ds,sd}. */
7912 {
7913 int rnum = 0;
7914
7915 bfd_arm_vfp11_write_mask (destmask, fd);
7916
7917 /* Only FCVTSD can underflow. */
7918 if ((insn & 0x100) != 0)
7919 regs[rnum++] = fm;
7920
7921 *numregs = rnum;
7922
7923 vpipe = VFP11_FMAC;
7924 }
7925 break;
7926
7927 default:
7928 return VFP11_BAD;
7929 }
7930 }
7931 break;
7932
7933 default:
7934 return VFP11_BAD;
7935 }
7936 }
7937 /* Two-register transfer. */
7938 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
7939 {
7940 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
7941
7942 if ((insn & 0x100000) == 0)
7943 {
7944 if (is_double)
7945 bfd_arm_vfp11_write_mask (destmask, fm);
7946 else
7947 {
7948 bfd_arm_vfp11_write_mask (destmask, fm);
7949 bfd_arm_vfp11_write_mask (destmask, fm + 1);
7950 }
7951 }
7952
7953 vpipe = VFP11_LS;
7954 }
7955 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
7956 {
7957 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
7958 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
7959
7960 switch (puw)
7961 {
7962 case 0: /* Two-reg transfer. We should catch these above. */
7963 abort ();
7964
7965 case 2: /* fldm[sdx]. */
7966 case 3:
7967 case 5:
7968 {
7969 unsigned int i, offset = insn & 0xff;
7970
7971 if (is_double)
7972 offset >>= 1;
7973
7974 for (i = fd; i < fd + offset; i++)
7975 bfd_arm_vfp11_write_mask (destmask, i);
7976 }
7977 break;
7978
7979 case 4: /* fld[sd]. */
7980 case 6:
7981 bfd_arm_vfp11_write_mask (destmask, fd);
7982 break;
7983
7984 default:
7985 return VFP11_BAD;
7986 }
7987
7988 vpipe = VFP11_LS;
7989 }
7990 /* Single-register transfer. Note L==0. */
7991 else if ((insn & 0x0f100e10) == 0x0e000a10)
7992 {
7993 unsigned int opcode = (insn >> 21) & 7;
7994 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
7995
7996 switch (opcode)
7997 {
7998 case 0: /* fmsr/fmdlr. */
7999 case 1: /* fmdhr. */
8000 /* Mark fmdhr and fmdlr as writing to the whole of the DP
8001 destination register. I don't know if this is exactly right,
8002 but it is the conservative choice. */
8003 bfd_arm_vfp11_write_mask (destmask, fn);
8004 break;
8005
8006 case 7: /* fmxr. */
8007 break;
8008 }
8009
8010 vpipe = VFP11_LS;
8011 }
8012
8013 return vpipe;
8014 }
8015
8016
8017 static int elf32_arm_compare_mapping (const void * a, const void * b);
8018
8019
8020 /* Look for potentially-troublesome code sequences which might trigger the
8021 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
8022 (available from ARM) for details of the erratum. A short version is
8023 described in ld.texinfo. */
8024
8025 bfd_boolean
8026 bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
8027 {
8028 asection *sec;
8029 bfd_byte *contents = NULL;
8030 int state = 0;
8031 int regs[3], numregs = 0;
8032 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8033 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
8034
8035 if (globals == NULL)
8036 return FALSE;
8037
8038 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
8039 The states transition as follows:
8040
8041 0 -> 1 (vector) or 0 -> 2 (scalar)
8042 A VFP FMAC-pipeline instruction has been seen. Fill
8043 regs[0]..regs[numregs-1] with its input operands. Remember this
8044 instruction in 'first_fmac'.
8045
8046 1 -> 2
8047 Any instruction, except for a VFP instruction which overwrites
8048 regs[*].
8049
8050 1 -> 3 [ -> 0 ] or
8051 2 -> 3 [ -> 0 ]
8052 A VFP instruction has been seen which overwrites any of regs[*].
8053 We must make a veneer! Reset state to 0 before examining next
8054 instruction.
8055
8056 2 -> 0
8057 If we fail to match anything in state 2, reset to state 0 and reset
8058 the instruction pointer to the instruction after 'first_fmac'.
8059
8060 If the VFP11 vector mode is in use, there must be at least two unrelated
8061 instructions between anti-dependent VFP11 instructions to properly avoid
8062 triggering the erratum, hence the use of the extra state 1. */
8063
8064 /* If we are only performing a partial link do not bother
8065 to construct any glue. */
8066 if (bfd_link_relocatable (link_info))
8067 return TRUE;
8068
8069 /* Skip if this bfd does not correspond to an ELF image. */
8070 if (! is_arm_elf (abfd))
8071 return TRUE;
8072
8073 /* We should have chosen a fix type by the time we get here. */
8074 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
8075
8076 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
8077 return TRUE;
8078
8079 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8080 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8081 return TRUE;
8082
8083 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8084 {
8085 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
8086 struct _arm_elf_section_data *sec_data;
8087
8088 /* If we don't have executable progbits, we're not interested in this
8089 section. Also skip if section is to be excluded. */
8090 if (elf_section_type (sec) != SHT_PROGBITS
8091 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8092 || (sec->flags & SEC_EXCLUDE) != 0
8093 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8094 || sec->output_section == bfd_abs_section_ptr
8095 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
8096 continue;
8097
8098 sec_data = elf32_arm_section_data (sec);
8099
8100 if (sec_data->mapcount == 0)
8101 continue;
8102
8103 if (elf_section_data (sec)->this_hdr.contents != NULL)
8104 contents = elf_section_data (sec)->this_hdr.contents;
8105 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8106 goto error_return;
8107
8108 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8109 elf32_arm_compare_mapping);
8110
8111 for (span = 0; span < sec_data->mapcount; span++)
8112 {
8113 unsigned int span_start = sec_data->map[span].vma;
8114 unsigned int span_end = (span == sec_data->mapcount - 1)
8115 ? sec->size : sec_data->map[span + 1].vma;
8116 char span_type = sec_data->map[span].type;
8117
8118 /* FIXME: Only ARM mode is supported at present. We may need to
8119 support Thumb-2 mode also at some point. */
8120 if (span_type != 'a')
8121 continue;
8122
8123 for (i = span_start; i < span_end;)
8124 {
8125 unsigned int next_i = i + 4;
8126 unsigned int insn = bfd_big_endian (abfd)
8127 ? (contents[i] << 24)
8128 | (contents[i + 1] << 16)
8129 | (contents[i + 2] << 8)
8130 | contents[i + 3]
8131 : (contents[i + 3] << 24)
8132 | (contents[i + 2] << 16)
8133 | (contents[i + 1] << 8)
8134 | contents[i];
8135 unsigned int writemask = 0;
8136 enum bfd_arm_vfp11_pipe vpipe;
8137
8138 switch (state)
8139 {
8140 case 0:
8141 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
8142 &numregs);
8143 /* I'm assuming the VFP11 erratum can trigger with denorm
8144 operands on either the FMAC or the DS pipeline. This might
8145 lead to slightly overenthusiastic veneer insertion. */
8146 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
8147 {
8148 state = use_vector ? 1 : 2;
8149 first_fmac = i;
8150 veneer_of_insn = insn;
8151 }
8152 break;
8153
8154 case 1:
8155 {
8156 int other_regs[3], other_numregs;
8157 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8158 other_regs,
8159 &other_numregs);
8160 if (vpipe != VFP11_BAD
8161 && bfd_arm_vfp11_antidependency (writemask, regs,
8162 numregs))
8163 state = 3;
8164 else
8165 state = 2;
8166 }
8167 break;
8168
8169 case 2:
8170 {
8171 int other_regs[3], other_numregs;
8172 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8173 other_regs,
8174 &other_numregs);
8175 if (vpipe != VFP11_BAD
8176 && bfd_arm_vfp11_antidependency (writemask, regs,
8177 numregs))
8178 state = 3;
8179 else
8180 {
8181 state = 0;
8182 next_i = first_fmac + 4;
8183 }
8184 }
8185 break;
8186
8187 case 3:
8188 abort (); /* Should be unreachable. */
8189 }
8190
8191 if (state == 3)
8192 {
8193 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
8194 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
8195
8196 elf32_arm_section_data (sec)->erratumcount += 1;
8197
8198 newerr->u.b.vfp_insn = veneer_of_insn;
8199
8200 switch (span_type)
8201 {
8202 case 'a':
8203 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
8204 break;
8205
8206 default:
8207 abort ();
8208 }
8209
8210 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
8211 first_fmac);
8212
8213 newerr->vma = -1;
8214
8215 newerr->next = sec_data->erratumlist;
8216 sec_data->erratumlist = newerr;
8217
8218 state = 0;
8219 }
8220
8221 i = next_i;
8222 }
8223 }
8224
8225 if (contents != NULL
8226 && elf_section_data (sec)->this_hdr.contents != contents)
8227 free (contents);
8228 contents = NULL;
8229 }
8230
8231 return TRUE;
8232
8233 error_return:
8234 if (contents != NULL
8235 && elf_section_data (sec)->this_hdr.contents != contents)
8236 free (contents);
8237
8238 return FALSE;
8239 }
8240
8241 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
8242 after sections have been laid out, using specially-named symbols. */
8243
8244 void
8245 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
8246 struct bfd_link_info *link_info)
8247 {
8248 asection *sec;
8249 struct elf32_arm_link_hash_table *globals;
8250 char *tmp_name;
8251
8252 if (bfd_link_relocatable (link_info))
8253 return;
8254
8255 /* Skip if this bfd does not correspond to an ELF image. */
8256 if (! is_arm_elf (abfd))
8257 return;
8258
8259 globals = elf32_arm_hash_table (link_info);
8260 if (globals == NULL)
8261 return;
8262
8263 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8264 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
8265
8266 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8267 {
8268 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8269 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
8270
8271 for (; errnode != NULL; errnode = errnode->next)
8272 {
8273 struct elf_link_hash_entry *myh;
8274 bfd_vma vma;
8275
8276 switch (errnode->type)
8277 {
8278 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
8279 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
8280 /* Find veneer symbol. */
8281 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
8282 errnode->u.b.veneer->u.v.id);
8283
8284 myh = elf_link_hash_lookup
8285 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8286
8287 if (myh == NULL)
8288 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
8289 "`%s'"), abfd, tmp_name);
8290
8291 vma = myh->root.u.def.section->output_section->vma
8292 + myh->root.u.def.section->output_offset
8293 + myh->root.u.def.value;
8294
8295 errnode->u.b.veneer->vma = vma;
8296 break;
8297
8298 case VFP11_ERRATUM_ARM_VENEER:
8299 case VFP11_ERRATUM_THUMB_VENEER:
8300 /* Find return location. */
8301 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
8302 errnode->u.v.id);
8303
8304 myh = elf_link_hash_lookup
8305 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8306
8307 if (myh == NULL)
8308 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
8309 "`%s'"), abfd, tmp_name);
8310
8311 vma = myh->root.u.def.section->output_section->vma
8312 + myh->root.u.def.section->output_offset
8313 + myh->root.u.def.value;
8314
8315 errnode->u.v.branch->vma = vma;
8316 break;
8317
8318 default:
8319 abort ();
8320 }
8321 }
8322 }
8323
8324 free (tmp_name);
8325 }
8326
8327 /* Find virtual-memory addresses for STM32L4XX erratum veneers and
8328 return locations after sections have been laid out, using
8329 specially-named symbols. */
8330
8331 void
8332 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd *abfd,
8333 struct bfd_link_info *link_info)
8334 {
8335 asection *sec;
8336 struct elf32_arm_link_hash_table *globals;
8337 char *tmp_name;
8338
8339 if (bfd_link_relocatable (link_info))
8340 return;
8341
8342 /* Skip if this bfd does not correspond to an ELF image. */
8343 if (! is_arm_elf (abfd))
8344 return;
8345
8346 globals = elf32_arm_hash_table (link_info);
8347 if (globals == NULL)
8348 return;
8349
8350 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8351 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
8352
8353 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8354 {
8355 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8356 elf32_stm32l4xx_erratum_list *errnode = sec_data->stm32l4xx_erratumlist;
8357
8358 for (; errnode != NULL; errnode = errnode->next)
8359 {
8360 struct elf_link_hash_entry *myh;
8361 bfd_vma vma;
8362
8363 switch (errnode->type)
8364 {
8365 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
8366 /* Find veneer symbol. */
8367 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
8368 errnode->u.b.veneer->u.v.id);
8369
8370 myh = elf_link_hash_lookup
8371 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8372
8373 if (myh == NULL)
8374 (*_bfd_error_handler) (_("%B: unable to find STM32L4XX veneer "
8375 "`%s'"), abfd, tmp_name);
8376
8377 vma = myh->root.u.def.section->output_section->vma
8378 + myh->root.u.def.section->output_offset
8379 + myh->root.u.def.value;
8380
8381 errnode->u.b.veneer->vma = vma;
8382 break;
8383
8384 case STM32L4XX_ERRATUM_VENEER:
8385 /* Find return location. */
8386 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
8387 errnode->u.v.id);
8388
8389 myh = elf_link_hash_lookup
8390 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8391
8392 if (myh == NULL)
8393 (*_bfd_error_handler) (_("%B: unable to find STM32L4XX veneer "
8394 "`%s'"), abfd, tmp_name);
8395
8396 vma = myh->root.u.def.section->output_section->vma
8397 + myh->root.u.def.section->output_offset
8398 + myh->root.u.def.value;
8399
8400 errnode->u.v.branch->vma = vma;
8401 break;
8402
8403 default:
8404 abort ();
8405 }
8406 }
8407 }
8408
8409 free (tmp_name);
8410 }
8411
8412 static inline bfd_boolean
8413 is_thumb2_ldmia (const insn32 insn)
8414 {
8415 /* Encoding T2: LDM<c>.W <Rn>{!},<registers>
8416 1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll. */
8417 return (insn & 0xffd02000) == 0xe8900000;
8418 }
8419
8420 static inline bfd_boolean
8421 is_thumb2_ldmdb (const insn32 insn)
8422 {
8423 /* Encoding T1: LDMDB<c> <Rn>{!},<registers>
8424 1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll. */
8425 return (insn & 0xffd02000) == 0xe9100000;
8426 }
8427
8428 static inline bfd_boolean
8429 is_thumb2_vldm (const insn32 insn)
8430 {
8431 /* A6.5 Extension register load or store instruction
8432 A7.7.229
8433 We look for SP 32-bit and DP 64-bit registers.
8434 Encoding T1 VLDM{mode}<c> <Rn>{!}, <list>
8435 <list> is consecutive 64-bit registers
8436 1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii
8437 Encoding T2 VLDM{mode}<c> <Rn>{!}, <list>
8438 <list> is consecutive 32-bit registers
8439 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii
8440 if P==0 && U==1 && W==1 && Rn=1101 VPOP
8441 if PUW=010 || PUW=011 || PUW=101 VLDM. */
8442 return
8443 (((insn & 0xfe100f00) == 0xec100b00) ||
8444 ((insn & 0xfe100f00) == 0xec100a00))
8445 && /* (IA without !). */
8446 (((((insn << 7) >> 28) & 0xd) == 0x4)
8447 /* (IA with !), includes VPOP (when reg number is SP). */
8448 || ((((insn << 7) >> 28) & 0xd) == 0x5)
8449 /* (DB with !). */
8450 || ((((insn << 7) >> 28) & 0xd) == 0x9));
8451 }
8452
8453 /* STM STM32L4XX erratum : This function assumes that it receives an LDM or
8454 VLDM opcode and:
8455 - computes the number and the mode of memory accesses
8456 - decides if the replacement should be done:
8457 . replaces only if > 8-word accesses
8458 . or (testing purposes only) replaces all accesses. */
8459
8460 static bfd_boolean
8461 stm32l4xx_need_create_replacing_stub (const insn32 insn,
8462 bfd_arm_stm32l4xx_fix stm32l4xx_fix)
8463 {
8464 int nb_words = 0;
8465
8466 /* The field encoding the register list is the same for both LDMIA
8467 and LDMDB encodings. */
8468 if (is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn))
8469 nb_words = popcount (insn & 0x0000ffff);
8470 else if (is_thumb2_vldm (insn))
8471 nb_words = (insn & 0xff);
8472
8473 /* DEFAULT mode accounts for the real bug condition situation,
8474 ALL mode inserts stubs for each LDM/VLDM instruction (testing). */
8475 return
8476 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_DEFAULT) ? nb_words > 8 :
8477 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_ALL) ? TRUE : FALSE;
8478 }
8479
8480 /* Look for potentially-troublesome code sequences which might trigger
8481 the STM STM32L4XX erratum. */
8482
8483 bfd_boolean
8484 bfd_elf32_arm_stm32l4xx_erratum_scan (bfd *abfd,
8485 struct bfd_link_info *link_info)
8486 {
8487 asection *sec;
8488 bfd_byte *contents = NULL;
8489 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8490
8491 if (globals == NULL)
8492 return FALSE;
8493
8494 /* If we are only performing a partial link do not bother
8495 to construct any glue. */
8496 if (bfd_link_relocatable (link_info))
8497 return TRUE;
8498
8499 /* Skip if this bfd does not correspond to an ELF image. */
8500 if (! is_arm_elf (abfd))
8501 return TRUE;
8502
8503 if (globals->stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_NONE)
8504 return TRUE;
8505
8506 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8507 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8508 return TRUE;
8509
8510 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8511 {
8512 unsigned int i, span;
8513 struct _arm_elf_section_data *sec_data;
8514
8515 /* If we don't have executable progbits, we're not interested in this
8516 section. Also skip if section is to be excluded. */
8517 if (elf_section_type (sec) != SHT_PROGBITS
8518 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8519 || (sec->flags & SEC_EXCLUDE) != 0
8520 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8521 || sec->output_section == bfd_abs_section_ptr
8522 || strcmp (sec->name, STM32L4XX_ERRATUM_VENEER_SECTION_NAME) == 0)
8523 continue;
8524
8525 sec_data = elf32_arm_section_data (sec);
8526
8527 if (sec_data->mapcount == 0)
8528 continue;
8529
8530 if (elf_section_data (sec)->this_hdr.contents != NULL)
8531 contents = elf_section_data (sec)->this_hdr.contents;
8532 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8533 goto error_return;
8534
8535 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8536 elf32_arm_compare_mapping);
8537
8538 for (span = 0; span < sec_data->mapcount; span++)
8539 {
8540 unsigned int span_start = sec_data->map[span].vma;
8541 unsigned int span_end = (span == sec_data->mapcount - 1)
8542 ? sec->size : sec_data->map[span + 1].vma;
8543 char span_type = sec_data->map[span].type;
8544 int itblock_current_pos = 0;
8545
8546 /* Only Thumb2 mode need be supported with this CM4 specific
8547 code, we should not encounter any arm mode eg span_type
8548 != 'a'. */
8549 if (span_type != 't')
8550 continue;
8551
8552 for (i = span_start; i < span_end;)
8553 {
8554 unsigned int insn = bfd_get_16 (abfd, &contents[i]);
8555 bfd_boolean insn_32bit = FALSE;
8556 bfd_boolean is_ldm = FALSE;
8557 bfd_boolean is_vldm = FALSE;
8558 bfd_boolean is_not_last_in_it_block = FALSE;
8559
8560 /* The first 16-bits of all 32-bit thumb2 instructions start
8561 with opcode[15..13]=0b111 and the encoded op1 can be anything
8562 except opcode[12..11]!=0b00.
8563 See 32-bit Thumb instruction encoding. */
8564 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
8565 insn_32bit = TRUE;
8566
8567 /* Compute the predicate that tells if the instruction
8568 is concerned by the IT block
8569 - Creates an error if there is a ldm that is not
8570 last in the IT block thus cannot be replaced
8571 - Otherwise we can create a branch at the end of the
8572 IT block, it will be controlled naturally by IT
8573 with the proper pseudo-predicate
8574 - So the only interesting predicate is the one that
8575 tells that we are not on the last item of an IT
8576 block. */
8577 if (itblock_current_pos != 0)
8578 is_not_last_in_it_block = !!--itblock_current_pos;
8579
8580 if (insn_32bit)
8581 {
8582 /* Load the rest of the insn (in manual-friendly order). */
8583 insn = (insn << 16) | bfd_get_16 (abfd, &contents[i + 2]);
8584 is_ldm = is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn);
8585 is_vldm = is_thumb2_vldm (insn);
8586
8587 /* Veneers are created for (v)ldm depending on
8588 option flags and memory accesses conditions; but
8589 if the instruction is not the last instruction of
8590 an IT block, we cannot create a jump there, so we
8591 bail out. */
8592 if ((is_ldm || is_vldm) &&
8593 stm32l4xx_need_create_replacing_stub
8594 (insn, globals->stm32l4xx_fix))
8595 {
8596 if (is_not_last_in_it_block)
8597 {
8598 (*_bfd_error_handler)
8599 /* Note - overlong line used here to allow for translation. */
8600 (_("\
8601 %B(%A+0x%lx): error: multiple load detected in non-last IT block instruction : STM32L4XX veneer cannot be generated.\n"
8602 "Use gcc option -mrestrict-it to generate only one instruction per IT block.\n"),
8603 abfd, sec, (long)i);
8604 }
8605 else
8606 {
8607 elf32_stm32l4xx_erratum_list *newerr =
8608 (elf32_stm32l4xx_erratum_list *)
8609 bfd_zmalloc
8610 (sizeof (elf32_stm32l4xx_erratum_list));
8611
8612 elf32_arm_section_data (sec)
8613 ->stm32l4xx_erratumcount += 1;
8614 newerr->u.b.insn = insn;
8615 /* We create only thumb branches. */
8616 newerr->type =
8617 STM32L4XX_ERRATUM_BRANCH_TO_VENEER;
8618 record_stm32l4xx_erratum_veneer
8619 (link_info, newerr, abfd, sec,
8620 i,
8621 is_ldm ?
8622 STM32L4XX_ERRATUM_LDM_VENEER_SIZE:
8623 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
8624 newerr->vma = -1;
8625 newerr->next = sec_data->stm32l4xx_erratumlist;
8626 sec_data->stm32l4xx_erratumlist = newerr;
8627 }
8628 }
8629 }
8630 else
8631 {
8632 /* A7.7.37 IT p208
8633 IT blocks are only encoded in T1
8634 Encoding T1: IT{x{y{z}}} <firstcond>
8635 1 0 1 1 - 1 1 1 1 - firstcond - mask
8636 if mask = '0000' then see 'related encodings'
8637 We don't deal with UNPREDICTABLE, just ignore these.
8638 There can be no nested IT blocks so an IT block
8639 is naturally a new one for which it is worth
8640 computing its size. */
8641 bfd_boolean is_newitblock = ((insn & 0xff00) == 0xbf00) &&
8642 ((insn & 0x000f) != 0x0000);
8643 /* If we have a new IT block we compute its size. */
8644 if (is_newitblock)
8645 {
8646 /* Compute the number of instructions controlled
8647 by the IT block, it will be used to decide
8648 whether we are inside an IT block or not. */
8649 unsigned int mask = insn & 0x000f;
8650 itblock_current_pos = 4 - ctz (mask);
8651 }
8652 }
8653
8654 i += insn_32bit ? 4 : 2;
8655 }
8656 }
8657
8658 if (contents != NULL
8659 && elf_section_data (sec)->this_hdr.contents != contents)
8660 free (contents);
8661 contents = NULL;
8662 }
8663
8664 return TRUE;
8665
8666 error_return:
8667 if (contents != NULL
8668 && elf_section_data (sec)->this_hdr.contents != contents)
8669 free (contents);
8670
8671 return FALSE;
8672 }
8673
8674 /* Set target relocation values needed during linking. */
8675
8676 void
8677 bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
8678 struct bfd_link_info *link_info,
8679 int target1_is_rel,
8680 char * target2_type,
8681 int fix_v4bx,
8682 int use_blx,
8683 bfd_arm_vfp11_fix vfp11_fix,
8684 bfd_arm_stm32l4xx_fix stm32l4xx_fix,
8685 int no_enum_warn, int no_wchar_warn,
8686 int pic_veneer, int fix_cortex_a8,
8687 int fix_arm1176, int cmse_implib,
8688 bfd *in_implib_bfd)
8689 {
8690 struct elf32_arm_link_hash_table *globals;
8691
8692 globals = elf32_arm_hash_table (link_info);
8693 if (globals == NULL)
8694 return;
8695
8696 globals->target1_is_rel = target1_is_rel;
8697 if (strcmp (target2_type, "rel") == 0)
8698 globals->target2_reloc = R_ARM_REL32;
8699 else if (strcmp (target2_type, "abs") == 0)
8700 globals->target2_reloc = R_ARM_ABS32;
8701 else if (strcmp (target2_type, "got-rel") == 0)
8702 globals->target2_reloc = R_ARM_GOT_PREL;
8703 else
8704 {
8705 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
8706 target2_type);
8707 }
8708 globals->fix_v4bx = fix_v4bx;
8709 globals->use_blx |= use_blx;
8710 globals->vfp11_fix = vfp11_fix;
8711 globals->stm32l4xx_fix = stm32l4xx_fix;
8712 globals->pic_veneer = pic_veneer;
8713 globals->fix_cortex_a8 = fix_cortex_a8;
8714 globals->fix_arm1176 = fix_arm1176;
8715 globals->cmse_implib = cmse_implib;
8716 globals->in_implib_bfd = in_implib_bfd;
8717
8718 BFD_ASSERT (is_arm_elf (output_bfd));
8719 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
8720 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
8721 }
8722
8723 /* Replace the target offset of a Thumb bl or b.w instruction. */
8724
8725 static void
8726 insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
8727 {
8728 bfd_vma upper;
8729 bfd_vma lower;
8730 int reloc_sign;
8731
8732 BFD_ASSERT ((offset & 1) == 0);
8733
8734 upper = bfd_get_16 (abfd, insn);
8735 lower = bfd_get_16 (abfd, insn + 2);
8736 reloc_sign = (offset < 0) ? 1 : 0;
8737 upper = (upper & ~(bfd_vma) 0x7ff)
8738 | ((offset >> 12) & 0x3ff)
8739 | (reloc_sign << 10);
8740 lower = (lower & ~(bfd_vma) 0x2fff)
8741 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
8742 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
8743 | ((offset >> 1) & 0x7ff);
8744 bfd_put_16 (abfd, upper, insn);
8745 bfd_put_16 (abfd, lower, insn + 2);
8746 }
8747
8748 /* Thumb code calling an ARM function. */
8749
8750 static int
8751 elf32_thumb_to_arm_stub (struct bfd_link_info * info,
8752 const char * name,
8753 bfd * input_bfd,
8754 bfd * output_bfd,
8755 asection * input_section,
8756 bfd_byte * hit_data,
8757 asection * sym_sec,
8758 bfd_vma offset,
8759 bfd_signed_vma addend,
8760 bfd_vma val,
8761 char **error_message)
8762 {
8763 asection * s = 0;
8764 bfd_vma my_offset;
8765 long int ret_offset;
8766 struct elf_link_hash_entry * myh;
8767 struct elf32_arm_link_hash_table * globals;
8768
8769 myh = find_thumb_glue (info, name, error_message);
8770 if (myh == NULL)
8771 return FALSE;
8772
8773 globals = elf32_arm_hash_table (info);
8774 BFD_ASSERT (globals != NULL);
8775 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
8776
8777 my_offset = myh->root.u.def.value;
8778
8779 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
8780 THUMB2ARM_GLUE_SECTION_NAME);
8781
8782 BFD_ASSERT (s != NULL);
8783 BFD_ASSERT (s->contents != NULL);
8784 BFD_ASSERT (s->output_section != NULL);
8785
8786 if ((my_offset & 0x01) == 0x01)
8787 {
8788 if (sym_sec != NULL
8789 && sym_sec->owner != NULL
8790 && !INTERWORK_FLAG (sym_sec->owner))
8791 {
8792 (*_bfd_error_handler)
8793 (_("%B(%s): warning: interworking not enabled.\n"
8794 " first occurrence: %B: Thumb call to ARM"),
8795 sym_sec->owner, input_bfd, name);
8796
8797 return FALSE;
8798 }
8799
8800 --my_offset;
8801 myh->root.u.def.value = my_offset;
8802
8803 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
8804 s->contents + my_offset);
8805
8806 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
8807 s->contents + my_offset + 2);
8808
8809 ret_offset =
8810 /* Address of destination of the stub. */
8811 ((bfd_signed_vma) val)
8812 - ((bfd_signed_vma)
8813 /* Offset from the start of the current section
8814 to the start of the stubs. */
8815 (s->output_offset
8816 /* Offset of the start of this stub from the start of the stubs. */
8817 + my_offset
8818 /* Address of the start of the current section. */
8819 + s->output_section->vma)
8820 /* The branch instruction is 4 bytes into the stub. */
8821 + 4
8822 /* ARM branches work from the pc of the instruction + 8. */
8823 + 8);
8824
8825 put_arm_insn (globals, output_bfd,
8826 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
8827 s->contents + my_offset + 4);
8828 }
8829
8830 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
8831
8832 /* Now go back and fix up the original BL insn to point to here. */
8833 ret_offset =
8834 /* Address of where the stub is located. */
8835 (s->output_section->vma + s->output_offset + my_offset)
8836 /* Address of where the BL is located. */
8837 - (input_section->output_section->vma + input_section->output_offset
8838 + offset)
8839 /* Addend in the relocation. */
8840 - addend
8841 /* Biassing for PC-relative addressing. */
8842 - 8;
8843
8844 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
8845
8846 return TRUE;
8847 }
8848
8849 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
8850
8851 static struct elf_link_hash_entry *
8852 elf32_arm_create_thumb_stub (struct bfd_link_info * info,
8853 const char * name,
8854 bfd * input_bfd,
8855 bfd * output_bfd,
8856 asection * sym_sec,
8857 bfd_vma val,
8858 asection * s,
8859 char ** error_message)
8860 {
8861 bfd_vma my_offset;
8862 long int ret_offset;
8863 struct elf_link_hash_entry * myh;
8864 struct elf32_arm_link_hash_table * globals;
8865
8866 myh = find_arm_glue (info, name, error_message);
8867 if (myh == NULL)
8868 return NULL;
8869
8870 globals = elf32_arm_hash_table (info);
8871 BFD_ASSERT (globals != NULL);
8872 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
8873
8874 my_offset = myh->root.u.def.value;
8875
8876 if ((my_offset & 0x01) == 0x01)
8877 {
8878 if (sym_sec != NULL
8879 && sym_sec->owner != NULL
8880 && !INTERWORK_FLAG (sym_sec->owner))
8881 {
8882 (*_bfd_error_handler)
8883 (_("%B(%s): warning: interworking not enabled.\n"
8884 " first occurrence: %B: arm call to thumb"),
8885 sym_sec->owner, input_bfd, name);
8886 }
8887
8888 --my_offset;
8889 myh->root.u.def.value = my_offset;
8890
8891 if (bfd_link_pic (info)
8892 || globals->root.is_relocatable_executable
8893 || globals->pic_veneer)
8894 {
8895 /* For relocatable objects we can't use absolute addresses,
8896 so construct the address from a relative offset. */
8897 /* TODO: If the offset is small it's probably worth
8898 constructing the address with adds. */
8899 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
8900 s->contents + my_offset);
8901 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
8902 s->contents + my_offset + 4);
8903 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
8904 s->contents + my_offset + 8);
8905 /* Adjust the offset by 4 for the position of the add,
8906 and 8 for the pipeline offset. */
8907 ret_offset = (val - (s->output_offset
8908 + s->output_section->vma
8909 + my_offset + 12))
8910 | 1;
8911 bfd_put_32 (output_bfd, ret_offset,
8912 s->contents + my_offset + 12);
8913 }
8914 else if (globals->use_blx)
8915 {
8916 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
8917 s->contents + my_offset);
8918
8919 /* It's a thumb address. Add the low order bit. */
8920 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
8921 s->contents + my_offset + 4);
8922 }
8923 else
8924 {
8925 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
8926 s->contents + my_offset);
8927
8928 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
8929 s->contents + my_offset + 4);
8930
8931 /* It's a thumb address. Add the low order bit. */
8932 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
8933 s->contents + my_offset + 8);
8934
8935 my_offset += 12;
8936 }
8937 }
8938
8939 BFD_ASSERT (my_offset <= globals->arm_glue_size);
8940
8941 return myh;
8942 }
8943
8944 /* Arm code calling a Thumb function. */
8945
8946 static int
8947 elf32_arm_to_thumb_stub (struct bfd_link_info * info,
8948 const char * name,
8949 bfd * input_bfd,
8950 bfd * output_bfd,
8951 asection * input_section,
8952 bfd_byte * hit_data,
8953 asection * sym_sec,
8954 bfd_vma offset,
8955 bfd_signed_vma addend,
8956 bfd_vma val,
8957 char **error_message)
8958 {
8959 unsigned long int tmp;
8960 bfd_vma my_offset;
8961 asection * s;
8962 long int ret_offset;
8963 struct elf_link_hash_entry * myh;
8964 struct elf32_arm_link_hash_table * globals;
8965
8966 globals = elf32_arm_hash_table (info);
8967 BFD_ASSERT (globals != NULL);
8968 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
8969
8970 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
8971 ARM2THUMB_GLUE_SECTION_NAME);
8972 BFD_ASSERT (s != NULL);
8973 BFD_ASSERT (s->contents != NULL);
8974 BFD_ASSERT (s->output_section != NULL);
8975
8976 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
8977 sym_sec, val, s, error_message);
8978 if (!myh)
8979 return FALSE;
8980
8981 my_offset = myh->root.u.def.value;
8982 tmp = bfd_get_32 (input_bfd, hit_data);
8983 tmp = tmp & 0xFF000000;
8984
8985 /* Somehow these are both 4 too far, so subtract 8. */
8986 ret_offset = (s->output_offset
8987 + my_offset
8988 + s->output_section->vma
8989 - (input_section->output_offset
8990 + input_section->output_section->vma
8991 + offset + addend)
8992 - 8);
8993
8994 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
8995
8996 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
8997
8998 return TRUE;
8999 }
9000
9001 /* Populate Arm stub for an exported Thumb function. */
9002
9003 static bfd_boolean
9004 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
9005 {
9006 struct bfd_link_info * info = (struct bfd_link_info *) inf;
9007 asection * s;
9008 struct elf_link_hash_entry * myh;
9009 struct elf32_arm_link_hash_entry *eh;
9010 struct elf32_arm_link_hash_table * globals;
9011 asection *sec;
9012 bfd_vma val;
9013 char *error_message;
9014
9015 eh = elf32_arm_hash_entry (h);
9016 /* Allocate stubs for exported Thumb functions on v4t. */
9017 if (eh->export_glue == NULL)
9018 return TRUE;
9019
9020 globals = elf32_arm_hash_table (info);
9021 BFD_ASSERT (globals != NULL);
9022 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9023
9024 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9025 ARM2THUMB_GLUE_SECTION_NAME);
9026 BFD_ASSERT (s != NULL);
9027 BFD_ASSERT (s->contents != NULL);
9028 BFD_ASSERT (s->output_section != NULL);
9029
9030 sec = eh->export_glue->root.u.def.section;
9031
9032 BFD_ASSERT (sec->output_section != NULL);
9033
9034 val = eh->export_glue->root.u.def.value + sec->output_offset
9035 + sec->output_section->vma;
9036
9037 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
9038 h->root.u.def.section->owner,
9039 globals->obfd, sec, val, s,
9040 &error_message);
9041 BFD_ASSERT (myh);
9042 return TRUE;
9043 }
9044
9045 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
9046
9047 static bfd_vma
9048 elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
9049 {
9050 bfd_byte *p;
9051 bfd_vma glue_addr;
9052 asection *s;
9053 struct elf32_arm_link_hash_table *globals;
9054
9055 globals = elf32_arm_hash_table (info);
9056 BFD_ASSERT (globals != NULL);
9057 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9058
9059 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9060 ARM_BX_GLUE_SECTION_NAME);
9061 BFD_ASSERT (s != NULL);
9062 BFD_ASSERT (s->contents != NULL);
9063 BFD_ASSERT (s->output_section != NULL);
9064
9065 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
9066
9067 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
9068
9069 if ((globals->bx_glue_offset[reg] & 1) == 0)
9070 {
9071 p = s->contents + glue_addr;
9072 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
9073 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
9074 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
9075 globals->bx_glue_offset[reg] |= 1;
9076 }
9077
9078 return glue_addr + s->output_section->vma + s->output_offset;
9079 }
9080
9081 /* Generate Arm stubs for exported Thumb symbols. */
9082 static void
9083 elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
9084 struct bfd_link_info *link_info)
9085 {
9086 struct elf32_arm_link_hash_table * globals;
9087
9088 if (link_info == NULL)
9089 /* Ignore this if we are not called by the ELF backend linker. */
9090 return;
9091
9092 globals = elf32_arm_hash_table (link_info);
9093 if (globals == NULL)
9094 return;
9095
9096 /* If blx is available then exported Thumb symbols are OK and there is
9097 nothing to do. */
9098 if (globals->use_blx)
9099 return;
9100
9101 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
9102 link_info);
9103 }
9104
9105 /* Reserve space for COUNT dynamic relocations in relocation selection
9106 SRELOC. */
9107
9108 static void
9109 elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
9110 bfd_size_type count)
9111 {
9112 struct elf32_arm_link_hash_table *htab;
9113
9114 htab = elf32_arm_hash_table (info);
9115 BFD_ASSERT (htab->root.dynamic_sections_created);
9116 if (sreloc == NULL)
9117 abort ();
9118 sreloc->size += RELOC_SIZE (htab) * count;
9119 }
9120
9121 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
9122 dynamic, the relocations should go in SRELOC, otherwise they should
9123 go in the special .rel.iplt section. */
9124
9125 static void
9126 elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
9127 bfd_size_type count)
9128 {
9129 struct elf32_arm_link_hash_table *htab;
9130
9131 htab = elf32_arm_hash_table (info);
9132 if (!htab->root.dynamic_sections_created)
9133 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
9134 else
9135 {
9136 BFD_ASSERT (sreloc != NULL);
9137 sreloc->size += RELOC_SIZE (htab) * count;
9138 }
9139 }
9140
9141 /* Add relocation REL to the end of relocation section SRELOC. */
9142
9143 static void
9144 elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
9145 asection *sreloc, Elf_Internal_Rela *rel)
9146 {
9147 bfd_byte *loc;
9148 struct elf32_arm_link_hash_table *htab;
9149
9150 htab = elf32_arm_hash_table (info);
9151 if (!htab->root.dynamic_sections_created
9152 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
9153 sreloc = htab->root.irelplt;
9154 if (sreloc == NULL)
9155 abort ();
9156 loc = sreloc->contents;
9157 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
9158 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
9159 abort ();
9160 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
9161 }
9162
9163 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
9164 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
9165 to .plt. */
9166
9167 static void
9168 elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
9169 bfd_boolean is_iplt_entry,
9170 union gotplt_union *root_plt,
9171 struct arm_plt_info *arm_plt)
9172 {
9173 struct elf32_arm_link_hash_table *htab;
9174 asection *splt;
9175 asection *sgotplt;
9176
9177 htab = elf32_arm_hash_table (info);
9178
9179 if (is_iplt_entry)
9180 {
9181 splt = htab->root.iplt;
9182 sgotplt = htab->root.igotplt;
9183
9184 /* NaCl uses a special first entry in .iplt too. */
9185 if (htab->nacl_p && splt->size == 0)
9186 splt->size += htab->plt_header_size;
9187
9188 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
9189 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
9190 }
9191 else
9192 {
9193 splt = htab->root.splt;
9194 sgotplt = htab->root.sgotplt;
9195
9196 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
9197 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
9198
9199 /* If this is the first .plt entry, make room for the special
9200 first entry. */
9201 if (splt->size == 0)
9202 splt->size += htab->plt_header_size;
9203
9204 htab->next_tls_desc_index++;
9205 }
9206
9207 /* Allocate the PLT entry itself, including any leading Thumb stub. */
9208 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9209 splt->size += PLT_THUMB_STUB_SIZE;
9210 root_plt->offset = splt->size;
9211 splt->size += htab->plt_entry_size;
9212
9213 if (!htab->symbian_p)
9214 {
9215 /* We also need to make an entry in the .got.plt section, which
9216 will be placed in the .got section by the linker script. */
9217 if (is_iplt_entry)
9218 arm_plt->got_offset = sgotplt->size;
9219 else
9220 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
9221 sgotplt->size += 4;
9222 }
9223 }
9224
9225 static bfd_vma
9226 arm_movw_immediate (bfd_vma value)
9227 {
9228 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
9229 }
9230
9231 static bfd_vma
9232 arm_movt_immediate (bfd_vma value)
9233 {
9234 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
9235 }
9236
9237 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
9238 the entry lives in .iplt and resolves to (*SYM_VALUE)().
9239 Otherwise, DYNINDX is the index of the symbol in the dynamic
9240 symbol table and SYM_VALUE is undefined.
9241
9242 ROOT_PLT points to the offset of the PLT entry from the start of its
9243 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
9244 bookkeeping information.
9245
9246 Returns FALSE if there was a problem. */
9247
9248 static bfd_boolean
9249 elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
9250 union gotplt_union *root_plt,
9251 struct arm_plt_info *arm_plt,
9252 int dynindx, bfd_vma sym_value)
9253 {
9254 struct elf32_arm_link_hash_table *htab;
9255 asection *sgot;
9256 asection *splt;
9257 asection *srel;
9258 bfd_byte *loc;
9259 bfd_vma plt_index;
9260 Elf_Internal_Rela rel;
9261 bfd_vma plt_header_size;
9262 bfd_vma got_header_size;
9263
9264 htab = elf32_arm_hash_table (info);
9265
9266 /* Pick the appropriate sections and sizes. */
9267 if (dynindx == -1)
9268 {
9269 splt = htab->root.iplt;
9270 sgot = htab->root.igotplt;
9271 srel = htab->root.irelplt;
9272
9273 /* There are no reserved entries in .igot.plt, and no special
9274 first entry in .iplt. */
9275 got_header_size = 0;
9276 plt_header_size = 0;
9277 }
9278 else
9279 {
9280 splt = htab->root.splt;
9281 sgot = htab->root.sgotplt;
9282 srel = htab->root.srelplt;
9283
9284 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
9285 plt_header_size = htab->plt_header_size;
9286 }
9287 BFD_ASSERT (splt != NULL && srel != NULL);
9288
9289 /* Fill in the entry in the procedure linkage table. */
9290 if (htab->symbian_p)
9291 {
9292 BFD_ASSERT (dynindx >= 0);
9293 put_arm_insn (htab, output_bfd,
9294 elf32_arm_symbian_plt_entry[0],
9295 splt->contents + root_plt->offset);
9296 bfd_put_32 (output_bfd,
9297 elf32_arm_symbian_plt_entry[1],
9298 splt->contents + root_plt->offset + 4);
9299
9300 /* Fill in the entry in the .rel.plt section. */
9301 rel.r_offset = (splt->output_section->vma
9302 + splt->output_offset
9303 + root_plt->offset + 4);
9304 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
9305
9306 /* Get the index in the procedure linkage table which
9307 corresponds to this symbol. This is the index of this symbol
9308 in all the symbols for which we are making plt entries. The
9309 first entry in the procedure linkage table is reserved. */
9310 plt_index = ((root_plt->offset - plt_header_size)
9311 / htab->plt_entry_size);
9312 }
9313 else
9314 {
9315 bfd_vma got_offset, got_address, plt_address;
9316 bfd_vma got_displacement, initial_got_entry;
9317 bfd_byte * ptr;
9318
9319 BFD_ASSERT (sgot != NULL);
9320
9321 /* Get the offset into the .(i)got.plt table of the entry that
9322 corresponds to this function. */
9323 got_offset = (arm_plt->got_offset & -2);
9324
9325 /* Get the index in the procedure linkage table which
9326 corresponds to this symbol. This is the index of this symbol
9327 in all the symbols for which we are making plt entries.
9328 After the reserved .got.plt entries, all symbols appear in
9329 the same order as in .plt. */
9330 plt_index = (got_offset - got_header_size) / 4;
9331
9332 /* Calculate the address of the GOT entry. */
9333 got_address = (sgot->output_section->vma
9334 + sgot->output_offset
9335 + got_offset);
9336
9337 /* ...and the address of the PLT entry. */
9338 plt_address = (splt->output_section->vma
9339 + splt->output_offset
9340 + root_plt->offset);
9341
9342 ptr = splt->contents + root_plt->offset;
9343 if (htab->vxworks_p && bfd_link_pic (info))
9344 {
9345 unsigned int i;
9346 bfd_vma val;
9347
9348 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9349 {
9350 val = elf32_arm_vxworks_shared_plt_entry[i];
9351 if (i == 2)
9352 val |= got_address - sgot->output_section->vma;
9353 if (i == 5)
9354 val |= plt_index * RELOC_SIZE (htab);
9355 if (i == 2 || i == 5)
9356 bfd_put_32 (output_bfd, val, ptr);
9357 else
9358 put_arm_insn (htab, output_bfd, val, ptr);
9359 }
9360 }
9361 else if (htab->vxworks_p)
9362 {
9363 unsigned int i;
9364 bfd_vma val;
9365
9366 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9367 {
9368 val = elf32_arm_vxworks_exec_plt_entry[i];
9369 if (i == 2)
9370 val |= got_address;
9371 if (i == 4)
9372 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
9373 if (i == 5)
9374 val |= plt_index * RELOC_SIZE (htab);
9375 if (i == 2 || i == 5)
9376 bfd_put_32 (output_bfd, val, ptr);
9377 else
9378 put_arm_insn (htab, output_bfd, val, ptr);
9379 }
9380
9381 loc = (htab->srelplt2->contents
9382 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
9383
9384 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
9385 referencing the GOT for this PLT entry. */
9386 rel.r_offset = plt_address + 8;
9387 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
9388 rel.r_addend = got_offset;
9389 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9390 loc += RELOC_SIZE (htab);
9391
9392 /* Create the R_ARM_ABS32 relocation referencing the
9393 beginning of the PLT for this GOT entry. */
9394 rel.r_offset = got_address;
9395 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
9396 rel.r_addend = 0;
9397 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9398 }
9399 else if (htab->nacl_p)
9400 {
9401 /* Calculate the displacement between the PLT slot and the
9402 common tail that's part of the special initial PLT slot. */
9403 int32_t tail_displacement
9404 = ((splt->output_section->vma + splt->output_offset
9405 + ARM_NACL_PLT_TAIL_OFFSET)
9406 - (plt_address + htab->plt_entry_size + 4));
9407 BFD_ASSERT ((tail_displacement & 3) == 0);
9408 tail_displacement >>= 2;
9409
9410 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
9411 || (-tail_displacement & 0xff000000) == 0);
9412
9413 /* Calculate the displacement between the PLT slot and the entry
9414 in the GOT. The offset accounts for the value produced by
9415 adding to pc in the penultimate instruction of the PLT stub. */
9416 got_displacement = (got_address
9417 - (plt_address + htab->plt_entry_size));
9418
9419 /* NaCl does not support interworking at all. */
9420 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
9421
9422 put_arm_insn (htab, output_bfd,
9423 elf32_arm_nacl_plt_entry[0]
9424 | arm_movw_immediate (got_displacement),
9425 ptr + 0);
9426 put_arm_insn (htab, output_bfd,
9427 elf32_arm_nacl_plt_entry[1]
9428 | arm_movt_immediate (got_displacement),
9429 ptr + 4);
9430 put_arm_insn (htab, output_bfd,
9431 elf32_arm_nacl_plt_entry[2],
9432 ptr + 8);
9433 put_arm_insn (htab, output_bfd,
9434 elf32_arm_nacl_plt_entry[3]
9435 | (tail_displacement & 0x00ffffff),
9436 ptr + 12);
9437 }
9438 else if (using_thumb_only (htab))
9439 {
9440 /* PR ld/16017: Generate thumb only PLT entries. */
9441 if (!using_thumb2 (htab))
9442 {
9443 /* FIXME: We ought to be able to generate thumb-1 PLT
9444 instructions... */
9445 _bfd_error_handler (_("%B: Warning: thumb-1 mode PLT generation not currently supported"),
9446 output_bfd);
9447 return FALSE;
9448 }
9449
9450 /* Calculate the displacement between the PLT slot and the entry in
9451 the GOT. The 12-byte offset accounts for the value produced by
9452 adding to pc in the 3rd instruction of the PLT stub. */
9453 got_displacement = got_address - (plt_address + 12);
9454
9455 /* As we are using 32 bit instructions we have to use 'put_arm_insn'
9456 instead of 'put_thumb_insn'. */
9457 put_arm_insn (htab, output_bfd,
9458 elf32_thumb2_plt_entry[0]
9459 | ((got_displacement & 0x000000ff) << 16)
9460 | ((got_displacement & 0x00000700) << 20)
9461 | ((got_displacement & 0x00000800) >> 1)
9462 | ((got_displacement & 0x0000f000) >> 12),
9463 ptr + 0);
9464 put_arm_insn (htab, output_bfd,
9465 elf32_thumb2_plt_entry[1]
9466 | ((got_displacement & 0x00ff0000) )
9467 | ((got_displacement & 0x07000000) << 4)
9468 | ((got_displacement & 0x08000000) >> 17)
9469 | ((got_displacement & 0xf0000000) >> 28),
9470 ptr + 4);
9471 put_arm_insn (htab, output_bfd,
9472 elf32_thumb2_plt_entry[2],
9473 ptr + 8);
9474 put_arm_insn (htab, output_bfd,
9475 elf32_thumb2_plt_entry[3],
9476 ptr + 12);
9477 }
9478 else
9479 {
9480 /* Calculate the displacement between the PLT slot and the
9481 entry in the GOT. The eight-byte offset accounts for the
9482 value produced by adding to pc in the first instruction
9483 of the PLT stub. */
9484 got_displacement = got_address - (plt_address + 8);
9485
9486 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9487 {
9488 put_thumb_insn (htab, output_bfd,
9489 elf32_arm_plt_thumb_stub[0], ptr - 4);
9490 put_thumb_insn (htab, output_bfd,
9491 elf32_arm_plt_thumb_stub[1], ptr - 2);
9492 }
9493
9494 if (!elf32_arm_use_long_plt_entry)
9495 {
9496 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
9497
9498 put_arm_insn (htab, output_bfd,
9499 elf32_arm_plt_entry_short[0]
9500 | ((got_displacement & 0x0ff00000) >> 20),
9501 ptr + 0);
9502 put_arm_insn (htab, output_bfd,
9503 elf32_arm_plt_entry_short[1]
9504 | ((got_displacement & 0x000ff000) >> 12),
9505 ptr+ 4);
9506 put_arm_insn (htab, output_bfd,
9507 elf32_arm_plt_entry_short[2]
9508 | (got_displacement & 0x00000fff),
9509 ptr + 8);
9510 #ifdef FOUR_WORD_PLT
9511 bfd_put_32 (output_bfd, elf32_arm_plt_entry_short[3], ptr + 12);
9512 #endif
9513 }
9514 else
9515 {
9516 put_arm_insn (htab, output_bfd,
9517 elf32_arm_plt_entry_long[0]
9518 | ((got_displacement & 0xf0000000) >> 28),
9519 ptr + 0);
9520 put_arm_insn (htab, output_bfd,
9521 elf32_arm_plt_entry_long[1]
9522 | ((got_displacement & 0x0ff00000) >> 20),
9523 ptr + 4);
9524 put_arm_insn (htab, output_bfd,
9525 elf32_arm_plt_entry_long[2]
9526 | ((got_displacement & 0x000ff000) >> 12),
9527 ptr+ 8);
9528 put_arm_insn (htab, output_bfd,
9529 elf32_arm_plt_entry_long[3]
9530 | (got_displacement & 0x00000fff),
9531 ptr + 12);
9532 }
9533 }
9534
9535 /* Fill in the entry in the .rel(a).(i)plt section. */
9536 rel.r_offset = got_address;
9537 rel.r_addend = 0;
9538 if (dynindx == -1)
9539 {
9540 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
9541 The dynamic linker or static executable then calls SYM_VALUE
9542 to determine the correct run-time value of the .igot.plt entry. */
9543 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9544 initial_got_entry = sym_value;
9545 }
9546 else
9547 {
9548 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
9549 initial_got_entry = (splt->output_section->vma
9550 + splt->output_offset);
9551 }
9552
9553 /* Fill in the entry in the global offset table. */
9554 bfd_put_32 (output_bfd, initial_got_entry,
9555 sgot->contents + got_offset);
9556 }
9557
9558 if (dynindx == -1)
9559 elf32_arm_add_dynreloc (output_bfd, info, srel, &rel);
9560 else
9561 {
9562 loc = srel->contents + plt_index * RELOC_SIZE (htab);
9563 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9564 }
9565
9566 return TRUE;
9567 }
9568
9569 /* Some relocations map to different relocations depending on the
9570 target. Return the real relocation. */
9571
9572 static int
9573 arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
9574 int r_type)
9575 {
9576 switch (r_type)
9577 {
9578 case R_ARM_TARGET1:
9579 if (globals->target1_is_rel)
9580 return R_ARM_REL32;
9581 else
9582 return R_ARM_ABS32;
9583
9584 case R_ARM_TARGET2:
9585 return globals->target2_reloc;
9586
9587 default:
9588 return r_type;
9589 }
9590 }
9591
9592 /* Return the base VMA address which should be subtracted from real addresses
9593 when resolving @dtpoff relocation.
9594 This is PT_TLS segment p_vaddr. */
9595
9596 static bfd_vma
9597 dtpoff_base (struct bfd_link_info *info)
9598 {
9599 /* If tls_sec is NULL, we should have signalled an error already. */
9600 if (elf_hash_table (info)->tls_sec == NULL)
9601 return 0;
9602 return elf_hash_table (info)->tls_sec->vma;
9603 }
9604
9605 /* Return the relocation value for @tpoff relocation
9606 if STT_TLS virtual address is ADDRESS. */
9607
9608 static bfd_vma
9609 tpoff (struct bfd_link_info *info, bfd_vma address)
9610 {
9611 struct elf_link_hash_table *htab = elf_hash_table (info);
9612 bfd_vma base;
9613
9614 /* If tls_sec is NULL, we should have signalled an error already. */
9615 if (htab->tls_sec == NULL)
9616 return 0;
9617 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
9618 return address - htab->tls_sec->vma + base;
9619 }
9620
9621 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
9622 VALUE is the relocation value. */
9623
9624 static bfd_reloc_status_type
9625 elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
9626 {
9627 if (value > 0xfff)
9628 return bfd_reloc_overflow;
9629
9630 value |= bfd_get_32 (abfd, data) & 0xfffff000;
9631 bfd_put_32 (abfd, value, data);
9632 return bfd_reloc_ok;
9633 }
9634
9635 /* Handle TLS relaxations. Relaxing is possible for symbols that use
9636 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
9637 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
9638
9639 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
9640 is to then call final_link_relocate. Return other values in the
9641 case of error.
9642
9643 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
9644 the pre-relaxed code. It would be nice if the relocs were updated
9645 to match the optimization. */
9646
9647 static bfd_reloc_status_type
9648 elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
9649 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
9650 Elf_Internal_Rela *rel, unsigned long is_local)
9651 {
9652 unsigned long insn;
9653
9654 switch (ELF32_R_TYPE (rel->r_info))
9655 {
9656 default:
9657 return bfd_reloc_notsupported;
9658
9659 case R_ARM_TLS_GOTDESC:
9660 if (is_local)
9661 insn = 0;
9662 else
9663 {
9664 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
9665 if (insn & 1)
9666 insn -= 5; /* THUMB */
9667 else
9668 insn -= 8; /* ARM */
9669 }
9670 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
9671 return bfd_reloc_continue;
9672
9673 case R_ARM_THM_TLS_DESCSEQ:
9674 /* Thumb insn. */
9675 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
9676 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
9677 {
9678 if (is_local)
9679 /* nop */
9680 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
9681 }
9682 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
9683 {
9684 if (is_local)
9685 /* nop */
9686 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
9687 else
9688 /* ldr rx,[ry] */
9689 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
9690 }
9691 else if ((insn & 0xff87) == 0x4780) /* blx rx */
9692 {
9693 if (is_local)
9694 /* nop */
9695 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
9696 else
9697 /* mov r0, rx */
9698 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
9699 contents + rel->r_offset);
9700 }
9701 else
9702 {
9703 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
9704 /* It's a 32 bit instruction, fetch the rest of it for
9705 error generation. */
9706 insn = (insn << 16)
9707 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
9708 (*_bfd_error_handler)
9709 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"),
9710 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
9711 return bfd_reloc_notsupported;
9712 }
9713 break;
9714
9715 case R_ARM_TLS_DESCSEQ:
9716 /* arm insn. */
9717 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
9718 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
9719 {
9720 if (is_local)
9721 /* mov rx, ry */
9722 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
9723 contents + rel->r_offset);
9724 }
9725 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
9726 {
9727 if (is_local)
9728 /* nop */
9729 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
9730 else
9731 /* ldr rx,[ry] */
9732 bfd_put_32 (input_bfd, insn & 0xfffff000,
9733 contents + rel->r_offset);
9734 }
9735 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
9736 {
9737 if (is_local)
9738 /* nop */
9739 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
9740 else
9741 /* mov r0, rx */
9742 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
9743 contents + rel->r_offset);
9744 }
9745 else
9746 {
9747 (*_bfd_error_handler)
9748 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline"),
9749 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
9750 return bfd_reloc_notsupported;
9751 }
9752 break;
9753
9754 case R_ARM_TLS_CALL:
9755 /* GD->IE relaxation, turn the instruction into 'nop' or
9756 'ldr r0, [pc,r0]' */
9757 insn = is_local ? 0xe1a00000 : 0xe79f0000;
9758 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
9759 break;
9760
9761 case R_ARM_THM_TLS_CALL:
9762 /* GD->IE relaxation. */
9763 if (!is_local)
9764 /* add r0,pc; ldr r0, [r0] */
9765 insn = 0x44786800;
9766 else if (using_thumb2 (globals))
9767 /* nop.w */
9768 insn = 0xf3af8000;
9769 else
9770 /* nop; nop */
9771 insn = 0xbf00bf00;
9772
9773 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
9774 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
9775 break;
9776 }
9777 return bfd_reloc_ok;
9778 }
9779
9780 /* For a given value of n, calculate the value of G_n as required to
9781 deal with group relocations. We return it in the form of an
9782 encoded constant-and-rotation, together with the final residual. If n is
9783 specified as less than zero, then final_residual is filled with the
9784 input value and no further action is performed. */
9785
9786 static bfd_vma
9787 calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
9788 {
9789 int current_n;
9790 bfd_vma g_n;
9791 bfd_vma encoded_g_n = 0;
9792 bfd_vma residual = value; /* Also known as Y_n. */
9793
9794 for (current_n = 0; current_n <= n; current_n++)
9795 {
9796 int shift;
9797
9798 /* Calculate which part of the value to mask. */
9799 if (residual == 0)
9800 shift = 0;
9801 else
9802 {
9803 int msb;
9804
9805 /* Determine the most significant bit in the residual and
9806 align the resulting value to a 2-bit boundary. */
9807 for (msb = 30; msb >= 0; msb -= 2)
9808 if (residual & (3 << msb))
9809 break;
9810
9811 /* The desired shift is now (msb - 6), or zero, whichever
9812 is the greater. */
9813 shift = msb - 6;
9814 if (shift < 0)
9815 shift = 0;
9816 }
9817
9818 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
9819 g_n = residual & (0xff << shift);
9820 encoded_g_n = (g_n >> shift)
9821 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
9822
9823 /* Calculate the residual for the next time around. */
9824 residual &= ~g_n;
9825 }
9826
9827 *final_residual = residual;
9828
9829 return encoded_g_n;
9830 }
9831
9832 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
9833 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
9834
9835 static int
9836 identify_add_or_sub (bfd_vma insn)
9837 {
9838 int opcode = insn & 0x1e00000;
9839
9840 if (opcode == 1 << 23) /* ADD */
9841 return 1;
9842
9843 if (opcode == 1 << 22) /* SUB */
9844 return -1;
9845
9846 return 0;
9847 }
9848
9849 /* Perform a relocation as part of a final link. */
9850
9851 static bfd_reloc_status_type
9852 elf32_arm_final_link_relocate (reloc_howto_type * howto,
9853 bfd * input_bfd,
9854 bfd * output_bfd,
9855 asection * input_section,
9856 bfd_byte * contents,
9857 Elf_Internal_Rela * rel,
9858 bfd_vma value,
9859 struct bfd_link_info * info,
9860 asection * sym_sec,
9861 const char * sym_name,
9862 unsigned char st_type,
9863 enum arm_st_branch_type branch_type,
9864 struct elf_link_hash_entry * h,
9865 bfd_boolean * unresolved_reloc_p,
9866 char ** error_message)
9867 {
9868 unsigned long r_type = howto->type;
9869 unsigned long r_symndx;
9870 bfd_byte * hit_data = contents + rel->r_offset;
9871 bfd_vma * local_got_offsets;
9872 bfd_vma * local_tlsdesc_gotents;
9873 asection * sgot;
9874 asection * splt;
9875 asection * sreloc = NULL;
9876 asection * srelgot;
9877 bfd_vma addend;
9878 bfd_signed_vma signed_addend;
9879 unsigned char dynreloc_st_type;
9880 bfd_vma dynreloc_value;
9881 struct elf32_arm_link_hash_table * globals;
9882 struct elf32_arm_link_hash_entry *eh;
9883 union gotplt_union *root_plt;
9884 struct arm_plt_info *arm_plt;
9885 bfd_vma plt_offset;
9886 bfd_vma gotplt_offset;
9887 bfd_boolean has_iplt_entry;
9888
9889 globals = elf32_arm_hash_table (info);
9890 if (globals == NULL)
9891 return bfd_reloc_notsupported;
9892
9893 BFD_ASSERT (is_arm_elf (input_bfd));
9894
9895 /* Some relocation types map to different relocations depending on the
9896 target. We pick the right one here. */
9897 r_type = arm_real_reloc_type (globals, r_type);
9898
9899 /* It is possible to have linker relaxations on some TLS access
9900 models. Update our information here. */
9901 r_type = elf32_arm_tls_transition (info, r_type, h);
9902
9903 if (r_type != howto->type)
9904 howto = elf32_arm_howto_from_type (r_type);
9905
9906 eh = (struct elf32_arm_link_hash_entry *) h;
9907 sgot = globals->root.sgot;
9908 local_got_offsets = elf_local_got_offsets (input_bfd);
9909 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
9910
9911 if (globals->root.dynamic_sections_created)
9912 srelgot = globals->root.srelgot;
9913 else
9914 srelgot = NULL;
9915
9916 r_symndx = ELF32_R_SYM (rel->r_info);
9917
9918 if (globals->use_rel)
9919 {
9920 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
9921
9922 if (addend & ((howto->src_mask + 1) >> 1))
9923 {
9924 signed_addend = -1;
9925 signed_addend &= ~ howto->src_mask;
9926 signed_addend |= addend;
9927 }
9928 else
9929 signed_addend = addend;
9930 }
9931 else
9932 addend = signed_addend = rel->r_addend;
9933
9934 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
9935 are resolving a function call relocation. */
9936 if (using_thumb_only (globals)
9937 && (r_type == R_ARM_THM_CALL
9938 || r_type == R_ARM_THM_JUMP24)
9939 && branch_type == ST_BRANCH_TO_ARM)
9940 branch_type = ST_BRANCH_TO_THUMB;
9941
9942 /* Record the symbol information that should be used in dynamic
9943 relocations. */
9944 dynreloc_st_type = st_type;
9945 dynreloc_value = value;
9946 if (branch_type == ST_BRANCH_TO_THUMB)
9947 dynreloc_value |= 1;
9948
9949 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
9950 VALUE appropriately for relocations that we resolve at link time. */
9951 has_iplt_entry = FALSE;
9952 if (elf32_arm_get_plt_info (input_bfd, globals, eh, r_symndx, &root_plt,
9953 &arm_plt)
9954 && root_plt->offset != (bfd_vma) -1)
9955 {
9956 plt_offset = root_plt->offset;
9957 gotplt_offset = arm_plt->got_offset;
9958
9959 if (h == NULL || eh->is_iplt)
9960 {
9961 has_iplt_entry = TRUE;
9962 splt = globals->root.iplt;
9963
9964 /* Populate .iplt entries here, because not all of them will
9965 be seen by finish_dynamic_symbol. The lower bit is set if
9966 we have already populated the entry. */
9967 if (plt_offset & 1)
9968 plt_offset--;
9969 else
9970 {
9971 if (elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
9972 -1, dynreloc_value))
9973 root_plt->offset |= 1;
9974 else
9975 return bfd_reloc_notsupported;
9976 }
9977
9978 /* Static relocations always resolve to the .iplt entry. */
9979 st_type = STT_FUNC;
9980 value = (splt->output_section->vma
9981 + splt->output_offset
9982 + plt_offset);
9983 branch_type = ST_BRANCH_TO_ARM;
9984
9985 /* If there are non-call relocations that resolve to the .iplt
9986 entry, then all dynamic ones must too. */
9987 if (arm_plt->noncall_refcount != 0)
9988 {
9989 dynreloc_st_type = st_type;
9990 dynreloc_value = value;
9991 }
9992 }
9993 else
9994 /* We populate the .plt entry in finish_dynamic_symbol. */
9995 splt = globals->root.splt;
9996 }
9997 else
9998 {
9999 splt = NULL;
10000 plt_offset = (bfd_vma) -1;
10001 gotplt_offset = (bfd_vma) -1;
10002 }
10003
10004 switch (r_type)
10005 {
10006 case R_ARM_NONE:
10007 /* We don't need to find a value for this symbol. It's just a
10008 marker. */
10009 *unresolved_reloc_p = FALSE;
10010 return bfd_reloc_ok;
10011
10012 case R_ARM_ABS12:
10013 if (!globals->vxworks_p)
10014 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10015
10016 case R_ARM_PC24:
10017 case R_ARM_ABS32:
10018 case R_ARM_ABS32_NOI:
10019 case R_ARM_REL32:
10020 case R_ARM_REL32_NOI:
10021 case R_ARM_CALL:
10022 case R_ARM_JUMP24:
10023 case R_ARM_XPC25:
10024 case R_ARM_PREL31:
10025 case R_ARM_PLT32:
10026 /* Handle relocations which should use the PLT entry. ABS32/REL32
10027 will use the symbol's value, which may point to a PLT entry, but we
10028 don't need to handle that here. If we created a PLT entry, all
10029 branches in this object should go to it, except if the PLT is too
10030 far away, in which case a long branch stub should be inserted. */
10031 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
10032 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
10033 && r_type != R_ARM_CALL
10034 && r_type != R_ARM_JUMP24
10035 && r_type != R_ARM_PLT32)
10036 && plt_offset != (bfd_vma) -1)
10037 {
10038 /* If we've created a .plt section, and assigned a PLT entry
10039 to this function, it must either be a STT_GNU_IFUNC reference
10040 or not be known to bind locally. In other cases, we should
10041 have cleared the PLT entry by now. */
10042 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
10043
10044 value = (splt->output_section->vma
10045 + splt->output_offset
10046 + plt_offset);
10047 *unresolved_reloc_p = FALSE;
10048 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10049 contents, rel->r_offset, value,
10050 rel->r_addend);
10051 }
10052
10053 /* When generating a shared object or relocatable executable, these
10054 relocations are copied into the output file to be resolved at
10055 run time. */
10056 if ((bfd_link_pic (info)
10057 || globals->root.is_relocatable_executable)
10058 && (input_section->flags & SEC_ALLOC)
10059 && !(globals->vxworks_p
10060 && strcmp (input_section->output_section->name,
10061 ".tls_vars") == 0)
10062 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
10063 || !SYMBOL_CALLS_LOCAL (info, h))
10064 && !(input_bfd == globals->stub_bfd
10065 && strstr (input_section->name, STUB_SUFFIX))
10066 && (h == NULL
10067 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
10068 || h->root.type != bfd_link_hash_undefweak)
10069 && r_type != R_ARM_PC24
10070 && r_type != R_ARM_CALL
10071 && r_type != R_ARM_JUMP24
10072 && r_type != R_ARM_PREL31
10073 && r_type != R_ARM_PLT32)
10074 {
10075 Elf_Internal_Rela outrel;
10076 bfd_boolean skip, relocate;
10077
10078 if ((r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
10079 && !h->def_regular)
10080 {
10081 char *v = _("shared object");
10082
10083 if (bfd_link_executable (info))
10084 v = _("PIE executable");
10085
10086 (*_bfd_error_handler)
10087 (_("%B: relocation %s against external or undefined symbol `%s'"
10088 " can not be used when making a %s; recompile with -fPIC"), input_bfd,
10089 elf32_arm_howto_table_1[r_type].name, h->root.root.string, v);
10090 return bfd_reloc_notsupported;
10091 }
10092
10093 *unresolved_reloc_p = FALSE;
10094
10095 if (sreloc == NULL && globals->root.dynamic_sections_created)
10096 {
10097 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
10098 ! globals->use_rel);
10099
10100 if (sreloc == NULL)
10101 return bfd_reloc_notsupported;
10102 }
10103
10104 skip = FALSE;
10105 relocate = FALSE;
10106
10107 outrel.r_addend = addend;
10108 outrel.r_offset =
10109 _bfd_elf_section_offset (output_bfd, info, input_section,
10110 rel->r_offset);
10111 if (outrel.r_offset == (bfd_vma) -1)
10112 skip = TRUE;
10113 else if (outrel.r_offset == (bfd_vma) -2)
10114 skip = TRUE, relocate = TRUE;
10115 outrel.r_offset += (input_section->output_section->vma
10116 + input_section->output_offset);
10117
10118 if (skip)
10119 memset (&outrel, 0, sizeof outrel);
10120 else if (h != NULL
10121 && h->dynindx != -1
10122 && (!bfd_link_pic (info)
10123 || !SYMBOLIC_BIND (info, h)
10124 || !h->def_regular))
10125 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
10126 else
10127 {
10128 int symbol;
10129
10130 /* This symbol is local, or marked to become local. */
10131 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI);
10132 if (globals->symbian_p)
10133 {
10134 asection *osec;
10135
10136 /* On Symbian OS, the data segment and text segement
10137 can be relocated independently. Therefore, we
10138 must indicate the segment to which this
10139 relocation is relative. The BPABI allows us to
10140 use any symbol in the right segment; we just use
10141 the section symbol as it is convenient. (We
10142 cannot use the symbol given by "h" directly as it
10143 will not appear in the dynamic symbol table.)
10144
10145 Note that the dynamic linker ignores the section
10146 symbol value, so we don't subtract osec->vma
10147 from the emitted reloc addend. */
10148 if (sym_sec)
10149 osec = sym_sec->output_section;
10150 else
10151 osec = input_section->output_section;
10152 symbol = elf_section_data (osec)->dynindx;
10153 if (symbol == 0)
10154 {
10155 struct elf_link_hash_table *htab = elf_hash_table (info);
10156
10157 if ((osec->flags & SEC_READONLY) == 0
10158 && htab->data_index_section != NULL)
10159 osec = htab->data_index_section;
10160 else
10161 osec = htab->text_index_section;
10162 symbol = elf_section_data (osec)->dynindx;
10163 }
10164 BFD_ASSERT (symbol != 0);
10165 }
10166 else
10167 /* On SVR4-ish systems, the dynamic loader cannot
10168 relocate the text and data segments independently,
10169 so the symbol does not matter. */
10170 symbol = 0;
10171 if (dynreloc_st_type == STT_GNU_IFUNC)
10172 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
10173 to the .iplt entry. Instead, every non-call reference
10174 must use an R_ARM_IRELATIVE relocation to obtain the
10175 correct run-time address. */
10176 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
10177 else
10178 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
10179 if (globals->use_rel)
10180 relocate = TRUE;
10181 else
10182 outrel.r_addend += dynreloc_value;
10183 }
10184
10185 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
10186
10187 /* If this reloc is against an external symbol, we do not want to
10188 fiddle with the addend. Otherwise, we need to include the symbol
10189 value so that it becomes an addend for the dynamic reloc. */
10190 if (! relocate)
10191 return bfd_reloc_ok;
10192
10193 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10194 contents, rel->r_offset,
10195 dynreloc_value, (bfd_vma) 0);
10196 }
10197 else switch (r_type)
10198 {
10199 case R_ARM_ABS12:
10200 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10201
10202 case R_ARM_XPC25: /* Arm BLX instruction. */
10203 case R_ARM_CALL:
10204 case R_ARM_JUMP24:
10205 case R_ARM_PC24: /* Arm B/BL instruction. */
10206 case R_ARM_PLT32:
10207 {
10208 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
10209
10210 if (r_type == R_ARM_XPC25)
10211 {
10212 /* Check for Arm calling Arm function. */
10213 /* FIXME: Should we translate the instruction into a BL
10214 instruction instead ? */
10215 if (branch_type != ST_BRANCH_TO_THUMB)
10216 (*_bfd_error_handler)
10217 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
10218 input_bfd,
10219 h ? h->root.root.string : "(local)");
10220 }
10221 else if (r_type == R_ARM_PC24)
10222 {
10223 /* Check for Arm calling Thumb function. */
10224 if (branch_type == ST_BRANCH_TO_THUMB)
10225 {
10226 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
10227 output_bfd, input_section,
10228 hit_data, sym_sec, rel->r_offset,
10229 signed_addend, value,
10230 error_message))
10231 return bfd_reloc_ok;
10232 else
10233 return bfd_reloc_dangerous;
10234 }
10235 }
10236
10237 /* Check if a stub has to be inserted because the
10238 destination is too far or we are changing mode. */
10239 if ( r_type == R_ARM_CALL
10240 || r_type == R_ARM_JUMP24
10241 || r_type == R_ARM_PLT32)
10242 {
10243 enum elf32_arm_stub_type stub_type = arm_stub_none;
10244 struct elf32_arm_link_hash_entry *hash;
10245
10246 hash = (struct elf32_arm_link_hash_entry *) h;
10247 stub_type = arm_type_of_stub (info, input_section, rel,
10248 st_type, &branch_type,
10249 hash, value, sym_sec,
10250 input_bfd, sym_name);
10251
10252 if (stub_type != arm_stub_none)
10253 {
10254 /* The target is out of reach, so redirect the
10255 branch to the local stub for this function. */
10256 stub_entry = elf32_arm_get_stub_entry (input_section,
10257 sym_sec, h,
10258 rel, globals,
10259 stub_type);
10260 {
10261 if (stub_entry != NULL)
10262 value = (stub_entry->stub_offset
10263 + stub_entry->stub_sec->output_offset
10264 + stub_entry->stub_sec->output_section->vma);
10265
10266 if (plt_offset != (bfd_vma) -1)
10267 *unresolved_reloc_p = FALSE;
10268 }
10269 }
10270 else
10271 {
10272 /* If the call goes through a PLT entry, make sure to
10273 check distance to the right destination address. */
10274 if (plt_offset != (bfd_vma) -1)
10275 {
10276 value = (splt->output_section->vma
10277 + splt->output_offset
10278 + plt_offset);
10279 *unresolved_reloc_p = FALSE;
10280 /* The PLT entry is in ARM mode, regardless of the
10281 target function. */
10282 branch_type = ST_BRANCH_TO_ARM;
10283 }
10284 }
10285 }
10286
10287 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
10288 where:
10289 S is the address of the symbol in the relocation.
10290 P is address of the instruction being relocated.
10291 A is the addend (extracted from the instruction) in bytes.
10292
10293 S is held in 'value'.
10294 P is the base address of the section containing the
10295 instruction plus the offset of the reloc into that
10296 section, ie:
10297 (input_section->output_section->vma +
10298 input_section->output_offset +
10299 rel->r_offset).
10300 A is the addend, converted into bytes, ie:
10301 (signed_addend * 4)
10302
10303 Note: None of these operations have knowledge of the pipeline
10304 size of the processor, thus it is up to the assembler to
10305 encode this information into the addend. */
10306 value -= (input_section->output_section->vma
10307 + input_section->output_offset);
10308 value -= rel->r_offset;
10309 if (globals->use_rel)
10310 value += (signed_addend << howto->size);
10311 else
10312 /* RELA addends do not have to be adjusted by howto->size. */
10313 value += signed_addend;
10314
10315 signed_addend = value;
10316 signed_addend >>= howto->rightshift;
10317
10318 /* A branch to an undefined weak symbol is turned into a jump to
10319 the next instruction unless a PLT entry will be created.
10320 Do the same for local undefined symbols (but not for STN_UNDEF).
10321 The jump to the next instruction is optimized as a NOP depending
10322 on the architecture. */
10323 if (h ? (h->root.type == bfd_link_hash_undefweak
10324 && plt_offset == (bfd_vma) -1)
10325 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
10326 {
10327 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
10328
10329 if (arch_has_arm_nop (globals))
10330 value |= 0x0320f000;
10331 else
10332 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
10333 }
10334 else
10335 {
10336 /* Perform a signed range check. */
10337 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
10338 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
10339 return bfd_reloc_overflow;
10340
10341 addend = (value & 2);
10342
10343 value = (signed_addend & howto->dst_mask)
10344 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
10345
10346 if (r_type == R_ARM_CALL)
10347 {
10348 /* Set the H bit in the BLX instruction. */
10349 if (branch_type == ST_BRANCH_TO_THUMB)
10350 {
10351 if (addend)
10352 value |= (1 << 24);
10353 else
10354 value &= ~(bfd_vma)(1 << 24);
10355 }
10356
10357 /* Select the correct instruction (BL or BLX). */
10358 /* Only if we are not handling a BL to a stub. In this
10359 case, mode switching is performed by the stub. */
10360 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
10361 value |= (1 << 28);
10362 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
10363 {
10364 value &= ~(bfd_vma)(1 << 28);
10365 value |= (1 << 24);
10366 }
10367 }
10368 }
10369 }
10370 break;
10371
10372 case R_ARM_ABS32:
10373 value += addend;
10374 if (branch_type == ST_BRANCH_TO_THUMB)
10375 value |= 1;
10376 break;
10377
10378 case R_ARM_ABS32_NOI:
10379 value += addend;
10380 break;
10381
10382 case R_ARM_REL32:
10383 value += addend;
10384 if (branch_type == ST_BRANCH_TO_THUMB)
10385 value |= 1;
10386 value -= (input_section->output_section->vma
10387 + input_section->output_offset + rel->r_offset);
10388 break;
10389
10390 case R_ARM_REL32_NOI:
10391 value += addend;
10392 value -= (input_section->output_section->vma
10393 + input_section->output_offset + rel->r_offset);
10394 break;
10395
10396 case R_ARM_PREL31:
10397 value -= (input_section->output_section->vma
10398 + input_section->output_offset + rel->r_offset);
10399 value += signed_addend;
10400 if (! h || h->root.type != bfd_link_hash_undefweak)
10401 {
10402 /* Check for overflow. */
10403 if ((value ^ (value >> 1)) & (1 << 30))
10404 return bfd_reloc_overflow;
10405 }
10406 value &= 0x7fffffff;
10407 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
10408 if (branch_type == ST_BRANCH_TO_THUMB)
10409 value |= 1;
10410 break;
10411 }
10412
10413 bfd_put_32 (input_bfd, value, hit_data);
10414 return bfd_reloc_ok;
10415
10416 case R_ARM_ABS8:
10417 /* PR 16202: Refectch the addend using the correct size. */
10418 if (globals->use_rel)
10419 addend = bfd_get_8 (input_bfd, hit_data);
10420 value += addend;
10421
10422 /* There is no way to tell whether the user intended to use a signed or
10423 unsigned addend. When checking for overflow we accept either,
10424 as specified by the AAELF. */
10425 if ((long) value > 0xff || (long) value < -0x80)
10426 return bfd_reloc_overflow;
10427
10428 bfd_put_8 (input_bfd, value, hit_data);
10429 return bfd_reloc_ok;
10430
10431 case R_ARM_ABS16:
10432 /* PR 16202: Refectch the addend using the correct size. */
10433 if (globals->use_rel)
10434 addend = bfd_get_16 (input_bfd, hit_data);
10435 value += addend;
10436
10437 /* See comment for R_ARM_ABS8. */
10438 if ((long) value > 0xffff || (long) value < -0x8000)
10439 return bfd_reloc_overflow;
10440
10441 bfd_put_16 (input_bfd, value, hit_data);
10442 return bfd_reloc_ok;
10443
10444 case R_ARM_THM_ABS5:
10445 /* Support ldr and str instructions for the thumb. */
10446 if (globals->use_rel)
10447 {
10448 /* Need to refetch addend. */
10449 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
10450 /* ??? Need to determine shift amount from operand size. */
10451 addend >>= howto->rightshift;
10452 }
10453 value += addend;
10454
10455 /* ??? Isn't value unsigned? */
10456 if ((long) value > 0x1f || (long) value < -0x10)
10457 return bfd_reloc_overflow;
10458
10459 /* ??? Value needs to be properly shifted into place first. */
10460 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
10461 bfd_put_16 (input_bfd, value, hit_data);
10462 return bfd_reloc_ok;
10463
10464 case R_ARM_THM_ALU_PREL_11_0:
10465 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
10466 {
10467 bfd_vma insn;
10468 bfd_signed_vma relocation;
10469
10470 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10471 | bfd_get_16 (input_bfd, hit_data + 2);
10472
10473 if (globals->use_rel)
10474 {
10475 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
10476 | ((insn & (1 << 26)) >> 15);
10477 if (insn & 0xf00000)
10478 signed_addend = -signed_addend;
10479 }
10480
10481 relocation = value + signed_addend;
10482 relocation -= Pa (input_section->output_section->vma
10483 + input_section->output_offset
10484 + rel->r_offset);
10485
10486 value = relocation;
10487
10488 if (value >= 0x1000)
10489 return bfd_reloc_overflow;
10490
10491 insn = (insn & 0xfb0f8f00) | (value & 0xff)
10492 | ((value & 0x700) << 4)
10493 | ((value & 0x800) << 15);
10494 if (relocation < 0)
10495 insn |= 0xa00000;
10496
10497 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10498 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10499
10500 return bfd_reloc_ok;
10501 }
10502
10503 case R_ARM_THM_PC8:
10504 /* PR 10073: This reloc is not generated by the GNU toolchain,
10505 but it is supported for compatibility with third party libraries
10506 generated by other compilers, specifically the ARM/IAR. */
10507 {
10508 bfd_vma insn;
10509 bfd_signed_vma relocation;
10510
10511 insn = bfd_get_16 (input_bfd, hit_data);
10512
10513 if (globals->use_rel)
10514 addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
10515
10516 relocation = value + addend;
10517 relocation -= Pa (input_section->output_section->vma
10518 + input_section->output_offset
10519 + rel->r_offset);
10520
10521 value = relocation;
10522
10523 /* We do not check for overflow of this reloc. Although strictly
10524 speaking this is incorrect, it appears to be necessary in order
10525 to work with IAR generated relocs. Since GCC and GAS do not
10526 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
10527 a problem for them. */
10528 value &= 0x3fc;
10529
10530 insn = (insn & 0xff00) | (value >> 2);
10531
10532 bfd_put_16 (input_bfd, insn, hit_data);
10533
10534 return bfd_reloc_ok;
10535 }
10536
10537 case R_ARM_THM_PC12:
10538 /* Corresponds to: ldr.w reg, [pc, #offset]. */
10539 {
10540 bfd_vma insn;
10541 bfd_signed_vma relocation;
10542
10543 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10544 | bfd_get_16 (input_bfd, hit_data + 2);
10545
10546 if (globals->use_rel)
10547 {
10548 signed_addend = insn & 0xfff;
10549 if (!(insn & (1 << 23)))
10550 signed_addend = -signed_addend;
10551 }
10552
10553 relocation = value + signed_addend;
10554 relocation -= Pa (input_section->output_section->vma
10555 + input_section->output_offset
10556 + rel->r_offset);
10557
10558 value = relocation;
10559
10560 if (value >= 0x1000)
10561 return bfd_reloc_overflow;
10562
10563 insn = (insn & 0xff7ff000) | value;
10564 if (relocation >= 0)
10565 insn |= (1 << 23);
10566
10567 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10568 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10569
10570 return bfd_reloc_ok;
10571 }
10572
10573 case R_ARM_THM_XPC22:
10574 case R_ARM_THM_CALL:
10575 case R_ARM_THM_JUMP24:
10576 /* Thumb BL (branch long instruction). */
10577 {
10578 bfd_vma relocation;
10579 bfd_vma reloc_sign;
10580 bfd_boolean overflow = FALSE;
10581 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
10582 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
10583 bfd_signed_vma reloc_signed_max;
10584 bfd_signed_vma reloc_signed_min;
10585 bfd_vma check;
10586 bfd_signed_vma signed_check;
10587 int bitsize;
10588 const int thumb2 = using_thumb2 (globals);
10589 const int thumb2_bl = using_thumb2_bl (globals);
10590
10591 /* A branch to an undefined weak symbol is turned into a jump to
10592 the next instruction unless a PLT entry will be created.
10593 The jump to the next instruction is optimized as a NOP.W for
10594 Thumb-2 enabled architectures. */
10595 if (h && h->root.type == bfd_link_hash_undefweak
10596 && plt_offset == (bfd_vma) -1)
10597 {
10598 if (thumb2)
10599 {
10600 bfd_put_16 (input_bfd, 0xf3af, hit_data);
10601 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
10602 }
10603 else
10604 {
10605 bfd_put_16 (input_bfd, 0xe000, hit_data);
10606 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
10607 }
10608 return bfd_reloc_ok;
10609 }
10610
10611 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
10612 with Thumb-1) involving the J1 and J2 bits. */
10613 if (globals->use_rel)
10614 {
10615 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
10616 bfd_vma upper = upper_insn & 0x3ff;
10617 bfd_vma lower = lower_insn & 0x7ff;
10618 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
10619 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
10620 bfd_vma i1 = j1 ^ s ? 0 : 1;
10621 bfd_vma i2 = j2 ^ s ? 0 : 1;
10622
10623 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
10624 /* Sign extend. */
10625 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
10626
10627 signed_addend = addend;
10628 }
10629
10630 if (r_type == R_ARM_THM_XPC22)
10631 {
10632 /* Check for Thumb to Thumb call. */
10633 /* FIXME: Should we translate the instruction into a BL
10634 instruction instead ? */
10635 if (branch_type == ST_BRANCH_TO_THUMB)
10636 (*_bfd_error_handler)
10637 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
10638 input_bfd,
10639 h ? h->root.root.string : "(local)");
10640 }
10641 else
10642 {
10643 /* If it is not a call to Thumb, assume call to Arm.
10644 If it is a call relative to a section name, then it is not a
10645 function call at all, but rather a long jump. Calls through
10646 the PLT do not require stubs. */
10647 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
10648 {
10649 if (globals->use_blx && r_type == R_ARM_THM_CALL)
10650 {
10651 /* Convert BL to BLX. */
10652 lower_insn = (lower_insn & ~0x1000) | 0x0800;
10653 }
10654 else if (( r_type != R_ARM_THM_CALL)
10655 && (r_type != R_ARM_THM_JUMP24))
10656 {
10657 if (elf32_thumb_to_arm_stub
10658 (info, sym_name, input_bfd, output_bfd, input_section,
10659 hit_data, sym_sec, rel->r_offset, signed_addend, value,
10660 error_message))
10661 return bfd_reloc_ok;
10662 else
10663 return bfd_reloc_dangerous;
10664 }
10665 }
10666 else if (branch_type == ST_BRANCH_TO_THUMB
10667 && globals->use_blx
10668 && r_type == R_ARM_THM_CALL)
10669 {
10670 /* Make sure this is a BL. */
10671 lower_insn |= 0x1800;
10672 }
10673 }
10674
10675 enum elf32_arm_stub_type stub_type = arm_stub_none;
10676 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
10677 {
10678 /* Check if a stub has to be inserted because the destination
10679 is too far. */
10680 struct elf32_arm_stub_hash_entry *stub_entry;
10681 struct elf32_arm_link_hash_entry *hash;
10682
10683 hash = (struct elf32_arm_link_hash_entry *) h;
10684
10685 stub_type = arm_type_of_stub (info, input_section, rel,
10686 st_type, &branch_type,
10687 hash, value, sym_sec,
10688 input_bfd, sym_name);
10689
10690 if (stub_type != arm_stub_none)
10691 {
10692 /* The target is out of reach or we are changing modes, so
10693 redirect the branch to the local stub for this
10694 function. */
10695 stub_entry = elf32_arm_get_stub_entry (input_section,
10696 sym_sec, h,
10697 rel, globals,
10698 stub_type);
10699 if (stub_entry != NULL)
10700 {
10701 value = (stub_entry->stub_offset
10702 + stub_entry->stub_sec->output_offset
10703 + stub_entry->stub_sec->output_section->vma);
10704
10705 if (plt_offset != (bfd_vma) -1)
10706 *unresolved_reloc_p = FALSE;
10707 }
10708
10709 /* If this call becomes a call to Arm, force BLX. */
10710 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
10711 {
10712 if ((stub_entry
10713 && !arm_stub_is_thumb (stub_entry->stub_type))
10714 || branch_type != ST_BRANCH_TO_THUMB)
10715 lower_insn = (lower_insn & ~0x1000) | 0x0800;
10716 }
10717 }
10718 }
10719
10720 /* Handle calls via the PLT. */
10721 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
10722 {
10723 value = (splt->output_section->vma
10724 + splt->output_offset
10725 + plt_offset);
10726
10727 if (globals->use_blx
10728 && r_type == R_ARM_THM_CALL
10729 && ! using_thumb_only (globals))
10730 {
10731 /* If the Thumb BLX instruction is available, convert
10732 the BL to a BLX instruction to call the ARM-mode
10733 PLT entry. */
10734 lower_insn = (lower_insn & ~0x1000) | 0x0800;
10735 branch_type = ST_BRANCH_TO_ARM;
10736 }
10737 else
10738 {
10739 if (! using_thumb_only (globals))
10740 /* Target the Thumb stub before the ARM PLT entry. */
10741 value -= PLT_THUMB_STUB_SIZE;
10742 branch_type = ST_BRANCH_TO_THUMB;
10743 }
10744 *unresolved_reloc_p = FALSE;
10745 }
10746
10747 relocation = value + signed_addend;
10748
10749 relocation -= (input_section->output_section->vma
10750 + input_section->output_offset
10751 + rel->r_offset);
10752
10753 check = relocation >> howto->rightshift;
10754
10755 /* If this is a signed value, the rightshift just dropped
10756 leading 1 bits (assuming twos complement). */
10757 if ((bfd_signed_vma) relocation >= 0)
10758 signed_check = check;
10759 else
10760 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
10761
10762 /* Calculate the permissable maximum and minimum values for
10763 this relocation according to whether we're relocating for
10764 Thumb-2 or not. */
10765 bitsize = howto->bitsize;
10766 if (!thumb2_bl)
10767 bitsize -= 2;
10768 reloc_signed_max = (1 << (bitsize - 1)) - 1;
10769 reloc_signed_min = ~reloc_signed_max;
10770
10771 /* Assumes two's complement. */
10772 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
10773 overflow = TRUE;
10774
10775 if ((lower_insn & 0x5000) == 0x4000)
10776 /* For a BLX instruction, make sure that the relocation is rounded up
10777 to a word boundary. This follows the semantics of the instruction
10778 which specifies that bit 1 of the target address will come from bit
10779 1 of the base address. */
10780 relocation = (relocation + 2) & ~ 3;
10781
10782 /* Put RELOCATION back into the insn. Assumes two's complement.
10783 We use the Thumb-2 encoding, which is safe even if dealing with
10784 a Thumb-1 instruction by virtue of our overflow check above. */
10785 reloc_sign = (signed_check < 0) ? 1 : 0;
10786 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
10787 | ((relocation >> 12) & 0x3ff)
10788 | (reloc_sign << 10);
10789 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
10790 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
10791 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
10792 | ((relocation >> 1) & 0x7ff);
10793
10794 /* Put the relocated value back in the object file: */
10795 bfd_put_16 (input_bfd, upper_insn, hit_data);
10796 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
10797
10798 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
10799 }
10800 break;
10801
10802 case R_ARM_THM_JUMP19:
10803 /* Thumb32 conditional branch instruction. */
10804 {
10805 bfd_vma relocation;
10806 bfd_boolean overflow = FALSE;
10807 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
10808 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
10809 bfd_signed_vma reloc_signed_max = 0xffffe;
10810 bfd_signed_vma reloc_signed_min = -0x100000;
10811 bfd_signed_vma signed_check;
10812 enum elf32_arm_stub_type stub_type = arm_stub_none;
10813 struct elf32_arm_stub_hash_entry *stub_entry;
10814 struct elf32_arm_link_hash_entry *hash;
10815
10816 /* Need to refetch the addend, reconstruct the top three bits,
10817 and squish the two 11 bit pieces together. */
10818 if (globals->use_rel)
10819 {
10820 bfd_vma S = (upper_insn & 0x0400) >> 10;
10821 bfd_vma upper = (upper_insn & 0x003f);
10822 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
10823 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
10824 bfd_vma lower = (lower_insn & 0x07ff);
10825
10826 upper |= J1 << 6;
10827 upper |= J2 << 7;
10828 upper |= (!S) << 8;
10829 upper -= 0x0100; /* Sign extend. */
10830
10831 addend = (upper << 12) | (lower << 1);
10832 signed_addend = addend;
10833 }
10834
10835 /* Handle calls via the PLT. */
10836 if (plt_offset != (bfd_vma) -1)
10837 {
10838 value = (splt->output_section->vma
10839 + splt->output_offset
10840 + plt_offset);
10841 /* Target the Thumb stub before the ARM PLT entry. */
10842 value -= PLT_THUMB_STUB_SIZE;
10843 *unresolved_reloc_p = FALSE;
10844 }
10845
10846 hash = (struct elf32_arm_link_hash_entry *)h;
10847
10848 stub_type = arm_type_of_stub (info, input_section, rel,
10849 st_type, &branch_type,
10850 hash, value, sym_sec,
10851 input_bfd, sym_name);
10852 if (stub_type != arm_stub_none)
10853 {
10854 stub_entry = elf32_arm_get_stub_entry (input_section,
10855 sym_sec, h,
10856 rel, globals,
10857 stub_type);
10858 if (stub_entry != NULL)
10859 {
10860 value = (stub_entry->stub_offset
10861 + stub_entry->stub_sec->output_offset
10862 + stub_entry->stub_sec->output_section->vma);
10863 }
10864 }
10865
10866 relocation = value + signed_addend;
10867 relocation -= (input_section->output_section->vma
10868 + input_section->output_offset
10869 + rel->r_offset);
10870 signed_check = (bfd_signed_vma) relocation;
10871
10872 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
10873 overflow = TRUE;
10874
10875 /* Put RELOCATION back into the insn. */
10876 {
10877 bfd_vma S = (relocation & 0x00100000) >> 20;
10878 bfd_vma J2 = (relocation & 0x00080000) >> 19;
10879 bfd_vma J1 = (relocation & 0x00040000) >> 18;
10880 bfd_vma hi = (relocation & 0x0003f000) >> 12;
10881 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
10882
10883 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
10884 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
10885 }
10886
10887 /* Put the relocated value back in the object file: */
10888 bfd_put_16 (input_bfd, upper_insn, hit_data);
10889 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
10890
10891 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
10892 }
10893
10894 case R_ARM_THM_JUMP11:
10895 case R_ARM_THM_JUMP8:
10896 case R_ARM_THM_JUMP6:
10897 /* Thumb B (branch) instruction). */
10898 {
10899 bfd_signed_vma relocation;
10900 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
10901 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
10902 bfd_signed_vma signed_check;
10903
10904 /* CZB cannot jump backward. */
10905 if (r_type == R_ARM_THM_JUMP6)
10906 reloc_signed_min = 0;
10907
10908 if (globals->use_rel)
10909 {
10910 /* Need to refetch addend. */
10911 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
10912 if (addend & ((howto->src_mask + 1) >> 1))
10913 {
10914 signed_addend = -1;
10915 signed_addend &= ~ howto->src_mask;
10916 signed_addend |= addend;
10917 }
10918 else
10919 signed_addend = addend;
10920 /* The value in the insn has been right shifted. We need to
10921 undo this, so that we can perform the address calculation
10922 in terms of bytes. */
10923 signed_addend <<= howto->rightshift;
10924 }
10925 relocation = value + signed_addend;
10926
10927 relocation -= (input_section->output_section->vma
10928 + input_section->output_offset
10929 + rel->r_offset);
10930
10931 relocation >>= howto->rightshift;
10932 signed_check = relocation;
10933
10934 if (r_type == R_ARM_THM_JUMP6)
10935 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
10936 else
10937 relocation &= howto->dst_mask;
10938 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
10939
10940 bfd_put_16 (input_bfd, relocation, hit_data);
10941
10942 /* Assumes two's complement. */
10943 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
10944 return bfd_reloc_overflow;
10945
10946 return bfd_reloc_ok;
10947 }
10948
10949 case R_ARM_ALU_PCREL7_0:
10950 case R_ARM_ALU_PCREL15_8:
10951 case R_ARM_ALU_PCREL23_15:
10952 {
10953 bfd_vma insn;
10954 bfd_vma relocation;
10955
10956 insn = bfd_get_32 (input_bfd, hit_data);
10957 if (globals->use_rel)
10958 {
10959 /* Extract the addend. */
10960 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
10961 signed_addend = addend;
10962 }
10963 relocation = value + signed_addend;
10964
10965 relocation -= (input_section->output_section->vma
10966 + input_section->output_offset
10967 + rel->r_offset);
10968 insn = (insn & ~0xfff)
10969 | ((howto->bitpos << 7) & 0xf00)
10970 | ((relocation >> howto->bitpos) & 0xff);
10971 bfd_put_32 (input_bfd, value, hit_data);
10972 }
10973 return bfd_reloc_ok;
10974
10975 case R_ARM_GNU_VTINHERIT:
10976 case R_ARM_GNU_VTENTRY:
10977 return bfd_reloc_ok;
10978
10979 case R_ARM_GOTOFF32:
10980 /* Relocation is relative to the start of the
10981 global offset table. */
10982
10983 BFD_ASSERT (sgot != NULL);
10984 if (sgot == NULL)
10985 return bfd_reloc_notsupported;
10986
10987 /* If we are addressing a Thumb function, we need to adjust the
10988 address by one, so that attempts to call the function pointer will
10989 correctly interpret it as Thumb code. */
10990 if (branch_type == ST_BRANCH_TO_THUMB)
10991 value += 1;
10992
10993 /* Note that sgot->output_offset is not involved in this
10994 calculation. We always want the start of .got. If we
10995 define _GLOBAL_OFFSET_TABLE in a different way, as is
10996 permitted by the ABI, we might have to change this
10997 calculation. */
10998 value -= sgot->output_section->vma;
10999 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11000 contents, rel->r_offset, value,
11001 rel->r_addend);
11002
11003 case R_ARM_GOTPC:
11004 /* Use global offset table as symbol value. */
11005 BFD_ASSERT (sgot != NULL);
11006
11007 if (sgot == NULL)
11008 return bfd_reloc_notsupported;
11009
11010 *unresolved_reloc_p = FALSE;
11011 value = sgot->output_section->vma;
11012 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11013 contents, rel->r_offset, value,
11014 rel->r_addend);
11015
11016 case R_ARM_GOT32:
11017 case R_ARM_GOT_PREL:
11018 /* Relocation is to the entry for this symbol in the
11019 global offset table. */
11020 if (sgot == NULL)
11021 return bfd_reloc_notsupported;
11022
11023 if (dynreloc_st_type == STT_GNU_IFUNC
11024 && plt_offset != (bfd_vma) -1
11025 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
11026 {
11027 /* We have a relocation against a locally-binding STT_GNU_IFUNC
11028 symbol, and the relocation resolves directly to the runtime
11029 target rather than to the .iplt entry. This means that any
11030 .got entry would be the same value as the .igot.plt entry,
11031 so there's no point creating both. */
11032 sgot = globals->root.igotplt;
11033 value = sgot->output_offset + gotplt_offset;
11034 }
11035 else if (h != NULL)
11036 {
11037 bfd_vma off;
11038
11039 off = h->got.offset;
11040 BFD_ASSERT (off != (bfd_vma) -1);
11041 if ((off & 1) != 0)
11042 {
11043 /* We have already processsed one GOT relocation against
11044 this symbol. */
11045 off &= ~1;
11046 if (globals->root.dynamic_sections_created
11047 && !SYMBOL_REFERENCES_LOCAL (info, h))
11048 *unresolved_reloc_p = FALSE;
11049 }
11050 else
11051 {
11052 Elf_Internal_Rela outrel;
11053
11054 if (h->dynindx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
11055 {
11056 /* If the symbol doesn't resolve locally in a static
11057 object, we have an undefined reference. If the
11058 symbol doesn't resolve locally in a dynamic object,
11059 it should be resolved by the dynamic linker. */
11060 if (globals->root.dynamic_sections_created)
11061 {
11062 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
11063 *unresolved_reloc_p = FALSE;
11064 }
11065 else
11066 outrel.r_info = 0;
11067 outrel.r_addend = 0;
11068 }
11069 else
11070 {
11071 if (dynreloc_st_type == STT_GNU_IFUNC)
11072 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11073 else if (bfd_link_pic (info) &&
11074 (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11075 || h->root.type != bfd_link_hash_undefweak))
11076 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11077 else
11078 outrel.r_info = 0;
11079 outrel.r_addend = dynreloc_value;
11080 }
11081
11082 /* The GOT entry is initialized to zero by default.
11083 See if we should install a different value. */
11084 if (outrel.r_addend != 0
11085 && (outrel.r_info == 0 || globals->use_rel))
11086 {
11087 bfd_put_32 (output_bfd, outrel.r_addend,
11088 sgot->contents + off);
11089 outrel.r_addend = 0;
11090 }
11091
11092 if (outrel.r_info != 0)
11093 {
11094 outrel.r_offset = (sgot->output_section->vma
11095 + sgot->output_offset
11096 + off);
11097 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11098 }
11099 h->got.offset |= 1;
11100 }
11101 value = sgot->output_offset + off;
11102 }
11103 else
11104 {
11105 bfd_vma off;
11106
11107 BFD_ASSERT (local_got_offsets != NULL &&
11108 local_got_offsets[r_symndx] != (bfd_vma) -1);
11109
11110 off = local_got_offsets[r_symndx];
11111
11112 /* The offset must always be a multiple of 4. We use the
11113 least significant bit to record whether we have already
11114 generated the necessary reloc. */
11115 if ((off & 1) != 0)
11116 off &= ~1;
11117 else
11118 {
11119 if (globals->use_rel)
11120 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
11121
11122 if (bfd_link_pic (info) || dynreloc_st_type == STT_GNU_IFUNC)
11123 {
11124 Elf_Internal_Rela outrel;
11125
11126 outrel.r_addend = addend + dynreloc_value;
11127 outrel.r_offset = (sgot->output_section->vma
11128 + sgot->output_offset
11129 + off);
11130 if (dynreloc_st_type == STT_GNU_IFUNC)
11131 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11132 else
11133 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11134 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11135 }
11136
11137 local_got_offsets[r_symndx] |= 1;
11138 }
11139
11140 value = sgot->output_offset + off;
11141 }
11142 if (r_type != R_ARM_GOT32)
11143 value += sgot->output_section->vma;
11144
11145 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11146 contents, rel->r_offset, value,
11147 rel->r_addend);
11148
11149 case R_ARM_TLS_LDO32:
11150 value = value - dtpoff_base (info);
11151
11152 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11153 contents, rel->r_offset, value,
11154 rel->r_addend);
11155
11156 case R_ARM_TLS_LDM32:
11157 {
11158 bfd_vma off;
11159
11160 if (sgot == NULL)
11161 abort ();
11162
11163 off = globals->tls_ldm_got.offset;
11164
11165 if ((off & 1) != 0)
11166 off &= ~1;
11167 else
11168 {
11169 /* If we don't know the module number, create a relocation
11170 for it. */
11171 if (bfd_link_pic (info))
11172 {
11173 Elf_Internal_Rela outrel;
11174
11175 if (srelgot == NULL)
11176 abort ();
11177
11178 outrel.r_addend = 0;
11179 outrel.r_offset = (sgot->output_section->vma
11180 + sgot->output_offset + off);
11181 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
11182
11183 if (globals->use_rel)
11184 bfd_put_32 (output_bfd, outrel.r_addend,
11185 sgot->contents + off);
11186
11187 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11188 }
11189 else
11190 bfd_put_32 (output_bfd, 1, sgot->contents + off);
11191
11192 globals->tls_ldm_got.offset |= 1;
11193 }
11194
11195 value = sgot->output_section->vma + sgot->output_offset + off
11196 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
11197
11198 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11199 contents, rel->r_offset, value,
11200 rel->r_addend);
11201 }
11202
11203 case R_ARM_TLS_CALL:
11204 case R_ARM_THM_TLS_CALL:
11205 case R_ARM_TLS_GD32:
11206 case R_ARM_TLS_IE32:
11207 case R_ARM_TLS_GOTDESC:
11208 case R_ARM_TLS_DESCSEQ:
11209 case R_ARM_THM_TLS_DESCSEQ:
11210 {
11211 bfd_vma off, offplt;
11212 int indx = 0;
11213 char tls_type;
11214
11215 BFD_ASSERT (sgot != NULL);
11216
11217 if (h != NULL)
11218 {
11219 bfd_boolean dyn;
11220 dyn = globals->root.dynamic_sections_created;
11221 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
11222 bfd_link_pic (info),
11223 h)
11224 && (!bfd_link_pic (info)
11225 || !SYMBOL_REFERENCES_LOCAL (info, h)))
11226 {
11227 *unresolved_reloc_p = FALSE;
11228 indx = h->dynindx;
11229 }
11230 off = h->got.offset;
11231 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
11232 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
11233 }
11234 else
11235 {
11236 BFD_ASSERT (local_got_offsets != NULL);
11237 off = local_got_offsets[r_symndx];
11238 offplt = local_tlsdesc_gotents[r_symndx];
11239 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
11240 }
11241
11242 /* Linker relaxations happens from one of the
11243 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
11244 if (ELF32_R_TYPE(rel->r_info) != r_type)
11245 tls_type = GOT_TLS_IE;
11246
11247 BFD_ASSERT (tls_type != GOT_UNKNOWN);
11248
11249 if ((off & 1) != 0)
11250 off &= ~1;
11251 else
11252 {
11253 bfd_boolean need_relocs = FALSE;
11254 Elf_Internal_Rela outrel;
11255 int cur_off = off;
11256
11257 /* The GOT entries have not been initialized yet. Do it
11258 now, and emit any relocations. If both an IE GOT and a
11259 GD GOT are necessary, we emit the GD first. */
11260
11261 if ((bfd_link_pic (info) || indx != 0)
11262 && (h == NULL
11263 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11264 || h->root.type != bfd_link_hash_undefweak))
11265 {
11266 need_relocs = TRUE;
11267 BFD_ASSERT (srelgot != NULL);
11268 }
11269
11270 if (tls_type & GOT_TLS_GDESC)
11271 {
11272 bfd_byte *loc;
11273
11274 /* We should have relaxed, unless this is an undefined
11275 weak symbol. */
11276 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
11277 || bfd_link_pic (info));
11278 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
11279 <= globals->root.sgotplt->size);
11280
11281 outrel.r_addend = 0;
11282 outrel.r_offset = (globals->root.sgotplt->output_section->vma
11283 + globals->root.sgotplt->output_offset
11284 + offplt
11285 + globals->sgotplt_jump_table_size);
11286
11287 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
11288 sreloc = globals->root.srelplt;
11289 loc = sreloc->contents;
11290 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
11291 BFD_ASSERT (loc + RELOC_SIZE (globals)
11292 <= sreloc->contents + sreloc->size);
11293
11294 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
11295
11296 /* For globals, the first word in the relocation gets
11297 the relocation index and the top bit set, or zero,
11298 if we're binding now. For locals, it gets the
11299 symbol's offset in the tls section. */
11300 bfd_put_32 (output_bfd,
11301 !h ? value - elf_hash_table (info)->tls_sec->vma
11302 : info->flags & DF_BIND_NOW ? 0
11303 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
11304 globals->root.sgotplt->contents + offplt
11305 + globals->sgotplt_jump_table_size);
11306
11307 /* Second word in the relocation is always zero. */
11308 bfd_put_32 (output_bfd, 0,
11309 globals->root.sgotplt->contents + offplt
11310 + globals->sgotplt_jump_table_size + 4);
11311 }
11312 if (tls_type & GOT_TLS_GD)
11313 {
11314 if (need_relocs)
11315 {
11316 outrel.r_addend = 0;
11317 outrel.r_offset = (sgot->output_section->vma
11318 + sgot->output_offset
11319 + cur_off);
11320 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
11321
11322 if (globals->use_rel)
11323 bfd_put_32 (output_bfd, outrel.r_addend,
11324 sgot->contents + cur_off);
11325
11326 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11327
11328 if (indx == 0)
11329 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11330 sgot->contents + cur_off + 4);
11331 else
11332 {
11333 outrel.r_addend = 0;
11334 outrel.r_info = ELF32_R_INFO (indx,
11335 R_ARM_TLS_DTPOFF32);
11336 outrel.r_offset += 4;
11337
11338 if (globals->use_rel)
11339 bfd_put_32 (output_bfd, outrel.r_addend,
11340 sgot->contents + cur_off + 4);
11341
11342 elf32_arm_add_dynreloc (output_bfd, info,
11343 srelgot, &outrel);
11344 }
11345 }
11346 else
11347 {
11348 /* If we are not emitting relocations for a
11349 general dynamic reference, then we must be in a
11350 static link or an executable link with the
11351 symbol binding locally. Mark it as belonging
11352 to module 1, the executable. */
11353 bfd_put_32 (output_bfd, 1,
11354 sgot->contents + cur_off);
11355 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11356 sgot->contents + cur_off + 4);
11357 }
11358
11359 cur_off += 8;
11360 }
11361
11362 if (tls_type & GOT_TLS_IE)
11363 {
11364 if (need_relocs)
11365 {
11366 if (indx == 0)
11367 outrel.r_addend = value - dtpoff_base (info);
11368 else
11369 outrel.r_addend = 0;
11370 outrel.r_offset = (sgot->output_section->vma
11371 + sgot->output_offset
11372 + cur_off);
11373 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
11374
11375 if (globals->use_rel)
11376 bfd_put_32 (output_bfd, outrel.r_addend,
11377 sgot->contents + cur_off);
11378
11379 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11380 }
11381 else
11382 bfd_put_32 (output_bfd, tpoff (info, value),
11383 sgot->contents + cur_off);
11384 cur_off += 4;
11385 }
11386
11387 if (h != NULL)
11388 h->got.offset |= 1;
11389 else
11390 local_got_offsets[r_symndx] |= 1;
11391 }
11392
11393 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
11394 off += 8;
11395 else if (tls_type & GOT_TLS_GDESC)
11396 off = offplt;
11397
11398 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
11399 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
11400 {
11401 bfd_signed_vma offset;
11402 /* TLS stubs are arm mode. The original symbol is a
11403 data object, so branch_type is bogus. */
11404 branch_type = ST_BRANCH_TO_ARM;
11405 enum elf32_arm_stub_type stub_type
11406 = arm_type_of_stub (info, input_section, rel,
11407 st_type, &branch_type,
11408 (struct elf32_arm_link_hash_entry *)h,
11409 globals->tls_trampoline, globals->root.splt,
11410 input_bfd, sym_name);
11411
11412 if (stub_type != arm_stub_none)
11413 {
11414 struct elf32_arm_stub_hash_entry *stub_entry
11415 = elf32_arm_get_stub_entry
11416 (input_section, globals->root.splt, 0, rel,
11417 globals, stub_type);
11418 offset = (stub_entry->stub_offset
11419 + stub_entry->stub_sec->output_offset
11420 + stub_entry->stub_sec->output_section->vma);
11421 }
11422 else
11423 offset = (globals->root.splt->output_section->vma
11424 + globals->root.splt->output_offset
11425 + globals->tls_trampoline);
11426
11427 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
11428 {
11429 unsigned long inst;
11430
11431 offset -= (input_section->output_section->vma
11432 + input_section->output_offset
11433 + rel->r_offset + 8);
11434
11435 inst = offset >> 2;
11436 inst &= 0x00ffffff;
11437 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
11438 }
11439 else
11440 {
11441 /* Thumb blx encodes the offset in a complicated
11442 fashion. */
11443 unsigned upper_insn, lower_insn;
11444 unsigned neg;
11445
11446 offset -= (input_section->output_section->vma
11447 + input_section->output_offset
11448 + rel->r_offset + 4);
11449
11450 if (stub_type != arm_stub_none
11451 && arm_stub_is_thumb (stub_type))
11452 {
11453 lower_insn = 0xd000;
11454 }
11455 else
11456 {
11457 lower_insn = 0xc000;
11458 /* Round up the offset to a word boundary. */
11459 offset = (offset + 2) & ~2;
11460 }
11461
11462 neg = offset < 0;
11463 upper_insn = (0xf000
11464 | ((offset >> 12) & 0x3ff)
11465 | (neg << 10));
11466 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
11467 | (((!((offset >> 22) & 1)) ^ neg) << 11)
11468 | ((offset >> 1) & 0x7ff);
11469 bfd_put_16 (input_bfd, upper_insn, hit_data);
11470 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11471 return bfd_reloc_ok;
11472 }
11473 }
11474 /* These relocations needs special care, as besides the fact
11475 they point somewhere in .gotplt, the addend must be
11476 adjusted accordingly depending on the type of instruction
11477 we refer to. */
11478 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
11479 {
11480 unsigned long data, insn;
11481 unsigned thumb;
11482
11483 data = bfd_get_32 (input_bfd, hit_data);
11484 thumb = data & 1;
11485 data &= ~1u;
11486
11487 if (thumb)
11488 {
11489 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
11490 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
11491 insn = (insn << 16)
11492 | bfd_get_16 (input_bfd,
11493 contents + rel->r_offset - data + 2);
11494 if ((insn & 0xf800c000) == 0xf000c000)
11495 /* bl/blx */
11496 value = -6;
11497 else if ((insn & 0xffffff00) == 0x4400)
11498 /* add */
11499 value = -5;
11500 else
11501 {
11502 (*_bfd_error_handler)
11503 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"),
11504 input_bfd, input_section,
11505 (unsigned long)rel->r_offset, insn);
11506 return bfd_reloc_notsupported;
11507 }
11508 }
11509 else
11510 {
11511 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
11512
11513 switch (insn >> 24)
11514 {
11515 case 0xeb: /* bl */
11516 case 0xfa: /* blx */
11517 value = -4;
11518 break;
11519
11520 case 0xe0: /* add */
11521 value = -8;
11522 break;
11523
11524 default:
11525 (*_bfd_error_handler)
11526 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
11527 input_bfd, input_section,
11528 (unsigned long)rel->r_offset, insn);
11529 return bfd_reloc_notsupported;
11530 }
11531 }
11532
11533 value += ((globals->root.sgotplt->output_section->vma
11534 + globals->root.sgotplt->output_offset + off)
11535 - (input_section->output_section->vma
11536 + input_section->output_offset
11537 + rel->r_offset)
11538 + globals->sgotplt_jump_table_size);
11539 }
11540 else
11541 value = ((globals->root.sgot->output_section->vma
11542 + globals->root.sgot->output_offset + off)
11543 - (input_section->output_section->vma
11544 + input_section->output_offset + rel->r_offset));
11545
11546 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11547 contents, rel->r_offset, value,
11548 rel->r_addend);
11549 }
11550
11551 case R_ARM_TLS_LE32:
11552 if (bfd_link_dll (info))
11553 {
11554 (*_bfd_error_handler)
11555 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
11556 input_bfd, input_section,
11557 (long) rel->r_offset, howto->name);
11558 return bfd_reloc_notsupported;
11559 }
11560 else
11561 value = tpoff (info, value);
11562
11563 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11564 contents, rel->r_offset, value,
11565 rel->r_addend);
11566
11567 case R_ARM_V4BX:
11568 if (globals->fix_v4bx)
11569 {
11570 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11571
11572 /* Ensure that we have a BX instruction. */
11573 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
11574
11575 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
11576 {
11577 /* Branch to veneer. */
11578 bfd_vma glue_addr;
11579 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
11580 glue_addr -= input_section->output_section->vma
11581 + input_section->output_offset
11582 + rel->r_offset + 8;
11583 insn = (insn & 0xf0000000) | 0x0a000000
11584 | ((glue_addr >> 2) & 0x00ffffff);
11585 }
11586 else
11587 {
11588 /* Preserve Rm (lowest four bits) and the condition code
11589 (highest four bits). Other bits encode MOV PC,Rm. */
11590 insn = (insn & 0xf000000f) | 0x01a0f000;
11591 }
11592
11593 bfd_put_32 (input_bfd, insn, hit_data);
11594 }
11595 return bfd_reloc_ok;
11596
11597 case R_ARM_MOVW_ABS_NC:
11598 case R_ARM_MOVT_ABS:
11599 case R_ARM_MOVW_PREL_NC:
11600 case R_ARM_MOVT_PREL:
11601 /* Until we properly support segment-base-relative addressing then
11602 we assume the segment base to be zero, as for the group relocations.
11603 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
11604 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
11605 case R_ARM_MOVW_BREL_NC:
11606 case R_ARM_MOVW_BREL:
11607 case R_ARM_MOVT_BREL:
11608 {
11609 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11610
11611 if (globals->use_rel)
11612 {
11613 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
11614 signed_addend = (addend ^ 0x8000) - 0x8000;
11615 }
11616
11617 value += signed_addend;
11618
11619 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
11620 value -= (input_section->output_section->vma
11621 + input_section->output_offset + rel->r_offset);
11622
11623 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
11624 return bfd_reloc_overflow;
11625
11626 if (branch_type == ST_BRANCH_TO_THUMB)
11627 value |= 1;
11628
11629 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
11630 || r_type == R_ARM_MOVT_BREL)
11631 value >>= 16;
11632
11633 insn &= 0xfff0f000;
11634 insn |= value & 0xfff;
11635 insn |= (value & 0xf000) << 4;
11636 bfd_put_32 (input_bfd, insn, hit_data);
11637 }
11638 return bfd_reloc_ok;
11639
11640 case R_ARM_THM_MOVW_ABS_NC:
11641 case R_ARM_THM_MOVT_ABS:
11642 case R_ARM_THM_MOVW_PREL_NC:
11643 case R_ARM_THM_MOVT_PREL:
11644 /* Until we properly support segment-base-relative addressing then
11645 we assume the segment base to be zero, as for the above relocations.
11646 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
11647 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
11648 as R_ARM_THM_MOVT_ABS. */
11649 case R_ARM_THM_MOVW_BREL_NC:
11650 case R_ARM_THM_MOVW_BREL:
11651 case R_ARM_THM_MOVT_BREL:
11652 {
11653 bfd_vma insn;
11654
11655 insn = bfd_get_16 (input_bfd, hit_data) << 16;
11656 insn |= bfd_get_16 (input_bfd, hit_data + 2);
11657
11658 if (globals->use_rel)
11659 {
11660 addend = ((insn >> 4) & 0xf000)
11661 | ((insn >> 15) & 0x0800)
11662 | ((insn >> 4) & 0x0700)
11663 | (insn & 0x00ff);
11664 signed_addend = (addend ^ 0x8000) - 0x8000;
11665 }
11666
11667 value += signed_addend;
11668
11669 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
11670 value -= (input_section->output_section->vma
11671 + input_section->output_offset + rel->r_offset);
11672
11673 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
11674 return bfd_reloc_overflow;
11675
11676 if (branch_type == ST_BRANCH_TO_THUMB)
11677 value |= 1;
11678
11679 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
11680 || r_type == R_ARM_THM_MOVT_BREL)
11681 value >>= 16;
11682
11683 insn &= 0xfbf08f00;
11684 insn |= (value & 0xf000) << 4;
11685 insn |= (value & 0x0800) << 15;
11686 insn |= (value & 0x0700) << 4;
11687 insn |= (value & 0x00ff);
11688
11689 bfd_put_16 (input_bfd, insn >> 16, hit_data);
11690 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
11691 }
11692 return bfd_reloc_ok;
11693
11694 case R_ARM_ALU_PC_G0_NC:
11695 case R_ARM_ALU_PC_G1_NC:
11696 case R_ARM_ALU_PC_G0:
11697 case R_ARM_ALU_PC_G1:
11698 case R_ARM_ALU_PC_G2:
11699 case R_ARM_ALU_SB_G0_NC:
11700 case R_ARM_ALU_SB_G1_NC:
11701 case R_ARM_ALU_SB_G0:
11702 case R_ARM_ALU_SB_G1:
11703 case R_ARM_ALU_SB_G2:
11704 {
11705 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11706 bfd_vma pc = input_section->output_section->vma
11707 + input_section->output_offset + rel->r_offset;
11708 /* sb is the origin of the *segment* containing the symbol. */
11709 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
11710 bfd_vma residual;
11711 bfd_vma g_n;
11712 bfd_signed_vma signed_value;
11713 int group = 0;
11714
11715 /* Determine which group of bits to select. */
11716 switch (r_type)
11717 {
11718 case R_ARM_ALU_PC_G0_NC:
11719 case R_ARM_ALU_PC_G0:
11720 case R_ARM_ALU_SB_G0_NC:
11721 case R_ARM_ALU_SB_G0:
11722 group = 0;
11723 break;
11724
11725 case R_ARM_ALU_PC_G1_NC:
11726 case R_ARM_ALU_PC_G1:
11727 case R_ARM_ALU_SB_G1_NC:
11728 case R_ARM_ALU_SB_G1:
11729 group = 1;
11730 break;
11731
11732 case R_ARM_ALU_PC_G2:
11733 case R_ARM_ALU_SB_G2:
11734 group = 2;
11735 break;
11736
11737 default:
11738 abort ();
11739 }
11740
11741 /* If REL, extract the addend from the insn. If RELA, it will
11742 have already been fetched for us. */
11743 if (globals->use_rel)
11744 {
11745 int negative;
11746 bfd_vma constant = insn & 0xff;
11747 bfd_vma rotation = (insn & 0xf00) >> 8;
11748
11749 if (rotation == 0)
11750 signed_addend = constant;
11751 else
11752 {
11753 /* Compensate for the fact that in the instruction, the
11754 rotation is stored in multiples of 2 bits. */
11755 rotation *= 2;
11756
11757 /* Rotate "constant" right by "rotation" bits. */
11758 signed_addend = (constant >> rotation) |
11759 (constant << (8 * sizeof (bfd_vma) - rotation));
11760 }
11761
11762 /* Determine if the instruction is an ADD or a SUB.
11763 (For REL, this determines the sign of the addend.) */
11764 negative = identify_add_or_sub (insn);
11765 if (negative == 0)
11766 {
11767 (*_bfd_error_handler)
11768 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
11769 input_bfd, input_section,
11770 (long) rel->r_offset, howto->name);
11771 return bfd_reloc_overflow;
11772 }
11773
11774 signed_addend *= negative;
11775 }
11776
11777 /* Compute the value (X) to go in the place. */
11778 if (r_type == R_ARM_ALU_PC_G0_NC
11779 || r_type == R_ARM_ALU_PC_G1_NC
11780 || r_type == R_ARM_ALU_PC_G0
11781 || r_type == R_ARM_ALU_PC_G1
11782 || r_type == R_ARM_ALU_PC_G2)
11783 /* PC relative. */
11784 signed_value = value - pc + signed_addend;
11785 else
11786 /* Section base relative. */
11787 signed_value = value - sb + signed_addend;
11788
11789 /* If the target symbol is a Thumb function, then set the
11790 Thumb bit in the address. */
11791 if (branch_type == ST_BRANCH_TO_THUMB)
11792 signed_value |= 1;
11793
11794 /* Calculate the value of the relevant G_n, in encoded
11795 constant-with-rotation format. */
11796 g_n = calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
11797 group, &residual);
11798
11799 /* Check for overflow if required. */
11800 if ((r_type == R_ARM_ALU_PC_G0
11801 || r_type == R_ARM_ALU_PC_G1
11802 || r_type == R_ARM_ALU_PC_G2
11803 || r_type == R_ARM_ALU_SB_G0
11804 || r_type == R_ARM_ALU_SB_G1
11805 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
11806 {
11807 (*_bfd_error_handler)
11808 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
11809 input_bfd, input_section,
11810 (long) rel->r_offset, signed_value < 0 ? - signed_value : signed_value,
11811 howto->name);
11812 return bfd_reloc_overflow;
11813 }
11814
11815 /* Mask out the value and the ADD/SUB part of the opcode; take care
11816 not to destroy the S bit. */
11817 insn &= 0xff1ff000;
11818
11819 /* Set the opcode according to whether the value to go in the
11820 place is negative. */
11821 if (signed_value < 0)
11822 insn |= 1 << 22;
11823 else
11824 insn |= 1 << 23;
11825
11826 /* Encode the offset. */
11827 insn |= g_n;
11828
11829 bfd_put_32 (input_bfd, insn, hit_data);
11830 }
11831 return bfd_reloc_ok;
11832
11833 case R_ARM_LDR_PC_G0:
11834 case R_ARM_LDR_PC_G1:
11835 case R_ARM_LDR_PC_G2:
11836 case R_ARM_LDR_SB_G0:
11837 case R_ARM_LDR_SB_G1:
11838 case R_ARM_LDR_SB_G2:
11839 {
11840 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11841 bfd_vma pc = input_section->output_section->vma
11842 + input_section->output_offset + rel->r_offset;
11843 /* sb is the origin of the *segment* containing the symbol. */
11844 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
11845 bfd_vma residual;
11846 bfd_signed_vma signed_value;
11847 int group = 0;
11848
11849 /* Determine which groups of bits to calculate. */
11850 switch (r_type)
11851 {
11852 case R_ARM_LDR_PC_G0:
11853 case R_ARM_LDR_SB_G0:
11854 group = 0;
11855 break;
11856
11857 case R_ARM_LDR_PC_G1:
11858 case R_ARM_LDR_SB_G1:
11859 group = 1;
11860 break;
11861
11862 case R_ARM_LDR_PC_G2:
11863 case R_ARM_LDR_SB_G2:
11864 group = 2;
11865 break;
11866
11867 default:
11868 abort ();
11869 }
11870
11871 /* If REL, extract the addend from the insn. If RELA, it will
11872 have already been fetched for us. */
11873 if (globals->use_rel)
11874 {
11875 int negative = (insn & (1 << 23)) ? 1 : -1;
11876 signed_addend = negative * (insn & 0xfff);
11877 }
11878
11879 /* Compute the value (X) to go in the place. */
11880 if (r_type == R_ARM_LDR_PC_G0
11881 || r_type == R_ARM_LDR_PC_G1
11882 || r_type == R_ARM_LDR_PC_G2)
11883 /* PC relative. */
11884 signed_value = value - pc + signed_addend;
11885 else
11886 /* Section base relative. */
11887 signed_value = value - sb + signed_addend;
11888
11889 /* Calculate the value of the relevant G_{n-1} to obtain
11890 the residual at that stage. */
11891 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
11892 group - 1, &residual);
11893
11894 /* Check for overflow. */
11895 if (residual >= 0x1000)
11896 {
11897 (*_bfd_error_handler)
11898 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
11899 input_bfd, input_section,
11900 (long) rel->r_offset, labs (signed_value), howto->name);
11901 return bfd_reloc_overflow;
11902 }
11903
11904 /* Mask out the value and U bit. */
11905 insn &= 0xff7ff000;
11906
11907 /* Set the U bit if the value to go in the place is non-negative. */
11908 if (signed_value >= 0)
11909 insn |= 1 << 23;
11910
11911 /* Encode the offset. */
11912 insn |= residual;
11913
11914 bfd_put_32 (input_bfd, insn, hit_data);
11915 }
11916 return bfd_reloc_ok;
11917
11918 case R_ARM_LDRS_PC_G0:
11919 case R_ARM_LDRS_PC_G1:
11920 case R_ARM_LDRS_PC_G2:
11921 case R_ARM_LDRS_SB_G0:
11922 case R_ARM_LDRS_SB_G1:
11923 case R_ARM_LDRS_SB_G2:
11924 {
11925 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11926 bfd_vma pc = input_section->output_section->vma
11927 + input_section->output_offset + rel->r_offset;
11928 /* sb is the origin of the *segment* containing the symbol. */
11929 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
11930 bfd_vma residual;
11931 bfd_signed_vma signed_value;
11932 int group = 0;
11933
11934 /* Determine which groups of bits to calculate. */
11935 switch (r_type)
11936 {
11937 case R_ARM_LDRS_PC_G0:
11938 case R_ARM_LDRS_SB_G0:
11939 group = 0;
11940 break;
11941
11942 case R_ARM_LDRS_PC_G1:
11943 case R_ARM_LDRS_SB_G1:
11944 group = 1;
11945 break;
11946
11947 case R_ARM_LDRS_PC_G2:
11948 case R_ARM_LDRS_SB_G2:
11949 group = 2;
11950 break;
11951
11952 default:
11953 abort ();
11954 }
11955
11956 /* If REL, extract the addend from the insn. If RELA, it will
11957 have already been fetched for us. */
11958 if (globals->use_rel)
11959 {
11960 int negative = (insn & (1 << 23)) ? 1 : -1;
11961 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
11962 }
11963
11964 /* Compute the value (X) to go in the place. */
11965 if (r_type == R_ARM_LDRS_PC_G0
11966 || r_type == R_ARM_LDRS_PC_G1
11967 || r_type == R_ARM_LDRS_PC_G2)
11968 /* PC relative. */
11969 signed_value = value - pc + signed_addend;
11970 else
11971 /* Section base relative. */
11972 signed_value = value - sb + signed_addend;
11973
11974 /* Calculate the value of the relevant G_{n-1} to obtain
11975 the residual at that stage. */
11976 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
11977 group - 1, &residual);
11978
11979 /* Check for overflow. */
11980 if (residual >= 0x100)
11981 {
11982 (*_bfd_error_handler)
11983 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
11984 input_bfd, input_section,
11985 (long) rel->r_offset, labs (signed_value), howto->name);
11986 return bfd_reloc_overflow;
11987 }
11988
11989 /* Mask out the value and U bit. */
11990 insn &= 0xff7ff0f0;
11991
11992 /* Set the U bit if the value to go in the place is non-negative. */
11993 if (signed_value >= 0)
11994 insn |= 1 << 23;
11995
11996 /* Encode the offset. */
11997 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
11998
11999 bfd_put_32 (input_bfd, insn, hit_data);
12000 }
12001 return bfd_reloc_ok;
12002
12003 case R_ARM_LDC_PC_G0:
12004 case R_ARM_LDC_PC_G1:
12005 case R_ARM_LDC_PC_G2:
12006 case R_ARM_LDC_SB_G0:
12007 case R_ARM_LDC_SB_G1:
12008 case R_ARM_LDC_SB_G2:
12009 {
12010 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12011 bfd_vma pc = input_section->output_section->vma
12012 + input_section->output_offset + rel->r_offset;
12013 /* sb is the origin of the *segment* containing the symbol. */
12014 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12015 bfd_vma residual;
12016 bfd_signed_vma signed_value;
12017 int group = 0;
12018
12019 /* Determine which groups of bits to calculate. */
12020 switch (r_type)
12021 {
12022 case R_ARM_LDC_PC_G0:
12023 case R_ARM_LDC_SB_G0:
12024 group = 0;
12025 break;
12026
12027 case R_ARM_LDC_PC_G1:
12028 case R_ARM_LDC_SB_G1:
12029 group = 1;
12030 break;
12031
12032 case R_ARM_LDC_PC_G2:
12033 case R_ARM_LDC_SB_G2:
12034 group = 2;
12035 break;
12036
12037 default:
12038 abort ();
12039 }
12040
12041 /* If REL, extract the addend from the insn. If RELA, it will
12042 have already been fetched for us. */
12043 if (globals->use_rel)
12044 {
12045 int negative = (insn & (1 << 23)) ? 1 : -1;
12046 signed_addend = negative * ((insn & 0xff) << 2);
12047 }
12048
12049 /* Compute the value (X) to go in the place. */
12050 if (r_type == R_ARM_LDC_PC_G0
12051 || r_type == R_ARM_LDC_PC_G1
12052 || r_type == R_ARM_LDC_PC_G2)
12053 /* PC relative. */
12054 signed_value = value - pc + signed_addend;
12055 else
12056 /* Section base relative. */
12057 signed_value = value - sb + signed_addend;
12058
12059 /* Calculate the value of the relevant G_{n-1} to obtain
12060 the residual at that stage. */
12061 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12062 group - 1, &residual);
12063
12064 /* Check for overflow. (The absolute value to go in the place must be
12065 divisible by four and, after having been divided by four, must
12066 fit in eight bits.) */
12067 if ((residual & 0x3) != 0 || residual >= 0x400)
12068 {
12069 (*_bfd_error_handler)
12070 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
12071 input_bfd, input_section,
12072 (long) rel->r_offset, labs (signed_value), howto->name);
12073 return bfd_reloc_overflow;
12074 }
12075
12076 /* Mask out the value and U bit. */
12077 insn &= 0xff7fff00;
12078
12079 /* Set the U bit if the value to go in the place is non-negative. */
12080 if (signed_value >= 0)
12081 insn |= 1 << 23;
12082
12083 /* Encode the offset. */
12084 insn |= residual >> 2;
12085
12086 bfd_put_32 (input_bfd, insn, hit_data);
12087 }
12088 return bfd_reloc_ok;
12089
12090 case R_ARM_THM_ALU_ABS_G0_NC:
12091 case R_ARM_THM_ALU_ABS_G1_NC:
12092 case R_ARM_THM_ALU_ABS_G2_NC:
12093 case R_ARM_THM_ALU_ABS_G3_NC:
12094 {
12095 const int shift_array[4] = {0, 8, 16, 24};
12096 bfd_vma insn = bfd_get_16 (input_bfd, hit_data);
12097 bfd_vma addr = value;
12098 int shift = shift_array[r_type - R_ARM_THM_ALU_ABS_G0_NC];
12099
12100 /* Compute address. */
12101 if (globals->use_rel)
12102 signed_addend = insn & 0xff;
12103 addr += signed_addend;
12104 if (branch_type == ST_BRANCH_TO_THUMB)
12105 addr |= 1;
12106 /* Clean imm8 insn. */
12107 insn &= 0xff00;
12108 /* And update with correct part of address. */
12109 insn |= (addr >> shift) & 0xff;
12110 /* Update insn. */
12111 bfd_put_16 (input_bfd, insn, hit_data);
12112 }
12113
12114 *unresolved_reloc_p = FALSE;
12115 return bfd_reloc_ok;
12116
12117 default:
12118 return bfd_reloc_notsupported;
12119 }
12120 }
12121
12122 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
12123 static void
12124 arm_add_to_rel (bfd * abfd,
12125 bfd_byte * address,
12126 reloc_howto_type * howto,
12127 bfd_signed_vma increment)
12128 {
12129 bfd_signed_vma addend;
12130
12131 if (howto->type == R_ARM_THM_CALL
12132 || howto->type == R_ARM_THM_JUMP24)
12133 {
12134 int upper_insn, lower_insn;
12135 int upper, lower;
12136
12137 upper_insn = bfd_get_16 (abfd, address);
12138 lower_insn = bfd_get_16 (abfd, address + 2);
12139 upper = upper_insn & 0x7ff;
12140 lower = lower_insn & 0x7ff;
12141
12142 addend = (upper << 12) | (lower << 1);
12143 addend += increment;
12144 addend >>= 1;
12145
12146 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
12147 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
12148
12149 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
12150 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
12151 }
12152 else
12153 {
12154 bfd_vma contents;
12155
12156 contents = bfd_get_32 (abfd, address);
12157
12158 /* Get the (signed) value from the instruction. */
12159 addend = contents & howto->src_mask;
12160 if (addend & ((howto->src_mask + 1) >> 1))
12161 {
12162 bfd_signed_vma mask;
12163
12164 mask = -1;
12165 mask &= ~ howto->src_mask;
12166 addend |= mask;
12167 }
12168
12169 /* Add in the increment, (which is a byte value). */
12170 switch (howto->type)
12171 {
12172 default:
12173 addend += increment;
12174 break;
12175
12176 case R_ARM_PC24:
12177 case R_ARM_PLT32:
12178 case R_ARM_CALL:
12179 case R_ARM_JUMP24:
12180 addend <<= howto->size;
12181 addend += increment;
12182
12183 /* Should we check for overflow here ? */
12184
12185 /* Drop any undesired bits. */
12186 addend >>= howto->rightshift;
12187 break;
12188 }
12189
12190 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
12191
12192 bfd_put_32 (abfd, contents, address);
12193 }
12194 }
12195
12196 #define IS_ARM_TLS_RELOC(R_TYPE) \
12197 ((R_TYPE) == R_ARM_TLS_GD32 \
12198 || (R_TYPE) == R_ARM_TLS_LDO32 \
12199 || (R_TYPE) == R_ARM_TLS_LDM32 \
12200 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
12201 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
12202 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
12203 || (R_TYPE) == R_ARM_TLS_LE32 \
12204 || (R_TYPE) == R_ARM_TLS_IE32 \
12205 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
12206
12207 /* Specific set of relocations for the gnu tls dialect. */
12208 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
12209 ((R_TYPE) == R_ARM_TLS_GOTDESC \
12210 || (R_TYPE) == R_ARM_TLS_CALL \
12211 || (R_TYPE) == R_ARM_THM_TLS_CALL \
12212 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
12213 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
12214
12215 /* Relocate an ARM ELF section. */
12216
12217 static bfd_boolean
12218 elf32_arm_relocate_section (bfd * output_bfd,
12219 struct bfd_link_info * info,
12220 bfd * input_bfd,
12221 asection * input_section,
12222 bfd_byte * contents,
12223 Elf_Internal_Rela * relocs,
12224 Elf_Internal_Sym * local_syms,
12225 asection ** local_sections)
12226 {
12227 Elf_Internal_Shdr *symtab_hdr;
12228 struct elf_link_hash_entry **sym_hashes;
12229 Elf_Internal_Rela *rel;
12230 Elf_Internal_Rela *relend;
12231 const char *name;
12232 struct elf32_arm_link_hash_table * globals;
12233
12234 globals = elf32_arm_hash_table (info);
12235 if (globals == NULL)
12236 return FALSE;
12237
12238 symtab_hdr = & elf_symtab_hdr (input_bfd);
12239 sym_hashes = elf_sym_hashes (input_bfd);
12240
12241 rel = relocs;
12242 relend = relocs + input_section->reloc_count;
12243 for (; rel < relend; rel++)
12244 {
12245 int r_type;
12246 reloc_howto_type * howto;
12247 unsigned long r_symndx;
12248 Elf_Internal_Sym * sym;
12249 asection * sec;
12250 struct elf_link_hash_entry * h;
12251 bfd_vma relocation;
12252 bfd_reloc_status_type r;
12253 arelent bfd_reloc;
12254 char sym_type;
12255 bfd_boolean unresolved_reloc = FALSE;
12256 char *error_message = NULL;
12257
12258 r_symndx = ELF32_R_SYM (rel->r_info);
12259 r_type = ELF32_R_TYPE (rel->r_info);
12260 r_type = arm_real_reloc_type (globals, r_type);
12261
12262 if ( r_type == R_ARM_GNU_VTENTRY
12263 || r_type == R_ARM_GNU_VTINHERIT)
12264 continue;
12265
12266 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
12267 howto = bfd_reloc.howto;
12268
12269 h = NULL;
12270 sym = NULL;
12271 sec = NULL;
12272
12273 if (r_symndx < symtab_hdr->sh_info)
12274 {
12275 sym = local_syms + r_symndx;
12276 sym_type = ELF32_ST_TYPE (sym->st_info);
12277 sec = local_sections[r_symndx];
12278
12279 /* An object file might have a reference to a local
12280 undefined symbol. This is a daft object file, but we
12281 should at least do something about it. V4BX & NONE
12282 relocations do not use the symbol and are explicitly
12283 allowed to use the undefined symbol, so allow those.
12284 Likewise for relocations against STN_UNDEF. */
12285 if (r_type != R_ARM_V4BX
12286 && r_type != R_ARM_NONE
12287 && r_symndx != STN_UNDEF
12288 && bfd_is_und_section (sec)
12289 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
12290 (*info->callbacks->undefined_symbol)
12291 (info, bfd_elf_string_from_elf_section
12292 (input_bfd, symtab_hdr->sh_link, sym->st_name),
12293 input_bfd, input_section,
12294 rel->r_offset, TRUE);
12295
12296 if (globals->use_rel)
12297 {
12298 relocation = (sec->output_section->vma
12299 + sec->output_offset
12300 + sym->st_value);
12301 if (!bfd_link_relocatable (info)
12302 && (sec->flags & SEC_MERGE)
12303 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
12304 {
12305 asection *msec;
12306 bfd_vma addend, value;
12307
12308 switch (r_type)
12309 {
12310 case R_ARM_MOVW_ABS_NC:
12311 case R_ARM_MOVT_ABS:
12312 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
12313 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
12314 addend = (addend ^ 0x8000) - 0x8000;
12315 break;
12316
12317 case R_ARM_THM_MOVW_ABS_NC:
12318 case R_ARM_THM_MOVT_ABS:
12319 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
12320 << 16;
12321 value |= bfd_get_16 (input_bfd,
12322 contents + rel->r_offset + 2);
12323 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
12324 | ((value & 0x04000000) >> 15);
12325 addend = (addend ^ 0x8000) - 0x8000;
12326 break;
12327
12328 default:
12329 if (howto->rightshift
12330 || (howto->src_mask & (howto->src_mask + 1)))
12331 {
12332 (*_bfd_error_handler)
12333 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
12334 input_bfd, input_section,
12335 (long) rel->r_offset, howto->name);
12336 return FALSE;
12337 }
12338
12339 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
12340
12341 /* Get the (signed) value from the instruction. */
12342 addend = value & howto->src_mask;
12343 if (addend & ((howto->src_mask + 1) >> 1))
12344 {
12345 bfd_signed_vma mask;
12346
12347 mask = -1;
12348 mask &= ~ howto->src_mask;
12349 addend |= mask;
12350 }
12351 break;
12352 }
12353
12354 msec = sec;
12355 addend =
12356 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
12357 - relocation;
12358 addend += msec->output_section->vma + msec->output_offset;
12359
12360 /* Cases here must match those in the preceding
12361 switch statement. */
12362 switch (r_type)
12363 {
12364 case R_ARM_MOVW_ABS_NC:
12365 case R_ARM_MOVT_ABS:
12366 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
12367 | (addend & 0xfff);
12368 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
12369 break;
12370
12371 case R_ARM_THM_MOVW_ABS_NC:
12372 case R_ARM_THM_MOVT_ABS:
12373 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
12374 | (addend & 0xff) | ((addend & 0x0800) << 15);
12375 bfd_put_16 (input_bfd, value >> 16,
12376 contents + rel->r_offset);
12377 bfd_put_16 (input_bfd, value,
12378 contents + rel->r_offset + 2);
12379 break;
12380
12381 default:
12382 value = (value & ~ howto->dst_mask)
12383 | (addend & howto->dst_mask);
12384 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
12385 break;
12386 }
12387 }
12388 }
12389 else
12390 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
12391 }
12392 else
12393 {
12394 bfd_boolean warned, ignored;
12395
12396 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
12397 r_symndx, symtab_hdr, sym_hashes,
12398 h, sec, relocation,
12399 unresolved_reloc, warned, ignored);
12400
12401 sym_type = h->type;
12402 }
12403
12404 if (sec != NULL && discarded_section (sec))
12405 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
12406 rel, 1, relend, howto, 0, contents);
12407
12408 if (bfd_link_relocatable (info))
12409 {
12410 /* This is a relocatable link. We don't have to change
12411 anything, unless the reloc is against a section symbol,
12412 in which case we have to adjust according to where the
12413 section symbol winds up in the output section. */
12414 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
12415 {
12416 if (globals->use_rel)
12417 arm_add_to_rel (input_bfd, contents + rel->r_offset,
12418 howto, (bfd_signed_vma) sec->output_offset);
12419 else
12420 rel->r_addend += sec->output_offset;
12421 }
12422 continue;
12423 }
12424
12425 if (h != NULL)
12426 name = h->root.root.string;
12427 else
12428 {
12429 name = (bfd_elf_string_from_elf_section
12430 (input_bfd, symtab_hdr->sh_link, sym->st_name));
12431 if (name == NULL || *name == '\0')
12432 name = bfd_section_name (input_bfd, sec);
12433 }
12434
12435 if (r_symndx != STN_UNDEF
12436 && r_type != R_ARM_NONE
12437 && (h == NULL
12438 || h->root.type == bfd_link_hash_defined
12439 || h->root.type == bfd_link_hash_defweak)
12440 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
12441 {
12442 (*_bfd_error_handler)
12443 ((sym_type == STT_TLS
12444 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
12445 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
12446 input_bfd,
12447 input_section,
12448 (long) rel->r_offset,
12449 howto->name,
12450 name);
12451 }
12452
12453 /* We call elf32_arm_final_link_relocate unless we're completely
12454 done, i.e., the relaxation produced the final output we want,
12455 and we won't let anybody mess with it. Also, we have to do
12456 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
12457 both in relaxed and non-relaxed cases. */
12458 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
12459 || (IS_ARM_TLS_GNU_RELOC (r_type)
12460 && !((h ? elf32_arm_hash_entry (h)->tls_type :
12461 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
12462 & GOT_TLS_GDESC)))
12463 {
12464 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
12465 contents, rel, h == NULL);
12466 /* This may have been marked unresolved because it came from
12467 a shared library. But we've just dealt with that. */
12468 unresolved_reloc = 0;
12469 }
12470 else
12471 r = bfd_reloc_continue;
12472
12473 if (r == bfd_reloc_continue)
12474 {
12475 unsigned char branch_type =
12476 h ? ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
12477 : ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
12478
12479 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
12480 input_section, contents, rel,
12481 relocation, info, sec, name,
12482 sym_type, branch_type, h,
12483 &unresolved_reloc,
12484 &error_message);
12485 }
12486
12487 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
12488 because such sections are not SEC_ALLOC and thus ld.so will
12489 not process them. */
12490 if (unresolved_reloc
12491 && !((input_section->flags & SEC_DEBUGGING) != 0
12492 && h->def_dynamic)
12493 && _bfd_elf_section_offset (output_bfd, info, input_section,
12494 rel->r_offset) != (bfd_vma) -1)
12495 {
12496 (*_bfd_error_handler)
12497 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
12498 input_bfd,
12499 input_section,
12500 (long) rel->r_offset,
12501 howto->name,
12502 h->root.root.string);
12503 return FALSE;
12504 }
12505
12506 if (r != bfd_reloc_ok)
12507 {
12508 switch (r)
12509 {
12510 case bfd_reloc_overflow:
12511 /* If the overflowing reloc was to an undefined symbol,
12512 we have already printed one error message and there
12513 is no point complaining again. */
12514 if (!h || h->root.type != bfd_link_hash_undefined)
12515 (*info->callbacks->reloc_overflow)
12516 (info, (h ? &h->root : NULL), name, howto->name,
12517 (bfd_vma) 0, input_bfd, input_section, rel->r_offset);
12518 break;
12519
12520 case bfd_reloc_undefined:
12521 (*info->callbacks->undefined_symbol)
12522 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
12523 break;
12524
12525 case bfd_reloc_outofrange:
12526 error_message = _("out of range");
12527 goto common_error;
12528
12529 case bfd_reloc_notsupported:
12530 error_message = _("unsupported relocation");
12531 goto common_error;
12532
12533 case bfd_reloc_dangerous:
12534 /* error_message should already be set. */
12535 goto common_error;
12536
12537 default:
12538 error_message = _("unknown error");
12539 /* Fall through. */
12540
12541 common_error:
12542 BFD_ASSERT (error_message != NULL);
12543 (*info->callbacks->reloc_dangerous)
12544 (info, error_message, input_bfd, input_section, rel->r_offset);
12545 break;
12546 }
12547 }
12548 }
12549
12550 return TRUE;
12551 }
12552
12553 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
12554 adds the edit to the start of the list. (The list must be built in order of
12555 ascending TINDEX: the function's callers are primarily responsible for
12556 maintaining that condition). */
12557
12558 static void
12559 add_unwind_table_edit (arm_unwind_table_edit **head,
12560 arm_unwind_table_edit **tail,
12561 arm_unwind_edit_type type,
12562 asection *linked_section,
12563 unsigned int tindex)
12564 {
12565 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
12566 xmalloc (sizeof (arm_unwind_table_edit));
12567
12568 new_edit->type = type;
12569 new_edit->linked_section = linked_section;
12570 new_edit->index = tindex;
12571
12572 if (tindex > 0)
12573 {
12574 new_edit->next = NULL;
12575
12576 if (*tail)
12577 (*tail)->next = new_edit;
12578
12579 (*tail) = new_edit;
12580
12581 if (!*head)
12582 (*head) = new_edit;
12583 }
12584 else
12585 {
12586 new_edit->next = *head;
12587
12588 if (!*tail)
12589 *tail = new_edit;
12590
12591 *head = new_edit;
12592 }
12593 }
12594
12595 static _arm_elf_section_data *get_arm_elf_section_data (asection *);
12596
12597 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
12598 static void
12599 adjust_exidx_size(asection *exidx_sec, int adjust)
12600 {
12601 asection *out_sec;
12602
12603 if (!exidx_sec->rawsize)
12604 exidx_sec->rawsize = exidx_sec->size;
12605
12606 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
12607 out_sec = exidx_sec->output_section;
12608 /* Adjust size of output section. */
12609 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
12610 }
12611
12612 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
12613 static void
12614 insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
12615 {
12616 struct _arm_elf_section_data *exidx_arm_data;
12617
12618 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
12619 add_unwind_table_edit (
12620 &exidx_arm_data->u.exidx.unwind_edit_list,
12621 &exidx_arm_data->u.exidx.unwind_edit_tail,
12622 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
12623
12624 exidx_arm_data->additional_reloc_count++;
12625
12626 adjust_exidx_size(exidx_sec, 8);
12627 }
12628
12629 /* Scan .ARM.exidx tables, and create a list describing edits which should be
12630 made to those tables, such that:
12631
12632 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
12633 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
12634 codes which have been inlined into the index).
12635
12636 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
12637
12638 The edits are applied when the tables are written
12639 (in elf32_arm_write_section). */
12640
12641 bfd_boolean
12642 elf32_arm_fix_exidx_coverage (asection **text_section_order,
12643 unsigned int num_text_sections,
12644 struct bfd_link_info *info,
12645 bfd_boolean merge_exidx_entries)
12646 {
12647 bfd *inp;
12648 unsigned int last_second_word = 0, i;
12649 asection *last_exidx_sec = NULL;
12650 asection *last_text_sec = NULL;
12651 int last_unwind_type = -1;
12652
12653 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
12654 text sections. */
12655 for (inp = info->input_bfds; inp != NULL; inp = inp->link.next)
12656 {
12657 asection *sec;
12658
12659 for (sec = inp->sections; sec != NULL; sec = sec->next)
12660 {
12661 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
12662 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
12663
12664 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
12665 continue;
12666
12667 if (elf_sec->linked_to)
12668 {
12669 Elf_Internal_Shdr *linked_hdr
12670 = &elf_section_data (elf_sec->linked_to)->this_hdr;
12671 struct _arm_elf_section_data *linked_sec_arm_data
12672 = get_arm_elf_section_data (linked_hdr->bfd_section);
12673
12674 if (linked_sec_arm_data == NULL)
12675 continue;
12676
12677 /* Link this .ARM.exidx section back from the text section it
12678 describes. */
12679 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
12680 }
12681 }
12682 }
12683
12684 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
12685 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
12686 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
12687
12688 for (i = 0; i < num_text_sections; i++)
12689 {
12690 asection *sec = text_section_order[i];
12691 asection *exidx_sec;
12692 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
12693 struct _arm_elf_section_data *exidx_arm_data;
12694 bfd_byte *contents = NULL;
12695 int deleted_exidx_bytes = 0;
12696 bfd_vma j;
12697 arm_unwind_table_edit *unwind_edit_head = NULL;
12698 arm_unwind_table_edit *unwind_edit_tail = NULL;
12699 Elf_Internal_Shdr *hdr;
12700 bfd *ibfd;
12701
12702 if (arm_data == NULL)
12703 continue;
12704
12705 exidx_sec = arm_data->u.text.arm_exidx_sec;
12706 if (exidx_sec == NULL)
12707 {
12708 /* Section has no unwind data. */
12709 if (last_unwind_type == 0 || !last_exidx_sec)
12710 continue;
12711
12712 /* Ignore zero sized sections. */
12713 if (sec->size == 0)
12714 continue;
12715
12716 insert_cantunwind_after(last_text_sec, last_exidx_sec);
12717 last_unwind_type = 0;
12718 continue;
12719 }
12720
12721 /* Skip /DISCARD/ sections. */
12722 if (bfd_is_abs_section (exidx_sec->output_section))
12723 continue;
12724
12725 hdr = &elf_section_data (exidx_sec)->this_hdr;
12726 if (hdr->sh_type != SHT_ARM_EXIDX)
12727 continue;
12728
12729 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
12730 if (exidx_arm_data == NULL)
12731 continue;
12732
12733 ibfd = exidx_sec->owner;
12734
12735 if (hdr->contents != NULL)
12736 contents = hdr->contents;
12737 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
12738 /* An error? */
12739 continue;
12740
12741 if (last_unwind_type > 0)
12742 {
12743 unsigned int first_word = bfd_get_32 (ibfd, contents);
12744 /* Add cantunwind if first unwind item does not match section
12745 start. */
12746 if (first_word != sec->vma)
12747 {
12748 insert_cantunwind_after (last_text_sec, last_exidx_sec);
12749 last_unwind_type = 0;
12750 }
12751 }
12752
12753 for (j = 0; j < hdr->sh_size; j += 8)
12754 {
12755 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
12756 int unwind_type;
12757 int elide = 0;
12758
12759 /* An EXIDX_CANTUNWIND entry. */
12760 if (second_word == 1)
12761 {
12762 if (last_unwind_type == 0)
12763 elide = 1;
12764 unwind_type = 0;
12765 }
12766 /* Inlined unwinding data. Merge if equal to previous. */
12767 else if ((second_word & 0x80000000) != 0)
12768 {
12769 if (merge_exidx_entries
12770 && last_second_word == second_word && last_unwind_type == 1)
12771 elide = 1;
12772 unwind_type = 1;
12773 last_second_word = second_word;
12774 }
12775 /* Normal table entry. In theory we could merge these too,
12776 but duplicate entries are likely to be much less common. */
12777 else
12778 unwind_type = 2;
12779
12780 if (elide && !bfd_link_relocatable (info))
12781 {
12782 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
12783 DELETE_EXIDX_ENTRY, NULL, j / 8);
12784
12785 deleted_exidx_bytes += 8;
12786 }
12787
12788 last_unwind_type = unwind_type;
12789 }
12790
12791 /* Free contents if we allocated it ourselves. */
12792 if (contents != hdr->contents)
12793 free (contents);
12794
12795 /* Record edits to be applied later (in elf32_arm_write_section). */
12796 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
12797 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
12798
12799 if (deleted_exidx_bytes > 0)
12800 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
12801
12802 last_exidx_sec = exidx_sec;
12803 last_text_sec = sec;
12804 }
12805
12806 /* Add terminating CANTUNWIND entry. */
12807 if (!bfd_link_relocatable (info) && last_exidx_sec
12808 && last_unwind_type != 0)
12809 insert_cantunwind_after(last_text_sec, last_exidx_sec);
12810
12811 return TRUE;
12812 }
12813
12814 static bfd_boolean
12815 elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
12816 bfd *ibfd, const char *name)
12817 {
12818 asection *sec, *osec;
12819
12820 sec = bfd_get_linker_section (ibfd, name);
12821 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
12822 return TRUE;
12823
12824 osec = sec->output_section;
12825 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
12826 return TRUE;
12827
12828 if (! bfd_set_section_contents (obfd, osec, sec->contents,
12829 sec->output_offset, sec->size))
12830 return FALSE;
12831
12832 return TRUE;
12833 }
12834
12835 static bfd_boolean
12836 elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
12837 {
12838 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
12839 asection *sec, *osec;
12840
12841 if (globals == NULL)
12842 return FALSE;
12843
12844 /* Invoke the regular ELF backend linker to do all the work. */
12845 if (!bfd_elf_final_link (abfd, info))
12846 return FALSE;
12847
12848 /* Process stub sections (eg BE8 encoding, ...). */
12849 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
12850 unsigned int i;
12851 for (i=0; i<htab->top_id; i++)
12852 {
12853 sec = htab->stub_group[i].stub_sec;
12854 /* Only process it once, in its link_sec slot. */
12855 if (sec && i == htab->stub_group[i].link_sec->id)
12856 {
12857 osec = sec->output_section;
12858 elf32_arm_write_section (abfd, info, sec, sec->contents);
12859 if (! bfd_set_section_contents (abfd, osec, sec->contents,
12860 sec->output_offset, sec->size))
12861 return FALSE;
12862 }
12863 }
12864
12865 /* Write out any glue sections now that we have created all the
12866 stubs. */
12867 if (globals->bfd_of_glue_owner != NULL)
12868 {
12869 if (! elf32_arm_output_glue_section (info, abfd,
12870 globals->bfd_of_glue_owner,
12871 ARM2THUMB_GLUE_SECTION_NAME))
12872 return FALSE;
12873
12874 if (! elf32_arm_output_glue_section (info, abfd,
12875 globals->bfd_of_glue_owner,
12876 THUMB2ARM_GLUE_SECTION_NAME))
12877 return FALSE;
12878
12879 if (! elf32_arm_output_glue_section (info, abfd,
12880 globals->bfd_of_glue_owner,
12881 VFP11_ERRATUM_VENEER_SECTION_NAME))
12882 return FALSE;
12883
12884 if (! elf32_arm_output_glue_section (info, abfd,
12885 globals->bfd_of_glue_owner,
12886 STM32L4XX_ERRATUM_VENEER_SECTION_NAME))
12887 return FALSE;
12888
12889 if (! elf32_arm_output_glue_section (info, abfd,
12890 globals->bfd_of_glue_owner,
12891 ARM_BX_GLUE_SECTION_NAME))
12892 return FALSE;
12893 }
12894
12895 return TRUE;
12896 }
12897
12898 /* Return a best guess for the machine number based on the attributes. */
12899
12900 static unsigned int
12901 bfd_arm_get_mach_from_attributes (bfd * abfd)
12902 {
12903 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
12904
12905 switch (arch)
12906 {
12907 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
12908 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
12909 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
12910
12911 case TAG_CPU_ARCH_V5TE:
12912 {
12913 char * name;
12914
12915 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
12916 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
12917
12918 if (name)
12919 {
12920 if (strcmp (name, "IWMMXT2") == 0)
12921 return bfd_mach_arm_iWMMXt2;
12922
12923 if (strcmp (name, "IWMMXT") == 0)
12924 return bfd_mach_arm_iWMMXt;
12925
12926 if (strcmp (name, "XSCALE") == 0)
12927 {
12928 int wmmx;
12929
12930 BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES);
12931 wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i;
12932 switch (wmmx)
12933 {
12934 case 1: return bfd_mach_arm_iWMMXt;
12935 case 2: return bfd_mach_arm_iWMMXt2;
12936 default: return bfd_mach_arm_XScale;
12937 }
12938 }
12939 }
12940
12941 return bfd_mach_arm_5TE;
12942 }
12943
12944 default:
12945 return bfd_mach_arm_unknown;
12946 }
12947 }
12948
12949 /* Set the right machine number. */
12950
12951 static bfd_boolean
12952 elf32_arm_object_p (bfd *abfd)
12953 {
12954 unsigned int mach;
12955
12956 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
12957
12958 if (mach == bfd_mach_arm_unknown)
12959 {
12960 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
12961 mach = bfd_mach_arm_ep9312;
12962 else
12963 mach = bfd_arm_get_mach_from_attributes (abfd);
12964 }
12965
12966 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
12967 return TRUE;
12968 }
12969
12970 /* Function to keep ARM specific flags in the ELF header. */
12971
12972 static bfd_boolean
12973 elf32_arm_set_private_flags (bfd *abfd, flagword flags)
12974 {
12975 if (elf_flags_init (abfd)
12976 && elf_elfheader (abfd)->e_flags != flags)
12977 {
12978 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
12979 {
12980 if (flags & EF_ARM_INTERWORK)
12981 (*_bfd_error_handler)
12982 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
12983 abfd);
12984 else
12985 _bfd_error_handler
12986 (_("Warning: Clearing the interworking flag of %B due to outside request"),
12987 abfd);
12988 }
12989 }
12990 else
12991 {
12992 elf_elfheader (abfd)->e_flags = flags;
12993 elf_flags_init (abfd) = TRUE;
12994 }
12995
12996 return TRUE;
12997 }
12998
12999 /* Copy backend specific data from one object module to another. */
13000
13001 static bfd_boolean
13002 elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
13003 {
13004 flagword in_flags;
13005 flagword out_flags;
13006
13007 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
13008 return TRUE;
13009
13010 in_flags = elf_elfheader (ibfd)->e_flags;
13011 out_flags = elf_elfheader (obfd)->e_flags;
13012
13013 if (elf_flags_init (obfd)
13014 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
13015 && in_flags != out_flags)
13016 {
13017 /* Cannot mix APCS26 and APCS32 code. */
13018 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
13019 return FALSE;
13020
13021 /* Cannot mix float APCS and non-float APCS code. */
13022 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
13023 return FALSE;
13024
13025 /* If the src and dest have different interworking flags
13026 then turn off the interworking bit. */
13027 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
13028 {
13029 if (out_flags & EF_ARM_INTERWORK)
13030 _bfd_error_handler
13031 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
13032 obfd, ibfd);
13033
13034 in_flags &= ~EF_ARM_INTERWORK;
13035 }
13036
13037 /* Likewise for PIC, though don't warn for this case. */
13038 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
13039 in_flags &= ~EF_ARM_PIC;
13040 }
13041
13042 elf_elfheader (obfd)->e_flags = in_flags;
13043 elf_flags_init (obfd) = TRUE;
13044
13045 return _bfd_elf_copy_private_bfd_data (ibfd, obfd);
13046 }
13047
13048 /* Values for Tag_ABI_PCS_R9_use. */
13049 enum
13050 {
13051 AEABI_R9_V6,
13052 AEABI_R9_SB,
13053 AEABI_R9_TLS,
13054 AEABI_R9_unused
13055 };
13056
13057 /* Values for Tag_ABI_PCS_RW_data. */
13058 enum
13059 {
13060 AEABI_PCS_RW_data_absolute,
13061 AEABI_PCS_RW_data_PCrel,
13062 AEABI_PCS_RW_data_SBrel,
13063 AEABI_PCS_RW_data_unused
13064 };
13065
13066 /* Values for Tag_ABI_enum_size. */
13067 enum
13068 {
13069 AEABI_enum_unused,
13070 AEABI_enum_short,
13071 AEABI_enum_wide,
13072 AEABI_enum_forced_wide
13073 };
13074
13075 /* Determine whether an object attribute tag takes an integer, a
13076 string or both. */
13077
13078 static int
13079 elf32_arm_obj_attrs_arg_type (int tag)
13080 {
13081 if (tag == Tag_compatibility)
13082 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
13083 else if (tag == Tag_nodefaults)
13084 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
13085 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
13086 return ATTR_TYPE_FLAG_STR_VAL;
13087 else if (tag < 32)
13088 return ATTR_TYPE_FLAG_INT_VAL;
13089 else
13090 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
13091 }
13092
13093 /* The ABI defines that Tag_conformance should be emitted first, and that
13094 Tag_nodefaults should be second (if either is defined). This sets those
13095 two positions, and bumps up the position of all the remaining tags to
13096 compensate. */
13097 static int
13098 elf32_arm_obj_attrs_order (int num)
13099 {
13100 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
13101 return Tag_conformance;
13102 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
13103 return Tag_nodefaults;
13104 if ((num - 2) < Tag_nodefaults)
13105 return num - 2;
13106 if ((num - 1) < Tag_conformance)
13107 return num - 1;
13108 return num;
13109 }
13110
13111 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
13112 static bfd_boolean
13113 elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
13114 {
13115 if ((tag & 127) < 64)
13116 {
13117 _bfd_error_handler
13118 (_("%B: Unknown mandatory EABI object attribute %d"),
13119 abfd, tag);
13120 bfd_set_error (bfd_error_bad_value);
13121 return FALSE;
13122 }
13123 else
13124 {
13125 _bfd_error_handler
13126 (_("Warning: %B: Unknown EABI object attribute %d"),
13127 abfd, tag);
13128 return TRUE;
13129 }
13130 }
13131
13132 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
13133 Returns -1 if no architecture could be read. */
13134
13135 static int
13136 get_secondary_compatible_arch (bfd *abfd)
13137 {
13138 obj_attribute *attr =
13139 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
13140
13141 /* Note: the tag and its argument below are uleb128 values, though
13142 currently-defined values fit in one byte for each. */
13143 if (attr->s
13144 && attr->s[0] == Tag_CPU_arch
13145 && (attr->s[1] & 128) != 128
13146 && attr->s[2] == 0)
13147 return attr->s[1];
13148
13149 /* This tag is "safely ignorable", so don't complain if it looks funny. */
13150 return -1;
13151 }
13152
13153 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
13154 The tag is removed if ARCH is -1. */
13155
13156 static void
13157 set_secondary_compatible_arch (bfd *abfd, int arch)
13158 {
13159 obj_attribute *attr =
13160 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
13161
13162 if (arch == -1)
13163 {
13164 attr->s = NULL;
13165 return;
13166 }
13167
13168 /* Note: the tag and its argument below are uleb128 values, though
13169 currently-defined values fit in one byte for each. */
13170 if (!attr->s)
13171 attr->s = (char *) bfd_alloc (abfd, 3);
13172 attr->s[0] = Tag_CPU_arch;
13173 attr->s[1] = arch;
13174 attr->s[2] = '\0';
13175 }
13176
13177 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
13178 into account. */
13179
13180 static int
13181 tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
13182 int newtag, int secondary_compat)
13183 {
13184 #define T(X) TAG_CPU_ARCH_##X
13185 int tagl, tagh, result;
13186 const int v6t2[] =
13187 {
13188 T(V6T2), /* PRE_V4. */
13189 T(V6T2), /* V4. */
13190 T(V6T2), /* V4T. */
13191 T(V6T2), /* V5T. */
13192 T(V6T2), /* V5TE. */
13193 T(V6T2), /* V5TEJ. */
13194 T(V6T2), /* V6. */
13195 T(V7), /* V6KZ. */
13196 T(V6T2) /* V6T2. */
13197 };
13198 const int v6k[] =
13199 {
13200 T(V6K), /* PRE_V4. */
13201 T(V6K), /* V4. */
13202 T(V6K), /* V4T. */
13203 T(V6K), /* V5T. */
13204 T(V6K), /* V5TE. */
13205 T(V6K), /* V5TEJ. */
13206 T(V6K), /* V6. */
13207 T(V6KZ), /* V6KZ. */
13208 T(V7), /* V6T2. */
13209 T(V6K) /* V6K. */
13210 };
13211 const int v7[] =
13212 {
13213 T(V7), /* PRE_V4. */
13214 T(V7), /* V4. */
13215 T(V7), /* V4T. */
13216 T(V7), /* V5T. */
13217 T(V7), /* V5TE. */
13218 T(V7), /* V5TEJ. */
13219 T(V7), /* V6. */
13220 T(V7), /* V6KZ. */
13221 T(V7), /* V6T2. */
13222 T(V7), /* V6K. */
13223 T(V7) /* V7. */
13224 };
13225 const int v6_m[] =
13226 {
13227 -1, /* PRE_V4. */
13228 -1, /* V4. */
13229 T(V6K), /* V4T. */
13230 T(V6K), /* V5T. */
13231 T(V6K), /* V5TE. */
13232 T(V6K), /* V5TEJ. */
13233 T(V6K), /* V6. */
13234 T(V6KZ), /* V6KZ. */
13235 T(V7), /* V6T2. */
13236 T(V6K), /* V6K. */
13237 T(V7), /* V7. */
13238 T(V6_M) /* V6_M. */
13239 };
13240 const int v6s_m[] =
13241 {
13242 -1, /* PRE_V4. */
13243 -1, /* V4. */
13244 T(V6K), /* V4T. */
13245 T(V6K), /* V5T. */
13246 T(V6K), /* V5TE. */
13247 T(V6K), /* V5TEJ. */
13248 T(V6K), /* V6. */
13249 T(V6KZ), /* V6KZ. */
13250 T(V7), /* V6T2. */
13251 T(V6K), /* V6K. */
13252 T(V7), /* V7. */
13253 T(V6S_M), /* V6_M. */
13254 T(V6S_M) /* V6S_M. */
13255 };
13256 const int v7e_m[] =
13257 {
13258 -1, /* PRE_V4. */
13259 -1, /* V4. */
13260 T(V7E_M), /* V4T. */
13261 T(V7E_M), /* V5T. */
13262 T(V7E_M), /* V5TE. */
13263 T(V7E_M), /* V5TEJ. */
13264 T(V7E_M), /* V6. */
13265 T(V7E_M), /* V6KZ. */
13266 T(V7E_M), /* V6T2. */
13267 T(V7E_M), /* V6K. */
13268 T(V7E_M), /* V7. */
13269 T(V7E_M), /* V6_M. */
13270 T(V7E_M), /* V6S_M. */
13271 T(V7E_M) /* V7E_M. */
13272 };
13273 const int v8[] =
13274 {
13275 T(V8), /* PRE_V4. */
13276 T(V8), /* V4. */
13277 T(V8), /* V4T. */
13278 T(V8), /* V5T. */
13279 T(V8), /* V5TE. */
13280 T(V8), /* V5TEJ. */
13281 T(V8), /* V6. */
13282 T(V8), /* V6KZ. */
13283 T(V8), /* V6T2. */
13284 T(V8), /* V6K. */
13285 T(V8), /* V7. */
13286 T(V8), /* V6_M. */
13287 T(V8), /* V6S_M. */
13288 T(V8), /* V7E_M. */
13289 T(V8) /* V8. */
13290 };
13291 const int v8m_baseline[] =
13292 {
13293 -1, /* PRE_V4. */
13294 -1, /* V4. */
13295 -1, /* V4T. */
13296 -1, /* V5T. */
13297 -1, /* V5TE. */
13298 -1, /* V5TEJ. */
13299 -1, /* V6. */
13300 -1, /* V6KZ. */
13301 -1, /* V6T2. */
13302 -1, /* V6K. */
13303 -1, /* V7. */
13304 T(V8M_BASE), /* V6_M. */
13305 T(V8M_BASE), /* V6S_M. */
13306 -1, /* V7E_M. */
13307 -1, /* V8. */
13308 -1,
13309 T(V8M_BASE) /* V8-M BASELINE. */
13310 };
13311 const int v8m_mainline[] =
13312 {
13313 -1, /* PRE_V4. */
13314 -1, /* V4. */
13315 -1, /* V4T. */
13316 -1, /* V5T. */
13317 -1, /* V5TE. */
13318 -1, /* V5TEJ. */
13319 -1, /* V6. */
13320 -1, /* V6KZ. */
13321 -1, /* V6T2. */
13322 -1, /* V6K. */
13323 T(V8M_MAIN), /* V7. */
13324 T(V8M_MAIN), /* V6_M. */
13325 T(V8M_MAIN), /* V6S_M. */
13326 T(V8M_MAIN), /* V7E_M. */
13327 -1, /* V8. */
13328 -1,
13329 T(V8M_MAIN), /* V8-M BASELINE. */
13330 T(V8M_MAIN) /* V8-M MAINLINE. */
13331 };
13332 const int v4t_plus_v6_m[] =
13333 {
13334 -1, /* PRE_V4. */
13335 -1, /* V4. */
13336 T(V4T), /* V4T. */
13337 T(V5T), /* V5T. */
13338 T(V5TE), /* V5TE. */
13339 T(V5TEJ), /* V5TEJ. */
13340 T(V6), /* V6. */
13341 T(V6KZ), /* V6KZ. */
13342 T(V6T2), /* V6T2. */
13343 T(V6K), /* V6K. */
13344 T(V7), /* V7. */
13345 T(V6_M), /* V6_M. */
13346 T(V6S_M), /* V6S_M. */
13347 T(V7E_M), /* V7E_M. */
13348 T(V8), /* V8. */
13349 -1, /* Unused. */
13350 T(V8M_BASE), /* V8-M BASELINE. */
13351 T(V8M_MAIN), /* V8-M MAINLINE. */
13352 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
13353 };
13354 const int *comb[] =
13355 {
13356 v6t2,
13357 v6k,
13358 v7,
13359 v6_m,
13360 v6s_m,
13361 v7e_m,
13362 v8,
13363 NULL,
13364 v8m_baseline,
13365 v8m_mainline,
13366 /* Pseudo-architecture. */
13367 v4t_plus_v6_m
13368 };
13369
13370 /* Check we've not got a higher architecture than we know about. */
13371
13372 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
13373 {
13374 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
13375 return -1;
13376 }
13377
13378 /* Override old tag if we have a Tag_also_compatible_with on the output. */
13379
13380 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
13381 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
13382 oldtag = T(V4T_PLUS_V6_M);
13383
13384 /* And override the new tag if we have a Tag_also_compatible_with on the
13385 input. */
13386
13387 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
13388 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
13389 newtag = T(V4T_PLUS_V6_M);
13390
13391 tagl = (oldtag < newtag) ? oldtag : newtag;
13392 result = tagh = (oldtag > newtag) ? oldtag : newtag;
13393
13394 /* Architectures before V6KZ add features monotonically. */
13395 if (tagh <= TAG_CPU_ARCH_V6KZ)
13396 return result;
13397
13398 result = comb[tagh - T(V6T2)] ? comb[tagh - T(V6T2)][tagl] : -1;
13399
13400 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
13401 as the canonical version. */
13402 if (result == T(V4T_PLUS_V6_M))
13403 {
13404 result = T(V4T);
13405 *secondary_compat_out = T(V6_M);
13406 }
13407 else
13408 *secondary_compat_out = -1;
13409
13410 if (result == -1)
13411 {
13412 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
13413 ibfd, oldtag, newtag);
13414 return -1;
13415 }
13416
13417 return result;
13418 #undef T
13419 }
13420
13421 /* Query attributes object to see if integer divide instructions may be
13422 present in an object. */
13423 static bfd_boolean
13424 elf32_arm_attributes_accept_div (const obj_attribute *attr)
13425 {
13426 int arch = attr[Tag_CPU_arch].i;
13427 int profile = attr[Tag_CPU_arch_profile].i;
13428
13429 switch (attr[Tag_DIV_use].i)
13430 {
13431 case 0:
13432 /* Integer divide allowed if instruction contained in archetecture. */
13433 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
13434 return TRUE;
13435 else if (arch >= TAG_CPU_ARCH_V7E_M)
13436 return TRUE;
13437 else
13438 return FALSE;
13439
13440 case 1:
13441 /* Integer divide explicitly prohibited. */
13442 return FALSE;
13443
13444 default:
13445 /* Unrecognised case - treat as allowing divide everywhere. */
13446 case 2:
13447 /* Integer divide allowed in ARM state. */
13448 return TRUE;
13449 }
13450 }
13451
13452 /* Query attributes object to see if integer divide instructions are
13453 forbidden to be in the object. This is not the inverse of
13454 elf32_arm_attributes_accept_div. */
13455 static bfd_boolean
13456 elf32_arm_attributes_forbid_div (const obj_attribute *attr)
13457 {
13458 return attr[Tag_DIV_use].i == 1;
13459 }
13460
13461 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
13462 are conflicting attributes. */
13463
13464 static bfd_boolean
13465 elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
13466 {
13467 obj_attribute *in_attr;
13468 obj_attribute *out_attr;
13469 /* Some tags have 0 = don't care, 1 = strong requirement,
13470 2 = weak requirement. */
13471 static const int order_021[3] = {0, 2, 1};
13472 int i;
13473 bfd_boolean result = TRUE;
13474 const char *sec_name = get_elf_backend_data (ibfd)->obj_attrs_section;
13475
13476 /* Skip the linker stubs file. This preserves previous behavior
13477 of accepting unknown attributes in the first input file - but
13478 is that a bug? */
13479 if (ibfd->flags & BFD_LINKER_CREATED)
13480 return TRUE;
13481
13482 /* Skip any input that hasn't attribute section.
13483 This enables to link object files without attribute section with
13484 any others. */
13485 if (bfd_get_section_by_name (ibfd, sec_name) == NULL)
13486 return TRUE;
13487
13488 if (!elf_known_obj_attributes_proc (obfd)[0].i)
13489 {
13490 /* This is the first object. Copy the attributes. */
13491 _bfd_elf_copy_obj_attributes (ibfd, obfd);
13492
13493 out_attr = elf_known_obj_attributes_proc (obfd);
13494
13495 /* Use the Tag_null value to indicate the attributes have been
13496 initialized. */
13497 out_attr[0].i = 1;
13498
13499 /* We do not output objects with Tag_MPextension_use_legacy - we move
13500 the attribute's value to Tag_MPextension_use. */
13501 if (out_attr[Tag_MPextension_use_legacy].i != 0)
13502 {
13503 if (out_attr[Tag_MPextension_use].i != 0
13504 && out_attr[Tag_MPextension_use_legacy].i
13505 != out_attr[Tag_MPextension_use].i)
13506 {
13507 _bfd_error_handler
13508 (_("Error: %B has both the current and legacy "
13509 "Tag_MPextension_use attributes"), ibfd);
13510 result = FALSE;
13511 }
13512
13513 out_attr[Tag_MPextension_use] =
13514 out_attr[Tag_MPextension_use_legacy];
13515 out_attr[Tag_MPextension_use_legacy].type = 0;
13516 out_attr[Tag_MPextension_use_legacy].i = 0;
13517 }
13518
13519 return result;
13520 }
13521
13522 in_attr = elf_known_obj_attributes_proc (ibfd);
13523 out_attr = elf_known_obj_attributes_proc (obfd);
13524 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
13525 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
13526 {
13527 /* Ignore mismatches if the object doesn't use floating point or is
13528 floating point ABI independent. */
13529 if (out_attr[Tag_ABI_FP_number_model].i == AEABI_FP_number_model_none
13530 || (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
13531 && out_attr[Tag_ABI_VFP_args].i == AEABI_VFP_args_compatible))
13532 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
13533 else if (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
13534 && in_attr[Tag_ABI_VFP_args].i != AEABI_VFP_args_compatible)
13535 {
13536 _bfd_error_handler
13537 (_("error: %B uses VFP register arguments, %B does not"),
13538 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
13539 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
13540 result = FALSE;
13541 }
13542 }
13543
13544 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
13545 {
13546 /* Merge this attribute with existing attributes. */
13547 switch (i)
13548 {
13549 case Tag_CPU_raw_name:
13550 case Tag_CPU_name:
13551 /* These are merged after Tag_CPU_arch. */
13552 break;
13553
13554 case Tag_ABI_optimization_goals:
13555 case Tag_ABI_FP_optimization_goals:
13556 /* Use the first value seen. */
13557 break;
13558
13559 case Tag_CPU_arch:
13560 {
13561 int secondary_compat = -1, secondary_compat_out = -1;
13562 unsigned int saved_out_attr = out_attr[i].i;
13563 int arch_attr;
13564 static const char *name_table[] =
13565 {
13566 /* These aren't real CPU names, but we can't guess
13567 that from the architecture version alone. */
13568 "Pre v4",
13569 "ARM v4",
13570 "ARM v4T",
13571 "ARM v5T",
13572 "ARM v5TE",
13573 "ARM v5TEJ",
13574 "ARM v6",
13575 "ARM v6KZ",
13576 "ARM v6T2",
13577 "ARM v6K",
13578 "ARM v7",
13579 "ARM v6-M",
13580 "ARM v6S-M",
13581 "ARM v8",
13582 "",
13583 "ARM v8-M.baseline",
13584 "ARM v8-M.mainline",
13585 };
13586
13587 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
13588 secondary_compat = get_secondary_compatible_arch (ibfd);
13589 secondary_compat_out = get_secondary_compatible_arch (obfd);
13590 arch_attr = tag_cpu_arch_combine (ibfd, out_attr[i].i,
13591 &secondary_compat_out,
13592 in_attr[i].i,
13593 secondary_compat);
13594
13595 /* Return with error if failed to merge. */
13596 if (arch_attr == -1)
13597 return FALSE;
13598
13599 out_attr[i].i = arch_attr;
13600
13601 set_secondary_compatible_arch (obfd, secondary_compat_out);
13602
13603 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
13604 if (out_attr[i].i == saved_out_attr)
13605 ; /* Leave the names alone. */
13606 else if (out_attr[i].i == in_attr[i].i)
13607 {
13608 /* The output architecture has been changed to match the
13609 input architecture. Use the input names. */
13610 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
13611 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
13612 : NULL;
13613 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
13614 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
13615 : NULL;
13616 }
13617 else
13618 {
13619 out_attr[Tag_CPU_name].s = NULL;
13620 out_attr[Tag_CPU_raw_name].s = NULL;
13621 }
13622
13623 /* If we still don't have a value for Tag_CPU_name,
13624 make one up now. Tag_CPU_raw_name remains blank. */
13625 if (out_attr[Tag_CPU_name].s == NULL
13626 && out_attr[i].i < ARRAY_SIZE (name_table))
13627 out_attr[Tag_CPU_name].s =
13628 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
13629 }
13630 break;
13631
13632 case Tag_ARM_ISA_use:
13633 case Tag_THUMB_ISA_use:
13634 case Tag_WMMX_arch:
13635 case Tag_Advanced_SIMD_arch:
13636 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
13637 case Tag_ABI_FP_rounding:
13638 case Tag_ABI_FP_exceptions:
13639 case Tag_ABI_FP_user_exceptions:
13640 case Tag_ABI_FP_number_model:
13641 case Tag_FP_HP_extension:
13642 case Tag_CPU_unaligned_access:
13643 case Tag_T2EE_use:
13644 case Tag_MPextension_use:
13645 /* Use the largest value specified. */
13646 if (in_attr[i].i > out_attr[i].i)
13647 out_attr[i].i = in_attr[i].i;
13648 break;
13649
13650 case Tag_ABI_align_preserved:
13651 case Tag_ABI_PCS_RO_data:
13652 /* Use the smallest value specified. */
13653 if (in_attr[i].i < out_attr[i].i)
13654 out_attr[i].i = in_attr[i].i;
13655 break;
13656
13657 case Tag_ABI_align_needed:
13658 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
13659 && (in_attr[Tag_ABI_align_preserved].i == 0
13660 || out_attr[Tag_ABI_align_preserved].i == 0))
13661 {
13662 /* This error message should be enabled once all non-conformant
13663 binaries in the toolchain have had the attributes set
13664 properly.
13665 _bfd_error_handler
13666 (_("error: %B: 8-byte data alignment conflicts with %B"),
13667 obfd, ibfd);
13668 result = FALSE; */
13669 }
13670 /* Fall through. */
13671 case Tag_ABI_FP_denormal:
13672 case Tag_ABI_PCS_GOT_use:
13673 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
13674 value if greater than 2 (for future-proofing). */
13675 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
13676 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
13677 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
13678 out_attr[i].i = in_attr[i].i;
13679 break;
13680
13681 case Tag_Virtualization_use:
13682 /* The virtualization tag effectively stores two bits of
13683 information: the intended use of TrustZone (in bit 0), and the
13684 intended use of Virtualization (in bit 1). */
13685 if (out_attr[i].i == 0)
13686 out_attr[i].i = in_attr[i].i;
13687 else if (in_attr[i].i != 0
13688 && in_attr[i].i != out_attr[i].i)
13689 {
13690 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
13691 out_attr[i].i = 3;
13692 else
13693 {
13694 _bfd_error_handler
13695 (_("error: %B: unable to merge virtualization attributes "
13696 "with %B"),
13697 obfd, ibfd);
13698 result = FALSE;
13699 }
13700 }
13701 break;
13702
13703 case Tag_CPU_arch_profile:
13704 if (out_attr[i].i != in_attr[i].i)
13705 {
13706 /* 0 will merge with anything.
13707 'A' and 'S' merge to 'A'.
13708 'R' and 'S' merge to 'R'.
13709 'M' and 'A|R|S' is an error. */
13710 if (out_attr[i].i == 0
13711 || (out_attr[i].i == 'S'
13712 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
13713 out_attr[i].i = in_attr[i].i;
13714 else if (in_attr[i].i == 0
13715 || (in_attr[i].i == 'S'
13716 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
13717 ; /* Do nothing. */
13718 else
13719 {
13720 _bfd_error_handler
13721 (_("error: %B: Conflicting architecture profiles %c/%c"),
13722 ibfd,
13723 in_attr[i].i ? in_attr[i].i : '0',
13724 out_attr[i].i ? out_attr[i].i : '0');
13725 result = FALSE;
13726 }
13727 }
13728 break;
13729
13730 case Tag_DSP_extension:
13731 /* No need to change output value if any of:
13732 - pre (<=) ARMv5T input architecture (do not have DSP)
13733 - M input profile not ARMv7E-M and do not have DSP. */
13734 if (in_attr[Tag_CPU_arch].i <= 3
13735 || (in_attr[Tag_CPU_arch_profile].i == 'M'
13736 && in_attr[Tag_CPU_arch].i != 13
13737 && in_attr[i].i == 0))
13738 ; /* Do nothing. */
13739 /* Output value should be 0 if DSP part of architecture, ie.
13740 - post (>=) ARMv5te architecture output
13741 - A, R or S profile output or ARMv7E-M output architecture. */
13742 else if (out_attr[Tag_CPU_arch].i >= 4
13743 && (out_attr[Tag_CPU_arch_profile].i == 'A'
13744 || out_attr[Tag_CPU_arch_profile].i == 'R'
13745 || out_attr[Tag_CPU_arch_profile].i == 'S'
13746 || out_attr[Tag_CPU_arch].i == 13))
13747 out_attr[i].i = 0;
13748 /* Otherwise, DSP instructions are added and not part of output
13749 architecture. */
13750 else
13751 out_attr[i].i = 1;
13752 break;
13753
13754 case Tag_FP_arch:
13755 {
13756 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
13757 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
13758 when it's 0. It might mean absence of FP hardware if
13759 Tag_FP_arch is zero. */
13760
13761 #define VFP_VERSION_COUNT 9
13762 static const struct
13763 {
13764 int ver;
13765 int regs;
13766 } vfp_versions[VFP_VERSION_COUNT] =
13767 {
13768 {0, 0},
13769 {1, 16},
13770 {2, 16},
13771 {3, 32},
13772 {3, 16},
13773 {4, 32},
13774 {4, 16},
13775 {8, 32},
13776 {8, 16}
13777 };
13778 int ver;
13779 int regs;
13780 int newval;
13781
13782 /* If the output has no requirement about FP hardware,
13783 follow the requirement of the input. */
13784 if (out_attr[i].i == 0)
13785 {
13786 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
13787 out_attr[i].i = in_attr[i].i;
13788 out_attr[Tag_ABI_HardFP_use].i
13789 = in_attr[Tag_ABI_HardFP_use].i;
13790 break;
13791 }
13792 /* If the input has no requirement about FP hardware, do
13793 nothing. */
13794 else if (in_attr[i].i == 0)
13795 {
13796 BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0);
13797 break;
13798 }
13799
13800 /* Both the input and the output have nonzero Tag_FP_arch.
13801 So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */
13802
13803 /* If both the input and the output have zero Tag_ABI_HardFP_use,
13804 do nothing. */
13805 if (in_attr[Tag_ABI_HardFP_use].i == 0
13806 && out_attr[Tag_ABI_HardFP_use].i == 0)
13807 ;
13808 /* If the input and the output have different Tag_ABI_HardFP_use,
13809 the combination of them is 0 (implied by Tag_FP_arch). */
13810 else if (in_attr[Tag_ABI_HardFP_use].i
13811 != out_attr[Tag_ABI_HardFP_use].i)
13812 out_attr[Tag_ABI_HardFP_use].i = 0;
13813
13814 /* Now we can handle Tag_FP_arch. */
13815
13816 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
13817 pick the biggest. */
13818 if (in_attr[i].i >= VFP_VERSION_COUNT
13819 && in_attr[i].i > out_attr[i].i)
13820 {
13821 out_attr[i] = in_attr[i];
13822 break;
13823 }
13824 /* The output uses the superset of input features
13825 (ISA version) and registers. */
13826 ver = vfp_versions[in_attr[i].i].ver;
13827 if (ver < vfp_versions[out_attr[i].i].ver)
13828 ver = vfp_versions[out_attr[i].i].ver;
13829 regs = vfp_versions[in_attr[i].i].regs;
13830 if (regs < vfp_versions[out_attr[i].i].regs)
13831 regs = vfp_versions[out_attr[i].i].regs;
13832 /* This assumes all possible supersets are also a valid
13833 options. */
13834 for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
13835 {
13836 if (regs == vfp_versions[newval].regs
13837 && ver == vfp_versions[newval].ver)
13838 break;
13839 }
13840 out_attr[i].i = newval;
13841 }
13842 break;
13843 case Tag_PCS_config:
13844 if (out_attr[i].i == 0)
13845 out_attr[i].i = in_attr[i].i;
13846 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
13847 {
13848 /* It's sometimes ok to mix different configs, so this is only
13849 a warning. */
13850 _bfd_error_handler
13851 (_("Warning: %B: Conflicting platform configuration"), ibfd);
13852 }
13853 break;
13854 case Tag_ABI_PCS_R9_use:
13855 if (in_attr[i].i != out_attr[i].i
13856 && out_attr[i].i != AEABI_R9_unused
13857 && in_attr[i].i != AEABI_R9_unused)
13858 {
13859 _bfd_error_handler
13860 (_("error: %B: Conflicting use of R9"), ibfd);
13861 result = FALSE;
13862 }
13863 if (out_attr[i].i == AEABI_R9_unused)
13864 out_attr[i].i = in_attr[i].i;
13865 break;
13866 case Tag_ABI_PCS_RW_data:
13867 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
13868 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
13869 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
13870 {
13871 _bfd_error_handler
13872 (_("error: %B: SB relative addressing conflicts with use of R9"),
13873 ibfd);
13874 result = FALSE;
13875 }
13876 /* Use the smallest value specified. */
13877 if (in_attr[i].i < out_attr[i].i)
13878 out_attr[i].i = in_attr[i].i;
13879 break;
13880 case Tag_ABI_PCS_wchar_t:
13881 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
13882 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
13883 {
13884 _bfd_error_handler
13885 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
13886 ibfd, in_attr[i].i, out_attr[i].i);
13887 }
13888 else if (in_attr[i].i && !out_attr[i].i)
13889 out_attr[i].i = in_attr[i].i;
13890 break;
13891 case Tag_ABI_enum_size:
13892 if (in_attr[i].i != AEABI_enum_unused)
13893 {
13894 if (out_attr[i].i == AEABI_enum_unused
13895 || out_attr[i].i == AEABI_enum_forced_wide)
13896 {
13897 /* The existing object is compatible with anything.
13898 Use whatever requirements the new object has. */
13899 out_attr[i].i = in_attr[i].i;
13900 }
13901 else if (in_attr[i].i != AEABI_enum_forced_wide
13902 && out_attr[i].i != in_attr[i].i
13903 && !elf_arm_tdata (obfd)->no_enum_size_warning)
13904 {
13905 static const char *aeabi_enum_names[] =
13906 { "", "variable-size", "32-bit", "" };
13907 const char *in_name =
13908 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
13909 ? aeabi_enum_names[in_attr[i].i]
13910 : "<unknown>";
13911 const char *out_name =
13912 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
13913 ? aeabi_enum_names[out_attr[i].i]
13914 : "<unknown>";
13915 _bfd_error_handler
13916 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
13917 ibfd, in_name, out_name);
13918 }
13919 }
13920 break;
13921 case Tag_ABI_VFP_args:
13922 /* Aready done. */
13923 break;
13924 case Tag_ABI_WMMX_args:
13925 if (in_attr[i].i != out_attr[i].i)
13926 {
13927 _bfd_error_handler
13928 (_("error: %B uses iWMMXt register arguments, %B does not"),
13929 ibfd, obfd);
13930 result = FALSE;
13931 }
13932 break;
13933 case Tag_compatibility:
13934 /* Merged in target-independent code. */
13935 break;
13936 case Tag_ABI_HardFP_use:
13937 /* This is handled along with Tag_FP_arch. */
13938 break;
13939 case Tag_ABI_FP_16bit_format:
13940 if (in_attr[i].i != 0 && out_attr[i].i != 0)
13941 {
13942 if (in_attr[i].i != out_attr[i].i)
13943 {
13944 _bfd_error_handler
13945 (_("error: fp16 format mismatch between %B and %B"),
13946 ibfd, obfd);
13947 result = FALSE;
13948 }
13949 }
13950 if (in_attr[i].i != 0)
13951 out_attr[i].i = in_attr[i].i;
13952 break;
13953
13954 case Tag_DIV_use:
13955 /* A value of zero on input means that the divide instruction may
13956 be used if available in the base architecture as specified via
13957 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
13958 the user did not want divide instructions. A value of 2
13959 explicitly means that divide instructions were allowed in ARM
13960 and Thumb state. */
13961 if (in_attr[i].i == out_attr[i].i)
13962 /* Do nothing. */ ;
13963 else if (elf32_arm_attributes_forbid_div (in_attr)
13964 && !elf32_arm_attributes_accept_div (out_attr))
13965 out_attr[i].i = 1;
13966 else if (elf32_arm_attributes_forbid_div (out_attr)
13967 && elf32_arm_attributes_accept_div (in_attr))
13968 out_attr[i].i = in_attr[i].i;
13969 else if (in_attr[i].i == 2)
13970 out_attr[i].i = in_attr[i].i;
13971 break;
13972
13973 case Tag_MPextension_use_legacy:
13974 /* We don't output objects with Tag_MPextension_use_legacy - we
13975 move the value to Tag_MPextension_use. */
13976 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
13977 {
13978 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
13979 {
13980 _bfd_error_handler
13981 (_("%B has has both the current and legacy "
13982 "Tag_MPextension_use attributes"),
13983 ibfd);
13984 result = FALSE;
13985 }
13986 }
13987
13988 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
13989 out_attr[Tag_MPextension_use] = in_attr[i];
13990
13991 break;
13992
13993 case Tag_nodefaults:
13994 /* This tag is set if it exists, but the value is unused (and is
13995 typically zero). We don't actually need to do anything here -
13996 the merge happens automatically when the type flags are merged
13997 below. */
13998 break;
13999 case Tag_also_compatible_with:
14000 /* Already done in Tag_CPU_arch. */
14001 break;
14002 case Tag_conformance:
14003 /* Keep the attribute if it matches. Throw it away otherwise.
14004 No attribute means no claim to conform. */
14005 if (!in_attr[i].s || !out_attr[i].s
14006 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
14007 out_attr[i].s = NULL;
14008 break;
14009
14010 default:
14011 result
14012 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
14013 }
14014
14015 /* If out_attr was copied from in_attr then it won't have a type yet. */
14016 if (in_attr[i].type && !out_attr[i].type)
14017 out_attr[i].type = in_attr[i].type;
14018 }
14019
14020 /* Merge Tag_compatibility attributes and any common GNU ones. */
14021 if (!_bfd_elf_merge_object_attributes (ibfd, obfd))
14022 return FALSE;
14023
14024 /* Check for any attributes not known on ARM. */
14025 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
14026
14027 return result;
14028 }
14029
14030
14031 /* Return TRUE if the two EABI versions are incompatible. */
14032
14033 static bfd_boolean
14034 elf32_arm_versions_compatible (unsigned iver, unsigned over)
14035 {
14036 /* v4 and v5 are the same spec before and after it was released,
14037 so allow mixing them. */
14038 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
14039 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
14040 return TRUE;
14041
14042 return (iver == over);
14043 }
14044
14045 /* Merge backend specific data from an object file to the output
14046 object file when linking. */
14047
14048 static bfd_boolean
14049 elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd);
14050
14051 /* Display the flags field. */
14052
14053 static bfd_boolean
14054 elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
14055 {
14056 FILE * file = (FILE *) ptr;
14057 unsigned long flags;
14058
14059 BFD_ASSERT (abfd != NULL && ptr != NULL);
14060
14061 /* Print normal ELF private data. */
14062 _bfd_elf_print_private_bfd_data (abfd, ptr);
14063
14064 flags = elf_elfheader (abfd)->e_flags;
14065 /* Ignore init flag - it may not be set, despite the flags field
14066 containing valid data. */
14067
14068 /* xgettext:c-format */
14069 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
14070
14071 switch (EF_ARM_EABI_VERSION (flags))
14072 {
14073 case EF_ARM_EABI_UNKNOWN:
14074 /* The following flag bits are GNU extensions and not part of the
14075 official ARM ELF extended ABI. Hence they are only decoded if
14076 the EABI version is not set. */
14077 if (flags & EF_ARM_INTERWORK)
14078 fprintf (file, _(" [interworking enabled]"));
14079
14080 if (flags & EF_ARM_APCS_26)
14081 fprintf (file, " [APCS-26]");
14082 else
14083 fprintf (file, " [APCS-32]");
14084
14085 if (flags & EF_ARM_VFP_FLOAT)
14086 fprintf (file, _(" [VFP float format]"));
14087 else if (flags & EF_ARM_MAVERICK_FLOAT)
14088 fprintf (file, _(" [Maverick float format]"));
14089 else
14090 fprintf (file, _(" [FPA float format]"));
14091
14092 if (flags & EF_ARM_APCS_FLOAT)
14093 fprintf (file, _(" [floats passed in float registers]"));
14094
14095 if (flags & EF_ARM_PIC)
14096 fprintf (file, _(" [position independent]"));
14097
14098 if (flags & EF_ARM_NEW_ABI)
14099 fprintf (file, _(" [new ABI]"));
14100
14101 if (flags & EF_ARM_OLD_ABI)
14102 fprintf (file, _(" [old ABI]"));
14103
14104 if (flags & EF_ARM_SOFT_FLOAT)
14105 fprintf (file, _(" [software FP]"));
14106
14107 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
14108 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
14109 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
14110 | EF_ARM_MAVERICK_FLOAT);
14111 break;
14112
14113 case EF_ARM_EABI_VER1:
14114 fprintf (file, _(" [Version1 EABI]"));
14115
14116 if (flags & EF_ARM_SYMSARESORTED)
14117 fprintf (file, _(" [sorted symbol table]"));
14118 else
14119 fprintf (file, _(" [unsorted symbol table]"));
14120
14121 flags &= ~ EF_ARM_SYMSARESORTED;
14122 break;
14123
14124 case EF_ARM_EABI_VER2:
14125 fprintf (file, _(" [Version2 EABI]"));
14126
14127 if (flags & EF_ARM_SYMSARESORTED)
14128 fprintf (file, _(" [sorted symbol table]"));
14129 else
14130 fprintf (file, _(" [unsorted symbol table]"));
14131
14132 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
14133 fprintf (file, _(" [dynamic symbols use segment index]"));
14134
14135 if (flags & EF_ARM_MAPSYMSFIRST)
14136 fprintf (file, _(" [mapping symbols precede others]"));
14137
14138 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
14139 | EF_ARM_MAPSYMSFIRST);
14140 break;
14141
14142 case EF_ARM_EABI_VER3:
14143 fprintf (file, _(" [Version3 EABI]"));
14144 break;
14145
14146 case EF_ARM_EABI_VER4:
14147 fprintf (file, _(" [Version4 EABI]"));
14148 goto eabi;
14149
14150 case EF_ARM_EABI_VER5:
14151 fprintf (file, _(" [Version5 EABI]"));
14152
14153 if (flags & EF_ARM_ABI_FLOAT_SOFT)
14154 fprintf (file, _(" [soft-float ABI]"));
14155
14156 if (flags & EF_ARM_ABI_FLOAT_HARD)
14157 fprintf (file, _(" [hard-float ABI]"));
14158
14159 flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
14160
14161 eabi:
14162 if (flags & EF_ARM_BE8)
14163 fprintf (file, _(" [BE8]"));
14164
14165 if (flags & EF_ARM_LE8)
14166 fprintf (file, _(" [LE8]"));
14167
14168 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
14169 break;
14170
14171 default:
14172 fprintf (file, _(" <EABI version unrecognised>"));
14173 break;
14174 }
14175
14176 flags &= ~ EF_ARM_EABIMASK;
14177
14178 if (flags & EF_ARM_RELEXEC)
14179 fprintf (file, _(" [relocatable executable]"));
14180
14181 flags &= ~EF_ARM_RELEXEC;
14182
14183 if (flags)
14184 fprintf (file, _("<Unrecognised flag bits set>"));
14185
14186 fputc ('\n', file);
14187
14188 return TRUE;
14189 }
14190
14191 static int
14192 elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
14193 {
14194 switch (ELF_ST_TYPE (elf_sym->st_info))
14195 {
14196 case STT_ARM_TFUNC:
14197 return ELF_ST_TYPE (elf_sym->st_info);
14198
14199 case STT_ARM_16BIT:
14200 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
14201 This allows us to distinguish between data used by Thumb instructions
14202 and non-data (which is probably code) inside Thumb regions of an
14203 executable. */
14204 if (type != STT_OBJECT && type != STT_TLS)
14205 return ELF_ST_TYPE (elf_sym->st_info);
14206 break;
14207
14208 default:
14209 break;
14210 }
14211
14212 return type;
14213 }
14214
14215 static asection *
14216 elf32_arm_gc_mark_hook (asection *sec,
14217 struct bfd_link_info *info,
14218 Elf_Internal_Rela *rel,
14219 struct elf_link_hash_entry *h,
14220 Elf_Internal_Sym *sym)
14221 {
14222 if (h != NULL)
14223 switch (ELF32_R_TYPE (rel->r_info))
14224 {
14225 case R_ARM_GNU_VTINHERIT:
14226 case R_ARM_GNU_VTENTRY:
14227 return NULL;
14228 }
14229
14230 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
14231 }
14232
14233 /* Update the got entry reference counts for the section being removed. */
14234
14235 static bfd_boolean
14236 elf32_arm_gc_sweep_hook (bfd * abfd,
14237 struct bfd_link_info * info,
14238 asection * sec,
14239 const Elf_Internal_Rela * relocs)
14240 {
14241 Elf_Internal_Shdr *symtab_hdr;
14242 struct elf_link_hash_entry **sym_hashes;
14243 bfd_signed_vma *local_got_refcounts;
14244 const Elf_Internal_Rela *rel, *relend;
14245 struct elf32_arm_link_hash_table * globals;
14246
14247 if (bfd_link_relocatable (info))
14248 return TRUE;
14249
14250 globals = elf32_arm_hash_table (info);
14251 if (globals == NULL)
14252 return FALSE;
14253
14254 elf_section_data (sec)->local_dynrel = NULL;
14255
14256 symtab_hdr = & elf_symtab_hdr (abfd);
14257 sym_hashes = elf_sym_hashes (abfd);
14258 local_got_refcounts = elf_local_got_refcounts (abfd);
14259
14260 check_use_blx (globals);
14261
14262 relend = relocs + sec->reloc_count;
14263 for (rel = relocs; rel < relend; rel++)
14264 {
14265 unsigned long r_symndx;
14266 struct elf_link_hash_entry *h = NULL;
14267 struct elf32_arm_link_hash_entry *eh;
14268 int r_type;
14269 bfd_boolean call_reloc_p;
14270 bfd_boolean may_become_dynamic_p;
14271 bfd_boolean may_need_local_target_p;
14272 union gotplt_union *root_plt;
14273 struct arm_plt_info *arm_plt;
14274
14275 r_symndx = ELF32_R_SYM (rel->r_info);
14276 if (r_symndx >= symtab_hdr->sh_info)
14277 {
14278 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14279 while (h->root.type == bfd_link_hash_indirect
14280 || h->root.type == bfd_link_hash_warning)
14281 h = (struct elf_link_hash_entry *) h->root.u.i.link;
14282 }
14283 eh = (struct elf32_arm_link_hash_entry *) h;
14284
14285 call_reloc_p = FALSE;
14286 may_become_dynamic_p = FALSE;
14287 may_need_local_target_p = FALSE;
14288
14289 r_type = ELF32_R_TYPE (rel->r_info);
14290 r_type = arm_real_reloc_type (globals, r_type);
14291 switch (r_type)
14292 {
14293 case R_ARM_GOT32:
14294 case R_ARM_GOT_PREL:
14295 case R_ARM_TLS_GD32:
14296 case R_ARM_TLS_IE32:
14297 if (h != NULL)
14298 {
14299 if (h->got.refcount > 0)
14300 h->got.refcount -= 1;
14301 }
14302 else if (local_got_refcounts != NULL)
14303 {
14304 if (local_got_refcounts[r_symndx] > 0)
14305 local_got_refcounts[r_symndx] -= 1;
14306 }
14307 break;
14308
14309 case R_ARM_TLS_LDM32:
14310 globals->tls_ldm_got.refcount -= 1;
14311 break;
14312
14313 case R_ARM_PC24:
14314 case R_ARM_PLT32:
14315 case R_ARM_CALL:
14316 case R_ARM_JUMP24:
14317 case R_ARM_PREL31:
14318 case R_ARM_THM_CALL:
14319 case R_ARM_THM_JUMP24:
14320 case R_ARM_THM_JUMP19:
14321 call_reloc_p = TRUE;
14322 may_need_local_target_p = TRUE;
14323 break;
14324
14325 case R_ARM_ABS12:
14326 if (!globals->vxworks_p)
14327 {
14328 may_need_local_target_p = TRUE;
14329 break;
14330 }
14331 /* Fall through. */
14332 case R_ARM_ABS32:
14333 case R_ARM_ABS32_NOI:
14334 case R_ARM_REL32:
14335 case R_ARM_REL32_NOI:
14336 case R_ARM_MOVW_ABS_NC:
14337 case R_ARM_MOVT_ABS:
14338 case R_ARM_MOVW_PREL_NC:
14339 case R_ARM_MOVT_PREL:
14340 case R_ARM_THM_MOVW_ABS_NC:
14341 case R_ARM_THM_MOVT_ABS:
14342 case R_ARM_THM_MOVW_PREL_NC:
14343 case R_ARM_THM_MOVT_PREL:
14344 /* Should the interworking branches be here also? */
14345 if ((bfd_link_pic (info) || globals->root.is_relocatable_executable)
14346 && (sec->flags & SEC_ALLOC) != 0)
14347 {
14348 if (h == NULL
14349 && elf32_arm_howto_from_type (r_type)->pc_relative)
14350 {
14351 call_reloc_p = TRUE;
14352 may_need_local_target_p = TRUE;
14353 }
14354 else
14355 may_become_dynamic_p = TRUE;
14356 }
14357 else
14358 may_need_local_target_p = TRUE;
14359 break;
14360
14361 default:
14362 break;
14363 }
14364
14365 if (may_need_local_target_p
14366 && elf32_arm_get_plt_info (abfd, globals, eh, r_symndx, &root_plt,
14367 &arm_plt))
14368 {
14369 /* If PLT refcount book-keeping is wrong and too low, we'll
14370 see a zero value (going to -1) for the root PLT reference
14371 count. */
14372 if (root_plt->refcount >= 0)
14373 {
14374 BFD_ASSERT (root_plt->refcount != 0);
14375 root_plt->refcount -= 1;
14376 }
14377 else
14378 /* A value of -1 means the symbol has become local, forced
14379 or seeing a hidden definition. Any other negative value
14380 is an error. */
14381 BFD_ASSERT (root_plt->refcount == -1);
14382
14383 if (!call_reloc_p)
14384 arm_plt->noncall_refcount--;
14385
14386 if (r_type == R_ARM_THM_CALL)
14387 arm_plt->maybe_thumb_refcount--;
14388
14389 if (r_type == R_ARM_THM_JUMP24
14390 || r_type == R_ARM_THM_JUMP19)
14391 arm_plt->thumb_refcount--;
14392 }
14393
14394 if (may_become_dynamic_p)
14395 {
14396 struct elf_dyn_relocs **pp;
14397 struct elf_dyn_relocs *p;
14398
14399 if (h != NULL)
14400 pp = &(eh->dyn_relocs);
14401 else
14402 {
14403 Elf_Internal_Sym *isym;
14404
14405 isym = bfd_sym_from_r_symndx (&globals->sym_cache,
14406 abfd, r_symndx);
14407 if (isym == NULL)
14408 return FALSE;
14409 pp = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
14410 if (pp == NULL)
14411 return FALSE;
14412 }
14413 for (; (p = *pp) != NULL; pp = &p->next)
14414 if (p->sec == sec)
14415 {
14416 /* Everything must go for SEC. */
14417 *pp = p->next;
14418 break;
14419 }
14420 }
14421 }
14422
14423 return TRUE;
14424 }
14425
14426 /* Look through the relocs for a section during the first phase. */
14427
14428 static bfd_boolean
14429 elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
14430 asection *sec, const Elf_Internal_Rela *relocs)
14431 {
14432 Elf_Internal_Shdr *symtab_hdr;
14433 struct elf_link_hash_entry **sym_hashes;
14434 const Elf_Internal_Rela *rel;
14435 const Elf_Internal_Rela *rel_end;
14436 bfd *dynobj;
14437 asection *sreloc;
14438 struct elf32_arm_link_hash_table *htab;
14439 bfd_boolean call_reloc_p;
14440 bfd_boolean may_become_dynamic_p;
14441 bfd_boolean may_need_local_target_p;
14442 unsigned long nsyms;
14443
14444 if (bfd_link_relocatable (info))
14445 return TRUE;
14446
14447 BFD_ASSERT (is_arm_elf (abfd));
14448
14449 htab = elf32_arm_hash_table (info);
14450 if (htab == NULL)
14451 return FALSE;
14452
14453 sreloc = NULL;
14454
14455 /* Create dynamic sections for relocatable executables so that we can
14456 copy relocations. */
14457 if (htab->root.is_relocatable_executable
14458 && ! htab->root.dynamic_sections_created)
14459 {
14460 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
14461 return FALSE;
14462 }
14463
14464 if (htab->root.dynobj == NULL)
14465 htab->root.dynobj = abfd;
14466 if (!create_ifunc_sections (info))
14467 return FALSE;
14468
14469 dynobj = htab->root.dynobj;
14470
14471 symtab_hdr = & elf_symtab_hdr (abfd);
14472 sym_hashes = elf_sym_hashes (abfd);
14473 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
14474
14475 rel_end = relocs + sec->reloc_count;
14476 for (rel = relocs; rel < rel_end; rel++)
14477 {
14478 Elf_Internal_Sym *isym;
14479 struct elf_link_hash_entry *h;
14480 struct elf32_arm_link_hash_entry *eh;
14481 unsigned long r_symndx;
14482 int r_type;
14483
14484 r_symndx = ELF32_R_SYM (rel->r_info);
14485 r_type = ELF32_R_TYPE (rel->r_info);
14486 r_type = arm_real_reloc_type (htab, r_type);
14487
14488 if (r_symndx >= nsyms
14489 /* PR 9934: It is possible to have relocations that do not
14490 refer to symbols, thus it is also possible to have an
14491 object file containing relocations but no symbol table. */
14492 && (r_symndx > STN_UNDEF || nsyms > 0))
14493 {
14494 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
14495 r_symndx);
14496 return FALSE;
14497 }
14498
14499 h = NULL;
14500 isym = NULL;
14501 if (nsyms > 0)
14502 {
14503 if (r_symndx < symtab_hdr->sh_info)
14504 {
14505 /* A local symbol. */
14506 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
14507 abfd, r_symndx);
14508 if (isym == NULL)
14509 return FALSE;
14510 }
14511 else
14512 {
14513 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14514 while (h->root.type == bfd_link_hash_indirect
14515 || h->root.type == bfd_link_hash_warning)
14516 h = (struct elf_link_hash_entry *) h->root.u.i.link;
14517
14518 /* PR15323, ref flags aren't set for references in the
14519 same object. */
14520 h->root.non_ir_ref = 1;
14521 }
14522 }
14523
14524 eh = (struct elf32_arm_link_hash_entry *) h;
14525
14526 call_reloc_p = FALSE;
14527 may_become_dynamic_p = FALSE;
14528 may_need_local_target_p = FALSE;
14529
14530 /* Could be done earlier, if h were already available. */
14531 r_type = elf32_arm_tls_transition (info, r_type, h);
14532 switch (r_type)
14533 {
14534 case R_ARM_GOT32:
14535 case R_ARM_GOT_PREL:
14536 case R_ARM_TLS_GD32:
14537 case R_ARM_TLS_IE32:
14538 case R_ARM_TLS_GOTDESC:
14539 case R_ARM_TLS_DESCSEQ:
14540 case R_ARM_THM_TLS_DESCSEQ:
14541 case R_ARM_TLS_CALL:
14542 case R_ARM_THM_TLS_CALL:
14543 /* This symbol requires a global offset table entry. */
14544 {
14545 int tls_type, old_tls_type;
14546
14547 switch (r_type)
14548 {
14549 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
14550
14551 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
14552
14553 case R_ARM_TLS_GOTDESC:
14554 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
14555 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
14556 tls_type = GOT_TLS_GDESC; break;
14557
14558 default: tls_type = GOT_NORMAL; break;
14559 }
14560
14561 if (!bfd_link_executable (info) && (tls_type & GOT_TLS_IE))
14562 info->flags |= DF_STATIC_TLS;
14563
14564 if (h != NULL)
14565 {
14566 h->got.refcount++;
14567 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
14568 }
14569 else
14570 {
14571 /* This is a global offset table entry for a local symbol. */
14572 if (!elf32_arm_allocate_local_sym_info (abfd))
14573 return FALSE;
14574 elf_local_got_refcounts (abfd)[r_symndx] += 1;
14575 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
14576 }
14577
14578 /* If a variable is accessed with both tls methods, two
14579 slots may be created. */
14580 if (GOT_TLS_GD_ANY_P (old_tls_type)
14581 && GOT_TLS_GD_ANY_P (tls_type))
14582 tls_type |= old_tls_type;
14583
14584 /* We will already have issued an error message if there
14585 is a TLS/non-TLS mismatch, based on the symbol
14586 type. So just combine any TLS types needed. */
14587 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
14588 && tls_type != GOT_NORMAL)
14589 tls_type |= old_tls_type;
14590
14591 /* If the symbol is accessed in both IE and GDESC
14592 method, we're able to relax. Turn off the GDESC flag,
14593 without messing up with any other kind of tls types
14594 that may be involved. */
14595 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
14596 tls_type &= ~GOT_TLS_GDESC;
14597
14598 if (old_tls_type != tls_type)
14599 {
14600 if (h != NULL)
14601 elf32_arm_hash_entry (h)->tls_type = tls_type;
14602 else
14603 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
14604 }
14605 }
14606 /* Fall through. */
14607
14608 case R_ARM_TLS_LDM32:
14609 if (r_type == R_ARM_TLS_LDM32)
14610 htab->tls_ldm_got.refcount++;
14611 /* Fall through. */
14612
14613 case R_ARM_GOTOFF32:
14614 case R_ARM_GOTPC:
14615 if (htab->root.sgot == NULL
14616 && !create_got_section (htab->root.dynobj, info))
14617 return FALSE;
14618 break;
14619
14620 case R_ARM_PC24:
14621 case R_ARM_PLT32:
14622 case R_ARM_CALL:
14623 case R_ARM_JUMP24:
14624 case R_ARM_PREL31:
14625 case R_ARM_THM_CALL:
14626 case R_ARM_THM_JUMP24:
14627 case R_ARM_THM_JUMP19:
14628 call_reloc_p = TRUE;
14629 may_need_local_target_p = TRUE;
14630 break;
14631
14632 case R_ARM_ABS12:
14633 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
14634 ldr __GOTT_INDEX__ offsets. */
14635 if (!htab->vxworks_p)
14636 {
14637 may_need_local_target_p = TRUE;
14638 break;
14639 }
14640 else goto jump_over;
14641
14642 /* Fall through. */
14643
14644 case R_ARM_MOVW_ABS_NC:
14645 case R_ARM_MOVT_ABS:
14646 case R_ARM_THM_MOVW_ABS_NC:
14647 case R_ARM_THM_MOVT_ABS:
14648 if (bfd_link_pic (info))
14649 {
14650 (*_bfd_error_handler)
14651 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
14652 abfd, elf32_arm_howto_table_1[r_type].name,
14653 (h) ? h->root.root.string : "a local symbol");
14654 bfd_set_error (bfd_error_bad_value);
14655 return FALSE;
14656 }
14657
14658 /* Fall through. */
14659 case R_ARM_ABS32:
14660 case R_ARM_ABS32_NOI:
14661 jump_over:
14662 if (h != NULL && bfd_link_executable (info))
14663 {
14664 h->pointer_equality_needed = 1;
14665 }
14666 /* Fall through. */
14667 case R_ARM_REL32:
14668 case R_ARM_REL32_NOI:
14669 case R_ARM_MOVW_PREL_NC:
14670 case R_ARM_MOVT_PREL:
14671 case R_ARM_THM_MOVW_PREL_NC:
14672 case R_ARM_THM_MOVT_PREL:
14673
14674 /* Should the interworking branches be listed here? */
14675 if ((bfd_link_pic (info) || htab->root.is_relocatable_executable)
14676 && (sec->flags & SEC_ALLOC) != 0)
14677 {
14678 if (h == NULL
14679 && elf32_arm_howto_from_type (r_type)->pc_relative)
14680 {
14681 /* In shared libraries and relocatable executables,
14682 we treat local relative references as calls;
14683 see the related SYMBOL_CALLS_LOCAL code in
14684 allocate_dynrelocs. */
14685 call_reloc_p = TRUE;
14686 may_need_local_target_p = TRUE;
14687 }
14688 else
14689 /* We are creating a shared library or relocatable
14690 executable, and this is a reloc against a global symbol,
14691 or a non-PC-relative reloc against a local symbol.
14692 We may need to copy the reloc into the output. */
14693 may_become_dynamic_p = TRUE;
14694 }
14695 else
14696 may_need_local_target_p = TRUE;
14697 break;
14698
14699 /* This relocation describes the C++ object vtable hierarchy.
14700 Reconstruct it for later use during GC. */
14701 case R_ARM_GNU_VTINHERIT:
14702 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
14703 return FALSE;
14704 break;
14705
14706 /* This relocation describes which C++ vtable entries are actually
14707 used. Record for later use during GC. */
14708 case R_ARM_GNU_VTENTRY:
14709 BFD_ASSERT (h != NULL);
14710 if (h != NULL
14711 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
14712 return FALSE;
14713 break;
14714 }
14715
14716 if (h != NULL)
14717 {
14718 if (call_reloc_p)
14719 /* We may need a .plt entry if the function this reloc
14720 refers to is in a different object, regardless of the
14721 symbol's type. We can't tell for sure yet, because
14722 something later might force the symbol local. */
14723 h->needs_plt = 1;
14724 else if (may_need_local_target_p)
14725 /* If this reloc is in a read-only section, we might
14726 need a copy reloc. We can't check reliably at this
14727 stage whether the section is read-only, as input
14728 sections have not yet been mapped to output sections.
14729 Tentatively set the flag for now, and correct in
14730 adjust_dynamic_symbol. */
14731 h->non_got_ref = 1;
14732 }
14733
14734 if (may_need_local_target_p
14735 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
14736 {
14737 union gotplt_union *root_plt;
14738 struct arm_plt_info *arm_plt;
14739 struct arm_local_iplt_info *local_iplt;
14740
14741 if (h != NULL)
14742 {
14743 root_plt = &h->plt;
14744 arm_plt = &eh->plt;
14745 }
14746 else
14747 {
14748 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
14749 if (local_iplt == NULL)
14750 return FALSE;
14751 root_plt = &local_iplt->root;
14752 arm_plt = &local_iplt->arm;
14753 }
14754
14755 /* If the symbol is a function that doesn't bind locally,
14756 this relocation will need a PLT entry. */
14757 if (root_plt->refcount != -1)
14758 root_plt->refcount += 1;
14759
14760 if (!call_reloc_p)
14761 arm_plt->noncall_refcount++;
14762
14763 /* It's too early to use htab->use_blx here, so we have to
14764 record possible blx references separately from
14765 relocs that definitely need a thumb stub. */
14766
14767 if (r_type == R_ARM_THM_CALL)
14768 arm_plt->maybe_thumb_refcount += 1;
14769
14770 if (r_type == R_ARM_THM_JUMP24
14771 || r_type == R_ARM_THM_JUMP19)
14772 arm_plt->thumb_refcount += 1;
14773 }
14774
14775 if (may_become_dynamic_p)
14776 {
14777 struct elf_dyn_relocs *p, **head;
14778
14779 /* Create a reloc section in dynobj. */
14780 if (sreloc == NULL)
14781 {
14782 sreloc = _bfd_elf_make_dynamic_reloc_section
14783 (sec, dynobj, 2, abfd, ! htab->use_rel);
14784
14785 if (sreloc == NULL)
14786 return FALSE;
14787
14788 /* BPABI objects never have dynamic relocations mapped. */
14789 if (htab->symbian_p)
14790 {
14791 flagword flags;
14792
14793 flags = bfd_get_section_flags (dynobj, sreloc);
14794 flags &= ~(SEC_LOAD | SEC_ALLOC);
14795 bfd_set_section_flags (dynobj, sreloc, flags);
14796 }
14797 }
14798
14799 /* If this is a global symbol, count the number of
14800 relocations we need for this symbol. */
14801 if (h != NULL)
14802 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
14803 else
14804 {
14805 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
14806 if (head == NULL)
14807 return FALSE;
14808 }
14809
14810 p = *head;
14811 if (p == NULL || p->sec != sec)
14812 {
14813 bfd_size_type amt = sizeof *p;
14814
14815 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
14816 if (p == NULL)
14817 return FALSE;
14818 p->next = *head;
14819 *head = p;
14820 p->sec = sec;
14821 p->count = 0;
14822 p->pc_count = 0;
14823 }
14824
14825 if (elf32_arm_howto_from_type (r_type)->pc_relative)
14826 p->pc_count += 1;
14827 p->count += 1;
14828 }
14829 }
14830
14831 return TRUE;
14832 }
14833
14834 /* Unwinding tables are not referenced directly. This pass marks them as
14835 required if the corresponding code section is marked. Similarly, ARMv8-M
14836 secure entry functions can only be referenced by SG veneers which are
14837 created after the GC process. They need to be marked in case they reside in
14838 their own section (as would be the case if code was compiled with
14839 -ffunction-sections). */
14840
14841 static bfd_boolean
14842 elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
14843 elf_gc_mark_hook_fn gc_mark_hook)
14844 {
14845 bfd *sub;
14846 Elf_Internal_Shdr **elf_shdrp;
14847 asection *cmse_sec;
14848 obj_attribute *out_attr;
14849 Elf_Internal_Shdr *symtab_hdr;
14850 unsigned i, sym_count, ext_start;
14851 const struct elf_backend_data *bed;
14852 struct elf_link_hash_entry **sym_hashes;
14853 struct elf32_arm_link_hash_entry *cmse_hash;
14854 bfd_boolean again, is_v8m, first_bfd_browse = TRUE;
14855
14856 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
14857
14858 out_attr = elf_known_obj_attributes_proc (info->output_bfd);
14859 is_v8m = out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
14860 && out_attr[Tag_CPU_arch_profile].i == 'M';
14861
14862 /* Marking EH data may cause additional code sections to be marked,
14863 requiring multiple passes. */
14864 again = TRUE;
14865 while (again)
14866 {
14867 again = FALSE;
14868 for (sub = info->input_bfds; sub != NULL; sub = sub->link.next)
14869 {
14870 asection *o;
14871
14872 if (! is_arm_elf (sub))
14873 continue;
14874
14875 elf_shdrp = elf_elfsections (sub);
14876 for (o = sub->sections; o != NULL; o = o->next)
14877 {
14878 Elf_Internal_Shdr *hdr;
14879
14880 hdr = &elf_section_data (o)->this_hdr;
14881 if (hdr->sh_type == SHT_ARM_EXIDX
14882 && hdr->sh_link
14883 && hdr->sh_link < elf_numsections (sub)
14884 && !o->gc_mark
14885 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
14886 {
14887 again = TRUE;
14888 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
14889 return FALSE;
14890 }
14891 }
14892
14893 /* Mark section holding ARMv8-M secure entry functions. We mark all
14894 of them so no need for a second browsing. */
14895 if (is_v8m && first_bfd_browse)
14896 {
14897 sym_hashes = elf_sym_hashes (sub);
14898 bed = get_elf_backend_data (sub);
14899 symtab_hdr = &elf_tdata (sub)->symtab_hdr;
14900 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
14901 ext_start = symtab_hdr->sh_info;
14902
14903 /* Scan symbols. */
14904 for (i = ext_start; i < sym_count; i++)
14905 {
14906 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
14907
14908 /* Assume it is a special symbol. If not, cmse_scan will
14909 warn about it and user can do something about it. */
14910 if (ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
14911 {
14912 cmse_sec = cmse_hash->root.root.u.def.section;
14913 if (!_bfd_elf_gc_mark (info, cmse_sec, gc_mark_hook))
14914 return FALSE;
14915 }
14916 }
14917 }
14918 }
14919 first_bfd_browse = FALSE;
14920 }
14921
14922 return TRUE;
14923 }
14924
14925 /* Treat mapping symbols as special target symbols. */
14926
14927 static bfd_boolean
14928 elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
14929 {
14930 return bfd_is_arm_special_symbol_name (sym->name,
14931 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
14932 }
14933
14934 /* This is a copy of elf_find_function() from elf.c except that
14935 ARM mapping symbols are ignored when looking for function names
14936 and STT_ARM_TFUNC is considered to a function type. */
14937
14938 static bfd_boolean
14939 arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
14940 asymbol ** symbols,
14941 asection * section,
14942 bfd_vma offset,
14943 const char ** filename_ptr,
14944 const char ** functionname_ptr)
14945 {
14946 const char * filename = NULL;
14947 asymbol * func = NULL;
14948 bfd_vma low_func = 0;
14949 asymbol ** p;
14950
14951 for (p = symbols; *p != NULL; p++)
14952 {
14953 elf_symbol_type *q;
14954
14955 q = (elf_symbol_type *) *p;
14956
14957 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
14958 {
14959 default:
14960 break;
14961 case STT_FILE:
14962 filename = bfd_asymbol_name (&q->symbol);
14963 break;
14964 case STT_FUNC:
14965 case STT_ARM_TFUNC:
14966 case STT_NOTYPE:
14967 /* Skip mapping symbols. */
14968 if ((q->symbol.flags & BSF_LOCAL)
14969 && bfd_is_arm_special_symbol_name (q->symbol.name,
14970 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
14971 continue;
14972 /* Fall through. */
14973 if (bfd_get_section (&q->symbol) == section
14974 && q->symbol.value >= low_func
14975 && q->symbol.value <= offset)
14976 {
14977 func = (asymbol *) q;
14978 low_func = q->symbol.value;
14979 }
14980 break;
14981 }
14982 }
14983
14984 if (func == NULL)
14985 return FALSE;
14986
14987 if (filename_ptr)
14988 *filename_ptr = filename;
14989 if (functionname_ptr)
14990 *functionname_ptr = bfd_asymbol_name (func);
14991
14992 return TRUE;
14993 }
14994
14995
14996 /* Find the nearest line to a particular section and offset, for error
14997 reporting. This code is a duplicate of the code in elf.c, except
14998 that it uses arm_elf_find_function. */
14999
15000 static bfd_boolean
15001 elf32_arm_find_nearest_line (bfd * abfd,
15002 asymbol ** symbols,
15003 asection * section,
15004 bfd_vma offset,
15005 const char ** filename_ptr,
15006 const char ** functionname_ptr,
15007 unsigned int * line_ptr,
15008 unsigned int * discriminator_ptr)
15009 {
15010 bfd_boolean found = FALSE;
15011
15012 if (_bfd_dwarf2_find_nearest_line (abfd, symbols, NULL, section, offset,
15013 filename_ptr, functionname_ptr,
15014 line_ptr, discriminator_ptr,
15015 dwarf_debug_sections, 0,
15016 & elf_tdata (abfd)->dwarf2_find_line_info))
15017 {
15018 if (!*functionname_ptr)
15019 arm_elf_find_function (abfd, symbols, section, offset,
15020 *filename_ptr ? NULL : filename_ptr,
15021 functionname_ptr);
15022
15023 return TRUE;
15024 }
15025
15026 /* Skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain
15027 uses DWARF1. */
15028
15029 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
15030 & found, filename_ptr,
15031 functionname_ptr, line_ptr,
15032 & elf_tdata (abfd)->line_info))
15033 return FALSE;
15034
15035 if (found && (*functionname_ptr || *line_ptr))
15036 return TRUE;
15037
15038 if (symbols == NULL)
15039 return FALSE;
15040
15041 if (! arm_elf_find_function (abfd, symbols, section, offset,
15042 filename_ptr, functionname_ptr))
15043 return FALSE;
15044
15045 *line_ptr = 0;
15046 return TRUE;
15047 }
15048
15049 static bfd_boolean
15050 elf32_arm_find_inliner_info (bfd * abfd,
15051 const char ** filename_ptr,
15052 const char ** functionname_ptr,
15053 unsigned int * line_ptr)
15054 {
15055 bfd_boolean found;
15056 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
15057 functionname_ptr, line_ptr,
15058 & elf_tdata (abfd)->dwarf2_find_line_info);
15059 return found;
15060 }
15061
15062 /* Adjust a symbol defined by a dynamic object and referenced by a
15063 regular object. The current definition is in some section of the
15064 dynamic object, but we're not including those sections. We have to
15065 change the definition to something the rest of the link can
15066 understand. */
15067
15068 static bfd_boolean
15069 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
15070 struct elf_link_hash_entry * h)
15071 {
15072 bfd * dynobj;
15073 asection * s;
15074 struct elf32_arm_link_hash_entry * eh;
15075 struct elf32_arm_link_hash_table *globals;
15076
15077 globals = elf32_arm_hash_table (info);
15078 if (globals == NULL)
15079 return FALSE;
15080
15081 dynobj = elf_hash_table (info)->dynobj;
15082
15083 /* Make sure we know what is going on here. */
15084 BFD_ASSERT (dynobj != NULL
15085 && (h->needs_plt
15086 || h->type == STT_GNU_IFUNC
15087 || h->u.weakdef != NULL
15088 || (h->def_dynamic
15089 && h->ref_regular
15090 && !h->def_regular)));
15091
15092 eh = (struct elf32_arm_link_hash_entry *) h;
15093
15094 /* If this is a function, put it in the procedure linkage table. We
15095 will fill in the contents of the procedure linkage table later,
15096 when we know the address of the .got section. */
15097 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
15098 {
15099 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
15100 symbol binds locally. */
15101 if (h->plt.refcount <= 0
15102 || (h->type != STT_GNU_IFUNC
15103 && (SYMBOL_CALLS_LOCAL (info, h)
15104 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
15105 && h->root.type == bfd_link_hash_undefweak))))
15106 {
15107 /* This case can occur if we saw a PLT32 reloc in an input
15108 file, but the symbol was never referred to by a dynamic
15109 object, or if all references were garbage collected. In
15110 such a case, we don't actually need to build a procedure
15111 linkage table, and we can just do a PC24 reloc instead. */
15112 h->plt.offset = (bfd_vma) -1;
15113 eh->plt.thumb_refcount = 0;
15114 eh->plt.maybe_thumb_refcount = 0;
15115 eh->plt.noncall_refcount = 0;
15116 h->needs_plt = 0;
15117 }
15118
15119 return TRUE;
15120 }
15121 else
15122 {
15123 /* It's possible that we incorrectly decided a .plt reloc was
15124 needed for an R_ARM_PC24 or similar reloc to a non-function sym
15125 in check_relocs. We can't decide accurately between function
15126 and non-function syms in check-relocs; Objects loaded later in
15127 the link may change h->type. So fix it now. */
15128 h->plt.offset = (bfd_vma) -1;
15129 eh->plt.thumb_refcount = 0;
15130 eh->plt.maybe_thumb_refcount = 0;
15131 eh->plt.noncall_refcount = 0;
15132 }
15133
15134 /* If this is a weak symbol, and there is a real definition, the
15135 processor independent code will have arranged for us to see the
15136 real definition first, and we can just use the same value. */
15137 if (h->u.weakdef != NULL)
15138 {
15139 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
15140 || h->u.weakdef->root.type == bfd_link_hash_defweak);
15141 h->root.u.def.section = h->u.weakdef->root.u.def.section;
15142 h->root.u.def.value = h->u.weakdef->root.u.def.value;
15143 return TRUE;
15144 }
15145
15146 /* If there are no non-GOT references, we do not need a copy
15147 relocation. */
15148 if (!h->non_got_ref)
15149 return TRUE;
15150
15151 /* This is a reference to a symbol defined by a dynamic object which
15152 is not a function. */
15153
15154 /* If we are creating a shared library, we must presume that the
15155 only references to the symbol are via the global offset table.
15156 For such cases we need not do anything here; the relocations will
15157 be handled correctly by relocate_section. Relocatable executables
15158 can reference data in shared objects directly, so we don't need to
15159 do anything here. */
15160 if (bfd_link_pic (info) || globals->root.is_relocatable_executable)
15161 return TRUE;
15162
15163 /* We must allocate the symbol in our .dynbss section, which will
15164 become part of the .bss section of the executable. There will be
15165 an entry for this symbol in the .dynsym section. The dynamic
15166 object will contain position independent code, so all references
15167 from the dynamic object to this symbol will go through the global
15168 offset table. The dynamic linker will use the .dynsym entry to
15169 determine the address it must put in the global offset table, so
15170 both the dynamic object and the regular object will refer to the
15171 same memory location for the variable. */
15172 s = bfd_get_linker_section (dynobj, ".dynbss");
15173 BFD_ASSERT (s != NULL);
15174
15175 /* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic
15176 linker to copy the initial value out of the dynamic object and into
15177 the runtime process image. We need to remember the offset into the
15178 .rel(a).bss section we are going to use. */
15179 if (info->nocopyreloc == 0
15180 && (h->root.u.def.section->flags & SEC_ALLOC) != 0
15181 && h->size != 0)
15182 {
15183 asection *srel;
15184
15185 srel = bfd_get_linker_section (dynobj, RELOC_SECTION (globals, ".bss"));
15186 elf32_arm_allocate_dynrelocs (info, srel, 1);
15187 h->needs_copy = 1;
15188 }
15189
15190 return _bfd_elf_adjust_dynamic_copy (info, h, s);
15191 }
15192
15193 /* Allocate space in .plt, .got and associated reloc sections for
15194 dynamic relocs. */
15195
15196 static bfd_boolean
15197 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
15198 {
15199 struct bfd_link_info *info;
15200 struct elf32_arm_link_hash_table *htab;
15201 struct elf32_arm_link_hash_entry *eh;
15202 struct elf_dyn_relocs *p;
15203
15204 if (h->root.type == bfd_link_hash_indirect)
15205 return TRUE;
15206
15207 eh = (struct elf32_arm_link_hash_entry *) h;
15208
15209 info = (struct bfd_link_info *) inf;
15210 htab = elf32_arm_hash_table (info);
15211 if (htab == NULL)
15212 return FALSE;
15213
15214 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
15215 && h->plt.refcount > 0)
15216 {
15217 /* Make sure this symbol is output as a dynamic symbol.
15218 Undefined weak syms won't yet be marked as dynamic. */
15219 if (h->dynindx == -1
15220 && !h->forced_local)
15221 {
15222 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15223 return FALSE;
15224 }
15225
15226 /* If the call in the PLT entry binds locally, the associated
15227 GOT entry should use an R_ARM_IRELATIVE relocation instead of
15228 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
15229 than the .plt section. */
15230 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
15231 {
15232 eh->is_iplt = 1;
15233 if (eh->plt.noncall_refcount == 0
15234 && SYMBOL_REFERENCES_LOCAL (info, h))
15235 /* All non-call references can be resolved directly.
15236 This means that they can (and in some cases, must)
15237 resolve directly to the run-time target, rather than
15238 to the PLT. That in turns means that any .got entry
15239 would be equal to the .igot.plt entry, so there's
15240 no point having both. */
15241 h->got.refcount = 0;
15242 }
15243
15244 if (bfd_link_pic (info)
15245 || eh->is_iplt
15246 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
15247 {
15248 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
15249
15250 /* If this symbol is not defined in a regular file, and we are
15251 not generating a shared library, then set the symbol to this
15252 location in the .plt. This is required to make function
15253 pointers compare as equal between the normal executable and
15254 the shared library. */
15255 if (! bfd_link_pic (info)
15256 && !h->def_regular)
15257 {
15258 h->root.u.def.section = htab->root.splt;
15259 h->root.u.def.value = h->plt.offset;
15260
15261 /* Make sure the function is not marked as Thumb, in case
15262 it is the target of an ABS32 relocation, which will
15263 point to the PLT entry. */
15264 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
15265 }
15266
15267 /* VxWorks executables have a second set of relocations for
15268 each PLT entry. They go in a separate relocation section,
15269 which is processed by the kernel loader. */
15270 if (htab->vxworks_p && !bfd_link_pic (info))
15271 {
15272 /* There is a relocation for the initial PLT entry:
15273 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
15274 if (h->plt.offset == htab->plt_header_size)
15275 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
15276
15277 /* There are two extra relocations for each subsequent
15278 PLT entry: an R_ARM_32 relocation for the GOT entry,
15279 and an R_ARM_32 relocation for the PLT entry. */
15280 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
15281 }
15282 }
15283 else
15284 {
15285 h->plt.offset = (bfd_vma) -1;
15286 h->needs_plt = 0;
15287 }
15288 }
15289 else
15290 {
15291 h->plt.offset = (bfd_vma) -1;
15292 h->needs_plt = 0;
15293 }
15294
15295 eh = (struct elf32_arm_link_hash_entry *) h;
15296 eh->tlsdesc_got = (bfd_vma) -1;
15297
15298 if (h->got.refcount > 0)
15299 {
15300 asection *s;
15301 bfd_boolean dyn;
15302 int tls_type = elf32_arm_hash_entry (h)->tls_type;
15303 int indx;
15304
15305 /* Make sure this symbol is output as a dynamic symbol.
15306 Undefined weak syms won't yet be marked as dynamic. */
15307 if (h->dynindx == -1
15308 && !h->forced_local)
15309 {
15310 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15311 return FALSE;
15312 }
15313
15314 if (!htab->symbian_p)
15315 {
15316 s = htab->root.sgot;
15317 h->got.offset = s->size;
15318
15319 if (tls_type == GOT_UNKNOWN)
15320 abort ();
15321
15322 if (tls_type == GOT_NORMAL)
15323 /* Non-TLS symbols need one GOT slot. */
15324 s->size += 4;
15325 else
15326 {
15327 if (tls_type & GOT_TLS_GDESC)
15328 {
15329 /* R_ARM_TLS_DESC needs 2 GOT slots. */
15330 eh->tlsdesc_got
15331 = (htab->root.sgotplt->size
15332 - elf32_arm_compute_jump_table_size (htab));
15333 htab->root.sgotplt->size += 8;
15334 h->got.offset = (bfd_vma) -2;
15335 /* plt.got_offset needs to know there's a TLS_DESC
15336 reloc in the middle of .got.plt. */
15337 htab->num_tls_desc++;
15338 }
15339
15340 if (tls_type & GOT_TLS_GD)
15341 {
15342 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
15343 the symbol is both GD and GDESC, got.offset may
15344 have been overwritten. */
15345 h->got.offset = s->size;
15346 s->size += 8;
15347 }
15348
15349 if (tls_type & GOT_TLS_IE)
15350 /* R_ARM_TLS_IE32 needs one GOT slot. */
15351 s->size += 4;
15352 }
15353
15354 dyn = htab->root.dynamic_sections_created;
15355
15356 indx = 0;
15357 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
15358 bfd_link_pic (info),
15359 h)
15360 && (!bfd_link_pic (info)
15361 || !SYMBOL_REFERENCES_LOCAL (info, h)))
15362 indx = h->dynindx;
15363
15364 if (tls_type != GOT_NORMAL
15365 && (bfd_link_pic (info) || indx != 0)
15366 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
15367 || h->root.type != bfd_link_hash_undefweak))
15368 {
15369 if (tls_type & GOT_TLS_IE)
15370 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15371
15372 if (tls_type & GOT_TLS_GD)
15373 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15374
15375 if (tls_type & GOT_TLS_GDESC)
15376 {
15377 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
15378 /* GDESC needs a trampoline to jump to. */
15379 htab->tls_trampoline = -1;
15380 }
15381
15382 /* Only GD needs it. GDESC just emits one relocation per
15383 2 entries. */
15384 if ((tls_type & GOT_TLS_GD) && indx != 0)
15385 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15386 }
15387 else if (indx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
15388 {
15389 if (htab->root.dynamic_sections_created)
15390 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
15391 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15392 }
15393 else if (h->type == STT_GNU_IFUNC
15394 && eh->plt.noncall_refcount == 0)
15395 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
15396 they all resolve dynamically instead. Reserve room for the
15397 GOT entry's R_ARM_IRELATIVE relocation. */
15398 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
15399 else if (bfd_link_pic (info)
15400 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
15401 || h->root.type != bfd_link_hash_undefweak))
15402 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
15403 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15404 }
15405 }
15406 else
15407 h->got.offset = (bfd_vma) -1;
15408
15409 /* Allocate stubs for exported Thumb functions on v4t. */
15410 if (!htab->use_blx && h->dynindx != -1
15411 && h->def_regular
15412 && ARM_GET_SYM_BRANCH_TYPE (h->target_internal) == ST_BRANCH_TO_THUMB
15413 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
15414 {
15415 struct elf_link_hash_entry * th;
15416 struct bfd_link_hash_entry * bh;
15417 struct elf_link_hash_entry * myh;
15418 char name[1024];
15419 asection *s;
15420 bh = NULL;
15421 /* Create a new symbol to regist the real location of the function. */
15422 s = h->root.u.def.section;
15423 sprintf (name, "__real_%s", h->root.root.string);
15424 _bfd_generic_link_add_one_symbol (info, s->owner,
15425 name, BSF_GLOBAL, s,
15426 h->root.u.def.value,
15427 NULL, TRUE, FALSE, &bh);
15428
15429 myh = (struct elf_link_hash_entry *) bh;
15430 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
15431 myh->forced_local = 1;
15432 ARM_SET_SYM_BRANCH_TYPE (myh->target_internal, ST_BRANCH_TO_THUMB);
15433 eh->export_glue = myh;
15434 th = record_arm_to_thumb_glue (info, h);
15435 /* Point the symbol at the stub. */
15436 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
15437 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
15438 h->root.u.def.section = th->root.u.def.section;
15439 h->root.u.def.value = th->root.u.def.value & ~1;
15440 }
15441
15442 if (eh->dyn_relocs == NULL)
15443 return TRUE;
15444
15445 /* In the shared -Bsymbolic case, discard space allocated for
15446 dynamic pc-relative relocs against symbols which turn out to be
15447 defined in regular objects. For the normal shared case, discard
15448 space for pc-relative relocs that have become local due to symbol
15449 visibility changes. */
15450
15451 if (bfd_link_pic (info) || htab->root.is_relocatable_executable)
15452 {
15453 /* Relocs that use pc_count are PC-relative forms, which will appear
15454 on something like ".long foo - ." or "movw REG, foo - .". We want
15455 calls to protected symbols to resolve directly to the function
15456 rather than going via the plt. If people want function pointer
15457 comparisons to work as expected then they should avoid writing
15458 assembly like ".long foo - .". */
15459 if (SYMBOL_CALLS_LOCAL (info, h))
15460 {
15461 struct elf_dyn_relocs **pp;
15462
15463 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
15464 {
15465 p->count -= p->pc_count;
15466 p->pc_count = 0;
15467 if (p->count == 0)
15468 *pp = p->next;
15469 else
15470 pp = &p->next;
15471 }
15472 }
15473
15474 if (htab->vxworks_p)
15475 {
15476 struct elf_dyn_relocs **pp;
15477
15478 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
15479 {
15480 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
15481 *pp = p->next;
15482 else
15483 pp = &p->next;
15484 }
15485 }
15486
15487 /* Also discard relocs on undefined weak syms with non-default
15488 visibility. */
15489 if (eh->dyn_relocs != NULL
15490 && h->root.type == bfd_link_hash_undefweak)
15491 {
15492 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
15493 eh->dyn_relocs = NULL;
15494
15495 /* Make sure undefined weak symbols are output as a dynamic
15496 symbol in PIEs. */
15497 else if (h->dynindx == -1
15498 && !h->forced_local)
15499 {
15500 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15501 return FALSE;
15502 }
15503 }
15504
15505 else if (htab->root.is_relocatable_executable && h->dynindx == -1
15506 && h->root.type == bfd_link_hash_new)
15507 {
15508 /* Output absolute symbols so that we can create relocations
15509 against them. For normal symbols we output a relocation
15510 against the section that contains them. */
15511 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15512 return FALSE;
15513 }
15514
15515 }
15516 else
15517 {
15518 /* For the non-shared case, discard space for relocs against
15519 symbols which turn out to need copy relocs or are not
15520 dynamic. */
15521
15522 if (!h->non_got_ref
15523 && ((h->def_dynamic
15524 && !h->def_regular)
15525 || (htab->root.dynamic_sections_created
15526 && (h->root.type == bfd_link_hash_undefweak
15527 || h->root.type == bfd_link_hash_undefined))))
15528 {
15529 /* Make sure this symbol is output as a dynamic symbol.
15530 Undefined weak syms won't yet be marked as dynamic. */
15531 if (h->dynindx == -1
15532 && !h->forced_local)
15533 {
15534 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15535 return FALSE;
15536 }
15537
15538 /* If that succeeded, we know we'll be keeping all the
15539 relocs. */
15540 if (h->dynindx != -1)
15541 goto keep;
15542 }
15543
15544 eh->dyn_relocs = NULL;
15545
15546 keep: ;
15547 }
15548
15549 /* Finally, allocate space. */
15550 for (p = eh->dyn_relocs; p != NULL; p = p->next)
15551 {
15552 asection *sreloc = elf_section_data (p->sec)->sreloc;
15553 if (h->type == STT_GNU_IFUNC
15554 && eh->plt.noncall_refcount == 0
15555 && SYMBOL_REFERENCES_LOCAL (info, h))
15556 elf32_arm_allocate_irelocs (info, sreloc, p->count);
15557 else
15558 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
15559 }
15560
15561 return TRUE;
15562 }
15563
15564 /* Find any dynamic relocs that apply to read-only sections. */
15565
15566 static bfd_boolean
15567 elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
15568 {
15569 struct elf32_arm_link_hash_entry * eh;
15570 struct elf_dyn_relocs * p;
15571
15572 eh = (struct elf32_arm_link_hash_entry *) h;
15573 for (p = eh->dyn_relocs; p != NULL; p = p->next)
15574 {
15575 asection *s = p->sec;
15576
15577 if (s != NULL && (s->flags & SEC_READONLY) != 0)
15578 {
15579 struct bfd_link_info *info = (struct bfd_link_info *) inf;
15580
15581 info->flags |= DF_TEXTREL;
15582
15583 /* Not an error, just cut short the traversal. */
15584 return FALSE;
15585 }
15586 }
15587 return TRUE;
15588 }
15589
15590 void
15591 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
15592 int byteswap_code)
15593 {
15594 struct elf32_arm_link_hash_table *globals;
15595
15596 globals = elf32_arm_hash_table (info);
15597 if (globals == NULL)
15598 return;
15599
15600 globals->byteswap_code = byteswap_code;
15601 }
15602
15603 /* Set the sizes of the dynamic sections. */
15604
15605 static bfd_boolean
15606 elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
15607 struct bfd_link_info * info)
15608 {
15609 bfd * dynobj;
15610 asection * s;
15611 bfd_boolean plt;
15612 bfd_boolean relocs;
15613 bfd *ibfd;
15614 struct elf32_arm_link_hash_table *htab;
15615
15616 htab = elf32_arm_hash_table (info);
15617 if (htab == NULL)
15618 return FALSE;
15619
15620 dynobj = elf_hash_table (info)->dynobj;
15621 BFD_ASSERT (dynobj != NULL);
15622 check_use_blx (htab);
15623
15624 if (elf_hash_table (info)->dynamic_sections_created)
15625 {
15626 /* Set the contents of the .interp section to the interpreter. */
15627 if (bfd_link_executable (info) && !info->nointerp)
15628 {
15629 s = bfd_get_linker_section (dynobj, ".interp");
15630 BFD_ASSERT (s != NULL);
15631 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
15632 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
15633 }
15634 }
15635
15636 /* Set up .got offsets for local syms, and space for local dynamic
15637 relocs. */
15638 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
15639 {
15640 bfd_signed_vma *local_got;
15641 bfd_signed_vma *end_local_got;
15642 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
15643 char *local_tls_type;
15644 bfd_vma *local_tlsdesc_gotent;
15645 bfd_size_type locsymcount;
15646 Elf_Internal_Shdr *symtab_hdr;
15647 asection *srel;
15648 bfd_boolean is_vxworks = htab->vxworks_p;
15649 unsigned int symndx;
15650
15651 if (! is_arm_elf (ibfd))
15652 continue;
15653
15654 for (s = ibfd->sections; s != NULL; s = s->next)
15655 {
15656 struct elf_dyn_relocs *p;
15657
15658 for (p = (struct elf_dyn_relocs *)
15659 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
15660 {
15661 if (!bfd_is_abs_section (p->sec)
15662 && bfd_is_abs_section (p->sec->output_section))
15663 {
15664 /* Input section has been discarded, either because
15665 it is a copy of a linkonce section or due to
15666 linker script /DISCARD/, so we'll be discarding
15667 the relocs too. */
15668 }
15669 else if (is_vxworks
15670 && strcmp (p->sec->output_section->name,
15671 ".tls_vars") == 0)
15672 {
15673 /* Relocations in vxworks .tls_vars sections are
15674 handled specially by the loader. */
15675 }
15676 else if (p->count != 0)
15677 {
15678 srel = elf_section_data (p->sec)->sreloc;
15679 elf32_arm_allocate_dynrelocs (info, srel, p->count);
15680 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
15681 info->flags |= DF_TEXTREL;
15682 }
15683 }
15684 }
15685
15686 local_got = elf_local_got_refcounts (ibfd);
15687 if (!local_got)
15688 continue;
15689
15690 symtab_hdr = & elf_symtab_hdr (ibfd);
15691 locsymcount = symtab_hdr->sh_info;
15692 end_local_got = local_got + locsymcount;
15693 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
15694 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
15695 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
15696 symndx = 0;
15697 s = htab->root.sgot;
15698 srel = htab->root.srelgot;
15699 for (; local_got < end_local_got;
15700 ++local_got, ++local_iplt_ptr, ++local_tls_type,
15701 ++local_tlsdesc_gotent, ++symndx)
15702 {
15703 *local_tlsdesc_gotent = (bfd_vma) -1;
15704 local_iplt = *local_iplt_ptr;
15705 if (local_iplt != NULL)
15706 {
15707 struct elf_dyn_relocs *p;
15708
15709 if (local_iplt->root.refcount > 0)
15710 {
15711 elf32_arm_allocate_plt_entry (info, TRUE,
15712 &local_iplt->root,
15713 &local_iplt->arm);
15714 if (local_iplt->arm.noncall_refcount == 0)
15715 /* All references to the PLT are calls, so all
15716 non-call references can resolve directly to the
15717 run-time target. This means that the .got entry
15718 would be the same as the .igot.plt entry, so there's
15719 no point creating both. */
15720 *local_got = 0;
15721 }
15722 else
15723 {
15724 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
15725 local_iplt->root.offset = (bfd_vma) -1;
15726 }
15727
15728 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
15729 {
15730 asection *psrel;
15731
15732 psrel = elf_section_data (p->sec)->sreloc;
15733 if (local_iplt->arm.noncall_refcount == 0)
15734 elf32_arm_allocate_irelocs (info, psrel, p->count);
15735 else
15736 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
15737 }
15738 }
15739 if (*local_got > 0)
15740 {
15741 Elf_Internal_Sym *isym;
15742
15743 *local_got = s->size;
15744 if (*local_tls_type & GOT_TLS_GD)
15745 /* TLS_GD relocs need an 8-byte structure in the GOT. */
15746 s->size += 8;
15747 if (*local_tls_type & GOT_TLS_GDESC)
15748 {
15749 *local_tlsdesc_gotent = htab->root.sgotplt->size
15750 - elf32_arm_compute_jump_table_size (htab);
15751 htab->root.sgotplt->size += 8;
15752 *local_got = (bfd_vma) -2;
15753 /* plt.got_offset needs to know there's a TLS_DESC
15754 reloc in the middle of .got.plt. */
15755 htab->num_tls_desc++;
15756 }
15757 if (*local_tls_type & GOT_TLS_IE)
15758 s->size += 4;
15759
15760 if (*local_tls_type & GOT_NORMAL)
15761 {
15762 /* If the symbol is both GD and GDESC, *local_got
15763 may have been overwritten. */
15764 *local_got = s->size;
15765 s->size += 4;
15766 }
15767
15768 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
15769 if (isym == NULL)
15770 return FALSE;
15771
15772 /* If all references to an STT_GNU_IFUNC PLT are calls,
15773 then all non-call references, including this GOT entry,
15774 resolve directly to the run-time target. */
15775 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
15776 && (local_iplt == NULL
15777 || local_iplt->arm.noncall_refcount == 0))
15778 elf32_arm_allocate_irelocs (info, srel, 1);
15779 else if (bfd_link_pic (info) || output_bfd->flags & DYNAMIC)
15780 {
15781 if ((bfd_link_pic (info) && !(*local_tls_type & GOT_TLS_GDESC))
15782 || *local_tls_type & GOT_TLS_GD)
15783 elf32_arm_allocate_dynrelocs (info, srel, 1);
15784
15785 if (bfd_link_pic (info) && *local_tls_type & GOT_TLS_GDESC)
15786 {
15787 elf32_arm_allocate_dynrelocs (info,
15788 htab->root.srelplt, 1);
15789 htab->tls_trampoline = -1;
15790 }
15791 }
15792 }
15793 else
15794 *local_got = (bfd_vma) -1;
15795 }
15796 }
15797
15798 if (htab->tls_ldm_got.refcount > 0)
15799 {
15800 /* Allocate two GOT entries and one dynamic relocation (if necessary)
15801 for R_ARM_TLS_LDM32 relocations. */
15802 htab->tls_ldm_got.offset = htab->root.sgot->size;
15803 htab->root.sgot->size += 8;
15804 if (bfd_link_pic (info))
15805 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15806 }
15807 else
15808 htab->tls_ldm_got.offset = -1;
15809
15810 /* Allocate global sym .plt and .got entries, and space for global
15811 sym dynamic relocs. */
15812 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
15813
15814 /* Here we rummage through the found bfds to collect glue information. */
15815 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
15816 {
15817 if (! is_arm_elf (ibfd))
15818 continue;
15819
15820 /* Initialise mapping tables for code/data. */
15821 bfd_elf32_arm_init_maps (ibfd);
15822
15823 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
15824 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info)
15825 || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd, info))
15826 /* xgettext:c-format */
15827 _bfd_error_handler (_("Errors encountered processing file %s"),
15828 ibfd->filename);
15829 }
15830
15831 /* Allocate space for the glue sections now that we've sized them. */
15832 bfd_elf32_arm_allocate_interworking_sections (info);
15833
15834 /* For every jump slot reserved in the sgotplt, reloc_count is
15835 incremented. However, when we reserve space for TLS descriptors,
15836 it's not incremented, so in order to compute the space reserved
15837 for them, it suffices to multiply the reloc count by the jump
15838 slot size. */
15839 if (htab->root.srelplt)
15840 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
15841
15842 if (htab->tls_trampoline)
15843 {
15844 if (htab->root.splt->size == 0)
15845 htab->root.splt->size += htab->plt_header_size;
15846
15847 htab->tls_trampoline = htab->root.splt->size;
15848 htab->root.splt->size += htab->plt_entry_size;
15849
15850 /* If we're not using lazy TLS relocations, don't generate the
15851 PLT and GOT entries they require. */
15852 if (!(info->flags & DF_BIND_NOW))
15853 {
15854 htab->dt_tlsdesc_got = htab->root.sgot->size;
15855 htab->root.sgot->size += 4;
15856
15857 htab->dt_tlsdesc_plt = htab->root.splt->size;
15858 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
15859 }
15860 }
15861
15862 /* The check_relocs and adjust_dynamic_symbol entry points have
15863 determined the sizes of the various dynamic sections. Allocate
15864 memory for them. */
15865 plt = FALSE;
15866 relocs = FALSE;
15867 for (s = dynobj->sections; s != NULL; s = s->next)
15868 {
15869 const char * name;
15870
15871 if ((s->flags & SEC_LINKER_CREATED) == 0)
15872 continue;
15873
15874 /* It's OK to base decisions on the section name, because none
15875 of the dynobj section names depend upon the input files. */
15876 name = bfd_get_section_name (dynobj, s);
15877
15878 if (s == htab->root.splt)
15879 {
15880 /* Remember whether there is a PLT. */
15881 plt = s->size != 0;
15882 }
15883 else if (CONST_STRNEQ (name, ".rel"))
15884 {
15885 if (s->size != 0)
15886 {
15887 /* Remember whether there are any reloc sections other
15888 than .rel(a).plt and .rela.plt.unloaded. */
15889 if (s != htab->root.srelplt && s != htab->srelplt2)
15890 relocs = TRUE;
15891
15892 /* We use the reloc_count field as a counter if we need
15893 to copy relocs into the output file. */
15894 s->reloc_count = 0;
15895 }
15896 }
15897 else if (s != htab->root.sgot
15898 && s != htab->root.sgotplt
15899 && s != htab->root.iplt
15900 && s != htab->root.igotplt
15901 && s != htab->sdynbss)
15902 {
15903 /* It's not one of our sections, so don't allocate space. */
15904 continue;
15905 }
15906
15907 if (s->size == 0)
15908 {
15909 /* If we don't need this section, strip it from the
15910 output file. This is mostly to handle .rel(a).bss and
15911 .rel(a).plt. We must create both sections in
15912 create_dynamic_sections, because they must be created
15913 before the linker maps input sections to output
15914 sections. The linker does that before
15915 adjust_dynamic_symbol is called, and it is that
15916 function which decides whether anything needs to go
15917 into these sections. */
15918 s->flags |= SEC_EXCLUDE;
15919 continue;
15920 }
15921
15922 if ((s->flags & SEC_HAS_CONTENTS) == 0)
15923 continue;
15924
15925 /* Allocate memory for the section contents. */
15926 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
15927 if (s->contents == NULL)
15928 return FALSE;
15929 }
15930
15931 if (elf_hash_table (info)->dynamic_sections_created)
15932 {
15933 /* Add some entries to the .dynamic section. We fill in the
15934 values later, in elf32_arm_finish_dynamic_sections, but we
15935 must add the entries now so that we get the correct size for
15936 the .dynamic section. The DT_DEBUG entry is filled in by the
15937 dynamic linker and used by the debugger. */
15938 #define add_dynamic_entry(TAG, VAL) \
15939 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
15940
15941 if (bfd_link_executable (info))
15942 {
15943 if (!add_dynamic_entry (DT_DEBUG, 0))
15944 return FALSE;
15945 }
15946
15947 if (plt)
15948 {
15949 if ( !add_dynamic_entry (DT_PLTGOT, 0)
15950 || !add_dynamic_entry (DT_PLTRELSZ, 0)
15951 || !add_dynamic_entry (DT_PLTREL,
15952 htab->use_rel ? DT_REL : DT_RELA)
15953 || !add_dynamic_entry (DT_JMPREL, 0))
15954 return FALSE;
15955
15956 if (htab->dt_tlsdesc_plt &&
15957 (!add_dynamic_entry (DT_TLSDESC_PLT,0)
15958 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
15959 return FALSE;
15960 }
15961
15962 if (relocs)
15963 {
15964 if (htab->use_rel)
15965 {
15966 if (!add_dynamic_entry (DT_REL, 0)
15967 || !add_dynamic_entry (DT_RELSZ, 0)
15968 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
15969 return FALSE;
15970 }
15971 else
15972 {
15973 if (!add_dynamic_entry (DT_RELA, 0)
15974 || !add_dynamic_entry (DT_RELASZ, 0)
15975 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
15976 return FALSE;
15977 }
15978 }
15979
15980 /* If any dynamic relocs apply to a read-only section,
15981 then we need a DT_TEXTREL entry. */
15982 if ((info->flags & DF_TEXTREL) == 0)
15983 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
15984 info);
15985
15986 if ((info->flags & DF_TEXTREL) != 0)
15987 {
15988 if (!add_dynamic_entry (DT_TEXTREL, 0))
15989 return FALSE;
15990 }
15991 if (htab->vxworks_p
15992 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
15993 return FALSE;
15994 }
15995 #undef add_dynamic_entry
15996
15997 return TRUE;
15998 }
15999
16000 /* Size sections even though they're not dynamic. We use it to setup
16001 _TLS_MODULE_BASE_, if needed. */
16002
16003 static bfd_boolean
16004 elf32_arm_always_size_sections (bfd *output_bfd,
16005 struct bfd_link_info *info)
16006 {
16007 asection *tls_sec;
16008
16009 if (bfd_link_relocatable (info))
16010 return TRUE;
16011
16012 tls_sec = elf_hash_table (info)->tls_sec;
16013
16014 if (tls_sec)
16015 {
16016 struct elf_link_hash_entry *tlsbase;
16017
16018 tlsbase = elf_link_hash_lookup
16019 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
16020
16021 if (tlsbase)
16022 {
16023 struct bfd_link_hash_entry *bh = NULL;
16024 const struct elf_backend_data *bed
16025 = get_elf_backend_data (output_bfd);
16026
16027 if (!(_bfd_generic_link_add_one_symbol
16028 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
16029 tls_sec, 0, NULL, FALSE,
16030 bed->collect, &bh)))
16031 return FALSE;
16032
16033 tlsbase->type = STT_TLS;
16034 tlsbase = (struct elf_link_hash_entry *)bh;
16035 tlsbase->def_regular = 1;
16036 tlsbase->other = STV_HIDDEN;
16037 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
16038 }
16039 }
16040 return TRUE;
16041 }
16042
16043 /* Finish up dynamic symbol handling. We set the contents of various
16044 dynamic sections here. */
16045
16046 static bfd_boolean
16047 elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
16048 struct bfd_link_info * info,
16049 struct elf_link_hash_entry * h,
16050 Elf_Internal_Sym * sym)
16051 {
16052 struct elf32_arm_link_hash_table *htab;
16053 struct elf32_arm_link_hash_entry *eh;
16054
16055 htab = elf32_arm_hash_table (info);
16056 if (htab == NULL)
16057 return FALSE;
16058
16059 eh = (struct elf32_arm_link_hash_entry *) h;
16060
16061 if (h->plt.offset != (bfd_vma) -1)
16062 {
16063 if (!eh->is_iplt)
16064 {
16065 BFD_ASSERT (h->dynindx != -1);
16066 if (! elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
16067 h->dynindx, 0))
16068 return FALSE;
16069 }
16070
16071 if (!h->def_regular)
16072 {
16073 /* Mark the symbol as undefined, rather than as defined in
16074 the .plt section. */
16075 sym->st_shndx = SHN_UNDEF;
16076 /* If the symbol is weak we need to clear the value.
16077 Otherwise, the PLT entry would provide a definition for
16078 the symbol even if the symbol wasn't defined anywhere,
16079 and so the symbol would never be NULL. Leave the value if
16080 there were any relocations where pointer equality matters
16081 (this is a clue for the dynamic linker, to make function
16082 pointer comparisons work between an application and shared
16083 library). */
16084 if (!h->ref_regular_nonweak || !h->pointer_equality_needed)
16085 sym->st_value = 0;
16086 }
16087 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
16088 {
16089 /* At least one non-call relocation references this .iplt entry,
16090 so the .iplt entry is the function's canonical address. */
16091 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
16092 ARM_SET_SYM_BRANCH_TYPE (sym->st_target_internal, ST_BRANCH_TO_ARM);
16093 sym->st_shndx = (_bfd_elf_section_from_bfd_section
16094 (output_bfd, htab->root.iplt->output_section));
16095 sym->st_value = (h->plt.offset
16096 + htab->root.iplt->output_section->vma
16097 + htab->root.iplt->output_offset);
16098 }
16099 }
16100
16101 if (h->needs_copy)
16102 {
16103 asection * s;
16104 Elf_Internal_Rela rel;
16105
16106 /* This symbol needs a copy reloc. Set it up. */
16107 BFD_ASSERT (h->dynindx != -1
16108 && (h->root.type == bfd_link_hash_defined
16109 || h->root.type == bfd_link_hash_defweak));
16110
16111 s = htab->srelbss;
16112 BFD_ASSERT (s != NULL);
16113
16114 rel.r_addend = 0;
16115 rel.r_offset = (h->root.u.def.value
16116 + h->root.u.def.section->output_section->vma
16117 + h->root.u.def.section->output_offset);
16118 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
16119 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
16120 }
16121
16122 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
16123 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
16124 to the ".got" section. */
16125 if (h == htab->root.hdynamic
16126 || (!htab->vxworks_p && h == htab->root.hgot))
16127 sym->st_shndx = SHN_ABS;
16128
16129 return TRUE;
16130 }
16131
16132 static void
16133 arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
16134 void *contents,
16135 const unsigned long *template, unsigned count)
16136 {
16137 unsigned ix;
16138
16139 for (ix = 0; ix != count; ix++)
16140 {
16141 unsigned long insn = template[ix];
16142
16143 /* Emit mov pc,rx if bx is not permitted. */
16144 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
16145 insn = (insn & 0xf000000f) | 0x01a0f000;
16146 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
16147 }
16148 }
16149
16150 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
16151 other variants, NaCl needs this entry in a static executable's
16152 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
16153 zero. For .iplt really only the last bundle is useful, and .iplt
16154 could have a shorter first entry, with each individual PLT entry's
16155 relative branch calculated differently so it targets the last
16156 bundle instead of the instruction before it (labelled .Lplt_tail
16157 above). But it's simpler to keep the size and layout of PLT0
16158 consistent with the dynamic case, at the cost of some dead code at
16159 the start of .iplt and the one dead store to the stack at the start
16160 of .Lplt_tail. */
16161 static void
16162 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
16163 asection *plt, bfd_vma got_displacement)
16164 {
16165 unsigned int i;
16166
16167 put_arm_insn (htab, output_bfd,
16168 elf32_arm_nacl_plt0_entry[0]
16169 | arm_movw_immediate (got_displacement),
16170 plt->contents + 0);
16171 put_arm_insn (htab, output_bfd,
16172 elf32_arm_nacl_plt0_entry[1]
16173 | arm_movt_immediate (got_displacement),
16174 plt->contents + 4);
16175
16176 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
16177 put_arm_insn (htab, output_bfd,
16178 elf32_arm_nacl_plt0_entry[i],
16179 plt->contents + (i * 4));
16180 }
16181
16182 /* Finish up the dynamic sections. */
16183
16184 static bfd_boolean
16185 elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
16186 {
16187 bfd * dynobj;
16188 asection * sgot;
16189 asection * sdyn;
16190 struct elf32_arm_link_hash_table *htab;
16191
16192 htab = elf32_arm_hash_table (info);
16193 if (htab == NULL)
16194 return FALSE;
16195
16196 dynobj = elf_hash_table (info)->dynobj;
16197
16198 sgot = htab->root.sgotplt;
16199 /* A broken linker script might have discarded the dynamic sections.
16200 Catch this here so that we do not seg-fault later on. */
16201 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
16202 return FALSE;
16203 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
16204
16205 if (elf_hash_table (info)->dynamic_sections_created)
16206 {
16207 asection *splt;
16208 Elf32_External_Dyn *dyncon, *dynconend;
16209
16210 splt = htab->root.splt;
16211 BFD_ASSERT (splt != NULL && sdyn != NULL);
16212 BFD_ASSERT (htab->symbian_p || sgot != NULL);
16213
16214 dyncon = (Elf32_External_Dyn *) sdyn->contents;
16215 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
16216
16217 for (; dyncon < dynconend; dyncon++)
16218 {
16219 Elf_Internal_Dyn dyn;
16220 const char * name;
16221 asection * s;
16222
16223 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
16224
16225 switch (dyn.d_tag)
16226 {
16227 unsigned int type;
16228
16229 default:
16230 if (htab->vxworks_p
16231 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
16232 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16233 break;
16234
16235 case DT_HASH:
16236 name = ".hash";
16237 goto get_vma_if_bpabi;
16238 case DT_STRTAB:
16239 name = ".dynstr";
16240 goto get_vma_if_bpabi;
16241 case DT_SYMTAB:
16242 name = ".dynsym";
16243 goto get_vma_if_bpabi;
16244 case DT_VERSYM:
16245 name = ".gnu.version";
16246 goto get_vma_if_bpabi;
16247 case DT_VERDEF:
16248 name = ".gnu.version_d";
16249 goto get_vma_if_bpabi;
16250 case DT_VERNEED:
16251 name = ".gnu.version_r";
16252 goto get_vma_if_bpabi;
16253
16254 case DT_PLTGOT:
16255 name = htab->symbian_p ? ".got" : ".got.plt";
16256 goto get_vma;
16257 case DT_JMPREL:
16258 name = RELOC_SECTION (htab, ".plt");
16259 get_vma:
16260 s = bfd_get_linker_section (dynobj, name);
16261 if (s == NULL)
16262 {
16263 (*_bfd_error_handler)
16264 (_("could not find section %s"), name);
16265 bfd_set_error (bfd_error_invalid_operation);
16266 return FALSE;
16267 }
16268 if (!htab->symbian_p)
16269 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
16270 else
16271 /* In the BPABI, tags in the PT_DYNAMIC section point
16272 at the file offset, not the memory address, for the
16273 convenience of the post linker. */
16274 dyn.d_un.d_ptr = s->output_section->filepos + s->output_offset;
16275 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16276 break;
16277
16278 get_vma_if_bpabi:
16279 if (htab->symbian_p)
16280 goto get_vma;
16281 break;
16282
16283 case DT_PLTRELSZ:
16284 s = htab->root.srelplt;
16285 BFD_ASSERT (s != NULL);
16286 dyn.d_un.d_val = s->size;
16287 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16288 break;
16289
16290 case DT_RELSZ:
16291 case DT_RELASZ:
16292 if (!htab->symbian_p)
16293 {
16294 /* My reading of the SVR4 ABI indicates that the
16295 procedure linkage table relocs (DT_JMPREL) should be
16296 included in the overall relocs (DT_REL). This is
16297 what Solaris does. However, UnixWare can not handle
16298 that case. Therefore, we override the DT_RELSZ entry
16299 here to make it not include the JMPREL relocs. Since
16300 the linker script arranges for .rel(a).plt to follow all
16301 other relocation sections, we don't have to worry
16302 about changing the DT_REL entry. */
16303 s = htab->root.srelplt;
16304 if (s != NULL)
16305 dyn.d_un.d_val -= s->size;
16306 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16307 break;
16308 }
16309 /* Fall through. */
16310
16311 case DT_REL:
16312 case DT_RELA:
16313 /* In the BPABI, the DT_REL tag must point at the file
16314 offset, not the VMA, of the first relocation
16315 section. So, we use code similar to that in
16316 elflink.c, but do not check for SHF_ALLOC on the
16317 relcoation section, since relocations sections are
16318 never allocated under the BPABI. The comments above
16319 about Unixware notwithstanding, we include all of the
16320 relocations here. */
16321 if (htab->symbian_p)
16322 {
16323 unsigned int i;
16324 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
16325 ? SHT_REL : SHT_RELA);
16326 dyn.d_un.d_val = 0;
16327 for (i = 1; i < elf_numsections (output_bfd); i++)
16328 {
16329 Elf_Internal_Shdr *hdr
16330 = elf_elfsections (output_bfd)[i];
16331 if (hdr->sh_type == type)
16332 {
16333 if (dyn.d_tag == DT_RELSZ
16334 || dyn.d_tag == DT_RELASZ)
16335 dyn.d_un.d_val += hdr->sh_size;
16336 else if ((ufile_ptr) hdr->sh_offset
16337 <= dyn.d_un.d_val - 1)
16338 dyn.d_un.d_val = hdr->sh_offset;
16339 }
16340 }
16341 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16342 }
16343 break;
16344
16345 case DT_TLSDESC_PLT:
16346 s = htab->root.splt;
16347 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
16348 + htab->dt_tlsdesc_plt);
16349 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16350 break;
16351
16352 case DT_TLSDESC_GOT:
16353 s = htab->root.sgot;
16354 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
16355 + htab->dt_tlsdesc_got);
16356 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16357 break;
16358
16359 /* Set the bottom bit of DT_INIT/FINI if the
16360 corresponding function is Thumb. */
16361 case DT_INIT:
16362 name = info->init_function;
16363 goto get_sym;
16364 case DT_FINI:
16365 name = info->fini_function;
16366 get_sym:
16367 /* If it wasn't set by elf_bfd_final_link
16368 then there is nothing to adjust. */
16369 if (dyn.d_un.d_val != 0)
16370 {
16371 struct elf_link_hash_entry * eh;
16372
16373 eh = elf_link_hash_lookup (elf_hash_table (info), name,
16374 FALSE, FALSE, TRUE);
16375 if (eh != NULL
16376 && ARM_GET_SYM_BRANCH_TYPE (eh->target_internal)
16377 == ST_BRANCH_TO_THUMB)
16378 {
16379 dyn.d_un.d_val |= 1;
16380 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16381 }
16382 }
16383 break;
16384 }
16385 }
16386
16387 /* Fill in the first entry in the procedure linkage table. */
16388 if (splt->size > 0 && htab->plt_header_size)
16389 {
16390 const bfd_vma *plt0_entry;
16391 bfd_vma got_address, plt_address, got_displacement;
16392
16393 /* Calculate the addresses of the GOT and PLT. */
16394 got_address = sgot->output_section->vma + sgot->output_offset;
16395 plt_address = splt->output_section->vma + splt->output_offset;
16396
16397 if (htab->vxworks_p)
16398 {
16399 /* The VxWorks GOT is relocated by the dynamic linker.
16400 Therefore, we must emit relocations rather than simply
16401 computing the values now. */
16402 Elf_Internal_Rela rel;
16403
16404 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
16405 put_arm_insn (htab, output_bfd, plt0_entry[0],
16406 splt->contents + 0);
16407 put_arm_insn (htab, output_bfd, plt0_entry[1],
16408 splt->contents + 4);
16409 put_arm_insn (htab, output_bfd, plt0_entry[2],
16410 splt->contents + 8);
16411 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
16412
16413 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
16414 rel.r_offset = plt_address + 12;
16415 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
16416 rel.r_addend = 0;
16417 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
16418 htab->srelplt2->contents);
16419 }
16420 else if (htab->nacl_p)
16421 arm_nacl_put_plt0 (htab, output_bfd, splt,
16422 got_address + 8 - (plt_address + 16));
16423 else if (using_thumb_only (htab))
16424 {
16425 got_displacement = got_address - (plt_address + 12);
16426
16427 plt0_entry = elf32_thumb2_plt0_entry;
16428 put_arm_insn (htab, output_bfd, plt0_entry[0],
16429 splt->contents + 0);
16430 put_arm_insn (htab, output_bfd, plt0_entry[1],
16431 splt->contents + 4);
16432 put_arm_insn (htab, output_bfd, plt0_entry[2],
16433 splt->contents + 8);
16434
16435 bfd_put_32 (output_bfd, got_displacement, splt->contents + 12);
16436 }
16437 else
16438 {
16439 got_displacement = got_address - (plt_address + 16);
16440
16441 plt0_entry = elf32_arm_plt0_entry;
16442 put_arm_insn (htab, output_bfd, plt0_entry[0],
16443 splt->contents + 0);
16444 put_arm_insn (htab, output_bfd, plt0_entry[1],
16445 splt->contents + 4);
16446 put_arm_insn (htab, output_bfd, plt0_entry[2],
16447 splt->contents + 8);
16448 put_arm_insn (htab, output_bfd, plt0_entry[3],
16449 splt->contents + 12);
16450
16451 #ifdef FOUR_WORD_PLT
16452 /* The displacement value goes in the otherwise-unused
16453 last word of the second entry. */
16454 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
16455 #else
16456 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
16457 #endif
16458 }
16459 }
16460
16461 /* UnixWare sets the entsize of .plt to 4, although that doesn't
16462 really seem like the right value. */
16463 if (splt->output_section->owner == output_bfd)
16464 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
16465
16466 if (htab->dt_tlsdesc_plt)
16467 {
16468 bfd_vma got_address
16469 = sgot->output_section->vma + sgot->output_offset;
16470 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
16471 + htab->root.sgot->output_offset);
16472 bfd_vma plt_address
16473 = splt->output_section->vma + splt->output_offset;
16474
16475 arm_put_trampoline (htab, output_bfd,
16476 splt->contents + htab->dt_tlsdesc_plt,
16477 dl_tlsdesc_lazy_trampoline, 6);
16478
16479 bfd_put_32 (output_bfd,
16480 gotplt_address + htab->dt_tlsdesc_got
16481 - (plt_address + htab->dt_tlsdesc_plt)
16482 - dl_tlsdesc_lazy_trampoline[6],
16483 splt->contents + htab->dt_tlsdesc_plt + 24);
16484 bfd_put_32 (output_bfd,
16485 got_address - (plt_address + htab->dt_tlsdesc_plt)
16486 - dl_tlsdesc_lazy_trampoline[7],
16487 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
16488 }
16489
16490 if (htab->tls_trampoline)
16491 {
16492 arm_put_trampoline (htab, output_bfd,
16493 splt->contents + htab->tls_trampoline,
16494 tls_trampoline, 3);
16495 #ifdef FOUR_WORD_PLT
16496 bfd_put_32 (output_bfd, 0x00000000,
16497 splt->contents + htab->tls_trampoline + 12);
16498 #endif
16499 }
16500
16501 if (htab->vxworks_p
16502 && !bfd_link_pic (info)
16503 && htab->root.splt->size > 0)
16504 {
16505 /* Correct the .rel(a).plt.unloaded relocations. They will have
16506 incorrect symbol indexes. */
16507 int num_plts;
16508 unsigned char *p;
16509
16510 num_plts = ((htab->root.splt->size - htab->plt_header_size)
16511 / htab->plt_entry_size);
16512 p = htab->srelplt2->contents + RELOC_SIZE (htab);
16513
16514 for (; num_plts; num_plts--)
16515 {
16516 Elf_Internal_Rela rel;
16517
16518 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
16519 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
16520 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
16521 p += RELOC_SIZE (htab);
16522
16523 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
16524 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
16525 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
16526 p += RELOC_SIZE (htab);
16527 }
16528 }
16529 }
16530
16531 if (htab->nacl_p && htab->root.iplt != NULL && htab->root.iplt->size > 0)
16532 /* NaCl uses a special first entry in .iplt too. */
16533 arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0);
16534
16535 /* Fill in the first three entries in the global offset table. */
16536 if (sgot)
16537 {
16538 if (sgot->size > 0)
16539 {
16540 if (sdyn == NULL)
16541 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
16542 else
16543 bfd_put_32 (output_bfd,
16544 sdyn->output_section->vma + sdyn->output_offset,
16545 sgot->contents);
16546 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
16547 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
16548 }
16549
16550 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
16551 }
16552
16553 return TRUE;
16554 }
16555
16556 static void
16557 elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
16558 {
16559 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
16560 struct elf32_arm_link_hash_table *globals;
16561 struct elf_segment_map *m;
16562
16563 i_ehdrp = elf_elfheader (abfd);
16564
16565 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
16566 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
16567 else
16568 _bfd_elf_post_process_headers (abfd, link_info);
16569 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
16570
16571 if (link_info)
16572 {
16573 globals = elf32_arm_hash_table (link_info);
16574 if (globals != NULL && globals->byteswap_code)
16575 i_ehdrp->e_flags |= EF_ARM_BE8;
16576 }
16577
16578 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
16579 && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
16580 {
16581 int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
16582 if (abi == AEABI_VFP_args_vfp)
16583 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
16584 else
16585 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
16586 }
16587
16588 /* Scan segment to set p_flags attribute if it contains only sections with
16589 SHF_ARM_PURECODE flag. */
16590 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
16591 {
16592 unsigned int j;
16593
16594 if (m->count == 0)
16595 continue;
16596 for (j = 0; j < m->count; j++)
16597 {
16598 if (!(elf_section_flags (m->sections[j]) & SHF_ARM_PURECODE))
16599 break;
16600 }
16601 if (j == m->count)
16602 {
16603 m->p_flags = PF_X;
16604 m->p_flags_valid = 1;
16605 }
16606 }
16607 }
16608
16609 static enum elf_reloc_type_class
16610 elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
16611 const asection *rel_sec ATTRIBUTE_UNUSED,
16612 const Elf_Internal_Rela *rela)
16613 {
16614 switch ((int) ELF32_R_TYPE (rela->r_info))
16615 {
16616 case R_ARM_RELATIVE:
16617 return reloc_class_relative;
16618 case R_ARM_JUMP_SLOT:
16619 return reloc_class_plt;
16620 case R_ARM_COPY:
16621 return reloc_class_copy;
16622 case R_ARM_IRELATIVE:
16623 return reloc_class_ifunc;
16624 default:
16625 return reloc_class_normal;
16626 }
16627 }
16628
16629 static void
16630 elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
16631 {
16632 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
16633 }
16634
16635 /* Return TRUE if this is an unwinding table entry. */
16636
16637 static bfd_boolean
16638 is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
16639 {
16640 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
16641 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
16642 }
16643
16644
16645 /* Set the type and flags for an ARM section. We do this by
16646 the section name, which is a hack, but ought to work. */
16647
16648 static bfd_boolean
16649 elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
16650 {
16651 const char * name;
16652
16653 name = bfd_get_section_name (abfd, sec);
16654
16655 if (is_arm_elf_unwind_section_name (abfd, name))
16656 {
16657 hdr->sh_type = SHT_ARM_EXIDX;
16658 hdr->sh_flags |= SHF_LINK_ORDER;
16659 }
16660
16661 if (sec->flags & SEC_ELF_PURECODE)
16662 hdr->sh_flags |= SHF_ARM_PURECODE;
16663
16664 return TRUE;
16665 }
16666
16667 /* Handle an ARM specific section when reading an object file. This is
16668 called when bfd_section_from_shdr finds a section with an unknown
16669 type. */
16670
16671 static bfd_boolean
16672 elf32_arm_section_from_shdr (bfd *abfd,
16673 Elf_Internal_Shdr * hdr,
16674 const char *name,
16675 int shindex)
16676 {
16677 /* There ought to be a place to keep ELF backend specific flags, but
16678 at the moment there isn't one. We just keep track of the
16679 sections by their name, instead. Fortunately, the ABI gives
16680 names for all the ARM specific sections, so we will probably get
16681 away with this. */
16682 switch (hdr->sh_type)
16683 {
16684 case SHT_ARM_EXIDX:
16685 case SHT_ARM_PREEMPTMAP:
16686 case SHT_ARM_ATTRIBUTES:
16687 break;
16688
16689 default:
16690 return FALSE;
16691 }
16692
16693 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
16694 return FALSE;
16695
16696 return TRUE;
16697 }
16698
16699 static _arm_elf_section_data *
16700 get_arm_elf_section_data (asection * sec)
16701 {
16702 if (sec && sec->owner && is_arm_elf (sec->owner))
16703 return elf32_arm_section_data (sec);
16704 else
16705 return NULL;
16706 }
16707
16708 typedef struct
16709 {
16710 void *flaginfo;
16711 struct bfd_link_info *info;
16712 asection *sec;
16713 int sec_shndx;
16714 int (*func) (void *, const char *, Elf_Internal_Sym *,
16715 asection *, struct elf_link_hash_entry *);
16716 } output_arch_syminfo;
16717
16718 enum map_symbol_type
16719 {
16720 ARM_MAP_ARM,
16721 ARM_MAP_THUMB,
16722 ARM_MAP_DATA
16723 };
16724
16725
16726 /* Output a single mapping symbol. */
16727
16728 static bfd_boolean
16729 elf32_arm_output_map_sym (output_arch_syminfo *osi,
16730 enum map_symbol_type type,
16731 bfd_vma offset)
16732 {
16733 static const char *names[3] = {"$a", "$t", "$d"};
16734 Elf_Internal_Sym sym;
16735
16736 sym.st_value = osi->sec->output_section->vma
16737 + osi->sec->output_offset
16738 + offset;
16739 sym.st_size = 0;
16740 sym.st_other = 0;
16741 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
16742 sym.st_shndx = osi->sec_shndx;
16743 sym.st_target_internal = 0;
16744 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
16745 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
16746 }
16747
16748 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
16749 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
16750
16751 static bfd_boolean
16752 elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
16753 bfd_boolean is_iplt_entry_p,
16754 union gotplt_union *root_plt,
16755 struct arm_plt_info *arm_plt)
16756 {
16757 struct elf32_arm_link_hash_table *htab;
16758 bfd_vma addr, plt_header_size;
16759
16760 if (root_plt->offset == (bfd_vma) -1)
16761 return TRUE;
16762
16763 htab = elf32_arm_hash_table (osi->info);
16764 if (htab == NULL)
16765 return FALSE;
16766
16767 if (is_iplt_entry_p)
16768 {
16769 osi->sec = htab->root.iplt;
16770 plt_header_size = 0;
16771 }
16772 else
16773 {
16774 osi->sec = htab->root.splt;
16775 plt_header_size = htab->plt_header_size;
16776 }
16777 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
16778 (osi->info->output_bfd, osi->sec->output_section));
16779
16780 addr = root_plt->offset & -2;
16781 if (htab->symbian_p)
16782 {
16783 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
16784 return FALSE;
16785 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
16786 return FALSE;
16787 }
16788 else if (htab->vxworks_p)
16789 {
16790 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
16791 return FALSE;
16792 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
16793 return FALSE;
16794 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
16795 return FALSE;
16796 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
16797 return FALSE;
16798 }
16799 else if (htab->nacl_p)
16800 {
16801 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
16802 return FALSE;
16803 }
16804 else if (using_thumb_only (htab))
16805 {
16806 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr))
16807 return FALSE;
16808 }
16809 else
16810 {
16811 bfd_boolean thumb_stub_p;
16812
16813 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
16814 if (thumb_stub_p)
16815 {
16816 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
16817 return FALSE;
16818 }
16819 #ifdef FOUR_WORD_PLT
16820 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
16821 return FALSE;
16822 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
16823 return FALSE;
16824 #else
16825 /* A three-word PLT with no Thumb thunk contains only Arm code,
16826 so only need to output a mapping symbol for the first PLT entry and
16827 entries with thumb thunks. */
16828 if (thumb_stub_p || addr == plt_header_size)
16829 {
16830 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
16831 return FALSE;
16832 }
16833 #endif
16834 }
16835
16836 return TRUE;
16837 }
16838
16839 /* Output mapping symbols for PLT entries associated with H. */
16840
16841 static bfd_boolean
16842 elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
16843 {
16844 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
16845 struct elf32_arm_link_hash_entry *eh;
16846
16847 if (h->root.type == bfd_link_hash_indirect)
16848 return TRUE;
16849
16850 if (h->root.type == bfd_link_hash_warning)
16851 /* When warning symbols are created, they **replace** the "real"
16852 entry in the hash table, thus we never get to see the real
16853 symbol in a hash traversal. So look at it now. */
16854 h = (struct elf_link_hash_entry *) h->root.u.i.link;
16855
16856 eh = (struct elf32_arm_link_hash_entry *) h;
16857 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
16858 &h->plt, &eh->plt);
16859 }
16860
16861 /* Bind a veneered symbol to its veneer identified by its hash entry
16862 STUB_ENTRY. The veneered location thus loose its symbol. */
16863
16864 static void
16865 arm_stub_claim_sym (struct elf32_arm_stub_hash_entry *stub_entry)
16866 {
16867 struct elf32_arm_link_hash_entry *hash = stub_entry->h;
16868
16869 BFD_ASSERT (hash);
16870 hash->root.root.u.def.section = stub_entry->stub_sec;
16871 hash->root.root.u.def.value = stub_entry->stub_offset;
16872 hash->root.size = stub_entry->stub_size;
16873 }
16874
16875 /* Output a single local symbol for a generated stub. */
16876
16877 static bfd_boolean
16878 elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
16879 bfd_vma offset, bfd_vma size)
16880 {
16881 Elf_Internal_Sym sym;
16882
16883 sym.st_value = osi->sec->output_section->vma
16884 + osi->sec->output_offset
16885 + offset;
16886 sym.st_size = size;
16887 sym.st_other = 0;
16888 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
16889 sym.st_shndx = osi->sec_shndx;
16890 sym.st_target_internal = 0;
16891 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
16892 }
16893
16894 static bfd_boolean
16895 arm_map_one_stub (struct bfd_hash_entry * gen_entry,
16896 void * in_arg)
16897 {
16898 struct elf32_arm_stub_hash_entry *stub_entry;
16899 asection *stub_sec;
16900 bfd_vma addr;
16901 char *stub_name;
16902 output_arch_syminfo *osi;
16903 const insn_sequence *template_sequence;
16904 enum stub_insn_type prev_type;
16905 int size;
16906 int i;
16907 enum map_symbol_type sym_type;
16908
16909 /* Massage our args to the form they really have. */
16910 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
16911 osi = (output_arch_syminfo *) in_arg;
16912
16913 stub_sec = stub_entry->stub_sec;
16914
16915 /* Ensure this stub is attached to the current section being
16916 processed. */
16917 if (stub_sec != osi->sec)
16918 return TRUE;
16919
16920 addr = (bfd_vma) stub_entry->stub_offset;
16921 template_sequence = stub_entry->stub_template;
16922
16923 if (arm_stub_sym_claimed (stub_entry->stub_type))
16924 arm_stub_claim_sym (stub_entry);
16925 else
16926 {
16927 stub_name = stub_entry->output_name;
16928 switch (template_sequence[0].type)
16929 {
16930 case ARM_TYPE:
16931 if (!elf32_arm_output_stub_sym (osi, stub_name, addr,
16932 stub_entry->stub_size))
16933 return FALSE;
16934 break;
16935 case THUMB16_TYPE:
16936 case THUMB32_TYPE:
16937 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
16938 stub_entry->stub_size))
16939 return FALSE;
16940 break;
16941 default:
16942 BFD_FAIL ();
16943 return 0;
16944 }
16945 }
16946
16947 prev_type = DATA_TYPE;
16948 size = 0;
16949 for (i = 0; i < stub_entry->stub_template_size; i++)
16950 {
16951 switch (template_sequence[i].type)
16952 {
16953 case ARM_TYPE:
16954 sym_type = ARM_MAP_ARM;
16955 break;
16956
16957 case THUMB16_TYPE:
16958 case THUMB32_TYPE:
16959 sym_type = ARM_MAP_THUMB;
16960 break;
16961
16962 case DATA_TYPE:
16963 sym_type = ARM_MAP_DATA;
16964 break;
16965
16966 default:
16967 BFD_FAIL ();
16968 return FALSE;
16969 }
16970
16971 if (template_sequence[i].type != prev_type)
16972 {
16973 prev_type = template_sequence[i].type;
16974 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
16975 return FALSE;
16976 }
16977
16978 switch (template_sequence[i].type)
16979 {
16980 case ARM_TYPE:
16981 case THUMB32_TYPE:
16982 size += 4;
16983 break;
16984
16985 case THUMB16_TYPE:
16986 size += 2;
16987 break;
16988
16989 case DATA_TYPE:
16990 size += 4;
16991 break;
16992
16993 default:
16994 BFD_FAIL ();
16995 return FALSE;
16996 }
16997 }
16998
16999 return TRUE;
17000 }
17001
17002 /* Output mapping symbols for linker generated sections,
17003 and for those data-only sections that do not have a
17004 $d. */
17005
17006 static bfd_boolean
17007 elf32_arm_output_arch_local_syms (bfd *output_bfd,
17008 struct bfd_link_info *info,
17009 void *flaginfo,
17010 int (*func) (void *, const char *,
17011 Elf_Internal_Sym *,
17012 asection *,
17013 struct elf_link_hash_entry *))
17014 {
17015 output_arch_syminfo osi;
17016 struct elf32_arm_link_hash_table *htab;
17017 bfd_vma offset;
17018 bfd_size_type size;
17019 bfd *input_bfd;
17020
17021 htab = elf32_arm_hash_table (info);
17022 if (htab == NULL)
17023 return FALSE;
17024
17025 check_use_blx (htab);
17026
17027 osi.flaginfo = flaginfo;
17028 osi.info = info;
17029 osi.func = func;
17030
17031 /* Add a $d mapping symbol to data-only sections that
17032 don't have any mapping symbol. This may result in (harmless) redundant
17033 mapping symbols. */
17034 for (input_bfd = info->input_bfds;
17035 input_bfd != NULL;
17036 input_bfd = input_bfd->link.next)
17037 {
17038 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
17039 for (osi.sec = input_bfd->sections;
17040 osi.sec != NULL;
17041 osi.sec = osi.sec->next)
17042 {
17043 if (osi.sec->output_section != NULL
17044 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
17045 != 0)
17046 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
17047 == SEC_HAS_CONTENTS
17048 && get_arm_elf_section_data (osi.sec) != NULL
17049 && get_arm_elf_section_data (osi.sec)->mapcount == 0
17050 && osi.sec->size > 0
17051 && (osi.sec->flags & SEC_EXCLUDE) == 0)
17052 {
17053 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17054 (output_bfd, osi.sec->output_section);
17055 if (osi.sec_shndx != (int)SHN_BAD)
17056 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
17057 }
17058 }
17059 }
17060
17061 /* ARM->Thumb glue. */
17062 if (htab->arm_glue_size > 0)
17063 {
17064 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
17065 ARM2THUMB_GLUE_SECTION_NAME);
17066
17067 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17068 (output_bfd, osi.sec->output_section);
17069 if (bfd_link_pic (info) || htab->root.is_relocatable_executable
17070 || htab->pic_veneer)
17071 size = ARM2THUMB_PIC_GLUE_SIZE;
17072 else if (htab->use_blx)
17073 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
17074 else
17075 size = ARM2THUMB_STATIC_GLUE_SIZE;
17076
17077 for (offset = 0; offset < htab->arm_glue_size; offset += size)
17078 {
17079 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
17080 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
17081 }
17082 }
17083
17084 /* Thumb->ARM glue. */
17085 if (htab->thumb_glue_size > 0)
17086 {
17087 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
17088 THUMB2ARM_GLUE_SECTION_NAME);
17089
17090 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17091 (output_bfd, osi.sec->output_section);
17092 size = THUMB2ARM_GLUE_SIZE;
17093
17094 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
17095 {
17096 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
17097 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
17098 }
17099 }
17100
17101 /* ARMv4 BX veneers. */
17102 if (htab->bx_glue_size > 0)
17103 {
17104 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
17105 ARM_BX_GLUE_SECTION_NAME);
17106
17107 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17108 (output_bfd, osi.sec->output_section);
17109
17110 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
17111 }
17112
17113 /* Long calls stubs. */
17114 if (htab->stub_bfd && htab->stub_bfd->sections)
17115 {
17116 asection* stub_sec;
17117
17118 for (stub_sec = htab->stub_bfd->sections;
17119 stub_sec != NULL;
17120 stub_sec = stub_sec->next)
17121 {
17122 /* Ignore non-stub sections. */
17123 if (!strstr (stub_sec->name, STUB_SUFFIX))
17124 continue;
17125
17126 osi.sec = stub_sec;
17127
17128 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17129 (output_bfd, osi.sec->output_section);
17130
17131 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
17132 }
17133 }
17134
17135 /* Finally, output mapping symbols for the PLT. */
17136 if (htab->root.splt && htab->root.splt->size > 0)
17137 {
17138 osi.sec = htab->root.splt;
17139 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
17140 (output_bfd, osi.sec->output_section));
17141
17142 /* Output mapping symbols for the plt header. SymbianOS does not have a
17143 plt header. */
17144 if (htab->vxworks_p)
17145 {
17146 /* VxWorks shared libraries have no PLT header. */
17147 if (!bfd_link_pic (info))
17148 {
17149 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17150 return FALSE;
17151 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
17152 return FALSE;
17153 }
17154 }
17155 else if (htab->nacl_p)
17156 {
17157 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17158 return FALSE;
17159 }
17160 else if (using_thumb_only (htab))
17161 {
17162 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 0))
17163 return FALSE;
17164 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
17165 return FALSE;
17166 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 16))
17167 return FALSE;
17168 }
17169 else if (!htab->symbian_p)
17170 {
17171 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17172 return FALSE;
17173 #ifndef FOUR_WORD_PLT
17174 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
17175 return FALSE;
17176 #endif
17177 }
17178 }
17179 if (htab->nacl_p && htab->root.iplt && htab->root.iplt->size > 0)
17180 {
17181 /* NaCl uses a special first entry in .iplt too. */
17182 osi.sec = htab->root.iplt;
17183 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
17184 (output_bfd, osi.sec->output_section));
17185 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17186 return FALSE;
17187 }
17188 if ((htab->root.splt && htab->root.splt->size > 0)
17189 || (htab->root.iplt && htab->root.iplt->size > 0))
17190 {
17191 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
17192 for (input_bfd = info->input_bfds;
17193 input_bfd != NULL;
17194 input_bfd = input_bfd->link.next)
17195 {
17196 struct arm_local_iplt_info **local_iplt;
17197 unsigned int i, num_syms;
17198
17199 local_iplt = elf32_arm_local_iplt (input_bfd);
17200 if (local_iplt != NULL)
17201 {
17202 num_syms = elf_symtab_hdr (input_bfd).sh_info;
17203 for (i = 0; i < num_syms; i++)
17204 if (local_iplt[i] != NULL
17205 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
17206 &local_iplt[i]->root,
17207 &local_iplt[i]->arm))
17208 return FALSE;
17209 }
17210 }
17211 }
17212 if (htab->dt_tlsdesc_plt != 0)
17213 {
17214 /* Mapping symbols for the lazy tls trampoline. */
17215 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
17216 return FALSE;
17217
17218 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
17219 htab->dt_tlsdesc_plt + 24))
17220 return FALSE;
17221 }
17222 if (htab->tls_trampoline != 0)
17223 {
17224 /* Mapping symbols for the tls trampoline. */
17225 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
17226 return FALSE;
17227 #ifdef FOUR_WORD_PLT
17228 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
17229 htab->tls_trampoline + 12))
17230 return FALSE;
17231 #endif
17232 }
17233
17234 return TRUE;
17235 }
17236
17237 /* Filter normal symbols of CMSE entry functions of ABFD to include in
17238 the import library. All SYMCOUNT symbols of ABFD can be examined
17239 from their pointers in SYMS. Pointers of symbols to keep should be
17240 stored continuously at the beginning of that array.
17241
17242 Returns the number of symbols to keep. */
17243
17244 static unsigned int
17245 elf32_arm_filter_cmse_symbols (bfd *abfd ATTRIBUTE_UNUSED,
17246 struct bfd_link_info *info,
17247 asymbol **syms, long symcount)
17248 {
17249 size_t maxnamelen;
17250 char *cmse_name;
17251 long src_count, dst_count = 0;
17252 struct elf32_arm_link_hash_table *htab;
17253
17254 htab = elf32_arm_hash_table (info);
17255 if (!htab->stub_bfd || !htab->stub_bfd->sections)
17256 symcount = 0;
17257
17258 maxnamelen = 128;
17259 cmse_name = (char *) bfd_malloc (maxnamelen);
17260 for (src_count = 0; src_count < symcount; src_count++)
17261 {
17262 struct elf32_arm_link_hash_entry *cmse_hash;
17263 asymbol *sym;
17264 flagword flags;
17265 char *name;
17266 size_t namelen;
17267
17268 sym = syms[src_count];
17269 flags = sym->flags;
17270 name = (char *) bfd_asymbol_name (sym);
17271
17272 if ((flags & BSF_FUNCTION) != BSF_FUNCTION)
17273 continue;
17274 if (!(flags & (BSF_GLOBAL | BSF_WEAK)))
17275 continue;
17276
17277 namelen = strlen (name) + sizeof (CMSE_PREFIX) + 1;
17278 if (namelen > maxnamelen)
17279 {
17280 cmse_name = (char *)
17281 bfd_realloc (cmse_name, namelen);
17282 maxnamelen = namelen;
17283 }
17284 snprintf (cmse_name, maxnamelen, "%s%s", CMSE_PREFIX, name);
17285 cmse_hash = (struct elf32_arm_link_hash_entry *)
17286 elf_link_hash_lookup (&(htab)->root, cmse_name, FALSE, FALSE, TRUE);
17287
17288 if (!cmse_hash
17289 || (cmse_hash->root.root.type != bfd_link_hash_defined
17290 && cmse_hash->root.root.type != bfd_link_hash_defweak)
17291 || cmse_hash->root.type != STT_FUNC)
17292 continue;
17293
17294 if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
17295 continue;
17296
17297 syms[dst_count++] = sym;
17298 }
17299 free (cmse_name);
17300
17301 syms[dst_count] = NULL;
17302
17303 return dst_count;
17304 }
17305
17306 /* Filter symbols of ABFD to include in the import library. All
17307 SYMCOUNT symbols of ABFD can be examined from their pointers in
17308 SYMS. Pointers of symbols to keep should be stored continuously at
17309 the beginning of that array.
17310
17311 Returns the number of symbols to keep. */
17312
17313 static unsigned int
17314 elf32_arm_filter_implib_symbols (bfd *abfd ATTRIBUTE_UNUSED,
17315 struct bfd_link_info *info,
17316 asymbol **syms, long symcount)
17317 {
17318 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
17319
17320 if (globals->cmse_implib)
17321 return elf32_arm_filter_cmse_symbols (abfd, info, syms, symcount);
17322 else
17323 return _bfd_elf_filter_global_symbols (abfd, info, syms, symcount);
17324 }
17325
17326 /* Allocate target specific section data. */
17327
17328 static bfd_boolean
17329 elf32_arm_new_section_hook (bfd *abfd, asection *sec)
17330 {
17331 if (!sec->used_by_bfd)
17332 {
17333 _arm_elf_section_data *sdata;
17334 bfd_size_type amt = sizeof (*sdata);
17335
17336 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
17337 if (sdata == NULL)
17338 return FALSE;
17339 sec->used_by_bfd = sdata;
17340 }
17341
17342 return _bfd_elf_new_section_hook (abfd, sec);
17343 }
17344
17345
17346 /* Used to order a list of mapping symbols by address. */
17347
17348 static int
17349 elf32_arm_compare_mapping (const void * a, const void * b)
17350 {
17351 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
17352 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
17353
17354 if (amap->vma > bmap->vma)
17355 return 1;
17356 else if (amap->vma < bmap->vma)
17357 return -1;
17358 else if (amap->type > bmap->type)
17359 /* Ensure results do not depend on the host qsort for objects with
17360 multiple mapping symbols at the same address by sorting on type
17361 after vma. */
17362 return 1;
17363 else if (amap->type < bmap->type)
17364 return -1;
17365 else
17366 return 0;
17367 }
17368
17369 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
17370
17371 static unsigned long
17372 offset_prel31 (unsigned long addr, bfd_vma offset)
17373 {
17374 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
17375 }
17376
17377 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
17378 relocations. */
17379
17380 static void
17381 copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
17382 {
17383 unsigned long first_word = bfd_get_32 (output_bfd, from);
17384 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
17385
17386 /* High bit of first word is supposed to be zero. */
17387 if ((first_word & 0x80000000ul) == 0)
17388 first_word = offset_prel31 (first_word, offset);
17389
17390 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
17391 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
17392 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
17393 second_word = offset_prel31 (second_word, offset);
17394
17395 bfd_put_32 (output_bfd, first_word, to);
17396 bfd_put_32 (output_bfd, second_word, to + 4);
17397 }
17398
17399 /* Data for make_branch_to_a8_stub(). */
17400
17401 struct a8_branch_to_stub_data
17402 {
17403 asection *writing_section;
17404 bfd_byte *contents;
17405 };
17406
17407
17408 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
17409 places for a particular section. */
17410
17411 static bfd_boolean
17412 make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
17413 void *in_arg)
17414 {
17415 struct elf32_arm_stub_hash_entry *stub_entry;
17416 struct a8_branch_to_stub_data *data;
17417 bfd_byte *contents;
17418 unsigned long branch_insn;
17419 bfd_vma veneered_insn_loc, veneer_entry_loc;
17420 bfd_signed_vma branch_offset;
17421 bfd *abfd;
17422 unsigned int loc;
17423
17424 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
17425 data = (struct a8_branch_to_stub_data *) in_arg;
17426
17427 if (stub_entry->target_section != data->writing_section
17428 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
17429 return TRUE;
17430
17431 contents = data->contents;
17432
17433 /* We use target_section as Cortex-A8 erratum workaround stubs are only
17434 generated when both source and target are in the same section. */
17435 veneered_insn_loc = stub_entry->target_section->output_section->vma
17436 + stub_entry->target_section->output_offset
17437 + stub_entry->source_value;
17438
17439 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
17440 + stub_entry->stub_sec->output_offset
17441 + stub_entry->stub_offset;
17442
17443 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
17444 veneered_insn_loc &= ~3u;
17445
17446 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
17447
17448 abfd = stub_entry->target_section->owner;
17449 loc = stub_entry->source_value;
17450
17451 /* We attempt to avoid this condition by setting stubs_always_after_branch
17452 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
17453 This check is just to be on the safe side... */
17454 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
17455 {
17456 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
17457 "allocated in unsafe location"), abfd);
17458 return FALSE;
17459 }
17460
17461 switch (stub_entry->stub_type)
17462 {
17463 case arm_stub_a8_veneer_b:
17464 case arm_stub_a8_veneer_b_cond:
17465 branch_insn = 0xf0009000;
17466 goto jump24;
17467
17468 case arm_stub_a8_veneer_blx:
17469 branch_insn = 0xf000e800;
17470 goto jump24;
17471
17472 case arm_stub_a8_veneer_bl:
17473 {
17474 unsigned int i1, j1, i2, j2, s;
17475
17476 branch_insn = 0xf000d000;
17477
17478 jump24:
17479 if (branch_offset < -16777216 || branch_offset > 16777214)
17480 {
17481 /* There's not much we can do apart from complain if this
17482 happens. */
17483 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
17484 "of range (input file too large)"), abfd);
17485 return FALSE;
17486 }
17487
17488 /* i1 = not(j1 eor s), so:
17489 not i1 = j1 eor s
17490 j1 = (not i1) eor s. */
17491
17492 branch_insn |= (branch_offset >> 1) & 0x7ff;
17493 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
17494 i2 = (branch_offset >> 22) & 1;
17495 i1 = (branch_offset >> 23) & 1;
17496 s = (branch_offset >> 24) & 1;
17497 j1 = (!i1) ^ s;
17498 j2 = (!i2) ^ s;
17499 branch_insn |= j2 << 11;
17500 branch_insn |= j1 << 13;
17501 branch_insn |= s << 26;
17502 }
17503 break;
17504
17505 default:
17506 BFD_FAIL ();
17507 return FALSE;
17508 }
17509
17510 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[loc]);
17511 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[loc + 2]);
17512
17513 return TRUE;
17514 }
17515
17516 /* Beginning of stm32l4xx work-around. */
17517
17518 /* Functions encoding instructions necessary for the emission of the
17519 fix-stm32l4xx-629360.
17520 Encoding is extracted from the
17521 ARM (C) Architecture Reference Manual
17522 ARMv7-A and ARMv7-R edition
17523 ARM DDI 0406C.b (ID072512). */
17524
17525 static inline bfd_vma
17526 create_instruction_branch_absolute (int branch_offset)
17527 {
17528 /* A8.8.18 B (A8-334)
17529 B target_address (Encoding T4). */
17530 /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii. */
17531 /* jump offset is: S:I1:I2:imm10:imm11:0. */
17532 /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S). */
17533
17534 int s = ((branch_offset & 0x1000000) >> 24);
17535 int j1 = s ^ !((branch_offset & 0x800000) >> 23);
17536 int j2 = s ^ !((branch_offset & 0x400000) >> 22);
17537
17538 if (branch_offset < -(1 << 24) || branch_offset >= (1 << 24))
17539 BFD_ASSERT (0 && "Error: branch out of range. Cannot create branch.");
17540
17541 bfd_vma patched_inst = 0xf0009000
17542 | s << 26 /* S. */
17543 | (((unsigned long) (branch_offset) >> 12) & 0x3ff) << 16 /* imm10. */
17544 | j1 << 13 /* J1. */
17545 | j2 << 11 /* J2. */
17546 | (((unsigned long) (branch_offset) >> 1) & 0x7ff); /* imm11. */
17547
17548 return patched_inst;
17549 }
17550
17551 static inline bfd_vma
17552 create_instruction_ldmia (int base_reg, int wback, int reg_mask)
17553 {
17554 /* A8.8.57 LDM/LDMIA/LDMFD (A8-396)
17555 LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2). */
17556 bfd_vma patched_inst = 0xe8900000
17557 | (/*W=*/wback << 21)
17558 | (base_reg << 16)
17559 | (reg_mask & 0x0000ffff);
17560
17561 return patched_inst;
17562 }
17563
17564 static inline bfd_vma
17565 create_instruction_ldmdb (int base_reg, int wback, int reg_mask)
17566 {
17567 /* A8.8.60 LDMDB/LDMEA (A8-402)
17568 LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1). */
17569 bfd_vma patched_inst = 0xe9100000
17570 | (/*W=*/wback << 21)
17571 | (base_reg << 16)
17572 | (reg_mask & 0x0000ffff);
17573
17574 return patched_inst;
17575 }
17576
17577 static inline bfd_vma
17578 create_instruction_mov (int target_reg, int source_reg)
17579 {
17580 /* A8.8.103 MOV (register) (A8-486)
17581 MOV Rd, Rm (Encoding T1). */
17582 bfd_vma patched_inst = 0x4600
17583 | (target_reg & 0x7)
17584 | ((target_reg & 0x8) >> 3) << 7
17585 | (source_reg << 3);
17586
17587 return patched_inst;
17588 }
17589
17590 static inline bfd_vma
17591 create_instruction_sub (int target_reg, int source_reg, int value)
17592 {
17593 /* A8.8.221 SUB (immediate) (A8-708)
17594 SUB Rd, Rn, #value (Encoding T3). */
17595 bfd_vma patched_inst = 0xf1a00000
17596 | (target_reg << 8)
17597 | (source_reg << 16)
17598 | (/*S=*/0 << 20)
17599 | ((value & 0x800) >> 11) << 26
17600 | ((value & 0x700) >> 8) << 12
17601 | (value & 0x0ff);
17602
17603 return patched_inst;
17604 }
17605
17606 static inline bfd_vma
17607 create_instruction_vldmia (int base_reg, int is_dp, int wback, int num_words,
17608 int first_reg)
17609 {
17610 /* A8.8.332 VLDM (A8-922)
17611 VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */
17612 bfd_vma patched_inst = (is_dp ? 0xec900b00 : 0xec900a00)
17613 | (/*W=*/wback << 21)
17614 | (base_reg << 16)
17615 | (num_words & 0x000000ff)
17616 | (((unsigned)first_reg >> 1) & 0x0000000f) << 12
17617 | (first_reg & 0x00000001) << 22;
17618
17619 return patched_inst;
17620 }
17621
17622 static inline bfd_vma
17623 create_instruction_vldmdb (int base_reg, int is_dp, int num_words,
17624 int first_reg)
17625 {
17626 /* A8.8.332 VLDM (A8-922)
17627 VLMD{MODE} Rn!, {} (Encoding T1 or T2). */
17628 bfd_vma patched_inst = (is_dp ? 0xed300b00 : 0xed300a00)
17629 | (base_reg << 16)
17630 | (num_words & 0x000000ff)
17631 | (((unsigned)first_reg >>1 ) & 0x0000000f) << 12
17632 | (first_reg & 0x00000001) << 22;
17633
17634 return patched_inst;
17635 }
17636
17637 static inline bfd_vma
17638 create_instruction_udf_w (int value)
17639 {
17640 /* A8.8.247 UDF (A8-758)
17641 Undefined (Encoding T2). */
17642 bfd_vma patched_inst = 0xf7f0a000
17643 | (value & 0x00000fff)
17644 | (value & 0x000f0000) << 16;
17645
17646 return patched_inst;
17647 }
17648
17649 static inline bfd_vma
17650 create_instruction_udf (int value)
17651 {
17652 /* A8.8.247 UDF (A8-758)
17653 Undefined (Encoding T1). */
17654 bfd_vma patched_inst = 0xde00
17655 | (value & 0xff);
17656
17657 return patched_inst;
17658 }
17659
17660 /* Functions writing an instruction in memory, returning the next
17661 memory position to write to. */
17662
17663 static inline bfd_byte *
17664 push_thumb2_insn32 (struct elf32_arm_link_hash_table * htab,
17665 bfd * output_bfd, bfd_byte *pt, insn32 insn)
17666 {
17667 put_thumb2_insn (htab, output_bfd, insn, pt);
17668 return pt + 4;
17669 }
17670
17671 static inline bfd_byte *
17672 push_thumb2_insn16 (struct elf32_arm_link_hash_table * htab,
17673 bfd * output_bfd, bfd_byte *pt, insn32 insn)
17674 {
17675 put_thumb_insn (htab, output_bfd, insn, pt);
17676 return pt + 2;
17677 }
17678
17679 /* Function filling up a region in memory with T1 and T2 UDFs taking
17680 care of alignment. */
17681
17682 static bfd_byte *
17683 stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table * htab,
17684 bfd * output_bfd,
17685 const bfd_byte * const base_stub_contents,
17686 bfd_byte * const from_stub_contents,
17687 const bfd_byte * const end_stub_contents)
17688 {
17689 bfd_byte *current_stub_contents = from_stub_contents;
17690
17691 /* Fill the remaining of the stub with deterministic contents : UDF
17692 instructions.
17693 Check if realignment is needed on modulo 4 frontier using T1, to
17694 further use T2. */
17695 if ((current_stub_contents < end_stub_contents)
17696 && !((current_stub_contents - base_stub_contents) % 2)
17697 && ((current_stub_contents - base_stub_contents) % 4))
17698 current_stub_contents =
17699 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
17700 create_instruction_udf (0));
17701
17702 for (; current_stub_contents < end_stub_contents;)
17703 current_stub_contents =
17704 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17705 create_instruction_udf_w (0));
17706
17707 return current_stub_contents;
17708 }
17709
17710 /* Functions writing the stream of instructions equivalent to the
17711 derived sequence for ldmia, ldmdb, vldm respectively. */
17712
17713 static void
17714 stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table * htab,
17715 bfd * output_bfd,
17716 const insn32 initial_insn,
17717 const bfd_byte *const initial_insn_addr,
17718 bfd_byte *const base_stub_contents)
17719 {
17720 int wback = (initial_insn & 0x00200000) >> 21;
17721 int ri, rn = (initial_insn & 0x000F0000) >> 16;
17722 int insn_all_registers = initial_insn & 0x0000ffff;
17723 int insn_low_registers, insn_high_registers;
17724 int usable_register_mask;
17725 int nb_registers = popcount (insn_all_registers);
17726 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
17727 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
17728 bfd_byte *current_stub_contents = base_stub_contents;
17729
17730 BFD_ASSERT (is_thumb2_ldmia (initial_insn));
17731
17732 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
17733 smaller than 8 registers load sequences that do not cause the
17734 hardware issue. */
17735 if (nb_registers <= 8)
17736 {
17737 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
17738 current_stub_contents =
17739 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17740 initial_insn);
17741
17742 /* B initial_insn_addr+4. */
17743 if (!restore_pc)
17744 current_stub_contents =
17745 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17746 create_instruction_branch_absolute
17747 (initial_insn_addr - current_stub_contents));
17748
17749
17750 /* Fill the remaining of the stub with deterministic contents. */
17751 current_stub_contents =
17752 stm32l4xx_fill_stub_udf (htab, output_bfd,
17753 base_stub_contents, current_stub_contents,
17754 base_stub_contents +
17755 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
17756
17757 return;
17758 }
17759
17760 /* - reg_list[13] == 0. */
17761 BFD_ASSERT ((insn_all_registers & (1 << 13))==0);
17762
17763 /* - reg_list[14] & reg_list[15] != 1. */
17764 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
17765
17766 /* - if (wback==1) reg_list[rn] == 0. */
17767 BFD_ASSERT (!wback || !restore_rn);
17768
17769 /* - nb_registers > 8. */
17770 BFD_ASSERT (popcount (insn_all_registers) > 8);
17771
17772 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
17773
17774 /* In the following algorithm, we split this wide LDM using 2 LDM insns:
17775 - One with the 7 lowest registers (register mask 0x007F)
17776 This LDM will finally contain between 2 and 7 registers
17777 - One with the 7 highest registers (register mask 0xDF80)
17778 This ldm will finally contain between 2 and 7 registers. */
17779 insn_low_registers = insn_all_registers & 0x007F;
17780 insn_high_registers = insn_all_registers & 0xDF80;
17781
17782 /* A spare register may be needed during this veneer to temporarily
17783 handle the base register. This register will be restored with the
17784 last LDM operation.
17785 The usable register may be any general purpose register (that
17786 excludes PC, SP, LR : register mask is 0x1FFF). */
17787 usable_register_mask = 0x1FFF;
17788
17789 /* Generate the stub function. */
17790 if (wback)
17791 {
17792 /* LDMIA Rn!, {R-low-register-list} : (Encoding T2). */
17793 current_stub_contents =
17794 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17795 create_instruction_ldmia
17796 (rn, /*wback=*/1, insn_low_registers));
17797
17798 /* LDMIA Rn!, {R-high-register-list} : (Encoding T2). */
17799 current_stub_contents =
17800 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17801 create_instruction_ldmia
17802 (rn, /*wback=*/1, insn_high_registers));
17803 if (!restore_pc)
17804 {
17805 /* B initial_insn_addr+4. */
17806 current_stub_contents =
17807 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17808 create_instruction_branch_absolute
17809 (initial_insn_addr - current_stub_contents));
17810 }
17811 }
17812 else /* if (!wback). */
17813 {
17814 ri = rn;
17815
17816 /* If Rn is not part of the high-register-list, move it there. */
17817 if (!(insn_high_registers & (1 << rn)))
17818 {
17819 /* Choose a Ri in the high-register-list that will be restored. */
17820 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
17821
17822 /* MOV Ri, Rn. */
17823 current_stub_contents =
17824 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
17825 create_instruction_mov (ri, rn));
17826 }
17827
17828 /* LDMIA Ri!, {R-low-register-list} : (Encoding T2). */
17829 current_stub_contents =
17830 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17831 create_instruction_ldmia
17832 (ri, /*wback=*/1, insn_low_registers));
17833
17834 /* LDMIA Ri, {R-high-register-list} : (Encoding T2). */
17835 current_stub_contents =
17836 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17837 create_instruction_ldmia
17838 (ri, /*wback=*/0, insn_high_registers));
17839
17840 if (!restore_pc)
17841 {
17842 /* B initial_insn_addr+4. */
17843 current_stub_contents =
17844 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17845 create_instruction_branch_absolute
17846 (initial_insn_addr - current_stub_contents));
17847 }
17848 }
17849
17850 /* Fill the remaining of the stub with deterministic contents. */
17851 current_stub_contents =
17852 stm32l4xx_fill_stub_udf (htab, output_bfd,
17853 base_stub_contents, current_stub_contents,
17854 base_stub_contents +
17855 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
17856 }
17857
17858 static void
17859 stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table * htab,
17860 bfd * output_bfd,
17861 const insn32 initial_insn,
17862 const bfd_byte *const initial_insn_addr,
17863 bfd_byte *const base_stub_contents)
17864 {
17865 int wback = (initial_insn & 0x00200000) >> 21;
17866 int ri, rn = (initial_insn & 0x000f0000) >> 16;
17867 int insn_all_registers = initial_insn & 0x0000ffff;
17868 int insn_low_registers, insn_high_registers;
17869 int usable_register_mask;
17870 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
17871 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
17872 int nb_registers = popcount (insn_all_registers);
17873 bfd_byte *current_stub_contents = base_stub_contents;
17874
17875 BFD_ASSERT (is_thumb2_ldmdb (initial_insn));
17876
17877 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
17878 smaller than 8 registers load sequences that do not cause the
17879 hardware issue. */
17880 if (nb_registers <= 8)
17881 {
17882 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
17883 current_stub_contents =
17884 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17885 initial_insn);
17886
17887 /* B initial_insn_addr+4. */
17888 current_stub_contents =
17889 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17890 create_instruction_branch_absolute
17891 (initial_insn_addr - current_stub_contents));
17892
17893 /* Fill the remaining of the stub with deterministic contents. */
17894 current_stub_contents =
17895 stm32l4xx_fill_stub_udf (htab, output_bfd,
17896 base_stub_contents, current_stub_contents,
17897 base_stub_contents +
17898 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
17899
17900 return;
17901 }
17902
17903 /* - reg_list[13] == 0. */
17904 BFD_ASSERT ((insn_all_registers & (1 << 13)) == 0);
17905
17906 /* - reg_list[14] & reg_list[15] != 1. */
17907 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
17908
17909 /* - if (wback==1) reg_list[rn] == 0. */
17910 BFD_ASSERT (!wback || !restore_rn);
17911
17912 /* - nb_registers > 8. */
17913 BFD_ASSERT (popcount (insn_all_registers) > 8);
17914
17915 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
17916
17917 /* In the following algorithm, we split this wide LDM using 2 LDM insn:
17918 - One with the 7 lowest registers (register mask 0x007F)
17919 This LDM will finally contain between 2 and 7 registers
17920 - One with the 7 highest registers (register mask 0xDF80)
17921 This ldm will finally contain between 2 and 7 registers. */
17922 insn_low_registers = insn_all_registers & 0x007F;
17923 insn_high_registers = insn_all_registers & 0xDF80;
17924
17925 /* A spare register may be needed during this veneer to temporarily
17926 handle the base register. This register will be restored with
17927 the last LDM operation.
17928 The usable register may be any general purpose register (that excludes
17929 PC, SP, LR : register mask is 0x1FFF). */
17930 usable_register_mask = 0x1FFF;
17931
17932 /* Generate the stub function. */
17933 if (!wback && !restore_pc && !restore_rn)
17934 {
17935 /* Choose a Ri in the low-register-list that will be restored. */
17936 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
17937
17938 /* MOV Ri, Rn. */
17939 current_stub_contents =
17940 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
17941 create_instruction_mov (ri, rn));
17942
17943 /* LDMDB Ri!, {R-high-register-list}. */
17944 current_stub_contents =
17945 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17946 create_instruction_ldmdb
17947 (ri, /*wback=*/1, insn_high_registers));
17948
17949 /* LDMDB Ri, {R-low-register-list}. */
17950 current_stub_contents =
17951 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17952 create_instruction_ldmdb
17953 (ri, /*wback=*/0, insn_low_registers));
17954
17955 /* B initial_insn_addr+4. */
17956 current_stub_contents =
17957 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17958 create_instruction_branch_absolute
17959 (initial_insn_addr - current_stub_contents));
17960 }
17961 else if (wback && !restore_pc && !restore_rn)
17962 {
17963 /* LDMDB Rn!, {R-high-register-list}. */
17964 current_stub_contents =
17965 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17966 create_instruction_ldmdb
17967 (rn, /*wback=*/1, insn_high_registers));
17968
17969 /* LDMDB Rn!, {R-low-register-list}. */
17970 current_stub_contents =
17971 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17972 create_instruction_ldmdb
17973 (rn, /*wback=*/1, insn_low_registers));
17974
17975 /* B initial_insn_addr+4. */
17976 current_stub_contents =
17977 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17978 create_instruction_branch_absolute
17979 (initial_insn_addr - current_stub_contents));
17980 }
17981 else if (!wback && restore_pc && !restore_rn)
17982 {
17983 /* Choose a Ri in the high-register-list that will be restored. */
17984 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
17985
17986 /* SUB Ri, Rn, #(4*nb_registers). */
17987 current_stub_contents =
17988 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17989 create_instruction_sub (ri, rn, (4 * nb_registers)));
17990
17991 /* LDMIA Ri!, {R-low-register-list}. */
17992 current_stub_contents =
17993 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17994 create_instruction_ldmia
17995 (ri, /*wback=*/1, insn_low_registers));
17996
17997 /* LDMIA Ri, {R-high-register-list}. */
17998 current_stub_contents =
17999 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18000 create_instruction_ldmia
18001 (ri, /*wback=*/0, insn_high_registers));
18002 }
18003 else if (wback && restore_pc && !restore_rn)
18004 {
18005 /* Choose a Ri in the high-register-list that will be restored. */
18006 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18007
18008 /* SUB Rn, Rn, #(4*nb_registers) */
18009 current_stub_contents =
18010 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18011 create_instruction_sub (rn, rn, (4 * nb_registers)));
18012
18013 /* MOV Ri, Rn. */
18014 current_stub_contents =
18015 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18016 create_instruction_mov (ri, rn));
18017
18018 /* LDMIA Ri!, {R-low-register-list}. */
18019 current_stub_contents =
18020 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18021 create_instruction_ldmia
18022 (ri, /*wback=*/1, insn_low_registers));
18023
18024 /* LDMIA Ri, {R-high-register-list}. */
18025 current_stub_contents =
18026 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18027 create_instruction_ldmia
18028 (ri, /*wback=*/0, insn_high_registers));
18029 }
18030 else if (!wback && !restore_pc && restore_rn)
18031 {
18032 ri = rn;
18033 if (!(insn_low_registers & (1 << rn)))
18034 {
18035 /* Choose a Ri in the low-register-list that will be restored. */
18036 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
18037
18038 /* MOV Ri, Rn. */
18039 current_stub_contents =
18040 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18041 create_instruction_mov (ri, rn));
18042 }
18043
18044 /* LDMDB Ri!, {R-high-register-list}. */
18045 current_stub_contents =
18046 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18047 create_instruction_ldmdb
18048 (ri, /*wback=*/1, insn_high_registers));
18049
18050 /* LDMDB Ri, {R-low-register-list}. */
18051 current_stub_contents =
18052 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18053 create_instruction_ldmdb
18054 (ri, /*wback=*/0, insn_low_registers));
18055
18056 /* B initial_insn_addr+4. */
18057 current_stub_contents =
18058 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18059 create_instruction_branch_absolute
18060 (initial_insn_addr - current_stub_contents));
18061 }
18062 else if (!wback && restore_pc && restore_rn)
18063 {
18064 ri = rn;
18065 if (!(insn_high_registers & (1 << rn)))
18066 {
18067 /* Choose a Ri in the high-register-list that will be restored. */
18068 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18069 }
18070
18071 /* SUB Ri, Rn, #(4*nb_registers). */
18072 current_stub_contents =
18073 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18074 create_instruction_sub (ri, rn, (4 * nb_registers)));
18075
18076 /* LDMIA Ri!, {R-low-register-list}. */
18077 current_stub_contents =
18078 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18079 create_instruction_ldmia
18080 (ri, /*wback=*/1, insn_low_registers));
18081
18082 /* LDMIA Ri, {R-high-register-list}. */
18083 current_stub_contents =
18084 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18085 create_instruction_ldmia
18086 (ri, /*wback=*/0, insn_high_registers));
18087 }
18088 else if (wback && restore_rn)
18089 {
18090 /* The assembler should not have accepted to encode this. */
18091 BFD_ASSERT (0 && "Cannot patch an instruction that has an "
18092 "undefined behavior.\n");
18093 }
18094
18095 /* Fill the remaining of the stub with deterministic contents. */
18096 current_stub_contents =
18097 stm32l4xx_fill_stub_udf (htab, output_bfd,
18098 base_stub_contents, current_stub_contents,
18099 base_stub_contents +
18100 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18101
18102 }
18103
18104 static void
18105 stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table * htab,
18106 bfd * output_bfd,
18107 const insn32 initial_insn,
18108 const bfd_byte *const initial_insn_addr,
18109 bfd_byte *const base_stub_contents)
18110 {
18111 int num_words = ((unsigned int) initial_insn << 24) >> 24;
18112 bfd_byte *current_stub_contents = base_stub_contents;
18113
18114 BFD_ASSERT (is_thumb2_vldm (initial_insn));
18115
18116 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18117 smaller than 8 words load sequences that do not cause the
18118 hardware issue. */
18119 if (num_words <= 8)
18120 {
18121 /* Untouched instruction. */
18122 current_stub_contents =
18123 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18124 initial_insn);
18125
18126 /* B initial_insn_addr+4. */
18127 current_stub_contents =
18128 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18129 create_instruction_branch_absolute
18130 (initial_insn_addr - current_stub_contents));
18131 }
18132 else
18133 {
18134 bfd_boolean is_dp = /* DP encoding. */
18135 (initial_insn & 0xfe100f00) == 0xec100b00;
18136 bfd_boolean is_ia_nobang = /* (IA without !). */
18137 (((initial_insn << 7) >> 28) & 0xd) == 0x4;
18138 bfd_boolean is_ia_bang = /* (IA with !) - includes VPOP. */
18139 (((initial_insn << 7) >> 28) & 0xd) == 0x5;
18140 bfd_boolean is_db_bang = /* (DB with !). */
18141 (((initial_insn << 7) >> 28) & 0xd) == 0x9;
18142 int base_reg = ((unsigned int) initial_insn << 12) >> 28;
18143 /* d = UInt (Vd:D);. */
18144 int first_reg = ((((unsigned int) initial_insn << 16) >> 28) << 1)
18145 | (((unsigned int)initial_insn << 9) >> 31);
18146
18147 /* Compute the number of 8-words chunks needed to split. */
18148 int chunks = (num_words % 8) ? (num_words / 8 + 1) : (num_words / 8);
18149 int chunk;
18150
18151 /* The test coverage has been done assuming the following
18152 hypothesis that exactly one of the previous is_ predicates is
18153 true. */
18154 BFD_ASSERT ( (is_ia_nobang ^ is_ia_bang ^ is_db_bang)
18155 && !(is_ia_nobang & is_ia_bang & is_db_bang));
18156
18157 /* We treat the cutting of the words in one pass for all
18158 cases, then we emit the adjustments:
18159
18160 vldm rx, {...}
18161 -> vldm rx!, {8_words_or_less} for each needed 8_word
18162 -> sub rx, rx, #size (list)
18163
18164 vldm rx!, {...}
18165 -> vldm rx!, {8_words_or_less} for each needed 8_word
18166 This also handles vpop instruction (when rx is sp)
18167
18168 vldmd rx!, {...}
18169 -> vldmb rx!, {8_words_or_less} for each needed 8_word. */
18170 for (chunk = 0; chunk < chunks; ++chunk)
18171 {
18172 bfd_vma new_insn = 0;
18173
18174 if (is_ia_nobang || is_ia_bang)
18175 {
18176 new_insn = create_instruction_vldmia
18177 (base_reg,
18178 is_dp,
18179 /*wback= . */1,
18180 chunks - (chunk + 1) ?
18181 8 : num_words - chunk * 8,
18182 first_reg + chunk * 8);
18183 }
18184 else if (is_db_bang)
18185 {
18186 new_insn = create_instruction_vldmdb
18187 (base_reg,
18188 is_dp,
18189 chunks - (chunk + 1) ?
18190 8 : num_words - chunk * 8,
18191 first_reg + chunk * 8);
18192 }
18193
18194 if (new_insn)
18195 current_stub_contents =
18196 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18197 new_insn);
18198 }
18199
18200 /* Only this case requires the base register compensation
18201 subtract. */
18202 if (is_ia_nobang)
18203 {
18204 current_stub_contents =
18205 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18206 create_instruction_sub
18207 (base_reg, base_reg, 4*num_words));
18208 }
18209
18210 /* B initial_insn_addr+4. */
18211 current_stub_contents =
18212 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18213 create_instruction_branch_absolute
18214 (initial_insn_addr - current_stub_contents));
18215 }
18216
18217 /* Fill the remaining of the stub with deterministic contents. */
18218 current_stub_contents =
18219 stm32l4xx_fill_stub_udf (htab, output_bfd,
18220 base_stub_contents, current_stub_contents,
18221 base_stub_contents +
18222 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
18223 }
18224
18225 static void
18226 stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table * htab,
18227 bfd * output_bfd,
18228 const insn32 wrong_insn,
18229 const bfd_byte *const wrong_insn_addr,
18230 bfd_byte *const stub_contents)
18231 {
18232 if (is_thumb2_ldmia (wrong_insn))
18233 stm32l4xx_create_replacing_stub_ldmia (htab, output_bfd,
18234 wrong_insn, wrong_insn_addr,
18235 stub_contents);
18236 else if (is_thumb2_ldmdb (wrong_insn))
18237 stm32l4xx_create_replacing_stub_ldmdb (htab, output_bfd,
18238 wrong_insn, wrong_insn_addr,
18239 stub_contents);
18240 else if (is_thumb2_vldm (wrong_insn))
18241 stm32l4xx_create_replacing_stub_vldm (htab, output_bfd,
18242 wrong_insn, wrong_insn_addr,
18243 stub_contents);
18244 }
18245
18246 /* End of stm32l4xx work-around. */
18247
18248
18249 static void
18250 elf32_arm_add_relocation (bfd *output_bfd, struct bfd_link_info *info,
18251 asection *output_sec, Elf_Internal_Rela *rel)
18252 {
18253 BFD_ASSERT (output_sec && rel);
18254 struct bfd_elf_section_reloc_data *output_reldata;
18255 struct elf32_arm_link_hash_table *htab;
18256 struct bfd_elf_section_data *oesd = elf_section_data (output_sec);
18257 Elf_Internal_Shdr *rel_hdr;
18258
18259
18260 if (oesd->rel.hdr)
18261 {
18262 rel_hdr = oesd->rel.hdr;
18263 output_reldata = &(oesd->rel);
18264 }
18265 else if (oesd->rela.hdr)
18266 {
18267 rel_hdr = oesd->rela.hdr;
18268 output_reldata = &(oesd->rela);
18269 }
18270 else
18271 {
18272 abort ();
18273 }
18274
18275 bfd_byte *erel = rel_hdr->contents;
18276 erel += output_reldata->count * rel_hdr->sh_entsize;
18277 htab = elf32_arm_hash_table (info);
18278 SWAP_RELOC_OUT (htab) (output_bfd, rel, erel);
18279 output_reldata->count++;
18280 }
18281
18282 /* Do code byteswapping. Return FALSE afterwards so that the section is
18283 written out as normal. */
18284
18285 static bfd_boolean
18286 elf32_arm_write_section (bfd *output_bfd,
18287 struct bfd_link_info *link_info,
18288 asection *sec,
18289 bfd_byte *contents)
18290 {
18291 unsigned int mapcount, errcount;
18292 _arm_elf_section_data *arm_data;
18293 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
18294 elf32_arm_section_map *map;
18295 elf32_vfp11_erratum_list *errnode;
18296 elf32_stm32l4xx_erratum_list *stm32l4xx_errnode;
18297 bfd_vma ptr;
18298 bfd_vma end;
18299 bfd_vma offset = sec->output_section->vma + sec->output_offset;
18300 bfd_byte tmp;
18301 unsigned int i;
18302
18303 if (globals == NULL)
18304 return FALSE;
18305
18306 /* If this section has not been allocated an _arm_elf_section_data
18307 structure then we cannot record anything. */
18308 arm_data = get_arm_elf_section_data (sec);
18309 if (arm_data == NULL)
18310 return FALSE;
18311
18312 mapcount = arm_data->mapcount;
18313 map = arm_data->map;
18314 errcount = arm_data->erratumcount;
18315
18316 if (errcount != 0)
18317 {
18318 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
18319
18320 for (errnode = arm_data->erratumlist; errnode != 0;
18321 errnode = errnode->next)
18322 {
18323 bfd_vma target = errnode->vma - offset;
18324
18325 switch (errnode->type)
18326 {
18327 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
18328 {
18329 bfd_vma branch_to_veneer;
18330 /* Original condition code of instruction, plus bit mask for
18331 ARM B instruction. */
18332 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
18333 | 0x0a000000;
18334
18335 /* The instruction is before the label. */
18336 target -= 4;
18337
18338 /* Above offset included in -4 below. */
18339 branch_to_veneer = errnode->u.b.veneer->vma
18340 - errnode->vma - 4;
18341
18342 if ((signed) branch_to_veneer < -(1 << 25)
18343 || (signed) branch_to_veneer >= (1 << 25))
18344 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
18345 "range"), output_bfd);
18346
18347 insn |= (branch_to_veneer >> 2) & 0xffffff;
18348 contents[endianflip ^ target] = insn & 0xff;
18349 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
18350 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
18351 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
18352 }
18353 break;
18354
18355 case VFP11_ERRATUM_ARM_VENEER:
18356 {
18357 bfd_vma branch_from_veneer;
18358 unsigned int insn;
18359
18360 /* Take size of veneer into account. */
18361 branch_from_veneer = errnode->u.v.branch->vma
18362 - errnode->vma - 12;
18363
18364 if ((signed) branch_from_veneer < -(1 << 25)
18365 || (signed) branch_from_veneer >= (1 << 25))
18366 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
18367 "range"), output_bfd);
18368
18369 /* Original instruction. */
18370 insn = errnode->u.v.branch->u.b.vfp_insn;
18371 contents[endianflip ^ target] = insn & 0xff;
18372 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
18373 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
18374 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
18375
18376 /* Branch back to insn after original insn. */
18377 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
18378 contents[endianflip ^ (target + 4)] = insn & 0xff;
18379 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
18380 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
18381 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
18382 }
18383 break;
18384
18385 default:
18386 abort ();
18387 }
18388 }
18389 }
18390
18391 if (arm_data->stm32l4xx_erratumcount != 0)
18392 {
18393 for (stm32l4xx_errnode = arm_data->stm32l4xx_erratumlist;
18394 stm32l4xx_errnode != 0;
18395 stm32l4xx_errnode = stm32l4xx_errnode->next)
18396 {
18397 bfd_vma target = stm32l4xx_errnode->vma - offset;
18398
18399 switch (stm32l4xx_errnode->type)
18400 {
18401 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
18402 {
18403 unsigned int insn;
18404 bfd_vma branch_to_veneer =
18405 stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma;
18406
18407 if ((signed) branch_to_veneer < -(1 << 24)
18408 || (signed) branch_to_veneer >= (1 << 24))
18409 {
18410 bfd_vma out_of_range =
18411 ((signed) branch_to_veneer < -(1 << 24)) ?
18412 - branch_to_veneer - (1 << 24) :
18413 ((signed) branch_to_veneer >= (1 << 24)) ?
18414 branch_to_veneer - (1 << 24) : 0;
18415
18416 (*_bfd_error_handler)
18417 (_("%B(%#x): error: Cannot create STM32L4XX veneer. "
18418 "Jump out of range by %ld bytes. "
18419 "Cannot encode branch instruction. "),
18420 output_bfd,
18421 (long) (stm32l4xx_errnode->vma - 4),
18422 out_of_range);
18423 continue;
18424 }
18425
18426 insn = create_instruction_branch_absolute
18427 (stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma);
18428
18429 /* The instruction is before the label. */
18430 target -= 4;
18431
18432 put_thumb2_insn (globals, output_bfd,
18433 (bfd_vma) insn, contents + target);
18434 }
18435 break;
18436
18437 case STM32L4XX_ERRATUM_VENEER:
18438 {
18439 bfd_byte * veneer;
18440 bfd_byte * veneer_r;
18441 unsigned int insn;
18442
18443 veneer = contents + target;
18444 veneer_r = veneer
18445 + stm32l4xx_errnode->u.b.veneer->vma
18446 - stm32l4xx_errnode->vma - 4;
18447
18448 if ((signed) (veneer_r - veneer -
18449 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE >
18450 STM32L4XX_ERRATUM_LDM_VENEER_SIZE ?
18451 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE :
18452 STM32L4XX_ERRATUM_LDM_VENEER_SIZE) < -(1 << 24)
18453 || (signed) (veneer_r - veneer) >= (1 << 24))
18454 {
18455 (*_bfd_error_handler) (_("%B: error: Cannot create STM32L4XX "
18456 "veneer."), output_bfd);
18457 continue;
18458 }
18459
18460 /* Original instruction. */
18461 insn = stm32l4xx_errnode->u.v.branch->u.b.insn;
18462
18463 stm32l4xx_create_replacing_stub
18464 (globals, output_bfd, insn, (void*)veneer_r, (void*)veneer);
18465 }
18466 break;
18467
18468 default:
18469 abort ();
18470 }
18471 }
18472 }
18473
18474 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
18475 {
18476 arm_unwind_table_edit *edit_node
18477 = arm_data->u.exidx.unwind_edit_list;
18478 /* Now, sec->size is the size of the section we will write. The original
18479 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
18480 markers) was sec->rawsize. (This isn't the case if we perform no
18481 edits, then rawsize will be zero and we should use size). */
18482 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
18483 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
18484 unsigned int in_index, out_index;
18485 bfd_vma add_to_offsets = 0;
18486
18487 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
18488 {
18489 if (edit_node)
18490 {
18491 unsigned int edit_index = edit_node->index;
18492
18493 if (in_index < edit_index && in_index * 8 < input_size)
18494 {
18495 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
18496 contents + in_index * 8, add_to_offsets);
18497 out_index++;
18498 in_index++;
18499 }
18500 else if (in_index == edit_index
18501 || (in_index * 8 >= input_size
18502 && edit_index == UINT_MAX))
18503 {
18504 switch (edit_node->type)
18505 {
18506 case DELETE_EXIDX_ENTRY:
18507 in_index++;
18508 add_to_offsets += 8;
18509 break;
18510
18511 case INSERT_EXIDX_CANTUNWIND_AT_END:
18512 {
18513 asection *text_sec = edit_node->linked_section;
18514 bfd_vma text_offset = text_sec->output_section->vma
18515 + text_sec->output_offset
18516 + text_sec->size;
18517 bfd_vma exidx_offset = offset + out_index * 8;
18518 unsigned long prel31_offset;
18519
18520 /* Note: this is meant to be equivalent to an
18521 R_ARM_PREL31 relocation. These synthetic
18522 EXIDX_CANTUNWIND markers are not relocated by the
18523 usual BFD method. */
18524 prel31_offset = (text_offset - exidx_offset)
18525 & 0x7ffffffful;
18526 if (bfd_link_relocatable (link_info))
18527 {
18528 /* Here relocation for new EXIDX_CANTUNWIND is
18529 created, so there is no need to
18530 adjust offset by hand. */
18531 prel31_offset = text_sec->output_offset
18532 + text_sec->size;
18533
18534 /* New relocation entity. */
18535 asection *text_out = text_sec->output_section;
18536 Elf_Internal_Rela rel;
18537 rel.r_addend = 0;
18538 rel.r_offset = exidx_offset;
18539 rel.r_info = ELF32_R_INFO (text_out->target_index,
18540 R_ARM_PREL31);
18541
18542 elf32_arm_add_relocation (output_bfd, link_info,
18543 sec->output_section,
18544 &rel);
18545 }
18546
18547 /* First address we can't unwind. */
18548 bfd_put_32 (output_bfd, prel31_offset,
18549 &edited_contents[out_index * 8]);
18550
18551 /* Code for EXIDX_CANTUNWIND. */
18552 bfd_put_32 (output_bfd, 0x1,
18553 &edited_contents[out_index * 8 + 4]);
18554
18555 out_index++;
18556 add_to_offsets -= 8;
18557 }
18558 break;
18559 }
18560
18561 edit_node = edit_node->next;
18562 }
18563 }
18564 else
18565 {
18566 /* No more edits, copy remaining entries verbatim. */
18567 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
18568 contents + in_index * 8, add_to_offsets);
18569 out_index++;
18570 in_index++;
18571 }
18572 }
18573
18574 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
18575 bfd_set_section_contents (output_bfd, sec->output_section,
18576 edited_contents,
18577 (file_ptr) sec->output_offset, sec->size);
18578
18579 return TRUE;
18580 }
18581
18582 /* Fix code to point to Cortex-A8 erratum stubs. */
18583 if (globals->fix_cortex_a8)
18584 {
18585 struct a8_branch_to_stub_data data;
18586
18587 data.writing_section = sec;
18588 data.contents = contents;
18589
18590 bfd_hash_traverse (& globals->stub_hash_table, make_branch_to_a8_stub,
18591 & data);
18592 }
18593
18594 if (mapcount == 0)
18595 return FALSE;
18596
18597 if (globals->byteswap_code)
18598 {
18599 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
18600
18601 ptr = map[0].vma;
18602 for (i = 0; i < mapcount; i++)
18603 {
18604 if (i == mapcount - 1)
18605 end = sec->size;
18606 else
18607 end = map[i + 1].vma;
18608
18609 switch (map[i].type)
18610 {
18611 case 'a':
18612 /* Byte swap code words. */
18613 while (ptr + 3 < end)
18614 {
18615 tmp = contents[ptr];
18616 contents[ptr] = contents[ptr + 3];
18617 contents[ptr + 3] = tmp;
18618 tmp = contents[ptr + 1];
18619 contents[ptr + 1] = contents[ptr + 2];
18620 contents[ptr + 2] = tmp;
18621 ptr += 4;
18622 }
18623 break;
18624
18625 case 't':
18626 /* Byte swap code halfwords. */
18627 while (ptr + 1 < end)
18628 {
18629 tmp = contents[ptr];
18630 contents[ptr] = contents[ptr + 1];
18631 contents[ptr + 1] = tmp;
18632 ptr += 2;
18633 }
18634 break;
18635
18636 case 'd':
18637 /* Leave data alone. */
18638 break;
18639 }
18640 ptr = end;
18641 }
18642 }
18643
18644 free (map);
18645 arm_data->mapcount = -1;
18646 arm_data->mapsize = 0;
18647 arm_data->map = NULL;
18648
18649 return FALSE;
18650 }
18651
18652 /* Mangle thumb function symbols as we read them in. */
18653
18654 static bfd_boolean
18655 elf32_arm_swap_symbol_in (bfd * abfd,
18656 const void *psrc,
18657 const void *pshn,
18658 Elf_Internal_Sym *dst)
18659 {
18660 Elf_Internal_Shdr *symtab_hdr;
18661 const char *name = NULL;
18662
18663 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
18664 return FALSE;
18665 dst->st_target_internal = 0;
18666
18667 /* New EABI objects mark thumb function symbols by setting the low bit of
18668 the address. */
18669 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
18670 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
18671 {
18672 if (dst->st_value & 1)
18673 {
18674 dst->st_value &= ~(bfd_vma) 1;
18675 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal,
18676 ST_BRANCH_TO_THUMB);
18677 }
18678 else
18679 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_ARM);
18680 }
18681 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
18682 {
18683 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
18684 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_THUMB);
18685 }
18686 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
18687 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_LONG);
18688 else
18689 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_UNKNOWN);
18690
18691 /* Mark CMSE special symbols. */
18692 symtab_hdr = & elf_symtab_hdr (abfd);
18693 if (symtab_hdr->sh_size)
18694 name = bfd_elf_sym_name (abfd, symtab_hdr, dst, NULL);
18695 if (name && CONST_STRNEQ (name, CMSE_PREFIX))
18696 ARM_SET_SYM_CMSE_SPCL (dst->st_target_internal);
18697
18698 return TRUE;
18699 }
18700
18701
18702 /* Mangle thumb function symbols as we write them out. */
18703
18704 static void
18705 elf32_arm_swap_symbol_out (bfd *abfd,
18706 const Elf_Internal_Sym *src,
18707 void *cdst,
18708 void *shndx)
18709 {
18710 Elf_Internal_Sym newsym;
18711
18712 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
18713 of the address set, as per the new EABI. We do this unconditionally
18714 because objcopy does not set the elf header flags until after
18715 it writes out the symbol table. */
18716 if (ARM_GET_SYM_BRANCH_TYPE (src->st_target_internal) == ST_BRANCH_TO_THUMB)
18717 {
18718 newsym = *src;
18719 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
18720 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
18721 if (newsym.st_shndx != SHN_UNDEF)
18722 {
18723 /* Do this only for defined symbols. At link type, the static
18724 linker will simulate the work of dynamic linker of resolving
18725 symbols and will carry over the thumbness of found symbols to
18726 the output symbol table. It's not clear how it happens, but
18727 the thumbness of undefined symbols can well be different at
18728 runtime, and writing '1' for them will be confusing for users
18729 and possibly for dynamic linker itself.
18730 */
18731 newsym.st_value |= 1;
18732 }
18733
18734 src = &newsym;
18735 }
18736 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
18737 }
18738
18739 /* Add the PT_ARM_EXIDX program header. */
18740
18741 static bfd_boolean
18742 elf32_arm_modify_segment_map (bfd *abfd,
18743 struct bfd_link_info *info ATTRIBUTE_UNUSED)
18744 {
18745 struct elf_segment_map *m;
18746 asection *sec;
18747
18748 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
18749 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
18750 {
18751 /* If there is already a PT_ARM_EXIDX header, then we do not
18752 want to add another one. This situation arises when running
18753 "strip"; the input binary already has the header. */
18754 m = elf_seg_map (abfd);
18755 while (m && m->p_type != PT_ARM_EXIDX)
18756 m = m->next;
18757 if (!m)
18758 {
18759 m = (struct elf_segment_map *)
18760 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
18761 if (m == NULL)
18762 return FALSE;
18763 m->p_type = PT_ARM_EXIDX;
18764 m->count = 1;
18765 m->sections[0] = sec;
18766
18767 m->next = elf_seg_map (abfd);
18768 elf_seg_map (abfd) = m;
18769 }
18770 }
18771
18772 return TRUE;
18773 }
18774
18775 /* We may add a PT_ARM_EXIDX program header. */
18776
18777 static int
18778 elf32_arm_additional_program_headers (bfd *abfd,
18779 struct bfd_link_info *info ATTRIBUTE_UNUSED)
18780 {
18781 asection *sec;
18782
18783 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
18784 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
18785 return 1;
18786 else
18787 return 0;
18788 }
18789
18790 /* Hook called by the linker routine which adds symbols from an object
18791 file. */
18792
18793 static bfd_boolean
18794 elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
18795 Elf_Internal_Sym *sym, const char **namep,
18796 flagword *flagsp, asection **secp, bfd_vma *valp)
18797 {
18798 if (ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
18799 && (abfd->flags & DYNAMIC) == 0
18800 && bfd_get_flavour (info->output_bfd) == bfd_target_elf_flavour)
18801 elf_tdata (info->output_bfd)->has_gnu_symbols |= elf_gnu_symbol_ifunc;
18802
18803 if (elf32_arm_hash_table (info) == NULL)
18804 return FALSE;
18805
18806 if (elf32_arm_hash_table (info)->vxworks_p
18807 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
18808 flagsp, secp, valp))
18809 return FALSE;
18810
18811 return TRUE;
18812 }
18813
18814 /* We use this to override swap_symbol_in and swap_symbol_out. */
18815 const struct elf_size_info elf32_arm_size_info =
18816 {
18817 sizeof (Elf32_External_Ehdr),
18818 sizeof (Elf32_External_Phdr),
18819 sizeof (Elf32_External_Shdr),
18820 sizeof (Elf32_External_Rel),
18821 sizeof (Elf32_External_Rela),
18822 sizeof (Elf32_External_Sym),
18823 sizeof (Elf32_External_Dyn),
18824 sizeof (Elf_External_Note),
18825 4,
18826 1,
18827 32, 2,
18828 ELFCLASS32, EV_CURRENT,
18829 bfd_elf32_write_out_phdrs,
18830 bfd_elf32_write_shdrs_and_ehdr,
18831 bfd_elf32_checksum_contents,
18832 bfd_elf32_write_relocs,
18833 elf32_arm_swap_symbol_in,
18834 elf32_arm_swap_symbol_out,
18835 bfd_elf32_slurp_reloc_table,
18836 bfd_elf32_slurp_symbol_table,
18837 bfd_elf32_swap_dyn_in,
18838 bfd_elf32_swap_dyn_out,
18839 bfd_elf32_swap_reloc_in,
18840 bfd_elf32_swap_reloc_out,
18841 bfd_elf32_swap_reloca_in,
18842 bfd_elf32_swap_reloca_out
18843 };
18844
18845 static bfd_vma
18846 read_code32 (const bfd *abfd, const bfd_byte *addr)
18847 {
18848 /* V7 BE8 code is always little endian. */
18849 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
18850 return bfd_getl32 (addr);
18851
18852 return bfd_get_32 (abfd, addr);
18853 }
18854
18855 static bfd_vma
18856 read_code16 (const bfd *abfd, const bfd_byte *addr)
18857 {
18858 /* V7 BE8 code is always little endian. */
18859 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
18860 return bfd_getl16 (addr);
18861
18862 return bfd_get_16 (abfd, addr);
18863 }
18864
18865 /* Return size of plt0 entry starting at ADDR
18866 or (bfd_vma) -1 if size can not be determined. */
18867
18868 static bfd_vma
18869 elf32_arm_plt0_size (const bfd *abfd, const bfd_byte *addr)
18870 {
18871 bfd_vma first_word;
18872 bfd_vma plt0_size;
18873
18874 first_word = read_code32 (abfd, addr);
18875
18876 if (first_word == elf32_arm_plt0_entry[0])
18877 plt0_size = 4 * ARRAY_SIZE (elf32_arm_plt0_entry);
18878 else if (first_word == elf32_thumb2_plt0_entry[0])
18879 plt0_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
18880 else
18881 /* We don't yet handle this PLT format. */
18882 return (bfd_vma) -1;
18883
18884 return plt0_size;
18885 }
18886
18887 /* Return size of plt entry starting at offset OFFSET
18888 of plt section located at address START
18889 or (bfd_vma) -1 if size can not be determined. */
18890
18891 static bfd_vma
18892 elf32_arm_plt_size (const bfd *abfd, const bfd_byte *start, bfd_vma offset)
18893 {
18894 bfd_vma first_insn;
18895 bfd_vma plt_size = 0;
18896 const bfd_byte *addr = start + offset;
18897
18898 /* PLT entry size if fixed on Thumb-only platforms. */
18899 if (read_code32 (abfd, start) == elf32_thumb2_plt0_entry[0])
18900 return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
18901
18902 /* Respect Thumb stub if necessary. */
18903 if (read_code16 (abfd, addr) == elf32_arm_plt_thumb_stub[0])
18904 {
18905 plt_size += 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub);
18906 }
18907
18908 /* Strip immediate from first add. */
18909 first_insn = read_code32 (abfd, addr + plt_size) & 0xffffff00;
18910
18911 #ifdef FOUR_WORD_PLT
18912 if (first_insn == elf32_arm_plt_entry[0])
18913 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry);
18914 #else
18915 if (first_insn == elf32_arm_plt_entry_long[0])
18916 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_long);
18917 else if (first_insn == elf32_arm_plt_entry_short[0])
18918 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_short);
18919 #endif
18920 else
18921 /* We don't yet handle this PLT format. */
18922 return (bfd_vma) -1;
18923
18924 return plt_size;
18925 }
18926
18927 /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */
18928
18929 static long
18930 elf32_arm_get_synthetic_symtab (bfd *abfd,
18931 long symcount ATTRIBUTE_UNUSED,
18932 asymbol **syms ATTRIBUTE_UNUSED,
18933 long dynsymcount,
18934 asymbol **dynsyms,
18935 asymbol **ret)
18936 {
18937 asection *relplt;
18938 asymbol *s;
18939 arelent *p;
18940 long count, i, n;
18941 size_t size;
18942 Elf_Internal_Shdr *hdr;
18943 char *names;
18944 asection *plt;
18945 bfd_vma offset;
18946 bfd_byte *data;
18947
18948 *ret = NULL;
18949
18950 if ((abfd->flags & (DYNAMIC | EXEC_P)) == 0)
18951 return 0;
18952
18953 if (dynsymcount <= 0)
18954 return 0;
18955
18956 relplt = bfd_get_section_by_name (abfd, ".rel.plt");
18957 if (relplt == NULL)
18958 return 0;
18959
18960 hdr = &elf_section_data (relplt)->this_hdr;
18961 if (hdr->sh_link != elf_dynsymtab (abfd)
18962 || (hdr->sh_type != SHT_REL && hdr->sh_type != SHT_RELA))
18963 return 0;
18964
18965 plt = bfd_get_section_by_name (abfd, ".plt");
18966 if (plt == NULL)
18967 return 0;
18968
18969 if (!elf32_arm_size_info.slurp_reloc_table (abfd, relplt, dynsyms, TRUE))
18970 return -1;
18971
18972 data = plt->contents;
18973 if (data == NULL)
18974 {
18975 if (!bfd_get_full_section_contents(abfd, (asection *) plt, &data) || data == NULL)
18976 return -1;
18977 bfd_cache_section_contents((asection *) plt, data);
18978 }
18979
18980 count = relplt->size / hdr->sh_entsize;
18981 size = count * sizeof (asymbol);
18982 p = relplt->relocation;
18983 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
18984 {
18985 size += strlen ((*p->sym_ptr_ptr)->name) + sizeof ("@plt");
18986 if (p->addend != 0)
18987 size += sizeof ("+0x") - 1 + 8;
18988 }
18989
18990 s = *ret = (asymbol *) bfd_malloc (size);
18991 if (s == NULL)
18992 return -1;
18993
18994 offset = elf32_arm_plt0_size (abfd, data);
18995 if (offset == (bfd_vma) -1)
18996 return -1;
18997
18998 names = (char *) (s + count);
18999 p = relplt->relocation;
19000 n = 0;
19001 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
19002 {
19003 size_t len;
19004
19005 bfd_vma plt_size = elf32_arm_plt_size (abfd, data, offset);
19006 if (plt_size == (bfd_vma) -1)
19007 break;
19008
19009 *s = **p->sym_ptr_ptr;
19010 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
19011 we are defining a symbol, ensure one of them is set. */
19012 if ((s->flags & BSF_LOCAL) == 0)
19013 s->flags |= BSF_GLOBAL;
19014 s->flags |= BSF_SYNTHETIC;
19015 s->section = plt;
19016 s->value = offset;
19017 s->name = names;
19018 s->udata.p = NULL;
19019 len = strlen ((*p->sym_ptr_ptr)->name);
19020 memcpy (names, (*p->sym_ptr_ptr)->name, len);
19021 names += len;
19022 if (p->addend != 0)
19023 {
19024 char buf[30], *a;
19025
19026 memcpy (names, "+0x", sizeof ("+0x") - 1);
19027 names += sizeof ("+0x") - 1;
19028 bfd_sprintf_vma (abfd, buf, p->addend);
19029 for (a = buf; *a == '0'; ++a)
19030 ;
19031 len = strlen (a);
19032 memcpy (names, a, len);
19033 names += len;
19034 }
19035 memcpy (names, "@plt", sizeof ("@plt"));
19036 names += sizeof ("@plt");
19037 ++s, ++n;
19038 offset += plt_size;
19039 }
19040
19041 return n;
19042 }
19043
19044 static bfd_boolean
19045 elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr * hdr)
19046 {
19047 if (hdr->sh_flags & SHF_ARM_PURECODE)
19048 *flags |= SEC_ELF_PURECODE;
19049 return TRUE;
19050 }
19051
19052 static flagword
19053 elf32_arm_lookup_section_flags (char *flag_name)
19054 {
19055 if (!strcmp (flag_name, "SHF_ARM_PURECODE"))
19056 return SHF_ARM_PURECODE;
19057
19058 return SEC_NO_FLAGS;
19059 }
19060
19061 static unsigned int
19062 elf32_arm_count_additional_relocs (asection *sec)
19063 {
19064 struct _arm_elf_section_data *arm_data;
19065 arm_data = get_arm_elf_section_data (sec);
19066 return arm_data == NULL ? 0 : arm_data->additional_reloc_count;
19067 }
19068
19069 /* Called to set the sh_flags, sh_link and sh_info fields of OSECTION which
19070 has a type >= SHT_LOOS. Returns TRUE if these fields were initialised
19071 FALSE otherwise. ISECTION is the best guess matching section from the
19072 input bfd IBFD, but it might be NULL. */
19073
19074 static bfd_boolean
19075 elf32_arm_copy_special_section_fields (const bfd *ibfd ATTRIBUTE_UNUSED,
19076 bfd *obfd ATTRIBUTE_UNUSED,
19077 const Elf_Internal_Shdr *isection ATTRIBUTE_UNUSED,
19078 Elf_Internal_Shdr *osection)
19079 {
19080 switch (osection->sh_type)
19081 {
19082 case SHT_ARM_EXIDX:
19083 {
19084 Elf_Internal_Shdr **oheaders = elf_elfsections (obfd);
19085 Elf_Internal_Shdr **iheaders = elf_elfsections (ibfd);
19086 unsigned i = 0;
19087
19088 osection->sh_flags = SHF_ALLOC | SHF_LINK_ORDER;
19089 osection->sh_info = 0;
19090
19091 /* The sh_link field must be set to the text section associated with
19092 this index section. Unfortunately the ARM EHABI does not specify
19093 exactly how to determine this association. Our caller does try
19094 to match up OSECTION with its corresponding input section however
19095 so that is a good first guess. */
19096 if (isection != NULL
19097 && osection->bfd_section != NULL
19098 && isection->bfd_section != NULL
19099 && isection->bfd_section->output_section != NULL
19100 && isection->bfd_section->output_section == osection->bfd_section
19101 && iheaders != NULL
19102 && isection->sh_link > 0
19103 && isection->sh_link < elf_numsections (ibfd)
19104 && iheaders[isection->sh_link]->bfd_section != NULL
19105 && iheaders[isection->sh_link]->bfd_section->output_section != NULL
19106 )
19107 {
19108 for (i = elf_numsections (obfd); i-- > 0;)
19109 if (oheaders[i]->bfd_section
19110 == iheaders[isection->sh_link]->bfd_section->output_section)
19111 break;
19112 }
19113
19114 if (i == 0)
19115 {
19116 /* Failing that we have to find a matching section ourselves. If
19117 we had the output section name available we could compare that
19118 with input section names. Unfortunately we don't. So instead
19119 we use a simple heuristic and look for the nearest executable
19120 section before this one. */
19121 for (i = elf_numsections (obfd); i-- > 0;)
19122 if (oheaders[i] == osection)
19123 break;
19124 if (i == 0)
19125 break;
19126
19127 while (i-- > 0)
19128 if (oheaders[i]->sh_type == SHT_PROGBITS
19129 && (oheaders[i]->sh_flags & (SHF_ALLOC | SHF_EXECINSTR))
19130 == (SHF_ALLOC | SHF_EXECINSTR))
19131 break;
19132 }
19133
19134 if (i)
19135 {
19136 osection->sh_link = i;
19137 /* If the text section was part of a group
19138 then the index section should be too. */
19139 if (oheaders[i]->sh_flags & SHF_GROUP)
19140 osection->sh_flags |= SHF_GROUP;
19141 return TRUE;
19142 }
19143 }
19144 break;
19145
19146 case SHT_ARM_PREEMPTMAP:
19147 osection->sh_flags = SHF_ALLOC;
19148 break;
19149
19150 case SHT_ARM_ATTRIBUTES:
19151 case SHT_ARM_DEBUGOVERLAY:
19152 case SHT_ARM_OVERLAYSECTION:
19153 default:
19154 break;
19155 }
19156
19157 return FALSE;
19158 }
19159
19160 /* Returns TRUE if NAME is an ARM mapping symbol.
19161 Traditionally the symbols $a, $d and $t have been used.
19162 The ARM ELF standard also defines $x (for A64 code). It also allows a
19163 period initiated suffix to be added to the symbol: "$[adtx]\.[:sym_char]+".
19164 Other tools might also produce $b (Thumb BL), $f, $p, $m and $v, but we do
19165 not support them here. $t.x indicates the start of ThumbEE instructions. */
19166
19167 static bfd_boolean
19168 is_arm_mapping_symbol (const char * name)
19169 {
19170 return name != NULL /* Paranoia. */
19171 && name[0] == '$' /* Note: if objcopy --prefix-symbols has been used then
19172 the mapping symbols could have acquired a prefix.
19173 We do not support this here, since such symbols no
19174 longer conform to the ARM ELF ABI. */
19175 && (name[1] == 'a' || name[1] == 'd' || name[1] == 't' || name[1] == 'x')
19176 && (name[2] == 0 || name[2] == '.');
19177 /* FIXME: Strictly speaking the symbol is only a valid mapping symbol if
19178 any characters that follow the period are legal characters for the body
19179 of a symbol's name. For now we just assume that this is the case. */
19180 }
19181
19182 /* Make sure that mapping symbols in object files are not removed via the
19183 "strip --strip-unneeded" tool. These symbols are needed in order to
19184 correctly generate interworking veneers, and for byte swapping code
19185 regions. Once an object file has been linked, it is safe to remove the
19186 symbols as they will no longer be needed. */
19187
19188 static void
19189 elf32_arm_backend_symbol_processing (bfd *abfd, asymbol *sym)
19190 {
19191 if (((abfd->flags & (EXEC_P | DYNAMIC)) == 0)
19192 && sym->section != bfd_abs_section_ptr
19193 && is_arm_mapping_symbol (sym->name))
19194 sym->flags |= BSF_KEEP;
19195 }
19196
19197 #undef elf_backend_copy_special_section_fields
19198 #define elf_backend_copy_special_section_fields elf32_arm_copy_special_section_fields
19199
19200 #define ELF_ARCH bfd_arch_arm
19201 #define ELF_TARGET_ID ARM_ELF_DATA
19202 #define ELF_MACHINE_CODE EM_ARM
19203 #ifdef __QNXTARGET__
19204 #define ELF_MAXPAGESIZE 0x1000
19205 #else
19206 #define ELF_MAXPAGESIZE 0x10000
19207 #endif
19208 #define ELF_MINPAGESIZE 0x1000
19209 #define ELF_COMMONPAGESIZE 0x1000
19210
19211 #define bfd_elf32_mkobject elf32_arm_mkobject
19212
19213 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
19214 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
19215 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
19216 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
19217 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
19218 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
19219 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
19220 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
19221 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
19222 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
19223 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
19224 #define bfd_elf32_bfd_final_link elf32_arm_final_link
19225 #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab
19226
19227 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
19228 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
19229 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
19230 #define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
19231 #define elf_backend_check_relocs elf32_arm_check_relocs
19232 #define elf_backend_relocate_section elf32_arm_relocate_section
19233 #define elf_backend_write_section elf32_arm_write_section
19234 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
19235 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
19236 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
19237 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
19238 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
19239 #define elf_backend_always_size_sections elf32_arm_always_size_sections
19240 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
19241 #define elf_backend_post_process_headers elf32_arm_post_process_headers
19242 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
19243 #define elf_backend_object_p elf32_arm_object_p
19244 #define elf_backend_fake_sections elf32_arm_fake_sections
19245 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
19246 #define elf_backend_final_write_processing elf32_arm_final_write_processing
19247 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
19248 #define elf_backend_size_info elf32_arm_size_info
19249 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
19250 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
19251 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
19252 #define elf_backend_filter_implib_symbols elf32_arm_filter_implib_symbols
19253 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
19254 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
19255 #define elf_backend_count_additional_relocs elf32_arm_count_additional_relocs
19256 #define elf_backend_symbol_processing elf32_arm_backend_symbol_processing
19257
19258 #define elf_backend_can_refcount 1
19259 #define elf_backend_can_gc_sections 1
19260 #define elf_backend_plt_readonly 1
19261 #define elf_backend_want_got_plt 1
19262 #define elf_backend_want_plt_sym 0
19263 #define elf_backend_may_use_rel_p 1
19264 #define elf_backend_may_use_rela_p 0
19265 #define elf_backend_default_use_rela_p 0
19266
19267 #define elf_backend_got_header_size 12
19268 #define elf_backend_extern_protected_data 1
19269
19270 #undef elf_backend_obj_attrs_vendor
19271 #define elf_backend_obj_attrs_vendor "aeabi"
19272 #undef elf_backend_obj_attrs_section
19273 #define elf_backend_obj_attrs_section ".ARM.attributes"
19274 #undef elf_backend_obj_attrs_arg_type
19275 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
19276 #undef elf_backend_obj_attrs_section_type
19277 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
19278 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
19279 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
19280
19281 #undef elf_backend_section_flags
19282 #define elf_backend_section_flags elf32_arm_section_flags
19283 #undef elf_backend_lookup_section_flags_hook
19284 #define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags
19285
19286 #include "elf32-target.h"
19287
19288 /* Native Client targets. */
19289
19290 #undef TARGET_LITTLE_SYM
19291 #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec
19292 #undef TARGET_LITTLE_NAME
19293 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
19294 #undef TARGET_BIG_SYM
19295 #define TARGET_BIG_SYM arm_elf32_nacl_be_vec
19296 #undef TARGET_BIG_NAME
19297 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
19298
19299 /* Like elf32_arm_link_hash_table_create -- but overrides
19300 appropriately for NaCl. */
19301
19302 static struct bfd_link_hash_table *
19303 elf32_arm_nacl_link_hash_table_create (bfd *abfd)
19304 {
19305 struct bfd_link_hash_table *ret;
19306
19307 ret = elf32_arm_link_hash_table_create (abfd);
19308 if (ret)
19309 {
19310 struct elf32_arm_link_hash_table *htab
19311 = (struct elf32_arm_link_hash_table *) ret;
19312
19313 htab->nacl_p = 1;
19314
19315 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
19316 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
19317 }
19318 return ret;
19319 }
19320
19321 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
19322 really need to use elf32_arm_modify_segment_map. But we do it
19323 anyway just to reduce gratuitous differences with the stock ARM backend. */
19324
19325 static bfd_boolean
19326 elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
19327 {
19328 return (elf32_arm_modify_segment_map (abfd, info)
19329 && nacl_modify_segment_map (abfd, info));
19330 }
19331
19332 static void
19333 elf32_arm_nacl_final_write_processing (bfd *abfd, bfd_boolean linker)
19334 {
19335 elf32_arm_final_write_processing (abfd, linker);
19336 nacl_final_write_processing (abfd, linker);
19337 }
19338
19339 static bfd_vma
19340 elf32_arm_nacl_plt_sym_val (bfd_vma i, const asection *plt,
19341 const arelent *rel ATTRIBUTE_UNUSED)
19342 {
19343 return plt->vma
19344 + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry) +
19345 i * ARRAY_SIZE (elf32_arm_nacl_plt_entry));
19346 }
19347
19348 #undef elf32_bed
19349 #define elf32_bed elf32_arm_nacl_bed
19350 #undef bfd_elf32_bfd_link_hash_table_create
19351 #define bfd_elf32_bfd_link_hash_table_create \
19352 elf32_arm_nacl_link_hash_table_create
19353 #undef elf_backend_plt_alignment
19354 #define elf_backend_plt_alignment 4
19355 #undef elf_backend_modify_segment_map
19356 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
19357 #undef elf_backend_modify_program_headers
19358 #define elf_backend_modify_program_headers nacl_modify_program_headers
19359 #undef elf_backend_final_write_processing
19360 #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
19361 #undef bfd_elf32_get_synthetic_symtab
19362 #undef elf_backend_plt_sym_val
19363 #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
19364 #undef elf_backend_copy_special_section_fields
19365
19366 #undef ELF_MINPAGESIZE
19367 #undef ELF_COMMONPAGESIZE
19368
19369
19370 #include "elf32-target.h"
19371
19372 /* Reset to defaults. */
19373 #undef elf_backend_plt_alignment
19374 #undef elf_backend_modify_segment_map
19375 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
19376 #undef elf_backend_modify_program_headers
19377 #undef elf_backend_final_write_processing
19378 #define elf_backend_final_write_processing elf32_arm_final_write_processing
19379 #undef ELF_MINPAGESIZE
19380 #define ELF_MINPAGESIZE 0x1000
19381 #undef ELF_COMMONPAGESIZE
19382 #define ELF_COMMONPAGESIZE 0x1000
19383
19384
19385 /* VxWorks Targets. */
19386
19387 #undef TARGET_LITTLE_SYM
19388 #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec
19389 #undef TARGET_LITTLE_NAME
19390 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
19391 #undef TARGET_BIG_SYM
19392 #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec
19393 #undef TARGET_BIG_NAME
19394 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
19395
19396 /* Like elf32_arm_link_hash_table_create -- but overrides
19397 appropriately for VxWorks. */
19398
19399 static struct bfd_link_hash_table *
19400 elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
19401 {
19402 struct bfd_link_hash_table *ret;
19403
19404 ret = elf32_arm_link_hash_table_create (abfd);
19405 if (ret)
19406 {
19407 struct elf32_arm_link_hash_table *htab
19408 = (struct elf32_arm_link_hash_table *) ret;
19409 htab->use_rel = 0;
19410 htab->vxworks_p = 1;
19411 }
19412 return ret;
19413 }
19414
19415 static void
19416 elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
19417 {
19418 elf32_arm_final_write_processing (abfd, linker);
19419 elf_vxworks_final_write_processing (abfd, linker);
19420 }
19421
19422 #undef elf32_bed
19423 #define elf32_bed elf32_arm_vxworks_bed
19424
19425 #undef bfd_elf32_bfd_link_hash_table_create
19426 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
19427 #undef elf_backend_final_write_processing
19428 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
19429 #undef elf_backend_emit_relocs
19430 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
19431
19432 #undef elf_backend_may_use_rel_p
19433 #define elf_backend_may_use_rel_p 0
19434 #undef elf_backend_may_use_rela_p
19435 #define elf_backend_may_use_rela_p 1
19436 #undef elf_backend_default_use_rela_p
19437 #define elf_backend_default_use_rela_p 1
19438 #undef elf_backend_want_plt_sym
19439 #define elf_backend_want_plt_sym 1
19440 #undef ELF_MAXPAGESIZE
19441 #define ELF_MAXPAGESIZE 0x1000
19442
19443 #include "elf32-target.h"
19444
19445
19446 /* Merge backend specific data from an object file to the output
19447 object file when linking. */
19448
19449 static bfd_boolean
19450 elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
19451 {
19452 flagword out_flags;
19453 flagword in_flags;
19454 bfd_boolean flags_compatible = TRUE;
19455 asection *sec;
19456
19457 /* Check if we have the same endianness. */
19458 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
19459 return FALSE;
19460
19461 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
19462 return TRUE;
19463
19464 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
19465 return FALSE;
19466
19467 /* The input BFD must have had its flags initialised. */
19468 /* The following seems bogus to me -- The flags are initialized in
19469 the assembler but I don't think an elf_flags_init field is
19470 written into the object. */
19471 /* BFD_ASSERT (elf_flags_init (ibfd)); */
19472
19473 in_flags = elf_elfheader (ibfd)->e_flags;
19474 out_flags = elf_elfheader (obfd)->e_flags;
19475
19476 /* In theory there is no reason why we couldn't handle this. However
19477 in practice it isn't even close to working and there is no real
19478 reason to want it. */
19479 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
19480 && !(ibfd->flags & DYNAMIC)
19481 && (in_flags & EF_ARM_BE8))
19482 {
19483 _bfd_error_handler (_("error: %B is already in final BE8 format"),
19484 ibfd);
19485 return FALSE;
19486 }
19487
19488 if (!elf_flags_init (obfd))
19489 {
19490 /* If the input is the default architecture and had the default
19491 flags then do not bother setting the flags for the output
19492 architecture, instead allow future merges to do this. If no
19493 future merges ever set these flags then they will retain their
19494 uninitialised values, which surprise surprise, correspond
19495 to the default values. */
19496 if (bfd_get_arch_info (ibfd)->the_default
19497 && elf_elfheader (ibfd)->e_flags == 0)
19498 return TRUE;
19499
19500 elf_flags_init (obfd) = TRUE;
19501 elf_elfheader (obfd)->e_flags = in_flags;
19502
19503 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
19504 && bfd_get_arch_info (obfd)->the_default)
19505 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
19506
19507 return TRUE;
19508 }
19509
19510 /* Determine what should happen if the input ARM architecture
19511 does not match the output ARM architecture. */
19512 if (! bfd_arm_merge_machines (ibfd, obfd))
19513 return FALSE;
19514
19515 /* Identical flags must be compatible. */
19516 if (in_flags == out_flags)
19517 return TRUE;
19518
19519 /* Check to see if the input BFD actually contains any sections. If
19520 not, its flags may not have been initialised either, but it
19521 cannot actually cause any incompatiblity. Do not short-circuit
19522 dynamic objects; their section list may be emptied by
19523 elf_link_add_object_symbols.
19524
19525 Also check to see if there are no code sections in the input.
19526 In this case there is no need to check for code specific flags.
19527 XXX - do we need to worry about floating-point format compatability
19528 in data sections ? */
19529 if (!(ibfd->flags & DYNAMIC))
19530 {
19531 bfd_boolean null_input_bfd = TRUE;
19532 bfd_boolean only_data_sections = TRUE;
19533
19534 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
19535 {
19536 /* Ignore synthetic glue sections. */
19537 if (strcmp (sec->name, ".glue_7")
19538 && strcmp (sec->name, ".glue_7t"))
19539 {
19540 if ((bfd_get_section_flags (ibfd, sec)
19541 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
19542 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
19543 only_data_sections = FALSE;
19544
19545 null_input_bfd = FALSE;
19546 break;
19547 }
19548 }
19549
19550 if (null_input_bfd || only_data_sections)
19551 return TRUE;
19552 }
19553
19554 /* Complain about various flag mismatches. */
19555 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
19556 EF_ARM_EABI_VERSION (out_flags)))
19557 {
19558 _bfd_error_handler
19559 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
19560 ibfd, obfd,
19561 (in_flags & EF_ARM_EABIMASK) >> 24,
19562 (out_flags & EF_ARM_EABIMASK) >> 24);
19563 return FALSE;
19564 }
19565
19566 /* Not sure what needs to be checked for EABI versions >= 1. */
19567 /* VxWorks libraries do not use these flags. */
19568 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
19569 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
19570 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
19571 {
19572 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
19573 {
19574 _bfd_error_handler
19575 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
19576 ibfd, obfd,
19577 in_flags & EF_ARM_APCS_26 ? 26 : 32,
19578 out_flags & EF_ARM_APCS_26 ? 26 : 32);
19579 flags_compatible = FALSE;
19580 }
19581
19582 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
19583 {
19584 if (in_flags & EF_ARM_APCS_FLOAT)
19585 _bfd_error_handler
19586 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
19587 ibfd, obfd);
19588 else
19589 _bfd_error_handler
19590 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
19591 ibfd, obfd);
19592
19593 flags_compatible = FALSE;
19594 }
19595
19596 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
19597 {
19598 if (in_flags & EF_ARM_VFP_FLOAT)
19599 _bfd_error_handler
19600 (_("error: %B uses VFP instructions, whereas %B does not"),
19601 ibfd, obfd);
19602 else
19603 _bfd_error_handler
19604 (_("error: %B uses FPA instructions, whereas %B does not"),
19605 ibfd, obfd);
19606
19607 flags_compatible = FALSE;
19608 }
19609
19610 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
19611 {
19612 if (in_flags & EF_ARM_MAVERICK_FLOAT)
19613 _bfd_error_handler
19614 (_("error: %B uses Maverick instructions, whereas %B does not"),
19615 ibfd, obfd);
19616 else
19617 _bfd_error_handler
19618 (_("error: %B does not use Maverick instructions, whereas %B does"),
19619 ibfd, obfd);
19620
19621 flags_compatible = FALSE;
19622 }
19623
19624 #ifdef EF_ARM_SOFT_FLOAT
19625 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
19626 {
19627 /* We can allow interworking between code that is VFP format
19628 layout, and uses either soft float or integer regs for
19629 passing floating point arguments and results. We already
19630 know that the APCS_FLOAT flags match; similarly for VFP
19631 flags. */
19632 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
19633 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
19634 {
19635 if (in_flags & EF_ARM_SOFT_FLOAT)
19636 _bfd_error_handler
19637 (_("error: %B uses software FP, whereas %B uses hardware FP"),
19638 ibfd, obfd);
19639 else
19640 _bfd_error_handler
19641 (_("error: %B uses hardware FP, whereas %B uses software FP"),
19642 ibfd, obfd);
19643
19644 flags_compatible = FALSE;
19645 }
19646 }
19647 #endif
19648
19649 /* Interworking mismatch is only a warning. */
19650 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
19651 {
19652 if (in_flags & EF_ARM_INTERWORK)
19653 {
19654 _bfd_error_handler
19655 (_("Warning: %B supports interworking, whereas %B does not"),
19656 ibfd, obfd);
19657 }
19658 else
19659 {
19660 _bfd_error_handler
19661 (_("Warning: %B does not support interworking, whereas %B does"),
19662 ibfd, obfd);
19663 }
19664 }
19665 }
19666
19667 return flags_compatible;
19668 }
19669
19670
19671 /* Symbian OS Targets. */
19672
19673 #undef TARGET_LITTLE_SYM
19674 #define TARGET_LITTLE_SYM arm_elf32_symbian_le_vec
19675 #undef TARGET_LITTLE_NAME
19676 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
19677 #undef TARGET_BIG_SYM
19678 #define TARGET_BIG_SYM arm_elf32_symbian_be_vec
19679 #undef TARGET_BIG_NAME
19680 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
19681
19682 /* Like elf32_arm_link_hash_table_create -- but overrides
19683 appropriately for Symbian OS. */
19684
19685 static struct bfd_link_hash_table *
19686 elf32_arm_symbian_link_hash_table_create (bfd *abfd)
19687 {
19688 struct bfd_link_hash_table *ret;
19689
19690 ret = elf32_arm_link_hash_table_create (abfd);
19691 if (ret)
19692 {
19693 struct elf32_arm_link_hash_table *htab
19694 = (struct elf32_arm_link_hash_table *)ret;
19695 /* There is no PLT header for Symbian OS. */
19696 htab->plt_header_size = 0;
19697 /* The PLT entries are each one instruction and one word. */
19698 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
19699 htab->symbian_p = 1;
19700 /* Symbian uses armv5t or above, so use_blx is always true. */
19701 htab->use_blx = 1;
19702 htab->root.is_relocatable_executable = 1;
19703 }
19704 return ret;
19705 }
19706
19707 static const struct bfd_elf_special_section
19708 elf32_arm_symbian_special_sections[] =
19709 {
19710 /* In a BPABI executable, the dynamic linking sections do not go in
19711 the loadable read-only segment. The post-linker may wish to
19712 refer to these sections, but they are not part of the final
19713 program image. */
19714 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
19715 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
19716 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
19717 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
19718 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
19719 /* These sections do not need to be writable as the SymbianOS
19720 postlinker will arrange things so that no dynamic relocation is
19721 required. */
19722 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
19723 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
19724 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
19725 { NULL, 0, 0, 0, 0 }
19726 };
19727
19728 static void
19729 elf32_arm_symbian_begin_write_processing (bfd *abfd,
19730 struct bfd_link_info *link_info)
19731 {
19732 /* BPABI objects are never loaded directly by an OS kernel; they are
19733 processed by a postlinker first, into an OS-specific format. If
19734 the D_PAGED bit is set on the file, BFD will align segments on
19735 page boundaries, so that an OS can directly map the file. With
19736 BPABI objects, that just results in wasted space. In addition,
19737 because we clear the D_PAGED bit, map_sections_to_segments will
19738 recognize that the program headers should not be mapped into any
19739 loadable segment. */
19740 abfd->flags &= ~D_PAGED;
19741 elf32_arm_begin_write_processing (abfd, link_info);
19742 }
19743
19744 static bfd_boolean
19745 elf32_arm_symbian_modify_segment_map (bfd *abfd,
19746 struct bfd_link_info *info)
19747 {
19748 struct elf_segment_map *m;
19749 asection *dynsec;
19750
19751 /* BPABI shared libraries and executables should have a PT_DYNAMIC
19752 segment. However, because the .dynamic section is not marked
19753 with SEC_LOAD, the generic ELF code will not create such a
19754 segment. */
19755 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
19756 if (dynsec)
19757 {
19758 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
19759 if (m->p_type == PT_DYNAMIC)
19760 break;
19761
19762 if (m == NULL)
19763 {
19764 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
19765 m->next = elf_seg_map (abfd);
19766 elf_seg_map (abfd) = m;
19767 }
19768 }
19769
19770 /* Also call the generic arm routine. */
19771 return elf32_arm_modify_segment_map (abfd, info);
19772 }
19773
19774 /* Return address for Ith PLT stub in section PLT, for relocation REL
19775 or (bfd_vma) -1 if it should not be included. */
19776
19777 static bfd_vma
19778 elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
19779 const arelent *rel ATTRIBUTE_UNUSED)
19780 {
19781 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
19782 }
19783
19784 #undef elf32_bed
19785 #define elf32_bed elf32_arm_symbian_bed
19786
19787 /* The dynamic sections are not allocated on SymbianOS; the postlinker
19788 will process them and then discard them. */
19789 #undef ELF_DYNAMIC_SEC_FLAGS
19790 #define ELF_DYNAMIC_SEC_FLAGS \
19791 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
19792
19793 #undef elf_backend_emit_relocs
19794
19795 #undef bfd_elf32_bfd_link_hash_table_create
19796 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
19797 #undef elf_backend_special_sections
19798 #define elf_backend_special_sections elf32_arm_symbian_special_sections
19799 #undef elf_backend_begin_write_processing
19800 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
19801 #undef elf_backend_final_write_processing
19802 #define elf_backend_final_write_processing elf32_arm_final_write_processing
19803
19804 #undef elf_backend_modify_segment_map
19805 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
19806
19807 /* There is no .got section for BPABI objects, and hence no header. */
19808 #undef elf_backend_got_header_size
19809 #define elf_backend_got_header_size 0
19810
19811 /* Similarly, there is no .got.plt section. */
19812 #undef elf_backend_want_got_plt
19813 #define elf_backend_want_got_plt 0
19814
19815 #undef elf_backend_plt_sym_val
19816 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
19817
19818 #undef elf_backend_may_use_rel_p
19819 #define elf_backend_may_use_rel_p 1
19820 #undef elf_backend_may_use_rela_p
19821 #define elf_backend_may_use_rela_p 0
19822 #undef elf_backend_default_use_rela_p
19823 #define elf_backend_default_use_rela_p 0
19824 #undef elf_backend_want_plt_sym
19825 #define elf_backend_want_plt_sym 0
19826 #undef ELF_MAXPAGESIZE
19827 #define ELF_MAXPAGESIZE 0x8000
19828
19829 #include "elf32-target.h"
GDB Binutils - Deliverables
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