1 /* 32-bit ELF support for ARM
2 Copyright (C) 1998-2018 Free Software Foundation, Inc.
4 This file is part of BFD, the Binary File Descriptor library.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
25 #include "bfd_stdint.h"
26 #include "libiberty.h"
30 #include "elf-vxworks.h"
33 /* Return the relocation section associated with NAME. HTAB is the
34 bfd's elf32_arm_link_hash_entry. */
35 #define RELOC_SECTION(HTAB, NAME) \
36 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
38 /* Return size of a relocation entry. HTAB is the bfd's
39 elf32_arm_link_hash_entry. */
40 #define RELOC_SIZE(HTAB) \
42 ? sizeof (Elf32_External_Rel) \
43 : sizeof (Elf32_External_Rela))
45 /* Return function to swap relocations in. HTAB is the bfd's
46 elf32_arm_link_hash_entry. */
47 #define SWAP_RELOC_IN(HTAB) \
49 ? bfd_elf32_swap_reloc_in \
50 : bfd_elf32_swap_reloca_in)
52 /* Return function to swap relocations out. HTAB is the bfd's
53 elf32_arm_link_hash_entry. */
54 #define SWAP_RELOC_OUT(HTAB) \
56 ? bfd_elf32_swap_reloc_out \
57 : bfd_elf32_swap_reloca_out)
59 #define elf_info_to_howto NULL
60 #define elf_info_to_howto_rel elf32_arm_info_to_howto
62 #define ARM_ELF_ABI_VERSION 0
63 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
65 /* The Adjusted Place, as defined by AAELF. */
66 #define Pa(X) ((X) & 0xfffffffc)
68 static bfd_boolean
elf32_arm_write_section (bfd
*output_bfd
,
69 struct bfd_link_info
*link_info
,
73 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
74 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
77 static reloc_howto_type elf32_arm_howto_table_1
[] =
80 HOWTO (R_ARM_NONE
, /* type */
82 3, /* size (0 = byte, 1 = short, 2 = long) */
84 FALSE
, /* pc_relative */
86 complain_overflow_dont
,/* complain_on_overflow */
87 bfd_elf_generic_reloc
, /* special_function */
88 "R_ARM_NONE", /* name */
89 FALSE
, /* partial_inplace */
92 FALSE
), /* pcrel_offset */
94 HOWTO (R_ARM_PC24
, /* type */
96 2, /* size (0 = byte, 1 = short, 2 = long) */
98 TRUE
, /* pc_relative */
100 complain_overflow_signed
,/* complain_on_overflow */
101 bfd_elf_generic_reloc
, /* special_function */
102 "R_ARM_PC24", /* name */
103 FALSE
, /* partial_inplace */
104 0x00ffffff, /* src_mask */
105 0x00ffffff, /* dst_mask */
106 TRUE
), /* pcrel_offset */
108 /* 32 bit absolute */
109 HOWTO (R_ARM_ABS32
, /* type */
111 2, /* size (0 = byte, 1 = short, 2 = long) */
113 FALSE
, /* pc_relative */
115 complain_overflow_bitfield
,/* complain_on_overflow */
116 bfd_elf_generic_reloc
, /* special_function */
117 "R_ARM_ABS32", /* name */
118 FALSE
, /* partial_inplace */
119 0xffffffff, /* src_mask */
120 0xffffffff, /* dst_mask */
121 FALSE
), /* pcrel_offset */
123 /* standard 32bit pc-relative reloc */
124 HOWTO (R_ARM_REL32
, /* type */
126 2, /* size (0 = byte, 1 = short, 2 = long) */
128 TRUE
, /* pc_relative */
130 complain_overflow_bitfield
,/* complain_on_overflow */
131 bfd_elf_generic_reloc
, /* special_function */
132 "R_ARM_REL32", /* name */
133 FALSE
, /* partial_inplace */
134 0xffffffff, /* src_mask */
135 0xffffffff, /* dst_mask */
136 TRUE
), /* pcrel_offset */
138 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
139 HOWTO (R_ARM_LDR_PC_G0
, /* type */
141 0, /* size (0 = byte, 1 = short, 2 = long) */
143 TRUE
, /* pc_relative */
145 complain_overflow_dont
,/* complain_on_overflow */
146 bfd_elf_generic_reloc
, /* special_function */
147 "R_ARM_LDR_PC_G0", /* name */
148 FALSE
, /* partial_inplace */
149 0xffffffff, /* src_mask */
150 0xffffffff, /* dst_mask */
151 TRUE
), /* pcrel_offset */
153 /* 16 bit absolute */
154 HOWTO (R_ARM_ABS16
, /* type */
156 1, /* size (0 = byte, 1 = short, 2 = long) */
158 FALSE
, /* pc_relative */
160 complain_overflow_bitfield
,/* complain_on_overflow */
161 bfd_elf_generic_reloc
, /* special_function */
162 "R_ARM_ABS16", /* name */
163 FALSE
, /* partial_inplace */
164 0x0000ffff, /* src_mask */
165 0x0000ffff, /* dst_mask */
166 FALSE
), /* pcrel_offset */
168 /* 12 bit absolute */
169 HOWTO (R_ARM_ABS12
, /* type */
171 2, /* size (0 = byte, 1 = short, 2 = long) */
173 FALSE
, /* pc_relative */
175 complain_overflow_bitfield
,/* complain_on_overflow */
176 bfd_elf_generic_reloc
, /* special_function */
177 "R_ARM_ABS12", /* name */
178 FALSE
, /* partial_inplace */
179 0x00000fff, /* src_mask */
180 0x00000fff, /* dst_mask */
181 FALSE
), /* pcrel_offset */
183 HOWTO (R_ARM_THM_ABS5
, /* type */
185 1, /* size (0 = byte, 1 = short, 2 = long) */
187 FALSE
, /* pc_relative */
189 complain_overflow_bitfield
,/* complain_on_overflow */
190 bfd_elf_generic_reloc
, /* special_function */
191 "R_ARM_THM_ABS5", /* name */
192 FALSE
, /* partial_inplace */
193 0x000007e0, /* src_mask */
194 0x000007e0, /* dst_mask */
195 FALSE
), /* pcrel_offset */
198 HOWTO (R_ARM_ABS8
, /* type */
200 0, /* size (0 = byte, 1 = short, 2 = long) */
202 FALSE
, /* pc_relative */
204 complain_overflow_bitfield
,/* complain_on_overflow */
205 bfd_elf_generic_reloc
, /* special_function */
206 "R_ARM_ABS8", /* name */
207 FALSE
, /* partial_inplace */
208 0x000000ff, /* src_mask */
209 0x000000ff, /* dst_mask */
210 FALSE
), /* pcrel_offset */
212 HOWTO (R_ARM_SBREL32
, /* type */
214 2, /* size (0 = byte, 1 = short, 2 = long) */
216 FALSE
, /* pc_relative */
218 complain_overflow_dont
,/* complain_on_overflow */
219 bfd_elf_generic_reloc
, /* special_function */
220 "R_ARM_SBREL32", /* name */
221 FALSE
, /* partial_inplace */
222 0xffffffff, /* src_mask */
223 0xffffffff, /* dst_mask */
224 FALSE
), /* pcrel_offset */
226 HOWTO (R_ARM_THM_CALL
, /* type */
228 2, /* size (0 = byte, 1 = short, 2 = long) */
230 TRUE
, /* pc_relative */
232 complain_overflow_signed
,/* complain_on_overflow */
233 bfd_elf_generic_reloc
, /* special_function */
234 "R_ARM_THM_CALL", /* name */
235 FALSE
, /* partial_inplace */
236 0x07ff2fff, /* src_mask */
237 0x07ff2fff, /* dst_mask */
238 TRUE
), /* pcrel_offset */
240 HOWTO (R_ARM_THM_PC8
, /* type */
242 1, /* size (0 = byte, 1 = short, 2 = long) */
244 TRUE
, /* pc_relative */
246 complain_overflow_signed
,/* complain_on_overflow */
247 bfd_elf_generic_reloc
, /* special_function */
248 "R_ARM_THM_PC8", /* name */
249 FALSE
, /* partial_inplace */
250 0x000000ff, /* src_mask */
251 0x000000ff, /* dst_mask */
252 TRUE
), /* pcrel_offset */
254 HOWTO (R_ARM_BREL_ADJ
, /* type */
256 1, /* size (0 = byte, 1 = short, 2 = long) */
258 FALSE
, /* pc_relative */
260 complain_overflow_signed
,/* complain_on_overflow */
261 bfd_elf_generic_reloc
, /* special_function */
262 "R_ARM_BREL_ADJ", /* name */
263 FALSE
, /* partial_inplace */
264 0xffffffff, /* src_mask */
265 0xffffffff, /* dst_mask */
266 FALSE
), /* pcrel_offset */
268 HOWTO (R_ARM_TLS_DESC
, /* type */
270 2, /* size (0 = byte, 1 = short, 2 = long) */
272 FALSE
, /* pc_relative */
274 complain_overflow_bitfield
,/* complain_on_overflow */
275 bfd_elf_generic_reloc
, /* special_function */
276 "R_ARM_TLS_DESC", /* name */
277 FALSE
, /* partial_inplace */
278 0xffffffff, /* src_mask */
279 0xffffffff, /* dst_mask */
280 FALSE
), /* pcrel_offset */
282 HOWTO (R_ARM_THM_SWI8
, /* type */
284 0, /* size (0 = byte, 1 = short, 2 = long) */
286 FALSE
, /* pc_relative */
288 complain_overflow_signed
,/* complain_on_overflow */
289 bfd_elf_generic_reloc
, /* special_function */
290 "R_ARM_SWI8", /* name */
291 FALSE
, /* partial_inplace */
292 0x00000000, /* src_mask */
293 0x00000000, /* dst_mask */
294 FALSE
), /* pcrel_offset */
296 /* BLX instruction for the ARM. */
297 HOWTO (R_ARM_XPC25
, /* type */
299 2, /* size (0 = byte, 1 = short, 2 = long) */
301 TRUE
, /* pc_relative */
303 complain_overflow_signed
,/* complain_on_overflow */
304 bfd_elf_generic_reloc
, /* special_function */
305 "R_ARM_XPC25", /* name */
306 FALSE
, /* partial_inplace */
307 0x00ffffff, /* src_mask */
308 0x00ffffff, /* dst_mask */
309 TRUE
), /* pcrel_offset */
311 /* BLX instruction for the Thumb. */
312 HOWTO (R_ARM_THM_XPC22
, /* type */
314 2, /* size (0 = byte, 1 = short, 2 = long) */
316 TRUE
, /* pc_relative */
318 complain_overflow_signed
,/* complain_on_overflow */
319 bfd_elf_generic_reloc
, /* special_function */
320 "R_ARM_THM_XPC22", /* name */
321 FALSE
, /* partial_inplace */
322 0x07ff2fff, /* src_mask */
323 0x07ff2fff, /* dst_mask */
324 TRUE
), /* pcrel_offset */
326 /* Dynamic TLS relocations. */
328 HOWTO (R_ARM_TLS_DTPMOD32
, /* type */
330 2, /* size (0 = byte, 1 = short, 2 = long) */
332 FALSE
, /* pc_relative */
334 complain_overflow_bitfield
,/* complain_on_overflow */
335 bfd_elf_generic_reloc
, /* special_function */
336 "R_ARM_TLS_DTPMOD32", /* name */
337 TRUE
, /* partial_inplace */
338 0xffffffff, /* src_mask */
339 0xffffffff, /* dst_mask */
340 FALSE
), /* pcrel_offset */
342 HOWTO (R_ARM_TLS_DTPOFF32
, /* type */
344 2, /* size (0 = byte, 1 = short, 2 = long) */
346 FALSE
, /* pc_relative */
348 complain_overflow_bitfield
,/* complain_on_overflow */
349 bfd_elf_generic_reloc
, /* special_function */
350 "R_ARM_TLS_DTPOFF32", /* name */
351 TRUE
, /* partial_inplace */
352 0xffffffff, /* src_mask */
353 0xffffffff, /* dst_mask */
354 FALSE
), /* pcrel_offset */
356 HOWTO (R_ARM_TLS_TPOFF32
, /* type */
358 2, /* size (0 = byte, 1 = short, 2 = long) */
360 FALSE
, /* pc_relative */
362 complain_overflow_bitfield
,/* complain_on_overflow */
363 bfd_elf_generic_reloc
, /* special_function */
364 "R_ARM_TLS_TPOFF32", /* name */
365 TRUE
, /* partial_inplace */
366 0xffffffff, /* src_mask */
367 0xffffffff, /* dst_mask */
368 FALSE
), /* pcrel_offset */
370 /* Relocs used in ARM Linux */
372 HOWTO (R_ARM_COPY
, /* type */
374 2, /* size (0 = byte, 1 = short, 2 = long) */
376 FALSE
, /* pc_relative */
378 complain_overflow_bitfield
,/* complain_on_overflow */
379 bfd_elf_generic_reloc
, /* special_function */
380 "R_ARM_COPY", /* name */
381 TRUE
, /* partial_inplace */
382 0xffffffff, /* src_mask */
383 0xffffffff, /* dst_mask */
384 FALSE
), /* pcrel_offset */
386 HOWTO (R_ARM_GLOB_DAT
, /* type */
388 2, /* size (0 = byte, 1 = short, 2 = long) */
390 FALSE
, /* pc_relative */
392 complain_overflow_bitfield
,/* complain_on_overflow */
393 bfd_elf_generic_reloc
, /* special_function */
394 "R_ARM_GLOB_DAT", /* name */
395 TRUE
, /* partial_inplace */
396 0xffffffff, /* src_mask */
397 0xffffffff, /* dst_mask */
398 FALSE
), /* pcrel_offset */
400 HOWTO (R_ARM_JUMP_SLOT
, /* type */
402 2, /* size (0 = byte, 1 = short, 2 = long) */
404 FALSE
, /* pc_relative */
406 complain_overflow_bitfield
,/* complain_on_overflow */
407 bfd_elf_generic_reloc
, /* special_function */
408 "R_ARM_JUMP_SLOT", /* name */
409 TRUE
, /* partial_inplace */
410 0xffffffff, /* src_mask */
411 0xffffffff, /* dst_mask */
412 FALSE
), /* pcrel_offset */
414 HOWTO (R_ARM_RELATIVE
, /* type */
416 2, /* size (0 = byte, 1 = short, 2 = long) */
418 FALSE
, /* pc_relative */
420 complain_overflow_bitfield
,/* complain_on_overflow */
421 bfd_elf_generic_reloc
, /* special_function */
422 "R_ARM_RELATIVE", /* name */
423 TRUE
, /* partial_inplace */
424 0xffffffff, /* src_mask */
425 0xffffffff, /* dst_mask */
426 FALSE
), /* pcrel_offset */
428 HOWTO (R_ARM_GOTOFF32
, /* type */
430 2, /* size (0 = byte, 1 = short, 2 = long) */
432 FALSE
, /* pc_relative */
434 complain_overflow_bitfield
,/* complain_on_overflow */
435 bfd_elf_generic_reloc
, /* special_function */
436 "R_ARM_GOTOFF32", /* name */
437 TRUE
, /* partial_inplace */
438 0xffffffff, /* src_mask */
439 0xffffffff, /* dst_mask */
440 FALSE
), /* pcrel_offset */
442 HOWTO (R_ARM_GOTPC
, /* type */
444 2, /* size (0 = byte, 1 = short, 2 = long) */
446 TRUE
, /* pc_relative */
448 complain_overflow_bitfield
,/* complain_on_overflow */
449 bfd_elf_generic_reloc
, /* special_function */
450 "R_ARM_GOTPC", /* name */
451 TRUE
, /* partial_inplace */
452 0xffffffff, /* src_mask */
453 0xffffffff, /* dst_mask */
454 TRUE
), /* pcrel_offset */
456 HOWTO (R_ARM_GOT32
, /* type */
458 2, /* size (0 = byte, 1 = short, 2 = long) */
460 FALSE
, /* pc_relative */
462 complain_overflow_bitfield
,/* complain_on_overflow */
463 bfd_elf_generic_reloc
, /* special_function */
464 "R_ARM_GOT32", /* name */
465 TRUE
, /* partial_inplace */
466 0xffffffff, /* src_mask */
467 0xffffffff, /* dst_mask */
468 FALSE
), /* pcrel_offset */
470 HOWTO (R_ARM_PLT32
, /* type */
472 2, /* size (0 = byte, 1 = short, 2 = long) */
474 TRUE
, /* pc_relative */
476 complain_overflow_bitfield
,/* complain_on_overflow */
477 bfd_elf_generic_reloc
, /* special_function */
478 "R_ARM_PLT32", /* name */
479 FALSE
, /* partial_inplace */
480 0x00ffffff, /* src_mask */
481 0x00ffffff, /* dst_mask */
482 TRUE
), /* pcrel_offset */
484 HOWTO (R_ARM_CALL
, /* type */
486 2, /* size (0 = byte, 1 = short, 2 = long) */
488 TRUE
, /* pc_relative */
490 complain_overflow_signed
,/* complain_on_overflow */
491 bfd_elf_generic_reloc
, /* special_function */
492 "R_ARM_CALL", /* name */
493 FALSE
, /* partial_inplace */
494 0x00ffffff, /* src_mask */
495 0x00ffffff, /* dst_mask */
496 TRUE
), /* pcrel_offset */
498 HOWTO (R_ARM_JUMP24
, /* type */
500 2, /* size (0 = byte, 1 = short, 2 = long) */
502 TRUE
, /* pc_relative */
504 complain_overflow_signed
,/* complain_on_overflow */
505 bfd_elf_generic_reloc
, /* special_function */
506 "R_ARM_JUMP24", /* name */
507 FALSE
, /* partial_inplace */
508 0x00ffffff, /* src_mask */
509 0x00ffffff, /* dst_mask */
510 TRUE
), /* pcrel_offset */
512 HOWTO (R_ARM_THM_JUMP24
, /* type */
514 2, /* size (0 = byte, 1 = short, 2 = long) */
516 TRUE
, /* pc_relative */
518 complain_overflow_signed
,/* complain_on_overflow */
519 bfd_elf_generic_reloc
, /* special_function */
520 "R_ARM_THM_JUMP24", /* name */
521 FALSE
, /* partial_inplace */
522 0x07ff2fff, /* src_mask */
523 0x07ff2fff, /* dst_mask */
524 TRUE
), /* pcrel_offset */
526 HOWTO (R_ARM_BASE_ABS
, /* type */
528 2, /* size (0 = byte, 1 = short, 2 = long) */
530 FALSE
, /* pc_relative */
532 complain_overflow_dont
,/* complain_on_overflow */
533 bfd_elf_generic_reloc
, /* special_function */
534 "R_ARM_BASE_ABS", /* name */
535 FALSE
, /* partial_inplace */
536 0xffffffff, /* src_mask */
537 0xffffffff, /* dst_mask */
538 FALSE
), /* pcrel_offset */
540 HOWTO (R_ARM_ALU_PCREL7_0
, /* type */
542 2, /* size (0 = byte, 1 = short, 2 = long) */
544 TRUE
, /* pc_relative */
546 complain_overflow_dont
,/* complain_on_overflow */
547 bfd_elf_generic_reloc
, /* special_function */
548 "R_ARM_ALU_PCREL_7_0", /* name */
549 FALSE
, /* partial_inplace */
550 0x00000fff, /* src_mask */
551 0x00000fff, /* dst_mask */
552 TRUE
), /* pcrel_offset */
554 HOWTO (R_ARM_ALU_PCREL15_8
, /* type */
556 2, /* size (0 = byte, 1 = short, 2 = long) */
558 TRUE
, /* pc_relative */
560 complain_overflow_dont
,/* complain_on_overflow */
561 bfd_elf_generic_reloc
, /* special_function */
562 "R_ARM_ALU_PCREL_15_8",/* name */
563 FALSE
, /* partial_inplace */
564 0x00000fff, /* src_mask */
565 0x00000fff, /* dst_mask */
566 TRUE
), /* pcrel_offset */
568 HOWTO (R_ARM_ALU_PCREL23_15
, /* type */
570 2, /* size (0 = byte, 1 = short, 2 = long) */
572 TRUE
, /* pc_relative */
574 complain_overflow_dont
,/* complain_on_overflow */
575 bfd_elf_generic_reloc
, /* special_function */
576 "R_ARM_ALU_PCREL_23_15",/* name */
577 FALSE
, /* partial_inplace */
578 0x00000fff, /* src_mask */
579 0x00000fff, /* dst_mask */
580 TRUE
), /* pcrel_offset */
582 HOWTO (R_ARM_LDR_SBREL_11_0
, /* type */
584 2, /* size (0 = byte, 1 = short, 2 = long) */
586 FALSE
, /* pc_relative */
588 complain_overflow_dont
,/* complain_on_overflow */
589 bfd_elf_generic_reloc
, /* special_function */
590 "R_ARM_LDR_SBREL_11_0",/* name */
591 FALSE
, /* partial_inplace */
592 0x00000fff, /* src_mask */
593 0x00000fff, /* dst_mask */
594 FALSE
), /* pcrel_offset */
596 HOWTO (R_ARM_ALU_SBREL_19_12
, /* type */
598 2, /* size (0 = byte, 1 = short, 2 = long) */
600 FALSE
, /* pc_relative */
602 complain_overflow_dont
,/* complain_on_overflow */
603 bfd_elf_generic_reloc
, /* special_function */
604 "R_ARM_ALU_SBREL_19_12",/* name */
605 FALSE
, /* partial_inplace */
606 0x000ff000, /* src_mask */
607 0x000ff000, /* dst_mask */
608 FALSE
), /* pcrel_offset */
610 HOWTO (R_ARM_ALU_SBREL_27_20
, /* type */
612 2, /* size (0 = byte, 1 = short, 2 = long) */
614 FALSE
, /* pc_relative */
616 complain_overflow_dont
,/* complain_on_overflow */
617 bfd_elf_generic_reloc
, /* special_function */
618 "R_ARM_ALU_SBREL_27_20",/* name */
619 FALSE
, /* partial_inplace */
620 0x0ff00000, /* src_mask */
621 0x0ff00000, /* dst_mask */
622 FALSE
), /* pcrel_offset */
624 HOWTO (R_ARM_TARGET1
, /* type */
626 2, /* size (0 = byte, 1 = short, 2 = long) */
628 FALSE
, /* pc_relative */
630 complain_overflow_dont
,/* complain_on_overflow */
631 bfd_elf_generic_reloc
, /* special_function */
632 "R_ARM_TARGET1", /* name */
633 FALSE
, /* partial_inplace */
634 0xffffffff, /* src_mask */
635 0xffffffff, /* dst_mask */
636 FALSE
), /* pcrel_offset */
638 HOWTO (R_ARM_ROSEGREL32
, /* type */
640 2, /* size (0 = byte, 1 = short, 2 = long) */
642 FALSE
, /* pc_relative */
644 complain_overflow_dont
,/* complain_on_overflow */
645 bfd_elf_generic_reloc
, /* special_function */
646 "R_ARM_ROSEGREL32", /* name */
647 FALSE
, /* partial_inplace */
648 0xffffffff, /* src_mask */
649 0xffffffff, /* dst_mask */
650 FALSE
), /* pcrel_offset */
652 HOWTO (R_ARM_V4BX
, /* type */
654 2, /* size (0 = byte, 1 = short, 2 = long) */
656 FALSE
, /* pc_relative */
658 complain_overflow_dont
,/* complain_on_overflow */
659 bfd_elf_generic_reloc
, /* special_function */
660 "R_ARM_V4BX", /* name */
661 FALSE
, /* partial_inplace */
662 0xffffffff, /* src_mask */
663 0xffffffff, /* dst_mask */
664 FALSE
), /* pcrel_offset */
666 HOWTO (R_ARM_TARGET2
, /* type */
668 2, /* size (0 = byte, 1 = short, 2 = long) */
670 FALSE
, /* pc_relative */
672 complain_overflow_signed
,/* complain_on_overflow */
673 bfd_elf_generic_reloc
, /* special_function */
674 "R_ARM_TARGET2", /* name */
675 FALSE
, /* partial_inplace */
676 0xffffffff, /* src_mask */
677 0xffffffff, /* dst_mask */
678 TRUE
), /* pcrel_offset */
680 HOWTO (R_ARM_PREL31
, /* type */
682 2, /* size (0 = byte, 1 = short, 2 = long) */
684 TRUE
, /* pc_relative */
686 complain_overflow_signed
,/* complain_on_overflow */
687 bfd_elf_generic_reloc
, /* special_function */
688 "R_ARM_PREL31", /* name */
689 FALSE
, /* partial_inplace */
690 0x7fffffff, /* src_mask */
691 0x7fffffff, /* dst_mask */
692 TRUE
), /* pcrel_offset */
694 HOWTO (R_ARM_MOVW_ABS_NC
, /* type */
696 2, /* size (0 = byte, 1 = short, 2 = long) */
698 FALSE
, /* pc_relative */
700 complain_overflow_dont
,/* complain_on_overflow */
701 bfd_elf_generic_reloc
, /* special_function */
702 "R_ARM_MOVW_ABS_NC", /* name */
703 FALSE
, /* partial_inplace */
704 0x000f0fff, /* src_mask */
705 0x000f0fff, /* dst_mask */
706 FALSE
), /* pcrel_offset */
708 HOWTO (R_ARM_MOVT_ABS
, /* type */
710 2, /* size (0 = byte, 1 = short, 2 = long) */
712 FALSE
, /* pc_relative */
714 complain_overflow_bitfield
,/* complain_on_overflow */
715 bfd_elf_generic_reloc
, /* special_function */
716 "R_ARM_MOVT_ABS", /* name */
717 FALSE
, /* partial_inplace */
718 0x000f0fff, /* src_mask */
719 0x000f0fff, /* dst_mask */
720 FALSE
), /* pcrel_offset */
722 HOWTO (R_ARM_MOVW_PREL_NC
, /* type */
724 2, /* size (0 = byte, 1 = short, 2 = long) */
726 TRUE
, /* pc_relative */
728 complain_overflow_dont
,/* complain_on_overflow */
729 bfd_elf_generic_reloc
, /* special_function */
730 "R_ARM_MOVW_PREL_NC", /* name */
731 FALSE
, /* partial_inplace */
732 0x000f0fff, /* src_mask */
733 0x000f0fff, /* dst_mask */
734 TRUE
), /* pcrel_offset */
736 HOWTO (R_ARM_MOVT_PREL
, /* type */
738 2, /* size (0 = byte, 1 = short, 2 = long) */
740 TRUE
, /* pc_relative */
742 complain_overflow_bitfield
,/* complain_on_overflow */
743 bfd_elf_generic_reloc
, /* special_function */
744 "R_ARM_MOVT_PREL", /* name */
745 FALSE
, /* partial_inplace */
746 0x000f0fff, /* src_mask */
747 0x000f0fff, /* dst_mask */
748 TRUE
), /* pcrel_offset */
750 HOWTO (R_ARM_THM_MOVW_ABS_NC
, /* type */
752 2, /* size (0 = byte, 1 = short, 2 = long) */
754 FALSE
, /* pc_relative */
756 complain_overflow_dont
,/* complain_on_overflow */
757 bfd_elf_generic_reloc
, /* special_function */
758 "R_ARM_THM_MOVW_ABS_NC",/* name */
759 FALSE
, /* partial_inplace */
760 0x040f70ff, /* src_mask */
761 0x040f70ff, /* dst_mask */
762 FALSE
), /* pcrel_offset */
764 HOWTO (R_ARM_THM_MOVT_ABS
, /* type */
766 2, /* size (0 = byte, 1 = short, 2 = long) */
768 FALSE
, /* pc_relative */
770 complain_overflow_bitfield
,/* complain_on_overflow */
771 bfd_elf_generic_reloc
, /* special_function */
772 "R_ARM_THM_MOVT_ABS", /* name */
773 FALSE
, /* partial_inplace */
774 0x040f70ff, /* src_mask */
775 0x040f70ff, /* dst_mask */
776 FALSE
), /* pcrel_offset */
778 HOWTO (R_ARM_THM_MOVW_PREL_NC
,/* type */
780 2, /* size (0 = byte, 1 = short, 2 = long) */
782 TRUE
, /* pc_relative */
784 complain_overflow_dont
,/* complain_on_overflow */
785 bfd_elf_generic_reloc
, /* special_function */
786 "R_ARM_THM_MOVW_PREL_NC",/* name */
787 FALSE
, /* partial_inplace */
788 0x040f70ff, /* src_mask */
789 0x040f70ff, /* dst_mask */
790 TRUE
), /* pcrel_offset */
792 HOWTO (R_ARM_THM_MOVT_PREL
, /* type */
794 2, /* size (0 = byte, 1 = short, 2 = long) */
796 TRUE
, /* pc_relative */
798 complain_overflow_bitfield
,/* complain_on_overflow */
799 bfd_elf_generic_reloc
, /* special_function */
800 "R_ARM_THM_MOVT_PREL", /* name */
801 FALSE
, /* partial_inplace */
802 0x040f70ff, /* src_mask */
803 0x040f70ff, /* dst_mask */
804 TRUE
), /* pcrel_offset */
806 HOWTO (R_ARM_THM_JUMP19
, /* type */
808 2, /* size (0 = byte, 1 = short, 2 = long) */
810 TRUE
, /* pc_relative */
812 complain_overflow_signed
,/* complain_on_overflow */
813 bfd_elf_generic_reloc
, /* special_function */
814 "R_ARM_THM_JUMP19", /* name */
815 FALSE
, /* partial_inplace */
816 0x043f2fff, /* src_mask */
817 0x043f2fff, /* dst_mask */
818 TRUE
), /* pcrel_offset */
820 HOWTO (R_ARM_THM_JUMP6
, /* type */
822 1, /* size (0 = byte, 1 = short, 2 = long) */
824 TRUE
, /* pc_relative */
826 complain_overflow_unsigned
,/* complain_on_overflow */
827 bfd_elf_generic_reloc
, /* special_function */
828 "R_ARM_THM_JUMP6", /* name */
829 FALSE
, /* partial_inplace */
830 0x02f8, /* src_mask */
831 0x02f8, /* dst_mask */
832 TRUE
), /* pcrel_offset */
834 /* These are declared as 13-bit signed relocations because we can
835 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
837 HOWTO (R_ARM_THM_ALU_PREL_11_0
,/* type */
839 2, /* size (0 = byte, 1 = short, 2 = long) */
841 TRUE
, /* pc_relative */
843 complain_overflow_dont
,/* complain_on_overflow */
844 bfd_elf_generic_reloc
, /* special_function */
845 "R_ARM_THM_ALU_PREL_11_0",/* name */
846 FALSE
, /* partial_inplace */
847 0xffffffff, /* src_mask */
848 0xffffffff, /* dst_mask */
849 TRUE
), /* pcrel_offset */
851 HOWTO (R_ARM_THM_PC12
, /* type */
853 2, /* size (0 = byte, 1 = short, 2 = long) */
855 TRUE
, /* pc_relative */
857 complain_overflow_dont
,/* complain_on_overflow */
858 bfd_elf_generic_reloc
, /* special_function */
859 "R_ARM_THM_PC12", /* name */
860 FALSE
, /* partial_inplace */
861 0xffffffff, /* src_mask */
862 0xffffffff, /* dst_mask */
863 TRUE
), /* pcrel_offset */
865 HOWTO (R_ARM_ABS32_NOI
, /* type */
867 2, /* size (0 = byte, 1 = short, 2 = long) */
869 FALSE
, /* pc_relative */
871 complain_overflow_dont
,/* complain_on_overflow */
872 bfd_elf_generic_reloc
, /* special_function */
873 "R_ARM_ABS32_NOI", /* name */
874 FALSE
, /* partial_inplace */
875 0xffffffff, /* src_mask */
876 0xffffffff, /* dst_mask */
877 FALSE
), /* pcrel_offset */
879 HOWTO (R_ARM_REL32_NOI
, /* type */
881 2, /* size (0 = byte, 1 = short, 2 = long) */
883 TRUE
, /* pc_relative */
885 complain_overflow_dont
,/* complain_on_overflow */
886 bfd_elf_generic_reloc
, /* special_function */
887 "R_ARM_REL32_NOI", /* name */
888 FALSE
, /* partial_inplace */
889 0xffffffff, /* src_mask */
890 0xffffffff, /* dst_mask */
891 FALSE
), /* pcrel_offset */
893 /* Group relocations. */
895 HOWTO (R_ARM_ALU_PC_G0_NC
, /* type */
897 2, /* size (0 = byte, 1 = short, 2 = long) */
899 TRUE
, /* pc_relative */
901 complain_overflow_dont
,/* complain_on_overflow */
902 bfd_elf_generic_reloc
, /* special_function */
903 "R_ARM_ALU_PC_G0_NC", /* name */
904 FALSE
, /* partial_inplace */
905 0xffffffff, /* src_mask */
906 0xffffffff, /* dst_mask */
907 TRUE
), /* pcrel_offset */
909 HOWTO (R_ARM_ALU_PC_G0
, /* type */
911 2, /* size (0 = byte, 1 = short, 2 = long) */
913 TRUE
, /* pc_relative */
915 complain_overflow_dont
,/* complain_on_overflow */
916 bfd_elf_generic_reloc
, /* special_function */
917 "R_ARM_ALU_PC_G0", /* name */
918 FALSE
, /* partial_inplace */
919 0xffffffff, /* src_mask */
920 0xffffffff, /* dst_mask */
921 TRUE
), /* pcrel_offset */
923 HOWTO (R_ARM_ALU_PC_G1_NC
, /* type */
925 2, /* size (0 = byte, 1 = short, 2 = long) */
927 TRUE
, /* pc_relative */
929 complain_overflow_dont
,/* complain_on_overflow */
930 bfd_elf_generic_reloc
, /* special_function */
931 "R_ARM_ALU_PC_G1_NC", /* name */
932 FALSE
, /* partial_inplace */
933 0xffffffff, /* src_mask */
934 0xffffffff, /* dst_mask */
935 TRUE
), /* pcrel_offset */
937 HOWTO (R_ARM_ALU_PC_G1
, /* type */
939 2, /* size (0 = byte, 1 = short, 2 = long) */
941 TRUE
, /* pc_relative */
943 complain_overflow_dont
,/* complain_on_overflow */
944 bfd_elf_generic_reloc
, /* special_function */
945 "R_ARM_ALU_PC_G1", /* name */
946 FALSE
, /* partial_inplace */
947 0xffffffff, /* src_mask */
948 0xffffffff, /* dst_mask */
949 TRUE
), /* pcrel_offset */
951 HOWTO (R_ARM_ALU_PC_G2
, /* type */
953 2, /* size (0 = byte, 1 = short, 2 = long) */
955 TRUE
, /* pc_relative */
957 complain_overflow_dont
,/* complain_on_overflow */
958 bfd_elf_generic_reloc
, /* special_function */
959 "R_ARM_ALU_PC_G2", /* name */
960 FALSE
, /* partial_inplace */
961 0xffffffff, /* src_mask */
962 0xffffffff, /* dst_mask */
963 TRUE
), /* pcrel_offset */
965 HOWTO (R_ARM_LDR_PC_G1
, /* type */
967 2, /* size (0 = byte, 1 = short, 2 = long) */
969 TRUE
, /* pc_relative */
971 complain_overflow_dont
,/* complain_on_overflow */
972 bfd_elf_generic_reloc
, /* special_function */
973 "R_ARM_LDR_PC_G1", /* name */
974 FALSE
, /* partial_inplace */
975 0xffffffff, /* src_mask */
976 0xffffffff, /* dst_mask */
977 TRUE
), /* pcrel_offset */
979 HOWTO (R_ARM_LDR_PC_G2
, /* type */
981 2, /* size (0 = byte, 1 = short, 2 = long) */
983 TRUE
, /* pc_relative */
985 complain_overflow_dont
,/* complain_on_overflow */
986 bfd_elf_generic_reloc
, /* special_function */
987 "R_ARM_LDR_PC_G2", /* name */
988 FALSE
, /* partial_inplace */
989 0xffffffff, /* src_mask */
990 0xffffffff, /* dst_mask */
991 TRUE
), /* pcrel_offset */
993 HOWTO (R_ARM_LDRS_PC_G0
, /* type */
995 2, /* size (0 = byte, 1 = short, 2 = long) */
997 TRUE
, /* pc_relative */
999 complain_overflow_dont
,/* complain_on_overflow */
1000 bfd_elf_generic_reloc
, /* special_function */
1001 "R_ARM_LDRS_PC_G0", /* name */
1002 FALSE
, /* partial_inplace */
1003 0xffffffff, /* src_mask */
1004 0xffffffff, /* dst_mask */
1005 TRUE
), /* pcrel_offset */
1007 HOWTO (R_ARM_LDRS_PC_G1
, /* type */
1009 2, /* size (0 = byte, 1 = short, 2 = long) */
1011 TRUE
, /* pc_relative */
1013 complain_overflow_dont
,/* complain_on_overflow */
1014 bfd_elf_generic_reloc
, /* special_function */
1015 "R_ARM_LDRS_PC_G1", /* name */
1016 FALSE
, /* partial_inplace */
1017 0xffffffff, /* src_mask */
1018 0xffffffff, /* dst_mask */
1019 TRUE
), /* pcrel_offset */
1021 HOWTO (R_ARM_LDRS_PC_G2
, /* type */
1023 2, /* size (0 = byte, 1 = short, 2 = long) */
1025 TRUE
, /* pc_relative */
1027 complain_overflow_dont
,/* complain_on_overflow */
1028 bfd_elf_generic_reloc
, /* special_function */
1029 "R_ARM_LDRS_PC_G2", /* name */
1030 FALSE
, /* partial_inplace */
1031 0xffffffff, /* src_mask */
1032 0xffffffff, /* dst_mask */
1033 TRUE
), /* pcrel_offset */
1035 HOWTO (R_ARM_LDC_PC_G0
, /* type */
1037 2, /* size (0 = byte, 1 = short, 2 = long) */
1039 TRUE
, /* pc_relative */
1041 complain_overflow_dont
,/* complain_on_overflow */
1042 bfd_elf_generic_reloc
, /* special_function */
1043 "R_ARM_LDC_PC_G0", /* name */
1044 FALSE
, /* partial_inplace */
1045 0xffffffff, /* src_mask */
1046 0xffffffff, /* dst_mask */
1047 TRUE
), /* pcrel_offset */
1049 HOWTO (R_ARM_LDC_PC_G1
, /* type */
1051 2, /* size (0 = byte, 1 = short, 2 = long) */
1053 TRUE
, /* pc_relative */
1055 complain_overflow_dont
,/* complain_on_overflow */
1056 bfd_elf_generic_reloc
, /* special_function */
1057 "R_ARM_LDC_PC_G1", /* name */
1058 FALSE
, /* partial_inplace */
1059 0xffffffff, /* src_mask */
1060 0xffffffff, /* dst_mask */
1061 TRUE
), /* pcrel_offset */
1063 HOWTO (R_ARM_LDC_PC_G2
, /* type */
1065 2, /* size (0 = byte, 1 = short, 2 = long) */
1067 TRUE
, /* pc_relative */
1069 complain_overflow_dont
,/* complain_on_overflow */
1070 bfd_elf_generic_reloc
, /* special_function */
1071 "R_ARM_LDC_PC_G2", /* name */
1072 FALSE
, /* partial_inplace */
1073 0xffffffff, /* src_mask */
1074 0xffffffff, /* dst_mask */
1075 TRUE
), /* pcrel_offset */
1077 HOWTO (R_ARM_ALU_SB_G0_NC
, /* type */
1079 2, /* size (0 = byte, 1 = short, 2 = long) */
1081 TRUE
, /* pc_relative */
1083 complain_overflow_dont
,/* complain_on_overflow */
1084 bfd_elf_generic_reloc
, /* special_function */
1085 "R_ARM_ALU_SB_G0_NC", /* name */
1086 FALSE
, /* partial_inplace */
1087 0xffffffff, /* src_mask */
1088 0xffffffff, /* dst_mask */
1089 TRUE
), /* pcrel_offset */
1091 HOWTO (R_ARM_ALU_SB_G0
, /* type */
1093 2, /* size (0 = byte, 1 = short, 2 = long) */
1095 TRUE
, /* pc_relative */
1097 complain_overflow_dont
,/* complain_on_overflow */
1098 bfd_elf_generic_reloc
, /* special_function */
1099 "R_ARM_ALU_SB_G0", /* name */
1100 FALSE
, /* partial_inplace */
1101 0xffffffff, /* src_mask */
1102 0xffffffff, /* dst_mask */
1103 TRUE
), /* pcrel_offset */
1105 HOWTO (R_ARM_ALU_SB_G1_NC
, /* type */
1107 2, /* size (0 = byte, 1 = short, 2 = long) */
1109 TRUE
, /* pc_relative */
1111 complain_overflow_dont
,/* complain_on_overflow */
1112 bfd_elf_generic_reloc
, /* special_function */
1113 "R_ARM_ALU_SB_G1_NC", /* name */
1114 FALSE
, /* partial_inplace */
1115 0xffffffff, /* src_mask */
1116 0xffffffff, /* dst_mask */
1117 TRUE
), /* pcrel_offset */
1119 HOWTO (R_ARM_ALU_SB_G1
, /* type */
1121 2, /* size (0 = byte, 1 = short, 2 = long) */
1123 TRUE
, /* pc_relative */
1125 complain_overflow_dont
,/* complain_on_overflow */
1126 bfd_elf_generic_reloc
, /* special_function */
1127 "R_ARM_ALU_SB_G1", /* name */
1128 FALSE
, /* partial_inplace */
1129 0xffffffff, /* src_mask */
1130 0xffffffff, /* dst_mask */
1131 TRUE
), /* pcrel_offset */
1133 HOWTO (R_ARM_ALU_SB_G2
, /* type */
1135 2, /* size (0 = byte, 1 = short, 2 = long) */
1137 TRUE
, /* pc_relative */
1139 complain_overflow_dont
,/* complain_on_overflow */
1140 bfd_elf_generic_reloc
, /* special_function */
1141 "R_ARM_ALU_SB_G2", /* name */
1142 FALSE
, /* partial_inplace */
1143 0xffffffff, /* src_mask */
1144 0xffffffff, /* dst_mask */
1145 TRUE
), /* pcrel_offset */
1147 HOWTO (R_ARM_LDR_SB_G0
, /* type */
1149 2, /* size (0 = byte, 1 = short, 2 = long) */
1151 TRUE
, /* pc_relative */
1153 complain_overflow_dont
,/* complain_on_overflow */
1154 bfd_elf_generic_reloc
, /* special_function */
1155 "R_ARM_LDR_SB_G0", /* name */
1156 FALSE
, /* partial_inplace */
1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
1159 TRUE
), /* pcrel_offset */
1161 HOWTO (R_ARM_LDR_SB_G1
, /* type */
1163 2, /* size (0 = byte, 1 = short, 2 = long) */
1165 TRUE
, /* pc_relative */
1167 complain_overflow_dont
,/* complain_on_overflow */
1168 bfd_elf_generic_reloc
, /* special_function */
1169 "R_ARM_LDR_SB_G1", /* name */
1170 FALSE
, /* partial_inplace */
1171 0xffffffff, /* src_mask */
1172 0xffffffff, /* dst_mask */
1173 TRUE
), /* pcrel_offset */
1175 HOWTO (R_ARM_LDR_SB_G2
, /* type */
1177 2, /* size (0 = byte, 1 = short, 2 = long) */
1179 TRUE
, /* pc_relative */
1181 complain_overflow_dont
,/* complain_on_overflow */
1182 bfd_elf_generic_reloc
, /* special_function */
1183 "R_ARM_LDR_SB_G2", /* name */
1184 FALSE
, /* partial_inplace */
1185 0xffffffff, /* src_mask */
1186 0xffffffff, /* dst_mask */
1187 TRUE
), /* pcrel_offset */
1189 HOWTO (R_ARM_LDRS_SB_G0
, /* type */
1191 2, /* size (0 = byte, 1 = short, 2 = long) */
1193 TRUE
, /* pc_relative */
1195 complain_overflow_dont
,/* complain_on_overflow */
1196 bfd_elf_generic_reloc
, /* special_function */
1197 "R_ARM_LDRS_SB_G0", /* name */
1198 FALSE
, /* partial_inplace */
1199 0xffffffff, /* src_mask */
1200 0xffffffff, /* dst_mask */
1201 TRUE
), /* pcrel_offset */
1203 HOWTO (R_ARM_LDRS_SB_G1
, /* type */
1205 2, /* size (0 = byte, 1 = short, 2 = long) */
1207 TRUE
, /* pc_relative */
1209 complain_overflow_dont
,/* complain_on_overflow */
1210 bfd_elf_generic_reloc
, /* special_function */
1211 "R_ARM_LDRS_SB_G1", /* name */
1212 FALSE
, /* partial_inplace */
1213 0xffffffff, /* src_mask */
1214 0xffffffff, /* dst_mask */
1215 TRUE
), /* pcrel_offset */
1217 HOWTO (R_ARM_LDRS_SB_G2
, /* type */
1219 2, /* size (0 = byte, 1 = short, 2 = long) */
1221 TRUE
, /* pc_relative */
1223 complain_overflow_dont
,/* complain_on_overflow */
1224 bfd_elf_generic_reloc
, /* special_function */
1225 "R_ARM_LDRS_SB_G2", /* name */
1226 FALSE
, /* partial_inplace */
1227 0xffffffff, /* src_mask */
1228 0xffffffff, /* dst_mask */
1229 TRUE
), /* pcrel_offset */
1231 HOWTO (R_ARM_LDC_SB_G0
, /* type */
1233 2, /* size (0 = byte, 1 = short, 2 = long) */
1235 TRUE
, /* pc_relative */
1237 complain_overflow_dont
,/* complain_on_overflow */
1238 bfd_elf_generic_reloc
, /* special_function */
1239 "R_ARM_LDC_SB_G0", /* name */
1240 FALSE
, /* partial_inplace */
1241 0xffffffff, /* src_mask */
1242 0xffffffff, /* dst_mask */
1243 TRUE
), /* pcrel_offset */
1245 HOWTO (R_ARM_LDC_SB_G1
, /* type */
1247 2, /* size (0 = byte, 1 = short, 2 = long) */
1249 TRUE
, /* pc_relative */
1251 complain_overflow_dont
,/* complain_on_overflow */
1252 bfd_elf_generic_reloc
, /* special_function */
1253 "R_ARM_LDC_SB_G1", /* name */
1254 FALSE
, /* partial_inplace */
1255 0xffffffff, /* src_mask */
1256 0xffffffff, /* dst_mask */
1257 TRUE
), /* pcrel_offset */
1259 HOWTO (R_ARM_LDC_SB_G2
, /* type */
1261 2, /* size (0 = byte, 1 = short, 2 = long) */
1263 TRUE
, /* pc_relative */
1265 complain_overflow_dont
,/* complain_on_overflow */
1266 bfd_elf_generic_reloc
, /* special_function */
1267 "R_ARM_LDC_SB_G2", /* name */
1268 FALSE
, /* partial_inplace */
1269 0xffffffff, /* src_mask */
1270 0xffffffff, /* dst_mask */
1271 TRUE
), /* pcrel_offset */
1273 /* End of group relocations. */
1275 HOWTO (R_ARM_MOVW_BREL_NC
, /* type */
1277 2, /* size (0 = byte, 1 = short, 2 = long) */
1279 FALSE
, /* pc_relative */
1281 complain_overflow_dont
,/* complain_on_overflow */
1282 bfd_elf_generic_reloc
, /* special_function */
1283 "R_ARM_MOVW_BREL_NC", /* name */
1284 FALSE
, /* partial_inplace */
1285 0x0000ffff, /* src_mask */
1286 0x0000ffff, /* dst_mask */
1287 FALSE
), /* pcrel_offset */
1289 HOWTO (R_ARM_MOVT_BREL
, /* type */
1291 2, /* size (0 = byte, 1 = short, 2 = long) */
1293 FALSE
, /* pc_relative */
1295 complain_overflow_bitfield
,/* complain_on_overflow */
1296 bfd_elf_generic_reloc
, /* special_function */
1297 "R_ARM_MOVT_BREL", /* name */
1298 FALSE
, /* partial_inplace */
1299 0x0000ffff, /* src_mask */
1300 0x0000ffff, /* dst_mask */
1301 FALSE
), /* pcrel_offset */
1303 HOWTO (R_ARM_MOVW_BREL
, /* type */
1305 2, /* size (0 = byte, 1 = short, 2 = long) */
1307 FALSE
, /* pc_relative */
1309 complain_overflow_dont
,/* complain_on_overflow */
1310 bfd_elf_generic_reloc
, /* special_function */
1311 "R_ARM_MOVW_BREL", /* name */
1312 FALSE
, /* partial_inplace */
1313 0x0000ffff, /* src_mask */
1314 0x0000ffff, /* dst_mask */
1315 FALSE
), /* pcrel_offset */
1317 HOWTO (R_ARM_THM_MOVW_BREL_NC
,/* type */
1319 2, /* size (0 = byte, 1 = short, 2 = long) */
1321 FALSE
, /* pc_relative */
1323 complain_overflow_dont
,/* complain_on_overflow */
1324 bfd_elf_generic_reloc
, /* special_function */
1325 "R_ARM_THM_MOVW_BREL_NC",/* name */
1326 FALSE
, /* partial_inplace */
1327 0x040f70ff, /* src_mask */
1328 0x040f70ff, /* dst_mask */
1329 FALSE
), /* pcrel_offset */
1331 HOWTO (R_ARM_THM_MOVT_BREL
, /* type */
1333 2, /* size (0 = byte, 1 = short, 2 = long) */
1335 FALSE
, /* pc_relative */
1337 complain_overflow_bitfield
,/* complain_on_overflow */
1338 bfd_elf_generic_reloc
, /* special_function */
1339 "R_ARM_THM_MOVT_BREL", /* name */
1340 FALSE
, /* partial_inplace */
1341 0x040f70ff, /* src_mask */
1342 0x040f70ff, /* dst_mask */
1343 FALSE
), /* pcrel_offset */
1345 HOWTO (R_ARM_THM_MOVW_BREL
, /* type */
1347 2, /* size (0 = byte, 1 = short, 2 = long) */
1349 FALSE
, /* pc_relative */
1351 complain_overflow_dont
,/* complain_on_overflow */
1352 bfd_elf_generic_reloc
, /* special_function */
1353 "R_ARM_THM_MOVW_BREL", /* name */
1354 FALSE
, /* partial_inplace */
1355 0x040f70ff, /* src_mask */
1356 0x040f70ff, /* dst_mask */
1357 FALSE
), /* pcrel_offset */
1359 HOWTO (R_ARM_TLS_GOTDESC
, /* type */
1361 2, /* size (0 = byte, 1 = short, 2 = long) */
1363 FALSE
, /* pc_relative */
1365 complain_overflow_bitfield
,/* complain_on_overflow */
1366 NULL
, /* special_function */
1367 "R_ARM_TLS_GOTDESC", /* name */
1368 TRUE
, /* partial_inplace */
1369 0xffffffff, /* src_mask */
1370 0xffffffff, /* dst_mask */
1371 FALSE
), /* pcrel_offset */
1373 HOWTO (R_ARM_TLS_CALL
, /* type */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1377 FALSE
, /* pc_relative */
1379 complain_overflow_dont
,/* complain_on_overflow */
1380 bfd_elf_generic_reloc
, /* special_function */
1381 "R_ARM_TLS_CALL", /* name */
1382 FALSE
, /* partial_inplace */
1383 0x00ffffff, /* src_mask */
1384 0x00ffffff, /* dst_mask */
1385 FALSE
), /* pcrel_offset */
1387 HOWTO (R_ARM_TLS_DESCSEQ
, /* type */
1389 2, /* size (0 = byte, 1 = short, 2 = long) */
1391 FALSE
, /* pc_relative */
1393 complain_overflow_bitfield
,/* complain_on_overflow */
1394 bfd_elf_generic_reloc
, /* special_function */
1395 "R_ARM_TLS_DESCSEQ", /* name */
1396 FALSE
, /* partial_inplace */
1397 0x00000000, /* src_mask */
1398 0x00000000, /* dst_mask */
1399 FALSE
), /* pcrel_offset */
1401 HOWTO (R_ARM_THM_TLS_CALL
, /* type */
1403 2, /* size (0 = byte, 1 = short, 2 = long) */
1405 FALSE
, /* pc_relative */
1407 complain_overflow_dont
,/* complain_on_overflow */
1408 bfd_elf_generic_reloc
, /* special_function */
1409 "R_ARM_THM_TLS_CALL", /* name */
1410 FALSE
, /* partial_inplace */
1411 0x07ff07ff, /* src_mask */
1412 0x07ff07ff, /* dst_mask */
1413 FALSE
), /* pcrel_offset */
1415 HOWTO (R_ARM_PLT32_ABS
, /* type */
1417 2, /* size (0 = byte, 1 = short, 2 = long) */
1419 FALSE
, /* pc_relative */
1421 complain_overflow_dont
,/* complain_on_overflow */
1422 bfd_elf_generic_reloc
, /* special_function */
1423 "R_ARM_PLT32_ABS", /* name */
1424 FALSE
, /* partial_inplace */
1425 0xffffffff, /* src_mask */
1426 0xffffffff, /* dst_mask */
1427 FALSE
), /* pcrel_offset */
1429 HOWTO (R_ARM_GOT_ABS
, /* type */
1431 2, /* size (0 = byte, 1 = short, 2 = long) */
1433 FALSE
, /* pc_relative */
1435 complain_overflow_dont
,/* complain_on_overflow */
1436 bfd_elf_generic_reloc
, /* special_function */
1437 "R_ARM_GOT_ABS", /* name */
1438 FALSE
, /* partial_inplace */
1439 0xffffffff, /* src_mask */
1440 0xffffffff, /* dst_mask */
1441 FALSE
), /* pcrel_offset */
1443 HOWTO (R_ARM_GOT_PREL
, /* type */
1445 2, /* size (0 = byte, 1 = short, 2 = long) */
1447 TRUE
, /* pc_relative */
1449 complain_overflow_dont
, /* complain_on_overflow */
1450 bfd_elf_generic_reloc
, /* special_function */
1451 "R_ARM_GOT_PREL", /* name */
1452 FALSE
, /* partial_inplace */
1453 0xffffffff, /* src_mask */
1454 0xffffffff, /* dst_mask */
1455 TRUE
), /* pcrel_offset */
1457 HOWTO (R_ARM_GOT_BREL12
, /* type */
1459 2, /* size (0 = byte, 1 = short, 2 = long) */
1461 FALSE
, /* pc_relative */
1463 complain_overflow_bitfield
,/* complain_on_overflow */
1464 bfd_elf_generic_reloc
, /* special_function */
1465 "R_ARM_GOT_BREL12", /* name */
1466 FALSE
, /* partial_inplace */
1467 0x00000fff, /* src_mask */
1468 0x00000fff, /* dst_mask */
1469 FALSE
), /* pcrel_offset */
1471 HOWTO (R_ARM_GOTOFF12
, /* type */
1473 2, /* size (0 = byte, 1 = short, 2 = long) */
1475 FALSE
, /* pc_relative */
1477 complain_overflow_bitfield
,/* complain_on_overflow */
1478 bfd_elf_generic_reloc
, /* special_function */
1479 "R_ARM_GOTOFF12", /* name */
1480 FALSE
, /* partial_inplace */
1481 0x00000fff, /* src_mask */
1482 0x00000fff, /* dst_mask */
1483 FALSE
), /* pcrel_offset */
1485 EMPTY_HOWTO (R_ARM_GOTRELAX
), /* reserved for future GOT-load optimizations */
1487 /* GNU extension to record C++ vtable member usage */
1488 HOWTO (R_ARM_GNU_VTENTRY
, /* type */
1490 2, /* size (0 = byte, 1 = short, 2 = long) */
1492 FALSE
, /* pc_relative */
1494 complain_overflow_dont
, /* complain_on_overflow */
1495 _bfd_elf_rel_vtable_reloc_fn
, /* special_function */
1496 "R_ARM_GNU_VTENTRY", /* name */
1497 FALSE
, /* partial_inplace */
1500 FALSE
), /* pcrel_offset */
1502 /* GNU extension to record C++ vtable hierarchy */
1503 HOWTO (R_ARM_GNU_VTINHERIT
, /* type */
1505 2, /* size (0 = byte, 1 = short, 2 = long) */
1507 FALSE
, /* pc_relative */
1509 complain_overflow_dont
, /* complain_on_overflow */
1510 NULL
, /* special_function */
1511 "R_ARM_GNU_VTINHERIT", /* name */
1512 FALSE
, /* partial_inplace */
1515 FALSE
), /* pcrel_offset */
1517 HOWTO (R_ARM_THM_JUMP11
, /* type */
1519 1, /* size (0 = byte, 1 = short, 2 = long) */
1521 TRUE
, /* pc_relative */
1523 complain_overflow_signed
, /* complain_on_overflow */
1524 bfd_elf_generic_reloc
, /* special_function */
1525 "R_ARM_THM_JUMP11", /* name */
1526 FALSE
, /* partial_inplace */
1527 0x000007ff, /* src_mask */
1528 0x000007ff, /* dst_mask */
1529 TRUE
), /* pcrel_offset */
1531 HOWTO (R_ARM_THM_JUMP8
, /* type */
1533 1, /* size (0 = byte, 1 = short, 2 = long) */
1535 TRUE
, /* pc_relative */
1537 complain_overflow_signed
, /* complain_on_overflow */
1538 bfd_elf_generic_reloc
, /* special_function */
1539 "R_ARM_THM_JUMP8", /* name */
1540 FALSE
, /* partial_inplace */
1541 0x000000ff, /* src_mask */
1542 0x000000ff, /* dst_mask */
1543 TRUE
), /* pcrel_offset */
1545 /* TLS relocations */
1546 HOWTO (R_ARM_TLS_GD32
, /* type */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
1550 FALSE
, /* pc_relative */
1552 complain_overflow_bitfield
,/* complain_on_overflow */
1553 NULL
, /* special_function */
1554 "R_ARM_TLS_GD32", /* name */
1555 TRUE
, /* partial_inplace */
1556 0xffffffff, /* src_mask */
1557 0xffffffff, /* dst_mask */
1558 FALSE
), /* pcrel_offset */
1560 HOWTO (R_ARM_TLS_LDM32
, /* type */
1562 2, /* size (0 = byte, 1 = short, 2 = long) */
1564 FALSE
, /* pc_relative */
1566 complain_overflow_bitfield
,/* complain_on_overflow */
1567 bfd_elf_generic_reloc
, /* special_function */
1568 "R_ARM_TLS_LDM32", /* name */
1569 TRUE
, /* partial_inplace */
1570 0xffffffff, /* src_mask */
1571 0xffffffff, /* dst_mask */
1572 FALSE
), /* pcrel_offset */
1574 HOWTO (R_ARM_TLS_LDO32
, /* type */
1576 2, /* size (0 = byte, 1 = short, 2 = long) */
1578 FALSE
, /* pc_relative */
1580 complain_overflow_bitfield
,/* complain_on_overflow */
1581 bfd_elf_generic_reloc
, /* special_function */
1582 "R_ARM_TLS_LDO32", /* name */
1583 TRUE
, /* partial_inplace */
1584 0xffffffff, /* src_mask */
1585 0xffffffff, /* dst_mask */
1586 FALSE
), /* pcrel_offset */
1588 HOWTO (R_ARM_TLS_IE32
, /* type */
1590 2, /* size (0 = byte, 1 = short, 2 = long) */
1592 FALSE
, /* pc_relative */
1594 complain_overflow_bitfield
,/* complain_on_overflow */
1595 NULL
, /* special_function */
1596 "R_ARM_TLS_IE32", /* name */
1597 TRUE
, /* partial_inplace */
1598 0xffffffff, /* src_mask */
1599 0xffffffff, /* dst_mask */
1600 FALSE
), /* pcrel_offset */
1602 HOWTO (R_ARM_TLS_LE32
, /* type */
1604 2, /* size (0 = byte, 1 = short, 2 = long) */
1606 FALSE
, /* pc_relative */
1608 complain_overflow_bitfield
,/* complain_on_overflow */
1609 NULL
, /* special_function */
1610 "R_ARM_TLS_LE32", /* name */
1611 TRUE
, /* partial_inplace */
1612 0xffffffff, /* src_mask */
1613 0xffffffff, /* dst_mask */
1614 FALSE
), /* pcrel_offset */
1616 HOWTO (R_ARM_TLS_LDO12
, /* type */
1618 2, /* size (0 = byte, 1 = short, 2 = long) */
1620 FALSE
, /* pc_relative */
1622 complain_overflow_bitfield
,/* complain_on_overflow */
1623 bfd_elf_generic_reloc
, /* special_function */
1624 "R_ARM_TLS_LDO12", /* name */
1625 FALSE
, /* partial_inplace */
1626 0x00000fff, /* src_mask */
1627 0x00000fff, /* dst_mask */
1628 FALSE
), /* pcrel_offset */
1630 HOWTO (R_ARM_TLS_LE12
, /* type */
1632 2, /* size (0 = byte, 1 = short, 2 = long) */
1634 FALSE
, /* pc_relative */
1636 complain_overflow_bitfield
,/* complain_on_overflow */
1637 bfd_elf_generic_reloc
, /* special_function */
1638 "R_ARM_TLS_LE12", /* name */
1639 FALSE
, /* partial_inplace */
1640 0x00000fff, /* src_mask */
1641 0x00000fff, /* dst_mask */
1642 FALSE
), /* pcrel_offset */
1644 HOWTO (R_ARM_TLS_IE12GP
, /* type */
1646 2, /* size (0 = byte, 1 = short, 2 = long) */
1648 FALSE
, /* pc_relative */
1650 complain_overflow_bitfield
,/* complain_on_overflow */
1651 bfd_elf_generic_reloc
, /* special_function */
1652 "R_ARM_TLS_IE12GP", /* name */
1653 FALSE
, /* partial_inplace */
1654 0x00000fff, /* src_mask */
1655 0x00000fff, /* dst_mask */
1656 FALSE
), /* pcrel_offset */
1658 /* 112-127 private relocations. */
1676 /* R_ARM_ME_TOO, obsolete. */
1679 HOWTO (R_ARM_THM_TLS_DESCSEQ
, /* type */
1681 1, /* size (0 = byte, 1 = short, 2 = long) */
1683 FALSE
, /* pc_relative */
1685 complain_overflow_bitfield
,/* complain_on_overflow */
1686 bfd_elf_generic_reloc
, /* special_function */
1687 "R_ARM_THM_TLS_DESCSEQ",/* name */
1688 FALSE
, /* partial_inplace */
1689 0x00000000, /* src_mask */
1690 0x00000000, /* dst_mask */
1691 FALSE
), /* pcrel_offset */
1694 HOWTO (R_ARM_THM_ALU_ABS_G0_NC
,/* type. */
1695 0, /* rightshift. */
1696 1, /* size (0 = byte, 1 = short, 2 = long). */
1698 FALSE
, /* pc_relative. */
1700 complain_overflow_bitfield
,/* complain_on_overflow. */
1701 bfd_elf_generic_reloc
, /* special_function. */
1702 "R_ARM_THM_ALU_ABS_G0_NC",/* name. */
1703 FALSE
, /* partial_inplace. */
1704 0x00000000, /* src_mask. */
1705 0x00000000, /* dst_mask. */
1706 FALSE
), /* pcrel_offset. */
1707 HOWTO (R_ARM_THM_ALU_ABS_G1_NC
,/* type. */
1708 0, /* rightshift. */
1709 1, /* size (0 = byte, 1 = short, 2 = long). */
1711 FALSE
, /* pc_relative. */
1713 complain_overflow_bitfield
,/* complain_on_overflow. */
1714 bfd_elf_generic_reloc
, /* special_function. */
1715 "R_ARM_THM_ALU_ABS_G1_NC",/* name. */
1716 FALSE
, /* partial_inplace. */
1717 0x00000000, /* src_mask. */
1718 0x00000000, /* dst_mask. */
1719 FALSE
), /* pcrel_offset. */
1720 HOWTO (R_ARM_THM_ALU_ABS_G2_NC
,/* type. */
1721 0, /* rightshift. */
1722 1, /* size (0 = byte, 1 = short, 2 = long). */
1724 FALSE
, /* pc_relative. */
1726 complain_overflow_bitfield
,/* complain_on_overflow. */
1727 bfd_elf_generic_reloc
, /* special_function. */
1728 "R_ARM_THM_ALU_ABS_G2_NC",/* name. */
1729 FALSE
, /* partial_inplace. */
1730 0x00000000, /* src_mask. */
1731 0x00000000, /* dst_mask. */
1732 FALSE
), /* pcrel_offset. */
1733 HOWTO (R_ARM_THM_ALU_ABS_G3_NC
,/* type. */
1734 0, /* rightshift. */
1735 1, /* size (0 = byte, 1 = short, 2 = long). */
1737 FALSE
, /* pc_relative. */
1739 complain_overflow_bitfield
,/* complain_on_overflow. */
1740 bfd_elf_generic_reloc
, /* special_function. */
1741 "R_ARM_THM_ALU_ABS_G3_NC",/* name. */
1742 FALSE
, /* partial_inplace. */
1743 0x00000000, /* src_mask. */
1744 0x00000000, /* dst_mask. */
1745 FALSE
), /* pcrel_offset. */
1749 static reloc_howto_type elf32_arm_howto_table_2
[1] =
1751 HOWTO (R_ARM_IRELATIVE
, /* type */
1753 2, /* size (0 = byte, 1 = short, 2 = long) */
1755 FALSE
, /* pc_relative */
1757 complain_overflow_bitfield
,/* complain_on_overflow */
1758 bfd_elf_generic_reloc
, /* special_function */
1759 "R_ARM_IRELATIVE", /* name */
1760 TRUE
, /* partial_inplace */
1761 0xffffffff, /* src_mask */
1762 0xffffffff, /* dst_mask */
1763 FALSE
) /* pcrel_offset */
1766 /* 249-255 extended, currently unused, relocations: */
1767 static reloc_howto_type elf32_arm_howto_table_3
[4] =
1769 HOWTO (R_ARM_RREL32
, /* type */
1771 0, /* size (0 = byte, 1 = short, 2 = long) */
1773 FALSE
, /* pc_relative */
1775 complain_overflow_dont
,/* complain_on_overflow */
1776 bfd_elf_generic_reloc
, /* special_function */
1777 "R_ARM_RREL32", /* name */
1778 FALSE
, /* partial_inplace */
1781 FALSE
), /* pcrel_offset */
1783 HOWTO (R_ARM_RABS32
, /* type */
1785 0, /* size (0 = byte, 1 = short, 2 = long) */
1787 FALSE
, /* pc_relative */
1789 complain_overflow_dont
,/* complain_on_overflow */
1790 bfd_elf_generic_reloc
, /* special_function */
1791 "R_ARM_RABS32", /* name */
1792 FALSE
, /* partial_inplace */
1795 FALSE
), /* pcrel_offset */
1797 HOWTO (R_ARM_RPC24
, /* type */
1799 0, /* size (0 = byte, 1 = short, 2 = long) */
1801 FALSE
, /* pc_relative */
1803 complain_overflow_dont
,/* complain_on_overflow */
1804 bfd_elf_generic_reloc
, /* special_function */
1805 "R_ARM_RPC24", /* name */
1806 FALSE
, /* partial_inplace */
1809 FALSE
), /* pcrel_offset */
1811 HOWTO (R_ARM_RBASE
, /* type */
1813 0, /* size (0 = byte, 1 = short, 2 = long) */
1815 FALSE
, /* pc_relative */
1817 complain_overflow_dont
,/* complain_on_overflow */
1818 bfd_elf_generic_reloc
, /* special_function */
1819 "R_ARM_RBASE", /* name */
1820 FALSE
, /* partial_inplace */
1823 FALSE
) /* pcrel_offset */
1826 static reloc_howto_type
*
1827 elf32_arm_howto_from_type (unsigned int r_type
)
1829 if (r_type
< ARRAY_SIZE (elf32_arm_howto_table_1
))
1830 return &elf32_arm_howto_table_1
[r_type
];
1832 if (r_type
== R_ARM_IRELATIVE
)
1833 return &elf32_arm_howto_table_2
[r_type
- R_ARM_IRELATIVE
];
1835 if (r_type
>= R_ARM_RREL32
1836 && r_type
< R_ARM_RREL32
+ ARRAY_SIZE (elf32_arm_howto_table_3
))
1837 return &elf32_arm_howto_table_3
[r_type
- R_ARM_RREL32
];
1843 elf32_arm_info_to_howto (bfd
* abfd
, arelent
* bfd_reloc
,
1844 Elf_Internal_Rela
* elf_reloc
)
1846 unsigned int r_type
;
1848 r_type
= ELF32_R_TYPE (elf_reloc
->r_info
);
1849 if ((bfd_reloc
->howto
= elf32_arm_howto_from_type (r_type
)) == NULL
)
1851 /* xgettext:c-format */
1852 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
1854 bfd_set_error (bfd_error_bad_value
);
1860 struct elf32_arm_reloc_map
1862 bfd_reloc_code_real_type bfd_reloc_val
;
1863 unsigned char elf_reloc_val
;
1866 /* All entries in this list must also be present in elf32_arm_howto_table. */
1867 static const struct elf32_arm_reloc_map elf32_arm_reloc_map
[] =
1869 {BFD_RELOC_NONE
, R_ARM_NONE
},
1870 {BFD_RELOC_ARM_PCREL_BRANCH
, R_ARM_PC24
},
1871 {BFD_RELOC_ARM_PCREL_CALL
, R_ARM_CALL
},
1872 {BFD_RELOC_ARM_PCREL_JUMP
, R_ARM_JUMP24
},
1873 {BFD_RELOC_ARM_PCREL_BLX
, R_ARM_XPC25
},
1874 {BFD_RELOC_THUMB_PCREL_BLX
, R_ARM_THM_XPC22
},
1875 {BFD_RELOC_32
, R_ARM_ABS32
},
1876 {BFD_RELOC_32_PCREL
, R_ARM_REL32
},
1877 {BFD_RELOC_8
, R_ARM_ABS8
},
1878 {BFD_RELOC_16
, R_ARM_ABS16
},
1879 {BFD_RELOC_ARM_OFFSET_IMM
, R_ARM_ABS12
},
1880 {BFD_RELOC_ARM_THUMB_OFFSET
, R_ARM_THM_ABS5
},
1881 {BFD_RELOC_THUMB_PCREL_BRANCH25
, R_ARM_THM_JUMP24
},
1882 {BFD_RELOC_THUMB_PCREL_BRANCH23
, R_ARM_THM_CALL
},
1883 {BFD_RELOC_THUMB_PCREL_BRANCH12
, R_ARM_THM_JUMP11
},
1884 {BFD_RELOC_THUMB_PCREL_BRANCH20
, R_ARM_THM_JUMP19
},
1885 {BFD_RELOC_THUMB_PCREL_BRANCH9
, R_ARM_THM_JUMP8
},
1886 {BFD_RELOC_THUMB_PCREL_BRANCH7
, R_ARM_THM_JUMP6
},
1887 {BFD_RELOC_ARM_GLOB_DAT
, R_ARM_GLOB_DAT
},
1888 {BFD_RELOC_ARM_JUMP_SLOT
, R_ARM_JUMP_SLOT
},
1889 {BFD_RELOC_ARM_RELATIVE
, R_ARM_RELATIVE
},
1890 {BFD_RELOC_ARM_GOTOFF
, R_ARM_GOTOFF32
},
1891 {BFD_RELOC_ARM_GOTPC
, R_ARM_GOTPC
},
1892 {BFD_RELOC_ARM_GOT_PREL
, R_ARM_GOT_PREL
},
1893 {BFD_RELOC_ARM_GOT32
, R_ARM_GOT32
},
1894 {BFD_RELOC_ARM_PLT32
, R_ARM_PLT32
},
1895 {BFD_RELOC_ARM_TARGET1
, R_ARM_TARGET1
},
1896 {BFD_RELOC_ARM_ROSEGREL32
, R_ARM_ROSEGREL32
},
1897 {BFD_RELOC_ARM_SBREL32
, R_ARM_SBREL32
},
1898 {BFD_RELOC_ARM_PREL31
, R_ARM_PREL31
},
1899 {BFD_RELOC_ARM_TARGET2
, R_ARM_TARGET2
},
1900 {BFD_RELOC_ARM_PLT32
, R_ARM_PLT32
},
1901 {BFD_RELOC_ARM_TLS_GOTDESC
, R_ARM_TLS_GOTDESC
},
1902 {BFD_RELOC_ARM_TLS_CALL
, R_ARM_TLS_CALL
},
1903 {BFD_RELOC_ARM_THM_TLS_CALL
, R_ARM_THM_TLS_CALL
},
1904 {BFD_RELOC_ARM_TLS_DESCSEQ
, R_ARM_TLS_DESCSEQ
},
1905 {BFD_RELOC_ARM_THM_TLS_DESCSEQ
, R_ARM_THM_TLS_DESCSEQ
},
1906 {BFD_RELOC_ARM_TLS_DESC
, R_ARM_TLS_DESC
},
1907 {BFD_RELOC_ARM_TLS_GD32
, R_ARM_TLS_GD32
},
1908 {BFD_RELOC_ARM_TLS_LDO32
, R_ARM_TLS_LDO32
},
1909 {BFD_RELOC_ARM_TLS_LDM32
, R_ARM_TLS_LDM32
},
1910 {BFD_RELOC_ARM_TLS_DTPMOD32
, R_ARM_TLS_DTPMOD32
},
1911 {BFD_RELOC_ARM_TLS_DTPOFF32
, R_ARM_TLS_DTPOFF32
},
1912 {BFD_RELOC_ARM_TLS_TPOFF32
, R_ARM_TLS_TPOFF32
},
1913 {BFD_RELOC_ARM_TLS_IE32
, R_ARM_TLS_IE32
},
1914 {BFD_RELOC_ARM_TLS_LE32
, R_ARM_TLS_LE32
},
1915 {BFD_RELOC_ARM_IRELATIVE
, R_ARM_IRELATIVE
},
1916 {BFD_RELOC_VTABLE_INHERIT
, R_ARM_GNU_VTINHERIT
},
1917 {BFD_RELOC_VTABLE_ENTRY
, R_ARM_GNU_VTENTRY
},
1918 {BFD_RELOC_ARM_MOVW
, R_ARM_MOVW_ABS_NC
},
1919 {BFD_RELOC_ARM_MOVT
, R_ARM_MOVT_ABS
},
1920 {BFD_RELOC_ARM_MOVW_PCREL
, R_ARM_MOVW_PREL_NC
},
1921 {BFD_RELOC_ARM_MOVT_PCREL
, R_ARM_MOVT_PREL
},
1922 {BFD_RELOC_ARM_THUMB_MOVW
, R_ARM_THM_MOVW_ABS_NC
},
1923 {BFD_RELOC_ARM_THUMB_MOVT
, R_ARM_THM_MOVT_ABS
},
1924 {BFD_RELOC_ARM_THUMB_MOVW_PCREL
, R_ARM_THM_MOVW_PREL_NC
},
1925 {BFD_RELOC_ARM_THUMB_MOVT_PCREL
, R_ARM_THM_MOVT_PREL
},
1926 {BFD_RELOC_ARM_ALU_PC_G0_NC
, R_ARM_ALU_PC_G0_NC
},
1927 {BFD_RELOC_ARM_ALU_PC_G0
, R_ARM_ALU_PC_G0
},
1928 {BFD_RELOC_ARM_ALU_PC_G1_NC
, R_ARM_ALU_PC_G1_NC
},
1929 {BFD_RELOC_ARM_ALU_PC_G1
, R_ARM_ALU_PC_G1
},
1930 {BFD_RELOC_ARM_ALU_PC_G2
, R_ARM_ALU_PC_G2
},
1931 {BFD_RELOC_ARM_LDR_PC_G0
, R_ARM_LDR_PC_G0
},
1932 {BFD_RELOC_ARM_LDR_PC_G1
, R_ARM_LDR_PC_G1
},
1933 {BFD_RELOC_ARM_LDR_PC_G2
, R_ARM_LDR_PC_G2
},
1934 {BFD_RELOC_ARM_LDRS_PC_G0
, R_ARM_LDRS_PC_G0
},
1935 {BFD_RELOC_ARM_LDRS_PC_G1
, R_ARM_LDRS_PC_G1
},
1936 {BFD_RELOC_ARM_LDRS_PC_G2
, R_ARM_LDRS_PC_G2
},
1937 {BFD_RELOC_ARM_LDC_PC_G0
, R_ARM_LDC_PC_G0
},
1938 {BFD_RELOC_ARM_LDC_PC_G1
, R_ARM_LDC_PC_G1
},
1939 {BFD_RELOC_ARM_LDC_PC_G2
, R_ARM_LDC_PC_G2
},
1940 {BFD_RELOC_ARM_ALU_SB_G0_NC
, R_ARM_ALU_SB_G0_NC
},
1941 {BFD_RELOC_ARM_ALU_SB_G0
, R_ARM_ALU_SB_G0
},
1942 {BFD_RELOC_ARM_ALU_SB_G1_NC
, R_ARM_ALU_SB_G1_NC
},
1943 {BFD_RELOC_ARM_ALU_SB_G1
, R_ARM_ALU_SB_G1
},
1944 {BFD_RELOC_ARM_ALU_SB_G2
, R_ARM_ALU_SB_G2
},
1945 {BFD_RELOC_ARM_LDR_SB_G0
, R_ARM_LDR_SB_G0
},
1946 {BFD_RELOC_ARM_LDR_SB_G1
, R_ARM_LDR_SB_G1
},
1947 {BFD_RELOC_ARM_LDR_SB_G2
, R_ARM_LDR_SB_G2
},
1948 {BFD_RELOC_ARM_LDRS_SB_G0
, R_ARM_LDRS_SB_G0
},
1949 {BFD_RELOC_ARM_LDRS_SB_G1
, R_ARM_LDRS_SB_G1
},
1950 {BFD_RELOC_ARM_LDRS_SB_G2
, R_ARM_LDRS_SB_G2
},
1951 {BFD_RELOC_ARM_LDC_SB_G0
, R_ARM_LDC_SB_G0
},
1952 {BFD_RELOC_ARM_LDC_SB_G1
, R_ARM_LDC_SB_G1
},
1953 {BFD_RELOC_ARM_LDC_SB_G2
, R_ARM_LDC_SB_G2
},
1954 {BFD_RELOC_ARM_V4BX
, R_ARM_V4BX
},
1955 {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC
, R_ARM_THM_ALU_ABS_G3_NC
},
1956 {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC
, R_ARM_THM_ALU_ABS_G2_NC
},
1957 {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC
, R_ARM_THM_ALU_ABS_G1_NC
},
1958 {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC
, R_ARM_THM_ALU_ABS_G0_NC
}
1961 static reloc_howto_type
*
1962 elf32_arm_reloc_type_lookup (bfd
*abfd ATTRIBUTE_UNUSED
,
1963 bfd_reloc_code_real_type code
)
1967 for (i
= 0; i
< ARRAY_SIZE (elf32_arm_reloc_map
); i
++)
1968 if (elf32_arm_reloc_map
[i
].bfd_reloc_val
== code
)
1969 return elf32_arm_howto_from_type (elf32_arm_reloc_map
[i
].elf_reloc_val
);
1974 static reloc_howto_type
*
1975 elf32_arm_reloc_name_lookup (bfd
*abfd ATTRIBUTE_UNUSED
,
1980 for (i
= 0; i
< ARRAY_SIZE (elf32_arm_howto_table_1
); i
++)
1981 if (elf32_arm_howto_table_1
[i
].name
!= NULL
1982 && strcasecmp (elf32_arm_howto_table_1
[i
].name
, r_name
) == 0)
1983 return &elf32_arm_howto_table_1
[i
];
1985 for (i
= 0; i
< ARRAY_SIZE (elf32_arm_howto_table_2
); i
++)
1986 if (elf32_arm_howto_table_2
[i
].name
!= NULL
1987 && strcasecmp (elf32_arm_howto_table_2
[i
].name
, r_name
) == 0)
1988 return &elf32_arm_howto_table_2
[i
];
1990 for (i
= 0; i
< ARRAY_SIZE (elf32_arm_howto_table_3
); i
++)
1991 if (elf32_arm_howto_table_3
[i
].name
!= NULL
1992 && strcasecmp (elf32_arm_howto_table_3
[i
].name
, r_name
) == 0)
1993 return &elf32_arm_howto_table_3
[i
];
1998 /* Support for core dump NOTE sections. */
2001 elf32_arm_nabi_grok_prstatus (bfd
*abfd
, Elf_Internal_Note
*note
)
2006 switch (note
->descsz
)
2011 case 148: /* Linux/ARM 32-bit. */
2013 elf_tdata (abfd
)->core
->signal
= bfd_get_16 (abfd
, note
->descdata
+ 12);
2016 elf_tdata (abfd
)->core
->lwpid
= bfd_get_32 (abfd
, note
->descdata
+ 24);
2025 /* Make a ".reg/999" section. */
2026 return _bfd_elfcore_make_pseudosection (abfd
, ".reg",
2027 size
, note
->descpos
+ offset
);
2031 elf32_arm_nabi_grok_psinfo (bfd
*abfd
, Elf_Internal_Note
*note
)
2033 switch (note
->descsz
)
2038 case 124: /* Linux/ARM elf_prpsinfo. */
2039 elf_tdata (abfd
)->core
->pid
2040 = bfd_get_32 (abfd
, note
->descdata
+ 12);
2041 elf_tdata (abfd
)->core
->program
2042 = _bfd_elfcore_strndup (abfd
, note
->descdata
+ 28, 16);
2043 elf_tdata (abfd
)->core
->command
2044 = _bfd_elfcore_strndup (abfd
, note
->descdata
+ 44, 80);
2047 /* Note that for some reason, a spurious space is tacked
2048 onto the end of the args in some (at least one anyway)
2049 implementations, so strip it off if it exists. */
2051 char *command
= elf_tdata (abfd
)->core
->command
;
2052 int n
= strlen (command
);
2054 if (0 < n
&& command
[n
- 1] == ' ')
2055 command
[n
- 1] = '\0';
2062 elf32_arm_nabi_write_core_note (bfd
*abfd
, char *buf
, int *bufsiz
,
2075 va_start (ap
, note_type
);
2076 memset (data
, 0, sizeof (data
));
2077 strncpy (data
+ 28, va_arg (ap
, const char *), 16);
2078 strncpy (data
+ 44, va_arg (ap
, const char *), 80);
2081 return elfcore_write_note (abfd
, buf
, bufsiz
,
2082 "CORE", note_type
, data
, sizeof (data
));
2093 va_start (ap
, note_type
);
2094 memset (data
, 0, sizeof (data
));
2095 pid
= va_arg (ap
, long);
2096 bfd_put_32 (abfd
, pid
, data
+ 24);
2097 cursig
= va_arg (ap
, int);
2098 bfd_put_16 (abfd
, cursig
, data
+ 12);
2099 greg
= va_arg (ap
, const void *);
2100 memcpy (data
+ 72, greg
, 72);
2103 return elfcore_write_note (abfd
, buf
, bufsiz
,
2104 "CORE", note_type
, data
, sizeof (data
));
2109 #define TARGET_LITTLE_SYM arm_elf32_le_vec
2110 #define TARGET_LITTLE_NAME "elf32-littlearm"
2111 #define TARGET_BIG_SYM arm_elf32_be_vec
2112 #define TARGET_BIG_NAME "elf32-bigarm"
2114 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2115 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2116 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2118 typedef unsigned long int insn32
;
2119 typedef unsigned short int insn16
;
2121 /* In lieu of proper flags, assume all EABIv4 or later objects are
2123 #define INTERWORK_FLAG(abfd) \
2124 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2125 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2126 || ((abfd)->flags & BFD_LINKER_CREATED))
2128 /* The linker script knows the section names for placement.
2129 The entry_names are used to do simple name mangling on the stubs.
2130 Given a function name, and its type, the stub can be found. The
2131 name can be changed. The only requirement is the %s be present. */
2132 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2133 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2135 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2136 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2138 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2139 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2141 #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer"
2142 #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "__stm32l4xx_veneer_%x"
2144 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2145 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2147 #define STUB_ENTRY_NAME "__%s_veneer"
2149 #define CMSE_PREFIX "__acle_se_"
2151 /* The name of the dynamic interpreter. This is put in the .interp
2153 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2155 static const unsigned long tls_trampoline
[] =
2157 0xe08e0000, /* add r0, lr, r0 */
2158 0xe5901004, /* ldr r1, [r0,#4] */
2159 0xe12fff11, /* bx r1 */
2162 static const unsigned long dl_tlsdesc_lazy_trampoline
[] =
2164 0xe52d2004, /* push {r2} */
2165 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2166 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2167 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2168 0xe081100f, /* 2: add r1, pc */
2169 0xe12fff12, /* bx r2 */
2170 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2171 + dl_tlsdesc_lazy_resolver(GOT) */
2172 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2175 #ifdef FOUR_WORD_PLT
2177 /* The first entry in a procedure linkage table looks like
2178 this. It is set up so that any shared library function that is
2179 called before the relocation has been set up calls the dynamic
2181 static const bfd_vma elf32_arm_plt0_entry
[] =
2183 0xe52de004, /* str lr, [sp, #-4]! */
2184 0xe59fe010, /* ldr lr, [pc, #16] */
2185 0xe08fe00e, /* add lr, pc, lr */
2186 0xe5bef008, /* ldr pc, [lr, #8]! */
2189 /* Subsequent entries in a procedure linkage table look like
2191 static const bfd_vma elf32_arm_plt_entry
[] =
2193 0xe28fc600, /* add ip, pc, #NN */
2194 0xe28cca00, /* add ip, ip, #NN */
2195 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2196 0x00000000, /* unused */
2199 #else /* not FOUR_WORD_PLT */
2201 /* The first entry in a procedure linkage table looks like
2202 this. It is set up so that any shared library function that is
2203 called before the relocation has been set up calls the dynamic
2205 static const bfd_vma elf32_arm_plt0_entry
[] =
2207 0xe52de004, /* str lr, [sp, #-4]! */
2208 0xe59fe004, /* ldr lr, [pc, #4] */
2209 0xe08fe00e, /* add lr, pc, lr */
2210 0xe5bef008, /* ldr pc, [lr, #8]! */
2211 0x00000000, /* &GOT[0] - . */
2214 /* By default subsequent entries in a procedure linkage table look like
2215 this. Offsets that don't fit into 28 bits will cause link error. */
2216 static const bfd_vma elf32_arm_plt_entry_short
[] =
2218 0xe28fc600, /* add ip, pc, #0xNN00000 */
2219 0xe28cca00, /* add ip, ip, #0xNN000 */
2220 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2223 /* When explicitly asked, we'll use this "long" entry format
2224 which can cope with arbitrary displacements. */
2225 static const bfd_vma elf32_arm_plt_entry_long
[] =
2227 0xe28fc200, /* add ip, pc, #0xN0000000 */
2228 0xe28cc600, /* add ip, ip, #0xNN00000 */
2229 0xe28cca00, /* add ip, ip, #0xNN000 */
2230 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2233 static bfd_boolean elf32_arm_use_long_plt_entry
= FALSE
;
2235 #endif /* not FOUR_WORD_PLT */
2237 /* The first entry in a procedure linkage table looks like this.
2238 It is set up so that any shared library function that is called before the
2239 relocation has been set up calls the dynamic linker first. */
2240 static const bfd_vma elf32_thumb2_plt0_entry
[] =
2242 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2243 an instruction maybe encoded to one or two array elements. */
2244 0xf8dfb500, /* push {lr} */
2245 0x44fee008, /* ldr.w lr, [pc, #8] */
2247 0xff08f85e, /* ldr.w pc, [lr, #8]! */
2248 0x00000000, /* &GOT[0] - . */
2251 /* Subsequent entries in a procedure linkage table for thumb only target
2253 static const bfd_vma elf32_thumb2_plt_entry
[] =
2255 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2256 an instruction maybe encoded to one or two array elements. */
2257 0x0c00f240, /* movw ip, #0xNNNN */
2258 0x0c00f2c0, /* movt ip, #0xNNNN */
2259 0xf8dc44fc, /* add ip, pc */
2260 0xbf00f000 /* ldr.w pc, [ip] */
2264 /* The format of the first entry in the procedure linkage table
2265 for a VxWorks executable. */
2266 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry
[] =
2268 0xe52dc008, /* str ip,[sp,#-8]! */
2269 0xe59fc000, /* ldr ip,[pc] */
2270 0xe59cf008, /* ldr pc,[ip,#8] */
2271 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2274 /* The format of subsequent entries in a VxWorks executable. */
2275 static const bfd_vma elf32_arm_vxworks_exec_plt_entry
[] =
2277 0xe59fc000, /* ldr ip,[pc] */
2278 0xe59cf000, /* ldr pc,[ip] */
2279 0x00000000, /* .long @got */
2280 0xe59fc000, /* ldr ip,[pc] */
2281 0xea000000, /* b _PLT */
2282 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2285 /* The format of entries in a VxWorks shared library. */
2286 static const bfd_vma elf32_arm_vxworks_shared_plt_entry
[] =
2288 0xe59fc000, /* ldr ip,[pc] */
2289 0xe79cf009, /* ldr pc,[ip,r9] */
2290 0x00000000, /* .long @got */
2291 0xe59fc000, /* ldr ip,[pc] */
2292 0xe599f008, /* ldr pc,[r9,#8] */
2293 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2296 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2297 #define PLT_THUMB_STUB_SIZE 4
2298 static const bfd_vma elf32_arm_plt_thumb_stub
[] =
2304 /* The entries in a PLT when using a DLL-based target with multiple
2306 static const bfd_vma elf32_arm_symbian_plt_entry
[] =
2308 0xe51ff004, /* ldr pc, [pc, #-4] */
2309 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2312 /* The first entry in a procedure linkage table looks like
2313 this. It is set up so that any shared library function that is
2314 called before the relocation has been set up calls the dynamic
2316 static const bfd_vma elf32_arm_nacl_plt0_entry
[] =
2319 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2320 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2321 0xe08cc00f, /* add ip, ip, pc */
2322 0xe52dc008, /* str ip, [sp, #-8]! */
2323 /* Second bundle: */
2324 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2325 0xe59cc000, /* ldr ip, [ip] */
2326 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2327 0xe12fff1c, /* bx ip */
2329 0xe320f000, /* nop */
2330 0xe320f000, /* nop */
2331 0xe320f000, /* nop */
2333 0xe50dc004, /* str ip, [sp, #-4] */
2334 /* Fourth bundle: */
2335 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2336 0xe59cc000, /* ldr ip, [ip] */
2337 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2338 0xe12fff1c, /* bx ip */
2340 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2342 /* Subsequent entries in a procedure linkage table look like this. */
2343 static const bfd_vma elf32_arm_nacl_plt_entry
[] =
2345 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2346 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2347 0xe08cc00f, /* add ip, ip, pc */
2348 0xea000000, /* b .Lplt_tail */
2351 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2352 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2353 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2354 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2355 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2356 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2357 #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4)
2358 #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4)
2368 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2369 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2370 is inserted in arm_build_one_stub(). */
2371 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2372 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2373 #define THUMB32_MOVT(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVT_ABS, 0}
2374 #define THUMB32_MOVW(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVW_ABS_NC, 0}
2375 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2376 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2377 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2378 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2383 enum stub_insn_type type
;
2384 unsigned int r_type
;
2388 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2389 to reach the stub if necessary. */
2390 static const insn_sequence elf32_arm_stub_long_branch_any_any
[] =
2392 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2393 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2396 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2398 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb
[] =
2400 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2401 ARM_INSN (0xe12fff1c), /* bx ip */
2402 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2405 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2406 static const insn_sequence elf32_arm_stub_long_branch_thumb_only
[] =
2408 THUMB16_INSN (0xb401), /* push {r0} */
2409 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2410 THUMB16_INSN (0x4684), /* mov ip, r0 */
2411 THUMB16_INSN (0xbc01), /* pop {r0} */
2412 THUMB16_INSN (0x4760), /* bx ip */
2413 THUMB16_INSN (0xbf00), /* nop */
2414 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2417 /* Thumb -> Thumb long branch stub in thumb2 encoding. Used on armv7. */
2418 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only
[] =
2420 THUMB32_INSN (0xf85ff000), /* ldr.w pc, [pc, #-0] */
2421 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(x) */
2424 /* Thumb -> Thumb long branch stub. Used for PureCode sections on Thumb2
2425 M-profile architectures. */
2426 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only_pure
[] =
2428 THUMB32_MOVW (0xf2400c00), /* mov.w ip, R_ARM_MOVW_ABS_NC */
2429 THUMB32_MOVT (0xf2c00c00), /* movt ip, R_ARM_MOVT_ABS << 16 */
2430 THUMB16_INSN (0x4760), /* bx ip */
2433 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2435 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb
[] =
2437 THUMB16_INSN (0x4778), /* bx pc */
2438 THUMB16_INSN (0x46c0), /* nop */
2439 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2440 ARM_INSN (0xe12fff1c), /* bx ip */
2441 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2444 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2446 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm
[] =
2448 THUMB16_INSN (0x4778), /* bx pc */
2449 THUMB16_INSN (0x46c0), /* nop */
2450 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2451 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2454 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2455 one, when the destination is close enough. */
2456 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm
[] =
2458 THUMB16_INSN (0x4778), /* bx pc */
2459 THUMB16_INSN (0x46c0), /* nop */
2460 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2463 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2464 blx to reach the stub if necessary. */
2465 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic
[] =
2467 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2468 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2469 DATA_WORD (0, R_ARM_REL32
, -4), /* dcd R_ARM_REL32(X-4) */
2472 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2473 blx to reach the stub if necessary. We can not add into pc;
2474 it is not guaranteed to mode switch (different in ARMv6 and
2476 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic
[] =
2478 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2479 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2480 ARM_INSN (0xe12fff1c), /* bx ip */
2481 DATA_WORD (0, R_ARM_REL32
, 0), /* dcd R_ARM_REL32(X) */
2484 /* V4T ARM -> ARM long branch stub, PIC. */
2485 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic
[] =
2487 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2488 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2489 ARM_INSN (0xe12fff1c), /* bx ip */
2490 DATA_WORD (0, R_ARM_REL32
, 0), /* dcd R_ARM_REL32(X) */
2493 /* V4T Thumb -> ARM long branch stub, PIC. */
2494 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic
[] =
2496 THUMB16_INSN (0x4778), /* bx pc */
2497 THUMB16_INSN (0x46c0), /* nop */
2498 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2499 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2500 DATA_WORD (0, R_ARM_REL32
, -4), /* dcd R_ARM_REL32(X) */
2503 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2505 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic
[] =
2507 THUMB16_INSN (0xb401), /* push {r0} */
2508 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2509 THUMB16_INSN (0x46fc), /* mov ip, pc */
2510 THUMB16_INSN (0x4484), /* add ip, r0 */
2511 THUMB16_INSN (0xbc01), /* pop {r0} */
2512 THUMB16_INSN (0x4760), /* bx ip */
2513 DATA_WORD (0, R_ARM_REL32
, 4), /* dcd R_ARM_REL32(X) */
2516 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2518 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic
[] =
2520 THUMB16_INSN (0x4778), /* bx pc */
2521 THUMB16_INSN (0x46c0), /* nop */
2522 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2523 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2524 ARM_INSN (0xe12fff1c), /* bx ip */
2525 DATA_WORD (0, R_ARM_REL32
, 0), /* dcd R_ARM_REL32(X) */
2528 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2529 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2530 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic
[] =
2532 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2533 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2534 DATA_WORD (0, R_ARM_REL32
, -4), /* dcd R_ARM_REL32(X-4) */
2537 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2538 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2539 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic
[] =
2541 THUMB16_INSN (0x4778), /* bx pc */
2542 THUMB16_INSN (0x46c0), /* nop */
2543 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2544 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2545 DATA_WORD (0, R_ARM_REL32
, -4), /* dcd R_ARM_REL32(X) */
2548 /* NaCl ARM -> ARM long branch stub. */
2549 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl
[] =
2551 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2552 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2553 ARM_INSN (0xe12fff1c), /* bx ip */
2554 ARM_INSN (0xe320f000), /* nop */
2555 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2556 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2557 DATA_WORD (0, R_ARM_NONE
, 0), /* .word 0 */
2558 DATA_WORD (0, R_ARM_NONE
, 0), /* .word 0 */
2561 /* NaCl ARM -> ARM long branch stub, PIC. */
2562 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic
[] =
2564 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2565 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2566 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2567 ARM_INSN (0xe12fff1c), /* bx ip */
2568 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2569 DATA_WORD (0, R_ARM_REL32
, 8), /* dcd R_ARM_REL32(X+8) */
2570 DATA_WORD (0, R_ARM_NONE
, 0), /* .word 0 */
2571 DATA_WORD (0, R_ARM_NONE
, 0), /* .word 0 */
2574 /* Stub used for transition to secure state (aka SG veneer). */
2575 static const insn_sequence elf32_arm_stub_cmse_branch_thumb_only
[] =
2577 THUMB32_INSN (0xe97fe97f), /* sg. */
2578 THUMB32_B_INSN (0xf000b800, -4), /* b.w original_branch_dest. */
2582 /* Cortex-A8 erratum-workaround stubs. */
2584 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2585 can't use a conditional branch to reach this stub). */
2587 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond
[] =
2589 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2590 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2591 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2594 /* Stub used for b.w and bl.w instructions. */
2596 static const insn_sequence elf32_arm_stub_a8_veneer_b
[] =
2598 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2601 static const insn_sequence elf32_arm_stub_a8_veneer_bl
[] =
2603 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2606 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2607 instruction (which switches to ARM mode) to point to this stub. Jump to the
2608 real destination using an ARM-mode branch. */
2610 static const insn_sequence elf32_arm_stub_a8_veneer_blx
[] =
2612 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2615 /* For each section group there can be a specially created linker section
2616 to hold the stubs for that group. The name of the stub section is based
2617 upon the name of another section within that group with the suffix below
2620 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2621 create what appeared to be a linker stub section when it actually
2622 contained user code/data. For example, consider this fragment:
2624 const char * stubborn_problems[] = { "np" };
2626 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2629 .data.rel.local.stubborn_problems
2631 This then causes problems in arm32_arm_build_stubs() as it triggers:
2633 // Ignore non-stub sections.
2634 if (!strstr (stub_sec->name, STUB_SUFFIX))
2637 And so the section would be ignored instead of being processed. Hence
2638 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2640 #define STUB_SUFFIX ".__stub"
2642 /* One entry per long/short branch stub defined above. */
2644 DEF_STUB(long_branch_any_any) \
2645 DEF_STUB(long_branch_v4t_arm_thumb) \
2646 DEF_STUB(long_branch_thumb_only) \
2647 DEF_STUB(long_branch_v4t_thumb_thumb) \
2648 DEF_STUB(long_branch_v4t_thumb_arm) \
2649 DEF_STUB(short_branch_v4t_thumb_arm) \
2650 DEF_STUB(long_branch_any_arm_pic) \
2651 DEF_STUB(long_branch_any_thumb_pic) \
2652 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2653 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2654 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2655 DEF_STUB(long_branch_thumb_only_pic) \
2656 DEF_STUB(long_branch_any_tls_pic) \
2657 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2658 DEF_STUB(long_branch_arm_nacl) \
2659 DEF_STUB(long_branch_arm_nacl_pic) \
2660 DEF_STUB(cmse_branch_thumb_only) \
2661 DEF_STUB(a8_veneer_b_cond) \
2662 DEF_STUB(a8_veneer_b) \
2663 DEF_STUB(a8_veneer_bl) \
2664 DEF_STUB(a8_veneer_blx) \
2665 DEF_STUB(long_branch_thumb2_only) \
2666 DEF_STUB(long_branch_thumb2_only_pure)
2668 #define DEF_STUB(x) arm_stub_##x,
2669 enum elf32_arm_stub_type
2677 /* Note the first a8_veneer type. */
2678 const unsigned arm_stub_a8_veneer_lwm
= arm_stub_a8_veneer_b_cond
;
2682 const insn_sequence
* template_sequence
;
2686 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2687 static const stub_def stub_definitions
[] =
2693 struct elf32_arm_stub_hash_entry
2695 /* Base hash table entry structure. */
2696 struct bfd_hash_entry root
;
2698 /* The stub section. */
2701 /* Offset within stub_sec of the beginning of this stub. */
2702 bfd_vma stub_offset
;
2704 /* Given the symbol's value and its section we can determine its final
2705 value when building the stubs (so the stub knows where to jump). */
2706 bfd_vma target_value
;
2707 asection
*target_section
;
2709 /* Same as above but for the source of the branch to the stub. Used for
2710 Cortex-A8 erratum workaround to patch it to branch to the stub. As
2711 such, source section does not need to be recorded since Cortex-A8 erratum
2712 workaround stubs are only generated when both source and target are in the
2714 bfd_vma source_value
;
2716 /* The instruction which caused this stub to be generated (only valid for
2717 Cortex-A8 erratum workaround stubs at present). */
2718 unsigned long orig_insn
;
2720 /* The stub type. */
2721 enum elf32_arm_stub_type stub_type
;
2722 /* Its encoding size in bytes. */
2725 const insn_sequence
*stub_template
;
2726 /* The size of the template (number of entries). */
2727 int stub_template_size
;
2729 /* The symbol table entry, if any, that this was derived from. */
2730 struct elf32_arm_link_hash_entry
*h
;
2732 /* Type of branch. */
2733 enum arm_st_branch_type branch_type
;
2735 /* Where this stub is being called from, or, in the case of combined
2736 stub sections, the first input section in the group. */
2739 /* The name for the local symbol at the start of this stub. The
2740 stub name in the hash table has to be unique; this does not, so
2741 it can be friendlier. */
2745 /* Used to build a map of a section. This is required for mixed-endian
2748 typedef struct elf32_elf_section_map
2753 elf32_arm_section_map
;
2755 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2759 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER
,
2760 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER
,
2761 VFP11_ERRATUM_ARM_VENEER
,
2762 VFP11_ERRATUM_THUMB_VENEER
2764 elf32_vfp11_erratum_type
;
2766 typedef struct elf32_vfp11_erratum_list
2768 struct elf32_vfp11_erratum_list
*next
;
2774 struct elf32_vfp11_erratum_list
*veneer
;
2775 unsigned int vfp_insn
;
2779 struct elf32_vfp11_erratum_list
*branch
;
2783 elf32_vfp11_erratum_type type
;
2785 elf32_vfp11_erratum_list
;
2787 /* Information about a STM32L4XX erratum veneer, or a branch to such a
2791 STM32L4XX_ERRATUM_BRANCH_TO_VENEER
,
2792 STM32L4XX_ERRATUM_VENEER
2794 elf32_stm32l4xx_erratum_type
;
2796 typedef struct elf32_stm32l4xx_erratum_list
2798 struct elf32_stm32l4xx_erratum_list
*next
;
2804 struct elf32_stm32l4xx_erratum_list
*veneer
;
2809 struct elf32_stm32l4xx_erratum_list
*branch
;
2813 elf32_stm32l4xx_erratum_type type
;
2815 elf32_stm32l4xx_erratum_list
;
2820 INSERT_EXIDX_CANTUNWIND_AT_END
2822 arm_unwind_edit_type
;
2824 /* A (sorted) list of edits to apply to an unwind table. */
2825 typedef struct arm_unwind_table_edit
2827 arm_unwind_edit_type type
;
2828 /* Note: we sometimes want to insert an unwind entry corresponding to a
2829 section different from the one we're currently writing out, so record the
2830 (text) section this edit relates to here. */
2831 asection
*linked_section
;
2833 struct arm_unwind_table_edit
*next
;
2835 arm_unwind_table_edit
;
2837 typedef struct _arm_elf_section_data
2839 /* Information about mapping symbols. */
2840 struct bfd_elf_section_data elf
;
2841 unsigned int mapcount
;
2842 unsigned int mapsize
;
2843 elf32_arm_section_map
*map
;
2844 /* Information about CPU errata. */
2845 unsigned int erratumcount
;
2846 elf32_vfp11_erratum_list
*erratumlist
;
2847 unsigned int stm32l4xx_erratumcount
;
2848 elf32_stm32l4xx_erratum_list
*stm32l4xx_erratumlist
;
2849 unsigned int additional_reloc_count
;
2850 /* Information about unwind tables. */
2853 /* Unwind info attached to a text section. */
2856 asection
*arm_exidx_sec
;
2859 /* Unwind info attached to an .ARM.exidx section. */
2862 arm_unwind_table_edit
*unwind_edit_list
;
2863 arm_unwind_table_edit
*unwind_edit_tail
;
2867 _arm_elf_section_data
;
2869 #define elf32_arm_section_data(sec) \
2870 ((_arm_elf_section_data *) elf_section_data (sec))
2872 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2873 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2874 so may be created multiple times: we use an array of these entries whilst
2875 relaxing which we can refresh easily, then create stubs for each potentially
2876 erratum-triggering instruction once we've settled on a solution. */
2878 struct a8_erratum_fix
2883 bfd_vma target_offset
;
2884 unsigned long orig_insn
;
2886 enum elf32_arm_stub_type stub_type
;
2887 enum arm_st_branch_type branch_type
;
2890 /* A table of relocs applied to branches which might trigger Cortex-A8
2893 struct a8_erratum_reloc
2896 bfd_vma destination
;
2897 struct elf32_arm_link_hash_entry
*hash
;
2898 const char *sym_name
;
2899 unsigned int r_type
;
2900 enum arm_st_branch_type branch_type
;
2901 bfd_boolean non_a8_stub
;
2904 /* The size of the thread control block. */
2907 /* ARM-specific information about a PLT entry, over and above the usual
2911 /* We reference count Thumb references to a PLT entry separately,
2912 so that we can emit the Thumb trampoline only if needed. */
2913 bfd_signed_vma thumb_refcount
;
2915 /* Some references from Thumb code may be eliminated by BL->BLX
2916 conversion, so record them separately. */
2917 bfd_signed_vma maybe_thumb_refcount
;
2919 /* How many of the recorded PLT accesses were from non-call relocations.
2920 This information is useful when deciding whether anything takes the
2921 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2922 non-call references to the function should resolve directly to the
2923 real runtime target. */
2924 unsigned int noncall_refcount
;
2926 /* Since PLT entries have variable size if the Thumb prologue is
2927 used, we need to record the index into .got.plt instead of
2928 recomputing it from the PLT offset. */
2929 bfd_signed_vma got_offset
;
2932 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
2933 struct arm_local_iplt_info
2935 /* The information that is usually found in the generic ELF part of
2936 the hash table entry. */
2937 union gotplt_union root
;
2939 /* The information that is usually found in the ARM-specific part of
2940 the hash table entry. */
2941 struct arm_plt_info arm
;
2943 /* A list of all potential dynamic relocations against this symbol. */
2944 struct elf_dyn_relocs
*dyn_relocs
;
2947 struct elf_arm_obj_tdata
2949 struct elf_obj_tdata root
;
2951 /* tls_type for each local got entry. */
2952 char *local_got_tls_type
;
2954 /* GOTPLT entries for TLS descriptors. */
2955 bfd_vma
*local_tlsdesc_gotent
;
2957 /* Information for local symbols that need entries in .iplt. */
2958 struct arm_local_iplt_info
**local_iplt
;
2960 /* Zero to warn when linking objects with incompatible enum sizes. */
2961 int no_enum_size_warning
;
2963 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2964 int no_wchar_size_warning
;
2967 #define elf_arm_tdata(bfd) \
2968 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
2970 #define elf32_arm_local_got_tls_type(bfd) \
2971 (elf_arm_tdata (bfd)->local_got_tls_type)
2973 #define elf32_arm_local_tlsdesc_gotent(bfd) \
2974 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2976 #define elf32_arm_local_iplt(bfd) \
2977 (elf_arm_tdata (bfd)->local_iplt)
2979 #define is_arm_elf(bfd) \
2980 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2981 && elf_tdata (bfd) != NULL \
2982 && elf_object_id (bfd) == ARM_ELF_DATA)
2985 elf32_arm_mkobject (bfd
*abfd
)
2987 return bfd_elf_allocate_object (abfd
, sizeof (struct elf_arm_obj_tdata
),
2991 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2993 /* Arm ELF linker hash entry. */
2994 struct elf32_arm_link_hash_entry
2996 struct elf_link_hash_entry root
;
2998 /* Track dynamic relocs copied for this symbol. */
2999 struct elf_dyn_relocs
*dyn_relocs
;
3001 /* ARM-specific PLT information. */
3002 struct arm_plt_info plt
;
3004 #define GOT_UNKNOWN 0
3005 #define GOT_NORMAL 1
3006 #define GOT_TLS_GD 2
3007 #define GOT_TLS_IE 4
3008 #define GOT_TLS_GDESC 8
3009 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
3010 unsigned int tls_type
: 8;
3012 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
3013 unsigned int is_iplt
: 1;
3015 unsigned int unused
: 23;
3017 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
3018 starting at the end of the jump table. */
3019 bfd_vma tlsdesc_got
;
3021 /* The symbol marking the real symbol location for exported thumb
3022 symbols with Arm stubs. */
3023 struct elf_link_hash_entry
*export_glue
;
3025 /* A pointer to the most recently used stub hash entry against this
3027 struct elf32_arm_stub_hash_entry
*stub_cache
;
3030 /* Traverse an arm ELF linker hash table. */
3031 #define elf32_arm_link_hash_traverse(table, func, info) \
3032 (elf_link_hash_traverse \
3034 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
3037 /* Get the ARM elf linker hash table from a link_info structure. */
3038 #define elf32_arm_hash_table(info) \
3039 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
3040 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
3042 #define arm_stub_hash_lookup(table, string, create, copy) \
3043 ((struct elf32_arm_stub_hash_entry *) \
3044 bfd_hash_lookup ((table), (string), (create), (copy)))
3046 /* Array to keep track of which stub sections have been created, and
3047 information on stub grouping. */
3050 /* This is the section to which stubs in the group will be
3053 /* The stub section. */
3057 #define elf32_arm_compute_jump_table_size(htab) \
3058 ((htab)->next_tls_desc_index * 4)
3060 /* ARM ELF linker hash table. */
3061 struct elf32_arm_link_hash_table
3063 /* The main hash table. */
3064 struct elf_link_hash_table root
;
3066 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
3067 bfd_size_type thumb_glue_size
;
3069 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
3070 bfd_size_type arm_glue_size
;
3072 /* The size in bytes of section containing the ARMv4 BX veneers. */
3073 bfd_size_type bx_glue_size
;
3075 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
3076 veneer has been populated. */
3077 bfd_vma bx_glue_offset
[15];
3079 /* The size in bytes of the section containing glue for VFP11 erratum
3081 bfd_size_type vfp11_erratum_glue_size
;
3083 /* The size in bytes of the section containing glue for STM32L4XX erratum
3085 bfd_size_type stm32l4xx_erratum_glue_size
;
3087 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
3088 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
3089 elf32_arm_write_section(). */
3090 struct a8_erratum_fix
*a8_erratum_fixes
;
3091 unsigned int num_a8_erratum_fixes
;
3093 /* An arbitrary input BFD chosen to hold the glue sections. */
3094 bfd
* bfd_of_glue_owner
;
3096 /* Nonzero to output a BE8 image. */
3099 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
3100 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
3103 /* The relocation to use for R_ARM_TARGET2 relocations. */
3106 /* 0 = Ignore R_ARM_V4BX.
3107 1 = Convert BX to MOV PC.
3108 2 = Generate v4 interworing stubs. */
3111 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
3114 /* Whether we should fix the ARM1176 BLX immediate issue. */
3117 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
3120 /* What sort of code sequences we should look for which may trigger the
3121 VFP11 denorm erratum. */
3122 bfd_arm_vfp11_fix vfp11_fix
;
3124 /* Global counter for the number of fixes we have emitted. */
3125 int num_vfp11_fixes
;
3127 /* What sort of code sequences we should look for which may trigger the
3128 STM32L4XX erratum. */
3129 bfd_arm_stm32l4xx_fix stm32l4xx_fix
;
3131 /* Global counter for the number of fixes we have emitted. */
3132 int num_stm32l4xx_fixes
;
3134 /* Nonzero to force PIC branch veneers. */
3137 /* The number of bytes in the initial entry in the PLT. */
3138 bfd_size_type plt_header_size
;
3140 /* The number of bytes in the subsequent PLT etries. */
3141 bfd_size_type plt_entry_size
;
3143 /* True if the target system is VxWorks. */
3146 /* True if the target system is Symbian OS. */
3149 /* True if the target system is Native Client. */
3152 /* True if the target uses REL relocations. */
3153 bfd_boolean use_rel
;
3155 /* Nonzero if import library must be a secure gateway import library
3156 as per ARMv8-M Security Extensions. */
3159 /* The import library whose symbols' address must remain stable in
3160 the import library generated. */
3163 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
3164 bfd_vma next_tls_desc_index
;
3166 /* How many R_ARM_TLS_DESC relocations were generated so far. */
3167 bfd_vma num_tls_desc
;
3169 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
3172 /* The offset into splt of the PLT entry for the TLS descriptor
3173 resolver. Special values are 0, if not necessary (or not found
3174 to be necessary yet), and -1 if needed but not determined
3176 bfd_vma dt_tlsdesc_plt
;
3178 /* The offset into sgot of the GOT entry used by the PLT entry
3180 bfd_vma dt_tlsdesc_got
;
3182 /* Offset in .plt section of tls_arm_trampoline. */
3183 bfd_vma tls_trampoline
;
3185 /* Data for R_ARM_TLS_LDM32 relocations. */
3188 bfd_signed_vma refcount
;
3192 /* Small local sym cache. */
3193 struct sym_cache sym_cache
;
3195 /* For convenience in allocate_dynrelocs. */
3198 /* The amount of space used by the reserved portion of the sgotplt
3199 section, plus whatever space is used by the jump slots. */
3200 bfd_vma sgotplt_jump_table_size
;
3202 /* The stub hash table. */
3203 struct bfd_hash_table stub_hash_table
;
3205 /* Linker stub bfd. */
3208 /* Linker call-backs. */
3209 asection
* (*add_stub_section
) (const char *, asection
*, asection
*,
3211 void (*layout_sections_again
) (void);
3213 /* Array to keep track of which stub sections have been created, and
3214 information on stub grouping. */
3215 struct map_stub
*stub_group
;
3217 /* Input stub section holding secure gateway veneers. */
3218 asection
*cmse_stub_sec
;
3220 /* Offset in cmse_stub_sec where new SG veneers (not in input import library)
3221 start to be allocated. */
3222 bfd_vma new_cmse_stub_offset
;
3224 /* Number of elements in stub_group. */
3225 unsigned int top_id
;
3227 /* Assorted information used by elf32_arm_size_stubs. */
3228 unsigned int bfd_count
;
3229 unsigned int top_index
;
3230 asection
**input_list
;
3232 /* True if the target system uses FDPIC. */
3237 ctz (unsigned int mask
)
3239 #if GCC_VERSION >= 3004
3240 return __builtin_ctz (mask
);
3244 for (i
= 0; i
< 8 * sizeof (mask
); i
++)
3255 elf32_arm_popcount (unsigned int mask
)
3257 #if GCC_VERSION >= 3004
3258 return __builtin_popcount (mask
);
3263 for (i
= 0; i
< 8 * sizeof (mask
); i
++)
3273 /* Create an entry in an ARM ELF linker hash table. */
3275 static struct bfd_hash_entry
*
3276 elf32_arm_link_hash_newfunc (struct bfd_hash_entry
* entry
,
3277 struct bfd_hash_table
* table
,
3278 const char * string
)
3280 struct elf32_arm_link_hash_entry
* ret
=
3281 (struct elf32_arm_link_hash_entry
*) entry
;
3283 /* Allocate the structure if it has not already been allocated by a
3286 ret
= (struct elf32_arm_link_hash_entry
*)
3287 bfd_hash_allocate (table
, sizeof (struct elf32_arm_link_hash_entry
));
3289 return (struct bfd_hash_entry
*) ret
;
3291 /* Call the allocation method of the superclass. */
3292 ret
= ((struct elf32_arm_link_hash_entry
*)
3293 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry
*) ret
,
3297 ret
->dyn_relocs
= NULL
;
3298 ret
->tls_type
= GOT_UNKNOWN
;
3299 ret
->tlsdesc_got
= (bfd_vma
) -1;
3300 ret
->plt
.thumb_refcount
= 0;
3301 ret
->plt
.maybe_thumb_refcount
= 0;
3302 ret
->plt
.noncall_refcount
= 0;
3303 ret
->plt
.got_offset
= -1;
3304 ret
->is_iplt
= FALSE
;
3305 ret
->export_glue
= NULL
;
3307 ret
->stub_cache
= NULL
;
3310 return (struct bfd_hash_entry
*) ret
;
3313 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3317 elf32_arm_allocate_local_sym_info (bfd
*abfd
)
3319 if (elf_local_got_refcounts (abfd
) == NULL
)
3321 bfd_size_type num_syms
;
3325 num_syms
= elf_tdata (abfd
)->symtab_hdr
.sh_info
;
3326 size
= num_syms
* (sizeof (bfd_signed_vma
)
3327 + sizeof (struct arm_local_iplt_info
*)
3330 data
= bfd_zalloc (abfd
, size
);
3334 elf_local_got_refcounts (abfd
) = (bfd_signed_vma
*) data
;
3335 data
+= num_syms
* sizeof (bfd_signed_vma
);
3337 elf32_arm_local_iplt (abfd
) = (struct arm_local_iplt_info
**) data
;
3338 data
+= num_syms
* sizeof (struct arm_local_iplt_info
*);
3340 elf32_arm_local_tlsdesc_gotent (abfd
) = (bfd_vma
*) data
;
3341 data
+= num_syms
* sizeof (bfd_vma
);
3343 elf32_arm_local_got_tls_type (abfd
) = data
;
3348 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3349 to input bfd ABFD. Create the information if it doesn't already exist.
3350 Return null if an allocation fails. */
3352 static struct arm_local_iplt_info
*
3353 elf32_arm_create_local_iplt (bfd
*abfd
, unsigned long r_symndx
)
3355 struct arm_local_iplt_info
**ptr
;
3357 if (!elf32_arm_allocate_local_sym_info (abfd
))
3360 BFD_ASSERT (r_symndx
< elf_tdata (abfd
)->symtab_hdr
.sh_info
);
3361 ptr
= &elf32_arm_local_iplt (abfd
)[r_symndx
];
3363 *ptr
= bfd_zalloc (abfd
, sizeof (**ptr
));
3367 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3368 in ABFD's symbol table. If the symbol is global, H points to its
3369 hash table entry, otherwise H is null.
3371 Return true if the symbol does have PLT information. When returning
3372 true, point *ROOT_PLT at the target-independent reference count/offset
3373 union and *ARM_PLT at the ARM-specific information. */
3376 elf32_arm_get_plt_info (bfd
*abfd
, struct elf32_arm_link_hash_table
*globals
,
3377 struct elf32_arm_link_hash_entry
*h
,
3378 unsigned long r_symndx
, union gotplt_union
**root_plt
,
3379 struct arm_plt_info
**arm_plt
)
3381 struct arm_local_iplt_info
*local_iplt
;
3383 if (globals
->root
.splt
== NULL
&& globals
->root
.iplt
== NULL
)
3388 *root_plt
= &h
->root
.plt
;
3393 if (elf32_arm_local_iplt (abfd
) == NULL
)
3396 local_iplt
= elf32_arm_local_iplt (abfd
)[r_symndx
];
3397 if (local_iplt
== NULL
)
3400 *root_plt
= &local_iplt
->root
;
3401 *arm_plt
= &local_iplt
->arm
;
3405 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3409 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info
*info
,
3410 struct arm_plt_info
*arm_plt
)
3412 struct elf32_arm_link_hash_table
*htab
;
3414 htab
= elf32_arm_hash_table (info
);
3415 return (arm_plt
->thumb_refcount
!= 0
3416 || (!htab
->use_blx
&& arm_plt
->maybe_thumb_refcount
!= 0));
3419 /* Return a pointer to the head of the dynamic reloc list that should
3420 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3421 ABFD's symbol table. Return null if an error occurs. */
3423 static struct elf_dyn_relocs
**
3424 elf32_arm_get_local_dynreloc_list (bfd
*abfd
, unsigned long r_symndx
,
3425 Elf_Internal_Sym
*isym
)
3427 if (ELF32_ST_TYPE (isym
->st_info
) == STT_GNU_IFUNC
)
3429 struct arm_local_iplt_info
*local_iplt
;
3431 local_iplt
= elf32_arm_create_local_iplt (abfd
, r_symndx
);
3432 if (local_iplt
== NULL
)
3434 return &local_iplt
->dyn_relocs
;
3438 /* Track dynamic relocs needed for local syms too.
3439 We really need local syms available to do this
3444 s
= bfd_section_from_elf_index (abfd
, isym
->st_shndx
);
3448 vpp
= &elf_section_data (s
)->local_dynrel
;
3449 return (struct elf_dyn_relocs
**) vpp
;
3453 /* Initialize an entry in the stub hash table. */
3455 static struct bfd_hash_entry
*
3456 stub_hash_newfunc (struct bfd_hash_entry
*entry
,
3457 struct bfd_hash_table
*table
,
3460 /* Allocate the structure if it has not already been allocated by a
3464 entry
= (struct bfd_hash_entry
*)
3465 bfd_hash_allocate (table
, sizeof (struct elf32_arm_stub_hash_entry
));
3470 /* Call the allocation method of the superclass. */
3471 entry
= bfd_hash_newfunc (entry
, table
, string
);
3474 struct elf32_arm_stub_hash_entry
*eh
;
3476 /* Initialize the local fields. */
3477 eh
= (struct elf32_arm_stub_hash_entry
*) entry
;
3478 eh
->stub_sec
= NULL
;
3479 eh
->stub_offset
= (bfd_vma
) -1;
3480 eh
->source_value
= 0;
3481 eh
->target_value
= 0;
3482 eh
->target_section
= NULL
;
3484 eh
->stub_type
= arm_stub_none
;
3486 eh
->stub_template
= NULL
;
3487 eh
->stub_template_size
= -1;
3490 eh
->output_name
= NULL
;
3496 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3497 shortcuts to them in our hash table. */
3500 create_got_section (bfd
*dynobj
, struct bfd_link_info
*info
)
3502 struct elf32_arm_link_hash_table
*htab
;
3504 htab
= elf32_arm_hash_table (info
);
3508 /* BPABI objects never have a GOT, or associated sections. */
3509 if (htab
->symbian_p
)
3512 if (! _bfd_elf_create_got_section (dynobj
, info
))
3518 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3521 create_ifunc_sections (struct bfd_link_info
*info
)
3523 struct elf32_arm_link_hash_table
*htab
;
3524 const struct elf_backend_data
*bed
;
3529 htab
= elf32_arm_hash_table (info
);
3530 dynobj
= htab
->root
.dynobj
;
3531 bed
= get_elf_backend_data (dynobj
);
3532 flags
= bed
->dynamic_sec_flags
;
3534 if (htab
->root
.iplt
== NULL
)
3536 s
= bfd_make_section_anyway_with_flags (dynobj
, ".iplt",
3537 flags
| SEC_READONLY
| SEC_CODE
);
3539 || !bfd_set_section_alignment (dynobj
, s
, bed
->plt_alignment
))
3541 htab
->root
.iplt
= s
;
3544 if (htab
->root
.irelplt
== NULL
)
3546 s
= bfd_make_section_anyway_with_flags (dynobj
,
3547 RELOC_SECTION (htab
, ".iplt"),
3548 flags
| SEC_READONLY
);
3550 || !bfd_set_section_alignment (dynobj
, s
, bed
->s
->log_file_align
))
3552 htab
->root
.irelplt
= s
;
3555 if (htab
->root
.igotplt
== NULL
)
3557 s
= bfd_make_section_anyway_with_flags (dynobj
, ".igot.plt", flags
);
3559 || !bfd_set_section_alignment (dynobj
, s
, bed
->s
->log_file_align
))
3561 htab
->root
.igotplt
= s
;
3566 /* Determine if we're dealing with a Thumb only architecture. */
3569 using_thumb_only (struct elf32_arm_link_hash_table
*globals
)
3572 int profile
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
3573 Tag_CPU_arch_profile
);
3576 return profile
== 'M';
3578 arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
3580 /* Force return logic to be reviewed for each new architecture. */
3581 BFD_ASSERT (arch
<= TAG_CPU_ARCH_V8M_MAIN
);
3583 if (arch
== TAG_CPU_ARCH_V6_M
3584 || arch
== TAG_CPU_ARCH_V6S_M
3585 || arch
== TAG_CPU_ARCH_V7E_M
3586 || arch
== TAG_CPU_ARCH_V8M_BASE
3587 || arch
== TAG_CPU_ARCH_V8M_MAIN
)
3593 /* Determine if we're dealing with a Thumb-2 object. */
3596 using_thumb2 (struct elf32_arm_link_hash_table
*globals
)
3599 int thumb_isa
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
3603 return thumb_isa
== 2;
3605 arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
3607 /* Force return logic to be reviewed for each new architecture. */
3608 BFD_ASSERT (arch
<= TAG_CPU_ARCH_V8M_MAIN
);
3610 return (arch
== TAG_CPU_ARCH_V6T2
3611 || arch
== TAG_CPU_ARCH_V7
3612 || arch
== TAG_CPU_ARCH_V7E_M
3613 || arch
== TAG_CPU_ARCH_V8
3614 || arch
== TAG_CPU_ARCH_V8R
3615 || arch
== TAG_CPU_ARCH_V8M_MAIN
);
3618 /* Determine whether Thumb-2 BL instruction is available. */
3621 using_thumb2_bl (struct elf32_arm_link_hash_table
*globals
)
3624 bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
3626 /* Force return logic to be reviewed for each new architecture. */
3627 BFD_ASSERT (arch
<= TAG_CPU_ARCH_V8M_MAIN
);
3629 /* Architecture was introduced after ARMv6T2 (eg. ARMv6-M). */
3630 return (arch
== TAG_CPU_ARCH_V6T2
3631 || arch
>= TAG_CPU_ARCH_V7
);
3634 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3635 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3639 elf32_arm_create_dynamic_sections (bfd
*dynobj
, struct bfd_link_info
*info
)
3641 struct elf32_arm_link_hash_table
*htab
;
3643 htab
= elf32_arm_hash_table (info
);
3647 if (!htab
->root
.sgot
&& !create_got_section (dynobj
, info
))
3650 if (!_bfd_elf_create_dynamic_sections (dynobj
, info
))
3653 if (htab
->vxworks_p
)
3655 if (!elf_vxworks_create_dynamic_sections (dynobj
, info
, &htab
->srelplt2
))
3658 if (bfd_link_pic (info
))
3660 htab
->plt_header_size
= 0;
3661 htab
->plt_entry_size
3662 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry
);
3666 htab
->plt_header_size
3667 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry
);
3668 htab
->plt_entry_size
3669 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry
);
3672 if (elf_elfheader (dynobj
))
3673 elf_elfheader (dynobj
)->e_ident
[EI_CLASS
] = ELFCLASS32
;
3678 Test for thumb only architectures. Note - we cannot just call
3679 using_thumb_only() as the attributes in the output bfd have not been
3680 initialised at this point, so instead we use the input bfd. */
3681 bfd
* saved_obfd
= htab
->obfd
;
3683 htab
->obfd
= dynobj
;
3684 if (using_thumb_only (htab
))
3686 htab
->plt_header_size
= 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry
);
3687 htab
->plt_entry_size
= 4 * ARRAY_SIZE (elf32_thumb2_plt_entry
);
3689 htab
->obfd
= saved_obfd
;
3692 if (!htab
->root
.splt
3693 || !htab
->root
.srelplt
3694 || !htab
->root
.sdynbss
3695 || (!bfd_link_pic (info
) && !htab
->root
.srelbss
))
3701 /* Copy the extra info we tack onto an elf_link_hash_entry. */
3704 elf32_arm_copy_indirect_symbol (struct bfd_link_info
*info
,
3705 struct elf_link_hash_entry
*dir
,
3706 struct elf_link_hash_entry
*ind
)
3708 struct elf32_arm_link_hash_entry
*edir
, *eind
;
3710 edir
= (struct elf32_arm_link_hash_entry
*) dir
;
3711 eind
= (struct elf32_arm_link_hash_entry
*) ind
;
3713 if (eind
->dyn_relocs
!= NULL
)
3715 if (edir
->dyn_relocs
!= NULL
)
3717 struct elf_dyn_relocs
**pp
;
3718 struct elf_dyn_relocs
*p
;
3720 /* Add reloc counts against the indirect sym to the direct sym
3721 list. Merge any entries against the same section. */
3722 for (pp
= &eind
->dyn_relocs
; (p
= *pp
) != NULL
; )
3724 struct elf_dyn_relocs
*q
;
3726 for (q
= edir
->dyn_relocs
; q
!= NULL
; q
= q
->next
)
3727 if (q
->sec
== p
->sec
)
3729 q
->pc_count
+= p
->pc_count
;
3730 q
->count
+= p
->count
;
3737 *pp
= edir
->dyn_relocs
;
3740 edir
->dyn_relocs
= eind
->dyn_relocs
;
3741 eind
->dyn_relocs
= NULL
;
3744 if (ind
->root
.type
== bfd_link_hash_indirect
)
3746 /* Copy over PLT info. */
3747 edir
->plt
.thumb_refcount
+= eind
->plt
.thumb_refcount
;
3748 eind
->plt
.thumb_refcount
= 0;
3749 edir
->plt
.maybe_thumb_refcount
+= eind
->plt
.maybe_thumb_refcount
;
3750 eind
->plt
.maybe_thumb_refcount
= 0;
3751 edir
->plt
.noncall_refcount
+= eind
->plt
.noncall_refcount
;
3752 eind
->plt
.noncall_refcount
= 0;
3754 /* We should only allocate a function to .iplt once the final
3755 symbol information is known. */
3756 BFD_ASSERT (!eind
->is_iplt
);
3758 if (dir
->got
.refcount
<= 0)
3760 edir
->tls_type
= eind
->tls_type
;
3761 eind
->tls_type
= GOT_UNKNOWN
;
3765 _bfd_elf_link_hash_copy_indirect (info
, dir
, ind
);
3768 /* Destroy an ARM elf linker hash table. */
3771 elf32_arm_link_hash_table_free (bfd
*obfd
)
3773 struct elf32_arm_link_hash_table
*ret
3774 = (struct elf32_arm_link_hash_table
*) obfd
->link
.hash
;
3776 bfd_hash_table_free (&ret
->stub_hash_table
);
3777 _bfd_elf_link_hash_table_free (obfd
);
3780 /* Create an ARM elf linker hash table. */
3782 static struct bfd_link_hash_table
*
3783 elf32_arm_link_hash_table_create (bfd
*abfd
)
3785 struct elf32_arm_link_hash_table
*ret
;
3786 bfd_size_type amt
= sizeof (struct elf32_arm_link_hash_table
);
3788 ret
= (struct elf32_arm_link_hash_table
*) bfd_zmalloc (amt
);
3792 if (!_bfd_elf_link_hash_table_init (& ret
->root
, abfd
,
3793 elf32_arm_link_hash_newfunc
,
3794 sizeof (struct elf32_arm_link_hash_entry
),
3801 ret
->vfp11_fix
= BFD_ARM_VFP11_FIX_NONE
;
3802 ret
->stm32l4xx_fix
= BFD_ARM_STM32L4XX_FIX_NONE
;
3803 #ifdef FOUR_WORD_PLT
3804 ret
->plt_header_size
= 16;
3805 ret
->plt_entry_size
= 16;
3807 ret
->plt_header_size
= 20;
3808 ret
->plt_entry_size
= elf32_arm_use_long_plt_entry
? 16 : 12;
3810 ret
->use_rel
= TRUE
;
3814 if (!bfd_hash_table_init (&ret
->stub_hash_table
, stub_hash_newfunc
,
3815 sizeof (struct elf32_arm_stub_hash_entry
)))
3817 _bfd_elf_link_hash_table_free (abfd
);
3820 ret
->root
.root
.hash_table_free
= elf32_arm_link_hash_table_free
;
3822 return &ret
->root
.root
;
3825 /* Determine what kind of NOPs are available. */
3828 arch_has_arm_nop (struct elf32_arm_link_hash_table
*globals
)
3830 const int arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
3833 /* Force return logic to be reviewed for each new architecture. */
3834 BFD_ASSERT (arch
<= TAG_CPU_ARCH_V8M_MAIN
);
3836 return (arch
== TAG_CPU_ARCH_V6T2
3837 || arch
== TAG_CPU_ARCH_V6K
3838 || arch
== TAG_CPU_ARCH_V7
3839 || arch
== TAG_CPU_ARCH_V8
3840 || arch
== TAG_CPU_ARCH_V8R
);
3844 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type
)
3848 case arm_stub_long_branch_thumb_only
:
3849 case arm_stub_long_branch_thumb2_only
:
3850 case arm_stub_long_branch_thumb2_only_pure
:
3851 case arm_stub_long_branch_v4t_thumb_arm
:
3852 case arm_stub_short_branch_v4t_thumb_arm
:
3853 case arm_stub_long_branch_v4t_thumb_arm_pic
:
3854 case arm_stub_long_branch_v4t_thumb_tls_pic
:
3855 case arm_stub_long_branch_thumb_only_pic
:
3856 case arm_stub_cmse_branch_thumb_only
:
3867 /* Determine the type of stub needed, if any, for a call. */
3869 static enum elf32_arm_stub_type
3870 arm_type_of_stub (struct bfd_link_info
*info
,
3871 asection
*input_sec
,
3872 const Elf_Internal_Rela
*rel
,
3873 unsigned char st_type
,
3874 enum arm_st_branch_type
*actual_branch_type
,
3875 struct elf32_arm_link_hash_entry
*hash
,
3876 bfd_vma destination
,
3882 bfd_signed_vma branch_offset
;
3883 unsigned int r_type
;
3884 struct elf32_arm_link_hash_table
* globals
;
3885 bfd_boolean thumb2
, thumb2_bl
, thumb_only
;
3886 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
3888 enum arm_st_branch_type branch_type
= *actual_branch_type
;
3889 union gotplt_union
*root_plt
;
3890 struct arm_plt_info
*arm_plt
;
3894 if (branch_type
== ST_BRANCH_LONG
)
3897 globals
= elf32_arm_hash_table (info
);
3898 if (globals
== NULL
)
3901 thumb_only
= using_thumb_only (globals
);
3902 thumb2
= using_thumb2 (globals
);
3903 thumb2_bl
= using_thumb2_bl (globals
);
3905 arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
3907 /* True for architectures that implement the thumb2 movw instruction. */
3908 thumb2_movw
= thumb2
|| (arch
== TAG_CPU_ARCH_V8M_BASE
);
3910 /* Determine where the call point is. */
3911 location
= (input_sec
->output_offset
3912 + input_sec
->output_section
->vma
3915 r_type
= ELF32_R_TYPE (rel
->r_info
);
3917 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
3918 are considering a function call relocation. */
3919 if (thumb_only
&& (r_type
== R_ARM_THM_CALL
|| r_type
== R_ARM_THM_JUMP24
3920 || r_type
== R_ARM_THM_JUMP19
)
3921 && branch_type
== ST_BRANCH_TO_ARM
)
3922 branch_type
= ST_BRANCH_TO_THUMB
;
3924 /* For TLS call relocs, it is the caller's responsibility to provide
3925 the address of the appropriate trampoline. */
3926 if (r_type
!= R_ARM_TLS_CALL
3927 && r_type
!= R_ARM_THM_TLS_CALL
3928 && elf32_arm_get_plt_info (input_bfd
, globals
, hash
,
3929 ELF32_R_SYM (rel
->r_info
), &root_plt
,
3931 && root_plt
->offset
!= (bfd_vma
) -1)
3935 if (hash
== NULL
|| hash
->is_iplt
)
3936 splt
= globals
->root
.iplt
;
3938 splt
= globals
->root
.splt
;
3943 /* Note when dealing with PLT entries: the main PLT stub is in
3944 ARM mode, so if the branch is in Thumb mode, another
3945 Thumb->ARM stub will be inserted later just before the ARM
3946 PLT stub. If a long branch stub is needed, we'll add a
3947 Thumb->Arm one and branch directly to the ARM PLT entry.
3948 Here, we have to check if a pre-PLT Thumb->ARM stub
3949 is needed and if it will be close enough. */
3951 destination
= (splt
->output_section
->vma
3952 + splt
->output_offset
3953 + root_plt
->offset
);
3956 /* Thumb branch/call to PLT: it can become a branch to ARM
3957 or to Thumb. We must perform the same checks and
3958 corrections as in elf32_arm_final_link_relocate. */
3959 if ((r_type
== R_ARM_THM_CALL
)
3960 || (r_type
== R_ARM_THM_JUMP24
))
3962 if (globals
->use_blx
3963 && r_type
== R_ARM_THM_CALL
3966 /* If the Thumb BLX instruction is available, convert
3967 the BL to a BLX instruction to call the ARM-mode
3969 branch_type
= ST_BRANCH_TO_ARM
;
3974 /* Target the Thumb stub before the ARM PLT entry. */
3975 destination
-= PLT_THUMB_STUB_SIZE
;
3976 branch_type
= ST_BRANCH_TO_THUMB
;
3981 branch_type
= ST_BRANCH_TO_ARM
;
3985 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
3986 BFD_ASSERT (st_type
!= STT_GNU_IFUNC
);
3988 branch_offset
= (bfd_signed_vma
)(destination
- location
);
3990 if (r_type
== R_ARM_THM_CALL
|| r_type
== R_ARM_THM_JUMP24
3991 || r_type
== R_ARM_THM_TLS_CALL
|| r_type
== R_ARM_THM_JUMP19
)
3993 /* Handle cases where:
3994 - this call goes too far (different Thumb/Thumb2 max
3996 - it's a Thumb->Arm call and blx is not available, or it's a
3997 Thumb->Arm branch (not bl). A stub is needed in this case,
3998 but only if this call is not through a PLT entry. Indeed,
3999 PLT stubs handle mode switching already. */
4001 && (branch_offset
> THM_MAX_FWD_BRANCH_OFFSET
4002 || (branch_offset
< THM_MAX_BWD_BRANCH_OFFSET
)))
4004 && (branch_offset
> THM2_MAX_FWD_BRANCH_OFFSET
4005 || (branch_offset
< THM2_MAX_BWD_BRANCH_OFFSET
)))
4007 && (branch_offset
> THM2_MAX_FWD_COND_BRANCH_OFFSET
4008 || (branch_offset
< THM2_MAX_BWD_COND_BRANCH_OFFSET
))
4009 && (r_type
== R_ARM_THM_JUMP19
))
4010 || (branch_type
== ST_BRANCH_TO_ARM
4011 && (((r_type
== R_ARM_THM_CALL
4012 || r_type
== R_ARM_THM_TLS_CALL
) && !globals
->use_blx
)
4013 || (r_type
== R_ARM_THM_JUMP24
)
4014 || (r_type
== R_ARM_THM_JUMP19
))
4017 /* If we need to insert a Thumb-Thumb long branch stub to a
4018 PLT, use one that branches directly to the ARM PLT
4019 stub. If we pretended we'd use the pre-PLT Thumb->ARM
4020 stub, undo this now. */
4021 if ((branch_type
== ST_BRANCH_TO_THUMB
) && use_plt
&& !thumb_only
)
4023 branch_type
= ST_BRANCH_TO_ARM
;
4024 branch_offset
+= PLT_THUMB_STUB_SIZE
;
4027 if (branch_type
== ST_BRANCH_TO_THUMB
)
4029 /* Thumb to thumb. */
4032 if (input_sec
->flags
& SEC_ELF_PURECODE
)
4034 (_("%pB(%pA): warning: long branch veneers used in"
4035 " section with SHF_ARM_PURECODE section"
4036 " attribute is only supported for M-profile"
4037 " targets that implement the movw instruction"),
4038 input_bfd
, input_sec
);
4040 stub_type
= (bfd_link_pic (info
) | globals
->pic_veneer
)
4042 ? ((globals
->use_blx
4043 && (r_type
== R_ARM_THM_CALL
))
4044 /* V5T and above. Stub starts with ARM code, so
4045 we must be able to switch mode before
4046 reaching it, which is only possible for 'bl'
4047 (ie R_ARM_THM_CALL relocation). */
4048 ? arm_stub_long_branch_any_thumb_pic
4049 /* On V4T, use Thumb code only. */
4050 : arm_stub_long_branch_v4t_thumb_thumb_pic
)
4052 /* non-PIC stubs. */
4053 : ((globals
->use_blx
4054 && (r_type
== R_ARM_THM_CALL
))
4055 /* V5T and above. */
4056 ? arm_stub_long_branch_any_any
4058 : arm_stub_long_branch_v4t_thumb_thumb
);
4062 if (thumb2_movw
&& (input_sec
->flags
& SEC_ELF_PURECODE
))
4063 stub_type
= arm_stub_long_branch_thumb2_only_pure
;
4066 if (input_sec
->flags
& SEC_ELF_PURECODE
)
4068 (_("%pB(%pA): warning: long branch veneers used in"
4069 " section with SHF_ARM_PURECODE section"
4070 " attribute is only supported for M-profile"
4071 " targets that implement the movw instruction"),
4072 input_bfd
, input_sec
);
4074 stub_type
= (bfd_link_pic (info
) | globals
->pic_veneer
)
4076 ? arm_stub_long_branch_thumb_only_pic
4078 : (thumb2
? arm_stub_long_branch_thumb2_only
4079 : arm_stub_long_branch_thumb_only
);
4085 if (input_sec
->flags
& SEC_ELF_PURECODE
)
4087 (_("%pB(%pA): warning: long branch veneers used in"
4088 " section with SHF_ARM_PURECODE section"
4089 " attribute is only supported" " for M-profile"
4090 " targets that implement the movw instruction"),
4091 input_bfd
, input_sec
);
4095 && sym_sec
->owner
!= NULL
4096 && !INTERWORK_FLAG (sym_sec
->owner
))
4099 (_("%pB(%s): warning: interworking not enabled;"
4100 " first occurrence: %pB: %s call to %s"),
4101 sym_sec
->owner
, name
, input_bfd
, "Thumb", "ARM");
4105 (bfd_link_pic (info
) | globals
->pic_veneer
)
4107 ? (r_type
== R_ARM_THM_TLS_CALL
4108 /* TLS PIC stubs. */
4109 ? (globals
->use_blx
? arm_stub_long_branch_any_tls_pic
4110 : arm_stub_long_branch_v4t_thumb_tls_pic
)
4111 : ((globals
->use_blx
&& r_type
== R_ARM_THM_CALL
)
4112 /* V5T PIC and above. */
4113 ? arm_stub_long_branch_any_arm_pic
4115 : arm_stub_long_branch_v4t_thumb_arm_pic
))
4117 /* non-PIC stubs. */
4118 : ((globals
->use_blx
&& r_type
== R_ARM_THM_CALL
)
4119 /* V5T and above. */
4120 ? arm_stub_long_branch_any_any
4122 : arm_stub_long_branch_v4t_thumb_arm
);
4124 /* Handle v4t short branches. */
4125 if ((stub_type
== arm_stub_long_branch_v4t_thumb_arm
)
4126 && (branch_offset
<= THM_MAX_FWD_BRANCH_OFFSET
)
4127 && (branch_offset
>= THM_MAX_BWD_BRANCH_OFFSET
))
4128 stub_type
= arm_stub_short_branch_v4t_thumb_arm
;
4132 else if (r_type
== R_ARM_CALL
4133 || r_type
== R_ARM_JUMP24
4134 || r_type
== R_ARM_PLT32
4135 || r_type
== R_ARM_TLS_CALL
)
4137 if (input_sec
->flags
& SEC_ELF_PURECODE
)
4139 (_("%pB(%pA): warning: long branch veneers used in"
4140 " section with SHF_ARM_PURECODE section"
4141 " attribute is only supported for M-profile"
4142 " targets that implement the movw instruction"),
4143 input_bfd
, input_sec
);
4144 if (branch_type
== ST_BRANCH_TO_THUMB
)
4149 && sym_sec
->owner
!= NULL
4150 && !INTERWORK_FLAG (sym_sec
->owner
))
4153 (_("%pB(%s): warning: interworking not enabled;"
4154 " first occurrence: %pB: %s call to %s"),
4155 sym_sec
->owner
, name
, input_bfd
, "ARM", "Thumb");
4158 /* We have an extra 2-bytes reach because of
4159 the mode change (bit 24 (H) of BLX encoding). */
4160 if (branch_offset
> (ARM_MAX_FWD_BRANCH_OFFSET
+ 2)
4161 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
)
4162 || (r_type
== R_ARM_CALL
&& !globals
->use_blx
)
4163 || (r_type
== R_ARM_JUMP24
)
4164 || (r_type
== R_ARM_PLT32
))
4166 stub_type
= (bfd_link_pic (info
) | globals
->pic_veneer
)
4168 ? ((globals
->use_blx
)
4169 /* V5T and above. */
4170 ? arm_stub_long_branch_any_thumb_pic
4172 : arm_stub_long_branch_v4t_arm_thumb_pic
)
4174 /* non-PIC stubs. */
4175 : ((globals
->use_blx
)
4176 /* V5T and above. */
4177 ? arm_stub_long_branch_any_any
4179 : arm_stub_long_branch_v4t_arm_thumb
);
4185 if (branch_offset
> ARM_MAX_FWD_BRANCH_OFFSET
4186 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
))
4189 (bfd_link_pic (info
) | globals
->pic_veneer
)
4191 ? (r_type
== R_ARM_TLS_CALL
4193 ? arm_stub_long_branch_any_tls_pic
4195 ? arm_stub_long_branch_arm_nacl_pic
4196 : arm_stub_long_branch_any_arm_pic
))
4197 /* non-PIC stubs. */
4199 ? arm_stub_long_branch_arm_nacl
4200 : arm_stub_long_branch_any_any
);
4205 /* If a stub is needed, record the actual destination type. */
4206 if (stub_type
!= arm_stub_none
)
4207 *actual_branch_type
= branch_type
;
4212 /* Build a name for an entry in the stub hash table. */
4215 elf32_arm_stub_name (const asection
*input_section
,
4216 const asection
*sym_sec
,
4217 const struct elf32_arm_link_hash_entry
*hash
,
4218 const Elf_Internal_Rela
*rel
,
4219 enum elf32_arm_stub_type stub_type
)
4226 len
= 8 + 1 + strlen (hash
->root
.root
.root
.string
) + 1 + 8 + 1 + 2 + 1;
4227 stub_name
= (char *) bfd_malloc (len
);
4228 if (stub_name
!= NULL
)
4229 sprintf (stub_name
, "%08x_%s+%x_%d",
4230 input_section
->id
& 0xffffffff,
4231 hash
->root
.root
.root
.string
,
4232 (int) rel
->r_addend
& 0xffffffff,
4237 len
= 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
4238 stub_name
= (char *) bfd_malloc (len
);
4239 if (stub_name
!= NULL
)
4240 sprintf (stub_name
, "%08x_%x:%x+%x_%d",
4241 input_section
->id
& 0xffffffff,
4242 sym_sec
->id
& 0xffffffff,
4243 ELF32_R_TYPE (rel
->r_info
) == R_ARM_TLS_CALL
4244 || ELF32_R_TYPE (rel
->r_info
) == R_ARM_THM_TLS_CALL
4245 ? 0 : (int) ELF32_R_SYM (rel
->r_info
) & 0xffffffff,
4246 (int) rel
->r_addend
& 0xffffffff,
4253 /* Look up an entry in the stub hash. Stub entries are cached because
4254 creating the stub name takes a bit of time. */
4256 static struct elf32_arm_stub_hash_entry
*
4257 elf32_arm_get_stub_entry (const asection
*input_section
,
4258 const asection
*sym_sec
,
4259 struct elf_link_hash_entry
*hash
,
4260 const Elf_Internal_Rela
*rel
,
4261 struct elf32_arm_link_hash_table
*htab
,
4262 enum elf32_arm_stub_type stub_type
)
4264 struct elf32_arm_stub_hash_entry
*stub_entry
;
4265 struct elf32_arm_link_hash_entry
*h
= (struct elf32_arm_link_hash_entry
*) hash
;
4266 const asection
*id_sec
;
4268 if ((input_section
->flags
& SEC_CODE
) == 0)
4271 /* If this input section is part of a group of sections sharing one
4272 stub section, then use the id of the first section in the group.
4273 Stub names need to include a section id, as there may well be
4274 more than one stub used to reach say, printf, and we need to
4275 distinguish between them. */
4276 BFD_ASSERT (input_section
->id
<= htab
->top_id
);
4277 id_sec
= htab
->stub_group
[input_section
->id
].link_sec
;
4279 if (h
!= NULL
&& h
->stub_cache
!= NULL
4280 && h
->stub_cache
->h
== h
4281 && h
->stub_cache
->id_sec
== id_sec
4282 && h
->stub_cache
->stub_type
== stub_type
)
4284 stub_entry
= h
->stub_cache
;
4290 stub_name
= elf32_arm_stub_name (id_sec
, sym_sec
, h
, rel
, stub_type
);
4291 if (stub_name
== NULL
)
4294 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
,
4295 stub_name
, FALSE
, FALSE
);
4297 h
->stub_cache
= stub_entry
;
4305 /* Whether veneers of type STUB_TYPE require to be in a dedicated output
4309 arm_dedicated_stub_output_section_required (enum elf32_arm_stub_type stub_type
)
4311 if (stub_type
>= max_stub_type
)
4312 abort (); /* Should be unreachable. */
4316 case arm_stub_cmse_branch_thumb_only
:
4323 abort (); /* Should be unreachable. */
4326 /* Required alignment (as a power of 2) for the dedicated section holding
4327 veneers of type STUB_TYPE, or 0 if veneers of this type are interspersed
4328 with input sections. */
4331 arm_dedicated_stub_output_section_required_alignment
4332 (enum elf32_arm_stub_type stub_type
)
4334 if (stub_type
>= max_stub_type
)
4335 abort (); /* Should be unreachable. */
4339 /* Vectors of Secure Gateway veneers must be aligned on 32byte
4341 case arm_stub_cmse_branch_thumb_only
:
4345 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type
));
4349 abort (); /* Should be unreachable. */
4352 /* Name of the dedicated output section to put veneers of type STUB_TYPE, or
4353 NULL if veneers of this type are interspersed with input sections. */
4356 arm_dedicated_stub_output_section_name (enum elf32_arm_stub_type stub_type
)
4358 if (stub_type
>= max_stub_type
)
4359 abort (); /* Should be unreachable. */
4363 case arm_stub_cmse_branch_thumb_only
:
4364 return ".gnu.sgstubs";
4367 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type
));
4371 abort (); /* Should be unreachable. */
4374 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4375 returns the address of the hash table field in HTAB holding a pointer to the
4376 corresponding input section. Otherwise, returns NULL. */
4379 arm_dedicated_stub_input_section_ptr (struct elf32_arm_link_hash_table
*htab
,
4380 enum elf32_arm_stub_type stub_type
)
4382 if (stub_type
>= max_stub_type
)
4383 abort (); /* Should be unreachable. */
4387 case arm_stub_cmse_branch_thumb_only
:
4388 return &htab
->cmse_stub_sec
;
4391 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type
));
4395 abort (); /* Should be unreachable. */
4398 /* Find or create a stub section to contain a stub of type STUB_TYPE. SECTION
4399 is the section that branch into veneer and can be NULL if stub should go in
4400 a dedicated output section. Returns a pointer to the stub section, and the
4401 section to which the stub section will be attached (in *LINK_SEC_P).
4402 LINK_SEC_P may be NULL. */
4405 elf32_arm_create_or_find_stub_sec (asection
**link_sec_p
, asection
*section
,
4406 struct elf32_arm_link_hash_table
*htab
,
4407 enum elf32_arm_stub_type stub_type
)
4409 asection
*link_sec
, *out_sec
, **stub_sec_p
;
4410 const char *stub_sec_prefix
;
4411 bfd_boolean dedicated_output_section
=
4412 arm_dedicated_stub_output_section_required (stub_type
);
4415 if (dedicated_output_section
)
4417 bfd
*output_bfd
= htab
->obfd
;
4418 const char *out_sec_name
=
4419 arm_dedicated_stub_output_section_name (stub_type
);
4421 stub_sec_p
= arm_dedicated_stub_input_section_ptr (htab
, stub_type
);
4422 stub_sec_prefix
= out_sec_name
;
4423 align
= arm_dedicated_stub_output_section_required_alignment (stub_type
);
4424 out_sec
= bfd_get_section_by_name (output_bfd
, out_sec_name
);
4425 if (out_sec
== NULL
)
4427 _bfd_error_handler (_("no address assigned to the veneers output "
4428 "section %s"), out_sec_name
);
4434 BFD_ASSERT (section
->id
<= htab
->top_id
);
4435 link_sec
= htab
->stub_group
[section
->id
].link_sec
;
4436 BFD_ASSERT (link_sec
!= NULL
);
4437 stub_sec_p
= &htab
->stub_group
[section
->id
].stub_sec
;
4438 if (*stub_sec_p
== NULL
)
4439 stub_sec_p
= &htab
->stub_group
[link_sec
->id
].stub_sec
;
4440 stub_sec_prefix
= link_sec
->name
;
4441 out_sec
= link_sec
->output_section
;
4442 align
= htab
->nacl_p
? 4 : 3;
4445 if (*stub_sec_p
== NULL
)
4451 namelen
= strlen (stub_sec_prefix
);
4452 len
= namelen
+ sizeof (STUB_SUFFIX
);
4453 s_name
= (char *) bfd_alloc (htab
->stub_bfd
, len
);
4457 memcpy (s_name
, stub_sec_prefix
, namelen
);
4458 memcpy (s_name
+ namelen
, STUB_SUFFIX
, sizeof (STUB_SUFFIX
));
4459 *stub_sec_p
= (*htab
->add_stub_section
) (s_name
, out_sec
, link_sec
,
4461 if (*stub_sec_p
== NULL
)
4464 out_sec
->flags
|= SEC_ALLOC
| SEC_LOAD
| SEC_READONLY
| SEC_CODE
4465 | SEC_HAS_CONTENTS
| SEC_RELOC
| SEC_IN_MEMORY
4469 if (!dedicated_output_section
)
4470 htab
->stub_group
[section
->id
].stub_sec
= *stub_sec_p
;
4473 *link_sec_p
= link_sec
;
4478 /* Add a new stub entry to the stub hash. Not all fields of the new
4479 stub entry are initialised. */
4481 static struct elf32_arm_stub_hash_entry
*
4482 elf32_arm_add_stub (const char *stub_name
, asection
*section
,
4483 struct elf32_arm_link_hash_table
*htab
,
4484 enum elf32_arm_stub_type stub_type
)
4488 struct elf32_arm_stub_hash_entry
*stub_entry
;
4490 stub_sec
= elf32_arm_create_or_find_stub_sec (&link_sec
, section
, htab
,
4492 if (stub_sec
== NULL
)
4495 /* Enter this entry into the linker stub hash table. */
4496 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
, stub_name
,
4498 if (stub_entry
== NULL
)
4500 if (section
== NULL
)
4502 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
4503 section
->owner
, stub_name
);
4507 stub_entry
->stub_sec
= stub_sec
;
4508 stub_entry
->stub_offset
= (bfd_vma
) -1;
4509 stub_entry
->id_sec
= link_sec
;
4514 /* Store an Arm insn into an output section not processed by
4515 elf32_arm_write_section. */
4518 put_arm_insn (struct elf32_arm_link_hash_table
* htab
,
4519 bfd
* output_bfd
, bfd_vma val
, void * ptr
)
4521 if (htab
->byteswap_code
!= bfd_little_endian (output_bfd
))
4522 bfd_putl32 (val
, ptr
);
4524 bfd_putb32 (val
, ptr
);
4527 /* Store a 16-bit Thumb insn into an output section not processed by
4528 elf32_arm_write_section. */
4531 put_thumb_insn (struct elf32_arm_link_hash_table
* htab
,
4532 bfd
* output_bfd
, bfd_vma val
, void * ptr
)
4534 if (htab
->byteswap_code
!= bfd_little_endian (output_bfd
))
4535 bfd_putl16 (val
, ptr
);
4537 bfd_putb16 (val
, ptr
);
4540 /* Store a Thumb2 insn into an output section not processed by
4541 elf32_arm_write_section. */
4544 put_thumb2_insn (struct elf32_arm_link_hash_table
* htab
,
4545 bfd
* output_bfd
, bfd_vma val
, bfd_byte
* ptr
)
4547 /* T2 instructions are 16-bit streamed. */
4548 if (htab
->byteswap_code
!= bfd_little_endian (output_bfd
))
4550 bfd_putl16 ((val
>> 16) & 0xffff, ptr
);
4551 bfd_putl16 ((val
& 0xffff), ptr
+ 2);
4555 bfd_putb16 ((val
>> 16) & 0xffff, ptr
);
4556 bfd_putb16 ((val
& 0xffff), ptr
+ 2);
4560 /* If it's possible to change R_TYPE to a more efficient access
4561 model, return the new reloc type. */
4564 elf32_arm_tls_transition (struct bfd_link_info
*info
, int r_type
,
4565 struct elf_link_hash_entry
*h
)
4567 int is_local
= (h
== NULL
);
4569 if (bfd_link_pic (info
)
4570 || (h
&& h
->root
.type
== bfd_link_hash_undefweak
))
4573 /* We do not support relaxations for Old TLS models. */
4576 case R_ARM_TLS_GOTDESC
:
4577 case R_ARM_TLS_CALL
:
4578 case R_ARM_THM_TLS_CALL
:
4579 case R_ARM_TLS_DESCSEQ
:
4580 case R_ARM_THM_TLS_DESCSEQ
:
4581 return is_local
? R_ARM_TLS_LE32
: R_ARM_TLS_IE32
;
4587 static bfd_reloc_status_type elf32_arm_final_link_relocate
4588 (reloc_howto_type
*, bfd
*, bfd
*, asection
*, bfd_byte
*,
4589 Elf_Internal_Rela
*, bfd_vma
, struct bfd_link_info
*, asection
*,
4590 const char *, unsigned char, enum arm_st_branch_type
,
4591 struct elf_link_hash_entry
*, bfd_boolean
*, char **);
4594 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type
)
4598 case arm_stub_a8_veneer_b_cond
:
4599 case arm_stub_a8_veneer_b
:
4600 case arm_stub_a8_veneer_bl
:
4603 case arm_stub_long_branch_any_any
:
4604 case arm_stub_long_branch_v4t_arm_thumb
:
4605 case arm_stub_long_branch_thumb_only
:
4606 case arm_stub_long_branch_thumb2_only
:
4607 case arm_stub_long_branch_thumb2_only_pure
:
4608 case arm_stub_long_branch_v4t_thumb_thumb
:
4609 case arm_stub_long_branch_v4t_thumb_arm
:
4610 case arm_stub_short_branch_v4t_thumb_arm
:
4611 case arm_stub_long_branch_any_arm_pic
:
4612 case arm_stub_long_branch_any_thumb_pic
:
4613 case arm_stub_long_branch_v4t_thumb_thumb_pic
:
4614 case arm_stub_long_branch_v4t_arm_thumb_pic
:
4615 case arm_stub_long_branch_v4t_thumb_arm_pic
:
4616 case arm_stub_long_branch_thumb_only_pic
:
4617 case arm_stub_long_branch_any_tls_pic
:
4618 case arm_stub_long_branch_v4t_thumb_tls_pic
:
4619 case arm_stub_cmse_branch_thumb_only
:
4620 case arm_stub_a8_veneer_blx
:
4623 case arm_stub_long_branch_arm_nacl
:
4624 case arm_stub_long_branch_arm_nacl_pic
:
4628 abort (); /* Should be unreachable. */
4632 /* Returns whether stubs of type STUB_TYPE take over the symbol they are
4633 veneering (TRUE) or have their own symbol (FALSE). */
4636 arm_stub_sym_claimed (enum elf32_arm_stub_type stub_type
)
4638 if (stub_type
>= max_stub_type
)
4639 abort (); /* Should be unreachable. */
4643 case arm_stub_cmse_branch_thumb_only
:
4650 abort (); /* Should be unreachable. */
4653 /* Returns the padding needed for the dedicated section used stubs of type
4657 arm_dedicated_stub_section_padding (enum elf32_arm_stub_type stub_type
)
4659 if (stub_type
>= max_stub_type
)
4660 abort (); /* Should be unreachable. */
4664 case arm_stub_cmse_branch_thumb_only
:
4671 abort (); /* Should be unreachable. */
4674 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4675 returns the address of the hash table field in HTAB holding the offset at
4676 which new veneers should be layed out in the stub section. */
4679 arm_new_stubs_start_offset_ptr (struct elf32_arm_link_hash_table
*htab
,
4680 enum elf32_arm_stub_type stub_type
)
4684 case arm_stub_cmse_branch_thumb_only
:
4685 return &htab
->new_cmse_stub_offset
;
4688 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type
));
4694 arm_build_one_stub (struct bfd_hash_entry
*gen_entry
,
4698 bfd_boolean removed_sg_veneer
;
4699 struct elf32_arm_stub_hash_entry
*stub_entry
;
4700 struct elf32_arm_link_hash_table
*globals
;
4701 struct bfd_link_info
*info
;
4708 const insn_sequence
*template_sequence
;
4710 int stub_reloc_idx
[MAXRELOCS
] = {-1, -1};
4711 int stub_reloc_offset
[MAXRELOCS
] = {0, 0};
4713 int just_allocated
= 0;
4715 /* Massage our args to the form they really have. */
4716 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
4717 info
= (struct bfd_link_info
*) in_arg
;
4719 globals
= elf32_arm_hash_table (info
);
4720 if (globals
== NULL
)
4723 stub_sec
= stub_entry
->stub_sec
;
4725 if ((globals
->fix_cortex_a8
< 0)
4726 != (arm_stub_required_alignment (stub_entry
->stub_type
) == 2))
4727 /* We have to do less-strictly-aligned fixes last. */
4730 /* Assign a slot at the end of section if none assigned yet. */
4731 if (stub_entry
->stub_offset
== (bfd_vma
) -1)
4733 stub_entry
->stub_offset
= stub_sec
->size
;
4736 loc
= stub_sec
->contents
+ stub_entry
->stub_offset
;
4738 stub_bfd
= stub_sec
->owner
;
4740 /* This is the address of the stub destination. */
4741 sym_value
= (stub_entry
->target_value
4742 + stub_entry
->target_section
->output_offset
4743 + stub_entry
->target_section
->output_section
->vma
);
4745 template_sequence
= stub_entry
->stub_template
;
4746 template_size
= stub_entry
->stub_template_size
;
4749 for (i
= 0; i
< template_size
; i
++)
4751 switch (template_sequence
[i
].type
)
4755 bfd_vma data
= (bfd_vma
) template_sequence
[i
].data
;
4756 if (template_sequence
[i
].reloc_addend
!= 0)
4758 /* We've borrowed the reloc_addend field to mean we should
4759 insert a condition code into this (Thumb-1 branch)
4760 instruction. See THUMB16_BCOND_INSN. */
4761 BFD_ASSERT ((data
& 0xff00) == 0xd000);
4762 data
|= ((stub_entry
->orig_insn
>> 22) & 0xf) << 8;
4764 bfd_put_16 (stub_bfd
, data
, loc
+ size
);
4770 bfd_put_16 (stub_bfd
,
4771 (template_sequence
[i
].data
>> 16) & 0xffff,
4773 bfd_put_16 (stub_bfd
, template_sequence
[i
].data
& 0xffff,
4775 if (template_sequence
[i
].r_type
!= R_ARM_NONE
)
4777 stub_reloc_idx
[nrelocs
] = i
;
4778 stub_reloc_offset
[nrelocs
++] = size
;
4784 bfd_put_32 (stub_bfd
, template_sequence
[i
].data
,
4786 /* Handle cases where the target is encoded within the
4788 if (template_sequence
[i
].r_type
== R_ARM_JUMP24
)
4790 stub_reloc_idx
[nrelocs
] = i
;
4791 stub_reloc_offset
[nrelocs
++] = size
;
4797 bfd_put_32 (stub_bfd
, template_sequence
[i
].data
, loc
+ size
);
4798 stub_reloc_idx
[nrelocs
] = i
;
4799 stub_reloc_offset
[nrelocs
++] = size
;
4810 stub_sec
->size
+= size
;
4812 /* Stub size has already been computed in arm_size_one_stub. Check
4814 BFD_ASSERT (size
== stub_entry
->stub_size
);
4816 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
4817 if (stub_entry
->branch_type
== ST_BRANCH_TO_THUMB
)
4820 /* Assume non empty slots have at least one and at most MAXRELOCS entries
4821 to relocate in each stub. */
4823 (size
== 0 && stub_entry
->stub_type
== arm_stub_cmse_branch_thumb_only
);
4824 BFD_ASSERT (removed_sg_veneer
|| (nrelocs
!= 0 && nrelocs
<= MAXRELOCS
));
4826 for (i
= 0; i
< nrelocs
; i
++)
4828 Elf_Internal_Rela rel
;
4829 bfd_boolean unresolved_reloc
;
4830 char *error_message
;
4832 sym_value
+ template_sequence
[stub_reloc_idx
[i
]].reloc_addend
;
4834 rel
.r_offset
= stub_entry
->stub_offset
+ stub_reloc_offset
[i
];
4835 rel
.r_info
= ELF32_R_INFO (0,
4836 template_sequence
[stub_reloc_idx
[i
]].r_type
);
4839 if (stub_entry
->stub_type
== arm_stub_a8_veneer_b_cond
&& i
== 0)
4840 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
4841 template should refer back to the instruction after the original
4842 branch. We use target_section as Cortex-A8 erratum workaround stubs
4843 are only generated when both source and target are in the same
4845 points_to
= stub_entry
->target_section
->output_section
->vma
4846 + stub_entry
->target_section
->output_offset
4847 + stub_entry
->source_value
;
4849 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4850 (template_sequence
[stub_reloc_idx
[i
]].r_type
),
4851 stub_bfd
, info
->output_bfd
, stub_sec
, stub_sec
->contents
, &rel
,
4852 points_to
, info
, stub_entry
->target_section
, "", STT_FUNC
,
4853 stub_entry
->branch_type
,
4854 (struct elf_link_hash_entry
*) stub_entry
->h
, &unresolved_reloc
,
4862 /* Calculate the template, template size and instruction size for a stub.
4863 Return value is the instruction size. */
4866 find_stub_size_and_template (enum elf32_arm_stub_type stub_type
,
4867 const insn_sequence
**stub_template
,
4868 int *stub_template_size
)
4870 const insn_sequence
*template_sequence
= NULL
;
4871 int template_size
= 0, i
;
4874 template_sequence
= stub_definitions
[stub_type
].template_sequence
;
4876 *stub_template
= template_sequence
;
4878 template_size
= stub_definitions
[stub_type
].template_size
;
4879 if (stub_template_size
)
4880 *stub_template_size
= template_size
;
4883 for (i
= 0; i
< template_size
; i
++)
4885 switch (template_sequence
[i
].type
)
4906 /* As above, but don't actually build the stub. Just bump offset so
4907 we know stub section sizes. */
4910 arm_size_one_stub (struct bfd_hash_entry
*gen_entry
,
4911 void *in_arg ATTRIBUTE_UNUSED
)
4913 struct elf32_arm_stub_hash_entry
*stub_entry
;
4914 const insn_sequence
*template_sequence
;
4915 int template_size
, size
;
4917 /* Massage our args to the form they really have. */
4918 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
4920 BFD_ASSERT((stub_entry
->stub_type
> arm_stub_none
)
4921 && stub_entry
->stub_type
< ARRAY_SIZE(stub_definitions
));
4923 size
= find_stub_size_and_template (stub_entry
->stub_type
, &template_sequence
,
4926 /* Initialized to -1. Null size indicates an empty slot full of zeros. */
4927 if (stub_entry
->stub_template_size
)
4929 stub_entry
->stub_size
= size
;
4930 stub_entry
->stub_template
= template_sequence
;
4931 stub_entry
->stub_template_size
= template_size
;
4934 /* Already accounted for. */
4935 if (stub_entry
->stub_offset
!= (bfd_vma
) -1)
4938 size
= (size
+ 7) & ~7;
4939 stub_entry
->stub_sec
->size
+= size
;
4944 /* External entry points for sizing and building linker stubs. */
4946 /* Set up various things so that we can make a list of input sections
4947 for each output section included in the link. Returns -1 on error,
4948 0 when no stubs will be needed, and 1 on success. */
4951 elf32_arm_setup_section_lists (bfd
*output_bfd
,
4952 struct bfd_link_info
*info
)
4955 unsigned int bfd_count
;
4956 unsigned int top_id
, top_index
;
4958 asection
**input_list
, **list
;
4960 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
4964 if (! is_elf_hash_table (htab
))
4967 /* Count the number of input BFDs and find the top input section id. */
4968 for (input_bfd
= info
->input_bfds
, bfd_count
= 0, top_id
= 0;
4970 input_bfd
= input_bfd
->link
.next
)
4973 for (section
= input_bfd
->sections
;
4975 section
= section
->next
)
4977 if (top_id
< section
->id
)
4978 top_id
= section
->id
;
4981 htab
->bfd_count
= bfd_count
;
4983 amt
= sizeof (struct map_stub
) * (top_id
+ 1);
4984 htab
->stub_group
= (struct map_stub
*) bfd_zmalloc (amt
);
4985 if (htab
->stub_group
== NULL
)
4987 htab
->top_id
= top_id
;
4989 /* We can't use output_bfd->section_count here to find the top output
4990 section index as some sections may have been removed, and
4991 _bfd_strip_section_from_output doesn't renumber the indices. */
4992 for (section
= output_bfd
->sections
, top_index
= 0;
4994 section
= section
->next
)
4996 if (top_index
< section
->index
)
4997 top_index
= section
->index
;
5000 htab
->top_index
= top_index
;
5001 amt
= sizeof (asection
*) * (top_index
+ 1);
5002 input_list
= (asection
**) bfd_malloc (amt
);
5003 htab
->input_list
= input_list
;
5004 if (input_list
== NULL
)
5007 /* For sections we aren't interested in, mark their entries with a
5008 value we can check later. */
5009 list
= input_list
+ top_index
;
5011 *list
= bfd_abs_section_ptr
;
5012 while (list
-- != input_list
);
5014 for (section
= output_bfd
->sections
;
5016 section
= section
->next
)
5018 if ((section
->flags
& SEC_CODE
) != 0)
5019 input_list
[section
->index
] = NULL
;
5025 /* The linker repeatedly calls this function for each input section,
5026 in the order that input sections are linked into output sections.
5027 Build lists of input sections to determine groupings between which
5028 we may insert linker stubs. */
5031 elf32_arm_next_input_section (struct bfd_link_info
*info
,
5034 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
5039 if (isec
->output_section
->index
<= htab
->top_index
)
5041 asection
**list
= htab
->input_list
+ isec
->output_section
->index
;
5043 if (*list
!= bfd_abs_section_ptr
&& (isec
->flags
& SEC_CODE
) != 0)
5045 /* Steal the link_sec pointer for our list. */
5046 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
5047 /* This happens to make the list in reverse order,
5048 which we reverse later. */
5049 PREV_SEC (isec
) = *list
;
5055 /* See whether we can group stub sections together. Grouping stub
5056 sections may result in fewer stubs. More importantly, we need to
5057 put all .init* and .fini* stubs at the end of the .init or
5058 .fini output sections respectively, because glibc splits the
5059 _init and _fini functions into multiple parts. Putting a stub in
5060 the middle of a function is not a good idea. */
5063 group_sections (struct elf32_arm_link_hash_table
*htab
,
5064 bfd_size_type stub_group_size
,
5065 bfd_boolean stubs_always_after_branch
)
5067 asection
**list
= htab
->input_list
;
5071 asection
*tail
= *list
;
5074 if (tail
== bfd_abs_section_ptr
)
5077 /* Reverse the list: we must avoid placing stubs at the
5078 beginning of the section because the beginning of the text
5079 section may be required for an interrupt vector in bare metal
5081 #define NEXT_SEC PREV_SEC
5083 while (tail
!= NULL
)
5085 /* Pop from tail. */
5086 asection
*item
= tail
;
5087 tail
= PREV_SEC (item
);
5090 NEXT_SEC (item
) = head
;
5094 while (head
!= NULL
)
5098 bfd_vma stub_group_start
= head
->output_offset
;
5099 bfd_vma end_of_next
;
5102 while (NEXT_SEC (curr
) != NULL
)
5104 next
= NEXT_SEC (curr
);
5105 end_of_next
= next
->output_offset
+ next
->size
;
5106 if (end_of_next
- stub_group_start
>= stub_group_size
)
5107 /* End of NEXT is too far from start, so stop. */
5109 /* Add NEXT to the group. */
5113 /* OK, the size from the start to the start of CURR is less
5114 than stub_group_size and thus can be handled by one stub
5115 section. (Or the head section is itself larger than
5116 stub_group_size, in which case we may be toast.)
5117 We should really be keeping track of the total size of
5118 stubs added here, as stubs contribute to the final output
5122 next
= NEXT_SEC (head
);
5123 /* Set up this stub group. */
5124 htab
->stub_group
[head
->id
].link_sec
= curr
;
5126 while (head
!= curr
&& (head
= next
) != NULL
);
5128 /* But wait, there's more! Input sections up to stub_group_size
5129 bytes after the stub section can be handled by it too. */
5130 if (!stubs_always_after_branch
)
5132 stub_group_start
= curr
->output_offset
+ curr
->size
;
5134 while (next
!= NULL
)
5136 end_of_next
= next
->output_offset
+ next
->size
;
5137 if (end_of_next
- stub_group_start
>= stub_group_size
)
5138 /* End of NEXT is too far from stubs, so stop. */
5140 /* Add NEXT to the stub group. */
5142 next
= NEXT_SEC (head
);
5143 htab
->stub_group
[head
->id
].link_sec
= curr
;
5149 while (list
++ != htab
->input_list
+ htab
->top_index
);
5151 free (htab
->input_list
);
5156 /* Comparison function for sorting/searching relocations relating to Cortex-A8
5160 a8_reloc_compare (const void *a
, const void *b
)
5162 const struct a8_erratum_reloc
*ra
= (const struct a8_erratum_reloc
*) a
;
5163 const struct a8_erratum_reloc
*rb
= (const struct a8_erratum_reloc
*) b
;
5165 if (ra
->from
< rb
->from
)
5167 else if (ra
->from
> rb
->from
)
5173 static struct elf_link_hash_entry
*find_thumb_glue (struct bfd_link_info
*,
5174 const char *, char **);
5176 /* Helper function to scan code for sequences which might trigger the Cortex-A8
5177 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
5178 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
5182 cortex_a8_erratum_scan (bfd
*input_bfd
,
5183 struct bfd_link_info
*info
,
5184 struct a8_erratum_fix
**a8_fixes_p
,
5185 unsigned int *num_a8_fixes_p
,
5186 unsigned int *a8_fix_table_size_p
,
5187 struct a8_erratum_reloc
*a8_relocs
,
5188 unsigned int num_a8_relocs
,
5189 unsigned prev_num_a8_fixes
,
5190 bfd_boolean
*stub_changed_p
)
5193 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
5194 struct a8_erratum_fix
*a8_fixes
= *a8_fixes_p
;
5195 unsigned int num_a8_fixes
= *num_a8_fixes_p
;
5196 unsigned int a8_fix_table_size
= *a8_fix_table_size_p
;
5201 for (section
= input_bfd
->sections
;
5203 section
= section
->next
)
5205 bfd_byte
*contents
= NULL
;
5206 struct _arm_elf_section_data
*sec_data
;
5210 if (elf_section_type (section
) != SHT_PROGBITS
5211 || (elf_section_flags (section
) & SHF_EXECINSTR
) == 0
5212 || (section
->flags
& SEC_EXCLUDE
) != 0
5213 || (section
->sec_info_type
== SEC_INFO_TYPE_JUST_SYMS
)
5214 || (section
->output_section
== bfd_abs_section_ptr
))
5217 base_vma
= section
->output_section
->vma
+ section
->output_offset
;
5219 if (elf_section_data (section
)->this_hdr
.contents
!= NULL
)
5220 contents
= elf_section_data (section
)->this_hdr
.contents
;
5221 else if (! bfd_malloc_and_get_section (input_bfd
, section
, &contents
))
5224 sec_data
= elf32_arm_section_data (section
);
5226 for (span
= 0; span
< sec_data
->mapcount
; span
++)
5228 unsigned int span_start
= sec_data
->map
[span
].vma
;
5229 unsigned int span_end
= (span
== sec_data
->mapcount
- 1)
5230 ? section
->size
: sec_data
->map
[span
+ 1].vma
;
5232 char span_type
= sec_data
->map
[span
].type
;
5233 bfd_boolean last_was_32bit
= FALSE
, last_was_branch
= FALSE
;
5235 if (span_type
!= 't')
5238 /* Span is entirely within a single 4KB region: skip scanning. */
5239 if (((base_vma
+ span_start
) & ~0xfff)
5240 == ((base_vma
+ span_end
) & ~0xfff))
5243 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
5245 * The opcode is BLX.W, BL.W, B.W, Bcc.W
5246 * The branch target is in the same 4KB region as the
5247 first half of the branch.
5248 * The instruction before the branch is a 32-bit
5249 length non-branch instruction. */
5250 for (i
= span_start
; i
< span_end
;)
5252 unsigned int insn
= bfd_getl16 (&contents
[i
]);
5253 bfd_boolean insn_32bit
= FALSE
, is_blx
= FALSE
, is_b
= FALSE
;
5254 bfd_boolean is_bl
= FALSE
, is_bcc
= FALSE
, is_32bit_branch
;
5256 if ((insn
& 0xe000) == 0xe000 && (insn
& 0x1800) != 0x0000)
5261 /* Load the rest of the insn (in manual-friendly order). */
5262 insn
= (insn
<< 16) | bfd_getl16 (&contents
[i
+ 2]);
5264 /* Encoding T4: B<c>.W. */
5265 is_b
= (insn
& 0xf800d000) == 0xf0009000;
5266 /* Encoding T1: BL<c>.W. */
5267 is_bl
= (insn
& 0xf800d000) == 0xf000d000;
5268 /* Encoding T2: BLX<c>.W. */
5269 is_blx
= (insn
& 0xf800d000) == 0xf000c000;
5270 /* Encoding T3: B<c>.W (not permitted in IT block). */
5271 is_bcc
= (insn
& 0xf800d000) == 0xf0008000
5272 && (insn
& 0x07f00000) != 0x03800000;
5275 is_32bit_branch
= is_b
|| is_bl
|| is_blx
|| is_bcc
;
5277 if (((base_vma
+ i
) & 0xfff) == 0xffe
5281 && ! last_was_branch
)
5283 bfd_signed_vma offset
= 0;
5284 bfd_boolean force_target_arm
= FALSE
;
5285 bfd_boolean force_target_thumb
= FALSE
;
5287 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
5288 struct a8_erratum_reloc key
, *found
;
5289 bfd_boolean use_plt
= FALSE
;
5291 key
.from
= base_vma
+ i
;
5292 found
= (struct a8_erratum_reloc
*)
5293 bsearch (&key
, a8_relocs
, num_a8_relocs
,
5294 sizeof (struct a8_erratum_reloc
),
5299 char *error_message
= NULL
;
5300 struct elf_link_hash_entry
*entry
;
5302 /* We don't care about the error returned from this
5303 function, only if there is glue or not. */
5304 entry
= find_thumb_glue (info
, found
->sym_name
,
5308 found
->non_a8_stub
= TRUE
;
5310 /* Keep a simpler condition, for the sake of clarity. */
5311 if (htab
->root
.splt
!= NULL
&& found
->hash
!= NULL
5312 && found
->hash
->root
.plt
.offset
!= (bfd_vma
) -1)
5315 if (found
->r_type
== R_ARM_THM_CALL
)
5317 if (found
->branch_type
== ST_BRANCH_TO_ARM
5319 force_target_arm
= TRUE
;
5321 force_target_thumb
= TRUE
;
5325 /* Check if we have an offending branch instruction. */
5327 if (found
&& found
->non_a8_stub
)
5328 /* We've already made a stub for this instruction, e.g.
5329 it's a long branch or a Thumb->ARM stub. Assume that
5330 stub will suffice to work around the A8 erratum (see
5331 setting of always_after_branch above). */
5335 offset
= (insn
& 0x7ff) << 1;
5336 offset
|= (insn
& 0x3f0000) >> 4;
5337 offset
|= (insn
& 0x2000) ? 0x40000 : 0;
5338 offset
|= (insn
& 0x800) ? 0x80000 : 0;
5339 offset
|= (insn
& 0x4000000) ? 0x100000 : 0;
5340 if (offset
& 0x100000)
5341 offset
|= ~ ((bfd_signed_vma
) 0xfffff);
5342 stub_type
= arm_stub_a8_veneer_b_cond
;
5344 else if (is_b
|| is_bl
|| is_blx
)
5346 int s
= (insn
& 0x4000000) != 0;
5347 int j1
= (insn
& 0x2000) != 0;
5348 int j2
= (insn
& 0x800) != 0;
5352 offset
= (insn
& 0x7ff) << 1;
5353 offset
|= (insn
& 0x3ff0000) >> 4;
5357 if (offset
& 0x1000000)
5358 offset
|= ~ ((bfd_signed_vma
) 0xffffff);
5361 offset
&= ~ ((bfd_signed_vma
) 3);
5363 stub_type
= is_blx
? arm_stub_a8_veneer_blx
:
5364 is_bl
? arm_stub_a8_veneer_bl
: arm_stub_a8_veneer_b
;
5367 if (stub_type
!= arm_stub_none
)
5369 bfd_vma pc_for_insn
= base_vma
+ i
+ 4;
5371 /* The original instruction is a BL, but the target is
5372 an ARM instruction. If we were not making a stub,
5373 the BL would have been converted to a BLX. Use the
5374 BLX stub instead in that case. */
5375 if (htab
->use_blx
&& force_target_arm
5376 && stub_type
== arm_stub_a8_veneer_bl
)
5378 stub_type
= arm_stub_a8_veneer_blx
;
5382 /* Conversely, if the original instruction was
5383 BLX but the target is Thumb mode, use the BL
5385 else if (force_target_thumb
5386 && stub_type
== arm_stub_a8_veneer_blx
)
5388 stub_type
= arm_stub_a8_veneer_bl
;
5394 pc_for_insn
&= ~ ((bfd_vma
) 3);
5396 /* If we found a relocation, use the proper destination,
5397 not the offset in the (unrelocated) instruction.
5398 Note this is always done if we switched the stub type
5402 (bfd_signed_vma
) (found
->destination
- pc_for_insn
);
5404 /* If the stub will use a Thumb-mode branch to a
5405 PLT target, redirect it to the preceding Thumb
5407 if (stub_type
!= arm_stub_a8_veneer_blx
&& use_plt
)
5408 offset
-= PLT_THUMB_STUB_SIZE
;
5410 target
= pc_for_insn
+ offset
;
5412 /* The BLX stub is ARM-mode code. Adjust the offset to
5413 take the different PC value (+8 instead of +4) into
5415 if (stub_type
== arm_stub_a8_veneer_blx
)
5418 if (((base_vma
+ i
) & ~0xfff) == (target
& ~0xfff))
5420 char *stub_name
= NULL
;
5422 if (num_a8_fixes
== a8_fix_table_size
)
5424 a8_fix_table_size
*= 2;
5425 a8_fixes
= (struct a8_erratum_fix
*)
5426 bfd_realloc (a8_fixes
,
5427 sizeof (struct a8_erratum_fix
)
5428 * a8_fix_table_size
);
5431 if (num_a8_fixes
< prev_num_a8_fixes
)
5433 /* If we're doing a subsequent scan,
5434 check if we've found the same fix as
5435 before, and try and reuse the stub
5437 stub_name
= a8_fixes
[num_a8_fixes
].stub_name
;
5438 if ((a8_fixes
[num_a8_fixes
].section
!= section
)
5439 || (a8_fixes
[num_a8_fixes
].offset
!= i
))
5443 *stub_changed_p
= TRUE
;
5449 stub_name
= (char *) bfd_malloc (8 + 1 + 8 + 1);
5450 if (stub_name
!= NULL
)
5451 sprintf (stub_name
, "%x:%x", section
->id
, i
);
5454 a8_fixes
[num_a8_fixes
].input_bfd
= input_bfd
;
5455 a8_fixes
[num_a8_fixes
].section
= section
;
5456 a8_fixes
[num_a8_fixes
].offset
= i
;
5457 a8_fixes
[num_a8_fixes
].target_offset
=
5459 a8_fixes
[num_a8_fixes
].orig_insn
= insn
;
5460 a8_fixes
[num_a8_fixes
].stub_name
= stub_name
;
5461 a8_fixes
[num_a8_fixes
].stub_type
= stub_type
;
5462 a8_fixes
[num_a8_fixes
].branch_type
=
5463 is_blx
? ST_BRANCH_TO_ARM
: ST_BRANCH_TO_THUMB
;
5470 i
+= insn_32bit
? 4 : 2;
5471 last_was_32bit
= insn_32bit
;
5472 last_was_branch
= is_32bit_branch
;
5476 if (elf_section_data (section
)->this_hdr
.contents
== NULL
)
5480 *a8_fixes_p
= a8_fixes
;
5481 *num_a8_fixes_p
= num_a8_fixes
;
5482 *a8_fix_table_size_p
= a8_fix_table_size
;
5487 /* Create or update a stub entry depending on whether the stub can already be
5488 found in HTAB. The stub is identified by:
5489 - its type STUB_TYPE
5490 - its source branch (note that several can share the same stub) whose
5491 section and relocation (if any) are given by SECTION and IRELA
5493 - its target symbol whose input section, hash, name, value and branch type
5494 are given in SYM_SEC, HASH, SYM_NAME, SYM_VALUE and BRANCH_TYPE
5497 If found, the value of the stub's target symbol is updated from SYM_VALUE
5498 and *NEW_STUB is set to FALSE. Otherwise, *NEW_STUB is set to
5499 TRUE and the stub entry is initialized.
5501 Returns the stub that was created or updated, or NULL if an error
5504 static struct elf32_arm_stub_hash_entry
*
5505 elf32_arm_create_stub (struct elf32_arm_link_hash_table
*htab
,
5506 enum elf32_arm_stub_type stub_type
, asection
*section
,
5507 Elf_Internal_Rela
*irela
, asection
*sym_sec
,
5508 struct elf32_arm_link_hash_entry
*hash
, char *sym_name
,
5509 bfd_vma sym_value
, enum arm_st_branch_type branch_type
,
5510 bfd_boolean
*new_stub
)
5512 const asection
*id_sec
;
5514 struct elf32_arm_stub_hash_entry
*stub_entry
;
5515 unsigned int r_type
;
5516 bfd_boolean sym_claimed
= arm_stub_sym_claimed (stub_type
);
5518 BFD_ASSERT (stub_type
!= arm_stub_none
);
5522 stub_name
= sym_name
;
5526 BFD_ASSERT (section
);
5527 BFD_ASSERT (section
->id
<= htab
->top_id
);
5529 /* Support for grouping stub sections. */
5530 id_sec
= htab
->stub_group
[section
->id
].link_sec
;
5532 /* Get the name of this stub. */
5533 stub_name
= elf32_arm_stub_name (id_sec
, sym_sec
, hash
, irela
,
5539 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
, stub_name
, FALSE
,
5541 /* The proper stub has already been created, just update its value. */
5542 if (stub_entry
!= NULL
)
5546 stub_entry
->target_value
= sym_value
;
5550 stub_entry
= elf32_arm_add_stub (stub_name
, section
, htab
, stub_type
);
5551 if (stub_entry
== NULL
)
5558 stub_entry
->target_value
= sym_value
;
5559 stub_entry
->target_section
= sym_sec
;
5560 stub_entry
->stub_type
= stub_type
;
5561 stub_entry
->h
= hash
;
5562 stub_entry
->branch_type
= branch_type
;
5565 stub_entry
->output_name
= sym_name
;
5568 if (sym_name
== NULL
)
5569 sym_name
= "unnamed";
5570 stub_entry
->output_name
= (char *)
5571 bfd_alloc (htab
->stub_bfd
, sizeof (THUMB2ARM_GLUE_ENTRY_NAME
)
5572 + strlen (sym_name
));
5573 if (stub_entry
->output_name
== NULL
)
5579 /* For historical reasons, use the existing names for ARM-to-Thumb and
5580 Thumb-to-ARM stubs. */
5581 r_type
= ELF32_R_TYPE (irela
->r_info
);
5582 if ((r_type
== (unsigned int) R_ARM_THM_CALL
5583 || r_type
== (unsigned int) R_ARM_THM_JUMP24
5584 || r_type
== (unsigned int) R_ARM_THM_JUMP19
)
5585 && branch_type
== ST_BRANCH_TO_ARM
)
5586 sprintf (stub_entry
->output_name
, THUMB2ARM_GLUE_ENTRY_NAME
, sym_name
);
5587 else if ((r_type
== (unsigned int) R_ARM_CALL
5588 || r_type
== (unsigned int) R_ARM_JUMP24
)
5589 && branch_type
== ST_BRANCH_TO_THUMB
)
5590 sprintf (stub_entry
->output_name
, ARM2THUMB_GLUE_ENTRY_NAME
, sym_name
);
5592 sprintf (stub_entry
->output_name
, STUB_ENTRY_NAME
, sym_name
);
5599 /* Scan symbols in INPUT_BFD to identify secure entry functions needing a
5600 gateway veneer to transition from non secure to secure state and create them
5603 "ARMv8-M Security Extensions: Requirements on Development Tools" document
5604 defines the conditions that govern Secure Gateway veneer creation for a
5605 given symbol <SYM> as follows:
5606 - it has function type
5607 - it has non local binding
5608 - a symbol named __acle_se_<SYM> (called special symbol) exists with the
5609 same type, binding and value as <SYM> (called normal symbol).
5610 An entry function can handle secure state transition itself in which case
5611 its special symbol would have a different value from the normal symbol.
5613 OUT_ATTR gives the output attributes, SYM_HASHES the symbol index to hash
5614 entry mapping while HTAB gives the name to hash entry mapping.
5615 *CMSE_STUB_CREATED is increased by the number of secure gateway veneer
5618 The return value gives whether a stub failed to be allocated. */
5621 cmse_scan (bfd
*input_bfd
, struct elf32_arm_link_hash_table
*htab
,
5622 obj_attribute
*out_attr
, struct elf_link_hash_entry
**sym_hashes
,
5623 int *cmse_stub_created
)
5625 const struct elf_backend_data
*bed
;
5626 Elf_Internal_Shdr
*symtab_hdr
;
5627 unsigned i
, j
, sym_count
, ext_start
;
5628 Elf_Internal_Sym
*cmse_sym
, *local_syms
;
5629 struct elf32_arm_link_hash_entry
*hash
, *cmse_hash
= NULL
;
5630 enum arm_st_branch_type branch_type
;
5631 char *sym_name
, *lsym_name
;
5634 struct elf32_arm_stub_hash_entry
*stub_entry
;
5635 bfd_boolean is_v8m
, new_stub
, cmse_invalid
, ret
= TRUE
;
5637 bed
= get_elf_backend_data (input_bfd
);
5638 symtab_hdr
= &elf_tdata (input_bfd
)->symtab_hdr
;
5639 sym_count
= symtab_hdr
->sh_size
/ bed
->s
->sizeof_sym
;
5640 ext_start
= symtab_hdr
->sh_info
;
5641 is_v8m
= (out_attr
[Tag_CPU_arch
].i
>= TAG_CPU_ARCH_V8M_BASE
5642 && out_attr
[Tag_CPU_arch_profile
].i
== 'M');
5644 local_syms
= (Elf_Internal_Sym
*) symtab_hdr
->contents
;
5645 if (local_syms
== NULL
)
5646 local_syms
= bfd_elf_get_elf_syms (input_bfd
, symtab_hdr
,
5647 symtab_hdr
->sh_info
, 0, NULL
, NULL
,
5649 if (symtab_hdr
->sh_info
&& local_syms
== NULL
)
5653 for (i
= 0; i
< sym_count
; i
++)
5655 cmse_invalid
= FALSE
;
5659 cmse_sym
= &local_syms
[i
];
5660 /* Not a special symbol. */
5661 if (!ARM_GET_SYM_CMSE_SPCL (cmse_sym
->st_target_internal
))
5663 sym_name
= bfd_elf_string_from_elf_section (input_bfd
,
5664 symtab_hdr
->sh_link
,
5666 /* Special symbol with local binding. */
5667 cmse_invalid
= TRUE
;
5671 cmse_hash
= elf32_arm_hash_entry (sym_hashes
[i
- ext_start
]);
5672 sym_name
= (char *) cmse_hash
->root
.root
.root
.string
;
5674 /* Not a special symbol. */
5675 if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash
->root
.target_internal
))
5678 /* Special symbol has incorrect binding or type. */
5679 if ((cmse_hash
->root
.root
.type
!= bfd_link_hash_defined
5680 && cmse_hash
->root
.root
.type
!= bfd_link_hash_defweak
)
5681 || cmse_hash
->root
.type
!= STT_FUNC
)
5682 cmse_invalid
= TRUE
;
5687 _bfd_error_handler (_("%pB: special symbol `%s' only allowed for "
5688 "ARMv8-M architecture or later"),
5689 input_bfd
, sym_name
);
5690 is_v8m
= TRUE
; /* Avoid multiple warning. */
5696 _bfd_error_handler (_("%pB: invalid special symbol `%s'; it must be"
5697 " a global or weak function symbol"),
5698 input_bfd
, sym_name
);
5704 sym_name
+= strlen (CMSE_PREFIX
);
5705 hash
= (struct elf32_arm_link_hash_entry
*)
5706 elf_link_hash_lookup (&(htab
)->root
, sym_name
, FALSE
, FALSE
, TRUE
);
5708 /* No associated normal symbol or it is neither global nor weak. */
5710 || (hash
->root
.root
.type
!= bfd_link_hash_defined
5711 && hash
->root
.root
.type
!= bfd_link_hash_defweak
)
5712 || hash
->root
.type
!= STT_FUNC
)
5714 /* Initialize here to avoid warning about use of possibly
5715 uninitialized variable. */
5720 /* Searching for a normal symbol with local binding. */
5721 for (; j
< ext_start
; j
++)
5724 bfd_elf_string_from_elf_section (input_bfd
,
5725 symtab_hdr
->sh_link
,
5726 local_syms
[j
].st_name
);
5727 if (!strcmp (sym_name
, lsym_name
))
5732 if (hash
|| j
< ext_start
)
5735 (_("%pB: invalid standard symbol `%s'; it must be "
5736 "a global or weak function symbol"),
5737 input_bfd
, sym_name
);
5741 (_("%pB: absent standard symbol `%s'"), input_bfd
, sym_name
);
5747 sym_value
= hash
->root
.root
.u
.def
.value
;
5748 section
= hash
->root
.root
.u
.def
.section
;
5750 if (cmse_hash
->root
.root
.u
.def
.section
!= section
)
5753 (_("%pB: `%s' and its special symbol are in different sections"),
5754 input_bfd
, sym_name
);
5757 if (cmse_hash
->root
.root
.u
.def
.value
!= sym_value
)
5758 continue; /* Ignore: could be an entry function starting with SG. */
5760 /* If this section is a link-once section that will be discarded, then
5761 don't create any stubs. */
5762 if (section
->output_section
== NULL
)
5765 (_("%pB: entry function `%s' not output"), input_bfd
, sym_name
);
5769 if (hash
->root
.size
== 0)
5772 (_("%pB: entry function `%s' is empty"), input_bfd
, sym_name
);
5778 branch_type
= ARM_GET_SYM_BRANCH_TYPE (hash
->root
.target_internal
);
5780 = elf32_arm_create_stub (htab
, arm_stub_cmse_branch_thumb_only
,
5781 NULL
, NULL
, section
, hash
, sym_name
,
5782 sym_value
, branch_type
, &new_stub
);
5784 if (stub_entry
== NULL
)
5788 BFD_ASSERT (new_stub
);
5789 (*cmse_stub_created
)++;
5793 if (!symtab_hdr
->contents
)
5798 /* Return TRUE iff a symbol identified by its linker HASH entry is a secure
5799 code entry function, ie can be called from non secure code without using a
5803 cmse_entry_fct_p (struct elf32_arm_link_hash_entry
*hash
)
5805 bfd_byte contents
[4];
5806 uint32_t first_insn
;
5811 /* Defined symbol of function type. */
5812 if (hash
->root
.root
.type
!= bfd_link_hash_defined
5813 && hash
->root
.root
.type
!= bfd_link_hash_defweak
)
5815 if (hash
->root
.type
!= STT_FUNC
)
5818 /* Read first instruction. */
5819 section
= hash
->root
.root
.u
.def
.section
;
5820 abfd
= section
->owner
;
5821 offset
= hash
->root
.root
.u
.def
.value
- section
->vma
;
5822 if (!bfd_get_section_contents (abfd
, section
, contents
, offset
,
5826 first_insn
= bfd_get_32 (abfd
, contents
);
5828 /* Starts by SG instruction. */
5829 return first_insn
== 0xe97fe97f;
5832 /* Output the name (in symbol table) of the veneer GEN_ENTRY if it is a new
5833 secure gateway veneers (ie. the veneers was not in the input import library)
5834 and there is no output import library (GEN_INFO->out_implib_bfd is NULL. */
5837 arm_list_new_cmse_stub (struct bfd_hash_entry
*gen_entry
, void *gen_info
)
5839 struct elf32_arm_stub_hash_entry
*stub_entry
;
5840 struct bfd_link_info
*info
;
5842 /* Massage our args to the form they really have. */
5843 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
5844 info
= (struct bfd_link_info
*) gen_info
;
5846 if (info
->out_implib_bfd
)
5849 if (stub_entry
->stub_type
!= arm_stub_cmse_branch_thumb_only
)
5852 if (stub_entry
->stub_offset
== (bfd_vma
) -1)
5853 _bfd_error_handler (" %s", stub_entry
->output_name
);
5858 /* Set offset of each secure gateway veneers so that its address remain
5859 identical to the one in the input import library referred by
5860 HTAB->in_implib_bfd. A warning is issued for veneers that disappeared
5861 (present in input import library but absent from the executable being
5862 linked) or if new veneers appeared and there is no output import library
5863 (INFO->out_implib_bfd is NULL and *CMSE_STUB_CREATED is bigger than the
5864 number of secure gateway veneers found in the input import library.
5866 The function returns whether an error occurred. If no error occurred,
5867 *CMSE_STUB_CREATED gives the number of SG veneers created by both cmse_scan
5868 and this function and HTAB->new_cmse_stub_offset is set to the biggest
5869 veneer observed set for new veneers to be layed out after. */
5872 set_cmse_veneer_addr_from_implib (struct bfd_link_info
*info
,
5873 struct elf32_arm_link_hash_table
*htab
,
5874 int *cmse_stub_created
)
5881 asection
*stub_out_sec
;
5882 bfd_boolean ret
= TRUE
;
5883 Elf_Internal_Sym
*intsym
;
5884 const char *out_sec_name
;
5885 bfd_size_type cmse_stub_size
;
5886 asymbol
**sympp
= NULL
, *sym
;
5887 struct elf32_arm_link_hash_entry
*hash
;
5888 const insn_sequence
*cmse_stub_template
;
5889 struct elf32_arm_stub_hash_entry
*stub_entry
;
5890 int cmse_stub_template_size
, new_cmse_stubs_created
= *cmse_stub_created
;
5891 bfd_vma veneer_value
, stub_offset
, next_cmse_stub_offset
;
5892 bfd_vma cmse_stub_array_start
= (bfd_vma
) -1, cmse_stub_sec_vma
= 0;
5894 /* No input secure gateway import library. */
5895 if (!htab
->in_implib_bfd
)
5898 in_implib_bfd
= htab
->in_implib_bfd
;
5899 if (!htab
->cmse_implib
)
5901 _bfd_error_handler (_("%pB: --in-implib only supported for Secure "
5902 "Gateway import libraries"), in_implib_bfd
);
5906 /* Get symbol table size. */
5907 symsize
= bfd_get_symtab_upper_bound (in_implib_bfd
);
5911 /* Read in the input secure gateway import library's symbol table. */
5912 sympp
= (asymbol
**) xmalloc (symsize
);
5913 symcount
= bfd_canonicalize_symtab (in_implib_bfd
, sympp
);
5920 htab
->new_cmse_stub_offset
= 0;
5922 find_stub_size_and_template (arm_stub_cmse_branch_thumb_only
,
5923 &cmse_stub_template
,
5924 &cmse_stub_template_size
);
5926 arm_dedicated_stub_output_section_name (arm_stub_cmse_branch_thumb_only
);
5928 bfd_get_section_by_name (htab
->obfd
, out_sec_name
);
5929 if (stub_out_sec
!= NULL
)
5930 cmse_stub_sec_vma
= stub_out_sec
->vma
;
5932 /* Set addresses of veneers mentionned in input secure gateway import
5933 library's symbol table. */
5934 for (i
= 0; i
< symcount
; i
++)
5938 sym_name
= (char *) bfd_asymbol_name (sym
);
5939 intsym
= &((elf_symbol_type
*) sym
)->internal_elf_sym
;
5941 if (sym
->section
!= bfd_abs_section_ptr
5942 || !(flags
& (BSF_GLOBAL
| BSF_WEAK
))
5943 || (flags
& BSF_FUNCTION
) != BSF_FUNCTION
5944 || (ARM_GET_SYM_BRANCH_TYPE (intsym
->st_target_internal
)
5945 != ST_BRANCH_TO_THUMB
))
5947 _bfd_error_handler (_("%pB: invalid import library entry: `%s'; "
5948 "symbol should be absolute, global and "
5949 "refer to Thumb functions"),
5950 in_implib_bfd
, sym_name
);
5955 veneer_value
= bfd_asymbol_value (sym
);
5956 stub_offset
= veneer_value
- cmse_stub_sec_vma
;
5957 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
, sym_name
,
5959 hash
= (struct elf32_arm_link_hash_entry
*)
5960 elf_link_hash_lookup (&(htab
)->root
, sym_name
, FALSE
, FALSE
, TRUE
);
5962 /* Stub entry should have been created by cmse_scan or the symbol be of
5963 a secure function callable from non secure code. */
5964 if (!stub_entry
&& !hash
)
5966 bfd_boolean new_stub
;
5969 (_("entry function `%s' disappeared from secure code"), sym_name
);
5970 hash
= (struct elf32_arm_link_hash_entry
*)
5971 elf_link_hash_lookup (&(htab
)->root
, sym_name
, TRUE
, TRUE
, TRUE
);
5973 = elf32_arm_create_stub (htab
, arm_stub_cmse_branch_thumb_only
,
5974 NULL
, NULL
, bfd_abs_section_ptr
, hash
,
5975 sym_name
, veneer_value
,
5976 ST_BRANCH_TO_THUMB
, &new_stub
);
5977 if (stub_entry
== NULL
)
5981 BFD_ASSERT (new_stub
);
5982 new_cmse_stubs_created
++;
5983 (*cmse_stub_created
)++;
5985 stub_entry
->stub_template_size
= stub_entry
->stub_size
= 0;
5986 stub_entry
->stub_offset
= stub_offset
;
5988 /* Symbol found is not callable from non secure code. */
5989 else if (!stub_entry
)
5991 if (!cmse_entry_fct_p (hash
))
5993 _bfd_error_handler (_("`%s' refers to a non entry function"),
6001 /* Only stubs for SG veneers should have been created. */
6002 BFD_ASSERT (stub_entry
->stub_type
== arm_stub_cmse_branch_thumb_only
);
6004 /* Check visibility hasn't changed. */
6005 if (!!(flags
& BSF_GLOBAL
)
6006 != (hash
->root
.root
.type
== bfd_link_hash_defined
))
6008 (_("%pB: visibility of symbol `%s' has changed"), in_implib_bfd
,
6011 stub_entry
->stub_offset
= stub_offset
;
6014 /* Size should match that of a SG veneer. */
6015 if (intsym
->st_size
!= cmse_stub_size
)
6017 _bfd_error_handler (_("%pB: incorrect size for symbol `%s'"),
6018 in_implib_bfd
, sym_name
);
6022 /* Previous veneer address is before current SG veneer section. */
6023 if (veneer_value
< cmse_stub_sec_vma
)
6025 /* Avoid offset underflow. */
6027 stub_entry
->stub_offset
= 0;
6032 /* Complain if stub offset not a multiple of stub size. */
6033 if (stub_offset
% cmse_stub_size
)
6036 (_("offset of veneer for entry function `%s' not a multiple of "
6037 "its size"), sym_name
);
6044 new_cmse_stubs_created
--;
6045 if (veneer_value
< cmse_stub_array_start
)
6046 cmse_stub_array_start
= veneer_value
;
6047 next_cmse_stub_offset
= stub_offset
+ ((cmse_stub_size
+ 7) & ~7);
6048 if (next_cmse_stub_offset
> htab
->new_cmse_stub_offset
)
6049 htab
->new_cmse_stub_offset
= next_cmse_stub_offset
;
6052 if (!info
->out_implib_bfd
&& new_cmse_stubs_created
!= 0)
6054 BFD_ASSERT (new_cmse_stubs_created
> 0);
6056 (_("new entry function(s) introduced but no output import library "
6058 bfd_hash_traverse (&htab
->stub_hash_table
, arm_list_new_cmse_stub
, info
);
6061 if (cmse_stub_array_start
!= cmse_stub_sec_vma
)
6064 (_("start address of `%s' is different from previous link"),
6074 /* Determine and set the size of the stub section for a final link.
6076 The basic idea here is to examine all the relocations looking for
6077 PC-relative calls to a target that is unreachable with a "bl"
6081 elf32_arm_size_stubs (bfd
*output_bfd
,
6083 struct bfd_link_info
*info
,
6084 bfd_signed_vma group_size
,
6085 asection
* (*add_stub_section
) (const char *, asection
*,
6088 void (*layout_sections_again
) (void))
6090 bfd_boolean ret
= TRUE
;
6091 obj_attribute
*out_attr
;
6092 int cmse_stub_created
= 0;
6093 bfd_size_type stub_group_size
;
6094 bfd_boolean m_profile
, stubs_always_after_branch
, first_veneer_scan
= TRUE
;
6095 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
6096 struct a8_erratum_fix
*a8_fixes
= NULL
;
6097 unsigned int num_a8_fixes
= 0, a8_fix_table_size
= 10;
6098 struct a8_erratum_reloc
*a8_relocs
= NULL
;
6099 unsigned int num_a8_relocs
= 0, a8_reloc_table_size
= 10, i
;
6104 if (htab
->fix_cortex_a8
)
6106 a8_fixes
= (struct a8_erratum_fix
*)
6107 bfd_zmalloc (sizeof (struct a8_erratum_fix
) * a8_fix_table_size
);
6108 a8_relocs
= (struct a8_erratum_reloc
*)
6109 bfd_zmalloc (sizeof (struct a8_erratum_reloc
) * a8_reloc_table_size
);
6112 /* Propagate mach to stub bfd, because it may not have been
6113 finalized when we created stub_bfd. */
6114 bfd_set_arch_mach (stub_bfd
, bfd_get_arch (output_bfd
),
6115 bfd_get_mach (output_bfd
));
6117 /* Stash our params away. */
6118 htab
->stub_bfd
= stub_bfd
;
6119 htab
->add_stub_section
= add_stub_section
;
6120 htab
->layout_sections_again
= layout_sections_again
;
6121 stubs_always_after_branch
= group_size
< 0;
6123 out_attr
= elf_known_obj_attributes_proc (output_bfd
);
6124 m_profile
= out_attr
[Tag_CPU_arch_profile
].i
== 'M';
6126 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
6127 as the first half of a 32-bit branch straddling two 4K pages. This is a
6128 crude way of enforcing that. */
6129 if (htab
->fix_cortex_a8
)
6130 stubs_always_after_branch
= 1;
6133 stub_group_size
= -group_size
;
6135 stub_group_size
= group_size
;
6137 if (stub_group_size
== 1)
6139 /* Default values. */
6140 /* Thumb branch range is +-4MB has to be used as the default
6141 maximum size (a given section can contain both ARM and Thumb
6142 code, so the worst case has to be taken into account).
6144 This value is 24K less than that, which allows for 2025
6145 12-byte stubs. If we exceed that, then we will fail to link.
6146 The user will have to relink with an explicit group size
6148 stub_group_size
= 4170000;
6151 group_sections (htab
, stub_group_size
, stubs_always_after_branch
);
6153 /* If we're applying the cortex A8 fix, we need to determine the
6154 program header size now, because we cannot change it later --
6155 that could alter section placements. Notice the A8 erratum fix
6156 ends up requiring the section addresses to remain unchanged
6157 modulo the page size. That's something we cannot represent
6158 inside BFD, and we don't want to force the section alignment to
6159 be the page size. */
6160 if (htab
->fix_cortex_a8
)
6161 (*htab
->layout_sections_again
) ();
6166 unsigned int bfd_indx
;
6168 enum elf32_arm_stub_type stub_type
;
6169 bfd_boolean stub_changed
= FALSE
;
6170 unsigned prev_num_a8_fixes
= num_a8_fixes
;
6173 for (input_bfd
= info
->input_bfds
, bfd_indx
= 0;
6175 input_bfd
= input_bfd
->link
.next
, bfd_indx
++)
6177 Elf_Internal_Shdr
*symtab_hdr
;
6179 Elf_Internal_Sym
*local_syms
= NULL
;
6181 if (!is_arm_elf (input_bfd
))
6186 /* We'll need the symbol table in a second. */
6187 symtab_hdr
= &elf_tdata (input_bfd
)->symtab_hdr
;
6188 if (symtab_hdr
->sh_info
== 0)
6191 /* Limit scan of symbols to object file whose profile is
6192 Microcontroller to not hinder performance in the general case. */
6193 if (m_profile
&& first_veneer_scan
)
6195 struct elf_link_hash_entry
**sym_hashes
;
6197 sym_hashes
= elf_sym_hashes (input_bfd
);
6198 if (!cmse_scan (input_bfd
, htab
, out_attr
, sym_hashes
,
6199 &cmse_stub_created
))
6200 goto error_ret_free_local
;
6202 if (cmse_stub_created
!= 0)
6203 stub_changed
= TRUE
;
6206 /* Walk over each section attached to the input bfd. */
6207 for (section
= input_bfd
->sections
;
6209 section
= section
->next
)
6211 Elf_Internal_Rela
*internal_relocs
, *irelaend
, *irela
;
6213 /* If there aren't any relocs, then there's nothing more
6215 if ((section
->flags
& SEC_RELOC
) == 0
6216 || section
->reloc_count
== 0
6217 || (section
->flags
& SEC_CODE
) == 0)
6220 /* If this section is a link-once section that will be
6221 discarded, then don't create any stubs. */
6222 if (section
->output_section
== NULL
6223 || section
->output_section
->owner
!= output_bfd
)
6226 /* Get the relocs. */
6228 = _bfd_elf_link_read_relocs (input_bfd
, section
, NULL
,
6229 NULL
, info
->keep_memory
);
6230 if (internal_relocs
== NULL
)
6231 goto error_ret_free_local
;
6233 /* Now examine each relocation. */
6234 irela
= internal_relocs
;
6235 irelaend
= irela
+ section
->reloc_count
;
6236 for (; irela
< irelaend
; irela
++)
6238 unsigned int r_type
, r_indx
;
6241 bfd_vma destination
;
6242 struct elf32_arm_link_hash_entry
*hash
;
6243 const char *sym_name
;
6244 unsigned char st_type
;
6245 enum arm_st_branch_type branch_type
;
6246 bfd_boolean created_stub
= FALSE
;
6248 r_type
= ELF32_R_TYPE (irela
->r_info
);
6249 r_indx
= ELF32_R_SYM (irela
->r_info
);
6251 if (r_type
>= (unsigned int) R_ARM_max
)
6253 bfd_set_error (bfd_error_bad_value
);
6254 error_ret_free_internal
:
6255 if (elf_section_data (section
)->relocs
== NULL
)
6256 free (internal_relocs
);
6258 error_ret_free_local
:
6259 if (local_syms
!= NULL
6260 && (symtab_hdr
->contents
6261 != (unsigned char *) local_syms
))
6267 if (r_indx
>= symtab_hdr
->sh_info
)
6268 hash
= elf32_arm_hash_entry
6269 (elf_sym_hashes (input_bfd
)
6270 [r_indx
- symtab_hdr
->sh_info
]);
6272 /* Only look for stubs on branch instructions, or
6273 non-relaxed TLSCALL */
6274 if ((r_type
!= (unsigned int) R_ARM_CALL
)
6275 && (r_type
!= (unsigned int) R_ARM_THM_CALL
)
6276 && (r_type
!= (unsigned int) R_ARM_JUMP24
)
6277 && (r_type
!= (unsigned int) R_ARM_THM_JUMP19
)
6278 && (r_type
!= (unsigned int) R_ARM_THM_XPC22
)
6279 && (r_type
!= (unsigned int) R_ARM_THM_JUMP24
)
6280 && (r_type
!= (unsigned int) R_ARM_PLT32
)
6281 && !((r_type
== (unsigned int) R_ARM_TLS_CALL
6282 || r_type
== (unsigned int) R_ARM_THM_TLS_CALL
)
6283 && r_type
== elf32_arm_tls_transition
6284 (info
, r_type
, &hash
->root
)
6285 && ((hash
? hash
->tls_type
6286 : (elf32_arm_local_got_tls_type
6287 (input_bfd
)[r_indx
]))
6288 & GOT_TLS_GDESC
) != 0))
6291 /* Now determine the call target, its name, value,
6298 if (r_type
== (unsigned int) R_ARM_TLS_CALL
6299 || r_type
== (unsigned int) R_ARM_THM_TLS_CALL
)
6301 /* A non-relaxed TLS call. The target is the
6302 plt-resident trampoline and nothing to do
6304 BFD_ASSERT (htab
->tls_trampoline
> 0);
6305 sym_sec
= htab
->root
.splt
;
6306 sym_value
= htab
->tls_trampoline
;
6309 branch_type
= ST_BRANCH_TO_ARM
;
6313 /* It's a local symbol. */
6314 Elf_Internal_Sym
*sym
;
6316 if (local_syms
== NULL
)
6319 = (Elf_Internal_Sym
*) symtab_hdr
->contents
;
6320 if (local_syms
== NULL
)
6322 = bfd_elf_get_elf_syms (input_bfd
, symtab_hdr
,
6323 symtab_hdr
->sh_info
, 0,
6325 if (local_syms
== NULL
)
6326 goto error_ret_free_internal
;
6329 sym
= local_syms
+ r_indx
;
6330 if (sym
->st_shndx
== SHN_UNDEF
)
6331 sym_sec
= bfd_und_section_ptr
;
6332 else if (sym
->st_shndx
== SHN_ABS
)
6333 sym_sec
= bfd_abs_section_ptr
;
6334 else if (sym
->st_shndx
== SHN_COMMON
)
6335 sym_sec
= bfd_com_section_ptr
;
6338 bfd_section_from_elf_index (input_bfd
, sym
->st_shndx
);
6341 /* This is an undefined symbol. It can never
6345 if (ELF_ST_TYPE (sym
->st_info
) != STT_SECTION
)
6346 sym_value
= sym
->st_value
;
6347 destination
= (sym_value
+ irela
->r_addend
6348 + sym_sec
->output_offset
6349 + sym_sec
->output_section
->vma
);
6350 st_type
= ELF_ST_TYPE (sym
->st_info
);
6352 ARM_GET_SYM_BRANCH_TYPE (sym
->st_target_internal
);
6354 = bfd_elf_string_from_elf_section (input_bfd
,
6355 symtab_hdr
->sh_link
,
6360 /* It's an external symbol. */
6361 while (hash
->root
.root
.type
== bfd_link_hash_indirect
6362 || hash
->root
.root
.type
== bfd_link_hash_warning
)
6363 hash
= ((struct elf32_arm_link_hash_entry
*)
6364 hash
->root
.root
.u
.i
.link
);
6366 if (hash
->root
.root
.type
== bfd_link_hash_defined
6367 || hash
->root
.root
.type
== bfd_link_hash_defweak
)
6369 sym_sec
= hash
->root
.root
.u
.def
.section
;
6370 sym_value
= hash
->root
.root
.u
.def
.value
;
6372 struct elf32_arm_link_hash_table
*globals
=
6373 elf32_arm_hash_table (info
);
6375 /* For a destination in a shared library,
6376 use the PLT stub as target address to
6377 decide whether a branch stub is
6380 && globals
->root
.splt
!= NULL
6382 && hash
->root
.plt
.offset
!= (bfd_vma
) -1)
6384 sym_sec
= globals
->root
.splt
;
6385 sym_value
= hash
->root
.plt
.offset
;
6386 if (sym_sec
->output_section
!= NULL
)
6387 destination
= (sym_value
6388 + sym_sec
->output_offset
6389 + sym_sec
->output_section
->vma
);
6391 else if (sym_sec
->output_section
!= NULL
)
6392 destination
= (sym_value
+ irela
->r_addend
6393 + sym_sec
->output_offset
6394 + sym_sec
->output_section
->vma
);
6396 else if ((hash
->root
.root
.type
== bfd_link_hash_undefined
)
6397 || (hash
->root
.root
.type
== bfd_link_hash_undefweak
))
6399 /* For a shared library, use the PLT stub as
6400 target address to decide whether a long
6401 branch stub is needed.
6402 For absolute code, they cannot be handled. */
6403 struct elf32_arm_link_hash_table
*globals
=
6404 elf32_arm_hash_table (info
);
6407 && globals
->root
.splt
!= NULL
6409 && hash
->root
.plt
.offset
!= (bfd_vma
) -1)
6411 sym_sec
= globals
->root
.splt
;
6412 sym_value
= hash
->root
.plt
.offset
;
6413 if (sym_sec
->output_section
!= NULL
)
6414 destination
= (sym_value
6415 + sym_sec
->output_offset
6416 + sym_sec
->output_section
->vma
);
6423 bfd_set_error (bfd_error_bad_value
);
6424 goto error_ret_free_internal
;
6426 st_type
= hash
->root
.type
;
6428 ARM_GET_SYM_BRANCH_TYPE (hash
->root
.target_internal
);
6429 sym_name
= hash
->root
.root
.root
.string
;
6434 bfd_boolean new_stub
;
6435 struct elf32_arm_stub_hash_entry
*stub_entry
;
6437 /* Determine what (if any) linker stub is needed. */
6438 stub_type
= arm_type_of_stub (info
, section
, irela
,
6439 st_type
, &branch_type
,
6440 hash
, destination
, sym_sec
,
6441 input_bfd
, sym_name
);
6442 if (stub_type
== arm_stub_none
)
6445 /* We've either created a stub for this reloc already,
6446 or we are about to. */
6448 elf32_arm_create_stub (htab
, stub_type
, section
, irela
,
6450 (char *) sym_name
, sym_value
,
6451 branch_type
, &new_stub
);
6453 created_stub
= stub_entry
!= NULL
;
6455 goto error_ret_free_internal
;
6459 stub_changed
= TRUE
;
6463 /* Look for relocations which might trigger Cortex-A8
6465 if (htab
->fix_cortex_a8
6466 && (r_type
== (unsigned int) R_ARM_THM_JUMP24
6467 || r_type
== (unsigned int) R_ARM_THM_JUMP19
6468 || r_type
== (unsigned int) R_ARM_THM_CALL
6469 || r_type
== (unsigned int) R_ARM_THM_XPC22
))
6471 bfd_vma from
= section
->output_section
->vma
6472 + section
->output_offset
6475 if ((from
& 0xfff) == 0xffe)
6477 /* Found a candidate. Note we haven't checked the
6478 destination is within 4K here: if we do so (and
6479 don't create an entry in a8_relocs) we can't tell
6480 that a branch should have been relocated when
6482 if (num_a8_relocs
== a8_reloc_table_size
)
6484 a8_reloc_table_size
*= 2;
6485 a8_relocs
= (struct a8_erratum_reloc
*)
6486 bfd_realloc (a8_relocs
,
6487 sizeof (struct a8_erratum_reloc
)
6488 * a8_reloc_table_size
);
6491 a8_relocs
[num_a8_relocs
].from
= from
;
6492 a8_relocs
[num_a8_relocs
].destination
= destination
;
6493 a8_relocs
[num_a8_relocs
].r_type
= r_type
;
6494 a8_relocs
[num_a8_relocs
].branch_type
= branch_type
;
6495 a8_relocs
[num_a8_relocs
].sym_name
= sym_name
;
6496 a8_relocs
[num_a8_relocs
].non_a8_stub
= created_stub
;
6497 a8_relocs
[num_a8_relocs
].hash
= hash
;
6504 /* We're done with the internal relocs, free them. */
6505 if (elf_section_data (section
)->relocs
== NULL
)
6506 free (internal_relocs
);
6509 if (htab
->fix_cortex_a8
)
6511 /* Sort relocs which might apply to Cortex-A8 erratum. */
6512 qsort (a8_relocs
, num_a8_relocs
,
6513 sizeof (struct a8_erratum_reloc
),
6516 /* Scan for branches which might trigger Cortex-A8 erratum. */
6517 if (cortex_a8_erratum_scan (input_bfd
, info
, &a8_fixes
,
6518 &num_a8_fixes
, &a8_fix_table_size
,
6519 a8_relocs
, num_a8_relocs
,
6520 prev_num_a8_fixes
, &stub_changed
)
6522 goto error_ret_free_local
;
6525 if (local_syms
!= NULL
6526 && symtab_hdr
->contents
!= (unsigned char *) local_syms
)
6528 if (!info
->keep_memory
)
6531 symtab_hdr
->contents
= (unsigned char *) local_syms
;
6535 if (first_veneer_scan
6536 && !set_cmse_veneer_addr_from_implib (info
, htab
,
6537 &cmse_stub_created
))
6540 if (prev_num_a8_fixes
!= num_a8_fixes
)
6541 stub_changed
= TRUE
;
6546 /* OK, we've added some stubs. Find out the new size of the
6548 for (stub_sec
= htab
->stub_bfd
->sections
;
6550 stub_sec
= stub_sec
->next
)
6552 /* Ignore non-stub sections. */
6553 if (!strstr (stub_sec
->name
, STUB_SUFFIX
))
6559 /* Add new SG veneers after those already in the input import
6561 for (stub_type
= arm_stub_none
+ 1; stub_type
< max_stub_type
;
6564 bfd_vma
*start_offset_p
;
6565 asection
**stub_sec_p
;
6567 start_offset_p
= arm_new_stubs_start_offset_ptr (htab
, stub_type
);
6568 stub_sec_p
= arm_dedicated_stub_input_section_ptr (htab
, stub_type
);
6569 if (start_offset_p
== NULL
)
6572 BFD_ASSERT (stub_sec_p
!= NULL
);
6573 if (*stub_sec_p
!= NULL
)
6574 (*stub_sec_p
)->size
= *start_offset_p
;
6577 /* Compute stub section size, considering padding. */
6578 bfd_hash_traverse (&htab
->stub_hash_table
, arm_size_one_stub
, htab
);
6579 for (stub_type
= arm_stub_none
+ 1; stub_type
< max_stub_type
;
6583 asection
**stub_sec_p
;
6585 padding
= arm_dedicated_stub_section_padding (stub_type
);
6586 stub_sec_p
= arm_dedicated_stub_input_section_ptr (htab
, stub_type
);
6587 /* Skip if no stub input section or no stub section padding
6589 if ((stub_sec_p
!= NULL
&& *stub_sec_p
== NULL
) || padding
== 0)
6591 /* Stub section padding required but no dedicated section. */
6592 BFD_ASSERT (stub_sec_p
);
6594 size
= (*stub_sec_p
)->size
;
6595 size
= (size
+ padding
- 1) & ~(padding
- 1);
6596 (*stub_sec_p
)->size
= size
;
6599 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
6600 if (htab
->fix_cortex_a8
)
6601 for (i
= 0; i
< num_a8_fixes
; i
++)
6603 stub_sec
= elf32_arm_create_or_find_stub_sec (NULL
,
6604 a8_fixes
[i
].section
, htab
, a8_fixes
[i
].stub_type
);
6606 if (stub_sec
== NULL
)
6610 += find_stub_size_and_template (a8_fixes
[i
].stub_type
, NULL
,
6615 /* Ask the linker to do its stuff. */
6616 (*htab
->layout_sections_again
) ();
6617 first_veneer_scan
= FALSE
;
6620 /* Add stubs for Cortex-A8 erratum fixes now. */
6621 if (htab
->fix_cortex_a8
)
6623 for (i
= 0; i
< num_a8_fixes
; i
++)
6625 struct elf32_arm_stub_hash_entry
*stub_entry
;
6626 char *stub_name
= a8_fixes
[i
].stub_name
;
6627 asection
*section
= a8_fixes
[i
].section
;
6628 unsigned int section_id
= a8_fixes
[i
].section
->id
;
6629 asection
*link_sec
= htab
->stub_group
[section_id
].link_sec
;
6630 asection
*stub_sec
= htab
->stub_group
[section_id
].stub_sec
;
6631 const insn_sequence
*template_sequence
;
6632 int template_size
, size
= 0;
6634 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
, stub_name
,
6636 if (stub_entry
== NULL
)
6638 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
6639 section
->owner
, stub_name
);
6643 stub_entry
->stub_sec
= stub_sec
;
6644 stub_entry
->stub_offset
= (bfd_vma
) -1;
6645 stub_entry
->id_sec
= link_sec
;
6646 stub_entry
->stub_type
= a8_fixes
[i
].stub_type
;
6647 stub_entry
->source_value
= a8_fixes
[i
].offset
;
6648 stub_entry
->target_section
= a8_fixes
[i
].section
;
6649 stub_entry
->target_value
= a8_fixes
[i
].target_offset
;
6650 stub_entry
->orig_insn
= a8_fixes
[i
].orig_insn
;
6651 stub_entry
->branch_type
= a8_fixes
[i
].branch_type
;
6653 size
= find_stub_size_and_template (a8_fixes
[i
].stub_type
,
6657 stub_entry
->stub_size
= size
;
6658 stub_entry
->stub_template
= template_sequence
;
6659 stub_entry
->stub_template_size
= template_size
;
6662 /* Stash the Cortex-A8 erratum fix array for use later in
6663 elf32_arm_write_section(). */
6664 htab
->a8_erratum_fixes
= a8_fixes
;
6665 htab
->num_a8_erratum_fixes
= num_a8_fixes
;
6669 htab
->a8_erratum_fixes
= NULL
;
6670 htab
->num_a8_erratum_fixes
= 0;
6675 /* Build all the stubs associated with the current output file. The
6676 stubs are kept in a hash table attached to the main linker hash
6677 table. We also set up the .plt entries for statically linked PIC
6678 functions here. This function is called via arm_elf_finish in the
6682 elf32_arm_build_stubs (struct bfd_link_info
*info
)
6685 struct bfd_hash_table
*table
;
6686 enum elf32_arm_stub_type stub_type
;
6687 struct elf32_arm_link_hash_table
*htab
;
6689 htab
= elf32_arm_hash_table (info
);
6693 for (stub_sec
= htab
->stub_bfd
->sections
;
6695 stub_sec
= stub_sec
->next
)
6699 /* Ignore non-stub sections. */
6700 if (!strstr (stub_sec
->name
, STUB_SUFFIX
))
6703 /* Allocate memory to hold the linker stubs. Zeroing the stub sections
6704 must at least be done for stub section requiring padding and for SG
6705 veneers to ensure that a non secure code branching to a removed SG
6706 veneer causes an error. */
6707 size
= stub_sec
->size
;
6708 stub_sec
->contents
= (unsigned char *) bfd_zalloc (htab
->stub_bfd
, size
);
6709 if (stub_sec
->contents
== NULL
&& size
!= 0)
6715 /* Add new SG veneers after those already in the input import library. */
6716 for (stub_type
= arm_stub_none
+ 1; stub_type
< max_stub_type
; stub_type
++)
6718 bfd_vma
*start_offset_p
;
6719 asection
**stub_sec_p
;
6721 start_offset_p
= arm_new_stubs_start_offset_ptr (htab
, stub_type
);
6722 stub_sec_p
= arm_dedicated_stub_input_section_ptr (htab
, stub_type
);
6723 if (start_offset_p
== NULL
)
6726 BFD_ASSERT (stub_sec_p
!= NULL
);
6727 if (*stub_sec_p
!= NULL
)
6728 (*stub_sec_p
)->size
= *start_offset_p
;
6731 /* Build the stubs as directed by the stub hash table. */
6732 table
= &htab
->stub_hash_table
;
6733 bfd_hash_traverse (table
, arm_build_one_stub
, info
);
6734 if (htab
->fix_cortex_a8
)
6736 /* Place the cortex a8 stubs last. */
6737 htab
->fix_cortex_a8
= -1;
6738 bfd_hash_traverse (table
, arm_build_one_stub
, info
);
6744 /* Locate the Thumb encoded calling stub for NAME. */
6746 static struct elf_link_hash_entry
*
6747 find_thumb_glue (struct bfd_link_info
*link_info
,
6749 char **error_message
)
6752 struct elf_link_hash_entry
*hash
;
6753 struct elf32_arm_link_hash_table
*hash_table
;
6755 /* We need a pointer to the armelf specific hash table. */
6756 hash_table
= elf32_arm_hash_table (link_info
);
6757 if (hash_table
== NULL
)
6760 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen (name
)
6761 + strlen (THUMB2ARM_GLUE_ENTRY_NAME
) + 1);
6763 BFD_ASSERT (tmp_name
);
6765 sprintf (tmp_name
, THUMB2ARM_GLUE_ENTRY_NAME
, name
);
6767 hash
= elf_link_hash_lookup
6768 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
6771 && asprintf (error_message
, _("unable to find %s glue '%s' for '%s'"),
6772 "Thumb", tmp_name
, name
) == -1)
6773 *error_message
= (char *) bfd_errmsg (bfd_error_system_call
);
6780 /* Locate the ARM encoded calling stub for NAME. */
6782 static struct elf_link_hash_entry
*
6783 find_arm_glue (struct bfd_link_info
*link_info
,
6785 char **error_message
)
6788 struct elf_link_hash_entry
*myh
;
6789 struct elf32_arm_link_hash_table
*hash_table
;
6791 /* We need a pointer to the elfarm specific hash table. */
6792 hash_table
= elf32_arm_hash_table (link_info
);
6793 if (hash_table
== NULL
)
6796 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen (name
)
6797 + strlen (ARM2THUMB_GLUE_ENTRY_NAME
) + 1);
6799 BFD_ASSERT (tmp_name
);
6801 sprintf (tmp_name
, ARM2THUMB_GLUE_ENTRY_NAME
, name
);
6803 myh
= elf_link_hash_lookup
6804 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
6807 && asprintf (error_message
, _("unable to find %s glue '%s' for '%s'"),
6808 "ARM", tmp_name
, name
) == -1)
6809 *error_message
= (char *) bfd_errmsg (bfd_error_system_call
);
6816 /* ARM->Thumb glue (static images):
6820 ldr r12, __func_addr
6823 .word func @ behave as if you saw a ARM_32 reloc.
6830 .word func @ behave as if you saw a ARM_32 reloc.
6832 (relocatable images)
6835 ldr r12, __func_offset
6841 #define ARM2THUMB_STATIC_GLUE_SIZE 12
6842 static const insn32 a2t1_ldr_insn
= 0xe59fc000;
6843 static const insn32 a2t2_bx_r12_insn
= 0xe12fff1c;
6844 static const insn32 a2t3_func_addr_insn
= 0x00000001;
6846 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
6847 static const insn32 a2t1v5_ldr_insn
= 0xe51ff004;
6848 static const insn32 a2t2v5_func_addr_insn
= 0x00000001;
6850 #define ARM2THUMB_PIC_GLUE_SIZE 16
6851 static const insn32 a2t1p_ldr_insn
= 0xe59fc004;
6852 static const insn32 a2t2p_add_pc_insn
= 0xe08cc00f;
6853 static const insn32 a2t3p_bx_r12_insn
= 0xe12fff1c;
6855 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
6859 __func_from_thumb: __func_from_thumb:
6861 nop ldr r6, __func_addr
6871 #define THUMB2ARM_GLUE_SIZE 8
6872 static const insn16 t2a1_bx_pc_insn
= 0x4778;
6873 static const insn16 t2a2_noop_insn
= 0x46c0;
6874 static const insn32 t2a3_b_insn
= 0xea000000;
6876 #define VFP11_ERRATUM_VENEER_SIZE 8
6877 #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16
6878 #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24
6880 #define ARM_BX_VENEER_SIZE 12
6881 static const insn32 armbx1_tst_insn
= 0xe3100001;
6882 static const insn32 armbx2_moveq_insn
= 0x01a0f000;
6883 static const insn32 armbx3_bx_insn
= 0xe12fff10;
6885 #ifndef ELFARM_NABI_C_INCLUDED
6887 arm_allocate_glue_section_space (bfd
* abfd
, bfd_size_type size
, const char * name
)
6890 bfd_byte
* contents
;
6894 /* Do not include empty glue sections in the output. */
6897 s
= bfd_get_linker_section (abfd
, name
);
6899 s
->flags
|= SEC_EXCLUDE
;
6904 BFD_ASSERT (abfd
!= NULL
);
6906 s
= bfd_get_linker_section (abfd
, name
);
6907 BFD_ASSERT (s
!= NULL
);
6909 contents
= (bfd_byte
*) bfd_alloc (abfd
, size
);
6911 BFD_ASSERT (s
->size
== size
);
6912 s
->contents
= contents
;
6916 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info
* info
)
6918 struct elf32_arm_link_hash_table
* globals
;
6920 globals
= elf32_arm_hash_table (info
);
6921 BFD_ASSERT (globals
!= NULL
);
6923 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
6924 globals
->arm_glue_size
,
6925 ARM2THUMB_GLUE_SECTION_NAME
);
6927 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
6928 globals
->thumb_glue_size
,
6929 THUMB2ARM_GLUE_SECTION_NAME
);
6931 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
6932 globals
->vfp11_erratum_glue_size
,
6933 VFP11_ERRATUM_VENEER_SECTION_NAME
);
6935 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
6936 globals
->stm32l4xx_erratum_glue_size
,
6937 STM32L4XX_ERRATUM_VENEER_SECTION_NAME
);
6939 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
6940 globals
->bx_glue_size
,
6941 ARM_BX_GLUE_SECTION_NAME
);
6946 /* Allocate space and symbols for calling a Thumb function from Arm mode.
6947 returns the symbol identifying the stub. */
6949 static struct elf_link_hash_entry
*
6950 record_arm_to_thumb_glue (struct bfd_link_info
* link_info
,
6951 struct elf_link_hash_entry
* h
)
6953 const char * name
= h
->root
.root
.string
;
6956 struct elf_link_hash_entry
* myh
;
6957 struct bfd_link_hash_entry
* bh
;
6958 struct elf32_arm_link_hash_table
* globals
;
6962 globals
= elf32_arm_hash_table (link_info
);
6963 BFD_ASSERT (globals
!= NULL
);
6964 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
6966 s
= bfd_get_linker_section
6967 (globals
->bfd_of_glue_owner
, ARM2THUMB_GLUE_SECTION_NAME
);
6969 BFD_ASSERT (s
!= NULL
);
6971 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen (name
)
6972 + strlen (ARM2THUMB_GLUE_ENTRY_NAME
) + 1);
6974 BFD_ASSERT (tmp_name
);
6976 sprintf (tmp_name
, ARM2THUMB_GLUE_ENTRY_NAME
, name
);
6978 myh
= elf_link_hash_lookup
6979 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
6983 /* We've already seen this guy. */
6988 /* The only trick here is using hash_table->arm_glue_size as the value.
6989 Even though the section isn't allocated yet, this is where we will be
6990 putting it. The +1 on the value marks that the stub has not been
6991 output yet - not that it is a Thumb function. */
6993 val
= globals
->arm_glue_size
+ 1;
6994 _bfd_generic_link_add_one_symbol (link_info
, globals
->bfd_of_glue_owner
,
6995 tmp_name
, BSF_GLOBAL
, s
, val
,
6996 NULL
, TRUE
, FALSE
, &bh
);
6998 myh
= (struct elf_link_hash_entry
*) bh
;
6999 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
7000 myh
->forced_local
= 1;
7004 if (bfd_link_pic (link_info
)
7005 || globals
->root
.is_relocatable_executable
7006 || globals
->pic_veneer
)
7007 size
= ARM2THUMB_PIC_GLUE_SIZE
;
7008 else if (globals
->use_blx
)
7009 size
= ARM2THUMB_V5_STATIC_GLUE_SIZE
;
7011 size
= ARM2THUMB_STATIC_GLUE_SIZE
;
7014 globals
->arm_glue_size
+= size
;
7019 /* Allocate space for ARMv4 BX veneers. */
7022 record_arm_bx_glue (struct bfd_link_info
* link_info
, int reg
)
7025 struct elf32_arm_link_hash_table
*globals
;
7027 struct elf_link_hash_entry
*myh
;
7028 struct bfd_link_hash_entry
*bh
;
7031 /* BX PC does not need a veneer. */
7035 globals
= elf32_arm_hash_table (link_info
);
7036 BFD_ASSERT (globals
!= NULL
);
7037 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
7039 /* Check if this veneer has already been allocated. */
7040 if (globals
->bx_glue_offset
[reg
])
7043 s
= bfd_get_linker_section
7044 (globals
->bfd_of_glue_owner
, ARM_BX_GLUE_SECTION_NAME
);
7046 BFD_ASSERT (s
!= NULL
);
7048 /* Add symbol for veneer. */
7050 bfd_malloc ((bfd_size_type
) strlen (ARM_BX_GLUE_ENTRY_NAME
) + 1);
7052 BFD_ASSERT (tmp_name
);
7054 sprintf (tmp_name
, ARM_BX_GLUE_ENTRY_NAME
, reg
);
7056 myh
= elf_link_hash_lookup
7057 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
7059 BFD_ASSERT (myh
== NULL
);
7062 val
= globals
->bx_glue_size
;
7063 _bfd_generic_link_add_one_symbol (link_info
, globals
->bfd_of_glue_owner
,
7064 tmp_name
, BSF_FUNCTION
| BSF_LOCAL
, s
, val
,
7065 NULL
, TRUE
, FALSE
, &bh
);
7067 myh
= (struct elf_link_hash_entry
*) bh
;
7068 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
7069 myh
->forced_local
= 1;
7071 s
->size
+= ARM_BX_VENEER_SIZE
;
7072 globals
->bx_glue_offset
[reg
] = globals
->bx_glue_size
| 2;
7073 globals
->bx_glue_size
+= ARM_BX_VENEER_SIZE
;
7077 /* Add an entry to the code/data map for section SEC. */
7080 elf32_arm_section_map_add (asection
*sec
, char type
, bfd_vma vma
)
7082 struct _arm_elf_section_data
*sec_data
= elf32_arm_section_data (sec
);
7083 unsigned int newidx
;
7085 if (sec_data
->map
== NULL
)
7087 sec_data
->map
= (elf32_arm_section_map
*)
7088 bfd_malloc (sizeof (elf32_arm_section_map
));
7089 sec_data
->mapcount
= 0;
7090 sec_data
->mapsize
= 1;
7093 newidx
= sec_data
->mapcount
++;
7095 if (sec_data
->mapcount
> sec_data
->mapsize
)
7097 sec_data
->mapsize
*= 2;
7098 sec_data
->map
= (elf32_arm_section_map
*)
7099 bfd_realloc_or_free (sec_data
->map
, sec_data
->mapsize
7100 * sizeof (elf32_arm_section_map
));
7105 sec_data
->map
[newidx
].vma
= vma
;
7106 sec_data
->map
[newidx
].type
= type
;
7111 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
7112 veneers are handled for now. */
7115 record_vfp11_erratum_veneer (struct bfd_link_info
*link_info
,
7116 elf32_vfp11_erratum_list
*branch
,
7118 asection
*branch_sec
,
7119 unsigned int offset
)
7122 struct elf32_arm_link_hash_table
*hash_table
;
7124 struct elf_link_hash_entry
*myh
;
7125 struct bfd_link_hash_entry
*bh
;
7127 struct _arm_elf_section_data
*sec_data
;
7128 elf32_vfp11_erratum_list
*newerr
;
7130 hash_table
= elf32_arm_hash_table (link_info
);
7131 BFD_ASSERT (hash_table
!= NULL
);
7132 BFD_ASSERT (hash_table
->bfd_of_glue_owner
!= NULL
);
7134 s
= bfd_get_linker_section
7135 (hash_table
->bfd_of_glue_owner
, VFP11_ERRATUM_VENEER_SECTION_NAME
);
7137 sec_data
= elf32_arm_section_data (s
);
7139 BFD_ASSERT (s
!= NULL
);
7141 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen
7142 (VFP11_ERRATUM_VENEER_ENTRY_NAME
) + 10);
7144 BFD_ASSERT (tmp_name
);
7146 sprintf (tmp_name
, VFP11_ERRATUM_VENEER_ENTRY_NAME
,
7147 hash_table
->num_vfp11_fixes
);
7149 myh
= elf_link_hash_lookup
7150 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
7152 BFD_ASSERT (myh
== NULL
);
7155 val
= hash_table
->vfp11_erratum_glue_size
;
7156 _bfd_generic_link_add_one_symbol (link_info
, hash_table
->bfd_of_glue_owner
,
7157 tmp_name
, BSF_FUNCTION
| BSF_LOCAL
, s
, val
,
7158 NULL
, TRUE
, FALSE
, &bh
);
7160 myh
= (struct elf_link_hash_entry
*) bh
;
7161 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
7162 myh
->forced_local
= 1;
7164 /* Link veneer back to calling location. */
7165 sec_data
->erratumcount
+= 1;
7166 newerr
= (elf32_vfp11_erratum_list
*)
7167 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list
));
7169 newerr
->type
= VFP11_ERRATUM_ARM_VENEER
;
7171 newerr
->u
.v
.branch
= branch
;
7172 newerr
->u
.v
.id
= hash_table
->num_vfp11_fixes
;
7173 branch
->u
.b
.veneer
= newerr
;
7175 newerr
->next
= sec_data
->erratumlist
;
7176 sec_data
->erratumlist
= newerr
;
7178 /* A symbol for the return from the veneer. */
7179 sprintf (tmp_name
, VFP11_ERRATUM_VENEER_ENTRY_NAME
"_r",
7180 hash_table
->num_vfp11_fixes
);
7182 myh
= elf_link_hash_lookup
7183 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
7190 _bfd_generic_link_add_one_symbol (link_info
, branch_bfd
, tmp_name
, BSF_LOCAL
,
7191 branch_sec
, val
, NULL
, TRUE
, FALSE
, &bh
);
7193 myh
= (struct elf_link_hash_entry
*) bh
;
7194 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
7195 myh
->forced_local
= 1;
7199 /* Generate a mapping symbol for the veneer section, and explicitly add an
7200 entry for that symbol to the code/data map for the section. */
7201 if (hash_table
->vfp11_erratum_glue_size
== 0)
7204 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
7205 ever requires this erratum fix. */
7206 _bfd_generic_link_add_one_symbol (link_info
,
7207 hash_table
->bfd_of_glue_owner
, "$a",
7208 BSF_LOCAL
, s
, 0, NULL
,
7211 myh
= (struct elf_link_hash_entry
*) bh
;
7212 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_NOTYPE
);
7213 myh
->forced_local
= 1;
7215 /* The elf32_arm_init_maps function only cares about symbols from input
7216 BFDs. We must make a note of this generated mapping symbol
7217 ourselves so that code byteswapping works properly in
7218 elf32_arm_write_section. */
7219 elf32_arm_section_map_add (s
, 'a', 0);
7222 s
->size
+= VFP11_ERRATUM_VENEER_SIZE
;
7223 hash_table
->vfp11_erratum_glue_size
+= VFP11_ERRATUM_VENEER_SIZE
;
7224 hash_table
->num_vfp11_fixes
++;
7226 /* The offset of the veneer. */
7230 /* Record information about a STM32L4XX STM erratum veneer. Only THUMB-mode
7231 veneers need to be handled because used only in Cortex-M. */
7234 record_stm32l4xx_erratum_veneer (struct bfd_link_info
*link_info
,
7235 elf32_stm32l4xx_erratum_list
*branch
,
7237 asection
*branch_sec
,
7238 unsigned int offset
,
7239 bfd_size_type veneer_size
)
7242 struct elf32_arm_link_hash_table
*hash_table
;
7244 struct elf_link_hash_entry
*myh
;
7245 struct bfd_link_hash_entry
*bh
;
7247 struct _arm_elf_section_data
*sec_data
;
7248 elf32_stm32l4xx_erratum_list
*newerr
;
7250 hash_table
= elf32_arm_hash_table (link_info
);
7251 BFD_ASSERT (hash_table
!= NULL
);
7252 BFD_ASSERT (hash_table
->bfd_of_glue_owner
!= NULL
);
7254 s
= bfd_get_linker_section
7255 (hash_table
->bfd_of_glue_owner
, STM32L4XX_ERRATUM_VENEER_SECTION_NAME
);
7257 BFD_ASSERT (s
!= NULL
);
7259 sec_data
= elf32_arm_section_data (s
);
7261 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen
7262 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
) + 10);
7264 BFD_ASSERT (tmp_name
);
7266 sprintf (tmp_name
, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
,
7267 hash_table
->num_stm32l4xx_fixes
);
7269 myh
= elf_link_hash_lookup
7270 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
7272 BFD_ASSERT (myh
== NULL
);
7275 val
= hash_table
->stm32l4xx_erratum_glue_size
;
7276 _bfd_generic_link_add_one_symbol (link_info
, hash_table
->bfd_of_glue_owner
,
7277 tmp_name
, BSF_FUNCTION
| BSF_LOCAL
, s
, val
,
7278 NULL
, TRUE
, FALSE
, &bh
);
7280 myh
= (struct elf_link_hash_entry
*) bh
;
7281 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
7282 myh
->forced_local
= 1;
7284 /* Link veneer back to calling location. */
7285 sec_data
->stm32l4xx_erratumcount
+= 1;
7286 newerr
= (elf32_stm32l4xx_erratum_list
*)
7287 bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list
));
7289 newerr
->type
= STM32L4XX_ERRATUM_VENEER
;
7291 newerr
->u
.v
.branch
= branch
;
7292 newerr
->u
.v
.id
= hash_table
->num_stm32l4xx_fixes
;
7293 branch
->u
.b
.veneer
= newerr
;
7295 newerr
->next
= sec_data
->stm32l4xx_erratumlist
;
7296 sec_data
->stm32l4xx_erratumlist
= newerr
;
7298 /* A symbol for the return from the veneer. */
7299 sprintf (tmp_name
, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
"_r",
7300 hash_table
->num_stm32l4xx_fixes
);
7302 myh
= elf_link_hash_lookup
7303 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
7310 _bfd_generic_link_add_one_symbol (link_info
, branch_bfd
, tmp_name
, BSF_LOCAL
,
7311 branch_sec
, val
, NULL
, TRUE
, FALSE
, &bh
);
7313 myh
= (struct elf_link_hash_entry
*) bh
;
7314 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
7315 myh
->forced_local
= 1;
7319 /* Generate a mapping symbol for the veneer section, and explicitly add an
7320 entry for that symbol to the code/data map for the section. */
7321 if (hash_table
->stm32l4xx_erratum_glue_size
== 0)
7324 /* Creates a THUMB symbol since there is no other choice. */
7325 _bfd_generic_link_add_one_symbol (link_info
,
7326 hash_table
->bfd_of_glue_owner
, "$t",
7327 BSF_LOCAL
, s
, 0, NULL
,
7330 myh
= (struct elf_link_hash_entry
*) bh
;
7331 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_NOTYPE
);
7332 myh
->forced_local
= 1;
7334 /* The elf32_arm_init_maps function only cares about symbols from input
7335 BFDs. We must make a note of this generated mapping symbol
7336 ourselves so that code byteswapping works properly in
7337 elf32_arm_write_section. */
7338 elf32_arm_section_map_add (s
, 't', 0);
7341 s
->size
+= veneer_size
;
7342 hash_table
->stm32l4xx_erratum_glue_size
+= veneer_size
;
7343 hash_table
->num_stm32l4xx_fixes
++;
7345 /* The offset of the veneer. */
7349 #define ARM_GLUE_SECTION_FLAGS \
7350 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
7351 | SEC_READONLY | SEC_LINKER_CREATED)
7353 /* Create a fake section for use by the ARM backend of the linker. */
7356 arm_make_glue_section (bfd
* abfd
, const char * name
)
7360 sec
= bfd_get_linker_section (abfd
, name
);
7365 sec
= bfd_make_section_anyway_with_flags (abfd
, name
, ARM_GLUE_SECTION_FLAGS
);
7368 || !bfd_set_section_alignment (abfd
, sec
, 2))
7371 /* Set the gc mark to prevent the section from being removed by garbage
7372 collection, despite the fact that no relocs refer to this section. */
7378 /* Set size of .plt entries. This function is called from the
7379 linker scripts in ld/emultempl/{armelf}.em. */
7382 bfd_elf32_arm_use_long_plt (void)
7384 elf32_arm_use_long_plt_entry
= TRUE
;
7387 /* Add the glue sections to ABFD. This function is called from the
7388 linker scripts in ld/emultempl/{armelf}.em. */
7391 bfd_elf32_arm_add_glue_sections_to_bfd (bfd
*abfd
,
7392 struct bfd_link_info
*info
)
7394 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (info
);
7395 bfd_boolean dostm32l4xx
= globals
7396 && globals
->stm32l4xx_fix
!= BFD_ARM_STM32L4XX_FIX_NONE
;
7397 bfd_boolean addglue
;
7399 /* If we are only performing a partial
7400 link do not bother adding the glue. */
7401 if (bfd_link_relocatable (info
))
7404 addglue
= arm_make_glue_section (abfd
, ARM2THUMB_GLUE_SECTION_NAME
)
7405 && arm_make_glue_section (abfd
, THUMB2ARM_GLUE_SECTION_NAME
)
7406 && arm_make_glue_section (abfd
, VFP11_ERRATUM_VENEER_SECTION_NAME
)
7407 && arm_make_glue_section (abfd
, ARM_BX_GLUE_SECTION_NAME
);
7413 && arm_make_glue_section (abfd
, STM32L4XX_ERRATUM_VENEER_SECTION_NAME
);
7416 /* Mark output sections of veneers needing a dedicated one with SEC_KEEP. This
7417 ensures they are not marked for deletion by
7418 strip_excluded_output_sections () when veneers are going to be created
7419 later. Not doing so would trigger assert on empty section size in
7420 lang_size_sections_1 (). */
7423 bfd_elf32_arm_keep_private_stub_output_sections (struct bfd_link_info
*info
)
7425 enum elf32_arm_stub_type stub_type
;
7427 /* If we are only performing a partial
7428 link do not bother adding the glue. */
7429 if (bfd_link_relocatable (info
))
7432 for (stub_type
= arm_stub_none
+ 1; stub_type
< max_stub_type
; stub_type
++)
7435 const char *out_sec_name
;
7437 if (!arm_dedicated_stub_output_section_required (stub_type
))
7440 out_sec_name
= arm_dedicated_stub_output_section_name (stub_type
);
7441 out_sec
= bfd_get_section_by_name (info
->output_bfd
, out_sec_name
);
7442 if (out_sec
!= NULL
)
7443 out_sec
->flags
|= SEC_KEEP
;
7447 /* Select a BFD to be used to hold the sections used by the glue code.
7448 This function is called from the linker scripts in ld/emultempl/
7452 bfd_elf32_arm_get_bfd_for_interworking (bfd
*abfd
, struct bfd_link_info
*info
)
7454 struct elf32_arm_link_hash_table
*globals
;
7456 /* If we are only performing a partial link
7457 do not bother getting a bfd to hold the glue. */
7458 if (bfd_link_relocatable (info
))
7461 /* Make sure we don't attach the glue sections to a dynamic object. */
7462 BFD_ASSERT (!(abfd
->flags
& DYNAMIC
));
7464 globals
= elf32_arm_hash_table (info
);
7465 BFD_ASSERT (globals
!= NULL
);
7467 if (globals
->bfd_of_glue_owner
!= NULL
)
7470 /* Save the bfd for later use. */
7471 globals
->bfd_of_glue_owner
= abfd
;
7477 check_use_blx (struct elf32_arm_link_hash_table
*globals
)
7481 cpu_arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
7484 if (globals
->fix_arm1176
)
7486 if (cpu_arch
== TAG_CPU_ARCH_V6T2
|| cpu_arch
> TAG_CPU_ARCH_V6K
)
7487 globals
->use_blx
= 1;
7491 if (cpu_arch
> TAG_CPU_ARCH_V4T
)
7492 globals
->use_blx
= 1;
7497 bfd_elf32_arm_process_before_allocation (bfd
*abfd
,
7498 struct bfd_link_info
*link_info
)
7500 Elf_Internal_Shdr
*symtab_hdr
;
7501 Elf_Internal_Rela
*internal_relocs
= NULL
;
7502 Elf_Internal_Rela
*irel
, *irelend
;
7503 bfd_byte
*contents
= NULL
;
7506 struct elf32_arm_link_hash_table
*globals
;
7508 /* If we are only performing a partial link do not bother
7509 to construct any glue. */
7510 if (bfd_link_relocatable (link_info
))
7513 /* Here we have a bfd that is to be included on the link. We have a
7514 hook to do reloc rummaging, before section sizes are nailed down. */
7515 globals
= elf32_arm_hash_table (link_info
);
7516 BFD_ASSERT (globals
!= NULL
);
7518 check_use_blx (globals
);
7520 if (globals
->byteswap_code
&& !bfd_big_endian (abfd
))
7522 _bfd_error_handler (_("%pB: BE8 images only valid in big-endian mode"),
7527 /* PR 5398: If we have not decided to include any loadable sections in
7528 the output then we will not have a glue owner bfd. This is OK, it
7529 just means that there is nothing else for us to do here. */
7530 if (globals
->bfd_of_glue_owner
== NULL
)
7533 /* Rummage around all the relocs and map the glue vectors. */
7534 sec
= abfd
->sections
;
7539 for (; sec
!= NULL
; sec
= sec
->next
)
7541 if (sec
->reloc_count
== 0)
7544 if ((sec
->flags
& SEC_EXCLUDE
) != 0)
7547 symtab_hdr
= & elf_symtab_hdr (abfd
);
7549 /* Load the relocs. */
7551 = _bfd_elf_link_read_relocs (abfd
, sec
, NULL
, NULL
, FALSE
);
7553 if (internal_relocs
== NULL
)
7556 irelend
= internal_relocs
+ sec
->reloc_count
;
7557 for (irel
= internal_relocs
; irel
< irelend
; irel
++)
7560 unsigned long r_index
;
7562 struct elf_link_hash_entry
*h
;
7564 r_type
= ELF32_R_TYPE (irel
->r_info
);
7565 r_index
= ELF32_R_SYM (irel
->r_info
);
7567 /* These are the only relocation types we care about. */
7568 if ( r_type
!= R_ARM_PC24
7569 && (r_type
!= R_ARM_V4BX
|| globals
->fix_v4bx
< 2))
7572 /* Get the section contents if we haven't done so already. */
7573 if (contents
== NULL
)
7575 /* Get cached copy if it exists. */
7576 if (elf_section_data (sec
)->this_hdr
.contents
!= NULL
)
7577 contents
= elf_section_data (sec
)->this_hdr
.contents
;
7580 /* Go get them off disk. */
7581 if (! bfd_malloc_and_get_section (abfd
, sec
, &contents
))
7586 if (r_type
== R_ARM_V4BX
)
7590 reg
= bfd_get_32 (abfd
, contents
+ irel
->r_offset
) & 0xf;
7591 record_arm_bx_glue (link_info
, reg
);
7595 /* If the relocation is not against a symbol it cannot concern us. */
7598 /* We don't care about local symbols. */
7599 if (r_index
< symtab_hdr
->sh_info
)
7602 /* This is an external symbol. */
7603 r_index
-= symtab_hdr
->sh_info
;
7604 h
= (struct elf_link_hash_entry
*)
7605 elf_sym_hashes (abfd
)[r_index
];
7607 /* If the relocation is against a static symbol it must be within
7608 the current section and so cannot be a cross ARM/Thumb relocation. */
7612 /* If the call will go through a PLT entry then we do not need
7614 if (globals
->root
.splt
!= NULL
&& h
->plt
.offset
!= (bfd_vma
) -1)
7620 /* This one is a call from arm code. We need to look up
7621 the target of the call. If it is a thumb target, we
7623 if (ARM_GET_SYM_BRANCH_TYPE (h
->target_internal
)
7624 == ST_BRANCH_TO_THUMB
)
7625 record_arm_to_thumb_glue (link_info
, h
);
7633 if (contents
!= NULL
7634 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
7638 if (internal_relocs
!= NULL
7639 && elf_section_data (sec
)->relocs
!= internal_relocs
)
7640 free (internal_relocs
);
7641 internal_relocs
= NULL
;
7647 if (contents
!= NULL
7648 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
7650 if (internal_relocs
!= NULL
7651 && elf_section_data (sec
)->relocs
!= internal_relocs
)
7652 free (internal_relocs
);
7659 /* Initialise maps of ARM/Thumb/data for input BFDs. */
7662 bfd_elf32_arm_init_maps (bfd
*abfd
)
7664 Elf_Internal_Sym
*isymbuf
;
7665 Elf_Internal_Shdr
*hdr
;
7666 unsigned int i
, localsyms
;
7668 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
7669 if (! is_arm_elf (abfd
))
7672 if ((abfd
->flags
& DYNAMIC
) != 0)
7675 hdr
= & elf_symtab_hdr (abfd
);
7676 localsyms
= hdr
->sh_info
;
7678 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
7679 should contain the number of local symbols, which should come before any
7680 global symbols. Mapping symbols are always local. */
7681 isymbuf
= bfd_elf_get_elf_syms (abfd
, hdr
, localsyms
, 0, NULL
, NULL
,
7684 /* No internal symbols read? Skip this BFD. */
7685 if (isymbuf
== NULL
)
7688 for (i
= 0; i
< localsyms
; i
++)
7690 Elf_Internal_Sym
*isym
= &isymbuf
[i
];
7691 asection
*sec
= bfd_section_from_elf_index (abfd
, isym
->st_shndx
);
7695 && ELF_ST_BIND (isym
->st_info
) == STB_LOCAL
)
7697 name
= bfd_elf_string_from_elf_section (abfd
,
7698 hdr
->sh_link
, isym
->st_name
);
7700 if (bfd_is_arm_special_symbol_name (name
,
7701 BFD_ARM_SPECIAL_SYM_TYPE_MAP
))
7702 elf32_arm_section_map_add (sec
, name
[1], isym
->st_value
);
7708 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
7709 say what they wanted. */
7712 bfd_elf32_arm_set_cortex_a8_fix (bfd
*obfd
, struct bfd_link_info
*link_info
)
7714 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
7715 obj_attribute
*out_attr
= elf_known_obj_attributes_proc (obfd
);
7717 if (globals
== NULL
)
7720 if (globals
->fix_cortex_a8
== -1)
7722 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
7723 if (out_attr
[Tag_CPU_arch
].i
== TAG_CPU_ARCH_V7
7724 && (out_attr
[Tag_CPU_arch_profile
].i
== 'A'
7725 || out_attr
[Tag_CPU_arch_profile
].i
== 0))
7726 globals
->fix_cortex_a8
= 1;
7728 globals
->fix_cortex_a8
= 0;
7734 bfd_elf32_arm_set_vfp11_fix (bfd
*obfd
, struct bfd_link_info
*link_info
)
7736 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
7737 obj_attribute
*out_attr
= elf_known_obj_attributes_proc (obfd
);
7739 if (globals
== NULL
)
7741 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
7742 if (out_attr
[Tag_CPU_arch
].i
>= TAG_CPU_ARCH_V7
)
7744 switch (globals
->vfp11_fix
)
7746 case BFD_ARM_VFP11_FIX_DEFAULT
:
7747 case BFD_ARM_VFP11_FIX_NONE
:
7748 globals
->vfp11_fix
= BFD_ARM_VFP11_FIX_NONE
;
7752 /* Give a warning, but do as the user requests anyway. */
7753 _bfd_error_handler (_("%pB: warning: selected VFP11 erratum "
7754 "workaround is not necessary for target architecture"), obfd
);
7757 else if (globals
->vfp11_fix
== BFD_ARM_VFP11_FIX_DEFAULT
)
7758 /* For earlier architectures, we might need the workaround, but do not
7759 enable it by default. If users is running with broken hardware, they
7760 must enable the erratum fix explicitly. */
7761 globals
->vfp11_fix
= BFD_ARM_VFP11_FIX_NONE
;
7765 bfd_elf32_arm_set_stm32l4xx_fix (bfd
*obfd
, struct bfd_link_info
*link_info
)
7767 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
7768 obj_attribute
*out_attr
= elf_known_obj_attributes_proc (obfd
);
7770 if (globals
== NULL
)
7773 /* We assume only Cortex-M4 may require the fix. */
7774 if (out_attr
[Tag_CPU_arch
].i
!= TAG_CPU_ARCH_V7E_M
7775 || out_attr
[Tag_CPU_arch_profile
].i
!= 'M')
7777 if (globals
->stm32l4xx_fix
!= BFD_ARM_STM32L4XX_FIX_NONE
)
7778 /* Give a warning, but do as the user requests anyway. */
7780 (_("%pB: warning: selected STM32L4XX erratum "
7781 "workaround is not necessary for target architecture"), obfd
);
7785 enum bfd_arm_vfp11_pipe
7793 /* Return a VFP register number. This is encoded as RX:X for single-precision
7794 registers, or X:RX for double-precision registers, where RX is the group of
7795 four bits in the instruction encoding and X is the single extension bit.
7796 RX and X fields are specified using their lowest (starting) bit. The return
7799 0...31: single-precision registers s0...s31
7800 32...63: double-precision registers d0...d31.
7802 Although X should be zero for VFP11 (encoding d0...d15 only), we might
7803 encounter VFP3 instructions, so we allow the full range for DP registers. */
7806 bfd_arm_vfp11_regno (unsigned int insn
, bfd_boolean is_double
, unsigned int rx
,
7810 return (((insn
>> rx
) & 0xf) | (((insn
>> x
) & 1) << 4)) + 32;
7812 return (((insn
>> rx
) & 0xf) << 1) | ((insn
>> x
) & 1);
7815 /* Set bits in *WMASK according to a register number REG as encoded by
7816 bfd_arm_vfp11_regno(). Ignore d16-d31. */
7819 bfd_arm_vfp11_write_mask (unsigned int *wmask
, unsigned int reg
)
7824 *wmask
|= 3 << ((reg
- 32) * 2);
7827 /* Return TRUE if WMASK overwrites anything in REGS. */
7830 bfd_arm_vfp11_antidependency (unsigned int wmask
, int *regs
, int numregs
)
7834 for (i
= 0; i
< numregs
; i
++)
7836 unsigned int reg
= regs
[i
];
7838 if (reg
< 32 && (wmask
& (1 << reg
)) != 0)
7846 if ((wmask
& (3 << (reg
* 2))) != 0)
7853 /* In this function, we're interested in two things: finding input registers
7854 for VFP data-processing instructions, and finding the set of registers which
7855 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
7856 hold the written set, so FLDM etc. are easy to deal with (we're only
7857 interested in 32 SP registers or 16 dp registers, due to the VFP version
7858 implemented by the chip in question). DP registers are marked by setting
7859 both SP registers in the write mask). */
7861 static enum bfd_arm_vfp11_pipe
7862 bfd_arm_vfp11_insn_decode (unsigned int insn
, unsigned int *destmask
, int *regs
,
7865 enum bfd_arm_vfp11_pipe vpipe
= VFP11_BAD
;
7866 bfd_boolean is_double
= ((insn
& 0xf00) == 0xb00) ? 1 : 0;
7868 if ((insn
& 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
7871 unsigned int fd
= bfd_arm_vfp11_regno (insn
, is_double
, 12, 22);
7872 unsigned int fm
= bfd_arm_vfp11_regno (insn
, is_double
, 0, 5);
7874 pqrs
= ((insn
& 0x00800000) >> 20)
7875 | ((insn
& 0x00300000) >> 19)
7876 | ((insn
& 0x00000040) >> 6);
7880 case 0: /* fmac[sd]. */
7881 case 1: /* fnmac[sd]. */
7882 case 2: /* fmsc[sd]. */
7883 case 3: /* fnmsc[sd]. */
7885 bfd_arm_vfp11_write_mask (destmask
, fd
);
7887 regs
[1] = bfd_arm_vfp11_regno (insn
, is_double
, 16, 7); /* Fn. */
7892 case 4: /* fmul[sd]. */
7893 case 5: /* fnmul[sd]. */
7894 case 6: /* fadd[sd]. */
7895 case 7: /* fsub[sd]. */
7899 case 8: /* fdiv[sd]. */
7902 bfd_arm_vfp11_write_mask (destmask
, fd
);
7903 regs
[0] = bfd_arm_vfp11_regno (insn
, is_double
, 16, 7); /* Fn. */
7908 case 15: /* extended opcode. */
7910 unsigned int extn
= ((insn
>> 15) & 0x1e)
7911 | ((insn
>> 7) & 1);
7915 case 0: /* fcpy[sd]. */
7916 case 1: /* fabs[sd]. */
7917 case 2: /* fneg[sd]. */
7918 case 8: /* fcmp[sd]. */
7919 case 9: /* fcmpe[sd]. */
7920 case 10: /* fcmpz[sd]. */
7921 case 11: /* fcmpez[sd]. */
7922 case 16: /* fuito[sd]. */
7923 case 17: /* fsito[sd]. */
7924 case 24: /* ftoui[sd]. */
7925 case 25: /* ftouiz[sd]. */
7926 case 26: /* ftosi[sd]. */
7927 case 27: /* ftosiz[sd]. */
7928 /* These instructions will not bounce due to underflow. */
7933 case 3: /* fsqrt[sd]. */
7934 /* fsqrt cannot underflow, but it can (perhaps) overwrite
7935 registers to cause the erratum in previous instructions. */
7936 bfd_arm_vfp11_write_mask (destmask
, fd
);
7940 case 15: /* fcvt{ds,sd}. */
7944 bfd_arm_vfp11_write_mask (destmask
, fd
);
7946 /* Only FCVTSD can underflow. */
7947 if ((insn
& 0x100) != 0)
7966 /* Two-register transfer. */
7967 else if ((insn
& 0x0fe00ed0) == 0x0c400a10)
7969 unsigned int fm
= bfd_arm_vfp11_regno (insn
, is_double
, 0, 5);
7971 if ((insn
& 0x100000) == 0)
7974 bfd_arm_vfp11_write_mask (destmask
, fm
);
7977 bfd_arm_vfp11_write_mask (destmask
, fm
);
7978 bfd_arm_vfp11_write_mask (destmask
, fm
+ 1);
7984 else if ((insn
& 0x0e100e00) == 0x0c100a00) /* A load insn. */
7986 int fd
= bfd_arm_vfp11_regno (insn
, is_double
, 12, 22);
7987 unsigned int puw
= ((insn
>> 21) & 0x1) | (((insn
>> 23) & 3) << 1);
7991 case 0: /* Two-reg transfer. We should catch these above. */
7994 case 2: /* fldm[sdx]. */
7998 unsigned int i
, offset
= insn
& 0xff;
8003 for (i
= fd
; i
< fd
+ offset
; i
++)
8004 bfd_arm_vfp11_write_mask (destmask
, i
);
8008 case 4: /* fld[sd]. */
8010 bfd_arm_vfp11_write_mask (destmask
, fd
);
8019 /* Single-register transfer. Note L==0. */
8020 else if ((insn
& 0x0f100e10) == 0x0e000a10)
8022 unsigned int opcode
= (insn
>> 21) & 7;
8023 unsigned int fn
= bfd_arm_vfp11_regno (insn
, is_double
, 16, 7);
8027 case 0: /* fmsr/fmdlr. */
8028 case 1: /* fmdhr. */
8029 /* Mark fmdhr and fmdlr as writing to the whole of the DP
8030 destination register. I don't know if this is exactly right,
8031 but it is the conservative choice. */
8032 bfd_arm_vfp11_write_mask (destmask
, fn
);
8046 static int elf32_arm_compare_mapping (const void * a
, const void * b
);
8049 /* Look for potentially-troublesome code sequences which might trigger the
8050 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
8051 (available from ARM) for details of the erratum. A short version is
8052 described in ld.texinfo. */
8055 bfd_elf32_arm_vfp11_erratum_scan (bfd
*abfd
, struct bfd_link_info
*link_info
)
8058 bfd_byte
*contents
= NULL
;
8060 int regs
[3], numregs
= 0;
8061 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
8062 int use_vector
= (globals
->vfp11_fix
== BFD_ARM_VFP11_FIX_VECTOR
);
8064 if (globals
== NULL
)
8067 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
8068 The states transition as follows:
8070 0 -> 1 (vector) or 0 -> 2 (scalar)
8071 A VFP FMAC-pipeline instruction has been seen. Fill
8072 regs[0]..regs[numregs-1] with its input operands. Remember this
8073 instruction in 'first_fmac'.
8076 Any instruction, except for a VFP instruction which overwrites
8081 A VFP instruction has been seen which overwrites any of regs[*].
8082 We must make a veneer! Reset state to 0 before examining next
8086 If we fail to match anything in state 2, reset to state 0 and reset
8087 the instruction pointer to the instruction after 'first_fmac'.
8089 If the VFP11 vector mode is in use, there must be at least two unrelated
8090 instructions between anti-dependent VFP11 instructions to properly avoid
8091 triggering the erratum, hence the use of the extra state 1. */
8093 /* If we are only performing a partial link do not bother
8094 to construct any glue. */
8095 if (bfd_link_relocatable (link_info
))
8098 /* Skip if this bfd does not correspond to an ELF image. */
8099 if (! is_arm_elf (abfd
))
8102 /* We should have chosen a fix type by the time we get here. */
8103 BFD_ASSERT (globals
->vfp11_fix
!= BFD_ARM_VFP11_FIX_DEFAULT
);
8105 if (globals
->vfp11_fix
== BFD_ARM_VFP11_FIX_NONE
)
8108 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8109 if ((abfd
->flags
& (EXEC_P
| DYNAMIC
)) != 0)
8112 for (sec
= abfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
8114 unsigned int i
, span
, first_fmac
= 0, veneer_of_insn
= 0;
8115 struct _arm_elf_section_data
*sec_data
;
8117 /* If we don't have executable progbits, we're not interested in this
8118 section. Also skip if section is to be excluded. */
8119 if (elf_section_type (sec
) != SHT_PROGBITS
8120 || (elf_section_flags (sec
) & SHF_EXECINSTR
) == 0
8121 || (sec
->flags
& SEC_EXCLUDE
) != 0
8122 || sec
->sec_info_type
== SEC_INFO_TYPE_JUST_SYMS
8123 || sec
->output_section
== bfd_abs_section_ptr
8124 || strcmp (sec
->name
, VFP11_ERRATUM_VENEER_SECTION_NAME
) == 0)
8127 sec_data
= elf32_arm_section_data (sec
);
8129 if (sec_data
->mapcount
== 0)
8132 if (elf_section_data (sec
)->this_hdr
.contents
!= NULL
)
8133 contents
= elf_section_data (sec
)->this_hdr
.contents
;
8134 else if (! bfd_malloc_and_get_section (abfd
, sec
, &contents
))
8137 qsort (sec_data
->map
, sec_data
->mapcount
, sizeof (elf32_arm_section_map
),
8138 elf32_arm_compare_mapping
);
8140 for (span
= 0; span
< sec_data
->mapcount
; span
++)
8142 unsigned int span_start
= sec_data
->map
[span
].vma
;
8143 unsigned int span_end
= (span
== sec_data
->mapcount
- 1)
8144 ? sec
->size
: sec_data
->map
[span
+ 1].vma
;
8145 char span_type
= sec_data
->map
[span
].type
;
8147 /* FIXME: Only ARM mode is supported at present. We may need to
8148 support Thumb-2 mode also at some point. */
8149 if (span_type
!= 'a')
8152 for (i
= span_start
; i
< span_end
;)
8154 unsigned int next_i
= i
+ 4;
8155 unsigned int insn
= bfd_big_endian (abfd
)
8156 ? (contents
[i
] << 24)
8157 | (contents
[i
+ 1] << 16)
8158 | (contents
[i
+ 2] << 8)
8160 : (contents
[i
+ 3] << 24)
8161 | (contents
[i
+ 2] << 16)
8162 | (contents
[i
+ 1] << 8)
8164 unsigned int writemask
= 0;
8165 enum bfd_arm_vfp11_pipe vpipe
;
8170 vpipe
= bfd_arm_vfp11_insn_decode (insn
, &writemask
, regs
,
8172 /* I'm assuming the VFP11 erratum can trigger with denorm
8173 operands on either the FMAC or the DS pipeline. This might
8174 lead to slightly overenthusiastic veneer insertion. */
8175 if (vpipe
== VFP11_FMAC
|| vpipe
== VFP11_DS
)
8177 state
= use_vector
? 1 : 2;
8179 veneer_of_insn
= insn
;
8185 int other_regs
[3], other_numregs
;
8186 vpipe
= bfd_arm_vfp11_insn_decode (insn
, &writemask
,
8189 if (vpipe
!= VFP11_BAD
8190 && bfd_arm_vfp11_antidependency (writemask
, regs
,
8200 int other_regs
[3], other_numregs
;
8201 vpipe
= bfd_arm_vfp11_insn_decode (insn
, &writemask
,
8204 if (vpipe
!= VFP11_BAD
8205 && bfd_arm_vfp11_antidependency (writemask
, regs
,
8211 next_i
= first_fmac
+ 4;
8217 abort (); /* Should be unreachable. */
8222 elf32_vfp11_erratum_list
*newerr
=(elf32_vfp11_erratum_list
*)
8223 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list
));
8225 elf32_arm_section_data (sec
)->erratumcount
+= 1;
8227 newerr
->u
.b
.vfp_insn
= veneer_of_insn
;
8232 newerr
->type
= VFP11_ERRATUM_BRANCH_TO_ARM_VENEER
;
8239 record_vfp11_erratum_veneer (link_info
, newerr
, abfd
, sec
,
8244 newerr
->next
= sec_data
->erratumlist
;
8245 sec_data
->erratumlist
= newerr
;
8254 if (contents
!= NULL
8255 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
8263 if (contents
!= NULL
8264 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
8270 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
8271 after sections have been laid out, using specially-named symbols. */
8274 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd
*abfd
,
8275 struct bfd_link_info
*link_info
)
8278 struct elf32_arm_link_hash_table
*globals
;
8281 if (bfd_link_relocatable (link_info
))
8284 /* Skip if this bfd does not correspond to an ELF image. */
8285 if (! is_arm_elf (abfd
))
8288 globals
= elf32_arm_hash_table (link_info
);
8289 if (globals
== NULL
)
8292 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen
8293 (VFP11_ERRATUM_VENEER_ENTRY_NAME
) + 10);
8295 for (sec
= abfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
8297 struct _arm_elf_section_data
*sec_data
= elf32_arm_section_data (sec
);
8298 elf32_vfp11_erratum_list
*errnode
= sec_data
->erratumlist
;
8300 for (; errnode
!= NULL
; errnode
= errnode
->next
)
8302 struct elf_link_hash_entry
*myh
;
8305 switch (errnode
->type
)
8307 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER
:
8308 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER
:
8309 /* Find veneer symbol. */
8310 sprintf (tmp_name
, VFP11_ERRATUM_VENEER_ENTRY_NAME
,
8311 errnode
->u
.b
.veneer
->u
.v
.id
);
8313 myh
= elf_link_hash_lookup
8314 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
8317 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8318 abfd
, "VFP11", tmp_name
);
8320 vma
= myh
->root
.u
.def
.section
->output_section
->vma
8321 + myh
->root
.u
.def
.section
->output_offset
8322 + myh
->root
.u
.def
.value
;
8324 errnode
->u
.b
.veneer
->vma
= vma
;
8327 case VFP11_ERRATUM_ARM_VENEER
:
8328 case VFP11_ERRATUM_THUMB_VENEER
:
8329 /* Find return location. */
8330 sprintf (tmp_name
, VFP11_ERRATUM_VENEER_ENTRY_NAME
"_r",
8333 myh
= elf_link_hash_lookup
8334 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
8337 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8338 abfd
, "VFP11", tmp_name
);
8340 vma
= myh
->root
.u
.def
.section
->output_section
->vma
8341 + myh
->root
.u
.def
.section
->output_offset
8342 + myh
->root
.u
.def
.value
;
8344 errnode
->u
.v
.branch
->vma
= vma
;
8356 /* Find virtual-memory addresses for STM32L4XX erratum veneers and
8357 return locations after sections have been laid out, using
8358 specially-named symbols. */
8361 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd
*abfd
,
8362 struct bfd_link_info
*link_info
)
8365 struct elf32_arm_link_hash_table
*globals
;
8368 if (bfd_link_relocatable (link_info
))
8371 /* Skip if this bfd does not correspond to an ELF image. */
8372 if (! is_arm_elf (abfd
))
8375 globals
= elf32_arm_hash_table (link_info
);
8376 if (globals
== NULL
)
8379 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen
8380 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
) + 10);
8382 for (sec
= abfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
8384 struct _arm_elf_section_data
*sec_data
= elf32_arm_section_data (sec
);
8385 elf32_stm32l4xx_erratum_list
*errnode
= sec_data
->stm32l4xx_erratumlist
;
8387 for (; errnode
!= NULL
; errnode
= errnode
->next
)
8389 struct elf_link_hash_entry
*myh
;
8392 switch (errnode
->type
)
8394 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER
:
8395 /* Find veneer symbol. */
8396 sprintf (tmp_name
, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
,
8397 errnode
->u
.b
.veneer
->u
.v
.id
);
8399 myh
= elf_link_hash_lookup
8400 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
8403 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8404 abfd
, "STM32L4XX", tmp_name
);
8406 vma
= myh
->root
.u
.def
.section
->output_section
->vma
8407 + myh
->root
.u
.def
.section
->output_offset
8408 + myh
->root
.u
.def
.value
;
8410 errnode
->u
.b
.veneer
->vma
= vma
;
8413 case STM32L4XX_ERRATUM_VENEER
:
8414 /* Find return location. */
8415 sprintf (tmp_name
, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
"_r",
8418 myh
= elf_link_hash_lookup
8419 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
8422 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8423 abfd
, "STM32L4XX", tmp_name
);
8425 vma
= myh
->root
.u
.def
.section
->output_section
->vma
8426 + myh
->root
.u
.def
.section
->output_offset
8427 + myh
->root
.u
.def
.value
;
8429 errnode
->u
.v
.branch
->vma
= vma
;
8441 static inline bfd_boolean
8442 is_thumb2_ldmia (const insn32 insn
)
8444 /* Encoding T2: LDM<c>.W <Rn>{!},<registers>
8445 1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll. */
8446 return (insn
& 0xffd02000) == 0xe8900000;
8449 static inline bfd_boolean
8450 is_thumb2_ldmdb (const insn32 insn
)
8452 /* Encoding T1: LDMDB<c> <Rn>{!},<registers>
8453 1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll. */
8454 return (insn
& 0xffd02000) == 0xe9100000;
8457 static inline bfd_boolean
8458 is_thumb2_vldm (const insn32 insn
)
8460 /* A6.5 Extension register load or store instruction
8462 We look for SP 32-bit and DP 64-bit registers.
8463 Encoding T1 VLDM{mode}<c> <Rn>{!}, <list>
8464 <list> is consecutive 64-bit registers
8465 1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii
8466 Encoding T2 VLDM{mode}<c> <Rn>{!}, <list>
8467 <list> is consecutive 32-bit registers
8468 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii
8469 if P==0 && U==1 && W==1 && Rn=1101 VPOP
8470 if PUW=010 || PUW=011 || PUW=101 VLDM. */
8472 (((insn
& 0xfe100f00) == 0xec100b00) ||
8473 ((insn
& 0xfe100f00) == 0xec100a00))
8474 && /* (IA without !). */
8475 (((((insn
<< 7) >> 28) & 0xd) == 0x4)
8476 /* (IA with !), includes VPOP (when reg number is SP). */
8477 || ((((insn
<< 7) >> 28) & 0xd) == 0x5)
8479 || ((((insn
<< 7) >> 28) & 0xd) == 0x9));
8482 /* STM STM32L4XX erratum : This function assumes that it receives an LDM or
8484 - computes the number and the mode of memory accesses
8485 - decides if the replacement should be done:
8486 . replaces only if > 8-word accesses
8487 . or (testing purposes only) replaces all accesses. */
8490 stm32l4xx_need_create_replacing_stub (const insn32 insn
,
8491 bfd_arm_stm32l4xx_fix stm32l4xx_fix
)
8495 /* The field encoding the register list is the same for both LDMIA
8496 and LDMDB encodings. */
8497 if (is_thumb2_ldmia (insn
) || is_thumb2_ldmdb (insn
))
8498 nb_words
= elf32_arm_popcount (insn
& 0x0000ffff);
8499 else if (is_thumb2_vldm (insn
))
8500 nb_words
= (insn
& 0xff);
8502 /* DEFAULT mode accounts for the real bug condition situation,
8503 ALL mode inserts stubs for each LDM/VLDM instruction (testing). */
8505 (stm32l4xx_fix
== BFD_ARM_STM32L4XX_FIX_DEFAULT
) ? nb_words
> 8 :
8506 (stm32l4xx_fix
== BFD_ARM_STM32L4XX_FIX_ALL
) ? TRUE
: FALSE
;
8509 /* Look for potentially-troublesome code sequences which might trigger
8510 the STM STM32L4XX erratum. */
8513 bfd_elf32_arm_stm32l4xx_erratum_scan (bfd
*abfd
,
8514 struct bfd_link_info
*link_info
)
8517 bfd_byte
*contents
= NULL
;
8518 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
8520 if (globals
== NULL
)
8523 /* If we are only performing a partial link do not bother
8524 to construct any glue. */
8525 if (bfd_link_relocatable (link_info
))
8528 /* Skip if this bfd does not correspond to an ELF image. */
8529 if (! is_arm_elf (abfd
))
8532 if (globals
->stm32l4xx_fix
== BFD_ARM_STM32L4XX_FIX_NONE
)
8535 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8536 if ((abfd
->flags
& (EXEC_P
| DYNAMIC
)) != 0)
8539 for (sec
= abfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
8541 unsigned int i
, span
;
8542 struct _arm_elf_section_data
*sec_data
;
8544 /* If we don't have executable progbits, we're not interested in this
8545 section. Also skip if section is to be excluded. */
8546 if (elf_section_type (sec
) != SHT_PROGBITS
8547 || (elf_section_flags (sec
) & SHF_EXECINSTR
) == 0
8548 || (sec
->flags
& SEC_EXCLUDE
) != 0
8549 || sec
->sec_info_type
== SEC_INFO_TYPE_JUST_SYMS
8550 || sec
->output_section
== bfd_abs_section_ptr
8551 || strcmp (sec
->name
, STM32L4XX_ERRATUM_VENEER_SECTION_NAME
) == 0)
8554 sec_data
= elf32_arm_section_data (sec
);
8556 if (sec_data
->mapcount
== 0)
8559 if (elf_section_data (sec
)->this_hdr
.contents
!= NULL
)
8560 contents
= elf_section_data (sec
)->this_hdr
.contents
;
8561 else if (! bfd_malloc_and_get_section (abfd
, sec
, &contents
))
8564 qsort (sec_data
->map
, sec_data
->mapcount
, sizeof (elf32_arm_section_map
),
8565 elf32_arm_compare_mapping
);
8567 for (span
= 0; span
< sec_data
->mapcount
; span
++)
8569 unsigned int span_start
= sec_data
->map
[span
].vma
;
8570 unsigned int span_end
= (span
== sec_data
->mapcount
- 1)
8571 ? sec
->size
: sec_data
->map
[span
+ 1].vma
;
8572 char span_type
= sec_data
->map
[span
].type
;
8573 int itblock_current_pos
= 0;
8575 /* Only Thumb2 mode need be supported with this CM4 specific
8576 code, we should not encounter any arm mode eg span_type
8578 if (span_type
!= 't')
8581 for (i
= span_start
; i
< span_end
;)
8583 unsigned int insn
= bfd_get_16 (abfd
, &contents
[i
]);
8584 bfd_boolean insn_32bit
= FALSE
;
8585 bfd_boolean is_ldm
= FALSE
;
8586 bfd_boolean is_vldm
= FALSE
;
8587 bfd_boolean is_not_last_in_it_block
= FALSE
;
8589 /* The first 16-bits of all 32-bit thumb2 instructions start
8590 with opcode[15..13]=0b111 and the encoded op1 can be anything
8591 except opcode[12..11]!=0b00.
8592 See 32-bit Thumb instruction encoding. */
8593 if ((insn
& 0xe000) == 0xe000 && (insn
& 0x1800) != 0x0000)
8596 /* Compute the predicate that tells if the instruction
8597 is concerned by the IT block
8598 - Creates an error if there is a ldm that is not
8599 last in the IT block thus cannot be replaced
8600 - Otherwise we can create a branch at the end of the
8601 IT block, it will be controlled naturally by IT
8602 with the proper pseudo-predicate
8603 - So the only interesting predicate is the one that
8604 tells that we are not on the last item of an IT
8606 if (itblock_current_pos
!= 0)
8607 is_not_last_in_it_block
= !!--itblock_current_pos
;
8611 /* Load the rest of the insn (in manual-friendly order). */
8612 insn
= (insn
<< 16) | bfd_get_16 (abfd
, &contents
[i
+ 2]);
8613 is_ldm
= is_thumb2_ldmia (insn
) || is_thumb2_ldmdb (insn
);
8614 is_vldm
= is_thumb2_vldm (insn
);
8616 /* Veneers are created for (v)ldm depending on
8617 option flags and memory accesses conditions; but
8618 if the instruction is not the last instruction of
8619 an IT block, we cannot create a jump there, so we
8621 if ((is_ldm
|| is_vldm
)
8622 && stm32l4xx_need_create_replacing_stub
8623 (insn
, globals
->stm32l4xx_fix
))
8625 if (is_not_last_in_it_block
)
8628 /* xgettext:c-format */
8629 (_("%pB(%pA+%#x): error: multiple load detected"
8630 " in non-last IT block instruction:"
8631 " STM32L4XX veneer cannot be generated; "
8632 "use gcc option -mrestrict-it to generate"
8633 " only one instruction per IT block"),
8638 elf32_stm32l4xx_erratum_list
*newerr
=
8639 (elf32_stm32l4xx_erratum_list
*)
8641 (sizeof (elf32_stm32l4xx_erratum_list
));
8643 elf32_arm_section_data (sec
)
8644 ->stm32l4xx_erratumcount
+= 1;
8645 newerr
->u
.b
.insn
= insn
;
8646 /* We create only thumb branches. */
8648 STM32L4XX_ERRATUM_BRANCH_TO_VENEER
;
8649 record_stm32l4xx_erratum_veneer
8650 (link_info
, newerr
, abfd
, sec
,
8653 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
:
8654 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE
);
8656 newerr
->next
= sec_data
->stm32l4xx_erratumlist
;
8657 sec_data
->stm32l4xx_erratumlist
= newerr
;
8664 IT blocks are only encoded in T1
8665 Encoding T1: IT{x{y{z}}} <firstcond>
8666 1 0 1 1 - 1 1 1 1 - firstcond - mask
8667 if mask = '0000' then see 'related encodings'
8668 We don't deal with UNPREDICTABLE, just ignore these.
8669 There can be no nested IT blocks so an IT block
8670 is naturally a new one for which it is worth
8671 computing its size. */
8672 bfd_boolean is_newitblock
= ((insn
& 0xff00) == 0xbf00)
8673 && ((insn
& 0x000f) != 0x0000);
8674 /* If we have a new IT block we compute its size. */
8677 /* Compute the number of instructions controlled
8678 by the IT block, it will be used to decide
8679 whether we are inside an IT block or not. */
8680 unsigned int mask
= insn
& 0x000f;
8681 itblock_current_pos
= 4 - ctz (mask
);
8685 i
+= insn_32bit
? 4 : 2;
8689 if (contents
!= NULL
8690 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
8698 if (contents
!= NULL
8699 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
8705 /* Set target relocation values needed during linking. */
8708 bfd_elf32_arm_set_target_params (struct bfd
*output_bfd
,
8709 struct bfd_link_info
*link_info
,
8710 struct elf32_arm_params
*params
)
8712 struct elf32_arm_link_hash_table
*globals
;
8714 globals
= elf32_arm_hash_table (link_info
);
8715 if (globals
== NULL
)
8718 globals
->target1_is_rel
= params
->target1_is_rel
;
8719 if (strcmp (params
->target2_type
, "rel") == 0)
8720 globals
->target2_reloc
= R_ARM_REL32
;
8721 else if (strcmp (params
->target2_type
, "abs") == 0)
8722 globals
->target2_reloc
= R_ARM_ABS32
;
8723 else if (strcmp (params
->target2_type
, "got-rel") == 0)
8724 globals
->target2_reloc
= R_ARM_GOT_PREL
;
8727 _bfd_error_handler (_("invalid TARGET2 relocation type '%s'"),
8728 params
->target2_type
);
8730 globals
->fix_v4bx
= params
->fix_v4bx
;
8731 globals
->use_blx
|= params
->use_blx
;
8732 globals
->vfp11_fix
= params
->vfp11_denorm_fix
;
8733 globals
->stm32l4xx_fix
= params
->stm32l4xx_fix
;
8734 globals
->pic_veneer
= params
->pic_veneer
;
8735 globals
->fix_cortex_a8
= params
->fix_cortex_a8
;
8736 globals
->fix_arm1176
= params
->fix_arm1176
;
8737 globals
->cmse_implib
= params
->cmse_implib
;
8738 globals
->in_implib_bfd
= params
->in_implib_bfd
;
8740 BFD_ASSERT (is_arm_elf (output_bfd
));
8741 elf_arm_tdata (output_bfd
)->no_enum_size_warning
8742 = params
->no_enum_size_warning
;
8743 elf_arm_tdata (output_bfd
)->no_wchar_size_warning
8744 = params
->no_wchar_size_warning
;
8747 /* Replace the target offset of a Thumb bl or b.w instruction. */
8750 insert_thumb_branch (bfd
*abfd
, long int offset
, bfd_byte
*insn
)
8756 BFD_ASSERT ((offset
& 1) == 0);
8758 upper
= bfd_get_16 (abfd
, insn
);
8759 lower
= bfd_get_16 (abfd
, insn
+ 2);
8760 reloc_sign
= (offset
< 0) ? 1 : 0;
8761 upper
= (upper
& ~(bfd_vma
) 0x7ff)
8762 | ((offset
>> 12) & 0x3ff)
8763 | (reloc_sign
<< 10);
8764 lower
= (lower
& ~(bfd_vma
) 0x2fff)
8765 | (((!((offset
>> 23) & 1)) ^ reloc_sign
) << 13)
8766 | (((!((offset
>> 22) & 1)) ^ reloc_sign
) << 11)
8767 | ((offset
>> 1) & 0x7ff);
8768 bfd_put_16 (abfd
, upper
, insn
);
8769 bfd_put_16 (abfd
, lower
, insn
+ 2);
8772 /* Thumb code calling an ARM function. */
8775 elf32_thumb_to_arm_stub (struct bfd_link_info
* info
,
8779 asection
* input_section
,
8780 bfd_byte
* hit_data
,
8783 bfd_signed_vma addend
,
8785 char **error_message
)
8789 long int ret_offset
;
8790 struct elf_link_hash_entry
* myh
;
8791 struct elf32_arm_link_hash_table
* globals
;
8793 myh
= find_thumb_glue (info
, name
, error_message
);
8797 globals
= elf32_arm_hash_table (info
);
8798 BFD_ASSERT (globals
!= NULL
);
8799 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
8801 my_offset
= myh
->root
.u
.def
.value
;
8803 s
= bfd_get_linker_section (globals
->bfd_of_glue_owner
,
8804 THUMB2ARM_GLUE_SECTION_NAME
);
8806 BFD_ASSERT (s
!= NULL
);
8807 BFD_ASSERT (s
->contents
!= NULL
);
8808 BFD_ASSERT (s
->output_section
!= NULL
);
8810 if ((my_offset
& 0x01) == 0x01)
8813 && sym_sec
->owner
!= NULL
8814 && !INTERWORK_FLAG (sym_sec
->owner
))
8817 (_("%pB(%s): warning: interworking not enabled;"
8818 " first occurrence: %pB: %s call to %s"),
8819 sym_sec
->owner
, name
, input_bfd
, "Thumb", "ARM");
8825 myh
->root
.u
.def
.value
= my_offset
;
8827 put_thumb_insn (globals
, output_bfd
, (bfd_vma
) t2a1_bx_pc_insn
,
8828 s
->contents
+ my_offset
);
8830 put_thumb_insn (globals
, output_bfd
, (bfd_vma
) t2a2_noop_insn
,
8831 s
->contents
+ my_offset
+ 2);
8834 /* Address of destination of the stub. */
8835 ((bfd_signed_vma
) val
)
8837 /* Offset from the start of the current section
8838 to the start of the stubs. */
8840 /* Offset of the start of this stub from the start of the stubs. */
8842 /* Address of the start of the current section. */
8843 + s
->output_section
->vma
)
8844 /* The branch instruction is 4 bytes into the stub. */
8846 /* ARM branches work from the pc of the instruction + 8. */
8849 put_arm_insn (globals
, output_bfd
,
8850 (bfd_vma
) t2a3_b_insn
| ((ret_offset
>> 2) & 0x00FFFFFF),
8851 s
->contents
+ my_offset
+ 4);
8854 BFD_ASSERT (my_offset
<= globals
->thumb_glue_size
);
8856 /* Now go back and fix up the original BL insn to point to here. */
8858 /* Address of where the stub is located. */
8859 (s
->output_section
->vma
+ s
->output_offset
+ my_offset
)
8860 /* Address of where the BL is located. */
8861 - (input_section
->output_section
->vma
+ input_section
->output_offset
8863 /* Addend in the relocation. */
8865 /* Biassing for PC-relative addressing. */
8868 insert_thumb_branch (input_bfd
, ret_offset
, hit_data
- input_section
->vma
);
8873 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
8875 static struct elf_link_hash_entry
*
8876 elf32_arm_create_thumb_stub (struct bfd_link_info
* info
,
8883 char ** error_message
)
8886 long int ret_offset
;
8887 struct elf_link_hash_entry
* myh
;
8888 struct elf32_arm_link_hash_table
* globals
;
8890 myh
= find_arm_glue (info
, name
, error_message
);
8894 globals
= elf32_arm_hash_table (info
);
8895 BFD_ASSERT (globals
!= NULL
);
8896 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
8898 my_offset
= myh
->root
.u
.def
.value
;
8900 if ((my_offset
& 0x01) == 0x01)
8903 && sym_sec
->owner
!= NULL
8904 && !INTERWORK_FLAG (sym_sec
->owner
))
8907 (_("%pB(%s): warning: interworking not enabled;"
8908 " first occurrence: %pB: %s call to %s"),
8909 sym_sec
->owner
, name
, input_bfd
, "ARM", "Thumb");
8913 myh
->root
.u
.def
.value
= my_offset
;
8915 if (bfd_link_pic (info
)
8916 || globals
->root
.is_relocatable_executable
8917 || globals
->pic_veneer
)
8919 /* For relocatable objects we can't use absolute addresses,
8920 so construct the address from a relative offset. */
8921 /* TODO: If the offset is small it's probably worth
8922 constructing the address with adds. */
8923 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t1p_ldr_insn
,
8924 s
->contents
+ my_offset
);
8925 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t2p_add_pc_insn
,
8926 s
->contents
+ my_offset
+ 4);
8927 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t3p_bx_r12_insn
,
8928 s
->contents
+ my_offset
+ 8);
8929 /* Adjust the offset by 4 for the position of the add,
8930 and 8 for the pipeline offset. */
8931 ret_offset
= (val
- (s
->output_offset
8932 + s
->output_section
->vma
8935 bfd_put_32 (output_bfd
, ret_offset
,
8936 s
->contents
+ my_offset
+ 12);
8938 else if (globals
->use_blx
)
8940 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t1v5_ldr_insn
,
8941 s
->contents
+ my_offset
);
8943 /* It's a thumb address. Add the low order bit. */
8944 bfd_put_32 (output_bfd
, val
| a2t2v5_func_addr_insn
,
8945 s
->contents
+ my_offset
+ 4);
8949 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t1_ldr_insn
,
8950 s
->contents
+ my_offset
);
8952 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t2_bx_r12_insn
,
8953 s
->contents
+ my_offset
+ 4);
8955 /* It's a thumb address. Add the low order bit. */
8956 bfd_put_32 (output_bfd
, val
| a2t3_func_addr_insn
,
8957 s
->contents
+ my_offset
+ 8);
8963 BFD_ASSERT (my_offset
<= globals
->arm_glue_size
);
8968 /* Arm code calling a Thumb function. */
8971 elf32_arm_to_thumb_stub (struct bfd_link_info
* info
,
8975 asection
* input_section
,
8976 bfd_byte
* hit_data
,
8979 bfd_signed_vma addend
,
8981 char **error_message
)
8983 unsigned long int tmp
;
8986 long int ret_offset
;
8987 struct elf_link_hash_entry
* myh
;
8988 struct elf32_arm_link_hash_table
* globals
;
8990 globals
= elf32_arm_hash_table (info
);
8991 BFD_ASSERT (globals
!= NULL
);
8992 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
8994 s
= bfd_get_linker_section (globals
->bfd_of_glue_owner
,
8995 ARM2THUMB_GLUE_SECTION_NAME
);
8996 BFD_ASSERT (s
!= NULL
);
8997 BFD_ASSERT (s
->contents
!= NULL
);
8998 BFD_ASSERT (s
->output_section
!= NULL
);
9000 myh
= elf32_arm_create_thumb_stub (info
, name
, input_bfd
, output_bfd
,
9001 sym_sec
, val
, s
, error_message
);
9005 my_offset
= myh
->root
.u
.def
.value
;
9006 tmp
= bfd_get_32 (input_bfd
, hit_data
);
9007 tmp
= tmp
& 0xFF000000;
9009 /* Somehow these are both 4 too far, so subtract 8. */
9010 ret_offset
= (s
->output_offset
9012 + s
->output_section
->vma
9013 - (input_section
->output_offset
9014 + input_section
->output_section
->vma
9018 tmp
= tmp
| ((ret_offset
>> 2) & 0x00FFFFFF);
9020 bfd_put_32 (output_bfd
, (bfd_vma
) tmp
, hit_data
- input_section
->vma
);
9025 /* Populate Arm stub for an exported Thumb function. */
9028 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry
*h
, void * inf
)
9030 struct bfd_link_info
* info
= (struct bfd_link_info
*) inf
;
9032 struct elf_link_hash_entry
* myh
;
9033 struct elf32_arm_link_hash_entry
*eh
;
9034 struct elf32_arm_link_hash_table
* globals
;
9037 char *error_message
;
9039 eh
= elf32_arm_hash_entry (h
);
9040 /* Allocate stubs for exported Thumb functions on v4t. */
9041 if (eh
->export_glue
== NULL
)
9044 globals
= elf32_arm_hash_table (info
);
9045 BFD_ASSERT (globals
!= NULL
);
9046 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
9048 s
= bfd_get_linker_section (globals
->bfd_of_glue_owner
,
9049 ARM2THUMB_GLUE_SECTION_NAME
);
9050 BFD_ASSERT (s
!= NULL
);
9051 BFD_ASSERT (s
->contents
!= NULL
);
9052 BFD_ASSERT (s
->output_section
!= NULL
);
9054 sec
= eh
->export_glue
->root
.u
.def
.section
;
9056 BFD_ASSERT (sec
->output_section
!= NULL
);
9058 val
= eh
->export_glue
->root
.u
.def
.value
+ sec
->output_offset
9059 + sec
->output_section
->vma
;
9061 myh
= elf32_arm_create_thumb_stub (info
, h
->root
.root
.string
,
9062 h
->root
.u
.def
.section
->owner
,
9063 globals
->obfd
, sec
, val
, s
,
9069 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
9072 elf32_arm_bx_glue (struct bfd_link_info
* info
, int reg
)
9077 struct elf32_arm_link_hash_table
*globals
;
9079 globals
= elf32_arm_hash_table (info
);
9080 BFD_ASSERT (globals
!= NULL
);
9081 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
9083 s
= bfd_get_linker_section (globals
->bfd_of_glue_owner
,
9084 ARM_BX_GLUE_SECTION_NAME
);
9085 BFD_ASSERT (s
!= NULL
);
9086 BFD_ASSERT (s
->contents
!= NULL
);
9087 BFD_ASSERT (s
->output_section
!= NULL
);
9089 BFD_ASSERT (globals
->bx_glue_offset
[reg
] & 2);
9091 glue_addr
= globals
->bx_glue_offset
[reg
] & ~(bfd_vma
)3;
9093 if ((globals
->bx_glue_offset
[reg
] & 1) == 0)
9095 p
= s
->contents
+ glue_addr
;
9096 bfd_put_32 (globals
->obfd
, armbx1_tst_insn
+ (reg
<< 16), p
);
9097 bfd_put_32 (globals
->obfd
, armbx2_moveq_insn
+ reg
, p
+ 4);
9098 bfd_put_32 (globals
->obfd
, armbx3_bx_insn
+ reg
, p
+ 8);
9099 globals
->bx_glue_offset
[reg
] |= 1;
9102 return glue_addr
+ s
->output_section
->vma
+ s
->output_offset
;
9105 /* Generate Arm stubs for exported Thumb symbols. */
9107 elf32_arm_begin_write_processing (bfd
*abfd ATTRIBUTE_UNUSED
,
9108 struct bfd_link_info
*link_info
)
9110 struct elf32_arm_link_hash_table
* globals
;
9112 if (link_info
== NULL
)
9113 /* Ignore this if we are not called by the ELF backend linker. */
9116 globals
= elf32_arm_hash_table (link_info
);
9117 if (globals
== NULL
)
9120 /* If blx is available then exported Thumb symbols are OK and there is
9122 if (globals
->use_blx
)
9125 elf_link_hash_traverse (&globals
->root
, elf32_arm_to_thumb_export_stub
,
9129 /* Reserve space for COUNT dynamic relocations in relocation selection
9133 elf32_arm_allocate_dynrelocs (struct bfd_link_info
*info
, asection
*sreloc
,
9134 bfd_size_type count
)
9136 struct elf32_arm_link_hash_table
*htab
;
9138 htab
= elf32_arm_hash_table (info
);
9139 BFD_ASSERT (htab
->root
.dynamic_sections_created
);
9142 sreloc
->size
+= RELOC_SIZE (htab
) * count
;
9145 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
9146 dynamic, the relocations should go in SRELOC, otherwise they should
9147 go in the special .rel.iplt section. */
9150 elf32_arm_allocate_irelocs (struct bfd_link_info
*info
, asection
*sreloc
,
9151 bfd_size_type count
)
9153 struct elf32_arm_link_hash_table
*htab
;
9155 htab
= elf32_arm_hash_table (info
);
9156 if (!htab
->root
.dynamic_sections_created
)
9157 htab
->root
.irelplt
->size
+= RELOC_SIZE (htab
) * count
;
9160 BFD_ASSERT (sreloc
!= NULL
);
9161 sreloc
->size
+= RELOC_SIZE (htab
) * count
;
9165 /* Add relocation REL to the end of relocation section SRELOC. */
9168 elf32_arm_add_dynreloc (bfd
*output_bfd
, struct bfd_link_info
*info
,
9169 asection
*sreloc
, Elf_Internal_Rela
*rel
)
9172 struct elf32_arm_link_hash_table
*htab
;
9174 htab
= elf32_arm_hash_table (info
);
9175 if (!htab
->root
.dynamic_sections_created
9176 && ELF32_R_TYPE (rel
->r_info
) == R_ARM_IRELATIVE
)
9177 sreloc
= htab
->root
.irelplt
;
9180 loc
= sreloc
->contents
;
9181 loc
+= sreloc
->reloc_count
++ * RELOC_SIZE (htab
);
9182 if (sreloc
->reloc_count
* RELOC_SIZE (htab
) > sreloc
->size
)
9184 SWAP_RELOC_OUT (htab
) (output_bfd
, rel
, loc
);
9187 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
9188 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
9192 elf32_arm_allocate_plt_entry (struct bfd_link_info
*info
,
9193 bfd_boolean is_iplt_entry
,
9194 union gotplt_union
*root_plt
,
9195 struct arm_plt_info
*arm_plt
)
9197 struct elf32_arm_link_hash_table
*htab
;
9201 htab
= elf32_arm_hash_table (info
);
9205 splt
= htab
->root
.iplt
;
9206 sgotplt
= htab
->root
.igotplt
;
9208 /* NaCl uses a special first entry in .iplt too. */
9209 if (htab
->nacl_p
&& splt
->size
== 0)
9210 splt
->size
+= htab
->plt_header_size
;
9212 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
9213 elf32_arm_allocate_irelocs (info
, htab
->root
.irelplt
, 1);
9217 splt
= htab
->root
.splt
;
9218 sgotplt
= htab
->root
.sgotplt
;
9220 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
9221 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelplt
, 1);
9223 /* If this is the first .plt entry, make room for the special
9225 if (splt
->size
== 0)
9226 splt
->size
+= htab
->plt_header_size
;
9228 htab
->next_tls_desc_index
++;
9231 /* Allocate the PLT entry itself, including any leading Thumb stub. */
9232 if (elf32_arm_plt_needs_thumb_stub_p (info
, arm_plt
))
9233 splt
->size
+= PLT_THUMB_STUB_SIZE
;
9234 root_plt
->offset
= splt
->size
;
9235 splt
->size
+= htab
->plt_entry_size
;
9237 if (!htab
->symbian_p
)
9239 /* We also need to make an entry in the .got.plt section, which
9240 will be placed in the .got section by the linker script. */
9242 arm_plt
->got_offset
= sgotplt
->size
;
9244 arm_plt
->got_offset
= sgotplt
->size
- 8 * htab
->num_tls_desc
;
9250 arm_movw_immediate (bfd_vma value
)
9252 return (value
& 0x00000fff) | ((value
& 0x0000f000) << 4);
9256 arm_movt_immediate (bfd_vma value
)
9258 return ((value
& 0x0fff0000) >> 16) | ((value
& 0xf0000000) >> 12);
9261 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
9262 the entry lives in .iplt and resolves to (*SYM_VALUE)().
9263 Otherwise, DYNINDX is the index of the symbol in the dynamic
9264 symbol table and SYM_VALUE is undefined.
9266 ROOT_PLT points to the offset of the PLT entry from the start of its
9267 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
9268 bookkeeping information.
9270 Returns FALSE if there was a problem. */
9273 elf32_arm_populate_plt_entry (bfd
*output_bfd
, struct bfd_link_info
*info
,
9274 union gotplt_union
*root_plt
,
9275 struct arm_plt_info
*arm_plt
,
9276 int dynindx
, bfd_vma sym_value
)
9278 struct elf32_arm_link_hash_table
*htab
;
9284 Elf_Internal_Rela rel
;
9285 bfd_vma plt_header_size
;
9286 bfd_vma got_header_size
;
9288 htab
= elf32_arm_hash_table (info
);
9290 /* Pick the appropriate sections and sizes. */
9293 splt
= htab
->root
.iplt
;
9294 sgot
= htab
->root
.igotplt
;
9295 srel
= htab
->root
.irelplt
;
9297 /* There are no reserved entries in .igot.plt, and no special
9298 first entry in .iplt. */
9299 got_header_size
= 0;
9300 plt_header_size
= 0;
9304 splt
= htab
->root
.splt
;
9305 sgot
= htab
->root
.sgotplt
;
9306 srel
= htab
->root
.srelplt
;
9308 got_header_size
= get_elf_backend_data (output_bfd
)->got_header_size
;
9309 plt_header_size
= htab
->plt_header_size
;
9311 BFD_ASSERT (splt
!= NULL
&& srel
!= NULL
);
9313 /* Fill in the entry in the procedure linkage table. */
9314 if (htab
->symbian_p
)
9316 BFD_ASSERT (dynindx
>= 0);
9317 put_arm_insn (htab
, output_bfd
,
9318 elf32_arm_symbian_plt_entry
[0],
9319 splt
->contents
+ root_plt
->offset
);
9320 bfd_put_32 (output_bfd
,
9321 elf32_arm_symbian_plt_entry
[1],
9322 splt
->contents
+ root_plt
->offset
+ 4);
9324 /* Fill in the entry in the .rel.plt section. */
9325 rel
.r_offset
= (splt
->output_section
->vma
9326 + splt
->output_offset
9327 + root_plt
->offset
+ 4);
9328 rel
.r_info
= ELF32_R_INFO (dynindx
, R_ARM_GLOB_DAT
);
9330 /* Get the index in the procedure linkage table which
9331 corresponds to this symbol. This is the index of this symbol
9332 in all the symbols for which we are making plt entries. The
9333 first entry in the procedure linkage table is reserved. */
9334 plt_index
= ((root_plt
->offset
- plt_header_size
)
9335 / htab
->plt_entry_size
);
9339 bfd_vma got_offset
, got_address
, plt_address
;
9340 bfd_vma got_displacement
, initial_got_entry
;
9343 BFD_ASSERT (sgot
!= NULL
);
9345 /* Get the offset into the .(i)got.plt table of the entry that
9346 corresponds to this function. */
9347 got_offset
= (arm_plt
->got_offset
& -2);
9349 /* Get the index in the procedure linkage table which
9350 corresponds to this symbol. This is the index of this symbol
9351 in all the symbols for which we are making plt entries.
9352 After the reserved .got.plt entries, all symbols appear in
9353 the same order as in .plt. */
9354 plt_index
= (got_offset
- got_header_size
) / 4;
9356 /* Calculate the address of the GOT entry. */
9357 got_address
= (sgot
->output_section
->vma
9358 + sgot
->output_offset
9361 /* ...and the address of the PLT entry. */
9362 plt_address
= (splt
->output_section
->vma
9363 + splt
->output_offset
9364 + root_plt
->offset
);
9366 ptr
= splt
->contents
+ root_plt
->offset
;
9367 if (htab
->vxworks_p
&& bfd_link_pic (info
))
9372 for (i
= 0; i
!= htab
->plt_entry_size
/ 4; i
++, ptr
+= 4)
9374 val
= elf32_arm_vxworks_shared_plt_entry
[i
];
9376 val
|= got_address
- sgot
->output_section
->vma
;
9378 val
|= plt_index
* RELOC_SIZE (htab
);
9379 if (i
== 2 || i
== 5)
9380 bfd_put_32 (output_bfd
, val
, ptr
);
9382 put_arm_insn (htab
, output_bfd
, val
, ptr
);
9385 else if (htab
->vxworks_p
)
9390 for (i
= 0; i
!= htab
->plt_entry_size
/ 4; i
++, ptr
+= 4)
9392 val
= elf32_arm_vxworks_exec_plt_entry
[i
];
9396 val
|= 0xffffff & -((root_plt
->offset
+ i
* 4 + 8) >> 2);
9398 val
|= plt_index
* RELOC_SIZE (htab
);
9399 if (i
== 2 || i
== 5)
9400 bfd_put_32 (output_bfd
, val
, ptr
);
9402 put_arm_insn (htab
, output_bfd
, val
, ptr
);
9405 loc
= (htab
->srelplt2
->contents
9406 + (plt_index
* 2 + 1) * RELOC_SIZE (htab
));
9408 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
9409 referencing the GOT for this PLT entry. */
9410 rel
.r_offset
= plt_address
+ 8;
9411 rel
.r_info
= ELF32_R_INFO (htab
->root
.hgot
->indx
, R_ARM_ABS32
);
9412 rel
.r_addend
= got_offset
;
9413 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, loc
);
9414 loc
+= RELOC_SIZE (htab
);
9416 /* Create the R_ARM_ABS32 relocation referencing the
9417 beginning of the PLT for this GOT entry. */
9418 rel
.r_offset
= got_address
;
9419 rel
.r_info
= ELF32_R_INFO (htab
->root
.hplt
->indx
, R_ARM_ABS32
);
9421 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, loc
);
9423 else if (htab
->nacl_p
)
9425 /* Calculate the displacement between the PLT slot and the
9426 common tail that's part of the special initial PLT slot. */
9427 int32_t tail_displacement
9428 = ((splt
->output_section
->vma
+ splt
->output_offset
9429 + ARM_NACL_PLT_TAIL_OFFSET
)
9430 - (plt_address
+ htab
->plt_entry_size
+ 4));
9431 BFD_ASSERT ((tail_displacement
& 3) == 0);
9432 tail_displacement
>>= 2;
9434 BFD_ASSERT ((tail_displacement
& 0xff000000) == 0
9435 || (-tail_displacement
& 0xff000000) == 0);
9437 /* Calculate the displacement between the PLT slot and the entry
9438 in the GOT. The offset accounts for the value produced by
9439 adding to pc in the penultimate instruction of the PLT stub. */
9440 got_displacement
= (got_address
9441 - (plt_address
+ htab
->plt_entry_size
));
9443 /* NaCl does not support interworking at all. */
9444 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info
, arm_plt
));
9446 put_arm_insn (htab
, output_bfd
,
9447 elf32_arm_nacl_plt_entry
[0]
9448 | arm_movw_immediate (got_displacement
),
9450 put_arm_insn (htab
, output_bfd
,
9451 elf32_arm_nacl_plt_entry
[1]
9452 | arm_movt_immediate (got_displacement
),
9454 put_arm_insn (htab
, output_bfd
,
9455 elf32_arm_nacl_plt_entry
[2],
9457 put_arm_insn (htab
, output_bfd
,
9458 elf32_arm_nacl_plt_entry
[3]
9459 | (tail_displacement
& 0x00ffffff),
9462 else if (using_thumb_only (htab
))
9464 /* PR ld/16017: Generate thumb only PLT entries. */
9465 if (!using_thumb2 (htab
))
9467 /* FIXME: We ought to be able to generate thumb-1 PLT
9469 _bfd_error_handler (_("%pB: warning: thumb-1 mode PLT generation not currently supported"),
9474 /* Calculate the displacement between the PLT slot and the entry in
9475 the GOT. The 12-byte offset accounts for the value produced by
9476 adding to pc in the 3rd instruction of the PLT stub. */
9477 got_displacement
= got_address
- (plt_address
+ 12);
9479 /* As we are using 32 bit instructions we have to use 'put_arm_insn'
9480 instead of 'put_thumb_insn'. */
9481 put_arm_insn (htab
, output_bfd
,
9482 elf32_thumb2_plt_entry
[0]
9483 | ((got_displacement
& 0x000000ff) << 16)
9484 | ((got_displacement
& 0x00000700) << 20)
9485 | ((got_displacement
& 0x00000800) >> 1)
9486 | ((got_displacement
& 0x0000f000) >> 12),
9488 put_arm_insn (htab
, output_bfd
,
9489 elf32_thumb2_plt_entry
[1]
9490 | ((got_displacement
& 0x00ff0000) )
9491 | ((got_displacement
& 0x07000000) << 4)
9492 | ((got_displacement
& 0x08000000) >> 17)
9493 | ((got_displacement
& 0xf0000000) >> 28),
9495 put_arm_insn (htab
, output_bfd
,
9496 elf32_thumb2_plt_entry
[2],
9498 put_arm_insn (htab
, output_bfd
,
9499 elf32_thumb2_plt_entry
[3],
9504 /* Calculate the displacement between the PLT slot and the
9505 entry in the GOT. The eight-byte offset accounts for the
9506 value produced by adding to pc in the first instruction
9508 got_displacement
= got_address
- (plt_address
+ 8);
9510 if (elf32_arm_plt_needs_thumb_stub_p (info
, arm_plt
))
9512 put_thumb_insn (htab
, output_bfd
,
9513 elf32_arm_plt_thumb_stub
[0], ptr
- 4);
9514 put_thumb_insn (htab
, output_bfd
,
9515 elf32_arm_plt_thumb_stub
[1], ptr
- 2);
9518 if (!elf32_arm_use_long_plt_entry
)
9520 BFD_ASSERT ((got_displacement
& 0xf0000000) == 0);
9522 put_arm_insn (htab
, output_bfd
,
9523 elf32_arm_plt_entry_short
[0]
9524 | ((got_displacement
& 0x0ff00000) >> 20),
9526 put_arm_insn (htab
, output_bfd
,
9527 elf32_arm_plt_entry_short
[1]
9528 | ((got_displacement
& 0x000ff000) >> 12),
9530 put_arm_insn (htab
, output_bfd
,
9531 elf32_arm_plt_entry_short
[2]
9532 | (got_displacement
& 0x00000fff),
9534 #ifdef FOUR_WORD_PLT
9535 bfd_put_32 (output_bfd
, elf32_arm_plt_entry_short
[3], ptr
+ 12);
9540 put_arm_insn (htab
, output_bfd
,
9541 elf32_arm_plt_entry_long
[0]
9542 | ((got_displacement
& 0xf0000000) >> 28),
9544 put_arm_insn (htab
, output_bfd
,
9545 elf32_arm_plt_entry_long
[1]
9546 | ((got_displacement
& 0x0ff00000) >> 20),
9548 put_arm_insn (htab
, output_bfd
,
9549 elf32_arm_plt_entry_long
[2]
9550 | ((got_displacement
& 0x000ff000) >> 12),
9552 put_arm_insn (htab
, output_bfd
,
9553 elf32_arm_plt_entry_long
[3]
9554 | (got_displacement
& 0x00000fff),
9559 /* Fill in the entry in the .rel(a).(i)plt section. */
9560 rel
.r_offset
= got_address
;
9564 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
9565 The dynamic linker or static executable then calls SYM_VALUE
9566 to determine the correct run-time value of the .igot.plt entry. */
9567 rel
.r_info
= ELF32_R_INFO (0, R_ARM_IRELATIVE
);
9568 initial_got_entry
= sym_value
;
9572 rel
.r_info
= ELF32_R_INFO (dynindx
, R_ARM_JUMP_SLOT
);
9573 initial_got_entry
= (splt
->output_section
->vma
9574 + splt
->output_offset
);
9577 /* Fill in the entry in the global offset table. */
9578 bfd_put_32 (output_bfd
, initial_got_entry
,
9579 sgot
->contents
+ got_offset
);
9583 elf32_arm_add_dynreloc (output_bfd
, info
, srel
, &rel
);
9586 loc
= srel
->contents
+ plt_index
* RELOC_SIZE (htab
);
9587 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, loc
);
9593 /* Some relocations map to different relocations depending on the
9594 target. Return the real relocation. */
9597 arm_real_reloc_type (struct elf32_arm_link_hash_table
* globals
,
9603 if (globals
->target1_is_rel
)
9609 return globals
->target2_reloc
;
9616 /* Return the base VMA address which should be subtracted from real addresses
9617 when resolving @dtpoff relocation.
9618 This is PT_TLS segment p_vaddr. */
9621 dtpoff_base (struct bfd_link_info
*info
)
9623 /* If tls_sec is NULL, we should have signalled an error already. */
9624 if (elf_hash_table (info
)->tls_sec
== NULL
)
9626 return elf_hash_table (info
)->tls_sec
->vma
;
9629 /* Return the relocation value for @tpoff relocation
9630 if STT_TLS virtual address is ADDRESS. */
9633 tpoff (struct bfd_link_info
*info
, bfd_vma address
)
9635 struct elf_link_hash_table
*htab
= elf_hash_table (info
);
9638 /* If tls_sec is NULL, we should have signalled an error already. */
9639 if (htab
->tls_sec
== NULL
)
9641 base
= align_power ((bfd_vma
) TCB_SIZE
, htab
->tls_sec
->alignment_power
);
9642 return address
- htab
->tls_sec
->vma
+ base
;
9645 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
9646 VALUE is the relocation value. */
9648 static bfd_reloc_status_type
9649 elf32_arm_abs12_reloc (bfd
*abfd
, void *data
, bfd_vma value
)
9652 return bfd_reloc_overflow
;
9654 value
|= bfd_get_32 (abfd
, data
) & 0xfffff000;
9655 bfd_put_32 (abfd
, value
, data
);
9656 return bfd_reloc_ok
;
9659 /* Handle TLS relaxations. Relaxing is possible for symbols that use
9660 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
9661 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
9663 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
9664 is to then call final_link_relocate. Return other values in the
9667 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
9668 the pre-relaxed code. It would be nice if the relocs were updated
9669 to match the optimization. */
9671 static bfd_reloc_status_type
9672 elf32_arm_tls_relax (struct elf32_arm_link_hash_table
*globals
,
9673 bfd
*input_bfd
, asection
*input_sec
, bfd_byte
*contents
,
9674 Elf_Internal_Rela
*rel
, unsigned long is_local
)
9678 switch (ELF32_R_TYPE (rel
->r_info
))
9681 return bfd_reloc_notsupported
;
9683 case R_ARM_TLS_GOTDESC
:
9688 insn
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
);
9690 insn
-= 5; /* THUMB */
9692 insn
-= 8; /* ARM */
9694 bfd_put_32 (input_bfd
, insn
, contents
+ rel
->r_offset
);
9695 return bfd_reloc_continue
;
9697 case R_ARM_THM_TLS_DESCSEQ
:
9699 insn
= bfd_get_16 (input_bfd
, contents
+ rel
->r_offset
);
9700 if ((insn
& 0xff78) == 0x4478) /* add rx, pc */
9704 bfd_put_16 (input_bfd
, 0x46c0, contents
+ rel
->r_offset
);
9706 else if ((insn
& 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
9710 bfd_put_16 (input_bfd
, 0x46c0, contents
+ rel
->r_offset
);
9713 bfd_put_16 (input_bfd
, insn
& 0xf83f, contents
+ rel
->r_offset
);
9715 else if ((insn
& 0xff87) == 0x4780) /* blx rx */
9719 bfd_put_16 (input_bfd
, 0x46c0, contents
+ rel
->r_offset
);
9722 bfd_put_16 (input_bfd
, 0x4600 | (insn
& 0x78),
9723 contents
+ rel
->r_offset
);
9727 if ((insn
& 0xf000) == 0xf000 || (insn
& 0xf800) == 0xe800)
9728 /* It's a 32 bit instruction, fetch the rest of it for
9729 error generation. */
9731 | bfd_get_16 (input_bfd
, contents
+ rel
->r_offset
+ 2);
9733 /* xgettext:c-format */
9734 (_("%pB(%pA+%#" PRIx64
"): "
9735 "unexpected %s instruction '%#lx' in TLS trampoline"),
9736 input_bfd
, input_sec
, (uint64_t) rel
->r_offset
,
9738 return bfd_reloc_notsupported
;
9742 case R_ARM_TLS_DESCSEQ
:
9744 insn
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
);
9745 if ((insn
& 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
9749 bfd_put_32 (input_bfd
, 0xe1a00000 | (insn
& 0xffff),
9750 contents
+ rel
->r_offset
);
9752 else if ((insn
& 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
9756 bfd_put_32 (input_bfd
, 0xe1a00000, contents
+ rel
->r_offset
);
9759 bfd_put_32 (input_bfd
, insn
& 0xfffff000,
9760 contents
+ rel
->r_offset
);
9762 else if ((insn
& 0xfffffff0) == 0xe12fff30) /* blx rx */
9766 bfd_put_32 (input_bfd
, 0xe1a00000, contents
+ rel
->r_offset
);
9769 bfd_put_32 (input_bfd
, 0xe1a00000 | (insn
& 0xf),
9770 contents
+ rel
->r_offset
);
9775 /* xgettext:c-format */
9776 (_("%pB(%pA+%#" PRIx64
"): "
9777 "unexpected %s instruction '%#lx' in TLS trampoline"),
9778 input_bfd
, input_sec
, (uint64_t) rel
->r_offset
,
9780 return bfd_reloc_notsupported
;
9784 case R_ARM_TLS_CALL
:
9785 /* GD->IE relaxation, turn the instruction into 'nop' or
9786 'ldr r0, [pc,r0]' */
9787 insn
= is_local
? 0xe1a00000 : 0xe79f0000;
9788 bfd_put_32 (input_bfd
, insn
, contents
+ rel
->r_offset
);
9791 case R_ARM_THM_TLS_CALL
:
9792 /* GD->IE relaxation. */
9794 /* add r0,pc; ldr r0, [r0] */
9796 else if (using_thumb2 (globals
))
9803 bfd_put_16 (input_bfd
, insn
>> 16, contents
+ rel
->r_offset
);
9804 bfd_put_16 (input_bfd
, insn
& 0xffff, contents
+ rel
->r_offset
+ 2);
9807 return bfd_reloc_ok
;
9810 /* For a given value of n, calculate the value of G_n as required to
9811 deal with group relocations. We return it in the form of an
9812 encoded constant-and-rotation, together with the final residual. If n is
9813 specified as less than zero, then final_residual is filled with the
9814 input value and no further action is performed. */
9817 calculate_group_reloc_mask (bfd_vma value
, int n
, bfd_vma
*final_residual
)
9821 bfd_vma encoded_g_n
= 0;
9822 bfd_vma residual
= value
; /* Also known as Y_n. */
9824 for (current_n
= 0; current_n
<= n
; current_n
++)
9828 /* Calculate which part of the value to mask. */
9835 /* Determine the most significant bit in the residual and
9836 align the resulting value to a 2-bit boundary. */
9837 for (msb
= 30; msb
>= 0; msb
-= 2)
9838 if (residual
& (3 << msb
))
9841 /* The desired shift is now (msb - 6), or zero, whichever
9848 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
9849 g_n
= residual
& (0xff << shift
);
9850 encoded_g_n
= (g_n
>> shift
)
9851 | ((g_n
<= 0xff ? 0 : (32 - shift
) / 2) << 8);
9853 /* Calculate the residual for the next time around. */
9857 *final_residual
= residual
;
9862 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
9863 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
9866 identify_add_or_sub (bfd_vma insn
)
9868 int opcode
= insn
& 0x1e00000;
9870 if (opcode
== 1 << 23) /* ADD */
9873 if (opcode
== 1 << 22) /* SUB */
9879 /* Perform a relocation as part of a final link. */
9881 static bfd_reloc_status_type
9882 elf32_arm_final_link_relocate (reloc_howto_type
* howto
,
9885 asection
* input_section
,
9886 bfd_byte
* contents
,
9887 Elf_Internal_Rela
* rel
,
9889 struct bfd_link_info
* info
,
9891 const char * sym_name
,
9892 unsigned char st_type
,
9893 enum arm_st_branch_type branch_type
,
9894 struct elf_link_hash_entry
* h
,
9895 bfd_boolean
* unresolved_reloc_p
,
9896 char ** error_message
)
9898 unsigned long r_type
= howto
->type
;
9899 unsigned long r_symndx
;
9900 bfd_byte
* hit_data
= contents
+ rel
->r_offset
;
9901 bfd_vma
* local_got_offsets
;
9902 bfd_vma
* local_tlsdesc_gotents
;
9905 asection
* sreloc
= NULL
;
9908 bfd_signed_vma signed_addend
;
9909 unsigned char dynreloc_st_type
;
9910 bfd_vma dynreloc_value
;
9911 struct elf32_arm_link_hash_table
* globals
;
9912 struct elf32_arm_link_hash_entry
*eh
;
9913 union gotplt_union
*root_plt
;
9914 struct arm_plt_info
*arm_plt
;
9916 bfd_vma gotplt_offset
;
9917 bfd_boolean has_iplt_entry
;
9918 bfd_boolean resolved_to_zero
;
9920 globals
= elf32_arm_hash_table (info
);
9921 if (globals
== NULL
)
9922 return bfd_reloc_notsupported
;
9924 BFD_ASSERT (is_arm_elf (input_bfd
));
9925 BFD_ASSERT (howto
!= NULL
);
9927 /* Some relocation types map to different relocations depending on the
9928 target. We pick the right one here. */
9929 r_type
= arm_real_reloc_type (globals
, r_type
);
9931 /* It is possible to have linker relaxations on some TLS access
9932 models. Update our information here. */
9933 r_type
= elf32_arm_tls_transition (info
, r_type
, h
);
9935 if (r_type
!= howto
->type
)
9936 howto
= elf32_arm_howto_from_type (r_type
);
9938 eh
= (struct elf32_arm_link_hash_entry
*) h
;
9939 sgot
= globals
->root
.sgot
;
9940 local_got_offsets
= elf_local_got_offsets (input_bfd
);
9941 local_tlsdesc_gotents
= elf32_arm_local_tlsdesc_gotent (input_bfd
);
9943 if (globals
->root
.dynamic_sections_created
)
9944 srelgot
= globals
->root
.srelgot
;
9948 r_symndx
= ELF32_R_SYM (rel
->r_info
);
9950 if (globals
->use_rel
)
9952 addend
= bfd_get_32 (input_bfd
, hit_data
) & howto
->src_mask
;
9954 if (addend
& ((howto
->src_mask
+ 1) >> 1))
9957 signed_addend
&= ~ howto
->src_mask
;
9958 signed_addend
|= addend
;
9961 signed_addend
= addend
;
9964 addend
= signed_addend
= rel
->r_addend
;
9966 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
9967 are resolving a function call relocation. */
9968 if (using_thumb_only (globals
)
9969 && (r_type
== R_ARM_THM_CALL
9970 || r_type
== R_ARM_THM_JUMP24
)
9971 && branch_type
== ST_BRANCH_TO_ARM
)
9972 branch_type
= ST_BRANCH_TO_THUMB
;
9974 /* Record the symbol information that should be used in dynamic
9976 dynreloc_st_type
= st_type
;
9977 dynreloc_value
= value
;
9978 if (branch_type
== ST_BRANCH_TO_THUMB
)
9979 dynreloc_value
|= 1;
9981 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
9982 VALUE appropriately for relocations that we resolve at link time. */
9983 has_iplt_entry
= FALSE
;
9984 if (elf32_arm_get_plt_info (input_bfd
, globals
, eh
, r_symndx
, &root_plt
,
9986 && root_plt
->offset
!= (bfd_vma
) -1)
9988 plt_offset
= root_plt
->offset
;
9989 gotplt_offset
= arm_plt
->got_offset
;
9991 if (h
== NULL
|| eh
->is_iplt
)
9993 has_iplt_entry
= TRUE
;
9994 splt
= globals
->root
.iplt
;
9996 /* Populate .iplt entries here, because not all of them will
9997 be seen by finish_dynamic_symbol. The lower bit is set if
9998 we have already populated the entry. */
10003 if (elf32_arm_populate_plt_entry (output_bfd
, info
, root_plt
, arm_plt
,
10004 -1, dynreloc_value
))
10005 root_plt
->offset
|= 1;
10007 return bfd_reloc_notsupported
;
10010 /* Static relocations always resolve to the .iplt entry. */
10011 st_type
= STT_FUNC
;
10012 value
= (splt
->output_section
->vma
10013 + splt
->output_offset
10015 branch_type
= ST_BRANCH_TO_ARM
;
10017 /* If there are non-call relocations that resolve to the .iplt
10018 entry, then all dynamic ones must too. */
10019 if (arm_plt
->noncall_refcount
!= 0)
10021 dynreloc_st_type
= st_type
;
10022 dynreloc_value
= value
;
10026 /* We populate the .plt entry in finish_dynamic_symbol. */
10027 splt
= globals
->root
.splt
;
10032 plt_offset
= (bfd_vma
) -1;
10033 gotplt_offset
= (bfd_vma
) -1;
10036 resolved_to_zero
= (h
!= NULL
10037 && UNDEFWEAK_NO_DYNAMIC_RELOC (info
, h
));
10042 /* We don't need to find a value for this symbol. It's just a
10044 *unresolved_reloc_p
= FALSE
;
10045 return bfd_reloc_ok
;
10048 if (!globals
->vxworks_p
)
10049 return elf32_arm_abs12_reloc (input_bfd
, hit_data
, value
+ addend
);
10050 /* Fall through. */
10054 case R_ARM_ABS32_NOI
:
10056 case R_ARM_REL32_NOI
:
10062 /* Handle relocations which should use the PLT entry. ABS32/REL32
10063 will use the symbol's value, which may point to a PLT entry, but we
10064 don't need to handle that here. If we created a PLT entry, all
10065 branches in this object should go to it, except if the PLT is too
10066 far away, in which case a long branch stub should be inserted. */
10067 if ((r_type
!= R_ARM_ABS32
&& r_type
!= R_ARM_REL32
10068 && r_type
!= R_ARM_ABS32_NOI
&& r_type
!= R_ARM_REL32_NOI
10069 && r_type
!= R_ARM_CALL
10070 && r_type
!= R_ARM_JUMP24
10071 && r_type
!= R_ARM_PLT32
)
10072 && plt_offset
!= (bfd_vma
) -1)
10074 /* If we've created a .plt section, and assigned a PLT entry
10075 to this function, it must either be a STT_GNU_IFUNC reference
10076 or not be known to bind locally. In other cases, we should
10077 have cleared the PLT entry by now. */
10078 BFD_ASSERT (has_iplt_entry
|| !SYMBOL_CALLS_LOCAL (info
, h
));
10080 value
= (splt
->output_section
->vma
10081 + splt
->output_offset
10083 *unresolved_reloc_p
= FALSE
;
10084 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
10085 contents
, rel
->r_offset
, value
,
10089 /* When generating a shared object or relocatable executable, these
10090 relocations are copied into the output file to be resolved at
10092 if ((bfd_link_pic (info
)
10093 || globals
->root
.is_relocatable_executable
)
10094 && (input_section
->flags
& SEC_ALLOC
)
10095 && !(globals
->vxworks_p
10096 && strcmp (input_section
->output_section
->name
,
10098 && ((r_type
!= R_ARM_REL32
&& r_type
!= R_ARM_REL32_NOI
)
10099 || !SYMBOL_CALLS_LOCAL (info
, h
))
10100 && !(input_bfd
== globals
->stub_bfd
10101 && strstr (input_section
->name
, STUB_SUFFIX
))
10103 || (ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
10104 && !resolved_to_zero
)
10105 || h
->root
.type
!= bfd_link_hash_undefweak
)
10106 && r_type
!= R_ARM_PC24
10107 && r_type
!= R_ARM_CALL
10108 && r_type
!= R_ARM_JUMP24
10109 && r_type
!= R_ARM_PREL31
10110 && r_type
!= R_ARM_PLT32
)
10112 Elf_Internal_Rela outrel
;
10113 bfd_boolean skip
, relocate
;
10115 if ((r_type
== R_ARM_REL32
|| r_type
== R_ARM_REL32_NOI
)
10116 && !h
->def_regular
)
10118 char *v
= _("shared object");
10120 if (bfd_link_executable (info
))
10121 v
= _("PIE executable");
10124 (_("%pB: relocation %s against external or undefined symbol `%s'"
10125 " can not be used when making a %s; recompile with -fPIC"), input_bfd
,
10126 elf32_arm_howto_table_1
[r_type
].name
, h
->root
.root
.string
, v
);
10127 return bfd_reloc_notsupported
;
10130 *unresolved_reloc_p
= FALSE
;
10132 if (sreloc
== NULL
&& globals
->root
.dynamic_sections_created
)
10134 sreloc
= _bfd_elf_get_dynamic_reloc_section (input_bfd
, input_section
,
10135 ! globals
->use_rel
);
10137 if (sreloc
== NULL
)
10138 return bfd_reloc_notsupported
;
10144 outrel
.r_addend
= addend
;
10146 _bfd_elf_section_offset (output_bfd
, info
, input_section
,
10148 if (outrel
.r_offset
== (bfd_vma
) -1)
10150 else if (outrel
.r_offset
== (bfd_vma
) -2)
10151 skip
= TRUE
, relocate
= TRUE
;
10152 outrel
.r_offset
+= (input_section
->output_section
->vma
10153 + input_section
->output_offset
);
10156 memset (&outrel
, 0, sizeof outrel
);
10158 && h
->dynindx
!= -1
10159 && (!bfd_link_pic (info
)
10160 || !(bfd_link_pie (info
)
10161 || SYMBOLIC_BIND (info
, h
))
10162 || !h
->def_regular
))
10163 outrel
.r_info
= ELF32_R_INFO (h
->dynindx
, r_type
);
10168 /* This symbol is local, or marked to become local. */
10169 BFD_ASSERT (r_type
== R_ARM_ABS32
|| r_type
== R_ARM_ABS32_NOI
);
10170 if (globals
->symbian_p
)
10174 /* On Symbian OS, the data segment and text segement
10175 can be relocated independently. Therefore, we
10176 must indicate the segment to which this
10177 relocation is relative. The BPABI allows us to
10178 use any symbol in the right segment; we just use
10179 the section symbol as it is convenient. (We
10180 cannot use the symbol given by "h" directly as it
10181 will not appear in the dynamic symbol table.)
10183 Note that the dynamic linker ignores the section
10184 symbol value, so we don't subtract osec->vma
10185 from the emitted reloc addend. */
10187 osec
= sym_sec
->output_section
;
10189 osec
= input_section
->output_section
;
10190 symbol
= elf_section_data (osec
)->dynindx
;
10193 struct elf_link_hash_table
*htab
= elf_hash_table (info
);
10195 if ((osec
->flags
& SEC_READONLY
) == 0
10196 && htab
->data_index_section
!= NULL
)
10197 osec
= htab
->data_index_section
;
10199 osec
= htab
->text_index_section
;
10200 symbol
= elf_section_data (osec
)->dynindx
;
10202 BFD_ASSERT (symbol
!= 0);
10205 /* On SVR4-ish systems, the dynamic loader cannot
10206 relocate the text and data segments independently,
10207 so the symbol does not matter. */
10209 if (dynreloc_st_type
== STT_GNU_IFUNC
)
10210 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
10211 to the .iplt entry. Instead, every non-call reference
10212 must use an R_ARM_IRELATIVE relocation to obtain the
10213 correct run-time address. */
10214 outrel
.r_info
= ELF32_R_INFO (symbol
, R_ARM_IRELATIVE
);
10216 outrel
.r_info
= ELF32_R_INFO (symbol
, R_ARM_RELATIVE
);
10217 if (globals
->use_rel
)
10220 outrel
.r_addend
+= dynreloc_value
;
10223 elf32_arm_add_dynreloc (output_bfd
, info
, sreloc
, &outrel
);
10225 /* If this reloc is against an external symbol, we do not want to
10226 fiddle with the addend. Otherwise, we need to include the symbol
10227 value so that it becomes an addend for the dynamic reloc. */
10229 return bfd_reloc_ok
;
10231 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
10232 contents
, rel
->r_offset
,
10233 dynreloc_value
, (bfd_vma
) 0);
10235 else switch (r_type
)
10238 return elf32_arm_abs12_reloc (input_bfd
, hit_data
, value
+ addend
);
10240 case R_ARM_XPC25
: /* Arm BLX instruction. */
10243 case R_ARM_PC24
: /* Arm B/BL instruction. */
10246 struct elf32_arm_stub_hash_entry
*stub_entry
= NULL
;
10248 if (r_type
== R_ARM_XPC25
)
10250 /* Check for Arm calling Arm function. */
10251 /* FIXME: Should we translate the instruction into a BL
10252 instruction instead ? */
10253 if (branch_type
!= ST_BRANCH_TO_THUMB
)
10255 (_("\%pB: warning: %s BLX instruction targets"
10256 " %s function '%s'"),
10258 "ARM", h
? h
->root
.root
.string
: "(local)");
10260 else if (r_type
== R_ARM_PC24
)
10262 /* Check for Arm calling Thumb function. */
10263 if (branch_type
== ST_BRANCH_TO_THUMB
)
10265 if (elf32_arm_to_thumb_stub (info
, sym_name
, input_bfd
,
10266 output_bfd
, input_section
,
10267 hit_data
, sym_sec
, rel
->r_offset
,
10268 signed_addend
, value
,
10270 return bfd_reloc_ok
;
10272 return bfd_reloc_dangerous
;
10276 /* Check if a stub has to be inserted because the
10277 destination is too far or we are changing mode. */
10278 if ( r_type
== R_ARM_CALL
10279 || r_type
== R_ARM_JUMP24
10280 || r_type
== R_ARM_PLT32
)
10282 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
10283 struct elf32_arm_link_hash_entry
*hash
;
10285 hash
= (struct elf32_arm_link_hash_entry
*) h
;
10286 stub_type
= arm_type_of_stub (info
, input_section
, rel
,
10287 st_type
, &branch_type
,
10288 hash
, value
, sym_sec
,
10289 input_bfd
, sym_name
);
10291 if (stub_type
!= arm_stub_none
)
10293 /* The target is out of reach, so redirect the
10294 branch to the local stub for this function. */
10295 stub_entry
= elf32_arm_get_stub_entry (input_section
,
10300 if (stub_entry
!= NULL
)
10301 value
= (stub_entry
->stub_offset
10302 + stub_entry
->stub_sec
->output_offset
10303 + stub_entry
->stub_sec
->output_section
->vma
);
10305 if (plt_offset
!= (bfd_vma
) -1)
10306 *unresolved_reloc_p
= FALSE
;
10311 /* If the call goes through a PLT entry, make sure to
10312 check distance to the right destination address. */
10313 if (plt_offset
!= (bfd_vma
) -1)
10315 value
= (splt
->output_section
->vma
10316 + splt
->output_offset
10318 *unresolved_reloc_p
= FALSE
;
10319 /* The PLT entry is in ARM mode, regardless of the
10320 target function. */
10321 branch_type
= ST_BRANCH_TO_ARM
;
10326 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
10328 S is the address of the symbol in the relocation.
10329 P is address of the instruction being relocated.
10330 A is the addend (extracted from the instruction) in bytes.
10332 S is held in 'value'.
10333 P is the base address of the section containing the
10334 instruction plus the offset of the reloc into that
10336 (input_section->output_section->vma +
10337 input_section->output_offset +
10339 A is the addend, converted into bytes, ie:
10340 (signed_addend * 4)
10342 Note: None of these operations have knowledge of the pipeline
10343 size of the processor, thus it is up to the assembler to
10344 encode this information into the addend. */
10345 value
-= (input_section
->output_section
->vma
10346 + input_section
->output_offset
);
10347 value
-= rel
->r_offset
;
10348 if (globals
->use_rel
)
10349 value
+= (signed_addend
<< howto
->size
);
10351 /* RELA addends do not have to be adjusted by howto->size. */
10352 value
+= signed_addend
;
10354 signed_addend
= value
;
10355 signed_addend
>>= howto
->rightshift
;
10357 /* A branch to an undefined weak symbol is turned into a jump to
10358 the next instruction unless a PLT entry will be created.
10359 Do the same for local undefined symbols (but not for STN_UNDEF).
10360 The jump to the next instruction is optimized as a NOP depending
10361 on the architecture. */
10362 if (h
? (h
->root
.type
== bfd_link_hash_undefweak
10363 && plt_offset
== (bfd_vma
) -1)
10364 : r_symndx
!= STN_UNDEF
&& bfd_is_und_section (sym_sec
))
10366 value
= (bfd_get_32 (input_bfd
, hit_data
) & 0xf0000000);
10368 if (arch_has_arm_nop (globals
))
10369 value
|= 0x0320f000;
10371 value
|= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
10375 /* Perform a signed range check. */
10376 if ( signed_addend
> ((bfd_signed_vma
) (howto
->dst_mask
>> 1))
10377 || signed_addend
< - ((bfd_signed_vma
) ((howto
->dst_mask
+ 1) >> 1)))
10378 return bfd_reloc_overflow
;
10380 addend
= (value
& 2);
10382 value
= (signed_addend
& howto
->dst_mask
)
10383 | (bfd_get_32 (input_bfd
, hit_data
) & (~ howto
->dst_mask
));
10385 if (r_type
== R_ARM_CALL
)
10387 /* Set the H bit in the BLX instruction. */
10388 if (branch_type
== ST_BRANCH_TO_THUMB
)
10391 value
|= (1 << 24);
10393 value
&= ~(bfd_vma
)(1 << 24);
10396 /* Select the correct instruction (BL or BLX). */
10397 /* Only if we are not handling a BL to a stub. In this
10398 case, mode switching is performed by the stub. */
10399 if (branch_type
== ST_BRANCH_TO_THUMB
&& !stub_entry
)
10400 value
|= (1 << 28);
10401 else if (stub_entry
|| branch_type
!= ST_BRANCH_UNKNOWN
)
10403 value
&= ~(bfd_vma
)(1 << 28);
10404 value
|= (1 << 24);
10413 if (branch_type
== ST_BRANCH_TO_THUMB
)
10417 case R_ARM_ABS32_NOI
:
10423 if (branch_type
== ST_BRANCH_TO_THUMB
)
10425 value
-= (input_section
->output_section
->vma
10426 + input_section
->output_offset
+ rel
->r_offset
);
10429 case R_ARM_REL32_NOI
:
10431 value
-= (input_section
->output_section
->vma
10432 + input_section
->output_offset
+ rel
->r_offset
);
10436 value
-= (input_section
->output_section
->vma
10437 + input_section
->output_offset
+ rel
->r_offset
);
10438 value
+= signed_addend
;
10439 if (! h
|| h
->root
.type
!= bfd_link_hash_undefweak
)
10441 /* Check for overflow. */
10442 if ((value
^ (value
>> 1)) & (1 << 30))
10443 return bfd_reloc_overflow
;
10445 value
&= 0x7fffffff;
10446 value
|= (bfd_get_32 (input_bfd
, hit_data
) & 0x80000000);
10447 if (branch_type
== ST_BRANCH_TO_THUMB
)
10452 bfd_put_32 (input_bfd
, value
, hit_data
);
10453 return bfd_reloc_ok
;
10456 /* PR 16202: Refectch the addend using the correct size. */
10457 if (globals
->use_rel
)
10458 addend
= bfd_get_8 (input_bfd
, hit_data
);
10461 /* There is no way to tell whether the user intended to use a signed or
10462 unsigned addend. When checking for overflow we accept either,
10463 as specified by the AAELF. */
10464 if ((long) value
> 0xff || (long) value
< -0x80)
10465 return bfd_reloc_overflow
;
10467 bfd_put_8 (input_bfd
, value
, hit_data
);
10468 return bfd_reloc_ok
;
10471 /* PR 16202: Refectch the addend using the correct size. */
10472 if (globals
->use_rel
)
10473 addend
= bfd_get_16 (input_bfd
, hit_data
);
10476 /* See comment for R_ARM_ABS8. */
10477 if ((long) value
> 0xffff || (long) value
< -0x8000)
10478 return bfd_reloc_overflow
;
10480 bfd_put_16 (input_bfd
, value
, hit_data
);
10481 return bfd_reloc_ok
;
10483 case R_ARM_THM_ABS5
:
10484 /* Support ldr and str instructions for the thumb. */
10485 if (globals
->use_rel
)
10487 /* Need to refetch addend. */
10488 addend
= bfd_get_16 (input_bfd
, hit_data
) & howto
->src_mask
;
10489 /* ??? Need to determine shift amount from operand size. */
10490 addend
>>= howto
->rightshift
;
10494 /* ??? Isn't value unsigned? */
10495 if ((long) value
> 0x1f || (long) value
< -0x10)
10496 return bfd_reloc_overflow
;
10498 /* ??? Value needs to be properly shifted into place first. */
10499 value
|= bfd_get_16 (input_bfd
, hit_data
) & 0xf83f;
10500 bfd_put_16 (input_bfd
, value
, hit_data
);
10501 return bfd_reloc_ok
;
10503 case R_ARM_THM_ALU_PREL_11_0
:
10504 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
10507 bfd_signed_vma relocation
;
10509 insn
= (bfd_get_16 (input_bfd
, hit_data
) << 16)
10510 | bfd_get_16 (input_bfd
, hit_data
+ 2);
10512 if (globals
->use_rel
)
10514 signed_addend
= (insn
& 0xff) | ((insn
& 0x7000) >> 4)
10515 | ((insn
& (1 << 26)) >> 15);
10516 if (insn
& 0xf00000)
10517 signed_addend
= -signed_addend
;
10520 relocation
= value
+ signed_addend
;
10521 relocation
-= Pa (input_section
->output_section
->vma
10522 + input_section
->output_offset
10525 /* PR 21523: Use an absolute value. The user of this reloc will
10526 have already selected an ADD or SUB insn appropriately. */
10527 value
= labs (relocation
);
10529 if (value
>= 0x1000)
10530 return bfd_reloc_overflow
;
10532 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
10533 if (branch_type
== ST_BRANCH_TO_THUMB
)
10536 insn
= (insn
& 0xfb0f8f00) | (value
& 0xff)
10537 | ((value
& 0x700) << 4)
10538 | ((value
& 0x800) << 15);
10539 if (relocation
< 0)
10542 bfd_put_16 (input_bfd
, insn
>> 16, hit_data
);
10543 bfd_put_16 (input_bfd
, insn
& 0xffff, hit_data
+ 2);
10545 return bfd_reloc_ok
;
10548 case R_ARM_THM_PC8
:
10549 /* PR 10073: This reloc is not generated by the GNU toolchain,
10550 but it is supported for compatibility with third party libraries
10551 generated by other compilers, specifically the ARM/IAR. */
10554 bfd_signed_vma relocation
;
10556 insn
= bfd_get_16 (input_bfd
, hit_data
);
10558 if (globals
->use_rel
)
10559 addend
= ((((insn
& 0x00ff) << 2) + 4) & 0x3ff) -4;
10561 relocation
= value
+ addend
;
10562 relocation
-= Pa (input_section
->output_section
->vma
10563 + input_section
->output_offset
10566 value
= relocation
;
10568 /* We do not check for overflow of this reloc. Although strictly
10569 speaking this is incorrect, it appears to be necessary in order
10570 to work with IAR generated relocs. Since GCC and GAS do not
10571 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
10572 a problem for them. */
10575 insn
= (insn
& 0xff00) | (value
>> 2);
10577 bfd_put_16 (input_bfd
, insn
, hit_data
);
10579 return bfd_reloc_ok
;
10582 case R_ARM_THM_PC12
:
10583 /* Corresponds to: ldr.w reg, [pc, #offset]. */
10586 bfd_signed_vma relocation
;
10588 insn
= (bfd_get_16 (input_bfd
, hit_data
) << 16)
10589 | bfd_get_16 (input_bfd
, hit_data
+ 2);
10591 if (globals
->use_rel
)
10593 signed_addend
= insn
& 0xfff;
10594 if (!(insn
& (1 << 23)))
10595 signed_addend
= -signed_addend
;
10598 relocation
= value
+ signed_addend
;
10599 relocation
-= Pa (input_section
->output_section
->vma
10600 + input_section
->output_offset
10603 value
= relocation
;
10605 if (value
>= 0x1000)
10606 return bfd_reloc_overflow
;
10608 insn
= (insn
& 0xff7ff000) | value
;
10609 if (relocation
>= 0)
10612 bfd_put_16 (input_bfd
, insn
>> 16, hit_data
);
10613 bfd_put_16 (input_bfd
, insn
& 0xffff, hit_data
+ 2);
10615 return bfd_reloc_ok
;
10618 case R_ARM_THM_XPC22
:
10619 case R_ARM_THM_CALL
:
10620 case R_ARM_THM_JUMP24
:
10621 /* Thumb BL (branch long instruction). */
10623 bfd_vma relocation
;
10624 bfd_vma reloc_sign
;
10625 bfd_boolean overflow
= FALSE
;
10626 bfd_vma upper_insn
= bfd_get_16 (input_bfd
, hit_data
);
10627 bfd_vma lower_insn
= bfd_get_16 (input_bfd
, hit_data
+ 2);
10628 bfd_signed_vma reloc_signed_max
;
10629 bfd_signed_vma reloc_signed_min
;
10631 bfd_signed_vma signed_check
;
10633 const int thumb2
= using_thumb2 (globals
);
10634 const int thumb2_bl
= using_thumb2_bl (globals
);
10636 /* A branch to an undefined weak symbol is turned into a jump to
10637 the next instruction unless a PLT entry will be created.
10638 The jump to the next instruction is optimized as a NOP.W for
10639 Thumb-2 enabled architectures. */
10640 if (h
&& h
->root
.type
== bfd_link_hash_undefweak
10641 && plt_offset
== (bfd_vma
) -1)
10645 bfd_put_16 (input_bfd
, 0xf3af, hit_data
);
10646 bfd_put_16 (input_bfd
, 0x8000, hit_data
+ 2);
10650 bfd_put_16 (input_bfd
, 0xe000, hit_data
);
10651 bfd_put_16 (input_bfd
, 0xbf00, hit_data
+ 2);
10653 return bfd_reloc_ok
;
10656 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
10657 with Thumb-1) involving the J1 and J2 bits. */
10658 if (globals
->use_rel
)
10660 bfd_vma s
= (upper_insn
& (1 << 10)) >> 10;
10661 bfd_vma upper
= upper_insn
& 0x3ff;
10662 bfd_vma lower
= lower_insn
& 0x7ff;
10663 bfd_vma j1
= (lower_insn
& (1 << 13)) >> 13;
10664 bfd_vma j2
= (lower_insn
& (1 << 11)) >> 11;
10665 bfd_vma i1
= j1
^ s
? 0 : 1;
10666 bfd_vma i2
= j2
^ s
? 0 : 1;
10668 addend
= (i1
<< 23) | (i2
<< 22) | (upper
<< 12) | (lower
<< 1);
10670 addend
= (addend
| ((s
? 0 : 1) << 24)) - (1 << 24);
10672 signed_addend
= addend
;
10675 if (r_type
== R_ARM_THM_XPC22
)
10677 /* Check for Thumb to Thumb call. */
10678 /* FIXME: Should we translate the instruction into a BL
10679 instruction instead ? */
10680 if (branch_type
== ST_BRANCH_TO_THUMB
)
10682 (_("%pB: warning: %s BLX instruction targets"
10683 " %s function '%s'"),
10684 input_bfd
, "Thumb",
10685 "Thumb", h
? h
->root
.root
.string
: "(local)");
10689 /* If it is not a call to Thumb, assume call to Arm.
10690 If it is a call relative to a section name, then it is not a
10691 function call at all, but rather a long jump. Calls through
10692 the PLT do not require stubs. */
10693 if (branch_type
== ST_BRANCH_TO_ARM
&& plt_offset
== (bfd_vma
) -1)
10695 if (globals
->use_blx
&& r_type
== R_ARM_THM_CALL
)
10697 /* Convert BL to BLX. */
10698 lower_insn
= (lower_insn
& ~0x1000) | 0x0800;
10700 else if (( r_type
!= R_ARM_THM_CALL
)
10701 && (r_type
!= R_ARM_THM_JUMP24
))
10703 if (elf32_thumb_to_arm_stub
10704 (info
, sym_name
, input_bfd
, output_bfd
, input_section
,
10705 hit_data
, sym_sec
, rel
->r_offset
, signed_addend
, value
,
10707 return bfd_reloc_ok
;
10709 return bfd_reloc_dangerous
;
10712 else if (branch_type
== ST_BRANCH_TO_THUMB
10713 && globals
->use_blx
10714 && r_type
== R_ARM_THM_CALL
)
10716 /* Make sure this is a BL. */
10717 lower_insn
|= 0x1800;
10721 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
10722 if (r_type
== R_ARM_THM_CALL
|| r_type
== R_ARM_THM_JUMP24
)
10724 /* Check if a stub has to be inserted because the destination
10726 struct elf32_arm_stub_hash_entry
*stub_entry
;
10727 struct elf32_arm_link_hash_entry
*hash
;
10729 hash
= (struct elf32_arm_link_hash_entry
*) h
;
10731 stub_type
= arm_type_of_stub (info
, input_section
, rel
,
10732 st_type
, &branch_type
,
10733 hash
, value
, sym_sec
,
10734 input_bfd
, sym_name
);
10736 if (stub_type
!= arm_stub_none
)
10738 /* The target is out of reach or we are changing modes, so
10739 redirect the branch to the local stub for this
10741 stub_entry
= elf32_arm_get_stub_entry (input_section
,
10745 if (stub_entry
!= NULL
)
10747 value
= (stub_entry
->stub_offset
10748 + stub_entry
->stub_sec
->output_offset
10749 + stub_entry
->stub_sec
->output_section
->vma
);
10751 if (plt_offset
!= (bfd_vma
) -1)
10752 *unresolved_reloc_p
= FALSE
;
10755 /* If this call becomes a call to Arm, force BLX. */
10756 if (globals
->use_blx
&& (r_type
== R_ARM_THM_CALL
))
10759 && !arm_stub_is_thumb (stub_entry
->stub_type
))
10760 || branch_type
!= ST_BRANCH_TO_THUMB
)
10761 lower_insn
= (lower_insn
& ~0x1000) | 0x0800;
10766 /* Handle calls via the PLT. */
10767 if (stub_type
== arm_stub_none
&& plt_offset
!= (bfd_vma
) -1)
10769 value
= (splt
->output_section
->vma
10770 + splt
->output_offset
10773 if (globals
->use_blx
10774 && r_type
== R_ARM_THM_CALL
10775 && ! using_thumb_only (globals
))
10777 /* If the Thumb BLX instruction is available, convert
10778 the BL to a BLX instruction to call the ARM-mode
10780 lower_insn
= (lower_insn
& ~0x1000) | 0x0800;
10781 branch_type
= ST_BRANCH_TO_ARM
;
10785 if (! using_thumb_only (globals
))
10786 /* Target the Thumb stub before the ARM PLT entry. */
10787 value
-= PLT_THUMB_STUB_SIZE
;
10788 branch_type
= ST_BRANCH_TO_THUMB
;
10790 *unresolved_reloc_p
= FALSE
;
10793 relocation
= value
+ signed_addend
;
10795 relocation
-= (input_section
->output_section
->vma
10796 + input_section
->output_offset
10799 check
= relocation
>> howto
->rightshift
;
10801 /* If this is a signed value, the rightshift just dropped
10802 leading 1 bits (assuming twos complement). */
10803 if ((bfd_signed_vma
) relocation
>= 0)
10804 signed_check
= check
;
10806 signed_check
= check
| ~((bfd_vma
) -1 >> howto
->rightshift
);
10808 /* Calculate the permissable maximum and minimum values for
10809 this relocation according to whether we're relocating for
10811 bitsize
= howto
->bitsize
;
10814 reloc_signed_max
= (1 << (bitsize
- 1)) - 1;
10815 reloc_signed_min
= ~reloc_signed_max
;
10817 /* Assumes two's complement. */
10818 if (signed_check
> reloc_signed_max
|| signed_check
< reloc_signed_min
)
10821 if ((lower_insn
& 0x5000) == 0x4000)
10822 /* For a BLX instruction, make sure that the relocation is rounded up
10823 to a word boundary. This follows the semantics of the instruction
10824 which specifies that bit 1 of the target address will come from bit
10825 1 of the base address. */
10826 relocation
= (relocation
+ 2) & ~ 3;
10828 /* Put RELOCATION back into the insn. Assumes two's complement.
10829 We use the Thumb-2 encoding, which is safe even if dealing with
10830 a Thumb-1 instruction by virtue of our overflow check above. */
10831 reloc_sign
= (signed_check
< 0) ? 1 : 0;
10832 upper_insn
= (upper_insn
& ~(bfd_vma
) 0x7ff)
10833 | ((relocation
>> 12) & 0x3ff)
10834 | (reloc_sign
<< 10);
10835 lower_insn
= (lower_insn
& ~(bfd_vma
) 0x2fff)
10836 | (((!((relocation
>> 23) & 1)) ^ reloc_sign
) << 13)
10837 | (((!((relocation
>> 22) & 1)) ^ reloc_sign
) << 11)
10838 | ((relocation
>> 1) & 0x7ff);
10840 /* Put the relocated value back in the object file: */
10841 bfd_put_16 (input_bfd
, upper_insn
, hit_data
);
10842 bfd_put_16 (input_bfd
, lower_insn
, hit_data
+ 2);
10844 return (overflow
? bfd_reloc_overflow
: bfd_reloc_ok
);
10848 case R_ARM_THM_JUMP19
:
10849 /* Thumb32 conditional branch instruction. */
10851 bfd_vma relocation
;
10852 bfd_boolean overflow
= FALSE
;
10853 bfd_vma upper_insn
= bfd_get_16 (input_bfd
, hit_data
);
10854 bfd_vma lower_insn
= bfd_get_16 (input_bfd
, hit_data
+ 2);
10855 bfd_signed_vma reloc_signed_max
= 0xffffe;
10856 bfd_signed_vma reloc_signed_min
= -0x100000;
10857 bfd_signed_vma signed_check
;
10858 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
10859 struct elf32_arm_stub_hash_entry
*stub_entry
;
10860 struct elf32_arm_link_hash_entry
*hash
;
10862 /* Need to refetch the addend, reconstruct the top three bits,
10863 and squish the two 11 bit pieces together. */
10864 if (globals
->use_rel
)
10866 bfd_vma S
= (upper_insn
& 0x0400) >> 10;
10867 bfd_vma upper
= (upper_insn
& 0x003f);
10868 bfd_vma J1
= (lower_insn
& 0x2000) >> 13;
10869 bfd_vma J2
= (lower_insn
& 0x0800) >> 11;
10870 bfd_vma lower
= (lower_insn
& 0x07ff);
10874 upper
|= (!S
) << 8;
10875 upper
-= 0x0100; /* Sign extend. */
10877 addend
= (upper
<< 12) | (lower
<< 1);
10878 signed_addend
= addend
;
10881 /* Handle calls via the PLT. */
10882 if (plt_offset
!= (bfd_vma
) -1)
10884 value
= (splt
->output_section
->vma
10885 + splt
->output_offset
10887 /* Target the Thumb stub before the ARM PLT entry. */
10888 value
-= PLT_THUMB_STUB_SIZE
;
10889 *unresolved_reloc_p
= FALSE
;
10892 hash
= (struct elf32_arm_link_hash_entry
*)h
;
10894 stub_type
= arm_type_of_stub (info
, input_section
, rel
,
10895 st_type
, &branch_type
,
10896 hash
, value
, sym_sec
,
10897 input_bfd
, sym_name
);
10898 if (stub_type
!= arm_stub_none
)
10900 stub_entry
= elf32_arm_get_stub_entry (input_section
,
10904 if (stub_entry
!= NULL
)
10906 value
= (stub_entry
->stub_offset
10907 + stub_entry
->stub_sec
->output_offset
10908 + stub_entry
->stub_sec
->output_section
->vma
);
10912 relocation
= value
+ signed_addend
;
10913 relocation
-= (input_section
->output_section
->vma
10914 + input_section
->output_offset
10916 signed_check
= (bfd_signed_vma
) relocation
;
10918 if (signed_check
> reloc_signed_max
|| signed_check
< reloc_signed_min
)
10921 /* Put RELOCATION back into the insn. */
10923 bfd_vma S
= (relocation
& 0x00100000) >> 20;
10924 bfd_vma J2
= (relocation
& 0x00080000) >> 19;
10925 bfd_vma J1
= (relocation
& 0x00040000) >> 18;
10926 bfd_vma hi
= (relocation
& 0x0003f000) >> 12;
10927 bfd_vma lo
= (relocation
& 0x00000ffe) >> 1;
10929 upper_insn
= (upper_insn
& 0xfbc0) | (S
<< 10) | hi
;
10930 lower_insn
= (lower_insn
& 0xd000) | (J1
<< 13) | (J2
<< 11) | lo
;
10933 /* Put the relocated value back in the object file: */
10934 bfd_put_16 (input_bfd
, upper_insn
, hit_data
);
10935 bfd_put_16 (input_bfd
, lower_insn
, hit_data
+ 2);
10937 return (overflow
? bfd_reloc_overflow
: bfd_reloc_ok
);
10940 case R_ARM_THM_JUMP11
:
10941 case R_ARM_THM_JUMP8
:
10942 case R_ARM_THM_JUMP6
:
10943 /* Thumb B (branch) instruction). */
10945 bfd_signed_vma relocation
;
10946 bfd_signed_vma reloc_signed_max
= (1 << (howto
->bitsize
- 1)) - 1;
10947 bfd_signed_vma reloc_signed_min
= ~ reloc_signed_max
;
10948 bfd_signed_vma signed_check
;
10950 /* CZB cannot jump backward. */
10951 if (r_type
== R_ARM_THM_JUMP6
)
10952 reloc_signed_min
= 0;
10954 if (globals
->use_rel
)
10956 /* Need to refetch addend. */
10957 addend
= bfd_get_16 (input_bfd
, hit_data
) & howto
->src_mask
;
10958 if (addend
& ((howto
->src_mask
+ 1) >> 1))
10960 signed_addend
= -1;
10961 signed_addend
&= ~ howto
->src_mask
;
10962 signed_addend
|= addend
;
10965 signed_addend
= addend
;
10966 /* The value in the insn has been right shifted. We need to
10967 undo this, so that we can perform the address calculation
10968 in terms of bytes. */
10969 signed_addend
<<= howto
->rightshift
;
10971 relocation
= value
+ signed_addend
;
10973 relocation
-= (input_section
->output_section
->vma
10974 + input_section
->output_offset
10977 relocation
>>= howto
->rightshift
;
10978 signed_check
= relocation
;
10980 if (r_type
== R_ARM_THM_JUMP6
)
10981 relocation
= ((relocation
& 0x0020) << 4) | ((relocation
& 0x001f) << 3);
10983 relocation
&= howto
->dst_mask
;
10984 relocation
|= (bfd_get_16 (input_bfd
, hit_data
) & (~ howto
->dst_mask
));
10986 bfd_put_16 (input_bfd
, relocation
, hit_data
);
10988 /* Assumes two's complement. */
10989 if (signed_check
> reloc_signed_max
|| signed_check
< reloc_signed_min
)
10990 return bfd_reloc_overflow
;
10992 return bfd_reloc_ok
;
10995 case R_ARM_ALU_PCREL7_0
:
10996 case R_ARM_ALU_PCREL15_8
:
10997 case R_ARM_ALU_PCREL23_15
:
11000 bfd_vma relocation
;
11002 insn
= bfd_get_32 (input_bfd
, hit_data
);
11003 if (globals
->use_rel
)
11005 /* Extract the addend. */
11006 addend
= (insn
& 0xff) << ((insn
& 0xf00) >> 7);
11007 signed_addend
= addend
;
11009 relocation
= value
+ signed_addend
;
11011 relocation
-= (input_section
->output_section
->vma
11012 + input_section
->output_offset
11014 insn
= (insn
& ~0xfff)
11015 | ((howto
->bitpos
<< 7) & 0xf00)
11016 | ((relocation
>> howto
->bitpos
) & 0xff);
11017 bfd_put_32 (input_bfd
, value
, hit_data
);
11019 return bfd_reloc_ok
;
11021 case R_ARM_GNU_VTINHERIT
:
11022 case R_ARM_GNU_VTENTRY
:
11023 return bfd_reloc_ok
;
11025 case R_ARM_GOTOFF32
:
11026 /* Relocation is relative to the start of the
11027 global offset table. */
11029 BFD_ASSERT (sgot
!= NULL
);
11031 return bfd_reloc_notsupported
;
11033 /* If we are addressing a Thumb function, we need to adjust the
11034 address by one, so that attempts to call the function pointer will
11035 correctly interpret it as Thumb code. */
11036 if (branch_type
== ST_BRANCH_TO_THUMB
)
11039 /* Note that sgot->output_offset is not involved in this
11040 calculation. We always want the start of .got. If we
11041 define _GLOBAL_OFFSET_TABLE in a different way, as is
11042 permitted by the ABI, we might have to change this
11044 value
-= sgot
->output_section
->vma
;
11045 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
11046 contents
, rel
->r_offset
, value
,
11050 /* Use global offset table as symbol value. */
11051 BFD_ASSERT (sgot
!= NULL
);
11054 return bfd_reloc_notsupported
;
11056 *unresolved_reloc_p
= FALSE
;
11057 value
= sgot
->output_section
->vma
;
11058 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
11059 contents
, rel
->r_offset
, value
,
11063 case R_ARM_GOT_PREL
:
11064 /* Relocation is to the entry for this symbol in the
11065 global offset table. */
11067 return bfd_reloc_notsupported
;
11069 if (dynreloc_st_type
== STT_GNU_IFUNC
11070 && plt_offset
!= (bfd_vma
) -1
11071 && (h
== NULL
|| SYMBOL_REFERENCES_LOCAL (info
, h
)))
11073 /* We have a relocation against a locally-binding STT_GNU_IFUNC
11074 symbol, and the relocation resolves directly to the runtime
11075 target rather than to the .iplt entry. This means that any
11076 .got entry would be the same value as the .igot.plt entry,
11077 so there's no point creating both. */
11078 sgot
= globals
->root
.igotplt
;
11079 value
= sgot
->output_offset
+ gotplt_offset
;
11081 else if (h
!= NULL
)
11085 off
= h
->got
.offset
;
11086 BFD_ASSERT (off
!= (bfd_vma
) -1);
11087 if ((off
& 1) != 0)
11089 /* We have already processsed one GOT relocation against
11092 if (globals
->root
.dynamic_sections_created
11093 && !SYMBOL_REFERENCES_LOCAL (info
, h
))
11094 *unresolved_reloc_p
= FALSE
;
11098 Elf_Internal_Rela outrel
;
11100 if (h
->dynindx
!= -1 && !SYMBOL_REFERENCES_LOCAL (info
, h
))
11102 /* If the symbol doesn't resolve locally in a static
11103 object, we have an undefined reference. If the
11104 symbol doesn't resolve locally in a dynamic object,
11105 it should be resolved by the dynamic linker. */
11106 if (globals
->root
.dynamic_sections_created
)
11108 outrel
.r_info
= ELF32_R_INFO (h
->dynindx
, R_ARM_GLOB_DAT
);
11109 *unresolved_reloc_p
= FALSE
;
11113 outrel
.r_addend
= 0;
11117 if (dynreloc_st_type
== STT_GNU_IFUNC
)
11118 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_IRELATIVE
);
11119 else if (bfd_link_pic (info
)
11120 && (ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
11121 || h
->root
.type
!= bfd_link_hash_undefweak
))
11122 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_RELATIVE
);
11125 outrel
.r_addend
= dynreloc_value
;
11128 /* The GOT entry is initialized to zero by default.
11129 See if we should install a different value. */
11130 if (outrel
.r_addend
!= 0
11131 && (outrel
.r_info
== 0 || globals
->use_rel
))
11133 bfd_put_32 (output_bfd
, outrel
.r_addend
,
11134 sgot
->contents
+ off
);
11135 outrel
.r_addend
= 0;
11138 if (outrel
.r_info
!= 0)
11140 outrel
.r_offset
= (sgot
->output_section
->vma
11141 + sgot
->output_offset
11143 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
11145 h
->got
.offset
|= 1;
11147 value
= sgot
->output_offset
+ off
;
11153 BFD_ASSERT (local_got_offsets
!= NULL
11154 && local_got_offsets
[r_symndx
] != (bfd_vma
) -1);
11156 off
= local_got_offsets
[r_symndx
];
11158 /* The offset must always be a multiple of 4. We use the
11159 least significant bit to record whether we have already
11160 generated the necessary reloc. */
11161 if ((off
& 1) != 0)
11165 if (globals
->use_rel
)
11166 bfd_put_32 (output_bfd
, dynreloc_value
, sgot
->contents
+ off
);
11168 if (bfd_link_pic (info
) || dynreloc_st_type
== STT_GNU_IFUNC
)
11170 Elf_Internal_Rela outrel
;
11172 outrel
.r_addend
= addend
+ dynreloc_value
;
11173 outrel
.r_offset
= (sgot
->output_section
->vma
11174 + sgot
->output_offset
11176 if (dynreloc_st_type
== STT_GNU_IFUNC
)
11177 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_IRELATIVE
);
11179 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_RELATIVE
);
11180 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
11183 local_got_offsets
[r_symndx
] |= 1;
11186 value
= sgot
->output_offset
+ off
;
11188 if (r_type
!= R_ARM_GOT32
)
11189 value
+= sgot
->output_section
->vma
;
11191 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
11192 contents
, rel
->r_offset
, value
,
11195 case R_ARM_TLS_LDO32
:
11196 value
= value
- dtpoff_base (info
);
11198 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
11199 contents
, rel
->r_offset
, value
,
11202 case R_ARM_TLS_LDM32
:
11209 off
= globals
->tls_ldm_got
.offset
;
11211 if ((off
& 1) != 0)
11215 /* If we don't know the module number, create a relocation
11217 if (bfd_link_pic (info
))
11219 Elf_Internal_Rela outrel
;
11221 if (srelgot
== NULL
)
11224 outrel
.r_addend
= 0;
11225 outrel
.r_offset
= (sgot
->output_section
->vma
11226 + sgot
->output_offset
+ off
);
11227 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32
);
11229 if (globals
->use_rel
)
11230 bfd_put_32 (output_bfd
, outrel
.r_addend
,
11231 sgot
->contents
+ off
);
11233 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
11236 bfd_put_32 (output_bfd
, 1, sgot
->contents
+ off
);
11238 globals
->tls_ldm_got
.offset
|= 1;
11241 value
= sgot
->output_section
->vma
+ sgot
->output_offset
+ off
11242 - (input_section
->output_section
->vma
+ input_section
->output_offset
+ rel
->r_offset
);
11244 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
11245 contents
, rel
->r_offset
, value
,
11249 case R_ARM_TLS_CALL
:
11250 case R_ARM_THM_TLS_CALL
:
11251 case R_ARM_TLS_GD32
:
11252 case R_ARM_TLS_IE32
:
11253 case R_ARM_TLS_GOTDESC
:
11254 case R_ARM_TLS_DESCSEQ
:
11255 case R_ARM_THM_TLS_DESCSEQ
:
11257 bfd_vma off
, offplt
;
11261 BFD_ASSERT (sgot
!= NULL
);
11266 dyn
= globals
->root
.dynamic_sections_created
;
11267 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn
,
11268 bfd_link_pic (info
),
11270 && (!bfd_link_pic (info
)
11271 || !SYMBOL_REFERENCES_LOCAL (info
, h
)))
11273 *unresolved_reloc_p
= FALSE
;
11276 off
= h
->got
.offset
;
11277 offplt
= elf32_arm_hash_entry (h
)->tlsdesc_got
;
11278 tls_type
= ((struct elf32_arm_link_hash_entry
*) h
)->tls_type
;
11282 BFD_ASSERT (local_got_offsets
!= NULL
);
11283 off
= local_got_offsets
[r_symndx
];
11284 offplt
= local_tlsdesc_gotents
[r_symndx
];
11285 tls_type
= elf32_arm_local_got_tls_type (input_bfd
)[r_symndx
];
11288 /* Linker relaxations happens from one of the
11289 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
11290 if (ELF32_R_TYPE(rel
->r_info
) != r_type
)
11291 tls_type
= GOT_TLS_IE
;
11293 BFD_ASSERT (tls_type
!= GOT_UNKNOWN
);
11295 if ((off
& 1) != 0)
11299 bfd_boolean need_relocs
= FALSE
;
11300 Elf_Internal_Rela outrel
;
11303 /* The GOT entries have not been initialized yet. Do it
11304 now, and emit any relocations. If both an IE GOT and a
11305 GD GOT are necessary, we emit the GD first. */
11307 if ((bfd_link_pic (info
) || indx
!= 0)
11309 || (ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
11310 && !resolved_to_zero
)
11311 || h
->root
.type
!= bfd_link_hash_undefweak
))
11313 need_relocs
= TRUE
;
11314 BFD_ASSERT (srelgot
!= NULL
);
11317 if (tls_type
& GOT_TLS_GDESC
)
11321 /* We should have relaxed, unless this is an undefined
11323 BFD_ASSERT ((h
&& (h
->root
.type
== bfd_link_hash_undefweak
))
11324 || bfd_link_pic (info
));
11325 BFD_ASSERT (globals
->sgotplt_jump_table_size
+ offplt
+ 8
11326 <= globals
->root
.sgotplt
->size
);
11328 outrel
.r_addend
= 0;
11329 outrel
.r_offset
= (globals
->root
.sgotplt
->output_section
->vma
11330 + globals
->root
.sgotplt
->output_offset
11332 + globals
->sgotplt_jump_table_size
);
11334 outrel
.r_info
= ELF32_R_INFO (indx
, R_ARM_TLS_DESC
);
11335 sreloc
= globals
->root
.srelplt
;
11336 loc
= sreloc
->contents
;
11337 loc
+= globals
->next_tls_desc_index
++ * RELOC_SIZE (globals
);
11338 BFD_ASSERT (loc
+ RELOC_SIZE (globals
)
11339 <= sreloc
->contents
+ sreloc
->size
);
11341 SWAP_RELOC_OUT (globals
) (output_bfd
, &outrel
, loc
);
11343 /* For globals, the first word in the relocation gets
11344 the relocation index and the top bit set, or zero,
11345 if we're binding now. For locals, it gets the
11346 symbol's offset in the tls section. */
11347 bfd_put_32 (output_bfd
,
11348 !h
? value
- elf_hash_table (info
)->tls_sec
->vma
11349 : info
->flags
& DF_BIND_NOW
? 0
11350 : 0x80000000 | ELF32_R_SYM (outrel
.r_info
),
11351 globals
->root
.sgotplt
->contents
+ offplt
11352 + globals
->sgotplt_jump_table_size
);
11354 /* Second word in the relocation is always zero. */
11355 bfd_put_32 (output_bfd
, 0,
11356 globals
->root
.sgotplt
->contents
+ offplt
11357 + globals
->sgotplt_jump_table_size
+ 4);
11359 if (tls_type
& GOT_TLS_GD
)
11363 outrel
.r_addend
= 0;
11364 outrel
.r_offset
= (sgot
->output_section
->vma
11365 + sgot
->output_offset
11367 outrel
.r_info
= ELF32_R_INFO (indx
, R_ARM_TLS_DTPMOD32
);
11369 if (globals
->use_rel
)
11370 bfd_put_32 (output_bfd
, outrel
.r_addend
,
11371 sgot
->contents
+ cur_off
);
11373 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
11376 bfd_put_32 (output_bfd
, value
- dtpoff_base (info
),
11377 sgot
->contents
+ cur_off
+ 4);
11380 outrel
.r_addend
= 0;
11381 outrel
.r_info
= ELF32_R_INFO (indx
,
11382 R_ARM_TLS_DTPOFF32
);
11383 outrel
.r_offset
+= 4;
11385 if (globals
->use_rel
)
11386 bfd_put_32 (output_bfd
, outrel
.r_addend
,
11387 sgot
->contents
+ cur_off
+ 4);
11389 elf32_arm_add_dynreloc (output_bfd
, info
,
11395 /* If we are not emitting relocations for a
11396 general dynamic reference, then we must be in a
11397 static link or an executable link with the
11398 symbol binding locally. Mark it as belonging
11399 to module 1, the executable. */
11400 bfd_put_32 (output_bfd
, 1,
11401 sgot
->contents
+ cur_off
);
11402 bfd_put_32 (output_bfd
, value
- dtpoff_base (info
),
11403 sgot
->contents
+ cur_off
+ 4);
11409 if (tls_type
& GOT_TLS_IE
)
11414 outrel
.r_addend
= value
- dtpoff_base (info
);
11416 outrel
.r_addend
= 0;
11417 outrel
.r_offset
= (sgot
->output_section
->vma
11418 + sgot
->output_offset
11420 outrel
.r_info
= ELF32_R_INFO (indx
, R_ARM_TLS_TPOFF32
);
11422 if (globals
->use_rel
)
11423 bfd_put_32 (output_bfd
, outrel
.r_addend
,
11424 sgot
->contents
+ cur_off
);
11426 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
11429 bfd_put_32 (output_bfd
, tpoff (info
, value
),
11430 sgot
->contents
+ cur_off
);
11435 h
->got
.offset
|= 1;
11437 local_got_offsets
[r_symndx
] |= 1;
11440 if ((tls_type
& GOT_TLS_GD
) && r_type
!= R_ARM_TLS_GD32
)
11442 else if (tls_type
& GOT_TLS_GDESC
)
11445 if (ELF32_R_TYPE(rel
->r_info
) == R_ARM_TLS_CALL
11446 || ELF32_R_TYPE(rel
->r_info
) == R_ARM_THM_TLS_CALL
)
11448 bfd_signed_vma offset
;
11449 /* TLS stubs are arm mode. The original symbol is a
11450 data object, so branch_type is bogus. */
11451 branch_type
= ST_BRANCH_TO_ARM
;
11452 enum elf32_arm_stub_type stub_type
11453 = arm_type_of_stub (info
, input_section
, rel
,
11454 st_type
, &branch_type
,
11455 (struct elf32_arm_link_hash_entry
*)h
,
11456 globals
->tls_trampoline
, globals
->root
.splt
,
11457 input_bfd
, sym_name
);
11459 if (stub_type
!= arm_stub_none
)
11461 struct elf32_arm_stub_hash_entry
*stub_entry
11462 = elf32_arm_get_stub_entry
11463 (input_section
, globals
->root
.splt
, 0, rel
,
11464 globals
, stub_type
);
11465 offset
= (stub_entry
->stub_offset
11466 + stub_entry
->stub_sec
->output_offset
11467 + stub_entry
->stub_sec
->output_section
->vma
);
11470 offset
= (globals
->root
.splt
->output_section
->vma
11471 + globals
->root
.splt
->output_offset
11472 + globals
->tls_trampoline
);
11474 if (ELF32_R_TYPE(rel
->r_info
) == R_ARM_TLS_CALL
)
11476 unsigned long inst
;
11478 offset
-= (input_section
->output_section
->vma
11479 + input_section
->output_offset
11480 + rel
->r_offset
+ 8);
11482 inst
= offset
>> 2;
11483 inst
&= 0x00ffffff;
11484 value
= inst
| (globals
->use_blx
? 0xfa000000 : 0xeb000000);
11488 /* Thumb blx encodes the offset in a complicated
11490 unsigned upper_insn
, lower_insn
;
11493 offset
-= (input_section
->output_section
->vma
11494 + input_section
->output_offset
11495 + rel
->r_offset
+ 4);
11497 if (stub_type
!= arm_stub_none
11498 && arm_stub_is_thumb (stub_type
))
11500 lower_insn
= 0xd000;
11504 lower_insn
= 0xc000;
11505 /* Round up the offset to a word boundary. */
11506 offset
= (offset
+ 2) & ~2;
11510 upper_insn
= (0xf000
11511 | ((offset
>> 12) & 0x3ff)
11513 lower_insn
|= (((!((offset
>> 23) & 1)) ^ neg
) << 13)
11514 | (((!((offset
>> 22) & 1)) ^ neg
) << 11)
11515 | ((offset
>> 1) & 0x7ff);
11516 bfd_put_16 (input_bfd
, upper_insn
, hit_data
);
11517 bfd_put_16 (input_bfd
, lower_insn
, hit_data
+ 2);
11518 return bfd_reloc_ok
;
11521 /* These relocations needs special care, as besides the fact
11522 they point somewhere in .gotplt, the addend must be
11523 adjusted accordingly depending on the type of instruction
11525 else if ((r_type
== R_ARM_TLS_GOTDESC
) && (tls_type
& GOT_TLS_GDESC
))
11527 unsigned long data
, insn
;
11530 data
= bfd_get_32 (input_bfd
, hit_data
);
11536 insn
= bfd_get_16 (input_bfd
, contents
+ rel
->r_offset
- data
);
11537 if ((insn
& 0xf000) == 0xf000 || (insn
& 0xf800) == 0xe800)
11538 insn
= (insn
<< 16)
11539 | bfd_get_16 (input_bfd
,
11540 contents
+ rel
->r_offset
- data
+ 2);
11541 if ((insn
& 0xf800c000) == 0xf000c000)
11544 else if ((insn
& 0xffffff00) == 0x4400)
11550 /* xgettext:c-format */
11551 (_("%pB(%pA+%#" PRIx64
"): "
11552 "unexpected %s instruction '%#lx' "
11553 "referenced by TLS_GOTDESC"),
11554 input_bfd
, input_section
, (uint64_t) rel
->r_offset
,
11556 return bfd_reloc_notsupported
;
11561 insn
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
- data
);
11563 switch (insn
>> 24)
11565 case 0xeb: /* bl */
11566 case 0xfa: /* blx */
11570 case 0xe0: /* add */
11576 /* xgettext:c-format */
11577 (_("%pB(%pA+%#" PRIx64
"): "
11578 "unexpected %s instruction '%#lx' "
11579 "referenced by TLS_GOTDESC"),
11580 input_bfd
, input_section
, (uint64_t) rel
->r_offset
,
11582 return bfd_reloc_notsupported
;
11586 value
+= ((globals
->root
.sgotplt
->output_section
->vma
11587 + globals
->root
.sgotplt
->output_offset
+ off
)
11588 - (input_section
->output_section
->vma
11589 + input_section
->output_offset
11591 + globals
->sgotplt_jump_table_size
);
11594 value
= ((globals
->root
.sgot
->output_section
->vma
11595 + globals
->root
.sgot
->output_offset
+ off
)
11596 - (input_section
->output_section
->vma
11597 + input_section
->output_offset
+ rel
->r_offset
));
11599 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
11600 contents
, rel
->r_offset
, value
,
11604 case R_ARM_TLS_LE32
:
11605 if (bfd_link_dll (info
))
11608 /* xgettext:c-format */
11609 (_("%pB(%pA+%#" PRIx64
"): %s relocation not permitted "
11610 "in shared object"),
11611 input_bfd
, input_section
, (uint64_t) rel
->r_offset
, howto
->name
);
11612 return bfd_reloc_notsupported
;
11615 value
= tpoff (info
, value
);
11617 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
11618 contents
, rel
->r_offset
, value
,
11622 if (globals
->fix_v4bx
)
11624 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
11626 /* Ensure that we have a BX instruction. */
11627 BFD_ASSERT ((insn
& 0x0ffffff0) == 0x012fff10);
11629 if (globals
->fix_v4bx
== 2 && (insn
& 0xf) != 0xf)
11631 /* Branch to veneer. */
11633 glue_addr
= elf32_arm_bx_glue (info
, insn
& 0xf);
11634 glue_addr
-= input_section
->output_section
->vma
11635 + input_section
->output_offset
11636 + rel
->r_offset
+ 8;
11637 insn
= (insn
& 0xf0000000) | 0x0a000000
11638 | ((glue_addr
>> 2) & 0x00ffffff);
11642 /* Preserve Rm (lowest four bits) and the condition code
11643 (highest four bits). Other bits encode MOV PC,Rm. */
11644 insn
= (insn
& 0xf000000f) | 0x01a0f000;
11647 bfd_put_32 (input_bfd
, insn
, hit_data
);
11649 return bfd_reloc_ok
;
11651 case R_ARM_MOVW_ABS_NC
:
11652 case R_ARM_MOVT_ABS
:
11653 case R_ARM_MOVW_PREL_NC
:
11654 case R_ARM_MOVT_PREL
:
11655 /* Until we properly support segment-base-relative addressing then
11656 we assume the segment base to be zero, as for the group relocations.
11657 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
11658 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
11659 case R_ARM_MOVW_BREL_NC
:
11660 case R_ARM_MOVW_BREL
:
11661 case R_ARM_MOVT_BREL
:
11663 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
11665 if (globals
->use_rel
)
11667 addend
= ((insn
>> 4) & 0xf000) | (insn
& 0xfff);
11668 signed_addend
= (addend
^ 0x8000) - 0x8000;
11671 value
+= signed_addend
;
11673 if (r_type
== R_ARM_MOVW_PREL_NC
|| r_type
== R_ARM_MOVT_PREL
)
11674 value
-= (input_section
->output_section
->vma
11675 + input_section
->output_offset
+ rel
->r_offset
);
11677 if (r_type
== R_ARM_MOVW_BREL
&& value
>= 0x10000)
11678 return bfd_reloc_overflow
;
11680 if (branch_type
== ST_BRANCH_TO_THUMB
)
11683 if (r_type
== R_ARM_MOVT_ABS
|| r_type
== R_ARM_MOVT_PREL
11684 || r_type
== R_ARM_MOVT_BREL
)
11687 insn
&= 0xfff0f000;
11688 insn
|= value
& 0xfff;
11689 insn
|= (value
& 0xf000) << 4;
11690 bfd_put_32 (input_bfd
, insn
, hit_data
);
11692 return bfd_reloc_ok
;
11694 case R_ARM_THM_MOVW_ABS_NC
:
11695 case R_ARM_THM_MOVT_ABS
:
11696 case R_ARM_THM_MOVW_PREL_NC
:
11697 case R_ARM_THM_MOVT_PREL
:
11698 /* Until we properly support segment-base-relative addressing then
11699 we assume the segment base to be zero, as for the above relocations.
11700 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
11701 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
11702 as R_ARM_THM_MOVT_ABS. */
11703 case R_ARM_THM_MOVW_BREL_NC
:
11704 case R_ARM_THM_MOVW_BREL
:
11705 case R_ARM_THM_MOVT_BREL
:
11709 insn
= bfd_get_16 (input_bfd
, hit_data
) << 16;
11710 insn
|= bfd_get_16 (input_bfd
, hit_data
+ 2);
11712 if (globals
->use_rel
)
11714 addend
= ((insn
>> 4) & 0xf000)
11715 | ((insn
>> 15) & 0x0800)
11716 | ((insn
>> 4) & 0x0700)
11718 signed_addend
= (addend
^ 0x8000) - 0x8000;
11721 value
+= signed_addend
;
11723 if (r_type
== R_ARM_THM_MOVW_PREL_NC
|| r_type
== R_ARM_THM_MOVT_PREL
)
11724 value
-= (input_section
->output_section
->vma
11725 + input_section
->output_offset
+ rel
->r_offset
);
11727 if (r_type
== R_ARM_THM_MOVW_BREL
&& value
>= 0x10000)
11728 return bfd_reloc_overflow
;
11730 if (branch_type
== ST_BRANCH_TO_THUMB
)
11733 if (r_type
== R_ARM_THM_MOVT_ABS
|| r_type
== R_ARM_THM_MOVT_PREL
11734 || r_type
== R_ARM_THM_MOVT_BREL
)
11737 insn
&= 0xfbf08f00;
11738 insn
|= (value
& 0xf000) << 4;
11739 insn
|= (value
& 0x0800) << 15;
11740 insn
|= (value
& 0x0700) << 4;
11741 insn
|= (value
& 0x00ff);
11743 bfd_put_16 (input_bfd
, insn
>> 16, hit_data
);
11744 bfd_put_16 (input_bfd
, insn
& 0xffff, hit_data
+ 2);
11746 return bfd_reloc_ok
;
11748 case R_ARM_ALU_PC_G0_NC
:
11749 case R_ARM_ALU_PC_G1_NC
:
11750 case R_ARM_ALU_PC_G0
:
11751 case R_ARM_ALU_PC_G1
:
11752 case R_ARM_ALU_PC_G2
:
11753 case R_ARM_ALU_SB_G0_NC
:
11754 case R_ARM_ALU_SB_G1_NC
:
11755 case R_ARM_ALU_SB_G0
:
11756 case R_ARM_ALU_SB_G1
:
11757 case R_ARM_ALU_SB_G2
:
11759 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
11760 bfd_vma pc
= input_section
->output_section
->vma
11761 + input_section
->output_offset
+ rel
->r_offset
;
11762 /* sb is the origin of the *segment* containing the symbol. */
11763 bfd_vma sb
= sym_sec
? sym_sec
->output_section
->vma
: 0;
11766 bfd_signed_vma signed_value
;
11769 /* Determine which group of bits to select. */
11772 case R_ARM_ALU_PC_G0_NC
:
11773 case R_ARM_ALU_PC_G0
:
11774 case R_ARM_ALU_SB_G0_NC
:
11775 case R_ARM_ALU_SB_G0
:
11779 case R_ARM_ALU_PC_G1_NC
:
11780 case R_ARM_ALU_PC_G1
:
11781 case R_ARM_ALU_SB_G1_NC
:
11782 case R_ARM_ALU_SB_G1
:
11786 case R_ARM_ALU_PC_G2
:
11787 case R_ARM_ALU_SB_G2
:
11795 /* If REL, extract the addend from the insn. If RELA, it will
11796 have already been fetched for us. */
11797 if (globals
->use_rel
)
11800 bfd_vma constant
= insn
& 0xff;
11801 bfd_vma rotation
= (insn
& 0xf00) >> 8;
11804 signed_addend
= constant
;
11807 /* Compensate for the fact that in the instruction, the
11808 rotation is stored in multiples of 2 bits. */
11811 /* Rotate "constant" right by "rotation" bits. */
11812 signed_addend
= (constant
>> rotation
) |
11813 (constant
<< (8 * sizeof (bfd_vma
) - rotation
));
11816 /* Determine if the instruction is an ADD or a SUB.
11817 (For REL, this determines the sign of the addend.) */
11818 negative
= identify_add_or_sub (insn
);
11822 /* xgettext:c-format */
11823 (_("%pB(%pA+%#" PRIx64
"): only ADD or SUB instructions "
11824 "are allowed for ALU group relocations"),
11825 input_bfd
, input_section
, (uint64_t) rel
->r_offset
);
11826 return bfd_reloc_overflow
;
11829 signed_addend
*= negative
;
11832 /* Compute the value (X) to go in the place. */
11833 if (r_type
== R_ARM_ALU_PC_G0_NC
11834 || r_type
== R_ARM_ALU_PC_G1_NC
11835 || r_type
== R_ARM_ALU_PC_G0
11836 || r_type
== R_ARM_ALU_PC_G1
11837 || r_type
== R_ARM_ALU_PC_G2
)
11839 signed_value
= value
- pc
+ signed_addend
;
11841 /* Section base relative. */
11842 signed_value
= value
- sb
+ signed_addend
;
11844 /* If the target symbol is a Thumb function, then set the
11845 Thumb bit in the address. */
11846 if (branch_type
== ST_BRANCH_TO_THUMB
)
11849 /* Calculate the value of the relevant G_n, in encoded
11850 constant-with-rotation format. */
11851 g_n
= calculate_group_reloc_mask (signed_value
< 0 ? - signed_value
: signed_value
,
11854 /* Check for overflow if required. */
11855 if ((r_type
== R_ARM_ALU_PC_G0
11856 || r_type
== R_ARM_ALU_PC_G1
11857 || r_type
== R_ARM_ALU_PC_G2
11858 || r_type
== R_ARM_ALU_SB_G0
11859 || r_type
== R_ARM_ALU_SB_G1
11860 || r_type
== R_ARM_ALU_SB_G2
) && residual
!= 0)
11863 /* xgettext:c-format */
11864 (_("%pB(%pA+%#" PRIx64
"): overflow whilst "
11865 "splitting %#" PRIx64
" for group relocation %s"),
11866 input_bfd
, input_section
, (uint64_t) rel
->r_offset
,
11867 (uint64_t) (signed_value
< 0 ? -signed_value
: signed_value
),
11869 return bfd_reloc_overflow
;
11872 /* Mask out the value and the ADD/SUB part of the opcode; take care
11873 not to destroy the S bit. */
11874 insn
&= 0xff1ff000;
11876 /* Set the opcode according to whether the value to go in the
11877 place is negative. */
11878 if (signed_value
< 0)
11883 /* Encode the offset. */
11886 bfd_put_32 (input_bfd
, insn
, hit_data
);
11888 return bfd_reloc_ok
;
11890 case R_ARM_LDR_PC_G0
:
11891 case R_ARM_LDR_PC_G1
:
11892 case R_ARM_LDR_PC_G2
:
11893 case R_ARM_LDR_SB_G0
:
11894 case R_ARM_LDR_SB_G1
:
11895 case R_ARM_LDR_SB_G2
:
11897 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
11898 bfd_vma pc
= input_section
->output_section
->vma
11899 + input_section
->output_offset
+ rel
->r_offset
;
11900 /* sb is the origin of the *segment* containing the symbol. */
11901 bfd_vma sb
= sym_sec
? sym_sec
->output_section
->vma
: 0;
11903 bfd_signed_vma signed_value
;
11906 /* Determine which groups of bits to calculate. */
11909 case R_ARM_LDR_PC_G0
:
11910 case R_ARM_LDR_SB_G0
:
11914 case R_ARM_LDR_PC_G1
:
11915 case R_ARM_LDR_SB_G1
:
11919 case R_ARM_LDR_PC_G2
:
11920 case R_ARM_LDR_SB_G2
:
11928 /* If REL, extract the addend from the insn. If RELA, it will
11929 have already been fetched for us. */
11930 if (globals
->use_rel
)
11932 int negative
= (insn
& (1 << 23)) ? 1 : -1;
11933 signed_addend
= negative
* (insn
& 0xfff);
11936 /* Compute the value (X) to go in the place. */
11937 if (r_type
== R_ARM_LDR_PC_G0
11938 || r_type
== R_ARM_LDR_PC_G1
11939 || r_type
== R_ARM_LDR_PC_G2
)
11941 signed_value
= value
- pc
+ signed_addend
;
11943 /* Section base relative. */
11944 signed_value
= value
- sb
+ signed_addend
;
11946 /* Calculate the value of the relevant G_{n-1} to obtain
11947 the residual at that stage. */
11948 calculate_group_reloc_mask (signed_value
< 0 ? - signed_value
: signed_value
,
11949 group
- 1, &residual
);
11951 /* Check for overflow. */
11952 if (residual
>= 0x1000)
11955 /* xgettext:c-format */
11956 (_("%pB(%pA+%#" PRIx64
"): overflow whilst "
11957 "splitting %#" PRIx64
" for group relocation %s"),
11958 input_bfd
, input_section
, (uint64_t) rel
->r_offset
,
11959 (uint64_t) (signed_value
< 0 ? -signed_value
: signed_value
),
11961 return bfd_reloc_overflow
;
11964 /* Mask out the value and U bit. */
11965 insn
&= 0xff7ff000;
11967 /* Set the U bit if the value to go in the place is non-negative. */
11968 if (signed_value
>= 0)
11971 /* Encode the offset. */
11974 bfd_put_32 (input_bfd
, insn
, hit_data
);
11976 return bfd_reloc_ok
;
11978 case R_ARM_LDRS_PC_G0
:
11979 case R_ARM_LDRS_PC_G1
:
11980 case R_ARM_LDRS_PC_G2
:
11981 case R_ARM_LDRS_SB_G0
:
11982 case R_ARM_LDRS_SB_G1
:
11983 case R_ARM_LDRS_SB_G2
:
11985 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
11986 bfd_vma pc
= input_section
->output_section
->vma
11987 + input_section
->output_offset
+ rel
->r_offset
;
11988 /* sb is the origin of the *segment* containing the symbol. */
11989 bfd_vma sb
= sym_sec
? sym_sec
->output_section
->vma
: 0;
11991 bfd_signed_vma signed_value
;
11994 /* Determine which groups of bits to calculate. */
11997 case R_ARM_LDRS_PC_G0
:
11998 case R_ARM_LDRS_SB_G0
:
12002 case R_ARM_LDRS_PC_G1
:
12003 case R_ARM_LDRS_SB_G1
:
12007 case R_ARM_LDRS_PC_G2
:
12008 case R_ARM_LDRS_SB_G2
:
12016 /* If REL, extract the addend from the insn. If RELA, it will
12017 have already been fetched for us. */
12018 if (globals
->use_rel
)
12020 int negative
= (insn
& (1 << 23)) ? 1 : -1;
12021 signed_addend
= negative
* (((insn
& 0xf00) >> 4) + (insn
& 0xf));
12024 /* Compute the value (X) to go in the place. */
12025 if (r_type
== R_ARM_LDRS_PC_G0
12026 || r_type
== R_ARM_LDRS_PC_G1
12027 || r_type
== R_ARM_LDRS_PC_G2
)
12029 signed_value
= value
- pc
+ signed_addend
;
12031 /* Section base relative. */
12032 signed_value
= value
- sb
+ signed_addend
;
12034 /* Calculate the value of the relevant G_{n-1} to obtain
12035 the residual at that stage. */
12036 calculate_group_reloc_mask (signed_value
< 0 ? - signed_value
: signed_value
,
12037 group
- 1, &residual
);
12039 /* Check for overflow. */
12040 if (residual
>= 0x100)
12043 /* xgettext:c-format */
12044 (_("%pB(%pA+%#" PRIx64
"): overflow whilst "
12045 "splitting %#" PRIx64
" for group relocation %s"),
12046 input_bfd
, input_section
, (uint64_t) rel
->r_offset
,
12047 (uint64_t) (signed_value
< 0 ? -signed_value
: signed_value
),
12049 return bfd_reloc_overflow
;
12052 /* Mask out the value and U bit. */
12053 insn
&= 0xff7ff0f0;
12055 /* Set the U bit if the value to go in the place is non-negative. */
12056 if (signed_value
>= 0)
12059 /* Encode the offset. */
12060 insn
|= ((residual
& 0xf0) << 4) | (residual
& 0xf);
12062 bfd_put_32 (input_bfd
, insn
, hit_data
);
12064 return bfd_reloc_ok
;
12066 case R_ARM_LDC_PC_G0
:
12067 case R_ARM_LDC_PC_G1
:
12068 case R_ARM_LDC_PC_G2
:
12069 case R_ARM_LDC_SB_G0
:
12070 case R_ARM_LDC_SB_G1
:
12071 case R_ARM_LDC_SB_G2
:
12073 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
12074 bfd_vma pc
= input_section
->output_section
->vma
12075 + input_section
->output_offset
+ rel
->r_offset
;
12076 /* sb is the origin of the *segment* containing the symbol. */
12077 bfd_vma sb
= sym_sec
? sym_sec
->output_section
->vma
: 0;
12079 bfd_signed_vma signed_value
;
12082 /* Determine which groups of bits to calculate. */
12085 case R_ARM_LDC_PC_G0
:
12086 case R_ARM_LDC_SB_G0
:
12090 case R_ARM_LDC_PC_G1
:
12091 case R_ARM_LDC_SB_G1
:
12095 case R_ARM_LDC_PC_G2
:
12096 case R_ARM_LDC_SB_G2
:
12104 /* If REL, extract the addend from the insn. If RELA, it will
12105 have already been fetched for us. */
12106 if (globals
->use_rel
)
12108 int negative
= (insn
& (1 << 23)) ? 1 : -1;
12109 signed_addend
= negative
* ((insn
& 0xff) << 2);
12112 /* Compute the value (X) to go in the place. */
12113 if (r_type
== R_ARM_LDC_PC_G0
12114 || r_type
== R_ARM_LDC_PC_G1
12115 || r_type
== R_ARM_LDC_PC_G2
)
12117 signed_value
= value
- pc
+ signed_addend
;
12119 /* Section base relative. */
12120 signed_value
= value
- sb
+ signed_addend
;
12122 /* Calculate the value of the relevant G_{n-1} to obtain
12123 the residual at that stage. */
12124 calculate_group_reloc_mask (signed_value
< 0 ? - signed_value
: signed_value
,
12125 group
- 1, &residual
);
12127 /* Check for overflow. (The absolute value to go in the place must be
12128 divisible by four and, after having been divided by four, must
12129 fit in eight bits.) */
12130 if ((residual
& 0x3) != 0 || residual
>= 0x400)
12133 /* xgettext:c-format */
12134 (_("%pB(%pA+%#" PRIx64
"): overflow whilst "
12135 "splitting %#" PRIx64
" for group relocation %s"),
12136 input_bfd
, input_section
, (uint64_t) rel
->r_offset
,
12137 (uint64_t) (signed_value
< 0 ? -signed_value
: signed_value
),
12139 return bfd_reloc_overflow
;
12142 /* Mask out the value and U bit. */
12143 insn
&= 0xff7fff00;
12145 /* Set the U bit if the value to go in the place is non-negative. */
12146 if (signed_value
>= 0)
12149 /* Encode the offset. */
12150 insn
|= residual
>> 2;
12152 bfd_put_32 (input_bfd
, insn
, hit_data
);
12154 return bfd_reloc_ok
;
12156 case R_ARM_THM_ALU_ABS_G0_NC
:
12157 case R_ARM_THM_ALU_ABS_G1_NC
:
12158 case R_ARM_THM_ALU_ABS_G2_NC
:
12159 case R_ARM_THM_ALU_ABS_G3_NC
:
12161 const int shift_array
[4] = {0, 8, 16, 24};
12162 bfd_vma insn
= bfd_get_16 (input_bfd
, hit_data
);
12163 bfd_vma addr
= value
;
12164 int shift
= shift_array
[r_type
- R_ARM_THM_ALU_ABS_G0_NC
];
12166 /* Compute address. */
12167 if (globals
->use_rel
)
12168 signed_addend
= insn
& 0xff;
12169 addr
+= signed_addend
;
12170 if (branch_type
== ST_BRANCH_TO_THUMB
)
12172 /* Clean imm8 insn. */
12174 /* And update with correct part of address. */
12175 insn
|= (addr
>> shift
) & 0xff;
12177 bfd_put_16 (input_bfd
, insn
, hit_data
);
12180 *unresolved_reloc_p
= FALSE
;
12181 return bfd_reloc_ok
;
12184 return bfd_reloc_notsupported
;
12188 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
12190 arm_add_to_rel (bfd
* abfd
,
12191 bfd_byte
* address
,
12192 reloc_howto_type
* howto
,
12193 bfd_signed_vma increment
)
12195 bfd_signed_vma addend
;
12197 if (howto
->type
== R_ARM_THM_CALL
12198 || howto
->type
== R_ARM_THM_JUMP24
)
12200 int upper_insn
, lower_insn
;
12203 upper_insn
= bfd_get_16 (abfd
, address
);
12204 lower_insn
= bfd_get_16 (abfd
, address
+ 2);
12205 upper
= upper_insn
& 0x7ff;
12206 lower
= lower_insn
& 0x7ff;
12208 addend
= (upper
<< 12) | (lower
<< 1);
12209 addend
+= increment
;
12212 upper_insn
= (upper_insn
& 0xf800) | ((addend
>> 11) & 0x7ff);
12213 lower_insn
= (lower_insn
& 0xf800) | (addend
& 0x7ff);
12215 bfd_put_16 (abfd
, (bfd_vma
) upper_insn
, address
);
12216 bfd_put_16 (abfd
, (bfd_vma
) lower_insn
, address
+ 2);
12222 contents
= bfd_get_32 (abfd
, address
);
12224 /* Get the (signed) value from the instruction. */
12225 addend
= contents
& howto
->src_mask
;
12226 if (addend
& ((howto
->src_mask
+ 1) >> 1))
12228 bfd_signed_vma mask
;
12231 mask
&= ~ howto
->src_mask
;
12235 /* Add in the increment, (which is a byte value). */
12236 switch (howto
->type
)
12239 addend
+= increment
;
12246 addend
<<= howto
->size
;
12247 addend
+= increment
;
12249 /* Should we check for overflow here ? */
12251 /* Drop any undesired bits. */
12252 addend
>>= howto
->rightshift
;
12256 contents
= (contents
& ~ howto
->dst_mask
) | (addend
& howto
->dst_mask
);
12258 bfd_put_32 (abfd
, contents
, address
);
12262 #define IS_ARM_TLS_RELOC(R_TYPE) \
12263 ((R_TYPE) == R_ARM_TLS_GD32 \
12264 || (R_TYPE) == R_ARM_TLS_LDO32 \
12265 || (R_TYPE) == R_ARM_TLS_LDM32 \
12266 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
12267 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
12268 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
12269 || (R_TYPE) == R_ARM_TLS_LE32 \
12270 || (R_TYPE) == R_ARM_TLS_IE32 \
12271 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
12273 /* Specific set of relocations for the gnu tls dialect. */
12274 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
12275 ((R_TYPE) == R_ARM_TLS_GOTDESC \
12276 || (R_TYPE) == R_ARM_TLS_CALL \
12277 || (R_TYPE) == R_ARM_THM_TLS_CALL \
12278 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
12279 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
12281 /* Relocate an ARM ELF section. */
12284 elf32_arm_relocate_section (bfd
* output_bfd
,
12285 struct bfd_link_info
* info
,
12287 asection
* input_section
,
12288 bfd_byte
* contents
,
12289 Elf_Internal_Rela
* relocs
,
12290 Elf_Internal_Sym
* local_syms
,
12291 asection
** local_sections
)
12293 Elf_Internal_Shdr
*symtab_hdr
;
12294 struct elf_link_hash_entry
**sym_hashes
;
12295 Elf_Internal_Rela
*rel
;
12296 Elf_Internal_Rela
*relend
;
12298 struct elf32_arm_link_hash_table
* globals
;
12300 globals
= elf32_arm_hash_table (info
);
12301 if (globals
== NULL
)
12304 symtab_hdr
= & elf_symtab_hdr (input_bfd
);
12305 sym_hashes
= elf_sym_hashes (input_bfd
);
12308 relend
= relocs
+ input_section
->reloc_count
;
12309 for (; rel
< relend
; rel
++)
12312 reloc_howto_type
* howto
;
12313 unsigned long r_symndx
;
12314 Elf_Internal_Sym
* sym
;
12316 struct elf_link_hash_entry
* h
;
12317 bfd_vma relocation
;
12318 bfd_reloc_status_type r
;
12321 bfd_boolean unresolved_reloc
= FALSE
;
12322 char *error_message
= NULL
;
12324 r_symndx
= ELF32_R_SYM (rel
->r_info
);
12325 r_type
= ELF32_R_TYPE (rel
->r_info
);
12326 r_type
= arm_real_reloc_type (globals
, r_type
);
12328 if ( r_type
== R_ARM_GNU_VTENTRY
12329 || r_type
== R_ARM_GNU_VTINHERIT
)
12332 howto
= bfd_reloc
.howto
= elf32_arm_howto_from_type (r_type
);
12335 return _bfd_unrecognized_reloc (input_bfd
, input_section
, r_type
);
12341 if (r_symndx
< symtab_hdr
->sh_info
)
12343 sym
= local_syms
+ r_symndx
;
12344 sym_type
= ELF32_ST_TYPE (sym
->st_info
);
12345 sec
= local_sections
[r_symndx
];
12347 /* An object file might have a reference to a local
12348 undefined symbol. This is a daft object file, but we
12349 should at least do something about it. V4BX & NONE
12350 relocations do not use the symbol and are explicitly
12351 allowed to use the undefined symbol, so allow those.
12352 Likewise for relocations against STN_UNDEF. */
12353 if (r_type
!= R_ARM_V4BX
12354 && r_type
!= R_ARM_NONE
12355 && r_symndx
!= STN_UNDEF
12356 && bfd_is_und_section (sec
)
12357 && ELF_ST_BIND (sym
->st_info
) != STB_WEAK
)
12358 (*info
->callbacks
->undefined_symbol
)
12359 (info
, bfd_elf_string_from_elf_section
12360 (input_bfd
, symtab_hdr
->sh_link
, sym
->st_name
),
12361 input_bfd
, input_section
,
12362 rel
->r_offset
, TRUE
);
12364 if (globals
->use_rel
)
12366 relocation
= (sec
->output_section
->vma
12367 + sec
->output_offset
12369 if (!bfd_link_relocatable (info
)
12370 && (sec
->flags
& SEC_MERGE
)
12371 && ELF_ST_TYPE (sym
->st_info
) == STT_SECTION
)
12374 bfd_vma addend
, value
;
12378 case R_ARM_MOVW_ABS_NC
:
12379 case R_ARM_MOVT_ABS
:
12380 value
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
);
12381 addend
= ((value
& 0xf0000) >> 4) | (value
& 0xfff);
12382 addend
= (addend
^ 0x8000) - 0x8000;
12385 case R_ARM_THM_MOVW_ABS_NC
:
12386 case R_ARM_THM_MOVT_ABS
:
12387 value
= bfd_get_16 (input_bfd
, contents
+ rel
->r_offset
)
12389 value
|= bfd_get_16 (input_bfd
,
12390 contents
+ rel
->r_offset
+ 2);
12391 addend
= ((value
& 0xf7000) >> 4) | (value
& 0xff)
12392 | ((value
& 0x04000000) >> 15);
12393 addend
= (addend
^ 0x8000) - 0x8000;
12397 if (howto
->rightshift
12398 || (howto
->src_mask
& (howto
->src_mask
+ 1)))
12401 /* xgettext:c-format */
12402 (_("%pB(%pA+%#" PRIx64
"): "
12403 "%s relocation against SEC_MERGE section"),
12404 input_bfd
, input_section
,
12405 (uint64_t) rel
->r_offset
, howto
->name
);
12409 value
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
);
12411 /* Get the (signed) value from the instruction. */
12412 addend
= value
& howto
->src_mask
;
12413 if (addend
& ((howto
->src_mask
+ 1) >> 1))
12415 bfd_signed_vma mask
;
12418 mask
&= ~ howto
->src_mask
;
12426 _bfd_elf_rel_local_sym (output_bfd
, sym
, &msec
, addend
)
12428 addend
+= msec
->output_section
->vma
+ msec
->output_offset
;
12430 /* Cases here must match those in the preceding
12431 switch statement. */
12434 case R_ARM_MOVW_ABS_NC
:
12435 case R_ARM_MOVT_ABS
:
12436 value
= (value
& 0xfff0f000) | ((addend
& 0xf000) << 4)
12437 | (addend
& 0xfff);
12438 bfd_put_32 (input_bfd
, value
, contents
+ rel
->r_offset
);
12441 case R_ARM_THM_MOVW_ABS_NC
:
12442 case R_ARM_THM_MOVT_ABS
:
12443 value
= (value
& 0xfbf08f00) | ((addend
& 0xf700) << 4)
12444 | (addend
& 0xff) | ((addend
& 0x0800) << 15);
12445 bfd_put_16 (input_bfd
, value
>> 16,
12446 contents
+ rel
->r_offset
);
12447 bfd_put_16 (input_bfd
, value
,
12448 contents
+ rel
->r_offset
+ 2);
12452 value
= (value
& ~ howto
->dst_mask
)
12453 | (addend
& howto
->dst_mask
);
12454 bfd_put_32 (input_bfd
, value
, contents
+ rel
->r_offset
);
12460 relocation
= _bfd_elf_rela_local_sym (output_bfd
, sym
, &sec
, rel
);
12464 bfd_boolean warned
, ignored
;
12466 RELOC_FOR_GLOBAL_SYMBOL (info
, input_bfd
, input_section
, rel
,
12467 r_symndx
, symtab_hdr
, sym_hashes
,
12468 h
, sec
, relocation
,
12469 unresolved_reloc
, warned
, ignored
);
12471 sym_type
= h
->type
;
12474 if (sec
!= NULL
&& discarded_section (sec
))
12475 RELOC_AGAINST_DISCARDED_SECTION (info
, input_bfd
, input_section
,
12476 rel
, 1, relend
, howto
, 0, contents
);
12478 if (bfd_link_relocatable (info
))
12480 /* This is a relocatable link. We don't have to change
12481 anything, unless the reloc is against a section symbol,
12482 in which case we have to adjust according to where the
12483 section symbol winds up in the output section. */
12484 if (sym
!= NULL
&& ELF_ST_TYPE (sym
->st_info
) == STT_SECTION
)
12486 if (globals
->use_rel
)
12487 arm_add_to_rel (input_bfd
, contents
+ rel
->r_offset
,
12488 howto
, (bfd_signed_vma
) sec
->output_offset
);
12490 rel
->r_addend
+= sec
->output_offset
;
12496 name
= h
->root
.root
.string
;
12499 name
= (bfd_elf_string_from_elf_section
12500 (input_bfd
, symtab_hdr
->sh_link
, sym
->st_name
));
12501 if (name
== NULL
|| *name
== '\0')
12502 name
= bfd_section_name (input_bfd
, sec
);
12505 if (r_symndx
!= STN_UNDEF
12506 && r_type
!= R_ARM_NONE
12508 || h
->root
.type
== bfd_link_hash_defined
12509 || h
->root
.type
== bfd_link_hash_defweak
)
12510 && IS_ARM_TLS_RELOC (r_type
) != (sym_type
== STT_TLS
))
12513 ((sym_type
== STT_TLS
12514 /* xgettext:c-format */
12515 ? _("%pB(%pA+%#" PRIx64
"): %s used with TLS symbol %s")
12516 /* xgettext:c-format */
12517 : _("%pB(%pA+%#" PRIx64
"): %s used with non-TLS symbol %s")),
12520 (uint64_t) rel
->r_offset
,
12525 /* We call elf32_arm_final_link_relocate unless we're completely
12526 done, i.e., the relaxation produced the final output we want,
12527 and we won't let anybody mess with it. Also, we have to do
12528 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
12529 both in relaxed and non-relaxed cases. */
12530 if ((elf32_arm_tls_transition (info
, r_type
, h
) != (unsigned)r_type
)
12531 || (IS_ARM_TLS_GNU_RELOC (r_type
)
12532 && !((h
? elf32_arm_hash_entry (h
)->tls_type
:
12533 elf32_arm_local_got_tls_type (input_bfd
)[r_symndx
])
12536 r
= elf32_arm_tls_relax (globals
, input_bfd
, input_section
,
12537 contents
, rel
, h
== NULL
);
12538 /* This may have been marked unresolved because it came from
12539 a shared library. But we've just dealt with that. */
12540 unresolved_reloc
= 0;
12543 r
= bfd_reloc_continue
;
12545 if (r
== bfd_reloc_continue
)
12547 unsigned char branch_type
=
12548 h
? ARM_GET_SYM_BRANCH_TYPE (h
->target_internal
)
12549 : ARM_GET_SYM_BRANCH_TYPE (sym
->st_target_internal
);
12551 r
= elf32_arm_final_link_relocate (howto
, input_bfd
, output_bfd
,
12552 input_section
, contents
, rel
,
12553 relocation
, info
, sec
, name
,
12554 sym_type
, branch_type
, h
,
12559 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
12560 because such sections are not SEC_ALLOC and thus ld.so will
12561 not process them. */
12562 if (unresolved_reloc
12563 && !((input_section
->flags
& SEC_DEBUGGING
) != 0
12565 && _bfd_elf_section_offset (output_bfd
, info
, input_section
,
12566 rel
->r_offset
) != (bfd_vma
) -1)
12569 /* xgettext:c-format */
12570 (_("%pB(%pA+%#" PRIx64
"): "
12571 "unresolvable %s relocation against symbol `%s'"),
12574 (uint64_t) rel
->r_offset
,
12576 h
->root
.root
.string
);
12580 if (r
!= bfd_reloc_ok
)
12584 case bfd_reloc_overflow
:
12585 /* If the overflowing reloc was to an undefined symbol,
12586 we have already printed one error message and there
12587 is no point complaining again. */
12588 if (!h
|| h
->root
.type
!= bfd_link_hash_undefined
)
12589 (*info
->callbacks
->reloc_overflow
)
12590 (info
, (h
? &h
->root
: NULL
), name
, howto
->name
,
12591 (bfd_vma
) 0, input_bfd
, input_section
, rel
->r_offset
);
12594 case bfd_reloc_undefined
:
12595 (*info
->callbacks
->undefined_symbol
)
12596 (info
, name
, input_bfd
, input_section
, rel
->r_offset
, TRUE
);
12599 case bfd_reloc_outofrange
:
12600 error_message
= _("out of range");
12603 case bfd_reloc_notsupported
:
12604 error_message
= _("unsupported relocation");
12607 case bfd_reloc_dangerous
:
12608 /* error_message should already be set. */
12612 error_message
= _("unknown error");
12613 /* Fall through. */
12616 BFD_ASSERT (error_message
!= NULL
);
12617 (*info
->callbacks
->reloc_dangerous
)
12618 (info
, error_message
, input_bfd
, input_section
, rel
->r_offset
);
12627 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
12628 adds the edit to the start of the list. (The list must be built in order of
12629 ascending TINDEX: the function's callers are primarily responsible for
12630 maintaining that condition). */
12633 add_unwind_table_edit (arm_unwind_table_edit
**head
,
12634 arm_unwind_table_edit
**tail
,
12635 arm_unwind_edit_type type
,
12636 asection
*linked_section
,
12637 unsigned int tindex
)
12639 arm_unwind_table_edit
*new_edit
= (arm_unwind_table_edit
*)
12640 xmalloc (sizeof (arm_unwind_table_edit
));
12642 new_edit
->type
= type
;
12643 new_edit
->linked_section
= linked_section
;
12644 new_edit
->index
= tindex
;
12648 new_edit
->next
= NULL
;
12651 (*tail
)->next
= new_edit
;
12653 (*tail
) = new_edit
;
12656 (*head
) = new_edit
;
12660 new_edit
->next
= *head
;
12669 static _arm_elf_section_data
*get_arm_elf_section_data (asection
*);
12671 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
12673 adjust_exidx_size(asection
*exidx_sec
, int adjust
)
12677 if (!exidx_sec
->rawsize
)
12678 exidx_sec
->rawsize
= exidx_sec
->size
;
12680 bfd_set_section_size (exidx_sec
->owner
, exidx_sec
, exidx_sec
->size
+ adjust
);
12681 out_sec
= exidx_sec
->output_section
;
12682 /* Adjust size of output section. */
12683 bfd_set_section_size (out_sec
->owner
, out_sec
, out_sec
->size
+adjust
);
12686 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
12688 insert_cantunwind_after(asection
*text_sec
, asection
*exidx_sec
)
12690 struct _arm_elf_section_data
*exidx_arm_data
;
12692 exidx_arm_data
= get_arm_elf_section_data (exidx_sec
);
12693 add_unwind_table_edit (
12694 &exidx_arm_data
->u
.exidx
.unwind_edit_list
,
12695 &exidx_arm_data
->u
.exidx
.unwind_edit_tail
,
12696 INSERT_EXIDX_CANTUNWIND_AT_END
, text_sec
, UINT_MAX
);
12698 exidx_arm_data
->additional_reloc_count
++;
12700 adjust_exidx_size(exidx_sec
, 8);
12703 /* Scan .ARM.exidx tables, and create a list describing edits which should be
12704 made to those tables, such that:
12706 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
12707 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
12708 codes which have been inlined into the index).
12710 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
12712 The edits are applied when the tables are written
12713 (in elf32_arm_write_section). */
12716 elf32_arm_fix_exidx_coverage (asection
**text_section_order
,
12717 unsigned int num_text_sections
,
12718 struct bfd_link_info
*info
,
12719 bfd_boolean merge_exidx_entries
)
12722 unsigned int last_second_word
= 0, i
;
12723 asection
*last_exidx_sec
= NULL
;
12724 asection
*last_text_sec
= NULL
;
12725 int last_unwind_type
= -1;
12727 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
12729 for (inp
= info
->input_bfds
; inp
!= NULL
; inp
= inp
->link
.next
)
12733 for (sec
= inp
->sections
; sec
!= NULL
; sec
= sec
->next
)
12735 struct bfd_elf_section_data
*elf_sec
= elf_section_data (sec
);
12736 Elf_Internal_Shdr
*hdr
= &elf_sec
->this_hdr
;
12738 if (!hdr
|| hdr
->sh_type
!= SHT_ARM_EXIDX
)
12741 if (elf_sec
->linked_to
)
12743 Elf_Internal_Shdr
*linked_hdr
12744 = &elf_section_data (elf_sec
->linked_to
)->this_hdr
;
12745 struct _arm_elf_section_data
*linked_sec_arm_data
12746 = get_arm_elf_section_data (linked_hdr
->bfd_section
);
12748 if (linked_sec_arm_data
== NULL
)
12751 /* Link this .ARM.exidx section back from the text section it
12753 linked_sec_arm_data
->u
.text
.arm_exidx_sec
= sec
;
12758 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
12759 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
12760 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
12762 for (i
= 0; i
< num_text_sections
; i
++)
12764 asection
*sec
= text_section_order
[i
];
12765 asection
*exidx_sec
;
12766 struct _arm_elf_section_data
*arm_data
= get_arm_elf_section_data (sec
);
12767 struct _arm_elf_section_data
*exidx_arm_data
;
12768 bfd_byte
*contents
= NULL
;
12769 int deleted_exidx_bytes
= 0;
12771 arm_unwind_table_edit
*unwind_edit_head
= NULL
;
12772 arm_unwind_table_edit
*unwind_edit_tail
= NULL
;
12773 Elf_Internal_Shdr
*hdr
;
12776 if (arm_data
== NULL
)
12779 exidx_sec
= arm_data
->u
.text
.arm_exidx_sec
;
12780 if (exidx_sec
== NULL
)
12782 /* Section has no unwind data. */
12783 if (last_unwind_type
== 0 || !last_exidx_sec
)
12786 /* Ignore zero sized sections. */
12787 if (sec
->size
== 0)
12790 insert_cantunwind_after(last_text_sec
, last_exidx_sec
);
12791 last_unwind_type
= 0;
12795 /* Skip /DISCARD/ sections. */
12796 if (bfd_is_abs_section (exidx_sec
->output_section
))
12799 hdr
= &elf_section_data (exidx_sec
)->this_hdr
;
12800 if (hdr
->sh_type
!= SHT_ARM_EXIDX
)
12803 exidx_arm_data
= get_arm_elf_section_data (exidx_sec
);
12804 if (exidx_arm_data
== NULL
)
12807 ibfd
= exidx_sec
->owner
;
12809 if (hdr
->contents
!= NULL
)
12810 contents
= hdr
->contents
;
12811 else if (! bfd_malloc_and_get_section (ibfd
, exidx_sec
, &contents
))
12815 if (last_unwind_type
> 0)
12817 unsigned int first_word
= bfd_get_32 (ibfd
, contents
);
12818 /* Add cantunwind if first unwind item does not match section
12820 if (first_word
!= sec
->vma
)
12822 insert_cantunwind_after (last_text_sec
, last_exidx_sec
);
12823 last_unwind_type
= 0;
12827 for (j
= 0; j
< hdr
->sh_size
; j
+= 8)
12829 unsigned int second_word
= bfd_get_32 (ibfd
, contents
+ j
+ 4);
12833 /* An EXIDX_CANTUNWIND entry. */
12834 if (second_word
== 1)
12836 if (last_unwind_type
== 0)
12840 /* Inlined unwinding data. Merge if equal to previous. */
12841 else if ((second_word
& 0x80000000) != 0)
12843 if (merge_exidx_entries
12844 && last_second_word
== second_word
&& last_unwind_type
== 1)
12847 last_second_word
= second_word
;
12849 /* Normal table entry. In theory we could merge these too,
12850 but duplicate entries are likely to be much less common. */
12854 if (elide
&& !bfd_link_relocatable (info
))
12856 add_unwind_table_edit (&unwind_edit_head
, &unwind_edit_tail
,
12857 DELETE_EXIDX_ENTRY
, NULL
, j
/ 8);
12859 deleted_exidx_bytes
+= 8;
12862 last_unwind_type
= unwind_type
;
12865 /* Free contents if we allocated it ourselves. */
12866 if (contents
!= hdr
->contents
)
12869 /* Record edits to be applied later (in elf32_arm_write_section). */
12870 exidx_arm_data
->u
.exidx
.unwind_edit_list
= unwind_edit_head
;
12871 exidx_arm_data
->u
.exidx
.unwind_edit_tail
= unwind_edit_tail
;
12873 if (deleted_exidx_bytes
> 0)
12874 adjust_exidx_size(exidx_sec
, -deleted_exidx_bytes
);
12876 last_exidx_sec
= exidx_sec
;
12877 last_text_sec
= sec
;
12880 /* Add terminating CANTUNWIND entry. */
12881 if (!bfd_link_relocatable (info
) && last_exidx_sec
12882 && last_unwind_type
!= 0)
12883 insert_cantunwind_after(last_text_sec
, last_exidx_sec
);
12889 elf32_arm_output_glue_section (struct bfd_link_info
*info
, bfd
*obfd
,
12890 bfd
*ibfd
, const char *name
)
12892 asection
*sec
, *osec
;
12894 sec
= bfd_get_linker_section (ibfd
, name
);
12895 if (sec
== NULL
|| (sec
->flags
& SEC_EXCLUDE
) != 0)
12898 osec
= sec
->output_section
;
12899 if (elf32_arm_write_section (obfd
, info
, sec
, sec
->contents
))
12902 if (! bfd_set_section_contents (obfd
, osec
, sec
->contents
,
12903 sec
->output_offset
, sec
->size
))
12910 elf32_arm_final_link (bfd
*abfd
, struct bfd_link_info
*info
)
12912 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (info
);
12913 asection
*sec
, *osec
;
12915 if (globals
== NULL
)
12918 /* Invoke the regular ELF backend linker to do all the work. */
12919 if (!bfd_elf_final_link (abfd
, info
))
12922 /* Process stub sections (eg BE8 encoding, ...). */
12923 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
12925 for (i
=0; i
<htab
->top_id
; i
++)
12927 sec
= htab
->stub_group
[i
].stub_sec
;
12928 /* Only process it once, in its link_sec slot. */
12929 if (sec
&& i
== htab
->stub_group
[i
].link_sec
->id
)
12931 osec
= sec
->output_section
;
12932 elf32_arm_write_section (abfd
, info
, sec
, sec
->contents
);
12933 if (! bfd_set_section_contents (abfd
, osec
, sec
->contents
,
12934 sec
->output_offset
, sec
->size
))
12939 /* Write out any glue sections now that we have created all the
12941 if (globals
->bfd_of_glue_owner
!= NULL
)
12943 if (! elf32_arm_output_glue_section (info
, abfd
,
12944 globals
->bfd_of_glue_owner
,
12945 ARM2THUMB_GLUE_SECTION_NAME
))
12948 if (! elf32_arm_output_glue_section (info
, abfd
,
12949 globals
->bfd_of_glue_owner
,
12950 THUMB2ARM_GLUE_SECTION_NAME
))
12953 if (! elf32_arm_output_glue_section (info
, abfd
,
12954 globals
->bfd_of_glue_owner
,
12955 VFP11_ERRATUM_VENEER_SECTION_NAME
))
12958 if (! elf32_arm_output_glue_section (info
, abfd
,
12959 globals
->bfd_of_glue_owner
,
12960 STM32L4XX_ERRATUM_VENEER_SECTION_NAME
))
12963 if (! elf32_arm_output_glue_section (info
, abfd
,
12964 globals
->bfd_of_glue_owner
,
12965 ARM_BX_GLUE_SECTION_NAME
))
12972 /* Return a best guess for the machine number based on the attributes. */
12974 static unsigned int
12975 bfd_arm_get_mach_from_attributes (bfd
* abfd
)
12977 int arch
= bfd_elf_get_obj_attr_int (abfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
12981 case TAG_CPU_ARCH_V4
: return bfd_mach_arm_4
;
12982 case TAG_CPU_ARCH_V4T
: return bfd_mach_arm_4T
;
12983 case TAG_CPU_ARCH_V5T
: return bfd_mach_arm_5T
;
12985 case TAG_CPU_ARCH_V5TE
:
12989 BFD_ASSERT (Tag_CPU_name
< NUM_KNOWN_OBJ_ATTRIBUTES
);
12990 name
= elf_known_obj_attributes (abfd
) [OBJ_ATTR_PROC
][Tag_CPU_name
].s
;
12994 if (strcmp (name
, "IWMMXT2") == 0)
12995 return bfd_mach_arm_iWMMXt2
;
12997 if (strcmp (name
, "IWMMXT") == 0)
12998 return bfd_mach_arm_iWMMXt
;
13000 if (strcmp (name
, "XSCALE") == 0)
13004 BFD_ASSERT (Tag_WMMX_arch
< NUM_KNOWN_OBJ_ATTRIBUTES
);
13005 wmmx
= elf_known_obj_attributes (abfd
) [OBJ_ATTR_PROC
][Tag_WMMX_arch
].i
;
13008 case 1: return bfd_mach_arm_iWMMXt
;
13009 case 2: return bfd_mach_arm_iWMMXt2
;
13010 default: return bfd_mach_arm_XScale
;
13015 return bfd_mach_arm_5TE
;
13019 return bfd_mach_arm_unknown
;
13023 /* Set the right machine number. */
13026 elf32_arm_object_p (bfd
*abfd
)
13030 mach
= bfd_arm_get_mach_from_notes (abfd
, ARM_NOTE_SECTION
);
13032 if (mach
== bfd_mach_arm_unknown
)
13034 if (elf_elfheader (abfd
)->e_flags
& EF_ARM_MAVERICK_FLOAT
)
13035 mach
= bfd_mach_arm_ep9312
;
13037 mach
= bfd_arm_get_mach_from_attributes (abfd
);
13040 bfd_default_set_arch_mach (abfd
, bfd_arch_arm
, mach
);
13044 /* Function to keep ARM specific flags in the ELF header. */
13047 elf32_arm_set_private_flags (bfd
*abfd
, flagword flags
)
13049 if (elf_flags_init (abfd
)
13050 && elf_elfheader (abfd
)->e_flags
!= flags
)
13052 if (EF_ARM_EABI_VERSION (flags
) == EF_ARM_EABI_UNKNOWN
)
13054 if (flags
& EF_ARM_INTERWORK
)
13056 (_("warning: not setting interworking flag of %pB since it has already been specified as non-interworking"),
13060 (_("warning: clearing the interworking flag of %pB due to outside request"),
13066 elf_elfheader (abfd
)->e_flags
= flags
;
13067 elf_flags_init (abfd
) = TRUE
;
13073 /* Copy backend specific data from one object module to another. */
13076 elf32_arm_copy_private_bfd_data (bfd
*ibfd
, bfd
*obfd
)
13079 flagword out_flags
;
13081 if (! is_arm_elf (ibfd
) || ! is_arm_elf (obfd
))
13084 in_flags
= elf_elfheader (ibfd
)->e_flags
;
13085 out_flags
= elf_elfheader (obfd
)->e_flags
;
13087 if (elf_flags_init (obfd
)
13088 && EF_ARM_EABI_VERSION (out_flags
) == EF_ARM_EABI_UNKNOWN
13089 && in_flags
!= out_flags
)
13091 /* Cannot mix APCS26 and APCS32 code. */
13092 if ((in_flags
& EF_ARM_APCS_26
) != (out_flags
& EF_ARM_APCS_26
))
13095 /* Cannot mix float APCS and non-float APCS code. */
13096 if ((in_flags
& EF_ARM_APCS_FLOAT
) != (out_flags
& EF_ARM_APCS_FLOAT
))
13099 /* If the src and dest have different interworking flags
13100 then turn off the interworking bit. */
13101 if ((in_flags
& EF_ARM_INTERWORK
) != (out_flags
& EF_ARM_INTERWORK
))
13103 if (out_flags
& EF_ARM_INTERWORK
)
13105 (_("warning: clearing the interworking flag of %pB because non-interworking code in %pB has been linked with it"),
13108 in_flags
&= ~EF_ARM_INTERWORK
;
13111 /* Likewise for PIC, though don't warn for this case. */
13112 if ((in_flags
& EF_ARM_PIC
) != (out_flags
& EF_ARM_PIC
))
13113 in_flags
&= ~EF_ARM_PIC
;
13116 elf_elfheader (obfd
)->e_flags
= in_flags
;
13117 elf_flags_init (obfd
) = TRUE
;
13119 return _bfd_elf_copy_private_bfd_data (ibfd
, obfd
);
13122 /* Values for Tag_ABI_PCS_R9_use. */
13131 /* Values for Tag_ABI_PCS_RW_data. */
13134 AEABI_PCS_RW_data_absolute
,
13135 AEABI_PCS_RW_data_PCrel
,
13136 AEABI_PCS_RW_data_SBrel
,
13137 AEABI_PCS_RW_data_unused
13140 /* Values for Tag_ABI_enum_size. */
13146 AEABI_enum_forced_wide
13149 /* Determine whether an object attribute tag takes an integer, a
13153 elf32_arm_obj_attrs_arg_type (int tag
)
13155 if (tag
== Tag_compatibility
)
13156 return ATTR_TYPE_FLAG_INT_VAL
| ATTR_TYPE_FLAG_STR_VAL
;
13157 else if (tag
== Tag_nodefaults
)
13158 return ATTR_TYPE_FLAG_INT_VAL
| ATTR_TYPE_FLAG_NO_DEFAULT
;
13159 else if (tag
== Tag_CPU_raw_name
|| tag
== Tag_CPU_name
)
13160 return ATTR_TYPE_FLAG_STR_VAL
;
13162 return ATTR_TYPE_FLAG_INT_VAL
;
13164 return (tag
& 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL
: ATTR_TYPE_FLAG_INT_VAL
;
13167 /* The ABI defines that Tag_conformance should be emitted first, and that
13168 Tag_nodefaults should be second (if either is defined). This sets those
13169 two positions, and bumps up the position of all the remaining tags to
13172 elf32_arm_obj_attrs_order (int num
)
13174 if (num
== LEAST_KNOWN_OBJ_ATTRIBUTE
)
13175 return Tag_conformance
;
13176 if (num
== LEAST_KNOWN_OBJ_ATTRIBUTE
+ 1)
13177 return Tag_nodefaults
;
13178 if ((num
- 2) < Tag_nodefaults
)
13180 if ((num
- 1) < Tag_conformance
)
13185 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
13187 elf32_arm_obj_attrs_handle_unknown (bfd
*abfd
, int tag
)
13189 if ((tag
& 127) < 64)
13192 (_("%pB: unknown mandatory EABI object attribute %d"),
13194 bfd_set_error (bfd_error_bad_value
);
13200 (_("warning: %pB: unknown EABI object attribute %d"),
13206 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
13207 Returns -1 if no architecture could be read. */
13210 get_secondary_compatible_arch (bfd
*abfd
)
13212 obj_attribute
*attr
=
13213 &elf_known_obj_attributes_proc (abfd
)[Tag_also_compatible_with
];
13215 /* Note: the tag and its argument below are uleb128 values, though
13216 currently-defined values fit in one byte for each. */
13218 && attr
->s
[0] == Tag_CPU_arch
13219 && (attr
->s
[1] & 128) != 128
13220 && attr
->s
[2] == 0)
13223 /* This tag is "safely ignorable", so don't complain if it looks funny. */
13227 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
13228 The tag is removed if ARCH is -1. */
13231 set_secondary_compatible_arch (bfd
*abfd
, int arch
)
13233 obj_attribute
*attr
=
13234 &elf_known_obj_attributes_proc (abfd
)[Tag_also_compatible_with
];
13242 /* Note: the tag and its argument below are uleb128 values, though
13243 currently-defined values fit in one byte for each. */
13245 attr
->s
= (char *) bfd_alloc (abfd
, 3);
13246 attr
->s
[0] = Tag_CPU_arch
;
13251 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
13255 tag_cpu_arch_combine (bfd
*ibfd
, int oldtag
, int *secondary_compat_out
,
13256 int newtag
, int secondary_compat
)
13258 #define T(X) TAG_CPU_ARCH_##X
13259 int tagl
, tagh
, result
;
13262 T(V6T2
), /* PRE_V4. */
13264 T(V6T2
), /* V4T. */
13265 T(V6T2
), /* V5T. */
13266 T(V6T2
), /* V5TE. */
13267 T(V6T2
), /* V5TEJ. */
13270 T(V6T2
) /* V6T2. */
13274 T(V6K
), /* PRE_V4. */
13278 T(V6K
), /* V5TE. */
13279 T(V6K
), /* V5TEJ. */
13281 T(V6KZ
), /* V6KZ. */
13287 T(V7
), /* PRE_V4. */
13292 T(V7
), /* V5TEJ. */
13305 T(V6K
), /* V5TE. */
13306 T(V6K
), /* V5TEJ. */
13308 T(V6KZ
), /* V6KZ. */
13312 T(V6_M
) /* V6_M. */
13314 const int v6s_m
[] =
13320 T(V6K
), /* V5TE. */
13321 T(V6K
), /* V5TEJ. */
13323 T(V6KZ
), /* V6KZ. */
13327 T(V6S_M
), /* V6_M. */
13328 T(V6S_M
) /* V6S_M. */
13330 const int v7e_m
[] =
13334 T(V7E_M
), /* V4T. */
13335 T(V7E_M
), /* V5T. */
13336 T(V7E_M
), /* V5TE. */
13337 T(V7E_M
), /* V5TEJ. */
13338 T(V7E_M
), /* V6. */
13339 T(V7E_M
), /* V6KZ. */
13340 T(V7E_M
), /* V6T2. */
13341 T(V7E_M
), /* V6K. */
13342 T(V7E_M
), /* V7. */
13343 T(V7E_M
), /* V6_M. */
13344 T(V7E_M
), /* V6S_M. */
13345 T(V7E_M
) /* V7E_M. */
13349 T(V8
), /* PRE_V4. */
13354 T(V8
), /* V5TEJ. */
13361 T(V8
), /* V6S_M. */
13362 T(V8
), /* V7E_M. */
13367 T(V8R
), /* PRE_V4. */
13371 T(V8R
), /* V5TE. */
13372 T(V8R
), /* V5TEJ. */
13374 T(V8R
), /* V6KZ. */
13375 T(V8R
), /* V6T2. */
13378 T(V8R
), /* V6_M. */
13379 T(V8R
), /* V6S_M. */
13380 T(V8R
), /* V7E_M. */
13384 const int v8m_baseline
[] =
13397 T(V8M_BASE
), /* V6_M. */
13398 T(V8M_BASE
), /* V6S_M. */
13402 T(V8M_BASE
) /* V8-M BASELINE. */
13404 const int v8m_mainline
[] =
13416 T(V8M_MAIN
), /* V7. */
13417 T(V8M_MAIN
), /* V6_M. */
13418 T(V8M_MAIN
), /* V6S_M. */
13419 T(V8M_MAIN
), /* V7E_M. */
13422 T(V8M_MAIN
), /* V8-M BASELINE. */
13423 T(V8M_MAIN
) /* V8-M MAINLINE. */
13425 const int v4t_plus_v6_m
[] =
13431 T(V5TE
), /* V5TE. */
13432 T(V5TEJ
), /* V5TEJ. */
13434 T(V6KZ
), /* V6KZ. */
13435 T(V6T2
), /* V6T2. */
13438 T(V6_M
), /* V6_M. */
13439 T(V6S_M
), /* V6S_M. */
13440 T(V7E_M
), /* V7E_M. */
13443 T(V8M_BASE
), /* V8-M BASELINE. */
13444 T(V8M_MAIN
), /* V8-M MAINLINE. */
13445 T(V4T_PLUS_V6_M
) /* V4T plus V6_M. */
13447 const int *comb
[] =
13459 /* Pseudo-architecture. */
13463 /* Check we've not got a higher architecture than we know about. */
13465 if (oldtag
> MAX_TAG_CPU_ARCH
|| newtag
> MAX_TAG_CPU_ARCH
)
13467 _bfd_error_handler (_("error: %pB: unknown CPU architecture"), ibfd
);
13471 /* Override old tag if we have a Tag_also_compatible_with on the output. */
13473 if ((oldtag
== T(V6_M
) && *secondary_compat_out
== T(V4T
))
13474 || (oldtag
== T(V4T
) && *secondary_compat_out
== T(V6_M
)))
13475 oldtag
= T(V4T_PLUS_V6_M
);
13477 /* And override the new tag if we have a Tag_also_compatible_with on the
13480 if ((newtag
== T(V6_M
) && secondary_compat
== T(V4T
))
13481 || (newtag
== T(V4T
) && secondary_compat
== T(V6_M
)))
13482 newtag
= T(V4T_PLUS_V6_M
);
13484 tagl
= (oldtag
< newtag
) ? oldtag
: newtag
;
13485 result
= tagh
= (oldtag
> newtag
) ? oldtag
: newtag
;
13487 /* Architectures before V6KZ add features monotonically. */
13488 if (tagh
<= TAG_CPU_ARCH_V6KZ
)
13491 result
= comb
[tagh
- T(V6T2
)] ? comb
[tagh
- T(V6T2
)][tagl
] : -1;
13493 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
13494 as the canonical version. */
13495 if (result
== T(V4T_PLUS_V6_M
))
13498 *secondary_compat_out
= T(V6_M
);
13501 *secondary_compat_out
= -1;
13505 _bfd_error_handler (_("error: %pB: conflicting CPU architectures %d/%d"),
13506 ibfd
, oldtag
, newtag
);
13514 /* Query attributes object to see if integer divide instructions may be
13515 present in an object. */
13517 elf32_arm_attributes_accept_div (const obj_attribute
*attr
)
13519 int arch
= attr
[Tag_CPU_arch
].i
;
13520 int profile
= attr
[Tag_CPU_arch_profile
].i
;
13522 switch (attr
[Tag_DIV_use
].i
)
13525 /* Integer divide allowed if instruction contained in archetecture. */
13526 if (arch
== TAG_CPU_ARCH_V7
&& (profile
== 'R' || profile
== 'M'))
13528 else if (arch
>= TAG_CPU_ARCH_V7E_M
)
13534 /* Integer divide explicitly prohibited. */
13538 /* Unrecognised case - treat as allowing divide everywhere. */
13540 /* Integer divide allowed in ARM state. */
13545 /* Query attributes object to see if integer divide instructions are
13546 forbidden to be in the object. This is not the inverse of
13547 elf32_arm_attributes_accept_div. */
13549 elf32_arm_attributes_forbid_div (const obj_attribute
*attr
)
13551 return attr
[Tag_DIV_use
].i
== 1;
13554 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
13555 are conflicting attributes. */
13558 elf32_arm_merge_eabi_attributes (bfd
*ibfd
, struct bfd_link_info
*info
)
13560 bfd
*obfd
= info
->output_bfd
;
13561 obj_attribute
*in_attr
;
13562 obj_attribute
*out_attr
;
13563 /* Some tags have 0 = don't care, 1 = strong requirement,
13564 2 = weak requirement. */
13565 static const int order_021
[3] = {0, 2, 1};
13567 bfd_boolean result
= TRUE
;
13568 const char *sec_name
= get_elf_backend_data (ibfd
)->obj_attrs_section
;
13570 /* Skip the linker stubs file. This preserves previous behavior
13571 of accepting unknown attributes in the first input file - but
13573 if (ibfd
->flags
& BFD_LINKER_CREATED
)
13576 /* Skip any input that hasn't attribute section.
13577 This enables to link object files without attribute section with
13579 if (bfd_get_section_by_name (ibfd
, sec_name
) == NULL
)
13582 if (!elf_known_obj_attributes_proc (obfd
)[0].i
)
13584 /* This is the first object. Copy the attributes. */
13585 _bfd_elf_copy_obj_attributes (ibfd
, obfd
);
13587 out_attr
= elf_known_obj_attributes_proc (obfd
);
13589 /* Use the Tag_null value to indicate the attributes have been
13593 /* We do not output objects with Tag_MPextension_use_legacy - we move
13594 the attribute's value to Tag_MPextension_use. */
13595 if (out_attr
[Tag_MPextension_use_legacy
].i
!= 0)
13597 if (out_attr
[Tag_MPextension_use
].i
!= 0
13598 && out_attr
[Tag_MPextension_use_legacy
].i
13599 != out_attr
[Tag_MPextension_use
].i
)
13602 (_("Error: %pB has both the current and legacy "
13603 "Tag_MPextension_use attributes"), ibfd
);
13607 out_attr
[Tag_MPextension_use
] =
13608 out_attr
[Tag_MPextension_use_legacy
];
13609 out_attr
[Tag_MPextension_use_legacy
].type
= 0;
13610 out_attr
[Tag_MPextension_use_legacy
].i
= 0;
13616 in_attr
= elf_known_obj_attributes_proc (ibfd
);
13617 out_attr
= elf_known_obj_attributes_proc (obfd
);
13618 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
13619 if (in_attr
[Tag_ABI_VFP_args
].i
!= out_attr
[Tag_ABI_VFP_args
].i
)
13621 /* Ignore mismatches if the object doesn't use floating point or is
13622 floating point ABI independent. */
13623 if (out_attr
[Tag_ABI_FP_number_model
].i
== AEABI_FP_number_model_none
13624 || (in_attr
[Tag_ABI_FP_number_model
].i
!= AEABI_FP_number_model_none
13625 && out_attr
[Tag_ABI_VFP_args
].i
== AEABI_VFP_args_compatible
))
13626 out_attr
[Tag_ABI_VFP_args
].i
= in_attr
[Tag_ABI_VFP_args
].i
;
13627 else if (in_attr
[Tag_ABI_FP_number_model
].i
!= AEABI_FP_number_model_none
13628 && in_attr
[Tag_ABI_VFP_args
].i
!= AEABI_VFP_args_compatible
)
13631 (_("error: %pB uses VFP register arguments, %pB does not"),
13632 in_attr
[Tag_ABI_VFP_args
].i
? ibfd
: obfd
,
13633 in_attr
[Tag_ABI_VFP_args
].i
? obfd
: ibfd
);
13638 for (i
= LEAST_KNOWN_OBJ_ATTRIBUTE
; i
< NUM_KNOWN_OBJ_ATTRIBUTES
; i
++)
13640 /* Merge this attribute with existing attributes. */
13643 case Tag_CPU_raw_name
:
13645 /* These are merged after Tag_CPU_arch. */
13648 case Tag_ABI_optimization_goals
:
13649 case Tag_ABI_FP_optimization_goals
:
13650 /* Use the first value seen. */
13655 int secondary_compat
= -1, secondary_compat_out
= -1;
13656 unsigned int saved_out_attr
= out_attr
[i
].i
;
13658 static const char *name_table
[] =
13660 /* These aren't real CPU names, but we can't guess
13661 that from the architecture version alone. */
13677 "ARM v8-M.baseline",
13678 "ARM v8-M.mainline",
13681 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
13682 secondary_compat
= get_secondary_compatible_arch (ibfd
);
13683 secondary_compat_out
= get_secondary_compatible_arch (obfd
);
13684 arch_attr
= tag_cpu_arch_combine (ibfd
, out_attr
[i
].i
,
13685 &secondary_compat_out
,
13689 /* Return with error if failed to merge. */
13690 if (arch_attr
== -1)
13693 out_attr
[i
].i
= arch_attr
;
13695 set_secondary_compatible_arch (obfd
, secondary_compat_out
);
13697 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
13698 if (out_attr
[i
].i
== saved_out_attr
)
13699 ; /* Leave the names alone. */
13700 else if (out_attr
[i
].i
== in_attr
[i
].i
)
13702 /* The output architecture has been changed to match the
13703 input architecture. Use the input names. */
13704 out_attr
[Tag_CPU_name
].s
= in_attr
[Tag_CPU_name
].s
13705 ? _bfd_elf_attr_strdup (obfd
, in_attr
[Tag_CPU_name
].s
)
13707 out_attr
[Tag_CPU_raw_name
].s
= in_attr
[Tag_CPU_raw_name
].s
13708 ? _bfd_elf_attr_strdup (obfd
, in_attr
[Tag_CPU_raw_name
].s
)
13713 out_attr
[Tag_CPU_name
].s
= NULL
;
13714 out_attr
[Tag_CPU_raw_name
].s
= NULL
;
13717 /* If we still don't have a value for Tag_CPU_name,
13718 make one up now. Tag_CPU_raw_name remains blank. */
13719 if (out_attr
[Tag_CPU_name
].s
== NULL
13720 && out_attr
[i
].i
< ARRAY_SIZE (name_table
))
13721 out_attr
[Tag_CPU_name
].s
=
13722 _bfd_elf_attr_strdup (obfd
, name_table
[out_attr
[i
].i
]);
13726 case Tag_ARM_ISA_use
:
13727 case Tag_THUMB_ISA_use
:
13728 case Tag_WMMX_arch
:
13729 case Tag_Advanced_SIMD_arch
:
13730 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
13731 case Tag_ABI_FP_rounding
:
13732 case Tag_ABI_FP_exceptions
:
13733 case Tag_ABI_FP_user_exceptions
:
13734 case Tag_ABI_FP_number_model
:
13735 case Tag_FP_HP_extension
:
13736 case Tag_CPU_unaligned_access
:
13738 case Tag_MPextension_use
:
13739 /* Use the largest value specified. */
13740 if (in_attr
[i
].i
> out_attr
[i
].i
)
13741 out_attr
[i
].i
= in_attr
[i
].i
;
13744 case Tag_ABI_align_preserved
:
13745 case Tag_ABI_PCS_RO_data
:
13746 /* Use the smallest value specified. */
13747 if (in_attr
[i
].i
< out_attr
[i
].i
)
13748 out_attr
[i
].i
= in_attr
[i
].i
;
13751 case Tag_ABI_align_needed
:
13752 if ((in_attr
[i
].i
> 0 || out_attr
[i
].i
> 0)
13753 && (in_attr
[Tag_ABI_align_preserved
].i
== 0
13754 || out_attr
[Tag_ABI_align_preserved
].i
== 0))
13756 /* This error message should be enabled once all non-conformant
13757 binaries in the toolchain have had the attributes set
13760 (_("error: %pB: 8-byte data alignment conflicts with %pB"),
13764 /* Fall through. */
13765 case Tag_ABI_FP_denormal
:
13766 case Tag_ABI_PCS_GOT_use
:
13767 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
13768 value if greater than 2 (for future-proofing). */
13769 if ((in_attr
[i
].i
> 2 && in_attr
[i
].i
> out_attr
[i
].i
)
13770 || (in_attr
[i
].i
<= 2 && out_attr
[i
].i
<= 2
13771 && order_021
[in_attr
[i
].i
] > order_021
[out_attr
[i
].i
]))
13772 out_attr
[i
].i
= in_attr
[i
].i
;
13775 case Tag_Virtualization_use
:
13776 /* The virtualization tag effectively stores two bits of
13777 information: the intended use of TrustZone (in bit 0), and the
13778 intended use of Virtualization (in bit 1). */
13779 if (out_attr
[i
].i
== 0)
13780 out_attr
[i
].i
= in_attr
[i
].i
;
13781 else if (in_attr
[i
].i
!= 0
13782 && in_attr
[i
].i
!= out_attr
[i
].i
)
13784 if (in_attr
[i
].i
<= 3 && out_attr
[i
].i
<= 3)
13789 (_("error: %pB: unable to merge virtualization attributes "
13797 case Tag_CPU_arch_profile
:
13798 if (out_attr
[i
].i
!= in_attr
[i
].i
)
13800 /* 0 will merge with anything.
13801 'A' and 'S' merge to 'A'.
13802 'R' and 'S' merge to 'R'.
13803 'M' and 'A|R|S' is an error. */
13804 if (out_attr
[i
].i
== 0
13805 || (out_attr
[i
].i
== 'S'
13806 && (in_attr
[i
].i
== 'A' || in_attr
[i
].i
== 'R')))
13807 out_attr
[i
].i
= in_attr
[i
].i
;
13808 else if (in_attr
[i
].i
== 0
13809 || (in_attr
[i
].i
== 'S'
13810 && (out_attr
[i
].i
== 'A' || out_attr
[i
].i
== 'R')))
13811 ; /* Do nothing. */
13815 (_("error: %pB: conflicting architecture profiles %c/%c"),
13817 in_attr
[i
].i
? in_attr
[i
].i
: '0',
13818 out_attr
[i
].i
? out_attr
[i
].i
: '0');
13824 case Tag_DSP_extension
:
13825 /* No need to change output value if any of:
13826 - pre (<=) ARMv5T input architecture (do not have DSP)
13827 - M input profile not ARMv7E-M and do not have DSP. */
13828 if (in_attr
[Tag_CPU_arch
].i
<= 3
13829 || (in_attr
[Tag_CPU_arch_profile
].i
== 'M'
13830 && in_attr
[Tag_CPU_arch
].i
!= 13
13831 && in_attr
[i
].i
== 0))
13832 ; /* Do nothing. */
13833 /* Output value should be 0 if DSP part of architecture, ie.
13834 - post (>=) ARMv5te architecture output
13835 - A, R or S profile output or ARMv7E-M output architecture. */
13836 else if (out_attr
[Tag_CPU_arch
].i
>= 4
13837 && (out_attr
[Tag_CPU_arch_profile
].i
== 'A'
13838 || out_attr
[Tag_CPU_arch_profile
].i
== 'R'
13839 || out_attr
[Tag_CPU_arch_profile
].i
== 'S'
13840 || out_attr
[Tag_CPU_arch
].i
== 13))
13842 /* Otherwise, DSP instructions are added and not part of output
13850 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
13851 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
13852 when it's 0. It might mean absence of FP hardware if
13853 Tag_FP_arch is zero. */
13855 #define VFP_VERSION_COUNT 9
13856 static const struct
13860 } vfp_versions
[VFP_VERSION_COUNT
] =
13876 /* If the output has no requirement about FP hardware,
13877 follow the requirement of the input. */
13878 if (out_attr
[i
].i
== 0)
13880 /* This assert is still reasonable, we shouldn't
13881 produce the suspicious build attribute
13882 combination (See below for in_attr). */
13883 BFD_ASSERT (out_attr
[Tag_ABI_HardFP_use
].i
== 0);
13884 out_attr
[i
].i
= in_attr
[i
].i
;
13885 out_attr
[Tag_ABI_HardFP_use
].i
13886 = in_attr
[Tag_ABI_HardFP_use
].i
;
13889 /* If the input has no requirement about FP hardware, do
13891 else if (in_attr
[i
].i
== 0)
13893 /* We used to assert that Tag_ABI_HardFP_use was
13894 zero here, but we should never assert when
13895 consuming an object file that has suspicious
13896 build attributes. The single precision variant
13897 of 'no FP architecture' is still 'no FP
13898 architecture', so we just ignore the tag in this
13903 /* Both the input and the output have nonzero Tag_FP_arch.
13904 So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */
13906 /* If both the input and the output have zero Tag_ABI_HardFP_use,
13908 if (in_attr
[Tag_ABI_HardFP_use
].i
== 0
13909 && out_attr
[Tag_ABI_HardFP_use
].i
== 0)
13911 /* If the input and the output have different Tag_ABI_HardFP_use,
13912 the combination of them is 0 (implied by Tag_FP_arch). */
13913 else if (in_attr
[Tag_ABI_HardFP_use
].i
13914 != out_attr
[Tag_ABI_HardFP_use
].i
)
13915 out_attr
[Tag_ABI_HardFP_use
].i
= 0;
13917 /* Now we can handle Tag_FP_arch. */
13919 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
13920 pick the biggest. */
13921 if (in_attr
[i
].i
>= VFP_VERSION_COUNT
13922 && in_attr
[i
].i
> out_attr
[i
].i
)
13924 out_attr
[i
] = in_attr
[i
];
13927 /* The output uses the superset of input features
13928 (ISA version) and registers. */
13929 ver
= vfp_versions
[in_attr
[i
].i
].ver
;
13930 if (ver
< vfp_versions
[out_attr
[i
].i
].ver
)
13931 ver
= vfp_versions
[out_attr
[i
].i
].ver
;
13932 regs
= vfp_versions
[in_attr
[i
].i
].regs
;
13933 if (regs
< vfp_versions
[out_attr
[i
].i
].regs
)
13934 regs
= vfp_versions
[out_attr
[i
].i
].regs
;
13935 /* This assumes all possible supersets are also a valid
13937 for (newval
= VFP_VERSION_COUNT
- 1; newval
> 0; newval
--)
13939 if (regs
== vfp_versions
[newval
].regs
13940 && ver
== vfp_versions
[newval
].ver
)
13943 out_attr
[i
].i
= newval
;
13946 case Tag_PCS_config
:
13947 if (out_attr
[i
].i
== 0)
13948 out_attr
[i
].i
= in_attr
[i
].i
;
13949 else if (in_attr
[i
].i
!= 0 && out_attr
[i
].i
!= in_attr
[i
].i
)
13951 /* It's sometimes ok to mix different configs, so this is only
13954 (_("warning: %pB: conflicting platform configuration"), ibfd
);
13957 case Tag_ABI_PCS_R9_use
:
13958 if (in_attr
[i
].i
!= out_attr
[i
].i
13959 && out_attr
[i
].i
!= AEABI_R9_unused
13960 && in_attr
[i
].i
!= AEABI_R9_unused
)
13963 (_("error: %pB: conflicting use of R9"), ibfd
);
13966 if (out_attr
[i
].i
== AEABI_R9_unused
)
13967 out_attr
[i
].i
= in_attr
[i
].i
;
13969 case Tag_ABI_PCS_RW_data
:
13970 if (in_attr
[i
].i
== AEABI_PCS_RW_data_SBrel
13971 && out_attr
[Tag_ABI_PCS_R9_use
].i
!= AEABI_R9_SB
13972 && out_attr
[Tag_ABI_PCS_R9_use
].i
!= AEABI_R9_unused
)
13975 (_("error: %pB: SB relative addressing conflicts with use of R9"),
13979 /* Use the smallest value specified. */
13980 if (in_attr
[i
].i
< out_attr
[i
].i
)
13981 out_attr
[i
].i
= in_attr
[i
].i
;
13983 case Tag_ABI_PCS_wchar_t
:
13984 if (out_attr
[i
].i
&& in_attr
[i
].i
&& out_attr
[i
].i
!= in_attr
[i
].i
13985 && !elf_arm_tdata (obfd
)->no_wchar_size_warning
)
13988 (_("warning: %pB uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
13989 ibfd
, in_attr
[i
].i
, out_attr
[i
].i
);
13991 else if (in_attr
[i
].i
&& !out_attr
[i
].i
)
13992 out_attr
[i
].i
= in_attr
[i
].i
;
13994 case Tag_ABI_enum_size
:
13995 if (in_attr
[i
].i
!= AEABI_enum_unused
)
13997 if (out_attr
[i
].i
== AEABI_enum_unused
13998 || out_attr
[i
].i
== AEABI_enum_forced_wide
)
14000 /* The existing object is compatible with anything.
14001 Use whatever requirements the new object has. */
14002 out_attr
[i
].i
= in_attr
[i
].i
;
14004 else if (in_attr
[i
].i
!= AEABI_enum_forced_wide
14005 && out_attr
[i
].i
!= in_attr
[i
].i
14006 && !elf_arm_tdata (obfd
)->no_enum_size_warning
)
14008 static const char *aeabi_enum_names
[] =
14009 { "", "variable-size", "32-bit", "" };
14010 const char *in_name
=
14011 in_attr
[i
].i
< ARRAY_SIZE(aeabi_enum_names
)
14012 ? aeabi_enum_names
[in_attr
[i
].i
]
14014 const char *out_name
=
14015 out_attr
[i
].i
< ARRAY_SIZE(aeabi_enum_names
)
14016 ? aeabi_enum_names
[out_attr
[i
].i
]
14019 (_("warning: %pB uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
14020 ibfd
, in_name
, out_name
);
14024 case Tag_ABI_VFP_args
:
14027 case Tag_ABI_WMMX_args
:
14028 if (in_attr
[i
].i
!= out_attr
[i
].i
)
14031 (_("error: %pB uses iWMMXt register arguments, %pB does not"),
14036 case Tag_compatibility
:
14037 /* Merged in target-independent code. */
14039 case Tag_ABI_HardFP_use
:
14040 /* This is handled along with Tag_FP_arch. */
14042 case Tag_ABI_FP_16bit_format
:
14043 if (in_attr
[i
].i
!= 0 && out_attr
[i
].i
!= 0)
14045 if (in_attr
[i
].i
!= out_attr
[i
].i
)
14048 (_("error: fp16 format mismatch between %pB and %pB"),
14053 if (in_attr
[i
].i
!= 0)
14054 out_attr
[i
].i
= in_attr
[i
].i
;
14058 /* A value of zero on input means that the divide instruction may
14059 be used if available in the base architecture as specified via
14060 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
14061 the user did not want divide instructions. A value of 2
14062 explicitly means that divide instructions were allowed in ARM
14063 and Thumb state. */
14064 if (in_attr
[i
].i
== out_attr
[i
].i
)
14065 /* Do nothing. */ ;
14066 else if (elf32_arm_attributes_forbid_div (in_attr
)
14067 && !elf32_arm_attributes_accept_div (out_attr
))
14069 else if (elf32_arm_attributes_forbid_div (out_attr
)
14070 && elf32_arm_attributes_accept_div (in_attr
))
14071 out_attr
[i
].i
= in_attr
[i
].i
;
14072 else if (in_attr
[i
].i
== 2)
14073 out_attr
[i
].i
= in_attr
[i
].i
;
14076 case Tag_MPextension_use_legacy
:
14077 /* We don't output objects with Tag_MPextension_use_legacy - we
14078 move the value to Tag_MPextension_use. */
14079 if (in_attr
[i
].i
!= 0 && in_attr
[Tag_MPextension_use
].i
!= 0)
14081 if (in_attr
[Tag_MPextension_use
].i
!= in_attr
[i
].i
)
14084 (_("%pB has both the current and legacy "
14085 "Tag_MPextension_use attributes"),
14091 if (in_attr
[i
].i
> out_attr
[Tag_MPextension_use
].i
)
14092 out_attr
[Tag_MPextension_use
] = in_attr
[i
];
14096 case Tag_nodefaults
:
14097 /* This tag is set if it exists, but the value is unused (and is
14098 typically zero). We don't actually need to do anything here -
14099 the merge happens automatically when the type flags are merged
14102 case Tag_also_compatible_with
:
14103 /* Already done in Tag_CPU_arch. */
14105 case Tag_conformance
:
14106 /* Keep the attribute if it matches. Throw it away otherwise.
14107 No attribute means no claim to conform. */
14108 if (!in_attr
[i
].s
|| !out_attr
[i
].s
14109 || strcmp (in_attr
[i
].s
, out_attr
[i
].s
) != 0)
14110 out_attr
[i
].s
= NULL
;
14115 = result
&& _bfd_elf_merge_unknown_attribute_low (ibfd
, obfd
, i
);
14118 /* If out_attr was copied from in_attr then it won't have a type yet. */
14119 if (in_attr
[i
].type
&& !out_attr
[i
].type
)
14120 out_attr
[i
].type
= in_attr
[i
].type
;
14123 /* Merge Tag_compatibility attributes and any common GNU ones. */
14124 if (!_bfd_elf_merge_object_attributes (ibfd
, info
))
14127 /* Check for any attributes not known on ARM. */
14128 result
&= _bfd_elf_merge_unknown_attribute_list (ibfd
, obfd
);
14134 /* Return TRUE if the two EABI versions are incompatible. */
14137 elf32_arm_versions_compatible (unsigned iver
, unsigned over
)
14139 /* v4 and v5 are the same spec before and after it was released,
14140 so allow mixing them. */
14141 if ((iver
== EF_ARM_EABI_VER4
&& over
== EF_ARM_EABI_VER5
)
14142 || (iver
== EF_ARM_EABI_VER5
&& over
== EF_ARM_EABI_VER4
))
14145 return (iver
== over
);
14148 /* Merge backend specific data from an object file to the output
14149 object file when linking. */
14152 elf32_arm_merge_private_bfd_data (bfd
*, struct bfd_link_info
*);
14154 /* Display the flags field. */
14157 elf32_arm_print_private_bfd_data (bfd
*abfd
, void * ptr
)
14159 FILE * file
= (FILE *) ptr
;
14160 unsigned long flags
;
14162 BFD_ASSERT (abfd
!= NULL
&& ptr
!= NULL
);
14164 /* Print normal ELF private data. */
14165 _bfd_elf_print_private_bfd_data (abfd
, ptr
);
14167 flags
= elf_elfheader (abfd
)->e_flags
;
14168 /* Ignore init flag - it may not be set, despite the flags field
14169 containing valid data. */
14171 fprintf (file
, _("private flags = %lx:"), elf_elfheader (abfd
)->e_flags
);
14173 switch (EF_ARM_EABI_VERSION (flags
))
14175 case EF_ARM_EABI_UNKNOWN
:
14176 /* The following flag bits are GNU extensions and not part of the
14177 official ARM ELF extended ABI. Hence they are only decoded if
14178 the EABI version is not set. */
14179 if (flags
& EF_ARM_INTERWORK
)
14180 fprintf (file
, _(" [interworking enabled]"));
14182 if (flags
& EF_ARM_APCS_26
)
14183 fprintf (file
, " [APCS-26]");
14185 fprintf (file
, " [APCS-32]");
14187 if (flags
& EF_ARM_VFP_FLOAT
)
14188 fprintf (file
, _(" [VFP float format]"));
14189 else if (flags
& EF_ARM_MAVERICK_FLOAT
)
14190 fprintf (file
, _(" [Maverick float format]"));
14192 fprintf (file
, _(" [FPA float format]"));
14194 if (flags
& EF_ARM_APCS_FLOAT
)
14195 fprintf (file
, _(" [floats passed in float registers]"));
14197 if (flags
& EF_ARM_PIC
)
14198 fprintf (file
, _(" [position independent]"));
14200 if (flags
& EF_ARM_NEW_ABI
)
14201 fprintf (file
, _(" [new ABI]"));
14203 if (flags
& EF_ARM_OLD_ABI
)
14204 fprintf (file
, _(" [old ABI]"));
14206 if (flags
& EF_ARM_SOFT_FLOAT
)
14207 fprintf (file
, _(" [software FP]"));
14209 flags
&= ~(EF_ARM_INTERWORK
| EF_ARM_APCS_26
| EF_ARM_APCS_FLOAT
14210 | EF_ARM_PIC
| EF_ARM_NEW_ABI
| EF_ARM_OLD_ABI
14211 | EF_ARM_SOFT_FLOAT
| EF_ARM_VFP_FLOAT
14212 | EF_ARM_MAVERICK_FLOAT
);
14215 case EF_ARM_EABI_VER1
:
14216 fprintf (file
, _(" [Version1 EABI]"));
14218 if (flags
& EF_ARM_SYMSARESORTED
)
14219 fprintf (file
, _(" [sorted symbol table]"));
14221 fprintf (file
, _(" [unsorted symbol table]"));
14223 flags
&= ~ EF_ARM_SYMSARESORTED
;
14226 case EF_ARM_EABI_VER2
:
14227 fprintf (file
, _(" [Version2 EABI]"));
14229 if (flags
& EF_ARM_SYMSARESORTED
)
14230 fprintf (file
, _(" [sorted symbol table]"));
14232 fprintf (file
, _(" [unsorted symbol table]"));
14234 if (flags
& EF_ARM_DYNSYMSUSESEGIDX
)
14235 fprintf (file
, _(" [dynamic symbols use segment index]"));
14237 if (flags
& EF_ARM_MAPSYMSFIRST
)
14238 fprintf (file
, _(" [mapping symbols precede others]"));
14240 flags
&= ~(EF_ARM_SYMSARESORTED
| EF_ARM_DYNSYMSUSESEGIDX
14241 | EF_ARM_MAPSYMSFIRST
);
14244 case EF_ARM_EABI_VER3
:
14245 fprintf (file
, _(" [Version3 EABI]"));
14248 case EF_ARM_EABI_VER4
:
14249 fprintf (file
, _(" [Version4 EABI]"));
14252 case EF_ARM_EABI_VER5
:
14253 fprintf (file
, _(" [Version5 EABI]"));
14255 if (flags
& EF_ARM_ABI_FLOAT_SOFT
)
14256 fprintf (file
, _(" [soft-float ABI]"));
14258 if (flags
& EF_ARM_ABI_FLOAT_HARD
)
14259 fprintf (file
, _(" [hard-float ABI]"));
14261 flags
&= ~(EF_ARM_ABI_FLOAT_SOFT
| EF_ARM_ABI_FLOAT_HARD
);
14264 if (flags
& EF_ARM_BE8
)
14265 fprintf (file
, _(" [BE8]"));
14267 if (flags
& EF_ARM_LE8
)
14268 fprintf (file
, _(" [LE8]"));
14270 flags
&= ~(EF_ARM_LE8
| EF_ARM_BE8
);
14274 fprintf (file
, _(" <EABI version unrecognised>"));
14278 flags
&= ~ EF_ARM_EABIMASK
;
14280 if (flags
& EF_ARM_RELEXEC
)
14281 fprintf (file
, _(" [relocatable executable]"));
14283 flags
&= ~EF_ARM_RELEXEC
;
14286 fprintf (file
, _("<Unrecognised flag bits set>"));
14288 fputc ('\n', file
);
14294 elf32_arm_get_symbol_type (Elf_Internal_Sym
* elf_sym
, int type
)
14296 switch (ELF_ST_TYPE (elf_sym
->st_info
))
14298 case STT_ARM_TFUNC
:
14299 return ELF_ST_TYPE (elf_sym
->st_info
);
14301 case STT_ARM_16BIT
:
14302 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
14303 This allows us to distinguish between data used by Thumb instructions
14304 and non-data (which is probably code) inside Thumb regions of an
14306 if (type
!= STT_OBJECT
&& type
!= STT_TLS
)
14307 return ELF_ST_TYPE (elf_sym
->st_info
);
14318 elf32_arm_gc_mark_hook (asection
*sec
,
14319 struct bfd_link_info
*info
,
14320 Elf_Internal_Rela
*rel
,
14321 struct elf_link_hash_entry
*h
,
14322 Elf_Internal_Sym
*sym
)
14325 switch (ELF32_R_TYPE (rel
->r_info
))
14327 case R_ARM_GNU_VTINHERIT
:
14328 case R_ARM_GNU_VTENTRY
:
14332 return _bfd_elf_gc_mark_hook (sec
, info
, rel
, h
, sym
);
14335 /* Look through the relocs for a section during the first phase. */
14338 elf32_arm_check_relocs (bfd
*abfd
, struct bfd_link_info
*info
,
14339 asection
*sec
, const Elf_Internal_Rela
*relocs
)
14341 Elf_Internal_Shdr
*symtab_hdr
;
14342 struct elf_link_hash_entry
**sym_hashes
;
14343 const Elf_Internal_Rela
*rel
;
14344 const Elf_Internal_Rela
*rel_end
;
14347 struct elf32_arm_link_hash_table
*htab
;
14348 bfd_boolean call_reloc_p
;
14349 bfd_boolean may_become_dynamic_p
;
14350 bfd_boolean may_need_local_target_p
;
14351 unsigned long nsyms
;
14353 if (bfd_link_relocatable (info
))
14356 BFD_ASSERT (is_arm_elf (abfd
));
14358 htab
= elf32_arm_hash_table (info
);
14364 /* Create dynamic sections for relocatable executables so that we can
14365 copy relocations. */
14366 if (htab
->root
.is_relocatable_executable
14367 && ! htab
->root
.dynamic_sections_created
)
14369 if (! _bfd_elf_link_create_dynamic_sections (abfd
, info
))
14373 if (htab
->root
.dynobj
== NULL
)
14374 htab
->root
.dynobj
= abfd
;
14375 if (!create_ifunc_sections (info
))
14378 dynobj
= htab
->root
.dynobj
;
14380 symtab_hdr
= & elf_symtab_hdr (abfd
);
14381 sym_hashes
= elf_sym_hashes (abfd
);
14382 nsyms
= NUM_SHDR_ENTRIES (symtab_hdr
);
14384 rel_end
= relocs
+ sec
->reloc_count
;
14385 for (rel
= relocs
; rel
< rel_end
; rel
++)
14387 Elf_Internal_Sym
*isym
;
14388 struct elf_link_hash_entry
*h
;
14389 struct elf32_arm_link_hash_entry
*eh
;
14390 unsigned int r_symndx
;
14393 r_symndx
= ELF32_R_SYM (rel
->r_info
);
14394 r_type
= ELF32_R_TYPE (rel
->r_info
);
14395 r_type
= arm_real_reloc_type (htab
, r_type
);
14397 if (r_symndx
>= nsyms
14398 /* PR 9934: It is possible to have relocations that do not
14399 refer to symbols, thus it is also possible to have an
14400 object file containing relocations but no symbol table. */
14401 && (r_symndx
> STN_UNDEF
|| nsyms
> 0))
14403 _bfd_error_handler (_("%pB: bad symbol index: %d"), abfd
,
14412 if (r_symndx
< symtab_hdr
->sh_info
)
14414 /* A local symbol. */
14415 isym
= bfd_sym_from_r_symndx (&htab
->sym_cache
,
14422 h
= sym_hashes
[r_symndx
- symtab_hdr
->sh_info
];
14423 while (h
->root
.type
== bfd_link_hash_indirect
14424 || h
->root
.type
== bfd_link_hash_warning
)
14425 h
= (struct elf_link_hash_entry
*) h
->root
.u
.i
.link
;
14429 eh
= (struct elf32_arm_link_hash_entry
*) h
;
14431 call_reloc_p
= FALSE
;
14432 may_become_dynamic_p
= FALSE
;
14433 may_need_local_target_p
= FALSE
;
14435 /* Could be done earlier, if h were already available. */
14436 r_type
= elf32_arm_tls_transition (info
, r_type
, h
);
14440 case R_ARM_GOT_PREL
:
14441 case R_ARM_TLS_GD32
:
14442 case R_ARM_TLS_IE32
:
14443 case R_ARM_TLS_GOTDESC
:
14444 case R_ARM_TLS_DESCSEQ
:
14445 case R_ARM_THM_TLS_DESCSEQ
:
14446 case R_ARM_TLS_CALL
:
14447 case R_ARM_THM_TLS_CALL
:
14448 /* This symbol requires a global offset table entry. */
14450 int tls_type
, old_tls_type
;
14454 case R_ARM_TLS_GD32
: tls_type
= GOT_TLS_GD
; break;
14456 case R_ARM_TLS_IE32
: tls_type
= GOT_TLS_IE
; break;
14458 case R_ARM_TLS_GOTDESC
:
14459 case R_ARM_TLS_CALL
: case R_ARM_THM_TLS_CALL
:
14460 case R_ARM_TLS_DESCSEQ
: case R_ARM_THM_TLS_DESCSEQ
:
14461 tls_type
= GOT_TLS_GDESC
; break;
14463 default: tls_type
= GOT_NORMAL
; break;
14466 if (!bfd_link_executable (info
) && (tls_type
& GOT_TLS_IE
))
14467 info
->flags
|= DF_STATIC_TLS
;
14472 old_tls_type
= elf32_arm_hash_entry (h
)->tls_type
;
14476 /* This is a global offset table entry for a local symbol. */
14477 if (!elf32_arm_allocate_local_sym_info (abfd
))
14479 elf_local_got_refcounts (abfd
)[r_symndx
] += 1;
14480 old_tls_type
= elf32_arm_local_got_tls_type (abfd
) [r_symndx
];
14483 /* If a variable is accessed with both tls methods, two
14484 slots may be created. */
14485 if (GOT_TLS_GD_ANY_P (old_tls_type
)
14486 && GOT_TLS_GD_ANY_P (tls_type
))
14487 tls_type
|= old_tls_type
;
14489 /* We will already have issued an error message if there
14490 is a TLS/non-TLS mismatch, based on the symbol
14491 type. So just combine any TLS types needed. */
14492 if (old_tls_type
!= GOT_UNKNOWN
&& old_tls_type
!= GOT_NORMAL
14493 && tls_type
!= GOT_NORMAL
)
14494 tls_type
|= old_tls_type
;
14496 /* If the symbol is accessed in both IE and GDESC
14497 method, we're able to relax. Turn off the GDESC flag,
14498 without messing up with any other kind of tls types
14499 that may be involved. */
14500 if ((tls_type
& GOT_TLS_IE
) && (tls_type
& GOT_TLS_GDESC
))
14501 tls_type
&= ~GOT_TLS_GDESC
;
14503 if (old_tls_type
!= tls_type
)
14506 elf32_arm_hash_entry (h
)->tls_type
= tls_type
;
14508 elf32_arm_local_got_tls_type (abfd
) [r_symndx
] = tls_type
;
14511 /* Fall through. */
14513 case R_ARM_TLS_LDM32
:
14514 if (r_type
== R_ARM_TLS_LDM32
)
14515 htab
->tls_ldm_got
.refcount
++;
14516 /* Fall through. */
14518 case R_ARM_GOTOFF32
:
14520 if (htab
->root
.sgot
== NULL
14521 && !create_got_section (htab
->root
.dynobj
, info
))
14530 case R_ARM_THM_CALL
:
14531 case R_ARM_THM_JUMP24
:
14532 case R_ARM_THM_JUMP19
:
14533 call_reloc_p
= TRUE
;
14534 may_need_local_target_p
= TRUE
;
14538 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
14539 ldr __GOTT_INDEX__ offsets. */
14540 if (!htab
->vxworks_p
)
14542 may_need_local_target_p
= TRUE
;
14545 else goto jump_over
;
14547 /* Fall through. */
14549 case R_ARM_MOVW_ABS_NC
:
14550 case R_ARM_MOVT_ABS
:
14551 case R_ARM_THM_MOVW_ABS_NC
:
14552 case R_ARM_THM_MOVT_ABS
:
14553 if (bfd_link_pic (info
))
14556 (_("%pB: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
14557 abfd
, elf32_arm_howto_table_1
[r_type
].name
,
14558 (h
) ? h
->root
.root
.string
: "a local symbol");
14559 bfd_set_error (bfd_error_bad_value
);
14563 /* Fall through. */
14565 case R_ARM_ABS32_NOI
:
14567 if (h
!= NULL
&& bfd_link_executable (info
))
14569 h
->pointer_equality_needed
= 1;
14571 /* Fall through. */
14573 case R_ARM_REL32_NOI
:
14574 case R_ARM_MOVW_PREL_NC
:
14575 case R_ARM_MOVT_PREL
:
14576 case R_ARM_THM_MOVW_PREL_NC
:
14577 case R_ARM_THM_MOVT_PREL
:
14579 /* Should the interworking branches be listed here? */
14580 if ((bfd_link_pic (info
) || htab
->root
.is_relocatable_executable
)
14581 && (sec
->flags
& SEC_ALLOC
) != 0)
14584 && elf32_arm_howto_from_type (r_type
)->pc_relative
)
14586 /* In shared libraries and relocatable executables,
14587 we treat local relative references as calls;
14588 see the related SYMBOL_CALLS_LOCAL code in
14589 allocate_dynrelocs. */
14590 call_reloc_p
= TRUE
;
14591 may_need_local_target_p
= TRUE
;
14594 /* We are creating a shared library or relocatable
14595 executable, and this is a reloc against a global symbol,
14596 or a non-PC-relative reloc against a local symbol.
14597 We may need to copy the reloc into the output. */
14598 may_become_dynamic_p
= TRUE
;
14601 may_need_local_target_p
= TRUE
;
14604 /* This relocation describes the C++ object vtable hierarchy.
14605 Reconstruct it for later use during GC. */
14606 case R_ARM_GNU_VTINHERIT
:
14607 if (!bfd_elf_gc_record_vtinherit (abfd
, sec
, h
, rel
->r_offset
))
14611 /* This relocation describes which C++ vtable entries are actually
14612 used. Record for later use during GC. */
14613 case R_ARM_GNU_VTENTRY
:
14614 BFD_ASSERT (h
!= NULL
);
14616 && !bfd_elf_gc_record_vtentry (abfd
, sec
, h
, rel
->r_offset
))
14624 /* We may need a .plt entry if the function this reloc
14625 refers to is in a different object, regardless of the
14626 symbol's type. We can't tell for sure yet, because
14627 something later might force the symbol local. */
14629 else if (may_need_local_target_p
)
14630 /* If this reloc is in a read-only section, we might
14631 need a copy reloc. We can't check reliably at this
14632 stage whether the section is read-only, as input
14633 sections have not yet been mapped to output sections.
14634 Tentatively set the flag for now, and correct in
14635 adjust_dynamic_symbol. */
14636 h
->non_got_ref
= 1;
14639 if (may_need_local_target_p
14640 && (h
!= NULL
|| ELF32_ST_TYPE (isym
->st_info
) == STT_GNU_IFUNC
))
14642 union gotplt_union
*root_plt
;
14643 struct arm_plt_info
*arm_plt
;
14644 struct arm_local_iplt_info
*local_iplt
;
14648 root_plt
= &h
->plt
;
14649 arm_plt
= &eh
->plt
;
14653 local_iplt
= elf32_arm_create_local_iplt (abfd
, r_symndx
);
14654 if (local_iplt
== NULL
)
14656 root_plt
= &local_iplt
->root
;
14657 arm_plt
= &local_iplt
->arm
;
14660 /* If the symbol is a function that doesn't bind locally,
14661 this relocation will need a PLT entry. */
14662 if (root_plt
->refcount
!= -1)
14663 root_plt
->refcount
+= 1;
14666 arm_plt
->noncall_refcount
++;
14668 /* It's too early to use htab->use_blx here, so we have to
14669 record possible blx references separately from
14670 relocs that definitely need a thumb stub. */
14672 if (r_type
== R_ARM_THM_CALL
)
14673 arm_plt
->maybe_thumb_refcount
+= 1;
14675 if (r_type
== R_ARM_THM_JUMP24
14676 || r_type
== R_ARM_THM_JUMP19
)
14677 arm_plt
->thumb_refcount
+= 1;
14680 if (may_become_dynamic_p
)
14682 struct elf_dyn_relocs
*p
, **head
;
14684 /* Create a reloc section in dynobj. */
14685 if (sreloc
== NULL
)
14687 sreloc
= _bfd_elf_make_dynamic_reloc_section
14688 (sec
, dynobj
, 2, abfd
, ! htab
->use_rel
);
14690 if (sreloc
== NULL
)
14693 /* BPABI objects never have dynamic relocations mapped. */
14694 if (htab
->symbian_p
)
14698 flags
= bfd_get_section_flags (dynobj
, sreloc
);
14699 flags
&= ~(SEC_LOAD
| SEC_ALLOC
);
14700 bfd_set_section_flags (dynobj
, sreloc
, flags
);
14704 /* If this is a global symbol, count the number of
14705 relocations we need for this symbol. */
14707 head
= &((struct elf32_arm_link_hash_entry
*) h
)->dyn_relocs
;
14710 head
= elf32_arm_get_local_dynreloc_list (abfd
, r_symndx
, isym
);
14716 if (p
== NULL
|| p
->sec
!= sec
)
14718 bfd_size_type amt
= sizeof *p
;
14720 p
= (struct elf_dyn_relocs
*) bfd_alloc (htab
->root
.dynobj
, amt
);
14730 if (elf32_arm_howto_from_type (r_type
)->pc_relative
)
14740 elf32_arm_update_relocs (asection
*o
,
14741 struct bfd_elf_section_reloc_data
*reldata
)
14743 void (*swap_in
) (bfd
*, const bfd_byte
*, Elf_Internal_Rela
*);
14744 void (*swap_out
) (bfd
*, const Elf_Internal_Rela
*, bfd_byte
*);
14745 const struct elf_backend_data
*bed
;
14746 _arm_elf_section_data
*eado
;
14747 struct bfd_link_order
*p
;
14748 bfd_byte
*erela_head
, *erela
;
14749 Elf_Internal_Rela
*irela_head
, *irela
;
14750 Elf_Internal_Shdr
*rel_hdr
;
14752 unsigned int count
;
14754 eado
= get_arm_elf_section_data (o
);
14756 if (!eado
|| eado
->elf
.this_hdr
.sh_type
!= SHT_ARM_EXIDX
)
14760 bed
= get_elf_backend_data (abfd
);
14761 rel_hdr
= reldata
->hdr
;
14763 if (rel_hdr
->sh_entsize
== bed
->s
->sizeof_rel
)
14765 swap_in
= bed
->s
->swap_reloc_in
;
14766 swap_out
= bed
->s
->swap_reloc_out
;
14768 else if (rel_hdr
->sh_entsize
== bed
->s
->sizeof_rela
)
14770 swap_in
= bed
->s
->swap_reloca_in
;
14771 swap_out
= bed
->s
->swap_reloca_out
;
14776 erela_head
= rel_hdr
->contents
;
14777 irela_head
= (Elf_Internal_Rela
*) bfd_zmalloc
14778 ((NUM_SHDR_ENTRIES (rel_hdr
) + 1) * sizeof (*irela_head
));
14780 erela
= erela_head
;
14781 irela
= irela_head
;
14784 for (p
= o
->map_head
.link_order
; p
; p
= p
->next
)
14786 if (p
->type
== bfd_section_reloc_link_order
14787 || p
->type
== bfd_symbol_reloc_link_order
)
14789 (*swap_in
) (abfd
, erela
, irela
);
14790 erela
+= rel_hdr
->sh_entsize
;
14794 else if (p
->type
== bfd_indirect_link_order
)
14796 struct bfd_elf_section_reloc_data
*input_reldata
;
14797 arm_unwind_table_edit
*edit_list
, *edit_tail
;
14798 _arm_elf_section_data
*eadi
;
14803 i
= p
->u
.indirect
.section
;
14805 eadi
= get_arm_elf_section_data (i
);
14806 edit_list
= eadi
->u
.exidx
.unwind_edit_list
;
14807 edit_tail
= eadi
->u
.exidx
.unwind_edit_tail
;
14808 offset
= o
->vma
+ i
->output_offset
;
14810 if (eadi
->elf
.rel
.hdr
&&
14811 eadi
->elf
.rel
.hdr
->sh_entsize
== rel_hdr
->sh_entsize
)
14812 input_reldata
= &eadi
->elf
.rel
;
14813 else if (eadi
->elf
.rela
.hdr
&&
14814 eadi
->elf
.rela
.hdr
->sh_entsize
== rel_hdr
->sh_entsize
)
14815 input_reldata
= &eadi
->elf
.rela
;
14821 for (j
= 0; j
< NUM_SHDR_ENTRIES (input_reldata
->hdr
); j
++)
14823 arm_unwind_table_edit
*edit_node
, *edit_next
;
14825 bfd_vma reloc_index
;
14827 (*swap_in
) (abfd
, erela
, irela
);
14828 reloc_index
= (irela
->r_offset
- offset
) / 8;
14831 edit_node
= edit_list
;
14832 for (edit_next
= edit_list
;
14833 edit_next
&& edit_next
->index
<= reloc_index
;
14834 edit_next
= edit_node
->next
)
14837 edit_node
= edit_next
;
14840 if (edit_node
->type
!= DELETE_EXIDX_ENTRY
14841 || edit_node
->index
!= reloc_index
)
14843 irela
->r_offset
-= bias
* 8;
14848 erela
+= rel_hdr
->sh_entsize
;
14851 if (edit_tail
->type
== INSERT_EXIDX_CANTUNWIND_AT_END
)
14853 /* New relocation entity. */
14854 asection
*text_sec
= edit_tail
->linked_section
;
14855 asection
*text_out
= text_sec
->output_section
;
14856 bfd_vma exidx_offset
= offset
+ i
->size
- 8;
14858 irela
->r_addend
= 0;
14859 irela
->r_offset
= exidx_offset
;
14860 irela
->r_info
= ELF32_R_INFO
14861 (text_out
->target_index
, R_ARM_PREL31
);
14868 for (j
= 0; j
< NUM_SHDR_ENTRIES (input_reldata
->hdr
); j
++)
14870 (*swap_in
) (abfd
, erela
, irela
);
14871 erela
+= rel_hdr
->sh_entsize
;
14875 count
+= NUM_SHDR_ENTRIES (input_reldata
->hdr
);
14880 reldata
->count
= count
;
14881 rel_hdr
->sh_size
= count
* rel_hdr
->sh_entsize
;
14883 erela
= erela_head
;
14884 irela
= irela_head
;
14887 (*swap_out
) (abfd
, irela
, erela
);
14888 erela
+= rel_hdr
->sh_entsize
;
14895 /* Hashes are no longer valid. */
14896 free (reldata
->hashes
);
14897 reldata
->hashes
= NULL
;
14900 /* Unwinding tables are not referenced directly. This pass marks them as
14901 required if the corresponding code section is marked. Similarly, ARMv8-M
14902 secure entry functions can only be referenced by SG veneers which are
14903 created after the GC process. They need to be marked in case they reside in
14904 their own section (as would be the case if code was compiled with
14905 -ffunction-sections). */
14908 elf32_arm_gc_mark_extra_sections (struct bfd_link_info
*info
,
14909 elf_gc_mark_hook_fn gc_mark_hook
)
14912 Elf_Internal_Shdr
**elf_shdrp
;
14913 asection
*cmse_sec
;
14914 obj_attribute
*out_attr
;
14915 Elf_Internal_Shdr
*symtab_hdr
;
14916 unsigned i
, sym_count
, ext_start
;
14917 const struct elf_backend_data
*bed
;
14918 struct elf_link_hash_entry
**sym_hashes
;
14919 struct elf32_arm_link_hash_entry
*cmse_hash
;
14920 bfd_boolean again
, is_v8m
, first_bfd_browse
= TRUE
;
14922 _bfd_elf_gc_mark_extra_sections (info
, gc_mark_hook
);
14924 out_attr
= elf_known_obj_attributes_proc (info
->output_bfd
);
14925 is_v8m
= out_attr
[Tag_CPU_arch
].i
>= TAG_CPU_ARCH_V8M_BASE
14926 && out_attr
[Tag_CPU_arch_profile
].i
== 'M';
14928 /* Marking EH data may cause additional code sections to be marked,
14929 requiring multiple passes. */
14934 for (sub
= info
->input_bfds
; sub
!= NULL
; sub
= sub
->link
.next
)
14938 if (! is_arm_elf (sub
))
14941 elf_shdrp
= elf_elfsections (sub
);
14942 for (o
= sub
->sections
; o
!= NULL
; o
= o
->next
)
14944 Elf_Internal_Shdr
*hdr
;
14946 hdr
= &elf_section_data (o
)->this_hdr
;
14947 if (hdr
->sh_type
== SHT_ARM_EXIDX
14949 && hdr
->sh_link
< elf_numsections (sub
)
14951 && elf_shdrp
[hdr
->sh_link
]->bfd_section
->gc_mark
)
14954 if (!_bfd_elf_gc_mark (info
, o
, gc_mark_hook
))
14959 /* Mark section holding ARMv8-M secure entry functions. We mark all
14960 of them so no need for a second browsing. */
14961 if (is_v8m
&& first_bfd_browse
)
14963 sym_hashes
= elf_sym_hashes (sub
);
14964 bed
= get_elf_backend_data (sub
);
14965 symtab_hdr
= &elf_tdata (sub
)->symtab_hdr
;
14966 sym_count
= symtab_hdr
->sh_size
/ bed
->s
->sizeof_sym
;
14967 ext_start
= symtab_hdr
->sh_info
;
14969 /* Scan symbols. */
14970 for (i
= ext_start
; i
< sym_count
; i
++)
14972 cmse_hash
= elf32_arm_hash_entry (sym_hashes
[i
- ext_start
]);
14974 /* Assume it is a special symbol. If not, cmse_scan will
14975 warn about it and user can do something about it. */
14976 if (ARM_GET_SYM_CMSE_SPCL (cmse_hash
->root
.target_internal
))
14978 cmse_sec
= cmse_hash
->root
.root
.u
.def
.section
;
14979 if (!cmse_sec
->gc_mark
14980 && !_bfd_elf_gc_mark (info
, cmse_sec
, gc_mark_hook
))
14986 first_bfd_browse
= FALSE
;
14992 /* Treat mapping symbols as special target symbols. */
14995 elf32_arm_is_target_special_symbol (bfd
* abfd ATTRIBUTE_UNUSED
, asymbol
* sym
)
14997 return bfd_is_arm_special_symbol_name (sym
->name
,
14998 BFD_ARM_SPECIAL_SYM_TYPE_ANY
);
15001 /* This is a copy of elf_find_function() from elf.c except that
15002 ARM mapping symbols are ignored when looking for function names
15003 and STT_ARM_TFUNC is considered to a function type. */
15006 arm_elf_find_function (bfd
* abfd ATTRIBUTE_UNUSED
,
15007 asymbol
** symbols
,
15008 asection
* section
,
15010 const char ** filename_ptr
,
15011 const char ** functionname_ptr
)
15013 const char * filename
= NULL
;
15014 asymbol
* func
= NULL
;
15015 bfd_vma low_func
= 0;
15018 for (p
= symbols
; *p
!= NULL
; p
++)
15020 elf_symbol_type
*q
;
15022 q
= (elf_symbol_type
*) *p
;
15024 switch (ELF_ST_TYPE (q
->internal_elf_sym
.st_info
))
15029 filename
= bfd_asymbol_name (&q
->symbol
);
15032 case STT_ARM_TFUNC
:
15034 /* Skip mapping symbols. */
15035 if ((q
->symbol
.flags
& BSF_LOCAL
)
15036 && bfd_is_arm_special_symbol_name (q
->symbol
.name
,
15037 BFD_ARM_SPECIAL_SYM_TYPE_ANY
))
15039 /* Fall through. */
15040 if (bfd_get_section (&q
->symbol
) == section
15041 && q
->symbol
.value
>= low_func
15042 && q
->symbol
.value
<= offset
)
15044 func
= (asymbol
*) q
;
15045 low_func
= q
->symbol
.value
;
15055 *filename_ptr
= filename
;
15056 if (functionname_ptr
)
15057 *functionname_ptr
= bfd_asymbol_name (func
);
15063 /* Find the nearest line to a particular section and offset, for error
15064 reporting. This code is a duplicate of the code in elf.c, except
15065 that it uses arm_elf_find_function. */
15068 elf32_arm_find_nearest_line (bfd
* abfd
,
15069 asymbol
** symbols
,
15070 asection
* section
,
15072 const char ** filename_ptr
,
15073 const char ** functionname_ptr
,
15074 unsigned int * line_ptr
,
15075 unsigned int * discriminator_ptr
)
15077 bfd_boolean found
= FALSE
;
15079 if (_bfd_dwarf2_find_nearest_line (abfd
, symbols
, NULL
, section
, offset
,
15080 filename_ptr
, functionname_ptr
,
15081 line_ptr
, discriminator_ptr
,
15082 dwarf_debug_sections
, 0,
15083 & elf_tdata (abfd
)->dwarf2_find_line_info
))
15085 if (!*functionname_ptr
)
15086 arm_elf_find_function (abfd
, symbols
, section
, offset
,
15087 *filename_ptr
? NULL
: filename_ptr
,
15093 /* Skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain
15096 if (! _bfd_stab_section_find_nearest_line (abfd
, symbols
, section
, offset
,
15097 & found
, filename_ptr
,
15098 functionname_ptr
, line_ptr
,
15099 & elf_tdata (abfd
)->line_info
))
15102 if (found
&& (*functionname_ptr
|| *line_ptr
))
15105 if (symbols
== NULL
)
15108 if (! arm_elf_find_function (abfd
, symbols
, section
, offset
,
15109 filename_ptr
, functionname_ptr
))
15117 elf32_arm_find_inliner_info (bfd
* abfd
,
15118 const char ** filename_ptr
,
15119 const char ** functionname_ptr
,
15120 unsigned int * line_ptr
)
15123 found
= _bfd_dwarf2_find_inliner_info (abfd
, filename_ptr
,
15124 functionname_ptr
, line_ptr
,
15125 & elf_tdata (abfd
)->dwarf2_find_line_info
);
15129 /* Find dynamic relocs for H that apply to read-only sections. */
15132 readonly_dynrelocs (struct elf_link_hash_entry
*h
)
15134 struct elf_dyn_relocs
*p
;
15136 for (p
= elf32_arm_hash_entry (h
)->dyn_relocs
; p
!= NULL
; p
= p
->next
)
15138 asection
*s
= p
->sec
->output_section
;
15140 if (s
!= NULL
&& (s
->flags
& SEC_READONLY
) != 0)
15146 /* Adjust a symbol defined by a dynamic object and referenced by a
15147 regular object. The current definition is in some section of the
15148 dynamic object, but we're not including those sections. We have to
15149 change the definition to something the rest of the link can
15153 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info
* info
,
15154 struct elf_link_hash_entry
* h
)
15157 asection
*s
, *srel
;
15158 struct elf32_arm_link_hash_entry
* eh
;
15159 struct elf32_arm_link_hash_table
*globals
;
15161 globals
= elf32_arm_hash_table (info
);
15162 if (globals
== NULL
)
15165 dynobj
= elf_hash_table (info
)->dynobj
;
15167 /* Make sure we know what is going on here. */
15168 BFD_ASSERT (dynobj
!= NULL
15170 || h
->type
== STT_GNU_IFUNC
15174 && !h
->def_regular
)));
15176 eh
= (struct elf32_arm_link_hash_entry
*) h
;
15178 /* If this is a function, put it in the procedure linkage table. We
15179 will fill in the contents of the procedure linkage table later,
15180 when we know the address of the .got section. */
15181 if (h
->type
== STT_FUNC
|| h
->type
== STT_GNU_IFUNC
|| h
->needs_plt
)
15183 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
15184 symbol binds locally. */
15185 if (h
->plt
.refcount
<= 0
15186 || (h
->type
!= STT_GNU_IFUNC
15187 && (SYMBOL_CALLS_LOCAL (info
, h
)
15188 || (ELF_ST_VISIBILITY (h
->other
) != STV_DEFAULT
15189 && h
->root
.type
== bfd_link_hash_undefweak
))))
15191 /* This case can occur if we saw a PLT32 reloc in an input
15192 file, but the symbol was never referred to by a dynamic
15193 object, or if all references were garbage collected. In
15194 such a case, we don't actually need to build a procedure
15195 linkage table, and we can just do a PC24 reloc instead. */
15196 h
->plt
.offset
= (bfd_vma
) -1;
15197 eh
->plt
.thumb_refcount
= 0;
15198 eh
->plt
.maybe_thumb_refcount
= 0;
15199 eh
->plt
.noncall_refcount
= 0;
15207 /* It's possible that we incorrectly decided a .plt reloc was
15208 needed for an R_ARM_PC24 or similar reloc to a non-function sym
15209 in check_relocs. We can't decide accurately between function
15210 and non-function syms in check-relocs; Objects loaded later in
15211 the link may change h->type. So fix it now. */
15212 h
->plt
.offset
= (bfd_vma
) -1;
15213 eh
->plt
.thumb_refcount
= 0;
15214 eh
->plt
.maybe_thumb_refcount
= 0;
15215 eh
->plt
.noncall_refcount
= 0;
15218 /* If this is a weak symbol, and there is a real definition, the
15219 processor independent code will have arranged for us to see the
15220 real definition first, and we can just use the same value. */
15221 if (h
->is_weakalias
)
15223 struct elf_link_hash_entry
*def
= weakdef (h
);
15224 BFD_ASSERT (def
->root
.type
== bfd_link_hash_defined
);
15225 h
->root
.u
.def
.section
= def
->root
.u
.def
.section
;
15226 h
->root
.u
.def
.value
= def
->root
.u
.def
.value
;
15230 /* If there are no non-GOT references, we do not need a copy
15232 if (!h
->non_got_ref
)
15235 /* This is a reference to a symbol defined by a dynamic object which
15236 is not a function. */
15238 /* If we are creating a shared library, we must presume that the
15239 only references to the symbol are via the global offset table.
15240 For such cases we need not do anything here; the relocations will
15241 be handled correctly by relocate_section. Relocatable executables
15242 can reference data in shared objects directly, so we don't need to
15243 do anything here. */
15244 if (bfd_link_pic (info
) || globals
->root
.is_relocatable_executable
)
15247 /* We must allocate the symbol in our .dynbss section, which will
15248 become part of the .bss section of the executable. There will be
15249 an entry for this symbol in the .dynsym section. The dynamic
15250 object will contain position independent code, so all references
15251 from the dynamic object to this symbol will go through the global
15252 offset table. The dynamic linker will use the .dynsym entry to
15253 determine the address it must put in the global offset table, so
15254 both the dynamic object and the regular object will refer to the
15255 same memory location for the variable. */
15256 /* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic
15257 linker to copy the initial value out of the dynamic object and into
15258 the runtime process image. We need to remember the offset into the
15259 .rel(a).bss section we are going to use. */
15260 if ((h
->root
.u
.def
.section
->flags
& SEC_READONLY
) != 0)
15262 s
= globals
->root
.sdynrelro
;
15263 srel
= globals
->root
.sreldynrelro
;
15267 s
= globals
->root
.sdynbss
;
15268 srel
= globals
->root
.srelbss
;
15270 if (info
->nocopyreloc
== 0
15271 && (h
->root
.u
.def
.section
->flags
& SEC_ALLOC
) != 0
15274 elf32_arm_allocate_dynrelocs (info
, srel
, 1);
15278 return _bfd_elf_adjust_dynamic_copy (info
, h
, s
);
15281 /* Allocate space in .plt, .got and associated reloc sections for
15285 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry
*h
, void * inf
)
15287 struct bfd_link_info
*info
;
15288 struct elf32_arm_link_hash_table
*htab
;
15289 struct elf32_arm_link_hash_entry
*eh
;
15290 struct elf_dyn_relocs
*p
;
15292 if (h
->root
.type
== bfd_link_hash_indirect
)
15295 eh
= (struct elf32_arm_link_hash_entry
*) h
;
15297 info
= (struct bfd_link_info
*) inf
;
15298 htab
= elf32_arm_hash_table (info
);
15302 if ((htab
->root
.dynamic_sections_created
|| h
->type
== STT_GNU_IFUNC
)
15303 && h
->plt
.refcount
> 0)
15305 /* Make sure this symbol is output as a dynamic symbol.
15306 Undefined weak syms won't yet be marked as dynamic. */
15307 if (h
->dynindx
== -1 && !h
->forced_local
15308 && h
->root
.type
== bfd_link_hash_undefweak
)
15310 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
15314 /* If the call in the PLT entry binds locally, the associated
15315 GOT entry should use an R_ARM_IRELATIVE relocation instead of
15316 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
15317 than the .plt section. */
15318 if (h
->type
== STT_GNU_IFUNC
&& SYMBOL_CALLS_LOCAL (info
, h
))
15321 if (eh
->plt
.noncall_refcount
== 0
15322 && SYMBOL_REFERENCES_LOCAL (info
, h
))
15323 /* All non-call references can be resolved directly.
15324 This means that they can (and in some cases, must)
15325 resolve directly to the run-time target, rather than
15326 to the PLT. That in turns means that any .got entry
15327 would be equal to the .igot.plt entry, so there's
15328 no point having both. */
15329 h
->got
.refcount
= 0;
15332 if (bfd_link_pic (info
)
15334 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h
))
15336 elf32_arm_allocate_plt_entry (info
, eh
->is_iplt
, &h
->plt
, &eh
->plt
);
15338 /* If this symbol is not defined in a regular file, and we are
15339 not generating a shared library, then set the symbol to this
15340 location in the .plt. This is required to make function
15341 pointers compare as equal between the normal executable and
15342 the shared library. */
15343 if (! bfd_link_pic (info
)
15344 && !h
->def_regular
)
15346 h
->root
.u
.def
.section
= htab
->root
.splt
;
15347 h
->root
.u
.def
.value
= h
->plt
.offset
;
15349 /* Make sure the function is not marked as Thumb, in case
15350 it is the target of an ABS32 relocation, which will
15351 point to the PLT entry. */
15352 ARM_SET_SYM_BRANCH_TYPE (h
->target_internal
, ST_BRANCH_TO_ARM
);
15355 /* VxWorks executables have a second set of relocations for
15356 each PLT entry. They go in a separate relocation section,
15357 which is processed by the kernel loader. */
15358 if (htab
->vxworks_p
&& !bfd_link_pic (info
))
15360 /* There is a relocation for the initial PLT entry:
15361 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
15362 if (h
->plt
.offset
== htab
->plt_header_size
)
15363 elf32_arm_allocate_dynrelocs (info
, htab
->srelplt2
, 1);
15365 /* There are two extra relocations for each subsequent
15366 PLT entry: an R_ARM_32 relocation for the GOT entry,
15367 and an R_ARM_32 relocation for the PLT entry. */
15368 elf32_arm_allocate_dynrelocs (info
, htab
->srelplt2
, 2);
15373 h
->plt
.offset
= (bfd_vma
) -1;
15379 h
->plt
.offset
= (bfd_vma
) -1;
15383 eh
= (struct elf32_arm_link_hash_entry
*) h
;
15384 eh
->tlsdesc_got
= (bfd_vma
) -1;
15386 if (h
->got
.refcount
> 0)
15390 int tls_type
= elf32_arm_hash_entry (h
)->tls_type
;
15393 /* Make sure this symbol is output as a dynamic symbol.
15394 Undefined weak syms won't yet be marked as dynamic. */
15395 if (h
->dynindx
== -1 && !h
->forced_local
15396 && h
->root
.type
== bfd_link_hash_undefweak
)
15398 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
15402 if (!htab
->symbian_p
)
15404 s
= htab
->root
.sgot
;
15405 h
->got
.offset
= s
->size
;
15407 if (tls_type
== GOT_UNKNOWN
)
15410 if (tls_type
== GOT_NORMAL
)
15411 /* Non-TLS symbols need one GOT slot. */
15415 if (tls_type
& GOT_TLS_GDESC
)
15417 /* R_ARM_TLS_DESC needs 2 GOT slots. */
15419 = (htab
->root
.sgotplt
->size
15420 - elf32_arm_compute_jump_table_size (htab
));
15421 htab
->root
.sgotplt
->size
+= 8;
15422 h
->got
.offset
= (bfd_vma
) -2;
15423 /* plt.got_offset needs to know there's a TLS_DESC
15424 reloc in the middle of .got.plt. */
15425 htab
->num_tls_desc
++;
15428 if (tls_type
& GOT_TLS_GD
)
15430 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
15431 the symbol is both GD and GDESC, got.offset may
15432 have been overwritten. */
15433 h
->got
.offset
= s
->size
;
15437 if (tls_type
& GOT_TLS_IE
)
15438 /* R_ARM_TLS_IE32 needs one GOT slot. */
15442 dyn
= htab
->root
.dynamic_sections_created
;
15445 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn
,
15446 bfd_link_pic (info
),
15448 && (!bfd_link_pic (info
)
15449 || !SYMBOL_REFERENCES_LOCAL (info
, h
)))
15452 if (tls_type
!= GOT_NORMAL
15453 && (bfd_link_pic (info
) || indx
!= 0)
15454 && (ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
15455 || h
->root
.type
!= bfd_link_hash_undefweak
))
15457 if (tls_type
& GOT_TLS_IE
)
15458 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
15460 if (tls_type
& GOT_TLS_GD
)
15461 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
15463 if (tls_type
& GOT_TLS_GDESC
)
15465 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelplt
, 1);
15466 /* GDESC needs a trampoline to jump to. */
15467 htab
->tls_trampoline
= -1;
15470 /* Only GD needs it. GDESC just emits one relocation per
15472 if ((tls_type
& GOT_TLS_GD
) && indx
!= 0)
15473 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
15475 else if (indx
!= -1 && !SYMBOL_REFERENCES_LOCAL (info
, h
))
15477 if (htab
->root
.dynamic_sections_created
)
15478 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
15479 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
15481 else if (h
->type
== STT_GNU_IFUNC
15482 && eh
->plt
.noncall_refcount
== 0)
15483 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
15484 they all resolve dynamically instead. Reserve room for the
15485 GOT entry's R_ARM_IRELATIVE relocation. */
15486 elf32_arm_allocate_irelocs (info
, htab
->root
.srelgot
, 1);
15487 else if (bfd_link_pic (info
)
15488 && (ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
15489 || h
->root
.type
!= bfd_link_hash_undefweak
))
15490 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
15491 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
15495 h
->got
.offset
= (bfd_vma
) -1;
15497 /* Allocate stubs for exported Thumb functions on v4t. */
15498 if (!htab
->use_blx
&& h
->dynindx
!= -1
15500 && ARM_GET_SYM_BRANCH_TYPE (h
->target_internal
) == ST_BRANCH_TO_THUMB
15501 && ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
)
15503 struct elf_link_hash_entry
* th
;
15504 struct bfd_link_hash_entry
* bh
;
15505 struct elf_link_hash_entry
* myh
;
15509 /* Create a new symbol to regist the real location of the function. */
15510 s
= h
->root
.u
.def
.section
;
15511 sprintf (name
, "__real_%s", h
->root
.root
.string
);
15512 _bfd_generic_link_add_one_symbol (info
, s
->owner
,
15513 name
, BSF_GLOBAL
, s
,
15514 h
->root
.u
.def
.value
,
15515 NULL
, TRUE
, FALSE
, &bh
);
15517 myh
= (struct elf_link_hash_entry
*) bh
;
15518 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
15519 myh
->forced_local
= 1;
15520 ARM_SET_SYM_BRANCH_TYPE (myh
->target_internal
, ST_BRANCH_TO_THUMB
);
15521 eh
->export_glue
= myh
;
15522 th
= record_arm_to_thumb_glue (info
, h
);
15523 /* Point the symbol at the stub. */
15524 h
->type
= ELF_ST_INFO (ELF_ST_BIND (h
->type
), STT_FUNC
);
15525 ARM_SET_SYM_BRANCH_TYPE (h
->target_internal
, ST_BRANCH_TO_ARM
);
15526 h
->root
.u
.def
.section
= th
->root
.u
.def
.section
;
15527 h
->root
.u
.def
.value
= th
->root
.u
.def
.value
& ~1;
15530 if (eh
->dyn_relocs
== NULL
)
15533 /* In the shared -Bsymbolic case, discard space allocated for
15534 dynamic pc-relative relocs against symbols which turn out to be
15535 defined in regular objects. For the normal shared case, discard
15536 space for pc-relative relocs that have become local due to symbol
15537 visibility changes. */
15539 if (bfd_link_pic (info
) || htab
->root
.is_relocatable_executable
)
15541 /* Relocs that use pc_count are PC-relative forms, which will appear
15542 on something like ".long foo - ." or "movw REG, foo - .". We want
15543 calls to protected symbols to resolve directly to the function
15544 rather than going via the plt. If people want function pointer
15545 comparisons to work as expected then they should avoid writing
15546 assembly like ".long foo - .". */
15547 if (SYMBOL_CALLS_LOCAL (info
, h
))
15549 struct elf_dyn_relocs
**pp
;
15551 for (pp
= &eh
->dyn_relocs
; (p
= *pp
) != NULL
; )
15553 p
->count
-= p
->pc_count
;
15562 if (htab
->vxworks_p
)
15564 struct elf_dyn_relocs
**pp
;
15566 for (pp
= &eh
->dyn_relocs
; (p
= *pp
) != NULL
; )
15568 if (strcmp (p
->sec
->output_section
->name
, ".tls_vars") == 0)
15575 /* Also discard relocs on undefined weak syms with non-default
15577 if (eh
->dyn_relocs
!= NULL
15578 && h
->root
.type
== bfd_link_hash_undefweak
)
15580 if (ELF_ST_VISIBILITY (h
->other
) != STV_DEFAULT
15581 || UNDEFWEAK_NO_DYNAMIC_RELOC (info
, h
))
15582 eh
->dyn_relocs
= NULL
;
15584 /* Make sure undefined weak symbols are output as a dynamic
15586 else if (h
->dynindx
== -1
15587 && !h
->forced_local
)
15589 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
15594 else if (htab
->root
.is_relocatable_executable
&& h
->dynindx
== -1
15595 && h
->root
.type
== bfd_link_hash_new
)
15597 /* Output absolute symbols so that we can create relocations
15598 against them. For normal symbols we output a relocation
15599 against the section that contains them. */
15600 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
15607 /* For the non-shared case, discard space for relocs against
15608 symbols which turn out to need copy relocs or are not
15611 if (!h
->non_got_ref
15612 && ((h
->def_dynamic
15613 && !h
->def_regular
)
15614 || (htab
->root
.dynamic_sections_created
15615 && (h
->root
.type
== bfd_link_hash_undefweak
15616 || h
->root
.type
== bfd_link_hash_undefined
))))
15618 /* Make sure this symbol is output as a dynamic symbol.
15619 Undefined weak syms won't yet be marked as dynamic. */
15620 if (h
->dynindx
== -1 && !h
->forced_local
15621 && h
->root
.type
== bfd_link_hash_undefweak
)
15623 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
15627 /* If that succeeded, we know we'll be keeping all the
15629 if (h
->dynindx
!= -1)
15633 eh
->dyn_relocs
= NULL
;
15638 /* Finally, allocate space. */
15639 for (p
= eh
->dyn_relocs
; p
!= NULL
; p
= p
->next
)
15641 asection
*sreloc
= elf_section_data (p
->sec
)->sreloc
;
15642 if (h
->type
== STT_GNU_IFUNC
15643 && eh
->plt
.noncall_refcount
== 0
15644 && SYMBOL_REFERENCES_LOCAL (info
, h
))
15645 elf32_arm_allocate_irelocs (info
, sreloc
, p
->count
);
15647 elf32_arm_allocate_dynrelocs (info
, sreloc
, p
->count
);
15653 /* Set DF_TEXTREL if we find any dynamic relocs that apply to
15654 read-only sections. */
15657 maybe_set_textrel (struct elf_link_hash_entry
*h
, void *info_p
)
15661 if (h
->root
.type
== bfd_link_hash_indirect
)
15664 sec
= readonly_dynrelocs (h
);
15667 struct bfd_link_info
*info
= (struct bfd_link_info
*) info_p
;
15669 info
->flags
|= DF_TEXTREL
;
15670 info
->callbacks
->minfo
15671 (_("%pB: dynamic relocation against `%pT' in read-only section `%pA'\n"),
15672 sec
->owner
, h
->root
.root
.string
, sec
);
15674 /* Not an error, just cut short the traversal. */
15681 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info
*info
,
15684 struct elf32_arm_link_hash_table
*globals
;
15686 globals
= elf32_arm_hash_table (info
);
15687 if (globals
== NULL
)
15690 globals
->byteswap_code
= byteswap_code
;
15693 /* Set the sizes of the dynamic sections. */
15696 elf32_arm_size_dynamic_sections (bfd
* output_bfd ATTRIBUTE_UNUSED
,
15697 struct bfd_link_info
* info
)
15702 bfd_boolean relocs
;
15704 struct elf32_arm_link_hash_table
*htab
;
15706 htab
= elf32_arm_hash_table (info
);
15710 dynobj
= elf_hash_table (info
)->dynobj
;
15711 BFD_ASSERT (dynobj
!= NULL
);
15712 check_use_blx (htab
);
15714 if (elf_hash_table (info
)->dynamic_sections_created
)
15716 /* Set the contents of the .interp section to the interpreter. */
15717 if (bfd_link_executable (info
) && !info
->nointerp
)
15719 s
= bfd_get_linker_section (dynobj
, ".interp");
15720 BFD_ASSERT (s
!= NULL
);
15721 s
->size
= sizeof ELF_DYNAMIC_INTERPRETER
;
15722 s
->contents
= (unsigned char *) ELF_DYNAMIC_INTERPRETER
;
15726 /* Set up .got offsets for local syms, and space for local dynamic
15728 for (ibfd
= info
->input_bfds
; ibfd
!= NULL
; ibfd
= ibfd
->link
.next
)
15730 bfd_signed_vma
*local_got
;
15731 bfd_signed_vma
*end_local_got
;
15732 struct arm_local_iplt_info
**local_iplt_ptr
, *local_iplt
;
15733 char *local_tls_type
;
15734 bfd_vma
*local_tlsdesc_gotent
;
15735 bfd_size_type locsymcount
;
15736 Elf_Internal_Shdr
*symtab_hdr
;
15738 bfd_boolean is_vxworks
= htab
->vxworks_p
;
15739 unsigned int symndx
;
15741 if (! is_arm_elf (ibfd
))
15744 for (s
= ibfd
->sections
; s
!= NULL
; s
= s
->next
)
15746 struct elf_dyn_relocs
*p
;
15748 for (p
= (struct elf_dyn_relocs
*)
15749 elf_section_data (s
)->local_dynrel
; p
!= NULL
; p
= p
->next
)
15751 if (!bfd_is_abs_section (p
->sec
)
15752 && bfd_is_abs_section (p
->sec
->output_section
))
15754 /* Input section has been discarded, either because
15755 it is a copy of a linkonce section or due to
15756 linker script /DISCARD/, so we'll be discarding
15759 else if (is_vxworks
15760 && strcmp (p
->sec
->output_section
->name
,
15763 /* Relocations in vxworks .tls_vars sections are
15764 handled specially by the loader. */
15766 else if (p
->count
!= 0)
15768 srel
= elf_section_data (p
->sec
)->sreloc
;
15769 elf32_arm_allocate_dynrelocs (info
, srel
, p
->count
);
15770 if ((p
->sec
->output_section
->flags
& SEC_READONLY
) != 0)
15771 info
->flags
|= DF_TEXTREL
;
15776 local_got
= elf_local_got_refcounts (ibfd
);
15780 symtab_hdr
= & elf_symtab_hdr (ibfd
);
15781 locsymcount
= symtab_hdr
->sh_info
;
15782 end_local_got
= local_got
+ locsymcount
;
15783 local_iplt_ptr
= elf32_arm_local_iplt (ibfd
);
15784 local_tls_type
= elf32_arm_local_got_tls_type (ibfd
);
15785 local_tlsdesc_gotent
= elf32_arm_local_tlsdesc_gotent (ibfd
);
15787 s
= htab
->root
.sgot
;
15788 srel
= htab
->root
.srelgot
;
15789 for (; local_got
< end_local_got
;
15790 ++local_got
, ++local_iplt_ptr
, ++local_tls_type
,
15791 ++local_tlsdesc_gotent
, ++symndx
)
15793 *local_tlsdesc_gotent
= (bfd_vma
) -1;
15794 local_iplt
= *local_iplt_ptr
;
15795 if (local_iplt
!= NULL
)
15797 struct elf_dyn_relocs
*p
;
15799 if (local_iplt
->root
.refcount
> 0)
15801 elf32_arm_allocate_plt_entry (info
, TRUE
,
15804 if (local_iplt
->arm
.noncall_refcount
== 0)
15805 /* All references to the PLT are calls, so all
15806 non-call references can resolve directly to the
15807 run-time target. This means that the .got entry
15808 would be the same as the .igot.plt entry, so there's
15809 no point creating both. */
15814 BFD_ASSERT (local_iplt
->arm
.noncall_refcount
== 0);
15815 local_iplt
->root
.offset
= (bfd_vma
) -1;
15818 for (p
= local_iplt
->dyn_relocs
; p
!= NULL
; p
= p
->next
)
15822 psrel
= elf_section_data (p
->sec
)->sreloc
;
15823 if (local_iplt
->arm
.noncall_refcount
== 0)
15824 elf32_arm_allocate_irelocs (info
, psrel
, p
->count
);
15826 elf32_arm_allocate_dynrelocs (info
, psrel
, p
->count
);
15829 if (*local_got
> 0)
15831 Elf_Internal_Sym
*isym
;
15833 *local_got
= s
->size
;
15834 if (*local_tls_type
& GOT_TLS_GD
)
15835 /* TLS_GD relocs need an 8-byte structure in the GOT. */
15837 if (*local_tls_type
& GOT_TLS_GDESC
)
15839 *local_tlsdesc_gotent
= htab
->root
.sgotplt
->size
15840 - elf32_arm_compute_jump_table_size (htab
);
15841 htab
->root
.sgotplt
->size
+= 8;
15842 *local_got
= (bfd_vma
) -2;
15843 /* plt.got_offset needs to know there's a TLS_DESC
15844 reloc in the middle of .got.plt. */
15845 htab
->num_tls_desc
++;
15847 if (*local_tls_type
& GOT_TLS_IE
)
15850 if (*local_tls_type
& GOT_NORMAL
)
15852 /* If the symbol is both GD and GDESC, *local_got
15853 may have been overwritten. */
15854 *local_got
= s
->size
;
15858 isym
= bfd_sym_from_r_symndx (&htab
->sym_cache
, ibfd
, symndx
);
15862 /* If all references to an STT_GNU_IFUNC PLT are calls,
15863 then all non-call references, including this GOT entry,
15864 resolve directly to the run-time target. */
15865 if (ELF32_ST_TYPE (isym
->st_info
) == STT_GNU_IFUNC
15866 && (local_iplt
== NULL
15867 || local_iplt
->arm
.noncall_refcount
== 0))
15868 elf32_arm_allocate_irelocs (info
, srel
, 1);
15869 else if (bfd_link_pic (info
) || output_bfd
->flags
& DYNAMIC
)
15871 if ((bfd_link_pic (info
) && !(*local_tls_type
& GOT_TLS_GDESC
))
15872 || *local_tls_type
& GOT_TLS_GD
)
15873 elf32_arm_allocate_dynrelocs (info
, srel
, 1);
15875 if (bfd_link_pic (info
) && *local_tls_type
& GOT_TLS_GDESC
)
15877 elf32_arm_allocate_dynrelocs (info
,
15878 htab
->root
.srelplt
, 1);
15879 htab
->tls_trampoline
= -1;
15884 *local_got
= (bfd_vma
) -1;
15888 if (htab
->tls_ldm_got
.refcount
> 0)
15890 /* Allocate two GOT entries and one dynamic relocation (if necessary)
15891 for R_ARM_TLS_LDM32 relocations. */
15892 htab
->tls_ldm_got
.offset
= htab
->root
.sgot
->size
;
15893 htab
->root
.sgot
->size
+= 8;
15894 if (bfd_link_pic (info
))
15895 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
15898 htab
->tls_ldm_got
.offset
= -1;
15900 /* Allocate global sym .plt and .got entries, and space for global
15901 sym dynamic relocs. */
15902 elf_link_hash_traverse (& htab
->root
, allocate_dynrelocs_for_symbol
, info
);
15904 /* Here we rummage through the found bfds to collect glue information. */
15905 for (ibfd
= info
->input_bfds
; ibfd
!= NULL
; ibfd
= ibfd
->link
.next
)
15907 if (! is_arm_elf (ibfd
))
15910 /* Initialise mapping tables for code/data. */
15911 bfd_elf32_arm_init_maps (ibfd
);
15913 if (!bfd_elf32_arm_process_before_allocation (ibfd
, info
)
15914 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd
, info
)
15915 || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd
, info
))
15916 _bfd_error_handler (_("errors encountered processing file %pB"), ibfd
);
15919 /* Allocate space for the glue sections now that we've sized them. */
15920 bfd_elf32_arm_allocate_interworking_sections (info
);
15922 /* For every jump slot reserved in the sgotplt, reloc_count is
15923 incremented. However, when we reserve space for TLS descriptors,
15924 it's not incremented, so in order to compute the space reserved
15925 for them, it suffices to multiply the reloc count by the jump
15927 if (htab
->root
.srelplt
)
15928 htab
->sgotplt_jump_table_size
= elf32_arm_compute_jump_table_size(htab
);
15930 if (htab
->tls_trampoline
)
15932 if (htab
->root
.splt
->size
== 0)
15933 htab
->root
.splt
->size
+= htab
->plt_header_size
;
15935 htab
->tls_trampoline
= htab
->root
.splt
->size
;
15936 htab
->root
.splt
->size
+= htab
->plt_entry_size
;
15938 /* If we're not using lazy TLS relocations, don't generate the
15939 PLT and GOT entries they require. */
15940 if (!(info
->flags
& DF_BIND_NOW
))
15942 htab
->dt_tlsdesc_got
= htab
->root
.sgot
->size
;
15943 htab
->root
.sgot
->size
+= 4;
15945 htab
->dt_tlsdesc_plt
= htab
->root
.splt
->size
;
15946 htab
->root
.splt
->size
+= 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline
);
15950 /* The check_relocs and adjust_dynamic_symbol entry points have
15951 determined the sizes of the various dynamic sections. Allocate
15952 memory for them. */
15955 for (s
= dynobj
->sections
; s
!= NULL
; s
= s
->next
)
15959 if ((s
->flags
& SEC_LINKER_CREATED
) == 0)
15962 /* It's OK to base decisions on the section name, because none
15963 of the dynobj section names depend upon the input files. */
15964 name
= bfd_get_section_name (dynobj
, s
);
15966 if (s
== htab
->root
.splt
)
15968 /* Remember whether there is a PLT. */
15969 plt
= s
->size
!= 0;
15971 else if (CONST_STRNEQ (name
, ".rel"))
15975 /* Remember whether there are any reloc sections other
15976 than .rel(a).plt and .rela.plt.unloaded. */
15977 if (s
!= htab
->root
.srelplt
&& s
!= htab
->srelplt2
)
15980 /* We use the reloc_count field as a counter if we need
15981 to copy relocs into the output file. */
15982 s
->reloc_count
= 0;
15985 else if (s
!= htab
->root
.sgot
15986 && s
!= htab
->root
.sgotplt
15987 && s
!= htab
->root
.iplt
15988 && s
!= htab
->root
.igotplt
15989 && s
!= htab
->root
.sdynbss
15990 && s
!= htab
->root
.sdynrelro
)
15992 /* It's not one of our sections, so don't allocate space. */
15998 /* If we don't need this section, strip it from the
15999 output file. This is mostly to handle .rel(a).bss and
16000 .rel(a).plt. We must create both sections in
16001 create_dynamic_sections, because they must be created
16002 before the linker maps input sections to output
16003 sections. The linker does that before
16004 adjust_dynamic_symbol is called, and it is that
16005 function which decides whether anything needs to go
16006 into these sections. */
16007 s
->flags
|= SEC_EXCLUDE
;
16011 if ((s
->flags
& SEC_HAS_CONTENTS
) == 0)
16014 /* Allocate memory for the section contents. */
16015 s
->contents
= (unsigned char *) bfd_zalloc (dynobj
, s
->size
);
16016 if (s
->contents
== NULL
)
16020 if (elf_hash_table (info
)->dynamic_sections_created
)
16022 /* Add some entries to the .dynamic section. We fill in the
16023 values later, in elf32_arm_finish_dynamic_sections, but we
16024 must add the entries now so that we get the correct size for
16025 the .dynamic section. The DT_DEBUG entry is filled in by the
16026 dynamic linker and used by the debugger. */
16027 #define add_dynamic_entry(TAG, VAL) \
16028 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
16030 if (bfd_link_executable (info
))
16032 if (!add_dynamic_entry (DT_DEBUG
, 0))
16038 if ( !add_dynamic_entry (DT_PLTGOT
, 0)
16039 || !add_dynamic_entry (DT_PLTRELSZ
, 0)
16040 || !add_dynamic_entry (DT_PLTREL
,
16041 htab
->use_rel
? DT_REL
: DT_RELA
)
16042 || !add_dynamic_entry (DT_JMPREL
, 0))
16045 if (htab
->dt_tlsdesc_plt
16046 && (!add_dynamic_entry (DT_TLSDESC_PLT
,0)
16047 || !add_dynamic_entry (DT_TLSDESC_GOT
,0)))
16055 if (!add_dynamic_entry (DT_REL
, 0)
16056 || !add_dynamic_entry (DT_RELSZ
, 0)
16057 || !add_dynamic_entry (DT_RELENT
, RELOC_SIZE (htab
)))
16062 if (!add_dynamic_entry (DT_RELA
, 0)
16063 || !add_dynamic_entry (DT_RELASZ
, 0)
16064 || !add_dynamic_entry (DT_RELAENT
, RELOC_SIZE (htab
)))
16069 /* If any dynamic relocs apply to a read-only section,
16070 then we need a DT_TEXTREL entry. */
16071 if ((info
->flags
& DF_TEXTREL
) == 0)
16072 elf_link_hash_traverse (&htab
->root
, maybe_set_textrel
, info
);
16074 if ((info
->flags
& DF_TEXTREL
) != 0)
16076 if (!add_dynamic_entry (DT_TEXTREL
, 0))
16079 if (htab
->vxworks_p
16080 && !elf_vxworks_add_dynamic_entries (output_bfd
, info
))
16083 #undef add_dynamic_entry
16088 /* Size sections even though they're not dynamic. We use it to setup
16089 _TLS_MODULE_BASE_, if needed. */
16092 elf32_arm_always_size_sections (bfd
*output_bfd
,
16093 struct bfd_link_info
*info
)
16097 if (bfd_link_relocatable (info
))
16100 tls_sec
= elf_hash_table (info
)->tls_sec
;
16104 struct elf_link_hash_entry
*tlsbase
;
16106 tlsbase
= elf_link_hash_lookup
16107 (elf_hash_table (info
), "_TLS_MODULE_BASE_", TRUE
, TRUE
, FALSE
);
16111 struct bfd_link_hash_entry
*bh
= NULL
;
16112 const struct elf_backend_data
*bed
16113 = get_elf_backend_data (output_bfd
);
16115 if (!(_bfd_generic_link_add_one_symbol
16116 (info
, output_bfd
, "_TLS_MODULE_BASE_", BSF_LOCAL
,
16117 tls_sec
, 0, NULL
, FALSE
,
16118 bed
->collect
, &bh
)))
16121 tlsbase
->type
= STT_TLS
;
16122 tlsbase
= (struct elf_link_hash_entry
*)bh
;
16123 tlsbase
->def_regular
= 1;
16124 tlsbase
->other
= STV_HIDDEN
;
16125 (*bed
->elf_backend_hide_symbol
) (info
, tlsbase
, TRUE
);
16131 /* Finish up dynamic symbol handling. We set the contents of various
16132 dynamic sections here. */
16135 elf32_arm_finish_dynamic_symbol (bfd
* output_bfd
,
16136 struct bfd_link_info
* info
,
16137 struct elf_link_hash_entry
* h
,
16138 Elf_Internal_Sym
* sym
)
16140 struct elf32_arm_link_hash_table
*htab
;
16141 struct elf32_arm_link_hash_entry
*eh
;
16143 htab
= elf32_arm_hash_table (info
);
16147 eh
= (struct elf32_arm_link_hash_entry
*) h
;
16149 if (h
->plt
.offset
!= (bfd_vma
) -1)
16153 BFD_ASSERT (h
->dynindx
!= -1);
16154 if (! elf32_arm_populate_plt_entry (output_bfd
, info
, &h
->plt
, &eh
->plt
,
16159 if (!h
->def_regular
)
16161 /* Mark the symbol as undefined, rather than as defined in
16162 the .plt section. */
16163 sym
->st_shndx
= SHN_UNDEF
;
16164 /* If the symbol is weak we need to clear the value.
16165 Otherwise, the PLT entry would provide a definition for
16166 the symbol even if the symbol wasn't defined anywhere,
16167 and so the symbol would never be NULL. Leave the value if
16168 there were any relocations where pointer equality matters
16169 (this is a clue for the dynamic linker, to make function
16170 pointer comparisons work between an application and shared
16172 if (!h
->ref_regular_nonweak
|| !h
->pointer_equality_needed
)
16175 else if (eh
->is_iplt
&& eh
->plt
.noncall_refcount
!= 0)
16177 /* At least one non-call relocation references this .iplt entry,
16178 so the .iplt entry is the function's canonical address. */
16179 sym
->st_info
= ELF_ST_INFO (ELF_ST_BIND (sym
->st_info
), STT_FUNC
);
16180 ARM_SET_SYM_BRANCH_TYPE (sym
->st_target_internal
, ST_BRANCH_TO_ARM
);
16181 sym
->st_shndx
= (_bfd_elf_section_from_bfd_section
16182 (output_bfd
, htab
->root
.iplt
->output_section
));
16183 sym
->st_value
= (h
->plt
.offset
16184 + htab
->root
.iplt
->output_section
->vma
16185 + htab
->root
.iplt
->output_offset
);
16192 Elf_Internal_Rela rel
;
16194 /* This symbol needs a copy reloc. Set it up. */
16195 BFD_ASSERT (h
->dynindx
!= -1
16196 && (h
->root
.type
== bfd_link_hash_defined
16197 || h
->root
.type
== bfd_link_hash_defweak
));
16200 rel
.r_offset
= (h
->root
.u
.def
.value
16201 + h
->root
.u
.def
.section
->output_section
->vma
16202 + h
->root
.u
.def
.section
->output_offset
);
16203 rel
.r_info
= ELF32_R_INFO (h
->dynindx
, R_ARM_COPY
);
16204 if (h
->root
.u
.def
.section
== htab
->root
.sdynrelro
)
16205 s
= htab
->root
.sreldynrelro
;
16207 s
= htab
->root
.srelbss
;
16208 elf32_arm_add_dynreloc (output_bfd
, info
, s
, &rel
);
16211 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
16212 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
16213 to the ".got" section. */
16214 if (h
== htab
->root
.hdynamic
16215 || (!htab
->vxworks_p
&& h
== htab
->root
.hgot
))
16216 sym
->st_shndx
= SHN_ABS
;
16222 arm_put_trampoline (struct elf32_arm_link_hash_table
*htab
, bfd
*output_bfd
,
16224 const unsigned long *template, unsigned count
)
16228 for (ix
= 0; ix
!= count
; ix
++)
16230 unsigned long insn
= template[ix
];
16232 /* Emit mov pc,rx if bx is not permitted. */
16233 if (htab
->fix_v4bx
== 1 && (insn
& 0x0ffffff0) == 0x012fff10)
16234 insn
= (insn
& 0xf000000f) | 0x01a0f000;
16235 put_arm_insn (htab
, output_bfd
, insn
, (char *)contents
+ ix
*4);
16239 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
16240 other variants, NaCl needs this entry in a static executable's
16241 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
16242 zero. For .iplt really only the last bundle is useful, and .iplt
16243 could have a shorter first entry, with each individual PLT entry's
16244 relative branch calculated differently so it targets the last
16245 bundle instead of the instruction before it (labelled .Lplt_tail
16246 above). But it's simpler to keep the size and layout of PLT0
16247 consistent with the dynamic case, at the cost of some dead code at
16248 the start of .iplt and the one dead store to the stack at the start
16251 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table
*htab
, bfd
*output_bfd
,
16252 asection
*plt
, bfd_vma got_displacement
)
16256 put_arm_insn (htab
, output_bfd
,
16257 elf32_arm_nacl_plt0_entry
[0]
16258 | arm_movw_immediate (got_displacement
),
16259 plt
->contents
+ 0);
16260 put_arm_insn (htab
, output_bfd
,
16261 elf32_arm_nacl_plt0_entry
[1]
16262 | arm_movt_immediate (got_displacement
),
16263 plt
->contents
+ 4);
16265 for (i
= 2; i
< ARRAY_SIZE (elf32_arm_nacl_plt0_entry
); ++i
)
16266 put_arm_insn (htab
, output_bfd
,
16267 elf32_arm_nacl_plt0_entry
[i
],
16268 plt
->contents
+ (i
* 4));
16271 /* Finish up the dynamic sections. */
16274 elf32_arm_finish_dynamic_sections (bfd
* output_bfd
, struct bfd_link_info
* info
)
16279 struct elf32_arm_link_hash_table
*htab
;
16281 htab
= elf32_arm_hash_table (info
);
16285 dynobj
= elf_hash_table (info
)->dynobj
;
16287 sgot
= htab
->root
.sgotplt
;
16288 /* A broken linker script might have discarded the dynamic sections.
16289 Catch this here so that we do not seg-fault later on. */
16290 if (sgot
!= NULL
&& bfd_is_abs_section (sgot
->output_section
))
16292 sdyn
= bfd_get_linker_section (dynobj
, ".dynamic");
16294 if (elf_hash_table (info
)->dynamic_sections_created
)
16297 Elf32_External_Dyn
*dyncon
, *dynconend
;
16299 splt
= htab
->root
.splt
;
16300 BFD_ASSERT (splt
!= NULL
&& sdyn
!= NULL
);
16301 BFD_ASSERT (htab
->symbian_p
|| sgot
!= NULL
);
16303 dyncon
= (Elf32_External_Dyn
*) sdyn
->contents
;
16304 dynconend
= (Elf32_External_Dyn
*) (sdyn
->contents
+ sdyn
->size
);
16306 for (; dyncon
< dynconend
; dyncon
++)
16308 Elf_Internal_Dyn dyn
;
16312 bfd_elf32_swap_dyn_in (dynobj
, dyncon
, &dyn
);
16319 if (htab
->vxworks_p
16320 && elf_vxworks_finish_dynamic_entry (output_bfd
, &dyn
))
16321 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
16326 goto get_vma_if_bpabi
;
16329 goto get_vma_if_bpabi
;
16332 goto get_vma_if_bpabi
;
16334 name
= ".gnu.version";
16335 goto get_vma_if_bpabi
;
16337 name
= ".gnu.version_d";
16338 goto get_vma_if_bpabi
;
16340 name
= ".gnu.version_r";
16341 goto get_vma_if_bpabi
;
16344 name
= htab
->symbian_p
? ".got" : ".got.plt";
16347 name
= RELOC_SECTION (htab
, ".plt");
16349 s
= bfd_get_linker_section (dynobj
, name
);
16353 (_("could not find section %s"), name
);
16354 bfd_set_error (bfd_error_invalid_operation
);
16357 if (!htab
->symbian_p
)
16358 dyn
.d_un
.d_ptr
= s
->output_section
->vma
+ s
->output_offset
;
16360 /* In the BPABI, tags in the PT_DYNAMIC section point
16361 at the file offset, not the memory address, for the
16362 convenience of the post linker. */
16363 dyn
.d_un
.d_ptr
= s
->output_section
->filepos
+ s
->output_offset
;
16364 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
16368 if (htab
->symbian_p
)
16373 s
= htab
->root
.srelplt
;
16374 BFD_ASSERT (s
!= NULL
);
16375 dyn
.d_un
.d_val
= s
->size
;
16376 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
16383 /* In the BPABI, the DT_REL tag must point at the file
16384 offset, not the VMA, of the first relocation
16385 section. So, we use code similar to that in
16386 elflink.c, but do not check for SHF_ALLOC on the
16387 relocation section, since relocation sections are
16388 never allocated under the BPABI. PLT relocs are also
16390 if (htab
->symbian_p
)
16393 type
= ((dyn
.d_tag
== DT_REL
|| dyn
.d_tag
== DT_RELSZ
)
16394 ? SHT_REL
: SHT_RELA
);
16395 dyn
.d_un
.d_val
= 0;
16396 for (i
= 1; i
< elf_numsections (output_bfd
); i
++)
16398 Elf_Internal_Shdr
*hdr
16399 = elf_elfsections (output_bfd
)[i
];
16400 if (hdr
->sh_type
== type
)
16402 if (dyn
.d_tag
== DT_RELSZ
16403 || dyn
.d_tag
== DT_RELASZ
)
16404 dyn
.d_un
.d_val
+= hdr
->sh_size
;
16405 else if ((ufile_ptr
) hdr
->sh_offset
16406 <= dyn
.d_un
.d_val
- 1)
16407 dyn
.d_un
.d_val
= hdr
->sh_offset
;
16410 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
16414 case DT_TLSDESC_PLT
:
16415 s
= htab
->root
.splt
;
16416 dyn
.d_un
.d_ptr
= (s
->output_section
->vma
+ s
->output_offset
16417 + htab
->dt_tlsdesc_plt
);
16418 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
16421 case DT_TLSDESC_GOT
:
16422 s
= htab
->root
.sgot
;
16423 dyn
.d_un
.d_ptr
= (s
->output_section
->vma
+ s
->output_offset
16424 + htab
->dt_tlsdesc_got
);
16425 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
16428 /* Set the bottom bit of DT_INIT/FINI if the
16429 corresponding function is Thumb. */
16431 name
= info
->init_function
;
16434 name
= info
->fini_function
;
16436 /* If it wasn't set by elf_bfd_final_link
16437 then there is nothing to adjust. */
16438 if (dyn
.d_un
.d_val
!= 0)
16440 struct elf_link_hash_entry
* eh
;
16442 eh
= elf_link_hash_lookup (elf_hash_table (info
), name
,
16443 FALSE
, FALSE
, TRUE
);
16445 && ARM_GET_SYM_BRANCH_TYPE (eh
->target_internal
)
16446 == ST_BRANCH_TO_THUMB
)
16448 dyn
.d_un
.d_val
|= 1;
16449 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
16456 /* Fill in the first entry in the procedure linkage table. */
16457 if (splt
->size
> 0 && htab
->plt_header_size
)
16459 const bfd_vma
*plt0_entry
;
16460 bfd_vma got_address
, plt_address
, got_displacement
;
16462 /* Calculate the addresses of the GOT and PLT. */
16463 got_address
= sgot
->output_section
->vma
+ sgot
->output_offset
;
16464 plt_address
= splt
->output_section
->vma
+ splt
->output_offset
;
16466 if (htab
->vxworks_p
)
16468 /* The VxWorks GOT is relocated by the dynamic linker.
16469 Therefore, we must emit relocations rather than simply
16470 computing the values now. */
16471 Elf_Internal_Rela rel
;
16473 plt0_entry
= elf32_arm_vxworks_exec_plt0_entry
;
16474 put_arm_insn (htab
, output_bfd
, plt0_entry
[0],
16475 splt
->contents
+ 0);
16476 put_arm_insn (htab
, output_bfd
, plt0_entry
[1],
16477 splt
->contents
+ 4);
16478 put_arm_insn (htab
, output_bfd
, plt0_entry
[2],
16479 splt
->contents
+ 8);
16480 bfd_put_32 (output_bfd
, got_address
, splt
->contents
+ 12);
16482 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
16483 rel
.r_offset
= plt_address
+ 12;
16484 rel
.r_info
= ELF32_R_INFO (htab
->root
.hgot
->indx
, R_ARM_ABS32
);
16486 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
,
16487 htab
->srelplt2
->contents
);
16489 else if (htab
->nacl_p
)
16490 arm_nacl_put_plt0 (htab
, output_bfd
, splt
,
16491 got_address
+ 8 - (plt_address
+ 16));
16492 else if (using_thumb_only (htab
))
16494 got_displacement
= got_address
- (plt_address
+ 12);
16496 plt0_entry
= elf32_thumb2_plt0_entry
;
16497 put_arm_insn (htab
, output_bfd
, plt0_entry
[0],
16498 splt
->contents
+ 0);
16499 put_arm_insn (htab
, output_bfd
, plt0_entry
[1],
16500 splt
->contents
+ 4);
16501 put_arm_insn (htab
, output_bfd
, plt0_entry
[2],
16502 splt
->contents
+ 8);
16504 bfd_put_32 (output_bfd
, got_displacement
, splt
->contents
+ 12);
16508 got_displacement
= got_address
- (plt_address
+ 16);
16510 plt0_entry
= elf32_arm_plt0_entry
;
16511 put_arm_insn (htab
, output_bfd
, plt0_entry
[0],
16512 splt
->contents
+ 0);
16513 put_arm_insn (htab
, output_bfd
, plt0_entry
[1],
16514 splt
->contents
+ 4);
16515 put_arm_insn (htab
, output_bfd
, plt0_entry
[2],
16516 splt
->contents
+ 8);
16517 put_arm_insn (htab
, output_bfd
, plt0_entry
[3],
16518 splt
->contents
+ 12);
16520 #ifdef FOUR_WORD_PLT
16521 /* The displacement value goes in the otherwise-unused
16522 last word of the second entry. */
16523 bfd_put_32 (output_bfd
, got_displacement
, splt
->contents
+ 28);
16525 bfd_put_32 (output_bfd
, got_displacement
, splt
->contents
+ 16);
16530 /* UnixWare sets the entsize of .plt to 4, although that doesn't
16531 really seem like the right value. */
16532 if (splt
->output_section
->owner
== output_bfd
)
16533 elf_section_data (splt
->output_section
)->this_hdr
.sh_entsize
= 4;
16535 if (htab
->dt_tlsdesc_plt
)
16537 bfd_vma got_address
16538 = sgot
->output_section
->vma
+ sgot
->output_offset
;
16539 bfd_vma gotplt_address
= (htab
->root
.sgot
->output_section
->vma
16540 + htab
->root
.sgot
->output_offset
);
16541 bfd_vma plt_address
16542 = splt
->output_section
->vma
+ splt
->output_offset
;
16544 arm_put_trampoline (htab
, output_bfd
,
16545 splt
->contents
+ htab
->dt_tlsdesc_plt
,
16546 dl_tlsdesc_lazy_trampoline
, 6);
16548 bfd_put_32 (output_bfd
,
16549 gotplt_address
+ htab
->dt_tlsdesc_got
16550 - (plt_address
+ htab
->dt_tlsdesc_plt
)
16551 - dl_tlsdesc_lazy_trampoline
[6],
16552 splt
->contents
+ htab
->dt_tlsdesc_plt
+ 24);
16553 bfd_put_32 (output_bfd
,
16554 got_address
- (plt_address
+ htab
->dt_tlsdesc_plt
)
16555 - dl_tlsdesc_lazy_trampoline
[7],
16556 splt
->contents
+ htab
->dt_tlsdesc_plt
+ 24 + 4);
16559 if (htab
->tls_trampoline
)
16561 arm_put_trampoline (htab
, output_bfd
,
16562 splt
->contents
+ htab
->tls_trampoline
,
16563 tls_trampoline
, 3);
16564 #ifdef FOUR_WORD_PLT
16565 bfd_put_32 (output_bfd
, 0x00000000,
16566 splt
->contents
+ htab
->tls_trampoline
+ 12);
16570 if (htab
->vxworks_p
16571 && !bfd_link_pic (info
)
16572 && htab
->root
.splt
->size
> 0)
16574 /* Correct the .rel(a).plt.unloaded relocations. They will have
16575 incorrect symbol indexes. */
16579 num_plts
= ((htab
->root
.splt
->size
- htab
->plt_header_size
)
16580 / htab
->plt_entry_size
);
16581 p
= htab
->srelplt2
->contents
+ RELOC_SIZE (htab
);
16583 for (; num_plts
; num_plts
--)
16585 Elf_Internal_Rela rel
;
16587 SWAP_RELOC_IN (htab
) (output_bfd
, p
, &rel
);
16588 rel
.r_info
= ELF32_R_INFO (htab
->root
.hgot
->indx
, R_ARM_ABS32
);
16589 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, p
);
16590 p
+= RELOC_SIZE (htab
);
16592 SWAP_RELOC_IN (htab
) (output_bfd
, p
, &rel
);
16593 rel
.r_info
= ELF32_R_INFO (htab
->root
.hplt
->indx
, R_ARM_ABS32
);
16594 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, p
);
16595 p
+= RELOC_SIZE (htab
);
16600 if (htab
->nacl_p
&& htab
->root
.iplt
!= NULL
&& htab
->root
.iplt
->size
> 0)
16601 /* NaCl uses a special first entry in .iplt too. */
16602 arm_nacl_put_plt0 (htab
, output_bfd
, htab
->root
.iplt
, 0);
16604 /* Fill in the first three entries in the global offset table. */
16607 if (sgot
->size
> 0)
16610 bfd_put_32 (output_bfd
, (bfd_vma
) 0, sgot
->contents
);
16612 bfd_put_32 (output_bfd
,
16613 sdyn
->output_section
->vma
+ sdyn
->output_offset
,
16615 bfd_put_32 (output_bfd
, (bfd_vma
) 0, sgot
->contents
+ 4);
16616 bfd_put_32 (output_bfd
, (bfd_vma
) 0, sgot
->contents
+ 8);
16619 elf_section_data (sgot
->output_section
)->this_hdr
.sh_entsize
= 4;
16626 elf32_arm_post_process_headers (bfd
* abfd
, struct bfd_link_info
* link_info ATTRIBUTE_UNUSED
)
16628 Elf_Internal_Ehdr
* i_ehdrp
; /* ELF file header, internal form. */
16629 struct elf32_arm_link_hash_table
*globals
;
16630 struct elf_segment_map
*m
;
16632 i_ehdrp
= elf_elfheader (abfd
);
16634 if (EF_ARM_EABI_VERSION (i_ehdrp
->e_flags
) == EF_ARM_EABI_UNKNOWN
)
16635 i_ehdrp
->e_ident
[EI_OSABI
] = ELFOSABI_ARM
;
16637 _bfd_elf_post_process_headers (abfd
, link_info
);
16638 i_ehdrp
->e_ident
[EI_ABIVERSION
] = ARM_ELF_ABI_VERSION
;
16642 globals
= elf32_arm_hash_table (link_info
);
16643 if (globals
!= NULL
&& globals
->byteswap_code
)
16644 i_ehdrp
->e_flags
|= EF_ARM_BE8
;
16647 if (EF_ARM_EABI_VERSION (i_ehdrp
->e_flags
) == EF_ARM_EABI_VER5
16648 && ((i_ehdrp
->e_type
== ET_DYN
) || (i_ehdrp
->e_type
== ET_EXEC
)))
16650 int abi
= bfd_elf_get_obj_attr_int (abfd
, OBJ_ATTR_PROC
, Tag_ABI_VFP_args
);
16651 if (abi
== AEABI_VFP_args_vfp
)
16652 i_ehdrp
->e_flags
|= EF_ARM_ABI_FLOAT_HARD
;
16654 i_ehdrp
->e_flags
|= EF_ARM_ABI_FLOAT_SOFT
;
16657 /* Scan segment to set p_flags attribute if it contains only sections with
16658 SHF_ARM_PURECODE flag. */
16659 for (m
= elf_seg_map (abfd
); m
!= NULL
; m
= m
->next
)
16665 for (j
= 0; j
< m
->count
; j
++)
16667 if (!(elf_section_flags (m
->sections
[j
]) & SHF_ARM_PURECODE
))
16673 m
->p_flags_valid
= 1;
16678 static enum elf_reloc_type_class
16679 elf32_arm_reloc_type_class (const struct bfd_link_info
*info ATTRIBUTE_UNUSED
,
16680 const asection
*rel_sec ATTRIBUTE_UNUSED
,
16681 const Elf_Internal_Rela
*rela
)
16683 switch ((int) ELF32_R_TYPE (rela
->r_info
))
16685 case R_ARM_RELATIVE
:
16686 return reloc_class_relative
;
16687 case R_ARM_JUMP_SLOT
:
16688 return reloc_class_plt
;
16690 return reloc_class_copy
;
16691 case R_ARM_IRELATIVE
:
16692 return reloc_class_ifunc
;
16694 return reloc_class_normal
;
16699 elf32_arm_final_write_processing (bfd
*abfd
, bfd_boolean linker ATTRIBUTE_UNUSED
)
16701 bfd_arm_update_notes (abfd
, ARM_NOTE_SECTION
);
16704 /* Return TRUE if this is an unwinding table entry. */
16707 is_arm_elf_unwind_section_name (bfd
* abfd ATTRIBUTE_UNUSED
, const char * name
)
16709 return (CONST_STRNEQ (name
, ELF_STRING_ARM_unwind
)
16710 || CONST_STRNEQ (name
, ELF_STRING_ARM_unwind_once
));
16714 /* Set the type and flags for an ARM section. We do this by
16715 the section name, which is a hack, but ought to work. */
16718 elf32_arm_fake_sections (bfd
* abfd
, Elf_Internal_Shdr
* hdr
, asection
* sec
)
16722 name
= bfd_get_section_name (abfd
, sec
);
16724 if (is_arm_elf_unwind_section_name (abfd
, name
))
16726 hdr
->sh_type
= SHT_ARM_EXIDX
;
16727 hdr
->sh_flags
|= SHF_LINK_ORDER
;
16730 if (sec
->flags
& SEC_ELF_PURECODE
)
16731 hdr
->sh_flags
|= SHF_ARM_PURECODE
;
16736 /* Handle an ARM specific section when reading an object file. This is
16737 called when bfd_section_from_shdr finds a section with an unknown
16741 elf32_arm_section_from_shdr (bfd
*abfd
,
16742 Elf_Internal_Shdr
* hdr
,
16746 /* There ought to be a place to keep ELF backend specific flags, but
16747 at the moment there isn't one. We just keep track of the
16748 sections by their name, instead. Fortunately, the ABI gives
16749 names for all the ARM specific sections, so we will probably get
16751 switch (hdr
->sh_type
)
16753 case SHT_ARM_EXIDX
:
16754 case SHT_ARM_PREEMPTMAP
:
16755 case SHT_ARM_ATTRIBUTES
:
16762 if (! _bfd_elf_make_section_from_shdr (abfd
, hdr
, name
, shindex
))
16768 static _arm_elf_section_data
*
16769 get_arm_elf_section_data (asection
* sec
)
16771 if (sec
&& sec
->owner
&& is_arm_elf (sec
->owner
))
16772 return elf32_arm_section_data (sec
);
16780 struct bfd_link_info
*info
;
16783 int (*func
) (void *, const char *, Elf_Internal_Sym
*,
16784 asection
*, struct elf_link_hash_entry
*);
16785 } output_arch_syminfo
;
16787 enum map_symbol_type
16795 /* Output a single mapping symbol. */
16798 elf32_arm_output_map_sym (output_arch_syminfo
*osi
,
16799 enum map_symbol_type type
,
16802 static const char *names
[3] = {"$a", "$t", "$d"};
16803 Elf_Internal_Sym sym
;
16805 sym
.st_value
= osi
->sec
->output_section
->vma
16806 + osi
->sec
->output_offset
16810 sym
.st_info
= ELF_ST_INFO (STB_LOCAL
, STT_NOTYPE
);
16811 sym
.st_shndx
= osi
->sec_shndx
;
16812 sym
.st_target_internal
= 0;
16813 elf32_arm_section_map_add (osi
->sec
, names
[type
][1], offset
);
16814 return osi
->func (osi
->flaginfo
, names
[type
], &sym
, osi
->sec
, NULL
) == 1;
16817 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
16818 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
16821 elf32_arm_output_plt_map_1 (output_arch_syminfo
*osi
,
16822 bfd_boolean is_iplt_entry_p
,
16823 union gotplt_union
*root_plt
,
16824 struct arm_plt_info
*arm_plt
)
16826 struct elf32_arm_link_hash_table
*htab
;
16827 bfd_vma addr
, plt_header_size
;
16829 if (root_plt
->offset
== (bfd_vma
) -1)
16832 htab
= elf32_arm_hash_table (osi
->info
);
16836 if (is_iplt_entry_p
)
16838 osi
->sec
= htab
->root
.iplt
;
16839 plt_header_size
= 0;
16843 osi
->sec
= htab
->root
.splt
;
16844 plt_header_size
= htab
->plt_header_size
;
16846 osi
->sec_shndx
= (_bfd_elf_section_from_bfd_section
16847 (osi
->info
->output_bfd
, osi
->sec
->output_section
));
16849 addr
= root_plt
->offset
& -2;
16850 if (htab
->symbian_p
)
16852 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
16854 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 4))
16857 else if (htab
->vxworks_p
)
16859 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
16861 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 8))
16863 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
+ 12))
16865 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 20))
16868 else if (htab
->nacl_p
)
16870 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
16873 else if (using_thumb_only (htab
))
16875 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_THUMB
, addr
))
16880 bfd_boolean thumb_stub_p
;
16882 thumb_stub_p
= elf32_arm_plt_needs_thumb_stub_p (osi
->info
, arm_plt
);
16885 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_THUMB
, addr
- 4))
16888 #ifdef FOUR_WORD_PLT
16889 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
16891 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 12))
16894 /* A three-word PLT with no Thumb thunk contains only Arm code,
16895 so only need to output a mapping symbol for the first PLT entry and
16896 entries with thumb thunks. */
16897 if (thumb_stub_p
|| addr
== plt_header_size
)
16899 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
16908 /* Output mapping symbols for PLT entries associated with H. */
16911 elf32_arm_output_plt_map (struct elf_link_hash_entry
*h
, void *inf
)
16913 output_arch_syminfo
*osi
= (output_arch_syminfo
*) inf
;
16914 struct elf32_arm_link_hash_entry
*eh
;
16916 if (h
->root
.type
== bfd_link_hash_indirect
)
16919 if (h
->root
.type
== bfd_link_hash_warning
)
16920 /* When warning symbols are created, they **replace** the "real"
16921 entry in the hash table, thus we never get to see the real
16922 symbol in a hash traversal. So look at it now. */
16923 h
= (struct elf_link_hash_entry
*) h
->root
.u
.i
.link
;
16925 eh
= (struct elf32_arm_link_hash_entry
*) h
;
16926 return elf32_arm_output_plt_map_1 (osi
, SYMBOL_CALLS_LOCAL (osi
->info
, h
),
16927 &h
->plt
, &eh
->plt
);
16930 /* Bind a veneered symbol to its veneer identified by its hash entry
16931 STUB_ENTRY. The veneered location thus loose its symbol. */
16934 arm_stub_claim_sym (struct elf32_arm_stub_hash_entry
*stub_entry
)
16936 struct elf32_arm_link_hash_entry
*hash
= stub_entry
->h
;
16939 hash
->root
.root
.u
.def
.section
= stub_entry
->stub_sec
;
16940 hash
->root
.root
.u
.def
.value
= stub_entry
->stub_offset
;
16941 hash
->root
.size
= stub_entry
->stub_size
;
16944 /* Output a single local symbol for a generated stub. */
16947 elf32_arm_output_stub_sym (output_arch_syminfo
*osi
, const char *name
,
16948 bfd_vma offset
, bfd_vma size
)
16950 Elf_Internal_Sym sym
;
16952 sym
.st_value
= osi
->sec
->output_section
->vma
16953 + osi
->sec
->output_offset
16955 sym
.st_size
= size
;
16957 sym
.st_info
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
16958 sym
.st_shndx
= osi
->sec_shndx
;
16959 sym
.st_target_internal
= 0;
16960 return osi
->func (osi
->flaginfo
, name
, &sym
, osi
->sec
, NULL
) == 1;
16964 arm_map_one_stub (struct bfd_hash_entry
* gen_entry
,
16967 struct elf32_arm_stub_hash_entry
*stub_entry
;
16968 asection
*stub_sec
;
16971 output_arch_syminfo
*osi
;
16972 const insn_sequence
*template_sequence
;
16973 enum stub_insn_type prev_type
;
16976 enum map_symbol_type sym_type
;
16978 /* Massage our args to the form they really have. */
16979 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
16980 osi
= (output_arch_syminfo
*) in_arg
;
16982 stub_sec
= stub_entry
->stub_sec
;
16984 /* Ensure this stub is attached to the current section being
16986 if (stub_sec
!= osi
->sec
)
16989 addr
= (bfd_vma
) stub_entry
->stub_offset
;
16990 template_sequence
= stub_entry
->stub_template
;
16992 if (arm_stub_sym_claimed (stub_entry
->stub_type
))
16993 arm_stub_claim_sym (stub_entry
);
16996 stub_name
= stub_entry
->output_name
;
16997 switch (template_sequence
[0].type
)
17000 if (!elf32_arm_output_stub_sym (osi
, stub_name
, addr
,
17001 stub_entry
->stub_size
))
17006 if (!elf32_arm_output_stub_sym (osi
, stub_name
, addr
| 1,
17007 stub_entry
->stub_size
))
17016 prev_type
= DATA_TYPE
;
17018 for (i
= 0; i
< stub_entry
->stub_template_size
; i
++)
17020 switch (template_sequence
[i
].type
)
17023 sym_type
= ARM_MAP_ARM
;
17028 sym_type
= ARM_MAP_THUMB
;
17032 sym_type
= ARM_MAP_DATA
;
17040 if (template_sequence
[i
].type
!= prev_type
)
17042 prev_type
= template_sequence
[i
].type
;
17043 if (!elf32_arm_output_map_sym (osi
, sym_type
, addr
+ size
))
17047 switch (template_sequence
[i
].type
)
17071 /* Output mapping symbols for linker generated sections,
17072 and for those data-only sections that do not have a
17076 elf32_arm_output_arch_local_syms (bfd
*output_bfd
,
17077 struct bfd_link_info
*info
,
17079 int (*func
) (void *, const char *,
17080 Elf_Internal_Sym
*,
17082 struct elf_link_hash_entry
*))
17084 output_arch_syminfo osi
;
17085 struct elf32_arm_link_hash_table
*htab
;
17087 bfd_size_type size
;
17090 htab
= elf32_arm_hash_table (info
);
17094 check_use_blx (htab
);
17096 osi
.flaginfo
= flaginfo
;
17100 /* Add a $d mapping symbol to data-only sections that
17101 don't have any mapping symbol. This may result in (harmless) redundant
17102 mapping symbols. */
17103 for (input_bfd
= info
->input_bfds
;
17105 input_bfd
= input_bfd
->link
.next
)
17107 if ((input_bfd
->flags
& (BFD_LINKER_CREATED
| HAS_SYMS
)) == HAS_SYMS
)
17108 for (osi
.sec
= input_bfd
->sections
;
17110 osi
.sec
= osi
.sec
->next
)
17112 if (osi
.sec
->output_section
!= NULL
17113 && ((osi
.sec
->output_section
->flags
& (SEC_ALLOC
| SEC_CODE
))
17115 && (osi
.sec
->flags
& (SEC_HAS_CONTENTS
| SEC_LINKER_CREATED
))
17116 == SEC_HAS_CONTENTS
17117 && get_arm_elf_section_data (osi
.sec
) != NULL
17118 && get_arm_elf_section_data (osi
.sec
)->mapcount
== 0
17119 && osi
.sec
->size
> 0
17120 && (osi
.sec
->flags
& SEC_EXCLUDE
) == 0)
17122 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
17123 (output_bfd
, osi
.sec
->output_section
);
17124 if (osi
.sec_shndx
!= (int)SHN_BAD
)
17125 elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, 0);
17130 /* ARM->Thumb glue. */
17131 if (htab
->arm_glue_size
> 0)
17133 osi
.sec
= bfd_get_linker_section (htab
->bfd_of_glue_owner
,
17134 ARM2THUMB_GLUE_SECTION_NAME
);
17136 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
17137 (output_bfd
, osi
.sec
->output_section
);
17138 if (bfd_link_pic (info
) || htab
->root
.is_relocatable_executable
17139 || htab
->pic_veneer
)
17140 size
= ARM2THUMB_PIC_GLUE_SIZE
;
17141 else if (htab
->use_blx
)
17142 size
= ARM2THUMB_V5_STATIC_GLUE_SIZE
;
17144 size
= ARM2THUMB_STATIC_GLUE_SIZE
;
17146 for (offset
= 0; offset
< htab
->arm_glue_size
; offset
+= size
)
17148 elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, offset
);
17149 elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, offset
+ size
- 4);
17153 /* Thumb->ARM glue. */
17154 if (htab
->thumb_glue_size
> 0)
17156 osi
.sec
= bfd_get_linker_section (htab
->bfd_of_glue_owner
,
17157 THUMB2ARM_GLUE_SECTION_NAME
);
17159 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
17160 (output_bfd
, osi
.sec
->output_section
);
17161 size
= THUMB2ARM_GLUE_SIZE
;
17163 for (offset
= 0; offset
< htab
->thumb_glue_size
; offset
+= size
)
17165 elf32_arm_output_map_sym (&osi
, ARM_MAP_THUMB
, offset
);
17166 elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, offset
+ 4);
17170 /* ARMv4 BX veneers. */
17171 if (htab
->bx_glue_size
> 0)
17173 osi
.sec
= bfd_get_linker_section (htab
->bfd_of_glue_owner
,
17174 ARM_BX_GLUE_SECTION_NAME
);
17176 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
17177 (output_bfd
, osi
.sec
->output_section
);
17179 elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0);
17182 /* Long calls stubs. */
17183 if (htab
->stub_bfd
&& htab
->stub_bfd
->sections
)
17185 asection
* stub_sec
;
17187 for (stub_sec
= htab
->stub_bfd
->sections
;
17189 stub_sec
= stub_sec
->next
)
17191 /* Ignore non-stub sections. */
17192 if (!strstr (stub_sec
->name
, STUB_SUFFIX
))
17195 osi
.sec
= stub_sec
;
17197 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
17198 (output_bfd
, osi
.sec
->output_section
);
17200 bfd_hash_traverse (&htab
->stub_hash_table
, arm_map_one_stub
, &osi
);
17204 /* Finally, output mapping symbols for the PLT. */
17205 if (htab
->root
.splt
&& htab
->root
.splt
->size
> 0)
17207 osi
.sec
= htab
->root
.splt
;
17208 osi
.sec_shndx
= (_bfd_elf_section_from_bfd_section
17209 (output_bfd
, osi
.sec
->output_section
));
17211 /* Output mapping symbols for the plt header. SymbianOS does not have a
17213 if (htab
->vxworks_p
)
17215 /* VxWorks shared libraries have no PLT header. */
17216 if (!bfd_link_pic (info
))
17218 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0))
17220 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, 12))
17224 else if (htab
->nacl_p
)
17226 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0))
17229 else if (using_thumb_only (htab
))
17231 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_THUMB
, 0))
17233 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, 12))
17235 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_THUMB
, 16))
17238 else if (!htab
->symbian_p
)
17240 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0))
17242 #ifndef FOUR_WORD_PLT
17243 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, 16))
17248 if (htab
->nacl_p
&& htab
->root
.iplt
&& htab
->root
.iplt
->size
> 0)
17250 /* NaCl uses a special first entry in .iplt too. */
17251 osi
.sec
= htab
->root
.iplt
;
17252 osi
.sec_shndx
= (_bfd_elf_section_from_bfd_section
17253 (output_bfd
, osi
.sec
->output_section
));
17254 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0))
17257 if ((htab
->root
.splt
&& htab
->root
.splt
->size
> 0)
17258 || (htab
->root
.iplt
&& htab
->root
.iplt
->size
> 0))
17260 elf_link_hash_traverse (&htab
->root
, elf32_arm_output_plt_map
, &osi
);
17261 for (input_bfd
= info
->input_bfds
;
17263 input_bfd
= input_bfd
->link
.next
)
17265 struct arm_local_iplt_info
**local_iplt
;
17266 unsigned int i
, num_syms
;
17268 local_iplt
= elf32_arm_local_iplt (input_bfd
);
17269 if (local_iplt
!= NULL
)
17271 num_syms
= elf_symtab_hdr (input_bfd
).sh_info
;
17272 for (i
= 0; i
< num_syms
; i
++)
17273 if (local_iplt
[i
] != NULL
17274 && !elf32_arm_output_plt_map_1 (&osi
, TRUE
,
17275 &local_iplt
[i
]->root
,
17276 &local_iplt
[i
]->arm
))
17281 if (htab
->dt_tlsdesc_plt
!= 0)
17283 /* Mapping symbols for the lazy tls trampoline. */
17284 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, htab
->dt_tlsdesc_plt
))
17287 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
,
17288 htab
->dt_tlsdesc_plt
+ 24))
17291 if (htab
->tls_trampoline
!= 0)
17293 /* Mapping symbols for the tls trampoline. */
17294 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, htab
->tls_trampoline
))
17296 #ifdef FOUR_WORD_PLT
17297 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
,
17298 htab
->tls_trampoline
+ 12))
17306 /* Filter normal symbols of CMSE entry functions of ABFD to include in
17307 the import library. All SYMCOUNT symbols of ABFD can be examined
17308 from their pointers in SYMS. Pointers of symbols to keep should be
17309 stored continuously at the beginning of that array.
17311 Returns the number of symbols to keep. */
17313 static unsigned int
17314 elf32_arm_filter_cmse_symbols (bfd
*abfd ATTRIBUTE_UNUSED
,
17315 struct bfd_link_info
*info
,
17316 asymbol
**syms
, long symcount
)
17320 long src_count
, dst_count
= 0;
17321 struct elf32_arm_link_hash_table
*htab
;
17323 htab
= elf32_arm_hash_table (info
);
17324 if (!htab
->stub_bfd
|| !htab
->stub_bfd
->sections
)
17328 cmse_name
= (char *) bfd_malloc (maxnamelen
);
17329 for (src_count
= 0; src_count
< symcount
; src_count
++)
17331 struct elf32_arm_link_hash_entry
*cmse_hash
;
17337 sym
= syms
[src_count
];
17338 flags
= sym
->flags
;
17339 name
= (char *) bfd_asymbol_name (sym
);
17341 if ((flags
& BSF_FUNCTION
) != BSF_FUNCTION
)
17343 if (!(flags
& (BSF_GLOBAL
| BSF_WEAK
)))
17346 namelen
= strlen (name
) + sizeof (CMSE_PREFIX
) + 1;
17347 if (namelen
> maxnamelen
)
17349 cmse_name
= (char *)
17350 bfd_realloc (cmse_name
, namelen
);
17351 maxnamelen
= namelen
;
17353 snprintf (cmse_name
, maxnamelen
, "%s%s", CMSE_PREFIX
, name
);
17354 cmse_hash
= (struct elf32_arm_link_hash_entry
*)
17355 elf_link_hash_lookup (&(htab
)->root
, cmse_name
, FALSE
, FALSE
, TRUE
);
17358 || (cmse_hash
->root
.root
.type
!= bfd_link_hash_defined
17359 && cmse_hash
->root
.root
.type
!= bfd_link_hash_defweak
)
17360 || cmse_hash
->root
.type
!= STT_FUNC
)
17363 if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash
->root
.target_internal
))
17366 syms
[dst_count
++] = sym
;
17370 syms
[dst_count
] = NULL
;
17375 /* Filter symbols of ABFD to include in the import library. All
17376 SYMCOUNT symbols of ABFD can be examined from their pointers in
17377 SYMS. Pointers of symbols to keep should be stored continuously at
17378 the beginning of that array.
17380 Returns the number of symbols to keep. */
17382 static unsigned int
17383 elf32_arm_filter_implib_symbols (bfd
*abfd ATTRIBUTE_UNUSED
,
17384 struct bfd_link_info
*info
,
17385 asymbol
**syms
, long symcount
)
17387 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (info
);
17389 /* Requirement 8 of "ARM v8-M Security Extensions: Requirements on
17390 Development Tools" (ARM-ECM-0359818) mandates Secure Gateway import
17391 library to be a relocatable object file. */
17392 BFD_ASSERT (!(bfd_get_file_flags (info
->out_implib_bfd
) & EXEC_P
));
17393 if (globals
->cmse_implib
)
17394 return elf32_arm_filter_cmse_symbols (abfd
, info
, syms
, symcount
);
17396 return _bfd_elf_filter_global_symbols (abfd
, info
, syms
, symcount
);
17399 /* Allocate target specific section data. */
17402 elf32_arm_new_section_hook (bfd
*abfd
, asection
*sec
)
17404 if (!sec
->used_by_bfd
)
17406 _arm_elf_section_data
*sdata
;
17407 bfd_size_type amt
= sizeof (*sdata
);
17409 sdata
= (_arm_elf_section_data
*) bfd_zalloc (abfd
, amt
);
17412 sec
->used_by_bfd
= sdata
;
17415 return _bfd_elf_new_section_hook (abfd
, sec
);
17419 /* Used to order a list of mapping symbols by address. */
17422 elf32_arm_compare_mapping (const void * a
, const void * b
)
17424 const elf32_arm_section_map
*amap
= (const elf32_arm_section_map
*) a
;
17425 const elf32_arm_section_map
*bmap
= (const elf32_arm_section_map
*) b
;
17427 if (amap
->vma
> bmap
->vma
)
17429 else if (amap
->vma
< bmap
->vma
)
17431 else if (amap
->type
> bmap
->type
)
17432 /* Ensure results do not depend on the host qsort for objects with
17433 multiple mapping symbols at the same address by sorting on type
17436 else if (amap
->type
< bmap
->type
)
17442 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
17444 static unsigned long
17445 offset_prel31 (unsigned long addr
, bfd_vma offset
)
17447 return (addr
& ~0x7ffffffful
) | ((addr
+ offset
) & 0x7ffffffful
);
17450 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
17454 copy_exidx_entry (bfd
*output_bfd
, bfd_byte
*to
, bfd_byte
*from
, bfd_vma offset
)
17456 unsigned long first_word
= bfd_get_32 (output_bfd
, from
);
17457 unsigned long second_word
= bfd_get_32 (output_bfd
, from
+ 4);
17459 /* High bit of first word is supposed to be zero. */
17460 if ((first_word
& 0x80000000ul
) == 0)
17461 first_word
= offset_prel31 (first_word
, offset
);
17463 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
17464 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
17465 if ((second_word
!= 0x1) && ((second_word
& 0x80000000ul
) == 0))
17466 second_word
= offset_prel31 (second_word
, offset
);
17468 bfd_put_32 (output_bfd
, first_word
, to
);
17469 bfd_put_32 (output_bfd
, second_word
, to
+ 4);
17472 /* Data for make_branch_to_a8_stub(). */
17474 struct a8_branch_to_stub_data
17476 asection
*writing_section
;
17477 bfd_byte
*contents
;
17481 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
17482 places for a particular section. */
17485 make_branch_to_a8_stub (struct bfd_hash_entry
*gen_entry
,
17488 struct elf32_arm_stub_hash_entry
*stub_entry
;
17489 struct a8_branch_to_stub_data
*data
;
17490 bfd_byte
*contents
;
17491 unsigned long branch_insn
;
17492 bfd_vma veneered_insn_loc
, veneer_entry_loc
;
17493 bfd_signed_vma branch_offset
;
17497 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
17498 data
= (struct a8_branch_to_stub_data
*) in_arg
;
17500 if (stub_entry
->target_section
!= data
->writing_section
17501 || stub_entry
->stub_type
< arm_stub_a8_veneer_lwm
)
17504 contents
= data
->contents
;
17506 /* We use target_section as Cortex-A8 erratum workaround stubs are only
17507 generated when both source and target are in the same section. */
17508 veneered_insn_loc
= stub_entry
->target_section
->output_section
->vma
17509 + stub_entry
->target_section
->output_offset
17510 + stub_entry
->source_value
;
17512 veneer_entry_loc
= stub_entry
->stub_sec
->output_section
->vma
17513 + stub_entry
->stub_sec
->output_offset
17514 + stub_entry
->stub_offset
;
17516 if (stub_entry
->stub_type
== arm_stub_a8_veneer_blx
)
17517 veneered_insn_loc
&= ~3u;
17519 branch_offset
= veneer_entry_loc
- veneered_insn_loc
- 4;
17521 abfd
= stub_entry
->target_section
->owner
;
17522 loc
= stub_entry
->source_value
;
17524 /* We attempt to avoid this condition by setting stubs_always_after_branch
17525 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
17526 This check is just to be on the safe side... */
17527 if ((veneered_insn_loc
& ~0xfff) == (veneer_entry_loc
& ~0xfff))
17529 _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub is "
17530 "allocated in unsafe location"), abfd
);
17534 switch (stub_entry
->stub_type
)
17536 case arm_stub_a8_veneer_b
:
17537 case arm_stub_a8_veneer_b_cond
:
17538 branch_insn
= 0xf0009000;
17541 case arm_stub_a8_veneer_blx
:
17542 branch_insn
= 0xf000e800;
17545 case arm_stub_a8_veneer_bl
:
17547 unsigned int i1
, j1
, i2
, j2
, s
;
17549 branch_insn
= 0xf000d000;
17552 if (branch_offset
< -16777216 || branch_offset
> 16777214)
17554 /* There's not much we can do apart from complain if this
17556 _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub out "
17557 "of range (input file too large)"), abfd
);
17561 /* i1 = not(j1 eor s), so:
17563 j1 = (not i1) eor s. */
17565 branch_insn
|= (branch_offset
>> 1) & 0x7ff;
17566 branch_insn
|= ((branch_offset
>> 12) & 0x3ff) << 16;
17567 i2
= (branch_offset
>> 22) & 1;
17568 i1
= (branch_offset
>> 23) & 1;
17569 s
= (branch_offset
>> 24) & 1;
17572 branch_insn
|= j2
<< 11;
17573 branch_insn
|= j1
<< 13;
17574 branch_insn
|= s
<< 26;
17583 bfd_put_16 (abfd
, (branch_insn
>> 16) & 0xffff, &contents
[loc
]);
17584 bfd_put_16 (abfd
, branch_insn
& 0xffff, &contents
[loc
+ 2]);
17589 /* Beginning of stm32l4xx work-around. */
17591 /* Functions encoding instructions necessary for the emission of the
17592 fix-stm32l4xx-629360.
17593 Encoding is extracted from the
17594 ARM (C) Architecture Reference Manual
17595 ARMv7-A and ARMv7-R edition
17596 ARM DDI 0406C.b (ID072512). */
17598 static inline bfd_vma
17599 create_instruction_branch_absolute (int branch_offset
)
17601 /* A8.8.18 B (A8-334)
17602 B target_address (Encoding T4). */
17603 /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii. */
17604 /* jump offset is: S:I1:I2:imm10:imm11:0. */
17605 /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S). */
17607 int s
= ((branch_offset
& 0x1000000) >> 24);
17608 int j1
= s
^ !((branch_offset
& 0x800000) >> 23);
17609 int j2
= s
^ !((branch_offset
& 0x400000) >> 22);
17611 if (branch_offset
< -(1 << 24) || branch_offset
>= (1 << 24))
17612 BFD_ASSERT (0 && "Error: branch out of range. Cannot create branch.");
17614 bfd_vma patched_inst
= 0xf0009000
17616 | (((unsigned long) (branch_offset
) >> 12) & 0x3ff) << 16 /* imm10. */
17617 | j1
<< 13 /* J1. */
17618 | j2
<< 11 /* J2. */
17619 | (((unsigned long) (branch_offset
) >> 1) & 0x7ff); /* imm11. */
17621 return patched_inst
;
17624 static inline bfd_vma
17625 create_instruction_ldmia (int base_reg
, int wback
, int reg_mask
)
17627 /* A8.8.57 LDM/LDMIA/LDMFD (A8-396)
17628 LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2). */
17629 bfd_vma patched_inst
= 0xe8900000
17630 | (/*W=*/wback
<< 21)
17632 | (reg_mask
& 0x0000ffff);
17634 return patched_inst
;
17637 static inline bfd_vma
17638 create_instruction_ldmdb (int base_reg
, int wback
, int reg_mask
)
17640 /* A8.8.60 LDMDB/LDMEA (A8-402)
17641 LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1). */
17642 bfd_vma patched_inst
= 0xe9100000
17643 | (/*W=*/wback
<< 21)
17645 | (reg_mask
& 0x0000ffff);
17647 return patched_inst
;
17650 static inline bfd_vma
17651 create_instruction_mov (int target_reg
, int source_reg
)
17653 /* A8.8.103 MOV (register) (A8-486)
17654 MOV Rd, Rm (Encoding T1). */
17655 bfd_vma patched_inst
= 0x4600
17656 | (target_reg
& 0x7)
17657 | ((target_reg
& 0x8) >> 3) << 7
17658 | (source_reg
<< 3);
17660 return patched_inst
;
17663 static inline bfd_vma
17664 create_instruction_sub (int target_reg
, int source_reg
, int value
)
17666 /* A8.8.221 SUB (immediate) (A8-708)
17667 SUB Rd, Rn, #value (Encoding T3). */
17668 bfd_vma patched_inst
= 0xf1a00000
17669 | (target_reg
<< 8)
17670 | (source_reg
<< 16)
17672 | ((value
& 0x800) >> 11) << 26
17673 | ((value
& 0x700) >> 8) << 12
17676 return patched_inst
;
17679 static inline bfd_vma
17680 create_instruction_vldmia (int base_reg
, int is_dp
, int wback
, int num_words
,
17683 /* A8.8.332 VLDM (A8-922)
17684 VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */
17685 bfd_vma patched_inst
= (is_dp
? 0xec900b00 : 0xec900a00)
17686 | (/*W=*/wback
<< 21)
17688 | (num_words
& 0x000000ff)
17689 | (((unsigned)first_reg
>> 1) & 0x0000000f) << 12
17690 | (first_reg
& 0x00000001) << 22;
17692 return patched_inst
;
17695 static inline bfd_vma
17696 create_instruction_vldmdb (int base_reg
, int is_dp
, int num_words
,
17699 /* A8.8.332 VLDM (A8-922)
17700 VLMD{MODE} Rn!, {} (Encoding T1 or T2). */
17701 bfd_vma patched_inst
= (is_dp
? 0xed300b00 : 0xed300a00)
17703 | (num_words
& 0x000000ff)
17704 | (((unsigned)first_reg
>>1 ) & 0x0000000f) << 12
17705 | (first_reg
& 0x00000001) << 22;
17707 return patched_inst
;
17710 static inline bfd_vma
17711 create_instruction_udf_w (int value
)
17713 /* A8.8.247 UDF (A8-758)
17714 Undefined (Encoding T2). */
17715 bfd_vma patched_inst
= 0xf7f0a000
17716 | (value
& 0x00000fff)
17717 | (value
& 0x000f0000) << 16;
17719 return patched_inst
;
17722 static inline bfd_vma
17723 create_instruction_udf (int value
)
17725 /* A8.8.247 UDF (A8-758)
17726 Undefined (Encoding T1). */
17727 bfd_vma patched_inst
= 0xde00
17730 return patched_inst
;
17733 /* Functions writing an instruction in memory, returning the next
17734 memory position to write to. */
17736 static inline bfd_byte
*
17737 push_thumb2_insn32 (struct elf32_arm_link_hash_table
* htab
,
17738 bfd
* output_bfd
, bfd_byte
*pt
, insn32 insn
)
17740 put_thumb2_insn (htab
, output_bfd
, insn
, pt
);
17744 static inline bfd_byte
*
17745 push_thumb2_insn16 (struct elf32_arm_link_hash_table
* htab
,
17746 bfd
* output_bfd
, bfd_byte
*pt
, insn32 insn
)
17748 put_thumb_insn (htab
, output_bfd
, insn
, pt
);
17752 /* Function filling up a region in memory with T1 and T2 UDFs taking
17753 care of alignment. */
17756 stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table
* htab
,
17758 const bfd_byte
* const base_stub_contents
,
17759 bfd_byte
* const from_stub_contents
,
17760 const bfd_byte
* const end_stub_contents
)
17762 bfd_byte
*current_stub_contents
= from_stub_contents
;
17764 /* Fill the remaining of the stub with deterministic contents : UDF
17766 Check if realignment is needed on modulo 4 frontier using T1, to
17768 if ((current_stub_contents
< end_stub_contents
)
17769 && !((current_stub_contents
- base_stub_contents
) % 2)
17770 && ((current_stub_contents
- base_stub_contents
) % 4))
17771 current_stub_contents
=
17772 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
17773 create_instruction_udf (0));
17775 for (; current_stub_contents
< end_stub_contents
;)
17776 current_stub_contents
=
17777 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17778 create_instruction_udf_w (0));
17780 return current_stub_contents
;
17783 /* Functions writing the stream of instructions equivalent to the
17784 derived sequence for ldmia, ldmdb, vldm respectively. */
17787 stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table
* htab
,
17789 const insn32 initial_insn
,
17790 const bfd_byte
*const initial_insn_addr
,
17791 bfd_byte
*const base_stub_contents
)
17793 int wback
= (initial_insn
& 0x00200000) >> 21;
17794 int ri
, rn
= (initial_insn
& 0x000F0000) >> 16;
17795 int insn_all_registers
= initial_insn
& 0x0000ffff;
17796 int insn_low_registers
, insn_high_registers
;
17797 int usable_register_mask
;
17798 int nb_registers
= elf32_arm_popcount (insn_all_registers
);
17799 int restore_pc
= (insn_all_registers
& (1 << 15)) ? 1 : 0;
17800 int restore_rn
= (insn_all_registers
& (1 << rn
)) ? 1 : 0;
17801 bfd_byte
*current_stub_contents
= base_stub_contents
;
17803 BFD_ASSERT (is_thumb2_ldmia (initial_insn
));
17805 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
17806 smaller than 8 registers load sequences that do not cause the
17808 if (nb_registers
<= 8)
17810 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
17811 current_stub_contents
=
17812 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17815 /* B initial_insn_addr+4. */
17817 current_stub_contents
=
17818 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17819 create_instruction_branch_absolute
17820 (initial_insn_addr
- current_stub_contents
));
17822 /* Fill the remaining of the stub with deterministic contents. */
17823 current_stub_contents
=
17824 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
17825 base_stub_contents
, current_stub_contents
,
17826 base_stub_contents
+
17827 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
);
17832 /* - reg_list[13] == 0. */
17833 BFD_ASSERT ((insn_all_registers
& (1 << 13))==0);
17835 /* - reg_list[14] & reg_list[15] != 1. */
17836 BFD_ASSERT ((insn_all_registers
& 0xC000) != 0xC000);
17838 /* - if (wback==1) reg_list[rn] == 0. */
17839 BFD_ASSERT (!wback
|| !restore_rn
);
17841 /* - nb_registers > 8. */
17842 BFD_ASSERT (elf32_arm_popcount (insn_all_registers
) > 8);
17844 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
17846 /* In the following algorithm, we split this wide LDM using 2 LDM insns:
17847 - One with the 7 lowest registers (register mask 0x007F)
17848 This LDM will finally contain between 2 and 7 registers
17849 - One with the 7 highest registers (register mask 0xDF80)
17850 This ldm will finally contain between 2 and 7 registers. */
17851 insn_low_registers
= insn_all_registers
& 0x007F;
17852 insn_high_registers
= insn_all_registers
& 0xDF80;
17854 /* A spare register may be needed during this veneer to temporarily
17855 handle the base register. This register will be restored with the
17856 last LDM operation.
17857 The usable register may be any general purpose register (that
17858 excludes PC, SP, LR : register mask is 0x1FFF). */
17859 usable_register_mask
= 0x1FFF;
17861 /* Generate the stub function. */
17864 /* LDMIA Rn!, {R-low-register-list} : (Encoding T2). */
17865 current_stub_contents
=
17866 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17867 create_instruction_ldmia
17868 (rn
, /*wback=*/1, insn_low_registers
));
17870 /* LDMIA Rn!, {R-high-register-list} : (Encoding T2). */
17871 current_stub_contents
=
17872 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17873 create_instruction_ldmia
17874 (rn
, /*wback=*/1, insn_high_registers
));
17877 /* B initial_insn_addr+4. */
17878 current_stub_contents
=
17879 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17880 create_instruction_branch_absolute
17881 (initial_insn_addr
- current_stub_contents
));
17884 else /* if (!wback). */
17888 /* If Rn is not part of the high-register-list, move it there. */
17889 if (!(insn_high_registers
& (1 << rn
)))
17891 /* Choose a Ri in the high-register-list that will be restored. */
17892 ri
= ctz (insn_high_registers
& usable_register_mask
& ~(1 << rn
));
17895 current_stub_contents
=
17896 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
17897 create_instruction_mov (ri
, rn
));
17900 /* LDMIA Ri!, {R-low-register-list} : (Encoding T2). */
17901 current_stub_contents
=
17902 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17903 create_instruction_ldmia
17904 (ri
, /*wback=*/1, insn_low_registers
));
17906 /* LDMIA Ri, {R-high-register-list} : (Encoding T2). */
17907 current_stub_contents
=
17908 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17909 create_instruction_ldmia
17910 (ri
, /*wback=*/0, insn_high_registers
));
17914 /* B initial_insn_addr+4. */
17915 current_stub_contents
=
17916 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17917 create_instruction_branch_absolute
17918 (initial_insn_addr
- current_stub_contents
));
17922 /* Fill the remaining of the stub with deterministic contents. */
17923 current_stub_contents
=
17924 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
17925 base_stub_contents
, current_stub_contents
,
17926 base_stub_contents
+
17927 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
);
17931 stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table
* htab
,
17933 const insn32 initial_insn
,
17934 const bfd_byte
*const initial_insn_addr
,
17935 bfd_byte
*const base_stub_contents
)
17937 int wback
= (initial_insn
& 0x00200000) >> 21;
17938 int ri
, rn
= (initial_insn
& 0x000f0000) >> 16;
17939 int insn_all_registers
= initial_insn
& 0x0000ffff;
17940 int insn_low_registers
, insn_high_registers
;
17941 int usable_register_mask
;
17942 int restore_pc
= (insn_all_registers
& (1 << 15)) ? 1 : 0;
17943 int restore_rn
= (insn_all_registers
& (1 << rn
)) ? 1 : 0;
17944 int nb_registers
= elf32_arm_popcount (insn_all_registers
);
17945 bfd_byte
*current_stub_contents
= base_stub_contents
;
17947 BFD_ASSERT (is_thumb2_ldmdb (initial_insn
));
17949 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
17950 smaller than 8 registers load sequences that do not cause the
17952 if (nb_registers
<= 8)
17954 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
17955 current_stub_contents
=
17956 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17959 /* B initial_insn_addr+4. */
17960 current_stub_contents
=
17961 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17962 create_instruction_branch_absolute
17963 (initial_insn_addr
- current_stub_contents
));
17965 /* Fill the remaining of the stub with deterministic contents. */
17966 current_stub_contents
=
17967 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
17968 base_stub_contents
, current_stub_contents
,
17969 base_stub_contents
+
17970 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
);
17975 /* - reg_list[13] == 0. */
17976 BFD_ASSERT ((insn_all_registers
& (1 << 13)) == 0);
17978 /* - reg_list[14] & reg_list[15] != 1. */
17979 BFD_ASSERT ((insn_all_registers
& 0xC000) != 0xC000);
17981 /* - if (wback==1) reg_list[rn] == 0. */
17982 BFD_ASSERT (!wback
|| !restore_rn
);
17984 /* - nb_registers > 8. */
17985 BFD_ASSERT (elf32_arm_popcount (insn_all_registers
) > 8);
17987 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
17989 /* In the following algorithm, we split this wide LDM using 2 LDM insn:
17990 - One with the 7 lowest registers (register mask 0x007F)
17991 This LDM will finally contain between 2 and 7 registers
17992 - One with the 7 highest registers (register mask 0xDF80)
17993 This ldm will finally contain between 2 and 7 registers. */
17994 insn_low_registers
= insn_all_registers
& 0x007F;
17995 insn_high_registers
= insn_all_registers
& 0xDF80;
17997 /* A spare register may be needed during this veneer to temporarily
17998 handle the base register. This register will be restored with
17999 the last LDM operation.
18000 The usable register may be any general purpose register (that excludes
18001 PC, SP, LR : register mask is 0x1FFF). */
18002 usable_register_mask
= 0x1FFF;
18004 /* Generate the stub function. */
18005 if (!wback
&& !restore_pc
&& !restore_rn
)
18007 /* Choose a Ri in the low-register-list that will be restored. */
18008 ri
= ctz (insn_low_registers
& usable_register_mask
& ~(1 << rn
));
18011 current_stub_contents
=
18012 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
18013 create_instruction_mov (ri
, rn
));
18015 /* LDMDB Ri!, {R-high-register-list}. */
18016 current_stub_contents
=
18017 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18018 create_instruction_ldmdb
18019 (ri
, /*wback=*/1, insn_high_registers
));
18021 /* LDMDB Ri, {R-low-register-list}. */
18022 current_stub_contents
=
18023 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18024 create_instruction_ldmdb
18025 (ri
, /*wback=*/0, insn_low_registers
));
18027 /* B initial_insn_addr+4. */
18028 current_stub_contents
=
18029 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18030 create_instruction_branch_absolute
18031 (initial_insn_addr
- current_stub_contents
));
18033 else if (wback
&& !restore_pc
&& !restore_rn
)
18035 /* LDMDB Rn!, {R-high-register-list}. */
18036 current_stub_contents
=
18037 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18038 create_instruction_ldmdb
18039 (rn
, /*wback=*/1, insn_high_registers
));
18041 /* LDMDB Rn!, {R-low-register-list}. */
18042 current_stub_contents
=
18043 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18044 create_instruction_ldmdb
18045 (rn
, /*wback=*/1, insn_low_registers
));
18047 /* B initial_insn_addr+4. */
18048 current_stub_contents
=
18049 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18050 create_instruction_branch_absolute
18051 (initial_insn_addr
- current_stub_contents
));
18053 else if (!wback
&& restore_pc
&& !restore_rn
)
18055 /* Choose a Ri in the high-register-list that will be restored. */
18056 ri
= ctz (insn_high_registers
& usable_register_mask
& ~(1 << rn
));
18058 /* SUB Ri, Rn, #(4*nb_registers). */
18059 current_stub_contents
=
18060 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18061 create_instruction_sub (ri
, rn
, (4 * nb_registers
)));
18063 /* LDMIA Ri!, {R-low-register-list}. */
18064 current_stub_contents
=
18065 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18066 create_instruction_ldmia
18067 (ri
, /*wback=*/1, insn_low_registers
));
18069 /* LDMIA Ri, {R-high-register-list}. */
18070 current_stub_contents
=
18071 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18072 create_instruction_ldmia
18073 (ri
, /*wback=*/0, insn_high_registers
));
18075 else if (wback
&& restore_pc
&& !restore_rn
)
18077 /* Choose a Ri in the high-register-list that will be restored. */
18078 ri
= ctz (insn_high_registers
& usable_register_mask
& ~(1 << rn
));
18080 /* SUB Rn, Rn, #(4*nb_registers) */
18081 current_stub_contents
=
18082 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18083 create_instruction_sub (rn
, rn
, (4 * nb_registers
)));
18086 current_stub_contents
=
18087 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
18088 create_instruction_mov (ri
, rn
));
18090 /* LDMIA Ri!, {R-low-register-list}. */
18091 current_stub_contents
=
18092 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18093 create_instruction_ldmia
18094 (ri
, /*wback=*/1, insn_low_registers
));
18096 /* LDMIA Ri, {R-high-register-list}. */
18097 current_stub_contents
=
18098 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18099 create_instruction_ldmia
18100 (ri
, /*wback=*/0, insn_high_registers
));
18102 else if (!wback
&& !restore_pc
&& restore_rn
)
18105 if (!(insn_low_registers
& (1 << rn
)))
18107 /* Choose a Ri in the low-register-list that will be restored. */
18108 ri
= ctz (insn_low_registers
& usable_register_mask
& ~(1 << rn
));
18111 current_stub_contents
=
18112 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
18113 create_instruction_mov (ri
, rn
));
18116 /* LDMDB Ri!, {R-high-register-list}. */
18117 current_stub_contents
=
18118 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18119 create_instruction_ldmdb
18120 (ri
, /*wback=*/1, insn_high_registers
));
18122 /* LDMDB Ri, {R-low-register-list}. */
18123 current_stub_contents
=
18124 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18125 create_instruction_ldmdb
18126 (ri
, /*wback=*/0, insn_low_registers
));
18128 /* B initial_insn_addr+4. */
18129 current_stub_contents
=
18130 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18131 create_instruction_branch_absolute
18132 (initial_insn_addr
- current_stub_contents
));
18134 else if (!wback
&& restore_pc
&& restore_rn
)
18137 if (!(insn_high_registers
& (1 << rn
)))
18139 /* Choose a Ri in the high-register-list that will be restored. */
18140 ri
= ctz (insn_high_registers
& usable_register_mask
& ~(1 << rn
));
18143 /* SUB Ri, Rn, #(4*nb_registers). */
18144 current_stub_contents
=
18145 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18146 create_instruction_sub (ri
, rn
, (4 * nb_registers
)));
18148 /* LDMIA Ri!, {R-low-register-list}. */
18149 current_stub_contents
=
18150 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18151 create_instruction_ldmia
18152 (ri
, /*wback=*/1, insn_low_registers
));
18154 /* LDMIA Ri, {R-high-register-list}. */
18155 current_stub_contents
=
18156 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18157 create_instruction_ldmia
18158 (ri
, /*wback=*/0, insn_high_registers
));
18160 else if (wback
&& restore_rn
)
18162 /* The assembler should not have accepted to encode this. */
18163 BFD_ASSERT (0 && "Cannot patch an instruction that has an "
18164 "undefined behavior.\n");
18167 /* Fill the remaining of the stub with deterministic contents. */
18168 current_stub_contents
=
18169 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
18170 base_stub_contents
, current_stub_contents
,
18171 base_stub_contents
+
18172 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
);
18177 stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table
* htab
,
18179 const insn32 initial_insn
,
18180 const bfd_byte
*const initial_insn_addr
,
18181 bfd_byte
*const base_stub_contents
)
18183 int num_words
= ((unsigned int) initial_insn
<< 24) >> 24;
18184 bfd_byte
*current_stub_contents
= base_stub_contents
;
18186 BFD_ASSERT (is_thumb2_vldm (initial_insn
));
18188 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18189 smaller than 8 words load sequences that do not cause the
18191 if (num_words
<= 8)
18193 /* Untouched instruction. */
18194 current_stub_contents
=
18195 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18198 /* B initial_insn_addr+4. */
18199 current_stub_contents
=
18200 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18201 create_instruction_branch_absolute
18202 (initial_insn_addr
- current_stub_contents
));
18206 bfd_boolean is_dp
= /* DP encoding. */
18207 (initial_insn
& 0xfe100f00) == 0xec100b00;
18208 bfd_boolean is_ia_nobang
= /* (IA without !). */
18209 (((initial_insn
<< 7) >> 28) & 0xd) == 0x4;
18210 bfd_boolean is_ia_bang
= /* (IA with !) - includes VPOP. */
18211 (((initial_insn
<< 7) >> 28) & 0xd) == 0x5;
18212 bfd_boolean is_db_bang
= /* (DB with !). */
18213 (((initial_insn
<< 7) >> 28) & 0xd) == 0x9;
18214 int base_reg
= ((unsigned int) initial_insn
<< 12) >> 28;
18215 /* d = UInt (Vd:D);. */
18216 int first_reg
= ((((unsigned int) initial_insn
<< 16) >> 28) << 1)
18217 | (((unsigned int)initial_insn
<< 9) >> 31);
18219 /* Compute the number of 8-words chunks needed to split. */
18220 int chunks
= (num_words
% 8) ? (num_words
/ 8 + 1) : (num_words
/ 8);
18223 /* The test coverage has been done assuming the following
18224 hypothesis that exactly one of the previous is_ predicates is
18226 BFD_ASSERT ( (is_ia_nobang
^ is_ia_bang
^ is_db_bang
)
18227 && !(is_ia_nobang
& is_ia_bang
& is_db_bang
));
18229 /* We treat the cutting of the words in one pass for all
18230 cases, then we emit the adjustments:
18233 -> vldm rx!, {8_words_or_less} for each needed 8_word
18234 -> sub rx, rx, #size (list)
18237 -> vldm rx!, {8_words_or_less} for each needed 8_word
18238 This also handles vpop instruction (when rx is sp)
18241 -> vldmb rx!, {8_words_or_less} for each needed 8_word. */
18242 for (chunk
= 0; chunk
< chunks
; ++chunk
)
18244 bfd_vma new_insn
= 0;
18246 if (is_ia_nobang
|| is_ia_bang
)
18248 new_insn
= create_instruction_vldmia
18252 chunks
- (chunk
+ 1) ?
18253 8 : num_words
- chunk
* 8,
18254 first_reg
+ chunk
* 8);
18256 else if (is_db_bang
)
18258 new_insn
= create_instruction_vldmdb
18261 chunks
- (chunk
+ 1) ?
18262 8 : num_words
- chunk
* 8,
18263 first_reg
+ chunk
* 8);
18267 current_stub_contents
=
18268 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18272 /* Only this case requires the base register compensation
18276 current_stub_contents
=
18277 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18278 create_instruction_sub
18279 (base_reg
, base_reg
, 4*num_words
));
18282 /* B initial_insn_addr+4. */
18283 current_stub_contents
=
18284 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18285 create_instruction_branch_absolute
18286 (initial_insn_addr
- current_stub_contents
));
18289 /* Fill the remaining of the stub with deterministic contents. */
18290 current_stub_contents
=
18291 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
18292 base_stub_contents
, current_stub_contents
,
18293 base_stub_contents
+
18294 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE
);
18298 stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table
* htab
,
18300 const insn32 wrong_insn
,
18301 const bfd_byte
*const wrong_insn_addr
,
18302 bfd_byte
*const stub_contents
)
18304 if (is_thumb2_ldmia (wrong_insn
))
18305 stm32l4xx_create_replacing_stub_ldmia (htab
, output_bfd
,
18306 wrong_insn
, wrong_insn_addr
,
18308 else if (is_thumb2_ldmdb (wrong_insn
))
18309 stm32l4xx_create_replacing_stub_ldmdb (htab
, output_bfd
,
18310 wrong_insn
, wrong_insn_addr
,
18312 else if (is_thumb2_vldm (wrong_insn
))
18313 stm32l4xx_create_replacing_stub_vldm (htab
, output_bfd
,
18314 wrong_insn
, wrong_insn_addr
,
18318 /* End of stm32l4xx work-around. */
18321 /* Do code byteswapping. Return FALSE afterwards so that the section is
18322 written out as normal. */
18325 elf32_arm_write_section (bfd
*output_bfd
,
18326 struct bfd_link_info
*link_info
,
18328 bfd_byte
*contents
)
18330 unsigned int mapcount
, errcount
;
18331 _arm_elf_section_data
*arm_data
;
18332 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
18333 elf32_arm_section_map
*map
;
18334 elf32_vfp11_erratum_list
*errnode
;
18335 elf32_stm32l4xx_erratum_list
*stm32l4xx_errnode
;
18338 bfd_vma offset
= sec
->output_section
->vma
+ sec
->output_offset
;
18342 if (globals
== NULL
)
18345 /* If this section has not been allocated an _arm_elf_section_data
18346 structure then we cannot record anything. */
18347 arm_data
= get_arm_elf_section_data (sec
);
18348 if (arm_data
== NULL
)
18351 mapcount
= arm_data
->mapcount
;
18352 map
= arm_data
->map
;
18353 errcount
= arm_data
->erratumcount
;
18357 unsigned int endianflip
= bfd_big_endian (output_bfd
) ? 3 : 0;
18359 for (errnode
= arm_data
->erratumlist
; errnode
!= 0;
18360 errnode
= errnode
->next
)
18362 bfd_vma target
= errnode
->vma
- offset
;
18364 switch (errnode
->type
)
18366 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER
:
18368 bfd_vma branch_to_veneer
;
18369 /* Original condition code of instruction, plus bit mask for
18370 ARM B instruction. */
18371 unsigned int insn
= (errnode
->u
.b
.vfp_insn
& 0xf0000000)
18374 /* The instruction is before the label. */
18377 /* Above offset included in -4 below. */
18378 branch_to_veneer
= errnode
->u
.b
.veneer
->vma
18379 - errnode
->vma
- 4;
18381 if ((signed) branch_to_veneer
< -(1 << 25)
18382 || (signed) branch_to_veneer
>= (1 << 25))
18383 _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
18384 "range"), output_bfd
);
18386 insn
|= (branch_to_veneer
>> 2) & 0xffffff;
18387 contents
[endianflip
^ target
] = insn
& 0xff;
18388 contents
[endianflip
^ (target
+ 1)] = (insn
>> 8) & 0xff;
18389 contents
[endianflip
^ (target
+ 2)] = (insn
>> 16) & 0xff;
18390 contents
[endianflip
^ (target
+ 3)] = (insn
>> 24) & 0xff;
18394 case VFP11_ERRATUM_ARM_VENEER
:
18396 bfd_vma branch_from_veneer
;
18399 /* Take size of veneer into account. */
18400 branch_from_veneer
= errnode
->u
.v
.branch
->vma
18401 - errnode
->vma
- 12;
18403 if ((signed) branch_from_veneer
< -(1 << 25)
18404 || (signed) branch_from_veneer
>= (1 << 25))
18405 _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
18406 "range"), output_bfd
);
18408 /* Original instruction. */
18409 insn
= errnode
->u
.v
.branch
->u
.b
.vfp_insn
;
18410 contents
[endianflip
^ target
] = insn
& 0xff;
18411 contents
[endianflip
^ (target
+ 1)] = (insn
>> 8) & 0xff;
18412 contents
[endianflip
^ (target
+ 2)] = (insn
>> 16) & 0xff;
18413 contents
[endianflip
^ (target
+ 3)] = (insn
>> 24) & 0xff;
18415 /* Branch back to insn after original insn. */
18416 insn
= 0xea000000 | ((branch_from_veneer
>> 2) & 0xffffff);
18417 contents
[endianflip
^ (target
+ 4)] = insn
& 0xff;
18418 contents
[endianflip
^ (target
+ 5)] = (insn
>> 8) & 0xff;
18419 contents
[endianflip
^ (target
+ 6)] = (insn
>> 16) & 0xff;
18420 contents
[endianflip
^ (target
+ 7)] = (insn
>> 24) & 0xff;
18430 if (arm_data
->stm32l4xx_erratumcount
!= 0)
18432 for (stm32l4xx_errnode
= arm_data
->stm32l4xx_erratumlist
;
18433 stm32l4xx_errnode
!= 0;
18434 stm32l4xx_errnode
= stm32l4xx_errnode
->next
)
18436 bfd_vma target
= stm32l4xx_errnode
->vma
- offset
;
18438 switch (stm32l4xx_errnode
->type
)
18440 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER
:
18443 bfd_vma branch_to_veneer
=
18444 stm32l4xx_errnode
->u
.b
.veneer
->vma
- stm32l4xx_errnode
->vma
;
18446 if ((signed) branch_to_veneer
< -(1 << 24)
18447 || (signed) branch_to_veneer
>= (1 << 24))
18449 bfd_vma out_of_range
=
18450 ((signed) branch_to_veneer
< -(1 << 24)) ?
18451 - branch_to_veneer
- (1 << 24) :
18452 ((signed) branch_to_veneer
>= (1 << 24)) ?
18453 branch_to_veneer
- (1 << 24) : 0;
18456 (_("%pB(%#" PRIx64
"): error: "
18457 "cannot create STM32L4XX veneer; "
18458 "jump out of range by %" PRId64
" bytes; "
18459 "cannot encode branch instruction"),
18461 (uint64_t) (stm32l4xx_errnode
->vma
- 4),
18462 (int64_t) out_of_range
);
18466 insn
= create_instruction_branch_absolute
18467 (stm32l4xx_errnode
->u
.b
.veneer
->vma
- stm32l4xx_errnode
->vma
);
18469 /* The instruction is before the label. */
18472 put_thumb2_insn (globals
, output_bfd
,
18473 (bfd_vma
) insn
, contents
+ target
);
18477 case STM32L4XX_ERRATUM_VENEER
:
18480 bfd_byte
* veneer_r
;
18483 veneer
= contents
+ target
;
18485 + stm32l4xx_errnode
->u
.b
.veneer
->vma
18486 - stm32l4xx_errnode
->vma
- 4;
18488 if ((signed) (veneer_r
- veneer
-
18489 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE
>
18490 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
?
18491 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE
:
18492 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
) < -(1 << 24)
18493 || (signed) (veneer_r
- veneer
) >= (1 << 24))
18495 _bfd_error_handler (_("%pB: error: cannot create STM32L4XX "
18496 "veneer"), output_bfd
);
18500 /* Original instruction. */
18501 insn
= stm32l4xx_errnode
->u
.v
.branch
->u
.b
.insn
;
18503 stm32l4xx_create_replacing_stub
18504 (globals
, output_bfd
, insn
, (void*)veneer_r
, (void*)veneer
);
18514 if (arm_data
->elf
.this_hdr
.sh_type
== SHT_ARM_EXIDX
)
18516 arm_unwind_table_edit
*edit_node
18517 = arm_data
->u
.exidx
.unwind_edit_list
;
18518 /* Now, sec->size is the size of the section we will write. The original
18519 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
18520 markers) was sec->rawsize. (This isn't the case if we perform no
18521 edits, then rawsize will be zero and we should use size). */
18522 bfd_byte
*edited_contents
= (bfd_byte
*) bfd_malloc (sec
->size
);
18523 unsigned int input_size
= sec
->rawsize
? sec
->rawsize
: sec
->size
;
18524 unsigned int in_index
, out_index
;
18525 bfd_vma add_to_offsets
= 0;
18527 for (in_index
= 0, out_index
= 0; in_index
* 8 < input_size
|| edit_node
;)
18531 unsigned int edit_index
= edit_node
->index
;
18533 if (in_index
< edit_index
&& in_index
* 8 < input_size
)
18535 copy_exidx_entry (output_bfd
, edited_contents
+ out_index
* 8,
18536 contents
+ in_index
* 8, add_to_offsets
);
18540 else if (in_index
== edit_index
18541 || (in_index
* 8 >= input_size
18542 && edit_index
== UINT_MAX
))
18544 switch (edit_node
->type
)
18546 case DELETE_EXIDX_ENTRY
:
18548 add_to_offsets
+= 8;
18551 case INSERT_EXIDX_CANTUNWIND_AT_END
:
18553 asection
*text_sec
= edit_node
->linked_section
;
18554 bfd_vma text_offset
= text_sec
->output_section
->vma
18555 + text_sec
->output_offset
18557 bfd_vma exidx_offset
= offset
+ out_index
* 8;
18558 unsigned long prel31_offset
;
18560 /* Note: this is meant to be equivalent to an
18561 R_ARM_PREL31 relocation. These synthetic
18562 EXIDX_CANTUNWIND markers are not relocated by the
18563 usual BFD method. */
18564 prel31_offset
= (text_offset
- exidx_offset
)
18566 if (bfd_link_relocatable (link_info
))
18568 /* Here relocation for new EXIDX_CANTUNWIND is
18569 created, so there is no need to
18570 adjust offset by hand. */
18571 prel31_offset
= text_sec
->output_offset
18575 /* First address we can't unwind. */
18576 bfd_put_32 (output_bfd
, prel31_offset
,
18577 &edited_contents
[out_index
* 8]);
18579 /* Code for EXIDX_CANTUNWIND. */
18580 bfd_put_32 (output_bfd
, 0x1,
18581 &edited_contents
[out_index
* 8 + 4]);
18584 add_to_offsets
-= 8;
18589 edit_node
= edit_node
->next
;
18594 /* No more edits, copy remaining entries verbatim. */
18595 copy_exidx_entry (output_bfd
, edited_contents
+ out_index
* 8,
18596 contents
+ in_index
* 8, add_to_offsets
);
18602 if (!(sec
->flags
& SEC_EXCLUDE
) && !(sec
->flags
& SEC_NEVER_LOAD
))
18603 bfd_set_section_contents (output_bfd
, sec
->output_section
,
18605 (file_ptr
) sec
->output_offset
, sec
->size
);
18610 /* Fix code to point to Cortex-A8 erratum stubs. */
18611 if (globals
->fix_cortex_a8
)
18613 struct a8_branch_to_stub_data data
;
18615 data
.writing_section
= sec
;
18616 data
.contents
= contents
;
18618 bfd_hash_traverse (& globals
->stub_hash_table
, make_branch_to_a8_stub
,
18625 if (globals
->byteswap_code
)
18627 qsort (map
, mapcount
, sizeof (* map
), elf32_arm_compare_mapping
);
18630 for (i
= 0; i
< mapcount
; i
++)
18632 if (i
== mapcount
- 1)
18635 end
= map
[i
+ 1].vma
;
18637 switch (map
[i
].type
)
18640 /* Byte swap code words. */
18641 while (ptr
+ 3 < end
)
18643 tmp
= contents
[ptr
];
18644 contents
[ptr
] = contents
[ptr
+ 3];
18645 contents
[ptr
+ 3] = tmp
;
18646 tmp
= contents
[ptr
+ 1];
18647 contents
[ptr
+ 1] = contents
[ptr
+ 2];
18648 contents
[ptr
+ 2] = tmp
;
18654 /* Byte swap code halfwords. */
18655 while (ptr
+ 1 < end
)
18657 tmp
= contents
[ptr
];
18658 contents
[ptr
] = contents
[ptr
+ 1];
18659 contents
[ptr
+ 1] = tmp
;
18665 /* Leave data alone. */
18673 arm_data
->mapcount
= -1;
18674 arm_data
->mapsize
= 0;
18675 arm_data
->map
= NULL
;
18680 /* Mangle thumb function symbols as we read them in. */
18683 elf32_arm_swap_symbol_in (bfd
* abfd
,
18686 Elf_Internal_Sym
*dst
)
18688 Elf_Internal_Shdr
*symtab_hdr
;
18689 const char *name
= NULL
;
18691 if (!bfd_elf32_swap_symbol_in (abfd
, psrc
, pshn
, dst
))
18693 dst
->st_target_internal
= 0;
18695 /* New EABI objects mark thumb function symbols by setting the low bit of
18697 if (ELF_ST_TYPE (dst
->st_info
) == STT_FUNC
18698 || ELF_ST_TYPE (dst
->st_info
) == STT_GNU_IFUNC
)
18700 if (dst
->st_value
& 1)
18702 dst
->st_value
&= ~(bfd_vma
) 1;
18703 ARM_SET_SYM_BRANCH_TYPE (dst
->st_target_internal
,
18704 ST_BRANCH_TO_THUMB
);
18707 ARM_SET_SYM_BRANCH_TYPE (dst
->st_target_internal
, ST_BRANCH_TO_ARM
);
18709 else if (ELF_ST_TYPE (dst
->st_info
) == STT_ARM_TFUNC
)
18711 dst
->st_info
= ELF_ST_INFO (ELF_ST_BIND (dst
->st_info
), STT_FUNC
);
18712 ARM_SET_SYM_BRANCH_TYPE (dst
->st_target_internal
, ST_BRANCH_TO_THUMB
);
18714 else if (ELF_ST_TYPE (dst
->st_info
) == STT_SECTION
)
18715 ARM_SET_SYM_BRANCH_TYPE (dst
->st_target_internal
, ST_BRANCH_LONG
);
18717 ARM_SET_SYM_BRANCH_TYPE (dst
->st_target_internal
, ST_BRANCH_UNKNOWN
);
18719 /* Mark CMSE special symbols. */
18720 symtab_hdr
= & elf_symtab_hdr (abfd
);
18721 if (symtab_hdr
->sh_size
)
18722 name
= bfd_elf_sym_name (abfd
, symtab_hdr
, dst
, NULL
);
18723 if (name
&& CONST_STRNEQ (name
, CMSE_PREFIX
))
18724 ARM_SET_SYM_CMSE_SPCL (dst
->st_target_internal
);
18730 /* Mangle thumb function symbols as we write them out. */
18733 elf32_arm_swap_symbol_out (bfd
*abfd
,
18734 const Elf_Internal_Sym
*src
,
18738 Elf_Internal_Sym newsym
;
18740 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
18741 of the address set, as per the new EABI. We do this unconditionally
18742 because objcopy does not set the elf header flags until after
18743 it writes out the symbol table. */
18744 if (ARM_GET_SYM_BRANCH_TYPE (src
->st_target_internal
) == ST_BRANCH_TO_THUMB
)
18747 if (ELF_ST_TYPE (src
->st_info
) != STT_GNU_IFUNC
)
18748 newsym
.st_info
= ELF_ST_INFO (ELF_ST_BIND (src
->st_info
), STT_FUNC
);
18749 if (newsym
.st_shndx
!= SHN_UNDEF
)
18751 /* Do this only for defined symbols. At link type, the static
18752 linker will simulate the work of dynamic linker of resolving
18753 symbols and will carry over the thumbness of found symbols to
18754 the output symbol table. It's not clear how it happens, but
18755 the thumbness of undefined symbols can well be different at
18756 runtime, and writing '1' for them will be confusing for users
18757 and possibly for dynamic linker itself.
18759 newsym
.st_value
|= 1;
18764 bfd_elf32_swap_symbol_out (abfd
, src
, cdst
, shndx
);
18767 /* Add the PT_ARM_EXIDX program header. */
18770 elf32_arm_modify_segment_map (bfd
*abfd
,
18771 struct bfd_link_info
*info ATTRIBUTE_UNUSED
)
18773 struct elf_segment_map
*m
;
18776 sec
= bfd_get_section_by_name (abfd
, ".ARM.exidx");
18777 if (sec
!= NULL
&& (sec
->flags
& SEC_LOAD
) != 0)
18779 /* If there is already a PT_ARM_EXIDX header, then we do not
18780 want to add another one. This situation arises when running
18781 "strip"; the input binary already has the header. */
18782 m
= elf_seg_map (abfd
);
18783 while (m
&& m
->p_type
!= PT_ARM_EXIDX
)
18787 m
= (struct elf_segment_map
*)
18788 bfd_zalloc (abfd
, sizeof (struct elf_segment_map
));
18791 m
->p_type
= PT_ARM_EXIDX
;
18793 m
->sections
[0] = sec
;
18795 m
->next
= elf_seg_map (abfd
);
18796 elf_seg_map (abfd
) = m
;
18803 /* We may add a PT_ARM_EXIDX program header. */
18806 elf32_arm_additional_program_headers (bfd
*abfd
,
18807 struct bfd_link_info
*info ATTRIBUTE_UNUSED
)
18811 sec
= bfd_get_section_by_name (abfd
, ".ARM.exidx");
18812 if (sec
!= NULL
&& (sec
->flags
& SEC_LOAD
) != 0)
18818 /* Hook called by the linker routine which adds symbols from an object
18822 elf32_arm_add_symbol_hook (bfd
*abfd
, struct bfd_link_info
*info
,
18823 Elf_Internal_Sym
*sym
, const char **namep
,
18824 flagword
*flagsp
, asection
**secp
, bfd_vma
*valp
)
18826 if (ELF_ST_TYPE (sym
->st_info
) == STT_GNU_IFUNC
18827 && (abfd
->flags
& DYNAMIC
) == 0
18828 && bfd_get_flavour (info
->output_bfd
) == bfd_target_elf_flavour
)
18829 elf_tdata (info
->output_bfd
)->has_gnu_symbols
|= elf_gnu_symbol_ifunc
;
18831 if (elf32_arm_hash_table (info
) == NULL
)
18834 if (elf32_arm_hash_table (info
)->vxworks_p
18835 && !elf_vxworks_add_symbol_hook (abfd
, info
, sym
, namep
,
18836 flagsp
, secp
, valp
))
18842 /* We use this to override swap_symbol_in and swap_symbol_out. */
18843 const struct elf_size_info elf32_arm_size_info
=
18845 sizeof (Elf32_External_Ehdr
),
18846 sizeof (Elf32_External_Phdr
),
18847 sizeof (Elf32_External_Shdr
),
18848 sizeof (Elf32_External_Rel
),
18849 sizeof (Elf32_External_Rela
),
18850 sizeof (Elf32_External_Sym
),
18851 sizeof (Elf32_External_Dyn
),
18852 sizeof (Elf_External_Note
),
18856 ELFCLASS32
, EV_CURRENT
,
18857 bfd_elf32_write_out_phdrs
,
18858 bfd_elf32_write_shdrs_and_ehdr
,
18859 bfd_elf32_checksum_contents
,
18860 bfd_elf32_write_relocs
,
18861 elf32_arm_swap_symbol_in
,
18862 elf32_arm_swap_symbol_out
,
18863 bfd_elf32_slurp_reloc_table
,
18864 bfd_elf32_slurp_symbol_table
,
18865 bfd_elf32_swap_dyn_in
,
18866 bfd_elf32_swap_dyn_out
,
18867 bfd_elf32_swap_reloc_in
,
18868 bfd_elf32_swap_reloc_out
,
18869 bfd_elf32_swap_reloca_in
,
18870 bfd_elf32_swap_reloca_out
18874 read_code32 (const bfd
*abfd
, const bfd_byte
*addr
)
18876 /* V7 BE8 code is always little endian. */
18877 if ((elf_elfheader (abfd
)->e_flags
& EF_ARM_BE8
) != 0)
18878 return bfd_getl32 (addr
);
18880 return bfd_get_32 (abfd
, addr
);
18884 read_code16 (const bfd
*abfd
, const bfd_byte
*addr
)
18886 /* V7 BE8 code is always little endian. */
18887 if ((elf_elfheader (abfd
)->e_flags
& EF_ARM_BE8
) != 0)
18888 return bfd_getl16 (addr
);
18890 return bfd_get_16 (abfd
, addr
);
18893 /* Return size of plt0 entry starting at ADDR
18894 or (bfd_vma) -1 if size can not be determined. */
18897 elf32_arm_plt0_size (const bfd
*abfd
, const bfd_byte
*addr
)
18899 bfd_vma first_word
;
18902 first_word
= read_code32 (abfd
, addr
);
18904 if (first_word
== elf32_arm_plt0_entry
[0])
18905 plt0_size
= 4 * ARRAY_SIZE (elf32_arm_plt0_entry
);
18906 else if (first_word
== elf32_thumb2_plt0_entry
[0])
18907 plt0_size
= 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry
);
18909 /* We don't yet handle this PLT format. */
18910 return (bfd_vma
) -1;
18915 /* Return size of plt entry starting at offset OFFSET
18916 of plt section located at address START
18917 or (bfd_vma) -1 if size can not be determined. */
18920 elf32_arm_plt_size (const bfd
*abfd
, const bfd_byte
*start
, bfd_vma offset
)
18922 bfd_vma first_insn
;
18923 bfd_vma plt_size
= 0;
18924 const bfd_byte
*addr
= start
+ offset
;
18926 /* PLT entry size if fixed on Thumb-only platforms. */
18927 if (read_code32 (abfd
, start
) == elf32_thumb2_plt0_entry
[0])
18928 return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry
);
18930 /* Respect Thumb stub if necessary. */
18931 if (read_code16 (abfd
, addr
) == elf32_arm_plt_thumb_stub
[0])
18933 plt_size
+= 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub
);
18936 /* Strip immediate from first add. */
18937 first_insn
= read_code32 (abfd
, addr
+ plt_size
) & 0xffffff00;
18939 #ifdef FOUR_WORD_PLT
18940 if (first_insn
== elf32_arm_plt_entry
[0])
18941 plt_size
+= 4 * ARRAY_SIZE (elf32_arm_plt_entry
);
18943 if (first_insn
== elf32_arm_plt_entry_long
[0])
18944 plt_size
+= 4 * ARRAY_SIZE (elf32_arm_plt_entry_long
);
18945 else if (first_insn
== elf32_arm_plt_entry_short
[0])
18946 plt_size
+= 4 * ARRAY_SIZE (elf32_arm_plt_entry_short
);
18949 /* We don't yet handle this PLT format. */
18950 return (bfd_vma
) -1;
18955 /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */
18958 elf32_arm_get_synthetic_symtab (bfd
*abfd
,
18959 long symcount ATTRIBUTE_UNUSED
,
18960 asymbol
**syms ATTRIBUTE_UNUSED
,
18970 Elf_Internal_Shdr
*hdr
;
18978 if ((abfd
->flags
& (DYNAMIC
| EXEC_P
)) == 0)
18981 if (dynsymcount
<= 0)
18984 relplt
= bfd_get_section_by_name (abfd
, ".rel.plt");
18985 if (relplt
== NULL
)
18988 hdr
= &elf_section_data (relplt
)->this_hdr
;
18989 if (hdr
->sh_link
!= elf_dynsymtab (abfd
)
18990 || (hdr
->sh_type
!= SHT_REL
&& hdr
->sh_type
!= SHT_RELA
))
18993 plt
= bfd_get_section_by_name (abfd
, ".plt");
18997 if (!elf32_arm_size_info
.slurp_reloc_table (abfd
, relplt
, dynsyms
, TRUE
))
19000 data
= plt
->contents
;
19003 if (!bfd_get_full_section_contents(abfd
, (asection
*) plt
, &data
) || data
== NULL
)
19005 bfd_cache_section_contents((asection
*) plt
, data
);
19008 count
= relplt
->size
/ hdr
->sh_entsize
;
19009 size
= count
* sizeof (asymbol
);
19010 p
= relplt
->relocation
;
19011 for (i
= 0; i
< count
; i
++, p
+= elf32_arm_size_info
.int_rels_per_ext_rel
)
19013 size
+= strlen ((*p
->sym_ptr_ptr
)->name
) + sizeof ("@plt");
19014 if (p
->addend
!= 0)
19015 size
+= sizeof ("+0x") - 1 + 8;
19018 s
= *ret
= (asymbol
*) bfd_malloc (size
);
19022 offset
= elf32_arm_plt0_size (abfd
, data
);
19023 if (offset
== (bfd_vma
) -1)
19026 names
= (char *) (s
+ count
);
19027 p
= relplt
->relocation
;
19029 for (i
= 0; i
< count
; i
++, p
+= elf32_arm_size_info
.int_rels_per_ext_rel
)
19033 bfd_vma plt_size
= elf32_arm_plt_size (abfd
, data
, offset
);
19034 if (plt_size
== (bfd_vma
) -1)
19037 *s
= **p
->sym_ptr_ptr
;
19038 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
19039 we are defining a symbol, ensure one of them is set. */
19040 if ((s
->flags
& BSF_LOCAL
) == 0)
19041 s
->flags
|= BSF_GLOBAL
;
19042 s
->flags
|= BSF_SYNTHETIC
;
19047 len
= strlen ((*p
->sym_ptr_ptr
)->name
);
19048 memcpy (names
, (*p
->sym_ptr_ptr
)->name
, len
);
19050 if (p
->addend
!= 0)
19054 memcpy (names
, "+0x", sizeof ("+0x") - 1);
19055 names
+= sizeof ("+0x") - 1;
19056 bfd_sprintf_vma (abfd
, buf
, p
->addend
);
19057 for (a
= buf
; *a
== '0'; ++a
)
19060 memcpy (names
, a
, len
);
19063 memcpy (names
, "@plt", sizeof ("@plt"));
19064 names
+= sizeof ("@plt");
19066 offset
+= plt_size
;
19073 elf32_arm_section_flags (flagword
*flags
, const Elf_Internal_Shdr
* hdr
)
19075 if (hdr
->sh_flags
& SHF_ARM_PURECODE
)
19076 *flags
|= SEC_ELF_PURECODE
;
19081 elf32_arm_lookup_section_flags (char *flag_name
)
19083 if (!strcmp (flag_name
, "SHF_ARM_PURECODE"))
19084 return SHF_ARM_PURECODE
;
19086 return SEC_NO_FLAGS
;
19089 static unsigned int
19090 elf32_arm_count_additional_relocs (asection
*sec
)
19092 struct _arm_elf_section_data
*arm_data
;
19093 arm_data
= get_arm_elf_section_data (sec
);
19095 return arm_data
== NULL
? 0 : arm_data
->additional_reloc_count
;
19098 /* Called to set the sh_flags, sh_link and sh_info fields of OSECTION which
19099 has a type >= SHT_LOOS. Returns TRUE if these fields were initialised
19100 FALSE otherwise. ISECTION is the best guess matching section from the
19101 input bfd IBFD, but it might be NULL. */
19104 elf32_arm_copy_special_section_fields (const bfd
*ibfd ATTRIBUTE_UNUSED
,
19105 bfd
*obfd ATTRIBUTE_UNUSED
,
19106 const Elf_Internal_Shdr
*isection ATTRIBUTE_UNUSED
,
19107 Elf_Internal_Shdr
*osection
)
19109 switch (osection
->sh_type
)
19111 case SHT_ARM_EXIDX
:
19113 Elf_Internal_Shdr
**oheaders
= elf_elfsections (obfd
);
19114 Elf_Internal_Shdr
**iheaders
= elf_elfsections (ibfd
);
19117 osection
->sh_flags
= SHF_ALLOC
| SHF_LINK_ORDER
;
19118 osection
->sh_info
= 0;
19120 /* The sh_link field must be set to the text section associated with
19121 this index section. Unfortunately the ARM EHABI does not specify
19122 exactly how to determine this association. Our caller does try
19123 to match up OSECTION with its corresponding input section however
19124 so that is a good first guess. */
19125 if (isection
!= NULL
19126 && osection
->bfd_section
!= NULL
19127 && isection
->bfd_section
!= NULL
19128 && isection
->bfd_section
->output_section
!= NULL
19129 && isection
->bfd_section
->output_section
== osection
->bfd_section
19130 && iheaders
!= NULL
19131 && isection
->sh_link
> 0
19132 && isection
->sh_link
< elf_numsections (ibfd
)
19133 && iheaders
[isection
->sh_link
]->bfd_section
!= NULL
19134 && iheaders
[isection
->sh_link
]->bfd_section
->output_section
!= NULL
19137 for (i
= elf_numsections (obfd
); i
-- > 0;)
19138 if (oheaders
[i
]->bfd_section
19139 == iheaders
[isection
->sh_link
]->bfd_section
->output_section
)
19145 /* Failing that we have to find a matching section ourselves. If
19146 we had the output section name available we could compare that
19147 with input section names. Unfortunately we don't. So instead
19148 we use a simple heuristic and look for the nearest executable
19149 section before this one. */
19150 for (i
= elf_numsections (obfd
); i
-- > 0;)
19151 if (oheaders
[i
] == osection
)
19157 if (oheaders
[i
]->sh_type
== SHT_PROGBITS
19158 && (oheaders
[i
]->sh_flags
& (SHF_ALLOC
| SHF_EXECINSTR
))
19159 == (SHF_ALLOC
| SHF_EXECINSTR
))
19165 osection
->sh_link
= i
;
19166 /* If the text section was part of a group
19167 then the index section should be too. */
19168 if (oheaders
[i
]->sh_flags
& SHF_GROUP
)
19169 osection
->sh_flags
|= SHF_GROUP
;
19175 case SHT_ARM_PREEMPTMAP
:
19176 osection
->sh_flags
= SHF_ALLOC
;
19179 case SHT_ARM_ATTRIBUTES
:
19180 case SHT_ARM_DEBUGOVERLAY
:
19181 case SHT_ARM_OVERLAYSECTION
:
19189 /* Returns TRUE if NAME is an ARM mapping symbol.
19190 Traditionally the symbols $a, $d and $t have been used.
19191 The ARM ELF standard also defines $x (for A64 code). It also allows a
19192 period initiated suffix to be added to the symbol: "$[adtx]\.[:sym_char]+".
19193 Other tools might also produce $b (Thumb BL), $f, $p, $m and $v, but we do
19194 not support them here. $t.x indicates the start of ThumbEE instructions. */
19197 is_arm_mapping_symbol (const char * name
)
19199 return name
!= NULL
/* Paranoia. */
19200 && name
[0] == '$' /* Note: if objcopy --prefix-symbols has been used then
19201 the mapping symbols could have acquired a prefix.
19202 We do not support this here, since such symbols no
19203 longer conform to the ARM ELF ABI. */
19204 && (name
[1] == 'a' || name
[1] == 'd' || name
[1] == 't' || name
[1] == 'x')
19205 && (name
[2] == 0 || name
[2] == '.');
19206 /* FIXME: Strictly speaking the symbol is only a valid mapping symbol if
19207 any characters that follow the period are legal characters for the body
19208 of a symbol's name. For now we just assume that this is the case. */
19211 /* Make sure that mapping symbols in object files are not removed via the
19212 "strip --strip-unneeded" tool. These symbols are needed in order to
19213 correctly generate interworking veneers, and for byte swapping code
19214 regions. Once an object file has been linked, it is safe to remove the
19215 symbols as they will no longer be needed. */
19218 elf32_arm_backend_symbol_processing (bfd
*abfd
, asymbol
*sym
)
19220 if (((abfd
->flags
& (EXEC_P
| DYNAMIC
)) == 0)
19221 && sym
->section
!= bfd_abs_section_ptr
19222 && is_arm_mapping_symbol (sym
->name
))
19223 sym
->flags
|= BSF_KEEP
;
19226 #undef elf_backend_copy_special_section_fields
19227 #define elf_backend_copy_special_section_fields elf32_arm_copy_special_section_fields
19229 #define ELF_ARCH bfd_arch_arm
19230 #define ELF_TARGET_ID ARM_ELF_DATA
19231 #define ELF_MACHINE_CODE EM_ARM
19232 #ifdef __QNXTARGET__
19233 #define ELF_MAXPAGESIZE 0x1000
19235 #define ELF_MAXPAGESIZE 0x10000
19237 #define ELF_MINPAGESIZE 0x1000
19238 #define ELF_COMMONPAGESIZE 0x1000
19240 #define bfd_elf32_mkobject elf32_arm_mkobject
19242 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
19243 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
19244 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
19245 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
19246 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
19247 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
19248 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
19249 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
19250 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
19251 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
19252 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
19253 #define bfd_elf32_bfd_final_link elf32_arm_final_link
19254 #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab
19256 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
19257 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
19258 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
19259 #define elf_backend_check_relocs elf32_arm_check_relocs
19260 #define elf_backend_update_relocs elf32_arm_update_relocs
19261 #define elf_backend_relocate_section elf32_arm_relocate_section
19262 #define elf_backend_write_section elf32_arm_write_section
19263 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
19264 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
19265 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
19266 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
19267 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
19268 #define elf_backend_always_size_sections elf32_arm_always_size_sections
19269 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
19270 #define elf_backend_post_process_headers elf32_arm_post_process_headers
19271 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
19272 #define elf_backend_object_p elf32_arm_object_p
19273 #define elf_backend_fake_sections elf32_arm_fake_sections
19274 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
19275 #define elf_backend_final_write_processing elf32_arm_final_write_processing
19276 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
19277 #define elf_backend_size_info elf32_arm_size_info
19278 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
19279 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
19280 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
19281 #define elf_backend_filter_implib_symbols elf32_arm_filter_implib_symbols
19282 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
19283 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
19284 #define elf_backend_count_additional_relocs elf32_arm_count_additional_relocs
19285 #define elf_backend_symbol_processing elf32_arm_backend_symbol_processing
19287 #define elf_backend_can_refcount 1
19288 #define elf_backend_can_gc_sections 1
19289 #define elf_backend_plt_readonly 1
19290 #define elf_backend_want_got_plt 1
19291 #define elf_backend_want_plt_sym 0
19292 #define elf_backend_want_dynrelro 1
19293 #define elf_backend_may_use_rel_p 1
19294 #define elf_backend_may_use_rela_p 0
19295 #define elf_backend_default_use_rela_p 0
19296 #define elf_backend_dtrel_excludes_plt 1
19298 #define elf_backend_got_header_size 12
19299 #define elf_backend_extern_protected_data 1
19301 #undef elf_backend_obj_attrs_vendor
19302 #define elf_backend_obj_attrs_vendor "aeabi"
19303 #undef elf_backend_obj_attrs_section
19304 #define elf_backend_obj_attrs_section ".ARM.attributes"
19305 #undef elf_backend_obj_attrs_arg_type
19306 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
19307 #undef elf_backend_obj_attrs_section_type
19308 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
19309 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
19310 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
19312 #undef elf_backend_section_flags
19313 #define elf_backend_section_flags elf32_arm_section_flags
19314 #undef elf_backend_lookup_section_flags_hook
19315 #define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags
19317 #define elf_backend_linux_prpsinfo32_ugid16 TRUE
19319 #include "elf32-target.h"
19321 /* Native Client targets. */
19323 #undef TARGET_LITTLE_SYM
19324 #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec
19325 #undef TARGET_LITTLE_NAME
19326 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
19327 #undef TARGET_BIG_SYM
19328 #define TARGET_BIG_SYM arm_elf32_nacl_be_vec
19329 #undef TARGET_BIG_NAME
19330 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
19332 /* Like elf32_arm_link_hash_table_create -- but overrides
19333 appropriately for NaCl. */
19335 static struct bfd_link_hash_table
*
19336 elf32_arm_nacl_link_hash_table_create (bfd
*abfd
)
19338 struct bfd_link_hash_table
*ret
;
19340 ret
= elf32_arm_link_hash_table_create (abfd
);
19343 struct elf32_arm_link_hash_table
*htab
19344 = (struct elf32_arm_link_hash_table
*) ret
;
19348 htab
->plt_header_size
= 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry
);
19349 htab
->plt_entry_size
= 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry
);
19354 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
19355 really need to use elf32_arm_modify_segment_map. But we do it
19356 anyway just to reduce gratuitous differences with the stock ARM backend. */
19359 elf32_arm_nacl_modify_segment_map (bfd
*abfd
, struct bfd_link_info
*info
)
19361 return (elf32_arm_modify_segment_map (abfd
, info
)
19362 && nacl_modify_segment_map (abfd
, info
));
19366 elf32_arm_nacl_final_write_processing (bfd
*abfd
, bfd_boolean linker
)
19368 elf32_arm_final_write_processing (abfd
, linker
);
19369 nacl_final_write_processing (abfd
, linker
);
19373 elf32_arm_nacl_plt_sym_val (bfd_vma i
, const asection
*plt
,
19374 const arelent
*rel ATTRIBUTE_UNUSED
)
19377 + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry
) +
19378 i
* ARRAY_SIZE (elf32_arm_nacl_plt_entry
));
19382 #define elf32_bed elf32_arm_nacl_bed
19383 #undef bfd_elf32_bfd_link_hash_table_create
19384 #define bfd_elf32_bfd_link_hash_table_create \
19385 elf32_arm_nacl_link_hash_table_create
19386 #undef elf_backend_plt_alignment
19387 #define elf_backend_plt_alignment 4
19388 #undef elf_backend_modify_segment_map
19389 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
19390 #undef elf_backend_modify_program_headers
19391 #define elf_backend_modify_program_headers nacl_modify_program_headers
19392 #undef elf_backend_final_write_processing
19393 #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
19394 #undef bfd_elf32_get_synthetic_symtab
19395 #undef elf_backend_plt_sym_val
19396 #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
19397 #undef elf_backend_copy_special_section_fields
19399 #undef ELF_MINPAGESIZE
19400 #undef ELF_COMMONPAGESIZE
19403 #include "elf32-target.h"
19405 /* Reset to defaults. */
19406 #undef elf_backend_plt_alignment
19407 #undef elf_backend_modify_segment_map
19408 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
19409 #undef elf_backend_modify_program_headers
19410 #undef elf_backend_final_write_processing
19411 #define elf_backend_final_write_processing elf32_arm_final_write_processing
19412 #undef ELF_MINPAGESIZE
19413 #define ELF_MINPAGESIZE 0x1000
19414 #undef ELF_COMMONPAGESIZE
19415 #define ELF_COMMONPAGESIZE 0x1000
19418 /* FDPIC Targets. */
19420 #undef TARGET_LITTLE_SYM
19421 #define TARGET_LITTLE_SYM arm_elf32_fdpic_le_vec
19422 #undef TARGET_LITTLE_NAME
19423 #define TARGET_LITTLE_NAME "elf32-littlearm-fdpic"
19424 #undef TARGET_BIG_SYM
19425 #define TARGET_BIG_SYM arm_elf32_fdpic_be_vec
19426 #undef TARGET_BIG_NAME
19427 #define TARGET_BIG_NAME "elf32-bigarm-fdpic"
19428 #undef elf_match_priority
19429 #define elf_match_priority 128
19431 /* Like elf32_arm_link_hash_table_create -- but overrides
19432 appropriately for FDPIC. */
19434 static struct bfd_link_hash_table
*
19435 elf32_arm_fdpic_link_hash_table_create (bfd
*abfd
)
19437 struct bfd_link_hash_table
*ret
;
19439 ret
= elf32_arm_link_hash_table_create (abfd
);
19442 struct elf32_arm_link_hash_table
*htab
= (struct elf32_arm_link_hash_table
*) ret
;
19450 #define elf32_bed elf32_arm_fdpic_bed
19452 #undef bfd_elf32_bfd_link_hash_table_create
19453 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_fdpic_link_hash_table_create
19455 #include "elf32-target.h"
19456 #undef elf_match_priority
19458 /* VxWorks Targets. */
19460 #undef TARGET_LITTLE_SYM
19461 #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec
19462 #undef TARGET_LITTLE_NAME
19463 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
19464 #undef TARGET_BIG_SYM
19465 #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec
19466 #undef TARGET_BIG_NAME
19467 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
19469 /* Like elf32_arm_link_hash_table_create -- but overrides
19470 appropriately for VxWorks. */
19472 static struct bfd_link_hash_table
*
19473 elf32_arm_vxworks_link_hash_table_create (bfd
*abfd
)
19475 struct bfd_link_hash_table
*ret
;
19477 ret
= elf32_arm_link_hash_table_create (abfd
);
19480 struct elf32_arm_link_hash_table
*htab
19481 = (struct elf32_arm_link_hash_table
*) ret
;
19483 htab
->vxworks_p
= 1;
19489 elf32_arm_vxworks_final_write_processing (bfd
*abfd
, bfd_boolean linker
)
19491 elf32_arm_final_write_processing (abfd
, linker
);
19492 elf_vxworks_final_write_processing (abfd
, linker
);
19496 #define elf32_bed elf32_arm_vxworks_bed
19498 #undef bfd_elf32_bfd_link_hash_table_create
19499 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
19500 #undef elf_backend_final_write_processing
19501 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
19502 #undef elf_backend_emit_relocs
19503 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
19505 #undef elf_backend_may_use_rel_p
19506 #define elf_backend_may_use_rel_p 0
19507 #undef elf_backend_may_use_rela_p
19508 #define elf_backend_may_use_rela_p 1
19509 #undef elf_backend_default_use_rela_p
19510 #define elf_backend_default_use_rela_p 1
19511 #undef elf_backend_want_plt_sym
19512 #define elf_backend_want_plt_sym 1
19513 #undef ELF_MAXPAGESIZE
19514 #define ELF_MAXPAGESIZE 0x1000
19516 #include "elf32-target.h"
19519 /* Merge backend specific data from an object file to the output
19520 object file when linking. */
19523 elf32_arm_merge_private_bfd_data (bfd
*ibfd
, struct bfd_link_info
*info
)
19525 bfd
*obfd
= info
->output_bfd
;
19526 flagword out_flags
;
19528 bfd_boolean flags_compatible
= TRUE
;
19531 /* Check if we have the same endianness. */
19532 if (! _bfd_generic_verify_endian_match (ibfd
, info
))
19535 if (! is_arm_elf (ibfd
) || ! is_arm_elf (obfd
))
19538 if (!elf32_arm_merge_eabi_attributes (ibfd
, info
))
19541 /* The input BFD must have had its flags initialised. */
19542 /* The following seems bogus to me -- The flags are initialized in
19543 the assembler but I don't think an elf_flags_init field is
19544 written into the object. */
19545 /* BFD_ASSERT (elf_flags_init (ibfd)); */
19547 in_flags
= elf_elfheader (ibfd
)->e_flags
;
19548 out_flags
= elf_elfheader (obfd
)->e_flags
;
19550 /* In theory there is no reason why we couldn't handle this. However
19551 in practice it isn't even close to working and there is no real
19552 reason to want it. */
19553 if (EF_ARM_EABI_VERSION (in_flags
) >= EF_ARM_EABI_VER4
19554 && !(ibfd
->flags
& DYNAMIC
)
19555 && (in_flags
& EF_ARM_BE8
))
19557 _bfd_error_handler (_("error: %pB is already in final BE8 format"),
19562 if (!elf_flags_init (obfd
))
19564 /* If the input is the default architecture and had the default
19565 flags then do not bother setting the flags for the output
19566 architecture, instead allow future merges to do this. If no
19567 future merges ever set these flags then they will retain their
19568 uninitialised values, which surprise surprise, correspond
19569 to the default values. */
19570 if (bfd_get_arch_info (ibfd
)->the_default
19571 && elf_elfheader (ibfd
)->e_flags
== 0)
19574 elf_flags_init (obfd
) = TRUE
;
19575 elf_elfheader (obfd
)->e_flags
= in_flags
;
19577 if (bfd_get_arch (obfd
) == bfd_get_arch (ibfd
)
19578 && bfd_get_arch_info (obfd
)->the_default
)
19579 return bfd_set_arch_mach (obfd
, bfd_get_arch (ibfd
), bfd_get_mach (ibfd
));
19584 /* Determine what should happen if the input ARM architecture
19585 does not match the output ARM architecture. */
19586 if (! bfd_arm_merge_machines (ibfd
, obfd
))
19589 /* Identical flags must be compatible. */
19590 if (in_flags
== out_flags
)
19593 /* Check to see if the input BFD actually contains any sections. If
19594 not, its flags may not have been initialised either, but it
19595 cannot actually cause any incompatiblity. Do not short-circuit
19596 dynamic objects; their section list may be emptied by
19597 elf_link_add_object_symbols.
19599 Also check to see if there are no code sections in the input.
19600 In this case there is no need to check for code specific flags.
19601 XXX - do we need to worry about floating-point format compatability
19602 in data sections ? */
19603 if (!(ibfd
->flags
& DYNAMIC
))
19605 bfd_boolean null_input_bfd
= TRUE
;
19606 bfd_boolean only_data_sections
= TRUE
;
19608 for (sec
= ibfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
19610 /* Ignore synthetic glue sections. */
19611 if (strcmp (sec
->name
, ".glue_7")
19612 && strcmp (sec
->name
, ".glue_7t"))
19614 if ((bfd_get_section_flags (ibfd
, sec
)
19615 & (SEC_LOAD
| SEC_CODE
| SEC_HAS_CONTENTS
))
19616 == (SEC_LOAD
| SEC_CODE
| SEC_HAS_CONTENTS
))
19617 only_data_sections
= FALSE
;
19619 null_input_bfd
= FALSE
;
19624 if (null_input_bfd
|| only_data_sections
)
19628 /* Complain about various flag mismatches. */
19629 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags
),
19630 EF_ARM_EABI_VERSION (out_flags
)))
19633 (_("error: source object %pB has EABI version %d, but target %pB has EABI version %d"),
19634 ibfd
, (in_flags
& EF_ARM_EABIMASK
) >> 24,
19635 obfd
, (out_flags
& EF_ARM_EABIMASK
) >> 24);
19639 /* Not sure what needs to be checked for EABI versions >= 1. */
19640 /* VxWorks libraries do not use these flags. */
19641 if (get_elf_backend_data (obfd
) != &elf32_arm_vxworks_bed
19642 && get_elf_backend_data (ibfd
) != &elf32_arm_vxworks_bed
19643 && EF_ARM_EABI_VERSION (in_flags
) == EF_ARM_EABI_UNKNOWN
)
19645 if ((in_flags
& EF_ARM_APCS_26
) != (out_flags
& EF_ARM_APCS_26
))
19648 (_("error: %pB is compiled for APCS-%d, whereas target %pB uses APCS-%d"),
19649 ibfd
, in_flags
& EF_ARM_APCS_26
? 26 : 32,
19650 obfd
, out_flags
& EF_ARM_APCS_26
? 26 : 32);
19651 flags_compatible
= FALSE
;
19654 if ((in_flags
& EF_ARM_APCS_FLOAT
) != (out_flags
& EF_ARM_APCS_FLOAT
))
19656 if (in_flags
& EF_ARM_APCS_FLOAT
)
19658 (_("error: %pB passes floats in float registers, whereas %pB passes them in integer registers"),
19662 (_("error: %pB passes floats in integer registers, whereas %pB passes them in float registers"),
19665 flags_compatible
= FALSE
;
19668 if ((in_flags
& EF_ARM_VFP_FLOAT
) != (out_flags
& EF_ARM_VFP_FLOAT
))
19670 if (in_flags
& EF_ARM_VFP_FLOAT
)
19672 (_("error: %pB uses %s instructions, whereas %pB does not"),
19673 ibfd
, "VFP", obfd
);
19676 (_("error: %pB uses %s instructions, whereas %pB does not"),
19677 ibfd
, "FPA", obfd
);
19679 flags_compatible
= FALSE
;
19682 if ((in_flags
& EF_ARM_MAVERICK_FLOAT
) != (out_flags
& EF_ARM_MAVERICK_FLOAT
))
19684 if (in_flags
& EF_ARM_MAVERICK_FLOAT
)
19686 (_("error: %pB uses %s instructions, whereas %pB does not"),
19687 ibfd
, "Maverick", obfd
);
19690 (_("error: %pB does not use %s instructions, whereas %pB does"),
19691 ibfd
, "Maverick", obfd
);
19693 flags_compatible
= FALSE
;
19696 #ifdef EF_ARM_SOFT_FLOAT
19697 if ((in_flags
& EF_ARM_SOFT_FLOAT
) != (out_flags
& EF_ARM_SOFT_FLOAT
))
19699 /* We can allow interworking between code that is VFP format
19700 layout, and uses either soft float or integer regs for
19701 passing floating point arguments and results. We already
19702 know that the APCS_FLOAT flags match; similarly for VFP
19704 if ((in_flags
& EF_ARM_APCS_FLOAT
) != 0
19705 || (in_flags
& EF_ARM_VFP_FLOAT
) == 0)
19707 if (in_flags
& EF_ARM_SOFT_FLOAT
)
19709 (_("error: %pB uses software FP, whereas %pB uses hardware FP"),
19713 (_("error: %pB uses hardware FP, whereas %pB uses software FP"),
19716 flags_compatible
= FALSE
;
19721 /* Interworking mismatch is only a warning. */
19722 if ((in_flags
& EF_ARM_INTERWORK
) != (out_flags
& EF_ARM_INTERWORK
))
19724 if (in_flags
& EF_ARM_INTERWORK
)
19727 (_("warning: %pB supports interworking, whereas %pB does not"),
19733 (_("warning: %pB does not support interworking, whereas %pB does"),
19739 return flags_compatible
;
19743 /* Symbian OS Targets. */
19745 #undef TARGET_LITTLE_SYM
19746 #define TARGET_LITTLE_SYM arm_elf32_symbian_le_vec
19747 #undef TARGET_LITTLE_NAME
19748 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
19749 #undef TARGET_BIG_SYM
19750 #define TARGET_BIG_SYM arm_elf32_symbian_be_vec
19751 #undef TARGET_BIG_NAME
19752 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
19754 /* Like elf32_arm_link_hash_table_create -- but overrides
19755 appropriately for Symbian OS. */
19757 static struct bfd_link_hash_table
*
19758 elf32_arm_symbian_link_hash_table_create (bfd
*abfd
)
19760 struct bfd_link_hash_table
*ret
;
19762 ret
= elf32_arm_link_hash_table_create (abfd
);
19765 struct elf32_arm_link_hash_table
*htab
19766 = (struct elf32_arm_link_hash_table
*)ret
;
19767 /* There is no PLT header for Symbian OS. */
19768 htab
->plt_header_size
= 0;
19769 /* The PLT entries are each one instruction and one word. */
19770 htab
->plt_entry_size
= 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry
);
19771 htab
->symbian_p
= 1;
19772 /* Symbian uses armv5t or above, so use_blx is always true. */
19774 htab
->root
.is_relocatable_executable
= 1;
19779 static const struct bfd_elf_special_section
19780 elf32_arm_symbian_special_sections
[] =
19782 /* In a BPABI executable, the dynamic linking sections do not go in
19783 the loadable read-only segment. The post-linker may wish to
19784 refer to these sections, but they are not part of the final
19786 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC
, 0 },
19787 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB
, 0 },
19788 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM
, 0 },
19789 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS
, 0 },
19790 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH
, 0 },
19791 /* These sections do not need to be writable as the SymbianOS
19792 postlinker will arrange things so that no dynamic relocation is
19794 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY
, SHF_ALLOC
},
19795 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY
, SHF_ALLOC
},
19796 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY
, SHF_ALLOC
},
19797 { NULL
, 0, 0, 0, 0 }
19801 elf32_arm_symbian_begin_write_processing (bfd
*abfd
,
19802 struct bfd_link_info
*link_info
)
19804 /* BPABI objects are never loaded directly by an OS kernel; they are
19805 processed by a postlinker first, into an OS-specific format. If
19806 the D_PAGED bit is set on the file, BFD will align segments on
19807 page boundaries, so that an OS can directly map the file. With
19808 BPABI objects, that just results in wasted space. In addition,
19809 because we clear the D_PAGED bit, map_sections_to_segments will
19810 recognize that the program headers should not be mapped into any
19811 loadable segment. */
19812 abfd
->flags
&= ~D_PAGED
;
19813 elf32_arm_begin_write_processing (abfd
, link_info
);
19817 elf32_arm_symbian_modify_segment_map (bfd
*abfd
,
19818 struct bfd_link_info
*info
)
19820 struct elf_segment_map
*m
;
19823 /* BPABI shared libraries and executables should have a PT_DYNAMIC
19824 segment. However, because the .dynamic section is not marked
19825 with SEC_LOAD, the generic ELF code will not create such a
19827 dynsec
= bfd_get_section_by_name (abfd
, ".dynamic");
19830 for (m
= elf_seg_map (abfd
); m
!= NULL
; m
= m
->next
)
19831 if (m
->p_type
== PT_DYNAMIC
)
19836 m
= _bfd_elf_make_dynamic_segment (abfd
, dynsec
);
19837 m
->next
= elf_seg_map (abfd
);
19838 elf_seg_map (abfd
) = m
;
19842 /* Also call the generic arm routine. */
19843 return elf32_arm_modify_segment_map (abfd
, info
);
19846 /* Return address for Ith PLT stub in section PLT, for relocation REL
19847 or (bfd_vma) -1 if it should not be included. */
19850 elf32_arm_symbian_plt_sym_val (bfd_vma i
, const asection
*plt
,
19851 const arelent
*rel ATTRIBUTE_UNUSED
)
19853 return plt
->vma
+ 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry
) * i
;
19857 #define elf32_bed elf32_arm_symbian_bed
19859 /* The dynamic sections are not allocated on SymbianOS; the postlinker
19860 will process them and then discard them. */
19861 #undef ELF_DYNAMIC_SEC_FLAGS
19862 #define ELF_DYNAMIC_SEC_FLAGS \
19863 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
19865 #undef elf_backend_emit_relocs
19867 #undef bfd_elf32_bfd_link_hash_table_create
19868 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
19869 #undef elf_backend_special_sections
19870 #define elf_backend_special_sections elf32_arm_symbian_special_sections
19871 #undef elf_backend_begin_write_processing
19872 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
19873 #undef elf_backend_final_write_processing
19874 #define elf_backend_final_write_processing elf32_arm_final_write_processing
19876 #undef elf_backend_modify_segment_map
19877 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
19879 /* There is no .got section for BPABI objects, and hence no header. */
19880 #undef elf_backend_got_header_size
19881 #define elf_backend_got_header_size 0
19883 /* Similarly, there is no .got.plt section. */
19884 #undef elf_backend_want_got_plt
19885 #define elf_backend_want_got_plt 0
19887 #undef elf_backend_plt_sym_val
19888 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
19890 #undef elf_backend_may_use_rel_p
19891 #define elf_backend_may_use_rel_p 1
19892 #undef elf_backend_may_use_rela_p
19893 #define elf_backend_may_use_rela_p 0
19894 #undef elf_backend_default_use_rela_p
19895 #define elf_backend_default_use_rela_p 0
19896 #undef elf_backend_want_plt_sym
19897 #define elf_backend_want_plt_sym 0
19898 #undef elf_backend_dtrel_excludes_plt
19899 #define elf_backend_dtrel_excludes_plt 0
19900 #undef ELF_MAXPAGESIZE
19901 #define ELF_MAXPAGESIZE 0x8000
19903 #include "elf32-target.h"