1 /* 32-bit ELF support for ARM
2 Copyright (C) 1998-2016 Free Software Foundation, Inc.
4 This file is part of BFD, the Binary File Descriptor library.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
25 #include "bfd_stdint.h"
26 #include "libiberty.h"
30 #include "elf-vxworks.h"
33 /* Return the relocation section associated with NAME. HTAB is the
34 bfd's elf32_arm_link_hash_entry. */
35 #define RELOC_SECTION(HTAB, NAME) \
36 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
38 /* Return size of a relocation entry. HTAB is the bfd's
39 elf32_arm_link_hash_entry. */
40 #define RELOC_SIZE(HTAB) \
42 ? sizeof (Elf32_External_Rel) \
43 : sizeof (Elf32_External_Rela))
45 /* Return function to swap relocations in. HTAB is the bfd's
46 elf32_arm_link_hash_entry. */
47 #define SWAP_RELOC_IN(HTAB) \
49 ? bfd_elf32_swap_reloc_in \
50 : bfd_elf32_swap_reloca_in)
52 /* Return function to swap relocations out. HTAB is the bfd's
53 elf32_arm_link_hash_entry. */
54 #define SWAP_RELOC_OUT(HTAB) \
56 ? bfd_elf32_swap_reloc_out \
57 : bfd_elf32_swap_reloca_out)
59 #define elf_info_to_howto 0
60 #define elf_info_to_howto_rel elf32_arm_info_to_howto
62 #define ARM_ELF_ABI_VERSION 0
63 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
65 /* The Adjusted Place, as defined by AAELF. */
66 #define Pa(X) ((X) & 0xfffffffc)
68 static bfd_boolean
elf32_arm_write_section (bfd
*output_bfd
,
69 struct bfd_link_info
*link_info
,
73 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
74 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
77 static reloc_howto_type elf32_arm_howto_table_1
[] =
80 HOWTO (R_ARM_NONE
, /* type */
82 3, /* size (0 = byte, 1 = short, 2 = long) */
84 FALSE
, /* pc_relative */
86 complain_overflow_dont
,/* complain_on_overflow */
87 bfd_elf_generic_reloc
, /* special_function */
88 "R_ARM_NONE", /* name */
89 FALSE
, /* partial_inplace */
92 FALSE
), /* pcrel_offset */
94 HOWTO (R_ARM_PC24
, /* type */
96 2, /* size (0 = byte, 1 = short, 2 = long) */
98 TRUE
, /* pc_relative */
100 complain_overflow_signed
,/* complain_on_overflow */
101 bfd_elf_generic_reloc
, /* special_function */
102 "R_ARM_PC24", /* name */
103 FALSE
, /* partial_inplace */
104 0x00ffffff, /* src_mask */
105 0x00ffffff, /* dst_mask */
106 TRUE
), /* pcrel_offset */
108 /* 32 bit absolute */
109 HOWTO (R_ARM_ABS32
, /* type */
111 2, /* size (0 = byte, 1 = short, 2 = long) */
113 FALSE
, /* pc_relative */
115 complain_overflow_bitfield
,/* complain_on_overflow */
116 bfd_elf_generic_reloc
, /* special_function */
117 "R_ARM_ABS32", /* name */
118 FALSE
, /* partial_inplace */
119 0xffffffff, /* src_mask */
120 0xffffffff, /* dst_mask */
121 FALSE
), /* pcrel_offset */
123 /* standard 32bit pc-relative reloc */
124 HOWTO (R_ARM_REL32
, /* type */
126 2, /* size (0 = byte, 1 = short, 2 = long) */
128 TRUE
, /* pc_relative */
130 complain_overflow_bitfield
,/* complain_on_overflow */
131 bfd_elf_generic_reloc
, /* special_function */
132 "R_ARM_REL32", /* name */
133 FALSE
, /* partial_inplace */
134 0xffffffff, /* src_mask */
135 0xffffffff, /* dst_mask */
136 TRUE
), /* pcrel_offset */
138 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
139 HOWTO (R_ARM_LDR_PC_G0
, /* type */
141 0, /* size (0 = byte, 1 = short, 2 = long) */
143 TRUE
, /* pc_relative */
145 complain_overflow_dont
,/* complain_on_overflow */
146 bfd_elf_generic_reloc
, /* special_function */
147 "R_ARM_LDR_PC_G0", /* name */
148 FALSE
, /* partial_inplace */
149 0xffffffff, /* src_mask */
150 0xffffffff, /* dst_mask */
151 TRUE
), /* pcrel_offset */
153 /* 16 bit absolute */
154 HOWTO (R_ARM_ABS16
, /* type */
156 1, /* size (0 = byte, 1 = short, 2 = long) */
158 FALSE
, /* pc_relative */
160 complain_overflow_bitfield
,/* complain_on_overflow */
161 bfd_elf_generic_reloc
, /* special_function */
162 "R_ARM_ABS16", /* name */
163 FALSE
, /* partial_inplace */
164 0x0000ffff, /* src_mask */
165 0x0000ffff, /* dst_mask */
166 FALSE
), /* pcrel_offset */
168 /* 12 bit absolute */
169 HOWTO (R_ARM_ABS12
, /* type */
171 2, /* size (0 = byte, 1 = short, 2 = long) */
173 FALSE
, /* pc_relative */
175 complain_overflow_bitfield
,/* complain_on_overflow */
176 bfd_elf_generic_reloc
, /* special_function */
177 "R_ARM_ABS12", /* name */
178 FALSE
, /* partial_inplace */
179 0x00000fff, /* src_mask */
180 0x00000fff, /* dst_mask */
181 FALSE
), /* pcrel_offset */
183 HOWTO (R_ARM_THM_ABS5
, /* type */
185 1, /* size (0 = byte, 1 = short, 2 = long) */
187 FALSE
, /* pc_relative */
189 complain_overflow_bitfield
,/* complain_on_overflow */
190 bfd_elf_generic_reloc
, /* special_function */
191 "R_ARM_THM_ABS5", /* name */
192 FALSE
, /* partial_inplace */
193 0x000007e0, /* src_mask */
194 0x000007e0, /* dst_mask */
195 FALSE
), /* pcrel_offset */
198 HOWTO (R_ARM_ABS8
, /* type */
200 0, /* size (0 = byte, 1 = short, 2 = long) */
202 FALSE
, /* pc_relative */
204 complain_overflow_bitfield
,/* complain_on_overflow */
205 bfd_elf_generic_reloc
, /* special_function */
206 "R_ARM_ABS8", /* name */
207 FALSE
, /* partial_inplace */
208 0x000000ff, /* src_mask */
209 0x000000ff, /* dst_mask */
210 FALSE
), /* pcrel_offset */
212 HOWTO (R_ARM_SBREL32
, /* type */
214 2, /* size (0 = byte, 1 = short, 2 = long) */
216 FALSE
, /* pc_relative */
218 complain_overflow_dont
,/* complain_on_overflow */
219 bfd_elf_generic_reloc
, /* special_function */
220 "R_ARM_SBREL32", /* name */
221 FALSE
, /* partial_inplace */
222 0xffffffff, /* src_mask */
223 0xffffffff, /* dst_mask */
224 FALSE
), /* pcrel_offset */
226 HOWTO (R_ARM_THM_CALL
, /* type */
228 2, /* size (0 = byte, 1 = short, 2 = long) */
230 TRUE
, /* pc_relative */
232 complain_overflow_signed
,/* complain_on_overflow */
233 bfd_elf_generic_reloc
, /* special_function */
234 "R_ARM_THM_CALL", /* name */
235 FALSE
, /* partial_inplace */
236 0x07ff2fff, /* src_mask */
237 0x07ff2fff, /* dst_mask */
238 TRUE
), /* pcrel_offset */
240 HOWTO (R_ARM_THM_PC8
, /* type */
242 1, /* size (0 = byte, 1 = short, 2 = long) */
244 TRUE
, /* pc_relative */
246 complain_overflow_signed
,/* complain_on_overflow */
247 bfd_elf_generic_reloc
, /* special_function */
248 "R_ARM_THM_PC8", /* name */
249 FALSE
, /* partial_inplace */
250 0x000000ff, /* src_mask */
251 0x000000ff, /* dst_mask */
252 TRUE
), /* pcrel_offset */
254 HOWTO (R_ARM_BREL_ADJ
, /* type */
256 1, /* size (0 = byte, 1 = short, 2 = long) */
258 FALSE
, /* pc_relative */
260 complain_overflow_signed
,/* complain_on_overflow */
261 bfd_elf_generic_reloc
, /* special_function */
262 "R_ARM_BREL_ADJ", /* name */
263 FALSE
, /* partial_inplace */
264 0xffffffff, /* src_mask */
265 0xffffffff, /* dst_mask */
266 FALSE
), /* pcrel_offset */
268 HOWTO (R_ARM_TLS_DESC
, /* type */
270 2, /* size (0 = byte, 1 = short, 2 = long) */
272 FALSE
, /* pc_relative */
274 complain_overflow_bitfield
,/* complain_on_overflow */
275 bfd_elf_generic_reloc
, /* special_function */
276 "R_ARM_TLS_DESC", /* name */
277 FALSE
, /* partial_inplace */
278 0xffffffff, /* src_mask */
279 0xffffffff, /* dst_mask */
280 FALSE
), /* pcrel_offset */
282 HOWTO (R_ARM_THM_SWI8
, /* type */
284 0, /* size (0 = byte, 1 = short, 2 = long) */
286 FALSE
, /* pc_relative */
288 complain_overflow_signed
,/* complain_on_overflow */
289 bfd_elf_generic_reloc
, /* special_function */
290 "R_ARM_SWI8", /* name */
291 FALSE
, /* partial_inplace */
292 0x00000000, /* src_mask */
293 0x00000000, /* dst_mask */
294 FALSE
), /* pcrel_offset */
296 /* BLX instruction for the ARM. */
297 HOWTO (R_ARM_XPC25
, /* type */
299 2, /* size (0 = byte, 1 = short, 2 = long) */
301 TRUE
, /* pc_relative */
303 complain_overflow_signed
,/* complain_on_overflow */
304 bfd_elf_generic_reloc
, /* special_function */
305 "R_ARM_XPC25", /* name */
306 FALSE
, /* partial_inplace */
307 0x00ffffff, /* src_mask */
308 0x00ffffff, /* dst_mask */
309 TRUE
), /* pcrel_offset */
311 /* BLX instruction for the Thumb. */
312 HOWTO (R_ARM_THM_XPC22
, /* type */
314 2, /* size (0 = byte, 1 = short, 2 = long) */
316 TRUE
, /* pc_relative */
318 complain_overflow_signed
,/* complain_on_overflow */
319 bfd_elf_generic_reloc
, /* special_function */
320 "R_ARM_THM_XPC22", /* name */
321 FALSE
, /* partial_inplace */
322 0x07ff2fff, /* src_mask */
323 0x07ff2fff, /* dst_mask */
324 TRUE
), /* pcrel_offset */
326 /* Dynamic TLS relocations. */
328 HOWTO (R_ARM_TLS_DTPMOD32
, /* type */
330 2, /* size (0 = byte, 1 = short, 2 = long) */
332 FALSE
, /* pc_relative */
334 complain_overflow_bitfield
,/* complain_on_overflow */
335 bfd_elf_generic_reloc
, /* special_function */
336 "R_ARM_TLS_DTPMOD32", /* name */
337 TRUE
, /* partial_inplace */
338 0xffffffff, /* src_mask */
339 0xffffffff, /* dst_mask */
340 FALSE
), /* pcrel_offset */
342 HOWTO (R_ARM_TLS_DTPOFF32
, /* type */
344 2, /* size (0 = byte, 1 = short, 2 = long) */
346 FALSE
, /* pc_relative */
348 complain_overflow_bitfield
,/* complain_on_overflow */
349 bfd_elf_generic_reloc
, /* special_function */
350 "R_ARM_TLS_DTPOFF32", /* name */
351 TRUE
, /* partial_inplace */
352 0xffffffff, /* src_mask */
353 0xffffffff, /* dst_mask */
354 FALSE
), /* pcrel_offset */
356 HOWTO (R_ARM_TLS_TPOFF32
, /* type */
358 2, /* size (0 = byte, 1 = short, 2 = long) */
360 FALSE
, /* pc_relative */
362 complain_overflow_bitfield
,/* complain_on_overflow */
363 bfd_elf_generic_reloc
, /* special_function */
364 "R_ARM_TLS_TPOFF32", /* name */
365 TRUE
, /* partial_inplace */
366 0xffffffff, /* src_mask */
367 0xffffffff, /* dst_mask */
368 FALSE
), /* pcrel_offset */
370 /* Relocs used in ARM Linux */
372 HOWTO (R_ARM_COPY
, /* type */
374 2, /* size (0 = byte, 1 = short, 2 = long) */
376 FALSE
, /* pc_relative */
378 complain_overflow_bitfield
,/* complain_on_overflow */
379 bfd_elf_generic_reloc
, /* special_function */
380 "R_ARM_COPY", /* name */
381 TRUE
, /* partial_inplace */
382 0xffffffff, /* src_mask */
383 0xffffffff, /* dst_mask */
384 FALSE
), /* pcrel_offset */
386 HOWTO (R_ARM_GLOB_DAT
, /* type */
388 2, /* size (0 = byte, 1 = short, 2 = long) */
390 FALSE
, /* pc_relative */
392 complain_overflow_bitfield
,/* complain_on_overflow */
393 bfd_elf_generic_reloc
, /* special_function */
394 "R_ARM_GLOB_DAT", /* name */
395 TRUE
, /* partial_inplace */
396 0xffffffff, /* src_mask */
397 0xffffffff, /* dst_mask */
398 FALSE
), /* pcrel_offset */
400 HOWTO (R_ARM_JUMP_SLOT
, /* type */
402 2, /* size (0 = byte, 1 = short, 2 = long) */
404 FALSE
, /* pc_relative */
406 complain_overflow_bitfield
,/* complain_on_overflow */
407 bfd_elf_generic_reloc
, /* special_function */
408 "R_ARM_JUMP_SLOT", /* name */
409 TRUE
, /* partial_inplace */
410 0xffffffff, /* src_mask */
411 0xffffffff, /* dst_mask */
412 FALSE
), /* pcrel_offset */
414 HOWTO (R_ARM_RELATIVE
, /* type */
416 2, /* size (0 = byte, 1 = short, 2 = long) */
418 FALSE
, /* pc_relative */
420 complain_overflow_bitfield
,/* complain_on_overflow */
421 bfd_elf_generic_reloc
, /* special_function */
422 "R_ARM_RELATIVE", /* name */
423 TRUE
, /* partial_inplace */
424 0xffffffff, /* src_mask */
425 0xffffffff, /* dst_mask */
426 FALSE
), /* pcrel_offset */
428 HOWTO (R_ARM_GOTOFF32
, /* type */
430 2, /* size (0 = byte, 1 = short, 2 = long) */
432 FALSE
, /* pc_relative */
434 complain_overflow_bitfield
,/* complain_on_overflow */
435 bfd_elf_generic_reloc
, /* special_function */
436 "R_ARM_GOTOFF32", /* name */
437 TRUE
, /* partial_inplace */
438 0xffffffff, /* src_mask */
439 0xffffffff, /* dst_mask */
440 FALSE
), /* pcrel_offset */
442 HOWTO (R_ARM_GOTPC
, /* type */
444 2, /* size (0 = byte, 1 = short, 2 = long) */
446 TRUE
, /* pc_relative */
448 complain_overflow_bitfield
,/* complain_on_overflow */
449 bfd_elf_generic_reloc
, /* special_function */
450 "R_ARM_GOTPC", /* name */
451 TRUE
, /* partial_inplace */
452 0xffffffff, /* src_mask */
453 0xffffffff, /* dst_mask */
454 TRUE
), /* pcrel_offset */
456 HOWTO (R_ARM_GOT32
, /* type */
458 2, /* size (0 = byte, 1 = short, 2 = long) */
460 FALSE
, /* pc_relative */
462 complain_overflow_bitfield
,/* complain_on_overflow */
463 bfd_elf_generic_reloc
, /* special_function */
464 "R_ARM_GOT32", /* name */
465 TRUE
, /* partial_inplace */
466 0xffffffff, /* src_mask */
467 0xffffffff, /* dst_mask */
468 FALSE
), /* pcrel_offset */
470 HOWTO (R_ARM_PLT32
, /* type */
472 2, /* size (0 = byte, 1 = short, 2 = long) */
474 TRUE
, /* pc_relative */
476 complain_overflow_bitfield
,/* complain_on_overflow */
477 bfd_elf_generic_reloc
, /* special_function */
478 "R_ARM_PLT32", /* name */
479 FALSE
, /* partial_inplace */
480 0x00ffffff, /* src_mask */
481 0x00ffffff, /* dst_mask */
482 TRUE
), /* pcrel_offset */
484 HOWTO (R_ARM_CALL
, /* type */
486 2, /* size (0 = byte, 1 = short, 2 = long) */
488 TRUE
, /* pc_relative */
490 complain_overflow_signed
,/* complain_on_overflow */
491 bfd_elf_generic_reloc
, /* special_function */
492 "R_ARM_CALL", /* name */
493 FALSE
, /* partial_inplace */
494 0x00ffffff, /* src_mask */
495 0x00ffffff, /* dst_mask */
496 TRUE
), /* pcrel_offset */
498 HOWTO (R_ARM_JUMP24
, /* type */
500 2, /* size (0 = byte, 1 = short, 2 = long) */
502 TRUE
, /* pc_relative */
504 complain_overflow_signed
,/* complain_on_overflow */
505 bfd_elf_generic_reloc
, /* special_function */
506 "R_ARM_JUMP24", /* name */
507 FALSE
, /* partial_inplace */
508 0x00ffffff, /* src_mask */
509 0x00ffffff, /* dst_mask */
510 TRUE
), /* pcrel_offset */
512 HOWTO (R_ARM_THM_JUMP24
, /* type */
514 2, /* size (0 = byte, 1 = short, 2 = long) */
516 TRUE
, /* pc_relative */
518 complain_overflow_signed
,/* complain_on_overflow */
519 bfd_elf_generic_reloc
, /* special_function */
520 "R_ARM_THM_JUMP24", /* name */
521 FALSE
, /* partial_inplace */
522 0x07ff2fff, /* src_mask */
523 0x07ff2fff, /* dst_mask */
524 TRUE
), /* pcrel_offset */
526 HOWTO (R_ARM_BASE_ABS
, /* type */
528 2, /* size (0 = byte, 1 = short, 2 = long) */
530 FALSE
, /* pc_relative */
532 complain_overflow_dont
,/* complain_on_overflow */
533 bfd_elf_generic_reloc
, /* special_function */
534 "R_ARM_BASE_ABS", /* name */
535 FALSE
, /* partial_inplace */
536 0xffffffff, /* src_mask */
537 0xffffffff, /* dst_mask */
538 FALSE
), /* pcrel_offset */
540 HOWTO (R_ARM_ALU_PCREL7_0
, /* type */
542 2, /* size (0 = byte, 1 = short, 2 = long) */
544 TRUE
, /* pc_relative */
546 complain_overflow_dont
,/* complain_on_overflow */
547 bfd_elf_generic_reloc
, /* special_function */
548 "R_ARM_ALU_PCREL_7_0", /* name */
549 FALSE
, /* partial_inplace */
550 0x00000fff, /* src_mask */
551 0x00000fff, /* dst_mask */
552 TRUE
), /* pcrel_offset */
554 HOWTO (R_ARM_ALU_PCREL15_8
, /* type */
556 2, /* size (0 = byte, 1 = short, 2 = long) */
558 TRUE
, /* pc_relative */
560 complain_overflow_dont
,/* complain_on_overflow */
561 bfd_elf_generic_reloc
, /* special_function */
562 "R_ARM_ALU_PCREL_15_8",/* name */
563 FALSE
, /* partial_inplace */
564 0x00000fff, /* src_mask */
565 0x00000fff, /* dst_mask */
566 TRUE
), /* pcrel_offset */
568 HOWTO (R_ARM_ALU_PCREL23_15
, /* type */
570 2, /* size (0 = byte, 1 = short, 2 = long) */
572 TRUE
, /* pc_relative */
574 complain_overflow_dont
,/* complain_on_overflow */
575 bfd_elf_generic_reloc
, /* special_function */
576 "R_ARM_ALU_PCREL_23_15",/* name */
577 FALSE
, /* partial_inplace */
578 0x00000fff, /* src_mask */
579 0x00000fff, /* dst_mask */
580 TRUE
), /* pcrel_offset */
582 HOWTO (R_ARM_LDR_SBREL_11_0
, /* type */
584 2, /* size (0 = byte, 1 = short, 2 = long) */
586 FALSE
, /* pc_relative */
588 complain_overflow_dont
,/* complain_on_overflow */
589 bfd_elf_generic_reloc
, /* special_function */
590 "R_ARM_LDR_SBREL_11_0",/* name */
591 FALSE
, /* partial_inplace */
592 0x00000fff, /* src_mask */
593 0x00000fff, /* dst_mask */
594 FALSE
), /* pcrel_offset */
596 HOWTO (R_ARM_ALU_SBREL_19_12
, /* type */
598 2, /* size (0 = byte, 1 = short, 2 = long) */
600 FALSE
, /* pc_relative */
602 complain_overflow_dont
,/* complain_on_overflow */
603 bfd_elf_generic_reloc
, /* special_function */
604 "R_ARM_ALU_SBREL_19_12",/* name */
605 FALSE
, /* partial_inplace */
606 0x000ff000, /* src_mask */
607 0x000ff000, /* dst_mask */
608 FALSE
), /* pcrel_offset */
610 HOWTO (R_ARM_ALU_SBREL_27_20
, /* type */
612 2, /* size (0 = byte, 1 = short, 2 = long) */
614 FALSE
, /* pc_relative */
616 complain_overflow_dont
,/* complain_on_overflow */
617 bfd_elf_generic_reloc
, /* special_function */
618 "R_ARM_ALU_SBREL_27_20",/* name */
619 FALSE
, /* partial_inplace */
620 0x0ff00000, /* src_mask */
621 0x0ff00000, /* dst_mask */
622 FALSE
), /* pcrel_offset */
624 HOWTO (R_ARM_TARGET1
, /* type */
626 2, /* size (0 = byte, 1 = short, 2 = long) */
628 FALSE
, /* pc_relative */
630 complain_overflow_dont
,/* complain_on_overflow */
631 bfd_elf_generic_reloc
, /* special_function */
632 "R_ARM_TARGET1", /* name */
633 FALSE
, /* partial_inplace */
634 0xffffffff, /* src_mask */
635 0xffffffff, /* dst_mask */
636 FALSE
), /* pcrel_offset */
638 HOWTO (R_ARM_ROSEGREL32
, /* type */
640 2, /* size (0 = byte, 1 = short, 2 = long) */
642 FALSE
, /* pc_relative */
644 complain_overflow_dont
,/* complain_on_overflow */
645 bfd_elf_generic_reloc
, /* special_function */
646 "R_ARM_ROSEGREL32", /* name */
647 FALSE
, /* partial_inplace */
648 0xffffffff, /* src_mask */
649 0xffffffff, /* dst_mask */
650 FALSE
), /* pcrel_offset */
652 HOWTO (R_ARM_V4BX
, /* type */
654 2, /* size (0 = byte, 1 = short, 2 = long) */
656 FALSE
, /* pc_relative */
658 complain_overflow_dont
,/* complain_on_overflow */
659 bfd_elf_generic_reloc
, /* special_function */
660 "R_ARM_V4BX", /* name */
661 FALSE
, /* partial_inplace */
662 0xffffffff, /* src_mask */
663 0xffffffff, /* dst_mask */
664 FALSE
), /* pcrel_offset */
666 HOWTO (R_ARM_TARGET2
, /* type */
668 2, /* size (0 = byte, 1 = short, 2 = long) */
670 FALSE
, /* pc_relative */
672 complain_overflow_signed
,/* complain_on_overflow */
673 bfd_elf_generic_reloc
, /* special_function */
674 "R_ARM_TARGET2", /* name */
675 FALSE
, /* partial_inplace */
676 0xffffffff, /* src_mask */
677 0xffffffff, /* dst_mask */
678 TRUE
), /* pcrel_offset */
680 HOWTO (R_ARM_PREL31
, /* type */
682 2, /* size (0 = byte, 1 = short, 2 = long) */
684 TRUE
, /* pc_relative */
686 complain_overflow_signed
,/* complain_on_overflow */
687 bfd_elf_generic_reloc
, /* special_function */
688 "R_ARM_PREL31", /* name */
689 FALSE
, /* partial_inplace */
690 0x7fffffff, /* src_mask */
691 0x7fffffff, /* dst_mask */
692 TRUE
), /* pcrel_offset */
694 HOWTO (R_ARM_MOVW_ABS_NC
, /* type */
696 2, /* size (0 = byte, 1 = short, 2 = long) */
698 FALSE
, /* pc_relative */
700 complain_overflow_dont
,/* complain_on_overflow */
701 bfd_elf_generic_reloc
, /* special_function */
702 "R_ARM_MOVW_ABS_NC", /* name */
703 FALSE
, /* partial_inplace */
704 0x000f0fff, /* src_mask */
705 0x000f0fff, /* dst_mask */
706 FALSE
), /* pcrel_offset */
708 HOWTO (R_ARM_MOVT_ABS
, /* type */
710 2, /* size (0 = byte, 1 = short, 2 = long) */
712 FALSE
, /* pc_relative */
714 complain_overflow_bitfield
,/* complain_on_overflow */
715 bfd_elf_generic_reloc
, /* special_function */
716 "R_ARM_MOVT_ABS", /* name */
717 FALSE
, /* partial_inplace */
718 0x000f0fff, /* src_mask */
719 0x000f0fff, /* dst_mask */
720 FALSE
), /* pcrel_offset */
722 HOWTO (R_ARM_MOVW_PREL_NC
, /* type */
724 2, /* size (0 = byte, 1 = short, 2 = long) */
726 TRUE
, /* pc_relative */
728 complain_overflow_dont
,/* complain_on_overflow */
729 bfd_elf_generic_reloc
, /* special_function */
730 "R_ARM_MOVW_PREL_NC", /* name */
731 FALSE
, /* partial_inplace */
732 0x000f0fff, /* src_mask */
733 0x000f0fff, /* dst_mask */
734 TRUE
), /* pcrel_offset */
736 HOWTO (R_ARM_MOVT_PREL
, /* type */
738 2, /* size (0 = byte, 1 = short, 2 = long) */
740 TRUE
, /* pc_relative */
742 complain_overflow_bitfield
,/* complain_on_overflow */
743 bfd_elf_generic_reloc
, /* special_function */
744 "R_ARM_MOVT_PREL", /* name */
745 FALSE
, /* partial_inplace */
746 0x000f0fff, /* src_mask */
747 0x000f0fff, /* dst_mask */
748 TRUE
), /* pcrel_offset */
750 HOWTO (R_ARM_THM_MOVW_ABS_NC
, /* type */
752 2, /* size (0 = byte, 1 = short, 2 = long) */
754 FALSE
, /* pc_relative */
756 complain_overflow_dont
,/* complain_on_overflow */
757 bfd_elf_generic_reloc
, /* special_function */
758 "R_ARM_THM_MOVW_ABS_NC",/* name */
759 FALSE
, /* partial_inplace */
760 0x040f70ff, /* src_mask */
761 0x040f70ff, /* dst_mask */
762 FALSE
), /* pcrel_offset */
764 HOWTO (R_ARM_THM_MOVT_ABS
, /* type */
766 2, /* size (0 = byte, 1 = short, 2 = long) */
768 FALSE
, /* pc_relative */
770 complain_overflow_bitfield
,/* complain_on_overflow */
771 bfd_elf_generic_reloc
, /* special_function */
772 "R_ARM_THM_MOVT_ABS", /* name */
773 FALSE
, /* partial_inplace */
774 0x040f70ff, /* src_mask */
775 0x040f70ff, /* dst_mask */
776 FALSE
), /* pcrel_offset */
778 HOWTO (R_ARM_THM_MOVW_PREL_NC
,/* type */
780 2, /* size (0 = byte, 1 = short, 2 = long) */
782 TRUE
, /* pc_relative */
784 complain_overflow_dont
,/* complain_on_overflow */
785 bfd_elf_generic_reloc
, /* special_function */
786 "R_ARM_THM_MOVW_PREL_NC",/* name */
787 FALSE
, /* partial_inplace */
788 0x040f70ff, /* src_mask */
789 0x040f70ff, /* dst_mask */
790 TRUE
), /* pcrel_offset */
792 HOWTO (R_ARM_THM_MOVT_PREL
, /* type */
794 2, /* size (0 = byte, 1 = short, 2 = long) */
796 TRUE
, /* pc_relative */
798 complain_overflow_bitfield
,/* complain_on_overflow */
799 bfd_elf_generic_reloc
, /* special_function */
800 "R_ARM_THM_MOVT_PREL", /* name */
801 FALSE
, /* partial_inplace */
802 0x040f70ff, /* src_mask */
803 0x040f70ff, /* dst_mask */
804 TRUE
), /* pcrel_offset */
806 HOWTO (R_ARM_THM_JUMP19
, /* type */
808 2, /* size (0 = byte, 1 = short, 2 = long) */
810 TRUE
, /* pc_relative */
812 complain_overflow_signed
,/* complain_on_overflow */
813 bfd_elf_generic_reloc
, /* special_function */
814 "R_ARM_THM_JUMP19", /* name */
815 FALSE
, /* partial_inplace */
816 0x043f2fff, /* src_mask */
817 0x043f2fff, /* dst_mask */
818 TRUE
), /* pcrel_offset */
820 HOWTO (R_ARM_THM_JUMP6
, /* type */
822 1, /* size (0 = byte, 1 = short, 2 = long) */
824 TRUE
, /* pc_relative */
826 complain_overflow_unsigned
,/* complain_on_overflow */
827 bfd_elf_generic_reloc
, /* special_function */
828 "R_ARM_THM_JUMP6", /* name */
829 FALSE
, /* partial_inplace */
830 0x02f8, /* src_mask */
831 0x02f8, /* dst_mask */
832 TRUE
), /* pcrel_offset */
834 /* These are declared as 13-bit signed relocations because we can
835 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
837 HOWTO (R_ARM_THM_ALU_PREL_11_0
,/* type */
839 2, /* size (0 = byte, 1 = short, 2 = long) */
841 TRUE
, /* pc_relative */
843 complain_overflow_dont
,/* complain_on_overflow */
844 bfd_elf_generic_reloc
, /* special_function */
845 "R_ARM_THM_ALU_PREL_11_0",/* name */
846 FALSE
, /* partial_inplace */
847 0xffffffff, /* src_mask */
848 0xffffffff, /* dst_mask */
849 TRUE
), /* pcrel_offset */
851 HOWTO (R_ARM_THM_PC12
, /* type */
853 2, /* size (0 = byte, 1 = short, 2 = long) */
855 TRUE
, /* pc_relative */
857 complain_overflow_dont
,/* complain_on_overflow */
858 bfd_elf_generic_reloc
, /* special_function */
859 "R_ARM_THM_PC12", /* name */
860 FALSE
, /* partial_inplace */
861 0xffffffff, /* src_mask */
862 0xffffffff, /* dst_mask */
863 TRUE
), /* pcrel_offset */
865 HOWTO (R_ARM_ABS32_NOI
, /* type */
867 2, /* size (0 = byte, 1 = short, 2 = long) */
869 FALSE
, /* pc_relative */
871 complain_overflow_dont
,/* complain_on_overflow */
872 bfd_elf_generic_reloc
, /* special_function */
873 "R_ARM_ABS32_NOI", /* name */
874 FALSE
, /* partial_inplace */
875 0xffffffff, /* src_mask */
876 0xffffffff, /* dst_mask */
877 FALSE
), /* pcrel_offset */
879 HOWTO (R_ARM_REL32_NOI
, /* type */
881 2, /* size (0 = byte, 1 = short, 2 = long) */
883 TRUE
, /* pc_relative */
885 complain_overflow_dont
,/* complain_on_overflow */
886 bfd_elf_generic_reloc
, /* special_function */
887 "R_ARM_REL32_NOI", /* name */
888 FALSE
, /* partial_inplace */
889 0xffffffff, /* src_mask */
890 0xffffffff, /* dst_mask */
891 FALSE
), /* pcrel_offset */
893 /* Group relocations. */
895 HOWTO (R_ARM_ALU_PC_G0_NC
, /* type */
897 2, /* size (0 = byte, 1 = short, 2 = long) */
899 TRUE
, /* pc_relative */
901 complain_overflow_dont
,/* complain_on_overflow */
902 bfd_elf_generic_reloc
, /* special_function */
903 "R_ARM_ALU_PC_G0_NC", /* name */
904 FALSE
, /* partial_inplace */
905 0xffffffff, /* src_mask */
906 0xffffffff, /* dst_mask */
907 TRUE
), /* pcrel_offset */
909 HOWTO (R_ARM_ALU_PC_G0
, /* type */
911 2, /* size (0 = byte, 1 = short, 2 = long) */
913 TRUE
, /* pc_relative */
915 complain_overflow_dont
,/* complain_on_overflow */
916 bfd_elf_generic_reloc
, /* special_function */
917 "R_ARM_ALU_PC_G0", /* name */
918 FALSE
, /* partial_inplace */
919 0xffffffff, /* src_mask */
920 0xffffffff, /* dst_mask */
921 TRUE
), /* pcrel_offset */
923 HOWTO (R_ARM_ALU_PC_G1_NC
, /* type */
925 2, /* size (0 = byte, 1 = short, 2 = long) */
927 TRUE
, /* pc_relative */
929 complain_overflow_dont
,/* complain_on_overflow */
930 bfd_elf_generic_reloc
, /* special_function */
931 "R_ARM_ALU_PC_G1_NC", /* name */
932 FALSE
, /* partial_inplace */
933 0xffffffff, /* src_mask */
934 0xffffffff, /* dst_mask */
935 TRUE
), /* pcrel_offset */
937 HOWTO (R_ARM_ALU_PC_G1
, /* type */
939 2, /* size (0 = byte, 1 = short, 2 = long) */
941 TRUE
, /* pc_relative */
943 complain_overflow_dont
,/* complain_on_overflow */
944 bfd_elf_generic_reloc
, /* special_function */
945 "R_ARM_ALU_PC_G1", /* name */
946 FALSE
, /* partial_inplace */
947 0xffffffff, /* src_mask */
948 0xffffffff, /* dst_mask */
949 TRUE
), /* pcrel_offset */
951 HOWTO (R_ARM_ALU_PC_G2
, /* type */
953 2, /* size (0 = byte, 1 = short, 2 = long) */
955 TRUE
, /* pc_relative */
957 complain_overflow_dont
,/* complain_on_overflow */
958 bfd_elf_generic_reloc
, /* special_function */
959 "R_ARM_ALU_PC_G2", /* name */
960 FALSE
, /* partial_inplace */
961 0xffffffff, /* src_mask */
962 0xffffffff, /* dst_mask */
963 TRUE
), /* pcrel_offset */
965 HOWTO (R_ARM_LDR_PC_G1
, /* type */
967 2, /* size (0 = byte, 1 = short, 2 = long) */
969 TRUE
, /* pc_relative */
971 complain_overflow_dont
,/* complain_on_overflow */
972 bfd_elf_generic_reloc
, /* special_function */
973 "R_ARM_LDR_PC_G1", /* name */
974 FALSE
, /* partial_inplace */
975 0xffffffff, /* src_mask */
976 0xffffffff, /* dst_mask */
977 TRUE
), /* pcrel_offset */
979 HOWTO (R_ARM_LDR_PC_G2
, /* type */
981 2, /* size (0 = byte, 1 = short, 2 = long) */
983 TRUE
, /* pc_relative */
985 complain_overflow_dont
,/* complain_on_overflow */
986 bfd_elf_generic_reloc
, /* special_function */
987 "R_ARM_LDR_PC_G2", /* name */
988 FALSE
, /* partial_inplace */
989 0xffffffff, /* src_mask */
990 0xffffffff, /* dst_mask */
991 TRUE
), /* pcrel_offset */
993 HOWTO (R_ARM_LDRS_PC_G0
, /* type */
995 2, /* size (0 = byte, 1 = short, 2 = long) */
997 TRUE
, /* pc_relative */
999 complain_overflow_dont
,/* complain_on_overflow */
1000 bfd_elf_generic_reloc
, /* special_function */
1001 "R_ARM_LDRS_PC_G0", /* name */
1002 FALSE
, /* partial_inplace */
1003 0xffffffff, /* src_mask */
1004 0xffffffff, /* dst_mask */
1005 TRUE
), /* pcrel_offset */
1007 HOWTO (R_ARM_LDRS_PC_G1
, /* type */
1009 2, /* size (0 = byte, 1 = short, 2 = long) */
1011 TRUE
, /* pc_relative */
1013 complain_overflow_dont
,/* complain_on_overflow */
1014 bfd_elf_generic_reloc
, /* special_function */
1015 "R_ARM_LDRS_PC_G1", /* name */
1016 FALSE
, /* partial_inplace */
1017 0xffffffff, /* src_mask */
1018 0xffffffff, /* dst_mask */
1019 TRUE
), /* pcrel_offset */
1021 HOWTO (R_ARM_LDRS_PC_G2
, /* type */
1023 2, /* size (0 = byte, 1 = short, 2 = long) */
1025 TRUE
, /* pc_relative */
1027 complain_overflow_dont
,/* complain_on_overflow */
1028 bfd_elf_generic_reloc
, /* special_function */
1029 "R_ARM_LDRS_PC_G2", /* name */
1030 FALSE
, /* partial_inplace */
1031 0xffffffff, /* src_mask */
1032 0xffffffff, /* dst_mask */
1033 TRUE
), /* pcrel_offset */
1035 HOWTO (R_ARM_LDC_PC_G0
, /* type */
1037 2, /* size (0 = byte, 1 = short, 2 = long) */
1039 TRUE
, /* pc_relative */
1041 complain_overflow_dont
,/* complain_on_overflow */
1042 bfd_elf_generic_reloc
, /* special_function */
1043 "R_ARM_LDC_PC_G0", /* name */
1044 FALSE
, /* partial_inplace */
1045 0xffffffff, /* src_mask */
1046 0xffffffff, /* dst_mask */
1047 TRUE
), /* pcrel_offset */
1049 HOWTO (R_ARM_LDC_PC_G1
, /* type */
1051 2, /* size (0 = byte, 1 = short, 2 = long) */
1053 TRUE
, /* pc_relative */
1055 complain_overflow_dont
,/* complain_on_overflow */
1056 bfd_elf_generic_reloc
, /* special_function */
1057 "R_ARM_LDC_PC_G1", /* name */
1058 FALSE
, /* partial_inplace */
1059 0xffffffff, /* src_mask */
1060 0xffffffff, /* dst_mask */
1061 TRUE
), /* pcrel_offset */
1063 HOWTO (R_ARM_LDC_PC_G2
, /* type */
1065 2, /* size (0 = byte, 1 = short, 2 = long) */
1067 TRUE
, /* pc_relative */
1069 complain_overflow_dont
,/* complain_on_overflow */
1070 bfd_elf_generic_reloc
, /* special_function */
1071 "R_ARM_LDC_PC_G2", /* name */
1072 FALSE
, /* partial_inplace */
1073 0xffffffff, /* src_mask */
1074 0xffffffff, /* dst_mask */
1075 TRUE
), /* pcrel_offset */
1077 HOWTO (R_ARM_ALU_SB_G0_NC
, /* type */
1079 2, /* size (0 = byte, 1 = short, 2 = long) */
1081 TRUE
, /* pc_relative */
1083 complain_overflow_dont
,/* complain_on_overflow */
1084 bfd_elf_generic_reloc
, /* special_function */
1085 "R_ARM_ALU_SB_G0_NC", /* name */
1086 FALSE
, /* partial_inplace */
1087 0xffffffff, /* src_mask */
1088 0xffffffff, /* dst_mask */
1089 TRUE
), /* pcrel_offset */
1091 HOWTO (R_ARM_ALU_SB_G0
, /* type */
1093 2, /* size (0 = byte, 1 = short, 2 = long) */
1095 TRUE
, /* pc_relative */
1097 complain_overflow_dont
,/* complain_on_overflow */
1098 bfd_elf_generic_reloc
, /* special_function */
1099 "R_ARM_ALU_SB_G0", /* name */
1100 FALSE
, /* partial_inplace */
1101 0xffffffff, /* src_mask */
1102 0xffffffff, /* dst_mask */
1103 TRUE
), /* pcrel_offset */
1105 HOWTO (R_ARM_ALU_SB_G1_NC
, /* type */
1107 2, /* size (0 = byte, 1 = short, 2 = long) */
1109 TRUE
, /* pc_relative */
1111 complain_overflow_dont
,/* complain_on_overflow */
1112 bfd_elf_generic_reloc
, /* special_function */
1113 "R_ARM_ALU_SB_G1_NC", /* name */
1114 FALSE
, /* partial_inplace */
1115 0xffffffff, /* src_mask */
1116 0xffffffff, /* dst_mask */
1117 TRUE
), /* pcrel_offset */
1119 HOWTO (R_ARM_ALU_SB_G1
, /* type */
1121 2, /* size (0 = byte, 1 = short, 2 = long) */
1123 TRUE
, /* pc_relative */
1125 complain_overflow_dont
,/* complain_on_overflow */
1126 bfd_elf_generic_reloc
, /* special_function */
1127 "R_ARM_ALU_SB_G1", /* name */
1128 FALSE
, /* partial_inplace */
1129 0xffffffff, /* src_mask */
1130 0xffffffff, /* dst_mask */
1131 TRUE
), /* pcrel_offset */
1133 HOWTO (R_ARM_ALU_SB_G2
, /* type */
1135 2, /* size (0 = byte, 1 = short, 2 = long) */
1137 TRUE
, /* pc_relative */
1139 complain_overflow_dont
,/* complain_on_overflow */
1140 bfd_elf_generic_reloc
, /* special_function */
1141 "R_ARM_ALU_SB_G2", /* name */
1142 FALSE
, /* partial_inplace */
1143 0xffffffff, /* src_mask */
1144 0xffffffff, /* dst_mask */
1145 TRUE
), /* pcrel_offset */
1147 HOWTO (R_ARM_LDR_SB_G0
, /* type */
1149 2, /* size (0 = byte, 1 = short, 2 = long) */
1151 TRUE
, /* pc_relative */
1153 complain_overflow_dont
,/* complain_on_overflow */
1154 bfd_elf_generic_reloc
, /* special_function */
1155 "R_ARM_LDR_SB_G0", /* name */
1156 FALSE
, /* partial_inplace */
1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
1159 TRUE
), /* pcrel_offset */
1161 HOWTO (R_ARM_LDR_SB_G1
, /* type */
1163 2, /* size (0 = byte, 1 = short, 2 = long) */
1165 TRUE
, /* pc_relative */
1167 complain_overflow_dont
,/* complain_on_overflow */
1168 bfd_elf_generic_reloc
, /* special_function */
1169 "R_ARM_LDR_SB_G1", /* name */
1170 FALSE
, /* partial_inplace */
1171 0xffffffff, /* src_mask */
1172 0xffffffff, /* dst_mask */
1173 TRUE
), /* pcrel_offset */
1175 HOWTO (R_ARM_LDR_SB_G2
, /* type */
1177 2, /* size (0 = byte, 1 = short, 2 = long) */
1179 TRUE
, /* pc_relative */
1181 complain_overflow_dont
,/* complain_on_overflow */
1182 bfd_elf_generic_reloc
, /* special_function */
1183 "R_ARM_LDR_SB_G2", /* name */
1184 FALSE
, /* partial_inplace */
1185 0xffffffff, /* src_mask */
1186 0xffffffff, /* dst_mask */
1187 TRUE
), /* pcrel_offset */
1189 HOWTO (R_ARM_LDRS_SB_G0
, /* type */
1191 2, /* size (0 = byte, 1 = short, 2 = long) */
1193 TRUE
, /* pc_relative */
1195 complain_overflow_dont
,/* complain_on_overflow */
1196 bfd_elf_generic_reloc
, /* special_function */
1197 "R_ARM_LDRS_SB_G0", /* name */
1198 FALSE
, /* partial_inplace */
1199 0xffffffff, /* src_mask */
1200 0xffffffff, /* dst_mask */
1201 TRUE
), /* pcrel_offset */
1203 HOWTO (R_ARM_LDRS_SB_G1
, /* type */
1205 2, /* size (0 = byte, 1 = short, 2 = long) */
1207 TRUE
, /* pc_relative */
1209 complain_overflow_dont
,/* complain_on_overflow */
1210 bfd_elf_generic_reloc
, /* special_function */
1211 "R_ARM_LDRS_SB_G1", /* name */
1212 FALSE
, /* partial_inplace */
1213 0xffffffff, /* src_mask */
1214 0xffffffff, /* dst_mask */
1215 TRUE
), /* pcrel_offset */
1217 HOWTO (R_ARM_LDRS_SB_G2
, /* type */
1219 2, /* size (0 = byte, 1 = short, 2 = long) */
1221 TRUE
, /* pc_relative */
1223 complain_overflow_dont
,/* complain_on_overflow */
1224 bfd_elf_generic_reloc
, /* special_function */
1225 "R_ARM_LDRS_SB_G2", /* name */
1226 FALSE
, /* partial_inplace */
1227 0xffffffff, /* src_mask */
1228 0xffffffff, /* dst_mask */
1229 TRUE
), /* pcrel_offset */
1231 HOWTO (R_ARM_LDC_SB_G0
, /* type */
1233 2, /* size (0 = byte, 1 = short, 2 = long) */
1235 TRUE
, /* pc_relative */
1237 complain_overflow_dont
,/* complain_on_overflow */
1238 bfd_elf_generic_reloc
, /* special_function */
1239 "R_ARM_LDC_SB_G0", /* name */
1240 FALSE
, /* partial_inplace */
1241 0xffffffff, /* src_mask */
1242 0xffffffff, /* dst_mask */
1243 TRUE
), /* pcrel_offset */
1245 HOWTO (R_ARM_LDC_SB_G1
, /* type */
1247 2, /* size (0 = byte, 1 = short, 2 = long) */
1249 TRUE
, /* pc_relative */
1251 complain_overflow_dont
,/* complain_on_overflow */
1252 bfd_elf_generic_reloc
, /* special_function */
1253 "R_ARM_LDC_SB_G1", /* name */
1254 FALSE
, /* partial_inplace */
1255 0xffffffff, /* src_mask */
1256 0xffffffff, /* dst_mask */
1257 TRUE
), /* pcrel_offset */
1259 HOWTO (R_ARM_LDC_SB_G2
, /* type */
1261 2, /* size (0 = byte, 1 = short, 2 = long) */
1263 TRUE
, /* pc_relative */
1265 complain_overflow_dont
,/* complain_on_overflow */
1266 bfd_elf_generic_reloc
, /* special_function */
1267 "R_ARM_LDC_SB_G2", /* name */
1268 FALSE
, /* partial_inplace */
1269 0xffffffff, /* src_mask */
1270 0xffffffff, /* dst_mask */
1271 TRUE
), /* pcrel_offset */
1273 /* End of group relocations. */
1275 HOWTO (R_ARM_MOVW_BREL_NC
, /* type */
1277 2, /* size (0 = byte, 1 = short, 2 = long) */
1279 FALSE
, /* pc_relative */
1281 complain_overflow_dont
,/* complain_on_overflow */
1282 bfd_elf_generic_reloc
, /* special_function */
1283 "R_ARM_MOVW_BREL_NC", /* name */
1284 FALSE
, /* partial_inplace */
1285 0x0000ffff, /* src_mask */
1286 0x0000ffff, /* dst_mask */
1287 FALSE
), /* pcrel_offset */
1289 HOWTO (R_ARM_MOVT_BREL
, /* type */
1291 2, /* size (0 = byte, 1 = short, 2 = long) */
1293 FALSE
, /* pc_relative */
1295 complain_overflow_bitfield
,/* complain_on_overflow */
1296 bfd_elf_generic_reloc
, /* special_function */
1297 "R_ARM_MOVT_BREL", /* name */
1298 FALSE
, /* partial_inplace */
1299 0x0000ffff, /* src_mask */
1300 0x0000ffff, /* dst_mask */
1301 FALSE
), /* pcrel_offset */
1303 HOWTO (R_ARM_MOVW_BREL
, /* type */
1305 2, /* size (0 = byte, 1 = short, 2 = long) */
1307 FALSE
, /* pc_relative */
1309 complain_overflow_dont
,/* complain_on_overflow */
1310 bfd_elf_generic_reloc
, /* special_function */
1311 "R_ARM_MOVW_BREL", /* name */
1312 FALSE
, /* partial_inplace */
1313 0x0000ffff, /* src_mask */
1314 0x0000ffff, /* dst_mask */
1315 FALSE
), /* pcrel_offset */
1317 HOWTO (R_ARM_THM_MOVW_BREL_NC
,/* type */
1319 2, /* size (0 = byte, 1 = short, 2 = long) */
1321 FALSE
, /* pc_relative */
1323 complain_overflow_dont
,/* complain_on_overflow */
1324 bfd_elf_generic_reloc
, /* special_function */
1325 "R_ARM_THM_MOVW_BREL_NC",/* name */
1326 FALSE
, /* partial_inplace */
1327 0x040f70ff, /* src_mask */
1328 0x040f70ff, /* dst_mask */
1329 FALSE
), /* pcrel_offset */
1331 HOWTO (R_ARM_THM_MOVT_BREL
, /* type */
1333 2, /* size (0 = byte, 1 = short, 2 = long) */
1335 FALSE
, /* pc_relative */
1337 complain_overflow_bitfield
,/* complain_on_overflow */
1338 bfd_elf_generic_reloc
, /* special_function */
1339 "R_ARM_THM_MOVT_BREL", /* name */
1340 FALSE
, /* partial_inplace */
1341 0x040f70ff, /* src_mask */
1342 0x040f70ff, /* dst_mask */
1343 FALSE
), /* pcrel_offset */
1345 HOWTO (R_ARM_THM_MOVW_BREL
, /* type */
1347 2, /* size (0 = byte, 1 = short, 2 = long) */
1349 FALSE
, /* pc_relative */
1351 complain_overflow_dont
,/* complain_on_overflow */
1352 bfd_elf_generic_reloc
, /* special_function */
1353 "R_ARM_THM_MOVW_BREL", /* name */
1354 FALSE
, /* partial_inplace */
1355 0x040f70ff, /* src_mask */
1356 0x040f70ff, /* dst_mask */
1357 FALSE
), /* pcrel_offset */
1359 HOWTO (R_ARM_TLS_GOTDESC
, /* type */
1361 2, /* size (0 = byte, 1 = short, 2 = long) */
1363 FALSE
, /* pc_relative */
1365 complain_overflow_bitfield
,/* complain_on_overflow */
1366 NULL
, /* special_function */
1367 "R_ARM_TLS_GOTDESC", /* name */
1368 TRUE
, /* partial_inplace */
1369 0xffffffff, /* src_mask */
1370 0xffffffff, /* dst_mask */
1371 FALSE
), /* pcrel_offset */
1373 HOWTO (R_ARM_TLS_CALL
, /* type */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1377 FALSE
, /* pc_relative */
1379 complain_overflow_dont
,/* complain_on_overflow */
1380 bfd_elf_generic_reloc
, /* special_function */
1381 "R_ARM_TLS_CALL", /* name */
1382 FALSE
, /* partial_inplace */
1383 0x00ffffff, /* src_mask */
1384 0x00ffffff, /* dst_mask */
1385 FALSE
), /* pcrel_offset */
1387 HOWTO (R_ARM_TLS_DESCSEQ
, /* type */
1389 2, /* size (0 = byte, 1 = short, 2 = long) */
1391 FALSE
, /* pc_relative */
1393 complain_overflow_bitfield
,/* complain_on_overflow */
1394 bfd_elf_generic_reloc
, /* special_function */
1395 "R_ARM_TLS_DESCSEQ", /* name */
1396 FALSE
, /* partial_inplace */
1397 0x00000000, /* src_mask */
1398 0x00000000, /* dst_mask */
1399 FALSE
), /* pcrel_offset */
1401 HOWTO (R_ARM_THM_TLS_CALL
, /* type */
1403 2, /* size (0 = byte, 1 = short, 2 = long) */
1405 FALSE
, /* pc_relative */
1407 complain_overflow_dont
,/* complain_on_overflow */
1408 bfd_elf_generic_reloc
, /* special_function */
1409 "R_ARM_THM_TLS_CALL", /* name */
1410 FALSE
, /* partial_inplace */
1411 0x07ff07ff, /* src_mask */
1412 0x07ff07ff, /* dst_mask */
1413 FALSE
), /* pcrel_offset */
1415 HOWTO (R_ARM_PLT32_ABS
, /* type */
1417 2, /* size (0 = byte, 1 = short, 2 = long) */
1419 FALSE
, /* pc_relative */
1421 complain_overflow_dont
,/* complain_on_overflow */
1422 bfd_elf_generic_reloc
, /* special_function */
1423 "R_ARM_PLT32_ABS", /* name */
1424 FALSE
, /* partial_inplace */
1425 0xffffffff, /* src_mask */
1426 0xffffffff, /* dst_mask */
1427 FALSE
), /* pcrel_offset */
1429 HOWTO (R_ARM_GOT_ABS
, /* type */
1431 2, /* size (0 = byte, 1 = short, 2 = long) */
1433 FALSE
, /* pc_relative */
1435 complain_overflow_dont
,/* complain_on_overflow */
1436 bfd_elf_generic_reloc
, /* special_function */
1437 "R_ARM_GOT_ABS", /* name */
1438 FALSE
, /* partial_inplace */
1439 0xffffffff, /* src_mask */
1440 0xffffffff, /* dst_mask */
1441 FALSE
), /* pcrel_offset */
1443 HOWTO (R_ARM_GOT_PREL
, /* type */
1445 2, /* size (0 = byte, 1 = short, 2 = long) */
1447 TRUE
, /* pc_relative */
1449 complain_overflow_dont
, /* complain_on_overflow */
1450 bfd_elf_generic_reloc
, /* special_function */
1451 "R_ARM_GOT_PREL", /* name */
1452 FALSE
, /* partial_inplace */
1453 0xffffffff, /* src_mask */
1454 0xffffffff, /* dst_mask */
1455 TRUE
), /* pcrel_offset */
1457 HOWTO (R_ARM_GOT_BREL12
, /* type */
1459 2, /* size (0 = byte, 1 = short, 2 = long) */
1461 FALSE
, /* pc_relative */
1463 complain_overflow_bitfield
,/* complain_on_overflow */
1464 bfd_elf_generic_reloc
, /* special_function */
1465 "R_ARM_GOT_BREL12", /* name */
1466 FALSE
, /* partial_inplace */
1467 0x00000fff, /* src_mask */
1468 0x00000fff, /* dst_mask */
1469 FALSE
), /* pcrel_offset */
1471 HOWTO (R_ARM_GOTOFF12
, /* type */
1473 2, /* size (0 = byte, 1 = short, 2 = long) */
1475 FALSE
, /* pc_relative */
1477 complain_overflow_bitfield
,/* complain_on_overflow */
1478 bfd_elf_generic_reloc
, /* special_function */
1479 "R_ARM_GOTOFF12", /* name */
1480 FALSE
, /* partial_inplace */
1481 0x00000fff, /* src_mask */
1482 0x00000fff, /* dst_mask */
1483 FALSE
), /* pcrel_offset */
1485 EMPTY_HOWTO (R_ARM_GOTRELAX
), /* reserved for future GOT-load optimizations */
1487 /* GNU extension to record C++ vtable member usage */
1488 HOWTO (R_ARM_GNU_VTENTRY
, /* type */
1490 2, /* size (0 = byte, 1 = short, 2 = long) */
1492 FALSE
, /* pc_relative */
1494 complain_overflow_dont
, /* complain_on_overflow */
1495 _bfd_elf_rel_vtable_reloc_fn
, /* special_function */
1496 "R_ARM_GNU_VTENTRY", /* name */
1497 FALSE
, /* partial_inplace */
1500 FALSE
), /* pcrel_offset */
1502 /* GNU extension to record C++ vtable hierarchy */
1503 HOWTO (R_ARM_GNU_VTINHERIT
, /* type */
1505 2, /* size (0 = byte, 1 = short, 2 = long) */
1507 FALSE
, /* pc_relative */
1509 complain_overflow_dont
, /* complain_on_overflow */
1510 NULL
, /* special_function */
1511 "R_ARM_GNU_VTINHERIT", /* name */
1512 FALSE
, /* partial_inplace */
1515 FALSE
), /* pcrel_offset */
1517 HOWTO (R_ARM_THM_JUMP11
, /* type */
1519 1, /* size (0 = byte, 1 = short, 2 = long) */
1521 TRUE
, /* pc_relative */
1523 complain_overflow_signed
, /* complain_on_overflow */
1524 bfd_elf_generic_reloc
, /* special_function */
1525 "R_ARM_THM_JUMP11", /* name */
1526 FALSE
, /* partial_inplace */
1527 0x000007ff, /* src_mask */
1528 0x000007ff, /* dst_mask */
1529 TRUE
), /* pcrel_offset */
1531 HOWTO (R_ARM_THM_JUMP8
, /* type */
1533 1, /* size (0 = byte, 1 = short, 2 = long) */
1535 TRUE
, /* pc_relative */
1537 complain_overflow_signed
, /* complain_on_overflow */
1538 bfd_elf_generic_reloc
, /* special_function */
1539 "R_ARM_THM_JUMP8", /* name */
1540 FALSE
, /* partial_inplace */
1541 0x000000ff, /* src_mask */
1542 0x000000ff, /* dst_mask */
1543 TRUE
), /* pcrel_offset */
1545 /* TLS relocations */
1546 HOWTO (R_ARM_TLS_GD32
, /* type */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
1550 FALSE
, /* pc_relative */
1552 complain_overflow_bitfield
,/* complain_on_overflow */
1553 NULL
, /* special_function */
1554 "R_ARM_TLS_GD32", /* name */
1555 TRUE
, /* partial_inplace */
1556 0xffffffff, /* src_mask */
1557 0xffffffff, /* dst_mask */
1558 FALSE
), /* pcrel_offset */
1560 HOWTO (R_ARM_TLS_LDM32
, /* type */
1562 2, /* size (0 = byte, 1 = short, 2 = long) */
1564 FALSE
, /* pc_relative */
1566 complain_overflow_bitfield
,/* complain_on_overflow */
1567 bfd_elf_generic_reloc
, /* special_function */
1568 "R_ARM_TLS_LDM32", /* name */
1569 TRUE
, /* partial_inplace */
1570 0xffffffff, /* src_mask */
1571 0xffffffff, /* dst_mask */
1572 FALSE
), /* pcrel_offset */
1574 HOWTO (R_ARM_TLS_LDO32
, /* type */
1576 2, /* size (0 = byte, 1 = short, 2 = long) */
1578 FALSE
, /* pc_relative */
1580 complain_overflow_bitfield
,/* complain_on_overflow */
1581 bfd_elf_generic_reloc
, /* special_function */
1582 "R_ARM_TLS_LDO32", /* name */
1583 TRUE
, /* partial_inplace */
1584 0xffffffff, /* src_mask */
1585 0xffffffff, /* dst_mask */
1586 FALSE
), /* pcrel_offset */
1588 HOWTO (R_ARM_TLS_IE32
, /* type */
1590 2, /* size (0 = byte, 1 = short, 2 = long) */
1592 FALSE
, /* pc_relative */
1594 complain_overflow_bitfield
,/* complain_on_overflow */
1595 NULL
, /* special_function */
1596 "R_ARM_TLS_IE32", /* name */
1597 TRUE
, /* partial_inplace */
1598 0xffffffff, /* src_mask */
1599 0xffffffff, /* dst_mask */
1600 FALSE
), /* pcrel_offset */
1602 HOWTO (R_ARM_TLS_LE32
, /* type */
1604 2, /* size (0 = byte, 1 = short, 2 = long) */
1606 FALSE
, /* pc_relative */
1608 complain_overflow_bitfield
,/* complain_on_overflow */
1609 NULL
, /* special_function */
1610 "R_ARM_TLS_LE32", /* name */
1611 TRUE
, /* partial_inplace */
1612 0xffffffff, /* src_mask */
1613 0xffffffff, /* dst_mask */
1614 FALSE
), /* pcrel_offset */
1616 HOWTO (R_ARM_TLS_LDO12
, /* type */
1618 2, /* size (0 = byte, 1 = short, 2 = long) */
1620 FALSE
, /* pc_relative */
1622 complain_overflow_bitfield
,/* complain_on_overflow */
1623 bfd_elf_generic_reloc
, /* special_function */
1624 "R_ARM_TLS_LDO12", /* name */
1625 FALSE
, /* partial_inplace */
1626 0x00000fff, /* src_mask */
1627 0x00000fff, /* dst_mask */
1628 FALSE
), /* pcrel_offset */
1630 HOWTO (R_ARM_TLS_LE12
, /* type */
1632 2, /* size (0 = byte, 1 = short, 2 = long) */
1634 FALSE
, /* pc_relative */
1636 complain_overflow_bitfield
,/* complain_on_overflow */
1637 bfd_elf_generic_reloc
, /* special_function */
1638 "R_ARM_TLS_LE12", /* name */
1639 FALSE
, /* partial_inplace */
1640 0x00000fff, /* src_mask */
1641 0x00000fff, /* dst_mask */
1642 FALSE
), /* pcrel_offset */
1644 HOWTO (R_ARM_TLS_IE12GP
, /* type */
1646 2, /* size (0 = byte, 1 = short, 2 = long) */
1648 FALSE
, /* pc_relative */
1650 complain_overflow_bitfield
,/* complain_on_overflow */
1651 bfd_elf_generic_reloc
, /* special_function */
1652 "R_ARM_TLS_IE12GP", /* name */
1653 FALSE
, /* partial_inplace */
1654 0x00000fff, /* src_mask */
1655 0x00000fff, /* dst_mask */
1656 FALSE
), /* pcrel_offset */
1658 /* 112-127 private relocations. */
1676 /* R_ARM_ME_TOO, obsolete. */
1679 HOWTO (R_ARM_THM_TLS_DESCSEQ
, /* type */
1681 1, /* size (0 = byte, 1 = short, 2 = long) */
1683 FALSE
, /* pc_relative */
1685 complain_overflow_bitfield
,/* complain_on_overflow */
1686 bfd_elf_generic_reloc
, /* special_function */
1687 "R_ARM_THM_TLS_DESCSEQ",/* name */
1688 FALSE
, /* partial_inplace */
1689 0x00000000, /* src_mask */
1690 0x00000000, /* dst_mask */
1691 FALSE
), /* pcrel_offset */
1694 HOWTO (R_ARM_THM_ALU_ABS_G0_NC
,/* type. */
1695 0, /* rightshift. */
1696 1, /* size (0 = byte, 1 = short, 2 = long). */
1698 FALSE
, /* pc_relative. */
1700 complain_overflow_bitfield
,/* complain_on_overflow. */
1701 bfd_elf_generic_reloc
, /* special_function. */
1702 "R_ARM_THM_ALU_ABS_G0_NC",/* name. */
1703 FALSE
, /* partial_inplace. */
1704 0x00000000, /* src_mask. */
1705 0x00000000, /* dst_mask. */
1706 FALSE
), /* pcrel_offset. */
1707 HOWTO (R_ARM_THM_ALU_ABS_G1_NC
,/* type. */
1708 0, /* rightshift. */
1709 1, /* size (0 = byte, 1 = short, 2 = long). */
1711 FALSE
, /* pc_relative. */
1713 complain_overflow_bitfield
,/* complain_on_overflow. */
1714 bfd_elf_generic_reloc
, /* special_function. */
1715 "R_ARM_THM_ALU_ABS_G1_NC",/* name. */
1716 FALSE
, /* partial_inplace. */
1717 0x00000000, /* src_mask. */
1718 0x00000000, /* dst_mask. */
1719 FALSE
), /* pcrel_offset. */
1720 HOWTO (R_ARM_THM_ALU_ABS_G2_NC
,/* type. */
1721 0, /* rightshift. */
1722 1, /* size (0 = byte, 1 = short, 2 = long). */
1724 FALSE
, /* pc_relative. */
1726 complain_overflow_bitfield
,/* complain_on_overflow. */
1727 bfd_elf_generic_reloc
, /* special_function. */
1728 "R_ARM_THM_ALU_ABS_G2_NC",/* name. */
1729 FALSE
, /* partial_inplace. */
1730 0x00000000, /* src_mask. */
1731 0x00000000, /* dst_mask. */
1732 FALSE
), /* pcrel_offset. */
1733 HOWTO (R_ARM_THM_ALU_ABS_G3_NC
,/* type. */
1734 0, /* rightshift. */
1735 1, /* size (0 = byte, 1 = short, 2 = long). */
1737 FALSE
, /* pc_relative. */
1739 complain_overflow_bitfield
,/* complain_on_overflow. */
1740 bfd_elf_generic_reloc
, /* special_function. */
1741 "R_ARM_THM_ALU_ABS_G3_NC",/* name. */
1742 FALSE
, /* partial_inplace. */
1743 0x00000000, /* src_mask. */
1744 0x00000000, /* dst_mask. */
1745 FALSE
), /* pcrel_offset. */
1749 static reloc_howto_type elf32_arm_howto_table_2
[1] =
1751 HOWTO (R_ARM_IRELATIVE
, /* type */
1753 2, /* size (0 = byte, 1 = short, 2 = long) */
1755 FALSE
, /* pc_relative */
1757 complain_overflow_bitfield
,/* complain_on_overflow */
1758 bfd_elf_generic_reloc
, /* special_function */
1759 "R_ARM_IRELATIVE", /* name */
1760 TRUE
, /* partial_inplace */
1761 0xffffffff, /* src_mask */
1762 0xffffffff, /* dst_mask */
1763 FALSE
) /* pcrel_offset */
1766 /* 249-255 extended, currently unused, relocations: */
1767 static reloc_howto_type elf32_arm_howto_table_3
[4] =
1769 HOWTO (R_ARM_RREL32
, /* type */
1771 0, /* size (0 = byte, 1 = short, 2 = long) */
1773 FALSE
, /* pc_relative */
1775 complain_overflow_dont
,/* complain_on_overflow */
1776 bfd_elf_generic_reloc
, /* special_function */
1777 "R_ARM_RREL32", /* name */
1778 FALSE
, /* partial_inplace */
1781 FALSE
), /* pcrel_offset */
1783 HOWTO (R_ARM_RABS32
, /* type */
1785 0, /* size (0 = byte, 1 = short, 2 = long) */
1787 FALSE
, /* pc_relative */
1789 complain_overflow_dont
,/* complain_on_overflow */
1790 bfd_elf_generic_reloc
, /* special_function */
1791 "R_ARM_RABS32", /* name */
1792 FALSE
, /* partial_inplace */
1795 FALSE
), /* pcrel_offset */
1797 HOWTO (R_ARM_RPC24
, /* type */
1799 0, /* size (0 = byte, 1 = short, 2 = long) */
1801 FALSE
, /* pc_relative */
1803 complain_overflow_dont
,/* complain_on_overflow */
1804 bfd_elf_generic_reloc
, /* special_function */
1805 "R_ARM_RPC24", /* name */
1806 FALSE
, /* partial_inplace */
1809 FALSE
), /* pcrel_offset */
1811 HOWTO (R_ARM_RBASE
, /* type */
1813 0, /* size (0 = byte, 1 = short, 2 = long) */
1815 FALSE
, /* pc_relative */
1817 complain_overflow_dont
,/* complain_on_overflow */
1818 bfd_elf_generic_reloc
, /* special_function */
1819 "R_ARM_RBASE", /* name */
1820 FALSE
, /* partial_inplace */
1823 FALSE
) /* pcrel_offset */
1826 static reloc_howto_type
*
1827 elf32_arm_howto_from_type (unsigned int r_type
)
1829 if (r_type
< ARRAY_SIZE (elf32_arm_howto_table_1
))
1830 return &elf32_arm_howto_table_1
[r_type
];
1832 if (r_type
== R_ARM_IRELATIVE
)
1833 return &elf32_arm_howto_table_2
[r_type
- R_ARM_IRELATIVE
];
1835 if (r_type
>= R_ARM_RREL32
1836 && r_type
< R_ARM_RREL32
+ ARRAY_SIZE (elf32_arm_howto_table_3
))
1837 return &elf32_arm_howto_table_3
[r_type
- R_ARM_RREL32
];
1843 elf32_arm_info_to_howto (bfd
* abfd ATTRIBUTE_UNUSED
, arelent
* bfd_reloc
,
1844 Elf_Internal_Rela
* elf_reloc
)
1846 unsigned int r_type
;
1848 r_type
= ELF32_R_TYPE (elf_reloc
->r_info
);
1849 bfd_reloc
->howto
= elf32_arm_howto_from_type (r_type
);
1852 struct elf32_arm_reloc_map
1854 bfd_reloc_code_real_type bfd_reloc_val
;
1855 unsigned char elf_reloc_val
;
1858 /* All entries in this list must also be present in elf32_arm_howto_table. */
1859 static const struct elf32_arm_reloc_map elf32_arm_reloc_map
[] =
1861 {BFD_RELOC_NONE
, R_ARM_NONE
},
1862 {BFD_RELOC_ARM_PCREL_BRANCH
, R_ARM_PC24
},
1863 {BFD_RELOC_ARM_PCREL_CALL
, R_ARM_CALL
},
1864 {BFD_RELOC_ARM_PCREL_JUMP
, R_ARM_JUMP24
},
1865 {BFD_RELOC_ARM_PCREL_BLX
, R_ARM_XPC25
},
1866 {BFD_RELOC_THUMB_PCREL_BLX
, R_ARM_THM_XPC22
},
1867 {BFD_RELOC_32
, R_ARM_ABS32
},
1868 {BFD_RELOC_32_PCREL
, R_ARM_REL32
},
1869 {BFD_RELOC_8
, R_ARM_ABS8
},
1870 {BFD_RELOC_16
, R_ARM_ABS16
},
1871 {BFD_RELOC_ARM_OFFSET_IMM
, R_ARM_ABS12
},
1872 {BFD_RELOC_ARM_THUMB_OFFSET
, R_ARM_THM_ABS5
},
1873 {BFD_RELOC_THUMB_PCREL_BRANCH25
, R_ARM_THM_JUMP24
},
1874 {BFD_RELOC_THUMB_PCREL_BRANCH23
, R_ARM_THM_CALL
},
1875 {BFD_RELOC_THUMB_PCREL_BRANCH12
, R_ARM_THM_JUMP11
},
1876 {BFD_RELOC_THUMB_PCREL_BRANCH20
, R_ARM_THM_JUMP19
},
1877 {BFD_RELOC_THUMB_PCREL_BRANCH9
, R_ARM_THM_JUMP8
},
1878 {BFD_RELOC_THUMB_PCREL_BRANCH7
, R_ARM_THM_JUMP6
},
1879 {BFD_RELOC_ARM_GLOB_DAT
, R_ARM_GLOB_DAT
},
1880 {BFD_RELOC_ARM_JUMP_SLOT
, R_ARM_JUMP_SLOT
},
1881 {BFD_RELOC_ARM_RELATIVE
, R_ARM_RELATIVE
},
1882 {BFD_RELOC_ARM_GOTOFF
, R_ARM_GOTOFF32
},
1883 {BFD_RELOC_ARM_GOTPC
, R_ARM_GOTPC
},
1884 {BFD_RELOC_ARM_GOT_PREL
, R_ARM_GOT_PREL
},
1885 {BFD_RELOC_ARM_GOT32
, R_ARM_GOT32
},
1886 {BFD_RELOC_ARM_PLT32
, R_ARM_PLT32
},
1887 {BFD_RELOC_ARM_TARGET1
, R_ARM_TARGET1
},
1888 {BFD_RELOC_ARM_ROSEGREL32
, R_ARM_ROSEGREL32
},
1889 {BFD_RELOC_ARM_SBREL32
, R_ARM_SBREL32
},
1890 {BFD_RELOC_ARM_PREL31
, R_ARM_PREL31
},
1891 {BFD_RELOC_ARM_TARGET2
, R_ARM_TARGET2
},
1892 {BFD_RELOC_ARM_PLT32
, R_ARM_PLT32
},
1893 {BFD_RELOC_ARM_TLS_GOTDESC
, R_ARM_TLS_GOTDESC
},
1894 {BFD_RELOC_ARM_TLS_CALL
, R_ARM_TLS_CALL
},
1895 {BFD_RELOC_ARM_THM_TLS_CALL
, R_ARM_THM_TLS_CALL
},
1896 {BFD_RELOC_ARM_TLS_DESCSEQ
, R_ARM_TLS_DESCSEQ
},
1897 {BFD_RELOC_ARM_THM_TLS_DESCSEQ
, R_ARM_THM_TLS_DESCSEQ
},
1898 {BFD_RELOC_ARM_TLS_DESC
, R_ARM_TLS_DESC
},
1899 {BFD_RELOC_ARM_TLS_GD32
, R_ARM_TLS_GD32
},
1900 {BFD_RELOC_ARM_TLS_LDO32
, R_ARM_TLS_LDO32
},
1901 {BFD_RELOC_ARM_TLS_LDM32
, R_ARM_TLS_LDM32
},
1902 {BFD_RELOC_ARM_TLS_DTPMOD32
, R_ARM_TLS_DTPMOD32
},
1903 {BFD_RELOC_ARM_TLS_DTPOFF32
, R_ARM_TLS_DTPOFF32
},
1904 {BFD_RELOC_ARM_TLS_TPOFF32
, R_ARM_TLS_TPOFF32
},
1905 {BFD_RELOC_ARM_TLS_IE32
, R_ARM_TLS_IE32
},
1906 {BFD_RELOC_ARM_TLS_LE32
, R_ARM_TLS_LE32
},
1907 {BFD_RELOC_ARM_IRELATIVE
, R_ARM_IRELATIVE
},
1908 {BFD_RELOC_VTABLE_INHERIT
, R_ARM_GNU_VTINHERIT
},
1909 {BFD_RELOC_VTABLE_ENTRY
, R_ARM_GNU_VTENTRY
},
1910 {BFD_RELOC_ARM_MOVW
, R_ARM_MOVW_ABS_NC
},
1911 {BFD_RELOC_ARM_MOVT
, R_ARM_MOVT_ABS
},
1912 {BFD_RELOC_ARM_MOVW_PCREL
, R_ARM_MOVW_PREL_NC
},
1913 {BFD_RELOC_ARM_MOVT_PCREL
, R_ARM_MOVT_PREL
},
1914 {BFD_RELOC_ARM_THUMB_MOVW
, R_ARM_THM_MOVW_ABS_NC
},
1915 {BFD_RELOC_ARM_THUMB_MOVT
, R_ARM_THM_MOVT_ABS
},
1916 {BFD_RELOC_ARM_THUMB_MOVW_PCREL
, R_ARM_THM_MOVW_PREL_NC
},
1917 {BFD_RELOC_ARM_THUMB_MOVT_PCREL
, R_ARM_THM_MOVT_PREL
},
1918 {BFD_RELOC_ARM_ALU_PC_G0_NC
, R_ARM_ALU_PC_G0_NC
},
1919 {BFD_RELOC_ARM_ALU_PC_G0
, R_ARM_ALU_PC_G0
},
1920 {BFD_RELOC_ARM_ALU_PC_G1_NC
, R_ARM_ALU_PC_G1_NC
},
1921 {BFD_RELOC_ARM_ALU_PC_G1
, R_ARM_ALU_PC_G1
},
1922 {BFD_RELOC_ARM_ALU_PC_G2
, R_ARM_ALU_PC_G2
},
1923 {BFD_RELOC_ARM_LDR_PC_G0
, R_ARM_LDR_PC_G0
},
1924 {BFD_RELOC_ARM_LDR_PC_G1
, R_ARM_LDR_PC_G1
},
1925 {BFD_RELOC_ARM_LDR_PC_G2
, R_ARM_LDR_PC_G2
},
1926 {BFD_RELOC_ARM_LDRS_PC_G0
, R_ARM_LDRS_PC_G0
},
1927 {BFD_RELOC_ARM_LDRS_PC_G1
, R_ARM_LDRS_PC_G1
},
1928 {BFD_RELOC_ARM_LDRS_PC_G2
, R_ARM_LDRS_PC_G2
},
1929 {BFD_RELOC_ARM_LDC_PC_G0
, R_ARM_LDC_PC_G0
},
1930 {BFD_RELOC_ARM_LDC_PC_G1
, R_ARM_LDC_PC_G1
},
1931 {BFD_RELOC_ARM_LDC_PC_G2
, R_ARM_LDC_PC_G2
},
1932 {BFD_RELOC_ARM_ALU_SB_G0_NC
, R_ARM_ALU_SB_G0_NC
},
1933 {BFD_RELOC_ARM_ALU_SB_G0
, R_ARM_ALU_SB_G0
},
1934 {BFD_RELOC_ARM_ALU_SB_G1_NC
, R_ARM_ALU_SB_G1_NC
},
1935 {BFD_RELOC_ARM_ALU_SB_G1
, R_ARM_ALU_SB_G1
},
1936 {BFD_RELOC_ARM_ALU_SB_G2
, R_ARM_ALU_SB_G2
},
1937 {BFD_RELOC_ARM_LDR_SB_G0
, R_ARM_LDR_SB_G0
},
1938 {BFD_RELOC_ARM_LDR_SB_G1
, R_ARM_LDR_SB_G1
},
1939 {BFD_RELOC_ARM_LDR_SB_G2
, R_ARM_LDR_SB_G2
},
1940 {BFD_RELOC_ARM_LDRS_SB_G0
, R_ARM_LDRS_SB_G0
},
1941 {BFD_RELOC_ARM_LDRS_SB_G1
, R_ARM_LDRS_SB_G1
},
1942 {BFD_RELOC_ARM_LDRS_SB_G2
, R_ARM_LDRS_SB_G2
},
1943 {BFD_RELOC_ARM_LDC_SB_G0
, R_ARM_LDC_SB_G0
},
1944 {BFD_RELOC_ARM_LDC_SB_G1
, R_ARM_LDC_SB_G1
},
1945 {BFD_RELOC_ARM_LDC_SB_G2
, R_ARM_LDC_SB_G2
},
1946 {BFD_RELOC_ARM_V4BX
, R_ARM_V4BX
},
1947 {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC
, R_ARM_THM_ALU_ABS_G3_NC
},
1948 {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC
, R_ARM_THM_ALU_ABS_G2_NC
},
1949 {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC
, R_ARM_THM_ALU_ABS_G1_NC
},
1950 {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC
, R_ARM_THM_ALU_ABS_G0_NC
}
1953 static reloc_howto_type
*
1954 elf32_arm_reloc_type_lookup (bfd
*abfd ATTRIBUTE_UNUSED
,
1955 bfd_reloc_code_real_type code
)
1959 for (i
= 0; i
< ARRAY_SIZE (elf32_arm_reloc_map
); i
++)
1960 if (elf32_arm_reloc_map
[i
].bfd_reloc_val
== code
)
1961 return elf32_arm_howto_from_type (elf32_arm_reloc_map
[i
].elf_reloc_val
);
1966 static reloc_howto_type
*
1967 elf32_arm_reloc_name_lookup (bfd
*abfd ATTRIBUTE_UNUSED
,
1972 for (i
= 0; i
< ARRAY_SIZE (elf32_arm_howto_table_1
); i
++)
1973 if (elf32_arm_howto_table_1
[i
].name
!= NULL
1974 && strcasecmp (elf32_arm_howto_table_1
[i
].name
, r_name
) == 0)
1975 return &elf32_arm_howto_table_1
[i
];
1977 for (i
= 0; i
< ARRAY_SIZE (elf32_arm_howto_table_2
); i
++)
1978 if (elf32_arm_howto_table_2
[i
].name
!= NULL
1979 && strcasecmp (elf32_arm_howto_table_2
[i
].name
, r_name
) == 0)
1980 return &elf32_arm_howto_table_2
[i
];
1982 for (i
= 0; i
< ARRAY_SIZE (elf32_arm_howto_table_3
); i
++)
1983 if (elf32_arm_howto_table_3
[i
].name
!= NULL
1984 && strcasecmp (elf32_arm_howto_table_3
[i
].name
, r_name
) == 0)
1985 return &elf32_arm_howto_table_3
[i
];
1990 /* Support for core dump NOTE sections. */
1993 elf32_arm_nabi_grok_prstatus (bfd
*abfd
, Elf_Internal_Note
*note
)
1998 switch (note
->descsz
)
2003 case 148: /* Linux/ARM 32-bit. */
2005 elf_tdata (abfd
)->core
->signal
= bfd_get_16 (abfd
, note
->descdata
+ 12);
2008 elf_tdata (abfd
)->core
->lwpid
= bfd_get_32 (abfd
, note
->descdata
+ 24);
2017 /* Make a ".reg/999" section. */
2018 return _bfd_elfcore_make_pseudosection (abfd
, ".reg",
2019 size
, note
->descpos
+ offset
);
2023 elf32_arm_nabi_grok_psinfo (bfd
*abfd
, Elf_Internal_Note
*note
)
2025 switch (note
->descsz
)
2030 case 124: /* Linux/ARM elf_prpsinfo. */
2031 elf_tdata (abfd
)->core
->pid
2032 = bfd_get_32 (abfd
, note
->descdata
+ 12);
2033 elf_tdata (abfd
)->core
->program
2034 = _bfd_elfcore_strndup (abfd
, note
->descdata
+ 28, 16);
2035 elf_tdata (abfd
)->core
->command
2036 = _bfd_elfcore_strndup (abfd
, note
->descdata
+ 44, 80);
2039 /* Note that for some reason, a spurious space is tacked
2040 onto the end of the args in some (at least one anyway)
2041 implementations, so strip it off if it exists. */
2043 char *command
= elf_tdata (abfd
)->core
->command
;
2044 int n
= strlen (command
);
2046 if (0 < n
&& command
[n
- 1] == ' ')
2047 command
[n
- 1] = '\0';
2054 elf32_arm_nabi_write_core_note (bfd
*abfd
, char *buf
, int *bufsiz
,
2067 va_start (ap
, note_type
);
2068 memset (data
, 0, sizeof (data
));
2069 strncpy (data
+ 28, va_arg (ap
, const char *), 16);
2070 strncpy (data
+ 44, va_arg (ap
, const char *), 80);
2073 return elfcore_write_note (abfd
, buf
, bufsiz
,
2074 "CORE", note_type
, data
, sizeof (data
));
2085 va_start (ap
, note_type
);
2086 memset (data
, 0, sizeof (data
));
2087 pid
= va_arg (ap
, long);
2088 bfd_put_32 (abfd
, pid
, data
+ 24);
2089 cursig
= va_arg (ap
, int);
2090 bfd_put_16 (abfd
, cursig
, data
+ 12);
2091 greg
= va_arg (ap
, const void *);
2092 memcpy (data
+ 72, greg
, 72);
2095 return elfcore_write_note (abfd
, buf
, bufsiz
,
2096 "CORE", note_type
, data
, sizeof (data
));
2101 #define TARGET_LITTLE_SYM arm_elf32_le_vec
2102 #define TARGET_LITTLE_NAME "elf32-littlearm"
2103 #define TARGET_BIG_SYM arm_elf32_be_vec
2104 #define TARGET_BIG_NAME "elf32-bigarm"
2106 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2107 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2108 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2110 typedef unsigned long int insn32
;
2111 typedef unsigned short int insn16
;
2113 /* In lieu of proper flags, assume all EABIv4 or later objects are
2115 #define INTERWORK_FLAG(abfd) \
2116 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2117 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2118 || ((abfd)->flags & BFD_LINKER_CREATED))
2120 /* The linker script knows the section names for placement.
2121 The entry_names are used to do simple name mangling on the stubs.
2122 Given a function name, and its type, the stub can be found. The
2123 name can be changed. The only requirement is the %s be present. */
2124 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2125 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2127 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2128 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2130 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2131 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2133 #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer"
2134 #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "__stm32l4xx_veneer_%x"
2136 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2137 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2139 #define STUB_ENTRY_NAME "__%s_veneer"
2141 /* The name of the dynamic interpreter. This is put in the .interp
2143 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2145 static const unsigned long tls_trampoline
[] =
2147 0xe08e0000, /* add r0, lr, r0 */
2148 0xe5901004, /* ldr r1, [r0,#4] */
2149 0xe12fff11, /* bx r1 */
2152 static const unsigned long dl_tlsdesc_lazy_trampoline
[] =
2154 0xe52d2004, /* push {r2} */
2155 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2156 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2157 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2158 0xe081100f, /* 2: add r1, pc */
2159 0xe12fff12, /* bx r2 */
2160 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2161 + dl_tlsdesc_lazy_resolver(GOT) */
2162 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2165 #ifdef FOUR_WORD_PLT
2167 /* The first entry in a procedure linkage table looks like
2168 this. It is set up so that any shared library function that is
2169 called before the relocation has been set up calls the dynamic
2171 static const bfd_vma elf32_arm_plt0_entry
[] =
2173 0xe52de004, /* str lr, [sp, #-4]! */
2174 0xe59fe010, /* ldr lr, [pc, #16] */
2175 0xe08fe00e, /* add lr, pc, lr */
2176 0xe5bef008, /* ldr pc, [lr, #8]! */
2179 /* Subsequent entries in a procedure linkage table look like
2181 static const bfd_vma elf32_arm_plt_entry
[] =
2183 0xe28fc600, /* add ip, pc, #NN */
2184 0xe28cca00, /* add ip, ip, #NN */
2185 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2186 0x00000000, /* unused */
2189 #else /* not FOUR_WORD_PLT */
2191 /* The first entry in a procedure linkage table looks like
2192 this. It is set up so that any shared library function that is
2193 called before the relocation has been set up calls the dynamic
2195 static const bfd_vma elf32_arm_plt0_entry
[] =
2197 0xe52de004, /* str lr, [sp, #-4]! */
2198 0xe59fe004, /* ldr lr, [pc, #4] */
2199 0xe08fe00e, /* add lr, pc, lr */
2200 0xe5bef008, /* ldr pc, [lr, #8]! */
2201 0x00000000, /* &GOT[0] - . */
2204 /* By default subsequent entries in a procedure linkage table look like
2205 this. Offsets that don't fit into 28 bits will cause link error. */
2206 static const bfd_vma elf32_arm_plt_entry_short
[] =
2208 0xe28fc600, /* add ip, pc, #0xNN00000 */
2209 0xe28cca00, /* add ip, ip, #0xNN000 */
2210 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2213 /* When explicitly asked, we'll use this "long" entry format
2214 which can cope with arbitrary displacements. */
2215 static const bfd_vma elf32_arm_plt_entry_long
[] =
2217 0xe28fc200, /* add ip, pc, #0xN0000000 */
2218 0xe28cc600, /* add ip, ip, #0xNN00000 */
2219 0xe28cca00, /* add ip, ip, #0xNN000 */
2220 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2223 static bfd_boolean elf32_arm_use_long_plt_entry
= FALSE
;
2225 #endif /* not FOUR_WORD_PLT */
2227 /* The first entry in a procedure linkage table looks like this.
2228 It is set up so that any shared library function that is called before the
2229 relocation has been set up calls the dynamic linker first. */
2230 static const bfd_vma elf32_thumb2_plt0_entry
[] =
2232 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2233 an instruction maybe encoded to one or two array elements. */
2234 0xf8dfb500, /* push {lr} */
2235 0x44fee008, /* ldr.w lr, [pc, #8] */
2237 0xff08f85e, /* ldr.w pc, [lr, #8]! */
2238 0x00000000, /* &GOT[0] - . */
2241 /* Subsequent entries in a procedure linkage table for thumb only target
2243 static const bfd_vma elf32_thumb2_plt_entry
[] =
2245 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2246 an instruction maybe encoded to one or two array elements. */
2247 0x0c00f240, /* movw ip, #0xNNNN */
2248 0x0c00f2c0, /* movt ip, #0xNNNN */
2249 0xf8dc44fc, /* add ip, pc */
2250 0xbf00f000 /* ldr.w pc, [ip] */
2254 /* The format of the first entry in the procedure linkage table
2255 for a VxWorks executable. */
2256 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry
[] =
2258 0xe52dc008, /* str ip,[sp,#-8]! */
2259 0xe59fc000, /* ldr ip,[pc] */
2260 0xe59cf008, /* ldr pc,[ip,#8] */
2261 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2264 /* The format of subsequent entries in a VxWorks executable. */
2265 static const bfd_vma elf32_arm_vxworks_exec_plt_entry
[] =
2267 0xe59fc000, /* ldr ip,[pc] */
2268 0xe59cf000, /* ldr pc,[ip] */
2269 0x00000000, /* .long @got */
2270 0xe59fc000, /* ldr ip,[pc] */
2271 0xea000000, /* b _PLT */
2272 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2275 /* The format of entries in a VxWorks shared library. */
2276 static const bfd_vma elf32_arm_vxworks_shared_plt_entry
[] =
2278 0xe59fc000, /* ldr ip,[pc] */
2279 0xe79cf009, /* ldr pc,[ip,r9] */
2280 0x00000000, /* .long @got */
2281 0xe59fc000, /* ldr ip,[pc] */
2282 0xe599f008, /* ldr pc,[r9,#8] */
2283 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2286 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2287 #define PLT_THUMB_STUB_SIZE 4
2288 static const bfd_vma elf32_arm_plt_thumb_stub
[] =
2294 /* The entries in a PLT when using a DLL-based target with multiple
2296 static const bfd_vma elf32_arm_symbian_plt_entry
[] =
2298 0xe51ff004, /* ldr pc, [pc, #-4] */
2299 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2302 /* The first entry in a procedure linkage table looks like
2303 this. It is set up so that any shared library function that is
2304 called before the relocation has been set up calls the dynamic
2306 static const bfd_vma elf32_arm_nacl_plt0_entry
[] =
2309 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2310 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2311 0xe08cc00f, /* add ip, ip, pc */
2312 0xe52dc008, /* str ip, [sp, #-8]! */
2313 /* Second bundle: */
2314 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2315 0xe59cc000, /* ldr ip, [ip] */
2316 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2317 0xe12fff1c, /* bx ip */
2319 0xe320f000, /* nop */
2320 0xe320f000, /* nop */
2321 0xe320f000, /* nop */
2323 0xe50dc004, /* str ip, [sp, #-4] */
2324 /* Fourth bundle: */
2325 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2326 0xe59cc000, /* ldr ip, [ip] */
2327 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2328 0xe12fff1c, /* bx ip */
2330 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2332 /* Subsequent entries in a procedure linkage table look like this. */
2333 static const bfd_vma elf32_arm_nacl_plt_entry
[] =
2335 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2336 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2337 0xe08cc00f, /* add ip, ip, pc */
2338 0xea000000, /* b .Lplt_tail */
2341 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2342 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2343 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2344 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2345 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2346 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2347 #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4)
2348 #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4)
2358 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2359 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2360 is inserted in arm_build_one_stub(). */
2361 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2362 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2363 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2364 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2365 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2366 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2371 enum stub_insn_type type
;
2372 unsigned int r_type
;
2376 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2377 to reach the stub if necessary. */
2378 static const insn_sequence elf32_arm_stub_long_branch_any_any
[] =
2380 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2381 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2384 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2386 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb
[] =
2388 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2389 ARM_INSN (0xe12fff1c), /* bx ip */
2390 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2393 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2394 static const insn_sequence elf32_arm_stub_long_branch_thumb_only
[] =
2396 THUMB16_INSN (0xb401), /* push {r0} */
2397 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2398 THUMB16_INSN (0x4684), /* mov ip, r0 */
2399 THUMB16_INSN (0xbc01), /* pop {r0} */
2400 THUMB16_INSN (0x4760), /* bx ip */
2401 THUMB16_INSN (0xbf00), /* nop */
2402 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2405 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2407 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb
[] =
2409 THUMB16_INSN (0x4778), /* bx pc */
2410 THUMB16_INSN (0x46c0), /* nop */
2411 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2412 ARM_INSN (0xe12fff1c), /* bx ip */
2413 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2416 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2418 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm
[] =
2420 THUMB16_INSN (0x4778), /* bx pc */
2421 THUMB16_INSN (0x46c0), /* nop */
2422 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2423 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2426 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2427 one, when the destination is close enough. */
2428 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm
[] =
2430 THUMB16_INSN (0x4778), /* bx pc */
2431 THUMB16_INSN (0x46c0), /* nop */
2432 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2435 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2436 blx to reach the stub if necessary. */
2437 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic
[] =
2439 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2440 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2441 DATA_WORD (0, R_ARM_REL32
, -4), /* dcd R_ARM_REL32(X-4) */
2444 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2445 blx to reach the stub if necessary. We can not add into pc;
2446 it is not guaranteed to mode switch (different in ARMv6 and
2448 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic
[] =
2450 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2451 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2452 ARM_INSN (0xe12fff1c), /* bx ip */
2453 DATA_WORD (0, R_ARM_REL32
, 0), /* dcd R_ARM_REL32(X) */
2456 /* V4T ARM -> ARM long branch stub, PIC. */
2457 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic
[] =
2459 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2460 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2461 ARM_INSN (0xe12fff1c), /* bx ip */
2462 DATA_WORD (0, R_ARM_REL32
, 0), /* dcd R_ARM_REL32(X) */
2465 /* V4T Thumb -> ARM long branch stub, PIC. */
2466 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic
[] =
2468 THUMB16_INSN (0x4778), /* bx pc */
2469 THUMB16_INSN (0x46c0), /* nop */
2470 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2471 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2472 DATA_WORD (0, R_ARM_REL32
, -4), /* dcd R_ARM_REL32(X) */
2475 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2477 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic
[] =
2479 THUMB16_INSN (0xb401), /* push {r0} */
2480 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2481 THUMB16_INSN (0x46fc), /* mov ip, pc */
2482 THUMB16_INSN (0x4484), /* add ip, r0 */
2483 THUMB16_INSN (0xbc01), /* pop {r0} */
2484 THUMB16_INSN (0x4760), /* bx ip */
2485 DATA_WORD (0, R_ARM_REL32
, 4), /* dcd R_ARM_REL32(X) */
2488 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2490 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic
[] =
2492 THUMB16_INSN (0x4778), /* bx pc */
2493 THUMB16_INSN (0x46c0), /* nop */
2494 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2495 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2496 ARM_INSN (0xe12fff1c), /* bx ip */
2497 DATA_WORD (0, R_ARM_REL32
, 0), /* dcd R_ARM_REL32(X) */
2500 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2501 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2502 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic
[] =
2504 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2505 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2506 DATA_WORD (0, R_ARM_REL32
, -4), /* dcd R_ARM_REL32(X-4) */
2509 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2510 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2511 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic
[] =
2513 THUMB16_INSN (0x4778), /* bx pc */
2514 THUMB16_INSN (0x46c0), /* nop */
2515 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2516 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2517 DATA_WORD (0, R_ARM_REL32
, -4), /* dcd R_ARM_REL32(X) */
2520 /* NaCl ARM -> ARM long branch stub. */
2521 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl
[] =
2523 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2524 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2525 ARM_INSN (0xe12fff1c), /* bx ip */
2526 ARM_INSN (0xe320f000), /* nop */
2527 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2528 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2529 DATA_WORD (0, R_ARM_NONE
, 0), /* .word 0 */
2530 DATA_WORD (0, R_ARM_NONE
, 0), /* .word 0 */
2533 /* NaCl ARM -> ARM long branch stub, PIC. */
2534 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic
[] =
2536 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2537 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2538 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2539 ARM_INSN (0xe12fff1c), /* bx ip */
2540 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2541 DATA_WORD (0, R_ARM_REL32
, 8), /* dcd R_ARM_REL32(X+8) */
2542 DATA_WORD (0, R_ARM_NONE
, 0), /* .word 0 */
2543 DATA_WORD (0, R_ARM_NONE
, 0), /* .word 0 */
2547 /* Cortex-A8 erratum-workaround stubs. */
2549 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2550 can't use a conditional branch to reach this stub). */
2552 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond
[] =
2554 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2555 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2556 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2559 /* Stub used for b.w and bl.w instructions. */
2561 static const insn_sequence elf32_arm_stub_a8_veneer_b
[] =
2563 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2566 static const insn_sequence elf32_arm_stub_a8_veneer_bl
[] =
2568 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2571 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2572 instruction (which switches to ARM mode) to point to this stub. Jump to the
2573 real destination using an ARM-mode branch. */
2575 static const insn_sequence elf32_arm_stub_a8_veneer_blx
[] =
2577 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2580 /* For each section group there can be a specially created linker section
2581 to hold the stubs for that group. The name of the stub section is based
2582 upon the name of another section within that group with the suffix below
2585 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2586 create what appeared to be a linker stub section when it actually
2587 contained user code/data. For example, consider this fragment:
2589 const char * stubborn_problems[] = { "np" };
2591 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2594 .data.rel.local.stubborn_problems
2596 This then causes problems in arm32_arm_build_stubs() as it triggers:
2598 // Ignore non-stub sections.
2599 if (!strstr (stub_sec->name, STUB_SUFFIX))
2602 And so the section would be ignored instead of being processed. Hence
2603 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2605 #define STUB_SUFFIX ".__stub"
2607 /* One entry per long/short branch stub defined above. */
2609 DEF_STUB(long_branch_any_any) \
2610 DEF_STUB(long_branch_v4t_arm_thumb) \
2611 DEF_STUB(long_branch_thumb_only) \
2612 DEF_STUB(long_branch_v4t_thumb_thumb) \
2613 DEF_STUB(long_branch_v4t_thumb_arm) \
2614 DEF_STUB(short_branch_v4t_thumb_arm) \
2615 DEF_STUB(long_branch_any_arm_pic) \
2616 DEF_STUB(long_branch_any_thumb_pic) \
2617 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2618 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2619 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2620 DEF_STUB(long_branch_thumb_only_pic) \
2621 DEF_STUB(long_branch_any_tls_pic) \
2622 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2623 DEF_STUB(long_branch_arm_nacl) \
2624 DEF_STUB(long_branch_arm_nacl_pic) \
2625 DEF_STUB(a8_veneer_b_cond) \
2626 DEF_STUB(a8_veneer_b) \
2627 DEF_STUB(a8_veneer_bl) \
2628 DEF_STUB(a8_veneer_blx)
2630 #define DEF_STUB(x) arm_stub_##x,
2631 enum elf32_arm_stub_type
2635 /* Note the first a8_veneer type. */
2636 arm_stub_a8_veneer_lwm
= arm_stub_a8_veneer_b_cond
2642 const insn_sequence
* template_sequence
;
2646 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2647 static const stub_def stub_definitions
[] =
2653 struct elf32_arm_stub_hash_entry
2655 /* Base hash table entry structure. */
2656 struct bfd_hash_entry root
;
2658 /* The stub section. */
2661 /* Offset within stub_sec of the beginning of this stub. */
2662 bfd_vma stub_offset
;
2664 /* Given the symbol's value and its section we can determine its final
2665 value when building the stubs (so the stub knows where to jump). */
2666 bfd_vma target_value
;
2667 asection
*target_section
;
2669 /* Offset to apply to relocation referencing target_value. */
2670 bfd_vma target_addend
;
2672 /* The instruction which caused this stub to be generated (only valid for
2673 Cortex-A8 erratum workaround stubs at present). */
2674 unsigned long orig_insn
;
2676 /* The stub type. */
2677 enum elf32_arm_stub_type stub_type
;
2678 /* Its encoding size in bytes. */
2681 const insn_sequence
*stub_template
;
2682 /* The size of the template (number of entries). */
2683 int stub_template_size
;
2685 /* The symbol table entry, if any, that this was derived from. */
2686 struct elf32_arm_link_hash_entry
*h
;
2688 /* Type of branch. */
2689 enum arm_st_branch_type branch_type
;
2691 /* Where this stub is being called from, or, in the case of combined
2692 stub sections, the first input section in the group. */
2695 /* The name for the local symbol at the start of this stub. The
2696 stub name in the hash table has to be unique; this does not, so
2697 it can be friendlier. */
2701 /* Used to build a map of a section. This is required for mixed-endian
2704 typedef struct elf32_elf_section_map
2709 elf32_arm_section_map
;
2711 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2715 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER
,
2716 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER
,
2717 VFP11_ERRATUM_ARM_VENEER
,
2718 VFP11_ERRATUM_THUMB_VENEER
2720 elf32_vfp11_erratum_type
;
2722 typedef struct elf32_vfp11_erratum_list
2724 struct elf32_vfp11_erratum_list
*next
;
2730 struct elf32_vfp11_erratum_list
*veneer
;
2731 unsigned int vfp_insn
;
2735 struct elf32_vfp11_erratum_list
*branch
;
2739 elf32_vfp11_erratum_type type
;
2741 elf32_vfp11_erratum_list
;
2743 /* Information about a STM32L4XX erratum veneer, or a branch to such a
2747 STM32L4XX_ERRATUM_BRANCH_TO_VENEER
,
2748 STM32L4XX_ERRATUM_VENEER
2750 elf32_stm32l4xx_erratum_type
;
2752 typedef struct elf32_stm32l4xx_erratum_list
2754 struct elf32_stm32l4xx_erratum_list
*next
;
2760 struct elf32_stm32l4xx_erratum_list
*veneer
;
2765 struct elf32_stm32l4xx_erratum_list
*branch
;
2769 elf32_stm32l4xx_erratum_type type
;
2771 elf32_stm32l4xx_erratum_list
;
2776 INSERT_EXIDX_CANTUNWIND_AT_END
2778 arm_unwind_edit_type
;
2780 /* A (sorted) list of edits to apply to an unwind table. */
2781 typedef struct arm_unwind_table_edit
2783 arm_unwind_edit_type type
;
2784 /* Note: we sometimes want to insert an unwind entry corresponding to a
2785 section different from the one we're currently writing out, so record the
2786 (text) section this edit relates to here. */
2787 asection
*linked_section
;
2789 struct arm_unwind_table_edit
*next
;
2791 arm_unwind_table_edit
;
2793 typedef struct _arm_elf_section_data
2795 /* Information about mapping symbols. */
2796 struct bfd_elf_section_data elf
;
2797 unsigned int mapcount
;
2798 unsigned int mapsize
;
2799 elf32_arm_section_map
*map
;
2800 /* Information about CPU errata. */
2801 unsigned int erratumcount
;
2802 elf32_vfp11_erratum_list
*erratumlist
;
2803 unsigned int stm32l4xx_erratumcount
;
2804 elf32_stm32l4xx_erratum_list
*stm32l4xx_erratumlist
;
2805 unsigned int additional_reloc_count
;
2806 /* Information about unwind tables. */
2809 /* Unwind info attached to a text section. */
2812 asection
*arm_exidx_sec
;
2815 /* Unwind info attached to an .ARM.exidx section. */
2818 arm_unwind_table_edit
*unwind_edit_list
;
2819 arm_unwind_table_edit
*unwind_edit_tail
;
2823 _arm_elf_section_data
;
2825 #define elf32_arm_section_data(sec) \
2826 ((_arm_elf_section_data *) elf_section_data (sec))
2828 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2829 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2830 so may be created multiple times: we use an array of these entries whilst
2831 relaxing which we can refresh easily, then create stubs for each potentially
2832 erratum-triggering instruction once we've settled on a solution. */
2834 struct a8_erratum_fix
2840 unsigned long orig_insn
;
2842 enum elf32_arm_stub_type stub_type
;
2843 enum arm_st_branch_type branch_type
;
2846 /* A table of relocs applied to branches which might trigger Cortex-A8
2849 struct a8_erratum_reloc
2852 bfd_vma destination
;
2853 struct elf32_arm_link_hash_entry
*hash
;
2854 const char *sym_name
;
2855 unsigned int r_type
;
2856 enum arm_st_branch_type branch_type
;
2857 bfd_boolean non_a8_stub
;
2860 /* The size of the thread control block. */
2863 /* ARM-specific information about a PLT entry, over and above the usual
2867 /* We reference count Thumb references to a PLT entry separately,
2868 so that we can emit the Thumb trampoline only if needed. */
2869 bfd_signed_vma thumb_refcount
;
2871 /* Some references from Thumb code may be eliminated by BL->BLX
2872 conversion, so record them separately. */
2873 bfd_signed_vma maybe_thumb_refcount
;
2875 /* How many of the recorded PLT accesses were from non-call relocations.
2876 This information is useful when deciding whether anything takes the
2877 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2878 non-call references to the function should resolve directly to the
2879 real runtime target. */
2880 unsigned int noncall_refcount
;
2882 /* Since PLT entries have variable size if the Thumb prologue is
2883 used, we need to record the index into .got.plt instead of
2884 recomputing it from the PLT offset. */
2885 bfd_signed_vma got_offset
;
2888 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
2889 struct arm_local_iplt_info
2891 /* The information that is usually found in the generic ELF part of
2892 the hash table entry. */
2893 union gotplt_union root
;
2895 /* The information that is usually found in the ARM-specific part of
2896 the hash table entry. */
2897 struct arm_plt_info arm
;
2899 /* A list of all potential dynamic relocations against this symbol. */
2900 struct elf_dyn_relocs
*dyn_relocs
;
2903 struct elf_arm_obj_tdata
2905 struct elf_obj_tdata root
;
2907 /* tls_type for each local got entry. */
2908 char *local_got_tls_type
;
2910 /* GOTPLT entries for TLS descriptors. */
2911 bfd_vma
*local_tlsdesc_gotent
;
2913 /* Information for local symbols that need entries in .iplt. */
2914 struct arm_local_iplt_info
**local_iplt
;
2916 /* Zero to warn when linking objects with incompatible enum sizes. */
2917 int no_enum_size_warning
;
2919 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2920 int no_wchar_size_warning
;
2923 #define elf_arm_tdata(bfd) \
2924 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
2926 #define elf32_arm_local_got_tls_type(bfd) \
2927 (elf_arm_tdata (bfd)->local_got_tls_type)
2929 #define elf32_arm_local_tlsdesc_gotent(bfd) \
2930 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2932 #define elf32_arm_local_iplt(bfd) \
2933 (elf_arm_tdata (bfd)->local_iplt)
2935 #define is_arm_elf(bfd) \
2936 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2937 && elf_tdata (bfd) != NULL \
2938 && elf_object_id (bfd) == ARM_ELF_DATA)
2941 elf32_arm_mkobject (bfd
*abfd
)
2943 return bfd_elf_allocate_object (abfd
, sizeof (struct elf_arm_obj_tdata
),
2947 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2949 /* Arm ELF linker hash entry. */
2950 struct elf32_arm_link_hash_entry
2952 struct elf_link_hash_entry root
;
2954 /* Track dynamic relocs copied for this symbol. */
2955 struct elf_dyn_relocs
*dyn_relocs
;
2957 /* ARM-specific PLT information. */
2958 struct arm_plt_info plt
;
2960 #define GOT_UNKNOWN 0
2961 #define GOT_NORMAL 1
2962 #define GOT_TLS_GD 2
2963 #define GOT_TLS_IE 4
2964 #define GOT_TLS_GDESC 8
2965 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
2966 unsigned int tls_type
: 8;
2968 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
2969 unsigned int is_iplt
: 1;
2971 unsigned int unused
: 23;
2973 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
2974 starting at the end of the jump table. */
2975 bfd_vma tlsdesc_got
;
2977 /* The symbol marking the real symbol location for exported thumb
2978 symbols with Arm stubs. */
2979 struct elf_link_hash_entry
*export_glue
;
2981 /* A pointer to the most recently used stub hash entry against this
2983 struct elf32_arm_stub_hash_entry
*stub_cache
;
2986 /* Traverse an arm ELF linker hash table. */
2987 #define elf32_arm_link_hash_traverse(table, func, info) \
2988 (elf_link_hash_traverse \
2990 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
2993 /* Get the ARM elf linker hash table from a link_info structure. */
2994 #define elf32_arm_hash_table(info) \
2995 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
2996 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
2998 #define arm_stub_hash_lookup(table, string, create, copy) \
2999 ((struct elf32_arm_stub_hash_entry *) \
3000 bfd_hash_lookup ((table), (string), (create), (copy)))
3002 /* Array to keep track of which stub sections have been created, and
3003 information on stub grouping. */
3006 /* This is the section to which stubs in the group will be
3009 /* The stub section. */
3013 #define elf32_arm_compute_jump_table_size(htab) \
3014 ((htab)->next_tls_desc_index * 4)
3016 /* ARM ELF linker hash table. */
3017 struct elf32_arm_link_hash_table
3019 /* The main hash table. */
3020 struct elf_link_hash_table root
;
3022 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
3023 bfd_size_type thumb_glue_size
;
3025 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
3026 bfd_size_type arm_glue_size
;
3028 /* The size in bytes of section containing the ARMv4 BX veneers. */
3029 bfd_size_type bx_glue_size
;
3031 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
3032 veneer has been populated. */
3033 bfd_vma bx_glue_offset
[15];
3035 /* The size in bytes of the section containing glue for VFP11 erratum
3037 bfd_size_type vfp11_erratum_glue_size
;
3039 /* The size in bytes of the section containing glue for STM32L4XX erratum
3041 bfd_size_type stm32l4xx_erratum_glue_size
;
3043 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
3044 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
3045 elf32_arm_write_section(). */
3046 struct a8_erratum_fix
*a8_erratum_fixes
;
3047 unsigned int num_a8_erratum_fixes
;
3049 /* An arbitrary input BFD chosen to hold the glue sections. */
3050 bfd
* bfd_of_glue_owner
;
3052 /* Nonzero to output a BE8 image. */
3055 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
3056 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
3059 /* The relocation to use for R_ARM_TARGET2 relocations. */
3062 /* 0 = Ignore R_ARM_V4BX.
3063 1 = Convert BX to MOV PC.
3064 2 = Generate v4 interworing stubs. */
3067 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
3070 /* Whether we should fix the ARM1176 BLX immediate issue. */
3073 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
3076 /* What sort of code sequences we should look for which may trigger the
3077 VFP11 denorm erratum. */
3078 bfd_arm_vfp11_fix vfp11_fix
;
3080 /* Global counter for the number of fixes we have emitted. */
3081 int num_vfp11_fixes
;
3083 /* What sort of code sequences we should look for which may trigger the
3084 STM32L4XX erratum. */
3085 bfd_arm_stm32l4xx_fix stm32l4xx_fix
;
3087 /* Global counter for the number of fixes we have emitted. */
3088 int num_stm32l4xx_fixes
;
3090 /* Nonzero to force PIC branch veneers. */
3093 /* The number of bytes in the initial entry in the PLT. */
3094 bfd_size_type plt_header_size
;
3096 /* The number of bytes in the subsequent PLT etries. */
3097 bfd_size_type plt_entry_size
;
3099 /* True if the target system is VxWorks. */
3102 /* True if the target system is Symbian OS. */
3105 /* True if the target system is Native Client. */
3108 /* True if the target uses REL relocations. */
3111 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
3112 bfd_vma next_tls_desc_index
;
3114 /* How many R_ARM_TLS_DESC relocations were generated so far. */
3115 bfd_vma num_tls_desc
;
3117 /* Short-cuts to get to dynamic linker sections. */
3121 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
3124 /* The offset into splt of the PLT entry for the TLS descriptor
3125 resolver. Special values are 0, if not necessary (or not found
3126 to be necessary yet), and -1 if needed but not determined
3128 bfd_vma dt_tlsdesc_plt
;
3130 /* The offset into sgot of the GOT entry used by the PLT entry
3132 bfd_vma dt_tlsdesc_got
;
3134 /* Offset in .plt section of tls_arm_trampoline. */
3135 bfd_vma tls_trampoline
;
3137 /* Data for R_ARM_TLS_LDM32 relocations. */
3140 bfd_signed_vma refcount
;
3144 /* Small local sym cache. */
3145 struct sym_cache sym_cache
;
3147 /* For convenience in allocate_dynrelocs. */
3150 /* The amount of space used by the reserved portion of the sgotplt
3151 section, plus whatever space is used by the jump slots. */
3152 bfd_vma sgotplt_jump_table_size
;
3154 /* The stub hash table. */
3155 struct bfd_hash_table stub_hash_table
;
3157 /* Linker stub bfd. */
3160 /* Linker call-backs. */
3161 asection
* (*add_stub_section
) (const char *, asection
*, unsigned int);
3162 void (*layout_sections_again
) (void);
3164 /* Array to keep track of which stub sections have been created, and
3165 information on stub grouping. */
3166 struct map_stub
*stub_group
;
3168 /* Number of elements in stub_group. */
3169 unsigned int top_id
;
3171 /* Assorted information used by elf32_arm_size_stubs. */
3172 unsigned int bfd_count
;
3173 unsigned int top_index
;
3174 asection
**input_list
;
3178 ctz (unsigned int mask
)
3180 #if GCC_VERSION >= 3004
3181 return __builtin_ctz (mask
);
3185 for (i
= 0; i
< 8 * sizeof (mask
); i
++)
3196 popcount (unsigned int mask
)
3198 #if GCC_VERSION >= 3004
3199 return __builtin_popcount (mask
);
3201 unsigned int i
, sum
= 0;
3203 for (i
= 0; i
< 8 * sizeof (mask
); i
++)
3213 /* Create an entry in an ARM ELF linker hash table. */
3215 static struct bfd_hash_entry
*
3216 elf32_arm_link_hash_newfunc (struct bfd_hash_entry
* entry
,
3217 struct bfd_hash_table
* table
,
3218 const char * string
)
3220 struct elf32_arm_link_hash_entry
* ret
=
3221 (struct elf32_arm_link_hash_entry
*) entry
;
3223 /* Allocate the structure if it has not already been allocated by a
3226 ret
= (struct elf32_arm_link_hash_entry
*)
3227 bfd_hash_allocate (table
, sizeof (struct elf32_arm_link_hash_entry
));
3229 return (struct bfd_hash_entry
*) ret
;
3231 /* Call the allocation method of the superclass. */
3232 ret
= ((struct elf32_arm_link_hash_entry
*)
3233 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry
*) ret
,
3237 ret
->dyn_relocs
= NULL
;
3238 ret
->tls_type
= GOT_UNKNOWN
;
3239 ret
->tlsdesc_got
= (bfd_vma
) -1;
3240 ret
->plt
.thumb_refcount
= 0;
3241 ret
->plt
.maybe_thumb_refcount
= 0;
3242 ret
->plt
.noncall_refcount
= 0;
3243 ret
->plt
.got_offset
= -1;
3244 ret
->is_iplt
= FALSE
;
3245 ret
->export_glue
= NULL
;
3247 ret
->stub_cache
= NULL
;
3250 return (struct bfd_hash_entry
*) ret
;
3253 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3257 elf32_arm_allocate_local_sym_info (bfd
*abfd
)
3259 if (elf_local_got_refcounts (abfd
) == NULL
)
3261 bfd_size_type num_syms
;
3265 num_syms
= elf_tdata (abfd
)->symtab_hdr
.sh_info
;
3266 size
= num_syms
* (sizeof (bfd_signed_vma
)
3267 + sizeof (struct arm_local_iplt_info
*)
3270 data
= bfd_zalloc (abfd
, size
);
3274 elf_local_got_refcounts (abfd
) = (bfd_signed_vma
*) data
;
3275 data
+= num_syms
* sizeof (bfd_signed_vma
);
3277 elf32_arm_local_iplt (abfd
) = (struct arm_local_iplt_info
**) data
;
3278 data
+= num_syms
* sizeof (struct arm_local_iplt_info
*);
3280 elf32_arm_local_tlsdesc_gotent (abfd
) = (bfd_vma
*) data
;
3281 data
+= num_syms
* sizeof (bfd_vma
);
3283 elf32_arm_local_got_tls_type (abfd
) = data
;
3288 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3289 to input bfd ABFD. Create the information if it doesn't already exist.
3290 Return null if an allocation fails. */
3292 static struct arm_local_iplt_info
*
3293 elf32_arm_create_local_iplt (bfd
*abfd
, unsigned long r_symndx
)
3295 struct arm_local_iplt_info
**ptr
;
3297 if (!elf32_arm_allocate_local_sym_info (abfd
))
3300 BFD_ASSERT (r_symndx
< elf_tdata (abfd
)->symtab_hdr
.sh_info
);
3301 ptr
= &elf32_arm_local_iplt (abfd
)[r_symndx
];
3303 *ptr
= bfd_zalloc (abfd
, sizeof (**ptr
));
3307 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3308 in ABFD's symbol table. If the symbol is global, H points to its
3309 hash table entry, otherwise H is null.
3311 Return true if the symbol does have PLT information. When returning
3312 true, point *ROOT_PLT at the target-independent reference count/offset
3313 union and *ARM_PLT at the ARM-specific information. */
3316 elf32_arm_get_plt_info (bfd
*abfd
, struct elf32_arm_link_hash_entry
*h
,
3317 unsigned long r_symndx
, union gotplt_union
**root_plt
,
3318 struct arm_plt_info
**arm_plt
)
3320 struct arm_local_iplt_info
*local_iplt
;
3324 *root_plt
= &h
->root
.plt
;
3329 if (elf32_arm_local_iplt (abfd
) == NULL
)
3332 local_iplt
= elf32_arm_local_iplt (abfd
)[r_symndx
];
3333 if (local_iplt
== NULL
)
3336 *root_plt
= &local_iplt
->root
;
3337 *arm_plt
= &local_iplt
->arm
;
3341 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3345 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info
*info
,
3346 struct arm_plt_info
*arm_plt
)
3348 struct elf32_arm_link_hash_table
*htab
;
3350 htab
= elf32_arm_hash_table (info
);
3351 return (arm_plt
->thumb_refcount
!= 0
3352 || (!htab
->use_blx
&& arm_plt
->maybe_thumb_refcount
!= 0));
3355 /* Return a pointer to the head of the dynamic reloc list that should
3356 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3357 ABFD's symbol table. Return null if an error occurs. */
3359 static struct elf_dyn_relocs
**
3360 elf32_arm_get_local_dynreloc_list (bfd
*abfd
, unsigned long r_symndx
,
3361 Elf_Internal_Sym
*isym
)
3363 if (ELF32_ST_TYPE (isym
->st_info
) == STT_GNU_IFUNC
)
3365 struct arm_local_iplt_info
*local_iplt
;
3367 local_iplt
= elf32_arm_create_local_iplt (abfd
, r_symndx
);
3368 if (local_iplt
== NULL
)
3370 return &local_iplt
->dyn_relocs
;
3374 /* Track dynamic relocs needed for local syms too.
3375 We really need local syms available to do this
3380 s
= bfd_section_from_elf_index (abfd
, isym
->st_shndx
);
3384 vpp
= &elf_section_data (s
)->local_dynrel
;
3385 return (struct elf_dyn_relocs
**) vpp
;
3389 /* Initialize an entry in the stub hash table. */
3391 static struct bfd_hash_entry
*
3392 stub_hash_newfunc (struct bfd_hash_entry
*entry
,
3393 struct bfd_hash_table
*table
,
3396 /* Allocate the structure if it has not already been allocated by a
3400 entry
= (struct bfd_hash_entry
*)
3401 bfd_hash_allocate (table
, sizeof (struct elf32_arm_stub_hash_entry
));
3406 /* Call the allocation method of the superclass. */
3407 entry
= bfd_hash_newfunc (entry
, table
, string
);
3410 struct elf32_arm_stub_hash_entry
*eh
;
3412 /* Initialize the local fields. */
3413 eh
= (struct elf32_arm_stub_hash_entry
*) entry
;
3414 eh
->stub_sec
= NULL
;
3415 eh
->stub_offset
= 0;
3416 eh
->target_value
= 0;
3417 eh
->target_section
= NULL
;
3418 eh
->target_addend
= 0;
3420 eh
->stub_type
= arm_stub_none
;
3422 eh
->stub_template
= NULL
;
3423 eh
->stub_template_size
= 0;
3426 eh
->output_name
= NULL
;
3432 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3433 shortcuts to them in our hash table. */
3436 create_got_section (bfd
*dynobj
, struct bfd_link_info
*info
)
3438 struct elf32_arm_link_hash_table
*htab
;
3440 htab
= elf32_arm_hash_table (info
);
3444 /* BPABI objects never have a GOT, or associated sections. */
3445 if (htab
->symbian_p
)
3448 if (! _bfd_elf_create_got_section (dynobj
, info
))
3454 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3457 create_ifunc_sections (struct bfd_link_info
*info
)
3459 struct elf32_arm_link_hash_table
*htab
;
3460 const struct elf_backend_data
*bed
;
3465 htab
= elf32_arm_hash_table (info
);
3466 dynobj
= htab
->root
.dynobj
;
3467 bed
= get_elf_backend_data (dynobj
);
3468 flags
= bed
->dynamic_sec_flags
;
3470 if (htab
->root
.iplt
== NULL
)
3472 s
= bfd_make_section_anyway_with_flags (dynobj
, ".iplt",
3473 flags
| SEC_READONLY
| SEC_CODE
);
3475 || !bfd_set_section_alignment (dynobj
, s
, bed
->plt_alignment
))
3477 htab
->root
.iplt
= s
;
3480 if (htab
->root
.irelplt
== NULL
)
3482 s
= bfd_make_section_anyway_with_flags (dynobj
,
3483 RELOC_SECTION (htab
, ".iplt"),
3484 flags
| SEC_READONLY
);
3486 || !bfd_set_section_alignment (dynobj
, s
, bed
->s
->log_file_align
))
3488 htab
->root
.irelplt
= s
;
3491 if (htab
->root
.igotplt
== NULL
)
3493 s
= bfd_make_section_anyway_with_flags (dynobj
, ".igot.plt", flags
);
3495 || !bfd_set_section_alignment (dynobj
, s
, bed
->s
->log_file_align
))
3497 htab
->root
.igotplt
= s
;
3502 /* Determine if we're dealing with a Thumb only architecture. */
3505 using_thumb_only (struct elf32_arm_link_hash_table
*globals
)
3508 int profile
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
3509 Tag_CPU_arch_profile
);
3512 return profile
== 'M';
3514 arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
3516 if (arch
== TAG_CPU_ARCH_V6_M
3517 || arch
== TAG_CPU_ARCH_V6S_M
3518 || arch
== TAG_CPU_ARCH_V7E_M
3519 || arch
== TAG_CPU_ARCH_V8M_BASE
3520 || arch
== TAG_CPU_ARCH_V8M_MAIN
)
3526 /* Determine if we're dealing with a Thumb-2 object. */
3529 using_thumb2 (struct elf32_arm_link_hash_table
*globals
)
3531 int arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
3533 return arch
== TAG_CPU_ARCH_V6T2
|| arch
>= TAG_CPU_ARCH_V7
;
3536 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3537 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3541 elf32_arm_create_dynamic_sections (bfd
*dynobj
, struct bfd_link_info
*info
)
3543 struct elf32_arm_link_hash_table
*htab
;
3545 htab
= elf32_arm_hash_table (info
);
3549 if (!htab
->root
.sgot
&& !create_got_section (dynobj
, info
))
3552 if (!_bfd_elf_create_dynamic_sections (dynobj
, info
))
3555 htab
->sdynbss
= bfd_get_linker_section (dynobj
, ".dynbss");
3556 if (!bfd_link_pic (info
))
3557 htab
->srelbss
= bfd_get_linker_section (dynobj
,
3558 RELOC_SECTION (htab
, ".bss"));
3560 if (htab
->vxworks_p
)
3562 if (!elf_vxworks_create_dynamic_sections (dynobj
, info
, &htab
->srelplt2
))
3565 if (bfd_link_pic (info
))
3567 htab
->plt_header_size
= 0;
3568 htab
->plt_entry_size
3569 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry
);
3573 htab
->plt_header_size
3574 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry
);
3575 htab
->plt_entry_size
3576 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry
);
3579 if (elf_elfheader (dynobj
))
3580 elf_elfheader (dynobj
)->e_ident
[EI_CLASS
] = ELFCLASS32
;
3585 Test for thumb only architectures. Note - we cannot just call
3586 using_thumb_only() as the attributes in the output bfd have not been
3587 initialised at this point, so instead we use the input bfd. */
3588 bfd
* saved_obfd
= htab
->obfd
;
3590 htab
->obfd
= dynobj
;
3591 if (using_thumb_only (htab
))
3593 htab
->plt_header_size
= 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry
);
3594 htab
->plt_entry_size
= 4 * ARRAY_SIZE (elf32_thumb2_plt_entry
);
3596 htab
->obfd
= saved_obfd
;
3599 if (!htab
->root
.splt
3600 || !htab
->root
.srelplt
3602 || (!bfd_link_pic (info
) && !htab
->srelbss
))
3608 /* Copy the extra info we tack onto an elf_link_hash_entry. */
3611 elf32_arm_copy_indirect_symbol (struct bfd_link_info
*info
,
3612 struct elf_link_hash_entry
*dir
,
3613 struct elf_link_hash_entry
*ind
)
3615 struct elf32_arm_link_hash_entry
*edir
, *eind
;
3617 edir
= (struct elf32_arm_link_hash_entry
*) dir
;
3618 eind
= (struct elf32_arm_link_hash_entry
*) ind
;
3620 if (eind
->dyn_relocs
!= NULL
)
3622 if (edir
->dyn_relocs
!= NULL
)
3624 struct elf_dyn_relocs
**pp
;
3625 struct elf_dyn_relocs
*p
;
3627 /* Add reloc counts against the indirect sym to the direct sym
3628 list. Merge any entries against the same section. */
3629 for (pp
= &eind
->dyn_relocs
; (p
= *pp
) != NULL
; )
3631 struct elf_dyn_relocs
*q
;
3633 for (q
= edir
->dyn_relocs
; q
!= NULL
; q
= q
->next
)
3634 if (q
->sec
== p
->sec
)
3636 q
->pc_count
+= p
->pc_count
;
3637 q
->count
+= p
->count
;
3644 *pp
= edir
->dyn_relocs
;
3647 edir
->dyn_relocs
= eind
->dyn_relocs
;
3648 eind
->dyn_relocs
= NULL
;
3651 if (ind
->root
.type
== bfd_link_hash_indirect
)
3653 /* Copy over PLT info. */
3654 edir
->plt
.thumb_refcount
+= eind
->plt
.thumb_refcount
;
3655 eind
->plt
.thumb_refcount
= 0;
3656 edir
->plt
.maybe_thumb_refcount
+= eind
->plt
.maybe_thumb_refcount
;
3657 eind
->plt
.maybe_thumb_refcount
= 0;
3658 edir
->plt
.noncall_refcount
+= eind
->plt
.noncall_refcount
;
3659 eind
->plt
.noncall_refcount
= 0;
3661 /* We should only allocate a function to .iplt once the final
3662 symbol information is known. */
3663 BFD_ASSERT (!eind
->is_iplt
);
3665 if (dir
->got
.refcount
<= 0)
3667 edir
->tls_type
= eind
->tls_type
;
3668 eind
->tls_type
= GOT_UNKNOWN
;
3672 _bfd_elf_link_hash_copy_indirect (info
, dir
, ind
);
3675 /* Destroy an ARM elf linker hash table. */
3678 elf32_arm_link_hash_table_free (bfd
*obfd
)
3680 struct elf32_arm_link_hash_table
*ret
3681 = (struct elf32_arm_link_hash_table
*) obfd
->link
.hash
;
3683 bfd_hash_table_free (&ret
->stub_hash_table
);
3684 _bfd_elf_link_hash_table_free (obfd
);
3687 /* Create an ARM elf linker hash table. */
3689 static struct bfd_link_hash_table
*
3690 elf32_arm_link_hash_table_create (bfd
*abfd
)
3692 struct elf32_arm_link_hash_table
*ret
;
3693 bfd_size_type amt
= sizeof (struct elf32_arm_link_hash_table
);
3695 ret
= (struct elf32_arm_link_hash_table
*) bfd_zmalloc (amt
);
3699 if (!_bfd_elf_link_hash_table_init (& ret
->root
, abfd
,
3700 elf32_arm_link_hash_newfunc
,
3701 sizeof (struct elf32_arm_link_hash_entry
),
3708 ret
->vfp11_fix
= BFD_ARM_VFP11_FIX_NONE
;
3709 ret
->stm32l4xx_fix
= BFD_ARM_STM32L4XX_FIX_NONE
;
3710 #ifdef FOUR_WORD_PLT
3711 ret
->plt_header_size
= 16;
3712 ret
->plt_entry_size
= 16;
3714 ret
->plt_header_size
= 20;
3715 ret
->plt_entry_size
= elf32_arm_use_long_plt_entry
? 16 : 12;
3720 if (!bfd_hash_table_init (&ret
->stub_hash_table
, stub_hash_newfunc
,
3721 sizeof (struct elf32_arm_stub_hash_entry
)))
3723 _bfd_elf_link_hash_table_free (abfd
);
3726 ret
->root
.root
.hash_table_free
= elf32_arm_link_hash_table_free
;
3728 return &ret
->root
.root
;
3731 /* Determine what kind of NOPs are available. */
3734 arch_has_arm_nop (struct elf32_arm_link_hash_table
*globals
)
3736 const int arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
3738 return arch
== TAG_CPU_ARCH_V6T2
3739 || arch
== TAG_CPU_ARCH_V6K
3740 || arch
== TAG_CPU_ARCH_V7
3741 || arch
== TAG_CPU_ARCH_V7E_M
;
3745 arch_has_thumb2_nop (struct elf32_arm_link_hash_table
*globals
)
3747 const int arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
3749 return (arch
== TAG_CPU_ARCH_V6T2
|| arch
== TAG_CPU_ARCH_V7
3750 || arch
== TAG_CPU_ARCH_V7E_M
);
3754 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type
)
3758 case arm_stub_long_branch_thumb_only
:
3759 case arm_stub_long_branch_v4t_thumb_arm
:
3760 case arm_stub_short_branch_v4t_thumb_arm
:
3761 case arm_stub_long_branch_v4t_thumb_arm_pic
:
3762 case arm_stub_long_branch_v4t_thumb_tls_pic
:
3763 case arm_stub_long_branch_thumb_only_pic
:
3774 /* Determine the type of stub needed, if any, for a call. */
3776 static enum elf32_arm_stub_type
3777 arm_type_of_stub (struct bfd_link_info
*info
,
3778 asection
*input_sec
,
3779 const Elf_Internal_Rela
*rel
,
3780 unsigned char st_type
,
3781 enum arm_st_branch_type
*actual_branch_type
,
3782 struct elf32_arm_link_hash_entry
*hash
,
3783 bfd_vma destination
,
3789 bfd_signed_vma branch_offset
;
3790 unsigned int r_type
;
3791 struct elf32_arm_link_hash_table
* globals
;
3794 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
3796 enum arm_st_branch_type branch_type
= *actual_branch_type
;
3797 union gotplt_union
*root_plt
;
3798 struct arm_plt_info
*arm_plt
;
3800 if (branch_type
== ST_BRANCH_LONG
)
3803 globals
= elf32_arm_hash_table (info
);
3804 if (globals
== NULL
)
3807 thumb_only
= using_thumb_only (globals
);
3809 thumb2
= using_thumb2 (globals
);
3811 /* Determine where the call point is. */
3812 location
= (input_sec
->output_offset
3813 + input_sec
->output_section
->vma
3816 r_type
= ELF32_R_TYPE (rel
->r_info
);
3818 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
3819 are considering a function call relocation. */
3820 if (thumb_only
&& (r_type
== R_ARM_THM_CALL
|| r_type
== R_ARM_THM_JUMP24
3821 || r_type
== R_ARM_THM_JUMP19
)
3822 && branch_type
== ST_BRANCH_TO_ARM
)
3823 branch_type
= ST_BRANCH_TO_THUMB
;
3825 /* For TLS call relocs, it is the caller's responsibility to provide
3826 the address of the appropriate trampoline. */
3827 if (r_type
!= R_ARM_TLS_CALL
3828 && r_type
!= R_ARM_THM_TLS_CALL
3829 && elf32_arm_get_plt_info (input_bfd
, hash
, ELF32_R_SYM (rel
->r_info
),
3830 &root_plt
, &arm_plt
)
3831 && root_plt
->offset
!= (bfd_vma
) -1)
3835 if (hash
== NULL
|| hash
->is_iplt
)
3836 splt
= globals
->root
.iplt
;
3838 splt
= globals
->root
.splt
;
3843 /* Note when dealing with PLT entries: the main PLT stub is in
3844 ARM mode, so if the branch is in Thumb mode, another
3845 Thumb->ARM stub will be inserted later just before the ARM
3846 PLT stub. We don't take this extra distance into account
3847 here, because if a long branch stub is needed, we'll add a
3848 Thumb->Arm one and branch directly to the ARM PLT entry
3849 because it avoids spreading offset corrections in several
3852 destination
= (splt
->output_section
->vma
3853 + splt
->output_offset
3854 + root_plt
->offset
);
3856 branch_type
= ST_BRANCH_TO_ARM
;
3859 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
3860 BFD_ASSERT (st_type
!= STT_GNU_IFUNC
);
3862 branch_offset
= (bfd_signed_vma
)(destination
- location
);
3864 if (r_type
== R_ARM_THM_CALL
|| r_type
== R_ARM_THM_JUMP24
3865 || r_type
== R_ARM_THM_TLS_CALL
|| r_type
== R_ARM_THM_JUMP19
)
3867 /* Handle cases where:
3868 - this call goes too far (different Thumb/Thumb2 max
3870 - it's a Thumb->Arm call and blx is not available, or it's a
3871 Thumb->Arm branch (not bl). A stub is needed in this case,
3872 but only if this call is not through a PLT entry. Indeed,
3873 PLT stubs handle mode switching already.
3876 && (branch_offset
> THM_MAX_FWD_BRANCH_OFFSET
3877 || (branch_offset
< THM_MAX_BWD_BRANCH_OFFSET
)))
3879 && (branch_offset
> THM2_MAX_FWD_BRANCH_OFFSET
3880 || (branch_offset
< THM2_MAX_BWD_BRANCH_OFFSET
)))
3882 && (branch_offset
> THM2_MAX_FWD_COND_BRANCH_OFFSET
3883 || (branch_offset
< THM2_MAX_BWD_COND_BRANCH_OFFSET
))
3884 && (r_type
== R_ARM_THM_JUMP19
))
3885 || (branch_type
== ST_BRANCH_TO_ARM
3886 && (((r_type
== R_ARM_THM_CALL
3887 || r_type
== R_ARM_THM_TLS_CALL
) && !globals
->use_blx
)
3888 || (r_type
== R_ARM_THM_JUMP24
)
3889 || (r_type
== R_ARM_THM_JUMP19
))
3892 if (branch_type
== ST_BRANCH_TO_THUMB
)
3894 /* Thumb to thumb. */
3897 stub_type
= (bfd_link_pic (info
) | globals
->pic_veneer
)
3899 ? ((globals
->use_blx
3900 && (r_type
== R_ARM_THM_CALL
))
3901 /* V5T and above. Stub starts with ARM code, so
3902 we must be able to switch mode before
3903 reaching it, which is only possible for 'bl'
3904 (ie R_ARM_THM_CALL relocation). */
3905 ? arm_stub_long_branch_any_thumb_pic
3906 /* On V4T, use Thumb code only. */
3907 : arm_stub_long_branch_v4t_thumb_thumb_pic
)
3909 /* non-PIC stubs. */
3910 : ((globals
->use_blx
3911 && (r_type
== R_ARM_THM_CALL
))
3912 /* V5T and above. */
3913 ? arm_stub_long_branch_any_any
3915 : arm_stub_long_branch_v4t_thumb_thumb
);
3919 stub_type
= (bfd_link_pic (info
) | globals
->pic_veneer
)
3921 ? arm_stub_long_branch_thumb_only_pic
3923 : arm_stub_long_branch_thumb_only
;
3930 && sym_sec
->owner
!= NULL
3931 && !INTERWORK_FLAG (sym_sec
->owner
))
3933 (*_bfd_error_handler
)
3934 (_("%B(%s): warning: interworking not enabled.\n"
3935 " first occurrence: %B: Thumb call to ARM"),
3936 sym_sec
->owner
, input_bfd
, name
);
3940 (bfd_link_pic (info
) | globals
->pic_veneer
)
3942 ? (r_type
== R_ARM_THM_TLS_CALL
3943 /* TLS PIC stubs. */
3944 ? (globals
->use_blx
? arm_stub_long_branch_any_tls_pic
3945 : arm_stub_long_branch_v4t_thumb_tls_pic
)
3946 : ((globals
->use_blx
&& r_type
== R_ARM_THM_CALL
)
3947 /* V5T PIC and above. */
3948 ? arm_stub_long_branch_any_arm_pic
3950 : arm_stub_long_branch_v4t_thumb_arm_pic
))
3952 /* non-PIC stubs. */
3953 : ((globals
->use_blx
&& r_type
== R_ARM_THM_CALL
)
3954 /* V5T and above. */
3955 ? arm_stub_long_branch_any_any
3957 : arm_stub_long_branch_v4t_thumb_arm
);
3959 /* Handle v4t short branches. */
3960 if ((stub_type
== arm_stub_long_branch_v4t_thumb_arm
)
3961 && (branch_offset
<= THM_MAX_FWD_BRANCH_OFFSET
)
3962 && (branch_offset
>= THM_MAX_BWD_BRANCH_OFFSET
))
3963 stub_type
= arm_stub_short_branch_v4t_thumb_arm
;
3967 else if (r_type
== R_ARM_CALL
3968 || r_type
== R_ARM_JUMP24
3969 || r_type
== R_ARM_PLT32
3970 || r_type
== R_ARM_TLS_CALL
)
3972 if (branch_type
== ST_BRANCH_TO_THUMB
)
3977 && sym_sec
->owner
!= NULL
3978 && !INTERWORK_FLAG (sym_sec
->owner
))
3980 (*_bfd_error_handler
)
3981 (_("%B(%s): warning: interworking not enabled.\n"
3982 " first occurrence: %B: ARM call to Thumb"),
3983 sym_sec
->owner
, input_bfd
, name
);
3986 /* We have an extra 2-bytes reach because of
3987 the mode change (bit 24 (H) of BLX encoding). */
3988 if (branch_offset
> (ARM_MAX_FWD_BRANCH_OFFSET
+ 2)
3989 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
)
3990 || (r_type
== R_ARM_CALL
&& !globals
->use_blx
)
3991 || (r_type
== R_ARM_JUMP24
)
3992 || (r_type
== R_ARM_PLT32
))
3994 stub_type
= (bfd_link_pic (info
) | globals
->pic_veneer
)
3996 ? ((globals
->use_blx
)
3997 /* V5T and above. */
3998 ? arm_stub_long_branch_any_thumb_pic
4000 : arm_stub_long_branch_v4t_arm_thumb_pic
)
4002 /* non-PIC stubs. */
4003 : ((globals
->use_blx
)
4004 /* V5T and above. */
4005 ? arm_stub_long_branch_any_any
4007 : arm_stub_long_branch_v4t_arm_thumb
);
4013 if (branch_offset
> ARM_MAX_FWD_BRANCH_OFFSET
4014 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
))
4017 (bfd_link_pic (info
) | globals
->pic_veneer
)
4019 ? (r_type
== R_ARM_TLS_CALL
4021 ? arm_stub_long_branch_any_tls_pic
4023 ? arm_stub_long_branch_arm_nacl_pic
4024 : arm_stub_long_branch_any_arm_pic
))
4025 /* non-PIC stubs. */
4027 ? arm_stub_long_branch_arm_nacl
4028 : arm_stub_long_branch_any_any
);
4033 /* If a stub is needed, record the actual destination type. */
4034 if (stub_type
!= arm_stub_none
)
4035 *actual_branch_type
= branch_type
;
4040 /* Build a name for an entry in the stub hash table. */
4043 elf32_arm_stub_name (const asection
*input_section
,
4044 const asection
*sym_sec
,
4045 const struct elf32_arm_link_hash_entry
*hash
,
4046 const Elf_Internal_Rela
*rel
,
4047 enum elf32_arm_stub_type stub_type
)
4054 len
= 8 + 1 + strlen (hash
->root
.root
.root
.string
) + 1 + 8 + 1 + 2 + 1;
4055 stub_name
= (char *) bfd_malloc (len
);
4056 if (stub_name
!= NULL
)
4057 sprintf (stub_name
, "%08x_%s+%x_%d",
4058 input_section
->id
& 0xffffffff,
4059 hash
->root
.root
.root
.string
,
4060 (int) rel
->r_addend
& 0xffffffff,
4065 len
= 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
4066 stub_name
= (char *) bfd_malloc (len
);
4067 if (stub_name
!= NULL
)
4068 sprintf (stub_name
, "%08x_%x:%x+%x_%d",
4069 input_section
->id
& 0xffffffff,
4070 sym_sec
->id
& 0xffffffff,
4071 ELF32_R_TYPE (rel
->r_info
) == R_ARM_TLS_CALL
4072 || ELF32_R_TYPE (rel
->r_info
) == R_ARM_THM_TLS_CALL
4073 ? 0 : (int) ELF32_R_SYM (rel
->r_info
) & 0xffffffff,
4074 (int) rel
->r_addend
& 0xffffffff,
4081 /* Look up an entry in the stub hash. Stub entries are cached because
4082 creating the stub name takes a bit of time. */
4084 static struct elf32_arm_stub_hash_entry
*
4085 elf32_arm_get_stub_entry (const asection
*input_section
,
4086 const asection
*sym_sec
,
4087 struct elf_link_hash_entry
*hash
,
4088 const Elf_Internal_Rela
*rel
,
4089 struct elf32_arm_link_hash_table
*htab
,
4090 enum elf32_arm_stub_type stub_type
)
4092 struct elf32_arm_stub_hash_entry
*stub_entry
;
4093 struct elf32_arm_link_hash_entry
*h
= (struct elf32_arm_link_hash_entry
*) hash
;
4094 const asection
*id_sec
;
4096 if ((input_section
->flags
& SEC_CODE
) == 0)
4099 /* If this input section is part of a group of sections sharing one
4100 stub section, then use the id of the first section in the group.
4101 Stub names need to include a section id, as there may well be
4102 more than one stub used to reach say, printf, and we need to
4103 distinguish between them. */
4104 id_sec
= htab
->stub_group
[input_section
->id
].link_sec
;
4106 if (h
!= NULL
&& h
->stub_cache
!= NULL
4107 && h
->stub_cache
->h
== h
4108 && h
->stub_cache
->id_sec
== id_sec
4109 && h
->stub_cache
->stub_type
== stub_type
)
4111 stub_entry
= h
->stub_cache
;
4117 stub_name
= elf32_arm_stub_name (id_sec
, sym_sec
, h
, rel
, stub_type
);
4118 if (stub_name
== NULL
)
4121 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
,
4122 stub_name
, FALSE
, FALSE
);
4124 h
->stub_cache
= stub_entry
;
4132 /* Find or create a stub section. Returns a pointer to the stub section, and
4133 the section to which the stub section will be attached (in *LINK_SEC_P).
4134 LINK_SEC_P may be NULL. */
4137 elf32_arm_create_or_find_stub_sec (asection
**link_sec_p
, asection
*section
,
4138 struct elf32_arm_link_hash_table
*htab
)
4143 link_sec
= htab
->stub_group
[section
->id
].link_sec
;
4144 BFD_ASSERT (link_sec
!= NULL
);
4145 stub_sec
= htab
->stub_group
[section
->id
].stub_sec
;
4147 if (stub_sec
== NULL
)
4149 stub_sec
= htab
->stub_group
[link_sec
->id
].stub_sec
;
4150 if (stub_sec
== NULL
)
4156 namelen
= strlen (link_sec
->name
);
4157 len
= namelen
+ sizeof (STUB_SUFFIX
);
4158 s_name
= (char *) bfd_alloc (htab
->stub_bfd
, len
);
4162 memcpy (s_name
, link_sec
->name
, namelen
);
4163 memcpy (s_name
+ namelen
, STUB_SUFFIX
, sizeof (STUB_SUFFIX
));
4164 stub_sec
= (*htab
->add_stub_section
) (s_name
, link_sec
,
4165 htab
->nacl_p
? 4 : 3);
4166 if (stub_sec
== NULL
)
4168 htab
->stub_group
[link_sec
->id
].stub_sec
= stub_sec
;
4170 htab
->stub_group
[section
->id
].stub_sec
= stub_sec
;
4174 *link_sec_p
= link_sec
;
4179 /* Add a new stub entry to the stub hash. Not all fields of the new
4180 stub entry are initialised. */
4182 static struct elf32_arm_stub_hash_entry
*
4183 elf32_arm_add_stub (const char *stub_name
,
4185 struct elf32_arm_link_hash_table
*htab
)
4189 struct elf32_arm_stub_hash_entry
*stub_entry
;
4191 stub_sec
= elf32_arm_create_or_find_stub_sec (&link_sec
, section
, htab
);
4192 if (stub_sec
== NULL
)
4195 /* Enter this entry into the linker stub hash table. */
4196 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
, stub_name
,
4198 if (stub_entry
== NULL
)
4200 (*_bfd_error_handler
) (_("%s: cannot create stub entry %s"),
4206 stub_entry
->stub_sec
= stub_sec
;
4207 stub_entry
->stub_offset
= 0;
4208 stub_entry
->id_sec
= link_sec
;
4213 /* Store an Arm insn into an output section not processed by
4214 elf32_arm_write_section. */
4217 put_arm_insn (struct elf32_arm_link_hash_table
* htab
,
4218 bfd
* output_bfd
, bfd_vma val
, void * ptr
)
4220 if (htab
->byteswap_code
!= bfd_little_endian (output_bfd
))
4221 bfd_putl32 (val
, ptr
);
4223 bfd_putb32 (val
, ptr
);
4226 /* Store a 16-bit Thumb insn into an output section not processed by
4227 elf32_arm_write_section. */
4230 put_thumb_insn (struct elf32_arm_link_hash_table
* htab
,
4231 bfd
* output_bfd
, bfd_vma val
, void * ptr
)
4233 if (htab
->byteswap_code
!= bfd_little_endian (output_bfd
))
4234 bfd_putl16 (val
, ptr
);
4236 bfd_putb16 (val
, ptr
);
4239 /* Store a Thumb2 insn into an output section not processed by
4240 elf32_arm_write_section. */
4243 put_thumb2_insn (struct elf32_arm_link_hash_table
* htab
,
4244 bfd
* output_bfd
, bfd_vma val
, void * ptr
)
4246 /* T2 instructions are 16-bit streamed. */
4247 if (htab
->byteswap_code
!= bfd_little_endian (output_bfd
))
4249 bfd_putl16 ((val
>> 16) & 0xffff, ptr
);
4250 bfd_putl16 ((val
& 0xffff), ptr
+ 2);
4254 bfd_putb16 ((val
>> 16) & 0xffff, ptr
);
4255 bfd_putb16 ((val
& 0xffff), ptr
+ 2);
4259 /* If it's possible to change R_TYPE to a more efficient access
4260 model, return the new reloc type. */
4263 elf32_arm_tls_transition (struct bfd_link_info
*info
, int r_type
,
4264 struct elf_link_hash_entry
*h
)
4266 int is_local
= (h
== NULL
);
4268 if (bfd_link_pic (info
)
4269 || (h
&& h
->root
.type
== bfd_link_hash_undefweak
))
4272 /* We do not support relaxations for Old TLS models. */
4275 case R_ARM_TLS_GOTDESC
:
4276 case R_ARM_TLS_CALL
:
4277 case R_ARM_THM_TLS_CALL
:
4278 case R_ARM_TLS_DESCSEQ
:
4279 case R_ARM_THM_TLS_DESCSEQ
:
4280 return is_local
? R_ARM_TLS_LE32
: R_ARM_TLS_IE32
;
4286 static bfd_reloc_status_type elf32_arm_final_link_relocate
4287 (reloc_howto_type
*, bfd
*, bfd
*, asection
*, bfd_byte
*,
4288 Elf_Internal_Rela
*, bfd_vma
, struct bfd_link_info
*, asection
*,
4289 const char *, unsigned char, enum arm_st_branch_type
,
4290 struct elf_link_hash_entry
*, bfd_boolean
*, char **);
4293 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type
)
4297 case arm_stub_a8_veneer_b_cond
:
4298 case arm_stub_a8_veneer_b
:
4299 case arm_stub_a8_veneer_bl
:
4302 case arm_stub_long_branch_any_any
:
4303 case arm_stub_long_branch_v4t_arm_thumb
:
4304 case arm_stub_long_branch_thumb_only
:
4305 case arm_stub_long_branch_v4t_thumb_thumb
:
4306 case arm_stub_long_branch_v4t_thumb_arm
:
4307 case arm_stub_short_branch_v4t_thumb_arm
:
4308 case arm_stub_long_branch_any_arm_pic
:
4309 case arm_stub_long_branch_any_thumb_pic
:
4310 case arm_stub_long_branch_v4t_thumb_thumb_pic
:
4311 case arm_stub_long_branch_v4t_arm_thumb_pic
:
4312 case arm_stub_long_branch_v4t_thumb_arm_pic
:
4313 case arm_stub_long_branch_thumb_only_pic
:
4314 case arm_stub_long_branch_any_tls_pic
:
4315 case arm_stub_long_branch_v4t_thumb_tls_pic
:
4316 case arm_stub_a8_veneer_blx
:
4319 case arm_stub_long_branch_arm_nacl
:
4320 case arm_stub_long_branch_arm_nacl_pic
:
4324 abort (); /* Should be unreachable. */
4329 arm_build_one_stub (struct bfd_hash_entry
*gen_entry
,
4333 struct elf32_arm_stub_hash_entry
*stub_entry
;
4334 struct elf32_arm_link_hash_table
*globals
;
4335 struct bfd_link_info
*info
;
4342 const insn_sequence
*template_sequence
;
4344 int stub_reloc_idx
[MAXRELOCS
] = {-1, -1};
4345 int stub_reloc_offset
[MAXRELOCS
] = {0, 0};
4348 /* Massage our args to the form they really have. */
4349 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
4350 info
= (struct bfd_link_info
*) in_arg
;
4352 globals
= elf32_arm_hash_table (info
);
4353 if (globals
== NULL
)
4356 stub_sec
= stub_entry
->stub_sec
;
4358 if ((globals
->fix_cortex_a8
< 0)
4359 != (arm_stub_required_alignment (stub_entry
->stub_type
) == 2))
4360 /* We have to do less-strictly-aligned fixes last. */
4363 /* Make a note of the offset within the stubs for this entry. */
4364 stub_entry
->stub_offset
= stub_sec
->size
;
4365 loc
= stub_sec
->contents
+ stub_entry
->stub_offset
;
4367 stub_bfd
= stub_sec
->owner
;
4369 /* This is the address of the stub destination. */
4370 sym_value
= (stub_entry
->target_value
4371 + stub_entry
->target_section
->output_offset
4372 + stub_entry
->target_section
->output_section
->vma
);
4374 template_sequence
= stub_entry
->stub_template
;
4375 template_size
= stub_entry
->stub_template_size
;
4378 for (i
= 0; i
< template_size
; i
++)
4380 switch (template_sequence
[i
].type
)
4384 bfd_vma data
= (bfd_vma
) template_sequence
[i
].data
;
4385 if (template_sequence
[i
].reloc_addend
!= 0)
4387 /* We've borrowed the reloc_addend field to mean we should
4388 insert a condition code into this (Thumb-1 branch)
4389 instruction. See THUMB16_BCOND_INSN. */
4390 BFD_ASSERT ((data
& 0xff00) == 0xd000);
4391 data
|= ((stub_entry
->orig_insn
>> 22) & 0xf) << 8;
4393 bfd_put_16 (stub_bfd
, data
, loc
+ size
);
4399 bfd_put_16 (stub_bfd
,
4400 (template_sequence
[i
].data
>> 16) & 0xffff,
4402 bfd_put_16 (stub_bfd
, template_sequence
[i
].data
& 0xffff,
4404 if (template_sequence
[i
].r_type
!= R_ARM_NONE
)
4406 stub_reloc_idx
[nrelocs
] = i
;
4407 stub_reloc_offset
[nrelocs
++] = size
;
4413 bfd_put_32 (stub_bfd
, template_sequence
[i
].data
,
4415 /* Handle cases where the target is encoded within the
4417 if (template_sequence
[i
].r_type
== R_ARM_JUMP24
)
4419 stub_reloc_idx
[nrelocs
] = i
;
4420 stub_reloc_offset
[nrelocs
++] = size
;
4426 bfd_put_32 (stub_bfd
, template_sequence
[i
].data
, loc
+ size
);
4427 stub_reloc_idx
[nrelocs
] = i
;
4428 stub_reloc_offset
[nrelocs
++] = size
;
4438 stub_sec
->size
+= size
;
4440 /* Stub size has already been computed in arm_size_one_stub. Check
4442 BFD_ASSERT (size
== stub_entry
->stub_size
);
4444 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
4445 if (stub_entry
->branch_type
== ST_BRANCH_TO_THUMB
)
4448 /* Assume there is at least one and at most MAXRELOCS entries to relocate
4450 BFD_ASSERT (nrelocs
!= 0 && nrelocs
<= MAXRELOCS
);
4452 for (i
= 0; i
< nrelocs
; i
++)
4453 if (template_sequence
[stub_reloc_idx
[i
]].r_type
== R_ARM_THM_JUMP24
4454 || template_sequence
[stub_reloc_idx
[i
]].r_type
== R_ARM_THM_JUMP19
4455 || template_sequence
[stub_reloc_idx
[i
]].r_type
== R_ARM_THM_CALL
4456 || template_sequence
[stub_reloc_idx
[i
]].r_type
== R_ARM_THM_XPC22
)
4458 Elf_Internal_Rela rel
;
4459 bfd_boolean unresolved_reloc
;
4460 char *error_message
;
4461 enum arm_st_branch_type branch_type
4462 = (template_sequence
[stub_reloc_idx
[i
]].r_type
!= R_ARM_THM_XPC22
4463 ? ST_BRANCH_TO_THUMB
: ST_BRANCH_TO_ARM
);
4464 bfd_vma points_to
= sym_value
+ stub_entry
->target_addend
;
4466 rel
.r_offset
= stub_entry
->stub_offset
+ stub_reloc_offset
[i
];
4467 rel
.r_info
= ELF32_R_INFO (0,
4468 template_sequence
[stub_reloc_idx
[i
]].r_type
);
4469 rel
.r_addend
= template_sequence
[stub_reloc_idx
[i
]].reloc_addend
;
4471 if (stub_entry
->stub_type
== arm_stub_a8_veneer_b_cond
&& i
== 0)
4472 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
4473 template should refer back to the instruction after the original
4475 points_to
= sym_value
;
4477 /* There may be unintended consequences if this is not true. */
4478 BFD_ASSERT (stub_entry
->h
== NULL
);
4480 /* Note: _bfd_final_link_relocate doesn't handle these relocations
4481 properly. We should probably use this function unconditionally,
4482 rather than only for certain relocations listed in the enclosing
4483 conditional, for the sake of consistency. */
4484 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4485 (template_sequence
[stub_reloc_idx
[i
]].r_type
),
4486 stub_bfd
, info
->output_bfd
, stub_sec
, stub_sec
->contents
, &rel
,
4487 points_to
, info
, stub_entry
->target_section
, "", STT_FUNC
,
4488 branch_type
, (struct elf_link_hash_entry
*) stub_entry
->h
,
4489 &unresolved_reloc
, &error_message
);
4493 Elf_Internal_Rela rel
;
4494 bfd_boolean unresolved_reloc
;
4495 char *error_message
;
4496 bfd_vma points_to
= sym_value
+ stub_entry
->target_addend
4497 + template_sequence
[stub_reloc_idx
[i
]].reloc_addend
;
4499 rel
.r_offset
= stub_entry
->stub_offset
+ stub_reloc_offset
[i
];
4500 rel
.r_info
= ELF32_R_INFO (0,
4501 template_sequence
[stub_reloc_idx
[i
]].r_type
);
4504 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4505 (template_sequence
[stub_reloc_idx
[i
]].r_type
),
4506 stub_bfd
, info
->output_bfd
, stub_sec
, stub_sec
->contents
, &rel
,
4507 points_to
, info
, stub_entry
->target_section
, "", STT_FUNC
,
4508 stub_entry
->branch_type
,
4509 (struct elf_link_hash_entry
*) stub_entry
->h
, &unresolved_reloc
,
4517 /* Calculate the template, template size and instruction size for a stub.
4518 Return value is the instruction size. */
4521 find_stub_size_and_template (enum elf32_arm_stub_type stub_type
,
4522 const insn_sequence
**stub_template
,
4523 int *stub_template_size
)
4525 const insn_sequence
*template_sequence
= NULL
;
4526 int template_size
= 0, i
;
4529 template_sequence
= stub_definitions
[stub_type
].template_sequence
;
4531 *stub_template
= template_sequence
;
4533 template_size
= stub_definitions
[stub_type
].template_size
;
4534 if (stub_template_size
)
4535 *stub_template_size
= template_size
;
4538 for (i
= 0; i
< template_size
; i
++)
4540 switch (template_sequence
[i
].type
)
4561 /* As above, but don't actually build the stub. Just bump offset so
4562 we know stub section sizes. */
4565 arm_size_one_stub (struct bfd_hash_entry
*gen_entry
,
4566 void *in_arg ATTRIBUTE_UNUSED
)
4568 struct elf32_arm_stub_hash_entry
*stub_entry
;
4569 const insn_sequence
*template_sequence
;
4570 int template_size
, size
;
4572 /* Massage our args to the form they really have. */
4573 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
4575 BFD_ASSERT((stub_entry
->stub_type
> arm_stub_none
)
4576 && stub_entry
->stub_type
< ARRAY_SIZE(stub_definitions
));
4578 size
= find_stub_size_and_template (stub_entry
->stub_type
, &template_sequence
,
4581 stub_entry
->stub_size
= size
;
4582 stub_entry
->stub_template
= template_sequence
;
4583 stub_entry
->stub_template_size
= template_size
;
4585 size
= (size
+ 7) & ~7;
4586 stub_entry
->stub_sec
->size
+= size
;
4591 /* External entry points for sizing and building linker stubs. */
4593 /* Set up various things so that we can make a list of input sections
4594 for each output section included in the link. Returns -1 on error,
4595 0 when no stubs will be needed, and 1 on success. */
4598 elf32_arm_setup_section_lists (bfd
*output_bfd
,
4599 struct bfd_link_info
*info
)
4602 unsigned int bfd_count
;
4603 unsigned int top_id
, top_index
;
4605 asection
**input_list
, **list
;
4607 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
4611 if (! is_elf_hash_table (htab
))
4614 /* Count the number of input BFDs and find the top input section id. */
4615 for (input_bfd
= info
->input_bfds
, bfd_count
= 0, top_id
= 0;
4617 input_bfd
= input_bfd
->link
.next
)
4620 for (section
= input_bfd
->sections
;
4622 section
= section
->next
)
4624 if (top_id
< section
->id
)
4625 top_id
= section
->id
;
4628 htab
->bfd_count
= bfd_count
;
4630 amt
= sizeof (struct map_stub
) * (top_id
+ 1);
4631 htab
->stub_group
= (struct map_stub
*) bfd_zmalloc (amt
);
4632 if (htab
->stub_group
== NULL
)
4634 htab
->top_id
= top_id
;
4636 /* We can't use output_bfd->section_count here to find the top output
4637 section index as some sections may have been removed, and
4638 _bfd_strip_section_from_output doesn't renumber the indices. */
4639 for (section
= output_bfd
->sections
, top_index
= 0;
4641 section
= section
->next
)
4643 if (top_index
< section
->index
)
4644 top_index
= section
->index
;
4647 htab
->top_index
= top_index
;
4648 amt
= sizeof (asection
*) * (top_index
+ 1);
4649 input_list
= (asection
**) bfd_malloc (amt
);
4650 htab
->input_list
= input_list
;
4651 if (input_list
== NULL
)
4654 /* For sections we aren't interested in, mark their entries with a
4655 value we can check later. */
4656 list
= input_list
+ top_index
;
4658 *list
= bfd_abs_section_ptr
;
4659 while (list
-- != input_list
);
4661 for (section
= output_bfd
->sections
;
4663 section
= section
->next
)
4665 if ((section
->flags
& SEC_CODE
) != 0)
4666 input_list
[section
->index
] = NULL
;
4672 /* The linker repeatedly calls this function for each input section,
4673 in the order that input sections are linked into output sections.
4674 Build lists of input sections to determine groupings between which
4675 we may insert linker stubs. */
4678 elf32_arm_next_input_section (struct bfd_link_info
*info
,
4681 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
4686 if (isec
->output_section
->index
<= htab
->top_index
)
4688 asection
**list
= htab
->input_list
+ isec
->output_section
->index
;
4690 if (*list
!= bfd_abs_section_ptr
&& (isec
->flags
& SEC_CODE
) != 0)
4692 /* Steal the link_sec pointer for our list. */
4693 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
4694 /* This happens to make the list in reverse order,
4695 which we reverse later. */
4696 PREV_SEC (isec
) = *list
;
4702 /* See whether we can group stub sections together. Grouping stub
4703 sections may result in fewer stubs. More importantly, we need to
4704 put all .init* and .fini* stubs at the end of the .init or
4705 .fini output sections respectively, because glibc splits the
4706 _init and _fini functions into multiple parts. Putting a stub in
4707 the middle of a function is not a good idea. */
4710 group_sections (struct elf32_arm_link_hash_table
*htab
,
4711 bfd_size_type stub_group_size
,
4712 bfd_boolean stubs_always_after_branch
)
4714 asection
**list
= htab
->input_list
;
4718 asection
*tail
= *list
;
4721 if (tail
== bfd_abs_section_ptr
)
4724 /* Reverse the list: we must avoid placing stubs at the
4725 beginning of the section because the beginning of the text
4726 section may be required for an interrupt vector in bare metal
4728 #define NEXT_SEC PREV_SEC
4730 while (tail
!= NULL
)
4732 /* Pop from tail. */
4733 asection
*item
= tail
;
4734 tail
= PREV_SEC (item
);
4737 NEXT_SEC (item
) = head
;
4741 while (head
!= NULL
)
4745 bfd_vma stub_group_start
= head
->output_offset
;
4746 bfd_vma end_of_next
;
4749 while (NEXT_SEC (curr
) != NULL
)
4751 next
= NEXT_SEC (curr
);
4752 end_of_next
= next
->output_offset
+ next
->size
;
4753 if (end_of_next
- stub_group_start
>= stub_group_size
)
4754 /* End of NEXT is too far from start, so stop. */
4756 /* Add NEXT to the group. */
4760 /* OK, the size from the start to the start of CURR is less
4761 than stub_group_size and thus can be handled by one stub
4762 section. (Or the head section is itself larger than
4763 stub_group_size, in which case we may be toast.)
4764 We should really be keeping track of the total size of
4765 stubs added here, as stubs contribute to the final output
4769 next
= NEXT_SEC (head
);
4770 /* Set up this stub group. */
4771 htab
->stub_group
[head
->id
].link_sec
= curr
;
4773 while (head
!= curr
&& (head
= next
) != NULL
);
4775 /* But wait, there's more! Input sections up to stub_group_size
4776 bytes after the stub section can be handled by it too. */
4777 if (!stubs_always_after_branch
)
4779 stub_group_start
= curr
->output_offset
+ curr
->size
;
4781 while (next
!= NULL
)
4783 end_of_next
= next
->output_offset
+ next
->size
;
4784 if (end_of_next
- stub_group_start
>= stub_group_size
)
4785 /* End of NEXT is too far from stubs, so stop. */
4787 /* Add NEXT to the stub group. */
4789 next
= NEXT_SEC (head
);
4790 htab
->stub_group
[head
->id
].link_sec
= curr
;
4796 while (list
++ != htab
->input_list
+ htab
->top_index
);
4798 free (htab
->input_list
);
4803 /* Comparison function for sorting/searching relocations relating to Cortex-A8
4807 a8_reloc_compare (const void *a
, const void *b
)
4809 const struct a8_erratum_reloc
*ra
= (const struct a8_erratum_reloc
*) a
;
4810 const struct a8_erratum_reloc
*rb
= (const struct a8_erratum_reloc
*) b
;
4812 if (ra
->from
< rb
->from
)
4814 else if (ra
->from
> rb
->from
)
4820 static struct elf_link_hash_entry
*find_thumb_glue (struct bfd_link_info
*,
4821 const char *, char **);
4823 /* Helper function to scan code for sequences which might trigger the Cortex-A8
4824 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
4825 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
4829 cortex_a8_erratum_scan (bfd
*input_bfd
,
4830 struct bfd_link_info
*info
,
4831 struct a8_erratum_fix
**a8_fixes_p
,
4832 unsigned int *num_a8_fixes_p
,
4833 unsigned int *a8_fix_table_size_p
,
4834 struct a8_erratum_reloc
*a8_relocs
,
4835 unsigned int num_a8_relocs
,
4836 unsigned prev_num_a8_fixes
,
4837 bfd_boolean
*stub_changed_p
)
4840 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
4841 struct a8_erratum_fix
*a8_fixes
= *a8_fixes_p
;
4842 unsigned int num_a8_fixes
= *num_a8_fixes_p
;
4843 unsigned int a8_fix_table_size
= *a8_fix_table_size_p
;
4848 for (section
= input_bfd
->sections
;
4850 section
= section
->next
)
4852 bfd_byte
*contents
= NULL
;
4853 struct _arm_elf_section_data
*sec_data
;
4857 if (elf_section_type (section
) != SHT_PROGBITS
4858 || (elf_section_flags (section
) & SHF_EXECINSTR
) == 0
4859 || (section
->flags
& SEC_EXCLUDE
) != 0
4860 || (section
->sec_info_type
== SEC_INFO_TYPE_JUST_SYMS
)
4861 || (section
->output_section
== bfd_abs_section_ptr
))
4864 base_vma
= section
->output_section
->vma
+ section
->output_offset
;
4866 if (elf_section_data (section
)->this_hdr
.contents
!= NULL
)
4867 contents
= elf_section_data (section
)->this_hdr
.contents
;
4868 else if (! bfd_malloc_and_get_section (input_bfd
, section
, &contents
))
4871 sec_data
= elf32_arm_section_data (section
);
4873 for (span
= 0; span
< sec_data
->mapcount
; span
++)
4875 unsigned int span_start
= sec_data
->map
[span
].vma
;
4876 unsigned int span_end
= (span
== sec_data
->mapcount
- 1)
4877 ? section
->size
: sec_data
->map
[span
+ 1].vma
;
4879 char span_type
= sec_data
->map
[span
].type
;
4880 bfd_boolean last_was_32bit
= FALSE
, last_was_branch
= FALSE
;
4882 if (span_type
!= 't')
4885 /* Span is entirely within a single 4KB region: skip scanning. */
4886 if (((base_vma
+ span_start
) & ~0xfff)
4887 == ((base_vma
+ span_end
) & ~0xfff))
4890 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
4892 * The opcode is BLX.W, BL.W, B.W, Bcc.W
4893 * The branch target is in the same 4KB region as the
4894 first half of the branch.
4895 * The instruction before the branch is a 32-bit
4896 length non-branch instruction. */
4897 for (i
= span_start
; i
< span_end
;)
4899 unsigned int insn
= bfd_getl16 (&contents
[i
]);
4900 bfd_boolean insn_32bit
= FALSE
, is_blx
= FALSE
, is_b
= FALSE
;
4901 bfd_boolean is_bl
= FALSE
, is_bcc
= FALSE
, is_32bit_branch
;
4903 if ((insn
& 0xe000) == 0xe000 && (insn
& 0x1800) != 0x0000)
4908 /* Load the rest of the insn (in manual-friendly order). */
4909 insn
= (insn
<< 16) | bfd_getl16 (&contents
[i
+ 2]);
4911 /* Encoding T4: B<c>.W. */
4912 is_b
= (insn
& 0xf800d000) == 0xf0009000;
4913 /* Encoding T1: BL<c>.W. */
4914 is_bl
= (insn
& 0xf800d000) == 0xf000d000;
4915 /* Encoding T2: BLX<c>.W. */
4916 is_blx
= (insn
& 0xf800d000) == 0xf000c000;
4917 /* Encoding T3: B<c>.W (not permitted in IT block). */
4918 is_bcc
= (insn
& 0xf800d000) == 0xf0008000
4919 && (insn
& 0x07f00000) != 0x03800000;
4922 is_32bit_branch
= is_b
|| is_bl
|| is_blx
|| is_bcc
;
4924 if (((base_vma
+ i
) & 0xfff) == 0xffe
4928 && ! last_was_branch
)
4930 bfd_signed_vma offset
= 0;
4931 bfd_boolean force_target_arm
= FALSE
;
4932 bfd_boolean force_target_thumb
= FALSE
;
4934 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
4935 struct a8_erratum_reloc key
, *found
;
4936 bfd_boolean use_plt
= FALSE
;
4938 key
.from
= base_vma
+ i
;
4939 found
= (struct a8_erratum_reloc
*)
4940 bsearch (&key
, a8_relocs
, num_a8_relocs
,
4941 sizeof (struct a8_erratum_reloc
),
4946 char *error_message
= NULL
;
4947 struct elf_link_hash_entry
*entry
;
4949 /* We don't care about the error returned from this
4950 function, only if there is glue or not. */
4951 entry
= find_thumb_glue (info
, found
->sym_name
,
4955 found
->non_a8_stub
= TRUE
;
4957 /* Keep a simpler condition, for the sake of clarity. */
4958 if (htab
->root
.splt
!= NULL
&& found
->hash
!= NULL
4959 && found
->hash
->root
.plt
.offset
!= (bfd_vma
) -1)
4962 if (found
->r_type
== R_ARM_THM_CALL
)
4964 if (found
->branch_type
== ST_BRANCH_TO_ARM
4966 force_target_arm
= TRUE
;
4968 force_target_thumb
= TRUE
;
4972 /* Check if we have an offending branch instruction. */
4974 if (found
&& found
->non_a8_stub
)
4975 /* We've already made a stub for this instruction, e.g.
4976 it's a long branch or a Thumb->ARM stub. Assume that
4977 stub will suffice to work around the A8 erratum (see
4978 setting of always_after_branch above). */
4982 offset
= (insn
& 0x7ff) << 1;
4983 offset
|= (insn
& 0x3f0000) >> 4;
4984 offset
|= (insn
& 0x2000) ? 0x40000 : 0;
4985 offset
|= (insn
& 0x800) ? 0x80000 : 0;
4986 offset
|= (insn
& 0x4000000) ? 0x100000 : 0;
4987 if (offset
& 0x100000)
4988 offset
|= ~ ((bfd_signed_vma
) 0xfffff);
4989 stub_type
= arm_stub_a8_veneer_b_cond
;
4991 else if (is_b
|| is_bl
|| is_blx
)
4993 int s
= (insn
& 0x4000000) != 0;
4994 int j1
= (insn
& 0x2000) != 0;
4995 int j2
= (insn
& 0x800) != 0;
4999 offset
= (insn
& 0x7ff) << 1;
5000 offset
|= (insn
& 0x3ff0000) >> 4;
5004 if (offset
& 0x1000000)
5005 offset
|= ~ ((bfd_signed_vma
) 0xffffff);
5008 offset
&= ~ ((bfd_signed_vma
) 3);
5010 stub_type
= is_blx
? arm_stub_a8_veneer_blx
:
5011 is_bl
? arm_stub_a8_veneer_bl
: arm_stub_a8_veneer_b
;
5014 if (stub_type
!= arm_stub_none
)
5016 bfd_vma pc_for_insn
= base_vma
+ i
+ 4;
5018 /* The original instruction is a BL, but the target is
5019 an ARM instruction. If we were not making a stub,
5020 the BL would have been converted to a BLX. Use the
5021 BLX stub instead in that case. */
5022 if (htab
->use_blx
&& force_target_arm
5023 && stub_type
== arm_stub_a8_veneer_bl
)
5025 stub_type
= arm_stub_a8_veneer_blx
;
5029 /* Conversely, if the original instruction was
5030 BLX but the target is Thumb mode, use the BL
5032 else if (force_target_thumb
5033 && stub_type
== arm_stub_a8_veneer_blx
)
5035 stub_type
= arm_stub_a8_veneer_bl
;
5041 pc_for_insn
&= ~ ((bfd_vma
) 3);
5043 /* If we found a relocation, use the proper destination,
5044 not the offset in the (unrelocated) instruction.
5045 Note this is always done if we switched the stub type
5049 (bfd_signed_vma
) (found
->destination
- pc_for_insn
);
5051 /* If the stub will use a Thumb-mode branch to a
5052 PLT target, redirect it to the preceding Thumb
5054 if (stub_type
!= arm_stub_a8_veneer_blx
&& use_plt
)
5055 offset
-= PLT_THUMB_STUB_SIZE
;
5057 target
= pc_for_insn
+ offset
;
5059 /* The BLX stub is ARM-mode code. Adjust the offset to
5060 take the different PC value (+8 instead of +4) into
5062 if (stub_type
== arm_stub_a8_veneer_blx
)
5065 if (((base_vma
+ i
) & ~0xfff) == (target
& ~0xfff))
5067 char *stub_name
= NULL
;
5069 if (num_a8_fixes
== a8_fix_table_size
)
5071 a8_fix_table_size
*= 2;
5072 a8_fixes
= (struct a8_erratum_fix
*)
5073 bfd_realloc (a8_fixes
,
5074 sizeof (struct a8_erratum_fix
)
5075 * a8_fix_table_size
);
5078 if (num_a8_fixes
< prev_num_a8_fixes
)
5080 /* If we're doing a subsequent scan,
5081 check if we've found the same fix as
5082 before, and try and reuse the stub
5084 stub_name
= a8_fixes
[num_a8_fixes
].stub_name
;
5085 if ((a8_fixes
[num_a8_fixes
].section
!= section
)
5086 || (a8_fixes
[num_a8_fixes
].offset
!= i
))
5090 *stub_changed_p
= TRUE
;
5096 stub_name
= (char *) bfd_malloc (8 + 1 + 8 + 1);
5097 if (stub_name
!= NULL
)
5098 sprintf (stub_name
, "%x:%x", section
->id
, i
);
5101 a8_fixes
[num_a8_fixes
].input_bfd
= input_bfd
;
5102 a8_fixes
[num_a8_fixes
].section
= section
;
5103 a8_fixes
[num_a8_fixes
].offset
= i
;
5104 a8_fixes
[num_a8_fixes
].addend
= offset
;
5105 a8_fixes
[num_a8_fixes
].orig_insn
= insn
;
5106 a8_fixes
[num_a8_fixes
].stub_name
= stub_name
;
5107 a8_fixes
[num_a8_fixes
].stub_type
= stub_type
;
5108 a8_fixes
[num_a8_fixes
].branch_type
=
5109 is_blx
? ST_BRANCH_TO_ARM
: ST_BRANCH_TO_THUMB
;
5116 i
+= insn_32bit
? 4 : 2;
5117 last_was_32bit
= insn_32bit
;
5118 last_was_branch
= is_32bit_branch
;
5122 if (elf_section_data (section
)->this_hdr
.contents
== NULL
)
5126 *a8_fixes_p
= a8_fixes
;
5127 *num_a8_fixes_p
= num_a8_fixes
;
5128 *a8_fix_table_size_p
= a8_fix_table_size
;
5133 /* Determine and set the size of the stub section for a final link.
5135 The basic idea here is to examine all the relocations looking for
5136 PC-relative calls to a target that is unreachable with a "bl"
5140 elf32_arm_size_stubs (bfd
*output_bfd
,
5142 struct bfd_link_info
*info
,
5143 bfd_signed_vma group_size
,
5144 asection
* (*add_stub_section
) (const char *, asection
*,
5146 void (*layout_sections_again
) (void))
5148 bfd_size_type stub_group_size
;
5149 bfd_boolean stubs_always_after_branch
;
5150 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
5151 struct a8_erratum_fix
*a8_fixes
= NULL
;
5152 unsigned int num_a8_fixes
= 0, a8_fix_table_size
= 10;
5153 struct a8_erratum_reloc
*a8_relocs
= NULL
;
5154 unsigned int num_a8_relocs
= 0, a8_reloc_table_size
= 10, i
;
5159 if (htab
->fix_cortex_a8
)
5161 a8_fixes
= (struct a8_erratum_fix
*)
5162 bfd_zmalloc (sizeof (struct a8_erratum_fix
) * a8_fix_table_size
);
5163 a8_relocs
= (struct a8_erratum_reloc
*)
5164 bfd_zmalloc (sizeof (struct a8_erratum_reloc
) * a8_reloc_table_size
);
5167 /* Propagate mach to stub bfd, because it may not have been
5168 finalized when we created stub_bfd. */
5169 bfd_set_arch_mach (stub_bfd
, bfd_get_arch (output_bfd
),
5170 bfd_get_mach (output_bfd
));
5172 /* Stash our params away. */
5173 htab
->stub_bfd
= stub_bfd
;
5174 htab
->add_stub_section
= add_stub_section
;
5175 htab
->layout_sections_again
= layout_sections_again
;
5176 stubs_always_after_branch
= group_size
< 0;
5178 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
5179 as the first half of a 32-bit branch straddling two 4K pages. This is a
5180 crude way of enforcing that. */
5181 if (htab
->fix_cortex_a8
)
5182 stubs_always_after_branch
= 1;
5185 stub_group_size
= -group_size
;
5187 stub_group_size
= group_size
;
5189 if (stub_group_size
== 1)
5191 /* Default values. */
5192 /* Thumb branch range is +-4MB has to be used as the default
5193 maximum size (a given section can contain both ARM and Thumb
5194 code, so the worst case has to be taken into account).
5196 This value is 24K less than that, which allows for 2025
5197 12-byte stubs. If we exceed that, then we will fail to link.
5198 The user will have to relink with an explicit group size
5200 stub_group_size
= 4170000;
5203 group_sections (htab
, stub_group_size
, stubs_always_after_branch
);
5205 /* If we're applying the cortex A8 fix, we need to determine the
5206 program header size now, because we cannot change it later --
5207 that could alter section placements. Notice the A8 erratum fix
5208 ends up requiring the section addresses to remain unchanged
5209 modulo the page size. That's something we cannot represent
5210 inside BFD, and we don't want to force the section alignment to
5211 be the page size. */
5212 if (htab
->fix_cortex_a8
)
5213 (*htab
->layout_sections_again
) ();
5218 unsigned int bfd_indx
;
5220 bfd_boolean stub_changed
= FALSE
;
5221 unsigned prev_num_a8_fixes
= num_a8_fixes
;
5224 for (input_bfd
= info
->input_bfds
, bfd_indx
= 0;
5226 input_bfd
= input_bfd
->link
.next
, bfd_indx
++)
5228 Elf_Internal_Shdr
*symtab_hdr
;
5230 Elf_Internal_Sym
*local_syms
= NULL
;
5232 if (!is_arm_elf (input_bfd
))
5237 /* We'll need the symbol table in a second. */
5238 symtab_hdr
= &elf_tdata (input_bfd
)->symtab_hdr
;
5239 if (symtab_hdr
->sh_info
== 0)
5242 /* Walk over each section attached to the input bfd. */
5243 for (section
= input_bfd
->sections
;
5245 section
= section
->next
)
5247 Elf_Internal_Rela
*internal_relocs
, *irelaend
, *irela
;
5249 /* If there aren't any relocs, then there's nothing more
5251 if ((section
->flags
& SEC_RELOC
) == 0
5252 || section
->reloc_count
== 0
5253 || (section
->flags
& SEC_CODE
) == 0)
5256 /* If this section is a link-once section that will be
5257 discarded, then don't create any stubs. */
5258 if (section
->output_section
== NULL
5259 || section
->output_section
->owner
!= output_bfd
)
5262 /* Get the relocs. */
5264 = _bfd_elf_link_read_relocs (input_bfd
, section
, NULL
,
5265 NULL
, info
->keep_memory
);
5266 if (internal_relocs
== NULL
)
5267 goto error_ret_free_local
;
5269 /* Now examine each relocation. */
5270 irela
= internal_relocs
;
5271 irelaend
= irela
+ section
->reloc_count
;
5272 for (; irela
< irelaend
; irela
++)
5274 unsigned int r_type
, r_indx
;
5275 enum elf32_arm_stub_type stub_type
;
5276 struct elf32_arm_stub_hash_entry
*stub_entry
;
5279 bfd_vma destination
;
5280 struct elf32_arm_link_hash_entry
*hash
;
5281 const char *sym_name
;
5283 const asection
*id_sec
;
5284 unsigned char st_type
;
5285 enum arm_st_branch_type branch_type
;
5286 bfd_boolean created_stub
= FALSE
;
5288 r_type
= ELF32_R_TYPE (irela
->r_info
);
5289 r_indx
= ELF32_R_SYM (irela
->r_info
);
5291 if (r_type
>= (unsigned int) R_ARM_max
)
5293 bfd_set_error (bfd_error_bad_value
);
5294 error_ret_free_internal
:
5295 if (elf_section_data (section
)->relocs
== NULL
)
5296 free (internal_relocs
);
5297 goto error_ret_free_local
;
5301 if (r_indx
>= symtab_hdr
->sh_info
)
5302 hash
= elf32_arm_hash_entry
5303 (elf_sym_hashes (input_bfd
)
5304 [r_indx
- symtab_hdr
->sh_info
]);
5306 /* Only look for stubs on branch instructions, or
5307 non-relaxed TLSCALL */
5308 if ((r_type
!= (unsigned int) R_ARM_CALL
)
5309 && (r_type
!= (unsigned int) R_ARM_THM_CALL
)
5310 && (r_type
!= (unsigned int) R_ARM_JUMP24
)
5311 && (r_type
!= (unsigned int) R_ARM_THM_JUMP19
)
5312 && (r_type
!= (unsigned int) R_ARM_THM_XPC22
)
5313 && (r_type
!= (unsigned int) R_ARM_THM_JUMP24
)
5314 && (r_type
!= (unsigned int) R_ARM_PLT32
)
5315 && !((r_type
== (unsigned int) R_ARM_TLS_CALL
5316 || r_type
== (unsigned int) R_ARM_THM_TLS_CALL
)
5317 && r_type
== elf32_arm_tls_transition
5318 (info
, r_type
, &hash
->root
)
5319 && ((hash
? hash
->tls_type
5320 : (elf32_arm_local_got_tls_type
5321 (input_bfd
)[r_indx
]))
5322 & GOT_TLS_GDESC
) != 0))
5325 /* Now determine the call target, its name, value,
5332 if (r_type
== (unsigned int) R_ARM_TLS_CALL
5333 || r_type
== (unsigned int) R_ARM_THM_TLS_CALL
)
5335 /* A non-relaxed TLS call. The target is the
5336 plt-resident trampoline and nothing to do
5338 BFD_ASSERT (htab
->tls_trampoline
> 0);
5339 sym_sec
= htab
->root
.splt
;
5340 sym_value
= htab
->tls_trampoline
;
5343 branch_type
= ST_BRANCH_TO_ARM
;
5347 /* It's a local symbol. */
5348 Elf_Internal_Sym
*sym
;
5350 if (local_syms
== NULL
)
5353 = (Elf_Internal_Sym
*) symtab_hdr
->contents
;
5354 if (local_syms
== NULL
)
5356 = bfd_elf_get_elf_syms (input_bfd
, symtab_hdr
,
5357 symtab_hdr
->sh_info
, 0,
5359 if (local_syms
== NULL
)
5360 goto error_ret_free_internal
;
5363 sym
= local_syms
+ r_indx
;
5364 if (sym
->st_shndx
== SHN_UNDEF
)
5365 sym_sec
= bfd_und_section_ptr
;
5366 else if (sym
->st_shndx
== SHN_ABS
)
5367 sym_sec
= bfd_abs_section_ptr
;
5368 else if (sym
->st_shndx
== SHN_COMMON
)
5369 sym_sec
= bfd_com_section_ptr
;
5372 bfd_section_from_elf_index (input_bfd
, sym
->st_shndx
);
5375 /* This is an undefined symbol. It can never
5379 if (ELF_ST_TYPE (sym
->st_info
) != STT_SECTION
)
5380 sym_value
= sym
->st_value
;
5381 destination
= (sym_value
+ irela
->r_addend
5382 + sym_sec
->output_offset
5383 + sym_sec
->output_section
->vma
);
5384 st_type
= ELF_ST_TYPE (sym
->st_info
);
5385 branch_type
= ARM_SYM_BRANCH_TYPE (sym
);
5387 = bfd_elf_string_from_elf_section (input_bfd
,
5388 symtab_hdr
->sh_link
,
5393 /* It's an external symbol. */
5394 while (hash
->root
.root
.type
== bfd_link_hash_indirect
5395 || hash
->root
.root
.type
== bfd_link_hash_warning
)
5396 hash
= ((struct elf32_arm_link_hash_entry
*)
5397 hash
->root
.root
.u
.i
.link
);
5399 if (hash
->root
.root
.type
== bfd_link_hash_defined
5400 || hash
->root
.root
.type
== bfd_link_hash_defweak
)
5402 sym_sec
= hash
->root
.root
.u
.def
.section
;
5403 sym_value
= hash
->root
.root
.u
.def
.value
;
5405 struct elf32_arm_link_hash_table
*globals
=
5406 elf32_arm_hash_table (info
);
5408 /* For a destination in a shared library,
5409 use the PLT stub as target address to
5410 decide whether a branch stub is
5413 && globals
->root
.splt
!= NULL
5415 && hash
->root
.plt
.offset
!= (bfd_vma
) -1)
5417 sym_sec
= globals
->root
.splt
;
5418 sym_value
= hash
->root
.plt
.offset
;
5419 if (sym_sec
->output_section
!= NULL
)
5420 destination
= (sym_value
5421 + sym_sec
->output_offset
5422 + sym_sec
->output_section
->vma
);
5424 else if (sym_sec
->output_section
!= NULL
)
5425 destination
= (sym_value
+ irela
->r_addend
5426 + sym_sec
->output_offset
5427 + sym_sec
->output_section
->vma
);
5429 else if ((hash
->root
.root
.type
== bfd_link_hash_undefined
)
5430 || (hash
->root
.root
.type
== bfd_link_hash_undefweak
))
5432 /* For a shared library, use the PLT stub as
5433 target address to decide whether a long
5434 branch stub is needed.
5435 For absolute code, they cannot be handled. */
5436 struct elf32_arm_link_hash_table
*globals
=
5437 elf32_arm_hash_table (info
);
5440 && globals
->root
.splt
!= NULL
5442 && hash
->root
.plt
.offset
!= (bfd_vma
) -1)
5444 sym_sec
= globals
->root
.splt
;
5445 sym_value
= hash
->root
.plt
.offset
;
5446 if (sym_sec
->output_section
!= NULL
)
5447 destination
= (sym_value
5448 + sym_sec
->output_offset
5449 + sym_sec
->output_section
->vma
);
5456 bfd_set_error (bfd_error_bad_value
);
5457 goto error_ret_free_internal
;
5459 st_type
= hash
->root
.type
;
5460 branch_type
= hash
->root
.target_internal
;
5461 sym_name
= hash
->root
.root
.root
.string
;
5466 /* Determine what (if any) linker stub is needed. */
5467 stub_type
= arm_type_of_stub (info
, section
, irela
,
5468 st_type
, &branch_type
,
5469 hash
, destination
, sym_sec
,
5470 input_bfd
, sym_name
);
5471 if (stub_type
== arm_stub_none
)
5474 /* Support for grouping stub sections. */
5475 id_sec
= htab
->stub_group
[section
->id
].link_sec
;
5477 /* Get the name of this stub. */
5478 stub_name
= elf32_arm_stub_name (id_sec
, sym_sec
, hash
,
5481 goto error_ret_free_internal
;
5483 /* We've either created a stub for this reloc already,
5484 or we are about to. */
5485 created_stub
= TRUE
;
5487 stub_entry
= arm_stub_hash_lookup
5488 (&htab
->stub_hash_table
, stub_name
,
5490 if (stub_entry
!= NULL
)
5492 /* The proper stub has already been created. */
5494 stub_entry
->target_value
= sym_value
;
5498 stub_entry
= elf32_arm_add_stub (stub_name
, section
,
5500 if (stub_entry
== NULL
)
5503 goto error_ret_free_internal
;
5506 stub_entry
->target_value
= sym_value
;
5507 stub_entry
->target_section
= sym_sec
;
5508 stub_entry
->stub_type
= stub_type
;
5509 stub_entry
->h
= hash
;
5510 stub_entry
->branch_type
= branch_type
;
5512 if (sym_name
== NULL
)
5513 sym_name
= "unnamed";
5514 stub_entry
->output_name
= (char *)
5515 bfd_alloc (htab
->stub_bfd
,
5516 sizeof (THUMB2ARM_GLUE_ENTRY_NAME
)
5517 + strlen (sym_name
));
5518 if (stub_entry
->output_name
== NULL
)
5521 goto error_ret_free_internal
;
5524 /* For historical reasons, use the existing names for
5525 ARM-to-Thumb and Thumb-to-ARM stubs. */
5526 if ((r_type
== (unsigned int) R_ARM_THM_CALL
5527 || r_type
== (unsigned int) R_ARM_THM_JUMP24
5528 || r_type
== (unsigned int) R_ARM_THM_JUMP19
)
5529 && branch_type
== ST_BRANCH_TO_ARM
)
5530 sprintf (stub_entry
->output_name
,
5531 THUMB2ARM_GLUE_ENTRY_NAME
, sym_name
);
5532 else if ((r_type
== (unsigned int) R_ARM_CALL
5533 || r_type
== (unsigned int) R_ARM_JUMP24
)
5534 && branch_type
== ST_BRANCH_TO_THUMB
)
5535 sprintf (stub_entry
->output_name
,
5536 ARM2THUMB_GLUE_ENTRY_NAME
, sym_name
);
5538 sprintf (stub_entry
->output_name
, STUB_ENTRY_NAME
,
5541 stub_changed
= TRUE
;
5545 /* Look for relocations which might trigger Cortex-A8
5547 if (htab
->fix_cortex_a8
5548 && (r_type
== (unsigned int) R_ARM_THM_JUMP24
5549 || r_type
== (unsigned int) R_ARM_THM_JUMP19
5550 || r_type
== (unsigned int) R_ARM_THM_CALL
5551 || r_type
== (unsigned int) R_ARM_THM_XPC22
))
5553 bfd_vma from
= section
->output_section
->vma
5554 + section
->output_offset
5557 if ((from
& 0xfff) == 0xffe)
5559 /* Found a candidate. Note we haven't checked the
5560 destination is within 4K here: if we do so (and
5561 don't create an entry in a8_relocs) we can't tell
5562 that a branch should have been relocated when
5564 if (num_a8_relocs
== a8_reloc_table_size
)
5566 a8_reloc_table_size
*= 2;
5567 a8_relocs
= (struct a8_erratum_reloc
*)
5568 bfd_realloc (a8_relocs
,
5569 sizeof (struct a8_erratum_reloc
)
5570 * a8_reloc_table_size
);
5573 a8_relocs
[num_a8_relocs
].from
= from
;
5574 a8_relocs
[num_a8_relocs
].destination
= destination
;
5575 a8_relocs
[num_a8_relocs
].r_type
= r_type
;
5576 a8_relocs
[num_a8_relocs
].branch_type
= branch_type
;
5577 a8_relocs
[num_a8_relocs
].sym_name
= sym_name
;
5578 a8_relocs
[num_a8_relocs
].non_a8_stub
= created_stub
;
5579 a8_relocs
[num_a8_relocs
].hash
= hash
;
5586 /* We're done with the internal relocs, free them. */
5587 if (elf_section_data (section
)->relocs
== NULL
)
5588 free (internal_relocs
);
5591 if (htab
->fix_cortex_a8
)
5593 /* Sort relocs which might apply to Cortex-A8 erratum. */
5594 qsort (a8_relocs
, num_a8_relocs
,
5595 sizeof (struct a8_erratum_reloc
),
5598 /* Scan for branches which might trigger Cortex-A8 erratum. */
5599 if (cortex_a8_erratum_scan (input_bfd
, info
, &a8_fixes
,
5600 &num_a8_fixes
, &a8_fix_table_size
,
5601 a8_relocs
, num_a8_relocs
,
5602 prev_num_a8_fixes
, &stub_changed
)
5604 goto error_ret_free_local
;
5608 if (prev_num_a8_fixes
!= num_a8_fixes
)
5609 stub_changed
= TRUE
;
5614 /* OK, we've added some stubs. Find out the new size of the
5616 for (stub_sec
= htab
->stub_bfd
->sections
;
5618 stub_sec
= stub_sec
->next
)
5620 /* Ignore non-stub sections. */
5621 if (!strstr (stub_sec
->name
, STUB_SUFFIX
))
5627 bfd_hash_traverse (&htab
->stub_hash_table
, arm_size_one_stub
, htab
);
5629 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
5630 if (htab
->fix_cortex_a8
)
5631 for (i
= 0; i
< num_a8_fixes
; i
++)
5633 stub_sec
= elf32_arm_create_or_find_stub_sec (NULL
,
5634 a8_fixes
[i
].section
, htab
);
5636 if (stub_sec
== NULL
)
5637 goto error_ret_free_local
;
5640 += find_stub_size_and_template (a8_fixes
[i
].stub_type
, NULL
,
5645 /* Ask the linker to do its stuff. */
5646 (*htab
->layout_sections_again
) ();
5649 /* Add stubs for Cortex-A8 erratum fixes now. */
5650 if (htab
->fix_cortex_a8
)
5652 for (i
= 0; i
< num_a8_fixes
; i
++)
5654 struct elf32_arm_stub_hash_entry
*stub_entry
;
5655 char *stub_name
= a8_fixes
[i
].stub_name
;
5656 asection
*section
= a8_fixes
[i
].section
;
5657 unsigned int section_id
= a8_fixes
[i
].section
->id
;
5658 asection
*link_sec
= htab
->stub_group
[section_id
].link_sec
;
5659 asection
*stub_sec
= htab
->stub_group
[section_id
].stub_sec
;
5660 const insn_sequence
*template_sequence
;
5661 int template_size
, size
= 0;
5663 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
, stub_name
,
5665 if (stub_entry
== NULL
)
5667 (*_bfd_error_handler
) (_("%s: cannot create stub entry %s"),
5673 stub_entry
->stub_sec
= stub_sec
;
5674 stub_entry
->stub_offset
= 0;
5675 stub_entry
->id_sec
= link_sec
;
5676 stub_entry
->stub_type
= a8_fixes
[i
].stub_type
;
5677 stub_entry
->target_section
= a8_fixes
[i
].section
;
5678 stub_entry
->target_value
= a8_fixes
[i
].offset
;
5679 stub_entry
->target_addend
= a8_fixes
[i
].addend
;
5680 stub_entry
->orig_insn
= a8_fixes
[i
].orig_insn
;
5681 stub_entry
->branch_type
= a8_fixes
[i
].branch_type
;
5683 size
= find_stub_size_and_template (a8_fixes
[i
].stub_type
,
5687 stub_entry
->stub_size
= size
;
5688 stub_entry
->stub_template
= template_sequence
;
5689 stub_entry
->stub_template_size
= template_size
;
5692 /* Stash the Cortex-A8 erratum fix array for use later in
5693 elf32_arm_write_section(). */
5694 htab
->a8_erratum_fixes
= a8_fixes
;
5695 htab
->num_a8_erratum_fixes
= num_a8_fixes
;
5699 htab
->a8_erratum_fixes
= NULL
;
5700 htab
->num_a8_erratum_fixes
= 0;
5704 error_ret_free_local
:
5708 /* Build all the stubs associated with the current output file. The
5709 stubs are kept in a hash table attached to the main linker hash
5710 table. We also set up the .plt entries for statically linked PIC
5711 functions here. This function is called via arm_elf_finish in the
5715 elf32_arm_build_stubs (struct bfd_link_info
*info
)
5718 struct bfd_hash_table
*table
;
5719 struct elf32_arm_link_hash_table
*htab
;
5721 htab
= elf32_arm_hash_table (info
);
5725 for (stub_sec
= htab
->stub_bfd
->sections
;
5727 stub_sec
= stub_sec
->next
)
5731 /* Ignore non-stub sections. */
5732 if (!strstr (stub_sec
->name
, STUB_SUFFIX
))
5735 /* Allocate memory to hold the linker stubs. */
5736 size
= stub_sec
->size
;
5737 stub_sec
->contents
= (unsigned char *) bfd_zalloc (htab
->stub_bfd
, size
);
5738 if (stub_sec
->contents
== NULL
&& size
!= 0)
5743 /* Build the stubs as directed by the stub hash table. */
5744 table
= &htab
->stub_hash_table
;
5745 bfd_hash_traverse (table
, arm_build_one_stub
, info
);
5746 if (htab
->fix_cortex_a8
)
5748 /* Place the cortex a8 stubs last. */
5749 htab
->fix_cortex_a8
= -1;
5750 bfd_hash_traverse (table
, arm_build_one_stub
, info
);
5756 /* Locate the Thumb encoded calling stub for NAME. */
5758 static struct elf_link_hash_entry
*
5759 find_thumb_glue (struct bfd_link_info
*link_info
,
5761 char **error_message
)
5764 struct elf_link_hash_entry
*hash
;
5765 struct elf32_arm_link_hash_table
*hash_table
;
5767 /* We need a pointer to the armelf specific hash table. */
5768 hash_table
= elf32_arm_hash_table (link_info
);
5769 if (hash_table
== NULL
)
5772 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen (name
)
5773 + strlen (THUMB2ARM_GLUE_ENTRY_NAME
) + 1);
5775 BFD_ASSERT (tmp_name
);
5777 sprintf (tmp_name
, THUMB2ARM_GLUE_ENTRY_NAME
, name
);
5779 hash
= elf_link_hash_lookup
5780 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
5783 && asprintf (error_message
, _("unable to find THUMB glue '%s' for '%s'"),
5784 tmp_name
, name
) == -1)
5785 *error_message
= (char *) bfd_errmsg (bfd_error_system_call
);
5792 /* Locate the ARM encoded calling stub for NAME. */
5794 static struct elf_link_hash_entry
*
5795 find_arm_glue (struct bfd_link_info
*link_info
,
5797 char **error_message
)
5800 struct elf_link_hash_entry
*myh
;
5801 struct elf32_arm_link_hash_table
*hash_table
;
5803 /* We need a pointer to the elfarm specific hash table. */
5804 hash_table
= elf32_arm_hash_table (link_info
);
5805 if (hash_table
== NULL
)
5808 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen (name
)
5809 + strlen (ARM2THUMB_GLUE_ENTRY_NAME
) + 1);
5811 BFD_ASSERT (tmp_name
);
5813 sprintf (tmp_name
, ARM2THUMB_GLUE_ENTRY_NAME
, name
);
5815 myh
= elf_link_hash_lookup
5816 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
5819 && asprintf (error_message
, _("unable to find ARM glue '%s' for '%s'"),
5820 tmp_name
, name
) == -1)
5821 *error_message
= (char *) bfd_errmsg (bfd_error_system_call
);
5828 /* ARM->Thumb glue (static images):
5832 ldr r12, __func_addr
5835 .word func @ behave as if you saw a ARM_32 reloc.
5842 .word func @ behave as if you saw a ARM_32 reloc.
5844 (relocatable images)
5847 ldr r12, __func_offset
5853 #define ARM2THUMB_STATIC_GLUE_SIZE 12
5854 static const insn32 a2t1_ldr_insn
= 0xe59fc000;
5855 static const insn32 a2t2_bx_r12_insn
= 0xe12fff1c;
5856 static const insn32 a2t3_func_addr_insn
= 0x00000001;
5858 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
5859 static const insn32 a2t1v5_ldr_insn
= 0xe51ff004;
5860 static const insn32 a2t2v5_func_addr_insn
= 0x00000001;
5862 #define ARM2THUMB_PIC_GLUE_SIZE 16
5863 static const insn32 a2t1p_ldr_insn
= 0xe59fc004;
5864 static const insn32 a2t2p_add_pc_insn
= 0xe08cc00f;
5865 static const insn32 a2t3p_bx_r12_insn
= 0xe12fff1c;
5867 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
5871 __func_from_thumb: __func_from_thumb:
5873 nop ldr r6, __func_addr
5883 #define THUMB2ARM_GLUE_SIZE 8
5884 static const insn16 t2a1_bx_pc_insn
= 0x4778;
5885 static const insn16 t2a2_noop_insn
= 0x46c0;
5886 static const insn32 t2a3_b_insn
= 0xea000000;
5888 #define VFP11_ERRATUM_VENEER_SIZE 8
5889 #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16
5890 #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24
5892 #define ARM_BX_VENEER_SIZE 12
5893 static const insn32 armbx1_tst_insn
= 0xe3100001;
5894 static const insn32 armbx2_moveq_insn
= 0x01a0f000;
5895 static const insn32 armbx3_bx_insn
= 0xe12fff10;
5897 #ifndef ELFARM_NABI_C_INCLUDED
5899 arm_allocate_glue_section_space (bfd
* abfd
, bfd_size_type size
, const char * name
)
5902 bfd_byte
* contents
;
5906 /* Do not include empty glue sections in the output. */
5909 s
= bfd_get_linker_section (abfd
, name
);
5911 s
->flags
|= SEC_EXCLUDE
;
5916 BFD_ASSERT (abfd
!= NULL
);
5918 s
= bfd_get_linker_section (abfd
, name
);
5919 BFD_ASSERT (s
!= NULL
);
5921 contents
= (bfd_byte
*) bfd_alloc (abfd
, size
);
5923 BFD_ASSERT (s
->size
== size
);
5924 s
->contents
= contents
;
5928 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info
* info
)
5930 struct elf32_arm_link_hash_table
* globals
;
5932 globals
= elf32_arm_hash_table (info
);
5933 BFD_ASSERT (globals
!= NULL
);
5935 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
5936 globals
->arm_glue_size
,
5937 ARM2THUMB_GLUE_SECTION_NAME
);
5939 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
5940 globals
->thumb_glue_size
,
5941 THUMB2ARM_GLUE_SECTION_NAME
);
5943 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
5944 globals
->vfp11_erratum_glue_size
,
5945 VFP11_ERRATUM_VENEER_SECTION_NAME
);
5947 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
5948 globals
->stm32l4xx_erratum_glue_size
,
5949 STM32L4XX_ERRATUM_VENEER_SECTION_NAME
);
5951 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
5952 globals
->bx_glue_size
,
5953 ARM_BX_GLUE_SECTION_NAME
);
5958 /* Allocate space and symbols for calling a Thumb function from Arm mode.
5959 returns the symbol identifying the stub. */
5961 static struct elf_link_hash_entry
*
5962 record_arm_to_thumb_glue (struct bfd_link_info
* link_info
,
5963 struct elf_link_hash_entry
* h
)
5965 const char * name
= h
->root
.root
.string
;
5968 struct elf_link_hash_entry
* myh
;
5969 struct bfd_link_hash_entry
* bh
;
5970 struct elf32_arm_link_hash_table
* globals
;
5974 globals
= elf32_arm_hash_table (link_info
);
5975 BFD_ASSERT (globals
!= NULL
);
5976 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
5978 s
= bfd_get_linker_section
5979 (globals
->bfd_of_glue_owner
, ARM2THUMB_GLUE_SECTION_NAME
);
5981 BFD_ASSERT (s
!= NULL
);
5983 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen (name
)
5984 + strlen (ARM2THUMB_GLUE_ENTRY_NAME
) + 1);
5986 BFD_ASSERT (tmp_name
);
5988 sprintf (tmp_name
, ARM2THUMB_GLUE_ENTRY_NAME
, name
);
5990 myh
= elf_link_hash_lookup
5991 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
5995 /* We've already seen this guy. */
6000 /* The only trick here is using hash_table->arm_glue_size as the value.
6001 Even though the section isn't allocated yet, this is where we will be
6002 putting it. The +1 on the value marks that the stub has not been
6003 output yet - not that it is a Thumb function. */
6005 val
= globals
->arm_glue_size
+ 1;
6006 _bfd_generic_link_add_one_symbol (link_info
, globals
->bfd_of_glue_owner
,
6007 tmp_name
, BSF_GLOBAL
, s
, val
,
6008 NULL
, TRUE
, FALSE
, &bh
);
6010 myh
= (struct elf_link_hash_entry
*) bh
;
6011 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
6012 myh
->forced_local
= 1;
6016 if (bfd_link_pic (link_info
)
6017 || globals
->root
.is_relocatable_executable
6018 || globals
->pic_veneer
)
6019 size
= ARM2THUMB_PIC_GLUE_SIZE
;
6020 else if (globals
->use_blx
)
6021 size
= ARM2THUMB_V5_STATIC_GLUE_SIZE
;
6023 size
= ARM2THUMB_STATIC_GLUE_SIZE
;
6026 globals
->arm_glue_size
+= size
;
6031 /* Allocate space for ARMv4 BX veneers. */
6034 record_arm_bx_glue (struct bfd_link_info
* link_info
, int reg
)
6037 struct elf32_arm_link_hash_table
*globals
;
6039 struct elf_link_hash_entry
*myh
;
6040 struct bfd_link_hash_entry
*bh
;
6043 /* BX PC does not need a veneer. */
6047 globals
= elf32_arm_hash_table (link_info
);
6048 BFD_ASSERT (globals
!= NULL
);
6049 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
6051 /* Check if this veneer has already been allocated. */
6052 if (globals
->bx_glue_offset
[reg
])
6055 s
= bfd_get_linker_section
6056 (globals
->bfd_of_glue_owner
, ARM_BX_GLUE_SECTION_NAME
);
6058 BFD_ASSERT (s
!= NULL
);
6060 /* Add symbol for veneer. */
6062 bfd_malloc ((bfd_size_type
) strlen (ARM_BX_GLUE_ENTRY_NAME
) + 1);
6064 BFD_ASSERT (tmp_name
);
6066 sprintf (tmp_name
, ARM_BX_GLUE_ENTRY_NAME
, reg
);
6068 myh
= elf_link_hash_lookup
6069 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
6071 BFD_ASSERT (myh
== NULL
);
6074 val
= globals
->bx_glue_size
;
6075 _bfd_generic_link_add_one_symbol (link_info
, globals
->bfd_of_glue_owner
,
6076 tmp_name
, BSF_FUNCTION
| BSF_LOCAL
, s
, val
,
6077 NULL
, TRUE
, FALSE
, &bh
);
6079 myh
= (struct elf_link_hash_entry
*) bh
;
6080 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
6081 myh
->forced_local
= 1;
6083 s
->size
+= ARM_BX_VENEER_SIZE
;
6084 globals
->bx_glue_offset
[reg
] = globals
->bx_glue_size
| 2;
6085 globals
->bx_glue_size
+= ARM_BX_VENEER_SIZE
;
6089 /* Add an entry to the code/data map for section SEC. */
6092 elf32_arm_section_map_add (asection
*sec
, char type
, bfd_vma vma
)
6094 struct _arm_elf_section_data
*sec_data
= elf32_arm_section_data (sec
);
6095 unsigned int newidx
;
6097 if (sec_data
->map
== NULL
)
6099 sec_data
->map
= (elf32_arm_section_map
*)
6100 bfd_malloc (sizeof (elf32_arm_section_map
));
6101 sec_data
->mapcount
= 0;
6102 sec_data
->mapsize
= 1;
6105 newidx
= sec_data
->mapcount
++;
6107 if (sec_data
->mapcount
> sec_data
->mapsize
)
6109 sec_data
->mapsize
*= 2;
6110 sec_data
->map
= (elf32_arm_section_map
*)
6111 bfd_realloc_or_free (sec_data
->map
, sec_data
->mapsize
6112 * sizeof (elf32_arm_section_map
));
6117 sec_data
->map
[newidx
].vma
= vma
;
6118 sec_data
->map
[newidx
].type
= type
;
6123 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
6124 veneers are handled for now. */
6127 record_vfp11_erratum_veneer (struct bfd_link_info
*link_info
,
6128 elf32_vfp11_erratum_list
*branch
,
6130 asection
*branch_sec
,
6131 unsigned int offset
)
6134 struct elf32_arm_link_hash_table
*hash_table
;
6136 struct elf_link_hash_entry
*myh
;
6137 struct bfd_link_hash_entry
*bh
;
6139 struct _arm_elf_section_data
*sec_data
;
6140 elf32_vfp11_erratum_list
*newerr
;
6142 hash_table
= elf32_arm_hash_table (link_info
);
6143 BFD_ASSERT (hash_table
!= NULL
);
6144 BFD_ASSERT (hash_table
->bfd_of_glue_owner
!= NULL
);
6146 s
= bfd_get_linker_section
6147 (hash_table
->bfd_of_glue_owner
, VFP11_ERRATUM_VENEER_SECTION_NAME
);
6149 sec_data
= elf32_arm_section_data (s
);
6151 BFD_ASSERT (s
!= NULL
);
6153 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen
6154 (VFP11_ERRATUM_VENEER_ENTRY_NAME
) + 10);
6156 BFD_ASSERT (tmp_name
);
6158 sprintf (tmp_name
, VFP11_ERRATUM_VENEER_ENTRY_NAME
,
6159 hash_table
->num_vfp11_fixes
);
6161 myh
= elf_link_hash_lookup
6162 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
6164 BFD_ASSERT (myh
== NULL
);
6167 val
= hash_table
->vfp11_erratum_glue_size
;
6168 _bfd_generic_link_add_one_symbol (link_info
, hash_table
->bfd_of_glue_owner
,
6169 tmp_name
, BSF_FUNCTION
| BSF_LOCAL
, s
, val
,
6170 NULL
, TRUE
, FALSE
, &bh
);
6172 myh
= (struct elf_link_hash_entry
*) bh
;
6173 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
6174 myh
->forced_local
= 1;
6176 /* Link veneer back to calling location. */
6177 sec_data
->erratumcount
+= 1;
6178 newerr
= (elf32_vfp11_erratum_list
*)
6179 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list
));
6181 newerr
->type
= VFP11_ERRATUM_ARM_VENEER
;
6183 newerr
->u
.v
.branch
= branch
;
6184 newerr
->u
.v
.id
= hash_table
->num_vfp11_fixes
;
6185 branch
->u
.b
.veneer
= newerr
;
6187 newerr
->next
= sec_data
->erratumlist
;
6188 sec_data
->erratumlist
= newerr
;
6190 /* A symbol for the return from the veneer. */
6191 sprintf (tmp_name
, VFP11_ERRATUM_VENEER_ENTRY_NAME
"_r",
6192 hash_table
->num_vfp11_fixes
);
6194 myh
= elf_link_hash_lookup
6195 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
6202 _bfd_generic_link_add_one_symbol (link_info
, branch_bfd
, tmp_name
, BSF_LOCAL
,
6203 branch_sec
, val
, NULL
, TRUE
, FALSE
, &bh
);
6205 myh
= (struct elf_link_hash_entry
*) bh
;
6206 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
6207 myh
->forced_local
= 1;
6211 /* Generate a mapping symbol for the veneer section, and explicitly add an
6212 entry for that symbol to the code/data map for the section. */
6213 if (hash_table
->vfp11_erratum_glue_size
== 0)
6216 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
6217 ever requires this erratum fix. */
6218 _bfd_generic_link_add_one_symbol (link_info
,
6219 hash_table
->bfd_of_glue_owner
, "$a",
6220 BSF_LOCAL
, s
, 0, NULL
,
6223 myh
= (struct elf_link_hash_entry
*) bh
;
6224 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_NOTYPE
);
6225 myh
->forced_local
= 1;
6227 /* The elf32_arm_init_maps function only cares about symbols from input
6228 BFDs. We must make a note of this generated mapping symbol
6229 ourselves so that code byteswapping works properly in
6230 elf32_arm_write_section. */
6231 elf32_arm_section_map_add (s
, 'a', 0);
6234 s
->size
+= VFP11_ERRATUM_VENEER_SIZE
;
6235 hash_table
->vfp11_erratum_glue_size
+= VFP11_ERRATUM_VENEER_SIZE
;
6236 hash_table
->num_vfp11_fixes
++;
6238 /* The offset of the veneer. */
6242 /* Record information about a STM32L4XX STM erratum veneer. Only THUMB-mode
6243 veneers need to be handled because used only in Cortex-M. */
6246 record_stm32l4xx_erratum_veneer (struct bfd_link_info
*link_info
,
6247 elf32_stm32l4xx_erratum_list
*branch
,
6249 asection
*branch_sec
,
6250 unsigned int offset
,
6251 bfd_size_type veneer_size
)
6254 struct elf32_arm_link_hash_table
*hash_table
;
6256 struct elf_link_hash_entry
*myh
;
6257 struct bfd_link_hash_entry
*bh
;
6259 struct _arm_elf_section_data
*sec_data
;
6260 elf32_stm32l4xx_erratum_list
*newerr
;
6262 hash_table
= elf32_arm_hash_table (link_info
);
6263 BFD_ASSERT (hash_table
!= NULL
);
6264 BFD_ASSERT (hash_table
->bfd_of_glue_owner
!= NULL
);
6266 s
= bfd_get_linker_section
6267 (hash_table
->bfd_of_glue_owner
, STM32L4XX_ERRATUM_VENEER_SECTION_NAME
);
6269 BFD_ASSERT (s
!= NULL
);
6271 sec_data
= elf32_arm_section_data (s
);
6273 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen
6274 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
) + 10);
6276 BFD_ASSERT (tmp_name
);
6278 sprintf (tmp_name
, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
,
6279 hash_table
->num_stm32l4xx_fixes
);
6281 myh
= elf_link_hash_lookup
6282 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
6284 BFD_ASSERT (myh
== NULL
);
6287 val
= hash_table
->stm32l4xx_erratum_glue_size
;
6288 _bfd_generic_link_add_one_symbol (link_info
, hash_table
->bfd_of_glue_owner
,
6289 tmp_name
, BSF_FUNCTION
| BSF_LOCAL
, s
, val
,
6290 NULL
, TRUE
, FALSE
, &bh
);
6292 myh
= (struct elf_link_hash_entry
*) bh
;
6293 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
6294 myh
->forced_local
= 1;
6296 /* Link veneer back to calling location. */
6297 sec_data
->stm32l4xx_erratumcount
+= 1;
6298 newerr
= (elf32_stm32l4xx_erratum_list
*)
6299 bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list
));
6301 newerr
->type
= STM32L4XX_ERRATUM_VENEER
;
6303 newerr
->u
.v
.branch
= branch
;
6304 newerr
->u
.v
.id
= hash_table
->num_stm32l4xx_fixes
;
6305 branch
->u
.b
.veneer
= newerr
;
6307 newerr
->next
= sec_data
->stm32l4xx_erratumlist
;
6308 sec_data
->stm32l4xx_erratumlist
= newerr
;
6310 /* A symbol for the return from the veneer. */
6311 sprintf (tmp_name
, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
"_r",
6312 hash_table
->num_stm32l4xx_fixes
);
6314 myh
= elf_link_hash_lookup
6315 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
6322 _bfd_generic_link_add_one_symbol (link_info
, branch_bfd
, tmp_name
, BSF_LOCAL
,
6323 branch_sec
, val
, NULL
, TRUE
, FALSE
, &bh
);
6325 myh
= (struct elf_link_hash_entry
*) bh
;
6326 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
6327 myh
->forced_local
= 1;
6331 /* Generate a mapping symbol for the veneer section, and explicitly add an
6332 entry for that symbol to the code/data map for the section. */
6333 if (hash_table
->stm32l4xx_erratum_glue_size
== 0)
6336 /* Creates a THUMB symbol since there is no other choice. */
6337 _bfd_generic_link_add_one_symbol (link_info
,
6338 hash_table
->bfd_of_glue_owner
, "$t",
6339 BSF_LOCAL
, s
, 0, NULL
,
6342 myh
= (struct elf_link_hash_entry
*) bh
;
6343 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_NOTYPE
);
6344 myh
->forced_local
= 1;
6346 /* The elf32_arm_init_maps function only cares about symbols from input
6347 BFDs. We must make a note of this generated mapping symbol
6348 ourselves so that code byteswapping works properly in
6349 elf32_arm_write_section. */
6350 elf32_arm_section_map_add (s
, 't', 0);
6353 s
->size
+= veneer_size
;
6354 hash_table
->stm32l4xx_erratum_glue_size
+= veneer_size
;
6355 hash_table
->num_stm32l4xx_fixes
++;
6357 /* The offset of the veneer. */
6361 #define ARM_GLUE_SECTION_FLAGS \
6362 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
6363 | SEC_READONLY | SEC_LINKER_CREATED)
6365 /* Create a fake section for use by the ARM backend of the linker. */
6368 arm_make_glue_section (bfd
* abfd
, const char * name
)
6372 sec
= bfd_get_linker_section (abfd
, name
);
6377 sec
= bfd_make_section_anyway_with_flags (abfd
, name
, ARM_GLUE_SECTION_FLAGS
);
6380 || !bfd_set_section_alignment (abfd
, sec
, 2))
6383 /* Set the gc mark to prevent the section from being removed by garbage
6384 collection, despite the fact that no relocs refer to this section. */
6390 /* Set size of .plt entries. This function is called from the
6391 linker scripts in ld/emultempl/{armelf}.em. */
6394 bfd_elf32_arm_use_long_plt (void)
6396 elf32_arm_use_long_plt_entry
= TRUE
;
6399 /* Add the glue sections to ABFD. This function is called from the
6400 linker scripts in ld/emultempl/{armelf}.em. */
6403 bfd_elf32_arm_add_glue_sections_to_bfd (bfd
*abfd
,
6404 struct bfd_link_info
*info
)
6406 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (info
);
6407 bfd_boolean dostm32l4xx
= globals
6408 && globals
->stm32l4xx_fix
!= BFD_ARM_STM32L4XX_FIX_NONE
;
6409 bfd_boolean addglue
;
6411 /* If we are only performing a partial
6412 link do not bother adding the glue. */
6413 if (bfd_link_relocatable (info
))
6416 addglue
= arm_make_glue_section (abfd
, ARM2THUMB_GLUE_SECTION_NAME
)
6417 && arm_make_glue_section (abfd
, THUMB2ARM_GLUE_SECTION_NAME
)
6418 && arm_make_glue_section (abfd
, VFP11_ERRATUM_VENEER_SECTION_NAME
)
6419 && arm_make_glue_section (abfd
, ARM_BX_GLUE_SECTION_NAME
);
6425 && arm_make_glue_section (abfd
, STM32L4XX_ERRATUM_VENEER_SECTION_NAME
);
6428 /* Select a BFD to be used to hold the sections used by the glue code.
6429 This function is called from the linker scripts in ld/emultempl/
6433 bfd_elf32_arm_get_bfd_for_interworking (bfd
*abfd
, struct bfd_link_info
*info
)
6435 struct elf32_arm_link_hash_table
*globals
;
6437 /* If we are only performing a partial link
6438 do not bother getting a bfd to hold the glue. */
6439 if (bfd_link_relocatable (info
))
6442 /* Make sure we don't attach the glue sections to a dynamic object. */
6443 BFD_ASSERT (!(abfd
->flags
& DYNAMIC
));
6445 globals
= elf32_arm_hash_table (info
);
6446 BFD_ASSERT (globals
!= NULL
);
6448 if (globals
->bfd_of_glue_owner
!= NULL
)
6451 /* Save the bfd for later use. */
6452 globals
->bfd_of_glue_owner
= abfd
;
6458 check_use_blx (struct elf32_arm_link_hash_table
*globals
)
6462 cpu_arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
6465 if (globals
->fix_arm1176
)
6467 if (cpu_arch
== TAG_CPU_ARCH_V6T2
|| cpu_arch
> TAG_CPU_ARCH_V6K
)
6468 globals
->use_blx
= 1;
6472 if (cpu_arch
> TAG_CPU_ARCH_V4T
)
6473 globals
->use_blx
= 1;
6478 bfd_elf32_arm_process_before_allocation (bfd
*abfd
,
6479 struct bfd_link_info
*link_info
)
6481 Elf_Internal_Shdr
*symtab_hdr
;
6482 Elf_Internal_Rela
*internal_relocs
= NULL
;
6483 Elf_Internal_Rela
*irel
, *irelend
;
6484 bfd_byte
*contents
= NULL
;
6487 struct elf32_arm_link_hash_table
*globals
;
6489 /* If we are only performing a partial link do not bother
6490 to construct any glue. */
6491 if (bfd_link_relocatable (link_info
))
6494 /* Here we have a bfd that is to be included on the link. We have a
6495 hook to do reloc rummaging, before section sizes are nailed down. */
6496 globals
= elf32_arm_hash_table (link_info
);
6497 BFD_ASSERT (globals
!= NULL
);
6499 check_use_blx (globals
);
6501 if (globals
->byteswap_code
&& !bfd_big_endian (abfd
))
6503 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
6508 /* PR 5398: If we have not decided to include any loadable sections in
6509 the output then we will not have a glue owner bfd. This is OK, it
6510 just means that there is nothing else for us to do here. */
6511 if (globals
->bfd_of_glue_owner
== NULL
)
6514 /* Rummage around all the relocs and map the glue vectors. */
6515 sec
= abfd
->sections
;
6520 for (; sec
!= NULL
; sec
= sec
->next
)
6522 if (sec
->reloc_count
== 0)
6525 if ((sec
->flags
& SEC_EXCLUDE
) != 0)
6528 symtab_hdr
= & elf_symtab_hdr (abfd
);
6530 /* Load the relocs. */
6532 = _bfd_elf_link_read_relocs (abfd
, sec
, NULL
, NULL
, FALSE
);
6534 if (internal_relocs
== NULL
)
6537 irelend
= internal_relocs
+ sec
->reloc_count
;
6538 for (irel
= internal_relocs
; irel
< irelend
; irel
++)
6541 unsigned long r_index
;
6543 struct elf_link_hash_entry
*h
;
6545 r_type
= ELF32_R_TYPE (irel
->r_info
);
6546 r_index
= ELF32_R_SYM (irel
->r_info
);
6548 /* These are the only relocation types we care about. */
6549 if ( r_type
!= R_ARM_PC24
6550 && (r_type
!= R_ARM_V4BX
|| globals
->fix_v4bx
< 2))
6553 /* Get the section contents if we haven't done so already. */
6554 if (contents
== NULL
)
6556 /* Get cached copy if it exists. */
6557 if (elf_section_data (sec
)->this_hdr
.contents
!= NULL
)
6558 contents
= elf_section_data (sec
)->this_hdr
.contents
;
6561 /* Go get them off disk. */
6562 if (! bfd_malloc_and_get_section (abfd
, sec
, &contents
))
6567 if (r_type
== R_ARM_V4BX
)
6571 reg
= bfd_get_32 (abfd
, contents
+ irel
->r_offset
) & 0xf;
6572 record_arm_bx_glue (link_info
, reg
);
6576 /* If the relocation is not against a symbol it cannot concern us. */
6579 /* We don't care about local symbols. */
6580 if (r_index
< symtab_hdr
->sh_info
)
6583 /* This is an external symbol. */
6584 r_index
-= symtab_hdr
->sh_info
;
6585 h
= (struct elf_link_hash_entry
*)
6586 elf_sym_hashes (abfd
)[r_index
];
6588 /* If the relocation is against a static symbol it must be within
6589 the current section and so cannot be a cross ARM/Thumb relocation. */
6593 /* If the call will go through a PLT entry then we do not need
6595 if (globals
->root
.splt
!= NULL
&& h
->plt
.offset
!= (bfd_vma
) -1)
6601 /* This one is a call from arm code. We need to look up
6602 the target of the call. If it is a thumb target, we
6604 if (h
->target_internal
== ST_BRANCH_TO_THUMB
)
6605 record_arm_to_thumb_glue (link_info
, h
);
6613 if (contents
!= NULL
6614 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
6618 if (internal_relocs
!= NULL
6619 && elf_section_data (sec
)->relocs
!= internal_relocs
)
6620 free (internal_relocs
);
6621 internal_relocs
= NULL
;
6627 if (contents
!= NULL
6628 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
6630 if (internal_relocs
!= NULL
6631 && elf_section_data (sec
)->relocs
!= internal_relocs
)
6632 free (internal_relocs
);
6639 /* Initialise maps of ARM/Thumb/data for input BFDs. */
6642 bfd_elf32_arm_init_maps (bfd
*abfd
)
6644 Elf_Internal_Sym
*isymbuf
;
6645 Elf_Internal_Shdr
*hdr
;
6646 unsigned int i
, localsyms
;
6648 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
6649 if (! is_arm_elf (abfd
))
6652 if ((abfd
->flags
& DYNAMIC
) != 0)
6655 hdr
= & elf_symtab_hdr (abfd
);
6656 localsyms
= hdr
->sh_info
;
6658 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
6659 should contain the number of local symbols, which should come before any
6660 global symbols. Mapping symbols are always local. */
6661 isymbuf
= bfd_elf_get_elf_syms (abfd
, hdr
, localsyms
, 0, NULL
, NULL
,
6664 /* No internal symbols read? Skip this BFD. */
6665 if (isymbuf
== NULL
)
6668 for (i
= 0; i
< localsyms
; i
++)
6670 Elf_Internal_Sym
*isym
= &isymbuf
[i
];
6671 asection
*sec
= bfd_section_from_elf_index (abfd
, isym
->st_shndx
);
6675 && ELF_ST_BIND (isym
->st_info
) == STB_LOCAL
)
6677 name
= bfd_elf_string_from_elf_section (abfd
,
6678 hdr
->sh_link
, isym
->st_name
);
6680 if (bfd_is_arm_special_symbol_name (name
,
6681 BFD_ARM_SPECIAL_SYM_TYPE_MAP
))
6682 elf32_arm_section_map_add (sec
, name
[1], isym
->st_value
);
6688 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
6689 say what they wanted. */
6692 bfd_elf32_arm_set_cortex_a8_fix (bfd
*obfd
, struct bfd_link_info
*link_info
)
6694 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
6695 obj_attribute
*out_attr
= elf_known_obj_attributes_proc (obfd
);
6697 if (globals
== NULL
)
6700 if (globals
->fix_cortex_a8
== -1)
6702 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
6703 if (out_attr
[Tag_CPU_arch
].i
== TAG_CPU_ARCH_V7
6704 && (out_attr
[Tag_CPU_arch_profile
].i
== 'A'
6705 || out_attr
[Tag_CPU_arch_profile
].i
== 0))
6706 globals
->fix_cortex_a8
= 1;
6708 globals
->fix_cortex_a8
= 0;
6714 bfd_elf32_arm_set_vfp11_fix (bfd
*obfd
, struct bfd_link_info
*link_info
)
6716 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
6717 obj_attribute
*out_attr
= elf_known_obj_attributes_proc (obfd
);
6719 if (globals
== NULL
)
6721 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
6722 if (out_attr
[Tag_CPU_arch
].i
>= TAG_CPU_ARCH_V7
)
6724 switch (globals
->vfp11_fix
)
6726 case BFD_ARM_VFP11_FIX_DEFAULT
:
6727 case BFD_ARM_VFP11_FIX_NONE
:
6728 globals
->vfp11_fix
= BFD_ARM_VFP11_FIX_NONE
;
6732 /* Give a warning, but do as the user requests anyway. */
6733 (*_bfd_error_handler
) (_("%B: warning: selected VFP11 erratum "
6734 "workaround is not necessary for target architecture"), obfd
);
6737 else if (globals
->vfp11_fix
== BFD_ARM_VFP11_FIX_DEFAULT
)
6738 /* For earlier architectures, we might need the workaround, but do not
6739 enable it by default. If users is running with broken hardware, they
6740 must enable the erratum fix explicitly. */
6741 globals
->vfp11_fix
= BFD_ARM_VFP11_FIX_NONE
;
6745 bfd_elf32_arm_set_stm32l4xx_fix (bfd
*obfd
, struct bfd_link_info
*link_info
)
6747 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
6748 obj_attribute
*out_attr
= elf_known_obj_attributes_proc (obfd
);
6750 if (globals
== NULL
)
6753 /* We assume only Cortex-M4 may require the fix. */
6754 if (out_attr
[Tag_CPU_arch
].i
!= TAG_CPU_ARCH_V7E_M
6755 || out_attr
[Tag_CPU_arch_profile
].i
!= 'M')
6757 if (globals
->stm32l4xx_fix
!= BFD_ARM_STM32L4XX_FIX_NONE
)
6758 /* Give a warning, but do as the user requests anyway. */
6759 (*_bfd_error_handler
)
6760 (_("%B: warning: selected STM32L4XX erratum "
6761 "workaround is not necessary for target architecture"), obfd
);
6765 enum bfd_arm_vfp11_pipe
6773 /* Return a VFP register number. This is encoded as RX:X for single-precision
6774 registers, or X:RX for double-precision registers, where RX is the group of
6775 four bits in the instruction encoding and X is the single extension bit.
6776 RX and X fields are specified using their lowest (starting) bit. The return
6779 0...31: single-precision registers s0...s31
6780 32...63: double-precision registers d0...d31.
6782 Although X should be zero for VFP11 (encoding d0...d15 only), we might
6783 encounter VFP3 instructions, so we allow the full range for DP registers. */
6786 bfd_arm_vfp11_regno (unsigned int insn
, bfd_boolean is_double
, unsigned int rx
,
6790 return (((insn
>> rx
) & 0xf) | (((insn
>> x
) & 1) << 4)) + 32;
6792 return (((insn
>> rx
) & 0xf) << 1) | ((insn
>> x
) & 1);
6795 /* Set bits in *WMASK according to a register number REG as encoded by
6796 bfd_arm_vfp11_regno(). Ignore d16-d31. */
6799 bfd_arm_vfp11_write_mask (unsigned int *wmask
, unsigned int reg
)
6804 *wmask
|= 3 << ((reg
- 32) * 2);
6807 /* Return TRUE if WMASK overwrites anything in REGS. */
6810 bfd_arm_vfp11_antidependency (unsigned int wmask
, int *regs
, int numregs
)
6814 for (i
= 0; i
< numregs
; i
++)
6816 unsigned int reg
= regs
[i
];
6818 if (reg
< 32 && (wmask
& (1 << reg
)) != 0)
6826 if ((wmask
& (3 << (reg
* 2))) != 0)
6833 /* In this function, we're interested in two things: finding input registers
6834 for VFP data-processing instructions, and finding the set of registers which
6835 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
6836 hold the written set, so FLDM etc. are easy to deal with (we're only
6837 interested in 32 SP registers or 16 dp registers, due to the VFP version
6838 implemented by the chip in question). DP registers are marked by setting
6839 both SP registers in the write mask). */
6841 static enum bfd_arm_vfp11_pipe
6842 bfd_arm_vfp11_insn_decode (unsigned int insn
, unsigned int *destmask
, int *regs
,
6845 enum bfd_arm_vfp11_pipe vpipe
= VFP11_BAD
;
6846 bfd_boolean is_double
= ((insn
& 0xf00) == 0xb00) ? 1 : 0;
6848 if ((insn
& 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
6851 unsigned int fd
= bfd_arm_vfp11_regno (insn
, is_double
, 12, 22);
6852 unsigned int fm
= bfd_arm_vfp11_regno (insn
, is_double
, 0, 5);
6854 pqrs
= ((insn
& 0x00800000) >> 20)
6855 | ((insn
& 0x00300000) >> 19)
6856 | ((insn
& 0x00000040) >> 6);
6860 case 0: /* fmac[sd]. */
6861 case 1: /* fnmac[sd]. */
6862 case 2: /* fmsc[sd]. */
6863 case 3: /* fnmsc[sd]. */
6865 bfd_arm_vfp11_write_mask (destmask
, fd
);
6867 regs
[1] = bfd_arm_vfp11_regno (insn
, is_double
, 16, 7); /* Fn. */
6872 case 4: /* fmul[sd]. */
6873 case 5: /* fnmul[sd]. */
6874 case 6: /* fadd[sd]. */
6875 case 7: /* fsub[sd]. */
6879 case 8: /* fdiv[sd]. */
6882 bfd_arm_vfp11_write_mask (destmask
, fd
);
6883 regs
[0] = bfd_arm_vfp11_regno (insn
, is_double
, 16, 7); /* Fn. */
6888 case 15: /* extended opcode. */
6890 unsigned int extn
= ((insn
>> 15) & 0x1e)
6891 | ((insn
>> 7) & 1);
6895 case 0: /* fcpy[sd]. */
6896 case 1: /* fabs[sd]. */
6897 case 2: /* fneg[sd]. */
6898 case 8: /* fcmp[sd]. */
6899 case 9: /* fcmpe[sd]. */
6900 case 10: /* fcmpz[sd]. */
6901 case 11: /* fcmpez[sd]. */
6902 case 16: /* fuito[sd]. */
6903 case 17: /* fsito[sd]. */
6904 case 24: /* ftoui[sd]. */
6905 case 25: /* ftouiz[sd]. */
6906 case 26: /* ftosi[sd]. */
6907 case 27: /* ftosiz[sd]. */
6908 /* These instructions will not bounce due to underflow. */
6913 case 3: /* fsqrt[sd]. */
6914 /* fsqrt cannot underflow, but it can (perhaps) overwrite
6915 registers to cause the erratum in previous instructions. */
6916 bfd_arm_vfp11_write_mask (destmask
, fd
);
6920 case 15: /* fcvt{ds,sd}. */
6924 bfd_arm_vfp11_write_mask (destmask
, fd
);
6926 /* Only FCVTSD can underflow. */
6927 if ((insn
& 0x100) != 0)
6946 /* Two-register transfer. */
6947 else if ((insn
& 0x0fe00ed0) == 0x0c400a10)
6949 unsigned int fm
= bfd_arm_vfp11_regno (insn
, is_double
, 0, 5);
6951 if ((insn
& 0x100000) == 0)
6954 bfd_arm_vfp11_write_mask (destmask
, fm
);
6957 bfd_arm_vfp11_write_mask (destmask
, fm
);
6958 bfd_arm_vfp11_write_mask (destmask
, fm
+ 1);
6964 else if ((insn
& 0x0e100e00) == 0x0c100a00) /* A load insn. */
6966 int fd
= bfd_arm_vfp11_regno (insn
, is_double
, 12, 22);
6967 unsigned int puw
= ((insn
>> 21) & 0x1) | (((insn
>> 23) & 3) << 1);
6971 case 0: /* Two-reg transfer. We should catch these above. */
6974 case 2: /* fldm[sdx]. */
6978 unsigned int i
, offset
= insn
& 0xff;
6983 for (i
= fd
; i
< fd
+ offset
; i
++)
6984 bfd_arm_vfp11_write_mask (destmask
, i
);
6988 case 4: /* fld[sd]. */
6990 bfd_arm_vfp11_write_mask (destmask
, fd
);
6999 /* Single-register transfer. Note L==0. */
7000 else if ((insn
& 0x0f100e10) == 0x0e000a10)
7002 unsigned int opcode
= (insn
>> 21) & 7;
7003 unsigned int fn
= bfd_arm_vfp11_regno (insn
, is_double
, 16, 7);
7007 case 0: /* fmsr/fmdlr. */
7008 case 1: /* fmdhr. */
7009 /* Mark fmdhr and fmdlr as writing to the whole of the DP
7010 destination register. I don't know if this is exactly right,
7011 but it is the conservative choice. */
7012 bfd_arm_vfp11_write_mask (destmask
, fn
);
7026 static int elf32_arm_compare_mapping (const void * a
, const void * b
);
7029 /* Look for potentially-troublesome code sequences which might trigger the
7030 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
7031 (available from ARM) for details of the erratum. A short version is
7032 described in ld.texinfo. */
7035 bfd_elf32_arm_vfp11_erratum_scan (bfd
*abfd
, struct bfd_link_info
*link_info
)
7038 bfd_byte
*contents
= NULL
;
7040 int regs
[3], numregs
= 0;
7041 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
7042 int use_vector
= (globals
->vfp11_fix
== BFD_ARM_VFP11_FIX_VECTOR
);
7044 if (globals
== NULL
)
7047 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
7048 The states transition as follows:
7050 0 -> 1 (vector) or 0 -> 2 (scalar)
7051 A VFP FMAC-pipeline instruction has been seen. Fill
7052 regs[0]..regs[numregs-1] with its input operands. Remember this
7053 instruction in 'first_fmac'.
7056 Any instruction, except for a VFP instruction which overwrites
7061 A VFP instruction has been seen which overwrites any of regs[*].
7062 We must make a veneer! Reset state to 0 before examining next
7066 If we fail to match anything in state 2, reset to state 0 and reset
7067 the instruction pointer to the instruction after 'first_fmac'.
7069 If the VFP11 vector mode is in use, there must be at least two unrelated
7070 instructions between anti-dependent VFP11 instructions to properly avoid
7071 triggering the erratum, hence the use of the extra state 1. */
7073 /* If we are only performing a partial link do not bother
7074 to construct any glue. */
7075 if (bfd_link_relocatable (link_info
))
7078 /* Skip if this bfd does not correspond to an ELF image. */
7079 if (! is_arm_elf (abfd
))
7082 /* We should have chosen a fix type by the time we get here. */
7083 BFD_ASSERT (globals
->vfp11_fix
!= BFD_ARM_VFP11_FIX_DEFAULT
);
7085 if (globals
->vfp11_fix
== BFD_ARM_VFP11_FIX_NONE
)
7088 /* Skip this BFD if it corresponds to an executable or dynamic object. */
7089 if ((abfd
->flags
& (EXEC_P
| DYNAMIC
)) != 0)
7092 for (sec
= abfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
7094 unsigned int i
, span
, first_fmac
= 0, veneer_of_insn
= 0;
7095 struct _arm_elf_section_data
*sec_data
;
7097 /* If we don't have executable progbits, we're not interested in this
7098 section. Also skip if section is to be excluded. */
7099 if (elf_section_type (sec
) != SHT_PROGBITS
7100 || (elf_section_flags (sec
) & SHF_EXECINSTR
) == 0
7101 || (sec
->flags
& SEC_EXCLUDE
) != 0
7102 || sec
->sec_info_type
== SEC_INFO_TYPE_JUST_SYMS
7103 || sec
->output_section
== bfd_abs_section_ptr
7104 || strcmp (sec
->name
, VFP11_ERRATUM_VENEER_SECTION_NAME
) == 0)
7107 sec_data
= elf32_arm_section_data (sec
);
7109 if (sec_data
->mapcount
== 0)
7112 if (elf_section_data (sec
)->this_hdr
.contents
!= NULL
)
7113 contents
= elf_section_data (sec
)->this_hdr
.contents
;
7114 else if (! bfd_malloc_and_get_section (abfd
, sec
, &contents
))
7117 qsort (sec_data
->map
, sec_data
->mapcount
, sizeof (elf32_arm_section_map
),
7118 elf32_arm_compare_mapping
);
7120 for (span
= 0; span
< sec_data
->mapcount
; span
++)
7122 unsigned int span_start
= sec_data
->map
[span
].vma
;
7123 unsigned int span_end
= (span
== sec_data
->mapcount
- 1)
7124 ? sec
->size
: sec_data
->map
[span
+ 1].vma
;
7125 char span_type
= sec_data
->map
[span
].type
;
7127 /* FIXME: Only ARM mode is supported at present. We may need to
7128 support Thumb-2 mode also at some point. */
7129 if (span_type
!= 'a')
7132 for (i
= span_start
; i
< span_end
;)
7134 unsigned int next_i
= i
+ 4;
7135 unsigned int insn
= bfd_big_endian (abfd
)
7136 ? (contents
[i
] << 24)
7137 | (contents
[i
+ 1] << 16)
7138 | (contents
[i
+ 2] << 8)
7140 : (contents
[i
+ 3] << 24)
7141 | (contents
[i
+ 2] << 16)
7142 | (contents
[i
+ 1] << 8)
7144 unsigned int writemask
= 0;
7145 enum bfd_arm_vfp11_pipe vpipe
;
7150 vpipe
= bfd_arm_vfp11_insn_decode (insn
, &writemask
, regs
,
7152 /* I'm assuming the VFP11 erratum can trigger with denorm
7153 operands on either the FMAC or the DS pipeline. This might
7154 lead to slightly overenthusiastic veneer insertion. */
7155 if (vpipe
== VFP11_FMAC
|| vpipe
== VFP11_DS
)
7157 state
= use_vector
? 1 : 2;
7159 veneer_of_insn
= insn
;
7165 int other_regs
[3], other_numregs
;
7166 vpipe
= bfd_arm_vfp11_insn_decode (insn
, &writemask
,
7169 if (vpipe
!= VFP11_BAD
7170 && bfd_arm_vfp11_antidependency (writemask
, regs
,
7180 int other_regs
[3], other_numregs
;
7181 vpipe
= bfd_arm_vfp11_insn_decode (insn
, &writemask
,
7184 if (vpipe
!= VFP11_BAD
7185 && bfd_arm_vfp11_antidependency (writemask
, regs
,
7191 next_i
= first_fmac
+ 4;
7197 abort (); /* Should be unreachable. */
7202 elf32_vfp11_erratum_list
*newerr
=(elf32_vfp11_erratum_list
*)
7203 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list
));
7205 elf32_arm_section_data (sec
)->erratumcount
+= 1;
7207 newerr
->u
.b
.vfp_insn
= veneer_of_insn
;
7212 newerr
->type
= VFP11_ERRATUM_BRANCH_TO_ARM_VENEER
;
7219 record_vfp11_erratum_veneer (link_info
, newerr
, abfd
, sec
,
7224 newerr
->next
= sec_data
->erratumlist
;
7225 sec_data
->erratumlist
= newerr
;
7234 if (contents
!= NULL
7235 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
7243 if (contents
!= NULL
7244 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
7250 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
7251 after sections have been laid out, using specially-named symbols. */
7254 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd
*abfd
,
7255 struct bfd_link_info
*link_info
)
7258 struct elf32_arm_link_hash_table
*globals
;
7261 if (bfd_link_relocatable (link_info
))
7264 /* Skip if this bfd does not correspond to an ELF image. */
7265 if (! is_arm_elf (abfd
))
7268 globals
= elf32_arm_hash_table (link_info
);
7269 if (globals
== NULL
)
7272 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen
7273 (VFP11_ERRATUM_VENEER_ENTRY_NAME
) + 10);
7275 for (sec
= abfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
7277 struct _arm_elf_section_data
*sec_data
= elf32_arm_section_data (sec
);
7278 elf32_vfp11_erratum_list
*errnode
= sec_data
->erratumlist
;
7280 for (; errnode
!= NULL
; errnode
= errnode
->next
)
7282 struct elf_link_hash_entry
*myh
;
7285 switch (errnode
->type
)
7287 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER
:
7288 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER
:
7289 /* Find veneer symbol. */
7290 sprintf (tmp_name
, VFP11_ERRATUM_VENEER_ENTRY_NAME
,
7291 errnode
->u
.b
.veneer
->u
.v
.id
);
7293 myh
= elf_link_hash_lookup
7294 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
7297 (*_bfd_error_handler
) (_("%B: unable to find VFP11 veneer "
7298 "`%s'"), abfd
, tmp_name
);
7300 vma
= myh
->root
.u
.def
.section
->output_section
->vma
7301 + myh
->root
.u
.def
.section
->output_offset
7302 + myh
->root
.u
.def
.value
;
7304 errnode
->u
.b
.veneer
->vma
= vma
;
7307 case VFP11_ERRATUM_ARM_VENEER
:
7308 case VFP11_ERRATUM_THUMB_VENEER
:
7309 /* Find return location. */
7310 sprintf (tmp_name
, VFP11_ERRATUM_VENEER_ENTRY_NAME
"_r",
7313 myh
= elf_link_hash_lookup
7314 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
7317 (*_bfd_error_handler
) (_("%B: unable to find VFP11 veneer "
7318 "`%s'"), abfd
, tmp_name
);
7320 vma
= myh
->root
.u
.def
.section
->output_section
->vma
7321 + myh
->root
.u
.def
.section
->output_offset
7322 + myh
->root
.u
.def
.value
;
7324 errnode
->u
.v
.branch
->vma
= vma
;
7336 /* Find virtual-memory addresses for STM32L4XX erratum veneers and
7337 return locations after sections have been laid out, using
7338 specially-named symbols. */
7341 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd
*abfd
,
7342 struct bfd_link_info
*link_info
)
7345 struct elf32_arm_link_hash_table
*globals
;
7348 if (bfd_link_relocatable (link_info
))
7351 /* Skip if this bfd does not correspond to an ELF image. */
7352 if (! is_arm_elf (abfd
))
7355 globals
= elf32_arm_hash_table (link_info
);
7356 if (globals
== NULL
)
7359 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen
7360 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
) + 10);
7362 for (sec
= abfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
7364 struct _arm_elf_section_data
*sec_data
= elf32_arm_section_data (sec
);
7365 elf32_stm32l4xx_erratum_list
*errnode
= sec_data
->stm32l4xx_erratumlist
;
7367 for (; errnode
!= NULL
; errnode
= errnode
->next
)
7369 struct elf_link_hash_entry
*myh
;
7372 switch (errnode
->type
)
7374 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER
:
7375 /* Find veneer symbol. */
7376 sprintf (tmp_name
, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
,
7377 errnode
->u
.b
.veneer
->u
.v
.id
);
7379 myh
= elf_link_hash_lookup
7380 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
7383 (*_bfd_error_handler
) (_("%B: unable to find STM32L4XX veneer "
7384 "`%s'"), abfd
, tmp_name
);
7386 vma
= myh
->root
.u
.def
.section
->output_section
->vma
7387 + myh
->root
.u
.def
.section
->output_offset
7388 + myh
->root
.u
.def
.value
;
7390 errnode
->u
.b
.veneer
->vma
= vma
;
7393 case STM32L4XX_ERRATUM_VENEER
:
7394 /* Find return location. */
7395 sprintf (tmp_name
, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
"_r",
7398 myh
= elf_link_hash_lookup
7399 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
7402 (*_bfd_error_handler
) (_("%B: unable to find STM32L4XX veneer "
7403 "`%s'"), abfd
, tmp_name
);
7405 vma
= myh
->root
.u
.def
.section
->output_section
->vma
7406 + myh
->root
.u
.def
.section
->output_offset
7407 + myh
->root
.u
.def
.value
;
7409 errnode
->u
.v
.branch
->vma
= vma
;
7421 static inline bfd_boolean
7422 is_thumb2_ldmia (const insn32 insn
)
7424 /* Encoding T2: LDM<c>.W <Rn>{!},<registers>
7425 1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll. */
7426 return (insn
& 0xffd02000) == 0xe8900000;
7429 static inline bfd_boolean
7430 is_thumb2_ldmdb (const insn32 insn
)
7432 /* Encoding T1: LDMDB<c> <Rn>{!},<registers>
7433 1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll. */
7434 return (insn
& 0xffd02000) == 0xe9100000;
7437 static inline bfd_boolean
7438 is_thumb2_vldm (const insn32 insn
)
7440 /* A6.5 Extension register load or store instruction
7442 We look only for the 32-bit registers case since the DP (64-bit
7443 registers) are not supported for STM32L4XX
7444 Encoding T2 VLDM{mode}<c> <Rn>{!}, <list>
7445 <list> is consecutive 32-bit registers
7446 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii
7447 if P==0 && U==1 && W==1 && Rn=1101 VPOP
7448 if PUW=010 || PUW=011 || PUW=101 VLDM. */
7450 ((insn
& 0xfe100f00) == 0xec100a00)
7451 && /* (IA without !). */
7452 (((((insn
<< 7) >> 28) & 0xd) == 0x4)
7453 /* (IA with !), includes VPOP (when reg number is SP). */
7454 || ((((insn
<< 7) >> 28) & 0xd) == 0x5)
7456 || ((((insn
<< 7) >> 28) & 0xd) == 0x9));
7459 /* STM STM32L4XX erratum : This function assumes that it receives an LDM or
7461 - computes the number and the mode of memory accesses
7462 - decides if the replacement should be done:
7463 . replaces only if > 8-word accesses
7464 . or (testing purposes only) replaces all accesses. */
7467 stm32l4xx_need_create_replacing_stub (const insn32 insn
,
7468 bfd_arm_stm32l4xx_fix stm32l4xx_fix
)
7472 /* The field encoding the register list is the same for both LDMIA
7473 and LDMDB encodings. */
7474 if (is_thumb2_ldmia (insn
) || is_thumb2_ldmdb (insn
))
7475 nb_regs
= popcount (insn
& 0x0000ffff);
7476 else if (is_thumb2_vldm (insn
))
7477 nb_regs
= (insn
& 0xff);
7479 /* DEFAULT mode accounts for the real bug condition situation,
7480 ALL mode inserts stubs for each LDM/VLDM instruction (testing). */
7482 (stm32l4xx_fix
== BFD_ARM_STM32L4XX_FIX_DEFAULT
) ? nb_regs
> 8 :
7483 (stm32l4xx_fix
== BFD_ARM_STM32L4XX_FIX_ALL
) ? TRUE
: FALSE
;
7486 /* Look for potentially-troublesome code sequences which might trigger
7487 the STM STM32L4XX erratum. */
7490 bfd_elf32_arm_stm32l4xx_erratum_scan (bfd
*abfd
,
7491 struct bfd_link_info
*link_info
)
7494 bfd_byte
*contents
= NULL
;
7495 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
7497 if (globals
== NULL
)
7500 /* If we are only performing a partial link do not bother
7501 to construct any glue. */
7502 if (bfd_link_relocatable (link_info
))
7505 /* Skip if this bfd does not correspond to an ELF image. */
7506 if (! is_arm_elf (abfd
))
7509 if (globals
->stm32l4xx_fix
== BFD_ARM_STM32L4XX_FIX_NONE
)
7512 /* Skip this BFD if it corresponds to an executable or dynamic object. */
7513 if ((abfd
->flags
& (EXEC_P
| DYNAMIC
)) != 0)
7516 for (sec
= abfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
7518 unsigned int i
, span
;
7519 struct _arm_elf_section_data
*sec_data
;
7521 /* If we don't have executable progbits, we're not interested in this
7522 section. Also skip if section is to be excluded. */
7523 if (elf_section_type (sec
) != SHT_PROGBITS
7524 || (elf_section_flags (sec
) & SHF_EXECINSTR
) == 0
7525 || (sec
->flags
& SEC_EXCLUDE
) != 0
7526 || sec
->sec_info_type
== SEC_INFO_TYPE_JUST_SYMS
7527 || sec
->output_section
== bfd_abs_section_ptr
7528 || strcmp (sec
->name
, STM32L4XX_ERRATUM_VENEER_SECTION_NAME
) == 0)
7531 sec_data
= elf32_arm_section_data (sec
);
7533 if (sec_data
->mapcount
== 0)
7536 if (elf_section_data (sec
)->this_hdr
.contents
!= NULL
)
7537 contents
= elf_section_data (sec
)->this_hdr
.contents
;
7538 else if (! bfd_malloc_and_get_section (abfd
, sec
, &contents
))
7541 qsort (sec_data
->map
, sec_data
->mapcount
, sizeof (elf32_arm_section_map
),
7542 elf32_arm_compare_mapping
);
7544 for (span
= 0; span
< sec_data
->mapcount
; span
++)
7546 unsigned int span_start
= sec_data
->map
[span
].vma
;
7547 unsigned int span_end
= (span
== sec_data
->mapcount
- 1)
7548 ? sec
->size
: sec_data
->map
[span
+ 1].vma
;
7549 char span_type
= sec_data
->map
[span
].type
;
7550 int itblock_current_pos
= 0;
7552 /* Only Thumb2 mode need be supported with this CM4 specific
7553 code, we should not encounter any arm mode eg span_type
7555 if (span_type
!= 't')
7558 for (i
= span_start
; i
< span_end
;)
7560 unsigned int insn
= bfd_get_16 (abfd
, &contents
[i
]);
7561 bfd_boolean insn_32bit
= FALSE
;
7562 bfd_boolean is_ldm
= FALSE
;
7563 bfd_boolean is_vldm
= FALSE
;
7564 bfd_boolean is_not_last_in_it_block
= FALSE
;
7566 /* The first 16-bits of all 32-bit thumb2 instructions start
7567 with opcode[15..13]=0b111 and the encoded op1 can be anything
7568 except opcode[12..11]!=0b00.
7569 See 32-bit Thumb instruction encoding. */
7570 if ((insn
& 0xe000) == 0xe000 && (insn
& 0x1800) != 0x0000)
7573 /* Compute the predicate that tells if the instruction
7574 is concerned by the IT block
7575 - Creates an error if there is a ldm that is not
7576 last in the IT block thus cannot be replaced
7577 - Otherwise we can create a branch at the end of the
7578 IT block, it will be controlled naturally by IT
7579 with the proper pseudo-predicate
7580 - So the only interesting predicate is the one that
7581 tells that we are not on the last item of an IT
7583 if (itblock_current_pos
!= 0)
7584 is_not_last_in_it_block
= !!--itblock_current_pos
;
7588 /* Load the rest of the insn (in manual-friendly order). */
7589 insn
= (insn
<< 16) | bfd_get_16 (abfd
, &contents
[i
+ 2]);
7590 is_ldm
= is_thumb2_ldmia (insn
) || is_thumb2_ldmdb (insn
);
7591 is_vldm
= is_thumb2_vldm (insn
);
7593 /* Veneers are created for (v)ldm depending on
7594 option flags and memory accesses conditions; but
7595 if the instruction is not the last instruction of
7596 an IT block, we cannot create a jump there, so we
7598 if ((is_ldm
|| is_vldm
) &&
7599 stm32l4xx_need_create_replacing_stub
7600 (insn
, globals
->stm32l4xx_fix
))
7602 if (is_not_last_in_it_block
)
7604 (*_bfd_error_handler
)
7605 /* Note - overlong line used here to allow for translation. */
7607 %B(%A+0x%lx): error: multiple load detected in non-last IT block instruction : STM32L4XX veneer cannot be generated.\n"
7608 "Use gcc option -mrestrict-it to generate only one instruction per IT block.\n"),
7609 abfd
, sec
, (long)i
);
7613 elf32_stm32l4xx_erratum_list
*newerr
=
7614 (elf32_stm32l4xx_erratum_list
*)
7616 (sizeof (elf32_stm32l4xx_erratum_list
));
7618 elf32_arm_section_data (sec
)
7619 ->stm32l4xx_erratumcount
+= 1;
7620 newerr
->u
.b
.insn
= insn
;
7621 /* We create only thumb branches. */
7623 STM32L4XX_ERRATUM_BRANCH_TO_VENEER
;
7624 record_stm32l4xx_erratum_veneer
7625 (link_info
, newerr
, abfd
, sec
,
7628 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
:
7629 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE
);
7631 newerr
->next
= sec_data
->stm32l4xx_erratumlist
;
7632 sec_data
->stm32l4xx_erratumlist
= newerr
;
7639 IT blocks are only encoded in T1
7640 Encoding T1: IT{x{y{z}}} <firstcond>
7641 1 0 1 1 - 1 1 1 1 - firstcond - mask
7642 if mask = '0000' then see 'related encodings'
7643 We don't deal with UNPREDICTABLE, just ignore these.
7644 There can be no nested IT blocks so an IT block
7645 is naturally a new one for which it is worth
7646 computing its size. */
7647 bfd_boolean is_newitblock
= ((insn
& 0xff00) == 0xbf00) &&
7648 ((insn
& 0x000f) != 0x0000);
7649 /* If we have a new IT block we compute its size. */
7652 /* Compute the number of instructions controlled
7653 by the IT block, it will be used to decide
7654 whether we are inside an IT block or not. */
7655 unsigned int mask
= insn
& 0x000f;
7656 itblock_current_pos
= 4 - ctz (mask
);
7660 i
+= insn_32bit
? 4 : 2;
7664 if (contents
!= NULL
7665 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
7673 if (contents
!= NULL
7674 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
7680 /* Set target relocation values needed during linking. */
7683 bfd_elf32_arm_set_target_relocs (struct bfd
*output_bfd
,
7684 struct bfd_link_info
*link_info
,
7686 char * target2_type
,
7689 bfd_arm_vfp11_fix vfp11_fix
,
7690 bfd_arm_stm32l4xx_fix stm32l4xx_fix
,
7691 int no_enum_warn
, int no_wchar_warn
,
7692 int pic_veneer
, int fix_cortex_a8
,
7695 struct elf32_arm_link_hash_table
*globals
;
7697 globals
= elf32_arm_hash_table (link_info
);
7698 if (globals
== NULL
)
7701 globals
->target1_is_rel
= target1_is_rel
;
7702 if (strcmp (target2_type
, "rel") == 0)
7703 globals
->target2_reloc
= R_ARM_REL32
;
7704 else if (strcmp (target2_type
, "abs") == 0)
7705 globals
->target2_reloc
= R_ARM_ABS32
;
7706 else if (strcmp (target2_type
, "got-rel") == 0)
7707 globals
->target2_reloc
= R_ARM_GOT_PREL
;
7710 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
7713 globals
->fix_v4bx
= fix_v4bx
;
7714 globals
->use_blx
|= use_blx
;
7715 globals
->vfp11_fix
= vfp11_fix
;
7716 globals
->stm32l4xx_fix
= stm32l4xx_fix
;
7717 globals
->pic_veneer
= pic_veneer
;
7718 globals
->fix_cortex_a8
= fix_cortex_a8
;
7719 globals
->fix_arm1176
= fix_arm1176
;
7721 BFD_ASSERT (is_arm_elf (output_bfd
));
7722 elf_arm_tdata (output_bfd
)->no_enum_size_warning
= no_enum_warn
;
7723 elf_arm_tdata (output_bfd
)->no_wchar_size_warning
= no_wchar_warn
;
7726 /* Replace the target offset of a Thumb bl or b.w instruction. */
7729 insert_thumb_branch (bfd
*abfd
, long int offset
, bfd_byte
*insn
)
7735 BFD_ASSERT ((offset
& 1) == 0);
7737 upper
= bfd_get_16 (abfd
, insn
);
7738 lower
= bfd_get_16 (abfd
, insn
+ 2);
7739 reloc_sign
= (offset
< 0) ? 1 : 0;
7740 upper
= (upper
& ~(bfd_vma
) 0x7ff)
7741 | ((offset
>> 12) & 0x3ff)
7742 | (reloc_sign
<< 10);
7743 lower
= (lower
& ~(bfd_vma
) 0x2fff)
7744 | (((!((offset
>> 23) & 1)) ^ reloc_sign
) << 13)
7745 | (((!((offset
>> 22) & 1)) ^ reloc_sign
) << 11)
7746 | ((offset
>> 1) & 0x7ff);
7747 bfd_put_16 (abfd
, upper
, insn
);
7748 bfd_put_16 (abfd
, lower
, insn
+ 2);
7751 /* Thumb code calling an ARM function. */
7754 elf32_thumb_to_arm_stub (struct bfd_link_info
* info
,
7758 asection
* input_section
,
7759 bfd_byte
* hit_data
,
7762 bfd_signed_vma addend
,
7764 char **error_message
)
7768 long int ret_offset
;
7769 struct elf_link_hash_entry
* myh
;
7770 struct elf32_arm_link_hash_table
* globals
;
7772 myh
= find_thumb_glue (info
, name
, error_message
);
7776 globals
= elf32_arm_hash_table (info
);
7777 BFD_ASSERT (globals
!= NULL
);
7778 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
7780 my_offset
= myh
->root
.u
.def
.value
;
7782 s
= bfd_get_linker_section (globals
->bfd_of_glue_owner
,
7783 THUMB2ARM_GLUE_SECTION_NAME
);
7785 BFD_ASSERT (s
!= NULL
);
7786 BFD_ASSERT (s
->contents
!= NULL
);
7787 BFD_ASSERT (s
->output_section
!= NULL
);
7789 if ((my_offset
& 0x01) == 0x01)
7792 && sym_sec
->owner
!= NULL
7793 && !INTERWORK_FLAG (sym_sec
->owner
))
7795 (*_bfd_error_handler
)
7796 (_("%B(%s): warning: interworking not enabled.\n"
7797 " first occurrence: %B: Thumb call to ARM"),
7798 sym_sec
->owner
, input_bfd
, name
);
7804 myh
->root
.u
.def
.value
= my_offset
;
7806 put_thumb_insn (globals
, output_bfd
, (bfd_vma
) t2a1_bx_pc_insn
,
7807 s
->contents
+ my_offset
);
7809 put_thumb_insn (globals
, output_bfd
, (bfd_vma
) t2a2_noop_insn
,
7810 s
->contents
+ my_offset
+ 2);
7813 /* Address of destination of the stub. */
7814 ((bfd_signed_vma
) val
)
7816 /* Offset from the start of the current section
7817 to the start of the stubs. */
7819 /* Offset of the start of this stub from the start of the stubs. */
7821 /* Address of the start of the current section. */
7822 + s
->output_section
->vma
)
7823 /* The branch instruction is 4 bytes into the stub. */
7825 /* ARM branches work from the pc of the instruction + 8. */
7828 put_arm_insn (globals
, output_bfd
,
7829 (bfd_vma
) t2a3_b_insn
| ((ret_offset
>> 2) & 0x00FFFFFF),
7830 s
->contents
+ my_offset
+ 4);
7833 BFD_ASSERT (my_offset
<= globals
->thumb_glue_size
);
7835 /* Now go back and fix up the original BL insn to point to here. */
7837 /* Address of where the stub is located. */
7838 (s
->output_section
->vma
+ s
->output_offset
+ my_offset
)
7839 /* Address of where the BL is located. */
7840 - (input_section
->output_section
->vma
+ input_section
->output_offset
7842 /* Addend in the relocation. */
7844 /* Biassing for PC-relative addressing. */
7847 insert_thumb_branch (input_bfd
, ret_offset
, hit_data
- input_section
->vma
);
7852 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
7854 static struct elf_link_hash_entry
*
7855 elf32_arm_create_thumb_stub (struct bfd_link_info
* info
,
7862 char ** error_message
)
7865 long int ret_offset
;
7866 struct elf_link_hash_entry
* myh
;
7867 struct elf32_arm_link_hash_table
* globals
;
7869 myh
= find_arm_glue (info
, name
, error_message
);
7873 globals
= elf32_arm_hash_table (info
);
7874 BFD_ASSERT (globals
!= NULL
);
7875 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
7877 my_offset
= myh
->root
.u
.def
.value
;
7879 if ((my_offset
& 0x01) == 0x01)
7882 && sym_sec
->owner
!= NULL
7883 && !INTERWORK_FLAG (sym_sec
->owner
))
7885 (*_bfd_error_handler
)
7886 (_("%B(%s): warning: interworking not enabled.\n"
7887 " first occurrence: %B: arm call to thumb"),
7888 sym_sec
->owner
, input_bfd
, name
);
7892 myh
->root
.u
.def
.value
= my_offset
;
7894 if (bfd_link_pic (info
)
7895 || globals
->root
.is_relocatable_executable
7896 || globals
->pic_veneer
)
7898 /* For relocatable objects we can't use absolute addresses,
7899 so construct the address from a relative offset. */
7900 /* TODO: If the offset is small it's probably worth
7901 constructing the address with adds. */
7902 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t1p_ldr_insn
,
7903 s
->contents
+ my_offset
);
7904 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t2p_add_pc_insn
,
7905 s
->contents
+ my_offset
+ 4);
7906 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t3p_bx_r12_insn
,
7907 s
->contents
+ my_offset
+ 8);
7908 /* Adjust the offset by 4 for the position of the add,
7909 and 8 for the pipeline offset. */
7910 ret_offset
= (val
- (s
->output_offset
7911 + s
->output_section
->vma
7914 bfd_put_32 (output_bfd
, ret_offset
,
7915 s
->contents
+ my_offset
+ 12);
7917 else if (globals
->use_blx
)
7919 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t1v5_ldr_insn
,
7920 s
->contents
+ my_offset
);
7922 /* It's a thumb address. Add the low order bit. */
7923 bfd_put_32 (output_bfd
, val
| a2t2v5_func_addr_insn
,
7924 s
->contents
+ my_offset
+ 4);
7928 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t1_ldr_insn
,
7929 s
->contents
+ my_offset
);
7931 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t2_bx_r12_insn
,
7932 s
->contents
+ my_offset
+ 4);
7934 /* It's a thumb address. Add the low order bit. */
7935 bfd_put_32 (output_bfd
, val
| a2t3_func_addr_insn
,
7936 s
->contents
+ my_offset
+ 8);
7942 BFD_ASSERT (my_offset
<= globals
->arm_glue_size
);
7947 /* Arm code calling a Thumb function. */
7950 elf32_arm_to_thumb_stub (struct bfd_link_info
* info
,
7954 asection
* input_section
,
7955 bfd_byte
* hit_data
,
7958 bfd_signed_vma addend
,
7960 char **error_message
)
7962 unsigned long int tmp
;
7965 long int ret_offset
;
7966 struct elf_link_hash_entry
* myh
;
7967 struct elf32_arm_link_hash_table
* globals
;
7969 globals
= elf32_arm_hash_table (info
);
7970 BFD_ASSERT (globals
!= NULL
);
7971 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
7973 s
= bfd_get_linker_section (globals
->bfd_of_glue_owner
,
7974 ARM2THUMB_GLUE_SECTION_NAME
);
7975 BFD_ASSERT (s
!= NULL
);
7976 BFD_ASSERT (s
->contents
!= NULL
);
7977 BFD_ASSERT (s
->output_section
!= NULL
);
7979 myh
= elf32_arm_create_thumb_stub (info
, name
, input_bfd
, output_bfd
,
7980 sym_sec
, val
, s
, error_message
);
7984 my_offset
= myh
->root
.u
.def
.value
;
7985 tmp
= bfd_get_32 (input_bfd
, hit_data
);
7986 tmp
= tmp
& 0xFF000000;
7988 /* Somehow these are both 4 too far, so subtract 8. */
7989 ret_offset
= (s
->output_offset
7991 + s
->output_section
->vma
7992 - (input_section
->output_offset
7993 + input_section
->output_section
->vma
7997 tmp
= tmp
| ((ret_offset
>> 2) & 0x00FFFFFF);
7999 bfd_put_32 (output_bfd
, (bfd_vma
) tmp
, hit_data
- input_section
->vma
);
8004 /* Populate Arm stub for an exported Thumb function. */
8007 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry
*h
, void * inf
)
8009 struct bfd_link_info
* info
= (struct bfd_link_info
*) inf
;
8011 struct elf_link_hash_entry
* myh
;
8012 struct elf32_arm_link_hash_entry
*eh
;
8013 struct elf32_arm_link_hash_table
* globals
;
8016 char *error_message
;
8018 eh
= elf32_arm_hash_entry (h
);
8019 /* Allocate stubs for exported Thumb functions on v4t. */
8020 if (eh
->export_glue
== NULL
)
8023 globals
= elf32_arm_hash_table (info
);
8024 BFD_ASSERT (globals
!= NULL
);
8025 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
8027 s
= bfd_get_linker_section (globals
->bfd_of_glue_owner
,
8028 ARM2THUMB_GLUE_SECTION_NAME
);
8029 BFD_ASSERT (s
!= NULL
);
8030 BFD_ASSERT (s
->contents
!= NULL
);
8031 BFD_ASSERT (s
->output_section
!= NULL
);
8033 sec
= eh
->export_glue
->root
.u
.def
.section
;
8035 BFD_ASSERT (sec
->output_section
!= NULL
);
8037 val
= eh
->export_glue
->root
.u
.def
.value
+ sec
->output_offset
8038 + sec
->output_section
->vma
;
8040 myh
= elf32_arm_create_thumb_stub (info
, h
->root
.root
.string
,
8041 h
->root
.u
.def
.section
->owner
,
8042 globals
->obfd
, sec
, val
, s
,
8048 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
8051 elf32_arm_bx_glue (struct bfd_link_info
* info
, int reg
)
8056 struct elf32_arm_link_hash_table
*globals
;
8058 globals
= elf32_arm_hash_table (info
);
8059 BFD_ASSERT (globals
!= NULL
);
8060 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
8062 s
= bfd_get_linker_section (globals
->bfd_of_glue_owner
,
8063 ARM_BX_GLUE_SECTION_NAME
);
8064 BFD_ASSERT (s
!= NULL
);
8065 BFD_ASSERT (s
->contents
!= NULL
);
8066 BFD_ASSERT (s
->output_section
!= NULL
);
8068 BFD_ASSERT (globals
->bx_glue_offset
[reg
] & 2);
8070 glue_addr
= globals
->bx_glue_offset
[reg
] & ~(bfd_vma
)3;
8072 if ((globals
->bx_glue_offset
[reg
] & 1) == 0)
8074 p
= s
->contents
+ glue_addr
;
8075 bfd_put_32 (globals
->obfd
, armbx1_tst_insn
+ (reg
<< 16), p
);
8076 bfd_put_32 (globals
->obfd
, armbx2_moveq_insn
+ reg
, p
+ 4);
8077 bfd_put_32 (globals
->obfd
, armbx3_bx_insn
+ reg
, p
+ 8);
8078 globals
->bx_glue_offset
[reg
] |= 1;
8081 return glue_addr
+ s
->output_section
->vma
+ s
->output_offset
;
8084 /* Generate Arm stubs for exported Thumb symbols. */
8086 elf32_arm_begin_write_processing (bfd
*abfd ATTRIBUTE_UNUSED
,
8087 struct bfd_link_info
*link_info
)
8089 struct elf32_arm_link_hash_table
* globals
;
8091 if (link_info
== NULL
)
8092 /* Ignore this if we are not called by the ELF backend linker. */
8095 globals
= elf32_arm_hash_table (link_info
);
8096 if (globals
== NULL
)
8099 /* If blx is available then exported Thumb symbols are OK and there is
8101 if (globals
->use_blx
)
8104 elf_link_hash_traverse (&globals
->root
, elf32_arm_to_thumb_export_stub
,
8108 /* Reserve space for COUNT dynamic relocations in relocation selection
8112 elf32_arm_allocate_dynrelocs (struct bfd_link_info
*info
, asection
*sreloc
,
8113 bfd_size_type count
)
8115 struct elf32_arm_link_hash_table
*htab
;
8117 htab
= elf32_arm_hash_table (info
);
8118 BFD_ASSERT (htab
->root
.dynamic_sections_created
);
8121 sreloc
->size
+= RELOC_SIZE (htab
) * count
;
8124 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
8125 dynamic, the relocations should go in SRELOC, otherwise they should
8126 go in the special .rel.iplt section. */
8129 elf32_arm_allocate_irelocs (struct bfd_link_info
*info
, asection
*sreloc
,
8130 bfd_size_type count
)
8132 struct elf32_arm_link_hash_table
*htab
;
8134 htab
= elf32_arm_hash_table (info
);
8135 if (!htab
->root
.dynamic_sections_created
)
8136 htab
->root
.irelplt
->size
+= RELOC_SIZE (htab
) * count
;
8139 BFD_ASSERT (sreloc
!= NULL
);
8140 sreloc
->size
+= RELOC_SIZE (htab
) * count
;
8144 /* Add relocation REL to the end of relocation section SRELOC. */
8147 elf32_arm_add_dynreloc (bfd
*output_bfd
, struct bfd_link_info
*info
,
8148 asection
*sreloc
, Elf_Internal_Rela
*rel
)
8151 struct elf32_arm_link_hash_table
*htab
;
8153 htab
= elf32_arm_hash_table (info
);
8154 if (!htab
->root
.dynamic_sections_created
8155 && ELF32_R_TYPE (rel
->r_info
) == R_ARM_IRELATIVE
)
8156 sreloc
= htab
->root
.irelplt
;
8159 loc
= sreloc
->contents
;
8160 loc
+= sreloc
->reloc_count
++ * RELOC_SIZE (htab
);
8161 if (sreloc
->reloc_count
* RELOC_SIZE (htab
) > sreloc
->size
)
8163 SWAP_RELOC_OUT (htab
) (output_bfd
, rel
, loc
);
8166 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
8167 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
8171 elf32_arm_allocate_plt_entry (struct bfd_link_info
*info
,
8172 bfd_boolean is_iplt_entry
,
8173 union gotplt_union
*root_plt
,
8174 struct arm_plt_info
*arm_plt
)
8176 struct elf32_arm_link_hash_table
*htab
;
8180 htab
= elf32_arm_hash_table (info
);
8184 splt
= htab
->root
.iplt
;
8185 sgotplt
= htab
->root
.igotplt
;
8187 /* NaCl uses a special first entry in .iplt too. */
8188 if (htab
->nacl_p
&& splt
->size
== 0)
8189 splt
->size
+= htab
->plt_header_size
;
8191 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
8192 elf32_arm_allocate_irelocs (info
, htab
->root
.irelplt
, 1);
8196 splt
= htab
->root
.splt
;
8197 sgotplt
= htab
->root
.sgotplt
;
8199 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
8200 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelplt
, 1);
8202 /* If this is the first .plt entry, make room for the special
8204 if (splt
->size
== 0)
8205 splt
->size
+= htab
->plt_header_size
;
8207 htab
->next_tls_desc_index
++;
8210 /* Allocate the PLT entry itself, including any leading Thumb stub. */
8211 if (elf32_arm_plt_needs_thumb_stub_p (info
, arm_plt
))
8212 splt
->size
+= PLT_THUMB_STUB_SIZE
;
8213 root_plt
->offset
= splt
->size
;
8214 splt
->size
+= htab
->plt_entry_size
;
8216 if (!htab
->symbian_p
)
8218 /* We also need to make an entry in the .got.plt section, which
8219 will be placed in the .got section by the linker script. */
8221 arm_plt
->got_offset
= sgotplt
->size
;
8223 arm_plt
->got_offset
= sgotplt
->size
- 8 * htab
->num_tls_desc
;
8229 arm_movw_immediate (bfd_vma value
)
8231 return (value
& 0x00000fff) | ((value
& 0x0000f000) << 4);
8235 arm_movt_immediate (bfd_vma value
)
8237 return ((value
& 0x0fff0000) >> 16) | ((value
& 0xf0000000) >> 12);
8240 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
8241 the entry lives in .iplt and resolves to (*SYM_VALUE)().
8242 Otherwise, DYNINDX is the index of the symbol in the dynamic
8243 symbol table and SYM_VALUE is undefined.
8245 ROOT_PLT points to the offset of the PLT entry from the start of its
8246 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
8247 bookkeeping information.
8249 Returns FALSE if there was a problem. */
8252 elf32_arm_populate_plt_entry (bfd
*output_bfd
, struct bfd_link_info
*info
,
8253 union gotplt_union
*root_plt
,
8254 struct arm_plt_info
*arm_plt
,
8255 int dynindx
, bfd_vma sym_value
)
8257 struct elf32_arm_link_hash_table
*htab
;
8263 Elf_Internal_Rela rel
;
8264 bfd_vma plt_header_size
;
8265 bfd_vma got_header_size
;
8267 htab
= elf32_arm_hash_table (info
);
8269 /* Pick the appropriate sections and sizes. */
8272 splt
= htab
->root
.iplt
;
8273 sgot
= htab
->root
.igotplt
;
8274 srel
= htab
->root
.irelplt
;
8276 /* There are no reserved entries in .igot.plt, and no special
8277 first entry in .iplt. */
8278 got_header_size
= 0;
8279 plt_header_size
= 0;
8283 splt
= htab
->root
.splt
;
8284 sgot
= htab
->root
.sgotplt
;
8285 srel
= htab
->root
.srelplt
;
8287 got_header_size
= get_elf_backend_data (output_bfd
)->got_header_size
;
8288 plt_header_size
= htab
->plt_header_size
;
8290 BFD_ASSERT (splt
!= NULL
&& srel
!= NULL
);
8292 /* Fill in the entry in the procedure linkage table. */
8293 if (htab
->symbian_p
)
8295 BFD_ASSERT (dynindx
>= 0);
8296 put_arm_insn (htab
, output_bfd
,
8297 elf32_arm_symbian_plt_entry
[0],
8298 splt
->contents
+ root_plt
->offset
);
8299 bfd_put_32 (output_bfd
,
8300 elf32_arm_symbian_plt_entry
[1],
8301 splt
->contents
+ root_plt
->offset
+ 4);
8303 /* Fill in the entry in the .rel.plt section. */
8304 rel
.r_offset
= (splt
->output_section
->vma
8305 + splt
->output_offset
8306 + root_plt
->offset
+ 4);
8307 rel
.r_info
= ELF32_R_INFO (dynindx
, R_ARM_GLOB_DAT
);
8309 /* Get the index in the procedure linkage table which
8310 corresponds to this symbol. This is the index of this symbol
8311 in all the symbols for which we are making plt entries. The
8312 first entry in the procedure linkage table is reserved. */
8313 plt_index
= ((root_plt
->offset
- plt_header_size
)
8314 / htab
->plt_entry_size
);
8318 bfd_vma got_offset
, got_address
, plt_address
;
8319 bfd_vma got_displacement
, initial_got_entry
;
8322 BFD_ASSERT (sgot
!= NULL
);
8324 /* Get the offset into the .(i)got.plt table of the entry that
8325 corresponds to this function. */
8326 got_offset
= (arm_plt
->got_offset
& -2);
8328 /* Get the index in the procedure linkage table which
8329 corresponds to this symbol. This is the index of this symbol
8330 in all the symbols for which we are making plt entries.
8331 After the reserved .got.plt entries, all symbols appear in
8332 the same order as in .plt. */
8333 plt_index
= (got_offset
- got_header_size
) / 4;
8335 /* Calculate the address of the GOT entry. */
8336 got_address
= (sgot
->output_section
->vma
8337 + sgot
->output_offset
8340 /* ...and the address of the PLT entry. */
8341 plt_address
= (splt
->output_section
->vma
8342 + splt
->output_offset
8343 + root_plt
->offset
);
8345 ptr
= splt
->contents
+ root_plt
->offset
;
8346 if (htab
->vxworks_p
&& bfd_link_pic (info
))
8351 for (i
= 0; i
!= htab
->plt_entry_size
/ 4; i
++, ptr
+= 4)
8353 val
= elf32_arm_vxworks_shared_plt_entry
[i
];
8355 val
|= got_address
- sgot
->output_section
->vma
;
8357 val
|= plt_index
* RELOC_SIZE (htab
);
8358 if (i
== 2 || i
== 5)
8359 bfd_put_32 (output_bfd
, val
, ptr
);
8361 put_arm_insn (htab
, output_bfd
, val
, ptr
);
8364 else if (htab
->vxworks_p
)
8369 for (i
= 0; i
!= htab
->plt_entry_size
/ 4; i
++, ptr
+= 4)
8371 val
= elf32_arm_vxworks_exec_plt_entry
[i
];
8375 val
|= 0xffffff & -((root_plt
->offset
+ i
* 4 + 8) >> 2);
8377 val
|= plt_index
* RELOC_SIZE (htab
);
8378 if (i
== 2 || i
== 5)
8379 bfd_put_32 (output_bfd
, val
, ptr
);
8381 put_arm_insn (htab
, output_bfd
, val
, ptr
);
8384 loc
= (htab
->srelplt2
->contents
8385 + (plt_index
* 2 + 1) * RELOC_SIZE (htab
));
8387 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
8388 referencing the GOT for this PLT entry. */
8389 rel
.r_offset
= plt_address
+ 8;
8390 rel
.r_info
= ELF32_R_INFO (htab
->root
.hgot
->indx
, R_ARM_ABS32
);
8391 rel
.r_addend
= got_offset
;
8392 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, loc
);
8393 loc
+= RELOC_SIZE (htab
);
8395 /* Create the R_ARM_ABS32 relocation referencing the
8396 beginning of the PLT for this GOT entry. */
8397 rel
.r_offset
= got_address
;
8398 rel
.r_info
= ELF32_R_INFO (htab
->root
.hplt
->indx
, R_ARM_ABS32
);
8400 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, loc
);
8402 else if (htab
->nacl_p
)
8404 /* Calculate the displacement between the PLT slot and the
8405 common tail that's part of the special initial PLT slot. */
8406 int32_t tail_displacement
8407 = ((splt
->output_section
->vma
+ splt
->output_offset
8408 + ARM_NACL_PLT_TAIL_OFFSET
)
8409 - (plt_address
+ htab
->plt_entry_size
+ 4));
8410 BFD_ASSERT ((tail_displacement
& 3) == 0);
8411 tail_displacement
>>= 2;
8413 BFD_ASSERT ((tail_displacement
& 0xff000000) == 0
8414 || (-tail_displacement
& 0xff000000) == 0);
8416 /* Calculate the displacement between the PLT slot and the entry
8417 in the GOT. The offset accounts for the value produced by
8418 adding to pc in the penultimate instruction of the PLT stub. */
8419 got_displacement
= (got_address
8420 - (plt_address
+ htab
->plt_entry_size
));
8422 /* NaCl does not support interworking at all. */
8423 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info
, arm_plt
));
8425 put_arm_insn (htab
, output_bfd
,
8426 elf32_arm_nacl_plt_entry
[0]
8427 | arm_movw_immediate (got_displacement
),
8429 put_arm_insn (htab
, output_bfd
,
8430 elf32_arm_nacl_plt_entry
[1]
8431 | arm_movt_immediate (got_displacement
),
8433 put_arm_insn (htab
, output_bfd
,
8434 elf32_arm_nacl_plt_entry
[2],
8436 put_arm_insn (htab
, output_bfd
,
8437 elf32_arm_nacl_plt_entry
[3]
8438 | (tail_displacement
& 0x00ffffff),
8441 else if (using_thumb_only (htab
))
8443 /* PR ld/16017: Generate thumb only PLT entries. */
8444 if (!using_thumb2 (htab
))
8446 /* FIXME: We ought to be able to generate thumb-1 PLT
8448 _bfd_error_handler (_("%B: Warning: thumb-1 mode PLT generation not currently supported"),
8453 /* Calculate the displacement between the PLT slot and the entry in
8454 the GOT. The 12-byte offset accounts for the value produced by
8455 adding to pc in the 3rd instruction of the PLT stub. */
8456 got_displacement
= got_address
- (plt_address
+ 12);
8458 /* As we are using 32 bit instructions we have to use 'put_arm_insn'
8459 instead of 'put_thumb_insn'. */
8460 put_arm_insn (htab
, output_bfd
,
8461 elf32_thumb2_plt_entry
[0]
8462 | ((got_displacement
& 0x000000ff) << 16)
8463 | ((got_displacement
& 0x00000700) << 20)
8464 | ((got_displacement
& 0x00000800) >> 1)
8465 | ((got_displacement
& 0x0000f000) >> 12),
8467 put_arm_insn (htab
, output_bfd
,
8468 elf32_thumb2_plt_entry
[1]
8469 | ((got_displacement
& 0x00ff0000) )
8470 | ((got_displacement
& 0x07000000) << 4)
8471 | ((got_displacement
& 0x08000000) >> 17)
8472 | ((got_displacement
& 0xf0000000) >> 28),
8474 put_arm_insn (htab
, output_bfd
,
8475 elf32_thumb2_plt_entry
[2],
8477 put_arm_insn (htab
, output_bfd
,
8478 elf32_thumb2_plt_entry
[3],
8483 /* Calculate the displacement between the PLT slot and the
8484 entry in the GOT. The eight-byte offset accounts for the
8485 value produced by adding to pc in the first instruction
8487 got_displacement
= got_address
- (plt_address
+ 8);
8489 if (elf32_arm_plt_needs_thumb_stub_p (info
, arm_plt
))
8491 put_thumb_insn (htab
, output_bfd
,
8492 elf32_arm_plt_thumb_stub
[0], ptr
- 4);
8493 put_thumb_insn (htab
, output_bfd
,
8494 elf32_arm_plt_thumb_stub
[1], ptr
- 2);
8497 if (!elf32_arm_use_long_plt_entry
)
8499 BFD_ASSERT ((got_displacement
& 0xf0000000) == 0);
8501 put_arm_insn (htab
, output_bfd
,
8502 elf32_arm_plt_entry_short
[0]
8503 | ((got_displacement
& 0x0ff00000) >> 20),
8505 put_arm_insn (htab
, output_bfd
,
8506 elf32_arm_plt_entry_short
[1]
8507 | ((got_displacement
& 0x000ff000) >> 12),
8509 put_arm_insn (htab
, output_bfd
,
8510 elf32_arm_plt_entry_short
[2]
8511 | (got_displacement
& 0x00000fff),
8513 #ifdef FOUR_WORD_PLT
8514 bfd_put_32 (output_bfd
, elf32_arm_plt_entry_short
[3], ptr
+ 12);
8519 put_arm_insn (htab
, output_bfd
,
8520 elf32_arm_plt_entry_long
[0]
8521 | ((got_displacement
& 0xf0000000) >> 28),
8523 put_arm_insn (htab
, output_bfd
,
8524 elf32_arm_plt_entry_long
[1]
8525 | ((got_displacement
& 0x0ff00000) >> 20),
8527 put_arm_insn (htab
, output_bfd
,
8528 elf32_arm_plt_entry_long
[2]
8529 | ((got_displacement
& 0x000ff000) >> 12),
8531 put_arm_insn (htab
, output_bfd
,
8532 elf32_arm_plt_entry_long
[3]
8533 | (got_displacement
& 0x00000fff),
8538 /* Fill in the entry in the .rel(a).(i)plt section. */
8539 rel
.r_offset
= got_address
;
8543 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
8544 The dynamic linker or static executable then calls SYM_VALUE
8545 to determine the correct run-time value of the .igot.plt entry. */
8546 rel
.r_info
= ELF32_R_INFO (0, R_ARM_IRELATIVE
);
8547 initial_got_entry
= sym_value
;
8551 rel
.r_info
= ELF32_R_INFO (dynindx
, R_ARM_JUMP_SLOT
);
8552 initial_got_entry
= (splt
->output_section
->vma
8553 + splt
->output_offset
);
8556 /* Fill in the entry in the global offset table. */
8557 bfd_put_32 (output_bfd
, initial_got_entry
,
8558 sgot
->contents
+ got_offset
);
8562 elf32_arm_add_dynreloc (output_bfd
, info
, srel
, &rel
);
8565 loc
= srel
->contents
+ plt_index
* RELOC_SIZE (htab
);
8566 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, loc
);
8572 /* Some relocations map to different relocations depending on the
8573 target. Return the real relocation. */
8576 arm_real_reloc_type (struct elf32_arm_link_hash_table
* globals
,
8582 if (globals
->target1_is_rel
)
8588 return globals
->target2_reloc
;
8595 /* Return the base VMA address which should be subtracted from real addresses
8596 when resolving @dtpoff relocation.
8597 This is PT_TLS segment p_vaddr. */
8600 dtpoff_base (struct bfd_link_info
*info
)
8602 /* If tls_sec is NULL, we should have signalled an error already. */
8603 if (elf_hash_table (info
)->tls_sec
== NULL
)
8605 return elf_hash_table (info
)->tls_sec
->vma
;
8608 /* Return the relocation value for @tpoff relocation
8609 if STT_TLS virtual address is ADDRESS. */
8612 tpoff (struct bfd_link_info
*info
, bfd_vma address
)
8614 struct elf_link_hash_table
*htab
= elf_hash_table (info
);
8617 /* If tls_sec is NULL, we should have signalled an error already. */
8618 if (htab
->tls_sec
== NULL
)
8620 base
= align_power ((bfd_vma
) TCB_SIZE
, htab
->tls_sec
->alignment_power
);
8621 return address
- htab
->tls_sec
->vma
+ base
;
8624 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
8625 VALUE is the relocation value. */
8627 static bfd_reloc_status_type
8628 elf32_arm_abs12_reloc (bfd
*abfd
, void *data
, bfd_vma value
)
8631 return bfd_reloc_overflow
;
8633 value
|= bfd_get_32 (abfd
, data
) & 0xfffff000;
8634 bfd_put_32 (abfd
, value
, data
);
8635 return bfd_reloc_ok
;
8638 /* Handle TLS relaxations. Relaxing is possible for symbols that use
8639 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
8640 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
8642 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
8643 is to then call final_link_relocate. Return other values in the
8646 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
8647 the pre-relaxed code. It would be nice if the relocs were updated
8648 to match the optimization. */
8650 static bfd_reloc_status_type
8651 elf32_arm_tls_relax (struct elf32_arm_link_hash_table
*globals
,
8652 bfd
*input_bfd
, asection
*input_sec
, bfd_byte
*contents
,
8653 Elf_Internal_Rela
*rel
, unsigned long is_local
)
8657 switch (ELF32_R_TYPE (rel
->r_info
))
8660 return bfd_reloc_notsupported
;
8662 case R_ARM_TLS_GOTDESC
:
8667 insn
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
);
8669 insn
-= 5; /* THUMB */
8671 insn
-= 8; /* ARM */
8673 bfd_put_32 (input_bfd
, insn
, contents
+ rel
->r_offset
);
8674 return bfd_reloc_continue
;
8676 case R_ARM_THM_TLS_DESCSEQ
:
8678 insn
= bfd_get_16 (input_bfd
, contents
+ rel
->r_offset
);
8679 if ((insn
& 0xff78) == 0x4478) /* add rx, pc */
8683 bfd_put_16 (input_bfd
, 0x46c0, contents
+ rel
->r_offset
);
8685 else if ((insn
& 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
8689 bfd_put_16 (input_bfd
, 0x46c0, contents
+ rel
->r_offset
);
8692 bfd_put_16 (input_bfd
, insn
& 0xf83f, contents
+ rel
->r_offset
);
8694 else if ((insn
& 0xff87) == 0x4780) /* blx rx */
8698 bfd_put_16 (input_bfd
, 0x46c0, contents
+ rel
->r_offset
);
8701 bfd_put_16 (input_bfd
, 0x4600 | (insn
& 0x78),
8702 contents
+ rel
->r_offset
);
8706 if ((insn
& 0xf000) == 0xf000 || (insn
& 0xf800) == 0xe800)
8707 /* It's a 32 bit instruction, fetch the rest of it for
8708 error generation. */
8710 | bfd_get_16 (input_bfd
, contents
+ rel
->r_offset
+ 2);
8711 (*_bfd_error_handler
)
8712 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"),
8713 input_bfd
, input_sec
, (unsigned long)rel
->r_offset
, insn
);
8714 return bfd_reloc_notsupported
;
8718 case R_ARM_TLS_DESCSEQ
:
8720 insn
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
);
8721 if ((insn
& 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
8725 bfd_put_32 (input_bfd
, 0xe1a00000 | (insn
& 0xffff),
8726 contents
+ rel
->r_offset
);
8728 else if ((insn
& 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
8732 bfd_put_32 (input_bfd
, 0xe1a00000, contents
+ rel
->r_offset
);
8735 bfd_put_32 (input_bfd
, insn
& 0xfffff000,
8736 contents
+ rel
->r_offset
);
8738 else if ((insn
& 0xfffffff0) == 0xe12fff30) /* blx rx */
8742 bfd_put_32 (input_bfd
, 0xe1a00000, contents
+ rel
->r_offset
);
8745 bfd_put_32 (input_bfd
, 0xe1a00000 | (insn
& 0xf),
8746 contents
+ rel
->r_offset
);
8750 (*_bfd_error_handler
)
8751 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline"),
8752 input_bfd
, input_sec
, (unsigned long)rel
->r_offset
, insn
);
8753 return bfd_reloc_notsupported
;
8757 case R_ARM_TLS_CALL
:
8758 /* GD->IE relaxation, turn the instruction into 'nop' or
8759 'ldr r0, [pc,r0]' */
8760 insn
= is_local
? 0xe1a00000 : 0xe79f0000;
8761 bfd_put_32 (input_bfd
, insn
, contents
+ rel
->r_offset
);
8764 case R_ARM_THM_TLS_CALL
:
8765 /* GD->IE relaxation. */
8767 /* add r0,pc; ldr r0, [r0] */
8769 else if (arch_has_thumb2_nop (globals
))
8776 bfd_put_16 (input_bfd
, insn
>> 16, contents
+ rel
->r_offset
);
8777 bfd_put_16 (input_bfd
, insn
& 0xffff, contents
+ rel
->r_offset
+ 2);
8780 return bfd_reloc_ok
;
8783 /* For a given value of n, calculate the value of G_n as required to
8784 deal with group relocations. We return it in the form of an
8785 encoded constant-and-rotation, together with the final residual. If n is
8786 specified as less than zero, then final_residual is filled with the
8787 input value and no further action is performed. */
8790 calculate_group_reloc_mask (bfd_vma value
, int n
, bfd_vma
*final_residual
)
8794 bfd_vma encoded_g_n
= 0;
8795 bfd_vma residual
= value
; /* Also known as Y_n. */
8797 for (current_n
= 0; current_n
<= n
; current_n
++)
8801 /* Calculate which part of the value to mask. */
8808 /* Determine the most significant bit in the residual and
8809 align the resulting value to a 2-bit boundary. */
8810 for (msb
= 30; msb
>= 0; msb
-= 2)
8811 if (residual
& (3 << msb
))
8814 /* The desired shift is now (msb - 6), or zero, whichever
8821 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
8822 g_n
= residual
& (0xff << shift
);
8823 encoded_g_n
= (g_n
>> shift
)
8824 | ((g_n
<= 0xff ? 0 : (32 - shift
) / 2) << 8);
8826 /* Calculate the residual for the next time around. */
8830 *final_residual
= residual
;
8835 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
8836 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
8839 identify_add_or_sub (bfd_vma insn
)
8841 int opcode
= insn
& 0x1e00000;
8843 if (opcode
== 1 << 23) /* ADD */
8846 if (opcode
== 1 << 22) /* SUB */
8852 /* Perform a relocation as part of a final link. */
8854 static bfd_reloc_status_type
8855 elf32_arm_final_link_relocate (reloc_howto_type
* howto
,
8858 asection
* input_section
,
8859 bfd_byte
* contents
,
8860 Elf_Internal_Rela
* rel
,
8862 struct bfd_link_info
* info
,
8864 const char * sym_name
,
8865 unsigned char st_type
,
8866 enum arm_st_branch_type branch_type
,
8867 struct elf_link_hash_entry
* h
,
8868 bfd_boolean
* unresolved_reloc_p
,
8869 char ** error_message
)
8871 unsigned long r_type
= howto
->type
;
8872 unsigned long r_symndx
;
8873 bfd_byte
* hit_data
= contents
+ rel
->r_offset
;
8874 bfd_vma
* local_got_offsets
;
8875 bfd_vma
* local_tlsdesc_gotents
;
8878 asection
* sreloc
= NULL
;
8881 bfd_signed_vma signed_addend
;
8882 unsigned char dynreloc_st_type
;
8883 bfd_vma dynreloc_value
;
8884 struct elf32_arm_link_hash_table
* globals
;
8885 struct elf32_arm_link_hash_entry
*eh
;
8886 union gotplt_union
*root_plt
;
8887 struct arm_plt_info
*arm_plt
;
8889 bfd_vma gotplt_offset
;
8890 bfd_boolean has_iplt_entry
;
8892 globals
= elf32_arm_hash_table (info
);
8893 if (globals
== NULL
)
8894 return bfd_reloc_notsupported
;
8896 BFD_ASSERT (is_arm_elf (input_bfd
));
8898 /* Some relocation types map to different relocations depending on the
8899 target. We pick the right one here. */
8900 r_type
= arm_real_reloc_type (globals
, r_type
);
8902 /* It is possible to have linker relaxations on some TLS access
8903 models. Update our information here. */
8904 r_type
= elf32_arm_tls_transition (info
, r_type
, h
);
8906 if (r_type
!= howto
->type
)
8907 howto
= elf32_arm_howto_from_type (r_type
);
8909 eh
= (struct elf32_arm_link_hash_entry
*) h
;
8910 sgot
= globals
->root
.sgot
;
8911 local_got_offsets
= elf_local_got_offsets (input_bfd
);
8912 local_tlsdesc_gotents
= elf32_arm_local_tlsdesc_gotent (input_bfd
);
8914 if (globals
->root
.dynamic_sections_created
)
8915 srelgot
= globals
->root
.srelgot
;
8919 r_symndx
= ELF32_R_SYM (rel
->r_info
);
8921 if (globals
->use_rel
)
8923 addend
= bfd_get_32 (input_bfd
, hit_data
) & howto
->src_mask
;
8925 if (addend
& ((howto
->src_mask
+ 1) >> 1))
8928 signed_addend
&= ~ howto
->src_mask
;
8929 signed_addend
|= addend
;
8932 signed_addend
= addend
;
8935 addend
= signed_addend
= rel
->r_addend
;
8937 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
8938 are resolving a function call relocation. */
8939 if (using_thumb_only (globals
)
8940 && (r_type
== R_ARM_THM_CALL
8941 || r_type
== R_ARM_THM_JUMP24
)
8942 && branch_type
== ST_BRANCH_TO_ARM
)
8943 branch_type
= ST_BRANCH_TO_THUMB
;
8945 /* Record the symbol information that should be used in dynamic
8947 dynreloc_st_type
= st_type
;
8948 dynreloc_value
= value
;
8949 if (branch_type
== ST_BRANCH_TO_THUMB
)
8950 dynreloc_value
|= 1;
8952 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
8953 VALUE appropriately for relocations that we resolve at link time. */
8954 has_iplt_entry
= FALSE
;
8955 if (elf32_arm_get_plt_info (input_bfd
, eh
, r_symndx
, &root_plt
, &arm_plt
)
8956 && root_plt
->offset
!= (bfd_vma
) -1)
8958 plt_offset
= root_plt
->offset
;
8959 gotplt_offset
= arm_plt
->got_offset
;
8961 if (h
== NULL
|| eh
->is_iplt
)
8963 has_iplt_entry
= TRUE
;
8964 splt
= globals
->root
.iplt
;
8966 /* Populate .iplt entries here, because not all of them will
8967 be seen by finish_dynamic_symbol. The lower bit is set if
8968 we have already populated the entry. */
8973 if (elf32_arm_populate_plt_entry (output_bfd
, info
, root_plt
, arm_plt
,
8974 -1, dynreloc_value
))
8975 root_plt
->offset
|= 1;
8977 return bfd_reloc_notsupported
;
8980 /* Static relocations always resolve to the .iplt entry. */
8982 value
= (splt
->output_section
->vma
8983 + splt
->output_offset
8985 branch_type
= ST_BRANCH_TO_ARM
;
8987 /* If there are non-call relocations that resolve to the .iplt
8988 entry, then all dynamic ones must too. */
8989 if (arm_plt
->noncall_refcount
!= 0)
8991 dynreloc_st_type
= st_type
;
8992 dynreloc_value
= value
;
8996 /* We populate the .plt entry in finish_dynamic_symbol. */
8997 splt
= globals
->root
.splt
;
9002 plt_offset
= (bfd_vma
) -1;
9003 gotplt_offset
= (bfd_vma
) -1;
9009 /* We don't need to find a value for this symbol. It's just a
9011 *unresolved_reloc_p
= FALSE
;
9012 return bfd_reloc_ok
;
9015 if (!globals
->vxworks_p
)
9016 return elf32_arm_abs12_reloc (input_bfd
, hit_data
, value
+ addend
);
9020 case R_ARM_ABS32_NOI
:
9022 case R_ARM_REL32_NOI
:
9028 /* Handle relocations which should use the PLT entry. ABS32/REL32
9029 will use the symbol's value, which may point to a PLT entry, but we
9030 don't need to handle that here. If we created a PLT entry, all
9031 branches in this object should go to it, except if the PLT is too
9032 far away, in which case a long branch stub should be inserted. */
9033 if ((r_type
!= R_ARM_ABS32
&& r_type
!= R_ARM_REL32
9034 && r_type
!= R_ARM_ABS32_NOI
&& r_type
!= R_ARM_REL32_NOI
9035 && r_type
!= R_ARM_CALL
9036 && r_type
!= R_ARM_JUMP24
9037 && r_type
!= R_ARM_PLT32
)
9038 && plt_offset
!= (bfd_vma
) -1)
9040 /* If we've created a .plt section, and assigned a PLT entry
9041 to this function, it must either be a STT_GNU_IFUNC reference
9042 or not be known to bind locally. In other cases, we should
9043 have cleared the PLT entry by now. */
9044 BFD_ASSERT (has_iplt_entry
|| !SYMBOL_CALLS_LOCAL (info
, h
));
9046 value
= (splt
->output_section
->vma
9047 + splt
->output_offset
9049 *unresolved_reloc_p
= FALSE
;
9050 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
9051 contents
, rel
->r_offset
, value
,
9055 /* When generating a shared object or relocatable executable, these
9056 relocations are copied into the output file to be resolved at
9058 if ((bfd_link_pic (info
)
9059 || globals
->root
.is_relocatable_executable
)
9060 && (input_section
->flags
& SEC_ALLOC
)
9061 && !(globals
->vxworks_p
9062 && strcmp (input_section
->output_section
->name
,
9064 && ((r_type
!= R_ARM_REL32
&& r_type
!= R_ARM_REL32_NOI
)
9065 || !SYMBOL_CALLS_LOCAL (info
, h
))
9066 && !(input_bfd
== globals
->stub_bfd
9067 && strstr (input_section
->name
, STUB_SUFFIX
))
9069 || ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
9070 || h
->root
.type
!= bfd_link_hash_undefweak
)
9071 && r_type
!= R_ARM_PC24
9072 && r_type
!= R_ARM_CALL
9073 && r_type
!= R_ARM_JUMP24
9074 && r_type
!= R_ARM_PREL31
9075 && r_type
!= R_ARM_PLT32
)
9077 Elf_Internal_Rela outrel
;
9078 bfd_boolean skip
, relocate
;
9080 if ((r_type
== R_ARM_REL32
|| r_type
== R_ARM_REL32_NOI
)
9083 char *v
= _("shared object");
9085 if (bfd_link_executable (info
))
9086 v
= _("PIE executable");
9088 (*_bfd_error_handler
)
9089 (_("%B: relocation %s against external or undefined symbol `%s'"
9090 " can not be used when making a %s; recompile with -fPIC"), input_bfd
,
9091 elf32_arm_howto_table_1
[r_type
].name
, h
->root
.root
.string
, v
);
9092 return bfd_reloc_notsupported
;
9095 *unresolved_reloc_p
= FALSE
;
9097 if (sreloc
== NULL
&& globals
->root
.dynamic_sections_created
)
9099 sreloc
= _bfd_elf_get_dynamic_reloc_section (input_bfd
, input_section
,
9100 ! globals
->use_rel
);
9103 return bfd_reloc_notsupported
;
9109 outrel
.r_addend
= addend
;
9111 _bfd_elf_section_offset (output_bfd
, info
, input_section
,
9113 if (outrel
.r_offset
== (bfd_vma
) -1)
9115 else if (outrel
.r_offset
== (bfd_vma
) -2)
9116 skip
= TRUE
, relocate
= TRUE
;
9117 outrel
.r_offset
+= (input_section
->output_section
->vma
9118 + input_section
->output_offset
);
9121 memset (&outrel
, 0, sizeof outrel
);
9124 && (!bfd_link_pic (info
)
9125 || !SYMBOLIC_BIND (info
, h
)
9126 || !h
->def_regular
))
9127 outrel
.r_info
= ELF32_R_INFO (h
->dynindx
, r_type
);
9132 /* This symbol is local, or marked to become local. */
9133 BFD_ASSERT (r_type
== R_ARM_ABS32
|| r_type
== R_ARM_ABS32_NOI
);
9134 if (globals
->symbian_p
)
9138 /* On Symbian OS, the data segment and text segement
9139 can be relocated independently. Therefore, we
9140 must indicate the segment to which this
9141 relocation is relative. The BPABI allows us to
9142 use any symbol in the right segment; we just use
9143 the section symbol as it is convenient. (We
9144 cannot use the symbol given by "h" directly as it
9145 will not appear in the dynamic symbol table.)
9147 Note that the dynamic linker ignores the section
9148 symbol value, so we don't subtract osec->vma
9149 from the emitted reloc addend. */
9151 osec
= sym_sec
->output_section
;
9153 osec
= input_section
->output_section
;
9154 symbol
= elf_section_data (osec
)->dynindx
;
9157 struct elf_link_hash_table
*htab
= elf_hash_table (info
);
9159 if ((osec
->flags
& SEC_READONLY
) == 0
9160 && htab
->data_index_section
!= NULL
)
9161 osec
= htab
->data_index_section
;
9163 osec
= htab
->text_index_section
;
9164 symbol
= elf_section_data (osec
)->dynindx
;
9166 BFD_ASSERT (symbol
!= 0);
9169 /* On SVR4-ish systems, the dynamic loader cannot
9170 relocate the text and data segments independently,
9171 so the symbol does not matter. */
9173 if (dynreloc_st_type
== STT_GNU_IFUNC
)
9174 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
9175 to the .iplt entry. Instead, every non-call reference
9176 must use an R_ARM_IRELATIVE relocation to obtain the
9177 correct run-time address. */
9178 outrel
.r_info
= ELF32_R_INFO (symbol
, R_ARM_IRELATIVE
);
9180 outrel
.r_info
= ELF32_R_INFO (symbol
, R_ARM_RELATIVE
);
9181 if (globals
->use_rel
)
9184 outrel
.r_addend
+= dynreloc_value
;
9187 elf32_arm_add_dynreloc (output_bfd
, info
, sreloc
, &outrel
);
9189 /* If this reloc is against an external symbol, we do not want to
9190 fiddle with the addend. Otherwise, we need to include the symbol
9191 value so that it becomes an addend for the dynamic reloc. */
9193 return bfd_reloc_ok
;
9195 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
9196 contents
, rel
->r_offset
,
9197 dynreloc_value
, (bfd_vma
) 0);
9199 else switch (r_type
)
9202 return elf32_arm_abs12_reloc (input_bfd
, hit_data
, value
+ addend
);
9204 case R_ARM_XPC25
: /* Arm BLX instruction. */
9207 case R_ARM_PC24
: /* Arm B/BL instruction. */
9210 struct elf32_arm_stub_hash_entry
*stub_entry
= NULL
;
9212 if (r_type
== R_ARM_XPC25
)
9214 /* Check for Arm calling Arm function. */
9215 /* FIXME: Should we translate the instruction into a BL
9216 instruction instead ? */
9217 if (branch_type
!= ST_BRANCH_TO_THUMB
)
9218 (*_bfd_error_handler
)
9219 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
9221 h
? h
->root
.root
.string
: "(local)");
9223 else if (r_type
== R_ARM_PC24
)
9225 /* Check for Arm calling Thumb function. */
9226 if (branch_type
== ST_BRANCH_TO_THUMB
)
9228 if (elf32_arm_to_thumb_stub (info
, sym_name
, input_bfd
,
9229 output_bfd
, input_section
,
9230 hit_data
, sym_sec
, rel
->r_offset
,
9231 signed_addend
, value
,
9233 return bfd_reloc_ok
;
9235 return bfd_reloc_dangerous
;
9239 /* Check if a stub has to be inserted because the
9240 destination is too far or we are changing mode. */
9241 if ( r_type
== R_ARM_CALL
9242 || r_type
== R_ARM_JUMP24
9243 || r_type
== R_ARM_PLT32
)
9245 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
9246 struct elf32_arm_link_hash_entry
*hash
;
9248 hash
= (struct elf32_arm_link_hash_entry
*) h
;
9249 stub_type
= arm_type_of_stub (info
, input_section
, rel
,
9250 st_type
, &branch_type
,
9251 hash
, value
, sym_sec
,
9252 input_bfd
, sym_name
);
9254 if (stub_type
!= arm_stub_none
)
9256 /* The target is out of reach, so redirect the
9257 branch to the local stub for this function. */
9258 stub_entry
= elf32_arm_get_stub_entry (input_section
,
9263 if (stub_entry
!= NULL
)
9264 value
= (stub_entry
->stub_offset
9265 + stub_entry
->stub_sec
->output_offset
9266 + stub_entry
->stub_sec
->output_section
->vma
);
9268 if (plt_offset
!= (bfd_vma
) -1)
9269 *unresolved_reloc_p
= FALSE
;
9274 /* If the call goes through a PLT entry, make sure to
9275 check distance to the right destination address. */
9276 if (plt_offset
!= (bfd_vma
) -1)
9278 value
= (splt
->output_section
->vma
9279 + splt
->output_offset
9281 *unresolved_reloc_p
= FALSE
;
9282 /* The PLT entry is in ARM mode, regardless of the
9284 branch_type
= ST_BRANCH_TO_ARM
;
9289 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
9291 S is the address of the symbol in the relocation.
9292 P is address of the instruction being relocated.
9293 A is the addend (extracted from the instruction) in bytes.
9295 S is held in 'value'.
9296 P is the base address of the section containing the
9297 instruction plus the offset of the reloc into that
9299 (input_section->output_section->vma +
9300 input_section->output_offset +
9302 A is the addend, converted into bytes, ie:
9305 Note: None of these operations have knowledge of the pipeline
9306 size of the processor, thus it is up to the assembler to
9307 encode this information into the addend. */
9308 value
-= (input_section
->output_section
->vma
9309 + input_section
->output_offset
);
9310 value
-= rel
->r_offset
;
9311 if (globals
->use_rel
)
9312 value
+= (signed_addend
<< howto
->size
);
9314 /* RELA addends do not have to be adjusted by howto->size. */
9315 value
+= signed_addend
;
9317 signed_addend
= value
;
9318 signed_addend
>>= howto
->rightshift
;
9320 /* A branch to an undefined weak symbol is turned into a jump to
9321 the next instruction unless a PLT entry will be created.
9322 Do the same for local undefined symbols (but not for STN_UNDEF).
9323 The jump to the next instruction is optimized as a NOP depending
9324 on the architecture. */
9325 if (h
? (h
->root
.type
== bfd_link_hash_undefweak
9326 && plt_offset
== (bfd_vma
) -1)
9327 : r_symndx
!= STN_UNDEF
&& bfd_is_und_section (sym_sec
))
9329 value
= (bfd_get_32 (input_bfd
, hit_data
) & 0xf0000000);
9331 if (arch_has_arm_nop (globals
))
9332 value
|= 0x0320f000;
9334 value
|= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
9338 /* Perform a signed range check. */
9339 if ( signed_addend
> ((bfd_signed_vma
) (howto
->dst_mask
>> 1))
9340 || signed_addend
< - ((bfd_signed_vma
) ((howto
->dst_mask
+ 1) >> 1)))
9341 return bfd_reloc_overflow
;
9343 addend
= (value
& 2);
9345 value
= (signed_addend
& howto
->dst_mask
)
9346 | (bfd_get_32 (input_bfd
, hit_data
) & (~ howto
->dst_mask
));
9348 if (r_type
== R_ARM_CALL
)
9350 /* Set the H bit in the BLX instruction. */
9351 if (branch_type
== ST_BRANCH_TO_THUMB
)
9356 value
&= ~(bfd_vma
)(1 << 24);
9359 /* Select the correct instruction (BL or BLX). */
9360 /* Only if we are not handling a BL to a stub. In this
9361 case, mode switching is performed by the stub. */
9362 if (branch_type
== ST_BRANCH_TO_THUMB
&& !stub_entry
)
9364 else if (stub_entry
|| branch_type
!= ST_BRANCH_UNKNOWN
)
9366 value
&= ~(bfd_vma
)(1 << 28);
9376 if (branch_type
== ST_BRANCH_TO_THUMB
)
9380 case R_ARM_ABS32_NOI
:
9386 if (branch_type
== ST_BRANCH_TO_THUMB
)
9388 value
-= (input_section
->output_section
->vma
9389 + input_section
->output_offset
+ rel
->r_offset
);
9392 case R_ARM_REL32_NOI
:
9394 value
-= (input_section
->output_section
->vma
9395 + input_section
->output_offset
+ rel
->r_offset
);
9399 value
-= (input_section
->output_section
->vma
9400 + input_section
->output_offset
+ rel
->r_offset
);
9401 value
+= signed_addend
;
9402 if (! h
|| h
->root
.type
!= bfd_link_hash_undefweak
)
9404 /* Check for overflow. */
9405 if ((value
^ (value
>> 1)) & (1 << 30))
9406 return bfd_reloc_overflow
;
9408 value
&= 0x7fffffff;
9409 value
|= (bfd_get_32 (input_bfd
, hit_data
) & 0x80000000);
9410 if (branch_type
== ST_BRANCH_TO_THUMB
)
9415 bfd_put_32 (input_bfd
, value
, hit_data
);
9416 return bfd_reloc_ok
;
9419 /* PR 16202: Refectch the addend using the correct size. */
9420 if (globals
->use_rel
)
9421 addend
= bfd_get_8 (input_bfd
, hit_data
);
9424 /* There is no way to tell whether the user intended to use a signed or
9425 unsigned addend. When checking for overflow we accept either,
9426 as specified by the AAELF. */
9427 if ((long) value
> 0xff || (long) value
< -0x80)
9428 return bfd_reloc_overflow
;
9430 bfd_put_8 (input_bfd
, value
, hit_data
);
9431 return bfd_reloc_ok
;
9434 /* PR 16202: Refectch the addend using the correct size. */
9435 if (globals
->use_rel
)
9436 addend
= bfd_get_16 (input_bfd
, hit_data
);
9439 /* See comment for R_ARM_ABS8. */
9440 if ((long) value
> 0xffff || (long) value
< -0x8000)
9441 return bfd_reloc_overflow
;
9443 bfd_put_16 (input_bfd
, value
, hit_data
);
9444 return bfd_reloc_ok
;
9446 case R_ARM_THM_ABS5
:
9447 /* Support ldr and str instructions for the thumb. */
9448 if (globals
->use_rel
)
9450 /* Need to refetch addend. */
9451 addend
= bfd_get_16 (input_bfd
, hit_data
) & howto
->src_mask
;
9452 /* ??? Need to determine shift amount from operand size. */
9453 addend
>>= howto
->rightshift
;
9457 /* ??? Isn't value unsigned? */
9458 if ((long) value
> 0x1f || (long) value
< -0x10)
9459 return bfd_reloc_overflow
;
9461 /* ??? Value needs to be properly shifted into place first. */
9462 value
|= bfd_get_16 (input_bfd
, hit_data
) & 0xf83f;
9463 bfd_put_16 (input_bfd
, value
, hit_data
);
9464 return bfd_reloc_ok
;
9466 case R_ARM_THM_ALU_PREL_11_0
:
9467 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
9470 bfd_signed_vma relocation
;
9472 insn
= (bfd_get_16 (input_bfd
, hit_data
) << 16)
9473 | bfd_get_16 (input_bfd
, hit_data
+ 2);
9475 if (globals
->use_rel
)
9477 signed_addend
= (insn
& 0xff) | ((insn
& 0x7000) >> 4)
9478 | ((insn
& (1 << 26)) >> 15);
9479 if (insn
& 0xf00000)
9480 signed_addend
= -signed_addend
;
9483 relocation
= value
+ signed_addend
;
9484 relocation
-= Pa (input_section
->output_section
->vma
9485 + input_section
->output_offset
9490 if (value
>= 0x1000)
9491 return bfd_reloc_overflow
;
9493 insn
= (insn
& 0xfb0f8f00) | (value
& 0xff)
9494 | ((value
& 0x700) << 4)
9495 | ((value
& 0x800) << 15);
9499 bfd_put_16 (input_bfd
, insn
>> 16, hit_data
);
9500 bfd_put_16 (input_bfd
, insn
& 0xffff, hit_data
+ 2);
9502 return bfd_reloc_ok
;
9506 /* PR 10073: This reloc is not generated by the GNU toolchain,
9507 but it is supported for compatibility with third party libraries
9508 generated by other compilers, specifically the ARM/IAR. */
9511 bfd_signed_vma relocation
;
9513 insn
= bfd_get_16 (input_bfd
, hit_data
);
9515 if (globals
->use_rel
)
9516 addend
= ((((insn
& 0x00ff) << 2) + 4) & 0x3ff) -4;
9518 relocation
= value
+ addend
;
9519 relocation
-= Pa (input_section
->output_section
->vma
9520 + input_section
->output_offset
9525 /* We do not check for overflow of this reloc. Although strictly
9526 speaking this is incorrect, it appears to be necessary in order
9527 to work with IAR generated relocs. Since GCC and GAS do not
9528 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
9529 a problem for them. */
9532 insn
= (insn
& 0xff00) | (value
>> 2);
9534 bfd_put_16 (input_bfd
, insn
, hit_data
);
9536 return bfd_reloc_ok
;
9539 case R_ARM_THM_PC12
:
9540 /* Corresponds to: ldr.w reg, [pc, #offset]. */
9543 bfd_signed_vma relocation
;
9545 insn
= (bfd_get_16 (input_bfd
, hit_data
) << 16)
9546 | bfd_get_16 (input_bfd
, hit_data
+ 2);
9548 if (globals
->use_rel
)
9550 signed_addend
= insn
& 0xfff;
9551 if (!(insn
& (1 << 23)))
9552 signed_addend
= -signed_addend
;
9555 relocation
= value
+ signed_addend
;
9556 relocation
-= Pa (input_section
->output_section
->vma
9557 + input_section
->output_offset
9562 if (value
>= 0x1000)
9563 return bfd_reloc_overflow
;
9565 insn
= (insn
& 0xff7ff000) | value
;
9566 if (relocation
>= 0)
9569 bfd_put_16 (input_bfd
, insn
>> 16, hit_data
);
9570 bfd_put_16 (input_bfd
, insn
& 0xffff, hit_data
+ 2);
9572 return bfd_reloc_ok
;
9575 case R_ARM_THM_XPC22
:
9576 case R_ARM_THM_CALL
:
9577 case R_ARM_THM_JUMP24
:
9578 /* Thumb BL (branch long instruction). */
9582 bfd_boolean overflow
= FALSE
;
9583 bfd_vma upper_insn
= bfd_get_16 (input_bfd
, hit_data
);
9584 bfd_vma lower_insn
= bfd_get_16 (input_bfd
, hit_data
+ 2);
9585 bfd_signed_vma reloc_signed_max
;
9586 bfd_signed_vma reloc_signed_min
;
9588 bfd_signed_vma signed_check
;
9590 const int thumb2
= using_thumb2 (globals
);
9592 /* A branch to an undefined weak symbol is turned into a jump to
9593 the next instruction unless a PLT entry will be created.
9594 The jump to the next instruction is optimized as a NOP.W for
9595 Thumb-2 enabled architectures. */
9596 if (h
&& h
->root
.type
== bfd_link_hash_undefweak
9597 && plt_offset
== (bfd_vma
) -1)
9599 if (arch_has_thumb2_nop (globals
))
9601 bfd_put_16 (input_bfd
, 0xf3af, hit_data
);
9602 bfd_put_16 (input_bfd
, 0x8000, hit_data
+ 2);
9606 bfd_put_16 (input_bfd
, 0xe000, hit_data
);
9607 bfd_put_16 (input_bfd
, 0xbf00, hit_data
+ 2);
9609 return bfd_reloc_ok
;
9612 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
9613 with Thumb-1) involving the J1 and J2 bits. */
9614 if (globals
->use_rel
)
9616 bfd_vma s
= (upper_insn
& (1 << 10)) >> 10;
9617 bfd_vma upper
= upper_insn
& 0x3ff;
9618 bfd_vma lower
= lower_insn
& 0x7ff;
9619 bfd_vma j1
= (lower_insn
& (1 << 13)) >> 13;
9620 bfd_vma j2
= (lower_insn
& (1 << 11)) >> 11;
9621 bfd_vma i1
= j1
^ s
? 0 : 1;
9622 bfd_vma i2
= j2
^ s
? 0 : 1;
9624 addend
= (i1
<< 23) | (i2
<< 22) | (upper
<< 12) | (lower
<< 1);
9626 addend
= (addend
| ((s
? 0 : 1) << 24)) - (1 << 24);
9628 signed_addend
= addend
;
9631 if (r_type
== R_ARM_THM_XPC22
)
9633 /* Check for Thumb to Thumb call. */
9634 /* FIXME: Should we translate the instruction into a BL
9635 instruction instead ? */
9636 if (branch_type
== ST_BRANCH_TO_THUMB
)
9637 (*_bfd_error_handler
)
9638 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
9640 h
? h
->root
.root
.string
: "(local)");
9644 /* If it is not a call to Thumb, assume call to Arm.
9645 If it is a call relative to a section name, then it is not a
9646 function call at all, but rather a long jump. Calls through
9647 the PLT do not require stubs. */
9648 if (branch_type
== ST_BRANCH_TO_ARM
&& plt_offset
== (bfd_vma
) -1)
9650 if (globals
->use_blx
&& r_type
== R_ARM_THM_CALL
)
9652 /* Convert BL to BLX. */
9653 lower_insn
= (lower_insn
& ~0x1000) | 0x0800;
9655 else if (( r_type
!= R_ARM_THM_CALL
)
9656 && (r_type
!= R_ARM_THM_JUMP24
))
9658 if (elf32_thumb_to_arm_stub
9659 (info
, sym_name
, input_bfd
, output_bfd
, input_section
,
9660 hit_data
, sym_sec
, rel
->r_offset
, signed_addend
, value
,
9662 return bfd_reloc_ok
;
9664 return bfd_reloc_dangerous
;
9667 else if (branch_type
== ST_BRANCH_TO_THUMB
9669 && r_type
== R_ARM_THM_CALL
)
9671 /* Make sure this is a BL. */
9672 lower_insn
|= 0x1800;
9676 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
9677 if (r_type
== R_ARM_THM_CALL
|| r_type
== R_ARM_THM_JUMP24
)
9679 /* Check if a stub has to be inserted because the destination
9681 struct elf32_arm_stub_hash_entry
*stub_entry
;
9682 struct elf32_arm_link_hash_entry
*hash
;
9684 hash
= (struct elf32_arm_link_hash_entry
*) h
;
9686 stub_type
= arm_type_of_stub (info
, input_section
, rel
,
9687 st_type
, &branch_type
,
9688 hash
, value
, sym_sec
,
9689 input_bfd
, sym_name
);
9691 if (stub_type
!= arm_stub_none
)
9693 /* The target is out of reach or we are changing modes, so
9694 redirect the branch to the local stub for this
9696 stub_entry
= elf32_arm_get_stub_entry (input_section
,
9700 if (stub_entry
!= NULL
)
9702 value
= (stub_entry
->stub_offset
9703 + stub_entry
->stub_sec
->output_offset
9704 + stub_entry
->stub_sec
->output_section
->vma
);
9706 if (plt_offset
!= (bfd_vma
) -1)
9707 *unresolved_reloc_p
= FALSE
;
9710 /* If this call becomes a call to Arm, force BLX. */
9711 if (globals
->use_blx
&& (r_type
== R_ARM_THM_CALL
))
9714 && !arm_stub_is_thumb (stub_entry
->stub_type
))
9715 || branch_type
!= ST_BRANCH_TO_THUMB
)
9716 lower_insn
= (lower_insn
& ~0x1000) | 0x0800;
9721 /* Handle calls via the PLT. */
9722 if (stub_type
== arm_stub_none
&& plt_offset
!= (bfd_vma
) -1)
9724 value
= (splt
->output_section
->vma
9725 + splt
->output_offset
9728 if (globals
->use_blx
9729 && r_type
== R_ARM_THM_CALL
9730 && ! using_thumb_only (globals
))
9732 /* If the Thumb BLX instruction is available, convert
9733 the BL to a BLX instruction to call the ARM-mode
9735 lower_insn
= (lower_insn
& ~0x1000) | 0x0800;
9736 branch_type
= ST_BRANCH_TO_ARM
;
9740 if (! using_thumb_only (globals
))
9741 /* Target the Thumb stub before the ARM PLT entry. */
9742 value
-= PLT_THUMB_STUB_SIZE
;
9743 branch_type
= ST_BRANCH_TO_THUMB
;
9745 *unresolved_reloc_p
= FALSE
;
9748 relocation
= value
+ signed_addend
;
9750 relocation
-= (input_section
->output_section
->vma
9751 + input_section
->output_offset
9754 check
= relocation
>> howto
->rightshift
;
9756 /* If this is a signed value, the rightshift just dropped
9757 leading 1 bits (assuming twos complement). */
9758 if ((bfd_signed_vma
) relocation
>= 0)
9759 signed_check
= check
;
9761 signed_check
= check
| ~((bfd_vma
) -1 >> howto
->rightshift
);
9763 /* Calculate the permissable maximum and minimum values for
9764 this relocation according to whether we're relocating for
9766 bitsize
= howto
->bitsize
;
9769 reloc_signed_max
= (1 << (bitsize
- 1)) - 1;
9770 reloc_signed_min
= ~reloc_signed_max
;
9772 /* Assumes two's complement. */
9773 if (signed_check
> reloc_signed_max
|| signed_check
< reloc_signed_min
)
9776 if ((lower_insn
& 0x5000) == 0x4000)
9777 /* For a BLX instruction, make sure that the relocation is rounded up
9778 to a word boundary. This follows the semantics of the instruction
9779 which specifies that bit 1 of the target address will come from bit
9780 1 of the base address. */
9781 relocation
= (relocation
+ 2) & ~ 3;
9783 /* Put RELOCATION back into the insn. Assumes two's complement.
9784 We use the Thumb-2 encoding, which is safe even if dealing with
9785 a Thumb-1 instruction by virtue of our overflow check above. */
9786 reloc_sign
= (signed_check
< 0) ? 1 : 0;
9787 upper_insn
= (upper_insn
& ~(bfd_vma
) 0x7ff)
9788 | ((relocation
>> 12) & 0x3ff)
9789 | (reloc_sign
<< 10);
9790 lower_insn
= (lower_insn
& ~(bfd_vma
) 0x2fff)
9791 | (((!((relocation
>> 23) & 1)) ^ reloc_sign
) << 13)
9792 | (((!((relocation
>> 22) & 1)) ^ reloc_sign
) << 11)
9793 | ((relocation
>> 1) & 0x7ff);
9795 /* Put the relocated value back in the object file: */
9796 bfd_put_16 (input_bfd
, upper_insn
, hit_data
);
9797 bfd_put_16 (input_bfd
, lower_insn
, hit_data
+ 2);
9799 return (overflow
? bfd_reloc_overflow
: bfd_reloc_ok
);
9803 case R_ARM_THM_JUMP19
:
9804 /* Thumb32 conditional branch instruction. */
9807 bfd_boolean overflow
= FALSE
;
9808 bfd_vma upper_insn
= bfd_get_16 (input_bfd
, hit_data
);
9809 bfd_vma lower_insn
= bfd_get_16 (input_bfd
, hit_data
+ 2);
9810 bfd_signed_vma reloc_signed_max
= 0xffffe;
9811 bfd_signed_vma reloc_signed_min
= -0x100000;
9812 bfd_signed_vma signed_check
;
9813 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
9814 struct elf32_arm_stub_hash_entry
*stub_entry
;
9815 struct elf32_arm_link_hash_entry
*hash
;
9817 /* Need to refetch the addend, reconstruct the top three bits,
9818 and squish the two 11 bit pieces together. */
9819 if (globals
->use_rel
)
9821 bfd_vma S
= (upper_insn
& 0x0400) >> 10;
9822 bfd_vma upper
= (upper_insn
& 0x003f);
9823 bfd_vma J1
= (lower_insn
& 0x2000) >> 13;
9824 bfd_vma J2
= (lower_insn
& 0x0800) >> 11;
9825 bfd_vma lower
= (lower_insn
& 0x07ff);
9830 upper
-= 0x0100; /* Sign extend. */
9832 addend
= (upper
<< 12) | (lower
<< 1);
9833 signed_addend
= addend
;
9836 /* Handle calls via the PLT. */
9837 if (plt_offset
!= (bfd_vma
) -1)
9839 value
= (splt
->output_section
->vma
9840 + splt
->output_offset
9842 /* Target the Thumb stub before the ARM PLT entry. */
9843 value
-= PLT_THUMB_STUB_SIZE
;
9844 *unresolved_reloc_p
= FALSE
;
9847 hash
= (struct elf32_arm_link_hash_entry
*)h
;
9849 stub_type
= arm_type_of_stub (info
, input_section
, rel
,
9850 st_type
, &branch_type
,
9851 hash
, value
, sym_sec
,
9852 input_bfd
, sym_name
);
9853 if (stub_type
!= arm_stub_none
)
9855 stub_entry
= elf32_arm_get_stub_entry (input_section
,
9859 if (stub_entry
!= NULL
)
9861 value
= (stub_entry
->stub_offset
9862 + stub_entry
->stub_sec
->output_offset
9863 + stub_entry
->stub_sec
->output_section
->vma
);
9867 relocation
= value
+ signed_addend
;
9868 relocation
-= (input_section
->output_section
->vma
9869 + input_section
->output_offset
9871 signed_check
= (bfd_signed_vma
) relocation
;
9873 if (signed_check
> reloc_signed_max
|| signed_check
< reloc_signed_min
)
9876 /* Put RELOCATION back into the insn. */
9878 bfd_vma S
= (relocation
& 0x00100000) >> 20;
9879 bfd_vma J2
= (relocation
& 0x00080000) >> 19;
9880 bfd_vma J1
= (relocation
& 0x00040000) >> 18;
9881 bfd_vma hi
= (relocation
& 0x0003f000) >> 12;
9882 bfd_vma lo
= (relocation
& 0x00000ffe) >> 1;
9884 upper_insn
= (upper_insn
& 0xfbc0) | (S
<< 10) | hi
;
9885 lower_insn
= (lower_insn
& 0xd000) | (J1
<< 13) | (J2
<< 11) | lo
;
9888 /* Put the relocated value back in the object file: */
9889 bfd_put_16 (input_bfd
, upper_insn
, hit_data
);
9890 bfd_put_16 (input_bfd
, lower_insn
, hit_data
+ 2);
9892 return (overflow
? bfd_reloc_overflow
: bfd_reloc_ok
);
9895 case R_ARM_THM_JUMP11
:
9896 case R_ARM_THM_JUMP8
:
9897 case R_ARM_THM_JUMP6
:
9898 /* Thumb B (branch) instruction). */
9900 bfd_signed_vma relocation
;
9901 bfd_signed_vma reloc_signed_max
= (1 << (howto
->bitsize
- 1)) - 1;
9902 bfd_signed_vma reloc_signed_min
= ~ reloc_signed_max
;
9903 bfd_signed_vma signed_check
;
9905 /* CZB cannot jump backward. */
9906 if (r_type
== R_ARM_THM_JUMP6
)
9907 reloc_signed_min
= 0;
9909 if (globals
->use_rel
)
9911 /* Need to refetch addend. */
9912 addend
= bfd_get_16 (input_bfd
, hit_data
) & howto
->src_mask
;
9913 if (addend
& ((howto
->src_mask
+ 1) >> 1))
9916 signed_addend
&= ~ howto
->src_mask
;
9917 signed_addend
|= addend
;
9920 signed_addend
= addend
;
9921 /* The value in the insn has been right shifted. We need to
9922 undo this, so that we can perform the address calculation
9923 in terms of bytes. */
9924 signed_addend
<<= howto
->rightshift
;
9926 relocation
= value
+ signed_addend
;
9928 relocation
-= (input_section
->output_section
->vma
9929 + input_section
->output_offset
9932 relocation
>>= howto
->rightshift
;
9933 signed_check
= relocation
;
9935 if (r_type
== R_ARM_THM_JUMP6
)
9936 relocation
= ((relocation
& 0x0020) << 4) | ((relocation
& 0x001f) << 3);
9938 relocation
&= howto
->dst_mask
;
9939 relocation
|= (bfd_get_16 (input_bfd
, hit_data
) & (~ howto
->dst_mask
));
9941 bfd_put_16 (input_bfd
, relocation
, hit_data
);
9943 /* Assumes two's complement. */
9944 if (signed_check
> reloc_signed_max
|| signed_check
< reloc_signed_min
)
9945 return bfd_reloc_overflow
;
9947 return bfd_reloc_ok
;
9950 case R_ARM_ALU_PCREL7_0
:
9951 case R_ARM_ALU_PCREL15_8
:
9952 case R_ARM_ALU_PCREL23_15
:
9957 insn
= bfd_get_32 (input_bfd
, hit_data
);
9958 if (globals
->use_rel
)
9960 /* Extract the addend. */
9961 addend
= (insn
& 0xff) << ((insn
& 0xf00) >> 7);
9962 signed_addend
= addend
;
9964 relocation
= value
+ signed_addend
;
9966 relocation
-= (input_section
->output_section
->vma
9967 + input_section
->output_offset
9969 insn
= (insn
& ~0xfff)
9970 | ((howto
->bitpos
<< 7) & 0xf00)
9971 | ((relocation
>> howto
->bitpos
) & 0xff);
9972 bfd_put_32 (input_bfd
, value
, hit_data
);
9974 return bfd_reloc_ok
;
9976 case R_ARM_GNU_VTINHERIT
:
9977 case R_ARM_GNU_VTENTRY
:
9978 return bfd_reloc_ok
;
9980 case R_ARM_GOTOFF32
:
9981 /* Relocation is relative to the start of the
9982 global offset table. */
9984 BFD_ASSERT (sgot
!= NULL
);
9986 return bfd_reloc_notsupported
;
9988 /* If we are addressing a Thumb function, we need to adjust the
9989 address by one, so that attempts to call the function pointer will
9990 correctly interpret it as Thumb code. */
9991 if (branch_type
== ST_BRANCH_TO_THUMB
)
9994 /* Note that sgot->output_offset is not involved in this
9995 calculation. We always want the start of .got. If we
9996 define _GLOBAL_OFFSET_TABLE in a different way, as is
9997 permitted by the ABI, we might have to change this
9999 value
-= sgot
->output_section
->vma
;
10000 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
10001 contents
, rel
->r_offset
, value
,
10005 /* Use global offset table as symbol value. */
10006 BFD_ASSERT (sgot
!= NULL
);
10009 return bfd_reloc_notsupported
;
10011 *unresolved_reloc_p
= FALSE
;
10012 value
= sgot
->output_section
->vma
;
10013 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
10014 contents
, rel
->r_offset
, value
,
10018 case R_ARM_GOT_PREL
:
10019 /* Relocation is to the entry for this symbol in the
10020 global offset table. */
10022 return bfd_reloc_notsupported
;
10024 if (dynreloc_st_type
== STT_GNU_IFUNC
10025 && plt_offset
!= (bfd_vma
) -1
10026 && (h
== NULL
|| SYMBOL_REFERENCES_LOCAL (info
, h
)))
10028 /* We have a relocation against a locally-binding STT_GNU_IFUNC
10029 symbol, and the relocation resolves directly to the runtime
10030 target rather than to the .iplt entry. This means that any
10031 .got entry would be the same value as the .igot.plt entry,
10032 so there's no point creating both. */
10033 sgot
= globals
->root
.igotplt
;
10034 value
= sgot
->output_offset
+ gotplt_offset
;
10036 else if (h
!= NULL
)
10040 off
= h
->got
.offset
;
10041 BFD_ASSERT (off
!= (bfd_vma
) -1);
10042 if ((off
& 1) != 0)
10044 /* We have already processsed one GOT relocation against
10047 if (globals
->root
.dynamic_sections_created
10048 && !SYMBOL_REFERENCES_LOCAL (info
, h
))
10049 *unresolved_reloc_p
= FALSE
;
10053 Elf_Internal_Rela outrel
;
10055 if (h
->dynindx
!= -1 && !SYMBOL_REFERENCES_LOCAL (info
, h
))
10057 /* If the symbol doesn't resolve locally in a static
10058 object, we have an undefined reference. If the
10059 symbol doesn't resolve locally in a dynamic object,
10060 it should be resolved by the dynamic linker. */
10061 if (globals
->root
.dynamic_sections_created
)
10063 outrel
.r_info
= ELF32_R_INFO (h
->dynindx
, R_ARM_GLOB_DAT
);
10064 *unresolved_reloc_p
= FALSE
;
10068 outrel
.r_addend
= 0;
10072 if (dynreloc_st_type
== STT_GNU_IFUNC
)
10073 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_IRELATIVE
);
10074 else if (bfd_link_pic (info
) &&
10075 (ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
10076 || h
->root
.type
!= bfd_link_hash_undefweak
))
10077 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_RELATIVE
);
10080 outrel
.r_addend
= dynreloc_value
;
10083 /* The GOT entry is initialized to zero by default.
10084 See if we should install a different value. */
10085 if (outrel
.r_addend
!= 0
10086 && (outrel
.r_info
== 0 || globals
->use_rel
))
10088 bfd_put_32 (output_bfd
, outrel
.r_addend
,
10089 sgot
->contents
+ off
);
10090 outrel
.r_addend
= 0;
10093 if (outrel
.r_info
!= 0)
10095 outrel
.r_offset
= (sgot
->output_section
->vma
10096 + sgot
->output_offset
10098 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
10100 h
->got
.offset
|= 1;
10102 value
= sgot
->output_offset
+ off
;
10108 BFD_ASSERT (local_got_offsets
!= NULL
&&
10109 local_got_offsets
[r_symndx
] != (bfd_vma
) -1);
10111 off
= local_got_offsets
[r_symndx
];
10113 /* The offset must always be a multiple of 4. We use the
10114 least significant bit to record whether we have already
10115 generated the necessary reloc. */
10116 if ((off
& 1) != 0)
10120 if (globals
->use_rel
)
10121 bfd_put_32 (output_bfd
, dynreloc_value
, sgot
->contents
+ off
);
10123 if (bfd_link_pic (info
) || dynreloc_st_type
== STT_GNU_IFUNC
)
10125 Elf_Internal_Rela outrel
;
10127 outrel
.r_addend
= addend
+ dynreloc_value
;
10128 outrel
.r_offset
= (sgot
->output_section
->vma
10129 + sgot
->output_offset
10131 if (dynreloc_st_type
== STT_GNU_IFUNC
)
10132 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_IRELATIVE
);
10134 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_RELATIVE
);
10135 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
10138 local_got_offsets
[r_symndx
] |= 1;
10141 value
= sgot
->output_offset
+ off
;
10143 if (r_type
!= R_ARM_GOT32
)
10144 value
+= sgot
->output_section
->vma
;
10146 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
10147 contents
, rel
->r_offset
, value
,
10150 case R_ARM_TLS_LDO32
:
10151 value
= value
- dtpoff_base (info
);
10153 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
10154 contents
, rel
->r_offset
, value
,
10157 case R_ARM_TLS_LDM32
:
10164 off
= globals
->tls_ldm_got
.offset
;
10166 if ((off
& 1) != 0)
10170 /* If we don't know the module number, create a relocation
10172 if (bfd_link_pic (info
))
10174 Elf_Internal_Rela outrel
;
10176 if (srelgot
== NULL
)
10179 outrel
.r_addend
= 0;
10180 outrel
.r_offset
= (sgot
->output_section
->vma
10181 + sgot
->output_offset
+ off
);
10182 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32
);
10184 if (globals
->use_rel
)
10185 bfd_put_32 (output_bfd
, outrel
.r_addend
,
10186 sgot
->contents
+ off
);
10188 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
10191 bfd_put_32 (output_bfd
, 1, sgot
->contents
+ off
);
10193 globals
->tls_ldm_got
.offset
|= 1;
10196 value
= sgot
->output_section
->vma
+ sgot
->output_offset
+ off
10197 - (input_section
->output_section
->vma
+ input_section
->output_offset
+ rel
->r_offset
);
10199 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
10200 contents
, rel
->r_offset
, value
,
10204 case R_ARM_TLS_CALL
:
10205 case R_ARM_THM_TLS_CALL
:
10206 case R_ARM_TLS_GD32
:
10207 case R_ARM_TLS_IE32
:
10208 case R_ARM_TLS_GOTDESC
:
10209 case R_ARM_TLS_DESCSEQ
:
10210 case R_ARM_THM_TLS_DESCSEQ
:
10212 bfd_vma off
, offplt
;
10216 BFD_ASSERT (sgot
!= NULL
);
10221 dyn
= globals
->root
.dynamic_sections_created
;
10222 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn
,
10223 bfd_link_pic (info
),
10225 && (!bfd_link_pic (info
)
10226 || !SYMBOL_REFERENCES_LOCAL (info
, h
)))
10228 *unresolved_reloc_p
= FALSE
;
10231 off
= h
->got
.offset
;
10232 offplt
= elf32_arm_hash_entry (h
)->tlsdesc_got
;
10233 tls_type
= ((struct elf32_arm_link_hash_entry
*) h
)->tls_type
;
10237 BFD_ASSERT (local_got_offsets
!= NULL
);
10238 off
= local_got_offsets
[r_symndx
];
10239 offplt
= local_tlsdesc_gotents
[r_symndx
];
10240 tls_type
= elf32_arm_local_got_tls_type (input_bfd
)[r_symndx
];
10243 /* Linker relaxations happens from one of the
10244 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
10245 if (ELF32_R_TYPE(rel
->r_info
) != r_type
)
10246 tls_type
= GOT_TLS_IE
;
10248 BFD_ASSERT (tls_type
!= GOT_UNKNOWN
);
10250 if ((off
& 1) != 0)
10254 bfd_boolean need_relocs
= FALSE
;
10255 Elf_Internal_Rela outrel
;
10258 /* The GOT entries have not been initialized yet. Do it
10259 now, and emit any relocations. If both an IE GOT and a
10260 GD GOT are necessary, we emit the GD first. */
10262 if ((bfd_link_pic (info
) || indx
!= 0)
10264 || ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
10265 || h
->root
.type
!= bfd_link_hash_undefweak
))
10267 need_relocs
= TRUE
;
10268 BFD_ASSERT (srelgot
!= NULL
);
10271 if (tls_type
& GOT_TLS_GDESC
)
10275 /* We should have relaxed, unless this is an undefined
10277 BFD_ASSERT ((h
&& (h
->root
.type
== bfd_link_hash_undefweak
))
10278 || bfd_link_pic (info
));
10279 BFD_ASSERT (globals
->sgotplt_jump_table_size
+ offplt
+ 8
10280 <= globals
->root
.sgotplt
->size
);
10282 outrel
.r_addend
= 0;
10283 outrel
.r_offset
= (globals
->root
.sgotplt
->output_section
->vma
10284 + globals
->root
.sgotplt
->output_offset
10286 + globals
->sgotplt_jump_table_size
);
10288 outrel
.r_info
= ELF32_R_INFO (indx
, R_ARM_TLS_DESC
);
10289 sreloc
= globals
->root
.srelplt
;
10290 loc
= sreloc
->contents
;
10291 loc
+= globals
->next_tls_desc_index
++ * RELOC_SIZE (globals
);
10292 BFD_ASSERT (loc
+ RELOC_SIZE (globals
)
10293 <= sreloc
->contents
+ sreloc
->size
);
10295 SWAP_RELOC_OUT (globals
) (output_bfd
, &outrel
, loc
);
10297 /* For globals, the first word in the relocation gets
10298 the relocation index and the top bit set, or zero,
10299 if we're binding now. For locals, it gets the
10300 symbol's offset in the tls section. */
10301 bfd_put_32 (output_bfd
,
10302 !h
? value
- elf_hash_table (info
)->tls_sec
->vma
10303 : info
->flags
& DF_BIND_NOW
? 0
10304 : 0x80000000 | ELF32_R_SYM (outrel
.r_info
),
10305 globals
->root
.sgotplt
->contents
+ offplt
10306 + globals
->sgotplt_jump_table_size
);
10308 /* Second word in the relocation is always zero. */
10309 bfd_put_32 (output_bfd
, 0,
10310 globals
->root
.sgotplt
->contents
+ offplt
10311 + globals
->sgotplt_jump_table_size
+ 4);
10313 if (tls_type
& GOT_TLS_GD
)
10317 outrel
.r_addend
= 0;
10318 outrel
.r_offset
= (sgot
->output_section
->vma
10319 + sgot
->output_offset
10321 outrel
.r_info
= ELF32_R_INFO (indx
, R_ARM_TLS_DTPMOD32
);
10323 if (globals
->use_rel
)
10324 bfd_put_32 (output_bfd
, outrel
.r_addend
,
10325 sgot
->contents
+ cur_off
);
10327 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
10330 bfd_put_32 (output_bfd
, value
- dtpoff_base (info
),
10331 sgot
->contents
+ cur_off
+ 4);
10334 outrel
.r_addend
= 0;
10335 outrel
.r_info
= ELF32_R_INFO (indx
,
10336 R_ARM_TLS_DTPOFF32
);
10337 outrel
.r_offset
+= 4;
10339 if (globals
->use_rel
)
10340 bfd_put_32 (output_bfd
, outrel
.r_addend
,
10341 sgot
->contents
+ cur_off
+ 4);
10343 elf32_arm_add_dynreloc (output_bfd
, info
,
10349 /* If we are not emitting relocations for a
10350 general dynamic reference, then we must be in a
10351 static link or an executable link with the
10352 symbol binding locally. Mark it as belonging
10353 to module 1, the executable. */
10354 bfd_put_32 (output_bfd
, 1,
10355 sgot
->contents
+ cur_off
);
10356 bfd_put_32 (output_bfd
, value
- dtpoff_base (info
),
10357 sgot
->contents
+ cur_off
+ 4);
10363 if (tls_type
& GOT_TLS_IE
)
10368 outrel
.r_addend
= value
- dtpoff_base (info
);
10370 outrel
.r_addend
= 0;
10371 outrel
.r_offset
= (sgot
->output_section
->vma
10372 + sgot
->output_offset
10374 outrel
.r_info
= ELF32_R_INFO (indx
, R_ARM_TLS_TPOFF32
);
10376 if (globals
->use_rel
)
10377 bfd_put_32 (output_bfd
, outrel
.r_addend
,
10378 sgot
->contents
+ cur_off
);
10380 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
10383 bfd_put_32 (output_bfd
, tpoff (info
, value
),
10384 sgot
->contents
+ cur_off
);
10389 h
->got
.offset
|= 1;
10391 local_got_offsets
[r_symndx
] |= 1;
10394 if ((tls_type
& GOT_TLS_GD
) && r_type
!= R_ARM_TLS_GD32
)
10396 else if (tls_type
& GOT_TLS_GDESC
)
10399 if (ELF32_R_TYPE(rel
->r_info
) == R_ARM_TLS_CALL
10400 || ELF32_R_TYPE(rel
->r_info
) == R_ARM_THM_TLS_CALL
)
10402 bfd_signed_vma offset
;
10403 /* TLS stubs are arm mode. The original symbol is a
10404 data object, so branch_type is bogus. */
10405 branch_type
= ST_BRANCH_TO_ARM
;
10406 enum elf32_arm_stub_type stub_type
10407 = arm_type_of_stub (info
, input_section
, rel
,
10408 st_type
, &branch_type
,
10409 (struct elf32_arm_link_hash_entry
*)h
,
10410 globals
->tls_trampoline
, globals
->root
.splt
,
10411 input_bfd
, sym_name
);
10413 if (stub_type
!= arm_stub_none
)
10415 struct elf32_arm_stub_hash_entry
*stub_entry
10416 = elf32_arm_get_stub_entry
10417 (input_section
, globals
->root
.splt
, 0, rel
,
10418 globals
, stub_type
);
10419 offset
= (stub_entry
->stub_offset
10420 + stub_entry
->stub_sec
->output_offset
10421 + stub_entry
->stub_sec
->output_section
->vma
);
10424 offset
= (globals
->root
.splt
->output_section
->vma
10425 + globals
->root
.splt
->output_offset
10426 + globals
->tls_trampoline
);
10428 if (ELF32_R_TYPE(rel
->r_info
) == R_ARM_TLS_CALL
)
10430 unsigned long inst
;
10432 offset
-= (input_section
->output_section
->vma
10433 + input_section
->output_offset
10434 + rel
->r_offset
+ 8);
10436 inst
= offset
>> 2;
10437 inst
&= 0x00ffffff;
10438 value
= inst
| (globals
->use_blx
? 0xfa000000 : 0xeb000000);
10442 /* Thumb blx encodes the offset in a complicated
10444 unsigned upper_insn
, lower_insn
;
10447 offset
-= (input_section
->output_section
->vma
10448 + input_section
->output_offset
10449 + rel
->r_offset
+ 4);
10451 if (stub_type
!= arm_stub_none
10452 && arm_stub_is_thumb (stub_type
))
10454 lower_insn
= 0xd000;
10458 lower_insn
= 0xc000;
10459 /* Round up the offset to a word boundary. */
10460 offset
= (offset
+ 2) & ~2;
10464 upper_insn
= (0xf000
10465 | ((offset
>> 12) & 0x3ff)
10467 lower_insn
|= (((!((offset
>> 23) & 1)) ^ neg
) << 13)
10468 | (((!((offset
>> 22) & 1)) ^ neg
) << 11)
10469 | ((offset
>> 1) & 0x7ff);
10470 bfd_put_16 (input_bfd
, upper_insn
, hit_data
);
10471 bfd_put_16 (input_bfd
, lower_insn
, hit_data
+ 2);
10472 return bfd_reloc_ok
;
10475 /* These relocations needs special care, as besides the fact
10476 they point somewhere in .gotplt, the addend must be
10477 adjusted accordingly depending on the type of instruction
10479 else if ((r_type
== R_ARM_TLS_GOTDESC
) && (tls_type
& GOT_TLS_GDESC
))
10481 unsigned long data
, insn
;
10484 data
= bfd_get_32 (input_bfd
, hit_data
);
10490 insn
= bfd_get_16 (input_bfd
, contents
+ rel
->r_offset
- data
);
10491 if ((insn
& 0xf000) == 0xf000 || (insn
& 0xf800) == 0xe800)
10492 insn
= (insn
<< 16)
10493 | bfd_get_16 (input_bfd
,
10494 contents
+ rel
->r_offset
- data
+ 2);
10495 if ((insn
& 0xf800c000) == 0xf000c000)
10498 else if ((insn
& 0xffffff00) == 0x4400)
10503 (*_bfd_error_handler
)
10504 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"),
10505 input_bfd
, input_section
,
10506 (unsigned long)rel
->r_offset
, insn
);
10507 return bfd_reloc_notsupported
;
10512 insn
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
- data
);
10514 switch (insn
>> 24)
10516 case 0xeb: /* bl */
10517 case 0xfa: /* blx */
10521 case 0xe0: /* add */
10526 (*_bfd_error_handler
)
10527 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
10528 input_bfd
, input_section
,
10529 (unsigned long)rel
->r_offset
, insn
);
10530 return bfd_reloc_notsupported
;
10534 value
+= ((globals
->root
.sgotplt
->output_section
->vma
10535 + globals
->root
.sgotplt
->output_offset
+ off
)
10536 - (input_section
->output_section
->vma
10537 + input_section
->output_offset
10539 + globals
->sgotplt_jump_table_size
);
10542 value
= ((globals
->root
.sgot
->output_section
->vma
10543 + globals
->root
.sgot
->output_offset
+ off
)
10544 - (input_section
->output_section
->vma
10545 + input_section
->output_offset
+ rel
->r_offset
));
10547 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
10548 contents
, rel
->r_offset
, value
,
10552 case R_ARM_TLS_LE32
:
10553 if (bfd_link_dll (info
))
10555 (*_bfd_error_handler
)
10556 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
10557 input_bfd
, input_section
,
10558 (long) rel
->r_offset
, howto
->name
);
10559 return bfd_reloc_notsupported
;
10562 value
= tpoff (info
, value
);
10564 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
10565 contents
, rel
->r_offset
, value
,
10569 if (globals
->fix_v4bx
)
10571 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
10573 /* Ensure that we have a BX instruction. */
10574 BFD_ASSERT ((insn
& 0x0ffffff0) == 0x012fff10);
10576 if (globals
->fix_v4bx
== 2 && (insn
& 0xf) != 0xf)
10578 /* Branch to veneer. */
10580 glue_addr
= elf32_arm_bx_glue (info
, insn
& 0xf);
10581 glue_addr
-= input_section
->output_section
->vma
10582 + input_section
->output_offset
10583 + rel
->r_offset
+ 8;
10584 insn
= (insn
& 0xf0000000) | 0x0a000000
10585 | ((glue_addr
>> 2) & 0x00ffffff);
10589 /* Preserve Rm (lowest four bits) and the condition code
10590 (highest four bits). Other bits encode MOV PC,Rm. */
10591 insn
= (insn
& 0xf000000f) | 0x01a0f000;
10594 bfd_put_32 (input_bfd
, insn
, hit_data
);
10596 return bfd_reloc_ok
;
10598 case R_ARM_MOVW_ABS_NC
:
10599 case R_ARM_MOVT_ABS
:
10600 case R_ARM_MOVW_PREL_NC
:
10601 case R_ARM_MOVT_PREL
:
10602 /* Until we properly support segment-base-relative addressing then
10603 we assume the segment base to be zero, as for the group relocations.
10604 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
10605 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
10606 case R_ARM_MOVW_BREL_NC
:
10607 case R_ARM_MOVW_BREL
:
10608 case R_ARM_MOVT_BREL
:
10610 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
10612 if (globals
->use_rel
)
10614 addend
= ((insn
>> 4) & 0xf000) | (insn
& 0xfff);
10615 signed_addend
= (addend
^ 0x8000) - 0x8000;
10618 value
+= signed_addend
;
10620 if (r_type
== R_ARM_MOVW_PREL_NC
|| r_type
== R_ARM_MOVT_PREL
)
10621 value
-= (input_section
->output_section
->vma
10622 + input_section
->output_offset
+ rel
->r_offset
);
10624 if (r_type
== R_ARM_MOVW_BREL
&& value
>= 0x10000)
10625 return bfd_reloc_overflow
;
10627 if (branch_type
== ST_BRANCH_TO_THUMB
)
10630 if (r_type
== R_ARM_MOVT_ABS
|| r_type
== R_ARM_MOVT_PREL
10631 || r_type
== R_ARM_MOVT_BREL
)
10634 insn
&= 0xfff0f000;
10635 insn
|= value
& 0xfff;
10636 insn
|= (value
& 0xf000) << 4;
10637 bfd_put_32 (input_bfd
, insn
, hit_data
);
10639 return bfd_reloc_ok
;
10641 case R_ARM_THM_MOVW_ABS_NC
:
10642 case R_ARM_THM_MOVT_ABS
:
10643 case R_ARM_THM_MOVW_PREL_NC
:
10644 case R_ARM_THM_MOVT_PREL
:
10645 /* Until we properly support segment-base-relative addressing then
10646 we assume the segment base to be zero, as for the above relocations.
10647 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
10648 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
10649 as R_ARM_THM_MOVT_ABS. */
10650 case R_ARM_THM_MOVW_BREL_NC
:
10651 case R_ARM_THM_MOVW_BREL
:
10652 case R_ARM_THM_MOVT_BREL
:
10656 insn
= bfd_get_16 (input_bfd
, hit_data
) << 16;
10657 insn
|= bfd_get_16 (input_bfd
, hit_data
+ 2);
10659 if (globals
->use_rel
)
10661 addend
= ((insn
>> 4) & 0xf000)
10662 | ((insn
>> 15) & 0x0800)
10663 | ((insn
>> 4) & 0x0700)
10665 signed_addend
= (addend
^ 0x8000) - 0x8000;
10668 value
+= signed_addend
;
10670 if (r_type
== R_ARM_THM_MOVW_PREL_NC
|| r_type
== R_ARM_THM_MOVT_PREL
)
10671 value
-= (input_section
->output_section
->vma
10672 + input_section
->output_offset
+ rel
->r_offset
);
10674 if (r_type
== R_ARM_THM_MOVW_BREL
&& value
>= 0x10000)
10675 return bfd_reloc_overflow
;
10677 if (branch_type
== ST_BRANCH_TO_THUMB
)
10680 if (r_type
== R_ARM_THM_MOVT_ABS
|| r_type
== R_ARM_THM_MOVT_PREL
10681 || r_type
== R_ARM_THM_MOVT_BREL
)
10684 insn
&= 0xfbf08f00;
10685 insn
|= (value
& 0xf000) << 4;
10686 insn
|= (value
& 0x0800) << 15;
10687 insn
|= (value
& 0x0700) << 4;
10688 insn
|= (value
& 0x00ff);
10690 bfd_put_16 (input_bfd
, insn
>> 16, hit_data
);
10691 bfd_put_16 (input_bfd
, insn
& 0xffff, hit_data
+ 2);
10693 return bfd_reloc_ok
;
10695 case R_ARM_ALU_PC_G0_NC
:
10696 case R_ARM_ALU_PC_G1_NC
:
10697 case R_ARM_ALU_PC_G0
:
10698 case R_ARM_ALU_PC_G1
:
10699 case R_ARM_ALU_PC_G2
:
10700 case R_ARM_ALU_SB_G0_NC
:
10701 case R_ARM_ALU_SB_G1_NC
:
10702 case R_ARM_ALU_SB_G0
:
10703 case R_ARM_ALU_SB_G1
:
10704 case R_ARM_ALU_SB_G2
:
10706 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
10707 bfd_vma pc
= input_section
->output_section
->vma
10708 + input_section
->output_offset
+ rel
->r_offset
;
10709 /* sb is the origin of the *segment* containing the symbol. */
10710 bfd_vma sb
= sym_sec
? sym_sec
->output_section
->vma
: 0;
10713 bfd_signed_vma signed_value
;
10716 /* Determine which group of bits to select. */
10719 case R_ARM_ALU_PC_G0_NC
:
10720 case R_ARM_ALU_PC_G0
:
10721 case R_ARM_ALU_SB_G0_NC
:
10722 case R_ARM_ALU_SB_G0
:
10726 case R_ARM_ALU_PC_G1_NC
:
10727 case R_ARM_ALU_PC_G1
:
10728 case R_ARM_ALU_SB_G1_NC
:
10729 case R_ARM_ALU_SB_G1
:
10733 case R_ARM_ALU_PC_G2
:
10734 case R_ARM_ALU_SB_G2
:
10742 /* If REL, extract the addend from the insn. If RELA, it will
10743 have already been fetched for us. */
10744 if (globals
->use_rel
)
10747 bfd_vma constant
= insn
& 0xff;
10748 bfd_vma rotation
= (insn
& 0xf00) >> 8;
10751 signed_addend
= constant
;
10754 /* Compensate for the fact that in the instruction, the
10755 rotation is stored in multiples of 2 bits. */
10758 /* Rotate "constant" right by "rotation" bits. */
10759 signed_addend
= (constant
>> rotation
) |
10760 (constant
<< (8 * sizeof (bfd_vma
) - rotation
));
10763 /* Determine if the instruction is an ADD or a SUB.
10764 (For REL, this determines the sign of the addend.) */
10765 negative
= identify_add_or_sub (insn
);
10768 (*_bfd_error_handler
)
10769 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
10770 input_bfd
, input_section
,
10771 (long) rel
->r_offset
, howto
->name
);
10772 return bfd_reloc_overflow
;
10775 signed_addend
*= negative
;
10778 /* Compute the value (X) to go in the place. */
10779 if (r_type
== R_ARM_ALU_PC_G0_NC
10780 || r_type
== R_ARM_ALU_PC_G1_NC
10781 || r_type
== R_ARM_ALU_PC_G0
10782 || r_type
== R_ARM_ALU_PC_G1
10783 || r_type
== R_ARM_ALU_PC_G2
)
10785 signed_value
= value
- pc
+ signed_addend
;
10787 /* Section base relative. */
10788 signed_value
= value
- sb
+ signed_addend
;
10790 /* If the target symbol is a Thumb function, then set the
10791 Thumb bit in the address. */
10792 if (branch_type
== ST_BRANCH_TO_THUMB
)
10795 /* Calculate the value of the relevant G_n, in encoded
10796 constant-with-rotation format. */
10797 g_n
= calculate_group_reloc_mask (signed_value
< 0 ? - signed_value
: signed_value
,
10800 /* Check for overflow if required. */
10801 if ((r_type
== R_ARM_ALU_PC_G0
10802 || r_type
== R_ARM_ALU_PC_G1
10803 || r_type
== R_ARM_ALU_PC_G2
10804 || r_type
== R_ARM_ALU_SB_G0
10805 || r_type
== R_ARM_ALU_SB_G1
10806 || r_type
== R_ARM_ALU_SB_G2
) && residual
!= 0)
10808 (*_bfd_error_handler
)
10809 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10810 input_bfd
, input_section
,
10811 (long) rel
->r_offset
, signed_value
< 0 ? - signed_value
: signed_value
,
10813 return bfd_reloc_overflow
;
10816 /* Mask out the value and the ADD/SUB part of the opcode; take care
10817 not to destroy the S bit. */
10818 insn
&= 0xff1ff000;
10820 /* Set the opcode according to whether the value to go in the
10821 place is negative. */
10822 if (signed_value
< 0)
10827 /* Encode the offset. */
10830 bfd_put_32 (input_bfd
, insn
, hit_data
);
10832 return bfd_reloc_ok
;
10834 case R_ARM_LDR_PC_G0
:
10835 case R_ARM_LDR_PC_G1
:
10836 case R_ARM_LDR_PC_G2
:
10837 case R_ARM_LDR_SB_G0
:
10838 case R_ARM_LDR_SB_G1
:
10839 case R_ARM_LDR_SB_G2
:
10841 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
10842 bfd_vma pc
= input_section
->output_section
->vma
10843 + input_section
->output_offset
+ rel
->r_offset
;
10844 /* sb is the origin of the *segment* containing the symbol. */
10845 bfd_vma sb
= sym_sec
? sym_sec
->output_section
->vma
: 0;
10847 bfd_signed_vma signed_value
;
10850 /* Determine which groups of bits to calculate. */
10853 case R_ARM_LDR_PC_G0
:
10854 case R_ARM_LDR_SB_G0
:
10858 case R_ARM_LDR_PC_G1
:
10859 case R_ARM_LDR_SB_G1
:
10863 case R_ARM_LDR_PC_G2
:
10864 case R_ARM_LDR_SB_G2
:
10872 /* If REL, extract the addend from the insn. If RELA, it will
10873 have already been fetched for us. */
10874 if (globals
->use_rel
)
10876 int negative
= (insn
& (1 << 23)) ? 1 : -1;
10877 signed_addend
= negative
* (insn
& 0xfff);
10880 /* Compute the value (X) to go in the place. */
10881 if (r_type
== R_ARM_LDR_PC_G0
10882 || r_type
== R_ARM_LDR_PC_G1
10883 || r_type
== R_ARM_LDR_PC_G2
)
10885 signed_value
= value
- pc
+ signed_addend
;
10887 /* Section base relative. */
10888 signed_value
= value
- sb
+ signed_addend
;
10890 /* Calculate the value of the relevant G_{n-1} to obtain
10891 the residual at that stage. */
10892 calculate_group_reloc_mask (signed_value
< 0 ? - signed_value
: signed_value
,
10893 group
- 1, &residual
);
10895 /* Check for overflow. */
10896 if (residual
>= 0x1000)
10898 (*_bfd_error_handler
)
10899 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10900 input_bfd
, input_section
,
10901 (long) rel
->r_offset
, labs (signed_value
), howto
->name
);
10902 return bfd_reloc_overflow
;
10905 /* Mask out the value and U bit. */
10906 insn
&= 0xff7ff000;
10908 /* Set the U bit if the value to go in the place is non-negative. */
10909 if (signed_value
>= 0)
10912 /* Encode the offset. */
10915 bfd_put_32 (input_bfd
, insn
, hit_data
);
10917 return bfd_reloc_ok
;
10919 case R_ARM_LDRS_PC_G0
:
10920 case R_ARM_LDRS_PC_G1
:
10921 case R_ARM_LDRS_PC_G2
:
10922 case R_ARM_LDRS_SB_G0
:
10923 case R_ARM_LDRS_SB_G1
:
10924 case R_ARM_LDRS_SB_G2
:
10926 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
10927 bfd_vma pc
= input_section
->output_section
->vma
10928 + input_section
->output_offset
+ rel
->r_offset
;
10929 /* sb is the origin of the *segment* containing the symbol. */
10930 bfd_vma sb
= sym_sec
? sym_sec
->output_section
->vma
: 0;
10932 bfd_signed_vma signed_value
;
10935 /* Determine which groups of bits to calculate. */
10938 case R_ARM_LDRS_PC_G0
:
10939 case R_ARM_LDRS_SB_G0
:
10943 case R_ARM_LDRS_PC_G1
:
10944 case R_ARM_LDRS_SB_G1
:
10948 case R_ARM_LDRS_PC_G2
:
10949 case R_ARM_LDRS_SB_G2
:
10957 /* If REL, extract the addend from the insn. If RELA, it will
10958 have already been fetched for us. */
10959 if (globals
->use_rel
)
10961 int negative
= (insn
& (1 << 23)) ? 1 : -1;
10962 signed_addend
= negative
* (((insn
& 0xf00) >> 4) + (insn
& 0xf));
10965 /* Compute the value (X) to go in the place. */
10966 if (r_type
== R_ARM_LDRS_PC_G0
10967 || r_type
== R_ARM_LDRS_PC_G1
10968 || r_type
== R_ARM_LDRS_PC_G2
)
10970 signed_value
= value
- pc
+ signed_addend
;
10972 /* Section base relative. */
10973 signed_value
= value
- sb
+ signed_addend
;
10975 /* Calculate the value of the relevant G_{n-1} to obtain
10976 the residual at that stage. */
10977 calculate_group_reloc_mask (signed_value
< 0 ? - signed_value
: signed_value
,
10978 group
- 1, &residual
);
10980 /* Check for overflow. */
10981 if (residual
>= 0x100)
10983 (*_bfd_error_handler
)
10984 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10985 input_bfd
, input_section
,
10986 (long) rel
->r_offset
, labs (signed_value
), howto
->name
);
10987 return bfd_reloc_overflow
;
10990 /* Mask out the value and U bit. */
10991 insn
&= 0xff7ff0f0;
10993 /* Set the U bit if the value to go in the place is non-negative. */
10994 if (signed_value
>= 0)
10997 /* Encode the offset. */
10998 insn
|= ((residual
& 0xf0) << 4) | (residual
& 0xf);
11000 bfd_put_32 (input_bfd
, insn
, hit_data
);
11002 return bfd_reloc_ok
;
11004 case R_ARM_LDC_PC_G0
:
11005 case R_ARM_LDC_PC_G1
:
11006 case R_ARM_LDC_PC_G2
:
11007 case R_ARM_LDC_SB_G0
:
11008 case R_ARM_LDC_SB_G1
:
11009 case R_ARM_LDC_SB_G2
:
11011 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
11012 bfd_vma pc
= input_section
->output_section
->vma
11013 + input_section
->output_offset
+ rel
->r_offset
;
11014 /* sb is the origin of the *segment* containing the symbol. */
11015 bfd_vma sb
= sym_sec
? sym_sec
->output_section
->vma
: 0;
11017 bfd_signed_vma signed_value
;
11020 /* Determine which groups of bits to calculate. */
11023 case R_ARM_LDC_PC_G0
:
11024 case R_ARM_LDC_SB_G0
:
11028 case R_ARM_LDC_PC_G1
:
11029 case R_ARM_LDC_SB_G1
:
11033 case R_ARM_LDC_PC_G2
:
11034 case R_ARM_LDC_SB_G2
:
11042 /* If REL, extract the addend from the insn. If RELA, it will
11043 have already been fetched for us. */
11044 if (globals
->use_rel
)
11046 int negative
= (insn
& (1 << 23)) ? 1 : -1;
11047 signed_addend
= negative
* ((insn
& 0xff) << 2);
11050 /* Compute the value (X) to go in the place. */
11051 if (r_type
== R_ARM_LDC_PC_G0
11052 || r_type
== R_ARM_LDC_PC_G1
11053 || r_type
== R_ARM_LDC_PC_G2
)
11055 signed_value
= value
- pc
+ signed_addend
;
11057 /* Section base relative. */
11058 signed_value
= value
- sb
+ signed_addend
;
11060 /* Calculate the value of the relevant G_{n-1} to obtain
11061 the residual at that stage. */
11062 calculate_group_reloc_mask (signed_value
< 0 ? - signed_value
: signed_value
,
11063 group
- 1, &residual
);
11065 /* Check for overflow. (The absolute value to go in the place must be
11066 divisible by four and, after having been divided by four, must
11067 fit in eight bits.) */
11068 if ((residual
& 0x3) != 0 || residual
>= 0x400)
11070 (*_bfd_error_handler
)
11071 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
11072 input_bfd
, input_section
,
11073 (long) rel
->r_offset
, labs (signed_value
), howto
->name
);
11074 return bfd_reloc_overflow
;
11077 /* Mask out the value and U bit. */
11078 insn
&= 0xff7fff00;
11080 /* Set the U bit if the value to go in the place is non-negative. */
11081 if (signed_value
>= 0)
11084 /* Encode the offset. */
11085 insn
|= residual
>> 2;
11087 bfd_put_32 (input_bfd
, insn
, hit_data
);
11089 return bfd_reloc_ok
;
11091 case R_ARM_THM_ALU_ABS_G0_NC
:
11092 case R_ARM_THM_ALU_ABS_G1_NC
:
11093 case R_ARM_THM_ALU_ABS_G2_NC
:
11094 case R_ARM_THM_ALU_ABS_G3_NC
:
11096 const int shift_array
[4] = {0, 8, 16, 24};
11097 bfd_vma insn
= bfd_get_16 (input_bfd
, hit_data
);
11098 bfd_vma addr
= value
;
11099 int shift
= shift_array
[r_type
- R_ARM_THM_ALU_ABS_G0_NC
];
11101 /* Compute address. */
11102 if (globals
->use_rel
)
11103 signed_addend
= insn
& 0xff;
11104 addr
+= signed_addend
;
11105 if (branch_type
== ST_BRANCH_TO_THUMB
)
11107 /* Clean imm8 insn. */
11109 /* And update with correct part of address. */
11110 insn
|= (addr
>> shift
) & 0xff;
11112 bfd_put_16 (input_bfd
, insn
, hit_data
);
11115 *unresolved_reloc_p
= FALSE
;
11116 return bfd_reloc_ok
;
11119 return bfd_reloc_notsupported
;
11123 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
11125 arm_add_to_rel (bfd
* abfd
,
11126 bfd_byte
* address
,
11127 reloc_howto_type
* howto
,
11128 bfd_signed_vma increment
)
11130 bfd_signed_vma addend
;
11132 if (howto
->type
== R_ARM_THM_CALL
11133 || howto
->type
== R_ARM_THM_JUMP24
)
11135 int upper_insn
, lower_insn
;
11138 upper_insn
= bfd_get_16 (abfd
, address
);
11139 lower_insn
= bfd_get_16 (abfd
, address
+ 2);
11140 upper
= upper_insn
& 0x7ff;
11141 lower
= lower_insn
& 0x7ff;
11143 addend
= (upper
<< 12) | (lower
<< 1);
11144 addend
+= increment
;
11147 upper_insn
= (upper_insn
& 0xf800) | ((addend
>> 11) & 0x7ff);
11148 lower_insn
= (lower_insn
& 0xf800) | (addend
& 0x7ff);
11150 bfd_put_16 (abfd
, (bfd_vma
) upper_insn
, address
);
11151 bfd_put_16 (abfd
, (bfd_vma
) lower_insn
, address
+ 2);
11157 contents
= bfd_get_32 (abfd
, address
);
11159 /* Get the (signed) value from the instruction. */
11160 addend
= contents
& howto
->src_mask
;
11161 if (addend
& ((howto
->src_mask
+ 1) >> 1))
11163 bfd_signed_vma mask
;
11166 mask
&= ~ howto
->src_mask
;
11170 /* Add in the increment, (which is a byte value). */
11171 switch (howto
->type
)
11174 addend
+= increment
;
11181 addend
<<= howto
->size
;
11182 addend
+= increment
;
11184 /* Should we check for overflow here ? */
11186 /* Drop any undesired bits. */
11187 addend
>>= howto
->rightshift
;
11191 contents
= (contents
& ~ howto
->dst_mask
) | (addend
& howto
->dst_mask
);
11193 bfd_put_32 (abfd
, contents
, address
);
11197 #define IS_ARM_TLS_RELOC(R_TYPE) \
11198 ((R_TYPE) == R_ARM_TLS_GD32 \
11199 || (R_TYPE) == R_ARM_TLS_LDO32 \
11200 || (R_TYPE) == R_ARM_TLS_LDM32 \
11201 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
11202 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
11203 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
11204 || (R_TYPE) == R_ARM_TLS_LE32 \
11205 || (R_TYPE) == R_ARM_TLS_IE32 \
11206 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
11208 /* Specific set of relocations for the gnu tls dialect. */
11209 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
11210 ((R_TYPE) == R_ARM_TLS_GOTDESC \
11211 || (R_TYPE) == R_ARM_TLS_CALL \
11212 || (R_TYPE) == R_ARM_THM_TLS_CALL \
11213 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
11214 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
11216 /* Relocate an ARM ELF section. */
11219 elf32_arm_relocate_section (bfd
* output_bfd
,
11220 struct bfd_link_info
* info
,
11222 asection
* input_section
,
11223 bfd_byte
* contents
,
11224 Elf_Internal_Rela
* relocs
,
11225 Elf_Internal_Sym
* local_syms
,
11226 asection
** local_sections
)
11228 Elf_Internal_Shdr
*symtab_hdr
;
11229 struct elf_link_hash_entry
**sym_hashes
;
11230 Elf_Internal_Rela
*rel
;
11231 Elf_Internal_Rela
*relend
;
11233 struct elf32_arm_link_hash_table
* globals
;
11235 globals
= elf32_arm_hash_table (info
);
11236 if (globals
== NULL
)
11239 symtab_hdr
= & elf_symtab_hdr (input_bfd
);
11240 sym_hashes
= elf_sym_hashes (input_bfd
);
11243 relend
= relocs
+ input_section
->reloc_count
;
11244 for (; rel
< relend
; rel
++)
11247 reloc_howto_type
* howto
;
11248 unsigned long r_symndx
;
11249 Elf_Internal_Sym
* sym
;
11251 struct elf_link_hash_entry
* h
;
11252 bfd_vma relocation
;
11253 bfd_reloc_status_type r
;
11256 bfd_boolean unresolved_reloc
= FALSE
;
11257 char *error_message
= NULL
;
11259 r_symndx
= ELF32_R_SYM (rel
->r_info
);
11260 r_type
= ELF32_R_TYPE (rel
->r_info
);
11261 r_type
= arm_real_reloc_type (globals
, r_type
);
11263 if ( r_type
== R_ARM_GNU_VTENTRY
11264 || r_type
== R_ARM_GNU_VTINHERIT
)
11267 bfd_reloc
.howto
= elf32_arm_howto_from_type (r_type
);
11268 howto
= bfd_reloc
.howto
;
11274 if (r_symndx
< symtab_hdr
->sh_info
)
11276 sym
= local_syms
+ r_symndx
;
11277 sym_type
= ELF32_ST_TYPE (sym
->st_info
);
11278 sec
= local_sections
[r_symndx
];
11280 /* An object file might have a reference to a local
11281 undefined symbol. This is a daft object file, but we
11282 should at least do something about it. V4BX & NONE
11283 relocations do not use the symbol and are explicitly
11284 allowed to use the undefined symbol, so allow those.
11285 Likewise for relocations against STN_UNDEF. */
11286 if (r_type
!= R_ARM_V4BX
11287 && r_type
!= R_ARM_NONE
11288 && r_symndx
!= STN_UNDEF
11289 && bfd_is_und_section (sec
)
11290 && ELF_ST_BIND (sym
->st_info
) != STB_WEAK
)
11292 if (!info
->callbacks
->undefined_symbol
11293 (info
, bfd_elf_string_from_elf_section
11294 (input_bfd
, symtab_hdr
->sh_link
, sym
->st_name
),
11295 input_bfd
, input_section
,
11296 rel
->r_offset
, TRUE
))
11300 if (globals
->use_rel
)
11302 relocation
= (sec
->output_section
->vma
11303 + sec
->output_offset
11305 if (!bfd_link_relocatable (info
)
11306 && (sec
->flags
& SEC_MERGE
)
11307 && ELF_ST_TYPE (sym
->st_info
) == STT_SECTION
)
11310 bfd_vma addend
, value
;
11314 case R_ARM_MOVW_ABS_NC
:
11315 case R_ARM_MOVT_ABS
:
11316 value
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
);
11317 addend
= ((value
& 0xf0000) >> 4) | (value
& 0xfff);
11318 addend
= (addend
^ 0x8000) - 0x8000;
11321 case R_ARM_THM_MOVW_ABS_NC
:
11322 case R_ARM_THM_MOVT_ABS
:
11323 value
= bfd_get_16 (input_bfd
, contents
+ rel
->r_offset
)
11325 value
|= bfd_get_16 (input_bfd
,
11326 contents
+ rel
->r_offset
+ 2);
11327 addend
= ((value
& 0xf7000) >> 4) | (value
& 0xff)
11328 | ((value
& 0x04000000) >> 15);
11329 addend
= (addend
^ 0x8000) - 0x8000;
11333 if (howto
->rightshift
11334 || (howto
->src_mask
& (howto
->src_mask
+ 1)))
11336 (*_bfd_error_handler
)
11337 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
11338 input_bfd
, input_section
,
11339 (long) rel
->r_offset
, howto
->name
);
11343 value
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
);
11345 /* Get the (signed) value from the instruction. */
11346 addend
= value
& howto
->src_mask
;
11347 if (addend
& ((howto
->src_mask
+ 1) >> 1))
11349 bfd_signed_vma mask
;
11352 mask
&= ~ howto
->src_mask
;
11360 _bfd_elf_rel_local_sym (output_bfd
, sym
, &msec
, addend
)
11362 addend
+= msec
->output_section
->vma
+ msec
->output_offset
;
11364 /* Cases here must match those in the preceding
11365 switch statement. */
11368 case R_ARM_MOVW_ABS_NC
:
11369 case R_ARM_MOVT_ABS
:
11370 value
= (value
& 0xfff0f000) | ((addend
& 0xf000) << 4)
11371 | (addend
& 0xfff);
11372 bfd_put_32 (input_bfd
, value
, contents
+ rel
->r_offset
);
11375 case R_ARM_THM_MOVW_ABS_NC
:
11376 case R_ARM_THM_MOVT_ABS
:
11377 value
= (value
& 0xfbf08f00) | ((addend
& 0xf700) << 4)
11378 | (addend
& 0xff) | ((addend
& 0x0800) << 15);
11379 bfd_put_16 (input_bfd
, value
>> 16,
11380 contents
+ rel
->r_offset
);
11381 bfd_put_16 (input_bfd
, value
,
11382 contents
+ rel
->r_offset
+ 2);
11386 value
= (value
& ~ howto
->dst_mask
)
11387 | (addend
& howto
->dst_mask
);
11388 bfd_put_32 (input_bfd
, value
, contents
+ rel
->r_offset
);
11394 relocation
= _bfd_elf_rela_local_sym (output_bfd
, sym
, &sec
, rel
);
11398 bfd_boolean warned
, ignored
;
11400 RELOC_FOR_GLOBAL_SYMBOL (info
, input_bfd
, input_section
, rel
,
11401 r_symndx
, symtab_hdr
, sym_hashes
,
11402 h
, sec
, relocation
,
11403 unresolved_reloc
, warned
, ignored
);
11405 sym_type
= h
->type
;
11408 if (sec
!= NULL
&& discarded_section (sec
))
11409 RELOC_AGAINST_DISCARDED_SECTION (info
, input_bfd
, input_section
,
11410 rel
, 1, relend
, howto
, 0, contents
);
11412 if (bfd_link_relocatable (info
))
11414 /* This is a relocatable link. We don't have to change
11415 anything, unless the reloc is against a section symbol,
11416 in which case we have to adjust according to where the
11417 section symbol winds up in the output section. */
11418 if (sym
!= NULL
&& ELF_ST_TYPE (sym
->st_info
) == STT_SECTION
)
11420 if (globals
->use_rel
)
11421 arm_add_to_rel (input_bfd
, contents
+ rel
->r_offset
,
11422 howto
, (bfd_signed_vma
) sec
->output_offset
);
11424 rel
->r_addend
+= sec
->output_offset
;
11430 name
= h
->root
.root
.string
;
11433 name
= (bfd_elf_string_from_elf_section
11434 (input_bfd
, symtab_hdr
->sh_link
, sym
->st_name
));
11435 if (name
== NULL
|| *name
== '\0')
11436 name
= bfd_section_name (input_bfd
, sec
);
11439 if (r_symndx
!= STN_UNDEF
11440 && r_type
!= R_ARM_NONE
11442 || h
->root
.type
== bfd_link_hash_defined
11443 || h
->root
.type
== bfd_link_hash_defweak
)
11444 && IS_ARM_TLS_RELOC (r_type
) != (sym_type
== STT_TLS
))
11446 (*_bfd_error_handler
)
11447 ((sym_type
== STT_TLS
11448 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
11449 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
11452 (long) rel
->r_offset
,
11457 /* We call elf32_arm_final_link_relocate unless we're completely
11458 done, i.e., the relaxation produced the final output we want,
11459 and we won't let anybody mess with it. Also, we have to do
11460 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
11461 both in relaxed and non-relaxed cases. */
11462 if ((elf32_arm_tls_transition (info
, r_type
, h
) != (unsigned)r_type
)
11463 || (IS_ARM_TLS_GNU_RELOC (r_type
)
11464 && !((h
? elf32_arm_hash_entry (h
)->tls_type
:
11465 elf32_arm_local_got_tls_type (input_bfd
)[r_symndx
])
11468 r
= elf32_arm_tls_relax (globals
, input_bfd
, input_section
,
11469 contents
, rel
, h
== NULL
);
11470 /* This may have been marked unresolved because it came from
11471 a shared library. But we've just dealt with that. */
11472 unresolved_reloc
= 0;
11475 r
= bfd_reloc_continue
;
11477 if (r
== bfd_reloc_continue
)
11478 r
= elf32_arm_final_link_relocate (howto
, input_bfd
, output_bfd
,
11479 input_section
, contents
, rel
,
11480 relocation
, info
, sec
, name
, sym_type
,
11481 (h
? h
->target_internal
11482 : ARM_SYM_BRANCH_TYPE (sym
)), h
,
11483 &unresolved_reloc
, &error_message
);
11485 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
11486 because such sections are not SEC_ALLOC and thus ld.so will
11487 not process them. */
11488 if (unresolved_reloc
11489 && !((input_section
->flags
& SEC_DEBUGGING
) != 0
11491 && _bfd_elf_section_offset (output_bfd
, info
, input_section
,
11492 rel
->r_offset
) != (bfd_vma
) -1)
11494 (*_bfd_error_handler
)
11495 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
11498 (long) rel
->r_offset
,
11500 h
->root
.root
.string
);
11504 if (r
!= bfd_reloc_ok
)
11508 case bfd_reloc_overflow
:
11509 /* If the overflowing reloc was to an undefined symbol,
11510 we have already printed one error message and there
11511 is no point complaining again. */
11513 h
->root
.type
!= bfd_link_hash_undefined
)
11514 && (!((*info
->callbacks
->reloc_overflow
)
11515 (info
, (h
? &h
->root
: NULL
), name
, howto
->name
,
11516 (bfd_vma
) 0, input_bfd
, input_section
,
11521 case bfd_reloc_undefined
:
11522 if (!((*info
->callbacks
->undefined_symbol
)
11523 (info
, name
, input_bfd
, input_section
,
11524 rel
->r_offset
, TRUE
)))
11528 case bfd_reloc_outofrange
:
11529 error_message
= _("out of range");
11532 case bfd_reloc_notsupported
:
11533 error_message
= _("unsupported relocation");
11536 case bfd_reloc_dangerous
:
11537 /* error_message should already be set. */
11541 error_message
= _("unknown error");
11542 /* Fall through. */
11545 BFD_ASSERT (error_message
!= NULL
);
11546 if (!((*info
->callbacks
->reloc_dangerous
)
11547 (info
, error_message
, input_bfd
, input_section
,
11558 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
11559 adds the edit to the start of the list. (The list must be built in order of
11560 ascending TINDEX: the function's callers are primarily responsible for
11561 maintaining that condition). */
11564 add_unwind_table_edit (arm_unwind_table_edit
**head
,
11565 arm_unwind_table_edit
**tail
,
11566 arm_unwind_edit_type type
,
11567 asection
*linked_section
,
11568 unsigned int tindex
)
11570 arm_unwind_table_edit
*new_edit
= (arm_unwind_table_edit
*)
11571 xmalloc (sizeof (arm_unwind_table_edit
));
11573 new_edit
->type
= type
;
11574 new_edit
->linked_section
= linked_section
;
11575 new_edit
->index
= tindex
;
11579 new_edit
->next
= NULL
;
11582 (*tail
)->next
= new_edit
;
11584 (*tail
) = new_edit
;
11587 (*head
) = new_edit
;
11591 new_edit
->next
= *head
;
11600 static _arm_elf_section_data
*get_arm_elf_section_data (asection
*);
11602 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
11604 adjust_exidx_size(asection
*exidx_sec
, int adjust
)
11608 if (!exidx_sec
->rawsize
)
11609 exidx_sec
->rawsize
= exidx_sec
->size
;
11611 bfd_set_section_size (exidx_sec
->owner
, exidx_sec
, exidx_sec
->size
+ adjust
);
11612 out_sec
= exidx_sec
->output_section
;
11613 /* Adjust size of output section. */
11614 bfd_set_section_size (out_sec
->owner
, out_sec
, out_sec
->size
+adjust
);
11617 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
11619 insert_cantunwind_after(asection
*text_sec
, asection
*exidx_sec
)
11621 struct _arm_elf_section_data
*exidx_arm_data
;
11623 exidx_arm_data
= get_arm_elf_section_data (exidx_sec
);
11624 add_unwind_table_edit (
11625 &exidx_arm_data
->u
.exidx
.unwind_edit_list
,
11626 &exidx_arm_data
->u
.exidx
.unwind_edit_tail
,
11627 INSERT_EXIDX_CANTUNWIND_AT_END
, text_sec
, UINT_MAX
);
11629 exidx_arm_data
->additional_reloc_count
++;
11631 adjust_exidx_size(exidx_sec
, 8);
11634 /* Scan .ARM.exidx tables, and create a list describing edits which should be
11635 made to those tables, such that:
11637 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
11638 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
11639 codes which have been inlined into the index).
11641 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
11643 The edits are applied when the tables are written
11644 (in elf32_arm_write_section). */
11647 elf32_arm_fix_exidx_coverage (asection
**text_section_order
,
11648 unsigned int num_text_sections
,
11649 struct bfd_link_info
*info
,
11650 bfd_boolean merge_exidx_entries
)
11653 unsigned int last_second_word
= 0, i
;
11654 asection
*last_exidx_sec
= NULL
;
11655 asection
*last_text_sec
= NULL
;
11656 int last_unwind_type
= -1;
11658 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
11660 for (inp
= info
->input_bfds
; inp
!= NULL
; inp
= inp
->link
.next
)
11664 for (sec
= inp
->sections
; sec
!= NULL
; sec
= sec
->next
)
11666 struct bfd_elf_section_data
*elf_sec
= elf_section_data (sec
);
11667 Elf_Internal_Shdr
*hdr
= &elf_sec
->this_hdr
;
11669 if (!hdr
|| hdr
->sh_type
!= SHT_ARM_EXIDX
)
11672 if (elf_sec
->linked_to
)
11674 Elf_Internal_Shdr
*linked_hdr
11675 = &elf_section_data (elf_sec
->linked_to
)->this_hdr
;
11676 struct _arm_elf_section_data
*linked_sec_arm_data
11677 = get_arm_elf_section_data (linked_hdr
->bfd_section
);
11679 if (linked_sec_arm_data
== NULL
)
11682 /* Link this .ARM.exidx section back from the text section it
11684 linked_sec_arm_data
->u
.text
.arm_exidx_sec
= sec
;
11689 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
11690 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
11691 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
11693 for (i
= 0; i
< num_text_sections
; i
++)
11695 asection
*sec
= text_section_order
[i
];
11696 asection
*exidx_sec
;
11697 struct _arm_elf_section_data
*arm_data
= get_arm_elf_section_data (sec
);
11698 struct _arm_elf_section_data
*exidx_arm_data
;
11699 bfd_byte
*contents
= NULL
;
11700 int deleted_exidx_bytes
= 0;
11702 arm_unwind_table_edit
*unwind_edit_head
= NULL
;
11703 arm_unwind_table_edit
*unwind_edit_tail
= NULL
;
11704 Elf_Internal_Shdr
*hdr
;
11707 if (arm_data
== NULL
)
11710 exidx_sec
= arm_data
->u
.text
.arm_exidx_sec
;
11711 if (exidx_sec
== NULL
)
11713 /* Section has no unwind data. */
11714 if (last_unwind_type
== 0 || !last_exidx_sec
)
11717 /* Ignore zero sized sections. */
11718 if (sec
->size
== 0)
11721 insert_cantunwind_after(last_text_sec
, last_exidx_sec
);
11722 last_unwind_type
= 0;
11726 /* Skip /DISCARD/ sections. */
11727 if (bfd_is_abs_section (exidx_sec
->output_section
))
11730 hdr
= &elf_section_data (exidx_sec
)->this_hdr
;
11731 if (hdr
->sh_type
!= SHT_ARM_EXIDX
)
11734 exidx_arm_data
= get_arm_elf_section_data (exidx_sec
);
11735 if (exidx_arm_data
== NULL
)
11738 ibfd
= exidx_sec
->owner
;
11740 if (hdr
->contents
!= NULL
)
11741 contents
= hdr
->contents
;
11742 else if (! bfd_malloc_and_get_section (ibfd
, exidx_sec
, &contents
))
11746 if (last_unwind_type
> 0)
11748 unsigned int first_word
= bfd_get_32 (ibfd
, contents
);
11749 /* Add cantunwind if first unwind item does not match section
11751 if (first_word
!= sec
->vma
)
11753 insert_cantunwind_after (last_text_sec
, last_exidx_sec
);
11754 last_unwind_type
= 0;
11758 for (j
= 0; j
< hdr
->sh_size
; j
+= 8)
11760 unsigned int second_word
= bfd_get_32 (ibfd
, contents
+ j
+ 4);
11764 /* An EXIDX_CANTUNWIND entry. */
11765 if (second_word
== 1)
11767 if (last_unwind_type
== 0)
11771 /* Inlined unwinding data. Merge if equal to previous. */
11772 else if ((second_word
& 0x80000000) != 0)
11774 if (merge_exidx_entries
11775 && last_second_word
== second_word
&& last_unwind_type
== 1)
11778 last_second_word
= second_word
;
11780 /* Normal table entry. In theory we could merge these too,
11781 but duplicate entries are likely to be much less common. */
11785 if (elide
&& !bfd_link_relocatable (info
))
11787 add_unwind_table_edit (&unwind_edit_head
, &unwind_edit_tail
,
11788 DELETE_EXIDX_ENTRY
, NULL
, j
/ 8);
11790 deleted_exidx_bytes
+= 8;
11793 last_unwind_type
= unwind_type
;
11796 /* Free contents if we allocated it ourselves. */
11797 if (contents
!= hdr
->contents
)
11800 /* Record edits to be applied later (in elf32_arm_write_section). */
11801 exidx_arm_data
->u
.exidx
.unwind_edit_list
= unwind_edit_head
;
11802 exidx_arm_data
->u
.exidx
.unwind_edit_tail
= unwind_edit_tail
;
11804 if (deleted_exidx_bytes
> 0)
11805 adjust_exidx_size(exidx_sec
, -deleted_exidx_bytes
);
11807 last_exidx_sec
= exidx_sec
;
11808 last_text_sec
= sec
;
11811 /* Add terminating CANTUNWIND entry. */
11812 if (!bfd_link_relocatable (info
) && last_exidx_sec
11813 && last_unwind_type
!= 0)
11814 insert_cantunwind_after(last_text_sec
, last_exidx_sec
);
11820 elf32_arm_output_glue_section (struct bfd_link_info
*info
, bfd
*obfd
,
11821 bfd
*ibfd
, const char *name
)
11823 asection
*sec
, *osec
;
11825 sec
= bfd_get_linker_section (ibfd
, name
);
11826 if (sec
== NULL
|| (sec
->flags
& SEC_EXCLUDE
) != 0)
11829 osec
= sec
->output_section
;
11830 if (elf32_arm_write_section (obfd
, info
, sec
, sec
->contents
))
11833 if (! bfd_set_section_contents (obfd
, osec
, sec
->contents
,
11834 sec
->output_offset
, sec
->size
))
11841 elf32_arm_final_link (bfd
*abfd
, struct bfd_link_info
*info
)
11843 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (info
);
11844 asection
*sec
, *osec
;
11846 if (globals
== NULL
)
11849 /* Invoke the regular ELF backend linker to do all the work. */
11850 if (!bfd_elf_final_link (abfd
, info
))
11853 /* Process stub sections (eg BE8 encoding, ...). */
11854 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
11856 for (i
=0; i
<htab
->top_id
; i
++)
11858 sec
= htab
->stub_group
[i
].stub_sec
;
11859 /* Only process it once, in its link_sec slot. */
11860 if (sec
&& i
== htab
->stub_group
[i
].link_sec
->id
)
11862 osec
= sec
->output_section
;
11863 elf32_arm_write_section (abfd
, info
, sec
, sec
->contents
);
11864 if (! bfd_set_section_contents (abfd
, osec
, sec
->contents
,
11865 sec
->output_offset
, sec
->size
))
11870 /* Write out any glue sections now that we have created all the
11872 if (globals
->bfd_of_glue_owner
!= NULL
)
11874 if (! elf32_arm_output_glue_section (info
, abfd
,
11875 globals
->bfd_of_glue_owner
,
11876 ARM2THUMB_GLUE_SECTION_NAME
))
11879 if (! elf32_arm_output_glue_section (info
, abfd
,
11880 globals
->bfd_of_glue_owner
,
11881 THUMB2ARM_GLUE_SECTION_NAME
))
11884 if (! elf32_arm_output_glue_section (info
, abfd
,
11885 globals
->bfd_of_glue_owner
,
11886 VFP11_ERRATUM_VENEER_SECTION_NAME
))
11889 if (! elf32_arm_output_glue_section (info
, abfd
,
11890 globals
->bfd_of_glue_owner
,
11891 STM32L4XX_ERRATUM_VENEER_SECTION_NAME
))
11894 if (! elf32_arm_output_glue_section (info
, abfd
,
11895 globals
->bfd_of_glue_owner
,
11896 ARM_BX_GLUE_SECTION_NAME
))
11903 /* Return a best guess for the machine number based on the attributes. */
11905 static unsigned int
11906 bfd_arm_get_mach_from_attributes (bfd
* abfd
)
11908 int arch
= bfd_elf_get_obj_attr_int (abfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
11912 case TAG_CPU_ARCH_V4
: return bfd_mach_arm_4
;
11913 case TAG_CPU_ARCH_V4T
: return bfd_mach_arm_4T
;
11914 case TAG_CPU_ARCH_V5T
: return bfd_mach_arm_5T
;
11916 case TAG_CPU_ARCH_V5TE
:
11920 BFD_ASSERT (Tag_CPU_name
< NUM_KNOWN_OBJ_ATTRIBUTES
);
11921 name
= elf_known_obj_attributes (abfd
) [OBJ_ATTR_PROC
][Tag_CPU_name
].s
;
11925 if (strcmp (name
, "IWMMXT2") == 0)
11926 return bfd_mach_arm_iWMMXt2
;
11928 if (strcmp (name
, "IWMMXT") == 0)
11929 return bfd_mach_arm_iWMMXt
;
11931 if (strcmp (name
, "XSCALE") == 0)
11935 BFD_ASSERT (Tag_WMMX_arch
< NUM_KNOWN_OBJ_ATTRIBUTES
);
11936 wmmx
= elf_known_obj_attributes (abfd
) [OBJ_ATTR_PROC
][Tag_WMMX_arch
].i
;
11939 case 1: return bfd_mach_arm_iWMMXt
;
11940 case 2: return bfd_mach_arm_iWMMXt2
;
11941 default: return bfd_mach_arm_XScale
;
11946 return bfd_mach_arm_5TE
;
11950 return bfd_mach_arm_unknown
;
11954 /* Set the right machine number. */
11957 elf32_arm_object_p (bfd
*abfd
)
11961 mach
= bfd_arm_get_mach_from_notes (abfd
, ARM_NOTE_SECTION
);
11963 if (mach
== bfd_mach_arm_unknown
)
11965 if (elf_elfheader (abfd
)->e_flags
& EF_ARM_MAVERICK_FLOAT
)
11966 mach
= bfd_mach_arm_ep9312
;
11968 mach
= bfd_arm_get_mach_from_attributes (abfd
);
11971 bfd_default_set_arch_mach (abfd
, bfd_arch_arm
, mach
);
11975 /* Function to keep ARM specific flags in the ELF header. */
11978 elf32_arm_set_private_flags (bfd
*abfd
, flagword flags
)
11980 if (elf_flags_init (abfd
)
11981 && elf_elfheader (abfd
)->e_flags
!= flags
)
11983 if (EF_ARM_EABI_VERSION (flags
) == EF_ARM_EABI_UNKNOWN
)
11985 if (flags
& EF_ARM_INTERWORK
)
11986 (*_bfd_error_handler
)
11987 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
11991 (_("Warning: Clearing the interworking flag of %B due to outside request"),
11997 elf_elfheader (abfd
)->e_flags
= flags
;
11998 elf_flags_init (abfd
) = TRUE
;
12004 /* Copy backend specific data from one object module to another. */
12007 elf32_arm_copy_private_bfd_data (bfd
*ibfd
, bfd
*obfd
)
12010 flagword out_flags
;
12012 if (! is_arm_elf (ibfd
) || ! is_arm_elf (obfd
))
12015 in_flags
= elf_elfheader (ibfd
)->e_flags
;
12016 out_flags
= elf_elfheader (obfd
)->e_flags
;
12018 if (elf_flags_init (obfd
)
12019 && EF_ARM_EABI_VERSION (out_flags
) == EF_ARM_EABI_UNKNOWN
12020 && in_flags
!= out_flags
)
12022 /* Cannot mix APCS26 and APCS32 code. */
12023 if ((in_flags
& EF_ARM_APCS_26
) != (out_flags
& EF_ARM_APCS_26
))
12026 /* Cannot mix float APCS and non-float APCS code. */
12027 if ((in_flags
& EF_ARM_APCS_FLOAT
) != (out_flags
& EF_ARM_APCS_FLOAT
))
12030 /* If the src and dest have different interworking flags
12031 then turn off the interworking bit. */
12032 if ((in_flags
& EF_ARM_INTERWORK
) != (out_flags
& EF_ARM_INTERWORK
))
12034 if (out_flags
& EF_ARM_INTERWORK
)
12036 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
12039 in_flags
&= ~EF_ARM_INTERWORK
;
12042 /* Likewise for PIC, though don't warn for this case. */
12043 if ((in_flags
& EF_ARM_PIC
) != (out_flags
& EF_ARM_PIC
))
12044 in_flags
&= ~EF_ARM_PIC
;
12047 elf_elfheader (obfd
)->e_flags
= in_flags
;
12048 elf_flags_init (obfd
) = TRUE
;
12050 return _bfd_elf_copy_private_bfd_data (ibfd
, obfd
);
12053 /* Values for Tag_ABI_PCS_R9_use. */
12062 /* Values for Tag_ABI_PCS_RW_data. */
12065 AEABI_PCS_RW_data_absolute
,
12066 AEABI_PCS_RW_data_PCrel
,
12067 AEABI_PCS_RW_data_SBrel
,
12068 AEABI_PCS_RW_data_unused
12071 /* Values for Tag_ABI_enum_size. */
12077 AEABI_enum_forced_wide
12080 /* Determine whether an object attribute tag takes an integer, a
12084 elf32_arm_obj_attrs_arg_type (int tag
)
12086 if (tag
== Tag_compatibility
)
12087 return ATTR_TYPE_FLAG_INT_VAL
| ATTR_TYPE_FLAG_STR_VAL
;
12088 else if (tag
== Tag_nodefaults
)
12089 return ATTR_TYPE_FLAG_INT_VAL
| ATTR_TYPE_FLAG_NO_DEFAULT
;
12090 else if (tag
== Tag_CPU_raw_name
|| tag
== Tag_CPU_name
)
12091 return ATTR_TYPE_FLAG_STR_VAL
;
12093 return ATTR_TYPE_FLAG_INT_VAL
;
12095 return (tag
& 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL
: ATTR_TYPE_FLAG_INT_VAL
;
12098 /* The ABI defines that Tag_conformance should be emitted first, and that
12099 Tag_nodefaults should be second (if either is defined). This sets those
12100 two positions, and bumps up the position of all the remaining tags to
12103 elf32_arm_obj_attrs_order (int num
)
12105 if (num
== LEAST_KNOWN_OBJ_ATTRIBUTE
)
12106 return Tag_conformance
;
12107 if (num
== LEAST_KNOWN_OBJ_ATTRIBUTE
+ 1)
12108 return Tag_nodefaults
;
12109 if ((num
- 2) < Tag_nodefaults
)
12111 if ((num
- 1) < Tag_conformance
)
12116 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
12118 elf32_arm_obj_attrs_handle_unknown (bfd
*abfd
, int tag
)
12120 if ((tag
& 127) < 64)
12123 (_("%B: Unknown mandatory EABI object attribute %d"),
12125 bfd_set_error (bfd_error_bad_value
);
12131 (_("Warning: %B: Unknown EABI object attribute %d"),
12137 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
12138 Returns -1 if no architecture could be read. */
12141 get_secondary_compatible_arch (bfd
*abfd
)
12143 obj_attribute
*attr
=
12144 &elf_known_obj_attributes_proc (abfd
)[Tag_also_compatible_with
];
12146 /* Note: the tag and its argument below are uleb128 values, though
12147 currently-defined values fit in one byte for each. */
12149 && attr
->s
[0] == Tag_CPU_arch
12150 && (attr
->s
[1] & 128) != 128
12151 && attr
->s
[2] == 0)
12154 /* This tag is "safely ignorable", so don't complain if it looks funny. */
12158 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
12159 The tag is removed if ARCH is -1. */
12162 set_secondary_compatible_arch (bfd
*abfd
, int arch
)
12164 obj_attribute
*attr
=
12165 &elf_known_obj_attributes_proc (abfd
)[Tag_also_compatible_with
];
12173 /* Note: the tag and its argument below are uleb128 values, though
12174 currently-defined values fit in one byte for each. */
12176 attr
->s
= (char *) bfd_alloc (abfd
, 3);
12177 attr
->s
[0] = Tag_CPU_arch
;
12182 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
12186 tag_cpu_arch_combine (bfd
*ibfd
, int oldtag
, int *secondary_compat_out
,
12187 int newtag
, int secondary_compat
)
12189 #define T(X) TAG_CPU_ARCH_##X
12190 int tagl
, tagh
, result
;
12193 T(V6T2
), /* PRE_V4. */
12195 T(V6T2
), /* V4T. */
12196 T(V6T2
), /* V5T. */
12197 T(V6T2
), /* V5TE. */
12198 T(V6T2
), /* V5TEJ. */
12201 T(V6T2
) /* V6T2. */
12205 T(V6K
), /* PRE_V4. */
12209 T(V6K
), /* V5TE. */
12210 T(V6K
), /* V5TEJ. */
12212 T(V6KZ
), /* V6KZ. */
12218 T(V7
), /* PRE_V4. */
12223 T(V7
), /* V5TEJ. */
12236 T(V6K
), /* V5TE. */
12237 T(V6K
), /* V5TEJ. */
12239 T(V6KZ
), /* V6KZ. */
12243 T(V6_M
) /* V6_M. */
12245 const int v6s_m
[] =
12251 T(V6K
), /* V5TE. */
12252 T(V6K
), /* V5TEJ. */
12254 T(V6KZ
), /* V6KZ. */
12258 T(V6S_M
), /* V6_M. */
12259 T(V6S_M
) /* V6S_M. */
12261 const int v7e_m
[] =
12265 T(V7E_M
), /* V4T. */
12266 T(V7E_M
), /* V5T. */
12267 T(V7E_M
), /* V5TE. */
12268 T(V7E_M
), /* V5TEJ. */
12269 T(V7E_M
), /* V6. */
12270 T(V7E_M
), /* V6KZ. */
12271 T(V7E_M
), /* V6T2. */
12272 T(V7E_M
), /* V6K. */
12273 T(V7E_M
), /* V7. */
12274 T(V7E_M
), /* V6_M. */
12275 T(V7E_M
), /* V6S_M. */
12276 T(V7E_M
) /* V7E_M. */
12280 T(V8
), /* PRE_V4. */
12285 T(V8
), /* V5TEJ. */
12292 T(V8
), /* V6S_M. */
12293 T(V8
), /* V7E_M. */
12296 const int v8m_baseline
[] =
12309 T(V8M_BASE
), /* V6_M. */
12310 T(V8M_BASE
), /* V6S_M. */
12314 T(V8M_BASE
) /* V8-M BASELINE. */
12316 const int v8m_mainline
[] =
12328 T(V8M_MAIN
), /* V7. */
12329 T(V8M_MAIN
), /* V6_M. */
12330 T(V8M_MAIN
), /* V6S_M. */
12331 T(V8M_MAIN
), /* V7E_M. */
12334 T(V8M_MAIN
), /* V8-M BASELINE. */
12335 T(V8M_MAIN
) /* V8-M MAINLINE. */
12337 const int v4t_plus_v6_m
[] =
12343 T(V5TE
), /* V5TE. */
12344 T(V5TEJ
), /* V5TEJ. */
12346 T(V6KZ
), /* V6KZ. */
12347 T(V6T2
), /* V6T2. */
12350 T(V6_M
), /* V6_M. */
12351 T(V6S_M
), /* V6S_M. */
12352 T(V7E_M
), /* V7E_M. */
12355 T(V8M_BASE
), /* V8-M BASELINE. */
12356 T(V8M_MAIN
), /* V8-M MAINLINE. */
12357 T(V4T_PLUS_V6_M
) /* V4T plus V6_M. */
12359 const int *comb
[] =
12371 /* Pseudo-architecture. */
12375 /* Check we've not got a higher architecture than we know about. */
12377 if (oldtag
> MAX_TAG_CPU_ARCH
|| newtag
> MAX_TAG_CPU_ARCH
)
12379 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd
);
12383 /* Override old tag if we have a Tag_also_compatible_with on the output. */
12385 if ((oldtag
== T(V6_M
) && *secondary_compat_out
== T(V4T
))
12386 || (oldtag
== T(V4T
) && *secondary_compat_out
== T(V6_M
)))
12387 oldtag
= T(V4T_PLUS_V6_M
);
12389 /* And override the new tag if we have a Tag_also_compatible_with on the
12392 if ((newtag
== T(V6_M
) && secondary_compat
== T(V4T
))
12393 || (newtag
== T(V4T
) && secondary_compat
== T(V6_M
)))
12394 newtag
= T(V4T_PLUS_V6_M
);
12396 tagl
= (oldtag
< newtag
) ? oldtag
: newtag
;
12397 result
= tagh
= (oldtag
> newtag
) ? oldtag
: newtag
;
12399 /* Architectures before V6KZ add features monotonically. */
12400 if (tagh
<= TAG_CPU_ARCH_V6KZ
)
12403 result
= comb
[tagh
- T(V6T2
)] ? comb
[tagh
- T(V6T2
)][tagl
] : -1;
12405 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
12406 as the canonical version. */
12407 if (result
== T(V4T_PLUS_V6_M
))
12410 *secondary_compat_out
= T(V6_M
);
12413 *secondary_compat_out
= -1;
12417 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
12418 ibfd
, oldtag
, newtag
);
12426 /* Query attributes object to see if integer divide instructions may be
12427 present in an object. */
12429 elf32_arm_attributes_accept_div (const obj_attribute
*attr
)
12431 int arch
= attr
[Tag_CPU_arch
].i
;
12432 int profile
= attr
[Tag_CPU_arch_profile
].i
;
12434 switch (attr
[Tag_DIV_use
].i
)
12437 /* Integer divide allowed if instruction contained in archetecture. */
12438 if (arch
== TAG_CPU_ARCH_V7
&& (profile
== 'R' || profile
== 'M'))
12440 else if (arch
>= TAG_CPU_ARCH_V7E_M
)
12446 /* Integer divide explicitly prohibited. */
12450 /* Unrecognised case - treat as allowing divide everywhere. */
12452 /* Integer divide allowed in ARM state. */
12457 /* Query attributes object to see if integer divide instructions are
12458 forbidden to be in the object. This is not the inverse of
12459 elf32_arm_attributes_accept_div. */
12461 elf32_arm_attributes_forbid_div (const obj_attribute
*attr
)
12463 return attr
[Tag_DIV_use
].i
== 1;
12466 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
12467 are conflicting attributes. */
12470 elf32_arm_merge_eabi_attributes (bfd
*ibfd
, bfd
*obfd
)
12472 obj_attribute
*in_attr
;
12473 obj_attribute
*out_attr
;
12474 /* Some tags have 0 = don't care, 1 = strong requirement,
12475 2 = weak requirement. */
12476 static const int order_021
[3] = {0, 2, 1};
12478 bfd_boolean result
= TRUE
;
12479 const char *sec_name
= get_elf_backend_data (ibfd
)->obj_attrs_section
;
12481 /* Skip the linker stubs file. This preserves previous behavior
12482 of accepting unknown attributes in the first input file - but
12484 if (ibfd
->flags
& BFD_LINKER_CREATED
)
12487 /* Skip any input that hasn't attribute section.
12488 This enables to link object files without attribute section with
12490 if (bfd_get_section_by_name (ibfd
, sec_name
) == NULL
)
12493 if (!elf_known_obj_attributes_proc (obfd
)[0].i
)
12495 /* This is the first object. Copy the attributes. */
12496 _bfd_elf_copy_obj_attributes (ibfd
, obfd
);
12498 out_attr
= elf_known_obj_attributes_proc (obfd
);
12500 /* Use the Tag_null value to indicate the attributes have been
12504 /* We do not output objects with Tag_MPextension_use_legacy - we move
12505 the attribute's value to Tag_MPextension_use. */
12506 if (out_attr
[Tag_MPextension_use_legacy
].i
!= 0)
12508 if (out_attr
[Tag_MPextension_use
].i
!= 0
12509 && out_attr
[Tag_MPextension_use_legacy
].i
12510 != out_attr
[Tag_MPextension_use
].i
)
12513 (_("Error: %B has both the current and legacy "
12514 "Tag_MPextension_use attributes"), ibfd
);
12518 out_attr
[Tag_MPextension_use
] =
12519 out_attr
[Tag_MPextension_use_legacy
];
12520 out_attr
[Tag_MPextension_use_legacy
].type
= 0;
12521 out_attr
[Tag_MPextension_use_legacy
].i
= 0;
12527 in_attr
= elf_known_obj_attributes_proc (ibfd
);
12528 out_attr
= elf_known_obj_attributes_proc (obfd
);
12529 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
12530 if (in_attr
[Tag_ABI_VFP_args
].i
!= out_attr
[Tag_ABI_VFP_args
].i
)
12532 /* Ignore mismatches if the object doesn't use floating point or is
12533 floating point ABI independent. */
12534 if (out_attr
[Tag_ABI_FP_number_model
].i
== AEABI_FP_number_model_none
12535 || (in_attr
[Tag_ABI_FP_number_model
].i
!= AEABI_FP_number_model_none
12536 && out_attr
[Tag_ABI_VFP_args
].i
== AEABI_VFP_args_compatible
))
12537 out_attr
[Tag_ABI_VFP_args
].i
= in_attr
[Tag_ABI_VFP_args
].i
;
12538 else if (in_attr
[Tag_ABI_FP_number_model
].i
!= AEABI_FP_number_model_none
12539 && in_attr
[Tag_ABI_VFP_args
].i
!= AEABI_VFP_args_compatible
)
12542 (_("error: %B uses VFP register arguments, %B does not"),
12543 in_attr
[Tag_ABI_VFP_args
].i
? ibfd
: obfd
,
12544 in_attr
[Tag_ABI_VFP_args
].i
? obfd
: ibfd
);
12549 for (i
= LEAST_KNOWN_OBJ_ATTRIBUTE
; i
< NUM_KNOWN_OBJ_ATTRIBUTES
; i
++)
12551 /* Merge this attribute with existing attributes. */
12554 case Tag_CPU_raw_name
:
12556 /* These are merged after Tag_CPU_arch. */
12559 case Tag_ABI_optimization_goals
:
12560 case Tag_ABI_FP_optimization_goals
:
12561 /* Use the first value seen. */
12566 int secondary_compat
= -1, secondary_compat_out
= -1;
12567 unsigned int saved_out_attr
= out_attr
[i
].i
;
12569 static const char *name_table
[] =
12571 /* These aren't real CPU names, but we can't guess
12572 that from the architecture version alone. */
12588 "ARM v8-M.baseline",
12589 "ARM v8-M.mainline",
12592 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
12593 secondary_compat
= get_secondary_compatible_arch (ibfd
);
12594 secondary_compat_out
= get_secondary_compatible_arch (obfd
);
12595 arch_attr
= tag_cpu_arch_combine (ibfd
, out_attr
[i
].i
,
12596 &secondary_compat_out
,
12600 /* Return with error if failed to merge. */
12601 if (arch_attr
== -1)
12604 out_attr
[i
].i
= arch_attr
;
12606 set_secondary_compatible_arch (obfd
, secondary_compat_out
);
12608 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
12609 if (out_attr
[i
].i
== saved_out_attr
)
12610 ; /* Leave the names alone. */
12611 else if (out_attr
[i
].i
== in_attr
[i
].i
)
12613 /* The output architecture has been changed to match the
12614 input architecture. Use the input names. */
12615 out_attr
[Tag_CPU_name
].s
= in_attr
[Tag_CPU_name
].s
12616 ? _bfd_elf_attr_strdup (obfd
, in_attr
[Tag_CPU_name
].s
)
12618 out_attr
[Tag_CPU_raw_name
].s
= in_attr
[Tag_CPU_raw_name
].s
12619 ? _bfd_elf_attr_strdup (obfd
, in_attr
[Tag_CPU_raw_name
].s
)
12624 out_attr
[Tag_CPU_name
].s
= NULL
;
12625 out_attr
[Tag_CPU_raw_name
].s
= NULL
;
12628 /* If we still don't have a value for Tag_CPU_name,
12629 make one up now. Tag_CPU_raw_name remains blank. */
12630 if (out_attr
[Tag_CPU_name
].s
== NULL
12631 && out_attr
[i
].i
< ARRAY_SIZE (name_table
))
12632 out_attr
[Tag_CPU_name
].s
=
12633 _bfd_elf_attr_strdup (obfd
, name_table
[out_attr
[i
].i
]);
12637 case Tag_ARM_ISA_use
:
12638 case Tag_THUMB_ISA_use
:
12639 case Tag_WMMX_arch
:
12640 case Tag_Advanced_SIMD_arch
:
12641 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
12642 case Tag_ABI_FP_rounding
:
12643 case Tag_ABI_FP_exceptions
:
12644 case Tag_ABI_FP_user_exceptions
:
12645 case Tag_ABI_FP_number_model
:
12646 case Tag_FP_HP_extension
:
12647 case Tag_CPU_unaligned_access
:
12649 case Tag_MPextension_use
:
12650 /* Use the largest value specified. */
12651 if (in_attr
[i
].i
> out_attr
[i
].i
)
12652 out_attr
[i
].i
= in_attr
[i
].i
;
12655 case Tag_ABI_align_preserved
:
12656 case Tag_ABI_PCS_RO_data
:
12657 /* Use the smallest value specified. */
12658 if (in_attr
[i
].i
< out_attr
[i
].i
)
12659 out_attr
[i
].i
= in_attr
[i
].i
;
12662 case Tag_ABI_align_needed
:
12663 if ((in_attr
[i
].i
> 0 || out_attr
[i
].i
> 0)
12664 && (in_attr
[Tag_ABI_align_preserved
].i
== 0
12665 || out_attr
[Tag_ABI_align_preserved
].i
== 0))
12667 /* This error message should be enabled once all non-conformant
12668 binaries in the toolchain have had the attributes set
12671 (_("error: %B: 8-byte data alignment conflicts with %B"),
12675 /* Fall through. */
12676 case Tag_ABI_FP_denormal
:
12677 case Tag_ABI_PCS_GOT_use
:
12678 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
12679 value if greater than 2 (for future-proofing). */
12680 if ((in_attr
[i
].i
> 2 && in_attr
[i
].i
> out_attr
[i
].i
)
12681 || (in_attr
[i
].i
<= 2 && out_attr
[i
].i
<= 2
12682 && order_021
[in_attr
[i
].i
] > order_021
[out_attr
[i
].i
]))
12683 out_attr
[i
].i
= in_attr
[i
].i
;
12686 case Tag_Virtualization_use
:
12687 /* The virtualization tag effectively stores two bits of
12688 information: the intended use of TrustZone (in bit 0), and the
12689 intended use of Virtualization (in bit 1). */
12690 if (out_attr
[i
].i
== 0)
12691 out_attr
[i
].i
= in_attr
[i
].i
;
12692 else if (in_attr
[i
].i
!= 0
12693 && in_attr
[i
].i
!= out_attr
[i
].i
)
12695 if (in_attr
[i
].i
<= 3 && out_attr
[i
].i
<= 3)
12700 (_("error: %B: unable to merge virtualization attributes "
12708 case Tag_CPU_arch_profile
:
12709 if (out_attr
[i
].i
!= in_attr
[i
].i
)
12711 /* 0 will merge with anything.
12712 'A' and 'S' merge to 'A'.
12713 'R' and 'S' merge to 'R'.
12714 'M' and 'A|R|S' is an error. */
12715 if (out_attr
[i
].i
== 0
12716 || (out_attr
[i
].i
== 'S'
12717 && (in_attr
[i
].i
== 'A' || in_attr
[i
].i
== 'R')))
12718 out_attr
[i
].i
= in_attr
[i
].i
;
12719 else if (in_attr
[i
].i
== 0
12720 || (in_attr
[i
].i
== 'S'
12721 && (out_attr
[i
].i
== 'A' || out_attr
[i
].i
== 'R')))
12722 ; /* Do nothing. */
12726 (_("error: %B: Conflicting architecture profiles %c/%c"),
12728 in_attr
[i
].i
? in_attr
[i
].i
: '0',
12729 out_attr
[i
].i
? out_attr
[i
].i
: '0');
12736 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
12737 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
12738 when it's 0. It might mean absence of FP hardware if
12739 Tag_FP_arch is zero. */
12741 #define VFP_VERSION_COUNT 9
12742 static const struct
12746 } vfp_versions
[VFP_VERSION_COUNT
] =
12762 /* If the output has no requirement about FP hardware,
12763 follow the requirement of the input. */
12764 if (out_attr
[i
].i
== 0)
12766 BFD_ASSERT (out_attr
[Tag_ABI_HardFP_use
].i
== 0);
12767 out_attr
[i
].i
= in_attr
[i
].i
;
12768 out_attr
[Tag_ABI_HardFP_use
].i
12769 = in_attr
[Tag_ABI_HardFP_use
].i
;
12772 /* If the input has no requirement about FP hardware, do
12774 else if (in_attr
[i
].i
== 0)
12776 BFD_ASSERT (in_attr
[Tag_ABI_HardFP_use
].i
== 0);
12780 /* Both the input and the output have nonzero Tag_FP_arch.
12781 So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */
12783 /* If both the input and the output have zero Tag_ABI_HardFP_use,
12785 if (in_attr
[Tag_ABI_HardFP_use
].i
== 0
12786 && out_attr
[Tag_ABI_HardFP_use
].i
== 0)
12788 /* If the input and the output have different Tag_ABI_HardFP_use,
12789 the combination of them is 0 (implied by Tag_FP_arch). */
12790 else if (in_attr
[Tag_ABI_HardFP_use
].i
12791 != out_attr
[Tag_ABI_HardFP_use
].i
)
12792 out_attr
[Tag_ABI_HardFP_use
].i
= 0;
12794 /* Now we can handle Tag_FP_arch. */
12796 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
12797 pick the biggest. */
12798 if (in_attr
[i
].i
>= VFP_VERSION_COUNT
12799 && in_attr
[i
].i
> out_attr
[i
].i
)
12801 out_attr
[i
] = in_attr
[i
];
12804 /* The output uses the superset of input features
12805 (ISA version) and registers. */
12806 ver
= vfp_versions
[in_attr
[i
].i
].ver
;
12807 if (ver
< vfp_versions
[out_attr
[i
].i
].ver
)
12808 ver
= vfp_versions
[out_attr
[i
].i
].ver
;
12809 regs
= vfp_versions
[in_attr
[i
].i
].regs
;
12810 if (regs
< vfp_versions
[out_attr
[i
].i
].regs
)
12811 regs
= vfp_versions
[out_attr
[i
].i
].regs
;
12812 /* This assumes all possible supersets are also a valid
12814 for (newval
= VFP_VERSION_COUNT
- 1; newval
> 0; newval
--)
12816 if (regs
== vfp_versions
[newval
].regs
12817 && ver
== vfp_versions
[newval
].ver
)
12820 out_attr
[i
].i
= newval
;
12823 case Tag_PCS_config
:
12824 if (out_attr
[i
].i
== 0)
12825 out_attr
[i
].i
= in_attr
[i
].i
;
12826 else if (in_attr
[i
].i
!= 0 && out_attr
[i
].i
!= in_attr
[i
].i
)
12828 /* It's sometimes ok to mix different configs, so this is only
12831 (_("Warning: %B: Conflicting platform configuration"), ibfd
);
12834 case Tag_ABI_PCS_R9_use
:
12835 if (in_attr
[i
].i
!= out_attr
[i
].i
12836 && out_attr
[i
].i
!= AEABI_R9_unused
12837 && in_attr
[i
].i
!= AEABI_R9_unused
)
12840 (_("error: %B: Conflicting use of R9"), ibfd
);
12843 if (out_attr
[i
].i
== AEABI_R9_unused
)
12844 out_attr
[i
].i
= in_attr
[i
].i
;
12846 case Tag_ABI_PCS_RW_data
:
12847 if (in_attr
[i
].i
== AEABI_PCS_RW_data_SBrel
12848 && out_attr
[Tag_ABI_PCS_R9_use
].i
!= AEABI_R9_SB
12849 && out_attr
[Tag_ABI_PCS_R9_use
].i
!= AEABI_R9_unused
)
12852 (_("error: %B: SB relative addressing conflicts with use of R9"),
12856 /* Use the smallest value specified. */
12857 if (in_attr
[i
].i
< out_attr
[i
].i
)
12858 out_attr
[i
].i
= in_attr
[i
].i
;
12860 case Tag_ABI_PCS_wchar_t
:
12861 if (out_attr
[i
].i
&& in_attr
[i
].i
&& out_attr
[i
].i
!= in_attr
[i
].i
12862 && !elf_arm_tdata (obfd
)->no_wchar_size_warning
)
12865 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
12866 ibfd
, in_attr
[i
].i
, out_attr
[i
].i
);
12868 else if (in_attr
[i
].i
&& !out_attr
[i
].i
)
12869 out_attr
[i
].i
= in_attr
[i
].i
;
12871 case Tag_ABI_enum_size
:
12872 if (in_attr
[i
].i
!= AEABI_enum_unused
)
12874 if (out_attr
[i
].i
== AEABI_enum_unused
12875 || out_attr
[i
].i
== AEABI_enum_forced_wide
)
12877 /* The existing object is compatible with anything.
12878 Use whatever requirements the new object has. */
12879 out_attr
[i
].i
= in_attr
[i
].i
;
12881 else if (in_attr
[i
].i
!= AEABI_enum_forced_wide
12882 && out_attr
[i
].i
!= in_attr
[i
].i
12883 && !elf_arm_tdata (obfd
)->no_enum_size_warning
)
12885 static const char *aeabi_enum_names
[] =
12886 { "", "variable-size", "32-bit", "" };
12887 const char *in_name
=
12888 in_attr
[i
].i
< ARRAY_SIZE(aeabi_enum_names
)
12889 ? aeabi_enum_names
[in_attr
[i
].i
]
12891 const char *out_name
=
12892 out_attr
[i
].i
< ARRAY_SIZE(aeabi_enum_names
)
12893 ? aeabi_enum_names
[out_attr
[i
].i
]
12896 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
12897 ibfd
, in_name
, out_name
);
12901 case Tag_ABI_VFP_args
:
12904 case Tag_ABI_WMMX_args
:
12905 if (in_attr
[i
].i
!= out_attr
[i
].i
)
12908 (_("error: %B uses iWMMXt register arguments, %B does not"),
12913 case Tag_compatibility
:
12914 /* Merged in target-independent code. */
12916 case Tag_ABI_HardFP_use
:
12917 /* This is handled along with Tag_FP_arch. */
12919 case Tag_ABI_FP_16bit_format
:
12920 if (in_attr
[i
].i
!= 0 && out_attr
[i
].i
!= 0)
12922 if (in_attr
[i
].i
!= out_attr
[i
].i
)
12925 (_("error: fp16 format mismatch between %B and %B"),
12930 if (in_attr
[i
].i
!= 0)
12931 out_attr
[i
].i
= in_attr
[i
].i
;
12935 /* A value of zero on input means that the divide instruction may
12936 be used if available in the base architecture as specified via
12937 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
12938 the user did not want divide instructions. A value of 2
12939 explicitly means that divide instructions were allowed in ARM
12940 and Thumb state. */
12941 if (in_attr
[i
].i
== out_attr
[i
].i
)
12942 /* Do nothing. */ ;
12943 else if (elf32_arm_attributes_forbid_div (in_attr
)
12944 && !elf32_arm_attributes_accept_div (out_attr
))
12946 else if (elf32_arm_attributes_forbid_div (out_attr
)
12947 && elf32_arm_attributes_accept_div (in_attr
))
12948 out_attr
[i
].i
= in_attr
[i
].i
;
12949 else if (in_attr
[i
].i
== 2)
12950 out_attr
[i
].i
= in_attr
[i
].i
;
12953 case Tag_MPextension_use_legacy
:
12954 /* We don't output objects with Tag_MPextension_use_legacy - we
12955 move the value to Tag_MPextension_use. */
12956 if (in_attr
[i
].i
!= 0 && in_attr
[Tag_MPextension_use
].i
!= 0)
12958 if (in_attr
[Tag_MPextension_use
].i
!= in_attr
[i
].i
)
12961 (_("%B has has both the current and legacy "
12962 "Tag_MPextension_use attributes"),
12968 if (in_attr
[i
].i
> out_attr
[Tag_MPextension_use
].i
)
12969 out_attr
[Tag_MPextension_use
] = in_attr
[i
];
12973 case Tag_nodefaults
:
12974 /* This tag is set if it exists, but the value is unused (and is
12975 typically zero). We don't actually need to do anything here -
12976 the merge happens automatically when the type flags are merged
12979 case Tag_also_compatible_with
:
12980 /* Already done in Tag_CPU_arch. */
12982 case Tag_conformance
:
12983 /* Keep the attribute if it matches. Throw it away otherwise.
12984 No attribute means no claim to conform. */
12985 if (!in_attr
[i
].s
|| !out_attr
[i
].s
12986 || strcmp (in_attr
[i
].s
, out_attr
[i
].s
) != 0)
12987 out_attr
[i
].s
= NULL
;
12992 = result
&& _bfd_elf_merge_unknown_attribute_low (ibfd
, obfd
, i
);
12995 /* If out_attr was copied from in_attr then it won't have a type yet. */
12996 if (in_attr
[i
].type
&& !out_attr
[i
].type
)
12997 out_attr
[i
].type
= in_attr
[i
].type
;
13000 /* Merge Tag_compatibility attributes and any common GNU ones. */
13001 if (!_bfd_elf_merge_object_attributes (ibfd
, obfd
))
13004 /* Check for any attributes not known on ARM. */
13005 result
&= _bfd_elf_merge_unknown_attribute_list (ibfd
, obfd
);
13011 /* Return TRUE if the two EABI versions are incompatible. */
13014 elf32_arm_versions_compatible (unsigned iver
, unsigned over
)
13016 /* v4 and v5 are the same spec before and after it was released,
13017 so allow mixing them. */
13018 if ((iver
== EF_ARM_EABI_VER4
&& over
== EF_ARM_EABI_VER5
)
13019 || (iver
== EF_ARM_EABI_VER5
&& over
== EF_ARM_EABI_VER4
))
13022 return (iver
== over
);
13025 /* Merge backend specific data from an object file to the output
13026 object file when linking. */
13029 elf32_arm_merge_private_bfd_data (bfd
* ibfd
, bfd
* obfd
);
13031 /* Display the flags field. */
13034 elf32_arm_print_private_bfd_data (bfd
*abfd
, void * ptr
)
13036 FILE * file
= (FILE *) ptr
;
13037 unsigned long flags
;
13039 BFD_ASSERT (abfd
!= NULL
&& ptr
!= NULL
);
13041 /* Print normal ELF private data. */
13042 _bfd_elf_print_private_bfd_data (abfd
, ptr
);
13044 flags
= elf_elfheader (abfd
)->e_flags
;
13045 /* Ignore init flag - it may not be set, despite the flags field
13046 containing valid data. */
13048 /* xgettext:c-format */
13049 fprintf (file
, _("private flags = %lx:"), elf_elfheader (abfd
)->e_flags
);
13051 switch (EF_ARM_EABI_VERSION (flags
))
13053 case EF_ARM_EABI_UNKNOWN
:
13054 /* The following flag bits are GNU extensions and not part of the
13055 official ARM ELF extended ABI. Hence they are only decoded if
13056 the EABI version is not set. */
13057 if (flags
& EF_ARM_INTERWORK
)
13058 fprintf (file
, _(" [interworking enabled]"));
13060 if (flags
& EF_ARM_APCS_26
)
13061 fprintf (file
, " [APCS-26]");
13063 fprintf (file
, " [APCS-32]");
13065 if (flags
& EF_ARM_VFP_FLOAT
)
13066 fprintf (file
, _(" [VFP float format]"));
13067 else if (flags
& EF_ARM_MAVERICK_FLOAT
)
13068 fprintf (file
, _(" [Maverick float format]"));
13070 fprintf (file
, _(" [FPA float format]"));
13072 if (flags
& EF_ARM_APCS_FLOAT
)
13073 fprintf (file
, _(" [floats passed in float registers]"));
13075 if (flags
& EF_ARM_PIC
)
13076 fprintf (file
, _(" [position independent]"));
13078 if (flags
& EF_ARM_NEW_ABI
)
13079 fprintf (file
, _(" [new ABI]"));
13081 if (flags
& EF_ARM_OLD_ABI
)
13082 fprintf (file
, _(" [old ABI]"));
13084 if (flags
& EF_ARM_SOFT_FLOAT
)
13085 fprintf (file
, _(" [software FP]"));
13087 flags
&= ~(EF_ARM_INTERWORK
| EF_ARM_APCS_26
| EF_ARM_APCS_FLOAT
13088 | EF_ARM_PIC
| EF_ARM_NEW_ABI
| EF_ARM_OLD_ABI
13089 | EF_ARM_SOFT_FLOAT
| EF_ARM_VFP_FLOAT
13090 | EF_ARM_MAVERICK_FLOAT
);
13093 case EF_ARM_EABI_VER1
:
13094 fprintf (file
, _(" [Version1 EABI]"));
13096 if (flags
& EF_ARM_SYMSARESORTED
)
13097 fprintf (file
, _(" [sorted symbol table]"));
13099 fprintf (file
, _(" [unsorted symbol table]"));
13101 flags
&= ~ EF_ARM_SYMSARESORTED
;
13104 case EF_ARM_EABI_VER2
:
13105 fprintf (file
, _(" [Version2 EABI]"));
13107 if (flags
& EF_ARM_SYMSARESORTED
)
13108 fprintf (file
, _(" [sorted symbol table]"));
13110 fprintf (file
, _(" [unsorted symbol table]"));
13112 if (flags
& EF_ARM_DYNSYMSUSESEGIDX
)
13113 fprintf (file
, _(" [dynamic symbols use segment index]"));
13115 if (flags
& EF_ARM_MAPSYMSFIRST
)
13116 fprintf (file
, _(" [mapping symbols precede others]"));
13118 flags
&= ~(EF_ARM_SYMSARESORTED
| EF_ARM_DYNSYMSUSESEGIDX
13119 | EF_ARM_MAPSYMSFIRST
);
13122 case EF_ARM_EABI_VER3
:
13123 fprintf (file
, _(" [Version3 EABI]"));
13126 case EF_ARM_EABI_VER4
:
13127 fprintf (file
, _(" [Version4 EABI]"));
13130 case EF_ARM_EABI_VER5
:
13131 fprintf (file
, _(" [Version5 EABI]"));
13133 if (flags
& EF_ARM_ABI_FLOAT_SOFT
)
13134 fprintf (file
, _(" [soft-float ABI]"));
13136 if (flags
& EF_ARM_ABI_FLOAT_HARD
)
13137 fprintf (file
, _(" [hard-float ABI]"));
13139 flags
&= ~(EF_ARM_ABI_FLOAT_SOFT
| EF_ARM_ABI_FLOAT_HARD
);
13142 if (flags
& EF_ARM_BE8
)
13143 fprintf (file
, _(" [BE8]"));
13145 if (flags
& EF_ARM_LE8
)
13146 fprintf (file
, _(" [LE8]"));
13148 flags
&= ~(EF_ARM_LE8
| EF_ARM_BE8
);
13152 fprintf (file
, _(" <EABI version unrecognised>"));
13156 flags
&= ~ EF_ARM_EABIMASK
;
13158 if (flags
& EF_ARM_RELEXEC
)
13159 fprintf (file
, _(" [relocatable executable]"));
13161 flags
&= ~EF_ARM_RELEXEC
;
13164 fprintf (file
, _("<Unrecognised flag bits set>"));
13166 fputc ('\n', file
);
13172 elf32_arm_get_symbol_type (Elf_Internal_Sym
* elf_sym
, int type
)
13174 switch (ELF_ST_TYPE (elf_sym
->st_info
))
13176 case STT_ARM_TFUNC
:
13177 return ELF_ST_TYPE (elf_sym
->st_info
);
13179 case STT_ARM_16BIT
:
13180 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
13181 This allows us to distinguish between data used by Thumb instructions
13182 and non-data (which is probably code) inside Thumb regions of an
13184 if (type
!= STT_OBJECT
&& type
!= STT_TLS
)
13185 return ELF_ST_TYPE (elf_sym
->st_info
);
13196 elf32_arm_gc_mark_hook (asection
*sec
,
13197 struct bfd_link_info
*info
,
13198 Elf_Internal_Rela
*rel
,
13199 struct elf_link_hash_entry
*h
,
13200 Elf_Internal_Sym
*sym
)
13203 switch (ELF32_R_TYPE (rel
->r_info
))
13205 case R_ARM_GNU_VTINHERIT
:
13206 case R_ARM_GNU_VTENTRY
:
13210 return _bfd_elf_gc_mark_hook (sec
, info
, rel
, h
, sym
);
13213 /* Update the got entry reference counts for the section being removed. */
13216 elf32_arm_gc_sweep_hook (bfd
* abfd
,
13217 struct bfd_link_info
* info
,
13219 const Elf_Internal_Rela
* relocs
)
13221 Elf_Internal_Shdr
*symtab_hdr
;
13222 struct elf_link_hash_entry
**sym_hashes
;
13223 bfd_signed_vma
*local_got_refcounts
;
13224 const Elf_Internal_Rela
*rel
, *relend
;
13225 struct elf32_arm_link_hash_table
* globals
;
13227 if (bfd_link_relocatable (info
))
13230 globals
= elf32_arm_hash_table (info
);
13231 if (globals
== NULL
)
13234 elf_section_data (sec
)->local_dynrel
= NULL
;
13236 symtab_hdr
= & elf_symtab_hdr (abfd
);
13237 sym_hashes
= elf_sym_hashes (abfd
);
13238 local_got_refcounts
= elf_local_got_refcounts (abfd
);
13240 check_use_blx (globals
);
13242 relend
= relocs
+ sec
->reloc_count
;
13243 for (rel
= relocs
; rel
< relend
; rel
++)
13245 unsigned long r_symndx
;
13246 struct elf_link_hash_entry
*h
= NULL
;
13247 struct elf32_arm_link_hash_entry
*eh
;
13249 bfd_boolean call_reloc_p
;
13250 bfd_boolean may_become_dynamic_p
;
13251 bfd_boolean may_need_local_target_p
;
13252 union gotplt_union
*root_plt
;
13253 struct arm_plt_info
*arm_plt
;
13255 r_symndx
= ELF32_R_SYM (rel
->r_info
);
13256 if (r_symndx
>= symtab_hdr
->sh_info
)
13258 h
= sym_hashes
[r_symndx
- symtab_hdr
->sh_info
];
13259 while (h
->root
.type
== bfd_link_hash_indirect
13260 || h
->root
.type
== bfd_link_hash_warning
)
13261 h
= (struct elf_link_hash_entry
*) h
->root
.u
.i
.link
;
13263 eh
= (struct elf32_arm_link_hash_entry
*) h
;
13265 call_reloc_p
= FALSE
;
13266 may_become_dynamic_p
= FALSE
;
13267 may_need_local_target_p
= FALSE
;
13269 r_type
= ELF32_R_TYPE (rel
->r_info
);
13270 r_type
= arm_real_reloc_type (globals
, r_type
);
13274 case R_ARM_GOT_PREL
:
13275 case R_ARM_TLS_GD32
:
13276 case R_ARM_TLS_IE32
:
13279 if (h
->got
.refcount
> 0)
13280 h
->got
.refcount
-= 1;
13282 else if (local_got_refcounts
!= NULL
)
13284 if (local_got_refcounts
[r_symndx
] > 0)
13285 local_got_refcounts
[r_symndx
] -= 1;
13289 case R_ARM_TLS_LDM32
:
13290 globals
->tls_ldm_got
.refcount
-= 1;
13298 case R_ARM_THM_CALL
:
13299 case R_ARM_THM_JUMP24
:
13300 case R_ARM_THM_JUMP19
:
13301 call_reloc_p
= TRUE
;
13302 may_need_local_target_p
= TRUE
;
13306 if (!globals
->vxworks_p
)
13308 may_need_local_target_p
= TRUE
;
13311 /* Fall through. */
13313 case R_ARM_ABS32_NOI
:
13315 case R_ARM_REL32_NOI
:
13316 case R_ARM_MOVW_ABS_NC
:
13317 case R_ARM_MOVT_ABS
:
13318 case R_ARM_MOVW_PREL_NC
:
13319 case R_ARM_MOVT_PREL
:
13320 case R_ARM_THM_MOVW_ABS_NC
:
13321 case R_ARM_THM_MOVT_ABS
:
13322 case R_ARM_THM_MOVW_PREL_NC
:
13323 case R_ARM_THM_MOVT_PREL
:
13324 /* Should the interworking branches be here also? */
13325 if ((bfd_link_pic (info
) || globals
->root
.is_relocatable_executable
)
13326 && (sec
->flags
& SEC_ALLOC
) != 0)
13329 && elf32_arm_howto_from_type (r_type
)->pc_relative
)
13331 call_reloc_p
= TRUE
;
13332 may_need_local_target_p
= TRUE
;
13335 may_become_dynamic_p
= TRUE
;
13338 may_need_local_target_p
= TRUE
;
13345 if (may_need_local_target_p
13346 && elf32_arm_get_plt_info (abfd
, eh
, r_symndx
, &root_plt
, &arm_plt
))
13348 /* If PLT refcount book-keeping is wrong and too low, we'll
13349 see a zero value (going to -1) for the root PLT reference
13351 if (root_plt
->refcount
>= 0)
13353 BFD_ASSERT (root_plt
->refcount
!= 0);
13354 root_plt
->refcount
-= 1;
13357 /* A value of -1 means the symbol has become local, forced
13358 or seeing a hidden definition. Any other negative value
13360 BFD_ASSERT (root_plt
->refcount
== -1);
13363 arm_plt
->noncall_refcount
--;
13365 if (r_type
== R_ARM_THM_CALL
)
13366 arm_plt
->maybe_thumb_refcount
--;
13368 if (r_type
== R_ARM_THM_JUMP24
13369 || r_type
== R_ARM_THM_JUMP19
)
13370 arm_plt
->thumb_refcount
--;
13373 if (may_become_dynamic_p
)
13375 struct elf_dyn_relocs
**pp
;
13376 struct elf_dyn_relocs
*p
;
13379 pp
= &(eh
->dyn_relocs
);
13382 Elf_Internal_Sym
*isym
;
13384 isym
= bfd_sym_from_r_symndx (&globals
->sym_cache
,
13388 pp
= elf32_arm_get_local_dynreloc_list (abfd
, r_symndx
, isym
);
13392 for (; (p
= *pp
) != NULL
; pp
= &p
->next
)
13395 /* Everything must go for SEC. */
13405 /* Look through the relocs for a section during the first phase. */
13408 elf32_arm_check_relocs (bfd
*abfd
, struct bfd_link_info
*info
,
13409 asection
*sec
, const Elf_Internal_Rela
*relocs
)
13411 Elf_Internal_Shdr
*symtab_hdr
;
13412 struct elf_link_hash_entry
**sym_hashes
;
13413 const Elf_Internal_Rela
*rel
;
13414 const Elf_Internal_Rela
*rel_end
;
13417 struct elf32_arm_link_hash_table
*htab
;
13418 bfd_boolean call_reloc_p
;
13419 bfd_boolean may_become_dynamic_p
;
13420 bfd_boolean may_need_local_target_p
;
13421 unsigned long nsyms
;
13423 if (bfd_link_relocatable (info
))
13426 BFD_ASSERT (is_arm_elf (abfd
));
13428 htab
= elf32_arm_hash_table (info
);
13434 /* Create dynamic sections for relocatable executables so that we can
13435 copy relocations. */
13436 if (htab
->root
.is_relocatable_executable
13437 && ! htab
->root
.dynamic_sections_created
)
13439 if (! _bfd_elf_link_create_dynamic_sections (abfd
, info
))
13443 if (htab
->root
.dynobj
== NULL
)
13444 htab
->root
.dynobj
= abfd
;
13445 if (!create_ifunc_sections (info
))
13448 dynobj
= htab
->root
.dynobj
;
13450 symtab_hdr
= & elf_symtab_hdr (abfd
);
13451 sym_hashes
= elf_sym_hashes (abfd
);
13452 nsyms
= NUM_SHDR_ENTRIES (symtab_hdr
);
13454 rel_end
= relocs
+ sec
->reloc_count
;
13455 for (rel
= relocs
; rel
< rel_end
; rel
++)
13457 Elf_Internal_Sym
*isym
;
13458 struct elf_link_hash_entry
*h
;
13459 struct elf32_arm_link_hash_entry
*eh
;
13460 unsigned long r_symndx
;
13463 r_symndx
= ELF32_R_SYM (rel
->r_info
);
13464 r_type
= ELF32_R_TYPE (rel
->r_info
);
13465 r_type
= arm_real_reloc_type (htab
, r_type
);
13467 if (r_symndx
>= nsyms
13468 /* PR 9934: It is possible to have relocations that do not
13469 refer to symbols, thus it is also possible to have an
13470 object file containing relocations but no symbol table. */
13471 && (r_symndx
> STN_UNDEF
|| nsyms
> 0))
13473 (*_bfd_error_handler
) (_("%B: bad symbol index: %d"), abfd
,
13482 if (r_symndx
< symtab_hdr
->sh_info
)
13484 /* A local symbol. */
13485 isym
= bfd_sym_from_r_symndx (&htab
->sym_cache
,
13492 h
= sym_hashes
[r_symndx
- symtab_hdr
->sh_info
];
13493 while (h
->root
.type
== bfd_link_hash_indirect
13494 || h
->root
.type
== bfd_link_hash_warning
)
13495 h
= (struct elf_link_hash_entry
*) h
->root
.u
.i
.link
;
13497 /* PR15323, ref flags aren't set for references in the
13499 h
->root
.non_ir_ref
= 1;
13503 eh
= (struct elf32_arm_link_hash_entry
*) h
;
13505 call_reloc_p
= FALSE
;
13506 may_become_dynamic_p
= FALSE
;
13507 may_need_local_target_p
= FALSE
;
13509 /* Could be done earlier, if h were already available. */
13510 r_type
= elf32_arm_tls_transition (info
, r_type
, h
);
13514 case R_ARM_GOT_PREL
:
13515 case R_ARM_TLS_GD32
:
13516 case R_ARM_TLS_IE32
:
13517 case R_ARM_TLS_GOTDESC
:
13518 case R_ARM_TLS_DESCSEQ
:
13519 case R_ARM_THM_TLS_DESCSEQ
:
13520 case R_ARM_TLS_CALL
:
13521 case R_ARM_THM_TLS_CALL
:
13522 /* This symbol requires a global offset table entry. */
13524 int tls_type
, old_tls_type
;
13528 case R_ARM_TLS_GD32
: tls_type
= GOT_TLS_GD
; break;
13530 case R_ARM_TLS_IE32
: tls_type
= GOT_TLS_IE
; break;
13532 case R_ARM_TLS_GOTDESC
:
13533 case R_ARM_TLS_CALL
: case R_ARM_THM_TLS_CALL
:
13534 case R_ARM_TLS_DESCSEQ
: case R_ARM_THM_TLS_DESCSEQ
:
13535 tls_type
= GOT_TLS_GDESC
; break;
13537 default: tls_type
= GOT_NORMAL
; break;
13540 if (!bfd_link_executable (info
) && (tls_type
& GOT_TLS_IE
))
13541 info
->flags
|= DF_STATIC_TLS
;
13546 old_tls_type
= elf32_arm_hash_entry (h
)->tls_type
;
13550 /* This is a global offset table entry for a local symbol. */
13551 if (!elf32_arm_allocate_local_sym_info (abfd
))
13553 elf_local_got_refcounts (abfd
)[r_symndx
] += 1;
13554 old_tls_type
= elf32_arm_local_got_tls_type (abfd
) [r_symndx
];
13557 /* If a variable is accessed with both tls methods, two
13558 slots may be created. */
13559 if (GOT_TLS_GD_ANY_P (old_tls_type
)
13560 && GOT_TLS_GD_ANY_P (tls_type
))
13561 tls_type
|= old_tls_type
;
13563 /* We will already have issued an error message if there
13564 is a TLS/non-TLS mismatch, based on the symbol
13565 type. So just combine any TLS types needed. */
13566 if (old_tls_type
!= GOT_UNKNOWN
&& old_tls_type
!= GOT_NORMAL
13567 && tls_type
!= GOT_NORMAL
)
13568 tls_type
|= old_tls_type
;
13570 /* If the symbol is accessed in both IE and GDESC
13571 method, we're able to relax. Turn off the GDESC flag,
13572 without messing up with any other kind of tls types
13573 that may be involved. */
13574 if ((tls_type
& GOT_TLS_IE
) && (tls_type
& GOT_TLS_GDESC
))
13575 tls_type
&= ~GOT_TLS_GDESC
;
13577 if (old_tls_type
!= tls_type
)
13580 elf32_arm_hash_entry (h
)->tls_type
= tls_type
;
13582 elf32_arm_local_got_tls_type (abfd
) [r_symndx
] = tls_type
;
13585 /* Fall through. */
13587 case R_ARM_TLS_LDM32
:
13588 if (r_type
== R_ARM_TLS_LDM32
)
13589 htab
->tls_ldm_got
.refcount
++;
13590 /* Fall through. */
13592 case R_ARM_GOTOFF32
:
13594 if (htab
->root
.sgot
== NULL
13595 && !create_got_section (htab
->root
.dynobj
, info
))
13604 case R_ARM_THM_CALL
:
13605 case R_ARM_THM_JUMP24
:
13606 case R_ARM_THM_JUMP19
:
13607 call_reloc_p
= TRUE
;
13608 may_need_local_target_p
= TRUE
;
13612 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
13613 ldr __GOTT_INDEX__ offsets. */
13614 if (!htab
->vxworks_p
)
13616 may_need_local_target_p
= TRUE
;
13619 else goto jump_over
;
13621 /* Fall through. */
13623 case R_ARM_MOVW_ABS_NC
:
13624 case R_ARM_MOVT_ABS
:
13625 case R_ARM_THM_MOVW_ABS_NC
:
13626 case R_ARM_THM_MOVT_ABS
:
13627 if (bfd_link_pic (info
))
13629 (*_bfd_error_handler
)
13630 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
13631 abfd
, elf32_arm_howto_table_1
[r_type
].name
,
13632 (h
) ? h
->root
.root
.string
: "a local symbol");
13633 bfd_set_error (bfd_error_bad_value
);
13637 /* Fall through. */
13639 case R_ARM_ABS32_NOI
:
13641 if (h
!= NULL
&& bfd_link_executable (info
))
13643 h
->pointer_equality_needed
= 1;
13645 /* Fall through. */
13647 case R_ARM_REL32_NOI
:
13648 case R_ARM_MOVW_PREL_NC
:
13649 case R_ARM_MOVT_PREL
:
13650 case R_ARM_THM_MOVW_PREL_NC
:
13651 case R_ARM_THM_MOVT_PREL
:
13653 /* Should the interworking branches be listed here? */
13654 if ((bfd_link_pic (info
) || htab
->root
.is_relocatable_executable
)
13655 && (sec
->flags
& SEC_ALLOC
) != 0)
13658 && elf32_arm_howto_from_type (r_type
)->pc_relative
)
13660 /* In shared libraries and relocatable executables,
13661 we treat local relative references as calls;
13662 see the related SYMBOL_CALLS_LOCAL code in
13663 allocate_dynrelocs. */
13664 call_reloc_p
= TRUE
;
13665 may_need_local_target_p
= TRUE
;
13668 /* We are creating a shared library or relocatable
13669 executable, and this is a reloc against a global symbol,
13670 or a non-PC-relative reloc against a local symbol.
13671 We may need to copy the reloc into the output. */
13672 may_become_dynamic_p
= TRUE
;
13675 may_need_local_target_p
= TRUE
;
13678 /* This relocation describes the C++ object vtable hierarchy.
13679 Reconstruct it for later use during GC. */
13680 case R_ARM_GNU_VTINHERIT
:
13681 if (!bfd_elf_gc_record_vtinherit (abfd
, sec
, h
, rel
->r_offset
))
13685 /* This relocation describes which C++ vtable entries are actually
13686 used. Record for later use during GC. */
13687 case R_ARM_GNU_VTENTRY
:
13688 BFD_ASSERT (h
!= NULL
);
13690 && !bfd_elf_gc_record_vtentry (abfd
, sec
, h
, rel
->r_offset
))
13698 /* We may need a .plt entry if the function this reloc
13699 refers to is in a different object, regardless of the
13700 symbol's type. We can't tell for sure yet, because
13701 something later might force the symbol local. */
13703 else if (may_need_local_target_p
)
13704 /* If this reloc is in a read-only section, we might
13705 need a copy reloc. We can't check reliably at this
13706 stage whether the section is read-only, as input
13707 sections have not yet been mapped to output sections.
13708 Tentatively set the flag for now, and correct in
13709 adjust_dynamic_symbol. */
13710 h
->non_got_ref
= 1;
13713 if (may_need_local_target_p
13714 && (h
!= NULL
|| ELF32_ST_TYPE (isym
->st_info
) == STT_GNU_IFUNC
))
13716 union gotplt_union
*root_plt
;
13717 struct arm_plt_info
*arm_plt
;
13718 struct arm_local_iplt_info
*local_iplt
;
13722 root_plt
= &h
->plt
;
13723 arm_plt
= &eh
->plt
;
13727 local_iplt
= elf32_arm_create_local_iplt (abfd
, r_symndx
);
13728 if (local_iplt
== NULL
)
13730 root_plt
= &local_iplt
->root
;
13731 arm_plt
= &local_iplt
->arm
;
13734 /* If the symbol is a function that doesn't bind locally,
13735 this relocation will need a PLT entry. */
13736 if (root_plt
->refcount
!= -1)
13737 root_plt
->refcount
+= 1;
13740 arm_plt
->noncall_refcount
++;
13742 /* It's too early to use htab->use_blx here, so we have to
13743 record possible blx references separately from
13744 relocs that definitely need a thumb stub. */
13746 if (r_type
== R_ARM_THM_CALL
)
13747 arm_plt
->maybe_thumb_refcount
+= 1;
13749 if (r_type
== R_ARM_THM_JUMP24
13750 || r_type
== R_ARM_THM_JUMP19
)
13751 arm_plt
->thumb_refcount
+= 1;
13754 if (may_become_dynamic_p
)
13756 struct elf_dyn_relocs
*p
, **head
;
13758 /* Create a reloc section in dynobj. */
13759 if (sreloc
== NULL
)
13761 sreloc
= _bfd_elf_make_dynamic_reloc_section
13762 (sec
, dynobj
, 2, abfd
, ! htab
->use_rel
);
13764 if (sreloc
== NULL
)
13767 /* BPABI objects never have dynamic relocations mapped. */
13768 if (htab
->symbian_p
)
13772 flags
= bfd_get_section_flags (dynobj
, sreloc
);
13773 flags
&= ~(SEC_LOAD
| SEC_ALLOC
);
13774 bfd_set_section_flags (dynobj
, sreloc
, flags
);
13778 /* If this is a global symbol, count the number of
13779 relocations we need for this symbol. */
13781 head
= &((struct elf32_arm_link_hash_entry
*) h
)->dyn_relocs
;
13784 head
= elf32_arm_get_local_dynreloc_list (abfd
, r_symndx
, isym
);
13790 if (p
== NULL
|| p
->sec
!= sec
)
13792 bfd_size_type amt
= sizeof *p
;
13794 p
= (struct elf_dyn_relocs
*) bfd_alloc (htab
->root
.dynobj
, amt
);
13804 if (elf32_arm_howto_from_type (r_type
)->pc_relative
)
13813 /* Unwinding tables are not referenced directly. This pass marks them as
13814 required if the corresponding code section is marked. */
13817 elf32_arm_gc_mark_extra_sections (struct bfd_link_info
*info
,
13818 elf_gc_mark_hook_fn gc_mark_hook
)
13821 Elf_Internal_Shdr
**elf_shdrp
;
13824 _bfd_elf_gc_mark_extra_sections (info
, gc_mark_hook
);
13826 /* Marking EH data may cause additional code sections to be marked,
13827 requiring multiple passes. */
13832 for (sub
= info
->input_bfds
; sub
!= NULL
; sub
= sub
->link
.next
)
13836 if (! is_arm_elf (sub
))
13839 elf_shdrp
= elf_elfsections (sub
);
13840 for (o
= sub
->sections
; o
!= NULL
; o
= o
->next
)
13842 Elf_Internal_Shdr
*hdr
;
13844 hdr
= &elf_section_data (o
)->this_hdr
;
13845 if (hdr
->sh_type
== SHT_ARM_EXIDX
13847 && hdr
->sh_link
< elf_numsections (sub
)
13849 && elf_shdrp
[hdr
->sh_link
]->bfd_section
->gc_mark
)
13852 if (!_bfd_elf_gc_mark (info
, o
, gc_mark_hook
))
13862 /* Treat mapping symbols as special target symbols. */
13865 elf32_arm_is_target_special_symbol (bfd
* abfd ATTRIBUTE_UNUSED
, asymbol
* sym
)
13867 return bfd_is_arm_special_symbol_name (sym
->name
,
13868 BFD_ARM_SPECIAL_SYM_TYPE_ANY
);
13871 /* This is a copy of elf_find_function() from elf.c except that
13872 ARM mapping symbols are ignored when looking for function names
13873 and STT_ARM_TFUNC is considered to a function type. */
13876 arm_elf_find_function (bfd
* abfd ATTRIBUTE_UNUSED
,
13877 asymbol
** symbols
,
13878 asection
* section
,
13880 const char ** filename_ptr
,
13881 const char ** functionname_ptr
)
13883 const char * filename
= NULL
;
13884 asymbol
* func
= NULL
;
13885 bfd_vma low_func
= 0;
13888 for (p
= symbols
; *p
!= NULL
; p
++)
13890 elf_symbol_type
*q
;
13892 q
= (elf_symbol_type
*) *p
;
13894 switch (ELF_ST_TYPE (q
->internal_elf_sym
.st_info
))
13899 filename
= bfd_asymbol_name (&q
->symbol
);
13902 case STT_ARM_TFUNC
:
13904 /* Skip mapping symbols. */
13905 if ((q
->symbol
.flags
& BSF_LOCAL
)
13906 && bfd_is_arm_special_symbol_name (q
->symbol
.name
,
13907 BFD_ARM_SPECIAL_SYM_TYPE_ANY
))
13909 /* Fall through. */
13910 if (bfd_get_section (&q
->symbol
) == section
13911 && q
->symbol
.value
>= low_func
13912 && q
->symbol
.value
<= offset
)
13914 func
= (asymbol
*) q
;
13915 low_func
= q
->symbol
.value
;
13925 *filename_ptr
= filename
;
13926 if (functionname_ptr
)
13927 *functionname_ptr
= bfd_asymbol_name (func
);
13933 /* Find the nearest line to a particular section and offset, for error
13934 reporting. This code is a duplicate of the code in elf.c, except
13935 that it uses arm_elf_find_function. */
13938 elf32_arm_find_nearest_line (bfd
* abfd
,
13939 asymbol
** symbols
,
13940 asection
* section
,
13942 const char ** filename_ptr
,
13943 const char ** functionname_ptr
,
13944 unsigned int * line_ptr
,
13945 unsigned int * discriminator_ptr
)
13947 bfd_boolean found
= FALSE
;
13949 if (_bfd_dwarf2_find_nearest_line (abfd
, symbols
, NULL
, section
, offset
,
13950 filename_ptr
, functionname_ptr
,
13951 line_ptr
, discriminator_ptr
,
13952 dwarf_debug_sections
, 0,
13953 & elf_tdata (abfd
)->dwarf2_find_line_info
))
13955 if (!*functionname_ptr
)
13956 arm_elf_find_function (abfd
, symbols
, section
, offset
,
13957 *filename_ptr
? NULL
: filename_ptr
,
13963 /* Skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain
13966 if (! _bfd_stab_section_find_nearest_line (abfd
, symbols
, section
, offset
,
13967 & found
, filename_ptr
,
13968 functionname_ptr
, line_ptr
,
13969 & elf_tdata (abfd
)->line_info
))
13972 if (found
&& (*functionname_ptr
|| *line_ptr
))
13975 if (symbols
== NULL
)
13978 if (! arm_elf_find_function (abfd
, symbols
, section
, offset
,
13979 filename_ptr
, functionname_ptr
))
13987 elf32_arm_find_inliner_info (bfd
* abfd
,
13988 const char ** filename_ptr
,
13989 const char ** functionname_ptr
,
13990 unsigned int * line_ptr
)
13993 found
= _bfd_dwarf2_find_inliner_info (abfd
, filename_ptr
,
13994 functionname_ptr
, line_ptr
,
13995 & elf_tdata (abfd
)->dwarf2_find_line_info
);
13999 /* Adjust a symbol defined by a dynamic object and referenced by a
14000 regular object. The current definition is in some section of the
14001 dynamic object, but we're not including those sections. We have to
14002 change the definition to something the rest of the link can
14006 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info
* info
,
14007 struct elf_link_hash_entry
* h
)
14011 struct elf32_arm_link_hash_entry
* eh
;
14012 struct elf32_arm_link_hash_table
*globals
;
14014 globals
= elf32_arm_hash_table (info
);
14015 if (globals
== NULL
)
14018 dynobj
= elf_hash_table (info
)->dynobj
;
14020 /* Make sure we know what is going on here. */
14021 BFD_ASSERT (dynobj
!= NULL
14023 || h
->type
== STT_GNU_IFUNC
14024 || h
->u
.weakdef
!= NULL
14027 && !h
->def_regular
)));
14029 eh
= (struct elf32_arm_link_hash_entry
*) h
;
14031 /* If this is a function, put it in the procedure linkage table. We
14032 will fill in the contents of the procedure linkage table later,
14033 when we know the address of the .got section. */
14034 if (h
->type
== STT_FUNC
|| h
->type
== STT_GNU_IFUNC
|| h
->needs_plt
)
14036 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
14037 symbol binds locally. */
14038 if (h
->plt
.refcount
<= 0
14039 || (h
->type
!= STT_GNU_IFUNC
14040 && (SYMBOL_CALLS_LOCAL (info
, h
)
14041 || (ELF_ST_VISIBILITY (h
->other
) != STV_DEFAULT
14042 && h
->root
.type
== bfd_link_hash_undefweak
))))
14044 /* This case can occur if we saw a PLT32 reloc in an input
14045 file, but the symbol was never referred to by a dynamic
14046 object, or if all references were garbage collected. In
14047 such a case, we don't actually need to build a procedure
14048 linkage table, and we can just do a PC24 reloc instead. */
14049 h
->plt
.offset
= (bfd_vma
) -1;
14050 eh
->plt
.thumb_refcount
= 0;
14051 eh
->plt
.maybe_thumb_refcount
= 0;
14052 eh
->plt
.noncall_refcount
= 0;
14060 /* It's possible that we incorrectly decided a .plt reloc was
14061 needed for an R_ARM_PC24 or similar reloc to a non-function sym
14062 in check_relocs. We can't decide accurately between function
14063 and non-function syms in check-relocs; Objects loaded later in
14064 the link may change h->type. So fix it now. */
14065 h
->plt
.offset
= (bfd_vma
) -1;
14066 eh
->plt
.thumb_refcount
= 0;
14067 eh
->plt
.maybe_thumb_refcount
= 0;
14068 eh
->plt
.noncall_refcount
= 0;
14071 /* If this is a weak symbol, and there is a real definition, the
14072 processor independent code will have arranged for us to see the
14073 real definition first, and we can just use the same value. */
14074 if (h
->u
.weakdef
!= NULL
)
14076 BFD_ASSERT (h
->u
.weakdef
->root
.type
== bfd_link_hash_defined
14077 || h
->u
.weakdef
->root
.type
== bfd_link_hash_defweak
);
14078 h
->root
.u
.def
.section
= h
->u
.weakdef
->root
.u
.def
.section
;
14079 h
->root
.u
.def
.value
= h
->u
.weakdef
->root
.u
.def
.value
;
14083 /* If there are no non-GOT references, we do not need a copy
14085 if (!h
->non_got_ref
)
14088 /* This is a reference to a symbol defined by a dynamic object which
14089 is not a function. */
14091 /* If we are creating a shared library, we must presume that the
14092 only references to the symbol are via the global offset table.
14093 For such cases we need not do anything here; the relocations will
14094 be handled correctly by relocate_section. Relocatable executables
14095 can reference data in shared objects directly, so we don't need to
14096 do anything here. */
14097 if (bfd_link_pic (info
) || globals
->root
.is_relocatable_executable
)
14100 /* We must allocate the symbol in our .dynbss section, which will
14101 become part of the .bss section of the executable. There will be
14102 an entry for this symbol in the .dynsym section. The dynamic
14103 object will contain position independent code, so all references
14104 from the dynamic object to this symbol will go through the global
14105 offset table. The dynamic linker will use the .dynsym entry to
14106 determine the address it must put in the global offset table, so
14107 both the dynamic object and the regular object will refer to the
14108 same memory location for the variable. */
14109 s
= bfd_get_linker_section (dynobj
, ".dynbss");
14110 BFD_ASSERT (s
!= NULL
);
14112 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
14113 copy the initial value out of the dynamic object and into the
14114 runtime process image. We need to remember the offset into the
14115 .rel(a).bss section we are going to use. */
14116 if ((h
->root
.u
.def
.section
->flags
& SEC_ALLOC
) != 0 && h
->size
!= 0)
14120 srel
= bfd_get_linker_section (dynobj
, RELOC_SECTION (globals
, ".bss"));
14121 elf32_arm_allocate_dynrelocs (info
, srel
, 1);
14125 return _bfd_elf_adjust_dynamic_copy (info
, h
, s
);
14128 /* Allocate space in .plt, .got and associated reloc sections for
14132 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry
*h
, void * inf
)
14134 struct bfd_link_info
*info
;
14135 struct elf32_arm_link_hash_table
*htab
;
14136 struct elf32_arm_link_hash_entry
*eh
;
14137 struct elf_dyn_relocs
*p
;
14139 if (h
->root
.type
== bfd_link_hash_indirect
)
14142 eh
= (struct elf32_arm_link_hash_entry
*) h
;
14144 info
= (struct bfd_link_info
*) inf
;
14145 htab
= elf32_arm_hash_table (info
);
14149 if ((htab
->root
.dynamic_sections_created
|| h
->type
== STT_GNU_IFUNC
)
14150 && h
->plt
.refcount
> 0)
14152 /* Make sure this symbol is output as a dynamic symbol.
14153 Undefined weak syms won't yet be marked as dynamic. */
14154 if (h
->dynindx
== -1
14155 && !h
->forced_local
)
14157 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
14161 /* If the call in the PLT entry binds locally, the associated
14162 GOT entry should use an R_ARM_IRELATIVE relocation instead of
14163 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
14164 than the .plt section. */
14165 if (h
->type
== STT_GNU_IFUNC
&& SYMBOL_CALLS_LOCAL (info
, h
))
14168 if (eh
->plt
.noncall_refcount
== 0
14169 && SYMBOL_REFERENCES_LOCAL (info
, h
))
14170 /* All non-call references can be resolved directly.
14171 This means that they can (and in some cases, must)
14172 resolve directly to the run-time target, rather than
14173 to the PLT. That in turns means that any .got entry
14174 would be equal to the .igot.plt entry, so there's
14175 no point having both. */
14176 h
->got
.refcount
= 0;
14179 if (bfd_link_pic (info
)
14181 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h
))
14183 elf32_arm_allocate_plt_entry (info
, eh
->is_iplt
, &h
->plt
, &eh
->plt
);
14185 /* If this symbol is not defined in a regular file, and we are
14186 not generating a shared library, then set the symbol to this
14187 location in the .plt. This is required to make function
14188 pointers compare as equal between the normal executable and
14189 the shared library. */
14190 if (! bfd_link_pic (info
)
14191 && !h
->def_regular
)
14193 h
->root
.u
.def
.section
= htab
->root
.splt
;
14194 h
->root
.u
.def
.value
= h
->plt
.offset
;
14196 /* Make sure the function is not marked as Thumb, in case
14197 it is the target of an ABS32 relocation, which will
14198 point to the PLT entry. */
14199 h
->target_internal
= ST_BRANCH_TO_ARM
;
14202 /* VxWorks executables have a second set of relocations for
14203 each PLT entry. They go in a separate relocation section,
14204 which is processed by the kernel loader. */
14205 if (htab
->vxworks_p
&& !bfd_link_pic (info
))
14207 /* There is a relocation for the initial PLT entry:
14208 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
14209 if (h
->plt
.offset
== htab
->plt_header_size
)
14210 elf32_arm_allocate_dynrelocs (info
, htab
->srelplt2
, 1);
14212 /* There are two extra relocations for each subsequent
14213 PLT entry: an R_ARM_32 relocation for the GOT entry,
14214 and an R_ARM_32 relocation for the PLT entry. */
14215 elf32_arm_allocate_dynrelocs (info
, htab
->srelplt2
, 2);
14220 h
->plt
.offset
= (bfd_vma
) -1;
14226 h
->plt
.offset
= (bfd_vma
) -1;
14230 eh
= (struct elf32_arm_link_hash_entry
*) h
;
14231 eh
->tlsdesc_got
= (bfd_vma
) -1;
14233 if (h
->got
.refcount
> 0)
14237 int tls_type
= elf32_arm_hash_entry (h
)->tls_type
;
14240 /* Make sure this symbol is output as a dynamic symbol.
14241 Undefined weak syms won't yet be marked as dynamic. */
14242 if (h
->dynindx
== -1
14243 && !h
->forced_local
)
14245 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
14249 if (!htab
->symbian_p
)
14251 s
= htab
->root
.sgot
;
14252 h
->got
.offset
= s
->size
;
14254 if (tls_type
== GOT_UNKNOWN
)
14257 if (tls_type
== GOT_NORMAL
)
14258 /* Non-TLS symbols need one GOT slot. */
14262 if (tls_type
& GOT_TLS_GDESC
)
14264 /* R_ARM_TLS_DESC needs 2 GOT slots. */
14266 = (htab
->root
.sgotplt
->size
14267 - elf32_arm_compute_jump_table_size (htab
));
14268 htab
->root
.sgotplt
->size
+= 8;
14269 h
->got
.offset
= (bfd_vma
) -2;
14270 /* plt.got_offset needs to know there's a TLS_DESC
14271 reloc in the middle of .got.plt. */
14272 htab
->num_tls_desc
++;
14275 if (tls_type
& GOT_TLS_GD
)
14277 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
14278 the symbol is both GD and GDESC, got.offset may
14279 have been overwritten. */
14280 h
->got
.offset
= s
->size
;
14284 if (tls_type
& GOT_TLS_IE
)
14285 /* R_ARM_TLS_IE32 needs one GOT slot. */
14289 dyn
= htab
->root
.dynamic_sections_created
;
14292 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn
,
14293 bfd_link_pic (info
),
14295 && (!bfd_link_pic (info
)
14296 || !SYMBOL_REFERENCES_LOCAL (info
, h
)))
14299 if (tls_type
!= GOT_NORMAL
14300 && (bfd_link_pic (info
) || indx
!= 0)
14301 && (ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
14302 || h
->root
.type
!= bfd_link_hash_undefweak
))
14304 if (tls_type
& GOT_TLS_IE
)
14305 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
14307 if (tls_type
& GOT_TLS_GD
)
14308 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
14310 if (tls_type
& GOT_TLS_GDESC
)
14312 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelplt
, 1);
14313 /* GDESC needs a trampoline to jump to. */
14314 htab
->tls_trampoline
= -1;
14317 /* Only GD needs it. GDESC just emits one relocation per
14319 if ((tls_type
& GOT_TLS_GD
) && indx
!= 0)
14320 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
14322 else if (indx
!= -1 && !SYMBOL_REFERENCES_LOCAL (info
, h
))
14324 if (htab
->root
.dynamic_sections_created
)
14325 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
14326 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
14328 else if (h
->type
== STT_GNU_IFUNC
14329 && eh
->plt
.noncall_refcount
== 0)
14330 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
14331 they all resolve dynamically instead. Reserve room for the
14332 GOT entry's R_ARM_IRELATIVE relocation. */
14333 elf32_arm_allocate_irelocs (info
, htab
->root
.srelgot
, 1);
14334 else if (bfd_link_pic (info
)
14335 && (ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
14336 || h
->root
.type
!= bfd_link_hash_undefweak
))
14337 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
14338 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
14342 h
->got
.offset
= (bfd_vma
) -1;
14344 /* Allocate stubs for exported Thumb functions on v4t. */
14345 if (!htab
->use_blx
&& h
->dynindx
!= -1
14347 && h
->target_internal
== ST_BRANCH_TO_THUMB
14348 && ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
)
14350 struct elf_link_hash_entry
* th
;
14351 struct bfd_link_hash_entry
* bh
;
14352 struct elf_link_hash_entry
* myh
;
14356 /* Create a new symbol to regist the real location of the function. */
14357 s
= h
->root
.u
.def
.section
;
14358 sprintf (name
, "__real_%s", h
->root
.root
.string
);
14359 _bfd_generic_link_add_one_symbol (info
, s
->owner
,
14360 name
, BSF_GLOBAL
, s
,
14361 h
->root
.u
.def
.value
,
14362 NULL
, TRUE
, FALSE
, &bh
);
14364 myh
= (struct elf_link_hash_entry
*) bh
;
14365 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
14366 myh
->forced_local
= 1;
14367 myh
->target_internal
= ST_BRANCH_TO_THUMB
;
14368 eh
->export_glue
= myh
;
14369 th
= record_arm_to_thumb_glue (info
, h
);
14370 /* Point the symbol at the stub. */
14371 h
->type
= ELF_ST_INFO (ELF_ST_BIND (h
->type
), STT_FUNC
);
14372 h
->target_internal
= ST_BRANCH_TO_ARM
;
14373 h
->root
.u
.def
.section
= th
->root
.u
.def
.section
;
14374 h
->root
.u
.def
.value
= th
->root
.u
.def
.value
& ~1;
14377 if (eh
->dyn_relocs
== NULL
)
14380 /* In the shared -Bsymbolic case, discard space allocated for
14381 dynamic pc-relative relocs against symbols which turn out to be
14382 defined in regular objects. For the normal shared case, discard
14383 space for pc-relative relocs that have become local due to symbol
14384 visibility changes. */
14386 if (bfd_link_pic (info
) || htab
->root
.is_relocatable_executable
)
14388 /* Relocs that use pc_count are PC-relative forms, which will appear
14389 on something like ".long foo - ." or "movw REG, foo - .". We want
14390 calls to protected symbols to resolve directly to the function
14391 rather than going via the plt. If people want function pointer
14392 comparisons to work as expected then they should avoid writing
14393 assembly like ".long foo - .". */
14394 if (SYMBOL_CALLS_LOCAL (info
, h
))
14396 struct elf_dyn_relocs
**pp
;
14398 for (pp
= &eh
->dyn_relocs
; (p
= *pp
) != NULL
; )
14400 p
->count
-= p
->pc_count
;
14409 if (htab
->vxworks_p
)
14411 struct elf_dyn_relocs
**pp
;
14413 for (pp
= &eh
->dyn_relocs
; (p
= *pp
) != NULL
; )
14415 if (strcmp (p
->sec
->output_section
->name
, ".tls_vars") == 0)
14422 /* Also discard relocs on undefined weak syms with non-default
14424 if (eh
->dyn_relocs
!= NULL
14425 && h
->root
.type
== bfd_link_hash_undefweak
)
14427 if (ELF_ST_VISIBILITY (h
->other
) != STV_DEFAULT
)
14428 eh
->dyn_relocs
= NULL
;
14430 /* Make sure undefined weak symbols are output as a dynamic
14432 else if (h
->dynindx
== -1
14433 && !h
->forced_local
)
14435 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
14440 else if (htab
->root
.is_relocatable_executable
&& h
->dynindx
== -1
14441 && h
->root
.type
== bfd_link_hash_new
)
14443 /* Output absolute symbols so that we can create relocations
14444 against them. For normal symbols we output a relocation
14445 against the section that contains them. */
14446 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
14453 /* For the non-shared case, discard space for relocs against
14454 symbols which turn out to need copy relocs or are not
14457 if (!h
->non_got_ref
14458 && ((h
->def_dynamic
14459 && !h
->def_regular
)
14460 || (htab
->root
.dynamic_sections_created
14461 && (h
->root
.type
== bfd_link_hash_undefweak
14462 || h
->root
.type
== bfd_link_hash_undefined
))))
14464 /* Make sure this symbol is output as a dynamic symbol.
14465 Undefined weak syms won't yet be marked as dynamic. */
14466 if (h
->dynindx
== -1
14467 && !h
->forced_local
)
14469 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
14473 /* If that succeeded, we know we'll be keeping all the
14475 if (h
->dynindx
!= -1)
14479 eh
->dyn_relocs
= NULL
;
14484 /* Finally, allocate space. */
14485 for (p
= eh
->dyn_relocs
; p
!= NULL
; p
= p
->next
)
14487 asection
*sreloc
= elf_section_data (p
->sec
)->sreloc
;
14488 if (h
->type
== STT_GNU_IFUNC
14489 && eh
->plt
.noncall_refcount
== 0
14490 && SYMBOL_REFERENCES_LOCAL (info
, h
))
14491 elf32_arm_allocate_irelocs (info
, sreloc
, p
->count
);
14493 elf32_arm_allocate_dynrelocs (info
, sreloc
, p
->count
);
14499 /* Find any dynamic relocs that apply to read-only sections. */
14502 elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry
* h
, void * inf
)
14504 struct elf32_arm_link_hash_entry
* eh
;
14505 struct elf_dyn_relocs
* p
;
14507 eh
= (struct elf32_arm_link_hash_entry
*) h
;
14508 for (p
= eh
->dyn_relocs
; p
!= NULL
; p
= p
->next
)
14510 asection
*s
= p
->sec
;
14512 if (s
!= NULL
&& (s
->flags
& SEC_READONLY
) != 0)
14514 struct bfd_link_info
*info
= (struct bfd_link_info
*) inf
;
14516 info
->flags
|= DF_TEXTREL
;
14518 /* Not an error, just cut short the traversal. */
14526 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info
*info
,
14529 struct elf32_arm_link_hash_table
*globals
;
14531 globals
= elf32_arm_hash_table (info
);
14532 if (globals
== NULL
)
14535 globals
->byteswap_code
= byteswap_code
;
14538 /* Set the sizes of the dynamic sections. */
14541 elf32_arm_size_dynamic_sections (bfd
* output_bfd ATTRIBUTE_UNUSED
,
14542 struct bfd_link_info
* info
)
14547 bfd_boolean relocs
;
14549 struct elf32_arm_link_hash_table
*htab
;
14551 htab
= elf32_arm_hash_table (info
);
14555 dynobj
= elf_hash_table (info
)->dynobj
;
14556 BFD_ASSERT (dynobj
!= NULL
);
14557 check_use_blx (htab
);
14559 if (elf_hash_table (info
)->dynamic_sections_created
)
14561 /* Set the contents of the .interp section to the interpreter. */
14562 if (bfd_link_executable (info
) && !info
->nointerp
)
14564 s
= bfd_get_linker_section (dynobj
, ".interp");
14565 BFD_ASSERT (s
!= NULL
);
14566 s
->size
= sizeof ELF_DYNAMIC_INTERPRETER
;
14567 s
->contents
= (unsigned char *) ELF_DYNAMIC_INTERPRETER
;
14571 /* Set up .got offsets for local syms, and space for local dynamic
14573 for (ibfd
= info
->input_bfds
; ibfd
!= NULL
; ibfd
= ibfd
->link
.next
)
14575 bfd_signed_vma
*local_got
;
14576 bfd_signed_vma
*end_local_got
;
14577 struct arm_local_iplt_info
**local_iplt_ptr
, *local_iplt
;
14578 char *local_tls_type
;
14579 bfd_vma
*local_tlsdesc_gotent
;
14580 bfd_size_type locsymcount
;
14581 Elf_Internal_Shdr
*symtab_hdr
;
14583 bfd_boolean is_vxworks
= htab
->vxworks_p
;
14584 unsigned int symndx
;
14586 if (! is_arm_elf (ibfd
))
14589 for (s
= ibfd
->sections
; s
!= NULL
; s
= s
->next
)
14591 struct elf_dyn_relocs
*p
;
14593 for (p
= (struct elf_dyn_relocs
*)
14594 elf_section_data (s
)->local_dynrel
; p
!= NULL
; p
= p
->next
)
14596 if (!bfd_is_abs_section (p
->sec
)
14597 && bfd_is_abs_section (p
->sec
->output_section
))
14599 /* Input section has been discarded, either because
14600 it is a copy of a linkonce section or due to
14601 linker script /DISCARD/, so we'll be discarding
14604 else if (is_vxworks
14605 && strcmp (p
->sec
->output_section
->name
,
14608 /* Relocations in vxworks .tls_vars sections are
14609 handled specially by the loader. */
14611 else if (p
->count
!= 0)
14613 srel
= elf_section_data (p
->sec
)->sreloc
;
14614 elf32_arm_allocate_dynrelocs (info
, srel
, p
->count
);
14615 if ((p
->sec
->output_section
->flags
& SEC_READONLY
) != 0)
14616 info
->flags
|= DF_TEXTREL
;
14621 local_got
= elf_local_got_refcounts (ibfd
);
14625 symtab_hdr
= & elf_symtab_hdr (ibfd
);
14626 locsymcount
= symtab_hdr
->sh_info
;
14627 end_local_got
= local_got
+ locsymcount
;
14628 local_iplt_ptr
= elf32_arm_local_iplt (ibfd
);
14629 local_tls_type
= elf32_arm_local_got_tls_type (ibfd
);
14630 local_tlsdesc_gotent
= elf32_arm_local_tlsdesc_gotent (ibfd
);
14632 s
= htab
->root
.sgot
;
14633 srel
= htab
->root
.srelgot
;
14634 for (; local_got
< end_local_got
;
14635 ++local_got
, ++local_iplt_ptr
, ++local_tls_type
,
14636 ++local_tlsdesc_gotent
, ++symndx
)
14638 *local_tlsdesc_gotent
= (bfd_vma
) -1;
14639 local_iplt
= *local_iplt_ptr
;
14640 if (local_iplt
!= NULL
)
14642 struct elf_dyn_relocs
*p
;
14644 if (local_iplt
->root
.refcount
> 0)
14646 elf32_arm_allocate_plt_entry (info
, TRUE
,
14649 if (local_iplt
->arm
.noncall_refcount
== 0)
14650 /* All references to the PLT are calls, so all
14651 non-call references can resolve directly to the
14652 run-time target. This means that the .got entry
14653 would be the same as the .igot.plt entry, so there's
14654 no point creating both. */
14659 BFD_ASSERT (local_iplt
->arm
.noncall_refcount
== 0);
14660 local_iplt
->root
.offset
= (bfd_vma
) -1;
14663 for (p
= local_iplt
->dyn_relocs
; p
!= NULL
; p
= p
->next
)
14667 psrel
= elf_section_data (p
->sec
)->sreloc
;
14668 if (local_iplt
->arm
.noncall_refcount
== 0)
14669 elf32_arm_allocate_irelocs (info
, psrel
, p
->count
);
14671 elf32_arm_allocate_dynrelocs (info
, psrel
, p
->count
);
14674 if (*local_got
> 0)
14676 Elf_Internal_Sym
*isym
;
14678 *local_got
= s
->size
;
14679 if (*local_tls_type
& GOT_TLS_GD
)
14680 /* TLS_GD relocs need an 8-byte structure in the GOT. */
14682 if (*local_tls_type
& GOT_TLS_GDESC
)
14684 *local_tlsdesc_gotent
= htab
->root
.sgotplt
->size
14685 - elf32_arm_compute_jump_table_size (htab
);
14686 htab
->root
.sgotplt
->size
+= 8;
14687 *local_got
= (bfd_vma
) -2;
14688 /* plt.got_offset needs to know there's a TLS_DESC
14689 reloc in the middle of .got.plt. */
14690 htab
->num_tls_desc
++;
14692 if (*local_tls_type
& GOT_TLS_IE
)
14695 if (*local_tls_type
& GOT_NORMAL
)
14697 /* If the symbol is both GD and GDESC, *local_got
14698 may have been overwritten. */
14699 *local_got
= s
->size
;
14703 isym
= bfd_sym_from_r_symndx (&htab
->sym_cache
, ibfd
, symndx
);
14707 /* If all references to an STT_GNU_IFUNC PLT are calls,
14708 then all non-call references, including this GOT entry,
14709 resolve directly to the run-time target. */
14710 if (ELF32_ST_TYPE (isym
->st_info
) == STT_GNU_IFUNC
14711 && (local_iplt
== NULL
14712 || local_iplt
->arm
.noncall_refcount
== 0))
14713 elf32_arm_allocate_irelocs (info
, srel
, 1);
14714 else if (bfd_link_pic (info
) || output_bfd
->flags
& DYNAMIC
)
14716 if ((bfd_link_pic (info
) && !(*local_tls_type
& GOT_TLS_GDESC
))
14717 || *local_tls_type
& GOT_TLS_GD
)
14718 elf32_arm_allocate_dynrelocs (info
, srel
, 1);
14720 if (bfd_link_pic (info
) && *local_tls_type
& GOT_TLS_GDESC
)
14722 elf32_arm_allocate_dynrelocs (info
,
14723 htab
->root
.srelplt
, 1);
14724 htab
->tls_trampoline
= -1;
14729 *local_got
= (bfd_vma
) -1;
14733 if (htab
->tls_ldm_got
.refcount
> 0)
14735 /* Allocate two GOT entries and one dynamic relocation (if necessary)
14736 for R_ARM_TLS_LDM32 relocations. */
14737 htab
->tls_ldm_got
.offset
= htab
->root
.sgot
->size
;
14738 htab
->root
.sgot
->size
+= 8;
14739 if (bfd_link_pic (info
))
14740 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
14743 htab
->tls_ldm_got
.offset
= -1;
14745 /* Allocate global sym .plt and .got entries, and space for global
14746 sym dynamic relocs. */
14747 elf_link_hash_traverse (& htab
->root
, allocate_dynrelocs_for_symbol
, info
);
14749 /* Here we rummage through the found bfds to collect glue information. */
14750 for (ibfd
= info
->input_bfds
; ibfd
!= NULL
; ibfd
= ibfd
->link
.next
)
14752 if (! is_arm_elf (ibfd
))
14755 /* Initialise mapping tables for code/data. */
14756 bfd_elf32_arm_init_maps (ibfd
);
14758 if (!bfd_elf32_arm_process_before_allocation (ibfd
, info
)
14759 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd
, info
)
14760 || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd
, info
))
14761 /* xgettext:c-format */
14762 _bfd_error_handler (_("Errors encountered processing file %s"),
14766 /* Allocate space for the glue sections now that we've sized them. */
14767 bfd_elf32_arm_allocate_interworking_sections (info
);
14769 /* For every jump slot reserved in the sgotplt, reloc_count is
14770 incremented. However, when we reserve space for TLS descriptors,
14771 it's not incremented, so in order to compute the space reserved
14772 for them, it suffices to multiply the reloc count by the jump
14774 if (htab
->root
.srelplt
)
14775 htab
->sgotplt_jump_table_size
= elf32_arm_compute_jump_table_size(htab
);
14777 if (htab
->tls_trampoline
)
14779 if (htab
->root
.splt
->size
== 0)
14780 htab
->root
.splt
->size
+= htab
->plt_header_size
;
14782 htab
->tls_trampoline
= htab
->root
.splt
->size
;
14783 htab
->root
.splt
->size
+= htab
->plt_entry_size
;
14785 /* If we're not using lazy TLS relocations, don't generate the
14786 PLT and GOT entries they require. */
14787 if (!(info
->flags
& DF_BIND_NOW
))
14789 htab
->dt_tlsdesc_got
= htab
->root
.sgot
->size
;
14790 htab
->root
.sgot
->size
+= 4;
14792 htab
->dt_tlsdesc_plt
= htab
->root
.splt
->size
;
14793 htab
->root
.splt
->size
+= 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline
);
14797 /* The check_relocs and adjust_dynamic_symbol entry points have
14798 determined the sizes of the various dynamic sections. Allocate
14799 memory for them. */
14802 for (s
= dynobj
->sections
; s
!= NULL
; s
= s
->next
)
14806 if ((s
->flags
& SEC_LINKER_CREATED
) == 0)
14809 /* It's OK to base decisions on the section name, because none
14810 of the dynobj section names depend upon the input files. */
14811 name
= bfd_get_section_name (dynobj
, s
);
14813 if (s
== htab
->root
.splt
)
14815 /* Remember whether there is a PLT. */
14816 plt
= s
->size
!= 0;
14818 else if (CONST_STRNEQ (name
, ".rel"))
14822 /* Remember whether there are any reloc sections other
14823 than .rel(a).plt and .rela.plt.unloaded. */
14824 if (s
!= htab
->root
.srelplt
&& s
!= htab
->srelplt2
)
14827 /* We use the reloc_count field as a counter if we need
14828 to copy relocs into the output file. */
14829 s
->reloc_count
= 0;
14832 else if (s
!= htab
->root
.sgot
14833 && s
!= htab
->root
.sgotplt
14834 && s
!= htab
->root
.iplt
14835 && s
!= htab
->root
.igotplt
14836 && s
!= htab
->sdynbss
)
14838 /* It's not one of our sections, so don't allocate space. */
14844 /* If we don't need this section, strip it from the
14845 output file. This is mostly to handle .rel(a).bss and
14846 .rel(a).plt. We must create both sections in
14847 create_dynamic_sections, because they must be created
14848 before the linker maps input sections to output
14849 sections. The linker does that before
14850 adjust_dynamic_symbol is called, and it is that
14851 function which decides whether anything needs to go
14852 into these sections. */
14853 s
->flags
|= SEC_EXCLUDE
;
14857 if ((s
->flags
& SEC_HAS_CONTENTS
) == 0)
14860 /* Allocate memory for the section contents. */
14861 s
->contents
= (unsigned char *) bfd_zalloc (dynobj
, s
->size
);
14862 if (s
->contents
== NULL
)
14866 if (elf_hash_table (info
)->dynamic_sections_created
)
14868 /* Add some entries to the .dynamic section. We fill in the
14869 values later, in elf32_arm_finish_dynamic_sections, but we
14870 must add the entries now so that we get the correct size for
14871 the .dynamic section. The DT_DEBUG entry is filled in by the
14872 dynamic linker and used by the debugger. */
14873 #define add_dynamic_entry(TAG, VAL) \
14874 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
14876 if (bfd_link_executable (info
))
14878 if (!add_dynamic_entry (DT_DEBUG
, 0))
14884 if ( !add_dynamic_entry (DT_PLTGOT
, 0)
14885 || !add_dynamic_entry (DT_PLTRELSZ
, 0)
14886 || !add_dynamic_entry (DT_PLTREL
,
14887 htab
->use_rel
? DT_REL
: DT_RELA
)
14888 || !add_dynamic_entry (DT_JMPREL
, 0))
14891 if (htab
->dt_tlsdesc_plt
&&
14892 (!add_dynamic_entry (DT_TLSDESC_PLT
,0)
14893 || !add_dynamic_entry (DT_TLSDESC_GOT
,0)))
14901 if (!add_dynamic_entry (DT_REL
, 0)
14902 || !add_dynamic_entry (DT_RELSZ
, 0)
14903 || !add_dynamic_entry (DT_RELENT
, RELOC_SIZE (htab
)))
14908 if (!add_dynamic_entry (DT_RELA
, 0)
14909 || !add_dynamic_entry (DT_RELASZ
, 0)
14910 || !add_dynamic_entry (DT_RELAENT
, RELOC_SIZE (htab
)))
14915 /* If any dynamic relocs apply to a read-only section,
14916 then we need a DT_TEXTREL entry. */
14917 if ((info
->flags
& DF_TEXTREL
) == 0)
14918 elf_link_hash_traverse (& htab
->root
, elf32_arm_readonly_dynrelocs
,
14921 if ((info
->flags
& DF_TEXTREL
) != 0)
14923 if (!add_dynamic_entry (DT_TEXTREL
, 0))
14926 if (htab
->vxworks_p
14927 && !elf_vxworks_add_dynamic_entries (output_bfd
, info
))
14930 #undef add_dynamic_entry
14935 /* Size sections even though they're not dynamic. We use it to setup
14936 _TLS_MODULE_BASE_, if needed. */
14939 elf32_arm_always_size_sections (bfd
*output_bfd
,
14940 struct bfd_link_info
*info
)
14944 if (bfd_link_relocatable (info
))
14947 tls_sec
= elf_hash_table (info
)->tls_sec
;
14951 struct elf_link_hash_entry
*tlsbase
;
14953 tlsbase
= elf_link_hash_lookup
14954 (elf_hash_table (info
), "_TLS_MODULE_BASE_", TRUE
, TRUE
, FALSE
);
14958 struct bfd_link_hash_entry
*bh
= NULL
;
14959 const struct elf_backend_data
*bed
14960 = get_elf_backend_data (output_bfd
);
14962 if (!(_bfd_generic_link_add_one_symbol
14963 (info
, output_bfd
, "_TLS_MODULE_BASE_", BSF_LOCAL
,
14964 tls_sec
, 0, NULL
, FALSE
,
14965 bed
->collect
, &bh
)))
14968 tlsbase
->type
= STT_TLS
;
14969 tlsbase
= (struct elf_link_hash_entry
*)bh
;
14970 tlsbase
->def_regular
= 1;
14971 tlsbase
->other
= STV_HIDDEN
;
14972 (*bed
->elf_backend_hide_symbol
) (info
, tlsbase
, TRUE
);
14978 /* Finish up dynamic symbol handling. We set the contents of various
14979 dynamic sections here. */
14982 elf32_arm_finish_dynamic_symbol (bfd
* output_bfd
,
14983 struct bfd_link_info
* info
,
14984 struct elf_link_hash_entry
* h
,
14985 Elf_Internal_Sym
* sym
)
14987 struct elf32_arm_link_hash_table
*htab
;
14988 struct elf32_arm_link_hash_entry
*eh
;
14990 htab
= elf32_arm_hash_table (info
);
14994 eh
= (struct elf32_arm_link_hash_entry
*) h
;
14996 if (h
->plt
.offset
!= (bfd_vma
) -1)
15000 BFD_ASSERT (h
->dynindx
!= -1);
15001 if (! elf32_arm_populate_plt_entry (output_bfd
, info
, &h
->plt
, &eh
->plt
,
15006 if (!h
->def_regular
)
15008 /* Mark the symbol as undefined, rather than as defined in
15009 the .plt section. */
15010 sym
->st_shndx
= SHN_UNDEF
;
15011 /* If the symbol is weak we need to clear the value.
15012 Otherwise, the PLT entry would provide a definition for
15013 the symbol even if the symbol wasn't defined anywhere,
15014 and so the symbol would never be NULL. Leave the value if
15015 there were any relocations where pointer equality matters
15016 (this is a clue for the dynamic linker, to make function
15017 pointer comparisons work between an application and shared
15019 if (!h
->ref_regular_nonweak
|| !h
->pointer_equality_needed
)
15022 else if (eh
->is_iplt
&& eh
->plt
.noncall_refcount
!= 0)
15024 /* At least one non-call relocation references this .iplt entry,
15025 so the .iplt entry is the function's canonical address. */
15026 sym
->st_info
= ELF_ST_INFO (ELF_ST_BIND (sym
->st_info
), STT_FUNC
);
15027 sym
->st_target_internal
= ST_BRANCH_TO_ARM
;
15028 sym
->st_shndx
= (_bfd_elf_section_from_bfd_section
15029 (output_bfd
, htab
->root
.iplt
->output_section
));
15030 sym
->st_value
= (h
->plt
.offset
15031 + htab
->root
.iplt
->output_section
->vma
15032 + htab
->root
.iplt
->output_offset
);
15039 Elf_Internal_Rela rel
;
15041 /* This symbol needs a copy reloc. Set it up. */
15042 BFD_ASSERT (h
->dynindx
!= -1
15043 && (h
->root
.type
== bfd_link_hash_defined
15044 || h
->root
.type
== bfd_link_hash_defweak
));
15047 BFD_ASSERT (s
!= NULL
);
15050 rel
.r_offset
= (h
->root
.u
.def
.value
15051 + h
->root
.u
.def
.section
->output_section
->vma
15052 + h
->root
.u
.def
.section
->output_offset
);
15053 rel
.r_info
= ELF32_R_INFO (h
->dynindx
, R_ARM_COPY
);
15054 elf32_arm_add_dynreloc (output_bfd
, info
, s
, &rel
);
15057 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
15058 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
15059 to the ".got" section. */
15060 if (h
== htab
->root
.hdynamic
15061 || (!htab
->vxworks_p
&& h
== htab
->root
.hgot
))
15062 sym
->st_shndx
= SHN_ABS
;
15068 arm_put_trampoline (struct elf32_arm_link_hash_table
*htab
, bfd
*output_bfd
,
15070 const unsigned long *template, unsigned count
)
15074 for (ix
= 0; ix
!= count
; ix
++)
15076 unsigned long insn
= template[ix
];
15078 /* Emit mov pc,rx if bx is not permitted. */
15079 if (htab
->fix_v4bx
== 1 && (insn
& 0x0ffffff0) == 0x012fff10)
15080 insn
= (insn
& 0xf000000f) | 0x01a0f000;
15081 put_arm_insn (htab
, output_bfd
, insn
, (char *)contents
+ ix
*4);
15085 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
15086 other variants, NaCl needs this entry in a static executable's
15087 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
15088 zero. For .iplt really only the last bundle is useful, and .iplt
15089 could have a shorter first entry, with each individual PLT entry's
15090 relative branch calculated differently so it targets the last
15091 bundle instead of the instruction before it (labelled .Lplt_tail
15092 above). But it's simpler to keep the size and layout of PLT0
15093 consistent with the dynamic case, at the cost of some dead code at
15094 the start of .iplt and the one dead store to the stack at the start
15097 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table
*htab
, bfd
*output_bfd
,
15098 asection
*plt
, bfd_vma got_displacement
)
15102 put_arm_insn (htab
, output_bfd
,
15103 elf32_arm_nacl_plt0_entry
[0]
15104 | arm_movw_immediate (got_displacement
),
15105 plt
->contents
+ 0);
15106 put_arm_insn (htab
, output_bfd
,
15107 elf32_arm_nacl_plt0_entry
[1]
15108 | arm_movt_immediate (got_displacement
),
15109 plt
->contents
+ 4);
15111 for (i
= 2; i
< ARRAY_SIZE (elf32_arm_nacl_plt0_entry
); ++i
)
15112 put_arm_insn (htab
, output_bfd
,
15113 elf32_arm_nacl_plt0_entry
[i
],
15114 plt
->contents
+ (i
* 4));
15117 /* Finish up the dynamic sections. */
15120 elf32_arm_finish_dynamic_sections (bfd
* output_bfd
, struct bfd_link_info
* info
)
15125 struct elf32_arm_link_hash_table
*htab
;
15127 htab
= elf32_arm_hash_table (info
);
15131 dynobj
= elf_hash_table (info
)->dynobj
;
15133 sgot
= htab
->root
.sgotplt
;
15134 /* A broken linker script might have discarded the dynamic sections.
15135 Catch this here so that we do not seg-fault later on. */
15136 if (sgot
!= NULL
&& bfd_is_abs_section (sgot
->output_section
))
15138 sdyn
= bfd_get_linker_section (dynobj
, ".dynamic");
15140 if (elf_hash_table (info
)->dynamic_sections_created
)
15143 Elf32_External_Dyn
*dyncon
, *dynconend
;
15145 splt
= htab
->root
.splt
;
15146 BFD_ASSERT (splt
!= NULL
&& sdyn
!= NULL
);
15147 BFD_ASSERT (htab
->symbian_p
|| sgot
!= NULL
);
15149 dyncon
= (Elf32_External_Dyn
*) sdyn
->contents
;
15150 dynconend
= (Elf32_External_Dyn
*) (sdyn
->contents
+ sdyn
->size
);
15152 for (; dyncon
< dynconend
; dyncon
++)
15154 Elf_Internal_Dyn dyn
;
15158 bfd_elf32_swap_dyn_in (dynobj
, dyncon
, &dyn
);
15165 if (htab
->vxworks_p
15166 && elf_vxworks_finish_dynamic_entry (output_bfd
, &dyn
))
15167 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
15172 goto get_vma_if_bpabi
;
15175 goto get_vma_if_bpabi
;
15178 goto get_vma_if_bpabi
;
15180 name
= ".gnu.version";
15181 goto get_vma_if_bpabi
;
15183 name
= ".gnu.version_d";
15184 goto get_vma_if_bpabi
;
15186 name
= ".gnu.version_r";
15187 goto get_vma_if_bpabi
;
15193 name
= RELOC_SECTION (htab
, ".plt");
15195 s
= bfd_get_section_by_name (output_bfd
, name
);
15198 /* PR ld/14397: Issue an error message if a required section is missing. */
15199 (*_bfd_error_handler
)
15200 (_("error: required section '%s' not found in the linker script"), name
);
15201 bfd_set_error (bfd_error_invalid_operation
);
15204 if (!htab
->symbian_p
)
15205 dyn
.d_un
.d_ptr
= s
->vma
;
15207 /* In the BPABI, tags in the PT_DYNAMIC section point
15208 at the file offset, not the memory address, for the
15209 convenience of the post linker. */
15210 dyn
.d_un
.d_ptr
= s
->filepos
;
15211 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
15215 if (htab
->symbian_p
)
15220 s
= htab
->root
.srelplt
;
15221 BFD_ASSERT (s
!= NULL
);
15222 dyn
.d_un
.d_val
= s
->size
;
15223 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
15228 if (!htab
->symbian_p
)
15230 /* My reading of the SVR4 ABI indicates that the
15231 procedure linkage table relocs (DT_JMPREL) should be
15232 included in the overall relocs (DT_REL). This is
15233 what Solaris does. However, UnixWare can not handle
15234 that case. Therefore, we override the DT_RELSZ entry
15235 here to make it not include the JMPREL relocs. Since
15236 the linker script arranges for .rel(a).plt to follow all
15237 other relocation sections, we don't have to worry
15238 about changing the DT_REL entry. */
15239 s
= htab
->root
.srelplt
;
15241 dyn
.d_un
.d_val
-= s
->size
;
15242 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
15245 /* Fall through. */
15249 /* In the BPABI, the DT_REL tag must point at the file
15250 offset, not the VMA, of the first relocation
15251 section. So, we use code similar to that in
15252 elflink.c, but do not check for SHF_ALLOC on the
15253 relcoation section, since relocations sections are
15254 never allocated under the BPABI. The comments above
15255 about Unixware notwithstanding, we include all of the
15256 relocations here. */
15257 if (htab
->symbian_p
)
15260 type
= ((dyn
.d_tag
== DT_REL
|| dyn
.d_tag
== DT_RELSZ
)
15261 ? SHT_REL
: SHT_RELA
);
15262 dyn
.d_un
.d_val
= 0;
15263 for (i
= 1; i
< elf_numsections (output_bfd
); i
++)
15265 Elf_Internal_Shdr
*hdr
15266 = elf_elfsections (output_bfd
)[i
];
15267 if (hdr
->sh_type
== type
)
15269 if (dyn
.d_tag
== DT_RELSZ
15270 || dyn
.d_tag
== DT_RELASZ
)
15271 dyn
.d_un
.d_val
+= hdr
->sh_size
;
15272 else if ((ufile_ptr
) hdr
->sh_offset
15273 <= dyn
.d_un
.d_val
- 1)
15274 dyn
.d_un
.d_val
= hdr
->sh_offset
;
15277 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
15281 case DT_TLSDESC_PLT
:
15282 s
= htab
->root
.splt
;
15283 dyn
.d_un
.d_ptr
= (s
->output_section
->vma
+ s
->output_offset
15284 + htab
->dt_tlsdesc_plt
);
15285 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
15288 case DT_TLSDESC_GOT
:
15289 s
= htab
->root
.sgot
;
15290 dyn
.d_un
.d_ptr
= (s
->output_section
->vma
+ s
->output_offset
15291 + htab
->dt_tlsdesc_got
);
15292 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
15295 /* Set the bottom bit of DT_INIT/FINI if the
15296 corresponding function is Thumb. */
15298 name
= info
->init_function
;
15301 name
= info
->fini_function
;
15303 /* If it wasn't set by elf_bfd_final_link
15304 then there is nothing to adjust. */
15305 if (dyn
.d_un
.d_val
!= 0)
15307 struct elf_link_hash_entry
* eh
;
15309 eh
= elf_link_hash_lookup (elf_hash_table (info
), name
,
15310 FALSE
, FALSE
, TRUE
);
15311 if (eh
!= NULL
&& eh
->target_internal
== ST_BRANCH_TO_THUMB
)
15313 dyn
.d_un
.d_val
|= 1;
15314 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
15321 /* Fill in the first entry in the procedure linkage table. */
15322 if (splt
->size
> 0 && htab
->plt_header_size
)
15324 const bfd_vma
*plt0_entry
;
15325 bfd_vma got_address
, plt_address
, got_displacement
;
15327 /* Calculate the addresses of the GOT and PLT. */
15328 got_address
= sgot
->output_section
->vma
+ sgot
->output_offset
;
15329 plt_address
= splt
->output_section
->vma
+ splt
->output_offset
;
15331 if (htab
->vxworks_p
)
15333 /* The VxWorks GOT is relocated by the dynamic linker.
15334 Therefore, we must emit relocations rather than simply
15335 computing the values now. */
15336 Elf_Internal_Rela rel
;
15338 plt0_entry
= elf32_arm_vxworks_exec_plt0_entry
;
15339 put_arm_insn (htab
, output_bfd
, plt0_entry
[0],
15340 splt
->contents
+ 0);
15341 put_arm_insn (htab
, output_bfd
, plt0_entry
[1],
15342 splt
->contents
+ 4);
15343 put_arm_insn (htab
, output_bfd
, plt0_entry
[2],
15344 splt
->contents
+ 8);
15345 bfd_put_32 (output_bfd
, got_address
, splt
->contents
+ 12);
15347 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
15348 rel
.r_offset
= plt_address
+ 12;
15349 rel
.r_info
= ELF32_R_INFO (htab
->root
.hgot
->indx
, R_ARM_ABS32
);
15351 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
,
15352 htab
->srelplt2
->contents
);
15354 else if (htab
->nacl_p
)
15355 arm_nacl_put_plt0 (htab
, output_bfd
, splt
,
15356 got_address
+ 8 - (plt_address
+ 16));
15357 else if (using_thumb_only (htab
))
15359 got_displacement
= got_address
- (plt_address
+ 12);
15361 plt0_entry
= elf32_thumb2_plt0_entry
;
15362 put_arm_insn (htab
, output_bfd
, plt0_entry
[0],
15363 splt
->contents
+ 0);
15364 put_arm_insn (htab
, output_bfd
, plt0_entry
[1],
15365 splt
->contents
+ 4);
15366 put_arm_insn (htab
, output_bfd
, plt0_entry
[2],
15367 splt
->contents
+ 8);
15369 bfd_put_32 (output_bfd
, got_displacement
, splt
->contents
+ 12);
15373 got_displacement
= got_address
- (plt_address
+ 16);
15375 plt0_entry
= elf32_arm_plt0_entry
;
15376 put_arm_insn (htab
, output_bfd
, plt0_entry
[0],
15377 splt
->contents
+ 0);
15378 put_arm_insn (htab
, output_bfd
, plt0_entry
[1],
15379 splt
->contents
+ 4);
15380 put_arm_insn (htab
, output_bfd
, plt0_entry
[2],
15381 splt
->contents
+ 8);
15382 put_arm_insn (htab
, output_bfd
, plt0_entry
[3],
15383 splt
->contents
+ 12);
15385 #ifdef FOUR_WORD_PLT
15386 /* The displacement value goes in the otherwise-unused
15387 last word of the second entry. */
15388 bfd_put_32 (output_bfd
, got_displacement
, splt
->contents
+ 28);
15390 bfd_put_32 (output_bfd
, got_displacement
, splt
->contents
+ 16);
15395 /* UnixWare sets the entsize of .plt to 4, although that doesn't
15396 really seem like the right value. */
15397 if (splt
->output_section
->owner
== output_bfd
)
15398 elf_section_data (splt
->output_section
)->this_hdr
.sh_entsize
= 4;
15400 if (htab
->dt_tlsdesc_plt
)
15402 bfd_vma got_address
15403 = sgot
->output_section
->vma
+ sgot
->output_offset
;
15404 bfd_vma gotplt_address
= (htab
->root
.sgot
->output_section
->vma
15405 + htab
->root
.sgot
->output_offset
);
15406 bfd_vma plt_address
15407 = splt
->output_section
->vma
+ splt
->output_offset
;
15409 arm_put_trampoline (htab
, output_bfd
,
15410 splt
->contents
+ htab
->dt_tlsdesc_plt
,
15411 dl_tlsdesc_lazy_trampoline
, 6);
15413 bfd_put_32 (output_bfd
,
15414 gotplt_address
+ htab
->dt_tlsdesc_got
15415 - (plt_address
+ htab
->dt_tlsdesc_plt
)
15416 - dl_tlsdesc_lazy_trampoline
[6],
15417 splt
->contents
+ htab
->dt_tlsdesc_plt
+ 24);
15418 bfd_put_32 (output_bfd
,
15419 got_address
- (plt_address
+ htab
->dt_tlsdesc_plt
)
15420 - dl_tlsdesc_lazy_trampoline
[7],
15421 splt
->contents
+ htab
->dt_tlsdesc_plt
+ 24 + 4);
15424 if (htab
->tls_trampoline
)
15426 arm_put_trampoline (htab
, output_bfd
,
15427 splt
->contents
+ htab
->tls_trampoline
,
15428 tls_trampoline
, 3);
15429 #ifdef FOUR_WORD_PLT
15430 bfd_put_32 (output_bfd
, 0x00000000,
15431 splt
->contents
+ htab
->tls_trampoline
+ 12);
15435 if (htab
->vxworks_p
15436 && !bfd_link_pic (info
)
15437 && htab
->root
.splt
->size
> 0)
15439 /* Correct the .rel(a).plt.unloaded relocations. They will have
15440 incorrect symbol indexes. */
15444 num_plts
= ((htab
->root
.splt
->size
- htab
->plt_header_size
)
15445 / htab
->plt_entry_size
);
15446 p
= htab
->srelplt2
->contents
+ RELOC_SIZE (htab
);
15448 for (; num_plts
; num_plts
--)
15450 Elf_Internal_Rela rel
;
15452 SWAP_RELOC_IN (htab
) (output_bfd
, p
, &rel
);
15453 rel
.r_info
= ELF32_R_INFO (htab
->root
.hgot
->indx
, R_ARM_ABS32
);
15454 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, p
);
15455 p
+= RELOC_SIZE (htab
);
15457 SWAP_RELOC_IN (htab
) (output_bfd
, p
, &rel
);
15458 rel
.r_info
= ELF32_R_INFO (htab
->root
.hplt
->indx
, R_ARM_ABS32
);
15459 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, p
);
15460 p
+= RELOC_SIZE (htab
);
15465 if (htab
->nacl_p
&& htab
->root
.iplt
!= NULL
&& htab
->root
.iplt
->size
> 0)
15466 /* NaCl uses a special first entry in .iplt too. */
15467 arm_nacl_put_plt0 (htab
, output_bfd
, htab
->root
.iplt
, 0);
15469 /* Fill in the first three entries in the global offset table. */
15472 if (sgot
->size
> 0)
15475 bfd_put_32 (output_bfd
, (bfd_vma
) 0, sgot
->contents
);
15477 bfd_put_32 (output_bfd
,
15478 sdyn
->output_section
->vma
+ sdyn
->output_offset
,
15480 bfd_put_32 (output_bfd
, (bfd_vma
) 0, sgot
->contents
+ 4);
15481 bfd_put_32 (output_bfd
, (bfd_vma
) 0, sgot
->contents
+ 8);
15484 elf_section_data (sgot
->output_section
)->this_hdr
.sh_entsize
= 4;
15491 elf32_arm_post_process_headers (bfd
* abfd
, struct bfd_link_info
* link_info ATTRIBUTE_UNUSED
)
15493 Elf_Internal_Ehdr
* i_ehdrp
; /* ELF file header, internal form. */
15494 struct elf32_arm_link_hash_table
*globals
;
15495 struct elf_segment_map
*m
;
15497 i_ehdrp
= elf_elfheader (abfd
);
15499 if (EF_ARM_EABI_VERSION (i_ehdrp
->e_flags
) == EF_ARM_EABI_UNKNOWN
)
15500 i_ehdrp
->e_ident
[EI_OSABI
] = ELFOSABI_ARM
;
15502 _bfd_elf_post_process_headers (abfd
, link_info
);
15503 i_ehdrp
->e_ident
[EI_ABIVERSION
] = ARM_ELF_ABI_VERSION
;
15507 globals
= elf32_arm_hash_table (link_info
);
15508 if (globals
!= NULL
&& globals
->byteswap_code
)
15509 i_ehdrp
->e_flags
|= EF_ARM_BE8
;
15512 if (EF_ARM_EABI_VERSION (i_ehdrp
->e_flags
) == EF_ARM_EABI_VER5
15513 && ((i_ehdrp
->e_type
== ET_DYN
) || (i_ehdrp
->e_type
== ET_EXEC
)))
15515 int abi
= bfd_elf_get_obj_attr_int (abfd
, OBJ_ATTR_PROC
, Tag_ABI_VFP_args
);
15516 if (abi
== AEABI_VFP_args_vfp
)
15517 i_ehdrp
->e_flags
|= EF_ARM_ABI_FLOAT_HARD
;
15519 i_ehdrp
->e_flags
|= EF_ARM_ABI_FLOAT_SOFT
;
15522 /* Scan segment to set p_flags attribute if it contains only sections with
15523 SHF_ARM_NOREAD flag. */
15524 for (m
= elf_seg_map (abfd
); m
!= NULL
; m
= m
->next
)
15530 for (j
= 0; j
< m
->count
; j
++)
15532 if (!(elf_section_flags (m
->sections
[j
]) & SHF_ARM_NOREAD
))
15538 m
->p_flags_valid
= 1;
15543 static enum elf_reloc_type_class
15544 elf32_arm_reloc_type_class (const struct bfd_link_info
*info ATTRIBUTE_UNUSED
,
15545 const asection
*rel_sec ATTRIBUTE_UNUSED
,
15546 const Elf_Internal_Rela
*rela
)
15548 switch ((int) ELF32_R_TYPE (rela
->r_info
))
15550 case R_ARM_RELATIVE
:
15551 return reloc_class_relative
;
15552 case R_ARM_JUMP_SLOT
:
15553 return reloc_class_plt
;
15555 return reloc_class_copy
;
15556 case R_ARM_IRELATIVE
:
15557 return reloc_class_ifunc
;
15559 return reloc_class_normal
;
15564 elf32_arm_final_write_processing (bfd
*abfd
, bfd_boolean linker ATTRIBUTE_UNUSED
)
15566 bfd_arm_update_notes (abfd
, ARM_NOTE_SECTION
);
15569 /* Return TRUE if this is an unwinding table entry. */
15572 is_arm_elf_unwind_section_name (bfd
* abfd ATTRIBUTE_UNUSED
, const char * name
)
15574 return (CONST_STRNEQ (name
, ELF_STRING_ARM_unwind
)
15575 || CONST_STRNEQ (name
, ELF_STRING_ARM_unwind_once
));
15579 /* Set the type and flags for an ARM section. We do this by
15580 the section name, which is a hack, but ought to work. */
15583 elf32_arm_fake_sections (bfd
* abfd
, Elf_Internal_Shdr
* hdr
, asection
* sec
)
15587 name
= bfd_get_section_name (abfd
, sec
);
15589 if (is_arm_elf_unwind_section_name (abfd
, name
))
15591 hdr
->sh_type
= SHT_ARM_EXIDX
;
15592 hdr
->sh_flags
|= SHF_LINK_ORDER
;
15595 if (sec
->flags
& SEC_ELF_NOREAD
)
15596 hdr
->sh_flags
|= SHF_ARM_NOREAD
;
15601 /* Handle an ARM specific section when reading an object file. This is
15602 called when bfd_section_from_shdr finds a section with an unknown
15606 elf32_arm_section_from_shdr (bfd
*abfd
,
15607 Elf_Internal_Shdr
* hdr
,
15611 /* There ought to be a place to keep ELF backend specific flags, but
15612 at the moment there isn't one. We just keep track of the
15613 sections by their name, instead. Fortunately, the ABI gives
15614 names for all the ARM specific sections, so we will probably get
15616 switch (hdr
->sh_type
)
15618 case SHT_ARM_EXIDX
:
15619 case SHT_ARM_PREEMPTMAP
:
15620 case SHT_ARM_ATTRIBUTES
:
15627 if (! _bfd_elf_make_section_from_shdr (abfd
, hdr
, name
, shindex
))
15633 static _arm_elf_section_data
*
15634 get_arm_elf_section_data (asection
* sec
)
15636 if (sec
&& sec
->owner
&& is_arm_elf (sec
->owner
))
15637 return elf32_arm_section_data (sec
);
15645 struct bfd_link_info
*info
;
15648 int (*func
) (void *, const char *, Elf_Internal_Sym
*,
15649 asection
*, struct elf_link_hash_entry
*);
15650 } output_arch_syminfo
;
15652 enum map_symbol_type
15660 /* Output a single mapping symbol. */
15663 elf32_arm_output_map_sym (output_arch_syminfo
*osi
,
15664 enum map_symbol_type type
,
15667 static const char *names
[3] = {"$a", "$t", "$d"};
15668 Elf_Internal_Sym sym
;
15670 sym
.st_value
= osi
->sec
->output_section
->vma
15671 + osi
->sec
->output_offset
15675 sym
.st_info
= ELF_ST_INFO (STB_LOCAL
, STT_NOTYPE
);
15676 sym
.st_shndx
= osi
->sec_shndx
;
15677 sym
.st_target_internal
= 0;
15678 elf32_arm_section_map_add (osi
->sec
, names
[type
][1], offset
);
15679 return osi
->func (osi
->flaginfo
, names
[type
], &sym
, osi
->sec
, NULL
) == 1;
15682 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
15683 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
15686 elf32_arm_output_plt_map_1 (output_arch_syminfo
*osi
,
15687 bfd_boolean is_iplt_entry_p
,
15688 union gotplt_union
*root_plt
,
15689 struct arm_plt_info
*arm_plt
)
15691 struct elf32_arm_link_hash_table
*htab
;
15692 bfd_vma addr
, plt_header_size
;
15694 if (root_plt
->offset
== (bfd_vma
) -1)
15697 htab
= elf32_arm_hash_table (osi
->info
);
15701 if (is_iplt_entry_p
)
15703 osi
->sec
= htab
->root
.iplt
;
15704 plt_header_size
= 0;
15708 osi
->sec
= htab
->root
.splt
;
15709 plt_header_size
= htab
->plt_header_size
;
15711 osi
->sec_shndx
= (_bfd_elf_section_from_bfd_section
15712 (osi
->info
->output_bfd
, osi
->sec
->output_section
));
15714 addr
= root_plt
->offset
& -2;
15715 if (htab
->symbian_p
)
15717 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
15719 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 4))
15722 else if (htab
->vxworks_p
)
15724 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
15726 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 8))
15728 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
+ 12))
15730 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 20))
15733 else if (htab
->nacl_p
)
15735 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
15738 else if (using_thumb_only (htab
))
15740 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_THUMB
, addr
))
15745 bfd_boolean thumb_stub_p
;
15747 thumb_stub_p
= elf32_arm_plt_needs_thumb_stub_p (osi
->info
, arm_plt
);
15750 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_THUMB
, addr
- 4))
15753 #ifdef FOUR_WORD_PLT
15754 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
15756 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 12))
15759 /* A three-word PLT with no Thumb thunk contains only Arm code,
15760 so only need to output a mapping symbol for the first PLT entry and
15761 entries with thumb thunks. */
15762 if (thumb_stub_p
|| addr
== plt_header_size
)
15764 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
15773 /* Output mapping symbols for PLT entries associated with H. */
15776 elf32_arm_output_plt_map (struct elf_link_hash_entry
*h
, void *inf
)
15778 output_arch_syminfo
*osi
= (output_arch_syminfo
*) inf
;
15779 struct elf32_arm_link_hash_entry
*eh
;
15781 if (h
->root
.type
== bfd_link_hash_indirect
)
15784 if (h
->root
.type
== bfd_link_hash_warning
)
15785 /* When warning symbols are created, they **replace** the "real"
15786 entry in the hash table, thus we never get to see the real
15787 symbol in a hash traversal. So look at it now. */
15788 h
= (struct elf_link_hash_entry
*) h
->root
.u
.i
.link
;
15790 eh
= (struct elf32_arm_link_hash_entry
*) h
;
15791 return elf32_arm_output_plt_map_1 (osi
, SYMBOL_CALLS_LOCAL (osi
->info
, h
),
15792 &h
->plt
, &eh
->plt
);
15795 /* Output a single local symbol for a generated stub. */
15798 elf32_arm_output_stub_sym (output_arch_syminfo
*osi
, const char *name
,
15799 bfd_vma offset
, bfd_vma size
)
15801 Elf_Internal_Sym sym
;
15803 sym
.st_value
= osi
->sec
->output_section
->vma
15804 + osi
->sec
->output_offset
15806 sym
.st_size
= size
;
15808 sym
.st_info
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
15809 sym
.st_shndx
= osi
->sec_shndx
;
15810 sym
.st_target_internal
= 0;
15811 return osi
->func (osi
->flaginfo
, name
, &sym
, osi
->sec
, NULL
) == 1;
15815 arm_map_one_stub (struct bfd_hash_entry
* gen_entry
,
15818 struct elf32_arm_stub_hash_entry
*stub_entry
;
15819 asection
*stub_sec
;
15822 output_arch_syminfo
*osi
;
15823 const insn_sequence
*template_sequence
;
15824 enum stub_insn_type prev_type
;
15827 enum map_symbol_type sym_type
;
15829 /* Massage our args to the form they really have. */
15830 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
15831 osi
= (output_arch_syminfo
*) in_arg
;
15833 stub_sec
= stub_entry
->stub_sec
;
15835 /* Ensure this stub is attached to the current section being
15837 if (stub_sec
!= osi
->sec
)
15840 addr
= (bfd_vma
) stub_entry
->stub_offset
;
15841 stub_name
= stub_entry
->output_name
;
15843 template_sequence
= stub_entry
->stub_template
;
15844 switch (template_sequence
[0].type
)
15847 if (!elf32_arm_output_stub_sym (osi
, stub_name
, addr
, stub_entry
->stub_size
))
15852 if (!elf32_arm_output_stub_sym (osi
, stub_name
, addr
| 1,
15853 stub_entry
->stub_size
))
15861 prev_type
= DATA_TYPE
;
15863 for (i
= 0; i
< stub_entry
->stub_template_size
; i
++)
15865 switch (template_sequence
[i
].type
)
15868 sym_type
= ARM_MAP_ARM
;
15873 sym_type
= ARM_MAP_THUMB
;
15877 sym_type
= ARM_MAP_DATA
;
15885 if (template_sequence
[i
].type
!= prev_type
)
15887 prev_type
= template_sequence
[i
].type
;
15888 if (!elf32_arm_output_map_sym (osi
, sym_type
, addr
+ size
))
15892 switch (template_sequence
[i
].type
)
15916 /* Output mapping symbols for linker generated sections,
15917 and for those data-only sections that do not have a
15921 elf32_arm_output_arch_local_syms (bfd
*output_bfd
,
15922 struct bfd_link_info
*info
,
15924 int (*func
) (void *, const char *,
15925 Elf_Internal_Sym
*,
15927 struct elf_link_hash_entry
*))
15929 output_arch_syminfo osi
;
15930 struct elf32_arm_link_hash_table
*htab
;
15932 bfd_size_type size
;
15935 htab
= elf32_arm_hash_table (info
);
15939 check_use_blx (htab
);
15941 osi
.flaginfo
= flaginfo
;
15945 /* Add a $d mapping symbol to data-only sections that
15946 don't have any mapping symbol. This may result in (harmless) redundant
15947 mapping symbols. */
15948 for (input_bfd
= info
->input_bfds
;
15950 input_bfd
= input_bfd
->link
.next
)
15952 if ((input_bfd
->flags
& (BFD_LINKER_CREATED
| HAS_SYMS
)) == HAS_SYMS
)
15953 for (osi
.sec
= input_bfd
->sections
;
15955 osi
.sec
= osi
.sec
->next
)
15957 if (osi
.sec
->output_section
!= NULL
15958 && ((osi
.sec
->output_section
->flags
& (SEC_ALLOC
| SEC_CODE
))
15960 && (osi
.sec
->flags
& (SEC_HAS_CONTENTS
| SEC_LINKER_CREATED
))
15961 == SEC_HAS_CONTENTS
15962 && get_arm_elf_section_data (osi
.sec
) != NULL
15963 && get_arm_elf_section_data (osi
.sec
)->mapcount
== 0
15964 && osi
.sec
->size
> 0
15965 && (osi
.sec
->flags
& SEC_EXCLUDE
) == 0)
15967 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
15968 (output_bfd
, osi
.sec
->output_section
);
15969 if (osi
.sec_shndx
!= (int)SHN_BAD
)
15970 elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, 0);
15975 /* ARM->Thumb glue. */
15976 if (htab
->arm_glue_size
> 0)
15978 osi
.sec
= bfd_get_linker_section (htab
->bfd_of_glue_owner
,
15979 ARM2THUMB_GLUE_SECTION_NAME
);
15981 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
15982 (output_bfd
, osi
.sec
->output_section
);
15983 if (bfd_link_pic (info
) || htab
->root
.is_relocatable_executable
15984 || htab
->pic_veneer
)
15985 size
= ARM2THUMB_PIC_GLUE_SIZE
;
15986 else if (htab
->use_blx
)
15987 size
= ARM2THUMB_V5_STATIC_GLUE_SIZE
;
15989 size
= ARM2THUMB_STATIC_GLUE_SIZE
;
15991 for (offset
= 0; offset
< htab
->arm_glue_size
; offset
+= size
)
15993 elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, offset
);
15994 elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, offset
+ size
- 4);
15998 /* Thumb->ARM glue. */
15999 if (htab
->thumb_glue_size
> 0)
16001 osi
.sec
= bfd_get_linker_section (htab
->bfd_of_glue_owner
,
16002 THUMB2ARM_GLUE_SECTION_NAME
);
16004 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
16005 (output_bfd
, osi
.sec
->output_section
);
16006 size
= THUMB2ARM_GLUE_SIZE
;
16008 for (offset
= 0; offset
< htab
->thumb_glue_size
; offset
+= size
)
16010 elf32_arm_output_map_sym (&osi
, ARM_MAP_THUMB
, offset
);
16011 elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, offset
+ 4);
16015 /* ARMv4 BX veneers. */
16016 if (htab
->bx_glue_size
> 0)
16018 osi
.sec
= bfd_get_linker_section (htab
->bfd_of_glue_owner
,
16019 ARM_BX_GLUE_SECTION_NAME
);
16021 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
16022 (output_bfd
, osi
.sec
->output_section
);
16024 elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0);
16027 /* Long calls stubs. */
16028 if (htab
->stub_bfd
&& htab
->stub_bfd
->sections
)
16030 asection
* stub_sec
;
16032 for (stub_sec
= htab
->stub_bfd
->sections
;
16034 stub_sec
= stub_sec
->next
)
16036 /* Ignore non-stub sections. */
16037 if (!strstr (stub_sec
->name
, STUB_SUFFIX
))
16040 osi
.sec
= stub_sec
;
16042 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
16043 (output_bfd
, osi
.sec
->output_section
);
16045 bfd_hash_traverse (&htab
->stub_hash_table
, arm_map_one_stub
, &osi
);
16049 /* Finally, output mapping symbols for the PLT. */
16050 if (htab
->root
.splt
&& htab
->root
.splt
->size
> 0)
16052 osi
.sec
= htab
->root
.splt
;
16053 osi
.sec_shndx
= (_bfd_elf_section_from_bfd_section
16054 (output_bfd
, osi
.sec
->output_section
));
16056 /* Output mapping symbols for the plt header. SymbianOS does not have a
16058 if (htab
->vxworks_p
)
16060 /* VxWorks shared libraries have no PLT header. */
16061 if (!bfd_link_pic (info
))
16063 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0))
16065 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, 12))
16069 else if (htab
->nacl_p
)
16071 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0))
16074 else if (using_thumb_only (htab
))
16076 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_THUMB
, 0))
16078 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, 12))
16080 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_THUMB
, 16))
16083 else if (!htab
->symbian_p
)
16085 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0))
16087 #ifndef FOUR_WORD_PLT
16088 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, 16))
16093 if (htab
->nacl_p
&& htab
->root
.iplt
&& htab
->root
.iplt
->size
> 0)
16095 /* NaCl uses a special first entry in .iplt too. */
16096 osi
.sec
= htab
->root
.iplt
;
16097 osi
.sec_shndx
= (_bfd_elf_section_from_bfd_section
16098 (output_bfd
, osi
.sec
->output_section
));
16099 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0))
16102 if ((htab
->root
.splt
&& htab
->root
.splt
->size
> 0)
16103 || (htab
->root
.iplt
&& htab
->root
.iplt
->size
> 0))
16105 elf_link_hash_traverse (&htab
->root
, elf32_arm_output_plt_map
, &osi
);
16106 for (input_bfd
= info
->input_bfds
;
16108 input_bfd
= input_bfd
->link
.next
)
16110 struct arm_local_iplt_info
**local_iplt
;
16111 unsigned int i
, num_syms
;
16113 local_iplt
= elf32_arm_local_iplt (input_bfd
);
16114 if (local_iplt
!= NULL
)
16116 num_syms
= elf_symtab_hdr (input_bfd
).sh_info
;
16117 for (i
= 0; i
< num_syms
; i
++)
16118 if (local_iplt
[i
] != NULL
16119 && !elf32_arm_output_plt_map_1 (&osi
, TRUE
,
16120 &local_iplt
[i
]->root
,
16121 &local_iplt
[i
]->arm
))
16126 if (htab
->dt_tlsdesc_plt
!= 0)
16128 /* Mapping symbols for the lazy tls trampoline. */
16129 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, htab
->dt_tlsdesc_plt
))
16132 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
,
16133 htab
->dt_tlsdesc_plt
+ 24))
16136 if (htab
->tls_trampoline
!= 0)
16138 /* Mapping symbols for the tls trampoline. */
16139 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, htab
->tls_trampoline
))
16141 #ifdef FOUR_WORD_PLT
16142 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
,
16143 htab
->tls_trampoline
+ 12))
16151 /* Allocate target specific section data. */
16154 elf32_arm_new_section_hook (bfd
*abfd
, asection
*sec
)
16156 if (!sec
->used_by_bfd
)
16158 _arm_elf_section_data
*sdata
;
16159 bfd_size_type amt
= sizeof (*sdata
);
16161 sdata
= (_arm_elf_section_data
*) bfd_zalloc (abfd
, amt
);
16164 sec
->used_by_bfd
= sdata
;
16167 return _bfd_elf_new_section_hook (abfd
, sec
);
16171 /* Used to order a list of mapping symbols by address. */
16174 elf32_arm_compare_mapping (const void * a
, const void * b
)
16176 const elf32_arm_section_map
*amap
= (const elf32_arm_section_map
*) a
;
16177 const elf32_arm_section_map
*bmap
= (const elf32_arm_section_map
*) b
;
16179 if (amap
->vma
> bmap
->vma
)
16181 else if (amap
->vma
< bmap
->vma
)
16183 else if (amap
->type
> bmap
->type
)
16184 /* Ensure results do not depend on the host qsort for objects with
16185 multiple mapping symbols at the same address by sorting on type
16188 else if (amap
->type
< bmap
->type
)
16194 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
16196 static unsigned long
16197 offset_prel31 (unsigned long addr
, bfd_vma offset
)
16199 return (addr
& ~0x7ffffffful
) | ((addr
+ offset
) & 0x7ffffffful
);
16202 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
16206 copy_exidx_entry (bfd
*output_bfd
, bfd_byte
*to
, bfd_byte
*from
, bfd_vma offset
)
16208 unsigned long first_word
= bfd_get_32 (output_bfd
, from
);
16209 unsigned long second_word
= bfd_get_32 (output_bfd
, from
+ 4);
16211 /* High bit of first word is supposed to be zero. */
16212 if ((first_word
& 0x80000000ul
) == 0)
16213 first_word
= offset_prel31 (first_word
, offset
);
16215 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
16216 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
16217 if ((second_word
!= 0x1) && ((second_word
& 0x80000000ul
) == 0))
16218 second_word
= offset_prel31 (second_word
, offset
);
16220 bfd_put_32 (output_bfd
, first_word
, to
);
16221 bfd_put_32 (output_bfd
, second_word
, to
+ 4);
16224 /* Data for make_branch_to_a8_stub(). */
16226 struct a8_branch_to_stub_data
16228 asection
*writing_section
;
16229 bfd_byte
*contents
;
16233 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
16234 places for a particular section. */
16237 make_branch_to_a8_stub (struct bfd_hash_entry
*gen_entry
,
16240 struct elf32_arm_stub_hash_entry
*stub_entry
;
16241 struct a8_branch_to_stub_data
*data
;
16242 bfd_byte
*contents
;
16243 unsigned long branch_insn
;
16244 bfd_vma veneered_insn_loc
, veneer_entry_loc
;
16245 bfd_signed_vma branch_offset
;
16247 unsigned int target
;
16249 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
16250 data
= (struct a8_branch_to_stub_data
*) in_arg
;
16252 if (stub_entry
->target_section
!= data
->writing_section
16253 || stub_entry
->stub_type
< arm_stub_a8_veneer_lwm
)
16256 contents
= data
->contents
;
16258 veneered_insn_loc
= stub_entry
->target_section
->output_section
->vma
16259 + stub_entry
->target_section
->output_offset
16260 + stub_entry
->target_value
;
16262 veneer_entry_loc
= stub_entry
->stub_sec
->output_section
->vma
16263 + stub_entry
->stub_sec
->output_offset
16264 + stub_entry
->stub_offset
;
16266 if (stub_entry
->stub_type
== arm_stub_a8_veneer_blx
)
16267 veneered_insn_loc
&= ~3u;
16269 branch_offset
= veneer_entry_loc
- veneered_insn_loc
- 4;
16271 abfd
= stub_entry
->target_section
->owner
;
16272 target
= stub_entry
->target_value
;
16274 /* We attempt to avoid this condition by setting stubs_always_after_branch
16275 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
16276 This check is just to be on the safe side... */
16277 if ((veneered_insn_loc
& ~0xfff) == (veneer_entry_loc
& ~0xfff))
16279 (*_bfd_error_handler
) (_("%B: error: Cortex-A8 erratum stub is "
16280 "allocated in unsafe location"), abfd
);
16284 switch (stub_entry
->stub_type
)
16286 case arm_stub_a8_veneer_b
:
16287 case arm_stub_a8_veneer_b_cond
:
16288 branch_insn
= 0xf0009000;
16291 case arm_stub_a8_veneer_blx
:
16292 branch_insn
= 0xf000e800;
16295 case arm_stub_a8_veneer_bl
:
16297 unsigned int i1
, j1
, i2
, j2
, s
;
16299 branch_insn
= 0xf000d000;
16302 if (branch_offset
< -16777216 || branch_offset
> 16777214)
16304 /* There's not much we can do apart from complain if this
16306 (*_bfd_error_handler
) (_("%B: error: Cortex-A8 erratum stub out "
16307 "of range (input file too large)"), abfd
);
16311 /* i1 = not(j1 eor s), so:
16313 j1 = (not i1) eor s. */
16315 branch_insn
|= (branch_offset
>> 1) & 0x7ff;
16316 branch_insn
|= ((branch_offset
>> 12) & 0x3ff) << 16;
16317 i2
= (branch_offset
>> 22) & 1;
16318 i1
= (branch_offset
>> 23) & 1;
16319 s
= (branch_offset
>> 24) & 1;
16322 branch_insn
|= j2
<< 11;
16323 branch_insn
|= j1
<< 13;
16324 branch_insn
|= s
<< 26;
16333 bfd_put_16 (abfd
, (branch_insn
>> 16) & 0xffff, &contents
[target
]);
16334 bfd_put_16 (abfd
, branch_insn
& 0xffff, &contents
[target
+ 2]);
16339 /* Beginning of stm32l4xx work-around. */
16341 /* Functions encoding instructions necessary for the emission of the
16342 fix-stm32l4xx-629360.
16343 Encoding is extracted from the
16344 ARM (C) Architecture Reference Manual
16345 ARMv7-A and ARMv7-R edition
16346 ARM DDI 0406C.b (ID072512). */
16348 static inline bfd_vma
16349 create_instruction_branch_absolute (int branch_offset
)
16351 /* A8.8.18 B (A8-334)
16352 B target_address (Encoding T4). */
16353 /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii. */
16354 /* jump offset is: S:I1:I2:imm10:imm11:0. */
16355 /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S). */
16357 int s
= ((branch_offset
& 0x1000000) >> 24);
16358 int j1
= s
^ !((branch_offset
& 0x800000) >> 23);
16359 int j2
= s
^ !((branch_offset
& 0x400000) >> 22);
16361 if (branch_offset
< -(1 << 24) || branch_offset
>= (1 << 24))
16362 BFD_ASSERT (0 && "Error: branch out of range. Cannot create branch.");
16364 bfd_vma patched_inst
= 0xf0009000
16366 | (((unsigned long) (branch_offset
) >> 12) & 0x3ff) << 16 /* imm10. */
16367 | j1
<< 13 /* J1. */
16368 | j2
<< 11 /* J2. */
16369 | (((unsigned long) (branch_offset
) >> 1) & 0x7ff); /* imm11. */
16371 return patched_inst
;
16374 static inline bfd_vma
16375 create_instruction_ldmia (int base_reg
, int wback
, int reg_mask
)
16377 /* A8.8.57 LDM/LDMIA/LDMFD (A8-396)
16378 LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2). */
16379 bfd_vma patched_inst
= 0xe8900000
16380 | (/*W=*/wback
<< 21)
16382 | (reg_mask
& 0x0000ffff);
16384 return patched_inst
;
16387 static inline bfd_vma
16388 create_instruction_ldmdb (int base_reg
, int wback
, int reg_mask
)
16390 /* A8.8.60 LDMDB/LDMEA (A8-402)
16391 LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1). */
16392 bfd_vma patched_inst
= 0xe9100000
16393 | (/*W=*/wback
<< 21)
16395 | (reg_mask
& 0x0000ffff);
16397 return patched_inst
;
16400 static inline bfd_vma
16401 create_instruction_mov (int target_reg
, int source_reg
)
16403 /* A8.8.103 MOV (register) (A8-486)
16404 MOV Rd, Rm (Encoding T1). */
16405 bfd_vma patched_inst
= 0x4600
16406 | (target_reg
& 0x7)
16407 | ((target_reg
& 0x8) >> 3) << 7
16408 | (source_reg
<< 3);
16410 return patched_inst
;
16413 static inline bfd_vma
16414 create_instruction_sub (int target_reg
, int source_reg
, int value
)
16416 /* A8.8.221 SUB (immediate) (A8-708)
16417 SUB Rd, Rn, #value (Encoding T3). */
16418 bfd_vma patched_inst
= 0xf1a00000
16419 | (target_reg
<< 8)
16420 | (source_reg
<< 16)
16422 | ((value
& 0x800) >> 11) << 26
16423 | ((value
& 0x700) >> 8) << 12
16426 return patched_inst
;
16429 static inline bfd_vma
16430 create_instruction_vldmia (int base_reg
, int wback
, int num_regs
,
16433 /* A8.8.332 VLDM (A8-922)
16434 VLMD{MODE} Rn{!}, {list} (Encoding T2). */
16435 bfd_vma patched_inst
= 0xec900a00
16436 | (/*W=*/wback
<< 21)
16438 | (num_regs
& 0x000000ff)
16439 | (((unsigned)first_reg
>>1) & 0x0000000f) << 12
16440 | (first_reg
& 0x00000001) << 22;
16442 return patched_inst
;
16445 static inline bfd_vma
16446 create_instruction_vldmdb (int base_reg
, int num_regs
, int first_reg
)
16448 /* A8.8.332 VLDM (A8-922)
16449 VLMD{MODE} Rn!, {} (Encoding T2). */
16450 bfd_vma patched_inst
= 0xed300a00
16452 | (num_regs
& 0x000000ff)
16453 | (((unsigned)first_reg
>>1) & 0x0000000f) << 12
16454 | (first_reg
& 0x00000001) << 22;
16456 return patched_inst
;
16459 static inline bfd_vma
16460 create_instruction_udf_w (int value
)
16462 /* A8.8.247 UDF (A8-758)
16463 Undefined (Encoding T2). */
16464 bfd_vma patched_inst
= 0xf7f0a000
16465 | (value
& 0x00000fff)
16466 | (value
& 0x000f0000) << 16;
16468 return patched_inst
;
16471 static inline bfd_vma
16472 create_instruction_udf (int value
)
16474 /* A8.8.247 UDF (A8-758)
16475 Undefined (Encoding T1). */
16476 bfd_vma patched_inst
= 0xde00
16479 return patched_inst
;
16482 /* Functions writing an instruction in memory, returning the next
16483 memory position to write to. */
16485 static inline bfd_byte
*
16486 push_thumb2_insn32 (struct elf32_arm_link_hash_table
* htab
,
16487 bfd
* output_bfd
, bfd_byte
*pt
, insn32 insn
)
16489 put_thumb2_insn (htab
, output_bfd
, insn
, pt
);
16493 static inline bfd_byte
*
16494 push_thumb2_insn16 (struct elf32_arm_link_hash_table
* htab
,
16495 bfd
* output_bfd
, bfd_byte
*pt
, insn32 insn
)
16497 put_thumb_insn (htab
, output_bfd
, insn
, pt
);
16501 /* Function filling up a region in memory with T1 and T2 UDFs taking
16502 care of alignment. */
16505 stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table
* htab
,
16507 const bfd_byte
* const base_stub_contents
,
16508 bfd_byte
* const from_stub_contents
,
16509 const bfd_byte
* const end_stub_contents
)
16511 bfd_byte
*current_stub_contents
= from_stub_contents
;
16513 /* Fill the remaining of the stub with deterministic contents : UDF
16515 Check if realignment is needed on modulo 4 frontier using T1, to
16517 if ((current_stub_contents
< end_stub_contents
)
16518 && !((current_stub_contents
- base_stub_contents
) % 2)
16519 && ((current_stub_contents
- base_stub_contents
) % 4))
16520 current_stub_contents
=
16521 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
16522 create_instruction_udf (0));
16524 for (; current_stub_contents
< end_stub_contents
;)
16525 current_stub_contents
=
16526 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16527 create_instruction_udf_w (0));
16529 return current_stub_contents
;
16532 /* Functions writing the stream of instructions equivalent to the
16533 derived sequence for ldmia, ldmdb, vldm respectively. */
16536 stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table
* htab
,
16538 const insn32 initial_insn
,
16539 const bfd_byte
*const initial_insn_addr
,
16540 bfd_byte
*const base_stub_contents
)
16542 int wback
= (initial_insn
& 0x00200000) >> 21;
16543 int ri
, rn
= (initial_insn
& 0x000F0000) >> 16;
16544 int insn_all_registers
= initial_insn
& 0x0000ffff;
16545 int insn_low_registers
, insn_high_registers
;
16546 int usable_register_mask
;
16547 int nb_registers
= popcount (insn_all_registers
);
16548 int restore_pc
= (insn_all_registers
& (1 << 15)) ? 1 : 0;
16549 int restore_rn
= (insn_all_registers
& (1 << rn
)) ? 1 : 0;
16550 bfd_byte
*current_stub_contents
= base_stub_contents
;
16552 BFD_ASSERT (is_thumb2_ldmia (initial_insn
));
16554 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
16555 smaller than 8 registers load sequences that do not cause the
16557 if (nb_registers
<= 8)
16559 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
16560 current_stub_contents
=
16561 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16564 /* B initial_insn_addr+4. */
16566 current_stub_contents
=
16567 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16568 create_instruction_branch_absolute
16569 (initial_insn_addr
- current_stub_contents
));
16572 /* Fill the remaining of the stub with deterministic contents. */
16573 current_stub_contents
=
16574 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
16575 base_stub_contents
, current_stub_contents
,
16576 base_stub_contents
+
16577 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
);
16582 /* - reg_list[13] == 0. */
16583 BFD_ASSERT ((insn_all_registers
& (1 << 13))==0);
16585 /* - reg_list[14] & reg_list[15] != 1. */
16586 BFD_ASSERT ((insn_all_registers
& 0xC000) != 0xC000);
16588 /* - if (wback==1) reg_list[rn] == 0. */
16589 BFD_ASSERT (!wback
|| !restore_rn
);
16591 /* - nb_registers > 8. */
16592 BFD_ASSERT (popcount (insn_all_registers
) > 8);
16594 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
16596 /* In the following algorithm, we split this wide LDM using 2 LDM insns:
16597 - One with the 7 lowest registers (register mask 0x007F)
16598 This LDM will finally contain between 2 and 7 registers
16599 - One with the 7 highest registers (register mask 0xDF80)
16600 This ldm will finally contain between 2 and 7 registers. */
16601 insn_low_registers
= insn_all_registers
& 0x007F;
16602 insn_high_registers
= insn_all_registers
& 0xDF80;
16604 /* A spare register may be needed during this veneer to temporarily
16605 handle the base register. This register will be restored with the
16606 last LDM operation.
16607 The usable register may be any general purpose register (that
16608 excludes PC, SP, LR : register mask is 0x1FFF). */
16609 usable_register_mask
= 0x1FFF;
16611 /* Generate the stub function. */
16614 /* LDMIA Rn!, {R-low-register-list} : (Encoding T2). */
16615 current_stub_contents
=
16616 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16617 create_instruction_ldmia
16618 (rn
, /*wback=*/1, insn_low_registers
));
16620 /* LDMIA Rn!, {R-high-register-list} : (Encoding T2). */
16621 current_stub_contents
=
16622 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16623 create_instruction_ldmia
16624 (rn
, /*wback=*/1, insn_high_registers
));
16627 /* B initial_insn_addr+4. */
16628 current_stub_contents
=
16629 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16630 create_instruction_branch_absolute
16631 (initial_insn_addr
- current_stub_contents
));
16634 else /* if (!wback). */
16638 /* If Rn is not part of the high-register-list, move it there. */
16639 if (!(insn_high_registers
& (1 << rn
)))
16641 /* Choose a Ri in the high-register-list that will be restored. */
16642 ri
= ctz (insn_high_registers
& usable_register_mask
& ~(1 << rn
));
16645 current_stub_contents
=
16646 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
16647 create_instruction_mov (ri
, rn
));
16650 /* LDMIA Ri!, {R-low-register-list} : (Encoding T2). */
16651 current_stub_contents
=
16652 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16653 create_instruction_ldmia
16654 (ri
, /*wback=*/1, insn_low_registers
));
16656 /* LDMIA Ri, {R-high-register-list} : (Encoding T2). */
16657 current_stub_contents
=
16658 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16659 create_instruction_ldmia
16660 (ri
, /*wback=*/0, insn_high_registers
));
16664 /* B initial_insn_addr+4. */
16665 current_stub_contents
=
16666 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16667 create_instruction_branch_absolute
16668 (initial_insn_addr
- current_stub_contents
));
16672 /* Fill the remaining of the stub with deterministic contents. */
16673 current_stub_contents
=
16674 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
16675 base_stub_contents
, current_stub_contents
,
16676 base_stub_contents
+
16677 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
);
16681 stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table
* htab
,
16683 const insn32 initial_insn
,
16684 const bfd_byte
*const initial_insn_addr
,
16685 bfd_byte
*const base_stub_contents
)
16687 int wback
= (initial_insn
& 0x00200000) >> 21;
16688 int ri
, rn
= (initial_insn
& 0x000f0000) >> 16;
16689 int insn_all_registers
= initial_insn
& 0x0000ffff;
16690 int insn_low_registers
, insn_high_registers
;
16691 int usable_register_mask
;
16692 int restore_pc
= (insn_all_registers
& (1 << 15)) ? 1 : 0;
16693 int restore_rn
= (insn_all_registers
& (1 << rn
)) ? 1 : 0;
16694 int nb_registers
= popcount (insn_all_registers
);
16695 bfd_byte
*current_stub_contents
= base_stub_contents
;
16697 BFD_ASSERT (is_thumb2_ldmdb (initial_insn
));
16699 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
16700 smaller than 8 registers load sequences that do not cause the
16702 if (nb_registers
<= 8)
16704 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
16705 current_stub_contents
=
16706 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16709 /* B initial_insn_addr+4. */
16710 current_stub_contents
=
16711 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16712 create_instruction_branch_absolute
16713 (initial_insn_addr
- current_stub_contents
));
16715 /* Fill the remaining of the stub with deterministic contents. */
16716 current_stub_contents
=
16717 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
16718 base_stub_contents
, current_stub_contents
,
16719 base_stub_contents
+
16720 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
);
16725 /* - reg_list[13] == 0. */
16726 BFD_ASSERT ((insn_all_registers
& (1 << 13)) == 0);
16728 /* - reg_list[14] & reg_list[15] != 1. */
16729 BFD_ASSERT ((insn_all_registers
& 0xC000) != 0xC000);
16731 /* - if (wback==1) reg_list[rn] == 0. */
16732 BFD_ASSERT (!wback
|| !restore_rn
);
16734 /* - nb_registers > 8. */
16735 BFD_ASSERT (popcount (insn_all_registers
) > 8);
16737 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
16739 /* In the following algorithm, we split this wide LDM using 2 LDM insn:
16740 - One with the 7 lowest registers (register mask 0x007F)
16741 This LDM will finally contain between 2 and 7 registers
16742 - One with the 7 highest registers (register mask 0xDF80)
16743 This ldm will finally contain between 2 and 7 registers. */
16744 insn_low_registers
= insn_all_registers
& 0x007F;
16745 insn_high_registers
= insn_all_registers
& 0xDF80;
16747 /* A spare register may be needed during this veneer to temporarily
16748 handle the base register. This register will be restored with
16749 the last LDM operation.
16750 The usable register may be any general purpose register (that excludes
16751 PC, SP, LR : register mask is 0x1FFF). */
16752 usable_register_mask
= 0x1FFF;
16754 /* Generate the stub function. */
16755 if (!wback
&& !restore_pc
&& !restore_rn
)
16757 /* Choose a Ri in the low-register-list that will be restored. */
16758 ri
= ctz (insn_low_registers
& usable_register_mask
& ~(1 << rn
));
16761 current_stub_contents
=
16762 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
16763 create_instruction_mov (ri
, rn
));
16765 /* LDMDB Ri!, {R-high-register-list}. */
16766 current_stub_contents
=
16767 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16768 create_instruction_ldmdb
16769 (ri
, /*wback=*/1, insn_high_registers
));
16771 /* LDMDB Ri, {R-low-register-list}. */
16772 current_stub_contents
=
16773 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16774 create_instruction_ldmdb
16775 (ri
, /*wback=*/0, insn_low_registers
));
16777 /* B initial_insn_addr+4. */
16778 current_stub_contents
=
16779 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16780 create_instruction_branch_absolute
16781 (initial_insn_addr
- current_stub_contents
));
16783 else if (wback
&& !restore_pc
&& !restore_rn
)
16785 /* LDMDB Rn!, {R-high-register-list}. */
16786 current_stub_contents
=
16787 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16788 create_instruction_ldmdb
16789 (rn
, /*wback=*/1, insn_high_registers
));
16791 /* LDMDB Rn!, {R-low-register-list}. */
16792 current_stub_contents
=
16793 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16794 create_instruction_ldmdb
16795 (rn
, /*wback=*/1, insn_low_registers
));
16797 /* B initial_insn_addr+4. */
16798 current_stub_contents
=
16799 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16800 create_instruction_branch_absolute
16801 (initial_insn_addr
- current_stub_contents
));
16803 else if (!wback
&& restore_pc
&& !restore_rn
)
16805 /* Choose a Ri in the high-register-list that will be restored. */
16806 ri
= ctz (insn_high_registers
& usable_register_mask
& ~(1 << rn
));
16808 /* SUB Ri, Rn, #(4*nb_registers). */
16809 current_stub_contents
=
16810 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16811 create_instruction_sub (ri
, rn
, (4 * nb_registers
)));
16813 /* LDMIA Ri!, {R-low-register-list}. */
16814 current_stub_contents
=
16815 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16816 create_instruction_ldmia
16817 (ri
, /*wback=*/1, insn_low_registers
));
16819 /* LDMIA Ri, {R-high-register-list}. */
16820 current_stub_contents
=
16821 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16822 create_instruction_ldmia
16823 (ri
, /*wback=*/0, insn_high_registers
));
16825 else if (wback
&& restore_pc
&& !restore_rn
)
16827 /* Choose a Ri in the high-register-list that will be restored. */
16828 ri
= ctz (insn_high_registers
& usable_register_mask
& ~(1 << rn
));
16830 /* SUB Rn, Rn, #(4*nb_registers) */
16831 current_stub_contents
=
16832 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16833 create_instruction_sub (rn
, rn
, (4 * nb_registers
)));
16836 current_stub_contents
=
16837 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
16838 create_instruction_mov (ri
, rn
));
16840 /* LDMIA Ri!, {R-low-register-list}. */
16841 current_stub_contents
=
16842 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16843 create_instruction_ldmia
16844 (ri
, /*wback=*/1, insn_low_registers
));
16846 /* LDMIA Ri, {R-high-register-list}. */
16847 current_stub_contents
=
16848 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16849 create_instruction_ldmia
16850 (ri
, /*wback=*/0, insn_high_registers
));
16852 else if (!wback
&& !restore_pc
&& restore_rn
)
16855 if (!(insn_low_registers
& (1 << rn
)))
16857 /* Choose a Ri in the low-register-list that will be restored. */
16858 ri
= ctz (insn_low_registers
& usable_register_mask
& ~(1 << rn
));
16861 current_stub_contents
=
16862 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
16863 create_instruction_mov (ri
, rn
));
16866 /* LDMDB Ri!, {R-high-register-list}. */
16867 current_stub_contents
=
16868 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16869 create_instruction_ldmdb
16870 (ri
, /*wback=*/1, insn_high_registers
));
16872 /* LDMDB Ri, {R-low-register-list}. */
16873 current_stub_contents
=
16874 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16875 create_instruction_ldmdb
16876 (ri
, /*wback=*/0, insn_low_registers
));
16878 /* B initial_insn_addr+4. */
16879 current_stub_contents
=
16880 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16881 create_instruction_branch_absolute
16882 (initial_insn_addr
- current_stub_contents
));
16884 else if (!wback
&& restore_pc
&& restore_rn
)
16887 if (!(insn_high_registers
& (1 << rn
)))
16889 /* Choose a Ri in the high-register-list that will be restored. */
16890 ri
= ctz (insn_high_registers
& usable_register_mask
& ~(1 << rn
));
16893 /* SUB Ri, Rn, #(4*nb_registers). */
16894 current_stub_contents
=
16895 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16896 create_instruction_sub (ri
, rn
, (4 * nb_registers
)));
16898 /* LDMIA Ri!, {R-low-register-list}. */
16899 current_stub_contents
=
16900 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16901 create_instruction_ldmia
16902 (ri
, /*wback=*/1, insn_low_registers
));
16904 /* LDMIA Ri, {R-high-register-list}. */
16905 current_stub_contents
=
16906 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16907 create_instruction_ldmia
16908 (ri
, /*wback=*/0, insn_high_registers
));
16910 else if (wback
&& restore_rn
)
16912 /* The assembler should not have accepted to encode this. */
16913 BFD_ASSERT (0 && "Cannot patch an instruction that has an "
16914 "undefined behavior.\n");
16917 /* Fill the remaining of the stub with deterministic contents. */
16918 current_stub_contents
=
16919 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
16920 base_stub_contents
, current_stub_contents
,
16921 base_stub_contents
+
16922 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
);
16927 stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table
* htab
,
16929 const insn32 initial_insn
,
16930 const bfd_byte
*const initial_insn_addr
,
16931 bfd_byte
*const base_stub_contents
)
16933 int num_regs
= ((unsigned int)initial_insn
<< 24) >> 24;
16934 bfd_byte
*current_stub_contents
= base_stub_contents
;
16936 BFD_ASSERT (is_thumb2_vldm (initial_insn
));
16938 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
16939 smaller than 8 registers load sequences that do not cause the
16943 /* Untouched instruction. */
16944 current_stub_contents
=
16945 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16948 /* B initial_insn_addr+4. */
16949 current_stub_contents
=
16950 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16951 create_instruction_branch_absolute
16952 (initial_insn_addr
- current_stub_contents
));
16956 bfd_boolean is_ia_nobang
= /* (IA without !). */
16957 (((initial_insn
<< 7) >> 28) & 0xd) == 0x4;
16958 bfd_boolean is_ia_bang
= /* (IA with !) - includes VPOP. */
16959 (((initial_insn
<< 7) >> 28) & 0xd) == 0x5;
16960 bfd_boolean is_db_bang
= /* (DB with !). */
16961 (((initial_insn
<< 7) >> 28) & 0xd) == 0x9;
16962 int base_reg
= ((unsigned int)initial_insn
<< 12) >> 28;
16963 /* d = UInt (Vd:D);. */
16964 int first_reg
= ((((unsigned int)initial_insn
<< 16) >> 28) << 1)
16965 | (((unsigned int)initial_insn
<< 9) >> 31);
16967 /* Compute the number of 8-register chunks needed to split. */
16968 int chunks
= (num_regs
%8) ? (num_regs
/8 + 1) : (num_regs
/8);
16971 /* The test coverage has been done assuming the following
16972 hypothesis that exactly one of the previous is_ predicates is
16974 BFD_ASSERT ((is_ia_nobang
^ is_ia_bang
^ is_db_bang
) &&
16975 !(is_ia_nobang
& is_ia_bang
& is_db_bang
));
16977 /* We treat the cutting of the register in one pass for all
16978 cases, then we emit the adjustments:
16981 -> vldm rx!, {8_words_or_less} for each needed 8_word
16982 -> sub rx, rx, #size (list)
16985 -> vldm rx!, {8_words_or_less} for each needed 8_word
16986 This also handles vpop instruction (when rx is sp)
16989 -> vldmb rx!, {8_words_or_less} for each needed 8_word. */
16990 for (chunk
= 0; chunk
<chunks
; ++chunk
)
16992 if (is_ia_nobang
|| is_ia_bang
)
16994 current_stub_contents
=
16995 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
16996 create_instruction_vldmia
16999 chunks
- (chunk
+ 1) ?
17000 8 : num_regs
- chunk
* 8,
17001 first_reg
+ chunk
* 8));
17003 else if (is_db_bang
)
17005 current_stub_contents
=
17006 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17007 create_instruction_vldmdb
17009 chunks
- (chunk
+ 1) ?
17010 8 : num_regs
- chunk
* 8,
17011 first_reg
+ chunk
* 8));
17015 /* Only this case requires the base register compensation
17019 current_stub_contents
=
17020 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17021 create_instruction_sub
17022 (base_reg
, base_reg
, 4*num_regs
));
17025 /* B initial_insn_addr+4. */
17026 current_stub_contents
=
17027 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17028 create_instruction_branch_absolute
17029 (initial_insn_addr
- current_stub_contents
));
17032 /* Fill the remaining of the stub with deterministic contents. */
17033 current_stub_contents
=
17034 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
17035 base_stub_contents
, current_stub_contents
,
17036 base_stub_contents
+
17037 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE
);
17041 stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table
* htab
,
17043 const insn32 wrong_insn
,
17044 const bfd_byte
*const wrong_insn_addr
,
17045 bfd_byte
*const stub_contents
)
17047 if (is_thumb2_ldmia (wrong_insn
))
17048 stm32l4xx_create_replacing_stub_ldmia (htab
, output_bfd
,
17049 wrong_insn
, wrong_insn_addr
,
17051 else if (is_thumb2_ldmdb (wrong_insn
))
17052 stm32l4xx_create_replacing_stub_ldmdb (htab
, output_bfd
,
17053 wrong_insn
, wrong_insn_addr
,
17055 else if (is_thumb2_vldm (wrong_insn
))
17056 stm32l4xx_create_replacing_stub_vldm (htab
, output_bfd
,
17057 wrong_insn
, wrong_insn_addr
,
17061 /* End of stm32l4xx work-around. */
17065 elf32_arm_add_relocation (bfd
*output_bfd
, struct bfd_link_info
*info
,
17066 asection
*output_sec
, Elf_Internal_Rela
*rel
)
17068 BFD_ASSERT (output_sec
&& rel
);
17069 struct bfd_elf_section_reloc_data
*output_reldata
;
17070 struct elf32_arm_link_hash_table
*htab
;
17071 struct bfd_elf_section_data
*oesd
= elf_section_data (output_sec
);
17072 Elf_Internal_Shdr
*rel_hdr
;
17077 rel_hdr
= oesd
->rel
.hdr
;
17078 output_reldata
= &(oesd
->rel
);
17080 else if (oesd
->rela
.hdr
)
17082 rel_hdr
= oesd
->rela
.hdr
;
17083 output_reldata
= &(oesd
->rela
);
17090 bfd_byte
*erel
= rel_hdr
->contents
;
17091 erel
+= output_reldata
->count
* rel_hdr
->sh_entsize
;
17092 htab
= elf32_arm_hash_table (info
);
17093 SWAP_RELOC_OUT (htab
) (output_bfd
, rel
, erel
);
17094 output_reldata
->count
++;
17097 /* Do code byteswapping. Return FALSE afterwards so that the section is
17098 written out as normal. */
17101 elf32_arm_write_section (bfd
*output_bfd
,
17102 struct bfd_link_info
*link_info
,
17104 bfd_byte
*contents
)
17106 unsigned int mapcount
, errcount
;
17107 _arm_elf_section_data
*arm_data
;
17108 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
17109 elf32_arm_section_map
*map
;
17110 elf32_vfp11_erratum_list
*errnode
;
17111 elf32_stm32l4xx_erratum_list
*stm32l4xx_errnode
;
17114 bfd_vma offset
= sec
->output_section
->vma
+ sec
->output_offset
;
17118 if (globals
== NULL
)
17121 /* If this section has not been allocated an _arm_elf_section_data
17122 structure then we cannot record anything. */
17123 arm_data
= get_arm_elf_section_data (sec
);
17124 if (arm_data
== NULL
)
17127 mapcount
= arm_data
->mapcount
;
17128 map
= arm_data
->map
;
17129 errcount
= arm_data
->erratumcount
;
17133 unsigned int endianflip
= bfd_big_endian (output_bfd
) ? 3 : 0;
17135 for (errnode
= arm_data
->erratumlist
; errnode
!= 0;
17136 errnode
= errnode
->next
)
17138 bfd_vma target
= errnode
->vma
- offset
;
17140 switch (errnode
->type
)
17142 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER
:
17144 bfd_vma branch_to_veneer
;
17145 /* Original condition code of instruction, plus bit mask for
17146 ARM B instruction. */
17147 unsigned int insn
= (errnode
->u
.b
.vfp_insn
& 0xf0000000)
17150 /* The instruction is before the label. */
17153 /* Above offset included in -4 below. */
17154 branch_to_veneer
= errnode
->u
.b
.veneer
->vma
17155 - errnode
->vma
- 4;
17157 if ((signed) branch_to_veneer
< -(1 << 25)
17158 || (signed) branch_to_veneer
>= (1 << 25))
17159 (*_bfd_error_handler
) (_("%B: error: VFP11 veneer out of "
17160 "range"), output_bfd
);
17162 insn
|= (branch_to_veneer
>> 2) & 0xffffff;
17163 contents
[endianflip
^ target
] = insn
& 0xff;
17164 contents
[endianflip
^ (target
+ 1)] = (insn
>> 8) & 0xff;
17165 contents
[endianflip
^ (target
+ 2)] = (insn
>> 16) & 0xff;
17166 contents
[endianflip
^ (target
+ 3)] = (insn
>> 24) & 0xff;
17170 case VFP11_ERRATUM_ARM_VENEER
:
17172 bfd_vma branch_from_veneer
;
17175 /* Take size of veneer into account. */
17176 branch_from_veneer
= errnode
->u
.v
.branch
->vma
17177 - errnode
->vma
- 12;
17179 if ((signed) branch_from_veneer
< -(1 << 25)
17180 || (signed) branch_from_veneer
>= (1 << 25))
17181 (*_bfd_error_handler
) (_("%B: error: VFP11 veneer out of "
17182 "range"), output_bfd
);
17184 /* Original instruction. */
17185 insn
= errnode
->u
.v
.branch
->u
.b
.vfp_insn
;
17186 contents
[endianflip
^ target
] = insn
& 0xff;
17187 contents
[endianflip
^ (target
+ 1)] = (insn
>> 8) & 0xff;
17188 contents
[endianflip
^ (target
+ 2)] = (insn
>> 16) & 0xff;
17189 contents
[endianflip
^ (target
+ 3)] = (insn
>> 24) & 0xff;
17191 /* Branch back to insn after original insn. */
17192 insn
= 0xea000000 | ((branch_from_veneer
>> 2) & 0xffffff);
17193 contents
[endianflip
^ (target
+ 4)] = insn
& 0xff;
17194 contents
[endianflip
^ (target
+ 5)] = (insn
>> 8) & 0xff;
17195 contents
[endianflip
^ (target
+ 6)] = (insn
>> 16) & 0xff;
17196 contents
[endianflip
^ (target
+ 7)] = (insn
>> 24) & 0xff;
17206 if (arm_data
->stm32l4xx_erratumcount
!= 0)
17208 for (stm32l4xx_errnode
= arm_data
->stm32l4xx_erratumlist
;
17209 stm32l4xx_errnode
!= 0;
17210 stm32l4xx_errnode
= stm32l4xx_errnode
->next
)
17212 bfd_vma target
= stm32l4xx_errnode
->vma
- offset
;
17214 switch (stm32l4xx_errnode
->type
)
17216 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER
:
17219 bfd_vma branch_to_veneer
=
17220 stm32l4xx_errnode
->u
.b
.veneer
->vma
- stm32l4xx_errnode
->vma
;
17222 if ((signed) branch_to_veneer
< -(1 << 24)
17223 || (signed) branch_to_veneer
>= (1 << 24))
17225 bfd_vma out_of_range
=
17226 ((signed) branch_to_veneer
< -(1 << 24)) ?
17227 - branch_to_veneer
- (1 << 24) :
17228 ((signed) branch_to_veneer
>= (1 << 24)) ?
17229 branch_to_veneer
- (1 << 24) : 0;
17231 (*_bfd_error_handler
)
17232 (_("%B(%#x): error: Cannot create STM32L4XX veneer. "
17233 "Jump out of range by %ld bytes. "
17234 "Cannot encode branch instruction. "),
17236 (long) (stm32l4xx_errnode
->vma
- 4),
17241 insn
= create_instruction_branch_absolute
17242 (stm32l4xx_errnode
->u
.b
.veneer
->vma
- stm32l4xx_errnode
->vma
);
17244 /* The instruction is before the label. */
17247 put_thumb2_insn (globals
, output_bfd
,
17248 (bfd_vma
) insn
, contents
+ target
);
17252 case STM32L4XX_ERRATUM_VENEER
:
17255 bfd_byte
* veneer_r
;
17258 veneer
= contents
+ target
;
17260 + stm32l4xx_errnode
->u
.b
.veneer
->vma
17261 - stm32l4xx_errnode
->vma
- 4;
17263 if ((signed) (veneer_r
- veneer
-
17264 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE
>
17265 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
?
17266 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE
:
17267 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
) < -(1 << 24)
17268 || (signed) (veneer_r
- veneer
) >= (1 << 24))
17270 (*_bfd_error_handler
) (_("%B: error: Cannot create STM32L4XX "
17271 "veneer."), output_bfd
);
17275 /* Original instruction. */
17276 insn
= stm32l4xx_errnode
->u
.v
.branch
->u
.b
.insn
;
17278 stm32l4xx_create_replacing_stub
17279 (globals
, output_bfd
, insn
, (void*)veneer_r
, (void*)veneer
);
17289 if (arm_data
->elf
.this_hdr
.sh_type
== SHT_ARM_EXIDX
)
17291 arm_unwind_table_edit
*edit_node
17292 = arm_data
->u
.exidx
.unwind_edit_list
;
17293 /* Now, sec->size is the size of the section we will write. The original
17294 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
17295 markers) was sec->rawsize. (This isn't the case if we perform no
17296 edits, then rawsize will be zero and we should use size). */
17297 bfd_byte
*edited_contents
= (bfd_byte
*) bfd_malloc (sec
->size
);
17298 unsigned int input_size
= sec
->rawsize
? sec
->rawsize
: sec
->size
;
17299 unsigned int in_index
, out_index
;
17300 bfd_vma add_to_offsets
= 0;
17302 for (in_index
= 0, out_index
= 0; in_index
* 8 < input_size
|| edit_node
;)
17306 unsigned int edit_index
= edit_node
->index
;
17308 if (in_index
< edit_index
&& in_index
* 8 < input_size
)
17310 copy_exidx_entry (output_bfd
, edited_contents
+ out_index
* 8,
17311 contents
+ in_index
* 8, add_to_offsets
);
17315 else if (in_index
== edit_index
17316 || (in_index
* 8 >= input_size
17317 && edit_index
== UINT_MAX
))
17319 switch (edit_node
->type
)
17321 case DELETE_EXIDX_ENTRY
:
17323 add_to_offsets
+= 8;
17326 case INSERT_EXIDX_CANTUNWIND_AT_END
:
17328 asection
*text_sec
= edit_node
->linked_section
;
17329 bfd_vma text_offset
= text_sec
->output_section
->vma
17330 + text_sec
->output_offset
17332 bfd_vma exidx_offset
= offset
+ out_index
* 8;
17333 unsigned long prel31_offset
;
17335 /* Note: this is meant to be equivalent to an
17336 R_ARM_PREL31 relocation. These synthetic
17337 EXIDX_CANTUNWIND markers are not relocated by the
17338 usual BFD method. */
17339 prel31_offset
= (text_offset
- exidx_offset
)
17341 if (bfd_link_relocatable (link_info
))
17343 /* Here relocation for new EXIDX_CANTUNWIND is
17344 created, so there is no need to
17345 adjust offset by hand. */
17346 prel31_offset
= text_sec
->output_offset
17349 /* New relocation entity. */
17350 asection
*text_out
= text_sec
->output_section
;
17351 Elf_Internal_Rela rel
;
17353 rel
.r_offset
= exidx_offset
;
17354 rel
.r_info
= ELF32_R_INFO (text_out
->target_index
,
17357 elf32_arm_add_relocation (output_bfd
, link_info
,
17358 sec
->output_section
,
17362 /* First address we can't unwind. */
17363 bfd_put_32 (output_bfd
, prel31_offset
,
17364 &edited_contents
[out_index
* 8]);
17366 /* Code for EXIDX_CANTUNWIND. */
17367 bfd_put_32 (output_bfd
, 0x1,
17368 &edited_contents
[out_index
* 8 + 4]);
17371 add_to_offsets
-= 8;
17376 edit_node
= edit_node
->next
;
17381 /* No more edits, copy remaining entries verbatim. */
17382 copy_exidx_entry (output_bfd
, edited_contents
+ out_index
* 8,
17383 contents
+ in_index
* 8, add_to_offsets
);
17389 if (!(sec
->flags
& SEC_EXCLUDE
) && !(sec
->flags
& SEC_NEVER_LOAD
))
17390 bfd_set_section_contents (output_bfd
, sec
->output_section
,
17392 (file_ptr
) sec
->output_offset
, sec
->size
);
17397 /* Fix code to point to Cortex-A8 erratum stubs. */
17398 if (globals
->fix_cortex_a8
)
17400 struct a8_branch_to_stub_data data
;
17402 data
.writing_section
= sec
;
17403 data
.contents
= contents
;
17405 bfd_hash_traverse (& globals
->stub_hash_table
, make_branch_to_a8_stub
,
17412 if (globals
->byteswap_code
)
17414 qsort (map
, mapcount
, sizeof (* map
), elf32_arm_compare_mapping
);
17417 for (i
= 0; i
< mapcount
; i
++)
17419 if (i
== mapcount
- 1)
17422 end
= map
[i
+ 1].vma
;
17424 switch (map
[i
].type
)
17427 /* Byte swap code words. */
17428 while (ptr
+ 3 < end
)
17430 tmp
= contents
[ptr
];
17431 contents
[ptr
] = contents
[ptr
+ 3];
17432 contents
[ptr
+ 3] = tmp
;
17433 tmp
= contents
[ptr
+ 1];
17434 contents
[ptr
+ 1] = contents
[ptr
+ 2];
17435 contents
[ptr
+ 2] = tmp
;
17441 /* Byte swap code halfwords. */
17442 while (ptr
+ 1 < end
)
17444 tmp
= contents
[ptr
];
17445 contents
[ptr
] = contents
[ptr
+ 1];
17446 contents
[ptr
+ 1] = tmp
;
17452 /* Leave data alone. */
17460 arm_data
->mapcount
= -1;
17461 arm_data
->mapsize
= 0;
17462 arm_data
->map
= NULL
;
17467 /* Mangle thumb function symbols as we read them in. */
17470 elf32_arm_swap_symbol_in (bfd
* abfd
,
17473 Elf_Internal_Sym
*dst
)
17475 if (!bfd_elf32_swap_symbol_in (abfd
, psrc
, pshn
, dst
))
17478 /* New EABI objects mark thumb function symbols by setting the low bit of
17480 if (ELF_ST_TYPE (dst
->st_info
) == STT_FUNC
17481 || ELF_ST_TYPE (dst
->st_info
) == STT_GNU_IFUNC
)
17483 if (dst
->st_value
& 1)
17485 dst
->st_value
&= ~(bfd_vma
) 1;
17486 dst
->st_target_internal
= ST_BRANCH_TO_THUMB
;
17489 dst
->st_target_internal
= ST_BRANCH_TO_ARM
;
17491 else if (ELF_ST_TYPE (dst
->st_info
) == STT_ARM_TFUNC
)
17493 dst
->st_info
= ELF_ST_INFO (ELF_ST_BIND (dst
->st_info
), STT_FUNC
);
17494 dst
->st_target_internal
= ST_BRANCH_TO_THUMB
;
17496 else if (ELF_ST_TYPE (dst
->st_info
) == STT_SECTION
)
17497 dst
->st_target_internal
= ST_BRANCH_LONG
;
17499 dst
->st_target_internal
= ST_BRANCH_UNKNOWN
;
17505 /* Mangle thumb function symbols as we write them out. */
17508 elf32_arm_swap_symbol_out (bfd
*abfd
,
17509 const Elf_Internal_Sym
*src
,
17513 Elf_Internal_Sym newsym
;
17515 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
17516 of the address set, as per the new EABI. We do this unconditionally
17517 because objcopy does not set the elf header flags until after
17518 it writes out the symbol table. */
17519 if (src
->st_target_internal
== ST_BRANCH_TO_THUMB
)
17522 if (ELF_ST_TYPE (src
->st_info
) != STT_GNU_IFUNC
)
17523 newsym
.st_info
= ELF_ST_INFO (ELF_ST_BIND (src
->st_info
), STT_FUNC
);
17524 if (newsym
.st_shndx
!= SHN_UNDEF
)
17526 /* Do this only for defined symbols. At link type, the static
17527 linker will simulate the work of dynamic linker of resolving
17528 symbols and will carry over the thumbness of found symbols to
17529 the output symbol table. It's not clear how it happens, but
17530 the thumbness of undefined symbols can well be different at
17531 runtime, and writing '1' for them will be confusing for users
17532 and possibly for dynamic linker itself.
17534 newsym
.st_value
|= 1;
17539 bfd_elf32_swap_symbol_out (abfd
, src
, cdst
, shndx
);
17542 /* Add the PT_ARM_EXIDX program header. */
17545 elf32_arm_modify_segment_map (bfd
*abfd
,
17546 struct bfd_link_info
*info ATTRIBUTE_UNUSED
)
17548 struct elf_segment_map
*m
;
17551 sec
= bfd_get_section_by_name (abfd
, ".ARM.exidx");
17552 if (sec
!= NULL
&& (sec
->flags
& SEC_LOAD
) != 0)
17554 /* If there is already a PT_ARM_EXIDX header, then we do not
17555 want to add another one. This situation arises when running
17556 "strip"; the input binary already has the header. */
17557 m
= elf_seg_map (abfd
);
17558 while (m
&& m
->p_type
!= PT_ARM_EXIDX
)
17562 m
= (struct elf_segment_map
*)
17563 bfd_zalloc (abfd
, sizeof (struct elf_segment_map
));
17566 m
->p_type
= PT_ARM_EXIDX
;
17568 m
->sections
[0] = sec
;
17570 m
->next
= elf_seg_map (abfd
);
17571 elf_seg_map (abfd
) = m
;
17578 /* We may add a PT_ARM_EXIDX program header. */
17581 elf32_arm_additional_program_headers (bfd
*abfd
,
17582 struct bfd_link_info
*info ATTRIBUTE_UNUSED
)
17586 sec
= bfd_get_section_by_name (abfd
, ".ARM.exidx");
17587 if (sec
!= NULL
&& (sec
->flags
& SEC_LOAD
) != 0)
17593 /* Hook called by the linker routine which adds symbols from an object
17597 elf32_arm_add_symbol_hook (bfd
*abfd
, struct bfd_link_info
*info
,
17598 Elf_Internal_Sym
*sym
, const char **namep
,
17599 flagword
*flagsp
, asection
**secp
, bfd_vma
*valp
)
17601 if ((ELF_ST_TYPE (sym
->st_info
) == STT_GNU_IFUNC
17602 || ELF_ST_BIND (sym
->st_info
) == STB_GNU_UNIQUE
)
17603 && (abfd
->flags
& DYNAMIC
) == 0
17604 && bfd_get_flavour (info
->output_bfd
) == bfd_target_elf_flavour
)
17605 elf_tdata (info
->output_bfd
)->has_gnu_symbols
= elf_gnu_symbol_any
;
17607 if (elf32_arm_hash_table (info
) == NULL
)
17610 if (elf32_arm_hash_table (info
)->vxworks_p
17611 && !elf_vxworks_add_symbol_hook (abfd
, info
, sym
, namep
,
17612 flagsp
, secp
, valp
))
17618 /* We use this to override swap_symbol_in and swap_symbol_out. */
17619 const struct elf_size_info elf32_arm_size_info
=
17621 sizeof (Elf32_External_Ehdr
),
17622 sizeof (Elf32_External_Phdr
),
17623 sizeof (Elf32_External_Shdr
),
17624 sizeof (Elf32_External_Rel
),
17625 sizeof (Elf32_External_Rela
),
17626 sizeof (Elf32_External_Sym
),
17627 sizeof (Elf32_External_Dyn
),
17628 sizeof (Elf_External_Note
),
17632 ELFCLASS32
, EV_CURRENT
,
17633 bfd_elf32_write_out_phdrs
,
17634 bfd_elf32_write_shdrs_and_ehdr
,
17635 bfd_elf32_checksum_contents
,
17636 bfd_elf32_write_relocs
,
17637 elf32_arm_swap_symbol_in
,
17638 elf32_arm_swap_symbol_out
,
17639 bfd_elf32_slurp_reloc_table
,
17640 bfd_elf32_slurp_symbol_table
,
17641 bfd_elf32_swap_dyn_in
,
17642 bfd_elf32_swap_dyn_out
,
17643 bfd_elf32_swap_reloc_in
,
17644 bfd_elf32_swap_reloc_out
,
17645 bfd_elf32_swap_reloca_in
,
17646 bfd_elf32_swap_reloca_out
17650 read_code32 (const bfd
*abfd
, const bfd_byte
*addr
)
17652 /* V7 BE8 code is always little endian. */
17653 if ((elf_elfheader (abfd
)->e_flags
& EF_ARM_BE8
) != 0)
17654 return bfd_getl32 (addr
);
17656 return bfd_get_32 (abfd
, addr
);
17660 read_code16 (const bfd
*abfd
, const bfd_byte
*addr
)
17662 /* V7 BE8 code is always little endian. */
17663 if ((elf_elfheader (abfd
)->e_flags
& EF_ARM_BE8
) != 0)
17664 return bfd_getl16 (addr
);
17666 return bfd_get_16 (abfd
, addr
);
17669 /* Return size of plt0 entry starting at ADDR
17670 or (bfd_vma) -1 if size can not be determined. */
17673 elf32_arm_plt0_size (const bfd
*abfd
, const bfd_byte
*addr
)
17675 bfd_vma first_word
;
17678 first_word
= read_code32 (abfd
, addr
);
17680 if (first_word
== elf32_arm_plt0_entry
[0])
17681 plt0_size
= 4 * ARRAY_SIZE (elf32_arm_plt0_entry
);
17682 else if (first_word
== elf32_thumb2_plt0_entry
[0])
17683 plt0_size
= 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry
);
17685 /* We don't yet handle this PLT format. */
17686 return (bfd_vma
) -1;
17691 /* Return size of plt entry starting at offset OFFSET
17692 of plt section located at address START
17693 or (bfd_vma) -1 if size can not be determined. */
17696 elf32_arm_plt_size (const bfd
*abfd
, const bfd_byte
*start
, bfd_vma offset
)
17698 bfd_vma first_insn
;
17699 bfd_vma plt_size
= 0;
17700 const bfd_byte
*addr
= start
+ offset
;
17702 /* PLT entry size if fixed on Thumb-only platforms. */
17703 if (read_code32 (abfd
, start
) == elf32_thumb2_plt0_entry
[0])
17704 return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry
);
17706 /* Respect Thumb stub if necessary. */
17707 if (read_code16 (abfd
, addr
) == elf32_arm_plt_thumb_stub
[0])
17709 plt_size
+= 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub
);
17712 /* Strip immediate from first add. */
17713 first_insn
= read_code32 (abfd
, addr
+ plt_size
) & 0xffffff00;
17715 #ifdef FOUR_WORD_PLT
17716 if (first_insn
== elf32_arm_plt_entry
[0])
17717 plt_size
+= 4 * ARRAY_SIZE (elf32_arm_plt_entry
);
17719 if (first_insn
== elf32_arm_plt_entry_long
[0])
17720 plt_size
+= 4 * ARRAY_SIZE (elf32_arm_plt_entry_long
);
17721 else if (first_insn
== elf32_arm_plt_entry_short
[0])
17722 plt_size
+= 4 * ARRAY_SIZE (elf32_arm_plt_entry_short
);
17725 /* We don't yet handle this PLT format. */
17726 return (bfd_vma
) -1;
17731 /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */
17734 elf32_arm_get_synthetic_symtab (bfd
*abfd
,
17735 long symcount ATTRIBUTE_UNUSED
,
17736 asymbol
**syms ATTRIBUTE_UNUSED
,
17746 Elf_Internal_Shdr
*hdr
;
17754 if ((abfd
->flags
& (DYNAMIC
| EXEC_P
)) == 0)
17757 if (dynsymcount
<= 0)
17760 relplt
= bfd_get_section_by_name (abfd
, ".rel.plt");
17761 if (relplt
== NULL
)
17764 hdr
= &elf_section_data (relplt
)->this_hdr
;
17765 if (hdr
->sh_link
!= elf_dynsymtab (abfd
)
17766 || (hdr
->sh_type
!= SHT_REL
&& hdr
->sh_type
!= SHT_RELA
))
17769 plt
= bfd_get_section_by_name (abfd
, ".plt");
17773 if (!elf32_arm_size_info
.slurp_reloc_table (abfd
, relplt
, dynsyms
, TRUE
))
17776 data
= plt
->contents
;
17779 if (!bfd_get_full_section_contents(abfd
, (asection
*) plt
, &data
) || data
== NULL
)
17781 bfd_cache_section_contents((asection
*) plt
, data
);
17784 count
= relplt
->size
/ hdr
->sh_entsize
;
17785 size
= count
* sizeof (asymbol
);
17786 p
= relplt
->relocation
;
17787 for (i
= 0; i
< count
; i
++, p
+= elf32_arm_size_info
.int_rels_per_ext_rel
)
17789 size
+= strlen ((*p
->sym_ptr_ptr
)->name
) + sizeof ("@plt");
17790 if (p
->addend
!= 0)
17791 size
+= sizeof ("+0x") - 1 + 8;
17794 s
= *ret
= (asymbol
*) bfd_malloc (size
);
17798 offset
= elf32_arm_plt0_size (abfd
, data
);
17799 if (offset
== (bfd_vma
) -1)
17802 names
= (char *) (s
+ count
);
17803 p
= relplt
->relocation
;
17805 for (i
= 0; i
< count
; i
++, p
+= elf32_arm_size_info
.int_rels_per_ext_rel
)
17809 bfd_vma plt_size
= elf32_arm_plt_size (abfd
, data
, offset
);
17810 if (plt_size
== (bfd_vma
) -1)
17813 *s
= **p
->sym_ptr_ptr
;
17814 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
17815 we are defining a symbol, ensure one of them is set. */
17816 if ((s
->flags
& BSF_LOCAL
) == 0)
17817 s
->flags
|= BSF_GLOBAL
;
17818 s
->flags
|= BSF_SYNTHETIC
;
17823 len
= strlen ((*p
->sym_ptr_ptr
)->name
);
17824 memcpy (names
, (*p
->sym_ptr_ptr
)->name
, len
);
17826 if (p
->addend
!= 0)
17830 memcpy (names
, "+0x", sizeof ("+0x") - 1);
17831 names
+= sizeof ("+0x") - 1;
17832 bfd_sprintf_vma (abfd
, buf
, p
->addend
);
17833 for (a
= buf
; *a
== '0'; ++a
)
17836 memcpy (names
, a
, len
);
17839 memcpy (names
, "@plt", sizeof ("@plt"));
17840 names
+= sizeof ("@plt");
17842 offset
+= plt_size
;
17849 elf32_arm_section_flags (flagword
*flags
, const Elf_Internal_Shdr
* hdr
)
17851 if (hdr
->sh_flags
& SHF_ARM_NOREAD
)
17852 *flags
|= SEC_ELF_NOREAD
;
17857 elf32_arm_lookup_section_flags (char *flag_name
)
17859 if (!strcmp (flag_name
, "SHF_ARM_NOREAD"))
17860 return SHF_ARM_NOREAD
;
17862 return SEC_NO_FLAGS
;
17865 static unsigned int
17866 elf32_arm_count_additional_relocs (asection
*sec
)
17868 struct _arm_elf_section_data
*arm_data
;
17869 arm_data
= get_arm_elf_section_data (sec
);
17870 return arm_data
->additional_reloc_count
;
17873 #define ELF_ARCH bfd_arch_arm
17874 #define ELF_TARGET_ID ARM_ELF_DATA
17875 #define ELF_MACHINE_CODE EM_ARM
17876 #ifdef __QNXTARGET__
17877 #define ELF_MAXPAGESIZE 0x1000
17879 #define ELF_MAXPAGESIZE 0x10000
17881 #define ELF_MINPAGESIZE 0x1000
17882 #define ELF_COMMONPAGESIZE 0x1000
17884 #define bfd_elf32_mkobject elf32_arm_mkobject
17886 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
17887 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
17888 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
17889 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
17890 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
17891 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
17892 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
17893 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
17894 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
17895 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
17896 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
17897 #define bfd_elf32_bfd_final_link elf32_arm_final_link
17898 #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab
17900 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
17901 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
17902 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
17903 #define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
17904 #define elf_backend_check_relocs elf32_arm_check_relocs
17905 #define elf_backend_relocate_section elf32_arm_relocate_section
17906 #define elf_backend_write_section elf32_arm_write_section
17907 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
17908 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
17909 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
17910 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
17911 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
17912 #define elf_backend_always_size_sections elf32_arm_always_size_sections
17913 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
17914 #define elf_backend_post_process_headers elf32_arm_post_process_headers
17915 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
17916 #define elf_backend_object_p elf32_arm_object_p
17917 #define elf_backend_fake_sections elf32_arm_fake_sections
17918 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
17919 #define elf_backend_final_write_processing elf32_arm_final_write_processing
17920 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
17921 #define elf_backend_size_info elf32_arm_size_info
17922 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
17923 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
17924 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
17925 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
17926 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
17927 #define elf_backend_count_additional_relocs elf32_arm_count_additional_relocs
17929 #define elf_backend_can_refcount 1
17930 #define elf_backend_can_gc_sections 1
17931 #define elf_backend_plt_readonly 1
17932 #define elf_backend_want_got_plt 1
17933 #define elf_backend_want_plt_sym 0
17934 #define elf_backend_may_use_rel_p 1
17935 #define elf_backend_may_use_rela_p 0
17936 #define elf_backend_default_use_rela_p 0
17938 #define elf_backend_got_header_size 12
17939 #define elf_backend_extern_protected_data 1
17941 #undef elf_backend_obj_attrs_vendor
17942 #define elf_backend_obj_attrs_vendor "aeabi"
17943 #undef elf_backend_obj_attrs_section
17944 #define elf_backend_obj_attrs_section ".ARM.attributes"
17945 #undef elf_backend_obj_attrs_arg_type
17946 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
17947 #undef elf_backend_obj_attrs_section_type
17948 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
17949 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
17950 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
17952 #undef elf_backend_section_flags
17953 #define elf_backend_section_flags elf32_arm_section_flags
17954 #undef elf_backend_lookup_section_flags_hook
17955 #define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags
17957 #include "elf32-target.h"
17959 /* Native Client targets. */
17961 #undef TARGET_LITTLE_SYM
17962 #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec
17963 #undef TARGET_LITTLE_NAME
17964 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
17965 #undef TARGET_BIG_SYM
17966 #define TARGET_BIG_SYM arm_elf32_nacl_be_vec
17967 #undef TARGET_BIG_NAME
17968 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
17970 /* Like elf32_arm_link_hash_table_create -- but overrides
17971 appropriately for NaCl. */
17973 static struct bfd_link_hash_table
*
17974 elf32_arm_nacl_link_hash_table_create (bfd
*abfd
)
17976 struct bfd_link_hash_table
*ret
;
17978 ret
= elf32_arm_link_hash_table_create (abfd
);
17981 struct elf32_arm_link_hash_table
*htab
17982 = (struct elf32_arm_link_hash_table
*) ret
;
17986 htab
->plt_header_size
= 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry
);
17987 htab
->plt_entry_size
= 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry
);
17992 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
17993 really need to use elf32_arm_modify_segment_map. But we do it
17994 anyway just to reduce gratuitous differences with the stock ARM backend. */
17997 elf32_arm_nacl_modify_segment_map (bfd
*abfd
, struct bfd_link_info
*info
)
17999 return (elf32_arm_modify_segment_map (abfd
, info
)
18000 && nacl_modify_segment_map (abfd
, info
));
18004 elf32_arm_nacl_final_write_processing (bfd
*abfd
, bfd_boolean linker
)
18006 elf32_arm_final_write_processing (abfd
, linker
);
18007 nacl_final_write_processing (abfd
, linker
);
18011 elf32_arm_nacl_plt_sym_val (bfd_vma i
, const asection
*plt
,
18012 const arelent
*rel ATTRIBUTE_UNUSED
)
18015 + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry
) +
18016 i
* ARRAY_SIZE (elf32_arm_nacl_plt_entry
));
18020 #define elf32_bed elf32_arm_nacl_bed
18021 #undef bfd_elf32_bfd_link_hash_table_create
18022 #define bfd_elf32_bfd_link_hash_table_create \
18023 elf32_arm_nacl_link_hash_table_create
18024 #undef elf_backend_plt_alignment
18025 #define elf_backend_plt_alignment 4
18026 #undef elf_backend_modify_segment_map
18027 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
18028 #undef elf_backend_modify_program_headers
18029 #define elf_backend_modify_program_headers nacl_modify_program_headers
18030 #undef elf_backend_final_write_processing
18031 #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
18032 #undef bfd_elf32_get_synthetic_symtab
18033 #undef elf_backend_plt_sym_val
18034 #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
18036 #undef ELF_MINPAGESIZE
18037 #undef ELF_COMMONPAGESIZE
18040 #include "elf32-target.h"
18042 /* Reset to defaults. */
18043 #undef elf_backend_plt_alignment
18044 #undef elf_backend_modify_segment_map
18045 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
18046 #undef elf_backend_modify_program_headers
18047 #undef elf_backend_final_write_processing
18048 #define elf_backend_final_write_processing elf32_arm_final_write_processing
18049 #undef ELF_MINPAGESIZE
18050 #define ELF_MINPAGESIZE 0x1000
18051 #undef ELF_COMMONPAGESIZE
18052 #define ELF_COMMONPAGESIZE 0x1000
18055 /* VxWorks Targets. */
18057 #undef TARGET_LITTLE_SYM
18058 #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec
18059 #undef TARGET_LITTLE_NAME
18060 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
18061 #undef TARGET_BIG_SYM
18062 #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec
18063 #undef TARGET_BIG_NAME
18064 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
18066 /* Like elf32_arm_link_hash_table_create -- but overrides
18067 appropriately for VxWorks. */
18069 static struct bfd_link_hash_table
*
18070 elf32_arm_vxworks_link_hash_table_create (bfd
*abfd
)
18072 struct bfd_link_hash_table
*ret
;
18074 ret
= elf32_arm_link_hash_table_create (abfd
);
18077 struct elf32_arm_link_hash_table
*htab
18078 = (struct elf32_arm_link_hash_table
*) ret
;
18080 htab
->vxworks_p
= 1;
18086 elf32_arm_vxworks_final_write_processing (bfd
*abfd
, bfd_boolean linker
)
18088 elf32_arm_final_write_processing (abfd
, linker
);
18089 elf_vxworks_final_write_processing (abfd
, linker
);
18093 #define elf32_bed elf32_arm_vxworks_bed
18095 #undef bfd_elf32_bfd_link_hash_table_create
18096 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
18097 #undef elf_backend_final_write_processing
18098 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
18099 #undef elf_backend_emit_relocs
18100 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
18102 #undef elf_backend_may_use_rel_p
18103 #define elf_backend_may_use_rel_p 0
18104 #undef elf_backend_may_use_rela_p
18105 #define elf_backend_may_use_rela_p 1
18106 #undef elf_backend_default_use_rela_p
18107 #define elf_backend_default_use_rela_p 1
18108 #undef elf_backend_want_plt_sym
18109 #define elf_backend_want_plt_sym 1
18110 #undef ELF_MAXPAGESIZE
18111 #define ELF_MAXPAGESIZE 0x1000
18113 #include "elf32-target.h"
18116 /* Merge backend specific data from an object file to the output
18117 object file when linking. */
18120 elf32_arm_merge_private_bfd_data (bfd
* ibfd
, bfd
* obfd
)
18122 flagword out_flags
;
18124 bfd_boolean flags_compatible
= TRUE
;
18127 /* Check if we have the same endianness. */
18128 if (! _bfd_generic_verify_endian_match (ibfd
, obfd
))
18131 if (! is_arm_elf (ibfd
) || ! is_arm_elf (obfd
))
18134 if (!elf32_arm_merge_eabi_attributes (ibfd
, obfd
))
18137 /* The input BFD must have had its flags initialised. */
18138 /* The following seems bogus to me -- The flags are initialized in
18139 the assembler but I don't think an elf_flags_init field is
18140 written into the object. */
18141 /* BFD_ASSERT (elf_flags_init (ibfd)); */
18143 in_flags
= elf_elfheader (ibfd
)->e_flags
;
18144 out_flags
= elf_elfheader (obfd
)->e_flags
;
18146 /* In theory there is no reason why we couldn't handle this. However
18147 in practice it isn't even close to working and there is no real
18148 reason to want it. */
18149 if (EF_ARM_EABI_VERSION (in_flags
) >= EF_ARM_EABI_VER4
18150 && !(ibfd
->flags
& DYNAMIC
)
18151 && (in_flags
& EF_ARM_BE8
))
18153 _bfd_error_handler (_("error: %B is already in final BE8 format"),
18158 if (!elf_flags_init (obfd
))
18160 /* If the input is the default architecture and had the default
18161 flags then do not bother setting the flags for the output
18162 architecture, instead allow future merges to do this. If no
18163 future merges ever set these flags then they will retain their
18164 uninitialised values, which surprise surprise, correspond
18165 to the default values. */
18166 if (bfd_get_arch_info (ibfd
)->the_default
18167 && elf_elfheader (ibfd
)->e_flags
== 0)
18170 elf_flags_init (obfd
) = TRUE
;
18171 elf_elfheader (obfd
)->e_flags
= in_flags
;
18173 if (bfd_get_arch (obfd
) == bfd_get_arch (ibfd
)
18174 && bfd_get_arch_info (obfd
)->the_default
)
18175 return bfd_set_arch_mach (obfd
, bfd_get_arch (ibfd
), bfd_get_mach (ibfd
));
18180 /* Determine what should happen if the input ARM architecture
18181 does not match the output ARM architecture. */
18182 if (! bfd_arm_merge_machines (ibfd
, obfd
))
18185 /* Identical flags must be compatible. */
18186 if (in_flags
== out_flags
)
18189 /* Check to see if the input BFD actually contains any sections. If
18190 not, its flags may not have been initialised either, but it
18191 cannot actually cause any incompatiblity. Do not short-circuit
18192 dynamic objects; their section list may be emptied by
18193 elf_link_add_object_symbols.
18195 Also check to see if there are no code sections in the input.
18196 In this case there is no need to check for code specific flags.
18197 XXX - do we need to worry about floating-point format compatability
18198 in data sections ? */
18199 if (!(ibfd
->flags
& DYNAMIC
))
18201 bfd_boolean null_input_bfd
= TRUE
;
18202 bfd_boolean only_data_sections
= TRUE
;
18204 for (sec
= ibfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
18206 /* Ignore synthetic glue sections. */
18207 if (strcmp (sec
->name
, ".glue_7")
18208 && strcmp (sec
->name
, ".glue_7t"))
18210 if ((bfd_get_section_flags (ibfd
, sec
)
18211 & (SEC_LOAD
| SEC_CODE
| SEC_HAS_CONTENTS
))
18212 == (SEC_LOAD
| SEC_CODE
| SEC_HAS_CONTENTS
))
18213 only_data_sections
= FALSE
;
18215 null_input_bfd
= FALSE
;
18220 if (null_input_bfd
|| only_data_sections
)
18224 /* Complain about various flag mismatches. */
18225 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags
),
18226 EF_ARM_EABI_VERSION (out_flags
)))
18229 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
18231 (in_flags
& EF_ARM_EABIMASK
) >> 24,
18232 (out_flags
& EF_ARM_EABIMASK
) >> 24);
18236 /* Not sure what needs to be checked for EABI versions >= 1. */
18237 /* VxWorks libraries do not use these flags. */
18238 if (get_elf_backend_data (obfd
) != &elf32_arm_vxworks_bed
18239 && get_elf_backend_data (ibfd
) != &elf32_arm_vxworks_bed
18240 && EF_ARM_EABI_VERSION (in_flags
) == EF_ARM_EABI_UNKNOWN
)
18242 if ((in_flags
& EF_ARM_APCS_26
) != (out_flags
& EF_ARM_APCS_26
))
18245 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
18247 in_flags
& EF_ARM_APCS_26
? 26 : 32,
18248 out_flags
& EF_ARM_APCS_26
? 26 : 32);
18249 flags_compatible
= FALSE
;
18252 if ((in_flags
& EF_ARM_APCS_FLOAT
) != (out_flags
& EF_ARM_APCS_FLOAT
))
18254 if (in_flags
& EF_ARM_APCS_FLOAT
)
18256 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
18260 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
18263 flags_compatible
= FALSE
;
18266 if ((in_flags
& EF_ARM_VFP_FLOAT
) != (out_flags
& EF_ARM_VFP_FLOAT
))
18268 if (in_flags
& EF_ARM_VFP_FLOAT
)
18270 (_("error: %B uses VFP instructions, whereas %B does not"),
18274 (_("error: %B uses FPA instructions, whereas %B does not"),
18277 flags_compatible
= FALSE
;
18280 if ((in_flags
& EF_ARM_MAVERICK_FLOAT
) != (out_flags
& EF_ARM_MAVERICK_FLOAT
))
18282 if (in_flags
& EF_ARM_MAVERICK_FLOAT
)
18284 (_("error: %B uses Maverick instructions, whereas %B does not"),
18288 (_("error: %B does not use Maverick instructions, whereas %B does"),
18291 flags_compatible
= FALSE
;
18294 #ifdef EF_ARM_SOFT_FLOAT
18295 if ((in_flags
& EF_ARM_SOFT_FLOAT
) != (out_flags
& EF_ARM_SOFT_FLOAT
))
18297 /* We can allow interworking between code that is VFP format
18298 layout, and uses either soft float or integer regs for
18299 passing floating point arguments and results. We already
18300 know that the APCS_FLOAT flags match; similarly for VFP
18302 if ((in_flags
& EF_ARM_APCS_FLOAT
) != 0
18303 || (in_flags
& EF_ARM_VFP_FLOAT
) == 0)
18305 if (in_flags
& EF_ARM_SOFT_FLOAT
)
18307 (_("error: %B uses software FP, whereas %B uses hardware FP"),
18311 (_("error: %B uses hardware FP, whereas %B uses software FP"),
18314 flags_compatible
= FALSE
;
18319 /* Interworking mismatch is only a warning. */
18320 if ((in_flags
& EF_ARM_INTERWORK
) != (out_flags
& EF_ARM_INTERWORK
))
18322 if (in_flags
& EF_ARM_INTERWORK
)
18325 (_("Warning: %B supports interworking, whereas %B does not"),
18331 (_("Warning: %B does not support interworking, whereas %B does"),
18337 return flags_compatible
;
18341 /* Symbian OS Targets. */
18343 #undef TARGET_LITTLE_SYM
18344 #define TARGET_LITTLE_SYM arm_elf32_symbian_le_vec
18345 #undef TARGET_LITTLE_NAME
18346 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
18347 #undef TARGET_BIG_SYM
18348 #define TARGET_BIG_SYM arm_elf32_symbian_be_vec
18349 #undef TARGET_BIG_NAME
18350 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
18352 /* Like elf32_arm_link_hash_table_create -- but overrides
18353 appropriately for Symbian OS. */
18355 static struct bfd_link_hash_table
*
18356 elf32_arm_symbian_link_hash_table_create (bfd
*abfd
)
18358 struct bfd_link_hash_table
*ret
;
18360 ret
= elf32_arm_link_hash_table_create (abfd
);
18363 struct elf32_arm_link_hash_table
*htab
18364 = (struct elf32_arm_link_hash_table
*)ret
;
18365 /* There is no PLT header for Symbian OS. */
18366 htab
->plt_header_size
= 0;
18367 /* The PLT entries are each one instruction and one word. */
18368 htab
->plt_entry_size
= 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry
);
18369 htab
->symbian_p
= 1;
18370 /* Symbian uses armv5t or above, so use_blx is always true. */
18372 htab
->root
.is_relocatable_executable
= 1;
18377 static const struct bfd_elf_special_section
18378 elf32_arm_symbian_special_sections
[] =
18380 /* In a BPABI executable, the dynamic linking sections do not go in
18381 the loadable read-only segment. The post-linker may wish to
18382 refer to these sections, but they are not part of the final
18384 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC
, 0 },
18385 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB
, 0 },
18386 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM
, 0 },
18387 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS
, 0 },
18388 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH
, 0 },
18389 /* These sections do not need to be writable as the SymbianOS
18390 postlinker will arrange things so that no dynamic relocation is
18392 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY
, SHF_ALLOC
},
18393 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY
, SHF_ALLOC
},
18394 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY
, SHF_ALLOC
},
18395 { NULL
, 0, 0, 0, 0 }
18399 elf32_arm_symbian_begin_write_processing (bfd
*abfd
,
18400 struct bfd_link_info
*link_info
)
18402 /* BPABI objects are never loaded directly by an OS kernel; they are
18403 processed by a postlinker first, into an OS-specific format. If
18404 the D_PAGED bit is set on the file, BFD will align segments on
18405 page boundaries, so that an OS can directly map the file. With
18406 BPABI objects, that just results in wasted space. In addition,
18407 because we clear the D_PAGED bit, map_sections_to_segments will
18408 recognize that the program headers should not be mapped into any
18409 loadable segment. */
18410 abfd
->flags
&= ~D_PAGED
;
18411 elf32_arm_begin_write_processing (abfd
, link_info
);
18415 elf32_arm_symbian_modify_segment_map (bfd
*abfd
,
18416 struct bfd_link_info
*info
)
18418 struct elf_segment_map
*m
;
18421 /* BPABI shared libraries and executables should have a PT_DYNAMIC
18422 segment. However, because the .dynamic section is not marked
18423 with SEC_LOAD, the generic ELF code will not create such a
18425 dynsec
= bfd_get_section_by_name (abfd
, ".dynamic");
18428 for (m
= elf_seg_map (abfd
); m
!= NULL
; m
= m
->next
)
18429 if (m
->p_type
== PT_DYNAMIC
)
18434 m
= _bfd_elf_make_dynamic_segment (abfd
, dynsec
);
18435 m
->next
= elf_seg_map (abfd
);
18436 elf_seg_map (abfd
) = m
;
18440 /* Also call the generic arm routine. */
18441 return elf32_arm_modify_segment_map (abfd
, info
);
18444 /* Return address for Ith PLT stub in section PLT, for relocation REL
18445 or (bfd_vma) -1 if it should not be included. */
18448 elf32_arm_symbian_plt_sym_val (bfd_vma i
, const asection
*plt
,
18449 const arelent
*rel ATTRIBUTE_UNUSED
)
18451 return plt
->vma
+ 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry
) * i
;
18456 #define elf32_bed elf32_arm_symbian_bed
18458 /* The dynamic sections are not allocated on SymbianOS; the postlinker
18459 will process them and then discard them. */
18460 #undef ELF_DYNAMIC_SEC_FLAGS
18461 #define ELF_DYNAMIC_SEC_FLAGS \
18462 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
18464 #undef elf_backend_emit_relocs
18466 #undef bfd_elf32_bfd_link_hash_table_create
18467 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
18468 #undef elf_backend_special_sections
18469 #define elf_backend_special_sections elf32_arm_symbian_special_sections
18470 #undef elf_backend_begin_write_processing
18471 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
18472 #undef elf_backend_final_write_processing
18473 #define elf_backend_final_write_processing elf32_arm_final_write_processing
18475 #undef elf_backend_modify_segment_map
18476 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
18478 /* There is no .got section for BPABI objects, and hence no header. */
18479 #undef elf_backend_got_header_size
18480 #define elf_backend_got_header_size 0
18482 /* Similarly, there is no .got.plt section. */
18483 #undef elf_backend_want_got_plt
18484 #define elf_backend_want_got_plt 0
18486 #undef elf_backend_plt_sym_val
18487 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
18489 #undef elf_backend_may_use_rel_p
18490 #define elf_backend_may_use_rel_p 1
18491 #undef elf_backend_may_use_rela_p
18492 #define elf_backend_may_use_rela_p 0
18493 #undef elf_backend_default_use_rela_p
18494 #define elf_backend_default_use_rela_p 0
18495 #undef elf_backend_want_plt_sym
18496 #define elf_backend_want_plt_sym 0
18497 #undef ELF_MAXPAGESIZE
18498 #define ELF_MAXPAGESIZE 0x8000
18500 #include "elf32-target.h"