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[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
1 /* 32-bit ELF support for ARM
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
3 2008, 2009, 2010, 2011, 2012 Free Software Foundation, Inc.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
21
22 #include "sysdep.h"
23 #include <limits.h>
24
25 #include "bfd.h"
26 #include "libiberty.h"
27 #include "libbfd.h"
28 #include "elf-bfd.h"
29 #include "elf-nacl.h"
30 #include "elf-vxworks.h"
31 #include "elf/arm.h"
32
33 /* Return the relocation section associated with NAME. HTAB is the
34 bfd's elf32_arm_link_hash_entry. */
35 #define RELOC_SECTION(HTAB, NAME) \
36 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
37
38 /* Return size of a relocation entry. HTAB is the bfd's
39 elf32_arm_link_hash_entry. */
40 #define RELOC_SIZE(HTAB) \
41 ((HTAB)->use_rel \
42 ? sizeof (Elf32_External_Rel) \
43 : sizeof (Elf32_External_Rela))
44
45 /* Return function to swap relocations in. HTAB is the bfd's
46 elf32_arm_link_hash_entry. */
47 #define SWAP_RELOC_IN(HTAB) \
48 ((HTAB)->use_rel \
49 ? bfd_elf32_swap_reloc_in \
50 : bfd_elf32_swap_reloca_in)
51
52 /* Return function to swap relocations out. HTAB is the bfd's
53 elf32_arm_link_hash_entry. */
54 #define SWAP_RELOC_OUT(HTAB) \
55 ((HTAB)->use_rel \
56 ? bfd_elf32_swap_reloc_out \
57 : bfd_elf32_swap_reloca_out)
58
59 #define elf_info_to_howto 0
60 #define elf_info_to_howto_rel elf32_arm_info_to_howto
61
62 #define ARM_ELF_ABI_VERSION 0
63 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
64
65 static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
66 struct bfd_link_info *link_info,
67 asection *sec,
68 bfd_byte *contents);
69
70 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
71 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
72 in that slot. */
73
74 static reloc_howto_type elf32_arm_howto_table_1[] =
75 {
76 /* No relocation. */
77 HOWTO (R_ARM_NONE, /* type */
78 0, /* rightshift */
79 0, /* size (0 = byte, 1 = short, 2 = long) */
80 0, /* bitsize */
81 FALSE, /* pc_relative */
82 0, /* bitpos */
83 complain_overflow_dont,/* complain_on_overflow */
84 bfd_elf_generic_reloc, /* special_function */
85 "R_ARM_NONE", /* name */
86 FALSE, /* partial_inplace */
87 0, /* src_mask */
88 0, /* dst_mask */
89 FALSE), /* pcrel_offset */
90
91 HOWTO (R_ARM_PC24, /* type */
92 2, /* rightshift */
93 2, /* size (0 = byte, 1 = short, 2 = long) */
94 24, /* bitsize */
95 TRUE, /* pc_relative */
96 0, /* bitpos */
97 complain_overflow_signed,/* complain_on_overflow */
98 bfd_elf_generic_reloc, /* special_function */
99 "R_ARM_PC24", /* name */
100 FALSE, /* partial_inplace */
101 0x00ffffff, /* src_mask */
102 0x00ffffff, /* dst_mask */
103 TRUE), /* pcrel_offset */
104
105 /* 32 bit absolute */
106 HOWTO (R_ARM_ABS32, /* type */
107 0, /* rightshift */
108 2, /* size (0 = byte, 1 = short, 2 = long) */
109 32, /* bitsize */
110 FALSE, /* pc_relative */
111 0, /* bitpos */
112 complain_overflow_bitfield,/* complain_on_overflow */
113 bfd_elf_generic_reloc, /* special_function */
114 "R_ARM_ABS32", /* name */
115 FALSE, /* partial_inplace */
116 0xffffffff, /* src_mask */
117 0xffffffff, /* dst_mask */
118 FALSE), /* pcrel_offset */
119
120 /* standard 32bit pc-relative reloc */
121 HOWTO (R_ARM_REL32, /* type */
122 0, /* rightshift */
123 2, /* size (0 = byte, 1 = short, 2 = long) */
124 32, /* bitsize */
125 TRUE, /* pc_relative */
126 0, /* bitpos */
127 complain_overflow_bitfield,/* complain_on_overflow */
128 bfd_elf_generic_reloc, /* special_function */
129 "R_ARM_REL32", /* name */
130 FALSE, /* partial_inplace */
131 0xffffffff, /* src_mask */
132 0xffffffff, /* dst_mask */
133 TRUE), /* pcrel_offset */
134
135 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
136 HOWTO (R_ARM_LDR_PC_G0, /* type */
137 0, /* rightshift */
138 0, /* size (0 = byte, 1 = short, 2 = long) */
139 32, /* bitsize */
140 TRUE, /* pc_relative */
141 0, /* bitpos */
142 complain_overflow_dont,/* complain_on_overflow */
143 bfd_elf_generic_reloc, /* special_function */
144 "R_ARM_LDR_PC_G0", /* name */
145 FALSE, /* partial_inplace */
146 0xffffffff, /* src_mask */
147 0xffffffff, /* dst_mask */
148 TRUE), /* pcrel_offset */
149
150 /* 16 bit absolute */
151 HOWTO (R_ARM_ABS16, /* type */
152 0, /* rightshift */
153 1, /* size (0 = byte, 1 = short, 2 = long) */
154 16, /* bitsize */
155 FALSE, /* pc_relative */
156 0, /* bitpos */
157 complain_overflow_bitfield,/* complain_on_overflow */
158 bfd_elf_generic_reloc, /* special_function */
159 "R_ARM_ABS16", /* name */
160 FALSE, /* partial_inplace */
161 0x0000ffff, /* src_mask */
162 0x0000ffff, /* dst_mask */
163 FALSE), /* pcrel_offset */
164
165 /* 12 bit absolute */
166 HOWTO (R_ARM_ABS12, /* type */
167 0, /* rightshift */
168 2, /* size (0 = byte, 1 = short, 2 = long) */
169 12, /* bitsize */
170 FALSE, /* pc_relative */
171 0, /* bitpos */
172 complain_overflow_bitfield,/* complain_on_overflow */
173 bfd_elf_generic_reloc, /* special_function */
174 "R_ARM_ABS12", /* name */
175 FALSE, /* partial_inplace */
176 0x00000fff, /* src_mask */
177 0x00000fff, /* dst_mask */
178 FALSE), /* pcrel_offset */
179
180 HOWTO (R_ARM_THM_ABS5, /* type */
181 6, /* rightshift */
182 1, /* size (0 = byte, 1 = short, 2 = long) */
183 5, /* bitsize */
184 FALSE, /* pc_relative */
185 0, /* bitpos */
186 complain_overflow_bitfield,/* complain_on_overflow */
187 bfd_elf_generic_reloc, /* special_function */
188 "R_ARM_THM_ABS5", /* name */
189 FALSE, /* partial_inplace */
190 0x000007e0, /* src_mask */
191 0x000007e0, /* dst_mask */
192 FALSE), /* pcrel_offset */
193
194 /* 8 bit absolute */
195 HOWTO (R_ARM_ABS8, /* type */
196 0, /* rightshift */
197 0, /* size (0 = byte, 1 = short, 2 = long) */
198 8, /* bitsize */
199 FALSE, /* pc_relative */
200 0, /* bitpos */
201 complain_overflow_bitfield,/* complain_on_overflow */
202 bfd_elf_generic_reloc, /* special_function */
203 "R_ARM_ABS8", /* name */
204 FALSE, /* partial_inplace */
205 0x000000ff, /* src_mask */
206 0x000000ff, /* dst_mask */
207 FALSE), /* pcrel_offset */
208
209 HOWTO (R_ARM_SBREL32, /* type */
210 0, /* rightshift */
211 2, /* size (0 = byte, 1 = short, 2 = long) */
212 32, /* bitsize */
213 FALSE, /* pc_relative */
214 0, /* bitpos */
215 complain_overflow_dont,/* complain_on_overflow */
216 bfd_elf_generic_reloc, /* special_function */
217 "R_ARM_SBREL32", /* name */
218 FALSE, /* partial_inplace */
219 0xffffffff, /* src_mask */
220 0xffffffff, /* dst_mask */
221 FALSE), /* pcrel_offset */
222
223 HOWTO (R_ARM_THM_CALL, /* type */
224 1, /* rightshift */
225 2, /* size (0 = byte, 1 = short, 2 = long) */
226 24, /* bitsize */
227 TRUE, /* pc_relative */
228 0, /* bitpos */
229 complain_overflow_signed,/* complain_on_overflow */
230 bfd_elf_generic_reloc, /* special_function */
231 "R_ARM_THM_CALL", /* name */
232 FALSE, /* partial_inplace */
233 0x07ff2fff, /* src_mask */
234 0x07ff2fff, /* dst_mask */
235 TRUE), /* pcrel_offset */
236
237 HOWTO (R_ARM_THM_PC8, /* type */
238 1, /* rightshift */
239 1, /* size (0 = byte, 1 = short, 2 = long) */
240 8, /* bitsize */
241 TRUE, /* pc_relative */
242 0, /* bitpos */
243 complain_overflow_signed,/* complain_on_overflow */
244 bfd_elf_generic_reloc, /* special_function */
245 "R_ARM_THM_PC8", /* name */
246 FALSE, /* partial_inplace */
247 0x000000ff, /* src_mask */
248 0x000000ff, /* dst_mask */
249 TRUE), /* pcrel_offset */
250
251 HOWTO (R_ARM_BREL_ADJ, /* type */
252 1, /* rightshift */
253 1, /* size (0 = byte, 1 = short, 2 = long) */
254 32, /* bitsize */
255 FALSE, /* pc_relative */
256 0, /* bitpos */
257 complain_overflow_signed,/* complain_on_overflow */
258 bfd_elf_generic_reloc, /* special_function */
259 "R_ARM_BREL_ADJ", /* name */
260 FALSE, /* partial_inplace */
261 0xffffffff, /* src_mask */
262 0xffffffff, /* dst_mask */
263 FALSE), /* pcrel_offset */
264
265 HOWTO (R_ARM_TLS_DESC, /* type */
266 0, /* rightshift */
267 2, /* size (0 = byte, 1 = short, 2 = long) */
268 32, /* bitsize */
269 FALSE, /* pc_relative */
270 0, /* bitpos */
271 complain_overflow_bitfield,/* complain_on_overflow */
272 bfd_elf_generic_reloc, /* special_function */
273 "R_ARM_TLS_DESC", /* name */
274 FALSE, /* partial_inplace */
275 0xffffffff, /* src_mask */
276 0xffffffff, /* dst_mask */
277 FALSE), /* pcrel_offset */
278
279 HOWTO (R_ARM_THM_SWI8, /* type */
280 0, /* rightshift */
281 0, /* size (0 = byte, 1 = short, 2 = long) */
282 0, /* bitsize */
283 FALSE, /* pc_relative */
284 0, /* bitpos */
285 complain_overflow_signed,/* complain_on_overflow */
286 bfd_elf_generic_reloc, /* special_function */
287 "R_ARM_SWI8", /* name */
288 FALSE, /* partial_inplace */
289 0x00000000, /* src_mask */
290 0x00000000, /* dst_mask */
291 FALSE), /* pcrel_offset */
292
293 /* BLX instruction for the ARM. */
294 HOWTO (R_ARM_XPC25, /* type */
295 2, /* rightshift */
296 2, /* size (0 = byte, 1 = short, 2 = long) */
297 24, /* bitsize */
298 TRUE, /* pc_relative */
299 0, /* bitpos */
300 complain_overflow_signed,/* complain_on_overflow */
301 bfd_elf_generic_reloc, /* special_function */
302 "R_ARM_XPC25", /* name */
303 FALSE, /* partial_inplace */
304 0x00ffffff, /* src_mask */
305 0x00ffffff, /* dst_mask */
306 TRUE), /* pcrel_offset */
307
308 /* BLX instruction for the Thumb. */
309 HOWTO (R_ARM_THM_XPC22, /* type */
310 2, /* rightshift */
311 2, /* size (0 = byte, 1 = short, 2 = long) */
312 24, /* bitsize */
313 TRUE, /* pc_relative */
314 0, /* bitpos */
315 complain_overflow_signed,/* complain_on_overflow */
316 bfd_elf_generic_reloc, /* special_function */
317 "R_ARM_THM_XPC22", /* name */
318 FALSE, /* partial_inplace */
319 0x07ff2fff, /* src_mask */
320 0x07ff2fff, /* dst_mask */
321 TRUE), /* pcrel_offset */
322
323 /* Dynamic TLS relocations. */
324
325 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
326 0, /* rightshift */
327 2, /* size (0 = byte, 1 = short, 2 = long) */
328 32, /* bitsize */
329 FALSE, /* pc_relative */
330 0, /* bitpos */
331 complain_overflow_bitfield,/* complain_on_overflow */
332 bfd_elf_generic_reloc, /* special_function */
333 "R_ARM_TLS_DTPMOD32", /* name */
334 TRUE, /* partial_inplace */
335 0xffffffff, /* src_mask */
336 0xffffffff, /* dst_mask */
337 FALSE), /* pcrel_offset */
338
339 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
340 0, /* rightshift */
341 2, /* size (0 = byte, 1 = short, 2 = long) */
342 32, /* bitsize */
343 FALSE, /* pc_relative */
344 0, /* bitpos */
345 complain_overflow_bitfield,/* complain_on_overflow */
346 bfd_elf_generic_reloc, /* special_function */
347 "R_ARM_TLS_DTPOFF32", /* name */
348 TRUE, /* partial_inplace */
349 0xffffffff, /* src_mask */
350 0xffffffff, /* dst_mask */
351 FALSE), /* pcrel_offset */
352
353 HOWTO (R_ARM_TLS_TPOFF32, /* type */
354 0, /* rightshift */
355 2, /* size (0 = byte, 1 = short, 2 = long) */
356 32, /* bitsize */
357 FALSE, /* pc_relative */
358 0, /* bitpos */
359 complain_overflow_bitfield,/* complain_on_overflow */
360 bfd_elf_generic_reloc, /* special_function */
361 "R_ARM_TLS_TPOFF32", /* name */
362 TRUE, /* partial_inplace */
363 0xffffffff, /* src_mask */
364 0xffffffff, /* dst_mask */
365 FALSE), /* pcrel_offset */
366
367 /* Relocs used in ARM Linux */
368
369 HOWTO (R_ARM_COPY, /* type */
370 0, /* rightshift */
371 2, /* size (0 = byte, 1 = short, 2 = long) */
372 32, /* bitsize */
373 FALSE, /* pc_relative */
374 0, /* bitpos */
375 complain_overflow_bitfield,/* complain_on_overflow */
376 bfd_elf_generic_reloc, /* special_function */
377 "R_ARM_COPY", /* name */
378 TRUE, /* partial_inplace */
379 0xffffffff, /* src_mask */
380 0xffffffff, /* dst_mask */
381 FALSE), /* pcrel_offset */
382
383 HOWTO (R_ARM_GLOB_DAT, /* type */
384 0, /* rightshift */
385 2, /* size (0 = byte, 1 = short, 2 = long) */
386 32, /* bitsize */
387 FALSE, /* pc_relative */
388 0, /* bitpos */
389 complain_overflow_bitfield,/* complain_on_overflow */
390 bfd_elf_generic_reloc, /* special_function */
391 "R_ARM_GLOB_DAT", /* name */
392 TRUE, /* partial_inplace */
393 0xffffffff, /* src_mask */
394 0xffffffff, /* dst_mask */
395 FALSE), /* pcrel_offset */
396
397 HOWTO (R_ARM_JUMP_SLOT, /* type */
398 0, /* rightshift */
399 2, /* size (0 = byte, 1 = short, 2 = long) */
400 32, /* bitsize */
401 FALSE, /* pc_relative */
402 0, /* bitpos */
403 complain_overflow_bitfield,/* complain_on_overflow */
404 bfd_elf_generic_reloc, /* special_function */
405 "R_ARM_JUMP_SLOT", /* name */
406 TRUE, /* partial_inplace */
407 0xffffffff, /* src_mask */
408 0xffffffff, /* dst_mask */
409 FALSE), /* pcrel_offset */
410
411 HOWTO (R_ARM_RELATIVE, /* type */
412 0, /* rightshift */
413 2, /* size (0 = byte, 1 = short, 2 = long) */
414 32, /* bitsize */
415 FALSE, /* pc_relative */
416 0, /* bitpos */
417 complain_overflow_bitfield,/* complain_on_overflow */
418 bfd_elf_generic_reloc, /* special_function */
419 "R_ARM_RELATIVE", /* name */
420 TRUE, /* partial_inplace */
421 0xffffffff, /* src_mask */
422 0xffffffff, /* dst_mask */
423 FALSE), /* pcrel_offset */
424
425 HOWTO (R_ARM_GOTOFF32, /* type */
426 0, /* rightshift */
427 2, /* size (0 = byte, 1 = short, 2 = long) */
428 32, /* bitsize */
429 FALSE, /* pc_relative */
430 0, /* bitpos */
431 complain_overflow_bitfield,/* complain_on_overflow */
432 bfd_elf_generic_reloc, /* special_function */
433 "R_ARM_GOTOFF32", /* name */
434 TRUE, /* partial_inplace */
435 0xffffffff, /* src_mask */
436 0xffffffff, /* dst_mask */
437 FALSE), /* pcrel_offset */
438
439 HOWTO (R_ARM_GOTPC, /* type */
440 0, /* rightshift */
441 2, /* size (0 = byte, 1 = short, 2 = long) */
442 32, /* bitsize */
443 TRUE, /* pc_relative */
444 0, /* bitpos */
445 complain_overflow_bitfield,/* complain_on_overflow */
446 bfd_elf_generic_reloc, /* special_function */
447 "R_ARM_GOTPC", /* name */
448 TRUE, /* partial_inplace */
449 0xffffffff, /* src_mask */
450 0xffffffff, /* dst_mask */
451 TRUE), /* pcrel_offset */
452
453 HOWTO (R_ARM_GOT32, /* type */
454 0, /* rightshift */
455 2, /* size (0 = byte, 1 = short, 2 = long) */
456 32, /* bitsize */
457 FALSE, /* pc_relative */
458 0, /* bitpos */
459 complain_overflow_bitfield,/* complain_on_overflow */
460 bfd_elf_generic_reloc, /* special_function */
461 "R_ARM_GOT32", /* name */
462 TRUE, /* partial_inplace */
463 0xffffffff, /* src_mask */
464 0xffffffff, /* dst_mask */
465 FALSE), /* pcrel_offset */
466
467 HOWTO (R_ARM_PLT32, /* type */
468 2, /* rightshift */
469 2, /* size (0 = byte, 1 = short, 2 = long) */
470 24, /* bitsize */
471 TRUE, /* pc_relative */
472 0, /* bitpos */
473 complain_overflow_bitfield,/* complain_on_overflow */
474 bfd_elf_generic_reloc, /* special_function */
475 "R_ARM_PLT32", /* name */
476 FALSE, /* partial_inplace */
477 0x00ffffff, /* src_mask */
478 0x00ffffff, /* dst_mask */
479 TRUE), /* pcrel_offset */
480
481 HOWTO (R_ARM_CALL, /* type */
482 2, /* rightshift */
483 2, /* size (0 = byte, 1 = short, 2 = long) */
484 24, /* bitsize */
485 TRUE, /* pc_relative */
486 0, /* bitpos */
487 complain_overflow_signed,/* complain_on_overflow */
488 bfd_elf_generic_reloc, /* special_function */
489 "R_ARM_CALL", /* name */
490 FALSE, /* partial_inplace */
491 0x00ffffff, /* src_mask */
492 0x00ffffff, /* dst_mask */
493 TRUE), /* pcrel_offset */
494
495 HOWTO (R_ARM_JUMP24, /* type */
496 2, /* rightshift */
497 2, /* size (0 = byte, 1 = short, 2 = long) */
498 24, /* bitsize */
499 TRUE, /* pc_relative */
500 0, /* bitpos */
501 complain_overflow_signed,/* complain_on_overflow */
502 bfd_elf_generic_reloc, /* special_function */
503 "R_ARM_JUMP24", /* name */
504 FALSE, /* partial_inplace */
505 0x00ffffff, /* src_mask */
506 0x00ffffff, /* dst_mask */
507 TRUE), /* pcrel_offset */
508
509 HOWTO (R_ARM_THM_JUMP24, /* type */
510 1, /* rightshift */
511 2, /* size (0 = byte, 1 = short, 2 = long) */
512 24, /* bitsize */
513 TRUE, /* pc_relative */
514 0, /* bitpos */
515 complain_overflow_signed,/* complain_on_overflow */
516 bfd_elf_generic_reloc, /* special_function */
517 "R_ARM_THM_JUMP24", /* name */
518 FALSE, /* partial_inplace */
519 0x07ff2fff, /* src_mask */
520 0x07ff2fff, /* dst_mask */
521 TRUE), /* pcrel_offset */
522
523 HOWTO (R_ARM_BASE_ABS, /* type */
524 0, /* rightshift */
525 2, /* size (0 = byte, 1 = short, 2 = long) */
526 32, /* bitsize */
527 FALSE, /* pc_relative */
528 0, /* bitpos */
529 complain_overflow_dont,/* complain_on_overflow */
530 bfd_elf_generic_reloc, /* special_function */
531 "R_ARM_BASE_ABS", /* name */
532 FALSE, /* partial_inplace */
533 0xffffffff, /* src_mask */
534 0xffffffff, /* dst_mask */
535 FALSE), /* pcrel_offset */
536
537 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
538 0, /* rightshift */
539 2, /* size (0 = byte, 1 = short, 2 = long) */
540 12, /* bitsize */
541 TRUE, /* pc_relative */
542 0, /* bitpos */
543 complain_overflow_dont,/* complain_on_overflow */
544 bfd_elf_generic_reloc, /* special_function */
545 "R_ARM_ALU_PCREL_7_0", /* name */
546 FALSE, /* partial_inplace */
547 0x00000fff, /* src_mask */
548 0x00000fff, /* dst_mask */
549 TRUE), /* pcrel_offset */
550
551 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
552 0, /* rightshift */
553 2, /* size (0 = byte, 1 = short, 2 = long) */
554 12, /* bitsize */
555 TRUE, /* pc_relative */
556 8, /* bitpos */
557 complain_overflow_dont,/* complain_on_overflow */
558 bfd_elf_generic_reloc, /* special_function */
559 "R_ARM_ALU_PCREL_15_8",/* name */
560 FALSE, /* partial_inplace */
561 0x00000fff, /* src_mask */
562 0x00000fff, /* dst_mask */
563 TRUE), /* pcrel_offset */
564
565 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
566 0, /* rightshift */
567 2, /* size (0 = byte, 1 = short, 2 = long) */
568 12, /* bitsize */
569 TRUE, /* pc_relative */
570 16, /* bitpos */
571 complain_overflow_dont,/* complain_on_overflow */
572 bfd_elf_generic_reloc, /* special_function */
573 "R_ARM_ALU_PCREL_23_15",/* name */
574 FALSE, /* partial_inplace */
575 0x00000fff, /* src_mask */
576 0x00000fff, /* dst_mask */
577 TRUE), /* pcrel_offset */
578
579 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
580 0, /* rightshift */
581 2, /* size (0 = byte, 1 = short, 2 = long) */
582 12, /* bitsize */
583 FALSE, /* pc_relative */
584 0, /* bitpos */
585 complain_overflow_dont,/* complain_on_overflow */
586 bfd_elf_generic_reloc, /* special_function */
587 "R_ARM_LDR_SBREL_11_0",/* name */
588 FALSE, /* partial_inplace */
589 0x00000fff, /* src_mask */
590 0x00000fff, /* dst_mask */
591 FALSE), /* pcrel_offset */
592
593 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
594 0, /* rightshift */
595 2, /* size (0 = byte, 1 = short, 2 = long) */
596 8, /* bitsize */
597 FALSE, /* pc_relative */
598 12, /* bitpos */
599 complain_overflow_dont,/* complain_on_overflow */
600 bfd_elf_generic_reloc, /* special_function */
601 "R_ARM_ALU_SBREL_19_12",/* name */
602 FALSE, /* partial_inplace */
603 0x000ff000, /* src_mask */
604 0x000ff000, /* dst_mask */
605 FALSE), /* pcrel_offset */
606
607 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
608 0, /* rightshift */
609 2, /* size (0 = byte, 1 = short, 2 = long) */
610 8, /* bitsize */
611 FALSE, /* pc_relative */
612 20, /* bitpos */
613 complain_overflow_dont,/* complain_on_overflow */
614 bfd_elf_generic_reloc, /* special_function */
615 "R_ARM_ALU_SBREL_27_20",/* name */
616 FALSE, /* partial_inplace */
617 0x0ff00000, /* src_mask */
618 0x0ff00000, /* dst_mask */
619 FALSE), /* pcrel_offset */
620
621 HOWTO (R_ARM_TARGET1, /* type */
622 0, /* rightshift */
623 2, /* size (0 = byte, 1 = short, 2 = long) */
624 32, /* bitsize */
625 FALSE, /* pc_relative */
626 0, /* bitpos */
627 complain_overflow_dont,/* complain_on_overflow */
628 bfd_elf_generic_reloc, /* special_function */
629 "R_ARM_TARGET1", /* name */
630 FALSE, /* partial_inplace */
631 0xffffffff, /* src_mask */
632 0xffffffff, /* dst_mask */
633 FALSE), /* pcrel_offset */
634
635 HOWTO (R_ARM_ROSEGREL32, /* type */
636 0, /* rightshift */
637 2, /* size (0 = byte, 1 = short, 2 = long) */
638 32, /* bitsize */
639 FALSE, /* pc_relative */
640 0, /* bitpos */
641 complain_overflow_dont,/* complain_on_overflow */
642 bfd_elf_generic_reloc, /* special_function */
643 "R_ARM_ROSEGREL32", /* name */
644 FALSE, /* partial_inplace */
645 0xffffffff, /* src_mask */
646 0xffffffff, /* dst_mask */
647 FALSE), /* pcrel_offset */
648
649 HOWTO (R_ARM_V4BX, /* type */
650 0, /* rightshift */
651 2, /* size (0 = byte, 1 = short, 2 = long) */
652 32, /* bitsize */
653 FALSE, /* pc_relative */
654 0, /* bitpos */
655 complain_overflow_dont,/* complain_on_overflow */
656 bfd_elf_generic_reloc, /* special_function */
657 "R_ARM_V4BX", /* name */
658 FALSE, /* partial_inplace */
659 0xffffffff, /* src_mask */
660 0xffffffff, /* dst_mask */
661 FALSE), /* pcrel_offset */
662
663 HOWTO (R_ARM_TARGET2, /* type */
664 0, /* rightshift */
665 2, /* size (0 = byte, 1 = short, 2 = long) */
666 32, /* bitsize */
667 FALSE, /* pc_relative */
668 0, /* bitpos */
669 complain_overflow_signed,/* complain_on_overflow */
670 bfd_elf_generic_reloc, /* special_function */
671 "R_ARM_TARGET2", /* name */
672 FALSE, /* partial_inplace */
673 0xffffffff, /* src_mask */
674 0xffffffff, /* dst_mask */
675 TRUE), /* pcrel_offset */
676
677 HOWTO (R_ARM_PREL31, /* type */
678 0, /* rightshift */
679 2, /* size (0 = byte, 1 = short, 2 = long) */
680 31, /* bitsize */
681 TRUE, /* pc_relative */
682 0, /* bitpos */
683 complain_overflow_signed,/* complain_on_overflow */
684 bfd_elf_generic_reloc, /* special_function */
685 "R_ARM_PREL31", /* name */
686 FALSE, /* partial_inplace */
687 0x7fffffff, /* src_mask */
688 0x7fffffff, /* dst_mask */
689 TRUE), /* pcrel_offset */
690
691 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
692 0, /* rightshift */
693 2, /* size (0 = byte, 1 = short, 2 = long) */
694 16, /* bitsize */
695 FALSE, /* pc_relative */
696 0, /* bitpos */
697 complain_overflow_dont,/* complain_on_overflow */
698 bfd_elf_generic_reloc, /* special_function */
699 "R_ARM_MOVW_ABS_NC", /* name */
700 FALSE, /* partial_inplace */
701 0x000f0fff, /* src_mask */
702 0x000f0fff, /* dst_mask */
703 FALSE), /* pcrel_offset */
704
705 HOWTO (R_ARM_MOVT_ABS, /* type */
706 0, /* rightshift */
707 2, /* size (0 = byte, 1 = short, 2 = long) */
708 16, /* bitsize */
709 FALSE, /* pc_relative */
710 0, /* bitpos */
711 complain_overflow_bitfield,/* complain_on_overflow */
712 bfd_elf_generic_reloc, /* special_function */
713 "R_ARM_MOVT_ABS", /* name */
714 FALSE, /* partial_inplace */
715 0x000f0fff, /* src_mask */
716 0x000f0fff, /* dst_mask */
717 FALSE), /* pcrel_offset */
718
719 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
720 0, /* rightshift */
721 2, /* size (0 = byte, 1 = short, 2 = long) */
722 16, /* bitsize */
723 TRUE, /* pc_relative */
724 0, /* bitpos */
725 complain_overflow_dont,/* complain_on_overflow */
726 bfd_elf_generic_reloc, /* special_function */
727 "R_ARM_MOVW_PREL_NC", /* name */
728 FALSE, /* partial_inplace */
729 0x000f0fff, /* src_mask */
730 0x000f0fff, /* dst_mask */
731 TRUE), /* pcrel_offset */
732
733 HOWTO (R_ARM_MOVT_PREL, /* type */
734 0, /* rightshift */
735 2, /* size (0 = byte, 1 = short, 2 = long) */
736 16, /* bitsize */
737 TRUE, /* pc_relative */
738 0, /* bitpos */
739 complain_overflow_bitfield,/* complain_on_overflow */
740 bfd_elf_generic_reloc, /* special_function */
741 "R_ARM_MOVT_PREL", /* name */
742 FALSE, /* partial_inplace */
743 0x000f0fff, /* src_mask */
744 0x000f0fff, /* dst_mask */
745 TRUE), /* pcrel_offset */
746
747 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
748 0, /* rightshift */
749 2, /* size (0 = byte, 1 = short, 2 = long) */
750 16, /* bitsize */
751 FALSE, /* pc_relative */
752 0, /* bitpos */
753 complain_overflow_dont,/* complain_on_overflow */
754 bfd_elf_generic_reloc, /* special_function */
755 "R_ARM_THM_MOVW_ABS_NC",/* name */
756 FALSE, /* partial_inplace */
757 0x040f70ff, /* src_mask */
758 0x040f70ff, /* dst_mask */
759 FALSE), /* pcrel_offset */
760
761 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
762 0, /* rightshift */
763 2, /* size (0 = byte, 1 = short, 2 = long) */
764 16, /* bitsize */
765 FALSE, /* pc_relative */
766 0, /* bitpos */
767 complain_overflow_bitfield,/* complain_on_overflow */
768 bfd_elf_generic_reloc, /* special_function */
769 "R_ARM_THM_MOVT_ABS", /* name */
770 FALSE, /* partial_inplace */
771 0x040f70ff, /* src_mask */
772 0x040f70ff, /* dst_mask */
773 FALSE), /* pcrel_offset */
774
775 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
776 0, /* rightshift */
777 2, /* size (0 = byte, 1 = short, 2 = long) */
778 16, /* bitsize */
779 TRUE, /* pc_relative */
780 0, /* bitpos */
781 complain_overflow_dont,/* complain_on_overflow */
782 bfd_elf_generic_reloc, /* special_function */
783 "R_ARM_THM_MOVW_PREL_NC",/* name */
784 FALSE, /* partial_inplace */
785 0x040f70ff, /* src_mask */
786 0x040f70ff, /* dst_mask */
787 TRUE), /* pcrel_offset */
788
789 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
790 0, /* rightshift */
791 2, /* size (0 = byte, 1 = short, 2 = long) */
792 16, /* bitsize */
793 TRUE, /* pc_relative */
794 0, /* bitpos */
795 complain_overflow_bitfield,/* complain_on_overflow */
796 bfd_elf_generic_reloc, /* special_function */
797 "R_ARM_THM_MOVT_PREL", /* name */
798 FALSE, /* partial_inplace */
799 0x040f70ff, /* src_mask */
800 0x040f70ff, /* dst_mask */
801 TRUE), /* pcrel_offset */
802
803 HOWTO (R_ARM_THM_JUMP19, /* type */
804 1, /* rightshift */
805 2, /* size (0 = byte, 1 = short, 2 = long) */
806 19, /* bitsize */
807 TRUE, /* pc_relative */
808 0, /* bitpos */
809 complain_overflow_signed,/* complain_on_overflow */
810 bfd_elf_generic_reloc, /* special_function */
811 "R_ARM_THM_JUMP19", /* name */
812 FALSE, /* partial_inplace */
813 0x043f2fff, /* src_mask */
814 0x043f2fff, /* dst_mask */
815 TRUE), /* pcrel_offset */
816
817 HOWTO (R_ARM_THM_JUMP6, /* type */
818 1, /* rightshift */
819 1, /* size (0 = byte, 1 = short, 2 = long) */
820 6, /* bitsize */
821 TRUE, /* pc_relative */
822 0, /* bitpos */
823 complain_overflow_unsigned,/* complain_on_overflow */
824 bfd_elf_generic_reloc, /* special_function */
825 "R_ARM_THM_JUMP6", /* name */
826 FALSE, /* partial_inplace */
827 0x02f8, /* src_mask */
828 0x02f8, /* dst_mask */
829 TRUE), /* pcrel_offset */
830
831 /* These are declared as 13-bit signed relocations because we can
832 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
833 versa. */
834 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
835 0, /* rightshift */
836 2, /* size (0 = byte, 1 = short, 2 = long) */
837 13, /* bitsize */
838 TRUE, /* pc_relative */
839 0, /* bitpos */
840 complain_overflow_dont,/* complain_on_overflow */
841 bfd_elf_generic_reloc, /* special_function */
842 "R_ARM_THM_ALU_PREL_11_0",/* name */
843 FALSE, /* partial_inplace */
844 0xffffffff, /* src_mask */
845 0xffffffff, /* dst_mask */
846 TRUE), /* pcrel_offset */
847
848 HOWTO (R_ARM_THM_PC12, /* type */
849 0, /* rightshift */
850 2, /* size (0 = byte, 1 = short, 2 = long) */
851 13, /* bitsize */
852 TRUE, /* pc_relative */
853 0, /* bitpos */
854 complain_overflow_dont,/* complain_on_overflow */
855 bfd_elf_generic_reloc, /* special_function */
856 "R_ARM_THM_PC12", /* name */
857 FALSE, /* partial_inplace */
858 0xffffffff, /* src_mask */
859 0xffffffff, /* dst_mask */
860 TRUE), /* pcrel_offset */
861
862 HOWTO (R_ARM_ABS32_NOI, /* type */
863 0, /* rightshift */
864 2, /* size (0 = byte, 1 = short, 2 = long) */
865 32, /* bitsize */
866 FALSE, /* pc_relative */
867 0, /* bitpos */
868 complain_overflow_dont,/* complain_on_overflow */
869 bfd_elf_generic_reloc, /* special_function */
870 "R_ARM_ABS32_NOI", /* name */
871 FALSE, /* partial_inplace */
872 0xffffffff, /* src_mask */
873 0xffffffff, /* dst_mask */
874 FALSE), /* pcrel_offset */
875
876 HOWTO (R_ARM_REL32_NOI, /* type */
877 0, /* rightshift */
878 2, /* size (0 = byte, 1 = short, 2 = long) */
879 32, /* bitsize */
880 TRUE, /* pc_relative */
881 0, /* bitpos */
882 complain_overflow_dont,/* complain_on_overflow */
883 bfd_elf_generic_reloc, /* special_function */
884 "R_ARM_REL32_NOI", /* name */
885 FALSE, /* partial_inplace */
886 0xffffffff, /* src_mask */
887 0xffffffff, /* dst_mask */
888 FALSE), /* pcrel_offset */
889
890 /* Group relocations. */
891
892 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
893 0, /* rightshift */
894 2, /* size (0 = byte, 1 = short, 2 = long) */
895 32, /* bitsize */
896 TRUE, /* pc_relative */
897 0, /* bitpos */
898 complain_overflow_dont,/* complain_on_overflow */
899 bfd_elf_generic_reloc, /* special_function */
900 "R_ARM_ALU_PC_G0_NC", /* name */
901 FALSE, /* partial_inplace */
902 0xffffffff, /* src_mask */
903 0xffffffff, /* dst_mask */
904 TRUE), /* pcrel_offset */
905
906 HOWTO (R_ARM_ALU_PC_G0, /* type */
907 0, /* rightshift */
908 2, /* size (0 = byte, 1 = short, 2 = long) */
909 32, /* bitsize */
910 TRUE, /* pc_relative */
911 0, /* bitpos */
912 complain_overflow_dont,/* complain_on_overflow */
913 bfd_elf_generic_reloc, /* special_function */
914 "R_ARM_ALU_PC_G0", /* name */
915 FALSE, /* partial_inplace */
916 0xffffffff, /* src_mask */
917 0xffffffff, /* dst_mask */
918 TRUE), /* pcrel_offset */
919
920 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
921 0, /* rightshift */
922 2, /* size (0 = byte, 1 = short, 2 = long) */
923 32, /* bitsize */
924 TRUE, /* pc_relative */
925 0, /* bitpos */
926 complain_overflow_dont,/* complain_on_overflow */
927 bfd_elf_generic_reloc, /* special_function */
928 "R_ARM_ALU_PC_G1_NC", /* name */
929 FALSE, /* partial_inplace */
930 0xffffffff, /* src_mask */
931 0xffffffff, /* dst_mask */
932 TRUE), /* pcrel_offset */
933
934 HOWTO (R_ARM_ALU_PC_G1, /* type */
935 0, /* rightshift */
936 2, /* size (0 = byte, 1 = short, 2 = long) */
937 32, /* bitsize */
938 TRUE, /* pc_relative */
939 0, /* bitpos */
940 complain_overflow_dont,/* complain_on_overflow */
941 bfd_elf_generic_reloc, /* special_function */
942 "R_ARM_ALU_PC_G1", /* name */
943 FALSE, /* partial_inplace */
944 0xffffffff, /* src_mask */
945 0xffffffff, /* dst_mask */
946 TRUE), /* pcrel_offset */
947
948 HOWTO (R_ARM_ALU_PC_G2, /* type */
949 0, /* rightshift */
950 2, /* size (0 = byte, 1 = short, 2 = long) */
951 32, /* bitsize */
952 TRUE, /* pc_relative */
953 0, /* bitpos */
954 complain_overflow_dont,/* complain_on_overflow */
955 bfd_elf_generic_reloc, /* special_function */
956 "R_ARM_ALU_PC_G2", /* name */
957 FALSE, /* partial_inplace */
958 0xffffffff, /* src_mask */
959 0xffffffff, /* dst_mask */
960 TRUE), /* pcrel_offset */
961
962 HOWTO (R_ARM_LDR_PC_G1, /* type */
963 0, /* rightshift */
964 2, /* size (0 = byte, 1 = short, 2 = long) */
965 32, /* bitsize */
966 TRUE, /* pc_relative */
967 0, /* bitpos */
968 complain_overflow_dont,/* complain_on_overflow */
969 bfd_elf_generic_reloc, /* special_function */
970 "R_ARM_LDR_PC_G1", /* name */
971 FALSE, /* partial_inplace */
972 0xffffffff, /* src_mask */
973 0xffffffff, /* dst_mask */
974 TRUE), /* pcrel_offset */
975
976 HOWTO (R_ARM_LDR_PC_G2, /* type */
977 0, /* rightshift */
978 2, /* size (0 = byte, 1 = short, 2 = long) */
979 32, /* bitsize */
980 TRUE, /* pc_relative */
981 0, /* bitpos */
982 complain_overflow_dont,/* complain_on_overflow */
983 bfd_elf_generic_reloc, /* special_function */
984 "R_ARM_LDR_PC_G2", /* name */
985 FALSE, /* partial_inplace */
986 0xffffffff, /* src_mask */
987 0xffffffff, /* dst_mask */
988 TRUE), /* pcrel_offset */
989
990 HOWTO (R_ARM_LDRS_PC_G0, /* type */
991 0, /* rightshift */
992 2, /* size (0 = byte, 1 = short, 2 = long) */
993 32, /* bitsize */
994 TRUE, /* pc_relative */
995 0, /* bitpos */
996 complain_overflow_dont,/* complain_on_overflow */
997 bfd_elf_generic_reloc, /* special_function */
998 "R_ARM_LDRS_PC_G0", /* name */
999 FALSE, /* partial_inplace */
1000 0xffffffff, /* src_mask */
1001 0xffffffff, /* dst_mask */
1002 TRUE), /* pcrel_offset */
1003
1004 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1005 0, /* rightshift */
1006 2, /* size (0 = byte, 1 = short, 2 = long) */
1007 32, /* bitsize */
1008 TRUE, /* pc_relative */
1009 0, /* bitpos */
1010 complain_overflow_dont,/* complain_on_overflow */
1011 bfd_elf_generic_reloc, /* special_function */
1012 "R_ARM_LDRS_PC_G1", /* name */
1013 FALSE, /* partial_inplace */
1014 0xffffffff, /* src_mask */
1015 0xffffffff, /* dst_mask */
1016 TRUE), /* pcrel_offset */
1017
1018 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1019 0, /* rightshift */
1020 2, /* size (0 = byte, 1 = short, 2 = long) */
1021 32, /* bitsize */
1022 TRUE, /* pc_relative */
1023 0, /* bitpos */
1024 complain_overflow_dont,/* complain_on_overflow */
1025 bfd_elf_generic_reloc, /* special_function */
1026 "R_ARM_LDRS_PC_G2", /* name */
1027 FALSE, /* partial_inplace */
1028 0xffffffff, /* src_mask */
1029 0xffffffff, /* dst_mask */
1030 TRUE), /* pcrel_offset */
1031
1032 HOWTO (R_ARM_LDC_PC_G0, /* type */
1033 0, /* rightshift */
1034 2, /* size (0 = byte, 1 = short, 2 = long) */
1035 32, /* bitsize */
1036 TRUE, /* pc_relative */
1037 0, /* bitpos */
1038 complain_overflow_dont,/* complain_on_overflow */
1039 bfd_elf_generic_reloc, /* special_function */
1040 "R_ARM_LDC_PC_G0", /* name */
1041 FALSE, /* partial_inplace */
1042 0xffffffff, /* src_mask */
1043 0xffffffff, /* dst_mask */
1044 TRUE), /* pcrel_offset */
1045
1046 HOWTO (R_ARM_LDC_PC_G1, /* type */
1047 0, /* rightshift */
1048 2, /* size (0 = byte, 1 = short, 2 = long) */
1049 32, /* bitsize */
1050 TRUE, /* pc_relative */
1051 0, /* bitpos */
1052 complain_overflow_dont,/* complain_on_overflow */
1053 bfd_elf_generic_reloc, /* special_function */
1054 "R_ARM_LDC_PC_G1", /* name */
1055 FALSE, /* partial_inplace */
1056 0xffffffff, /* src_mask */
1057 0xffffffff, /* dst_mask */
1058 TRUE), /* pcrel_offset */
1059
1060 HOWTO (R_ARM_LDC_PC_G2, /* type */
1061 0, /* rightshift */
1062 2, /* size (0 = byte, 1 = short, 2 = long) */
1063 32, /* bitsize */
1064 TRUE, /* pc_relative */
1065 0, /* bitpos */
1066 complain_overflow_dont,/* complain_on_overflow */
1067 bfd_elf_generic_reloc, /* special_function */
1068 "R_ARM_LDC_PC_G2", /* name */
1069 FALSE, /* partial_inplace */
1070 0xffffffff, /* src_mask */
1071 0xffffffff, /* dst_mask */
1072 TRUE), /* pcrel_offset */
1073
1074 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1075 0, /* rightshift */
1076 2, /* size (0 = byte, 1 = short, 2 = long) */
1077 32, /* bitsize */
1078 TRUE, /* pc_relative */
1079 0, /* bitpos */
1080 complain_overflow_dont,/* complain_on_overflow */
1081 bfd_elf_generic_reloc, /* special_function */
1082 "R_ARM_ALU_SB_G0_NC", /* name */
1083 FALSE, /* partial_inplace */
1084 0xffffffff, /* src_mask */
1085 0xffffffff, /* dst_mask */
1086 TRUE), /* pcrel_offset */
1087
1088 HOWTO (R_ARM_ALU_SB_G0, /* type */
1089 0, /* rightshift */
1090 2, /* size (0 = byte, 1 = short, 2 = long) */
1091 32, /* bitsize */
1092 TRUE, /* pc_relative */
1093 0, /* bitpos */
1094 complain_overflow_dont,/* complain_on_overflow */
1095 bfd_elf_generic_reloc, /* special_function */
1096 "R_ARM_ALU_SB_G0", /* name */
1097 FALSE, /* partial_inplace */
1098 0xffffffff, /* src_mask */
1099 0xffffffff, /* dst_mask */
1100 TRUE), /* pcrel_offset */
1101
1102 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1103 0, /* rightshift */
1104 2, /* size (0 = byte, 1 = short, 2 = long) */
1105 32, /* bitsize */
1106 TRUE, /* pc_relative */
1107 0, /* bitpos */
1108 complain_overflow_dont,/* complain_on_overflow */
1109 bfd_elf_generic_reloc, /* special_function */
1110 "R_ARM_ALU_SB_G1_NC", /* name */
1111 FALSE, /* partial_inplace */
1112 0xffffffff, /* src_mask */
1113 0xffffffff, /* dst_mask */
1114 TRUE), /* pcrel_offset */
1115
1116 HOWTO (R_ARM_ALU_SB_G1, /* type */
1117 0, /* rightshift */
1118 2, /* size (0 = byte, 1 = short, 2 = long) */
1119 32, /* bitsize */
1120 TRUE, /* pc_relative */
1121 0, /* bitpos */
1122 complain_overflow_dont,/* complain_on_overflow */
1123 bfd_elf_generic_reloc, /* special_function */
1124 "R_ARM_ALU_SB_G1", /* name */
1125 FALSE, /* partial_inplace */
1126 0xffffffff, /* src_mask */
1127 0xffffffff, /* dst_mask */
1128 TRUE), /* pcrel_offset */
1129
1130 HOWTO (R_ARM_ALU_SB_G2, /* type */
1131 0, /* rightshift */
1132 2, /* size (0 = byte, 1 = short, 2 = long) */
1133 32, /* bitsize */
1134 TRUE, /* pc_relative */
1135 0, /* bitpos */
1136 complain_overflow_dont,/* complain_on_overflow */
1137 bfd_elf_generic_reloc, /* special_function */
1138 "R_ARM_ALU_SB_G2", /* name */
1139 FALSE, /* partial_inplace */
1140 0xffffffff, /* src_mask */
1141 0xffffffff, /* dst_mask */
1142 TRUE), /* pcrel_offset */
1143
1144 HOWTO (R_ARM_LDR_SB_G0, /* type */
1145 0, /* rightshift */
1146 2, /* size (0 = byte, 1 = short, 2 = long) */
1147 32, /* bitsize */
1148 TRUE, /* pc_relative */
1149 0, /* bitpos */
1150 complain_overflow_dont,/* complain_on_overflow */
1151 bfd_elf_generic_reloc, /* special_function */
1152 "R_ARM_LDR_SB_G0", /* name */
1153 FALSE, /* partial_inplace */
1154 0xffffffff, /* src_mask */
1155 0xffffffff, /* dst_mask */
1156 TRUE), /* pcrel_offset */
1157
1158 HOWTO (R_ARM_LDR_SB_G1, /* type */
1159 0, /* rightshift */
1160 2, /* size (0 = byte, 1 = short, 2 = long) */
1161 32, /* bitsize */
1162 TRUE, /* pc_relative */
1163 0, /* bitpos */
1164 complain_overflow_dont,/* complain_on_overflow */
1165 bfd_elf_generic_reloc, /* special_function */
1166 "R_ARM_LDR_SB_G1", /* name */
1167 FALSE, /* partial_inplace */
1168 0xffffffff, /* src_mask */
1169 0xffffffff, /* dst_mask */
1170 TRUE), /* pcrel_offset */
1171
1172 HOWTO (R_ARM_LDR_SB_G2, /* type */
1173 0, /* rightshift */
1174 2, /* size (0 = byte, 1 = short, 2 = long) */
1175 32, /* bitsize */
1176 TRUE, /* pc_relative */
1177 0, /* bitpos */
1178 complain_overflow_dont,/* complain_on_overflow */
1179 bfd_elf_generic_reloc, /* special_function */
1180 "R_ARM_LDR_SB_G2", /* name */
1181 FALSE, /* partial_inplace */
1182 0xffffffff, /* src_mask */
1183 0xffffffff, /* dst_mask */
1184 TRUE), /* pcrel_offset */
1185
1186 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1187 0, /* rightshift */
1188 2, /* size (0 = byte, 1 = short, 2 = long) */
1189 32, /* bitsize */
1190 TRUE, /* pc_relative */
1191 0, /* bitpos */
1192 complain_overflow_dont,/* complain_on_overflow */
1193 bfd_elf_generic_reloc, /* special_function */
1194 "R_ARM_LDRS_SB_G0", /* name */
1195 FALSE, /* partial_inplace */
1196 0xffffffff, /* src_mask */
1197 0xffffffff, /* dst_mask */
1198 TRUE), /* pcrel_offset */
1199
1200 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1201 0, /* rightshift */
1202 2, /* size (0 = byte, 1 = short, 2 = long) */
1203 32, /* bitsize */
1204 TRUE, /* pc_relative */
1205 0, /* bitpos */
1206 complain_overflow_dont,/* complain_on_overflow */
1207 bfd_elf_generic_reloc, /* special_function */
1208 "R_ARM_LDRS_SB_G1", /* name */
1209 FALSE, /* partial_inplace */
1210 0xffffffff, /* src_mask */
1211 0xffffffff, /* dst_mask */
1212 TRUE), /* pcrel_offset */
1213
1214 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1215 0, /* rightshift */
1216 2, /* size (0 = byte, 1 = short, 2 = long) */
1217 32, /* bitsize */
1218 TRUE, /* pc_relative */
1219 0, /* bitpos */
1220 complain_overflow_dont,/* complain_on_overflow */
1221 bfd_elf_generic_reloc, /* special_function */
1222 "R_ARM_LDRS_SB_G2", /* name */
1223 FALSE, /* partial_inplace */
1224 0xffffffff, /* src_mask */
1225 0xffffffff, /* dst_mask */
1226 TRUE), /* pcrel_offset */
1227
1228 HOWTO (R_ARM_LDC_SB_G0, /* type */
1229 0, /* rightshift */
1230 2, /* size (0 = byte, 1 = short, 2 = long) */
1231 32, /* bitsize */
1232 TRUE, /* pc_relative */
1233 0, /* bitpos */
1234 complain_overflow_dont,/* complain_on_overflow */
1235 bfd_elf_generic_reloc, /* special_function */
1236 "R_ARM_LDC_SB_G0", /* name */
1237 FALSE, /* partial_inplace */
1238 0xffffffff, /* src_mask */
1239 0xffffffff, /* dst_mask */
1240 TRUE), /* pcrel_offset */
1241
1242 HOWTO (R_ARM_LDC_SB_G1, /* type */
1243 0, /* rightshift */
1244 2, /* size (0 = byte, 1 = short, 2 = long) */
1245 32, /* bitsize */
1246 TRUE, /* pc_relative */
1247 0, /* bitpos */
1248 complain_overflow_dont,/* complain_on_overflow */
1249 bfd_elf_generic_reloc, /* special_function */
1250 "R_ARM_LDC_SB_G1", /* name */
1251 FALSE, /* partial_inplace */
1252 0xffffffff, /* src_mask */
1253 0xffffffff, /* dst_mask */
1254 TRUE), /* pcrel_offset */
1255
1256 HOWTO (R_ARM_LDC_SB_G2, /* type */
1257 0, /* rightshift */
1258 2, /* size (0 = byte, 1 = short, 2 = long) */
1259 32, /* bitsize */
1260 TRUE, /* pc_relative */
1261 0, /* bitpos */
1262 complain_overflow_dont,/* complain_on_overflow */
1263 bfd_elf_generic_reloc, /* special_function */
1264 "R_ARM_LDC_SB_G2", /* name */
1265 FALSE, /* partial_inplace */
1266 0xffffffff, /* src_mask */
1267 0xffffffff, /* dst_mask */
1268 TRUE), /* pcrel_offset */
1269
1270 /* End of group relocations. */
1271
1272 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1273 0, /* rightshift */
1274 2, /* size (0 = byte, 1 = short, 2 = long) */
1275 16, /* bitsize */
1276 FALSE, /* pc_relative */
1277 0, /* bitpos */
1278 complain_overflow_dont,/* complain_on_overflow */
1279 bfd_elf_generic_reloc, /* special_function */
1280 "R_ARM_MOVW_BREL_NC", /* name */
1281 FALSE, /* partial_inplace */
1282 0x0000ffff, /* src_mask */
1283 0x0000ffff, /* dst_mask */
1284 FALSE), /* pcrel_offset */
1285
1286 HOWTO (R_ARM_MOVT_BREL, /* type */
1287 0, /* rightshift */
1288 2, /* size (0 = byte, 1 = short, 2 = long) */
1289 16, /* bitsize */
1290 FALSE, /* pc_relative */
1291 0, /* bitpos */
1292 complain_overflow_bitfield,/* complain_on_overflow */
1293 bfd_elf_generic_reloc, /* special_function */
1294 "R_ARM_MOVT_BREL", /* name */
1295 FALSE, /* partial_inplace */
1296 0x0000ffff, /* src_mask */
1297 0x0000ffff, /* dst_mask */
1298 FALSE), /* pcrel_offset */
1299
1300 HOWTO (R_ARM_MOVW_BREL, /* type */
1301 0, /* rightshift */
1302 2, /* size (0 = byte, 1 = short, 2 = long) */
1303 16, /* bitsize */
1304 FALSE, /* pc_relative */
1305 0, /* bitpos */
1306 complain_overflow_dont,/* complain_on_overflow */
1307 bfd_elf_generic_reloc, /* special_function */
1308 "R_ARM_MOVW_BREL", /* name */
1309 FALSE, /* partial_inplace */
1310 0x0000ffff, /* src_mask */
1311 0x0000ffff, /* dst_mask */
1312 FALSE), /* pcrel_offset */
1313
1314 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1315 0, /* rightshift */
1316 2, /* size (0 = byte, 1 = short, 2 = long) */
1317 16, /* bitsize */
1318 FALSE, /* pc_relative */
1319 0, /* bitpos */
1320 complain_overflow_dont,/* complain_on_overflow */
1321 bfd_elf_generic_reloc, /* special_function */
1322 "R_ARM_THM_MOVW_BREL_NC",/* name */
1323 FALSE, /* partial_inplace */
1324 0x040f70ff, /* src_mask */
1325 0x040f70ff, /* dst_mask */
1326 FALSE), /* pcrel_offset */
1327
1328 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1329 0, /* rightshift */
1330 2, /* size (0 = byte, 1 = short, 2 = long) */
1331 16, /* bitsize */
1332 FALSE, /* pc_relative */
1333 0, /* bitpos */
1334 complain_overflow_bitfield,/* complain_on_overflow */
1335 bfd_elf_generic_reloc, /* special_function */
1336 "R_ARM_THM_MOVT_BREL", /* name */
1337 FALSE, /* partial_inplace */
1338 0x040f70ff, /* src_mask */
1339 0x040f70ff, /* dst_mask */
1340 FALSE), /* pcrel_offset */
1341
1342 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1343 0, /* rightshift */
1344 2, /* size (0 = byte, 1 = short, 2 = long) */
1345 16, /* bitsize */
1346 FALSE, /* pc_relative */
1347 0, /* bitpos */
1348 complain_overflow_dont,/* complain_on_overflow */
1349 bfd_elf_generic_reloc, /* special_function */
1350 "R_ARM_THM_MOVW_BREL", /* name */
1351 FALSE, /* partial_inplace */
1352 0x040f70ff, /* src_mask */
1353 0x040f70ff, /* dst_mask */
1354 FALSE), /* pcrel_offset */
1355
1356 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1357 0, /* rightshift */
1358 2, /* size (0 = byte, 1 = short, 2 = long) */
1359 32, /* bitsize */
1360 FALSE, /* pc_relative */
1361 0, /* bitpos */
1362 complain_overflow_bitfield,/* complain_on_overflow */
1363 NULL, /* special_function */
1364 "R_ARM_TLS_GOTDESC", /* name */
1365 TRUE, /* partial_inplace */
1366 0xffffffff, /* src_mask */
1367 0xffffffff, /* dst_mask */
1368 FALSE), /* pcrel_offset */
1369
1370 HOWTO (R_ARM_TLS_CALL, /* type */
1371 0, /* rightshift */
1372 2, /* size (0 = byte, 1 = short, 2 = long) */
1373 24, /* bitsize */
1374 FALSE, /* pc_relative */
1375 0, /* bitpos */
1376 complain_overflow_dont,/* complain_on_overflow */
1377 bfd_elf_generic_reloc, /* special_function */
1378 "R_ARM_TLS_CALL", /* name */
1379 FALSE, /* partial_inplace */
1380 0x00ffffff, /* src_mask */
1381 0x00ffffff, /* dst_mask */
1382 FALSE), /* pcrel_offset */
1383
1384 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1385 0, /* rightshift */
1386 2, /* size (0 = byte, 1 = short, 2 = long) */
1387 0, /* bitsize */
1388 FALSE, /* pc_relative */
1389 0, /* bitpos */
1390 complain_overflow_bitfield,/* complain_on_overflow */
1391 bfd_elf_generic_reloc, /* special_function */
1392 "R_ARM_TLS_DESCSEQ", /* name */
1393 FALSE, /* partial_inplace */
1394 0x00000000, /* src_mask */
1395 0x00000000, /* dst_mask */
1396 FALSE), /* pcrel_offset */
1397
1398 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1399 0, /* rightshift */
1400 2, /* size (0 = byte, 1 = short, 2 = long) */
1401 24, /* bitsize */
1402 FALSE, /* pc_relative */
1403 0, /* bitpos */
1404 complain_overflow_dont,/* complain_on_overflow */
1405 bfd_elf_generic_reloc, /* special_function */
1406 "R_ARM_THM_TLS_CALL", /* name */
1407 FALSE, /* partial_inplace */
1408 0x07ff07ff, /* src_mask */
1409 0x07ff07ff, /* dst_mask */
1410 FALSE), /* pcrel_offset */
1411
1412 HOWTO (R_ARM_PLT32_ABS, /* type */
1413 0, /* rightshift */
1414 2, /* size (0 = byte, 1 = short, 2 = long) */
1415 32, /* bitsize */
1416 FALSE, /* pc_relative */
1417 0, /* bitpos */
1418 complain_overflow_dont,/* complain_on_overflow */
1419 bfd_elf_generic_reloc, /* special_function */
1420 "R_ARM_PLT32_ABS", /* name */
1421 FALSE, /* partial_inplace */
1422 0xffffffff, /* src_mask */
1423 0xffffffff, /* dst_mask */
1424 FALSE), /* pcrel_offset */
1425
1426 HOWTO (R_ARM_GOT_ABS, /* type */
1427 0, /* rightshift */
1428 2, /* size (0 = byte, 1 = short, 2 = long) */
1429 32, /* bitsize */
1430 FALSE, /* pc_relative */
1431 0, /* bitpos */
1432 complain_overflow_dont,/* complain_on_overflow */
1433 bfd_elf_generic_reloc, /* special_function */
1434 "R_ARM_GOT_ABS", /* name */
1435 FALSE, /* partial_inplace */
1436 0xffffffff, /* src_mask */
1437 0xffffffff, /* dst_mask */
1438 FALSE), /* pcrel_offset */
1439
1440 HOWTO (R_ARM_GOT_PREL, /* type */
1441 0, /* rightshift */
1442 2, /* size (0 = byte, 1 = short, 2 = long) */
1443 32, /* bitsize */
1444 TRUE, /* pc_relative */
1445 0, /* bitpos */
1446 complain_overflow_dont, /* complain_on_overflow */
1447 bfd_elf_generic_reloc, /* special_function */
1448 "R_ARM_GOT_PREL", /* name */
1449 FALSE, /* partial_inplace */
1450 0xffffffff, /* src_mask */
1451 0xffffffff, /* dst_mask */
1452 TRUE), /* pcrel_offset */
1453
1454 HOWTO (R_ARM_GOT_BREL12, /* type */
1455 0, /* rightshift */
1456 2, /* size (0 = byte, 1 = short, 2 = long) */
1457 12, /* bitsize */
1458 FALSE, /* pc_relative */
1459 0, /* bitpos */
1460 complain_overflow_bitfield,/* complain_on_overflow */
1461 bfd_elf_generic_reloc, /* special_function */
1462 "R_ARM_GOT_BREL12", /* name */
1463 FALSE, /* partial_inplace */
1464 0x00000fff, /* src_mask */
1465 0x00000fff, /* dst_mask */
1466 FALSE), /* pcrel_offset */
1467
1468 HOWTO (R_ARM_GOTOFF12, /* type */
1469 0, /* rightshift */
1470 2, /* size (0 = byte, 1 = short, 2 = long) */
1471 12, /* bitsize */
1472 FALSE, /* pc_relative */
1473 0, /* bitpos */
1474 complain_overflow_bitfield,/* complain_on_overflow */
1475 bfd_elf_generic_reloc, /* special_function */
1476 "R_ARM_GOTOFF12", /* name */
1477 FALSE, /* partial_inplace */
1478 0x00000fff, /* src_mask */
1479 0x00000fff, /* dst_mask */
1480 FALSE), /* pcrel_offset */
1481
1482 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1483
1484 /* GNU extension to record C++ vtable member usage */
1485 HOWTO (R_ARM_GNU_VTENTRY, /* type */
1486 0, /* rightshift */
1487 2, /* size (0 = byte, 1 = short, 2 = long) */
1488 0, /* bitsize */
1489 FALSE, /* pc_relative */
1490 0, /* bitpos */
1491 complain_overflow_dont, /* complain_on_overflow */
1492 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1493 "R_ARM_GNU_VTENTRY", /* name */
1494 FALSE, /* partial_inplace */
1495 0, /* src_mask */
1496 0, /* dst_mask */
1497 FALSE), /* pcrel_offset */
1498
1499 /* GNU extension to record C++ vtable hierarchy */
1500 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1501 0, /* rightshift */
1502 2, /* size (0 = byte, 1 = short, 2 = long) */
1503 0, /* bitsize */
1504 FALSE, /* pc_relative */
1505 0, /* bitpos */
1506 complain_overflow_dont, /* complain_on_overflow */
1507 NULL, /* special_function */
1508 "R_ARM_GNU_VTINHERIT", /* name */
1509 FALSE, /* partial_inplace */
1510 0, /* src_mask */
1511 0, /* dst_mask */
1512 FALSE), /* pcrel_offset */
1513
1514 HOWTO (R_ARM_THM_JUMP11, /* type */
1515 1, /* rightshift */
1516 1, /* size (0 = byte, 1 = short, 2 = long) */
1517 11, /* bitsize */
1518 TRUE, /* pc_relative */
1519 0, /* bitpos */
1520 complain_overflow_signed, /* complain_on_overflow */
1521 bfd_elf_generic_reloc, /* special_function */
1522 "R_ARM_THM_JUMP11", /* name */
1523 FALSE, /* partial_inplace */
1524 0x000007ff, /* src_mask */
1525 0x000007ff, /* dst_mask */
1526 TRUE), /* pcrel_offset */
1527
1528 HOWTO (R_ARM_THM_JUMP8, /* type */
1529 1, /* rightshift */
1530 1, /* size (0 = byte, 1 = short, 2 = long) */
1531 8, /* bitsize */
1532 TRUE, /* pc_relative */
1533 0, /* bitpos */
1534 complain_overflow_signed, /* complain_on_overflow */
1535 bfd_elf_generic_reloc, /* special_function */
1536 "R_ARM_THM_JUMP8", /* name */
1537 FALSE, /* partial_inplace */
1538 0x000000ff, /* src_mask */
1539 0x000000ff, /* dst_mask */
1540 TRUE), /* pcrel_offset */
1541
1542 /* TLS relocations */
1543 HOWTO (R_ARM_TLS_GD32, /* type */
1544 0, /* rightshift */
1545 2, /* size (0 = byte, 1 = short, 2 = long) */
1546 32, /* bitsize */
1547 FALSE, /* pc_relative */
1548 0, /* bitpos */
1549 complain_overflow_bitfield,/* complain_on_overflow */
1550 NULL, /* special_function */
1551 "R_ARM_TLS_GD32", /* name */
1552 TRUE, /* partial_inplace */
1553 0xffffffff, /* src_mask */
1554 0xffffffff, /* dst_mask */
1555 FALSE), /* pcrel_offset */
1556
1557 HOWTO (R_ARM_TLS_LDM32, /* type */
1558 0, /* rightshift */
1559 2, /* size (0 = byte, 1 = short, 2 = long) */
1560 32, /* bitsize */
1561 FALSE, /* pc_relative */
1562 0, /* bitpos */
1563 complain_overflow_bitfield,/* complain_on_overflow */
1564 bfd_elf_generic_reloc, /* special_function */
1565 "R_ARM_TLS_LDM32", /* name */
1566 TRUE, /* partial_inplace */
1567 0xffffffff, /* src_mask */
1568 0xffffffff, /* dst_mask */
1569 FALSE), /* pcrel_offset */
1570
1571 HOWTO (R_ARM_TLS_LDO32, /* type */
1572 0, /* rightshift */
1573 2, /* size (0 = byte, 1 = short, 2 = long) */
1574 32, /* bitsize */
1575 FALSE, /* pc_relative */
1576 0, /* bitpos */
1577 complain_overflow_bitfield,/* complain_on_overflow */
1578 bfd_elf_generic_reloc, /* special_function */
1579 "R_ARM_TLS_LDO32", /* name */
1580 TRUE, /* partial_inplace */
1581 0xffffffff, /* src_mask */
1582 0xffffffff, /* dst_mask */
1583 FALSE), /* pcrel_offset */
1584
1585 HOWTO (R_ARM_TLS_IE32, /* type */
1586 0, /* rightshift */
1587 2, /* size (0 = byte, 1 = short, 2 = long) */
1588 32, /* bitsize */
1589 FALSE, /* pc_relative */
1590 0, /* bitpos */
1591 complain_overflow_bitfield,/* complain_on_overflow */
1592 NULL, /* special_function */
1593 "R_ARM_TLS_IE32", /* name */
1594 TRUE, /* partial_inplace */
1595 0xffffffff, /* src_mask */
1596 0xffffffff, /* dst_mask */
1597 FALSE), /* pcrel_offset */
1598
1599 HOWTO (R_ARM_TLS_LE32, /* type */
1600 0, /* rightshift */
1601 2, /* size (0 = byte, 1 = short, 2 = long) */
1602 32, /* bitsize */
1603 FALSE, /* pc_relative */
1604 0, /* bitpos */
1605 complain_overflow_bitfield,/* complain_on_overflow */
1606 bfd_elf_generic_reloc, /* special_function */
1607 "R_ARM_TLS_LE32", /* name */
1608 TRUE, /* partial_inplace */
1609 0xffffffff, /* src_mask */
1610 0xffffffff, /* dst_mask */
1611 FALSE), /* pcrel_offset */
1612
1613 HOWTO (R_ARM_TLS_LDO12, /* type */
1614 0, /* rightshift */
1615 2, /* size (0 = byte, 1 = short, 2 = long) */
1616 12, /* bitsize */
1617 FALSE, /* pc_relative */
1618 0, /* bitpos */
1619 complain_overflow_bitfield,/* complain_on_overflow */
1620 bfd_elf_generic_reloc, /* special_function */
1621 "R_ARM_TLS_LDO12", /* name */
1622 FALSE, /* partial_inplace */
1623 0x00000fff, /* src_mask */
1624 0x00000fff, /* dst_mask */
1625 FALSE), /* pcrel_offset */
1626
1627 HOWTO (R_ARM_TLS_LE12, /* type */
1628 0, /* rightshift */
1629 2, /* size (0 = byte, 1 = short, 2 = long) */
1630 12, /* bitsize */
1631 FALSE, /* pc_relative */
1632 0, /* bitpos */
1633 complain_overflow_bitfield,/* complain_on_overflow */
1634 bfd_elf_generic_reloc, /* special_function */
1635 "R_ARM_TLS_LE12", /* name */
1636 FALSE, /* partial_inplace */
1637 0x00000fff, /* src_mask */
1638 0x00000fff, /* dst_mask */
1639 FALSE), /* pcrel_offset */
1640
1641 HOWTO (R_ARM_TLS_IE12GP, /* type */
1642 0, /* rightshift */
1643 2, /* size (0 = byte, 1 = short, 2 = long) */
1644 12, /* bitsize */
1645 FALSE, /* pc_relative */
1646 0, /* bitpos */
1647 complain_overflow_bitfield,/* complain_on_overflow */
1648 bfd_elf_generic_reloc, /* special_function */
1649 "R_ARM_TLS_IE12GP", /* name */
1650 FALSE, /* partial_inplace */
1651 0x00000fff, /* src_mask */
1652 0x00000fff, /* dst_mask */
1653 FALSE), /* pcrel_offset */
1654
1655 /* 112-127 private relocations. */
1656 EMPTY_HOWTO (112),
1657 EMPTY_HOWTO (113),
1658 EMPTY_HOWTO (114),
1659 EMPTY_HOWTO (115),
1660 EMPTY_HOWTO (116),
1661 EMPTY_HOWTO (117),
1662 EMPTY_HOWTO (118),
1663 EMPTY_HOWTO (119),
1664 EMPTY_HOWTO (120),
1665 EMPTY_HOWTO (121),
1666 EMPTY_HOWTO (122),
1667 EMPTY_HOWTO (123),
1668 EMPTY_HOWTO (124),
1669 EMPTY_HOWTO (125),
1670 EMPTY_HOWTO (126),
1671 EMPTY_HOWTO (127),
1672
1673 /* R_ARM_ME_TOO, obsolete. */
1674 EMPTY_HOWTO (128),
1675
1676 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1677 0, /* rightshift */
1678 1, /* size (0 = byte, 1 = short, 2 = long) */
1679 0, /* bitsize */
1680 FALSE, /* pc_relative */
1681 0, /* bitpos */
1682 complain_overflow_bitfield,/* complain_on_overflow */
1683 bfd_elf_generic_reloc, /* special_function */
1684 "R_ARM_THM_TLS_DESCSEQ",/* name */
1685 FALSE, /* partial_inplace */
1686 0x00000000, /* src_mask */
1687 0x00000000, /* dst_mask */
1688 FALSE), /* pcrel_offset */
1689 };
1690
1691 /* 160 onwards: */
1692 static reloc_howto_type elf32_arm_howto_table_2[1] =
1693 {
1694 HOWTO (R_ARM_IRELATIVE, /* type */
1695 0, /* rightshift */
1696 2, /* size (0 = byte, 1 = short, 2 = long) */
1697 32, /* bitsize */
1698 FALSE, /* pc_relative */
1699 0, /* bitpos */
1700 complain_overflow_bitfield,/* complain_on_overflow */
1701 bfd_elf_generic_reloc, /* special_function */
1702 "R_ARM_IRELATIVE", /* name */
1703 TRUE, /* partial_inplace */
1704 0xffffffff, /* src_mask */
1705 0xffffffff, /* dst_mask */
1706 FALSE) /* pcrel_offset */
1707 };
1708
1709 /* 249-255 extended, currently unused, relocations: */
1710 static reloc_howto_type elf32_arm_howto_table_3[4] =
1711 {
1712 HOWTO (R_ARM_RREL32, /* type */
1713 0, /* rightshift */
1714 0, /* size (0 = byte, 1 = short, 2 = long) */
1715 0, /* bitsize */
1716 FALSE, /* pc_relative */
1717 0, /* bitpos */
1718 complain_overflow_dont,/* complain_on_overflow */
1719 bfd_elf_generic_reloc, /* special_function */
1720 "R_ARM_RREL32", /* name */
1721 FALSE, /* partial_inplace */
1722 0, /* src_mask */
1723 0, /* dst_mask */
1724 FALSE), /* pcrel_offset */
1725
1726 HOWTO (R_ARM_RABS32, /* type */
1727 0, /* rightshift */
1728 0, /* size (0 = byte, 1 = short, 2 = long) */
1729 0, /* bitsize */
1730 FALSE, /* pc_relative */
1731 0, /* bitpos */
1732 complain_overflow_dont,/* complain_on_overflow */
1733 bfd_elf_generic_reloc, /* special_function */
1734 "R_ARM_RABS32", /* name */
1735 FALSE, /* partial_inplace */
1736 0, /* src_mask */
1737 0, /* dst_mask */
1738 FALSE), /* pcrel_offset */
1739
1740 HOWTO (R_ARM_RPC24, /* type */
1741 0, /* rightshift */
1742 0, /* size (0 = byte, 1 = short, 2 = long) */
1743 0, /* bitsize */
1744 FALSE, /* pc_relative */
1745 0, /* bitpos */
1746 complain_overflow_dont,/* complain_on_overflow */
1747 bfd_elf_generic_reloc, /* special_function */
1748 "R_ARM_RPC24", /* name */
1749 FALSE, /* partial_inplace */
1750 0, /* src_mask */
1751 0, /* dst_mask */
1752 FALSE), /* pcrel_offset */
1753
1754 HOWTO (R_ARM_RBASE, /* type */
1755 0, /* rightshift */
1756 0, /* size (0 = byte, 1 = short, 2 = long) */
1757 0, /* bitsize */
1758 FALSE, /* pc_relative */
1759 0, /* bitpos */
1760 complain_overflow_dont,/* complain_on_overflow */
1761 bfd_elf_generic_reloc, /* special_function */
1762 "R_ARM_RBASE", /* name */
1763 FALSE, /* partial_inplace */
1764 0, /* src_mask */
1765 0, /* dst_mask */
1766 FALSE) /* pcrel_offset */
1767 };
1768
1769 static reloc_howto_type *
1770 elf32_arm_howto_from_type (unsigned int r_type)
1771 {
1772 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
1773 return &elf32_arm_howto_table_1[r_type];
1774
1775 if (r_type == R_ARM_IRELATIVE)
1776 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1777
1778 if (r_type >= R_ARM_RREL32
1779 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1780 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
1781
1782 return NULL;
1783 }
1784
1785 static void
1786 elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1787 Elf_Internal_Rela * elf_reloc)
1788 {
1789 unsigned int r_type;
1790
1791 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1792 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1793 }
1794
1795 struct elf32_arm_reloc_map
1796 {
1797 bfd_reloc_code_real_type bfd_reloc_val;
1798 unsigned char elf_reloc_val;
1799 };
1800
1801 /* All entries in this list must also be present in elf32_arm_howto_table. */
1802 static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1803 {
1804 {BFD_RELOC_NONE, R_ARM_NONE},
1805 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
1806 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1807 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
1808 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1809 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1810 {BFD_RELOC_32, R_ARM_ABS32},
1811 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1812 {BFD_RELOC_8, R_ARM_ABS8},
1813 {BFD_RELOC_16, R_ARM_ABS16},
1814 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1815 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
1816 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1817 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1818 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1819 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1820 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1821 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
1822 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1823 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1824 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
1825 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
1826 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1827 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
1828 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1829 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1830 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1831 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1832 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1833 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
1834 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1835 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1836 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1837 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1838 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1839 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1840 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1841 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
1842 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1843 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1844 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1845 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1846 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1847 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1848 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1849 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
1850 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
1851 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1852 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
1853 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1854 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1855 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1856 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1857 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1858 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1859 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1860 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
1861 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1862 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1863 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1864 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1865 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1866 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1867 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1868 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1869 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1870 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1871 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1872 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1873 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1874 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1875 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1876 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1877 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1878 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1879 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1880 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1881 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1882 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1883 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1884 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1885 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1886 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1887 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
1888 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1889 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}
1890 };
1891
1892 static reloc_howto_type *
1893 elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1894 bfd_reloc_code_real_type code)
1895 {
1896 unsigned int i;
1897
1898 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
1899 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1900 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
1901
1902 return NULL;
1903 }
1904
1905 static reloc_howto_type *
1906 elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1907 const char *r_name)
1908 {
1909 unsigned int i;
1910
1911 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
1912 if (elf32_arm_howto_table_1[i].name != NULL
1913 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1914 return &elf32_arm_howto_table_1[i];
1915
1916 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
1917 if (elf32_arm_howto_table_2[i].name != NULL
1918 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1919 return &elf32_arm_howto_table_2[i];
1920
1921 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
1922 if (elf32_arm_howto_table_3[i].name != NULL
1923 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
1924 return &elf32_arm_howto_table_3[i];
1925
1926 return NULL;
1927 }
1928
1929 /* Support for core dump NOTE sections. */
1930
1931 static bfd_boolean
1932 elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
1933 {
1934 int offset;
1935 size_t size;
1936
1937 switch (note->descsz)
1938 {
1939 default:
1940 return FALSE;
1941
1942 case 148: /* Linux/ARM 32-bit. */
1943 /* pr_cursig */
1944 elf_tdata (abfd)->core_signal = bfd_get_16 (abfd, note->descdata + 12);
1945
1946 /* pr_pid */
1947 elf_tdata (abfd)->core_lwpid = bfd_get_32 (abfd, note->descdata + 24);
1948
1949 /* pr_reg */
1950 offset = 72;
1951 size = 72;
1952
1953 break;
1954 }
1955
1956 /* Make a ".reg/999" section. */
1957 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1958 size, note->descpos + offset);
1959 }
1960
1961 static bfd_boolean
1962 elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
1963 {
1964 switch (note->descsz)
1965 {
1966 default:
1967 return FALSE;
1968
1969 case 124: /* Linux/ARM elf_prpsinfo. */
1970 elf_tdata (abfd)->core_pid
1971 = bfd_get_32 (abfd, note->descdata + 12);
1972 elf_tdata (abfd)->core_program
1973 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
1974 elf_tdata (abfd)->core_command
1975 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1976 }
1977
1978 /* Note that for some reason, a spurious space is tacked
1979 onto the end of the args in some (at least one anyway)
1980 implementations, so strip it off if it exists. */
1981 {
1982 char *command = elf_tdata (abfd)->core_command;
1983 int n = strlen (command);
1984
1985 if (0 < n && command[n - 1] == ' ')
1986 command[n - 1] = '\0';
1987 }
1988
1989 return TRUE;
1990 }
1991
1992 static char *
1993 elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
1994 int note_type, ...)
1995 {
1996 switch (note_type)
1997 {
1998 default:
1999 return NULL;
2000
2001 case NT_PRPSINFO:
2002 {
2003 char data[124];
2004 va_list ap;
2005
2006 va_start (ap, note_type);
2007 memset (data, 0, sizeof (data));
2008 strncpy (data + 28, va_arg (ap, const char *), 16);
2009 strncpy (data + 44, va_arg (ap, const char *), 80);
2010 va_end (ap);
2011
2012 return elfcore_write_note (abfd, buf, bufsiz,
2013 "CORE", note_type, data, sizeof (data));
2014 }
2015
2016 case NT_PRSTATUS:
2017 {
2018 char data[148];
2019 va_list ap;
2020 long pid;
2021 int cursig;
2022 const void *greg;
2023
2024 va_start (ap, note_type);
2025 memset (data, 0, sizeof (data));
2026 pid = va_arg (ap, long);
2027 bfd_put_32 (abfd, pid, data + 24);
2028 cursig = va_arg (ap, int);
2029 bfd_put_16 (abfd, cursig, data + 12);
2030 greg = va_arg (ap, const void *);
2031 memcpy (data + 72, greg, 72);
2032 va_end (ap);
2033
2034 return elfcore_write_note (abfd, buf, bufsiz,
2035 "CORE", note_type, data, sizeof (data));
2036 }
2037 }
2038 }
2039
2040 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
2041 #define TARGET_LITTLE_NAME "elf32-littlearm"
2042 #define TARGET_BIG_SYM bfd_elf32_bigarm_vec
2043 #define TARGET_BIG_NAME "elf32-bigarm"
2044
2045 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2046 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2047 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2048
2049 typedef unsigned long int insn32;
2050 typedef unsigned short int insn16;
2051
2052 /* In lieu of proper flags, assume all EABIv4 or later objects are
2053 interworkable. */
2054 #define INTERWORK_FLAG(abfd) \
2055 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2056 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2057 || ((abfd)->flags & BFD_LINKER_CREATED))
2058
2059 /* The linker script knows the section names for placement.
2060 The entry_names are used to do simple name mangling on the stubs.
2061 Given a function name, and its type, the stub can be found. The
2062 name can be changed. The only requirement is the %s be present. */
2063 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2064 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2065
2066 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2067 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2068
2069 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2070 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2071
2072 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2073 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2074
2075 #define STUB_ENTRY_NAME "__%s_veneer"
2076
2077 /* The name of the dynamic interpreter. This is put in the .interp
2078 section. */
2079 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2080
2081 static const unsigned long tls_trampoline [] =
2082 {
2083 0xe08e0000, /* add r0, lr, r0 */
2084 0xe5901004, /* ldr r1, [r0,#4] */
2085 0xe12fff11, /* bx r1 */
2086 };
2087
2088 static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2089 {
2090 0xe52d2004, /* push {r2} */
2091 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2092 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2093 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2094 0xe081100f, /* 2: add r1, pc */
2095 0xe12fff12, /* bx r2 */
2096 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2097 + dl_tlsdesc_lazy_resolver(GOT) */
2098 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2099 };
2100
2101 #ifdef FOUR_WORD_PLT
2102
2103 /* The first entry in a procedure linkage table looks like
2104 this. It is set up so that any shared library function that is
2105 called before the relocation has been set up calls the dynamic
2106 linker first. */
2107 static const bfd_vma elf32_arm_plt0_entry [] =
2108 {
2109 0xe52de004, /* str lr, [sp, #-4]! */
2110 0xe59fe010, /* ldr lr, [pc, #16] */
2111 0xe08fe00e, /* add lr, pc, lr */
2112 0xe5bef008, /* ldr pc, [lr, #8]! */
2113 };
2114
2115 /* Subsequent entries in a procedure linkage table look like
2116 this. */
2117 static const bfd_vma elf32_arm_plt_entry [] =
2118 {
2119 0xe28fc600, /* add ip, pc, #NN */
2120 0xe28cca00, /* add ip, ip, #NN */
2121 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2122 0x00000000, /* unused */
2123 };
2124
2125 #else
2126
2127 /* The first entry in a procedure linkage table looks like
2128 this. It is set up so that any shared library function that is
2129 called before the relocation has been set up calls the dynamic
2130 linker first. */
2131 static const bfd_vma elf32_arm_plt0_entry [] =
2132 {
2133 0xe52de004, /* str lr, [sp, #-4]! */
2134 0xe59fe004, /* ldr lr, [pc, #4] */
2135 0xe08fe00e, /* add lr, pc, lr */
2136 0xe5bef008, /* ldr pc, [lr, #8]! */
2137 0x00000000, /* &GOT[0] - . */
2138 };
2139
2140 /* Subsequent entries in a procedure linkage table look like
2141 this. */
2142 static const bfd_vma elf32_arm_plt_entry [] =
2143 {
2144 0xe28fc600, /* add ip, pc, #0xNN00000 */
2145 0xe28cca00, /* add ip, ip, #0xNN000 */
2146 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2147 };
2148
2149 #endif
2150
2151 /* The format of the first entry in the procedure linkage table
2152 for a VxWorks executable. */
2153 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2154 {
2155 0xe52dc008, /* str ip,[sp,#-8]! */
2156 0xe59fc000, /* ldr ip,[pc] */
2157 0xe59cf008, /* ldr pc,[ip,#8] */
2158 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2159 };
2160
2161 /* The format of subsequent entries in a VxWorks executable. */
2162 static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2163 {
2164 0xe59fc000, /* ldr ip,[pc] */
2165 0xe59cf000, /* ldr pc,[ip] */
2166 0x00000000, /* .long @got */
2167 0xe59fc000, /* ldr ip,[pc] */
2168 0xea000000, /* b _PLT */
2169 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2170 };
2171
2172 /* The format of entries in a VxWorks shared library. */
2173 static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2174 {
2175 0xe59fc000, /* ldr ip,[pc] */
2176 0xe79cf009, /* ldr pc,[ip,r9] */
2177 0x00000000, /* .long @got */
2178 0xe59fc000, /* ldr ip,[pc] */
2179 0xe599f008, /* ldr pc,[r9,#8] */
2180 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2181 };
2182
2183 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2184 #define PLT_THUMB_STUB_SIZE 4
2185 static const bfd_vma elf32_arm_plt_thumb_stub [] =
2186 {
2187 0x4778, /* bx pc */
2188 0x46c0 /* nop */
2189 };
2190
2191 /* The entries in a PLT when using a DLL-based target with multiple
2192 address spaces. */
2193 static const bfd_vma elf32_arm_symbian_plt_entry [] =
2194 {
2195 0xe51ff004, /* ldr pc, [pc, #-4] */
2196 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2197 };
2198
2199 /* The first entry in a procedure linkage table looks like
2200 this. It is set up so that any shared library function that is
2201 called before the relocation has been set up calls the dynamic
2202 linker first. */
2203 static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2204 {
2205 /* First bundle: */
2206 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2207 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2208 0xe08cc00f, /* add ip, ip, pc */
2209 0xe52dc008, /* str ip, [sp, #-8]! */
2210 /* Second bundle: */
2211 0xe7dfcf1f, /* bfc ip, #30, #2 */
2212 0xe59cc000, /* ldr ip, [ip] */
2213 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2214 0xe12fff1c, /* bx ip */
2215 /* Third bundle: */
2216 0xe320f000, /* nop */
2217 0xe320f000, /* nop */
2218 0xe320f000, /* nop */
2219 /* .Lplt_tail: */
2220 0xe50dc004, /* str ip, [sp, #-4] */
2221 /* Fourth bundle: */
2222 0xe7dfcf1f, /* bfc ip, #30, #2 */
2223 0xe59cc000, /* ldr ip, [ip] */
2224 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2225 0xe12fff1c, /* bx ip */
2226 };
2227 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2228
2229 /* Subsequent entries in a procedure linkage table look like this. */
2230 static const bfd_vma elf32_arm_nacl_plt_entry [] =
2231 {
2232 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2233 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2234 0xe08cc00f, /* add ip, ip, pc */
2235 0xea000000, /* b .Lplt_tail */
2236 };
2237
2238 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2239 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2240 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2241 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2242 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2243 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2244
2245 enum stub_insn_type
2246 {
2247 THUMB16_TYPE = 1,
2248 THUMB32_TYPE,
2249 ARM_TYPE,
2250 DATA_TYPE
2251 };
2252
2253 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2254 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2255 is inserted in arm_build_one_stub(). */
2256 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2257 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2258 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2259 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2260 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2261 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2262
2263 typedef struct
2264 {
2265 bfd_vma data;
2266 enum stub_insn_type type;
2267 unsigned int r_type;
2268 int reloc_addend;
2269 } insn_sequence;
2270
2271 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2272 to reach the stub if necessary. */
2273 static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
2274 {
2275 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2276 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2277 };
2278
2279 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2280 available. */
2281 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
2282 {
2283 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2284 ARM_INSN (0xe12fff1c), /* bx ip */
2285 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2286 };
2287
2288 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2289 static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
2290 {
2291 THUMB16_INSN (0xb401), /* push {r0} */
2292 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2293 THUMB16_INSN (0x4684), /* mov ip, r0 */
2294 THUMB16_INSN (0xbc01), /* pop {r0} */
2295 THUMB16_INSN (0x4760), /* bx ip */
2296 THUMB16_INSN (0xbf00), /* nop */
2297 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2298 };
2299
2300 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2301 allowed. */
2302 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2303 {
2304 THUMB16_INSN (0x4778), /* bx pc */
2305 THUMB16_INSN (0x46c0), /* nop */
2306 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2307 ARM_INSN (0xe12fff1c), /* bx ip */
2308 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2309 };
2310
2311 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2312 available. */
2313 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
2314 {
2315 THUMB16_INSN (0x4778), /* bx pc */
2316 THUMB16_INSN (0x46c0), /* nop */
2317 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2318 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2319 };
2320
2321 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2322 one, when the destination is close enough. */
2323 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
2324 {
2325 THUMB16_INSN (0x4778), /* bx pc */
2326 THUMB16_INSN (0x46c0), /* nop */
2327 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2328 };
2329
2330 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2331 blx to reach the stub if necessary. */
2332 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
2333 {
2334 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2335 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2336 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2337 };
2338
2339 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2340 blx to reach the stub if necessary. We can not add into pc;
2341 it is not guaranteed to mode switch (different in ARMv6 and
2342 ARMv7). */
2343 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2344 {
2345 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2346 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2347 ARM_INSN (0xe12fff1c), /* bx ip */
2348 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2349 };
2350
2351 /* V4T ARM -> ARM long branch stub, PIC. */
2352 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2353 {
2354 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2355 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2356 ARM_INSN (0xe12fff1c), /* bx ip */
2357 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2358 };
2359
2360 /* V4T Thumb -> ARM long branch stub, PIC. */
2361 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2362 {
2363 THUMB16_INSN (0x4778), /* bx pc */
2364 THUMB16_INSN (0x46c0), /* nop */
2365 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2366 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2367 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2368 };
2369
2370 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2371 architectures. */
2372 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2373 {
2374 THUMB16_INSN (0xb401), /* push {r0} */
2375 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2376 THUMB16_INSN (0x46fc), /* mov ip, pc */
2377 THUMB16_INSN (0x4484), /* add ip, r0 */
2378 THUMB16_INSN (0xbc01), /* pop {r0} */
2379 THUMB16_INSN (0x4760), /* bx ip */
2380 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2381 };
2382
2383 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2384 allowed. */
2385 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2386 {
2387 THUMB16_INSN (0x4778), /* bx pc */
2388 THUMB16_INSN (0x46c0), /* nop */
2389 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2390 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2391 ARM_INSN (0xe12fff1c), /* bx ip */
2392 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2393 };
2394
2395 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2396 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2397 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2398 {
2399 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2400 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2401 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2402 };
2403
2404 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2405 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2406 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2407 {
2408 THUMB16_INSN (0x4778), /* bx pc */
2409 THUMB16_INSN (0x46c0), /* nop */
2410 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2411 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2412 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2413 };
2414
2415 /* Cortex-A8 erratum-workaround stubs. */
2416
2417 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2418 can't use a conditional branch to reach this stub). */
2419
2420 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2421 {
2422 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2423 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2424 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2425 };
2426
2427 /* Stub used for b.w and bl.w instructions. */
2428
2429 static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2430 {
2431 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2432 };
2433
2434 static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2435 {
2436 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2437 };
2438
2439 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2440 instruction (which switches to ARM mode) to point to this stub. Jump to the
2441 real destination using an ARM-mode branch. */
2442
2443 static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2444 {
2445 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2446 };
2447
2448 /* For each section group there can be a specially created linker section
2449 to hold the stubs for that group. The name of the stub section is based
2450 upon the name of another section within that group with the suffix below
2451 applied.
2452
2453 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2454 create what appeared to be a linker stub section when it actually
2455 contained user code/data. For example, consider this fragment:
2456
2457 const char * stubborn_problems[] = { "np" };
2458
2459 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2460 section called:
2461
2462 .data.rel.local.stubborn_problems
2463
2464 This then causes problems in arm32_arm_build_stubs() as it triggers:
2465
2466 // Ignore non-stub sections.
2467 if (!strstr (stub_sec->name, STUB_SUFFIX))
2468 continue;
2469
2470 And so the section would be ignored instead of being processed. Hence
2471 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2472 C identifier. */
2473 #define STUB_SUFFIX ".__stub"
2474
2475 /* One entry per long/short branch stub defined above. */
2476 #define DEF_STUBS \
2477 DEF_STUB(long_branch_any_any) \
2478 DEF_STUB(long_branch_v4t_arm_thumb) \
2479 DEF_STUB(long_branch_thumb_only) \
2480 DEF_STUB(long_branch_v4t_thumb_thumb) \
2481 DEF_STUB(long_branch_v4t_thumb_arm) \
2482 DEF_STUB(short_branch_v4t_thumb_arm) \
2483 DEF_STUB(long_branch_any_arm_pic) \
2484 DEF_STUB(long_branch_any_thumb_pic) \
2485 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2486 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2487 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2488 DEF_STUB(long_branch_thumb_only_pic) \
2489 DEF_STUB(long_branch_any_tls_pic) \
2490 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2491 DEF_STUB(a8_veneer_b_cond) \
2492 DEF_STUB(a8_veneer_b) \
2493 DEF_STUB(a8_veneer_bl) \
2494 DEF_STUB(a8_veneer_blx)
2495
2496 #define DEF_STUB(x) arm_stub_##x,
2497 enum elf32_arm_stub_type
2498 {
2499 arm_stub_none,
2500 DEF_STUBS
2501 /* Note the first a8_veneer type */
2502 arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond
2503 };
2504 #undef DEF_STUB
2505
2506 typedef struct
2507 {
2508 const insn_sequence* template_sequence;
2509 int template_size;
2510 } stub_def;
2511
2512 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2513 static const stub_def stub_definitions[] =
2514 {
2515 {NULL, 0},
2516 DEF_STUBS
2517 };
2518
2519 struct elf32_arm_stub_hash_entry
2520 {
2521 /* Base hash table entry structure. */
2522 struct bfd_hash_entry root;
2523
2524 /* The stub section. */
2525 asection *stub_sec;
2526
2527 /* Offset within stub_sec of the beginning of this stub. */
2528 bfd_vma stub_offset;
2529
2530 /* Given the symbol's value and its section we can determine its final
2531 value when building the stubs (so the stub knows where to jump). */
2532 bfd_vma target_value;
2533 asection *target_section;
2534
2535 /* Offset to apply to relocation referencing target_value. */
2536 bfd_vma target_addend;
2537
2538 /* The instruction which caused this stub to be generated (only valid for
2539 Cortex-A8 erratum workaround stubs at present). */
2540 unsigned long orig_insn;
2541
2542 /* The stub type. */
2543 enum elf32_arm_stub_type stub_type;
2544 /* Its encoding size in bytes. */
2545 int stub_size;
2546 /* Its template. */
2547 const insn_sequence *stub_template;
2548 /* The size of the template (number of entries). */
2549 int stub_template_size;
2550
2551 /* The symbol table entry, if any, that this was derived from. */
2552 struct elf32_arm_link_hash_entry *h;
2553
2554 /* Type of branch. */
2555 enum arm_st_branch_type branch_type;
2556
2557 /* Where this stub is being called from, or, in the case of combined
2558 stub sections, the first input section in the group. */
2559 asection *id_sec;
2560
2561 /* The name for the local symbol at the start of this stub. The
2562 stub name in the hash table has to be unique; this does not, so
2563 it can be friendlier. */
2564 char *output_name;
2565 };
2566
2567 /* Used to build a map of a section. This is required for mixed-endian
2568 code/data. */
2569
2570 typedef struct elf32_elf_section_map
2571 {
2572 bfd_vma vma;
2573 char type;
2574 }
2575 elf32_arm_section_map;
2576
2577 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2578
2579 typedef enum
2580 {
2581 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2582 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2583 VFP11_ERRATUM_ARM_VENEER,
2584 VFP11_ERRATUM_THUMB_VENEER
2585 }
2586 elf32_vfp11_erratum_type;
2587
2588 typedef struct elf32_vfp11_erratum_list
2589 {
2590 struct elf32_vfp11_erratum_list *next;
2591 bfd_vma vma;
2592 union
2593 {
2594 struct
2595 {
2596 struct elf32_vfp11_erratum_list *veneer;
2597 unsigned int vfp_insn;
2598 } b;
2599 struct
2600 {
2601 struct elf32_vfp11_erratum_list *branch;
2602 unsigned int id;
2603 } v;
2604 } u;
2605 elf32_vfp11_erratum_type type;
2606 }
2607 elf32_vfp11_erratum_list;
2608
2609 typedef enum
2610 {
2611 DELETE_EXIDX_ENTRY,
2612 INSERT_EXIDX_CANTUNWIND_AT_END
2613 }
2614 arm_unwind_edit_type;
2615
2616 /* A (sorted) list of edits to apply to an unwind table. */
2617 typedef struct arm_unwind_table_edit
2618 {
2619 arm_unwind_edit_type type;
2620 /* Note: we sometimes want to insert an unwind entry corresponding to a
2621 section different from the one we're currently writing out, so record the
2622 (text) section this edit relates to here. */
2623 asection *linked_section;
2624 unsigned int index;
2625 struct arm_unwind_table_edit *next;
2626 }
2627 arm_unwind_table_edit;
2628
2629 typedef struct _arm_elf_section_data
2630 {
2631 /* Information about mapping symbols. */
2632 struct bfd_elf_section_data elf;
2633 unsigned int mapcount;
2634 unsigned int mapsize;
2635 elf32_arm_section_map *map;
2636 /* Information about CPU errata. */
2637 unsigned int erratumcount;
2638 elf32_vfp11_erratum_list *erratumlist;
2639 /* Information about unwind tables. */
2640 union
2641 {
2642 /* Unwind info attached to a text section. */
2643 struct
2644 {
2645 asection *arm_exidx_sec;
2646 } text;
2647
2648 /* Unwind info attached to an .ARM.exidx section. */
2649 struct
2650 {
2651 arm_unwind_table_edit *unwind_edit_list;
2652 arm_unwind_table_edit *unwind_edit_tail;
2653 } exidx;
2654 } u;
2655 }
2656 _arm_elf_section_data;
2657
2658 #define elf32_arm_section_data(sec) \
2659 ((_arm_elf_section_data *) elf_section_data (sec))
2660
2661 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2662 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2663 so may be created multiple times: we use an array of these entries whilst
2664 relaxing which we can refresh easily, then create stubs for each potentially
2665 erratum-triggering instruction once we've settled on a solution. */
2666
2667 struct a8_erratum_fix
2668 {
2669 bfd *input_bfd;
2670 asection *section;
2671 bfd_vma offset;
2672 bfd_vma addend;
2673 unsigned long orig_insn;
2674 char *stub_name;
2675 enum elf32_arm_stub_type stub_type;
2676 enum arm_st_branch_type branch_type;
2677 };
2678
2679 /* A table of relocs applied to branches which might trigger Cortex-A8
2680 erratum. */
2681
2682 struct a8_erratum_reloc
2683 {
2684 bfd_vma from;
2685 bfd_vma destination;
2686 struct elf32_arm_link_hash_entry *hash;
2687 const char *sym_name;
2688 unsigned int r_type;
2689 enum arm_st_branch_type branch_type;
2690 bfd_boolean non_a8_stub;
2691 };
2692
2693 /* The size of the thread control block. */
2694 #define TCB_SIZE 8
2695
2696 /* ARM-specific information about a PLT entry, over and above the usual
2697 gotplt_union. */
2698 struct arm_plt_info
2699 {
2700 /* We reference count Thumb references to a PLT entry separately,
2701 so that we can emit the Thumb trampoline only if needed. */
2702 bfd_signed_vma thumb_refcount;
2703
2704 /* Some references from Thumb code may be eliminated by BL->BLX
2705 conversion, so record them separately. */
2706 bfd_signed_vma maybe_thumb_refcount;
2707
2708 /* How many of the recorded PLT accesses were from non-call relocations.
2709 This information is useful when deciding whether anything takes the
2710 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2711 non-call references to the function should resolve directly to the
2712 real runtime target. */
2713 unsigned int noncall_refcount;
2714
2715 /* Since PLT entries have variable size if the Thumb prologue is
2716 used, we need to record the index into .got.plt instead of
2717 recomputing it from the PLT offset. */
2718 bfd_signed_vma got_offset;
2719 };
2720
2721 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
2722 struct arm_local_iplt_info
2723 {
2724 /* The information that is usually found in the generic ELF part of
2725 the hash table entry. */
2726 union gotplt_union root;
2727
2728 /* The information that is usually found in the ARM-specific part of
2729 the hash table entry. */
2730 struct arm_plt_info arm;
2731
2732 /* A list of all potential dynamic relocations against this symbol. */
2733 struct elf_dyn_relocs *dyn_relocs;
2734 };
2735
2736 struct elf_arm_obj_tdata
2737 {
2738 struct elf_obj_tdata root;
2739
2740 /* tls_type for each local got entry. */
2741 char *local_got_tls_type;
2742
2743 /* GOTPLT entries for TLS descriptors. */
2744 bfd_vma *local_tlsdesc_gotent;
2745
2746 /* Information for local symbols that need entries in .iplt. */
2747 struct arm_local_iplt_info **local_iplt;
2748
2749 /* Zero to warn when linking objects with incompatible enum sizes. */
2750 int no_enum_size_warning;
2751
2752 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2753 int no_wchar_size_warning;
2754 };
2755
2756 #define elf_arm_tdata(bfd) \
2757 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
2758
2759 #define elf32_arm_local_got_tls_type(bfd) \
2760 (elf_arm_tdata (bfd)->local_got_tls_type)
2761
2762 #define elf32_arm_local_tlsdesc_gotent(bfd) \
2763 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2764
2765 #define elf32_arm_local_iplt(bfd) \
2766 (elf_arm_tdata (bfd)->local_iplt)
2767
2768 #define is_arm_elf(bfd) \
2769 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2770 && elf_tdata (bfd) != NULL \
2771 && elf_object_id (bfd) == ARM_ELF_DATA)
2772
2773 static bfd_boolean
2774 elf32_arm_mkobject (bfd *abfd)
2775 {
2776 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
2777 ARM_ELF_DATA);
2778 }
2779
2780 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2781
2782 /* Arm ELF linker hash entry. */
2783 struct elf32_arm_link_hash_entry
2784 {
2785 struct elf_link_hash_entry root;
2786
2787 /* Track dynamic relocs copied for this symbol. */
2788 struct elf_dyn_relocs *dyn_relocs;
2789
2790 /* ARM-specific PLT information. */
2791 struct arm_plt_info plt;
2792
2793 #define GOT_UNKNOWN 0
2794 #define GOT_NORMAL 1
2795 #define GOT_TLS_GD 2
2796 #define GOT_TLS_IE 4
2797 #define GOT_TLS_GDESC 8
2798 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
2799 unsigned int tls_type : 8;
2800
2801 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
2802 unsigned int is_iplt : 1;
2803
2804 unsigned int unused : 23;
2805
2806 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
2807 starting at the end of the jump table. */
2808 bfd_vma tlsdesc_got;
2809
2810 /* The symbol marking the real symbol location for exported thumb
2811 symbols with Arm stubs. */
2812 struct elf_link_hash_entry *export_glue;
2813
2814 /* A pointer to the most recently used stub hash entry against this
2815 symbol. */
2816 struct elf32_arm_stub_hash_entry *stub_cache;
2817 };
2818
2819 /* Traverse an arm ELF linker hash table. */
2820 #define elf32_arm_link_hash_traverse(table, func, info) \
2821 (elf_link_hash_traverse \
2822 (&(table)->root, \
2823 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
2824 (info)))
2825
2826 /* Get the ARM elf linker hash table from a link_info structure. */
2827 #define elf32_arm_hash_table(info) \
2828 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
2829 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
2830
2831 #define arm_stub_hash_lookup(table, string, create, copy) \
2832 ((struct elf32_arm_stub_hash_entry *) \
2833 bfd_hash_lookup ((table), (string), (create), (copy)))
2834
2835 /* Array to keep track of which stub sections have been created, and
2836 information on stub grouping. */
2837 struct map_stub
2838 {
2839 /* This is the section to which stubs in the group will be
2840 attached. */
2841 asection *link_sec;
2842 /* The stub section. */
2843 asection *stub_sec;
2844 };
2845
2846 #define elf32_arm_compute_jump_table_size(htab) \
2847 ((htab)->next_tls_desc_index * 4)
2848
2849 /* ARM ELF linker hash table. */
2850 struct elf32_arm_link_hash_table
2851 {
2852 /* The main hash table. */
2853 struct elf_link_hash_table root;
2854
2855 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
2856 bfd_size_type thumb_glue_size;
2857
2858 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
2859 bfd_size_type arm_glue_size;
2860
2861 /* The size in bytes of section containing the ARMv4 BX veneers. */
2862 bfd_size_type bx_glue_size;
2863
2864 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2865 veneer has been populated. */
2866 bfd_vma bx_glue_offset[15];
2867
2868 /* The size in bytes of the section containing glue for VFP11 erratum
2869 veneers. */
2870 bfd_size_type vfp11_erratum_glue_size;
2871
2872 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
2873 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
2874 elf32_arm_write_section(). */
2875 struct a8_erratum_fix *a8_erratum_fixes;
2876 unsigned int num_a8_erratum_fixes;
2877
2878 /* An arbitrary input BFD chosen to hold the glue sections. */
2879 bfd * bfd_of_glue_owner;
2880
2881 /* Nonzero to output a BE8 image. */
2882 int byteswap_code;
2883
2884 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
2885 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
2886 int target1_is_rel;
2887
2888 /* The relocation to use for R_ARM_TARGET2 relocations. */
2889 int target2_reloc;
2890
2891 /* 0 = Ignore R_ARM_V4BX.
2892 1 = Convert BX to MOV PC.
2893 2 = Generate v4 interworing stubs. */
2894 int fix_v4bx;
2895
2896 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
2897 int fix_cortex_a8;
2898
2899 /* Whether we should fix the ARM1176 BLX immediate issue. */
2900 int fix_arm1176;
2901
2902 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2903 int use_blx;
2904
2905 /* What sort of code sequences we should look for which may trigger the
2906 VFP11 denorm erratum. */
2907 bfd_arm_vfp11_fix vfp11_fix;
2908
2909 /* Global counter for the number of fixes we have emitted. */
2910 int num_vfp11_fixes;
2911
2912 /* Nonzero to force PIC branch veneers. */
2913 int pic_veneer;
2914
2915 /* The number of bytes in the initial entry in the PLT. */
2916 bfd_size_type plt_header_size;
2917
2918 /* The number of bytes in the subsequent PLT etries. */
2919 bfd_size_type plt_entry_size;
2920
2921 /* True if the target system is VxWorks. */
2922 int vxworks_p;
2923
2924 /* True if the target system is Symbian OS. */
2925 int symbian_p;
2926
2927 /* True if the target system is Native Client. */
2928 int nacl_p;
2929
2930 /* True if the target uses REL relocations. */
2931 int use_rel;
2932
2933 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
2934 bfd_vma next_tls_desc_index;
2935
2936 /* How many R_ARM_TLS_DESC relocations were generated so far. */
2937 bfd_vma num_tls_desc;
2938
2939 /* Short-cuts to get to dynamic linker sections. */
2940 asection *sdynbss;
2941 asection *srelbss;
2942
2943 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2944 asection *srelplt2;
2945
2946 /* The offset into splt of the PLT entry for the TLS descriptor
2947 resolver. Special values are 0, if not necessary (or not found
2948 to be necessary yet), and -1 if needed but not determined
2949 yet. */
2950 bfd_vma dt_tlsdesc_plt;
2951
2952 /* The offset into sgot of the GOT entry used by the PLT entry
2953 above. */
2954 bfd_vma dt_tlsdesc_got;
2955
2956 /* Offset in .plt section of tls_arm_trampoline. */
2957 bfd_vma tls_trampoline;
2958
2959 /* Data for R_ARM_TLS_LDM32 relocations. */
2960 union
2961 {
2962 bfd_signed_vma refcount;
2963 bfd_vma offset;
2964 } tls_ldm_got;
2965
2966 /* Small local sym cache. */
2967 struct sym_cache sym_cache;
2968
2969 /* For convenience in allocate_dynrelocs. */
2970 bfd * obfd;
2971
2972 /* The amount of space used by the reserved portion of the sgotplt
2973 section, plus whatever space is used by the jump slots. */
2974 bfd_vma sgotplt_jump_table_size;
2975
2976 /* The stub hash table. */
2977 struct bfd_hash_table stub_hash_table;
2978
2979 /* Linker stub bfd. */
2980 bfd *stub_bfd;
2981
2982 /* Linker call-backs. */
2983 asection * (*add_stub_section) (const char *, asection *);
2984 void (*layout_sections_again) (void);
2985
2986 /* Array to keep track of which stub sections have been created, and
2987 information on stub grouping. */
2988 struct map_stub *stub_group;
2989
2990 /* Number of elements in stub_group. */
2991 int top_id;
2992
2993 /* Assorted information used by elf32_arm_size_stubs. */
2994 unsigned int bfd_count;
2995 int top_index;
2996 asection **input_list;
2997 };
2998
2999 /* Create an entry in an ARM ELF linker hash table. */
3000
3001 static struct bfd_hash_entry *
3002 elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
3003 struct bfd_hash_table * table,
3004 const char * string)
3005 {
3006 struct elf32_arm_link_hash_entry * ret =
3007 (struct elf32_arm_link_hash_entry *) entry;
3008
3009 /* Allocate the structure if it has not already been allocated by a
3010 subclass. */
3011 if (ret == NULL)
3012 ret = (struct elf32_arm_link_hash_entry *)
3013 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
3014 if (ret == NULL)
3015 return (struct bfd_hash_entry *) ret;
3016
3017 /* Call the allocation method of the superclass. */
3018 ret = ((struct elf32_arm_link_hash_entry *)
3019 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3020 table, string));
3021 if (ret != NULL)
3022 {
3023 ret->dyn_relocs = NULL;
3024 ret->tls_type = GOT_UNKNOWN;
3025 ret->tlsdesc_got = (bfd_vma) -1;
3026 ret->plt.thumb_refcount = 0;
3027 ret->plt.maybe_thumb_refcount = 0;
3028 ret->plt.noncall_refcount = 0;
3029 ret->plt.got_offset = -1;
3030 ret->is_iplt = FALSE;
3031 ret->export_glue = NULL;
3032
3033 ret->stub_cache = NULL;
3034 }
3035
3036 return (struct bfd_hash_entry *) ret;
3037 }
3038
3039 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3040 symbols. */
3041
3042 static bfd_boolean
3043 elf32_arm_allocate_local_sym_info (bfd *abfd)
3044 {
3045 if (elf_local_got_refcounts (abfd) == NULL)
3046 {
3047 bfd_size_type num_syms;
3048 bfd_size_type size;
3049 char *data;
3050
3051 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3052 size = num_syms * (sizeof (bfd_signed_vma)
3053 + sizeof (struct arm_local_iplt_info *)
3054 + sizeof (bfd_vma)
3055 + sizeof (char));
3056 data = bfd_zalloc (abfd, size);
3057 if (data == NULL)
3058 return FALSE;
3059
3060 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3061 data += num_syms * sizeof (bfd_signed_vma);
3062
3063 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3064 data += num_syms * sizeof (struct arm_local_iplt_info *);
3065
3066 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3067 data += num_syms * sizeof (bfd_vma);
3068
3069 elf32_arm_local_got_tls_type (abfd) = data;
3070 }
3071 return TRUE;
3072 }
3073
3074 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3075 to input bfd ABFD. Create the information if it doesn't already exist.
3076 Return null if an allocation fails. */
3077
3078 static struct arm_local_iplt_info *
3079 elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3080 {
3081 struct arm_local_iplt_info **ptr;
3082
3083 if (!elf32_arm_allocate_local_sym_info (abfd))
3084 return NULL;
3085
3086 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3087 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3088 if (*ptr == NULL)
3089 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3090 return *ptr;
3091 }
3092
3093 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3094 in ABFD's symbol table. If the symbol is global, H points to its
3095 hash table entry, otherwise H is null.
3096
3097 Return true if the symbol does have PLT information. When returning
3098 true, point *ROOT_PLT at the target-independent reference count/offset
3099 union and *ARM_PLT at the ARM-specific information. */
3100
3101 static bfd_boolean
3102 elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_entry *h,
3103 unsigned long r_symndx, union gotplt_union **root_plt,
3104 struct arm_plt_info **arm_plt)
3105 {
3106 struct arm_local_iplt_info *local_iplt;
3107
3108 if (h != NULL)
3109 {
3110 *root_plt = &h->root.plt;
3111 *arm_plt = &h->plt;
3112 return TRUE;
3113 }
3114
3115 if (elf32_arm_local_iplt (abfd) == NULL)
3116 return FALSE;
3117
3118 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3119 if (local_iplt == NULL)
3120 return FALSE;
3121
3122 *root_plt = &local_iplt->root;
3123 *arm_plt = &local_iplt->arm;
3124 return TRUE;
3125 }
3126
3127 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3128 before it. */
3129
3130 static bfd_boolean
3131 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3132 struct arm_plt_info *arm_plt)
3133 {
3134 struct elf32_arm_link_hash_table *htab;
3135
3136 htab = elf32_arm_hash_table (info);
3137 return (arm_plt->thumb_refcount != 0
3138 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0));
3139 }
3140
3141 /* Return a pointer to the head of the dynamic reloc list that should
3142 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3143 ABFD's symbol table. Return null if an error occurs. */
3144
3145 static struct elf_dyn_relocs **
3146 elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3147 Elf_Internal_Sym *isym)
3148 {
3149 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3150 {
3151 struct arm_local_iplt_info *local_iplt;
3152
3153 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3154 if (local_iplt == NULL)
3155 return NULL;
3156 return &local_iplt->dyn_relocs;
3157 }
3158 else
3159 {
3160 /* Track dynamic relocs needed for local syms too.
3161 We really need local syms available to do this
3162 easily. Oh well. */
3163 asection *s;
3164 void *vpp;
3165
3166 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3167 if (s == NULL)
3168 abort ();
3169
3170 vpp = &elf_section_data (s)->local_dynrel;
3171 return (struct elf_dyn_relocs **) vpp;
3172 }
3173 }
3174
3175 /* Initialize an entry in the stub hash table. */
3176
3177 static struct bfd_hash_entry *
3178 stub_hash_newfunc (struct bfd_hash_entry *entry,
3179 struct bfd_hash_table *table,
3180 const char *string)
3181 {
3182 /* Allocate the structure if it has not already been allocated by a
3183 subclass. */
3184 if (entry == NULL)
3185 {
3186 entry = (struct bfd_hash_entry *)
3187 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
3188 if (entry == NULL)
3189 return entry;
3190 }
3191
3192 /* Call the allocation method of the superclass. */
3193 entry = bfd_hash_newfunc (entry, table, string);
3194 if (entry != NULL)
3195 {
3196 struct elf32_arm_stub_hash_entry *eh;
3197
3198 /* Initialize the local fields. */
3199 eh = (struct elf32_arm_stub_hash_entry *) entry;
3200 eh->stub_sec = NULL;
3201 eh->stub_offset = 0;
3202 eh->target_value = 0;
3203 eh->target_section = NULL;
3204 eh->target_addend = 0;
3205 eh->orig_insn = 0;
3206 eh->stub_type = arm_stub_none;
3207 eh->stub_size = 0;
3208 eh->stub_template = NULL;
3209 eh->stub_template_size = 0;
3210 eh->h = NULL;
3211 eh->id_sec = NULL;
3212 eh->output_name = NULL;
3213 }
3214
3215 return entry;
3216 }
3217
3218 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3219 shortcuts to them in our hash table. */
3220
3221 static bfd_boolean
3222 create_got_section (bfd *dynobj, struct bfd_link_info *info)
3223 {
3224 struct elf32_arm_link_hash_table *htab;
3225
3226 htab = elf32_arm_hash_table (info);
3227 if (htab == NULL)
3228 return FALSE;
3229
3230 /* BPABI objects never have a GOT, or associated sections. */
3231 if (htab->symbian_p)
3232 return TRUE;
3233
3234 if (! _bfd_elf_create_got_section (dynobj, info))
3235 return FALSE;
3236
3237 return TRUE;
3238 }
3239
3240 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3241
3242 static bfd_boolean
3243 create_ifunc_sections (struct bfd_link_info *info)
3244 {
3245 struct elf32_arm_link_hash_table *htab;
3246 const struct elf_backend_data *bed;
3247 bfd *dynobj;
3248 asection *s;
3249 flagword flags;
3250
3251 htab = elf32_arm_hash_table (info);
3252 dynobj = htab->root.dynobj;
3253 bed = get_elf_backend_data (dynobj);
3254 flags = bed->dynamic_sec_flags;
3255
3256 if (htab->root.iplt == NULL)
3257 {
3258 s = bfd_make_section_with_flags (dynobj, ".iplt",
3259 flags | SEC_READONLY | SEC_CODE);
3260 if (s == NULL
3261 || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment))
3262 return FALSE;
3263 htab->root.iplt = s;
3264 }
3265
3266 if (htab->root.irelplt == NULL)
3267 {
3268 s = bfd_make_section_with_flags (dynobj, RELOC_SECTION (htab, ".iplt"),
3269 flags | SEC_READONLY);
3270 if (s == NULL
3271 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3272 return FALSE;
3273 htab->root.irelplt = s;
3274 }
3275
3276 if (htab->root.igotplt == NULL)
3277 {
3278 s = bfd_make_section_with_flags (dynobj, ".igot.plt", flags);
3279 if (s == NULL
3280 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3281 return FALSE;
3282 htab->root.igotplt = s;
3283 }
3284 return TRUE;
3285 }
3286
3287 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3288 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3289 hash table. */
3290
3291 static bfd_boolean
3292 elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
3293 {
3294 struct elf32_arm_link_hash_table *htab;
3295
3296 htab = elf32_arm_hash_table (info);
3297 if (htab == NULL)
3298 return FALSE;
3299
3300 if (!htab->root.sgot && !create_got_section (dynobj, info))
3301 return FALSE;
3302
3303 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3304 return FALSE;
3305
3306 htab->sdynbss = bfd_get_section_by_name (dynobj, ".dynbss");
3307 if (!info->shared)
3308 htab->srelbss = bfd_get_section_by_name (dynobj,
3309 RELOC_SECTION (htab, ".bss"));
3310
3311 if (htab->vxworks_p)
3312 {
3313 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3314 return FALSE;
3315
3316 if (info->shared)
3317 {
3318 htab->plt_header_size = 0;
3319 htab->plt_entry_size
3320 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3321 }
3322 else
3323 {
3324 htab->plt_header_size
3325 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3326 htab->plt_entry_size
3327 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3328 }
3329 }
3330
3331 if (!htab->root.splt
3332 || !htab->root.srelplt
3333 || !htab->sdynbss
3334 || (!info->shared && !htab->srelbss))
3335 abort ();
3336
3337 return TRUE;
3338 }
3339
3340 /* Copy the extra info we tack onto an elf_link_hash_entry. */
3341
3342 static void
3343 elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
3344 struct elf_link_hash_entry *dir,
3345 struct elf_link_hash_entry *ind)
3346 {
3347 struct elf32_arm_link_hash_entry *edir, *eind;
3348
3349 edir = (struct elf32_arm_link_hash_entry *) dir;
3350 eind = (struct elf32_arm_link_hash_entry *) ind;
3351
3352 if (eind->dyn_relocs != NULL)
3353 {
3354 if (edir->dyn_relocs != NULL)
3355 {
3356 struct elf_dyn_relocs **pp;
3357 struct elf_dyn_relocs *p;
3358
3359 /* Add reloc counts against the indirect sym to the direct sym
3360 list. Merge any entries against the same section. */
3361 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
3362 {
3363 struct elf_dyn_relocs *q;
3364
3365 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3366 if (q->sec == p->sec)
3367 {
3368 q->pc_count += p->pc_count;
3369 q->count += p->count;
3370 *pp = p->next;
3371 break;
3372 }
3373 if (q == NULL)
3374 pp = &p->next;
3375 }
3376 *pp = edir->dyn_relocs;
3377 }
3378
3379 edir->dyn_relocs = eind->dyn_relocs;
3380 eind->dyn_relocs = NULL;
3381 }
3382
3383 if (ind->root.type == bfd_link_hash_indirect)
3384 {
3385 /* Copy over PLT info. */
3386 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
3387 eind->plt.thumb_refcount = 0;
3388 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
3389 eind->plt.maybe_thumb_refcount = 0;
3390 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
3391 eind->plt.noncall_refcount = 0;
3392
3393 /* We should only allocate a function to .iplt once the final
3394 symbol information is known. */
3395 BFD_ASSERT (!eind->is_iplt);
3396
3397 if (dir->got.refcount <= 0)
3398 {
3399 edir->tls_type = eind->tls_type;
3400 eind->tls_type = GOT_UNKNOWN;
3401 }
3402 }
3403
3404 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3405 }
3406
3407 /* Create an ARM elf linker hash table. */
3408
3409 static struct bfd_link_hash_table *
3410 elf32_arm_link_hash_table_create (bfd *abfd)
3411 {
3412 struct elf32_arm_link_hash_table *ret;
3413 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
3414
3415 ret = (struct elf32_arm_link_hash_table *) bfd_malloc (amt);
3416 if (ret == NULL)
3417 return NULL;
3418
3419 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
3420 elf32_arm_link_hash_newfunc,
3421 sizeof (struct elf32_arm_link_hash_entry),
3422 ARM_ELF_DATA))
3423 {
3424 free (ret);
3425 return NULL;
3426 }
3427
3428 ret->sdynbss = NULL;
3429 ret->srelbss = NULL;
3430 ret->srelplt2 = NULL;
3431 ret->dt_tlsdesc_plt = 0;
3432 ret->dt_tlsdesc_got = 0;
3433 ret->tls_trampoline = 0;
3434 ret->next_tls_desc_index = 0;
3435 ret->num_tls_desc = 0;
3436 ret->thumb_glue_size = 0;
3437 ret->arm_glue_size = 0;
3438 ret->bx_glue_size = 0;
3439 memset (ret->bx_glue_offset, 0, sizeof (ret->bx_glue_offset));
3440 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3441 ret->vfp11_erratum_glue_size = 0;
3442 ret->num_vfp11_fixes = 0;
3443 ret->fix_cortex_a8 = 0;
3444 ret->fix_arm1176 = 0;
3445 ret->bfd_of_glue_owner = NULL;
3446 ret->byteswap_code = 0;
3447 ret->target1_is_rel = 0;
3448 ret->target2_reloc = R_ARM_NONE;
3449 #ifdef FOUR_WORD_PLT
3450 ret->plt_header_size = 16;
3451 ret->plt_entry_size = 16;
3452 #else
3453 ret->plt_header_size = 20;
3454 ret->plt_entry_size = 12;
3455 #endif
3456 ret->fix_v4bx = 0;
3457 ret->use_blx = 0;
3458 ret->vxworks_p = 0;
3459 ret->symbian_p = 0;
3460 ret->nacl_p = 0;
3461 ret->use_rel = 1;
3462 ret->sym_cache.abfd = NULL;
3463 ret->obfd = abfd;
3464 ret->tls_ldm_got.refcount = 0;
3465 ret->stub_bfd = NULL;
3466 ret->add_stub_section = NULL;
3467 ret->layout_sections_again = NULL;
3468 ret->stub_group = NULL;
3469 ret->top_id = 0;
3470 ret->bfd_count = 0;
3471 ret->top_index = 0;
3472 ret->input_list = NULL;
3473
3474 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
3475 sizeof (struct elf32_arm_stub_hash_entry)))
3476 {
3477 free (ret);
3478 return NULL;
3479 }
3480
3481 return &ret->root.root;
3482 }
3483
3484 /* Free the derived linker hash table. */
3485
3486 static void
3487 elf32_arm_hash_table_free (struct bfd_link_hash_table *hash)
3488 {
3489 struct elf32_arm_link_hash_table *ret
3490 = (struct elf32_arm_link_hash_table *) hash;
3491
3492 bfd_hash_table_free (&ret->stub_hash_table);
3493 _bfd_generic_link_hash_table_free (hash);
3494 }
3495
3496 /* Determine if we're dealing with a Thumb only architecture. */
3497
3498 static bfd_boolean
3499 using_thumb_only (struct elf32_arm_link_hash_table *globals)
3500 {
3501 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3502 Tag_CPU_arch);
3503 int profile;
3504
3505 if (arch == TAG_CPU_ARCH_V6_M || arch == TAG_CPU_ARCH_V6S_M)
3506 return TRUE;
3507
3508 if (arch != TAG_CPU_ARCH_V7 && arch != TAG_CPU_ARCH_V7E_M)
3509 return FALSE;
3510
3511 profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3512 Tag_CPU_arch_profile);
3513
3514 return profile == 'M';
3515 }
3516
3517 /* Determine if we're dealing with a Thumb-2 object. */
3518
3519 static bfd_boolean
3520 using_thumb2 (struct elf32_arm_link_hash_table *globals)
3521 {
3522 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3523 Tag_CPU_arch);
3524 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
3525 }
3526
3527 /* Determine what kind of NOPs are available. */
3528
3529 static bfd_boolean
3530 arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3531 {
3532 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3533 Tag_CPU_arch);
3534 return arch == TAG_CPU_ARCH_V6T2
3535 || arch == TAG_CPU_ARCH_V6K
3536 || arch == TAG_CPU_ARCH_V7
3537 || arch == TAG_CPU_ARCH_V7E_M;
3538 }
3539
3540 static bfd_boolean
3541 arch_has_thumb2_nop (struct elf32_arm_link_hash_table *globals)
3542 {
3543 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3544 Tag_CPU_arch);
3545 return (arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7
3546 || arch == TAG_CPU_ARCH_V7E_M);
3547 }
3548
3549 static bfd_boolean
3550 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3551 {
3552 switch (stub_type)
3553 {
3554 case arm_stub_long_branch_thumb_only:
3555 case arm_stub_long_branch_v4t_thumb_arm:
3556 case arm_stub_short_branch_v4t_thumb_arm:
3557 case arm_stub_long_branch_v4t_thumb_arm_pic:
3558 case arm_stub_long_branch_v4t_thumb_tls_pic:
3559 case arm_stub_long_branch_thumb_only_pic:
3560 return TRUE;
3561 case arm_stub_none:
3562 BFD_FAIL ();
3563 return FALSE;
3564 break;
3565 default:
3566 return FALSE;
3567 }
3568 }
3569
3570 /* Determine the type of stub needed, if any, for a call. */
3571
3572 static enum elf32_arm_stub_type
3573 arm_type_of_stub (struct bfd_link_info *info,
3574 asection *input_sec,
3575 const Elf_Internal_Rela *rel,
3576 unsigned char st_type,
3577 enum arm_st_branch_type *actual_branch_type,
3578 struct elf32_arm_link_hash_entry *hash,
3579 bfd_vma destination,
3580 asection *sym_sec,
3581 bfd *input_bfd,
3582 const char *name)
3583 {
3584 bfd_vma location;
3585 bfd_signed_vma branch_offset;
3586 unsigned int r_type;
3587 struct elf32_arm_link_hash_table * globals;
3588 int thumb2;
3589 int thumb_only;
3590 enum elf32_arm_stub_type stub_type = arm_stub_none;
3591 int use_plt = 0;
3592 enum arm_st_branch_type branch_type = *actual_branch_type;
3593 union gotplt_union *root_plt;
3594 struct arm_plt_info *arm_plt;
3595
3596 if (branch_type == ST_BRANCH_LONG)
3597 return stub_type;
3598
3599 globals = elf32_arm_hash_table (info);
3600 if (globals == NULL)
3601 return stub_type;
3602
3603 thumb_only = using_thumb_only (globals);
3604
3605 thumb2 = using_thumb2 (globals);
3606
3607 /* Determine where the call point is. */
3608 location = (input_sec->output_offset
3609 + input_sec->output_section->vma
3610 + rel->r_offset);
3611
3612 r_type = ELF32_R_TYPE (rel->r_info);
3613
3614 /* For TLS call relocs, it is the caller's responsibility to provide
3615 the address of the appropriate trampoline. */
3616 if (r_type != R_ARM_TLS_CALL
3617 && r_type != R_ARM_THM_TLS_CALL
3618 && elf32_arm_get_plt_info (input_bfd, hash, ELF32_R_SYM (rel->r_info),
3619 &root_plt, &arm_plt)
3620 && root_plt->offset != (bfd_vma) -1)
3621 {
3622 asection *splt;
3623
3624 if (hash == NULL || hash->is_iplt)
3625 splt = globals->root.iplt;
3626 else
3627 splt = globals->root.splt;
3628 if (splt != NULL)
3629 {
3630 use_plt = 1;
3631
3632 /* Note when dealing with PLT entries: the main PLT stub is in
3633 ARM mode, so if the branch is in Thumb mode, another
3634 Thumb->ARM stub will be inserted later just before the ARM
3635 PLT stub. We don't take this extra distance into account
3636 here, because if a long branch stub is needed, we'll add a
3637 Thumb->Arm one and branch directly to the ARM PLT entry
3638 because it avoids spreading offset corrections in several
3639 places. */
3640
3641 destination = (splt->output_section->vma
3642 + splt->output_offset
3643 + root_plt->offset);
3644 st_type = STT_FUNC;
3645 branch_type = ST_BRANCH_TO_ARM;
3646 }
3647 }
3648 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
3649 BFD_ASSERT (st_type != STT_GNU_IFUNC);
3650
3651 branch_offset = (bfd_signed_vma)(destination - location);
3652
3653 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3654 || r_type == R_ARM_THM_TLS_CALL)
3655 {
3656 /* Handle cases where:
3657 - this call goes too far (different Thumb/Thumb2 max
3658 distance)
3659 - it's a Thumb->Arm call and blx is not available, or it's a
3660 Thumb->Arm branch (not bl). A stub is needed in this case,
3661 but only if this call is not through a PLT entry. Indeed,
3662 PLT stubs handle mode switching already.
3663 */
3664 if ((!thumb2
3665 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3666 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3667 || (thumb2
3668 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3669 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
3670 || (branch_type == ST_BRANCH_TO_ARM
3671 && (((r_type == R_ARM_THM_CALL
3672 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
3673 || (r_type == R_ARM_THM_JUMP24))
3674 && !use_plt))
3675 {
3676 if (branch_type == ST_BRANCH_TO_THUMB)
3677 {
3678 /* Thumb to thumb. */
3679 if (!thumb_only)
3680 {
3681 stub_type = (info->shared | globals->pic_veneer)
3682 /* PIC stubs. */
3683 ? ((globals->use_blx
3684 && (r_type == R_ARM_THM_CALL))
3685 /* V5T and above. Stub starts with ARM code, so
3686 we must be able to switch mode before
3687 reaching it, which is only possible for 'bl'
3688 (ie R_ARM_THM_CALL relocation). */
3689 ? arm_stub_long_branch_any_thumb_pic
3690 /* On V4T, use Thumb code only. */
3691 : arm_stub_long_branch_v4t_thumb_thumb_pic)
3692
3693 /* non-PIC stubs. */
3694 : ((globals->use_blx
3695 && (r_type == R_ARM_THM_CALL))
3696 /* V5T and above. */
3697 ? arm_stub_long_branch_any_any
3698 /* V4T. */
3699 : arm_stub_long_branch_v4t_thumb_thumb);
3700 }
3701 else
3702 {
3703 stub_type = (info->shared | globals->pic_veneer)
3704 /* PIC stub. */
3705 ? arm_stub_long_branch_thumb_only_pic
3706 /* non-PIC stub. */
3707 : arm_stub_long_branch_thumb_only;
3708 }
3709 }
3710 else
3711 {
3712 /* Thumb to arm. */
3713 if (sym_sec != NULL
3714 && sym_sec->owner != NULL
3715 && !INTERWORK_FLAG (sym_sec->owner))
3716 {
3717 (*_bfd_error_handler)
3718 (_("%B(%s): warning: interworking not enabled.\n"
3719 " first occurrence: %B: Thumb call to ARM"),
3720 sym_sec->owner, input_bfd, name);
3721 }
3722
3723 stub_type =
3724 (info->shared | globals->pic_veneer)
3725 /* PIC stubs. */
3726 ? (r_type == R_ARM_THM_TLS_CALL
3727 /* TLS PIC stubs */
3728 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
3729 : arm_stub_long_branch_v4t_thumb_tls_pic)
3730 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3731 /* V5T PIC and above. */
3732 ? arm_stub_long_branch_any_arm_pic
3733 /* V4T PIC stub. */
3734 : arm_stub_long_branch_v4t_thumb_arm_pic))
3735
3736 /* non-PIC stubs. */
3737 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3738 /* V5T and above. */
3739 ? arm_stub_long_branch_any_any
3740 /* V4T. */
3741 : arm_stub_long_branch_v4t_thumb_arm);
3742
3743 /* Handle v4t short branches. */
3744 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
3745 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3746 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
3747 stub_type = arm_stub_short_branch_v4t_thumb_arm;
3748 }
3749 }
3750 }
3751 else if (r_type == R_ARM_CALL
3752 || r_type == R_ARM_JUMP24
3753 || r_type == R_ARM_PLT32
3754 || r_type == R_ARM_TLS_CALL)
3755 {
3756 if (branch_type == ST_BRANCH_TO_THUMB)
3757 {
3758 /* Arm to thumb. */
3759
3760 if (sym_sec != NULL
3761 && sym_sec->owner != NULL
3762 && !INTERWORK_FLAG (sym_sec->owner))
3763 {
3764 (*_bfd_error_handler)
3765 (_("%B(%s): warning: interworking not enabled.\n"
3766 " first occurrence: %B: ARM call to Thumb"),
3767 sym_sec->owner, input_bfd, name);
3768 }
3769
3770 /* We have an extra 2-bytes reach because of
3771 the mode change (bit 24 (H) of BLX encoding). */
3772 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3773 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
3774 || (r_type == R_ARM_CALL && !globals->use_blx)
3775 || (r_type == R_ARM_JUMP24)
3776 || (r_type == R_ARM_PLT32))
3777 {
3778 stub_type = (info->shared | globals->pic_veneer)
3779 /* PIC stubs. */
3780 ? ((globals->use_blx)
3781 /* V5T and above. */
3782 ? arm_stub_long_branch_any_thumb_pic
3783 /* V4T stub. */
3784 : arm_stub_long_branch_v4t_arm_thumb_pic)
3785
3786 /* non-PIC stubs. */
3787 : ((globals->use_blx)
3788 /* V5T and above. */
3789 ? arm_stub_long_branch_any_any
3790 /* V4T. */
3791 : arm_stub_long_branch_v4t_arm_thumb);
3792 }
3793 }
3794 else
3795 {
3796 /* Arm to arm. */
3797 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
3798 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
3799 {
3800 stub_type =
3801 (info->shared | globals->pic_veneer)
3802 /* PIC stubs. */
3803 ? (r_type == R_ARM_TLS_CALL
3804 /* TLS PIC Stub */
3805 ? arm_stub_long_branch_any_tls_pic
3806 : arm_stub_long_branch_any_arm_pic)
3807 /* non-PIC stubs. */
3808 : arm_stub_long_branch_any_any;
3809 }
3810 }
3811 }
3812
3813 /* If a stub is needed, record the actual destination type. */
3814 if (stub_type != arm_stub_none)
3815 *actual_branch_type = branch_type;
3816
3817 return stub_type;
3818 }
3819
3820 /* Build a name for an entry in the stub hash table. */
3821
3822 static char *
3823 elf32_arm_stub_name (const asection *input_section,
3824 const asection *sym_sec,
3825 const struct elf32_arm_link_hash_entry *hash,
3826 const Elf_Internal_Rela *rel,
3827 enum elf32_arm_stub_type stub_type)
3828 {
3829 char *stub_name;
3830 bfd_size_type len;
3831
3832 if (hash)
3833 {
3834 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
3835 stub_name = (char *) bfd_malloc (len);
3836 if (stub_name != NULL)
3837 sprintf (stub_name, "%08x_%s+%x_%d",
3838 input_section->id & 0xffffffff,
3839 hash->root.root.root.string,
3840 (int) rel->r_addend & 0xffffffff,
3841 (int) stub_type);
3842 }
3843 else
3844 {
3845 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
3846 stub_name = (char *) bfd_malloc (len);
3847 if (stub_name != NULL)
3848 sprintf (stub_name, "%08x_%x:%x+%x_%d",
3849 input_section->id & 0xffffffff,
3850 sym_sec->id & 0xffffffff,
3851 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
3852 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
3853 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
3854 (int) rel->r_addend & 0xffffffff,
3855 (int) stub_type);
3856 }
3857
3858 return stub_name;
3859 }
3860
3861 /* Look up an entry in the stub hash. Stub entries are cached because
3862 creating the stub name takes a bit of time. */
3863
3864 static struct elf32_arm_stub_hash_entry *
3865 elf32_arm_get_stub_entry (const asection *input_section,
3866 const asection *sym_sec,
3867 struct elf_link_hash_entry *hash,
3868 const Elf_Internal_Rela *rel,
3869 struct elf32_arm_link_hash_table *htab,
3870 enum elf32_arm_stub_type stub_type)
3871 {
3872 struct elf32_arm_stub_hash_entry *stub_entry;
3873 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
3874 const asection *id_sec;
3875
3876 if ((input_section->flags & SEC_CODE) == 0)
3877 return NULL;
3878
3879 /* If this input section is part of a group of sections sharing one
3880 stub section, then use the id of the first section in the group.
3881 Stub names need to include a section id, as there may well be
3882 more than one stub used to reach say, printf, and we need to
3883 distinguish between them. */
3884 id_sec = htab->stub_group[input_section->id].link_sec;
3885
3886 if (h != NULL && h->stub_cache != NULL
3887 && h->stub_cache->h == h
3888 && h->stub_cache->id_sec == id_sec
3889 && h->stub_cache->stub_type == stub_type)
3890 {
3891 stub_entry = h->stub_cache;
3892 }
3893 else
3894 {
3895 char *stub_name;
3896
3897 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
3898 if (stub_name == NULL)
3899 return NULL;
3900
3901 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
3902 stub_name, FALSE, FALSE);
3903 if (h != NULL)
3904 h->stub_cache = stub_entry;
3905
3906 free (stub_name);
3907 }
3908
3909 return stub_entry;
3910 }
3911
3912 /* Find or create a stub section. Returns a pointer to the stub section, and
3913 the section to which the stub section will be attached (in *LINK_SEC_P).
3914 LINK_SEC_P may be NULL. */
3915
3916 static asection *
3917 elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
3918 struct elf32_arm_link_hash_table *htab)
3919 {
3920 asection *link_sec;
3921 asection *stub_sec;
3922
3923 link_sec = htab->stub_group[section->id].link_sec;
3924 BFD_ASSERT (link_sec != NULL);
3925 stub_sec = htab->stub_group[section->id].stub_sec;
3926
3927 if (stub_sec == NULL)
3928 {
3929 stub_sec = htab->stub_group[link_sec->id].stub_sec;
3930 if (stub_sec == NULL)
3931 {
3932 size_t namelen;
3933 bfd_size_type len;
3934 char *s_name;
3935
3936 namelen = strlen (link_sec->name);
3937 len = namelen + sizeof (STUB_SUFFIX);
3938 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
3939 if (s_name == NULL)
3940 return NULL;
3941
3942 memcpy (s_name, link_sec->name, namelen);
3943 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
3944 stub_sec = (*htab->add_stub_section) (s_name, link_sec);
3945 if (stub_sec == NULL)
3946 return NULL;
3947 htab->stub_group[link_sec->id].stub_sec = stub_sec;
3948 }
3949 htab->stub_group[section->id].stub_sec = stub_sec;
3950 }
3951
3952 if (link_sec_p)
3953 *link_sec_p = link_sec;
3954
3955 return stub_sec;
3956 }
3957
3958 /* Add a new stub entry to the stub hash. Not all fields of the new
3959 stub entry are initialised. */
3960
3961 static struct elf32_arm_stub_hash_entry *
3962 elf32_arm_add_stub (const char *stub_name,
3963 asection *section,
3964 struct elf32_arm_link_hash_table *htab)
3965 {
3966 asection *link_sec;
3967 asection *stub_sec;
3968 struct elf32_arm_stub_hash_entry *stub_entry;
3969
3970 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab);
3971 if (stub_sec == NULL)
3972 return NULL;
3973
3974 /* Enter this entry into the linker stub hash table. */
3975 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
3976 TRUE, FALSE);
3977 if (stub_entry == NULL)
3978 {
3979 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
3980 section->owner,
3981 stub_name);
3982 return NULL;
3983 }
3984
3985 stub_entry->stub_sec = stub_sec;
3986 stub_entry->stub_offset = 0;
3987 stub_entry->id_sec = link_sec;
3988
3989 return stub_entry;
3990 }
3991
3992 /* Store an Arm insn into an output section not processed by
3993 elf32_arm_write_section. */
3994
3995 static void
3996 put_arm_insn (struct elf32_arm_link_hash_table * htab,
3997 bfd * output_bfd, bfd_vma val, void * ptr)
3998 {
3999 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4000 bfd_putl32 (val, ptr);
4001 else
4002 bfd_putb32 (val, ptr);
4003 }
4004
4005 /* Store a 16-bit Thumb insn into an output section not processed by
4006 elf32_arm_write_section. */
4007
4008 static void
4009 put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4010 bfd * output_bfd, bfd_vma val, void * ptr)
4011 {
4012 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4013 bfd_putl16 (val, ptr);
4014 else
4015 bfd_putb16 (val, ptr);
4016 }
4017
4018 /* If it's possible to change R_TYPE to a more efficient access
4019 model, return the new reloc type. */
4020
4021 static unsigned
4022 elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
4023 struct elf_link_hash_entry *h)
4024 {
4025 int is_local = (h == NULL);
4026
4027 if (info->shared || (h && h->root.type == bfd_link_hash_undefweak))
4028 return r_type;
4029
4030 /* We do not support relaxations for Old TLS models. */
4031 switch (r_type)
4032 {
4033 case R_ARM_TLS_GOTDESC:
4034 case R_ARM_TLS_CALL:
4035 case R_ARM_THM_TLS_CALL:
4036 case R_ARM_TLS_DESCSEQ:
4037 case R_ARM_THM_TLS_DESCSEQ:
4038 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4039 }
4040
4041 return r_type;
4042 }
4043
4044 static bfd_reloc_status_type elf32_arm_final_link_relocate
4045 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4046 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
4047 const char *, unsigned char, enum arm_st_branch_type,
4048 struct elf_link_hash_entry *, bfd_boolean *, char **);
4049
4050 static unsigned int
4051 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4052 {
4053 switch (stub_type)
4054 {
4055 case arm_stub_a8_veneer_b_cond:
4056 case arm_stub_a8_veneer_b:
4057 case arm_stub_a8_veneer_bl:
4058 return 2;
4059
4060 case arm_stub_long_branch_any_any:
4061 case arm_stub_long_branch_v4t_arm_thumb:
4062 case arm_stub_long_branch_thumb_only:
4063 case arm_stub_long_branch_v4t_thumb_thumb:
4064 case arm_stub_long_branch_v4t_thumb_arm:
4065 case arm_stub_short_branch_v4t_thumb_arm:
4066 case arm_stub_long_branch_any_arm_pic:
4067 case arm_stub_long_branch_any_thumb_pic:
4068 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4069 case arm_stub_long_branch_v4t_arm_thumb_pic:
4070 case arm_stub_long_branch_v4t_thumb_arm_pic:
4071 case arm_stub_long_branch_thumb_only_pic:
4072 case arm_stub_long_branch_any_tls_pic:
4073 case arm_stub_long_branch_v4t_thumb_tls_pic:
4074 case arm_stub_a8_veneer_blx:
4075 return 4;
4076
4077 default:
4078 abort (); /* Should be unreachable. */
4079 }
4080 }
4081
4082 static bfd_boolean
4083 arm_build_one_stub (struct bfd_hash_entry *gen_entry,
4084 void * in_arg)
4085 {
4086 #define MAXRELOCS 2
4087 struct elf32_arm_stub_hash_entry *stub_entry;
4088 struct elf32_arm_link_hash_table *globals;
4089 struct bfd_link_info *info;
4090 asection *stub_sec;
4091 bfd *stub_bfd;
4092 bfd_byte *loc;
4093 bfd_vma sym_value;
4094 int template_size;
4095 int size;
4096 const insn_sequence *template_sequence;
4097 int i;
4098 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
4099 int stub_reloc_offset[MAXRELOCS] = {0, 0};
4100 int nrelocs = 0;
4101
4102 /* Massage our args to the form they really have. */
4103 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4104 info = (struct bfd_link_info *) in_arg;
4105
4106 globals = elf32_arm_hash_table (info);
4107 if (globals == NULL)
4108 return FALSE;
4109
4110 stub_sec = stub_entry->stub_sec;
4111
4112 if ((globals->fix_cortex_a8 < 0)
4113 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
4114 /* We have to do less-strictly-aligned fixes last. */
4115 return TRUE;
4116
4117 /* Make a note of the offset within the stubs for this entry. */
4118 stub_entry->stub_offset = stub_sec->size;
4119 loc = stub_sec->contents + stub_entry->stub_offset;
4120
4121 stub_bfd = stub_sec->owner;
4122
4123 /* This is the address of the stub destination. */
4124 sym_value = (stub_entry->target_value
4125 + stub_entry->target_section->output_offset
4126 + stub_entry->target_section->output_section->vma);
4127
4128 template_sequence = stub_entry->stub_template;
4129 template_size = stub_entry->stub_template_size;
4130
4131 size = 0;
4132 for (i = 0; i < template_size; i++)
4133 {
4134 switch (template_sequence[i].type)
4135 {
4136 case THUMB16_TYPE:
4137 {
4138 bfd_vma data = (bfd_vma) template_sequence[i].data;
4139 if (template_sequence[i].reloc_addend != 0)
4140 {
4141 /* We've borrowed the reloc_addend field to mean we should
4142 insert a condition code into this (Thumb-1 branch)
4143 instruction. See THUMB16_BCOND_INSN. */
4144 BFD_ASSERT ((data & 0xff00) == 0xd000);
4145 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
4146 }
4147 bfd_put_16 (stub_bfd, data, loc + size);
4148 size += 2;
4149 }
4150 break;
4151
4152 case THUMB32_TYPE:
4153 bfd_put_16 (stub_bfd,
4154 (template_sequence[i].data >> 16) & 0xffff,
4155 loc + size);
4156 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
4157 loc + size + 2);
4158 if (template_sequence[i].r_type != R_ARM_NONE)
4159 {
4160 stub_reloc_idx[nrelocs] = i;
4161 stub_reloc_offset[nrelocs++] = size;
4162 }
4163 size += 4;
4164 break;
4165
4166 case ARM_TYPE:
4167 bfd_put_32 (stub_bfd, template_sequence[i].data,
4168 loc + size);
4169 /* Handle cases where the target is encoded within the
4170 instruction. */
4171 if (template_sequence[i].r_type == R_ARM_JUMP24)
4172 {
4173 stub_reloc_idx[nrelocs] = i;
4174 stub_reloc_offset[nrelocs++] = size;
4175 }
4176 size += 4;
4177 break;
4178
4179 case DATA_TYPE:
4180 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
4181 stub_reloc_idx[nrelocs] = i;
4182 stub_reloc_offset[nrelocs++] = size;
4183 size += 4;
4184 break;
4185
4186 default:
4187 BFD_FAIL ();
4188 return FALSE;
4189 }
4190 }
4191
4192 stub_sec->size += size;
4193
4194 /* Stub size has already been computed in arm_size_one_stub. Check
4195 consistency. */
4196 BFD_ASSERT (size == stub_entry->stub_size);
4197
4198 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
4199 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
4200 sym_value |= 1;
4201
4202 /* Assume there is at least one and at most MAXRELOCS entries to relocate
4203 in each stub. */
4204 BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
4205
4206 for (i = 0; i < nrelocs; i++)
4207 if (template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24
4208 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19
4209 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL
4210 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22)
4211 {
4212 Elf_Internal_Rela rel;
4213 bfd_boolean unresolved_reloc;
4214 char *error_message;
4215 enum arm_st_branch_type branch_type
4216 = (template_sequence[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22
4217 ? ST_BRANCH_TO_THUMB : ST_BRANCH_TO_ARM);
4218 bfd_vma points_to = sym_value + stub_entry->target_addend;
4219
4220 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4221 rel.r_info = ELF32_R_INFO (0,
4222 template_sequence[stub_reloc_idx[i]].r_type);
4223 rel.r_addend = template_sequence[stub_reloc_idx[i]].reloc_addend;
4224
4225 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
4226 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
4227 template should refer back to the instruction after the original
4228 branch. */
4229 points_to = sym_value;
4230
4231 /* There may be unintended consequences if this is not true. */
4232 BFD_ASSERT (stub_entry->h == NULL);
4233
4234 /* Note: _bfd_final_link_relocate doesn't handle these relocations
4235 properly. We should probably use this function unconditionally,
4236 rather than only for certain relocations listed in the enclosing
4237 conditional, for the sake of consistency. */
4238 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4239 (template_sequence[stub_reloc_idx[i]].r_type),
4240 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
4241 points_to, info, stub_entry->target_section, "", STT_FUNC,
4242 branch_type, (struct elf_link_hash_entry *) stub_entry->h,
4243 &unresolved_reloc, &error_message);
4244 }
4245 else
4246 {
4247 Elf_Internal_Rela rel;
4248 bfd_boolean unresolved_reloc;
4249 char *error_message;
4250 bfd_vma points_to = sym_value + stub_entry->target_addend
4251 + template_sequence[stub_reloc_idx[i]].reloc_addend;
4252
4253 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4254 rel.r_info = ELF32_R_INFO (0,
4255 template_sequence[stub_reloc_idx[i]].r_type);
4256 rel.r_addend = 0;
4257
4258 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4259 (template_sequence[stub_reloc_idx[i]].r_type),
4260 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
4261 points_to, info, stub_entry->target_section, "", STT_FUNC,
4262 stub_entry->branch_type,
4263 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
4264 &error_message);
4265 }
4266
4267 return TRUE;
4268 #undef MAXRELOCS
4269 }
4270
4271 /* Calculate the template, template size and instruction size for a stub.
4272 Return value is the instruction size. */
4273
4274 static unsigned int
4275 find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
4276 const insn_sequence **stub_template,
4277 int *stub_template_size)
4278 {
4279 const insn_sequence *template_sequence = NULL;
4280 int template_size = 0, i;
4281 unsigned int size;
4282
4283 template_sequence = stub_definitions[stub_type].template_sequence;
4284 if (stub_template)
4285 *stub_template = template_sequence;
4286
4287 template_size = stub_definitions[stub_type].template_size;
4288 if (stub_template_size)
4289 *stub_template_size = template_size;
4290
4291 size = 0;
4292 for (i = 0; i < template_size; i++)
4293 {
4294 switch (template_sequence[i].type)
4295 {
4296 case THUMB16_TYPE:
4297 size += 2;
4298 break;
4299
4300 case ARM_TYPE:
4301 case THUMB32_TYPE:
4302 case DATA_TYPE:
4303 size += 4;
4304 break;
4305
4306 default:
4307 BFD_FAIL ();
4308 return 0;
4309 }
4310 }
4311
4312 return size;
4313 }
4314
4315 /* As above, but don't actually build the stub. Just bump offset so
4316 we know stub section sizes. */
4317
4318 static bfd_boolean
4319 arm_size_one_stub (struct bfd_hash_entry *gen_entry,
4320 void *in_arg ATTRIBUTE_UNUSED)
4321 {
4322 struct elf32_arm_stub_hash_entry *stub_entry;
4323 const insn_sequence *template_sequence;
4324 int template_size, size;
4325
4326 /* Massage our args to the form they really have. */
4327 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4328
4329 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
4330 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
4331
4332 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
4333 &template_size);
4334
4335 stub_entry->stub_size = size;
4336 stub_entry->stub_template = template_sequence;
4337 stub_entry->stub_template_size = template_size;
4338
4339 size = (size + 7) & ~7;
4340 stub_entry->stub_sec->size += size;
4341
4342 return TRUE;
4343 }
4344
4345 /* External entry points for sizing and building linker stubs. */
4346
4347 /* Set up various things so that we can make a list of input sections
4348 for each output section included in the link. Returns -1 on error,
4349 0 when no stubs will be needed, and 1 on success. */
4350
4351 int
4352 elf32_arm_setup_section_lists (bfd *output_bfd,
4353 struct bfd_link_info *info)
4354 {
4355 bfd *input_bfd;
4356 unsigned int bfd_count;
4357 int top_id, top_index;
4358 asection *section;
4359 asection **input_list, **list;
4360 bfd_size_type amt;
4361 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4362
4363 if (htab == NULL)
4364 return 0;
4365 if (! is_elf_hash_table (htab))
4366 return 0;
4367
4368 /* Count the number of input BFDs and find the top input section id. */
4369 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
4370 input_bfd != NULL;
4371 input_bfd = input_bfd->link_next)
4372 {
4373 bfd_count += 1;
4374 for (section = input_bfd->sections;
4375 section != NULL;
4376 section = section->next)
4377 {
4378 if (top_id < section->id)
4379 top_id = section->id;
4380 }
4381 }
4382 htab->bfd_count = bfd_count;
4383
4384 amt = sizeof (struct map_stub) * (top_id + 1);
4385 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
4386 if (htab->stub_group == NULL)
4387 return -1;
4388 htab->top_id = top_id;
4389
4390 /* We can't use output_bfd->section_count here to find the top output
4391 section index as some sections may have been removed, and
4392 _bfd_strip_section_from_output doesn't renumber the indices. */
4393 for (section = output_bfd->sections, top_index = 0;
4394 section != NULL;
4395 section = section->next)
4396 {
4397 if (top_index < section->index)
4398 top_index = section->index;
4399 }
4400
4401 htab->top_index = top_index;
4402 amt = sizeof (asection *) * (top_index + 1);
4403 input_list = (asection **) bfd_malloc (amt);
4404 htab->input_list = input_list;
4405 if (input_list == NULL)
4406 return -1;
4407
4408 /* For sections we aren't interested in, mark their entries with a
4409 value we can check later. */
4410 list = input_list + top_index;
4411 do
4412 *list = bfd_abs_section_ptr;
4413 while (list-- != input_list);
4414
4415 for (section = output_bfd->sections;
4416 section != NULL;
4417 section = section->next)
4418 {
4419 if ((section->flags & SEC_CODE) != 0)
4420 input_list[section->index] = NULL;
4421 }
4422
4423 return 1;
4424 }
4425
4426 /* The linker repeatedly calls this function for each input section,
4427 in the order that input sections are linked into output sections.
4428 Build lists of input sections to determine groupings between which
4429 we may insert linker stubs. */
4430
4431 void
4432 elf32_arm_next_input_section (struct bfd_link_info *info,
4433 asection *isec)
4434 {
4435 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4436
4437 if (htab == NULL)
4438 return;
4439
4440 if (isec->output_section->index <= htab->top_index)
4441 {
4442 asection **list = htab->input_list + isec->output_section->index;
4443
4444 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
4445 {
4446 /* Steal the link_sec pointer for our list. */
4447 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
4448 /* This happens to make the list in reverse order,
4449 which we reverse later. */
4450 PREV_SEC (isec) = *list;
4451 *list = isec;
4452 }
4453 }
4454 }
4455
4456 /* See whether we can group stub sections together. Grouping stub
4457 sections may result in fewer stubs. More importantly, we need to
4458 put all .init* and .fini* stubs at the end of the .init or
4459 .fini output sections respectively, because glibc splits the
4460 _init and _fini functions into multiple parts. Putting a stub in
4461 the middle of a function is not a good idea. */
4462
4463 static void
4464 group_sections (struct elf32_arm_link_hash_table *htab,
4465 bfd_size_type stub_group_size,
4466 bfd_boolean stubs_always_after_branch)
4467 {
4468 asection **list = htab->input_list;
4469
4470 do
4471 {
4472 asection *tail = *list;
4473 asection *head;
4474
4475 if (tail == bfd_abs_section_ptr)
4476 continue;
4477
4478 /* Reverse the list: we must avoid placing stubs at the
4479 beginning of the section because the beginning of the text
4480 section may be required for an interrupt vector in bare metal
4481 code. */
4482 #define NEXT_SEC PREV_SEC
4483 head = NULL;
4484 while (tail != NULL)
4485 {
4486 /* Pop from tail. */
4487 asection *item = tail;
4488 tail = PREV_SEC (item);
4489
4490 /* Push on head. */
4491 NEXT_SEC (item) = head;
4492 head = item;
4493 }
4494
4495 while (head != NULL)
4496 {
4497 asection *curr;
4498 asection *next;
4499 bfd_vma stub_group_start = head->output_offset;
4500 bfd_vma end_of_next;
4501
4502 curr = head;
4503 while (NEXT_SEC (curr) != NULL)
4504 {
4505 next = NEXT_SEC (curr);
4506 end_of_next = next->output_offset + next->size;
4507 if (end_of_next - stub_group_start >= stub_group_size)
4508 /* End of NEXT is too far from start, so stop. */
4509 break;
4510 /* Add NEXT to the group. */
4511 curr = next;
4512 }
4513
4514 /* OK, the size from the start to the start of CURR is less
4515 than stub_group_size and thus can be handled by one stub
4516 section. (Or the head section is itself larger than
4517 stub_group_size, in which case we may be toast.)
4518 We should really be keeping track of the total size of
4519 stubs added here, as stubs contribute to the final output
4520 section size. */
4521 do
4522 {
4523 next = NEXT_SEC (head);
4524 /* Set up this stub group. */
4525 htab->stub_group[head->id].link_sec = curr;
4526 }
4527 while (head != curr && (head = next) != NULL);
4528
4529 /* But wait, there's more! Input sections up to stub_group_size
4530 bytes after the stub section can be handled by it too. */
4531 if (!stubs_always_after_branch)
4532 {
4533 stub_group_start = curr->output_offset + curr->size;
4534
4535 while (next != NULL)
4536 {
4537 end_of_next = next->output_offset + next->size;
4538 if (end_of_next - stub_group_start >= stub_group_size)
4539 /* End of NEXT is too far from stubs, so stop. */
4540 break;
4541 /* Add NEXT to the stub group. */
4542 head = next;
4543 next = NEXT_SEC (head);
4544 htab->stub_group[head->id].link_sec = curr;
4545 }
4546 }
4547 head = next;
4548 }
4549 }
4550 while (list++ != htab->input_list + htab->top_index);
4551
4552 free (htab->input_list);
4553 #undef PREV_SEC
4554 #undef NEXT_SEC
4555 }
4556
4557 /* Comparison function for sorting/searching relocations relating to Cortex-A8
4558 erratum fix. */
4559
4560 static int
4561 a8_reloc_compare (const void *a, const void *b)
4562 {
4563 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
4564 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
4565
4566 if (ra->from < rb->from)
4567 return -1;
4568 else if (ra->from > rb->from)
4569 return 1;
4570 else
4571 return 0;
4572 }
4573
4574 static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
4575 const char *, char **);
4576
4577 /* Helper function to scan code for sequences which might trigger the Cortex-A8
4578 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
4579 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
4580 otherwise. */
4581
4582 static bfd_boolean
4583 cortex_a8_erratum_scan (bfd *input_bfd,
4584 struct bfd_link_info *info,
4585 struct a8_erratum_fix **a8_fixes_p,
4586 unsigned int *num_a8_fixes_p,
4587 unsigned int *a8_fix_table_size_p,
4588 struct a8_erratum_reloc *a8_relocs,
4589 unsigned int num_a8_relocs,
4590 unsigned prev_num_a8_fixes,
4591 bfd_boolean *stub_changed_p)
4592 {
4593 asection *section;
4594 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4595 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
4596 unsigned int num_a8_fixes = *num_a8_fixes_p;
4597 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
4598
4599 if (htab == NULL)
4600 return FALSE;
4601
4602 for (section = input_bfd->sections;
4603 section != NULL;
4604 section = section->next)
4605 {
4606 bfd_byte *contents = NULL;
4607 struct _arm_elf_section_data *sec_data;
4608 unsigned int span;
4609 bfd_vma base_vma;
4610
4611 if (elf_section_type (section) != SHT_PROGBITS
4612 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
4613 || (section->flags & SEC_EXCLUDE) != 0
4614 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
4615 || (section->output_section == bfd_abs_section_ptr))
4616 continue;
4617
4618 base_vma = section->output_section->vma + section->output_offset;
4619
4620 if (elf_section_data (section)->this_hdr.contents != NULL)
4621 contents = elf_section_data (section)->this_hdr.contents;
4622 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
4623 return TRUE;
4624
4625 sec_data = elf32_arm_section_data (section);
4626
4627 for (span = 0; span < sec_data->mapcount; span++)
4628 {
4629 unsigned int span_start = sec_data->map[span].vma;
4630 unsigned int span_end = (span == sec_data->mapcount - 1)
4631 ? section->size : sec_data->map[span + 1].vma;
4632 unsigned int i;
4633 char span_type = sec_data->map[span].type;
4634 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
4635
4636 if (span_type != 't')
4637 continue;
4638
4639 /* Span is entirely within a single 4KB region: skip scanning. */
4640 if (((base_vma + span_start) & ~0xfff)
4641 == ((base_vma + span_end) & ~0xfff))
4642 continue;
4643
4644 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
4645
4646 * The opcode is BLX.W, BL.W, B.W, Bcc.W
4647 * The branch target is in the same 4KB region as the
4648 first half of the branch.
4649 * The instruction before the branch is a 32-bit
4650 length non-branch instruction. */
4651 for (i = span_start; i < span_end;)
4652 {
4653 unsigned int insn = bfd_getl16 (&contents[i]);
4654 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
4655 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
4656
4657 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
4658 insn_32bit = TRUE;
4659
4660 if (insn_32bit)
4661 {
4662 /* Load the rest of the insn (in manual-friendly order). */
4663 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
4664
4665 /* Encoding T4: B<c>.W. */
4666 is_b = (insn & 0xf800d000) == 0xf0009000;
4667 /* Encoding T1: BL<c>.W. */
4668 is_bl = (insn & 0xf800d000) == 0xf000d000;
4669 /* Encoding T2: BLX<c>.W. */
4670 is_blx = (insn & 0xf800d000) == 0xf000c000;
4671 /* Encoding T3: B<c>.W (not permitted in IT block). */
4672 is_bcc = (insn & 0xf800d000) == 0xf0008000
4673 && (insn & 0x07f00000) != 0x03800000;
4674 }
4675
4676 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
4677
4678 if (((base_vma + i) & 0xfff) == 0xffe
4679 && insn_32bit
4680 && is_32bit_branch
4681 && last_was_32bit
4682 && ! last_was_branch)
4683 {
4684 bfd_signed_vma offset = 0;
4685 bfd_boolean force_target_arm = FALSE;
4686 bfd_boolean force_target_thumb = FALSE;
4687 bfd_vma target;
4688 enum elf32_arm_stub_type stub_type = arm_stub_none;
4689 struct a8_erratum_reloc key, *found;
4690 bfd_boolean use_plt = FALSE;
4691
4692 key.from = base_vma + i;
4693 found = (struct a8_erratum_reloc *)
4694 bsearch (&key, a8_relocs, num_a8_relocs,
4695 sizeof (struct a8_erratum_reloc),
4696 &a8_reloc_compare);
4697
4698 if (found)
4699 {
4700 char *error_message = NULL;
4701 struct elf_link_hash_entry *entry;
4702
4703 /* We don't care about the error returned from this
4704 function, only if there is glue or not. */
4705 entry = find_thumb_glue (info, found->sym_name,
4706 &error_message);
4707
4708 if (entry)
4709 found->non_a8_stub = TRUE;
4710
4711 /* Keep a simpler condition, for the sake of clarity. */
4712 if (htab->root.splt != NULL && found->hash != NULL
4713 && found->hash->root.plt.offset != (bfd_vma) -1)
4714 use_plt = TRUE;
4715
4716 if (found->r_type == R_ARM_THM_CALL)
4717 {
4718 if (found->branch_type == ST_BRANCH_TO_ARM
4719 || use_plt)
4720 force_target_arm = TRUE;
4721 else
4722 force_target_thumb = TRUE;
4723 }
4724 }
4725
4726 /* Check if we have an offending branch instruction. */
4727
4728 if (found && found->non_a8_stub)
4729 /* We've already made a stub for this instruction, e.g.
4730 it's a long branch or a Thumb->ARM stub. Assume that
4731 stub will suffice to work around the A8 erratum (see
4732 setting of always_after_branch above). */
4733 ;
4734 else if (is_bcc)
4735 {
4736 offset = (insn & 0x7ff) << 1;
4737 offset |= (insn & 0x3f0000) >> 4;
4738 offset |= (insn & 0x2000) ? 0x40000 : 0;
4739 offset |= (insn & 0x800) ? 0x80000 : 0;
4740 offset |= (insn & 0x4000000) ? 0x100000 : 0;
4741 if (offset & 0x100000)
4742 offset |= ~ ((bfd_signed_vma) 0xfffff);
4743 stub_type = arm_stub_a8_veneer_b_cond;
4744 }
4745 else if (is_b || is_bl || is_blx)
4746 {
4747 int s = (insn & 0x4000000) != 0;
4748 int j1 = (insn & 0x2000) != 0;
4749 int j2 = (insn & 0x800) != 0;
4750 int i1 = !(j1 ^ s);
4751 int i2 = !(j2 ^ s);
4752
4753 offset = (insn & 0x7ff) << 1;
4754 offset |= (insn & 0x3ff0000) >> 4;
4755 offset |= i2 << 22;
4756 offset |= i1 << 23;
4757 offset |= s << 24;
4758 if (offset & 0x1000000)
4759 offset |= ~ ((bfd_signed_vma) 0xffffff);
4760
4761 if (is_blx)
4762 offset &= ~ ((bfd_signed_vma) 3);
4763
4764 stub_type = is_blx ? arm_stub_a8_veneer_blx :
4765 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
4766 }
4767
4768 if (stub_type != arm_stub_none)
4769 {
4770 bfd_vma pc_for_insn = base_vma + i + 4;
4771
4772 /* The original instruction is a BL, but the target is
4773 an ARM instruction. If we were not making a stub,
4774 the BL would have been converted to a BLX. Use the
4775 BLX stub instead in that case. */
4776 if (htab->use_blx && force_target_arm
4777 && stub_type == arm_stub_a8_veneer_bl)
4778 {
4779 stub_type = arm_stub_a8_veneer_blx;
4780 is_blx = TRUE;
4781 is_bl = FALSE;
4782 }
4783 /* Conversely, if the original instruction was
4784 BLX but the target is Thumb mode, use the BL
4785 stub. */
4786 else if (force_target_thumb
4787 && stub_type == arm_stub_a8_veneer_blx)
4788 {
4789 stub_type = arm_stub_a8_veneer_bl;
4790 is_blx = FALSE;
4791 is_bl = TRUE;
4792 }
4793
4794 if (is_blx)
4795 pc_for_insn &= ~ ((bfd_vma) 3);
4796
4797 /* If we found a relocation, use the proper destination,
4798 not the offset in the (unrelocated) instruction.
4799 Note this is always done if we switched the stub type
4800 above. */
4801 if (found)
4802 offset =
4803 (bfd_signed_vma) (found->destination - pc_for_insn);
4804
4805 /* If the stub will use a Thumb-mode branch to a
4806 PLT target, redirect it to the preceding Thumb
4807 entry point. */
4808 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
4809 offset -= PLT_THUMB_STUB_SIZE;
4810
4811 target = pc_for_insn + offset;
4812
4813 /* The BLX stub is ARM-mode code. Adjust the offset to
4814 take the different PC value (+8 instead of +4) into
4815 account. */
4816 if (stub_type == arm_stub_a8_veneer_blx)
4817 offset += 4;
4818
4819 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
4820 {
4821 char *stub_name = NULL;
4822
4823 if (num_a8_fixes == a8_fix_table_size)
4824 {
4825 a8_fix_table_size *= 2;
4826 a8_fixes = (struct a8_erratum_fix *)
4827 bfd_realloc (a8_fixes,
4828 sizeof (struct a8_erratum_fix)
4829 * a8_fix_table_size);
4830 }
4831
4832 if (num_a8_fixes < prev_num_a8_fixes)
4833 {
4834 /* If we're doing a subsequent scan,
4835 check if we've found the same fix as
4836 before, and try and reuse the stub
4837 name. */
4838 stub_name = a8_fixes[num_a8_fixes].stub_name;
4839 if ((a8_fixes[num_a8_fixes].section != section)
4840 || (a8_fixes[num_a8_fixes].offset != i))
4841 {
4842 free (stub_name);
4843 stub_name = NULL;
4844 *stub_changed_p = TRUE;
4845 }
4846 }
4847
4848 if (!stub_name)
4849 {
4850 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
4851 if (stub_name != NULL)
4852 sprintf (stub_name, "%x:%x", section->id, i);
4853 }
4854
4855 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
4856 a8_fixes[num_a8_fixes].section = section;
4857 a8_fixes[num_a8_fixes].offset = i;
4858 a8_fixes[num_a8_fixes].addend = offset;
4859 a8_fixes[num_a8_fixes].orig_insn = insn;
4860 a8_fixes[num_a8_fixes].stub_name = stub_name;
4861 a8_fixes[num_a8_fixes].stub_type = stub_type;
4862 a8_fixes[num_a8_fixes].branch_type =
4863 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
4864
4865 num_a8_fixes++;
4866 }
4867 }
4868 }
4869
4870 i += insn_32bit ? 4 : 2;
4871 last_was_32bit = insn_32bit;
4872 last_was_branch = is_32bit_branch;
4873 }
4874 }
4875
4876 if (elf_section_data (section)->this_hdr.contents == NULL)
4877 free (contents);
4878 }
4879
4880 *a8_fixes_p = a8_fixes;
4881 *num_a8_fixes_p = num_a8_fixes;
4882 *a8_fix_table_size_p = a8_fix_table_size;
4883
4884 return FALSE;
4885 }
4886
4887 /* Determine and set the size of the stub section for a final link.
4888
4889 The basic idea here is to examine all the relocations looking for
4890 PC-relative calls to a target that is unreachable with a "bl"
4891 instruction. */
4892
4893 bfd_boolean
4894 elf32_arm_size_stubs (bfd *output_bfd,
4895 bfd *stub_bfd,
4896 struct bfd_link_info *info,
4897 bfd_signed_vma group_size,
4898 asection * (*add_stub_section) (const char *, asection *),
4899 void (*layout_sections_again) (void))
4900 {
4901 bfd_size_type stub_group_size;
4902 bfd_boolean stubs_always_after_branch;
4903 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4904 struct a8_erratum_fix *a8_fixes = NULL;
4905 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
4906 struct a8_erratum_reloc *a8_relocs = NULL;
4907 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
4908
4909 if (htab == NULL)
4910 return FALSE;
4911
4912 if (htab->fix_cortex_a8)
4913 {
4914 a8_fixes = (struct a8_erratum_fix *)
4915 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
4916 a8_relocs = (struct a8_erratum_reloc *)
4917 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
4918 }
4919
4920 /* Propagate mach to stub bfd, because it may not have been
4921 finalized when we created stub_bfd. */
4922 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
4923 bfd_get_mach (output_bfd));
4924
4925 /* Stash our params away. */
4926 htab->stub_bfd = stub_bfd;
4927 htab->add_stub_section = add_stub_section;
4928 htab->layout_sections_again = layout_sections_again;
4929 stubs_always_after_branch = group_size < 0;
4930
4931 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
4932 as the first half of a 32-bit branch straddling two 4K pages. This is a
4933 crude way of enforcing that. */
4934 if (htab->fix_cortex_a8)
4935 stubs_always_after_branch = 1;
4936
4937 if (group_size < 0)
4938 stub_group_size = -group_size;
4939 else
4940 stub_group_size = group_size;
4941
4942 if (stub_group_size == 1)
4943 {
4944 /* Default values. */
4945 /* Thumb branch range is +-4MB has to be used as the default
4946 maximum size (a given section can contain both ARM and Thumb
4947 code, so the worst case has to be taken into account).
4948
4949 This value is 24K less than that, which allows for 2025
4950 12-byte stubs. If we exceed that, then we will fail to link.
4951 The user will have to relink with an explicit group size
4952 option. */
4953 stub_group_size = 4170000;
4954 }
4955
4956 group_sections (htab, stub_group_size, stubs_always_after_branch);
4957
4958 /* If we're applying the cortex A8 fix, we need to determine the
4959 program header size now, because we cannot change it later --
4960 that could alter section placements. Notice the A8 erratum fix
4961 ends up requiring the section addresses to remain unchanged
4962 modulo the page size. That's something we cannot represent
4963 inside BFD, and we don't want to force the section alignment to
4964 be the page size. */
4965 if (htab->fix_cortex_a8)
4966 (*htab->layout_sections_again) ();
4967
4968 while (1)
4969 {
4970 bfd *input_bfd;
4971 unsigned int bfd_indx;
4972 asection *stub_sec;
4973 bfd_boolean stub_changed = FALSE;
4974 unsigned prev_num_a8_fixes = num_a8_fixes;
4975
4976 num_a8_fixes = 0;
4977 for (input_bfd = info->input_bfds, bfd_indx = 0;
4978 input_bfd != NULL;
4979 input_bfd = input_bfd->link_next, bfd_indx++)
4980 {
4981 Elf_Internal_Shdr *symtab_hdr;
4982 asection *section;
4983 Elf_Internal_Sym *local_syms = NULL;
4984
4985 num_a8_relocs = 0;
4986
4987 /* We'll need the symbol table in a second. */
4988 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4989 if (symtab_hdr->sh_info == 0)
4990 continue;
4991
4992 /* Walk over each section attached to the input bfd. */
4993 for (section = input_bfd->sections;
4994 section != NULL;
4995 section = section->next)
4996 {
4997 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
4998
4999 /* If there aren't any relocs, then there's nothing more
5000 to do. */
5001 if ((section->flags & SEC_RELOC) == 0
5002 || section->reloc_count == 0
5003 || (section->flags & SEC_CODE) == 0)
5004 continue;
5005
5006 /* If this section is a link-once section that will be
5007 discarded, then don't create any stubs. */
5008 if (section->output_section == NULL
5009 || section->output_section->owner != output_bfd)
5010 continue;
5011
5012 /* Get the relocs. */
5013 internal_relocs
5014 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
5015 NULL, info->keep_memory);
5016 if (internal_relocs == NULL)
5017 goto error_ret_free_local;
5018
5019 /* Now examine each relocation. */
5020 irela = internal_relocs;
5021 irelaend = irela + section->reloc_count;
5022 for (; irela < irelaend; irela++)
5023 {
5024 unsigned int r_type, r_indx;
5025 enum elf32_arm_stub_type stub_type;
5026 struct elf32_arm_stub_hash_entry *stub_entry;
5027 asection *sym_sec;
5028 bfd_vma sym_value;
5029 bfd_vma destination;
5030 struct elf32_arm_link_hash_entry *hash;
5031 const char *sym_name;
5032 char *stub_name;
5033 const asection *id_sec;
5034 unsigned char st_type;
5035 enum arm_st_branch_type branch_type;
5036 bfd_boolean created_stub = FALSE;
5037
5038 r_type = ELF32_R_TYPE (irela->r_info);
5039 r_indx = ELF32_R_SYM (irela->r_info);
5040
5041 if (r_type >= (unsigned int) R_ARM_max)
5042 {
5043 bfd_set_error (bfd_error_bad_value);
5044 error_ret_free_internal:
5045 if (elf_section_data (section)->relocs == NULL)
5046 free (internal_relocs);
5047 goto error_ret_free_local;
5048 }
5049
5050 hash = NULL;
5051 if (r_indx >= symtab_hdr->sh_info)
5052 hash = elf32_arm_hash_entry
5053 (elf_sym_hashes (input_bfd)
5054 [r_indx - symtab_hdr->sh_info]);
5055
5056 /* Only look for stubs on branch instructions, or
5057 non-relaxed TLSCALL */
5058 if ((r_type != (unsigned int) R_ARM_CALL)
5059 && (r_type != (unsigned int) R_ARM_THM_CALL)
5060 && (r_type != (unsigned int) R_ARM_JUMP24)
5061 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
5062 && (r_type != (unsigned int) R_ARM_THM_XPC22)
5063 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
5064 && (r_type != (unsigned int) R_ARM_PLT32)
5065 && !((r_type == (unsigned int) R_ARM_TLS_CALL
5066 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5067 && r_type == elf32_arm_tls_transition
5068 (info, r_type, &hash->root)
5069 && ((hash ? hash->tls_type
5070 : (elf32_arm_local_got_tls_type
5071 (input_bfd)[r_indx]))
5072 & GOT_TLS_GDESC) != 0))
5073 continue;
5074
5075 /* Now determine the call target, its name, value,
5076 section. */
5077 sym_sec = NULL;
5078 sym_value = 0;
5079 destination = 0;
5080 sym_name = NULL;
5081
5082 if (r_type == (unsigned int) R_ARM_TLS_CALL
5083 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5084 {
5085 /* A non-relaxed TLS call. The target is the
5086 plt-resident trampoline and nothing to do
5087 with the symbol. */
5088 BFD_ASSERT (htab->tls_trampoline > 0);
5089 sym_sec = htab->root.splt;
5090 sym_value = htab->tls_trampoline;
5091 hash = 0;
5092 st_type = STT_FUNC;
5093 branch_type = ST_BRANCH_TO_ARM;
5094 }
5095 else if (!hash)
5096 {
5097 /* It's a local symbol. */
5098 Elf_Internal_Sym *sym;
5099
5100 if (local_syms == NULL)
5101 {
5102 local_syms
5103 = (Elf_Internal_Sym *) symtab_hdr->contents;
5104 if (local_syms == NULL)
5105 local_syms
5106 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5107 symtab_hdr->sh_info, 0,
5108 NULL, NULL, NULL);
5109 if (local_syms == NULL)
5110 goto error_ret_free_internal;
5111 }
5112
5113 sym = local_syms + r_indx;
5114 if (sym->st_shndx == SHN_UNDEF)
5115 sym_sec = bfd_und_section_ptr;
5116 else if (sym->st_shndx == SHN_ABS)
5117 sym_sec = bfd_abs_section_ptr;
5118 else if (sym->st_shndx == SHN_COMMON)
5119 sym_sec = bfd_com_section_ptr;
5120 else
5121 sym_sec =
5122 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
5123
5124 if (!sym_sec)
5125 /* This is an undefined symbol. It can never
5126 be resolved. */
5127 continue;
5128
5129 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
5130 sym_value = sym->st_value;
5131 destination = (sym_value + irela->r_addend
5132 + sym_sec->output_offset
5133 + sym_sec->output_section->vma);
5134 st_type = ELF_ST_TYPE (sym->st_info);
5135 branch_type = ARM_SYM_BRANCH_TYPE (sym);
5136 sym_name
5137 = bfd_elf_string_from_elf_section (input_bfd,
5138 symtab_hdr->sh_link,
5139 sym->st_name);
5140 }
5141 else
5142 {
5143 /* It's an external symbol. */
5144 while (hash->root.root.type == bfd_link_hash_indirect
5145 || hash->root.root.type == bfd_link_hash_warning)
5146 hash = ((struct elf32_arm_link_hash_entry *)
5147 hash->root.root.u.i.link);
5148
5149 if (hash->root.root.type == bfd_link_hash_defined
5150 || hash->root.root.type == bfd_link_hash_defweak)
5151 {
5152 sym_sec = hash->root.root.u.def.section;
5153 sym_value = hash->root.root.u.def.value;
5154
5155 struct elf32_arm_link_hash_table *globals =
5156 elf32_arm_hash_table (info);
5157
5158 /* For a destination in a shared library,
5159 use the PLT stub as target address to
5160 decide whether a branch stub is
5161 needed. */
5162 if (globals != NULL
5163 && globals->root.splt != NULL
5164 && hash != NULL
5165 && hash->root.plt.offset != (bfd_vma) -1)
5166 {
5167 sym_sec = globals->root.splt;
5168 sym_value = hash->root.plt.offset;
5169 if (sym_sec->output_section != NULL)
5170 destination = (sym_value
5171 + sym_sec->output_offset
5172 + sym_sec->output_section->vma);
5173 }
5174 else if (sym_sec->output_section != NULL)
5175 destination = (sym_value + irela->r_addend
5176 + sym_sec->output_offset
5177 + sym_sec->output_section->vma);
5178 }
5179 else if ((hash->root.root.type == bfd_link_hash_undefined)
5180 || (hash->root.root.type == bfd_link_hash_undefweak))
5181 {
5182 /* For a shared library, use the PLT stub as
5183 target address to decide whether a long
5184 branch stub is needed.
5185 For absolute code, they cannot be handled. */
5186 struct elf32_arm_link_hash_table *globals =
5187 elf32_arm_hash_table (info);
5188
5189 if (globals != NULL
5190 && globals->root.splt != NULL
5191 && hash != NULL
5192 && hash->root.plt.offset != (bfd_vma) -1)
5193 {
5194 sym_sec = globals->root.splt;
5195 sym_value = hash->root.plt.offset;
5196 if (sym_sec->output_section != NULL)
5197 destination = (sym_value
5198 + sym_sec->output_offset
5199 + sym_sec->output_section->vma);
5200 }
5201 else
5202 continue;
5203 }
5204 else
5205 {
5206 bfd_set_error (bfd_error_bad_value);
5207 goto error_ret_free_internal;
5208 }
5209 st_type = hash->root.type;
5210 branch_type = hash->root.target_internal;
5211 sym_name = hash->root.root.root.string;
5212 }
5213
5214 do
5215 {
5216 /* Determine what (if any) linker stub is needed. */
5217 stub_type = arm_type_of_stub (info, section, irela,
5218 st_type, &branch_type,
5219 hash, destination, sym_sec,
5220 input_bfd, sym_name);
5221 if (stub_type == arm_stub_none)
5222 break;
5223
5224 /* Support for grouping stub sections. */
5225 id_sec = htab->stub_group[section->id].link_sec;
5226
5227 /* Get the name of this stub. */
5228 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash,
5229 irela, stub_type);
5230 if (!stub_name)
5231 goto error_ret_free_internal;
5232
5233 /* We've either created a stub for this reloc already,
5234 or we are about to. */
5235 created_stub = TRUE;
5236
5237 stub_entry = arm_stub_hash_lookup
5238 (&htab->stub_hash_table, stub_name,
5239 FALSE, FALSE);
5240 if (stub_entry != NULL)
5241 {
5242 /* The proper stub has already been created. */
5243 free (stub_name);
5244 stub_entry->target_value = sym_value;
5245 break;
5246 }
5247
5248 stub_entry = elf32_arm_add_stub (stub_name, section,
5249 htab);
5250 if (stub_entry == NULL)
5251 {
5252 free (stub_name);
5253 goto error_ret_free_internal;
5254 }
5255
5256 stub_entry->target_value = sym_value;
5257 stub_entry->target_section = sym_sec;
5258 stub_entry->stub_type = stub_type;
5259 stub_entry->h = hash;
5260 stub_entry->branch_type = branch_type;
5261
5262 if (sym_name == NULL)
5263 sym_name = "unnamed";
5264 stub_entry->output_name = (char *)
5265 bfd_alloc (htab->stub_bfd,
5266 sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5267 + strlen (sym_name));
5268 if (stub_entry->output_name == NULL)
5269 {
5270 free (stub_name);
5271 goto error_ret_free_internal;
5272 }
5273
5274 /* For historical reasons, use the existing names for
5275 ARM-to-Thumb and Thumb-to-ARM stubs. */
5276 if ((r_type == (unsigned int) R_ARM_THM_CALL
5277 || r_type == (unsigned int) R_ARM_THM_JUMP24)
5278 && branch_type == ST_BRANCH_TO_ARM)
5279 sprintf (stub_entry->output_name,
5280 THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5281 else if ((r_type == (unsigned int) R_ARM_CALL
5282 || r_type == (unsigned int) R_ARM_JUMP24)
5283 && branch_type == ST_BRANCH_TO_THUMB)
5284 sprintf (stub_entry->output_name,
5285 ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5286 else
5287 sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
5288 sym_name);
5289
5290 stub_changed = TRUE;
5291 }
5292 while (0);
5293
5294 /* Look for relocations which might trigger Cortex-A8
5295 erratum. */
5296 if (htab->fix_cortex_a8
5297 && (r_type == (unsigned int) R_ARM_THM_JUMP24
5298 || r_type == (unsigned int) R_ARM_THM_JUMP19
5299 || r_type == (unsigned int) R_ARM_THM_CALL
5300 || r_type == (unsigned int) R_ARM_THM_XPC22))
5301 {
5302 bfd_vma from = section->output_section->vma
5303 + section->output_offset
5304 + irela->r_offset;
5305
5306 if ((from & 0xfff) == 0xffe)
5307 {
5308 /* Found a candidate. Note we haven't checked the
5309 destination is within 4K here: if we do so (and
5310 don't create an entry in a8_relocs) we can't tell
5311 that a branch should have been relocated when
5312 scanning later. */
5313 if (num_a8_relocs == a8_reloc_table_size)
5314 {
5315 a8_reloc_table_size *= 2;
5316 a8_relocs = (struct a8_erratum_reloc *)
5317 bfd_realloc (a8_relocs,
5318 sizeof (struct a8_erratum_reloc)
5319 * a8_reloc_table_size);
5320 }
5321
5322 a8_relocs[num_a8_relocs].from = from;
5323 a8_relocs[num_a8_relocs].destination = destination;
5324 a8_relocs[num_a8_relocs].r_type = r_type;
5325 a8_relocs[num_a8_relocs].branch_type = branch_type;
5326 a8_relocs[num_a8_relocs].sym_name = sym_name;
5327 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
5328 a8_relocs[num_a8_relocs].hash = hash;
5329
5330 num_a8_relocs++;
5331 }
5332 }
5333 }
5334
5335 /* We're done with the internal relocs, free them. */
5336 if (elf_section_data (section)->relocs == NULL)
5337 free (internal_relocs);
5338 }
5339
5340 if (htab->fix_cortex_a8)
5341 {
5342 /* Sort relocs which might apply to Cortex-A8 erratum. */
5343 qsort (a8_relocs, num_a8_relocs,
5344 sizeof (struct a8_erratum_reloc),
5345 &a8_reloc_compare);
5346
5347 /* Scan for branches which might trigger Cortex-A8 erratum. */
5348 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
5349 &num_a8_fixes, &a8_fix_table_size,
5350 a8_relocs, num_a8_relocs,
5351 prev_num_a8_fixes, &stub_changed)
5352 != 0)
5353 goto error_ret_free_local;
5354 }
5355 }
5356
5357 if (prev_num_a8_fixes != num_a8_fixes)
5358 stub_changed = TRUE;
5359
5360 if (!stub_changed)
5361 break;
5362
5363 /* OK, we've added some stubs. Find out the new size of the
5364 stub sections. */
5365 for (stub_sec = htab->stub_bfd->sections;
5366 stub_sec != NULL;
5367 stub_sec = stub_sec->next)
5368 {
5369 /* Ignore non-stub sections. */
5370 if (!strstr (stub_sec->name, STUB_SUFFIX))
5371 continue;
5372
5373 stub_sec->size = 0;
5374 }
5375
5376 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
5377
5378 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
5379 if (htab->fix_cortex_a8)
5380 for (i = 0; i < num_a8_fixes; i++)
5381 {
5382 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
5383 a8_fixes[i].section, htab);
5384
5385 if (stub_sec == NULL)
5386 goto error_ret_free_local;
5387
5388 stub_sec->size
5389 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
5390 NULL);
5391 }
5392
5393
5394 /* Ask the linker to do its stuff. */
5395 (*htab->layout_sections_again) ();
5396 }
5397
5398 /* Add stubs for Cortex-A8 erratum fixes now. */
5399 if (htab->fix_cortex_a8)
5400 {
5401 for (i = 0; i < num_a8_fixes; i++)
5402 {
5403 struct elf32_arm_stub_hash_entry *stub_entry;
5404 char *stub_name = a8_fixes[i].stub_name;
5405 asection *section = a8_fixes[i].section;
5406 unsigned int section_id = a8_fixes[i].section->id;
5407 asection *link_sec = htab->stub_group[section_id].link_sec;
5408 asection *stub_sec = htab->stub_group[section_id].stub_sec;
5409 const insn_sequence *template_sequence;
5410 int template_size, size = 0;
5411
5412 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
5413 TRUE, FALSE);
5414 if (stub_entry == NULL)
5415 {
5416 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
5417 section->owner,
5418 stub_name);
5419 return FALSE;
5420 }
5421
5422 stub_entry->stub_sec = stub_sec;
5423 stub_entry->stub_offset = 0;
5424 stub_entry->id_sec = link_sec;
5425 stub_entry->stub_type = a8_fixes[i].stub_type;
5426 stub_entry->target_section = a8_fixes[i].section;
5427 stub_entry->target_value = a8_fixes[i].offset;
5428 stub_entry->target_addend = a8_fixes[i].addend;
5429 stub_entry->orig_insn = a8_fixes[i].orig_insn;
5430 stub_entry->branch_type = a8_fixes[i].branch_type;
5431
5432 size = find_stub_size_and_template (a8_fixes[i].stub_type,
5433 &template_sequence,
5434 &template_size);
5435
5436 stub_entry->stub_size = size;
5437 stub_entry->stub_template = template_sequence;
5438 stub_entry->stub_template_size = template_size;
5439 }
5440
5441 /* Stash the Cortex-A8 erratum fix array for use later in
5442 elf32_arm_write_section(). */
5443 htab->a8_erratum_fixes = a8_fixes;
5444 htab->num_a8_erratum_fixes = num_a8_fixes;
5445 }
5446 else
5447 {
5448 htab->a8_erratum_fixes = NULL;
5449 htab->num_a8_erratum_fixes = 0;
5450 }
5451 return TRUE;
5452
5453 error_ret_free_local:
5454 return FALSE;
5455 }
5456
5457 /* Build all the stubs associated with the current output file. The
5458 stubs are kept in a hash table attached to the main linker hash
5459 table. We also set up the .plt entries for statically linked PIC
5460 functions here. This function is called via arm_elf_finish in the
5461 linker. */
5462
5463 bfd_boolean
5464 elf32_arm_build_stubs (struct bfd_link_info *info)
5465 {
5466 asection *stub_sec;
5467 struct bfd_hash_table *table;
5468 struct elf32_arm_link_hash_table *htab;
5469
5470 htab = elf32_arm_hash_table (info);
5471 if (htab == NULL)
5472 return FALSE;
5473
5474 for (stub_sec = htab->stub_bfd->sections;
5475 stub_sec != NULL;
5476 stub_sec = stub_sec->next)
5477 {
5478 bfd_size_type size;
5479
5480 /* Ignore non-stub sections. */
5481 if (!strstr (stub_sec->name, STUB_SUFFIX))
5482 continue;
5483
5484 /* Allocate memory to hold the linker stubs. */
5485 size = stub_sec->size;
5486 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
5487 if (stub_sec->contents == NULL && size != 0)
5488 return FALSE;
5489 stub_sec->size = 0;
5490 }
5491
5492 /* Build the stubs as directed by the stub hash table. */
5493 table = &htab->stub_hash_table;
5494 bfd_hash_traverse (table, arm_build_one_stub, info);
5495 if (htab->fix_cortex_a8)
5496 {
5497 /* Place the cortex a8 stubs last. */
5498 htab->fix_cortex_a8 = -1;
5499 bfd_hash_traverse (table, arm_build_one_stub, info);
5500 }
5501
5502 return TRUE;
5503 }
5504
5505 /* Locate the Thumb encoded calling stub for NAME. */
5506
5507 static struct elf_link_hash_entry *
5508 find_thumb_glue (struct bfd_link_info *link_info,
5509 const char *name,
5510 char **error_message)
5511 {
5512 char *tmp_name;
5513 struct elf_link_hash_entry *hash;
5514 struct elf32_arm_link_hash_table *hash_table;
5515
5516 /* We need a pointer to the armelf specific hash table. */
5517 hash_table = elf32_arm_hash_table (link_info);
5518 if (hash_table == NULL)
5519 return NULL;
5520
5521 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5522 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
5523
5524 BFD_ASSERT (tmp_name);
5525
5526 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
5527
5528 hash = elf_link_hash_lookup
5529 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
5530
5531 if (hash == NULL
5532 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
5533 tmp_name, name) == -1)
5534 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
5535
5536 free (tmp_name);
5537
5538 return hash;
5539 }
5540
5541 /* Locate the ARM encoded calling stub for NAME. */
5542
5543 static struct elf_link_hash_entry *
5544 find_arm_glue (struct bfd_link_info *link_info,
5545 const char *name,
5546 char **error_message)
5547 {
5548 char *tmp_name;
5549 struct elf_link_hash_entry *myh;
5550 struct elf32_arm_link_hash_table *hash_table;
5551
5552 /* We need a pointer to the elfarm specific hash table. */
5553 hash_table = elf32_arm_hash_table (link_info);
5554 if (hash_table == NULL)
5555 return NULL;
5556
5557 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5558 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
5559
5560 BFD_ASSERT (tmp_name);
5561
5562 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5563
5564 myh = elf_link_hash_lookup
5565 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
5566
5567 if (myh == NULL
5568 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
5569 tmp_name, name) == -1)
5570 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
5571
5572 free (tmp_name);
5573
5574 return myh;
5575 }
5576
5577 /* ARM->Thumb glue (static images):
5578
5579 .arm
5580 __func_from_arm:
5581 ldr r12, __func_addr
5582 bx r12
5583 __func_addr:
5584 .word func @ behave as if you saw a ARM_32 reloc.
5585
5586 (v5t static images)
5587 .arm
5588 __func_from_arm:
5589 ldr pc, __func_addr
5590 __func_addr:
5591 .word func @ behave as if you saw a ARM_32 reloc.
5592
5593 (relocatable images)
5594 .arm
5595 __func_from_arm:
5596 ldr r12, __func_offset
5597 add r12, r12, pc
5598 bx r12
5599 __func_offset:
5600 .word func - . */
5601
5602 #define ARM2THUMB_STATIC_GLUE_SIZE 12
5603 static const insn32 a2t1_ldr_insn = 0xe59fc000;
5604 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
5605 static const insn32 a2t3_func_addr_insn = 0x00000001;
5606
5607 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
5608 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
5609 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
5610
5611 #define ARM2THUMB_PIC_GLUE_SIZE 16
5612 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
5613 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
5614 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
5615
5616 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
5617
5618 .thumb .thumb
5619 .align 2 .align 2
5620 __func_from_thumb: __func_from_thumb:
5621 bx pc push {r6, lr}
5622 nop ldr r6, __func_addr
5623 .arm mov lr, pc
5624 b func bx r6
5625 .arm
5626 ;; back_to_thumb
5627 ldmia r13! {r6, lr}
5628 bx lr
5629 __func_addr:
5630 .word func */
5631
5632 #define THUMB2ARM_GLUE_SIZE 8
5633 static const insn16 t2a1_bx_pc_insn = 0x4778;
5634 static const insn16 t2a2_noop_insn = 0x46c0;
5635 static const insn32 t2a3_b_insn = 0xea000000;
5636
5637 #define VFP11_ERRATUM_VENEER_SIZE 8
5638
5639 #define ARM_BX_VENEER_SIZE 12
5640 static const insn32 armbx1_tst_insn = 0xe3100001;
5641 static const insn32 armbx2_moveq_insn = 0x01a0f000;
5642 static const insn32 armbx3_bx_insn = 0xe12fff10;
5643
5644 #ifndef ELFARM_NABI_C_INCLUDED
5645 static void
5646 arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
5647 {
5648 asection * s;
5649 bfd_byte * contents;
5650
5651 if (size == 0)
5652 {
5653 /* Do not include empty glue sections in the output. */
5654 if (abfd != NULL)
5655 {
5656 s = bfd_get_section_by_name (abfd, name);
5657 if (s != NULL)
5658 s->flags |= SEC_EXCLUDE;
5659 }
5660 return;
5661 }
5662
5663 BFD_ASSERT (abfd != NULL);
5664
5665 s = bfd_get_section_by_name (abfd, name);
5666 BFD_ASSERT (s != NULL);
5667
5668 contents = (bfd_byte *) bfd_alloc (abfd, size);
5669
5670 BFD_ASSERT (s->size == size);
5671 s->contents = contents;
5672 }
5673
5674 bfd_boolean
5675 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
5676 {
5677 struct elf32_arm_link_hash_table * globals;
5678
5679 globals = elf32_arm_hash_table (info);
5680 BFD_ASSERT (globals != NULL);
5681
5682 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5683 globals->arm_glue_size,
5684 ARM2THUMB_GLUE_SECTION_NAME);
5685
5686 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5687 globals->thumb_glue_size,
5688 THUMB2ARM_GLUE_SECTION_NAME);
5689
5690 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5691 globals->vfp11_erratum_glue_size,
5692 VFP11_ERRATUM_VENEER_SECTION_NAME);
5693
5694 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5695 globals->bx_glue_size,
5696 ARM_BX_GLUE_SECTION_NAME);
5697
5698 return TRUE;
5699 }
5700
5701 /* Allocate space and symbols for calling a Thumb function from Arm mode.
5702 returns the symbol identifying the stub. */
5703
5704 static struct elf_link_hash_entry *
5705 record_arm_to_thumb_glue (struct bfd_link_info * link_info,
5706 struct elf_link_hash_entry * h)
5707 {
5708 const char * name = h->root.root.string;
5709 asection * s;
5710 char * tmp_name;
5711 struct elf_link_hash_entry * myh;
5712 struct bfd_link_hash_entry * bh;
5713 struct elf32_arm_link_hash_table * globals;
5714 bfd_vma val;
5715 bfd_size_type size;
5716
5717 globals = elf32_arm_hash_table (link_info);
5718 BFD_ASSERT (globals != NULL);
5719 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5720
5721 s = bfd_get_section_by_name
5722 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
5723
5724 BFD_ASSERT (s != NULL);
5725
5726 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5727 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
5728
5729 BFD_ASSERT (tmp_name);
5730
5731 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5732
5733 myh = elf_link_hash_lookup
5734 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
5735
5736 if (myh != NULL)
5737 {
5738 /* We've already seen this guy. */
5739 free (tmp_name);
5740 return myh;
5741 }
5742
5743 /* The only trick here is using hash_table->arm_glue_size as the value.
5744 Even though the section isn't allocated yet, this is where we will be
5745 putting it. The +1 on the value marks that the stub has not been
5746 output yet - not that it is a Thumb function. */
5747 bh = NULL;
5748 val = globals->arm_glue_size + 1;
5749 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5750 tmp_name, BSF_GLOBAL, s, val,
5751 NULL, TRUE, FALSE, &bh);
5752
5753 myh = (struct elf_link_hash_entry *) bh;
5754 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5755 myh->forced_local = 1;
5756
5757 free (tmp_name);
5758
5759 if (link_info->shared || globals->root.is_relocatable_executable
5760 || globals->pic_veneer)
5761 size = ARM2THUMB_PIC_GLUE_SIZE;
5762 else if (globals->use_blx)
5763 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
5764 else
5765 size = ARM2THUMB_STATIC_GLUE_SIZE;
5766
5767 s->size += size;
5768 globals->arm_glue_size += size;
5769
5770 return myh;
5771 }
5772
5773 /* Allocate space for ARMv4 BX veneers. */
5774
5775 static void
5776 record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
5777 {
5778 asection * s;
5779 struct elf32_arm_link_hash_table *globals;
5780 char *tmp_name;
5781 struct elf_link_hash_entry *myh;
5782 struct bfd_link_hash_entry *bh;
5783 bfd_vma val;
5784
5785 /* BX PC does not need a veneer. */
5786 if (reg == 15)
5787 return;
5788
5789 globals = elf32_arm_hash_table (link_info);
5790 BFD_ASSERT (globals != NULL);
5791 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5792
5793 /* Check if this veneer has already been allocated. */
5794 if (globals->bx_glue_offset[reg])
5795 return;
5796
5797 s = bfd_get_section_by_name
5798 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
5799
5800 BFD_ASSERT (s != NULL);
5801
5802 /* Add symbol for veneer. */
5803 tmp_name = (char *)
5804 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
5805
5806 BFD_ASSERT (tmp_name);
5807
5808 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
5809
5810 myh = elf_link_hash_lookup
5811 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
5812
5813 BFD_ASSERT (myh == NULL);
5814
5815 bh = NULL;
5816 val = globals->bx_glue_size;
5817 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5818 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5819 NULL, TRUE, FALSE, &bh);
5820
5821 myh = (struct elf_link_hash_entry *) bh;
5822 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5823 myh->forced_local = 1;
5824
5825 s->size += ARM_BX_VENEER_SIZE;
5826 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
5827 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
5828 }
5829
5830
5831 /* Add an entry to the code/data map for section SEC. */
5832
5833 static void
5834 elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
5835 {
5836 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
5837 unsigned int newidx;
5838
5839 if (sec_data->map == NULL)
5840 {
5841 sec_data->map = (elf32_arm_section_map *)
5842 bfd_malloc (sizeof (elf32_arm_section_map));
5843 sec_data->mapcount = 0;
5844 sec_data->mapsize = 1;
5845 }
5846
5847 newidx = sec_data->mapcount++;
5848
5849 if (sec_data->mapcount > sec_data->mapsize)
5850 {
5851 sec_data->mapsize *= 2;
5852 sec_data->map = (elf32_arm_section_map *)
5853 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
5854 * sizeof (elf32_arm_section_map));
5855 }
5856
5857 if (sec_data->map)
5858 {
5859 sec_data->map[newidx].vma = vma;
5860 sec_data->map[newidx].type = type;
5861 }
5862 }
5863
5864
5865 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
5866 veneers are handled for now. */
5867
5868 static bfd_vma
5869 record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
5870 elf32_vfp11_erratum_list *branch,
5871 bfd *branch_bfd,
5872 asection *branch_sec,
5873 unsigned int offset)
5874 {
5875 asection *s;
5876 struct elf32_arm_link_hash_table *hash_table;
5877 char *tmp_name;
5878 struct elf_link_hash_entry *myh;
5879 struct bfd_link_hash_entry *bh;
5880 bfd_vma val;
5881 struct _arm_elf_section_data *sec_data;
5882 elf32_vfp11_erratum_list *newerr;
5883
5884 hash_table = elf32_arm_hash_table (link_info);
5885 BFD_ASSERT (hash_table != NULL);
5886 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
5887
5888 s = bfd_get_section_by_name
5889 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
5890
5891 sec_data = elf32_arm_section_data (s);
5892
5893 BFD_ASSERT (s != NULL);
5894
5895 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
5896 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
5897
5898 BFD_ASSERT (tmp_name);
5899
5900 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
5901 hash_table->num_vfp11_fixes);
5902
5903 myh = elf_link_hash_lookup
5904 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
5905
5906 BFD_ASSERT (myh == NULL);
5907
5908 bh = NULL;
5909 val = hash_table->vfp11_erratum_glue_size;
5910 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
5911 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5912 NULL, TRUE, FALSE, &bh);
5913
5914 myh = (struct elf_link_hash_entry *) bh;
5915 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5916 myh->forced_local = 1;
5917
5918 /* Link veneer back to calling location. */
5919 sec_data->erratumcount += 1;
5920 newerr = (elf32_vfp11_erratum_list *)
5921 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
5922
5923 newerr->type = VFP11_ERRATUM_ARM_VENEER;
5924 newerr->vma = -1;
5925 newerr->u.v.branch = branch;
5926 newerr->u.v.id = hash_table->num_vfp11_fixes;
5927 branch->u.b.veneer = newerr;
5928
5929 newerr->next = sec_data->erratumlist;
5930 sec_data->erratumlist = newerr;
5931
5932 /* A symbol for the return from the veneer. */
5933 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
5934 hash_table->num_vfp11_fixes);
5935
5936 myh = elf_link_hash_lookup
5937 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
5938
5939 if (myh != NULL)
5940 abort ();
5941
5942 bh = NULL;
5943 val = offset + 4;
5944 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
5945 branch_sec, val, NULL, TRUE, FALSE, &bh);
5946
5947 myh = (struct elf_link_hash_entry *) bh;
5948 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5949 myh->forced_local = 1;
5950
5951 free (tmp_name);
5952
5953 /* Generate a mapping symbol for the veneer section, and explicitly add an
5954 entry for that symbol to the code/data map for the section. */
5955 if (hash_table->vfp11_erratum_glue_size == 0)
5956 {
5957 bh = NULL;
5958 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
5959 ever requires this erratum fix. */
5960 _bfd_generic_link_add_one_symbol (link_info,
5961 hash_table->bfd_of_glue_owner, "$a",
5962 BSF_LOCAL, s, 0, NULL,
5963 TRUE, FALSE, &bh);
5964
5965 myh = (struct elf_link_hash_entry *) bh;
5966 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
5967 myh->forced_local = 1;
5968
5969 /* The elf32_arm_init_maps function only cares about symbols from input
5970 BFDs. We must make a note of this generated mapping symbol
5971 ourselves so that code byteswapping works properly in
5972 elf32_arm_write_section. */
5973 elf32_arm_section_map_add (s, 'a', 0);
5974 }
5975
5976 s->size += VFP11_ERRATUM_VENEER_SIZE;
5977 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
5978 hash_table->num_vfp11_fixes++;
5979
5980 /* The offset of the veneer. */
5981 return val;
5982 }
5983
5984 #define ARM_GLUE_SECTION_FLAGS \
5985 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
5986 | SEC_READONLY | SEC_LINKER_CREATED)
5987
5988 /* Create a fake section for use by the ARM backend of the linker. */
5989
5990 static bfd_boolean
5991 arm_make_glue_section (bfd * abfd, const char * name)
5992 {
5993 asection * sec;
5994
5995 sec = bfd_get_section_by_name (abfd, name);
5996 if (sec != NULL)
5997 /* Already made. */
5998 return TRUE;
5999
6000 sec = bfd_make_section_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
6001
6002 if (sec == NULL
6003 || !bfd_set_section_alignment (abfd, sec, 2))
6004 return FALSE;
6005
6006 /* Set the gc mark to prevent the section from being removed by garbage
6007 collection, despite the fact that no relocs refer to this section. */
6008 sec->gc_mark = 1;
6009
6010 return TRUE;
6011 }
6012
6013 /* Add the glue sections to ABFD. This function is called from the
6014 linker scripts in ld/emultempl/{armelf}.em. */
6015
6016 bfd_boolean
6017 bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
6018 struct bfd_link_info *info)
6019 {
6020 /* If we are only performing a partial
6021 link do not bother adding the glue. */
6022 if (info->relocatable)
6023 return TRUE;
6024
6025 return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
6026 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
6027 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
6028 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
6029 }
6030
6031 /* Select a BFD to be used to hold the sections used by the glue code.
6032 This function is called from the linker scripts in ld/emultempl/
6033 {armelf/pe}.em. */
6034
6035 bfd_boolean
6036 bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
6037 {
6038 struct elf32_arm_link_hash_table *globals;
6039
6040 /* If we are only performing a partial link
6041 do not bother getting a bfd to hold the glue. */
6042 if (info->relocatable)
6043 return TRUE;
6044
6045 /* Make sure we don't attach the glue sections to a dynamic object. */
6046 BFD_ASSERT (!(abfd->flags & DYNAMIC));
6047
6048 globals = elf32_arm_hash_table (info);
6049 BFD_ASSERT (globals != NULL);
6050
6051 if (globals->bfd_of_glue_owner != NULL)
6052 return TRUE;
6053
6054 /* Save the bfd for later use. */
6055 globals->bfd_of_glue_owner = abfd;
6056
6057 return TRUE;
6058 }
6059
6060 static void
6061 check_use_blx (struct elf32_arm_link_hash_table *globals)
6062 {
6063 int cpu_arch;
6064
6065 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
6066 Tag_CPU_arch);
6067
6068 if (globals->fix_arm1176)
6069 {
6070 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
6071 globals->use_blx = 1;
6072 }
6073 else
6074 {
6075 if (cpu_arch > TAG_CPU_ARCH_V4T)
6076 globals->use_blx = 1;
6077 }
6078 }
6079
6080 bfd_boolean
6081 bfd_elf32_arm_process_before_allocation (bfd *abfd,
6082 struct bfd_link_info *link_info)
6083 {
6084 Elf_Internal_Shdr *symtab_hdr;
6085 Elf_Internal_Rela *internal_relocs = NULL;
6086 Elf_Internal_Rela *irel, *irelend;
6087 bfd_byte *contents = NULL;
6088
6089 asection *sec;
6090 struct elf32_arm_link_hash_table *globals;
6091
6092 /* If we are only performing a partial link do not bother
6093 to construct any glue. */
6094 if (link_info->relocatable)
6095 return TRUE;
6096
6097 /* Here we have a bfd that is to be included on the link. We have a
6098 hook to do reloc rummaging, before section sizes are nailed down. */
6099 globals = elf32_arm_hash_table (link_info);
6100 BFD_ASSERT (globals != NULL);
6101
6102 check_use_blx (globals);
6103
6104 if (globals->byteswap_code && !bfd_big_endian (abfd))
6105 {
6106 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
6107 abfd);
6108 return FALSE;
6109 }
6110
6111 /* PR 5398: If we have not decided to include any loadable sections in
6112 the output then we will not have a glue owner bfd. This is OK, it
6113 just means that there is nothing else for us to do here. */
6114 if (globals->bfd_of_glue_owner == NULL)
6115 return TRUE;
6116
6117 /* Rummage around all the relocs and map the glue vectors. */
6118 sec = abfd->sections;
6119
6120 if (sec == NULL)
6121 return TRUE;
6122
6123 for (; sec != NULL; sec = sec->next)
6124 {
6125 if (sec->reloc_count == 0)
6126 continue;
6127
6128 if ((sec->flags & SEC_EXCLUDE) != 0)
6129 continue;
6130
6131 symtab_hdr = & elf_symtab_hdr (abfd);
6132
6133 /* Load the relocs. */
6134 internal_relocs
6135 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
6136
6137 if (internal_relocs == NULL)
6138 goto error_return;
6139
6140 irelend = internal_relocs + sec->reloc_count;
6141 for (irel = internal_relocs; irel < irelend; irel++)
6142 {
6143 long r_type;
6144 unsigned long r_index;
6145
6146 struct elf_link_hash_entry *h;
6147
6148 r_type = ELF32_R_TYPE (irel->r_info);
6149 r_index = ELF32_R_SYM (irel->r_info);
6150
6151 /* These are the only relocation types we care about. */
6152 if ( r_type != R_ARM_PC24
6153 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
6154 continue;
6155
6156 /* Get the section contents if we haven't done so already. */
6157 if (contents == NULL)
6158 {
6159 /* Get cached copy if it exists. */
6160 if (elf_section_data (sec)->this_hdr.contents != NULL)
6161 contents = elf_section_data (sec)->this_hdr.contents;
6162 else
6163 {
6164 /* Go get them off disk. */
6165 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6166 goto error_return;
6167 }
6168 }
6169
6170 if (r_type == R_ARM_V4BX)
6171 {
6172 int reg;
6173
6174 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
6175 record_arm_bx_glue (link_info, reg);
6176 continue;
6177 }
6178
6179 /* If the relocation is not against a symbol it cannot concern us. */
6180 h = NULL;
6181
6182 /* We don't care about local symbols. */
6183 if (r_index < symtab_hdr->sh_info)
6184 continue;
6185
6186 /* This is an external symbol. */
6187 r_index -= symtab_hdr->sh_info;
6188 h = (struct elf_link_hash_entry *)
6189 elf_sym_hashes (abfd)[r_index];
6190
6191 /* If the relocation is against a static symbol it must be within
6192 the current section and so cannot be a cross ARM/Thumb relocation. */
6193 if (h == NULL)
6194 continue;
6195
6196 /* If the call will go through a PLT entry then we do not need
6197 glue. */
6198 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
6199 continue;
6200
6201 switch (r_type)
6202 {
6203 case R_ARM_PC24:
6204 /* This one is a call from arm code. We need to look up
6205 the target of the call. If it is a thumb target, we
6206 insert glue. */
6207 if (h->target_internal == ST_BRANCH_TO_THUMB)
6208 record_arm_to_thumb_glue (link_info, h);
6209 break;
6210
6211 default:
6212 abort ();
6213 }
6214 }
6215
6216 if (contents != NULL
6217 && elf_section_data (sec)->this_hdr.contents != contents)
6218 free (contents);
6219 contents = NULL;
6220
6221 if (internal_relocs != NULL
6222 && elf_section_data (sec)->relocs != internal_relocs)
6223 free (internal_relocs);
6224 internal_relocs = NULL;
6225 }
6226
6227 return TRUE;
6228
6229 error_return:
6230 if (contents != NULL
6231 && elf_section_data (sec)->this_hdr.contents != contents)
6232 free (contents);
6233 if (internal_relocs != NULL
6234 && elf_section_data (sec)->relocs != internal_relocs)
6235 free (internal_relocs);
6236
6237 return FALSE;
6238 }
6239 #endif
6240
6241
6242 /* Initialise maps of ARM/Thumb/data for input BFDs. */
6243
6244 void
6245 bfd_elf32_arm_init_maps (bfd *abfd)
6246 {
6247 Elf_Internal_Sym *isymbuf;
6248 Elf_Internal_Shdr *hdr;
6249 unsigned int i, localsyms;
6250
6251 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
6252 if (! is_arm_elf (abfd))
6253 return;
6254
6255 if ((abfd->flags & DYNAMIC) != 0)
6256 return;
6257
6258 hdr = & elf_symtab_hdr (abfd);
6259 localsyms = hdr->sh_info;
6260
6261 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
6262 should contain the number of local symbols, which should come before any
6263 global symbols. Mapping symbols are always local. */
6264 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
6265 NULL);
6266
6267 /* No internal symbols read? Skip this BFD. */
6268 if (isymbuf == NULL)
6269 return;
6270
6271 for (i = 0; i < localsyms; i++)
6272 {
6273 Elf_Internal_Sym *isym = &isymbuf[i];
6274 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6275 const char *name;
6276
6277 if (sec != NULL
6278 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
6279 {
6280 name = bfd_elf_string_from_elf_section (abfd,
6281 hdr->sh_link, isym->st_name);
6282
6283 if (bfd_is_arm_special_symbol_name (name,
6284 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
6285 elf32_arm_section_map_add (sec, name[1], isym->st_value);
6286 }
6287 }
6288 }
6289
6290
6291 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
6292 say what they wanted. */
6293
6294 void
6295 bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
6296 {
6297 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6298 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6299
6300 if (globals == NULL)
6301 return;
6302
6303 if (globals->fix_cortex_a8 == -1)
6304 {
6305 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
6306 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
6307 && (out_attr[Tag_CPU_arch_profile].i == 'A'
6308 || out_attr[Tag_CPU_arch_profile].i == 0))
6309 globals->fix_cortex_a8 = 1;
6310 else
6311 globals->fix_cortex_a8 = 0;
6312 }
6313 }
6314
6315
6316 void
6317 bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
6318 {
6319 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6320 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6321
6322 if (globals == NULL)
6323 return;
6324 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
6325 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
6326 {
6327 switch (globals->vfp11_fix)
6328 {
6329 case BFD_ARM_VFP11_FIX_DEFAULT:
6330 case BFD_ARM_VFP11_FIX_NONE:
6331 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6332 break;
6333
6334 default:
6335 /* Give a warning, but do as the user requests anyway. */
6336 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
6337 "workaround is not necessary for target architecture"), obfd);
6338 }
6339 }
6340 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
6341 /* For earlier architectures, we might need the workaround, but do not
6342 enable it by default. If users is running with broken hardware, they
6343 must enable the erratum fix explicitly. */
6344 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6345 }
6346
6347
6348 enum bfd_arm_vfp11_pipe
6349 {
6350 VFP11_FMAC,
6351 VFP11_LS,
6352 VFP11_DS,
6353 VFP11_BAD
6354 };
6355
6356 /* Return a VFP register number. This is encoded as RX:X for single-precision
6357 registers, or X:RX for double-precision registers, where RX is the group of
6358 four bits in the instruction encoding and X is the single extension bit.
6359 RX and X fields are specified using their lowest (starting) bit. The return
6360 value is:
6361
6362 0...31: single-precision registers s0...s31
6363 32...63: double-precision registers d0...d31.
6364
6365 Although X should be zero for VFP11 (encoding d0...d15 only), we might
6366 encounter VFP3 instructions, so we allow the full range for DP registers. */
6367
6368 static unsigned int
6369 bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
6370 unsigned int x)
6371 {
6372 if (is_double)
6373 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
6374 else
6375 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
6376 }
6377
6378 /* Set bits in *WMASK according to a register number REG as encoded by
6379 bfd_arm_vfp11_regno(). Ignore d16-d31. */
6380
6381 static void
6382 bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
6383 {
6384 if (reg < 32)
6385 *wmask |= 1 << reg;
6386 else if (reg < 48)
6387 *wmask |= 3 << ((reg - 32) * 2);
6388 }
6389
6390 /* Return TRUE if WMASK overwrites anything in REGS. */
6391
6392 static bfd_boolean
6393 bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
6394 {
6395 int i;
6396
6397 for (i = 0; i < numregs; i++)
6398 {
6399 unsigned int reg = regs[i];
6400
6401 if (reg < 32 && (wmask & (1 << reg)) != 0)
6402 return TRUE;
6403
6404 reg -= 32;
6405
6406 if (reg >= 16)
6407 continue;
6408
6409 if ((wmask & (3 << (reg * 2))) != 0)
6410 return TRUE;
6411 }
6412
6413 return FALSE;
6414 }
6415
6416 /* In this function, we're interested in two things: finding input registers
6417 for VFP data-processing instructions, and finding the set of registers which
6418 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
6419 hold the written set, so FLDM etc. are easy to deal with (we're only
6420 interested in 32 SP registers or 16 dp registers, due to the VFP version
6421 implemented by the chip in question). DP registers are marked by setting
6422 both SP registers in the write mask). */
6423
6424 static enum bfd_arm_vfp11_pipe
6425 bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
6426 int *numregs)
6427 {
6428 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
6429 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
6430
6431 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
6432 {
6433 unsigned int pqrs;
6434 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6435 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
6436
6437 pqrs = ((insn & 0x00800000) >> 20)
6438 | ((insn & 0x00300000) >> 19)
6439 | ((insn & 0x00000040) >> 6);
6440
6441 switch (pqrs)
6442 {
6443 case 0: /* fmac[sd]. */
6444 case 1: /* fnmac[sd]. */
6445 case 2: /* fmsc[sd]. */
6446 case 3: /* fnmsc[sd]. */
6447 vpipe = VFP11_FMAC;
6448 bfd_arm_vfp11_write_mask (destmask, fd);
6449 regs[0] = fd;
6450 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6451 regs[2] = fm;
6452 *numregs = 3;
6453 break;
6454
6455 case 4: /* fmul[sd]. */
6456 case 5: /* fnmul[sd]. */
6457 case 6: /* fadd[sd]. */
6458 case 7: /* fsub[sd]. */
6459 vpipe = VFP11_FMAC;
6460 goto vfp_binop;
6461
6462 case 8: /* fdiv[sd]. */
6463 vpipe = VFP11_DS;
6464 vfp_binop:
6465 bfd_arm_vfp11_write_mask (destmask, fd);
6466 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6467 regs[1] = fm;
6468 *numregs = 2;
6469 break;
6470
6471 case 15: /* extended opcode. */
6472 {
6473 unsigned int extn = ((insn >> 15) & 0x1e)
6474 | ((insn >> 7) & 1);
6475
6476 switch (extn)
6477 {
6478 case 0: /* fcpy[sd]. */
6479 case 1: /* fabs[sd]. */
6480 case 2: /* fneg[sd]. */
6481 case 8: /* fcmp[sd]. */
6482 case 9: /* fcmpe[sd]. */
6483 case 10: /* fcmpz[sd]. */
6484 case 11: /* fcmpez[sd]. */
6485 case 16: /* fuito[sd]. */
6486 case 17: /* fsito[sd]. */
6487 case 24: /* ftoui[sd]. */
6488 case 25: /* ftouiz[sd]. */
6489 case 26: /* ftosi[sd]. */
6490 case 27: /* ftosiz[sd]. */
6491 /* These instructions will not bounce due to underflow. */
6492 *numregs = 0;
6493 vpipe = VFP11_FMAC;
6494 break;
6495
6496 case 3: /* fsqrt[sd]. */
6497 /* fsqrt cannot underflow, but it can (perhaps) overwrite
6498 registers to cause the erratum in previous instructions. */
6499 bfd_arm_vfp11_write_mask (destmask, fd);
6500 vpipe = VFP11_DS;
6501 break;
6502
6503 case 15: /* fcvt{ds,sd}. */
6504 {
6505 int rnum = 0;
6506
6507 bfd_arm_vfp11_write_mask (destmask, fd);
6508
6509 /* Only FCVTSD can underflow. */
6510 if ((insn & 0x100) != 0)
6511 regs[rnum++] = fm;
6512
6513 *numregs = rnum;
6514
6515 vpipe = VFP11_FMAC;
6516 }
6517 break;
6518
6519 default:
6520 return VFP11_BAD;
6521 }
6522 }
6523 break;
6524
6525 default:
6526 return VFP11_BAD;
6527 }
6528 }
6529 /* Two-register transfer. */
6530 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
6531 {
6532 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
6533
6534 if ((insn & 0x100000) == 0)
6535 {
6536 if (is_double)
6537 bfd_arm_vfp11_write_mask (destmask, fm);
6538 else
6539 {
6540 bfd_arm_vfp11_write_mask (destmask, fm);
6541 bfd_arm_vfp11_write_mask (destmask, fm + 1);
6542 }
6543 }
6544
6545 vpipe = VFP11_LS;
6546 }
6547 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
6548 {
6549 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6550 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
6551
6552 switch (puw)
6553 {
6554 case 0: /* Two-reg transfer. We should catch these above. */
6555 abort ();
6556
6557 case 2: /* fldm[sdx]. */
6558 case 3:
6559 case 5:
6560 {
6561 unsigned int i, offset = insn & 0xff;
6562
6563 if (is_double)
6564 offset >>= 1;
6565
6566 for (i = fd; i < fd + offset; i++)
6567 bfd_arm_vfp11_write_mask (destmask, i);
6568 }
6569 break;
6570
6571 case 4: /* fld[sd]. */
6572 case 6:
6573 bfd_arm_vfp11_write_mask (destmask, fd);
6574 break;
6575
6576 default:
6577 return VFP11_BAD;
6578 }
6579
6580 vpipe = VFP11_LS;
6581 }
6582 /* Single-register transfer. Note L==0. */
6583 else if ((insn & 0x0f100e10) == 0x0e000a10)
6584 {
6585 unsigned int opcode = (insn >> 21) & 7;
6586 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
6587
6588 switch (opcode)
6589 {
6590 case 0: /* fmsr/fmdlr. */
6591 case 1: /* fmdhr. */
6592 /* Mark fmdhr and fmdlr as writing to the whole of the DP
6593 destination register. I don't know if this is exactly right,
6594 but it is the conservative choice. */
6595 bfd_arm_vfp11_write_mask (destmask, fn);
6596 break;
6597
6598 case 7: /* fmxr. */
6599 break;
6600 }
6601
6602 vpipe = VFP11_LS;
6603 }
6604
6605 return vpipe;
6606 }
6607
6608
6609 static int elf32_arm_compare_mapping (const void * a, const void * b);
6610
6611
6612 /* Look for potentially-troublesome code sequences which might trigger the
6613 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
6614 (available from ARM) for details of the erratum. A short version is
6615 described in ld.texinfo. */
6616
6617 bfd_boolean
6618 bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
6619 {
6620 asection *sec;
6621 bfd_byte *contents = NULL;
6622 int state = 0;
6623 int regs[3], numregs = 0;
6624 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6625 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
6626
6627 if (globals == NULL)
6628 return FALSE;
6629
6630 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
6631 The states transition as follows:
6632
6633 0 -> 1 (vector) or 0 -> 2 (scalar)
6634 A VFP FMAC-pipeline instruction has been seen. Fill
6635 regs[0]..regs[numregs-1] with its input operands. Remember this
6636 instruction in 'first_fmac'.
6637
6638 1 -> 2
6639 Any instruction, except for a VFP instruction which overwrites
6640 regs[*].
6641
6642 1 -> 3 [ -> 0 ] or
6643 2 -> 3 [ -> 0 ]
6644 A VFP instruction has been seen which overwrites any of regs[*].
6645 We must make a veneer! Reset state to 0 before examining next
6646 instruction.
6647
6648 2 -> 0
6649 If we fail to match anything in state 2, reset to state 0 and reset
6650 the instruction pointer to the instruction after 'first_fmac'.
6651
6652 If the VFP11 vector mode is in use, there must be at least two unrelated
6653 instructions between anti-dependent VFP11 instructions to properly avoid
6654 triggering the erratum, hence the use of the extra state 1. */
6655
6656 /* If we are only performing a partial link do not bother
6657 to construct any glue. */
6658 if (link_info->relocatable)
6659 return TRUE;
6660
6661 /* Skip if this bfd does not correspond to an ELF image. */
6662 if (! is_arm_elf (abfd))
6663 return TRUE;
6664
6665 /* We should have chosen a fix type by the time we get here. */
6666 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
6667
6668 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
6669 return TRUE;
6670
6671 /* Skip this BFD if it corresponds to an executable or dynamic object. */
6672 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
6673 return TRUE;
6674
6675 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6676 {
6677 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
6678 struct _arm_elf_section_data *sec_data;
6679
6680 /* If we don't have executable progbits, we're not interested in this
6681 section. Also skip if section is to be excluded. */
6682 if (elf_section_type (sec) != SHT_PROGBITS
6683 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
6684 || (sec->flags & SEC_EXCLUDE) != 0
6685 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
6686 || sec->output_section == bfd_abs_section_ptr
6687 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
6688 continue;
6689
6690 sec_data = elf32_arm_section_data (sec);
6691
6692 if (sec_data->mapcount == 0)
6693 continue;
6694
6695 if (elf_section_data (sec)->this_hdr.contents != NULL)
6696 contents = elf_section_data (sec)->this_hdr.contents;
6697 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6698 goto error_return;
6699
6700 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
6701 elf32_arm_compare_mapping);
6702
6703 for (span = 0; span < sec_data->mapcount; span++)
6704 {
6705 unsigned int span_start = sec_data->map[span].vma;
6706 unsigned int span_end = (span == sec_data->mapcount - 1)
6707 ? sec->size : sec_data->map[span + 1].vma;
6708 char span_type = sec_data->map[span].type;
6709
6710 /* FIXME: Only ARM mode is supported at present. We may need to
6711 support Thumb-2 mode also at some point. */
6712 if (span_type != 'a')
6713 continue;
6714
6715 for (i = span_start; i < span_end;)
6716 {
6717 unsigned int next_i = i + 4;
6718 unsigned int insn = bfd_big_endian (abfd)
6719 ? (contents[i] << 24)
6720 | (contents[i + 1] << 16)
6721 | (contents[i + 2] << 8)
6722 | contents[i + 3]
6723 : (contents[i + 3] << 24)
6724 | (contents[i + 2] << 16)
6725 | (contents[i + 1] << 8)
6726 | contents[i];
6727 unsigned int writemask = 0;
6728 enum bfd_arm_vfp11_pipe vpipe;
6729
6730 switch (state)
6731 {
6732 case 0:
6733 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
6734 &numregs);
6735 /* I'm assuming the VFP11 erratum can trigger with denorm
6736 operands on either the FMAC or the DS pipeline. This might
6737 lead to slightly overenthusiastic veneer insertion. */
6738 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
6739 {
6740 state = use_vector ? 1 : 2;
6741 first_fmac = i;
6742 veneer_of_insn = insn;
6743 }
6744 break;
6745
6746 case 1:
6747 {
6748 int other_regs[3], other_numregs;
6749 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
6750 other_regs,
6751 &other_numregs);
6752 if (vpipe != VFP11_BAD
6753 && bfd_arm_vfp11_antidependency (writemask, regs,
6754 numregs))
6755 state = 3;
6756 else
6757 state = 2;
6758 }
6759 break;
6760
6761 case 2:
6762 {
6763 int other_regs[3], other_numregs;
6764 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
6765 other_regs,
6766 &other_numregs);
6767 if (vpipe != VFP11_BAD
6768 && bfd_arm_vfp11_antidependency (writemask, regs,
6769 numregs))
6770 state = 3;
6771 else
6772 {
6773 state = 0;
6774 next_i = first_fmac + 4;
6775 }
6776 }
6777 break;
6778
6779 case 3:
6780 abort (); /* Should be unreachable. */
6781 }
6782
6783 if (state == 3)
6784 {
6785 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
6786 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
6787
6788 elf32_arm_section_data (sec)->erratumcount += 1;
6789
6790 newerr->u.b.vfp_insn = veneer_of_insn;
6791
6792 switch (span_type)
6793 {
6794 case 'a':
6795 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
6796 break;
6797
6798 default:
6799 abort ();
6800 }
6801
6802 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
6803 first_fmac);
6804
6805 newerr->vma = -1;
6806
6807 newerr->next = sec_data->erratumlist;
6808 sec_data->erratumlist = newerr;
6809
6810 state = 0;
6811 }
6812
6813 i = next_i;
6814 }
6815 }
6816
6817 if (contents != NULL
6818 && elf_section_data (sec)->this_hdr.contents != contents)
6819 free (contents);
6820 contents = NULL;
6821 }
6822
6823 return TRUE;
6824
6825 error_return:
6826 if (contents != NULL
6827 && elf_section_data (sec)->this_hdr.contents != contents)
6828 free (contents);
6829
6830 return FALSE;
6831 }
6832
6833 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
6834 after sections have been laid out, using specially-named symbols. */
6835
6836 void
6837 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
6838 struct bfd_link_info *link_info)
6839 {
6840 asection *sec;
6841 struct elf32_arm_link_hash_table *globals;
6842 char *tmp_name;
6843
6844 if (link_info->relocatable)
6845 return;
6846
6847 /* Skip if this bfd does not correspond to an ELF image. */
6848 if (! is_arm_elf (abfd))
6849 return;
6850
6851 globals = elf32_arm_hash_table (link_info);
6852 if (globals == NULL)
6853 return;
6854
6855 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
6856 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
6857
6858 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6859 {
6860 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
6861 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
6862
6863 for (; errnode != NULL; errnode = errnode->next)
6864 {
6865 struct elf_link_hash_entry *myh;
6866 bfd_vma vma;
6867
6868 switch (errnode->type)
6869 {
6870 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
6871 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
6872 /* Find veneer symbol. */
6873 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
6874 errnode->u.b.veneer->u.v.id);
6875
6876 myh = elf_link_hash_lookup
6877 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6878
6879 if (myh == NULL)
6880 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6881 "`%s'"), abfd, tmp_name);
6882
6883 vma = myh->root.u.def.section->output_section->vma
6884 + myh->root.u.def.section->output_offset
6885 + myh->root.u.def.value;
6886
6887 errnode->u.b.veneer->vma = vma;
6888 break;
6889
6890 case VFP11_ERRATUM_ARM_VENEER:
6891 case VFP11_ERRATUM_THUMB_VENEER:
6892 /* Find return location. */
6893 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6894 errnode->u.v.id);
6895
6896 myh = elf_link_hash_lookup
6897 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6898
6899 if (myh == NULL)
6900 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6901 "`%s'"), abfd, tmp_name);
6902
6903 vma = myh->root.u.def.section->output_section->vma
6904 + myh->root.u.def.section->output_offset
6905 + myh->root.u.def.value;
6906
6907 errnode->u.v.branch->vma = vma;
6908 break;
6909
6910 default:
6911 abort ();
6912 }
6913 }
6914 }
6915
6916 free (tmp_name);
6917 }
6918
6919
6920 /* Set target relocation values needed during linking. */
6921
6922 void
6923 bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
6924 struct bfd_link_info *link_info,
6925 int target1_is_rel,
6926 char * target2_type,
6927 int fix_v4bx,
6928 int use_blx,
6929 bfd_arm_vfp11_fix vfp11_fix,
6930 int no_enum_warn, int no_wchar_warn,
6931 int pic_veneer, int fix_cortex_a8,
6932 int fix_arm1176)
6933 {
6934 struct elf32_arm_link_hash_table *globals;
6935
6936 globals = elf32_arm_hash_table (link_info);
6937 if (globals == NULL)
6938 return;
6939
6940 globals->target1_is_rel = target1_is_rel;
6941 if (strcmp (target2_type, "rel") == 0)
6942 globals->target2_reloc = R_ARM_REL32;
6943 else if (strcmp (target2_type, "abs") == 0)
6944 globals->target2_reloc = R_ARM_ABS32;
6945 else if (strcmp (target2_type, "got-rel") == 0)
6946 globals->target2_reloc = R_ARM_GOT_PREL;
6947 else
6948 {
6949 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
6950 target2_type);
6951 }
6952 globals->fix_v4bx = fix_v4bx;
6953 globals->use_blx |= use_blx;
6954 globals->vfp11_fix = vfp11_fix;
6955 globals->pic_veneer = pic_veneer;
6956 globals->fix_cortex_a8 = fix_cortex_a8;
6957 globals->fix_arm1176 = fix_arm1176;
6958
6959 BFD_ASSERT (is_arm_elf (output_bfd));
6960 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
6961 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
6962 }
6963
6964 /* Replace the target offset of a Thumb bl or b.w instruction. */
6965
6966 static void
6967 insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
6968 {
6969 bfd_vma upper;
6970 bfd_vma lower;
6971 int reloc_sign;
6972
6973 BFD_ASSERT ((offset & 1) == 0);
6974
6975 upper = bfd_get_16 (abfd, insn);
6976 lower = bfd_get_16 (abfd, insn + 2);
6977 reloc_sign = (offset < 0) ? 1 : 0;
6978 upper = (upper & ~(bfd_vma) 0x7ff)
6979 | ((offset >> 12) & 0x3ff)
6980 | (reloc_sign << 10);
6981 lower = (lower & ~(bfd_vma) 0x2fff)
6982 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
6983 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
6984 | ((offset >> 1) & 0x7ff);
6985 bfd_put_16 (abfd, upper, insn);
6986 bfd_put_16 (abfd, lower, insn + 2);
6987 }
6988
6989 /* Thumb code calling an ARM function. */
6990
6991 static int
6992 elf32_thumb_to_arm_stub (struct bfd_link_info * info,
6993 const char * name,
6994 bfd * input_bfd,
6995 bfd * output_bfd,
6996 asection * input_section,
6997 bfd_byte * hit_data,
6998 asection * sym_sec,
6999 bfd_vma offset,
7000 bfd_signed_vma addend,
7001 bfd_vma val,
7002 char **error_message)
7003 {
7004 asection * s = 0;
7005 bfd_vma my_offset;
7006 long int ret_offset;
7007 struct elf_link_hash_entry * myh;
7008 struct elf32_arm_link_hash_table * globals;
7009
7010 myh = find_thumb_glue (info, name, error_message);
7011 if (myh == NULL)
7012 return FALSE;
7013
7014 globals = elf32_arm_hash_table (info);
7015 BFD_ASSERT (globals != NULL);
7016 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7017
7018 my_offset = myh->root.u.def.value;
7019
7020 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
7021 THUMB2ARM_GLUE_SECTION_NAME);
7022
7023 BFD_ASSERT (s != NULL);
7024 BFD_ASSERT (s->contents != NULL);
7025 BFD_ASSERT (s->output_section != NULL);
7026
7027 if ((my_offset & 0x01) == 0x01)
7028 {
7029 if (sym_sec != NULL
7030 && sym_sec->owner != NULL
7031 && !INTERWORK_FLAG (sym_sec->owner))
7032 {
7033 (*_bfd_error_handler)
7034 (_("%B(%s): warning: interworking not enabled.\n"
7035 " first occurrence: %B: Thumb call to ARM"),
7036 sym_sec->owner, input_bfd, name);
7037
7038 return FALSE;
7039 }
7040
7041 --my_offset;
7042 myh->root.u.def.value = my_offset;
7043
7044 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
7045 s->contents + my_offset);
7046
7047 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
7048 s->contents + my_offset + 2);
7049
7050 ret_offset =
7051 /* Address of destination of the stub. */
7052 ((bfd_signed_vma) val)
7053 - ((bfd_signed_vma)
7054 /* Offset from the start of the current section
7055 to the start of the stubs. */
7056 (s->output_offset
7057 /* Offset of the start of this stub from the start of the stubs. */
7058 + my_offset
7059 /* Address of the start of the current section. */
7060 + s->output_section->vma)
7061 /* The branch instruction is 4 bytes into the stub. */
7062 + 4
7063 /* ARM branches work from the pc of the instruction + 8. */
7064 + 8);
7065
7066 put_arm_insn (globals, output_bfd,
7067 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
7068 s->contents + my_offset + 4);
7069 }
7070
7071 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
7072
7073 /* Now go back and fix up the original BL insn to point to here. */
7074 ret_offset =
7075 /* Address of where the stub is located. */
7076 (s->output_section->vma + s->output_offset + my_offset)
7077 /* Address of where the BL is located. */
7078 - (input_section->output_section->vma + input_section->output_offset
7079 + offset)
7080 /* Addend in the relocation. */
7081 - addend
7082 /* Biassing for PC-relative addressing. */
7083 - 8;
7084
7085 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
7086
7087 return TRUE;
7088 }
7089
7090 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
7091
7092 static struct elf_link_hash_entry *
7093 elf32_arm_create_thumb_stub (struct bfd_link_info * info,
7094 const char * name,
7095 bfd * input_bfd,
7096 bfd * output_bfd,
7097 asection * sym_sec,
7098 bfd_vma val,
7099 asection * s,
7100 char ** error_message)
7101 {
7102 bfd_vma my_offset;
7103 long int ret_offset;
7104 struct elf_link_hash_entry * myh;
7105 struct elf32_arm_link_hash_table * globals;
7106
7107 myh = find_arm_glue (info, name, error_message);
7108 if (myh == NULL)
7109 return NULL;
7110
7111 globals = elf32_arm_hash_table (info);
7112 BFD_ASSERT (globals != NULL);
7113 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7114
7115 my_offset = myh->root.u.def.value;
7116
7117 if ((my_offset & 0x01) == 0x01)
7118 {
7119 if (sym_sec != NULL
7120 && sym_sec->owner != NULL
7121 && !INTERWORK_FLAG (sym_sec->owner))
7122 {
7123 (*_bfd_error_handler)
7124 (_("%B(%s): warning: interworking not enabled.\n"
7125 " first occurrence: %B: arm call to thumb"),
7126 sym_sec->owner, input_bfd, name);
7127 }
7128
7129 --my_offset;
7130 myh->root.u.def.value = my_offset;
7131
7132 if (info->shared || globals->root.is_relocatable_executable
7133 || globals->pic_veneer)
7134 {
7135 /* For relocatable objects we can't use absolute addresses,
7136 so construct the address from a relative offset. */
7137 /* TODO: If the offset is small it's probably worth
7138 constructing the address with adds. */
7139 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
7140 s->contents + my_offset);
7141 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
7142 s->contents + my_offset + 4);
7143 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
7144 s->contents + my_offset + 8);
7145 /* Adjust the offset by 4 for the position of the add,
7146 and 8 for the pipeline offset. */
7147 ret_offset = (val - (s->output_offset
7148 + s->output_section->vma
7149 + my_offset + 12))
7150 | 1;
7151 bfd_put_32 (output_bfd, ret_offset,
7152 s->contents + my_offset + 12);
7153 }
7154 else if (globals->use_blx)
7155 {
7156 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
7157 s->contents + my_offset);
7158
7159 /* It's a thumb address. Add the low order bit. */
7160 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
7161 s->contents + my_offset + 4);
7162 }
7163 else
7164 {
7165 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
7166 s->contents + my_offset);
7167
7168 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
7169 s->contents + my_offset + 4);
7170
7171 /* It's a thumb address. Add the low order bit. */
7172 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
7173 s->contents + my_offset + 8);
7174
7175 my_offset += 12;
7176 }
7177 }
7178
7179 BFD_ASSERT (my_offset <= globals->arm_glue_size);
7180
7181 return myh;
7182 }
7183
7184 /* Arm code calling a Thumb function. */
7185
7186 static int
7187 elf32_arm_to_thumb_stub (struct bfd_link_info * info,
7188 const char * name,
7189 bfd * input_bfd,
7190 bfd * output_bfd,
7191 asection * input_section,
7192 bfd_byte * hit_data,
7193 asection * sym_sec,
7194 bfd_vma offset,
7195 bfd_signed_vma addend,
7196 bfd_vma val,
7197 char **error_message)
7198 {
7199 unsigned long int tmp;
7200 bfd_vma my_offset;
7201 asection * s;
7202 long int ret_offset;
7203 struct elf_link_hash_entry * myh;
7204 struct elf32_arm_link_hash_table * globals;
7205
7206 globals = elf32_arm_hash_table (info);
7207 BFD_ASSERT (globals != NULL);
7208 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7209
7210 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
7211 ARM2THUMB_GLUE_SECTION_NAME);
7212 BFD_ASSERT (s != NULL);
7213 BFD_ASSERT (s->contents != NULL);
7214 BFD_ASSERT (s->output_section != NULL);
7215
7216 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
7217 sym_sec, val, s, error_message);
7218 if (!myh)
7219 return FALSE;
7220
7221 my_offset = myh->root.u.def.value;
7222 tmp = bfd_get_32 (input_bfd, hit_data);
7223 tmp = tmp & 0xFF000000;
7224
7225 /* Somehow these are both 4 too far, so subtract 8. */
7226 ret_offset = (s->output_offset
7227 + my_offset
7228 + s->output_section->vma
7229 - (input_section->output_offset
7230 + input_section->output_section->vma
7231 + offset + addend)
7232 - 8);
7233
7234 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
7235
7236 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
7237
7238 return TRUE;
7239 }
7240
7241 /* Populate Arm stub for an exported Thumb function. */
7242
7243 static bfd_boolean
7244 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
7245 {
7246 struct bfd_link_info * info = (struct bfd_link_info *) inf;
7247 asection * s;
7248 struct elf_link_hash_entry * myh;
7249 struct elf32_arm_link_hash_entry *eh;
7250 struct elf32_arm_link_hash_table * globals;
7251 asection *sec;
7252 bfd_vma val;
7253 char *error_message;
7254
7255 eh = elf32_arm_hash_entry (h);
7256 /* Allocate stubs for exported Thumb functions on v4t. */
7257 if (eh->export_glue == NULL)
7258 return TRUE;
7259
7260 globals = elf32_arm_hash_table (info);
7261 BFD_ASSERT (globals != NULL);
7262 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7263
7264 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
7265 ARM2THUMB_GLUE_SECTION_NAME);
7266 BFD_ASSERT (s != NULL);
7267 BFD_ASSERT (s->contents != NULL);
7268 BFD_ASSERT (s->output_section != NULL);
7269
7270 sec = eh->export_glue->root.u.def.section;
7271
7272 BFD_ASSERT (sec->output_section != NULL);
7273
7274 val = eh->export_glue->root.u.def.value + sec->output_offset
7275 + sec->output_section->vma;
7276
7277 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
7278 h->root.u.def.section->owner,
7279 globals->obfd, sec, val, s,
7280 &error_message);
7281 BFD_ASSERT (myh);
7282 return TRUE;
7283 }
7284
7285 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
7286
7287 static bfd_vma
7288 elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
7289 {
7290 bfd_byte *p;
7291 bfd_vma glue_addr;
7292 asection *s;
7293 struct elf32_arm_link_hash_table *globals;
7294
7295 globals = elf32_arm_hash_table (info);
7296 BFD_ASSERT (globals != NULL);
7297 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7298
7299 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
7300 ARM_BX_GLUE_SECTION_NAME);
7301 BFD_ASSERT (s != NULL);
7302 BFD_ASSERT (s->contents != NULL);
7303 BFD_ASSERT (s->output_section != NULL);
7304
7305 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
7306
7307 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
7308
7309 if ((globals->bx_glue_offset[reg] & 1) == 0)
7310 {
7311 p = s->contents + glue_addr;
7312 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
7313 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
7314 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
7315 globals->bx_glue_offset[reg] |= 1;
7316 }
7317
7318 return glue_addr + s->output_section->vma + s->output_offset;
7319 }
7320
7321 /* Generate Arm stubs for exported Thumb symbols. */
7322 static void
7323 elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
7324 struct bfd_link_info *link_info)
7325 {
7326 struct elf32_arm_link_hash_table * globals;
7327
7328 if (link_info == NULL)
7329 /* Ignore this if we are not called by the ELF backend linker. */
7330 return;
7331
7332 globals = elf32_arm_hash_table (link_info);
7333 if (globals == NULL)
7334 return;
7335
7336 /* If blx is available then exported Thumb symbols are OK and there is
7337 nothing to do. */
7338 if (globals->use_blx)
7339 return;
7340
7341 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
7342 link_info);
7343 }
7344
7345 /* Reserve space for COUNT dynamic relocations in relocation selection
7346 SRELOC. */
7347
7348 static void
7349 elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
7350 bfd_size_type count)
7351 {
7352 struct elf32_arm_link_hash_table *htab;
7353
7354 htab = elf32_arm_hash_table (info);
7355 BFD_ASSERT (htab->root.dynamic_sections_created);
7356 if (sreloc == NULL)
7357 abort ();
7358 sreloc->size += RELOC_SIZE (htab) * count;
7359 }
7360
7361 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
7362 dynamic, the relocations should go in SRELOC, otherwise they should
7363 go in the special .rel.iplt section. */
7364
7365 static void
7366 elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
7367 bfd_size_type count)
7368 {
7369 struct elf32_arm_link_hash_table *htab;
7370
7371 htab = elf32_arm_hash_table (info);
7372 if (!htab->root.dynamic_sections_created)
7373 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
7374 else
7375 {
7376 BFD_ASSERT (sreloc != NULL);
7377 sreloc->size += RELOC_SIZE (htab) * count;
7378 }
7379 }
7380
7381 /* Add relocation REL to the end of relocation section SRELOC. */
7382
7383 static void
7384 elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
7385 asection *sreloc, Elf_Internal_Rela *rel)
7386 {
7387 bfd_byte *loc;
7388 struct elf32_arm_link_hash_table *htab;
7389
7390 htab = elf32_arm_hash_table (info);
7391 if (!htab->root.dynamic_sections_created
7392 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
7393 sreloc = htab->root.irelplt;
7394 if (sreloc == NULL)
7395 abort ();
7396 loc = sreloc->contents;
7397 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
7398 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
7399 abort ();
7400 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
7401 }
7402
7403 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
7404 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
7405 to .plt. */
7406
7407 static void
7408 elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
7409 bfd_boolean is_iplt_entry,
7410 union gotplt_union *root_plt,
7411 struct arm_plt_info *arm_plt)
7412 {
7413 struct elf32_arm_link_hash_table *htab;
7414 asection *splt;
7415 asection *sgotplt;
7416
7417 htab = elf32_arm_hash_table (info);
7418
7419 if (is_iplt_entry)
7420 {
7421 splt = htab->root.iplt;
7422 sgotplt = htab->root.igotplt;
7423
7424 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
7425 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
7426 }
7427 else
7428 {
7429 splt = htab->root.splt;
7430 sgotplt = htab->root.sgotplt;
7431
7432 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
7433 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
7434
7435 /* If this is the first .plt entry, make room for the special
7436 first entry. */
7437 if (splt->size == 0)
7438 splt->size += htab->plt_header_size;
7439 }
7440
7441 /* Allocate the PLT entry itself, including any leading Thumb stub. */
7442 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
7443 splt->size += PLT_THUMB_STUB_SIZE;
7444 root_plt->offset = splt->size;
7445 splt->size += htab->plt_entry_size;
7446
7447 if (!htab->symbian_p)
7448 {
7449 /* We also need to make an entry in the .got.plt section, which
7450 will be placed in the .got section by the linker script. */
7451 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
7452 sgotplt->size += 4;
7453 }
7454 }
7455
7456 static bfd_vma
7457 arm_movw_immediate (bfd_vma value)
7458 {
7459 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
7460 }
7461
7462 static bfd_vma
7463 arm_movt_immediate (bfd_vma value)
7464 {
7465 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
7466 }
7467
7468 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
7469 the entry lives in .iplt and resolves to (*SYM_VALUE)().
7470 Otherwise, DYNINDX is the index of the symbol in the dynamic
7471 symbol table and SYM_VALUE is undefined.
7472
7473 ROOT_PLT points to the offset of the PLT entry from the start of its
7474 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
7475 bookkeeping information. */
7476
7477 static void
7478 elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
7479 union gotplt_union *root_plt,
7480 struct arm_plt_info *arm_plt,
7481 int dynindx, bfd_vma sym_value)
7482 {
7483 struct elf32_arm_link_hash_table *htab;
7484 asection *sgot;
7485 asection *splt;
7486 asection *srel;
7487 bfd_byte *loc;
7488 bfd_vma plt_index;
7489 Elf_Internal_Rela rel;
7490 bfd_vma plt_header_size;
7491 bfd_vma got_header_size;
7492
7493 htab = elf32_arm_hash_table (info);
7494
7495 /* Pick the appropriate sections and sizes. */
7496 if (dynindx == -1)
7497 {
7498 splt = htab->root.iplt;
7499 sgot = htab->root.igotplt;
7500 srel = htab->root.irelplt;
7501
7502 /* There are no reserved entries in .igot.plt, and no special
7503 first entry in .iplt. */
7504 got_header_size = 0;
7505 plt_header_size = 0;
7506 }
7507 else
7508 {
7509 splt = htab->root.splt;
7510 sgot = htab->root.sgotplt;
7511 srel = htab->root.srelplt;
7512
7513 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
7514 plt_header_size = htab->plt_header_size;
7515 }
7516 BFD_ASSERT (splt != NULL && srel != NULL);
7517
7518 /* Fill in the entry in the procedure linkage table. */
7519 if (htab->symbian_p)
7520 {
7521 BFD_ASSERT (dynindx >= 0);
7522 put_arm_insn (htab, output_bfd,
7523 elf32_arm_symbian_plt_entry[0],
7524 splt->contents + root_plt->offset);
7525 bfd_put_32 (output_bfd,
7526 elf32_arm_symbian_plt_entry[1],
7527 splt->contents + root_plt->offset + 4);
7528
7529 /* Fill in the entry in the .rel.plt section. */
7530 rel.r_offset = (splt->output_section->vma
7531 + splt->output_offset
7532 + root_plt->offset + 4);
7533 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
7534
7535 /* Get the index in the procedure linkage table which
7536 corresponds to this symbol. This is the index of this symbol
7537 in all the symbols for which we are making plt entries. The
7538 first entry in the procedure linkage table is reserved. */
7539 plt_index = ((root_plt->offset - plt_header_size)
7540 / htab->plt_entry_size);
7541 }
7542 else
7543 {
7544 bfd_vma got_offset, got_address, plt_address;
7545 bfd_vma got_displacement, initial_got_entry;
7546 bfd_byte * ptr;
7547
7548 BFD_ASSERT (sgot != NULL);
7549
7550 /* Get the offset into the .(i)got.plt table of the entry that
7551 corresponds to this function. */
7552 got_offset = (arm_plt->got_offset & -2);
7553
7554 /* Get the index in the procedure linkage table which
7555 corresponds to this symbol. This is the index of this symbol
7556 in all the symbols for which we are making plt entries.
7557 After the reserved .got.plt entries, all symbols appear in
7558 the same order as in .plt. */
7559 plt_index = (got_offset - got_header_size) / 4;
7560
7561 /* Calculate the address of the GOT entry. */
7562 got_address = (sgot->output_section->vma
7563 + sgot->output_offset
7564 + got_offset);
7565
7566 /* ...and the address of the PLT entry. */
7567 plt_address = (splt->output_section->vma
7568 + splt->output_offset
7569 + root_plt->offset);
7570
7571 ptr = splt->contents + root_plt->offset;
7572 if (htab->vxworks_p && info->shared)
7573 {
7574 unsigned int i;
7575 bfd_vma val;
7576
7577 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
7578 {
7579 val = elf32_arm_vxworks_shared_plt_entry[i];
7580 if (i == 2)
7581 val |= got_address - sgot->output_section->vma;
7582 if (i == 5)
7583 val |= plt_index * RELOC_SIZE (htab);
7584 if (i == 2 || i == 5)
7585 bfd_put_32 (output_bfd, val, ptr);
7586 else
7587 put_arm_insn (htab, output_bfd, val, ptr);
7588 }
7589 }
7590 else if (htab->vxworks_p)
7591 {
7592 unsigned int i;
7593 bfd_vma val;
7594
7595 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
7596 {
7597 val = elf32_arm_vxworks_exec_plt_entry[i];
7598 if (i == 2)
7599 val |= got_address;
7600 if (i == 4)
7601 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
7602 if (i == 5)
7603 val |= plt_index * RELOC_SIZE (htab);
7604 if (i == 2 || i == 5)
7605 bfd_put_32 (output_bfd, val, ptr);
7606 else
7607 put_arm_insn (htab, output_bfd, val, ptr);
7608 }
7609
7610 loc = (htab->srelplt2->contents
7611 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
7612
7613 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
7614 referencing the GOT for this PLT entry. */
7615 rel.r_offset = plt_address + 8;
7616 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
7617 rel.r_addend = got_offset;
7618 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7619 loc += RELOC_SIZE (htab);
7620
7621 /* Create the R_ARM_ABS32 relocation referencing the
7622 beginning of the PLT for this GOT entry. */
7623 rel.r_offset = got_address;
7624 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
7625 rel.r_addend = 0;
7626 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7627 }
7628 else if (htab->nacl_p)
7629 {
7630 /* Calculate the displacement between the PLT slot and the
7631 common tail that's part of the special initial PLT slot. */
7632 bfd_vma tail_displacement
7633 = ((splt->output_section->vma + splt->output_offset
7634 + ARM_NACL_PLT_TAIL_OFFSET)
7635 - (plt_address + htab->plt_entry_size + 4));
7636 BFD_ASSERT ((tail_displacement & 3) == 0);
7637 tail_displacement >>= 2;
7638
7639 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
7640 || (-tail_displacement & 0xff000000) == 0);
7641
7642 /* Calculate the displacement between the PLT slot and the entry
7643 in the GOT. The offset accounts for the value produced by
7644 adding to pc in the penultimate instruction of the PLT stub. */
7645 got_displacement = got_address - (plt_address + htab->plt_entry_size);
7646
7647 /* NaCl does not support interworking at all. */
7648 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
7649
7650 put_arm_insn (htab, output_bfd,
7651 elf32_arm_nacl_plt_entry[0]
7652 | arm_movw_immediate (got_displacement),
7653 ptr + 0);
7654 put_arm_insn (htab, output_bfd,
7655 elf32_arm_nacl_plt_entry[1]
7656 | arm_movt_immediate (got_displacement),
7657 ptr + 4);
7658 put_arm_insn (htab, output_bfd,
7659 elf32_arm_nacl_plt_entry[2],
7660 ptr + 8);
7661 put_arm_insn (htab, output_bfd,
7662 elf32_arm_nacl_plt_entry[3]
7663 | (tail_displacement & 0x00ffffff),
7664 ptr + 12);
7665 }
7666 else
7667 {
7668 /* Calculate the displacement between the PLT slot and the
7669 entry in the GOT. The eight-byte offset accounts for the
7670 value produced by adding to pc in the first instruction
7671 of the PLT stub. */
7672 got_displacement = got_address - (plt_address + 8);
7673
7674 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
7675
7676 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
7677 {
7678 put_thumb_insn (htab, output_bfd,
7679 elf32_arm_plt_thumb_stub[0], ptr - 4);
7680 put_thumb_insn (htab, output_bfd,
7681 elf32_arm_plt_thumb_stub[1], ptr - 2);
7682 }
7683
7684 put_arm_insn (htab, output_bfd,
7685 elf32_arm_plt_entry[0]
7686 | ((got_displacement & 0x0ff00000) >> 20),
7687 ptr + 0);
7688 put_arm_insn (htab, output_bfd,
7689 elf32_arm_plt_entry[1]
7690 | ((got_displacement & 0x000ff000) >> 12),
7691 ptr+ 4);
7692 put_arm_insn (htab, output_bfd,
7693 elf32_arm_plt_entry[2]
7694 | (got_displacement & 0x00000fff),
7695 ptr + 8);
7696 #ifdef FOUR_WORD_PLT
7697 bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12);
7698 #endif
7699 }
7700
7701 /* Fill in the entry in the .rel(a).(i)plt section. */
7702 rel.r_offset = got_address;
7703 rel.r_addend = 0;
7704 if (dynindx == -1)
7705 {
7706 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
7707 The dynamic linker or static executable then calls SYM_VALUE
7708 to determine the correct run-time value of the .igot.plt entry. */
7709 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
7710 initial_got_entry = sym_value;
7711 }
7712 else
7713 {
7714 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
7715 initial_got_entry = (splt->output_section->vma
7716 + splt->output_offset);
7717 }
7718
7719 /* Fill in the entry in the global offset table. */
7720 bfd_put_32 (output_bfd, initial_got_entry,
7721 sgot->contents + got_offset);
7722 }
7723
7724 loc = srel->contents + plt_index * RELOC_SIZE (htab);
7725 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7726 }
7727
7728 /* Some relocations map to different relocations depending on the
7729 target. Return the real relocation. */
7730
7731 static int
7732 arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
7733 int r_type)
7734 {
7735 switch (r_type)
7736 {
7737 case R_ARM_TARGET1:
7738 if (globals->target1_is_rel)
7739 return R_ARM_REL32;
7740 else
7741 return R_ARM_ABS32;
7742
7743 case R_ARM_TARGET2:
7744 return globals->target2_reloc;
7745
7746 default:
7747 return r_type;
7748 }
7749 }
7750
7751 /* Return the base VMA address which should be subtracted from real addresses
7752 when resolving @dtpoff relocation.
7753 This is PT_TLS segment p_vaddr. */
7754
7755 static bfd_vma
7756 dtpoff_base (struct bfd_link_info *info)
7757 {
7758 /* If tls_sec is NULL, we should have signalled an error already. */
7759 if (elf_hash_table (info)->tls_sec == NULL)
7760 return 0;
7761 return elf_hash_table (info)->tls_sec->vma;
7762 }
7763
7764 /* Return the relocation value for @tpoff relocation
7765 if STT_TLS virtual address is ADDRESS. */
7766
7767 static bfd_vma
7768 tpoff (struct bfd_link_info *info, bfd_vma address)
7769 {
7770 struct elf_link_hash_table *htab = elf_hash_table (info);
7771 bfd_vma base;
7772
7773 /* If tls_sec is NULL, we should have signalled an error already. */
7774 if (htab->tls_sec == NULL)
7775 return 0;
7776 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
7777 return address - htab->tls_sec->vma + base;
7778 }
7779
7780 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
7781 VALUE is the relocation value. */
7782
7783 static bfd_reloc_status_type
7784 elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
7785 {
7786 if (value > 0xfff)
7787 return bfd_reloc_overflow;
7788
7789 value |= bfd_get_32 (abfd, data) & 0xfffff000;
7790 bfd_put_32 (abfd, value, data);
7791 return bfd_reloc_ok;
7792 }
7793
7794 /* Handle TLS relaxations. Relaxing is possible for symbols that use
7795 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
7796 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
7797
7798 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
7799 is to then call final_link_relocate. Return other values in the
7800 case of error.
7801
7802 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
7803 the pre-relaxed code. It would be nice if the relocs were updated
7804 to match the optimization. */
7805
7806 static bfd_reloc_status_type
7807 elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
7808 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
7809 Elf_Internal_Rela *rel, unsigned long is_local)
7810 {
7811 unsigned long insn;
7812
7813 switch (ELF32_R_TYPE (rel->r_info))
7814 {
7815 default:
7816 return bfd_reloc_notsupported;
7817
7818 case R_ARM_TLS_GOTDESC:
7819 if (is_local)
7820 insn = 0;
7821 else
7822 {
7823 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7824 if (insn & 1)
7825 insn -= 5; /* THUMB */
7826 else
7827 insn -= 8; /* ARM */
7828 }
7829 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
7830 return bfd_reloc_continue;
7831
7832 case R_ARM_THM_TLS_DESCSEQ:
7833 /* Thumb insn. */
7834 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
7835 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
7836 {
7837 if (is_local)
7838 /* nop */
7839 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7840 }
7841 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
7842 {
7843 if (is_local)
7844 /* nop */
7845 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7846 else
7847 /* ldr rx,[ry] */
7848 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
7849 }
7850 else if ((insn & 0xff87) == 0x4780) /* blx rx */
7851 {
7852 if (is_local)
7853 /* nop */
7854 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7855 else
7856 /* mov r0, rx */
7857 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
7858 contents + rel->r_offset);
7859 }
7860 else
7861 {
7862 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
7863 /* It's a 32 bit instruction, fetch the rest of it for
7864 error generation. */
7865 insn = (insn << 16)
7866 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
7867 (*_bfd_error_handler)
7868 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"),
7869 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
7870 return bfd_reloc_notsupported;
7871 }
7872 break;
7873
7874 case R_ARM_TLS_DESCSEQ:
7875 /* arm insn. */
7876 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7877 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
7878 {
7879 if (is_local)
7880 /* mov rx, ry */
7881 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
7882 contents + rel->r_offset);
7883 }
7884 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
7885 {
7886 if (is_local)
7887 /* nop */
7888 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
7889 else
7890 /* ldr rx,[ry] */
7891 bfd_put_32 (input_bfd, insn & 0xfffff000,
7892 contents + rel->r_offset);
7893 }
7894 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
7895 {
7896 if (is_local)
7897 /* nop */
7898 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
7899 else
7900 /* mov r0, rx */
7901 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
7902 contents + rel->r_offset);
7903 }
7904 else
7905 {
7906 (*_bfd_error_handler)
7907 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline"),
7908 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
7909 return bfd_reloc_notsupported;
7910 }
7911 break;
7912
7913 case R_ARM_TLS_CALL:
7914 /* GD->IE relaxation, turn the instruction into 'nop' or
7915 'ldr r0, [pc,r0]' */
7916 insn = is_local ? 0xe1a00000 : 0xe79f0000;
7917 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
7918 break;
7919
7920 case R_ARM_THM_TLS_CALL:
7921 /* GD->IE relaxation */
7922 if (!is_local)
7923 /* add r0,pc; ldr r0, [r0] */
7924 insn = 0x44786800;
7925 else if (arch_has_thumb2_nop (globals))
7926 /* nop.w */
7927 insn = 0xf3af8000;
7928 else
7929 /* nop; nop */
7930 insn = 0xbf00bf00;
7931
7932 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
7933 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
7934 break;
7935 }
7936 return bfd_reloc_ok;
7937 }
7938
7939 /* For a given value of n, calculate the value of G_n as required to
7940 deal with group relocations. We return it in the form of an
7941 encoded constant-and-rotation, together with the final residual. If n is
7942 specified as less than zero, then final_residual is filled with the
7943 input value and no further action is performed. */
7944
7945 static bfd_vma
7946 calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
7947 {
7948 int current_n;
7949 bfd_vma g_n;
7950 bfd_vma encoded_g_n = 0;
7951 bfd_vma residual = value; /* Also known as Y_n. */
7952
7953 for (current_n = 0; current_n <= n; current_n++)
7954 {
7955 int shift;
7956
7957 /* Calculate which part of the value to mask. */
7958 if (residual == 0)
7959 shift = 0;
7960 else
7961 {
7962 int msb;
7963
7964 /* Determine the most significant bit in the residual and
7965 align the resulting value to a 2-bit boundary. */
7966 for (msb = 30; msb >= 0; msb -= 2)
7967 if (residual & (3 << msb))
7968 break;
7969
7970 /* The desired shift is now (msb - 6), or zero, whichever
7971 is the greater. */
7972 shift = msb - 6;
7973 if (shift < 0)
7974 shift = 0;
7975 }
7976
7977 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
7978 g_n = residual & (0xff << shift);
7979 encoded_g_n = (g_n >> shift)
7980 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
7981
7982 /* Calculate the residual for the next time around. */
7983 residual &= ~g_n;
7984 }
7985
7986 *final_residual = residual;
7987
7988 return encoded_g_n;
7989 }
7990
7991 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
7992 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
7993
7994 static int
7995 identify_add_or_sub (bfd_vma insn)
7996 {
7997 int opcode = insn & 0x1e00000;
7998
7999 if (opcode == 1 << 23) /* ADD */
8000 return 1;
8001
8002 if (opcode == 1 << 22) /* SUB */
8003 return -1;
8004
8005 return 0;
8006 }
8007
8008 /* Perform a relocation as part of a final link. */
8009
8010 static bfd_reloc_status_type
8011 elf32_arm_final_link_relocate (reloc_howto_type * howto,
8012 bfd * input_bfd,
8013 bfd * output_bfd,
8014 asection * input_section,
8015 bfd_byte * contents,
8016 Elf_Internal_Rela * rel,
8017 bfd_vma value,
8018 struct bfd_link_info * info,
8019 asection * sym_sec,
8020 const char * sym_name,
8021 unsigned char st_type,
8022 enum arm_st_branch_type branch_type,
8023 struct elf_link_hash_entry * h,
8024 bfd_boolean * unresolved_reloc_p,
8025 char ** error_message)
8026 {
8027 unsigned long r_type = howto->type;
8028 unsigned long r_symndx;
8029 bfd_byte * hit_data = contents + rel->r_offset;
8030 bfd_vma * local_got_offsets;
8031 bfd_vma * local_tlsdesc_gotents;
8032 asection * sgot;
8033 asection * splt;
8034 asection * sreloc = NULL;
8035 asection * srelgot;
8036 bfd_vma addend;
8037 bfd_signed_vma signed_addend;
8038 unsigned char dynreloc_st_type;
8039 bfd_vma dynreloc_value;
8040 struct elf32_arm_link_hash_table * globals;
8041 struct elf32_arm_link_hash_entry *eh;
8042 union gotplt_union *root_plt;
8043 struct arm_plt_info *arm_plt;
8044 bfd_vma plt_offset;
8045 bfd_vma gotplt_offset;
8046 bfd_boolean has_iplt_entry;
8047
8048 globals = elf32_arm_hash_table (info);
8049 if (globals == NULL)
8050 return bfd_reloc_notsupported;
8051
8052 BFD_ASSERT (is_arm_elf (input_bfd));
8053
8054 /* Some relocation types map to different relocations depending on the
8055 target. We pick the right one here. */
8056 r_type = arm_real_reloc_type (globals, r_type);
8057
8058 /* It is possible to have linker relaxations on some TLS access
8059 models. Update our information here. */
8060 r_type = elf32_arm_tls_transition (info, r_type, h);
8061
8062 if (r_type != howto->type)
8063 howto = elf32_arm_howto_from_type (r_type);
8064
8065 /* If the start address has been set, then set the EF_ARM_HASENTRY
8066 flag. Setting this more than once is redundant, but the cost is
8067 not too high, and it keeps the code simple.
8068
8069 The test is done here, rather than somewhere else, because the
8070 start address is only set just before the final link commences.
8071
8072 Note - if the user deliberately sets a start address of 0, the
8073 flag will not be set. */
8074 if (bfd_get_start_address (output_bfd) != 0)
8075 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
8076
8077 eh = (struct elf32_arm_link_hash_entry *) h;
8078 sgot = globals->root.sgot;
8079 local_got_offsets = elf_local_got_offsets (input_bfd);
8080 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
8081
8082 if (globals->root.dynamic_sections_created)
8083 srelgot = globals->root.srelgot;
8084 else
8085 srelgot = NULL;
8086
8087 r_symndx = ELF32_R_SYM (rel->r_info);
8088
8089 if (globals->use_rel)
8090 {
8091 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
8092
8093 if (addend & ((howto->src_mask + 1) >> 1))
8094 {
8095 signed_addend = -1;
8096 signed_addend &= ~ howto->src_mask;
8097 signed_addend |= addend;
8098 }
8099 else
8100 signed_addend = addend;
8101 }
8102 else
8103 addend = signed_addend = rel->r_addend;
8104
8105 /* Record the symbol information that should be used in dynamic
8106 relocations. */
8107 dynreloc_st_type = st_type;
8108 dynreloc_value = value;
8109 if (branch_type == ST_BRANCH_TO_THUMB)
8110 dynreloc_value |= 1;
8111
8112 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
8113 VALUE appropriately for relocations that we resolve at link time. */
8114 has_iplt_entry = FALSE;
8115 if (elf32_arm_get_plt_info (input_bfd, eh, r_symndx, &root_plt, &arm_plt)
8116 && root_plt->offset != (bfd_vma) -1)
8117 {
8118 plt_offset = root_plt->offset;
8119 gotplt_offset = arm_plt->got_offset;
8120
8121 if (h == NULL || eh->is_iplt)
8122 {
8123 has_iplt_entry = TRUE;
8124 splt = globals->root.iplt;
8125
8126 /* Populate .iplt entries here, because not all of them will
8127 be seen by finish_dynamic_symbol. The lower bit is set if
8128 we have already populated the entry. */
8129 if (plt_offset & 1)
8130 plt_offset--;
8131 else
8132 {
8133 elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
8134 -1, dynreloc_value);
8135 root_plt->offset |= 1;
8136 }
8137
8138 /* Static relocations always resolve to the .iplt entry. */
8139 st_type = STT_FUNC;
8140 value = (splt->output_section->vma
8141 + splt->output_offset
8142 + plt_offset);
8143 branch_type = ST_BRANCH_TO_ARM;
8144
8145 /* If there are non-call relocations that resolve to the .iplt
8146 entry, then all dynamic ones must too. */
8147 if (arm_plt->noncall_refcount != 0)
8148 {
8149 dynreloc_st_type = st_type;
8150 dynreloc_value = value;
8151 }
8152 }
8153 else
8154 /* We populate the .plt entry in finish_dynamic_symbol. */
8155 splt = globals->root.splt;
8156 }
8157 else
8158 {
8159 splt = NULL;
8160 plt_offset = (bfd_vma) -1;
8161 gotplt_offset = (bfd_vma) -1;
8162 }
8163
8164 switch (r_type)
8165 {
8166 case R_ARM_NONE:
8167 /* We don't need to find a value for this symbol. It's just a
8168 marker. */
8169 *unresolved_reloc_p = FALSE;
8170 return bfd_reloc_ok;
8171
8172 case R_ARM_ABS12:
8173 if (!globals->vxworks_p)
8174 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
8175
8176 case R_ARM_PC24:
8177 case R_ARM_ABS32:
8178 case R_ARM_ABS32_NOI:
8179 case R_ARM_REL32:
8180 case R_ARM_REL32_NOI:
8181 case R_ARM_CALL:
8182 case R_ARM_JUMP24:
8183 case R_ARM_XPC25:
8184 case R_ARM_PREL31:
8185 case R_ARM_PLT32:
8186 /* Handle relocations which should use the PLT entry. ABS32/REL32
8187 will use the symbol's value, which may point to a PLT entry, but we
8188 don't need to handle that here. If we created a PLT entry, all
8189 branches in this object should go to it, except if the PLT is too
8190 far away, in which case a long branch stub should be inserted. */
8191 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
8192 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
8193 && r_type != R_ARM_CALL
8194 && r_type != R_ARM_JUMP24
8195 && r_type != R_ARM_PLT32)
8196 && plt_offset != (bfd_vma) -1)
8197 {
8198 /* If we've created a .plt section, and assigned a PLT entry
8199 to this function, it must either be a STT_GNU_IFUNC reference
8200 or not be known to bind locally. In other cases, we should
8201 have cleared the PLT entry by now. */
8202 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
8203
8204 value = (splt->output_section->vma
8205 + splt->output_offset
8206 + plt_offset);
8207 *unresolved_reloc_p = FALSE;
8208 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8209 contents, rel->r_offset, value,
8210 rel->r_addend);
8211 }
8212
8213 /* When generating a shared object or relocatable executable, these
8214 relocations are copied into the output file to be resolved at
8215 run time. */
8216 if ((info->shared || globals->root.is_relocatable_executable)
8217 && (input_section->flags & SEC_ALLOC)
8218 && !(globals->vxworks_p
8219 && strcmp (input_section->output_section->name,
8220 ".tls_vars") == 0)
8221 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
8222 || !SYMBOL_CALLS_LOCAL (info, h))
8223 && (!strstr (input_section->name, STUB_SUFFIX))
8224 && (h == NULL
8225 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8226 || h->root.type != bfd_link_hash_undefweak)
8227 && r_type != R_ARM_PC24
8228 && r_type != R_ARM_CALL
8229 && r_type != R_ARM_JUMP24
8230 && r_type != R_ARM_PREL31
8231 && r_type != R_ARM_PLT32)
8232 {
8233 Elf_Internal_Rela outrel;
8234 bfd_boolean skip, relocate;
8235
8236 *unresolved_reloc_p = FALSE;
8237
8238 if (sreloc == NULL && globals->root.dynamic_sections_created)
8239 {
8240 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
8241 ! globals->use_rel);
8242
8243 if (sreloc == NULL)
8244 return bfd_reloc_notsupported;
8245 }
8246
8247 skip = FALSE;
8248 relocate = FALSE;
8249
8250 outrel.r_addend = addend;
8251 outrel.r_offset =
8252 _bfd_elf_section_offset (output_bfd, info, input_section,
8253 rel->r_offset);
8254 if (outrel.r_offset == (bfd_vma) -1)
8255 skip = TRUE;
8256 else if (outrel.r_offset == (bfd_vma) -2)
8257 skip = TRUE, relocate = TRUE;
8258 outrel.r_offset += (input_section->output_section->vma
8259 + input_section->output_offset);
8260
8261 if (skip)
8262 memset (&outrel, 0, sizeof outrel);
8263 else if (h != NULL
8264 && h->dynindx != -1
8265 && (!info->shared
8266 || !info->symbolic
8267 || !h->def_regular))
8268 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
8269 else
8270 {
8271 int symbol;
8272
8273 /* This symbol is local, or marked to become local. */
8274 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI);
8275 if (globals->symbian_p)
8276 {
8277 asection *osec;
8278
8279 /* On Symbian OS, the data segment and text segement
8280 can be relocated independently. Therefore, we
8281 must indicate the segment to which this
8282 relocation is relative. The BPABI allows us to
8283 use any symbol in the right segment; we just use
8284 the section symbol as it is convenient. (We
8285 cannot use the symbol given by "h" directly as it
8286 will not appear in the dynamic symbol table.)
8287
8288 Note that the dynamic linker ignores the section
8289 symbol value, so we don't subtract osec->vma
8290 from the emitted reloc addend. */
8291 if (sym_sec)
8292 osec = sym_sec->output_section;
8293 else
8294 osec = input_section->output_section;
8295 symbol = elf_section_data (osec)->dynindx;
8296 if (symbol == 0)
8297 {
8298 struct elf_link_hash_table *htab = elf_hash_table (info);
8299
8300 if ((osec->flags & SEC_READONLY) == 0
8301 && htab->data_index_section != NULL)
8302 osec = htab->data_index_section;
8303 else
8304 osec = htab->text_index_section;
8305 symbol = elf_section_data (osec)->dynindx;
8306 }
8307 BFD_ASSERT (symbol != 0);
8308 }
8309 else
8310 /* On SVR4-ish systems, the dynamic loader cannot
8311 relocate the text and data segments independently,
8312 so the symbol does not matter. */
8313 symbol = 0;
8314 if (dynreloc_st_type == STT_GNU_IFUNC)
8315 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
8316 to the .iplt entry. Instead, every non-call reference
8317 must use an R_ARM_IRELATIVE relocation to obtain the
8318 correct run-time address. */
8319 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
8320 else
8321 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
8322 if (globals->use_rel)
8323 relocate = TRUE;
8324 else
8325 outrel.r_addend += dynreloc_value;
8326 }
8327
8328 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
8329
8330 /* If this reloc is against an external symbol, we do not want to
8331 fiddle with the addend. Otherwise, we need to include the symbol
8332 value so that it becomes an addend for the dynamic reloc. */
8333 if (! relocate)
8334 return bfd_reloc_ok;
8335
8336 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8337 contents, rel->r_offset,
8338 dynreloc_value, (bfd_vma) 0);
8339 }
8340 else switch (r_type)
8341 {
8342 case R_ARM_ABS12:
8343 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
8344
8345 case R_ARM_XPC25: /* Arm BLX instruction. */
8346 case R_ARM_CALL:
8347 case R_ARM_JUMP24:
8348 case R_ARM_PC24: /* Arm B/BL instruction. */
8349 case R_ARM_PLT32:
8350 {
8351 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
8352
8353 if (r_type == R_ARM_XPC25)
8354 {
8355 /* Check for Arm calling Arm function. */
8356 /* FIXME: Should we translate the instruction into a BL
8357 instruction instead ? */
8358 if (branch_type != ST_BRANCH_TO_THUMB)
8359 (*_bfd_error_handler)
8360 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
8361 input_bfd,
8362 h ? h->root.root.string : "(local)");
8363 }
8364 else if (r_type == R_ARM_PC24)
8365 {
8366 /* Check for Arm calling Thumb function. */
8367 if (branch_type == ST_BRANCH_TO_THUMB)
8368 {
8369 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
8370 output_bfd, input_section,
8371 hit_data, sym_sec, rel->r_offset,
8372 signed_addend, value,
8373 error_message))
8374 return bfd_reloc_ok;
8375 else
8376 return bfd_reloc_dangerous;
8377 }
8378 }
8379
8380 /* Check if a stub has to be inserted because the
8381 destination is too far or we are changing mode. */
8382 if ( r_type == R_ARM_CALL
8383 || r_type == R_ARM_JUMP24
8384 || r_type == R_ARM_PLT32)
8385 {
8386 enum elf32_arm_stub_type stub_type = arm_stub_none;
8387 struct elf32_arm_link_hash_entry *hash;
8388
8389 hash = (struct elf32_arm_link_hash_entry *) h;
8390 stub_type = arm_type_of_stub (info, input_section, rel,
8391 st_type, &branch_type,
8392 hash, value, sym_sec,
8393 input_bfd, sym_name);
8394
8395 if (stub_type != arm_stub_none)
8396 {
8397 /* The target is out of reach, so redirect the
8398 branch to the local stub for this function. */
8399 stub_entry = elf32_arm_get_stub_entry (input_section,
8400 sym_sec, h,
8401 rel, globals,
8402 stub_type);
8403 {
8404 if (stub_entry != NULL)
8405 value = (stub_entry->stub_offset
8406 + stub_entry->stub_sec->output_offset
8407 + stub_entry->stub_sec->output_section->vma);
8408
8409 if (plt_offset != (bfd_vma) -1)
8410 *unresolved_reloc_p = FALSE;
8411 }
8412 }
8413 else
8414 {
8415 /* If the call goes through a PLT entry, make sure to
8416 check distance to the right destination address. */
8417 if (plt_offset != (bfd_vma) -1)
8418 {
8419 value = (splt->output_section->vma
8420 + splt->output_offset
8421 + plt_offset);
8422 *unresolved_reloc_p = FALSE;
8423 /* The PLT entry is in ARM mode, regardless of the
8424 target function. */
8425 branch_type = ST_BRANCH_TO_ARM;
8426 }
8427 }
8428 }
8429
8430 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
8431 where:
8432 S is the address of the symbol in the relocation.
8433 P is address of the instruction being relocated.
8434 A is the addend (extracted from the instruction) in bytes.
8435
8436 S is held in 'value'.
8437 P is the base address of the section containing the
8438 instruction plus the offset of the reloc into that
8439 section, ie:
8440 (input_section->output_section->vma +
8441 input_section->output_offset +
8442 rel->r_offset).
8443 A is the addend, converted into bytes, ie:
8444 (signed_addend * 4)
8445
8446 Note: None of these operations have knowledge of the pipeline
8447 size of the processor, thus it is up to the assembler to
8448 encode this information into the addend. */
8449 value -= (input_section->output_section->vma
8450 + input_section->output_offset);
8451 value -= rel->r_offset;
8452 if (globals->use_rel)
8453 value += (signed_addend << howto->size);
8454 else
8455 /* RELA addends do not have to be adjusted by howto->size. */
8456 value += signed_addend;
8457
8458 signed_addend = value;
8459 signed_addend >>= howto->rightshift;
8460
8461 /* A branch to an undefined weak symbol is turned into a jump to
8462 the next instruction unless a PLT entry will be created.
8463 Do the same for local undefined symbols (but not for STN_UNDEF).
8464 The jump to the next instruction is optimized as a NOP depending
8465 on the architecture. */
8466 if (h ? (h->root.type == bfd_link_hash_undefweak
8467 && plt_offset == (bfd_vma) -1)
8468 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
8469 {
8470 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
8471
8472 if (arch_has_arm_nop (globals))
8473 value |= 0x0320f000;
8474 else
8475 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
8476 }
8477 else
8478 {
8479 /* Perform a signed range check. */
8480 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
8481 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
8482 return bfd_reloc_overflow;
8483
8484 addend = (value & 2);
8485
8486 value = (signed_addend & howto->dst_mask)
8487 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
8488
8489 if (r_type == R_ARM_CALL)
8490 {
8491 /* Set the H bit in the BLX instruction. */
8492 if (branch_type == ST_BRANCH_TO_THUMB)
8493 {
8494 if (addend)
8495 value |= (1 << 24);
8496 else
8497 value &= ~(bfd_vma)(1 << 24);
8498 }
8499
8500 /* Select the correct instruction (BL or BLX). */
8501 /* Only if we are not handling a BL to a stub. In this
8502 case, mode switching is performed by the stub. */
8503 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
8504 value |= (1 << 28);
8505 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
8506 {
8507 value &= ~(bfd_vma)(1 << 28);
8508 value |= (1 << 24);
8509 }
8510 }
8511 }
8512 }
8513 break;
8514
8515 case R_ARM_ABS32:
8516 value += addend;
8517 if (branch_type == ST_BRANCH_TO_THUMB)
8518 value |= 1;
8519 break;
8520
8521 case R_ARM_ABS32_NOI:
8522 value += addend;
8523 break;
8524
8525 case R_ARM_REL32:
8526 value += addend;
8527 if (branch_type == ST_BRANCH_TO_THUMB)
8528 value |= 1;
8529 value -= (input_section->output_section->vma
8530 + input_section->output_offset + rel->r_offset);
8531 break;
8532
8533 case R_ARM_REL32_NOI:
8534 value += addend;
8535 value -= (input_section->output_section->vma
8536 + input_section->output_offset + rel->r_offset);
8537 break;
8538
8539 case R_ARM_PREL31:
8540 value -= (input_section->output_section->vma
8541 + input_section->output_offset + rel->r_offset);
8542 value += signed_addend;
8543 if (! h || h->root.type != bfd_link_hash_undefweak)
8544 {
8545 /* Check for overflow. */
8546 if ((value ^ (value >> 1)) & (1 << 30))
8547 return bfd_reloc_overflow;
8548 }
8549 value &= 0x7fffffff;
8550 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
8551 if (branch_type == ST_BRANCH_TO_THUMB)
8552 value |= 1;
8553 break;
8554 }
8555
8556 bfd_put_32 (input_bfd, value, hit_data);
8557 return bfd_reloc_ok;
8558
8559 case R_ARM_ABS8:
8560 value += addend;
8561
8562 /* There is no way to tell whether the user intended to use a signed or
8563 unsigned addend. When checking for overflow we accept either,
8564 as specified by the AAELF. */
8565 if ((long) value > 0xff || (long) value < -0x80)
8566 return bfd_reloc_overflow;
8567
8568 bfd_put_8 (input_bfd, value, hit_data);
8569 return bfd_reloc_ok;
8570
8571 case R_ARM_ABS16:
8572 value += addend;
8573
8574 /* See comment for R_ARM_ABS8. */
8575 if ((long) value > 0xffff || (long) value < -0x8000)
8576 return bfd_reloc_overflow;
8577
8578 bfd_put_16 (input_bfd, value, hit_data);
8579 return bfd_reloc_ok;
8580
8581 case R_ARM_THM_ABS5:
8582 /* Support ldr and str instructions for the thumb. */
8583 if (globals->use_rel)
8584 {
8585 /* Need to refetch addend. */
8586 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
8587 /* ??? Need to determine shift amount from operand size. */
8588 addend >>= howto->rightshift;
8589 }
8590 value += addend;
8591
8592 /* ??? Isn't value unsigned? */
8593 if ((long) value > 0x1f || (long) value < -0x10)
8594 return bfd_reloc_overflow;
8595
8596 /* ??? Value needs to be properly shifted into place first. */
8597 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
8598 bfd_put_16 (input_bfd, value, hit_data);
8599 return bfd_reloc_ok;
8600
8601 case R_ARM_THM_ALU_PREL_11_0:
8602 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
8603 {
8604 bfd_vma insn;
8605 bfd_signed_vma relocation;
8606
8607 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
8608 | bfd_get_16 (input_bfd, hit_data + 2);
8609
8610 if (globals->use_rel)
8611 {
8612 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
8613 | ((insn & (1 << 26)) >> 15);
8614 if (insn & 0xf00000)
8615 signed_addend = -signed_addend;
8616 }
8617
8618 relocation = value + signed_addend;
8619 relocation -= (input_section->output_section->vma
8620 + input_section->output_offset
8621 + rel->r_offset);
8622
8623 value = abs (relocation);
8624
8625 if (value >= 0x1000)
8626 return bfd_reloc_overflow;
8627
8628 insn = (insn & 0xfb0f8f00) | (value & 0xff)
8629 | ((value & 0x700) << 4)
8630 | ((value & 0x800) << 15);
8631 if (relocation < 0)
8632 insn |= 0xa00000;
8633
8634 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8635 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8636
8637 return bfd_reloc_ok;
8638 }
8639
8640 case R_ARM_THM_PC8:
8641 /* PR 10073: This reloc is not generated by the GNU toolchain,
8642 but it is supported for compatibility with third party libraries
8643 generated by other compilers, specifically the ARM/IAR. */
8644 {
8645 bfd_vma insn;
8646 bfd_signed_vma relocation;
8647
8648 insn = bfd_get_16 (input_bfd, hit_data);
8649
8650 if (globals->use_rel)
8651 addend = (insn & 0x00ff) << 2;
8652
8653 relocation = value + addend;
8654 relocation -= (input_section->output_section->vma
8655 + input_section->output_offset
8656 + rel->r_offset);
8657
8658 value = abs (relocation);
8659
8660 /* We do not check for overflow of this reloc. Although strictly
8661 speaking this is incorrect, it appears to be necessary in order
8662 to work with IAR generated relocs. Since GCC and GAS do not
8663 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
8664 a problem for them. */
8665 value &= 0x3fc;
8666
8667 insn = (insn & 0xff00) | (value >> 2);
8668
8669 bfd_put_16 (input_bfd, insn, hit_data);
8670
8671 return bfd_reloc_ok;
8672 }
8673
8674 case R_ARM_THM_PC12:
8675 /* Corresponds to: ldr.w reg, [pc, #offset]. */
8676 {
8677 bfd_vma insn;
8678 bfd_signed_vma relocation;
8679
8680 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
8681 | bfd_get_16 (input_bfd, hit_data + 2);
8682
8683 if (globals->use_rel)
8684 {
8685 signed_addend = insn & 0xfff;
8686 if (!(insn & (1 << 23)))
8687 signed_addend = -signed_addend;
8688 }
8689
8690 relocation = value + signed_addend;
8691 relocation -= (input_section->output_section->vma
8692 + input_section->output_offset
8693 + rel->r_offset);
8694
8695 value = abs (relocation);
8696
8697 if (value >= 0x1000)
8698 return bfd_reloc_overflow;
8699
8700 insn = (insn & 0xff7ff000) | value;
8701 if (relocation >= 0)
8702 insn |= (1 << 23);
8703
8704 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8705 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8706
8707 return bfd_reloc_ok;
8708 }
8709
8710 case R_ARM_THM_XPC22:
8711 case R_ARM_THM_CALL:
8712 case R_ARM_THM_JUMP24:
8713 /* Thumb BL (branch long instruction). */
8714 {
8715 bfd_vma relocation;
8716 bfd_vma reloc_sign;
8717 bfd_boolean overflow = FALSE;
8718 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
8719 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
8720 bfd_signed_vma reloc_signed_max;
8721 bfd_signed_vma reloc_signed_min;
8722 bfd_vma check;
8723 bfd_signed_vma signed_check;
8724 int bitsize;
8725 const int thumb2 = using_thumb2 (globals);
8726
8727 /* A branch to an undefined weak symbol is turned into a jump to
8728 the next instruction unless a PLT entry will be created.
8729 The jump to the next instruction is optimized as a NOP.W for
8730 Thumb-2 enabled architectures. */
8731 if (h && h->root.type == bfd_link_hash_undefweak
8732 && plt_offset == (bfd_vma) -1)
8733 {
8734 if (arch_has_thumb2_nop (globals))
8735 {
8736 bfd_put_16 (input_bfd, 0xf3af, hit_data);
8737 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
8738 }
8739 else
8740 {
8741 bfd_put_16 (input_bfd, 0xe000, hit_data);
8742 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
8743 }
8744 return bfd_reloc_ok;
8745 }
8746
8747 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
8748 with Thumb-1) involving the J1 and J2 bits. */
8749 if (globals->use_rel)
8750 {
8751 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
8752 bfd_vma upper = upper_insn & 0x3ff;
8753 bfd_vma lower = lower_insn & 0x7ff;
8754 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
8755 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
8756 bfd_vma i1 = j1 ^ s ? 0 : 1;
8757 bfd_vma i2 = j2 ^ s ? 0 : 1;
8758
8759 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
8760 /* Sign extend. */
8761 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
8762
8763 signed_addend = addend;
8764 }
8765
8766 if (r_type == R_ARM_THM_XPC22)
8767 {
8768 /* Check for Thumb to Thumb call. */
8769 /* FIXME: Should we translate the instruction into a BL
8770 instruction instead ? */
8771 if (branch_type == ST_BRANCH_TO_THUMB)
8772 (*_bfd_error_handler)
8773 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
8774 input_bfd,
8775 h ? h->root.root.string : "(local)");
8776 }
8777 else
8778 {
8779 /* If it is not a call to Thumb, assume call to Arm.
8780 If it is a call relative to a section name, then it is not a
8781 function call at all, but rather a long jump. Calls through
8782 the PLT do not require stubs. */
8783 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
8784 {
8785 if (globals->use_blx && r_type == R_ARM_THM_CALL)
8786 {
8787 /* Convert BL to BLX. */
8788 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8789 }
8790 else if (( r_type != R_ARM_THM_CALL)
8791 && (r_type != R_ARM_THM_JUMP24))
8792 {
8793 if (elf32_thumb_to_arm_stub
8794 (info, sym_name, input_bfd, output_bfd, input_section,
8795 hit_data, sym_sec, rel->r_offset, signed_addend, value,
8796 error_message))
8797 return bfd_reloc_ok;
8798 else
8799 return bfd_reloc_dangerous;
8800 }
8801 }
8802 else if (branch_type == ST_BRANCH_TO_THUMB
8803 && globals->use_blx
8804 && r_type == R_ARM_THM_CALL)
8805 {
8806 /* Make sure this is a BL. */
8807 lower_insn |= 0x1800;
8808 }
8809 }
8810
8811 enum elf32_arm_stub_type stub_type = arm_stub_none;
8812 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
8813 {
8814 /* Check if a stub has to be inserted because the destination
8815 is too far. */
8816 struct elf32_arm_stub_hash_entry *stub_entry;
8817 struct elf32_arm_link_hash_entry *hash;
8818
8819 hash = (struct elf32_arm_link_hash_entry *) h;
8820
8821 stub_type = arm_type_of_stub (info, input_section, rel,
8822 st_type, &branch_type,
8823 hash, value, sym_sec,
8824 input_bfd, sym_name);
8825
8826 if (stub_type != arm_stub_none)
8827 {
8828 /* The target is out of reach or we are changing modes, so
8829 redirect the branch to the local stub for this
8830 function. */
8831 stub_entry = elf32_arm_get_stub_entry (input_section,
8832 sym_sec, h,
8833 rel, globals,
8834 stub_type);
8835 if (stub_entry != NULL)
8836 {
8837 value = (stub_entry->stub_offset
8838 + stub_entry->stub_sec->output_offset
8839 + stub_entry->stub_sec->output_section->vma);
8840
8841 if (plt_offset != (bfd_vma) -1)
8842 *unresolved_reloc_p = FALSE;
8843 }
8844
8845 /* If this call becomes a call to Arm, force BLX. */
8846 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
8847 {
8848 if ((stub_entry
8849 && !arm_stub_is_thumb (stub_entry->stub_type))
8850 || branch_type != ST_BRANCH_TO_THUMB)
8851 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8852 }
8853 }
8854 }
8855
8856 /* Handle calls via the PLT. */
8857 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
8858 {
8859 value = (splt->output_section->vma
8860 + splt->output_offset
8861 + plt_offset);
8862
8863 if (globals->use_blx && r_type == R_ARM_THM_CALL)
8864 {
8865 /* If the Thumb BLX instruction is available, convert
8866 the BL to a BLX instruction to call the ARM-mode
8867 PLT entry. */
8868 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8869 branch_type = ST_BRANCH_TO_ARM;
8870 }
8871 else
8872 {
8873 /* Target the Thumb stub before the ARM PLT entry. */
8874 value -= PLT_THUMB_STUB_SIZE;
8875 branch_type = ST_BRANCH_TO_THUMB;
8876 }
8877 *unresolved_reloc_p = FALSE;
8878 }
8879
8880 relocation = value + signed_addend;
8881
8882 relocation -= (input_section->output_section->vma
8883 + input_section->output_offset
8884 + rel->r_offset);
8885
8886 check = relocation >> howto->rightshift;
8887
8888 /* If this is a signed value, the rightshift just dropped
8889 leading 1 bits (assuming twos complement). */
8890 if ((bfd_signed_vma) relocation >= 0)
8891 signed_check = check;
8892 else
8893 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
8894
8895 /* Calculate the permissable maximum and minimum values for
8896 this relocation according to whether we're relocating for
8897 Thumb-2 or not. */
8898 bitsize = howto->bitsize;
8899 if (!thumb2)
8900 bitsize -= 2;
8901 reloc_signed_max = (1 << (bitsize - 1)) - 1;
8902 reloc_signed_min = ~reloc_signed_max;
8903
8904 /* Assumes two's complement. */
8905 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
8906 overflow = TRUE;
8907
8908 if ((lower_insn & 0x5000) == 0x4000)
8909 /* For a BLX instruction, make sure that the relocation is rounded up
8910 to a word boundary. This follows the semantics of the instruction
8911 which specifies that bit 1 of the target address will come from bit
8912 1 of the base address. */
8913 relocation = (relocation + 2) & ~ 3;
8914
8915 /* Put RELOCATION back into the insn. Assumes two's complement.
8916 We use the Thumb-2 encoding, which is safe even if dealing with
8917 a Thumb-1 instruction by virtue of our overflow check above. */
8918 reloc_sign = (signed_check < 0) ? 1 : 0;
8919 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
8920 | ((relocation >> 12) & 0x3ff)
8921 | (reloc_sign << 10);
8922 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
8923 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
8924 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
8925 | ((relocation >> 1) & 0x7ff);
8926
8927 /* Put the relocated value back in the object file: */
8928 bfd_put_16 (input_bfd, upper_insn, hit_data);
8929 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
8930
8931 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
8932 }
8933 break;
8934
8935 case R_ARM_THM_JUMP19:
8936 /* Thumb32 conditional branch instruction. */
8937 {
8938 bfd_vma relocation;
8939 bfd_boolean overflow = FALSE;
8940 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
8941 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
8942 bfd_signed_vma reloc_signed_max = 0xffffe;
8943 bfd_signed_vma reloc_signed_min = -0x100000;
8944 bfd_signed_vma signed_check;
8945
8946 /* Need to refetch the addend, reconstruct the top three bits,
8947 and squish the two 11 bit pieces together. */
8948 if (globals->use_rel)
8949 {
8950 bfd_vma S = (upper_insn & 0x0400) >> 10;
8951 bfd_vma upper = (upper_insn & 0x003f);
8952 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
8953 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
8954 bfd_vma lower = (lower_insn & 0x07ff);
8955
8956 upper |= J1 << 6;
8957 upper |= J2 << 7;
8958 upper |= (!S) << 8;
8959 upper -= 0x0100; /* Sign extend. */
8960
8961 addend = (upper << 12) | (lower << 1);
8962 signed_addend = addend;
8963 }
8964
8965 /* Handle calls via the PLT. */
8966 if (plt_offset != (bfd_vma) -1)
8967 {
8968 value = (splt->output_section->vma
8969 + splt->output_offset
8970 + plt_offset);
8971 /* Target the Thumb stub before the ARM PLT entry. */
8972 value -= PLT_THUMB_STUB_SIZE;
8973 *unresolved_reloc_p = FALSE;
8974 }
8975
8976 /* ??? Should handle interworking? GCC might someday try to
8977 use this for tail calls. */
8978
8979 relocation = value + signed_addend;
8980 relocation -= (input_section->output_section->vma
8981 + input_section->output_offset
8982 + rel->r_offset);
8983 signed_check = (bfd_signed_vma) relocation;
8984
8985 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
8986 overflow = TRUE;
8987
8988 /* Put RELOCATION back into the insn. */
8989 {
8990 bfd_vma S = (relocation & 0x00100000) >> 20;
8991 bfd_vma J2 = (relocation & 0x00080000) >> 19;
8992 bfd_vma J1 = (relocation & 0x00040000) >> 18;
8993 bfd_vma hi = (relocation & 0x0003f000) >> 12;
8994 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
8995
8996 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
8997 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
8998 }
8999
9000 /* Put the relocated value back in the object file: */
9001 bfd_put_16 (input_bfd, upper_insn, hit_data);
9002 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9003
9004 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
9005 }
9006
9007 case R_ARM_THM_JUMP11:
9008 case R_ARM_THM_JUMP8:
9009 case R_ARM_THM_JUMP6:
9010 /* Thumb B (branch) instruction). */
9011 {
9012 bfd_signed_vma relocation;
9013 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
9014 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
9015 bfd_signed_vma signed_check;
9016
9017 /* CZB cannot jump backward. */
9018 if (r_type == R_ARM_THM_JUMP6)
9019 reloc_signed_min = 0;
9020
9021 if (globals->use_rel)
9022 {
9023 /* Need to refetch addend. */
9024 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
9025 if (addend & ((howto->src_mask + 1) >> 1))
9026 {
9027 signed_addend = -1;
9028 signed_addend &= ~ howto->src_mask;
9029 signed_addend |= addend;
9030 }
9031 else
9032 signed_addend = addend;
9033 /* The value in the insn has been right shifted. We need to
9034 undo this, so that we can perform the address calculation
9035 in terms of bytes. */
9036 signed_addend <<= howto->rightshift;
9037 }
9038 relocation = value + signed_addend;
9039
9040 relocation -= (input_section->output_section->vma
9041 + input_section->output_offset
9042 + rel->r_offset);
9043
9044 relocation >>= howto->rightshift;
9045 signed_check = relocation;
9046
9047 if (r_type == R_ARM_THM_JUMP6)
9048 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
9049 else
9050 relocation &= howto->dst_mask;
9051 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
9052
9053 bfd_put_16 (input_bfd, relocation, hit_data);
9054
9055 /* Assumes two's complement. */
9056 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
9057 return bfd_reloc_overflow;
9058
9059 return bfd_reloc_ok;
9060 }
9061
9062 case R_ARM_ALU_PCREL7_0:
9063 case R_ARM_ALU_PCREL15_8:
9064 case R_ARM_ALU_PCREL23_15:
9065 {
9066 bfd_vma insn;
9067 bfd_vma relocation;
9068
9069 insn = bfd_get_32 (input_bfd, hit_data);
9070 if (globals->use_rel)
9071 {
9072 /* Extract the addend. */
9073 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
9074 signed_addend = addend;
9075 }
9076 relocation = value + signed_addend;
9077
9078 relocation -= (input_section->output_section->vma
9079 + input_section->output_offset
9080 + rel->r_offset);
9081 insn = (insn & ~0xfff)
9082 | ((howto->bitpos << 7) & 0xf00)
9083 | ((relocation >> howto->bitpos) & 0xff);
9084 bfd_put_32 (input_bfd, value, hit_data);
9085 }
9086 return bfd_reloc_ok;
9087
9088 case R_ARM_GNU_VTINHERIT:
9089 case R_ARM_GNU_VTENTRY:
9090 return bfd_reloc_ok;
9091
9092 case R_ARM_GOTOFF32:
9093 /* Relocation is relative to the start of the
9094 global offset table. */
9095
9096 BFD_ASSERT (sgot != NULL);
9097 if (sgot == NULL)
9098 return bfd_reloc_notsupported;
9099
9100 /* If we are addressing a Thumb function, we need to adjust the
9101 address by one, so that attempts to call the function pointer will
9102 correctly interpret it as Thumb code. */
9103 if (branch_type == ST_BRANCH_TO_THUMB)
9104 value += 1;
9105
9106 /* Note that sgot->output_offset is not involved in this
9107 calculation. We always want the start of .got. If we
9108 define _GLOBAL_OFFSET_TABLE in a different way, as is
9109 permitted by the ABI, we might have to change this
9110 calculation. */
9111 value -= sgot->output_section->vma;
9112 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9113 contents, rel->r_offset, value,
9114 rel->r_addend);
9115
9116 case R_ARM_GOTPC:
9117 /* Use global offset table as symbol value. */
9118 BFD_ASSERT (sgot != NULL);
9119
9120 if (sgot == NULL)
9121 return bfd_reloc_notsupported;
9122
9123 *unresolved_reloc_p = FALSE;
9124 value = sgot->output_section->vma;
9125 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9126 contents, rel->r_offset, value,
9127 rel->r_addend);
9128
9129 case R_ARM_GOT32:
9130 case R_ARM_GOT_PREL:
9131 /* Relocation is to the entry for this symbol in the
9132 global offset table. */
9133 if (sgot == NULL)
9134 return bfd_reloc_notsupported;
9135
9136 if (dynreloc_st_type == STT_GNU_IFUNC
9137 && plt_offset != (bfd_vma) -1
9138 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
9139 {
9140 /* We have a relocation against a locally-binding STT_GNU_IFUNC
9141 symbol, and the relocation resolves directly to the runtime
9142 target rather than to the .iplt entry. This means that any
9143 .got entry would be the same value as the .igot.plt entry,
9144 so there's no point creating both. */
9145 sgot = globals->root.igotplt;
9146 value = sgot->output_offset + gotplt_offset;
9147 }
9148 else if (h != NULL)
9149 {
9150 bfd_vma off;
9151
9152 off = h->got.offset;
9153 BFD_ASSERT (off != (bfd_vma) -1);
9154 if ((off & 1) != 0)
9155 {
9156 /* We have already processsed one GOT relocation against
9157 this symbol. */
9158 off &= ~1;
9159 if (globals->root.dynamic_sections_created
9160 && !SYMBOL_REFERENCES_LOCAL (info, h))
9161 *unresolved_reloc_p = FALSE;
9162 }
9163 else
9164 {
9165 Elf_Internal_Rela outrel;
9166
9167 if (!SYMBOL_REFERENCES_LOCAL (info, h))
9168 {
9169 /* If the symbol doesn't resolve locally in a static
9170 object, we have an undefined reference. If the
9171 symbol doesn't resolve locally in a dynamic object,
9172 it should be resolved by the dynamic linker. */
9173 if (globals->root.dynamic_sections_created)
9174 {
9175 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
9176 *unresolved_reloc_p = FALSE;
9177 }
9178 else
9179 outrel.r_info = 0;
9180 outrel.r_addend = 0;
9181 }
9182 else
9183 {
9184 if (dynreloc_st_type == STT_GNU_IFUNC)
9185 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9186 else if (info->shared)
9187 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
9188 else
9189 outrel.r_info = 0;
9190 outrel.r_addend = dynreloc_value;
9191 }
9192
9193 /* The GOT entry is initialized to zero by default.
9194 See if we should install a different value. */
9195 if (outrel.r_addend != 0
9196 && (outrel.r_info == 0 || globals->use_rel))
9197 {
9198 bfd_put_32 (output_bfd, outrel.r_addend,
9199 sgot->contents + off);
9200 outrel.r_addend = 0;
9201 }
9202
9203 if (outrel.r_info != 0)
9204 {
9205 outrel.r_offset = (sgot->output_section->vma
9206 + sgot->output_offset
9207 + off);
9208 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9209 }
9210 h->got.offset |= 1;
9211 }
9212 value = sgot->output_offset + off;
9213 }
9214 else
9215 {
9216 bfd_vma off;
9217
9218 BFD_ASSERT (local_got_offsets != NULL &&
9219 local_got_offsets[r_symndx] != (bfd_vma) -1);
9220
9221 off = local_got_offsets[r_symndx];
9222
9223 /* The offset must always be a multiple of 4. We use the
9224 least significant bit to record whether we have already
9225 generated the necessary reloc. */
9226 if ((off & 1) != 0)
9227 off &= ~1;
9228 else
9229 {
9230 if (globals->use_rel)
9231 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
9232
9233 if (info->shared || dynreloc_st_type == STT_GNU_IFUNC)
9234 {
9235 Elf_Internal_Rela outrel;
9236
9237 outrel.r_addend = addend + dynreloc_value;
9238 outrel.r_offset = (sgot->output_section->vma
9239 + sgot->output_offset
9240 + off);
9241 if (dynreloc_st_type == STT_GNU_IFUNC)
9242 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9243 else
9244 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
9245 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9246 }
9247
9248 local_got_offsets[r_symndx] |= 1;
9249 }
9250
9251 value = sgot->output_offset + off;
9252 }
9253 if (r_type != R_ARM_GOT32)
9254 value += sgot->output_section->vma;
9255
9256 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9257 contents, rel->r_offset, value,
9258 rel->r_addend);
9259
9260 case R_ARM_TLS_LDO32:
9261 value = value - dtpoff_base (info);
9262
9263 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9264 contents, rel->r_offset, value,
9265 rel->r_addend);
9266
9267 case R_ARM_TLS_LDM32:
9268 {
9269 bfd_vma off;
9270
9271 if (sgot == NULL)
9272 abort ();
9273
9274 off = globals->tls_ldm_got.offset;
9275
9276 if ((off & 1) != 0)
9277 off &= ~1;
9278 else
9279 {
9280 /* If we don't know the module number, create a relocation
9281 for it. */
9282 if (info->shared)
9283 {
9284 Elf_Internal_Rela outrel;
9285
9286 if (srelgot == NULL)
9287 abort ();
9288
9289 outrel.r_addend = 0;
9290 outrel.r_offset = (sgot->output_section->vma
9291 + sgot->output_offset + off);
9292 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
9293
9294 if (globals->use_rel)
9295 bfd_put_32 (output_bfd, outrel.r_addend,
9296 sgot->contents + off);
9297
9298 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9299 }
9300 else
9301 bfd_put_32 (output_bfd, 1, sgot->contents + off);
9302
9303 globals->tls_ldm_got.offset |= 1;
9304 }
9305
9306 value = sgot->output_section->vma + sgot->output_offset + off
9307 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
9308
9309 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9310 contents, rel->r_offset, value,
9311 rel->r_addend);
9312 }
9313
9314 case R_ARM_TLS_CALL:
9315 case R_ARM_THM_TLS_CALL:
9316 case R_ARM_TLS_GD32:
9317 case R_ARM_TLS_IE32:
9318 case R_ARM_TLS_GOTDESC:
9319 case R_ARM_TLS_DESCSEQ:
9320 case R_ARM_THM_TLS_DESCSEQ:
9321 {
9322 bfd_vma off, offplt;
9323 int indx = 0;
9324 char tls_type;
9325
9326 BFD_ASSERT (sgot != NULL);
9327
9328 if (h != NULL)
9329 {
9330 bfd_boolean dyn;
9331 dyn = globals->root.dynamic_sections_created;
9332 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
9333 && (!info->shared
9334 || !SYMBOL_REFERENCES_LOCAL (info, h)))
9335 {
9336 *unresolved_reloc_p = FALSE;
9337 indx = h->dynindx;
9338 }
9339 off = h->got.offset;
9340 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
9341 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
9342 }
9343 else
9344 {
9345 BFD_ASSERT (local_got_offsets != NULL);
9346 off = local_got_offsets[r_symndx];
9347 offplt = local_tlsdesc_gotents[r_symndx];
9348 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
9349 }
9350
9351 /* Linker relaxations happens from one of the
9352 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
9353 if (ELF32_R_TYPE(rel->r_info) != r_type)
9354 tls_type = GOT_TLS_IE;
9355
9356 BFD_ASSERT (tls_type != GOT_UNKNOWN);
9357
9358 if ((off & 1) != 0)
9359 off &= ~1;
9360 else
9361 {
9362 bfd_boolean need_relocs = FALSE;
9363 Elf_Internal_Rela outrel;
9364 int cur_off = off;
9365
9366 /* The GOT entries have not been initialized yet. Do it
9367 now, and emit any relocations. If both an IE GOT and a
9368 GD GOT are necessary, we emit the GD first. */
9369
9370 if ((info->shared || indx != 0)
9371 && (h == NULL
9372 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
9373 || h->root.type != bfd_link_hash_undefweak))
9374 {
9375 need_relocs = TRUE;
9376 BFD_ASSERT (srelgot != NULL);
9377 }
9378
9379 if (tls_type & GOT_TLS_GDESC)
9380 {
9381 bfd_byte *loc;
9382
9383 /* We should have relaxed, unless this is an undefined
9384 weak symbol. */
9385 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
9386 || info->shared);
9387 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
9388 <= globals->root.sgotplt->size);
9389
9390 outrel.r_addend = 0;
9391 outrel.r_offset = (globals->root.sgotplt->output_section->vma
9392 + globals->root.sgotplt->output_offset
9393 + offplt
9394 + globals->sgotplt_jump_table_size);
9395
9396 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
9397 sreloc = globals->root.srelplt;
9398 loc = sreloc->contents;
9399 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
9400 BFD_ASSERT (loc + RELOC_SIZE (globals)
9401 <= sreloc->contents + sreloc->size);
9402
9403 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
9404
9405 /* For globals, the first word in the relocation gets
9406 the relocation index and the top bit set, or zero,
9407 if we're binding now. For locals, it gets the
9408 symbol's offset in the tls section. */
9409 bfd_put_32 (output_bfd,
9410 !h ? value - elf_hash_table (info)->tls_sec->vma
9411 : info->flags & DF_BIND_NOW ? 0
9412 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
9413 globals->root.sgotplt->contents + offplt
9414 + globals->sgotplt_jump_table_size);
9415
9416 /* Second word in the relocation is always zero. */
9417 bfd_put_32 (output_bfd, 0,
9418 globals->root.sgotplt->contents + offplt
9419 + globals->sgotplt_jump_table_size + 4);
9420 }
9421 if (tls_type & GOT_TLS_GD)
9422 {
9423 if (need_relocs)
9424 {
9425 outrel.r_addend = 0;
9426 outrel.r_offset = (sgot->output_section->vma
9427 + sgot->output_offset
9428 + cur_off);
9429 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
9430
9431 if (globals->use_rel)
9432 bfd_put_32 (output_bfd, outrel.r_addend,
9433 sgot->contents + cur_off);
9434
9435 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9436
9437 if (indx == 0)
9438 bfd_put_32 (output_bfd, value - dtpoff_base (info),
9439 sgot->contents + cur_off + 4);
9440 else
9441 {
9442 outrel.r_addend = 0;
9443 outrel.r_info = ELF32_R_INFO (indx,
9444 R_ARM_TLS_DTPOFF32);
9445 outrel.r_offset += 4;
9446
9447 if (globals->use_rel)
9448 bfd_put_32 (output_bfd, outrel.r_addend,
9449 sgot->contents + cur_off + 4);
9450
9451 elf32_arm_add_dynreloc (output_bfd, info,
9452 srelgot, &outrel);
9453 }
9454 }
9455 else
9456 {
9457 /* If we are not emitting relocations for a
9458 general dynamic reference, then we must be in a
9459 static link or an executable link with the
9460 symbol binding locally. Mark it as belonging
9461 to module 1, the executable. */
9462 bfd_put_32 (output_bfd, 1,
9463 sgot->contents + cur_off);
9464 bfd_put_32 (output_bfd, value - dtpoff_base (info),
9465 sgot->contents + cur_off + 4);
9466 }
9467
9468 cur_off += 8;
9469 }
9470
9471 if (tls_type & GOT_TLS_IE)
9472 {
9473 if (need_relocs)
9474 {
9475 if (indx == 0)
9476 outrel.r_addend = value - dtpoff_base (info);
9477 else
9478 outrel.r_addend = 0;
9479 outrel.r_offset = (sgot->output_section->vma
9480 + sgot->output_offset
9481 + cur_off);
9482 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
9483
9484 if (globals->use_rel)
9485 bfd_put_32 (output_bfd, outrel.r_addend,
9486 sgot->contents + cur_off);
9487
9488 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9489 }
9490 else
9491 bfd_put_32 (output_bfd, tpoff (info, value),
9492 sgot->contents + cur_off);
9493 cur_off += 4;
9494 }
9495
9496 if (h != NULL)
9497 h->got.offset |= 1;
9498 else
9499 local_got_offsets[r_symndx] |= 1;
9500 }
9501
9502 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
9503 off += 8;
9504 else if (tls_type & GOT_TLS_GDESC)
9505 off = offplt;
9506
9507 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
9508 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
9509 {
9510 bfd_signed_vma offset;
9511 /* TLS stubs are arm mode. The original symbol is a
9512 data object, so branch_type is bogus. */
9513 branch_type = ST_BRANCH_TO_ARM;
9514 enum elf32_arm_stub_type stub_type
9515 = arm_type_of_stub (info, input_section, rel,
9516 st_type, &branch_type,
9517 (struct elf32_arm_link_hash_entry *)h,
9518 globals->tls_trampoline, globals->root.splt,
9519 input_bfd, sym_name);
9520
9521 if (stub_type != arm_stub_none)
9522 {
9523 struct elf32_arm_stub_hash_entry *stub_entry
9524 = elf32_arm_get_stub_entry
9525 (input_section, globals->root.splt, 0, rel,
9526 globals, stub_type);
9527 offset = (stub_entry->stub_offset
9528 + stub_entry->stub_sec->output_offset
9529 + stub_entry->stub_sec->output_section->vma);
9530 }
9531 else
9532 offset = (globals->root.splt->output_section->vma
9533 + globals->root.splt->output_offset
9534 + globals->tls_trampoline);
9535
9536 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
9537 {
9538 unsigned long inst;
9539
9540 offset -= (input_section->output_section->vma
9541 + input_section->output_offset
9542 + rel->r_offset + 8);
9543
9544 inst = offset >> 2;
9545 inst &= 0x00ffffff;
9546 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
9547 }
9548 else
9549 {
9550 /* Thumb blx encodes the offset in a complicated
9551 fashion. */
9552 unsigned upper_insn, lower_insn;
9553 unsigned neg;
9554
9555 offset -= (input_section->output_section->vma
9556 + input_section->output_offset
9557 + rel->r_offset + 4);
9558
9559 if (stub_type != arm_stub_none
9560 && arm_stub_is_thumb (stub_type))
9561 {
9562 lower_insn = 0xd000;
9563 }
9564 else
9565 {
9566 lower_insn = 0xc000;
9567 /* Round up the offset to a word boundary */
9568 offset = (offset + 2) & ~2;
9569 }
9570
9571 neg = offset < 0;
9572 upper_insn = (0xf000
9573 | ((offset >> 12) & 0x3ff)
9574 | (neg << 10));
9575 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
9576 | (((!((offset >> 22) & 1)) ^ neg) << 11)
9577 | ((offset >> 1) & 0x7ff);
9578 bfd_put_16 (input_bfd, upper_insn, hit_data);
9579 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9580 return bfd_reloc_ok;
9581 }
9582 }
9583 /* These relocations needs special care, as besides the fact
9584 they point somewhere in .gotplt, the addend must be
9585 adjusted accordingly depending on the type of instruction
9586 we refer to */
9587 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
9588 {
9589 unsigned long data, insn;
9590 unsigned thumb;
9591
9592 data = bfd_get_32 (input_bfd, hit_data);
9593 thumb = data & 1;
9594 data &= ~1u;
9595
9596 if (thumb)
9597 {
9598 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
9599 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
9600 insn = (insn << 16)
9601 | bfd_get_16 (input_bfd,
9602 contents + rel->r_offset - data + 2);
9603 if ((insn & 0xf800c000) == 0xf000c000)
9604 /* bl/blx */
9605 value = -6;
9606 else if ((insn & 0xffffff00) == 0x4400)
9607 /* add */
9608 value = -5;
9609 else
9610 {
9611 (*_bfd_error_handler)
9612 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"),
9613 input_bfd, input_section,
9614 (unsigned long)rel->r_offset, insn);
9615 return bfd_reloc_notsupported;
9616 }
9617 }
9618 else
9619 {
9620 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
9621
9622 switch (insn >> 24)
9623 {
9624 case 0xeb: /* bl */
9625 case 0xfa: /* blx */
9626 value = -4;
9627 break;
9628
9629 case 0xe0: /* add */
9630 value = -8;
9631 break;
9632
9633 default:
9634 (*_bfd_error_handler)
9635 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
9636 input_bfd, input_section,
9637 (unsigned long)rel->r_offset, insn);
9638 return bfd_reloc_notsupported;
9639 }
9640 }
9641
9642 value += ((globals->root.sgotplt->output_section->vma
9643 + globals->root.sgotplt->output_offset + off)
9644 - (input_section->output_section->vma
9645 + input_section->output_offset
9646 + rel->r_offset)
9647 + globals->sgotplt_jump_table_size);
9648 }
9649 else
9650 value = ((globals->root.sgot->output_section->vma
9651 + globals->root.sgot->output_offset + off)
9652 - (input_section->output_section->vma
9653 + input_section->output_offset + rel->r_offset));
9654
9655 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9656 contents, rel->r_offset, value,
9657 rel->r_addend);
9658 }
9659
9660 case R_ARM_TLS_LE32:
9661 if (info->shared && !info->pie)
9662 {
9663 (*_bfd_error_handler)
9664 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
9665 input_bfd, input_section,
9666 (long) rel->r_offset, howto->name);
9667 return bfd_reloc_notsupported;
9668 }
9669 else
9670 value = tpoff (info, value);
9671
9672 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9673 contents, rel->r_offset, value,
9674 rel->r_addend);
9675
9676 case R_ARM_V4BX:
9677 if (globals->fix_v4bx)
9678 {
9679 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9680
9681 /* Ensure that we have a BX instruction. */
9682 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
9683
9684 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
9685 {
9686 /* Branch to veneer. */
9687 bfd_vma glue_addr;
9688 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
9689 glue_addr -= input_section->output_section->vma
9690 + input_section->output_offset
9691 + rel->r_offset + 8;
9692 insn = (insn & 0xf0000000) | 0x0a000000
9693 | ((glue_addr >> 2) & 0x00ffffff);
9694 }
9695 else
9696 {
9697 /* Preserve Rm (lowest four bits) and the condition code
9698 (highest four bits). Other bits encode MOV PC,Rm. */
9699 insn = (insn & 0xf000000f) | 0x01a0f000;
9700 }
9701
9702 bfd_put_32 (input_bfd, insn, hit_data);
9703 }
9704 return bfd_reloc_ok;
9705
9706 case R_ARM_MOVW_ABS_NC:
9707 case R_ARM_MOVT_ABS:
9708 case R_ARM_MOVW_PREL_NC:
9709 case R_ARM_MOVT_PREL:
9710 /* Until we properly support segment-base-relative addressing then
9711 we assume the segment base to be zero, as for the group relocations.
9712 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
9713 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
9714 case R_ARM_MOVW_BREL_NC:
9715 case R_ARM_MOVW_BREL:
9716 case R_ARM_MOVT_BREL:
9717 {
9718 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9719
9720 if (globals->use_rel)
9721 {
9722 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
9723 signed_addend = (addend ^ 0x8000) - 0x8000;
9724 }
9725
9726 value += signed_addend;
9727
9728 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
9729 value -= (input_section->output_section->vma
9730 + input_section->output_offset + rel->r_offset);
9731
9732 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
9733 return bfd_reloc_overflow;
9734
9735 if (branch_type == ST_BRANCH_TO_THUMB)
9736 value |= 1;
9737
9738 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
9739 || r_type == R_ARM_MOVT_BREL)
9740 value >>= 16;
9741
9742 insn &= 0xfff0f000;
9743 insn |= value & 0xfff;
9744 insn |= (value & 0xf000) << 4;
9745 bfd_put_32 (input_bfd, insn, hit_data);
9746 }
9747 return bfd_reloc_ok;
9748
9749 case R_ARM_THM_MOVW_ABS_NC:
9750 case R_ARM_THM_MOVT_ABS:
9751 case R_ARM_THM_MOVW_PREL_NC:
9752 case R_ARM_THM_MOVT_PREL:
9753 /* Until we properly support segment-base-relative addressing then
9754 we assume the segment base to be zero, as for the above relocations.
9755 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
9756 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
9757 as R_ARM_THM_MOVT_ABS. */
9758 case R_ARM_THM_MOVW_BREL_NC:
9759 case R_ARM_THM_MOVW_BREL:
9760 case R_ARM_THM_MOVT_BREL:
9761 {
9762 bfd_vma insn;
9763
9764 insn = bfd_get_16 (input_bfd, hit_data) << 16;
9765 insn |= bfd_get_16 (input_bfd, hit_data + 2);
9766
9767 if (globals->use_rel)
9768 {
9769 addend = ((insn >> 4) & 0xf000)
9770 | ((insn >> 15) & 0x0800)
9771 | ((insn >> 4) & 0x0700)
9772 | (insn & 0x00ff);
9773 signed_addend = (addend ^ 0x8000) - 0x8000;
9774 }
9775
9776 value += signed_addend;
9777
9778 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
9779 value -= (input_section->output_section->vma
9780 + input_section->output_offset + rel->r_offset);
9781
9782 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
9783 return bfd_reloc_overflow;
9784
9785 if (branch_type == ST_BRANCH_TO_THUMB)
9786 value |= 1;
9787
9788 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
9789 || r_type == R_ARM_THM_MOVT_BREL)
9790 value >>= 16;
9791
9792 insn &= 0xfbf08f00;
9793 insn |= (value & 0xf000) << 4;
9794 insn |= (value & 0x0800) << 15;
9795 insn |= (value & 0x0700) << 4;
9796 insn |= (value & 0x00ff);
9797
9798 bfd_put_16 (input_bfd, insn >> 16, hit_data);
9799 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
9800 }
9801 return bfd_reloc_ok;
9802
9803 case R_ARM_ALU_PC_G0_NC:
9804 case R_ARM_ALU_PC_G1_NC:
9805 case R_ARM_ALU_PC_G0:
9806 case R_ARM_ALU_PC_G1:
9807 case R_ARM_ALU_PC_G2:
9808 case R_ARM_ALU_SB_G0_NC:
9809 case R_ARM_ALU_SB_G1_NC:
9810 case R_ARM_ALU_SB_G0:
9811 case R_ARM_ALU_SB_G1:
9812 case R_ARM_ALU_SB_G2:
9813 {
9814 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9815 bfd_vma pc = input_section->output_section->vma
9816 + input_section->output_offset + rel->r_offset;
9817 /* sb should be the origin of the *segment* containing the symbol.
9818 It is not clear how to obtain this OS-dependent value, so we
9819 make an arbitrary choice of zero. */
9820 bfd_vma sb = 0;
9821 bfd_vma residual;
9822 bfd_vma g_n;
9823 bfd_signed_vma signed_value;
9824 int group = 0;
9825
9826 /* Determine which group of bits to select. */
9827 switch (r_type)
9828 {
9829 case R_ARM_ALU_PC_G0_NC:
9830 case R_ARM_ALU_PC_G0:
9831 case R_ARM_ALU_SB_G0_NC:
9832 case R_ARM_ALU_SB_G0:
9833 group = 0;
9834 break;
9835
9836 case R_ARM_ALU_PC_G1_NC:
9837 case R_ARM_ALU_PC_G1:
9838 case R_ARM_ALU_SB_G1_NC:
9839 case R_ARM_ALU_SB_G1:
9840 group = 1;
9841 break;
9842
9843 case R_ARM_ALU_PC_G2:
9844 case R_ARM_ALU_SB_G2:
9845 group = 2;
9846 break;
9847
9848 default:
9849 abort ();
9850 }
9851
9852 /* If REL, extract the addend from the insn. If RELA, it will
9853 have already been fetched for us. */
9854 if (globals->use_rel)
9855 {
9856 int negative;
9857 bfd_vma constant = insn & 0xff;
9858 bfd_vma rotation = (insn & 0xf00) >> 8;
9859
9860 if (rotation == 0)
9861 signed_addend = constant;
9862 else
9863 {
9864 /* Compensate for the fact that in the instruction, the
9865 rotation is stored in multiples of 2 bits. */
9866 rotation *= 2;
9867
9868 /* Rotate "constant" right by "rotation" bits. */
9869 signed_addend = (constant >> rotation) |
9870 (constant << (8 * sizeof (bfd_vma) - rotation));
9871 }
9872
9873 /* Determine if the instruction is an ADD or a SUB.
9874 (For REL, this determines the sign of the addend.) */
9875 negative = identify_add_or_sub (insn);
9876 if (negative == 0)
9877 {
9878 (*_bfd_error_handler)
9879 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
9880 input_bfd, input_section,
9881 (long) rel->r_offset, howto->name);
9882 return bfd_reloc_overflow;
9883 }
9884
9885 signed_addend *= negative;
9886 }
9887
9888 /* Compute the value (X) to go in the place. */
9889 if (r_type == R_ARM_ALU_PC_G0_NC
9890 || r_type == R_ARM_ALU_PC_G1_NC
9891 || r_type == R_ARM_ALU_PC_G0
9892 || r_type == R_ARM_ALU_PC_G1
9893 || r_type == R_ARM_ALU_PC_G2)
9894 /* PC relative. */
9895 signed_value = value - pc + signed_addend;
9896 else
9897 /* Section base relative. */
9898 signed_value = value - sb + signed_addend;
9899
9900 /* If the target symbol is a Thumb function, then set the
9901 Thumb bit in the address. */
9902 if (branch_type == ST_BRANCH_TO_THUMB)
9903 signed_value |= 1;
9904
9905 /* Calculate the value of the relevant G_n, in encoded
9906 constant-with-rotation format. */
9907 g_n = calculate_group_reloc_mask (abs (signed_value), group,
9908 &residual);
9909
9910 /* Check for overflow if required. */
9911 if ((r_type == R_ARM_ALU_PC_G0
9912 || r_type == R_ARM_ALU_PC_G1
9913 || r_type == R_ARM_ALU_PC_G2
9914 || r_type == R_ARM_ALU_SB_G0
9915 || r_type == R_ARM_ALU_SB_G1
9916 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
9917 {
9918 (*_bfd_error_handler)
9919 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
9920 input_bfd, input_section,
9921 (long) rel->r_offset, abs (signed_value), howto->name);
9922 return bfd_reloc_overflow;
9923 }
9924
9925 /* Mask out the value and the ADD/SUB part of the opcode; take care
9926 not to destroy the S bit. */
9927 insn &= 0xff1ff000;
9928
9929 /* Set the opcode according to whether the value to go in the
9930 place is negative. */
9931 if (signed_value < 0)
9932 insn |= 1 << 22;
9933 else
9934 insn |= 1 << 23;
9935
9936 /* Encode the offset. */
9937 insn |= g_n;
9938
9939 bfd_put_32 (input_bfd, insn, hit_data);
9940 }
9941 return bfd_reloc_ok;
9942
9943 case R_ARM_LDR_PC_G0:
9944 case R_ARM_LDR_PC_G1:
9945 case R_ARM_LDR_PC_G2:
9946 case R_ARM_LDR_SB_G0:
9947 case R_ARM_LDR_SB_G1:
9948 case R_ARM_LDR_SB_G2:
9949 {
9950 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9951 bfd_vma pc = input_section->output_section->vma
9952 + input_section->output_offset + rel->r_offset;
9953 bfd_vma sb = 0; /* See note above. */
9954 bfd_vma residual;
9955 bfd_signed_vma signed_value;
9956 int group = 0;
9957
9958 /* Determine which groups of bits to calculate. */
9959 switch (r_type)
9960 {
9961 case R_ARM_LDR_PC_G0:
9962 case R_ARM_LDR_SB_G0:
9963 group = 0;
9964 break;
9965
9966 case R_ARM_LDR_PC_G1:
9967 case R_ARM_LDR_SB_G1:
9968 group = 1;
9969 break;
9970
9971 case R_ARM_LDR_PC_G2:
9972 case R_ARM_LDR_SB_G2:
9973 group = 2;
9974 break;
9975
9976 default:
9977 abort ();
9978 }
9979
9980 /* If REL, extract the addend from the insn. If RELA, it will
9981 have already been fetched for us. */
9982 if (globals->use_rel)
9983 {
9984 int negative = (insn & (1 << 23)) ? 1 : -1;
9985 signed_addend = negative * (insn & 0xfff);
9986 }
9987
9988 /* Compute the value (X) to go in the place. */
9989 if (r_type == R_ARM_LDR_PC_G0
9990 || r_type == R_ARM_LDR_PC_G1
9991 || r_type == R_ARM_LDR_PC_G2)
9992 /* PC relative. */
9993 signed_value = value - pc + signed_addend;
9994 else
9995 /* Section base relative. */
9996 signed_value = value - sb + signed_addend;
9997
9998 /* Calculate the value of the relevant G_{n-1} to obtain
9999 the residual at that stage. */
10000 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10001
10002 /* Check for overflow. */
10003 if (residual >= 0x1000)
10004 {
10005 (*_bfd_error_handler)
10006 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10007 input_bfd, input_section,
10008 (long) rel->r_offset, abs (signed_value), howto->name);
10009 return bfd_reloc_overflow;
10010 }
10011
10012 /* Mask out the value and U bit. */
10013 insn &= 0xff7ff000;
10014
10015 /* Set the U bit if the value to go in the place is non-negative. */
10016 if (signed_value >= 0)
10017 insn |= 1 << 23;
10018
10019 /* Encode the offset. */
10020 insn |= residual;
10021
10022 bfd_put_32 (input_bfd, insn, hit_data);
10023 }
10024 return bfd_reloc_ok;
10025
10026 case R_ARM_LDRS_PC_G0:
10027 case R_ARM_LDRS_PC_G1:
10028 case R_ARM_LDRS_PC_G2:
10029 case R_ARM_LDRS_SB_G0:
10030 case R_ARM_LDRS_SB_G1:
10031 case R_ARM_LDRS_SB_G2:
10032 {
10033 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10034 bfd_vma pc = input_section->output_section->vma
10035 + input_section->output_offset + rel->r_offset;
10036 bfd_vma sb = 0; /* See note above. */
10037 bfd_vma residual;
10038 bfd_signed_vma signed_value;
10039 int group = 0;
10040
10041 /* Determine which groups of bits to calculate. */
10042 switch (r_type)
10043 {
10044 case R_ARM_LDRS_PC_G0:
10045 case R_ARM_LDRS_SB_G0:
10046 group = 0;
10047 break;
10048
10049 case R_ARM_LDRS_PC_G1:
10050 case R_ARM_LDRS_SB_G1:
10051 group = 1;
10052 break;
10053
10054 case R_ARM_LDRS_PC_G2:
10055 case R_ARM_LDRS_SB_G2:
10056 group = 2;
10057 break;
10058
10059 default:
10060 abort ();
10061 }
10062
10063 /* If REL, extract the addend from the insn. If RELA, it will
10064 have already been fetched for us. */
10065 if (globals->use_rel)
10066 {
10067 int negative = (insn & (1 << 23)) ? 1 : -1;
10068 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
10069 }
10070
10071 /* Compute the value (X) to go in the place. */
10072 if (r_type == R_ARM_LDRS_PC_G0
10073 || r_type == R_ARM_LDRS_PC_G1
10074 || r_type == R_ARM_LDRS_PC_G2)
10075 /* PC relative. */
10076 signed_value = value - pc + signed_addend;
10077 else
10078 /* Section base relative. */
10079 signed_value = value - sb + signed_addend;
10080
10081 /* Calculate the value of the relevant G_{n-1} to obtain
10082 the residual at that stage. */
10083 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10084
10085 /* Check for overflow. */
10086 if (residual >= 0x100)
10087 {
10088 (*_bfd_error_handler)
10089 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10090 input_bfd, input_section,
10091 (long) rel->r_offset, abs (signed_value), howto->name);
10092 return bfd_reloc_overflow;
10093 }
10094
10095 /* Mask out the value and U bit. */
10096 insn &= 0xff7ff0f0;
10097
10098 /* Set the U bit if the value to go in the place is non-negative. */
10099 if (signed_value >= 0)
10100 insn |= 1 << 23;
10101
10102 /* Encode the offset. */
10103 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
10104
10105 bfd_put_32 (input_bfd, insn, hit_data);
10106 }
10107 return bfd_reloc_ok;
10108
10109 case R_ARM_LDC_PC_G0:
10110 case R_ARM_LDC_PC_G1:
10111 case R_ARM_LDC_PC_G2:
10112 case R_ARM_LDC_SB_G0:
10113 case R_ARM_LDC_SB_G1:
10114 case R_ARM_LDC_SB_G2:
10115 {
10116 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10117 bfd_vma pc = input_section->output_section->vma
10118 + input_section->output_offset + rel->r_offset;
10119 bfd_vma sb = 0; /* See note above. */
10120 bfd_vma residual;
10121 bfd_signed_vma signed_value;
10122 int group = 0;
10123
10124 /* Determine which groups of bits to calculate. */
10125 switch (r_type)
10126 {
10127 case R_ARM_LDC_PC_G0:
10128 case R_ARM_LDC_SB_G0:
10129 group = 0;
10130 break;
10131
10132 case R_ARM_LDC_PC_G1:
10133 case R_ARM_LDC_SB_G1:
10134 group = 1;
10135 break;
10136
10137 case R_ARM_LDC_PC_G2:
10138 case R_ARM_LDC_SB_G2:
10139 group = 2;
10140 break;
10141
10142 default:
10143 abort ();
10144 }
10145
10146 /* If REL, extract the addend from the insn. If RELA, it will
10147 have already been fetched for us. */
10148 if (globals->use_rel)
10149 {
10150 int negative = (insn & (1 << 23)) ? 1 : -1;
10151 signed_addend = negative * ((insn & 0xff) << 2);
10152 }
10153
10154 /* Compute the value (X) to go in the place. */
10155 if (r_type == R_ARM_LDC_PC_G0
10156 || r_type == R_ARM_LDC_PC_G1
10157 || r_type == R_ARM_LDC_PC_G2)
10158 /* PC relative. */
10159 signed_value = value - pc + signed_addend;
10160 else
10161 /* Section base relative. */
10162 signed_value = value - sb + signed_addend;
10163
10164 /* Calculate the value of the relevant G_{n-1} to obtain
10165 the residual at that stage. */
10166 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10167
10168 /* Check for overflow. (The absolute value to go in the place must be
10169 divisible by four and, after having been divided by four, must
10170 fit in eight bits.) */
10171 if ((residual & 0x3) != 0 || residual >= 0x400)
10172 {
10173 (*_bfd_error_handler)
10174 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10175 input_bfd, input_section,
10176 (long) rel->r_offset, abs (signed_value), howto->name);
10177 return bfd_reloc_overflow;
10178 }
10179
10180 /* Mask out the value and U bit. */
10181 insn &= 0xff7fff00;
10182
10183 /* Set the U bit if the value to go in the place is non-negative. */
10184 if (signed_value >= 0)
10185 insn |= 1 << 23;
10186
10187 /* Encode the offset. */
10188 insn |= residual >> 2;
10189
10190 bfd_put_32 (input_bfd, insn, hit_data);
10191 }
10192 return bfd_reloc_ok;
10193
10194 default:
10195 return bfd_reloc_notsupported;
10196 }
10197 }
10198
10199 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
10200 static void
10201 arm_add_to_rel (bfd * abfd,
10202 bfd_byte * address,
10203 reloc_howto_type * howto,
10204 bfd_signed_vma increment)
10205 {
10206 bfd_signed_vma addend;
10207
10208 if (howto->type == R_ARM_THM_CALL
10209 || howto->type == R_ARM_THM_JUMP24)
10210 {
10211 int upper_insn, lower_insn;
10212 int upper, lower;
10213
10214 upper_insn = bfd_get_16 (abfd, address);
10215 lower_insn = bfd_get_16 (abfd, address + 2);
10216 upper = upper_insn & 0x7ff;
10217 lower = lower_insn & 0x7ff;
10218
10219 addend = (upper << 12) | (lower << 1);
10220 addend += increment;
10221 addend >>= 1;
10222
10223 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
10224 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
10225
10226 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
10227 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
10228 }
10229 else
10230 {
10231 bfd_vma contents;
10232
10233 contents = bfd_get_32 (abfd, address);
10234
10235 /* Get the (signed) value from the instruction. */
10236 addend = contents & howto->src_mask;
10237 if (addend & ((howto->src_mask + 1) >> 1))
10238 {
10239 bfd_signed_vma mask;
10240
10241 mask = -1;
10242 mask &= ~ howto->src_mask;
10243 addend |= mask;
10244 }
10245
10246 /* Add in the increment, (which is a byte value). */
10247 switch (howto->type)
10248 {
10249 default:
10250 addend += increment;
10251 break;
10252
10253 case R_ARM_PC24:
10254 case R_ARM_PLT32:
10255 case R_ARM_CALL:
10256 case R_ARM_JUMP24:
10257 addend <<= howto->size;
10258 addend += increment;
10259
10260 /* Should we check for overflow here ? */
10261
10262 /* Drop any undesired bits. */
10263 addend >>= howto->rightshift;
10264 break;
10265 }
10266
10267 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
10268
10269 bfd_put_32 (abfd, contents, address);
10270 }
10271 }
10272
10273 #define IS_ARM_TLS_RELOC(R_TYPE) \
10274 ((R_TYPE) == R_ARM_TLS_GD32 \
10275 || (R_TYPE) == R_ARM_TLS_LDO32 \
10276 || (R_TYPE) == R_ARM_TLS_LDM32 \
10277 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
10278 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
10279 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
10280 || (R_TYPE) == R_ARM_TLS_LE32 \
10281 || (R_TYPE) == R_ARM_TLS_IE32 \
10282 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
10283
10284 /* Specific set of relocations for the gnu tls dialect. */
10285 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
10286 ((R_TYPE) == R_ARM_TLS_GOTDESC \
10287 || (R_TYPE) == R_ARM_TLS_CALL \
10288 || (R_TYPE) == R_ARM_THM_TLS_CALL \
10289 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
10290 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
10291
10292 /* Relocate an ARM ELF section. */
10293
10294 static bfd_boolean
10295 elf32_arm_relocate_section (bfd * output_bfd,
10296 struct bfd_link_info * info,
10297 bfd * input_bfd,
10298 asection * input_section,
10299 bfd_byte * contents,
10300 Elf_Internal_Rela * relocs,
10301 Elf_Internal_Sym * local_syms,
10302 asection ** local_sections)
10303 {
10304 Elf_Internal_Shdr *symtab_hdr;
10305 struct elf_link_hash_entry **sym_hashes;
10306 Elf_Internal_Rela *rel;
10307 Elf_Internal_Rela *relend;
10308 const char *name;
10309 struct elf32_arm_link_hash_table * globals;
10310
10311 globals = elf32_arm_hash_table (info);
10312 if (globals == NULL)
10313 return FALSE;
10314
10315 symtab_hdr = & elf_symtab_hdr (input_bfd);
10316 sym_hashes = elf_sym_hashes (input_bfd);
10317
10318 rel = relocs;
10319 relend = relocs + input_section->reloc_count;
10320 for (; rel < relend; rel++)
10321 {
10322 int r_type;
10323 reloc_howto_type * howto;
10324 unsigned long r_symndx;
10325 Elf_Internal_Sym * sym;
10326 asection * sec;
10327 struct elf_link_hash_entry * h;
10328 bfd_vma relocation;
10329 bfd_reloc_status_type r;
10330 arelent bfd_reloc;
10331 char sym_type;
10332 bfd_boolean unresolved_reloc = FALSE;
10333 char *error_message = NULL;
10334
10335 r_symndx = ELF32_R_SYM (rel->r_info);
10336 r_type = ELF32_R_TYPE (rel->r_info);
10337 r_type = arm_real_reloc_type (globals, r_type);
10338
10339 if ( r_type == R_ARM_GNU_VTENTRY
10340 || r_type == R_ARM_GNU_VTINHERIT)
10341 continue;
10342
10343 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
10344 howto = bfd_reloc.howto;
10345
10346 h = NULL;
10347 sym = NULL;
10348 sec = NULL;
10349
10350 if (r_symndx < symtab_hdr->sh_info)
10351 {
10352 sym = local_syms + r_symndx;
10353 sym_type = ELF32_ST_TYPE (sym->st_info);
10354 sec = local_sections[r_symndx];
10355
10356 /* An object file might have a reference to a local
10357 undefined symbol. This is a daft object file, but we
10358 should at least do something about it. V4BX & NONE
10359 relocations do not use the symbol and are explicitly
10360 allowed to use the undefined symbol, so allow those.
10361 Likewise for relocations against STN_UNDEF. */
10362 if (r_type != R_ARM_V4BX
10363 && r_type != R_ARM_NONE
10364 && r_symndx != STN_UNDEF
10365 && bfd_is_und_section (sec)
10366 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
10367 {
10368 if (!info->callbacks->undefined_symbol
10369 (info, bfd_elf_string_from_elf_section
10370 (input_bfd, symtab_hdr->sh_link, sym->st_name),
10371 input_bfd, input_section,
10372 rel->r_offset, TRUE))
10373 return FALSE;
10374 }
10375
10376 if (globals->use_rel)
10377 {
10378 relocation = (sec->output_section->vma
10379 + sec->output_offset
10380 + sym->st_value);
10381 if (!info->relocatable
10382 && (sec->flags & SEC_MERGE)
10383 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
10384 {
10385 asection *msec;
10386 bfd_vma addend, value;
10387
10388 switch (r_type)
10389 {
10390 case R_ARM_MOVW_ABS_NC:
10391 case R_ARM_MOVT_ABS:
10392 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
10393 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
10394 addend = (addend ^ 0x8000) - 0x8000;
10395 break;
10396
10397 case R_ARM_THM_MOVW_ABS_NC:
10398 case R_ARM_THM_MOVT_ABS:
10399 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
10400 << 16;
10401 value |= bfd_get_16 (input_bfd,
10402 contents + rel->r_offset + 2);
10403 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
10404 | ((value & 0x04000000) >> 15);
10405 addend = (addend ^ 0x8000) - 0x8000;
10406 break;
10407
10408 default:
10409 if (howto->rightshift
10410 || (howto->src_mask & (howto->src_mask + 1)))
10411 {
10412 (*_bfd_error_handler)
10413 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
10414 input_bfd, input_section,
10415 (long) rel->r_offset, howto->name);
10416 return FALSE;
10417 }
10418
10419 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
10420
10421 /* Get the (signed) value from the instruction. */
10422 addend = value & howto->src_mask;
10423 if (addend & ((howto->src_mask + 1) >> 1))
10424 {
10425 bfd_signed_vma mask;
10426
10427 mask = -1;
10428 mask &= ~ howto->src_mask;
10429 addend |= mask;
10430 }
10431 break;
10432 }
10433
10434 msec = sec;
10435 addend =
10436 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
10437 - relocation;
10438 addend += msec->output_section->vma + msec->output_offset;
10439
10440 /* Cases here must match those in the preceding
10441 switch statement. */
10442 switch (r_type)
10443 {
10444 case R_ARM_MOVW_ABS_NC:
10445 case R_ARM_MOVT_ABS:
10446 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
10447 | (addend & 0xfff);
10448 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
10449 break;
10450
10451 case R_ARM_THM_MOVW_ABS_NC:
10452 case R_ARM_THM_MOVT_ABS:
10453 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
10454 | (addend & 0xff) | ((addend & 0x0800) << 15);
10455 bfd_put_16 (input_bfd, value >> 16,
10456 contents + rel->r_offset);
10457 bfd_put_16 (input_bfd, value,
10458 contents + rel->r_offset + 2);
10459 break;
10460
10461 default:
10462 value = (value & ~ howto->dst_mask)
10463 | (addend & howto->dst_mask);
10464 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
10465 break;
10466 }
10467 }
10468 }
10469 else
10470 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
10471 }
10472 else
10473 {
10474 bfd_boolean warned;
10475
10476 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
10477 r_symndx, symtab_hdr, sym_hashes,
10478 h, sec, relocation,
10479 unresolved_reloc, warned);
10480
10481 sym_type = h->type;
10482 }
10483
10484 if (sec != NULL && discarded_section (sec))
10485 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
10486 rel, 1, relend, howto, 0, contents);
10487
10488 if (info->relocatable)
10489 {
10490 /* This is a relocatable link. We don't have to change
10491 anything, unless the reloc is against a section symbol,
10492 in which case we have to adjust according to where the
10493 section symbol winds up in the output section. */
10494 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
10495 {
10496 if (globals->use_rel)
10497 arm_add_to_rel (input_bfd, contents + rel->r_offset,
10498 howto, (bfd_signed_vma) sec->output_offset);
10499 else
10500 rel->r_addend += sec->output_offset;
10501 }
10502 continue;
10503 }
10504
10505 if (h != NULL)
10506 name = h->root.root.string;
10507 else
10508 {
10509 name = (bfd_elf_string_from_elf_section
10510 (input_bfd, symtab_hdr->sh_link, sym->st_name));
10511 if (name == NULL || *name == '\0')
10512 name = bfd_section_name (input_bfd, sec);
10513 }
10514
10515 if (r_symndx != STN_UNDEF
10516 && r_type != R_ARM_NONE
10517 && (h == NULL
10518 || h->root.type == bfd_link_hash_defined
10519 || h->root.type == bfd_link_hash_defweak)
10520 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
10521 {
10522 (*_bfd_error_handler)
10523 ((sym_type == STT_TLS
10524 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
10525 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
10526 input_bfd,
10527 input_section,
10528 (long) rel->r_offset,
10529 howto->name,
10530 name);
10531 }
10532
10533 /* We call elf32_arm_final_link_relocate unless we're completely
10534 done, i.e., the relaxation produced the final output we want,
10535 and we won't let anybody mess with it. Also, we have to do
10536 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
10537 both in relaxed and non-relaxed cases */
10538 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
10539 || (IS_ARM_TLS_GNU_RELOC (r_type)
10540 && !((h ? elf32_arm_hash_entry (h)->tls_type :
10541 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
10542 & GOT_TLS_GDESC)))
10543 {
10544 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
10545 contents, rel, h == NULL);
10546 /* This may have been marked unresolved because it came from
10547 a shared library. But we've just dealt with that. */
10548 unresolved_reloc = 0;
10549 }
10550 else
10551 r = bfd_reloc_continue;
10552
10553 if (r == bfd_reloc_continue)
10554 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
10555 input_section, contents, rel,
10556 relocation, info, sec, name, sym_type,
10557 (h ? h->target_internal
10558 : ARM_SYM_BRANCH_TYPE (sym)), h,
10559 &unresolved_reloc, &error_message);
10560
10561 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
10562 because such sections are not SEC_ALLOC and thus ld.so will
10563 not process them. */
10564 if (unresolved_reloc
10565 && !((input_section->flags & SEC_DEBUGGING) != 0
10566 && h->def_dynamic)
10567 && _bfd_elf_section_offset (output_bfd, info, input_section,
10568 rel->r_offset) != (bfd_vma) -1)
10569 {
10570 (*_bfd_error_handler)
10571 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
10572 input_bfd,
10573 input_section,
10574 (long) rel->r_offset,
10575 howto->name,
10576 h->root.root.string);
10577 return FALSE;
10578 }
10579
10580 if (r != bfd_reloc_ok)
10581 {
10582 switch (r)
10583 {
10584 case bfd_reloc_overflow:
10585 /* If the overflowing reloc was to an undefined symbol,
10586 we have already printed one error message and there
10587 is no point complaining again. */
10588 if ((! h ||
10589 h->root.type != bfd_link_hash_undefined)
10590 && (!((*info->callbacks->reloc_overflow)
10591 (info, (h ? &h->root : NULL), name, howto->name,
10592 (bfd_vma) 0, input_bfd, input_section,
10593 rel->r_offset))))
10594 return FALSE;
10595 break;
10596
10597 case bfd_reloc_undefined:
10598 if (!((*info->callbacks->undefined_symbol)
10599 (info, name, input_bfd, input_section,
10600 rel->r_offset, TRUE)))
10601 return FALSE;
10602 break;
10603
10604 case bfd_reloc_outofrange:
10605 error_message = _("out of range");
10606 goto common_error;
10607
10608 case bfd_reloc_notsupported:
10609 error_message = _("unsupported relocation");
10610 goto common_error;
10611
10612 case bfd_reloc_dangerous:
10613 /* error_message should already be set. */
10614 goto common_error;
10615
10616 default:
10617 error_message = _("unknown error");
10618 /* Fall through. */
10619
10620 common_error:
10621 BFD_ASSERT (error_message != NULL);
10622 if (!((*info->callbacks->reloc_dangerous)
10623 (info, error_message, input_bfd, input_section,
10624 rel->r_offset)))
10625 return FALSE;
10626 break;
10627 }
10628 }
10629 }
10630
10631 return TRUE;
10632 }
10633
10634 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
10635 adds the edit to the start of the list. (The list must be built in order of
10636 ascending TINDEX: the function's callers are primarily responsible for
10637 maintaining that condition). */
10638
10639 static void
10640 add_unwind_table_edit (arm_unwind_table_edit **head,
10641 arm_unwind_table_edit **tail,
10642 arm_unwind_edit_type type,
10643 asection *linked_section,
10644 unsigned int tindex)
10645 {
10646 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
10647 xmalloc (sizeof (arm_unwind_table_edit));
10648
10649 new_edit->type = type;
10650 new_edit->linked_section = linked_section;
10651 new_edit->index = tindex;
10652
10653 if (tindex > 0)
10654 {
10655 new_edit->next = NULL;
10656
10657 if (*tail)
10658 (*tail)->next = new_edit;
10659
10660 (*tail) = new_edit;
10661
10662 if (!*head)
10663 (*head) = new_edit;
10664 }
10665 else
10666 {
10667 new_edit->next = *head;
10668
10669 if (!*tail)
10670 *tail = new_edit;
10671
10672 *head = new_edit;
10673 }
10674 }
10675
10676 static _arm_elf_section_data *get_arm_elf_section_data (asection *);
10677
10678 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
10679 static void
10680 adjust_exidx_size(asection *exidx_sec, int adjust)
10681 {
10682 asection *out_sec;
10683
10684 if (!exidx_sec->rawsize)
10685 exidx_sec->rawsize = exidx_sec->size;
10686
10687 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
10688 out_sec = exidx_sec->output_section;
10689 /* Adjust size of output section. */
10690 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
10691 }
10692
10693 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
10694 static void
10695 insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
10696 {
10697 struct _arm_elf_section_data *exidx_arm_data;
10698
10699 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
10700 add_unwind_table_edit (
10701 &exidx_arm_data->u.exidx.unwind_edit_list,
10702 &exidx_arm_data->u.exidx.unwind_edit_tail,
10703 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
10704
10705 adjust_exidx_size(exidx_sec, 8);
10706 }
10707
10708 /* Scan .ARM.exidx tables, and create a list describing edits which should be
10709 made to those tables, such that:
10710
10711 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
10712 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
10713 codes which have been inlined into the index).
10714
10715 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
10716
10717 The edits are applied when the tables are written
10718 (in elf32_arm_write_section). */
10719
10720 bfd_boolean
10721 elf32_arm_fix_exidx_coverage (asection **text_section_order,
10722 unsigned int num_text_sections,
10723 struct bfd_link_info *info,
10724 bfd_boolean merge_exidx_entries)
10725 {
10726 bfd *inp;
10727 unsigned int last_second_word = 0, i;
10728 asection *last_exidx_sec = NULL;
10729 asection *last_text_sec = NULL;
10730 int last_unwind_type = -1;
10731
10732 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
10733 text sections. */
10734 for (inp = info->input_bfds; inp != NULL; inp = inp->link_next)
10735 {
10736 asection *sec;
10737
10738 for (sec = inp->sections; sec != NULL; sec = sec->next)
10739 {
10740 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
10741 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
10742
10743 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
10744 continue;
10745
10746 if (elf_sec->linked_to)
10747 {
10748 Elf_Internal_Shdr *linked_hdr
10749 = &elf_section_data (elf_sec->linked_to)->this_hdr;
10750 struct _arm_elf_section_data *linked_sec_arm_data
10751 = get_arm_elf_section_data (linked_hdr->bfd_section);
10752
10753 if (linked_sec_arm_data == NULL)
10754 continue;
10755
10756 /* Link this .ARM.exidx section back from the text section it
10757 describes. */
10758 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
10759 }
10760 }
10761 }
10762
10763 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
10764 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
10765 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
10766
10767 for (i = 0; i < num_text_sections; i++)
10768 {
10769 asection *sec = text_section_order[i];
10770 asection *exidx_sec;
10771 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
10772 struct _arm_elf_section_data *exidx_arm_data;
10773 bfd_byte *contents = NULL;
10774 int deleted_exidx_bytes = 0;
10775 bfd_vma j;
10776 arm_unwind_table_edit *unwind_edit_head = NULL;
10777 arm_unwind_table_edit *unwind_edit_tail = NULL;
10778 Elf_Internal_Shdr *hdr;
10779 bfd *ibfd;
10780
10781 if (arm_data == NULL)
10782 continue;
10783
10784 exidx_sec = arm_data->u.text.arm_exidx_sec;
10785 if (exidx_sec == NULL)
10786 {
10787 /* Section has no unwind data. */
10788 if (last_unwind_type == 0 || !last_exidx_sec)
10789 continue;
10790
10791 /* Ignore zero sized sections. */
10792 if (sec->size == 0)
10793 continue;
10794
10795 insert_cantunwind_after(last_text_sec, last_exidx_sec);
10796 last_unwind_type = 0;
10797 continue;
10798 }
10799
10800 /* Skip /DISCARD/ sections. */
10801 if (bfd_is_abs_section (exidx_sec->output_section))
10802 continue;
10803
10804 hdr = &elf_section_data (exidx_sec)->this_hdr;
10805 if (hdr->sh_type != SHT_ARM_EXIDX)
10806 continue;
10807
10808 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
10809 if (exidx_arm_data == NULL)
10810 continue;
10811
10812 ibfd = exidx_sec->owner;
10813
10814 if (hdr->contents != NULL)
10815 contents = hdr->contents;
10816 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
10817 /* An error? */
10818 continue;
10819
10820 for (j = 0; j < hdr->sh_size; j += 8)
10821 {
10822 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
10823 int unwind_type;
10824 int elide = 0;
10825
10826 /* An EXIDX_CANTUNWIND entry. */
10827 if (second_word == 1)
10828 {
10829 if (last_unwind_type == 0)
10830 elide = 1;
10831 unwind_type = 0;
10832 }
10833 /* Inlined unwinding data. Merge if equal to previous. */
10834 else if ((second_word & 0x80000000) != 0)
10835 {
10836 if (merge_exidx_entries
10837 && last_second_word == second_word && last_unwind_type == 1)
10838 elide = 1;
10839 unwind_type = 1;
10840 last_second_word = second_word;
10841 }
10842 /* Normal table entry. In theory we could merge these too,
10843 but duplicate entries are likely to be much less common. */
10844 else
10845 unwind_type = 2;
10846
10847 if (elide)
10848 {
10849 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
10850 DELETE_EXIDX_ENTRY, NULL, j / 8);
10851
10852 deleted_exidx_bytes += 8;
10853 }
10854
10855 last_unwind_type = unwind_type;
10856 }
10857
10858 /* Free contents if we allocated it ourselves. */
10859 if (contents != hdr->contents)
10860 free (contents);
10861
10862 /* Record edits to be applied later (in elf32_arm_write_section). */
10863 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
10864 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
10865
10866 if (deleted_exidx_bytes > 0)
10867 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
10868
10869 last_exidx_sec = exidx_sec;
10870 last_text_sec = sec;
10871 }
10872
10873 /* Add terminating CANTUNWIND entry. */
10874 if (last_exidx_sec && last_unwind_type != 0)
10875 insert_cantunwind_after(last_text_sec, last_exidx_sec);
10876
10877 return TRUE;
10878 }
10879
10880 static bfd_boolean
10881 elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
10882 bfd *ibfd, const char *name)
10883 {
10884 asection *sec, *osec;
10885
10886 sec = bfd_get_section_by_name (ibfd, name);
10887 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
10888 return TRUE;
10889
10890 osec = sec->output_section;
10891 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
10892 return TRUE;
10893
10894 if (! bfd_set_section_contents (obfd, osec, sec->contents,
10895 sec->output_offset, sec->size))
10896 return FALSE;
10897
10898 return TRUE;
10899 }
10900
10901 static bfd_boolean
10902 elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
10903 {
10904 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
10905 asection *sec, *osec;
10906
10907 if (globals == NULL)
10908 return FALSE;
10909
10910 /* Invoke the regular ELF backend linker to do all the work. */
10911 if (!bfd_elf_final_link (abfd, info))
10912 return FALSE;
10913
10914 /* Process stub sections (eg BE8 encoding, ...). */
10915 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
10916 int i;
10917 for (i=0; i<htab->top_id; i++)
10918 {
10919 sec = htab->stub_group[i].stub_sec;
10920 /* Only process it once, in its link_sec slot. */
10921 if (sec && i == htab->stub_group[i].link_sec->id)
10922 {
10923 osec = sec->output_section;
10924 elf32_arm_write_section (abfd, info, sec, sec->contents);
10925 if (! bfd_set_section_contents (abfd, osec, sec->contents,
10926 sec->output_offset, sec->size))
10927 return FALSE;
10928 }
10929 }
10930
10931 /* Write out any glue sections now that we have created all the
10932 stubs. */
10933 if (globals->bfd_of_glue_owner != NULL)
10934 {
10935 if (! elf32_arm_output_glue_section (info, abfd,
10936 globals->bfd_of_glue_owner,
10937 ARM2THUMB_GLUE_SECTION_NAME))
10938 return FALSE;
10939
10940 if (! elf32_arm_output_glue_section (info, abfd,
10941 globals->bfd_of_glue_owner,
10942 THUMB2ARM_GLUE_SECTION_NAME))
10943 return FALSE;
10944
10945 if (! elf32_arm_output_glue_section (info, abfd,
10946 globals->bfd_of_glue_owner,
10947 VFP11_ERRATUM_VENEER_SECTION_NAME))
10948 return FALSE;
10949
10950 if (! elf32_arm_output_glue_section (info, abfd,
10951 globals->bfd_of_glue_owner,
10952 ARM_BX_GLUE_SECTION_NAME))
10953 return FALSE;
10954 }
10955
10956 return TRUE;
10957 }
10958
10959 /* Return a best guess for the machine number based on the attributes. */
10960
10961 static unsigned int
10962 bfd_arm_get_mach_from_attributes (bfd * abfd)
10963 {
10964 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
10965
10966 switch (arch)
10967 {
10968 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
10969 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
10970 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
10971
10972 case TAG_CPU_ARCH_V5TE:
10973 {
10974 char * name;
10975
10976 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
10977 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
10978
10979 if (name)
10980 {
10981 if (strcmp (name, "IWMMXT2") == 0)
10982 return bfd_mach_arm_iWMMXt2;
10983
10984 if (strcmp (name, "IWMMXT") == 0)
10985 return bfd_mach_arm_iWMMXt;
10986 }
10987
10988 return bfd_mach_arm_5TE;
10989 }
10990
10991 default:
10992 return bfd_mach_arm_unknown;
10993 }
10994 }
10995
10996 /* Set the right machine number. */
10997
10998 static bfd_boolean
10999 elf32_arm_object_p (bfd *abfd)
11000 {
11001 unsigned int mach;
11002
11003 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
11004
11005 if (mach == bfd_mach_arm_unknown)
11006 {
11007 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
11008 mach = bfd_mach_arm_ep9312;
11009 else
11010 mach = bfd_arm_get_mach_from_attributes (abfd);
11011 }
11012
11013 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
11014 return TRUE;
11015 }
11016
11017 /* Function to keep ARM specific flags in the ELF header. */
11018
11019 static bfd_boolean
11020 elf32_arm_set_private_flags (bfd *abfd, flagword flags)
11021 {
11022 if (elf_flags_init (abfd)
11023 && elf_elfheader (abfd)->e_flags != flags)
11024 {
11025 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
11026 {
11027 if (flags & EF_ARM_INTERWORK)
11028 (*_bfd_error_handler)
11029 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
11030 abfd);
11031 else
11032 _bfd_error_handler
11033 (_("Warning: Clearing the interworking flag of %B due to outside request"),
11034 abfd);
11035 }
11036 }
11037 else
11038 {
11039 elf_elfheader (abfd)->e_flags = flags;
11040 elf_flags_init (abfd) = TRUE;
11041 }
11042
11043 return TRUE;
11044 }
11045
11046 /* Copy backend specific data from one object module to another. */
11047
11048 static bfd_boolean
11049 elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
11050 {
11051 flagword in_flags;
11052 flagword out_flags;
11053
11054 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
11055 return TRUE;
11056
11057 in_flags = elf_elfheader (ibfd)->e_flags;
11058 out_flags = elf_elfheader (obfd)->e_flags;
11059
11060 if (elf_flags_init (obfd)
11061 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
11062 && in_flags != out_flags)
11063 {
11064 /* Cannot mix APCS26 and APCS32 code. */
11065 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
11066 return FALSE;
11067
11068 /* Cannot mix float APCS and non-float APCS code. */
11069 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
11070 return FALSE;
11071
11072 /* If the src and dest have different interworking flags
11073 then turn off the interworking bit. */
11074 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
11075 {
11076 if (out_flags & EF_ARM_INTERWORK)
11077 _bfd_error_handler
11078 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
11079 obfd, ibfd);
11080
11081 in_flags &= ~EF_ARM_INTERWORK;
11082 }
11083
11084 /* Likewise for PIC, though don't warn for this case. */
11085 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
11086 in_flags &= ~EF_ARM_PIC;
11087 }
11088
11089 elf_elfheader (obfd)->e_flags = in_flags;
11090 elf_flags_init (obfd) = TRUE;
11091
11092 /* Also copy the EI_OSABI field. */
11093 elf_elfheader (obfd)->e_ident[EI_OSABI] =
11094 elf_elfheader (ibfd)->e_ident[EI_OSABI];
11095
11096 /* Copy object attributes. */
11097 _bfd_elf_copy_obj_attributes (ibfd, obfd);
11098
11099 return TRUE;
11100 }
11101
11102 /* Values for Tag_ABI_PCS_R9_use. */
11103 enum
11104 {
11105 AEABI_R9_V6,
11106 AEABI_R9_SB,
11107 AEABI_R9_TLS,
11108 AEABI_R9_unused
11109 };
11110
11111 /* Values for Tag_ABI_PCS_RW_data. */
11112 enum
11113 {
11114 AEABI_PCS_RW_data_absolute,
11115 AEABI_PCS_RW_data_PCrel,
11116 AEABI_PCS_RW_data_SBrel,
11117 AEABI_PCS_RW_data_unused
11118 };
11119
11120 /* Values for Tag_ABI_enum_size. */
11121 enum
11122 {
11123 AEABI_enum_unused,
11124 AEABI_enum_short,
11125 AEABI_enum_wide,
11126 AEABI_enum_forced_wide
11127 };
11128
11129 /* Determine whether an object attribute tag takes an integer, a
11130 string or both. */
11131
11132 static int
11133 elf32_arm_obj_attrs_arg_type (int tag)
11134 {
11135 if (tag == Tag_compatibility)
11136 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
11137 else if (tag == Tag_nodefaults)
11138 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
11139 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
11140 return ATTR_TYPE_FLAG_STR_VAL;
11141 else if (tag < 32)
11142 return ATTR_TYPE_FLAG_INT_VAL;
11143 else
11144 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
11145 }
11146
11147 /* The ABI defines that Tag_conformance should be emitted first, and that
11148 Tag_nodefaults should be second (if either is defined). This sets those
11149 two positions, and bumps up the position of all the remaining tags to
11150 compensate. */
11151 static int
11152 elf32_arm_obj_attrs_order (int num)
11153 {
11154 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
11155 return Tag_conformance;
11156 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
11157 return Tag_nodefaults;
11158 if ((num - 2) < Tag_nodefaults)
11159 return num - 2;
11160 if ((num - 1) < Tag_conformance)
11161 return num - 1;
11162 return num;
11163 }
11164
11165 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
11166 static bfd_boolean
11167 elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
11168 {
11169 if ((tag & 127) < 64)
11170 {
11171 _bfd_error_handler
11172 (_("%B: Unknown mandatory EABI object attribute %d"),
11173 abfd, tag);
11174 bfd_set_error (bfd_error_bad_value);
11175 return FALSE;
11176 }
11177 else
11178 {
11179 _bfd_error_handler
11180 (_("Warning: %B: Unknown EABI object attribute %d"),
11181 abfd, tag);
11182 return TRUE;
11183 }
11184 }
11185
11186 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
11187 Returns -1 if no architecture could be read. */
11188
11189 static int
11190 get_secondary_compatible_arch (bfd *abfd)
11191 {
11192 obj_attribute *attr =
11193 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
11194
11195 /* Note: the tag and its argument below are uleb128 values, though
11196 currently-defined values fit in one byte for each. */
11197 if (attr->s
11198 && attr->s[0] == Tag_CPU_arch
11199 && (attr->s[1] & 128) != 128
11200 && attr->s[2] == 0)
11201 return attr->s[1];
11202
11203 /* This tag is "safely ignorable", so don't complain if it looks funny. */
11204 return -1;
11205 }
11206
11207 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
11208 The tag is removed if ARCH is -1. */
11209
11210 static void
11211 set_secondary_compatible_arch (bfd *abfd, int arch)
11212 {
11213 obj_attribute *attr =
11214 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
11215
11216 if (arch == -1)
11217 {
11218 attr->s = NULL;
11219 return;
11220 }
11221
11222 /* Note: the tag and its argument below are uleb128 values, though
11223 currently-defined values fit in one byte for each. */
11224 if (!attr->s)
11225 attr->s = (char *) bfd_alloc (abfd, 3);
11226 attr->s[0] = Tag_CPU_arch;
11227 attr->s[1] = arch;
11228 attr->s[2] = '\0';
11229 }
11230
11231 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
11232 into account. */
11233
11234 static int
11235 tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
11236 int newtag, int secondary_compat)
11237 {
11238 #define T(X) TAG_CPU_ARCH_##X
11239 int tagl, tagh, result;
11240 const int v6t2[] =
11241 {
11242 T(V6T2), /* PRE_V4. */
11243 T(V6T2), /* V4. */
11244 T(V6T2), /* V4T. */
11245 T(V6T2), /* V5T. */
11246 T(V6T2), /* V5TE. */
11247 T(V6T2), /* V5TEJ. */
11248 T(V6T2), /* V6. */
11249 T(V7), /* V6KZ. */
11250 T(V6T2) /* V6T2. */
11251 };
11252 const int v6k[] =
11253 {
11254 T(V6K), /* PRE_V4. */
11255 T(V6K), /* V4. */
11256 T(V6K), /* V4T. */
11257 T(V6K), /* V5T. */
11258 T(V6K), /* V5TE. */
11259 T(V6K), /* V5TEJ. */
11260 T(V6K), /* V6. */
11261 T(V6KZ), /* V6KZ. */
11262 T(V7), /* V6T2. */
11263 T(V6K) /* V6K. */
11264 };
11265 const int v7[] =
11266 {
11267 T(V7), /* PRE_V4. */
11268 T(V7), /* V4. */
11269 T(V7), /* V4T. */
11270 T(V7), /* V5T. */
11271 T(V7), /* V5TE. */
11272 T(V7), /* V5TEJ. */
11273 T(V7), /* V6. */
11274 T(V7), /* V6KZ. */
11275 T(V7), /* V6T2. */
11276 T(V7), /* V6K. */
11277 T(V7) /* V7. */
11278 };
11279 const int v6_m[] =
11280 {
11281 -1, /* PRE_V4. */
11282 -1, /* V4. */
11283 T(V6K), /* V4T. */
11284 T(V6K), /* V5T. */
11285 T(V6K), /* V5TE. */
11286 T(V6K), /* V5TEJ. */
11287 T(V6K), /* V6. */
11288 T(V6KZ), /* V6KZ. */
11289 T(V7), /* V6T2. */
11290 T(V6K), /* V6K. */
11291 T(V7), /* V7. */
11292 T(V6_M) /* V6_M. */
11293 };
11294 const int v6s_m[] =
11295 {
11296 -1, /* PRE_V4. */
11297 -1, /* V4. */
11298 T(V6K), /* V4T. */
11299 T(V6K), /* V5T. */
11300 T(V6K), /* V5TE. */
11301 T(V6K), /* V5TEJ. */
11302 T(V6K), /* V6. */
11303 T(V6KZ), /* V6KZ. */
11304 T(V7), /* V6T2. */
11305 T(V6K), /* V6K. */
11306 T(V7), /* V7. */
11307 T(V6S_M), /* V6_M. */
11308 T(V6S_M) /* V6S_M. */
11309 };
11310 const int v7e_m[] =
11311 {
11312 -1, /* PRE_V4. */
11313 -1, /* V4. */
11314 T(V7E_M), /* V4T. */
11315 T(V7E_M), /* V5T. */
11316 T(V7E_M), /* V5TE. */
11317 T(V7E_M), /* V5TEJ. */
11318 T(V7E_M), /* V6. */
11319 T(V7E_M), /* V6KZ. */
11320 T(V7E_M), /* V6T2. */
11321 T(V7E_M), /* V6K. */
11322 T(V7E_M), /* V7. */
11323 T(V7E_M), /* V6_M. */
11324 T(V7E_M), /* V6S_M. */
11325 T(V7E_M) /* V7E_M. */
11326 };
11327 const int v4t_plus_v6_m[] =
11328 {
11329 -1, /* PRE_V4. */
11330 -1, /* V4. */
11331 T(V4T), /* V4T. */
11332 T(V5T), /* V5T. */
11333 T(V5TE), /* V5TE. */
11334 T(V5TEJ), /* V5TEJ. */
11335 T(V6), /* V6. */
11336 T(V6KZ), /* V6KZ. */
11337 T(V6T2), /* V6T2. */
11338 T(V6K), /* V6K. */
11339 T(V7), /* V7. */
11340 T(V6_M), /* V6_M. */
11341 T(V6S_M), /* V6S_M. */
11342 T(V7E_M), /* V7E_M. */
11343 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
11344 };
11345 const int *comb[] =
11346 {
11347 v6t2,
11348 v6k,
11349 v7,
11350 v6_m,
11351 v6s_m,
11352 v7e_m,
11353 /* Pseudo-architecture. */
11354 v4t_plus_v6_m
11355 };
11356
11357 /* Check we've not got a higher architecture than we know about. */
11358
11359 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
11360 {
11361 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
11362 return -1;
11363 }
11364
11365 /* Override old tag if we have a Tag_also_compatible_with on the output. */
11366
11367 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
11368 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
11369 oldtag = T(V4T_PLUS_V6_M);
11370
11371 /* And override the new tag if we have a Tag_also_compatible_with on the
11372 input. */
11373
11374 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
11375 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
11376 newtag = T(V4T_PLUS_V6_M);
11377
11378 tagl = (oldtag < newtag) ? oldtag : newtag;
11379 result = tagh = (oldtag > newtag) ? oldtag : newtag;
11380
11381 /* Architectures before V6KZ add features monotonically. */
11382 if (tagh <= TAG_CPU_ARCH_V6KZ)
11383 return result;
11384
11385 result = comb[tagh - T(V6T2)][tagl];
11386
11387 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
11388 as the canonical version. */
11389 if (result == T(V4T_PLUS_V6_M))
11390 {
11391 result = T(V4T);
11392 *secondary_compat_out = T(V6_M);
11393 }
11394 else
11395 *secondary_compat_out = -1;
11396
11397 if (result == -1)
11398 {
11399 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
11400 ibfd, oldtag, newtag);
11401 return -1;
11402 }
11403
11404 return result;
11405 #undef T
11406 }
11407
11408 /* Query attributes object to see if integer divide instructions may be
11409 present in an object. */
11410 static bfd_boolean
11411 elf32_arm_attributes_accept_div (const obj_attribute *attr)
11412 {
11413 int arch = attr[Tag_CPU_arch].i;
11414 int profile = attr[Tag_CPU_arch_profile].i;
11415
11416 switch (attr[Tag_DIV_use].i)
11417 {
11418 case 0:
11419 /* Integer divide allowed if instruction contained in archetecture. */
11420 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
11421 return TRUE;
11422 else if (arch >= TAG_CPU_ARCH_V7E_M)
11423 return TRUE;
11424 else
11425 return FALSE;
11426
11427 case 1:
11428 /* Integer divide explicitly prohibited. */
11429 return FALSE;
11430
11431 default:
11432 /* Unrecognised case - treat as allowing divide everywhere. */
11433 case 2:
11434 /* Integer divide allowed in ARM state. */
11435 return TRUE;
11436 }
11437 }
11438
11439 /* Query attributes object to see if integer divide instructions are
11440 forbidden to be in the object. This is not the inverse of
11441 elf32_arm_attributes_accept_div. */
11442 static bfd_boolean
11443 elf32_arm_attributes_forbid_div (const obj_attribute *attr)
11444 {
11445 return attr[Tag_DIV_use].i == 1;
11446 }
11447
11448 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
11449 are conflicting attributes. */
11450
11451 static bfd_boolean
11452 elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
11453 {
11454 obj_attribute *in_attr;
11455 obj_attribute *out_attr;
11456 /* Some tags have 0 = don't care, 1 = strong requirement,
11457 2 = weak requirement. */
11458 static const int order_021[3] = {0, 2, 1};
11459 int i;
11460 bfd_boolean result = TRUE;
11461
11462 /* Skip the linker stubs file. This preserves previous behavior
11463 of accepting unknown attributes in the first input file - but
11464 is that a bug? */
11465 if (ibfd->flags & BFD_LINKER_CREATED)
11466 return TRUE;
11467
11468 if (!elf_known_obj_attributes_proc (obfd)[0].i)
11469 {
11470 /* This is the first object. Copy the attributes. */
11471 _bfd_elf_copy_obj_attributes (ibfd, obfd);
11472
11473 out_attr = elf_known_obj_attributes_proc (obfd);
11474
11475 /* Use the Tag_null value to indicate the attributes have been
11476 initialized. */
11477 out_attr[0].i = 1;
11478
11479 /* We do not output objects with Tag_MPextension_use_legacy - we move
11480 the attribute's value to Tag_MPextension_use. */
11481 if (out_attr[Tag_MPextension_use_legacy].i != 0)
11482 {
11483 if (out_attr[Tag_MPextension_use].i != 0
11484 && out_attr[Tag_MPextension_use_legacy].i
11485 != out_attr[Tag_MPextension_use].i)
11486 {
11487 _bfd_error_handler
11488 (_("Error: %B has both the current and legacy "
11489 "Tag_MPextension_use attributes"), ibfd);
11490 result = FALSE;
11491 }
11492
11493 out_attr[Tag_MPextension_use] =
11494 out_attr[Tag_MPextension_use_legacy];
11495 out_attr[Tag_MPextension_use_legacy].type = 0;
11496 out_attr[Tag_MPextension_use_legacy].i = 0;
11497 }
11498
11499 return result;
11500 }
11501
11502 in_attr = elf_known_obj_attributes_proc (ibfd);
11503 out_attr = elf_known_obj_attributes_proc (obfd);
11504 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
11505 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
11506 {
11507 /* Ignore mismatches if the object doesn't use floating point. */
11508 if (out_attr[Tag_ABI_FP_number_model].i == 0)
11509 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
11510 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
11511 {
11512 _bfd_error_handler
11513 (_("error: %B uses VFP register arguments, %B does not"),
11514 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
11515 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
11516 result = FALSE;
11517 }
11518 }
11519
11520 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
11521 {
11522 /* Merge this attribute with existing attributes. */
11523 switch (i)
11524 {
11525 case Tag_CPU_raw_name:
11526 case Tag_CPU_name:
11527 /* These are merged after Tag_CPU_arch. */
11528 break;
11529
11530 case Tag_ABI_optimization_goals:
11531 case Tag_ABI_FP_optimization_goals:
11532 /* Use the first value seen. */
11533 break;
11534
11535 case Tag_CPU_arch:
11536 {
11537 int secondary_compat = -1, secondary_compat_out = -1;
11538 unsigned int saved_out_attr = out_attr[i].i;
11539 static const char *name_table[] = {
11540 /* These aren't real CPU names, but we can't guess
11541 that from the architecture version alone. */
11542 "Pre v4",
11543 "ARM v4",
11544 "ARM v4T",
11545 "ARM v5T",
11546 "ARM v5TE",
11547 "ARM v5TEJ",
11548 "ARM v6",
11549 "ARM v6KZ",
11550 "ARM v6T2",
11551 "ARM v6K",
11552 "ARM v7",
11553 "ARM v6-M",
11554 "ARM v6S-M"
11555 };
11556
11557 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
11558 secondary_compat = get_secondary_compatible_arch (ibfd);
11559 secondary_compat_out = get_secondary_compatible_arch (obfd);
11560 out_attr[i].i = tag_cpu_arch_combine (ibfd, out_attr[i].i,
11561 &secondary_compat_out,
11562 in_attr[i].i,
11563 secondary_compat);
11564 set_secondary_compatible_arch (obfd, secondary_compat_out);
11565
11566 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
11567 if (out_attr[i].i == saved_out_attr)
11568 ; /* Leave the names alone. */
11569 else if (out_attr[i].i == in_attr[i].i)
11570 {
11571 /* The output architecture has been changed to match the
11572 input architecture. Use the input names. */
11573 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
11574 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
11575 : NULL;
11576 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
11577 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
11578 : NULL;
11579 }
11580 else
11581 {
11582 out_attr[Tag_CPU_name].s = NULL;
11583 out_attr[Tag_CPU_raw_name].s = NULL;
11584 }
11585
11586 /* If we still don't have a value for Tag_CPU_name,
11587 make one up now. Tag_CPU_raw_name remains blank. */
11588 if (out_attr[Tag_CPU_name].s == NULL
11589 && out_attr[i].i < ARRAY_SIZE (name_table))
11590 out_attr[Tag_CPU_name].s =
11591 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
11592 }
11593 break;
11594
11595 case Tag_ARM_ISA_use:
11596 case Tag_THUMB_ISA_use:
11597 case Tag_WMMX_arch:
11598 case Tag_Advanced_SIMD_arch:
11599 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
11600 case Tag_ABI_FP_rounding:
11601 case Tag_ABI_FP_exceptions:
11602 case Tag_ABI_FP_user_exceptions:
11603 case Tag_ABI_FP_number_model:
11604 case Tag_FP_HP_extension:
11605 case Tag_CPU_unaligned_access:
11606 case Tag_T2EE_use:
11607 case Tag_MPextension_use:
11608 /* Use the largest value specified. */
11609 if (in_attr[i].i > out_attr[i].i)
11610 out_attr[i].i = in_attr[i].i;
11611 break;
11612
11613 case Tag_ABI_align_preserved:
11614 case Tag_ABI_PCS_RO_data:
11615 /* Use the smallest value specified. */
11616 if (in_attr[i].i < out_attr[i].i)
11617 out_attr[i].i = in_attr[i].i;
11618 break;
11619
11620 case Tag_ABI_align_needed:
11621 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
11622 && (in_attr[Tag_ABI_align_preserved].i == 0
11623 || out_attr[Tag_ABI_align_preserved].i == 0))
11624 {
11625 /* This error message should be enabled once all non-conformant
11626 binaries in the toolchain have had the attributes set
11627 properly.
11628 _bfd_error_handler
11629 (_("error: %B: 8-byte data alignment conflicts with %B"),
11630 obfd, ibfd);
11631 result = FALSE; */
11632 }
11633 /* Fall through. */
11634 case Tag_ABI_FP_denormal:
11635 case Tag_ABI_PCS_GOT_use:
11636 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
11637 value if greater than 2 (for future-proofing). */
11638 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
11639 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
11640 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
11641 out_attr[i].i = in_attr[i].i;
11642 break;
11643
11644 case Tag_Virtualization_use:
11645 /* The virtualization tag effectively stores two bits of
11646 information: the intended use of TrustZone (in bit 0), and the
11647 intended use of Virtualization (in bit 1). */
11648 if (out_attr[i].i == 0)
11649 out_attr[i].i = in_attr[i].i;
11650 else if (in_attr[i].i != 0
11651 && in_attr[i].i != out_attr[i].i)
11652 {
11653 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
11654 out_attr[i].i = 3;
11655 else
11656 {
11657 _bfd_error_handler
11658 (_("error: %B: unable to merge virtualization attributes "
11659 "with %B"),
11660 obfd, ibfd);
11661 result = FALSE;
11662 }
11663 }
11664 break;
11665
11666 case Tag_CPU_arch_profile:
11667 if (out_attr[i].i != in_attr[i].i)
11668 {
11669 /* 0 will merge with anything.
11670 'A' and 'S' merge to 'A'.
11671 'R' and 'S' merge to 'R'.
11672 'M' and 'A|R|S' is an error. */
11673 if (out_attr[i].i == 0
11674 || (out_attr[i].i == 'S'
11675 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
11676 out_attr[i].i = in_attr[i].i;
11677 else if (in_attr[i].i == 0
11678 || (in_attr[i].i == 'S'
11679 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
11680 ; /* Do nothing. */
11681 else
11682 {
11683 _bfd_error_handler
11684 (_("error: %B: Conflicting architecture profiles %c/%c"),
11685 ibfd,
11686 in_attr[i].i ? in_attr[i].i : '0',
11687 out_attr[i].i ? out_attr[i].i : '0');
11688 result = FALSE;
11689 }
11690 }
11691 break;
11692 case Tag_FP_arch:
11693 {
11694 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
11695 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
11696 when it's 0. It might mean absence of FP hardware if
11697 Tag_FP_arch is zero, otherwise it is effectively SP + DP. */
11698
11699 static const struct
11700 {
11701 int ver;
11702 int regs;
11703 } vfp_versions[7] =
11704 {
11705 {0, 0},
11706 {1, 16},
11707 {2, 16},
11708 {3, 32},
11709 {3, 16},
11710 {4, 32},
11711 {4, 16}
11712 };
11713 int ver;
11714 int regs;
11715 int newval;
11716
11717 /* If the output has no requirement about FP hardware,
11718 follow the requirement of the input. */
11719 if (out_attr[i].i == 0)
11720 {
11721 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
11722 out_attr[i].i = in_attr[i].i;
11723 out_attr[Tag_ABI_HardFP_use].i
11724 = in_attr[Tag_ABI_HardFP_use].i;
11725 break;
11726 }
11727 /* If the input has no requirement about FP hardware, do
11728 nothing. */
11729 else if (in_attr[i].i == 0)
11730 {
11731 BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0);
11732 break;
11733 }
11734
11735 /* Both the input and the output have nonzero Tag_FP_arch.
11736 So Tag_ABI_HardFP_use is (SP & DP) when it's zero. */
11737
11738 /* If both the input and the output have zero Tag_ABI_HardFP_use,
11739 do nothing. */
11740 if (in_attr[Tag_ABI_HardFP_use].i == 0
11741 && out_attr[Tag_ABI_HardFP_use].i == 0)
11742 ;
11743 /* If the input and the output have different Tag_ABI_HardFP_use,
11744 the combination of them is 3 (SP & DP). */
11745 else if (in_attr[Tag_ABI_HardFP_use].i
11746 != out_attr[Tag_ABI_HardFP_use].i)
11747 out_attr[Tag_ABI_HardFP_use].i = 3;
11748
11749 /* Now we can handle Tag_FP_arch. */
11750
11751 /* Values greater than 6 aren't defined, so just pick the
11752 biggest */
11753 if (in_attr[i].i > 6 && in_attr[i].i > out_attr[i].i)
11754 {
11755 out_attr[i] = in_attr[i];
11756 break;
11757 }
11758 /* The output uses the superset of input features
11759 (ISA version) and registers. */
11760 ver = vfp_versions[in_attr[i].i].ver;
11761 if (ver < vfp_versions[out_attr[i].i].ver)
11762 ver = vfp_versions[out_attr[i].i].ver;
11763 regs = vfp_versions[in_attr[i].i].regs;
11764 if (regs < vfp_versions[out_attr[i].i].regs)
11765 regs = vfp_versions[out_attr[i].i].regs;
11766 /* This assumes all possible supersets are also a valid
11767 options. */
11768 for (newval = 6; newval > 0; newval--)
11769 {
11770 if (regs == vfp_versions[newval].regs
11771 && ver == vfp_versions[newval].ver)
11772 break;
11773 }
11774 out_attr[i].i = newval;
11775 }
11776 break;
11777 case Tag_PCS_config:
11778 if (out_attr[i].i == 0)
11779 out_attr[i].i = in_attr[i].i;
11780 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
11781 {
11782 /* It's sometimes ok to mix different configs, so this is only
11783 a warning. */
11784 _bfd_error_handler
11785 (_("Warning: %B: Conflicting platform configuration"), ibfd);
11786 }
11787 break;
11788 case Tag_ABI_PCS_R9_use:
11789 if (in_attr[i].i != out_attr[i].i
11790 && out_attr[i].i != AEABI_R9_unused
11791 && in_attr[i].i != AEABI_R9_unused)
11792 {
11793 _bfd_error_handler
11794 (_("error: %B: Conflicting use of R9"), ibfd);
11795 result = FALSE;
11796 }
11797 if (out_attr[i].i == AEABI_R9_unused)
11798 out_attr[i].i = in_attr[i].i;
11799 break;
11800 case Tag_ABI_PCS_RW_data:
11801 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
11802 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
11803 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
11804 {
11805 _bfd_error_handler
11806 (_("error: %B: SB relative addressing conflicts with use of R9"),
11807 ibfd);
11808 result = FALSE;
11809 }
11810 /* Use the smallest value specified. */
11811 if (in_attr[i].i < out_attr[i].i)
11812 out_attr[i].i = in_attr[i].i;
11813 break;
11814 case Tag_ABI_PCS_wchar_t:
11815 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
11816 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
11817 {
11818 _bfd_error_handler
11819 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
11820 ibfd, in_attr[i].i, out_attr[i].i);
11821 }
11822 else if (in_attr[i].i && !out_attr[i].i)
11823 out_attr[i].i = in_attr[i].i;
11824 break;
11825 case Tag_ABI_enum_size:
11826 if (in_attr[i].i != AEABI_enum_unused)
11827 {
11828 if (out_attr[i].i == AEABI_enum_unused
11829 || out_attr[i].i == AEABI_enum_forced_wide)
11830 {
11831 /* The existing object is compatible with anything.
11832 Use whatever requirements the new object has. */
11833 out_attr[i].i = in_attr[i].i;
11834 }
11835 else if (in_attr[i].i != AEABI_enum_forced_wide
11836 && out_attr[i].i != in_attr[i].i
11837 && !elf_arm_tdata (obfd)->no_enum_size_warning)
11838 {
11839 static const char *aeabi_enum_names[] =
11840 { "", "variable-size", "32-bit", "" };
11841 const char *in_name =
11842 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
11843 ? aeabi_enum_names[in_attr[i].i]
11844 : "<unknown>";
11845 const char *out_name =
11846 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
11847 ? aeabi_enum_names[out_attr[i].i]
11848 : "<unknown>";
11849 _bfd_error_handler
11850 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
11851 ibfd, in_name, out_name);
11852 }
11853 }
11854 break;
11855 case Tag_ABI_VFP_args:
11856 /* Aready done. */
11857 break;
11858 case Tag_ABI_WMMX_args:
11859 if (in_attr[i].i != out_attr[i].i)
11860 {
11861 _bfd_error_handler
11862 (_("error: %B uses iWMMXt register arguments, %B does not"),
11863 ibfd, obfd);
11864 result = FALSE;
11865 }
11866 break;
11867 case Tag_compatibility:
11868 /* Merged in target-independent code. */
11869 break;
11870 case Tag_ABI_HardFP_use:
11871 /* This is handled along with Tag_FP_arch. */
11872 break;
11873 case Tag_ABI_FP_16bit_format:
11874 if (in_attr[i].i != 0 && out_attr[i].i != 0)
11875 {
11876 if (in_attr[i].i != out_attr[i].i)
11877 {
11878 _bfd_error_handler
11879 (_("error: fp16 format mismatch between %B and %B"),
11880 ibfd, obfd);
11881 result = FALSE;
11882 }
11883 }
11884 if (in_attr[i].i != 0)
11885 out_attr[i].i = in_attr[i].i;
11886 break;
11887
11888 case Tag_DIV_use:
11889 /* A value of zero on input means that the divide instruction may
11890 be used if available in the base architecture as specified via
11891 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
11892 the user did not want divide instructions. A value of 2
11893 explicitly means that divide instructions were allowed in ARM
11894 and Thumb state. */
11895 if (in_attr[i].i == out_attr[i].i)
11896 /* Do nothing. */ ;
11897 else if (elf32_arm_attributes_forbid_div (in_attr)
11898 && !elf32_arm_attributes_accept_div (out_attr))
11899 out_attr[i].i = 1;
11900 else if (elf32_arm_attributes_forbid_div (out_attr)
11901 && elf32_arm_attributes_accept_div (in_attr))
11902 out_attr[i].i = in_attr[i].i;
11903 else if (in_attr[i].i == 2)
11904 out_attr[i].i = in_attr[i].i;
11905 break;
11906
11907 case Tag_MPextension_use_legacy:
11908 /* We don't output objects with Tag_MPextension_use_legacy - we
11909 move the value to Tag_MPextension_use. */
11910 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
11911 {
11912 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
11913 {
11914 _bfd_error_handler
11915 (_("%B has has both the current and legacy "
11916 "Tag_MPextension_use attributes"),
11917 ibfd);
11918 result = FALSE;
11919 }
11920 }
11921
11922 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
11923 out_attr[Tag_MPextension_use] = in_attr[i];
11924
11925 break;
11926
11927 case Tag_nodefaults:
11928 /* This tag is set if it exists, but the value is unused (and is
11929 typically zero). We don't actually need to do anything here -
11930 the merge happens automatically when the type flags are merged
11931 below. */
11932 break;
11933 case Tag_also_compatible_with:
11934 /* Already done in Tag_CPU_arch. */
11935 break;
11936 case Tag_conformance:
11937 /* Keep the attribute if it matches. Throw it away otherwise.
11938 No attribute means no claim to conform. */
11939 if (!in_attr[i].s || !out_attr[i].s
11940 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
11941 out_attr[i].s = NULL;
11942 break;
11943
11944 default:
11945 result
11946 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
11947 }
11948
11949 /* If out_attr was copied from in_attr then it won't have a type yet. */
11950 if (in_attr[i].type && !out_attr[i].type)
11951 out_attr[i].type = in_attr[i].type;
11952 }
11953
11954 /* Merge Tag_compatibility attributes and any common GNU ones. */
11955 if (!_bfd_elf_merge_object_attributes (ibfd, obfd))
11956 return FALSE;
11957
11958 /* Check for any attributes not known on ARM. */
11959 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
11960
11961 return result;
11962 }
11963
11964
11965 /* Return TRUE if the two EABI versions are incompatible. */
11966
11967 static bfd_boolean
11968 elf32_arm_versions_compatible (unsigned iver, unsigned over)
11969 {
11970 /* v4 and v5 are the same spec before and after it was released,
11971 so allow mixing them. */
11972 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
11973 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
11974 return TRUE;
11975
11976 return (iver == over);
11977 }
11978
11979 /* Merge backend specific data from an object file to the output
11980 object file when linking. */
11981
11982 static bfd_boolean
11983 elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd);
11984
11985 /* Display the flags field. */
11986
11987 static bfd_boolean
11988 elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
11989 {
11990 FILE * file = (FILE *) ptr;
11991 unsigned long flags;
11992
11993 BFD_ASSERT (abfd != NULL && ptr != NULL);
11994
11995 /* Print normal ELF private data. */
11996 _bfd_elf_print_private_bfd_data (abfd, ptr);
11997
11998 flags = elf_elfheader (abfd)->e_flags;
11999 /* Ignore init flag - it may not be set, despite the flags field
12000 containing valid data. */
12001
12002 /* xgettext:c-format */
12003 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
12004
12005 switch (EF_ARM_EABI_VERSION (flags))
12006 {
12007 case EF_ARM_EABI_UNKNOWN:
12008 /* The following flag bits are GNU extensions and not part of the
12009 official ARM ELF extended ABI. Hence they are only decoded if
12010 the EABI version is not set. */
12011 if (flags & EF_ARM_INTERWORK)
12012 fprintf (file, _(" [interworking enabled]"));
12013
12014 if (flags & EF_ARM_APCS_26)
12015 fprintf (file, " [APCS-26]");
12016 else
12017 fprintf (file, " [APCS-32]");
12018
12019 if (flags & EF_ARM_VFP_FLOAT)
12020 fprintf (file, _(" [VFP float format]"));
12021 else if (flags & EF_ARM_MAVERICK_FLOAT)
12022 fprintf (file, _(" [Maverick float format]"));
12023 else
12024 fprintf (file, _(" [FPA float format]"));
12025
12026 if (flags & EF_ARM_APCS_FLOAT)
12027 fprintf (file, _(" [floats passed in float registers]"));
12028
12029 if (flags & EF_ARM_PIC)
12030 fprintf (file, _(" [position independent]"));
12031
12032 if (flags & EF_ARM_NEW_ABI)
12033 fprintf (file, _(" [new ABI]"));
12034
12035 if (flags & EF_ARM_OLD_ABI)
12036 fprintf (file, _(" [old ABI]"));
12037
12038 if (flags & EF_ARM_SOFT_FLOAT)
12039 fprintf (file, _(" [software FP]"));
12040
12041 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
12042 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
12043 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
12044 | EF_ARM_MAVERICK_FLOAT);
12045 break;
12046
12047 case EF_ARM_EABI_VER1:
12048 fprintf (file, _(" [Version1 EABI]"));
12049
12050 if (flags & EF_ARM_SYMSARESORTED)
12051 fprintf (file, _(" [sorted symbol table]"));
12052 else
12053 fprintf (file, _(" [unsorted symbol table]"));
12054
12055 flags &= ~ EF_ARM_SYMSARESORTED;
12056 break;
12057
12058 case EF_ARM_EABI_VER2:
12059 fprintf (file, _(" [Version2 EABI]"));
12060
12061 if (flags & EF_ARM_SYMSARESORTED)
12062 fprintf (file, _(" [sorted symbol table]"));
12063 else
12064 fprintf (file, _(" [unsorted symbol table]"));
12065
12066 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
12067 fprintf (file, _(" [dynamic symbols use segment index]"));
12068
12069 if (flags & EF_ARM_MAPSYMSFIRST)
12070 fprintf (file, _(" [mapping symbols precede others]"));
12071
12072 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
12073 | EF_ARM_MAPSYMSFIRST);
12074 break;
12075
12076 case EF_ARM_EABI_VER3:
12077 fprintf (file, _(" [Version3 EABI]"));
12078 break;
12079
12080 case EF_ARM_EABI_VER4:
12081 fprintf (file, _(" [Version4 EABI]"));
12082 goto eabi;
12083
12084 case EF_ARM_EABI_VER5:
12085 fprintf (file, _(" [Version5 EABI]"));
12086 eabi:
12087 if (flags & EF_ARM_BE8)
12088 fprintf (file, _(" [BE8]"));
12089
12090 if (flags & EF_ARM_LE8)
12091 fprintf (file, _(" [LE8]"));
12092
12093 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
12094 break;
12095
12096 default:
12097 fprintf (file, _(" <EABI version unrecognised>"));
12098 break;
12099 }
12100
12101 flags &= ~ EF_ARM_EABIMASK;
12102
12103 if (flags & EF_ARM_RELEXEC)
12104 fprintf (file, _(" [relocatable executable]"));
12105
12106 if (flags & EF_ARM_HASENTRY)
12107 fprintf (file, _(" [has entry point]"));
12108
12109 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
12110
12111 if (flags)
12112 fprintf (file, _("<Unrecognised flag bits set>"));
12113
12114 fputc ('\n', file);
12115
12116 return TRUE;
12117 }
12118
12119 static int
12120 elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
12121 {
12122 switch (ELF_ST_TYPE (elf_sym->st_info))
12123 {
12124 case STT_ARM_TFUNC:
12125 return ELF_ST_TYPE (elf_sym->st_info);
12126
12127 case STT_ARM_16BIT:
12128 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
12129 This allows us to distinguish between data used by Thumb instructions
12130 and non-data (which is probably code) inside Thumb regions of an
12131 executable. */
12132 if (type != STT_OBJECT && type != STT_TLS)
12133 return ELF_ST_TYPE (elf_sym->st_info);
12134 break;
12135
12136 default:
12137 break;
12138 }
12139
12140 return type;
12141 }
12142
12143 static asection *
12144 elf32_arm_gc_mark_hook (asection *sec,
12145 struct bfd_link_info *info,
12146 Elf_Internal_Rela *rel,
12147 struct elf_link_hash_entry *h,
12148 Elf_Internal_Sym *sym)
12149 {
12150 if (h != NULL)
12151 switch (ELF32_R_TYPE (rel->r_info))
12152 {
12153 case R_ARM_GNU_VTINHERIT:
12154 case R_ARM_GNU_VTENTRY:
12155 return NULL;
12156 }
12157
12158 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
12159 }
12160
12161 /* Update the got entry reference counts for the section being removed. */
12162
12163 static bfd_boolean
12164 elf32_arm_gc_sweep_hook (bfd * abfd,
12165 struct bfd_link_info * info,
12166 asection * sec,
12167 const Elf_Internal_Rela * relocs)
12168 {
12169 Elf_Internal_Shdr *symtab_hdr;
12170 struct elf_link_hash_entry **sym_hashes;
12171 bfd_signed_vma *local_got_refcounts;
12172 const Elf_Internal_Rela *rel, *relend;
12173 struct elf32_arm_link_hash_table * globals;
12174
12175 if (info->relocatable)
12176 return TRUE;
12177
12178 globals = elf32_arm_hash_table (info);
12179 if (globals == NULL)
12180 return FALSE;
12181
12182 elf_section_data (sec)->local_dynrel = NULL;
12183
12184 symtab_hdr = & elf_symtab_hdr (abfd);
12185 sym_hashes = elf_sym_hashes (abfd);
12186 local_got_refcounts = elf_local_got_refcounts (abfd);
12187
12188 check_use_blx (globals);
12189
12190 relend = relocs + sec->reloc_count;
12191 for (rel = relocs; rel < relend; rel++)
12192 {
12193 unsigned long r_symndx;
12194 struct elf_link_hash_entry *h = NULL;
12195 struct elf32_arm_link_hash_entry *eh;
12196 int r_type;
12197 bfd_boolean call_reloc_p;
12198 bfd_boolean may_become_dynamic_p;
12199 bfd_boolean may_need_local_target_p;
12200 union gotplt_union *root_plt;
12201 struct arm_plt_info *arm_plt;
12202
12203 r_symndx = ELF32_R_SYM (rel->r_info);
12204 if (r_symndx >= symtab_hdr->sh_info)
12205 {
12206 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
12207 while (h->root.type == bfd_link_hash_indirect
12208 || h->root.type == bfd_link_hash_warning)
12209 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12210 }
12211 eh = (struct elf32_arm_link_hash_entry *) h;
12212
12213 call_reloc_p = FALSE;
12214 may_become_dynamic_p = FALSE;
12215 may_need_local_target_p = FALSE;
12216
12217 r_type = ELF32_R_TYPE (rel->r_info);
12218 r_type = arm_real_reloc_type (globals, r_type);
12219 switch (r_type)
12220 {
12221 case R_ARM_GOT32:
12222 case R_ARM_GOT_PREL:
12223 case R_ARM_TLS_GD32:
12224 case R_ARM_TLS_IE32:
12225 if (h != NULL)
12226 {
12227 if (h->got.refcount > 0)
12228 h->got.refcount -= 1;
12229 }
12230 else if (local_got_refcounts != NULL)
12231 {
12232 if (local_got_refcounts[r_symndx] > 0)
12233 local_got_refcounts[r_symndx] -= 1;
12234 }
12235 break;
12236
12237 case R_ARM_TLS_LDM32:
12238 globals->tls_ldm_got.refcount -= 1;
12239 break;
12240
12241 case R_ARM_PC24:
12242 case R_ARM_PLT32:
12243 case R_ARM_CALL:
12244 case R_ARM_JUMP24:
12245 case R_ARM_PREL31:
12246 case R_ARM_THM_CALL:
12247 case R_ARM_THM_JUMP24:
12248 case R_ARM_THM_JUMP19:
12249 call_reloc_p = TRUE;
12250 may_need_local_target_p = TRUE;
12251 break;
12252
12253 case R_ARM_ABS12:
12254 if (!globals->vxworks_p)
12255 {
12256 may_need_local_target_p = TRUE;
12257 break;
12258 }
12259 /* Fall through. */
12260 case R_ARM_ABS32:
12261 case R_ARM_ABS32_NOI:
12262 case R_ARM_REL32:
12263 case R_ARM_REL32_NOI:
12264 case R_ARM_MOVW_ABS_NC:
12265 case R_ARM_MOVT_ABS:
12266 case R_ARM_MOVW_PREL_NC:
12267 case R_ARM_MOVT_PREL:
12268 case R_ARM_THM_MOVW_ABS_NC:
12269 case R_ARM_THM_MOVT_ABS:
12270 case R_ARM_THM_MOVW_PREL_NC:
12271 case R_ARM_THM_MOVT_PREL:
12272 /* Should the interworking branches be here also? */
12273 if ((info->shared || globals->root.is_relocatable_executable)
12274 && (sec->flags & SEC_ALLOC) != 0)
12275 {
12276 if (h == NULL
12277 && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI))
12278 {
12279 call_reloc_p = TRUE;
12280 may_need_local_target_p = TRUE;
12281 }
12282 else
12283 may_become_dynamic_p = TRUE;
12284 }
12285 else
12286 may_need_local_target_p = TRUE;
12287 break;
12288
12289 default:
12290 break;
12291 }
12292
12293 if (may_need_local_target_p
12294 && elf32_arm_get_plt_info (abfd, eh, r_symndx, &root_plt, &arm_plt))
12295 {
12296 /* If PLT refcount book-keeping is wrong and too low, we'll
12297 see a zero value (going to -1) for the root PLT reference
12298 count. */
12299 if (root_plt->refcount >= 0)
12300 {
12301 BFD_ASSERT (root_plt->refcount != 0);
12302 root_plt->refcount -= 1;
12303 }
12304 else
12305 /* A value of -1 means the symbol has become local, forced
12306 or seeing a hidden definition. Any other negative value
12307 is an error. */
12308 BFD_ASSERT (root_plt->refcount == -1);
12309
12310 if (!call_reloc_p)
12311 arm_plt->noncall_refcount--;
12312
12313 if (r_type == R_ARM_THM_CALL)
12314 arm_plt->maybe_thumb_refcount--;
12315
12316 if (r_type == R_ARM_THM_JUMP24
12317 || r_type == R_ARM_THM_JUMP19)
12318 arm_plt->thumb_refcount--;
12319 }
12320
12321 if (may_become_dynamic_p)
12322 {
12323 struct elf_dyn_relocs **pp;
12324 struct elf_dyn_relocs *p;
12325
12326 if (h != NULL)
12327 pp = &(eh->dyn_relocs);
12328 else
12329 {
12330 Elf_Internal_Sym *isym;
12331
12332 isym = bfd_sym_from_r_symndx (&globals->sym_cache,
12333 abfd, r_symndx);
12334 if (isym == NULL)
12335 return FALSE;
12336 pp = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
12337 if (pp == NULL)
12338 return FALSE;
12339 }
12340 for (; (p = *pp) != NULL; pp = &p->next)
12341 if (p->sec == sec)
12342 {
12343 /* Everything must go for SEC. */
12344 *pp = p->next;
12345 break;
12346 }
12347 }
12348 }
12349
12350 return TRUE;
12351 }
12352
12353 /* Look through the relocs for a section during the first phase. */
12354
12355 static bfd_boolean
12356 elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
12357 asection *sec, const Elf_Internal_Rela *relocs)
12358 {
12359 Elf_Internal_Shdr *symtab_hdr;
12360 struct elf_link_hash_entry **sym_hashes;
12361 const Elf_Internal_Rela *rel;
12362 const Elf_Internal_Rela *rel_end;
12363 bfd *dynobj;
12364 asection *sreloc;
12365 struct elf32_arm_link_hash_table *htab;
12366 bfd_boolean call_reloc_p;
12367 bfd_boolean may_become_dynamic_p;
12368 bfd_boolean may_need_local_target_p;
12369 unsigned long nsyms;
12370
12371 if (info->relocatable)
12372 return TRUE;
12373
12374 BFD_ASSERT (is_arm_elf (abfd));
12375
12376 htab = elf32_arm_hash_table (info);
12377 if (htab == NULL)
12378 return FALSE;
12379
12380 sreloc = NULL;
12381
12382 /* Create dynamic sections for relocatable executables so that we can
12383 copy relocations. */
12384 if (htab->root.is_relocatable_executable
12385 && ! htab->root.dynamic_sections_created)
12386 {
12387 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
12388 return FALSE;
12389 }
12390
12391 if (htab->root.dynobj == NULL)
12392 htab->root.dynobj = abfd;
12393 if (!create_ifunc_sections (info))
12394 return FALSE;
12395
12396 dynobj = htab->root.dynobj;
12397
12398 symtab_hdr = & elf_symtab_hdr (abfd);
12399 sym_hashes = elf_sym_hashes (abfd);
12400 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
12401
12402 rel_end = relocs + sec->reloc_count;
12403 for (rel = relocs; rel < rel_end; rel++)
12404 {
12405 Elf_Internal_Sym *isym;
12406 struct elf_link_hash_entry *h;
12407 struct elf32_arm_link_hash_entry *eh;
12408 unsigned long r_symndx;
12409 int r_type;
12410
12411 r_symndx = ELF32_R_SYM (rel->r_info);
12412 r_type = ELF32_R_TYPE (rel->r_info);
12413 r_type = arm_real_reloc_type (htab, r_type);
12414
12415 if (r_symndx >= nsyms
12416 /* PR 9934: It is possible to have relocations that do not
12417 refer to symbols, thus it is also possible to have an
12418 object file containing relocations but no symbol table. */
12419 && (r_symndx > STN_UNDEF || nsyms > 0))
12420 {
12421 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
12422 r_symndx);
12423 return FALSE;
12424 }
12425
12426 h = NULL;
12427 isym = NULL;
12428 if (nsyms > 0)
12429 {
12430 if (r_symndx < symtab_hdr->sh_info)
12431 {
12432 /* A local symbol. */
12433 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
12434 abfd, r_symndx);
12435 if (isym == NULL)
12436 return FALSE;
12437 }
12438 else
12439 {
12440 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
12441 while (h->root.type == bfd_link_hash_indirect
12442 || h->root.type == bfd_link_hash_warning)
12443 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12444 }
12445 }
12446
12447 eh = (struct elf32_arm_link_hash_entry *) h;
12448
12449 call_reloc_p = FALSE;
12450 may_become_dynamic_p = FALSE;
12451 may_need_local_target_p = FALSE;
12452
12453 /* Could be done earlier, if h were already available. */
12454 r_type = elf32_arm_tls_transition (info, r_type, h);
12455 switch (r_type)
12456 {
12457 case R_ARM_GOT32:
12458 case R_ARM_GOT_PREL:
12459 case R_ARM_TLS_GD32:
12460 case R_ARM_TLS_IE32:
12461 case R_ARM_TLS_GOTDESC:
12462 case R_ARM_TLS_DESCSEQ:
12463 case R_ARM_THM_TLS_DESCSEQ:
12464 case R_ARM_TLS_CALL:
12465 case R_ARM_THM_TLS_CALL:
12466 /* This symbol requires a global offset table entry. */
12467 {
12468 int tls_type, old_tls_type;
12469
12470 switch (r_type)
12471 {
12472 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
12473
12474 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
12475
12476 case R_ARM_TLS_GOTDESC:
12477 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
12478 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
12479 tls_type = GOT_TLS_GDESC; break;
12480
12481 default: tls_type = GOT_NORMAL; break;
12482 }
12483
12484 if (h != NULL)
12485 {
12486 h->got.refcount++;
12487 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
12488 }
12489 else
12490 {
12491 /* This is a global offset table entry for a local symbol. */
12492 if (!elf32_arm_allocate_local_sym_info (abfd))
12493 return FALSE;
12494 elf_local_got_refcounts (abfd)[r_symndx] += 1;
12495 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
12496 }
12497
12498 /* If a variable is accessed with both tls methods, two
12499 slots may be created. */
12500 if (GOT_TLS_GD_ANY_P (old_tls_type)
12501 && GOT_TLS_GD_ANY_P (tls_type))
12502 tls_type |= old_tls_type;
12503
12504 /* We will already have issued an error message if there
12505 is a TLS/non-TLS mismatch, based on the symbol
12506 type. So just combine any TLS types needed. */
12507 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
12508 && tls_type != GOT_NORMAL)
12509 tls_type |= old_tls_type;
12510
12511 /* If the symbol is accessed in both IE and GDESC
12512 method, we're able to relax. Turn off the GDESC flag,
12513 without messing up with any other kind of tls types
12514 that may be involved */
12515 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
12516 tls_type &= ~GOT_TLS_GDESC;
12517
12518 if (old_tls_type != tls_type)
12519 {
12520 if (h != NULL)
12521 elf32_arm_hash_entry (h)->tls_type = tls_type;
12522 else
12523 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
12524 }
12525 }
12526 /* Fall through. */
12527
12528 case R_ARM_TLS_LDM32:
12529 if (r_type == R_ARM_TLS_LDM32)
12530 htab->tls_ldm_got.refcount++;
12531 /* Fall through. */
12532
12533 case R_ARM_GOTOFF32:
12534 case R_ARM_GOTPC:
12535 if (htab->root.sgot == NULL
12536 && !create_got_section (htab->root.dynobj, info))
12537 return FALSE;
12538 break;
12539
12540 case R_ARM_PC24:
12541 case R_ARM_PLT32:
12542 case R_ARM_CALL:
12543 case R_ARM_JUMP24:
12544 case R_ARM_PREL31:
12545 case R_ARM_THM_CALL:
12546 case R_ARM_THM_JUMP24:
12547 case R_ARM_THM_JUMP19:
12548 call_reloc_p = TRUE;
12549 may_need_local_target_p = TRUE;
12550 break;
12551
12552 case R_ARM_ABS12:
12553 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
12554 ldr __GOTT_INDEX__ offsets. */
12555 if (!htab->vxworks_p)
12556 {
12557 may_need_local_target_p = TRUE;
12558 break;
12559 }
12560 /* Fall through. */
12561
12562 case R_ARM_MOVW_ABS_NC:
12563 case R_ARM_MOVT_ABS:
12564 case R_ARM_THM_MOVW_ABS_NC:
12565 case R_ARM_THM_MOVT_ABS:
12566 if (info->shared)
12567 {
12568 (*_bfd_error_handler)
12569 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
12570 abfd, elf32_arm_howto_table_1[r_type].name,
12571 (h) ? h->root.root.string : "a local symbol");
12572 bfd_set_error (bfd_error_bad_value);
12573 return FALSE;
12574 }
12575
12576 /* Fall through. */
12577 case R_ARM_ABS32:
12578 case R_ARM_ABS32_NOI:
12579 case R_ARM_REL32:
12580 case R_ARM_REL32_NOI:
12581 case R_ARM_MOVW_PREL_NC:
12582 case R_ARM_MOVT_PREL:
12583 case R_ARM_THM_MOVW_PREL_NC:
12584 case R_ARM_THM_MOVT_PREL:
12585
12586 /* Should the interworking branches be listed here? */
12587 if ((info->shared || htab->root.is_relocatable_executable)
12588 && (sec->flags & SEC_ALLOC) != 0)
12589 {
12590 if (h == NULL
12591 && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI))
12592 {
12593 /* In shared libraries and relocatable executables,
12594 we treat local relative references as calls;
12595 see the related SYMBOL_CALLS_LOCAL code in
12596 allocate_dynrelocs. */
12597 call_reloc_p = TRUE;
12598 may_need_local_target_p = TRUE;
12599 }
12600 else
12601 /* We are creating a shared library or relocatable
12602 executable, and this is a reloc against a global symbol,
12603 or a non-PC-relative reloc against a local symbol.
12604 We may need to copy the reloc into the output. */
12605 may_become_dynamic_p = TRUE;
12606 }
12607 else
12608 may_need_local_target_p = TRUE;
12609 break;
12610
12611 /* This relocation describes the C++ object vtable hierarchy.
12612 Reconstruct it for later use during GC. */
12613 case R_ARM_GNU_VTINHERIT:
12614 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
12615 return FALSE;
12616 break;
12617
12618 /* This relocation describes which C++ vtable entries are actually
12619 used. Record for later use during GC. */
12620 case R_ARM_GNU_VTENTRY:
12621 BFD_ASSERT (h != NULL);
12622 if (h != NULL
12623 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
12624 return FALSE;
12625 break;
12626 }
12627
12628 if (h != NULL)
12629 {
12630 if (call_reloc_p)
12631 /* We may need a .plt entry if the function this reloc
12632 refers to is in a different object, regardless of the
12633 symbol's type. We can't tell for sure yet, because
12634 something later might force the symbol local. */
12635 h->needs_plt = 1;
12636 else if (may_need_local_target_p)
12637 /* If this reloc is in a read-only section, we might
12638 need a copy reloc. We can't check reliably at this
12639 stage whether the section is read-only, as input
12640 sections have not yet been mapped to output sections.
12641 Tentatively set the flag for now, and correct in
12642 adjust_dynamic_symbol. */
12643 h->non_got_ref = 1;
12644 }
12645
12646 if (may_need_local_target_p
12647 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
12648 {
12649 union gotplt_union *root_plt;
12650 struct arm_plt_info *arm_plt;
12651 struct arm_local_iplt_info *local_iplt;
12652
12653 if (h != NULL)
12654 {
12655 root_plt = &h->plt;
12656 arm_plt = &eh->plt;
12657 }
12658 else
12659 {
12660 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
12661 if (local_iplt == NULL)
12662 return FALSE;
12663 root_plt = &local_iplt->root;
12664 arm_plt = &local_iplt->arm;
12665 }
12666
12667 /* If the symbol is a function that doesn't bind locally,
12668 this relocation will need a PLT entry. */
12669 root_plt->refcount += 1;
12670
12671 if (!call_reloc_p)
12672 arm_plt->noncall_refcount++;
12673
12674 /* It's too early to use htab->use_blx here, so we have to
12675 record possible blx references separately from
12676 relocs that definitely need a thumb stub. */
12677
12678 if (r_type == R_ARM_THM_CALL)
12679 arm_plt->maybe_thumb_refcount += 1;
12680
12681 if (r_type == R_ARM_THM_JUMP24
12682 || r_type == R_ARM_THM_JUMP19)
12683 arm_plt->thumb_refcount += 1;
12684 }
12685
12686 if (may_become_dynamic_p)
12687 {
12688 struct elf_dyn_relocs *p, **head;
12689
12690 /* Create a reloc section in dynobj. */
12691 if (sreloc == NULL)
12692 {
12693 sreloc = _bfd_elf_make_dynamic_reloc_section
12694 (sec, dynobj, 2, abfd, ! htab->use_rel);
12695
12696 if (sreloc == NULL)
12697 return FALSE;
12698
12699 /* BPABI objects never have dynamic relocations mapped. */
12700 if (htab->symbian_p)
12701 {
12702 flagword flags;
12703
12704 flags = bfd_get_section_flags (dynobj, sreloc);
12705 flags &= ~(SEC_LOAD | SEC_ALLOC);
12706 bfd_set_section_flags (dynobj, sreloc, flags);
12707 }
12708 }
12709
12710 /* If this is a global symbol, count the number of
12711 relocations we need for this symbol. */
12712 if (h != NULL)
12713 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
12714 else
12715 {
12716 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
12717 if (head == NULL)
12718 return FALSE;
12719 }
12720
12721 p = *head;
12722 if (p == NULL || p->sec != sec)
12723 {
12724 bfd_size_type amt = sizeof *p;
12725
12726 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
12727 if (p == NULL)
12728 return FALSE;
12729 p->next = *head;
12730 *head = p;
12731 p->sec = sec;
12732 p->count = 0;
12733 p->pc_count = 0;
12734 }
12735
12736 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
12737 p->pc_count += 1;
12738 p->count += 1;
12739 }
12740 }
12741
12742 return TRUE;
12743 }
12744
12745 /* Unwinding tables are not referenced directly. This pass marks them as
12746 required if the corresponding code section is marked. */
12747
12748 static bfd_boolean
12749 elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
12750 elf_gc_mark_hook_fn gc_mark_hook)
12751 {
12752 bfd *sub;
12753 Elf_Internal_Shdr **elf_shdrp;
12754 bfd_boolean again;
12755
12756 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
12757
12758 /* Marking EH data may cause additional code sections to be marked,
12759 requiring multiple passes. */
12760 again = TRUE;
12761 while (again)
12762 {
12763 again = FALSE;
12764 for (sub = info->input_bfds; sub != NULL; sub = sub->link_next)
12765 {
12766 asection *o;
12767
12768 if (! is_arm_elf (sub))
12769 continue;
12770
12771 elf_shdrp = elf_elfsections (sub);
12772 for (o = sub->sections; o != NULL; o = o->next)
12773 {
12774 Elf_Internal_Shdr *hdr;
12775
12776 hdr = &elf_section_data (o)->this_hdr;
12777 if (hdr->sh_type == SHT_ARM_EXIDX
12778 && hdr->sh_link
12779 && hdr->sh_link < elf_numsections (sub)
12780 && !o->gc_mark
12781 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
12782 {
12783 again = TRUE;
12784 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
12785 return FALSE;
12786 }
12787 }
12788 }
12789 }
12790
12791 return TRUE;
12792 }
12793
12794 /* Treat mapping symbols as special target symbols. */
12795
12796 static bfd_boolean
12797 elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
12798 {
12799 return bfd_is_arm_special_symbol_name (sym->name,
12800 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
12801 }
12802
12803 /* This is a copy of elf_find_function() from elf.c except that
12804 ARM mapping symbols are ignored when looking for function names
12805 and STT_ARM_TFUNC is considered to a function type. */
12806
12807 static bfd_boolean
12808 arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
12809 asection * section,
12810 asymbol ** symbols,
12811 bfd_vma offset,
12812 const char ** filename_ptr,
12813 const char ** functionname_ptr)
12814 {
12815 const char * filename = NULL;
12816 asymbol * func = NULL;
12817 bfd_vma low_func = 0;
12818 asymbol ** p;
12819
12820 for (p = symbols; *p != NULL; p++)
12821 {
12822 elf_symbol_type *q;
12823
12824 q = (elf_symbol_type *) *p;
12825
12826 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
12827 {
12828 default:
12829 break;
12830 case STT_FILE:
12831 filename = bfd_asymbol_name (&q->symbol);
12832 break;
12833 case STT_FUNC:
12834 case STT_ARM_TFUNC:
12835 case STT_NOTYPE:
12836 /* Skip mapping symbols. */
12837 if ((q->symbol.flags & BSF_LOCAL)
12838 && bfd_is_arm_special_symbol_name (q->symbol.name,
12839 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
12840 continue;
12841 /* Fall through. */
12842 if (bfd_get_section (&q->symbol) == section
12843 && q->symbol.value >= low_func
12844 && q->symbol.value <= offset)
12845 {
12846 func = (asymbol *) q;
12847 low_func = q->symbol.value;
12848 }
12849 break;
12850 }
12851 }
12852
12853 if (func == NULL)
12854 return FALSE;
12855
12856 if (filename_ptr)
12857 *filename_ptr = filename;
12858 if (functionname_ptr)
12859 *functionname_ptr = bfd_asymbol_name (func);
12860
12861 return TRUE;
12862 }
12863
12864
12865 /* Find the nearest line to a particular section and offset, for error
12866 reporting. This code is a duplicate of the code in elf.c, except
12867 that it uses arm_elf_find_function. */
12868
12869 static bfd_boolean
12870 elf32_arm_find_nearest_line (bfd * abfd,
12871 asection * section,
12872 asymbol ** symbols,
12873 bfd_vma offset,
12874 const char ** filename_ptr,
12875 const char ** functionname_ptr,
12876 unsigned int * line_ptr)
12877 {
12878 bfd_boolean found = FALSE;
12879
12880 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
12881
12882 if (_bfd_dwarf2_find_nearest_line (abfd, dwarf_debug_sections,
12883 section, symbols, offset,
12884 filename_ptr, functionname_ptr,
12885 line_ptr, 0,
12886 & elf_tdata (abfd)->dwarf2_find_line_info))
12887 {
12888 if (!*functionname_ptr)
12889 arm_elf_find_function (abfd, section, symbols, offset,
12890 *filename_ptr ? NULL : filename_ptr,
12891 functionname_ptr);
12892
12893 return TRUE;
12894 }
12895
12896 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
12897 & found, filename_ptr,
12898 functionname_ptr, line_ptr,
12899 & elf_tdata (abfd)->line_info))
12900 return FALSE;
12901
12902 if (found && (*functionname_ptr || *line_ptr))
12903 return TRUE;
12904
12905 if (symbols == NULL)
12906 return FALSE;
12907
12908 if (! arm_elf_find_function (abfd, section, symbols, offset,
12909 filename_ptr, functionname_ptr))
12910 return FALSE;
12911
12912 *line_ptr = 0;
12913 return TRUE;
12914 }
12915
12916 static bfd_boolean
12917 elf32_arm_find_inliner_info (bfd * abfd,
12918 const char ** filename_ptr,
12919 const char ** functionname_ptr,
12920 unsigned int * line_ptr)
12921 {
12922 bfd_boolean found;
12923 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
12924 functionname_ptr, line_ptr,
12925 & elf_tdata (abfd)->dwarf2_find_line_info);
12926 return found;
12927 }
12928
12929 /* Adjust a symbol defined by a dynamic object and referenced by a
12930 regular object. The current definition is in some section of the
12931 dynamic object, but we're not including those sections. We have to
12932 change the definition to something the rest of the link can
12933 understand. */
12934
12935 static bfd_boolean
12936 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
12937 struct elf_link_hash_entry * h)
12938 {
12939 bfd * dynobj;
12940 asection * s;
12941 struct elf32_arm_link_hash_entry * eh;
12942 struct elf32_arm_link_hash_table *globals;
12943
12944 globals = elf32_arm_hash_table (info);
12945 if (globals == NULL)
12946 return FALSE;
12947
12948 dynobj = elf_hash_table (info)->dynobj;
12949
12950 /* Make sure we know what is going on here. */
12951 BFD_ASSERT (dynobj != NULL
12952 && (h->needs_plt
12953 || h->type == STT_GNU_IFUNC
12954 || h->u.weakdef != NULL
12955 || (h->def_dynamic
12956 && h->ref_regular
12957 && !h->def_regular)));
12958
12959 eh = (struct elf32_arm_link_hash_entry *) h;
12960
12961 /* If this is a function, put it in the procedure linkage table. We
12962 will fill in the contents of the procedure linkage table later,
12963 when we know the address of the .got section. */
12964 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
12965 {
12966 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
12967 symbol binds locally. */
12968 if (h->plt.refcount <= 0
12969 || (h->type != STT_GNU_IFUNC
12970 && (SYMBOL_CALLS_LOCAL (info, h)
12971 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
12972 && h->root.type == bfd_link_hash_undefweak))))
12973 {
12974 /* This case can occur if we saw a PLT32 reloc in an input
12975 file, but the symbol was never referred to by a dynamic
12976 object, or if all references were garbage collected. In
12977 such a case, we don't actually need to build a procedure
12978 linkage table, and we can just do a PC24 reloc instead. */
12979 h->plt.offset = (bfd_vma) -1;
12980 eh->plt.thumb_refcount = 0;
12981 eh->plt.maybe_thumb_refcount = 0;
12982 eh->plt.noncall_refcount = 0;
12983 h->needs_plt = 0;
12984 }
12985
12986 return TRUE;
12987 }
12988 else
12989 {
12990 /* It's possible that we incorrectly decided a .plt reloc was
12991 needed for an R_ARM_PC24 or similar reloc to a non-function sym
12992 in check_relocs. We can't decide accurately between function
12993 and non-function syms in check-relocs; Objects loaded later in
12994 the link may change h->type. So fix it now. */
12995 h->plt.offset = (bfd_vma) -1;
12996 eh->plt.thumb_refcount = 0;
12997 eh->plt.maybe_thumb_refcount = 0;
12998 eh->plt.noncall_refcount = 0;
12999 }
13000
13001 /* If this is a weak symbol, and there is a real definition, the
13002 processor independent code will have arranged for us to see the
13003 real definition first, and we can just use the same value. */
13004 if (h->u.weakdef != NULL)
13005 {
13006 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
13007 || h->u.weakdef->root.type == bfd_link_hash_defweak);
13008 h->root.u.def.section = h->u.weakdef->root.u.def.section;
13009 h->root.u.def.value = h->u.weakdef->root.u.def.value;
13010 return TRUE;
13011 }
13012
13013 /* If there are no non-GOT references, we do not need a copy
13014 relocation. */
13015 if (!h->non_got_ref)
13016 return TRUE;
13017
13018 /* This is a reference to a symbol defined by a dynamic object which
13019 is not a function. */
13020
13021 /* If we are creating a shared library, we must presume that the
13022 only references to the symbol are via the global offset table.
13023 For such cases we need not do anything here; the relocations will
13024 be handled correctly by relocate_section. Relocatable executables
13025 can reference data in shared objects directly, so we don't need to
13026 do anything here. */
13027 if (info->shared || globals->root.is_relocatable_executable)
13028 return TRUE;
13029
13030 /* We must allocate the symbol in our .dynbss section, which will
13031 become part of the .bss section of the executable. There will be
13032 an entry for this symbol in the .dynsym section. The dynamic
13033 object will contain position independent code, so all references
13034 from the dynamic object to this symbol will go through the global
13035 offset table. The dynamic linker will use the .dynsym entry to
13036 determine the address it must put in the global offset table, so
13037 both the dynamic object and the regular object will refer to the
13038 same memory location for the variable. */
13039 s = bfd_get_section_by_name (dynobj, ".dynbss");
13040 BFD_ASSERT (s != NULL);
13041
13042 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
13043 copy the initial value out of the dynamic object and into the
13044 runtime process image. We need to remember the offset into the
13045 .rel(a).bss section we are going to use. */
13046 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0 && h->size != 0)
13047 {
13048 asection *srel;
13049
13050 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (globals, ".bss"));
13051 elf32_arm_allocate_dynrelocs (info, srel, 1);
13052 h->needs_copy = 1;
13053 }
13054
13055 return _bfd_elf_adjust_dynamic_copy (h, s);
13056 }
13057
13058 /* Allocate space in .plt, .got and associated reloc sections for
13059 dynamic relocs. */
13060
13061 static bfd_boolean
13062 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
13063 {
13064 struct bfd_link_info *info;
13065 struct elf32_arm_link_hash_table *htab;
13066 struct elf32_arm_link_hash_entry *eh;
13067 struct elf_dyn_relocs *p;
13068
13069 if (h->root.type == bfd_link_hash_indirect)
13070 return TRUE;
13071
13072 eh = (struct elf32_arm_link_hash_entry *) h;
13073
13074 info = (struct bfd_link_info *) inf;
13075 htab = elf32_arm_hash_table (info);
13076 if (htab == NULL)
13077 return FALSE;
13078
13079 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
13080 && h->plt.refcount > 0)
13081 {
13082 /* Make sure this symbol is output as a dynamic symbol.
13083 Undefined weak syms won't yet be marked as dynamic. */
13084 if (h->dynindx == -1
13085 && !h->forced_local)
13086 {
13087 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13088 return FALSE;
13089 }
13090
13091 /* If the call in the PLT entry binds locally, the associated
13092 GOT entry should use an R_ARM_IRELATIVE relocation instead of
13093 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
13094 than the .plt section. */
13095 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
13096 {
13097 eh->is_iplt = 1;
13098 if (eh->plt.noncall_refcount == 0
13099 && SYMBOL_REFERENCES_LOCAL (info, h))
13100 /* All non-call references can be resolved directly.
13101 This means that they can (and in some cases, must)
13102 resolve directly to the run-time target, rather than
13103 to the PLT. That in turns means that any .got entry
13104 would be equal to the .igot.plt entry, so there's
13105 no point having both. */
13106 h->got.refcount = 0;
13107 }
13108
13109 if (info->shared
13110 || eh->is_iplt
13111 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
13112 {
13113 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
13114
13115 /* If this symbol is not defined in a regular file, and we are
13116 not generating a shared library, then set the symbol to this
13117 location in the .plt. This is required to make function
13118 pointers compare as equal between the normal executable and
13119 the shared library. */
13120 if (! info->shared
13121 && !h->def_regular)
13122 {
13123 h->root.u.def.section = htab->root.splt;
13124 h->root.u.def.value = h->plt.offset;
13125
13126 /* Make sure the function is not marked as Thumb, in case
13127 it is the target of an ABS32 relocation, which will
13128 point to the PLT entry. */
13129 h->target_internal = ST_BRANCH_TO_ARM;
13130 }
13131
13132 htab->next_tls_desc_index++;
13133
13134 /* VxWorks executables have a second set of relocations for
13135 each PLT entry. They go in a separate relocation section,
13136 which is processed by the kernel loader. */
13137 if (htab->vxworks_p && !info->shared)
13138 {
13139 /* There is a relocation for the initial PLT entry:
13140 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
13141 if (h->plt.offset == htab->plt_header_size)
13142 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
13143
13144 /* There are two extra relocations for each subsequent
13145 PLT entry: an R_ARM_32 relocation for the GOT entry,
13146 and an R_ARM_32 relocation for the PLT entry. */
13147 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
13148 }
13149 }
13150 else
13151 {
13152 h->plt.offset = (bfd_vma) -1;
13153 h->needs_plt = 0;
13154 }
13155 }
13156 else
13157 {
13158 h->plt.offset = (bfd_vma) -1;
13159 h->needs_plt = 0;
13160 }
13161
13162 eh = (struct elf32_arm_link_hash_entry *) h;
13163 eh->tlsdesc_got = (bfd_vma) -1;
13164
13165 if (h->got.refcount > 0)
13166 {
13167 asection *s;
13168 bfd_boolean dyn;
13169 int tls_type = elf32_arm_hash_entry (h)->tls_type;
13170 int indx;
13171
13172 /* Make sure this symbol is output as a dynamic symbol.
13173 Undefined weak syms won't yet be marked as dynamic. */
13174 if (h->dynindx == -1
13175 && !h->forced_local)
13176 {
13177 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13178 return FALSE;
13179 }
13180
13181 if (!htab->symbian_p)
13182 {
13183 s = htab->root.sgot;
13184 h->got.offset = s->size;
13185
13186 if (tls_type == GOT_UNKNOWN)
13187 abort ();
13188
13189 if (tls_type == GOT_NORMAL)
13190 /* Non-TLS symbols need one GOT slot. */
13191 s->size += 4;
13192 else
13193 {
13194 if (tls_type & GOT_TLS_GDESC)
13195 {
13196 /* R_ARM_TLS_DESC needs 2 GOT slots. */
13197 eh->tlsdesc_got
13198 = (htab->root.sgotplt->size
13199 - elf32_arm_compute_jump_table_size (htab));
13200 htab->root.sgotplt->size += 8;
13201 h->got.offset = (bfd_vma) -2;
13202 /* plt.got_offset needs to know there's a TLS_DESC
13203 reloc in the middle of .got.plt. */
13204 htab->num_tls_desc++;
13205 }
13206
13207 if (tls_type & GOT_TLS_GD)
13208 {
13209 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
13210 the symbol is both GD and GDESC, got.offset may
13211 have been overwritten. */
13212 h->got.offset = s->size;
13213 s->size += 8;
13214 }
13215
13216 if (tls_type & GOT_TLS_IE)
13217 /* R_ARM_TLS_IE32 needs one GOT slot. */
13218 s->size += 4;
13219 }
13220
13221 dyn = htab->root.dynamic_sections_created;
13222
13223 indx = 0;
13224 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
13225 && (!info->shared
13226 || !SYMBOL_REFERENCES_LOCAL (info, h)))
13227 indx = h->dynindx;
13228
13229 if (tls_type != GOT_NORMAL
13230 && (info->shared || indx != 0)
13231 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
13232 || h->root.type != bfd_link_hash_undefweak))
13233 {
13234 if (tls_type & GOT_TLS_IE)
13235 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13236
13237 if (tls_type & GOT_TLS_GD)
13238 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13239
13240 if (tls_type & GOT_TLS_GDESC)
13241 {
13242 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
13243 /* GDESC needs a trampoline to jump to. */
13244 htab->tls_trampoline = -1;
13245 }
13246
13247 /* Only GD needs it. GDESC just emits one relocation per
13248 2 entries. */
13249 if ((tls_type & GOT_TLS_GD) && indx != 0)
13250 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13251 }
13252 else if (!SYMBOL_REFERENCES_LOCAL (info, h))
13253 {
13254 if (htab->root.dynamic_sections_created)
13255 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
13256 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13257 }
13258 else if (h->type == STT_GNU_IFUNC
13259 && eh->plt.noncall_refcount == 0)
13260 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
13261 they all resolve dynamically instead. Reserve room for the
13262 GOT entry's R_ARM_IRELATIVE relocation. */
13263 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
13264 else if (info->shared)
13265 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
13266 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13267 }
13268 }
13269 else
13270 h->got.offset = (bfd_vma) -1;
13271
13272 /* Allocate stubs for exported Thumb functions on v4t. */
13273 if (!htab->use_blx && h->dynindx != -1
13274 && h->def_regular
13275 && h->target_internal == ST_BRANCH_TO_THUMB
13276 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
13277 {
13278 struct elf_link_hash_entry * th;
13279 struct bfd_link_hash_entry * bh;
13280 struct elf_link_hash_entry * myh;
13281 char name[1024];
13282 asection *s;
13283 bh = NULL;
13284 /* Create a new symbol to regist the real location of the function. */
13285 s = h->root.u.def.section;
13286 sprintf (name, "__real_%s", h->root.root.string);
13287 _bfd_generic_link_add_one_symbol (info, s->owner,
13288 name, BSF_GLOBAL, s,
13289 h->root.u.def.value,
13290 NULL, TRUE, FALSE, &bh);
13291
13292 myh = (struct elf_link_hash_entry *) bh;
13293 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
13294 myh->forced_local = 1;
13295 myh->target_internal = ST_BRANCH_TO_THUMB;
13296 eh->export_glue = myh;
13297 th = record_arm_to_thumb_glue (info, h);
13298 /* Point the symbol at the stub. */
13299 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
13300 h->target_internal = ST_BRANCH_TO_ARM;
13301 h->root.u.def.section = th->root.u.def.section;
13302 h->root.u.def.value = th->root.u.def.value & ~1;
13303 }
13304
13305 if (eh->dyn_relocs == NULL)
13306 return TRUE;
13307
13308 /* In the shared -Bsymbolic case, discard space allocated for
13309 dynamic pc-relative relocs against symbols which turn out to be
13310 defined in regular objects. For the normal shared case, discard
13311 space for pc-relative relocs that have become local due to symbol
13312 visibility changes. */
13313
13314 if (info->shared || htab->root.is_relocatable_executable)
13315 {
13316 /* The only relocs that use pc_count are R_ARM_REL32 and
13317 R_ARM_REL32_NOI, which will appear on something like
13318 ".long foo - .". We want calls to protected symbols to resolve
13319 directly to the function rather than going via the plt. If people
13320 want function pointer comparisons to work as expected then they
13321 should avoid writing assembly like ".long foo - .". */
13322 if (SYMBOL_CALLS_LOCAL (info, h))
13323 {
13324 struct elf_dyn_relocs **pp;
13325
13326 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
13327 {
13328 p->count -= p->pc_count;
13329 p->pc_count = 0;
13330 if (p->count == 0)
13331 *pp = p->next;
13332 else
13333 pp = &p->next;
13334 }
13335 }
13336
13337 if (htab->vxworks_p)
13338 {
13339 struct elf_dyn_relocs **pp;
13340
13341 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
13342 {
13343 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
13344 *pp = p->next;
13345 else
13346 pp = &p->next;
13347 }
13348 }
13349
13350 /* Also discard relocs on undefined weak syms with non-default
13351 visibility. */
13352 if (eh->dyn_relocs != NULL
13353 && h->root.type == bfd_link_hash_undefweak)
13354 {
13355 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
13356 eh->dyn_relocs = NULL;
13357
13358 /* Make sure undefined weak symbols are output as a dynamic
13359 symbol in PIEs. */
13360 else if (h->dynindx == -1
13361 && !h->forced_local)
13362 {
13363 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13364 return FALSE;
13365 }
13366 }
13367
13368 else if (htab->root.is_relocatable_executable && h->dynindx == -1
13369 && h->root.type == bfd_link_hash_new)
13370 {
13371 /* Output absolute symbols so that we can create relocations
13372 against them. For normal symbols we output a relocation
13373 against the section that contains them. */
13374 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13375 return FALSE;
13376 }
13377
13378 }
13379 else
13380 {
13381 /* For the non-shared case, discard space for relocs against
13382 symbols which turn out to need copy relocs or are not
13383 dynamic. */
13384
13385 if (!h->non_got_ref
13386 && ((h->def_dynamic
13387 && !h->def_regular)
13388 || (htab->root.dynamic_sections_created
13389 && (h->root.type == bfd_link_hash_undefweak
13390 || h->root.type == bfd_link_hash_undefined))))
13391 {
13392 /* Make sure this symbol is output as a dynamic symbol.
13393 Undefined weak syms won't yet be marked as dynamic. */
13394 if (h->dynindx == -1
13395 && !h->forced_local)
13396 {
13397 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13398 return FALSE;
13399 }
13400
13401 /* If that succeeded, we know we'll be keeping all the
13402 relocs. */
13403 if (h->dynindx != -1)
13404 goto keep;
13405 }
13406
13407 eh->dyn_relocs = NULL;
13408
13409 keep: ;
13410 }
13411
13412 /* Finally, allocate space. */
13413 for (p = eh->dyn_relocs; p != NULL; p = p->next)
13414 {
13415 asection *sreloc = elf_section_data (p->sec)->sreloc;
13416 if (h->type == STT_GNU_IFUNC
13417 && eh->plt.noncall_refcount == 0
13418 && SYMBOL_REFERENCES_LOCAL (info, h))
13419 elf32_arm_allocate_irelocs (info, sreloc, p->count);
13420 else
13421 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
13422 }
13423
13424 return TRUE;
13425 }
13426
13427 /* Find any dynamic relocs that apply to read-only sections. */
13428
13429 static bfd_boolean
13430 elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
13431 {
13432 struct elf32_arm_link_hash_entry * eh;
13433 struct elf_dyn_relocs * p;
13434
13435 eh = (struct elf32_arm_link_hash_entry *) h;
13436 for (p = eh->dyn_relocs; p != NULL; p = p->next)
13437 {
13438 asection *s = p->sec;
13439
13440 if (s != NULL && (s->flags & SEC_READONLY) != 0)
13441 {
13442 struct bfd_link_info *info = (struct bfd_link_info *) inf;
13443
13444 info->flags |= DF_TEXTREL;
13445
13446 /* Not an error, just cut short the traversal. */
13447 return FALSE;
13448 }
13449 }
13450 return TRUE;
13451 }
13452
13453 void
13454 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
13455 int byteswap_code)
13456 {
13457 struct elf32_arm_link_hash_table *globals;
13458
13459 globals = elf32_arm_hash_table (info);
13460 if (globals == NULL)
13461 return;
13462
13463 globals->byteswap_code = byteswap_code;
13464 }
13465
13466 /* Set the sizes of the dynamic sections. */
13467
13468 static bfd_boolean
13469 elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
13470 struct bfd_link_info * info)
13471 {
13472 bfd * dynobj;
13473 asection * s;
13474 bfd_boolean plt;
13475 bfd_boolean relocs;
13476 bfd *ibfd;
13477 struct elf32_arm_link_hash_table *htab;
13478
13479 htab = elf32_arm_hash_table (info);
13480 if (htab == NULL)
13481 return FALSE;
13482
13483 dynobj = elf_hash_table (info)->dynobj;
13484 BFD_ASSERT (dynobj != NULL);
13485 check_use_blx (htab);
13486
13487 if (elf_hash_table (info)->dynamic_sections_created)
13488 {
13489 /* Set the contents of the .interp section to the interpreter. */
13490 if (info->executable)
13491 {
13492 s = bfd_get_section_by_name (dynobj, ".interp");
13493 BFD_ASSERT (s != NULL);
13494 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
13495 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
13496 }
13497 }
13498
13499 /* Set up .got offsets for local syms, and space for local dynamic
13500 relocs. */
13501 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
13502 {
13503 bfd_signed_vma *local_got;
13504 bfd_signed_vma *end_local_got;
13505 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
13506 char *local_tls_type;
13507 bfd_vma *local_tlsdesc_gotent;
13508 bfd_size_type locsymcount;
13509 Elf_Internal_Shdr *symtab_hdr;
13510 asection *srel;
13511 bfd_boolean is_vxworks = htab->vxworks_p;
13512 unsigned int symndx;
13513
13514 if (! is_arm_elf (ibfd))
13515 continue;
13516
13517 for (s = ibfd->sections; s != NULL; s = s->next)
13518 {
13519 struct elf_dyn_relocs *p;
13520
13521 for (p = (struct elf_dyn_relocs *)
13522 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
13523 {
13524 if (!bfd_is_abs_section (p->sec)
13525 && bfd_is_abs_section (p->sec->output_section))
13526 {
13527 /* Input section has been discarded, either because
13528 it is a copy of a linkonce section or due to
13529 linker script /DISCARD/, so we'll be discarding
13530 the relocs too. */
13531 }
13532 else if (is_vxworks
13533 && strcmp (p->sec->output_section->name,
13534 ".tls_vars") == 0)
13535 {
13536 /* Relocations in vxworks .tls_vars sections are
13537 handled specially by the loader. */
13538 }
13539 else if (p->count != 0)
13540 {
13541 srel = elf_section_data (p->sec)->sreloc;
13542 elf32_arm_allocate_dynrelocs (info, srel, p->count);
13543 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
13544 info->flags |= DF_TEXTREL;
13545 }
13546 }
13547 }
13548
13549 local_got = elf_local_got_refcounts (ibfd);
13550 if (!local_got)
13551 continue;
13552
13553 symtab_hdr = & elf_symtab_hdr (ibfd);
13554 locsymcount = symtab_hdr->sh_info;
13555 end_local_got = local_got + locsymcount;
13556 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
13557 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
13558 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
13559 symndx = 0;
13560 s = htab->root.sgot;
13561 srel = htab->root.srelgot;
13562 for (; local_got < end_local_got;
13563 ++local_got, ++local_iplt_ptr, ++local_tls_type,
13564 ++local_tlsdesc_gotent, ++symndx)
13565 {
13566 *local_tlsdesc_gotent = (bfd_vma) -1;
13567 local_iplt = *local_iplt_ptr;
13568 if (local_iplt != NULL)
13569 {
13570 struct elf_dyn_relocs *p;
13571
13572 if (local_iplt->root.refcount > 0)
13573 {
13574 elf32_arm_allocate_plt_entry (info, TRUE,
13575 &local_iplt->root,
13576 &local_iplt->arm);
13577 if (local_iplt->arm.noncall_refcount == 0)
13578 /* All references to the PLT are calls, so all
13579 non-call references can resolve directly to the
13580 run-time target. This means that the .got entry
13581 would be the same as the .igot.plt entry, so there's
13582 no point creating both. */
13583 *local_got = 0;
13584 }
13585 else
13586 {
13587 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
13588 local_iplt->root.offset = (bfd_vma) -1;
13589 }
13590
13591 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
13592 {
13593 asection *psrel;
13594
13595 psrel = elf_section_data (p->sec)->sreloc;
13596 if (local_iplt->arm.noncall_refcount == 0)
13597 elf32_arm_allocate_irelocs (info, psrel, p->count);
13598 else
13599 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
13600 }
13601 }
13602 if (*local_got > 0)
13603 {
13604 Elf_Internal_Sym *isym;
13605
13606 *local_got = s->size;
13607 if (*local_tls_type & GOT_TLS_GD)
13608 /* TLS_GD relocs need an 8-byte structure in the GOT. */
13609 s->size += 8;
13610 if (*local_tls_type & GOT_TLS_GDESC)
13611 {
13612 *local_tlsdesc_gotent = htab->root.sgotplt->size
13613 - elf32_arm_compute_jump_table_size (htab);
13614 htab->root.sgotplt->size += 8;
13615 *local_got = (bfd_vma) -2;
13616 /* plt.got_offset needs to know there's a TLS_DESC
13617 reloc in the middle of .got.plt. */
13618 htab->num_tls_desc++;
13619 }
13620 if (*local_tls_type & GOT_TLS_IE)
13621 s->size += 4;
13622
13623 if (*local_tls_type & GOT_NORMAL)
13624 {
13625 /* If the symbol is both GD and GDESC, *local_got
13626 may have been overwritten. */
13627 *local_got = s->size;
13628 s->size += 4;
13629 }
13630
13631 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
13632 if (isym == NULL)
13633 return FALSE;
13634
13635 /* If all references to an STT_GNU_IFUNC PLT are calls,
13636 then all non-call references, including this GOT entry,
13637 resolve directly to the run-time target. */
13638 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
13639 && (local_iplt == NULL
13640 || local_iplt->arm.noncall_refcount == 0))
13641 elf32_arm_allocate_irelocs (info, srel, 1);
13642 else if ((info->shared && !(*local_tls_type & GOT_TLS_GDESC))
13643 || *local_tls_type & GOT_TLS_GD)
13644 elf32_arm_allocate_dynrelocs (info, srel, 1);
13645
13646 if (info->shared && *local_tls_type & GOT_TLS_GDESC)
13647 {
13648 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
13649 htab->tls_trampoline = -1;
13650 }
13651 }
13652 else
13653 *local_got = (bfd_vma) -1;
13654 }
13655 }
13656
13657 if (htab->tls_ldm_got.refcount > 0)
13658 {
13659 /* Allocate two GOT entries and one dynamic relocation (if necessary)
13660 for R_ARM_TLS_LDM32 relocations. */
13661 htab->tls_ldm_got.offset = htab->root.sgot->size;
13662 htab->root.sgot->size += 8;
13663 if (info->shared)
13664 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13665 }
13666 else
13667 htab->tls_ldm_got.offset = -1;
13668
13669 /* Allocate global sym .plt and .got entries, and space for global
13670 sym dynamic relocs. */
13671 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
13672
13673 /* Here we rummage through the found bfds to collect glue information. */
13674 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
13675 {
13676 if (! is_arm_elf (ibfd))
13677 continue;
13678
13679 /* Initialise mapping tables for code/data. */
13680 bfd_elf32_arm_init_maps (ibfd);
13681
13682 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
13683 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
13684 /* xgettext:c-format */
13685 _bfd_error_handler (_("Errors encountered processing file %s"),
13686 ibfd->filename);
13687 }
13688
13689 /* Allocate space for the glue sections now that we've sized them. */
13690 bfd_elf32_arm_allocate_interworking_sections (info);
13691
13692 /* For every jump slot reserved in the sgotplt, reloc_count is
13693 incremented. However, when we reserve space for TLS descriptors,
13694 it's not incremented, so in order to compute the space reserved
13695 for them, it suffices to multiply the reloc count by the jump
13696 slot size. */
13697 if (htab->root.srelplt)
13698 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
13699
13700 if (htab->tls_trampoline)
13701 {
13702 if (htab->root.splt->size == 0)
13703 htab->root.splt->size += htab->plt_header_size;
13704
13705 htab->tls_trampoline = htab->root.splt->size;
13706 htab->root.splt->size += htab->plt_entry_size;
13707
13708 /* If we're not using lazy TLS relocations, don't generate the
13709 PLT and GOT entries they require. */
13710 if (!(info->flags & DF_BIND_NOW))
13711 {
13712 htab->dt_tlsdesc_got = htab->root.sgot->size;
13713 htab->root.sgot->size += 4;
13714
13715 htab->dt_tlsdesc_plt = htab->root.splt->size;
13716 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
13717 }
13718 }
13719
13720 /* The check_relocs and adjust_dynamic_symbol entry points have
13721 determined the sizes of the various dynamic sections. Allocate
13722 memory for them. */
13723 plt = FALSE;
13724 relocs = FALSE;
13725 for (s = dynobj->sections; s != NULL; s = s->next)
13726 {
13727 const char * name;
13728
13729 if ((s->flags & SEC_LINKER_CREATED) == 0)
13730 continue;
13731
13732 /* It's OK to base decisions on the section name, because none
13733 of the dynobj section names depend upon the input files. */
13734 name = bfd_get_section_name (dynobj, s);
13735
13736 if (s == htab->root.splt)
13737 {
13738 /* Remember whether there is a PLT. */
13739 plt = s->size != 0;
13740 }
13741 else if (CONST_STRNEQ (name, ".rel"))
13742 {
13743 if (s->size != 0)
13744 {
13745 /* Remember whether there are any reloc sections other
13746 than .rel(a).plt and .rela.plt.unloaded. */
13747 if (s != htab->root.srelplt && s != htab->srelplt2)
13748 relocs = TRUE;
13749
13750 /* We use the reloc_count field as a counter if we need
13751 to copy relocs into the output file. */
13752 s->reloc_count = 0;
13753 }
13754 }
13755 else if (s != htab->root.sgot
13756 && s != htab->root.sgotplt
13757 && s != htab->root.iplt
13758 && s != htab->root.igotplt
13759 && s != htab->sdynbss)
13760 {
13761 /* It's not one of our sections, so don't allocate space. */
13762 continue;
13763 }
13764
13765 if (s->size == 0)
13766 {
13767 /* If we don't need this section, strip it from the
13768 output file. This is mostly to handle .rel(a).bss and
13769 .rel(a).plt. We must create both sections in
13770 create_dynamic_sections, because they must be created
13771 before the linker maps input sections to output
13772 sections. The linker does that before
13773 adjust_dynamic_symbol is called, and it is that
13774 function which decides whether anything needs to go
13775 into these sections. */
13776 s->flags |= SEC_EXCLUDE;
13777 continue;
13778 }
13779
13780 if ((s->flags & SEC_HAS_CONTENTS) == 0)
13781 continue;
13782
13783 /* Allocate memory for the section contents. */
13784 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
13785 if (s->contents == NULL)
13786 return FALSE;
13787 }
13788
13789 if (elf_hash_table (info)->dynamic_sections_created)
13790 {
13791 /* Add some entries to the .dynamic section. We fill in the
13792 values later, in elf32_arm_finish_dynamic_sections, but we
13793 must add the entries now so that we get the correct size for
13794 the .dynamic section. The DT_DEBUG entry is filled in by the
13795 dynamic linker and used by the debugger. */
13796 #define add_dynamic_entry(TAG, VAL) \
13797 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
13798
13799 if (info->executable)
13800 {
13801 if (!add_dynamic_entry (DT_DEBUG, 0))
13802 return FALSE;
13803 }
13804
13805 if (plt)
13806 {
13807 if ( !add_dynamic_entry (DT_PLTGOT, 0)
13808 || !add_dynamic_entry (DT_PLTRELSZ, 0)
13809 || !add_dynamic_entry (DT_PLTREL,
13810 htab->use_rel ? DT_REL : DT_RELA)
13811 || !add_dynamic_entry (DT_JMPREL, 0))
13812 return FALSE;
13813
13814 if (htab->dt_tlsdesc_plt &&
13815 (!add_dynamic_entry (DT_TLSDESC_PLT,0)
13816 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
13817 return FALSE;
13818 }
13819
13820 if (relocs)
13821 {
13822 if (htab->use_rel)
13823 {
13824 if (!add_dynamic_entry (DT_REL, 0)
13825 || !add_dynamic_entry (DT_RELSZ, 0)
13826 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
13827 return FALSE;
13828 }
13829 else
13830 {
13831 if (!add_dynamic_entry (DT_RELA, 0)
13832 || !add_dynamic_entry (DT_RELASZ, 0)
13833 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
13834 return FALSE;
13835 }
13836 }
13837
13838 /* If any dynamic relocs apply to a read-only section,
13839 then we need a DT_TEXTREL entry. */
13840 if ((info->flags & DF_TEXTREL) == 0)
13841 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
13842 info);
13843
13844 if ((info->flags & DF_TEXTREL) != 0)
13845 {
13846 if (!add_dynamic_entry (DT_TEXTREL, 0))
13847 return FALSE;
13848 }
13849 if (htab->vxworks_p
13850 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
13851 return FALSE;
13852 }
13853 #undef add_dynamic_entry
13854
13855 return TRUE;
13856 }
13857
13858 /* Size sections even though they're not dynamic. We use it to setup
13859 _TLS_MODULE_BASE_, if needed. */
13860
13861 static bfd_boolean
13862 elf32_arm_always_size_sections (bfd *output_bfd,
13863 struct bfd_link_info *info)
13864 {
13865 asection *tls_sec;
13866
13867 if (info->relocatable)
13868 return TRUE;
13869
13870 tls_sec = elf_hash_table (info)->tls_sec;
13871
13872 if (tls_sec)
13873 {
13874 struct elf_link_hash_entry *tlsbase;
13875
13876 tlsbase = elf_link_hash_lookup
13877 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
13878
13879 if (tlsbase)
13880 {
13881 struct bfd_link_hash_entry *bh = NULL;
13882 const struct elf_backend_data *bed
13883 = get_elf_backend_data (output_bfd);
13884
13885 if (!(_bfd_generic_link_add_one_symbol
13886 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
13887 tls_sec, 0, NULL, FALSE,
13888 bed->collect, &bh)))
13889 return FALSE;
13890
13891 tlsbase->type = STT_TLS;
13892 tlsbase = (struct elf_link_hash_entry *)bh;
13893 tlsbase->def_regular = 1;
13894 tlsbase->other = STV_HIDDEN;
13895 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
13896 }
13897 }
13898 return TRUE;
13899 }
13900
13901 /* Finish up dynamic symbol handling. We set the contents of various
13902 dynamic sections here. */
13903
13904 static bfd_boolean
13905 elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
13906 struct bfd_link_info * info,
13907 struct elf_link_hash_entry * h,
13908 Elf_Internal_Sym * sym)
13909 {
13910 struct elf32_arm_link_hash_table *htab;
13911 struct elf32_arm_link_hash_entry *eh;
13912
13913 htab = elf32_arm_hash_table (info);
13914 if (htab == NULL)
13915 return FALSE;
13916
13917 eh = (struct elf32_arm_link_hash_entry *) h;
13918
13919 if (h->plt.offset != (bfd_vma) -1)
13920 {
13921 if (!eh->is_iplt)
13922 {
13923 BFD_ASSERT (h->dynindx != -1);
13924 elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
13925 h->dynindx, 0);
13926 }
13927
13928 if (!h->def_regular)
13929 {
13930 /* Mark the symbol as undefined, rather than as defined in
13931 the .plt section. Leave the value alone. */
13932 sym->st_shndx = SHN_UNDEF;
13933 /* If the symbol is weak, we do need to clear the value.
13934 Otherwise, the PLT entry would provide a definition for
13935 the symbol even if the symbol wasn't defined anywhere,
13936 and so the symbol would never be NULL. */
13937 if (!h->ref_regular_nonweak)
13938 sym->st_value = 0;
13939 }
13940 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
13941 {
13942 /* At least one non-call relocation references this .iplt entry,
13943 so the .iplt entry is the function's canonical address. */
13944 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
13945 sym->st_target_internal = ST_BRANCH_TO_ARM;
13946 sym->st_shndx = (_bfd_elf_section_from_bfd_section
13947 (output_bfd, htab->root.iplt->output_section));
13948 sym->st_value = (h->plt.offset
13949 + htab->root.iplt->output_section->vma
13950 + htab->root.iplt->output_offset);
13951 }
13952 }
13953
13954 if (h->needs_copy)
13955 {
13956 asection * s;
13957 Elf_Internal_Rela rel;
13958
13959 /* This symbol needs a copy reloc. Set it up. */
13960 BFD_ASSERT (h->dynindx != -1
13961 && (h->root.type == bfd_link_hash_defined
13962 || h->root.type == bfd_link_hash_defweak));
13963
13964 s = htab->srelbss;
13965 BFD_ASSERT (s != NULL);
13966
13967 rel.r_addend = 0;
13968 rel.r_offset = (h->root.u.def.value
13969 + h->root.u.def.section->output_section->vma
13970 + h->root.u.def.section->output_offset);
13971 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
13972 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
13973 }
13974
13975 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
13976 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
13977 to the ".got" section. */
13978 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
13979 || (!htab->vxworks_p && h == htab->root.hgot))
13980 sym->st_shndx = SHN_ABS;
13981
13982 return TRUE;
13983 }
13984
13985 static void
13986 arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
13987 void *contents,
13988 const unsigned long *template, unsigned count)
13989 {
13990 unsigned ix;
13991
13992 for (ix = 0; ix != count; ix++)
13993 {
13994 unsigned long insn = template[ix];
13995
13996 /* Emit mov pc,rx if bx is not permitted. */
13997 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
13998 insn = (insn & 0xf000000f) | 0x01a0f000;
13999 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
14000 }
14001 }
14002
14003 /* Finish up the dynamic sections. */
14004
14005 static bfd_boolean
14006 elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
14007 {
14008 bfd * dynobj;
14009 asection * sgot;
14010 asection * sdyn;
14011 struct elf32_arm_link_hash_table *htab;
14012
14013 htab = elf32_arm_hash_table (info);
14014 if (htab == NULL)
14015 return FALSE;
14016
14017 dynobj = elf_hash_table (info)->dynobj;
14018
14019 sgot = htab->root.sgotplt;
14020 /* A broken linker script might have discarded the dynamic sections.
14021 Catch this here so that we do not seg-fault later on. */
14022 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
14023 return FALSE;
14024 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
14025
14026 if (elf_hash_table (info)->dynamic_sections_created)
14027 {
14028 asection *splt;
14029 Elf32_External_Dyn *dyncon, *dynconend;
14030
14031 splt = htab->root.splt;
14032 BFD_ASSERT (splt != NULL && sdyn != NULL);
14033 BFD_ASSERT (htab->symbian_p || sgot != NULL);
14034
14035 dyncon = (Elf32_External_Dyn *) sdyn->contents;
14036 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
14037
14038 for (; dyncon < dynconend; dyncon++)
14039 {
14040 Elf_Internal_Dyn dyn;
14041 const char * name;
14042 asection * s;
14043
14044 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
14045
14046 switch (dyn.d_tag)
14047 {
14048 unsigned int type;
14049
14050 default:
14051 if (htab->vxworks_p
14052 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
14053 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14054 break;
14055
14056 case DT_HASH:
14057 name = ".hash";
14058 goto get_vma_if_bpabi;
14059 case DT_STRTAB:
14060 name = ".dynstr";
14061 goto get_vma_if_bpabi;
14062 case DT_SYMTAB:
14063 name = ".dynsym";
14064 goto get_vma_if_bpabi;
14065 case DT_VERSYM:
14066 name = ".gnu.version";
14067 goto get_vma_if_bpabi;
14068 case DT_VERDEF:
14069 name = ".gnu.version_d";
14070 goto get_vma_if_bpabi;
14071 case DT_VERNEED:
14072 name = ".gnu.version_r";
14073 goto get_vma_if_bpabi;
14074
14075 case DT_PLTGOT:
14076 name = ".got";
14077 goto get_vma;
14078 case DT_JMPREL:
14079 name = RELOC_SECTION (htab, ".plt");
14080 get_vma:
14081 s = bfd_get_section_by_name (output_bfd, name);
14082 BFD_ASSERT (s != NULL);
14083 if (!htab->symbian_p)
14084 dyn.d_un.d_ptr = s->vma;
14085 else
14086 /* In the BPABI, tags in the PT_DYNAMIC section point
14087 at the file offset, not the memory address, for the
14088 convenience of the post linker. */
14089 dyn.d_un.d_ptr = s->filepos;
14090 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14091 break;
14092
14093 get_vma_if_bpabi:
14094 if (htab->symbian_p)
14095 goto get_vma;
14096 break;
14097
14098 case DT_PLTRELSZ:
14099 s = htab->root.srelplt;
14100 BFD_ASSERT (s != NULL);
14101 dyn.d_un.d_val = s->size;
14102 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14103 break;
14104
14105 case DT_RELSZ:
14106 case DT_RELASZ:
14107 if (!htab->symbian_p)
14108 {
14109 /* My reading of the SVR4 ABI indicates that the
14110 procedure linkage table relocs (DT_JMPREL) should be
14111 included in the overall relocs (DT_REL). This is
14112 what Solaris does. However, UnixWare can not handle
14113 that case. Therefore, we override the DT_RELSZ entry
14114 here to make it not include the JMPREL relocs. Since
14115 the linker script arranges for .rel(a).plt to follow all
14116 other relocation sections, we don't have to worry
14117 about changing the DT_REL entry. */
14118 s = htab->root.srelplt;
14119 if (s != NULL)
14120 dyn.d_un.d_val -= s->size;
14121 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14122 break;
14123 }
14124 /* Fall through. */
14125
14126 case DT_REL:
14127 case DT_RELA:
14128 /* In the BPABI, the DT_REL tag must point at the file
14129 offset, not the VMA, of the first relocation
14130 section. So, we use code similar to that in
14131 elflink.c, but do not check for SHF_ALLOC on the
14132 relcoation section, since relocations sections are
14133 never allocated under the BPABI. The comments above
14134 about Unixware notwithstanding, we include all of the
14135 relocations here. */
14136 if (htab->symbian_p)
14137 {
14138 unsigned int i;
14139 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
14140 ? SHT_REL : SHT_RELA);
14141 dyn.d_un.d_val = 0;
14142 for (i = 1; i < elf_numsections (output_bfd); i++)
14143 {
14144 Elf_Internal_Shdr *hdr
14145 = elf_elfsections (output_bfd)[i];
14146 if (hdr->sh_type == type)
14147 {
14148 if (dyn.d_tag == DT_RELSZ
14149 || dyn.d_tag == DT_RELASZ)
14150 dyn.d_un.d_val += hdr->sh_size;
14151 else if ((ufile_ptr) hdr->sh_offset
14152 <= dyn.d_un.d_val - 1)
14153 dyn.d_un.d_val = hdr->sh_offset;
14154 }
14155 }
14156 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14157 }
14158 break;
14159
14160 case DT_TLSDESC_PLT:
14161 s = htab->root.splt;
14162 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
14163 + htab->dt_tlsdesc_plt);
14164 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14165 break;
14166
14167 case DT_TLSDESC_GOT:
14168 s = htab->root.sgot;
14169 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
14170 + htab->dt_tlsdesc_got);
14171 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14172 break;
14173
14174 /* Set the bottom bit of DT_INIT/FINI if the
14175 corresponding function is Thumb. */
14176 case DT_INIT:
14177 name = info->init_function;
14178 goto get_sym;
14179 case DT_FINI:
14180 name = info->fini_function;
14181 get_sym:
14182 /* If it wasn't set by elf_bfd_final_link
14183 then there is nothing to adjust. */
14184 if (dyn.d_un.d_val != 0)
14185 {
14186 struct elf_link_hash_entry * eh;
14187
14188 eh = elf_link_hash_lookup (elf_hash_table (info), name,
14189 FALSE, FALSE, TRUE);
14190 if (eh != NULL && eh->target_internal == ST_BRANCH_TO_THUMB)
14191 {
14192 dyn.d_un.d_val |= 1;
14193 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14194 }
14195 }
14196 break;
14197 }
14198 }
14199
14200 /* Fill in the first entry in the procedure linkage table. */
14201 if (splt->size > 0 && htab->plt_header_size)
14202 {
14203 const bfd_vma *plt0_entry;
14204 bfd_vma got_address, plt_address, got_displacement;
14205
14206 /* Calculate the addresses of the GOT and PLT. */
14207 got_address = sgot->output_section->vma + sgot->output_offset;
14208 plt_address = splt->output_section->vma + splt->output_offset;
14209
14210 if (htab->vxworks_p)
14211 {
14212 /* The VxWorks GOT is relocated by the dynamic linker.
14213 Therefore, we must emit relocations rather than simply
14214 computing the values now. */
14215 Elf_Internal_Rela rel;
14216
14217 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
14218 put_arm_insn (htab, output_bfd, plt0_entry[0],
14219 splt->contents + 0);
14220 put_arm_insn (htab, output_bfd, plt0_entry[1],
14221 splt->contents + 4);
14222 put_arm_insn (htab, output_bfd, plt0_entry[2],
14223 splt->contents + 8);
14224 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
14225
14226 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
14227 rel.r_offset = plt_address + 12;
14228 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
14229 rel.r_addend = 0;
14230 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
14231 htab->srelplt2->contents);
14232 }
14233 else if (htab->nacl_p)
14234 {
14235 unsigned int i;
14236
14237 got_displacement = got_address + 8 - (plt_address + 16);
14238
14239 put_arm_insn (htab, output_bfd,
14240 elf32_arm_nacl_plt0_entry[0]
14241 | arm_movw_immediate (got_displacement),
14242 splt->contents + 0);
14243 put_arm_insn (htab, output_bfd,
14244 elf32_arm_nacl_plt0_entry[1]
14245 | arm_movt_immediate (got_displacement),
14246 splt->contents + 4);
14247 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
14248 put_arm_insn (htab, output_bfd,
14249 elf32_arm_nacl_plt0_entry[i],
14250 splt->contents + (i * 4));
14251 }
14252 else
14253 {
14254 got_displacement = got_address - (plt_address + 16);
14255
14256 plt0_entry = elf32_arm_plt0_entry;
14257 put_arm_insn (htab, output_bfd, plt0_entry[0],
14258 splt->contents + 0);
14259 put_arm_insn (htab, output_bfd, plt0_entry[1],
14260 splt->contents + 4);
14261 put_arm_insn (htab, output_bfd, plt0_entry[2],
14262 splt->contents + 8);
14263 put_arm_insn (htab, output_bfd, plt0_entry[3],
14264 splt->contents + 12);
14265
14266 #ifdef FOUR_WORD_PLT
14267 /* The displacement value goes in the otherwise-unused
14268 last word of the second entry. */
14269 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
14270 #else
14271 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
14272 #endif
14273 }
14274 }
14275
14276 /* UnixWare sets the entsize of .plt to 4, although that doesn't
14277 really seem like the right value. */
14278 if (splt->output_section->owner == output_bfd)
14279 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
14280
14281 if (htab->dt_tlsdesc_plt)
14282 {
14283 bfd_vma got_address
14284 = sgot->output_section->vma + sgot->output_offset;
14285 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
14286 + htab->root.sgot->output_offset);
14287 bfd_vma plt_address
14288 = splt->output_section->vma + splt->output_offset;
14289
14290 arm_put_trampoline (htab, output_bfd,
14291 splt->contents + htab->dt_tlsdesc_plt,
14292 dl_tlsdesc_lazy_trampoline, 6);
14293
14294 bfd_put_32 (output_bfd,
14295 gotplt_address + htab->dt_tlsdesc_got
14296 - (plt_address + htab->dt_tlsdesc_plt)
14297 - dl_tlsdesc_lazy_trampoline[6],
14298 splt->contents + htab->dt_tlsdesc_plt + 24);
14299 bfd_put_32 (output_bfd,
14300 got_address - (plt_address + htab->dt_tlsdesc_plt)
14301 - dl_tlsdesc_lazy_trampoline[7],
14302 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
14303 }
14304
14305 if (htab->tls_trampoline)
14306 {
14307 arm_put_trampoline (htab, output_bfd,
14308 splt->contents + htab->tls_trampoline,
14309 tls_trampoline, 3);
14310 #ifdef FOUR_WORD_PLT
14311 bfd_put_32 (output_bfd, 0x00000000,
14312 splt->contents + htab->tls_trampoline + 12);
14313 #endif
14314 }
14315
14316 if (htab->vxworks_p && !info->shared && htab->root.splt->size > 0)
14317 {
14318 /* Correct the .rel(a).plt.unloaded relocations. They will have
14319 incorrect symbol indexes. */
14320 int num_plts;
14321 unsigned char *p;
14322
14323 num_plts = ((htab->root.splt->size - htab->plt_header_size)
14324 / htab->plt_entry_size);
14325 p = htab->srelplt2->contents + RELOC_SIZE (htab);
14326
14327 for (; num_plts; num_plts--)
14328 {
14329 Elf_Internal_Rela rel;
14330
14331 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
14332 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
14333 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
14334 p += RELOC_SIZE (htab);
14335
14336 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
14337 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
14338 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
14339 p += RELOC_SIZE (htab);
14340 }
14341 }
14342 }
14343
14344 /* Fill in the first three entries in the global offset table. */
14345 if (sgot)
14346 {
14347 if (sgot->size > 0)
14348 {
14349 if (sdyn == NULL)
14350 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
14351 else
14352 bfd_put_32 (output_bfd,
14353 sdyn->output_section->vma + sdyn->output_offset,
14354 sgot->contents);
14355 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
14356 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
14357 }
14358
14359 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
14360 }
14361
14362 return TRUE;
14363 }
14364
14365 static void
14366 elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
14367 {
14368 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
14369 struct elf32_arm_link_hash_table *globals;
14370
14371 i_ehdrp = elf_elfheader (abfd);
14372
14373 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
14374 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
14375 else
14376 i_ehdrp->e_ident[EI_OSABI] = 0;
14377 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
14378
14379 if (link_info)
14380 {
14381 globals = elf32_arm_hash_table (link_info);
14382 if (globals != NULL && globals->byteswap_code)
14383 i_ehdrp->e_flags |= EF_ARM_BE8;
14384 }
14385 }
14386
14387 static enum elf_reloc_type_class
14388 elf32_arm_reloc_type_class (const Elf_Internal_Rela *rela)
14389 {
14390 switch ((int) ELF32_R_TYPE (rela->r_info))
14391 {
14392 case R_ARM_RELATIVE:
14393 return reloc_class_relative;
14394 case R_ARM_JUMP_SLOT:
14395 return reloc_class_plt;
14396 case R_ARM_COPY:
14397 return reloc_class_copy;
14398 default:
14399 return reloc_class_normal;
14400 }
14401 }
14402
14403 static void
14404 elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
14405 {
14406 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
14407 }
14408
14409 /* Return TRUE if this is an unwinding table entry. */
14410
14411 static bfd_boolean
14412 is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
14413 {
14414 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
14415 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
14416 }
14417
14418
14419 /* Set the type and flags for an ARM section. We do this by
14420 the section name, which is a hack, but ought to work. */
14421
14422 static bfd_boolean
14423 elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
14424 {
14425 const char * name;
14426
14427 name = bfd_get_section_name (abfd, sec);
14428
14429 if (is_arm_elf_unwind_section_name (abfd, name))
14430 {
14431 hdr->sh_type = SHT_ARM_EXIDX;
14432 hdr->sh_flags |= SHF_LINK_ORDER;
14433 }
14434 return TRUE;
14435 }
14436
14437 /* Handle an ARM specific section when reading an object file. This is
14438 called when bfd_section_from_shdr finds a section with an unknown
14439 type. */
14440
14441 static bfd_boolean
14442 elf32_arm_section_from_shdr (bfd *abfd,
14443 Elf_Internal_Shdr * hdr,
14444 const char *name,
14445 int shindex)
14446 {
14447 /* There ought to be a place to keep ELF backend specific flags, but
14448 at the moment there isn't one. We just keep track of the
14449 sections by their name, instead. Fortunately, the ABI gives
14450 names for all the ARM specific sections, so we will probably get
14451 away with this. */
14452 switch (hdr->sh_type)
14453 {
14454 case SHT_ARM_EXIDX:
14455 case SHT_ARM_PREEMPTMAP:
14456 case SHT_ARM_ATTRIBUTES:
14457 break;
14458
14459 default:
14460 return FALSE;
14461 }
14462
14463 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
14464 return FALSE;
14465
14466 return TRUE;
14467 }
14468
14469 static _arm_elf_section_data *
14470 get_arm_elf_section_data (asection * sec)
14471 {
14472 if (sec && sec->owner && is_arm_elf (sec->owner))
14473 return elf32_arm_section_data (sec);
14474 else
14475 return NULL;
14476 }
14477
14478 typedef struct
14479 {
14480 void *flaginfo;
14481 struct bfd_link_info *info;
14482 asection *sec;
14483 int sec_shndx;
14484 int (*func) (void *, const char *, Elf_Internal_Sym *,
14485 asection *, struct elf_link_hash_entry *);
14486 } output_arch_syminfo;
14487
14488 enum map_symbol_type
14489 {
14490 ARM_MAP_ARM,
14491 ARM_MAP_THUMB,
14492 ARM_MAP_DATA
14493 };
14494
14495
14496 /* Output a single mapping symbol. */
14497
14498 static bfd_boolean
14499 elf32_arm_output_map_sym (output_arch_syminfo *osi,
14500 enum map_symbol_type type,
14501 bfd_vma offset)
14502 {
14503 static const char *names[3] = {"$a", "$t", "$d"};
14504 Elf_Internal_Sym sym;
14505
14506 sym.st_value = osi->sec->output_section->vma
14507 + osi->sec->output_offset
14508 + offset;
14509 sym.st_size = 0;
14510 sym.st_other = 0;
14511 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
14512 sym.st_shndx = osi->sec_shndx;
14513 sym.st_target_internal = 0;
14514 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
14515 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
14516 }
14517
14518 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
14519 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
14520
14521 static bfd_boolean
14522 elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
14523 bfd_boolean is_iplt_entry_p,
14524 union gotplt_union *root_plt,
14525 struct arm_plt_info *arm_plt)
14526 {
14527 struct elf32_arm_link_hash_table *htab;
14528 bfd_vma addr, plt_header_size;
14529
14530 if (root_plt->offset == (bfd_vma) -1)
14531 return TRUE;
14532
14533 htab = elf32_arm_hash_table (osi->info);
14534 if (htab == NULL)
14535 return FALSE;
14536
14537 if (is_iplt_entry_p)
14538 {
14539 osi->sec = htab->root.iplt;
14540 plt_header_size = 0;
14541 }
14542 else
14543 {
14544 osi->sec = htab->root.splt;
14545 plt_header_size = htab->plt_header_size;
14546 }
14547 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
14548 (osi->info->output_bfd, osi->sec->output_section));
14549
14550 addr = root_plt->offset & -2;
14551 if (htab->symbian_p)
14552 {
14553 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14554 return FALSE;
14555 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
14556 return FALSE;
14557 }
14558 else if (htab->vxworks_p)
14559 {
14560 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14561 return FALSE;
14562 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
14563 return FALSE;
14564 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
14565 return FALSE;
14566 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
14567 return FALSE;
14568 }
14569 else if (htab->nacl_p)
14570 {
14571 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14572 return FALSE;
14573 }
14574 else
14575 {
14576 bfd_boolean thumb_stub_p;
14577
14578 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
14579 if (thumb_stub_p)
14580 {
14581 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
14582 return FALSE;
14583 }
14584 #ifdef FOUR_WORD_PLT
14585 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14586 return FALSE;
14587 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
14588 return FALSE;
14589 #else
14590 /* A three-word PLT with no Thumb thunk contains only Arm code,
14591 so only need to output a mapping symbol for the first PLT entry and
14592 entries with thumb thunks. */
14593 if (thumb_stub_p || addr == plt_header_size)
14594 {
14595 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14596 return FALSE;
14597 }
14598 #endif
14599 }
14600
14601 return TRUE;
14602 }
14603
14604 /* Output mapping symbols for PLT entries associated with H. */
14605
14606 static bfd_boolean
14607 elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
14608 {
14609 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
14610 struct elf32_arm_link_hash_entry *eh;
14611
14612 if (h->root.type == bfd_link_hash_indirect)
14613 return TRUE;
14614
14615 if (h->root.type == bfd_link_hash_warning)
14616 /* When warning symbols are created, they **replace** the "real"
14617 entry in the hash table, thus we never get to see the real
14618 symbol in a hash traversal. So look at it now. */
14619 h = (struct elf_link_hash_entry *) h->root.u.i.link;
14620
14621 eh = (struct elf32_arm_link_hash_entry *) h;
14622 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
14623 &h->plt, &eh->plt);
14624 }
14625
14626 /* Output a single local symbol for a generated stub. */
14627
14628 static bfd_boolean
14629 elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
14630 bfd_vma offset, bfd_vma size)
14631 {
14632 Elf_Internal_Sym sym;
14633
14634 sym.st_value = osi->sec->output_section->vma
14635 + osi->sec->output_offset
14636 + offset;
14637 sym.st_size = size;
14638 sym.st_other = 0;
14639 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
14640 sym.st_shndx = osi->sec_shndx;
14641 sym.st_target_internal = 0;
14642 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
14643 }
14644
14645 static bfd_boolean
14646 arm_map_one_stub (struct bfd_hash_entry * gen_entry,
14647 void * in_arg)
14648 {
14649 struct elf32_arm_stub_hash_entry *stub_entry;
14650 asection *stub_sec;
14651 bfd_vma addr;
14652 char *stub_name;
14653 output_arch_syminfo *osi;
14654 const insn_sequence *template_sequence;
14655 enum stub_insn_type prev_type;
14656 int size;
14657 int i;
14658 enum map_symbol_type sym_type;
14659
14660 /* Massage our args to the form they really have. */
14661 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
14662 osi = (output_arch_syminfo *) in_arg;
14663
14664 stub_sec = stub_entry->stub_sec;
14665
14666 /* Ensure this stub is attached to the current section being
14667 processed. */
14668 if (stub_sec != osi->sec)
14669 return TRUE;
14670
14671 addr = (bfd_vma) stub_entry->stub_offset;
14672 stub_name = stub_entry->output_name;
14673
14674 template_sequence = stub_entry->stub_template;
14675 switch (template_sequence[0].type)
14676 {
14677 case ARM_TYPE:
14678 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
14679 return FALSE;
14680 break;
14681 case THUMB16_TYPE:
14682 case THUMB32_TYPE:
14683 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
14684 stub_entry->stub_size))
14685 return FALSE;
14686 break;
14687 default:
14688 BFD_FAIL ();
14689 return 0;
14690 }
14691
14692 prev_type = DATA_TYPE;
14693 size = 0;
14694 for (i = 0; i < stub_entry->stub_template_size; i++)
14695 {
14696 switch (template_sequence[i].type)
14697 {
14698 case ARM_TYPE:
14699 sym_type = ARM_MAP_ARM;
14700 break;
14701
14702 case THUMB16_TYPE:
14703 case THUMB32_TYPE:
14704 sym_type = ARM_MAP_THUMB;
14705 break;
14706
14707 case DATA_TYPE:
14708 sym_type = ARM_MAP_DATA;
14709 break;
14710
14711 default:
14712 BFD_FAIL ();
14713 return FALSE;
14714 }
14715
14716 if (template_sequence[i].type != prev_type)
14717 {
14718 prev_type = template_sequence[i].type;
14719 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
14720 return FALSE;
14721 }
14722
14723 switch (template_sequence[i].type)
14724 {
14725 case ARM_TYPE:
14726 case THUMB32_TYPE:
14727 size += 4;
14728 break;
14729
14730 case THUMB16_TYPE:
14731 size += 2;
14732 break;
14733
14734 case DATA_TYPE:
14735 size += 4;
14736 break;
14737
14738 default:
14739 BFD_FAIL ();
14740 return FALSE;
14741 }
14742 }
14743
14744 return TRUE;
14745 }
14746
14747 /* Output mapping symbols for linker generated sections,
14748 and for those data-only sections that do not have a
14749 $d. */
14750
14751 static bfd_boolean
14752 elf32_arm_output_arch_local_syms (bfd *output_bfd,
14753 struct bfd_link_info *info,
14754 void *flaginfo,
14755 int (*func) (void *, const char *,
14756 Elf_Internal_Sym *,
14757 asection *,
14758 struct elf_link_hash_entry *))
14759 {
14760 output_arch_syminfo osi;
14761 struct elf32_arm_link_hash_table *htab;
14762 bfd_vma offset;
14763 bfd_size_type size;
14764 bfd *input_bfd;
14765
14766 htab = elf32_arm_hash_table (info);
14767 if (htab == NULL)
14768 return FALSE;
14769
14770 check_use_blx (htab);
14771
14772 osi.flaginfo = flaginfo;
14773 osi.info = info;
14774 osi.func = func;
14775
14776 /* Add a $d mapping symbol to data-only sections that
14777 don't have any mapping symbol. This may result in (harmless) redundant
14778 mapping symbols. */
14779 for (input_bfd = info->input_bfds;
14780 input_bfd != NULL;
14781 input_bfd = input_bfd->link_next)
14782 {
14783 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
14784 for (osi.sec = input_bfd->sections;
14785 osi.sec != NULL;
14786 osi.sec = osi.sec->next)
14787 {
14788 if (osi.sec->output_section != NULL
14789 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
14790 != 0)
14791 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
14792 == SEC_HAS_CONTENTS
14793 && get_arm_elf_section_data (osi.sec) != NULL
14794 && get_arm_elf_section_data (osi.sec)->mapcount == 0
14795 && osi.sec->size > 0
14796 && (osi.sec->flags & SEC_EXCLUDE) == 0)
14797 {
14798 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14799 (output_bfd, osi.sec->output_section);
14800 if (osi.sec_shndx != (int)SHN_BAD)
14801 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
14802 }
14803 }
14804 }
14805
14806 /* ARM->Thumb glue. */
14807 if (htab->arm_glue_size > 0)
14808 {
14809 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
14810 ARM2THUMB_GLUE_SECTION_NAME);
14811
14812 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14813 (output_bfd, osi.sec->output_section);
14814 if (info->shared || htab->root.is_relocatable_executable
14815 || htab->pic_veneer)
14816 size = ARM2THUMB_PIC_GLUE_SIZE;
14817 else if (htab->use_blx)
14818 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
14819 else
14820 size = ARM2THUMB_STATIC_GLUE_SIZE;
14821
14822 for (offset = 0; offset < htab->arm_glue_size; offset += size)
14823 {
14824 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
14825 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
14826 }
14827 }
14828
14829 /* Thumb->ARM glue. */
14830 if (htab->thumb_glue_size > 0)
14831 {
14832 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
14833 THUMB2ARM_GLUE_SECTION_NAME);
14834
14835 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14836 (output_bfd, osi.sec->output_section);
14837 size = THUMB2ARM_GLUE_SIZE;
14838
14839 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
14840 {
14841 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
14842 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
14843 }
14844 }
14845
14846 /* ARMv4 BX veneers. */
14847 if (htab->bx_glue_size > 0)
14848 {
14849 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
14850 ARM_BX_GLUE_SECTION_NAME);
14851
14852 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14853 (output_bfd, osi.sec->output_section);
14854
14855 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
14856 }
14857
14858 /* Long calls stubs. */
14859 if (htab->stub_bfd && htab->stub_bfd->sections)
14860 {
14861 asection* stub_sec;
14862
14863 for (stub_sec = htab->stub_bfd->sections;
14864 stub_sec != NULL;
14865 stub_sec = stub_sec->next)
14866 {
14867 /* Ignore non-stub sections. */
14868 if (!strstr (stub_sec->name, STUB_SUFFIX))
14869 continue;
14870
14871 osi.sec = stub_sec;
14872
14873 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14874 (output_bfd, osi.sec->output_section);
14875
14876 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
14877 }
14878 }
14879
14880 /* Finally, output mapping symbols for the PLT. */
14881 if (htab->root.splt && htab->root.splt->size > 0)
14882 {
14883 osi.sec = htab->root.splt;
14884 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
14885 (output_bfd, osi.sec->output_section));
14886
14887 /* Output mapping symbols for the plt header. SymbianOS does not have a
14888 plt header. */
14889 if (htab->vxworks_p)
14890 {
14891 /* VxWorks shared libraries have no PLT header. */
14892 if (!info->shared)
14893 {
14894 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
14895 return FALSE;
14896 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
14897 return FALSE;
14898 }
14899 }
14900 else if (htab->nacl_p)
14901 {
14902 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
14903 return FALSE;
14904 }
14905 else if (!htab->symbian_p)
14906 {
14907 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
14908 return FALSE;
14909 #ifndef FOUR_WORD_PLT
14910 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
14911 return FALSE;
14912 #endif
14913 }
14914 }
14915 if ((htab->root.splt && htab->root.splt->size > 0)
14916 || (htab->root.iplt && htab->root.iplt->size > 0))
14917 {
14918 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
14919 for (input_bfd = info->input_bfds;
14920 input_bfd != NULL;
14921 input_bfd = input_bfd->link_next)
14922 {
14923 struct arm_local_iplt_info **local_iplt;
14924 unsigned int i, num_syms;
14925
14926 local_iplt = elf32_arm_local_iplt (input_bfd);
14927 if (local_iplt != NULL)
14928 {
14929 num_syms = elf_symtab_hdr (input_bfd).sh_info;
14930 for (i = 0; i < num_syms; i++)
14931 if (local_iplt[i] != NULL
14932 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
14933 &local_iplt[i]->root,
14934 &local_iplt[i]->arm))
14935 return FALSE;
14936 }
14937 }
14938 }
14939 if (htab->dt_tlsdesc_plt != 0)
14940 {
14941 /* Mapping symbols for the lazy tls trampoline. */
14942 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
14943 return FALSE;
14944
14945 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
14946 htab->dt_tlsdesc_plt + 24))
14947 return FALSE;
14948 }
14949 if (htab->tls_trampoline != 0)
14950 {
14951 /* Mapping symbols for the tls trampoline. */
14952 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
14953 return FALSE;
14954 #ifdef FOUR_WORD_PLT
14955 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
14956 htab->tls_trampoline + 12))
14957 return FALSE;
14958 #endif
14959 }
14960
14961 return TRUE;
14962 }
14963
14964 /* Allocate target specific section data. */
14965
14966 static bfd_boolean
14967 elf32_arm_new_section_hook (bfd *abfd, asection *sec)
14968 {
14969 if (!sec->used_by_bfd)
14970 {
14971 _arm_elf_section_data *sdata;
14972 bfd_size_type amt = sizeof (*sdata);
14973
14974 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
14975 if (sdata == NULL)
14976 return FALSE;
14977 sec->used_by_bfd = sdata;
14978 }
14979
14980 return _bfd_elf_new_section_hook (abfd, sec);
14981 }
14982
14983
14984 /* Used to order a list of mapping symbols by address. */
14985
14986 static int
14987 elf32_arm_compare_mapping (const void * a, const void * b)
14988 {
14989 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
14990 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
14991
14992 if (amap->vma > bmap->vma)
14993 return 1;
14994 else if (amap->vma < bmap->vma)
14995 return -1;
14996 else if (amap->type > bmap->type)
14997 /* Ensure results do not depend on the host qsort for objects with
14998 multiple mapping symbols at the same address by sorting on type
14999 after vma. */
15000 return 1;
15001 else if (amap->type < bmap->type)
15002 return -1;
15003 else
15004 return 0;
15005 }
15006
15007 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
15008
15009 static unsigned long
15010 offset_prel31 (unsigned long addr, bfd_vma offset)
15011 {
15012 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
15013 }
15014
15015 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
15016 relocations. */
15017
15018 static void
15019 copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
15020 {
15021 unsigned long first_word = bfd_get_32 (output_bfd, from);
15022 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
15023
15024 /* High bit of first word is supposed to be zero. */
15025 if ((first_word & 0x80000000ul) == 0)
15026 first_word = offset_prel31 (first_word, offset);
15027
15028 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
15029 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
15030 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
15031 second_word = offset_prel31 (second_word, offset);
15032
15033 bfd_put_32 (output_bfd, first_word, to);
15034 bfd_put_32 (output_bfd, second_word, to + 4);
15035 }
15036
15037 /* Data for make_branch_to_a8_stub(). */
15038
15039 struct a8_branch_to_stub_data
15040 {
15041 asection *writing_section;
15042 bfd_byte *contents;
15043 };
15044
15045
15046 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
15047 places for a particular section. */
15048
15049 static bfd_boolean
15050 make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
15051 void *in_arg)
15052 {
15053 struct elf32_arm_stub_hash_entry *stub_entry;
15054 struct a8_branch_to_stub_data *data;
15055 bfd_byte *contents;
15056 unsigned long branch_insn;
15057 bfd_vma veneered_insn_loc, veneer_entry_loc;
15058 bfd_signed_vma branch_offset;
15059 bfd *abfd;
15060 unsigned int target;
15061
15062 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
15063 data = (struct a8_branch_to_stub_data *) in_arg;
15064
15065 if (stub_entry->target_section != data->writing_section
15066 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
15067 return TRUE;
15068
15069 contents = data->contents;
15070
15071 veneered_insn_loc = stub_entry->target_section->output_section->vma
15072 + stub_entry->target_section->output_offset
15073 + stub_entry->target_value;
15074
15075 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
15076 + stub_entry->stub_sec->output_offset
15077 + stub_entry->stub_offset;
15078
15079 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
15080 veneered_insn_loc &= ~3u;
15081
15082 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
15083
15084 abfd = stub_entry->target_section->owner;
15085 target = stub_entry->target_value;
15086
15087 /* We attempt to avoid this condition by setting stubs_always_after_branch
15088 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
15089 This check is just to be on the safe side... */
15090 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
15091 {
15092 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
15093 "allocated in unsafe location"), abfd);
15094 return FALSE;
15095 }
15096
15097 switch (stub_entry->stub_type)
15098 {
15099 case arm_stub_a8_veneer_b:
15100 case arm_stub_a8_veneer_b_cond:
15101 branch_insn = 0xf0009000;
15102 goto jump24;
15103
15104 case arm_stub_a8_veneer_blx:
15105 branch_insn = 0xf000e800;
15106 goto jump24;
15107
15108 case arm_stub_a8_veneer_bl:
15109 {
15110 unsigned int i1, j1, i2, j2, s;
15111
15112 branch_insn = 0xf000d000;
15113
15114 jump24:
15115 if (branch_offset < -16777216 || branch_offset > 16777214)
15116 {
15117 /* There's not much we can do apart from complain if this
15118 happens. */
15119 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
15120 "of range (input file too large)"), abfd);
15121 return FALSE;
15122 }
15123
15124 /* i1 = not(j1 eor s), so:
15125 not i1 = j1 eor s
15126 j1 = (not i1) eor s. */
15127
15128 branch_insn |= (branch_offset >> 1) & 0x7ff;
15129 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
15130 i2 = (branch_offset >> 22) & 1;
15131 i1 = (branch_offset >> 23) & 1;
15132 s = (branch_offset >> 24) & 1;
15133 j1 = (!i1) ^ s;
15134 j2 = (!i2) ^ s;
15135 branch_insn |= j2 << 11;
15136 branch_insn |= j1 << 13;
15137 branch_insn |= s << 26;
15138 }
15139 break;
15140
15141 default:
15142 BFD_FAIL ();
15143 return FALSE;
15144 }
15145
15146 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[target]);
15147 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[target + 2]);
15148
15149 return TRUE;
15150 }
15151
15152 /* Do code byteswapping. Return FALSE afterwards so that the section is
15153 written out as normal. */
15154
15155 static bfd_boolean
15156 elf32_arm_write_section (bfd *output_bfd,
15157 struct bfd_link_info *link_info,
15158 asection *sec,
15159 bfd_byte *contents)
15160 {
15161 unsigned int mapcount, errcount;
15162 _arm_elf_section_data *arm_data;
15163 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
15164 elf32_arm_section_map *map;
15165 elf32_vfp11_erratum_list *errnode;
15166 bfd_vma ptr;
15167 bfd_vma end;
15168 bfd_vma offset = sec->output_section->vma + sec->output_offset;
15169 bfd_byte tmp;
15170 unsigned int i;
15171
15172 if (globals == NULL)
15173 return FALSE;
15174
15175 /* If this section has not been allocated an _arm_elf_section_data
15176 structure then we cannot record anything. */
15177 arm_data = get_arm_elf_section_data (sec);
15178 if (arm_data == NULL)
15179 return FALSE;
15180
15181 mapcount = arm_data->mapcount;
15182 map = arm_data->map;
15183 errcount = arm_data->erratumcount;
15184
15185 if (errcount != 0)
15186 {
15187 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
15188
15189 for (errnode = arm_data->erratumlist; errnode != 0;
15190 errnode = errnode->next)
15191 {
15192 bfd_vma target = errnode->vma - offset;
15193
15194 switch (errnode->type)
15195 {
15196 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
15197 {
15198 bfd_vma branch_to_veneer;
15199 /* Original condition code of instruction, plus bit mask for
15200 ARM B instruction. */
15201 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
15202 | 0x0a000000;
15203
15204 /* The instruction is before the label. */
15205 target -= 4;
15206
15207 /* Above offset included in -4 below. */
15208 branch_to_veneer = errnode->u.b.veneer->vma
15209 - errnode->vma - 4;
15210
15211 if ((signed) branch_to_veneer < -(1 << 25)
15212 || (signed) branch_to_veneer >= (1 << 25))
15213 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
15214 "range"), output_bfd);
15215
15216 insn |= (branch_to_veneer >> 2) & 0xffffff;
15217 contents[endianflip ^ target] = insn & 0xff;
15218 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
15219 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
15220 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
15221 }
15222 break;
15223
15224 case VFP11_ERRATUM_ARM_VENEER:
15225 {
15226 bfd_vma branch_from_veneer;
15227 unsigned int insn;
15228
15229 /* Take size of veneer into account. */
15230 branch_from_veneer = errnode->u.v.branch->vma
15231 - errnode->vma - 12;
15232
15233 if ((signed) branch_from_veneer < -(1 << 25)
15234 || (signed) branch_from_veneer >= (1 << 25))
15235 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
15236 "range"), output_bfd);
15237
15238 /* Original instruction. */
15239 insn = errnode->u.v.branch->u.b.vfp_insn;
15240 contents[endianflip ^ target] = insn & 0xff;
15241 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
15242 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
15243 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
15244
15245 /* Branch back to insn after original insn. */
15246 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
15247 contents[endianflip ^ (target + 4)] = insn & 0xff;
15248 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
15249 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
15250 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
15251 }
15252 break;
15253
15254 default:
15255 abort ();
15256 }
15257 }
15258 }
15259
15260 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
15261 {
15262 arm_unwind_table_edit *edit_node
15263 = arm_data->u.exidx.unwind_edit_list;
15264 /* Now, sec->size is the size of the section we will write. The original
15265 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
15266 markers) was sec->rawsize. (This isn't the case if we perform no
15267 edits, then rawsize will be zero and we should use size). */
15268 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
15269 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
15270 unsigned int in_index, out_index;
15271 bfd_vma add_to_offsets = 0;
15272
15273 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
15274 {
15275 if (edit_node)
15276 {
15277 unsigned int edit_index = edit_node->index;
15278
15279 if (in_index < edit_index && in_index * 8 < input_size)
15280 {
15281 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
15282 contents + in_index * 8, add_to_offsets);
15283 out_index++;
15284 in_index++;
15285 }
15286 else if (in_index == edit_index
15287 || (in_index * 8 >= input_size
15288 && edit_index == UINT_MAX))
15289 {
15290 switch (edit_node->type)
15291 {
15292 case DELETE_EXIDX_ENTRY:
15293 in_index++;
15294 add_to_offsets += 8;
15295 break;
15296
15297 case INSERT_EXIDX_CANTUNWIND_AT_END:
15298 {
15299 asection *text_sec = edit_node->linked_section;
15300 bfd_vma text_offset = text_sec->output_section->vma
15301 + text_sec->output_offset
15302 + text_sec->size;
15303 bfd_vma exidx_offset = offset + out_index * 8;
15304 unsigned long prel31_offset;
15305
15306 /* Note: this is meant to be equivalent to an
15307 R_ARM_PREL31 relocation. These synthetic
15308 EXIDX_CANTUNWIND markers are not relocated by the
15309 usual BFD method. */
15310 prel31_offset = (text_offset - exidx_offset)
15311 & 0x7ffffffful;
15312
15313 /* First address we can't unwind. */
15314 bfd_put_32 (output_bfd, prel31_offset,
15315 &edited_contents[out_index * 8]);
15316
15317 /* Code for EXIDX_CANTUNWIND. */
15318 bfd_put_32 (output_bfd, 0x1,
15319 &edited_contents[out_index * 8 + 4]);
15320
15321 out_index++;
15322 add_to_offsets -= 8;
15323 }
15324 break;
15325 }
15326
15327 edit_node = edit_node->next;
15328 }
15329 }
15330 else
15331 {
15332 /* No more edits, copy remaining entries verbatim. */
15333 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
15334 contents + in_index * 8, add_to_offsets);
15335 out_index++;
15336 in_index++;
15337 }
15338 }
15339
15340 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
15341 bfd_set_section_contents (output_bfd, sec->output_section,
15342 edited_contents,
15343 (file_ptr) sec->output_offset, sec->size);
15344
15345 return TRUE;
15346 }
15347
15348 /* Fix code to point to Cortex-A8 erratum stubs. */
15349 if (globals->fix_cortex_a8)
15350 {
15351 struct a8_branch_to_stub_data data;
15352
15353 data.writing_section = sec;
15354 data.contents = contents;
15355
15356 bfd_hash_traverse (&globals->stub_hash_table, make_branch_to_a8_stub,
15357 &data);
15358 }
15359
15360 if (mapcount == 0)
15361 return FALSE;
15362
15363 if (globals->byteswap_code)
15364 {
15365 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
15366
15367 ptr = map[0].vma;
15368 for (i = 0; i < mapcount; i++)
15369 {
15370 if (i == mapcount - 1)
15371 end = sec->size;
15372 else
15373 end = map[i + 1].vma;
15374
15375 switch (map[i].type)
15376 {
15377 case 'a':
15378 /* Byte swap code words. */
15379 while (ptr + 3 < end)
15380 {
15381 tmp = contents[ptr];
15382 contents[ptr] = contents[ptr + 3];
15383 contents[ptr + 3] = tmp;
15384 tmp = contents[ptr + 1];
15385 contents[ptr + 1] = contents[ptr + 2];
15386 contents[ptr + 2] = tmp;
15387 ptr += 4;
15388 }
15389 break;
15390
15391 case 't':
15392 /* Byte swap code halfwords. */
15393 while (ptr + 1 < end)
15394 {
15395 tmp = contents[ptr];
15396 contents[ptr] = contents[ptr + 1];
15397 contents[ptr + 1] = tmp;
15398 ptr += 2;
15399 }
15400 break;
15401
15402 case 'd':
15403 /* Leave data alone. */
15404 break;
15405 }
15406 ptr = end;
15407 }
15408 }
15409
15410 free (map);
15411 arm_data->mapcount = -1;
15412 arm_data->mapsize = 0;
15413 arm_data->map = NULL;
15414
15415 return FALSE;
15416 }
15417
15418 /* Mangle thumb function symbols as we read them in. */
15419
15420 static bfd_boolean
15421 elf32_arm_swap_symbol_in (bfd * abfd,
15422 const void *psrc,
15423 const void *pshn,
15424 Elf_Internal_Sym *dst)
15425 {
15426 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
15427 return FALSE;
15428
15429 /* New EABI objects mark thumb function symbols by setting the low bit of
15430 the address. */
15431 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
15432 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
15433 {
15434 if (dst->st_value & 1)
15435 {
15436 dst->st_value &= ~(bfd_vma) 1;
15437 dst->st_target_internal = ST_BRANCH_TO_THUMB;
15438 }
15439 else
15440 dst->st_target_internal = ST_BRANCH_TO_ARM;
15441 }
15442 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
15443 {
15444 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
15445 dst->st_target_internal = ST_BRANCH_TO_THUMB;
15446 }
15447 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
15448 dst->st_target_internal = ST_BRANCH_LONG;
15449 else
15450 dst->st_target_internal = ST_BRANCH_UNKNOWN;
15451
15452 return TRUE;
15453 }
15454
15455
15456 /* Mangle thumb function symbols as we write them out. */
15457
15458 static void
15459 elf32_arm_swap_symbol_out (bfd *abfd,
15460 const Elf_Internal_Sym *src,
15461 void *cdst,
15462 void *shndx)
15463 {
15464 Elf_Internal_Sym newsym;
15465
15466 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
15467 of the address set, as per the new EABI. We do this unconditionally
15468 because objcopy does not set the elf header flags until after
15469 it writes out the symbol table. */
15470 if (src->st_target_internal == ST_BRANCH_TO_THUMB)
15471 {
15472 newsym = *src;
15473 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
15474 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
15475 if (newsym.st_shndx != SHN_UNDEF)
15476 {
15477 /* Do this only for defined symbols. At link type, the static
15478 linker will simulate the work of dynamic linker of resolving
15479 symbols and will carry over the thumbness of found symbols to
15480 the output symbol table. It's not clear how it happens, but
15481 the thumbness of undefined symbols can well be different at
15482 runtime, and writing '1' for them will be confusing for users
15483 and possibly for dynamic linker itself.
15484 */
15485 newsym.st_value |= 1;
15486 }
15487
15488 src = &newsym;
15489 }
15490 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
15491 }
15492
15493 /* Add the PT_ARM_EXIDX program header. */
15494
15495 static bfd_boolean
15496 elf32_arm_modify_segment_map (bfd *abfd,
15497 struct bfd_link_info *info ATTRIBUTE_UNUSED)
15498 {
15499 struct elf_segment_map *m;
15500 asection *sec;
15501
15502 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
15503 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
15504 {
15505 /* If there is already a PT_ARM_EXIDX header, then we do not
15506 want to add another one. This situation arises when running
15507 "strip"; the input binary already has the header. */
15508 m = elf_tdata (abfd)->segment_map;
15509 while (m && m->p_type != PT_ARM_EXIDX)
15510 m = m->next;
15511 if (!m)
15512 {
15513 m = (struct elf_segment_map *)
15514 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
15515 if (m == NULL)
15516 return FALSE;
15517 m->p_type = PT_ARM_EXIDX;
15518 m->count = 1;
15519 m->sections[0] = sec;
15520
15521 m->next = elf_tdata (abfd)->segment_map;
15522 elf_tdata (abfd)->segment_map = m;
15523 }
15524 }
15525
15526 return TRUE;
15527 }
15528
15529 /* We may add a PT_ARM_EXIDX program header. */
15530
15531 static int
15532 elf32_arm_additional_program_headers (bfd *abfd,
15533 struct bfd_link_info *info ATTRIBUTE_UNUSED)
15534 {
15535 asection *sec;
15536
15537 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
15538 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
15539 return 1;
15540 else
15541 return 0;
15542 }
15543
15544 /* Hook called by the linker routine which adds symbols from an object
15545 file. */
15546
15547 static bfd_boolean
15548 elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
15549 Elf_Internal_Sym *sym, const char **namep,
15550 flagword *flagsp, asection **secp, bfd_vma *valp)
15551 {
15552 if ((abfd->flags & DYNAMIC) == 0
15553 && (ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
15554 || ELF_ST_BIND (sym->st_info) == STB_GNU_UNIQUE))
15555 elf_tdata (info->output_bfd)->has_gnu_symbols = TRUE;
15556
15557 if (elf32_arm_hash_table (info)->vxworks_p
15558 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
15559 flagsp, secp, valp))
15560 return FALSE;
15561
15562 return TRUE;
15563 }
15564
15565 /* We use this to override swap_symbol_in and swap_symbol_out. */
15566 const struct elf_size_info elf32_arm_size_info =
15567 {
15568 sizeof (Elf32_External_Ehdr),
15569 sizeof (Elf32_External_Phdr),
15570 sizeof (Elf32_External_Shdr),
15571 sizeof (Elf32_External_Rel),
15572 sizeof (Elf32_External_Rela),
15573 sizeof (Elf32_External_Sym),
15574 sizeof (Elf32_External_Dyn),
15575 sizeof (Elf_External_Note),
15576 4,
15577 1,
15578 32, 2,
15579 ELFCLASS32, EV_CURRENT,
15580 bfd_elf32_write_out_phdrs,
15581 bfd_elf32_write_shdrs_and_ehdr,
15582 bfd_elf32_checksum_contents,
15583 bfd_elf32_write_relocs,
15584 elf32_arm_swap_symbol_in,
15585 elf32_arm_swap_symbol_out,
15586 bfd_elf32_slurp_reloc_table,
15587 bfd_elf32_slurp_symbol_table,
15588 bfd_elf32_swap_dyn_in,
15589 bfd_elf32_swap_dyn_out,
15590 bfd_elf32_swap_reloc_in,
15591 bfd_elf32_swap_reloc_out,
15592 bfd_elf32_swap_reloca_in,
15593 bfd_elf32_swap_reloca_out
15594 };
15595
15596 #define ELF_ARCH bfd_arch_arm
15597 #define ELF_TARGET_ID ARM_ELF_DATA
15598 #define ELF_MACHINE_CODE EM_ARM
15599 #ifdef __QNXTARGET__
15600 #define ELF_MAXPAGESIZE 0x1000
15601 #else
15602 #define ELF_MAXPAGESIZE 0x8000
15603 #endif
15604 #define ELF_MINPAGESIZE 0x1000
15605 #define ELF_COMMONPAGESIZE 0x1000
15606
15607 #define bfd_elf32_mkobject elf32_arm_mkobject
15608
15609 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
15610 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
15611 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
15612 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
15613 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
15614 #define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free
15615 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
15616 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
15617 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
15618 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
15619 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
15620 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
15621 #define bfd_elf32_bfd_final_link elf32_arm_final_link
15622
15623 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
15624 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
15625 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
15626 #define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
15627 #define elf_backend_check_relocs elf32_arm_check_relocs
15628 #define elf_backend_relocate_section elf32_arm_relocate_section
15629 #define elf_backend_write_section elf32_arm_write_section
15630 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
15631 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
15632 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
15633 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
15634 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
15635 #define elf_backend_always_size_sections elf32_arm_always_size_sections
15636 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
15637 #define elf_backend_post_process_headers elf32_arm_post_process_headers
15638 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
15639 #define elf_backend_object_p elf32_arm_object_p
15640 #define elf_backend_fake_sections elf32_arm_fake_sections
15641 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
15642 #define elf_backend_final_write_processing elf32_arm_final_write_processing
15643 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
15644 #define elf_backend_size_info elf32_arm_size_info
15645 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
15646 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
15647 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
15648 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
15649 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
15650
15651 #define elf_backend_can_refcount 1
15652 #define elf_backend_can_gc_sections 1
15653 #define elf_backend_plt_readonly 1
15654 #define elf_backend_want_got_plt 1
15655 #define elf_backend_want_plt_sym 0
15656 #define elf_backend_may_use_rel_p 1
15657 #define elf_backend_may_use_rela_p 0
15658 #define elf_backend_default_use_rela_p 0
15659
15660 #define elf_backend_got_header_size 12
15661
15662 #undef elf_backend_obj_attrs_vendor
15663 #define elf_backend_obj_attrs_vendor "aeabi"
15664 #undef elf_backend_obj_attrs_section
15665 #define elf_backend_obj_attrs_section ".ARM.attributes"
15666 #undef elf_backend_obj_attrs_arg_type
15667 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
15668 #undef elf_backend_obj_attrs_section_type
15669 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
15670 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
15671 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
15672
15673 #include "elf32-target.h"
15674
15675 /* Native Client targets. */
15676
15677 #undef TARGET_LITTLE_SYM
15678 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_nacl_vec
15679 #undef TARGET_LITTLE_NAME
15680 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
15681 #undef TARGET_BIG_SYM
15682 #define TARGET_BIG_SYM bfd_elf32_bigarm_nacl_vec
15683 #undef TARGET_BIG_NAME
15684 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
15685
15686 /* Like elf32_arm_link_hash_table_create -- but overrides
15687 appropriately for NaCl. */
15688
15689 static struct bfd_link_hash_table *
15690 elf32_arm_nacl_link_hash_table_create (bfd *abfd)
15691 {
15692 struct bfd_link_hash_table *ret;
15693
15694 ret = elf32_arm_link_hash_table_create (abfd);
15695 if (ret)
15696 {
15697 struct elf32_arm_link_hash_table *htab
15698 = (struct elf32_arm_link_hash_table *) ret;
15699
15700 htab->nacl_p = 1;
15701
15702 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
15703 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
15704 }
15705 return ret;
15706 }
15707
15708 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
15709 really need to use elf32_arm_modify_segment_map. But we do it
15710 anyway just to reduce gratuitous differences with the stock ARM backend. */
15711
15712 static bfd_boolean
15713 elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
15714 {
15715 return (elf32_arm_modify_segment_map (abfd, info)
15716 && nacl_modify_segment_map (abfd, info));
15717 }
15718
15719 #undef elf32_bed
15720 #define elf32_bed elf32_arm_nacl_bed
15721 #undef bfd_elf32_bfd_link_hash_table_create
15722 #define bfd_elf32_bfd_link_hash_table_create \
15723 elf32_arm_nacl_link_hash_table_create
15724 #undef elf_backend_plt_alignment
15725 #define elf_backend_plt_alignment 4
15726 #undef elf_backend_modify_segment_map
15727 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
15728 #undef elf_backend_modify_program_headers
15729 #define elf_backend_modify_program_headers nacl_modify_program_headers
15730
15731 #undef ELF_MAXPAGESIZE
15732 #define ELF_MAXPAGESIZE 0x10000
15733
15734 #include "elf32-target.h"
15735
15736 /* Reset to defaults. */
15737 #undef elf_backend_plt_alignment
15738 #undef elf_backend_modify_segment_map
15739 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
15740 #undef elf_backend_modify_program_headers
15741
15742 /* VxWorks Targets. */
15743
15744 #undef TARGET_LITTLE_SYM
15745 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
15746 #undef TARGET_LITTLE_NAME
15747 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
15748 #undef TARGET_BIG_SYM
15749 #define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
15750 #undef TARGET_BIG_NAME
15751 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
15752
15753 /* Like elf32_arm_link_hash_table_create -- but overrides
15754 appropriately for VxWorks. */
15755
15756 static struct bfd_link_hash_table *
15757 elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
15758 {
15759 struct bfd_link_hash_table *ret;
15760
15761 ret = elf32_arm_link_hash_table_create (abfd);
15762 if (ret)
15763 {
15764 struct elf32_arm_link_hash_table *htab
15765 = (struct elf32_arm_link_hash_table *) ret;
15766 htab->use_rel = 0;
15767 htab->vxworks_p = 1;
15768 }
15769 return ret;
15770 }
15771
15772 static void
15773 elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
15774 {
15775 elf32_arm_final_write_processing (abfd, linker);
15776 elf_vxworks_final_write_processing (abfd, linker);
15777 }
15778
15779 #undef elf32_bed
15780 #define elf32_bed elf32_arm_vxworks_bed
15781
15782 #undef bfd_elf32_bfd_link_hash_table_create
15783 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
15784 #undef elf_backend_final_write_processing
15785 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
15786 #undef elf_backend_emit_relocs
15787 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
15788
15789 #undef elf_backend_may_use_rel_p
15790 #define elf_backend_may_use_rel_p 0
15791 #undef elf_backend_may_use_rela_p
15792 #define elf_backend_may_use_rela_p 1
15793 #undef elf_backend_default_use_rela_p
15794 #define elf_backend_default_use_rela_p 1
15795 #undef elf_backend_want_plt_sym
15796 #define elf_backend_want_plt_sym 1
15797 #undef ELF_MAXPAGESIZE
15798 #define ELF_MAXPAGESIZE 0x1000
15799
15800 #include "elf32-target.h"
15801
15802
15803 /* Merge backend specific data from an object file to the output
15804 object file when linking. */
15805
15806 static bfd_boolean
15807 elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
15808 {
15809 flagword out_flags;
15810 flagword in_flags;
15811 bfd_boolean flags_compatible = TRUE;
15812 asection *sec;
15813
15814 /* Check if we have the same endianness. */
15815 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
15816 return FALSE;
15817
15818 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
15819 return TRUE;
15820
15821 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
15822 return FALSE;
15823
15824 /* The input BFD must have had its flags initialised. */
15825 /* The following seems bogus to me -- The flags are initialized in
15826 the assembler but I don't think an elf_flags_init field is
15827 written into the object. */
15828 /* BFD_ASSERT (elf_flags_init (ibfd)); */
15829
15830 in_flags = elf_elfheader (ibfd)->e_flags;
15831 out_flags = elf_elfheader (obfd)->e_flags;
15832
15833 /* In theory there is no reason why we couldn't handle this. However
15834 in practice it isn't even close to working and there is no real
15835 reason to want it. */
15836 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
15837 && !(ibfd->flags & DYNAMIC)
15838 && (in_flags & EF_ARM_BE8))
15839 {
15840 _bfd_error_handler (_("error: %B is already in final BE8 format"),
15841 ibfd);
15842 return FALSE;
15843 }
15844
15845 if (!elf_flags_init (obfd))
15846 {
15847 /* If the input is the default architecture and had the default
15848 flags then do not bother setting the flags for the output
15849 architecture, instead allow future merges to do this. If no
15850 future merges ever set these flags then they will retain their
15851 uninitialised values, which surprise surprise, correspond
15852 to the default values. */
15853 if (bfd_get_arch_info (ibfd)->the_default
15854 && elf_elfheader (ibfd)->e_flags == 0)
15855 return TRUE;
15856
15857 elf_flags_init (obfd) = TRUE;
15858 elf_elfheader (obfd)->e_flags = in_flags;
15859
15860 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
15861 && bfd_get_arch_info (obfd)->the_default)
15862 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
15863
15864 return TRUE;
15865 }
15866
15867 /* Determine what should happen if the input ARM architecture
15868 does not match the output ARM architecture. */
15869 if (! bfd_arm_merge_machines (ibfd, obfd))
15870 return FALSE;
15871
15872 /* Identical flags must be compatible. */
15873 if (in_flags == out_flags)
15874 return TRUE;
15875
15876 /* Check to see if the input BFD actually contains any sections. If
15877 not, its flags may not have been initialised either, but it
15878 cannot actually cause any incompatiblity. Do not short-circuit
15879 dynamic objects; their section list may be emptied by
15880 elf_link_add_object_symbols.
15881
15882 Also check to see if there are no code sections in the input.
15883 In this case there is no need to check for code specific flags.
15884 XXX - do we need to worry about floating-point format compatability
15885 in data sections ? */
15886 if (!(ibfd->flags & DYNAMIC))
15887 {
15888 bfd_boolean null_input_bfd = TRUE;
15889 bfd_boolean only_data_sections = TRUE;
15890
15891 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
15892 {
15893 /* Ignore synthetic glue sections. */
15894 if (strcmp (sec->name, ".glue_7")
15895 && strcmp (sec->name, ".glue_7t"))
15896 {
15897 if ((bfd_get_section_flags (ibfd, sec)
15898 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
15899 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
15900 only_data_sections = FALSE;
15901
15902 null_input_bfd = FALSE;
15903 break;
15904 }
15905 }
15906
15907 if (null_input_bfd || only_data_sections)
15908 return TRUE;
15909 }
15910
15911 /* Complain about various flag mismatches. */
15912 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
15913 EF_ARM_EABI_VERSION (out_flags)))
15914 {
15915 _bfd_error_handler
15916 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
15917 ibfd, obfd,
15918 (in_flags & EF_ARM_EABIMASK) >> 24,
15919 (out_flags & EF_ARM_EABIMASK) >> 24);
15920 return FALSE;
15921 }
15922
15923 /* Not sure what needs to be checked for EABI versions >= 1. */
15924 /* VxWorks libraries do not use these flags. */
15925 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
15926 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
15927 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
15928 {
15929 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
15930 {
15931 _bfd_error_handler
15932 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
15933 ibfd, obfd,
15934 in_flags & EF_ARM_APCS_26 ? 26 : 32,
15935 out_flags & EF_ARM_APCS_26 ? 26 : 32);
15936 flags_compatible = FALSE;
15937 }
15938
15939 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
15940 {
15941 if (in_flags & EF_ARM_APCS_FLOAT)
15942 _bfd_error_handler
15943 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
15944 ibfd, obfd);
15945 else
15946 _bfd_error_handler
15947 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
15948 ibfd, obfd);
15949
15950 flags_compatible = FALSE;
15951 }
15952
15953 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
15954 {
15955 if (in_flags & EF_ARM_VFP_FLOAT)
15956 _bfd_error_handler
15957 (_("error: %B uses VFP instructions, whereas %B does not"),
15958 ibfd, obfd);
15959 else
15960 _bfd_error_handler
15961 (_("error: %B uses FPA instructions, whereas %B does not"),
15962 ibfd, obfd);
15963
15964 flags_compatible = FALSE;
15965 }
15966
15967 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
15968 {
15969 if (in_flags & EF_ARM_MAVERICK_FLOAT)
15970 _bfd_error_handler
15971 (_("error: %B uses Maverick instructions, whereas %B does not"),
15972 ibfd, obfd);
15973 else
15974 _bfd_error_handler
15975 (_("error: %B does not use Maverick instructions, whereas %B does"),
15976 ibfd, obfd);
15977
15978 flags_compatible = FALSE;
15979 }
15980
15981 #ifdef EF_ARM_SOFT_FLOAT
15982 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
15983 {
15984 /* We can allow interworking between code that is VFP format
15985 layout, and uses either soft float or integer regs for
15986 passing floating point arguments and results. We already
15987 know that the APCS_FLOAT flags match; similarly for VFP
15988 flags. */
15989 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
15990 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
15991 {
15992 if (in_flags & EF_ARM_SOFT_FLOAT)
15993 _bfd_error_handler
15994 (_("error: %B uses software FP, whereas %B uses hardware FP"),
15995 ibfd, obfd);
15996 else
15997 _bfd_error_handler
15998 (_("error: %B uses hardware FP, whereas %B uses software FP"),
15999 ibfd, obfd);
16000
16001 flags_compatible = FALSE;
16002 }
16003 }
16004 #endif
16005
16006 /* Interworking mismatch is only a warning. */
16007 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
16008 {
16009 if (in_flags & EF_ARM_INTERWORK)
16010 {
16011 _bfd_error_handler
16012 (_("Warning: %B supports interworking, whereas %B does not"),
16013 ibfd, obfd);
16014 }
16015 else
16016 {
16017 _bfd_error_handler
16018 (_("Warning: %B does not support interworking, whereas %B does"),
16019 ibfd, obfd);
16020 }
16021 }
16022 }
16023
16024 return flags_compatible;
16025 }
16026
16027
16028 /* Symbian OS Targets. */
16029
16030 #undef TARGET_LITTLE_SYM
16031 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
16032 #undef TARGET_LITTLE_NAME
16033 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
16034 #undef TARGET_BIG_SYM
16035 #define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
16036 #undef TARGET_BIG_NAME
16037 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
16038
16039 /* Like elf32_arm_link_hash_table_create -- but overrides
16040 appropriately for Symbian OS. */
16041
16042 static struct bfd_link_hash_table *
16043 elf32_arm_symbian_link_hash_table_create (bfd *abfd)
16044 {
16045 struct bfd_link_hash_table *ret;
16046
16047 ret = elf32_arm_link_hash_table_create (abfd);
16048 if (ret)
16049 {
16050 struct elf32_arm_link_hash_table *htab
16051 = (struct elf32_arm_link_hash_table *)ret;
16052 /* There is no PLT header for Symbian OS. */
16053 htab->plt_header_size = 0;
16054 /* The PLT entries are each one instruction and one word. */
16055 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
16056 htab->symbian_p = 1;
16057 /* Symbian uses armv5t or above, so use_blx is always true. */
16058 htab->use_blx = 1;
16059 htab->root.is_relocatable_executable = 1;
16060 }
16061 return ret;
16062 }
16063
16064 static const struct bfd_elf_special_section
16065 elf32_arm_symbian_special_sections[] =
16066 {
16067 /* In a BPABI executable, the dynamic linking sections do not go in
16068 the loadable read-only segment. The post-linker may wish to
16069 refer to these sections, but they are not part of the final
16070 program image. */
16071 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
16072 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
16073 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
16074 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
16075 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
16076 /* These sections do not need to be writable as the SymbianOS
16077 postlinker will arrange things so that no dynamic relocation is
16078 required. */
16079 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
16080 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
16081 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
16082 { NULL, 0, 0, 0, 0 }
16083 };
16084
16085 static void
16086 elf32_arm_symbian_begin_write_processing (bfd *abfd,
16087 struct bfd_link_info *link_info)
16088 {
16089 /* BPABI objects are never loaded directly by an OS kernel; they are
16090 processed by a postlinker first, into an OS-specific format. If
16091 the D_PAGED bit is set on the file, BFD will align segments on
16092 page boundaries, so that an OS can directly map the file. With
16093 BPABI objects, that just results in wasted space. In addition,
16094 because we clear the D_PAGED bit, map_sections_to_segments will
16095 recognize that the program headers should not be mapped into any
16096 loadable segment. */
16097 abfd->flags &= ~D_PAGED;
16098 elf32_arm_begin_write_processing (abfd, link_info);
16099 }
16100
16101 static bfd_boolean
16102 elf32_arm_symbian_modify_segment_map (bfd *abfd,
16103 struct bfd_link_info *info)
16104 {
16105 struct elf_segment_map *m;
16106 asection *dynsec;
16107
16108 /* BPABI shared libraries and executables should have a PT_DYNAMIC
16109 segment. However, because the .dynamic section is not marked
16110 with SEC_LOAD, the generic ELF code will not create such a
16111 segment. */
16112 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
16113 if (dynsec)
16114 {
16115 for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next)
16116 if (m->p_type == PT_DYNAMIC)
16117 break;
16118
16119 if (m == NULL)
16120 {
16121 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
16122 m->next = elf_tdata (abfd)->segment_map;
16123 elf_tdata (abfd)->segment_map = m;
16124 }
16125 }
16126
16127 /* Also call the generic arm routine. */
16128 return elf32_arm_modify_segment_map (abfd, info);
16129 }
16130
16131 /* Return address for Ith PLT stub in section PLT, for relocation REL
16132 or (bfd_vma) -1 if it should not be included. */
16133
16134 static bfd_vma
16135 elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
16136 const arelent *rel ATTRIBUTE_UNUSED)
16137 {
16138 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
16139 }
16140
16141
16142 #undef elf32_bed
16143 #define elf32_bed elf32_arm_symbian_bed
16144
16145 /* The dynamic sections are not allocated on SymbianOS; the postlinker
16146 will process them and then discard them. */
16147 #undef ELF_DYNAMIC_SEC_FLAGS
16148 #define ELF_DYNAMIC_SEC_FLAGS \
16149 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
16150
16151 #undef elf_backend_emit_relocs
16152
16153 #undef bfd_elf32_bfd_link_hash_table_create
16154 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
16155 #undef elf_backend_special_sections
16156 #define elf_backend_special_sections elf32_arm_symbian_special_sections
16157 #undef elf_backend_begin_write_processing
16158 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
16159 #undef elf_backend_final_write_processing
16160 #define elf_backend_final_write_processing elf32_arm_final_write_processing
16161
16162 #undef elf_backend_modify_segment_map
16163 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
16164
16165 /* There is no .got section for BPABI objects, and hence no header. */
16166 #undef elf_backend_got_header_size
16167 #define elf_backend_got_header_size 0
16168
16169 /* Similarly, there is no .got.plt section. */
16170 #undef elf_backend_want_got_plt
16171 #define elf_backend_want_got_plt 0
16172
16173 #undef elf_backend_plt_sym_val
16174 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
16175
16176 #undef elf_backend_may_use_rel_p
16177 #define elf_backend_may_use_rel_p 1
16178 #undef elf_backend_may_use_rela_p
16179 #define elf_backend_may_use_rela_p 0
16180 #undef elf_backend_default_use_rela_p
16181 #define elf_backend_default_use_rela_p 0
16182 #undef elf_backend_want_plt_sym
16183 #define elf_backend_want_plt_sym 0
16184 #undef ELF_MAXPAGESIZE
16185 #define ELF_MAXPAGESIZE 0x8000
16186
16187 #include "elf32-target.h"
GDB Binutils - Deliverables
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