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[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
1 /* 32-bit ELF support for ARM
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
3 2008, 2009, 2010, 2011, 2012 Free Software Foundation, Inc.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
21
22 #include "sysdep.h"
23 #include <limits.h>
24
25 #include "bfd.h"
26 #include "libiberty.h"
27 #include "libbfd.h"
28 #include "elf-bfd.h"
29 #include "elf-vxworks.h"
30 #include "elf/arm.h"
31
32 /* Return the relocation section associated with NAME. HTAB is the
33 bfd's elf32_arm_link_hash_entry. */
34 #define RELOC_SECTION(HTAB, NAME) \
35 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
36
37 /* Return size of a relocation entry. HTAB is the bfd's
38 elf32_arm_link_hash_entry. */
39 #define RELOC_SIZE(HTAB) \
40 ((HTAB)->use_rel \
41 ? sizeof (Elf32_External_Rel) \
42 : sizeof (Elf32_External_Rela))
43
44 /* Return function to swap relocations in. HTAB is the bfd's
45 elf32_arm_link_hash_entry. */
46 #define SWAP_RELOC_IN(HTAB) \
47 ((HTAB)->use_rel \
48 ? bfd_elf32_swap_reloc_in \
49 : bfd_elf32_swap_reloca_in)
50
51 /* Return function to swap relocations out. HTAB is the bfd's
52 elf32_arm_link_hash_entry. */
53 #define SWAP_RELOC_OUT(HTAB) \
54 ((HTAB)->use_rel \
55 ? bfd_elf32_swap_reloc_out \
56 : bfd_elf32_swap_reloca_out)
57
58 #define elf_info_to_howto 0
59 #define elf_info_to_howto_rel elf32_arm_info_to_howto
60
61 #define ARM_ELF_ABI_VERSION 0
62 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
63
64 static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
65 struct bfd_link_info *link_info,
66 asection *sec,
67 bfd_byte *contents);
68
69 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
70 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
71 in that slot. */
72
73 static reloc_howto_type elf32_arm_howto_table_1[] =
74 {
75 /* No relocation. */
76 HOWTO (R_ARM_NONE, /* type */
77 0, /* rightshift */
78 0, /* size (0 = byte, 1 = short, 2 = long) */
79 0, /* bitsize */
80 FALSE, /* pc_relative */
81 0, /* bitpos */
82 complain_overflow_dont,/* complain_on_overflow */
83 bfd_elf_generic_reloc, /* special_function */
84 "R_ARM_NONE", /* name */
85 FALSE, /* partial_inplace */
86 0, /* src_mask */
87 0, /* dst_mask */
88 FALSE), /* pcrel_offset */
89
90 HOWTO (R_ARM_PC24, /* type */
91 2, /* rightshift */
92 2, /* size (0 = byte, 1 = short, 2 = long) */
93 24, /* bitsize */
94 TRUE, /* pc_relative */
95 0, /* bitpos */
96 complain_overflow_signed,/* complain_on_overflow */
97 bfd_elf_generic_reloc, /* special_function */
98 "R_ARM_PC24", /* name */
99 FALSE, /* partial_inplace */
100 0x00ffffff, /* src_mask */
101 0x00ffffff, /* dst_mask */
102 TRUE), /* pcrel_offset */
103
104 /* 32 bit absolute */
105 HOWTO (R_ARM_ABS32, /* type */
106 0, /* rightshift */
107 2, /* size (0 = byte, 1 = short, 2 = long) */
108 32, /* bitsize */
109 FALSE, /* pc_relative */
110 0, /* bitpos */
111 complain_overflow_bitfield,/* complain_on_overflow */
112 bfd_elf_generic_reloc, /* special_function */
113 "R_ARM_ABS32", /* name */
114 FALSE, /* partial_inplace */
115 0xffffffff, /* src_mask */
116 0xffffffff, /* dst_mask */
117 FALSE), /* pcrel_offset */
118
119 /* standard 32bit pc-relative reloc */
120 HOWTO (R_ARM_REL32, /* type */
121 0, /* rightshift */
122 2, /* size (0 = byte, 1 = short, 2 = long) */
123 32, /* bitsize */
124 TRUE, /* pc_relative */
125 0, /* bitpos */
126 complain_overflow_bitfield,/* complain_on_overflow */
127 bfd_elf_generic_reloc, /* special_function */
128 "R_ARM_REL32", /* name */
129 FALSE, /* partial_inplace */
130 0xffffffff, /* src_mask */
131 0xffffffff, /* dst_mask */
132 TRUE), /* pcrel_offset */
133
134 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
135 HOWTO (R_ARM_LDR_PC_G0, /* type */
136 0, /* rightshift */
137 0, /* size (0 = byte, 1 = short, 2 = long) */
138 32, /* bitsize */
139 TRUE, /* pc_relative */
140 0, /* bitpos */
141 complain_overflow_dont,/* complain_on_overflow */
142 bfd_elf_generic_reloc, /* special_function */
143 "R_ARM_LDR_PC_G0", /* name */
144 FALSE, /* partial_inplace */
145 0xffffffff, /* src_mask */
146 0xffffffff, /* dst_mask */
147 TRUE), /* pcrel_offset */
148
149 /* 16 bit absolute */
150 HOWTO (R_ARM_ABS16, /* type */
151 0, /* rightshift */
152 1, /* size (0 = byte, 1 = short, 2 = long) */
153 16, /* bitsize */
154 FALSE, /* pc_relative */
155 0, /* bitpos */
156 complain_overflow_bitfield,/* complain_on_overflow */
157 bfd_elf_generic_reloc, /* special_function */
158 "R_ARM_ABS16", /* name */
159 FALSE, /* partial_inplace */
160 0x0000ffff, /* src_mask */
161 0x0000ffff, /* dst_mask */
162 FALSE), /* pcrel_offset */
163
164 /* 12 bit absolute */
165 HOWTO (R_ARM_ABS12, /* type */
166 0, /* rightshift */
167 2, /* size (0 = byte, 1 = short, 2 = long) */
168 12, /* bitsize */
169 FALSE, /* pc_relative */
170 0, /* bitpos */
171 complain_overflow_bitfield,/* complain_on_overflow */
172 bfd_elf_generic_reloc, /* special_function */
173 "R_ARM_ABS12", /* name */
174 FALSE, /* partial_inplace */
175 0x00000fff, /* src_mask */
176 0x00000fff, /* dst_mask */
177 FALSE), /* pcrel_offset */
178
179 HOWTO (R_ARM_THM_ABS5, /* type */
180 6, /* rightshift */
181 1, /* size (0 = byte, 1 = short, 2 = long) */
182 5, /* bitsize */
183 FALSE, /* pc_relative */
184 0, /* bitpos */
185 complain_overflow_bitfield,/* complain_on_overflow */
186 bfd_elf_generic_reloc, /* special_function */
187 "R_ARM_THM_ABS5", /* name */
188 FALSE, /* partial_inplace */
189 0x000007e0, /* src_mask */
190 0x000007e0, /* dst_mask */
191 FALSE), /* pcrel_offset */
192
193 /* 8 bit absolute */
194 HOWTO (R_ARM_ABS8, /* type */
195 0, /* rightshift */
196 0, /* size (0 = byte, 1 = short, 2 = long) */
197 8, /* bitsize */
198 FALSE, /* pc_relative */
199 0, /* bitpos */
200 complain_overflow_bitfield,/* complain_on_overflow */
201 bfd_elf_generic_reloc, /* special_function */
202 "R_ARM_ABS8", /* name */
203 FALSE, /* partial_inplace */
204 0x000000ff, /* src_mask */
205 0x000000ff, /* dst_mask */
206 FALSE), /* pcrel_offset */
207
208 HOWTO (R_ARM_SBREL32, /* type */
209 0, /* rightshift */
210 2, /* size (0 = byte, 1 = short, 2 = long) */
211 32, /* bitsize */
212 FALSE, /* pc_relative */
213 0, /* bitpos */
214 complain_overflow_dont,/* complain_on_overflow */
215 bfd_elf_generic_reloc, /* special_function */
216 "R_ARM_SBREL32", /* name */
217 FALSE, /* partial_inplace */
218 0xffffffff, /* src_mask */
219 0xffffffff, /* dst_mask */
220 FALSE), /* pcrel_offset */
221
222 HOWTO (R_ARM_THM_CALL, /* type */
223 1, /* rightshift */
224 2, /* size (0 = byte, 1 = short, 2 = long) */
225 24, /* bitsize */
226 TRUE, /* pc_relative */
227 0, /* bitpos */
228 complain_overflow_signed,/* complain_on_overflow */
229 bfd_elf_generic_reloc, /* special_function */
230 "R_ARM_THM_CALL", /* name */
231 FALSE, /* partial_inplace */
232 0x07ff2fff, /* src_mask */
233 0x07ff2fff, /* dst_mask */
234 TRUE), /* pcrel_offset */
235
236 HOWTO (R_ARM_THM_PC8, /* type */
237 1, /* rightshift */
238 1, /* size (0 = byte, 1 = short, 2 = long) */
239 8, /* bitsize */
240 TRUE, /* pc_relative */
241 0, /* bitpos */
242 complain_overflow_signed,/* complain_on_overflow */
243 bfd_elf_generic_reloc, /* special_function */
244 "R_ARM_THM_PC8", /* name */
245 FALSE, /* partial_inplace */
246 0x000000ff, /* src_mask */
247 0x000000ff, /* dst_mask */
248 TRUE), /* pcrel_offset */
249
250 HOWTO (R_ARM_BREL_ADJ, /* type */
251 1, /* rightshift */
252 1, /* size (0 = byte, 1 = short, 2 = long) */
253 32, /* bitsize */
254 FALSE, /* pc_relative */
255 0, /* bitpos */
256 complain_overflow_signed,/* complain_on_overflow */
257 bfd_elf_generic_reloc, /* special_function */
258 "R_ARM_BREL_ADJ", /* name */
259 FALSE, /* partial_inplace */
260 0xffffffff, /* src_mask */
261 0xffffffff, /* dst_mask */
262 FALSE), /* pcrel_offset */
263
264 HOWTO (R_ARM_TLS_DESC, /* type */
265 0, /* rightshift */
266 2, /* size (0 = byte, 1 = short, 2 = long) */
267 32, /* bitsize */
268 FALSE, /* pc_relative */
269 0, /* bitpos */
270 complain_overflow_bitfield,/* complain_on_overflow */
271 bfd_elf_generic_reloc, /* special_function */
272 "R_ARM_TLS_DESC", /* name */
273 FALSE, /* partial_inplace */
274 0xffffffff, /* src_mask */
275 0xffffffff, /* dst_mask */
276 FALSE), /* pcrel_offset */
277
278 HOWTO (R_ARM_THM_SWI8, /* type */
279 0, /* rightshift */
280 0, /* size (0 = byte, 1 = short, 2 = long) */
281 0, /* bitsize */
282 FALSE, /* pc_relative */
283 0, /* bitpos */
284 complain_overflow_signed,/* complain_on_overflow */
285 bfd_elf_generic_reloc, /* special_function */
286 "R_ARM_SWI8", /* name */
287 FALSE, /* partial_inplace */
288 0x00000000, /* src_mask */
289 0x00000000, /* dst_mask */
290 FALSE), /* pcrel_offset */
291
292 /* BLX instruction for the ARM. */
293 HOWTO (R_ARM_XPC25, /* type */
294 2, /* rightshift */
295 2, /* size (0 = byte, 1 = short, 2 = long) */
296 24, /* bitsize */
297 TRUE, /* pc_relative */
298 0, /* bitpos */
299 complain_overflow_signed,/* complain_on_overflow */
300 bfd_elf_generic_reloc, /* special_function */
301 "R_ARM_XPC25", /* name */
302 FALSE, /* partial_inplace */
303 0x00ffffff, /* src_mask */
304 0x00ffffff, /* dst_mask */
305 TRUE), /* pcrel_offset */
306
307 /* BLX instruction for the Thumb. */
308 HOWTO (R_ARM_THM_XPC22, /* type */
309 2, /* rightshift */
310 2, /* size (0 = byte, 1 = short, 2 = long) */
311 24, /* bitsize */
312 TRUE, /* pc_relative */
313 0, /* bitpos */
314 complain_overflow_signed,/* complain_on_overflow */
315 bfd_elf_generic_reloc, /* special_function */
316 "R_ARM_THM_XPC22", /* name */
317 FALSE, /* partial_inplace */
318 0x07ff2fff, /* src_mask */
319 0x07ff2fff, /* dst_mask */
320 TRUE), /* pcrel_offset */
321
322 /* Dynamic TLS relocations. */
323
324 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
325 0, /* rightshift */
326 2, /* size (0 = byte, 1 = short, 2 = long) */
327 32, /* bitsize */
328 FALSE, /* pc_relative */
329 0, /* bitpos */
330 complain_overflow_bitfield,/* complain_on_overflow */
331 bfd_elf_generic_reloc, /* special_function */
332 "R_ARM_TLS_DTPMOD32", /* name */
333 TRUE, /* partial_inplace */
334 0xffffffff, /* src_mask */
335 0xffffffff, /* dst_mask */
336 FALSE), /* pcrel_offset */
337
338 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
339 0, /* rightshift */
340 2, /* size (0 = byte, 1 = short, 2 = long) */
341 32, /* bitsize */
342 FALSE, /* pc_relative */
343 0, /* bitpos */
344 complain_overflow_bitfield,/* complain_on_overflow */
345 bfd_elf_generic_reloc, /* special_function */
346 "R_ARM_TLS_DTPOFF32", /* name */
347 TRUE, /* partial_inplace */
348 0xffffffff, /* src_mask */
349 0xffffffff, /* dst_mask */
350 FALSE), /* pcrel_offset */
351
352 HOWTO (R_ARM_TLS_TPOFF32, /* type */
353 0, /* rightshift */
354 2, /* size (0 = byte, 1 = short, 2 = long) */
355 32, /* bitsize */
356 FALSE, /* pc_relative */
357 0, /* bitpos */
358 complain_overflow_bitfield,/* complain_on_overflow */
359 bfd_elf_generic_reloc, /* special_function */
360 "R_ARM_TLS_TPOFF32", /* name */
361 TRUE, /* partial_inplace */
362 0xffffffff, /* src_mask */
363 0xffffffff, /* dst_mask */
364 FALSE), /* pcrel_offset */
365
366 /* Relocs used in ARM Linux */
367
368 HOWTO (R_ARM_COPY, /* type */
369 0, /* rightshift */
370 2, /* size (0 = byte, 1 = short, 2 = long) */
371 32, /* bitsize */
372 FALSE, /* pc_relative */
373 0, /* bitpos */
374 complain_overflow_bitfield,/* complain_on_overflow */
375 bfd_elf_generic_reloc, /* special_function */
376 "R_ARM_COPY", /* name */
377 TRUE, /* partial_inplace */
378 0xffffffff, /* src_mask */
379 0xffffffff, /* dst_mask */
380 FALSE), /* pcrel_offset */
381
382 HOWTO (R_ARM_GLOB_DAT, /* type */
383 0, /* rightshift */
384 2, /* size (0 = byte, 1 = short, 2 = long) */
385 32, /* bitsize */
386 FALSE, /* pc_relative */
387 0, /* bitpos */
388 complain_overflow_bitfield,/* complain_on_overflow */
389 bfd_elf_generic_reloc, /* special_function */
390 "R_ARM_GLOB_DAT", /* name */
391 TRUE, /* partial_inplace */
392 0xffffffff, /* src_mask */
393 0xffffffff, /* dst_mask */
394 FALSE), /* pcrel_offset */
395
396 HOWTO (R_ARM_JUMP_SLOT, /* type */
397 0, /* rightshift */
398 2, /* size (0 = byte, 1 = short, 2 = long) */
399 32, /* bitsize */
400 FALSE, /* pc_relative */
401 0, /* bitpos */
402 complain_overflow_bitfield,/* complain_on_overflow */
403 bfd_elf_generic_reloc, /* special_function */
404 "R_ARM_JUMP_SLOT", /* name */
405 TRUE, /* partial_inplace */
406 0xffffffff, /* src_mask */
407 0xffffffff, /* dst_mask */
408 FALSE), /* pcrel_offset */
409
410 HOWTO (R_ARM_RELATIVE, /* type */
411 0, /* rightshift */
412 2, /* size (0 = byte, 1 = short, 2 = long) */
413 32, /* bitsize */
414 FALSE, /* pc_relative */
415 0, /* bitpos */
416 complain_overflow_bitfield,/* complain_on_overflow */
417 bfd_elf_generic_reloc, /* special_function */
418 "R_ARM_RELATIVE", /* name */
419 TRUE, /* partial_inplace */
420 0xffffffff, /* src_mask */
421 0xffffffff, /* dst_mask */
422 FALSE), /* pcrel_offset */
423
424 HOWTO (R_ARM_GOTOFF32, /* type */
425 0, /* rightshift */
426 2, /* size (0 = byte, 1 = short, 2 = long) */
427 32, /* bitsize */
428 FALSE, /* pc_relative */
429 0, /* bitpos */
430 complain_overflow_bitfield,/* complain_on_overflow */
431 bfd_elf_generic_reloc, /* special_function */
432 "R_ARM_GOTOFF32", /* name */
433 TRUE, /* partial_inplace */
434 0xffffffff, /* src_mask */
435 0xffffffff, /* dst_mask */
436 FALSE), /* pcrel_offset */
437
438 HOWTO (R_ARM_GOTPC, /* type */
439 0, /* rightshift */
440 2, /* size (0 = byte, 1 = short, 2 = long) */
441 32, /* bitsize */
442 TRUE, /* pc_relative */
443 0, /* bitpos */
444 complain_overflow_bitfield,/* complain_on_overflow */
445 bfd_elf_generic_reloc, /* special_function */
446 "R_ARM_GOTPC", /* name */
447 TRUE, /* partial_inplace */
448 0xffffffff, /* src_mask */
449 0xffffffff, /* dst_mask */
450 TRUE), /* pcrel_offset */
451
452 HOWTO (R_ARM_GOT32, /* type */
453 0, /* rightshift */
454 2, /* size (0 = byte, 1 = short, 2 = long) */
455 32, /* bitsize */
456 FALSE, /* pc_relative */
457 0, /* bitpos */
458 complain_overflow_bitfield,/* complain_on_overflow */
459 bfd_elf_generic_reloc, /* special_function */
460 "R_ARM_GOT32", /* name */
461 TRUE, /* partial_inplace */
462 0xffffffff, /* src_mask */
463 0xffffffff, /* dst_mask */
464 FALSE), /* pcrel_offset */
465
466 HOWTO (R_ARM_PLT32, /* type */
467 2, /* rightshift */
468 2, /* size (0 = byte, 1 = short, 2 = long) */
469 24, /* bitsize */
470 TRUE, /* pc_relative */
471 0, /* bitpos */
472 complain_overflow_bitfield,/* complain_on_overflow */
473 bfd_elf_generic_reloc, /* special_function */
474 "R_ARM_PLT32", /* name */
475 FALSE, /* partial_inplace */
476 0x00ffffff, /* src_mask */
477 0x00ffffff, /* dst_mask */
478 TRUE), /* pcrel_offset */
479
480 HOWTO (R_ARM_CALL, /* type */
481 2, /* rightshift */
482 2, /* size (0 = byte, 1 = short, 2 = long) */
483 24, /* bitsize */
484 TRUE, /* pc_relative */
485 0, /* bitpos */
486 complain_overflow_signed,/* complain_on_overflow */
487 bfd_elf_generic_reloc, /* special_function */
488 "R_ARM_CALL", /* name */
489 FALSE, /* partial_inplace */
490 0x00ffffff, /* src_mask */
491 0x00ffffff, /* dst_mask */
492 TRUE), /* pcrel_offset */
493
494 HOWTO (R_ARM_JUMP24, /* type */
495 2, /* rightshift */
496 2, /* size (0 = byte, 1 = short, 2 = long) */
497 24, /* bitsize */
498 TRUE, /* pc_relative */
499 0, /* bitpos */
500 complain_overflow_signed,/* complain_on_overflow */
501 bfd_elf_generic_reloc, /* special_function */
502 "R_ARM_JUMP24", /* name */
503 FALSE, /* partial_inplace */
504 0x00ffffff, /* src_mask */
505 0x00ffffff, /* dst_mask */
506 TRUE), /* pcrel_offset */
507
508 HOWTO (R_ARM_THM_JUMP24, /* type */
509 1, /* rightshift */
510 2, /* size (0 = byte, 1 = short, 2 = long) */
511 24, /* bitsize */
512 TRUE, /* pc_relative */
513 0, /* bitpos */
514 complain_overflow_signed,/* complain_on_overflow */
515 bfd_elf_generic_reloc, /* special_function */
516 "R_ARM_THM_JUMP24", /* name */
517 FALSE, /* partial_inplace */
518 0x07ff2fff, /* src_mask */
519 0x07ff2fff, /* dst_mask */
520 TRUE), /* pcrel_offset */
521
522 HOWTO (R_ARM_BASE_ABS, /* type */
523 0, /* rightshift */
524 2, /* size (0 = byte, 1 = short, 2 = long) */
525 32, /* bitsize */
526 FALSE, /* pc_relative */
527 0, /* bitpos */
528 complain_overflow_dont,/* complain_on_overflow */
529 bfd_elf_generic_reloc, /* special_function */
530 "R_ARM_BASE_ABS", /* name */
531 FALSE, /* partial_inplace */
532 0xffffffff, /* src_mask */
533 0xffffffff, /* dst_mask */
534 FALSE), /* pcrel_offset */
535
536 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
537 0, /* rightshift */
538 2, /* size (0 = byte, 1 = short, 2 = long) */
539 12, /* bitsize */
540 TRUE, /* pc_relative */
541 0, /* bitpos */
542 complain_overflow_dont,/* complain_on_overflow */
543 bfd_elf_generic_reloc, /* special_function */
544 "R_ARM_ALU_PCREL_7_0", /* name */
545 FALSE, /* partial_inplace */
546 0x00000fff, /* src_mask */
547 0x00000fff, /* dst_mask */
548 TRUE), /* pcrel_offset */
549
550 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
551 0, /* rightshift */
552 2, /* size (0 = byte, 1 = short, 2 = long) */
553 12, /* bitsize */
554 TRUE, /* pc_relative */
555 8, /* bitpos */
556 complain_overflow_dont,/* complain_on_overflow */
557 bfd_elf_generic_reloc, /* special_function */
558 "R_ARM_ALU_PCREL_15_8",/* name */
559 FALSE, /* partial_inplace */
560 0x00000fff, /* src_mask */
561 0x00000fff, /* dst_mask */
562 TRUE), /* pcrel_offset */
563
564 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
565 0, /* rightshift */
566 2, /* size (0 = byte, 1 = short, 2 = long) */
567 12, /* bitsize */
568 TRUE, /* pc_relative */
569 16, /* bitpos */
570 complain_overflow_dont,/* complain_on_overflow */
571 bfd_elf_generic_reloc, /* special_function */
572 "R_ARM_ALU_PCREL_23_15",/* name */
573 FALSE, /* partial_inplace */
574 0x00000fff, /* src_mask */
575 0x00000fff, /* dst_mask */
576 TRUE), /* pcrel_offset */
577
578 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
579 0, /* rightshift */
580 2, /* size (0 = byte, 1 = short, 2 = long) */
581 12, /* bitsize */
582 FALSE, /* pc_relative */
583 0, /* bitpos */
584 complain_overflow_dont,/* complain_on_overflow */
585 bfd_elf_generic_reloc, /* special_function */
586 "R_ARM_LDR_SBREL_11_0",/* name */
587 FALSE, /* partial_inplace */
588 0x00000fff, /* src_mask */
589 0x00000fff, /* dst_mask */
590 FALSE), /* pcrel_offset */
591
592 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
593 0, /* rightshift */
594 2, /* size (0 = byte, 1 = short, 2 = long) */
595 8, /* bitsize */
596 FALSE, /* pc_relative */
597 12, /* bitpos */
598 complain_overflow_dont,/* complain_on_overflow */
599 bfd_elf_generic_reloc, /* special_function */
600 "R_ARM_ALU_SBREL_19_12",/* name */
601 FALSE, /* partial_inplace */
602 0x000ff000, /* src_mask */
603 0x000ff000, /* dst_mask */
604 FALSE), /* pcrel_offset */
605
606 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
607 0, /* rightshift */
608 2, /* size (0 = byte, 1 = short, 2 = long) */
609 8, /* bitsize */
610 FALSE, /* pc_relative */
611 20, /* bitpos */
612 complain_overflow_dont,/* complain_on_overflow */
613 bfd_elf_generic_reloc, /* special_function */
614 "R_ARM_ALU_SBREL_27_20",/* name */
615 FALSE, /* partial_inplace */
616 0x0ff00000, /* src_mask */
617 0x0ff00000, /* dst_mask */
618 FALSE), /* pcrel_offset */
619
620 HOWTO (R_ARM_TARGET1, /* type */
621 0, /* rightshift */
622 2, /* size (0 = byte, 1 = short, 2 = long) */
623 32, /* bitsize */
624 FALSE, /* pc_relative */
625 0, /* bitpos */
626 complain_overflow_dont,/* complain_on_overflow */
627 bfd_elf_generic_reloc, /* special_function */
628 "R_ARM_TARGET1", /* name */
629 FALSE, /* partial_inplace */
630 0xffffffff, /* src_mask */
631 0xffffffff, /* dst_mask */
632 FALSE), /* pcrel_offset */
633
634 HOWTO (R_ARM_ROSEGREL32, /* type */
635 0, /* rightshift */
636 2, /* size (0 = byte, 1 = short, 2 = long) */
637 32, /* bitsize */
638 FALSE, /* pc_relative */
639 0, /* bitpos */
640 complain_overflow_dont,/* complain_on_overflow */
641 bfd_elf_generic_reloc, /* special_function */
642 "R_ARM_ROSEGREL32", /* name */
643 FALSE, /* partial_inplace */
644 0xffffffff, /* src_mask */
645 0xffffffff, /* dst_mask */
646 FALSE), /* pcrel_offset */
647
648 HOWTO (R_ARM_V4BX, /* type */
649 0, /* rightshift */
650 2, /* size (0 = byte, 1 = short, 2 = long) */
651 32, /* bitsize */
652 FALSE, /* pc_relative */
653 0, /* bitpos */
654 complain_overflow_dont,/* complain_on_overflow */
655 bfd_elf_generic_reloc, /* special_function */
656 "R_ARM_V4BX", /* name */
657 FALSE, /* partial_inplace */
658 0xffffffff, /* src_mask */
659 0xffffffff, /* dst_mask */
660 FALSE), /* pcrel_offset */
661
662 HOWTO (R_ARM_TARGET2, /* type */
663 0, /* rightshift */
664 2, /* size (0 = byte, 1 = short, 2 = long) */
665 32, /* bitsize */
666 FALSE, /* pc_relative */
667 0, /* bitpos */
668 complain_overflow_signed,/* complain_on_overflow */
669 bfd_elf_generic_reloc, /* special_function */
670 "R_ARM_TARGET2", /* name */
671 FALSE, /* partial_inplace */
672 0xffffffff, /* src_mask */
673 0xffffffff, /* dst_mask */
674 TRUE), /* pcrel_offset */
675
676 HOWTO (R_ARM_PREL31, /* type */
677 0, /* rightshift */
678 2, /* size (0 = byte, 1 = short, 2 = long) */
679 31, /* bitsize */
680 TRUE, /* pc_relative */
681 0, /* bitpos */
682 complain_overflow_signed,/* complain_on_overflow */
683 bfd_elf_generic_reloc, /* special_function */
684 "R_ARM_PREL31", /* name */
685 FALSE, /* partial_inplace */
686 0x7fffffff, /* src_mask */
687 0x7fffffff, /* dst_mask */
688 TRUE), /* pcrel_offset */
689
690 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
691 0, /* rightshift */
692 2, /* size (0 = byte, 1 = short, 2 = long) */
693 16, /* bitsize */
694 FALSE, /* pc_relative */
695 0, /* bitpos */
696 complain_overflow_dont,/* complain_on_overflow */
697 bfd_elf_generic_reloc, /* special_function */
698 "R_ARM_MOVW_ABS_NC", /* name */
699 FALSE, /* partial_inplace */
700 0x000f0fff, /* src_mask */
701 0x000f0fff, /* dst_mask */
702 FALSE), /* pcrel_offset */
703
704 HOWTO (R_ARM_MOVT_ABS, /* type */
705 0, /* rightshift */
706 2, /* size (0 = byte, 1 = short, 2 = long) */
707 16, /* bitsize */
708 FALSE, /* pc_relative */
709 0, /* bitpos */
710 complain_overflow_bitfield,/* complain_on_overflow */
711 bfd_elf_generic_reloc, /* special_function */
712 "R_ARM_MOVT_ABS", /* name */
713 FALSE, /* partial_inplace */
714 0x000f0fff, /* src_mask */
715 0x000f0fff, /* dst_mask */
716 FALSE), /* pcrel_offset */
717
718 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
719 0, /* rightshift */
720 2, /* size (0 = byte, 1 = short, 2 = long) */
721 16, /* bitsize */
722 TRUE, /* pc_relative */
723 0, /* bitpos */
724 complain_overflow_dont,/* complain_on_overflow */
725 bfd_elf_generic_reloc, /* special_function */
726 "R_ARM_MOVW_PREL_NC", /* name */
727 FALSE, /* partial_inplace */
728 0x000f0fff, /* src_mask */
729 0x000f0fff, /* dst_mask */
730 TRUE), /* pcrel_offset */
731
732 HOWTO (R_ARM_MOVT_PREL, /* type */
733 0, /* rightshift */
734 2, /* size (0 = byte, 1 = short, 2 = long) */
735 16, /* bitsize */
736 TRUE, /* pc_relative */
737 0, /* bitpos */
738 complain_overflow_bitfield,/* complain_on_overflow */
739 bfd_elf_generic_reloc, /* special_function */
740 "R_ARM_MOVT_PREL", /* name */
741 FALSE, /* partial_inplace */
742 0x000f0fff, /* src_mask */
743 0x000f0fff, /* dst_mask */
744 TRUE), /* pcrel_offset */
745
746 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
747 0, /* rightshift */
748 2, /* size (0 = byte, 1 = short, 2 = long) */
749 16, /* bitsize */
750 FALSE, /* pc_relative */
751 0, /* bitpos */
752 complain_overflow_dont,/* complain_on_overflow */
753 bfd_elf_generic_reloc, /* special_function */
754 "R_ARM_THM_MOVW_ABS_NC",/* name */
755 FALSE, /* partial_inplace */
756 0x040f70ff, /* src_mask */
757 0x040f70ff, /* dst_mask */
758 FALSE), /* pcrel_offset */
759
760 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
761 0, /* rightshift */
762 2, /* size (0 = byte, 1 = short, 2 = long) */
763 16, /* bitsize */
764 FALSE, /* pc_relative */
765 0, /* bitpos */
766 complain_overflow_bitfield,/* complain_on_overflow */
767 bfd_elf_generic_reloc, /* special_function */
768 "R_ARM_THM_MOVT_ABS", /* name */
769 FALSE, /* partial_inplace */
770 0x040f70ff, /* src_mask */
771 0x040f70ff, /* dst_mask */
772 FALSE), /* pcrel_offset */
773
774 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
775 0, /* rightshift */
776 2, /* size (0 = byte, 1 = short, 2 = long) */
777 16, /* bitsize */
778 TRUE, /* pc_relative */
779 0, /* bitpos */
780 complain_overflow_dont,/* complain_on_overflow */
781 bfd_elf_generic_reloc, /* special_function */
782 "R_ARM_THM_MOVW_PREL_NC",/* name */
783 FALSE, /* partial_inplace */
784 0x040f70ff, /* src_mask */
785 0x040f70ff, /* dst_mask */
786 TRUE), /* pcrel_offset */
787
788 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
789 0, /* rightshift */
790 2, /* size (0 = byte, 1 = short, 2 = long) */
791 16, /* bitsize */
792 TRUE, /* pc_relative */
793 0, /* bitpos */
794 complain_overflow_bitfield,/* complain_on_overflow */
795 bfd_elf_generic_reloc, /* special_function */
796 "R_ARM_THM_MOVT_PREL", /* name */
797 FALSE, /* partial_inplace */
798 0x040f70ff, /* src_mask */
799 0x040f70ff, /* dst_mask */
800 TRUE), /* pcrel_offset */
801
802 HOWTO (R_ARM_THM_JUMP19, /* type */
803 1, /* rightshift */
804 2, /* size (0 = byte, 1 = short, 2 = long) */
805 19, /* bitsize */
806 TRUE, /* pc_relative */
807 0, /* bitpos */
808 complain_overflow_signed,/* complain_on_overflow */
809 bfd_elf_generic_reloc, /* special_function */
810 "R_ARM_THM_JUMP19", /* name */
811 FALSE, /* partial_inplace */
812 0x043f2fff, /* src_mask */
813 0x043f2fff, /* dst_mask */
814 TRUE), /* pcrel_offset */
815
816 HOWTO (R_ARM_THM_JUMP6, /* type */
817 1, /* rightshift */
818 1, /* size (0 = byte, 1 = short, 2 = long) */
819 6, /* bitsize */
820 TRUE, /* pc_relative */
821 0, /* bitpos */
822 complain_overflow_unsigned,/* complain_on_overflow */
823 bfd_elf_generic_reloc, /* special_function */
824 "R_ARM_THM_JUMP6", /* name */
825 FALSE, /* partial_inplace */
826 0x02f8, /* src_mask */
827 0x02f8, /* dst_mask */
828 TRUE), /* pcrel_offset */
829
830 /* These are declared as 13-bit signed relocations because we can
831 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
832 versa. */
833 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
834 0, /* rightshift */
835 2, /* size (0 = byte, 1 = short, 2 = long) */
836 13, /* bitsize */
837 TRUE, /* pc_relative */
838 0, /* bitpos */
839 complain_overflow_dont,/* complain_on_overflow */
840 bfd_elf_generic_reloc, /* special_function */
841 "R_ARM_THM_ALU_PREL_11_0",/* name */
842 FALSE, /* partial_inplace */
843 0xffffffff, /* src_mask */
844 0xffffffff, /* dst_mask */
845 TRUE), /* pcrel_offset */
846
847 HOWTO (R_ARM_THM_PC12, /* type */
848 0, /* rightshift */
849 2, /* size (0 = byte, 1 = short, 2 = long) */
850 13, /* bitsize */
851 TRUE, /* pc_relative */
852 0, /* bitpos */
853 complain_overflow_dont,/* complain_on_overflow */
854 bfd_elf_generic_reloc, /* special_function */
855 "R_ARM_THM_PC12", /* name */
856 FALSE, /* partial_inplace */
857 0xffffffff, /* src_mask */
858 0xffffffff, /* dst_mask */
859 TRUE), /* pcrel_offset */
860
861 HOWTO (R_ARM_ABS32_NOI, /* type */
862 0, /* rightshift */
863 2, /* size (0 = byte, 1 = short, 2 = long) */
864 32, /* bitsize */
865 FALSE, /* pc_relative */
866 0, /* bitpos */
867 complain_overflow_dont,/* complain_on_overflow */
868 bfd_elf_generic_reloc, /* special_function */
869 "R_ARM_ABS32_NOI", /* name */
870 FALSE, /* partial_inplace */
871 0xffffffff, /* src_mask */
872 0xffffffff, /* dst_mask */
873 FALSE), /* pcrel_offset */
874
875 HOWTO (R_ARM_REL32_NOI, /* type */
876 0, /* rightshift */
877 2, /* size (0 = byte, 1 = short, 2 = long) */
878 32, /* bitsize */
879 TRUE, /* pc_relative */
880 0, /* bitpos */
881 complain_overflow_dont,/* complain_on_overflow */
882 bfd_elf_generic_reloc, /* special_function */
883 "R_ARM_REL32_NOI", /* name */
884 FALSE, /* partial_inplace */
885 0xffffffff, /* src_mask */
886 0xffffffff, /* dst_mask */
887 FALSE), /* pcrel_offset */
888
889 /* Group relocations. */
890
891 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
892 0, /* rightshift */
893 2, /* size (0 = byte, 1 = short, 2 = long) */
894 32, /* bitsize */
895 TRUE, /* pc_relative */
896 0, /* bitpos */
897 complain_overflow_dont,/* complain_on_overflow */
898 bfd_elf_generic_reloc, /* special_function */
899 "R_ARM_ALU_PC_G0_NC", /* name */
900 FALSE, /* partial_inplace */
901 0xffffffff, /* src_mask */
902 0xffffffff, /* dst_mask */
903 TRUE), /* pcrel_offset */
904
905 HOWTO (R_ARM_ALU_PC_G0, /* type */
906 0, /* rightshift */
907 2, /* size (0 = byte, 1 = short, 2 = long) */
908 32, /* bitsize */
909 TRUE, /* pc_relative */
910 0, /* bitpos */
911 complain_overflow_dont,/* complain_on_overflow */
912 bfd_elf_generic_reloc, /* special_function */
913 "R_ARM_ALU_PC_G0", /* name */
914 FALSE, /* partial_inplace */
915 0xffffffff, /* src_mask */
916 0xffffffff, /* dst_mask */
917 TRUE), /* pcrel_offset */
918
919 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
920 0, /* rightshift */
921 2, /* size (0 = byte, 1 = short, 2 = long) */
922 32, /* bitsize */
923 TRUE, /* pc_relative */
924 0, /* bitpos */
925 complain_overflow_dont,/* complain_on_overflow */
926 bfd_elf_generic_reloc, /* special_function */
927 "R_ARM_ALU_PC_G1_NC", /* name */
928 FALSE, /* partial_inplace */
929 0xffffffff, /* src_mask */
930 0xffffffff, /* dst_mask */
931 TRUE), /* pcrel_offset */
932
933 HOWTO (R_ARM_ALU_PC_G1, /* type */
934 0, /* rightshift */
935 2, /* size (0 = byte, 1 = short, 2 = long) */
936 32, /* bitsize */
937 TRUE, /* pc_relative */
938 0, /* bitpos */
939 complain_overflow_dont,/* complain_on_overflow */
940 bfd_elf_generic_reloc, /* special_function */
941 "R_ARM_ALU_PC_G1", /* name */
942 FALSE, /* partial_inplace */
943 0xffffffff, /* src_mask */
944 0xffffffff, /* dst_mask */
945 TRUE), /* pcrel_offset */
946
947 HOWTO (R_ARM_ALU_PC_G2, /* type */
948 0, /* rightshift */
949 2, /* size (0 = byte, 1 = short, 2 = long) */
950 32, /* bitsize */
951 TRUE, /* pc_relative */
952 0, /* bitpos */
953 complain_overflow_dont,/* complain_on_overflow */
954 bfd_elf_generic_reloc, /* special_function */
955 "R_ARM_ALU_PC_G2", /* name */
956 FALSE, /* partial_inplace */
957 0xffffffff, /* src_mask */
958 0xffffffff, /* dst_mask */
959 TRUE), /* pcrel_offset */
960
961 HOWTO (R_ARM_LDR_PC_G1, /* type */
962 0, /* rightshift */
963 2, /* size (0 = byte, 1 = short, 2 = long) */
964 32, /* bitsize */
965 TRUE, /* pc_relative */
966 0, /* bitpos */
967 complain_overflow_dont,/* complain_on_overflow */
968 bfd_elf_generic_reloc, /* special_function */
969 "R_ARM_LDR_PC_G1", /* name */
970 FALSE, /* partial_inplace */
971 0xffffffff, /* src_mask */
972 0xffffffff, /* dst_mask */
973 TRUE), /* pcrel_offset */
974
975 HOWTO (R_ARM_LDR_PC_G2, /* type */
976 0, /* rightshift */
977 2, /* size (0 = byte, 1 = short, 2 = long) */
978 32, /* bitsize */
979 TRUE, /* pc_relative */
980 0, /* bitpos */
981 complain_overflow_dont,/* complain_on_overflow */
982 bfd_elf_generic_reloc, /* special_function */
983 "R_ARM_LDR_PC_G2", /* name */
984 FALSE, /* partial_inplace */
985 0xffffffff, /* src_mask */
986 0xffffffff, /* dst_mask */
987 TRUE), /* pcrel_offset */
988
989 HOWTO (R_ARM_LDRS_PC_G0, /* type */
990 0, /* rightshift */
991 2, /* size (0 = byte, 1 = short, 2 = long) */
992 32, /* bitsize */
993 TRUE, /* pc_relative */
994 0, /* bitpos */
995 complain_overflow_dont,/* complain_on_overflow */
996 bfd_elf_generic_reloc, /* special_function */
997 "R_ARM_LDRS_PC_G0", /* name */
998 FALSE, /* partial_inplace */
999 0xffffffff, /* src_mask */
1000 0xffffffff, /* dst_mask */
1001 TRUE), /* pcrel_offset */
1002
1003 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1004 0, /* rightshift */
1005 2, /* size (0 = byte, 1 = short, 2 = long) */
1006 32, /* bitsize */
1007 TRUE, /* pc_relative */
1008 0, /* bitpos */
1009 complain_overflow_dont,/* complain_on_overflow */
1010 bfd_elf_generic_reloc, /* special_function */
1011 "R_ARM_LDRS_PC_G1", /* name */
1012 FALSE, /* partial_inplace */
1013 0xffffffff, /* src_mask */
1014 0xffffffff, /* dst_mask */
1015 TRUE), /* pcrel_offset */
1016
1017 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1018 0, /* rightshift */
1019 2, /* size (0 = byte, 1 = short, 2 = long) */
1020 32, /* bitsize */
1021 TRUE, /* pc_relative */
1022 0, /* bitpos */
1023 complain_overflow_dont,/* complain_on_overflow */
1024 bfd_elf_generic_reloc, /* special_function */
1025 "R_ARM_LDRS_PC_G2", /* name */
1026 FALSE, /* partial_inplace */
1027 0xffffffff, /* src_mask */
1028 0xffffffff, /* dst_mask */
1029 TRUE), /* pcrel_offset */
1030
1031 HOWTO (R_ARM_LDC_PC_G0, /* type */
1032 0, /* rightshift */
1033 2, /* size (0 = byte, 1 = short, 2 = long) */
1034 32, /* bitsize */
1035 TRUE, /* pc_relative */
1036 0, /* bitpos */
1037 complain_overflow_dont,/* complain_on_overflow */
1038 bfd_elf_generic_reloc, /* special_function */
1039 "R_ARM_LDC_PC_G0", /* name */
1040 FALSE, /* partial_inplace */
1041 0xffffffff, /* src_mask */
1042 0xffffffff, /* dst_mask */
1043 TRUE), /* pcrel_offset */
1044
1045 HOWTO (R_ARM_LDC_PC_G1, /* type */
1046 0, /* rightshift */
1047 2, /* size (0 = byte, 1 = short, 2 = long) */
1048 32, /* bitsize */
1049 TRUE, /* pc_relative */
1050 0, /* bitpos */
1051 complain_overflow_dont,/* complain_on_overflow */
1052 bfd_elf_generic_reloc, /* special_function */
1053 "R_ARM_LDC_PC_G1", /* name */
1054 FALSE, /* partial_inplace */
1055 0xffffffff, /* src_mask */
1056 0xffffffff, /* dst_mask */
1057 TRUE), /* pcrel_offset */
1058
1059 HOWTO (R_ARM_LDC_PC_G2, /* type */
1060 0, /* rightshift */
1061 2, /* size (0 = byte, 1 = short, 2 = long) */
1062 32, /* bitsize */
1063 TRUE, /* pc_relative */
1064 0, /* bitpos */
1065 complain_overflow_dont,/* complain_on_overflow */
1066 bfd_elf_generic_reloc, /* special_function */
1067 "R_ARM_LDC_PC_G2", /* name */
1068 FALSE, /* partial_inplace */
1069 0xffffffff, /* src_mask */
1070 0xffffffff, /* dst_mask */
1071 TRUE), /* pcrel_offset */
1072
1073 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1074 0, /* rightshift */
1075 2, /* size (0 = byte, 1 = short, 2 = long) */
1076 32, /* bitsize */
1077 TRUE, /* pc_relative */
1078 0, /* bitpos */
1079 complain_overflow_dont,/* complain_on_overflow */
1080 bfd_elf_generic_reloc, /* special_function */
1081 "R_ARM_ALU_SB_G0_NC", /* name */
1082 FALSE, /* partial_inplace */
1083 0xffffffff, /* src_mask */
1084 0xffffffff, /* dst_mask */
1085 TRUE), /* pcrel_offset */
1086
1087 HOWTO (R_ARM_ALU_SB_G0, /* type */
1088 0, /* rightshift */
1089 2, /* size (0 = byte, 1 = short, 2 = long) */
1090 32, /* bitsize */
1091 TRUE, /* pc_relative */
1092 0, /* bitpos */
1093 complain_overflow_dont,/* complain_on_overflow */
1094 bfd_elf_generic_reloc, /* special_function */
1095 "R_ARM_ALU_SB_G0", /* name */
1096 FALSE, /* partial_inplace */
1097 0xffffffff, /* src_mask */
1098 0xffffffff, /* dst_mask */
1099 TRUE), /* pcrel_offset */
1100
1101 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1102 0, /* rightshift */
1103 2, /* size (0 = byte, 1 = short, 2 = long) */
1104 32, /* bitsize */
1105 TRUE, /* pc_relative */
1106 0, /* bitpos */
1107 complain_overflow_dont,/* complain_on_overflow */
1108 bfd_elf_generic_reloc, /* special_function */
1109 "R_ARM_ALU_SB_G1_NC", /* name */
1110 FALSE, /* partial_inplace */
1111 0xffffffff, /* src_mask */
1112 0xffffffff, /* dst_mask */
1113 TRUE), /* pcrel_offset */
1114
1115 HOWTO (R_ARM_ALU_SB_G1, /* type */
1116 0, /* rightshift */
1117 2, /* size (0 = byte, 1 = short, 2 = long) */
1118 32, /* bitsize */
1119 TRUE, /* pc_relative */
1120 0, /* bitpos */
1121 complain_overflow_dont,/* complain_on_overflow */
1122 bfd_elf_generic_reloc, /* special_function */
1123 "R_ARM_ALU_SB_G1", /* name */
1124 FALSE, /* partial_inplace */
1125 0xffffffff, /* src_mask */
1126 0xffffffff, /* dst_mask */
1127 TRUE), /* pcrel_offset */
1128
1129 HOWTO (R_ARM_ALU_SB_G2, /* type */
1130 0, /* rightshift */
1131 2, /* size (0 = byte, 1 = short, 2 = long) */
1132 32, /* bitsize */
1133 TRUE, /* pc_relative */
1134 0, /* bitpos */
1135 complain_overflow_dont,/* complain_on_overflow */
1136 bfd_elf_generic_reloc, /* special_function */
1137 "R_ARM_ALU_SB_G2", /* name */
1138 FALSE, /* partial_inplace */
1139 0xffffffff, /* src_mask */
1140 0xffffffff, /* dst_mask */
1141 TRUE), /* pcrel_offset */
1142
1143 HOWTO (R_ARM_LDR_SB_G0, /* type */
1144 0, /* rightshift */
1145 2, /* size (0 = byte, 1 = short, 2 = long) */
1146 32, /* bitsize */
1147 TRUE, /* pc_relative */
1148 0, /* bitpos */
1149 complain_overflow_dont,/* complain_on_overflow */
1150 bfd_elf_generic_reloc, /* special_function */
1151 "R_ARM_LDR_SB_G0", /* name */
1152 FALSE, /* partial_inplace */
1153 0xffffffff, /* src_mask */
1154 0xffffffff, /* dst_mask */
1155 TRUE), /* pcrel_offset */
1156
1157 HOWTO (R_ARM_LDR_SB_G1, /* type */
1158 0, /* rightshift */
1159 2, /* size (0 = byte, 1 = short, 2 = long) */
1160 32, /* bitsize */
1161 TRUE, /* pc_relative */
1162 0, /* bitpos */
1163 complain_overflow_dont,/* complain_on_overflow */
1164 bfd_elf_generic_reloc, /* special_function */
1165 "R_ARM_LDR_SB_G1", /* name */
1166 FALSE, /* partial_inplace */
1167 0xffffffff, /* src_mask */
1168 0xffffffff, /* dst_mask */
1169 TRUE), /* pcrel_offset */
1170
1171 HOWTO (R_ARM_LDR_SB_G2, /* type */
1172 0, /* rightshift */
1173 2, /* size (0 = byte, 1 = short, 2 = long) */
1174 32, /* bitsize */
1175 TRUE, /* pc_relative */
1176 0, /* bitpos */
1177 complain_overflow_dont,/* complain_on_overflow */
1178 bfd_elf_generic_reloc, /* special_function */
1179 "R_ARM_LDR_SB_G2", /* name */
1180 FALSE, /* partial_inplace */
1181 0xffffffff, /* src_mask */
1182 0xffffffff, /* dst_mask */
1183 TRUE), /* pcrel_offset */
1184
1185 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1186 0, /* rightshift */
1187 2, /* size (0 = byte, 1 = short, 2 = long) */
1188 32, /* bitsize */
1189 TRUE, /* pc_relative */
1190 0, /* bitpos */
1191 complain_overflow_dont,/* complain_on_overflow */
1192 bfd_elf_generic_reloc, /* special_function */
1193 "R_ARM_LDRS_SB_G0", /* name */
1194 FALSE, /* partial_inplace */
1195 0xffffffff, /* src_mask */
1196 0xffffffff, /* dst_mask */
1197 TRUE), /* pcrel_offset */
1198
1199 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1200 0, /* rightshift */
1201 2, /* size (0 = byte, 1 = short, 2 = long) */
1202 32, /* bitsize */
1203 TRUE, /* pc_relative */
1204 0, /* bitpos */
1205 complain_overflow_dont,/* complain_on_overflow */
1206 bfd_elf_generic_reloc, /* special_function */
1207 "R_ARM_LDRS_SB_G1", /* name */
1208 FALSE, /* partial_inplace */
1209 0xffffffff, /* src_mask */
1210 0xffffffff, /* dst_mask */
1211 TRUE), /* pcrel_offset */
1212
1213 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1214 0, /* rightshift */
1215 2, /* size (0 = byte, 1 = short, 2 = long) */
1216 32, /* bitsize */
1217 TRUE, /* pc_relative */
1218 0, /* bitpos */
1219 complain_overflow_dont,/* complain_on_overflow */
1220 bfd_elf_generic_reloc, /* special_function */
1221 "R_ARM_LDRS_SB_G2", /* name */
1222 FALSE, /* partial_inplace */
1223 0xffffffff, /* src_mask */
1224 0xffffffff, /* dst_mask */
1225 TRUE), /* pcrel_offset */
1226
1227 HOWTO (R_ARM_LDC_SB_G0, /* type */
1228 0, /* rightshift */
1229 2, /* size (0 = byte, 1 = short, 2 = long) */
1230 32, /* bitsize */
1231 TRUE, /* pc_relative */
1232 0, /* bitpos */
1233 complain_overflow_dont,/* complain_on_overflow */
1234 bfd_elf_generic_reloc, /* special_function */
1235 "R_ARM_LDC_SB_G0", /* name */
1236 FALSE, /* partial_inplace */
1237 0xffffffff, /* src_mask */
1238 0xffffffff, /* dst_mask */
1239 TRUE), /* pcrel_offset */
1240
1241 HOWTO (R_ARM_LDC_SB_G1, /* type */
1242 0, /* rightshift */
1243 2, /* size (0 = byte, 1 = short, 2 = long) */
1244 32, /* bitsize */
1245 TRUE, /* pc_relative */
1246 0, /* bitpos */
1247 complain_overflow_dont,/* complain_on_overflow */
1248 bfd_elf_generic_reloc, /* special_function */
1249 "R_ARM_LDC_SB_G1", /* name */
1250 FALSE, /* partial_inplace */
1251 0xffffffff, /* src_mask */
1252 0xffffffff, /* dst_mask */
1253 TRUE), /* pcrel_offset */
1254
1255 HOWTO (R_ARM_LDC_SB_G2, /* type */
1256 0, /* rightshift */
1257 2, /* size (0 = byte, 1 = short, 2 = long) */
1258 32, /* bitsize */
1259 TRUE, /* pc_relative */
1260 0, /* bitpos */
1261 complain_overflow_dont,/* complain_on_overflow */
1262 bfd_elf_generic_reloc, /* special_function */
1263 "R_ARM_LDC_SB_G2", /* name */
1264 FALSE, /* partial_inplace */
1265 0xffffffff, /* src_mask */
1266 0xffffffff, /* dst_mask */
1267 TRUE), /* pcrel_offset */
1268
1269 /* End of group relocations. */
1270
1271 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1272 0, /* rightshift */
1273 2, /* size (0 = byte, 1 = short, 2 = long) */
1274 16, /* bitsize */
1275 FALSE, /* pc_relative */
1276 0, /* bitpos */
1277 complain_overflow_dont,/* complain_on_overflow */
1278 bfd_elf_generic_reloc, /* special_function */
1279 "R_ARM_MOVW_BREL_NC", /* name */
1280 FALSE, /* partial_inplace */
1281 0x0000ffff, /* src_mask */
1282 0x0000ffff, /* dst_mask */
1283 FALSE), /* pcrel_offset */
1284
1285 HOWTO (R_ARM_MOVT_BREL, /* type */
1286 0, /* rightshift */
1287 2, /* size (0 = byte, 1 = short, 2 = long) */
1288 16, /* bitsize */
1289 FALSE, /* pc_relative */
1290 0, /* bitpos */
1291 complain_overflow_bitfield,/* complain_on_overflow */
1292 bfd_elf_generic_reloc, /* special_function */
1293 "R_ARM_MOVT_BREL", /* name */
1294 FALSE, /* partial_inplace */
1295 0x0000ffff, /* src_mask */
1296 0x0000ffff, /* dst_mask */
1297 FALSE), /* pcrel_offset */
1298
1299 HOWTO (R_ARM_MOVW_BREL, /* type */
1300 0, /* rightshift */
1301 2, /* size (0 = byte, 1 = short, 2 = long) */
1302 16, /* bitsize */
1303 FALSE, /* pc_relative */
1304 0, /* bitpos */
1305 complain_overflow_dont,/* complain_on_overflow */
1306 bfd_elf_generic_reloc, /* special_function */
1307 "R_ARM_MOVW_BREL", /* name */
1308 FALSE, /* partial_inplace */
1309 0x0000ffff, /* src_mask */
1310 0x0000ffff, /* dst_mask */
1311 FALSE), /* pcrel_offset */
1312
1313 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1314 0, /* rightshift */
1315 2, /* size (0 = byte, 1 = short, 2 = long) */
1316 16, /* bitsize */
1317 FALSE, /* pc_relative */
1318 0, /* bitpos */
1319 complain_overflow_dont,/* complain_on_overflow */
1320 bfd_elf_generic_reloc, /* special_function */
1321 "R_ARM_THM_MOVW_BREL_NC",/* name */
1322 FALSE, /* partial_inplace */
1323 0x040f70ff, /* src_mask */
1324 0x040f70ff, /* dst_mask */
1325 FALSE), /* pcrel_offset */
1326
1327 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1328 0, /* rightshift */
1329 2, /* size (0 = byte, 1 = short, 2 = long) */
1330 16, /* bitsize */
1331 FALSE, /* pc_relative */
1332 0, /* bitpos */
1333 complain_overflow_bitfield,/* complain_on_overflow */
1334 bfd_elf_generic_reloc, /* special_function */
1335 "R_ARM_THM_MOVT_BREL", /* name */
1336 FALSE, /* partial_inplace */
1337 0x040f70ff, /* src_mask */
1338 0x040f70ff, /* dst_mask */
1339 FALSE), /* pcrel_offset */
1340
1341 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1342 0, /* rightshift */
1343 2, /* size (0 = byte, 1 = short, 2 = long) */
1344 16, /* bitsize */
1345 FALSE, /* pc_relative */
1346 0, /* bitpos */
1347 complain_overflow_dont,/* complain_on_overflow */
1348 bfd_elf_generic_reloc, /* special_function */
1349 "R_ARM_THM_MOVW_BREL", /* name */
1350 FALSE, /* partial_inplace */
1351 0x040f70ff, /* src_mask */
1352 0x040f70ff, /* dst_mask */
1353 FALSE), /* pcrel_offset */
1354
1355 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1356 0, /* rightshift */
1357 2, /* size (0 = byte, 1 = short, 2 = long) */
1358 32, /* bitsize */
1359 FALSE, /* pc_relative */
1360 0, /* bitpos */
1361 complain_overflow_bitfield,/* complain_on_overflow */
1362 NULL, /* special_function */
1363 "R_ARM_TLS_GOTDESC", /* name */
1364 TRUE, /* partial_inplace */
1365 0xffffffff, /* src_mask */
1366 0xffffffff, /* dst_mask */
1367 FALSE), /* pcrel_offset */
1368
1369 HOWTO (R_ARM_TLS_CALL, /* type */
1370 0, /* rightshift */
1371 2, /* size (0 = byte, 1 = short, 2 = long) */
1372 24, /* bitsize */
1373 FALSE, /* pc_relative */
1374 0, /* bitpos */
1375 complain_overflow_dont,/* complain_on_overflow */
1376 bfd_elf_generic_reloc, /* special_function */
1377 "R_ARM_TLS_CALL", /* name */
1378 FALSE, /* partial_inplace */
1379 0x00ffffff, /* src_mask */
1380 0x00ffffff, /* dst_mask */
1381 FALSE), /* pcrel_offset */
1382
1383 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1384 0, /* rightshift */
1385 2, /* size (0 = byte, 1 = short, 2 = long) */
1386 0, /* bitsize */
1387 FALSE, /* pc_relative */
1388 0, /* bitpos */
1389 complain_overflow_bitfield,/* complain_on_overflow */
1390 bfd_elf_generic_reloc, /* special_function */
1391 "R_ARM_TLS_DESCSEQ", /* name */
1392 FALSE, /* partial_inplace */
1393 0x00000000, /* src_mask */
1394 0x00000000, /* dst_mask */
1395 FALSE), /* pcrel_offset */
1396
1397 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1398 0, /* rightshift */
1399 2, /* size (0 = byte, 1 = short, 2 = long) */
1400 24, /* bitsize */
1401 FALSE, /* pc_relative */
1402 0, /* bitpos */
1403 complain_overflow_dont,/* complain_on_overflow */
1404 bfd_elf_generic_reloc, /* special_function */
1405 "R_ARM_THM_TLS_CALL", /* name */
1406 FALSE, /* partial_inplace */
1407 0x07ff07ff, /* src_mask */
1408 0x07ff07ff, /* dst_mask */
1409 FALSE), /* pcrel_offset */
1410
1411 HOWTO (R_ARM_PLT32_ABS, /* type */
1412 0, /* rightshift */
1413 2, /* size (0 = byte, 1 = short, 2 = long) */
1414 32, /* bitsize */
1415 FALSE, /* pc_relative */
1416 0, /* bitpos */
1417 complain_overflow_dont,/* complain_on_overflow */
1418 bfd_elf_generic_reloc, /* special_function */
1419 "R_ARM_PLT32_ABS", /* name */
1420 FALSE, /* partial_inplace */
1421 0xffffffff, /* src_mask */
1422 0xffffffff, /* dst_mask */
1423 FALSE), /* pcrel_offset */
1424
1425 HOWTO (R_ARM_GOT_ABS, /* type */
1426 0, /* rightshift */
1427 2, /* size (0 = byte, 1 = short, 2 = long) */
1428 32, /* bitsize */
1429 FALSE, /* pc_relative */
1430 0, /* bitpos */
1431 complain_overflow_dont,/* complain_on_overflow */
1432 bfd_elf_generic_reloc, /* special_function */
1433 "R_ARM_GOT_ABS", /* name */
1434 FALSE, /* partial_inplace */
1435 0xffffffff, /* src_mask */
1436 0xffffffff, /* dst_mask */
1437 FALSE), /* pcrel_offset */
1438
1439 HOWTO (R_ARM_GOT_PREL, /* type */
1440 0, /* rightshift */
1441 2, /* size (0 = byte, 1 = short, 2 = long) */
1442 32, /* bitsize */
1443 TRUE, /* pc_relative */
1444 0, /* bitpos */
1445 complain_overflow_dont, /* complain_on_overflow */
1446 bfd_elf_generic_reloc, /* special_function */
1447 "R_ARM_GOT_PREL", /* name */
1448 FALSE, /* partial_inplace */
1449 0xffffffff, /* src_mask */
1450 0xffffffff, /* dst_mask */
1451 TRUE), /* pcrel_offset */
1452
1453 HOWTO (R_ARM_GOT_BREL12, /* type */
1454 0, /* rightshift */
1455 2, /* size (0 = byte, 1 = short, 2 = long) */
1456 12, /* bitsize */
1457 FALSE, /* pc_relative */
1458 0, /* bitpos */
1459 complain_overflow_bitfield,/* complain_on_overflow */
1460 bfd_elf_generic_reloc, /* special_function */
1461 "R_ARM_GOT_BREL12", /* name */
1462 FALSE, /* partial_inplace */
1463 0x00000fff, /* src_mask */
1464 0x00000fff, /* dst_mask */
1465 FALSE), /* pcrel_offset */
1466
1467 HOWTO (R_ARM_GOTOFF12, /* type */
1468 0, /* rightshift */
1469 2, /* size (0 = byte, 1 = short, 2 = long) */
1470 12, /* bitsize */
1471 FALSE, /* pc_relative */
1472 0, /* bitpos */
1473 complain_overflow_bitfield,/* complain_on_overflow */
1474 bfd_elf_generic_reloc, /* special_function */
1475 "R_ARM_GOTOFF12", /* name */
1476 FALSE, /* partial_inplace */
1477 0x00000fff, /* src_mask */
1478 0x00000fff, /* dst_mask */
1479 FALSE), /* pcrel_offset */
1480
1481 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1482
1483 /* GNU extension to record C++ vtable member usage */
1484 HOWTO (R_ARM_GNU_VTENTRY, /* type */
1485 0, /* rightshift */
1486 2, /* size (0 = byte, 1 = short, 2 = long) */
1487 0, /* bitsize */
1488 FALSE, /* pc_relative */
1489 0, /* bitpos */
1490 complain_overflow_dont, /* complain_on_overflow */
1491 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1492 "R_ARM_GNU_VTENTRY", /* name */
1493 FALSE, /* partial_inplace */
1494 0, /* src_mask */
1495 0, /* dst_mask */
1496 FALSE), /* pcrel_offset */
1497
1498 /* GNU extension to record C++ vtable hierarchy */
1499 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1500 0, /* rightshift */
1501 2, /* size (0 = byte, 1 = short, 2 = long) */
1502 0, /* bitsize */
1503 FALSE, /* pc_relative */
1504 0, /* bitpos */
1505 complain_overflow_dont, /* complain_on_overflow */
1506 NULL, /* special_function */
1507 "R_ARM_GNU_VTINHERIT", /* name */
1508 FALSE, /* partial_inplace */
1509 0, /* src_mask */
1510 0, /* dst_mask */
1511 FALSE), /* pcrel_offset */
1512
1513 HOWTO (R_ARM_THM_JUMP11, /* type */
1514 1, /* rightshift */
1515 1, /* size (0 = byte, 1 = short, 2 = long) */
1516 11, /* bitsize */
1517 TRUE, /* pc_relative */
1518 0, /* bitpos */
1519 complain_overflow_signed, /* complain_on_overflow */
1520 bfd_elf_generic_reloc, /* special_function */
1521 "R_ARM_THM_JUMP11", /* name */
1522 FALSE, /* partial_inplace */
1523 0x000007ff, /* src_mask */
1524 0x000007ff, /* dst_mask */
1525 TRUE), /* pcrel_offset */
1526
1527 HOWTO (R_ARM_THM_JUMP8, /* type */
1528 1, /* rightshift */
1529 1, /* size (0 = byte, 1 = short, 2 = long) */
1530 8, /* bitsize */
1531 TRUE, /* pc_relative */
1532 0, /* bitpos */
1533 complain_overflow_signed, /* complain_on_overflow */
1534 bfd_elf_generic_reloc, /* special_function */
1535 "R_ARM_THM_JUMP8", /* name */
1536 FALSE, /* partial_inplace */
1537 0x000000ff, /* src_mask */
1538 0x000000ff, /* dst_mask */
1539 TRUE), /* pcrel_offset */
1540
1541 /* TLS relocations */
1542 HOWTO (R_ARM_TLS_GD32, /* type */
1543 0, /* rightshift */
1544 2, /* size (0 = byte, 1 = short, 2 = long) */
1545 32, /* bitsize */
1546 FALSE, /* pc_relative */
1547 0, /* bitpos */
1548 complain_overflow_bitfield,/* complain_on_overflow */
1549 NULL, /* special_function */
1550 "R_ARM_TLS_GD32", /* name */
1551 TRUE, /* partial_inplace */
1552 0xffffffff, /* src_mask */
1553 0xffffffff, /* dst_mask */
1554 FALSE), /* pcrel_offset */
1555
1556 HOWTO (R_ARM_TLS_LDM32, /* type */
1557 0, /* rightshift */
1558 2, /* size (0 = byte, 1 = short, 2 = long) */
1559 32, /* bitsize */
1560 FALSE, /* pc_relative */
1561 0, /* bitpos */
1562 complain_overflow_bitfield,/* complain_on_overflow */
1563 bfd_elf_generic_reloc, /* special_function */
1564 "R_ARM_TLS_LDM32", /* name */
1565 TRUE, /* partial_inplace */
1566 0xffffffff, /* src_mask */
1567 0xffffffff, /* dst_mask */
1568 FALSE), /* pcrel_offset */
1569
1570 HOWTO (R_ARM_TLS_LDO32, /* type */
1571 0, /* rightshift */
1572 2, /* size (0 = byte, 1 = short, 2 = long) */
1573 32, /* bitsize */
1574 FALSE, /* pc_relative */
1575 0, /* bitpos */
1576 complain_overflow_bitfield,/* complain_on_overflow */
1577 bfd_elf_generic_reloc, /* special_function */
1578 "R_ARM_TLS_LDO32", /* name */
1579 TRUE, /* partial_inplace */
1580 0xffffffff, /* src_mask */
1581 0xffffffff, /* dst_mask */
1582 FALSE), /* pcrel_offset */
1583
1584 HOWTO (R_ARM_TLS_IE32, /* type */
1585 0, /* rightshift */
1586 2, /* size (0 = byte, 1 = short, 2 = long) */
1587 32, /* bitsize */
1588 FALSE, /* pc_relative */
1589 0, /* bitpos */
1590 complain_overflow_bitfield,/* complain_on_overflow */
1591 NULL, /* special_function */
1592 "R_ARM_TLS_IE32", /* name */
1593 TRUE, /* partial_inplace */
1594 0xffffffff, /* src_mask */
1595 0xffffffff, /* dst_mask */
1596 FALSE), /* pcrel_offset */
1597
1598 HOWTO (R_ARM_TLS_LE32, /* type */
1599 0, /* rightshift */
1600 2, /* size (0 = byte, 1 = short, 2 = long) */
1601 32, /* bitsize */
1602 FALSE, /* pc_relative */
1603 0, /* bitpos */
1604 complain_overflow_bitfield,/* complain_on_overflow */
1605 bfd_elf_generic_reloc, /* special_function */
1606 "R_ARM_TLS_LE32", /* name */
1607 TRUE, /* partial_inplace */
1608 0xffffffff, /* src_mask */
1609 0xffffffff, /* dst_mask */
1610 FALSE), /* pcrel_offset */
1611
1612 HOWTO (R_ARM_TLS_LDO12, /* type */
1613 0, /* rightshift */
1614 2, /* size (0 = byte, 1 = short, 2 = long) */
1615 12, /* bitsize */
1616 FALSE, /* pc_relative */
1617 0, /* bitpos */
1618 complain_overflow_bitfield,/* complain_on_overflow */
1619 bfd_elf_generic_reloc, /* special_function */
1620 "R_ARM_TLS_LDO12", /* name */
1621 FALSE, /* partial_inplace */
1622 0x00000fff, /* src_mask */
1623 0x00000fff, /* dst_mask */
1624 FALSE), /* pcrel_offset */
1625
1626 HOWTO (R_ARM_TLS_LE12, /* type */
1627 0, /* rightshift */
1628 2, /* size (0 = byte, 1 = short, 2 = long) */
1629 12, /* bitsize */
1630 FALSE, /* pc_relative */
1631 0, /* bitpos */
1632 complain_overflow_bitfield,/* complain_on_overflow */
1633 bfd_elf_generic_reloc, /* special_function */
1634 "R_ARM_TLS_LE12", /* name */
1635 FALSE, /* partial_inplace */
1636 0x00000fff, /* src_mask */
1637 0x00000fff, /* dst_mask */
1638 FALSE), /* pcrel_offset */
1639
1640 HOWTO (R_ARM_TLS_IE12GP, /* type */
1641 0, /* rightshift */
1642 2, /* size (0 = byte, 1 = short, 2 = long) */
1643 12, /* bitsize */
1644 FALSE, /* pc_relative */
1645 0, /* bitpos */
1646 complain_overflow_bitfield,/* complain_on_overflow */
1647 bfd_elf_generic_reloc, /* special_function */
1648 "R_ARM_TLS_IE12GP", /* name */
1649 FALSE, /* partial_inplace */
1650 0x00000fff, /* src_mask */
1651 0x00000fff, /* dst_mask */
1652 FALSE), /* pcrel_offset */
1653
1654 /* 112-127 private relocations. */
1655 EMPTY_HOWTO (112),
1656 EMPTY_HOWTO (113),
1657 EMPTY_HOWTO (114),
1658 EMPTY_HOWTO (115),
1659 EMPTY_HOWTO (116),
1660 EMPTY_HOWTO (117),
1661 EMPTY_HOWTO (118),
1662 EMPTY_HOWTO (119),
1663 EMPTY_HOWTO (120),
1664 EMPTY_HOWTO (121),
1665 EMPTY_HOWTO (122),
1666 EMPTY_HOWTO (123),
1667 EMPTY_HOWTO (124),
1668 EMPTY_HOWTO (125),
1669 EMPTY_HOWTO (126),
1670 EMPTY_HOWTO (127),
1671
1672 /* R_ARM_ME_TOO, obsolete. */
1673 EMPTY_HOWTO (128),
1674
1675 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1676 0, /* rightshift */
1677 1, /* size (0 = byte, 1 = short, 2 = long) */
1678 0, /* bitsize */
1679 FALSE, /* pc_relative */
1680 0, /* bitpos */
1681 complain_overflow_bitfield,/* complain_on_overflow */
1682 bfd_elf_generic_reloc, /* special_function */
1683 "R_ARM_THM_TLS_DESCSEQ",/* name */
1684 FALSE, /* partial_inplace */
1685 0x00000000, /* src_mask */
1686 0x00000000, /* dst_mask */
1687 FALSE), /* pcrel_offset */
1688 };
1689
1690 /* 160 onwards: */
1691 static reloc_howto_type elf32_arm_howto_table_2[1] =
1692 {
1693 HOWTO (R_ARM_IRELATIVE, /* type */
1694 0, /* rightshift */
1695 2, /* size (0 = byte, 1 = short, 2 = long) */
1696 32, /* bitsize */
1697 FALSE, /* pc_relative */
1698 0, /* bitpos */
1699 complain_overflow_bitfield,/* complain_on_overflow */
1700 bfd_elf_generic_reloc, /* special_function */
1701 "R_ARM_IRELATIVE", /* name */
1702 TRUE, /* partial_inplace */
1703 0xffffffff, /* src_mask */
1704 0xffffffff, /* dst_mask */
1705 FALSE) /* pcrel_offset */
1706 };
1707
1708 /* 249-255 extended, currently unused, relocations: */
1709 static reloc_howto_type elf32_arm_howto_table_3[4] =
1710 {
1711 HOWTO (R_ARM_RREL32, /* type */
1712 0, /* rightshift */
1713 0, /* size (0 = byte, 1 = short, 2 = long) */
1714 0, /* bitsize */
1715 FALSE, /* pc_relative */
1716 0, /* bitpos */
1717 complain_overflow_dont,/* complain_on_overflow */
1718 bfd_elf_generic_reloc, /* special_function */
1719 "R_ARM_RREL32", /* name */
1720 FALSE, /* partial_inplace */
1721 0, /* src_mask */
1722 0, /* dst_mask */
1723 FALSE), /* pcrel_offset */
1724
1725 HOWTO (R_ARM_RABS32, /* type */
1726 0, /* rightshift */
1727 0, /* size (0 = byte, 1 = short, 2 = long) */
1728 0, /* bitsize */
1729 FALSE, /* pc_relative */
1730 0, /* bitpos */
1731 complain_overflow_dont,/* complain_on_overflow */
1732 bfd_elf_generic_reloc, /* special_function */
1733 "R_ARM_RABS32", /* name */
1734 FALSE, /* partial_inplace */
1735 0, /* src_mask */
1736 0, /* dst_mask */
1737 FALSE), /* pcrel_offset */
1738
1739 HOWTO (R_ARM_RPC24, /* type */
1740 0, /* rightshift */
1741 0, /* size (0 = byte, 1 = short, 2 = long) */
1742 0, /* bitsize */
1743 FALSE, /* pc_relative */
1744 0, /* bitpos */
1745 complain_overflow_dont,/* complain_on_overflow */
1746 bfd_elf_generic_reloc, /* special_function */
1747 "R_ARM_RPC24", /* name */
1748 FALSE, /* partial_inplace */
1749 0, /* src_mask */
1750 0, /* dst_mask */
1751 FALSE), /* pcrel_offset */
1752
1753 HOWTO (R_ARM_RBASE, /* type */
1754 0, /* rightshift */
1755 0, /* size (0 = byte, 1 = short, 2 = long) */
1756 0, /* bitsize */
1757 FALSE, /* pc_relative */
1758 0, /* bitpos */
1759 complain_overflow_dont,/* complain_on_overflow */
1760 bfd_elf_generic_reloc, /* special_function */
1761 "R_ARM_RBASE", /* name */
1762 FALSE, /* partial_inplace */
1763 0, /* src_mask */
1764 0, /* dst_mask */
1765 FALSE) /* pcrel_offset */
1766 };
1767
1768 static reloc_howto_type *
1769 elf32_arm_howto_from_type (unsigned int r_type)
1770 {
1771 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
1772 return &elf32_arm_howto_table_1[r_type];
1773
1774 if (r_type == R_ARM_IRELATIVE)
1775 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1776
1777 if (r_type >= R_ARM_RREL32
1778 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1779 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
1780
1781 return NULL;
1782 }
1783
1784 static void
1785 elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1786 Elf_Internal_Rela * elf_reloc)
1787 {
1788 unsigned int r_type;
1789
1790 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1791 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1792 }
1793
1794 struct elf32_arm_reloc_map
1795 {
1796 bfd_reloc_code_real_type bfd_reloc_val;
1797 unsigned char elf_reloc_val;
1798 };
1799
1800 /* All entries in this list must also be present in elf32_arm_howto_table. */
1801 static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1802 {
1803 {BFD_RELOC_NONE, R_ARM_NONE},
1804 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
1805 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1806 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
1807 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1808 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1809 {BFD_RELOC_32, R_ARM_ABS32},
1810 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1811 {BFD_RELOC_8, R_ARM_ABS8},
1812 {BFD_RELOC_16, R_ARM_ABS16},
1813 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1814 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
1815 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1816 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1817 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1818 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1819 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1820 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
1821 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1822 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1823 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
1824 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
1825 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1826 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
1827 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1828 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1829 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1830 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1831 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1832 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
1833 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1834 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1835 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1836 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1837 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1838 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1839 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1840 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
1841 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1842 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1843 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1844 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1845 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1846 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1847 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1848 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
1849 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
1850 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1851 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
1852 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1853 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1854 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1855 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1856 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1857 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1858 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1859 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
1860 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1861 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1862 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1863 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1864 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1865 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1866 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1867 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1868 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1869 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1870 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1871 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1872 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1873 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1874 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1875 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1876 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1877 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1878 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1879 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1880 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1881 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1882 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1883 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1884 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1885 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1886 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
1887 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1888 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}
1889 };
1890
1891 static reloc_howto_type *
1892 elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1893 bfd_reloc_code_real_type code)
1894 {
1895 unsigned int i;
1896
1897 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
1898 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1899 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
1900
1901 return NULL;
1902 }
1903
1904 static reloc_howto_type *
1905 elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1906 const char *r_name)
1907 {
1908 unsigned int i;
1909
1910 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
1911 if (elf32_arm_howto_table_1[i].name != NULL
1912 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1913 return &elf32_arm_howto_table_1[i];
1914
1915 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
1916 if (elf32_arm_howto_table_2[i].name != NULL
1917 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1918 return &elf32_arm_howto_table_2[i];
1919
1920 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
1921 if (elf32_arm_howto_table_3[i].name != NULL
1922 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
1923 return &elf32_arm_howto_table_3[i];
1924
1925 return NULL;
1926 }
1927
1928 /* Support for core dump NOTE sections. */
1929
1930 static bfd_boolean
1931 elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
1932 {
1933 int offset;
1934 size_t size;
1935
1936 switch (note->descsz)
1937 {
1938 default:
1939 return FALSE;
1940
1941 case 148: /* Linux/ARM 32-bit. */
1942 /* pr_cursig */
1943 elf_tdata (abfd)->core_signal = bfd_get_16 (abfd, note->descdata + 12);
1944
1945 /* pr_pid */
1946 elf_tdata (abfd)->core_lwpid = bfd_get_32 (abfd, note->descdata + 24);
1947
1948 /* pr_reg */
1949 offset = 72;
1950 size = 72;
1951
1952 break;
1953 }
1954
1955 /* Make a ".reg/999" section. */
1956 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1957 size, note->descpos + offset);
1958 }
1959
1960 static bfd_boolean
1961 elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
1962 {
1963 switch (note->descsz)
1964 {
1965 default:
1966 return FALSE;
1967
1968 case 124: /* Linux/ARM elf_prpsinfo. */
1969 elf_tdata (abfd)->core_pid
1970 = bfd_get_32 (abfd, note->descdata + 12);
1971 elf_tdata (abfd)->core_program
1972 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
1973 elf_tdata (abfd)->core_command
1974 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1975 }
1976
1977 /* Note that for some reason, a spurious space is tacked
1978 onto the end of the args in some (at least one anyway)
1979 implementations, so strip it off if it exists. */
1980 {
1981 char *command = elf_tdata (abfd)->core_command;
1982 int n = strlen (command);
1983
1984 if (0 < n && command[n - 1] == ' ')
1985 command[n - 1] = '\0';
1986 }
1987
1988 return TRUE;
1989 }
1990
1991 static char *
1992 elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
1993 int note_type, ...)
1994 {
1995 switch (note_type)
1996 {
1997 default:
1998 return NULL;
1999
2000 case NT_PRPSINFO:
2001 {
2002 char data[124];
2003 va_list ap;
2004
2005 va_start (ap, note_type);
2006 memset (data, 0, sizeof (data));
2007 strncpy (data + 28, va_arg (ap, const char *), 16);
2008 strncpy (data + 44, va_arg (ap, const char *), 80);
2009 va_end (ap);
2010
2011 return elfcore_write_note (abfd, buf, bufsiz,
2012 "CORE", note_type, data, sizeof (data));
2013 }
2014
2015 case NT_PRSTATUS:
2016 {
2017 char data[148];
2018 va_list ap;
2019 long pid;
2020 int cursig;
2021 const void *greg;
2022
2023 va_start (ap, note_type);
2024 memset (data, 0, sizeof (data));
2025 pid = va_arg (ap, long);
2026 bfd_put_32 (abfd, pid, data + 24);
2027 cursig = va_arg (ap, int);
2028 bfd_put_16 (abfd, cursig, data + 12);
2029 greg = va_arg (ap, const void *);
2030 memcpy (data + 72, greg, 72);
2031 va_end (ap);
2032
2033 return elfcore_write_note (abfd, buf, bufsiz,
2034 "CORE", note_type, data, sizeof (data));
2035 }
2036 }
2037 }
2038
2039 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
2040 #define TARGET_LITTLE_NAME "elf32-littlearm"
2041 #define TARGET_BIG_SYM bfd_elf32_bigarm_vec
2042 #define TARGET_BIG_NAME "elf32-bigarm"
2043
2044 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2045 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2046 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2047
2048 typedef unsigned long int insn32;
2049 typedef unsigned short int insn16;
2050
2051 /* In lieu of proper flags, assume all EABIv4 or later objects are
2052 interworkable. */
2053 #define INTERWORK_FLAG(abfd) \
2054 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2055 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2056 || ((abfd)->flags & BFD_LINKER_CREATED))
2057
2058 /* The linker script knows the section names for placement.
2059 The entry_names are used to do simple name mangling on the stubs.
2060 Given a function name, and its type, the stub can be found. The
2061 name can be changed. The only requirement is the %s be present. */
2062 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2063 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2064
2065 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2066 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2067
2068 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2069 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2070
2071 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2072 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2073
2074 #define STUB_ENTRY_NAME "__%s_veneer"
2075
2076 /* The name of the dynamic interpreter. This is put in the .interp
2077 section. */
2078 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2079
2080 static const unsigned long tls_trampoline [] =
2081 {
2082 0xe08e0000, /* add r0, lr, r0 */
2083 0xe5901004, /* ldr r1, [r0,#4] */
2084 0xe12fff11, /* bx r1 */
2085 };
2086
2087 static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2088 {
2089 0xe52d2004, /* push {r2} */
2090 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2091 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2092 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2093 0xe081100f, /* 2: add r1, pc */
2094 0xe12fff12, /* bx r2 */
2095 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2096 + dl_tlsdesc_lazy_resolver(GOT) */
2097 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2098 };
2099
2100 #ifdef FOUR_WORD_PLT
2101
2102 /* The first entry in a procedure linkage table looks like
2103 this. It is set up so that any shared library function that is
2104 called before the relocation has been set up calls the dynamic
2105 linker first. */
2106 static const bfd_vma elf32_arm_plt0_entry [] =
2107 {
2108 0xe52de004, /* str lr, [sp, #-4]! */
2109 0xe59fe010, /* ldr lr, [pc, #16] */
2110 0xe08fe00e, /* add lr, pc, lr */
2111 0xe5bef008, /* ldr pc, [lr, #8]! */
2112 };
2113
2114 /* Subsequent entries in a procedure linkage table look like
2115 this. */
2116 static const bfd_vma elf32_arm_plt_entry [] =
2117 {
2118 0xe28fc600, /* add ip, pc, #NN */
2119 0xe28cca00, /* add ip, ip, #NN */
2120 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2121 0x00000000, /* unused */
2122 };
2123
2124 #else
2125
2126 /* The first entry in a procedure linkage table looks like
2127 this. It is set up so that any shared library function that is
2128 called before the relocation has been set up calls the dynamic
2129 linker first. */
2130 static const bfd_vma elf32_arm_plt0_entry [] =
2131 {
2132 0xe52de004, /* str lr, [sp, #-4]! */
2133 0xe59fe004, /* ldr lr, [pc, #4] */
2134 0xe08fe00e, /* add lr, pc, lr */
2135 0xe5bef008, /* ldr pc, [lr, #8]! */
2136 0x00000000, /* &GOT[0] - . */
2137 };
2138
2139 /* Subsequent entries in a procedure linkage table look like
2140 this. */
2141 static const bfd_vma elf32_arm_plt_entry [] =
2142 {
2143 0xe28fc600, /* add ip, pc, #0xNN00000 */
2144 0xe28cca00, /* add ip, ip, #0xNN000 */
2145 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2146 };
2147
2148 #endif
2149
2150 /* The format of the first entry in the procedure linkage table
2151 for a VxWorks executable. */
2152 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2153 {
2154 0xe52dc008, /* str ip,[sp,#-8]! */
2155 0xe59fc000, /* ldr ip,[pc] */
2156 0xe59cf008, /* ldr pc,[ip,#8] */
2157 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2158 };
2159
2160 /* The format of subsequent entries in a VxWorks executable. */
2161 static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2162 {
2163 0xe59fc000, /* ldr ip,[pc] */
2164 0xe59cf000, /* ldr pc,[ip] */
2165 0x00000000, /* .long @got */
2166 0xe59fc000, /* ldr ip,[pc] */
2167 0xea000000, /* b _PLT */
2168 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2169 };
2170
2171 /* The format of entries in a VxWorks shared library. */
2172 static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2173 {
2174 0xe59fc000, /* ldr ip,[pc] */
2175 0xe79cf009, /* ldr pc,[ip,r9] */
2176 0x00000000, /* .long @got */
2177 0xe59fc000, /* ldr ip,[pc] */
2178 0xe599f008, /* ldr pc,[r9,#8] */
2179 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2180 };
2181
2182 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2183 #define PLT_THUMB_STUB_SIZE 4
2184 static const bfd_vma elf32_arm_plt_thumb_stub [] =
2185 {
2186 0x4778, /* bx pc */
2187 0x46c0 /* nop */
2188 };
2189
2190 /* The entries in a PLT when using a DLL-based target with multiple
2191 address spaces. */
2192 static const bfd_vma elf32_arm_symbian_plt_entry [] =
2193 {
2194 0xe51ff004, /* ldr pc, [pc, #-4] */
2195 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2196 };
2197
2198 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2199 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2200 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2201 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2202 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2203 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2204
2205 enum stub_insn_type
2206 {
2207 THUMB16_TYPE = 1,
2208 THUMB32_TYPE,
2209 ARM_TYPE,
2210 DATA_TYPE
2211 };
2212
2213 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2214 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2215 is inserted in arm_build_one_stub(). */
2216 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2217 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2218 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2219 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2220 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2221 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2222
2223 typedef struct
2224 {
2225 bfd_vma data;
2226 enum stub_insn_type type;
2227 unsigned int r_type;
2228 int reloc_addend;
2229 } insn_sequence;
2230
2231 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2232 to reach the stub if necessary. */
2233 static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
2234 {
2235 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2236 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2237 };
2238
2239 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2240 available. */
2241 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
2242 {
2243 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2244 ARM_INSN(0xe12fff1c), /* bx ip */
2245 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2246 };
2247
2248 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2249 static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
2250 {
2251 THUMB16_INSN(0xb401), /* push {r0} */
2252 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2253 THUMB16_INSN(0x4684), /* mov ip, r0 */
2254 THUMB16_INSN(0xbc01), /* pop {r0} */
2255 THUMB16_INSN(0x4760), /* bx ip */
2256 THUMB16_INSN(0xbf00), /* nop */
2257 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2258 };
2259
2260 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2261 allowed. */
2262 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2263 {
2264 THUMB16_INSN(0x4778), /* bx pc */
2265 THUMB16_INSN(0x46c0), /* nop */
2266 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2267 ARM_INSN(0xe12fff1c), /* bx ip */
2268 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2269 };
2270
2271 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2272 available. */
2273 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
2274 {
2275 THUMB16_INSN(0x4778), /* bx pc */
2276 THUMB16_INSN(0x46c0), /* nop */
2277 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2278 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2279 };
2280
2281 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2282 one, when the destination is close enough. */
2283 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
2284 {
2285 THUMB16_INSN(0x4778), /* bx pc */
2286 THUMB16_INSN(0x46c0), /* nop */
2287 ARM_REL_INSN(0xea000000, -8), /* b (X-8) */
2288 };
2289
2290 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2291 blx to reach the stub if necessary. */
2292 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
2293 {
2294 ARM_INSN(0xe59fc000), /* ldr ip, [pc] */
2295 ARM_INSN(0xe08ff00c), /* add pc, pc, ip */
2296 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2297 };
2298
2299 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2300 blx to reach the stub if necessary. We can not add into pc;
2301 it is not guaranteed to mode switch (different in ARMv6 and
2302 ARMv7). */
2303 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2304 {
2305 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2306 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2307 ARM_INSN(0xe12fff1c), /* bx ip */
2308 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2309 };
2310
2311 /* V4T ARM -> ARM long branch stub, PIC. */
2312 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2313 {
2314 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2315 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2316 ARM_INSN(0xe12fff1c), /* bx ip */
2317 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2318 };
2319
2320 /* V4T Thumb -> ARM long branch stub, PIC. */
2321 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2322 {
2323 THUMB16_INSN(0x4778), /* bx pc */
2324 THUMB16_INSN(0x46c0), /* nop */
2325 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2326 ARM_INSN(0xe08cf00f), /* add pc, ip, pc */
2327 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2328 };
2329
2330 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2331 architectures. */
2332 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2333 {
2334 THUMB16_INSN(0xb401), /* push {r0} */
2335 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2336 THUMB16_INSN(0x46fc), /* mov ip, pc */
2337 THUMB16_INSN(0x4484), /* add ip, r0 */
2338 THUMB16_INSN(0xbc01), /* pop {r0} */
2339 THUMB16_INSN(0x4760), /* bx ip */
2340 DATA_WORD(0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2341 };
2342
2343 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2344 allowed. */
2345 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2346 {
2347 THUMB16_INSN(0x4778), /* bx pc */
2348 THUMB16_INSN(0x46c0), /* nop */
2349 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2350 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2351 ARM_INSN(0xe12fff1c), /* bx ip */
2352 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2353 };
2354
2355 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2356 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2357 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2358 {
2359 ARM_INSN(0xe59f1000), /* ldr r1, [pc] */
2360 ARM_INSN(0xe08ff001), /* add pc, pc, r1 */
2361 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2362 };
2363
2364 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2365 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2366 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2367 {
2368 THUMB16_INSN(0x4778), /* bx pc */
2369 THUMB16_INSN(0x46c0), /* nop */
2370 ARM_INSN(0xe59f1000), /* ldr r1, [pc, #0] */
2371 ARM_INSN(0xe081f00f), /* add pc, r1, pc */
2372 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2373 };
2374
2375 /* Cortex-A8 erratum-workaround stubs. */
2376
2377 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2378 can't use a conditional branch to reach this stub). */
2379
2380 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2381 {
2382 THUMB16_BCOND_INSN(0xd001), /* b<cond>.n true. */
2383 THUMB32_B_INSN(0xf000b800, -4), /* b.w insn_after_original_branch. */
2384 THUMB32_B_INSN(0xf000b800, -4) /* true: b.w original_branch_dest. */
2385 };
2386
2387 /* Stub used for b.w and bl.w instructions. */
2388
2389 static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2390 {
2391 THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
2392 };
2393
2394 static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2395 {
2396 THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
2397 };
2398
2399 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2400 instruction (which switches to ARM mode) to point to this stub. Jump to the
2401 real destination using an ARM-mode branch. */
2402
2403 static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2404 {
2405 ARM_REL_INSN(0xea000000, -8) /* b original_branch_dest. */
2406 };
2407
2408 /* For each section group there can be a specially created linker section
2409 to hold the stubs for that group. The name of the stub section is based
2410 upon the name of another section within that group with the suffix below
2411 applied.
2412
2413 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2414 create what appeared to be a linker stub section when it actually
2415 contained user code/data. For example, consider this fragment:
2416
2417 const char * stubborn_problems[] = { "np" };
2418
2419 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2420 section called:
2421
2422 .data.rel.local.stubborn_problems
2423
2424 This then causes problems in arm32_arm_build_stubs() as it triggers:
2425
2426 // Ignore non-stub sections.
2427 if (!strstr (stub_sec->name, STUB_SUFFIX))
2428 continue;
2429
2430 And so the section would be ignored instead of being processed. Hence
2431 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2432 C identifier. */
2433 #define STUB_SUFFIX ".__stub"
2434
2435 /* One entry per long/short branch stub defined above. */
2436 #define DEF_STUBS \
2437 DEF_STUB(long_branch_any_any) \
2438 DEF_STUB(long_branch_v4t_arm_thumb) \
2439 DEF_STUB(long_branch_thumb_only) \
2440 DEF_STUB(long_branch_v4t_thumb_thumb) \
2441 DEF_STUB(long_branch_v4t_thumb_arm) \
2442 DEF_STUB(short_branch_v4t_thumb_arm) \
2443 DEF_STUB(long_branch_any_arm_pic) \
2444 DEF_STUB(long_branch_any_thumb_pic) \
2445 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2446 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2447 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2448 DEF_STUB(long_branch_thumb_only_pic) \
2449 DEF_STUB(long_branch_any_tls_pic) \
2450 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2451 DEF_STUB(a8_veneer_b_cond) \
2452 DEF_STUB(a8_veneer_b) \
2453 DEF_STUB(a8_veneer_bl) \
2454 DEF_STUB(a8_veneer_blx)
2455
2456 #define DEF_STUB(x) arm_stub_##x,
2457 enum elf32_arm_stub_type {
2458 arm_stub_none,
2459 DEF_STUBS
2460 /* Note the first a8_veneer type */
2461 arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond
2462 };
2463 #undef DEF_STUB
2464
2465 typedef struct
2466 {
2467 const insn_sequence* template_sequence;
2468 int template_size;
2469 } stub_def;
2470
2471 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2472 static const stub_def stub_definitions[] = {
2473 {NULL, 0},
2474 DEF_STUBS
2475 };
2476
2477 struct elf32_arm_stub_hash_entry
2478 {
2479 /* Base hash table entry structure. */
2480 struct bfd_hash_entry root;
2481
2482 /* The stub section. */
2483 asection *stub_sec;
2484
2485 /* Offset within stub_sec of the beginning of this stub. */
2486 bfd_vma stub_offset;
2487
2488 /* Given the symbol's value and its section we can determine its final
2489 value when building the stubs (so the stub knows where to jump). */
2490 bfd_vma target_value;
2491 asection *target_section;
2492
2493 /* Offset to apply to relocation referencing target_value. */
2494 bfd_vma target_addend;
2495
2496 /* The instruction which caused this stub to be generated (only valid for
2497 Cortex-A8 erratum workaround stubs at present). */
2498 unsigned long orig_insn;
2499
2500 /* The stub type. */
2501 enum elf32_arm_stub_type stub_type;
2502 /* Its encoding size in bytes. */
2503 int stub_size;
2504 /* Its template. */
2505 const insn_sequence *stub_template;
2506 /* The size of the template (number of entries). */
2507 int stub_template_size;
2508
2509 /* The symbol table entry, if any, that this was derived from. */
2510 struct elf32_arm_link_hash_entry *h;
2511
2512 /* Type of branch. */
2513 enum arm_st_branch_type branch_type;
2514
2515 /* Where this stub is being called from, or, in the case of combined
2516 stub sections, the first input section in the group. */
2517 asection *id_sec;
2518
2519 /* The name for the local symbol at the start of this stub. The
2520 stub name in the hash table has to be unique; this does not, so
2521 it can be friendlier. */
2522 char *output_name;
2523 };
2524
2525 /* Used to build a map of a section. This is required for mixed-endian
2526 code/data. */
2527
2528 typedef struct elf32_elf_section_map
2529 {
2530 bfd_vma vma;
2531 char type;
2532 }
2533 elf32_arm_section_map;
2534
2535 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2536
2537 typedef enum
2538 {
2539 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2540 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2541 VFP11_ERRATUM_ARM_VENEER,
2542 VFP11_ERRATUM_THUMB_VENEER
2543 }
2544 elf32_vfp11_erratum_type;
2545
2546 typedef struct elf32_vfp11_erratum_list
2547 {
2548 struct elf32_vfp11_erratum_list *next;
2549 bfd_vma vma;
2550 union
2551 {
2552 struct
2553 {
2554 struct elf32_vfp11_erratum_list *veneer;
2555 unsigned int vfp_insn;
2556 } b;
2557 struct
2558 {
2559 struct elf32_vfp11_erratum_list *branch;
2560 unsigned int id;
2561 } v;
2562 } u;
2563 elf32_vfp11_erratum_type type;
2564 }
2565 elf32_vfp11_erratum_list;
2566
2567 typedef enum
2568 {
2569 DELETE_EXIDX_ENTRY,
2570 INSERT_EXIDX_CANTUNWIND_AT_END
2571 }
2572 arm_unwind_edit_type;
2573
2574 /* A (sorted) list of edits to apply to an unwind table. */
2575 typedef struct arm_unwind_table_edit
2576 {
2577 arm_unwind_edit_type type;
2578 /* Note: we sometimes want to insert an unwind entry corresponding to a
2579 section different from the one we're currently writing out, so record the
2580 (text) section this edit relates to here. */
2581 asection *linked_section;
2582 unsigned int index;
2583 struct arm_unwind_table_edit *next;
2584 }
2585 arm_unwind_table_edit;
2586
2587 typedef struct _arm_elf_section_data
2588 {
2589 /* Information about mapping symbols. */
2590 struct bfd_elf_section_data elf;
2591 unsigned int mapcount;
2592 unsigned int mapsize;
2593 elf32_arm_section_map *map;
2594 /* Information about CPU errata. */
2595 unsigned int erratumcount;
2596 elf32_vfp11_erratum_list *erratumlist;
2597 /* Information about unwind tables. */
2598 union
2599 {
2600 /* Unwind info attached to a text section. */
2601 struct
2602 {
2603 asection *arm_exidx_sec;
2604 } text;
2605
2606 /* Unwind info attached to an .ARM.exidx section. */
2607 struct
2608 {
2609 arm_unwind_table_edit *unwind_edit_list;
2610 arm_unwind_table_edit *unwind_edit_tail;
2611 } exidx;
2612 } u;
2613 }
2614 _arm_elf_section_data;
2615
2616 #define elf32_arm_section_data(sec) \
2617 ((_arm_elf_section_data *) elf_section_data (sec))
2618
2619 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2620 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2621 so may be created multiple times: we use an array of these entries whilst
2622 relaxing which we can refresh easily, then create stubs for each potentially
2623 erratum-triggering instruction once we've settled on a solution. */
2624
2625 struct a8_erratum_fix {
2626 bfd *input_bfd;
2627 asection *section;
2628 bfd_vma offset;
2629 bfd_vma addend;
2630 unsigned long orig_insn;
2631 char *stub_name;
2632 enum elf32_arm_stub_type stub_type;
2633 enum arm_st_branch_type branch_type;
2634 };
2635
2636 /* A table of relocs applied to branches which might trigger Cortex-A8
2637 erratum. */
2638
2639 struct a8_erratum_reloc {
2640 bfd_vma from;
2641 bfd_vma destination;
2642 struct elf32_arm_link_hash_entry *hash;
2643 const char *sym_name;
2644 unsigned int r_type;
2645 enum arm_st_branch_type branch_type;
2646 bfd_boolean non_a8_stub;
2647 };
2648
2649 /* The size of the thread control block. */
2650 #define TCB_SIZE 8
2651
2652 /* ARM-specific information about a PLT entry, over and above the usual
2653 gotplt_union. */
2654 struct arm_plt_info {
2655 /* We reference count Thumb references to a PLT entry separately,
2656 so that we can emit the Thumb trampoline only if needed. */
2657 bfd_signed_vma thumb_refcount;
2658
2659 /* Some references from Thumb code may be eliminated by BL->BLX
2660 conversion, so record them separately. */
2661 bfd_signed_vma maybe_thumb_refcount;
2662
2663 /* How many of the recorded PLT accesses were from non-call relocations.
2664 This information is useful when deciding whether anything takes the
2665 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2666 non-call references to the function should resolve directly to the
2667 real runtime target. */
2668 unsigned int noncall_refcount;
2669
2670 /* Since PLT entries have variable size if the Thumb prologue is
2671 used, we need to record the index into .got.plt instead of
2672 recomputing it from the PLT offset. */
2673 bfd_signed_vma got_offset;
2674 };
2675
2676 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
2677 struct arm_local_iplt_info {
2678 /* The information that is usually found in the generic ELF part of
2679 the hash table entry. */
2680 union gotplt_union root;
2681
2682 /* The information that is usually found in the ARM-specific part of
2683 the hash table entry. */
2684 struct arm_plt_info arm;
2685
2686 /* A list of all potential dynamic relocations against this symbol. */
2687 struct elf_dyn_relocs *dyn_relocs;
2688 };
2689
2690 struct elf_arm_obj_tdata
2691 {
2692 struct elf_obj_tdata root;
2693
2694 /* tls_type for each local got entry. */
2695 char *local_got_tls_type;
2696
2697 /* GOTPLT entries for TLS descriptors. */
2698 bfd_vma *local_tlsdesc_gotent;
2699
2700 /* Information for local symbols that need entries in .iplt. */
2701 struct arm_local_iplt_info **local_iplt;
2702
2703 /* Zero to warn when linking objects with incompatible enum sizes. */
2704 int no_enum_size_warning;
2705
2706 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2707 int no_wchar_size_warning;
2708 };
2709
2710 #define elf_arm_tdata(bfd) \
2711 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
2712
2713 #define elf32_arm_local_got_tls_type(bfd) \
2714 (elf_arm_tdata (bfd)->local_got_tls_type)
2715
2716 #define elf32_arm_local_tlsdesc_gotent(bfd) \
2717 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2718
2719 #define elf32_arm_local_iplt(bfd) \
2720 (elf_arm_tdata (bfd)->local_iplt)
2721
2722 #define is_arm_elf(bfd) \
2723 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2724 && elf_tdata (bfd) != NULL \
2725 && elf_object_id (bfd) == ARM_ELF_DATA)
2726
2727 static bfd_boolean
2728 elf32_arm_mkobject (bfd *abfd)
2729 {
2730 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
2731 ARM_ELF_DATA);
2732 }
2733
2734 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2735
2736 /* Arm ELF linker hash entry. */
2737 struct elf32_arm_link_hash_entry
2738 {
2739 struct elf_link_hash_entry root;
2740
2741 /* Track dynamic relocs copied for this symbol. */
2742 struct elf_dyn_relocs *dyn_relocs;
2743
2744 /* ARM-specific PLT information. */
2745 struct arm_plt_info plt;
2746
2747 #define GOT_UNKNOWN 0
2748 #define GOT_NORMAL 1
2749 #define GOT_TLS_GD 2
2750 #define GOT_TLS_IE 4
2751 #define GOT_TLS_GDESC 8
2752 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
2753 unsigned int tls_type : 8;
2754
2755 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
2756 unsigned int is_iplt : 1;
2757
2758 unsigned int unused : 23;
2759
2760 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
2761 starting at the end of the jump table. */
2762 bfd_vma tlsdesc_got;
2763
2764 /* The symbol marking the real symbol location for exported thumb
2765 symbols with Arm stubs. */
2766 struct elf_link_hash_entry *export_glue;
2767
2768 /* A pointer to the most recently used stub hash entry against this
2769 symbol. */
2770 struct elf32_arm_stub_hash_entry *stub_cache;
2771 };
2772
2773 /* Traverse an arm ELF linker hash table. */
2774 #define elf32_arm_link_hash_traverse(table, func, info) \
2775 (elf_link_hash_traverse \
2776 (&(table)->root, \
2777 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
2778 (info)))
2779
2780 /* Get the ARM elf linker hash table from a link_info structure. */
2781 #define elf32_arm_hash_table(info) \
2782 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
2783 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
2784
2785 #define arm_stub_hash_lookup(table, string, create, copy) \
2786 ((struct elf32_arm_stub_hash_entry *) \
2787 bfd_hash_lookup ((table), (string), (create), (copy)))
2788
2789 /* Array to keep track of which stub sections have been created, and
2790 information on stub grouping. */
2791 struct map_stub
2792 {
2793 /* This is the section to which stubs in the group will be
2794 attached. */
2795 asection *link_sec;
2796 /* The stub section. */
2797 asection *stub_sec;
2798 };
2799
2800 #define elf32_arm_compute_jump_table_size(htab) \
2801 ((htab)->next_tls_desc_index * 4)
2802
2803 /* ARM ELF linker hash table. */
2804 struct elf32_arm_link_hash_table
2805 {
2806 /* The main hash table. */
2807 struct elf_link_hash_table root;
2808
2809 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
2810 bfd_size_type thumb_glue_size;
2811
2812 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
2813 bfd_size_type arm_glue_size;
2814
2815 /* The size in bytes of section containing the ARMv4 BX veneers. */
2816 bfd_size_type bx_glue_size;
2817
2818 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2819 veneer has been populated. */
2820 bfd_vma bx_glue_offset[15];
2821
2822 /* The size in bytes of the section containing glue for VFP11 erratum
2823 veneers. */
2824 bfd_size_type vfp11_erratum_glue_size;
2825
2826 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
2827 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
2828 elf32_arm_write_section(). */
2829 struct a8_erratum_fix *a8_erratum_fixes;
2830 unsigned int num_a8_erratum_fixes;
2831
2832 /* An arbitrary input BFD chosen to hold the glue sections. */
2833 bfd * bfd_of_glue_owner;
2834
2835 /* Nonzero to output a BE8 image. */
2836 int byteswap_code;
2837
2838 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
2839 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
2840 int target1_is_rel;
2841
2842 /* The relocation to use for R_ARM_TARGET2 relocations. */
2843 int target2_reloc;
2844
2845 /* 0 = Ignore R_ARM_V4BX.
2846 1 = Convert BX to MOV PC.
2847 2 = Generate v4 interworing stubs. */
2848 int fix_v4bx;
2849
2850 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
2851 int fix_cortex_a8;
2852
2853 /* Whether we should fix the ARM1176 BLX immediate issue. */
2854 int fix_arm1176;
2855
2856 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2857 int use_blx;
2858
2859 /* What sort of code sequences we should look for which may trigger the
2860 VFP11 denorm erratum. */
2861 bfd_arm_vfp11_fix vfp11_fix;
2862
2863 /* Global counter for the number of fixes we have emitted. */
2864 int num_vfp11_fixes;
2865
2866 /* Nonzero to force PIC branch veneers. */
2867 int pic_veneer;
2868
2869 /* The number of bytes in the initial entry in the PLT. */
2870 bfd_size_type plt_header_size;
2871
2872 /* The number of bytes in the subsequent PLT etries. */
2873 bfd_size_type plt_entry_size;
2874
2875 /* True if the target system is VxWorks. */
2876 int vxworks_p;
2877
2878 /* True if the target system is Symbian OS. */
2879 int symbian_p;
2880
2881 /* True if the target uses REL relocations. */
2882 int use_rel;
2883
2884 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
2885 bfd_vma next_tls_desc_index;
2886
2887 /* How many R_ARM_TLS_DESC relocations were generated so far. */
2888 bfd_vma num_tls_desc;
2889
2890 /* Short-cuts to get to dynamic linker sections. */
2891 asection *sdynbss;
2892 asection *srelbss;
2893
2894 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2895 asection *srelplt2;
2896
2897 /* The offset into splt of the PLT entry for the TLS descriptor
2898 resolver. Special values are 0, if not necessary (or not found
2899 to be necessary yet), and -1 if needed but not determined
2900 yet. */
2901 bfd_vma dt_tlsdesc_plt;
2902
2903 /* The offset into sgot of the GOT entry used by the PLT entry
2904 above. */
2905 bfd_vma dt_tlsdesc_got;
2906
2907 /* Offset in .plt section of tls_arm_trampoline. */
2908 bfd_vma tls_trampoline;
2909
2910 /* Data for R_ARM_TLS_LDM32 relocations. */
2911 union
2912 {
2913 bfd_signed_vma refcount;
2914 bfd_vma offset;
2915 } tls_ldm_got;
2916
2917 /* Small local sym cache. */
2918 struct sym_cache sym_cache;
2919
2920 /* For convenience in allocate_dynrelocs. */
2921 bfd * obfd;
2922
2923 /* The amount of space used by the reserved portion of the sgotplt
2924 section, plus whatever space is used by the jump slots. */
2925 bfd_vma sgotplt_jump_table_size;
2926
2927 /* The stub hash table. */
2928 struct bfd_hash_table stub_hash_table;
2929
2930 /* Linker stub bfd. */
2931 bfd *stub_bfd;
2932
2933 /* Linker call-backs. */
2934 asection * (*add_stub_section) (const char *, asection *);
2935 void (*layout_sections_again) (void);
2936
2937 /* Array to keep track of which stub sections have been created, and
2938 information on stub grouping. */
2939 struct map_stub *stub_group;
2940
2941 /* Number of elements in stub_group. */
2942 int top_id;
2943
2944 /* Assorted information used by elf32_arm_size_stubs. */
2945 unsigned int bfd_count;
2946 int top_index;
2947 asection **input_list;
2948 };
2949
2950 /* Create an entry in an ARM ELF linker hash table. */
2951
2952 static struct bfd_hash_entry *
2953 elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
2954 struct bfd_hash_table * table,
2955 const char * string)
2956 {
2957 struct elf32_arm_link_hash_entry * ret =
2958 (struct elf32_arm_link_hash_entry *) entry;
2959
2960 /* Allocate the structure if it has not already been allocated by a
2961 subclass. */
2962 if (ret == NULL)
2963 ret = (struct elf32_arm_link_hash_entry *)
2964 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
2965 if (ret == NULL)
2966 return (struct bfd_hash_entry *) ret;
2967
2968 /* Call the allocation method of the superclass. */
2969 ret = ((struct elf32_arm_link_hash_entry *)
2970 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
2971 table, string));
2972 if (ret != NULL)
2973 {
2974 ret->dyn_relocs = NULL;
2975 ret->tls_type = GOT_UNKNOWN;
2976 ret->tlsdesc_got = (bfd_vma) -1;
2977 ret->plt.thumb_refcount = 0;
2978 ret->plt.maybe_thumb_refcount = 0;
2979 ret->plt.noncall_refcount = 0;
2980 ret->plt.got_offset = -1;
2981 ret->is_iplt = FALSE;
2982 ret->export_glue = NULL;
2983
2984 ret->stub_cache = NULL;
2985 }
2986
2987 return (struct bfd_hash_entry *) ret;
2988 }
2989
2990 /* Ensure that we have allocated bookkeeping structures for ABFD's local
2991 symbols. */
2992
2993 static bfd_boolean
2994 elf32_arm_allocate_local_sym_info (bfd *abfd)
2995 {
2996 if (elf_local_got_refcounts (abfd) == NULL)
2997 {
2998 bfd_size_type num_syms;
2999 bfd_size_type size;
3000 char *data;
3001
3002 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3003 size = num_syms * (sizeof (bfd_signed_vma)
3004 + sizeof (struct arm_local_iplt_info *)
3005 + sizeof (bfd_vma)
3006 + sizeof (char));
3007 data = bfd_zalloc (abfd, size);
3008 if (data == NULL)
3009 return FALSE;
3010
3011 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3012 data += num_syms * sizeof (bfd_signed_vma);
3013
3014 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3015 data += num_syms * sizeof (struct arm_local_iplt_info *);
3016
3017 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3018 data += num_syms * sizeof (bfd_vma);
3019
3020 elf32_arm_local_got_tls_type (abfd) = data;
3021 }
3022 return TRUE;
3023 }
3024
3025 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3026 to input bfd ABFD. Create the information if it doesn't already exist.
3027 Return null if an allocation fails. */
3028
3029 static struct arm_local_iplt_info *
3030 elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3031 {
3032 struct arm_local_iplt_info **ptr;
3033
3034 if (!elf32_arm_allocate_local_sym_info (abfd))
3035 return NULL;
3036
3037 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3038 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3039 if (*ptr == NULL)
3040 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3041 return *ptr;
3042 }
3043
3044 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3045 in ABFD's symbol table. If the symbol is global, H points to its
3046 hash table entry, otherwise H is null.
3047
3048 Return true if the symbol does have PLT information. When returning
3049 true, point *ROOT_PLT at the target-independent reference count/offset
3050 union and *ARM_PLT at the ARM-specific information. */
3051
3052 static bfd_boolean
3053 elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_entry *h,
3054 unsigned long r_symndx, union gotplt_union **root_plt,
3055 struct arm_plt_info **arm_plt)
3056 {
3057 struct arm_local_iplt_info *local_iplt;
3058
3059 if (h != NULL)
3060 {
3061 *root_plt = &h->root.plt;
3062 *arm_plt = &h->plt;
3063 return TRUE;
3064 }
3065
3066 if (elf32_arm_local_iplt (abfd) == NULL)
3067 return FALSE;
3068
3069 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3070 if (local_iplt == NULL)
3071 return FALSE;
3072
3073 *root_plt = &local_iplt->root;
3074 *arm_plt = &local_iplt->arm;
3075 return TRUE;
3076 }
3077
3078 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3079 before it. */
3080
3081 static bfd_boolean
3082 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3083 struct arm_plt_info *arm_plt)
3084 {
3085 struct elf32_arm_link_hash_table *htab;
3086
3087 htab = elf32_arm_hash_table (info);
3088 return (arm_plt->thumb_refcount != 0
3089 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0));
3090 }
3091
3092 /* Return a pointer to the head of the dynamic reloc list that should
3093 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3094 ABFD's symbol table. Return null if an error occurs. */
3095
3096 static struct elf_dyn_relocs **
3097 elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3098 Elf_Internal_Sym *isym)
3099 {
3100 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3101 {
3102 struct arm_local_iplt_info *local_iplt;
3103
3104 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3105 if (local_iplt == NULL)
3106 return NULL;
3107 return &local_iplt->dyn_relocs;
3108 }
3109 else
3110 {
3111 /* Track dynamic relocs needed for local syms too.
3112 We really need local syms available to do this
3113 easily. Oh well. */
3114 asection *s;
3115 void *vpp;
3116
3117 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3118 if (s == NULL)
3119 abort ();
3120
3121 vpp = &elf_section_data (s)->local_dynrel;
3122 return (struct elf_dyn_relocs **) vpp;
3123 }
3124 }
3125
3126 /* Initialize an entry in the stub hash table. */
3127
3128 static struct bfd_hash_entry *
3129 stub_hash_newfunc (struct bfd_hash_entry *entry,
3130 struct bfd_hash_table *table,
3131 const char *string)
3132 {
3133 /* Allocate the structure if it has not already been allocated by a
3134 subclass. */
3135 if (entry == NULL)
3136 {
3137 entry = (struct bfd_hash_entry *)
3138 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
3139 if (entry == NULL)
3140 return entry;
3141 }
3142
3143 /* Call the allocation method of the superclass. */
3144 entry = bfd_hash_newfunc (entry, table, string);
3145 if (entry != NULL)
3146 {
3147 struct elf32_arm_stub_hash_entry *eh;
3148
3149 /* Initialize the local fields. */
3150 eh = (struct elf32_arm_stub_hash_entry *) entry;
3151 eh->stub_sec = NULL;
3152 eh->stub_offset = 0;
3153 eh->target_value = 0;
3154 eh->target_section = NULL;
3155 eh->target_addend = 0;
3156 eh->orig_insn = 0;
3157 eh->stub_type = arm_stub_none;
3158 eh->stub_size = 0;
3159 eh->stub_template = NULL;
3160 eh->stub_template_size = 0;
3161 eh->h = NULL;
3162 eh->id_sec = NULL;
3163 eh->output_name = NULL;
3164 }
3165
3166 return entry;
3167 }
3168
3169 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3170 shortcuts to them in our hash table. */
3171
3172 static bfd_boolean
3173 create_got_section (bfd *dynobj, struct bfd_link_info *info)
3174 {
3175 struct elf32_arm_link_hash_table *htab;
3176
3177 htab = elf32_arm_hash_table (info);
3178 if (htab == NULL)
3179 return FALSE;
3180
3181 /* BPABI objects never have a GOT, or associated sections. */
3182 if (htab->symbian_p)
3183 return TRUE;
3184
3185 if (! _bfd_elf_create_got_section (dynobj, info))
3186 return FALSE;
3187
3188 return TRUE;
3189 }
3190
3191 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3192
3193 static bfd_boolean
3194 create_ifunc_sections (struct bfd_link_info *info)
3195 {
3196 struct elf32_arm_link_hash_table *htab;
3197 const struct elf_backend_data *bed;
3198 bfd *dynobj;
3199 asection *s;
3200 flagword flags;
3201
3202 htab = elf32_arm_hash_table (info);
3203 dynobj = htab->root.dynobj;
3204 bed = get_elf_backend_data (dynobj);
3205 flags = bed->dynamic_sec_flags;
3206
3207 if (htab->root.iplt == NULL)
3208 {
3209 s = bfd_make_section_with_flags (dynobj, ".iplt",
3210 flags | SEC_READONLY | SEC_CODE);
3211 if (s == NULL
3212 || !bfd_set_section_alignment (abfd, s, bed->plt_alignment))
3213 return FALSE;
3214 htab->root.iplt = s;
3215 }
3216
3217 if (htab->root.irelplt == NULL)
3218 {
3219 s = bfd_make_section_with_flags (dynobj, RELOC_SECTION (htab, ".iplt"),
3220 flags | SEC_READONLY);
3221 if (s == NULL
3222 || !bfd_set_section_alignment (abfd, s, bed->s->log_file_align))
3223 return FALSE;
3224 htab->root.irelplt = s;
3225 }
3226
3227 if (htab->root.igotplt == NULL)
3228 {
3229 s = bfd_make_section_with_flags (dynobj, ".igot.plt", flags);
3230 if (s == NULL
3231 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3232 return FALSE;
3233 htab->root.igotplt = s;
3234 }
3235 return TRUE;
3236 }
3237
3238 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3239 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3240 hash table. */
3241
3242 static bfd_boolean
3243 elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
3244 {
3245 struct elf32_arm_link_hash_table *htab;
3246
3247 htab = elf32_arm_hash_table (info);
3248 if (htab == NULL)
3249 return FALSE;
3250
3251 if (!htab->root.sgot && !create_got_section (dynobj, info))
3252 return FALSE;
3253
3254 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3255 return FALSE;
3256
3257 htab->sdynbss = bfd_get_section_by_name (dynobj, ".dynbss");
3258 if (!info->shared)
3259 htab->srelbss = bfd_get_section_by_name (dynobj,
3260 RELOC_SECTION (htab, ".bss"));
3261
3262 if (htab->vxworks_p)
3263 {
3264 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3265 return FALSE;
3266
3267 if (info->shared)
3268 {
3269 htab->plt_header_size = 0;
3270 htab->plt_entry_size
3271 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3272 }
3273 else
3274 {
3275 htab->plt_header_size
3276 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3277 htab->plt_entry_size
3278 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3279 }
3280 }
3281
3282 if (!htab->root.splt
3283 || !htab->root.srelplt
3284 || !htab->sdynbss
3285 || (!info->shared && !htab->srelbss))
3286 abort ();
3287
3288 return TRUE;
3289 }
3290
3291 /* Copy the extra info we tack onto an elf_link_hash_entry. */
3292
3293 static void
3294 elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
3295 struct elf_link_hash_entry *dir,
3296 struct elf_link_hash_entry *ind)
3297 {
3298 struct elf32_arm_link_hash_entry *edir, *eind;
3299
3300 edir = (struct elf32_arm_link_hash_entry *) dir;
3301 eind = (struct elf32_arm_link_hash_entry *) ind;
3302
3303 if (eind->dyn_relocs != NULL)
3304 {
3305 if (edir->dyn_relocs != NULL)
3306 {
3307 struct elf_dyn_relocs **pp;
3308 struct elf_dyn_relocs *p;
3309
3310 /* Add reloc counts against the indirect sym to the direct sym
3311 list. Merge any entries against the same section. */
3312 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
3313 {
3314 struct elf_dyn_relocs *q;
3315
3316 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3317 if (q->sec == p->sec)
3318 {
3319 q->pc_count += p->pc_count;
3320 q->count += p->count;
3321 *pp = p->next;
3322 break;
3323 }
3324 if (q == NULL)
3325 pp = &p->next;
3326 }
3327 *pp = edir->dyn_relocs;
3328 }
3329
3330 edir->dyn_relocs = eind->dyn_relocs;
3331 eind->dyn_relocs = NULL;
3332 }
3333
3334 if (ind->root.type == bfd_link_hash_indirect)
3335 {
3336 /* Copy over PLT info. */
3337 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
3338 eind->plt.thumb_refcount = 0;
3339 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
3340 eind->plt.maybe_thumb_refcount = 0;
3341 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
3342 eind->plt.noncall_refcount = 0;
3343
3344 /* We should only allocate a function to .iplt once the final
3345 symbol information is known. */
3346 BFD_ASSERT (!eind->is_iplt);
3347
3348 if (dir->got.refcount <= 0)
3349 {
3350 edir->tls_type = eind->tls_type;
3351 eind->tls_type = GOT_UNKNOWN;
3352 }
3353 }
3354
3355 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3356 }
3357
3358 /* Create an ARM elf linker hash table. */
3359
3360 static struct bfd_link_hash_table *
3361 elf32_arm_link_hash_table_create (bfd *abfd)
3362 {
3363 struct elf32_arm_link_hash_table *ret;
3364 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
3365
3366 ret = (struct elf32_arm_link_hash_table *) bfd_malloc (amt);
3367 if (ret == NULL)
3368 return NULL;
3369
3370 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
3371 elf32_arm_link_hash_newfunc,
3372 sizeof (struct elf32_arm_link_hash_entry),
3373 ARM_ELF_DATA))
3374 {
3375 free (ret);
3376 return NULL;
3377 }
3378
3379 ret->sdynbss = NULL;
3380 ret->srelbss = NULL;
3381 ret->srelplt2 = NULL;
3382 ret->dt_tlsdesc_plt = 0;
3383 ret->dt_tlsdesc_got = 0;
3384 ret->tls_trampoline = 0;
3385 ret->next_tls_desc_index = 0;
3386 ret->num_tls_desc = 0;
3387 ret->thumb_glue_size = 0;
3388 ret->arm_glue_size = 0;
3389 ret->bx_glue_size = 0;
3390 memset (ret->bx_glue_offset, 0, sizeof (ret->bx_glue_offset));
3391 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3392 ret->vfp11_erratum_glue_size = 0;
3393 ret->num_vfp11_fixes = 0;
3394 ret->fix_cortex_a8 = 0;
3395 ret->fix_arm1176 = 0;
3396 ret->bfd_of_glue_owner = NULL;
3397 ret->byteswap_code = 0;
3398 ret->target1_is_rel = 0;
3399 ret->target2_reloc = R_ARM_NONE;
3400 #ifdef FOUR_WORD_PLT
3401 ret->plt_header_size = 16;
3402 ret->plt_entry_size = 16;
3403 #else
3404 ret->plt_header_size = 20;
3405 ret->plt_entry_size = 12;
3406 #endif
3407 ret->fix_v4bx = 0;
3408 ret->use_blx = 0;
3409 ret->vxworks_p = 0;
3410 ret->symbian_p = 0;
3411 ret->use_rel = 1;
3412 ret->sym_cache.abfd = NULL;
3413 ret->obfd = abfd;
3414 ret->tls_ldm_got.refcount = 0;
3415 ret->stub_bfd = NULL;
3416 ret->add_stub_section = NULL;
3417 ret->layout_sections_again = NULL;
3418 ret->stub_group = NULL;
3419 ret->top_id = 0;
3420 ret->bfd_count = 0;
3421 ret->top_index = 0;
3422 ret->input_list = NULL;
3423
3424 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
3425 sizeof (struct elf32_arm_stub_hash_entry)))
3426 {
3427 free (ret);
3428 return NULL;
3429 }
3430
3431 return &ret->root.root;
3432 }
3433
3434 /* Free the derived linker hash table. */
3435
3436 static void
3437 elf32_arm_hash_table_free (struct bfd_link_hash_table *hash)
3438 {
3439 struct elf32_arm_link_hash_table *ret
3440 = (struct elf32_arm_link_hash_table *) hash;
3441
3442 bfd_hash_table_free (&ret->stub_hash_table);
3443 _bfd_generic_link_hash_table_free (hash);
3444 }
3445
3446 /* Determine if we're dealing with a Thumb only architecture. */
3447
3448 static bfd_boolean
3449 using_thumb_only (struct elf32_arm_link_hash_table *globals)
3450 {
3451 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3452 Tag_CPU_arch);
3453 int profile;
3454
3455 if (arch == TAG_CPU_ARCH_V6_M || arch == TAG_CPU_ARCH_V6S_M)
3456 return TRUE;
3457
3458 if (arch != TAG_CPU_ARCH_V7 && arch != TAG_CPU_ARCH_V7E_M)
3459 return FALSE;
3460
3461 profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3462 Tag_CPU_arch_profile);
3463
3464 return profile == 'M';
3465 }
3466
3467 /* Determine if we're dealing with a Thumb-2 object. */
3468
3469 static bfd_boolean
3470 using_thumb2 (struct elf32_arm_link_hash_table *globals)
3471 {
3472 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3473 Tag_CPU_arch);
3474 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
3475 }
3476
3477 /* Determine what kind of NOPs are available. */
3478
3479 static bfd_boolean
3480 arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3481 {
3482 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3483 Tag_CPU_arch);
3484 return arch == TAG_CPU_ARCH_V6T2
3485 || arch == TAG_CPU_ARCH_V6K
3486 || arch == TAG_CPU_ARCH_V7
3487 || arch == TAG_CPU_ARCH_V7E_M;
3488 }
3489
3490 static bfd_boolean
3491 arch_has_thumb2_nop (struct elf32_arm_link_hash_table *globals)
3492 {
3493 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3494 Tag_CPU_arch);
3495 return (arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7
3496 || arch == TAG_CPU_ARCH_V7E_M);
3497 }
3498
3499 static bfd_boolean
3500 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3501 {
3502 switch (stub_type)
3503 {
3504 case arm_stub_long_branch_thumb_only:
3505 case arm_stub_long_branch_v4t_thumb_arm:
3506 case arm_stub_short_branch_v4t_thumb_arm:
3507 case arm_stub_long_branch_v4t_thumb_arm_pic:
3508 case arm_stub_long_branch_v4t_thumb_tls_pic:
3509 case arm_stub_long_branch_thumb_only_pic:
3510 return TRUE;
3511 case arm_stub_none:
3512 BFD_FAIL ();
3513 return FALSE;
3514 break;
3515 default:
3516 return FALSE;
3517 }
3518 }
3519
3520 /* Determine the type of stub needed, if any, for a call. */
3521
3522 static enum elf32_arm_stub_type
3523 arm_type_of_stub (struct bfd_link_info *info,
3524 asection *input_sec,
3525 const Elf_Internal_Rela *rel,
3526 unsigned char st_type,
3527 enum arm_st_branch_type *actual_branch_type,
3528 struct elf32_arm_link_hash_entry *hash,
3529 bfd_vma destination,
3530 asection *sym_sec,
3531 bfd *input_bfd,
3532 const char *name)
3533 {
3534 bfd_vma location;
3535 bfd_signed_vma branch_offset;
3536 unsigned int r_type;
3537 struct elf32_arm_link_hash_table * globals;
3538 int thumb2;
3539 int thumb_only;
3540 enum elf32_arm_stub_type stub_type = arm_stub_none;
3541 int use_plt = 0;
3542 enum arm_st_branch_type branch_type = *actual_branch_type;
3543 union gotplt_union *root_plt;
3544 struct arm_plt_info *arm_plt;
3545
3546 if (branch_type == ST_BRANCH_LONG)
3547 return stub_type;
3548
3549 globals = elf32_arm_hash_table (info);
3550 if (globals == NULL)
3551 return stub_type;
3552
3553 thumb_only = using_thumb_only (globals);
3554
3555 thumb2 = using_thumb2 (globals);
3556
3557 /* Determine where the call point is. */
3558 location = (input_sec->output_offset
3559 + input_sec->output_section->vma
3560 + rel->r_offset);
3561
3562 r_type = ELF32_R_TYPE (rel->r_info);
3563
3564 /* For TLS call relocs, it is the caller's responsibility to provide
3565 the address of the appropriate trampoline. */
3566 if (r_type != R_ARM_TLS_CALL
3567 && r_type != R_ARM_THM_TLS_CALL
3568 && elf32_arm_get_plt_info (input_bfd, hash, ELF32_R_SYM (rel->r_info),
3569 &root_plt, &arm_plt)
3570 && root_plt->offset != (bfd_vma) -1)
3571 {
3572 asection *splt;
3573
3574 if (hash == NULL || hash->is_iplt)
3575 splt = globals->root.iplt;
3576 else
3577 splt = globals->root.splt;
3578 if (splt != NULL)
3579 {
3580 use_plt = 1;
3581
3582 /* Note when dealing with PLT entries: the main PLT stub is in
3583 ARM mode, so if the branch is in Thumb mode, another
3584 Thumb->ARM stub will be inserted later just before the ARM
3585 PLT stub. We don't take this extra distance into account
3586 here, because if a long branch stub is needed, we'll add a
3587 Thumb->Arm one and branch directly to the ARM PLT entry
3588 because it avoids spreading offset corrections in several
3589 places. */
3590
3591 destination = (splt->output_section->vma
3592 + splt->output_offset
3593 + root_plt->offset);
3594 st_type = STT_FUNC;
3595 branch_type = ST_BRANCH_TO_ARM;
3596 }
3597 }
3598 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
3599 BFD_ASSERT (st_type != STT_GNU_IFUNC);
3600
3601 branch_offset = (bfd_signed_vma)(destination - location);
3602
3603 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3604 || r_type == R_ARM_THM_TLS_CALL)
3605 {
3606 /* Handle cases where:
3607 - this call goes too far (different Thumb/Thumb2 max
3608 distance)
3609 - it's a Thumb->Arm call and blx is not available, or it's a
3610 Thumb->Arm branch (not bl). A stub is needed in this case,
3611 but only if this call is not through a PLT entry. Indeed,
3612 PLT stubs handle mode switching already.
3613 */
3614 if ((!thumb2
3615 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3616 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3617 || (thumb2
3618 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3619 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
3620 || (branch_type == ST_BRANCH_TO_ARM
3621 && (((r_type == R_ARM_THM_CALL
3622 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
3623 || (r_type == R_ARM_THM_JUMP24))
3624 && !use_plt))
3625 {
3626 if (branch_type == ST_BRANCH_TO_THUMB)
3627 {
3628 /* Thumb to thumb. */
3629 if (!thumb_only)
3630 {
3631 stub_type = (info->shared | globals->pic_veneer)
3632 /* PIC stubs. */
3633 ? ((globals->use_blx
3634 && (r_type == R_ARM_THM_CALL))
3635 /* V5T and above. Stub starts with ARM code, so
3636 we must be able to switch mode before
3637 reaching it, which is only possible for 'bl'
3638 (ie R_ARM_THM_CALL relocation). */
3639 ? arm_stub_long_branch_any_thumb_pic
3640 /* On V4T, use Thumb code only. */
3641 : arm_stub_long_branch_v4t_thumb_thumb_pic)
3642
3643 /* non-PIC stubs. */
3644 : ((globals->use_blx
3645 && (r_type == R_ARM_THM_CALL))
3646 /* V5T and above. */
3647 ? arm_stub_long_branch_any_any
3648 /* V4T. */
3649 : arm_stub_long_branch_v4t_thumb_thumb);
3650 }
3651 else
3652 {
3653 stub_type = (info->shared | globals->pic_veneer)
3654 /* PIC stub. */
3655 ? arm_stub_long_branch_thumb_only_pic
3656 /* non-PIC stub. */
3657 : arm_stub_long_branch_thumb_only;
3658 }
3659 }
3660 else
3661 {
3662 /* Thumb to arm. */
3663 if (sym_sec != NULL
3664 && sym_sec->owner != NULL
3665 && !INTERWORK_FLAG (sym_sec->owner))
3666 {
3667 (*_bfd_error_handler)
3668 (_("%B(%s): warning: interworking not enabled.\n"
3669 " first occurrence: %B: Thumb call to ARM"),
3670 sym_sec->owner, input_bfd, name);
3671 }
3672
3673 stub_type =
3674 (info->shared | globals->pic_veneer)
3675 /* PIC stubs. */
3676 ? (r_type == R_ARM_THM_TLS_CALL
3677 /* TLS PIC stubs */
3678 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
3679 : arm_stub_long_branch_v4t_thumb_tls_pic)
3680 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3681 /* V5T PIC and above. */
3682 ? arm_stub_long_branch_any_arm_pic
3683 /* V4T PIC stub. */
3684 : arm_stub_long_branch_v4t_thumb_arm_pic))
3685
3686 /* non-PIC stubs. */
3687 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3688 /* V5T and above. */
3689 ? arm_stub_long_branch_any_any
3690 /* V4T. */
3691 : arm_stub_long_branch_v4t_thumb_arm);
3692
3693 /* Handle v4t short branches. */
3694 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
3695 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3696 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
3697 stub_type = arm_stub_short_branch_v4t_thumb_arm;
3698 }
3699 }
3700 }
3701 else if (r_type == R_ARM_CALL
3702 || r_type == R_ARM_JUMP24
3703 || r_type == R_ARM_PLT32
3704 || r_type == R_ARM_TLS_CALL)
3705 {
3706 if (branch_type == ST_BRANCH_TO_THUMB)
3707 {
3708 /* Arm to thumb. */
3709
3710 if (sym_sec != NULL
3711 && sym_sec->owner != NULL
3712 && !INTERWORK_FLAG (sym_sec->owner))
3713 {
3714 (*_bfd_error_handler)
3715 (_("%B(%s): warning: interworking not enabled.\n"
3716 " first occurrence: %B: ARM call to Thumb"),
3717 sym_sec->owner, input_bfd, name);
3718 }
3719
3720 /* We have an extra 2-bytes reach because of
3721 the mode change (bit 24 (H) of BLX encoding). */
3722 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3723 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
3724 || (r_type == R_ARM_CALL && !globals->use_blx)
3725 || (r_type == R_ARM_JUMP24)
3726 || (r_type == R_ARM_PLT32))
3727 {
3728 stub_type = (info->shared | globals->pic_veneer)
3729 /* PIC stubs. */
3730 ? ((globals->use_blx)
3731 /* V5T and above. */
3732 ? arm_stub_long_branch_any_thumb_pic
3733 /* V4T stub. */
3734 : arm_stub_long_branch_v4t_arm_thumb_pic)
3735
3736 /* non-PIC stubs. */
3737 : ((globals->use_blx)
3738 /* V5T and above. */
3739 ? arm_stub_long_branch_any_any
3740 /* V4T. */
3741 : arm_stub_long_branch_v4t_arm_thumb);
3742 }
3743 }
3744 else
3745 {
3746 /* Arm to arm. */
3747 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
3748 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
3749 {
3750 stub_type =
3751 (info->shared | globals->pic_veneer)
3752 /* PIC stubs. */
3753 ? (r_type == R_ARM_TLS_CALL
3754 /* TLS PIC Stub */
3755 ? arm_stub_long_branch_any_tls_pic
3756 : arm_stub_long_branch_any_arm_pic)
3757 /* non-PIC stubs. */
3758 : arm_stub_long_branch_any_any;
3759 }
3760 }
3761 }
3762
3763 /* If a stub is needed, record the actual destination type. */
3764 if (stub_type != arm_stub_none)
3765 *actual_branch_type = branch_type;
3766
3767 return stub_type;
3768 }
3769
3770 /* Build a name for an entry in the stub hash table. */
3771
3772 static char *
3773 elf32_arm_stub_name (const asection *input_section,
3774 const asection *sym_sec,
3775 const struct elf32_arm_link_hash_entry *hash,
3776 const Elf_Internal_Rela *rel,
3777 enum elf32_arm_stub_type stub_type)
3778 {
3779 char *stub_name;
3780 bfd_size_type len;
3781
3782 if (hash)
3783 {
3784 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
3785 stub_name = (char *) bfd_malloc (len);
3786 if (stub_name != NULL)
3787 sprintf (stub_name, "%08x_%s+%x_%d",
3788 input_section->id & 0xffffffff,
3789 hash->root.root.root.string,
3790 (int) rel->r_addend & 0xffffffff,
3791 (int) stub_type);
3792 }
3793 else
3794 {
3795 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
3796 stub_name = (char *) bfd_malloc (len);
3797 if (stub_name != NULL)
3798 sprintf (stub_name, "%08x_%x:%x+%x_%d",
3799 input_section->id & 0xffffffff,
3800 sym_sec->id & 0xffffffff,
3801 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
3802 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
3803 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
3804 (int) rel->r_addend & 0xffffffff,
3805 (int) stub_type);
3806 }
3807
3808 return stub_name;
3809 }
3810
3811 /* Look up an entry in the stub hash. Stub entries are cached because
3812 creating the stub name takes a bit of time. */
3813
3814 static struct elf32_arm_stub_hash_entry *
3815 elf32_arm_get_stub_entry (const asection *input_section,
3816 const asection *sym_sec,
3817 struct elf_link_hash_entry *hash,
3818 const Elf_Internal_Rela *rel,
3819 struct elf32_arm_link_hash_table *htab,
3820 enum elf32_arm_stub_type stub_type)
3821 {
3822 struct elf32_arm_stub_hash_entry *stub_entry;
3823 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
3824 const asection *id_sec;
3825
3826 if ((input_section->flags & SEC_CODE) == 0)
3827 return NULL;
3828
3829 /* If this input section is part of a group of sections sharing one
3830 stub section, then use the id of the first section in the group.
3831 Stub names need to include a section id, as there may well be
3832 more than one stub used to reach say, printf, and we need to
3833 distinguish between them. */
3834 id_sec = htab->stub_group[input_section->id].link_sec;
3835
3836 if (h != NULL && h->stub_cache != NULL
3837 && h->stub_cache->h == h
3838 && h->stub_cache->id_sec == id_sec
3839 && h->stub_cache->stub_type == stub_type)
3840 {
3841 stub_entry = h->stub_cache;
3842 }
3843 else
3844 {
3845 char *stub_name;
3846
3847 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
3848 if (stub_name == NULL)
3849 return NULL;
3850
3851 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
3852 stub_name, FALSE, FALSE);
3853 if (h != NULL)
3854 h->stub_cache = stub_entry;
3855
3856 free (stub_name);
3857 }
3858
3859 return stub_entry;
3860 }
3861
3862 /* Find or create a stub section. Returns a pointer to the stub section, and
3863 the section to which the stub section will be attached (in *LINK_SEC_P).
3864 LINK_SEC_P may be NULL. */
3865
3866 static asection *
3867 elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
3868 struct elf32_arm_link_hash_table *htab)
3869 {
3870 asection *link_sec;
3871 asection *stub_sec;
3872
3873 link_sec = htab->stub_group[section->id].link_sec;
3874 BFD_ASSERT (link_sec != NULL);
3875 stub_sec = htab->stub_group[section->id].stub_sec;
3876
3877 if (stub_sec == NULL)
3878 {
3879 stub_sec = htab->stub_group[link_sec->id].stub_sec;
3880 if (stub_sec == NULL)
3881 {
3882 size_t namelen;
3883 bfd_size_type len;
3884 char *s_name;
3885
3886 namelen = strlen (link_sec->name);
3887 len = namelen + sizeof (STUB_SUFFIX);
3888 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
3889 if (s_name == NULL)
3890 return NULL;
3891
3892 memcpy (s_name, link_sec->name, namelen);
3893 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
3894 stub_sec = (*htab->add_stub_section) (s_name, link_sec);
3895 if (stub_sec == NULL)
3896 return NULL;
3897 htab->stub_group[link_sec->id].stub_sec = stub_sec;
3898 }
3899 htab->stub_group[section->id].stub_sec = stub_sec;
3900 }
3901
3902 if (link_sec_p)
3903 *link_sec_p = link_sec;
3904
3905 return stub_sec;
3906 }
3907
3908 /* Add a new stub entry to the stub hash. Not all fields of the new
3909 stub entry are initialised. */
3910
3911 static struct elf32_arm_stub_hash_entry *
3912 elf32_arm_add_stub (const char *stub_name,
3913 asection *section,
3914 struct elf32_arm_link_hash_table *htab)
3915 {
3916 asection *link_sec;
3917 asection *stub_sec;
3918 struct elf32_arm_stub_hash_entry *stub_entry;
3919
3920 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab);
3921 if (stub_sec == NULL)
3922 return NULL;
3923
3924 /* Enter this entry into the linker stub hash table. */
3925 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
3926 TRUE, FALSE);
3927 if (stub_entry == NULL)
3928 {
3929 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
3930 section->owner,
3931 stub_name);
3932 return NULL;
3933 }
3934
3935 stub_entry->stub_sec = stub_sec;
3936 stub_entry->stub_offset = 0;
3937 stub_entry->id_sec = link_sec;
3938
3939 return stub_entry;
3940 }
3941
3942 /* Store an Arm insn into an output section not processed by
3943 elf32_arm_write_section. */
3944
3945 static void
3946 put_arm_insn (struct elf32_arm_link_hash_table * htab,
3947 bfd * output_bfd, bfd_vma val, void * ptr)
3948 {
3949 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3950 bfd_putl32 (val, ptr);
3951 else
3952 bfd_putb32 (val, ptr);
3953 }
3954
3955 /* Store a 16-bit Thumb insn into an output section not processed by
3956 elf32_arm_write_section. */
3957
3958 static void
3959 put_thumb_insn (struct elf32_arm_link_hash_table * htab,
3960 bfd * output_bfd, bfd_vma val, void * ptr)
3961 {
3962 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3963 bfd_putl16 (val, ptr);
3964 else
3965 bfd_putb16 (val, ptr);
3966 }
3967
3968 /* If it's possible to change R_TYPE to a more efficient access
3969 model, return the new reloc type. */
3970
3971 static unsigned
3972 elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
3973 struct elf_link_hash_entry *h)
3974 {
3975 int is_local = (h == NULL);
3976
3977 if (info->shared || (h && h->root.type == bfd_link_hash_undefweak))
3978 return r_type;
3979
3980 /* We do not support relaxations for Old TLS models. */
3981 switch (r_type)
3982 {
3983 case R_ARM_TLS_GOTDESC:
3984 case R_ARM_TLS_CALL:
3985 case R_ARM_THM_TLS_CALL:
3986 case R_ARM_TLS_DESCSEQ:
3987 case R_ARM_THM_TLS_DESCSEQ:
3988 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
3989 }
3990
3991 return r_type;
3992 }
3993
3994 static bfd_reloc_status_type elf32_arm_final_link_relocate
3995 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
3996 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
3997 const char *, unsigned char, enum arm_st_branch_type,
3998 struct elf_link_hash_entry *, bfd_boolean *, char **);
3999
4000 static unsigned int
4001 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4002 {
4003 switch (stub_type)
4004 {
4005 case arm_stub_a8_veneer_b_cond:
4006 case arm_stub_a8_veneer_b:
4007 case arm_stub_a8_veneer_bl:
4008 return 2;
4009
4010 case arm_stub_long_branch_any_any:
4011 case arm_stub_long_branch_v4t_arm_thumb:
4012 case arm_stub_long_branch_thumb_only:
4013 case arm_stub_long_branch_v4t_thumb_thumb:
4014 case arm_stub_long_branch_v4t_thumb_arm:
4015 case arm_stub_short_branch_v4t_thumb_arm:
4016 case arm_stub_long_branch_any_arm_pic:
4017 case arm_stub_long_branch_any_thumb_pic:
4018 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4019 case arm_stub_long_branch_v4t_arm_thumb_pic:
4020 case arm_stub_long_branch_v4t_thumb_arm_pic:
4021 case arm_stub_long_branch_thumb_only_pic:
4022 case arm_stub_long_branch_any_tls_pic:
4023 case arm_stub_long_branch_v4t_thumb_tls_pic:
4024 case arm_stub_a8_veneer_blx:
4025 return 4;
4026
4027 default:
4028 abort (); /* Should be unreachable. */
4029 }
4030 }
4031
4032 static bfd_boolean
4033 arm_build_one_stub (struct bfd_hash_entry *gen_entry,
4034 void * in_arg)
4035 {
4036 #define MAXRELOCS 2
4037 struct elf32_arm_stub_hash_entry *stub_entry;
4038 struct elf32_arm_link_hash_table *globals;
4039 struct bfd_link_info *info;
4040 asection *stub_sec;
4041 bfd *stub_bfd;
4042 bfd_byte *loc;
4043 bfd_vma sym_value;
4044 int template_size;
4045 int size;
4046 const insn_sequence *template_sequence;
4047 int i;
4048 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
4049 int stub_reloc_offset[MAXRELOCS] = {0, 0};
4050 int nrelocs = 0;
4051
4052 /* Massage our args to the form they really have. */
4053 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4054 info = (struct bfd_link_info *) in_arg;
4055
4056 globals = elf32_arm_hash_table (info);
4057 if (globals == NULL)
4058 return FALSE;
4059
4060 stub_sec = stub_entry->stub_sec;
4061
4062 if ((globals->fix_cortex_a8 < 0)
4063 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
4064 /* We have to do less-strictly-aligned fixes last. */
4065 return TRUE;
4066
4067 /* Make a note of the offset within the stubs for this entry. */
4068 stub_entry->stub_offset = stub_sec->size;
4069 loc = stub_sec->contents + stub_entry->stub_offset;
4070
4071 stub_bfd = stub_sec->owner;
4072
4073 /* This is the address of the stub destination. */
4074 sym_value = (stub_entry->target_value
4075 + stub_entry->target_section->output_offset
4076 + stub_entry->target_section->output_section->vma);
4077
4078 template_sequence = stub_entry->stub_template;
4079 template_size = stub_entry->stub_template_size;
4080
4081 size = 0;
4082 for (i = 0; i < template_size; i++)
4083 {
4084 switch (template_sequence[i].type)
4085 {
4086 case THUMB16_TYPE:
4087 {
4088 bfd_vma data = (bfd_vma) template_sequence[i].data;
4089 if (template_sequence[i].reloc_addend != 0)
4090 {
4091 /* We've borrowed the reloc_addend field to mean we should
4092 insert a condition code into this (Thumb-1 branch)
4093 instruction. See THUMB16_BCOND_INSN. */
4094 BFD_ASSERT ((data & 0xff00) == 0xd000);
4095 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
4096 }
4097 bfd_put_16 (stub_bfd, data, loc + size);
4098 size += 2;
4099 }
4100 break;
4101
4102 case THUMB32_TYPE:
4103 bfd_put_16 (stub_bfd,
4104 (template_sequence[i].data >> 16) & 0xffff,
4105 loc + size);
4106 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
4107 loc + size + 2);
4108 if (template_sequence[i].r_type != R_ARM_NONE)
4109 {
4110 stub_reloc_idx[nrelocs] = i;
4111 stub_reloc_offset[nrelocs++] = size;
4112 }
4113 size += 4;
4114 break;
4115
4116 case ARM_TYPE:
4117 bfd_put_32 (stub_bfd, template_sequence[i].data,
4118 loc + size);
4119 /* Handle cases where the target is encoded within the
4120 instruction. */
4121 if (template_sequence[i].r_type == R_ARM_JUMP24)
4122 {
4123 stub_reloc_idx[nrelocs] = i;
4124 stub_reloc_offset[nrelocs++] = size;
4125 }
4126 size += 4;
4127 break;
4128
4129 case DATA_TYPE:
4130 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
4131 stub_reloc_idx[nrelocs] = i;
4132 stub_reloc_offset[nrelocs++] = size;
4133 size += 4;
4134 break;
4135
4136 default:
4137 BFD_FAIL ();
4138 return FALSE;
4139 }
4140 }
4141
4142 stub_sec->size += size;
4143
4144 /* Stub size has already been computed in arm_size_one_stub. Check
4145 consistency. */
4146 BFD_ASSERT (size == stub_entry->stub_size);
4147
4148 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
4149 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
4150 sym_value |= 1;
4151
4152 /* Assume there is at least one and at most MAXRELOCS entries to relocate
4153 in each stub. */
4154 BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
4155
4156 for (i = 0; i < nrelocs; i++)
4157 if (template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24
4158 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19
4159 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL
4160 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22)
4161 {
4162 Elf_Internal_Rela rel;
4163 bfd_boolean unresolved_reloc;
4164 char *error_message;
4165 enum arm_st_branch_type branch_type
4166 = (template_sequence[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22
4167 ? ST_BRANCH_TO_THUMB : ST_BRANCH_TO_ARM);
4168 bfd_vma points_to = sym_value + stub_entry->target_addend;
4169
4170 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4171 rel.r_info = ELF32_R_INFO (0,
4172 template_sequence[stub_reloc_idx[i]].r_type);
4173 rel.r_addend = template_sequence[stub_reloc_idx[i]].reloc_addend;
4174
4175 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
4176 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
4177 template should refer back to the instruction after the original
4178 branch. */
4179 points_to = sym_value;
4180
4181 /* There may be unintended consequences if this is not true. */
4182 BFD_ASSERT (stub_entry->h == NULL);
4183
4184 /* Note: _bfd_final_link_relocate doesn't handle these relocations
4185 properly. We should probably use this function unconditionally,
4186 rather than only for certain relocations listed in the enclosing
4187 conditional, for the sake of consistency. */
4188 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4189 (template_sequence[stub_reloc_idx[i]].r_type),
4190 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
4191 points_to, info, stub_entry->target_section, "", STT_FUNC,
4192 branch_type, (struct elf_link_hash_entry *) stub_entry->h,
4193 &unresolved_reloc, &error_message);
4194 }
4195 else
4196 {
4197 Elf_Internal_Rela rel;
4198 bfd_boolean unresolved_reloc;
4199 char *error_message;
4200 bfd_vma points_to = sym_value + stub_entry->target_addend
4201 + template_sequence[stub_reloc_idx[i]].reloc_addend;
4202
4203 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4204 rel.r_info = ELF32_R_INFO (0,
4205 template_sequence[stub_reloc_idx[i]].r_type);
4206 rel.r_addend = 0;
4207
4208 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4209 (template_sequence[stub_reloc_idx[i]].r_type),
4210 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
4211 points_to, info, stub_entry->target_section, "", STT_FUNC,
4212 stub_entry->branch_type,
4213 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
4214 &error_message);
4215 }
4216
4217 return TRUE;
4218 #undef MAXRELOCS
4219 }
4220
4221 /* Calculate the template, template size and instruction size for a stub.
4222 Return value is the instruction size. */
4223
4224 static unsigned int
4225 find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
4226 const insn_sequence **stub_template,
4227 int *stub_template_size)
4228 {
4229 const insn_sequence *template_sequence = NULL;
4230 int template_size = 0, i;
4231 unsigned int size;
4232
4233 template_sequence = stub_definitions[stub_type].template_sequence;
4234 if (stub_template)
4235 *stub_template = template_sequence;
4236
4237 template_size = stub_definitions[stub_type].template_size;
4238 if (stub_template_size)
4239 *stub_template_size = template_size;
4240
4241 size = 0;
4242 for (i = 0; i < template_size; i++)
4243 {
4244 switch (template_sequence[i].type)
4245 {
4246 case THUMB16_TYPE:
4247 size += 2;
4248 break;
4249
4250 case ARM_TYPE:
4251 case THUMB32_TYPE:
4252 case DATA_TYPE:
4253 size += 4;
4254 break;
4255
4256 default:
4257 BFD_FAIL ();
4258 return 0;
4259 }
4260 }
4261
4262 return size;
4263 }
4264
4265 /* As above, but don't actually build the stub. Just bump offset so
4266 we know stub section sizes. */
4267
4268 static bfd_boolean
4269 arm_size_one_stub (struct bfd_hash_entry *gen_entry,
4270 void *in_arg ATTRIBUTE_UNUSED)
4271 {
4272 struct elf32_arm_stub_hash_entry *stub_entry;
4273 const insn_sequence *template_sequence;
4274 int template_size, size;
4275
4276 /* Massage our args to the form they really have. */
4277 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4278
4279 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
4280 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
4281
4282 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
4283 &template_size);
4284
4285 stub_entry->stub_size = size;
4286 stub_entry->stub_template = template_sequence;
4287 stub_entry->stub_template_size = template_size;
4288
4289 size = (size + 7) & ~7;
4290 stub_entry->stub_sec->size += size;
4291
4292 return TRUE;
4293 }
4294
4295 /* External entry points for sizing and building linker stubs. */
4296
4297 /* Set up various things so that we can make a list of input sections
4298 for each output section included in the link. Returns -1 on error,
4299 0 when no stubs will be needed, and 1 on success. */
4300
4301 int
4302 elf32_arm_setup_section_lists (bfd *output_bfd,
4303 struct bfd_link_info *info)
4304 {
4305 bfd *input_bfd;
4306 unsigned int bfd_count;
4307 int top_id, top_index;
4308 asection *section;
4309 asection **input_list, **list;
4310 bfd_size_type amt;
4311 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4312
4313 if (htab == NULL)
4314 return 0;
4315 if (! is_elf_hash_table (htab))
4316 return 0;
4317
4318 /* Count the number of input BFDs and find the top input section id. */
4319 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
4320 input_bfd != NULL;
4321 input_bfd = input_bfd->link_next)
4322 {
4323 bfd_count += 1;
4324 for (section = input_bfd->sections;
4325 section != NULL;
4326 section = section->next)
4327 {
4328 if (top_id < section->id)
4329 top_id = section->id;
4330 }
4331 }
4332 htab->bfd_count = bfd_count;
4333
4334 amt = sizeof (struct map_stub) * (top_id + 1);
4335 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
4336 if (htab->stub_group == NULL)
4337 return -1;
4338 htab->top_id = top_id;
4339
4340 /* We can't use output_bfd->section_count here to find the top output
4341 section index as some sections may have been removed, and
4342 _bfd_strip_section_from_output doesn't renumber the indices. */
4343 for (section = output_bfd->sections, top_index = 0;
4344 section != NULL;
4345 section = section->next)
4346 {
4347 if (top_index < section->index)
4348 top_index = section->index;
4349 }
4350
4351 htab->top_index = top_index;
4352 amt = sizeof (asection *) * (top_index + 1);
4353 input_list = (asection **) bfd_malloc (amt);
4354 htab->input_list = input_list;
4355 if (input_list == NULL)
4356 return -1;
4357
4358 /* For sections we aren't interested in, mark their entries with a
4359 value we can check later. */
4360 list = input_list + top_index;
4361 do
4362 *list = bfd_abs_section_ptr;
4363 while (list-- != input_list);
4364
4365 for (section = output_bfd->sections;
4366 section != NULL;
4367 section = section->next)
4368 {
4369 if ((section->flags & SEC_CODE) != 0)
4370 input_list[section->index] = NULL;
4371 }
4372
4373 return 1;
4374 }
4375
4376 /* The linker repeatedly calls this function for each input section,
4377 in the order that input sections are linked into output sections.
4378 Build lists of input sections to determine groupings between which
4379 we may insert linker stubs. */
4380
4381 void
4382 elf32_arm_next_input_section (struct bfd_link_info *info,
4383 asection *isec)
4384 {
4385 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4386
4387 if (htab == NULL)
4388 return;
4389
4390 if (isec->output_section->index <= htab->top_index)
4391 {
4392 asection **list = htab->input_list + isec->output_section->index;
4393
4394 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
4395 {
4396 /* Steal the link_sec pointer for our list. */
4397 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
4398 /* This happens to make the list in reverse order,
4399 which we reverse later. */
4400 PREV_SEC (isec) = *list;
4401 *list = isec;
4402 }
4403 }
4404 }
4405
4406 /* See whether we can group stub sections together. Grouping stub
4407 sections may result in fewer stubs. More importantly, we need to
4408 put all .init* and .fini* stubs at the end of the .init or
4409 .fini output sections respectively, because glibc splits the
4410 _init and _fini functions into multiple parts. Putting a stub in
4411 the middle of a function is not a good idea. */
4412
4413 static void
4414 group_sections (struct elf32_arm_link_hash_table *htab,
4415 bfd_size_type stub_group_size,
4416 bfd_boolean stubs_always_after_branch)
4417 {
4418 asection **list = htab->input_list;
4419
4420 do
4421 {
4422 asection *tail = *list;
4423 asection *head;
4424
4425 if (tail == bfd_abs_section_ptr)
4426 continue;
4427
4428 /* Reverse the list: we must avoid placing stubs at the
4429 beginning of the section because the beginning of the text
4430 section may be required for an interrupt vector in bare metal
4431 code. */
4432 #define NEXT_SEC PREV_SEC
4433 head = NULL;
4434 while (tail != NULL)
4435 {
4436 /* Pop from tail. */
4437 asection *item = tail;
4438 tail = PREV_SEC (item);
4439
4440 /* Push on head. */
4441 NEXT_SEC (item) = head;
4442 head = item;
4443 }
4444
4445 while (head != NULL)
4446 {
4447 asection *curr;
4448 asection *next;
4449 bfd_vma stub_group_start = head->output_offset;
4450 bfd_vma end_of_next;
4451
4452 curr = head;
4453 while (NEXT_SEC (curr) != NULL)
4454 {
4455 next = NEXT_SEC (curr);
4456 end_of_next = next->output_offset + next->size;
4457 if (end_of_next - stub_group_start >= stub_group_size)
4458 /* End of NEXT is too far from start, so stop. */
4459 break;
4460 /* Add NEXT to the group. */
4461 curr = next;
4462 }
4463
4464 /* OK, the size from the start to the start of CURR is less
4465 than stub_group_size and thus can be handled by one stub
4466 section. (Or the head section is itself larger than
4467 stub_group_size, in which case we may be toast.)
4468 We should really be keeping track of the total size of
4469 stubs added here, as stubs contribute to the final output
4470 section size. */
4471 do
4472 {
4473 next = NEXT_SEC (head);
4474 /* Set up this stub group. */
4475 htab->stub_group[head->id].link_sec = curr;
4476 }
4477 while (head != curr && (head = next) != NULL);
4478
4479 /* But wait, there's more! Input sections up to stub_group_size
4480 bytes after the stub section can be handled by it too. */
4481 if (!stubs_always_after_branch)
4482 {
4483 stub_group_start = curr->output_offset + curr->size;
4484
4485 while (next != NULL)
4486 {
4487 end_of_next = next->output_offset + next->size;
4488 if (end_of_next - stub_group_start >= stub_group_size)
4489 /* End of NEXT is too far from stubs, so stop. */
4490 break;
4491 /* Add NEXT to the stub group. */
4492 head = next;
4493 next = NEXT_SEC (head);
4494 htab->stub_group[head->id].link_sec = curr;
4495 }
4496 }
4497 head = next;
4498 }
4499 }
4500 while (list++ != htab->input_list + htab->top_index);
4501
4502 free (htab->input_list);
4503 #undef PREV_SEC
4504 #undef NEXT_SEC
4505 }
4506
4507 /* Comparison function for sorting/searching relocations relating to Cortex-A8
4508 erratum fix. */
4509
4510 static int
4511 a8_reloc_compare (const void *a, const void *b)
4512 {
4513 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
4514 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
4515
4516 if (ra->from < rb->from)
4517 return -1;
4518 else if (ra->from > rb->from)
4519 return 1;
4520 else
4521 return 0;
4522 }
4523
4524 static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
4525 const char *, char **);
4526
4527 /* Helper function to scan code for sequences which might trigger the Cortex-A8
4528 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
4529 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
4530 otherwise. */
4531
4532 static bfd_boolean
4533 cortex_a8_erratum_scan (bfd *input_bfd,
4534 struct bfd_link_info *info,
4535 struct a8_erratum_fix **a8_fixes_p,
4536 unsigned int *num_a8_fixes_p,
4537 unsigned int *a8_fix_table_size_p,
4538 struct a8_erratum_reloc *a8_relocs,
4539 unsigned int num_a8_relocs,
4540 unsigned prev_num_a8_fixes,
4541 bfd_boolean *stub_changed_p)
4542 {
4543 asection *section;
4544 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4545 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
4546 unsigned int num_a8_fixes = *num_a8_fixes_p;
4547 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
4548
4549 if (htab == NULL)
4550 return FALSE;
4551
4552 for (section = input_bfd->sections;
4553 section != NULL;
4554 section = section->next)
4555 {
4556 bfd_byte *contents = NULL;
4557 struct _arm_elf_section_data *sec_data;
4558 unsigned int span;
4559 bfd_vma base_vma;
4560
4561 if (elf_section_type (section) != SHT_PROGBITS
4562 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
4563 || (section->flags & SEC_EXCLUDE) != 0
4564 || (section->sec_info_type == ELF_INFO_TYPE_JUST_SYMS)
4565 || (section->output_section == bfd_abs_section_ptr))
4566 continue;
4567
4568 base_vma = section->output_section->vma + section->output_offset;
4569
4570 if (elf_section_data (section)->this_hdr.contents != NULL)
4571 contents = elf_section_data (section)->this_hdr.contents;
4572 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
4573 return TRUE;
4574
4575 sec_data = elf32_arm_section_data (section);
4576
4577 for (span = 0; span < sec_data->mapcount; span++)
4578 {
4579 unsigned int span_start = sec_data->map[span].vma;
4580 unsigned int span_end = (span == sec_data->mapcount - 1)
4581 ? section->size : sec_data->map[span + 1].vma;
4582 unsigned int i;
4583 char span_type = sec_data->map[span].type;
4584 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
4585
4586 if (span_type != 't')
4587 continue;
4588
4589 /* Span is entirely within a single 4KB region: skip scanning. */
4590 if (((base_vma + span_start) & ~0xfff)
4591 == ((base_vma + span_end) & ~0xfff))
4592 continue;
4593
4594 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
4595
4596 * The opcode is BLX.W, BL.W, B.W, Bcc.W
4597 * The branch target is in the same 4KB region as the
4598 first half of the branch.
4599 * The instruction before the branch is a 32-bit
4600 length non-branch instruction. */
4601 for (i = span_start; i < span_end;)
4602 {
4603 unsigned int insn = bfd_getl16 (&contents[i]);
4604 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
4605 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
4606
4607 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
4608 insn_32bit = TRUE;
4609
4610 if (insn_32bit)
4611 {
4612 /* Load the rest of the insn (in manual-friendly order). */
4613 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
4614
4615 /* Encoding T4: B<c>.W. */
4616 is_b = (insn & 0xf800d000) == 0xf0009000;
4617 /* Encoding T1: BL<c>.W. */
4618 is_bl = (insn & 0xf800d000) == 0xf000d000;
4619 /* Encoding T2: BLX<c>.W. */
4620 is_blx = (insn & 0xf800d000) == 0xf000c000;
4621 /* Encoding T3: B<c>.W (not permitted in IT block). */
4622 is_bcc = (insn & 0xf800d000) == 0xf0008000
4623 && (insn & 0x07f00000) != 0x03800000;
4624 }
4625
4626 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
4627
4628 if (((base_vma + i) & 0xfff) == 0xffe
4629 && insn_32bit
4630 && is_32bit_branch
4631 && last_was_32bit
4632 && ! last_was_branch)
4633 {
4634 bfd_signed_vma offset = 0;
4635 bfd_boolean force_target_arm = FALSE;
4636 bfd_boolean force_target_thumb = FALSE;
4637 bfd_vma target;
4638 enum elf32_arm_stub_type stub_type = arm_stub_none;
4639 struct a8_erratum_reloc key, *found;
4640 bfd_boolean use_plt = FALSE;
4641
4642 key.from = base_vma + i;
4643 found = (struct a8_erratum_reloc *)
4644 bsearch (&key, a8_relocs, num_a8_relocs,
4645 sizeof (struct a8_erratum_reloc),
4646 &a8_reloc_compare);
4647
4648 if (found)
4649 {
4650 char *error_message = NULL;
4651 struct elf_link_hash_entry *entry;
4652
4653 /* We don't care about the error returned from this
4654 function, only if there is glue or not. */
4655 entry = find_thumb_glue (info, found->sym_name,
4656 &error_message);
4657
4658 if (entry)
4659 found->non_a8_stub = TRUE;
4660
4661 /* Keep a simpler condition, for the sake of clarity. */
4662 if (htab->root.splt != NULL && found->hash != NULL
4663 && found->hash->root.plt.offset != (bfd_vma) -1)
4664 use_plt = TRUE;
4665
4666 if (found->r_type == R_ARM_THM_CALL)
4667 {
4668 if (found->branch_type == ST_BRANCH_TO_ARM
4669 || use_plt)
4670 force_target_arm = TRUE;
4671 else
4672 force_target_thumb = TRUE;
4673 }
4674 }
4675
4676 /* Check if we have an offending branch instruction. */
4677
4678 if (found && found->non_a8_stub)
4679 /* We've already made a stub for this instruction, e.g.
4680 it's a long branch or a Thumb->ARM stub. Assume that
4681 stub will suffice to work around the A8 erratum (see
4682 setting of always_after_branch above). */
4683 ;
4684 else if (is_bcc)
4685 {
4686 offset = (insn & 0x7ff) << 1;
4687 offset |= (insn & 0x3f0000) >> 4;
4688 offset |= (insn & 0x2000) ? 0x40000 : 0;
4689 offset |= (insn & 0x800) ? 0x80000 : 0;
4690 offset |= (insn & 0x4000000) ? 0x100000 : 0;
4691 if (offset & 0x100000)
4692 offset |= ~ ((bfd_signed_vma) 0xfffff);
4693 stub_type = arm_stub_a8_veneer_b_cond;
4694 }
4695 else if (is_b || is_bl || is_blx)
4696 {
4697 int s = (insn & 0x4000000) != 0;
4698 int j1 = (insn & 0x2000) != 0;
4699 int j2 = (insn & 0x800) != 0;
4700 int i1 = !(j1 ^ s);
4701 int i2 = !(j2 ^ s);
4702
4703 offset = (insn & 0x7ff) << 1;
4704 offset |= (insn & 0x3ff0000) >> 4;
4705 offset |= i2 << 22;
4706 offset |= i1 << 23;
4707 offset |= s << 24;
4708 if (offset & 0x1000000)
4709 offset |= ~ ((bfd_signed_vma) 0xffffff);
4710
4711 if (is_blx)
4712 offset &= ~ ((bfd_signed_vma) 3);
4713
4714 stub_type = is_blx ? arm_stub_a8_veneer_blx :
4715 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
4716 }
4717
4718 if (stub_type != arm_stub_none)
4719 {
4720 bfd_vma pc_for_insn = base_vma + i + 4;
4721
4722 /* The original instruction is a BL, but the target is
4723 an ARM instruction. If we were not making a stub,
4724 the BL would have been converted to a BLX. Use the
4725 BLX stub instead in that case. */
4726 if (htab->use_blx && force_target_arm
4727 && stub_type == arm_stub_a8_veneer_bl)
4728 {
4729 stub_type = arm_stub_a8_veneer_blx;
4730 is_blx = TRUE;
4731 is_bl = FALSE;
4732 }
4733 /* Conversely, if the original instruction was
4734 BLX but the target is Thumb mode, use the BL
4735 stub. */
4736 else if (force_target_thumb
4737 && stub_type == arm_stub_a8_veneer_blx)
4738 {
4739 stub_type = arm_stub_a8_veneer_bl;
4740 is_blx = FALSE;
4741 is_bl = TRUE;
4742 }
4743
4744 if (is_blx)
4745 pc_for_insn &= ~ ((bfd_vma) 3);
4746
4747 /* If we found a relocation, use the proper destination,
4748 not the offset in the (unrelocated) instruction.
4749 Note this is always done if we switched the stub type
4750 above. */
4751 if (found)
4752 offset =
4753 (bfd_signed_vma) (found->destination - pc_for_insn);
4754
4755 /* If the stub will use a Thumb-mode branch to a
4756 PLT target, redirect it to the preceding Thumb
4757 entry point. */
4758 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
4759 offset -= PLT_THUMB_STUB_SIZE;
4760
4761 target = pc_for_insn + offset;
4762
4763 /* The BLX stub is ARM-mode code. Adjust the offset to
4764 take the different PC value (+8 instead of +4) into
4765 account. */
4766 if (stub_type == arm_stub_a8_veneer_blx)
4767 offset += 4;
4768
4769 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
4770 {
4771 char *stub_name = NULL;
4772
4773 if (num_a8_fixes == a8_fix_table_size)
4774 {
4775 a8_fix_table_size *= 2;
4776 a8_fixes = (struct a8_erratum_fix *)
4777 bfd_realloc (a8_fixes,
4778 sizeof (struct a8_erratum_fix)
4779 * a8_fix_table_size);
4780 }
4781
4782 if (num_a8_fixes < prev_num_a8_fixes)
4783 {
4784 /* If we're doing a subsequent scan,
4785 check if we've found the same fix as
4786 before, and try and reuse the stub
4787 name. */
4788 stub_name = a8_fixes[num_a8_fixes].stub_name;
4789 if ((a8_fixes[num_a8_fixes].section != section)
4790 || (a8_fixes[num_a8_fixes].offset != i))
4791 {
4792 free (stub_name);
4793 stub_name = NULL;
4794 *stub_changed_p = TRUE;
4795 }
4796 }
4797
4798 if (!stub_name)
4799 {
4800 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
4801 if (stub_name != NULL)
4802 sprintf (stub_name, "%x:%x", section->id, i);
4803 }
4804
4805 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
4806 a8_fixes[num_a8_fixes].section = section;
4807 a8_fixes[num_a8_fixes].offset = i;
4808 a8_fixes[num_a8_fixes].addend = offset;
4809 a8_fixes[num_a8_fixes].orig_insn = insn;
4810 a8_fixes[num_a8_fixes].stub_name = stub_name;
4811 a8_fixes[num_a8_fixes].stub_type = stub_type;
4812 a8_fixes[num_a8_fixes].branch_type =
4813 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
4814
4815 num_a8_fixes++;
4816 }
4817 }
4818 }
4819
4820 i += insn_32bit ? 4 : 2;
4821 last_was_32bit = insn_32bit;
4822 last_was_branch = is_32bit_branch;
4823 }
4824 }
4825
4826 if (elf_section_data (section)->this_hdr.contents == NULL)
4827 free (contents);
4828 }
4829
4830 *a8_fixes_p = a8_fixes;
4831 *num_a8_fixes_p = num_a8_fixes;
4832 *a8_fix_table_size_p = a8_fix_table_size;
4833
4834 return FALSE;
4835 }
4836
4837 /* Determine and set the size of the stub section for a final link.
4838
4839 The basic idea here is to examine all the relocations looking for
4840 PC-relative calls to a target that is unreachable with a "bl"
4841 instruction. */
4842
4843 bfd_boolean
4844 elf32_arm_size_stubs (bfd *output_bfd,
4845 bfd *stub_bfd,
4846 struct bfd_link_info *info,
4847 bfd_signed_vma group_size,
4848 asection * (*add_stub_section) (const char *, asection *),
4849 void (*layout_sections_again) (void))
4850 {
4851 bfd_size_type stub_group_size;
4852 bfd_boolean stubs_always_after_branch;
4853 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4854 struct a8_erratum_fix *a8_fixes = NULL;
4855 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
4856 struct a8_erratum_reloc *a8_relocs = NULL;
4857 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
4858
4859 if (htab == NULL)
4860 return FALSE;
4861
4862 if (htab->fix_cortex_a8)
4863 {
4864 a8_fixes = (struct a8_erratum_fix *)
4865 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
4866 a8_relocs = (struct a8_erratum_reloc *)
4867 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
4868 }
4869
4870 /* Propagate mach to stub bfd, because it may not have been
4871 finalized when we created stub_bfd. */
4872 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
4873 bfd_get_mach (output_bfd));
4874
4875 /* Stash our params away. */
4876 htab->stub_bfd = stub_bfd;
4877 htab->add_stub_section = add_stub_section;
4878 htab->layout_sections_again = layout_sections_again;
4879 stubs_always_after_branch = group_size < 0;
4880
4881 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
4882 as the first half of a 32-bit branch straddling two 4K pages. This is a
4883 crude way of enforcing that. */
4884 if (htab->fix_cortex_a8)
4885 stubs_always_after_branch = 1;
4886
4887 if (group_size < 0)
4888 stub_group_size = -group_size;
4889 else
4890 stub_group_size = group_size;
4891
4892 if (stub_group_size == 1)
4893 {
4894 /* Default values. */
4895 /* Thumb branch range is +-4MB has to be used as the default
4896 maximum size (a given section can contain both ARM and Thumb
4897 code, so the worst case has to be taken into account).
4898
4899 This value is 24K less than that, which allows for 2025
4900 12-byte stubs. If we exceed that, then we will fail to link.
4901 The user will have to relink with an explicit group size
4902 option. */
4903 stub_group_size = 4170000;
4904 }
4905
4906 group_sections (htab, stub_group_size, stubs_always_after_branch);
4907
4908 /* If we're applying the cortex A8 fix, we need to determine the
4909 program header size now, because we cannot change it later --
4910 that could alter section placements. Notice the A8 erratum fix
4911 ends up requiring the section addresses to remain unchanged
4912 modulo the page size. That's something we cannot represent
4913 inside BFD, and we don't want to force the section alignment to
4914 be the page size. */
4915 if (htab->fix_cortex_a8)
4916 (*htab->layout_sections_again) ();
4917
4918 while (1)
4919 {
4920 bfd *input_bfd;
4921 unsigned int bfd_indx;
4922 asection *stub_sec;
4923 bfd_boolean stub_changed = FALSE;
4924 unsigned prev_num_a8_fixes = num_a8_fixes;
4925
4926 num_a8_fixes = 0;
4927 for (input_bfd = info->input_bfds, bfd_indx = 0;
4928 input_bfd != NULL;
4929 input_bfd = input_bfd->link_next, bfd_indx++)
4930 {
4931 Elf_Internal_Shdr *symtab_hdr;
4932 asection *section;
4933 Elf_Internal_Sym *local_syms = NULL;
4934
4935 num_a8_relocs = 0;
4936
4937 /* We'll need the symbol table in a second. */
4938 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4939 if (symtab_hdr->sh_info == 0)
4940 continue;
4941
4942 /* Walk over each section attached to the input bfd. */
4943 for (section = input_bfd->sections;
4944 section != NULL;
4945 section = section->next)
4946 {
4947 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
4948
4949 /* If there aren't any relocs, then there's nothing more
4950 to do. */
4951 if ((section->flags & SEC_RELOC) == 0
4952 || section->reloc_count == 0
4953 || (section->flags & SEC_CODE) == 0)
4954 continue;
4955
4956 /* If this section is a link-once section that will be
4957 discarded, then don't create any stubs. */
4958 if (section->output_section == NULL
4959 || section->output_section->owner != output_bfd)
4960 continue;
4961
4962 /* Get the relocs. */
4963 internal_relocs
4964 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
4965 NULL, info->keep_memory);
4966 if (internal_relocs == NULL)
4967 goto error_ret_free_local;
4968
4969 /* Now examine each relocation. */
4970 irela = internal_relocs;
4971 irelaend = irela + section->reloc_count;
4972 for (; irela < irelaend; irela++)
4973 {
4974 unsigned int r_type, r_indx;
4975 enum elf32_arm_stub_type stub_type;
4976 struct elf32_arm_stub_hash_entry *stub_entry;
4977 asection *sym_sec;
4978 bfd_vma sym_value;
4979 bfd_vma destination;
4980 struct elf32_arm_link_hash_entry *hash;
4981 const char *sym_name;
4982 char *stub_name;
4983 const asection *id_sec;
4984 unsigned char st_type;
4985 enum arm_st_branch_type branch_type;
4986 bfd_boolean created_stub = FALSE;
4987
4988 r_type = ELF32_R_TYPE (irela->r_info);
4989 r_indx = ELF32_R_SYM (irela->r_info);
4990
4991 if (r_type >= (unsigned int) R_ARM_max)
4992 {
4993 bfd_set_error (bfd_error_bad_value);
4994 error_ret_free_internal:
4995 if (elf_section_data (section)->relocs == NULL)
4996 free (internal_relocs);
4997 goto error_ret_free_local;
4998 }
4999
5000 hash = NULL;
5001 if (r_indx >= symtab_hdr->sh_info)
5002 hash = elf32_arm_hash_entry
5003 (elf_sym_hashes (input_bfd)
5004 [r_indx - symtab_hdr->sh_info]);
5005
5006 /* Only look for stubs on branch instructions, or
5007 non-relaxed TLSCALL */
5008 if ((r_type != (unsigned int) R_ARM_CALL)
5009 && (r_type != (unsigned int) R_ARM_THM_CALL)
5010 && (r_type != (unsigned int) R_ARM_JUMP24)
5011 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
5012 && (r_type != (unsigned int) R_ARM_THM_XPC22)
5013 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
5014 && (r_type != (unsigned int) R_ARM_PLT32)
5015 && !((r_type == (unsigned int) R_ARM_TLS_CALL
5016 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5017 && r_type == elf32_arm_tls_transition
5018 (info, r_type, &hash->root)
5019 && ((hash ? hash->tls_type
5020 : (elf32_arm_local_got_tls_type
5021 (input_bfd)[r_indx]))
5022 & GOT_TLS_GDESC) != 0))
5023 continue;
5024
5025 /* Now determine the call target, its name, value,
5026 section. */
5027 sym_sec = NULL;
5028 sym_value = 0;
5029 destination = 0;
5030 sym_name = NULL;
5031
5032 if (r_type == (unsigned int) R_ARM_TLS_CALL
5033 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5034 {
5035 /* A non-relaxed TLS call. The target is the
5036 plt-resident trampoline and nothing to do
5037 with the symbol. */
5038 BFD_ASSERT (htab->tls_trampoline > 0);
5039 sym_sec = htab->root.splt;
5040 sym_value = htab->tls_trampoline;
5041 hash = 0;
5042 st_type = STT_FUNC;
5043 branch_type = ST_BRANCH_TO_ARM;
5044 }
5045 else if (!hash)
5046 {
5047 /* It's a local symbol. */
5048 Elf_Internal_Sym *sym;
5049
5050 if (local_syms == NULL)
5051 {
5052 local_syms
5053 = (Elf_Internal_Sym *) symtab_hdr->contents;
5054 if (local_syms == NULL)
5055 local_syms
5056 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5057 symtab_hdr->sh_info, 0,
5058 NULL, NULL, NULL);
5059 if (local_syms == NULL)
5060 goto error_ret_free_internal;
5061 }
5062
5063 sym = local_syms + r_indx;
5064 if (sym->st_shndx == SHN_UNDEF)
5065 sym_sec = bfd_und_section_ptr;
5066 else if (sym->st_shndx == SHN_ABS)
5067 sym_sec = bfd_abs_section_ptr;
5068 else if (sym->st_shndx == SHN_COMMON)
5069 sym_sec = bfd_com_section_ptr;
5070 else
5071 sym_sec =
5072 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
5073
5074 if (!sym_sec)
5075 /* This is an undefined symbol. It can never
5076 be resolved. */
5077 continue;
5078
5079 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
5080 sym_value = sym->st_value;
5081 destination = (sym_value + irela->r_addend
5082 + sym_sec->output_offset
5083 + sym_sec->output_section->vma);
5084 st_type = ELF_ST_TYPE (sym->st_info);
5085 branch_type = ARM_SYM_BRANCH_TYPE (sym);
5086 sym_name
5087 = bfd_elf_string_from_elf_section (input_bfd,
5088 symtab_hdr->sh_link,
5089 sym->st_name);
5090 }
5091 else
5092 {
5093 /* It's an external symbol. */
5094 while (hash->root.root.type == bfd_link_hash_indirect
5095 || hash->root.root.type == bfd_link_hash_warning)
5096 hash = ((struct elf32_arm_link_hash_entry *)
5097 hash->root.root.u.i.link);
5098
5099 if (hash->root.root.type == bfd_link_hash_defined
5100 || hash->root.root.type == bfd_link_hash_defweak)
5101 {
5102 sym_sec = hash->root.root.u.def.section;
5103 sym_value = hash->root.root.u.def.value;
5104
5105 struct elf32_arm_link_hash_table *globals =
5106 elf32_arm_hash_table (info);
5107
5108 /* For a destination in a shared library,
5109 use the PLT stub as target address to
5110 decide whether a branch stub is
5111 needed. */
5112 if (globals != NULL
5113 && globals->root.splt != NULL
5114 && hash != NULL
5115 && hash->root.plt.offset != (bfd_vma) -1)
5116 {
5117 sym_sec = globals->root.splt;
5118 sym_value = hash->root.plt.offset;
5119 if (sym_sec->output_section != NULL)
5120 destination = (sym_value
5121 + sym_sec->output_offset
5122 + sym_sec->output_section->vma);
5123 }
5124 else if (sym_sec->output_section != NULL)
5125 destination = (sym_value + irela->r_addend
5126 + sym_sec->output_offset
5127 + sym_sec->output_section->vma);
5128 }
5129 else if ((hash->root.root.type == bfd_link_hash_undefined)
5130 || (hash->root.root.type == bfd_link_hash_undefweak))
5131 {
5132 /* For a shared library, use the PLT stub as
5133 target address to decide whether a long
5134 branch stub is needed.
5135 For absolute code, they cannot be handled. */
5136 struct elf32_arm_link_hash_table *globals =
5137 elf32_arm_hash_table (info);
5138
5139 if (globals != NULL
5140 && globals->root.splt != NULL
5141 && hash != NULL
5142 && hash->root.plt.offset != (bfd_vma) -1)
5143 {
5144 sym_sec = globals->root.splt;
5145 sym_value = hash->root.plt.offset;
5146 if (sym_sec->output_section != NULL)
5147 destination = (sym_value
5148 + sym_sec->output_offset
5149 + sym_sec->output_section->vma);
5150 }
5151 else
5152 continue;
5153 }
5154 else
5155 {
5156 bfd_set_error (bfd_error_bad_value);
5157 goto error_ret_free_internal;
5158 }
5159 st_type = hash->root.type;
5160 branch_type = hash->root.target_internal;
5161 sym_name = hash->root.root.root.string;
5162 }
5163
5164 do
5165 {
5166 /* Determine what (if any) linker stub is needed. */
5167 stub_type = arm_type_of_stub (info, section, irela,
5168 st_type, &branch_type,
5169 hash, destination, sym_sec,
5170 input_bfd, sym_name);
5171 if (stub_type == arm_stub_none)
5172 break;
5173
5174 /* Support for grouping stub sections. */
5175 id_sec = htab->stub_group[section->id].link_sec;
5176
5177 /* Get the name of this stub. */
5178 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash,
5179 irela, stub_type);
5180 if (!stub_name)
5181 goto error_ret_free_internal;
5182
5183 /* We've either created a stub for this reloc already,
5184 or we are about to. */
5185 created_stub = TRUE;
5186
5187 stub_entry = arm_stub_hash_lookup
5188 (&htab->stub_hash_table, stub_name,
5189 FALSE, FALSE);
5190 if (stub_entry != NULL)
5191 {
5192 /* The proper stub has already been created. */
5193 free (stub_name);
5194 stub_entry->target_value = sym_value;
5195 break;
5196 }
5197
5198 stub_entry = elf32_arm_add_stub (stub_name, section,
5199 htab);
5200 if (stub_entry == NULL)
5201 {
5202 free (stub_name);
5203 goto error_ret_free_internal;
5204 }
5205
5206 stub_entry->target_value = sym_value;
5207 stub_entry->target_section = sym_sec;
5208 stub_entry->stub_type = stub_type;
5209 stub_entry->h = hash;
5210 stub_entry->branch_type = branch_type;
5211
5212 if (sym_name == NULL)
5213 sym_name = "unnamed";
5214 stub_entry->output_name = (char *)
5215 bfd_alloc (htab->stub_bfd,
5216 sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5217 + strlen (sym_name));
5218 if (stub_entry->output_name == NULL)
5219 {
5220 free (stub_name);
5221 goto error_ret_free_internal;
5222 }
5223
5224 /* For historical reasons, use the existing names for
5225 ARM-to-Thumb and Thumb-to-ARM stubs. */
5226 if ((r_type == (unsigned int) R_ARM_THM_CALL
5227 || r_type == (unsigned int) R_ARM_THM_JUMP24)
5228 && branch_type == ST_BRANCH_TO_ARM)
5229 sprintf (stub_entry->output_name,
5230 THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5231 else if ((r_type == (unsigned int) R_ARM_CALL
5232 || r_type == (unsigned int) R_ARM_JUMP24)
5233 && branch_type == ST_BRANCH_TO_THUMB)
5234 sprintf (stub_entry->output_name,
5235 ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5236 else
5237 sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
5238 sym_name);
5239
5240 stub_changed = TRUE;
5241 }
5242 while (0);
5243
5244 /* Look for relocations which might trigger Cortex-A8
5245 erratum. */
5246 if (htab->fix_cortex_a8
5247 && (r_type == (unsigned int) R_ARM_THM_JUMP24
5248 || r_type == (unsigned int) R_ARM_THM_JUMP19
5249 || r_type == (unsigned int) R_ARM_THM_CALL
5250 || r_type == (unsigned int) R_ARM_THM_XPC22))
5251 {
5252 bfd_vma from = section->output_section->vma
5253 + section->output_offset
5254 + irela->r_offset;
5255
5256 if ((from & 0xfff) == 0xffe)
5257 {
5258 /* Found a candidate. Note we haven't checked the
5259 destination is within 4K here: if we do so (and
5260 don't create an entry in a8_relocs) we can't tell
5261 that a branch should have been relocated when
5262 scanning later. */
5263 if (num_a8_relocs == a8_reloc_table_size)
5264 {
5265 a8_reloc_table_size *= 2;
5266 a8_relocs = (struct a8_erratum_reloc *)
5267 bfd_realloc (a8_relocs,
5268 sizeof (struct a8_erratum_reloc)
5269 * a8_reloc_table_size);
5270 }
5271
5272 a8_relocs[num_a8_relocs].from = from;
5273 a8_relocs[num_a8_relocs].destination = destination;
5274 a8_relocs[num_a8_relocs].r_type = r_type;
5275 a8_relocs[num_a8_relocs].branch_type = branch_type;
5276 a8_relocs[num_a8_relocs].sym_name = sym_name;
5277 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
5278 a8_relocs[num_a8_relocs].hash = hash;
5279
5280 num_a8_relocs++;
5281 }
5282 }
5283 }
5284
5285 /* We're done with the internal relocs, free them. */
5286 if (elf_section_data (section)->relocs == NULL)
5287 free (internal_relocs);
5288 }
5289
5290 if (htab->fix_cortex_a8)
5291 {
5292 /* Sort relocs which might apply to Cortex-A8 erratum. */
5293 qsort (a8_relocs, num_a8_relocs,
5294 sizeof (struct a8_erratum_reloc),
5295 &a8_reloc_compare);
5296
5297 /* Scan for branches which might trigger Cortex-A8 erratum. */
5298 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
5299 &num_a8_fixes, &a8_fix_table_size,
5300 a8_relocs, num_a8_relocs,
5301 prev_num_a8_fixes, &stub_changed)
5302 != 0)
5303 goto error_ret_free_local;
5304 }
5305 }
5306
5307 if (prev_num_a8_fixes != num_a8_fixes)
5308 stub_changed = TRUE;
5309
5310 if (!stub_changed)
5311 break;
5312
5313 /* OK, we've added some stubs. Find out the new size of the
5314 stub sections. */
5315 for (stub_sec = htab->stub_bfd->sections;
5316 stub_sec != NULL;
5317 stub_sec = stub_sec->next)
5318 {
5319 /* Ignore non-stub sections. */
5320 if (!strstr (stub_sec->name, STUB_SUFFIX))
5321 continue;
5322
5323 stub_sec->size = 0;
5324 }
5325
5326 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
5327
5328 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
5329 if (htab->fix_cortex_a8)
5330 for (i = 0; i < num_a8_fixes; i++)
5331 {
5332 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
5333 a8_fixes[i].section, htab);
5334
5335 if (stub_sec == NULL)
5336 goto error_ret_free_local;
5337
5338 stub_sec->size
5339 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
5340 NULL);
5341 }
5342
5343
5344 /* Ask the linker to do its stuff. */
5345 (*htab->layout_sections_again) ();
5346 }
5347
5348 /* Add stubs for Cortex-A8 erratum fixes now. */
5349 if (htab->fix_cortex_a8)
5350 {
5351 for (i = 0; i < num_a8_fixes; i++)
5352 {
5353 struct elf32_arm_stub_hash_entry *stub_entry;
5354 char *stub_name = a8_fixes[i].stub_name;
5355 asection *section = a8_fixes[i].section;
5356 unsigned int section_id = a8_fixes[i].section->id;
5357 asection *link_sec = htab->stub_group[section_id].link_sec;
5358 asection *stub_sec = htab->stub_group[section_id].stub_sec;
5359 const insn_sequence *template_sequence;
5360 int template_size, size = 0;
5361
5362 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
5363 TRUE, FALSE);
5364 if (stub_entry == NULL)
5365 {
5366 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
5367 section->owner,
5368 stub_name);
5369 return FALSE;
5370 }
5371
5372 stub_entry->stub_sec = stub_sec;
5373 stub_entry->stub_offset = 0;
5374 stub_entry->id_sec = link_sec;
5375 stub_entry->stub_type = a8_fixes[i].stub_type;
5376 stub_entry->target_section = a8_fixes[i].section;
5377 stub_entry->target_value = a8_fixes[i].offset;
5378 stub_entry->target_addend = a8_fixes[i].addend;
5379 stub_entry->orig_insn = a8_fixes[i].orig_insn;
5380 stub_entry->branch_type = a8_fixes[i].branch_type;
5381
5382 size = find_stub_size_and_template (a8_fixes[i].stub_type,
5383 &template_sequence,
5384 &template_size);
5385
5386 stub_entry->stub_size = size;
5387 stub_entry->stub_template = template_sequence;
5388 stub_entry->stub_template_size = template_size;
5389 }
5390
5391 /* Stash the Cortex-A8 erratum fix array for use later in
5392 elf32_arm_write_section(). */
5393 htab->a8_erratum_fixes = a8_fixes;
5394 htab->num_a8_erratum_fixes = num_a8_fixes;
5395 }
5396 else
5397 {
5398 htab->a8_erratum_fixes = NULL;
5399 htab->num_a8_erratum_fixes = 0;
5400 }
5401 return TRUE;
5402
5403 error_ret_free_local:
5404 return FALSE;
5405 }
5406
5407 /* Build all the stubs associated with the current output file. The
5408 stubs are kept in a hash table attached to the main linker hash
5409 table. We also set up the .plt entries for statically linked PIC
5410 functions here. This function is called via arm_elf_finish in the
5411 linker. */
5412
5413 bfd_boolean
5414 elf32_arm_build_stubs (struct bfd_link_info *info)
5415 {
5416 asection *stub_sec;
5417 struct bfd_hash_table *table;
5418 struct elf32_arm_link_hash_table *htab;
5419
5420 htab = elf32_arm_hash_table (info);
5421 if (htab == NULL)
5422 return FALSE;
5423
5424 for (stub_sec = htab->stub_bfd->sections;
5425 stub_sec != NULL;
5426 stub_sec = stub_sec->next)
5427 {
5428 bfd_size_type size;
5429
5430 /* Ignore non-stub sections. */
5431 if (!strstr (stub_sec->name, STUB_SUFFIX))
5432 continue;
5433
5434 /* Allocate memory to hold the linker stubs. */
5435 size = stub_sec->size;
5436 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
5437 if (stub_sec->contents == NULL && size != 0)
5438 return FALSE;
5439 stub_sec->size = 0;
5440 }
5441
5442 /* Build the stubs as directed by the stub hash table. */
5443 table = &htab->stub_hash_table;
5444 bfd_hash_traverse (table, arm_build_one_stub, info);
5445 if (htab->fix_cortex_a8)
5446 {
5447 /* Place the cortex a8 stubs last. */
5448 htab->fix_cortex_a8 = -1;
5449 bfd_hash_traverse (table, arm_build_one_stub, info);
5450 }
5451
5452 return TRUE;
5453 }
5454
5455 /* Locate the Thumb encoded calling stub for NAME. */
5456
5457 static struct elf_link_hash_entry *
5458 find_thumb_glue (struct bfd_link_info *link_info,
5459 const char *name,
5460 char **error_message)
5461 {
5462 char *tmp_name;
5463 struct elf_link_hash_entry *hash;
5464 struct elf32_arm_link_hash_table *hash_table;
5465
5466 /* We need a pointer to the armelf specific hash table. */
5467 hash_table = elf32_arm_hash_table (link_info);
5468 if (hash_table == NULL)
5469 return NULL;
5470
5471 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5472 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
5473
5474 BFD_ASSERT (tmp_name);
5475
5476 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
5477
5478 hash = elf_link_hash_lookup
5479 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
5480
5481 if (hash == NULL
5482 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
5483 tmp_name, name) == -1)
5484 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
5485
5486 free (tmp_name);
5487
5488 return hash;
5489 }
5490
5491 /* Locate the ARM encoded calling stub for NAME. */
5492
5493 static struct elf_link_hash_entry *
5494 find_arm_glue (struct bfd_link_info *link_info,
5495 const char *name,
5496 char **error_message)
5497 {
5498 char *tmp_name;
5499 struct elf_link_hash_entry *myh;
5500 struct elf32_arm_link_hash_table *hash_table;
5501
5502 /* We need a pointer to the elfarm specific hash table. */
5503 hash_table = elf32_arm_hash_table (link_info);
5504 if (hash_table == NULL)
5505 return NULL;
5506
5507 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5508 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
5509
5510 BFD_ASSERT (tmp_name);
5511
5512 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5513
5514 myh = elf_link_hash_lookup
5515 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
5516
5517 if (myh == NULL
5518 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
5519 tmp_name, name) == -1)
5520 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
5521
5522 free (tmp_name);
5523
5524 return myh;
5525 }
5526
5527 /* ARM->Thumb glue (static images):
5528
5529 .arm
5530 __func_from_arm:
5531 ldr r12, __func_addr
5532 bx r12
5533 __func_addr:
5534 .word func @ behave as if you saw a ARM_32 reloc.
5535
5536 (v5t static images)
5537 .arm
5538 __func_from_arm:
5539 ldr pc, __func_addr
5540 __func_addr:
5541 .word func @ behave as if you saw a ARM_32 reloc.
5542
5543 (relocatable images)
5544 .arm
5545 __func_from_arm:
5546 ldr r12, __func_offset
5547 add r12, r12, pc
5548 bx r12
5549 __func_offset:
5550 .word func - . */
5551
5552 #define ARM2THUMB_STATIC_GLUE_SIZE 12
5553 static const insn32 a2t1_ldr_insn = 0xe59fc000;
5554 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
5555 static const insn32 a2t3_func_addr_insn = 0x00000001;
5556
5557 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
5558 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
5559 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
5560
5561 #define ARM2THUMB_PIC_GLUE_SIZE 16
5562 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
5563 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
5564 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
5565
5566 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
5567
5568 .thumb .thumb
5569 .align 2 .align 2
5570 __func_from_thumb: __func_from_thumb:
5571 bx pc push {r6, lr}
5572 nop ldr r6, __func_addr
5573 .arm mov lr, pc
5574 b func bx r6
5575 .arm
5576 ;; back_to_thumb
5577 ldmia r13! {r6, lr}
5578 bx lr
5579 __func_addr:
5580 .word func */
5581
5582 #define THUMB2ARM_GLUE_SIZE 8
5583 static const insn16 t2a1_bx_pc_insn = 0x4778;
5584 static const insn16 t2a2_noop_insn = 0x46c0;
5585 static const insn32 t2a3_b_insn = 0xea000000;
5586
5587 #define VFP11_ERRATUM_VENEER_SIZE 8
5588
5589 #define ARM_BX_VENEER_SIZE 12
5590 static const insn32 armbx1_tst_insn = 0xe3100001;
5591 static const insn32 armbx2_moveq_insn = 0x01a0f000;
5592 static const insn32 armbx3_bx_insn = 0xe12fff10;
5593
5594 #ifndef ELFARM_NABI_C_INCLUDED
5595 static void
5596 arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
5597 {
5598 asection * s;
5599 bfd_byte * contents;
5600
5601 if (size == 0)
5602 {
5603 /* Do not include empty glue sections in the output. */
5604 if (abfd != NULL)
5605 {
5606 s = bfd_get_section_by_name (abfd, name);
5607 if (s != NULL)
5608 s->flags |= SEC_EXCLUDE;
5609 }
5610 return;
5611 }
5612
5613 BFD_ASSERT (abfd != NULL);
5614
5615 s = bfd_get_section_by_name (abfd, name);
5616 BFD_ASSERT (s != NULL);
5617
5618 contents = (bfd_byte *) bfd_alloc (abfd, size);
5619
5620 BFD_ASSERT (s->size == size);
5621 s->contents = contents;
5622 }
5623
5624 bfd_boolean
5625 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
5626 {
5627 struct elf32_arm_link_hash_table * globals;
5628
5629 globals = elf32_arm_hash_table (info);
5630 BFD_ASSERT (globals != NULL);
5631
5632 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5633 globals->arm_glue_size,
5634 ARM2THUMB_GLUE_SECTION_NAME);
5635
5636 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5637 globals->thumb_glue_size,
5638 THUMB2ARM_GLUE_SECTION_NAME);
5639
5640 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5641 globals->vfp11_erratum_glue_size,
5642 VFP11_ERRATUM_VENEER_SECTION_NAME);
5643
5644 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5645 globals->bx_glue_size,
5646 ARM_BX_GLUE_SECTION_NAME);
5647
5648 return TRUE;
5649 }
5650
5651 /* Allocate space and symbols for calling a Thumb function from Arm mode.
5652 returns the symbol identifying the stub. */
5653
5654 static struct elf_link_hash_entry *
5655 record_arm_to_thumb_glue (struct bfd_link_info * link_info,
5656 struct elf_link_hash_entry * h)
5657 {
5658 const char * name = h->root.root.string;
5659 asection * s;
5660 char * tmp_name;
5661 struct elf_link_hash_entry * myh;
5662 struct bfd_link_hash_entry * bh;
5663 struct elf32_arm_link_hash_table * globals;
5664 bfd_vma val;
5665 bfd_size_type size;
5666
5667 globals = elf32_arm_hash_table (link_info);
5668 BFD_ASSERT (globals != NULL);
5669 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5670
5671 s = bfd_get_section_by_name
5672 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
5673
5674 BFD_ASSERT (s != NULL);
5675
5676 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5677 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
5678
5679 BFD_ASSERT (tmp_name);
5680
5681 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5682
5683 myh = elf_link_hash_lookup
5684 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
5685
5686 if (myh != NULL)
5687 {
5688 /* We've already seen this guy. */
5689 free (tmp_name);
5690 return myh;
5691 }
5692
5693 /* The only trick here is using hash_table->arm_glue_size as the value.
5694 Even though the section isn't allocated yet, this is where we will be
5695 putting it. The +1 on the value marks that the stub has not been
5696 output yet - not that it is a Thumb function. */
5697 bh = NULL;
5698 val = globals->arm_glue_size + 1;
5699 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5700 tmp_name, BSF_GLOBAL, s, val,
5701 NULL, TRUE, FALSE, &bh);
5702
5703 myh = (struct elf_link_hash_entry *) bh;
5704 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5705 myh->forced_local = 1;
5706
5707 free (tmp_name);
5708
5709 if (link_info->shared || globals->root.is_relocatable_executable
5710 || globals->pic_veneer)
5711 size = ARM2THUMB_PIC_GLUE_SIZE;
5712 else if (globals->use_blx)
5713 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
5714 else
5715 size = ARM2THUMB_STATIC_GLUE_SIZE;
5716
5717 s->size += size;
5718 globals->arm_glue_size += size;
5719
5720 return myh;
5721 }
5722
5723 /* Allocate space for ARMv4 BX veneers. */
5724
5725 static void
5726 record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
5727 {
5728 asection * s;
5729 struct elf32_arm_link_hash_table *globals;
5730 char *tmp_name;
5731 struct elf_link_hash_entry *myh;
5732 struct bfd_link_hash_entry *bh;
5733 bfd_vma val;
5734
5735 /* BX PC does not need a veneer. */
5736 if (reg == 15)
5737 return;
5738
5739 globals = elf32_arm_hash_table (link_info);
5740 BFD_ASSERT (globals != NULL);
5741 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5742
5743 /* Check if this veneer has already been allocated. */
5744 if (globals->bx_glue_offset[reg])
5745 return;
5746
5747 s = bfd_get_section_by_name
5748 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
5749
5750 BFD_ASSERT (s != NULL);
5751
5752 /* Add symbol for veneer. */
5753 tmp_name = (char *)
5754 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
5755
5756 BFD_ASSERT (tmp_name);
5757
5758 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
5759
5760 myh = elf_link_hash_lookup
5761 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
5762
5763 BFD_ASSERT (myh == NULL);
5764
5765 bh = NULL;
5766 val = globals->bx_glue_size;
5767 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5768 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5769 NULL, TRUE, FALSE, &bh);
5770
5771 myh = (struct elf_link_hash_entry *) bh;
5772 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5773 myh->forced_local = 1;
5774
5775 s->size += ARM_BX_VENEER_SIZE;
5776 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
5777 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
5778 }
5779
5780
5781 /* Add an entry to the code/data map for section SEC. */
5782
5783 static void
5784 elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
5785 {
5786 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
5787 unsigned int newidx;
5788
5789 if (sec_data->map == NULL)
5790 {
5791 sec_data->map = (elf32_arm_section_map *)
5792 bfd_malloc (sizeof (elf32_arm_section_map));
5793 sec_data->mapcount = 0;
5794 sec_data->mapsize = 1;
5795 }
5796
5797 newidx = sec_data->mapcount++;
5798
5799 if (sec_data->mapcount > sec_data->mapsize)
5800 {
5801 sec_data->mapsize *= 2;
5802 sec_data->map = (elf32_arm_section_map *)
5803 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
5804 * sizeof (elf32_arm_section_map));
5805 }
5806
5807 if (sec_data->map)
5808 {
5809 sec_data->map[newidx].vma = vma;
5810 sec_data->map[newidx].type = type;
5811 }
5812 }
5813
5814
5815 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
5816 veneers are handled for now. */
5817
5818 static bfd_vma
5819 record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
5820 elf32_vfp11_erratum_list *branch,
5821 bfd *branch_bfd,
5822 asection *branch_sec,
5823 unsigned int offset)
5824 {
5825 asection *s;
5826 struct elf32_arm_link_hash_table *hash_table;
5827 char *tmp_name;
5828 struct elf_link_hash_entry *myh;
5829 struct bfd_link_hash_entry *bh;
5830 bfd_vma val;
5831 struct _arm_elf_section_data *sec_data;
5832 elf32_vfp11_erratum_list *newerr;
5833
5834 hash_table = elf32_arm_hash_table (link_info);
5835 BFD_ASSERT (hash_table != NULL);
5836 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
5837
5838 s = bfd_get_section_by_name
5839 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
5840
5841 sec_data = elf32_arm_section_data (s);
5842
5843 BFD_ASSERT (s != NULL);
5844
5845 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
5846 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
5847
5848 BFD_ASSERT (tmp_name);
5849
5850 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
5851 hash_table->num_vfp11_fixes);
5852
5853 myh = elf_link_hash_lookup
5854 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
5855
5856 BFD_ASSERT (myh == NULL);
5857
5858 bh = NULL;
5859 val = hash_table->vfp11_erratum_glue_size;
5860 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
5861 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5862 NULL, TRUE, FALSE, &bh);
5863
5864 myh = (struct elf_link_hash_entry *) bh;
5865 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5866 myh->forced_local = 1;
5867
5868 /* Link veneer back to calling location. */
5869 sec_data->erratumcount += 1;
5870 newerr = (elf32_vfp11_erratum_list *)
5871 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
5872
5873 newerr->type = VFP11_ERRATUM_ARM_VENEER;
5874 newerr->vma = -1;
5875 newerr->u.v.branch = branch;
5876 newerr->u.v.id = hash_table->num_vfp11_fixes;
5877 branch->u.b.veneer = newerr;
5878
5879 newerr->next = sec_data->erratumlist;
5880 sec_data->erratumlist = newerr;
5881
5882 /* A symbol for the return from the veneer. */
5883 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
5884 hash_table->num_vfp11_fixes);
5885
5886 myh = elf_link_hash_lookup
5887 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
5888
5889 if (myh != NULL)
5890 abort ();
5891
5892 bh = NULL;
5893 val = offset + 4;
5894 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
5895 branch_sec, val, NULL, TRUE, FALSE, &bh);
5896
5897 myh = (struct elf_link_hash_entry *) bh;
5898 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5899 myh->forced_local = 1;
5900
5901 free (tmp_name);
5902
5903 /* Generate a mapping symbol for the veneer section, and explicitly add an
5904 entry for that symbol to the code/data map for the section. */
5905 if (hash_table->vfp11_erratum_glue_size == 0)
5906 {
5907 bh = NULL;
5908 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
5909 ever requires this erratum fix. */
5910 _bfd_generic_link_add_one_symbol (link_info,
5911 hash_table->bfd_of_glue_owner, "$a",
5912 BSF_LOCAL, s, 0, NULL,
5913 TRUE, FALSE, &bh);
5914
5915 myh = (struct elf_link_hash_entry *) bh;
5916 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
5917 myh->forced_local = 1;
5918
5919 /* The elf32_arm_init_maps function only cares about symbols from input
5920 BFDs. We must make a note of this generated mapping symbol
5921 ourselves so that code byteswapping works properly in
5922 elf32_arm_write_section. */
5923 elf32_arm_section_map_add (s, 'a', 0);
5924 }
5925
5926 s->size += VFP11_ERRATUM_VENEER_SIZE;
5927 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
5928 hash_table->num_vfp11_fixes++;
5929
5930 /* The offset of the veneer. */
5931 return val;
5932 }
5933
5934 #define ARM_GLUE_SECTION_FLAGS \
5935 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
5936 | SEC_READONLY | SEC_LINKER_CREATED)
5937
5938 /* Create a fake section for use by the ARM backend of the linker. */
5939
5940 static bfd_boolean
5941 arm_make_glue_section (bfd * abfd, const char * name)
5942 {
5943 asection * sec;
5944
5945 sec = bfd_get_section_by_name (abfd, name);
5946 if (sec != NULL)
5947 /* Already made. */
5948 return TRUE;
5949
5950 sec = bfd_make_section_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
5951
5952 if (sec == NULL
5953 || !bfd_set_section_alignment (abfd, sec, 2))
5954 return FALSE;
5955
5956 /* Set the gc mark to prevent the section from being removed by garbage
5957 collection, despite the fact that no relocs refer to this section. */
5958 sec->gc_mark = 1;
5959
5960 return TRUE;
5961 }
5962
5963 /* Add the glue sections to ABFD. This function is called from the
5964 linker scripts in ld/emultempl/{armelf}.em. */
5965
5966 bfd_boolean
5967 bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
5968 struct bfd_link_info *info)
5969 {
5970 /* If we are only performing a partial
5971 link do not bother adding the glue. */
5972 if (info->relocatable)
5973 return TRUE;
5974
5975 return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
5976 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
5977 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
5978 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
5979 }
5980
5981 /* Select a BFD to be used to hold the sections used by the glue code.
5982 This function is called from the linker scripts in ld/emultempl/
5983 {armelf/pe}.em. */
5984
5985 bfd_boolean
5986 bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
5987 {
5988 struct elf32_arm_link_hash_table *globals;
5989
5990 /* If we are only performing a partial link
5991 do not bother getting a bfd to hold the glue. */
5992 if (info->relocatable)
5993 return TRUE;
5994
5995 /* Make sure we don't attach the glue sections to a dynamic object. */
5996 BFD_ASSERT (!(abfd->flags & DYNAMIC));
5997
5998 globals = elf32_arm_hash_table (info);
5999 BFD_ASSERT (globals != NULL);
6000
6001 if (globals->bfd_of_glue_owner != NULL)
6002 return TRUE;
6003
6004 /* Save the bfd for later use. */
6005 globals->bfd_of_glue_owner = abfd;
6006
6007 return TRUE;
6008 }
6009
6010 static void
6011 check_use_blx (struct elf32_arm_link_hash_table *globals)
6012 {
6013 int cpu_arch;
6014
6015 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
6016 Tag_CPU_arch);
6017
6018 if (globals->fix_arm1176)
6019 {
6020 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
6021 globals->use_blx = 1;
6022 }
6023 else
6024 {
6025 if (cpu_arch > TAG_CPU_ARCH_V4T)
6026 globals->use_blx = 1;
6027 }
6028 }
6029
6030 bfd_boolean
6031 bfd_elf32_arm_process_before_allocation (bfd *abfd,
6032 struct bfd_link_info *link_info)
6033 {
6034 Elf_Internal_Shdr *symtab_hdr;
6035 Elf_Internal_Rela *internal_relocs = NULL;
6036 Elf_Internal_Rela *irel, *irelend;
6037 bfd_byte *contents = NULL;
6038
6039 asection *sec;
6040 struct elf32_arm_link_hash_table *globals;
6041
6042 /* If we are only performing a partial link do not bother
6043 to construct any glue. */
6044 if (link_info->relocatable)
6045 return TRUE;
6046
6047 /* Here we have a bfd that is to be included on the link. We have a
6048 hook to do reloc rummaging, before section sizes are nailed down. */
6049 globals = elf32_arm_hash_table (link_info);
6050 BFD_ASSERT (globals != NULL);
6051
6052 check_use_blx (globals);
6053
6054 if (globals->byteswap_code && !bfd_big_endian (abfd))
6055 {
6056 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
6057 abfd);
6058 return FALSE;
6059 }
6060
6061 /* PR 5398: If we have not decided to include any loadable sections in
6062 the output then we will not have a glue owner bfd. This is OK, it
6063 just means that there is nothing else for us to do here. */
6064 if (globals->bfd_of_glue_owner == NULL)
6065 return TRUE;
6066
6067 /* Rummage around all the relocs and map the glue vectors. */
6068 sec = abfd->sections;
6069
6070 if (sec == NULL)
6071 return TRUE;
6072
6073 for (; sec != NULL; sec = sec->next)
6074 {
6075 if (sec->reloc_count == 0)
6076 continue;
6077
6078 if ((sec->flags & SEC_EXCLUDE) != 0)
6079 continue;
6080
6081 symtab_hdr = & elf_symtab_hdr (abfd);
6082
6083 /* Load the relocs. */
6084 internal_relocs
6085 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
6086
6087 if (internal_relocs == NULL)
6088 goto error_return;
6089
6090 irelend = internal_relocs + sec->reloc_count;
6091 for (irel = internal_relocs; irel < irelend; irel++)
6092 {
6093 long r_type;
6094 unsigned long r_index;
6095
6096 struct elf_link_hash_entry *h;
6097
6098 r_type = ELF32_R_TYPE (irel->r_info);
6099 r_index = ELF32_R_SYM (irel->r_info);
6100
6101 /* These are the only relocation types we care about. */
6102 if ( r_type != R_ARM_PC24
6103 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
6104 continue;
6105
6106 /* Get the section contents if we haven't done so already. */
6107 if (contents == NULL)
6108 {
6109 /* Get cached copy if it exists. */
6110 if (elf_section_data (sec)->this_hdr.contents != NULL)
6111 contents = elf_section_data (sec)->this_hdr.contents;
6112 else
6113 {
6114 /* Go get them off disk. */
6115 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6116 goto error_return;
6117 }
6118 }
6119
6120 if (r_type == R_ARM_V4BX)
6121 {
6122 int reg;
6123
6124 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
6125 record_arm_bx_glue (link_info, reg);
6126 continue;
6127 }
6128
6129 /* If the relocation is not against a symbol it cannot concern us. */
6130 h = NULL;
6131
6132 /* We don't care about local symbols. */
6133 if (r_index < symtab_hdr->sh_info)
6134 continue;
6135
6136 /* This is an external symbol. */
6137 r_index -= symtab_hdr->sh_info;
6138 h = (struct elf_link_hash_entry *)
6139 elf_sym_hashes (abfd)[r_index];
6140
6141 /* If the relocation is against a static symbol it must be within
6142 the current section and so cannot be a cross ARM/Thumb relocation. */
6143 if (h == NULL)
6144 continue;
6145
6146 /* If the call will go through a PLT entry then we do not need
6147 glue. */
6148 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
6149 continue;
6150
6151 switch (r_type)
6152 {
6153 case R_ARM_PC24:
6154 /* This one is a call from arm code. We need to look up
6155 the target of the call. If it is a thumb target, we
6156 insert glue. */
6157 if (h->target_internal == ST_BRANCH_TO_THUMB)
6158 record_arm_to_thumb_glue (link_info, h);
6159 break;
6160
6161 default:
6162 abort ();
6163 }
6164 }
6165
6166 if (contents != NULL
6167 && elf_section_data (sec)->this_hdr.contents != contents)
6168 free (contents);
6169 contents = NULL;
6170
6171 if (internal_relocs != NULL
6172 && elf_section_data (sec)->relocs != internal_relocs)
6173 free (internal_relocs);
6174 internal_relocs = NULL;
6175 }
6176
6177 return TRUE;
6178
6179 error_return:
6180 if (contents != NULL
6181 && elf_section_data (sec)->this_hdr.contents != contents)
6182 free (contents);
6183 if (internal_relocs != NULL
6184 && elf_section_data (sec)->relocs != internal_relocs)
6185 free (internal_relocs);
6186
6187 return FALSE;
6188 }
6189 #endif
6190
6191
6192 /* Initialise maps of ARM/Thumb/data for input BFDs. */
6193
6194 void
6195 bfd_elf32_arm_init_maps (bfd *abfd)
6196 {
6197 Elf_Internal_Sym *isymbuf;
6198 Elf_Internal_Shdr *hdr;
6199 unsigned int i, localsyms;
6200
6201 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
6202 if (! is_arm_elf (abfd))
6203 return;
6204
6205 if ((abfd->flags & DYNAMIC) != 0)
6206 return;
6207
6208 hdr = & elf_symtab_hdr (abfd);
6209 localsyms = hdr->sh_info;
6210
6211 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
6212 should contain the number of local symbols, which should come before any
6213 global symbols. Mapping symbols are always local. */
6214 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
6215 NULL);
6216
6217 /* No internal symbols read? Skip this BFD. */
6218 if (isymbuf == NULL)
6219 return;
6220
6221 for (i = 0; i < localsyms; i++)
6222 {
6223 Elf_Internal_Sym *isym = &isymbuf[i];
6224 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6225 const char *name;
6226
6227 if (sec != NULL
6228 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
6229 {
6230 name = bfd_elf_string_from_elf_section (abfd,
6231 hdr->sh_link, isym->st_name);
6232
6233 if (bfd_is_arm_special_symbol_name (name,
6234 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
6235 elf32_arm_section_map_add (sec, name[1], isym->st_value);
6236 }
6237 }
6238 }
6239
6240
6241 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
6242 say what they wanted. */
6243
6244 void
6245 bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
6246 {
6247 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6248 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6249
6250 if (globals == NULL)
6251 return;
6252
6253 if (globals->fix_cortex_a8 == -1)
6254 {
6255 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
6256 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
6257 && (out_attr[Tag_CPU_arch_profile].i == 'A'
6258 || out_attr[Tag_CPU_arch_profile].i == 0))
6259 globals->fix_cortex_a8 = 1;
6260 else
6261 globals->fix_cortex_a8 = 0;
6262 }
6263 }
6264
6265
6266 void
6267 bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
6268 {
6269 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6270 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6271
6272 if (globals == NULL)
6273 return;
6274 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
6275 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
6276 {
6277 switch (globals->vfp11_fix)
6278 {
6279 case BFD_ARM_VFP11_FIX_DEFAULT:
6280 case BFD_ARM_VFP11_FIX_NONE:
6281 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6282 break;
6283
6284 default:
6285 /* Give a warning, but do as the user requests anyway. */
6286 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
6287 "workaround is not necessary for target architecture"), obfd);
6288 }
6289 }
6290 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
6291 /* For earlier architectures, we might need the workaround, but do not
6292 enable it by default. If users is running with broken hardware, they
6293 must enable the erratum fix explicitly. */
6294 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6295 }
6296
6297
6298 enum bfd_arm_vfp11_pipe
6299 {
6300 VFP11_FMAC,
6301 VFP11_LS,
6302 VFP11_DS,
6303 VFP11_BAD
6304 };
6305
6306 /* Return a VFP register number. This is encoded as RX:X for single-precision
6307 registers, or X:RX for double-precision registers, where RX is the group of
6308 four bits in the instruction encoding and X is the single extension bit.
6309 RX and X fields are specified using their lowest (starting) bit. The return
6310 value is:
6311
6312 0...31: single-precision registers s0...s31
6313 32...63: double-precision registers d0...d31.
6314
6315 Although X should be zero for VFP11 (encoding d0...d15 only), we might
6316 encounter VFP3 instructions, so we allow the full range for DP registers. */
6317
6318 static unsigned int
6319 bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
6320 unsigned int x)
6321 {
6322 if (is_double)
6323 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
6324 else
6325 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
6326 }
6327
6328 /* Set bits in *WMASK according to a register number REG as encoded by
6329 bfd_arm_vfp11_regno(). Ignore d16-d31. */
6330
6331 static void
6332 bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
6333 {
6334 if (reg < 32)
6335 *wmask |= 1 << reg;
6336 else if (reg < 48)
6337 *wmask |= 3 << ((reg - 32) * 2);
6338 }
6339
6340 /* Return TRUE if WMASK overwrites anything in REGS. */
6341
6342 static bfd_boolean
6343 bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
6344 {
6345 int i;
6346
6347 for (i = 0; i < numregs; i++)
6348 {
6349 unsigned int reg = regs[i];
6350
6351 if (reg < 32 && (wmask & (1 << reg)) != 0)
6352 return TRUE;
6353
6354 reg -= 32;
6355
6356 if (reg >= 16)
6357 continue;
6358
6359 if ((wmask & (3 << (reg * 2))) != 0)
6360 return TRUE;
6361 }
6362
6363 return FALSE;
6364 }
6365
6366 /* In this function, we're interested in two things: finding input registers
6367 for VFP data-processing instructions, and finding the set of registers which
6368 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
6369 hold the written set, so FLDM etc. are easy to deal with (we're only
6370 interested in 32 SP registers or 16 dp registers, due to the VFP version
6371 implemented by the chip in question). DP registers are marked by setting
6372 both SP registers in the write mask). */
6373
6374 static enum bfd_arm_vfp11_pipe
6375 bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
6376 int *numregs)
6377 {
6378 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
6379 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
6380
6381 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
6382 {
6383 unsigned int pqrs;
6384 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6385 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
6386
6387 pqrs = ((insn & 0x00800000) >> 20)
6388 | ((insn & 0x00300000) >> 19)
6389 | ((insn & 0x00000040) >> 6);
6390
6391 switch (pqrs)
6392 {
6393 case 0: /* fmac[sd]. */
6394 case 1: /* fnmac[sd]. */
6395 case 2: /* fmsc[sd]. */
6396 case 3: /* fnmsc[sd]. */
6397 vpipe = VFP11_FMAC;
6398 bfd_arm_vfp11_write_mask (destmask, fd);
6399 regs[0] = fd;
6400 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6401 regs[2] = fm;
6402 *numregs = 3;
6403 break;
6404
6405 case 4: /* fmul[sd]. */
6406 case 5: /* fnmul[sd]. */
6407 case 6: /* fadd[sd]. */
6408 case 7: /* fsub[sd]. */
6409 vpipe = VFP11_FMAC;
6410 goto vfp_binop;
6411
6412 case 8: /* fdiv[sd]. */
6413 vpipe = VFP11_DS;
6414 vfp_binop:
6415 bfd_arm_vfp11_write_mask (destmask, fd);
6416 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6417 regs[1] = fm;
6418 *numregs = 2;
6419 break;
6420
6421 case 15: /* extended opcode. */
6422 {
6423 unsigned int extn = ((insn >> 15) & 0x1e)
6424 | ((insn >> 7) & 1);
6425
6426 switch (extn)
6427 {
6428 case 0: /* fcpy[sd]. */
6429 case 1: /* fabs[sd]. */
6430 case 2: /* fneg[sd]. */
6431 case 8: /* fcmp[sd]. */
6432 case 9: /* fcmpe[sd]. */
6433 case 10: /* fcmpz[sd]. */
6434 case 11: /* fcmpez[sd]. */
6435 case 16: /* fuito[sd]. */
6436 case 17: /* fsito[sd]. */
6437 case 24: /* ftoui[sd]. */
6438 case 25: /* ftouiz[sd]. */
6439 case 26: /* ftosi[sd]. */
6440 case 27: /* ftosiz[sd]. */
6441 /* These instructions will not bounce due to underflow. */
6442 *numregs = 0;
6443 vpipe = VFP11_FMAC;
6444 break;
6445
6446 case 3: /* fsqrt[sd]. */
6447 /* fsqrt cannot underflow, but it can (perhaps) overwrite
6448 registers to cause the erratum in previous instructions. */
6449 bfd_arm_vfp11_write_mask (destmask, fd);
6450 vpipe = VFP11_DS;
6451 break;
6452
6453 case 15: /* fcvt{ds,sd}. */
6454 {
6455 int rnum = 0;
6456
6457 bfd_arm_vfp11_write_mask (destmask, fd);
6458
6459 /* Only FCVTSD can underflow. */
6460 if ((insn & 0x100) != 0)
6461 regs[rnum++] = fm;
6462
6463 *numregs = rnum;
6464
6465 vpipe = VFP11_FMAC;
6466 }
6467 break;
6468
6469 default:
6470 return VFP11_BAD;
6471 }
6472 }
6473 break;
6474
6475 default:
6476 return VFP11_BAD;
6477 }
6478 }
6479 /* Two-register transfer. */
6480 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
6481 {
6482 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
6483
6484 if ((insn & 0x100000) == 0)
6485 {
6486 if (is_double)
6487 bfd_arm_vfp11_write_mask (destmask, fm);
6488 else
6489 {
6490 bfd_arm_vfp11_write_mask (destmask, fm);
6491 bfd_arm_vfp11_write_mask (destmask, fm + 1);
6492 }
6493 }
6494
6495 vpipe = VFP11_LS;
6496 }
6497 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
6498 {
6499 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6500 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
6501
6502 switch (puw)
6503 {
6504 case 0: /* Two-reg transfer. We should catch these above. */
6505 abort ();
6506
6507 case 2: /* fldm[sdx]. */
6508 case 3:
6509 case 5:
6510 {
6511 unsigned int i, offset = insn & 0xff;
6512
6513 if (is_double)
6514 offset >>= 1;
6515
6516 for (i = fd; i < fd + offset; i++)
6517 bfd_arm_vfp11_write_mask (destmask, i);
6518 }
6519 break;
6520
6521 case 4: /* fld[sd]. */
6522 case 6:
6523 bfd_arm_vfp11_write_mask (destmask, fd);
6524 break;
6525
6526 default:
6527 return VFP11_BAD;
6528 }
6529
6530 vpipe = VFP11_LS;
6531 }
6532 /* Single-register transfer. Note L==0. */
6533 else if ((insn & 0x0f100e10) == 0x0e000a10)
6534 {
6535 unsigned int opcode = (insn >> 21) & 7;
6536 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
6537
6538 switch (opcode)
6539 {
6540 case 0: /* fmsr/fmdlr. */
6541 case 1: /* fmdhr. */
6542 /* Mark fmdhr and fmdlr as writing to the whole of the DP
6543 destination register. I don't know if this is exactly right,
6544 but it is the conservative choice. */
6545 bfd_arm_vfp11_write_mask (destmask, fn);
6546 break;
6547
6548 case 7: /* fmxr. */
6549 break;
6550 }
6551
6552 vpipe = VFP11_LS;
6553 }
6554
6555 return vpipe;
6556 }
6557
6558
6559 static int elf32_arm_compare_mapping (const void * a, const void * b);
6560
6561
6562 /* Look for potentially-troublesome code sequences which might trigger the
6563 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
6564 (available from ARM) for details of the erratum. A short version is
6565 described in ld.texinfo. */
6566
6567 bfd_boolean
6568 bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
6569 {
6570 asection *sec;
6571 bfd_byte *contents = NULL;
6572 int state = 0;
6573 int regs[3], numregs = 0;
6574 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6575 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
6576
6577 if (globals == NULL)
6578 return FALSE;
6579
6580 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
6581 The states transition as follows:
6582
6583 0 -> 1 (vector) or 0 -> 2 (scalar)
6584 A VFP FMAC-pipeline instruction has been seen. Fill
6585 regs[0]..regs[numregs-1] with its input operands. Remember this
6586 instruction in 'first_fmac'.
6587
6588 1 -> 2
6589 Any instruction, except for a VFP instruction which overwrites
6590 regs[*].
6591
6592 1 -> 3 [ -> 0 ] or
6593 2 -> 3 [ -> 0 ]
6594 A VFP instruction has been seen which overwrites any of regs[*].
6595 We must make a veneer! Reset state to 0 before examining next
6596 instruction.
6597
6598 2 -> 0
6599 If we fail to match anything in state 2, reset to state 0 and reset
6600 the instruction pointer to the instruction after 'first_fmac'.
6601
6602 If the VFP11 vector mode is in use, there must be at least two unrelated
6603 instructions between anti-dependent VFP11 instructions to properly avoid
6604 triggering the erratum, hence the use of the extra state 1. */
6605
6606 /* If we are only performing a partial link do not bother
6607 to construct any glue. */
6608 if (link_info->relocatable)
6609 return TRUE;
6610
6611 /* Skip if this bfd does not correspond to an ELF image. */
6612 if (! is_arm_elf (abfd))
6613 return TRUE;
6614
6615 /* We should have chosen a fix type by the time we get here. */
6616 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
6617
6618 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
6619 return TRUE;
6620
6621 /* Skip this BFD if it corresponds to an executable or dynamic object. */
6622 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
6623 return TRUE;
6624
6625 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6626 {
6627 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
6628 struct _arm_elf_section_data *sec_data;
6629
6630 /* If we don't have executable progbits, we're not interested in this
6631 section. Also skip if section is to be excluded. */
6632 if (elf_section_type (sec) != SHT_PROGBITS
6633 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
6634 || (sec->flags & SEC_EXCLUDE) != 0
6635 || sec->sec_info_type == ELF_INFO_TYPE_JUST_SYMS
6636 || sec->output_section == bfd_abs_section_ptr
6637 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
6638 continue;
6639
6640 sec_data = elf32_arm_section_data (sec);
6641
6642 if (sec_data->mapcount == 0)
6643 continue;
6644
6645 if (elf_section_data (sec)->this_hdr.contents != NULL)
6646 contents = elf_section_data (sec)->this_hdr.contents;
6647 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6648 goto error_return;
6649
6650 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
6651 elf32_arm_compare_mapping);
6652
6653 for (span = 0; span < sec_data->mapcount; span++)
6654 {
6655 unsigned int span_start = sec_data->map[span].vma;
6656 unsigned int span_end = (span == sec_data->mapcount - 1)
6657 ? sec->size : sec_data->map[span + 1].vma;
6658 char span_type = sec_data->map[span].type;
6659
6660 /* FIXME: Only ARM mode is supported at present. We may need to
6661 support Thumb-2 mode also at some point. */
6662 if (span_type != 'a')
6663 continue;
6664
6665 for (i = span_start; i < span_end;)
6666 {
6667 unsigned int next_i = i + 4;
6668 unsigned int insn = bfd_big_endian (abfd)
6669 ? (contents[i] << 24)
6670 | (contents[i + 1] << 16)
6671 | (contents[i + 2] << 8)
6672 | contents[i + 3]
6673 : (contents[i + 3] << 24)
6674 | (contents[i + 2] << 16)
6675 | (contents[i + 1] << 8)
6676 | contents[i];
6677 unsigned int writemask = 0;
6678 enum bfd_arm_vfp11_pipe vpipe;
6679
6680 switch (state)
6681 {
6682 case 0:
6683 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
6684 &numregs);
6685 /* I'm assuming the VFP11 erratum can trigger with denorm
6686 operands on either the FMAC or the DS pipeline. This might
6687 lead to slightly overenthusiastic veneer insertion. */
6688 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
6689 {
6690 state = use_vector ? 1 : 2;
6691 first_fmac = i;
6692 veneer_of_insn = insn;
6693 }
6694 break;
6695
6696 case 1:
6697 {
6698 int other_regs[3], other_numregs;
6699 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
6700 other_regs,
6701 &other_numregs);
6702 if (vpipe != VFP11_BAD
6703 && bfd_arm_vfp11_antidependency (writemask, regs,
6704 numregs))
6705 state = 3;
6706 else
6707 state = 2;
6708 }
6709 break;
6710
6711 case 2:
6712 {
6713 int other_regs[3], other_numregs;
6714 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
6715 other_regs,
6716 &other_numregs);
6717 if (vpipe != VFP11_BAD
6718 && bfd_arm_vfp11_antidependency (writemask, regs,
6719 numregs))
6720 state = 3;
6721 else
6722 {
6723 state = 0;
6724 next_i = first_fmac + 4;
6725 }
6726 }
6727 break;
6728
6729 case 3:
6730 abort (); /* Should be unreachable. */
6731 }
6732
6733 if (state == 3)
6734 {
6735 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
6736 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
6737
6738 elf32_arm_section_data (sec)->erratumcount += 1;
6739
6740 newerr->u.b.vfp_insn = veneer_of_insn;
6741
6742 switch (span_type)
6743 {
6744 case 'a':
6745 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
6746 break;
6747
6748 default:
6749 abort ();
6750 }
6751
6752 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
6753 first_fmac);
6754
6755 newerr->vma = -1;
6756
6757 newerr->next = sec_data->erratumlist;
6758 sec_data->erratumlist = newerr;
6759
6760 state = 0;
6761 }
6762
6763 i = next_i;
6764 }
6765 }
6766
6767 if (contents != NULL
6768 && elf_section_data (sec)->this_hdr.contents != contents)
6769 free (contents);
6770 contents = NULL;
6771 }
6772
6773 return TRUE;
6774
6775 error_return:
6776 if (contents != NULL
6777 && elf_section_data (sec)->this_hdr.contents != contents)
6778 free (contents);
6779
6780 return FALSE;
6781 }
6782
6783 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
6784 after sections have been laid out, using specially-named symbols. */
6785
6786 void
6787 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
6788 struct bfd_link_info *link_info)
6789 {
6790 asection *sec;
6791 struct elf32_arm_link_hash_table *globals;
6792 char *tmp_name;
6793
6794 if (link_info->relocatable)
6795 return;
6796
6797 /* Skip if this bfd does not correspond to an ELF image. */
6798 if (! is_arm_elf (abfd))
6799 return;
6800
6801 globals = elf32_arm_hash_table (link_info);
6802 if (globals == NULL)
6803 return;
6804
6805 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
6806 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
6807
6808 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6809 {
6810 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
6811 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
6812
6813 for (; errnode != NULL; errnode = errnode->next)
6814 {
6815 struct elf_link_hash_entry *myh;
6816 bfd_vma vma;
6817
6818 switch (errnode->type)
6819 {
6820 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
6821 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
6822 /* Find veneer symbol. */
6823 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
6824 errnode->u.b.veneer->u.v.id);
6825
6826 myh = elf_link_hash_lookup
6827 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6828
6829 if (myh == NULL)
6830 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6831 "`%s'"), abfd, tmp_name);
6832
6833 vma = myh->root.u.def.section->output_section->vma
6834 + myh->root.u.def.section->output_offset
6835 + myh->root.u.def.value;
6836
6837 errnode->u.b.veneer->vma = vma;
6838 break;
6839
6840 case VFP11_ERRATUM_ARM_VENEER:
6841 case VFP11_ERRATUM_THUMB_VENEER:
6842 /* Find return location. */
6843 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6844 errnode->u.v.id);
6845
6846 myh = elf_link_hash_lookup
6847 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6848
6849 if (myh == NULL)
6850 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6851 "`%s'"), abfd, tmp_name);
6852
6853 vma = myh->root.u.def.section->output_section->vma
6854 + myh->root.u.def.section->output_offset
6855 + myh->root.u.def.value;
6856
6857 errnode->u.v.branch->vma = vma;
6858 break;
6859
6860 default:
6861 abort ();
6862 }
6863 }
6864 }
6865
6866 free (tmp_name);
6867 }
6868
6869
6870 /* Set target relocation values needed during linking. */
6871
6872 void
6873 bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
6874 struct bfd_link_info *link_info,
6875 int target1_is_rel,
6876 char * target2_type,
6877 int fix_v4bx,
6878 int use_blx,
6879 bfd_arm_vfp11_fix vfp11_fix,
6880 int no_enum_warn, int no_wchar_warn,
6881 int pic_veneer, int fix_cortex_a8,
6882 int fix_arm1176)
6883 {
6884 struct elf32_arm_link_hash_table *globals;
6885
6886 globals = elf32_arm_hash_table (link_info);
6887 if (globals == NULL)
6888 return;
6889
6890 globals->target1_is_rel = target1_is_rel;
6891 if (strcmp (target2_type, "rel") == 0)
6892 globals->target2_reloc = R_ARM_REL32;
6893 else if (strcmp (target2_type, "abs") == 0)
6894 globals->target2_reloc = R_ARM_ABS32;
6895 else if (strcmp (target2_type, "got-rel") == 0)
6896 globals->target2_reloc = R_ARM_GOT_PREL;
6897 else
6898 {
6899 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
6900 target2_type);
6901 }
6902 globals->fix_v4bx = fix_v4bx;
6903 globals->use_blx |= use_blx;
6904 globals->vfp11_fix = vfp11_fix;
6905 globals->pic_veneer = pic_veneer;
6906 globals->fix_cortex_a8 = fix_cortex_a8;
6907 globals->fix_arm1176 = fix_arm1176;
6908
6909 BFD_ASSERT (is_arm_elf (output_bfd));
6910 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
6911 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
6912 }
6913
6914 /* Replace the target offset of a Thumb bl or b.w instruction. */
6915
6916 static void
6917 insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
6918 {
6919 bfd_vma upper;
6920 bfd_vma lower;
6921 int reloc_sign;
6922
6923 BFD_ASSERT ((offset & 1) == 0);
6924
6925 upper = bfd_get_16 (abfd, insn);
6926 lower = bfd_get_16 (abfd, insn + 2);
6927 reloc_sign = (offset < 0) ? 1 : 0;
6928 upper = (upper & ~(bfd_vma) 0x7ff)
6929 | ((offset >> 12) & 0x3ff)
6930 | (reloc_sign << 10);
6931 lower = (lower & ~(bfd_vma) 0x2fff)
6932 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
6933 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
6934 | ((offset >> 1) & 0x7ff);
6935 bfd_put_16 (abfd, upper, insn);
6936 bfd_put_16 (abfd, lower, insn + 2);
6937 }
6938
6939 /* Thumb code calling an ARM function. */
6940
6941 static int
6942 elf32_thumb_to_arm_stub (struct bfd_link_info * info,
6943 const char * name,
6944 bfd * input_bfd,
6945 bfd * output_bfd,
6946 asection * input_section,
6947 bfd_byte * hit_data,
6948 asection * sym_sec,
6949 bfd_vma offset,
6950 bfd_signed_vma addend,
6951 bfd_vma val,
6952 char **error_message)
6953 {
6954 asection * s = 0;
6955 bfd_vma my_offset;
6956 long int ret_offset;
6957 struct elf_link_hash_entry * myh;
6958 struct elf32_arm_link_hash_table * globals;
6959
6960 myh = find_thumb_glue (info, name, error_message);
6961 if (myh == NULL)
6962 return FALSE;
6963
6964 globals = elf32_arm_hash_table (info);
6965 BFD_ASSERT (globals != NULL);
6966 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6967
6968 my_offset = myh->root.u.def.value;
6969
6970 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6971 THUMB2ARM_GLUE_SECTION_NAME);
6972
6973 BFD_ASSERT (s != NULL);
6974 BFD_ASSERT (s->contents != NULL);
6975 BFD_ASSERT (s->output_section != NULL);
6976
6977 if ((my_offset & 0x01) == 0x01)
6978 {
6979 if (sym_sec != NULL
6980 && sym_sec->owner != NULL
6981 && !INTERWORK_FLAG (sym_sec->owner))
6982 {
6983 (*_bfd_error_handler)
6984 (_("%B(%s): warning: interworking not enabled.\n"
6985 " first occurrence: %B: Thumb call to ARM"),
6986 sym_sec->owner, input_bfd, name);
6987
6988 return FALSE;
6989 }
6990
6991 --my_offset;
6992 myh->root.u.def.value = my_offset;
6993
6994 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
6995 s->contents + my_offset);
6996
6997 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
6998 s->contents + my_offset + 2);
6999
7000 ret_offset =
7001 /* Address of destination of the stub. */
7002 ((bfd_signed_vma) val)
7003 - ((bfd_signed_vma)
7004 /* Offset from the start of the current section
7005 to the start of the stubs. */
7006 (s->output_offset
7007 /* Offset of the start of this stub from the start of the stubs. */
7008 + my_offset
7009 /* Address of the start of the current section. */
7010 + s->output_section->vma)
7011 /* The branch instruction is 4 bytes into the stub. */
7012 + 4
7013 /* ARM branches work from the pc of the instruction + 8. */
7014 + 8);
7015
7016 put_arm_insn (globals, output_bfd,
7017 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
7018 s->contents + my_offset + 4);
7019 }
7020
7021 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
7022
7023 /* Now go back and fix up the original BL insn to point to here. */
7024 ret_offset =
7025 /* Address of where the stub is located. */
7026 (s->output_section->vma + s->output_offset + my_offset)
7027 /* Address of where the BL is located. */
7028 - (input_section->output_section->vma + input_section->output_offset
7029 + offset)
7030 /* Addend in the relocation. */
7031 - addend
7032 /* Biassing for PC-relative addressing. */
7033 - 8;
7034
7035 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
7036
7037 return TRUE;
7038 }
7039
7040 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
7041
7042 static struct elf_link_hash_entry *
7043 elf32_arm_create_thumb_stub (struct bfd_link_info * info,
7044 const char * name,
7045 bfd * input_bfd,
7046 bfd * output_bfd,
7047 asection * sym_sec,
7048 bfd_vma val,
7049 asection * s,
7050 char ** error_message)
7051 {
7052 bfd_vma my_offset;
7053 long int ret_offset;
7054 struct elf_link_hash_entry * myh;
7055 struct elf32_arm_link_hash_table * globals;
7056
7057 myh = find_arm_glue (info, name, error_message);
7058 if (myh == NULL)
7059 return NULL;
7060
7061 globals = elf32_arm_hash_table (info);
7062 BFD_ASSERT (globals != NULL);
7063 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7064
7065 my_offset = myh->root.u.def.value;
7066
7067 if ((my_offset & 0x01) == 0x01)
7068 {
7069 if (sym_sec != NULL
7070 && sym_sec->owner != NULL
7071 && !INTERWORK_FLAG (sym_sec->owner))
7072 {
7073 (*_bfd_error_handler)
7074 (_("%B(%s): warning: interworking not enabled.\n"
7075 " first occurrence: %B: arm call to thumb"),
7076 sym_sec->owner, input_bfd, name);
7077 }
7078
7079 --my_offset;
7080 myh->root.u.def.value = my_offset;
7081
7082 if (info->shared || globals->root.is_relocatable_executable
7083 || globals->pic_veneer)
7084 {
7085 /* For relocatable objects we can't use absolute addresses,
7086 so construct the address from a relative offset. */
7087 /* TODO: If the offset is small it's probably worth
7088 constructing the address with adds. */
7089 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
7090 s->contents + my_offset);
7091 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
7092 s->contents + my_offset + 4);
7093 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
7094 s->contents + my_offset + 8);
7095 /* Adjust the offset by 4 for the position of the add,
7096 and 8 for the pipeline offset. */
7097 ret_offset = (val - (s->output_offset
7098 + s->output_section->vma
7099 + my_offset + 12))
7100 | 1;
7101 bfd_put_32 (output_bfd, ret_offset,
7102 s->contents + my_offset + 12);
7103 }
7104 else if (globals->use_blx)
7105 {
7106 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
7107 s->contents + my_offset);
7108
7109 /* It's a thumb address. Add the low order bit. */
7110 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
7111 s->contents + my_offset + 4);
7112 }
7113 else
7114 {
7115 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
7116 s->contents + my_offset);
7117
7118 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
7119 s->contents + my_offset + 4);
7120
7121 /* It's a thumb address. Add the low order bit. */
7122 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
7123 s->contents + my_offset + 8);
7124
7125 my_offset += 12;
7126 }
7127 }
7128
7129 BFD_ASSERT (my_offset <= globals->arm_glue_size);
7130
7131 return myh;
7132 }
7133
7134 /* Arm code calling a Thumb function. */
7135
7136 static int
7137 elf32_arm_to_thumb_stub (struct bfd_link_info * info,
7138 const char * name,
7139 bfd * input_bfd,
7140 bfd * output_bfd,
7141 asection * input_section,
7142 bfd_byte * hit_data,
7143 asection * sym_sec,
7144 bfd_vma offset,
7145 bfd_signed_vma addend,
7146 bfd_vma val,
7147 char **error_message)
7148 {
7149 unsigned long int tmp;
7150 bfd_vma my_offset;
7151 asection * s;
7152 long int ret_offset;
7153 struct elf_link_hash_entry * myh;
7154 struct elf32_arm_link_hash_table * globals;
7155
7156 globals = elf32_arm_hash_table (info);
7157 BFD_ASSERT (globals != NULL);
7158 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7159
7160 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
7161 ARM2THUMB_GLUE_SECTION_NAME);
7162 BFD_ASSERT (s != NULL);
7163 BFD_ASSERT (s->contents != NULL);
7164 BFD_ASSERT (s->output_section != NULL);
7165
7166 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
7167 sym_sec, val, s, error_message);
7168 if (!myh)
7169 return FALSE;
7170
7171 my_offset = myh->root.u.def.value;
7172 tmp = bfd_get_32 (input_bfd, hit_data);
7173 tmp = tmp & 0xFF000000;
7174
7175 /* Somehow these are both 4 too far, so subtract 8. */
7176 ret_offset = (s->output_offset
7177 + my_offset
7178 + s->output_section->vma
7179 - (input_section->output_offset
7180 + input_section->output_section->vma
7181 + offset + addend)
7182 - 8);
7183
7184 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
7185
7186 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
7187
7188 return TRUE;
7189 }
7190
7191 /* Populate Arm stub for an exported Thumb function. */
7192
7193 static bfd_boolean
7194 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
7195 {
7196 struct bfd_link_info * info = (struct bfd_link_info *) inf;
7197 asection * s;
7198 struct elf_link_hash_entry * myh;
7199 struct elf32_arm_link_hash_entry *eh;
7200 struct elf32_arm_link_hash_table * globals;
7201 asection *sec;
7202 bfd_vma val;
7203 char *error_message;
7204
7205 eh = elf32_arm_hash_entry (h);
7206 /* Allocate stubs for exported Thumb functions on v4t. */
7207 if (eh->export_glue == NULL)
7208 return TRUE;
7209
7210 globals = elf32_arm_hash_table (info);
7211 BFD_ASSERT (globals != NULL);
7212 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7213
7214 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
7215 ARM2THUMB_GLUE_SECTION_NAME);
7216 BFD_ASSERT (s != NULL);
7217 BFD_ASSERT (s->contents != NULL);
7218 BFD_ASSERT (s->output_section != NULL);
7219
7220 sec = eh->export_glue->root.u.def.section;
7221
7222 BFD_ASSERT (sec->output_section != NULL);
7223
7224 val = eh->export_glue->root.u.def.value + sec->output_offset
7225 + sec->output_section->vma;
7226
7227 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
7228 h->root.u.def.section->owner,
7229 globals->obfd, sec, val, s,
7230 &error_message);
7231 BFD_ASSERT (myh);
7232 return TRUE;
7233 }
7234
7235 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
7236
7237 static bfd_vma
7238 elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
7239 {
7240 bfd_byte *p;
7241 bfd_vma glue_addr;
7242 asection *s;
7243 struct elf32_arm_link_hash_table *globals;
7244
7245 globals = elf32_arm_hash_table (info);
7246 BFD_ASSERT (globals != NULL);
7247 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7248
7249 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
7250 ARM_BX_GLUE_SECTION_NAME);
7251 BFD_ASSERT (s != NULL);
7252 BFD_ASSERT (s->contents != NULL);
7253 BFD_ASSERT (s->output_section != NULL);
7254
7255 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
7256
7257 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
7258
7259 if ((globals->bx_glue_offset[reg] & 1) == 0)
7260 {
7261 p = s->contents + glue_addr;
7262 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
7263 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
7264 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
7265 globals->bx_glue_offset[reg] |= 1;
7266 }
7267
7268 return glue_addr + s->output_section->vma + s->output_offset;
7269 }
7270
7271 /* Generate Arm stubs for exported Thumb symbols. */
7272 static void
7273 elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
7274 struct bfd_link_info *link_info)
7275 {
7276 struct elf32_arm_link_hash_table * globals;
7277
7278 if (link_info == NULL)
7279 /* Ignore this if we are not called by the ELF backend linker. */
7280 return;
7281
7282 globals = elf32_arm_hash_table (link_info);
7283 if (globals == NULL)
7284 return;
7285
7286 /* If blx is available then exported Thumb symbols are OK and there is
7287 nothing to do. */
7288 if (globals->use_blx)
7289 return;
7290
7291 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
7292 link_info);
7293 }
7294
7295 /* Reserve space for COUNT dynamic relocations in relocation selection
7296 SRELOC. */
7297
7298 static void
7299 elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
7300 bfd_size_type count)
7301 {
7302 struct elf32_arm_link_hash_table *htab;
7303
7304 htab = elf32_arm_hash_table (info);
7305 BFD_ASSERT (htab->root.dynamic_sections_created);
7306 if (sreloc == NULL)
7307 abort ();
7308 sreloc->size += RELOC_SIZE (htab) * count;
7309 }
7310
7311 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
7312 dynamic, the relocations should go in SRELOC, otherwise they should
7313 go in the special .rel.iplt section. */
7314
7315 static void
7316 elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
7317 bfd_size_type count)
7318 {
7319 struct elf32_arm_link_hash_table *htab;
7320
7321 htab = elf32_arm_hash_table (info);
7322 if (!htab->root.dynamic_sections_created)
7323 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
7324 else
7325 {
7326 BFD_ASSERT (sreloc != NULL);
7327 sreloc->size += RELOC_SIZE (htab) * count;
7328 }
7329 }
7330
7331 /* Add relocation REL to the end of relocation section SRELOC. */
7332
7333 static void
7334 elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
7335 asection *sreloc, Elf_Internal_Rela *rel)
7336 {
7337 bfd_byte *loc;
7338 struct elf32_arm_link_hash_table *htab;
7339
7340 htab = elf32_arm_hash_table (info);
7341 if (!htab->root.dynamic_sections_created
7342 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
7343 sreloc = htab->root.irelplt;
7344 if (sreloc == NULL)
7345 abort ();
7346 loc = sreloc->contents;
7347 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
7348 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
7349 abort ();
7350 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
7351 }
7352
7353 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
7354 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
7355 to .plt. */
7356
7357 static void
7358 elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
7359 bfd_boolean is_iplt_entry,
7360 union gotplt_union *root_plt,
7361 struct arm_plt_info *arm_plt)
7362 {
7363 struct elf32_arm_link_hash_table *htab;
7364 asection *splt;
7365 asection *sgotplt;
7366
7367 htab = elf32_arm_hash_table (info);
7368
7369 if (is_iplt_entry)
7370 {
7371 splt = htab->root.iplt;
7372 sgotplt = htab->root.igotplt;
7373
7374 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
7375 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
7376 }
7377 else
7378 {
7379 splt = htab->root.splt;
7380 sgotplt = htab->root.sgotplt;
7381
7382 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
7383 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
7384
7385 /* If this is the first .plt entry, make room for the special
7386 first entry. */
7387 if (splt->size == 0)
7388 splt->size += htab->plt_header_size;
7389 }
7390
7391 /* Allocate the PLT entry itself, including any leading Thumb stub. */
7392 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
7393 splt->size += PLT_THUMB_STUB_SIZE;
7394 root_plt->offset = splt->size;
7395 splt->size += htab->plt_entry_size;
7396
7397 if (!htab->symbian_p)
7398 {
7399 /* We also need to make an entry in the .got.plt section, which
7400 will be placed in the .got section by the linker script. */
7401 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
7402 sgotplt->size += 4;
7403 }
7404 }
7405
7406 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
7407 the entry lives in .iplt and resolves to (*SYM_VALUE)().
7408 Otherwise, DYNINDX is the index of the symbol in the dynamic
7409 symbol table and SYM_VALUE is undefined.
7410
7411 ROOT_PLT points to the offset of the PLT entry from the start of its
7412 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
7413 bookkeeping information. */
7414
7415 static void
7416 elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
7417 union gotplt_union *root_plt,
7418 struct arm_plt_info *arm_plt,
7419 int dynindx, bfd_vma sym_value)
7420 {
7421 struct elf32_arm_link_hash_table *htab;
7422 asection *sgot;
7423 asection *splt;
7424 asection *srel;
7425 bfd_byte *loc;
7426 bfd_vma plt_index;
7427 Elf_Internal_Rela rel;
7428 bfd_vma plt_header_size;
7429 bfd_vma got_header_size;
7430
7431 htab = elf32_arm_hash_table (info);
7432
7433 /* Pick the appropriate sections and sizes. */
7434 if (dynindx == -1)
7435 {
7436 splt = htab->root.iplt;
7437 sgot = htab->root.igotplt;
7438 srel = htab->root.irelplt;
7439
7440 /* There are no reserved entries in .igot.plt, and no special
7441 first entry in .iplt. */
7442 got_header_size = 0;
7443 plt_header_size = 0;
7444 }
7445 else
7446 {
7447 splt = htab->root.splt;
7448 sgot = htab->root.sgotplt;
7449 srel = htab->root.srelplt;
7450
7451 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
7452 plt_header_size = htab->plt_header_size;
7453 }
7454 BFD_ASSERT (splt != NULL && srel != NULL);
7455
7456 /* Fill in the entry in the procedure linkage table. */
7457 if (htab->symbian_p)
7458 {
7459 BFD_ASSERT (dynindx >= 0);
7460 put_arm_insn (htab, output_bfd,
7461 elf32_arm_symbian_plt_entry[0],
7462 splt->contents + root_plt->offset);
7463 bfd_put_32 (output_bfd,
7464 elf32_arm_symbian_plt_entry[1],
7465 splt->contents + root_plt->offset + 4);
7466
7467 /* Fill in the entry in the .rel.plt section. */
7468 rel.r_offset = (splt->output_section->vma
7469 + splt->output_offset
7470 + root_plt->offset + 4);
7471 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
7472
7473 /* Get the index in the procedure linkage table which
7474 corresponds to this symbol. This is the index of this symbol
7475 in all the symbols for which we are making plt entries. The
7476 first entry in the procedure linkage table is reserved. */
7477 plt_index = ((root_plt->offset - plt_header_size)
7478 / htab->plt_entry_size);
7479 }
7480 else
7481 {
7482 bfd_vma got_offset, got_address, plt_address;
7483 bfd_vma got_displacement, initial_got_entry;
7484 bfd_byte * ptr;
7485
7486 BFD_ASSERT (sgot != NULL);
7487
7488 /* Get the offset into the .(i)got.plt table of the entry that
7489 corresponds to this function. */
7490 got_offset = (arm_plt->got_offset & -2);
7491
7492 /* Get the index in the procedure linkage table which
7493 corresponds to this symbol. This is the index of this symbol
7494 in all the symbols for which we are making plt entries.
7495 After the reserved .got.plt entries, all symbols appear in
7496 the same order as in .plt. */
7497 plt_index = (got_offset - got_header_size) / 4;
7498
7499 /* Calculate the address of the GOT entry. */
7500 got_address = (sgot->output_section->vma
7501 + sgot->output_offset
7502 + got_offset);
7503
7504 /* ...and the address of the PLT entry. */
7505 plt_address = (splt->output_section->vma
7506 + splt->output_offset
7507 + root_plt->offset);
7508
7509 ptr = splt->contents + root_plt->offset;
7510 if (htab->vxworks_p && info->shared)
7511 {
7512 unsigned int i;
7513 bfd_vma val;
7514
7515 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
7516 {
7517 val = elf32_arm_vxworks_shared_plt_entry[i];
7518 if (i == 2)
7519 val |= got_address - sgot->output_section->vma;
7520 if (i == 5)
7521 val |= plt_index * RELOC_SIZE (htab);
7522 if (i == 2 || i == 5)
7523 bfd_put_32 (output_bfd, val, ptr);
7524 else
7525 put_arm_insn (htab, output_bfd, val, ptr);
7526 }
7527 }
7528 else if (htab->vxworks_p)
7529 {
7530 unsigned int i;
7531 bfd_vma val;
7532
7533 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
7534 {
7535 val = elf32_arm_vxworks_exec_plt_entry[i];
7536 if (i == 2)
7537 val |= got_address;
7538 if (i == 4)
7539 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
7540 if (i == 5)
7541 val |= plt_index * RELOC_SIZE (htab);
7542 if (i == 2 || i == 5)
7543 bfd_put_32 (output_bfd, val, ptr);
7544 else
7545 put_arm_insn (htab, output_bfd, val, ptr);
7546 }
7547
7548 loc = (htab->srelplt2->contents
7549 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
7550
7551 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
7552 referencing the GOT for this PLT entry. */
7553 rel.r_offset = plt_address + 8;
7554 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
7555 rel.r_addend = got_offset;
7556 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7557 loc += RELOC_SIZE (htab);
7558
7559 /* Create the R_ARM_ABS32 relocation referencing the
7560 beginning of the PLT for this GOT entry. */
7561 rel.r_offset = got_address;
7562 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
7563 rel.r_addend = 0;
7564 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7565 }
7566 else
7567 {
7568 /* Calculate the displacement between the PLT slot and the
7569 entry in the GOT. The eight-byte offset accounts for the
7570 value produced by adding to pc in the first instruction
7571 of the PLT stub. */
7572 got_displacement = got_address - (plt_address + 8);
7573
7574 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
7575
7576 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
7577 {
7578 put_thumb_insn (htab, output_bfd,
7579 elf32_arm_plt_thumb_stub[0], ptr - 4);
7580 put_thumb_insn (htab, output_bfd,
7581 elf32_arm_plt_thumb_stub[1], ptr - 2);
7582 }
7583
7584 put_arm_insn (htab, output_bfd,
7585 elf32_arm_plt_entry[0]
7586 | ((got_displacement & 0x0ff00000) >> 20),
7587 ptr + 0);
7588 put_arm_insn (htab, output_bfd,
7589 elf32_arm_plt_entry[1]
7590 | ((got_displacement & 0x000ff000) >> 12),
7591 ptr+ 4);
7592 put_arm_insn (htab, output_bfd,
7593 elf32_arm_plt_entry[2]
7594 | (got_displacement & 0x00000fff),
7595 ptr + 8);
7596 #ifdef FOUR_WORD_PLT
7597 bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12);
7598 #endif
7599 }
7600
7601 /* Fill in the entry in the .rel(a).(i)plt section. */
7602 rel.r_offset = got_address;
7603 rel.r_addend = 0;
7604 if (dynindx == -1)
7605 {
7606 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
7607 The dynamic linker or static executable then calls SYM_VALUE
7608 to determine the correct run-time value of the .igot.plt entry. */
7609 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
7610 initial_got_entry = sym_value;
7611 }
7612 else
7613 {
7614 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
7615 initial_got_entry = (splt->output_section->vma
7616 + splt->output_offset);
7617 }
7618
7619 /* Fill in the entry in the global offset table. */
7620 bfd_put_32 (output_bfd, initial_got_entry,
7621 sgot->contents + got_offset);
7622 }
7623
7624 loc = srel->contents + plt_index * RELOC_SIZE (htab);
7625 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7626 }
7627
7628 /* Some relocations map to different relocations depending on the
7629 target. Return the real relocation. */
7630
7631 static int
7632 arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
7633 int r_type)
7634 {
7635 switch (r_type)
7636 {
7637 case R_ARM_TARGET1:
7638 if (globals->target1_is_rel)
7639 return R_ARM_REL32;
7640 else
7641 return R_ARM_ABS32;
7642
7643 case R_ARM_TARGET2:
7644 return globals->target2_reloc;
7645
7646 default:
7647 return r_type;
7648 }
7649 }
7650
7651 /* Return the base VMA address which should be subtracted from real addresses
7652 when resolving @dtpoff relocation.
7653 This is PT_TLS segment p_vaddr. */
7654
7655 static bfd_vma
7656 dtpoff_base (struct bfd_link_info *info)
7657 {
7658 /* If tls_sec is NULL, we should have signalled an error already. */
7659 if (elf_hash_table (info)->tls_sec == NULL)
7660 return 0;
7661 return elf_hash_table (info)->tls_sec->vma;
7662 }
7663
7664 /* Return the relocation value for @tpoff relocation
7665 if STT_TLS virtual address is ADDRESS. */
7666
7667 static bfd_vma
7668 tpoff (struct bfd_link_info *info, bfd_vma address)
7669 {
7670 struct elf_link_hash_table *htab = elf_hash_table (info);
7671 bfd_vma base;
7672
7673 /* If tls_sec is NULL, we should have signalled an error already. */
7674 if (htab->tls_sec == NULL)
7675 return 0;
7676 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
7677 return address - htab->tls_sec->vma + base;
7678 }
7679
7680 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
7681 VALUE is the relocation value. */
7682
7683 static bfd_reloc_status_type
7684 elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
7685 {
7686 if (value > 0xfff)
7687 return bfd_reloc_overflow;
7688
7689 value |= bfd_get_32 (abfd, data) & 0xfffff000;
7690 bfd_put_32 (abfd, value, data);
7691 return bfd_reloc_ok;
7692 }
7693
7694 /* Handle TLS relaxations. Relaxing is possible for symbols that use
7695 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
7696 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
7697
7698 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
7699 is to then call final_link_relocate. Return other values in the
7700 case of error.
7701
7702 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
7703 the pre-relaxed code. It would be nice if the relocs were updated
7704 to match the optimization. */
7705
7706 static bfd_reloc_status_type
7707 elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
7708 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
7709 Elf_Internal_Rela *rel, unsigned long is_local)
7710 {
7711 unsigned long insn;
7712
7713 switch (ELF32_R_TYPE (rel->r_info))
7714 {
7715 default:
7716 return bfd_reloc_notsupported;
7717
7718 case R_ARM_TLS_GOTDESC:
7719 if (is_local)
7720 insn = 0;
7721 else
7722 {
7723 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7724 if (insn & 1)
7725 insn -= 5; /* THUMB */
7726 else
7727 insn -= 8; /* ARM */
7728 }
7729 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
7730 return bfd_reloc_continue;
7731
7732 case R_ARM_THM_TLS_DESCSEQ:
7733 /* Thumb insn. */
7734 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
7735 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
7736 {
7737 if (is_local)
7738 /* nop */
7739 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7740 }
7741 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
7742 {
7743 if (is_local)
7744 /* nop */
7745 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7746 else
7747 /* ldr rx,[ry] */
7748 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
7749 }
7750 else if ((insn & 0xff87) == 0x4780) /* blx rx */
7751 {
7752 if (is_local)
7753 /* nop */
7754 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7755 else
7756 /* mov r0, rx */
7757 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
7758 contents + rel->r_offset);
7759 }
7760 else
7761 {
7762 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
7763 /* It's a 32 bit instruction, fetch the rest of it for
7764 error generation. */
7765 insn = (insn << 16)
7766 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
7767 (*_bfd_error_handler)
7768 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"),
7769 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
7770 return bfd_reloc_notsupported;
7771 }
7772 break;
7773
7774 case R_ARM_TLS_DESCSEQ:
7775 /* arm insn. */
7776 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7777 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
7778 {
7779 if (is_local)
7780 /* mov rx, ry */
7781 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
7782 contents + rel->r_offset);
7783 }
7784 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
7785 {
7786 if (is_local)
7787 /* nop */
7788 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
7789 else
7790 /* ldr rx,[ry] */
7791 bfd_put_32 (input_bfd, insn & 0xfffff000,
7792 contents + rel->r_offset);
7793 }
7794 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
7795 {
7796 if (is_local)
7797 /* nop */
7798 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
7799 else
7800 /* mov r0, rx */
7801 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
7802 contents + rel->r_offset);
7803 }
7804 else
7805 {
7806 (*_bfd_error_handler)
7807 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline"),
7808 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
7809 return bfd_reloc_notsupported;
7810 }
7811 break;
7812
7813 case R_ARM_TLS_CALL:
7814 /* GD->IE relaxation, turn the instruction into 'nop' or
7815 'ldr r0, [pc,r0]' */
7816 insn = is_local ? 0xe1a00000 : 0xe79f0000;
7817 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
7818 break;
7819
7820 case R_ARM_THM_TLS_CALL:
7821 /* GD->IE relaxation */
7822 if (!is_local)
7823 /* add r0,pc; ldr r0, [r0] */
7824 insn = 0x44786800;
7825 else if (arch_has_thumb2_nop (globals))
7826 /* nop.w */
7827 insn = 0xf3af8000;
7828 else
7829 /* nop; nop */
7830 insn = 0xbf00bf00;
7831
7832 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
7833 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
7834 break;
7835 }
7836 return bfd_reloc_ok;
7837 }
7838
7839 /* For a given value of n, calculate the value of G_n as required to
7840 deal with group relocations. We return it in the form of an
7841 encoded constant-and-rotation, together with the final residual. If n is
7842 specified as less than zero, then final_residual is filled with the
7843 input value and no further action is performed. */
7844
7845 static bfd_vma
7846 calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
7847 {
7848 int current_n;
7849 bfd_vma g_n;
7850 bfd_vma encoded_g_n = 0;
7851 bfd_vma residual = value; /* Also known as Y_n. */
7852
7853 for (current_n = 0; current_n <= n; current_n++)
7854 {
7855 int shift;
7856
7857 /* Calculate which part of the value to mask. */
7858 if (residual == 0)
7859 shift = 0;
7860 else
7861 {
7862 int msb;
7863
7864 /* Determine the most significant bit in the residual and
7865 align the resulting value to a 2-bit boundary. */
7866 for (msb = 30; msb >= 0; msb -= 2)
7867 if (residual & (3 << msb))
7868 break;
7869
7870 /* The desired shift is now (msb - 6), or zero, whichever
7871 is the greater. */
7872 shift = msb - 6;
7873 if (shift < 0)
7874 shift = 0;
7875 }
7876
7877 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
7878 g_n = residual & (0xff << shift);
7879 encoded_g_n = (g_n >> shift)
7880 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
7881
7882 /* Calculate the residual for the next time around. */
7883 residual &= ~g_n;
7884 }
7885
7886 *final_residual = residual;
7887
7888 return encoded_g_n;
7889 }
7890
7891 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
7892 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
7893
7894 static int
7895 identify_add_or_sub (bfd_vma insn)
7896 {
7897 int opcode = insn & 0x1e00000;
7898
7899 if (opcode == 1 << 23) /* ADD */
7900 return 1;
7901
7902 if (opcode == 1 << 22) /* SUB */
7903 return -1;
7904
7905 return 0;
7906 }
7907
7908 /* Perform a relocation as part of a final link. */
7909
7910 static bfd_reloc_status_type
7911 elf32_arm_final_link_relocate (reloc_howto_type * howto,
7912 bfd * input_bfd,
7913 bfd * output_bfd,
7914 asection * input_section,
7915 bfd_byte * contents,
7916 Elf_Internal_Rela * rel,
7917 bfd_vma value,
7918 struct bfd_link_info * info,
7919 asection * sym_sec,
7920 const char * sym_name,
7921 unsigned char st_type,
7922 enum arm_st_branch_type branch_type,
7923 struct elf_link_hash_entry * h,
7924 bfd_boolean * unresolved_reloc_p,
7925 char ** error_message)
7926 {
7927 unsigned long r_type = howto->type;
7928 unsigned long r_symndx;
7929 bfd_byte * hit_data = contents + rel->r_offset;
7930 bfd_vma * local_got_offsets;
7931 bfd_vma * local_tlsdesc_gotents;
7932 asection * sgot;
7933 asection * splt;
7934 asection * sreloc = NULL;
7935 asection * srelgot;
7936 bfd_vma addend;
7937 bfd_signed_vma signed_addend;
7938 unsigned char dynreloc_st_type;
7939 bfd_vma dynreloc_value;
7940 struct elf32_arm_link_hash_table * globals;
7941 struct elf32_arm_link_hash_entry *eh;
7942 union gotplt_union *root_plt;
7943 struct arm_plt_info *arm_plt;
7944 bfd_vma plt_offset;
7945 bfd_vma gotplt_offset;
7946 bfd_boolean has_iplt_entry;
7947
7948 globals = elf32_arm_hash_table (info);
7949 if (globals == NULL)
7950 return bfd_reloc_notsupported;
7951
7952 BFD_ASSERT (is_arm_elf (input_bfd));
7953
7954 /* Some relocation types map to different relocations depending on the
7955 target. We pick the right one here. */
7956 r_type = arm_real_reloc_type (globals, r_type);
7957
7958 /* It is possible to have linker relaxations on some TLS access
7959 models. Update our information here. */
7960 r_type = elf32_arm_tls_transition (info, r_type, h);
7961
7962 if (r_type != howto->type)
7963 howto = elf32_arm_howto_from_type (r_type);
7964
7965 /* If the start address has been set, then set the EF_ARM_HASENTRY
7966 flag. Setting this more than once is redundant, but the cost is
7967 not too high, and it keeps the code simple.
7968
7969 The test is done here, rather than somewhere else, because the
7970 start address is only set just before the final link commences.
7971
7972 Note - if the user deliberately sets a start address of 0, the
7973 flag will not be set. */
7974 if (bfd_get_start_address (output_bfd) != 0)
7975 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
7976
7977 eh = (struct elf32_arm_link_hash_entry *) h;
7978 sgot = globals->root.sgot;
7979 local_got_offsets = elf_local_got_offsets (input_bfd);
7980 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
7981
7982 if (globals->root.dynamic_sections_created)
7983 srelgot = globals->root.srelgot;
7984 else
7985 srelgot = NULL;
7986
7987 r_symndx = ELF32_R_SYM (rel->r_info);
7988
7989 if (globals->use_rel)
7990 {
7991 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
7992
7993 if (addend & ((howto->src_mask + 1) >> 1))
7994 {
7995 signed_addend = -1;
7996 signed_addend &= ~ howto->src_mask;
7997 signed_addend |= addend;
7998 }
7999 else
8000 signed_addend = addend;
8001 }
8002 else
8003 addend = signed_addend = rel->r_addend;
8004
8005 /* Record the symbol information that should be used in dynamic
8006 relocations. */
8007 dynreloc_st_type = st_type;
8008 dynreloc_value = value;
8009 if (branch_type == ST_BRANCH_TO_THUMB)
8010 dynreloc_value |= 1;
8011
8012 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
8013 VALUE appropriately for relocations that we resolve at link time. */
8014 has_iplt_entry = FALSE;
8015 if (elf32_arm_get_plt_info (input_bfd, eh, r_symndx, &root_plt, &arm_plt)
8016 && root_plt->offset != (bfd_vma) -1)
8017 {
8018 plt_offset = root_plt->offset;
8019 gotplt_offset = arm_plt->got_offset;
8020
8021 if (h == NULL || eh->is_iplt)
8022 {
8023 has_iplt_entry = TRUE;
8024 splt = globals->root.iplt;
8025
8026 /* Populate .iplt entries here, because not all of them will
8027 be seen by finish_dynamic_symbol. The lower bit is set if
8028 we have already populated the entry. */
8029 if (plt_offset & 1)
8030 plt_offset--;
8031 else
8032 {
8033 elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
8034 -1, dynreloc_value);
8035 root_plt->offset |= 1;
8036 }
8037
8038 /* Static relocations always resolve to the .iplt entry. */
8039 st_type = STT_FUNC;
8040 value = (splt->output_section->vma
8041 + splt->output_offset
8042 + plt_offset);
8043 branch_type = ST_BRANCH_TO_ARM;
8044
8045 /* If there are non-call relocations that resolve to the .iplt
8046 entry, then all dynamic ones must too. */
8047 if (arm_plt->noncall_refcount != 0)
8048 {
8049 dynreloc_st_type = st_type;
8050 dynreloc_value = value;
8051 }
8052 }
8053 else
8054 /* We populate the .plt entry in finish_dynamic_symbol. */
8055 splt = globals->root.splt;
8056 }
8057 else
8058 {
8059 splt = NULL;
8060 plt_offset = (bfd_vma) -1;
8061 gotplt_offset = (bfd_vma) -1;
8062 }
8063
8064 switch (r_type)
8065 {
8066 case R_ARM_NONE:
8067 /* We don't need to find a value for this symbol. It's just a
8068 marker. */
8069 *unresolved_reloc_p = FALSE;
8070 return bfd_reloc_ok;
8071
8072 case R_ARM_ABS12:
8073 if (!globals->vxworks_p)
8074 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
8075
8076 case R_ARM_PC24:
8077 case R_ARM_ABS32:
8078 case R_ARM_ABS32_NOI:
8079 case R_ARM_REL32:
8080 case R_ARM_REL32_NOI:
8081 case R_ARM_CALL:
8082 case R_ARM_JUMP24:
8083 case R_ARM_XPC25:
8084 case R_ARM_PREL31:
8085 case R_ARM_PLT32:
8086 /* Handle relocations which should use the PLT entry. ABS32/REL32
8087 will use the symbol's value, which may point to a PLT entry, but we
8088 don't need to handle that here. If we created a PLT entry, all
8089 branches in this object should go to it, except if the PLT is too
8090 far away, in which case a long branch stub should be inserted. */
8091 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
8092 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
8093 && r_type != R_ARM_CALL
8094 && r_type != R_ARM_JUMP24
8095 && r_type != R_ARM_PLT32)
8096 && plt_offset != (bfd_vma) -1)
8097 {
8098 /* If we've created a .plt section, and assigned a PLT entry
8099 to this function, it must either be a STT_GNU_IFUNC reference
8100 or not be known to bind locally. In other cases, we should
8101 have cleared the PLT entry by now. */
8102 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
8103
8104 value = (splt->output_section->vma
8105 + splt->output_offset
8106 + plt_offset);
8107 *unresolved_reloc_p = FALSE;
8108 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8109 contents, rel->r_offset, value,
8110 rel->r_addend);
8111 }
8112
8113 /* When generating a shared object or relocatable executable, these
8114 relocations are copied into the output file to be resolved at
8115 run time. */
8116 if ((info->shared || globals->root.is_relocatable_executable)
8117 && (input_section->flags & SEC_ALLOC)
8118 && !(globals->vxworks_p
8119 && strcmp (input_section->output_section->name,
8120 ".tls_vars") == 0)
8121 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
8122 || !SYMBOL_CALLS_LOCAL (info, h))
8123 && (!strstr (input_section->name, STUB_SUFFIX))
8124 && (h == NULL
8125 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8126 || h->root.type != bfd_link_hash_undefweak)
8127 && r_type != R_ARM_PC24
8128 && r_type != R_ARM_CALL
8129 && r_type != R_ARM_JUMP24
8130 && r_type != R_ARM_PREL31
8131 && r_type != R_ARM_PLT32)
8132 {
8133 Elf_Internal_Rela outrel;
8134 bfd_boolean skip, relocate;
8135
8136 *unresolved_reloc_p = FALSE;
8137
8138 if (sreloc == NULL && globals->root.dynamic_sections_created)
8139 {
8140 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
8141 ! globals->use_rel);
8142
8143 if (sreloc == NULL)
8144 return bfd_reloc_notsupported;
8145 }
8146
8147 skip = FALSE;
8148 relocate = FALSE;
8149
8150 outrel.r_addend = addend;
8151 outrel.r_offset =
8152 _bfd_elf_section_offset (output_bfd, info, input_section,
8153 rel->r_offset);
8154 if (outrel.r_offset == (bfd_vma) -1)
8155 skip = TRUE;
8156 else if (outrel.r_offset == (bfd_vma) -2)
8157 skip = TRUE, relocate = TRUE;
8158 outrel.r_offset += (input_section->output_section->vma
8159 + input_section->output_offset);
8160
8161 if (skip)
8162 memset (&outrel, 0, sizeof outrel);
8163 else if (h != NULL
8164 && h->dynindx != -1
8165 && (!info->shared
8166 || !info->symbolic
8167 || !h->def_regular))
8168 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
8169 else
8170 {
8171 int symbol;
8172
8173 /* This symbol is local, or marked to become local. */
8174 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI);
8175 if (globals->symbian_p)
8176 {
8177 asection *osec;
8178
8179 /* On Symbian OS, the data segment and text segement
8180 can be relocated independently. Therefore, we
8181 must indicate the segment to which this
8182 relocation is relative. The BPABI allows us to
8183 use any symbol in the right segment; we just use
8184 the section symbol as it is convenient. (We
8185 cannot use the symbol given by "h" directly as it
8186 will not appear in the dynamic symbol table.)
8187
8188 Note that the dynamic linker ignores the section
8189 symbol value, so we don't subtract osec->vma
8190 from the emitted reloc addend. */
8191 if (sym_sec)
8192 osec = sym_sec->output_section;
8193 else
8194 osec = input_section->output_section;
8195 symbol = elf_section_data (osec)->dynindx;
8196 if (symbol == 0)
8197 {
8198 struct elf_link_hash_table *htab = elf_hash_table (info);
8199
8200 if ((osec->flags & SEC_READONLY) == 0
8201 && htab->data_index_section != NULL)
8202 osec = htab->data_index_section;
8203 else
8204 osec = htab->text_index_section;
8205 symbol = elf_section_data (osec)->dynindx;
8206 }
8207 BFD_ASSERT (symbol != 0);
8208 }
8209 else
8210 /* On SVR4-ish systems, the dynamic loader cannot
8211 relocate the text and data segments independently,
8212 so the symbol does not matter. */
8213 symbol = 0;
8214 if (dynreloc_st_type == STT_GNU_IFUNC)
8215 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
8216 to the .iplt entry. Instead, every non-call reference
8217 must use an R_ARM_IRELATIVE relocation to obtain the
8218 correct run-time address. */
8219 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
8220 else
8221 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
8222 if (globals->use_rel)
8223 relocate = TRUE;
8224 else
8225 outrel.r_addend += dynreloc_value;
8226 }
8227
8228 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
8229
8230 /* If this reloc is against an external symbol, we do not want to
8231 fiddle with the addend. Otherwise, we need to include the symbol
8232 value so that it becomes an addend for the dynamic reloc. */
8233 if (! relocate)
8234 return bfd_reloc_ok;
8235
8236 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8237 contents, rel->r_offset,
8238 dynreloc_value, (bfd_vma) 0);
8239 }
8240 else switch (r_type)
8241 {
8242 case R_ARM_ABS12:
8243 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
8244
8245 case R_ARM_XPC25: /* Arm BLX instruction. */
8246 case R_ARM_CALL:
8247 case R_ARM_JUMP24:
8248 case R_ARM_PC24: /* Arm B/BL instruction. */
8249 case R_ARM_PLT32:
8250 {
8251 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
8252
8253 if (r_type == R_ARM_XPC25)
8254 {
8255 /* Check for Arm calling Arm function. */
8256 /* FIXME: Should we translate the instruction into a BL
8257 instruction instead ? */
8258 if (branch_type != ST_BRANCH_TO_THUMB)
8259 (*_bfd_error_handler)
8260 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
8261 input_bfd,
8262 h ? h->root.root.string : "(local)");
8263 }
8264 else if (r_type == R_ARM_PC24)
8265 {
8266 /* Check for Arm calling Thumb function. */
8267 if (branch_type == ST_BRANCH_TO_THUMB)
8268 {
8269 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
8270 output_bfd, input_section,
8271 hit_data, sym_sec, rel->r_offset,
8272 signed_addend, value,
8273 error_message))
8274 return bfd_reloc_ok;
8275 else
8276 return bfd_reloc_dangerous;
8277 }
8278 }
8279
8280 /* Check if a stub has to be inserted because the
8281 destination is too far or we are changing mode. */
8282 if ( r_type == R_ARM_CALL
8283 || r_type == R_ARM_JUMP24
8284 || r_type == R_ARM_PLT32)
8285 {
8286 enum elf32_arm_stub_type stub_type = arm_stub_none;
8287 struct elf32_arm_link_hash_entry *hash;
8288
8289 hash = (struct elf32_arm_link_hash_entry *) h;
8290 stub_type = arm_type_of_stub (info, input_section, rel,
8291 st_type, &branch_type,
8292 hash, value, sym_sec,
8293 input_bfd, sym_name);
8294
8295 if (stub_type != arm_stub_none)
8296 {
8297 /* The target is out of reach, so redirect the
8298 branch to the local stub for this function. */
8299 stub_entry = elf32_arm_get_stub_entry (input_section,
8300 sym_sec, h,
8301 rel, globals,
8302 stub_type);
8303 {
8304 if (stub_entry != NULL)
8305 value = (stub_entry->stub_offset
8306 + stub_entry->stub_sec->output_offset
8307 + stub_entry->stub_sec->output_section->vma);
8308
8309 if (plt_offset != (bfd_vma) -1)
8310 *unresolved_reloc_p = FALSE;
8311 }
8312 }
8313 else
8314 {
8315 /* If the call goes through a PLT entry, make sure to
8316 check distance to the right destination address. */
8317 if (plt_offset != (bfd_vma) -1)
8318 {
8319 value = (splt->output_section->vma
8320 + splt->output_offset
8321 + plt_offset);
8322 *unresolved_reloc_p = FALSE;
8323 /* The PLT entry is in ARM mode, regardless of the
8324 target function. */
8325 branch_type = ST_BRANCH_TO_ARM;
8326 }
8327 }
8328 }
8329
8330 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
8331 where:
8332 S is the address of the symbol in the relocation.
8333 P is address of the instruction being relocated.
8334 A is the addend (extracted from the instruction) in bytes.
8335
8336 S is held in 'value'.
8337 P is the base address of the section containing the
8338 instruction plus the offset of the reloc into that
8339 section, ie:
8340 (input_section->output_section->vma +
8341 input_section->output_offset +
8342 rel->r_offset).
8343 A is the addend, converted into bytes, ie:
8344 (signed_addend * 4)
8345
8346 Note: None of these operations have knowledge of the pipeline
8347 size of the processor, thus it is up to the assembler to
8348 encode this information into the addend. */
8349 value -= (input_section->output_section->vma
8350 + input_section->output_offset);
8351 value -= rel->r_offset;
8352 if (globals->use_rel)
8353 value += (signed_addend << howto->size);
8354 else
8355 /* RELA addends do not have to be adjusted by howto->size. */
8356 value += signed_addend;
8357
8358 signed_addend = value;
8359 signed_addend >>= howto->rightshift;
8360
8361 /* A branch to an undefined weak symbol is turned into a jump to
8362 the next instruction unless a PLT entry will be created.
8363 Do the same for local undefined symbols (but not for STN_UNDEF).
8364 The jump to the next instruction is optimized as a NOP depending
8365 on the architecture. */
8366 if (h ? (h->root.type == bfd_link_hash_undefweak
8367 && plt_offset == (bfd_vma) -1)
8368 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
8369 {
8370 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
8371
8372 if (arch_has_arm_nop (globals))
8373 value |= 0x0320f000;
8374 else
8375 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
8376 }
8377 else
8378 {
8379 /* Perform a signed range check. */
8380 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
8381 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
8382 return bfd_reloc_overflow;
8383
8384 addend = (value & 2);
8385
8386 value = (signed_addend & howto->dst_mask)
8387 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
8388
8389 if (r_type == R_ARM_CALL)
8390 {
8391 /* Set the H bit in the BLX instruction. */
8392 if (branch_type == ST_BRANCH_TO_THUMB)
8393 {
8394 if (addend)
8395 value |= (1 << 24);
8396 else
8397 value &= ~(bfd_vma)(1 << 24);
8398 }
8399
8400 /* Select the correct instruction (BL or BLX). */
8401 /* Only if we are not handling a BL to a stub. In this
8402 case, mode switching is performed by the stub. */
8403 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
8404 value |= (1 << 28);
8405 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
8406 {
8407 value &= ~(bfd_vma)(1 << 28);
8408 value |= (1 << 24);
8409 }
8410 }
8411 }
8412 }
8413 break;
8414
8415 case R_ARM_ABS32:
8416 value += addend;
8417 if (branch_type == ST_BRANCH_TO_THUMB)
8418 value |= 1;
8419 break;
8420
8421 case R_ARM_ABS32_NOI:
8422 value += addend;
8423 break;
8424
8425 case R_ARM_REL32:
8426 value += addend;
8427 if (branch_type == ST_BRANCH_TO_THUMB)
8428 value |= 1;
8429 value -= (input_section->output_section->vma
8430 + input_section->output_offset + rel->r_offset);
8431 break;
8432
8433 case R_ARM_REL32_NOI:
8434 value += addend;
8435 value -= (input_section->output_section->vma
8436 + input_section->output_offset + rel->r_offset);
8437 break;
8438
8439 case R_ARM_PREL31:
8440 value -= (input_section->output_section->vma
8441 + input_section->output_offset + rel->r_offset);
8442 value += signed_addend;
8443 if (! h || h->root.type != bfd_link_hash_undefweak)
8444 {
8445 /* Check for overflow. */
8446 if ((value ^ (value >> 1)) & (1 << 30))
8447 return bfd_reloc_overflow;
8448 }
8449 value &= 0x7fffffff;
8450 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
8451 if (branch_type == ST_BRANCH_TO_THUMB)
8452 value |= 1;
8453 break;
8454 }
8455
8456 bfd_put_32 (input_bfd, value, hit_data);
8457 return bfd_reloc_ok;
8458
8459 case R_ARM_ABS8:
8460 value += addend;
8461
8462 /* There is no way to tell whether the user intended to use a signed or
8463 unsigned addend. When checking for overflow we accept either,
8464 as specified by the AAELF. */
8465 if ((long) value > 0xff || (long) value < -0x80)
8466 return bfd_reloc_overflow;
8467
8468 bfd_put_8 (input_bfd, value, hit_data);
8469 return bfd_reloc_ok;
8470
8471 case R_ARM_ABS16:
8472 value += addend;
8473
8474 /* See comment for R_ARM_ABS8. */
8475 if ((long) value > 0xffff || (long) value < -0x8000)
8476 return bfd_reloc_overflow;
8477
8478 bfd_put_16 (input_bfd, value, hit_data);
8479 return bfd_reloc_ok;
8480
8481 case R_ARM_THM_ABS5:
8482 /* Support ldr and str instructions for the thumb. */
8483 if (globals->use_rel)
8484 {
8485 /* Need to refetch addend. */
8486 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
8487 /* ??? Need to determine shift amount from operand size. */
8488 addend >>= howto->rightshift;
8489 }
8490 value += addend;
8491
8492 /* ??? Isn't value unsigned? */
8493 if ((long) value > 0x1f || (long) value < -0x10)
8494 return bfd_reloc_overflow;
8495
8496 /* ??? Value needs to be properly shifted into place first. */
8497 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
8498 bfd_put_16 (input_bfd, value, hit_data);
8499 return bfd_reloc_ok;
8500
8501 case R_ARM_THM_ALU_PREL_11_0:
8502 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
8503 {
8504 bfd_vma insn;
8505 bfd_signed_vma relocation;
8506
8507 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
8508 | bfd_get_16 (input_bfd, hit_data + 2);
8509
8510 if (globals->use_rel)
8511 {
8512 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
8513 | ((insn & (1 << 26)) >> 15);
8514 if (insn & 0xf00000)
8515 signed_addend = -signed_addend;
8516 }
8517
8518 relocation = value + signed_addend;
8519 relocation -= (input_section->output_section->vma
8520 + input_section->output_offset
8521 + rel->r_offset);
8522
8523 value = abs (relocation);
8524
8525 if (value >= 0x1000)
8526 return bfd_reloc_overflow;
8527
8528 insn = (insn & 0xfb0f8f00) | (value & 0xff)
8529 | ((value & 0x700) << 4)
8530 | ((value & 0x800) << 15);
8531 if (relocation < 0)
8532 insn |= 0xa00000;
8533
8534 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8535 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8536
8537 return bfd_reloc_ok;
8538 }
8539
8540 case R_ARM_THM_PC8:
8541 /* PR 10073: This reloc is not generated by the GNU toolchain,
8542 but it is supported for compatibility with third party libraries
8543 generated by other compilers, specifically the ARM/IAR. */
8544 {
8545 bfd_vma insn;
8546 bfd_signed_vma relocation;
8547
8548 insn = bfd_get_16 (input_bfd, hit_data);
8549
8550 if (globals->use_rel)
8551 addend = (insn & 0x00ff) << 2;
8552
8553 relocation = value + addend;
8554 relocation -= (input_section->output_section->vma
8555 + input_section->output_offset
8556 + rel->r_offset);
8557
8558 value = abs (relocation);
8559
8560 /* We do not check for overflow of this reloc. Although strictly
8561 speaking this is incorrect, it appears to be necessary in order
8562 to work with IAR generated relocs. Since GCC and GAS do not
8563 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
8564 a problem for them. */
8565 value &= 0x3fc;
8566
8567 insn = (insn & 0xff00) | (value >> 2);
8568
8569 bfd_put_16 (input_bfd, insn, hit_data);
8570
8571 return bfd_reloc_ok;
8572 }
8573
8574 case R_ARM_THM_PC12:
8575 /* Corresponds to: ldr.w reg, [pc, #offset]. */
8576 {
8577 bfd_vma insn;
8578 bfd_signed_vma relocation;
8579
8580 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
8581 | bfd_get_16 (input_bfd, hit_data + 2);
8582
8583 if (globals->use_rel)
8584 {
8585 signed_addend = insn & 0xfff;
8586 if (!(insn & (1 << 23)))
8587 signed_addend = -signed_addend;
8588 }
8589
8590 relocation = value + signed_addend;
8591 relocation -= (input_section->output_section->vma
8592 + input_section->output_offset
8593 + rel->r_offset);
8594
8595 value = abs (relocation);
8596
8597 if (value >= 0x1000)
8598 return bfd_reloc_overflow;
8599
8600 insn = (insn & 0xff7ff000) | value;
8601 if (relocation >= 0)
8602 insn |= (1 << 23);
8603
8604 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8605 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8606
8607 return bfd_reloc_ok;
8608 }
8609
8610 case R_ARM_THM_XPC22:
8611 case R_ARM_THM_CALL:
8612 case R_ARM_THM_JUMP24:
8613 /* Thumb BL (branch long instruction). */
8614 {
8615 bfd_vma relocation;
8616 bfd_vma reloc_sign;
8617 bfd_boolean overflow = FALSE;
8618 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
8619 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
8620 bfd_signed_vma reloc_signed_max;
8621 bfd_signed_vma reloc_signed_min;
8622 bfd_vma check;
8623 bfd_signed_vma signed_check;
8624 int bitsize;
8625 const int thumb2 = using_thumb2 (globals);
8626
8627 /* A branch to an undefined weak symbol is turned into a jump to
8628 the next instruction unless a PLT entry will be created.
8629 The jump to the next instruction is optimized as a NOP.W for
8630 Thumb-2 enabled architectures. */
8631 if (h && h->root.type == bfd_link_hash_undefweak
8632 && plt_offset == (bfd_vma) -1)
8633 {
8634 if (arch_has_thumb2_nop (globals))
8635 {
8636 bfd_put_16 (input_bfd, 0xf3af, hit_data);
8637 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
8638 }
8639 else
8640 {
8641 bfd_put_16 (input_bfd, 0xe000, hit_data);
8642 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
8643 }
8644 return bfd_reloc_ok;
8645 }
8646
8647 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
8648 with Thumb-1) involving the J1 and J2 bits. */
8649 if (globals->use_rel)
8650 {
8651 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
8652 bfd_vma upper = upper_insn & 0x3ff;
8653 bfd_vma lower = lower_insn & 0x7ff;
8654 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
8655 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
8656 bfd_vma i1 = j1 ^ s ? 0 : 1;
8657 bfd_vma i2 = j2 ^ s ? 0 : 1;
8658
8659 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
8660 /* Sign extend. */
8661 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
8662
8663 signed_addend = addend;
8664 }
8665
8666 if (r_type == R_ARM_THM_XPC22)
8667 {
8668 /* Check for Thumb to Thumb call. */
8669 /* FIXME: Should we translate the instruction into a BL
8670 instruction instead ? */
8671 if (branch_type == ST_BRANCH_TO_THUMB)
8672 (*_bfd_error_handler)
8673 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
8674 input_bfd,
8675 h ? h->root.root.string : "(local)");
8676 }
8677 else
8678 {
8679 /* If it is not a call to Thumb, assume call to Arm.
8680 If it is a call relative to a section name, then it is not a
8681 function call at all, but rather a long jump. Calls through
8682 the PLT do not require stubs. */
8683 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
8684 {
8685 if (globals->use_blx && r_type == R_ARM_THM_CALL)
8686 {
8687 /* Convert BL to BLX. */
8688 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8689 }
8690 else if (( r_type != R_ARM_THM_CALL)
8691 && (r_type != R_ARM_THM_JUMP24))
8692 {
8693 if (elf32_thumb_to_arm_stub
8694 (info, sym_name, input_bfd, output_bfd, input_section,
8695 hit_data, sym_sec, rel->r_offset, signed_addend, value,
8696 error_message))
8697 return bfd_reloc_ok;
8698 else
8699 return bfd_reloc_dangerous;
8700 }
8701 }
8702 else if (branch_type == ST_BRANCH_TO_THUMB
8703 && globals->use_blx
8704 && r_type == R_ARM_THM_CALL)
8705 {
8706 /* Make sure this is a BL. */
8707 lower_insn |= 0x1800;
8708 }
8709 }
8710
8711 enum elf32_arm_stub_type stub_type = arm_stub_none;
8712 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
8713 {
8714 /* Check if a stub has to be inserted because the destination
8715 is too far. */
8716 struct elf32_arm_stub_hash_entry *stub_entry;
8717 struct elf32_arm_link_hash_entry *hash;
8718
8719 hash = (struct elf32_arm_link_hash_entry *) h;
8720
8721 stub_type = arm_type_of_stub (info, input_section, rel,
8722 st_type, &branch_type,
8723 hash, value, sym_sec,
8724 input_bfd, sym_name);
8725
8726 if (stub_type != arm_stub_none)
8727 {
8728 /* The target is out of reach or we are changing modes, so
8729 redirect the branch to the local stub for this
8730 function. */
8731 stub_entry = elf32_arm_get_stub_entry (input_section,
8732 sym_sec, h,
8733 rel, globals,
8734 stub_type);
8735 if (stub_entry != NULL)
8736 {
8737 value = (stub_entry->stub_offset
8738 + stub_entry->stub_sec->output_offset
8739 + stub_entry->stub_sec->output_section->vma);
8740
8741 if (plt_offset != (bfd_vma) -1)
8742 *unresolved_reloc_p = FALSE;
8743 }
8744
8745 /* If this call becomes a call to Arm, force BLX. */
8746 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
8747 {
8748 if ((stub_entry
8749 && !arm_stub_is_thumb (stub_entry->stub_type))
8750 || branch_type != ST_BRANCH_TO_THUMB)
8751 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8752 }
8753 }
8754 }
8755
8756 /* Handle calls via the PLT. */
8757 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
8758 {
8759 value = (splt->output_section->vma
8760 + splt->output_offset
8761 + plt_offset);
8762
8763 if (globals->use_blx && r_type == R_ARM_THM_CALL)
8764 {
8765 /* If the Thumb BLX instruction is available, convert
8766 the BL to a BLX instruction to call the ARM-mode
8767 PLT entry. */
8768 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8769 branch_type = ST_BRANCH_TO_ARM;
8770 }
8771 else
8772 {
8773 /* Target the Thumb stub before the ARM PLT entry. */
8774 value -= PLT_THUMB_STUB_SIZE;
8775 branch_type = ST_BRANCH_TO_THUMB;
8776 }
8777 *unresolved_reloc_p = FALSE;
8778 }
8779
8780 relocation = value + signed_addend;
8781
8782 relocation -= (input_section->output_section->vma
8783 + input_section->output_offset
8784 + rel->r_offset);
8785
8786 check = relocation >> howto->rightshift;
8787
8788 /* If this is a signed value, the rightshift just dropped
8789 leading 1 bits (assuming twos complement). */
8790 if ((bfd_signed_vma) relocation >= 0)
8791 signed_check = check;
8792 else
8793 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
8794
8795 /* Calculate the permissable maximum and minimum values for
8796 this relocation according to whether we're relocating for
8797 Thumb-2 or not. */
8798 bitsize = howto->bitsize;
8799 if (!thumb2)
8800 bitsize -= 2;
8801 reloc_signed_max = (1 << (bitsize - 1)) - 1;
8802 reloc_signed_min = ~reloc_signed_max;
8803
8804 /* Assumes two's complement. */
8805 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
8806 overflow = TRUE;
8807
8808 if ((lower_insn & 0x5000) == 0x4000)
8809 /* For a BLX instruction, make sure that the relocation is rounded up
8810 to a word boundary. This follows the semantics of the instruction
8811 which specifies that bit 1 of the target address will come from bit
8812 1 of the base address. */
8813 relocation = (relocation + 2) & ~ 3;
8814
8815 /* Put RELOCATION back into the insn. Assumes two's complement.
8816 We use the Thumb-2 encoding, which is safe even if dealing with
8817 a Thumb-1 instruction by virtue of our overflow check above. */
8818 reloc_sign = (signed_check < 0) ? 1 : 0;
8819 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
8820 | ((relocation >> 12) & 0x3ff)
8821 | (reloc_sign << 10);
8822 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
8823 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
8824 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
8825 | ((relocation >> 1) & 0x7ff);
8826
8827 /* Put the relocated value back in the object file: */
8828 bfd_put_16 (input_bfd, upper_insn, hit_data);
8829 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
8830
8831 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
8832 }
8833 break;
8834
8835 case R_ARM_THM_JUMP19:
8836 /* Thumb32 conditional branch instruction. */
8837 {
8838 bfd_vma relocation;
8839 bfd_boolean overflow = FALSE;
8840 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
8841 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
8842 bfd_signed_vma reloc_signed_max = 0xffffe;
8843 bfd_signed_vma reloc_signed_min = -0x100000;
8844 bfd_signed_vma signed_check;
8845
8846 /* Need to refetch the addend, reconstruct the top three bits,
8847 and squish the two 11 bit pieces together. */
8848 if (globals->use_rel)
8849 {
8850 bfd_vma S = (upper_insn & 0x0400) >> 10;
8851 bfd_vma upper = (upper_insn & 0x003f);
8852 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
8853 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
8854 bfd_vma lower = (lower_insn & 0x07ff);
8855
8856 upper |= J1 << 6;
8857 upper |= J2 << 7;
8858 upper |= (!S) << 8;
8859 upper -= 0x0100; /* Sign extend. */
8860
8861 addend = (upper << 12) | (lower << 1);
8862 signed_addend = addend;
8863 }
8864
8865 /* Handle calls via the PLT. */
8866 if (plt_offset != (bfd_vma) -1)
8867 {
8868 value = (splt->output_section->vma
8869 + splt->output_offset
8870 + plt_offset);
8871 /* Target the Thumb stub before the ARM PLT entry. */
8872 value -= PLT_THUMB_STUB_SIZE;
8873 *unresolved_reloc_p = FALSE;
8874 }
8875
8876 /* ??? Should handle interworking? GCC might someday try to
8877 use this for tail calls. */
8878
8879 relocation = value + signed_addend;
8880 relocation -= (input_section->output_section->vma
8881 + input_section->output_offset
8882 + rel->r_offset);
8883 signed_check = (bfd_signed_vma) relocation;
8884
8885 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
8886 overflow = TRUE;
8887
8888 /* Put RELOCATION back into the insn. */
8889 {
8890 bfd_vma S = (relocation & 0x00100000) >> 20;
8891 bfd_vma J2 = (relocation & 0x00080000) >> 19;
8892 bfd_vma J1 = (relocation & 0x00040000) >> 18;
8893 bfd_vma hi = (relocation & 0x0003f000) >> 12;
8894 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
8895
8896 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
8897 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
8898 }
8899
8900 /* Put the relocated value back in the object file: */
8901 bfd_put_16 (input_bfd, upper_insn, hit_data);
8902 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
8903
8904 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
8905 }
8906
8907 case R_ARM_THM_JUMP11:
8908 case R_ARM_THM_JUMP8:
8909 case R_ARM_THM_JUMP6:
8910 /* Thumb B (branch) instruction). */
8911 {
8912 bfd_signed_vma relocation;
8913 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
8914 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
8915 bfd_signed_vma signed_check;
8916
8917 /* CZB cannot jump backward. */
8918 if (r_type == R_ARM_THM_JUMP6)
8919 reloc_signed_min = 0;
8920
8921 if (globals->use_rel)
8922 {
8923 /* Need to refetch addend. */
8924 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
8925 if (addend & ((howto->src_mask + 1) >> 1))
8926 {
8927 signed_addend = -1;
8928 signed_addend &= ~ howto->src_mask;
8929 signed_addend |= addend;
8930 }
8931 else
8932 signed_addend = addend;
8933 /* The value in the insn has been right shifted. We need to
8934 undo this, so that we can perform the address calculation
8935 in terms of bytes. */
8936 signed_addend <<= howto->rightshift;
8937 }
8938 relocation = value + signed_addend;
8939
8940 relocation -= (input_section->output_section->vma
8941 + input_section->output_offset
8942 + rel->r_offset);
8943
8944 relocation >>= howto->rightshift;
8945 signed_check = relocation;
8946
8947 if (r_type == R_ARM_THM_JUMP6)
8948 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
8949 else
8950 relocation &= howto->dst_mask;
8951 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
8952
8953 bfd_put_16 (input_bfd, relocation, hit_data);
8954
8955 /* Assumes two's complement. */
8956 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
8957 return bfd_reloc_overflow;
8958
8959 return bfd_reloc_ok;
8960 }
8961
8962 case R_ARM_ALU_PCREL7_0:
8963 case R_ARM_ALU_PCREL15_8:
8964 case R_ARM_ALU_PCREL23_15:
8965 {
8966 bfd_vma insn;
8967 bfd_vma relocation;
8968
8969 insn = bfd_get_32 (input_bfd, hit_data);
8970 if (globals->use_rel)
8971 {
8972 /* Extract the addend. */
8973 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
8974 signed_addend = addend;
8975 }
8976 relocation = value + signed_addend;
8977
8978 relocation -= (input_section->output_section->vma
8979 + input_section->output_offset
8980 + rel->r_offset);
8981 insn = (insn & ~0xfff)
8982 | ((howto->bitpos << 7) & 0xf00)
8983 | ((relocation >> howto->bitpos) & 0xff);
8984 bfd_put_32 (input_bfd, value, hit_data);
8985 }
8986 return bfd_reloc_ok;
8987
8988 case R_ARM_GNU_VTINHERIT:
8989 case R_ARM_GNU_VTENTRY:
8990 return bfd_reloc_ok;
8991
8992 case R_ARM_GOTOFF32:
8993 /* Relocation is relative to the start of the
8994 global offset table. */
8995
8996 BFD_ASSERT (sgot != NULL);
8997 if (sgot == NULL)
8998 return bfd_reloc_notsupported;
8999
9000 /* If we are addressing a Thumb function, we need to adjust the
9001 address by one, so that attempts to call the function pointer will
9002 correctly interpret it as Thumb code. */
9003 if (branch_type == ST_BRANCH_TO_THUMB)
9004 value += 1;
9005
9006 /* Note that sgot->output_offset is not involved in this
9007 calculation. We always want the start of .got. If we
9008 define _GLOBAL_OFFSET_TABLE in a different way, as is
9009 permitted by the ABI, we might have to change this
9010 calculation. */
9011 value -= sgot->output_section->vma;
9012 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9013 contents, rel->r_offset, value,
9014 rel->r_addend);
9015
9016 case R_ARM_GOTPC:
9017 /* Use global offset table as symbol value. */
9018 BFD_ASSERT (sgot != NULL);
9019
9020 if (sgot == NULL)
9021 return bfd_reloc_notsupported;
9022
9023 *unresolved_reloc_p = FALSE;
9024 value = sgot->output_section->vma;
9025 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9026 contents, rel->r_offset, value,
9027 rel->r_addend);
9028
9029 case R_ARM_GOT32:
9030 case R_ARM_GOT_PREL:
9031 /* Relocation is to the entry for this symbol in the
9032 global offset table. */
9033 if (sgot == NULL)
9034 return bfd_reloc_notsupported;
9035
9036 if (dynreloc_st_type == STT_GNU_IFUNC
9037 && plt_offset != (bfd_vma) -1
9038 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
9039 {
9040 /* We have a relocation against a locally-binding STT_GNU_IFUNC
9041 symbol, and the relocation resolves directly to the runtime
9042 target rather than to the .iplt entry. This means that any
9043 .got entry would be the same value as the .igot.plt entry,
9044 so there's no point creating both. */
9045 sgot = globals->root.igotplt;
9046 value = sgot->output_offset + gotplt_offset;
9047 }
9048 else if (h != NULL)
9049 {
9050 bfd_vma off;
9051
9052 off = h->got.offset;
9053 BFD_ASSERT (off != (bfd_vma) -1);
9054 if ((off & 1) != 0)
9055 {
9056 /* We have already processsed one GOT relocation against
9057 this symbol. */
9058 off &= ~1;
9059 if (globals->root.dynamic_sections_created
9060 && !SYMBOL_REFERENCES_LOCAL (info, h))
9061 *unresolved_reloc_p = FALSE;
9062 }
9063 else
9064 {
9065 Elf_Internal_Rela outrel;
9066
9067 if (!SYMBOL_REFERENCES_LOCAL (info, h))
9068 {
9069 /* If the symbol doesn't resolve locally in a static
9070 object, we have an undefined reference. If the
9071 symbol doesn't resolve locally in a dynamic object,
9072 it should be resolved by the dynamic linker. */
9073 if (globals->root.dynamic_sections_created)
9074 {
9075 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
9076 *unresolved_reloc_p = FALSE;
9077 }
9078 else
9079 outrel.r_info = 0;
9080 outrel.r_addend = 0;
9081 }
9082 else
9083 {
9084 if (dynreloc_st_type == STT_GNU_IFUNC)
9085 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9086 else if (info->shared)
9087 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
9088 else
9089 outrel.r_info = 0;
9090 outrel.r_addend = dynreloc_value;
9091 }
9092
9093 /* The GOT entry is initialized to zero by default.
9094 See if we should install a different value. */
9095 if (outrel.r_addend != 0
9096 && (outrel.r_info == 0 || globals->use_rel))
9097 {
9098 bfd_put_32 (output_bfd, outrel.r_addend,
9099 sgot->contents + off);
9100 outrel.r_addend = 0;
9101 }
9102
9103 if (outrel.r_info != 0)
9104 {
9105 outrel.r_offset = (sgot->output_section->vma
9106 + sgot->output_offset
9107 + off);
9108 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9109 }
9110 h->got.offset |= 1;
9111 }
9112 value = sgot->output_offset + off;
9113 }
9114 else
9115 {
9116 bfd_vma off;
9117
9118 BFD_ASSERT (local_got_offsets != NULL &&
9119 local_got_offsets[r_symndx] != (bfd_vma) -1);
9120
9121 off = local_got_offsets[r_symndx];
9122
9123 /* The offset must always be a multiple of 4. We use the
9124 least significant bit to record whether we have already
9125 generated the necessary reloc. */
9126 if ((off & 1) != 0)
9127 off &= ~1;
9128 else
9129 {
9130 if (globals->use_rel)
9131 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
9132
9133 if (info->shared || dynreloc_st_type == STT_GNU_IFUNC)
9134 {
9135 Elf_Internal_Rela outrel;
9136
9137 outrel.r_addend = addend + dynreloc_value;
9138 outrel.r_offset = (sgot->output_section->vma
9139 + sgot->output_offset
9140 + off);
9141 if (dynreloc_st_type == STT_GNU_IFUNC)
9142 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9143 else
9144 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
9145 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9146 }
9147
9148 local_got_offsets[r_symndx] |= 1;
9149 }
9150
9151 value = sgot->output_offset + off;
9152 }
9153 if (r_type != R_ARM_GOT32)
9154 value += sgot->output_section->vma;
9155
9156 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9157 contents, rel->r_offset, value,
9158 rel->r_addend);
9159
9160 case R_ARM_TLS_LDO32:
9161 value = value - dtpoff_base (info);
9162
9163 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9164 contents, rel->r_offset, value,
9165 rel->r_addend);
9166
9167 case R_ARM_TLS_LDM32:
9168 {
9169 bfd_vma off;
9170
9171 if (sgot == NULL)
9172 abort ();
9173
9174 off = globals->tls_ldm_got.offset;
9175
9176 if ((off & 1) != 0)
9177 off &= ~1;
9178 else
9179 {
9180 /* If we don't know the module number, create a relocation
9181 for it. */
9182 if (info->shared)
9183 {
9184 Elf_Internal_Rela outrel;
9185
9186 if (srelgot == NULL)
9187 abort ();
9188
9189 outrel.r_addend = 0;
9190 outrel.r_offset = (sgot->output_section->vma
9191 + sgot->output_offset + off);
9192 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
9193
9194 if (globals->use_rel)
9195 bfd_put_32 (output_bfd, outrel.r_addend,
9196 sgot->contents + off);
9197
9198 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9199 }
9200 else
9201 bfd_put_32 (output_bfd, 1, sgot->contents + off);
9202
9203 globals->tls_ldm_got.offset |= 1;
9204 }
9205
9206 value = sgot->output_section->vma + sgot->output_offset + off
9207 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
9208
9209 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9210 contents, rel->r_offset, value,
9211 rel->r_addend);
9212 }
9213
9214 case R_ARM_TLS_CALL:
9215 case R_ARM_THM_TLS_CALL:
9216 case R_ARM_TLS_GD32:
9217 case R_ARM_TLS_IE32:
9218 case R_ARM_TLS_GOTDESC:
9219 case R_ARM_TLS_DESCSEQ:
9220 case R_ARM_THM_TLS_DESCSEQ:
9221 {
9222 bfd_vma off, offplt;
9223 int indx = 0;
9224 char tls_type;
9225
9226 BFD_ASSERT (sgot != NULL);
9227
9228 if (h != NULL)
9229 {
9230 bfd_boolean dyn;
9231 dyn = globals->root.dynamic_sections_created;
9232 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
9233 && (!info->shared
9234 || !SYMBOL_REFERENCES_LOCAL (info, h)))
9235 {
9236 *unresolved_reloc_p = FALSE;
9237 indx = h->dynindx;
9238 }
9239 off = h->got.offset;
9240 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
9241 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
9242 }
9243 else
9244 {
9245 BFD_ASSERT (local_got_offsets != NULL);
9246 off = local_got_offsets[r_symndx];
9247 offplt = local_tlsdesc_gotents[r_symndx];
9248 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
9249 }
9250
9251 /* Linker relaxations happens from one of the
9252 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
9253 if (ELF32_R_TYPE(rel->r_info) != r_type)
9254 tls_type = GOT_TLS_IE;
9255
9256 BFD_ASSERT (tls_type != GOT_UNKNOWN);
9257
9258 if ((off & 1) != 0)
9259 off &= ~1;
9260 else
9261 {
9262 bfd_boolean need_relocs = FALSE;
9263 Elf_Internal_Rela outrel;
9264 int cur_off = off;
9265
9266 /* The GOT entries have not been initialized yet. Do it
9267 now, and emit any relocations. If both an IE GOT and a
9268 GD GOT are necessary, we emit the GD first. */
9269
9270 if ((info->shared || indx != 0)
9271 && (h == NULL
9272 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
9273 || h->root.type != bfd_link_hash_undefweak))
9274 {
9275 need_relocs = TRUE;
9276 BFD_ASSERT (srelgot != NULL);
9277 }
9278
9279 if (tls_type & GOT_TLS_GDESC)
9280 {
9281 bfd_byte *loc;
9282
9283 /* We should have relaxed, unless this is an undefined
9284 weak symbol. */
9285 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
9286 || info->shared);
9287 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
9288 <= globals->root.sgotplt->size);
9289
9290 outrel.r_addend = 0;
9291 outrel.r_offset = (globals->root.sgotplt->output_section->vma
9292 + globals->root.sgotplt->output_offset
9293 + offplt
9294 + globals->sgotplt_jump_table_size);
9295
9296 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
9297 sreloc = globals->root.srelplt;
9298 loc = sreloc->contents;
9299 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
9300 BFD_ASSERT (loc + RELOC_SIZE (globals)
9301 <= sreloc->contents + sreloc->size);
9302
9303 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
9304
9305 /* For globals, the first word in the relocation gets
9306 the relocation index and the top bit set, or zero,
9307 if we're binding now. For locals, it gets the
9308 symbol's offset in the tls section. */
9309 bfd_put_32 (output_bfd,
9310 !h ? value - elf_hash_table (info)->tls_sec->vma
9311 : info->flags & DF_BIND_NOW ? 0
9312 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
9313 globals->root.sgotplt->contents + offplt +
9314 globals->sgotplt_jump_table_size);
9315
9316 /* Second word in the relocation is always zero. */
9317 bfd_put_32 (output_bfd, 0,
9318 globals->root.sgotplt->contents + offplt +
9319 globals->sgotplt_jump_table_size + 4);
9320 }
9321 if (tls_type & GOT_TLS_GD)
9322 {
9323 if (need_relocs)
9324 {
9325 outrel.r_addend = 0;
9326 outrel.r_offset = (sgot->output_section->vma
9327 + sgot->output_offset
9328 + cur_off);
9329 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
9330
9331 if (globals->use_rel)
9332 bfd_put_32 (output_bfd, outrel.r_addend,
9333 sgot->contents + cur_off);
9334
9335 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9336
9337 if (indx == 0)
9338 bfd_put_32 (output_bfd, value - dtpoff_base (info),
9339 sgot->contents + cur_off + 4);
9340 else
9341 {
9342 outrel.r_addend = 0;
9343 outrel.r_info = ELF32_R_INFO (indx,
9344 R_ARM_TLS_DTPOFF32);
9345 outrel.r_offset += 4;
9346
9347 if (globals->use_rel)
9348 bfd_put_32 (output_bfd, outrel.r_addend,
9349 sgot->contents + cur_off + 4);
9350
9351 elf32_arm_add_dynreloc (output_bfd, info,
9352 srelgot, &outrel);
9353 }
9354 }
9355 else
9356 {
9357 /* If we are not emitting relocations for a
9358 general dynamic reference, then we must be in a
9359 static link or an executable link with the
9360 symbol binding locally. Mark it as belonging
9361 to module 1, the executable. */
9362 bfd_put_32 (output_bfd, 1,
9363 sgot->contents + cur_off);
9364 bfd_put_32 (output_bfd, value - dtpoff_base (info),
9365 sgot->contents + cur_off + 4);
9366 }
9367
9368 cur_off += 8;
9369 }
9370
9371 if (tls_type & GOT_TLS_IE)
9372 {
9373 if (need_relocs)
9374 {
9375 if (indx == 0)
9376 outrel.r_addend = value - dtpoff_base (info);
9377 else
9378 outrel.r_addend = 0;
9379 outrel.r_offset = (sgot->output_section->vma
9380 + sgot->output_offset
9381 + cur_off);
9382 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
9383
9384 if (globals->use_rel)
9385 bfd_put_32 (output_bfd, outrel.r_addend,
9386 sgot->contents + cur_off);
9387
9388 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9389 }
9390 else
9391 bfd_put_32 (output_bfd, tpoff (info, value),
9392 sgot->contents + cur_off);
9393 cur_off += 4;
9394 }
9395
9396 if (h != NULL)
9397 h->got.offset |= 1;
9398 else
9399 local_got_offsets[r_symndx] |= 1;
9400 }
9401
9402 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
9403 off += 8;
9404 else if (tls_type & GOT_TLS_GDESC)
9405 off = offplt;
9406
9407 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
9408 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
9409 {
9410 bfd_signed_vma offset;
9411 /* TLS stubs are arm mode. The original symbol is a
9412 data object, so branch_type is bogus. */
9413 branch_type = ST_BRANCH_TO_ARM;
9414 enum elf32_arm_stub_type stub_type
9415 = arm_type_of_stub (info, input_section, rel,
9416 st_type, &branch_type,
9417 (struct elf32_arm_link_hash_entry *)h,
9418 globals->tls_trampoline, globals->root.splt,
9419 input_bfd, sym_name);
9420
9421 if (stub_type != arm_stub_none)
9422 {
9423 struct elf32_arm_stub_hash_entry *stub_entry
9424 = elf32_arm_get_stub_entry
9425 (input_section, globals->root.splt, 0, rel,
9426 globals, stub_type);
9427 offset = (stub_entry->stub_offset
9428 + stub_entry->stub_sec->output_offset
9429 + stub_entry->stub_sec->output_section->vma);
9430 }
9431 else
9432 offset = (globals->root.splt->output_section->vma
9433 + globals->root.splt->output_offset
9434 + globals->tls_trampoline);
9435
9436 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
9437 {
9438 unsigned long inst;
9439
9440 offset -= (input_section->output_section->vma +
9441 input_section->output_offset + rel->r_offset + 8);
9442
9443 inst = offset >> 2;
9444 inst &= 0x00ffffff;
9445 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
9446 }
9447 else
9448 {
9449 /* Thumb blx encodes the offset in a complicated
9450 fashion. */
9451 unsigned upper_insn, lower_insn;
9452 unsigned neg;
9453
9454 offset -= (input_section->output_section->vma +
9455 input_section->output_offset
9456 + rel->r_offset + 4);
9457
9458 if (stub_type != arm_stub_none
9459 && arm_stub_is_thumb (stub_type))
9460 {
9461 lower_insn = 0xd000;
9462 }
9463 else
9464 {
9465 lower_insn = 0xc000;
9466 /* Round up the offset to a word boundary */
9467 offset = (offset + 2) & ~2;
9468 }
9469
9470 neg = offset < 0;
9471 upper_insn = (0xf000
9472 | ((offset >> 12) & 0x3ff)
9473 | (neg << 10));
9474 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
9475 | (((!((offset >> 22) & 1)) ^ neg) << 11)
9476 | ((offset >> 1) & 0x7ff);
9477 bfd_put_16 (input_bfd, upper_insn, hit_data);
9478 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9479 return bfd_reloc_ok;
9480 }
9481 }
9482 /* These relocations needs special care, as besides the fact
9483 they point somewhere in .gotplt, the addend must be
9484 adjusted accordingly depending on the type of instruction
9485 we refer to */
9486 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
9487 {
9488 unsigned long data, insn;
9489 unsigned thumb;
9490
9491 data = bfd_get_32 (input_bfd, hit_data);
9492 thumb = data & 1;
9493 data &= ~1u;
9494
9495 if (thumb)
9496 {
9497 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
9498 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
9499 insn = (insn << 16)
9500 | bfd_get_16 (input_bfd,
9501 contents + rel->r_offset - data + 2);
9502 if ((insn & 0xf800c000) == 0xf000c000)
9503 /* bl/blx */
9504 value = -6;
9505 else if ((insn & 0xffffff00) == 0x4400)
9506 /* add */
9507 value = -5;
9508 else
9509 {
9510 (*_bfd_error_handler)
9511 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"),
9512 input_bfd, input_section,
9513 (unsigned long)rel->r_offset, insn);
9514 return bfd_reloc_notsupported;
9515 }
9516 }
9517 else
9518 {
9519 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
9520
9521 switch (insn >> 24)
9522 {
9523 case 0xeb: /* bl */
9524 case 0xfa: /* blx */
9525 value = -4;
9526 break;
9527
9528 case 0xe0: /* add */
9529 value = -8;
9530 break;
9531
9532 default:
9533 (*_bfd_error_handler)
9534 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
9535 input_bfd, input_section,
9536 (unsigned long)rel->r_offset, insn);
9537 return bfd_reloc_notsupported;
9538 }
9539 }
9540
9541 value += ((globals->root.sgotplt->output_section->vma
9542 + globals->root.sgotplt->output_offset + off)
9543 - (input_section->output_section->vma
9544 + input_section->output_offset
9545 + rel->r_offset)
9546 + globals->sgotplt_jump_table_size);
9547 }
9548 else
9549 value = ((globals->root.sgot->output_section->vma
9550 + globals->root.sgot->output_offset + off)
9551 - (input_section->output_section->vma
9552 + input_section->output_offset + rel->r_offset));
9553
9554 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9555 contents, rel->r_offset, value,
9556 rel->r_addend);
9557 }
9558
9559 case R_ARM_TLS_LE32:
9560 if (info->shared && !info->pie)
9561 {
9562 (*_bfd_error_handler)
9563 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
9564 input_bfd, input_section,
9565 (long) rel->r_offset, howto->name);
9566 return (bfd_reloc_status_type) FALSE;
9567 }
9568 else
9569 value = tpoff (info, value);
9570
9571 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9572 contents, rel->r_offset, value,
9573 rel->r_addend);
9574
9575 case R_ARM_V4BX:
9576 if (globals->fix_v4bx)
9577 {
9578 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9579
9580 /* Ensure that we have a BX instruction. */
9581 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
9582
9583 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
9584 {
9585 /* Branch to veneer. */
9586 bfd_vma glue_addr;
9587 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
9588 glue_addr -= input_section->output_section->vma
9589 + input_section->output_offset
9590 + rel->r_offset + 8;
9591 insn = (insn & 0xf0000000) | 0x0a000000
9592 | ((glue_addr >> 2) & 0x00ffffff);
9593 }
9594 else
9595 {
9596 /* Preserve Rm (lowest four bits) and the condition code
9597 (highest four bits). Other bits encode MOV PC,Rm. */
9598 insn = (insn & 0xf000000f) | 0x01a0f000;
9599 }
9600
9601 bfd_put_32 (input_bfd, insn, hit_data);
9602 }
9603 return bfd_reloc_ok;
9604
9605 case R_ARM_MOVW_ABS_NC:
9606 case R_ARM_MOVT_ABS:
9607 case R_ARM_MOVW_PREL_NC:
9608 case R_ARM_MOVT_PREL:
9609 /* Until we properly support segment-base-relative addressing then
9610 we assume the segment base to be zero, as for the group relocations.
9611 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
9612 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
9613 case R_ARM_MOVW_BREL_NC:
9614 case R_ARM_MOVW_BREL:
9615 case R_ARM_MOVT_BREL:
9616 {
9617 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9618
9619 if (globals->use_rel)
9620 {
9621 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
9622 signed_addend = (addend ^ 0x8000) - 0x8000;
9623 }
9624
9625 value += signed_addend;
9626
9627 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
9628 value -= (input_section->output_section->vma
9629 + input_section->output_offset + rel->r_offset);
9630
9631 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
9632 return bfd_reloc_overflow;
9633
9634 if (branch_type == ST_BRANCH_TO_THUMB)
9635 value |= 1;
9636
9637 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
9638 || r_type == R_ARM_MOVT_BREL)
9639 value >>= 16;
9640
9641 insn &= 0xfff0f000;
9642 insn |= value & 0xfff;
9643 insn |= (value & 0xf000) << 4;
9644 bfd_put_32 (input_bfd, insn, hit_data);
9645 }
9646 return bfd_reloc_ok;
9647
9648 case R_ARM_THM_MOVW_ABS_NC:
9649 case R_ARM_THM_MOVT_ABS:
9650 case R_ARM_THM_MOVW_PREL_NC:
9651 case R_ARM_THM_MOVT_PREL:
9652 /* Until we properly support segment-base-relative addressing then
9653 we assume the segment base to be zero, as for the above relocations.
9654 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
9655 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
9656 as R_ARM_THM_MOVT_ABS. */
9657 case R_ARM_THM_MOVW_BREL_NC:
9658 case R_ARM_THM_MOVW_BREL:
9659 case R_ARM_THM_MOVT_BREL:
9660 {
9661 bfd_vma insn;
9662
9663 insn = bfd_get_16 (input_bfd, hit_data) << 16;
9664 insn |= bfd_get_16 (input_bfd, hit_data + 2);
9665
9666 if (globals->use_rel)
9667 {
9668 addend = ((insn >> 4) & 0xf000)
9669 | ((insn >> 15) & 0x0800)
9670 | ((insn >> 4) & 0x0700)
9671 | (insn & 0x00ff);
9672 signed_addend = (addend ^ 0x8000) - 0x8000;
9673 }
9674
9675 value += signed_addend;
9676
9677 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
9678 value -= (input_section->output_section->vma
9679 + input_section->output_offset + rel->r_offset);
9680
9681 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
9682 return bfd_reloc_overflow;
9683
9684 if (branch_type == ST_BRANCH_TO_THUMB)
9685 value |= 1;
9686
9687 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
9688 || r_type == R_ARM_THM_MOVT_BREL)
9689 value >>= 16;
9690
9691 insn &= 0xfbf08f00;
9692 insn |= (value & 0xf000) << 4;
9693 insn |= (value & 0x0800) << 15;
9694 insn |= (value & 0x0700) << 4;
9695 insn |= (value & 0x00ff);
9696
9697 bfd_put_16 (input_bfd, insn >> 16, hit_data);
9698 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
9699 }
9700 return bfd_reloc_ok;
9701
9702 case R_ARM_ALU_PC_G0_NC:
9703 case R_ARM_ALU_PC_G1_NC:
9704 case R_ARM_ALU_PC_G0:
9705 case R_ARM_ALU_PC_G1:
9706 case R_ARM_ALU_PC_G2:
9707 case R_ARM_ALU_SB_G0_NC:
9708 case R_ARM_ALU_SB_G1_NC:
9709 case R_ARM_ALU_SB_G0:
9710 case R_ARM_ALU_SB_G1:
9711 case R_ARM_ALU_SB_G2:
9712 {
9713 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9714 bfd_vma pc = input_section->output_section->vma
9715 + input_section->output_offset + rel->r_offset;
9716 /* sb should be the origin of the *segment* containing the symbol.
9717 It is not clear how to obtain this OS-dependent value, so we
9718 make an arbitrary choice of zero. */
9719 bfd_vma sb = 0;
9720 bfd_vma residual;
9721 bfd_vma g_n;
9722 bfd_signed_vma signed_value;
9723 int group = 0;
9724
9725 /* Determine which group of bits to select. */
9726 switch (r_type)
9727 {
9728 case R_ARM_ALU_PC_G0_NC:
9729 case R_ARM_ALU_PC_G0:
9730 case R_ARM_ALU_SB_G0_NC:
9731 case R_ARM_ALU_SB_G0:
9732 group = 0;
9733 break;
9734
9735 case R_ARM_ALU_PC_G1_NC:
9736 case R_ARM_ALU_PC_G1:
9737 case R_ARM_ALU_SB_G1_NC:
9738 case R_ARM_ALU_SB_G1:
9739 group = 1;
9740 break;
9741
9742 case R_ARM_ALU_PC_G2:
9743 case R_ARM_ALU_SB_G2:
9744 group = 2;
9745 break;
9746
9747 default:
9748 abort ();
9749 }
9750
9751 /* If REL, extract the addend from the insn. If RELA, it will
9752 have already been fetched for us. */
9753 if (globals->use_rel)
9754 {
9755 int negative;
9756 bfd_vma constant = insn & 0xff;
9757 bfd_vma rotation = (insn & 0xf00) >> 8;
9758
9759 if (rotation == 0)
9760 signed_addend = constant;
9761 else
9762 {
9763 /* Compensate for the fact that in the instruction, the
9764 rotation is stored in multiples of 2 bits. */
9765 rotation *= 2;
9766
9767 /* Rotate "constant" right by "rotation" bits. */
9768 signed_addend = (constant >> rotation) |
9769 (constant << (8 * sizeof (bfd_vma) - rotation));
9770 }
9771
9772 /* Determine if the instruction is an ADD or a SUB.
9773 (For REL, this determines the sign of the addend.) */
9774 negative = identify_add_or_sub (insn);
9775 if (negative == 0)
9776 {
9777 (*_bfd_error_handler)
9778 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
9779 input_bfd, input_section,
9780 (long) rel->r_offset, howto->name);
9781 return bfd_reloc_overflow;
9782 }
9783
9784 signed_addend *= negative;
9785 }
9786
9787 /* Compute the value (X) to go in the place. */
9788 if (r_type == R_ARM_ALU_PC_G0_NC
9789 || r_type == R_ARM_ALU_PC_G1_NC
9790 || r_type == R_ARM_ALU_PC_G0
9791 || r_type == R_ARM_ALU_PC_G1
9792 || r_type == R_ARM_ALU_PC_G2)
9793 /* PC relative. */
9794 signed_value = value - pc + signed_addend;
9795 else
9796 /* Section base relative. */
9797 signed_value = value - sb + signed_addend;
9798
9799 /* If the target symbol is a Thumb function, then set the
9800 Thumb bit in the address. */
9801 if (branch_type == ST_BRANCH_TO_THUMB)
9802 signed_value |= 1;
9803
9804 /* Calculate the value of the relevant G_n, in encoded
9805 constant-with-rotation format. */
9806 g_n = calculate_group_reloc_mask (abs (signed_value), group,
9807 &residual);
9808
9809 /* Check for overflow if required. */
9810 if ((r_type == R_ARM_ALU_PC_G0
9811 || r_type == R_ARM_ALU_PC_G1
9812 || r_type == R_ARM_ALU_PC_G2
9813 || r_type == R_ARM_ALU_SB_G0
9814 || r_type == R_ARM_ALU_SB_G1
9815 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
9816 {
9817 (*_bfd_error_handler)
9818 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
9819 input_bfd, input_section,
9820 (long) rel->r_offset, abs (signed_value), howto->name);
9821 return bfd_reloc_overflow;
9822 }
9823
9824 /* Mask out the value and the ADD/SUB part of the opcode; take care
9825 not to destroy the S bit. */
9826 insn &= 0xff1ff000;
9827
9828 /* Set the opcode according to whether the value to go in the
9829 place is negative. */
9830 if (signed_value < 0)
9831 insn |= 1 << 22;
9832 else
9833 insn |= 1 << 23;
9834
9835 /* Encode the offset. */
9836 insn |= g_n;
9837
9838 bfd_put_32 (input_bfd, insn, hit_data);
9839 }
9840 return bfd_reloc_ok;
9841
9842 case R_ARM_LDR_PC_G0:
9843 case R_ARM_LDR_PC_G1:
9844 case R_ARM_LDR_PC_G2:
9845 case R_ARM_LDR_SB_G0:
9846 case R_ARM_LDR_SB_G1:
9847 case R_ARM_LDR_SB_G2:
9848 {
9849 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9850 bfd_vma pc = input_section->output_section->vma
9851 + input_section->output_offset + rel->r_offset;
9852 bfd_vma sb = 0; /* See note above. */
9853 bfd_vma residual;
9854 bfd_signed_vma signed_value;
9855 int group = 0;
9856
9857 /* Determine which groups of bits to calculate. */
9858 switch (r_type)
9859 {
9860 case R_ARM_LDR_PC_G0:
9861 case R_ARM_LDR_SB_G0:
9862 group = 0;
9863 break;
9864
9865 case R_ARM_LDR_PC_G1:
9866 case R_ARM_LDR_SB_G1:
9867 group = 1;
9868 break;
9869
9870 case R_ARM_LDR_PC_G2:
9871 case R_ARM_LDR_SB_G2:
9872 group = 2;
9873 break;
9874
9875 default:
9876 abort ();
9877 }
9878
9879 /* If REL, extract the addend from the insn. If RELA, it will
9880 have already been fetched for us. */
9881 if (globals->use_rel)
9882 {
9883 int negative = (insn & (1 << 23)) ? 1 : -1;
9884 signed_addend = negative * (insn & 0xfff);
9885 }
9886
9887 /* Compute the value (X) to go in the place. */
9888 if (r_type == R_ARM_LDR_PC_G0
9889 || r_type == R_ARM_LDR_PC_G1
9890 || r_type == R_ARM_LDR_PC_G2)
9891 /* PC relative. */
9892 signed_value = value - pc + signed_addend;
9893 else
9894 /* Section base relative. */
9895 signed_value = value - sb + signed_addend;
9896
9897 /* Calculate the value of the relevant G_{n-1} to obtain
9898 the residual at that stage. */
9899 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
9900
9901 /* Check for overflow. */
9902 if (residual >= 0x1000)
9903 {
9904 (*_bfd_error_handler)
9905 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
9906 input_bfd, input_section,
9907 (long) rel->r_offset, abs (signed_value), howto->name);
9908 return bfd_reloc_overflow;
9909 }
9910
9911 /* Mask out the value and U bit. */
9912 insn &= 0xff7ff000;
9913
9914 /* Set the U bit if the value to go in the place is non-negative. */
9915 if (signed_value >= 0)
9916 insn |= 1 << 23;
9917
9918 /* Encode the offset. */
9919 insn |= residual;
9920
9921 bfd_put_32 (input_bfd, insn, hit_data);
9922 }
9923 return bfd_reloc_ok;
9924
9925 case R_ARM_LDRS_PC_G0:
9926 case R_ARM_LDRS_PC_G1:
9927 case R_ARM_LDRS_PC_G2:
9928 case R_ARM_LDRS_SB_G0:
9929 case R_ARM_LDRS_SB_G1:
9930 case R_ARM_LDRS_SB_G2:
9931 {
9932 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9933 bfd_vma pc = input_section->output_section->vma
9934 + input_section->output_offset + rel->r_offset;
9935 bfd_vma sb = 0; /* See note above. */
9936 bfd_vma residual;
9937 bfd_signed_vma signed_value;
9938 int group = 0;
9939
9940 /* Determine which groups of bits to calculate. */
9941 switch (r_type)
9942 {
9943 case R_ARM_LDRS_PC_G0:
9944 case R_ARM_LDRS_SB_G0:
9945 group = 0;
9946 break;
9947
9948 case R_ARM_LDRS_PC_G1:
9949 case R_ARM_LDRS_SB_G1:
9950 group = 1;
9951 break;
9952
9953 case R_ARM_LDRS_PC_G2:
9954 case R_ARM_LDRS_SB_G2:
9955 group = 2;
9956 break;
9957
9958 default:
9959 abort ();
9960 }
9961
9962 /* If REL, extract the addend from the insn. If RELA, it will
9963 have already been fetched for us. */
9964 if (globals->use_rel)
9965 {
9966 int negative = (insn & (1 << 23)) ? 1 : -1;
9967 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
9968 }
9969
9970 /* Compute the value (X) to go in the place. */
9971 if (r_type == R_ARM_LDRS_PC_G0
9972 || r_type == R_ARM_LDRS_PC_G1
9973 || r_type == R_ARM_LDRS_PC_G2)
9974 /* PC relative. */
9975 signed_value = value - pc + signed_addend;
9976 else
9977 /* Section base relative. */
9978 signed_value = value - sb + signed_addend;
9979
9980 /* Calculate the value of the relevant G_{n-1} to obtain
9981 the residual at that stage. */
9982 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
9983
9984 /* Check for overflow. */
9985 if (residual >= 0x100)
9986 {
9987 (*_bfd_error_handler)
9988 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
9989 input_bfd, input_section,
9990 (long) rel->r_offset, abs (signed_value), howto->name);
9991 return bfd_reloc_overflow;
9992 }
9993
9994 /* Mask out the value and U bit. */
9995 insn &= 0xff7ff0f0;
9996
9997 /* Set the U bit if the value to go in the place is non-negative. */
9998 if (signed_value >= 0)
9999 insn |= 1 << 23;
10000
10001 /* Encode the offset. */
10002 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
10003
10004 bfd_put_32 (input_bfd, insn, hit_data);
10005 }
10006 return bfd_reloc_ok;
10007
10008 case R_ARM_LDC_PC_G0:
10009 case R_ARM_LDC_PC_G1:
10010 case R_ARM_LDC_PC_G2:
10011 case R_ARM_LDC_SB_G0:
10012 case R_ARM_LDC_SB_G1:
10013 case R_ARM_LDC_SB_G2:
10014 {
10015 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10016 bfd_vma pc = input_section->output_section->vma
10017 + input_section->output_offset + rel->r_offset;
10018 bfd_vma sb = 0; /* See note above. */
10019 bfd_vma residual;
10020 bfd_signed_vma signed_value;
10021 int group = 0;
10022
10023 /* Determine which groups of bits to calculate. */
10024 switch (r_type)
10025 {
10026 case R_ARM_LDC_PC_G0:
10027 case R_ARM_LDC_SB_G0:
10028 group = 0;
10029 break;
10030
10031 case R_ARM_LDC_PC_G1:
10032 case R_ARM_LDC_SB_G1:
10033 group = 1;
10034 break;
10035
10036 case R_ARM_LDC_PC_G2:
10037 case R_ARM_LDC_SB_G2:
10038 group = 2;
10039 break;
10040
10041 default:
10042 abort ();
10043 }
10044
10045 /* If REL, extract the addend from the insn. If RELA, it will
10046 have already been fetched for us. */
10047 if (globals->use_rel)
10048 {
10049 int negative = (insn & (1 << 23)) ? 1 : -1;
10050 signed_addend = negative * ((insn & 0xff) << 2);
10051 }
10052
10053 /* Compute the value (X) to go in the place. */
10054 if (r_type == R_ARM_LDC_PC_G0
10055 || r_type == R_ARM_LDC_PC_G1
10056 || r_type == R_ARM_LDC_PC_G2)
10057 /* PC relative. */
10058 signed_value = value - pc + signed_addend;
10059 else
10060 /* Section base relative. */
10061 signed_value = value - sb + signed_addend;
10062
10063 /* Calculate the value of the relevant G_{n-1} to obtain
10064 the residual at that stage. */
10065 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10066
10067 /* Check for overflow. (The absolute value to go in the place must be
10068 divisible by four and, after having been divided by four, must
10069 fit in eight bits.) */
10070 if ((residual & 0x3) != 0 || residual >= 0x400)
10071 {
10072 (*_bfd_error_handler)
10073 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10074 input_bfd, input_section,
10075 (long) rel->r_offset, abs (signed_value), howto->name);
10076 return bfd_reloc_overflow;
10077 }
10078
10079 /* Mask out the value and U bit. */
10080 insn &= 0xff7fff00;
10081
10082 /* Set the U bit if the value to go in the place is non-negative. */
10083 if (signed_value >= 0)
10084 insn |= 1 << 23;
10085
10086 /* Encode the offset. */
10087 insn |= residual >> 2;
10088
10089 bfd_put_32 (input_bfd, insn, hit_data);
10090 }
10091 return bfd_reloc_ok;
10092
10093 default:
10094 return bfd_reloc_notsupported;
10095 }
10096 }
10097
10098 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
10099 static void
10100 arm_add_to_rel (bfd * abfd,
10101 bfd_byte * address,
10102 reloc_howto_type * howto,
10103 bfd_signed_vma increment)
10104 {
10105 bfd_signed_vma addend;
10106
10107 if (howto->type == R_ARM_THM_CALL
10108 || howto->type == R_ARM_THM_JUMP24)
10109 {
10110 int upper_insn, lower_insn;
10111 int upper, lower;
10112
10113 upper_insn = bfd_get_16 (abfd, address);
10114 lower_insn = bfd_get_16 (abfd, address + 2);
10115 upper = upper_insn & 0x7ff;
10116 lower = lower_insn & 0x7ff;
10117
10118 addend = (upper << 12) | (lower << 1);
10119 addend += increment;
10120 addend >>= 1;
10121
10122 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
10123 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
10124
10125 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
10126 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
10127 }
10128 else
10129 {
10130 bfd_vma contents;
10131
10132 contents = bfd_get_32 (abfd, address);
10133
10134 /* Get the (signed) value from the instruction. */
10135 addend = contents & howto->src_mask;
10136 if (addend & ((howto->src_mask + 1) >> 1))
10137 {
10138 bfd_signed_vma mask;
10139
10140 mask = -1;
10141 mask &= ~ howto->src_mask;
10142 addend |= mask;
10143 }
10144
10145 /* Add in the increment, (which is a byte value). */
10146 switch (howto->type)
10147 {
10148 default:
10149 addend += increment;
10150 break;
10151
10152 case R_ARM_PC24:
10153 case R_ARM_PLT32:
10154 case R_ARM_CALL:
10155 case R_ARM_JUMP24:
10156 addend <<= howto->size;
10157 addend += increment;
10158
10159 /* Should we check for overflow here ? */
10160
10161 /* Drop any undesired bits. */
10162 addend >>= howto->rightshift;
10163 break;
10164 }
10165
10166 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
10167
10168 bfd_put_32 (abfd, contents, address);
10169 }
10170 }
10171
10172 #define IS_ARM_TLS_RELOC(R_TYPE) \
10173 ((R_TYPE) == R_ARM_TLS_GD32 \
10174 || (R_TYPE) == R_ARM_TLS_LDO32 \
10175 || (R_TYPE) == R_ARM_TLS_LDM32 \
10176 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
10177 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
10178 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
10179 || (R_TYPE) == R_ARM_TLS_LE32 \
10180 || (R_TYPE) == R_ARM_TLS_IE32 \
10181 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
10182
10183 /* Specific set of relocations for the gnu tls dialect. */
10184 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
10185 ((R_TYPE) == R_ARM_TLS_GOTDESC \
10186 || (R_TYPE) == R_ARM_TLS_CALL \
10187 || (R_TYPE) == R_ARM_THM_TLS_CALL \
10188 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
10189 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
10190
10191 /* Relocate an ARM ELF section. */
10192
10193 static bfd_boolean
10194 elf32_arm_relocate_section (bfd * output_bfd,
10195 struct bfd_link_info * info,
10196 bfd * input_bfd,
10197 asection * input_section,
10198 bfd_byte * contents,
10199 Elf_Internal_Rela * relocs,
10200 Elf_Internal_Sym * local_syms,
10201 asection ** local_sections)
10202 {
10203 Elf_Internal_Shdr *symtab_hdr;
10204 struct elf_link_hash_entry **sym_hashes;
10205 Elf_Internal_Rela *rel;
10206 Elf_Internal_Rela *relend;
10207 const char *name;
10208 struct elf32_arm_link_hash_table * globals;
10209
10210 globals = elf32_arm_hash_table (info);
10211 if (globals == NULL)
10212 return FALSE;
10213
10214 symtab_hdr = & elf_symtab_hdr (input_bfd);
10215 sym_hashes = elf_sym_hashes (input_bfd);
10216
10217 rel = relocs;
10218 relend = relocs + input_section->reloc_count;
10219 for (; rel < relend; rel++)
10220 {
10221 int r_type;
10222 reloc_howto_type * howto;
10223 unsigned long r_symndx;
10224 Elf_Internal_Sym * sym;
10225 asection * sec;
10226 struct elf_link_hash_entry * h;
10227 bfd_vma relocation;
10228 bfd_reloc_status_type r;
10229 arelent bfd_reloc;
10230 char sym_type;
10231 bfd_boolean unresolved_reloc = FALSE;
10232 char *error_message = NULL;
10233
10234 r_symndx = ELF32_R_SYM (rel->r_info);
10235 r_type = ELF32_R_TYPE (rel->r_info);
10236 r_type = arm_real_reloc_type (globals, r_type);
10237
10238 if ( r_type == R_ARM_GNU_VTENTRY
10239 || r_type == R_ARM_GNU_VTINHERIT)
10240 continue;
10241
10242 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
10243 howto = bfd_reloc.howto;
10244
10245 h = NULL;
10246 sym = NULL;
10247 sec = NULL;
10248
10249 if (r_symndx < symtab_hdr->sh_info)
10250 {
10251 sym = local_syms + r_symndx;
10252 sym_type = ELF32_ST_TYPE (sym->st_info);
10253 sec = local_sections[r_symndx];
10254
10255 /* An object file might have a reference to a local
10256 undefined symbol. This is a daft object file, but we
10257 should at least do something about it. V4BX & NONE
10258 relocations do not use the symbol and are explicitly
10259 allowed to use the undefined symbol, so allow those.
10260 Likewise for relocations against STN_UNDEF. */
10261 if (r_type != R_ARM_V4BX
10262 && r_type != R_ARM_NONE
10263 && r_symndx != STN_UNDEF
10264 && bfd_is_und_section (sec)
10265 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
10266 {
10267 if (!info->callbacks->undefined_symbol
10268 (info, bfd_elf_string_from_elf_section
10269 (input_bfd, symtab_hdr->sh_link, sym->st_name),
10270 input_bfd, input_section,
10271 rel->r_offset, TRUE))
10272 return FALSE;
10273 }
10274
10275 if (globals->use_rel)
10276 {
10277 relocation = (sec->output_section->vma
10278 + sec->output_offset
10279 + sym->st_value);
10280 if (!info->relocatable
10281 && (sec->flags & SEC_MERGE)
10282 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
10283 {
10284 asection *msec;
10285 bfd_vma addend, value;
10286
10287 switch (r_type)
10288 {
10289 case R_ARM_MOVW_ABS_NC:
10290 case R_ARM_MOVT_ABS:
10291 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
10292 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
10293 addend = (addend ^ 0x8000) - 0x8000;
10294 break;
10295
10296 case R_ARM_THM_MOVW_ABS_NC:
10297 case R_ARM_THM_MOVT_ABS:
10298 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
10299 << 16;
10300 value |= bfd_get_16 (input_bfd,
10301 contents + rel->r_offset + 2);
10302 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
10303 | ((value & 0x04000000) >> 15);
10304 addend = (addend ^ 0x8000) - 0x8000;
10305 break;
10306
10307 default:
10308 if (howto->rightshift
10309 || (howto->src_mask & (howto->src_mask + 1)))
10310 {
10311 (*_bfd_error_handler)
10312 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
10313 input_bfd, input_section,
10314 (long) rel->r_offset, howto->name);
10315 return FALSE;
10316 }
10317
10318 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
10319
10320 /* Get the (signed) value from the instruction. */
10321 addend = value & howto->src_mask;
10322 if (addend & ((howto->src_mask + 1) >> 1))
10323 {
10324 bfd_signed_vma mask;
10325
10326 mask = -1;
10327 mask &= ~ howto->src_mask;
10328 addend |= mask;
10329 }
10330 break;
10331 }
10332
10333 msec = sec;
10334 addend =
10335 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
10336 - relocation;
10337 addend += msec->output_section->vma + msec->output_offset;
10338
10339 /* Cases here must match those in the preceding
10340 switch statement. */
10341 switch (r_type)
10342 {
10343 case R_ARM_MOVW_ABS_NC:
10344 case R_ARM_MOVT_ABS:
10345 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
10346 | (addend & 0xfff);
10347 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
10348 break;
10349
10350 case R_ARM_THM_MOVW_ABS_NC:
10351 case R_ARM_THM_MOVT_ABS:
10352 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
10353 | (addend & 0xff) | ((addend & 0x0800) << 15);
10354 bfd_put_16 (input_bfd, value >> 16,
10355 contents + rel->r_offset);
10356 bfd_put_16 (input_bfd, value,
10357 contents + rel->r_offset + 2);
10358 break;
10359
10360 default:
10361 value = (value & ~ howto->dst_mask)
10362 | (addend & howto->dst_mask);
10363 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
10364 break;
10365 }
10366 }
10367 }
10368 else
10369 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
10370 }
10371 else
10372 {
10373 bfd_boolean warned;
10374
10375 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
10376 r_symndx, symtab_hdr, sym_hashes,
10377 h, sec, relocation,
10378 unresolved_reloc, warned);
10379
10380 sym_type = h->type;
10381 }
10382
10383 if (sec != NULL && elf_discarded_section (sec))
10384 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
10385 rel, relend, howto, contents);
10386
10387 if (info->relocatable)
10388 {
10389 /* This is a relocatable link. We don't have to change
10390 anything, unless the reloc is against a section symbol,
10391 in which case we have to adjust according to where the
10392 section symbol winds up in the output section. */
10393 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
10394 {
10395 if (globals->use_rel)
10396 arm_add_to_rel (input_bfd, contents + rel->r_offset,
10397 howto, (bfd_signed_vma) sec->output_offset);
10398 else
10399 rel->r_addend += sec->output_offset;
10400 }
10401 continue;
10402 }
10403
10404 if (h != NULL)
10405 name = h->root.root.string;
10406 else
10407 {
10408 name = (bfd_elf_string_from_elf_section
10409 (input_bfd, symtab_hdr->sh_link, sym->st_name));
10410 if (name == NULL || *name == '\0')
10411 name = bfd_section_name (input_bfd, sec);
10412 }
10413
10414 if (r_symndx != STN_UNDEF
10415 && r_type != R_ARM_NONE
10416 && (h == NULL
10417 || h->root.type == bfd_link_hash_defined
10418 || h->root.type == bfd_link_hash_defweak)
10419 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
10420 {
10421 (*_bfd_error_handler)
10422 ((sym_type == STT_TLS
10423 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
10424 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
10425 input_bfd,
10426 input_section,
10427 (long) rel->r_offset,
10428 howto->name,
10429 name);
10430 }
10431
10432 /* We call elf32_arm_final_link_relocate unless we're completely
10433 done, i.e., the relaxation produced the final output we want,
10434 and we won't let anybody mess with it. Also, we have to do
10435 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
10436 both in relaxed and non-relaxed cases */
10437 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
10438 || (IS_ARM_TLS_GNU_RELOC (r_type)
10439 && !((h ? elf32_arm_hash_entry (h)->tls_type :
10440 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
10441 & GOT_TLS_GDESC)))
10442 {
10443 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
10444 contents, rel, h == NULL);
10445 /* This may have been marked unresolved because it came from
10446 a shared library. But we've just dealt with that. */
10447 unresolved_reloc = 0;
10448 }
10449 else
10450 r = bfd_reloc_continue;
10451
10452 if (r == bfd_reloc_continue)
10453 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
10454 input_section, contents, rel,
10455 relocation, info, sec, name, sym_type,
10456 (h ? h->target_internal
10457 : ARM_SYM_BRANCH_TYPE (sym)), h,
10458 &unresolved_reloc, &error_message);
10459
10460 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
10461 because such sections are not SEC_ALLOC and thus ld.so will
10462 not process them. */
10463 if (unresolved_reloc
10464 && !((input_section->flags & SEC_DEBUGGING) != 0
10465 && h->def_dynamic)
10466 && _bfd_elf_section_offset (output_bfd, info, input_section,
10467 rel->r_offset) != (bfd_vma) -1)
10468 {
10469 (*_bfd_error_handler)
10470 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
10471 input_bfd,
10472 input_section,
10473 (long) rel->r_offset,
10474 howto->name,
10475 h->root.root.string);
10476 return FALSE;
10477 }
10478
10479 if (r != bfd_reloc_ok)
10480 {
10481 switch (r)
10482 {
10483 case bfd_reloc_overflow:
10484 /* If the overflowing reloc was to an undefined symbol,
10485 we have already printed one error message and there
10486 is no point complaining again. */
10487 if ((! h ||
10488 h->root.type != bfd_link_hash_undefined)
10489 && (!((*info->callbacks->reloc_overflow)
10490 (info, (h ? &h->root : NULL), name, howto->name,
10491 (bfd_vma) 0, input_bfd, input_section,
10492 rel->r_offset))))
10493 return FALSE;
10494 break;
10495
10496 case bfd_reloc_undefined:
10497 if (!((*info->callbacks->undefined_symbol)
10498 (info, name, input_bfd, input_section,
10499 rel->r_offset, TRUE)))
10500 return FALSE;
10501 break;
10502
10503 case bfd_reloc_outofrange:
10504 error_message = _("out of range");
10505 goto common_error;
10506
10507 case bfd_reloc_notsupported:
10508 error_message = _("unsupported relocation");
10509 goto common_error;
10510
10511 case bfd_reloc_dangerous:
10512 /* error_message should already be set. */
10513 goto common_error;
10514
10515 default:
10516 error_message = _("unknown error");
10517 /* Fall through. */
10518
10519 common_error:
10520 BFD_ASSERT (error_message != NULL);
10521 if (!((*info->callbacks->reloc_dangerous)
10522 (info, error_message, input_bfd, input_section,
10523 rel->r_offset)))
10524 return FALSE;
10525 break;
10526 }
10527 }
10528 }
10529
10530 return TRUE;
10531 }
10532
10533 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
10534 adds the edit to the start of the list. (The list must be built in order of
10535 ascending TINDEX: the function's callers are primarily responsible for
10536 maintaining that condition). */
10537
10538 static void
10539 add_unwind_table_edit (arm_unwind_table_edit **head,
10540 arm_unwind_table_edit **tail,
10541 arm_unwind_edit_type type,
10542 asection *linked_section,
10543 unsigned int tindex)
10544 {
10545 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
10546 xmalloc (sizeof (arm_unwind_table_edit));
10547
10548 new_edit->type = type;
10549 new_edit->linked_section = linked_section;
10550 new_edit->index = tindex;
10551
10552 if (tindex > 0)
10553 {
10554 new_edit->next = NULL;
10555
10556 if (*tail)
10557 (*tail)->next = new_edit;
10558
10559 (*tail) = new_edit;
10560
10561 if (!*head)
10562 (*head) = new_edit;
10563 }
10564 else
10565 {
10566 new_edit->next = *head;
10567
10568 if (!*tail)
10569 *tail = new_edit;
10570
10571 *head = new_edit;
10572 }
10573 }
10574
10575 static _arm_elf_section_data *get_arm_elf_section_data (asection *);
10576
10577 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
10578 static void
10579 adjust_exidx_size(asection *exidx_sec, int adjust)
10580 {
10581 asection *out_sec;
10582
10583 if (!exidx_sec->rawsize)
10584 exidx_sec->rawsize = exidx_sec->size;
10585
10586 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
10587 out_sec = exidx_sec->output_section;
10588 /* Adjust size of output section. */
10589 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
10590 }
10591
10592 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
10593 static void
10594 insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
10595 {
10596 struct _arm_elf_section_data *exidx_arm_data;
10597
10598 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
10599 add_unwind_table_edit (
10600 &exidx_arm_data->u.exidx.unwind_edit_list,
10601 &exidx_arm_data->u.exidx.unwind_edit_tail,
10602 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
10603
10604 adjust_exidx_size(exidx_sec, 8);
10605 }
10606
10607 /* Scan .ARM.exidx tables, and create a list describing edits which should be
10608 made to those tables, such that:
10609
10610 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
10611 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
10612 codes which have been inlined into the index).
10613
10614 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
10615
10616 The edits are applied when the tables are written
10617 (in elf32_arm_write_section).
10618 */
10619
10620 bfd_boolean
10621 elf32_arm_fix_exidx_coverage (asection **text_section_order,
10622 unsigned int num_text_sections,
10623 struct bfd_link_info *info,
10624 bfd_boolean merge_exidx_entries)
10625 {
10626 bfd *inp;
10627 unsigned int last_second_word = 0, i;
10628 asection *last_exidx_sec = NULL;
10629 asection *last_text_sec = NULL;
10630 int last_unwind_type = -1;
10631
10632 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
10633 text sections. */
10634 for (inp = info->input_bfds; inp != NULL; inp = inp->link_next)
10635 {
10636 asection *sec;
10637
10638 for (sec = inp->sections; sec != NULL; sec = sec->next)
10639 {
10640 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
10641 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
10642
10643 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
10644 continue;
10645
10646 if (elf_sec->linked_to)
10647 {
10648 Elf_Internal_Shdr *linked_hdr
10649 = &elf_section_data (elf_sec->linked_to)->this_hdr;
10650 struct _arm_elf_section_data *linked_sec_arm_data
10651 = get_arm_elf_section_data (linked_hdr->bfd_section);
10652
10653 if (linked_sec_arm_data == NULL)
10654 continue;
10655
10656 /* Link this .ARM.exidx section back from the text section it
10657 describes. */
10658 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
10659 }
10660 }
10661 }
10662
10663 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
10664 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
10665 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
10666
10667 for (i = 0; i < num_text_sections; i++)
10668 {
10669 asection *sec = text_section_order[i];
10670 asection *exidx_sec;
10671 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
10672 struct _arm_elf_section_data *exidx_arm_data;
10673 bfd_byte *contents = NULL;
10674 int deleted_exidx_bytes = 0;
10675 bfd_vma j;
10676 arm_unwind_table_edit *unwind_edit_head = NULL;
10677 arm_unwind_table_edit *unwind_edit_tail = NULL;
10678 Elf_Internal_Shdr *hdr;
10679 bfd *ibfd;
10680
10681 if (arm_data == NULL)
10682 continue;
10683
10684 exidx_sec = arm_data->u.text.arm_exidx_sec;
10685 if (exidx_sec == NULL)
10686 {
10687 /* Section has no unwind data. */
10688 if (last_unwind_type == 0 || !last_exidx_sec)
10689 continue;
10690
10691 /* Ignore zero sized sections. */
10692 if (sec->size == 0)
10693 continue;
10694
10695 insert_cantunwind_after(last_text_sec, last_exidx_sec);
10696 last_unwind_type = 0;
10697 continue;
10698 }
10699
10700 /* Skip /DISCARD/ sections. */
10701 if (bfd_is_abs_section (exidx_sec->output_section))
10702 continue;
10703
10704 hdr = &elf_section_data (exidx_sec)->this_hdr;
10705 if (hdr->sh_type != SHT_ARM_EXIDX)
10706 continue;
10707
10708 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
10709 if (exidx_arm_data == NULL)
10710 continue;
10711
10712 ibfd = exidx_sec->owner;
10713
10714 if (hdr->contents != NULL)
10715 contents = hdr->contents;
10716 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
10717 /* An error? */
10718 continue;
10719
10720 for (j = 0; j < hdr->sh_size; j += 8)
10721 {
10722 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
10723 int unwind_type;
10724 int elide = 0;
10725
10726 /* An EXIDX_CANTUNWIND entry. */
10727 if (second_word == 1)
10728 {
10729 if (last_unwind_type == 0)
10730 elide = 1;
10731 unwind_type = 0;
10732 }
10733 /* Inlined unwinding data. Merge if equal to previous. */
10734 else if ((second_word & 0x80000000) != 0)
10735 {
10736 if (merge_exidx_entries
10737 && last_second_word == second_word && last_unwind_type == 1)
10738 elide = 1;
10739 unwind_type = 1;
10740 last_second_word = second_word;
10741 }
10742 /* Normal table entry. In theory we could merge these too,
10743 but duplicate entries are likely to be much less common. */
10744 else
10745 unwind_type = 2;
10746
10747 if (elide)
10748 {
10749 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
10750 DELETE_EXIDX_ENTRY, NULL, j / 8);
10751
10752 deleted_exidx_bytes += 8;
10753 }
10754
10755 last_unwind_type = unwind_type;
10756 }
10757
10758 /* Free contents if we allocated it ourselves. */
10759 if (contents != hdr->contents)
10760 free (contents);
10761
10762 /* Record edits to be applied later (in elf32_arm_write_section). */
10763 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
10764 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
10765
10766 if (deleted_exidx_bytes > 0)
10767 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
10768
10769 last_exidx_sec = exidx_sec;
10770 last_text_sec = sec;
10771 }
10772
10773 /* Add terminating CANTUNWIND entry. */
10774 if (last_exidx_sec && last_unwind_type != 0)
10775 insert_cantunwind_after(last_text_sec, last_exidx_sec);
10776
10777 return TRUE;
10778 }
10779
10780 static bfd_boolean
10781 elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
10782 bfd *ibfd, const char *name)
10783 {
10784 asection *sec, *osec;
10785
10786 sec = bfd_get_section_by_name (ibfd, name);
10787 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
10788 return TRUE;
10789
10790 osec = sec->output_section;
10791 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
10792 return TRUE;
10793
10794 if (! bfd_set_section_contents (obfd, osec, sec->contents,
10795 sec->output_offset, sec->size))
10796 return FALSE;
10797
10798 return TRUE;
10799 }
10800
10801 static bfd_boolean
10802 elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
10803 {
10804 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
10805 asection *sec, *osec;
10806
10807 if (globals == NULL)
10808 return FALSE;
10809
10810 /* Invoke the regular ELF backend linker to do all the work. */
10811 if (!bfd_elf_final_link (abfd, info))
10812 return FALSE;
10813
10814 /* Process stub sections (eg BE8 encoding, ...). */
10815 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
10816 int i;
10817 for (i=0; i<htab->top_id; i++)
10818 {
10819 sec = htab->stub_group[i].stub_sec;
10820 /* Only process it once, in its link_sec slot. */
10821 if (sec && i == htab->stub_group[i].link_sec->id)
10822 {
10823 osec = sec->output_section;
10824 elf32_arm_write_section (abfd, info, sec, sec->contents);
10825 if (! bfd_set_section_contents (abfd, osec, sec->contents,
10826 sec->output_offset, sec->size))
10827 return FALSE;
10828 }
10829 }
10830
10831 /* Write out any glue sections now that we have created all the
10832 stubs. */
10833 if (globals->bfd_of_glue_owner != NULL)
10834 {
10835 if (! elf32_arm_output_glue_section (info, abfd,
10836 globals->bfd_of_glue_owner,
10837 ARM2THUMB_GLUE_SECTION_NAME))
10838 return FALSE;
10839
10840 if (! elf32_arm_output_glue_section (info, abfd,
10841 globals->bfd_of_glue_owner,
10842 THUMB2ARM_GLUE_SECTION_NAME))
10843 return FALSE;
10844
10845 if (! elf32_arm_output_glue_section (info, abfd,
10846 globals->bfd_of_glue_owner,
10847 VFP11_ERRATUM_VENEER_SECTION_NAME))
10848 return FALSE;
10849
10850 if (! elf32_arm_output_glue_section (info, abfd,
10851 globals->bfd_of_glue_owner,
10852 ARM_BX_GLUE_SECTION_NAME))
10853 return FALSE;
10854 }
10855
10856 return TRUE;
10857 }
10858
10859 /* Set the right machine number. */
10860
10861 static bfd_boolean
10862 elf32_arm_object_p (bfd *abfd)
10863 {
10864 unsigned int mach;
10865
10866 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
10867
10868 if (mach != bfd_mach_arm_unknown)
10869 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
10870
10871 else if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
10872 bfd_default_set_arch_mach (abfd, bfd_arch_arm, bfd_mach_arm_ep9312);
10873
10874 else
10875 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
10876
10877 return TRUE;
10878 }
10879
10880 /* Function to keep ARM specific flags in the ELF header. */
10881
10882 static bfd_boolean
10883 elf32_arm_set_private_flags (bfd *abfd, flagword flags)
10884 {
10885 if (elf_flags_init (abfd)
10886 && elf_elfheader (abfd)->e_flags != flags)
10887 {
10888 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
10889 {
10890 if (flags & EF_ARM_INTERWORK)
10891 (*_bfd_error_handler)
10892 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
10893 abfd);
10894 else
10895 _bfd_error_handler
10896 (_("Warning: Clearing the interworking flag of %B due to outside request"),
10897 abfd);
10898 }
10899 }
10900 else
10901 {
10902 elf_elfheader (abfd)->e_flags = flags;
10903 elf_flags_init (abfd) = TRUE;
10904 }
10905
10906 return TRUE;
10907 }
10908
10909 /* Copy backend specific data from one object module to another. */
10910
10911 static bfd_boolean
10912 elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
10913 {
10914 flagword in_flags;
10915 flagword out_flags;
10916
10917 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
10918 return TRUE;
10919
10920 in_flags = elf_elfheader (ibfd)->e_flags;
10921 out_flags = elf_elfheader (obfd)->e_flags;
10922
10923 if (elf_flags_init (obfd)
10924 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
10925 && in_flags != out_flags)
10926 {
10927 /* Cannot mix APCS26 and APCS32 code. */
10928 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
10929 return FALSE;
10930
10931 /* Cannot mix float APCS and non-float APCS code. */
10932 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
10933 return FALSE;
10934
10935 /* If the src and dest have different interworking flags
10936 then turn off the interworking bit. */
10937 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
10938 {
10939 if (out_flags & EF_ARM_INTERWORK)
10940 _bfd_error_handler
10941 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
10942 obfd, ibfd);
10943
10944 in_flags &= ~EF_ARM_INTERWORK;
10945 }
10946
10947 /* Likewise for PIC, though don't warn for this case. */
10948 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
10949 in_flags &= ~EF_ARM_PIC;
10950 }
10951
10952 elf_elfheader (obfd)->e_flags = in_flags;
10953 elf_flags_init (obfd) = TRUE;
10954
10955 /* Also copy the EI_OSABI field. */
10956 elf_elfheader (obfd)->e_ident[EI_OSABI] =
10957 elf_elfheader (ibfd)->e_ident[EI_OSABI];
10958
10959 /* Copy object attributes. */
10960 _bfd_elf_copy_obj_attributes (ibfd, obfd);
10961
10962 return TRUE;
10963 }
10964
10965 /* Values for Tag_ABI_PCS_R9_use. */
10966 enum
10967 {
10968 AEABI_R9_V6,
10969 AEABI_R9_SB,
10970 AEABI_R9_TLS,
10971 AEABI_R9_unused
10972 };
10973
10974 /* Values for Tag_ABI_PCS_RW_data. */
10975 enum
10976 {
10977 AEABI_PCS_RW_data_absolute,
10978 AEABI_PCS_RW_data_PCrel,
10979 AEABI_PCS_RW_data_SBrel,
10980 AEABI_PCS_RW_data_unused
10981 };
10982
10983 /* Values for Tag_ABI_enum_size. */
10984 enum
10985 {
10986 AEABI_enum_unused,
10987 AEABI_enum_short,
10988 AEABI_enum_wide,
10989 AEABI_enum_forced_wide
10990 };
10991
10992 /* Determine whether an object attribute tag takes an integer, a
10993 string or both. */
10994
10995 static int
10996 elf32_arm_obj_attrs_arg_type (int tag)
10997 {
10998 if (tag == Tag_compatibility)
10999 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
11000 else if (tag == Tag_nodefaults)
11001 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
11002 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
11003 return ATTR_TYPE_FLAG_STR_VAL;
11004 else if (tag < 32)
11005 return ATTR_TYPE_FLAG_INT_VAL;
11006 else
11007 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
11008 }
11009
11010 /* The ABI defines that Tag_conformance should be emitted first, and that
11011 Tag_nodefaults should be second (if either is defined). This sets those
11012 two positions, and bumps up the position of all the remaining tags to
11013 compensate. */
11014 static int
11015 elf32_arm_obj_attrs_order (int num)
11016 {
11017 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
11018 return Tag_conformance;
11019 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
11020 return Tag_nodefaults;
11021 if ((num - 2) < Tag_nodefaults)
11022 return num - 2;
11023 if ((num - 1) < Tag_conformance)
11024 return num - 1;
11025 return num;
11026 }
11027
11028 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
11029 static bfd_boolean
11030 elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
11031 {
11032 if ((tag & 127) < 64)
11033 {
11034 _bfd_error_handler
11035 (_("%B: Unknown mandatory EABI object attribute %d"),
11036 abfd, tag);
11037 bfd_set_error (bfd_error_bad_value);
11038 return FALSE;
11039 }
11040 else
11041 {
11042 _bfd_error_handler
11043 (_("Warning: %B: Unknown EABI object attribute %d"),
11044 abfd, tag);
11045 return TRUE;
11046 }
11047 }
11048
11049 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
11050 Returns -1 if no architecture could be read. */
11051
11052 static int
11053 get_secondary_compatible_arch (bfd *abfd)
11054 {
11055 obj_attribute *attr =
11056 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
11057
11058 /* Note: the tag and its argument below are uleb128 values, though
11059 currently-defined values fit in one byte for each. */
11060 if (attr->s
11061 && attr->s[0] == Tag_CPU_arch
11062 && (attr->s[1] & 128) != 128
11063 && attr->s[2] == 0)
11064 return attr->s[1];
11065
11066 /* This tag is "safely ignorable", so don't complain if it looks funny. */
11067 return -1;
11068 }
11069
11070 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
11071 The tag is removed if ARCH is -1. */
11072
11073 static void
11074 set_secondary_compatible_arch (bfd *abfd, int arch)
11075 {
11076 obj_attribute *attr =
11077 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
11078
11079 if (arch == -1)
11080 {
11081 attr->s = NULL;
11082 return;
11083 }
11084
11085 /* Note: the tag and its argument below are uleb128 values, though
11086 currently-defined values fit in one byte for each. */
11087 if (!attr->s)
11088 attr->s = (char *) bfd_alloc (abfd, 3);
11089 attr->s[0] = Tag_CPU_arch;
11090 attr->s[1] = arch;
11091 attr->s[2] = '\0';
11092 }
11093
11094 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
11095 into account. */
11096
11097 static int
11098 tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
11099 int newtag, int secondary_compat)
11100 {
11101 #define T(X) TAG_CPU_ARCH_##X
11102 int tagl, tagh, result;
11103 const int v6t2[] =
11104 {
11105 T(V6T2), /* PRE_V4. */
11106 T(V6T2), /* V4. */
11107 T(V6T2), /* V4T. */
11108 T(V6T2), /* V5T. */
11109 T(V6T2), /* V5TE. */
11110 T(V6T2), /* V5TEJ. */
11111 T(V6T2), /* V6. */
11112 T(V7), /* V6KZ. */
11113 T(V6T2) /* V6T2. */
11114 };
11115 const int v6k[] =
11116 {
11117 T(V6K), /* PRE_V4. */
11118 T(V6K), /* V4. */
11119 T(V6K), /* V4T. */
11120 T(V6K), /* V5T. */
11121 T(V6K), /* V5TE. */
11122 T(V6K), /* V5TEJ. */
11123 T(V6K), /* V6. */
11124 T(V6KZ), /* V6KZ. */
11125 T(V7), /* V6T2. */
11126 T(V6K) /* V6K. */
11127 };
11128 const int v7[] =
11129 {
11130 T(V7), /* PRE_V4. */
11131 T(V7), /* V4. */
11132 T(V7), /* V4T. */
11133 T(V7), /* V5T. */
11134 T(V7), /* V5TE. */
11135 T(V7), /* V5TEJ. */
11136 T(V7), /* V6. */
11137 T(V7), /* V6KZ. */
11138 T(V7), /* V6T2. */
11139 T(V7), /* V6K. */
11140 T(V7) /* V7. */
11141 };
11142 const int v6_m[] =
11143 {
11144 -1, /* PRE_V4. */
11145 -1, /* V4. */
11146 T(V6K), /* V4T. */
11147 T(V6K), /* V5T. */
11148 T(V6K), /* V5TE. */
11149 T(V6K), /* V5TEJ. */
11150 T(V6K), /* V6. */
11151 T(V6KZ), /* V6KZ. */
11152 T(V7), /* V6T2. */
11153 T(V6K), /* V6K. */
11154 T(V7), /* V7. */
11155 T(V6_M) /* V6_M. */
11156 };
11157 const int v6s_m[] =
11158 {
11159 -1, /* PRE_V4. */
11160 -1, /* V4. */
11161 T(V6K), /* V4T. */
11162 T(V6K), /* V5T. */
11163 T(V6K), /* V5TE. */
11164 T(V6K), /* V5TEJ. */
11165 T(V6K), /* V6. */
11166 T(V6KZ), /* V6KZ. */
11167 T(V7), /* V6T2. */
11168 T(V6K), /* V6K. */
11169 T(V7), /* V7. */
11170 T(V6S_M), /* V6_M. */
11171 T(V6S_M) /* V6S_M. */
11172 };
11173 const int v7e_m[] =
11174 {
11175 -1, /* PRE_V4. */
11176 -1, /* V4. */
11177 T(V7E_M), /* V4T. */
11178 T(V7E_M), /* V5T. */
11179 T(V7E_M), /* V5TE. */
11180 T(V7E_M), /* V5TEJ. */
11181 T(V7E_M), /* V6. */
11182 T(V7E_M), /* V6KZ. */
11183 T(V7E_M), /* V6T2. */
11184 T(V7E_M), /* V6K. */
11185 T(V7E_M), /* V7. */
11186 T(V7E_M), /* V6_M. */
11187 T(V7E_M), /* V6S_M. */
11188 T(V7E_M) /* V7E_M. */
11189 };
11190 const int v4t_plus_v6_m[] =
11191 {
11192 -1, /* PRE_V4. */
11193 -1, /* V4. */
11194 T(V4T), /* V4T. */
11195 T(V5T), /* V5T. */
11196 T(V5TE), /* V5TE. */
11197 T(V5TEJ), /* V5TEJ. */
11198 T(V6), /* V6. */
11199 T(V6KZ), /* V6KZ. */
11200 T(V6T2), /* V6T2. */
11201 T(V6K), /* V6K. */
11202 T(V7), /* V7. */
11203 T(V6_M), /* V6_M. */
11204 T(V6S_M), /* V6S_M. */
11205 T(V7E_M), /* V7E_M. */
11206 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
11207 };
11208 const int *comb[] =
11209 {
11210 v6t2,
11211 v6k,
11212 v7,
11213 v6_m,
11214 v6s_m,
11215 v7e_m,
11216 /* Pseudo-architecture. */
11217 v4t_plus_v6_m
11218 };
11219
11220 /* Check we've not got a higher architecture than we know about. */
11221
11222 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
11223 {
11224 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
11225 return -1;
11226 }
11227
11228 /* Override old tag if we have a Tag_also_compatible_with on the output. */
11229
11230 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
11231 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
11232 oldtag = T(V4T_PLUS_V6_M);
11233
11234 /* And override the new tag if we have a Tag_also_compatible_with on the
11235 input. */
11236
11237 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
11238 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
11239 newtag = T(V4T_PLUS_V6_M);
11240
11241 tagl = (oldtag < newtag) ? oldtag : newtag;
11242 result = tagh = (oldtag > newtag) ? oldtag : newtag;
11243
11244 /* Architectures before V6KZ add features monotonically. */
11245 if (tagh <= TAG_CPU_ARCH_V6KZ)
11246 return result;
11247
11248 result = comb[tagh - T(V6T2)][tagl];
11249
11250 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
11251 as the canonical version. */
11252 if (result == T(V4T_PLUS_V6_M))
11253 {
11254 result = T(V4T);
11255 *secondary_compat_out = T(V6_M);
11256 }
11257 else
11258 *secondary_compat_out = -1;
11259
11260 if (result == -1)
11261 {
11262 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
11263 ibfd, oldtag, newtag);
11264 return -1;
11265 }
11266
11267 return result;
11268 #undef T
11269 }
11270
11271 /* Query attributes object to see if integer divide instructions may be
11272 present in an object. */
11273 static bfd_boolean
11274 elf32_arm_attributes_accept_div (const obj_attribute *attr)
11275 {
11276 int arch = attr[Tag_CPU_arch].i;
11277 int profile = attr[Tag_CPU_arch_profile].i;
11278
11279 switch (attr[Tag_DIV_use].i)
11280 {
11281 case 0:
11282 /* Integer divide allowed if instruction contained in archetecture. */
11283 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
11284 return TRUE;
11285 else if (arch >= TAG_CPU_ARCH_V7E_M)
11286 return TRUE;
11287 else
11288 return FALSE;
11289
11290 case 1:
11291 /* Integer divide explicitly prohibited. */
11292 return FALSE;
11293
11294 default:
11295 /* Unrecognised case - treat as allowing divide everywhere. */
11296 case 2:
11297 /* Integer divide allowed in ARM state. */
11298 return TRUE;
11299 }
11300 }
11301
11302 /* Query attributes object to see if integer divide instructions are
11303 forbidden to be in the object. This is not the inverse of
11304 elf32_arm_attributes_accept_div. */
11305 static bfd_boolean
11306 elf32_arm_attributes_forbid_div (const obj_attribute *attr)
11307 {
11308 return attr[Tag_DIV_use].i == 1;
11309 }
11310
11311 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
11312 are conflicting attributes. */
11313
11314 static bfd_boolean
11315 elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
11316 {
11317 obj_attribute *in_attr;
11318 obj_attribute *out_attr;
11319 /* Some tags have 0 = don't care, 1 = strong requirement,
11320 2 = weak requirement. */
11321 static const int order_021[3] = {0, 2, 1};
11322 int i;
11323 bfd_boolean result = TRUE;
11324
11325 /* Skip the linker stubs file. This preserves previous behavior
11326 of accepting unknown attributes in the first input file - but
11327 is that a bug? */
11328 if (ibfd->flags & BFD_LINKER_CREATED)
11329 return TRUE;
11330
11331 if (!elf_known_obj_attributes_proc (obfd)[0].i)
11332 {
11333 /* This is the first object. Copy the attributes. */
11334 _bfd_elf_copy_obj_attributes (ibfd, obfd);
11335
11336 out_attr = elf_known_obj_attributes_proc (obfd);
11337
11338 /* Use the Tag_null value to indicate the attributes have been
11339 initialized. */
11340 out_attr[0].i = 1;
11341
11342 /* We do not output objects with Tag_MPextension_use_legacy - we move
11343 the attribute's value to Tag_MPextension_use. */
11344 if (out_attr[Tag_MPextension_use_legacy].i != 0)
11345 {
11346 if (out_attr[Tag_MPextension_use].i != 0
11347 && out_attr[Tag_MPextension_use_legacy].i
11348 != out_attr[Tag_MPextension_use].i)
11349 {
11350 _bfd_error_handler
11351 (_("Error: %B has both the current and legacy "
11352 "Tag_MPextension_use attributes"), ibfd);
11353 result = FALSE;
11354 }
11355
11356 out_attr[Tag_MPextension_use] =
11357 out_attr[Tag_MPextension_use_legacy];
11358 out_attr[Tag_MPextension_use_legacy].type = 0;
11359 out_attr[Tag_MPextension_use_legacy].i = 0;
11360 }
11361
11362 return result;
11363 }
11364
11365 in_attr = elf_known_obj_attributes_proc (ibfd);
11366 out_attr = elf_known_obj_attributes_proc (obfd);
11367 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
11368 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
11369 {
11370 /* Ignore mismatches if the object doesn't use floating point. */
11371 if (out_attr[Tag_ABI_FP_number_model].i == 0)
11372 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
11373 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
11374 {
11375 _bfd_error_handler
11376 (_("error: %B uses VFP register arguments, %B does not"),
11377 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
11378 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
11379 result = FALSE;
11380 }
11381 }
11382
11383 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
11384 {
11385 /* Merge this attribute with existing attributes. */
11386 switch (i)
11387 {
11388 case Tag_CPU_raw_name:
11389 case Tag_CPU_name:
11390 /* These are merged after Tag_CPU_arch. */
11391 break;
11392
11393 case Tag_ABI_optimization_goals:
11394 case Tag_ABI_FP_optimization_goals:
11395 /* Use the first value seen. */
11396 break;
11397
11398 case Tag_CPU_arch:
11399 {
11400 int secondary_compat = -1, secondary_compat_out = -1;
11401 unsigned int saved_out_attr = out_attr[i].i;
11402 static const char *name_table[] = {
11403 /* These aren't real CPU names, but we can't guess
11404 that from the architecture version alone. */
11405 "Pre v4",
11406 "ARM v4",
11407 "ARM v4T",
11408 "ARM v5T",
11409 "ARM v5TE",
11410 "ARM v5TEJ",
11411 "ARM v6",
11412 "ARM v6KZ",
11413 "ARM v6T2",
11414 "ARM v6K",
11415 "ARM v7",
11416 "ARM v6-M",
11417 "ARM v6S-M"
11418 };
11419
11420 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
11421 secondary_compat = get_secondary_compatible_arch (ibfd);
11422 secondary_compat_out = get_secondary_compatible_arch (obfd);
11423 out_attr[i].i = tag_cpu_arch_combine (ibfd, out_attr[i].i,
11424 &secondary_compat_out,
11425 in_attr[i].i,
11426 secondary_compat);
11427 set_secondary_compatible_arch (obfd, secondary_compat_out);
11428
11429 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
11430 if (out_attr[i].i == saved_out_attr)
11431 ; /* Leave the names alone. */
11432 else if (out_attr[i].i == in_attr[i].i)
11433 {
11434 /* The output architecture has been changed to match the
11435 input architecture. Use the input names. */
11436 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
11437 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
11438 : NULL;
11439 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
11440 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
11441 : NULL;
11442 }
11443 else
11444 {
11445 out_attr[Tag_CPU_name].s = NULL;
11446 out_attr[Tag_CPU_raw_name].s = NULL;
11447 }
11448
11449 /* If we still don't have a value for Tag_CPU_name,
11450 make one up now. Tag_CPU_raw_name remains blank. */
11451 if (out_attr[Tag_CPU_name].s == NULL
11452 && out_attr[i].i < ARRAY_SIZE (name_table))
11453 out_attr[Tag_CPU_name].s =
11454 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
11455 }
11456 break;
11457
11458 case Tag_ARM_ISA_use:
11459 case Tag_THUMB_ISA_use:
11460 case Tag_WMMX_arch:
11461 case Tag_Advanced_SIMD_arch:
11462 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
11463 case Tag_ABI_FP_rounding:
11464 case Tag_ABI_FP_exceptions:
11465 case Tag_ABI_FP_user_exceptions:
11466 case Tag_ABI_FP_number_model:
11467 case Tag_FP_HP_extension:
11468 case Tag_CPU_unaligned_access:
11469 case Tag_T2EE_use:
11470 case Tag_MPextension_use:
11471 /* Use the largest value specified. */
11472 if (in_attr[i].i > out_attr[i].i)
11473 out_attr[i].i = in_attr[i].i;
11474 break;
11475
11476 case Tag_ABI_align_preserved:
11477 case Tag_ABI_PCS_RO_data:
11478 /* Use the smallest value specified. */
11479 if (in_attr[i].i < out_attr[i].i)
11480 out_attr[i].i = in_attr[i].i;
11481 break;
11482
11483 case Tag_ABI_align_needed:
11484 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
11485 && (in_attr[Tag_ABI_align_preserved].i == 0
11486 || out_attr[Tag_ABI_align_preserved].i == 0))
11487 {
11488 /* This error message should be enabled once all non-conformant
11489 binaries in the toolchain have had the attributes set
11490 properly.
11491 _bfd_error_handler
11492 (_("error: %B: 8-byte data alignment conflicts with %B"),
11493 obfd, ibfd);
11494 result = FALSE; */
11495 }
11496 /* Fall through. */
11497 case Tag_ABI_FP_denormal:
11498 case Tag_ABI_PCS_GOT_use:
11499 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
11500 value if greater than 2 (for future-proofing). */
11501 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
11502 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
11503 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
11504 out_attr[i].i = in_attr[i].i;
11505 break;
11506
11507 case Tag_Virtualization_use:
11508 /* The virtualization tag effectively stores two bits of
11509 information: the intended use of TrustZone (in bit 0), and the
11510 intended use of Virtualization (in bit 1). */
11511 if (out_attr[i].i == 0)
11512 out_attr[i].i = in_attr[i].i;
11513 else if (in_attr[i].i != 0
11514 && in_attr[i].i != out_attr[i].i)
11515 {
11516 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
11517 out_attr[i].i = 3;
11518 else
11519 {
11520 _bfd_error_handler
11521 (_("error: %B: unable to merge virtualization attributes "
11522 "with %B"),
11523 obfd, ibfd);
11524 result = FALSE;
11525 }
11526 }
11527 break;
11528
11529 case Tag_CPU_arch_profile:
11530 if (out_attr[i].i != in_attr[i].i)
11531 {
11532 /* 0 will merge with anything.
11533 'A' and 'S' merge to 'A'.
11534 'R' and 'S' merge to 'R'.
11535 'M' and 'A|R|S' is an error. */
11536 if (out_attr[i].i == 0
11537 || (out_attr[i].i == 'S'
11538 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
11539 out_attr[i].i = in_attr[i].i;
11540 else if (in_attr[i].i == 0
11541 || (in_attr[i].i == 'S'
11542 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
11543 ; /* Do nothing. */
11544 else
11545 {
11546 _bfd_error_handler
11547 (_("error: %B: Conflicting architecture profiles %c/%c"),
11548 ibfd,
11549 in_attr[i].i ? in_attr[i].i : '0',
11550 out_attr[i].i ? out_attr[i].i : '0');
11551 result = FALSE;
11552 }
11553 }
11554 break;
11555 case Tag_FP_arch:
11556 {
11557 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
11558 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
11559 when it's 0. It might mean absence of FP hardware if
11560 Tag_FP_arch is zero, otherwise it is effectively SP + DP. */
11561
11562 static const struct
11563 {
11564 int ver;
11565 int regs;
11566 } vfp_versions[7] =
11567 {
11568 {0, 0},
11569 {1, 16},
11570 {2, 16},
11571 {3, 32},
11572 {3, 16},
11573 {4, 32},
11574 {4, 16}
11575 };
11576 int ver;
11577 int regs;
11578 int newval;
11579
11580 /* If the output has no requirement about FP hardware,
11581 follow the requirement of the input. */
11582 if (out_attr[i].i == 0)
11583 {
11584 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
11585 out_attr[i].i = in_attr[i].i;
11586 out_attr[Tag_ABI_HardFP_use].i
11587 = in_attr[Tag_ABI_HardFP_use].i;
11588 break;
11589 }
11590 /* If the input has no requirement about FP hardware, do
11591 nothing. */
11592 else if (in_attr[i].i == 0)
11593 {
11594 BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0);
11595 break;
11596 }
11597
11598 /* Both the input and the output have nonzero Tag_FP_arch.
11599 So Tag_ABI_HardFP_use is (SP & DP) when it's zero. */
11600
11601 /* If both the input and the output have zero Tag_ABI_HardFP_use,
11602 do nothing. */
11603 if (in_attr[Tag_ABI_HardFP_use].i == 0
11604 && out_attr[Tag_ABI_HardFP_use].i == 0)
11605 ;
11606 /* If the input and the output have different Tag_ABI_HardFP_use,
11607 the combination of them is 3 (SP & DP). */
11608 else if (in_attr[Tag_ABI_HardFP_use].i
11609 != out_attr[Tag_ABI_HardFP_use].i)
11610 out_attr[Tag_ABI_HardFP_use].i = 3;
11611
11612 /* Now we can handle Tag_FP_arch. */
11613
11614 /* Values greater than 6 aren't defined, so just pick the
11615 biggest */
11616 if (in_attr[i].i > 6 && in_attr[i].i > out_attr[i].i)
11617 {
11618 out_attr[i] = in_attr[i];
11619 break;
11620 }
11621 /* The output uses the superset of input features
11622 (ISA version) and registers. */
11623 ver = vfp_versions[in_attr[i].i].ver;
11624 if (ver < vfp_versions[out_attr[i].i].ver)
11625 ver = vfp_versions[out_attr[i].i].ver;
11626 regs = vfp_versions[in_attr[i].i].regs;
11627 if (regs < vfp_versions[out_attr[i].i].regs)
11628 regs = vfp_versions[out_attr[i].i].regs;
11629 /* This assumes all possible supersets are also a valid
11630 options. */
11631 for (newval = 6; newval > 0; newval--)
11632 {
11633 if (regs == vfp_versions[newval].regs
11634 && ver == vfp_versions[newval].ver)
11635 break;
11636 }
11637 out_attr[i].i = newval;
11638 }
11639 break;
11640 case Tag_PCS_config:
11641 if (out_attr[i].i == 0)
11642 out_attr[i].i = in_attr[i].i;
11643 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
11644 {
11645 /* It's sometimes ok to mix different configs, so this is only
11646 a warning. */
11647 _bfd_error_handler
11648 (_("Warning: %B: Conflicting platform configuration"), ibfd);
11649 }
11650 break;
11651 case Tag_ABI_PCS_R9_use:
11652 if (in_attr[i].i != out_attr[i].i
11653 && out_attr[i].i != AEABI_R9_unused
11654 && in_attr[i].i != AEABI_R9_unused)
11655 {
11656 _bfd_error_handler
11657 (_("error: %B: Conflicting use of R9"), ibfd);
11658 result = FALSE;
11659 }
11660 if (out_attr[i].i == AEABI_R9_unused)
11661 out_attr[i].i = in_attr[i].i;
11662 break;
11663 case Tag_ABI_PCS_RW_data:
11664 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
11665 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
11666 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
11667 {
11668 _bfd_error_handler
11669 (_("error: %B: SB relative addressing conflicts with use of R9"),
11670 ibfd);
11671 result = FALSE;
11672 }
11673 /* Use the smallest value specified. */
11674 if (in_attr[i].i < out_attr[i].i)
11675 out_attr[i].i = in_attr[i].i;
11676 break;
11677 case Tag_ABI_PCS_wchar_t:
11678 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
11679 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
11680 {
11681 _bfd_error_handler
11682 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
11683 ibfd, in_attr[i].i, out_attr[i].i);
11684 }
11685 else if (in_attr[i].i && !out_attr[i].i)
11686 out_attr[i].i = in_attr[i].i;
11687 break;
11688 case Tag_ABI_enum_size:
11689 if (in_attr[i].i != AEABI_enum_unused)
11690 {
11691 if (out_attr[i].i == AEABI_enum_unused
11692 || out_attr[i].i == AEABI_enum_forced_wide)
11693 {
11694 /* The existing object is compatible with anything.
11695 Use whatever requirements the new object has. */
11696 out_attr[i].i = in_attr[i].i;
11697 }
11698 else if (in_attr[i].i != AEABI_enum_forced_wide
11699 && out_attr[i].i != in_attr[i].i
11700 && !elf_arm_tdata (obfd)->no_enum_size_warning)
11701 {
11702 static const char *aeabi_enum_names[] =
11703 { "", "variable-size", "32-bit", "" };
11704 const char *in_name =
11705 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
11706 ? aeabi_enum_names[in_attr[i].i]
11707 : "<unknown>";
11708 const char *out_name =
11709 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
11710 ? aeabi_enum_names[out_attr[i].i]
11711 : "<unknown>";
11712 _bfd_error_handler
11713 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
11714 ibfd, in_name, out_name);
11715 }
11716 }
11717 break;
11718 case Tag_ABI_VFP_args:
11719 /* Aready done. */
11720 break;
11721 case Tag_ABI_WMMX_args:
11722 if (in_attr[i].i != out_attr[i].i)
11723 {
11724 _bfd_error_handler
11725 (_("error: %B uses iWMMXt register arguments, %B does not"),
11726 ibfd, obfd);
11727 result = FALSE;
11728 }
11729 break;
11730 case Tag_compatibility:
11731 /* Merged in target-independent code. */
11732 break;
11733 case Tag_ABI_HardFP_use:
11734 /* This is handled along with Tag_FP_arch. */
11735 break;
11736 case Tag_ABI_FP_16bit_format:
11737 if (in_attr[i].i != 0 && out_attr[i].i != 0)
11738 {
11739 if (in_attr[i].i != out_attr[i].i)
11740 {
11741 _bfd_error_handler
11742 (_("error: fp16 format mismatch between %B and %B"),
11743 ibfd, obfd);
11744 result = FALSE;
11745 }
11746 }
11747 if (in_attr[i].i != 0)
11748 out_attr[i].i = in_attr[i].i;
11749 break;
11750
11751 case Tag_DIV_use:
11752 /* A value of zero on input means that the divide instruction may
11753 be used if available in the base architecture as specified via
11754 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
11755 the user did not want divide instructions. A value of 2
11756 explicitly means that divide instructions were allowed in ARM
11757 and Thumb state. */
11758 if (in_attr[i].i == out_attr[i].i)
11759 /* Do nothing. */ ;
11760 else if (elf32_arm_attributes_forbid_div (in_attr)
11761 && !elf32_arm_attributes_accept_div (out_attr))
11762 out_attr[i].i = 1;
11763 else if (elf32_arm_attributes_forbid_div (out_attr)
11764 && elf32_arm_attributes_accept_div (in_attr))
11765 out_attr[i].i = in_attr[i].i;
11766 else if (in_attr[i].i == 2)
11767 out_attr[i].i = in_attr[i].i;
11768 break;
11769
11770 case Tag_MPextension_use_legacy:
11771 /* We don't output objects with Tag_MPextension_use_legacy - we
11772 move the value to Tag_MPextension_use. */
11773 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
11774 {
11775 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
11776 {
11777 _bfd_error_handler
11778 (_("%B has has both the current and legacy "
11779 "Tag_MPextension_use attributes"),
11780 ibfd);
11781 result = FALSE;
11782 }
11783 }
11784
11785 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
11786 out_attr[Tag_MPextension_use] = in_attr[i];
11787
11788 break;
11789
11790 case Tag_nodefaults:
11791 /* This tag is set if it exists, but the value is unused (and is
11792 typically zero). We don't actually need to do anything here -
11793 the merge happens automatically when the type flags are merged
11794 below. */
11795 break;
11796 case Tag_also_compatible_with:
11797 /* Already done in Tag_CPU_arch. */
11798 break;
11799 case Tag_conformance:
11800 /* Keep the attribute if it matches. Throw it away otherwise.
11801 No attribute means no claim to conform. */
11802 if (!in_attr[i].s || !out_attr[i].s
11803 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
11804 out_attr[i].s = NULL;
11805 break;
11806
11807 default:
11808 result
11809 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
11810 }
11811
11812 /* If out_attr was copied from in_attr then it won't have a type yet. */
11813 if (in_attr[i].type && !out_attr[i].type)
11814 out_attr[i].type = in_attr[i].type;
11815 }
11816
11817 /* Merge Tag_compatibility attributes and any common GNU ones. */
11818 if (!_bfd_elf_merge_object_attributes (ibfd, obfd))
11819 return FALSE;
11820
11821 /* Check for any attributes not known on ARM. */
11822 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
11823
11824 return result;
11825 }
11826
11827
11828 /* Return TRUE if the two EABI versions are incompatible. */
11829
11830 static bfd_boolean
11831 elf32_arm_versions_compatible (unsigned iver, unsigned over)
11832 {
11833 /* v4 and v5 are the same spec before and after it was released,
11834 so allow mixing them. */
11835 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
11836 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
11837 return TRUE;
11838
11839 return (iver == over);
11840 }
11841
11842 /* Merge backend specific data from an object file to the output
11843 object file when linking. */
11844
11845 static bfd_boolean
11846 elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd);
11847
11848 /* Display the flags field. */
11849
11850 static bfd_boolean
11851 elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
11852 {
11853 FILE * file = (FILE *) ptr;
11854 unsigned long flags;
11855
11856 BFD_ASSERT (abfd != NULL && ptr != NULL);
11857
11858 /* Print normal ELF private data. */
11859 _bfd_elf_print_private_bfd_data (abfd, ptr);
11860
11861 flags = elf_elfheader (abfd)->e_flags;
11862 /* Ignore init flag - it may not be set, despite the flags field
11863 containing valid data. */
11864
11865 /* xgettext:c-format */
11866 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
11867
11868 switch (EF_ARM_EABI_VERSION (flags))
11869 {
11870 case EF_ARM_EABI_UNKNOWN:
11871 /* The following flag bits are GNU extensions and not part of the
11872 official ARM ELF extended ABI. Hence they are only decoded if
11873 the EABI version is not set. */
11874 if (flags & EF_ARM_INTERWORK)
11875 fprintf (file, _(" [interworking enabled]"));
11876
11877 if (flags & EF_ARM_APCS_26)
11878 fprintf (file, " [APCS-26]");
11879 else
11880 fprintf (file, " [APCS-32]");
11881
11882 if (flags & EF_ARM_VFP_FLOAT)
11883 fprintf (file, _(" [VFP float format]"));
11884 else if (flags & EF_ARM_MAVERICK_FLOAT)
11885 fprintf (file, _(" [Maverick float format]"));
11886 else
11887 fprintf (file, _(" [FPA float format]"));
11888
11889 if (flags & EF_ARM_APCS_FLOAT)
11890 fprintf (file, _(" [floats passed in float registers]"));
11891
11892 if (flags & EF_ARM_PIC)
11893 fprintf (file, _(" [position independent]"));
11894
11895 if (flags & EF_ARM_NEW_ABI)
11896 fprintf (file, _(" [new ABI]"));
11897
11898 if (flags & EF_ARM_OLD_ABI)
11899 fprintf (file, _(" [old ABI]"));
11900
11901 if (flags & EF_ARM_SOFT_FLOAT)
11902 fprintf (file, _(" [software FP]"));
11903
11904 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
11905 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
11906 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
11907 | EF_ARM_MAVERICK_FLOAT);
11908 break;
11909
11910 case EF_ARM_EABI_VER1:
11911 fprintf (file, _(" [Version1 EABI]"));
11912
11913 if (flags & EF_ARM_SYMSARESORTED)
11914 fprintf (file, _(" [sorted symbol table]"));
11915 else
11916 fprintf (file, _(" [unsorted symbol table]"));
11917
11918 flags &= ~ EF_ARM_SYMSARESORTED;
11919 break;
11920
11921 case EF_ARM_EABI_VER2:
11922 fprintf (file, _(" [Version2 EABI]"));
11923
11924 if (flags & EF_ARM_SYMSARESORTED)
11925 fprintf (file, _(" [sorted symbol table]"));
11926 else
11927 fprintf (file, _(" [unsorted symbol table]"));
11928
11929 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
11930 fprintf (file, _(" [dynamic symbols use segment index]"));
11931
11932 if (flags & EF_ARM_MAPSYMSFIRST)
11933 fprintf (file, _(" [mapping symbols precede others]"));
11934
11935 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
11936 | EF_ARM_MAPSYMSFIRST);
11937 break;
11938
11939 case EF_ARM_EABI_VER3:
11940 fprintf (file, _(" [Version3 EABI]"));
11941 break;
11942
11943 case EF_ARM_EABI_VER4:
11944 fprintf (file, _(" [Version4 EABI]"));
11945 goto eabi;
11946
11947 case EF_ARM_EABI_VER5:
11948 fprintf (file, _(" [Version5 EABI]"));
11949 eabi:
11950 if (flags & EF_ARM_BE8)
11951 fprintf (file, _(" [BE8]"));
11952
11953 if (flags & EF_ARM_LE8)
11954 fprintf (file, _(" [LE8]"));
11955
11956 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
11957 break;
11958
11959 default:
11960 fprintf (file, _(" <EABI version unrecognised>"));
11961 break;
11962 }
11963
11964 flags &= ~ EF_ARM_EABIMASK;
11965
11966 if (flags & EF_ARM_RELEXEC)
11967 fprintf (file, _(" [relocatable executable]"));
11968
11969 if (flags & EF_ARM_HASENTRY)
11970 fprintf (file, _(" [has entry point]"));
11971
11972 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
11973
11974 if (flags)
11975 fprintf (file, _("<Unrecognised flag bits set>"));
11976
11977 fputc ('\n', file);
11978
11979 return TRUE;
11980 }
11981
11982 static int
11983 elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
11984 {
11985 switch (ELF_ST_TYPE (elf_sym->st_info))
11986 {
11987 case STT_ARM_TFUNC:
11988 return ELF_ST_TYPE (elf_sym->st_info);
11989
11990 case STT_ARM_16BIT:
11991 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
11992 This allows us to distinguish between data used by Thumb instructions
11993 and non-data (which is probably code) inside Thumb regions of an
11994 executable. */
11995 if (type != STT_OBJECT && type != STT_TLS)
11996 return ELF_ST_TYPE (elf_sym->st_info);
11997 break;
11998
11999 default:
12000 break;
12001 }
12002
12003 return type;
12004 }
12005
12006 static asection *
12007 elf32_arm_gc_mark_hook (asection *sec,
12008 struct bfd_link_info *info,
12009 Elf_Internal_Rela *rel,
12010 struct elf_link_hash_entry *h,
12011 Elf_Internal_Sym *sym)
12012 {
12013 if (h != NULL)
12014 switch (ELF32_R_TYPE (rel->r_info))
12015 {
12016 case R_ARM_GNU_VTINHERIT:
12017 case R_ARM_GNU_VTENTRY:
12018 return NULL;
12019 }
12020
12021 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
12022 }
12023
12024 /* Update the got entry reference counts for the section being removed. */
12025
12026 static bfd_boolean
12027 elf32_arm_gc_sweep_hook (bfd * abfd,
12028 struct bfd_link_info * info,
12029 asection * sec,
12030 const Elf_Internal_Rela * relocs)
12031 {
12032 Elf_Internal_Shdr *symtab_hdr;
12033 struct elf_link_hash_entry **sym_hashes;
12034 bfd_signed_vma *local_got_refcounts;
12035 const Elf_Internal_Rela *rel, *relend;
12036 struct elf32_arm_link_hash_table * globals;
12037
12038 if (info->relocatable)
12039 return TRUE;
12040
12041 globals = elf32_arm_hash_table (info);
12042 if (globals == NULL)
12043 return FALSE;
12044
12045 elf_section_data (sec)->local_dynrel = NULL;
12046
12047 symtab_hdr = & elf_symtab_hdr (abfd);
12048 sym_hashes = elf_sym_hashes (abfd);
12049 local_got_refcounts = elf_local_got_refcounts (abfd);
12050
12051 check_use_blx (globals);
12052
12053 relend = relocs + sec->reloc_count;
12054 for (rel = relocs; rel < relend; rel++)
12055 {
12056 unsigned long r_symndx;
12057 struct elf_link_hash_entry *h = NULL;
12058 struct elf32_arm_link_hash_entry *eh;
12059 int r_type;
12060 bfd_boolean call_reloc_p;
12061 bfd_boolean may_become_dynamic_p;
12062 bfd_boolean may_need_local_target_p;
12063 union gotplt_union *root_plt;
12064 struct arm_plt_info *arm_plt;
12065
12066 r_symndx = ELF32_R_SYM (rel->r_info);
12067 if (r_symndx >= symtab_hdr->sh_info)
12068 {
12069 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
12070 while (h->root.type == bfd_link_hash_indirect
12071 || h->root.type == bfd_link_hash_warning)
12072 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12073 }
12074 eh = (struct elf32_arm_link_hash_entry *) h;
12075
12076 call_reloc_p = FALSE;
12077 may_become_dynamic_p = FALSE;
12078 may_need_local_target_p = FALSE;
12079
12080 r_type = ELF32_R_TYPE (rel->r_info);
12081 r_type = arm_real_reloc_type (globals, r_type);
12082 switch (r_type)
12083 {
12084 case R_ARM_GOT32:
12085 case R_ARM_GOT_PREL:
12086 case R_ARM_TLS_GD32:
12087 case R_ARM_TLS_IE32:
12088 if (h != NULL)
12089 {
12090 if (h->got.refcount > 0)
12091 h->got.refcount -= 1;
12092 }
12093 else if (local_got_refcounts != NULL)
12094 {
12095 if (local_got_refcounts[r_symndx] > 0)
12096 local_got_refcounts[r_symndx] -= 1;
12097 }
12098 break;
12099
12100 case R_ARM_TLS_LDM32:
12101 globals->tls_ldm_got.refcount -= 1;
12102 break;
12103
12104 case R_ARM_PC24:
12105 case R_ARM_PLT32:
12106 case R_ARM_CALL:
12107 case R_ARM_JUMP24:
12108 case R_ARM_PREL31:
12109 case R_ARM_THM_CALL:
12110 case R_ARM_THM_JUMP24:
12111 case R_ARM_THM_JUMP19:
12112 call_reloc_p = TRUE;
12113 may_need_local_target_p = TRUE;
12114 break;
12115
12116 case R_ARM_ABS12:
12117 if (!globals->vxworks_p)
12118 {
12119 may_need_local_target_p = TRUE;
12120 break;
12121 }
12122 /* Fall through. */
12123 case R_ARM_ABS32:
12124 case R_ARM_ABS32_NOI:
12125 case R_ARM_REL32:
12126 case R_ARM_REL32_NOI:
12127 case R_ARM_MOVW_ABS_NC:
12128 case R_ARM_MOVT_ABS:
12129 case R_ARM_MOVW_PREL_NC:
12130 case R_ARM_MOVT_PREL:
12131 case R_ARM_THM_MOVW_ABS_NC:
12132 case R_ARM_THM_MOVT_ABS:
12133 case R_ARM_THM_MOVW_PREL_NC:
12134 case R_ARM_THM_MOVT_PREL:
12135 /* Should the interworking branches be here also? */
12136 if ((info->shared || globals->root.is_relocatable_executable)
12137 && (sec->flags & SEC_ALLOC) != 0)
12138 {
12139 if (h == NULL
12140 && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI))
12141 {
12142 call_reloc_p = TRUE;
12143 may_need_local_target_p = TRUE;
12144 }
12145 else
12146 may_become_dynamic_p = TRUE;
12147 }
12148 else
12149 may_need_local_target_p = TRUE;
12150 break;
12151
12152 default:
12153 break;
12154 }
12155
12156 if (may_need_local_target_p
12157 && elf32_arm_get_plt_info (abfd, eh, r_symndx, &root_plt, &arm_plt))
12158 {
12159 BFD_ASSERT (root_plt->refcount > 0);
12160 root_plt->refcount -= 1;
12161
12162 if (!call_reloc_p)
12163 arm_plt->noncall_refcount--;
12164
12165 if (r_type == R_ARM_THM_CALL)
12166 arm_plt->maybe_thumb_refcount--;
12167
12168 if (r_type == R_ARM_THM_JUMP24
12169 || r_type == R_ARM_THM_JUMP19)
12170 arm_plt->thumb_refcount--;
12171 }
12172
12173 if (may_become_dynamic_p)
12174 {
12175 struct elf_dyn_relocs **pp;
12176 struct elf_dyn_relocs *p;
12177
12178 if (h != NULL)
12179 pp = &(eh->dyn_relocs);
12180 else
12181 {
12182 Elf_Internal_Sym *isym;
12183
12184 isym = bfd_sym_from_r_symndx (&globals->sym_cache,
12185 abfd, r_symndx);
12186 if (isym == NULL)
12187 return FALSE;
12188 pp = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
12189 if (pp == NULL)
12190 return FALSE;
12191 }
12192 for (; (p = *pp) != NULL; pp = &p->next)
12193 if (p->sec == sec)
12194 {
12195 /* Everything must go for SEC. */
12196 *pp = p->next;
12197 break;
12198 }
12199 }
12200 }
12201
12202 return TRUE;
12203 }
12204
12205 /* Look through the relocs for a section during the first phase. */
12206
12207 static bfd_boolean
12208 elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
12209 asection *sec, const Elf_Internal_Rela *relocs)
12210 {
12211 Elf_Internal_Shdr *symtab_hdr;
12212 struct elf_link_hash_entry **sym_hashes;
12213 const Elf_Internal_Rela *rel;
12214 const Elf_Internal_Rela *rel_end;
12215 bfd *dynobj;
12216 asection *sreloc;
12217 struct elf32_arm_link_hash_table *htab;
12218 bfd_boolean call_reloc_p;
12219 bfd_boolean may_become_dynamic_p;
12220 bfd_boolean may_need_local_target_p;
12221 unsigned long nsyms;
12222
12223 if (info->relocatable)
12224 return TRUE;
12225
12226 BFD_ASSERT (is_arm_elf (abfd));
12227
12228 htab = elf32_arm_hash_table (info);
12229 if (htab == NULL)
12230 return FALSE;
12231
12232 sreloc = NULL;
12233
12234 /* Create dynamic sections for relocatable executables so that we can
12235 copy relocations. */
12236 if (htab->root.is_relocatable_executable
12237 && ! htab->root.dynamic_sections_created)
12238 {
12239 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
12240 return FALSE;
12241 }
12242
12243 if (htab->root.dynobj == NULL)
12244 htab->root.dynobj = abfd;
12245 if (!create_ifunc_sections (info))
12246 return FALSE;
12247
12248 dynobj = htab->root.dynobj;
12249
12250 symtab_hdr = & elf_symtab_hdr (abfd);
12251 sym_hashes = elf_sym_hashes (abfd);
12252 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
12253
12254 rel_end = relocs + sec->reloc_count;
12255 for (rel = relocs; rel < rel_end; rel++)
12256 {
12257 Elf_Internal_Sym *isym;
12258 struct elf_link_hash_entry *h;
12259 struct elf32_arm_link_hash_entry *eh;
12260 unsigned long r_symndx;
12261 int r_type;
12262
12263 r_symndx = ELF32_R_SYM (rel->r_info);
12264 r_type = ELF32_R_TYPE (rel->r_info);
12265 r_type = arm_real_reloc_type (htab, r_type);
12266
12267 if (r_symndx >= nsyms
12268 /* PR 9934: It is possible to have relocations that do not
12269 refer to symbols, thus it is also possible to have an
12270 object file containing relocations but no symbol table. */
12271 && (r_symndx > STN_UNDEF || nsyms > 0))
12272 {
12273 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
12274 r_symndx);
12275 return FALSE;
12276 }
12277
12278 h = NULL;
12279 isym = NULL;
12280 if (nsyms > 0)
12281 {
12282 if (r_symndx < symtab_hdr->sh_info)
12283 {
12284 /* A local symbol. */
12285 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
12286 abfd, r_symndx);
12287 if (isym == NULL)
12288 return FALSE;
12289 }
12290 else
12291 {
12292 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
12293 while (h->root.type == bfd_link_hash_indirect
12294 || h->root.type == bfd_link_hash_warning)
12295 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12296 }
12297 }
12298
12299 eh = (struct elf32_arm_link_hash_entry *) h;
12300
12301 call_reloc_p = FALSE;
12302 may_become_dynamic_p = FALSE;
12303 may_need_local_target_p = FALSE;
12304
12305 /* Could be done earlier, if h were already available. */
12306 r_type = elf32_arm_tls_transition (info, r_type, h);
12307 switch (r_type)
12308 {
12309 case R_ARM_GOT32:
12310 case R_ARM_GOT_PREL:
12311 case R_ARM_TLS_GD32:
12312 case R_ARM_TLS_IE32:
12313 case R_ARM_TLS_GOTDESC:
12314 case R_ARM_TLS_DESCSEQ:
12315 case R_ARM_THM_TLS_DESCSEQ:
12316 case R_ARM_TLS_CALL:
12317 case R_ARM_THM_TLS_CALL:
12318 /* This symbol requires a global offset table entry. */
12319 {
12320 int tls_type, old_tls_type;
12321
12322 switch (r_type)
12323 {
12324 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
12325
12326 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
12327
12328 case R_ARM_TLS_GOTDESC:
12329 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
12330 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
12331 tls_type = GOT_TLS_GDESC; break;
12332
12333 default: tls_type = GOT_NORMAL; break;
12334 }
12335
12336 if (h != NULL)
12337 {
12338 h->got.refcount++;
12339 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
12340 }
12341 else
12342 {
12343 /* This is a global offset table entry for a local symbol. */
12344 if (!elf32_arm_allocate_local_sym_info (abfd))
12345 return FALSE;
12346 elf_local_got_refcounts (abfd)[r_symndx] += 1;
12347 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
12348 }
12349
12350 /* If a variable is accessed with both tls methods, two
12351 slots may be created. */
12352 if (GOT_TLS_GD_ANY_P (old_tls_type)
12353 && GOT_TLS_GD_ANY_P (tls_type))
12354 tls_type |= old_tls_type;
12355
12356 /* We will already have issued an error message if there
12357 is a TLS/non-TLS mismatch, based on the symbol
12358 type. So just combine any TLS types needed. */
12359 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
12360 && tls_type != GOT_NORMAL)
12361 tls_type |= old_tls_type;
12362
12363 /* If the symbol is accessed in both IE and GDESC
12364 method, we're able to relax. Turn off the GDESC flag,
12365 without messing up with any other kind of tls types
12366 that may be involved */
12367 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
12368 tls_type &= ~GOT_TLS_GDESC;
12369
12370 if (old_tls_type != tls_type)
12371 {
12372 if (h != NULL)
12373 elf32_arm_hash_entry (h)->tls_type = tls_type;
12374 else
12375 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
12376 }
12377 }
12378 /* Fall through. */
12379
12380 case R_ARM_TLS_LDM32:
12381 if (r_type == R_ARM_TLS_LDM32)
12382 htab->tls_ldm_got.refcount++;
12383 /* Fall through. */
12384
12385 case R_ARM_GOTOFF32:
12386 case R_ARM_GOTPC:
12387 if (htab->root.sgot == NULL
12388 && !create_got_section (htab->root.dynobj, info))
12389 return FALSE;
12390 break;
12391
12392 case R_ARM_PC24:
12393 case R_ARM_PLT32:
12394 case R_ARM_CALL:
12395 case R_ARM_JUMP24:
12396 case R_ARM_PREL31:
12397 case R_ARM_THM_CALL:
12398 case R_ARM_THM_JUMP24:
12399 case R_ARM_THM_JUMP19:
12400 call_reloc_p = TRUE;
12401 may_need_local_target_p = TRUE;
12402 break;
12403
12404 case R_ARM_ABS12:
12405 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
12406 ldr __GOTT_INDEX__ offsets. */
12407 if (!htab->vxworks_p)
12408 {
12409 may_need_local_target_p = TRUE;
12410 break;
12411 }
12412 /* Fall through. */
12413
12414 case R_ARM_MOVW_ABS_NC:
12415 case R_ARM_MOVT_ABS:
12416 case R_ARM_THM_MOVW_ABS_NC:
12417 case R_ARM_THM_MOVT_ABS:
12418 if (info->shared)
12419 {
12420 (*_bfd_error_handler)
12421 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
12422 abfd, elf32_arm_howto_table_1[r_type].name,
12423 (h) ? h->root.root.string : "a local symbol");
12424 bfd_set_error (bfd_error_bad_value);
12425 return FALSE;
12426 }
12427
12428 /* Fall through. */
12429 case R_ARM_ABS32:
12430 case R_ARM_ABS32_NOI:
12431 case R_ARM_REL32:
12432 case R_ARM_REL32_NOI:
12433 case R_ARM_MOVW_PREL_NC:
12434 case R_ARM_MOVT_PREL:
12435 case R_ARM_THM_MOVW_PREL_NC:
12436 case R_ARM_THM_MOVT_PREL:
12437
12438 /* Should the interworking branches be listed here? */
12439 if ((info->shared || htab->root.is_relocatable_executable)
12440 && (sec->flags & SEC_ALLOC) != 0)
12441 {
12442 if (h == NULL
12443 && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI))
12444 {
12445 /* In shared libraries and relocatable executables,
12446 we treat local relative references as calls;
12447 see the related SYMBOL_CALLS_LOCAL code in
12448 allocate_dynrelocs. */
12449 call_reloc_p = TRUE;
12450 may_need_local_target_p = TRUE;
12451 }
12452 else
12453 /* We are creating a shared library or relocatable
12454 executable, and this is a reloc against a global symbol,
12455 or a non-PC-relative reloc against a local symbol.
12456 We may need to copy the reloc into the output. */
12457 may_become_dynamic_p = TRUE;
12458 }
12459 else
12460 may_need_local_target_p = TRUE;
12461 break;
12462
12463 /* This relocation describes the C++ object vtable hierarchy.
12464 Reconstruct it for later use during GC. */
12465 case R_ARM_GNU_VTINHERIT:
12466 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
12467 return FALSE;
12468 break;
12469
12470 /* This relocation describes which C++ vtable entries are actually
12471 used. Record for later use during GC. */
12472 case R_ARM_GNU_VTENTRY:
12473 BFD_ASSERT (h != NULL);
12474 if (h != NULL
12475 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
12476 return FALSE;
12477 break;
12478 }
12479
12480 if (h != NULL)
12481 {
12482 if (call_reloc_p)
12483 /* We may need a .plt entry if the function this reloc
12484 refers to is in a different object, regardless of the
12485 symbol's type. We can't tell for sure yet, because
12486 something later might force the symbol local. */
12487 h->needs_plt = 1;
12488 else if (may_need_local_target_p)
12489 /* If this reloc is in a read-only section, we might
12490 need a copy reloc. We can't check reliably at this
12491 stage whether the section is read-only, as input
12492 sections have not yet been mapped to output sections.
12493 Tentatively set the flag for now, and correct in
12494 adjust_dynamic_symbol. */
12495 h->non_got_ref = 1;
12496 }
12497
12498 if (may_need_local_target_p
12499 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
12500 {
12501 union gotplt_union *root_plt;
12502 struct arm_plt_info *arm_plt;
12503 struct arm_local_iplt_info *local_iplt;
12504
12505 if (h != NULL)
12506 {
12507 root_plt = &h->plt;
12508 arm_plt = &eh->plt;
12509 }
12510 else
12511 {
12512 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
12513 if (local_iplt == NULL)
12514 return FALSE;
12515 root_plt = &local_iplt->root;
12516 arm_plt = &local_iplt->arm;
12517 }
12518
12519 /* If the symbol is a function that doesn't bind locally,
12520 this relocation will need a PLT entry. */
12521 root_plt->refcount += 1;
12522
12523 if (!call_reloc_p)
12524 arm_plt->noncall_refcount++;
12525
12526 /* It's too early to use htab->use_blx here, so we have to
12527 record possible blx references separately from
12528 relocs that definitely need a thumb stub. */
12529
12530 if (r_type == R_ARM_THM_CALL)
12531 arm_plt->maybe_thumb_refcount += 1;
12532
12533 if (r_type == R_ARM_THM_JUMP24
12534 || r_type == R_ARM_THM_JUMP19)
12535 arm_plt->thumb_refcount += 1;
12536 }
12537
12538 if (may_become_dynamic_p)
12539 {
12540 struct elf_dyn_relocs *p, **head;
12541
12542 /* Create a reloc section in dynobj. */
12543 if (sreloc == NULL)
12544 {
12545 sreloc = _bfd_elf_make_dynamic_reloc_section
12546 (sec, dynobj, 2, abfd, ! htab->use_rel);
12547
12548 if (sreloc == NULL)
12549 return FALSE;
12550
12551 /* BPABI objects never have dynamic relocations mapped. */
12552 if (htab->symbian_p)
12553 {
12554 flagword flags;
12555
12556 flags = bfd_get_section_flags (dynobj, sreloc);
12557 flags &= ~(SEC_LOAD | SEC_ALLOC);
12558 bfd_set_section_flags (dynobj, sreloc, flags);
12559 }
12560 }
12561
12562 /* If this is a global symbol, count the number of
12563 relocations we need for this symbol. */
12564 if (h != NULL)
12565 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
12566 else
12567 {
12568 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
12569 if (head == NULL)
12570 return FALSE;
12571 }
12572
12573 p = *head;
12574 if (p == NULL || p->sec != sec)
12575 {
12576 bfd_size_type amt = sizeof *p;
12577
12578 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
12579 if (p == NULL)
12580 return FALSE;
12581 p->next = *head;
12582 *head = p;
12583 p->sec = sec;
12584 p->count = 0;
12585 p->pc_count = 0;
12586 }
12587
12588 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
12589 p->pc_count += 1;
12590 p->count += 1;
12591 }
12592 }
12593
12594 return TRUE;
12595 }
12596
12597 /* Unwinding tables are not referenced directly. This pass marks them as
12598 required if the corresponding code section is marked. */
12599
12600 static bfd_boolean
12601 elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
12602 elf_gc_mark_hook_fn gc_mark_hook)
12603 {
12604 bfd *sub;
12605 Elf_Internal_Shdr **elf_shdrp;
12606 bfd_boolean again;
12607
12608 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
12609
12610 /* Marking EH data may cause additional code sections to be marked,
12611 requiring multiple passes. */
12612 again = TRUE;
12613 while (again)
12614 {
12615 again = FALSE;
12616 for (sub = info->input_bfds; sub != NULL; sub = sub->link_next)
12617 {
12618 asection *o;
12619
12620 if (! is_arm_elf (sub))
12621 continue;
12622
12623 elf_shdrp = elf_elfsections (sub);
12624 for (o = sub->sections; o != NULL; o = o->next)
12625 {
12626 Elf_Internal_Shdr *hdr;
12627
12628 hdr = &elf_section_data (o)->this_hdr;
12629 if (hdr->sh_type == SHT_ARM_EXIDX
12630 && hdr->sh_link
12631 && hdr->sh_link < elf_numsections (sub)
12632 && !o->gc_mark
12633 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
12634 {
12635 again = TRUE;
12636 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
12637 return FALSE;
12638 }
12639 }
12640 }
12641 }
12642
12643 return TRUE;
12644 }
12645
12646 /* Treat mapping symbols as special target symbols. */
12647
12648 static bfd_boolean
12649 elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
12650 {
12651 return bfd_is_arm_special_symbol_name (sym->name,
12652 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
12653 }
12654
12655 /* This is a copy of elf_find_function() from elf.c except that
12656 ARM mapping symbols are ignored when looking for function names
12657 and STT_ARM_TFUNC is considered to a function type. */
12658
12659 static bfd_boolean
12660 arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
12661 asection * section,
12662 asymbol ** symbols,
12663 bfd_vma offset,
12664 const char ** filename_ptr,
12665 const char ** functionname_ptr)
12666 {
12667 const char * filename = NULL;
12668 asymbol * func = NULL;
12669 bfd_vma low_func = 0;
12670 asymbol ** p;
12671
12672 for (p = symbols; *p != NULL; p++)
12673 {
12674 elf_symbol_type *q;
12675
12676 q = (elf_symbol_type *) *p;
12677
12678 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
12679 {
12680 default:
12681 break;
12682 case STT_FILE:
12683 filename = bfd_asymbol_name (&q->symbol);
12684 break;
12685 case STT_FUNC:
12686 case STT_ARM_TFUNC:
12687 case STT_NOTYPE:
12688 /* Skip mapping symbols. */
12689 if ((q->symbol.flags & BSF_LOCAL)
12690 && bfd_is_arm_special_symbol_name (q->symbol.name,
12691 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
12692 continue;
12693 /* Fall through. */
12694 if (bfd_get_section (&q->symbol) == section
12695 && q->symbol.value >= low_func
12696 && q->symbol.value <= offset)
12697 {
12698 func = (asymbol *) q;
12699 low_func = q->symbol.value;
12700 }
12701 break;
12702 }
12703 }
12704
12705 if (func == NULL)
12706 return FALSE;
12707
12708 if (filename_ptr)
12709 *filename_ptr = filename;
12710 if (functionname_ptr)
12711 *functionname_ptr = bfd_asymbol_name (func);
12712
12713 return TRUE;
12714 }
12715
12716
12717 /* Find the nearest line to a particular section and offset, for error
12718 reporting. This code is a duplicate of the code in elf.c, except
12719 that it uses arm_elf_find_function. */
12720
12721 static bfd_boolean
12722 elf32_arm_find_nearest_line (bfd * abfd,
12723 asection * section,
12724 asymbol ** symbols,
12725 bfd_vma offset,
12726 const char ** filename_ptr,
12727 const char ** functionname_ptr,
12728 unsigned int * line_ptr)
12729 {
12730 bfd_boolean found = FALSE;
12731
12732 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
12733
12734 if (_bfd_dwarf2_find_nearest_line (abfd, dwarf_debug_sections,
12735 section, symbols, offset,
12736 filename_ptr, functionname_ptr,
12737 line_ptr, 0,
12738 & elf_tdata (abfd)->dwarf2_find_line_info))
12739 {
12740 if (!*functionname_ptr)
12741 arm_elf_find_function (abfd, section, symbols, offset,
12742 *filename_ptr ? NULL : filename_ptr,
12743 functionname_ptr);
12744
12745 return TRUE;
12746 }
12747
12748 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
12749 & found, filename_ptr,
12750 functionname_ptr, line_ptr,
12751 & elf_tdata (abfd)->line_info))
12752 return FALSE;
12753
12754 if (found && (*functionname_ptr || *line_ptr))
12755 return TRUE;
12756
12757 if (symbols == NULL)
12758 return FALSE;
12759
12760 if (! arm_elf_find_function (abfd, section, symbols, offset,
12761 filename_ptr, functionname_ptr))
12762 return FALSE;
12763
12764 *line_ptr = 0;
12765 return TRUE;
12766 }
12767
12768 static bfd_boolean
12769 elf32_arm_find_inliner_info (bfd * abfd,
12770 const char ** filename_ptr,
12771 const char ** functionname_ptr,
12772 unsigned int * line_ptr)
12773 {
12774 bfd_boolean found;
12775 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
12776 functionname_ptr, line_ptr,
12777 & elf_tdata (abfd)->dwarf2_find_line_info);
12778 return found;
12779 }
12780
12781 /* Adjust a symbol defined by a dynamic object and referenced by a
12782 regular object. The current definition is in some section of the
12783 dynamic object, but we're not including those sections. We have to
12784 change the definition to something the rest of the link can
12785 understand. */
12786
12787 static bfd_boolean
12788 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
12789 struct elf_link_hash_entry * h)
12790 {
12791 bfd * dynobj;
12792 asection * s;
12793 struct elf32_arm_link_hash_entry * eh;
12794 struct elf32_arm_link_hash_table *globals;
12795
12796 globals = elf32_arm_hash_table (info);
12797 if (globals == NULL)
12798 return FALSE;
12799
12800 dynobj = elf_hash_table (info)->dynobj;
12801
12802 /* Make sure we know what is going on here. */
12803 BFD_ASSERT (dynobj != NULL
12804 && (h->needs_plt
12805 || h->type == STT_GNU_IFUNC
12806 || h->u.weakdef != NULL
12807 || (h->def_dynamic
12808 && h->ref_regular
12809 && !h->def_regular)));
12810
12811 eh = (struct elf32_arm_link_hash_entry *) h;
12812
12813 /* If this is a function, put it in the procedure linkage table. We
12814 will fill in the contents of the procedure linkage table later,
12815 when we know the address of the .got section. */
12816 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
12817 {
12818 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
12819 symbol binds locally. */
12820 if (h->plt.refcount <= 0
12821 || (h->type != STT_GNU_IFUNC
12822 && (SYMBOL_CALLS_LOCAL (info, h)
12823 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
12824 && h->root.type == bfd_link_hash_undefweak))))
12825 {
12826 /* This case can occur if we saw a PLT32 reloc in an input
12827 file, but the symbol was never referred to by a dynamic
12828 object, or if all references were garbage collected. In
12829 such a case, we don't actually need to build a procedure
12830 linkage table, and we can just do a PC24 reloc instead. */
12831 h->plt.offset = (bfd_vma) -1;
12832 eh->plt.thumb_refcount = 0;
12833 eh->plt.maybe_thumb_refcount = 0;
12834 eh->plt.noncall_refcount = 0;
12835 h->needs_plt = 0;
12836 }
12837
12838 return TRUE;
12839 }
12840 else
12841 {
12842 /* It's possible that we incorrectly decided a .plt reloc was
12843 needed for an R_ARM_PC24 or similar reloc to a non-function sym
12844 in check_relocs. We can't decide accurately between function
12845 and non-function syms in check-relocs; Objects loaded later in
12846 the link may change h->type. So fix it now. */
12847 h->plt.offset = (bfd_vma) -1;
12848 eh->plt.thumb_refcount = 0;
12849 eh->plt.maybe_thumb_refcount = 0;
12850 eh->plt.noncall_refcount = 0;
12851 }
12852
12853 /* If this is a weak symbol, and there is a real definition, the
12854 processor independent code will have arranged for us to see the
12855 real definition first, and we can just use the same value. */
12856 if (h->u.weakdef != NULL)
12857 {
12858 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
12859 || h->u.weakdef->root.type == bfd_link_hash_defweak);
12860 h->root.u.def.section = h->u.weakdef->root.u.def.section;
12861 h->root.u.def.value = h->u.weakdef->root.u.def.value;
12862 return TRUE;
12863 }
12864
12865 /* If there are no non-GOT references, we do not need a copy
12866 relocation. */
12867 if (!h->non_got_ref)
12868 return TRUE;
12869
12870 /* This is a reference to a symbol defined by a dynamic object which
12871 is not a function. */
12872
12873 /* If we are creating a shared library, we must presume that the
12874 only references to the symbol are via the global offset table.
12875 For such cases we need not do anything here; the relocations will
12876 be handled correctly by relocate_section. Relocatable executables
12877 can reference data in shared objects directly, so we don't need to
12878 do anything here. */
12879 if (info->shared || globals->root.is_relocatable_executable)
12880 return TRUE;
12881
12882 /* We must allocate the symbol in our .dynbss section, which will
12883 become part of the .bss section of the executable. There will be
12884 an entry for this symbol in the .dynsym section. The dynamic
12885 object will contain position independent code, so all references
12886 from the dynamic object to this symbol will go through the global
12887 offset table. The dynamic linker will use the .dynsym entry to
12888 determine the address it must put in the global offset table, so
12889 both the dynamic object and the regular object will refer to the
12890 same memory location for the variable. */
12891 s = bfd_get_section_by_name (dynobj, ".dynbss");
12892 BFD_ASSERT (s != NULL);
12893
12894 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
12895 copy the initial value out of the dynamic object and into the
12896 runtime process image. We need to remember the offset into the
12897 .rel(a).bss section we are going to use. */
12898 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0 && h->size != 0)
12899 {
12900 asection *srel;
12901
12902 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (globals, ".bss"));
12903 elf32_arm_allocate_dynrelocs (info, srel, 1);
12904 h->needs_copy = 1;
12905 }
12906
12907 return _bfd_elf_adjust_dynamic_copy (h, s);
12908 }
12909
12910 /* Allocate space in .plt, .got and associated reloc sections for
12911 dynamic relocs. */
12912
12913 static bfd_boolean
12914 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
12915 {
12916 struct bfd_link_info *info;
12917 struct elf32_arm_link_hash_table *htab;
12918 struct elf32_arm_link_hash_entry *eh;
12919 struct elf_dyn_relocs *p;
12920
12921 if (h->root.type == bfd_link_hash_indirect)
12922 return TRUE;
12923
12924 eh = (struct elf32_arm_link_hash_entry *) h;
12925
12926 info = (struct bfd_link_info *) inf;
12927 htab = elf32_arm_hash_table (info);
12928 if (htab == NULL)
12929 return FALSE;
12930
12931 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
12932 && h->plt.refcount > 0)
12933 {
12934 /* Make sure this symbol is output as a dynamic symbol.
12935 Undefined weak syms won't yet be marked as dynamic. */
12936 if (h->dynindx == -1
12937 && !h->forced_local)
12938 {
12939 if (! bfd_elf_link_record_dynamic_symbol (info, h))
12940 return FALSE;
12941 }
12942
12943 /* If the call in the PLT entry binds locally, the associated
12944 GOT entry should use an R_ARM_IRELATIVE relocation instead of
12945 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
12946 than the .plt section. */
12947 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
12948 {
12949 eh->is_iplt = 1;
12950 if (eh->plt.noncall_refcount == 0
12951 && SYMBOL_REFERENCES_LOCAL (info, h))
12952 /* All non-call references can be resolved directly.
12953 This means that they can (and in some cases, must)
12954 resolve directly to the run-time target, rather than
12955 to the PLT. That in turns means that any .got entry
12956 would be equal to the .igot.plt entry, so there's
12957 no point having both. */
12958 h->got.refcount = 0;
12959 }
12960
12961 if (info->shared
12962 || eh->is_iplt
12963 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
12964 {
12965 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
12966
12967 /* If this symbol is not defined in a regular file, and we are
12968 not generating a shared library, then set the symbol to this
12969 location in the .plt. This is required to make function
12970 pointers compare as equal between the normal executable and
12971 the shared library. */
12972 if (! info->shared
12973 && !h->def_regular)
12974 {
12975 h->root.u.def.section = htab->root.splt;
12976 h->root.u.def.value = h->plt.offset;
12977
12978 /* Make sure the function is not marked as Thumb, in case
12979 it is the target of an ABS32 relocation, which will
12980 point to the PLT entry. */
12981 h->target_internal = ST_BRANCH_TO_ARM;
12982 }
12983
12984 htab->next_tls_desc_index++;
12985
12986 /* VxWorks executables have a second set of relocations for
12987 each PLT entry. They go in a separate relocation section,
12988 which is processed by the kernel loader. */
12989 if (htab->vxworks_p && !info->shared)
12990 {
12991 /* There is a relocation for the initial PLT entry:
12992 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
12993 if (h->plt.offset == htab->plt_header_size)
12994 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
12995
12996 /* There are two extra relocations for each subsequent
12997 PLT entry: an R_ARM_32 relocation for the GOT entry,
12998 and an R_ARM_32 relocation for the PLT entry. */
12999 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
13000 }
13001 }
13002 else
13003 {
13004 h->plt.offset = (bfd_vma) -1;
13005 h->needs_plt = 0;
13006 }
13007 }
13008 else
13009 {
13010 h->plt.offset = (bfd_vma) -1;
13011 h->needs_plt = 0;
13012 }
13013
13014 eh = (struct elf32_arm_link_hash_entry *) h;
13015 eh->tlsdesc_got = (bfd_vma) -1;
13016
13017 if (h->got.refcount > 0)
13018 {
13019 asection *s;
13020 bfd_boolean dyn;
13021 int tls_type = elf32_arm_hash_entry (h)->tls_type;
13022 int indx;
13023
13024 /* Make sure this symbol is output as a dynamic symbol.
13025 Undefined weak syms won't yet be marked as dynamic. */
13026 if (h->dynindx == -1
13027 && !h->forced_local)
13028 {
13029 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13030 return FALSE;
13031 }
13032
13033 if (!htab->symbian_p)
13034 {
13035 s = htab->root.sgot;
13036 h->got.offset = s->size;
13037
13038 if (tls_type == GOT_UNKNOWN)
13039 abort ();
13040
13041 if (tls_type == GOT_NORMAL)
13042 /* Non-TLS symbols need one GOT slot. */
13043 s->size += 4;
13044 else
13045 {
13046 if (tls_type & GOT_TLS_GDESC)
13047 {
13048 /* R_ARM_TLS_DESC needs 2 GOT slots. */
13049 eh->tlsdesc_got
13050 = (htab->root.sgotplt->size
13051 - elf32_arm_compute_jump_table_size (htab));
13052 htab->root.sgotplt->size += 8;
13053 h->got.offset = (bfd_vma) -2;
13054 /* plt.got_offset needs to know there's a TLS_DESC
13055 reloc in the middle of .got.plt. */
13056 htab->num_tls_desc++;
13057 }
13058
13059 if (tls_type & GOT_TLS_GD)
13060 {
13061 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
13062 the symbol is both GD and GDESC, got.offset may
13063 have been overwritten. */
13064 h->got.offset = s->size;
13065 s->size += 8;
13066 }
13067
13068 if (tls_type & GOT_TLS_IE)
13069 /* R_ARM_TLS_IE32 needs one GOT slot. */
13070 s->size += 4;
13071 }
13072
13073 dyn = htab->root.dynamic_sections_created;
13074
13075 indx = 0;
13076 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
13077 && (!info->shared
13078 || !SYMBOL_REFERENCES_LOCAL (info, h)))
13079 indx = h->dynindx;
13080
13081 if (tls_type != GOT_NORMAL
13082 && (info->shared || indx != 0)
13083 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
13084 || h->root.type != bfd_link_hash_undefweak))
13085 {
13086 if (tls_type & GOT_TLS_IE)
13087 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13088
13089 if (tls_type & GOT_TLS_GD)
13090 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13091
13092 if (tls_type & GOT_TLS_GDESC)
13093 {
13094 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
13095 /* GDESC needs a trampoline to jump to. */
13096 htab->tls_trampoline = -1;
13097 }
13098
13099 /* Only GD needs it. GDESC just emits one relocation per
13100 2 entries. */
13101 if ((tls_type & GOT_TLS_GD) && indx != 0)
13102 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13103 }
13104 else if (!SYMBOL_REFERENCES_LOCAL (info, h))
13105 {
13106 if (htab->root.dynamic_sections_created)
13107 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
13108 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13109 }
13110 else if (h->type == STT_GNU_IFUNC
13111 && eh->plt.noncall_refcount == 0)
13112 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
13113 they all resolve dynamically instead. Reserve room for the
13114 GOT entry's R_ARM_IRELATIVE relocation. */
13115 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
13116 else if (info->shared)
13117 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
13118 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13119 }
13120 }
13121 else
13122 h->got.offset = (bfd_vma) -1;
13123
13124 /* Allocate stubs for exported Thumb functions on v4t. */
13125 if (!htab->use_blx && h->dynindx != -1
13126 && h->def_regular
13127 && h->target_internal == ST_BRANCH_TO_THUMB
13128 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
13129 {
13130 struct elf_link_hash_entry * th;
13131 struct bfd_link_hash_entry * bh;
13132 struct elf_link_hash_entry * myh;
13133 char name[1024];
13134 asection *s;
13135 bh = NULL;
13136 /* Create a new symbol to regist the real location of the function. */
13137 s = h->root.u.def.section;
13138 sprintf (name, "__real_%s", h->root.root.string);
13139 _bfd_generic_link_add_one_symbol (info, s->owner,
13140 name, BSF_GLOBAL, s,
13141 h->root.u.def.value,
13142 NULL, TRUE, FALSE, &bh);
13143
13144 myh = (struct elf_link_hash_entry *) bh;
13145 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
13146 myh->forced_local = 1;
13147 myh->target_internal = ST_BRANCH_TO_THUMB;
13148 eh->export_glue = myh;
13149 th = record_arm_to_thumb_glue (info, h);
13150 /* Point the symbol at the stub. */
13151 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
13152 h->target_internal = ST_BRANCH_TO_ARM;
13153 h->root.u.def.section = th->root.u.def.section;
13154 h->root.u.def.value = th->root.u.def.value & ~1;
13155 }
13156
13157 if (eh->dyn_relocs == NULL)
13158 return TRUE;
13159
13160 /* In the shared -Bsymbolic case, discard space allocated for
13161 dynamic pc-relative relocs against symbols which turn out to be
13162 defined in regular objects. For the normal shared case, discard
13163 space for pc-relative relocs that have become local due to symbol
13164 visibility changes. */
13165
13166 if (info->shared || htab->root.is_relocatable_executable)
13167 {
13168 /* The only relocs that use pc_count are R_ARM_REL32 and
13169 R_ARM_REL32_NOI, which will appear on something like
13170 ".long foo - .". We want calls to protected symbols to resolve
13171 directly to the function rather than going via the plt. If people
13172 want function pointer comparisons to work as expected then they
13173 should avoid writing assembly like ".long foo - .". */
13174 if (SYMBOL_CALLS_LOCAL (info, h))
13175 {
13176 struct elf_dyn_relocs **pp;
13177
13178 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
13179 {
13180 p->count -= p->pc_count;
13181 p->pc_count = 0;
13182 if (p->count == 0)
13183 *pp = p->next;
13184 else
13185 pp = &p->next;
13186 }
13187 }
13188
13189 if (htab->vxworks_p)
13190 {
13191 struct elf_dyn_relocs **pp;
13192
13193 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
13194 {
13195 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
13196 *pp = p->next;
13197 else
13198 pp = &p->next;
13199 }
13200 }
13201
13202 /* Also discard relocs on undefined weak syms with non-default
13203 visibility. */
13204 if (eh->dyn_relocs != NULL
13205 && h->root.type == bfd_link_hash_undefweak)
13206 {
13207 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
13208 eh->dyn_relocs = NULL;
13209
13210 /* Make sure undefined weak symbols are output as a dynamic
13211 symbol in PIEs. */
13212 else if (h->dynindx == -1
13213 && !h->forced_local)
13214 {
13215 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13216 return FALSE;
13217 }
13218 }
13219
13220 else if (htab->root.is_relocatable_executable && h->dynindx == -1
13221 && h->root.type == bfd_link_hash_new)
13222 {
13223 /* Output absolute symbols so that we can create relocations
13224 against them. For normal symbols we output a relocation
13225 against the section that contains them. */
13226 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13227 return FALSE;
13228 }
13229
13230 }
13231 else
13232 {
13233 /* For the non-shared case, discard space for relocs against
13234 symbols which turn out to need copy relocs or are not
13235 dynamic. */
13236
13237 if (!h->non_got_ref
13238 && ((h->def_dynamic
13239 && !h->def_regular)
13240 || (htab->root.dynamic_sections_created
13241 && (h->root.type == bfd_link_hash_undefweak
13242 || h->root.type == bfd_link_hash_undefined))))
13243 {
13244 /* Make sure this symbol is output as a dynamic symbol.
13245 Undefined weak syms won't yet be marked as dynamic. */
13246 if (h->dynindx == -1
13247 && !h->forced_local)
13248 {
13249 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13250 return FALSE;
13251 }
13252
13253 /* If that succeeded, we know we'll be keeping all the
13254 relocs. */
13255 if (h->dynindx != -1)
13256 goto keep;
13257 }
13258
13259 eh->dyn_relocs = NULL;
13260
13261 keep: ;
13262 }
13263
13264 /* Finally, allocate space. */
13265 for (p = eh->dyn_relocs; p != NULL; p = p->next)
13266 {
13267 asection *sreloc = elf_section_data (p->sec)->sreloc;
13268 if (h->type == STT_GNU_IFUNC
13269 && eh->plt.noncall_refcount == 0
13270 && SYMBOL_REFERENCES_LOCAL (info, h))
13271 elf32_arm_allocate_irelocs (info, sreloc, p->count);
13272 else
13273 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
13274 }
13275
13276 return TRUE;
13277 }
13278
13279 /* Find any dynamic relocs that apply to read-only sections. */
13280
13281 static bfd_boolean
13282 elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
13283 {
13284 struct elf32_arm_link_hash_entry * eh;
13285 struct elf_dyn_relocs * p;
13286
13287 eh = (struct elf32_arm_link_hash_entry *) h;
13288 for (p = eh->dyn_relocs; p != NULL; p = p->next)
13289 {
13290 asection *s = p->sec;
13291
13292 if (s != NULL && (s->flags & SEC_READONLY) != 0)
13293 {
13294 struct bfd_link_info *info = (struct bfd_link_info *) inf;
13295
13296 info->flags |= DF_TEXTREL;
13297
13298 /* Not an error, just cut short the traversal. */
13299 return FALSE;
13300 }
13301 }
13302 return TRUE;
13303 }
13304
13305 void
13306 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
13307 int byteswap_code)
13308 {
13309 struct elf32_arm_link_hash_table *globals;
13310
13311 globals = elf32_arm_hash_table (info);
13312 if (globals == NULL)
13313 return;
13314
13315 globals->byteswap_code = byteswap_code;
13316 }
13317
13318 /* Set the sizes of the dynamic sections. */
13319
13320 static bfd_boolean
13321 elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
13322 struct bfd_link_info * info)
13323 {
13324 bfd * dynobj;
13325 asection * s;
13326 bfd_boolean plt;
13327 bfd_boolean relocs;
13328 bfd *ibfd;
13329 struct elf32_arm_link_hash_table *htab;
13330
13331 htab = elf32_arm_hash_table (info);
13332 if (htab == NULL)
13333 return FALSE;
13334
13335 dynobj = elf_hash_table (info)->dynobj;
13336 BFD_ASSERT (dynobj != NULL);
13337 check_use_blx (htab);
13338
13339 if (elf_hash_table (info)->dynamic_sections_created)
13340 {
13341 /* Set the contents of the .interp section to the interpreter. */
13342 if (info->executable)
13343 {
13344 s = bfd_get_section_by_name (dynobj, ".interp");
13345 BFD_ASSERT (s != NULL);
13346 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
13347 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
13348 }
13349 }
13350
13351 /* Set up .got offsets for local syms, and space for local dynamic
13352 relocs. */
13353 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
13354 {
13355 bfd_signed_vma *local_got;
13356 bfd_signed_vma *end_local_got;
13357 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
13358 char *local_tls_type;
13359 bfd_vma *local_tlsdesc_gotent;
13360 bfd_size_type locsymcount;
13361 Elf_Internal_Shdr *symtab_hdr;
13362 asection *srel;
13363 bfd_boolean is_vxworks = htab->vxworks_p;
13364 unsigned int symndx;
13365
13366 if (! is_arm_elf (ibfd))
13367 continue;
13368
13369 for (s = ibfd->sections; s != NULL; s = s->next)
13370 {
13371 struct elf_dyn_relocs *p;
13372
13373 for (p = (struct elf_dyn_relocs *)
13374 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
13375 {
13376 if (!bfd_is_abs_section (p->sec)
13377 && bfd_is_abs_section (p->sec->output_section))
13378 {
13379 /* Input section has been discarded, either because
13380 it is a copy of a linkonce section or due to
13381 linker script /DISCARD/, so we'll be discarding
13382 the relocs too. */
13383 }
13384 else if (is_vxworks
13385 && strcmp (p->sec->output_section->name,
13386 ".tls_vars") == 0)
13387 {
13388 /* Relocations in vxworks .tls_vars sections are
13389 handled specially by the loader. */
13390 }
13391 else if (p->count != 0)
13392 {
13393 srel = elf_section_data (p->sec)->sreloc;
13394 elf32_arm_allocate_dynrelocs (info, srel, p->count);
13395 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
13396 info->flags |= DF_TEXTREL;
13397 }
13398 }
13399 }
13400
13401 local_got = elf_local_got_refcounts (ibfd);
13402 if (!local_got)
13403 continue;
13404
13405 symtab_hdr = & elf_symtab_hdr (ibfd);
13406 locsymcount = symtab_hdr->sh_info;
13407 end_local_got = local_got + locsymcount;
13408 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
13409 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
13410 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
13411 symndx = 0;
13412 s = htab->root.sgot;
13413 srel = htab->root.srelgot;
13414 for (; local_got < end_local_got;
13415 ++local_got, ++local_iplt_ptr, ++local_tls_type,
13416 ++local_tlsdesc_gotent, ++symndx)
13417 {
13418 *local_tlsdesc_gotent = (bfd_vma) -1;
13419 local_iplt = *local_iplt_ptr;
13420 if (local_iplt != NULL)
13421 {
13422 struct elf_dyn_relocs *p;
13423
13424 if (local_iplt->root.refcount > 0)
13425 {
13426 elf32_arm_allocate_plt_entry (info, TRUE,
13427 &local_iplt->root,
13428 &local_iplt->arm);
13429 if (local_iplt->arm.noncall_refcount == 0)
13430 /* All references to the PLT are calls, so all
13431 non-call references can resolve directly to the
13432 run-time target. This means that the .got entry
13433 would be the same as the .igot.plt entry, so there's
13434 no point creating both. */
13435 *local_got = 0;
13436 }
13437 else
13438 {
13439 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
13440 local_iplt->root.offset = (bfd_vma) -1;
13441 }
13442
13443 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
13444 {
13445 asection *psrel;
13446
13447 psrel = elf_section_data (p->sec)->sreloc;
13448 if (local_iplt->arm.noncall_refcount == 0)
13449 elf32_arm_allocate_irelocs (info, psrel, p->count);
13450 else
13451 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
13452 }
13453 }
13454 if (*local_got > 0)
13455 {
13456 Elf_Internal_Sym *isym;
13457
13458 *local_got = s->size;
13459 if (*local_tls_type & GOT_TLS_GD)
13460 /* TLS_GD relocs need an 8-byte structure in the GOT. */
13461 s->size += 8;
13462 if (*local_tls_type & GOT_TLS_GDESC)
13463 {
13464 *local_tlsdesc_gotent = htab->root.sgotplt->size
13465 - elf32_arm_compute_jump_table_size (htab);
13466 htab->root.sgotplt->size += 8;
13467 *local_got = (bfd_vma) -2;
13468 /* plt.got_offset needs to know there's a TLS_DESC
13469 reloc in the middle of .got.plt. */
13470 htab->num_tls_desc++;
13471 }
13472 if (*local_tls_type & GOT_TLS_IE)
13473 s->size += 4;
13474
13475 if (*local_tls_type & GOT_NORMAL)
13476 {
13477 /* If the symbol is both GD and GDESC, *local_got
13478 may have been overwritten. */
13479 *local_got = s->size;
13480 s->size += 4;
13481 }
13482
13483 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
13484 if (isym == NULL)
13485 return FALSE;
13486
13487 /* If all references to an STT_GNU_IFUNC PLT are calls,
13488 then all non-call references, including this GOT entry,
13489 resolve directly to the run-time target. */
13490 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
13491 && (local_iplt == NULL
13492 || local_iplt->arm.noncall_refcount == 0))
13493 elf32_arm_allocate_irelocs (info, srel, 1);
13494 else if ((info->shared && !(*local_tls_type & GOT_TLS_GDESC))
13495 || *local_tls_type & GOT_TLS_GD)
13496 elf32_arm_allocate_dynrelocs (info, srel, 1);
13497
13498 if (info->shared && *local_tls_type & GOT_TLS_GDESC)
13499 {
13500 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
13501 htab->tls_trampoline = -1;
13502 }
13503 }
13504 else
13505 *local_got = (bfd_vma) -1;
13506 }
13507 }
13508
13509 if (htab->tls_ldm_got.refcount > 0)
13510 {
13511 /* Allocate two GOT entries and one dynamic relocation (if necessary)
13512 for R_ARM_TLS_LDM32 relocations. */
13513 htab->tls_ldm_got.offset = htab->root.sgot->size;
13514 htab->root.sgot->size += 8;
13515 if (info->shared)
13516 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13517 }
13518 else
13519 htab->tls_ldm_got.offset = -1;
13520
13521 /* Allocate global sym .plt and .got entries, and space for global
13522 sym dynamic relocs. */
13523 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
13524
13525 /* Here we rummage through the found bfds to collect glue information. */
13526 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
13527 {
13528 if (! is_arm_elf (ibfd))
13529 continue;
13530
13531 /* Initialise mapping tables for code/data. */
13532 bfd_elf32_arm_init_maps (ibfd);
13533
13534 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
13535 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
13536 /* xgettext:c-format */
13537 _bfd_error_handler (_("Errors encountered processing file %s"),
13538 ibfd->filename);
13539 }
13540
13541 /* Allocate space for the glue sections now that we've sized them. */
13542 bfd_elf32_arm_allocate_interworking_sections (info);
13543
13544 /* For every jump slot reserved in the sgotplt, reloc_count is
13545 incremented. However, when we reserve space for TLS descriptors,
13546 it's not incremented, so in order to compute the space reserved
13547 for them, it suffices to multiply the reloc count by the jump
13548 slot size. */
13549 if (htab->root.srelplt)
13550 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
13551
13552 if (htab->tls_trampoline)
13553 {
13554 if (htab->root.splt->size == 0)
13555 htab->root.splt->size += htab->plt_header_size;
13556
13557 htab->tls_trampoline = htab->root.splt->size;
13558 htab->root.splt->size += htab->plt_entry_size;
13559
13560 /* If we're not using lazy TLS relocations, don't generate the
13561 PLT and GOT entries they require. */
13562 if (!(info->flags & DF_BIND_NOW))
13563 {
13564 htab->dt_tlsdesc_got = htab->root.sgot->size;
13565 htab->root.sgot->size += 4;
13566
13567 htab->dt_tlsdesc_plt = htab->root.splt->size;
13568 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
13569 }
13570 }
13571
13572 /* The check_relocs and adjust_dynamic_symbol entry points have
13573 determined the sizes of the various dynamic sections. Allocate
13574 memory for them. */
13575 plt = FALSE;
13576 relocs = FALSE;
13577 for (s = dynobj->sections; s != NULL; s = s->next)
13578 {
13579 const char * name;
13580
13581 if ((s->flags & SEC_LINKER_CREATED) == 0)
13582 continue;
13583
13584 /* It's OK to base decisions on the section name, because none
13585 of the dynobj section names depend upon the input files. */
13586 name = bfd_get_section_name (dynobj, s);
13587
13588 if (s == htab->root.splt)
13589 {
13590 /* Remember whether there is a PLT. */
13591 plt = s->size != 0;
13592 }
13593 else if (CONST_STRNEQ (name, ".rel"))
13594 {
13595 if (s->size != 0)
13596 {
13597 /* Remember whether there are any reloc sections other
13598 than .rel(a).plt and .rela.plt.unloaded. */
13599 if (s != htab->root.srelplt && s != htab->srelplt2)
13600 relocs = TRUE;
13601
13602 /* We use the reloc_count field as a counter if we need
13603 to copy relocs into the output file. */
13604 s->reloc_count = 0;
13605 }
13606 }
13607 else if (s != htab->root.sgot
13608 && s != htab->root.sgotplt
13609 && s != htab->root.iplt
13610 && s != htab->root.igotplt
13611 && s != htab->sdynbss)
13612 {
13613 /* It's not one of our sections, so don't allocate space. */
13614 continue;
13615 }
13616
13617 if (s->size == 0)
13618 {
13619 /* If we don't need this section, strip it from the
13620 output file. This is mostly to handle .rel(a).bss and
13621 .rel(a).plt. We must create both sections in
13622 create_dynamic_sections, because they must be created
13623 before the linker maps input sections to output
13624 sections. The linker does that before
13625 adjust_dynamic_symbol is called, and it is that
13626 function which decides whether anything needs to go
13627 into these sections. */
13628 s->flags |= SEC_EXCLUDE;
13629 continue;
13630 }
13631
13632 if ((s->flags & SEC_HAS_CONTENTS) == 0)
13633 continue;
13634
13635 /* Allocate memory for the section contents. */
13636 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
13637 if (s->contents == NULL)
13638 return FALSE;
13639 }
13640
13641 if (elf_hash_table (info)->dynamic_sections_created)
13642 {
13643 /* Add some entries to the .dynamic section. We fill in the
13644 values later, in elf32_arm_finish_dynamic_sections, but we
13645 must add the entries now so that we get the correct size for
13646 the .dynamic section. The DT_DEBUG entry is filled in by the
13647 dynamic linker and used by the debugger. */
13648 #define add_dynamic_entry(TAG, VAL) \
13649 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
13650
13651 if (info->executable)
13652 {
13653 if (!add_dynamic_entry (DT_DEBUG, 0))
13654 return FALSE;
13655 }
13656
13657 if (plt)
13658 {
13659 if ( !add_dynamic_entry (DT_PLTGOT, 0)
13660 || !add_dynamic_entry (DT_PLTRELSZ, 0)
13661 || !add_dynamic_entry (DT_PLTREL,
13662 htab->use_rel ? DT_REL : DT_RELA)
13663 || !add_dynamic_entry (DT_JMPREL, 0))
13664 return FALSE;
13665
13666 if (htab->dt_tlsdesc_plt &&
13667 (!add_dynamic_entry (DT_TLSDESC_PLT,0)
13668 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
13669 return FALSE;
13670 }
13671
13672 if (relocs)
13673 {
13674 if (htab->use_rel)
13675 {
13676 if (!add_dynamic_entry (DT_REL, 0)
13677 || !add_dynamic_entry (DT_RELSZ, 0)
13678 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
13679 return FALSE;
13680 }
13681 else
13682 {
13683 if (!add_dynamic_entry (DT_RELA, 0)
13684 || !add_dynamic_entry (DT_RELASZ, 0)
13685 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
13686 return FALSE;
13687 }
13688 }
13689
13690 /* If any dynamic relocs apply to a read-only section,
13691 then we need a DT_TEXTREL entry. */
13692 if ((info->flags & DF_TEXTREL) == 0)
13693 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
13694 info);
13695
13696 if ((info->flags & DF_TEXTREL) != 0)
13697 {
13698 if (!add_dynamic_entry (DT_TEXTREL, 0))
13699 return FALSE;
13700 }
13701 if (htab->vxworks_p
13702 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
13703 return FALSE;
13704 }
13705 #undef add_dynamic_entry
13706
13707 return TRUE;
13708 }
13709
13710 /* Size sections even though they're not dynamic. We use it to setup
13711 _TLS_MODULE_BASE_, if needed. */
13712
13713 static bfd_boolean
13714 elf32_arm_always_size_sections (bfd *output_bfd,
13715 struct bfd_link_info *info)
13716 {
13717 asection *tls_sec;
13718
13719 if (info->relocatable)
13720 return TRUE;
13721
13722 tls_sec = elf_hash_table (info)->tls_sec;
13723
13724 if (tls_sec)
13725 {
13726 struct elf_link_hash_entry *tlsbase;
13727
13728 tlsbase = elf_link_hash_lookup
13729 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
13730
13731 if (tlsbase)
13732 {
13733 struct bfd_link_hash_entry *bh = NULL;
13734 const struct elf_backend_data *bed
13735 = get_elf_backend_data (output_bfd);
13736
13737 if (!(_bfd_generic_link_add_one_symbol
13738 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
13739 tls_sec, 0, NULL, FALSE,
13740 bed->collect, &bh)))
13741 return FALSE;
13742
13743 tlsbase->type = STT_TLS;
13744 tlsbase = (struct elf_link_hash_entry *)bh;
13745 tlsbase->def_regular = 1;
13746 tlsbase->other = STV_HIDDEN;
13747 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
13748 }
13749 }
13750 return TRUE;
13751 }
13752
13753 /* Finish up dynamic symbol handling. We set the contents of various
13754 dynamic sections here. */
13755
13756 static bfd_boolean
13757 elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
13758 struct bfd_link_info * info,
13759 struct elf_link_hash_entry * h,
13760 Elf_Internal_Sym * sym)
13761 {
13762 struct elf32_arm_link_hash_table *htab;
13763 struct elf32_arm_link_hash_entry *eh;
13764
13765 htab = elf32_arm_hash_table (info);
13766 if (htab == NULL)
13767 return FALSE;
13768
13769 eh = (struct elf32_arm_link_hash_entry *) h;
13770
13771 if (h->plt.offset != (bfd_vma) -1)
13772 {
13773 if (!eh->is_iplt)
13774 {
13775 BFD_ASSERT (h->dynindx != -1);
13776 elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
13777 h->dynindx, 0);
13778 }
13779
13780 if (!h->def_regular)
13781 {
13782 /* Mark the symbol as undefined, rather than as defined in
13783 the .plt section. Leave the value alone. */
13784 sym->st_shndx = SHN_UNDEF;
13785 /* If the symbol is weak, we do need to clear the value.
13786 Otherwise, the PLT entry would provide a definition for
13787 the symbol even if the symbol wasn't defined anywhere,
13788 and so the symbol would never be NULL. */
13789 if (!h->ref_regular_nonweak)
13790 sym->st_value = 0;
13791 }
13792 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
13793 {
13794 /* At least one non-call relocation references this .iplt entry,
13795 so the .iplt entry is the function's canonical address. */
13796 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
13797 sym->st_target_internal = ST_BRANCH_TO_ARM;
13798 sym->st_shndx = (_bfd_elf_section_from_bfd_section
13799 (output_bfd, htab->root.iplt->output_section));
13800 sym->st_value = (h->plt.offset
13801 + htab->root.iplt->output_section->vma
13802 + htab->root.iplt->output_offset);
13803 }
13804 }
13805
13806 if (h->needs_copy)
13807 {
13808 asection * s;
13809 Elf_Internal_Rela rel;
13810
13811 /* This symbol needs a copy reloc. Set it up. */
13812 BFD_ASSERT (h->dynindx != -1
13813 && (h->root.type == bfd_link_hash_defined
13814 || h->root.type == bfd_link_hash_defweak));
13815
13816 s = htab->srelbss;
13817 BFD_ASSERT (s != NULL);
13818
13819 rel.r_addend = 0;
13820 rel.r_offset = (h->root.u.def.value
13821 + h->root.u.def.section->output_section->vma
13822 + h->root.u.def.section->output_offset);
13823 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
13824 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
13825 }
13826
13827 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
13828 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
13829 to the ".got" section. */
13830 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
13831 || (!htab->vxworks_p && h == htab->root.hgot))
13832 sym->st_shndx = SHN_ABS;
13833
13834 return TRUE;
13835 }
13836
13837 static void
13838 arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
13839 void *contents,
13840 const unsigned long *template, unsigned count)
13841 {
13842 unsigned ix;
13843
13844 for (ix = 0; ix != count; ix++)
13845 {
13846 unsigned long insn = template[ix];
13847
13848 /* Emit mov pc,rx if bx is not permitted. */
13849 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
13850 insn = (insn & 0xf000000f) | 0x01a0f000;
13851 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
13852 }
13853 }
13854
13855 /* Finish up the dynamic sections. */
13856
13857 static bfd_boolean
13858 elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
13859 {
13860 bfd * dynobj;
13861 asection * sgot;
13862 asection * sdyn;
13863 struct elf32_arm_link_hash_table *htab;
13864
13865 htab = elf32_arm_hash_table (info);
13866 if (htab == NULL)
13867 return FALSE;
13868
13869 dynobj = elf_hash_table (info)->dynobj;
13870
13871 sgot = htab->root.sgotplt;
13872 /* A broken linker script might have discarded the dynamic sections.
13873 Catch this here so that we do not seg-fault later on. */
13874 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
13875 return FALSE;
13876 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
13877
13878 if (elf_hash_table (info)->dynamic_sections_created)
13879 {
13880 asection *splt;
13881 Elf32_External_Dyn *dyncon, *dynconend;
13882
13883 splt = htab->root.splt;
13884 BFD_ASSERT (splt != NULL && sdyn != NULL);
13885 BFD_ASSERT (htab->symbian_p || sgot != NULL);
13886
13887 dyncon = (Elf32_External_Dyn *) sdyn->contents;
13888 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
13889
13890 for (; dyncon < dynconend; dyncon++)
13891 {
13892 Elf_Internal_Dyn dyn;
13893 const char * name;
13894 asection * s;
13895
13896 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
13897
13898 switch (dyn.d_tag)
13899 {
13900 unsigned int type;
13901
13902 default:
13903 if (htab->vxworks_p
13904 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
13905 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13906 break;
13907
13908 case DT_HASH:
13909 name = ".hash";
13910 goto get_vma_if_bpabi;
13911 case DT_STRTAB:
13912 name = ".dynstr";
13913 goto get_vma_if_bpabi;
13914 case DT_SYMTAB:
13915 name = ".dynsym";
13916 goto get_vma_if_bpabi;
13917 case DT_VERSYM:
13918 name = ".gnu.version";
13919 goto get_vma_if_bpabi;
13920 case DT_VERDEF:
13921 name = ".gnu.version_d";
13922 goto get_vma_if_bpabi;
13923 case DT_VERNEED:
13924 name = ".gnu.version_r";
13925 goto get_vma_if_bpabi;
13926
13927 case DT_PLTGOT:
13928 name = ".got";
13929 goto get_vma;
13930 case DT_JMPREL:
13931 name = RELOC_SECTION (htab, ".plt");
13932 get_vma:
13933 s = bfd_get_section_by_name (output_bfd, name);
13934 BFD_ASSERT (s != NULL);
13935 if (!htab->symbian_p)
13936 dyn.d_un.d_ptr = s->vma;
13937 else
13938 /* In the BPABI, tags in the PT_DYNAMIC section point
13939 at the file offset, not the memory address, for the
13940 convenience of the post linker. */
13941 dyn.d_un.d_ptr = s->filepos;
13942 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13943 break;
13944
13945 get_vma_if_bpabi:
13946 if (htab->symbian_p)
13947 goto get_vma;
13948 break;
13949
13950 case DT_PLTRELSZ:
13951 s = htab->root.srelplt;
13952 BFD_ASSERT (s != NULL);
13953 dyn.d_un.d_val = s->size;
13954 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13955 break;
13956
13957 case DT_RELSZ:
13958 case DT_RELASZ:
13959 if (!htab->symbian_p)
13960 {
13961 /* My reading of the SVR4 ABI indicates that the
13962 procedure linkage table relocs (DT_JMPREL) should be
13963 included in the overall relocs (DT_REL). This is
13964 what Solaris does. However, UnixWare can not handle
13965 that case. Therefore, we override the DT_RELSZ entry
13966 here to make it not include the JMPREL relocs. Since
13967 the linker script arranges for .rel(a).plt to follow all
13968 other relocation sections, we don't have to worry
13969 about changing the DT_REL entry. */
13970 s = htab->root.srelplt;
13971 if (s != NULL)
13972 dyn.d_un.d_val -= s->size;
13973 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13974 break;
13975 }
13976 /* Fall through. */
13977
13978 case DT_REL:
13979 case DT_RELA:
13980 /* In the BPABI, the DT_REL tag must point at the file
13981 offset, not the VMA, of the first relocation
13982 section. So, we use code similar to that in
13983 elflink.c, but do not check for SHF_ALLOC on the
13984 relcoation section, since relocations sections are
13985 never allocated under the BPABI. The comments above
13986 about Unixware notwithstanding, we include all of the
13987 relocations here. */
13988 if (htab->symbian_p)
13989 {
13990 unsigned int i;
13991 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
13992 ? SHT_REL : SHT_RELA);
13993 dyn.d_un.d_val = 0;
13994 for (i = 1; i < elf_numsections (output_bfd); i++)
13995 {
13996 Elf_Internal_Shdr *hdr
13997 = elf_elfsections (output_bfd)[i];
13998 if (hdr->sh_type == type)
13999 {
14000 if (dyn.d_tag == DT_RELSZ
14001 || dyn.d_tag == DT_RELASZ)
14002 dyn.d_un.d_val += hdr->sh_size;
14003 else if ((ufile_ptr) hdr->sh_offset
14004 <= dyn.d_un.d_val - 1)
14005 dyn.d_un.d_val = hdr->sh_offset;
14006 }
14007 }
14008 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14009 }
14010 break;
14011
14012 case DT_TLSDESC_PLT:
14013 s = htab->root.splt;
14014 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
14015 + htab->dt_tlsdesc_plt);
14016 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14017 break;
14018
14019 case DT_TLSDESC_GOT:
14020 s = htab->root.sgot;
14021 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
14022 + htab->dt_tlsdesc_got);
14023 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14024 break;
14025
14026 /* Set the bottom bit of DT_INIT/FINI if the
14027 corresponding function is Thumb. */
14028 case DT_INIT:
14029 name = info->init_function;
14030 goto get_sym;
14031 case DT_FINI:
14032 name = info->fini_function;
14033 get_sym:
14034 /* If it wasn't set by elf_bfd_final_link
14035 then there is nothing to adjust. */
14036 if (dyn.d_un.d_val != 0)
14037 {
14038 struct elf_link_hash_entry * eh;
14039
14040 eh = elf_link_hash_lookup (elf_hash_table (info), name,
14041 FALSE, FALSE, TRUE);
14042 if (eh != NULL && eh->target_internal == ST_BRANCH_TO_THUMB)
14043 {
14044 dyn.d_un.d_val |= 1;
14045 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14046 }
14047 }
14048 break;
14049 }
14050 }
14051
14052 /* Fill in the first entry in the procedure linkage table. */
14053 if (splt->size > 0 && htab->plt_header_size)
14054 {
14055 const bfd_vma *plt0_entry;
14056 bfd_vma got_address, plt_address, got_displacement;
14057
14058 /* Calculate the addresses of the GOT and PLT. */
14059 got_address = sgot->output_section->vma + sgot->output_offset;
14060 plt_address = splt->output_section->vma + splt->output_offset;
14061
14062 if (htab->vxworks_p)
14063 {
14064 /* The VxWorks GOT is relocated by the dynamic linker.
14065 Therefore, we must emit relocations rather than simply
14066 computing the values now. */
14067 Elf_Internal_Rela rel;
14068
14069 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
14070 put_arm_insn (htab, output_bfd, plt0_entry[0],
14071 splt->contents + 0);
14072 put_arm_insn (htab, output_bfd, plt0_entry[1],
14073 splt->contents + 4);
14074 put_arm_insn (htab, output_bfd, plt0_entry[2],
14075 splt->contents + 8);
14076 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
14077
14078 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
14079 rel.r_offset = plt_address + 12;
14080 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
14081 rel.r_addend = 0;
14082 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
14083 htab->srelplt2->contents);
14084 }
14085 else
14086 {
14087 got_displacement = got_address - (plt_address + 16);
14088
14089 plt0_entry = elf32_arm_plt0_entry;
14090 put_arm_insn (htab, output_bfd, plt0_entry[0],
14091 splt->contents + 0);
14092 put_arm_insn (htab, output_bfd, plt0_entry[1],
14093 splt->contents + 4);
14094 put_arm_insn (htab, output_bfd, plt0_entry[2],
14095 splt->contents + 8);
14096 put_arm_insn (htab, output_bfd, plt0_entry[3],
14097 splt->contents + 12);
14098
14099 #ifdef FOUR_WORD_PLT
14100 /* The displacement value goes in the otherwise-unused
14101 last word of the second entry. */
14102 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
14103 #else
14104 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
14105 #endif
14106 }
14107 }
14108
14109 /* UnixWare sets the entsize of .plt to 4, although that doesn't
14110 really seem like the right value. */
14111 if (splt->output_section->owner == output_bfd)
14112 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
14113
14114 if (htab->dt_tlsdesc_plt)
14115 {
14116 bfd_vma got_address
14117 = sgot->output_section->vma + sgot->output_offset;
14118 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
14119 + htab->root.sgot->output_offset);
14120 bfd_vma plt_address
14121 = splt->output_section->vma + splt->output_offset;
14122
14123 arm_put_trampoline (htab, output_bfd,
14124 splt->contents + htab->dt_tlsdesc_plt,
14125 dl_tlsdesc_lazy_trampoline, 6);
14126
14127 bfd_put_32 (output_bfd,
14128 gotplt_address + htab->dt_tlsdesc_got
14129 - (plt_address + htab->dt_tlsdesc_plt)
14130 - dl_tlsdesc_lazy_trampoline[6],
14131 splt->contents + htab->dt_tlsdesc_plt + 24);
14132 bfd_put_32 (output_bfd,
14133 got_address - (plt_address + htab->dt_tlsdesc_plt)
14134 - dl_tlsdesc_lazy_trampoline[7],
14135 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
14136 }
14137
14138 if (htab->tls_trampoline)
14139 {
14140 arm_put_trampoline (htab, output_bfd,
14141 splt->contents + htab->tls_trampoline,
14142 tls_trampoline, 3);
14143 #ifdef FOUR_WORD_PLT
14144 bfd_put_32 (output_bfd, 0x00000000,
14145 splt->contents + htab->tls_trampoline + 12);
14146 #endif
14147 }
14148
14149 if (htab->vxworks_p && !info->shared && htab->root.splt->size > 0)
14150 {
14151 /* Correct the .rel(a).plt.unloaded relocations. They will have
14152 incorrect symbol indexes. */
14153 int num_plts;
14154 unsigned char *p;
14155
14156 num_plts = ((htab->root.splt->size - htab->plt_header_size)
14157 / htab->plt_entry_size);
14158 p = htab->srelplt2->contents + RELOC_SIZE (htab);
14159
14160 for (; num_plts; num_plts--)
14161 {
14162 Elf_Internal_Rela rel;
14163
14164 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
14165 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
14166 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
14167 p += RELOC_SIZE (htab);
14168
14169 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
14170 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
14171 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
14172 p += RELOC_SIZE (htab);
14173 }
14174 }
14175 }
14176
14177 /* Fill in the first three entries in the global offset table. */
14178 if (sgot)
14179 {
14180 if (sgot->size > 0)
14181 {
14182 if (sdyn == NULL)
14183 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
14184 else
14185 bfd_put_32 (output_bfd,
14186 sdyn->output_section->vma + sdyn->output_offset,
14187 sgot->contents);
14188 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
14189 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
14190 }
14191
14192 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
14193 }
14194
14195 return TRUE;
14196 }
14197
14198 static void
14199 elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
14200 {
14201 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
14202 struct elf32_arm_link_hash_table *globals;
14203
14204 i_ehdrp = elf_elfheader (abfd);
14205
14206 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
14207 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
14208 else
14209 i_ehdrp->e_ident[EI_OSABI] = 0;
14210 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
14211
14212 if (link_info)
14213 {
14214 globals = elf32_arm_hash_table (link_info);
14215 if (globals != NULL && globals->byteswap_code)
14216 i_ehdrp->e_flags |= EF_ARM_BE8;
14217 }
14218 }
14219
14220 static enum elf_reloc_type_class
14221 elf32_arm_reloc_type_class (const Elf_Internal_Rela *rela)
14222 {
14223 switch ((int) ELF32_R_TYPE (rela->r_info))
14224 {
14225 case R_ARM_RELATIVE:
14226 return reloc_class_relative;
14227 case R_ARM_JUMP_SLOT:
14228 return reloc_class_plt;
14229 case R_ARM_COPY:
14230 return reloc_class_copy;
14231 default:
14232 return reloc_class_normal;
14233 }
14234 }
14235
14236 static void
14237 elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
14238 {
14239 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
14240 }
14241
14242 /* Return TRUE if this is an unwinding table entry. */
14243
14244 static bfd_boolean
14245 is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
14246 {
14247 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
14248 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
14249 }
14250
14251
14252 /* Set the type and flags for an ARM section. We do this by
14253 the section name, which is a hack, but ought to work. */
14254
14255 static bfd_boolean
14256 elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
14257 {
14258 const char * name;
14259
14260 name = bfd_get_section_name (abfd, sec);
14261
14262 if (is_arm_elf_unwind_section_name (abfd, name))
14263 {
14264 hdr->sh_type = SHT_ARM_EXIDX;
14265 hdr->sh_flags |= SHF_LINK_ORDER;
14266 }
14267 return TRUE;
14268 }
14269
14270 /* Handle an ARM specific section when reading an object file. This is
14271 called when bfd_section_from_shdr finds a section with an unknown
14272 type. */
14273
14274 static bfd_boolean
14275 elf32_arm_section_from_shdr (bfd *abfd,
14276 Elf_Internal_Shdr * hdr,
14277 const char *name,
14278 int shindex)
14279 {
14280 /* There ought to be a place to keep ELF backend specific flags, but
14281 at the moment there isn't one. We just keep track of the
14282 sections by their name, instead. Fortunately, the ABI gives
14283 names for all the ARM specific sections, so we will probably get
14284 away with this. */
14285 switch (hdr->sh_type)
14286 {
14287 case SHT_ARM_EXIDX:
14288 case SHT_ARM_PREEMPTMAP:
14289 case SHT_ARM_ATTRIBUTES:
14290 break;
14291
14292 default:
14293 return FALSE;
14294 }
14295
14296 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
14297 return FALSE;
14298
14299 return TRUE;
14300 }
14301
14302 static _arm_elf_section_data *
14303 get_arm_elf_section_data (asection * sec)
14304 {
14305 if (sec && sec->owner && is_arm_elf (sec->owner))
14306 return elf32_arm_section_data (sec);
14307 else
14308 return NULL;
14309 }
14310
14311 typedef struct
14312 {
14313 void *finfo;
14314 struct bfd_link_info *info;
14315 asection *sec;
14316 int sec_shndx;
14317 int (*func) (void *, const char *, Elf_Internal_Sym *,
14318 asection *, struct elf_link_hash_entry *);
14319 } output_arch_syminfo;
14320
14321 enum map_symbol_type
14322 {
14323 ARM_MAP_ARM,
14324 ARM_MAP_THUMB,
14325 ARM_MAP_DATA
14326 };
14327
14328
14329 /* Output a single mapping symbol. */
14330
14331 static bfd_boolean
14332 elf32_arm_output_map_sym (output_arch_syminfo *osi,
14333 enum map_symbol_type type,
14334 bfd_vma offset)
14335 {
14336 static const char *names[3] = {"$a", "$t", "$d"};
14337 Elf_Internal_Sym sym;
14338
14339 sym.st_value = osi->sec->output_section->vma
14340 + osi->sec->output_offset
14341 + offset;
14342 sym.st_size = 0;
14343 sym.st_other = 0;
14344 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
14345 sym.st_shndx = osi->sec_shndx;
14346 sym.st_target_internal = 0;
14347 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
14348 return osi->func (osi->finfo, names[type], &sym, osi->sec, NULL) == 1;
14349 }
14350
14351 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
14352 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
14353
14354 static bfd_boolean
14355 elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
14356 bfd_boolean is_iplt_entry_p,
14357 union gotplt_union *root_plt,
14358 struct arm_plt_info *arm_plt)
14359 {
14360 struct elf32_arm_link_hash_table *htab;
14361 bfd_vma addr, plt_header_size;
14362
14363 if (root_plt->offset == (bfd_vma) -1)
14364 return TRUE;
14365
14366 htab = elf32_arm_hash_table (osi->info);
14367 if (htab == NULL)
14368 return FALSE;
14369
14370 if (is_iplt_entry_p)
14371 {
14372 osi->sec = htab->root.iplt;
14373 plt_header_size = 0;
14374 }
14375 else
14376 {
14377 osi->sec = htab->root.splt;
14378 plt_header_size = htab->plt_header_size;
14379 }
14380 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
14381 (osi->info->output_bfd, osi->sec->output_section));
14382
14383 addr = root_plt->offset & -2;
14384 if (htab->symbian_p)
14385 {
14386 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14387 return FALSE;
14388 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
14389 return FALSE;
14390 }
14391 else if (htab->vxworks_p)
14392 {
14393 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14394 return FALSE;
14395 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
14396 return FALSE;
14397 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
14398 return FALSE;
14399 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
14400 return FALSE;
14401 }
14402 else
14403 {
14404 bfd_boolean thumb_stub_p;
14405
14406 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
14407 if (thumb_stub_p)
14408 {
14409 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
14410 return FALSE;
14411 }
14412 #ifdef FOUR_WORD_PLT
14413 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14414 return FALSE;
14415 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
14416 return FALSE;
14417 #else
14418 /* A three-word PLT with no Thumb thunk contains only Arm code,
14419 so only need to output a mapping symbol for the first PLT entry and
14420 entries with thumb thunks. */
14421 if (thumb_stub_p || addr == plt_header_size)
14422 {
14423 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14424 return FALSE;
14425 }
14426 #endif
14427 }
14428
14429 return TRUE;
14430 }
14431
14432 /* Output mapping symbols for PLT entries associated with H. */
14433
14434 static bfd_boolean
14435 elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
14436 {
14437 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
14438 struct elf32_arm_link_hash_entry *eh;
14439
14440 if (h->root.type == bfd_link_hash_indirect)
14441 return TRUE;
14442
14443 if (h->root.type == bfd_link_hash_warning)
14444 /* When warning symbols are created, they **replace** the "real"
14445 entry in the hash table, thus we never get to see the real
14446 symbol in a hash traversal. So look at it now. */
14447 h = (struct elf_link_hash_entry *) h->root.u.i.link;
14448
14449 eh = (struct elf32_arm_link_hash_entry *) h;
14450 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
14451 &h->plt, &eh->plt);
14452 }
14453
14454 /* Output a single local symbol for a generated stub. */
14455
14456 static bfd_boolean
14457 elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
14458 bfd_vma offset, bfd_vma size)
14459 {
14460 Elf_Internal_Sym sym;
14461
14462 sym.st_value = osi->sec->output_section->vma
14463 + osi->sec->output_offset
14464 + offset;
14465 sym.st_size = size;
14466 sym.st_other = 0;
14467 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
14468 sym.st_shndx = osi->sec_shndx;
14469 sym.st_target_internal = 0;
14470 return osi->func (osi->finfo, name, &sym, osi->sec, NULL) == 1;
14471 }
14472
14473 static bfd_boolean
14474 arm_map_one_stub (struct bfd_hash_entry * gen_entry,
14475 void * in_arg)
14476 {
14477 struct elf32_arm_stub_hash_entry *stub_entry;
14478 asection *stub_sec;
14479 bfd_vma addr;
14480 char *stub_name;
14481 output_arch_syminfo *osi;
14482 const insn_sequence *template_sequence;
14483 enum stub_insn_type prev_type;
14484 int size;
14485 int i;
14486 enum map_symbol_type sym_type;
14487
14488 /* Massage our args to the form they really have. */
14489 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
14490 osi = (output_arch_syminfo *) in_arg;
14491
14492 stub_sec = stub_entry->stub_sec;
14493
14494 /* Ensure this stub is attached to the current section being
14495 processed. */
14496 if (stub_sec != osi->sec)
14497 return TRUE;
14498
14499 addr = (bfd_vma) stub_entry->stub_offset;
14500 stub_name = stub_entry->output_name;
14501
14502 template_sequence = stub_entry->stub_template;
14503 switch (template_sequence[0].type)
14504 {
14505 case ARM_TYPE:
14506 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
14507 return FALSE;
14508 break;
14509 case THUMB16_TYPE:
14510 case THUMB32_TYPE:
14511 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
14512 stub_entry->stub_size))
14513 return FALSE;
14514 break;
14515 default:
14516 BFD_FAIL ();
14517 return 0;
14518 }
14519
14520 prev_type = DATA_TYPE;
14521 size = 0;
14522 for (i = 0; i < stub_entry->stub_template_size; i++)
14523 {
14524 switch (template_sequence[i].type)
14525 {
14526 case ARM_TYPE:
14527 sym_type = ARM_MAP_ARM;
14528 break;
14529
14530 case THUMB16_TYPE:
14531 case THUMB32_TYPE:
14532 sym_type = ARM_MAP_THUMB;
14533 break;
14534
14535 case DATA_TYPE:
14536 sym_type = ARM_MAP_DATA;
14537 break;
14538
14539 default:
14540 BFD_FAIL ();
14541 return FALSE;
14542 }
14543
14544 if (template_sequence[i].type != prev_type)
14545 {
14546 prev_type = template_sequence[i].type;
14547 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
14548 return FALSE;
14549 }
14550
14551 switch (template_sequence[i].type)
14552 {
14553 case ARM_TYPE:
14554 case THUMB32_TYPE:
14555 size += 4;
14556 break;
14557
14558 case THUMB16_TYPE:
14559 size += 2;
14560 break;
14561
14562 case DATA_TYPE:
14563 size += 4;
14564 break;
14565
14566 default:
14567 BFD_FAIL ();
14568 return FALSE;
14569 }
14570 }
14571
14572 return TRUE;
14573 }
14574
14575 /* Output mapping symbols for linker generated sections,
14576 and for those data-only sections that do not have a
14577 $d. */
14578
14579 static bfd_boolean
14580 elf32_arm_output_arch_local_syms (bfd *output_bfd,
14581 struct bfd_link_info *info,
14582 void *finfo,
14583 int (*func) (void *, const char *,
14584 Elf_Internal_Sym *,
14585 asection *,
14586 struct elf_link_hash_entry *))
14587 {
14588 output_arch_syminfo osi;
14589 struct elf32_arm_link_hash_table *htab;
14590 bfd_vma offset;
14591 bfd_size_type size;
14592 bfd *input_bfd;
14593
14594 htab = elf32_arm_hash_table (info);
14595 if (htab == NULL)
14596 return FALSE;
14597
14598 check_use_blx (htab);
14599
14600 osi.finfo = finfo;
14601 osi.info = info;
14602 osi.func = func;
14603
14604 /* Add a $d mapping symbol to data-only sections that
14605 don't have any mapping symbol. This may result in (harmless) redundant
14606 mapping symbols. */
14607 for (input_bfd = info->input_bfds;
14608 input_bfd != NULL;
14609 input_bfd = input_bfd->link_next)
14610 {
14611 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
14612 for (osi.sec = input_bfd->sections;
14613 osi.sec != NULL;
14614 osi.sec = osi.sec->next)
14615 {
14616 if (osi.sec->output_section != NULL
14617 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
14618 != 0)
14619 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
14620 == SEC_HAS_CONTENTS
14621 && get_arm_elf_section_data (osi.sec) != NULL
14622 && get_arm_elf_section_data (osi.sec)->mapcount == 0
14623 && osi.sec->size > 0
14624 && (osi.sec->flags & SEC_EXCLUDE) == 0)
14625 {
14626 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14627 (output_bfd, osi.sec->output_section);
14628 if (osi.sec_shndx != (int)SHN_BAD)
14629 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
14630 }
14631 }
14632 }
14633
14634 /* ARM->Thumb glue. */
14635 if (htab->arm_glue_size > 0)
14636 {
14637 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
14638 ARM2THUMB_GLUE_SECTION_NAME);
14639
14640 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14641 (output_bfd, osi.sec->output_section);
14642 if (info->shared || htab->root.is_relocatable_executable
14643 || htab->pic_veneer)
14644 size = ARM2THUMB_PIC_GLUE_SIZE;
14645 else if (htab->use_blx)
14646 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
14647 else
14648 size = ARM2THUMB_STATIC_GLUE_SIZE;
14649
14650 for (offset = 0; offset < htab->arm_glue_size; offset += size)
14651 {
14652 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
14653 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
14654 }
14655 }
14656
14657 /* Thumb->ARM glue. */
14658 if (htab->thumb_glue_size > 0)
14659 {
14660 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
14661 THUMB2ARM_GLUE_SECTION_NAME);
14662
14663 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14664 (output_bfd, osi.sec->output_section);
14665 size = THUMB2ARM_GLUE_SIZE;
14666
14667 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
14668 {
14669 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
14670 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
14671 }
14672 }
14673
14674 /* ARMv4 BX veneers. */
14675 if (htab->bx_glue_size > 0)
14676 {
14677 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
14678 ARM_BX_GLUE_SECTION_NAME);
14679
14680 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14681 (output_bfd, osi.sec->output_section);
14682
14683 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
14684 }
14685
14686 /* Long calls stubs. */
14687 if (htab->stub_bfd && htab->stub_bfd->sections)
14688 {
14689 asection* stub_sec;
14690
14691 for (stub_sec = htab->stub_bfd->sections;
14692 stub_sec != NULL;
14693 stub_sec = stub_sec->next)
14694 {
14695 /* Ignore non-stub sections. */
14696 if (!strstr (stub_sec->name, STUB_SUFFIX))
14697 continue;
14698
14699 osi.sec = stub_sec;
14700
14701 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14702 (output_bfd, osi.sec->output_section);
14703
14704 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
14705 }
14706 }
14707
14708 /* Finally, output mapping symbols for the PLT. */
14709 if (htab->root.splt && htab->root.splt->size > 0)
14710 {
14711 osi.sec = htab->root.splt;
14712 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
14713 (output_bfd, osi.sec->output_section));
14714
14715 /* Output mapping symbols for the plt header. SymbianOS does not have a
14716 plt header. */
14717 if (htab->vxworks_p)
14718 {
14719 /* VxWorks shared libraries have no PLT header. */
14720 if (!info->shared)
14721 {
14722 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
14723 return FALSE;
14724 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
14725 return FALSE;
14726 }
14727 }
14728 else if (!htab->symbian_p)
14729 {
14730 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
14731 return FALSE;
14732 #ifndef FOUR_WORD_PLT
14733 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
14734 return FALSE;
14735 #endif
14736 }
14737 }
14738 if ((htab->root.splt && htab->root.splt->size > 0)
14739 || (htab->root.iplt && htab->root.iplt->size > 0))
14740 {
14741 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
14742 for (input_bfd = info->input_bfds;
14743 input_bfd != NULL;
14744 input_bfd = input_bfd->link_next)
14745 {
14746 struct arm_local_iplt_info **local_iplt;
14747 unsigned int i, num_syms;
14748
14749 local_iplt = elf32_arm_local_iplt (input_bfd);
14750 if (local_iplt != NULL)
14751 {
14752 num_syms = elf_symtab_hdr (input_bfd).sh_info;
14753 for (i = 0; i < num_syms; i++)
14754 if (local_iplt[i] != NULL
14755 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
14756 &local_iplt[i]->root,
14757 &local_iplt[i]->arm))
14758 return FALSE;
14759 }
14760 }
14761 }
14762 if (htab->dt_tlsdesc_plt != 0)
14763 {
14764 /* Mapping symbols for the lazy tls trampoline. */
14765 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
14766 return FALSE;
14767
14768 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
14769 htab->dt_tlsdesc_plt + 24))
14770 return FALSE;
14771 }
14772 if (htab->tls_trampoline != 0)
14773 {
14774 /* Mapping symbols for the tls trampoline. */
14775 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
14776 return FALSE;
14777 #ifdef FOUR_WORD_PLT
14778 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
14779 htab->tls_trampoline + 12))
14780 return FALSE;
14781 #endif
14782 }
14783
14784 return TRUE;
14785 }
14786
14787 /* Allocate target specific section data. */
14788
14789 static bfd_boolean
14790 elf32_arm_new_section_hook (bfd *abfd, asection *sec)
14791 {
14792 if (!sec->used_by_bfd)
14793 {
14794 _arm_elf_section_data *sdata;
14795 bfd_size_type amt = sizeof (*sdata);
14796
14797 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
14798 if (sdata == NULL)
14799 return FALSE;
14800 sec->used_by_bfd = sdata;
14801 }
14802
14803 return _bfd_elf_new_section_hook (abfd, sec);
14804 }
14805
14806
14807 /* Used to order a list of mapping symbols by address. */
14808
14809 static int
14810 elf32_arm_compare_mapping (const void * a, const void * b)
14811 {
14812 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
14813 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
14814
14815 if (amap->vma > bmap->vma)
14816 return 1;
14817 else if (amap->vma < bmap->vma)
14818 return -1;
14819 else if (amap->type > bmap->type)
14820 /* Ensure results do not depend on the host qsort for objects with
14821 multiple mapping symbols at the same address by sorting on type
14822 after vma. */
14823 return 1;
14824 else if (amap->type < bmap->type)
14825 return -1;
14826 else
14827 return 0;
14828 }
14829
14830 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
14831
14832 static unsigned long
14833 offset_prel31 (unsigned long addr, bfd_vma offset)
14834 {
14835 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
14836 }
14837
14838 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
14839 relocations. */
14840
14841 static void
14842 copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
14843 {
14844 unsigned long first_word = bfd_get_32 (output_bfd, from);
14845 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
14846
14847 /* High bit of first word is supposed to be zero. */
14848 if ((first_word & 0x80000000ul) == 0)
14849 first_word = offset_prel31 (first_word, offset);
14850
14851 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
14852 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
14853 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
14854 second_word = offset_prel31 (second_word, offset);
14855
14856 bfd_put_32 (output_bfd, first_word, to);
14857 bfd_put_32 (output_bfd, second_word, to + 4);
14858 }
14859
14860 /* Data for make_branch_to_a8_stub(). */
14861
14862 struct a8_branch_to_stub_data {
14863 asection *writing_section;
14864 bfd_byte *contents;
14865 };
14866
14867
14868 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
14869 places for a particular section. */
14870
14871 static bfd_boolean
14872 make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
14873 void *in_arg)
14874 {
14875 struct elf32_arm_stub_hash_entry *stub_entry;
14876 struct a8_branch_to_stub_data *data;
14877 bfd_byte *contents;
14878 unsigned long branch_insn;
14879 bfd_vma veneered_insn_loc, veneer_entry_loc;
14880 bfd_signed_vma branch_offset;
14881 bfd *abfd;
14882 unsigned int target;
14883
14884 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
14885 data = (struct a8_branch_to_stub_data *) in_arg;
14886
14887 if (stub_entry->target_section != data->writing_section
14888 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
14889 return TRUE;
14890
14891 contents = data->contents;
14892
14893 veneered_insn_loc = stub_entry->target_section->output_section->vma
14894 + stub_entry->target_section->output_offset
14895 + stub_entry->target_value;
14896
14897 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
14898 + stub_entry->stub_sec->output_offset
14899 + stub_entry->stub_offset;
14900
14901 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
14902 veneered_insn_loc &= ~3u;
14903
14904 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
14905
14906 abfd = stub_entry->target_section->owner;
14907 target = stub_entry->target_value;
14908
14909 /* We attempt to avoid this condition by setting stubs_always_after_branch
14910 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
14911 This check is just to be on the safe side... */
14912 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
14913 {
14914 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
14915 "allocated in unsafe location"), abfd);
14916 return FALSE;
14917 }
14918
14919 switch (stub_entry->stub_type)
14920 {
14921 case arm_stub_a8_veneer_b:
14922 case arm_stub_a8_veneer_b_cond:
14923 branch_insn = 0xf0009000;
14924 goto jump24;
14925
14926 case arm_stub_a8_veneer_blx:
14927 branch_insn = 0xf000e800;
14928 goto jump24;
14929
14930 case arm_stub_a8_veneer_bl:
14931 {
14932 unsigned int i1, j1, i2, j2, s;
14933
14934 branch_insn = 0xf000d000;
14935
14936 jump24:
14937 if (branch_offset < -16777216 || branch_offset > 16777214)
14938 {
14939 /* There's not much we can do apart from complain if this
14940 happens. */
14941 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
14942 "of range (input file too large)"), abfd);
14943 return FALSE;
14944 }
14945
14946 /* i1 = not(j1 eor s), so:
14947 not i1 = j1 eor s
14948 j1 = (not i1) eor s. */
14949
14950 branch_insn |= (branch_offset >> 1) & 0x7ff;
14951 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
14952 i2 = (branch_offset >> 22) & 1;
14953 i1 = (branch_offset >> 23) & 1;
14954 s = (branch_offset >> 24) & 1;
14955 j1 = (!i1) ^ s;
14956 j2 = (!i2) ^ s;
14957 branch_insn |= j2 << 11;
14958 branch_insn |= j1 << 13;
14959 branch_insn |= s << 26;
14960 }
14961 break;
14962
14963 default:
14964 BFD_FAIL ();
14965 return FALSE;
14966 }
14967
14968 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[target]);
14969 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[target + 2]);
14970
14971 return TRUE;
14972 }
14973
14974 /* Do code byteswapping. Return FALSE afterwards so that the section is
14975 written out as normal. */
14976
14977 static bfd_boolean
14978 elf32_arm_write_section (bfd *output_bfd,
14979 struct bfd_link_info *link_info,
14980 asection *sec,
14981 bfd_byte *contents)
14982 {
14983 unsigned int mapcount, errcount;
14984 _arm_elf_section_data *arm_data;
14985 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
14986 elf32_arm_section_map *map;
14987 elf32_vfp11_erratum_list *errnode;
14988 bfd_vma ptr;
14989 bfd_vma end;
14990 bfd_vma offset = sec->output_section->vma + sec->output_offset;
14991 bfd_byte tmp;
14992 unsigned int i;
14993
14994 if (globals == NULL)
14995 return FALSE;
14996
14997 /* If this section has not been allocated an _arm_elf_section_data
14998 structure then we cannot record anything. */
14999 arm_data = get_arm_elf_section_data (sec);
15000 if (arm_data == NULL)
15001 return FALSE;
15002
15003 mapcount = arm_data->mapcount;
15004 map = arm_data->map;
15005 errcount = arm_data->erratumcount;
15006
15007 if (errcount != 0)
15008 {
15009 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
15010
15011 for (errnode = arm_data->erratumlist; errnode != 0;
15012 errnode = errnode->next)
15013 {
15014 bfd_vma target = errnode->vma - offset;
15015
15016 switch (errnode->type)
15017 {
15018 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
15019 {
15020 bfd_vma branch_to_veneer;
15021 /* Original condition code of instruction, plus bit mask for
15022 ARM B instruction. */
15023 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
15024 | 0x0a000000;
15025
15026 /* The instruction is before the label. */
15027 target -= 4;
15028
15029 /* Above offset included in -4 below. */
15030 branch_to_veneer = errnode->u.b.veneer->vma
15031 - errnode->vma - 4;
15032
15033 if ((signed) branch_to_veneer < -(1 << 25)
15034 || (signed) branch_to_veneer >= (1 << 25))
15035 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
15036 "range"), output_bfd);
15037
15038 insn |= (branch_to_veneer >> 2) & 0xffffff;
15039 contents[endianflip ^ target] = insn & 0xff;
15040 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
15041 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
15042 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
15043 }
15044 break;
15045
15046 case VFP11_ERRATUM_ARM_VENEER:
15047 {
15048 bfd_vma branch_from_veneer;
15049 unsigned int insn;
15050
15051 /* Take size of veneer into account. */
15052 branch_from_veneer = errnode->u.v.branch->vma
15053 - errnode->vma - 12;
15054
15055 if ((signed) branch_from_veneer < -(1 << 25)
15056 || (signed) branch_from_veneer >= (1 << 25))
15057 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
15058 "range"), output_bfd);
15059
15060 /* Original instruction. */
15061 insn = errnode->u.v.branch->u.b.vfp_insn;
15062 contents[endianflip ^ target] = insn & 0xff;
15063 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
15064 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
15065 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
15066
15067 /* Branch back to insn after original insn. */
15068 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
15069 contents[endianflip ^ (target + 4)] = insn & 0xff;
15070 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
15071 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
15072 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
15073 }
15074 break;
15075
15076 default:
15077 abort ();
15078 }
15079 }
15080 }
15081
15082 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
15083 {
15084 arm_unwind_table_edit *edit_node
15085 = arm_data->u.exidx.unwind_edit_list;
15086 /* Now, sec->size is the size of the section we will write. The original
15087 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
15088 markers) was sec->rawsize. (This isn't the case if we perform no
15089 edits, then rawsize will be zero and we should use size). */
15090 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
15091 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
15092 unsigned int in_index, out_index;
15093 bfd_vma add_to_offsets = 0;
15094
15095 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
15096 {
15097 if (edit_node)
15098 {
15099 unsigned int edit_index = edit_node->index;
15100
15101 if (in_index < edit_index && in_index * 8 < input_size)
15102 {
15103 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
15104 contents + in_index * 8, add_to_offsets);
15105 out_index++;
15106 in_index++;
15107 }
15108 else if (in_index == edit_index
15109 || (in_index * 8 >= input_size
15110 && edit_index == UINT_MAX))
15111 {
15112 switch (edit_node->type)
15113 {
15114 case DELETE_EXIDX_ENTRY:
15115 in_index++;
15116 add_to_offsets += 8;
15117 break;
15118
15119 case INSERT_EXIDX_CANTUNWIND_AT_END:
15120 {
15121 asection *text_sec = edit_node->linked_section;
15122 bfd_vma text_offset = text_sec->output_section->vma
15123 + text_sec->output_offset
15124 + text_sec->size;
15125 bfd_vma exidx_offset = offset + out_index * 8;
15126 unsigned long prel31_offset;
15127
15128 /* Note: this is meant to be equivalent to an
15129 R_ARM_PREL31 relocation. These synthetic
15130 EXIDX_CANTUNWIND markers are not relocated by the
15131 usual BFD method. */
15132 prel31_offset = (text_offset - exidx_offset)
15133 & 0x7ffffffful;
15134
15135 /* First address we can't unwind. */
15136 bfd_put_32 (output_bfd, prel31_offset,
15137 &edited_contents[out_index * 8]);
15138
15139 /* Code for EXIDX_CANTUNWIND. */
15140 bfd_put_32 (output_bfd, 0x1,
15141 &edited_contents[out_index * 8 + 4]);
15142
15143 out_index++;
15144 add_to_offsets -= 8;
15145 }
15146 break;
15147 }
15148
15149 edit_node = edit_node->next;
15150 }
15151 }
15152 else
15153 {
15154 /* No more edits, copy remaining entries verbatim. */
15155 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
15156 contents + in_index * 8, add_to_offsets);
15157 out_index++;
15158 in_index++;
15159 }
15160 }
15161
15162 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
15163 bfd_set_section_contents (output_bfd, sec->output_section,
15164 edited_contents,
15165 (file_ptr) sec->output_offset, sec->size);
15166
15167 return TRUE;
15168 }
15169
15170 /* Fix code to point to Cortex-A8 erratum stubs. */
15171 if (globals->fix_cortex_a8)
15172 {
15173 struct a8_branch_to_stub_data data;
15174
15175 data.writing_section = sec;
15176 data.contents = contents;
15177
15178 bfd_hash_traverse (&globals->stub_hash_table, make_branch_to_a8_stub,
15179 &data);
15180 }
15181
15182 if (mapcount == 0)
15183 return FALSE;
15184
15185 if (globals->byteswap_code)
15186 {
15187 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
15188
15189 ptr = map[0].vma;
15190 for (i = 0; i < mapcount; i++)
15191 {
15192 if (i == mapcount - 1)
15193 end = sec->size;
15194 else
15195 end = map[i + 1].vma;
15196
15197 switch (map[i].type)
15198 {
15199 case 'a':
15200 /* Byte swap code words. */
15201 while (ptr + 3 < end)
15202 {
15203 tmp = contents[ptr];
15204 contents[ptr] = contents[ptr + 3];
15205 contents[ptr + 3] = tmp;
15206 tmp = contents[ptr + 1];
15207 contents[ptr + 1] = contents[ptr + 2];
15208 contents[ptr + 2] = tmp;
15209 ptr += 4;
15210 }
15211 break;
15212
15213 case 't':
15214 /* Byte swap code halfwords. */
15215 while (ptr + 1 < end)
15216 {
15217 tmp = contents[ptr];
15218 contents[ptr] = contents[ptr + 1];
15219 contents[ptr + 1] = tmp;
15220 ptr += 2;
15221 }
15222 break;
15223
15224 case 'd':
15225 /* Leave data alone. */
15226 break;
15227 }
15228 ptr = end;
15229 }
15230 }
15231
15232 free (map);
15233 arm_data->mapcount = -1;
15234 arm_data->mapsize = 0;
15235 arm_data->map = NULL;
15236
15237 return FALSE;
15238 }
15239
15240 /* Mangle thumb function symbols as we read them in. */
15241
15242 static bfd_boolean
15243 elf32_arm_swap_symbol_in (bfd * abfd,
15244 const void *psrc,
15245 const void *pshn,
15246 Elf_Internal_Sym *dst)
15247 {
15248 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
15249 return FALSE;
15250
15251 /* New EABI objects mark thumb function symbols by setting the low bit of
15252 the address. */
15253 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
15254 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
15255 {
15256 if (dst->st_value & 1)
15257 {
15258 dst->st_value &= ~(bfd_vma) 1;
15259 dst->st_target_internal = ST_BRANCH_TO_THUMB;
15260 }
15261 else
15262 dst->st_target_internal = ST_BRANCH_TO_ARM;
15263 }
15264 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
15265 {
15266 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
15267 dst->st_target_internal = ST_BRANCH_TO_THUMB;
15268 }
15269 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
15270 dst->st_target_internal = ST_BRANCH_LONG;
15271 else
15272 dst->st_target_internal = ST_BRANCH_UNKNOWN;
15273
15274 return TRUE;
15275 }
15276
15277
15278 /* Mangle thumb function symbols as we write them out. */
15279
15280 static void
15281 elf32_arm_swap_symbol_out (bfd *abfd,
15282 const Elf_Internal_Sym *src,
15283 void *cdst,
15284 void *shndx)
15285 {
15286 Elf_Internal_Sym newsym;
15287
15288 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
15289 of the address set, as per the new EABI. We do this unconditionally
15290 because objcopy does not set the elf header flags until after
15291 it writes out the symbol table. */
15292 if (src->st_target_internal == ST_BRANCH_TO_THUMB)
15293 {
15294 newsym = *src;
15295 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
15296 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
15297 if (newsym.st_shndx != SHN_UNDEF)
15298 {
15299 /* Do this only for defined symbols. At link type, the static
15300 linker will simulate the work of dynamic linker of resolving
15301 symbols and will carry over the thumbness of found symbols to
15302 the output symbol table. It's not clear how it happens, but
15303 the thumbness of undefined symbols can well be different at
15304 runtime, and writing '1' for them will be confusing for users
15305 and possibly for dynamic linker itself.
15306 */
15307 newsym.st_value |= 1;
15308 }
15309
15310 src = &newsym;
15311 }
15312 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
15313 }
15314
15315 /* Add the PT_ARM_EXIDX program header. */
15316
15317 static bfd_boolean
15318 elf32_arm_modify_segment_map (bfd *abfd,
15319 struct bfd_link_info *info ATTRIBUTE_UNUSED)
15320 {
15321 struct elf_segment_map *m;
15322 asection *sec;
15323
15324 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
15325 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
15326 {
15327 /* If there is already a PT_ARM_EXIDX header, then we do not
15328 want to add another one. This situation arises when running
15329 "strip"; the input binary already has the header. */
15330 m = elf_tdata (abfd)->segment_map;
15331 while (m && m->p_type != PT_ARM_EXIDX)
15332 m = m->next;
15333 if (!m)
15334 {
15335 m = (struct elf_segment_map *)
15336 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
15337 if (m == NULL)
15338 return FALSE;
15339 m->p_type = PT_ARM_EXIDX;
15340 m->count = 1;
15341 m->sections[0] = sec;
15342
15343 m->next = elf_tdata (abfd)->segment_map;
15344 elf_tdata (abfd)->segment_map = m;
15345 }
15346 }
15347
15348 return TRUE;
15349 }
15350
15351 /* We may add a PT_ARM_EXIDX program header. */
15352
15353 static int
15354 elf32_arm_additional_program_headers (bfd *abfd,
15355 struct bfd_link_info *info ATTRIBUTE_UNUSED)
15356 {
15357 asection *sec;
15358
15359 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
15360 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
15361 return 1;
15362 else
15363 return 0;
15364 }
15365
15366 /* Hook called by the linker routine which adds symbols from an object
15367 file. */
15368
15369 static bfd_boolean
15370 elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
15371 Elf_Internal_Sym *sym, const char **namep,
15372 flagword *flagsp, asection **secp, bfd_vma *valp)
15373 {
15374 if ((abfd->flags & DYNAMIC) == 0
15375 && (ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
15376 || ELF_ST_BIND (sym->st_info) == STB_GNU_UNIQUE))
15377 elf_tdata (info->output_bfd)->has_gnu_symbols = TRUE;
15378
15379 if (elf32_arm_hash_table (info)->vxworks_p
15380 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
15381 flagsp, secp, valp))
15382 return FALSE;
15383
15384 return TRUE;
15385 }
15386
15387 /* We use this to override swap_symbol_in and swap_symbol_out. */
15388 const struct elf_size_info elf32_arm_size_info =
15389 {
15390 sizeof (Elf32_External_Ehdr),
15391 sizeof (Elf32_External_Phdr),
15392 sizeof (Elf32_External_Shdr),
15393 sizeof (Elf32_External_Rel),
15394 sizeof (Elf32_External_Rela),
15395 sizeof (Elf32_External_Sym),
15396 sizeof (Elf32_External_Dyn),
15397 sizeof (Elf_External_Note),
15398 4,
15399 1,
15400 32, 2,
15401 ELFCLASS32, EV_CURRENT,
15402 bfd_elf32_write_out_phdrs,
15403 bfd_elf32_write_shdrs_and_ehdr,
15404 bfd_elf32_checksum_contents,
15405 bfd_elf32_write_relocs,
15406 elf32_arm_swap_symbol_in,
15407 elf32_arm_swap_symbol_out,
15408 bfd_elf32_slurp_reloc_table,
15409 bfd_elf32_slurp_symbol_table,
15410 bfd_elf32_swap_dyn_in,
15411 bfd_elf32_swap_dyn_out,
15412 bfd_elf32_swap_reloc_in,
15413 bfd_elf32_swap_reloc_out,
15414 bfd_elf32_swap_reloca_in,
15415 bfd_elf32_swap_reloca_out
15416 };
15417
15418 #define ELF_ARCH bfd_arch_arm
15419 #define ELF_TARGET_ID ARM_ELF_DATA
15420 #define ELF_MACHINE_CODE EM_ARM
15421 #ifdef __QNXTARGET__
15422 #define ELF_MAXPAGESIZE 0x1000
15423 #else
15424 #define ELF_MAXPAGESIZE 0x8000
15425 #endif
15426 #define ELF_MINPAGESIZE 0x1000
15427 #define ELF_COMMONPAGESIZE 0x1000
15428
15429 #define bfd_elf32_mkobject elf32_arm_mkobject
15430
15431 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
15432 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
15433 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
15434 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
15435 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
15436 #define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free
15437 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
15438 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
15439 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
15440 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
15441 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
15442 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
15443 #define bfd_elf32_bfd_final_link elf32_arm_final_link
15444
15445 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
15446 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
15447 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
15448 #define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
15449 #define elf_backend_check_relocs elf32_arm_check_relocs
15450 #define elf_backend_relocate_section elf32_arm_relocate_section
15451 #define elf_backend_write_section elf32_arm_write_section
15452 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
15453 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
15454 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
15455 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
15456 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
15457 #define elf_backend_always_size_sections elf32_arm_always_size_sections
15458 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
15459 #define elf_backend_post_process_headers elf32_arm_post_process_headers
15460 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
15461 #define elf_backend_object_p elf32_arm_object_p
15462 #define elf_backend_fake_sections elf32_arm_fake_sections
15463 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
15464 #define elf_backend_final_write_processing elf32_arm_final_write_processing
15465 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
15466 #define elf_backend_size_info elf32_arm_size_info
15467 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
15468 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
15469 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
15470 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
15471 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
15472
15473 #define elf_backend_can_refcount 1
15474 #define elf_backend_can_gc_sections 1
15475 #define elf_backend_plt_readonly 1
15476 #define elf_backend_want_got_plt 1
15477 #define elf_backend_want_plt_sym 0
15478 #define elf_backend_may_use_rel_p 1
15479 #define elf_backend_may_use_rela_p 0
15480 #define elf_backend_default_use_rela_p 0
15481
15482 #define elf_backend_got_header_size 12
15483
15484 #undef elf_backend_obj_attrs_vendor
15485 #define elf_backend_obj_attrs_vendor "aeabi"
15486 #undef elf_backend_obj_attrs_section
15487 #define elf_backend_obj_attrs_section ".ARM.attributes"
15488 #undef elf_backend_obj_attrs_arg_type
15489 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
15490 #undef elf_backend_obj_attrs_section_type
15491 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
15492 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
15493 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
15494
15495 #include "elf32-target.h"
15496
15497 /* VxWorks Targets. */
15498
15499 #undef TARGET_LITTLE_SYM
15500 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
15501 #undef TARGET_LITTLE_NAME
15502 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
15503 #undef TARGET_BIG_SYM
15504 #define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
15505 #undef TARGET_BIG_NAME
15506 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
15507
15508 /* Like elf32_arm_link_hash_table_create -- but overrides
15509 appropriately for VxWorks. */
15510
15511 static struct bfd_link_hash_table *
15512 elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
15513 {
15514 struct bfd_link_hash_table *ret;
15515
15516 ret = elf32_arm_link_hash_table_create (abfd);
15517 if (ret)
15518 {
15519 struct elf32_arm_link_hash_table *htab
15520 = (struct elf32_arm_link_hash_table *) ret;
15521 htab->use_rel = 0;
15522 htab->vxworks_p = 1;
15523 }
15524 return ret;
15525 }
15526
15527 static void
15528 elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
15529 {
15530 elf32_arm_final_write_processing (abfd, linker);
15531 elf_vxworks_final_write_processing (abfd, linker);
15532 }
15533
15534 #undef elf32_bed
15535 #define elf32_bed elf32_arm_vxworks_bed
15536
15537 #undef bfd_elf32_bfd_link_hash_table_create
15538 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
15539 #undef elf_backend_final_write_processing
15540 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
15541 #undef elf_backend_emit_relocs
15542 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
15543
15544 #undef elf_backend_may_use_rel_p
15545 #define elf_backend_may_use_rel_p 0
15546 #undef elf_backend_may_use_rela_p
15547 #define elf_backend_may_use_rela_p 1
15548 #undef elf_backend_default_use_rela_p
15549 #define elf_backend_default_use_rela_p 1
15550 #undef elf_backend_want_plt_sym
15551 #define elf_backend_want_plt_sym 1
15552 #undef ELF_MAXPAGESIZE
15553 #define ELF_MAXPAGESIZE 0x1000
15554
15555 #include "elf32-target.h"
15556
15557
15558 /* Merge backend specific data from an object file to the output
15559 object file when linking. */
15560
15561 static bfd_boolean
15562 elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
15563 {
15564 flagword out_flags;
15565 flagword in_flags;
15566 bfd_boolean flags_compatible = TRUE;
15567 asection *sec;
15568
15569 /* Check if we have the same endianness. */
15570 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
15571 return FALSE;
15572
15573 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
15574 return TRUE;
15575
15576 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
15577 return FALSE;
15578
15579 /* The input BFD must have had its flags initialised. */
15580 /* The following seems bogus to me -- The flags are initialized in
15581 the assembler but I don't think an elf_flags_init field is
15582 written into the object. */
15583 /* BFD_ASSERT (elf_flags_init (ibfd)); */
15584
15585 in_flags = elf_elfheader (ibfd)->e_flags;
15586 out_flags = elf_elfheader (obfd)->e_flags;
15587
15588 /* In theory there is no reason why we couldn't handle this. However
15589 in practice it isn't even close to working and there is no real
15590 reason to want it. */
15591 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
15592 && !(ibfd->flags & DYNAMIC)
15593 && (in_flags & EF_ARM_BE8))
15594 {
15595 _bfd_error_handler (_("error: %B is already in final BE8 format"),
15596 ibfd);
15597 return FALSE;
15598 }
15599
15600 if (!elf_flags_init (obfd))
15601 {
15602 /* If the input is the default architecture and had the default
15603 flags then do not bother setting the flags for the output
15604 architecture, instead allow future merges to do this. If no
15605 future merges ever set these flags then they will retain their
15606 uninitialised values, which surprise surprise, correspond
15607 to the default values. */
15608 if (bfd_get_arch_info (ibfd)->the_default
15609 && elf_elfheader (ibfd)->e_flags == 0)
15610 return TRUE;
15611
15612 elf_flags_init (obfd) = TRUE;
15613 elf_elfheader (obfd)->e_flags = in_flags;
15614
15615 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
15616 && bfd_get_arch_info (obfd)->the_default)
15617 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
15618
15619 return TRUE;
15620 }
15621
15622 /* Determine what should happen if the input ARM architecture
15623 does not match the output ARM architecture. */
15624 if (! bfd_arm_merge_machines (ibfd, obfd))
15625 return FALSE;
15626
15627 /* Identical flags must be compatible. */
15628 if (in_flags == out_flags)
15629 return TRUE;
15630
15631 /* Check to see if the input BFD actually contains any sections. If
15632 not, its flags may not have been initialised either, but it
15633 cannot actually cause any incompatiblity. Do not short-circuit
15634 dynamic objects; their section list may be emptied by
15635 elf_link_add_object_symbols.
15636
15637 Also check to see if there are no code sections in the input.
15638 In this case there is no need to check for code specific flags.
15639 XXX - do we need to worry about floating-point format compatability
15640 in data sections ? */
15641 if (!(ibfd->flags & DYNAMIC))
15642 {
15643 bfd_boolean null_input_bfd = TRUE;
15644 bfd_boolean only_data_sections = TRUE;
15645
15646 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
15647 {
15648 /* Ignore synthetic glue sections. */
15649 if (strcmp (sec->name, ".glue_7")
15650 && strcmp (sec->name, ".glue_7t"))
15651 {
15652 if ((bfd_get_section_flags (ibfd, sec)
15653 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
15654 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
15655 only_data_sections = FALSE;
15656
15657 null_input_bfd = FALSE;
15658 break;
15659 }
15660 }
15661
15662 if (null_input_bfd || only_data_sections)
15663 return TRUE;
15664 }
15665
15666 /* Complain about various flag mismatches. */
15667 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
15668 EF_ARM_EABI_VERSION (out_flags)))
15669 {
15670 _bfd_error_handler
15671 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
15672 ibfd, obfd,
15673 (in_flags & EF_ARM_EABIMASK) >> 24,
15674 (out_flags & EF_ARM_EABIMASK) >> 24);
15675 return FALSE;
15676 }
15677
15678 /* Not sure what needs to be checked for EABI versions >= 1. */
15679 /* VxWorks libraries do not use these flags. */
15680 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
15681 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
15682 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
15683 {
15684 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
15685 {
15686 _bfd_error_handler
15687 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
15688 ibfd, obfd,
15689 in_flags & EF_ARM_APCS_26 ? 26 : 32,
15690 out_flags & EF_ARM_APCS_26 ? 26 : 32);
15691 flags_compatible = FALSE;
15692 }
15693
15694 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
15695 {
15696 if (in_flags & EF_ARM_APCS_FLOAT)
15697 _bfd_error_handler
15698 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
15699 ibfd, obfd);
15700 else
15701 _bfd_error_handler
15702 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
15703 ibfd, obfd);
15704
15705 flags_compatible = FALSE;
15706 }
15707
15708 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
15709 {
15710 if (in_flags & EF_ARM_VFP_FLOAT)
15711 _bfd_error_handler
15712 (_("error: %B uses VFP instructions, whereas %B does not"),
15713 ibfd, obfd);
15714 else
15715 _bfd_error_handler
15716 (_("error: %B uses FPA instructions, whereas %B does not"),
15717 ibfd, obfd);
15718
15719 flags_compatible = FALSE;
15720 }
15721
15722 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
15723 {
15724 if (in_flags & EF_ARM_MAVERICK_FLOAT)
15725 _bfd_error_handler
15726 (_("error: %B uses Maverick instructions, whereas %B does not"),
15727 ibfd, obfd);
15728 else
15729 _bfd_error_handler
15730 (_("error: %B does not use Maverick instructions, whereas %B does"),
15731 ibfd, obfd);
15732
15733 flags_compatible = FALSE;
15734 }
15735
15736 #ifdef EF_ARM_SOFT_FLOAT
15737 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
15738 {
15739 /* We can allow interworking between code that is VFP format
15740 layout, and uses either soft float or integer regs for
15741 passing floating point arguments and results. We already
15742 know that the APCS_FLOAT flags match; similarly for VFP
15743 flags. */
15744 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
15745 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
15746 {
15747 if (in_flags & EF_ARM_SOFT_FLOAT)
15748 _bfd_error_handler
15749 (_("error: %B uses software FP, whereas %B uses hardware FP"),
15750 ibfd, obfd);
15751 else
15752 _bfd_error_handler
15753 (_("error: %B uses hardware FP, whereas %B uses software FP"),
15754 ibfd, obfd);
15755
15756 flags_compatible = FALSE;
15757 }
15758 }
15759 #endif
15760
15761 /* Interworking mismatch is only a warning. */
15762 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
15763 {
15764 if (in_flags & EF_ARM_INTERWORK)
15765 {
15766 _bfd_error_handler
15767 (_("Warning: %B supports interworking, whereas %B does not"),
15768 ibfd, obfd);
15769 }
15770 else
15771 {
15772 _bfd_error_handler
15773 (_("Warning: %B does not support interworking, whereas %B does"),
15774 ibfd, obfd);
15775 }
15776 }
15777 }
15778
15779 return flags_compatible;
15780 }
15781
15782
15783 /* Symbian OS Targets. */
15784
15785 #undef TARGET_LITTLE_SYM
15786 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
15787 #undef TARGET_LITTLE_NAME
15788 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
15789 #undef TARGET_BIG_SYM
15790 #define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
15791 #undef TARGET_BIG_NAME
15792 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
15793
15794 /* Like elf32_arm_link_hash_table_create -- but overrides
15795 appropriately for Symbian OS. */
15796
15797 static struct bfd_link_hash_table *
15798 elf32_arm_symbian_link_hash_table_create (bfd *abfd)
15799 {
15800 struct bfd_link_hash_table *ret;
15801
15802 ret = elf32_arm_link_hash_table_create (abfd);
15803 if (ret)
15804 {
15805 struct elf32_arm_link_hash_table *htab
15806 = (struct elf32_arm_link_hash_table *)ret;
15807 /* There is no PLT header for Symbian OS. */
15808 htab->plt_header_size = 0;
15809 /* The PLT entries are each one instruction and one word. */
15810 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
15811 htab->symbian_p = 1;
15812 /* Symbian uses armv5t or above, so use_blx is always true. */
15813 htab->use_blx = 1;
15814 htab->root.is_relocatable_executable = 1;
15815 }
15816 return ret;
15817 }
15818
15819 static const struct bfd_elf_special_section
15820 elf32_arm_symbian_special_sections[] =
15821 {
15822 /* In a BPABI executable, the dynamic linking sections do not go in
15823 the loadable read-only segment. The post-linker may wish to
15824 refer to these sections, but they are not part of the final
15825 program image. */
15826 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
15827 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
15828 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
15829 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
15830 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
15831 /* These sections do not need to be writable as the SymbianOS
15832 postlinker will arrange things so that no dynamic relocation is
15833 required. */
15834 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
15835 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
15836 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
15837 { NULL, 0, 0, 0, 0 }
15838 };
15839
15840 static void
15841 elf32_arm_symbian_begin_write_processing (bfd *abfd,
15842 struct bfd_link_info *link_info)
15843 {
15844 /* BPABI objects are never loaded directly by an OS kernel; they are
15845 processed by a postlinker first, into an OS-specific format. If
15846 the D_PAGED bit is set on the file, BFD will align segments on
15847 page boundaries, so that an OS can directly map the file. With
15848 BPABI objects, that just results in wasted space. In addition,
15849 because we clear the D_PAGED bit, map_sections_to_segments will
15850 recognize that the program headers should not be mapped into any
15851 loadable segment. */
15852 abfd->flags &= ~D_PAGED;
15853 elf32_arm_begin_write_processing (abfd, link_info);
15854 }
15855
15856 static bfd_boolean
15857 elf32_arm_symbian_modify_segment_map (bfd *abfd,
15858 struct bfd_link_info *info)
15859 {
15860 struct elf_segment_map *m;
15861 asection *dynsec;
15862
15863 /* BPABI shared libraries and executables should have a PT_DYNAMIC
15864 segment. However, because the .dynamic section is not marked
15865 with SEC_LOAD, the generic ELF code will not create such a
15866 segment. */
15867 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
15868 if (dynsec)
15869 {
15870 for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next)
15871 if (m->p_type == PT_DYNAMIC)
15872 break;
15873
15874 if (m == NULL)
15875 {
15876 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
15877 m->next = elf_tdata (abfd)->segment_map;
15878 elf_tdata (abfd)->segment_map = m;
15879 }
15880 }
15881
15882 /* Also call the generic arm routine. */
15883 return elf32_arm_modify_segment_map (abfd, info);
15884 }
15885
15886 /* Return address for Ith PLT stub in section PLT, for relocation REL
15887 or (bfd_vma) -1 if it should not be included. */
15888
15889 static bfd_vma
15890 elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
15891 const arelent *rel ATTRIBUTE_UNUSED)
15892 {
15893 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
15894 }
15895
15896
15897 #undef elf32_bed
15898 #define elf32_bed elf32_arm_symbian_bed
15899
15900 /* The dynamic sections are not allocated on SymbianOS; the postlinker
15901 will process them and then discard them. */
15902 #undef ELF_DYNAMIC_SEC_FLAGS
15903 #define ELF_DYNAMIC_SEC_FLAGS \
15904 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
15905
15906 #undef elf_backend_emit_relocs
15907
15908 #undef bfd_elf32_bfd_link_hash_table_create
15909 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
15910 #undef elf_backend_special_sections
15911 #define elf_backend_special_sections elf32_arm_symbian_special_sections
15912 #undef elf_backend_begin_write_processing
15913 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
15914 #undef elf_backend_final_write_processing
15915 #define elf_backend_final_write_processing elf32_arm_final_write_processing
15916
15917 #undef elf_backend_modify_segment_map
15918 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
15919
15920 /* There is no .got section for BPABI objects, and hence no header. */
15921 #undef elf_backend_got_header_size
15922 #define elf_backend_got_header_size 0
15923
15924 /* Similarly, there is no .got.plt section. */
15925 #undef elf_backend_want_got_plt
15926 #define elf_backend_want_got_plt 0
15927
15928 #undef elf_backend_plt_sym_val
15929 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
15930
15931 #undef elf_backend_may_use_rel_p
15932 #define elf_backend_may_use_rel_p 1
15933 #undef elf_backend_may_use_rela_p
15934 #define elf_backend_may_use_rela_p 0
15935 #undef elf_backend_default_use_rela_p
15936 #define elf_backend_default_use_rela_p 0
15937 #undef elf_backend_want_plt_sym
15938 #define elf_backend_want_plt_sym 0
15939 #undef ELF_MAXPAGESIZE
15940 #define ELF_MAXPAGESIZE 0x8000
15941
15942 #include "elf32-target.h"
GDB Binutils - Deliverables
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