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c58b65d0461c65359e5c0cc28b7965868a211cb3
[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
1 /* 32-bit ELF support for ARM
2 Copyright (C) 1998-2016 Free Software Foundation, Inc.
3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
20
21 #include "sysdep.h"
22 #include <limits.h>
23
24 #include "bfd.h"
25 #include "bfd_stdint.h"
26 #include "libiberty.h"
27 #include "libbfd.h"
28 #include "elf-bfd.h"
29 #include "elf-nacl.h"
30 #include "elf-vxworks.h"
31 #include "elf/arm.h"
32
33 /* Return the relocation section associated with NAME. HTAB is the
34 bfd's elf32_arm_link_hash_entry. */
35 #define RELOC_SECTION(HTAB, NAME) \
36 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
37
38 /* Return size of a relocation entry. HTAB is the bfd's
39 elf32_arm_link_hash_entry. */
40 #define RELOC_SIZE(HTAB) \
41 ((HTAB)->use_rel \
42 ? sizeof (Elf32_External_Rel) \
43 : sizeof (Elf32_External_Rela))
44
45 /* Return function to swap relocations in. HTAB is the bfd's
46 elf32_arm_link_hash_entry. */
47 #define SWAP_RELOC_IN(HTAB) \
48 ((HTAB)->use_rel \
49 ? bfd_elf32_swap_reloc_in \
50 : bfd_elf32_swap_reloca_in)
51
52 /* Return function to swap relocations out. HTAB is the bfd's
53 elf32_arm_link_hash_entry. */
54 #define SWAP_RELOC_OUT(HTAB) \
55 ((HTAB)->use_rel \
56 ? bfd_elf32_swap_reloc_out \
57 : bfd_elf32_swap_reloca_out)
58
59 #define elf_info_to_howto 0
60 #define elf_info_to_howto_rel elf32_arm_info_to_howto
61
62 #define ARM_ELF_ABI_VERSION 0
63 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
64
65 /* The Adjusted Place, as defined by AAELF. */
66 #define Pa(X) ((X) & 0xfffffffc)
67
68 static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
69 struct bfd_link_info *link_info,
70 asection *sec,
71 bfd_byte *contents);
72
73 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
74 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
75 in that slot. */
76
77 static reloc_howto_type elf32_arm_howto_table_1[] =
78 {
79 /* No relocation. */
80 HOWTO (R_ARM_NONE, /* type */
81 0, /* rightshift */
82 3, /* size (0 = byte, 1 = short, 2 = long) */
83 0, /* bitsize */
84 FALSE, /* pc_relative */
85 0, /* bitpos */
86 complain_overflow_dont,/* complain_on_overflow */
87 bfd_elf_generic_reloc, /* special_function */
88 "R_ARM_NONE", /* name */
89 FALSE, /* partial_inplace */
90 0, /* src_mask */
91 0, /* dst_mask */
92 FALSE), /* pcrel_offset */
93
94 HOWTO (R_ARM_PC24, /* type */
95 2, /* rightshift */
96 2, /* size (0 = byte, 1 = short, 2 = long) */
97 24, /* bitsize */
98 TRUE, /* pc_relative */
99 0, /* bitpos */
100 complain_overflow_signed,/* complain_on_overflow */
101 bfd_elf_generic_reloc, /* special_function */
102 "R_ARM_PC24", /* name */
103 FALSE, /* partial_inplace */
104 0x00ffffff, /* src_mask */
105 0x00ffffff, /* dst_mask */
106 TRUE), /* pcrel_offset */
107
108 /* 32 bit absolute */
109 HOWTO (R_ARM_ABS32, /* type */
110 0, /* rightshift */
111 2, /* size (0 = byte, 1 = short, 2 = long) */
112 32, /* bitsize */
113 FALSE, /* pc_relative */
114 0, /* bitpos */
115 complain_overflow_bitfield,/* complain_on_overflow */
116 bfd_elf_generic_reloc, /* special_function */
117 "R_ARM_ABS32", /* name */
118 FALSE, /* partial_inplace */
119 0xffffffff, /* src_mask */
120 0xffffffff, /* dst_mask */
121 FALSE), /* pcrel_offset */
122
123 /* standard 32bit pc-relative reloc */
124 HOWTO (R_ARM_REL32, /* type */
125 0, /* rightshift */
126 2, /* size (0 = byte, 1 = short, 2 = long) */
127 32, /* bitsize */
128 TRUE, /* pc_relative */
129 0, /* bitpos */
130 complain_overflow_bitfield,/* complain_on_overflow */
131 bfd_elf_generic_reloc, /* special_function */
132 "R_ARM_REL32", /* name */
133 FALSE, /* partial_inplace */
134 0xffffffff, /* src_mask */
135 0xffffffff, /* dst_mask */
136 TRUE), /* pcrel_offset */
137
138 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
139 HOWTO (R_ARM_LDR_PC_G0, /* type */
140 0, /* rightshift */
141 0, /* size (0 = byte, 1 = short, 2 = long) */
142 32, /* bitsize */
143 TRUE, /* pc_relative */
144 0, /* bitpos */
145 complain_overflow_dont,/* complain_on_overflow */
146 bfd_elf_generic_reloc, /* special_function */
147 "R_ARM_LDR_PC_G0", /* name */
148 FALSE, /* partial_inplace */
149 0xffffffff, /* src_mask */
150 0xffffffff, /* dst_mask */
151 TRUE), /* pcrel_offset */
152
153 /* 16 bit absolute */
154 HOWTO (R_ARM_ABS16, /* type */
155 0, /* rightshift */
156 1, /* size (0 = byte, 1 = short, 2 = long) */
157 16, /* bitsize */
158 FALSE, /* pc_relative */
159 0, /* bitpos */
160 complain_overflow_bitfield,/* complain_on_overflow */
161 bfd_elf_generic_reloc, /* special_function */
162 "R_ARM_ABS16", /* name */
163 FALSE, /* partial_inplace */
164 0x0000ffff, /* src_mask */
165 0x0000ffff, /* dst_mask */
166 FALSE), /* pcrel_offset */
167
168 /* 12 bit absolute */
169 HOWTO (R_ARM_ABS12, /* type */
170 0, /* rightshift */
171 2, /* size (0 = byte, 1 = short, 2 = long) */
172 12, /* bitsize */
173 FALSE, /* pc_relative */
174 0, /* bitpos */
175 complain_overflow_bitfield,/* complain_on_overflow */
176 bfd_elf_generic_reloc, /* special_function */
177 "R_ARM_ABS12", /* name */
178 FALSE, /* partial_inplace */
179 0x00000fff, /* src_mask */
180 0x00000fff, /* dst_mask */
181 FALSE), /* pcrel_offset */
182
183 HOWTO (R_ARM_THM_ABS5, /* type */
184 6, /* rightshift */
185 1, /* size (0 = byte, 1 = short, 2 = long) */
186 5, /* bitsize */
187 FALSE, /* pc_relative */
188 0, /* bitpos */
189 complain_overflow_bitfield,/* complain_on_overflow */
190 bfd_elf_generic_reloc, /* special_function */
191 "R_ARM_THM_ABS5", /* name */
192 FALSE, /* partial_inplace */
193 0x000007e0, /* src_mask */
194 0x000007e0, /* dst_mask */
195 FALSE), /* pcrel_offset */
196
197 /* 8 bit absolute */
198 HOWTO (R_ARM_ABS8, /* type */
199 0, /* rightshift */
200 0, /* size (0 = byte, 1 = short, 2 = long) */
201 8, /* bitsize */
202 FALSE, /* pc_relative */
203 0, /* bitpos */
204 complain_overflow_bitfield,/* complain_on_overflow */
205 bfd_elf_generic_reloc, /* special_function */
206 "R_ARM_ABS8", /* name */
207 FALSE, /* partial_inplace */
208 0x000000ff, /* src_mask */
209 0x000000ff, /* dst_mask */
210 FALSE), /* pcrel_offset */
211
212 HOWTO (R_ARM_SBREL32, /* type */
213 0, /* rightshift */
214 2, /* size (0 = byte, 1 = short, 2 = long) */
215 32, /* bitsize */
216 FALSE, /* pc_relative */
217 0, /* bitpos */
218 complain_overflow_dont,/* complain_on_overflow */
219 bfd_elf_generic_reloc, /* special_function */
220 "R_ARM_SBREL32", /* name */
221 FALSE, /* partial_inplace */
222 0xffffffff, /* src_mask */
223 0xffffffff, /* dst_mask */
224 FALSE), /* pcrel_offset */
225
226 HOWTO (R_ARM_THM_CALL, /* type */
227 1, /* rightshift */
228 2, /* size (0 = byte, 1 = short, 2 = long) */
229 24, /* bitsize */
230 TRUE, /* pc_relative */
231 0, /* bitpos */
232 complain_overflow_signed,/* complain_on_overflow */
233 bfd_elf_generic_reloc, /* special_function */
234 "R_ARM_THM_CALL", /* name */
235 FALSE, /* partial_inplace */
236 0x07ff2fff, /* src_mask */
237 0x07ff2fff, /* dst_mask */
238 TRUE), /* pcrel_offset */
239
240 HOWTO (R_ARM_THM_PC8, /* type */
241 1, /* rightshift */
242 1, /* size (0 = byte, 1 = short, 2 = long) */
243 8, /* bitsize */
244 TRUE, /* pc_relative */
245 0, /* bitpos */
246 complain_overflow_signed,/* complain_on_overflow */
247 bfd_elf_generic_reloc, /* special_function */
248 "R_ARM_THM_PC8", /* name */
249 FALSE, /* partial_inplace */
250 0x000000ff, /* src_mask */
251 0x000000ff, /* dst_mask */
252 TRUE), /* pcrel_offset */
253
254 HOWTO (R_ARM_BREL_ADJ, /* type */
255 1, /* rightshift */
256 1, /* size (0 = byte, 1 = short, 2 = long) */
257 32, /* bitsize */
258 FALSE, /* pc_relative */
259 0, /* bitpos */
260 complain_overflow_signed,/* complain_on_overflow */
261 bfd_elf_generic_reloc, /* special_function */
262 "R_ARM_BREL_ADJ", /* name */
263 FALSE, /* partial_inplace */
264 0xffffffff, /* src_mask */
265 0xffffffff, /* dst_mask */
266 FALSE), /* pcrel_offset */
267
268 HOWTO (R_ARM_TLS_DESC, /* type */
269 0, /* rightshift */
270 2, /* size (0 = byte, 1 = short, 2 = long) */
271 32, /* bitsize */
272 FALSE, /* pc_relative */
273 0, /* bitpos */
274 complain_overflow_bitfield,/* complain_on_overflow */
275 bfd_elf_generic_reloc, /* special_function */
276 "R_ARM_TLS_DESC", /* name */
277 FALSE, /* partial_inplace */
278 0xffffffff, /* src_mask */
279 0xffffffff, /* dst_mask */
280 FALSE), /* pcrel_offset */
281
282 HOWTO (R_ARM_THM_SWI8, /* type */
283 0, /* rightshift */
284 0, /* size (0 = byte, 1 = short, 2 = long) */
285 0, /* bitsize */
286 FALSE, /* pc_relative */
287 0, /* bitpos */
288 complain_overflow_signed,/* complain_on_overflow */
289 bfd_elf_generic_reloc, /* special_function */
290 "R_ARM_SWI8", /* name */
291 FALSE, /* partial_inplace */
292 0x00000000, /* src_mask */
293 0x00000000, /* dst_mask */
294 FALSE), /* pcrel_offset */
295
296 /* BLX instruction for the ARM. */
297 HOWTO (R_ARM_XPC25, /* type */
298 2, /* rightshift */
299 2, /* size (0 = byte, 1 = short, 2 = long) */
300 24, /* bitsize */
301 TRUE, /* pc_relative */
302 0, /* bitpos */
303 complain_overflow_signed,/* complain_on_overflow */
304 bfd_elf_generic_reloc, /* special_function */
305 "R_ARM_XPC25", /* name */
306 FALSE, /* partial_inplace */
307 0x00ffffff, /* src_mask */
308 0x00ffffff, /* dst_mask */
309 TRUE), /* pcrel_offset */
310
311 /* BLX instruction for the Thumb. */
312 HOWTO (R_ARM_THM_XPC22, /* type */
313 2, /* rightshift */
314 2, /* size (0 = byte, 1 = short, 2 = long) */
315 24, /* bitsize */
316 TRUE, /* pc_relative */
317 0, /* bitpos */
318 complain_overflow_signed,/* complain_on_overflow */
319 bfd_elf_generic_reloc, /* special_function */
320 "R_ARM_THM_XPC22", /* name */
321 FALSE, /* partial_inplace */
322 0x07ff2fff, /* src_mask */
323 0x07ff2fff, /* dst_mask */
324 TRUE), /* pcrel_offset */
325
326 /* Dynamic TLS relocations. */
327
328 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
329 0, /* rightshift */
330 2, /* size (0 = byte, 1 = short, 2 = long) */
331 32, /* bitsize */
332 FALSE, /* pc_relative */
333 0, /* bitpos */
334 complain_overflow_bitfield,/* complain_on_overflow */
335 bfd_elf_generic_reloc, /* special_function */
336 "R_ARM_TLS_DTPMOD32", /* name */
337 TRUE, /* partial_inplace */
338 0xffffffff, /* src_mask */
339 0xffffffff, /* dst_mask */
340 FALSE), /* pcrel_offset */
341
342 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
343 0, /* rightshift */
344 2, /* size (0 = byte, 1 = short, 2 = long) */
345 32, /* bitsize */
346 FALSE, /* pc_relative */
347 0, /* bitpos */
348 complain_overflow_bitfield,/* complain_on_overflow */
349 bfd_elf_generic_reloc, /* special_function */
350 "R_ARM_TLS_DTPOFF32", /* name */
351 TRUE, /* partial_inplace */
352 0xffffffff, /* src_mask */
353 0xffffffff, /* dst_mask */
354 FALSE), /* pcrel_offset */
355
356 HOWTO (R_ARM_TLS_TPOFF32, /* type */
357 0, /* rightshift */
358 2, /* size (0 = byte, 1 = short, 2 = long) */
359 32, /* bitsize */
360 FALSE, /* pc_relative */
361 0, /* bitpos */
362 complain_overflow_bitfield,/* complain_on_overflow */
363 bfd_elf_generic_reloc, /* special_function */
364 "R_ARM_TLS_TPOFF32", /* name */
365 TRUE, /* partial_inplace */
366 0xffffffff, /* src_mask */
367 0xffffffff, /* dst_mask */
368 FALSE), /* pcrel_offset */
369
370 /* Relocs used in ARM Linux */
371
372 HOWTO (R_ARM_COPY, /* type */
373 0, /* rightshift */
374 2, /* size (0 = byte, 1 = short, 2 = long) */
375 32, /* bitsize */
376 FALSE, /* pc_relative */
377 0, /* bitpos */
378 complain_overflow_bitfield,/* complain_on_overflow */
379 bfd_elf_generic_reloc, /* special_function */
380 "R_ARM_COPY", /* name */
381 TRUE, /* partial_inplace */
382 0xffffffff, /* src_mask */
383 0xffffffff, /* dst_mask */
384 FALSE), /* pcrel_offset */
385
386 HOWTO (R_ARM_GLOB_DAT, /* type */
387 0, /* rightshift */
388 2, /* size (0 = byte, 1 = short, 2 = long) */
389 32, /* bitsize */
390 FALSE, /* pc_relative */
391 0, /* bitpos */
392 complain_overflow_bitfield,/* complain_on_overflow */
393 bfd_elf_generic_reloc, /* special_function */
394 "R_ARM_GLOB_DAT", /* name */
395 TRUE, /* partial_inplace */
396 0xffffffff, /* src_mask */
397 0xffffffff, /* dst_mask */
398 FALSE), /* pcrel_offset */
399
400 HOWTO (R_ARM_JUMP_SLOT, /* type */
401 0, /* rightshift */
402 2, /* size (0 = byte, 1 = short, 2 = long) */
403 32, /* bitsize */
404 FALSE, /* pc_relative */
405 0, /* bitpos */
406 complain_overflow_bitfield,/* complain_on_overflow */
407 bfd_elf_generic_reloc, /* special_function */
408 "R_ARM_JUMP_SLOT", /* name */
409 TRUE, /* partial_inplace */
410 0xffffffff, /* src_mask */
411 0xffffffff, /* dst_mask */
412 FALSE), /* pcrel_offset */
413
414 HOWTO (R_ARM_RELATIVE, /* type */
415 0, /* rightshift */
416 2, /* size (0 = byte, 1 = short, 2 = long) */
417 32, /* bitsize */
418 FALSE, /* pc_relative */
419 0, /* bitpos */
420 complain_overflow_bitfield,/* complain_on_overflow */
421 bfd_elf_generic_reloc, /* special_function */
422 "R_ARM_RELATIVE", /* name */
423 TRUE, /* partial_inplace */
424 0xffffffff, /* src_mask */
425 0xffffffff, /* dst_mask */
426 FALSE), /* pcrel_offset */
427
428 HOWTO (R_ARM_GOTOFF32, /* type */
429 0, /* rightshift */
430 2, /* size (0 = byte, 1 = short, 2 = long) */
431 32, /* bitsize */
432 FALSE, /* pc_relative */
433 0, /* bitpos */
434 complain_overflow_bitfield,/* complain_on_overflow */
435 bfd_elf_generic_reloc, /* special_function */
436 "R_ARM_GOTOFF32", /* name */
437 TRUE, /* partial_inplace */
438 0xffffffff, /* src_mask */
439 0xffffffff, /* dst_mask */
440 FALSE), /* pcrel_offset */
441
442 HOWTO (R_ARM_GOTPC, /* type */
443 0, /* rightshift */
444 2, /* size (0 = byte, 1 = short, 2 = long) */
445 32, /* bitsize */
446 TRUE, /* pc_relative */
447 0, /* bitpos */
448 complain_overflow_bitfield,/* complain_on_overflow */
449 bfd_elf_generic_reloc, /* special_function */
450 "R_ARM_GOTPC", /* name */
451 TRUE, /* partial_inplace */
452 0xffffffff, /* src_mask */
453 0xffffffff, /* dst_mask */
454 TRUE), /* pcrel_offset */
455
456 HOWTO (R_ARM_GOT32, /* type */
457 0, /* rightshift */
458 2, /* size (0 = byte, 1 = short, 2 = long) */
459 32, /* bitsize */
460 FALSE, /* pc_relative */
461 0, /* bitpos */
462 complain_overflow_bitfield,/* complain_on_overflow */
463 bfd_elf_generic_reloc, /* special_function */
464 "R_ARM_GOT32", /* name */
465 TRUE, /* partial_inplace */
466 0xffffffff, /* src_mask */
467 0xffffffff, /* dst_mask */
468 FALSE), /* pcrel_offset */
469
470 HOWTO (R_ARM_PLT32, /* type */
471 2, /* rightshift */
472 2, /* size (0 = byte, 1 = short, 2 = long) */
473 24, /* bitsize */
474 TRUE, /* pc_relative */
475 0, /* bitpos */
476 complain_overflow_bitfield,/* complain_on_overflow */
477 bfd_elf_generic_reloc, /* special_function */
478 "R_ARM_PLT32", /* name */
479 FALSE, /* partial_inplace */
480 0x00ffffff, /* src_mask */
481 0x00ffffff, /* dst_mask */
482 TRUE), /* pcrel_offset */
483
484 HOWTO (R_ARM_CALL, /* type */
485 2, /* rightshift */
486 2, /* size (0 = byte, 1 = short, 2 = long) */
487 24, /* bitsize */
488 TRUE, /* pc_relative */
489 0, /* bitpos */
490 complain_overflow_signed,/* complain_on_overflow */
491 bfd_elf_generic_reloc, /* special_function */
492 "R_ARM_CALL", /* name */
493 FALSE, /* partial_inplace */
494 0x00ffffff, /* src_mask */
495 0x00ffffff, /* dst_mask */
496 TRUE), /* pcrel_offset */
497
498 HOWTO (R_ARM_JUMP24, /* type */
499 2, /* rightshift */
500 2, /* size (0 = byte, 1 = short, 2 = long) */
501 24, /* bitsize */
502 TRUE, /* pc_relative */
503 0, /* bitpos */
504 complain_overflow_signed,/* complain_on_overflow */
505 bfd_elf_generic_reloc, /* special_function */
506 "R_ARM_JUMP24", /* name */
507 FALSE, /* partial_inplace */
508 0x00ffffff, /* src_mask */
509 0x00ffffff, /* dst_mask */
510 TRUE), /* pcrel_offset */
511
512 HOWTO (R_ARM_THM_JUMP24, /* type */
513 1, /* rightshift */
514 2, /* size (0 = byte, 1 = short, 2 = long) */
515 24, /* bitsize */
516 TRUE, /* pc_relative */
517 0, /* bitpos */
518 complain_overflow_signed,/* complain_on_overflow */
519 bfd_elf_generic_reloc, /* special_function */
520 "R_ARM_THM_JUMP24", /* name */
521 FALSE, /* partial_inplace */
522 0x07ff2fff, /* src_mask */
523 0x07ff2fff, /* dst_mask */
524 TRUE), /* pcrel_offset */
525
526 HOWTO (R_ARM_BASE_ABS, /* type */
527 0, /* rightshift */
528 2, /* size (0 = byte, 1 = short, 2 = long) */
529 32, /* bitsize */
530 FALSE, /* pc_relative */
531 0, /* bitpos */
532 complain_overflow_dont,/* complain_on_overflow */
533 bfd_elf_generic_reloc, /* special_function */
534 "R_ARM_BASE_ABS", /* name */
535 FALSE, /* partial_inplace */
536 0xffffffff, /* src_mask */
537 0xffffffff, /* dst_mask */
538 FALSE), /* pcrel_offset */
539
540 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
541 0, /* rightshift */
542 2, /* size (0 = byte, 1 = short, 2 = long) */
543 12, /* bitsize */
544 TRUE, /* pc_relative */
545 0, /* bitpos */
546 complain_overflow_dont,/* complain_on_overflow */
547 bfd_elf_generic_reloc, /* special_function */
548 "R_ARM_ALU_PCREL_7_0", /* name */
549 FALSE, /* partial_inplace */
550 0x00000fff, /* src_mask */
551 0x00000fff, /* dst_mask */
552 TRUE), /* pcrel_offset */
553
554 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
555 0, /* rightshift */
556 2, /* size (0 = byte, 1 = short, 2 = long) */
557 12, /* bitsize */
558 TRUE, /* pc_relative */
559 8, /* bitpos */
560 complain_overflow_dont,/* complain_on_overflow */
561 bfd_elf_generic_reloc, /* special_function */
562 "R_ARM_ALU_PCREL_15_8",/* name */
563 FALSE, /* partial_inplace */
564 0x00000fff, /* src_mask */
565 0x00000fff, /* dst_mask */
566 TRUE), /* pcrel_offset */
567
568 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
569 0, /* rightshift */
570 2, /* size (0 = byte, 1 = short, 2 = long) */
571 12, /* bitsize */
572 TRUE, /* pc_relative */
573 16, /* bitpos */
574 complain_overflow_dont,/* complain_on_overflow */
575 bfd_elf_generic_reloc, /* special_function */
576 "R_ARM_ALU_PCREL_23_15",/* name */
577 FALSE, /* partial_inplace */
578 0x00000fff, /* src_mask */
579 0x00000fff, /* dst_mask */
580 TRUE), /* pcrel_offset */
581
582 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
583 0, /* rightshift */
584 2, /* size (0 = byte, 1 = short, 2 = long) */
585 12, /* bitsize */
586 FALSE, /* pc_relative */
587 0, /* bitpos */
588 complain_overflow_dont,/* complain_on_overflow */
589 bfd_elf_generic_reloc, /* special_function */
590 "R_ARM_LDR_SBREL_11_0",/* name */
591 FALSE, /* partial_inplace */
592 0x00000fff, /* src_mask */
593 0x00000fff, /* dst_mask */
594 FALSE), /* pcrel_offset */
595
596 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
597 0, /* rightshift */
598 2, /* size (0 = byte, 1 = short, 2 = long) */
599 8, /* bitsize */
600 FALSE, /* pc_relative */
601 12, /* bitpos */
602 complain_overflow_dont,/* complain_on_overflow */
603 bfd_elf_generic_reloc, /* special_function */
604 "R_ARM_ALU_SBREL_19_12",/* name */
605 FALSE, /* partial_inplace */
606 0x000ff000, /* src_mask */
607 0x000ff000, /* dst_mask */
608 FALSE), /* pcrel_offset */
609
610 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
611 0, /* rightshift */
612 2, /* size (0 = byte, 1 = short, 2 = long) */
613 8, /* bitsize */
614 FALSE, /* pc_relative */
615 20, /* bitpos */
616 complain_overflow_dont,/* complain_on_overflow */
617 bfd_elf_generic_reloc, /* special_function */
618 "R_ARM_ALU_SBREL_27_20",/* name */
619 FALSE, /* partial_inplace */
620 0x0ff00000, /* src_mask */
621 0x0ff00000, /* dst_mask */
622 FALSE), /* pcrel_offset */
623
624 HOWTO (R_ARM_TARGET1, /* type */
625 0, /* rightshift */
626 2, /* size (0 = byte, 1 = short, 2 = long) */
627 32, /* bitsize */
628 FALSE, /* pc_relative */
629 0, /* bitpos */
630 complain_overflow_dont,/* complain_on_overflow */
631 bfd_elf_generic_reloc, /* special_function */
632 "R_ARM_TARGET1", /* name */
633 FALSE, /* partial_inplace */
634 0xffffffff, /* src_mask */
635 0xffffffff, /* dst_mask */
636 FALSE), /* pcrel_offset */
637
638 HOWTO (R_ARM_ROSEGREL32, /* type */
639 0, /* rightshift */
640 2, /* size (0 = byte, 1 = short, 2 = long) */
641 32, /* bitsize */
642 FALSE, /* pc_relative */
643 0, /* bitpos */
644 complain_overflow_dont,/* complain_on_overflow */
645 bfd_elf_generic_reloc, /* special_function */
646 "R_ARM_ROSEGREL32", /* name */
647 FALSE, /* partial_inplace */
648 0xffffffff, /* src_mask */
649 0xffffffff, /* dst_mask */
650 FALSE), /* pcrel_offset */
651
652 HOWTO (R_ARM_V4BX, /* type */
653 0, /* rightshift */
654 2, /* size (0 = byte, 1 = short, 2 = long) */
655 32, /* bitsize */
656 FALSE, /* pc_relative */
657 0, /* bitpos */
658 complain_overflow_dont,/* complain_on_overflow */
659 bfd_elf_generic_reloc, /* special_function */
660 "R_ARM_V4BX", /* name */
661 FALSE, /* partial_inplace */
662 0xffffffff, /* src_mask */
663 0xffffffff, /* dst_mask */
664 FALSE), /* pcrel_offset */
665
666 HOWTO (R_ARM_TARGET2, /* type */
667 0, /* rightshift */
668 2, /* size (0 = byte, 1 = short, 2 = long) */
669 32, /* bitsize */
670 FALSE, /* pc_relative */
671 0, /* bitpos */
672 complain_overflow_signed,/* complain_on_overflow */
673 bfd_elf_generic_reloc, /* special_function */
674 "R_ARM_TARGET2", /* name */
675 FALSE, /* partial_inplace */
676 0xffffffff, /* src_mask */
677 0xffffffff, /* dst_mask */
678 TRUE), /* pcrel_offset */
679
680 HOWTO (R_ARM_PREL31, /* type */
681 0, /* rightshift */
682 2, /* size (0 = byte, 1 = short, 2 = long) */
683 31, /* bitsize */
684 TRUE, /* pc_relative */
685 0, /* bitpos */
686 complain_overflow_signed,/* complain_on_overflow */
687 bfd_elf_generic_reloc, /* special_function */
688 "R_ARM_PREL31", /* name */
689 FALSE, /* partial_inplace */
690 0x7fffffff, /* src_mask */
691 0x7fffffff, /* dst_mask */
692 TRUE), /* pcrel_offset */
693
694 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
695 0, /* rightshift */
696 2, /* size (0 = byte, 1 = short, 2 = long) */
697 16, /* bitsize */
698 FALSE, /* pc_relative */
699 0, /* bitpos */
700 complain_overflow_dont,/* complain_on_overflow */
701 bfd_elf_generic_reloc, /* special_function */
702 "R_ARM_MOVW_ABS_NC", /* name */
703 FALSE, /* partial_inplace */
704 0x000f0fff, /* src_mask */
705 0x000f0fff, /* dst_mask */
706 FALSE), /* pcrel_offset */
707
708 HOWTO (R_ARM_MOVT_ABS, /* type */
709 0, /* rightshift */
710 2, /* size (0 = byte, 1 = short, 2 = long) */
711 16, /* bitsize */
712 FALSE, /* pc_relative */
713 0, /* bitpos */
714 complain_overflow_bitfield,/* complain_on_overflow */
715 bfd_elf_generic_reloc, /* special_function */
716 "R_ARM_MOVT_ABS", /* name */
717 FALSE, /* partial_inplace */
718 0x000f0fff, /* src_mask */
719 0x000f0fff, /* dst_mask */
720 FALSE), /* pcrel_offset */
721
722 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
723 0, /* rightshift */
724 2, /* size (0 = byte, 1 = short, 2 = long) */
725 16, /* bitsize */
726 TRUE, /* pc_relative */
727 0, /* bitpos */
728 complain_overflow_dont,/* complain_on_overflow */
729 bfd_elf_generic_reloc, /* special_function */
730 "R_ARM_MOVW_PREL_NC", /* name */
731 FALSE, /* partial_inplace */
732 0x000f0fff, /* src_mask */
733 0x000f0fff, /* dst_mask */
734 TRUE), /* pcrel_offset */
735
736 HOWTO (R_ARM_MOVT_PREL, /* type */
737 0, /* rightshift */
738 2, /* size (0 = byte, 1 = short, 2 = long) */
739 16, /* bitsize */
740 TRUE, /* pc_relative */
741 0, /* bitpos */
742 complain_overflow_bitfield,/* complain_on_overflow */
743 bfd_elf_generic_reloc, /* special_function */
744 "R_ARM_MOVT_PREL", /* name */
745 FALSE, /* partial_inplace */
746 0x000f0fff, /* src_mask */
747 0x000f0fff, /* dst_mask */
748 TRUE), /* pcrel_offset */
749
750 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
751 0, /* rightshift */
752 2, /* size (0 = byte, 1 = short, 2 = long) */
753 16, /* bitsize */
754 FALSE, /* pc_relative */
755 0, /* bitpos */
756 complain_overflow_dont,/* complain_on_overflow */
757 bfd_elf_generic_reloc, /* special_function */
758 "R_ARM_THM_MOVW_ABS_NC",/* name */
759 FALSE, /* partial_inplace */
760 0x040f70ff, /* src_mask */
761 0x040f70ff, /* dst_mask */
762 FALSE), /* pcrel_offset */
763
764 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
765 0, /* rightshift */
766 2, /* size (0 = byte, 1 = short, 2 = long) */
767 16, /* bitsize */
768 FALSE, /* pc_relative */
769 0, /* bitpos */
770 complain_overflow_bitfield,/* complain_on_overflow */
771 bfd_elf_generic_reloc, /* special_function */
772 "R_ARM_THM_MOVT_ABS", /* name */
773 FALSE, /* partial_inplace */
774 0x040f70ff, /* src_mask */
775 0x040f70ff, /* dst_mask */
776 FALSE), /* pcrel_offset */
777
778 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
779 0, /* rightshift */
780 2, /* size (0 = byte, 1 = short, 2 = long) */
781 16, /* bitsize */
782 TRUE, /* pc_relative */
783 0, /* bitpos */
784 complain_overflow_dont,/* complain_on_overflow */
785 bfd_elf_generic_reloc, /* special_function */
786 "R_ARM_THM_MOVW_PREL_NC",/* name */
787 FALSE, /* partial_inplace */
788 0x040f70ff, /* src_mask */
789 0x040f70ff, /* dst_mask */
790 TRUE), /* pcrel_offset */
791
792 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
793 0, /* rightshift */
794 2, /* size (0 = byte, 1 = short, 2 = long) */
795 16, /* bitsize */
796 TRUE, /* pc_relative */
797 0, /* bitpos */
798 complain_overflow_bitfield,/* complain_on_overflow */
799 bfd_elf_generic_reloc, /* special_function */
800 "R_ARM_THM_MOVT_PREL", /* name */
801 FALSE, /* partial_inplace */
802 0x040f70ff, /* src_mask */
803 0x040f70ff, /* dst_mask */
804 TRUE), /* pcrel_offset */
805
806 HOWTO (R_ARM_THM_JUMP19, /* type */
807 1, /* rightshift */
808 2, /* size (0 = byte, 1 = short, 2 = long) */
809 19, /* bitsize */
810 TRUE, /* pc_relative */
811 0, /* bitpos */
812 complain_overflow_signed,/* complain_on_overflow */
813 bfd_elf_generic_reloc, /* special_function */
814 "R_ARM_THM_JUMP19", /* name */
815 FALSE, /* partial_inplace */
816 0x043f2fff, /* src_mask */
817 0x043f2fff, /* dst_mask */
818 TRUE), /* pcrel_offset */
819
820 HOWTO (R_ARM_THM_JUMP6, /* type */
821 1, /* rightshift */
822 1, /* size (0 = byte, 1 = short, 2 = long) */
823 6, /* bitsize */
824 TRUE, /* pc_relative */
825 0, /* bitpos */
826 complain_overflow_unsigned,/* complain_on_overflow */
827 bfd_elf_generic_reloc, /* special_function */
828 "R_ARM_THM_JUMP6", /* name */
829 FALSE, /* partial_inplace */
830 0x02f8, /* src_mask */
831 0x02f8, /* dst_mask */
832 TRUE), /* pcrel_offset */
833
834 /* These are declared as 13-bit signed relocations because we can
835 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
836 versa. */
837 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
838 0, /* rightshift */
839 2, /* size (0 = byte, 1 = short, 2 = long) */
840 13, /* bitsize */
841 TRUE, /* pc_relative */
842 0, /* bitpos */
843 complain_overflow_dont,/* complain_on_overflow */
844 bfd_elf_generic_reloc, /* special_function */
845 "R_ARM_THM_ALU_PREL_11_0",/* name */
846 FALSE, /* partial_inplace */
847 0xffffffff, /* src_mask */
848 0xffffffff, /* dst_mask */
849 TRUE), /* pcrel_offset */
850
851 HOWTO (R_ARM_THM_PC12, /* type */
852 0, /* rightshift */
853 2, /* size (0 = byte, 1 = short, 2 = long) */
854 13, /* bitsize */
855 TRUE, /* pc_relative */
856 0, /* bitpos */
857 complain_overflow_dont,/* complain_on_overflow */
858 bfd_elf_generic_reloc, /* special_function */
859 "R_ARM_THM_PC12", /* name */
860 FALSE, /* partial_inplace */
861 0xffffffff, /* src_mask */
862 0xffffffff, /* dst_mask */
863 TRUE), /* pcrel_offset */
864
865 HOWTO (R_ARM_ABS32_NOI, /* type */
866 0, /* rightshift */
867 2, /* size (0 = byte, 1 = short, 2 = long) */
868 32, /* bitsize */
869 FALSE, /* pc_relative */
870 0, /* bitpos */
871 complain_overflow_dont,/* complain_on_overflow */
872 bfd_elf_generic_reloc, /* special_function */
873 "R_ARM_ABS32_NOI", /* name */
874 FALSE, /* partial_inplace */
875 0xffffffff, /* src_mask */
876 0xffffffff, /* dst_mask */
877 FALSE), /* pcrel_offset */
878
879 HOWTO (R_ARM_REL32_NOI, /* type */
880 0, /* rightshift */
881 2, /* size (0 = byte, 1 = short, 2 = long) */
882 32, /* bitsize */
883 TRUE, /* pc_relative */
884 0, /* bitpos */
885 complain_overflow_dont,/* complain_on_overflow */
886 bfd_elf_generic_reloc, /* special_function */
887 "R_ARM_REL32_NOI", /* name */
888 FALSE, /* partial_inplace */
889 0xffffffff, /* src_mask */
890 0xffffffff, /* dst_mask */
891 FALSE), /* pcrel_offset */
892
893 /* Group relocations. */
894
895 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
896 0, /* rightshift */
897 2, /* size (0 = byte, 1 = short, 2 = long) */
898 32, /* bitsize */
899 TRUE, /* pc_relative */
900 0, /* bitpos */
901 complain_overflow_dont,/* complain_on_overflow */
902 bfd_elf_generic_reloc, /* special_function */
903 "R_ARM_ALU_PC_G0_NC", /* name */
904 FALSE, /* partial_inplace */
905 0xffffffff, /* src_mask */
906 0xffffffff, /* dst_mask */
907 TRUE), /* pcrel_offset */
908
909 HOWTO (R_ARM_ALU_PC_G0, /* type */
910 0, /* rightshift */
911 2, /* size (0 = byte, 1 = short, 2 = long) */
912 32, /* bitsize */
913 TRUE, /* pc_relative */
914 0, /* bitpos */
915 complain_overflow_dont,/* complain_on_overflow */
916 bfd_elf_generic_reloc, /* special_function */
917 "R_ARM_ALU_PC_G0", /* name */
918 FALSE, /* partial_inplace */
919 0xffffffff, /* src_mask */
920 0xffffffff, /* dst_mask */
921 TRUE), /* pcrel_offset */
922
923 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
924 0, /* rightshift */
925 2, /* size (0 = byte, 1 = short, 2 = long) */
926 32, /* bitsize */
927 TRUE, /* pc_relative */
928 0, /* bitpos */
929 complain_overflow_dont,/* complain_on_overflow */
930 bfd_elf_generic_reloc, /* special_function */
931 "R_ARM_ALU_PC_G1_NC", /* name */
932 FALSE, /* partial_inplace */
933 0xffffffff, /* src_mask */
934 0xffffffff, /* dst_mask */
935 TRUE), /* pcrel_offset */
936
937 HOWTO (R_ARM_ALU_PC_G1, /* type */
938 0, /* rightshift */
939 2, /* size (0 = byte, 1 = short, 2 = long) */
940 32, /* bitsize */
941 TRUE, /* pc_relative */
942 0, /* bitpos */
943 complain_overflow_dont,/* complain_on_overflow */
944 bfd_elf_generic_reloc, /* special_function */
945 "R_ARM_ALU_PC_G1", /* name */
946 FALSE, /* partial_inplace */
947 0xffffffff, /* src_mask */
948 0xffffffff, /* dst_mask */
949 TRUE), /* pcrel_offset */
950
951 HOWTO (R_ARM_ALU_PC_G2, /* type */
952 0, /* rightshift */
953 2, /* size (0 = byte, 1 = short, 2 = long) */
954 32, /* bitsize */
955 TRUE, /* pc_relative */
956 0, /* bitpos */
957 complain_overflow_dont,/* complain_on_overflow */
958 bfd_elf_generic_reloc, /* special_function */
959 "R_ARM_ALU_PC_G2", /* name */
960 FALSE, /* partial_inplace */
961 0xffffffff, /* src_mask */
962 0xffffffff, /* dst_mask */
963 TRUE), /* pcrel_offset */
964
965 HOWTO (R_ARM_LDR_PC_G1, /* type */
966 0, /* rightshift */
967 2, /* size (0 = byte, 1 = short, 2 = long) */
968 32, /* bitsize */
969 TRUE, /* pc_relative */
970 0, /* bitpos */
971 complain_overflow_dont,/* complain_on_overflow */
972 bfd_elf_generic_reloc, /* special_function */
973 "R_ARM_LDR_PC_G1", /* name */
974 FALSE, /* partial_inplace */
975 0xffffffff, /* src_mask */
976 0xffffffff, /* dst_mask */
977 TRUE), /* pcrel_offset */
978
979 HOWTO (R_ARM_LDR_PC_G2, /* type */
980 0, /* rightshift */
981 2, /* size (0 = byte, 1 = short, 2 = long) */
982 32, /* bitsize */
983 TRUE, /* pc_relative */
984 0, /* bitpos */
985 complain_overflow_dont,/* complain_on_overflow */
986 bfd_elf_generic_reloc, /* special_function */
987 "R_ARM_LDR_PC_G2", /* name */
988 FALSE, /* partial_inplace */
989 0xffffffff, /* src_mask */
990 0xffffffff, /* dst_mask */
991 TRUE), /* pcrel_offset */
992
993 HOWTO (R_ARM_LDRS_PC_G0, /* type */
994 0, /* rightshift */
995 2, /* size (0 = byte, 1 = short, 2 = long) */
996 32, /* bitsize */
997 TRUE, /* pc_relative */
998 0, /* bitpos */
999 complain_overflow_dont,/* complain_on_overflow */
1000 bfd_elf_generic_reloc, /* special_function */
1001 "R_ARM_LDRS_PC_G0", /* name */
1002 FALSE, /* partial_inplace */
1003 0xffffffff, /* src_mask */
1004 0xffffffff, /* dst_mask */
1005 TRUE), /* pcrel_offset */
1006
1007 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1008 0, /* rightshift */
1009 2, /* size (0 = byte, 1 = short, 2 = long) */
1010 32, /* bitsize */
1011 TRUE, /* pc_relative */
1012 0, /* bitpos */
1013 complain_overflow_dont,/* complain_on_overflow */
1014 bfd_elf_generic_reloc, /* special_function */
1015 "R_ARM_LDRS_PC_G1", /* name */
1016 FALSE, /* partial_inplace */
1017 0xffffffff, /* src_mask */
1018 0xffffffff, /* dst_mask */
1019 TRUE), /* pcrel_offset */
1020
1021 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1022 0, /* rightshift */
1023 2, /* size (0 = byte, 1 = short, 2 = long) */
1024 32, /* bitsize */
1025 TRUE, /* pc_relative */
1026 0, /* bitpos */
1027 complain_overflow_dont,/* complain_on_overflow */
1028 bfd_elf_generic_reloc, /* special_function */
1029 "R_ARM_LDRS_PC_G2", /* name */
1030 FALSE, /* partial_inplace */
1031 0xffffffff, /* src_mask */
1032 0xffffffff, /* dst_mask */
1033 TRUE), /* pcrel_offset */
1034
1035 HOWTO (R_ARM_LDC_PC_G0, /* type */
1036 0, /* rightshift */
1037 2, /* size (0 = byte, 1 = short, 2 = long) */
1038 32, /* bitsize */
1039 TRUE, /* pc_relative */
1040 0, /* bitpos */
1041 complain_overflow_dont,/* complain_on_overflow */
1042 bfd_elf_generic_reloc, /* special_function */
1043 "R_ARM_LDC_PC_G0", /* name */
1044 FALSE, /* partial_inplace */
1045 0xffffffff, /* src_mask */
1046 0xffffffff, /* dst_mask */
1047 TRUE), /* pcrel_offset */
1048
1049 HOWTO (R_ARM_LDC_PC_G1, /* type */
1050 0, /* rightshift */
1051 2, /* size (0 = byte, 1 = short, 2 = long) */
1052 32, /* bitsize */
1053 TRUE, /* pc_relative */
1054 0, /* bitpos */
1055 complain_overflow_dont,/* complain_on_overflow */
1056 bfd_elf_generic_reloc, /* special_function */
1057 "R_ARM_LDC_PC_G1", /* name */
1058 FALSE, /* partial_inplace */
1059 0xffffffff, /* src_mask */
1060 0xffffffff, /* dst_mask */
1061 TRUE), /* pcrel_offset */
1062
1063 HOWTO (R_ARM_LDC_PC_G2, /* type */
1064 0, /* rightshift */
1065 2, /* size (0 = byte, 1 = short, 2 = long) */
1066 32, /* bitsize */
1067 TRUE, /* pc_relative */
1068 0, /* bitpos */
1069 complain_overflow_dont,/* complain_on_overflow */
1070 bfd_elf_generic_reloc, /* special_function */
1071 "R_ARM_LDC_PC_G2", /* name */
1072 FALSE, /* partial_inplace */
1073 0xffffffff, /* src_mask */
1074 0xffffffff, /* dst_mask */
1075 TRUE), /* pcrel_offset */
1076
1077 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1078 0, /* rightshift */
1079 2, /* size (0 = byte, 1 = short, 2 = long) */
1080 32, /* bitsize */
1081 TRUE, /* pc_relative */
1082 0, /* bitpos */
1083 complain_overflow_dont,/* complain_on_overflow */
1084 bfd_elf_generic_reloc, /* special_function */
1085 "R_ARM_ALU_SB_G0_NC", /* name */
1086 FALSE, /* partial_inplace */
1087 0xffffffff, /* src_mask */
1088 0xffffffff, /* dst_mask */
1089 TRUE), /* pcrel_offset */
1090
1091 HOWTO (R_ARM_ALU_SB_G0, /* type */
1092 0, /* rightshift */
1093 2, /* size (0 = byte, 1 = short, 2 = long) */
1094 32, /* bitsize */
1095 TRUE, /* pc_relative */
1096 0, /* bitpos */
1097 complain_overflow_dont,/* complain_on_overflow */
1098 bfd_elf_generic_reloc, /* special_function */
1099 "R_ARM_ALU_SB_G0", /* name */
1100 FALSE, /* partial_inplace */
1101 0xffffffff, /* src_mask */
1102 0xffffffff, /* dst_mask */
1103 TRUE), /* pcrel_offset */
1104
1105 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1106 0, /* rightshift */
1107 2, /* size (0 = byte, 1 = short, 2 = long) */
1108 32, /* bitsize */
1109 TRUE, /* pc_relative */
1110 0, /* bitpos */
1111 complain_overflow_dont,/* complain_on_overflow */
1112 bfd_elf_generic_reloc, /* special_function */
1113 "R_ARM_ALU_SB_G1_NC", /* name */
1114 FALSE, /* partial_inplace */
1115 0xffffffff, /* src_mask */
1116 0xffffffff, /* dst_mask */
1117 TRUE), /* pcrel_offset */
1118
1119 HOWTO (R_ARM_ALU_SB_G1, /* type */
1120 0, /* rightshift */
1121 2, /* size (0 = byte, 1 = short, 2 = long) */
1122 32, /* bitsize */
1123 TRUE, /* pc_relative */
1124 0, /* bitpos */
1125 complain_overflow_dont,/* complain_on_overflow */
1126 bfd_elf_generic_reloc, /* special_function */
1127 "R_ARM_ALU_SB_G1", /* name */
1128 FALSE, /* partial_inplace */
1129 0xffffffff, /* src_mask */
1130 0xffffffff, /* dst_mask */
1131 TRUE), /* pcrel_offset */
1132
1133 HOWTO (R_ARM_ALU_SB_G2, /* type */
1134 0, /* rightshift */
1135 2, /* size (0 = byte, 1 = short, 2 = long) */
1136 32, /* bitsize */
1137 TRUE, /* pc_relative */
1138 0, /* bitpos */
1139 complain_overflow_dont,/* complain_on_overflow */
1140 bfd_elf_generic_reloc, /* special_function */
1141 "R_ARM_ALU_SB_G2", /* name */
1142 FALSE, /* partial_inplace */
1143 0xffffffff, /* src_mask */
1144 0xffffffff, /* dst_mask */
1145 TRUE), /* pcrel_offset */
1146
1147 HOWTO (R_ARM_LDR_SB_G0, /* type */
1148 0, /* rightshift */
1149 2, /* size (0 = byte, 1 = short, 2 = long) */
1150 32, /* bitsize */
1151 TRUE, /* pc_relative */
1152 0, /* bitpos */
1153 complain_overflow_dont,/* complain_on_overflow */
1154 bfd_elf_generic_reloc, /* special_function */
1155 "R_ARM_LDR_SB_G0", /* name */
1156 FALSE, /* partial_inplace */
1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
1159 TRUE), /* pcrel_offset */
1160
1161 HOWTO (R_ARM_LDR_SB_G1, /* type */
1162 0, /* rightshift */
1163 2, /* size (0 = byte, 1 = short, 2 = long) */
1164 32, /* bitsize */
1165 TRUE, /* pc_relative */
1166 0, /* bitpos */
1167 complain_overflow_dont,/* complain_on_overflow */
1168 bfd_elf_generic_reloc, /* special_function */
1169 "R_ARM_LDR_SB_G1", /* name */
1170 FALSE, /* partial_inplace */
1171 0xffffffff, /* src_mask */
1172 0xffffffff, /* dst_mask */
1173 TRUE), /* pcrel_offset */
1174
1175 HOWTO (R_ARM_LDR_SB_G2, /* type */
1176 0, /* rightshift */
1177 2, /* size (0 = byte, 1 = short, 2 = long) */
1178 32, /* bitsize */
1179 TRUE, /* pc_relative */
1180 0, /* bitpos */
1181 complain_overflow_dont,/* complain_on_overflow */
1182 bfd_elf_generic_reloc, /* special_function */
1183 "R_ARM_LDR_SB_G2", /* name */
1184 FALSE, /* partial_inplace */
1185 0xffffffff, /* src_mask */
1186 0xffffffff, /* dst_mask */
1187 TRUE), /* pcrel_offset */
1188
1189 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1190 0, /* rightshift */
1191 2, /* size (0 = byte, 1 = short, 2 = long) */
1192 32, /* bitsize */
1193 TRUE, /* pc_relative */
1194 0, /* bitpos */
1195 complain_overflow_dont,/* complain_on_overflow */
1196 bfd_elf_generic_reloc, /* special_function */
1197 "R_ARM_LDRS_SB_G0", /* name */
1198 FALSE, /* partial_inplace */
1199 0xffffffff, /* src_mask */
1200 0xffffffff, /* dst_mask */
1201 TRUE), /* pcrel_offset */
1202
1203 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1204 0, /* rightshift */
1205 2, /* size (0 = byte, 1 = short, 2 = long) */
1206 32, /* bitsize */
1207 TRUE, /* pc_relative */
1208 0, /* bitpos */
1209 complain_overflow_dont,/* complain_on_overflow */
1210 bfd_elf_generic_reloc, /* special_function */
1211 "R_ARM_LDRS_SB_G1", /* name */
1212 FALSE, /* partial_inplace */
1213 0xffffffff, /* src_mask */
1214 0xffffffff, /* dst_mask */
1215 TRUE), /* pcrel_offset */
1216
1217 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1218 0, /* rightshift */
1219 2, /* size (0 = byte, 1 = short, 2 = long) */
1220 32, /* bitsize */
1221 TRUE, /* pc_relative */
1222 0, /* bitpos */
1223 complain_overflow_dont,/* complain_on_overflow */
1224 bfd_elf_generic_reloc, /* special_function */
1225 "R_ARM_LDRS_SB_G2", /* name */
1226 FALSE, /* partial_inplace */
1227 0xffffffff, /* src_mask */
1228 0xffffffff, /* dst_mask */
1229 TRUE), /* pcrel_offset */
1230
1231 HOWTO (R_ARM_LDC_SB_G0, /* type */
1232 0, /* rightshift */
1233 2, /* size (0 = byte, 1 = short, 2 = long) */
1234 32, /* bitsize */
1235 TRUE, /* pc_relative */
1236 0, /* bitpos */
1237 complain_overflow_dont,/* complain_on_overflow */
1238 bfd_elf_generic_reloc, /* special_function */
1239 "R_ARM_LDC_SB_G0", /* name */
1240 FALSE, /* partial_inplace */
1241 0xffffffff, /* src_mask */
1242 0xffffffff, /* dst_mask */
1243 TRUE), /* pcrel_offset */
1244
1245 HOWTO (R_ARM_LDC_SB_G1, /* type */
1246 0, /* rightshift */
1247 2, /* size (0 = byte, 1 = short, 2 = long) */
1248 32, /* bitsize */
1249 TRUE, /* pc_relative */
1250 0, /* bitpos */
1251 complain_overflow_dont,/* complain_on_overflow */
1252 bfd_elf_generic_reloc, /* special_function */
1253 "R_ARM_LDC_SB_G1", /* name */
1254 FALSE, /* partial_inplace */
1255 0xffffffff, /* src_mask */
1256 0xffffffff, /* dst_mask */
1257 TRUE), /* pcrel_offset */
1258
1259 HOWTO (R_ARM_LDC_SB_G2, /* type */
1260 0, /* rightshift */
1261 2, /* size (0 = byte, 1 = short, 2 = long) */
1262 32, /* bitsize */
1263 TRUE, /* pc_relative */
1264 0, /* bitpos */
1265 complain_overflow_dont,/* complain_on_overflow */
1266 bfd_elf_generic_reloc, /* special_function */
1267 "R_ARM_LDC_SB_G2", /* name */
1268 FALSE, /* partial_inplace */
1269 0xffffffff, /* src_mask */
1270 0xffffffff, /* dst_mask */
1271 TRUE), /* pcrel_offset */
1272
1273 /* End of group relocations. */
1274
1275 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1276 0, /* rightshift */
1277 2, /* size (0 = byte, 1 = short, 2 = long) */
1278 16, /* bitsize */
1279 FALSE, /* pc_relative */
1280 0, /* bitpos */
1281 complain_overflow_dont,/* complain_on_overflow */
1282 bfd_elf_generic_reloc, /* special_function */
1283 "R_ARM_MOVW_BREL_NC", /* name */
1284 FALSE, /* partial_inplace */
1285 0x0000ffff, /* src_mask */
1286 0x0000ffff, /* dst_mask */
1287 FALSE), /* pcrel_offset */
1288
1289 HOWTO (R_ARM_MOVT_BREL, /* type */
1290 0, /* rightshift */
1291 2, /* size (0 = byte, 1 = short, 2 = long) */
1292 16, /* bitsize */
1293 FALSE, /* pc_relative */
1294 0, /* bitpos */
1295 complain_overflow_bitfield,/* complain_on_overflow */
1296 bfd_elf_generic_reloc, /* special_function */
1297 "R_ARM_MOVT_BREL", /* name */
1298 FALSE, /* partial_inplace */
1299 0x0000ffff, /* src_mask */
1300 0x0000ffff, /* dst_mask */
1301 FALSE), /* pcrel_offset */
1302
1303 HOWTO (R_ARM_MOVW_BREL, /* type */
1304 0, /* rightshift */
1305 2, /* size (0 = byte, 1 = short, 2 = long) */
1306 16, /* bitsize */
1307 FALSE, /* pc_relative */
1308 0, /* bitpos */
1309 complain_overflow_dont,/* complain_on_overflow */
1310 bfd_elf_generic_reloc, /* special_function */
1311 "R_ARM_MOVW_BREL", /* name */
1312 FALSE, /* partial_inplace */
1313 0x0000ffff, /* src_mask */
1314 0x0000ffff, /* dst_mask */
1315 FALSE), /* pcrel_offset */
1316
1317 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1318 0, /* rightshift */
1319 2, /* size (0 = byte, 1 = short, 2 = long) */
1320 16, /* bitsize */
1321 FALSE, /* pc_relative */
1322 0, /* bitpos */
1323 complain_overflow_dont,/* complain_on_overflow */
1324 bfd_elf_generic_reloc, /* special_function */
1325 "R_ARM_THM_MOVW_BREL_NC",/* name */
1326 FALSE, /* partial_inplace */
1327 0x040f70ff, /* src_mask */
1328 0x040f70ff, /* dst_mask */
1329 FALSE), /* pcrel_offset */
1330
1331 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1332 0, /* rightshift */
1333 2, /* size (0 = byte, 1 = short, 2 = long) */
1334 16, /* bitsize */
1335 FALSE, /* pc_relative */
1336 0, /* bitpos */
1337 complain_overflow_bitfield,/* complain_on_overflow */
1338 bfd_elf_generic_reloc, /* special_function */
1339 "R_ARM_THM_MOVT_BREL", /* name */
1340 FALSE, /* partial_inplace */
1341 0x040f70ff, /* src_mask */
1342 0x040f70ff, /* dst_mask */
1343 FALSE), /* pcrel_offset */
1344
1345 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1346 0, /* rightshift */
1347 2, /* size (0 = byte, 1 = short, 2 = long) */
1348 16, /* bitsize */
1349 FALSE, /* pc_relative */
1350 0, /* bitpos */
1351 complain_overflow_dont,/* complain_on_overflow */
1352 bfd_elf_generic_reloc, /* special_function */
1353 "R_ARM_THM_MOVW_BREL", /* name */
1354 FALSE, /* partial_inplace */
1355 0x040f70ff, /* src_mask */
1356 0x040f70ff, /* dst_mask */
1357 FALSE), /* pcrel_offset */
1358
1359 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1360 0, /* rightshift */
1361 2, /* size (0 = byte, 1 = short, 2 = long) */
1362 32, /* bitsize */
1363 FALSE, /* pc_relative */
1364 0, /* bitpos */
1365 complain_overflow_bitfield,/* complain_on_overflow */
1366 NULL, /* special_function */
1367 "R_ARM_TLS_GOTDESC", /* name */
1368 TRUE, /* partial_inplace */
1369 0xffffffff, /* src_mask */
1370 0xffffffff, /* dst_mask */
1371 FALSE), /* pcrel_offset */
1372
1373 HOWTO (R_ARM_TLS_CALL, /* type */
1374 0, /* rightshift */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1376 24, /* bitsize */
1377 FALSE, /* pc_relative */
1378 0, /* bitpos */
1379 complain_overflow_dont,/* complain_on_overflow */
1380 bfd_elf_generic_reloc, /* special_function */
1381 "R_ARM_TLS_CALL", /* name */
1382 FALSE, /* partial_inplace */
1383 0x00ffffff, /* src_mask */
1384 0x00ffffff, /* dst_mask */
1385 FALSE), /* pcrel_offset */
1386
1387 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1388 0, /* rightshift */
1389 2, /* size (0 = byte, 1 = short, 2 = long) */
1390 0, /* bitsize */
1391 FALSE, /* pc_relative */
1392 0, /* bitpos */
1393 complain_overflow_bitfield,/* complain_on_overflow */
1394 bfd_elf_generic_reloc, /* special_function */
1395 "R_ARM_TLS_DESCSEQ", /* name */
1396 FALSE, /* partial_inplace */
1397 0x00000000, /* src_mask */
1398 0x00000000, /* dst_mask */
1399 FALSE), /* pcrel_offset */
1400
1401 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1402 0, /* rightshift */
1403 2, /* size (0 = byte, 1 = short, 2 = long) */
1404 24, /* bitsize */
1405 FALSE, /* pc_relative */
1406 0, /* bitpos */
1407 complain_overflow_dont,/* complain_on_overflow */
1408 bfd_elf_generic_reloc, /* special_function */
1409 "R_ARM_THM_TLS_CALL", /* name */
1410 FALSE, /* partial_inplace */
1411 0x07ff07ff, /* src_mask */
1412 0x07ff07ff, /* dst_mask */
1413 FALSE), /* pcrel_offset */
1414
1415 HOWTO (R_ARM_PLT32_ABS, /* type */
1416 0, /* rightshift */
1417 2, /* size (0 = byte, 1 = short, 2 = long) */
1418 32, /* bitsize */
1419 FALSE, /* pc_relative */
1420 0, /* bitpos */
1421 complain_overflow_dont,/* complain_on_overflow */
1422 bfd_elf_generic_reloc, /* special_function */
1423 "R_ARM_PLT32_ABS", /* name */
1424 FALSE, /* partial_inplace */
1425 0xffffffff, /* src_mask */
1426 0xffffffff, /* dst_mask */
1427 FALSE), /* pcrel_offset */
1428
1429 HOWTO (R_ARM_GOT_ABS, /* type */
1430 0, /* rightshift */
1431 2, /* size (0 = byte, 1 = short, 2 = long) */
1432 32, /* bitsize */
1433 FALSE, /* pc_relative */
1434 0, /* bitpos */
1435 complain_overflow_dont,/* complain_on_overflow */
1436 bfd_elf_generic_reloc, /* special_function */
1437 "R_ARM_GOT_ABS", /* name */
1438 FALSE, /* partial_inplace */
1439 0xffffffff, /* src_mask */
1440 0xffffffff, /* dst_mask */
1441 FALSE), /* pcrel_offset */
1442
1443 HOWTO (R_ARM_GOT_PREL, /* type */
1444 0, /* rightshift */
1445 2, /* size (0 = byte, 1 = short, 2 = long) */
1446 32, /* bitsize */
1447 TRUE, /* pc_relative */
1448 0, /* bitpos */
1449 complain_overflow_dont, /* complain_on_overflow */
1450 bfd_elf_generic_reloc, /* special_function */
1451 "R_ARM_GOT_PREL", /* name */
1452 FALSE, /* partial_inplace */
1453 0xffffffff, /* src_mask */
1454 0xffffffff, /* dst_mask */
1455 TRUE), /* pcrel_offset */
1456
1457 HOWTO (R_ARM_GOT_BREL12, /* type */
1458 0, /* rightshift */
1459 2, /* size (0 = byte, 1 = short, 2 = long) */
1460 12, /* bitsize */
1461 FALSE, /* pc_relative */
1462 0, /* bitpos */
1463 complain_overflow_bitfield,/* complain_on_overflow */
1464 bfd_elf_generic_reloc, /* special_function */
1465 "R_ARM_GOT_BREL12", /* name */
1466 FALSE, /* partial_inplace */
1467 0x00000fff, /* src_mask */
1468 0x00000fff, /* dst_mask */
1469 FALSE), /* pcrel_offset */
1470
1471 HOWTO (R_ARM_GOTOFF12, /* type */
1472 0, /* rightshift */
1473 2, /* size (0 = byte, 1 = short, 2 = long) */
1474 12, /* bitsize */
1475 FALSE, /* pc_relative */
1476 0, /* bitpos */
1477 complain_overflow_bitfield,/* complain_on_overflow */
1478 bfd_elf_generic_reloc, /* special_function */
1479 "R_ARM_GOTOFF12", /* name */
1480 FALSE, /* partial_inplace */
1481 0x00000fff, /* src_mask */
1482 0x00000fff, /* dst_mask */
1483 FALSE), /* pcrel_offset */
1484
1485 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1486
1487 /* GNU extension to record C++ vtable member usage */
1488 HOWTO (R_ARM_GNU_VTENTRY, /* type */
1489 0, /* rightshift */
1490 2, /* size (0 = byte, 1 = short, 2 = long) */
1491 0, /* bitsize */
1492 FALSE, /* pc_relative */
1493 0, /* bitpos */
1494 complain_overflow_dont, /* complain_on_overflow */
1495 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1496 "R_ARM_GNU_VTENTRY", /* name */
1497 FALSE, /* partial_inplace */
1498 0, /* src_mask */
1499 0, /* dst_mask */
1500 FALSE), /* pcrel_offset */
1501
1502 /* GNU extension to record C++ vtable hierarchy */
1503 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1504 0, /* rightshift */
1505 2, /* size (0 = byte, 1 = short, 2 = long) */
1506 0, /* bitsize */
1507 FALSE, /* pc_relative */
1508 0, /* bitpos */
1509 complain_overflow_dont, /* complain_on_overflow */
1510 NULL, /* special_function */
1511 "R_ARM_GNU_VTINHERIT", /* name */
1512 FALSE, /* partial_inplace */
1513 0, /* src_mask */
1514 0, /* dst_mask */
1515 FALSE), /* pcrel_offset */
1516
1517 HOWTO (R_ARM_THM_JUMP11, /* type */
1518 1, /* rightshift */
1519 1, /* size (0 = byte, 1 = short, 2 = long) */
1520 11, /* bitsize */
1521 TRUE, /* pc_relative */
1522 0, /* bitpos */
1523 complain_overflow_signed, /* complain_on_overflow */
1524 bfd_elf_generic_reloc, /* special_function */
1525 "R_ARM_THM_JUMP11", /* name */
1526 FALSE, /* partial_inplace */
1527 0x000007ff, /* src_mask */
1528 0x000007ff, /* dst_mask */
1529 TRUE), /* pcrel_offset */
1530
1531 HOWTO (R_ARM_THM_JUMP8, /* type */
1532 1, /* rightshift */
1533 1, /* size (0 = byte, 1 = short, 2 = long) */
1534 8, /* bitsize */
1535 TRUE, /* pc_relative */
1536 0, /* bitpos */
1537 complain_overflow_signed, /* complain_on_overflow */
1538 bfd_elf_generic_reloc, /* special_function */
1539 "R_ARM_THM_JUMP8", /* name */
1540 FALSE, /* partial_inplace */
1541 0x000000ff, /* src_mask */
1542 0x000000ff, /* dst_mask */
1543 TRUE), /* pcrel_offset */
1544
1545 /* TLS relocations */
1546 HOWTO (R_ARM_TLS_GD32, /* type */
1547 0, /* rightshift */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
1549 32, /* bitsize */
1550 FALSE, /* pc_relative */
1551 0, /* bitpos */
1552 complain_overflow_bitfield,/* complain_on_overflow */
1553 NULL, /* special_function */
1554 "R_ARM_TLS_GD32", /* name */
1555 TRUE, /* partial_inplace */
1556 0xffffffff, /* src_mask */
1557 0xffffffff, /* dst_mask */
1558 FALSE), /* pcrel_offset */
1559
1560 HOWTO (R_ARM_TLS_LDM32, /* type */
1561 0, /* rightshift */
1562 2, /* size (0 = byte, 1 = short, 2 = long) */
1563 32, /* bitsize */
1564 FALSE, /* pc_relative */
1565 0, /* bitpos */
1566 complain_overflow_bitfield,/* complain_on_overflow */
1567 bfd_elf_generic_reloc, /* special_function */
1568 "R_ARM_TLS_LDM32", /* name */
1569 TRUE, /* partial_inplace */
1570 0xffffffff, /* src_mask */
1571 0xffffffff, /* dst_mask */
1572 FALSE), /* pcrel_offset */
1573
1574 HOWTO (R_ARM_TLS_LDO32, /* type */
1575 0, /* rightshift */
1576 2, /* size (0 = byte, 1 = short, 2 = long) */
1577 32, /* bitsize */
1578 FALSE, /* pc_relative */
1579 0, /* bitpos */
1580 complain_overflow_bitfield,/* complain_on_overflow */
1581 bfd_elf_generic_reloc, /* special_function */
1582 "R_ARM_TLS_LDO32", /* name */
1583 TRUE, /* partial_inplace */
1584 0xffffffff, /* src_mask */
1585 0xffffffff, /* dst_mask */
1586 FALSE), /* pcrel_offset */
1587
1588 HOWTO (R_ARM_TLS_IE32, /* type */
1589 0, /* rightshift */
1590 2, /* size (0 = byte, 1 = short, 2 = long) */
1591 32, /* bitsize */
1592 FALSE, /* pc_relative */
1593 0, /* bitpos */
1594 complain_overflow_bitfield,/* complain_on_overflow */
1595 NULL, /* special_function */
1596 "R_ARM_TLS_IE32", /* name */
1597 TRUE, /* partial_inplace */
1598 0xffffffff, /* src_mask */
1599 0xffffffff, /* dst_mask */
1600 FALSE), /* pcrel_offset */
1601
1602 HOWTO (R_ARM_TLS_LE32, /* type */
1603 0, /* rightshift */
1604 2, /* size (0 = byte, 1 = short, 2 = long) */
1605 32, /* bitsize */
1606 FALSE, /* pc_relative */
1607 0, /* bitpos */
1608 complain_overflow_bitfield,/* complain_on_overflow */
1609 NULL, /* special_function */
1610 "R_ARM_TLS_LE32", /* name */
1611 TRUE, /* partial_inplace */
1612 0xffffffff, /* src_mask */
1613 0xffffffff, /* dst_mask */
1614 FALSE), /* pcrel_offset */
1615
1616 HOWTO (R_ARM_TLS_LDO12, /* type */
1617 0, /* rightshift */
1618 2, /* size (0 = byte, 1 = short, 2 = long) */
1619 12, /* bitsize */
1620 FALSE, /* pc_relative */
1621 0, /* bitpos */
1622 complain_overflow_bitfield,/* complain_on_overflow */
1623 bfd_elf_generic_reloc, /* special_function */
1624 "R_ARM_TLS_LDO12", /* name */
1625 FALSE, /* partial_inplace */
1626 0x00000fff, /* src_mask */
1627 0x00000fff, /* dst_mask */
1628 FALSE), /* pcrel_offset */
1629
1630 HOWTO (R_ARM_TLS_LE12, /* type */
1631 0, /* rightshift */
1632 2, /* size (0 = byte, 1 = short, 2 = long) */
1633 12, /* bitsize */
1634 FALSE, /* pc_relative */
1635 0, /* bitpos */
1636 complain_overflow_bitfield,/* complain_on_overflow */
1637 bfd_elf_generic_reloc, /* special_function */
1638 "R_ARM_TLS_LE12", /* name */
1639 FALSE, /* partial_inplace */
1640 0x00000fff, /* src_mask */
1641 0x00000fff, /* dst_mask */
1642 FALSE), /* pcrel_offset */
1643
1644 HOWTO (R_ARM_TLS_IE12GP, /* type */
1645 0, /* rightshift */
1646 2, /* size (0 = byte, 1 = short, 2 = long) */
1647 12, /* bitsize */
1648 FALSE, /* pc_relative */
1649 0, /* bitpos */
1650 complain_overflow_bitfield,/* complain_on_overflow */
1651 bfd_elf_generic_reloc, /* special_function */
1652 "R_ARM_TLS_IE12GP", /* name */
1653 FALSE, /* partial_inplace */
1654 0x00000fff, /* src_mask */
1655 0x00000fff, /* dst_mask */
1656 FALSE), /* pcrel_offset */
1657
1658 /* 112-127 private relocations. */
1659 EMPTY_HOWTO (112),
1660 EMPTY_HOWTO (113),
1661 EMPTY_HOWTO (114),
1662 EMPTY_HOWTO (115),
1663 EMPTY_HOWTO (116),
1664 EMPTY_HOWTO (117),
1665 EMPTY_HOWTO (118),
1666 EMPTY_HOWTO (119),
1667 EMPTY_HOWTO (120),
1668 EMPTY_HOWTO (121),
1669 EMPTY_HOWTO (122),
1670 EMPTY_HOWTO (123),
1671 EMPTY_HOWTO (124),
1672 EMPTY_HOWTO (125),
1673 EMPTY_HOWTO (126),
1674 EMPTY_HOWTO (127),
1675
1676 /* R_ARM_ME_TOO, obsolete. */
1677 EMPTY_HOWTO (128),
1678
1679 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1680 0, /* rightshift */
1681 1, /* size (0 = byte, 1 = short, 2 = long) */
1682 0, /* bitsize */
1683 FALSE, /* pc_relative */
1684 0, /* bitpos */
1685 complain_overflow_bitfield,/* complain_on_overflow */
1686 bfd_elf_generic_reloc, /* special_function */
1687 "R_ARM_THM_TLS_DESCSEQ",/* name */
1688 FALSE, /* partial_inplace */
1689 0x00000000, /* src_mask */
1690 0x00000000, /* dst_mask */
1691 FALSE), /* pcrel_offset */
1692 EMPTY_HOWTO (130),
1693 EMPTY_HOWTO (131),
1694 HOWTO (R_ARM_THM_ALU_ABS_G0_NC,/* type. */
1695 0, /* rightshift. */
1696 1, /* size (0 = byte, 1 = short, 2 = long). */
1697 16, /* bitsize. */
1698 FALSE, /* pc_relative. */
1699 0, /* bitpos. */
1700 complain_overflow_bitfield,/* complain_on_overflow. */
1701 bfd_elf_generic_reloc, /* special_function. */
1702 "R_ARM_THM_ALU_ABS_G0_NC",/* name. */
1703 FALSE, /* partial_inplace. */
1704 0x00000000, /* src_mask. */
1705 0x00000000, /* dst_mask. */
1706 FALSE), /* pcrel_offset. */
1707 HOWTO (R_ARM_THM_ALU_ABS_G1_NC,/* type. */
1708 0, /* rightshift. */
1709 1, /* size (0 = byte, 1 = short, 2 = long). */
1710 16, /* bitsize. */
1711 FALSE, /* pc_relative. */
1712 0, /* bitpos. */
1713 complain_overflow_bitfield,/* complain_on_overflow. */
1714 bfd_elf_generic_reloc, /* special_function. */
1715 "R_ARM_THM_ALU_ABS_G1_NC",/* name. */
1716 FALSE, /* partial_inplace. */
1717 0x00000000, /* src_mask. */
1718 0x00000000, /* dst_mask. */
1719 FALSE), /* pcrel_offset. */
1720 HOWTO (R_ARM_THM_ALU_ABS_G2_NC,/* type. */
1721 0, /* rightshift. */
1722 1, /* size (0 = byte, 1 = short, 2 = long). */
1723 16, /* bitsize. */
1724 FALSE, /* pc_relative. */
1725 0, /* bitpos. */
1726 complain_overflow_bitfield,/* complain_on_overflow. */
1727 bfd_elf_generic_reloc, /* special_function. */
1728 "R_ARM_THM_ALU_ABS_G2_NC",/* name. */
1729 FALSE, /* partial_inplace. */
1730 0x00000000, /* src_mask. */
1731 0x00000000, /* dst_mask. */
1732 FALSE), /* pcrel_offset. */
1733 HOWTO (R_ARM_THM_ALU_ABS_G3_NC,/* type. */
1734 0, /* rightshift. */
1735 1, /* size (0 = byte, 1 = short, 2 = long). */
1736 16, /* bitsize. */
1737 FALSE, /* pc_relative. */
1738 0, /* bitpos. */
1739 complain_overflow_bitfield,/* complain_on_overflow. */
1740 bfd_elf_generic_reloc, /* special_function. */
1741 "R_ARM_THM_ALU_ABS_G3_NC",/* name. */
1742 FALSE, /* partial_inplace. */
1743 0x00000000, /* src_mask. */
1744 0x00000000, /* dst_mask. */
1745 FALSE), /* pcrel_offset. */
1746 };
1747
1748 /* 160 onwards: */
1749 static reloc_howto_type elf32_arm_howto_table_2[1] =
1750 {
1751 HOWTO (R_ARM_IRELATIVE, /* type */
1752 0, /* rightshift */
1753 2, /* size (0 = byte, 1 = short, 2 = long) */
1754 32, /* bitsize */
1755 FALSE, /* pc_relative */
1756 0, /* bitpos */
1757 complain_overflow_bitfield,/* complain_on_overflow */
1758 bfd_elf_generic_reloc, /* special_function */
1759 "R_ARM_IRELATIVE", /* name */
1760 TRUE, /* partial_inplace */
1761 0xffffffff, /* src_mask */
1762 0xffffffff, /* dst_mask */
1763 FALSE) /* pcrel_offset */
1764 };
1765
1766 /* 249-255 extended, currently unused, relocations: */
1767 static reloc_howto_type elf32_arm_howto_table_3[4] =
1768 {
1769 HOWTO (R_ARM_RREL32, /* type */
1770 0, /* rightshift */
1771 0, /* size (0 = byte, 1 = short, 2 = long) */
1772 0, /* bitsize */
1773 FALSE, /* pc_relative */
1774 0, /* bitpos */
1775 complain_overflow_dont,/* complain_on_overflow */
1776 bfd_elf_generic_reloc, /* special_function */
1777 "R_ARM_RREL32", /* name */
1778 FALSE, /* partial_inplace */
1779 0, /* src_mask */
1780 0, /* dst_mask */
1781 FALSE), /* pcrel_offset */
1782
1783 HOWTO (R_ARM_RABS32, /* type */
1784 0, /* rightshift */
1785 0, /* size (0 = byte, 1 = short, 2 = long) */
1786 0, /* bitsize */
1787 FALSE, /* pc_relative */
1788 0, /* bitpos */
1789 complain_overflow_dont,/* complain_on_overflow */
1790 bfd_elf_generic_reloc, /* special_function */
1791 "R_ARM_RABS32", /* name */
1792 FALSE, /* partial_inplace */
1793 0, /* src_mask */
1794 0, /* dst_mask */
1795 FALSE), /* pcrel_offset */
1796
1797 HOWTO (R_ARM_RPC24, /* type */
1798 0, /* rightshift */
1799 0, /* size (0 = byte, 1 = short, 2 = long) */
1800 0, /* bitsize */
1801 FALSE, /* pc_relative */
1802 0, /* bitpos */
1803 complain_overflow_dont,/* complain_on_overflow */
1804 bfd_elf_generic_reloc, /* special_function */
1805 "R_ARM_RPC24", /* name */
1806 FALSE, /* partial_inplace */
1807 0, /* src_mask */
1808 0, /* dst_mask */
1809 FALSE), /* pcrel_offset */
1810
1811 HOWTO (R_ARM_RBASE, /* type */
1812 0, /* rightshift */
1813 0, /* size (0 = byte, 1 = short, 2 = long) */
1814 0, /* bitsize */
1815 FALSE, /* pc_relative */
1816 0, /* bitpos */
1817 complain_overflow_dont,/* complain_on_overflow */
1818 bfd_elf_generic_reloc, /* special_function */
1819 "R_ARM_RBASE", /* name */
1820 FALSE, /* partial_inplace */
1821 0, /* src_mask */
1822 0, /* dst_mask */
1823 FALSE) /* pcrel_offset */
1824 };
1825
1826 static reloc_howto_type *
1827 elf32_arm_howto_from_type (unsigned int r_type)
1828 {
1829 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
1830 return &elf32_arm_howto_table_1[r_type];
1831
1832 if (r_type == R_ARM_IRELATIVE)
1833 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1834
1835 if (r_type >= R_ARM_RREL32
1836 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1837 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
1838
1839 return NULL;
1840 }
1841
1842 static void
1843 elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1844 Elf_Internal_Rela * elf_reloc)
1845 {
1846 unsigned int r_type;
1847
1848 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1849 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1850 }
1851
1852 struct elf32_arm_reloc_map
1853 {
1854 bfd_reloc_code_real_type bfd_reloc_val;
1855 unsigned char elf_reloc_val;
1856 };
1857
1858 /* All entries in this list must also be present in elf32_arm_howto_table. */
1859 static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1860 {
1861 {BFD_RELOC_NONE, R_ARM_NONE},
1862 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
1863 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1864 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
1865 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1866 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1867 {BFD_RELOC_32, R_ARM_ABS32},
1868 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1869 {BFD_RELOC_8, R_ARM_ABS8},
1870 {BFD_RELOC_16, R_ARM_ABS16},
1871 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1872 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
1873 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1874 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1875 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1876 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1877 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1878 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
1879 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1880 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1881 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
1882 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
1883 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1884 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
1885 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1886 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1887 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1888 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1889 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1890 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
1891 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1892 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1893 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1894 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1895 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1896 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1897 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1898 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
1899 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1900 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1901 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1902 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1903 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1904 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1905 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1906 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
1907 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
1908 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1909 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
1910 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1911 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1912 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1913 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1914 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1915 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1916 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1917 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
1918 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1919 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1920 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1921 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1922 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1923 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1924 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1925 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1926 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1927 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1928 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1929 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1930 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1931 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1932 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1933 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1934 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1935 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1936 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1937 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1938 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1939 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1940 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1941 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1942 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1943 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1944 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
1945 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1946 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX},
1947 {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC, R_ARM_THM_ALU_ABS_G3_NC},
1948 {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC, R_ARM_THM_ALU_ABS_G2_NC},
1949 {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC, R_ARM_THM_ALU_ABS_G1_NC},
1950 {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G0_NC}
1951 };
1952
1953 static reloc_howto_type *
1954 elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1955 bfd_reloc_code_real_type code)
1956 {
1957 unsigned int i;
1958
1959 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
1960 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1961 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
1962
1963 return NULL;
1964 }
1965
1966 static reloc_howto_type *
1967 elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1968 const char *r_name)
1969 {
1970 unsigned int i;
1971
1972 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
1973 if (elf32_arm_howto_table_1[i].name != NULL
1974 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1975 return &elf32_arm_howto_table_1[i];
1976
1977 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
1978 if (elf32_arm_howto_table_2[i].name != NULL
1979 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1980 return &elf32_arm_howto_table_2[i];
1981
1982 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
1983 if (elf32_arm_howto_table_3[i].name != NULL
1984 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
1985 return &elf32_arm_howto_table_3[i];
1986
1987 return NULL;
1988 }
1989
1990 /* Support for core dump NOTE sections. */
1991
1992 static bfd_boolean
1993 elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
1994 {
1995 int offset;
1996 size_t size;
1997
1998 switch (note->descsz)
1999 {
2000 default:
2001 return FALSE;
2002
2003 case 148: /* Linux/ARM 32-bit. */
2004 /* pr_cursig */
2005 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2006
2007 /* pr_pid */
2008 elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
2009
2010 /* pr_reg */
2011 offset = 72;
2012 size = 72;
2013
2014 break;
2015 }
2016
2017 /* Make a ".reg/999" section. */
2018 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
2019 size, note->descpos + offset);
2020 }
2021
2022 static bfd_boolean
2023 elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
2024 {
2025 switch (note->descsz)
2026 {
2027 default:
2028 return FALSE;
2029
2030 case 124: /* Linux/ARM elf_prpsinfo. */
2031 elf_tdata (abfd)->core->pid
2032 = bfd_get_32 (abfd, note->descdata + 12);
2033 elf_tdata (abfd)->core->program
2034 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
2035 elf_tdata (abfd)->core->command
2036 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
2037 }
2038
2039 /* Note that for some reason, a spurious space is tacked
2040 onto the end of the args in some (at least one anyway)
2041 implementations, so strip it off if it exists. */
2042 {
2043 char *command = elf_tdata (abfd)->core->command;
2044 int n = strlen (command);
2045
2046 if (0 < n && command[n - 1] == ' ')
2047 command[n - 1] = '\0';
2048 }
2049
2050 return TRUE;
2051 }
2052
2053 static char *
2054 elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
2055 int note_type, ...)
2056 {
2057 switch (note_type)
2058 {
2059 default:
2060 return NULL;
2061
2062 case NT_PRPSINFO:
2063 {
2064 char data[124];
2065 va_list ap;
2066
2067 va_start (ap, note_type);
2068 memset (data, 0, sizeof (data));
2069 strncpy (data + 28, va_arg (ap, const char *), 16);
2070 strncpy (data + 44, va_arg (ap, const char *), 80);
2071 va_end (ap);
2072
2073 return elfcore_write_note (abfd, buf, bufsiz,
2074 "CORE", note_type, data, sizeof (data));
2075 }
2076
2077 case NT_PRSTATUS:
2078 {
2079 char data[148];
2080 va_list ap;
2081 long pid;
2082 int cursig;
2083 const void *greg;
2084
2085 va_start (ap, note_type);
2086 memset (data, 0, sizeof (data));
2087 pid = va_arg (ap, long);
2088 bfd_put_32 (abfd, pid, data + 24);
2089 cursig = va_arg (ap, int);
2090 bfd_put_16 (abfd, cursig, data + 12);
2091 greg = va_arg (ap, const void *);
2092 memcpy (data + 72, greg, 72);
2093 va_end (ap);
2094
2095 return elfcore_write_note (abfd, buf, bufsiz,
2096 "CORE", note_type, data, sizeof (data));
2097 }
2098 }
2099 }
2100
2101 #define TARGET_LITTLE_SYM arm_elf32_le_vec
2102 #define TARGET_LITTLE_NAME "elf32-littlearm"
2103 #define TARGET_BIG_SYM arm_elf32_be_vec
2104 #define TARGET_BIG_NAME "elf32-bigarm"
2105
2106 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2107 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2108 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2109
2110 typedef unsigned long int insn32;
2111 typedef unsigned short int insn16;
2112
2113 /* In lieu of proper flags, assume all EABIv4 or later objects are
2114 interworkable. */
2115 #define INTERWORK_FLAG(abfd) \
2116 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2117 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2118 || ((abfd)->flags & BFD_LINKER_CREATED))
2119
2120 /* The linker script knows the section names for placement.
2121 The entry_names are used to do simple name mangling on the stubs.
2122 Given a function name, and its type, the stub can be found. The
2123 name can be changed. The only requirement is the %s be present. */
2124 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2125 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2126
2127 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2128 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2129
2130 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2131 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2132
2133 #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer"
2134 #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "__stm32l4xx_veneer_%x"
2135
2136 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2137 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2138
2139 #define STUB_ENTRY_NAME "__%s_veneer"
2140
2141 #define CMSE_PREFIX "__acle_se_"
2142
2143 /* The name of the dynamic interpreter. This is put in the .interp
2144 section. */
2145 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2146
2147 static const unsigned long tls_trampoline [] =
2148 {
2149 0xe08e0000, /* add r0, lr, r0 */
2150 0xe5901004, /* ldr r1, [r0,#4] */
2151 0xe12fff11, /* bx r1 */
2152 };
2153
2154 static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2155 {
2156 0xe52d2004, /* push {r2} */
2157 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2158 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2159 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2160 0xe081100f, /* 2: add r1, pc */
2161 0xe12fff12, /* bx r2 */
2162 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2163 + dl_tlsdesc_lazy_resolver(GOT) */
2164 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2165 };
2166
2167 #ifdef FOUR_WORD_PLT
2168
2169 /* The first entry in a procedure linkage table looks like
2170 this. It is set up so that any shared library function that is
2171 called before the relocation has been set up calls the dynamic
2172 linker first. */
2173 static const bfd_vma elf32_arm_plt0_entry [] =
2174 {
2175 0xe52de004, /* str lr, [sp, #-4]! */
2176 0xe59fe010, /* ldr lr, [pc, #16] */
2177 0xe08fe00e, /* add lr, pc, lr */
2178 0xe5bef008, /* ldr pc, [lr, #8]! */
2179 };
2180
2181 /* Subsequent entries in a procedure linkage table look like
2182 this. */
2183 static const bfd_vma elf32_arm_plt_entry [] =
2184 {
2185 0xe28fc600, /* add ip, pc, #NN */
2186 0xe28cca00, /* add ip, ip, #NN */
2187 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2188 0x00000000, /* unused */
2189 };
2190
2191 #else /* not FOUR_WORD_PLT */
2192
2193 /* The first entry in a procedure linkage table looks like
2194 this. It is set up so that any shared library function that is
2195 called before the relocation has been set up calls the dynamic
2196 linker first. */
2197 static const bfd_vma elf32_arm_plt0_entry [] =
2198 {
2199 0xe52de004, /* str lr, [sp, #-4]! */
2200 0xe59fe004, /* ldr lr, [pc, #4] */
2201 0xe08fe00e, /* add lr, pc, lr */
2202 0xe5bef008, /* ldr pc, [lr, #8]! */
2203 0x00000000, /* &GOT[0] - . */
2204 };
2205
2206 /* By default subsequent entries in a procedure linkage table look like
2207 this. Offsets that don't fit into 28 bits will cause link error. */
2208 static const bfd_vma elf32_arm_plt_entry_short [] =
2209 {
2210 0xe28fc600, /* add ip, pc, #0xNN00000 */
2211 0xe28cca00, /* add ip, ip, #0xNN000 */
2212 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2213 };
2214
2215 /* When explicitly asked, we'll use this "long" entry format
2216 which can cope with arbitrary displacements. */
2217 static const bfd_vma elf32_arm_plt_entry_long [] =
2218 {
2219 0xe28fc200, /* add ip, pc, #0xN0000000 */
2220 0xe28cc600, /* add ip, ip, #0xNN00000 */
2221 0xe28cca00, /* add ip, ip, #0xNN000 */
2222 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2223 };
2224
2225 static bfd_boolean elf32_arm_use_long_plt_entry = FALSE;
2226
2227 #endif /* not FOUR_WORD_PLT */
2228
2229 /* The first entry in a procedure linkage table looks like this.
2230 It is set up so that any shared library function that is called before the
2231 relocation has been set up calls the dynamic linker first. */
2232 static const bfd_vma elf32_thumb2_plt0_entry [] =
2233 {
2234 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2235 an instruction maybe encoded to one or two array elements. */
2236 0xf8dfb500, /* push {lr} */
2237 0x44fee008, /* ldr.w lr, [pc, #8] */
2238 /* add lr, pc */
2239 0xff08f85e, /* ldr.w pc, [lr, #8]! */
2240 0x00000000, /* &GOT[0] - . */
2241 };
2242
2243 /* Subsequent entries in a procedure linkage table for thumb only target
2244 look like this. */
2245 static const bfd_vma elf32_thumb2_plt_entry [] =
2246 {
2247 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2248 an instruction maybe encoded to one or two array elements. */
2249 0x0c00f240, /* movw ip, #0xNNNN */
2250 0x0c00f2c0, /* movt ip, #0xNNNN */
2251 0xf8dc44fc, /* add ip, pc */
2252 0xbf00f000 /* ldr.w pc, [ip] */
2253 /* nop */
2254 };
2255
2256 /* The format of the first entry in the procedure linkage table
2257 for a VxWorks executable. */
2258 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2259 {
2260 0xe52dc008, /* str ip,[sp,#-8]! */
2261 0xe59fc000, /* ldr ip,[pc] */
2262 0xe59cf008, /* ldr pc,[ip,#8] */
2263 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2264 };
2265
2266 /* The format of subsequent entries in a VxWorks executable. */
2267 static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2268 {
2269 0xe59fc000, /* ldr ip,[pc] */
2270 0xe59cf000, /* ldr pc,[ip] */
2271 0x00000000, /* .long @got */
2272 0xe59fc000, /* ldr ip,[pc] */
2273 0xea000000, /* b _PLT */
2274 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2275 };
2276
2277 /* The format of entries in a VxWorks shared library. */
2278 static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2279 {
2280 0xe59fc000, /* ldr ip,[pc] */
2281 0xe79cf009, /* ldr pc,[ip,r9] */
2282 0x00000000, /* .long @got */
2283 0xe59fc000, /* ldr ip,[pc] */
2284 0xe599f008, /* ldr pc,[r9,#8] */
2285 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2286 };
2287
2288 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2289 #define PLT_THUMB_STUB_SIZE 4
2290 static const bfd_vma elf32_arm_plt_thumb_stub [] =
2291 {
2292 0x4778, /* bx pc */
2293 0x46c0 /* nop */
2294 };
2295
2296 /* The entries in a PLT when using a DLL-based target with multiple
2297 address spaces. */
2298 static const bfd_vma elf32_arm_symbian_plt_entry [] =
2299 {
2300 0xe51ff004, /* ldr pc, [pc, #-4] */
2301 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2302 };
2303
2304 /* The first entry in a procedure linkage table looks like
2305 this. It is set up so that any shared library function that is
2306 called before the relocation has been set up calls the dynamic
2307 linker first. */
2308 static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2309 {
2310 /* First bundle: */
2311 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2312 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2313 0xe08cc00f, /* add ip, ip, pc */
2314 0xe52dc008, /* str ip, [sp, #-8]! */
2315 /* Second bundle: */
2316 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2317 0xe59cc000, /* ldr ip, [ip] */
2318 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2319 0xe12fff1c, /* bx ip */
2320 /* Third bundle: */
2321 0xe320f000, /* nop */
2322 0xe320f000, /* nop */
2323 0xe320f000, /* nop */
2324 /* .Lplt_tail: */
2325 0xe50dc004, /* str ip, [sp, #-4] */
2326 /* Fourth bundle: */
2327 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2328 0xe59cc000, /* ldr ip, [ip] */
2329 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2330 0xe12fff1c, /* bx ip */
2331 };
2332 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2333
2334 /* Subsequent entries in a procedure linkage table look like this. */
2335 static const bfd_vma elf32_arm_nacl_plt_entry [] =
2336 {
2337 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2338 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2339 0xe08cc00f, /* add ip, ip, pc */
2340 0xea000000, /* b .Lplt_tail */
2341 };
2342
2343 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2344 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2345 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2346 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2347 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2348 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2349 #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4)
2350 #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4)
2351
2352 enum stub_insn_type
2353 {
2354 THUMB16_TYPE = 1,
2355 THUMB32_TYPE,
2356 ARM_TYPE,
2357 DATA_TYPE
2358 };
2359
2360 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2361 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2362 is inserted in arm_build_one_stub(). */
2363 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2364 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2365 #define THUMB32_MOVT(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVT_ABS, 0}
2366 #define THUMB32_MOVW(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVW_ABS_NC, 0}
2367 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2368 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2369 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2370 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2371
2372 typedef struct
2373 {
2374 bfd_vma data;
2375 enum stub_insn_type type;
2376 unsigned int r_type;
2377 int reloc_addend;
2378 } insn_sequence;
2379
2380 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2381 to reach the stub if necessary. */
2382 static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
2383 {
2384 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2385 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2386 };
2387
2388 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2389 available. */
2390 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
2391 {
2392 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2393 ARM_INSN (0xe12fff1c), /* bx ip */
2394 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2395 };
2396
2397 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2398 static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
2399 {
2400 THUMB16_INSN (0xb401), /* push {r0} */
2401 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2402 THUMB16_INSN (0x4684), /* mov ip, r0 */
2403 THUMB16_INSN (0xbc01), /* pop {r0} */
2404 THUMB16_INSN (0x4760), /* bx ip */
2405 THUMB16_INSN (0xbf00), /* nop */
2406 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2407 };
2408
2409 /* Thumb -> Thumb long branch stub in thumb2 encoding. Used on armv7. */
2410 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only[] =
2411 {
2412 THUMB32_INSN (0xf85ff000), /* ldr.w pc, [pc, #-0] */
2413 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(x) */
2414 };
2415
2416 /* Thumb -> Thumb long branch stub. Used for PureCode sections on Thumb2
2417 M-profile architectures. */
2418 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only_pure[] =
2419 {
2420 THUMB32_MOVW (0xf2400c00), /* mov.w ip, R_ARM_MOVW_ABS_NC */
2421 THUMB32_MOVT (0xf2c00c00), /* movt ip, R_ARM_MOVT_ABS << 16 */
2422 THUMB16_INSN (0x4760), /* bx ip */
2423 };
2424
2425 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2426 allowed. */
2427 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2428 {
2429 THUMB16_INSN (0x4778), /* bx pc */
2430 THUMB16_INSN (0x46c0), /* nop */
2431 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2432 ARM_INSN (0xe12fff1c), /* bx ip */
2433 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2434 };
2435
2436 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2437 available. */
2438 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
2439 {
2440 THUMB16_INSN (0x4778), /* bx pc */
2441 THUMB16_INSN (0x46c0), /* nop */
2442 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2443 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2444 };
2445
2446 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2447 one, when the destination is close enough. */
2448 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
2449 {
2450 THUMB16_INSN (0x4778), /* bx pc */
2451 THUMB16_INSN (0x46c0), /* nop */
2452 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2453 };
2454
2455 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2456 blx to reach the stub if necessary. */
2457 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
2458 {
2459 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2460 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2461 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2462 };
2463
2464 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2465 blx to reach the stub if necessary. We can not add into pc;
2466 it is not guaranteed to mode switch (different in ARMv6 and
2467 ARMv7). */
2468 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2469 {
2470 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2471 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2472 ARM_INSN (0xe12fff1c), /* bx ip */
2473 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2474 };
2475
2476 /* V4T ARM -> ARM long branch stub, PIC. */
2477 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2478 {
2479 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2480 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2481 ARM_INSN (0xe12fff1c), /* bx ip */
2482 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2483 };
2484
2485 /* V4T Thumb -> ARM long branch stub, PIC. */
2486 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2487 {
2488 THUMB16_INSN (0x4778), /* bx pc */
2489 THUMB16_INSN (0x46c0), /* nop */
2490 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2491 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2492 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2493 };
2494
2495 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2496 architectures. */
2497 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2498 {
2499 THUMB16_INSN (0xb401), /* push {r0} */
2500 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2501 THUMB16_INSN (0x46fc), /* mov ip, pc */
2502 THUMB16_INSN (0x4484), /* add ip, r0 */
2503 THUMB16_INSN (0xbc01), /* pop {r0} */
2504 THUMB16_INSN (0x4760), /* bx ip */
2505 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2506 };
2507
2508 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2509 allowed. */
2510 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2511 {
2512 THUMB16_INSN (0x4778), /* bx pc */
2513 THUMB16_INSN (0x46c0), /* nop */
2514 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2515 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2516 ARM_INSN (0xe12fff1c), /* bx ip */
2517 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2518 };
2519
2520 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2521 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2522 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2523 {
2524 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2525 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2526 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2527 };
2528
2529 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2530 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2531 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2532 {
2533 THUMB16_INSN (0x4778), /* bx pc */
2534 THUMB16_INSN (0x46c0), /* nop */
2535 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2536 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2537 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2538 };
2539
2540 /* NaCl ARM -> ARM long branch stub. */
2541 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] =
2542 {
2543 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2544 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2545 ARM_INSN (0xe12fff1c), /* bx ip */
2546 ARM_INSN (0xe320f000), /* nop */
2547 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2548 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2549 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2550 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2551 };
2552
2553 /* NaCl ARM -> ARM long branch stub, PIC. */
2554 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] =
2555 {
2556 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2557 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2558 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2559 ARM_INSN (0xe12fff1c), /* bx ip */
2560 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2561 DATA_WORD (0, R_ARM_REL32, 8), /* dcd R_ARM_REL32(X+8) */
2562 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2563 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2564 };
2565
2566 /* Stub used for transition to secure state (aka SG veneer). */
2567 static const insn_sequence elf32_arm_stub_cmse_branch_thumb_only[] =
2568 {
2569 THUMB32_INSN (0xe97fe97f), /* sg. */
2570 THUMB32_B_INSN (0xf000b800, -4), /* b.w original_branch_dest. */
2571 };
2572
2573
2574 /* Cortex-A8 erratum-workaround stubs. */
2575
2576 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2577 can't use a conditional branch to reach this stub). */
2578
2579 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2580 {
2581 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2582 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2583 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2584 };
2585
2586 /* Stub used for b.w and bl.w instructions. */
2587
2588 static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2589 {
2590 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2591 };
2592
2593 static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2594 {
2595 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2596 };
2597
2598 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2599 instruction (which switches to ARM mode) to point to this stub. Jump to the
2600 real destination using an ARM-mode branch. */
2601
2602 static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2603 {
2604 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2605 };
2606
2607 /* For each section group there can be a specially created linker section
2608 to hold the stubs for that group. The name of the stub section is based
2609 upon the name of another section within that group with the suffix below
2610 applied.
2611
2612 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2613 create what appeared to be a linker stub section when it actually
2614 contained user code/data. For example, consider this fragment:
2615
2616 const char * stubborn_problems[] = { "np" };
2617
2618 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2619 section called:
2620
2621 .data.rel.local.stubborn_problems
2622
2623 This then causes problems in arm32_arm_build_stubs() as it triggers:
2624
2625 // Ignore non-stub sections.
2626 if (!strstr (stub_sec->name, STUB_SUFFIX))
2627 continue;
2628
2629 And so the section would be ignored instead of being processed. Hence
2630 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2631 C identifier. */
2632 #define STUB_SUFFIX ".__stub"
2633
2634 /* One entry per long/short branch stub defined above. */
2635 #define DEF_STUBS \
2636 DEF_STUB(long_branch_any_any) \
2637 DEF_STUB(long_branch_v4t_arm_thumb) \
2638 DEF_STUB(long_branch_thumb_only) \
2639 DEF_STUB(long_branch_v4t_thumb_thumb) \
2640 DEF_STUB(long_branch_v4t_thumb_arm) \
2641 DEF_STUB(short_branch_v4t_thumb_arm) \
2642 DEF_STUB(long_branch_any_arm_pic) \
2643 DEF_STUB(long_branch_any_thumb_pic) \
2644 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2645 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2646 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2647 DEF_STUB(long_branch_thumb_only_pic) \
2648 DEF_STUB(long_branch_any_tls_pic) \
2649 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2650 DEF_STUB(long_branch_arm_nacl) \
2651 DEF_STUB(long_branch_arm_nacl_pic) \
2652 DEF_STUB(cmse_branch_thumb_only) \
2653 DEF_STUB(a8_veneer_b_cond) \
2654 DEF_STUB(a8_veneer_b) \
2655 DEF_STUB(a8_veneer_bl) \
2656 DEF_STUB(a8_veneer_blx) \
2657 DEF_STUB(long_branch_thumb2_only) \
2658 DEF_STUB(long_branch_thumb2_only_pure)
2659
2660 #define DEF_STUB(x) arm_stub_##x,
2661 enum elf32_arm_stub_type
2662 {
2663 arm_stub_none,
2664 DEF_STUBS
2665 max_stub_type
2666 };
2667 #undef DEF_STUB
2668
2669 /* Note the first a8_veneer type. */
2670 const unsigned arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond;
2671
2672 typedef struct
2673 {
2674 const insn_sequence* template_sequence;
2675 int template_size;
2676 } stub_def;
2677
2678 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2679 static const stub_def stub_definitions[] =
2680 {
2681 {NULL, 0},
2682 DEF_STUBS
2683 };
2684
2685 struct elf32_arm_stub_hash_entry
2686 {
2687 /* Base hash table entry structure. */
2688 struct bfd_hash_entry root;
2689
2690 /* The stub section. */
2691 asection *stub_sec;
2692
2693 /* Offset within stub_sec of the beginning of this stub. */
2694 bfd_vma stub_offset;
2695
2696 /* Given the symbol's value and its section we can determine its final
2697 value when building the stubs (so the stub knows where to jump). */
2698 bfd_vma target_value;
2699 asection *target_section;
2700
2701 /* Same as above but for the source of the branch to the stub. Used for
2702 Cortex-A8 erratum workaround to patch it to branch to the stub. As
2703 such, source section does not need to be recorded since Cortex-A8 erratum
2704 workaround stubs are only generated when both source and target are in the
2705 same section. */
2706 bfd_vma source_value;
2707
2708 /* The instruction which caused this stub to be generated (only valid for
2709 Cortex-A8 erratum workaround stubs at present). */
2710 unsigned long orig_insn;
2711
2712 /* The stub type. */
2713 enum elf32_arm_stub_type stub_type;
2714 /* Its encoding size in bytes. */
2715 int stub_size;
2716 /* Its template. */
2717 const insn_sequence *stub_template;
2718 /* The size of the template (number of entries). */
2719 int stub_template_size;
2720
2721 /* The symbol table entry, if any, that this was derived from. */
2722 struct elf32_arm_link_hash_entry *h;
2723
2724 /* Type of branch. */
2725 enum arm_st_branch_type branch_type;
2726
2727 /* Where this stub is being called from, or, in the case of combined
2728 stub sections, the first input section in the group. */
2729 asection *id_sec;
2730
2731 /* The name for the local symbol at the start of this stub. The
2732 stub name in the hash table has to be unique; this does not, so
2733 it can be friendlier. */
2734 char *output_name;
2735 };
2736
2737 /* Used to build a map of a section. This is required for mixed-endian
2738 code/data. */
2739
2740 typedef struct elf32_elf_section_map
2741 {
2742 bfd_vma vma;
2743 char type;
2744 }
2745 elf32_arm_section_map;
2746
2747 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2748
2749 typedef enum
2750 {
2751 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2752 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2753 VFP11_ERRATUM_ARM_VENEER,
2754 VFP11_ERRATUM_THUMB_VENEER
2755 }
2756 elf32_vfp11_erratum_type;
2757
2758 typedef struct elf32_vfp11_erratum_list
2759 {
2760 struct elf32_vfp11_erratum_list *next;
2761 bfd_vma vma;
2762 union
2763 {
2764 struct
2765 {
2766 struct elf32_vfp11_erratum_list *veneer;
2767 unsigned int vfp_insn;
2768 } b;
2769 struct
2770 {
2771 struct elf32_vfp11_erratum_list *branch;
2772 unsigned int id;
2773 } v;
2774 } u;
2775 elf32_vfp11_erratum_type type;
2776 }
2777 elf32_vfp11_erratum_list;
2778
2779 /* Information about a STM32L4XX erratum veneer, or a branch to such a
2780 veneer. */
2781 typedef enum
2782 {
2783 STM32L4XX_ERRATUM_BRANCH_TO_VENEER,
2784 STM32L4XX_ERRATUM_VENEER
2785 }
2786 elf32_stm32l4xx_erratum_type;
2787
2788 typedef struct elf32_stm32l4xx_erratum_list
2789 {
2790 struct elf32_stm32l4xx_erratum_list *next;
2791 bfd_vma vma;
2792 union
2793 {
2794 struct
2795 {
2796 struct elf32_stm32l4xx_erratum_list *veneer;
2797 unsigned int insn;
2798 } b;
2799 struct
2800 {
2801 struct elf32_stm32l4xx_erratum_list *branch;
2802 unsigned int id;
2803 } v;
2804 } u;
2805 elf32_stm32l4xx_erratum_type type;
2806 }
2807 elf32_stm32l4xx_erratum_list;
2808
2809 typedef enum
2810 {
2811 DELETE_EXIDX_ENTRY,
2812 INSERT_EXIDX_CANTUNWIND_AT_END
2813 }
2814 arm_unwind_edit_type;
2815
2816 /* A (sorted) list of edits to apply to an unwind table. */
2817 typedef struct arm_unwind_table_edit
2818 {
2819 arm_unwind_edit_type type;
2820 /* Note: we sometimes want to insert an unwind entry corresponding to a
2821 section different from the one we're currently writing out, so record the
2822 (text) section this edit relates to here. */
2823 asection *linked_section;
2824 unsigned int index;
2825 struct arm_unwind_table_edit *next;
2826 }
2827 arm_unwind_table_edit;
2828
2829 typedef struct _arm_elf_section_data
2830 {
2831 /* Information about mapping symbols. */
2832 struct bfd_elf_section_data elf;
2833 unsigned int mapcount;
2834 unsigned int mapsize;
2835 elf32_arm_section_map *map;
2836 /* Information about CPU errata. */
2837 unsigned int erratumcount;
2838 elf32_vfp11_erratum_list *erratumlist;
2839 unsigned int stm32l4xx_erratumcount;
2840 elf32_stm32l4xx_erratum_list *stm32l4xx_erratumlist;
2841 unsigned int additional_reloc_count;
2842 /* Information about unwind tables. */
2843 union
2844 {
2845 /* Unwind info attached to a text section. */
2846 struct
2847 {
2848 asection *arm_exidx_sec;
2849 } text;
2850
2851 /* Unwind info attached to an .ARM.exidx section. */
2852 struct
2853 {
2854 arm_unwind_table_edit *unwind_edit_list;
2855 arm_unwind_table_edit *unwind_edit_tail;
2856 } exidx;
2857 } u;
2858 }
2859 _arm_elf_section_data;
2860
2861 #define elf32_arm_section_data(sec) \
2862 ((_arm_elf_section_data *) elf_section_data (sec))
2863
2864 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2865 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2866 so may be created multiple times: we use an array of these entries whilst
2867 relaxing which we can refresh easily, then create stubs for each potentially
2868 erratum-triggering instruction once we've settled on a solution. */
2869
2870 struct a8_erratum_fix
2871 {
2872 bfd *input_bfd;
2873 asection *section;
2874 bfd_vma offset;
2875 bfd_vma target_offset;
2876 unsigned long orig_insn;
2877 char *stub_name;
2878 enum elf32_arm_stub_type stub_type;
2879 enum arm_st_branch_type branch_type;
2880 };
2881
2882 /* A table of relocs applied to branches which might trigger Cortex-A8
2883 erratum. */
2884
2885 struct a8_erratum_reloc
2886 {
2887 bfd_vma from;
2888 bfd_vma destination;
2889 struct elf32_arm_link_hash_entry *hash;
2890 const char *sym_name;
2891 unsigned int r_type;
2892 enum arm_st_branch_type branch_type;
2893 bfd_boolean non_a8_stub;
2894 };
2895
2896 /* The size of the thread control block. */
2897 #define TCB_SIZE 8
2898
2899 /* ARM-specific information about a PLT entry, over and above the usual
2900 gotplt_union. */
2901 struct arm_plt_info
2902 {
2903 /* We reference count Thumb references to a PLT entry separately,
2904 so that we can emit the Thumb trampoline only if needed. */
2905 bfd_signed_vma thumb_refcount;
2906
2907 /* Some references from Thumb code may be eliminated by BL->BLX
2908 conversion, so record them separately. */
2909 bfd_signed_vma maybe_thumb_refcount;
2910
2911 /* How many of the recorded PLT accesses were from non-call relocations.
2912 This information is useful when deciding whether anything takes the
2913 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2914 non-call references to the function should resolve directly to the
2915 real runtime target. */
2916 unsigned int noncall_refcount;
2917
2918 /* Since PLT entries have variable size if the Thumb prologue is
2919 used, we need to record the index into .got.plt instead of
2920 recomputing it from the PLT offset. */
2921 bfd_signed_vma got_offset;
2922 };
2923
2924 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
2925 struct arm_local_iplt_info
2926 {
2927 /* The information that is usually found in the generic ELF part of
2928 the hash table entry. */
2929 union gotplt_union root;
2930
2931 /* The information that is usually found in the ARM-specific part of
2932 the hash table entry. */
2933 struct arm_plt_info arm;
2934
2935 /* A list of all potential dynamic relocations against this symbol. */
2936 struct elf_dyn_relocs *dyn_relocs;
2937 };
2938
2939 struct elf_arm_obj_tdata
2940 {
2941 struct elf_obj_tdata root;
2942
2943 /* tls_type for each local got entry. */
2944 char *local_got_tls_type;
2945
2946 /* GOTPLT entries for TLS descriptors. */
2947 bfd_vma *local_tlsdesc_gotent;
2948
2949 /* Information for local symbols that need entries in .iplt. */
2950 struct arm_local_iplt_info **local_iplt;
2951
2952 /* Zero to warn when linking objects with incompatible enum sizes. */
2953 int no_enum_size_warning;
2954
2955 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2956 int no_wchar_size_warning;
2957 };
2958
2959 #define elf_arm_tdata(bfd) \
2960 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
2961
2962 #define elf32_arm_local_got_tls_type(bfd) \
2963 (elf_arm_tdata (bfd)->local_got_tls_type)
2964
2965 #define elf32_arm_local_tlsdesc_gotent(bfd) \
2966 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2967
2968 #define elf32_arm_local_iplt(bfd) \
2969 (elf_arm_tdata (bfd)->local_iplt)
2970
2971 #define is_arm_elf(bfd) \
2972 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2973 && elf_tdata (bfd) != NULL \
2974 && elf_object_id (bfd) == ARM_ELF_DATA)
2975
2976 static bfd_boolean
2977 elf32_arm_mkobject (bfd *abfd)
2978 {
2979 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
2980 ARM_ELF_DATA);
2981 }
2982
2983 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2984
2985 /* Arm ELF linker hash entry. */
2986 struct elf32_arm_link_hash_entry
2987 {
2988 struct elf_link_hash_entry root;
2989
2990 /* Track dynamic relocs copied for this symbol. */
2991 struct elf_dyn_relocs *dyn_relocs;
2992
2993 /* ARM-specific PLT information. */
2994 struct arm_plt_info plt;
2995
2996 #define GOT_UNKNOWN 0
2997 #define GOT_NORMAL 1
2998 #define GOT_TLS_GD 2
2999 #define GOT_TLS_IE 4
3000 #define GOT_TLS_GDESC 8
3001 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
3002 unsigned int tls_type : 8;
3003
3004 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
3005 unsigned int is_iplt : 1;
3006
3007 unsigned int unused : 23;
3008
3009 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
3010 starting at the end of the jump table. */
3011 bfd_vma tlsdesc_got;
3012
3013 /* The symbol marking the real symbol location for exported thumb
3014 symbols with Arm stubs. */
3015 struct elf_link_hash_entry *export_glue;
3016
3017 /* A pointer to the most recently used stub hash entry against this
3018 symbol. */
3019 struct elf32_arm_stub_hash_entry *stub_cache;
3020 };
3021
3022 /* Traverse an arm ELF linker hash table. */
3023 #define elf32_arm_link_hash_traverse(table, func, info) \
3024 (elf_link_hash_traverse \
3025 (&(table)->root, \
3026 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
3027 (info)))
3028
3029 /* Get the ARM elf linker hash table from a link_info structure. */
3030 #define elf32_arm_hash_table(info) \
3031 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
3032 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
3033
3034 #define arm_stub_hash_lookup(table, string, create, copy) \
3035 ((struct elf32_arm_stub_hash_entry *) \
3036 bfd_hash_lookup ((table), (string), (create), (copy)))
3037
3038 /* Array to keep track of which stub sections have been created, and
3039 information on stub grouping. */
3040 struct map_stub
3041 {
3042 /* This is the section to which stubs in the group will be
3043 attached. */
3044 asection *link_sec;
3045 /* The stub section. */
3046 asection *stub_sec;
3047 };
3048
3049 #define elf32_arm_compute_jump_table_size(htab) \
3050 ((htab)->next_tls_desc_index * 4)
3051
3052 /* ARM ELF linker hash table. */
3053 struct elf32_arm_link_hash_table
3054 {
3055 /* The main hash table. */
3056 struct elf_link_hash_table root;
3057
3058 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
3059 bfd_size_type thumb_glue_size;
3060
3061 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
3062 bfd_size_type arm_glue_size;
3063
3064 /* The size in bytes of section containing the ARMv4 BX veneers. */
3065 bfd_size_type bx_glue_size;
3066
3067 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
3068 veneer has been populated. */
3069 bfd_vma bx_glue_offset[15];
3070
3071 /* The size in bytes of the section containing glue for VFP11 erratum
3072 veneers. */
3073 bfd_size_type vfp11_erratum_glue_size;
3074
3075 /* The size in bytes of the section containing glue for STM32L4XX erratum
3076 veneers. */
3077 bfd_size_type stm32l4xx_erratum_glue_size;
3078
3079 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
3080 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
3081 elf32_arm_write_section(). */
3082 struct a8_erratum_fix *a8_erratum_fixes;
3083 unsigned int num_a8_erratum_fixes;
3084
3085 /* An arbitrary input BFD chosen to hold the glue sections. */
3086 bfd * bfd_of_glue_owner;
3087
3088 /* Nonzero to output a BE8 image. */
3089 int byteswap_code;
3090
3091 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
3092 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
3093 int target1_is_rel;
3094
3095 /* The relocation to use for R_ARM_TARGET2 relocations. */
3096 int target2_reloc;
3097
3098 /* 0 = Ignore R_ARM_V4BX.
3099 1 = Convert BX to MOV PC.
3100 2 = Generate v4 interworing stubs. */
3101 int fix_v4bx;
3102
3103 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
3104 int fix_cortex_a8;
3105
3106 /* Whether we should fix the ARM1176 BLX immediate issue. */
3107 int fix_arm1176;
3108
3109 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
3110 int use_blx;
3111
3112 /* What sort of code sequences we should look for which may trigger the
3113 VFP11 denorm erratum. */
3114 bfd_arm_vfp11_fix vfp11_fix;
3115
3116 /* Global counter for the number of fixes we have emitted. */
3117 int num_vfp11_fixes;
3118
3119 /* What sort of code sequences we should look for which may trigger the
3120 STM32L4XX erratum. */
3121 bfd_arm_stm32l4xx_fix stm32l4xx_fix;
3122
3123 /* Global counter for the number of fixes we have emitted. */
3124 int num_stm32l4xx_fixes;
3125
3126 /* Nonzero to force PIC branch veneers. */
3127 int pic_veneer;
3128
3129 /* The number of bytes in the initial entry in the PLT. */
3130 bfd_size_type plt_header_size;
3131
3132 /* The number of bytes in the subsequent PLT etries. */
3133 bfd_size_type plt_entry_size;
3134
3135 /* True if the target system is VxWorks. */
3136 int vxworks_p;
3137
3138 /* True if the target system is Symbian OS. */
3139 int symbian_p;
3140
3141 /* True if the target system is Native Client. */
3142 int nacl_p;
3143
3144 /* True if the target uses REL relocations. */
3145 int use_rel;
3146
3147 /* Nonzero if import library must be a secure gateway import library
3148 as per ARMv8-M Security Extensions. */
3149 int cmse_implib;
3150
3151 /* The import library whose symbols' address must remain stable in
3152 the import library generated. */
3153 bfd *in_implib_bfd;
3154
3155 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
3156 bfd_vma next_tls_desc_index;
3157
3158 /* How many R_ARM_TLS_DESC relocations were generated so far. */
3159 bfd_vma num_tls_desc;
3160
3161 /* Short-cuts to get to dynamic linker sections. */
3162 asection *sdynbss;
3163 asection *srelbss;
3164
3165 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
3166 asection *srelplt2;
3167
3168 /* The offset into splt of the PLT entry for the TLS descriptor
3169 resolver. Special values are 0, if not necessary (or not found
3170 to be necessary yet), and -1 if needed but not determined
3171 yet. */
3172 bfd_vma dt_tlsdesc_plt;
3173
3174 /* The offset into sgot of the GOT entry used by the PLT entry
3175 above. */
3176 bfd_vma dt_tlsdesc_got;
3177
3178 /* Offset in .plt section of tls_arm_trampoline. */
3179 bfd_vma tls_trampoline;
3180
3181 /* Data for R_ARM_TLS_LDM32 relocations. */
3182 union
3183 {
3184 bfd_signed_vma refcount;
3185 bfd_vma offset;
3186 } tls_ldm_got;
3187
3188 /* Small local sym cache. */
3189 struct sym_cache sym_cache;
3190
3191 /* For convenience in allocate_dynrelocs. */
3192 bfd * obfd;
3193
3194 /* The amount of space used by the reserved portion of the sgotplt
3195 section, plus whatever space is used by the jump slots. */
3196 bfd_vma sgotplt_jump_table_size;
3197
3198 /* The stub hash table. */
3199 struct bfd_hash_table stub_hash_table;
3200
3201 /* Linker stub bfd. */
3202 bfd *stub_bfd;
3203
3204 /* Linker call-backs. */
3205 asection * (*add_stub_section) (const char *, asection *, asection *,
3206 unsigned int);
3207 void (*layout_sections_again) (void);
3208
3209 /* Array to keep track of which stub sections have been created, and
3210 information on stub grouping. */
3211 struct map_stub *stub_group;
3212
3213 /* Input stub section holding secure gateway veneers. */
3214 asection *cmse_stub_sec;
3215
3216 /* Offset in cmse_stub_sec where new SG veneers (not in input import library)
3217 start to be allocated. */
3218 bfd_vma new_cmse_stub_offset;
3219
3220 /* Number of elements in stub_group. */
3221 unsigned int top_id;
3222
3223 /* Assorted information used by elf32_arm_size_stubs. */
3224 unsigned int bfd_count;
3225 unsigned int top_index;
3226 asection **input_list;
3227 };
3228
3229 static inline int
3230 ctz (unsigned int mask)
3231 {
3232 #if GCC_VERSION >= 3004
3233 return __builtin_ctz (mask);
3234 #else
3235 unsigned int i;
3236
3237 for (i = 0; i < 8 * sizeof (mask); i++)
3238 {
3239 if (mask & 0x1)
3240 break;
3241 mask = (mask >> 1);
3242 }
3243 return i;
3244 #endif
3245 }
3246
3247 static inline int
3248 popcount (unsigned int mask)
3249 {
3250 #if GCC_VERSION >= 3004
3251 return __builtin_popcount (mask);
3252 #else
3253 unsigned int i, sum = 0;
3254
3255 for (i = 0; i < 8 * sizeof (mask); i++)
3256 {
3257 if (mask & 0x1)
3258 sum++;
3259 mask = (mask >> 1);
3260 }
3261 return sum;
3262 #endif
3263 }
3264
3265 /* Create an entry in an ARM ELF linker hash table. */
3266
3267 static struct bfd_hash_entry *
3268 elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
3269 struct bfd_hash_table * table,
3270 const char * string)
3271 {
3272 struct elf32_arm_link_hash_entry * ret =
3273 (struct elf32_arm_link_hash_entry *) entry;
3274
3275 /* Allocate the structure if it has not already been allocated by a
3276 subclass. */
3277 if (ret == NULL)
3278 ret = (struct elf32_arm_link_hash_entry *)
3279 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
3280 if (ret == NULL)
3281 return (struct bfd_hash_entry *) ret;
3282
3283 /* Call the allocation method of the superclass. */
3284 ret = ((struct elf32_arm_link_hash_entry *)
3285 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3286 table, string));
3287 if (ret != NULL)
3288 {
3289 ret->dyn_relocs = NULL;
3290 ret->tls_type = GOT_UNKNOWN;
3291 ret->tlsdesc_got = (bfd_vma) -1;
3292 ret->plt.thumb_refcount = 0;
3293 ret->plt.maybe_thumb_refcount = 0;
3294 ret->plt.noncall_refcount = 0;
3295 ret->plt.got_offset = -1;
3296 ret->is_iplt = FALSE;
3297 ret->export_glue = NULL;
3298
3299 ret->stub_cache = NULL;
3300 }
3301
3302 return (struct bfd_hash_entry *) ret;
3303 }
3304
3305 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3306 symbols. */
3307
3308 static bfd_boolean
3309 elf32_arm_allocate_local_sym_info (bfd *abfd)
3310 {
3311 if (elf_local_got_refcounts (abfd) == NULL)
3312 {
3313 bfd_size_type num_syms;
3314 bfd_size_type size;
3315 char *data;
3316
3317 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3318 size = num_syms * (sizeof (bfd_signed_vma)
3319 + sizeof (struct arm_local_iplt_info *)
3320 + sizeof (bfd_vma)
3321 + sizeof (char));
3322 data = bfd_zalloc (abfd, size);
3323 if (data == NULL)
3324 return FALSE;
3325
3326 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3327 data += num_syms * sizeof (bfd_signed_vma);
3328
3329 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3330 data += num_syms * sizeof (struct arm_local_iplt_info *);
3331
3332 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3333 data += num_syms * sizeof (bfd_vma);
3334
3335 elf32_arm_local_got_tls_type (abfd) = data;
3336 }
3337 return TRUE;
3338 }
3339
3340 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3341 to input bfd ABFD. Create the information if it doesn't already exist.
3342 Return null if an allocation fails. */
3343
3344 static struct arm_local_iplt_info *
3345 elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3346 {
3347 struct arm_local_iplt_info **ptr;
3348
3349 if (!elf32_arm_allocate_local_sym_info (abfd))
3350 return NULL;
3351
3352 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3353 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3354 if (*ptr == NULL)
3355 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3356 return *ptr;
3357 }
3358
3359 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3360 in ABFD's symbol table. If the symbol is global, H points to its
3361 hash table entry, otherwise H is null.
3362
3363 Return true if the symbol does have PLT information. When returning
3364 true, point *ROOT_PLT at the target-independent reference count/offset
3365 union and *ARM_PLT at the ARM-specific information. */
3366
3367 static bfd_boolean
3368 elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_table *globals,
3369 struct elf32_arm_link_hash_entry *h,
3370 unsigned long r_symndx, union gotplt_union **root_plt,
3371 struct arm_plt_info **arm_plt)
3372 {
3373 struct arm_local_iplt_info *local_iplt;
3374
3375 if (globals->root.splt == NULL && globals->root.iplt == NULL)
3376 return FALSE;
3377
3378 if (h != NULL)
3379 {
3380 *root_plt = &h->root.plt;
3381 *arm_plt = &h->plt;
3382 return TRUE;
3383 }
3384
3385 if (elf32_arm_local_iplt (abfd) == NULL)
3386 return FALSE;
3387
3388 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3389 if (local_iplt == NULL)
3390 return FALSE;
3391
3392 *root_plt = &local_iplt->root;
3393 *arm_plt = &local_iplt->arm;
3394 return TRUE;
3395 }
3396
3397 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3398 before it. */
3399
3400 static bfd_boolean
3401 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3402 struct arm_plt_info *arm_plt)
3403 {
3404 struct elf32_arm_link_hash_table *htab;
3405
3406 htab = elf32_arm_hash_table (info);
3407 return (arm_plt->thumb_refcount != 0
3408 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0));
3409 }
3410
3411 /* Return a pointer to the head of the dynamic reloc list that should
3412 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3413 ABFD's symbol table. Return null if an error occurs. */
3414
3415 static struct elf_dyn_relocs **
3416 elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3417 Elf_Internal_Sym *isym)
3418 {
3419 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3420 {
3421 struct arm_local_iplt_info *local_iplt;
3422
3423 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3424 if (local_iplt == NULL)
3425 return NULL;
3426 return &local_iplt->dyn_relocs;
3427 }
3428 else
3429 {
3430 /* Track dynamic relocs needed for local syms too.
3431 We really need local syms available to do this
3432 easily. Oh well. */
3433 asection *s;
3434 void *vpp;
3435
3436 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3437 if (s == NULL)
3438 abort ();
3439
3440 vpp = &elf_section_data (s)->local_dynrel;
3441 return (struct elf_dyn_relocs **) vpp;
3442 }
3443 }
3444
3445 /* Initialize an entry in the stub hash table. */
3446
3447 static struct bfd_hash_entry *
3448 stub_hash_newfunc (struct bfd_hash_entry *entry,
3449 struct bfd_hash_table *table,
3450 const char *string)
3451 {
3452 /* Allocate the structure if it has not already been allocated by a
3453 subclass. */
3454 if (entry == NULL)
3455 {
3456 entry = (struct bfd_hash_entry *)
3457 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
3458 if (entry == NULL)
3459 return entry;
3460 }
3461
3462 /* Call the allocation method of the superclass. */
3463 entry = bfd_hash_newfunc (entry, table, string);
3464 if (entry != NULL)
3465 {
3466 struct elf32_arm_stub_hash_entry *eh;
3467
3468 /* Initialize the local fields. */
3469 eh = (struct elf32_arm_stub_hash_entry *) entry;
3470 eh->stub_sec = NULL;
3471 eh->stub_offset = (bfd_vma) -1;
3472 eh->source_value = 0;
3473 eh->target_value = 0;
3474 eh->target_section = NULL;
3475 eh->orig_insn = 0;
3476 eh->stub_type = arm_stub_none;
3477 eh->stub_size = 0;
3478 eh->stub_template = NULL;
3479 eh->stub_template_size = -1;
3480 eh->h = NULL;
3481 eh->id_sec = NULL;
3482 eh->output_name = NULL;
3483 }
3484
3485 return entry;
3486 }
3487
3488 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3489 shortcuts to them in our hash table. */
3490
3491 static bfd_boolean
3492 create_got_section (bfd *dynobj, struct bfd_link_info *info)
3493 {
3494 struct elf32_arm_link_hash_table *htab;
3495
3496 htab = elf32_arm_hash_table (info);
3497 if (htab == NULL)
3498 return FALSE;
3499
3500 /* BPABI objects never have a GOT, or associated sections. */
3501 if (htab->symbian_p)
3502 return TRUE;
3503
3504 if (! _bfd_elf_create_got_section (dynobj, info))
3505 return FALSE;
3506
3507 return TRUE;
3508 }
3509
3510 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3511
3512 static bfd_boolean
3513 create_ifunc_sections (struct bfd_link_info *info)
3514 {
3515 struct elf32_arm_link_hash_table *htab;
3516 const struct elf_backend_data *bed;
3517 bfd *dynobj;
3518 asection *s;
3519 flagword flags;
3520
3521 htab = elf32_arm_hash_table (info);
3522 dynobj = htab->root.dynobj;
3523 bed = get_elf_backend_data (dynobj);
3524 flags = bed->dynamic_sec_flags;
3525
3526 if (htab->root.iplt == NULL)
3527 {
3528 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3529 flags | SEC_READONLY | SEC_CODE);
3530 if (s == NULL
3531 || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment))
3532 return FALSE;
3533 htab->root.iplt = s;
3534 }
3535
3536 if (htab->root.irelplt == NULL)
3537 {
3538 s = bfd_make_section_anyway_with_flags (dynobj,
3539 RELOC_SECTION (htab, ".iplt"),
3540 flags | SEC_READONLY);
3541 if (s == NULL
3542 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3543 return FALSE;
3544 htab->root.irelplt = s;
3545 }
3546
3547 if (htab->root.igotplt == NULL)
3548 {
3549 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
3550 if (s == NULL
3551 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3552 return FALSE;
3553 htab->root.igotplt = s;
3554 }
3555 return TRUE;
3556 }
3557
3558 /* Determine if we're dealing with a Thumb only architecture. */
3559
3560 static bfd_boolean
3561 using_thumb_only (struct elf32_arm_link_hash_table *globals)
3562 {
3563 int arch;
3564 int profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3565 Tag_CPU_arch_profile);
3566
3567 if (profile)
3568 return profile == 'M';
3569
3570 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3571
3572 /* Force return logic to be reviewed for each new architecture. */
3573 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8
3574 || arch == TAG_CPU_ARCH_V8M_BASE
3575 || arch == TAG_CPU_ARCH_V8M_MAIN);
3576
3577 if (arch == TAG_CPU_ARCH_V6_M
3578 || arch == TAG_CPU_ARCH_V6S_M
3579 || arch == TAG_CPU_ARCH_V7E_M
3580 || arch == TAG_CPU_ARCH_V8M_BASE
3581 || arch == TAG_CPU_ARCH_V8M_MAIN)
3582 return TRUE;
3583
3584 return FALSE;
3585 }
3586
3587 /* Determine if we're dealing with a Thumb-2 object. */
3588
3589 static bfd_boolean
3590 using_thumb2 (struct elf32_arm_link_hash_table *globals)
3591 {
3592 int arch;
3593 int thumb_isa = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3594 Tag_THUMB_ISA_use);
3595
3596 if (thumb_isa)
3597 return thumb_isa == 2;
3598
3599 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3600
3601 /* Force return logic to be reviewed for each new architecture. */
3602 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8
3603 || arch == TAG_CPU_ARCH_V8M_BASE
3604 || arch == TAG_CPU_ARCH_V8M_MAIN);
3605
3606 return (arch == TAG_CPU_ARCH_V6T2
3607 || arch == TAG_CPU_ARCH_V7
3608 || arch == TAG_CPU_ARCH_V7E_M
3609 || arch == TAG_CPU_ARCH_V8
3610 || arch == TAG_CPU_ARCH_V8M_MAIN);
3611 }
3612
3613 /* Determine whether Thumb-2 BL instruction is available. */
3614
3615 static bfd_boolean
3616 using_thumb2_bl (struct elf32_arm_link_hash_table *globals)
3617 {
3618 int arch =
3619 bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3620
3621 /* Force return logic to be reviewed for each new architecture. */
3622 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8
3623 || arch == TAG_CPU_ARCH_V8M_BASE
3624 || arch == TAG_CPU_ARCH_V8M_MAIN);
3625
3626 /* Architecture was introduced after ARMv6T2 (eg. ARMv6-M). */
3627 return (arch == TAG_CPU_ARCH_V6T2
3628 || arch >= TAG_CPU_ARCH_V7);
3629 }
3630
3631 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3632 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3633 hash table. */
3634
3635 static bfd_boolean
3636 elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
3637 {
3638 struct elf32_arm_link_hash_table *htab;
3639
3640 htab = elf32_arm_hash_table (info);
3641 if (htab == NULL)
3642 return FALSE;
3643
3644 if (!htab->root.sgot && !create_got_section (dynobj, info))
3645 return FALSE;
3646
3647 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3648 return FALSE;
3649
3650 htab->sdynbss = bfd_get_linker_section (dynobj, ".dynbss");
3651 if (!bfd_link_pic (info))
3652 htab->srelbss = bfd_get_linker_section (dynobj,
3653 RELOC_SECTION (htab, ".bss"));
3654
3655 if (htab->vxworks_p)
3656 {
3657 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3658 return FALSE;
3659
3660 if (bfd_link_pic (info))
3661 {
3662 htab->plt_header_size = 0;
3663 htab->plt_entry_size
3664 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3665 }
3666 else
3667 {
3668 htab->plt_header_size
3669 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3670 htab->plt_entry_size
3671 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3672 }
3673
3674 if (elf_elfheader (dynobj))
3675 elf_elfheader (dynobj)->e_ident[EI_CLASS] = ELFCLASS32;
3676 }
3677 else
3678 {
3679 /* PR ld/16017
3680 Test for thumb only architectures. Note - we cannot just call
3681 using_thumb_only() as the attributes in the output bfd have not been
3682 initialised at this point, so instead we use the input bfd. */
3683 bfd * saved_obfd = htab->obfd;
3684
3685 htab->obfd = dynobj;
3686 if (using_thumb_only (htab))
3687 {
3688 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
3689 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
3690 }
3691 htab->obfd = saved_obfd;
3692 }
3693
3694 if (!htab->root.splt
3695 || !htab->root.srelplt
3696 || !htab->sdynbss
3697 || (!bfd_link_pic (info) && !htab->srelbss))
3698 abort ();
3699
3700 return TRUE;
3701 }
3702
3703 /* Copy the extra info we tack onto an elf_link_hash_entry. */
3704
3705 static void
3706 elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
3707 struct elf_link_hash_entry *dir,
3708 struct elf_link_hash_entry *ind)
3709 {
3710 struct elf32_arm_link_hash_entry *edir, *eind;
3711
3712 edir = (struct elf32_arm_link_hash_entry *) dir;
3713 eind = (struct elf32_arm_link_hash_entry *) ind;
3714
3715 if (eind->dyn_relocs != NULL)
3716 {
3717 if (edir->dyn_relocs != NULL)
3718 {
3719 struct elf_dyn_relocs **pp;
3720 struct elf_dyn_relocs *p;
3721
3722 /* Add reloc counts against the indirect sym to the direct sym
3723 list. Merge any entries against the same section. */
3724 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
3725 {
3726 struct elf_dyn_relocs *q;
3727
3728 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3729 if (q->sec == p->sec)
3730 {
3731 q->pc_count += p->pc_count;
3732 q->count += p->count;
3733 *pp = p->next;
3734 break;
3735 }
3736 if (q == NULL)
3737 pp = &p->next;
3738 }
3739 *pp = edir->dyn_relocs;
3740 }
3741
3742 edir->dyn_relocs = eind->dyn_relocs;
3743 eind->dyn_relocs = NULL;
3744 }
3745
3746 if (ind->root.type == bfd_link_hash_indirect)
3747 {
3748 /* Copy over PLT info. */
3749 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
3750 eind->plt.thumb_refcount = 0;
3751 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
3752 eind->plt.maybe_thumb_refcount = 0;
3753 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
3754 eind->plt.noncall_refcount = 0;
3755
3756 /* We should only allocate a function to .iplt once the final
3757 symbol information is known. */
3758 BFD_ASSERT (!eind->is_iplt);
3759
3760 if (dir->got.refcount <= 0)
3761 {
3762 edir->tls_type = eind->tls_type;
3763 eind->tls_type = GOT_UNKNOWN;
3764 }
3765 }
3766
3767 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3768 }
3769
3770 /* Destroy an ARM elf linker hash table. */
3771
3772 static void
3773 elf32_arm_link_hash_table_free (bfd *obfd)
3774 {
3775 struct elf32_arm_link_hash_table *ret
3776 = (struct elf32_arm_link_hash_table *) obfd->link.hash;
3777
3778 bfd_hash_table_free (&ret->stub_hash_table);
3779 _bfd_elf_link_hash_table_free (obfd);
3780 }
3781
3782 /* Create an ARM elf linker hash table. */
3783
3784 static struct bfd_link_hash_table *
3785 elf32_arm_link_hash_table_create (bfd *abfd)
3786 {
3787 struct elf32_arm_link_hash_table *ret;
3788 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
3789
3790 ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt);
3791 if (ret == NULL)
3792 return NULL;
3793
3794 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
3795 elf32_arm_link_hash_newfunc,
3796 sizeof (struct elf32_arm_link_hash_entry),
3797 ARM_ELF_DATA))
3798 {
3799 free (ret);
3800 return NULL;
3801 }
3802
3803 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3804 ret->stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE;
3805 #ifdef FOUR_WORD_PLT
3806 ret->plt_header_size = 16;
3807 ret->plt_entry_size = 16;
3808 #else
3809 ret->plt_header_size = 20;
3810 ret->plt_entry_size = elf32_arm_use_long_plt_entry ? 16 : 12;
3811 #endif
3812 ret->use_rel = 1;
3813 ret->obfd = abfd;
3814
3815 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
3816 sizeof (struct elf32_arm_stub_hash_entry)))
3817 {
3818 _bfd_elf_link_hash_table_free (abfd);
3819 return NULL;
3820 }
3821 ret->root.root.hash_table_free = elf32_arm_link_hash_table_free;
3822
3823 return &ret->root.root;
3824 }
3825
3826 /* Determine what kind of NOPs are available. */
3827
3828 static bfd_boolean
3829 arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3830 {
3831 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3832 Tag_CPU_arch);
3833
3834 /* Force return logic to be reviewed for each new architecture. */
3835 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8
3836 || arch == TAG_CPU_ARCH_V8M_BASE
3837 || arch == TAG_CPU_ARCH_V8M_MAIN);
3838
3839 return (arch == TAG_CPU_ARCH_V6T2
3840 || arch == TAG_CPU_ARCH_V6K
3841 || arch == TAG_CPU_ARCH_V7
3842 || arch == TAG_CPU_ARCH_V8);
3843 }
3844
3845 static bfd_boolean
3846 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3847 {
3848 switch (stub_type)
3849 {
3850 case arm_stub_long_branch_thumb_only:
3851 case arm_stub_long_branch_thumb2_only:
3852 case arm_stub_long_branch_thumb2_only_pure:
3853 case arm_stub_long_branch_v4t_thumb_arm:
3854 case arm_stub_short_branch_v4t_thumb_arm:
3855 case arm_stub_long_branch_v4t_thumb_arm_pic:
3856 case arm_stub_long_branch_v4t_thumb_tls_pic:
3857 case arm_stub_long_branch_thumb_only_pic:
3858 case arm_stub_cmse_branch_thumb_only:
3859 return TRUE;
3860 case arm_stub_none:
3861 BFD_FAIL ();
3862 return FALSE;
3863 break;
3864 default:
3865 return FALSE;
3866 }
3867 }
3868
3869 /* Determine the type of stub needed, if any, for a call. */
3870
3871 static enum elf32_arm_stub_type
3872 arm_type_of_stub (struct bfd_link_info *info,
3873 asection *input_sec,
3874 const Elf_Internal_Rela *rel,
3875 unsigned char st_type,
3876 enum arm_st_branch_type *actual_branch_type,
3877 struct elf32_arm_link_hash_entry *hash,
3878 bfd_vma destination,
3879 asection *sym_sec,
3880 bfd *input_bfd,
3881 const char *name)
3882 {
3883 bfd_vma location;
3884 bfd_signed_vma branch_offset;
3885 unsigned int r_type;
3886 struct elf32_arm_link_hash_table * globals;
3887 bfd_boolean thumb2, thumb2_bl, thumb_only;
3888 enum elf32_arm_stub_type stub_type = arm_stub_none;
3889 int use_plt = 0;
3890 enum arm_st_branch_type branch_type = *actual_branch_type;
3891 union gotplt_union *root_plt;
3892 struct arm_plt_info *arm_plt;
3893 int arch;
3894 int thumb2_movw;
3895
3896 if (branch_type == ST_BRANCH_LONG)
3897 return stub_type;
3898
3899 globals = elf32_arm_hash_table (info);
3900 if (globals == NULL)
3901 return stub_type;
3902
3903 thumb_only = using_thumb_only (globals);
3904 thumb2 = using_thumb2 (globals);
3905 thumb2_bl = using_thumb2_bl (globals);
3906
3907 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3908
3909 /* True for architectures that implement the thumb2 movw instruction. */
3910 thumb2_movw = thumb2 || (arch == TAG_CPU_ARCH_V8M_BASE);
3911
3912 /* Determine where the call point is. */
3913 location = (input_sec->output_offset
3914 + input_sec->output_section->vma
3915 + rel->r_offset);
3916
3917 r_type = ELF32_R_TYPE (rel->r_info);
3918
3919 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
3920 are considering a function call relocation. */
3921 if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3922 || r_type == R_ARM_THM_JUMP19)
3923 && branch_type == ST_BRANCH_TO_ARM)
3924 branch_type = ST_BRANCH_TO_THUMB;
3925
3926 /* For TLS call relocs, it is the caller's responsibility to provide
3927 the address of the appropriate trampoline. */
3928 if (r_type != R_ARM_TLS_CALL
3929 && r_type != R_ARM_THM_TLS_CALL
3930 && elf32_arm_get_plt_info (input_bfd, globals, hash,
3931 ELF32_R_SYM (rel->r_info), &root_plt,
3932 &arm_plt)
3933 && root_plt->offset != (bfd_vma) -1)
3934 {
3935 asection *splt;
3936
3937 if (hash == NULL || hash->is_iplt)
3938 splt = globals->root.iplt;
3939 else
3940 splt = globals->root.splt;
3941 if (splt != NULL)
3942 {
3943 use_plt = 1;
3944
3945 /* Note when dealing with PLT entries: the main PLT stub is in
3946 ARM mode, so if the branch is in Thumb mode, another
3947 Thumb->ARM stub will be inserted later just before the ARM
3948 PLT stub. We don't take this extra distance into account
3949 here, because if a long branch stub is needed, we'll add a
3950 Thumb->Arm one and branch directly to the ARM PLT entry
3951 because it avoids spreading offset corrections in several
3952 places. */
3953
3954 destination = (splt->output_section->vma
3955 + splt->output_offset
3956 + root_plt->offset);
3957 st_type = STT_FUNC;
3958 branch_type = ST_BRANCH_TO_ARM;
3959 }
3960 }
3961 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
3962 BFD_ASSERT (st_type != STT_GNU_IFUNC);
3963
3964 branch_offset = (bfd_signed_vma)(destination - location);
3965
3966 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3967 || r_type == R_ARM_THM_TLS_CALL || r_type == R_ARM_THM_JUMP19)
3968 {
3969 /* Handle cases where:
3970 - this call goes too far (different Thumb/Thumb2 max
3971 distance)
3972 - it's a Thumb->Arm call and blx is not available, or it's a
3973 Thumb->Arm branch (not bl). A stub is needed in this case,
3974 but only if this call is not through a PLT entry. Indeed,
3975 PLT stubs handle mode switching already.
3976 */
3977 if ((!thumb2_bl
3978 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3979 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3980 || (thumb2_bl
3981 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3982 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
3983 || (thumb2
3984 && (branch_offset > THM2_MAX_FWD_COND_BRANCH_OFFSET
3985 || (branch_offset < THM2_MAX_BWD_COND_BRANCH_OFFSET))
3986 && (r_type == R_ARM_THM_JUMP19))
3987 || (branch_type == ST_BRANCH_TO_ARM
3988 && (((r_type == R_ARM_THM_CALL
3989 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
3990 || (r_type == R_ARM_THM_JUMP24)
3991 || (r_type == R_ARM_THM_JUMP19))
3992 && !use_plt))
3993 {
3994 if (branch_type == ST_BRANCH_TO_THUMB)
3995 {
3996 /* Thumb to thumb. */
3997 if (!thumb_only)
3998 {
3999 if (input_sec->flags & SEC_ELF_PURECODE)
4000 (*_bfd_error_handler) (_("%B(%s): warning: long branch "
4001 " veneers used in section with "
4002 "SHF_ARM_PURECODE section "
4003 "attribute is only supported"
4004 " for M-profile targets that "
4005 "implement the movw "
4006 "instruction."));
4007
4008 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4009 /* PIC stubs. */
4010 ? ((globals->use_blx
4011 && (r_type == R_ARM_THM_CALL))
4012 /* V5T and above. Stub starts with ARM code, so
4013 we must be able to switch mode before
4014 reaching it, which is only possible for 'bl'
4015 (ie R_ARM_THM_CALL relocation). */
4016 ? arm_stub_long_branch_any_thumb_pic
4017 /* On V4T, use Thumb code only. */
4018 : arm_stub_long_branch_v4t_thumb_thumb_pic)
4019
4020 /* non-PIC stubs. */
4021 : ((globals->use_blx
4022 && (r_type == R_ARM_THM_CALL))
4023 /* V5T and above. */
4024 ? arm_stub_long_branch_any_any
4025 /* V4T. */
4026 : arm_stub_long_branch_v4t_thumb_thumb);
4027 }
4028 else
4029 {
4030 if (thumb2_movw && (input_sec->flags & SEC_ELF_PURECODE))
4031 stub_type = arm_stub_long_branch_thumb2_only_pure;
4032 else
4033 {
4034 if (input_sec->flags & SEC_ELF_PURECODE)
4035 (*_bfd_error_handler) (_("%B(%s): warning: long branch "
4036 " veneers used in section with "
4037 "SHF_ARM_PURECODE section "
4038 "attribute is only supported"
4039 " for M-profile targets that "
4040 "implement the movw "
4041 "instruction."));
4042
4043 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4044 /* PIC stub. */
4045 ? arm_stub_long_branch_thumb_only_pic
4046 /* non-PIC stub. */
4047 : (thumb2 ? arm_stub_long_branch_thumb2_only
4048 : arm_stub_long_branch_thumb_only);
4049 }
4050 }
4051 }
4052 else
4053 {
4054 if (input_sec->flags & SEC_ELF_PURECODE)
4055 (*_bfd_error_handler) (_("%B(%s): warning: long branch "
4056 " veneers used in section with "
4057 "SHF_ARM_PURECODE section "
4058 "attribute is only supported"
4059 " for M-profile targets that "
4060 "implement the movw "
4061 "instruction."));
4062
4063 /* Thumb to arm. */
4064 if (sym_sec != NULL
4065 && sym_sec->owner != NULL
4066 && !INTERWORK_FLAG (sym_sec->owner))
4067 {
4068 (*_bfd_error_handler)
4069 (_("%B(%s): warning: interworking not enabled.\n"
4070 " first occurrence: %B: Thumb call to ARM"),
4071 sym_sec->owner, input_bfd, name);
4072 }
4073
4074 stub_type =
4075 (bfd_link_pic (info) | globals->pic_veneer)
4076 /* PIC stubs. */
4077 ? (r_type == R_ARM_THM_TLS_CALL
4078 /* TLS PIC stubs. */
4079 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
4080 : arm_stub_long_branch_v4t_thumb_tls_pic)
4081 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4082 /* V5T PIC and above. */
4083 ? arm_stub_long_branch_any_arm_pic
4084 /* V4T PIC stub. */
4085 : arm_stub_long_branch_v4t_thumb_arm_pic))
4086
4087 /* non-PIC stubs. */
4088 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4089 /* V5T and above. */
4090 ? arm_stub_long_branch_any_any
4091 /* V4T. */
4092 : arm_stub_long_branch_v4t_thumb_arm);
4093
4094 /* Handle v4t short branches. */
4095 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
4096 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
4097 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
4098 stub_type = arm_stub_short_branch_v4t_thumb_arm;
4099 }
4100 }
4101 }
4102 else if (r_type == R_ARM_CALL
4103 || r_type == R_ARM_JUMP24
4104 || r_type == R_ARM_PLT32
4105 || r_type == R_ARM_TLS_CALL)
4106 {
4107 if (input_sec->flags & SEC_ELF_PURECODE)
4108 (*_bfd_error_handler) (_("%B(%s): warning: long branch "
4109 " veneers used in section with "
4110 "SHF_ARM_PURECODE section "
4111 "attribute is only supported"
4112 " for M-profile targets that "
4113 "implement the movw "
4114 "instruction."));
4115 if (branch_type == ST_BRANCH_TO_THUMB)
4116 {
4117 /* Arm to thumb. */
4118
4119 if (sym_sec != NULL
4120 && sym_sec->owner != NULL
4121 && !INTERWORK_FLAG (sym_sec->owner))
4122 {
4123 (*_bfd_error_handler)
4124 (_("%B(%s): warning: interworking not enabled.\n"
4125 " first occurrence: %B: ARM call to Thumb"),
4126 sym_sec->owner, input_bfd, name);
4127 }
4128
4129 /* We have an extra 2-bytes reach because of
4130 the mode change (bit 24 (H) of BLX encoding). */
4131 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
4132 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
4133 || (r_type == R_ARM_CALL && !globals->use_blx)
4134 || (r_type == R_ARM_JUMP24)
4135 || (r_type == R_ARM_PLT32))
4136 {
4137 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4138 /* PIC stubs. */
4139 ? ((globals->use_blx)
4140 /* V5T and above. */
4141 ? arm_stub_long_branch_any_thumb_pic
4142 /* V4T stub. */
4143 : arm_stub_long_branch_v4t_arm_thumb_pic)
4144
4145 /* non-PIC stubs. */
4146 : ((globals->use_blx)
4147 /* V5T and above. */
4148 ? arm_stub_long_branch_any_any
4149 /* V4T. */
4150 : arm_stub_long_branch_v4t_arm_thumb);
4151 }
4152 }
4153 else
4154 {
4155 /* Arm to arm. */
4156 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
4157 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
4158 {
4159 stub_type =
4160 (bfd_link_pic (info) | globals->pic_veneer)
4161 /* PIC stubs. */
4162 ? (r_type == R_ARM_TLS_CALL
4163 /* TLS PIC Stub. */
4164 ? arm_stub_long_branch_any_tls_pic
4165 : (globals->nacl_p
4166 ? arm_stub_long_branch_arm_nacl_pic
4167 : arm_stub_long_branch_any_arm_pic))
4168 /* non-PIC stubs. */
4169 : (globals->nacl_p
4170 ? arm_stub_long_branch_arm_nacl
4171 : arm_stub_long_branch_any_any);
4172 }
4173 }
4174 }
4175
4176 /* If a stub is needed, record the actual destination type. */
4177 if (stub_type != arm_stub_none)
4178 *actual_branch_type = branch_type;
4179
4180 return stub_type;
4181 }
4182
4183 /* Build a name for an entry in the stub hash table. */
4184
4185 static char *
4186 elf32_arm_stub_name (const asection *input_section,
4187 const asection *sym_sec,
4188 const struct elf32_arm_link_hash_entry *hash,
4189 const Elf_Internal_Rela *rel,
4190 enum elf32_arm_stub_type stub_type)
4191 {
4192 char *stub_name;
4193 bfd_size_type len;
4194
4195 if (hash)
4196 {
4197 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
4198 stub_name = (char *) bfd_malloc (len);
4199 if (stub_name != NULL)
4200 sprintf (stub_name, "%08x_%s+%x_%d",
4201 input_section->id & 0xffffffff,
4202 hash->root.root.root.string,
4203 (int) rel->r_addend & 0xffffffff,
4204 (int) stub_type);
4205 }
4206 else
4207 {
4208 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
4209 stub_name = (char *) bfd_malloc (len);
4210 if (stub_name != NULL)
4211 sprintf (stub_name, "%08x_%x:%x+%x_%d",
4212 input_section->id & 0xffffffff,
4213 sym_sec->id & 0xffffffff,
4214 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
4215 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
4216 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
4217 (int) rel->r_addend & 0xffffffff,
4218 (int) stub_type);
4219 }
4220
4221 return stub_name;
4222 }
4223
4224 /* Look up an entry in the stub hash. Stub entries are cached because
4225 creating the stub name takes a bit of time. */
4226
4227 static struct elf32_arm_stub_hash_entry *
4228 elf32_arm_get_stub_entry (const asection *input_section,
4229 const asection *sym_sec,
4230 struct elf_link_hash_entry *hash,
4231 const Elf_Internal_Rela *rel,
4232 struct elf32_arm_link_hash_table *htab,
4233 enum elf32_arm_stub_type stub_type)
4234 {
4235 struct elf32_arm_stub_hash_entry *stub_entry;
4236 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
4237 const asection *id_sec;
4238
4239 if ((input_section->flags & SEC_CODE) == 0)
4240 return NULL;
4241
4242 /* If this input section is part of a group of sections sharing one
4243 stub section, then use the id of the first section in the group.
4244 Stub names need to include a section id, as there may well be
4245 more than one stub used to reach say, printf, and we need to
4246 distinguish between them. */
4247 BFD_ASSERT (input_section->id <= htab->top_id);
4248 id_sec = htab->stub_group[input_section->id].link_sec;
4249
4250 if (h != NULL && h->stub_cache != NULL
4251 && h->stub_cache->h == h
4252 && h->stub_cache->id_sec == id_sec
4253 && h->stub_cache->stub_type == stub_type)
4254 {
4255 stub_entry = h->stub_cache;
4256 }
4257 else
4258 {
4259 char *stub_name;
4260
4261 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
4262 if (stub_name == NULL)
4263 return NULL;
4264
4265 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
4266 stub_name, FALSE, FALSE);
4267 if (h != NULL)
4268 h->stub_cache = stub_entry;
4269
4270 free (stub_name);
4271 }
4272
4273 return stub_entry;
4274 }
4275
4276 /* Whether veneers of type STUB_TYPE require to be in a dedicated output
4277 section. */
4278
4279 static bfd_boolean
4280 arm_dedicated_stub_output_section_required (enum elf32_arm_stub_type stub_type)
4281 {
4282 if (stub_type >= max_stub_type)
4283 abort (); /* Should be unreachable. */
4284
4285 switch (stub_type)
4286 {
4287 case arm_stub_cmse_branch_thumb_only:
4288 return TRUE;
4289
4290 default:
4291 return FALSE;
4292 }
4293
4294 abort (); /* Should be unreachable. */
4295 }
4296
4297 /* Required alignment (as a power of 2) for the dedicated section holding
4298 veneers of type STUB_TYPE, or 0 if veneers of this type are interspersed
4299 with input sections. */
4300
4301 static int
4302 arm_dedicated_stub_output_section_required_alignment
4303 (enum elf32_arm_stub_type stub_type)
4304 {
4305 if (stub_type >= max_stub_type)
4306 abort (); /* Should be unreachable. */
4307
4308 switch (stub_type)
4309 {
4310 /* Vectors of Secure Gateway veneers must be aligned on 32byte
4311 boundary. */
4312 case arm_stub_cmse_branch_thumb_only:
4313 return 5;
4314
4315 default:
4316 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4317 return 0;
4318 }
4319
4320 abort (); /* Should be unreachable. */
4321 }
4322
4323 /* Name of the dedicated output section to put veneers of type STUB_TYPE, or
4324 NULL if veneers of this type are interspersed with input sections. */
4325
4326 static const char *
4327 arm_dedicated_stub_output_section_name (enum elf32_arm_stub_type stub_type)
4328 {
4329 if (stub_type >= max_stub_type)
4330 abort (); /* Should be unreachable. */
4331
4332 switch (stub_type)
4333 {
4334 case arm_stub_cmse_branch_thumb_only:
4335 return ".gnu.sgstubs";
4336
4337 default:
4338 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4339 return NULL;
4340 }
4341
4342 abort (); /* Should be unreachable. */
4343 }
4344
4345 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4346 returns the address of the hash table field in HTAB holding a pointer to the
4347 corresponding input section. Otherwise, returns NULL. */
4348
4349 static asection **
4350 arm_dedicated_stub_input_section_ptr (struct elf32_arm_link_hash_table *htab,
4351 enum elf32_arm_stub_type stub_type)
4352 {
4353 if (stub_type >= max_stub_type)
4354 abort (); /* Should be unreachable. */
4355
4356 switch (stub_type)
4357 {
4358 case arm_stub_cmse_branch_thumb_only:
4359 return &htab->cmse_stub_sec;
4360
4361 default:
4362 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4363 return NULL;
4364 }
4365
4366 abort (); /* Should be unreachable. */
4367 }
4368
4369 /* Find or create a stub section to contain a stub of type STUB_TYPE. SECTION
4370 is the section that branch into veneer and can be NULL if stub should go in
4371 a dedicated output section. Returns a pointer to the stub section, and the
4372 section to which the stub section will be attached (in *LINK_SEC_P).
4373 LINK_SEC_P may be NULL. */
4374
4375 static asection *
4376 elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
4377 struct elf32_arm_link_hash_table *htab,
4378 enum elf32_arm_stub_type stub_type)
4379 {
4380 asection *link_sec, *out_sec, **stub_sec_p;
4381 const char *stub_sec_prefix;
4382 bfd_boolean dedicated_output_section =
4383 arm_dedicated_stub_output_section_required (stub_type);
4384 int align;
4385
4386 if (dedicated_output_section)
4387 {
4388 bfd *output_bfd = htab->obfd;
4389 const char *out_sec_name =
4390 arm_dedicated_stub_output_section_name (stub_type);
4391 link_sec = NULL;
4392 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
4393 stub_sec_prefix = out_sec_name;
4394 align = arm_dedicated_stub_output_section_required_alignment (stub_type);
4395 out_sec = bfd_get_section_by_name (output_bfd, out_sec_name);
4396 if (out_sec == NULL)
4397 {
4398 (*_bfd_error_handler) (_("No address assigned to the veneers output "
4399 "section %s"), out_sec_name);
4400 return NULL;
4401 }
4402 }
4403 else
4404 {
4405 BFD_ASSERT (section->id <= htab->top_id);
4406 link_sec = htab->stub_group[section->id].link_sec;
4407 BFD_ASSERT (link_sec != NULL);
4408 stub_sec_p = &htab->stub_group[section->id].stub_sec;
4409 if (*stub_sec_p == NULL)
4410 stub_sec_p = &htab->stub_group[link_sec->id].stub_sec;
4411 stub_sec_prefix = link_sec->name;
4412 out_sec = link_sec->output_section;
4413 align = htab->nacl_p ? 4 : 3;
4414 }
4415
4416 if (*stub_sec_p == NULL)
4417 {
4418 size_t namelen;
4419 bfd_size_type len;
4420 char *s_name;
4421
4422 namelen = strlen (stub_sec_prefix);
4423 len = namelen + sizeof (STUB_SUFFIX);
4424 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
4425 if (s_name == NULL)
4426 return NULL;
4427
4428 memcpy (s_name, stub_sec_prefix, namelen);
4429 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
4430 *stub_sec_p = (*htab->add_stub_section) (s_name, out_sec, link_sec,
4431 align);
4432 if (*stub_sec_p == NULL)
4433 return NULL;
4434
4435 out_sec->flags |= SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE
4436 | SEC_HAS_CONTENTS | SEC_RELOC | SEC_IN_MEMORY
4437 | SEC_KEEP;
4438 }
4439
4440 if (!dedicated_output_section)
4441 htab->stub_group[section->id].stub_sec = *stub_sec_p;
4442
4443 if (link_sec_p)
4444 *link_sec_p = link_sec;
4445
4446 return *stub_sec_p;
4447 }
4448
4449 /* Add a new stub entry to the stub hash. Not all fields of the new
4450 stub entry are initialised. */
4451
4452 static struct elf32_arm_stub_hash_entry *
4453 elf32_arm_add_stub (const char *stub_name, asection *section,
4454 struct elf32_arm_link_hash_table *htab,
4455 enum elf32_arm_stub_type stub_type)
4456 {
4457 asection *link_sec;
4458 asection *stub_sec;
4459 struct elf32_arm_stub_hash_entry *stub_entry;
4460
4461 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab,
4462 stub_type);
4463 if (stub_sec == NULL)
4464 return NULL;
4465
4466 /* Enter this entry into the linker stub hash table. */
4467 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4468 TRUE, FALSE);
4469 if (stub_entry == NULL)
4470 {
4471 if (section == NULL)
4472 section = stub_sec;
4473 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
4474 section->owner,
4475 stub_name);
4476 return NULL;
4477 }
4478
4479 stub_entry->stub_sec = stub_sec;
4480 stub_entry->stub_offset = (bfd_vma) -1;
4481 stub_entry->id_sec = link_sec;
4482
4483 return stub_entry;
4484 }
4485
4486 /* Store an Arm insn into an output section not processed by
4487 elf32_arm_write_section. */
4488
4489 static void
4490 put_arm_insn (struct elf32_arm_link_hash_table * htab,
4491 bfd * output_bfd, bfd_vma val, void * ptr)
4492 {
4493 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4494 bfd_putl32 (val, ptr);
4495 else
4496 bfd_putb32 (val, ptr);
4497 }
4498
4499 /* Store a 16-bit Thumb insn into an output section not processed by
4500 elf32_arm_write_section. */
4501
4502 static void
4503 put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4504 bfd * output_bfd, bfd_vma val, void * ptr)
4505 {
4506 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4507 bfd_putl16 (val, ptr);
4508 else
4509 bfd_putb16 (val, ptr);
4510 }
4511
4512 /* Store a Thumb2 insn into an output section not processed by
4513 elf32_arm_write_section. */
4514
4515 static void
4516 put_thumb2_insn (struct elf32_arm_link_hash_table * htab,
4517 bfd * output_bfd, bfd_vma val, bfd_byte * ptr)
4518 {
4519 /* T2 instructions are 16-bit streamed. */
4520 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4521 {
4522 bfd_putl16 ((val >> 16) & 0xffff, ptr);
4523 bfd_putl16 ((val & 0xffff), ptr + 2);
4524 }
4525 else
4526 {
4527 bfd_putb16 ((val >> 16) & 0xffff, ptr);
4528 bfd_putb16 ((val & 0xffff), ptr + 2);
4529 }
4530 }
4531
4532 /* If it's possible to change R_TYPE to a more efficient access
4533 model, return the new reloc type. */
4534
4535 static unsigned
4536 elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
4537 struct elf_link_hash_entry *h)
4538 {
4539 int is_local = (h == NULL);
4540
4541 if (bfd_link_pic (info)
4542 || (h && h->root.type == bfd_link_hash_undefweak))
4543 return r_type;
4544
4545 /* We do not support relaxations for Old TLS models. */
4546 switch (r_type)
4547 {
4548 case R_ARM_TLS_GOTDESC:
4549 case R_ARM_TLS_CALL:
4550 case R_ARM_THM_TLS_CALL:
4551 case R_ARM_TLS_DESCSEQ:
4552 case R_ARM_THM_TLS_DESCSEQ:
4553 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4554 }
4555
4556 return r_type;
4557 }
4558
4559 static bfd_reloc_status_type elf32_arm_final_link_relocate
4560 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4561 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
4562 const char *, unsigned char, enum arm_st_branch_type,
4563 struct elf_link_hash_entry *, bfd_boolean *, char **);
4564
4565 static unsigned int
4566 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4567 {
4568 switch (stub_type)
4569 {
4570 case arm_stub_a8_veneer_b_cond:
4571 case arm_stub_a8_veneer_b:
4572 case arm_stub_a8_veneer_bl:
4573 return 2;
4574
4575 case arm_stub_long_branch_any_any:
4576 case arm_stub_long_branch_v4t_arm_thumb:
4577 case arm_stub_long_branch_thumb_only:
4578 case arm_stub_long_branch_thumb2_only:
4579 case arm_stub_long_branch_thumb2_only_pure:
4580 case arm_stub_long_branch_v4t_thumb_thumb:
4581 case arm_stub_long_branch_v4t_thumb_arm:
4582 case arm_stub_short_branch_v4t_thumb_arm:
4583 case arm_stub_long_branch_any_arm_pic:
4584 case arm_stub_long_branch_any_thumb_pic:
4585 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4586 case arm_stub_long_branch_v4t_arm_thumb_pic:
4587 case arm_stub_long_branch_v4t_thumb_arm_pic:
4588 case arm_stub_long_branch_thumb_only_pic:
4589 case arm_stub_long_branch_any_tls_pic:
4590 case arm_stub_long_branch_v4t_thumb_tls_pic:
4591 case arm_stub_cmse_branch_thumb_only:
4592 case arm_stub_a8_veneer_blx:
4593 return 4;
4594
4595 case arm_stub_long_branch_arm_nacl:
4596 case arm_stub_long_branch_arm_nacl_pic:
4597 return 16;
4598
4599 default:
4600 abort (); /* Should be unreachable. */
4601 }
4602 }
4603
4604 /* Returns whether stubs of type STUB_TYPE take over the symbol they are
4605 veneering (TRUE) or have their own symbol (FALSE). */
4606
4607 static bfd_boolean
4608 arm_stub_sym_claimed (enum elf32_arm_stub_type stub_type)
4609 {
4610 if (stub_type >= max_stub_type)
4611 abort (); /* Should be unreachable. */
4612
4613 switch (stub_type)
4614 {
4615 case arm_stub_cmse_branch_thumb_only:
4616 return TRUE;
4617
4618 default:
4619 return FALSE;
4620 }
4621
4622 abort (); /* Should be unreachable. */
4623 }
4624
4625 /* Returns the padding needed for the dedicated section used stubs of type
4626 STUB_TYPE. */
4627
4628 static int
4629 arm_dedicated_stub_section_padding (enum elf32_arm_stub_type stub_type)
4630 {
4631 if (stub_type >= max_stub_type)
4632 abort (); /* Should be unreachable. */
4633
4634 switch (stub_type)
4635 {
4636 case arm_stub_cmse_branch_thumb_only:
4637 return 32;
4638
4639 default:
4640 return 0;
4641 }
4642
4643 abort (); /* Should be unreachable. */
4644 }
4645
4646 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4647 returns the address of the hash table field in HTAB holding the offset at
4648 which new veneers should be layed out in the stub section. */
4649
4650 static bfd_vma*
4651 arm_new_stubs_start_offset_ptr (struct elf32_arm_link_hash_table *htab,
4652 enum elf32_arm_stub_type stub_type)
4653 {
4654 switch (stub_type)
4655 {
4656 case arm_stub_cmse_branch_thumb_only:
4657 return &htab->new_cmse_stub_offset;
4658
4659 default:
4660 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4661 return NULL;
4662 }
4663 }
4664
4665 static bfd_boolean
4666 arm_build_one_stub (struct bfd_hash_entry *gen_entry,
4667 void * in_arg)
4668 {
4669 #define MAXRELOCS 3
4670 bfd_boolean removed_sg_veneer;
4671 struct elf32_arm_stub_hash_entry *stub_entry;
4672 struct elf32_arm_link_hash_table *globals;
4673 struct bfd_link_info *info;
4674 asection *stub_sec;
4675 bfd *stub_bfd;
4676 bfd_byte *loc;
4677 bfd_vma sym_value;
4678 int template_size;
4679 int size;
4680 const insn_sequence *template_sequence;
4681 int i;
4682 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
4683 int stub_reloc_offset[MAXRELOCS] = {0, 0};
4684 int nrelocs = 0;
4685 int just_allocated = 0;
4686
4687 /* Massage our args to the form they really have. */
4688 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4689 info = (struct bfd_link_info *) in_arg;
4690
4691 globals = elf32_arm_hash_table (info);
4692 if (globals == NULL)
4693 return FALSE;
4694
4695 stub_sec = stub_entry->stub_sec;
4696
4697 if ((globals->fix_cortex_a8 < 0)
4698 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
4699 /* We have to do less-strictly-aligned fixes last. */
4700 return TRUE;
4701
4702 /* Assign a slot at the end of section if none assigned yet. */
4703 if (stub_entry->stub_offset == (bfd_vma) -1)
4704 {
4705 stub_entry->stub_offset = stub_sec->size;
4706 just_allocated = 1;
4707 }
4708 loc = stub_sec->contents + stub_entry->stub_offset;
4709
4710 stub_bfd = stub_sec->owner;
4711
4712 /* This is the address of the stub destination. */
4713 sym_value = (stub_entry->target_value
4714 + stub_entry->target_section->output_offset
4715 + stub_entry->target_section->output_section->vma);
4716
4717 template_sequence = stub_entry->stub_template;
4718 template_size = stub_entry->stub_template_size;
4719
4720 size = 0;
4721 for (i = 0; i < template_size; i++)
4722 {
4723 switch (template_sequence[i].type)
4724 {
4725 case THUMB16_TYPE:
4726 {
4727 bfd_vma data = (bfd_vma) template_sequence[i].data;
4728 if (template_sequence[i].reloc_addend != 0)
4729 {
4730 /* We've borrowed the reloc_addend field to mean we should
4731 insert a condition code into this (Thumb-1 branch)
4732 instruction. See THUMB16_BCOND_INSN. */
4733 BFD_ASSERT ((data & 0xff00) == 0xd000);
4734 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
4735 }
4736 bfd_put_16 (stub_bfd, data, loc + size);
4737 size += 2;
4738 }
4739 break;
4740
4741 case THUMB32_TYPE:
4742 bfd_put_16 (stub_bfd,
4743 (template_sequence[i].data >> 16) & 0xffff,
4744 loc + size);
4745 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
4746 loc + size + 2);
4747 if (template_sequence[i].r_type != R_ARM_NONE)
4748 {
4749 stub_reloc_idx[nrelocs] = i;
4750 stub_reloc_offset[nrelocs++] = size;
4751 }
4752 size += 4;
4753 break;
4754
4755 case ARM_TYPE:
4756 bfd_put_32 (stub_bfd, template_sequence[i].data,
4757 loc + size);
4758 /* Handle cases where the target is encoded within the
4759 instruction. */
4760 if (template_sequence[i].r_type == R_ARM_JUMP24)
4761 {
4762 stub_reloc_idx[nrelocs] = i;
4763 stub_reloc_offset[nrelocs++] = size;
4764 }
4765 size += 4;
4766 break;
4767
4768 case DATA_TYPE:
4769 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
4770 stub_reloc_idx[nrelocs] = i;
4771 stub_reloc_offset[nrelocs++] = size;
4772 size += 4;
4773 break;
4774
4775 default:
4776 BFD_FAIL ();
4777 return FALSE;
4778 }
4779 }
4780
4781 if (just_allocated)
4782 stub_sec->size += size;
4783
4784 /* Stub size has already been computed in arm_size_one_stub. Check
4785 consistency. */
4786 BFD_ASSERT (size == stub_entry->stub_size);
4787
4788 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
4789 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
4790 sym_value |= 1;
4791
4792 /* Assume non empty slots have at least one and at most MAXRELOCS entries
4793 to relocate in each stub. */
4794 removed_sg_veneer =
4795 (size == 0 && stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
4796 BFD_ASSERT (removed_sg_veneer || (nrelocs != 0 && nrelocs <= MAXRELOCS));
4797
4798 for (i = 0; i < nrelocs; i++)
4799 {
4800 Elf_Internal_Rela rel;
4801 bfd_boolean unresolved_reloc;
4802 char *error_message;
4803 bfd_vma points_to =
4804 sym_value + template_sequence[stub_reloc_idx[i]].reloc_addend;
4805
4806 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4807 rel.r_info = ELF32_R_INFO (0,
4808 template_sequence[stub_reloc_idx[i]].r_type);
4809 rel.r_addend = 0;
4810
4811 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
4812 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
4813 template should refer back to the instruction after the original
4814 branch. We use target_section as Cortex-A8 erratum workaround stubs
4815 are only generated when both source and target are in the same
4816 section. */
4817 points_to = stub_entry->target_section->output_section->vma
4818 + stub_entry->target_section->output_offset
4819 + stub_entry->source_value;
4820
4821 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4822 (template_sequence[stub_reloc_idx[i]].r_type),
4823 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
4824 points_to, info, stub_entry->target_section, "", STT_FUNC,
4825 stub_entry->branch_type,
4826 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
4827 &error_message);
4828 }
4829
4830 return TRUE;
4831 #undef MAXRELOCS
4832 }
4833
4834 /* Calculate the template, template size and instruction size for a stub.
4835 Return value is the instruction size. */
4836
4837 static unsigned int
4838 find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
4839 const insn_sequence **stub_template,
4840 int *stub_template_size)
4841 {
4842 const insn_sequence *template_sequence = NULL;
4843 int template_size = 0, i;
4844 unsigned int size;
4845
4846 template_sequence = stub_definitions[stub_type].template_sequence;
4847 if (stub_template)
4848 *stub_template = template_sequence;
4849
4850 template_size = stub_definitions[stub_type].template_size;
4851 if (stub_template_size)
4852 *stub_template_size = template_size;
4853
4854 size = 0;
4855 for (i = 0; i < template_size; i++)
4856 {
4857 switch (template_sequence[i].type)
4858 {
4859 case THUMB16_TYPE:
4860 size += 2;
4861 break;
4862
4863 case ARM_TYPE:
4864 case THUMB32_TYPE:
4865 case DATA_TYPE:
4866 size += 4;
4867 break;
4868
4869 default:
4870 BFD_FAIL ();
4871 return 0;
4872 }
4873 }
4874
4875 return size;
4876 }
4877
4878 /* As above, but don't actually build the stub. Just bump offset so
4879 we know stub section sizes. */
4880
4881 static bfd_boolean
4882 arm_size_one_stub (struct bfd_hash_entry *gen_entry,
4883 void *in_arg ATTRIBUTE_UNUSED)
4884 {
4885 struct elf32_arm_stub_hash_entry *stub_entry;
4886 const insn_sequence *template_sequence;
4887 int template_size, size;
4888
4889 /* Massage our args to the form they really have. */
4890 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4891
4892 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
4893 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
4894
4895 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
4896 &template_size);
4897
4898 /* Initialized to -1. Null size indicates an empty slot full of zeros. */
4899 if (stub_entry->stub_template_size)
4900 {
4901 stub_entry->stub_size = size;
4902 stub_entry->stub_template = template_sequence;
4903 stub_entry->stub_template_size = template_size;
4904 }
4905
4906 /* Already accounted for. */
4907 if (stub_entry->stub_offset != (bfd_vma) -1)
4908 return TRUE;
4909
4910 size = (size + 7) & ~7;
4911 stub_entry->stub_sec->size += size;
4912
4913 return TRUE;
4914 }
4915
4916 /* External entry points for sizing and building linker stubs. */
4917
4918 /* Set up various things so that we can make a list of input sections
4919 for each output section included in the link. Returns -1 on error,
4920 0 when no stubs will be needed, and 1 on success. */
4921
4922 int
4923 elf32_arm_setup_section_lists (bfd *output_bfd,
4924 struct bfd_link_info *info)
4925 {
4926 bfd *input_bfd;
4927 unsigned int bfd_count;
4928 unsigned int top_id, top_index;
4929 asection *section;
4930 asection **input_list, **list;
4931 bfd_size_type amt;
4932 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4933
4934 if (htab == NULL)
4935 return 0;
4936 if (! is_elf_hash_table (htab))
4937 return 0;
4938
4939 /* Count the number of input BFDs and find the top input section id. */
4940 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
4941 input_bfd != NULL;
4942 input_bfd = input_bfd->link.next)
4943 {
4944 bfd_count += 1;
4945 for (section = input_bfd->sections;
4946 section != NULL;
4947 section = section->next)
4948 {
4949 if (top_id < section->id)
4950 top_id = section->id;
4951 }
4952 }
4953 htab->bfd_count = bfd_count;
4954
4955 amt = sizeof (struct map_stub) * (top_id + 1);
4956 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
4957 if (htab->stub_group == NULL)
4958 return -1;
4959 htab->top_id = top_id;
4960
4961 /* We can't use output_bfd->section_count here to find the top output
4962 section index as some sections may have been removed, and
4963 _bfd_strip_section_from_output doesn't renumber the indices. */
4964 for (section = output_bfd->sections, top_index = 0;
4965 section != NULL;
4966 section = section->next)
4967 {
4968 if (top_index < section->index)
4969 top_index = section->index;
4970 }
4971
4972 htab->top_index = top_index;
4973 amt = sizeof (asection *) * (top_index + 1);
4974 input_list = (asection **) bfd_malloc (amt);
4975 htab->input_list = input_list;
4976 if (input_list == NULL)
4977 return -1;
4978
4979 /* For sections we aren't interested in, mark their entries with a
4980 value we can check later. */
4981 list = input_list + top_index;
4982 do
4983 *list = bfd_abs_section_ptr;
4984 while (list-- != input_list);
4985
4986 for (section = output_bfd->sections;
4987 section != NULL;
4988 section = section->next)
4989 {
4990 if ((section->flags & SEC_CODE) != 0)
4991 input_list[section->index] = NULL;
4992 }
4993
4994 return 1;
4995 }
4996
4997 /* The linker repeatedly calls this function for each input section,
4998 in the order that input sections are linked into output sections.
4999 Build lists of input sections to determine groupings between which
5000 we may insert linker stubs. */
5001
5002 void
5003 elf32_arm_next_input_section (struct bfd_link_info *info,
5004 asection *isec)
5005 {
5006 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5007
5008 if (htab == NULL)
5009 return;
5010
5011 if (isec->output_section->index <= htab->top_index)
5012 {
5013 asection **list = htab->input_list + isec->output_section->index;
5014
5015 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
5016 {
5017 /* Steal the link_sec pointer for our list. */
5018 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
5019 /* This happens to make the list in reverse order,
5020 which we reverse later. */
5021 PREV_SEC (isec) = *list;
5022 *list = isec;
5023 }
5024 }
5025 }
5026
5027 /* See whether we can group stub sections together. Grouping stub
5028 sections may result in fewer stubs. More importantly, we need to
5029 put all .init* and .fini* stubs at the end of the .init or
5030 .fini output sections respectively, because glibc splits the
5031 _init and _fini functions into multiple parts. Putting a stub in
5032 the middle of a function is not a good idea. */
5033
5034 static void
5035 group_sections (struct elf32_arm_link_hash_table *htab,
5036 bfd_size_type stub_group_size,
5037 bfd_boolean stubs_always_after_branch)
5038 {
5039 asection **list = htab->input_list;
5040
5041 do
5042 {
5043 asection *tail = *list;
5044 asection *head;
5045
5046 if (tail == bfd_abs_section_ptr)
5047 continue;
5048
5049 /* Reverse the list: we must avoid placing stubs at the
5050 beginning of the section because the beginning of the text
5051 section may be required for an interrupt vector in bare metal
5052 code. */
5053 #define NEXT_SEC PREV_SEC
5054 head = NULL;
5055 while (tail != NULL)
5056 {
5057 /* Pop from tail. */
5058 asection *item = tail;
5059 tail = PREV_SEC (item);
5060
5061 /* Push on head. */
5062 NEXT_SEC (item) = head;
5063 head = item;
5064 }
5065
5066 while (head != NULL)
5067 {
5068 asection *curr;
5069 asection *next;
5070 bfd_vma stub_group_start = head->output_offset;
5071 bfd_vma end_of_next;
5072
5073 curr = head;
5074 while (NEXT_SEC (curr) != NULL)
5075 {
5076 next = NEXT_SEC (curr);
5077 end_of_next = next->output_offset + next->size;
5078 if (end_of_next - stub_group_start >= stub_group_size)
5079 /* End of NEXT is too far from start, so stop. */
5080 break;
5081 /* Add NEXT to the group. */
5082 curr = next;
5083 }
5084
5085 /* OK, the size from the start to the start of CURR is less
5086 than stub_group_size and thus can be handled by one stub
5087 section. (Or the head section is itself larger than
5088 stub_group_size, in which case we may be toast.)
5089 We should really be keeping track of the total size of
5090 stubs added here, as stubs contribute to the final output
5091 section size. */
5092 do
5093 {
5094 next = NEXT_SEC (head);
5095 /* Set up this stub group. */
5096 htab->stub_group[head->id].link_sec = curr;
5097 }
5098 while (head != curr && (head = next) != NULL);
5099
5100 /* But wait, there's more! Input sections up to stub_group_size
5101 bytes after the stub section can be handled by it too. */
5102 if (!stubs_always_after_branch)
5103 {
5104 stub_group_start = curr->output_offset + curr->size;
5105
5106 while (next != NULL)
5107 {
5108 end_of_next = next->output_offset + next->size;
5109 if (end_of_next - stub_group_start >= stub_group_size)
5110 /* End of NEXT is too far from stubs, so stop. */
5111 break;
5112 /* Add NEXT to the stub group. */
5113 head = next;
5114 next = NEXT_SEC (head);
5115 htab->stub_group[head->id].link_sec = curr;
5116 }
5117 }
5118 head = next;
5119 }
5120 }
5121 while (list++ != htab->input_list + htab->top_index);
5122
5123 free (htab->input_list);
5124 #undef PREV_SEC
5125 #undef NEXT_SEC
5126 }
5127
5128 /* Comparison function for sorting/searching relocations relating to Cortex-A8
5129 erratum fix. */
5130
5131 static int
5132 a8_reloc_compare (const void *a, const void *b)
5133 {
5134 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
5135 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
5136
5137 if (ra->from < rb->from)
5138 return -1;
5139 else if (ra->from > rb->from)
5140 return 1;
5141 else
5142 return 0;
5143 }
5144
5145 static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
5146 const char *, char **);
5147
5148 /* Helper function to scan code for sequences which might trigger the Cortex-A8
5149 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
5150 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
5151 otherwise. */
5152
5153 static bfd_boolean
5154 cortex_a8_erratum_scan (bfd *input_bfd,
5155 struct bfd_link_info *info,
5156 struct a8_erratum_fix **a8_fixes_p,
5157 unsigned int *num_a8_fixes_p,
5158 unsigned int *a8_fix_table_size_p,
5159 struct a8_erratum_reloc *a8_relocs,
5160 unsigned int num_a8_relocs,
5161 unsigned prev_num_a8_fixes,
5162 bfd_boolean *stub_changed_p)
5163 {
5164 asection *section;
5165 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5166 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
5167 unsigned int num_a8_fixes = *num_a8_fixes_p;
5168 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
5169
5170 if (htab == NULL)
5171 return FALSE;
5172
5173 for (section = input_bfd->sections;
5174 section != NULL;
5175 section = section->next)
5176 {
5177 bfd_byte *contents = NULL;
5178 struct _arm_elf_section_data *sec_data;
5179 unsigned int span;
5180 bfd_vma base_vma;
5181
5182 if (elf_section_type (section) != SHT_PROGBITS
5183 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
5184 || (section->flags & SEC_EXCLUDE) != 0
5185 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
5186 || (section->output_section == bfd_abs_section_ptr))
5187 continue;
5188
5189 base_vma = section->output_section->vma + section->output_offset;
5190
5191 if (elf_section_data (section)->this_hdr.contents != NULL)
5192 contents = elf_section_data (section)->this_hdr.contents;
5193 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
5194 return TRUE;
5195
5196 sec_data = elf32_arm_section_data (section);
5197
5198 for (span = 0; span < sec_data->mapcount; span++)
5199 {
5200 unsigned int span_start = sec_data->map[span].vma;
5201 unsigned int span_end = (span == sec_data->mapcount - 1)
5202 ? section->size : sec_data->map[span + 1].vma;
5203 unsigned int i;
5204 char span_type = sec_data->map[span].type;
5205 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
5206
5207 if (span_type != 't')
5208 continue;
5209
5210 /* Span is entirely within a single 4KB region: skip scanning. */
5211 if (((base_vma + span_start) & ~0xfff)
5212 == ((base_vma + span_end) & ~0xfff))
5213 continue;
5214
5215 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
5216
5217 * The opcode is BLX.W, BL.W, B.W, Bcc.W
5218 * The branch target is in the same 4KB region as the
5219 first half of the branch.
5220 * The instruction before the branch is a 32-bit
5221 length non-branch instruction. */
5222 for (i = span_start; i < span_end;)
5223 {
5224 unsigned int insn = bfd_getl16 (&contents[i]);
5225 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
5226 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
5227
5228 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
5229 insn_32bit = TRUE;
5230
5231 if (insn_32bit)
5232 {
5233 /* Load the rest of the insn (in manual-friendly order). */
5234 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
5235
5236 /* Encoding T4: B<c>.W. */
5237 is_b = (insn & 0xf800d000) == 0xf0009000;
5238 /* Encoding T1: BL<c>.W. */
5239 is_bl = (insn & 0xf800d000) == 0xf000d000;
5240 /* Encoding T2: BLX<c>.W. */
5241 is_blx = (insn & 0xf800d000) == 0xf000c000;
5242 /* Encoding T3: B<c>.W (not permitted in IT block). */
5243 is_bcc = (insn & 0xf800d000) == 0xf0008000
5244 && (insn & 0x07f00000) != 0x03800000;
5245 }
5246
5247 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
5248
5249 if (((base_vma + i) & 0xfff) == 0xffe
5250 && insn_32bit
5251 && is_32bit_branch
5252 && last_was_32bit
5253 && ! last_was_branch)
5254 {
5255 bfd_signed_vma offset = 0;
5256 bfd_boolean force_target_arm = FALSE;
5257 bfd_boolean force_target_thumb = FALSE;
5258 bfd_vma target;
5259 enum elf32_arm_stub_type stub_type = arm_stub_none;
5260 struct a8_erratum_reloc key, *found;
5261 bfd_boolean use_plt = FALSE;
5262
5263 key.from = base_vma + i;
5264 found = (struct a8_erratum_reloc *)
5265 bsearch (&key, a8_relocs, num_a8_relocs,
5266 sizeof (struct a8_erratum_reloc),
5267 &a8_reloc_compare);
5268
5269 if (found)
5270 {
5271 char *error_message = NULL;
5272 struct elf_link_hash_entry *entry;
5273
5274 /* We don't care about the error returned from this
5275 function, only if there is glue or not. */
5276 entry = find_thumb_glue (info, found->sym_name,
5277 &error_message);
5278
5279 if (entry)
5280 found->non_a8_stub = TRUE;
5281
5282 /* Keep a simpler condition, for the sake of clarity. */
5283 if (htab->root.splt != NULL && found->hash != NULL
5284 && found->hash->root.plt.offset != (bfd_vma) -1)
5285 use_plt = TRUE;
5286
5287 if (found->r_type == R_ARM_THM_CALL)
5288 {
5289 if (found->branch_type == ST_BRANCH_TO_ARM
5290 || use_plt)
5291 force_target_arm = TRUE;
5292 else
5293 force_target_thumb = TRUE;
5294 }
5295 }
5296
5297 /* Check if we have an offending branch instruction. */
5298
5299 if (found && found->non_a8_stub)
5300 /* We've already made a stub for this instruction, e.g.
5301 it's a long branch or a Thumb->ARM stub. Assume that
5302 stub will suffice to work around the A8 erratum (see
5303 setting of always_after_branch above). */
5304 ;
5305 else if (is_bcc)
5306 {
5307 offset = (insn & 0x7ff) << 1;
5308 offset |= (insn & 0x3f0000) >> 4;
5309 offset |= (insn & 0x2000) ? 0x40000 : 0;
5310 offset |= (insn & 0x800) ? 0x80000 : 0;
5311 offset |= (insn & 0x4000000) ? 0x100000 : 0;
5312 if (offset & 0x100000)
5313 offset |= ~ ((bfd_signed_vma) 0xfffff);
5314 stub_type = arm_stub_a8_veneer_b_cond;
5315 }
5316 else if (is_b || is_bl || is_blx)
5317 {
5318 int s = (insn & 0x4000000) != 0;
5319 int j1 = (insn & 0x2000) != 0;
5320 int j2 = (insn & 0x800) != 0;
5321 int i1 = !(j1 ^ s);
5322 int i2 = !(j2 ^ s);
5323
5324 offset = (insn & 0x7ff) << 1;
5325 offset |= (insn & 0x3ff0000) >> 4;
5326 offset |= i2 << 22;
5327 offset |= i1 << 23;
5328 offset |= s << 24;
5329 if (offset & 0x1000000)
5330 offset |= ~ ((bfd_signed_vma) 0xffffff);
5331
5332 if (is_blx)
5333 offset &= ~ ((bfd_signed_vma) 3);
5334
5335 stub_type = is_blx ? arm_stub_a8_veneer_blx :
5336 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
5337 }
5338
5339 if (stub_type != arm_stub_none)
5340 {
5341 bfd_vma pc_for_insn = base_vma + i + 4;
5342
5343 /* The original instruction is a BL, but the target is
5344 an ARM instruction. If we were not making a stub,
5345 the BL would have been converted to a BLX. Use the
5346 BLX stub instead in that case. */
5347 if (htab->use_blx && force_target_arm
5348 && stub_type == arm_stub_a8_veneer_bl)
5349 {
5350 stub_type = arm_stub_a8_veneer_blx;
5351 is_blx = TRUE;
5352 is_bl = FALSE;
5353 }
5354 /* Conversely, if the original instruction was
5355 BLX but the target is Thumb mode, use the BL
5356 stub. */
5357 else if (force_target_thumb
5358 && stub_type == arm_stub_a8_veneer_blx)
5359 {
5360 stub_type = arm_stub_a8_veneer_bl;
5361 is_blx = FALSE;
5362 is_bl = TRUE;
5363 }
5364
5365 if (is_blx)
5366 pc_for_insn &= ~ ((bfd_vma) 3);
5367
5368 /* If we found a relocation, use the proper destination,
5369 not the offset in the (unrelocated) instruction.
5370 Note this is always done if we switched the stub type
5371 above. */
5372 if (found)
5373 offset =
5374 (bfd_signed_vma) (found->destination - pc_for_insn);
5375
5376 /* If the stub will use a Thumb-mode branch to a
5377 PLT target, redirect it to the preceding Thumb
5378 entry point. */
5379 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
5380 offset -= PLT_THUMB_STUB_SIZE;
5381
5382 target = pc_for_insn + offset;
5383
5384 /* The BLX stub is ARM-mode code. Adjust the offset to
5385 take the different PC value (+8 instead of +4) into
5386 account. */
5387 if (stub_type == arm_stub_a8_veneer_blx)
5388 offset += 4;
5389
5390 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
5391 {
5392 char *stub_name = NULL;
5393
5394 if (num_a8_fixes == a8_fix_table_size)
5395 {
5396 a8_fix_table_size *= 2;
5397 a8_fixes = (struct a8_erratum_fix *)
5398 bfd_realloc (a8_fixes,
5399 sizeof (struct a8_erratum_fix)
5400 * a8_fix_table_size);
5401 }
5402
5403 if (num_a8_fixes < prev_num_a8_fixes)
5404 {
5405 /* If we're doing a subsequent scan,
5406 check if we've found the same fix as
5407 before, and try and reuse the stub
5408 name. */
5409 stub_name = a8_fixes[num_a8_fixes].stub_name;
5410 if ((a8_fixes[num_a8_fixes].section != section)
5411 || (a8_fixes[num_a8_fixes].offset != i))
5412 {
5413 free (stub_name);
5414 stub_name = NULL;
5415 *stub_changed_p = TRUE;
5416 }
5417 }
5418
5419 if (!stub_name)
5420 {
5421 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
5422 if (stub_name != NULL)
5423 sprintf (stub_name, "%x:%x", section->id, i);
5424 }
5425
5426 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
5427 a8_fixes[num_a8_fixes].section = section;
5428 a8_fixes[num_a8_fixes].offset = i;
5429 a8_fixes[num_a8_fixes].target_offset =
5430 target - base_vma;
5431 a8_fixes[num_a8_fixes].orig_insn = insn;
5432 a8_fixes[num_a8_fixes].stub_name = stub_name;
5433 a8_fixes[num_a8_fixes].stub_type = stub_type;
5434 a8_fixes[num_a8_fixes].branch_type =
5435 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
5436
5437 num_a8_fixes++;
5438 }
5439 }
5440 }
5441
5442 i += insn_32bit ? 4 : 2;
5443 last_was_32bit = insn_32bit;
5444 last_was_branch = is_32bit_branch;
5445 }
5446 }
5447
5448 if (elf_section_data (section)->this_hdr.contents == NULL)
5449 free (contents);
5450 }
5451
5452 *a8_fixes_p = a8_fixes;
5453 *num_a8_fixes_p = num_a8_fixes;
5454 *a8_fix_table_size_p = a8_fix_table_size;
5455
5456 return FALSE;
5457 }
5458
5459 /* Create or update a stub entry depending on whether the stub can already be
5460 found in HTAB. The stub is identified by:
5461 - its type STUB_TYPE
5462 - its source branch (note that several can share the same stub) whose
5463 section and relocation (if any) are given by SECTION and IRELA
5464 respectively
5465 - its target symbol whose input section, hash, name, value and branch type
5466 are given in SYM_SEC, HASH, SYM_NAME, SYM_VALUE and BRANCH_TYPE
5467 respectively
5468
5469 If found, the value of the stub's target symbol is updated from SYM_VALUE
5470 and *NEW_STUB is set to FALSE. Otherwise, *NEW_STUB is set to
5471 TRUE and the stub entry is initialized.
5472
5473 Returns the stub that was created or updated, or NULL if an error
5474 occurred. */
5475
5476 static struct elf32_arm_stub_hash_entry *
5477 elf32_arm_create_stub (struct elf32_arm_link_hash_table *htab,
5478 enum elf32_arm_stub_type stub_type, asection *section,
5479 Elf_Internal_Rela *irela, asection *sym_sec,
5480 struct elf32_arm_link_hash_entry *hash, char *sym_name,
5481 bfd_vma sym_value, enum arm_st_branch_type branch_type,
5482 bfd_boolean *new_stub)
5483 {
5484 const asection *id_sec;
5485 char *stub_name;
5486 struct elf32_arm_stub_hash_entry *stub_entry;
5487 unsigned int r_type;
5488 bfd_boolean sym_claimed = arm_stub_sym_claimed (stub_type);
5489
5490 BFD_ASSERT (stub_type != arm_stub_none);
5491 *new_stub = FALSE;
5492
5493 if (sym_claimed)
5494 stub_name = sym_name;
5495 else
5496 {
5497 BFD_ASSERT (irela);
5498 BFD_ASSERT (section);
5499 BFD_ASSERT (section->id <= htab->top_id);
5500
5501 /* Support for grouping stub sections. */
5502 id_sec = htab->stub_group[section->id].link_sec;
5503
5504 /* Get the name of this stub. */
5505 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash, irela,
5506 stub_type);
5507 if (!stub_name)
5508 return NULL;
5509 }
5510
5511 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, FALSE,
5512 FALSE);
5513 /* The proper stub has already been created, just update its value. */
5514 if (stub_entry != NULL)
5515 {
5516 if (!sym_claimed)
5517 free (stub_name);
5518 stub_entry->target_value = sym_value;
5519 return stub_entry;
5520 }
5521
5522 stub_entry = elf32_arm_add_stub (stub_name, section, htab, stub_type);
5523 if (stub_entry == NULL)
5524 {
5525 if (!sym_claimed)
5526 free (stub_name);
5527 return NULL;
5528 }
5529
5530 stub_entry->target_value = sym_value;
5531 stub_entry->target_section = sym_sec;
5532 stub_entry->stub_type = stub_type;
5533 stub_entry->h = hash;
5534 stub_entry->branch_type = branch_type;
5535
5536 if (sym_claimed)
5537 stub_entry->output_name = sym_name;
5538 else
5539 {
5540 if (sym_name == NULL)
5541 sym_name = "unnamed";
5542 stub_entry->output_name = (char *)
5543 bfd_alloc (htab->stub_bfd, sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5544 + strlen (sym_name));
5545 if (stub_entry->output_name == NULL)
5546 {
5547 free (stub_name);
5548 return NULL;
5549 }
5550
5551 /* For historical reasons, use the existing names for ARM-to-Thumb and
5552 Thumb-to-ARM stubs. */
5553 r_type = ELF32_R_TYPE (irela->r_info);
5554 if ((r_type == (unsigned int) R_ARM_THM_CALL
5555 || r_type == (unsigned int) R_ARM_THM_JUMP24
5556 || r_type == (unsigned int) R_ARM_THM_JUMP19)
5557 && branch_type == ST_BRANCH_TO_ARM)
5558 sprintf (stub_entry->output_name, THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5559 else if ((r_type == (unsigned int) R_ARM_CALL
5560 || r_type == (unsigned int) R_ARM_JUMP24)
5561 && branch_type == ST_BRANCH_TO_THUMB)
5562 sprintf (stub_entry->output_name, ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5563 else
5564 sprintf (stub_entry->output_name, STUB_ENTRY_NAME, sym_name);
5565 }
5566
5567 *new_stub = TRUE;
5568 return stub_entry;
5569 }
5570
5571 /* Scan symbols in INPUT_BFD to identify secure entry functions needing a
5572 gateway veneer to transition from non secure to secure state and create them
5573 accordingly.
5574
5575 "ARMv8-M Security Extensions: Requirements on Development Tools" document
5576 defines the conditions that govern Secure Gateway veneer creation for a
5577 given symbol <SYM> as follows:
5578 - it has function type
5579 - it has non local binding
5580 - a symbol named __acle_se_<SYM> (called special symbol) exists with the
5581 same type, binding and value as <SYM> (called normal symbol).
5582 An entry function can handle secure state transition itself in which case
5583 its special symbol would have a different value from the normal symbol.
5584
5585 OUT_ATTR gives the output attributes, SYM_HASHES the symbol index to hash
5586 entry mapping while HTAB gives the name to hash entry mapping.
5587 *CMSE_STUB_CREATED is increased by the number of secure gateway veneer
5588 created.
5589
5590 The return value gives whether a stub failed to be allocated. */
5591
5592 static bfd_boolean
5593 cmse_scan (bfd *input_bfd, struct elf32_arm_link_hash_table *htab,
5594 obj_attribute *out_attr, struct elf_link_hash_entry **sym_hashes,
5595 int *cmse_stub_created)
5596 {
5597 const struct elf_backend_data *bed;
5598 Elf_Internal_Shdr *symtab_hdr;
5599 unsigned i, j, sym_count, ext_start;
5600 Elf_Internal_Sym *cmse_sym, *local_syms;
5601 struct elf32_arm_link_hash_entry *hash, *cmse_hash = NULL;
5602 enum arm_st_branch_type branch_type;
5603 char *sym_name, *lsym_name;
5604 bfd_vma sym_value;
5605 asection *section;
5606 struct elf32_arm_stub_hash_entry *stub_entry;
5607 bfd_boolean is_v8m, new_stub, cmse_invalid, ret = TRUE;
5608
5609 bed = get_elf_backend_data (input_bfd);
5610 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5611 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
5612 ext_start = symtab_hdr->sh_info;
5613 is_v8m = (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
5614 && out_attr[Tag_CPU_arch_profile].i == 'M');
5615
5616 local_syms = (Elf_Internal_Sym *) symtab_hdr->contents;
5617 if (local_syms == NULL)
5618 local_syms = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5619 symtab_hdr->sh_info, 0, NULL, NULL,
5620 NULL);
5621 if (symtab_hdr->sh_info && local_syms == NULL)
5622 return FALSE;
5623
5624 /* Scan symbols. */
5625 for (i = 0; i < sym_count; i++)
5626 {
5627 cmse_invalid = FALSE;
5628
5629 if (i < ext_start)
5630 {
5631 cmse_sym = &local_syms[i];
5632 /* Not a special symbol. */
5633 if (!ARM_GET_SYM_CMSE_SPCL (cmse_sym->st_target_internal))
5634 continue;
5635 sym_name = bfd_elf_string_from_elf_section (input_bfd,
5636 symtab_hdr->sh_link,
5637 cmse_sym->st_name);
5638 /* Special symbol with local binding. */
5639 cmse_invalid = TRUE;
5640 }
5641 else
5642 {
5643 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
5644 sym_name = (char *) cmse_hash->root.root.root.string;
5645
5646 /* Not a special symbol. */
5647 if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
5648 continue;
5649
5650 /* Special symbol has incorrect binding or type. */
5651 if ((cmse_hash->root.root.type != bfd_link_hash_defined
5652 && cmse_hash->root.root.type != bfd_link_hash_defweak)
5653 || cmse_hash->root.type != STT_FUNC)
5654 cmse_invalid = TRUE;
5655 }
5656
5657 if (!is_v8m)
5658 {
5659 (*_bfd_error_handler) (_("%B: Special symbol `%s' only allowed for "
5660 "ARMv8-M architecture or later."),
5661 input_bfd, sym_name);
5662 is_v8m = TRUE; /* Avoid multiple warning. */
5663 ret = FALSE;
5664 }
5665
5666 if (cmse_invalid)
5667 {
5668 (*_bfd_error_handler) (_("%B: invalid special symbol `%s'."),
5669 input_bfd, sym_name);
5670 (*_bfd_error_handler) (_("It must be a global or weak function "
5671 "symbol."));
5672 ret = FALSE;
5673 if (i < ext_start)
5674 continue;
5675 }
5676
5677 sym_name += strlen (CMSE_PREFIX);
5678 hash = (struct elf32_arm_link_hash_entry *)
5679 elf_link_hash_lookup (&(htab)->root, sym_name, FALSE, FALSE, TRUE);
5680
5681 /* No associated normal symbol or it is neither global nor weak. */
5682 if (!hash
5683 || (hash->root.root.type != bfd_link_hash_defined
5684 && hash->root.root.type != bfd_link_hash_defweak)
5685 || hash->root.type != STT_FUNC)
5686 {
5687 /* Initialize here to avoid warning about use of possibly
5688 uninitialized variable. */
5689 j = 0;
5690
5691 if (!hash)
5692 {
5693 /* Searching for a normal symbol with local binding. */
5694 for (; j < ext_start; j++)
5695 {
5696 lsym_name =
5697 bfd_elf_string_from_elf_section (input_bfd,
5698 symtab_hdr->sh_link,
5699 local_syms[j].st_name);
5700 if (!strcmp (sym_name, lsym_name))
5701 break;
5702 }
5703 }
5704
5705 if (hash || j < ext_start)
5706 {
5707 (*_bfd_error_handler)
5708 (_("%B: invalid standard symbol `%s'."), input_bfd, sym_name);
5709 (*_bfd_error_handler)
5710 (_("It must be a global or weak function symbol."));
5711 }
5712 else
5713 (*_bfd_error_handler)
5714 (_("%B: absent standard symbol `%s'."), input_bfd, sym_name);
5715 ret = FALSE;
5716 if (!hash)
5717 continue;
5718 }
5719
5720 sym_value = hash->root.root.u.def.value;
5721 section = hash->root.root.u.def.section;
5722
5723 if (cmse_hash->root.root.u.def.section != section)
5724 {
5725 (*_bfd_error_handler)
5726 (_("%B: `%s' and its special symbol are in different sections."),
5727 input_bfd, sym_name);
5728 ret = FALSE;
5729 }
5730 if (cmse_hash->root.root.u.def.value != sym_value)
5731 continue; /* Ignore: could be an entry function starting with SG. */
5732
5733 /* If this section is a link-once section that will be discarded, then
5734 don't create any stubs. */
5735 if (section->output_section == NULL)
5736 {
5737 (*_bfd_error_handler)
5738 (_("%B: entry function `%s' not output."), input_bfd, sym_name);
5739 continue;
5740 }
5741
5742 if (hash->root.size == 0)
5743 {
5744 (*_bfd_error_handler)
5745 (_("%B: entry function `%s' is empty."), input_bfd, sym_name);
5746 ret = FALSE;
5747 }
5748
5749 if (!ret)
5750 continue;
5751 branch_type = ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
5752 stub_entry
5753 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
5754 NULL, NULL, section, hash, sym_name,
5755 sym_value, branch_type, &new_stub);
5756
5757 if (stub_entry == NULL)
5758 ret = FALSE;
5759 else
5760 {
5761 BFD_ASSERT (new_stub);
5762 (*cmse_stub_created)++;
5763 }
5764 }
5765
5766 if (!symtab_hdr->contents)
5767 free (local_syms);
5768 return ret;
5769 }
5770
5771 /* Return TRUE iff a symbol identified by its linker HASH entry is a secure
5772 code entry function, ie can be called from non secure code without using a
5773 veneer. */
5774
5775 static bfd_boolean
5776 cmse_entry_fct_p (struct elf32_arm_link_hash_entry *hash)
5777 {
5778 bfd_byte contents[4];
5779 uint32_t first_insn;
5780 asection *section;
5781 file_ptr offset;
5782 bfd *abfd;
5783
5784 /* Defined symbol of function type. */
5785 if (hash->root.root.type != bfd_link_hash_defined
5786 && hash->root.root.type != bfd_link_hash_defweak)
5787 return FALSE;
5788 if (hash->root.type != STT_FUNC)
5789 return FALSE;
5790
5791 /* Read first instruction. */
5792 section = hash->root.root.u.def.section;
5793 abfd = section->owner;
5794 offset = hash->root.root.u.def.value - section->vma;
5795 if (!bfd_get_section_contents (abfd, section, contents, offset,
5796 sizeof (contents)))
5797 return FALSE;
5798
5799 first_insn = bfd_get_32 (abfd, contents);
5800
5801 /* Starts by SG instruction. */
5802 return first_insn == 0xe97fe97f;
5803 }
5804
5805 /* Output the name (in symbol table) of the veneer GEN_ENTRY if it is a new
5806 secure gateway veneers (ie. the veneers was not in the input import library)
5807 and there is no output import library (GEN_INFO->out_implib_bfd is NULL. */
5808
5809 static bfd_boolean
5810 arm_list_new_cmse_stub (struct bfd_hash_entry *gen_entry, void *gen_info)
5811 {
5812 struct elf32_arm_stub_hash_entry *stub_entry;
5813 struct bfd_link_info *info;
5814
5815 /* Massage our args to the form they really have. */
5816 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
5817 info = (struct bfd_link_info *) gen_info;
5818
5819 if (info->out_implib_bfd)
5820 return TRUE;
5821
5822 if (stub_entry->stub_type != arm_stub_cmse_branch_thumb_only)
5823 return TRUE;
5824
5825 if (stub_entry->stub_offset == (bfd_vma) -1)
5826 (*_bfd_error_handler) (" %s", stub_entry->output_name);
5827
5828 return TRUE;
5829 }
5830
5831 /* Set offset of each secure gateway veneers so that its address remain
5832 identical to the one in the input import library referred by
5833 HTAB->in_implib_bfd. A warning is issued for veneers that disappeared
5834 (present in input import library but absent from the executable being
5835 linked) or if new veneers appeared and there is no output import library
5836 (INFO->out_implib_bfd is NULL and *CMSE_STUB_CREATED is bigger than the
5837 number of secure gateway veneers found in the input import library.
5838
5839 The function returns whether an error occurred. If no error occurred,
5840 *CMSE_STUB_CREATED gives the number of SG veneers created by both cmse_scan
5841 and this function and HTAB->new_cmse_stub_offset is set to the biggest
5842 veneer observed set for new veneers to be layed out after. */
5843
5844 static bfd_boolean
5845 set_cmse_veneer_addr_from_implib (struct bfd_link_info *info,
5846 struct elf32_arm_link_hash_table *htab,
5847 int *cmse_stub_created)
5848 {
5849 long symsize;
5850 char *sym_name;
5851 flagword flags;
5852 long i, symcount;
5853 bfd *in_implib_bfd;
5854 asection *stub_out_sec;
5855 bfd_boolean ret = TRUE;
5856 Elf_Internal_Sym *intsym;
5857 const char *out_sec_name;
5858 bfd_size_type cmse_stub_size;
5859 asymbol **sympp = NULL, *sym;
5860 struct elf32_arm_link_hash_entry *hash;
5861 const insn_sequence *cmse_stub_template;
5862 struct elf32_arm_stub_hash_entry *stub_entry;
5863 int cmse_stub_template_size, new_cmse_stubs_created = *cmse_stub_created;
5864 bfd_vma veneer_value, stub_offset, next_cmse_stub_offset;
5865 bfd_vma cmse_stub_array_start = (bfd_vma) -1, cmse_stub_sec_vma = 0;
5866
5867 /* No input secure gateway import library. */
5868 if (!htab->in_implib_bfd)
5869 return TRUE;
5870
5871 in_implib_bfd = htab->in_implib_bfd;
5872 if (!htab->cmse_implib)
5873 {
5874 (*_bfd_error_handler) (_("%B: --in-implib only supported for Secure "
5875 "Gateway import libraries."), in_implib_bfd);
5876 return FALSE;
5877 }
5878
5879 /* Get symbol table size. */
5880 symsize = bfd_get_symtab_upper_bound (in_implib_bfd);
5881 if (symsize < 0)
5882 return FALSE;
5883
5884 /* Read in the input secure gateway import library's symbol table. */
5885 sympp = (asymbol **) xmalloc (symsize);
5886 symcount = bfd_canonicalize_symtab (in_implib_bfd, sympp);
5887 if (symcount < 0)
5888 {
5889 ret = FALSE;
5890 goto free_sym_buf;
5891 }
5892
5893 htab->new_cmse_stub_offset = 0;
5894 cmse_stub_size =
5895 find_stub_size_and_template (arm_stub_cmse_branch_thumb_only,
5896 &cmse_stub_template,
5897 &cmse_stub_template_size);
5898 out_sec_name =
5899 arm_dedicated_stub_output_section_name (arm_stub_cmse_branch_thumb_only);
5900 stub_out_sec =
5901 bfd_get_section_by_name (htab->obfd, out_sec_name);
5902 if (stub_out_sec != NULL)
5903 cmse_stub_sec_vma = stub_out_sec->vma;
5904
5905 /* Set addresses of veneers mentionned in input secure gateway import
5906 library's symbol table. */
5907 for (i = 0; i < symcount; i++)
5908 {
5909 sym = sympp[i];
5910 flags = sym->flags;
5911 sym_name = (char *) bfd_asymbol_name (sym);
5912 intsym = &((elf_symbol_type *) sym)->internal_elf_sym;
5913
5914 if (sym->section != bfd_abs_section_ptr
5915 || !(flags & (BSF_GLOBAL | BSF_WEAK))
5916 || (flags & BSF_FUNCTION) != BSF_FUNCTION
5917 || (ARM_GET_SYM_BRANCH_TYPE (intsym->st_target_internal)
5918 != ST_BRANCH_TO_THUMB))
5919 {
5920 (*_bfd_error_handler) (_("%B: invalid import library entry: `%s'."),
5921 in_implib_bfd, sym_name);
5922 (*_bfd_error_handler) (_("Symbol should be absolute, global and "
5923 "refer to Thumb functions."));
5924 ret = FALSE;
5925 continue;
5926 }
5927
5928 veneer_value = bfd_asymbol_value (sym);
5929 stub_offset = veneer_value - cmse_stub_sec_vma;
5930 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, sym_name,
5931 FALSE, FALSE);
5932 hash = (struct elf32_arm_link_hash_entry *)
5933 elf_link_hash_lookup (&(htab)->root, sym_name, FALSE, FALSE, TRUE);
5934
5935 /* Stub entry should have been created by cmse_scan or the symbol be of
5936 a secure function callable from non secure code. */
5937 if (!stub_entry && !hash)
5938 {
5939 bfd_boolean new_stub;
5940
5941 (*_bfd_error_handler)
5942 (_("Entry function `%s' disappeared from secure code."), sym_name);
5943 hash = (struct elf32_arm_link_hash_entry *)
5944 elf_link_hash_lookup (&(htab)->root, sym_name, TRUE, TRUE, TRUE);
5945 stub_entry
5946 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
5947 NULL, NULL, bfd_abs_section_ptr, hash,
5948 sym_name, veneer_value,
5949 ST_BRANCH_TO_THUMB, &new_stub);
5950 if (stub_entry == NULL)
5951 ret = FALSE;
5952 else
5953 {
5954 BFD_ASSERT (new_stub);
5955 new_cmse_stubs_created++;
5956 (*cmse_stub_created)++;
5957 }
5958 stub_entry->stub_template_size = stub_entry->stub_size = 0;
5959 stub_entry->stub_offset = stub_offset;
5960 }
5961 /* Symbol found is not callable from non secure code. */
5962 else if (!stub_entry)
5963 {
5964 if (!cmse_entry_fct_p (hash))
5965 {
5966 (*_bfd_error_handler) (_("`%s' refers to a non entry function."),
5967 sym_name);
5968 ret = FALSE;
5969 }
5970 continue;
5971 }
5972 else
5973 {
5974 /* Only stubs for SG veneers should have been created. */
5975 BFD_ASSERT (stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
5976
5977 /* Check visibility hasn't changed. */
5978 if (!!(flags & BSF_GLOBAL)
5979 != (hash->root.root.type == bfd_link_hash_defined))
5980 (*_bfd_error_handler)
5981 (_("%B: visibility of symbol `%s' has changed."), in_implib_bfd,
5982 sym_name);
5983
5984 stub_entry->stub_offset = stub_offset;
5985 }
5986
5987 /* Size should match that of a SG veneer. */
5988 if (intsym->st_size != cmse_stub_size)
5989 {
5990 (*_bfd_error_handler) (_("%B: incorrect size for symbol `%s'."),
5991 in_implib_bfd, sym_name);
5992 ret = FALSE;
5993 }
5994
5995 /* Previous veneer address is before current SG veneer section. */
5996 if (veneer_value < cmse_stub_sec_vma)
5997 {
5998 /* Avoid offset underflow. */
5999 if (stub_entry)
6000 stub_entry->stub_offset = 0;
6001 stub_offset = 0;
6002 ret = FALSE;
6003 }
6004
6005 /* Complain if stub offset not a multiple of stub size. */
6006 if (stub_offset % cmse_stub_size)
6007 {
6008 (*_bfd_error_handler)
6009 (_("Offset of veneer for entry function `%s' not a multiple of "
6010 "its size."), sym_name);
6011 ret = FALSE;
6012 }
6013
6014 if (!ret)
6015 continue;
6016
6017 new_cmse_stubs_created--;
6018 if (veneer_value < cmse_stub_array_start)
6019 cmse_stub_array_start = veneer_value;
6020 next_cmse_stub_offset = stub_offset + ((cmse_stub_size + 7) & ~7);
6021 if (next_cmse_stub_offset > htab->new_cmse_stub_offset)
6022 htab->new_cmse_stub_offset = next_cmse_stub_offset;
6023 }
6024
6025 if (!info->out_implib_bfd && new_cmse_stubs_created != 0)
6026 {
6027 BFD_ASSERT (new_cmse_stubs_created > 0);
6028 (*_bfd_error_handler)
6029 (_("new entry function(s) introduced but no output import library "
6030 "specified:"));
6031 bfd_hash_traverse (&htab->stub_hash_table, arm_list_new_cmse_stub, info);
6032 }
6033
6034 if (cmse_stub_array_start != cmse_stub_sec_vma)
6035 {
6036 (*_bfd_error_handler)
6037 (_("Start address of `%s' is different from previous link."),
6038 out_sec_name);
6039 ret = FALSE;
6040 }
6041
6042 free_sym_buf:
6043 free (sympp);
6044 return ret;
6045 }
6046
6047 /* Determine and set the size of the stub section for a final link.
6048
6049 The basic idea here is to examine all the relocations looking for
6050 PC-relative calls to a target that is unreachable with a "bl"
6051 instruction. */
6052
6053 bfd_boolean
6054 elf32_arm_size_stubs (bfd *output_bfd,
6055 bfd *stub_bfd,
6056 struct bfd_link_info *info,
6057 bfd_signed_vma group_size,
6058 asection * (*add_stub_section) (const char *, asection *,
6059 asection *,
6060 unsigned int),
6061 void (*layout_sections_again) (void))
6062 {
6063 bfd_boolean ret = TRUE;
6064 obj_attribute *out_attr;
6065 int cmse_stub_created = 0;
6066 bfd_size_type stub_group_size;
6067 bfd_boolean m_profile, stubs_always_after_branch, first_veneer_scan = TRUE;
6068 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
6069 struct a8_erratum_fix *a8_fixes = NULL;
6070 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
6071 struct a8_erratum_reloc *a8_relocs = NULL;
6072 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
6073
6074 if (htab == NULL)
6075 return FALSE;
6076
6077 if (htab->fix_cortex_a8)
6078 {
6079 a8_fixes = (struct a8_erratum_fix *)
6080 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
6081 a8_relocs = (struct a8_erratum_reloc *)
6082 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
6083 }
6084
6085 /* Propagate mach to stub bfd, because it may not have been
6086 finalized when we created stub_bfd. */
6087 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
6088 bfd_get_mach (output_bfd));
6089
6090 /* Stash our params away. */
6091 htab->stub_bfd = stub_bfd;
6092 htab->add_stub_section = add_stub_section;
6093 htab->layout_sections_again = layout_sections_again;
6094 stubs_always_after_branch = group_size < 0;
6095
6096 out_attr = elf_known_obj_attributes_proc (output_bfd);
6097 m_profile = out_attr[Tag_CPU_arch_profile].i == 'M';
6098
6099 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
6100 as the first half of a 32-bit branch straddling two 4K pages. This is a
6101 crude way of enforcing that. */
6102 if (htab->fix_cortex_a8)
6103 stubs_always_after_branch = 1;
6104
6105 if (group_size < 0)
6106 stub_group_size = -group_size;
6107 else
6108 stub_group_size = group_size;
6109
6110 if (stub_group_size == 1)
6111 {
6112 /* Default values. */
6113 /* Thumb branch range is +-4MB has to be used as the default
6114 maximum size (a given section can contain both ARM and Thumb
6115 code, so the worst case has to be taken into account).
6116
6117 This value is 24K less than that, which allows for 2025
6118 12-byte stubs. If we exceed that, then we will fail to link.
6119 The user will have to relink with an explicit group size
6120 option. */
6121 stub_group_size = 4170000;
6122 }
6123
6124 group_sections (htab, stub_group_size, stubs_always_after_branch);
6125
6126 /* If we're applying the cortex A8 fix, we need to determine the
6127 program header size now, because we cannot change it later --
6128 that could alter section placements. Notice the A8 erratum fix
6129 ends up requiring the section addresses to remain unchanged
6130 modulo the page size. That's something we cannot represent
6131 inside BFD, and we don't want to force the section alignment to
6132 be the page size. */
6133 if (htab->fix_cortex_a8)
6134 (*htab->layout_sections_again) ();
6135
6136 while (1)
6137 {
6138 bfd *input_bfd;
6139 unsigned int bfd_indx;
6140 asection *stub_sec;
6141 enum elf32_arm_stub_type stub_type;
6142 bfd_boolean stub_changed = FALSE;
6143 unsigned prev_num_a8_fixes = num_a8_fixes;
6144
6145 num_a8_fixes = 0;
6146 for (input_bfd = info->input_bfds, bfd_indx = 0;
6147 input_bfd != NULL;
6148 input_bfd = input_bfd->link.next, bfd_indx++)
6149 {
6150 Elf_Internal_Shdr *symtab_hdr;
6151 asection *section;
6152 Elf_Internal_Sym *local_syms = NULL;
6153
6154 if (!is_arm_elf (input_bfd))
6155 continue;
6156
6157 num_a8_relocs = 0;
6158
6159 /* We'll need the symbol table in a second. */
6160 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
6161 if (symtab_hdr->sh_info == 0)
6162 continue;
6163
6164 /* Limit scan of symbols to object file whose profile is
6165 Microcontroller to not hinder performance in the general case. */
6166 if (m_profile && first_veneer_scan)
6167 {
6168 struct elf_link_hash_entry **sym_hashes;
6169
6170 sym_hashes = elf_sym_hashes (input_bfd);
6171 if (!cmse_scan (input_bfd, htab, out_attr, sym_hashes,
6172 &cmse_stub_created))
6173 goto error_ret_free_local;
6174
6175 if (cmse_stub_created != 0)
6176 stub_changed = TRUE;
6177 }
6178
6179 /* Walk over each section attached to the input bfd. */
6180 for (section = input_bfd->sections;
6181 section != NULL;
6182 section = section->next)
6183 {
6184 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
6185
6186 /* If there aren't any relocs, then there's nothing more
6187 to do. */
6188 if ((section->flags & SEC_RELOC) == 0
6189 || section->reloc_count == 0
6190 || (section->flags & SEC_CODE) == 0)
6191 continue;
6192
6193 /* If this section is a link-once section that will be
6194 discarded, then don't create any stubs. */
6195 if (section->output_section == NULL
6196 || section->output_section->owner != output_bfd)
6197 continue;
6198
6199 /* Get the relocs. */
6200 internal_relocs
6201 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
6202 NULL, info->keep_memory);
6203 if (internal_relocs == NULL)
6204 goto error_ret_free_local;
6205
6206 /* Now examine each relocation. */
6207 irela = internal_relocs;
6208 irelaend = irela + section->reloc_count;
6209 for (; irela < irelaend; irela++)
6210 {
6211 unsigned int r_type, r_indx;
6212 asection *sym_sec;
6213 bfd_vma sym_value;
6214 bfd_vma destination;
6215 struct elf32_arm_link_hash_entry *hash;
6216 const char *sym_name;
6217 unsigned char st_type;
6218 enum arm_st_branch_type branch_type;
6219 bfd_boolean created_stub = FALSE;
6220
6221 r_type = ELF32_R_TYPE (irela->r_info);
6222 r_indx = ELF32_R_SYM (irela->r_info);
6223
6224 if (r_type >= (unsigned int) R_ARM_max)
6225 {
6226 bfd_set_error (bfd_error_bad_value);
6227 error_ret_free_internal:
6228 if (elf_section_data (section)->relocs == NULL)
6229 free (internal_relocs);
6230 /* Fall through. */
6231 error_ret_free_local:
6232 if (local_syms != NULL
6233 && (symtab_hdr->contents
6234 != (unsigned char *) local_syms))
6235 free (local_syms);
6236 return FALSE;
6237 }
6238
6239 hash = NULL;
6240 if (r_indx >= symtab_hdr->sh_info)
6241 hash = elf32_arm_hash_entry
6242 (elf_sym_hashes (input_bfd)
6243 [r_indx - symtab_hdr->sh_info]);
6244
6245 /* Only look for stubs on branch instructions, or
6246 non-relaxed TLSCALL */
6247 if ((r_type != (unsigned int) R_ARM_CALL)
6248 && (r_type != (unsigned int) R_ARM_THM_CALL)
6249 && (r_type != (unsigned int) R_ARM_JUMP24)
6250 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
6251 && (r_type != (unsigned int) R_ARM_THM_XPC22)
6252 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
6253 && (r_type != (unsigned int) R_ARM_PLT32)
6254 && !((r_type == (unsigned int) R_ARM_TLS_CALL
6255 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6256 && r_type == elf32_arm_tls_transition
6257 (info, r_type, &hash->root)
6258 && ((hash ? hash->tls_type
6259 : (elf32_arm_local_got_tls_type
6260 (input_bfd)[r_indx]))
6261 & GOT_TLS_GDESC) != 0))
6262 continue;
6263
6264 /* Now determine the call target, its name, value,
6265 section. */
6266 sym_sec = NULL;
6267 sym_value = 0;
6268 destination = 0;
6269 sym_name = NULL;
6270
6271 if (r_type == (unsigned int) R_ARM_TLS_CALL
6272 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6273 {
6274 /* A non-relaxed TLS call. The target is the
6275 plt-resident trampoline and nothing to do
6276 with the symbol. */
6277 BFD_ASSERT (htab->tls_trampoline > 0);
6278 sym_sec = htab->root.splt;
6279 sym_value = htab->tls_trampoline;
6280 hash = 0;
6281 st_type = STT_FUNC;
6282 branch_type = ST_BRANCH_TO_ARM;
6283 }
6284 else if (!hash)
6285 {
6286 /* It's a local symbol. */
6287 Elf_Internal_Sym *sym;
6288
6289 if (local_syms == NULL)
6290 {
6291 local_syms
6292 = (Elf_Internal_Sym *) symtab_hdr->contents;
6293 if (local_syms == NULL)
6294 local_syms
6295 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
6296 symtab_hdr->sh_info, 0,
6297 NULL, NULL, NULL);
6298 if (local_syms == NULL)
6299 goto error_ret_free_internal;
6300 }
6301
6302 sym = local_syms + r_indx;
6303 if (sym->st_shndx == SHN_UNDEF)
6304 sym_sec = bfd_und_section_ptr;
6305 else if (sym->st_shndx == SHN_ABS)
6306 sym_sec = bfd_abs_section_ptr;
6307 else if (sym->st_shndx == SHN_COMMON)
6308 sym_sec = bfd_com_section_ptr;
6309 else
6310 sym_sec =
6311 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
6312
6313 if (!sym_sec)
6314 /* This is an undefined symbol. It can never
6315 be resolved. */
6316 continue;
6317
6318 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
6319 sym_value = sym->st_value;
6320 destination = (sym_value + irela->r_addend
6321 + sym_sec->output_offset
6322 + sym_sec->output_section->vma);
6323 st_type = ELF_ST_TYPE (sym->st_info);
6324 branch_type =
6325 ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
6326 sym_name
6327 = bfd_elf_string_from_elf_section (input_bfd,
6328 symtab_hdr->sh_link,
6329 sym->st_name);
6330 }
6331 else
6332 {
6333 /* It's an external symbol. */
6334 while (hash->root.root.type == bfd_link_hash_indirect
6335 || hash->root.root.type == bfd_link_hash_warning)
6336 hash = ((struct elf32_arm_link_hash_entry *)
6337 hash->root.root.u.i.link);
6338
6339 if (hash->root.root.type == bfd_link_hash_defined
6340 || hash->root.root.type == bfd_link_hash_defweak)
6341 {
6342 sym_sec = hash->root.root.u.def.section;
6343 sym_value = hash->root.root.u.def.value;
6344
6345 struct elf32_arm_link_hash_table *globals =
6346 elf32_arm_hash_table (info);
6347
6348 /* For a destination in a shared library,
6349 use the PLT stub as target address to
6350 decide whether a branch stub is
6351 needed. */
6352 if (globals != NULL
6353 && globals->root.splt != NULL
6354 && hash != NULL
6355 && hash->root.plt.offset != (bfd_vma) -1)
6356 {
6357 sym_sec = globals->root.splt;
6358 sym_value = hash->root.plt.offset;
6359 if (sym_sec->output_section != NULL)
6360 destination = (sym_value
6361 + sym_sec->output_offset
6362 + sym_sec->output_section->vma);
6363 }
6364 else if (sym_sec->output_section != NULL)
6365 destination = (sym_value + irela->r_addend
6366 + sym_sec->output_offset
6367 + sym_sec->output_section->vma);
6368 }
6369 else if ((hash->root.root.type == bfd_link_hash_undefined)
6370 || (hash->root.root.type == bfd_link_hash_undefweak))
6371 {
6372 /* For a shared library, use the PLT stub as
6373 target address to decide whether a long
6374 branch stub is needed.
6375 For absolute code, they cannot be handled. */
6376 struct elf32_arm_link_hash_table *globals =
6377 elf32_arm_hash_table (info);
6378
6379 if (globals != NULL
6380 && globals->root.splt != NULL
6381 && hash != NULL
6382 && hash->root.plt.offset != (bfd_vma) -1)
6383 {
6384 sym_sec = globals->root.splt;
6385 sym_value = hash->root.plt.offset;
6386 if (sym_sec->output_section != NULL)
6387 destination = (sym_value
6388 + sym_sec->output_offset
6389 + sym_sec->output_section->vma);
6390 }
6391 else
6392 continue;
6393 }
6394 else
6395 {
6396 bfd_set_error (bfd_error_bad_value);
6397 goto error_ret_free_internal;
6398 }
6399 st_type = hash->root.type;
6400 branch_type =
6401 ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
6402 sym_name = hash->root.root.root.string;
6403 }
6404
6405 do
6406 {
6407 bfd_boolean new_stub;
6408 struct elf32_arm_stub_hash_entry *stub_entry;
6409
6410 /* Determine what (if any) linker stub is needed. */
6411 stub_type = arm_type_of_stub (info, section, irela,
6412 st_type, &branch_type,
6413 hash, destination, sym_sec,
6414 input_bfd, sym_name);
6415 if (stub_type == arm_stub_none)
6416 break;
6417
6418 /* We've either created a stub for this reloc already,
6419 or we are about to. */
6420 stub_entry =
6421 elf32_arm_create_stub (htab, stub_type, section, irela,
6422 sym_sec, hash,
6423 (char *) sym_name, sym_value,
6424 branch_type, &new_stub);
6425
6426 created_stub = stub_entry != NULL;
6427 if (!created_stub)
6428 goto error_ret_free_internal;
6429 else if (!new_stub)
6430 break;
6431 else
6432 stub_changed = TRUE;
6433 }
6434 while (0);
6435
6436 /* Look for relocations which might trigger Cortex-A8
6437 erratum. */
6438 if (htab->fix_cortex_a8
6439 && (r_type == (unsigned int) R_ARM_THM_JUMP24
6440 || r_type == (unsigned int) R_ARM_THM_JUMP19
6441 || r_type == (unsigned int) R_ARM_THM_CALL
6442 || r_type == (unsigned int) R_ARM_THM_XPC22))
6443 {
6444 bfd_vma from = section->output_section->vma
6445 + section->output_offset
6446 + irela->r_offset;
6447
6448 if ((from & 0xfff) == 0xffe)
6449 {
6450 /* Found a candidate. Note we haven't checked the
6451 destination is within 4K here: if we do so (and
6452 don't create an entry in a8_relocs) we can't tell
6453 that a branch should have been relocated when
6454 scanning later. */
6455 if (num_a8_relocs == a8_reloc_table_size)
6456 {
6457 a8_reloc_table_size *= 2;
6458 a8_relocs = (struct a8_erratum_reloc *)
6459 bfd_realloc (a8_relocs,
6460 sizeof (struct a8_erratum_reloc)
6461 * a8_reloc_table_size);
6462 }
6463
6464 a8_relocs[num_a8_relocs].from = from;
6465 a8_relocs[num_a8_relocs].destination = destination;
6466 a8_relocs[num_a8_relocs].r_type = r_type;
6467 a8_relocs[num_a8_relocs].branch_type = branch_type;
6468 a8_relocs[num_a8_relocs].sym_name = sym_name;
6469 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
6470 a8_relocs[num_a8_relocs].hash = hash;
6471
6472 num_a8_relocs++;
6473 }
6474 }
6475 }
6476
6477 /* We're done with the internal relocs, free them. */
6478 if (elf_section_data (section)->relocs == NULL)
6479 free (internal_relocs);
6480 }
6481
6482 if (htab->fix_cortex_a8)
6483 {
6484 /* Sort relocs which might apply to Cortex-A8 erratum. */
6485 qsort (a8_relocs, num_a8_relocs,
6486 sizeof (struct a8_erratum_reloc),
6487 &a8_reloc_compare);
6488
6489 /* Scan for branches which might trigger Cortex-A8 erratum. */
6490 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
6491 &num_a8_fixes, &a8_fix_table_size,
6492 a8_relocs, num_a8_relocs,
6493 prev_num_a8_fixes, &stub_changed)
6494 != 0)
6495 goto error_ret_free_local;
6496 }
6497
6498 if (local_syms != NULL
6499 && symtab_hdr->contents != (unsigned char *) local_syms)
6500 {
6501 if (!info->keep_memory)
6502 free (local_syms);
6503 else
6504 symtab_hdr->contents = (unsigned char *) local_syms;
6505 }
6506 }
6507
6508 if (first_veneer_scan
6509 && !set_cmse_veneer_addr_from_implib (info, htab,
6510 &cmse_stub_created))
6511 ret = FALSE;
6512
6513 if (prev_num_a8_fixes != num_a8_fixes)
6514 stub_changed = TRUE;
6515
6516 if (!stub_changed)
6517 break;
6518
6519 /* OK, we've added some stubs. Find out the new size of the
6520 stub sections. */
6521 for (stub_sec = htab->stub_bfd->sections;
6522 stub_sec != NULL;
6523 stub_sec = stub_sec->next)
6524 {
6525 /* Ignore non-stub sections. */
6526 if (!strstr (stub_sec->name, STUB_SUFFIX))
6527 continue;
6528
6529 stub_sec->size = 0;
6530 }
6531
6532 /* Add new SG veneers after those already in the input import
6533 library. */
6534 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6535 stub_type++)
6536 {
6537 bfd_vma *start_offset_p;
6538 asection **stub_sec_p;
6539
6540 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
6541 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6542 if (start_offset_p == NULL)
6543 continue;
6544
6545 BFD_ASSERT (stub_sec_p != NULL);
6546 if (*stub_sec_p != NULL)
6547 (*stub_sec_p)->size = *start_offset_p;
6548 }
6549
6550 /* Compute stub section size, considering padding. */
6551 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
6552 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6553 stub_type++)
6554 {
6555 int size, padding;
6556 asection **stub_sec_p;
6557
6558 padding = arm_dedicated_stub_section_padding (stub_type);
6559 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6560 /* Skip if no stub input section or no stub section padding
6561 required. */
6562 if ((stub_sec_p != NULL && *stub_sec_p == NULL) || padding == 0)
6563 continue;
6564 /* Stub section padding required but no dedicated section. */
6565 BFD_ASSERT (stub_sec_p);
6566
6567 size = (*stub_sec_p)->size;
6568 size = (size + padding - 1) & ~(padding - 1);
6569 (*stub_sec_p)->size = size;
6570 }
6571
6572 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
6573 if (htab->fix_cortex_a8)
6574 for (i = 0; i < num_a8_fixes; i++)
6575 {
6576 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
6577 a8_fixes[i].section, htab, a8_fixes[i].stub_type);
6578
6579 if (stub_sec == NULL)
6580 return FALSE;
6581
6582 stub_sec->size
6583 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
6584 NULL);
6585 }
6586
6587
6588 /* Ask the linker to do its stuff. */
6589 (*htab->layout_sections_again) ();
6590 first_veneer_scan = FALSE;
6591 }
6592
6593 /* Add stubs for Cortex-A8 erratum fixes now. */
6594 if (htab->fix_cortex_a8)
6595 {
6596 for (i = 0; i < num_a8_fixes; i++)
6597 {
6598 struct elf32_arm_stub_hash_entry *stub_entry;
6599 char *stub_name = a8_fixes[i].stub_name;
6600 asection *section = a8_fixes[i].section;
6601 unsigned int section_id = a8_fixes[i].section->id;
6602 asection *link_sec = htab->stub_group[section_id].link_sec;
6603 asection *stub_sec = htab->stub_group[section_id].stub_sec;
6604 const insn_sequence *template_sequence;
6605 int template_size, size = 0;
6606
6607 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
6608 TRUE, FALSE);
6609 if (stub_entry == NULL)
6610 {
6611 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
6612 section->owner,
6613 stub_name);
6614 return FALSE;
6615 }
6616
6617 stub_entry->stub_sec = stub_sec;
6618 stub_entry->stub_offset = (bfd_vma) -1;
6619 stub_entry->id_sec = link_sec;
6620 stub_entry->stub_type = a8_fixes[i].stub_type;
6621 stub_entry->source_value = a8_fixes[i].offset;
6622 stub_entry->target_section = a8_fixes[i].section;
6623 stub_entry->target_value = a8_fixes[i].target_offset;
6624 stub_entry->orig_insn = a8_fixes[i].orig_insn;
6625 stub_entry->branch_type = a8_fixes[i].branch_type;
6626
6627 size = find_stub_size_and_template (a8_fixes[i].stub_type,
6628 &template_sequence,
6629 &template_size);
6630
6631 stub_entry->stub_size = size;
6632 stub_entry->stub_template = template_sequence;
6633 stub_entry->stub_template_size = template_size;
6634 }
6635
6636 /* Stash the Cortex-A8 erratum fix array for use later in
6637 elf32_arm_write_section(). */
6638 htab->a8_erratum_fixes = a8_fixes;
6639 htab->num_a8_erratum_fixes = num_a8_fixes;
6640 }
6641 else
6642 {
6643 htab->a8_erratum_fixes = NULL;
6644 htab->num_a8_erratum_fixes = 0;
6645 }
6646 return ret;
6647 }
6648
6649 /* Build all the stubs associated with the current output file. The
6650 stubs are kept in a hash table attached to the main linker hash
6651 table. We also set up the .plt entries for statically linked PIC
6652 functions here. This function is called via arm_elf_finish in the
6653 linker. */
6654
6655 bfd_boolean
6656 elf32_arm_build_stubs (struct bfd_link_info *info)
6657 {
6658 asection *stub_sec;
6659 struct bfd_hash_table *table;
6660 enum elf32_arm_stub_type stub_type;
6661 struct elf32_arm_link_hash_table *htab;
6662
6663 htab = elf32_arm_hash_table (info);
6664 if (htab == NULL)
6665 return FALSE;
6666
6667 for (stub_sec = htab->stub_bfd->sections;
6668 stub_sec != NULL;
6669 stub_sec = stub_sec->next)
6670 {
6671 bfd_size_type size;
6672
6673 /* Ignore non-stub sections. */
6674 if (!strstr (stub_sec->name, STUB_SUFFIX))
6675 continue;
6676
6677 /* Allocate memory to hold the linker stubs. Zeroing the stub sections
6678 must at least be done for stub section requiring padding and for SG
6679 veneers to ensure that a non secure code branching to a removed SG
6680 veneer causes an error. */
6681 size = stub_sec->size;
6682 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
6683 if (stub_sec->contents == NULL && size != 0)
6684 return FALSE;
6685
6686 stub_sec->size = 0;
6687 }
6688
6689 /* Add new SG veneers after those already in the input import library. */
6690 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
6691 {
6692 bfd_vma *start_offset_p;
6693 asection **stub_sec_p;
6694
6695 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
6696 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6697 if (start_offset_p == NULL)
6698 continue;
6699
6700 BFD_ASSERT (stub_sec_p != NULL);
6701 if (*stub_sec_p != NULL)
6702 (*stub_sec_p)->size = *start_offset_p;
6703 }
6704
6705 /* Build the stubs as directed by the stub hash table. */
6706 table = &htab->stub_hash_table;
6707 bfd_hash_traverse (table, arm_build_one_stub, info);
6708 if (htab->fix_cortex_a8)
6709 {
6710 /* Place the cortex a8 stubs last. */
6711 htab->fix_cortex_a8 = -1;
6712 bfd_hash_traverse (table, arm_build_one_stub, info);
6713 }
6714
6715 return TRUE;
6716 }
6717
6718 /* Locate the Thumb encoded calling stub for NAME. */
6719
6720 static struct elf_link_hash_entry *
6721 find_thumb_glue (struct bfd_link_info *link_info,
6722 const char *name,
6723 char **error_message)
6724 {
6725 char *tmp_name;
6726 struct elf_link_hash_entry *hash;
6727 struct elf32_arm_link_hash_table *hash_table;
6728
6729 /* We need a pointer to the armelf specific hash table. */
6730 hash_table = elf32_arm_hash_table (link_info);
6731 if (hash_table == NULL)
6732 return NULL;
6733
6734 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
6735 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
6736
6737 BFD_ASSERT (tmp_name);
6738
6739 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
6740
6741 hash = elf_link_hash_lookup
6742 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
6743
6744 if (hash == NULL
6745 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
6746 tmp_name, name) == -1)
6747 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
6748
6749 free (tmp_name);
6750
6751 return hash;
6752 }
6753
6754 /* Locate the ARM encoded calling stub for NAME. */
6755
6756 static struct elf_link_hash_entry *
6757 find_arm_glue (struct bfd_link_info *link_info,
6758 const char *name,
6759 char **error_message)
6760 {
6761 char *tmp_name;
6762 struct elf_link_hash_entry *myh;
6763 struct elf32_arm_link_hash_table *hash_table;
6764
6765 /* We need a pointer to the elfarm specific hash table. */
6766 hash_table = elf32_arm_hash_table (link_info);
6767 if (hash_table == NULL)
6768 return NULL;
6769
6770 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
6771 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
6772
6773 BFD_ASSERT (tmp_name);
6774
6775 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
6776
6777 myh = elf_link_hash_lookup
6778 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
6779
6780 if (myh == NULL
6781 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
6782 tmp_name, name) == -1)
6783 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
6784
6785 free (tmp_name);
6786
6787 return myh;
6788 }
6789
6790 /* ARM->Thumb glue (static images):
6791
6792 .arm
6793 __func_from_arm:
6794 ldr r12, __func_addr
6795 bx r12
6796 __func_addr:
6797 .word func @ behave as if you saw a ARM_32 reloc.
6798
6799 (v5t static images)
6800 .arm
6801 __func_from_arm:
6802 ldr pc, __func_addr
6803 __func_addr:
6804 .word func @ behave as if you saw a ARM_32 reloc.
6805
6806 (relocatable images)
6807 .arm
6808 __func_from_arm:
6809 ldr r12, __func_offset
6810 add r12, r12, pc
6811 bx r12
6812 __func_offset:
6813 .word func - . */
6814
6815 #define ARM2THUMB_STATIC_GLUE_SIZE 12
6816 static const insn32 a2t1_ldr_insn = 0xe59fc000;
6817 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
6818 static const insn32 a2t3_func_addr_insn = 0x00000001;
6819
6820 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
6821 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
6822 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
6823
6824 #define ARM2THUMB_PIC_GLUE_SIZE 16
6825 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
6826 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
6827 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
6828
6829 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
6830
6831 .thumb .thumb
6832 .align 2 .align 2
6833 __func_from_thumb: __func_from_thumb:
6834 bx pc push {r6, lr}
6835 nop ldr r6, __func_addr
6836 .arm mov lr, pc
6837 b func bx r6
6838 .arm
6839 ;; back_to_thumb
6840 ldmia r13! {r6, lr}
6841 bx lr
6842 __func_addr:
6843 .word func */
6844
6845 #define THUMB2ARM_GLUE_SIZE 8
6846 static const insn16 t2a1_bx_pc_insn = 0x4778;
6847 static const insn16 t2a2_noop_insn = 0x46c0;
6848 static const insn32 t2a3_b_insn = 0xea000000;
6849
6850 #define VFP11_ERRATUM_VENEER_SIZE 8
6851 #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16
6852 #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24
6853
6854 #define ARM_BX_VENEER_SIZE 12
6855 static const insn32 armbx1_tst_insn = 0xe3100001;
6856 static const insn32 armbx2_moveq_insn = 0x01a0f000;
6857 static const insn32 armbx3_bx_insn = 0xe12fff10;
6858
6859 #ifndef ELFARM_NABI_C_INCLUDED
6860 static void
6861 arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
6862 {
6863 asection * s;
6864 bfd_byte * contents;
6865
6866 if (size == 0)
6867 {
6868 /* Do not include empty glue sections in the output. */
6869 if (abfd != NULL)
6870 {
6871 s = bfd_get_linker_section (abfd, name);
6872 if (s != NULL)
6873 s->flags |= SEC_EXCLUDE;
6874 }
6875 return;
6876 }
6877
6878 BFD_ASSERT (abfd != NULL);
6879
6880 s = bfd_get_linker_section (abfd, name);
6881 BFD_ASSERT (s != NULL);
6882
6883 contents = (bfd_byte *) bfd_alloc (abfd, size);
6884
6885 BFD_ASSERT (s->size == size);
6886 s->contents = contents;
6887 }
6888
6889 bfd_boolean
6890 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
6891 {
6892 struct elf32_arm_link_hash_table * globals;
6893
6894 globals = elf32_arm_hash_table (info);
6895 BFD_ASSERT (globals != NULL);
6896
6897 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6898 globals->arm_glue_size,
6899 ARM2THUMB_GLUE_SECTION_NAME);
6900
6901 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6902 globals->thumb_glue_size,
6903 THUMB2ARM_GLUE_SECTION_NAME);
6904
6905 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6906 globals->vfp11_erratum_glue_size,
6907 VFP11_ERRATUM_VENEER_SECTION_NAME);
6908
6909 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6910 globals->stm32l4xx_erratum_glue_size,
6911 STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
6912
6913 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6914 globals->bx_glue_size,
6915 ARM_BX_GLUE_SECTION_NAME);
6916
6917 return TRUE;
6918 }
6919
6920 /* Allocate space and symbols for calling a Thumb function from Arm mode.
6921 returns the symbol identifying the stub. */
6922
6923 static struct elf_link_hash_entry *
6924 record_arm_to_thumb_glue (struct bfd_link_info * link_info,
6925 struct elf_link_hash_entry * h)
6926 {
6927 const char * name = h->root.root.string;
6928 asection * s;
6929 char * tmp_name;
6930 struct elf_link_hash_entry * myh;
6931 struct bfd_link_hash_entry * bh;
6932 struct elf32_arm_link_hash_table * globals;
6933 bfd_vma val;
6934 bfd_size_type size;
6935
6936 globals = elf32_arm_hash_table (link_info);
6937 BFD_ASSERT (globals != NULL);
6938 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6939
6940 s = bfd_get_linker_section
6941 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
6942
6943 BFD_ASSERT (s != NULL);
6944
6945 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
6946 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
6947
6948 BFD_ASSERT (tmp_name);
6949
6950 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
6951
6952 myh = elf_link_hash_lookup
6953 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6954
6955 if (myh != NULL)
6956 {
6957 /* We've already seen this guy. */
6958 free (tmp_name);
6959 return myh;
6960 }
6961
6962 /* The only trick here is using hash_table->arm_glue_size as the value.
6963 Even though the section isn't allocated yet, this is where we will be
6964 putting it. The +1 on the value marks that the stub has not been
6965 output yet - not that it is a Thumb function. */
6966 bh = NULL;
6967 val = globals->arm_glue_size + 1;
6968 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
6969 tmp_name, BSF_GLOBAL, s, val,
6970 NULL, TRUE, FALSE, &bh);
6971
6972 myh = (struct elf_link_hash_entry *) bh;
6973 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
6974 myh->forced_local = 1;
6975
6976 free (tmp_name);
6977
6978 if (bfd_link_pic (link_info)
6979 || globals->root.is_relocatable_executable
6980 || globals->pic_veneer)
6981 size = ARM2THUMB_PIC_GLUE_SIZE;
6982 else if (globals->use_blx)
6983 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
6984 else
6985 size = ARM2THUMB_STATIC_GLUE_SIZE;
6986
6987 s->size += size;
6988 globals->arm_glue_size += size;
6989
6990 return myh;
6991 }
6992
6993 /* Allocate space for ARMv4 BX veneers. */
6994
6995 static void
6996 record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
6997 {
6998 asection * s;
6999 struct elf32_arm_link_hash_table *globals;
7000 char *tmp_name;
7001 struct elf_link_hash_entry *myh;
7002 struct bfd_link_hash_entry *bh;
7003 bfd_vma val;
7004
7005 /* BX PC does not need a veneer. */
7006 if (reg == 15)
7007 return;
7008
7009 globals = elf32_arm_hash_table (link_info);
7010 BFD_ASSERT (globals != NULL);
7011 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7012
7013 /* Check if this veneer has already been allocated. */
7014 if (globals->bx_glue_offset[reg])
7015 return;
7016
7017 s = bfd_get_linker_section
7018 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
7019
7020 BFD_ASSERT (s != NULL);
7021
7022 /* Add symbol for veneer. */
7023 tmp_name = (char *)
7024 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
7025
7026 BFD_ASSERT (tmp_name);
7027
7028 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
7029
7030 myh = elf_link_hash_lookup
7031 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
7032
7033 BFD_ASSERT (myh == NULL);
7034
7035 bh = NULL;
7036 val = globals->bx_glue_size;
7037 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
7038 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7039 NULL, TRUE, FALSE, &bh);
7040
7041 myh = (struct elf_link_hash_entry *) bh;
7042 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7043 myh->forced_local = 1;
7044
7045 s->size += ARM_BX_VENEER_SIZE;
7046 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
7047 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
7048 }
7049
7050
7051 /* Add an entry to the code/data map for section SEC. */
7052
7053 static void
7054 elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
7055 {
7056 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
7057 unsigned int newidx;
7058
7059 if (sec_data->map == NULL)
7060 {
7061 sec_data->map = (elf32_arm_section_map *)
7062 bfd_malloc (sizeof (elf32_arm_section_map));
7063 sec_data->mapcount = 0;
7064 sec_data->mapsize = 1;
7065 }
7066
7067 newidx = sec_data->mapcount++;
7068
7069 if (sec_data->mapcount > sec_data->mapsize)
7070 {
7071 sec_data->mapsize *= 2;
7072 sec_data->map = (elf32_arm_section_map *)
7073 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
7074 * sizeof (elf32_arm_section_map));
7075 }
7076
7077 if (sec_data->map)
7078 {
7079 sec_data->map[newidx].vma = vma;
7080 sec_data->map[newidx].type = type;
7081 }
7082 }
7083
7084
7085 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
7086 veneers are handled for now. */
7087
7088 static bfd_vma
7089 record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
7090 elf32_vfp11_erratum_list *branch,
7091 bfd *branch_bfd,
7092 asection *branch_sec,
7093 unsigned int offset)
7094 {
7095 asection *s;
7096 struct elf32_arm_link_hash_table *hash_table;
7097 char *tmp_name;
7098 struct elf_link_hash_entry *myh;
7099 struct bfd_link_hash_entry *bh;
7100 bfd_vma val;
7101 struct _arm_elf_section_data *sec_data;
7102 elf32_vfp11_erratum_list *newerr;
7103
7104 hash_table = elf32_arm_hash_table (link_info);
7105 BFD_ASSERT (hash_table != NULL);
7106 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7107
7108 s = bfd_get_linker_section
7109 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
7110
7111 sec_data = elf32_arm_section_data (s);
7112
7113 BFD_ASSERT (s != NULL);
7114
7115 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7116 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
7117
7118 BFD_ASSERT (tmp_name);
7119
7120 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
7121 hash_table->num_vfp11_fixes);
7122
7123 myh = elf_link_hash_lookup
7124 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7125
7126 BFD_ASSERT (myh == NULL);
7127
7128 bh = NULL;
7129 val = hash_table->vfp11_erratum_glue_size;
7130 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7131 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7132 NULL, TRUE, FALSE, &bh);
7133
7134 myh = (struct elf_link_hash_entry *) bh;
7135 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7136 myh->forced_local = 1;
7137
7138 /* Link veneer back to calling location. */
7139 sec_data->erratumcount += 1;
7140 newerr = (elf32_vfp11_erratum_list *)
7141 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
7142
7143 newerr->type = VFP11_ERRATUM_ARM_VENEER;
7144 newerr->vma = -1;
7145 newerr->u.v.branch = branch;
7146 newerr->u.v.id = hash_table->num_vfp11_fixes;
7147 branch->u.b.veneer = newerr;
7148
7149 newerr->next = sec_data->erratumlist;
7150 sec_data->erratumlist = newerr;
7151
7152 /* A symbol for the return from the veneer. */
7153 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
7154 hash_table->num_vfp11_fixes);
7155
7156 myh = elf_link_hash_lookup
7157 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7158
7159 if (myh != NULL)
7160 abort ();
7161
7162 bh = NULL;
7163 val = offset + 4;
7164 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7165 branch_sec, val, NULL, TRUE, FALSE, &bh);
7166
7167 myh = (struct elf_link_hash_entry *) bh;
7168 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7169 myh->forced_local = 1;
7170
7171 free (tmp_name);
7172
7173 /* Generate a mapping symbol for the veneer section, and explicitly add an
7174 entry for that symbol to the code/data map for the section. */
7175 if (hash_table->vfp11_erratum_glue_size == 0)
7176 {
7177 bh = NULL;
7178 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
7179 ever requires this erratum fix. */
7180 _bfd_generic_link_add_one_symbol (link_info,
7181 hash_table->bfd_of_glue_owner, "$a",
7182 BSF_LOCAL, s, 0, NULL,
7183 TRUE, FALSE, &bh);
7184
7185 myh = (struct elf_link_hash_entry *) bh;
7186 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7187 myh->forced_local = 1;
7188
7189 /* The elf32_arm_init_maps function only cares about symbols from input
7190 BFDs. We must make a note of this generated mapping symbol
7191 ourselves so that code byteswapping works properly in
7192 elf32_arm_write_section. */
7193 elf32_arm_section_map_add (s, 'a', 0);
7194 }
7195
7196 s->size += VFP11_ERRATUM_VENEER_SIZE;
7197 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
7198 hash_table->num_vfp11_fixes++;
7199
7200 /* The offset of the veneer. */
7201 return val;
7202 }
7203
7204 /* Record information about a STM32L4XX STM erratum veneer. Only THUMB-mode
7205 veneers need to be handled because used only in Cortex-M. */
7206
7207 static bfd_vma
7208 record_stm32l4xx_erratum_veneer (struct bfd_link_info *link_info,
7209 elf32_stm32l4xx_erratum_list *branch,
7210 bfd *branch_bfd,
7211 asection *branch_sec,
7212 unsigned int offset,
7213 bfd_size_type veneer_size)
7214 {
7215 asection *s;
7216 struct elf32_arm_link_hash_table *hash_table;
7217 char *tmp_name;
7218 struct elf_link_hash_entry *myh;
7219 struct bfd_link_hash_entry *bh;
7220 bfd_vma val;
7221 struct _arm_elf_section_data *sec_data;
7222 elf32_stm32l4xx_erratum_list *newerr;
7223
7224 hash_table = elf32_arm_hash_table (link_info);
7225 BFD_ASSERT (hash_table != NULL);
7226 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7227
7228 s = bfd_get_linker_section
7229 (hash_table->bfd_of_glue_owner, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7230
7231 BFD_ASSERT (s != NULL);
7232
7233 sec_data = elf32_arm_section_data (s);
7234
7235 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7236 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
7237
7238 BFD_ASSERT (tmp_name);
7239
7240 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
7241 hash_table->num_stm32l4xx_fixes);
7242
7243 myh = elf_link_hash_lookup
7244 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7245
7246 BFD_ASSERT (myh == NULL);
7247
7248 bh = NULL;
7249 val = hash_table->stm32l4xx_erratum_glue_size;
7250 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7251 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7252 NULL, TRUE, FALSE, &bh);
7253
7254 myh = (struct elf_link_hash_entry *) bh;
7255 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7256 myh->forced_local = 1;
7257
7258 /* Link veneer back to calling location. */
7259 sec_data->stm32l4xx_erratumcount += 1;
7260 newerr = (elf32_stm32l4xx_erratum_list *)
7261 bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list));
7262
7263 newerr->type = STM32L4XX_ERRATUM_VENEER;
7264 newerr->vma = -1;
7265 newerr->u.v.branch = branch;
7266 newerr->u.v.id = hash_table->num_stm32l4xx_fixes;
7267 branch->u.b.veneer = newerr;
7268
7269 newerr->next = sec_data->stm32l4xx_erratumlist;
7270 sec_data->stm32l4xx_erratumlist = newerr;
7271
7272 /* A symbol for the return from the veneer. */
7273 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
7274 hash_table->num_stm32l4xx_fixes);
7275
7276 myh = elf_link_hash_lookup
7277 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7278
7279 if (myh != NULL)
7280 abort ();
7281
7282 bh = NULL;
7283 val = offset + 4;
7284 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7285 branch_sec, val, NULL, TRUE, FALSE, &bh);
7286
7287 myh = (struct elf_link_hash_entry *) bh;
7288 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7289 myh->forced_local = 1;
7290
7291 free (tmp_name);
7292
7293 /* Generate a mapping symbol for the veneer section, and explicitly add an
7294 entry for that symbol to the code/data map for the section. */
7295 if (hash_table->stm32l4xx_erratum_glue_size == 0)
7296 {
7297 bh = NULL;
7298 /* Creates a THUMB symbol since there is no other choice. */
7299 _bfd_generic_link_add_one_symbol (link_info,
7300 hash_table->bfd_of_glue_owner, "$t",
7301 BSF_LOCAL, s, 0, NULL,
7302 TRUE, FALSE, &bh);
7303
7304 myh = (struct elf_link_hash_entry *) bh;
7305 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7306 myh->forced_local = 1;
7307
7308 /* The elf32_arm_init_maps function only cares about symbols from input
7309 BFDs. We must make a note of this generated mapping symbol
7310 ourselves so that code byteswapping works properly in
7311 elf32_arm_write_section. */
7312 elf32_arm_section_map_add (s, 't', 0);
7313 }
7314
7315 s->size += veneer_size;
7316 hash_table->stm32l4xx_erratum_glue_size += veneer_size;
7317 hash_table->num_stm32l4xx_fixes++;
7318
7319 /* The offset of the veneer. */
7320 return val;
7321 }
7322
7323 #define ARM_GLUE_SECTION_FLAGS \
7324 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
7325 | SEC_READONLY | SEC_LINKER_CREATED)
7326
7327 /* Create a fake section for use by the ARM backend of the linker. */
7328
7329 static bfd_boolean
7330 arm_make_glue_section (bfd * abfd, const char * name)
7331 {
7332 asection * sec;
7333
7334 sec = bfd_get_linker_section (abfd, name);
7335 if (sec != NULL)
7336 /* Already made. */
7337 return TRUE;
7338
7339 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
7340
7341 if (sec == NULL
7342 || !bfd_set_section_alignment (abfd, sec, 2))
7343 return FALSE;
7344
7345 /* Set the gc mark to prevent the section from being removed by garbage
7346 collection, despite the fact that no relocs refer to this section. */
7347 sec->gc_mark = 1;
7348
7349 return TRUE;
7350 }
7351
7352 /* Set size of .plt entries. This function is called from the
7353 linker scripts in ld/emultempl/{armelf}.em. */
7354
7355 void
7356 bfd_elf32_arm_use_long_plt (void)
7357 {
7358 elf32_arm_use_long_plt_entry = TRUE;
7359 }
7360
7361 /* Add the glue sections to ABFD. This function is called from the
7362 linker scripts in ld/emultempl/{armelf}.em. */
7363
7364 bfd_boolean
7365 bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
7366 struct bfd_link_info *info)
7367 {
7368 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
7369 bfd_boolean dostm32l4xx = globals
7370 && globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE;
7371 bfd_boolean addglue;
7372
7373 /* If we are only performing a partial
7374 link do not bother adding the glue. */
7375 if (bfd_link_relocatable (info))
7376 return TRUE;
7377
7378 addglue = arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
7379 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
7380 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
7381 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
7382
7383 if (!dostm32l4xx)
7384 return addglue;
7385
7386 return addglue
7387 && arm_make_glue_section (abfd, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7388 }
7389
7390 /* Mark output sections of veneers needing a dedicated one with SEC_KEEP. This
7391 ensures they are not marked for deletion by
7392 strip_excluded_output_sections () when veneers are going to be created
7393 later. Not doing so would trigger assert on empty section size in
7394 lang_size_sections_1 (). */
7395
7396 void
7397 bfd_elf32_arm_keep_private_stub_output_sections (struct bfd_link_info *info)
7398 {
7399 enum elf32_arm_stub_type stub_type;
7400
7401 /* If we are only performing a partial
7402 link do not bother adding the glue. */
7403 if (bfd_link_relocatable (info))
7404 return;
7405
7406 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
7407 {
7408 asection *out_sec;
7409 const char *out_sec_name;
7410
7411 if (!arm_dedicated_stub_output_section_required (stub_type))
7412 continue;
7413
7414 out_sec_name = arm_dedicated_stub_output_section_name (stub_type);
7415 out_sec = bfd_get_section_by_name (info->output_bfd, out_sec_name);
7416 if (out_sec != NULL)
7417 out_sec->flags |= SEC_KEEP;
7418 }
7419 }
7420
7421 /* Select a BFD to be used to hold the sections used by the glue code.
7422 This function is called from the linker scripts in ld/emultempl/
7423 {armelf/pe}.em. */
7424
7425 bfd_boolean
7426 bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
7427 {
7428 struct elf32_arm_link_hash_table *globals;
7429
7430 /* If we are only performing a partial link
7431 do not bother getting a bfd to hold the glue. */
7432 if (bfd_link_relocatable (info))
7433 return TRUE;
7434
7435 /* Make sure we don't attach the glue sections to a dynamic object. */
7436 BFD_ASSERT (!(abfd->flags & DYNAMIC));
7437
7438 globals = elf32_arm_hash_table (info);
7439 BFD_ASSERT (globals != NULL);
7440
7441 if (globals->bfd_of_glue_owner != NULL)
7442 return TRUE;
7443
7444 /* Save the bfd for later use. */
7445 globals->bfd_of_glue_owner = abfd;
7446
7447 return TRUE;
7448 }
7449
7450 static void
7451 check_use_blx (struct elf32_arm_link_hash_table *globals)
7452 {
7453 int cpu_arch;
7454
7455 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
7456 Tag_CPU_arch);
7457
7458 if (globals->fix_arm1176)
7459 {
7460 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
7461 globals->use_blx = 1;
7462 }
7463 else
7464 {
7465 if (cpu_arch > TAG_CPU_ARCH_V4T)
7466 globals->use_blx = 1;
7467 }
7468 }
7469
7470 bfd_boolean
7471 bfd_elf32_arm_process_before_allocation (bfd *abfd,
7472 struct bfd_link_info *link_info)
7473 {
7474 Elf_Internal_Shdr *symtab_hdr;
7475 Elf_Internal_Rela *internal_relocs = NULL;
7476 Elf_Internal_Rela *irel, *irelend;
7477 bfd_byte *contents = NULL;
7478
7479 asection *sec;
7480 struct elf32_arm_link_hash_table *globals;
7481
7482 /* If we are only performing a partial link do not bother
7483 to construct any glue. */
7484 if (bfd_link_relocatable (link_info))
7485 return TRUE;
7486
7487 /* Here we have a bfd that is to be included on the link. We have a
7488 hook to do reloc rummaging, before section sizes are nailed down. */
7489 globals = elf32_arm_hash_table (link_info);
7490 BFD_ASSERT (globals != NULL);
7491
7492 check_use_blx (globals);
7493
7494 if (globals->byteswap_code && !bfd_big_endian (abfd))
7495 {
7496 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
7497 abfd);
7498 return FALSE;
7499 }
7500
7501 /* PR 5398: If we have not decided to include any loadable sections in
7502 the output then we will not have a glue owner bfd. This is OK, it
7503 just means that there is nothing else for us to do here. */
7504 if (globals->bfd_of_glue_owner == NULL)
7505 return TRUE;
7506
7507 /* Rummage around all the relocs and map the glue vectors. */
7508 sec = abfd->sections;
7509
7510 if (sec == NULL)
7511 return TRUE;
7512
7513 for (; sec != NULL; sec = sec->next)
7514 {
7515 if (sec->reloc_count == 0)
7516 continue;
7517
7518 if ((sec->flags & SEC_EXCLUDE) != 0)
7519 continue;
7520
7521 symtab_hdr = & elf_symtab_hdr (abfd);
7522
7523 /* Load the relocs. */
7524 internal_relocs
7525 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
7526
7527 if (internal_relocs == NULL)
7528 goto error_return;
7529
7530 irelend = internal_relocs + sec->reloc_count;
7531 for (irel = internal_relocs; irel < irelend; irel++)
7532 {
7533 long r_type;
7534 unsigned long r_index;
7535
7536 struct elf_link_hash_entry *h;
7537
7538 r_type = ELF32_R_TYPE (irel->r_info);
7539 r_index = ELF32_R_SYM (irel->r_info);
7540
7541 /* These are the only relocation types we care about. */
7542 if ( r_type != R_ARM_PC24
7543 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
7544 continue;
7545
7546 /* Get the section contents if we haven't done so already. */
7547 if (contents == NULL)
7548 {
7549 /* Get cached copy if it exists. */
7550 if (elf_section_data (sec)->this_hdr.contents != NULL)
7551 contents = elf_section_data (sec)->this_hdr.contents;
7552 else
7553 {
7554 /* Go get them off disk. */
7555 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
7556 goto error_return;
7557 }
7558 }
7559
7560 if (r_type == R_ARM_V4BX)
7561 {
7562 int reg;
7563
7564 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
7565 record_arm_bx_glue (link_info, reg);
7566 continue;
7567 }
7568
7569 /* If the relocation is not against a symbol it cannot concern us. */
7570 h = NULL;
7571
7572 /* We don't care about local symbols. */
7573 if (r_index < symtab_hdr->sh_info)
7574 continue;
7575
7576 /* This is an external symbol. */
7577 r_index -= symtab_hdr->sh_info;
7578 h = (struct elf_link_hash_entry *)
7579 elf_sym_hashes (abfd)[r_index];
7580
7581 /* If the relocation is against a static symbol it must be within
7582 the current section and so cannot be a cross ARM/Thumb relocation. */
7583 if (h == NULL)
7584 continue;
7585
7586 /* If the call will go through a PLT entry then we do not need
7587 glue. */
7588 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
7589 continue;
7590
7591 switch (r_type)
7592 {
7593 case R_ARM_PC24:
7594 /* This one is a call from arm code. We need to look up
7595 the target of the call. If it is a thumb target, we
7596 insert glue. */
7597 if (ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
7598 == ST_BRANCH_TO_THUMB)
7599 record_arm_to_thumb_glue (link_info, h);
7600 break;
7601
7602 default:
7603 abort ();
7604 }
7605 }
7606
7607 if (contents != NULL
7608 && elf_section_data (sec)->this_hdr.contents != contents)
7609 free (contents);
7610 contents = NULL;
7611
7612 if (internal_relocs != NULL
7613 && elf_section_data (sec)->relocs != internal_relocs)
7614 free (internal_relocs);
7615 internal_relocs = NULL;
7616 }
7617
7618 return TRUE;
7619
7620 error_return:
7621 if (contents != NULL
7622 && elf_section_data (sec)->this_hdr.contents != contents)
7623 free (contents);
7624 if (internal_relocs != NULL
7625 && elf_section_data (sec)->relocs != internal_relocs)
7626 free (internal_relocs);
7627
7628 return FALSE;
7629 }
7630 #endif
7631
7632
7633 /* Initialise maps of ARM/Thumb/data for input BFDs. */
7634
7635 void
7636 bfd_elf32_arm_init_maps (bfd *abfd)
7637 {
7638 Elf_Internal_Sym *isymbuf;
7639 Elf_Internal_Shdr *hdr;
7640 unsigned int i, localsyms;
7641
7642 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
7643 if (! is_arm_elf (abfd))
7644 return;
7645
7646 if ((abfd->flags & DYNAMIC) != 0)
7647 return;
7648
7649 hdr = & elf_symtab_hdr (abfd);
7650 localsyms = hdr->sh_info;
7651
7652 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
7653 should contain the number of local symbols, which should come before any
7654 global symbols. Mapping symbols are always local. */
7655 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
7656 NULL);
7657
7658 /* No internal symbols read? Skip this BFD. */
7659 if (isymbuf == NULL)
7660 return;
7661
7662 for (i = 0; i < localsyms; i++)
7663 {
7664 Elf_Internal_Sym *isym = &isymbuf[i];
7665 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
7666 const char *name;
7667
7668 if (sec != NULL
7669 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
7670 {
7671 name = bfd_elf_string_from_elf_section (abfd,
7672 hdr->sh_link, isym->st_name);
7673
7674 if (bfd_is_arm_special_symbol_name (name,
7675 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
7676 elf32_arm_section_map_add (sec, name[1], isym->st_value);
7677 }
7678 }
7679 }
7680
7681
7682 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
7683 say what they wanted. */
7684
7685 void
7686 bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
7687 {
7688 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7689 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
7690
7691 if (globals == NULL)
7692 return;
7693
7694 if (globals->fix_cortex_a8 == -1)
7695 {
7696 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
7697 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
7698 && (out_attr[Tag_CPU_arch_profile].i == 'A'
7699 || out_attr[Tag_CPU_arch_profile].i == 0))
7700 globals->fix_cortex_a8 = 1;
7701 else
7702 globals->fix_cortex_a8 = 0;
7703 }
7704 }
7705
7706
7707 void
7708 bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
7709 {
7710 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7711 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
7712
7713 if (globals == NULL)
7714 return;
7715 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
7716 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
7717 {
7718 switch (globals->vfp11_fix)
7719 {
7720 case BFD_ARM_VFP11_FIX_DEFAULT:
7721 case BFD_ARM_VFP11_FIX_NONE:
7722 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
7723 break;
7724
7725 default:
7726 /* Give a warning, but do as the user requests anyway. */
7727 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
7728 "workaround is not necessary for target architecture"), obfd);
7729 }
7730 }
7731 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
7732 /* For earlier architectures, we might need the workaround, but do not
7733 enable it by default. If users is running with broken hardware, they
7734 must enable the erratum fix explicitly. */
7735 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
7736 }
7737
7738 void
7739 bfd_elf32_arm_set_stm32l4xx_fix (bfd *obfd, struct bfd_link_info *link_info)
7740 {
7741 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7742 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
7743
7744 if (globals == NULL)
7745 return;
7746
7747 /* We assume only Cortex-M4 may require the fix. */
7748 if (out_attr[Tag_CPU_arch].i != TAG_CPU_ARCH_V7E_M
7749 || out_attr[Tag_CPU_arch_profile].i != 'M')
7750 {
7751 if (globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE)
7752 /* Give a warning, but do as the user requests anyway. */
7753 (*_bfd_error_handler)
7754 (_("%B: warning: selected STM32L4XX erratum "
7755 "workaround is not necessary for target architecture"), obfd);
7756 }
7757 }
7758
7759 enum bfd_arm_vfp11_pipe
7760 {
7761 VFP11_FMAC,
7762 VFP11_LS,
7763 VFP11_DS,
7764 VFP11_BAD
7765 };
7766
7767 /* Return a VFP register number. This is encoded as RX:X for single-precision
7768 registers, or X:RX for double-precision registers, where RX is the group of
7769 four bits in the instruction encoding and X is the single extension bit.
7770 RX and X fields are specified using their lowest (starting) bit. The return
7771 value is:
7772
7773 0...31: single-precision registers s0...s31
7774 32...63: double-precision registers d0...d31.
7775
7776 Although X should be zero for VFP11 (encoding d0...d15 only), we might
7777 encounter VFP3 instructions, so we allow the full range for DP registers. */
7778
7779 static unsigned int
7780 bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
7781 unsigned int x)
7782 {
7783 if (is_double)
7784 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
7785 else
7786 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
7787 }
7788
7789 /* Set bits in *WMASK according to a register number REG as encoded by
7790 bfd_arm_vfp11_regno(). Ignore d16-d31. */
7791
7792 static void
7793 bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
7794 {
7795 if (reg < 32)
7796 *wmask |= 1 << reg;
7797 else if (reg < 48)
7798 *wmask |= 3 << ((reg - 32) * 2);
7799 }
7800
7801 /* Return TRUE if WMASK overwrites anything in REGS. */
7802
7803 static bfd_boolean
7804 bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
7805 {
7806 int i;
7807
7808 for (i = 0; i < numregs; i++)
7809 {
7810 unsigned int reg = regs[i];
7811
7812 if (reg < 32 && (wmask & (1 << reg)) != 0)
7813 return TRUE;
7814
7815 reg -= 32;
7816
7817 if (reg >= 16)
7818 continue;
7819
7820 if ((wmask & (3 << (reg * 2))) != 0)
7821 return TRUE;
7822 }
7823
7824 return FALSE;
7825 }
7826
7827 /* In this function, we're interested in two things: finding input registers
7828 for VFP data-processing instructions, and finding the set of registers which
7829 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
7830 hold the written set, so FLDM etc. are easy to deal with (we're only
7831 interested in 32 SP registers or 16 dp registers, due to the VFP version
7832 implemented by the chip in question). DP registers are marked by setting
7833 both SP registers in the write mask). */
7834
7835 static enum bfd_arm_vfp11_pipe
7836 bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
7837 int *numregs)
7838 {
7839 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
7840 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
7841
7842 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
7843 {
7844 unsigned int pqrs;
7845 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
7846 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
7847
7848 pqrs = ((insn & 0x00800000) >> 20)
7849 | ((insn & 0x00300000) >> 19)
7850 | ((insn & 0x00000040) >> 6);
7851
7852 switch (pqrs)
7853 {
7854 case 0: /* fmac[sd]. */
7855 case 1: /* fnmac[sd]. */
7856 case 2: /* fmsc[sd]. */
7857 case 3: /* fnmsc[sd]. */
7858 vpipe = VFP11_FMAC;
7859 bfd_arm_vfp11_write_mask (destmask, fd);
7860 regs[0] = fd;
7861 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
7862 regs[2] = fm;
7863 *numregs = 3;
7864 break;
7865
7866 case 4: /* fmul[sd]. */
7867 case 5: /* fnmul[sd]. */
7868 case 6: /* fadd[sd]. */
7869 case 7: /* fsub[sd]. */
7870 vpipe = VFP11_FMAC;
7871 goto vfp_binop;
7872
7873 case 8: /* fdiv[sd]. */
7874 vpipe = VFP11_DS;
7875 vfp_binop:
7876 bfd_arm_vfp11_write_mask (destmask, fd);
7877 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
7878 regs[1] = fm;
7879 *numregs = 2;
7880 break;
7881
7882 case 15: /* extended opcode. */
7883 {
7884 unsigned int extn = ((insn >> 15) & 0x1e)
7885 | ((insn >> 7) & 1);
7886
7887 switch (extn)
7888 {
7889 case 0: /* fcpy[sd]. */
7890 case 1: /* fabs[sd]. */
7891 case 2: /* fneg[sd]. */
7892 case 8: /* fcmp[sd]. */
7893 case 9: /* fcmpe[sd]. */
7894 case 10: /* fcmpz[sd]. */
7895 case 11: /* fcmpez[sd]. */
7896 case 16: /* fuito[sd]. */
7897 case 17: /* fsito[sd]. */
7898 case 24: /* ftoui[sd]. */
7899 case 25: /* ftouiz[sd]. */
7900 case 26: /* ftosi[sd]. */
7901 case 27: /* ftosiz[sd]. */
7902 /* These instructions will not bounce due to underflow. */
7903 *numregs = 0;
7904 vpipe = VFP11_FMAC;
7905 break;
7906
7907 case 3: /* fsqrt[sd]. */
7908 /* fsqrt cannot underflow, but it can (perhaps) overwrite
7909 registers to cause the erratum in previous instructions. */
7910 bfd_arm_vfp11_write_mask (destmask, fd);
7911 vpipe = VFP11_DS;
7912 break;
7913
7914 case 15: /* fcvt{ds,sd}. */
7915 {
7916 int rnum = 0;
7917
7918 bfd_arm_vfp11_write_mask (destmask, fd);
7919
7920 /* Only FCVTSD can underflow. */
7921 if ((insn & 0x100) != 0)
7922 regs[rnum++] = fm;
7923
7924 *numregs = rnum;
7925
7926 vpipe = VFP11_FMAC;
7927 }
7928 break;
7929
7930 default:
7931 return VFP11_BAD;
7932 }
7933 }
7934 break;
7935
7936 default:
7937 return VFP11_BAD;
7938 }
7939 }
7940 /* Two-register transfer. */
7941 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
7942 {
7943 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
7944
7945 if ((insn & 0x100000) == 0)
7946 {
7947 if (is_double)
7948 bfd_arm_vfp11_write_mask (destmask, fm);
7949 else
7950 {
7951 bfd_arm_vfp11_write_mask (destmask, fm);
7952 bfd_arm_vfp11_write_mask (destmask, fm + 1);
7953 }
7954 }
7955
7956 vpipe = VFP11_LS;
7957 }
7958 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
7959 {
7960 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
7961 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
7962
7963 switch (puw)
7964 {
7965 case 0: /* Two-reg transfer. We should catch these above. */
7966 abort ();
7967
7968 case 2: /* fldm[sdx]. */
7969 case 3:
7970 case 5:
7971 {
7972 unsigned int i, offset = insn & 0xff;
7973
7974 if (is_double)
7975 offset >>= 1;
7976
7977 for (i = fd; i < fd + offset; i++)
7978 bfd_arm_vfp11_write_mask (destmask, i);
7979 }
7980 break;
7981
7982 case 4: /* fld[sd]. */
7983 case 6:
7984 bfd_arm_vfp11_write_mask (destmask, fd);
7985 break;
7986
7987 default:
7988 return VFP11_BAD;
7989 }
7990
7991 vpipe = VFP11_LS;
7992 }
7993 /* Single-register transfer. Note L==0. */
7994 else if ((insn & 0x0f100e10) == 0x0e000a10)
7995 {
7996 unsigned int opcode = (insn >> 21) & 7;
7997 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
7998
7999 switch (opcode)
8000 {
8001 case 0: /* fmsr/fmdlr. */
8002 case 1: /* fmdhr. */
8003 /* Mark fmdhr and fmdlr as writing to the whole of the DP
8004 destination register. I don't know if this is exactly right,
8005 but it is the conservative choice. */
8006 bfd_arm_vfp11_write_mask (destmask, fn);
8007 break;
8008
8009 case 7: /* fmxr. */
8010 break;
8011 }
8012
8013 vpipe = VFP11_LS;
8014 }
8015
8016 return vpipe;
8017 }
8018
8019
8020 static int elf32_arm_compare_mapping (const void * a, const void * b);
8021
8022
8023 /* Look for potentially-troublesome code sequences which might trigger the
8024 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
8025 (available from ARM) for details of the erratum. A short version is
8026 described in ld.texinfo. */
8027
8028 bfd_boolean
8029 bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
8030 {
8031 asection *sec;
8032 bfd_byte *contents = NULL;
8033 int state = 0;
8034 int regs[3], numregs = 0;
8035 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8036 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
8037
8038 if (globals == NULL)
8039 return FALSE;
8040
8041 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
8042 The states transition as follows:
8043
8044 0 -> 1 (vector) or 0 -> 2 (scalar)
8045 A VFP FMAC-pipeline instruction has been seen. Fill
8046 regs[0]..regs[numregs-1] with its input operands. Remember this
8047 instruction in 'first_fmac'.
8048
8049 1 -> 2
8050 Any instruction, except for a VFP instruction which overwrites
8051 regs[*].
8052
8053 1 -> 3 [ -> 0 ] or
8054 2 -> 3 [ -> 0 ]
8055 A VFP instruction has been seen which overwrites any of regs[*].
8056 We must make a veneer! Reset state to 0 before examining next
8057 instruction.
8058
8059 2 -> 0
8060 If we fail to match anything in state 2, reset to state 0 and reset
8061 the instruction pointer to the instruction after 'first_fmac'.
8062
8063 If the VFP11 vector mode is in use, there must be at least two unrelated
8064 instructions between anti-dependent VFP11 instructions to properly avoid
8065 triggering the erratum, hence the use of the extra state 1. */
8066
8067 /* If we are only performing a partial link do not bother
8068 to construct any glue. */
8069 if (bfd_link_relocatable (link_info))
8070 return TRUE;
8071
8072 /* Skip if this bfd does not correspond to an ELF image. */
8073 if (! is_arm_elf (abfd))
8074 return TRUE;
8075
8076 /* We should have chosen a fix type by the time we get here. */
8077 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
8078
8079 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
8080 return TRUE;
8081
8082 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8083 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8084 return TRUE;
8085
8086 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8087 {
8088 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
8089 struct _arm_elf_section_data *sec_data;
8090
8091 /* If we don't have executable progbits, we're not interested in this
8092 section. Also skip if section is to be excluded. */
8093 if (elf_section_type (sec) != SHT_PROGBITS
8094 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8095 || (sec->flags & SEC_EXCLUDE) != 0
8096 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8097 || sec->output_section == bfd_abs_section_ptr
8098 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
8099 continue;
8100
8101 sec_data = elf32_arm_section_data (sec);
8102
8103 if (sec_data->mapcount == 0)
8104 continue;
8105
8106 if (elf_section_data (sec)->this_hdr.contents != NULL)
8107 contents = elf_section_data (sec)->this_hdr.contents;
8108 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8109 goto error_return;
8110
8111 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8112 elf32_arm_compare_mapping);
8113
8114 for (span = 0; span < sec_data->mapcount; span++)
8115 {
8116 unsigned int span_start = sec_data->map[span].vma;
8117 unsigned int span_end = (span == sec_data->mapcount - 1)
8118 ? sec->size : sec_data->map[span + 1].vma;
8119 char span_type = sec_data->map[span].type;
8120
8121 /* FIXME: Only ARM mode is supported at present. We may need to
8122 support Thumb-2 mode also at some point. */
8123 if (span_type != 'a')
8124 continue;
8125
8126 for (i = span_start; i < span_end;)
8127 {
8128 unsigned int next_i = i + 4;
8129 unsigned int insn = bfd_big_endian (abfd)
8130 ? (contents[i] << 24)
8131 | (contents[i + 1] << 16)
8132 | (contents[i + 2] << 8)
8133 | contents[i + 3]
8134 : (contents[i + 3] << 24)
8135 | (contents[i + 2] << 16)
8136 | (contents[i + 1] << 8)
8137 | contents[i];
8138 unsigned int writemask = 0;
8139 enum bfd_arm_vfp11_pipe vpipe;
8140
8141 switch (state)
8142 {
8143 case 0:
8144 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
8145 &numregs);
8146 /* I'm assuming the VFP11 erratum can trigger with denorm
8147 operands on either the FMAC or the DS pipeline. This might
8148 lead to slightly overenthusiastic veneer insertion. */
8149 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
8150 {
8151 state = use_vector ? 1 : 2;
8152 first_fmac = i;
8153 veneer_of_insn = insn;
8154 }
8155 break;
8156
8157 case 1:
8158 {
8159 int other_regs[3], other_numregs;
8160 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8161 other_regs,
8162 &other_numregs);
8163 if (vpipe != VFP11_BAD
8164 && bfd_arm_vfp11_antidependency (writemask, regs,
8165 numregs))
8166 state = 3;
8167 else
8168 state = 2;
8169 }
8170 break;
8171
8172 case 2:
8173 {
8174 int other_regs[3], other_numregs;
8175 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8176 other_regs,
8177 &other_numregs);
8178 if (vpipe != VFP11_BAD
8179 && bfd_arm_vfp11_antidependency (writemask, regs,
8180 numregs))
8181 state = 3;
8182 else
8183 {
8184 state = 0;
8185 next_i = first_fmac + 4;
8186 }
8187 }
8188 break;
8189
8190 case 3:
8191 abort (); /* Should be unreachable. */
8192 }
8193
8194 if (state == 3)
8195 {
8196 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
8197 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
8198
8199 elf32_arm_section_data (sec)->erratumcount += 1;
8200
8201 newerr->u.b.vfp_insn = veneer_of_insn;
8202
8203 switch (span_type)
8204 {
8205 case 'a':
8206 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
8207 break;
8208
8209 default:
8210 abort ();
8211 }
8212
8213 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
8214 first_fmac);
8215
8216 newerr->vma = -1;
8217
8218 newerr->next = sec_data->erratumlist;
8219 sec_data->erratumlist = newerr;
8220
8221 state = 0;
8222 }
8223
8224 i = next_i;
8225 }
8226 }
8227
8228 if (contents != NULL
8229 && elf_section_data (sec)->this_hdr.contents != contents)
8230 free (contents);
8231 contents = NULL;
8232 }
8233
8234 return TRUE;
8235
8236 error_return:
8237 if (contents != NULL
8238 && elf_section_data (sec)->this_hdr.contents != contents)
8239 free (contents);
8240
8241 return FALSE;
8242 }
8243
8244 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
8245 after sections have been laid out, using specially-named symbols. */
8246
8247 void
8248 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
8249 struct bfd_link_info *link_info)
8250 {
8251 asection *sec;
8252 struct elf32_arm_link_hash_table *globals;
8253 char *tmp_name;
8254
8255 if (bfd_link_relocatable (link_info))
8256 return;
8257
8258 /* Skip if this bfd does not correspond to an ELF image. */
8259 if (! is_arm_elf (abfd))
8260 return;
8261
8262 globals = elf32_arm_hash_table (link_info);
8263 if (globals == NULL)
8264 return;
8265
8266 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8267 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
8268
8269 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8270 {
8271 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8272 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
8273
8274 for (; errnode != NULL; errnode = errnode->next)
8275 {
8276 struct elf_link_hash_entry *myh;
8277 bfd_vma vma;
8278
8279 switch (errnode->type)
8280 {
8281 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
8282 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
8283 /* Find veneer symbol. */
8284 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
8285 errnode->u.b.veneer->u.v.id);
8286
8287 myh = elf_link_hash_lookup
8288 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8289
8290 if (myh == NULL)
8291 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
8292 "`%s'"), abfd, tmp_name);
8293
8294 vma = myh->root.u.def.section->output_section->vma
8295 + myh->root.u.def.section->output_offset
8296 + myh->root.u.def.value;
8297
8298 errnode->u.b.veneer->vma = vma;
8299 break;
8300
8301 case VFP11_ERRATUM_ARM_VENEER:
8302 case VFP11_ERRATUM_THUMB_VENEER:
8303 /* Find return location. */
8304 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
8305 errnode->u.v.id);
8306
8307 myh = elf_link_hash_lookup
8308 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8309
8310 if (myh == NULL)
8311 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
8312 "`%s'"), abfd, tmp_name);
8313
8314 vma = myh->root.u.def.section->output_section->vma
8315 + myh->root.u.def.section->output_offset
8316 + myh->root.u.def.value;
8317
8318 errnode->u.v.branch->vma = vma;
8319 break;
8320
8321 default:
8322 abort ();
8323 }
8324 }
8325 }
8326
8327 free (tmp_name);
8328 }
8329
8330 /* Find virtual-memory addresses for STM32L4XX erratum veneers and
8331 return locations after sections have been laid out, using
8332 specially-named symbols. */
8333
8334 void
8335 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd *abfd,
8336 struct bfd_link_info *link_info)
8337 {
8338 asection *sec;
8339 struct elf32_arm_link_hash_table *globals;
8340 char *tmp_name;
8341
8342 if (bfd_link_relocatable (link_info))
8343 return;
8344
8345 /* Skip if this bfd does not correspond to an ELF image. */
8346 if (! is_arm_elf (abfd))
8347 return;
8348
8349 globals = elf32_arm_hash_table (link_info);
8350 if (globals == NULL)
8351 return;
8352
8353 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8354 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
8355
8356 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8357 {
8358 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8359 elf32_stm32l4xx_erratum_list *errnode = sec_data->stm32l4xx_erratumlist;
8360
8361 for (; errnode != NULL; errnode = errnode->next)
8362 {
8363 struct elf_link_hash_entry *myh;
8364 bfd_vma vma;
8365
8366 switch (errnode->type)
8367 {
8368 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
8369 /* Find veneer symbol. */
8370 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
8371 errnode->u.b.veneer->u.v.id);
8372
8373 myh = elf_link_hash_lookup
8374 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8375
8376 if (myh == NULL)
8377 (*_bfd_error_handler) (_("%B: unable to find STM32L4XX veneer "
8378 "`%s'"), abfd, tmp_name);
8379
8380 vma = myh->root.u.def.section->output_section->vma
8381 + myh->root.u.def.section->output_offset
8382 + myh->root.u.def.value;
8383
8384 errnode->u.b.veneer->vma = vma;
8385 break;
8386
8387 case STM32L4XX_ERRATUM_VENEER:
8388 /* Find return location. */
8389 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
8390 errnode->u.v.id);
8391
8392 myh = elf_link_hash_lookup
8393 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8394
8395 if (myh == NULL)
8396 (*_bfd_error_handler) (_("%B: unable to find STM32L4XX veneer "
8397 "`%s'"), abfd, tmp_name);
8398
8399 vma = myh->root.u.def.section->output_section->vma
8400 + myh->root.u.def.section->output_offset
8401 + myh->root.u.def.value;
8402
8403 errnode->u.v.branch->vma = vma;
8404 break;
8405
8406 default:
8407 abort ();
8408 }
8409 }
8410 }
8411
8412 free (tmp_name);
8413 }
8414
8415 static inline bfd_boolean
8416 is_thumb2_ldmia (const insn32 insn)
8417 {
8418 /* Encoding T2: LDM<c>.W <Rn>{!},<registers>
8419 1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll. */
8420 return (insn & 0xffd02000) == 0xe8900000;
8421 }
8422
8423 static inline bfd_boolean
8424 is_thumb2_ldmdb (const insn32 insn)
8425 {
8426 /* Encoding T1: LDMDB<c> <Rn>{!},<registers>
8427 1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll. */
8428 return (insn & 0xffd02000) == 0xe9100000;
8429 }
8430
8431 static inline bfd_boolean
8432 is_thumb2_vldm (const insn32 insn)
8433 {
8434 /* A6.5 Extension register load or store instruction
8435 A7.7.229
8436 We look for SP 32-bit and DP 64-bit registers.
8437 Encoding T1 VLDM{mode}<c> <Rn>{!}, <list>
8438 <list> is consecutive 64-bit registers
8439 1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii
8440 Encoding T2 VLDM{mode}<c> <Rn>{!}, <list>
8441 <list> is consecutive 32-bit registers
8442 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii
8443 if P==0 && U==1 && W==1 && Rn=1101 VPOP
8444 if PUW=010 || PUW=011 || PUW=101 VLDM. */
8445 return
8446 (((insn & 0xfe100f00) == 0xec100b00) ||
8447 ((insn & 0xfe100f00) == 0xec100a00))
8448 && /* (IA without !). */
8449 (((((insn << 7) >> 28) & 0xd) == 0x4)
8450 /* (IA with !), includes VPOP (when reg number is SP). */
8451 || ((((insn << 7) >> 28) & 0xd) == 0x5)
8452 /* (DB with !). */
8453 || ((((insn << 7) >> 28) & 0xd) == 0x9));
8454 }
8455
8456 /* STM STM32L4XX erratum : This function assumes that it receives an LDM or
8457 VLDM opcode and:
8458 - computes the number and the mode of memory accesses
8459 - decides if the replacement should be done:
8460 . replaces only if > 8-word accesses
8461 . or (testing purposes only) replaces all accesses. */
8462
8463 static bfd_boolean
8464 stm32l4xx_need_create_replacing_stub (const insn32 insn,
8465 bfd_arm_stm32l4xx_fix stm32l4xx_fix)
8466 {
8467 int nb_words = 0;
8468
8469 /* The field encoding the register list is the same for both LDMIA
8470 and LDMDB encodings. */
8471 if (is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn))
8472 nb_words = popcount (insn & 0x0000ffff);
8473 else if (is_thumb2_vldm (insn))
8474 nb_words = (insn & 0xff);
8475
8476 /* DEFAULT mode accounts for the real bug condition situation,
8477 ALL mode inserts stubs for each LDM/VLDM instruction (testing). */
8478 return
8479 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_DEFAULT) ? nb_words > 8 :
8480 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_ALL) ? TRUE : FALSE;
8481 }
8482
8483 /* Look for potentially-troublesome code sequences which might trigger
8484 the STM STM32L4XX erratum. */
8485
8486 bfd_boolean
8487 bfd_elf32_arm_stm32l4xx_erratum_scan (bfd *abfd,
8488 struct bfd_link_info *link_info)
8489 {
8490 asection *sec;
8491 bfd_byte *contents = NULL;
8492 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8493
8494 if (globals == NULL)
8495 return FALSE;
8496
8497 /* If we are only performing a partial link do not bother
8498 to construct any glue. */
8499 if (bfd_link_relocatable (link_info))
8500 return TRUE;
8501
8502 /* Skip if this bfd does not correspond to an ELF image. */
8503 if (! is_arm_elf (abfd))
8504 return TRUE;
8505
8506 if (globals->stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_NONE)
8507 return TRUE;
8508
8509 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8510 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8511 return TRUE;
8512
8513 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8514 {
8515 unsigned int i, span;
8516 struct _arm_elf_section_data *sec_data;
8517
8518 /* If we don't have executable progbits, we're not interested in this
8519 section. Also skip if section is to be excluded. */
8520 if (elf_section_type (sec) != SHT_PROGBITS
8521 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8522 || (sec->flags & SEC_EXCLUDE) != 0
8523 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8524 || sec->output_section == bfd_abs_section_ptr
8525 || strcmp (sec->name, STM32L4XX_ERRATUM_VENEER_SECTION_NAME) == 0)
8526 continue;
8527
8528 sec_data = elf32_arm_section_data (sec);
8529
8530 if (sec_data->mapcount == 0)
8531 continue;
8532
8533 if (elf_section_data (sec)->this_hdr.contents != NULL)
8534 contents = elf_section_data (sec)->this_hdr.contents;
8535 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8536 goto error_return;
8537
8538 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8539 elf32_arm_compare_mapping);
8540
8541 for (span = 0; span < sec_data->mapcount; span++)
8542 {
8543 unsigned int span_start = sec_data->map[span].vma;
8544 unsigned int span_end = (span == sec_data->mapcount - 1)
8545 ? sec->size : sec_data->map[span + 1].vma;
8546 char span_type = sec_data->map[span].type;
8547 int itblock_current_pos = 0;
8548
8549 /* Only Thumb2 mode need be supported with this CM4 specific
8550 code, we should not encounter any arm mode eg span_type
8551 != 'a'. */
8552 if (span_type != 't')
8553 continue;
8554
8555 for (i = span_start; i < span_end;)
8556 {
8557 unsigned int insn = bfd_get_16 (abfd, &contents[i]);
8558 bfd_boolean insn_32bit = FALSE;
8559 bfd_boolean is_ldm = FALSE;
8560 bfd_boolean is_vldm = FALSE;
8561 bfd_boolean is_not_last_in_it_block = FALSE;
8562
8563 /* The first 16-bits of all 32-bit thumb2 instructions start
8564 with opcode[15..13]=0b111 and the encoded op1 can be anything
8565 except opcode[12..11]!=0b00.
8566 See 32-bit Thumb instruction encoding. */
8567 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
8568 insn_32bit = TRUE;
8569
8570 /* Compute the predicate that tells if the instruction
8571 is concerned by the IT block
8572 - Creates an error if there is a ldm that is not
8573 last in the IT block thus cannot be replaced
8574 - Otherwise we can create a branch at the end of the
8575 IT block, it will be controlled naturally by IT
8576 with the proper pseudo-predicate
8577 - So the only interesting predicate is the one that
8578 tells that we are not on the last item of an IT
8579 block. */
8580 if (itblock_current_pos != 0)
8581 is_not_last_in_it_block = !!--itblock_current_pos;
8582
8583 if (insn_32bit)
8584 {
8585 /* Load the rest of the insn (in manual-friendly order). */
8586 insn = (insn << 16) | bfd_get_16 (abfd, &contents[i + 2]);
8587 is_ldm = is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn);
8588 is_vldm = is_thumb2_vldm (insn);
8589
8590 /* Veneers are created for (v)ldm depending on
8591 option flags and memory accesses conditions; but
8592 if the instruction is not the last instruction of
8593 an IT block, we cannot create a jump there, so we
8594 bail out. */
8595 if ((is_ldm || is_vldm)
8596 && stm32l4xx_need_create_replacing_stub
8597 (insn, globals->stm32l4xx_fix))
8598 {
8599 if (is_not_last_in_it_block)
8600 {
8601 (*_bfd_error_handler)
8602 /* Note - overlong line used here to allow for translation. */
8603 (_("\
8604 %B(%A+0x%lx): error: multiple load detected in non-last IT block instruction : STM32L4XX veneer cannot be generated.\n"
8605 "Use gcc option -mrestrict-it to generate only one instruction per IT block.\n"),
8606 abfd, sec, (long)i);
8607 }
8608 else
8609 {
8610 elf32_stm32l4xx_erratum_list *newerr =
8611 (elf32_stm32l4xx_erratum_list *)
8612 bfd_zmalloc
8613 (sizeof (elf32_stm32l4xx_erratum_list));
8614
8615 elf32_arm_section_data (sec)
8616 ->stm32l4xx_erratumcount += 1;
8617 newerr->u.b.insn = insn;
8618 /* We create only thumb branches. */
8619 newerr->type =
8620 STM32L4XX_ERRATUM_BRANCH_TO_VENEER;
8621 record_stm32l4xx_erratum_veneer
8622 (link_info, newerr, abfd, sec,
8623 i,
8624 is_ldm ?
8625 STM32L4XX_ERRATUM_LDM_VENEER_SIZE:
8626 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
8627 newerr->vma = -1;
8628 newerr->next = sec_data->stm32l4xx_erratumlist;
8629 sec_data->stm32l4xx_erratumlist = newerr;
8630 }
8631 }
8632 }
8633 else
8634 {
8635 /* A7.7.37 IT p208
8636 IT blocks are only encoded in T1
8637 Encoding T1: IT{x{y{z}}} <firstcond>
8638 1 0 1 1 - 1 1 1 1 - firstcond - mask
8639 if mask = '0000' then see 'related encodings'
8640 We don't deal with UNPREDICTABLE, just ignore these.
8641 There can be no nested IT blocks so an IT block
8642 is naturally a new one for which it is worth
8643 computing its size. */
8644 bfd_boolean is_newitblock = ((insn & 0xff00) == 0xbf00)
8645 && ((insn & 0x000f) != 0x0000);
8646 /* If we have a new IT block we compute its size. */
8647 if (is_newitblock)
8648 {
8649 /* Compute the number of instructions controlled
8650 by the IT block, it will be used to decide
8651 whether we are inside an IT block or not. */
8652 unsigned int mask = insn & 0x000f;
8653 itblock_current_pos = 4 - ctz (mask);
8654 }
8655 }
8656
8657 i += insn_32bit ? 4 : 2;
8658 }
8659 }
8660
8661 if (contents != NULL
8662 && elf_section_data (sec)->this_hdr.contents != contents)
8663 free (contents);
8664 contents = NULL;
8665 }
8666
8667 return TRUE;
8668
8669 error_return:
8670 if (contents != NULL
8671 && elf_section_data (sec)->this_hdr.contents != contents)
8672 free (contents);
8673
8674 return FALSE;
8675 }
8676
8677 /* Set target relocation values needed during linking. */
8678
8679 void
8680 bfd_elf32_arm_set_target_params (struct bfd *output_bfd,
8681 struct bfd_link_info *link_info,
8682 struct elf32_arm_params *params)
8683 {
8684 struct elf32_arm_link_hash_table *globals;
8685
8686 globals = elf32_arm_hash_table (link_info);
8687 if (globals == NULL)
8688 return;
8689
8690 globals->target1_is_rel = params->target1_is_rel;
8691 if (strcmp (params->target2_type, "rel") == 0)
8692 globals->target2_reloc = R_ARM_REL32;
8693 else if (strcmp (params->target2_type, "abs") == 0)
8694 globals->target2_reloc = R_ARM_ABS32;
8695 else if (strcmp (params->target2_type, "got-rel") == 0)
8696 globals->target2_reloc = R_ARM_GOT_PREL;
8697 else
8698 {
8699 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
8700 params->target2_type);
8701 }
8702 globals->fix_v4bx = params->fix_v4bx;
8703 globals->use_blx |= params->use_blx;
8704 globals->vfp11_fix = params->vfp11_denorm_fix;
8705 globals->stm32l4xx_fix = params->stm32l4xx_fix;
8706 globals->pic_veneer = params->pic_veneer;
8707 globals->fix_cortex_a8 = params->fix_cortex_a8;
8708 globals->fix_arm1176 = params->fix_arm1176;
8709 globals->cmse_implib = params->cmse_implib;
8710 globals->in_implib_bfd = params->in_implib_bfd;
8711
8712 BFD_ASSERT (is_arm_elf (output_bfd));
8713 elf_arm_tdata (output_bfd)->no_enum_size_warning
8714 = params->no_enum_size_warning;
8715 elf_arm_tdata (output_bfd)->no_wchar_size_warning
8716 = params->no_wchar_size_warning;
8717 }
8718
8719 /* Replace the target offset of a Thumb bl or b.w instruction. */
8720
8721 static void
8722 insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
8723 {
8724 bfd_vma upper;
8725 bfd_vma lower;
8726 int reloc_sign;
8727
8728 BFD_ASSERT ((offset & 1) == 0);
8729
8730 upper = bfd_get_16 (abfd, insn);
8731 lower = bfd_get_16 (abfd, insn + 2);
8732 reloc_sign = (offset < 0) ? 1 : 0;
8733 upper = (upper & ~(bfd_vma) 0x7ff)
8734 | ((offset >> 12) & 0x3ff)
8735 | (reloc_sign << 10);
8736 lower = (lower & ~(bfd_vma) 0x2fff)
8737 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
8738 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
8739 | ((offset >> 1) & 0x7ff);
8740 bfd_put_16 (abfd, upper, insn);
8741 bfd_put_16 (abfd, lower, insn + 2);
8742 }
8743
8744 /* Thumb code calling an ARM function. */
8745
8746 static int
8747 elf32_thumb_to_arm_stub (struct bfd_link_info * info,
8748 const char * name,
8749 bfd * input_bfd,
8750 bfd * output_bfd,
8751 asection * input_section,
8752 bfd_byte * hit_data,
8753 asection * sym_sec,
8754 bfd_vma offset,
8755 bfd_signed_vma addend,
8756 bfd_vma val,
8757 char **error_message)
8758 {
8759 asection * s = 0;
8760 bfd_vma my_offset;
8761 long int ret_offset;
8762 struct elf_link_hash_entry * myh;
8763 struct elf32_arm_link_hash_table * globals;
8764
8765 myh = find_thumb_glue (info, name, error_message);
8766 if (myh == NULL)
8767 return FALSE;
8768
8769 globals = elf32_arm_hash_table (info);
8770 BFD_ASSERT (globals != NULL);
8771 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
8772
8773 my_offset = myh->root.u.def.value;
8774
8775 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
8776 THUMB2ARM_GLUE_SECTION_NAME);
8777
8778 BFD_ASSERT (s != NULL);
8779 BFD_ASSERT (s->contents != NULL);
8780 BFD_ASSERT (s->output_section != NULL);
8781
8782 if ((my_offset & 0x01) == 0x01)
8783 {
8784 if (sym_sec != NULL
8785 && sym_sec->owner != NULL
8786 && !INTERWORK_FLAG (sym_sec->owner))
8787 {
8788 (*_bfd_error_handler)
8789 (_("%B(%s): warning: interworking not enabled.\n"
8790 " first occurrence: %B: Thumb call to ARM"),
8791 sym_sec->owner, input_bfd, name);
8792
8793 return FALSE;
8794 }
8795
8796 --my_offset;
8797 myh->root.u.def.value = my_offset;
8798
8799 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
8800 s->contents + my_offset);
8801
8802 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
8803 s->contents + my_offset + 2);
8804
8805 ret_offset =
8806 /* Address of destination of the stub. */
8807 ((bfd_signed_vma) val)
8808 - ((bfd_signed_vma)
8809 /* Offset from the start of the current section
8810 to the start of the stubs. */
8811 (s->output_offset
8812 /* Offset of the start of this stub from the start of the stubs. */
8813 + my_offset
8814 /* Address of the start of the current section. */
8815 + s->output_section->vma)
8816 /* The branch instruction is 4 bytes into the stub. */
8817 + 4
8818 /* ARM branches work from the pc of the instruction + 8. */
8819 + 8);
8820
8821 put_arm_insn (globals, output_bfd,
8822 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
8823 s->contents + my_offset + 4);
8824 }
8825
8826 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
8827
8828 /* Now go back and fix up the original BL insn to point to here. */
8829 ret_offset =
8830 /* Address of where the stub is located. */
8831 (s->output_section->vma + s->output_offset + my_offset)
8832 /* Address of where the BL is located. */
8833 - (input_section->output_section->vma + input_section->output_offset
8834 + offset)
8835 /* Addend in the relocation. */
8836 - addend
8837 /* Biassing for PC-relative addressing. */
8838 - 8;
8839
8840 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
8841
8842 return TRUE;
8843 }
8844
8845 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
8846
8847 static struct elf_link_hash_entry *
8848 elf32_arm_create_thumb_stub (struct bfd_link_info * info,
8849 const char * name,
8850 bfd * input_bfd,
8851 bfd * output_bfd,
8852 asection * sym_sec,
8853 bfd_vma val,
8854 asection * s,
8855 char ** error_message)
8856 {
8857 bfd_vma my_offset;
8858 long int ret_offset;
8859 struct elf_link_hash_entry * myh;
8860 struct elf32_arm_link_hash_table * globals;
8861
8862 myh = find_arm_glue (info, name, error_message);
8863 if (myh == NULL)
8864 return NULL;
8865
8866 globals = elf32_arm_hash_table (info);
8867 BFD_ASSERT (globals != NULL);
8868 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
8869
8870 my_offset = myh->root.u.def.value;
8871
8872 if ((my_offset & 0x01) == 0x01)
8873 {
8874 if (sym_sec != NULL
8875 && sym_sec->owner != NULL
8876 && !INTERWORK_FLAG (sym_sec->owner))
8877 {
8878 (*_bfd_error_handler)
8879 (_("%B(%s): warning: interworking not enabled.\n"
8880 " first occurrence: %B: arm call to thumb"),
8881 sym_sec->owner, input_bfd, name);
8882 }
8883
8884 --my_offset;
8885 myh->root.u.def.value = my_offset;
8886
8887 if (bfd_link_pic (info)
8888 || globals->root.is_relocatable_executable
8889 || globals->pic_veneer)
8890 {
8891 /* For relocatable objects we can't use absolute addresses,
8892 so construct the address from a relative offset. */
8893 /* TODO: If the offset is small it's probably worth
8894 constructing the address with adds. */
8895 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
8896 s->contents + my_offset);
8897 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
8898 s->contents + my_offset + 4);
8899 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
8900 s->contents + my_offset + 8);
8901 /* Adjust the offset by 4 for the position of the add,
8902 and 8 for the pipeline offset. */
8903 ret_offset = (val - (s->output_offset
8904 + s->output_section->vma
8905 + my_offset + 12))
8906 | 1;
8907 bfd_put_32 (output_bfd, ret_offset,
8908 s->contents + my_offset + 12);
8909 }
8910 else if (globals->use_blx)
8911 {
8912 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
8913 s->contents + my_offset);
8914
8915 /* It's a thumb address. Add the low order bit. */
8916 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
8917 s->contents + my_offset + 4);
8918 }
8919 else
8920 {
8921 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
8922 s->contents + my_offset);
8923
8924 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
8925 s->contents + my_offset + 4);
8926
8927 /* It's a thumb address. Add the low order bit. */
8928 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
8929 s->contents + my_offset + 8);
8930
8931 my_offset += 12;
8932 }
8933 }
8934
8935 BFD_ASSERT (my_offset <= globals->arm_glue_size);
8936
8937 return myh;
8938 }
8939
8940 /* Arm code calling a Thumb function. */
8941
8942 static int
8943 elf32_arm_to_thumb_stub (struct bfd_link_info * info,
8944 const char * name,
8945 bfd * input_bfd,
8946 bfd * output_bfd,
8947 asection * input_section,
8948 bfd_byte * hit_data,
8949 asection * sym_sec,
8950 bfd_vma offset,
8951 bfd_signed_vma addend,
8952 bfd_vma val,
8953 char **error_message)
8954 {
8955 unsigned long int tmp;
8956 bfd_vma my_offset;
8957 asection * s;
8958 long int ret_offset;
8959 struct elf_link_hash_entry * myh;
8960 struct elf32_arm_link_hash_table * globals;
8961
8962 globals = elf32_arm_hash_table (info);
8963 BFD_ASSERT (globals != NULL);
8964 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
8965
8966 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
8967 ARM2THUMB_GLUE_SECTION_NAME);
8968 BFD_ASSERT (s != NULL);
8969 BFD_ASSERT (s->contents != NULL);
8970 BFD_ASSERT (s->output_section != NULL);
8971
8972 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
8973 sym_sec, val, s, error_message);
8974 if (!myh)
8975 return FALSE;
8976
8977 my_offset = myh->root.u.def.value;
8978 tmp = bfd_get_32 (input_bfd, hit_data);
8979 tmp = tmp & 0xFF000000;
8980
8981 /* Somehow these are both 4 too far, so subtract 8. */
8982 ret_offset = (s->output_offset
8983 + my_offset
8984 + s->output_section->vma
8985 - (input_section->output_offset
8986 + input_section->output_section->vma
8987 + offset + addend)
8988 - 8);
8989
8990 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
8991
8992 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
8993
8994 return TRUE;
8995 }
8996
8997 /* Populate Arm stub for an exported Thumb function. */
8998
8999 static bfd_boolean
9000 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
9001 {
9002 struct bfd_link_info * info = (struct bfd_link_info *) inf;
9003 asection * s;
9004 struct elf_link_hash_entry * myh;
9005 struct elf32_arm_link_hash_entry *eh;
9006 struct elf32_arm_link_hash_table * globals;
9007 asection *sec;
9008 bfd_vma val;
9009 char *error_message;
9010
9011 eh = elf32_arm_hash_entry (h);
9012 /* Allocate stubs for exported Thumb functions on v4t. */
9013 if (eh->export_glue == NULL)
9014 return TRUE;
9015
9016 globals = elf32_arm_hash_table (info);
9017 BFD_ASSERT (globals != NULL);
9018 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9019
9020 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9021 ARM2THUMB_GLUE_SECTION_NAME);
9022 BFD_ASSERT (s != NULL);
9023 BFD_ASSERT (s->contents != NULL);
9024 BFD_ASSERT (s->output_section != NULL);
9025
9026 sec = eh->export_glue->root.u.def.section;
9027
9028 BFD_ASSERT (sec->output_section != NULL);
9029
9030 val = eh->export_glue->root.u.def.value + sec->output_offset
9031 + sec->output_section->vma;
9032
9033 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
9034 h->root.u.def.section->owner,
9035 globals->obfd, sec, val, s,
9036 &error_message);
9037 BFD_ASSERT (myh);
9038 return TRUE;
9039 }
9040
9041 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
9042
9043 static bfd_vma
9044 elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
9045 {
9046 bfd_byte *p;
9047 bfd_vma glue_addr;
9048 asection *s;
9049 struct elf32_arm_link_hash_table *globals;
9050
9051 globals = elf32_arm_hash_table (info);
9052 BFD_ASSERT (globals != NULL);
9053 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9054
9055 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9056 ARM_BX_GLUE_SECTION_NAME);
9057 BFD_ASSERT (s != NULL);
9058 BFD_ASSERT (s->contents != NULL);
9059 BFD_ASSERT (s->output_section != NULL);
9060
9061 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
9062
9063 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
9064
9065 if ((globals->bx_glue_offset[reg] & 1) == 0)
9066 {
9067 p = s->contents + glue_addr;
9068 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
9069 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
9070 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
9071 globals->bx_glue_offset[reg] |= 1;
9072 }
9073
9074 return glue_addr + s->output_section->vma + s->output_offset;
9075 }
9076
9077 /* Generate Arm stubs for exported Thumb symbols. */
9078 static void
9079 elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
9080 struct bfd_link_info *link_info)
9081 {
9082 struct elf32_arm_link_hash_table * globals;
9083
9084 if (link_info == NULL)
9085 /* Ignore this if we are not called by the ELF backend linker. */
9086 return;
9087
9088 globals = elf32_arm_hash_table (link_info);
9089 if (globals == NULL)
9090 return;
9091
9092 /* If blx is available then exported Thumb symbols are OK and there is
9093 nothing to do. */
9094 if (globals->use_blx)
9095 return;
9096
9097 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
9098 link_info);
9099 }
9100
9101 /* Reserve space for COUNT dynamic relocations in relocation selection
9102 SRELOC. */
9103
9104 static void
9105 elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
9106 bfd_size_type count)
9107 {
9108 struct elf32_arm_link_hash_table *htab;
9109
9110 htab = elf32_arm_hash_table (info);
9111 BFD_ASSERT (htab->root.dynamic_sections_created);
9112 if (sreloc == NULL)
9113 abort ();
9114 sreloc->size += RELOC_SIZE (htab) * count;
9115 }
9116
9117 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
9118 dynamic, the relocations should go in SRELOC, otherwise they should
9119 go in the special .rel.iplt section. */
9120
9121 static void
9122 elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
9123 bfd_size_type count)
9124 {
9125 struct elf32_arm_link_hash_table *htab;
9126
9127 htab = elf32_arm_hash_table (info);
9128 if (!htab->root.dynamic_sections_created)
9129 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
9130 else
9131 {
9132 BFD_ASSERT (sreloc != NULL);
9133 sreloc->size += RELOC_SIZE (htab) * count;
9134 }
9135 }
9136
9137 /* Add relocation REL to the end of relocation section SRELOC. */
9138
9139 static void
9140 elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
9141 asection *sreloc, Elf_Internal_Rela *rel)
9142 {
9143 bfd_byte *loc;
9144 struct elf32_arm_link_hash_table *htab;
9145
9146 htab = elf32_arm_hash_table (info);
9147 if (!htab->root.dynamic_sections_created
9148 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
9149 sreloc = htab->root.irelplt;
9150 if (sreloc == NULL)
9151 abort ();
9152 loc = sreloc->contents;
9153 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
9154 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
9155 abort ();
9156 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
9157 }
9158
9159 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
9160 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
9161 to .plt. */
9162
9163 static void
9164 elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
9165 bfd_boolean is_iplt_entry,
9166 union gotplt_union *root_plt,
9167 struct arm_plt_info *arm_plt)
9168 {
9169 struct elf32_arm_link_hash_table *htab;
9170 asection *splt;
9171 asection *sgotplt;
9172
9173 htab = elf32_arm_hash_table (info);
9174
9175 if (is_iplt_entry)
9176 {
9177 splt = htab->root.iplt;
9178 sgotplt = htab->root.igotplt;
9179
9180 /* NaCl uses a special first entry in .iplt too. */
9181 if (htab->nacl_p && splt->size == 0)
9182 splt->size += htab->plt_header_size;
9183
9184 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
9185 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
9186 }
9187 else
9188 {
9189 splt = htab->root.splt;
9190 sgotplt = htab->root.sgotplt;
9191
9192 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
9193 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
9194
9195 /* If this is the first .plt entry, make room for the special
9196 first entry. */
9197 if (splt->size == 0)
9198 splt->size += htab->plt_header_size;
9199
9200 htab->next_tls_desc_index++;
9201 }
9202
9203 /* Allocate the PLT entry itself, including any leading Thumb stub. */
9204 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9205 splt->size += PLT_THUMB_STUB_SIZE;
9206 root_plt->offset = splt->size;
9207 splt->size += htab->plt_entry_size;
9208
9209 if (!htab->symbian_p)
9210 {
9211 /* We also need to make an entry in the .got.plt section, which
9212 will be placed in the .got section by the linker script. */
9213 if (is_iplt_entry)
9214 arm_plt->got_offset = sgotplt->size;
9215 else
9216 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
9217 sgotplt->size += 4;
9218 }
9219 }
9220
9221 static bfd_vma
9222 arm_movw_immediate (bfd_vma value)
9223 {
9224 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
9225 }
9226
9227 static bfd_vma
9228 arm_movt_immediate (bfd_vma value)
9229 {
9230 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
9231 }
9232
9233 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
9234 the entry lives in .iplt and resolves to (*SYM_VALUE)().
9235 Otherwise, DYNINDX is the index of the symbol in the dynamic
9236 symbol table and SYM_VALUE is undefined.
9237
9238 ROOT_PLT points to the offset of the PLT entry from the start of its
9239 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
9240 bookkeeping information.
9241
9242 Returns FALSE if there was a problem. */
9243
9244 static bfd_boolean
9245 elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
9246 union gotplt_union *root_plt,
9247 struct arm_plt_info *arm_plt,
9248 int dynindx, bfd_vma sym_value)
9249 {
9250 struct elf32_arm_link_hash_table *htab;
9251 asection *sgot;
9252 asection *splt;
9253 asection *srel;
9254 bfd_byte *loc;
9255 bfd_vma plt_index;
9256 Elf_Internal_Rela rel;
9257 bfd_vma plt_header_size;
9258 bfd_vma got_header_size;
9259
9260 htab = elf32_arm_hash_table (info);
9261
9262 /* Pick the appropriate sections and sizes. */
9263 if (dynindx == -1)
9264 {
9265 splt = htab->root.iplt;
9266 sgot = htab->root.igotplt;
9267 srel = htab->root.irelplt;
9268
9269 /* There are no reserved entries in .igot.plt, and no special
9270 first entry in .iplt. */
9271 got_header_size = 0;
9272 plt_header_size = 0;
9273 }
9274 else
9275 {
9276 splt = htab->root.splt;
9277 sgot = htab->root.sgotplt;
9278 srel = htab->root.srelplt;
9279
9280 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
9281 plt_header_size = htab->plt_header_size;
9282 }
9283 BFD_ASSERT (splt != NULL && srel != NULL);
9284
9285 /* Fill in the entry in the procedure linkage table. */
9286 if (htab->symbian_p)
9287 {
9288 BFD_ASSERT (dynindx >= 0);
9289 put_arm_insn (htab, output_bfd,
9290 elf32_arm_symbian_plt_entry[0],
9291 splt->contents + root_plt->offset);
9292 bfd_put_32 (output_bfd,
9293 elf32_arm_symbian_plt_entry[1],
9294 splt->contents + root_plt->offset + 4);
9295
9296 /* Fill in the entry in the .rel.plt section. */
9297 rel.r_offset = (splt->output_section->vma
9298 + splt->output_offset
9299 + root_plt->offset + 4);
9300 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
9301
9302 /* Get the index in the procedure linkage table which
9303 corresponds to this symbol. This is the index of this symbol
9304 in all the symbols for which we are making plt entries. The
9305 first entry in the procedure linkage table is reserved. */
9306 plt_index = ((root_plt->offset - plt_header_size)
9307 / htab->plt_entry_size);
9308 }
9309 else
9310 {
9311 bfd_vma got_offset, got_address, plt_address;
9312 bfd_vma got_displacement, initial_got_entry;
9313 bfd_byte * ptr;
9314
9315 BFD_ASSERT (sgot != NULL);
9316
9317 /* Get the offset into the .(i)got.plt table of the entry that
9318 corresponds to this function. */
9319 got_offset = (arm_plt->got_offset & -2);
9320
9321 /* Get the index in the procedure linkage table which
9322 corresponds to this symbol. This is the index of this symbol
9323 in all the symbols for which we are making plt entries.
9324 After the reserved .got.plt entries, all symbols appear in
9325 the same order as in .plt. */
9326 plt_index = (got_offset - got_header_size) / 4;
9327
9328 /* Calculate the address of the GOT entry. */
9329 got_address = (sgot->output_section->vma
9330 + sgot->output_offset
9331 + got_offset);
9332
9333 /* ...and the address of the PLT entry. */
9334 plt_address = (splt->output_section->vma
9335 + splt->output_offset
9336 + root_plt->offset);
9337
9338 ptr = splt->contents + root_plt->offset;
9339 if (htab->vxworks_p && bfd_link_pic (info))
9340 {
9341 unsigned int i;
9342 bfd_vma val;
9343
9344 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9345 {
9346 val = elf32_arm_vxworks_shared_plt_entry[i];
9347 if (i == 2)
9348 val |= got_address - sgot->output_section->vma;
9349 if (i == 5)
9350 val |= plt_index * RELOC_SIZE (htab);
9351 if (i == 2 || i == 5)
9352 bfd_put_32 (output_bfd, val, ptr);
9353 else
9354 put_arm_insn (htab, output_bfd, val, ptr);
9355 }
9356 }
9357 else if (htab->vxworks_p)
9358 {
9359 unsigned int i;
9360 bfd_vma val;
9361
9362 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9363 {
9364 val = elf32_arm_vxworks_exec_plt_entry[i];
9365 if (i == 2)
9366 val |= got_address;
9367 if (i == 4)
9368 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
9369 if (i == 5)
9370 val |= plt_index * RELOC_SIZE (htab);
9371 if (i == 2 || i == 5)
9372 bfd_put_32 (output_bfd, val, ptr);
9373 else
9374 put_arm_insn (htab, output_bfd, val, ptr);
9375 }
9376
9377 loc = (htab->srelplt2->contents
9378 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
9379
9380 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
9381 referencing the GOT for this PLT entry. */
9382 rel.r_offset = plt_address + 8;
9383 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
9384 rel.r_addend = got_offset;
9385 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9386 loc += RELOC_SIZE (htab);
9387
9388 /* Create the R_ARM_ABS32 relocation referencing the
9389 beginning of the PLT for this GOT entry. */
9390 rel.r_offset = got_address;
9391 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
9392 rel.r_addend = 0;
9393 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9394 }
9395 else if (htab->nacl_p)
9396 {
9397 /* Calculate the displacement between the PLT slot and the
9398 common tail that's part of the special initial PLT slot. */
9399 int32_t tail_displacement
9400 = ((splt->output_section->vma + splt->output_offset
9401 + ARM_NACL_PLT_TAIL_OFFSET)
9402 - (plt_address + htab->plt_entry_size + 4));
9403 BFD_ASSERT ((tail_displacement & 3) == 0);
9404 tail_displacement >>= 2;
9405
9406 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
9407 || (-tail_displacement & 0xff000000) == 0);
9408
9409 /* Calculate the displacement between the PLT slot and the entry
9410 in the GOT. The offset accounts for the value produced by
9411 adding to pc in the penultimate instruction of the PLT stub. */
9412 got_displacement = (got_address
9413 - (plt_address + htab->plt_entry_size));
9414
9415 /* NaCl does not support interworking at all. */
9416 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
9417
9418 put_arm_insn (htab, output_bfd,
9419 elf32_arm_nacl_plt_entry[0]
9420 | arm_movw_immediate (got_displacement),
9421 ptr + 0);
9422 put_arm_insn (htab, output_bfd,
9423 elf32_arm_nacl_plt_entry[1]
9424 | arm_movt_immediate (got_displacement),
9425 ptr + 4);
9426 put_arm_insn (htab, output_bfd,
9427 elf32_arm_nacl_plt_entry[2],
9428 ptr + 8);
9429 put_arm_insn (htab, output_bfd,
9430 elf32_arm_nacl_plt_entry[3]
9431 | (tail_displacement & 0x00ffffff),
9432 ptr + 12);
9433 }
9434 else if (using_thumb_only (htab))
9435 {
9436 /* PR ld/16017: Generate thumb only PLT entries. */
9437 if (!using_thumb2 (htab))
9438 {
9439 /* FIXME: We ought to be able to generate thumb-1 PLT
9440 instructions... */
9441 _bfd_error_handler (_("%B: Warning: thumb-1 mode PLT generation not currently supported"),
9442 output_bfd);
9443 return FALSE;
9444 }
9445
9446 /* Calculate the displacement between the PLT slot and the entry in
9447 the GOT. The 12-byte offset accounts for the value produced by
9448 adding to pc in the 3rd instruction of the PLT stub. */
9449 got_displacement = got_address - (plt_address + 12);
9450
9451 /* As we are using 32 bit instructions we have to use 'put_arm_insn'
9452 instead of 'put_thumb_insn'. */
9453 put_arm_insn (htab, output_bfd,
9454 elf32_thumb2_plt_entry[0]
9455 | ((got_displacement & 0x000000ff) << 16)
9456 | ((got_displacement & 0x00000700) << 20)
9457 | ((got_displacement & 0x00000800) >> 1)
9458 | ((got_displacement & 0x0000f000) >> 12),
9459 ptr + 0);
9460 put_arm_insn (htab, output_bfd,
9461 elf32_thumb2_plt_entry[1]
9462 | ((got_displacement & 0x00ff0000) )
9463 | ((got_displacement & 0x07000000) << 4)
9464 | ((got_displacement & 0x08000000) >> 17)
9465 | ((got_displacement & 0xf0000000) >> 28),
9466 ptr + 4);
9467 put_arm_insn (htab, output_bfd,
9468 elf32_thumb2_plt_entry[2],
9469 ptr + 8);
9470 put_arm_insn (htab, output_bfd,
9471 elf32_thumb2_plt_entry[3],
9472 ptr + 12);
9473 }
9474 else
9475 {
9476 /* Calculate the displacement between the PLT slot and the
9477 entry in the GOT. The eight-byte offset accounts for the
9478 value produced by adding to pc in the first instruction
9479 of the PLT stub. */
9480 got_displacement = got_address - (plt_address + 8);
9481
9482 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9483 {
9484 put_thumb_insn (htab, output_bfd,
9485 elf32_arm_plt_thumb_stub[0], ptr - 4);
9486 put_thumb_insn (htab, output_bfd,
9487 elf32_arm_plt_thumb_stub[1], ptr - 2);
9488 }
9489
9490 if (!elf32_arm_use_long_plt_entry)
9491 {
9492 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
9493
9494 put_arm_insn (htab, output_bfd,
9495 elf32_arm_plt_entry_short[0]
9496 | ((got_displacement & 0x0ff00000) >> 20),
9497 ptr + 0);
9498 put_arm_insn (htab, output_bfd,
9499 elf32_arm_plt_entry_short[1]
9500 | ((got_displacement & 0x000ff000) >> 12),
9501 ptr+ 4);
9502 put_arm_insn (htab, output_bfd,
9503 elf32_arm_plt_entry_short[2]
9504 | (got_displacement & 0x00000fff),
9505 ptr + 8);
9506 #ifdef FOUR_WORD_PLT
9507 bfd_put_32 (output_bfd, elf32_arm_plt_entry_short[3], ptr + 12);
9508 #endif
9509 }
9510 else
9511 {
9512 put_arm_insn (htab, output_bfd,
9513 elf32_arm_plt_entry_long[0]
9514 | ((got_displacement & 0xf0000000) >> 28),
9515 ptr + 0);
9516 put_arm_insn (htab, output_bfd,
9517 elf32_arm_plt_entry_long[1]
9518 | ((got_displacement & 0x0ff00000) >> 20),
9519 ptr + 4);
9520 put_arm_insn (htab, output_bfd,
9521 elf32_arm_plt_entry_long[2]
9522 | ((got_displacement & 0x000ff000) >> 12),
9523 ptr+ 8);
9524 put_arm_insn (htab, output_bfd,
9525 elf32_arm_plt_entry_long[3]
9526 | (got_displacement & 0x00000fff),
9527 ptr + 12);
9528 }
9529 }
9530
9531 /* Fill in the entry in the .rel(a).(i)plt section. */
9532 rel.r_offset = got_address;
9533 rel.r_addend = 0;
9534 if (dynindx == -1)
9535 {
9536 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
9537 The dynamic linker or static executable then calls SYM_VALUE
9538 to determine the correct run-time value of the .igot.plt entry. */
9539 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9540 initial_got_entry = sym_value;
9541 }
9542 else
9543 {
9544 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
9545 initial_got_entry = (splt->output_section->vma
9546 + splt->output_offset);
9547 }
9548
9549 /* Fill in the entry in the global offset table. */
9550 bfd_put_32 (output_bfd, initial_got_entry,
9551 sgot->contents + got_offset);
9552 }
9553
9554 if (dynindx == -1)
9555 elf32_arm_add_dynreloc (output_bfd, info, srel, &rel);
9556 else
9557 {
9558 loc = srel->contents + plt_index * RELOC_SIZE (htab);
9559 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9560 }
9561
9562 return TRUE;
9563 }
9564
9565 /* Some relocations map to different relocations depending on the
9566 target. Return the real relocation. */
9567
9568 static int
9569 arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
9570 int r_type)
9571 {
9572 switch (r_type)
9573 {
9574 case R_ARM_TARGET1:
9575 if (globals->target1_is_rel)
9576 return R_ARM_REL32;
9577 else
9578 return R_ARM_ABS32;
9579
9580 case R_ARM_TARGET2:
9581 return globals->target2_reloc;
9582
9583 default:
9584 return r_type;
9585 }
9586 }
9587
9588 /* Return the base VMA address which should be subtracted from real addresses
9589 when resolving @dtpoff relocation.
9590 This is PT_TLS segment p_vaddr. */
9591
9592 static bfd_vma
9593 dtpoff_base (struct bfd_link_info *info)
9594 {
9595 /* If tls_sec is NULL, we should have signalled an error already. */
9596 if (elf_hash_table (info)->tls_sec == NULL)
9597 return 0;
9598 return elf_hash_table (info)->tls_sec->vma;
9599 }
9600
9601 /* Return the relocation value for @tpoff relocation
9602 if STT_TLS virtual address is ADDRESS. */
9603
9604 static bfd_vma
9605 tpoff (struct bfd_link_info *info, bfd_vma address)
9606 {
9607 struct elf_link_hash_table *htab = elf_hash_table (info);
9608 bfd_vma base;
9609
9610 /* If tls_sec is NULL, we should have signalled an error already. */
9611 if (htab->tls_sec == NULL)
9612 return 0;
9613 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
9614 return address - htab->tls_sec->vma + base;
9615 }
9616
9617 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
9618 VALUE is the relocation value. */
9619
9620 static bfd_reloc_status_type
9621 elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
9622 {
9623 if (value > 0xfff)
9624 return bfd_reloc_overflow;
9625
9626 value |= bfd_get_32 (abfd, data) & 0xfffff000;
9627 bfd_put_32 (abfd, value, data);
9628 return bfd_reloc_ok;
9629 }
9630
9631 /* Handle TLS relaxations. Relaxing is possible for symbols that use
9632 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
9633 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
9634
9635 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
9636 is to then call final_link_relocate. Return other values in the
9637 case of error.
9638
9639 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
9640 the pre-relaxed code. It would be nice if the relocs were updated
9641 to match the optimization. */
9642
9643 static bfd_reloc_status_type
9644 elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
9645 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
9646 Elf_Internal_Rela *rel, unsigned long is_local)
9647 {
9648 unsigned long insn;
9649
9650 switch (ELF32_R_TYPE (rel->r_info))
9651 {
9652 default:
9653 return bfd_reloc_notsupported;
9654
9655 case R_ARM_TLS_GOTDESC:
9656 if (is_local)
9657 insn = 0;
9658 else
9659 {
9660 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
9661 if (insn & 1)
9662 insn -= 5; /* THUMB */
9663 else
9664 insn -= 8; /* ARM */
9665 }
9666 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
9667 return bfd_reloc_continue;
9668
9669 case R_ARM_THM_TLS_DESCSEQ:
9670 /* Thumb insn. */
9671 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
9672 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
9673 {
9674 if (is_local)
9675 /* nop */
9676 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
9677 }
9678 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
9679 {
9680 if (is_local)
9681 /* nop */
9682 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
9683 else
9684 /* ldr rx,[ry] */
9685 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
9686 }
9687 else if ((insn & 0xff87) == 0x4780) /* blx rx */
9688 {
9689 if (is_local)
9690 /* nop */
9691 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
9692 else
9693 /* mov r0, rx */
9694 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
9695 contents + rel->r_offset);
9696 }
9697 else
9698 {
9699 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
9700 /* It's a 32 bit instruction, fetch the rest of it for
9701 error generation. */
9702 insn = (insn << 16)
9703 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
9704 (*_bfd_error_handler)
9705 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"),
9706 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
9707 return bfd_reloc_notsupported;
9708 }
9709 break;
9710
9711 case R_ARM_TLS_DESCSEQ:
9712 /* arm insn. */
9713 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
9714 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
9715 {
9716 if (is_local)
9717 /* mov rx, ry */
9718 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
9719 contents + rel->r_offset);
9720 }
9721 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
9722 {
9723 if (is_local)
9724 /* nop */
9725 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
9726 else
9727 /* ldr rx,[ry] */
9728 bfd_put_32 (input_bfd, insn & 0xfffff000,
9729 contents + rel->r_offset);
9730 }
9731 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
9732 {
9733 if (is_local)
9734 /* nop */
9735 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
9736 else
9737 /* mov r0, rx */
9738 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
9739 contents + rel->r_offset);
9740 }
9741 else
9742 {
9743 (*_bfd_error_handler)
9744 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline"),
9745 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
9746 return bfd_reloc_notsupported;
9747 }
9748 break;
9749
9750 case R_ARM_TLS_CALL:
9751 /* GD->IE relaxation, turn the instruction into 'nop' or
9752 'ldr r0, [pc,r0]' */
9753 insn = is_local ? 0xe1a00000 : 0xe79f0000;
9754 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
9755 break;
9756
9757 case R_ARM_THM_TLS_CALL:
9758 /* GD->IE relaxation. */
9759 if (!is_local)
9760 /* add r0,pc; ldr r0, [r0] */
9761 insn = 0x44786800;
9762 else if (using_thumb2 (globals))
9763 /* nop.w */
9764 insn = 0xf3af8000;
9765 else
9766 /* nop; nop */
9767 insn = 0xbf00bf00;
9768
9769 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
9770 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
9771 break;
9772 }
9773 return bfd_reloc_ok;
9774 }
9775
9776 /* For a given value of n, calculate the value of G_n as required to
9777 deal with group relocations. We return it in the form of an
9778 encoded constant-and-rotation, together with the final residual. If n is
9779 specified as less than zero, then final_residual is filled with the
9780 input value and no further action is performed. */
9781
9782 static bfd_vma
9783 calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
9784 {
9785 int current_n;
9786 bfd_vma g_n;
9787 bfd_vma encoded_g_n = 0;
9788 bfd_vma residual = value; /* Also known as Y_n. */
9789
9790 for (current_n = 0; current_n <= n; current_n++)
9791 {
9792 int shift;
9793
9794 /* Calculate which part of the value to mask. */
9795 if (residual == 0)
9796 shift = 0;
9797 else
9798 {
9799 int msb;
9800
9801 /* Determine the most significant bit in the residual and
9802 align the resulting value to a 2-bit boundary. */
9803 for (msb = 30; msb >= 0; msb -= 2)
9804 if (residual & (3 << msb))
9805 break;
9806
9807 /* The desired shift is now (msb - 6), or zero, whichever
9808 is the greater. */
9809 shift = msb - 6;
9810 if (shift < 0)
9811 shift = 0;
9812 }
9813
9814 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
9815 g_n = residual & (0xff << shift);
9816 encoded_g_n = (g_n >> shift)
9817 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
9818
9819 /* Calculate the residual for the next time around. */
9820 residual &= ~g_n;
9821 }
9822
9823 *final_residual = residual;
9824
9825 return encoded_g_n;
9826 }
9827
9828 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
9829 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
9830
9831 static int
9832 identify_add_or_sub (bfd_vma insn)
9833 {
9834 int opcode = insn & 0x1e00000;
9835
9836 if (opcode == 1 << 23) /* ADD */
9837 return 1;
9838
9839 if (opcode == 1 << 22) /* SUB */
9840 return -1;
9841
9842 return 0;
9843 }
9844
9845 /* Perform a relocation as part of a final link. */
9846
9847 static bfd_reloc_status_type
9848 elf32_arm_final_link_relocate (reloc_howto_type * howto,
9849 bfd * input_bfd,
9850 bfd * output_bfd,
9851 asection * input_section,
9852 bfd_byte * contents,
9853 Elf_Internal_Rela * rel,
9854 bfd_vma value,
9855 struct bfd_link_info * info,
9856 asection * sym_sec,
9857 const char * sym_name,
9858 unsigned char st_type,
9859 enum arm_st_branch_type branch_type,
9860 struct elf_link_hash_entry * h,
9861 bfd_boolean * unresolved_reloc_p,
9862 char ** error_message)
9863 {
9864 unsigned long r_type = howto->type;
9865 unsigned long r_symndx;
9866 bfd_byte * hit_data = contents + rel->r_offset;
9867 bfd_vma * local_got_offsets;
9868 bfd_vma * local_tlsdesc_gotents;
9869 asection * sgot;
9870 asection * splt;
9871 asection * sreloc = NULL;
9872 asection * srelgot;
9873 bfd_vma addend;
9874 bfd_signed_vma signed_addend;
9875 unsigned char dynreloc_st_type;
9876 bfd_vma dynreloc_value;
9877 struct elf32_arm_link_hash_table * globals;
9878 struct elf32_arm_link_hash_entry *eh;
9879 union gotplt_union *root_plt;
9880 struct arm_plt_info *arm_plt;
9881 bfd_vma plt_offset;
9882 bfd_vma gotplt_offset;
9883 bfd_boolean has_iplt_entry;
9884
9885 globals = elf32_arm_hash_table (info);
9886 if (globals == NULL)
9887 return bfd_reloc_notsupported;
9888
9889 BFD_ASSERT (is_arm_elf (input_bfd));
9890
9891 /* Some relocation types map to different relocations depending on the
9892 target. We pick the right one here. */
9893 r_type = arm_real_reloc_type (globals, r_type);
9894
9895 /* It is possible to have linker relaxations on some TLS access
9896 models. Update our information here. */
9897 r_type = elf32_arm_tls_transition (info, r_type, h);
9898
9899 if (r_type != howto->type)
9900 howto = elf32_arm_howto_from_type (r_type);
9901
9902 eh = (struct elf32_arm_link_hash_entry *) h;
9903 sgot = globals->root.sgot;
9904 local_got_offsets = elf_local_got_offsets (input_bfd);
9905 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
9906
9907 if (globals->root.dynamic_sections_created)
9908 srelgot = globals->root.srelgot;
9909 else
9910 srelgot = NULL;
9911
9912 r_symndx = ELF32_R_SYM (rel->r_info);
9913
9914 if (globals->use_rel)
9915 {
9916 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
9917
9918 if (addend & ((howto->src_mask + 1) >> 1))
9919 {
9920 signed_addend = -1;
9921 signed_addend &= ~ howto->src_mask;
9922 signed_addend |= addend;
9923 }
9924 else
9925 signed_addend = addend;
9926 }
9927 else
9928 addend = signed_addend = rel->r_addend;
9929
9930 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
9931 are resolving a function call relocation. */
9932 if (using_thumb_only (globals)
9933 && (r_type == R_ARM_THM_CALL
9934 || r_type == R_ARM_THM_JUMP24)
9935 && branch_type == ST_BRANCH_TO_ARM)
9936 branch_type = ST_BRANCH_TO_THUMB;
9937
9938 /* Record the symbol information that should be used in dynamic
9939 relocations. */
9940 dynreloc_st_type = st_type;
9941 dynreloc_value = value;
9942 if (branch_type == ST_BRANCH_TO_THUMB)
9943 dynreloc_value |= 1;
9944
9945 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
9946 VALUE appropriately for relocations that we resolve at link time. */
9947 has_iplt_entry = FALSE;
9948 if (elf32_arm_get_plt_info (input_bfd, globals, eh, r_symndx, &root_plt,
9949 &arm_plt)
9950 && root_plt->offset != (bfd_vma) -1)
9951 {
9952 plt_offset = root_plt->offset;
9953 gotplt_offset = arm_plt->got_offset;
9954
9955 if (h == NULL || eh->is_iplt)
9956 {
9957 has_iplt_entry = TRUE;
9958 splt = globals->root.iplt;
9959
9960 /* Populate .iplt entries here, because not all of them will
9961 be seen by finish_dynamic_symbol. The lower bit is set if
9962 we have already populated the entry. */
9963 if (plt_offset & 1)
9964 plt_offset--;
9965 else
9966 {
9967 if (elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
9968 -1, dynreloc_value))
9969 root_plt->offset |= 1;
9970 else
9971 return bfd_reloc_notsupported;
9972 }
9973
9974 /* Static relocations always resolve to the .iplt entry. */
9975 st_type = STT_FUNC;
9976 value = (splt->output_section->vma
9977 + splt->output_offset
9978 + plt_offset);
9979 branch_type = ST_BRANCH_TO_ARM;
9980
9981 /* If there are non-call relocations that resolve to the .iplt
9982 entry, then all dynamic ones must too. */
9983 if (arm_plt->noncall_refcount != 0)
9984 {
9985 dynreloc_st_type = st_type;
9986 dynreloc_value = value;
9987 }
9988 }
9989 else
9990 /* We populate the .plt entry in finish_dynamic_symbol. */
9991 splt = globals->root.splt;
9992 }
9993 else
9994 {
9995 splt = NULL;
9996 plt_offset = (bfd_vma) -1;
9997 gotplt_offset = (bfd_vma) -1;
9998 }
9999
10000 switch (r_type)
10001 {
10002 case R_ARM_NONE:
10003 /* We don't need to find a value for this symbol. It's just a
10004 marker. */
10005 *unresolved_reloc_p = FALSE;
10006 return bfd_reloc_ok;
10007
10008 case R_ARM_ABS12:
10009 if (!globals->vxworks_p)
10010 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10011
10012 case R_ARM_PC24:
10013 case R_ARM_ABS32:
10014 case R_ARM_ABS32_NOI:
10015 case R_ARM_REL32:
10016 case R_ARM_REL32_NOI:
10017 case R_ARM_CALL:
10018 case R_ARM_JUMP24:
10019 case R_ARM_XPC25:
10020 case R_ARM_PREL31:
10021 case R_ARM_PLT32:
10022 /* Handle relocations which should use the PLT entry. ABS32/REL32
10023 will use the symbol's value, which may point to a PLT entry, but we
10024 don't need to handle that here. If we created a PLT entry, all
10025 branches in this object should go to it, except if the PLT is too
10026 far away, in which case a long branch stub should be inserted. */
10027 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
10028 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
10029 && r_type != R_ARM_CALL
10030 && r_type != R_ARM_JUMP24
10031 && r_type != R_ARM_PLT32)
10032 && plt_offset != (bfd_vma) -1)
10033 {
10034 /* If we've created a .plt section, and assigned a PLT entry
10035 to this function, it must either be a STT_GNU_IFUNC reference
10036 or not be known to bind locally. In other cases, we should
10037 have cleared the PLT entry by now. */
10038 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
10039
10040 value = (splt->output_section->vma
10041 + splt->output_offset
10042 + plt_offset);
10043 *unresolved_reloc_p = FALSE;
10044 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10045 contents, rel->r_offset, value,
10046 rel->r_addend);
10047 }
10048
10049 /* When generating a shared object or relocatable executable, these
10050 relocations are copied into the output file to be resolved at
10051 run time. */
10052 if ((bfd_link_pic (info)
10053 || globals->root.is_relocatable_executable)
10054 && (input_section->flags & SEC_ALLOC)
10055 && !(globals->vxworks_p
10056 && strcmp (input_section->output_section->name,
10057 ".tls_vars") == 0)
10058 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
10059 || !SYMBOL_CALLS_LOCAL (info, h))
10060 && !(input_bfd == globals->stub_bfd
10061 && strstr (input_section->name, STUB_SUFFIX))
10062 && (h == NULL
10063 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
10064 || h->root.type != bfd_link_hash_undefweak)
10065 && r_type != R_ARM_PC24
10066 && r_type != R_ARM_CALL
10067 && r_type != R_ARM_JUMP24
10068 && r_type != R_ARM_PREL31
10069 && r_type != R_ARM_PLT32)
10070 {
10071 Elf_Internal_Rela outrel;
10072 bfd_boolean skip, relocate;
10073
10074 if ((r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
10075 && !h->def_regular)
10076 {
10077 char *v = _("shared object");
10078
10079 if (bfd_link_executable (info))
10080 v = _("PIE executable");
10081
10082 (*_bfd_error_handler)
10083 (_("%B: relocation %s against external or undefined symbol `%s'"
10084 " can not be used when making a %s; recompile with -fPIC"), input_bfd,
10085 elf32_arm_howto_table_1[r_type].name, h->root.root.string, v);
10086 return bfd_reloc_notsupported;
10087 }
10088
10089 *unresolved_reloc_p = FALSE;
10090
10091 if (sreloc == NULL && globals->root.dynamic_sections_created)
10092 {
10093 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
10094 ! globals->use_rel);
10095
10096 if (sreloc == NULL)
10097 return bfd_reloc_notsupported;
10098 }
10099
10100 skip = FALSE;
10101 relocate = FALSE;
10102
10103 outrel.r_addend = addend;
10104 outrel.r_offset =
10105 _bfd_elf_section_offset (output_bfd, info, input_section,
10106 rel->r_offset);
10107 if (outrel.r_offset == (bfd_vma) -1)
10108 skip = TRUE;
10109 else if (outrel.r_offset == (bfd_vma) -2)
10110 skip = TRUE, relocate = TRUE;
10111 outrel.r_offset += (input_section->output_section->vma
10112 + input_section->output_offset);
10113
10114 if (skip)
10115 memset (&outrel, 0, sizeof outrel);
10116 else if (h != NULL
10117 && h->dynindx != -1
10118 && (!bfd_link_pic (info)
10119 || !SYMBOLIC_BIND (info, h)
10120 || !h->def_regular))
10121 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
10122 else
10123 {
10124 int symbol;
10125
10126 /* This symbol is local, or marked to become local. */
10127 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI);
10128 if (globals->symbian_p)
10129 {
10130 asection *osec;
10131
10132 /* On Symbian OS, the data segment and text segement
10133 can be relocated independently. Therefore, we
10134 must indicate the segment to which this
10135 relocation is relative. The BPABI allows us to
10136 use any symbol in the right segment; we just use
10137 the section symbol as it is convenient. (We
10138 cannot use the symbol given by "h" directly as it
10139 will not appear in the dynamic symbol table.)
10140
10141 Note that the dynamic linker ignores the section
10142 symbol value, so we don't subtract osec->vma
10143 from the emitted reloc addend. */
10144 if (sym_sec)
10145 osec = sym_sec->output_section;
10146 else
10147 osec = input_section->output_section;
10148 symbol = elf_section_data (osec)->dynindx;
10149 if (symbol == 0)
10150 {
10151 struct elf_link_hash_table *htab = elf_hash_table (info);
10152
10153 if ((osec->flags & SEC_READONLY) == 0
10154 && htab->data_index_section != NULL)
10155 osec = htab->data_index_section;
10156 else
10157 osec = htab->text_index_section;
10158 symbol = elf_section_data (osec)->dynindx;
10159 }
10160 BFD_ASSERT (symbol != 0);
10161 }
10162 else
10163 /* On SVR4-ish systems, the dynamic loader cannot
10164 relocate the text and data segments independently,
10165 so the symbol does not matter. */
10166 symbol = 0;
10167 if (dynreloc_st_type == STT_GNU_IFUNC)
10168 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
10169 to the .iplt entry. Instead, every non-call reference
10170 must use an R_ARM_IRELATIVE relocation to obtain the
10171 correct run-time address. */
10172 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
10173 else
10174 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
10175 if (globals->use_rel)
10176 relocate = TRUE;
10177 else
10178 outrel.r_addend += dynreloc_value;
10179 }
10180
10181 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
10182
10183 /* If this reloc is against an external symbol, we do not want to
10184 fiddle with the addend. Otherwise, we need to include the symbol
10185 value so that it becomes an addend for the dynamic reloc. */
10186 if (! relocate)
10187 return bfd_reloc_ok;
10188
10189 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10190 contents, rel->r_offset,
10191 dynreloc_value, (bfd_vma) 0);
10192 }
10193 else switch (r_type)
10194 {
10195 case R_ARM_ABS12:
10196 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10197
10198 case R_ARM_XPC25: /* Arm BLX instruction. */
10199 case R_ARM_CALL:
10200 case R_ARM_JUMP24:
10201 case R_ARM_PC24: /* Arm B/BL instruction. */
10202 case R_ARM_PLT32:
10203 {
10204 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
10205
10206 if (r_type == R_ARM_XPC25)
10207 {
10208 /* Check for Arm calling Arm function. */
10209 /* FIXME: Should we translate the instruction into a BL
10210 instruction instead ? */
10211 if (branch_type != ST_BRANCH_TO_THUMB)
10212 (*_bfd_error_handler)
10213 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
10214 input_bfd,
10215 h ? h->root.root.string : "(local)");
10216 }
10217 else if (r_type == R_ARM_PC24)
10218 {
10219 /* Check for Arm calling Thumb function. */
10220 if (branch_type == ST_BRANCH_TO_THUMB)
10221 {
10222 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
10223 output_bfd, input_section,
10224 hit_data, sym_sec, rel->r_offset,
10225 signed_addend, value,
10226 error_message))
10227 return bfd_reloc_ok;
10228 else
10229 return bfd_reloc_dangerous;
10230 }
10231 }
10232
10233 /* Check if a stub has to be inserted because the
10234 destination is too far or we are changing mode. */
10235 if ( r_type == R_ARM_CALL
10236 || r_type == R_ARM_JUMP24
10237 || r_type == R_ARM_PLT32)
10238 {
10239 enum elf32_arm_stub_type stub_type = arm_stub_none;
10240 struct elf32_arm_link_hash_entry *hash;
10241
10242 hash = (struct elf32_arm_link_hash_entry *) h;
10243 stub_type = arm_type_of_stub (info, input_section, rel,
10244 st_type, &branch_type,
10245 hash, value, sym_sec,
10246 input_bfd, sym_name);
10247
10248 if (stub_type != arm_stub_none)
10249 {
10250 /* The target is out of reach, so redirect the
10251 branch to the local stub for this function. */
10252 stub_entry = elf32_arm_get_stub_entry (input_section,
10253 sym_sec, h,
10254 rel, globals,
10255 stub_type);
10256 {
10257 if (stub_entry != NULL)
10258 value = (stub_entry->stub_offset
10259 + stub_entry->stub_sec->output_offset
10260 + stub_entry->stub_sec->output_section->vma);
10261
10262 if (plt_offset != (bfd_vma) -1)
10263 *unresolved_reloc_p = FALSE;
10264 }
10265 }
10266 else
10267 {
10268 /* If the call goes through a PLT entry, make sure to
10269 check distance to the right destination address. */
10270 if (plt_offset != (bfd_vma) -1)
10271 {
10272 value = (splt->output_section->vma
10273 + splt->output_offset
10274 + plt_offset);
10275 *unresolved_reloc_p = FALSE;
10276 /* The PLT entry is in ARM mode, regardless of the
10277 target function. */
10278 branch_type = ST_BRANCH_TO_ARM;
10279 }
10280 }
10281 }
10282
10283 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
10284 where:
10285 S is the address of the symbol in the relocation.
10286 P is address of the instruction being relocated.
10287 A is the addend (extracted from the instruction) in bytes.
10288
10289 S is held in 'value'.
10290 P is the base address of the section containing the
10291 instruction plus the offset of the reloc into that
10292 section, ie:
10293 (input_section->output_section->vma +
10294 input_section->output_offset +
10295 rel->r_offset).
10296 A is the addend, converted into bytes, ie:
10297 (signed_addend * 4)
10298
10299 Note: None of these operations have knowledge of the pipeline
10300 size of the processor, thus it is up to the assembler to
10301 encode this information into the addend. */
10302 value -= (input_section->output_section->vma
10303 + input_section->output_offset);
10304 value -= rel->r_offset;
10305 if (globals->use_rel)
10306 value += (signed_addend << howto->size);
10307 else
10308 /* RELA addends do not have to be adjusted by howto->size. */
10309 value += signed_addend;
10310
10311 signed_addend = value;
10312 signed_addend >>= howto->rightshift;
10313
10314 /* A branch to an undefined weak symbol is turned into a jump to
10315 the next instruction unless a PLT entry will be created.
10316 Do the same for local undefined symbols (but not for STN_UNDEF).
10317 The jump to the next instruction is optimized as a NOP depending
10318 on the architecture. */
10319 if (h ? (h->root.type == bfd_link_hash_undefweak
10320 && plt_offset == (bfd_vma) -1)
10321 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
10322 {
10323 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
10324
10325 if (arch_has_arm_nop (globals))
10326 value |= 0x0320f000;
10327 else
10328 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
10329 }
10330 else
10331 {
10332 /* Perform a signed range check. */
10333 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
10334 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
10335 return bfd_reloc_overflow;
10336
10337 addend = (value & 2);
10338
10339 value = (signed_addend & howto->dst_mask)
10340 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
10341
10342 if (r_type == R_ARM_CALL)
10343 {
10344 /* Set the H bit in the BLX instruction. */
10345 if (branch_type == ST_BRANCH_TO_THUMB)
10346 {
10347 if (addend)
10348 value |= (1 << 24);
10349 else
10350 value &= ~(bfd_vma)(1 << 24);
10351 }
10352
10353 /* Select the correct instruction (BL or BLX). */
10354 /* Only if we are not handling a BL to a stub. In this
10355 case, mode switching is performed by the stub. */
10356 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
10357 value |= (1 << 28);
10358 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
10359 {
10360 value &= ~(bfd_vma)(1 << 28);
10361 value |= (1 << 24);
10362 }
10363 }
10364 }
10365 }
10366 break;
10367
10368 case R_ARM_ABS32:
10369 value += addend;
10370 if (branch_type == ST_BRANCH_TO_THUMB)
10371 value |= 1;
10372 break;
10373
10374 case R_ARM_ABS32_NOI:
10375 value += addend;
10376 break;
10377
10378 case R_ARM_REL32:
10379 value += addend;
10380 if (branch_type == ST_BRANCH_TO_THUMB)
10381 value |= 1;
10382 value -= (input_section->output_section->vma
10383 + input_section->output_offset + rel->r_offset);
10384 break;
10385
10386 case R_ARM_REL32_NOI:
10387 value += addend;
10388 value -= (input_section->output_section->vma
10389 + input_section->output_offset + rel->r_offset);
10390 break;
10391
10392 case R_ARM_PREL31:
10393 value -= (input_section->output_section->vma
10394 + input_section->output_offset + rel->r_offset);
10395 value += signed_addend;
10396 if (! h || h->root.type != bfd_link_hash_undefweak)
10397 {
10398 /* Check for overflow. */
10399 if ((value ^ (value >> 1)) & (1 << 30))
10400 return bfd_reloc_overflow;
10401 }
10402 value &= 0x7fffffff;
10403 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
10404 if (branch_type == ST_BRANCH_TO_THUMB)
10405 value |= 1;
10406 break;
10407 }
10408
10409 bfd_put_32 (input_bfd, value, hit_data);
10410 return bfd_reloc_ok;
10411
10412 case R_ARM_ABS8:
10413 /* PR 16202: Refectch the addend using the correct size. */
10414 if (globals->use_rel)
10415 addend = bfd_get_8 (input_bfd, hit_data);
10416 value += addend;
10417
10418 /* There is no way to tell whether the user intended to use a signed or
10419 unsigned addend. When checking for overflow we accept either,
10420 as specified by the AAELF. */
10421 if ((long) value > 0xff || (long) value < -0x80)
10422 return bfd_reloc_overflow;
10423
10424 bfd_put_8 (input_bfd, value, hit_data);
10425 return bfd_reloc_ok;
10426
10427 case R_ARM_ABS16:
10428 /* PR 16202: Refectch the addend using the correct size. */
10429 if (globals->use_rel)
10430 addend = bfd_get_16 (input_bfd, hit_data);
10431 value += addend;
10432
10433 /* See comment for R_ARM_ABS8. */
10434 if ((long) value > 0xffff || (long) value < -0x8000)
10435 return bfd_reloc_overflow;
10436
10437 bfd_put_16 (input_bfd, value, hit_data);
10438 return bfd_reloc_ok;
10439
10440 case R_ARM_THM_ABS5:
10441 /* Support ldr and str instructions for the thumb. */
10442 if (globals->use_rel)
10443 {
10444 /* Need to refetch addend. */
10445 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
10446 /* ??? Need to determine shift amount from operand size. */
10447 addend >>= howto->rightshift;
10448 }
10449 value += addend;
10450
10451 /* ??? Isn't value unsigned? */
10452 if ((long) value > 0x1f || (long) value < -0x10)
10453 return bfd_reloc_overflow;
10454
10455 /* ??? Value needs to be properly shifted into place first. */
10456 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
10457 bfd_put_16 (input_bfd, value, hit_data);
10458 return bfd_reloc_ok;
10459
10460 case R_ARM_THM_ALU_PREL_11_0:
10461 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
10462 {
10463 bfd_vma insn;
10464 bfd_signed_vma relocation;
10465
10466 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10467 | bfd_get_16 (input_bfd, hit_data + 2);
10468
10469 if (globals->use_rel)
10470 {
10471 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
10472 | ((insn & (1 << 26)) >> 15);
10473 if (insn & 0xf00000)
10474 signed_addend = -signed_addend;
10475 }
10476
10477 relocation = value + signed_addend;
10478 relocation -= Pa (input_section->output_section->vma
10479 + input_section->output_offset
10480 + rel->r_offset);
10481
10482 value = relocation;
10483
10484 if (value >= 0x1000)
10485 return bfd_reloc_overflow;
10486
10487 insn = (insn & 0xfb0f8f00) | (value & 0xff)
10488 | ((value & 0x700) << 4)
10489 | ((value & 0x800) << 15);
10490 if (relocation < 0)
10491 insn |= 0xa00000;
10492
10493 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10494 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10495
10496 return bfd_reloc_ok;
10497 }
10498
10499 case R_ARM_THM_PC8:
10500 /* PR 10073: This reloc is not generated by the GNU toolchain,
10501 but it is supported for compatibility with third party libraries
10502 generated by other compilers, specifically the ARM/IAR. */
10503 {
10504 bfd_vma insn;
10505 bfd_signed_vma relocation;
10506
10507 insn = bfd_get_16 (input_bfd, hit_data);
10508
10509 if (globals->use_rel)
10510 addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
10511
10512 relocation = value + addend;
10513 relocation -= Pa (input_section->output_section->vma
10514 + input_section->output_offset
10515 + rel->r_offset);
10516
10517 value = relocation;
10518
10519 /* We do not check for overflow of this reloc. Although strictly
10520 speaking this is incorrect, it appears to be necessary in order
10521 to work with IAR generated relocs. Since GCC and GAS do not
10522 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
10523 a problem for them. */
10524 value &= 0x3fc;
10525
10526 insn = (insn & 0xff00) | (value >> 2);
10527
10528 bfd_put_16 (input_bfd, insn, hit_data);
10529
10530 return bfd_reloc_ok;
10531 }
10532
10533 case R_ARM_THM_PC12:
10534 /* Corresponds to: ldr.w reg, [pc, #offset]. */
10535 {
10536 bfd_vma insn;
10537 bfd_signed_vma relocation;
10538
10539 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10540 | bfd_get_16 (input_bfd, hit_data + 2);
10541
10542 if (globals->use_rel)
10543 {
10544 signed_addend = insn & 0xfff;
10545 if (!(insn & (1 << 23)))
10546 signed_addend = -signed_addend;
10547 }
10548
10549 relocation = value + signed_addend;
10550 relocation -= Pa (input_section->output_section->vma
10551 + input_section->output_offset
10552 + rel->r_offset);
10553
10554 value = relocation;
10555
10556 if (value >= 0x1000)
10557 return bfd_reloc_overflow;
10558
10559 insn = (insn & 0xff7ff000) | value;
10560 if (relocation >= 0)
10561 insn |= (1 << 23);
10562
10563 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10564 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10565
10566 return bfd_reloc_ok;
10567 }
10568
10569 case R_ARM_THM_XPC22:
10570 case R_ARM_THM_CALL:
10571 case R_ARM_THM_JUMP24:
10572 /* Thumb BL (branch long instruction). */
10573 {
10574 bfd_vma relocation;
10575 bfd_vma reloc_sign;
10576 bfd_boolean overflow = FALSE;
10577 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
10578 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
10579 bfd_signed_vma reloc_signed_max;
10580 bfd_signed_vma reloc_signed_min;
10581 bfd_vma check;
10582 bfd_signed_vma signed_check;
10583 int bitsize;
10584 const int thumb2 = using_thumb2 (globals);
10585 const int thumb2_bl = using_thumb2_bl (globals);
10586
10587 /* A branch to an undefined weak symbol is turned into a jump to
10588 the next instruction unless a PLT entry will be created.
10589 The jump to the next instruction is optimized as a NOP.W for
10590 Thumb-2 enabled architectures. */
10591 if (h && h->root.type == bfd_link_hash_undefweak
10592 && plt_offset == (bfd_vma) -1)
10593 {
10594 if (thumb2)
10595 {
10596 bfd_put_16 (input_bfd, 0xf3af, hit_data);
10597 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
10598 }
10599 else
10600 {
10601 bfd_put_16 (input_bfd, 0xe000, hit_data);
10602 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
10603 }
10604 return bfd_reloc_ok;
10605 }
10606
10607 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
10608 with Thumb-1) involving the J1 and J2 bits. */
10609 if (globals->use_rel)
10610 {
10611 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
10612 bfd_vma upper = upper_insn & 0x3ff;
10613 bfd_vma lower = lower_insn & 0x7ff;
10614 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
10615 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
10616 bfd_vma i1 = j1 ^ s ? 0 : 1;
10617 bfd_vma i2 = j2 ^ s ? 0 : 1;
10618
10619 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
10620 /* Sign extend. */
10621 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
10622
10623 signed_addend = addend;
10624 }
10625
10626 if (r_type == R_ARM_THM_XPC22)
10627 {
10628 /* Check for Thumb to Thumb call. */
10629 /* FIXME: Should we translate the instruction into a BL
10630 instruction instead ? */
10631 if (branch_type == ST_BRANCH_TO_THUMB)
10632 (*_bfd_error_handler)
10633 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
10634 input_bfd,
10635 h ? h->root.root.string : "(local)");
10636 }
10637 else
10638 {
10639 /* If it is not a call to Thumb, assume call to Arm.
10640 If it is a call relative to a section name, then it is not a
10641 function call at all, but rather a long jump. Calls through
10642 the PLT do not require stubs. */
10643 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
10644 {
10645 if (globals->use_blx && r_type == R_ARM_THM_CALL)
10646 {
10647 /* Convert BL to BLX. */
10648 lower_insn = (lower_insn & ~0x1000) | 0x0800;
10649 }
10650 else if (( r_type != R_ARM_THM_CALL)
10651 && (r_type != R_ARM_THM_JUMP24))
10652 {
10653 if (elf32_thumb_to_arm_stub
10654 (info, sym_name, input_bfd, output_bfd, input_section,
10655 hit_data, sym_sec, rel->r_offset, signed_addend, value,
10656 error_message))
10657 return bfd_reloc_ok;
10658 else
10659 return bfd_reloc_dangerous;
10660 }
10661 }
10662 else if (branch_type == ST_BRANCH_TO_THUMB
10663 && globals->use_blx
10664 && r_type == R_ARM_THM_CALL)
10665 {
10666 /* Make sure this is a BL. */
10667 lower_insn |= 0x1800;
10668 }
10669 }
10670
10671 enum elf32_arm_stub_type stub_type = arm_stub_none;
10672 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
10673 {
10674 /* Check if a stub has to be inserted because the destination
10675 is too far. */
10676 struct elf32_arm_stub_hash_entry *stub_entry;
10677 struct elf32_arm_link_hash_entry *hash;
10678
10679 hash = (struct elf32_arm_link_hash_entry *) h;
10680
10681 stub_type = arm_type_of_stub (info, input_section, rel,
10682 st_type, &branch_type,
10683 hash, value, sym_sec,
10684 input_bfd, sym_name);
10685
10686 if (stub_type != arm_stub_none)
10687 {
10688 /* The target is out of reach or we are changing modes, so
10689 redirect the branch to the local stub for this
10690 function. */
10691 stub_entry = elf32_arm_get_stub_entry (input_section,
10692 sym_sec, h,
10693 rel, globals,
10694 stub_type);
10695 if (stub_entry != NULL)
10696 {
10697 value = (stub_entry->stub_offset
10698 + stub_entry->stub_sec->output_offset
10699 + stub_entry->stub_sec->output_section->vma);
10700
10701 if (plt_offset != (bfd_vma) -1)
10702 *unresolved_reloc_p = FALSE;
10703 }
10704
10705 /* If this call becomes a call to Arm, force BLX. */
10706 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
10707 {
10708 if ((stub_entry
10709 && !arm_stub_is_thumb (stub_entry->stub_type))
10710 || branch_type != ST_BRANCH_TO_THUMB)
10711 lower_insn = (lower_insn & ~0x1000) | 0x0800;
10712 }
10713 }
10714 }
10715
10716 /* Handle calls via the PLT. */
10717 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
10718 {
10719 value = (splt->output_section->vma
10720 + splt->output_offset
10721 + plt_offset);
10722
10723 if (globals->use_blx
10724 && r_type == R_ARM_THM_CALL
10725 && ! using_thumb_only (globals))
10726 {
10727 /* If the Thumb BLX instruction is available, convert
10728 the BL to a BLX instruction to call the ARM-mode
10729 PLT entry. */
10730 lower_insn = (lower_insn & ~0x1000) | 0x0800;
10731 branch_type = ST_BRANCH_TO_ARM;
10732 }
10733 else
10734 {
10735 if (! using_thumb_only (globals))
10736 /* Target the Thumb stub before the ARM PLT entry. */
10737 value -= PLT_THUMB_STUB_SIZE;
10738 branch_type = ST_BRANCH_TO_THUMB;
10739 }
10740 *unresolved_reloc_p = FALSE;
10741 }
10742
10743 relocation = value + signed_addend;
10744
10745 relocation -= (input_section->output_section->vma
10746 + input_section->output_offset
10747 + rel->r_offset);
10748
10749 check = relocation >> howto->rightshift;
10750
10751 /* If this is a signed value, the rightshift just dropped
10752 leading 1 bits (assuming twos complement). */
10753 if ((bfd_signed_vma) relocation >= 0)
10754 signed_check = check;
10755 else
10756 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
10757
10758 /* Calculate the permissable maximum and minimum values for
10759 this relocation according to whether we're relocating for
10760 Thumb-2 or not. */
10761 bitsize = howto->bitsize;
10762 if (!thumb2_bl)
10763 bitsize -= 2;
10764 reloc_signed_max = (1 << (bitsize - 1)) - 1;
10765 reloc_signed_min = ~reloc_signed_max;
10766
10767 /* Assumes two's complement. */
10768 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
10769 overflow = TRUE;
10770
10771 if ((lower_insn & 0x5000) == 0x4000)
10772 /* For a BLX instruction, make sure that the relocation is rounded up
10773 to a word boundary. This follows the semantics of the instruction
10774 which specifies that bit 1 of the target address will come from bit
10775 1 of the base address. */
10776 relocation = (relocation + 2) & ~ 3;
10777
10778 /* Put RELOCATION back into the insn. Assumes two's complement.
10779 We use the Thumb-2 encoding, which is safe even if dealing with
10780 a Thumb-1 instruction by virtue of our overflow check above. */
10781 reloc_sign = (signed_check < 0) ? 1 : 0;
10782 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
10783 | ((relocation >> 12) & 0x3ff)
10784 | (reloc_sign << 10);
10785 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
10786 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
10787 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
10788 | ((relocation >> 1) & 0x7ff);
10789
10790 /* Put the relocated value back in the object file: */
10791 bfd_put_16 (input_bfd, upper_insn, hit_data);
10792 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
10793
10794 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
10795 }
10796 break;
10797
10798 case R_ARM_THM_JUMP19:
10799 /* Thumb32 conditional branch instruction. */
10800 {
10801 bfd_vma relocation;
10802 bfd_boolean overflow = FALSE;
10803 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
10804 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
10805 bfd_signed_vma reloc_signed_max = 0xffffe;
10806 bfd_signed_vma reloc_signed_min = -0x100000;
10807 bfd_signed_vma signed_check;
10808 enum elf32_arm_stub_type stub_type = arm_stub_none;
10809 struct elf32_arm_stub_hash_entry *stub_entry;
10810 struct elf32_arm_link_hash_entry *hash;
10811
10812 /* Need to refetch the addend, reconstruct the top three bits,
10813 and squish the two 11 bit pieces together. */
10814 if (globals->use_rel)
10815 {
10816 bfd_vma S = (upper_insn & 0x0400) >> 10;
10817 bfd_vma upper = (upper_insn & 0x003f);
10818 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
10819 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
10820 bfd_vma lower = (lower_insn & 0x07ff);
10821
10822 upper |= J1 << 6;
10823 upper |= J2 << 7;
10824 upper |= (!S) << 8;
10825 upper -= 0x0100; /* Sign extend. */
10826
10827 addend = (upper << 12) | (lower << 1);
10828 signed_addend = addend;
10829 }
10830
10831 /* Handle calls via the PLT. */
10832 if (plt_offset != (bfd_vma) -1)
10833 {
10834 value = (splt->output_section->vma
10835 + splt->output_offset
10836 + plt_offset);
10837 /* Target the Thumb stub before the ARM PLT entry. */
10838 value -= PLT_THUMB_STUB_SIZE;
10839 *unresolved_reloc_p = FALSE;
10840 }
10841
10842 hash = (struct elf32_arm_link_hash_entry *)h;
10843
10844 stub_type = arm_type_of_stub (info, input_section, rel,
10845 st_type, &branch_type,
10846 hash, value, sym_sec,
10847 input_bfd, sym_name);
10848 if (stub_type != arm_stub_none)
10849 {
10850 stub_entry = elf32_arm_get_stub_entry (input_section,
10851 sym_sec, h,
10852 rel, globals,
10853 stub_type);
10854 if (stub_entry != NULL)
10855 {
10856 value = (stub_entry->stub_offset
10857 + stub_entry->stub_sec->output_offset
10858 + stub_entry->stub_sec->output_section->vma);
10859 }
10860 }
10861
10862 relocation = value + signed_addend;
10863 relocation -= (input_section->output_section->vma
10864 + input_section->output_offset
10865 + rel->r_offset);
10866 signed_check = (bfd_signed_vma) relocation;
10867
10868 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
10869 overflow = TRUE;
10870
10871 /* Put RELOCATION back into the insn. */
10872 {
10873 bfd_vma S = (relocation & 0x00100000) >> 20;
10874 bfd_vma J2 = (relocation & 0x00080000) >> 19;
10875 bfd_vma J1 = (relocation & 0x00040000) >> 18;
10876 bfd_vma hi = (relocation & 0x0003f000) >> 12;
10877 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
10878
10879 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
10880 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
10881 }
10882
10883 /* Put the relocated value back in the object file: */
10884 bfd_put_16 (input_bfd, upper_insn, hit_data);
10885 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
10886
10887 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
10888 }
10889
10890 case R_ARM_THM_JUMP11:
10891 case R_ARM_THM_JUMP8:
10892 case R_ARM_THM_JUMP6:
10893 /* Thumb B (branch) instruction). */
10894 {
10895 bfd_signed_vma relocation;
10896 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
10897 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
10898 bfd_signed_vma signed_check;
10899
10900 /* CZB cannot jump backward. */
10901 if (r_type == R_ARM_THM_JUMP6)
10902 reloc_signed_min = 0;
10903
10904 if (globals->use_rel)
10905 {
10906 /* Need to refetch addend. */
10907 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
10908 if (addend & ((howto->src_mask + 1) >> 1))
10909 {
10910 signed_addend = -1;
10911 signed_addend &= ~ howto->src_mask;
10912 signed_addend |= addend;
10913 }
10914 else
10915 signed_addend = addend;
10916 /* The value in the insn has been right shifted. We need to
10917 undo this, so that we can perform the address calculation
10918 in terms of bytes. */
10919 signed_addend <<= howto->rightshift;
10920 }
10921 relocation = value + signed_addend;
10922
10923 relocation -= (input_section->output_section->vma
10924 + input_section->output_offset
10925 + rel->r_offset);
10926
10927 relocation >>= howto->rightshift;
10928 signed_check = relocation;
10929
10930 if (r_type == R_ARM_THM_JUMP6)
10931 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
10932 else
10933 relocation &= howto->dst_mask;
10934 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
10935
10936 bfd_put_16 (input_bfd, relocation, hit_data);
10937
10938 /* Assumes two's complement. */
10939 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
10940 return bfd_reloc_overflow;
10941
10942 return bfd_reloc_ok;
10943 }
10944
10945 case R_ARM_ALU_PCREL7_0:
10946 case R_ARM_ALU_PCREL15_8:
10947 case R_ARM_ALU_PCREL23_15:
10948 {
10949 bfd_vma insn;
10950 bfd_vma relocation;
10951
10952 insn = bfd_get_32 (input_bfd, hit_data);
10953 if (globals->use_rel)
10954 {
10955 /* Extract the addend. */
10956 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
10957 signed_addend = addend;
10958 }
10959 relocation = value + signed_addend;
10960
10961 relocation -= (input_section->output_section->vma
10962 + input_section->output_offset
10963 + rel->r_offset);
10964 insn = (insn & ~0xfff)
10965 | ((howto->bitpos << 7) & 0xf00)
10966 | ((relocation >> howto->bitpos) & 0xff);
10967 bfd_put_32 (input_bfd, value, hit_data);
10968 }
10969 return bfd_reloc_ok;
10970
10971 case R_ARM_GNU_VTINHERIT:
10972 case R_ARM_GNU_VTENTRY:
10973 return bfd_reloc_ok;
10974
10975 case R_ARM_GOTOFF32:
10976 /* Relocation is relative to the start of the
10977 global offset table. */
10978
10979 BFD_ASSERT (sgot != NULL);
10980 if (sgot == NULL)
10981 return bfd_reloc_notsupported;
10982
10983 /* If we are addressing a Thumb function, we need to adjust the
10984 address by one, so that attempts to call the function pointer will
10985 correctly interpret it as Thumb code. */
10986 if (branch_type == ST_BRANCH_TO_THUMB)
10987 value += 1;
10988
10989 /* Note that sgot->output_offset is not involved in this
10990 calculation. We always want the start of .got. If we
10991 define _GLOBAL_OFFSET_TABLE in a different way, as is
10992 permitted by the ABI, we might have to change this
10993 calculation. */
10994 value -= sgot->output_section->vma;
10995 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10996 contents, rel->r_offset, value,
10997 rel->r_addend);
10998
10999 case R_ARM_GOTPC:
11000 /* Use global offset table as symbol value. */
11001 BFD_ASSERT (sgot != NULL);
11002
11003 if (sgot == NULL)
11004 return bfd_reloc_notsupported;
11005
11006 *unresolved_reloc_p = FALSE;
11007 value = sgot->output_section->vma;
11008 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11009 contents, rel->r_offset, value,
11010 rel->r_addend);
11011
11012 case R_ARM_GOT32:
11013 case R_ARM_GOT_PREL:
11014 /* Relocation is to the entry for this symbol in the
11015 global offset table. */
11016 if (sgot == NULL)
11017 return bfd_reloc_notsupported;
11018
11019 if (dynreloc_st_type == STT_GNU_IFUNC
11020 && plt_offset != (bfd_vma) -1
11021 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
11022 {
11023 /* We have a relocation against a locally-binding STT_GNU_IFUNC
11024 symbol, and the relocation resolves directly to the runtime
11025 target rather than to the .iplt entry. This means that any
11026 .got entry would be the same value as the .igot.plt entry,
11027 so there's no point creating both. */
11028 sgot = globals->root.igotplt;
11029 value = sgot->output_offset + gotplt_offset;
11030 }
11031 else if (h != NULL)
11032 {
11033 bfd_vma off;
11034
11035 off = h->got.offset;
11036 BFD_ASSERT (off != (bfd_vma) -1);
11037 if ((off & 1) != 0)
11038 {
11039 /* We have already processsed one GOT relocation against
11040 this symbol. */
11041 off &= ~1;
11042 if (globals->root.dynamic_sections_created
11043 && !SYMBOL_REFERENCES_LOCAL (info, h))
11044 *unresolved_reloc_p = FALSE;
11045 }
11046 else
11047 {
11048 Elf_Internal_Rela outrel;
11049
11050 if (h->dynindx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
11051 {
11052 /* If the symbol doesn't resolve locally in a static
11053 object, we have an undefined reference. If the
11054 symbol doesn't resolve locally in a dynamic object,
11055 it should be resolved by the dynamic linker. */
11056 if (globals->root.dynamic_sections_created)
11057 {
11058 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
11059 *unresolved_reloc_p = FALSE;
11060 }
11061 else
11062 outrel.r_info = 0;
11063 outrel.r_addend = 0;
11064 }
11065 else
11066 {
11067 if (dynreloc_st_type == STT_GNU_IFUNC)
11068 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11069 else if (bfd_link_pic (info)
11070 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11071 || h->root.type != bfd_link_hash_undefweak))
11072 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11073 else
11074 outrel.r_info = 0;
11075 outrel.r_addend = dynreloc_value;
11076 }
11077
11078 /* The GOT entry is initialized to zero by default.
11079 See if we should install a different value. */
11080 if (outrel.r_addend != 0
11081 && (outrel.r_info == 0 || globals->use_rel))
11082 {
11083 bfd_put_32 (output_bfd, outrel.r_addend,
11084 sgot->contents + off);
11085 outrel.r_addend = 0;
11086 }
11087
11088 if (outrel.r_info != 0)
11089 {
11090 outrel.r_offset = (sgot->output_section->vma
11091 + sgot->output_offset
11092 + off);
11093 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11094 }
11095 h->got.offset |= 1;
11096 }
11097 value = sgot->output_offset + off;
11098 }
11099 else
11100 {
11101 bfd_vma off;
11102
11103 BFD_ASSERT (local_got_offsets != NULL
11104 && local_got_offsets[r_symndx] != (bfd_vma) -1);
11105
11106 off = local_got_offsets[r_symndx];
11107
11108 /* The offset must always be a multiple of 4. We use the
11109 least significant bit to record whether we have already
11110 generated the necessary reloc. */
11111 if ((off & 1) != 0)
11112 off &= ~1;
11113 else
11114 {
11115 if (globals->use_rel)
11116 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
11117
11118 if (bfd_link_pic (info) || dynreloc_st_type == STT_GNU_IFUNC)
11119 {
11120 Elf_Internal_Rela outrel;
11121
11122 outrel.r_addend = addend + dynreloc_value;
11123 outrel.r_offset = (sgot->output_section->vma
11124 + sgot->output_offset
11125 + off);
11126 if (dynreloc_st_type == STT_GNU_IFUNC)
11127 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11128 else
11129 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11130 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11131 }
11132
11133 local_got_offsets[r_symndx] |= 1;
11134 }
11135
11136 value = sgot->output_offset + off;
11137 }
11138 if (r_type != R_ARM_GOT32)
11139 value += sgot->output_section->vma;
11140
11141 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11142 contents, rel->r_offset, value,
11143 rel->r_addend);
11144
11145 case R_ARM_TLS_LDO32:
11146 value = value - dtpoff_base (info);
11147
11148 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11149 contents, rel->r_offset, value,
11150 rel->r_addend);
11151
11152 case R_ARM_TLS_LDM32:
11153 {
11154 bfd_vma off;
11155
11156 if (sgot == NULL)
11157 abort ();
11158
11159 off = globals->tls_ldm_got.offset;
11160
11161 if ((off & 1) != 0)
11162 off &= ~1;
11163 else
11164 {
11165 /* If we don't know the module number, create a relocation
11166 for it. */
11167 if (bfd_link_pic (info))
11168 {
11169 Elf_Internal_Rela outrel;
11170
11171 if (srelgot == NULL)
11172 abort ();
11173
11174 outrel.r_addend = 0;
11175 outrel.r_offset = (sgot->output_section->vma
11176 + sgot->output_offset + off);
11177 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
11178
11179 if (globals->use_rel)
11180 bfd_put_32 (output_bfd, outrel.r_addend,
11181 sgot->contents + off);
11182
11183 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11184 }
11185 else
11186 bfd_put_32 (output_bfd, 1, sgot->contents + off);
11187
11188 globals->tls_ldm_got.offset |= 1;
11189 }
11190
11191 value = sgot->output_section->vma + sgot->output_offset + off
11192 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
11193
11194 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11195 contents, rel->r_offset, value,
11196 rel->r_addend);
11197 }
11198
11199 case R_ARM_TLS_CALL:
11200 case R_ARM_THM_TLS_CALL:
11201 case R_ARM_TLS_GD32:
11202 case R_ARM_TLS_IE32:
11203 case R_ARM_TLS_GOTDESC:
11204 case R_ARM_TLS_DESCSEQ:
11205 case R_ARM_THM_TLS_DESCSEQ:
11206 {
11207 bfd_vma off, offplt;
11208 int indx = 0;
11209 char tls_type;
11210
11211 BFD_ASSERT (sgot != NULL);
11212
11213 if (h != NULL)
11214 {
11215 bfd_boolean dyn;
11216 dyn = globals->root.dynamic_sections_created;
11217 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
11218 bfd_link_pic (info),
11219 h)
11220 && (!bfd_link_pic (info)
11221 || !SYMBOL_REFERENCES_LOCAL (info, h)))
11222 {
11223 *unresolved_reloc_p = FALSE;
11224 indx = h->dynindx;
11225 }
11226 off = h->got.offset;
11227 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
11228 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
11229 }
11230 else
11231 {
11232 BFD_ASSERT (local_got_offsets != NULL);
11233 off = local_got_offsets[r_symndx];
11234 offplt = local_tlsdesc_gotents[r_symndx];
11235 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
11236 }
11237
11238 /* Linker relaxations happens from one of the
11239 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
11240 if (ELF32_R_TYPE(rel->r_info) != r_type)
11241 tls_type = GOT_TLS_IE;
11242
11243 BFD_ASSERT (tls_type != GOT_UNKNOWN);
11244
11245 if ((off & 1) != 0)
11246 off &= ~1;
11247 else
11248 {
11249 bfd_boolean need_relocs = FALSE;
11250 Elf_Internal_Rela outrel;
11251 int cur_off = off;
11252
11253 /* The GOT entries have not been initialized yet. Do it
11254 now, and emit any relocations. If both an IE GOT and a
11255 GD GOT are necessary, we emit the GD first. */
11256
11257 if ((bfd_link_pic (info) || indx != 0)
11258 && (h == NULL
11259 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11260 || h->root.type != bfd_link_hash_undefweak))
11261 {
11262 need_relocs = TRUE;
11263 BFD_ASSERT (srelgot != NULL);
11264 }
11265
11266 if (tls_type & GOT_TLS_GDESC)
11267 {
11268 bfd_byte *loc;
11269
11270 /* We should have relaxed, unless this is an undefined
11271 weak symbol. */
11272 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
11273 || bfd_link_pic (info));
11274 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
11275 <= globals->root.sgotplt->size);
11276
11277 outrel.r_addend = 0;
11278 outrel.r_offset = (globals->root.sgotplt->output_section->vma
11279 + globals->root.sgotplt->output_offset
11280 + offplt
11281 + globals->sgotplt_jump_table_size);
11282
11283 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
11284 sreloc = globals->root.srelplt;
11285 loc = sreloc->contents;
11286 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
11287 BFD_ASSERT (loc + RELOC_SIZE (globals)
11288 <= sreloc->contents + sreloc->size);
11289
11290 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
11291
11292 /* For globals, the first word in the relocation gets
11293 the relocation index and the top bit set, or zero,
11294 if we're binding now. For locals, it gets the
11295 symbol's offset in the tls section. */
11296 bfd_put_32 (output_bfd,
11297 !h ? value - elf_hash_table (info)->tls_sec->vma
11298 : info->flags & DF_BIND_NOW ? 0
11299 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
11300 globals->root.sgotplt->contents + offplt
11301 + globals->sgotplt_jump_table_size);
11302
11303 /* Second word in the relocation is always zero. */
11304 bfd_put_32 (output_bfd, 0,
11305 globals->root.sgotplt->contents + offplt
11306 + globals->sgotplt_jump_table_size + 4);
11307 }
11308 if (tls_type & GOT_TLS_GD)
11309 {
11310 if (need_relocs)
11311 {
11312 outrel.r_addend = 0;
11313 outrel.r_offset = (sgot->output_section->vma
11314 + sgot->output_offset
11315 + cur_off);
11316 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
11317
11318 if (globals->use_rel)
11319 bfd_put_32 (output_bfd, outrel.r_addend,
11320 sgot->contents + cur_off);
11321
11322 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11323
11324 if (indx == 0)
11325 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11326 sgot->contents + cur_off + 4);
11327 else
11328 {
11329 outrel.r_addend = 0;
11330 outrel.r_info = ELF32_R_INFO (indx,
11331 R_ARM_TLS_DTPOFF32);
11332 outrel.r_offset += 4;
11333
11334 if (globals->use_rel)
11335 bfd_put_32 (output_bfd, outrel.r_addend,
11336 sgot->contents + cur_off + 4);
11337
11338 elf32_arm_add_dynreloc (output_bfd, info,
11339 srelgot, &outrel);
11340 }
11341 }
11342 else
11343 {
11344 /* If we are not emitting relocations for a
11345 general dynamic reference, then we must be in a
11346 static link or an executable link with the
11347 symbol binding locally. Mark it as belonging
11348 to module 1, the executable. */
11349 bfd_put_32 (output_bfd, 1,
11350 sgot->contents + cur_off);
11351 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11352 sgot->contents + cur_off + 4);
11353 }
11354
11355 cur_off += 8;
11356 }
11357
11358 if (tls_type & GOT_TLS_IE)
11359 {
11360 if (need_relocs)
11361 {
11362 if (indx == 0)
11363 outrel.r_addend = value - dtpoff_base (info);
11364 else
11365 outrel.r_addend = 0;
11366 outrel.r_offset = (sgot->output_section->vma
11367 + sgot->output_offset
11368 + cur_off);
11369 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
11370
11371 if (globals->use_rel)
11372 bfd_put_32 (output_bfd, outrel.r_addend,
11373 sgot->contents + cur_off);
11374
11375 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11376 }
11377 else
11378 bfd_put_32 (output_bfd, tpoff (info, value),
11379 sgot->contents + cur_off);
11380 cur_off += 4;
11381 }
11382
11383 if (h != NULL)
11384 h->got.offset |= 1;
11385 else
11386 local_got_offsets[r_symndx] |= 1;
11387 }
11388
11389 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
11390 off += 8;
11391 else if (tls_type & GOT_TLS_GDESC)
11392 off = offplt;
11393
11394 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
11395 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
11396 {
11397 bfd_signed_vma offset;
11398 /* TLS stubs are arm mode. The original symbol is a
11399 data object, so branch_type is bogus. */
11400 branch_type = ST_BRANCH_TO_ARM;
11401 enum elf32_arm_stub_type stub_type
11402 = arm_type_of_stub (info, input_section, rel,
11403 st_type, &branch_type,
11404 (struct elf32_arm_link_hash_entry *)h,
11405 globals->tls_trampoline, globals->root.splt,
11406 input_bfd, sym_name);
11407
11408 if (stub_type != arm_stub_none)
11409 {
11410 struct elf32_arm_stub_hash_entry *stub_entry
11411 = elf32_arm_get_stub_entry
11412 (input_section, globals->root.splt, 0, rel,
11413 globals, stub_type);
11414 offset = (stub_entry->stub_offset
11415 + stub_entry->stub_sec->output_offset
11416 + stub_entry->stub_sec->output_section->vma);
11417 }
11418 else
11419 offset = (globals->root.splt->output_section->vma
11420 + globals->root.splt->output_offset
11421 + globals->tls_trampoline);
11422
11423 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
11424 {
11425 unsigned long inst;
11426
11427 offset -= (input_section->output_section->vma
11428 + input_section->output_offset
11429 + rel->r_offset + 8);
11430
11431 inst = offset >> 2;
11432 inst &= 0x00ffffff;
11433 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
11434 }
11435 else
11436 {
11437 /* Thumb blx encodes the offset in a complicated
11438 fashion. */
11439 unsigned upper_insn, lower_insn;
11440 unsigned neg;
11441
11442 offset -= (input_section->output_section->vma
11443 + input_section->output_offset
11444 + rel->r_offset + 4);
11445
11446 if (stub_type != arm_stub_none
11447 && arm_stub_is_thumb (stub_type))
11448 {
11449 lower_insn = 0xd000;
11450 }
11451 else
11452 {
11453 lower_insn = 0xc000;
11454 /* Round up the offset to a word boundary. */
11455 offset = (offset + 2) & ~2;
11456 }
11457
11458 neg = offset < 0;
11459 upper_insn = (0xf000
11460 | ((offset >> 12) & 0x3ff)
11461 | (neg << 10));
11462 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
11463 | (((!((offset >> 22) & 1)) ^ neg) << 11)
11464 | ((offset >> 1) & 0x7ff);
11465 bfd_put_16 (input_bfd, upper_insn, hit_data);
11466 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11467 return bfd_reloc_ok;
11468 }
11469 }
11470 /* These relocations needs special care, as besides the fact
11471 they point somewhere in .gotplt, the addend must be
11472 adjusted accordingly depending on the type of instruction
11473 we refer to. */
11474 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
11475 {
11476 unsigned long data, insn;
11477 unsigned thumb;
11478
11479 data = bfd_get_32 (input_bfd, hit_data);
11480 thumb = data & 1;
11481 data &= ~1u;
11482
11483 if (thumb)
11484 {
11485 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
11486 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
11487 insn = (insn << 16)
11488 | bfd_get_16 (input_bfd,
11489 contents + rel->r_offset - data + 2);
11490 if ((insn & 0xf800c000) == 0xf000c000)
11491 /* bl/blx */
11492 value = -6;
11493 else if ((insn & 0xffffff00) == 0x4400)
11494 /* add */
11495 value = -5;
11496 else
11497 {
11498 (*_bfd_error_handler)
11499 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"),
11500 input_bfd, input_section,
11501 (unsigned long)rel->r_offset, insn);
11502 return bfd_reloc_notsupported;
11503 }
11504 }
11505 else
11506 {
11507 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
11508
11509 switch (insn >> 24)
11510 {
11511 case 0xeb: /* bl */
11512 case 0xfa: /* blx */
11513 value = -4;
11514 break;
11515
11516 case 0xe0: /* add */
11517 value = -8;
11518 break;
11519
11520 default:
11521 (*_bfd_error_handler)
11522 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
11523 input_bfd, input_section,
11524 (unsigned long)rel->r_offset, insn);
11525 return bfd_reloc_notsupported;
11526 }
11527 }
11528
11529 value += ((globals->root.sgotplt->output_section->vma
11530 + globals->root.sgotplt->output_offset + off)
11531 - (input_section->output_section->vma
11532 + input_section->output_offset
11533 + rel->r_offset)
11534 + globals->sgotplt_jump_table_size);
11535 }
11536 else
11537 value = ((globals->root.sgot->output_section->vma
11538 + globals->root.sgot->output_offset + off)
11539 - (input_section->output_section->vma
11540 + input_section->output_offset + rel->r_offset));
11541
11542 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11543 contents, rel->r_offset, value,
11544 rel->r_addend);
11545 }
11546
11547 case R_ARM_TLS_LE32:
11548 if (bfd_link_dll (info))
11549 {
11550 (*_bfd_error_handler)
11551 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
11552 input_bfd, input_section,
11553 (long) rel->r_offset, howto->name);
11554 return bfd_reloc_notsupported;
11555 }
11556 else
11557 value = tpoff (info, value);
11558
11559 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11560 contents, rel->r_offset, value,
11561 rel->r_addend);
11562
11563 case R_ARM_V4BX:
11564 if (globals->fix_v4bx)
11565 {
11566 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11567
11568 /* Ensure that we have a BX instruction. */
11569 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
11570
11571 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
11572 {
11573 /* Branch to veneer. */
11574 bfd_vma glue_addr;
11575 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
11576 glue_addr -= input_section->output_section->vma
11577 + input_section->output_offset
11578 + rel->r_offset + 8;
11579 insn = (insn & 0xf0000000) | 0x0a000000
11580 | ((glue_addr >> 2) & 0x00ffffff);
11581 }
11582 else
11583 {
11584 /* Preserve Rm (lowest four bits) and the condition code
11585 (highest four bits). Other bits encode MOV PC,Rm. */
11586 insn = (insn & 0xf000000f) | 0x01a0f000;
11587 }
11588
11589 bfd_put_32 (input_bfd, insn, hit_data);
11590 }
11591 return bfd_reloc_ok;
11592
11593 case R_ARM_MOVW_ABS_NC:
11594 case R_ARM_MOVT_ABS:
11595 case R_ARM_MOVW_PREL_NC:
11596 case R_ARM_MOVT_PREL:
11597 /* Until we properly support segment-base-relative addressing then
11598 we assume the segment base to be zero, as for the group relocations.
11599 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
11600 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
11601 case R_ARM_MOVW_BREL_NC:
11602 case R_ARM_MOVW_BREL:
11603 case R_ARM_MOVT_BREL:
11604 {
11605 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11606
11607 if (globals->use_rel)
11608 {
11609 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
11610 signed_addend = (addend ^ 0x8000) - 0x8000;
11611 }
11612
11613 value += signed_addend;
11614
11615 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
11616 value -= (input_section->output_section->vma
11617 + input_section->output_offset + rel->r_offset);
11618
11619 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
11620 return bfd_reloc_overflow;
11621
11622 if (branch_type == ST_BRANCH_TO_THUMB)
11623 value |= 1;
11624
11625 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
11626 || r_type == R_ARM_MOVT_BREL)
11627 value >>= 16;
11628
11629 insn &= 0xfff0f000;
11630 insn |= value & 0xfff;
11631 insn |= (value & 0xf000) << 4;
11632 bfd_put_32 (input_bfd, insn, hit_data);
11633 }
11634 return bfd_reloc_ok;
11635
11636 case R_ARM_THM_MOVW_ABS_NC:
11637 case R_ARM_THM_MOVT_ABS:
11638 case R_ARM_THM_MOVW_PREL_NC:
11639 case R_ARM_THM_MOVT_PREL:
11640 /* Until we properly support segment-base-relative addressing then
11641 we assume the segment base to be zero, as for the above relocations.
11642 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
11643 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
11644 as R_ARM_THM_MOVT_ABS. */
11645 case R_ARM_THM_MOVW_BREL_NC:
11646 case R_ARM_THM_MOVW_BREL:
11647 case R_ARM_THM_MOVT_BREL:
11648 {
11649 bfd_vma insn;
11650
11651 insn = bfd_get_16 (input_bfd, hit_data) << 16;
11652 insn |= bfd_get_16 (input_bfd, hit_data + 2);
11653
11654 if (globals->use_rel)
11655 {
11656 addend = ((insn >> 4) & 0xf000)
11657 | ((insn >> 15) & 0x0800)
11658 | ((insn >> 4) & 0x0700)
11659 | (insn & 0x00ff);
11660 signed_addend = (addend ^ 0x8000) - 0x8000;
11661 }
11662
11663 value += signed_addend;
11664
11665 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
11666 value -= (input_section->output_section->vma
11667 + input_section->output_offset + rel->r_offset);
11668
11669 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
11670 return bfd_reloc_overflow;
11671
11672 if (branch_type == ST_BRANCH_TO_THUMB)
11673 value |= 1;
11674
11675 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
11676 || r_type == R_ARM_THM_MOVT_BREL)
11677 value >>= 16;
11678
11679 insn &= 0xfbf08f00;
11680 insn |= (value & 0xf000) << 4;
11681 insn |= (value & 0x0800) << 15;
11682 insn |= (value & 0x0700) << 4;
11683 insn |= (value & 0x00ff);
11684
11685 bfd_put_16 (input_bfd, insn >> 16, hit_data);
11686 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
11687 }
11688 return bfd_reloc_ok;
11689
11690 case R_ARM_ALU_PC_G0_NC:
11691 case R_ARM_ALU_PC_G1_NC:
11692 case R_ARM_ALU_PC_G0:
11693 case R_ARM_ALU_PC_G1:
11694 case R_ARM_ALU_PC_G2:
11695 case R_ARM_ALU_SB_G0_NC:
11696 case R_ARM_ALU_SB_G1_NC:
11697 case R_ARM_ALU_SB_G0:
11698 case R_ARM_ALU_SB_G1:
11699 case R_ARM_ALU_SB_G2:
11700 {
11701 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11702 bfd_vma pc = input_section->output_section->vma
11703 + input_section->output_offset + rel->r_offset;
11704 /* sb is the origin of the *segment* containing the symbol. */
11705 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
11706 bfd_vma residual;
11707 bfd_vma g_n;
11708 bfd_signed_vma signed_value;
11709 int group = 0;
11710
11711 /* Determine which group of bits to select. */
11712 switch (r_type)
11713 {
11714 case R_ARM_ALU_PC_G0_NC:
11715 case R_ARM_ALU_PC_G0:
11716 case R_ARM_ALU_SB_G0_NC:
11717 case R_ARM_ALU_SB_G0:
11718 group = 0;
11719 break;
11720
11721 case R_ARM_ALU_PC_G1_NC:
11722 case R_ARM_ALU_PC_G1:
11723 case R_ARM_ALU_SB_G1_NC:
11724 case R_ARM_ALU_SB_G1:
11725 group = 1;
11726 break;
11727
11728 case R_ARM_ALU_PC_G2:
11729 case R_ARM_ALU_SB_G2:
11730 group = 2;
11731 break;
11732
11733 default:
11734 abort ();
11735 }
11736
11737 /* If REL, extract the addend from the insn. If RELA, it will
11738 have already been fetched for us. */
11739 if (globals->use_rel)
11740 {
11741 int negative;
11742 bfd_vma constant = insn & 0xff;
11743 bfd_vma rotation = (insn & 0xf00) >> 8;
11744
11745 if (rotation == 0)
11746 signed_addend = constant;
11747 else
11748 {
11749 /* Compensate for the fact that in the instruction, the
11750 rotation is stored in multiples of 2 bits. */
11751 rotation *= 2;
11752
11753 /* Rotate "constant" right by "rotation" bits. */
11754 signed_addend = (constant >> rotation) |
11755 (constant << (8 * sizeof (bfd_vma) - rotation));
11756 }
11757
11758 /* Determine if the instruction is an ADD or a SUB.
11759 (For REL, this determines the sign of the addend.) */
11760 negative = identify_add_or_sub (insn);
11761 if (negative == 0)
11762 {
11763 (*_bfd_error_handler)
11764 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
11765 input_bfd, input_section,
11766 (long) rel->r_offset, howto->name);
11767 return bfd_reloc_overflow;
11768 }
11769
11770 signed_addend *= negative;
11771 }
11772
11773 /* Compute the value (X) to go in the place. */
11774 if (r_type == R_ARM_ALU_PC_G0_NC
11775 || r_type == R_ARM_ALU_PC_G1_NC
11776 || r_type == R_ARM_ALU_PC_G0
11777 || r_type == R_ARM_ALU_PC_G1
11778 || r_type == R_ARM_ALU_PC_G2)
11779 /* PC relative. */
11780 signed_value = value - pc + signed_addend;
11781 else
11782 /* Section base relative. */
11783 signed_value = value - sb + signed_addend;
11784
11785 /* If the target symbol is a Thumb function, then set the
11786 Thumb bit in the address. */
11787 if (branch_type == ST_BRANCH_TO_THUMB)
11788 signed_value |= 1;
11789
11790 /* Calculate the value of the relevant G_n, in encoded
11791 constant-with-rotation format. */
11792 g_n = calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
11793 group, &residual);
11794
11795 /* Check for overflow if required. */
11796 if ((r_type == R_ARM_ALU_PC_G0
11797 || r_type == R_ARM_ALU_PC_G1
11798 || r_type == R_ARM_ALU_PC_G2
11799 || r_type == R_ARM_ALU_SB_G0
11800 || r_type == R_ARM_ALU_SB_G1
11801 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
11802 {
11803 (*_bfd_error_handler)
11804 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
11805 input_bfd, input_section,
11806 (long) rel->r_offset, signed_value < 0 ? - signed_value : signed_value,
11807 howto->name);
11808 return bfd_reloc_overflow;
11809 }
11810
11811 /* Mask out the value and the ADD/SUB part of the opcode; take care
11812 not to destroy the S bit. */
11813 insn &= 0xff1ff000;
11814
11815 /* Set the opcode according to whether the value to go in the
11816 place is negative. */
11817 if (signed_value < 0)
11818 insn |= 1 << 22;
11819 else
11820 insn |= 1 << 23;
11821
11822 /* Encode the offset. */
11823 insn |= g_n;
11824
11825 bfd_put_32 (input_bfd, insn, hit_data);
11826 }
11827 return bfd_reloc_ok;
11828
11829 case R_ARM_LDR_PC_G0:
11830 case R_ARM_LDR_PC_G1:
11831 case R_ARM_LDR_PC_G2:
11832 case R_ARM_LDR_SB_G0:
11833 case R_ARM_LDR_SB_G1:
11834 case R_ARM_LDR_SB_G2:
11835 {
11836 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11837 bfd_vma pc = input_section->output_section->vma
11838 + input_section->output_offset + rel->r_offset;
11839 /* sb is the origin of the *segment* containing the symbol. */
11840 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
11841 bfd_vma residual;
11842 bfd_signed_vma signed_value;
11843 int group = 0;
11844
11845 /* Determine which groups of bits to calculate. */
11846 switch (r_type)
11847 {
11848 case R_ARM_LDR_PC_G0:
11849 case R_ARM_LDR_SB_G0:
11850 group = 0;
11851 break;
11852
11853 case R_ARM_LDR_PC_G1:
11854 case R_ARM_LDR_SB_G1:
11855 group = 1;
11856 break;
11857
11858 case R_ARM_LDR_PC_G2:
11859 case R_ARM_LDR_SB_G2:
11860 group = 2;
11861 break;
11862
11863 default:
11864 abort ();
11865 }
11866
11867 /* If REL, extract the addend from the insn. If RELA, it will
11868 have already been fetched for us. */
11869 if (globals->use_rel)
11870 {
11871 int negative = (insn & (1 << 23)) ? 1 : -1;
11872 signed_addend = negative * (insn & 0xfff);
11873 }
11874
11875 /* Compute the value (X) to go in the place. */
11876 if (r_type == R_ARM_LDR_PC_G0
11877 || r_type == R_ARM_LDR_PC_G1
11878 || r_type == R_ARM_LDR_PC_G2)
11879 /* PC relative. */
11880 signed_value = value - pc + signed_addend;
11881 else
11882 /* Section base relative. */
11883 signed_value = value - sb + signed_addend;
11884
11885 /* Calculate the value of the relevant G_{n-1} to obtain
11886 the residual at that stage. */
11887 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
11888 group - 1, &residual);
11889
11890 /* Check for overflow. */
11891 if (residual >= 0x1000)
11892 {
11893 (*_bfd_error_handler)
11894 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
11895 input_bfd, input_section,
11896 (long) rel->r_offset, labs (signed_value), howto->name);
11897 return bfd_reloc_overflow;
11898 }
11899
11900 /* Mask out the value and U bit. */
11901 insn &= 0xff7ff000;
11902
11903 /* Set the U bit if the value to go in the place is non-negative. */
11904 if (signed_value >= 0)
11905 insn |= 1 << 23;
11906
11907 /* Encode the offset. */
11908 insn |= residual;
11909
11910 bfd_put_32 (input_bfd, insn, hit_data);
11911 }
11912 return bfd_reloc_ok;
11913
11914 case R_ARM_LDRS_PC_G0:
11915 case R_ARM_LDRS_PC_G1:
11916 case R_ARM_LDRS_PC_G2:
11917 case R_ARM_LDRS_SB_G0:
11918 case R_ARM_LDRS_SB_G1:
11919 case R_ARM_LDRS_SB_G2:
11920 {
11921 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11922 bfd_vma pc = input_section->output_section->vma
11923 + input_section->output_offset + rel->r_offset;
11924 /* sb is the origin of the *segment* containing the symbol. */
11925 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
11926 bfd_vma residual;
11927 bfd_signed_vma signed_value;
11928 int group = 0;
11929
11930 /* Determine which groups of bits to calculate. */
11931 switch (r_type)
11932 {
11933 case R_ARM_LDRS_PC_G0:
11934 case R_ARM_LDRS_SB_G0:
11935 group = 0;
11936 break;
11937
11938 case R_ARM_LDRS_PC_G1:
11939 case R_ARM_LDRS_SB_G1:
11940 group = 1;
11941 break;
11942
11943 case R_ARM_LDRS_PC_G2:
11944 case R_ARM_LDRS_SB_G2:
11945 group = 2;
11946 break;
11947
11948 default:
11949 abort ();
11950 }
11951
11952 /* If REL, extract the addend from the insn. If RELA, it will
11953 have already been fetched for us. */
11954 if (globals->use_rel)
11955 {
11956 int negative = (insn & (1 << 23)) ? 1 : -1;
11957 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
11958 }
11959
11960 /* Compute the value (X) to go in the place. */
11961 if (r_type == R_ARM_LDRS_PC_G0
11962 || r_type == R_ARM_LDRS_PC_G1
11963 || r_type == R_ARM_LDRS_PC_G2)
11964 /* PC relative. */
11965 signed_value = value - pc + signed_addend;
11966 else
11967 /* Section base relative. */
11968 signed_value = value - sb + signed_addend;
11969
11970 /* Calculate the value of the relevant G_{n-1} to obtain
11971 the residual at that stage. */
11972 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
11973 group - 1, &residual);
11974
11975 /* Check for overflow. */
11976 if (residual >= 0x100)
11977 {
11978 (*_bfd_error_handler)
11979 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
11980 input_bfd, input_section,
11981 (long) rel->r_offset, labs (signed_value), howto->name);
11982 return bfd_reloc_overflow;
11983 }
11984
11985 /* Mask out the value and U bit. */
11986 insn &= 0xff7ff0f0;
11987
11988 /* Set the U bit if the value to go in the place is non-negative. */
11989 if (signed_value >= 0)
11990 insn |= 1 << 23;
11991
11992 /* Encode the offset. */
11993 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
11994
11995 bfd_put_32 (input_bfd, insn, hit_data);
11996 }
11997 return bfd_reloc_ok;
11998
11999 case R_ARM_LDC_PC_G0:
12000 case R_ARM_LDC_PC_G1:
12001 case R_ARM_LDC_PC_G2:
12002 case R_ARM_LDC_SB_G0:
12003 case R_ARM_LDC_SB_G1:
12004 case R_ARM_LDC_SB_G2:
12005 {
12006 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12007 bfd_vma pc = input_section->output_section->vma
12008 + input_section->output_offset + rel->r_offset;
12009 /* sb is the origin of the *segment* containing the symbol. */
12010 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12011 bfd_vma residual;
12012 bfd_signed_vma signed_value;
12013 int group = 0;
12014
12015 /* Determine which groups of bits to calculate. */
12016 switch (r_type)
12017 {
12018 case R_ARM_LDC_PC_G0:
12019 case R_ARM_LDC_SB_G0:
12020 group = 0;
12021 break;
12022
12023 case R_ARM_LDC_PC_G1:
12024 case R_ARM_LDC_SB_G1:
12025 group = 1;
12026 break;
12027
12028 case R_ARM_LDC_PC_G2:
12029 case R_ARM_LDC_SB_G2:
12030 group = 2;
12031 break;
12032
12033 default:
12034 abort ();
12035 }
12036
12037 /* If REL, extract the addend from the insn. If RELA, it will
12038 have already been fetched for us. */
12039 if (globals->use_rel)
12040 {
12041 int negative = (insn & (1 << 23)) ? 1 : -1;
12042 signed_addend = negative * ((insn & 0xff) << 2);
12043 }
12044
12045 /* Compute the value (X) to go in the place. */
12046 if (r_type == R_ARM_LDC_PC_G0
12047 || r_type == R_ARM_LDC_PC_G1
12048 || r_type == R_ARM_LDC_PC_G2)
12049 /* PC relative. */
12050 signed_value = value - pc + signed_addend;
12051 else
12052 /* Section base relative. */
12053 signed_value = value - sb + signed_addend;
12054
12055 /* Calculate the value of the relevant G_{n-1} to obtain
12056 the residual at that stage. */
12057 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12058 group - 1, &residual);
12059
12060 /* Check for overflow. (The absolute value to go in the place must be
12061 divisible by four and, after having been divided by four, must
12062 fit in eight bits.) */
12063 if ((residual & 0x3) != 0 || residual >= 0x400)
12064 {
12065 (*_bfd_error_handler)
12066 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
12067 input_bfd, input_section,
12068 (long) rel->r_offset, labs (signed_value), howto->name);
12069 return bfd_reloc_overflow;
12070 }
12071
12072 /* Mask out the value and U bit. */
12073 insn &= 0xff7fff00;
12074
12075 /* Set the U bit if the value to go in the place is non-negative. */
12076 if (signed_value >= 0)
12077 insn |= 1 << 23;
12078
12079 /* Encode the offset. */
12080 insn |= residual >> 2;
12081
12082 bfd_put_32 (input_bfd, insn, hit_data);
12083 }
12084 return bfd_reloc_ok;
12085
12086 case R_ARM_THM_ALU_ABS_G0_NC:
12087 case R_ARM_THM_ALU_ABS_G1_NC:
12088 case R_ARM_THM_ALU_ABS_G2_NC:
12089 case R_ARM_THM_ALU_ABS_G3_NC:
12090 {
12091 const int shift_array[4] = {0, 8, 16, 24};
12092 bfd_vma insn = bfd_get_16 (input_bfd, hit_data);
12093 bfd_vma addr = value;
12094 int shift = shift_array[r_type - R_ARM_THM_ALU_ABS_G0_NC];
12095
12096 /* Compute address. */
12097 if (globals->use_rel)
12098 signed_addend = insn & 0xff;
12099 addr += signed_addend;
12100 if (branch_type == ST_BRANCH_TO_THUMB)
12101 addr |= 1;
12102 /* Clean imm8 insn. */
12103 insn &= 0xff00;
12104 /* And update with correct part of address. */
12105 insn |= (addr >> shift) & 0xff;
12106 /* Update insn. */
12107 bfd_put_16 (input_bfd, insn, hit_data);
12108 }
12109
12110 *unresolved_reloc_p = FALSE;
12111 return bfd_reloc_ok;
12112
12113 default:
12114 return bfd_reloc_notsupported;
12115 }
12116 }
12117
12118 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
12119 static void
12120 arm_add_to_rel (bfd * abfd,
12121 bfd_byte * address,
12122 reloc_howto_type * howto,
12123 bfd_signed_vma increment)
12124 {
12125 bfd_signed_vma addend;
12126
12127 if (howto->type == R_ARM_THM_CALL
12128 || howto->type == R_ARM_THM_JUMP24)
12129 {
12130 int upper_insn, lower_insn;
12131 int upper, lower;
12132
12133 upper_insn = bfd_get_16 (abfd, address);
12134 lower_insn = bfd_get_16 (abfd, address + 2);
12135 upper = upper_insn & 0x7ff;
12136 lower = lower_insn & 0x7ff;
12137
12138 addend = (upper << 12) | (lower << 1);
12139 addend += increment;
12140 addend >>= 1;
12141
12142 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
12143 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
12144
12145 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
12146 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
12147 }
12148 else
12149 {
12150 bfd_vma contents;
12151
12152 contents = bfd_get_32 (abfd, address);
12153
12154 /* Get the (signed) value from the instruction. */
12155 addend = contents & howto->src_mask;
12156 if (addend & ((howto->src_mask + 1) >> 1))
12157 {
12158 bfd_signed_vma mask;
12159
12160 mask = -1;
12161 mask &= ~ howto->src_mask;
12162 addend |= mask;
12163 }
12164
12165 /* Add in the increment, (which is a byte value). */
12166 switch (howto->type)
12167 {
12168 default:
12169 addend += increment;
12170 break;
12171
12172 case R_ARM_PC24:
12173 case R_ARM_PLT32:
12174 case R_ARM_CALL:
12175 case R_ARM_JUMP24:
12176 addend <<= howto->size;
12177 addend += increment;
12178
12179 /* Should we check for overflow here ? */
12180
12181 /* Drop any undesired bits. */
12182 addend >>= howto->rightshift;
12183 break;
12184 }
12185
12186 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
12187
12188 bfd_put_32 (abfd, contents, address);
12189 }
12190 }
12191
12192 #define IS_ARM_TLS_RELOC(R_TYPE) \
12193 ((R_TYPE) == R_ARM_TLS_GD32 \
12194 || (R_TYPE) == R_ARM_TLS_LDO32 \
12195 || (R_TYPE) == R_ARM_TLS_LDM32 \
12196 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
12197 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
12198 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
12199 || (R_TYPE) == R_ARM_TLS_LE32 \
12200 || (R_TYPE) == R_ARM_TLS_IE32 \
12201 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
12202
12203 /* Specific set of relocations for the gnu tls dialect. */
12204 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
12205 ((R_TYPE) == R_ARM_TLS_GOTDESC \
12206 || (R_TYPE) == R_ARM_TLS_CALL \
12207 || (R_TYPE) == R_ARM_THM_TLS_CALL \
12208 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
12209 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
12210
12211 /* Relocate an ARM ELF section. */
12212
12213 static bfd_boolean
12214 elf32_arm_relocate_section (bfd * output_bfd,
12215 struct bfd_link_info * info,
12216 bfd * input_bfd,
12217 asection * input_section,
12218 bfd_byte * contents,
12219 Elf_Internal_Rela * relocs,
12220 Elf_Internal_Sym * local_syms,
12221 asection ** local_sections)
12222 {
12223 Elf_Internal_Shdr *symtab_hdr;
12224 struct elf_link_hash_entry **sym_hashes;
12225 Elf_Internal_Rela *rel;
12226 Elf_Internal_Rela *relend;
12227 const char *name;
12228 struct elf32_arm_link_hash_table * globals;
12229
12230 globals = elf32_arm_hash_table (info);
12231 if (globals == NULL)
12232 return FALSE;
12233
12234 symtab_hdr = & elf_symtab_hdr (input_bfd);
12235 sym_hashes = elf_sym_hashes (input_bfd);
12236
12237 rel = relocs;
12238 relend = relocs + input_section->reloc_count;
12239 for (; rel < relend; rel++)
12240 {
12241 int r_type;
12242 reloc_howto_type * howto;
12243 unsigned long r_symndx;
12244 Elf_Internal_Sym * sym;
12245 asection * sec;
12246 struct elf_link_hash_entry * h;
12247 bfd_vma relocation;
12248 bfd_reloc_status_type r;
12249 arelent bfd_reloc;
12250 char sym_type;
12251 bfd_boolean unresolved_reloc = FALSE;
12252 char *error_message = NULL;
12253
12254 r_symndx = ELF32_R_SYM (rel->r_info);
12255 r_type = ELF32_R_TYPE (rel->r_info);
12256 r_type = arm_real_reloc_type (globals, r_type);
12257
12258 if ( r_type == R_ARM_GNU_VTENTRY
12259 || r_type == R_ARM_GNU_VTINHERIT)
12260 continue;
12261
12262 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
12263 howto = bfd_reloc.howto;
12264
12265 h = NULL;
12266 sym = NULL;
12267 sec = NULL;
12268
12269 if (r_symndx < symtab_hdr->sh_info)
12270 {
12271 sym = local_syms + r_symndx;
12272 sym_type = ELF32_ST_TYPE (sym->st_info);
12273 sec = local_sections[r_symndx];
12274
12275 /* An object file might have a reference to a local
12276 undefined symbol. This is a daft object file, but we
12277 should at least do something about it. V4BX & NONE
12278 relocations do not use the symbol and are explicitly
12279 allowed to use the undefined symbol, so allow those.
12280 Likewise for relocations against STN_UNDEF. */
12281 if (r_type != R_ARM_V4BX
12282 && r_type != R_ARM_NONE
12283 && r_symndx != STN_UNDEF
12284 && bfd_is_und_section (sec)
12285 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
12286 (*info->callbacks->undefined_symbol)
12287 (info, bfd_elf_string_from_elf_section
12288 (input_bfd, symtab_hdr->sh_link, sym->st_name),
12289 input_bfd, input_section,
12290 rel->r_offset, TRUE);
12291
12292 if (globals->use_rel)
12293 {
12294 relocation = (sec->output_section->vma
12295 + sec->output_offset
12296 + sym->st_value);
12297 if (!bfd_link_relocatable (info)
12298 && (sec->flags & SEC_MERGE)
12299 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
12300 {
12301 asection *msec;
12302 bfd_vma addend, value;
12303
12304 switch (r_type)
12305 {
12306 case R_ARM_MOVW_ABS_NC:
12307 case R_ARM_MOVT_ABS:
12308 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
12309 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
12310 addend = (addend ^ 0x8000) - 0x8000;
12311 break;
12312
12313 case R_ARM_THM_MOVW_ABS_NC:
12314 case R_ARM_THM_MOVT_ABS:
12315 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
12316 << 16;
12317 value |= bfd_get_16 (input_bfd,
12318 contents + rel->r_offset + 2);
12319 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
12320 | ((value & 0x04000000) >> 15);
12321 addend = (addend ^ 0x8000) - 0x8000;
12322 break;
12323
12324 default:
12325 if (howto->rightshift
12326 || (howto->src_mask & (howto->src_mask + 1)))
12327 {
12328 (*_bfd_error_handler)
12329 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
12330 input_bfd, input_section,
12331 (long) rel->r_offset, howto->name);
12332 return FALSE;
12333 }
12334
12335 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
12336
12337 /* Get the (signed) value from the instruction. */
12338 addend = value & howto->src_mask;
12339 if (addend & ((howto->src_mask + 1) >> 1))
12340 {
12341 bfd_signed_vma mask;
12342
12343 mask = -1;
12344 mask &= ~ howto->src_mask;
12345 addend |= mask;
12346 }
12347 break;
12348 }
12349
12350 msec = sec;
12351 addend =
12352 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
12353 - relocation;
12354 addend += msec->output_section->vma + msec->output_offset;
12355
12356 /* Cases here must match those in the preceding
12357 switch statement. */
12358 switch (r_type)
12359 {
12360 case R_ARM_MOVW_ABS_NC:
12361 case R_ARM_MOVT_ABS:
12362 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
12363 | (addend & 0xfff);
12364 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
12365 break;
12366
12367 case R_ARM_THM_MOVW_ABS_NC:
12368 case R_ARM_THM_MOVT_ABS:
12369 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
12370 | (addend & 0xff) | ((addend & 0x0800) << 15);
12371 bfd_put_16 (input_bfd, value >> 16,
12372 contents + rel->r_offset);
12373 bfd_put_16 (input_bfd, value,
12374 contents + rel->r_offset + 2);
12375 break;
12376
12377 default:
12378 value = (value & ~ howto->dst_mask)
12379 | (addend & howto->dst_mask);
12380 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
12381 break;
12382 }
12383 }
12384 }
12385 else
12386 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
12387 }
12388 else
12389 {
12390 bfd_boolean warned, ignored;
12391
12392 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
12393 r_symndx, symtab_hdr, sym_hashes,
12394 h, sec, relocation,
12395 unresolved_reloc, warned, ignored);
12396
12397 sym_type = h->type;
12398 }
12399
12400 if (sec != NULL && discarded_section (sec))
12401 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
12402 rel, 1, relend, howto, 0, contents);
12403
12404 if (bfd_link_relocatable (info))
12405 {
12406 /* This is a relocatable link. We don't have to change
12407 anything, unless the reloc is against a section symbol,
12408 in which case we have to adjust according to where the
12409 section symbol winds up in the output section. */
12410 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
12411 {
12412 if (globals->use_rel)
12413 arm_add_to_rel (input_bfd, contents + rel->r_offset,
12414 howto, (bfd_signed_vma) sec->output_offset);
12415 else
12416 rel->r_addend += sec->output_offset;
12417 }
12418 continue;
12419 }
12420
12421 if (h != NULL)
12422 name = h->root.root.string;
12423 else
12424 {
12425 name = (bfd_elf_string_from_elf_section
12426 (input_bfd, symtab_hdr->sh_link, sym->st_name));
12427 if (name == NULL || *name == '\0')
12428 name = bfd_section_name (input_bfd, sec);
12429 }
12430
12431 if (r_symndx != STN_UNDEF
12432 && r_type != R_ARM_NONE
12433 && (h == NULL
12434 || h->root.type == bfd_link_hash_defined
12435 || h->root.type == bfd_link_hash_defweak)
12436 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
12437 {
12438 (*_bfd_error_handler)
12439 ((sym_type == STT_TLS
12440 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
12441 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
12442 input_bfd,
12443 input_section,
12444 (long) rel->r_offset,
12445 howto->name,
12446 name);
12447 }
12448
12449 /* We call elf32_arm_final_link_relocate unless we're completely
12450 done, i.e., the relaxation produced the final output we want,
12451 and we won't let anybody mess with it. Also, we have to do
12452 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
12453 both in relaxed and non-relaxed cases. */
12454 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
12455 || (IS_ARM_TLS_GNU_RELOC (r_type)
12456 && !((h ? elf32_arm_hash_entry (h)->tls_type :
12457 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
12458 & GOT_TLS_GDESC)))
12459 {
12460 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
12461 contents, rel, h == NULL);
12462 /* This may have been marked unresolved because it came from
12463 a shared library. But we've just dealt with that. */
12464 unresolved_reloc = 0;
12465 }
12466 else
12467 r = bfd_reloc_continue;
12468
12469 if (r == bfd_reloc_continue)
12470 {
12471 unsigned char branch_type =
12472 h ? ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
12473 : ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
12474
12475 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
12476 input_section, contents, rel,
12477 relocation, info, sec, name,
12478 sym_type, branch_type, h,
12479 &unresolved_reloc,
12480 &error_message);
12481 }
12482
12483 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
12484 because such sections are not SEC_ALLOC and thus ld.so will
12485 not process them. */
12486 if (unresolved_reloc
12487 && !((input_section->flags & SEC_DEBUGGING) != 0
12488 && h->def_dynamic)
12489 && _bfd_elf_section_offset (output_bfd, info, input_section,
12490 rel->r_offset) != (bfd_vma) -1)
12491 {
12492 (*_bfd_error_handler)
12493 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
12494 input_bfd,
12495 input_section,
12496 (long) rel->r_offset,
12497 howto->name,
12498 h->root.root.string);
12499 return FALSE;
12500 }
12501
12502 if (r != bfd_reloc_ok)
12503 {
12504 switch (r)
12505 {
12506 case bfd_reloc_overflow:
12507 /* If the overflowing reloc was to an undefined symbol,
12508 we have already printed one error message and there
12509 is no point complaining again. */
12510 if (!h || h->root.type != bfd_link_hash_undefined)
12511 (*info->callbacks->reloc_overflow)
12512 (info, (h ? &h->root : NULL), name, howto->name,
12513 (bfd_vma) 0, input_bfd, input_section, rel->r_offset);
12514 break;
12515
12516 case bfd_reloc_undefined:
12517 (*info->callbacks->undefined_symbol)
12518 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
12519 break;
12520
12521 case bfd_reloc_outofrange:
12522 error_message = _("out of range");
12523 goto common_error;
12524
12525 case bfd_reloc_notsupported:
12526 error_message = _("unsupported relocation");
12527 goto common_error;
12528
12529 case bfd_reloc_dangerous:
12530 /* error_message should already be set. */
12531 goto common_error;
12532
12533 default:
12534 error_message = _("unknown error");
12535 /* Fall through. */
12536
12537 common_error:
12538 BFD_ASSERT (error_message != NULL);
12539 (*info->callbacks->reloc_dangerous)
12540 (info, error_message, input_bfd, input_section, rel->r_offset);
12541 break;
12542 }
12543 }
12544 }
12545
12546 return TRUE;
12547 }
12548
12549 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
12550 adds the edit to the start of the list. (The list must be built in order of
12551 ascending TINDEX: the function's callers are primarily responsible for
12552 maintaining that condition). */
12553
12554 static void
12555 add_unwind_table_edit (arm_unwind_table_edit **head,
12556 arm_unwind_table_edit **tail,
12557 arm_unwind_edit_type type,
12558 asection *linked_section,
12559 unsigned int tindex)
12560 {
12561 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
12562 xmalloc (sizeof (arm_unwind_table_edit));
12563
12564 new_edit->type = type;
12565 new_edit->linked_section = linked_section;
12566 new_edit->index = tindex;
12567
12568 if (tindex > 0)
12569 {
12570 new_edit->next = NULL;
12571
12572 if (*tail)
12573 (*tail)->next = new_edit;
12574
12575 (*tail) = new_edit;
12576
12577 if (!*head)
12578 (*head) = new_edit;
12579 }
12580 else
12581 {
12582 new_edit->next = *head;
12583
12584 if (!*tail)
12585 *tail = new_edit;
12586
12587 *head = new_edit;
12588 }
12589 }
12590
12591 static _arm_elf_section_data *get_arm_elf_section_data (asection *);
12592
12593 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
12594 static void
12595 adjust_exidx_size(asection *exidx_sec, int adjust)
12596 {
12597 asection *out_sec;
12598
12599 if (!exidx_sec->rawsize)
12600 exidx_sec->rawsize = exidx_sec->size;
12601
12602 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
12603 out_sec = exidx_sec->output_section;
12604 /* Adjust size of output section. */
12605 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
12606 }
12607
12608 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
12609 static void
12610 insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
12611 {
12612 struct _arm_elf_section_data *exidx_arm_data;
12613
12614 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
12615 add_unwind_table_edit (
12616 &exidx_arm_data->u.exidx.unwind_edit_list,
12617 &exidx_arm_data->u.exidx.unwind_edit_tail,
12618 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
12619
12620 exidx_arm_data->additional_reloc_count++;
12621
12622 adjust_exidx_size(exidx_sec, 8);
12623 }
12624
12625 /* Scan .ARM.exidx tables, and create a list describing edits which should be
12626 made to those tables, such that:
12627
12628 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
12629 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
12630 codes which have been inlined into the index).
12631
12632 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
12633
12634 The edits are applied when the tables are written
12635 (in elf32_arm_write_section). */
12636
12637 bfd_boolean
12638 elf32_arm_fix_exidx_coverage (asection **text_section_order,
12639 unsigned int num_text_sections,
12640 struct bfd_link_info *info,
12641 bfd_boolean merge_exidx_entries)
12642 {
12643 bfd *inp;
12644 unsigned int last_second_word = 0, i;
12645 asection *last_exidx_sec = NULL;
12646 asection *last_text_sec = NULL;
12647 int last_unwind_type = -1;
12648
12649 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
12650 text sections. */
12651 for (inp = info->input_bfds; inp != NULL; inp = inp->link.next)
12652 {
12653 asection *sec;
12654
12655 for (sec = inp->sections; sec != NULL; sec = sec->next)
12656 {
12657 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
12658 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
12659
12660 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
12661 continue;
12662
12663 if (elf_sec->linked_to)
12664 {
12665 Elf_Internal_Shdr *linked_hdr
12666 = &elf_section_data (elf_sec->linked_to)->this_hdr;
12667 struct _arm_elf_section_data *linked_sec_arm_data
12668 = get_arm_elf_section_data (linked_hdr->bfd_section);
12669
12670 if (linked_sec_arm_data == NULL)
12671 continue;
12672
12673 /* Link this .ARM.exidx section back from the text section it
12674 describes. */
12675 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
12676 }
12677 }
12678 }
12679
12680 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
12681 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
12682 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
12683
12684 for (i = 0; i < num_text_sections; i++)
12685 {
12686 asection *sec = text_section_order[i];
12687 asection *exidx_sec;
12688 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
12689 struct _arm_elf_section_data *exidx_arm_data;
12690 bfd_byte *contents = NULL;
12691 int deleted_exidx_bytes = 0;
12692 bfd_vma j;
12693 arm_unwind_table_edit *unwind_edit_head = NULL;
12694 arm_unwind_table_edit *unwind_edit_tail = NULL;
12695 Elf_Internal_Shdr *hdr;
12696 bfd *ibfd;
12697
12698 if (arm_data == NULL)
12699 continue;
12700
12701 exidx_sec = arm_data->u.text.arm_exidx_sec;
12702 if (exidx_sec == NULL)
12703 {
12704 /* Section has no unwind data. */
12705 if (last_unwind_type == 0 || !last_exidx_sec)
12706 continue;
12707
12708 /* Ignore zero sized sections. */
12709 if (sec->size == 0)
12710 continue;
12711
12712 insert_cantunwind_after(last_text_sec, last_exidx_sec);
12713 last_unwind_type = 0;
12714 continue;
12715 }
12716
12717 /* Skip /DISCARD/ sections. */
12718 if (bfd_is_abs_section (exidx_sec->output_section))
12719 continue;
12720
12721 hdr = &elf_section_data (exidx_sec)->this_hdr;
12722 if (hdr->sh_type != SHT_ARM_EXIDX)
12723 continue;
12724
12725 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
12726 if (exidx_arm_data == NULL)
12727 continue;
12728
12729 ibfd = exidx_sec->owner;
12730
12731 if (hdr->contents != NULL)
12732 contents = hdr->contents;
12733 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
12734 /* An error? */
12735 continue;
12736
12737 if (last_unwind_type > 0)
12738 {
12739 unsigned int first_word = bfd_get_32 (ibfd, contents);
12740 /* Add cantunwind if first unwind item does not match section
12741 start. */
12742 if (first_word != sec->vma)
12743 {
12744 insert_cantunwind_after (last_text_sec, last_exidx_sec);
12745 last_unwind_type = 0;
12746 }
12747 }
12748
12749 for (j = 0; j < hdr->sh_size; j += 8)
12750 {
12751 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
12752 int unwind_type;
12753 int elide = 0;
12754
12755 /* An EXIDX_CANTUNWIND entry. */
12756 if (second_word == 1)
12757 {
12758 if (last_unwind_type == 0)
12759 elide = 1;
12760 unwind_type = 0;
12761 }
12762 /* Inlined unwinding data. Merge if equal to previous. */
12763 else if ((second_word & 0x80000000) != 0)
12764 {
12765 if (merge_exidx_entries
12766 && last_second_word == second_word && last_unwind_type == 1)
12767 elide = 1;
12768 unwind_type = 1;
12769 last_second_word = second_word;
12770 }
12771 /* Normal table entry. In theory we could merge these too,
12772 but duplicate entries are likely to be much less common. */
12773 else
12774 unwind_type = 2;
12775
12776 if (elide && !bfd_link_relocatable (info))
12777 {
12778 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
12779 DELETE_EXIDX_ENTRY, NULL, j / 8);
12780
12781 deleted_exidx_bytes += 8;
12782 }
12783
12784 last_unwind_type = unwind_type;
12785 }
12786
12787 /* Free contents if we allocated it ourselves. */
12788 if (contents != hdr->contents)
12789 free (contents);
12790
12791 /* Record edits to be applied later (in elf32_arm_write_section). */
12792 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
12793 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
12794
12795 if (deleted_exidx_bytes > 0)
12796 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
12797
12798 last_exidx_sec = exidx_sec;
12799 last_text_sec = sec;
12800 }
12801
12802 /* Add terminating CANTUNWIND entry. */
12803 if (!bfd_link_relocatable (info) && last_exidx_sec
12804 && last_unwind_type != 0)
12805 insert_cantunwind_after(last_text_sec, last_exidx_sec);
12806
12807 return TRUE;
12808 }
12809
12810 static bfd_boolean
12811 elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
12812 bfd *ibfd, const char *name)
12813 {
12814 asection *sec, *osec;
12815
12816 sec = bfd_get_linker_section (ibfd, name);
12817 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
12818 return TRUE;
12819
12820 osec = sec->output_section;
12821 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
12822 return TRUE;
12823
12824 if (! bfd_set_section_contents (obfd, osec, sec->contents,
12825 sec->output_offset, sec->size))
12826 return FALSE;
12827
12828 return TRUE;
12829 }
12830
12831 static bfd_boolean
12832 elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
12833 {
12834 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
12835 asection *sec, *osec;
12836
12837 if (globals == NULL)
12838 return FALSE;
12839
12840 /* Invoke the regular ELF backend linker to do all the work. */
12841 if (!bfd_elf_final_link (abfd, info))
12842 return FALSE;
12843
12844 /* Process stub sections (eg BE8 encoding, ...). */
12845 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
12846 unsigned int i;
12847 for (i=0; i<htab->top_id; i++)
12848 {
12849 sec = htab->stub_group[i].stub_sec;
12850 /* Only process it once, in its link_sec slot. */
12851 if (sec && i == htab->stub_group[i].link_sec->id)
12852 {
12853 osec = sec->output_section;
12854 elf32_arm_write_section (abfd, info, sec, sec->contents);
12855 if (! bfd_set_section_contents (abfd, osec, sec->contents,
12856 sec->output_offset, sec->size))
12857 return FALSE;
12858 }
12859 }
12860
12861 /* Write out any glue sections now that we have created all the
12862 stubs. */
12863 if (globals->bfd_of_glue_owner != NULL)
12864 {
12865 if (! elf32_arm_output_glue_section (info, abfd,
12866 globals->bfd_of_glue_owner,
12867 ARM2THUMB_GLUE_SECTION_NAME))
12868 return FALSE;
12869
12870 if (! elf32_arm_output_glue_section (info, abfd,
12871 globals->bfd_of_glue_owner,
12872 THUMB2ARM_GLUE_SECTION_NAME))
12873 return FALSE;
12874
12875 if (! elf32_arm_output_glue_section (info, abfd,
12876 globals->bfd_of_glue_owner,
12877 VFP11_ERRATUM_VENEER_SECTION_NAME))
12878 return FALSE;
12879
12880 if (! elf32_arm_output_glue_section (info, abfd,
12881 globals->bfd_of_glue_owner,
12882 STM32L4XX_ERRATUM_VENEER_SECTION_NAME))
12883 return FALSE;
12884
12885 if (! elf32_arm_output_glue_section (info, abfd,
12886 globals->bfd_of_glue_owner,
12887 ARM_BX_GLUE_SECTION_NAME))
12888 return FALSE;
12889 }
12890
12891 return TRUE;
12892 }
12893
12894 /* Return a best guess for the machine number based on the attributes. */
12895
12896 static unsigned int
12897 bfd_arm_get_mach_from_attributes (bfd * abfd)
12898 {
12899 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
12900
12901 switch (arch)
12902 {
12903 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
12904 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
12905 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
12906
12907 case TAG_CPU_ARCH_V5TE:
12908 {
12909 char * name;
12910
12911 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
12912 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
12913
12914 if (name)
12915 {
12916 if (strcmp (name, "IWMMXT2") == 0)
12917 return bfd_mach_arm_iWMMXt2;
12918
12919 if (strcmp (name, "IWMMXT") == 0)
12920 return bfd_mach_arm_iWMMXt;
12921
12922 if (strcmp (name, "XSCALE") == 0)
12923 {
12924 int wmmx;
12925
12926 BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES);
12927 wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i;
12928 switch (wmmx)
12929 {
12930 case 1: return bfd_mach_arm_iWMMXt;
12931 case 2: return bfd_mach_arm_iWMMXt2;
12932 default: return bfd_mach_arm_XScale;
12933 }
12934 }
12935 }
12936
12937 return bfd_mach_arm_5TE;
12938 }
12939
12940 default:
12941 return bfd_mach_arm_unknown;
12942 }
12943 }
12944
12945 /* Set the right machine number. */
12946
12947 static bfd_boolean
12948 elf32_arm_object_p (bfd *abfd)
12949 {
12950 unsigned int mach;
12951
12952 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
12953
12954 if (mach == bfd_mach_arm_unknown)
12955 {
12956 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
12957 mach = bfd_mach_arm_ep9312;
12958 else
12959 mach = bfd_arm_get_mach_from_attributes (abfd);
12960 }
12961
12962 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
12963 return TRUE;
12964 }
12965
12966 /* Function to keep ARM specific flags in the ELF header. */
12967
12968 static bfd_boolean
12969 elf32_arm_set_private_flags (bfd *abfd, flagword flags)
12970 {
12971 if (elf_flags_init (abfd)
12972 && elf_elfheader (abfd)->e_flags != flags)
12973 {
12974 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
12975 {
12976 if (flags & EF_ARM_INTERWORK)
12977 (*_bfd_error_handler)
12978 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
12979 abfd);
12980 else
12981 _bfd_error_handler
12982 (_("Warning: Clearing the interworking flag of %B due to outside request"),
12983 abfd);
12984 }
12985 }
12986 else
12987 {
12988 elf_elfheader (abfd)->e_flags = flags;
12989 elf_flags_init (abfd) = TRUE;
12990 }
12991
12992 return TRUE;
12993 }
12994
12995 /* Copy backend specific data from one object module to another. */
12996
12997 static bfd_boolean
12998 elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
12999 {
13000 flagword in_flags;
13001 flagword out_flags;
13002
13003 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
13004 return TRUE;
13005
13006 in_flags = elf_elfheader (ibfd)->e_flags;
13007 out_flags = elf_elfheader (obfd)->e_flags;
13008
13009 if (elf_flags_init (obfd)
13010 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
13011 && in_flags != out_flags)
13012 {
13013 /* Cannot mix APCS26 and APCS32 code. */
13014 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
13015 return FALSE;
13016
13017 /* Cannot mix float APCS and non-float APCS code. */
13018 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
13019 return FALSE;
13020
13021 /* If the src and dest have different interworking flags
13022 then turn off the interworking bit. */
13023 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
13024 {
13025 if (out_flags & EF_ARM_INTERWORK)
13026 _bfd_error_handler
13027 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
13028 obfd, ibfd);
13029
13030 in_flags &= ~EF_ARM_INTERWORK;
13031 }
13032
13033 /* Likewise for PIC, though don't warn for this case. */
13034 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
13035 in_flags &= ~EF_ARM_PIC;
13036 }
13037
13038 elf_elfheader (obfd)->e_flags = in_flags;
13039 elf_flags_init (obfd) = TRUE;
13040
13041 return _bfd_elf_copy_private_bfd_data (ibfd, obfd);
13042 }
13043
13044 /* Values for Tag_ABI_PCS_R9_use. */
13045 enum
13046 {
13047 AEABI_R9_V6,
13048 AEABI_R9_SB,
13049 AEABI_R9_TLS,
13050 AEABI_R9_unused
13051 };
13052
13053 /* Values for Tag_ABI_PCS_RW_data. */
13054 enum
13055 {
13056 AEABI_PCS_RW_data_absolute,
13057 AEABI_PCS_RW_data_PCrel,
13058 AEABI_PCS_RW_data_SBrel,
13059 AEABI_PCS_RW_data_unused
13060 };
13061
13062 /* Values for Tag_ABI_enum_size. */
13063 enum
13064 {
13065 AEABI_enum_unused,
13066 AEABI_enum_short,
13067 AEABI_enum_wide,
13068 AEABI_enum_forced_wide
13069 };
13070
13071 /* Determine whether an object attribute tag takes an integer, a
13072 string or both. */
13073
13074 static int
13075 elf32_arm_obj_attrs_arg_type (int tag)
13076 {
13077 if (tag == Tag_compatibility)
13078 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
13079 else if (tag == Tag_nodefaults)
13080 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
13081 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
13082 return ATTR_TYPE_FLAG_STR_VAL;
13083 else if (tag < 32)
13084 return ATTR_TYPE_FLAG_INT_VAL;
13085 else
13086 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
13087 }
13088
13089 /* The ABI defines that Tag_conformance should be emitted first, and that
13090 Tag_nodefaults should be second (if either is defined). This sets those
13091 two positions, and bumps up the position of all the remaining tags to
13092 compensate. */
13093 static int
13094 elf32_arm_obj_attrs_order (int num)
13095 {
13096 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
13097 return Tag_conformance;
13098 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
13099 return Tag_nodefaults;
13100 if ((num - 2) < Tag_nodefaults)
13101 return num - 2;
13102 if ((num - 1) < Tag_conformance)
13103 return num - 1;
13104 return num;
13105 }
13106
13107 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
13108 static bfd_boolean
13109 elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
13110 {
13111 if ((tag & 127) < 64)
13112 {
13113 _bfd_error_handler
13114 (_("%B: Unknown mandatory EABI object attribute %d"),
13115 abfd, tag);
13116 bfd_set_error (bfd_error_bad_value);
13117 return FALSE;
13118 }
13119 else
13120 {
13121 _bfd_error_handler
13122 (_("Warning: %B: Unknown EABI object attribute %d"),
13123 abfd, tag);
13124 return TRUE;
13125 }
13126 }
13127
13128 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
13129 Returns -1 if no architecture could be read. */
13130
13131 static int
13132 get_secondary_compatible_arch (bfd *abfd)
13133 {
13134 obj_attribute *attr =
13135 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
13136
13137 /* Note: the tag and its argument below are uleb128 values, though
13138 currently-defined values fit in one byte for each. */
13139 if (attr->s
13140 && attr->s[0] == Tag_CPU_arch
13141 && (attr->s[1] & 128) != 128
13142 && attr->s[2] == 0)
13143 return attr->s[1];
13144
13145 /* This tag is "safely ignorable", so don't complain if it looks funny. */
13146 return -1;
13147 }
13148
13149 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
13150 The tag is removed if ARCH is -1. */
13151
13152 static void
13153 set_secondary_compatible_arch (bfd *abfd, int arch)
13154 {
13155 obj_attribute *attr =
13156 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
13157
13158 if (arch == -1)
13159 {
13160 attr->s = NULL;
13161 return;
13162 }
13163
13164 /* Note: the tag and its argument below are uleb128 values, though
13165 currently-defined values fit in one byte for each. */
13166 if (!attr->s)
13167 attr->s = (char *) bfd_alloc (abfd, 3);
13168 attr->s[0] = Tag_CPU_arch;
13169 attr->s[1] = arch;
13170 attr->s[2] = '\0';
13171 }
13172
13173 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
13174 into account. */
13175
13176 static int
13177 tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
13178 int newtag, int secondary_compat)
13179 {
13180 #define T(X) TAG_CPU_ARCH_##X
13181 int tagl, tagh, result;
13182 const int v6t2[] =
13183 {
13184 T(V6T2), /* PRE_V4. */
13185 T(V6T2), /* V4. */
13186 T(V6T2), /* V4T. */
13187 T(V6T2), /* V5T. */
13188 T(V6T2), /* V5TE. */
13189 T(V6T2), /* V5TEJ. */
13190 T(V6T2), /* V6. */
13191 T(V7), /* V6KZ. */
13192 T(V6T2) /* V6T2. */
13193 };
13194 const int v6k[] =
13195 {
13196 T(V6K), /* PRE_V4. */
13197 T(V6K), /* V4. */
13198 T(V6K), /* V4T. */
13199 T(V6K), /* V5T. */
13200 T(V6K), /* V5TE. */
13201 T(V6K), /* V5TEJ. */
13202 T(V6K), /* V6. */
13203 T(V6KZ), /* V6KZ. */
13204 T(V7), /* V6T2. */
13205 T(V6K) /* V6K. */
13206 };
13207 const int v7[] =
13208 {
13209 T(V7), /* PRE_V4. */
13210 T(V7), /* V4. */
13211 T(V7), /* V4T. */
13212 T(V7), /* V5T. */
13213 T(V7), /* V5TE. */
13214 T(V7), /* V5TEJ. */
13215 T(V7), /* V6. */
13216 T(V7), /* V6KZ. */
13217 T(V7), /* V6T2. */
13218 T(V7), /* V6K. */
13219 T(V7) /* V7. */
13220 };
13221 const int v6_m[] =
13222 {
13223 -1, /* PRE_V4. */
13224 -1, /* V4. */
13225 T(V6K), /* V4T. */
13226 T(V6K), /* V5T. */
13227 T(V6K), /* V5TE. */
13228 T(V6K), /* V5TEJ. */
13229 T(V6K), /* V6. */
13230 T(V6KZ), /* V6KZ. */
13231 T(V7), /* V6T2. */
13232 T(V6K), /* V6K. */
13233 T(V7), /* V7. */
13234 T(V6_M) /* V6_M. */
13235 };
13236 const int v6s_m[] =
13237 {
13238 -1, /* PRE_V4. */
13239 -1, /* V4. */
13240 T(V6K), /* V4T. */
13241 T(V6K), /* V5T. */
13242 T(V6K), /* V5TE. */
13243 T(V6K), /* V5TEJ. */
13244 T(V6K), /* V6. */
13245 T(V6KZ), /* V6KZ. */
13246 T(V7), /* V6T2. */
13247 T(V6K), /* V6K. */
13248 T(V7), /* V7. */
13249 T(V6S_M), /* V6_M. */
13250 T(V6S_M) /* V6S_M. */
13251 };
13252 const int v7e_m[] =
13253 {
13254 -1, /* PRE_V4. */
13255 -1, /* V4. */
13256 T(V7E_M), /* V4T. */
13257 T(V7E_M), /* V5T. */
13258 T(V7E_M), /* V5TE. */
13259 T(V7E_M), /* V5TEJ. */
13260 T(V7E_M), /* V6. */
13261 T(V7E_M), /* V6KZ. */
13262 T(V7E_M), /* V6T2. */
13263 T(V7E_M), /* V6K. */
13264 T(V7E_M), /* V7. */
13265 T(V7E_M), /* V6_M. */
13266 T(V7E_M), /* V6S_M. */
13267 T(V7E_M) /* V7E_M. */
13268 };
13269 const int v8[] =
13270 {
13271 T(V8), /* PRE_V4. */
13272 T(V8), /* V4. */
13273 T(V8), /* V4T. */
13274 T(V8), /* V5T. */
13275 T(V8), /* V5TE. */
13276 T(V8), /* V5TEJ. */
13277 T(V8), /* V6. */
13278 T(V8), /* V6KZ. */
13279 T(V8), /* V6T2. */
13280 T(V8), /* V6K. */
13281 T(V8), /* V7. */
13282 T(V8), /* V6_M. */
13283 T(V8), /* V6S_M. */
13284 T(V8), /* V7E_M. */
13285 T(V8) /* V8. */
13286 };
13287 const int v8m_baseline[] =
13288 {
13289 -1, /* PRE_V4. */
13290 -1, /* V4. */
13291 -1, /* V4T. */
13292 -1, /* V5T. */
13293 -1, /* V5TE. */
13294 -1, /* V5TEJ. */
13295 -1, /* V6. */
13296 -1, /* V6KZ. */
13297 -1, /* V6T2. */
13298 -1, /* V6K. */
13299 -1, /* V7. */
13300 T(V8M_BASE), /* V6_M. */
13301 T(V8M_BASE), /* V6S_M. */
13302 -1, /* V7E_M. */
13303 -1, /* V8. */
13304 -1,
13305 T(V8M_BASE) /* V8-M BASELINE. */
13306 };
13307 const int v8m_mainline[] =
13308 {
13309 -1, /* PRE_V4. */
13310 -1, /* V4. */
13311 -1, /* V4T. */
13312 -1, /* V5T. */
13313 -1, /* V5TE. */
13314 -1, /* V5TEJ. */
13315 -1, /* V6. */
13316 -1, /* V6KZ. */
13317 -1, /* V6T2. */
13318 -1, /* V6K. */
13319 T(V8M_MAIN), /* V7. */
13320 T(V8M_MAIN), /* V6_M. */
13321 T(V8M_MAIN), /* V6S_M. */
13322 T(V8M_MAIN), /* V7E_M. */
13323 -1, /* V8. */
13324 -1,
13325 T(V8M_MAIN), /* V8-M BASELINE. */
13326 T(V8M_MAIN) /* V8-M MAINLINE. */
13327 };
13328 const int v4t_plus_v6_m[] =
13329 {
13330 -1, /* PRE_V4. */
13331 -1, /* V4. */
13332 T(V4T), /* V4T. */
13333 T(V5T), /* V5T. */
13334 T(V5TE), /* V5TE. */
13335 T(V5TEJ), /* V5TEJ. */
13336 T(V6), /* V6. */
13337 T(V6KZ), /* V6KZ. */
13338 T(V6T2), /* V6T2. */
13339 T(V6K), /* V6K. */
13340 T(V7), /* V7. */
13341 T(V6_M), /* V6_M. */
13342 T(V6S_M), /* V6S_M. */
13343 T(V7E_M), /* V7E_M. */
13344 T(V8), /* V8. */
13345 -1, /* Unused. */
13346 T(V8M_BASE), /* V8-M BASELINE. */
13347 T(V8M_MAIN), /* V8-M MAINLINE. */
13348 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
13349 };
13350 const int *comb[] =
13351 {
13352 v6t2,
13353 v6k,
13354 v7,
13355 v6_m,
13356 v6s_m,
13357 v7e_m,
13358 v8,
13359 NULL,
13360 v8m_baseline,
13361 v8m_mainline,
13362 /* Pseudo-architecture. */
13363 v4t_plus_v6_m
13364 };
13365
13366 /* Check we've not got a higher architecture than we know about. */
13367
13368 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
13369 {
13370 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
13371 return -1;
13372 }
13373
13374 /* Override old tag if we have a Tag_also_compatible_with on the output. */
13375
13376 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
13377 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
13378 oldtag = T(V4T_PLUS_V6_M);
13379
13380 /* And override the new tag if we have a Tag_also_compatible_with on the
13381 input. */
13382
13383 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
13384 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
13385 newtag = T(V4T_PLUS_V6_M);
13386
13387 tagl = (oldtag < newtag) ? oldtag : newtag;
13388 result = tagh = (oldtag > newtag) ? oldtag : newtag;
13389
13390 /* Architectures before V6KZ add features monotonically. */
13391 if (tagh <= TAG_CPU_ARCH_V6KZ)
13392 return result;
13393
13394 result = comb[tagh - T(V6T2)] ? comb[tagh - T(V6T2)][tagl] : -1;
13395
13396 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
13397 as the canonical version. */
13398 if (result == T(V4T_PLUS_V6_M))
13399 {
13400 result = T(V4T);
13401 *secondary_compat_out = T(V6_M);
13402 }
13403 else
13404 *secondary_compat_out = -1;
13405
13406 if (result == -1)
13407 {
13408 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
13409 ibfd, oldtag, newtag);
13410 return -1;
13411 }
13412
13413 return result;
13414 #undef T
13415 }
13416
13417 /* Query attributes object to see if integer divide instructions may be
13418 present in an object. */
13419 static bfd_boolean
13420 elf32_arm_attributes_accept_div (const obj_attribute *attr)
13421 {
13422 int arch = attr[Tag_CPU_arch].i;
13423 int profile = attr[Tag_CPU_arch_profile].i;
13424
13425 switch (attr[Tag_DIV_use].i)
13426 {
13427 case 0:
13428 /* Integer divide allowed if instruction contained in archetecture. */
13429 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
13430 return TRUE;
13431 else if (arch >= TAG_CPU_ARCH_V7E_M)
13432 return TRUE;
13433 else
13434 return FALSE;
13435
13436 case 1:
13437 /* Integer divide explicitly prohibited. */
13438 return FALSE;
13439
13440 default:
13441 /* Unrecognised case - treat as allowing divide everywhere. */
13442 case 2:
13443 /* Integer divide allowed in ARM state. */
13444 return TRUE;
13445 }
13446 }
13447
13448 /* Query attributes object to see if integer divide instructions are
13449 forbidden to be in the object. This is not the inverse of
13450 elf32_arm_attributes_accept_div. */
13451 static bfd_boolean
13452 elf32_arm_attributes_forbid_div (const obj_attribute *attr)
13453 {
13454 return attr[Tag_DIV_use].i == 1;
13455 }
13456
13457 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
13458 are conflicting attributes. */
13459
13460 static bfd_boolean
13461 elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
13462 {
13463 obj_attribute *in_attr;
13464 obj_attribute *out_attr;
13465 /* Some tags have 0 = don't care, 1 = strong requirement,
13466 2 = weak requirement. */
13467 static const int order_021[3] = {0, 2, 1};
13468 int i;
13469 bfd_boolean result = TRUE;
13470 const char *sec_name = get_elf_backend_data (ibfd)->obj_attrs_section;
13471
13472 /* Skip the linker stubs file. This preserves previous behavior
13473 of accepting unknown attributes in the first input file - but
13474 is that a bug? */
13475 if (ibfd->flags & BFD_LINKER_CREATED)
13476 return TRUE;
13477
13478 /* Skip any input that hasn't attribute section.
13479 This enables to link object files without attribute section with
13480 any others. */
13481 if (bfd_get_section_by_name (ibfd, sec_name) == NULL)
13482 return TRUE;
13483
13484 if (!elf_known_obj_attributes_proc (obfd)[0].i)
13485 {
13486 /* This is the first object. Copy the attributes. */
13487 _bfd_elf_copy_obj_attributes (ibfd, obfd);
13488
13489 out_attr = elf_known_obj_attributes_proc (obfd);
13490
13491 /* Use the Tag_null value to indicate the attributes have been
13492 initialized. */
13493 out_attr[0].i = 1;
13494
13495 /* We do not output objects with Tag_MPextension_use_legacy - we move
13496 the attribute's value to Tag_MPextension_use. */
13497 if (out_attr[Tag_MPextension_use_legacy].i != 0)
13498 {
13499 if (out_attr[Tag_MPextension_use].i != 0
13500 && out_attr[Tag_MPextension_use_legacy].i
13501 != out_attr[Tag_MPextension_use].i)
13502 {
13503 _bfd_error_handler
13504 (_("Error: %B has both the current and legacy "
13505 "Tag_MPextension_use attributes"), ibfd);
13506 result = FALSE;
13507 }
13508
13509 out_attr[Tag_MPextension_use] =
13510 out_attr[Tag_MPextension_use_legacy];
13511 out_attr[Tag_MPextension_use_legacy].type = 0;
13512 out_attr[Tag_MPextension_use_legacy].i = 0;
13513 }
13514
13515 return result;
13516 }
13517
13518 in_attr = elf_known_obj_attributes_proc (ibfd);
13519 out_attr = elf_known_obj_attributes_proc (obfd);
13520 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
13521 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
13522 {
13523 /* Ignore mismatches if the object doesn't use floating point or is
13524 floating point ABI independent. */
13525 if (out_attr[Tag_ABI_FP_number_model].i == AEABI_FP_number_model_none
13526 || (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
13527 && out_attr[Tag_ABI_VFP_args].i == AEABI_VFP_args_compatible))
13528 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
13529 else if (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
13530 && in_attr[Tag_ABI_VFP_args].i != AEABI_VFP_args_compatible)
13531 {
13532 _bfd_error_handler
13533 (_("error: %B uses VFP register arguments, %B does not"),
13534 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
13535 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
13536 result = FALSE;
13537 }
13538 }
13539
13540 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
13541 {
13542 /* Merge this attribute with existing attributes. */
13543 switch (i)
13544 {
13545 case Tag_CPU_raw_name:
13546 case Tag_CPU_name:
13547 /* These are merged after Tag_CPU_arch. */
13548 break;
13549
13550 case Tag_ABI_optimization_goals:
13551 case Tag_ABI_FP_optimization_goals:
13552 /* Use the first value seen. */
13553 break;
13554
13555 case Tag_CPU_arch:
13556 {
13557 int secondary_compat = -1, secondary_compat_out = -1;
13558 unsigned int saved_out_attr = out_attr[i].i;
13559 int arch_attr;
13560 static const char *name_table[] =
13561 {
13562 /* These aren't real CPU names, but we can't guess
13563 that from the architecture version alone. */
13564 "Pre v4",
13565 "ARM v4",
13566 "ARM v4T",
13567 "ARM v5T",
13568 "ARM v5TE",
13569 "ARM v5TEJ",
13570 "ARM v6",
13571 "ARM v6KZ",
13572 "ARM v6T2",
13573 "ARM v6K",
13574 "ARM v7",
13575 "ARM v6-M",
13576 "ARM v6S-M",
13577 "ARM v8",
13578 "",
13579 "ARM v8-M.baseline",
13580 "ARM v8-M.mainline",
13581 };
13582
13583 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
13584 secondary_compat = get_secondary_compatible_arch (ibfd);
13585 secondary_compat_out = get_secondary_compatible_arch (obfd);
13586 arch_attr = tag_cpu_arch_combine (ibfd, out_attr[i].i,
13587 &secondary_compat_out,
13588 in_attr[i].i,
13589 secondary_compat);
13590
13591 /* Return with error if failed to merge. */
13592 if (arch_attr == -1)
13593 return FALSE;
13594
13595 out_attr[i].i = arch_attr;
13596
13597 set_secondary_compatible_arch (obfd, secondary_compat_out);
13598
13599 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
13600 if (out_attr[i].i == saved_out_attr)
13601 ; /* Leave the names alone. */
13602 else if (out_attr[i].i == in_attr[i].i)
13603 {
13604 /* The output architecture has been changed to match the
13605 input architecture. Use the input names. */
13606 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
13607 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
13608 : NULL;
13609 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
13610 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
13611 : NULL;
13612 }
13613 else
13614 {
13615 out_attr[Tag_CPU_name].s = NULL;
13616 out_attr[Tag_CPU_raw_name].s = NULL;
13617 }
13618
13619 /* If we still don't have a value for Tag_CPU_name,
13620 make one up now. Tag_CPU_raw_name remains blank. */
13621 if (out_attr[Tag_CPU_name].s == NULL
13622 && out_attr[i].i < ARRAY_SIZE (name_table))
13623 out_attr[Tag_CPU_name].s =
13624 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
13625 }
13626 break;
13627
13628 case Tag_ARM_ISA_use:
13629 case Tag_THUMB_ISA_use:
13630 case Tag_WMMX_arch:
13631 case Tag_Advanced_SIMD_arch:
13632 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
13633 case Tag_ABI_FP_rounding:
13634 case Tag_ABI_FP_exceptions:
13635 case Tag_ABI_FP_user_exceptions:
13636 case Tag_ABI_FP_number_model:
13637 case Tag_FP_HP_extension:
13638 case Tag_CPU_unaligned_access:
13639 case Tag_T2EE_use:
13640 case Tag_MPextension_use:
13641 /* Use the largest value specified. */
13642 if (in_attr[i].i > out_attr[i].i)
13643 out_attr[i].i = in_attr[i].i;
13644 break;
13645
13646 case Tag_ABI_align_preserved:
13647 case Tag_ABI_PCS_RO_data:
13648 /* Use the smallest value specified. */
13649 if (in_attr[i].i < out_attr[i].i)
13650 out_attr[i].i = in_attr[i].i;
13651 break;
13652
13653 case Tag_ABI_align_needed:
13654 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
13655 && (in_attr[Tag_ABI_align_preserved].i == 0
13656 || out_attr[Tag_ABI_align_preserved].i == 0))
13657 {
13658 /* This error message should be enabled once all non-conformant
13659 binaries in the toolchain have had the attributes set
13660 properly.
13661 _bfd_error_handler
13662 (_("error: %B: 8-byte data alignment conflicts with %B"),
13663 obfd, ibfd);
13664 result = FALSE; */
13665 }
13666 /* Fall through. */
13667 case Tag_ABI_FP_denormal:
13668 case Tag_ABI_PCS_GOT_use:
13669 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
13670 value if greater than 2 (for future-proofing). */
13671 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
13672 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
13673 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
13674 out_attr[i].i = in_attr[i].i;
13675 break;
13676
13677 case Tag_Virtualization_use:
13678 /* The virtualization tag effectively stores two bits of
13679 information: the intended use of TrustZone (in bit 0), and the
13680 intended use of Virtualization (in bit 1). */
13681 if (out_attr[i].i == 0)
13682 out_attr[i].i = in_attr[i].i;
13683 else if (in_attr[i].i != 0
13684 && in_attr[i].i != out_attr[i].i)
13685 {
13686 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
13687 out_attr[i].i = 3;
13688 else
13689 {
13690 _bfd_error_handler
13691 (_("error: %B: unable to merge virtualization attributes "
13692 "with %B"),
13693 obfd, ibfd);
13694 result = FALSE;
13695 }
13696 }
13697 break;
13698
13699 case Tag_CPU_arch_profile:
13700 if (out_attr[i].i != in_attr[i].i)
13701 {
13702 /* 0 will merge with anything.
13703 'A' and 'S' merge to 'A'.
13704 'R' and 'S' merge to 'R'.
13705 'M' and 'A|R|S' is an error. */
13706 if (out_attr[i].i == 0
13707 || (out_attr[i].i == 'S'
13708 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
13709 out_attr[i].i = in_attr[i].i;
13710 else if (in_attr[i].i == 0
13711 || (in_attr[i].i == 'S'
13712 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
13713 ; /* Do nothing. */
13714 else
13715 {
13716 _bfd_error_handler
13717 (_("error: %B: Conflicting architecture profiles %c/%c"),
13718 ibfd,
13719 in_attr[i].i ? in_attr[i].i : '0',
13720 out_attr[i].i ? out_attr[i].i : '0');
13721 result = FALSE;
13722 }
13723 }
13724 break;
13725
13726 case Tag_DSP_extension:
13727 /* No need to change output value if any of:
13728 - pre (<=) ARMv5T input architecture (do not have DSP)
13729 - M input profile not ARMv7E-M and do not have DSP. */
13730 if (in_attr[Tag_CPU_arch].i <= 3
13731 || (in_attr[Tag_CPU_arch_profile].i == 'M'
13732 && in_attr[Tag_CPU_arch].i != 13
13733 && in_attr[i].i == 0))
13734 ; /* Do nothing. */
13735 /* Output value should be 0 if DSP part of architecture, ie.
13736 - post (>=) ARMv5te architecture output
13737 - A, R or S profile output or ARMv7E-M output architecture. */
13738 else if (out_attr[Tag_CPU_arch].i >= 4
13739 && (out_attr[Tag_CPU_arch_profile].i == 'A'
13740 || out_attr[Tag_CPU_arch_profile].i == 'R'
13741 || out_attr[Tag_CPU_arch_profile].i == 'S'
13742 || out_attr[Tag_CPU_arch].i == 13))
13743 out_attr[i].i = 0;
13744 /* Otherwise, DSP instructions are added and not part of output
13745 architecture. */
13746 else
13747 out_attr[i].i = 1;
13748 break;
13749
13750 case Tag_FP_arch:
13751 {
13752 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
13753 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
13754 when it's 0. It might mean absence of FP hardware if
13755 Tag_FP_arch is zero. */
13756
13757 #define VFP_VERSION_COUNT 9
13758 static const struct
13759 {
13760 int ver;
13761 int regs;
13762 } vfp_versions[VFP_VERSION_COUNT] =
13763 {
13764 {0, 0},
13765 {1, 16},
13766 {2, 16},
13767 {3, 32},
13768 {3, 16},
13769 {4, 32},
13770 {4, 16},
13771 {8, 32},
13772 {8, 16}
13773 };
13774 int ver;
13775 int regs;
13776 int newval;
13777
13778 /* If the output has no requirement about FP hardware,
13779 follow the requirement of the input. */
13780 if (out_attr[i].i == 0)
13781 {
13782 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
13783 out_attr[i].i = in_attr[i].i;
13784 out_attr[Tag_ABI_HardFP_use].i
13785 = in_attr[Tag_ABI_HardFP_use].i;
13786 break;
13787 }
13788 /* If the input has no requirement about FP hardware, do
13789 nothing. */
13790 else if (in_attr[i].i == 0)
13791 {
13792 BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0);
13793 break;
13794 }
13795
13796 /* Both the input and the output have nonzero Tag_FP_arch.
13797 So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */
13798
13799 /* If both the input and the output have zero Tag_ABI_HardFP_use,
13800 do nothing. */
13801 if (in_attr[Tag_ABI_HardFP_use].i == 0
13802 && out_attr[Tag_ABI_HardFP_use].i == 0)
13803 ;
13804 /* If the input and the output have different Tag_ABI_HardFP_use,
13805 the combination of them is 0 (implied by Tag_FP_arch). */
13806 else if (in_attr[Tag_ABI_HardFP_use].i
13807 != out_attr[Tag_ABI_HardFP_use].i)
13808 out_attr[Tag_ABI_HardFP_use].i = 0;
13809
13810 /* Now we can handle Tag_FP_arch. */
13811
13812 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
13813 pick the biggest. */
13814 if (in_attr[i].i >= VFP_VERSION_COUNT
13815 && in_attr[i].i > out_attr[i].i)
13816 {
13817 out_attr[i] = in_attr[i];
13818 break;
13819 }
13820 /* The output uses the superset of input features
13821 (ISA version) and registers. */
13822 ver = vfp_versions[in_attr[i].i].ver;
13823 if (ver < vfp_versions[out_attr[i].i].ver)
13824 ver = vfp_versions[out_attr[i].i].ver;
13825 regs = vfp_versions[in_attr[i].i].regs;
13826 if (regs < vfp_versions[out_attr[i].i].regs)
13827 regs = vfp_versions[out_attr[i].i].regs;
13828 /* This assumes all possible supersets are also a valid
13829 options. */
13830 for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
13831 {
13832 if (regs == vfp_versions[newval].regs
13833 && ver == vfp_versions[newval].ver)
13834 break;
13835 }
13836 out_attr[i].i = newval;
13837 }
13838 break;
13839 case Tag_PCS_config:
13840 if (out_attr[i].i == 0)
13841 out_attr[i].i = in_attr[i].i;
13842 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
13843 {
13844 /* It's sometimes ok to mix different configs, so this is only
13845 a warning. */
13846 _bfd_error_handler
13847 (_("Warning: %B: Conflicting platform configuration"), ibfd);
13848 }
13849 break;
13850 case Tag_ABI_PCS_R9_use:
13851 if (in_attr[i].i != out_attr[i].i
13852 && out_attr[i].i != AEABI_R9_unused
13853 && in_attr[i].i != AEABI_R9_unused)
13854 {
13855 _bfd_error_handler
13856 (_("error: %B: Conflicting use of R9"), ibfd);
13857 result = FALSE;
13858 }
13859 if (out_attr[i].i == AEABI_R9_unused)
13860 out_attr[i].i = in_attr[i].i;
13861 break;
13862 case Tag_ABI_PCS_RW_data:
13863 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
13864 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
13865 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
13866 {
13867 _bfd_error_handler
13868 (_("error: %B: SB relative addressing conflicts with use of R9"),
13869 ibfd);
13870 result = FALSE;
13871 }
13872 /* Use the smallest value specified. */
13873 if (in_attr[i].i < out_attr[i].i)
13874 out_attr[i].i = in_attr[i].i;
13875 break;
13876 case Tag_ABI_PCS_wchar_t:
13877 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
13878 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
13879 {
13880 _bfd_error_handler
13881 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
13882 ibfd, in_attr[i].i, out_attr[i].i);
13883 }
13884 else if (in_attr[i].i && !out_attr[i].i)
13885 out_attr[i].i = in_attr[i].i;
13886 break;
13887 case Tag_ABI_enum_size:
13888 if (in_attr[i].i != AEABI_enum_unused)
13889 {
13890 if (out_attr[i].i == AEABI_enum_unused
13891 || out_attr[i].i == AEABI_enum_forced_wide)
13892 {
13893 /* The existing object is compatible with anything.
13894 Use whatever requirements the new object has. */
13895 out_attr[i].i = in_attr[i].i;
13896 }
13897 else if (in_attr[i].i != AEABI_enum_forced_wide
13898 && out_attr[i].i != in_attr[i].i
13899 && !elf_arm_tdata (obfd)->no_enum_size_warning)
13900 {
13901 static const char *aeabi_enum_names[] =
13902 { "", "variable-size", "32-bit", "" };
13903 const char *in_name =
13904 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
13905 ? aeabi_enum_names[in_attr[i].i]
13906 : "<unknown>";
13907 const char *out_name =
13908 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
13909 ? aeabi_enum_names[out_attr[i].i]
13910 : "<unknown>";
13911 _bfd_error_handler
13912 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
13913 ibfd, in_name, out_name);
13914 }
13915 }
13916 break;
13917 case Tag_ABI_VFP_args:
13918 /* Aready done. */
13919 break;
13920 case Tag_ABI_WMMX_args:
13921 if (in_attr[i].i != out_attr[i].i)
13922 {
13923 _bfd_error_handler
13924 (_("error: %B uses iWMMXt register arguments, %B does not"),
13925 ibfd, obfd);
13926 result = FALSE;
13927 }
13928 break;
13929 case Tag_compatibility:
13930 /* Merged in target-independent code. */
13931 break;
13932 case Tag_ABI_HardFP_use:
13933 /* This is handled along with Tag_FP_arch. */
13934 break;
13935 case Tag_ABI_FP_16bit_format:
13936 if (in_attr[i].i != 0 && out_attr[i].i != 0)
13937 {
13938 if (in_attr[i].i != out_attr[i].i)
13939 {
13940 _bfd_error_handler
13941 (_("error: fp16 format mismatch between %B and %B"),
13942 ibfd, obfd);
13943 result = FALSE;
13944 }
13945 }
13946 if (in_attr[i].i != 0)
13947 out_attr[i].i = in_attr[i].i;
13948 break;
13949
13950 case Tag_DIV_use:
13951 /* A value of zero on input means that the divide instruction may
13952 be used if available in the base architecture as specified via
13953 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
13954 the user did not want divide instructions. A value of 2
13955 explicitly means that divide instructions were allowed in ARM
13956 and Thumb state. */
13957 if (in_attr[i].i == out_attr[i].i)
13958 /* Do nothing. */ ;
13959 else if (elf32_arm_attributes_forbid_div (in_attr)
13960 && !elf32_arm_attributes_accept_div (out_attr))
13961 out_attr[i].i = 1;
13962 else if (elf32_arm_attributes_forbid_div (out_attr)
13963 && elf32_arm_attributes_accept_div (in_attr))
13964 out_attr[i].i = in_attr[i].i;
13965 else if (in_attr[i].i == 2)
13966 out_attr[i].i = in_attr[i].i;
13967 break;
13968
13969 case Tag_MPextension_use_legacy:
13970 /* We don't output objects with Tag_MPextension_use_legacy - we
13971 move the value to Tag_MPextension_use. */
13972 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
13973 {
13974 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
13975 {
13976 _bfd_error_handler
13977 (_("%B has has both the current and legacy "
13978 "Tag_MPextension_use attributes"),
13979 ibfd);
13980 result = FALSE;
13981 }
13982 }
13983
13984 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
13985 out_attr[Tag_MPextension_use] = in_attr[i];
13986
13987 break;
13988
13989 case Tag_nodefaults:
13990 /* This tag is set if it exists, but the value is unused (and is
13991 typically zero). We don't actually need to do anything here -
13992 the merge happens automatically when the type flags are merged
13993 below. */
13994 break;
13995 case Tag_also_compatible_with:
13996 /* Already done in Tag_CPU_arch. */
13997 break;
13998 case Tag_conformance:
13999 /* Keep the attribute if it matches. Throw it away otherwise.
14000 No attribute means no claim to conform. */
14001 if (!in_attr[i].s || !out_attr[i].s
14002 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
14003 out_attr[i].s = NULL;
14004 break;
14005
14006 default:
14007 result
14008 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
14009 }
14010
14011 /* If out_attr was copied from in_attr then it won't have a type yet. */
14012 if (in_attr[i].type && !out_attr[i].type)
14013 out_attr[i].type = in_attr[i].type;
14014 }
14015
14016 /* Merge Tag_compatibility attributes and any common GNU ones. */
14017 if (!_bfd_elf_merge_object_attributes (ibfd, obfd))
14018 return FALSE;
14019
14020 /* Check for any attributes not known on ARM. */
14021 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
14022
14023 return result;
14024 }
14025
14026
14027 /* Return TRUE if the two EABI versions are incompatible. */
14028
14029 static bfd_boolean
14030 elf32_arm_versions_compatible (unsigned iver, unsigned over)
14031 {
14032 /* v4 and v5 are the same spec before and after it was released,
14033 so allow mixing them. */
14034 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
14035 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
14036 return TRUE;
14037
14038 return (iver == over);
14039 }
14040
14041 /* Merge backend specific data from an object file to the output
14042 object file when linking. */
14043
14044 static bfd_boolean
14045 elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd);
14046
14047 /* Display the flags field. */
14048
14049 static bfd_boolean
14050 elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
14051 {
14052 FILE * file = (FILE *) ptr;
14053 unsigned long flags;
14054
14055 BFD_ASSERT (abfd != NULL && ptr != NULL);
14056
14057 /* Print normal ELF private data. */
14058 _bfd_elf_print_private_bfd_data (abfd, ptr);
14059
14060 flags = elf_elfheader (abfd)->e_flags;
14061 /* Ignore init flag - it may not be set, despite the flags field
14062 containing valid data. */
14063
14064 /* xgettext:c-format */
14065 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
14066
14067 switch (EF_ARM_EABI_VERSION (flags))
14068 {
14069 case EF_ARM_EABI_UNKNOWN:
14070 /* The following flag bits are GNU extensions and not part of the
14071 official ARM ELF extended ABI. Hence they are only decoded if
14072 the EABI version is not set. */
14073 if (flags & EF_ARM_INTERWORK)
14074 fprintf (file, _(" [interworking enabled]"));
14075
14076 if (flags & EF_ARM_APCS_26)
14077 fprintf (file, " [APCS-26]");
14078 else
14079 fprintf (file, " [APCS-32]");
14080
14081 if (flags & EF_ARM_VFP_FLOAT)
14082 fprintf (file, _(" [VFP float format]"));
14083 else if (flags & EF_ARM_MAVERICK_FLOAT)
14084 fprintf (file, _(" [Maverick float format]"));
14085 else
14086 fprintf (file, _(" [FPA float format]"));
14087
14088 if (flags & EF_ARM_APCS_FLOAT)
14089 fprintf (file, _(" [floats passed in float registers]"));
14090
14091 if (flags & EF_ARM_PIC)
14092 fprintf (file, _(" [position independent]"));
14093
14094 if (flags & EF_ARM_NEW_ABI)
14095 fprintf (file, _(" [new ABI]"));
14096
14097 if (flags & EF_ARM_OLD_ABI)
14098 fprintf (file, _(" [old ABI]"));
14099
14100 if (flags & EF_ARM_SOFT_FLOAT)
14101 fprintf (file, _(" [software FP]"));
14102
14103 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
14104 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
14105 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
14106 | EF_ARM_MAVERICK_FLOAT);
14107 break;
14108
14109 case EF_ARM_EABI_VER1:
14110 fprintf (file, _(" [Version1 EABI]"));
14111
14112 if (flags & EF_ARM_SYMSARESORTED)
14113 fprintf (file, _(" [sorted symbol table]"));
14114 else
14115 fprintf (file, _(" [unsorted symbol table]"));
14116
14117 flags &= ~ EF_ARM_SYMSARESORTED;
14118 break;
14119
14120 case EF_ARM_EABI_VER2:
14121 fprintf (file, _(" [Version2 EABI]"));
14122
14123 if (flags & EF_ARM_SYMSARESORTED)
14124 fprintf (file, _(" [sorted symbol table]"));
14125 else
14126 fprintf (file, _(" [unsorted symbol table]"));
14127
14128 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
14129 fprintf (file, _(" [dynamic symbols use segment index]"));
14130
14131 if (flags & EF_ARM_MAPSYMSFIRST)
14132 fprintf (file, _(" [mapping symbols precede others]"));
14133
14134 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
14135 | EF_ARM_MAPSYMSFIRST);
14136 break;
14137
14138 case EF_ARM_EABI_VER3:
14139 fprintf (file, _(" [Version3 EABI]"));
14140 break;
14141
14142 case EF_ARM_EABI_VER4:
14143 fprintf (file, _(" [Version4 EABI]"));
14144 goto eabi;
14145
14146 case EF_ARM_EABI_VER5:
14147 fprintf (file, _(" [Version5 EABI]"));
14148
14149 if (flags & EF_ARM_ABI_FLOAT_SOFT)
14150 fprintf (file, _(" [soft-float ABI]"));
14151
14152 if (flags & EF_ARM_ABI_FLOAT_HARD)
14153 fprintf (file, _(" [hard-float ABI]"));
14154
14155 flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
14156
14157 eabi:
14158 if (flags & EF_ARM_BE8)
14159 fprintf (file, _(" [BE8]"));
14160
14161 if (flags & EF_ARM_LE8)
14162 fprintf (file, _(" [LE8]"));
14163
14164 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
14165 break;
14166
14167 default:
14168 fprintf (file, _(" <EABI version unrecognised>"));
14169 break;
14170 }
14171
14172 flags &= ~ EF_ARM_EABIMASK;
14173
14174 if (flags & EF_ARM_RELEXEC)
14175 fprintf (file, _(" [relocatable executable]"));
14176
14177 flags &= ~EF_ARM_RELEXEC;
14178
14179 if (flags)
14180 fprintf (file, _("<Unrecognised flag bits set>"));
14181
14182 fputc ('\n', file);
14183
14184 return TRUE;
14185 }
14186
14187 static int
14188 elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
14189 {
14190 switch (ELF_ST_TYPE (elf_sym->st_info))
14191 {
14192 case STT_ARM_TFUNC:
14193 return ELF_ST_TYPE (elf_sym->st_info);
14194
14195 case STT_ARM_16BIT:
14196 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
14197 This allows us to distinguish between data used by Thumb instructions
14198 and non-data (which is probably code) inside Thumb regions of an
14199 executable. */
14200 if (type != STT_OBJECT && type != STT_TLS)
14201 return ELF_ST_TYPE (elf_sym->st_info);
14202 break;
14203
14204 default:
14205 break;
14206 }
14207
14208 return type;
14209 }
14210
14211 static asection *
14212 elf32_arm_gc_mark_hook (asection *sec,
14213 struct bfd_link_info *info,
14214 Elf_Internal_Rela *rel,
14215 struct elf_link_hash_entry *h,
14216 Elf_Internal_Sym *sym)
14217 {
14218 if (h != NULL)
14219 switch (ELF32_R_TYPE (rel->r_info))
14220 {
14221 case R_ARM_GNU_VTINHERIT:
14222 case R_ARM_GNU_VTENTRY:
14223 return NULL;
14224 }
14225
14226 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
14227 }
14228
14229 /* Update the got entry reference counts for the section being removed. */
14230
14231 static bfd_boolean
14232 elf32_arm_gc_sweep_hook (bfd * abfd,
14233 struct bfd_link_info * info,
14234 asection * sec,
14235 const Elf_Internal_Rela * relocs)
14236 {
14237 Elf_Internal_Shdr *symtab_hdr;
14238 struct elf_link_hash_entry **sym_hashes;
14239 bfd_signed_vma *local_got_refcounts;
14240 const Elf_Internal_Rela *rel, *relend;
14241 struct elf32_arm_link_hash_table * globals;
14242
14243 if (bfd_link_relocatable (info))
14244 return TRUE;
14245
14246 globals = elf32_arm_hash_table (info);
14247 if (globals == NULL)
14248 return FALSE;
14249
14250 elf_section_data (sec)->local_dynrel = NULL;
14251
14252 symtab_hdr = & elf_symtab_hdr (abfd);
14253 sym_hashes = elf_sym_hashes (abfd);
14254 local_got_refcounts = elf_local_got_refcounts (abfd);
14255
14256 check_use_blx (globals);
14257
14258 relend = relocs + sec->reloc_count;
14259 for (rel = relocs; rel < relend; rel++)
14260 {
14261 unsigned long r_symndx;
14262 struct elf_link_hash_entry *h = NULL;
14263 struct elf32_arm_link_hash_entry *eh;
14264 int r_type;
14265 bfd_boolean call_reloc_p;
14266 bfd_boolean may_become_dynamic_p;
14267 bfd_boolean may_need_local_target_p;
14268 union gotplt_union *root_plt;
14269 struct arm_plt_info *arm_plt;
14270
14271 r_symndx = ELF32_R_SYM (rel->r_info);
14272 if (r_symndx >= symtab_hdr->sh_info)
14273 {
14274 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14275 while (h->root.type == bfd_link_hash_indirect
14276 || h->root.type == bfd_link_hash_warning)
14277 h = (struct elf_link_hash_entry *) h->root.u.i.link;
14278 }
14279 eh = (struct elf32_arm_link_hash_entry *) h;
14280
14281 call_reloc_p = FALSE;
14282 may_become_dynamic_p = FALSE;
14283 may_need_local_target_p = FALSE;
14284
14285 r_type = ELF32_R_TYPE (rel->r_info);
14286 r_type = arm_real_reloc_type (globals, r_type);
14287 switch (r_type)
14288 {
14289 case R_ARM_GOT32:
14290 case R_ARM_GOT_PREL:
14291 case R_ARM_TLS_GD32:
14292 case R_ARM_TLS_IE32:
14293 if (h != NULL)
14294 {
14295 if (h->got.refcount > 0)
14296 h->got.refcount -= 1;
14297 }
14298 else if (local_got_refcounts != NULL)
14299 {
14300 if (local_got_refcounts[r_symndx] > 0)
14301 local_got_refcounts[r_symndx] -= 1;
14302 }
14303 break;
14304
14305 case R_ARM_TLS_LDM32:
14306 globals->tls_ldm_got.refcount -= 1;
14307 break;
14308
14309 case R_ARM_PC24:
14310 case R_ARM_PLT32:
14311 case R_ARM_CALL:
14312 case R_ARM_JUMP24:
14313 case R_ARM_PREL31:
14314 case R_ARM_THM_CALL:
14315 case R_ARM_THM_JUMP24:
14316 case R_ARM_THM_JUMP19:
14317 call_reloc_p = TRUE;
14318 may_need_local_target_p = TRUE;
14319 break;
14320
14321 case R_ARM_ABS12:
14322 if (!globals->vxworks_p)
14323 {
14324 may_need_local_target_p = TRUE;
14325 break;
14326 }
14327 /* Fall through. */
14328 case R_ARM_ABS32:
14329 case R_ARM_ABS32_NOI:
14330 case R_ARM_REL32:
14331 case R_ARM_REL32_NOI:
14332 case R_ARM_MOVW_ABS_NC:
14333 case R_ARM_MOVT_ABS:
14334 case R_ARM_MOVW_PREL_NC:
14335 case R_ARM_MOVT_PREL:
14336 case R_ARM_THM_MOVW_ABS_NC:
14337 case R_ARM_THM_MOVT_ABS:
14338 case R_ARM_THM_MOVW_PREL_NC:
14339 case R_ARM_THM_MOVT_PREL:
14340 /* Should the interworking branches be here also? */
14341 if ((bfd_link_pic (info) || globals->root.is_relocatable_executable)
14342 && (sec->flags & SEC_ALLOC) != 0)
14343 {
14344 if (h == NULL
14345 && elf32_arm_howto_from_type (r_type)->pc_relative)
14346 {
14347 call_reloc_p = TRUE;
14348 may_need_local_target_p = TRUE;
14349 }
14350 else
14351 may_become_dynamic_p = TRUE;
14352 }
14353 else
14354 may_need_local_target_p = TRUE;
14355 break;
14356
14357 default:
14358 break;
14359 }
14360
14361 if (may_need_local_target_p
14362 && elf32_arm_get_plt_info (abfd, globals, eh, r_symndx, &root_plt,
14363 &arm_plt))
14364 {
14365 /* If PLT refcount book-keeping is wrong and too low, we'll
14366 see a zero value (going to -1) for the root PLT reference
14367 count. */
14368 if (root_plt->refcount >= 0)
14369 {
14370 BFD_ASSERT (root_plt->refcount != 0);
14371 root_plt->refcount -= 1;
14372 }
14373 else
14374 /* A value of -1 means the symbol has become local, forced
14375 or seeing a hidden definition. Any other negative value
14376 is an error. */
14377 BFD_ASSERT (root_plt->refcount == -1);
14378
14379 if (!call_reloc_p)
14380 arm_plt->noncall_refcount--;
14381
14382 if (r_type == R_ARM_THM_CALL)
14383 arm_plt->maybe_thumb_refcount--;
14384
14385 if (r_type == R_ARM_THM_JUMP24
14386 || r_type == R_ARM_THM_JUMP19)
14387 arm_plt->thumb_refcount--;
14388 }
14389
14390 if (may_become_dynamic_p)
14391 {
14392 struct elf_dyn_relocs **pp;
14393 struct elf_dyn_relocs *p;
14394
14395 if (h != NULL)
14396 pp = &(eh->dyn_relocs);
14397 else
14398 {
14399 Elf_Internal_Sym *isym;
14400
14401 isym = bfd_sym_from_r_symndx (&globals->sym_cache,
14402 abfd, r_symndx);
14403 if (isym == NULL)
14404 return FALSE;
14405 pp = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
14406 if (pp == NULL)
14407 return FALSE;
14408 }
14409 for (; (p = *pp) != NULL; pp = &p->next)
14410 if (p->sec == sec)
14411 {
14412 /* Everything must go for SEC. */
14413 *pp = p->next;
14414 break;
14415 }
14416 }
14417 }
14418
14419 return TRUE;
14420 }
14421
14422 /* Look through the relocs for a section during the first phase. */
14423
14424 static bfd_boolean
14425 elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
14426 asection *sec, const Elf_Internal_Rela *relocs)
14427 {
14428 Elf_Internal_Shdr *symtab_hdr;
14429 struct elf_link_hash_entry **sym_hashes;
14430 const Elf_Internal_Rela *rel;
14431 const Elf_Internal_Rela *rel_end;
14432 bfd *dynobj;
14433 asection *sreloc;
14434 struct elf32_arm_link_hash_table *htab;
14435 bfd_boolean call_reloc_p;
14436 bfd_boolean may_become_dynamic_p;
14437 bfd_boolean may_need_local_target_p;
14438 unsigned long nsyms;
14439
14440 if (bfd_link_relocatable (info))
14441 return TRUE;
14442
14443 BFD_ASSERT (is_arm_elf (abfd));
14444
14445 htab = elf32_arm_hash_table (info);
14446 if (htab == NULL)
14447 return FALSE;
14448
14449 sreloc = NULL;
14450
14451 /* Create dynamic sections for relocatable executables so that we can
14452 copy relocations. */
14453 if (htab->root.is_relocatable_executable
14454 && ! htab->root.dynamic_sections_created)
14455 {
14456 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
14457 return FALSE;
14458 }
14459
14460 if (htab->root.dynobj == NULL)
14461 htab->root.dynobj = abfd;
14462 if (!create_ifunc_sections (info))
14463 return FALSE;
14464
14465 dynobj = htab->root.dynobj;
14466
14467 symtab_hdr = & elf_symtab_hdr (abfd);
14468 sym_hashes = elf_sym_hashes (abfd);
14469 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
14470
14471 rel_end = relocs + sec->reloc_count;
14472 for (rel = relocs; rel < rel_end; rel++)
14473 {
14474 Elf_Internal_Sym *isym;
14475 struct elf_link_hash_entry *h;
14476 struct elf32_arm_link_hash_entry *eh;
14477 unsigned long r_symndx;
14478 int r_type;
14479
14480 r_symndx = ELF32_R_SYM (rel->r_info);
14481 r_type = ELF32_R_TYPE (rel->r_info);
14482 r_type = arm_real_reloc_type (htab, r_type);
14483
14484 if (r_symndx >= nsyms
14485 /* PR 9934: It is possible to have relocations that do not
14486 refer to symbols, thus it is also possible to have an
14487 object file containing relocations but no symbol table. */
14488 && (r_symndx > STN_UNDEF || nsyms > 0))
14489 {
14490 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
14491 r_symndx);
14492 return FALSE;
14493 }
14494
14495 h = NULL;
14496 isym = NULL;
14497 if (nsyms > 0)
14498 {
14499 if (r_symndx < symtab_hdr->sh_info)
14500 {
14501 /* A local symbol. */
14502 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
14503 abfd, r_symndx);
14504 if (isym == NULL)
14505 return FALSE;
14506 }
14507 else
14508 {
14509 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14510 while (h->root.type == bfd_link_hash_indirect
14511 || h->root.type == bfd_link_hash_warning)
14512 h = (struct elf_link_hash_entry *) h->root.u.i.link;
14513
14514 /* PR15323, ref flags aren't set for references in the
14515 same object. */
14516 h->root.non_ir_ref = 1;
14517 }
14518 }
14519
14520 eh = (struct elf32_arm_link_hash_entry *) h;
14521
14522 call_reloc_p = FALSE;
14523 may_become_dynamic_p = FALSE;
14524 may_need_local_target_p = FALSE;
14525
14526 /* Could be done earlier, if h were already available. */
14527 r_type = elf32_arm_tls_transition (info, r_type, h);
14528 switch (r_type)
14529 {
14530 case R_ARM_GOT32:
14531 case R_ARM_GOT_PREL:
14532 case R_ARM_TLS_GD32:
14533 case R_ARM_TLS_IE32:
14534 case R_ARM_TLS_GOTDESC:
14535 case R_ARM_TLS_DESCSEQ:
14536 case R_ARM_THM_TLS_DESCSEQ:
14537 case R_ARM_TLS_CALL:
14538 case R_ARM_THM_TLS_CALL:
14539 /* This symbol requires a global offset table entry. */
14540 {
14541 int tls_type, old_tls_type;
14542
14543 switch (r_type)
14544 {
14545 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
14546
14547 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
14548
14549 case R_ARM_TLS_GOTDESC:
14550 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
14551 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
14552 tls_type = GOT_TLS_GDESC; break;
14553
14554 default: tls_type = GOT_NORMAL; break;
14555 }
14556
14557 if (!bfd_link_executable (info) && (tls_type & GOT_TLS_IE))
14558 info->flags |= DF_STATIC_TLS;
14559
14560 if (h != NULL)
14561 {
14562 h->got.refcount++;
14563 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
14564 }
14565 else
14566 {
14567 /* This is a global offset table entry for a local symbol. */
14568 if (!elf32_arm_allocate_local_sym_info (abfd))
14569 return FALSE;
14570 elf_local_got_refcounts (abfd)[r_symndx] += 1;
14571 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
14572 }
14573
14574 /* If a variable is accessed with both tls methods, two
14575 slots may be created. */
14576 if (GOT_TLS_GD_ANY_P (old_tls_type)
14577 && GOT_TLS_GD_ANY_P (tls_type))
14578 tls_type |= old_tls_type;
14579
14580 /* We will already have issued an error message if there
14581 is a TLS/non-TLS mismatch, based on the symbol
14582 type. So just combine any TLS types needed. */
14583 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
14584 && tls_type != GOT_NORMAL)
14585 tls_type |= old_tls_type;
14586
14587 /* If the symbol is accessed in both IE and GDESC
14588 method, we're able to relax. Turn off the GDESC flag,
14589 without messing up with any other kind of tls types
14590 that may be involved. */
14591 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
14592 tls_type &= ~GOT_TLS_GDESC;
14593
14594 if (old_tls_type != tls_type)
14595 {
14596 if (h != NULL)
14597 elf32_arm_hash_entry (h)->tls_type = tls_type;
14598 else
14599 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
14600 }
14601 }
14602 /* Fall through. */
14603
14604 case R_ARM_TLS_LDM32:
14605 if (r_type == R_ARM_TLS_LDM32)
14606 htab->tls_ldm_got.refcount++;
14607 /* Fall through. */
14608
14609 case R_ARM_GOTOFF32:
14610 case R_ARM_GOTPC:
14611 if (htab->root.sgot == NULL
14612 && !create_got_section (htab->root.dynobj, info))
14613 return FALSE;
14614 break;
14615
14616 case R_ARM_PC24:
14617 case R_ARM_PLT32:
14618 case R_ARM_CALL:
14619 case R_ARM_JUMP24:
14620 case R_ARM_PREL31:
14621 case R_ARM_THM_CALL:
14622 case R_ARM_THM_JUMP24:
14623 case R_ARM_THM_JUMP19:
14624 call_reloc_p = TRUE;
14625 may_need_local_target_p = TRUE;
14626 break;
14627
14628 case R_ARM_ABS12:
14629 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
14630 ldr __GOTT_INDEX__ offsets. */
14631 if (!htab->vxworks_p)
14632 {
14633 may_need_local_target_p = TRUE;
14634 break;
14635 }
14636 else goto jump_over;
14637
14638 /* Fall through. */
14639
14640 case R_ARM_MOVW_ABS_NC:
14641 case R_ARM_MOVT_ABS:
14642 case R_ARM_THM_MOVW_ABS_NC:
14643 case R_ARM_THM_MOVT_ABS:
14644 if (bfd_link_pic (info))
14645 {
14646 (*_bfd_error_handler)
14647 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
14648 abfd, elf32_arm_howto_table_1[r_type].name,
14649 (h) ? h->root.root.string : "a local symbol");
14650 bfd_set_error (bfd_error_bad_value);
14651 return FALSE;
14652 }
14653
14654 /* Fall through. */
14655 case R_ARM_ABS32:
14656 case R_ARM_ABS32_NOI:
14657 jump_over:
14658 if (h != NULL && bfd_link_executable (info))
14659 {
14660 h->pointer_equality_needed = 1;
14661 }
14662 /* Fall through. */
14663 case R_ARM_REL32:
14664 case R_ARM_REL32_NOI:
14665 case R_ARM_MOVW_PREL_NC:
14666 case R_ARM_MOVT_PREL:
14667 case R_ARM_THM_MOVW_PREL_NC:
14668 case R_ARM_THM_MOVT_PREL:
14669
14670 /* Should the interworking branches be listed here? */
14671 if ((bfd_link_pic (info) || htab->root.is_relocatable_executable)
14672 && (sec->flags & SEC_ALLOC) != 0)
14673 {
14674 if (h == NULL
14675 && elf32_arm_howto_from_type (r_type)->pc_relative)
14676 {
14677 /* In shared libraries and relocatable executables,
14678 we treat local relative references as calls;
14679 see the related SYMBOL_CALLS_LOCAL code in
14680 allocate_dynrelocs. */
14681 call_reloc_p = TRUE;
14682 may_need_local_target_p = TRUE;
14683 }
14684 else
14685 /* We are creating a shared library or relocatable
14686 executable, and this is a reloc against a global symbol,
14687 or a non-PC-relative reloc against a local symbol.
14688 We may need to copy the reloc into the output. */
14689 may_become_dynamic_p = TRUE;
14690 }
14691 else
14692 may_need_local_target_p = TRUE;
14693 break;
14694
14695 /* This relocation describes the C++ object vtable hierarchy.
14696 Reconstruct it for later use during GC. */
14697 case R_ARM_GNU_VTINHERIT:
14698 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
14699 return FALSE;
14700 break;
14701
14702 /* This relocation describes which C++ vtable entries are actually
14703 used. Record for later use during GC. */
14704 case R_ARM_GNU_VTENTRY:
14705 BFD_ASSERT (h != NULL);
14706 if (h != NULL
14707 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
14708 return FALSE;
14709 break;
14710 }
14711
14712 if (h != NULL)
14713 {
14714 if (call_reloc_p)
14715 /* We may need a .plt entry if the function this reloc
14716 refers to is in a different object, regardless of the
14717 symbol's type. We can't tell for sure yet, because
14718 something later might force the symbol local. */
14719 h->needs_plt = 1;
14720 else if (may_need_local_target_p)
14721 /* If this reloc is in a read-only section, we might
14722 need a copy reloc. We can't check reliably at this
14723 stage whether the section is read-only, as input
14724 sections have not yet been mapped to output sections.
14725 Tentatively set the flag for now, and correct in
14726 adjust_dynamic_symbol. */
14727 h->non_got_ref = 1;
14728 }
14729
14730 if (may_need_local_target_p
14731 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
14732 {
14733 union gotplt_union *root_plt;
14734 struct arm_plt_info *arm_plt;
14735 struct arm_local_iplt_info *local_iplt;
14736
14737 if (h != NULL)
14738 {
14739 root_plt = &h->plt;
14740 arm_plt = &eh->plt;
14741 }
14742 else
14743 {
14744 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
14745 if (local_iplt == NULL)
14746 return FALSE;
14747 root_plt = &local_iplt->root;
14748 arm_plt = &local_iplt->arm;
14749 }
14750
14751 /* If the symbol is a function that doesn't bind locally,
14752 this relocation will need a PLT entry. */
14753 if (root_plt->refcount != -1)
14754 root_plt->refcount += 1;
14755
14756 if (!call_reloc_p)
14757 arm_plt->noncall_refcount++;
14758
14759 /* It's too early to use htab->use_blx here, so we have to
14760 record possible blx references separately from
14761 relocs that definitely need a thumb stub. */
14762
14763 if (r_type == R_ARM_THM_CALL)
14764 arm_plt->maybe_thumb_refcount += 1;
14765
14766 if (r_type == R_ARM_THM_JUMP24
14767 || r_type == R_ARM_THM_JUMP19)
14768 arm_plt->thumb_refcount += 1;
14769 }
14770
14771 if (may_become_dynamic_p)
14772 {
14773 struct elf_dyn_relocs *p, **head;
14774
14775 /* Create a reloc section in dynobj. */
14776 if (sreloc == NULL)
14777 {
14778 sreloc = _bfd_elf_make_dynamic_reloc_section
14779 (sec, dynobj, 2, abfd, ! htab->use_rel);
14780
14781 if (sreloc == NULL)
14782 return FALSE;
14783
14784 /* BPABI objects never have dynamic relocations mapped. */
14785 if (htab->symbian_p)
14786 {
14787 flagword flags;
14788
14789 flags = bfd_get_section_flags (dynobj, sreloc);
14790 flags &= ~(SEC_LOAD | SEC_ALLOC);
14791 bfd_set_section_flags (dynobj, sreloc, flags);
14792 }
14793 }
14794
14795 /* If this is a global symbol, count the number of
14796 relocations we need for this symbol. */
14797 if (h != NULL)
14798 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
14799 else
14800 {
14801 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
14802 if (head == NULL)
14803 return FALSE;
14804 }
14805
14806 p = *head;
14807 if (p == NULL || p->sec != sec)
14808 {
14809 bfd_size_type amt = sizeof *p;
14810
14811 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
14812 if (p == NULL)
14813 return FALSE;
14814 p->next = *head;
14815 *head = p;
14816 p->sec = sec;
14817 p->count = 0;
14818 p->pc_count = 0;
14819 }
14820
14821 if (elf32_arm_howto_from_type (r_type)->pc_relative)
14822 p->pc_count += 1;
14823 p->count += 1;
14824 }
14825 }
14826
14827 return TRUE;
14828 }
14829
14830 /* Unwinding tables are not referenced directly. This pass marks them as
14831 required if the corresponding code section is marked. Similarly, ARMv8-M
14832 secure entry functions can only be referenced by SG veneers which are
14833 created after the GC process. They need to be marked in case they reside in
14834 their own section (as would be the case if code was compiled with
14835 -ffunction-sections). */
14836
14837 static bfd_boolean
14838 elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
14839 elf_gc_mark_hook_fn gc_mark_hook)
14840 {
14841 bfd *sub;
14842 Elf_Internal_Shdr **elf_shdrp;
14843 asection *cmse_sec;
14844 obj_attribute *out_attr;
14845 Elf_Internal_Shdr *symtab_hdr;
14846 unsigned i, sym_count, ext_start;
14847 const struct elf_backend_data *bed;
14848 struct elf_link_hash_entry **sym_hashes;
14849 struct elf32_arm_link_hash_entry *cmse_hash;
14850 bfd_boolean again, is_v8m, first_bfd_browse = TRUE;
14851
14852 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
14853
14854 out_attr = elf_known_obj_attributes_proc (info->output_bfd);
14855 is_v8m = out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
14856 && out_attr[Tag_CPU_arch_profile].i == 'M';
14857
14858 /* Marking EH data may cause additional code sections to be marked,
14859 requiring multiple passes. */
14860 again = TRUE;
14861 while (again)
14862 {
14863 again = FALSE;
14864 for (sub = info->input_bfds; sub != NULL; sub = sub->link.next)
14865 {
14866 asection *o;
14867
14868 if (! is_arm_elf (sub))
14869 continue;
14870
14871 elf_shdrp = elf_elfsections (sub);
14872 for (o = sub->sections; o != NULL; o = o->next)
14873 {
14874 Elf_Internal_Shdr *hdr;
14875
14876 hdr = &elf_section_data (o)->this_hdr;
14877 if (hdr->sh_type == SHT_ARM_EXIDX
14878 && hdr->sh_link
14879 && hdr->sh_link < elf_numsections (sub)
14880 && !o->gc_mark
14881 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
14882 {
14883 again = TRUE;
14884 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
14885 return FALSE;
14886 }
14887 }
14888
14889 /* Mark section holding ARMv8-M secure entry functions. We mark all
14890 of them so no need for a second browsing. */
14891 if (is_v8m && first_bfd_browse)
14892 {
14893 sym_hashes = elf_sym_hashes (sub);
14894 bed = get_elf_backend_data (sub);
14895 symtab_hdr = &elf_tdata (sub)->symtab_hdr;
14896 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
14897 ext_start = symtab_hdr->sh_info;
14898
14899 /* Scan symbols. */
14900 for (i = ext_start; i < sym_count; i++)
14901 {
14902 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
14903
14904 /* Assume it is a special symbol. If not, cmse_scan will
14905 warn about it and user can do something about it. */
14906 if (ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
14907 {
14908 cmse_sec = cmse_hash->root.root.u.def.section;
14909 if (!cmse_sec->gc_mark
14910 && !_bfd_elf_gc_mark (info, cmse_sec, gc_mark_hook))
14911 return FALSE;
14912 }
14913 }
14914 }
14915 }
14916 first_bfd_browse = FALSE;
14917 }
14918
14919 return TRUE;
14920 }
14921
14922 /* Treat mapping symbols as special target symbols. */
14923
14924 static bfd_boolean
14925 elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
14926 {
14927 return bfd_is_arm_special_symbol_name (sym->name,
14928 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
14929 }
14930
14931 /* This is a copy of elf_find_function() from elf.c except that
14932 ARM mapping symbols are ignored when looking for function names
14933 and STT_ARM_TFUNC is considered to a function type. */
14934
14935 static bfd_boolean
14936 arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
14937 asymbol ** symbols,
14938 asection * section,
14939 bfd_vma offset,
14940 const char ** filename_ptr,
14941 const char ** functionname_ptr)
14942 {
14943 const char * filename = NULL;
14944 asymbol * func = NULL;
14945 bfd_vma low_func = 0;
14946 asymbol ** p;
14947
14948 for (p = symbols; *p != NULL; p++)
14949 {
14950 elf_symbol_type *q;
14951
14952 q = (elf_symbol_type *) *p;
14953
14954 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
14955 {
14956 default:
14957 break;
14958 case STT_FILE:
14959 filename = bfd_asymbol_name (&q->symbol);
14960 break;
14961 case STT_FUNC:
14962 case STT_ARM_TFUNC:
14963 case STT_NOTYPE:
14964 /* Skip mapping symbols. */
14965 if ((q->symbol.flags & BSF_LOCAL)
14966 && bfd_is_arm_special_symbol_name (q->symbol.name,
14967 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
14968 continue;
14969 /* Fall through. */
14970 if (bfd_get_section (&q->symbol) == section
14971 && q->symbol.value >= low_func
14972 && q->symbol.value <= offset)
14973 {
14974 func = (asymbol *) q;
14975 low_func = q->symbol.value;
14976 }
14977 break;
14978 }
14979 }
14980
14981 if (func == NULL)
14982 return FALSE;
14983
14984 if (filename_ptr)
14985 *filename_ptr = filename;
14986 if (functionname_ptr)
14987 *functionname_ptr = bfd_asymbol_name (func);
14988
14989 return TRUE;
14990 }
14991
14992
14993 /* Find the nearest line to a particular section and offset, for error
14994 reporting. This code is a duplicate of the code in elf.c, except
14995 that it uses arm_elf_find_function. */
14996
14997 static bfd_boolean
14998 elf32_arm_find_nearest_line (bfd * abfd,
14999 asymbol ** symbols,
15000 asection * section,
15001 bfd_vma offset,
15002 const char ** filename_ptr,
15003 const char ** functionname_ptr,
15004 unsigned int * line_ptr,
15005 unsigned int * discriminator_ptr)
15006 {
15007 bfd_boolean found = FALSE;
15008
15009 if (_bfd_dwarf2_find_nearest_line (abfd, symbols, NULL, section, offset,
15010 filename_ptr, functionname_ptr,
15011 line_ptr, discriminator_ptr,
15012 dwarf_debug_sections, 0,
15013 & elf_tdata (abfd)->dwarf2_find_line_info))
15014 {
15015 if (!*functionname_ptr)
15016 arm_elf_find_function (abfd, symbols, section, offset,
15017 *filename_ptr ? NULL : filename_ptr,
15018 functionname_ptr);
15019
15020 return TRUE;
15021 }
15022
15023 /* Skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain
15024 uses DWARF1. */
15025
15026 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
15027 & found, filename_ptr,
15028 functionname_ptr, line_ptr,
15029 & elf_tdata (abfd)->line_info))
15030 return FALSE;
15031
15032 if (found && (*functionname_ptr || *line_ptr))
15033 return TRUE;
15034
15035 if (symbols == NULL)
15036 return FALSE;
15037
15038 if (! arm_elf_find_function (abfd, symbols, section, offset,
15039 filename_ptr, functionname_ptr))
15040 return FALSE;
15041
15042 *line_ptr = 0;
15043 return TRUE;
15044 }
15045
15046 static bfd_boolean
15047 elf32_arm_find_inliner_info (bfd * abfd,
15048 const char ** filename_ptr,
15049 const char ** functionname_ptr,
15050 unsigned int * line_ptr)
15051 {
15052 bfd_boolean found;
15053 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
15054 functionname_ptr, line_ptr,
15055 & elf_tdata (abfd)->dwarf2_find_line_info);
15056 return found;
15057 }
15058
15059 /* Adjust a symbol defined by a dynamic object and referenced by a
15060 regular object. The current definition is in some section of the
15061 dynamic object, but we're not including those sections. We have to
15062 change the definition to something the rest of the link can
15063 understand. */
15064
15065 static bfd_boolean
15066 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
15067 struct elf_link_hash_entry * h)
15068 {
15069 bfd * dynobj;
15070 asection * s;
15071 struct elf32_arm_link_hash_entry * eh;
15072 struct elf32_arm_link_hash_table *globals;
15073
15074 globals = elf32_arm_hash_table (info);
15075 if (globals == NULL)
15076 return FALSE;
15077
15078 dynobj = elf_hash_table (info)->dynobj;
15079
15080 /* Make sure we know what is going on here. */
15081 BFD_ASSERT (dynobj != NULL
15082 && (h->needs_plt
15083 || h->type == STT_GNU_IFUNC
15084 || h->u.weakdef != NULL
15085 || (h->def_dynamic
15086 && h->ref_regular
15087 && !h->def_regular)));
15088
15089 eh = (struct elf32_arm_link_hash_entry *) h;
15090
15091 /* If this is a function, put it in the procedure linkage table. We
15092 will fill in the contents of the procedure linkage table later,
15093 when we know the address of the .got section. */
15094 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
15095 {
15096 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
15097 symbol binds locally. */
15098 if (h->plt.refcount <= 0
15099 || (h->type != STT_GNU_IFUNC
15100 && (SYMBOL_CALLS_LOCAL (info, h)
15101 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
15102 && h->root.type == bfd_link_hash_undefweak))))
15103 {
15104 /* This case can occur if we saw a PLT32 reloc in an input
15105 file, but the symbol was never referred to by a dynamic
15106 object, or if all references were garbage collected. In
15107 such a case, we don't actually need to build a procedure
15108 linkage table, and we can just do a PC24 reloc instead. */
15109 h->plt.offset = (bfd_vma) -1;
15110 eh->plt.thumb_refcount = 0;
15111 eh->plt.maybe_thumb_refcount = 0;
15112 eh->plt.noncall_refcount = 0;
15113 h->needs_plt = 0;
15114 }
15115
15116 return TRUE;
15117 }
15118 else
15119 {
15120 /* It's possible that we incorrectly decided a .plt reloc was
15121 needed for an R_ARM_PC24 or similar reloc to a non-function sym
15122 in check_relocs. We can't decide accurately between function
15123 and non-function syms in check-relocs; Objects loaded later in
15124 the link may change h->type. So fix it now. */
15125 h->plt.offset = (bfd_vma) -1;
15126 eh->plt.thumb_refcount = 0;
15127 eh->plt.maybe_thumb_refcount = 0;
15128 eh->plt.noncall_refcount = 0;
15129 }
15130
15131 /* If this is a weak symbol, and there is a real definition, the
15132 processor independent code will have arranged for us to see the
15133 real definition first, and we can just use the same value. */
15134 if (h->u.weakdef != NULL)
15135 {
15136 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
15137 || h->u.weakdef->root.type == bfd_link_hash_defweak);
15138 h->root.u.def.section = h->u.weakdef->root.u.def.section;
15139 h->root.u.def.value = h->u.weakdef->root.u.def.value;
15140 return TRUE;
15141 }
15142
15143 /* If there are no non-GOT references, we do not need a copy
15144 relocation. */
15145 if (!h->non_got_ref)
15146 return TRUE;
15147
15148 /* This is a reference to a symbol defined by a dynamic object which
15149 is not a function. */
15150
15151 /* If we are creating a shared library, we must presume that the
15152 only references to the symbol are via the global offset table.
15153 For such cases we need not do anything here; the relocations will
15154 be handled correctly by relocate_section. Relocatable executables
15155 can reference data in shared objects directly, so we don't need to
15156 do anything here. */
15157 if (bfd_link_pic (info) || globals->root.is_relocatable_executable)
15158 return TRUE;
15159
15160 /* We must allocate the symbol in our .dynbss section, which will
15161 become part of the .bss section of the executable. There will be
15162 an entry for this symbol in the .dynsym section. The dynamic
15163 object will contain position independent code, so all references
15164 from the dynamic object to this symbol will go through the global
15165 offset table. The dynamic linker will use the .dynsym entry to
15166 determine the address it must put in the global offset table, so
15167 both the dynamic object and the regular object will refer to the
15168 same memory location for the variable. */
15169 s = bfd_get_linker_section (dynobj, ".dynbss");
15170 BFD_ASSERT (s != NULL);
15171
15172 /* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic
15173 linker to copy the initial value out of the dynamic object and into
15174 the runtime process image. We need to remember the offset into the
15175 .rel(a).bss section we are going to use. */
15176 if (info->nocopyreloc == 0
15177 && (h->root.u.def.section->flags & SEC_ALLOC) != 0
15178 && h->size != 0)
15179 {
15180 asection *srel;
15181
15182 srel = bfd_get_linker_section (dynobj, RELOC_SECTION (globals, ".bss"));
15183 elf32_arm_allocate_dynrelocs (info, srel, 1);
15184 h->needs_copy = 1;
15185 }
15186
15187 return _bfd_elf_adjust_dynamic_copy (info, h, s);
15188 }
15189
15190 /* Allocate space in .plt, .got and associated reloc sections for
15191 dynamic relocs. */
15192
15193 static bfd_boolean
15194 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
15195 {
15196 struct bfd_link_info *info;
15197 struct elf32_arm_link_hash_table *htab;
15198 struct elf32_arm_link_hash_entry *eh;
15199 struct elf_dyn_relocs *p;
15200
15201 if (h->root.type == bfd_link_hash_indirect)
15202 return TRUE;
15203
15204 eh = (struct elf32_arm_link_hash_entry *) h;
15205
15206 info = (struct bfd_link_info *) inf;
15207 htab = elf32_arm_hash_table (info);
15208 if (htab == NULL)
15209 return FALSE;
15210
15211 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
15212 && h->plt.refcount > 0)
15213 {
15214 /* Make sure this symbol is output as a dynamic symbol.
15215 Undefined weak syms won't yet be marked as dynamic. */
15216 if (h->dynindx == -1
15217 && !h->forced_local)
15218 {
15219 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15220 return FALSE;
15221 }
15222
15223 /* If the call in the PLT entry binds locally, the associated
15224 GOT entry should use an R_ARM_IRELATIVE relocation instead of
15225 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
15226 than the .plt section. */
15227 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
15228 {
15229 eh->is_iplt = 1;
15230 if (eh->plt.noncall_refcount == 0
15231 && SYMBOL_REFERENCES_LOCAL (info, h))
15232 /* All non-call references can be resolved directly.
15233 This means that they can (and in some cases, must)
15234 resolve directly to the run-time target, rather than
15235 to the PLT. That in turns means that any .got entry
15236 would be equal to the .igot.plt entry, so there's
15237 no point having both. */
15238 h->got.refcount = 0;
15239 }
15240
15241 if (bfd_link_pic (info)
15242 || eh->is_iplt
15243 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
15244 {
15245 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
15246
15247 /* If this symbol is not defined in a regular file, and we are
15248 not generating a shared library, then set the symbol to this
15249 location in the .plt. This is required to make function
15250 pointers compare as equal between the normal executable and
15251 the shared library. */
15252 if (! bfd_link_pic (info)
15253 && !h->def_regular)
15254 {
15255 h->root.u.def.section = htab->root.splt;
15256 h->root.u.def.value = h->plt.offset;
15257
15258 /* Make sure the function is not marked as Thumb, in case
15259 it is the target of an ABS32 relocation, which will
15260 point to the PLT entry. */
15261 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
15262 }
15263
15264 /* VxWorks executables have a second set of relocations for
15265 each PLT entry. They go in a separate relocation section,
15266 which is processed by the kernel loader. */
15267 if (htab->vxworks_p && !bfd_link_pic (info))
15268 {
15269 /* There is a relocation for the initial PLT entry:
15270 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
15271 if (h->plt.offset == htab->plt_header_size)
15272 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
15273
15274 /* There are two extra relocations for each subsequent
15275 PLT entry: an R_ARM_32 relocation for the GOT entry,
15276 and an R_ARM_32 relocation for the PLT entry. */
15277 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
15278 }
15279 }
15280 else
15281 {
15282 h->plt.offset = (bfd_vma) -1;
15283 h->needs_plt = 0;
15284 }
15285 }
15286 else
15287 {
15288 h->plt.offset = (bfd_vma) -1;
15289 h->needs_plt = 0;
15290 }
15291
15292 eh = (struct elf32_arm_link_hash_entry *) h;
15293 eh->tlsdesc_got = (bfd_vma) -1;
15294
15295 if (h->got.refcount > 0)
15296 {
15297 asection *s;
15298 bfd_boolean dyn;
15299 int tls_type = elf32_arm_hash_entry (h)->tls_type;
15300 int indx;
15301
15302 /* Make sure this symbol is output as a dynamic symbol.
15303 Undefined weak syms won't yet be marked as dynamic. */
15304 if (h->dynindx == -1
15305 && !h->forced_local)
15306 {
15307 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15308 return FALSE;
15309 }
15310
15311 if (!htab->symbian_p)
15312 {
15313 s = htab->root.sgot;
15314 h->got.offset = s->size;
15315
15316 if (tls_type == GOT_UNKNOWN)
15317 abort ();
15318
15319 if (tls_type == GOT_NORMAL)
15320 /* Non-TLS symbols need one GOT slot. */
15321 s->size += 4;
15322 else
15323 {
15324 if (tls_type & GOT_TLS_GDESC)
15325 {
15326 /* R_ARM_TLS_DESC needs 2 GOT slots. */
15327 eh->tlsdesc_got
15328 = (htab->root.sgotplt->size
15329 - elf32_arm_compute_jump_table_size (htab));
15330 htab->root.sgotplt->size += 8;
15331 h->got.offset = (bfd_vma) -2;
15332 /* plt.got_offset needs to know there's a TLS_DESC
15333 reloc in the middle of .got.plt. */
15334 htab->num_tls_desc++;
15335 }
15336
15337 if (tls_type & GOT_TLS_GD)
15338 {
15339 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
15340 the symbol is both GD and GDESC, got.offset may
15341 have been overwritten. */
15342 h->got.offset = s->size;
15343 s->size += 8;
15344 }
15345
15346 if (tls_type & GOT_TLS_IE)
15347 /* R_ARM_TLS_IE32 needs one GOT slot. */
15348 s->size += 4;
15349 }
15350
15351 dyn = htab->root.dynamic_sections_created;
15352
15353 indx = 0;
15354 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
15355 bfd_link_pic (info),
15356 h)
15357 && (!bfd_link_pic (info)
15358 || !SYMBOL_REFERENCES_LOCAL (info, h)))
15359 indx = h->dynindx;
15360
15361 if (tls_type != GOT_NORMAL
15362 && (bfd_link_pic (info) || indx != 0)
15363 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
15364 || h->root.type != bfd_link_hash_undefweak))
15365 {
15366 if (tls_type & GOT_TLS_IE)
15367 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15368
15369 if (tls_type & GOT_TLS_GD)
15370 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15371
15372 if (tls_type & GOT_TLS_GDESC)
15373 {
15374 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
15375 /* GDESC needs a trampoline to jump to. */
15376 htab->tls_trampoline = -1;
15377 }
15378
15379 /* Only GD needs it. GDESC just emits one relocation per
15380 2 entries. */
15381 if ((tls_type & GOT_TLS_GD) && indx != 0)
15382 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15383 }
15384 else if (indx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
15385 {
15386 if (htab->root.dynamic_sections_created)
15387 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
15388 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15389 }
15390 else if (h->type == STT_GNU_IFUNC
15391 && eh->plt.noncall_refcount == 0)
15392 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
15393 they all resolve dynamically instead. Reserve room for the
15394 GOT entry's R_ARM_IRELATIVE relocation. */
15395 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
15396 else if (bfd_link_pic (info)
15397 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
15398 || h->root.type != bfd_link_hash_undefweak))
15399 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
15400 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15401 }
15402 }
15403 else
15404 h->got.offset = (bfd_vma) -1;
15405
15406 /* Allocate stubs for exported Thumb functions on v4t. */
15407 if (!htab->use_blx && h->dynindx != -1
15408 && h->def_regular
15409 && ARM_GET_SYM_BRANCH_TYPE (h->target_internal) == ST_BRANCH_TO_THUMB
15410 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
15411 {
15412 struct elf_link_hash_entry * th;
15413 struct bfd_link_hash_entry * bh;
15414 struct elf_link_hash_entry * myh;
15415 char name[1024];
15416 asection *s;
15417 bh = NULL;
15418 /* Create a new symbol to regist the real location of the function. */
15419 s = h->root.u.def.section;
15420 sprintf (name, "__real_%s", h->root.root.string);
15421 _bfd_generic_link_add_one_symbol (info, s->owner,
15422 name, BSF_GLOBAL, s,
15423 h->root.u.def.value,
15424 NULL, TRUE, FALSE, &bh);
15425
15426 myh = (struct elf_link_hash_entry *) bh;
15427 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
15428 myh->forced_local = 1;
15429 ARM_SET_SYM_BRANCH_TYPE (myh->target_internal, ST_BRANCH_TO_THUMB);
15430 eh->export_glue = myh;
15431 th = record_arm_to_thumb_glue (info, h);
15432 /* Point the symbol at the stub. */
15433 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
15434 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
15435 h->root.u.def.section = th->root.u.def.section;
15436 h->root.u.def.value = th->root.u.def.value & ~1;
15437 }
15438
15439 if (eh->dyn_relocs == NULL)
15440 return TRUE;
15441
15442 /* In the shared -Bsymbolic case, discard space allocated for
15443 dynamic pc-relative relocs against symbols which turn out to be
15444 defined in regular objects. For the normal shared case, discard
15445 space for pc-relative relocs that have become local due to symbol
15446 visibility changes. */
15447
15448 if (bfd_link_pic (info) || htab->root.is_relocatable_executable)
15449 {
15450 /* Relocs that use pc_count are PC-relative forms, which will appear
15451 on something like ".long foo - ." or "movw REG, foo - .". We want
15452 calls to protected symbols to resolve directly to the function
15453 rather than going via the plt. If people want function pointer
15454 comparisons to work as expected then they should avoid writing
15455 assembly like ".long foo - .". */
15456 if (SYMBOL_CALLS_LOCAL (info, h))
15457 {
15458 struct elf_dyn_relocs **pp;
15459
15460 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
15461 {
15462 p->count -= p->pc_count;
15463 p->pc_count = 0;
15464 if (p->count == 0)
15465 *pp = p->next;
15466 else
15467 pp = &p->next;
15468 }
15469 }
15470
15471 if (htab->vxworks_p)
15472 {
15473 struct elf_dyn_relocs **pp;
15474
15475 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
15476 {
15477 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
15478 *pp = p->next;
15479 else
15480 pp = &p->next;
15481 }
15482 }
15483
15484 /* Also discard relocs on undefined weak syms with non-default
15485 visibility. */
15486 if (eh->dyn_relocs != NULL
15487 && h->root.type == bfd_link_hash_undefweak)
15488 {
15489 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
15490 eh->dyn_relocs = NULL;
15491
15492 /* Make sure undefined weak symbols are output as a dynamic
15493 symbol in PIEs. */
15494 else if (h->dynindx == -1
15495 && !h->forced_local)
15496 {
15497 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15498 return FALSE;
15499 }
15500 }
15501
15502 else if (htab->root.is_relocatable_executable && h->dynindx == -1
15503 && h->root.type == bfd_link_hash_new)
15504 {
15505 /* Output absolute symbols so that we can create relocations
15506 against them. For normal symbols we output a relocation
15507 against the section that contains them. */
15508 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15509 return FALSE;
15510 }
15511
15512 }
15513 else
15514 {
15515 /* For the non-shared case, discard space for relocs against
15516 symbols which turn out to need copy relocs or are not
15517 dynamic. */
15518
15519 if (!h->non_got_ref
15520 && ((h->def_dynamic
15521 && !h->def_regular)
15522 || (htab->root.dynamic_sections_created
15523 && (h->root.type == bfd_link_hash_undefweak
15524 || h->root.type == bfd_link_hash_undefined))))
15525 {
15526 /* Make sure this symbol is output as a dynamic symbol.
15527 Undefined weak syms won't yet be marked as dynamic. */
15528 if (h->dynindx == -1
15529 && !h->forced_local)
15530 {
15531 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15532 return FALSE;
15533 }
15534
15535 /* If that succeeded, we know we'll be keeping all the
15536 relocs. */
15537 if (h->dynindx != -1)
15538 goto keep;
15539 }
15540
15541 eh->dyn_relocs = NULL;
15542
15543 keep: ;
15544 }
15545
15546 /* Finally, allocate space. */
15547 for (p = eh->dyn_relocs; p != NULL; p = p->next)
15548 {
15549 asection *sreloc = elf_section_data (p->sec)->sreloc;
15550 if (h->type == STT_GNU_IFUNC
15551 && eh->plt.noncall_refcount == 0
15552 && SYMBOL_REFERENCES_LOCAL (info, h))
15553 elf32_arm_allocate_irelocs (info, sreloc, p->count);
15554 else
15555 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
15556 }
15557
15558 return TRUE;
15559 }
15560
15561 /* Find any dynamic relocs that apply to read-only sections. */
15562
15563 static bfd_boolean
15564 elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
15565 {
15566 struct elf32_arm_link_hash_entry * eh;
15567 struct elf_dyn_relocs * p;
15568
15569 eh = (struct elf32_arm_link_hash_entry *) h;
15570 for (p = eh->dyn_relocs; p != NULL; p = p->next)
15571 {
15572 asection *s = p->sec;
15573
15574 if (s != NULL && (s->flags & SEC_READONLY) != 0)
15575 {
15576 struct bfd_link_info *info = (struct bfd_link_info *) inf;
15577
15578 info->flags |= DF_TEXTREL;
15579
15580 /* Not an error, just cut short the traversal. */
15581 return FALSE;
15582 }
15583 }
15584 return TRUE;
15585 }
15586
15587 void
15588 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
15589 int byteswap_code)
15590 {
15591 struct elf32_arm_link_hash_table *globals;
15592
15593 globals = elf32_arm_hash_table (info);
15594 if (globals == NULL)
15595 return;
15596
15597 globals->byteswap_code = byteswap_code;
15598 }
15599
15600 /* Set the sizes of the dynamic sections. */
15601
15602 static bfd_boolean
15603 elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
15604 struct bfd_link_info * info)
15605 {
15606 bfd * dynobj;
15607 asection * s;
15608 bfd_boolean plt;
15609 bfd_boolean relocs;
15610 bfd *ibfd;
15611 struct elf32_arm_link_hash_table *htab;
15612
15613 htab = elf32_arm_hash_table (info);
15614 if (htab == NULL)
15615 return FALSE;
15616
15617 dynobj = elf_hash_table (info)->dynobj;
15618 BFD_ASSERT (dynobj != NULL);
15619 check_use_blx (htab);
15620
15621 if (elf_hash_table (info)->dynamic_sections_created)
15622 {
15623 /* Set the contents of the .interp section to the interpreter. */
15624 if (bfd_link_executable (info) && !info->nointerp)
15625 {
15626 s = bfd_get_linker_section (dynobj, ".interp");
15627 BFD_ASSERT (s != NULL);
15628 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
15629 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
15630 }
15631 }
15632
15633 /* Set up .got offsets for local syms, and space for local dynamic
15634 relocs. */
15635 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
15636 {
15637 bfd_signed_vma *local_got;
15638 bfd_signed_vma *end_local_got;
15639 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
15640 char *local_tls_type;
15641 bfd_vma *local_tlsdesc_gotent;
15642 bfd_size_type locsymcount;
15643 Elf_Internal_Shdr *symtab_hdr;
15644 asection *srel;
15645 bfd_boolean is_vxworks = htab->vxworks_p;
15646 unsigned int symndx;
15647
15648 if (! is_arm_elf (ibfd))
15649 continue;
15650
15651 for (s = ibfd->sections; s != NULL; s = s->next)
15652 {
15653 struct elf_dyn_relocs *p;
15654
15655 for (p = (struct elf_dyn_relocs *)
15656 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
15657 {
15658 if (!bfd_is_abs_section (p->sec)
15659 && bfd_is_abs_section (p->sec->output_section))
15660 {
15661 /* Input section has been discarded, either because
15662 it is a copy of a linkonce section or due to
15663 linker script /DISCARD/, so we'll be discarding
15664 the relocs too. */
15665 }
15666 else if (is_vxworks
15667 && strcmp (p->sec->output_section->name,
15668 ".tls_vars") == 0)
15669 {
15670 /* Relocations in vxworks .tls_vars sections are
15671 handled specially by the loader. */
15672 }
15673 else if (p->count != 0)
15674 {
15675 srel = elf_section_data (p->sec)->sreloc;
15676 elf32_arm_allocate_dynrelocs (info, srel, p->count);
15677 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
15678 info->flags |= DF_TEXTREL;
15679 }
15680 }
15681 }
15682
15683 local_got = elf_local_got_refcounts (ibfd);
15684 if (!local_got)
15685 continue;
15686
15687 symtab_hdr = & elf_symtab_hdr (ibfd);
15688 locsymcount = symtab_hdr->sh_info;
15689 end_local_got = local_got + locsymcount;
15690 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
15691 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
15692 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
15693 symndx = 0;
15694 s = htab->root.sgot;
15695 srel = htab->root.srelgot;
15696 for (; local_got < end_local_got;
15697 ++local_got, ++local_iplt_ptr, ++local_tls_type,
15698 ++local_tlsdesc_gotent, ++symndx)
15699 {
15700 *local_tlsdesc_gotent = (bfd_vma) -1;
15701 local_iplt = *local_iplt_ptr;
15702 if (local_iplt != NULL)
15703 {
15704 struct elf_dyn_relocs *p;
15705
15706 if (local_iplt->root.refcount > 0)
15707 {
15708 elf32_arm_allocate_plt_entry (info, TRUE,
15709 &local_iplt->root,
15710 &local_iplt->arm);
15711 if (local_iplt->arm.noncall_refcount == 0)
15712 /* All references to the PLT are calls, so all
15713 non-call references can resolve directly to the
15714 run-time target. This means that the .got entry
15715 would be the same as the .igot.plt entry, so there's
15716 no point creating both. */
15717 *local_got = 0;
15718 }
15719 else
15720 {
15721 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
15722 local_iplt->root.offset = (bfd_vma) -1;
15723 }
15724
15725 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
15726 {
15727 asection *psrel;
15728
15729 psrel = elf_section_data (p->sec)->sreloc;
15730 if (local_iplt->arm.noncall_refcount == 0)
15731 elf32_arm_allocate_irelocs (info, psrel, p->count);
15732 else
15733 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
15734 }
15735 }
15736 if (*local_got > 0)
15737 {
15738 Elf_Internal_Sym *isym;
15739
15740 *local_got = s->size;
15741 if (*local_tls_type & GOT_TLS_GD)
15742 /* TLS_GD relocs need an 8-byte structure in the GOT. */
15743 s->size += 8;
15744 if (*local_tls_type & GOT_TLS_GDESC)
15745 {
15746 *local_tlsdesc_gotent = htab->root.sgotplt->size
15747 - elf32_arm_compute_jump_table_size (htab);
15748 htab->root.sgotplt->size += 8;
15749 *local_got = (bfd_vma) -2;
15750 /* plt.got_offset needs to know there's a TLS_DESC
15751 reloc in the middle of .got.plt. */
15752 htab->num_tls_desc++;
15753 }
15754 if (*local_tls_type & GOT_TLS_IE)
15755 s->size += 4;
15756
15757 if (*local_tls_type & GOT_NORMAL)
15758 {
15759 /* If the symbol is both GD and GDESC, *local_got
15760 may have been overwritten. */
15761 *local_got = s->size;
15762 s->size += 4;
15763 }
15764
15765 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
15766 if (isym == NULL)
15767 return FALSE;
15768
15769 /* If all references to an STT_GNU_IFUNC PLT are calls,
15770 then all non-call references, including this GOT entry,
15771 resolve directly to the run-time target. */
15772 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
15773 && (local_iplt == NULL
15774 || local_iplt->arm.noncall_refcount == 0))
15775 elf32_arm_allocate_irelocs (info, srel, 1);
15776 else if (bfd_link_pic (info) || output_bfd->flags & DYNAMIC)
15777 {
15778 if ((bfd_link_pic (info) && !(*local_tls_type & GOT_TLS_GDESC))
15779 || *local_tls_type & GOT_TLS_GD)
15780 elf32_arm_allocate_dynrelocs (info, srel, 1);
15781
15782 if (bfd_link_pic (info) && *local_tls_type & GOT_TLS_GDESC)
15783 {
15784 elf32_arm_allocate_dynrelocs (info,
15785 htab->root.srelplt, 1);
15786 htab->tls_trampoline = -1;
15787 }
15788 }
15789 }
15790 else
15791 *local_got = (bfd_vma) -1;
15792 }
15793 }
15794
15795 if (htab->tls_ldm_got.refcount > 0)
15796 {
15797 /* Allocate two GOT entries and one dynamic relocation (if necessary)
15798 for R_ARM_TLS_LDM32 relocations. */
15799 htab->tls_ldm_got.offset = htab->root.sgot->size;
15800 htab->root.sgot->size += 8;
15801 if (bfd_link_pic (info))
15802 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15803 }
15804 else
15805 htab->tls_ldm_got.offset = -1;
15806
15807 /* Allocate global sym .plt and .got entries, and space for global
15808 sym dynamic relocs. */
15809 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
15810
15811 /* Here we rummage through the found bfds to collect glue information. */
15812 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
15813 {
15814 if (! is_arm_elf (ibfd))
15815 continue;
15816
15817 /* Initialise mapping tables for code/data. */
15818 bfd_elf32_arm_init_maps (ibfd);
15819
15820 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
15821 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info)
15822 || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd, info))
15823 /* xgettext:c-format */
15824 _bfd_error_handler (_("Errors encountered processing file %s"),
15825 ibfd->filename);
15826 }
15827
15828 /* Allocate space for the glue sections now that we've sized them. */
15829 bfd_elf32_arm_allocate_interworking_sections (info);
15830
15831 /* For every jump slot reserved in the sgotplt, reloc_count is
15832 incremented. However, when we reserve space for TLS descriptors,
15833 it's not incremented, so in order to compute the space reserved
15834 for them, it suffices to multiply the reloc count by the jump
15835 slot size. */
15836 if (htab->root.srelplt)
15837 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
15838
15839 if (htab->tls_trampoline)
15840 {
15841 if (htab->root.splt->size == 0)
15842 htab->root.splt->size += htab->plt_header_size;
15843
15844 htab->tls_trampoline = htab->root.splt->size;
15845 htab->root.splt->size += htab->plt_entry_size;
15846
15847 /* If we're not using lazy TLS relocations, don't generate the
15848 PLT and GOT entries they require. */
15849 if (!(info->flags & DF_BIND_NOW))
15850 {
15851 htab->dt_tlsdesc_got = htab->root.sgot->size;
15852 htab->root.sgot->size += 4;
15853
15854 htab->dt_tlsdesc_plt = htab->root.splt->size;
15855 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
15856 }
15857 }
15858
15859 /* The check_relocs and adjust_dynamic_symbol entry points have
15860 determined the sizes of the various dynamic sections. Allocate
15861 memory for them. */
15862 plt = FALSE;
15863 relocs = FALSE;
15864 for (s = dynobj->sections; s != NULL; s = s->next)
15865 {
15866 const char * name;
15867
15868 if ((s->flags & SEC_LINKER_CREATED) == 0)
15869 continue;
15870
15871 /* It's OK to base decisions on the section name, because none
15872 of the dynobj section names depend upon the input files. */
15873 name = bfd_get_section_name (dynobj, s);
15874
15875 if (s == htab->root.splt)
15876 {
15877 /* Remember whether there is a PLT. */
15878 plt = s->size != 0;
15879 }
15880 else if (CONST_STRNEQ (name, ".rel"))
15881 {
15882 if (s->size != 0)
15883 {
15884 /* Remember whether there are any reloc sections other
15885 than .rel(a).plt and .rela.plt.unloaded. */
15886 if (s != htab->root.srelplt && s != htab->srelplt2)
15887 relocs = TRUE;
15888
15889 /* We use the reloc_count field as a counter if we need
15890 to copy relocs into the output file. */
15891 s->reloc_count = 0;
15892 }
15893 }
15894 else if (s != htab->root.sgot
15895 && s != htab->root.sgotplt
15896 && s != htab->root.iplt
15897 && s != htab->root.igotplt
15898 && s != htab->sdynbss)
15899 {
15900 /* It's not one of our sections, so don't allocate space. */
15901 continue;
15902 }
15903
15904 if (s->size == 0)
15905 {
15906 /* If we don't need this section, strip it from the
15907 output file. This is mostly to handle .rel(a).bss and
15908 .rel(a).plt. We must create both sections in
15909 create_dynamic_sections, because they must be created
15910 before the linker maps input sections to output
15911 sections. The linker does that before
15912 adjust_dynamic_symbol is called, and it is that
15913 function which decides whether anything needs to go
15914 into these sections. */
15915 s->flags |= SEC_EXCLUDE;
15916 continue;
15917 }
15918
15919 if ((s->flags & SEC_HAS_CONTENTS) == 0)
15920 continue;
15921
15922 /* Allocate memory for the section contents. */
15923 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
15924 if (s->contents == NULL)
15925 return FALSE;
15926 }
15927
15928 if (elf_hash_table (info)->dynamic_sections_created)
15929 {
15930 /* Add some entries to the .dynamic section. We fill in the
15931 values later, in elf32_arm_finish_dynamic_sections, but we
15932 must add the entries now so that we get the correct size for
15933 the .dynamic section. The DT_DEBUG entry is filled in by the
15934 dynamic linker and used by the debugger. */
15935 #define add_dynamic_entry(TAG, VAL) \
15936 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
15937
15938 if (bfd_link_executable (info))
15939 {
15940 if (!add_dynamic_entry (DT_DEBUG, 0))
15941 return FALSE;
15942 }
15943
15944 if (plt)
15945 {
15946 if ( !add_dynamic_entry (DT_PLTGOT, 0)
15947 || !add_dynamic_entry (DT_PLTRELSZ, 0)
15948 || !add_dynamic_entry (DT_PLTREL,
15949 htab->use_rel ? DT_REL : DT_RELA)
15950 || !add_dynamic_entry (DT_JMPREL, 0))
15951 return FALSE;
15952
15953 if (htab->dt_tlsdesc_plt
15954 && (!add_dynamic_entry (DT_TLSDESC_PLT,0)
15955 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
15956 return FALSE;
15957 }
15958
15959 if (relocs)
15960 {
15961 if (htab->use_rel)
15962 {
15963 if (!add_dynamic_entry (DT_REL, 0)
15964 || !add_dynamic_entry (DT_RELSZ, 0)
15965 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
15966 return FALSE;
15967 }
15968 else
15969 {
15970 if (!add_dynamic_entry (DT_RELA, 0)
15971 || !add_dynamic_entry (DT_RELASZ, 0)
15972 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
15973 return FALSE;
15974 }
15975 }
15976
15977 /* If any dynamic relocs apply to a read-only section,
15978 then we need a DT_TEXTREL entry. */
15979 if ((info->flags & DF_TEXTREL) == 0)
15980 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
15981 info);
15982
15983 if ((info->flags & DF_TEXTREL) != 0)
15984 {
15985 if (!add_dynamic_entry (DT_TEXTREL, 0))
15986 return FALSE;
15987 }
15988 if (htab->vxworks_p
15989 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
15990 return FALSE;
15991 }
15992 #undef add_dynamic_entry
15993
15994 return TRUE;
15995 }
15996
15997 /* Size sections even though they're not dynamic. We use it to setup
15998 _TLS_MODULE_BASE_, if needed. */
15999
16000 static bfd_boolean
16001 elf32_arm_always_size_sections (bfd *output_bfd,
16002 struct bfd_link_info *info)
16003 {
16004 asection *tls_sec;
16005
16006 if (bfd_link_relocatable (info))
16007 return TRUE;
16008
16009 tls_sec = elf_hash_table (info)->tls_sec;
16010
16011 if (tls_sec)
16012 {
16013 struct elf_link_hash_entry *tlsbase;
16014
16015 tlsbase = elf_link_hash_lookup
16016 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
16017
16018 if (tlsbase)
16019 {
16020 struct bfd_link_hash_entry *bh = NULL;
16021 const struct elf_backend_data *bed
16022 = get_elf_backend_data (output_bfd);
16023
16024 if (!(_bfd_generic_link_add_one_symbol
16025 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
16026 tls_sec, 0, NULL, FALSE,
16027 bed->collect, &bh)))
16028 return FALSE;
16029
16030 tlsbase->type = STT_TLS;
16031 tlsbase = (struct elf_link_hash_entry *)bh;
16032 tlsbase->def_regular = 1;
16033 tlsbase->other = STV_HIDDEN;
16034 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
16035 }
16036 }
16037 return TRUE;
16038 }
16039
16040 /* Finish up dynamic symbol handling. We set the contents of various
16041 dynamic sections here. */
16042
16043 static bfd_boolean
16044 elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
16045 struct bfd_link_info * info,
16046 struct elf_link_hash_entry * h,
16047 Elf_Internal_Sym * sym)
16048 {
16049 struct elf32_arm_link_hash_table *htab;
16050 struct elf32_arm_link_hash_entry *eh;
16051
16052 htab = elf32_arm_hash_table (info);
16053 if (htab == NULL)
16054 return FALSE;
16055
16056 eh = (struct elf32_arm_link_hash_entry *) h;
16057
16058 if (h->plt.offset != (bfd_vma) -1)
16059 {
16060 if (!eh->is_iplt)
16061 {
16062 BFD_ASSERT (h->dynindx != -1);
16063 if (! elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
16064 h->dynindx, 0))
16065 return FALSE;
16066 }
16067
16068 if (!h->def_regular)
16069 {
16070 /* Mark the symbol as undefined, rather than as defined in
16071 the .plt section. */
16072 sym->st_shndx = SHN_UNDEF;
16073 /* If the symbol is weak we need to clear the value.
16074 Otherwise, the PLT entry would provide a definition for
16075 the symbol even if the symbol wasn't defined anywhere,
16076 and so the symbol would never be NULL. Leave the value if
16077 there were any relocations where pointer equality matters
16078 (this is a clue for the dynamic linker, to make function
16079 pointer comparisons work between an application and shared
16080 library). */
16081 if (!h->ref_regular_nonweak || !h->pointer_equality_needed)
16082 sym->st_value = 0;
16083 }
16084 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
16085 {
16086 /* At least one non-call relocation references this .iplt entry,
16087 so the .iplt entry is the function's canonical address. */
16088 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
16089 ARM_SET_SYM_BRANCH_TYPE (sym->st_target_internal, ST_BRANCH_TO_ARM);
16090 sym->st_shndx = (_bfd_elf_section_from_bfd_section
16091 (output_bfd, htab->root.iplt->output_section));
16092 sym->st_value = (h->plt.offset
16093 + htab->root.iplt->output_section->vma
16094 + htab->root.iplt->output_offset);
16095 }
16096 }
16097
16098 if (h->needs_copy)
16099 {
16100 asection * s;
16101 Elf_Internal_Rela rel;
16102
16103 /* This symbol needs a copy reloc. Set it up. */
16104 BFD_ASSERT (h->dynindx != -1
16105 && (h->root.type == bfd_link_hash_defined
16106 || h->root.type == bfd_link_hash_defweak));
16107
16108 s = htab->srelbss;
16109 BFD_ASSERT (s != NULL);
16110
16111 rel.r_addend = 0;
16112 rel.r_offset = (h->root.u.def.value
16113 + h->root.u.def.section->output_section->vma
16114 + h->root.u.def.section->output_offset);
16115 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
16116 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
16117 }
16118
16119 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
16120 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
16121 to the ".got" section. */
16122 if (h == htab->root.hdynamic
16123 || (!htab->vxworks_p && h == htab->root.hgot))
16124 sym->st_shndx = SHN_ABS;
16125
16126 return TRUE;
16127 }
16128
16129 static void
16130 arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
16131 void *contents,
16132 const unsigned long *template, unsigned count)
16133 {
16134 unsigned ix;
16135
16136 for (ix = 0; ix != count; ix++)
16137 {
16138 unsigned long insn = template[ix];
16139
16140 /* Emit mov pc,rx if bx is not permitted. */
16141 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
16142 insn = (insn & 0xf000000f) | 0x01a0f000;
16143 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
16144 }
16145 }
16146
16147 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
16148 other variants, NaCl needs this entry in a static executable's
16149 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
16150 zero. For .iplt really only the last bundle is useful, and .iplt
16151 could have a shorter first entry, with each individual PLT entry's
16152 relative branch calculated differently so it targets the last
16153 bundle instead of the instruction before it (labelled .Lplt_tail
16154 above). But it's simpler to keep the size and layout of PLT0
16155 consistent with the dynamic case, at the cost of some dead code at
16156 the start of .iplt and the one dead store to the stack at the start
16157 of .Lplt_tail. */
16158 static void
16159 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
16160 asection *plt, bfd_vma got_displacement)
16161 {
16162 unsigned int i;
16163
16164 put_arm_insn (htab, output_bfd,
16165 elf32_arm_nacl_plt0_entry[0]
16166 | arm_movw_immediate (got_displacement),
16167 plt->contents + 0);
16168 put_arm_insn (htab, output_bfd,
16169 elf32_arm_nacl_plt0_entry[1]
16170 | arm_movt_immediate (got_displacement),
16171 plt->contents + 4);
16172
16173 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
16174 put_arm_insn (htab, output_bfd,
16175 elf32_arm_nacl_plt0_entry[i],
16176 plt->contents + (i * 4));
16177 }
16178
16179 /* Finish up the dynamic sections. */
16180
16181 static bfd_boolean
16182 elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
16183 {
16184 bfd * dynobj;
16185 asection * sgot;
16186 asection * sdyn;
16187 struct elf32_arm_link_hash_table *htab;
16188
16189 htab = elf32_arm_hash_table (info);
16190 if (htab == NULL)
16191 return FALSE;
16192
16193 dynobj = elf_hash_table (info)->dynobj;
16194
16195 sgot = htab->root.sgotplt;
16196 /* A broken linker script might have discarded the dynamic sections.
16197 Catch this here so that we do not seg-fault later on. */
16198 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
16199 return FALSE;
16200 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
16201
16202 if (elf_hash_table (info)->dynamic_sections_created)
16203 {
16204 asection *splt;
16205 Elf32_External_Dyn *dyncon, *dynconend;
16206
16207 splt = htab->root.splt;
16208 BFD_ASSERT (splt != NULL && sdyn != NULL);
16209 BFD_ASSERT (htab->symbian_p || sgot != NULL);
16210
16211 dyncon = (Elf32_External_Dyn *) sdyn->contents;
16212 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
16213
16214 for (; dyncon < dynconend; dyncon++)
16215 {
16216 Elf_Internal_Dyn dyn;
16217 const char * name;
16218 asection * s;
16219
16220 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
16221
16222 switch (dyn.d_tag)
16223 {
16224 unsigned int type;
16225
16226 default:
16227 if (htab->vxworks_p
16228 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
16229 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16230 break;
16231
16232 case DT_HASH:
16233 name = ".hash";
16234 goto get_vma_if_bpabi;
16235 case DT_STRTAB:
16236 name = ".dynstr";
16237 goto get_vma_if_bpabi;
16238 case DT_SYMTAB:
16239 name = ".dynsym";
16240 goto get_vma_if_bpabi;
16241 case DT_VERSYM:
16242 name = ".gnu.version";
16243 goto get_vma_if_bpabi;
16244 case DT_VERDEF:
16245 name = ".gnu.version_d";
16246 goto get_vma_if_bpabi;
16247 case DT_VERNEED:
16248 name = ".gnu.version_r";
16249 goto get_vma_if_bpabi;
16250
16251 case DT_PLTGOT:
16252 name = htab->symbian_p ? ".got" : ".got.plt";
16253 goto get_vma;
16254 case DT_JMPREL:
16255 name = RELOC_SECTION (htab, ".plt");
16256 get_vma:
16257 s = bfd_get_linker_section (dynobj, name);
16258 if (s == NULL)
16259 {
16260 (*_bfd_error_handler)
16261 (_("could not find section %s"), name);
16262 bfd_set_error (bfd_error_invalid_operation);
16263 return FALSE;
16264 }
16265 if (!htab->symbian_p)
16266 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
16267 else
16268 /* In the BPABI, tags in the PT_DYNAMIC section point
16269 at the file offset, not the memory address, for the
16270 convenience of the post linker. */
16271 dyn.d_un.d_ptr = s->output_section->filepos + s->output_offset;
16272 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16273 break;
16274
16275 get_vma_if_bpabi:
16276 if (htab->symbian_p)
16277 goto get_vma;
16278 break;
16279
16280 case DT_PLTRELSZ:
16281 s = htab->root.srelplt;
16282 BFD_ASSERT (s != NULL);
16283 dyn.d_un.d_val = s->size;
16284 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16285 break;
16286
16287 case DT_RELSZ:
16288 case DT_RELASZ:
16289 if (!htab->symbian_p)
16290 {
16291 /* My reading of the SVR4 ABI indicates that the
16292 procedure linkage table relocs (DT_JMPREL) should be
16293 included in the overall relocs (DT_REL). This is
16294 what Solaris does. However, UnixWare can not handle
16295 that case. Therefore, we override the DT_RELSZ entry
16296 here to make it not include the JMPREL relocs. Since
16297 the linker script arranges for .rel(a).plt to follow all
16298 other relocation sections, we don't have to worry
16299 about changing the DT_REL entry. */
16300 s = htab->root.srelplt;
16301 if (s != NULL)
16302 dyn.d_un.d_val -= s->size;
16303 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16304 break;
16305 }
16306 /* Fall through. */
16307
16308 case DT_REL:
16309 case DT_RELA:
16310 /* In the BPABI, the DT_REL tag must point at the file
16311 offset, not the VMA, of the first relocation
16312 section. So, we use code similar to that in
16313 elflink.c, but do not check for SHF_ALLOC on the
16314 relcoation section, since relocations sections are
16315 never allocated under the BPABI. The comments above
16316 about Unixware notwithstanding, we include all of the
16317 relocations here. */
16318 if (htab->symbian_p)
16319 {
16320 unsigned int i;
16321 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
16322 ? SHT_REL : SHT_RELA);
16323 dyn.d_un.d_val = 0;
16324 for (i = 1; i < elf_numsections (output_bfd); i++)
16325 {
16326 Elf_Internal_Shdr *hdr
16327 = elf_elfsections (output_bfd)[i];
16328 if (hdr->sh_type == type)
16329 {
16330 if (dyn.d_tag == DT_RELSZ
16331 || dyn.d_tag == DT_RELASZ)
16332 dyn.d_un.d_val += hdr->sh_size;
16333 else if ((ufile_ptr) hdr->sh_offset
16334 <= dyn.d_un.d_val - 1)
16335 dyn.d_un.d_val = hdr->sh_offset;
16336 }
16337 }
16338 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16339 }
16340 break;
16341
16342 case DT_TLSDESC_PLT:
16343 s = htab->root.splt;
16344 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
16345 + htab->dt_tlsdesc_plt);
16346 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16347 break;
16348
16349 case DT_TLSDESC_GOT:
16350 s = htab->root.sgot;
16351 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
16352 + htab->dt_tlsdesc_got);
16353 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16354 break;
16355
16356 /* Set the bottom bit of DT_INIT/FINI if the
16357 corresponding function is Thumb. */
16358 case DT_INIT:
16359 name = info->init_function;
16360 goto get_sym;
16361 case DT_FINI:
16362 name = info->fini_function;
16363 get_sym:
16364 /* If it wasn't set by elf_bfd_final_link
16365 then there is nothing to adjust. */
16366 if (dyn.d_un.d_val != 0)
16367 {
16368 struct elf_link_hash_entry * eh;
16369
16370 eh = elf_link_hash_lookup (elf_hash_table (info), name,
16371 FALSE, FALSE, TRUE);
16372 if (eh != NULL
16373 && ARM_GET_SYM_BRANCH_TYPE (eh->target_internal)
16374 == ST_BRANCH_TO_THUMB)
16375 {
16376 dyn.d_un.d_val |= 1;
16377 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16378 }
16379 }
16380 break;
16381 }
16382 }
16383
16384 /* Fill in the first entry in the procedure linkage table. */
16385 if (splt->size > 0 && htab->plt_header_size)
16386 {
16387 const bfd_vma *plt0_entry;
16388 bfd_vma got_address, plt_address, got_displacement;
16389
16390 /* Calculate the addresses of the GOT and PLT. */
16391 got_address = sgot->output_section->vma + sgot->output_offset;
16392 plt_address = splt->output_section->vma + splt->output_offset;
16393
16394 if (htab->vxworks_p)
16395 {
16396 /* The VxWorks GOT is relocated by the dynamic linker.
16397 Therefore, we must emit relocations rather than simply
16398 computing the values now. */
16399 Elf_Internal_Rela rel;
16400
16401 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
16402 put_arm_insn (htab, output_bfd, plt0_entry[0],
16403 splt->contents + 0);
16404 put_arm_insn (htab, output_bfd, plt0_entry[1],
16405 splt->contents + 4);
16406 put_arm_insn (htab, output_bfd, plt0_entry[2],
16407 splt->contents + 8);
16408 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
16409
16410 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
16411 rel.r_offset = plt_address + 12;
16412 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
16413 rel.r_addend = 0;
16414 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
16415 htab->srelplt2->contents);
16416 }
16417 else if (htab->nacl_p)
16418 arm_nacl_put_plt0 (htab, output_bfd, splt,
16419 got_address + 8 - (plt_address + 16));
16420 else if (using_thumb_only (htab))
16421 {
16422 got_displacement = got_address - (plt_address + 12);
16423
16424 plt0_entry = elf32_thumb2_plt0_entry;
16425 put_arm_insn (htab, output_bfd, plt0_entry[0],
16426 splt->contents + 0);
16427 put_arm_insn (htab, output_bfd, plt0_entry[1],
16428 splt->contents + 4);
16429 put_arm_insn (htab, output_bfd, plt0_entry[2],
16430 splt->contents + 8);
16431
16432 bfd_put_32 (output_bfd, got_displacement, splt->contents + 12);
16433 }
16434 else
16435 {
16436 got_displacement = got_address - (plt_address + 16);
16437
16438 plt0_entry = elf32_arm_plt0_entry;
16439 put_arm_insn (htab, output_bfd, plt0_entry[0],
16440 splt->contents + 0);
16441 put_arm_insn (htab, output_bfd, plt0_entry[1],
16442 splt->contents + 4);
16443 put_arm_insn (htab, output_bfd, plt0_entry[2],
16444 splt->contents + 8);
16445 put_arm_insn (htab, output_bfd, plt0_entry[3],
16446 splt->contents + 12);
16447
16448 #ifdef FOUR_WORD_PLT
16449 /* The displacement value goes in the otherwise-unused
16450 last word of the second entry. */
16451 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
16452 #else
16453 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
16454 #endif
16455 }
16456 }
16457
16458 /* UnixWare sets the entsize of .plt to 4, although that doesn't
16459 really seem like the right value. */
16460 if (splt->output_section->owner == output_bfd)
16461 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
16462
16463 if (htab->dt_tlsdesc_plt)
16464 {
16465 bfd_vma got_address
16466 = sgot->output_section->vma + sgot->output_offset;
16467 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
16468 + htab->root.sgot->output_offset);
16469 bfd_vma plt_address
16470 = splt->output_section->vma + splt->output_offset;
16471
16472 arm_put_trampoline (htab, output_bfd,
16473 splt->contents + htab->dt_tlsdesc_plt,
16474 dl_tlsdesc_lazy_trampoline, 6);
16475
16476 bfd_put_32 (output_bfd,
16477 gotplt_address + htab->dt_tlsdesc_got
16478 - (plt_address + htab->dt_tlsdesc_plt)
16479 - dl_tlsdesc_lazy_trampoline[6],
16480 splt->contents + htab->dt_tlsdesc_plt + 24);
16481 bfd_put_32 (output_bfd,
16482 got_address - (plt_address + htab->dt_tlsdesc_plt)
16483 - dl_tlsdesc_lazy_trampoline[7],
16484 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
16485 }
16486
16487 if (htab->tls_trampoline)
16488 {
16489 arm_put_trampoline (htab, output_bfd,
16490 splt->contents + htab->tls_trampoline,
16491 tls_trampoline, 3);
16492 #ifdef FOUR_WORD_PLT
16493 bfd_put_32 (output_bfd, 0x00000000,
16494 splt->contents + htab->tls_trampoline + 12);
16495 #endif
16496 }
16497
16498 if (htab->vxworks_p
16499 && !bfd_link_pic (info)
16500 && htab->root.splt->size > 0)
16501 {
16502 /* Correct the .rel(a).plt.unloaded relocations. They will have
16503 incorrect symbol indexes. */
16504 int num_plts;
16505 unsigned char *p;
16506
16507 num_plts = ((htab->root.splt->size - htab->plt_header_size)
16508 / htab->plt_entry_size);
16509 p = htab->srelplt2->contents + RELOC_SIZE (htab);
16510
16511 for (; num_plts; num_plts--)
16512 {
16513 Elf_Internal_Rela rel;
16514
16515 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
16516 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
16517 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
16518 p += RELOC_SIZE (htab);
16519
16520 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
16521 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
16522 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
16523 p += RELOC_SIZE (htab);
16524 }
16525 }
16526 }
16527
16528 if (htab->nacl_p && htab->root.iplt != NULL && htab->root.iplt->size > 0)
16529 /* NaCl uses a special first entry in .iplt too. */
16530 arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0);
16531
16532 /* Fill in the first three entries in the global offset table. */
16533 if (sgot)
16534 {
16535 if (sgot->size > 0)
16536 {
16537 if (sdyn == NULL)
16538 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
16539 else
16540 bfd_put_32 (output_bfd,
16541 sdyn->output_section->vma + sdyn->output_offset,
16542 sgot->contents);
16543 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
16544 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
16545 }
16546
16547 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
16548 }
16549
16550 return TRUE;
16551 }
16552
16553 static void
16554 elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
16555 {
16556 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
16557 struct elf32_arm_link_hash_table *globals;
16558 struct elf_segment_map *m;
16559
16560 i_ehdrp = elf_elfheader (abfd);
16561
16562 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
16563 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
16564 else
16565 _bfd_elf_post_process_headers (abfd, link_info);
16566 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
16567
16568 if (link_info)
16569 {
16570 globals = elf32_arm_hash_table (link_info);
16571 if (globals != NULL && globals->byteswap_code)
16572 i_ehdrp->e_flags |= EF_ARM_BE8;
16573 }
16574
16575 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
16576 && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
16577 {
16578 int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
16579 if (abi == AEABI_VFP_args_vfp)
16580 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
16581 else
16582 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
16583 }
16584
16585 /* Scan segment to set p_flags attribute if it contains only sections with
16586 SHF_ARM_PURECODE flag. */
16587 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
16588 {
16589 unsigned int j;
16590
16591 if (m->count == 0)
16592 continue;
16593 for (j = 0; j < m->count; j++)
16594 {
16595 if (!(elf_section_flags (m->sections[j]) & SHF_ARM_PURECODE))
16596 break;
16597 }
16598 if (j == m->count)
16599 {
16600 m->p_flags = PF_X;
16601 m->p_flags_valid = 1;
16602 }
16603 }
16604 }
16605
16606 static enum elf_reloc_type_class
16607 elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
16608 const asection *rel_sec ATTRIBUTE_UNUSED,
16609 const Elf_Internal_Rela *rela)
16610 {
16611 switch ((int) ELF32_R_TYPE (rela->r_info))
16612 {
16613 case R_ARM_RELATIVE:
16614 return reloc_class_relative;
16615 case R_ARM_JUMP_SLOT:
16616 return reloc_class_plt;
16617 case R_ARM_COPY:
16618 return reloc_class_copy;
16619 case R_ARM_IRELATIVE:
16620 return reloc_class_ifunc;
16621 default:
16622 return reloc_class_normal;
16623 }
16624 }
16625
16626 static void
16627 elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
16628 {
16629 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
16630 }
16631
16632 /* Return TRUE if this is an unwinding table entry. */
16633
16634 static bfd_boolean
16635 is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
16636 {
16637 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
16638 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
16639 }
16640
16641
16642 /* Set the type and flags for an ARM section. We do this by
16643 the section name, which is a hack, but ought to work. */
16644
16645 static bfd_boolean
16646 elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
16647 {
16648 const char * name;
16649
16650 name = bfd_get_section_name (abfd, sec);
16651
16652 if (is_arm_elf_unwind_section_name (abfd, name))
16653 {
16654 hdr->sh_type = SHT_ARM_EXIDX;
16655 hdr->sh_flags |= SHF_LINK_ORDER;
16656 }
16657
16658 if (sec->flags & SEC_ELF_PURECODE)
16659 hdr->sh_flags |= SHF_ARM_PURECODE;
16660
16661 return TRUE;
16662 }
16663
16664 /* Handle an ARM specific section when reading an object file. This is
16665 called when bfd_section_from_shdr finds a section with an unknown
16666 type. */
16667
16668 static bfd_boolean
16669 elf32_arm_section_from_shdr (bfd *abfd,
16670 Elf_Internal_Shdr * hdr,
16671 const char *name,
16672 int shindex)
16673 {
16674 /* There ought to be a place to keep ELF backend specific flags, but
16675 at the moment there isn't one. We just keep track of the
16676 sections by their name, instead. Fortunately, the ABI gives
16677 names for all the ARM specific sections, so we will probably get
16678 away with this. */
16679 switch (hdr->sh_type)
16680 {
16681 case SHT_ARM_EXIDX:
16682 case SHT_ARM_PREEMPTMAP:
16683 case SHT_ARM_ATTRIBUTES:
16684 break;
16685
16686 default:
16687 return FALSE;
16688 }
16689
16690 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
16691 return FALSE;
16692
16693 return TRUE;
16694 }
16695
16696 static _arm_elf_section_data *
16697 get_arm_elf_section_data (asection * sec)
16698 {
16699 if (sec && sec->owner && is_arm_elf (sec->owner))
16700 return elf32_arm_section_data (sec);
16701 else
16702 return NULL;
16703 }
16704
16705 typedef struct
16706 {
16707 void *flaginfo;
16708 struct bfd_link_info *info;
16709 asection *sec;
16710 int sec_shndx;
16711 int (*func) (void *, const char *, Elf_Internal_Sym *,
16712 asection *, struct elf_link_hash_entry *);
16713 } output_arch_syminfo;
16714
16715 enum map_symbol_type
16716 {
16717 ARM_MAP_ARM,
16718 ARM_MAP_THUMB,
16719 ARM_MAP_DATA
16720 };
16721
16722
16723 /* Output a single mapping symbol. */
16724
16725 static bfd_boolean
16726 elf32_arm_output_map_sym (output_arch_syminfo *osi,
16727 enum map_symbol_type type,
16728 bfd_vma offset)
16729 {
16730 static const char *names[3] = {"$a", "$t", "$d"};
16731 Elf_Internal_Sym sym;
16732
16733 sym.st_value = osi->sec->output_section->vma
16734 + osi->sec->output_offset
16735 + offset;
16736 sym.st_size = 0;
16737 sym.st_other = 0;
16738 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
16739 sym.st_shndx = osi->sec_shndx;
16740 sym.st_target_internal = 0;
16741 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
16742 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
16743 }
16744
16745 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
16746 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
16747
16748 static bfd_boolean
16749 elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
16750 bfd_boolean is_iplt_entry_p,
16751 union gotplt_union *root_plt,
16752 struct arm_plt_info *arm_plt)
16753 {
16754 struct elf32_arm_link_hash_table *htab;
16755 bfd_vma addr, plt_header_size;
16756
16757 if (root_plt->offset == (bfd_vma) -1)
16758 return TRUE;
16759
16760 htab = elf32_arm_hash_table (osi->info);
16761 if (htab == NULL)
16762 return FALSE;
16763
16764 if (is_iplt_entry_p)
16765 {
16766 osi->sec = htab->root.iplt;
16767 plt_header_size = 0;
16768 }
16769 else
16770 {
16771 osi->sec = htab->root.splt;
16772 plt_header_size = htab->plt_header_size;
16773 }
16774 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
16775 (osi->info->output_bfd, osi->sec->output_section));
16776
16777 addr = root_plt->offset & -2;
16778 if (htab->symbian_p)
16779 {
16780 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
16781 return FALSE;
16782 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
16783 return FALSE;
16784 }
16785 else if (htab->vxworks_p)
16786 {
16787 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
16788 return FALSE;
16789 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
16790 return FALSE;
16791 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
16792 return FALSE;
16793 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
16794 return FALSE;
16795 }
16796 else if (htab->nacl_p)
16797 {
16798 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
16799 return FALSE;
16800 }
16801 else if (using_thumb_only (htab))
16802 {
16803 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr))
16804 return FALSE;
16805 }
16806 else
16807 {
16808 bfd_boolean thumb_stub_p;
16809
16810 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
16811 if (thumb_stub_p)
16812 {
16813 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
16814 return FALSE;
16815 }
16816 #ifdef FOUR_WORD_PLT
16817 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
16818 return FALSE;
16819 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
16820 return FALSE;
16821 #else
16822 /* A three-word PLT with no Thumb thunk contains only Arm code,
16823 so only need to output a mapping symbol for the first PLT entry and
16824 entries with thumb thunks. */
16825 if (thumb_stub_p || addr == plt_header_size)
16826 {
16827 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
16828 return FALSE;
16829 }
16830 #endif
16831 }
16832
16833 return TRUE;
16834 }
16835
16836 /* Output mapping symbols for PLT entries associated with H. */
16837
16838 static bfd_boolean
16839 elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
16840 {
16841 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
16842 struct elf32_arm_link_hash_entry *eh;
16843
16844 if (h->root.type == bfd_link_hash_indirect)
16845 return TRUE;
16846
16847 if (h->root.type == bfd_link_hash_warning)
16848 /* When warning symbols are created, they **replace** the "real"
16849 entry in the hash table, thus we never get to see the real
16850 symbol in a hash traversal. So look at it now. */
16851 h = (struct elf_link_hash_entry *) h->root.u.i.link;
16852
16853 eh = (struct elf32_arm_link_hash_entry *) h;
16854 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
16855 &h->plt, &eh->plt);
16856 }
16857
16858 /* Bind a veneered symbol to its veneer identified by its hash entry
16859 STUB_ENTRY. The veneered location thus loose its symbol. */
16860
16861 static void
16862 arm_stub_claim_sym (struct elf32_arm_stub_hash_entry *stub_entry)
16863 {
16864 struct elf32_arm_link_hash_entry *hash = stub_entry->h;
16865
16866 BFD_ASSERT (hash);
16867 hash->root.root.u.def.section = stub_entry->stub_sec;
16868 hash->root.root.u.def.value = stub_entry->stub_offset;
16869 hash->root.size = stub_entry->stub_size;
16870 }
16871
16872 /* Output a single local symbol for a generated stub. */
16873
16874 static bfd_boolean
16875 elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
16876 bfd_vma offset, bfd_vma size)
16877 {
16878 Elf_Internal_Sym sym;
16879
16880 sym.st_value = osi->sec->output_section->vma
16881 + osi->sec->output_offset
16882 + offset;
16883 sym.st_size = size;
16884 sym.st_other = 0;
16885 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
16886 sym.st_shndx = osi->sec_shndx;
16887 sym.st_target_internal = 0;
16888 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
16889 }
16890
16891 static bfd_boolean
16892 arm_map_one_stub (struct bfd_hash_entry * gen_entry,
16893 void * in_arg)
16894 {
16895 struct elf32_arm_stub_hash_entry *stub_entry;
16896 asection *stub_sec;
16897 bfd_vma addr;
16898 char *stub_name;
16899 output_arch_syminfo *osi;
16900 const insn_sequence *template_sequence;
16901 enum stub_insn_type prev_type;
16902 int size;
16903 int i;
16904 enum map_symbol_type sym_type;
16905
16906 /* Massage our args to the form they really have. */
16907 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
16908 osi = (output_arch_syminfo *) in_arg;
16909
16910 stub_sec = stub_entry->stub_sec;
16911
16912 /* Ensure this stub is attached to the current section being
16913 processed. */
16914 if (stub_sec != osi->sec)
16915 return TRUE;
16916
16917 addr = (bfd_vma) stub_entry->stub_offset;
16918 template_sequence = stub_entry->stub_template;
16919
16920 if (arm_stub_sym_claimed (stub_entry->stub_type))
16921 arm_stub_claim_sym (stub_entry);
16922 else
16923 {
16924 stub_name = stub_entry->output_name;
16925 switch (template_sequence[0].type)
16926 {
16927 case ARM_TYPE:
16928 if (!elf32_arm_output_stub_sym (osi, stub_name, addr,
16929 stub_entry->stub_size))
16930 return FALSE;
16931 break;
16932 case THUMB16_TYPE:
16933 case THUMB32_TYPE:
16934 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
16935 stub_entry->stub_size))
16936 return FALSE;
16937 break;
16938 default:
16939 BFD_FAIL ();
16940 return 0;
16941 }
16942 }
16943
16944 prev_type = DATA_TYPE;
16945 size = 0;
16946 for (i = 0; i < stub_entry->stub_template_size; i++)
16947 {
16948 switch (template_sequence[i].type)
16949 {
16950 case ARM_TYPE:
16951 sym_type = ARM_MAP_ARM;
16952 break;
16953
16954 case THUMB16_TYPE:
16955 case THUMB32_TYPE:
16956 sym_type = ARM_MAP_THUMB;
16957 break;
16958
16959 case DATA_TYPE:
16960 sym_type = ARM_MAP_DATA;
16961 break;
16962
16963 default:
16964 BFD_FAIL ();
16965 return FALSE;
16966 }
16967
16968 if (template_sequence[i].type != prev_type)
16969 {
16970 prev_type = template_sequence[i].type;
16971 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
16972 return FALSE;
16973 }
16974
16975 switch (template_sequence[i].type)
16976 {
16977 case ARM_TYPE:
16978 case THUMB32_TYPE:
16979 size += 4;
16980 break;
16981
16982 case THUMB16_TYPE:
16983 size += 2;
16984 break;
16985
16986 case DATA_TYPE:
16987 size += 4;
16988 break;
16989
16990 default:
16991 BFD_FAIL ();
16992 return FALSE;
16993 }
16994 }
16995
16996 return TRUE;
16997 }
16998
16999 /* Output mapping symbols for linker generated sections,
17000 and for those data-only sections that do not have a
17001 $d. */
17002
17003 static bfd_boolean
17004 elf32_arm_output_arch_local_syms (bfd *output_bfd,
17005 struct bfd_link_info *info,
17006 void *flaginfo,
17007 int (*func) (void *, const char *,
17008 Elf_Internal_Sym *,
17009 asection *,
17010 struct elf_link_hash_entry *))
17011 {
17012 output_arch_syminfo osi;
17013 struct elf32_arm_link_hash_table *htab;
17014 bfd_vma offset;
17015 bfd_size_type size;
17016 bfd *input_bfd;
17017
17018 htab = elf32_arm_hash_table (info);
17019 if (htab == NULL)
17020 return FALSE;
17021
17022 check_use_blx (htab);
17023
17024 osi.flaginfo = flaginfo;
17025 osi.info = info;
17026 osi.func = func;
17027
17028 /* Add a $d mapping symbol to data-only sections that
17029 don't have any mapping symbol. This may result in (harmless) redundant
17030 mapping symbols. */
17031 for (input_bfd = info->input_bfds;
17032 input_bfd != NULL;
17033 input_bfd = input_bfd->link.next)
17034 {
17035 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
17036 for (osi.sec = input_bfd->sections;
17037 osi.sec != NULL;
17038 osi.sec = osi.sec->next)
17039 {
17040 if (osi.sec->output_section != NULL
17041 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
17042 != 0)
17043 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
17044 == SEC_HAS_CONTENTS
17045 && get_arm_elf_section_data (osi.sec) != NULL
17046 && get_arm_elf_section_data (osi.sec)->mapcount == 0
17047 && osi.sec->size > 0
17048 && (osi.sec->flags & SEC_EXCLUDE) == 0)
17049 {
17050 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17051 (output_bfd, osi.sec->output_section);
17052 if (osi.sec_shndx != (int)SHN_BAD)
17053 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
17054 }
17055 }
17056 }
17057
17058 /* ARM->Thumb glue. */
17059 if (htab->arm_glue_size > 0)
17060 {
17061 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
17062 ARM2THUMB_GLUE_SECTION_NAME);
17063
17064 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17065 (output_bfd, osi.sec->output_section);
17066 if (bfd_link_pic (info) || htab->root.is_relocatable_executable
17067 || htab->pic_veneer)
17068 size = ARM2THUMB_PIC_GLUE_SIZE;
17069 else if (htab->use_blx)
17070 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
17071 else
17072 size = ARM2THUMB_STATIC_GLUE_SIZE;
17073
17074 for (offset = 0; offset < htab->arm_glue_size; offset += size)
17075 {
17076 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
17077 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
17078 }
17079 }
17080
17081 /* Thumb->ARM glue. */
17082 if (htab->thumb_glue_size > 0)
17083 {
17084 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
17085 THUMB2ARM_GLUE_SECTION_NAME);
17086
17087 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17088 (output_bfd, osi.sec->output_section);
17089 size = THUMB2ARM_GLUE_SIZE;
17090
17091 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
17092 {
17093 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
17094 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
17095 }
17096 }
17097
17098 /* ARMv4 BX veneers. */
17099 if (htab->bx_glue_size > 0)
17100 {
17101 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
17102 ARM_BX_GLUE_SECTION_NAME);
17103
17104 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17105 (output_bfd, osi.sec->output_section);
17106
17107 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
17108 }
17109
17110 /* Long calls stubs. */
17111 if (htab->stub_bfd && htab->stub_bfd->sections)
17112 {
17113 asection* stub_sec;
17114
17115 for (stub_sec = htab->stub_bfd->sections;
17116 stub_sec != NULL;
17117 stub_sec = stub_sec->next)
17118 {
17119 /* Ignore non-stub sections. */
17120 if (!strstr (stub_sec->name, STUB_SUFFIX))
17121 continue;
17122
17123 osi.sec = stub_sec;
17124
17125 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17126 (output_bfd, osi.sec->output_section);
17127
17128 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
17129 }
17130 }
17131
17132 /* Finally, output mapping symbols for the PLT. */
17133 if (htab->root.splt && htab->root.splt->size > 0)
17134 {
17135 osi.sec = htab->root.splt;
17136 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
17137 (output_bfd, osi.sec->output_section));
17138
17139 /* Output mapping symbols for the plt header. SymbianOS does not have a
17140 plt header. */
17141 if (htab->vxworks_p)
17142 {
17143 /* VxWorks shared libraries have no PLT header. */
17144 if (!bfd_link_pic (info))
17145 {
17146 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17147 return FALSE;
17148 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
17149 return FALSE;
17150 }
17151 }
17152 else if (htab->nacl_p)
17153 {
17154 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17155 return FALSE;
17156 }
17157 else if (using_thumb_only (htab))
17158 {
17159 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 0))
17160 return FALSE;
17161 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
17162 return FALSE;
17163 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 16))
17164 return FALSE;
17165 }
17166 else if (!htab->symbian_p)
17167 {
17168 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17169 return FALSE;
17170 #ifndef FOUR_WORD_PLT
17171 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
17172 return FALSE;
17173 #endif
17174 }
17175 }
17176 if (htab->nacl_p && htab->root.iplt && htab->root.iplt->size > 0)
17177 {
17178 /* NaCl uses a special first entry in .iplt too. */
17179 osi.sec = htab->root.iplt;
17180 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
17181 (output_bfd, osi.sec->output_section));
17182 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17183 return FALSE;
17184 }
17185 if ((htab->root.splt && htab->root.splt->size > 0)
17186 || (htab->root.iplt && htab->root.iplt->size > 0))
17187 {
17188 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
17189 for (input_bfd = info->input_bfds;
17190 input_bfd != NULL;
17191 input_bfd = input_bfd->link.next)
17192 {
17193 struct arm_local_iplt_info **local_iplt;
17194 unsigned int i, num_syms;
17195
17196 local_iplt = elf32_arm_local_iplt (input_bfd);
17197 if (local_iplt != NULL)
17198 {
17199 num_syms = elf_symtab_hdr (input_bfd).sh_info;
17200 for (i = 0; i < num_syms; i++)
17201 if (local_iplt[i] != NULL
17202 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
17203 &local_iplt[i]->root,
17204 &local_iplt[i]->arm))
17205 return FALSE;
17206 }
17207 }
17208 }
17209 if (htab->dt_tlsdesc_plt != 0)
17210 {
17211 /* Mapping symbols for the lazy tls trampoline. */
17212 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
17213 return FALSE;
17214
17215 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
17216 htab->dt_tlsdesc_plt + 24))
17217 return FALSE;
17218 }
17219 if (htab->tls_trampoline != 0)
17220 {
17221 /* Mapping symbols for the tls trampoline. */
17222 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
17223 return FALSE;
17224 #ifdef FOUR_WORD_PLT
17225 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
17226 htab->tls_trampoline + 12))
17227 return FALSE;
17228 #endif
17229 }
17230
17231 return TRUE;
17232 }
17233
17234 /* Filter normal symbols of CMSE entry functions of ABFD to include in
17235 the import library. All SYMCOUNT symbols of ABFD can be examined
17236 from their pointers in SYMS. Pointers of symbols to keep should be
17237 stored continuously at the beginning of that array.
17238
17239 Returns the number of symbols to keep. */
17240
17241 static unsigned int
17242 elf32_arm_filter_cmse_symbols (bfd *abfd ATTRIBUTE_UNUSED,
17243 struct bfd_link_info *info,
17244 asymbol **syms, long symcount)
17245 {
17246 size_t maxnamelen;
17247 char *cmse_name;
17248 long src_count, dst_count = 0;
17249 struct elf32_arm_link_hash_table *htab;
17250
17251 htab = elf32_arm_hash_table (info);
17252 if (!htab->stub_bfd || !htab->stub_bfd->sections)
17253 symcount = 0;
17254
17255 maxnamelen = 128;
17256 cmse_name = (char *) bfd_malloc (maxnamelen);
17257 for (src_count = 0; src_count < symcount; src_count++)
17258 {
17259 struct elf32_arm_link_hash_entry *cmse_hash;
17260 asymbol *sym;
17261 flagword flags;
17262 char *name;
17263 size_t namelen;
17264
17265 sym = syms[src_count];
17266 flags = sym->flags;
17267 name = (char *) bfd_asymbol_name (sym);
17268
17269 if ((flags & BSF_FUNCTION) != BSF_FUNCTION)
17270 continue;
17271 if (!(flags & (BSF_GLOBAL | BSF_WEAK)))
17272 continue;
17273
17274 namelen = strlen (name) + sizeof (CMSE_PREFIX) + 1;
17275 if (namelen > maxnamelen)
17276 {
17277 cmse_name = (char *)
17278 bfd_realloc (cmse_name, namelen);
17279 maxnamelen = namelen;
17280 }
17281 snprintf (cmse_name, maxnamelen, "%s%s", CMSE_PREFIX, name);
17282 cmse_hash = (struct elf32_arm_link_hash_entry *)
17283 elf_link_hash_lookup (&(htab)->root, cmse_name, FALSE, FALSE, TRUE);
17284
17285 if (!cmse_hash
17286 || (cmse_hash->root.root.type != bfd_link_hash_defined
17287 && cmse_hash->root.root.type != bfd_link_hash_defweak)
17288 || cmse_hash->root.type != STT_FUNC)
17289 continue;
17290
17291 if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
17292 continue;
17293
17294 syms[dst_count++] = sym;
17295 }
17296 free (cmse_name);
17297
17298 syms[dst_count] = NULL;
17299
17300 return dst_count;
17301 }
17302
17303 /* Filter symbols of ABFD to include in the import library. All
17304 SYMCOUNT symbols of ABFD can be examined from their pointers in
17305 SYMS. Pointers of symbols to keep should be stored continuously at
17306 the beginning of that array.
17307
17308 Returns the number of symbols to keep. */
17309
17310 static unsigned int
17311 elf32_arm_filter_implib_symbols (bfd *abfd ATTRIBUTE_UNUSED,
17312 struct bfd_link_info *info,
17313 asymbol **syms, long symcount)
17314 {
17315 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
17316
17317 if (globals->cmse_implib)
17318 return elf32_arm_filter_cmse_symbols (abfd, info, syms, symcount);
17319 else
17320 return _bfd_elf_filter_global_symbols (abfd, info, syms, symcount);
17321 }
17322
17323 /* Allocate target specific section data. */
17324
17325 static bfd_boolean
17326 elf32_arm_new_section_hook (bfd *abfd, asection *sec)
17327 {
17328 if (!sec->used_by_bfd)
17329 {
17330 _arm_elf_section_data *sdata;
17331 bfd_size_type amt = sizeof (*sdata);
17332
17333 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
17334 if (sdata == NULL)
17335 return FALSE;
17336 sec->used_by_bfd = sdata;
17337 }
17338
17339 return _bfd_elf_new_section_hook (abfd, sec);
17340 }
17341
17342
17343 /* Used to order a list of mapping symbols by address. */
17344
17345 static int
17346 elf32_arm_compare_mapping (const void * a, const void * b)
17347 {
17348 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
17349 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
17350
17351 if (amap->vma > bmap->vma)
17352 return 1;
17353 else if (amap->vma < bmap->vma)
17354 return -1;
17355 else if (amap->type > bmap->type)
17356 /* Ensure results do not depend on the host qsort for objects with
17357 multiple mapping symbols at the same address by sorting on type
17358 after vma. */
17359 return 1;
17360 else if (amap->type < bmap->type)
17361 return -1;
17362 else
17363 return 0;
17364 }
17365
17366 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
17367
17368 static unsigned long
17369 offset_prel31 (unsigned long addr, bfd_vma offset)
17370 {
17371 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
17372 }
17373
17374 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
17375 relocations. */
17376
17377 static void
17378 copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
17379 {
17380 unsigned long first_word = bfd_get_32 (output_bfd, from);
17381 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
17382
17383 /* High bit of first word is supposed to be zero. */
17384 if ((first_word & 0x80000000ul) == 0)
17385 first_word = offset_prel31 (first_word, offset);
17386
17387 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
17388 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
17389 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
17390 second_word = offset_prel31 (second_word, offset);
17391
17392 bfd_put_32 (output_bfd, first_word, to);
17393 bfd_put_32 (output_bfd, second_word, to + 4);
17394 }
17395
17396 /* Data for make_branch_to_a8_stub(). */
17397
17398 struct a8_branch_to_stub_data
17399 {
17400 asection *writing_section;
17401 bfd_byte *contents;
17402 };
17403
17404
17405 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
17406 places for a particular section. */
17407
17408 static bfd_boolean
17409 make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
17410 void *in_arg)
17411 {
17412 struct elf32_arm_stub_hash_entry *stub_entry;
17413 struct a8_branch_to_stub_data *data;
17414 bfd_byte *contents;
17415 unsigned long branch_insn;
17416 bfd_vma veneered_insn_loc, veneer_entry_loc;
17417 bfd_signed_vma branch_offset;
17418 bfd *abfd;
17419 unsigned int loc;
17420
17421 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
17422 data = (struct a8_branch_to_stub_data *) in_arg;
17423
17424 if (stub_entry->target_section != data->writing_section
17425 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
17426 return TRUE;
17427
17428 contents = data->contents;
17429
17430 /* We use target_section as Cortex-A8 erratum workaround stubs are only
17431 generated when both source and target are in the same section. */
17432 veneered_insn_loc = stub_entry->target_section->output_section->vma
17433 + stub_entry->target_section->output_offset
17434 + stub_entry->source_value;
17435
17436 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
17437 + stub_entry->stub_sec->output_offset
17438 + stub_entry->stub_offset;
17439
17440 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
17441 veneered_insn_loc &= ~3u;
17442
17443 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
17444
17445 abfd = stub_entry->target_section->owner;
17446 loc = stub_entry->source_value;
17447
17448 /* We attempt to avoid this condition by setting stubs_always_after_branch
17449 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
17450 This check is just to be on the safe side... */
17451 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
17452 {
17453 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
17454 "allocated in unsafe location"), abfd);
17455 return FALSE;
17456 }
17457
17458 switch (stub_entry->stub_type)
17459 {
17460 case arm_stub_a8_veneer_b:
17461 case arm_stub_a8_veneer_b_cond:
17462 branch_insn = 0xf0009000;
17463 goto jump24;
17464
17465 case arm_stub_a8_veneer_blx:
17466 branch_insn = 0xf000e800;
17467 goto jump24;
17468
17469 case arm_stub_a8_veneer_bl:
17470 {
17471 unsigned int i1, j1, i2, j2, s;
17472
17473 branch_insn = 0xf000d000;
17474
17475 jump24:
17476 if (branch_offset < -16777216 || branch_offset > 16777214)
17477 {
17478 /* There's not much we can do apart from complain if this
17479 happens. */
17480 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
17481 "of range (input file too large)"), abfd);
17482 return FALSE;
17483 }
17484
17485 /* i1 = not(j1 eor s), so:
17486 not i1 = j1 eor s
17487 j1 = (not i1) eor s. */
17488
17489 branch_insn |= (branch_offset >> 1) & 0x7ff;
17490 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
17491 i2 = (branch_offset >> 22) & 1;
17492 i1 = (branch_offset >> 23) & 1;
17493 s = (branch_offset >> 24) & 1;
17494 j1 = (!i1) ^ s;
17495 j2 = (!i2) ^ s;
17496 branch_insn |= j2 << 11;
17497 branch_insn |= j1 << 13;
17498 branch_insn |= s << 26;
17499 }
17500 break;
17501
17502 default:
17503 BFD_FAIL ();
17504 return FALSE;
17505 }
17506
17507 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[loc]);
17508 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[loc + 2]);
17509
17510 return TRUE;
17511 }
17512
17513 /* Beginning of stm32l4xx work-around. */
17514
17515 /* Functions encoding instructions necessary for the emission of the
17516 fix-stm32l4xx-629360.
17517 Encoding is extracted from the
17518 ARM (C) Architecture Reference Manual
17519 ARMv7-A and ARMv7-R edition
17520 ARM DDI 0406C.b (ID072512). */
17521
17522 static inline bfd_vma
17523 create_instruction_branch_absolute (int branch_offset)
17524 {
17525 /* A8.8.18 B (A8-334)
17526 B target_address (Encoding T4). */
17527 /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii. */
17528 /* jump offset is: S:I1:I2:imm10:imm11:0. */
17529 /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S). */
17530
17531 int s = ((branch_offset & 0x1000000) >> 24);
17532 int j1 = s ^ !((branch_offset & 0x800000) >> 23);
17533 int j2 = s ^ !((branch_offset & 0x400000) >> 22);
17534
17535 if (branch_offset < -(1 << 24) || branch_offset >= (1 << 24))
17536 BFD_ASSERT (0 && "Error: branch out of range. Cannot create branch.");
17537
17538 bfd_vma patched_inst = 0xf0009000
17539 | s << 26 /* S. */
17540 | (((unsigned long) (branch_offset) >> 12) & 0x3ff) << 16 /* imm10. */
17541 | j1 << 13 /* J1. */
17542 | j2 << 11 /* J2. */
17543 | (((unsigned long) (branch_offset) >> 1) & 0x7ff); /* imm11. */
17544
17545 return patched_inst;
17546 }
17547
17548 static inline bfd_vma
17549 create_instruction_ldmia (int base_reg, int wback, int reg_mask)
17550 {
17551 /* A8.8.57 LDM/LDMIA/LDMFD (A8-396)
17552 LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2). */
17553 bfd_vma patched_inst = 0xe8900000
17554 | (/*W=*/wback << 21)
17555 | (base_reg << 16)
17556 | (reg_mask & 0x0000ffff);
17557
17558 return patched_inst;
17559 }
17560
17561 static inline bfd_vma
17562 create_instruction_ldmdb (int base_reg, int wback, int reg_mask)
17563 {
17564 /* A8.8.60 LDMDB/LDMEA (A8-402)
17565 LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1). */
17566 bfd_vma patched_inst = 0xe9100000
17567 | (/*W=*/wback << 21)
17568 | (base_reg << 16)
17569 | (reg_mask & 0x0000ffff);
17570
17571 return patched_inst;
17572 }
17573
17574 static inline bfd_vma
17575 create_instruction_mov (int target_reg, int source_reg)
17576 {
17577 /* A8.8.103 MOV (register) (A8-486)
17578 MOV Rd, Rm (Encoding T1). */
17579 bfd_vma patched_inst = 0x4600
17580 | (target_reg & 0x7)
17581 | ((target_reg & 0x8) >> 3) << 7
17582 | (source_reg << 3);
17583
17584 return patched_inst;
17585 }
17586
17587 static inline bfd_vma
17588 create_instruction_sub (int target_reg, int source_reg, int value)
17589 {
17590 /* A8.8.221 SUB (immediate) (A8-708)
17591 SUB Rd, Rn, #value (Encoding T3). */
17592 bfd_vma patched_inst = 0xf1a00000
17593 | (target_reg << 8)
17594 | (source_reg << 16)
17595 | (/*S=*/0 << 20)
17596 | ((value & 0x800) >> 11) << 26
17597 | ((value & 0x700) >> 8) << 12
17598 | (value & 0x0ff);
17599
17600 return patched_inst;
17601 }
17602
17603 static inline bfd_vma
17604 create_instruction_vldmia (int base_reg, int is_dp, int wback, int num_words,
17605 int first_reg)
17606 {
17607 /* A8.8.332 VLDM (A8-922)
17608 VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */
17609 bfd_vma patched_inst = (is_dp ? 0xec900b00 : 0xec900a00)
17610 | (/*W=*/wback << 21)
17611 | (base_reg << 16)
17612 | (num_words & 0x000000ff)
17613 | (((unsigned)first_reg >> 1) & 0x0000000f) << 12
17614 | (first_reg & 0x00000001) << 22;
17615
17616 return patched_inst;
17617 }
17618
17619 static inline bfd_vma
17620 create_instruction_vldmdb (int base_reg, int is_dp, int num_words,
17621 int first_reg)
17622 {
17623 /* A8.8.332 VLDM (A8-922)
17624 VLMD{MODE} Rn!, {} (Encoding T1 or T2). */
17625 bfd_vma patched_inst = (is_dp ? 0xed300b00 : 0xed300a00)
17626 | (base_reg << 16)
17627 | (num_words & 0x000000ff)
17628 | (((unsigned)first_reg >>1 ) & 0x0000000f) << 12
17629 | (first_reg & 0x00000001) << 22;
17630
17631 return patched_inst;
17632 }
17633
17634 static inline bfd_vma
17635 create_instruction_udf_w (int value)
17636 {
17637 /* A8.8.247 UDF (A8-758)
17638 Undefined (Encoding T2). */
17639 bfd_vma patched_inst = 0xf7f0a000
17640 | (value & 0x00000fff)
17641 | (value & 0x000f0000) << 16;
17642
17643 return patched_inst;
17644 }
17645
17646 static inline bfd_vma
17647 create_instruction_udf (int value)
17648 {
17649 /* A8.8.247 UDF (A8-758)
17650 Undefined (Encoding T1). */
17651 bfd_vma patched_inst = 0xde00
17652 | (value & 0xff);
17653
17654 return patched_inst;
17655 }
17656
17657 /* Functions writing an instruction in memory, returning the next
17658 memory position to write to. */
17659
17660 static inline bfd_byte *
17661 push_thumb2_insn32 (struct elf32_arm_link_hash_table * htab,
17662 bfd * output_bfd, bfd_byte *pt, insn32 insn)
17663 {
17664 put_thumb2_insn (htab, output_bfd, insn, pt);
17665 return pt + 4;
17666 }
17667
17668 static inline bfd_byte *
17669 push_thumb2_insn16 (struct elf32_arm_link_hash_table * htab,
17670 bfd * output_bfd, bfd_byte *pt, insn32 insn)
17671 {
17672 put_thumb_insn (htab, output_bfd, insn, pt);
17673 return pt + 2;
17674 }
17675
17676 /* Function filling up a region in memory with T1 and T2 UDFs taking
17677 care of alignment. */
17678
17679 static bfd_byte *
17680 stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table * htab,
17681 bfd * output_bfd,
17682 const bfd_byte * const base_stub_contents,
17683 bfd_byte * const from_stub_contents,
17684 const bfd_byte * const end_stub_contents)
17685 {
17686 bfd_byte *current_stub_contents = from_stub_contents;
17687
17688 /* Fill the remaining of the stub with deterministic contents : UDF
17689 instructions.
17690 Check if realignment is needed on modulo 4 frontier using T1, to
17691 further use T2. */
17692 if ((current_stub_contents < end_stub_contents)
17693 && !((current_stub_contents - base_stub_contents) % 2)
17694 && ((current_stub_contents - base_stub_contents) % 4))
17695 current_stub_contents =
17696 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
17697 create_instruction_udf (0));
17698
17699 for (; current_stub_contents < end_stub_contents;)
17700 current_stub_contents =
17701 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17702 create_instruction_udf_w (0));
17703
17704 return current_stub_contents;
17705 }
17706
17707 /* Functions writing the stream of instructions equivalent to the
17708 derived sequence for ldmia, ldmdb, vldm respectively. */
17709
17710 static void
17711 stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table * htab,
17712 bfd * output_bfd,
17713 const insn32 initial_insn,
17714 const bfd_byte *const initial_insn_addr,
17715 bfd_byte *const base_stub_contents)
17716 {
17717 int wback = (initial_insn & 0x00200000) >> 21;
17718 int ri, rn = (initial_insn & 0x000F0000) >> 16;
17719 int insn_all_registers = initial_insn & 0x0000ffff;
17720 int insn_low_registers, insn_high_registers;
17721 int usable_register_mask;
17722 int nb_registers = popcount (insn_all_registers);
17723 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
17724 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
17725 bfd_byte *current_stub_contents = base_stub_contents;
17726
17727 BFD_ASSERT (is_thumb2_ldmia (initial_insn));
17728
17729 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
17730 smaller than 8 registers load sequences that do not cause the
17731 hardware issue. */
17732 if (nb_registers <= 8)
17733 {
17734 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
17735 current_stub_contents =
17736 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17737 initial_insn);
17738
17739 /* B initial_insn_addr+4. */
17740 if (!restore_pc)
17741 current_stub_contents =
17742 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17743 create_instruction_branch_absolute
17744 (initial_insn_addr - current_stub_contents));
17745
17746
17747 /* Fill the remaining of the stub with deterministic contents. */
17748 current_stub_contents =
17749 stm32l4xx_fill_stub_udf (htab, output_bfd,
17750 base_stub_contents, current_stub_contents,
17751 base_stub_contents +
17752 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
17753
17754 return;
17755 }
17756
17757 /* - reg_list[13] == 0. */
17758 BFD_ASSERT ((insn_all_registers & (1 << 13))==0);
17759
17760 /* - reg_list[14] & reg_list[15] != 1. */
17761 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
17762
17763 /* - if (wback==1) reg_list[rn] == 0. */
17764 BFD_ASSERT (!wback || !restore_rn);
17765
17766 /* - nb_registers > 8. */
17767 BFD_ASSERT (popcount (insn_all_registers) > 8);
17768
17769 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
17770
17771 /* In the following algorithm, we split this wide LDM using 2 LDM insns:
17772 - One with the 7 lowest registers (register mask 0x007F)
17773 This LDM will finally contain between 2 and 7 registers
17774 - One with the 7 highest registers (register mask 0xDF80)
17775 This ldm will finally contain between 2 and 7 registers. */
17776 insn_low_registers = insn_all_registers & 0x007F;
17777 insn_high_registers = insn_all_registers & 0xDF80;
17778
17779 /* A spare register may be needed during this veneer to temporarily
17780 handle the base register. This register will be restored with the
17781 last LDM operation.
17782 The usable register may be any general purpose register (that
17783 excludes PC, SP, LR : register mask is 0x1FFF). */
17784 usable_register_mask = 0x1FFF;
17785
17786 /* Generate the stub function. */
17787 if (wback)
17788 {
17789 /* LDMIA Rn!, {R-low-register-list} : (Encoding T2). */
17790 current_stub_contents =
17791 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17792 create_instruction_ldmia
17793 (rn, /*wback=*/1, insn_low_registers));
17794
17795 /* LDMIA Rn!, {R-high-register-list} : (Encoding T2). */
17796 current_stub_contents =
17797 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17798 create_instruction_ldmia
17799 (rn, /*wback=*/1, insn_high_registers));
17800 if (!restore_pc)
17801 {
17802 /* B initial_insn_addr+4. */
17803 current_stub_contents =
17804 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17805 create_instruction_branch_absolute
17806 (initial_insn_addr - current_stub_contents));
17807 }
17808 }
17809 else /* if (!wback). */
17810 {
17811 ri = rn;
17812
17813 /* If Rn is not part of the high-register-list, move it there. */
17814 if (!(insn_high_registers & (1 << rn)))
17815 {
17816 /* Choose a Ri in the high-register-list that will be restored. */
17817 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
17818
17819 /* MOV Ri, Rn. */
17820 current_stub_contents =
17821 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
17822 create_instruction_mov (ri, rn));
17823 }
17824
17825 /* LDMIA Ri!, {R-low-register-list} : (Encoding T2). */
17826 current_stub_contents =
17827 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17828 create_instruction_ldmia
17829 (ri, /*wback=*/1, insn_low_registers));
17830
17831 /* LDMIA Ri, {R-high-register-list} : (Encoding T2). */
17832 current_stub_contents =
17833 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17834 create_instruction_ldmia
17835 (ri, /*wback=*/0, insn_high_registers));
17836
17837 if (!restore_pc)
17838 {
17839 /* B initial_insn_addr+4. */
17840 current_stub_contents =
17841 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17842 create_instruction_branch_absolute
17843 (initial_insn_addr - current_stub_contents));
17844 }
17845 }
17846
17847 /* Fill the remaining of the stub with deterministic contents. */
17848 current_stub_contents =
17849 stm32l4xx_fill_stub_udf (htab, output_bfd,
17850 base_stub_contents, current_stub_contents,
17851 base_stub_contents +
17852 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
17853 }
17854
17855 static void
17856 stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table * htab,
17857 bfd * output_bfd,
17858 const insn32 initial_insn,
17859 const bfd_byte *const initial_insn_addr,
17860 bfd_byte *const base_stub_contents)
17861 {
17862 int wback = (initial_insn & 0x00200000) >> 21;
17863 int ri, rn = (initial_insn & 0x000f0000) >> 16;
17864 int insn_all_registers = initial_insn & 0x0000ffff;
17865 int insn_low_registers, insn_high_registers;
17866 int usable_register_mask;
17867 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
17868 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
17869 int nb_registers = popcount (insn_all_registers);
17870 bfd_byte *current_stub_contents = base_stub_contents;
17871
17872 BFD_ASSERT (is_thumb2_ldmdb (initial_insn));
17873
17874 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
17875 smaller than 8 registers load sequences that do not cause the
17876 hardware issue. */
17877 if (nb_registers <= 8)
17878 {
17879 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
17880 current_stub_contents =
17881 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17882 initial_insn);
17883
17884 /* B initial_insn_addr+4. */
17885 current_stub_contents =
17886 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17887 create_instruction_branch_absolute
17888 (initial_insn_addr - current_stub_contents));
17889
17890 /* Fill the remaining of the stub with deterministic contents. */
17891 current_stub_contents =
17892 stm32l4xx_fill_stub_udf (htab, output_bfd,
17893 base_stub_contents, current_stub_contents,
17894 base_stub_contents +
17895 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
17896
17897 return;
17898 }
17899
17900 /* - reg_list[13] == 0. */
17901 BFD_ASSERT ((insn_all_registers & (1 << 13)) == 0);
17902
17903 /* - reg_list[14] & reg_list[15] != 1. */
17904 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
17905
17906 /* - if (wback==1) reg_list[rn] == 0. */
17907 BFD_ASSERT (!wback || !restore_rn);
17908
17909 /* - nb_registers > 8. */
17910 BFD_ASSERT (popcount (insn_all_registers) > 8);
17911
17912 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
17913
17914 /* In the following algorithm, we split this wide LDM using 2 LDM insn:
17915 - One with the 7 lowest registers (register mask 0x007F)
17916 This LDM will finally contain between 2 and 7 registers
17917 - One with the 7 highest registers (register mask 0xDF80)
17918 This ldm will finally contain between 2 and 7 registers. */
17919 insn_low_registers = insn_all_registers & 0x007F;
17920 insn_high_registers = insn_all_registers & 0xDF80;
17921
17922 /* A spare register may be needed during this veneer to temporarily
17923 handle the base register. This register will be restored with
17924 the last LDM operation.
17925 The usable register may be any general purpose register (that excludes
17926 PC, SP, LR : register mask is 0x1FFF). */
17927 usable_register_mask = 0x1FFF;
17928
17929 /* Generate the stub function. */
17930 if (!wback && !restore_pc && !restore_rn)
17931 {
17932 /* Choose a Ri in the low-register-list that will be restored. */
17933 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
17934
17935 /* MOV Ri, Rn. */
17936 current_stub_contents =
17937 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
17938 create_instruction_mov (ri, rn));
17939
17940 /* LDMDB Ri!, {R-high-register-list}. */
17941 current_stub_contents =
17942 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17943 create_instruction_ldmdb
17944 (ri, /*wback=*/1, insn_high_registers));
17945
17946 /* LDMDB Ri, {R-low-register-list}. */
17947 current_stub_contents =
17948 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17949 create_instruction_ldmdb
17950 (ri, /*wback=*/0, insn_low_registers));
17951
17952 /* B initial_insn_addr+4. */
17953 current_stub_contents =
17954 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17955 create_instruction_branch_absolute
17956 (initial_insn_addr - current_stub_contents));
17957 }
17958 else if (wback && !restore_pc && !restore_rn)
17959 {
17960 /* LDMDB Rn!, {R-high-register-list}. */
17961 current_stub_contents =
17962 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17963 create_instruction_ldmdb
17964 (rn, /*wback=*/1, insn_high_registers));
17965
17966 /* LDMDB Rn!, {R-low-register-list}. */
17967 current_stub_contents =
17968 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17969 create_instruction_ldmdb
17970 (rn, /*wback=*/1, insn_low_registers));
17971
17972 /* B initial_insn_addr+4. */
17973 current_stub_contents =
17974 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17975 create_instruction_branch_absolute
17976 (initial_insn_addr - current_stub_contents));
17977 }
17978 else if (!wback && restore_pc && !restore_rn)
17979 {
17980 /* Choose a Ri in the high-register-list that will be restored. */
17981 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
17982
17983 /* SUB Ri, Rn, #(4*nb_registers). */
17984 current_stub_contents =
17985 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17986 create_instruction_sub (ri, rn, (4 * nb_registers)));
17987
17988 /* LDMIA Ri!, {R-low-register-list}. */
17989 current_stub_contents =
17990 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17991 create_instruction_ldmia
17992 (ri, /*wback=*/1, insn_low_registers));
17993
17994 /* LDMIA Ri, {R-high-register-list}. */
17995 current_stub_contents =
17996 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17997 create_instruction_ldmia
17998 (ri, /*wback=*/0, insn_high_registers));
17999 }
18000 else if (wback && restore_pc && !restore_rn)
18001 {
18002 /* Choose a Ri in the high-register-list that will be restored. */
18003 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18004
18005 /* SUB Rn, Rn, #(4*nb_registers) */
18006 current_stub_contents =
18007 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18008 create_instruction_sub (rn, rn, (4 * nb_registers)));
18009
18010 /* MOV Ri, Rn. */
18011 current_stub_contents =
18012 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18013 create_instruction_mov (ri, rn));
18014
18015 /* LDMIA Ri!, {R-low-register-list}. */
18016 current_stub_contents =
18017 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18018 create_instruction_ldmia
18019 (ri, /*wback=*/1, insn_low_registers));
18020
18021 /* LDMIA Ri, {R-high-register-list}. */
18022 current_stub_contents =
18023 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18024 create_instruction_ldmia
18025 (ri, /*wback=*/0, insn_high_registers));
18026 }
18027 else if (!wback && !restore_pc && restore_rn)
18028 {
18029 ri = rn;
18030 if (!(insn_low_registers & (1 << rn)))
18031 {
18032 /* Choose a Ri in the low-register-list that will be restored. */
18033 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
18034
18035 /* MOV Ri, Rn. */
18036 current_stub_contents =
18037 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18038 create_instruction_mov (ri, rn));
18039 }
18040
18041 /* LDMDB Ri!, {R-high-register-list}. */
18042 current_stub_contents =
18043 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18044 create_instruction_ldmdb
18045 (ri, /*wback=*/1, insn_high_registers));
18046
18047 /* LDMDB Ri, {R-low-register-list}. */
18048 current_stub_contents =
18049 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18050 create_instruction_ldmdb
18051 (ri, /*wback=*/0, insn_low_registers));
18052
18053 /* B initial_insn_addr+4. */
18054 current_stub_contents =
18055 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18056 create_instruction_branch_absolute
18057 (initial_insn_addr - current_stub_contents));
18058 }
18059 else if (!wback && restore_pc && restore_rn)
18060 {
18061 ri = rn;
18062 if (!(insn_high_registers & (1 << rn)))
18063 {
18064 /* Choose a Ri in the high-register-list that will be restored. */
18065 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18066 }
18067
18068 /* SUB Ri, Rn, #(4*nb_registers). */
18069 current_stub_contents =
18070 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18071 create_instruction_sub (ri, rn, (4 * nb_registers)));
18072
18073 /* LDMIA Ri!, {R-low-register-list}. */
18074 current_stub_contents =
18075 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18076 create_instruction_ldmia
18077 (ri, /*wback=*/1, insn_low_registers));
18078
18079 /* LDMIA Ri, {R-high-register-list}. */
18080 current_stub_contents =
18081 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18082 create_instruction_ldmia
18083 (ri, /*wback=*/0, insn_high_registers));
18084 }
18085 else if (wback && restore_rn)
18086 {
18087 /* The assembler should not have accepted to encode this. */
18088 BFD_ASSERT (0 && "Cannot patch an instruction that has an "
18089 "undefined behavior.\n");
18090 }
18091
18092 /* Fill the remaining of the stub with deterministic contents. */
18093 current_stub_contents =
18094 stm32l4xx_fill_stub_udf (htab, output_bfd,
18095 base_stub_contents, current_stub_contents,
18096 base_stub_contents +
18097 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18098
18099 }
18100
18101 static void
18102 stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table * htab,
18103 bfd * output_bfd,
18104 const insn32 initial_insn,
18105 const bfd_byte *const initial_insn_addr,
18106 bfd_byte *const base_stub_contents)
18107 {
18108 int num_words = ((unsigned int) initial_insn << 24) >> 24;
18109 bfd_byte *current_stub_contents = base_stub_contents;
18110
18111 BFD_ASSERT (is_thumb2_vldm (initial_insn));
18112
18113 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18114 smaller than 8 words load sequences that do not cause the
18115 hardware issue. */
18116 if (num_words <= 8)
18117 {
18118 /* Untouched instruction. */
18119 current_stub_contents =
18120 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18121 initial_insn);
18122
18123 /* B initial_insn_addr+4. */
18124 current_stub_contents =
18125 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18126 create_instruction_branch_absolute
18127 (initial_insn_addr - current_stub_contents));
18128 }
18129 else
18130 {
18131 bfd_boolean is_dp = /* DP encoding. */
18132 (initial_insn & 0xfe100f00) == 0xec100b00;
18133 bfd_boolean is_ia_nobang = /* (IA without !). */
18134 (((initial_insn << 7) >> 28) & 0xd) == 0x4;
18135 bfd_boolean is_ia_bang = /* (IA with !) - includes VPOP. */
18136 (((initial_insn << 7) >> 28) & 0xd) == 0x5;
18137 bfd_boolean is_db_bang = /* (DB with !). */
18138 (((initial_insn << 7) >> 28) & 0xd) == 0x9;
18139 int base_reg = ((unsigned int) initial_insn << 12) >> 28;
18140 /* d = UInt (Vd:D);. */
18141 int first_reg = ((((unsigned int) initial_insn << 16) >> 28) << 1)
18142 | (((unsigned int)initial_insn << 9) >> 31);
18143
18144 /* Compute the number of 8-words chunks needed to split. */
18145 int chunks = (num_words % 8) ? (num_words / 8 + 1) : (num_words / 8);
18146 int chunk;
18147
18148 /* The test coverage has been done assuming the following
18149 hypothesis that exactly one of the previous is_ predicates is
18150 true. */
18151 BFD_ASSERT ( (is_ia_nobang ^ is_ia_bang ^ is_db_bang)
18152 && !(is_ia_nobang & is_ia_bang & is_db_bang));
18153
18154 /* We treat the cutting of the words in one pass for all
18155 cases, then we emit the adjustments:
18156
18157 vldm rx, {...}
18158 -> vldm rx!, {8_words_or_less} for each needed 8_word
18159 -> sub rx, rx, #size (list)
18160
18161 vldm rx!, {...}
18162 -> vldm rx!, {8_words_or_less} for each needed 8_word
18163 This also handles vpop instruction (when rx is sp)
18164
18165 vldmd rx!, {...}
18166 -> vldmb rx!, {8_words_or_less} for each needed 8_word. */
18167 for (chunk = 0; chunk < chunks; ++chunk)
18168 {
18169 bfd_vma new_insn = 0;
18170
18171 if (is_ia_nobang || is_ia_bang)
18172 {
18173 new_insn = create_instruction_vldmia
18174 (base_reg,
18175 is_dp,
18176 /*wback= . */1,
18177 chunks - (chunk + 1) ?
18178 8 : num_words - chunk * 8,
18179 first_reg + chunk * 8);
18180 }
18181 else if (is_db_bang)
18182 {
18183 new_insn = create_instruction_vldmdb
18184 (base_reg,
18185 is_dp,
18186 chunks - (chunk + 1) ?
18187 8 : num_words - chunk * 8,
18188 first_reg + chunk * 8);
18189 }
18190
18191 if (new_insn)
18192 current_stub_contents =
18193 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18194 new_insn);
18195 }
18196
18197 /* Only this case requires the base register compensation
18198 subtract. */
18199 if (is_ia_nobang)
18200 {
18201 current_stub_contents =
18202 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18203 create_instruction_sub
18204 (base_reg, base_reg, 4*num_words));
18205 }
18206
18207 /* B initial_insn_addr+4. */
18208 current_stub_contents =
18209 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18210 create_instruction_branch_absolute
18211 (initial_insn_addr - current_stub_contents));
18212 }
18213
18214 /* Fill the remaining of the stub with deterministic contents. */
18215 current_stub_contents =
18216 stm32l4xx_fill_stub_udf (htab, output_bfd,
18217 base_stub_contents, current_stub_contents,
18218 base_stub_contents +
18219 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
18220 }
18221
18222 static void
18223 stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table * htab,
18224 bfd * output_bfd,
18225 const insn32 wrong_insn,
18226 const bfd_byte *const wrong_insn_addr,
18227 bfd_byte *const stub_contents)
18228 {
18229 if (is_thumb2_ldmia (wrong_insn))
18230 stm32l4xx_create_replacing_stub_ldmia (htab, output_bfd,
18231 wrong_insn, wrong_insn_addr,
18232 stub_contents);
18233 else if (is_thumb2_ldmdb (wrong_insn))
18234 stm32l4xx_create_replacing_stub_ldmdb (htab, output_bfd,
18235 wrong_insn, wrong_insn_addr,
18236 stub_contents);
18237 else if (is_thumb2_vldm (wrong_insn))
18238 stm32l4xx_create_replacing_stub_vldm (htab, output_bfd,
18239 wrong_insn, wrong_insn_addr,
18240 stub_contents);
18241 }
18242
18243 /* End of stm32l4xx work-around. */
18244
18245
18246 /* Do code byteswapping. Return FALSE afterwards so that the section is
18247 written out as normal. */
18248
18249 static bfd_boolean
18250 elf32_arm_write_section (bfd *output_bfd,
18251 struct bfd_link_info *link_info,
18252 asection *sec,
18253 bfd_byte *contents)
18254 {
18255 unsigned int mapcount, errcount;
18256 _arm_elf_section_data *arm_data;
18257 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
18258 elf32_arm_section_map *map;
18259 elf32_vfp11_erratum_list *errnode;
18260 elf32_stm32l4xx_erratum_list *stm32l4xx_errnode;
18261 bfd_vma ptr;
18262 bfd_vma end;
18263 bfd_vma offset = sec->output_section->vma + sec->output_offset;
18264 bfd_byte tmp;
18265 unsigned int i;
18266
18267 if (globals == NULL)
18268 return FALSE;
18269
18270 /* If this section has not been allocated an _arm_elf_section_data
18271 structure then we cannot record anything. */
18272 arm_data = get_arm_elf_section_data (sec);
18273 if (arm_data == NULL)
18274 return FALSE;
18275
18276 mapcount = arm_data->mapcount;
18277 map = arm_data->map;
18278 errcount = arm_data->erratumcount;
18279
18280 if (errcount != 0)
18281 {
18282 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
18283
18284 for (errnode = arm_data->erratumlist; errnode != 0;
18285 errnode = errnode->next)
18286 {
18287 bfd_vma target = errnode->vma - offset;
18288
18289 switch (errnode->type)
18290 {
18291 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
18292 {
18293 bfd_vma branch_to_veneer;
18294 /* Original condition code of instruction, plus bit mask for
18295 ARM B instruction. */
18296 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
18297 | 0x0a000000;
18298
18299 /* The instruction is before the label. */
18300 target -= 4;
18301
18302 /* Above offset included in -4 below. */
18303 branch_to_veneer = errnode->u.b.veneer->vma
18304 - errnode->vma - 4;
18305
18306 if ((signed) branch_to_veneer < -(1 << 25)
18307 || (signed) branch_to_veneer >= (1 << 25))
18308 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
18309 "range"), output_bfd);
18310
18311 insn |= (branch_to_veneer >> 2) & 0xffffff;
18312 contents[endianflip ^ target] = insn & 0xff;
18313 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
18314 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
18315 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
18316 }
18317 break;
18318
18319 case VFP11_ERRATUM_ARM_VENEER:
18320 {
18321 bfd_vma branch_from_veneer;
18322 unsigned int insn;
18323
18324 /* Take size of veneer into account. */
18325 branch_from_veneer = errnode->u.v.branch->vma
18326 - errnode->vma - 12;
18327
18328 if ((signed) branch_from_veneer < -(1 << 25)
18329 || (signed) branch_from_veneer >= (1 << 25))
18330 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
18331 "range"), output_bfd);
18332
18333 /* Original instruction. */
18334 insn = errnode->u.v.branch->u.b.vfp_insn;
18335 contents[endianflip ^ target] = insn & 0xff;
18336 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
18337 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
18338 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
18339
18340 /* Branch back to insn after original insn. */
18341 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
18342 contents[endianflip ^ (target + 4)] = insn & 0xff;
18343 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
18344 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
18345 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
18346 }
18347 break;
18348
18349 default:
18350 abort ();
18351 }
18352 }
18353 }
18354
18355 if (arm_data->stm32l4xx_erratumcount != 0)
18356 {
18357 for (stm32l4xx_errnode = arm_data->stm32l4xx_erratumlist;
18358 stm32l4xx_errnode != 0;
18359 stm32l4xx_errnode = stm32l4xx_errnode->next)
18360 {
18361 bfd_vma target = stm32l4xx_errnode->vma - offset;
18362
18363 switch (stm32l4xx_errnode->type)
18364 {
18365 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
18366 {
18367 unsigned int insn;
18368 bfd_vma branch_to_veneer =
18369 stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma;
18370
18371 if ((signed) branch_to_veneer < -(1 << 24)
18372 || (signed) branch_to_veneer >= (1 << 24))
18373 {
18374 bfd_vma out_of_range =
18375 ((signed) branch_to_veneer < -(1 << 24)) ?
18376 - branch_to_veneer - (1 << 24) :
18377 ((signed) branch_to_veneer >= (1 << 24)) ?
18378 branch_to_veneer - (1 << 24) : 0;
18379
18380 (*_bfd_error_handler)
18381 (_("%B(%#x): error: Cannot create STM32L4XX veneer. "
18382 "Jump out of range by %ld bytes. "
18383 "Cannot encode branch instruction. "),
18384 output_bfd,
18385 (long) (stm32l4xx_errnode->vma - 4),
18386 out_of_range);
18387 continue;
18388 }
18389
18390 insn = create_instruction_branch_absolute
18391 (stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma);
18392
18393 /* The instruction is before the label. */
18394 target -= 4;
18395
18396 put_thumb2_insn (globals, output_bfd,
18397 (bfd_vma) insn, contents + target);
18398 }
18399 break;
18400
18401 case STM32L4XX_ERRATUM_VENEER:
18402 {
18403 bfd_byte * veneer;
18404 bfd_byte * veneer_r;
18405 unsigned int insn;
18406
18407 veneer = contents + target;
18408 veneer_r = veneer
18409 + stm32l4xx_errnode->u.b.veneer->vma
18410 - stm32l4xx_errnode->vma - 4;
18411
18412 if ((signed) (veneer_r - veneer -
18413 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE >
18414 STM32L4XX_ERRATUM_LDM_VENEER_SIZE ?
18415 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE :
18416 STM32L4XX_ERRATUM_LDM_VENEER_SIZE) < -(1 << 24)
18417 || (signed) (veneer_r - veneer) >= (1 << 24))
18418 {
18419 (*_bfd_error_handler) (_("%B: error: Cannot create STM32L4XX "
18420 "veneer."), output_bfd);
18421 continue;
18422 }
18423
18424 /* Original instruction. */
18425 insn = stm32l4xx_errnode->u.v.branch->u.b.insn;
18426
18427 stm32l4xx_create_replacing_stub
18428 (globals, output_bfd, insn, (void*)veneer_r, (void*)veneer);
18429 }
18430 break;
18431
18432 default:
18433 abort ();
18434 }
18435 }
18436 }
18437
18438 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
18439 {
18440 arm_unwind_table_edit *edit_node
18441 = arm_data->u.exidx.unwind_edit_list;
18442 /* Now, sec->size is the size of the section we will write. The original
18443 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
18444 markers) was sec->rawsize. (This isn't the case if we perform no
18445 edits, then rawsize will be zero and we should use size). */
18446 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
18447 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
18448 unsigned int in_index, out_index;
18449 bfd_vma add_to_offsets = 0;
18450
18451 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
18452 {
18453 if (edit_node)
18454 {
18455 unsigned int edit_index = edit_node->index;
18456
18457 if (in_index < edit_index && in_index * 8 < input_size)
18458 {
18459 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
18460 contents + in_index * 8, add_to_offsets);
18461 out_index++;
18462 in_index++;
18463 }
18464 else if (in_index == edit_index
18465 || (in_index * 8 >= input_size
18466 && edit_index == UINT_MAX))
18467 {
18468 switch (edit_node->type)
18469 {
18470 case DELETE_EXIDX_ENTRY:
18471 in_index++;
18472 add_to_offsets += 8;
18473 break;
18474
18475 case INSERT_EXIDX_CANTUNWIND_AT_END:
18476 {
18477 asection *text_sec = edit_node->linked_section;
18478 bfd_vma text_offset = text_sec->output_section->vma
18479 + text_sec->output_offset
18480 + text_sec->size;
18481 bfd_vma exidx_offset = offset + out_index * 8;
18482 unsigned long prel31_offset;
18483
18484 /* Note: this is meant to be equivalent to an
18485 R_ARM_PREL31 relocation. These synthetic
18486 EXIDX_CANTUNWIND markers are not relocated by the
18487 usual BFD method. */
18488 prel31_offset = (text_offset - exidx_offset)
18489 & 0x7ffffffful;
18490 if (bfd_link_relocatable (link_info))
18491 {
18492 /* Here relocation for new EXIDX_CANTUNWIND is
18493 created, so there is no need to
18494 adjust offset by hand. */
18495 prel31_offset = text_sec->output_offset
18496 + text_sec->size;
18497 }
18498
18499 /* First address we can't unwind. */
18500 bfd_put_32 (output_bfd, prel31_offset,
18501 &edited_contents[out_index * 8]);
18502
18503 /* Code for EXIDX_CANTUNWIND. */
18504 bfd_put_32 (output_bfd, 0x1,
18505 &edited_contents[out_index * 8 + 4]);
18506
18507 out_index++;
18508 add_to_offsets -= 8;
18509 }
18510 break;
18511 }
18512
18513 edit_node = edit_node->next;
18514 }
18515 }
18516 else
18517 {
18518 /* No more edits, copy remaining entries verbatim. */
18519 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
18520 contents + in_index * 8, add_to_offsets);
18521 out_index++;
18522 in_index++;
18523 }
18524 }
18525
18526 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
18527 bfd_set_section_contents (output_bfd, sec->output_section,
18528 edited_contents,
18529 (file_ptr) sec->output_offset, sec->size);
18530
18531 return TRUE;
18532 }
18533
18534 /* Fix code to point to Cortex-A8 erratum stubs. */
18535 if (globals->fix_cortex_a8)
18536 {
18537 struct a8_branch_to_stub_data data;
18538
18539 data.writing_section = sec;
18540 data.contents = contents;
18541
18542 bfd_hash_traverse (& globals->stub_hash_table, make_branch_to_a8_stub,
18543 & data);
18544 }
18545
18546 if (mapcount == 0)
18547 return FALSE;
18548
18549 if (globals->byteswap_code)
18550 {
18551 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
18552
18553 ptr = map[0].vma;
18554 for (i = 0; i < mapcount; i++)
18555 {
18556 if (i == mapcount - 1)
18557 end = sec->size;
18558 else
18559 end = map[i + 1].vma;
18560
18561 switch (map[i].type)
18562 {
18563 case 'a':
18564 /* Byte swap code words. */
18565 while (ptr + 3 < end)
18566 {
18567 tmp = contents[ptr];
18568 contents[ptr] = contents[ptr + 3];
18569 contents[ptr + 3] = tmp;
18570 tmp = contents[ptr + 1];
18571 contents[ptr + 1] = contents[ptr + 2];
18572 contents[ptr + 2] = tmp;
18573 ptr += 4;
18574 }
18575 break;
18576
18577 case 't':
18578 /* Byte swap code halfwords. */
18579 while (ptr + 1 < end)
18580 {
18581 tmp = contents[ptr];
18582 contents[ptr] = contents[ptr + 1];
18583 contents[ptr + 1] = tmp;
18584 ptr += 2;
18585 }
18586 break;
18587
18588 case 'd':
18589 /* Leave data alone. */
18590 break;
18591 }
18592 ptr = end;
18593 }
18594 }
18595
18596 free (map);
18597 arm_data->mapcount = -1;
18598 arm_data->mapsize = 0;
18599 arm_data->map = NULL;
18600
18601 return FALSE;
18602 }
18603
18604 /* Mangle thumb function symbols as we read them in. */
18605
18606 static bfd_boolean
18607 elf32_arm_swap_symbol_in (bfd * abfd,
18608 const void *psrc,
18609 const void *pshn,
18610 Elf_Internal_Sym *dst)
18611 {
18612 Elf_Internal_Shdr *symtab_hdr;
18613 const char *name = NULL;
18614
18615 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
18616 return FALSE;
18617 dst->st_target_internal = 0;
18618
18619 /* New EABI objects mark thumb function symbols by setting the low bit of
18620 the address. */
18621 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
18622 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
18623 {
18624 if (dst->st_value & 1)
18625 {
18626 dst->st_value &= ~(bfd_vma) 1;
18627 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal,
18628 ST_BRANCH_TO_THUMB);
18629 }
18630 else
18631 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_ARM);
18632 }
18633 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
18634 {
18635 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
18636 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_THUMB);
18637 }
18638 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
18639 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_LONG);
18640 else
18641 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_UNKNOWN);
18642
18643 /* Mark CMSE special symbols. */
18644 symtab_hdr = & elf_symtab_hdr (abfd);
18645 if (symtab_hdr->sh_size)
18646 name = bfd_elf_sym_name (abfd, symtab_hdr, dst, NULL);
18647 if (name && CONST_STRNEQ (name, CMSE_PREFIX))
18648 ARM_SET_SYM_CMSE_SPCL (dst->st_target_internal);
18649
18650 return TRUE;
18651 }
18652
18653
18654 /* Mangle thumb function symbols as we write them out. */
18655
18656 static void
18657 elf32_arm_swap_symbol_out (bfd *abfd,
18658 const Elf_Internal_Sym *src,
18659 void *cdst,
18660 void *shndx)
18661 {
18662 Elf_Internal_Sym newsym;
18663
18664 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
18665 of the address set, as per the new EABI. We do this unconditionally
18666 because objcopy does not set the elf header flags until after
18667 it writes out the symbol table. */
18668 if (ARM_GET_SYM_BRANCH_TYPE (src->st_target_internal) == ST_BRANCH_TO_THUMB)
18669 {
18670 newsym = *src;
18671 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
18672 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
18673 if (newsym.st_shndx != SHN_UNDEF)
18674 {
18675 /* Do this only for defined symbols. At link type, the static
18676 linker will simulate the work of dynamic linker of resolving
18677 symbols and will carry over the thumbness of found symbols to
18678 the output symbol table. It's not clear how it happens, but
18679 the thumbness of undefined symbols can well be different at
18680 runtime, and writing '1' for them will be confusing for users
18681 and possibly for dynamic linker itself.
18682 */
18683 newsym.st_value |= 1;
18684 }
18685
18686 src = &newsym;
18687 }
18688 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
18689 }
18690
18691 /* Add the PT_ARM_EXIDX program header. */
18692
18693 static bfd_boolean
18694 elf32_arm_modify_segment_map (bfd *abfd,
18695 struct bfd_link_info *info ATTRIBUTE_UNUSED)
18696 {
18697 struct elf_segment_map *m;
18698 asection *sec;
18699
18700 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
18701 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
18702 {
18703 /* If there is already a PT_ARM_EXIDX header, then we do not
18704 want to add another one. This situation arises when running
18705 "strip"; the input binary already has the header. */
18706 m = elf_seg_map (abfd);
18707 while (m && m->p_type != PT_ARM_EXIDX)
18708 m = m->next;
18709 if (!m)
18710 {
18711 m = (struct elf_segment_map *)
18712 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
18713 if (m == NULL)
18714 return FALSE;
18715 m->p_type = PT_ARM_EXIDX;
18716 m->count = 1;
18717 m->sections[0] = sec;
18718
18719 m->next = elf_seg_map (abfd);
18720 elf_seg_map (abfd) = m;
18721 }
18722 }
18723
18724 return TRUE;
18725 }
18726
18727 /* We may add a PT_ARM_EXIDX program header. */
18728
18729 static int
18730 elf32_arm_additional_program_headers (bfd *abfd,
18731 struct bfd_link_info *info ATTRIBUTE_UNUSED)
18732 {
18733 asection *sec;
18734
18735 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
18736 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
18737 return 1;
18738 else
18739 return 0;
18740 }
18741
18742 /* Hook called by the linker routine which adds symbols from an object
18743 file. */
18744
18745 static bfd_boolean
18746 elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
18747 Elf_Internal_Sym *sym, const char **namep,
18748 flagword *flagsp, asection **secp, bfd_vma *valp)
18749 {
18750 if (ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
18751 && (abfd->flags & DYNAMIC) == 0
18752 && bfd_get_flavour (info->output_bfd) == bfd_target_elf_flavour)
18753 elf_tdata (info->output_bfd)->has_gnu_symbols |= elf_gnu_symbol_ifunc;
18754
18755 if (elf32_arm_hash_table (info) == NULL)
18756 return FALSE;
18757
18758 if (elf32_arm_hash_table (info)->vxworks_p
18759 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
18760 flagsp, secp, valp))
18761 return FALSE;
18762
18763 return TRUE;
18764 }
18765
18766 /* We use this to override swap_symbol_in and swap_symbol_out. */
18767 const struct elf_size_info elf32_arm_size_info =
18768 {
18769 sizeof (Elf32_External_Ehdr),
18770 sizeof (Elf32_External_Phdr),
18771 sizeof (Elf32_External_Shdr),
18772 sizeof (Elf32_External_Rel),
18773 sizeof (Elf32_External_Rela),
18774 sizeof (Elf32_External_Sym),
18775 sizeof (Elf32_External_Dyn),
18776 sizeof (Elf_External_Note),
18777 4,
18778 1,
18779 32, 2,
18780 ELFCLASS32, EV_CURRENT,
18781 bfd_elf32_write_out_phdrs,
18782 bfd_elf32_write_shdrs_and_ehdr,
18783 bfd_elf32_checksum_contents,
18784 bfd_elf32_write_relocs,
18785 elf32_arm_swap_symbol_in,
18786 elf32_arm_swap_symbol_out,
18787 bfd_elf32_slurp_reloc_table,
18788 bfd_elf32_slurp_symbol_table,
18789 bfd_elf32_swap_dyn_in,
18790 bfd_elf32_swap_dyn_out,
18791 bfd_elf32_swap_reloc_in,
18792 bfd_elf32_swap_reloc_out,
18793 bfd_elf32_swap_reloca_in,
18794 bfd_elf32_swap_reloca_out
18795 };
18796
18797 static bfd_vma
18798 read_code32 (const bfd *abfd, const bfd_byte *addr)
18799 {
18800 /* V7 BE8 code is always little endian. */
18801 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
18802 return bfd_getl32 (addr);
18803
18804 return bfd_get_32 (abfd, addr);
18805 }
18806
18807 static bfd_vma
18808 read_code16 (const bfd *abfd, const bfd_byte *addr)
18809 {
18810 /* V7 BE8 code is always little endian. */
18811 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
18812 return bfd_getl16 (addr);
18813
18814 return bfd_get_16 (abfd, addr);
18815 }
18816
18817 /* Return size of plt0 entry starting at ADDR
18818 or (bfd_vma) -1 if size can not be determined. */
18819
18820 static bfd_vma
18821 elf32_arm_plt0_size (const bfd *abfd, const bfd_byte *addr)
18822 {
18823 bfd_vma first_word;
18824 bfd_vma plt0_size;
18825
18826 first_word = read_code32 (abfd, addr);
18827
18828 if (first_word == elf32_arm_plt0_entry[0])
18829 plt0_size = 4 * ARRAY_SIZE (elf32_arm_plt0_entry);
18830 else if (first_word == elf32_thumb2_plt0_entry[0])
18831 plt0_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
18832 else
18833 /* We don't yet handle this PLT format. */
18834 return (bfd_vma) -1;
18835
18836 return plt0_size;
18837 }
18838
18839 /* Return size of plt entry starting at offset OFFSET
18840 of plt section located at address START
18841 or (bfd_vma) -1 if size can not be determined. */
18842
18843 static bfd_vma
18844 elf32_arm_plt_size (const bfd *abfd, const bfd_byte *start, bfd_vma offset)
18845 {
18846 bfd_vma first_insn;
18847 bfd_vma plt_size = 0;
18848 const bfd_byte *addr = start + offset;
18849
18850 /* PLT entry size if fixed on Thumb-only platforms. */
18851 if (read_code32 (abfd, start) == elf32_thumb2_plt0_entry[0])
18852 return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
18853
18854 /* Respect Thumb stub if necessary. */
18855 if (read_code16 (abfd, addr) == elf32_arm_plt_thumb_stub[0])
18856 {
18857 plt_size += 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub);
18858 }
18859
18860 /* Strip immediate from first add. */
18861 first_insn = read_code32 (abfd, addr + plt_size) & 0xffffff00;
18862
18863 #ifdef FOUR_WORD_PLT
18864 if (first_insn == elf32_arm_plt_entry[0])
18865 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry);
18866 #else
18867 if (first_insn == elf32_arm_plt_entry_long[0])
18868 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_long);
18869 else if (first_insn == elf32_arm_plt_entry_short[0])
18870 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_short);
18871 #endif
18872 else
18873 /* We don't yet handle this PLT format. */
18874 return (bfd_vma) -1;
18875
18876 return plt_size;
18877 }
18878
18879 /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */
18880
18881 static long
18882 elf32_arm_get_synthetic_symtab (bfd *abfd,
18883 long symcount ATTRIBUTE_UNUSED,
18884 asymbol **syms ATTRIBUTE_UNUSED,
18885 long dynsymcount,
18886 asymbol **dynsyms,
18887 asymbol **ret)
18888 {
18889 asection *relplt;
18890 asymbol *s;
18891 arelent *p;
18892 long count, i, n;
18893 size_t size;
18894 Elf_Internal_Shdr *hdr;
18895 char *names;
18896 asection *plt;
18897 bfd_vma offset;
18898 bfd_byte *data;
18899
18900 *ret = NULL;
18901
18902 if ((abfd->flags & (DYNAMIC | EXEC_P)) == 0)
18903 return 0;
18904
18905 if (dynsymcount <= 0)
18906 return 0;
18907
18908 relplt = bfd_get_section_by_name (abfd, ".rel.plt");
18909 if (relplt == NULL)
18910 return 0;
18911
18912 hdr = &elf_section_data (relplt)->this_hdr;
18913 if (hdr->sh_link != elf_dynsymtab (abfd)
18914 || (hdr->sh_type != SHT_REL && hdr->sh_type != SHT_RELA))
18915 return 0;
18916
18917 plt = bfd_get_section_by_name (abfd, ".plt");
18918 if (plt == NULL)
18919 return 0;
18920
18921 if (!elf32_arm_size_info.slurp_reloc_table (abfd, relplt, dynsyms, TRUE))
18922 return -1;
18923
18924 data = plt->contents;
18925 if (data == NULL)
18926 {
18927 if (!bfd_get_full_section_contents(abfd, (asection *) plt, &data) || data == NULL)
18928 return -1;
18929 bfd_cache_section_contents((asection *) plt, data);
18930 }
18931
18932 count = relplt->size / hdr->sh_entsize;
18933 size = count * sizeof (asymbol);
18934 p = relplt->relocation;
18935 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
18936 {
18937 size += strlen ((*p->sym_ptr_ptr)->name) + sizeof ("@plt");
18938 if (p->addend != 0)
18939 size += sizeof ("+0x") - 1 + 8;
18940 }
18941
18942 s = *ret = (asymbol *) bfd_malloc (size);
18943 if (s == NULL)
18944 return -1;
18945
18946 offset = elf32_arm_plt0_size (abfd, data);
18947 if (offset == (bfd_vma) -1)
18948 return -1;
18949
18950 names = (char *) (s + count);
18951 p = relplt->relocation;
18952 n = 0;
18953 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
18954 {
18955 size_t len;
18956
18957 bfd_vma plt_size = elf32_arm_plt_size (abfd, data, offset);
18958 if (plt_size == (bfd_vma) -1)
18959 break;
18960
18961 *s = **p->sym_ptr_ptr;
18962 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
18963 we are defining a symbol, ensure one of them is set. */
18964 if ((s->flags & BSF_LOCAL) == 0)
18965 s->flags |= BSF_GLOBAL;
18966 s->flags |= BSF_SYNTHETIC;
18967 s->section = plt;
18968 s->value = offset;
18969 s->name = names;
18970 s->udata.p = NULL;
18971 len = strlen ((*p->sym_ptr_ptr)->name);
18972 memcpy (names, (*p->sym_ptr_ptr)->name, len);
18973 names += len;
18974 if (p->addend != 0)
18975 {
18976 char buf[30], *a;
18977
18978 memcpy (names, "+0x", sizeof ("+0x") - 1);
18979 names += sizeof ("+0x") - 1;
18980 bfd_sprintf_vma (abfd, buf, p->addend);
18981 for (a = buf; *a == '0'; ++a)
18982 ;
18983 len = strlen (a);
18984 memcpy (names, a, len);
18985 names += len;
18986 }
18987 memcpy (names, "@plt", sizeof ("@plt"));
18988 names += sizeof ("@plt");
18989 ++s, ++n;
18990 offset += plt_size;
18991 }
18992
18993 return n;
18994 }
18995
18996 static bfd_boolean
18997 elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr * hdr)
18998 {
18999 if (hdr->sh_flags & SHF_ARM_PURECODE)
19000 *flags |= SEC_ELF_PURECODE;
19001 return TRUE;
19002 }
19003
19004 static flagword
19005 elf32_arm_lookup_section_flags (char *flag_name)
19006 {
19007 if (!strcmp (flag_name, "SHF_ARM_PURECODE"))
19008 return SHF_ARM_PURECODE;
19009
19010 return SEC_NO_FLAGS;
19011 }
19012
19013 static unsigned int
19014 elf32_arm_count_additional_relocs (asection *sec)
19015 {
19016 struct _arm_elf_section_data *arm_data;
19017 arm_data = get_arm_elf_section_data (sec);
19018
19019 return arm_data == NULL ? 0 : arm_data->additional_reloc_count;
19020 }
19021
19022 static unsigned int
19023 elf32_arm_count_output_relocs (struct bfd_link_info * info,
19024 asection * o,
19025 bfd_boolean rela)
19026 {
19027 struct bfd_elf_section_data *esdo;
19028 struct bfd_link_order *p;
19029 bfd_size_type count;
19030
19031 esdo = elf_section_data (o->output_section);
19032 if (esdo->this_hdr.sh_type != SHT_ARM_EXIDX)
19033 return _bfd_elf_default_count_output_relocs (info, o, rela);
19034
19035 /* PR 20595: Skip relocations for deleted exidx entries. */
19036 count = 0;
19037 for (p = o->map_head.link_order; p != NULL; p = p->next)
19038 {
19039 struct _arm_elf_section_data *arm_data;
19040 struct bfd_elf_section_data *esd;
19041 arm_unwind_table_edit *edit_list;
19042 Elf_Internal_Rela *relocs;
19043 asection *sec;
19044 bfd_size_type num_rel;
19045 bfd_size_type num_rela;
19046 unsigned int i;
19047
19048 if (p->type == bfd_section_reloc_link_order
19049 || p->type == bfd_symbol_reloc_link_order)
19050 {
19051 count++;
19052 continue;
19053 }
19054
19055 sec = p->u.indirect.section;
19056 arm_data = get_arm_elf_section_data (sec);
19057 esd = &arm_data->elf;
19058
19059 if (arm_data->additional_reloc_count)
19060 count += arm_data->additional_reloc_count;
19061
19062 edit_list = arm_data->u.exidx.unwind_edit_list;
19063 if (!edit_list)
19064 {
19065 count += sec->reloc_count;
19066 continue;
19067 }
19068
19069 relocs = _bfd_elf_link_read_relocs (sec->owner, sec, NULL, NULL,
19070 info->keep_memory);
19071 num_rel = esd->rel.hdr ? NUM_SHDR_ENTRIES (esd->rel.hdr) : 0;
19072 num_rela = esd->rela.hdr ? NUM_SHDR_ENTRIES (esd->rela.hdr) : 0;
19073 if (rela)
19074 relocs += num_rel;
19075
19076 for (i = 0; i < (rela ? num_rela : num_rel); i++)
19077 {
19078 arm_unwind_table_edit *edit_node;
19079 unsigned int index;
19080
19081 index = (relocs[i].r_offset - sec->vma) / 8;
19082
19083 for (edit_node = edit_list;
19084 edit_node->next && edit_node->next->index > index;
19085 edit_node++);
19086
19087 if (edit_node->type != DELETE_EXIDX_ENTRY
19088 || edit_node->index != index)
19089 count++;
19090 }
19091 }
19092
19093 return count;
19094 }
19095
19096 /* Called to set the sh_flags, sh_link and sh_info fields of OSECTION which
19097 has a type >= SHT_LOOS. Returns TRUE if these fields were initialised
19098 FALSE otherwise. ISECTION is the best guess matching section from the
19099 input bfd IBFD, but it might be NULL. */
19100
19101 static bfd_boolean
19102 elf32_arm_copy_special_section_fields (const bfd *ibfd ATTRIBUTE_UNUSED,
19103 bfd *obfd ATTRIBUTE_UNUSED,
19104 const Elf_Internal_Shdr *isection ATTRIBUTE_UNUSED,
19105 Elf_Internal_Shdr *osection)
19106 {
19107 switch (osection->sh_type)
19108 {
19109 case SHT_ARM_EXIDX:
19110 {
19111 Elf_Internal_Shdr **oheaders = elf_elfsections (obfd);
19112 Elf_Internal_Shdr **iheaders = elf_elfsections (ibfd);
19113 unsigned i = 0;
19114
19115 osection->sh_flags = SHF_ALLOC | SHF_LINK_ORDER;
19116 osection->sh_info = 0;
19117
19118 /* The sh_link field must be set to the text section associated with
19119 this index section. Unfortunately the ARM EHABI does not specify
19120 exactly how to determine this association. Our caller does try
19121 to match up OSECTION with its corresponding input section however
19122 so that is a good first guess. */
19123 if (isection != NULL
19124 && osection->bfd_section != NULL
19125 && isection->bfd_section != NULL
19126 && isection->bfd_section->output_section != NULL
19127 && isection->bfd_section->output_section == osection->bfd_section
19128 && iheaders != NULL
19129 && isection->sh_link > 0
19130 && isection->sh_link < elf_numsections (ibfd)
19131 && iheaders[isection->sh_link]->bfd_section != NULL
19132 && iheaders[isection->sh_link]->bfd_section->output_section != NULL
19133 )
19134 {
19135 for (i = elf_numsections (obfd); i-- > 0;)
19136 if (oheaders[i]->bfd_section
19137 == iheaders[isection->sh_link]->bfd_section->output_section)
19138 break;
19139 }
19140
19141 if (i == 0)
19142 {
19143 /* Failing that we have to find a matching section ourselves. If
19144 we had the output section name available we could compare that
19145 with input section names. Unfortunately we don't. So instead
19146 we use a simple heuristic and look for the nearest executable
19147 section before this one. */
19148 for (i = elf_numsections (obfd); i-- > 0;)
19149 if (oheaders[i] == osection)
19150 break;
19151 if (i == 0)
19152 break;
19153
19154 while (i-- > 0)
19155 if (oheaders[i]->sh_type == SHT_PROGBITS
19156 && (oheaders[i]->sh_flags & (SHF_ALLOC | SHF_EXECINSTR))
19157 == (SHF_ALLOC | SHF_EXECINSTR))
19158 break;
19159 }
19160
19161 if (i)
19162 {
19163 osection->sh_link = i;
19164 /* If the text section was part of a group
19165 then the index section should be too. */
19166 if (oheaders[i]->sh_flags & SHF_GROUP)
19167 osection->sh_flags |= SHF_GROUP;
19168 return TRUE;
19169 }
19170 }
19171 break;
19172
19173 case SHT_ARM_PREEMPTMAP:
19174 osection->sh_flags = SHF_ALLOC;
19175 break;
19176
19177 case SHT_ARM_ATTRIBUTES:
19178 case SHT_ARM_DEBUGOVERLAY:
19179 case SHT_ARM_OVERLAYSECTION:
19180 default:
19181 break;
19182 }
19183
19184 return FALSE;
19185 }
19186
19187 /* Returns TRUE if NAME is an ARM mapping symbol.
19188 Traditionally the symbols $a, $d and $t have been used.
19189 The ARM ELF standard also defines $x (for A64 code). It also allows a
19190 period initiated suffix to be added to the symbol: "$[adtx]\.[:sym_char]+".
19191 Other tools might also produce $b (Thumb BL), $f, $p, $m and $v, but we do
19192 not support them here. $t.x indicates the start of ThumbEE instructions. */
19193
19194 static bfd_boolean
19195 is_arm_mapping_symbol (const char * name)
19196 {
19197 return name != NULL /* Paranoia. */
19198 && name[0] == '$' /* Note: if objcopy --prefix-symbols has been used then
19199 the mapping symbols could have acquired a prefix.
19200 We do not support this here, since such symbols no
19201 longer conform to the ARM ELF ABI. */
19202 && (name[1] == 'a' || name[1] == 'd' || name[1] == 't' || name[1] == 'x')
19203 && (name[2] == 0 || name[2] == '.');
19204 /* FIXME: Strictly speaking the symbol is only a valid mapping symbol if
19205 any characters that follow the period are legal characters for the body
19206 of a symbol's name. For now we just assume that this is the case. */
19207 }
19208
19209 /* Make sure that mapping symbols in object files are not removed via the
19210 "strip --strip-unneeded" tool. These symbols are needed in order to
19211 correctly generate interworking veneers, and for byte swapping code
19212 regions. Once an object file has been linked, it is safe to remove the
19213 symbols as they will no longer be needed. */
19214
19215 static void
19216 elf32_arm_backend_symbol_processing (bfd *abfd, asymbol *sym)
19217 {
19218 if (((abfd->flags & (EXEC_P | DYNAMIC)) == 0)
19219 && sym->section != bfd_abs_section_ptr
19220 && is_arm_mapping_symbol (sym->name))
19221 sym->flags |= BSF_KEEP;
19222 }
19223
19224 static bfd_boolean
19225 emit_relocs (bfd * output_bfd,
19226 asection * input_section,
19227 Elf_Internal_Shdr * input_rel_hdr,
19228 Elf_Internal_Rela * internal_relocs,
19229 struct elf_link_hash_entry ** rel_hash,
19230 bfd_boolean (* fallback) (bfd *, asection *,
19231 Elf_Internal_Shdr *,
19232 Elf_Internal_Rela *,
19233 struct elf_link_hash_entry **))
19234 {
19235 _arm_elf_section_data *arm_data;
19236 struct bfd_elf_section_reloc_data *output_reldata;
19237 Elf_Internal_Shdr *output_rel_hdr;
19238 Elf_Internal_Rela *irela;
19239 Elf_Internal_Rela *irelaend;
19240 asection *output_section;
19241 const struct elf_backend_data *bed;
19242 void (*swap_out) (bfd *, const Elf_Internal_Rela *, bfd_byte *);
19243 struct bfd_elf_section_data *esdo;
19244 arm_unwind_table_edit *edit_list, *edit_tail;
19245 bfd_byte *erel;
19246 bfd_vma offset;
19247
19248 arm_data = get_arm_elf_section_data (input_section);
19249
19250 if (!arm_data || arm_data->elf.this_hdr.sh_type != SHT_ARM_EXIDX)
19251 goto fallback_label;
19252
19253 edit_list = arm_data->u.exidx.unwind_edit_list;
19254 edit_tail = arm_data->u.exidx.unwind_edit_tail;
19255
19256 if (!edit_list)
19257 goto fallback_label;
19258
19259 output_section = input_section->output_section;
19260 offset = output_section->vma + input_section->output_offset;
19261
19262 bed = get_elf_backend_data (output_bfd);
19263 esdo = elf_section_data (output_section);
19264 if (esdo->rel.hdr && esdo->rel.hdr->sh_entsize == input_rel_hdr->sh_entsize)
19265 {
19266 output_reldata = &esdo->rel;
19267 swap_out = bed->s->swap_reloc_out;
19268 }
19269 else if (esdo->rela.hdr
19270 && esdo->rela.hdr->sh_entsize == input_rel_hdr->sh_entsize)
19271 {
19272 output_reldata = &esdo->rela;
19273 swap_out = bed->s->swap_reloca_out;
19274 }
19275 else
19276 {
19277 (*_bfd_error_handler)
19278 (_("%B: relocation size mismatch in %B section %A"),
19279 output_bfd, input_section->owner, input_section);
19280 bfd_set_error (bfd_error_wrong_format);
19281 return FALSE;
19282 }
19283
19284 output_rel_hdr = output_reldata->hdr;
19285 erel = output_rel_hdr->contents;
19286 erel += output_reldata->count * input_rel_hdr->sh_entsize;
19287
19288 irela = internal_relocs;
19289 irelaend = irela + (NUM_SHDR_ENTRIES (input_rel_hdr)
19290 * bed->s->int_rels_per_ext_rel);
19291 while (irela < irelaend)
19292 {
19293 arm_unwind_table_edit *edit_node, *edit_next;
19294 Elf_Internal_Rela rel;
19295 bfd_vma bias;
19296 bfd_vma index;
19297
19298 index = (irela->r_offset - offset) / 8;
19299
19300 bias = 0;
19301 edit_node = edit_list;
19302 for (edit_next = edit_list;
19303 edit_next && edit_next->index <= index;
19304 edit_next = edit_node->next)
19305 {
19306 bias++;
19307 edit_node = edit_next;
19308 }
19309
19310 if (edit_node->type != DELETE_EXIDX_ENTRY || edit_node->index != index)
19311 {
19312 rel.r_offset = irela->r_offset - bias * 8;
19313 rel.r_info = irela->r_info;
19314 rel.r_addend = irela->r_addend;
19315
19316 (*swap_out) (output_bfd, &rel, erel);
19317 erel += output_rel_hdr->sh_entsize;
19318 output_reldata->count++;
19319 }
19320
19321 irela += bed->s->int_rels_per_ext_rel;
19322 }
19323
19324 if (edit_tail->type == INSERT_EXIDX_CANTUNWIND_AT_END)
19325 {
19326 /* New relocation entity. */
19327 asection *text_sec = edit_tail->linked_section;
19328 asection *text_out = text_sec->output_section;
19329 bfd_vma exidx_offset = offset + input_section->size - 8;
19330 Elf_Internal_Rela rel;
19331
19332 rel.r_addend = 0;
19333 rel.r_offset = exidx_offset;
19334 rel.r_info = ELF32_R_INFO (text_out->target_index, R_ARM_PREL31);
19335 (*swap_out) (output_bfd, &rel, erel);
19336 output_reldata->count++;
19337 }
19338
19339 return TRUE;
19340
19341 fallback_label:
19342 return fallback (output_bfd, input_section, input_rel_hdr,
19343 internal_relocs, rel_hash);
19344 }
19345
19346 static bfd_boolean
19347 elf32_arm_emit_relocs (bfd * output_bfd,
19348 asection * input_section,
19349 Elf_Internal_Shdr * input_rel_hdr,
19350 Elf_Internal_Rela * internal_relocs,
19351 struct elf_link_hash_entry ** rel_hash)
19352 {
19353 return emit_relocs (output_bfd, input_section, input_rel_hdr, internal_relocs,
19354 rel_hash, _bfd_elf_link_output_relocs);
19355 }
19356
19357 #undef elf_backend_copy_special_section_fields
19358 #define elf_backend_copy_special_section_fields elf32_arm_copy_special_section_fields
19359
19360 #define ELF_ARCH bfd_arch_arm
19361 #define ELF_TARGET_ID ARM_ELF_DATA
19362 #define ELF_MACHINE_CODE EM_ARM
19363 #ifdef __QNXTARGET__
19364 #define ELF_MAXPAGESIZE 0x1000
19365 #else
19366 #define ELF_MAXPAGESIZE 0x10000
19367 #endif
19368 #define ELF_MINPAGESIZE 0x1000
19369 #define ELF_COMMONPAGESIZE 0x1000
19370
19371 #define bfd_elf32_mkobject elf32_arm_mkobject
19372
19373 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
19374 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
19375 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
19376 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
19377 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
19378 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
19379 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
19380 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
19381 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
19382 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
19383 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
19384 #define bfd_elf32_bfd_final_link elf32_arm_final_link
19385 #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab
19386
19387 #define elf_backend_emit_relocs elf32_arm_emit_relocs
19388 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
19389 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
19390 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
19391 #define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
19392 #define elf_backend_check_relocs elf32_arm_check_relocs
19393 #define elf_backend_relocate_section elf32_arm_relocate_section
19394 #define elf_backend_write_section elf32_arm_write_section
19395 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
19396 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
19397 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
19398 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
19399 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
19400 #define elf_backend_always_size_sections elf32_arm_always_size_sections
19401 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
19402 #define elf_backend_post_process_headers elf32_arm_post_process_headers
19403 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
19404 #define elf_backend_object_p elf32_arm_object_p
19405 #define elf_backend_fake_sections elf32_arm_fake_sections
19406 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
19407 #define elf_backend_final_write_processing elf32_arm_final_write_processing
19408 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
19409 #define elf_backend_size_info elf32_arm_size_info
19410 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
19411 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
19412 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
19413 #define elf_backend_filter_implib_symbols elf32_arm_filter_implib_symbols
19414 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
19415 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
19416 #define elf_backend_count_additional_relocs elf32_arm_count_additional_relocs
19417 #define elf_backend_count_output_relocs elf32_arm_count_output_relocs
19418 #define elf_backend_symbol_processing elf32_arm_backend_symbol_processing
19419
19420 #define elf_backend_can_refcount 1
19421 #define elf_backend_can_gc_sections 1
19422 #define elf_backend_plt_readonly 1
19423 #define elf_backend_want_got_plt 1
19424 #define elf_backend_want_plt_sym 0
19425 #define elf_backend_may_use_rel_p 1
19426 #define elf_backend_may_use_rela_p 0
19427 #define elf_backend_default_use_rela_p 0
19428
19429 #define elf_backend_got_header_size 12
19430 #define elf_backend_extern_protected_data 1
19431
19432 #undef elf_backend_obj_attrs_vendor
19433 #define elf_backend_obj_attrs_vendor "aeabi"
19434 #undef elf_backend_obj_attrs_section
19435 #define elf_backend_obj_attrs_section ".ARM.attributes"
19436 #undef elf_backend_obj_attrs_arg_type
19437 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
19438 #undef elf_backend_obj_attrs_section_type
19439 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
19440 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
19441 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
19442
19443 #undef elf_backend_section_flags
19444 #define elf_backend_section_flags elf32_arm_section_flags
19445 #undef elf_backend_lookup_section_flags_hook
19446 #define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags
19447
19448 #include "elf32-target.h"
19449
19450 /* Native Client targets. */
19451
19452 #undef TARGET_LITTLE_SYM
19453 #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec
19454 #undef TARGET_LITTLE_NAME
19455 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
19456 #undef TARGET_BIG_SYM
19457 #define TARGET_BIG_SYM arm_elf32_nacl_be_vec
19458 #undef TARGET_BIG_NAME
19459 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
19460
19461 /* Like elf32_arm_link_hash_table_create -- but overrides
19462 appropriately for NaCl. */
19463
19464 static struct bfd_link_hash_table *
19465 elf32_arm_nacl_link_hash_table_create (bfd *abfd)
19466 {
19467 struct bfd_link_hash_table *ret;
19468
19469 ret = elf32_arm_link_hash_table_create (abfd);
19470 if (ret)
19471 {
19472 struct elf32_arm_link_hash_table *htab
19473 = (struct elf32_arm_link_hash_table *) ret;
19474
19475 htab->nacl_p = 1;
19476
19477 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
19478 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
19479 }
19480 return ret;
19481 }
19482
19483 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
19484 really need to use elf32_arm_modify_segment_map. But we do it
19485 anyway just to reduce gratuitous differences with the stock ARM backend. */
19486
19487 static bfd_boolean
19488 elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
19489 {
19490 return (elf32_arm_modify_segment_map (abfd, info)
19491 && nacl_modify_segment_map (abfd, info));
19492 }
19493
19494 static void
19495 elf32_arm_nacl_final_write_processing (bfd *abfd, bfd_boolean linker)
19496 {
19497 elf32_arm_final_write_processing (abfd, linker);
19498 nacl_final_write_processing (abfd, linker);
19499 }
19500
19501 static bfd_vma
19502 elf32_arm_nacl_plt_sym_val (bfd_vma i, const asection *plt,
19503 const arelent *rel ATTRIBUTE_UNUSED)
19504 {
19505 return plt->vma
19506 + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry) +
19507 i * ARRAY_SIZE (elf32_arm_nacl_plt_entry));
19508 }
19509
19510 #undef elf32_bed
19511 #define elf32_bed elf32_arm_nacl_bed
19512 #undef bfd_elf32_bfd_link_hash_table_create
19513 #define bfd_elf32_bfd_link_hash_table_create \
19514 elf32_arm_nacl_link_hash_table_create
19515 #undef elf_backend_plt_alignment
19516 #define elf_backend_plt_alignment 4
19517 #undef elf_backend_modify_segment_map
19518 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
19519 #undef elf_backend_modify_program_headers
19520 #define elf_backend_modify_program_headers nacl_modify_program_headers
19521 #undef elf_backend_final_write_processing
19522 #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
19523 #undef bfd_elf32_get_synthetic_symtab
19524 #undef elf_backend_plt_sym_val
19525 #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
19526 #undef elf_backend_copy_special_section_fields
19527
19528 #undef ELF_MINPAGESIZE
19529 #undef ELF_COMMONPAGESIZE
19530
19531
19532 #include "elf32-target.h"
19533
19534 /* Reset to defaults. */
19535 #undef elf_backend_plt_alignment
19536 #undef elf_backend_modify_segment_map
19537 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
19538 #undef elf_backend_modify_program_headers
19539 #undef elf_backend_final_write_processing
19540 #define elf_backend_final_write_processing elf32_arm_final_write_processing
19541 #undef ELF_MINPAGESIZE
19542 #define ELF_MINPAGESIZE 0x1000
19543 #undef ELF_COMMONPAGESIZE
19544 #define ELF_COMMONPAGESIZE 0x1000
19545
19546
19547 /* VxWorks Targets. */
19548
19549 #undef TARGET_LITTLE_SYM
19550 #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec
19551 #undef TARGET_LITTLE_NAME
19552 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
19553 #undef TARGET_BIG_SYM
19554 #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec
19555 #undef TARGET_BIG_NAME
19556 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
19557
19558 /* Like elf32_arm_link_hash_table_create -- but overrides
19559 appropriately for VxWorks. */
19560
19561 static struct bfd_link_hash_table *
19562 elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
19563 {
19564 struct bfd_link_hash_table *ret;
19565
19566 ret = elf32_arm_link_hash_table_create (abfd);
19567 if (ret)
19568 {
19569 struct elf32_arm_link_hash_table *htab
19570 = (struct elf32_arm_link_hash_table *) ret;
19571 htab->use_rel = 0;
19572 htab->vxworks_p = 1;
19573 }
19574 return ret;
19575 }
19576
19577 static void
19578 elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
19579 {
19580 elf32_arm_final_write_processing (abfd, linker);
19581 elf_vxworks_final_write_processing (abfd, linker);
19582 }
19583
19584 static bfd_boolean
19585 elf32_arm_vxworks_emit_relocs (bfd * output_bfd,
19586 asection * input_section,
19587 Elf_Internal_Shdr * input_rel_hdr,
19588 Elf_Internal_Rela * internal_relocs,
19589 struct elf_link_hash_entry ** rel_hash)
19590 {
19591 return emit_relocs (output_bfd, input_section, input_rel_hdr, internal_relocs,
19592 rel_hash, elf_vxworks_emit_relocs);
19593 }
19594
19595 #undef elf32_bed
19596 #define elf32_bed elf32_arm_vxworks_bed
19597
19598 #undef bfd_elf32_bfd_link_hash_table_create
19599 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
19600 #undef elf_backend_final_write_processing
19601 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
19602 #undef elf_backend_emit_relocs
19603 #define elf_backend_emit_relocs elf32_arm_vxworks_emit_relocs
19604
19605 #undef elf_backend_may_use_rel_p
19606 #define elf_backend_may_use_rel_p 0
19607 #undef elf_backend_may_use_rela_p
19608 #define elf_backend_may_use_rela_p 1
19609 #undef elf_backend_default_use_rela_p
19610 #define elf_backend_default_use_rela_p 1
19611 #undef elf_backend_want_plt_sym
19612 #define elf_backend_want_plt_sym 1
19613 #undef ELF_MAXPAGESIZE
19614 #define ELF_MAXPAGESIZE 0x1000
19615
19616 #include "elf32-target.h"
19617
19618
19619 /* Merge backend specific data from an object file to the output
19620 object file when linking. */
19621
19622 static bfd_boolean
19623 elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
19624 {
19625 flagword out_flags;
19626 flagword in_flags;
19627 bfd_boolean flags_compatible = TRUE;
19628 asection *sec;
19629
19630 /* Check if we have the same endianness. */
19631 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
19632 return FALSE;
19633
19634 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
19635 return TRUE;
19636
19637 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
19638 return FALSE;
19639
19640 /* The input BFD must have had its flags initialised. */
19641 /* The following seems bogus to me -- The flags are initialized in
19642 the assembler but I don't think an elf_flags_init field is
19643 written into the object. */
19644 /* BFD_ASSERT (elf_flags_init (ibfd)); */
19645
19646 in_flags = elf_elfheader (ibfd)->e_flags;
19647 out_flags = elf_elfheader (obfd)->e_flags;
19648
19649 /* In theory there is no reason why we couldn't handle this. However
19650 in practice it isn't even close to working and there is no real
19651 reason to want it. */
19652 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
19653 && !(ibfd->flags & DYNAMIC)
19654 && (in_flags & EF_ARM_BE8))
19655 {
19656 _bfd_error_handler (_("error: %B is already in final BE8 format"),
19657 ibfd);
19658 return FALSE;
19659 }
19660
19661 if (!elf_flags_init (obfd))
19662 {
19663 /* If the input is the default architecture and had the default
19664 flags then do not bother setting the flags for the output
19665 architecture, instead allow future merges to do this. If no
19666 future merges ever set these flags then they will retain their
19667 uninitialised values, which surprise surprise, correspond
19668 to the default values. */
19669 if (bfd_get_arch_info (ibfd)->the_default
19670 && elf_elfheader (ibfd)->e_flags == 0)
19671 return TRUE;
19672
19673 elf_flags_init (obfd) = TRUE;
19674 elf_elfheader (obfd)->e_flags = in_flags;
19675
19676 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
19677 && bfd_get_arch_info (obfd)->the_default)
19678 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
19679
19680 return TRUE;
19681 }
19682
19683 /* Determine what should happen if the input ARM architecture
19684 does not match the output ARM architecture. */
19685 if (! bfd_arm_merge_machines (ibfd, obfd))
19686 return FALSE;
19687
19688 /* Identical flags must be compatible. */
19689 if (in_flags == out_flags)
19690 return TRUE;
19691
19692 /* Check to see if the input BFD actually contains any sections. If
19693 not, its flags may not have been initialised either, but it
19694 cannot actually cause any incompatiblity. Do not short-circuit
19695 dynamic objects; their section list may be emptied by
19696 elf_link_add_object_symbols.
19697
19698 Also check to see if there are no code sections in the input.
19699 In this case there is no need to check for code specific flags.
19700 XXX - do we need to worry about floating-point format compatability
19701 in data sections ? */
19702 if (!(ibfd->flags & DYNAMIC))
19703 {
19704 bfd_boolean null_input_bfd = TRUE;
19705 bfd_boolean only_data_sections = TRUE;
19706
19707 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
19708 {
19709 /* Ignore synthetic glue sections. */
19710 if (strcmp (sec->name, ".glue_7")
19711 && strcmp (sec->name, ".glue_7t"))
19712 {
19713 if ((bfd_get_section_flags (ibfd, sec)
19714 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
19715 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
19716 only_data_sections = FALSE;
19717
19718 null_input_bfd = FALSE;
19719 break;
19720 }
19721 }
19722
19723 if (null_input_bfd || only_data_sections)
19724 return TRUE;
19725 }
19726
19727 /* Complain about various flag mismatches. */
19728 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
19729 EF_ARM_EABI_VERSION (out_flags)))
19730 {
19731 _bfd_error_handler
19732 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
19733 ibfd, obfd,
19734 (in_flags & EF_ARM_EABIMASK) >> 24,
19735 (out_flags & EF_ARM_EABIMASK) >> 24);
19736 return FALSE;
19737 }
19738
19739 /* Not sure what needs to be checked for EABI versions >= 1. */
19740 /* VxWorks libraries do not use these flags. */
19741 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
19742 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
19743 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
19744 {
19745 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
19746 {
19747 _bfd_error_handler
19748 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
19749 ibfd, obfd,
19750 in_flags & EF_ARM_APCS_26 ? 26 : 32,
19751 out_flags & EF_ARM_APCS_26 ? 26 : 32);
19752 flags_compatible = FALSE;
19753 }
19754
19755 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
19756 {
19757 if (in_flags & EF_ARM_APCS_FLOAT)
19758 _bfd_error_handler
19759 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
19760 ibfd, obfd);
19761 else
19762 _bfd_error_handler
19763 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
19764 ibfd, obfd);
19765
19766 flags_compatible = FALSE;
19767 }
19768
19769 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
19770 {
19771 if (in_flags & EF_ARM_VFP_FLOAT)
19772 _bfd_error_handler
19773 (_("error: %B uses VFP instructions, whereas %B does not"),
19774 ibfd, obfd);
19775 else
19776 _bfd_error_handler
19777 (_("error: %B uses FPA instructions, whereas %B does not"),
19778 ibfd, obfd);
19779
19780 flags_compatible = FALSE;
19781 }
19782
19783 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
19784 {
19785 if (in_flags & EF_ARM_MAVERICK_FLOAT)
19786 _bfd_error_handler
19787 (_("error: %B uses Maverick instructions, whereas %B does not"),
19788 ibfd, obfd);
19789 else
19790 _bfd_error_handler
19791 (_("error: %B does not use Maverick instructions, whereas %B does"),
19792 ibfd, obfd);
19793
19794 flags_compatible = FALSE;
19795 }
19796
19797 #ifdef EF_ARM_SOFT_FLOAT
19798 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
19799 {
19800 /* We can allow interworking between code that is VFP format
19801 layout, and uses either soft float or integer regs for
19802 passing floating point arguments and results. We already
19803 know that the APCS_FLOAT flags match; similarly for VFP
19804 flags. */
19805 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
19806 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
19807 {
19808 if (in_flags & EF_ARM_SOFT_FLOAT)
19809 _bfd_error_handler
19810 (_("error: %B uses software FP, whereas %B uses hardware FP"),
19811 ibfd, obfd);
19812 else
19813 _bfd_error_handler
19814 (_("error: %B uses hardware FP, whereas %B uses software FP"),
19815 ibfd, obfd);
19816
19817 flags_compatible = FALSE;
19818 }
19819 }
19820 #endif
19821
19822 /* Interworking mismatch is only a warning. */
19823 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
19824 {
19825 if (in_flags & EF_ARM_INTERWORK)
19826 {
19827 _bfd_error_handler
19828 (_("Warning: %B supports interworking, whereas %B does not"),
19829 ibfd, obfd);
19830 }
19831 else
19832 {
19833 _bfd_error_handler
19834 (_("Warning: %B does not support interworking, whereas %B does"),
19835 ibfd, obfd);
19836 }
19837 }
19838 }
19839
19840 return flags_compatible;
19841 }
19842
19843
19844 /* Symbian OS Targets. */
19845
19846 #undef TARGET_LITTLE_SYM
19847 #define TARGET_LITTLE_SYM arm_elf32_symbian_le_vec
19848 #undef TARGET_LITTLE_NAME
19849 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
19850 #undef TARGET_BIG_SYM
19851 #define TARGET_BIG_SYM arm_elf32_symbian_be_vec
19852 #undef TARGET_BIG_NAME
19853 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
19854
19855 /* Like elf32_arm_link_hash_table_create -- but overrides
19856 appropriately for Symbian OS. */
19857
19858 static struct bfd_link_hash_table *
19859 elf32_arm_symbian_link_hash_table_create (bfd *abfd)
19860 {
19861 struct bfd_link_hash_table *ret;
19862
19863 ret = elf32_arm_link_hash_table_create (abfd);
19864 if (ret)
19865 {
19866 struct elf32_arm_link_hash_table *htab
19867 = (struct elf32_arm_link_hash_table *)ret;
19868 /* There is no PLT header for Symbian OS. */
19869 htab->plt_header_size = 0;
19870 /* The PLT entries are each one instruction and one word. */
19871 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
19872 htab->symbian_p = 1;
19873 /* Symbian uses armv5t or above, so use_blx is always true. */
19874 htab->use_blx = 1;
19875 htab->root.is_relocatable_executable = 1;
19876 }
19877 return ret;
19878 }
19879
19880 static const struct bfd_elf_special_section
19881 elf32_arm_symbian_special_sections[] =
19882 {
19883 /* In a BPABI executable, the dynamic linking sections do not go in
19884 the loadable read-only segment. The post-linker may wish to
19885 refer to these sections, but they are not part of the final
19886 program image. */
19887 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
19888 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
19889 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
19890 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
19891 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
19892 /* These sections do not need to be writable as the SymbianOS
19893 postlinker will arrange things so that no dynamic relocation is
19894 required. */
19895 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
19896 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
19897 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
19898 { NULL, 0, 0, 0, 0 }
19899 };
19900
19901 static void
19902 elf32_arm_symbian_begin_write_processing (bfd *abfd,
19903 struct bfd_link_info *link_info)
19904 {
19905 /* BPABI objects are never loaded directly by an OS kernel; they are
19906 processed by a postlinker first, into an OS-specific format. If
19907 the D_PAGED bit is set on the file, BFD will align segments on
19908 page boundaries, so that an OS can directly map the file. With
19909 BPABI objects, that just results in wasted space. In addition,
19910 because we clear the D_PAGED bit, map_sections_to_segments will
19911 recognize that the program headers should not be mapped into any
19912 loadable segment. */
19913 abfd->flags &= ~D_PAGED;
19914 elf32_arm_begin_write_processing (abfd, link_info);
19915 }
19916
19917 static bfd_boolean
19918 elf32_arm_symbian_modify_segment_map (bfd *abfd,
19919 struct bfd_link_info *info)
19920 {
19921 struct elf_segment_map *m;
19922 asection *dynsec;
19923
19924 /* BPABI shared libraries and executables should have a PT_DYNAMIC
19925 segment. However, because the .dynamic section is not marked
19926 with SEC_LOAD, the generic ELF code will not create such a
19927 segment. */
19928 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
19929 if (dynsec)
19930 {
19931 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
19932 if (m->p_type == PT_DYNAMIC)
19933 break;
19934
19935 if (m == NULL)
19936 {
19937 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
19938 m->next = elf_seg_map (abfd);
19939 elf_seg_map (abfd) = m;
19940 }
19941 }
19942
19943 /* Also call the generic arm routine. */
19944 return elf32_arm_modify_segment_map (abfd, info);
19945 }
19946
19947 /* Return address for Ith PLT stub in section PLT, for relocation REL
19948 or (bfd_vma) -1 if it should not be included. */
19949
19950 static bfd_vma
19951 elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
19952 const arelent *rel ATTRIBUTE_UNUSED)
19953 {
19954 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
19955 }
19956
19957 #undef elf32_bed
19958 #define elf32_bed elf32_arm_symbian_bed
19959
19960 /* The dynamic sections are not allocated on SymbianOS; the postlinker
19961 will process them and then discard them. */
19962 #undef ELF_DYNAMIC_SEC_FLAGS
19963 #define ELF_DYNAMIC_SEC_FLAGS \
19964 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
19965
19966 #undef elf_backend_emit_relocs
19967 #define elf_backend_emit_relocs elf32_arm_emit_relocs
19968
19969 #undef bfd_elf32_bfd_link_hash_table_create
19970 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
19971 #undef elf_backend_special_sections
19972 #define elf_backend_special_sections elf32_arm_symbian_special_sections
19973 #undef elf_backend_begin_write_processing
19974 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
19975 #undef elf_backend_final_write_processing
19976 #define elf_backend_final_write_processing elf32_arm_final_write_processing
19977
19978 #undef elf_backend_modify_segment_map
19979 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
19980
19981 /* There is no .got section for BPABI objects, and hence no header. */
19982 #undef elf_backend_got_header_size
19983 #define elf_backend_got_header_size 0
19984
19985 /* Similarly, there is no .got.plt section. */
19986 #undef elf_backend_want_got_plt
19987 #define elf_backend_want_got_plt 0
19988
19989 #undef elf_backend_plt_sym_val
19990 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
19991
19992 #undef elf_backend_may_use_rel_p
19993 #define elf_backend_may_use_rel_p 1
19994 #undef elf_backend_may_use_rela_p
19995 #define elf_backend_may_use_rela_p 0
19996 #undef elf_backend_default_use_rela_p
19997 #define elf_backend_default_use_rela_p 0
19998 #undef elf_backend_want_plt_sym
19999 #define elf_backend_want_plt_sym 0
20000 #undef ELF_MAXPAGESIZE
20001 #define ELF_MAXPAGESIZE 0x8000
20002
20003 #include "elf32-target.h"
GDB Binutils - Deliverables
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