1 /* 32-bit ELF support for ARM
2 Copyright (C) 1998-2018 Free Software Foundation, Inc.
4 This file is part of BFD, the Binary File Descriptor library.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
25 #include "bfd_stdint.h"
26 #include "libiberty.h"
30 #include "elf-vxworks.h"
33 /* Return the relocation section associated with NAME. HTAB is the
34 bfd's elf32_arm_link_hash_entry. */
35 #define RELOC_SECTION(HTAB, NAME) \
36 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
38 /* Return size of a relocation entry. HTAB is the bfd's
39 elf32_arm_link_hash_entry. */
40 #define RELOC_SIZE(HTAB) \
42 ? sizeof (Elf32_External_Rel) \
43 : sizeof (Elf32_External_Rela))
45 /* Return function to swap relocations in. HTAB is the bfd's
46 elf32_arm_link_hash_entry. */
47 #define SWAP_RELOC_IN(HTAB) \
49 ? bfd_elf32_swap_reloc_in \
50 : bfd_elf32_swap_reloca_in)
52 /* Return function to swap relocations out. HTAB is the bfd's
53 elf32_arm_link_hash_entry. */
54 #define SWAP_RELOC_OUT(HTAB) \
56 ? bfd_elf32_swap_reloc_out \
57 : bfd_elf32_swap_reloca_out)
59 #define elf_info_to_howto NULL
60 #define elf_info_to_howto_rel elf32_arm_info_to_howto
62 #define ARM_ELF_ABI_VERSION 0
63 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
65 /* The Adjusted Place, as defined by AAELF. */
66 #define Pa(X) ((X) & 0xfffffffc)
68 static bfd_boolean
elf32_arm_write_section (bfd
*output_bfd
,
69 struct bfd_link_info
*link_info
,
73 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
74 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
77 static reloc_howto_type elf32_arm_howto_table_1
[] =
80 HOWTO (R_ARM_NONE
, /* type */
82 3, /* size (0 = byte, 1 = short, 2 = long) */
84 FALSE
, /* pc_relative */
86 complain_overflow_dont
,/* complain_on_overflow */
87 bfd_elf_generic_reloc
, /* special_function */
88 "R_ARM_NONE", /* name */
89 FALSE
, /* partial_inplace */
92 FALSE
), /* pcrel_offset */
94 HOWTO (R_ARM_PC24
, /* type */
96 2, /* size (0 = byte, 1 = short, 2 = long) */
98 TRUE
, /* pc_relative */
100 complain_overflow_signed
,/* complain_on_overflow */
101 bfd_elf_generic_reloc
, /* special_function */
102 "R_ARM_PC24", /* name */
103 FALSE
, /* partial_inplace */
104 0x00ffffff, /* src_mask */
105 0x00ffffff, /* dst_mask */
106 TRUE
), /* pcrel_offset */
108 /* 32 bit absolute */
109 HOWTO (R_ARM_ABS32
, /* type */
111 2, /* size (0 = byte, 1 = short, 2 = long) */
113 FALSE
, /* pc_relative */
115 complain_overflow_bitfield
,/* complain_on_overflow */
116 bfd_elf_generic_reloc
, /* special_function */
117 "R_ARM_ABS32", /* name */
118 FALSE
, /* partial_inplace */
119 0xffffffff, /* src_mask */
120 0xffffffff, /* dst_mask */
121 FALSE
), /* pcrel_offset */
123 /* standard 32bit pc-relative reloc */
124 HOWTO (R_ARM_REL32
, /* type */
126 2, /* size (0 = byte, 1 = short, 2 = long) */
128 TRUE
, /* pc_relative */
130 complain_overflow_bitfield
,/* complain_on_overflow */
131 bfd_elf_generic_reloc
, /* special_function */
132 "R_ARM_REL32", /* name */
133 FALSE
, /* partial_inplace */
134 0xffffffff, /* src_mask */
135 0xffffffff, /* dst_mask */
136 TRUE
), /* pcrel_offset */
138 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
139 HOWTO (R_ARM_LDR_PC_G0
, /* type */
141 0, /* size (0 = byte, 1 = short, 2 = long) */
143 TRUE
, /* pc_relative */
145 complain_overflow_dont
,/* complain_on_overflow */
146 bfd_elf_generic_reloc
, /* special_function */
147 "R_ARM_LDR_PC_G0", /* name */
148 FALSE
, /* partial_inplace */
149 0xffffffff, /* src_mask */
150 0xffffffff, /* dst_mask */
151 TRUE
), /* pcrel_offset */
153 /* 16 bit absolute */
154 HOWTO (R_ARM_ABS16
, /* type */
156 1, /* size (0 = byte, 1 = short, 2 = long) */
158 FALSE
, /* pc_relative */
160 complain_overflow_bitfield
,/* complain_on_overflow */
161 bfd_elf_generic_reloc
, /* special_function */
162 "R_ARM_ABS16", /* name */
163 FALSE
, /* partial_inplace */
164 0x0000ffff, /* src_mask */
165 0x0000ffff, /* dst_mask */
166 FALSE
), /* pcrel_offset */
168 /* 12 bit absolute */
169 HOWTO (R_ARM_ABS12
, /* type */
171 2, /* size (0 = byte, 1 = short, 2 = long) */
173 FALSE
, /* pc_relative */
175 complain_overflow_bitfield
,/* complain_on_overflow */
176 bfd_elf_generic_reloc
, /* special_function */
177 "R_ARM_ABS12", /* name */
178 FALSE
, /* partial_inplace */
179 0x00000fff, /* src_mask */
180 0x00000fff, /* dst_mask */
181 FALSE
), /* pcrel_offset */
183 HOWTO (R_ARM_THM_ABS5
, /* type */
185 1, /* size (0 = byte, 1 = short, 2 = long) */
187 FALSE
, /* pc_relative */
189 complain_overflow_bitfield
,/* complain_on_overflow */
190 bfd_elf_generic_reloc
, /* special_function */
191 "R_ARM_THM_ABS5", /* name */
192 FALSE
, /* partial_inplace */
193 0x000007e0, /* src_mask */
194 0x000007e0, /* dst_mask */
195 FALSE
), /* pcrel_offset */
198 HOWTO (R_ARM_ABS8
, /* type */
200 0, /* size (0 = byte, 1 = short, 2 = long) */
202 FALSE
, /* pc_relative */
204 complain_overflow_bitfield
,/* complain_on_overflow */
205 bfd_elf_generic_reloc
, /* special_function */
206 "R_ARM_ABS8", /* name */
207 FALSE
, /* partial_inplace */
208 0x000000ff, /* src_mask */
209 0x000000ff, /* dst_mask */
210 FALSE
), /* pcrel_offset */
212 HOWTO (R_ARM_SBREL32
, /* type */
214 2, /* size (0 = byte, 1 = short, 2 = long) */
216 FALSE
, /* pc_relative */
218 complain_overflow_dont
,/* complain_on_overflow */
219 bfd_elf_generic_reloc
, /* special_function */
220 "R_ARM_SBREL32", /* name */
221 FALSE
, /* partial_inplace */
222 0xffffffff, /* src_mask */
223 0xffffffff, /* dst_mask */
224 FALSE
), /* pcrel_offset */
226 HOWTO (R_ARM_THM_CALL
, /* type */
228 2, /* size (0 = byte, 1 = short, 2 = long) */
230 TRUE
, /* pc_relative */
232 complain_overflow_signed
,/* complain_on_overflow */
233 bfd_elf_generic_reloc
, /* special_function */
234 "R_ARM_THM_CALL", /* name */
235 FALSE
, /* partial_inplace */
236 0x07ff2fff, /* src_mask */
237 0x07ff2fff, /* dst_mask */
238 TRUE
), /* pcrel_offset */
240 HOWTO (R_ARM_THM_PC8
, /* type */
242 1, /* size (0 = byte, 1 = short, 2 = long) */
244 TRUE
, /* pc_relative */
246 complain_overflow_signed
,/* complain_on_overflow */
247 bfd_elf_generic_reloc
, /* special_function */
248 "R_ARM_THM_PC8", /* name */
249 FALSE
, /* partial_inplace */
250 0x000000ff, /* src_mask */
251 0x000000ff, /* dst_mask */
252 TRUE
), /* pcrel_offset */
254 HOWTO (R_ARM_BREL_ADJ
, /* type */
256 1, /* size (0 = byte, 1 = short, 2 = long) */
258 FALSE
, /* pc_relative */
260 complain_overflow_signed
,/* complain_on_overflow */
261 bfd_elf_generic_reloc
, /* special_function */
262 "R_ARM_BREL_ADJ", /* name */
263 FALSE
, /* partial_inplace */
264 0xffffffff, /* src_mask */
265 0xffffffff, /* dst_mask */
266 FALSE
), /* pcrel_offset */
268 HOWTO (R_ARM_TLS_DESC
, /* type */
270 2, /* size (0 = byte, 1 = short, 2 = long) */
272 FALSE
, /* pc_relative */
274 complain_overflow_bitfield
,/* complain_on_overflow */
275 bfd_elf_generic_reloc
, /* special_function */
276 "R_ARM_TLS_DESC", /* name */
277 FALSE
, /* partial_inplace */
278 0xffffffff, /* src_mask */
279 0xffffffff, /* dst_mask */
280 FALSE
), /* pcrel_offset */
282 HOWTO (R_ARM_THM_SWI8
, /* type */
284 0, /* size (0 = byte, 1 = short, 2 = long) */
286 FALSE
, /* pc_relative */
288 complain_overflow_signed
,/* complain_on_overflow */
289 bfd_elf_generic_reloc
, /* special_function */
290 "R_ARM_SWI8", /* name */
291 FALSE
, /* partial_inplace */
292 0x00000000, /* src_mask */
293 0x00000000, /* dst_mask */
294 FALSE
), /* pcrel_offset */
296 /* BLX instruction for the ARM. */
297 HOWTO (R_ARM_XPC25
, /* type */
299 2, /* size (0 = byte, 1 = short, 2 = long) */
301 TRUE
, /* pc_relative */
303 complain_overflow_signed
,/* complain_on_overflow */
304 bfd_elf_generic_reloc
, /* special_function */
305 "R_ARM_XPC25", /* name */
306 FALSE
, /* partial_inplace */
307 0x00ffffff, /* src_mask */
308 0x00ffffff, /* dst_mask */
309 TRUE
), /* pcrel_offset */
311 /* BLX instruction for the Thumb. */
312 HOWTO (R_ARM_THM_XPC22
, /* type */
314 2, /* size (0 = byte, 1 = short, 2 = long) */
316 TRUE
, /* pc_relative */
318 complain_overflow_signed
,/* complain_on_overflow */
319 bfd_elf_generic_reloc
, /* special_function */
320 "R_ARM_THM_XPC22", /* name */
321 FALSE
, /* partial_inplace */
322 0x07ff2fff, /* src_mask */
323 0x07ff2fff, /* dst_mask */
324 TRUE
), /* pcrel_offset */
326 /* Dynamic TLS relocations. */
328 HOWTO (R_ARM_TLS_DTPMOD32
, /* type */
330 2, /* size (0 = byte, 1 = short, 2 = long) */
332 FALSE
, /* pc_relative */
334 complain_overflow_bitfield
,/* complain_on_overflow */
335 bfd_elf_generic_reloc
, /* special_function */
336 "R_ARM_TLS_DTPMOD32", /* name */
337 TRUE
, /* partial_inplace */
338 0xffffffff, /* src_mask */
339 0xffffffff, /* dst_mask */
340 FALSE
), /* pcrel_offset */
342 HOWTO (R_ARM_TLS_DTPOFF32
, /* type */
344 2, /* size (0 = byte, 1 = short, 2 = long) */
346 FALSE
, /* pc_relative */
348 complain_overflow_bitfield
,/* complain_on_overflow */
349 bfd_elf_generic_reloc
, /* special_function */
350 "R_ARM_TLS_DTPOFF32", /* name */
351 TRUE
, /* partial_inplace */
352 0xffffffff, /* src_mask */
353 0xffffffff, /* dst_mask */
354 FALSE
), /* pcrel_offset */
356 HOWTO (R_ARM_TLS_TPOFF32
, /* type */
358 2, /* size (0 = byte, 1 = short, 2 = long) */
360 FALSE
, /* pc_relative */
362 complain_overflow_bitfield
,/* complain_on_overflow */
363 bfd_elf_generic_reloc
, /* special_function */
364 "R_ARM_TLS_TPOFF32", /* name */
365 TRUE
, /* partial_inplace */
366 0xffffffff, /* src_mask */
367 0xffffffff, /* dst_mask */
368 FALSE
), /* pcrel_offset */
370 /* Relocs used in ARM Linux */
372 HOWTO (R_ARM_COPY
, /* type */
374 2, /* size (0 = byte, 1 = short, 2 = long) */
376 FALSE
, /* pc_relative */
378 complain_overflow_bitfield
,/* complain_on_overflow */
379 bfd_elf_generic_reloc
, /* special_function */
380 "R_ARM_COPY", /* name */
381 TRUE
, /* partial_inplace */
382 0xffffffff, /* src_mask */
383 0xffffffff, /* dst_mask */
384 FALSE
), /* pcrel_offset */
386 HOWTO (R_ARM_GLOB_DAT
, /* type */
388 2, /* size (0 = byte, 1 = short, 2 = long) */
390 FALSE
, /* pc_relative */
392 complain_overflow_bitfield
,/* complain_on_overflow */
393 bfd_elf_generic_reloc
, /* special_function */
394 "R_ARM_GLOB_DAT", /* name */
395 TRUE
, /* partial_inplace */
396 0xffffffff, /* src_mask */
397 0xffffffff, /* dst_mask */
398 FALSE
), /* pcrel_offset */
400 HOWTO (R_ARM_JUMP_SLOT
, /* type */
402 2, /* size (0 = byte, 1 = short, 2 = long) */
404 FALSE
, /* pc_relative */
406 complain_overflow_bitfield
,/* complain_on_overflow */
407 bfd_elf_generic_reloc
, /* special_function */
408 "R_ARM_JUMP_SLOT", /* name */
409 TRUE
, /* partial_inplace */
410 0xffffffff, /* src_mask */
411 0xffffffff, /* dst_mask */
412 FALSE
), /* pcrel_offset */
414 HOWTO (R_ARM_RELATIVE
, /* type */
416 2, /* size (0 = byte, 1 = short, 2 = long) */
418 FALSE
, /* pc_relative */
420 complain_overflow_bitfield
,/* complain_on_overflow */
421 bfd_elf_generic_reloc
, /* special_function */
422 "R_ARM_RELATIVE", /* name */
423 TRUE
, /* partial_inplace */
424 0xffffffff, /* src_mask */
425 0xffffffff, /* dst_mask */
426 FALSE
), /* pcrel_offset */
428 HOWTO (R_ARM_GOTOFF32
, /* type */
430 2, /* size (0 = byte, 1 = short, 2 = long) */
432 FALSE
, /* pc_relative */
434 complain_overflow_bitfield
,/* complain_on_overflow */
435 bfd_elf_generic_reloc
, /* special_function */
436 "R_ARM_GOTOFF32", /* name */
437 TRUE
, /* partial_inplace */
438 0xffffffff, /* src_mask */
439 0xffffffff, /* dst_mask */
440 FALSE
), /* pcrel_offset */
442 HOWTO (R_ARM_GOTPC
, /* type */
444 2, /* size (0 = byte, 1 = short, 2 = long) */
446 TRUE
, /* pc_relative */
448 complain_overflow_bitfield
,/* complain_on_overflow */
449 bfd_elf_generic_reloc
, /* special_function */
450 "R_ARM_GOTPC", /* name */
451 TRUE
, /* partial_inplace */
452 0xffffffff, /* src_mask */
453 0xffffffff, /* dst_mask */
454 TRUE
), /* pcrel_offset */
456 HOWTO (R_ARM_GOT32
, /* type */
458 2, /* size (0 = byte, 1 = short, 2 = long) */
460 FALSE
, /* pc_relative */
462 complain_overflow_bitfield
,/* complain_on_overflow */
463 bfd_elf_generic_reloc
, /* special_function */
464 "R_ARM_GOT32", /* name */
465 TRUE
, /* partial_inplace */
466 0xffffffff, /* src_mask */
467 0xffffffff, /* dst_mask */
468 FALSE
), /* pcrel_offset */
470 HOWTO (R_ARM_PLT32
, /* type */
472 2, /* size (0 = byte, 1 = short, 2 = long) */
474 TRUE
, /* pc_relative */
476 complain_overflow_bitfield
,/* complain_on_overflow */
477 bfd_elf_generic_reloc
, /* special_function */
478 "R_ARM_PLT32", /* name */
479 FALSE
, /* partial_inplace */
480 0x00ffffff, /* src_mask */
481 0x00ffffff, /* dst_mask */
482 TRUE
), /* pcrel_offset */
484 HOWTO (R_ARM_CALL
, /* type */
486 2, /* size (0 = byte, 1 = short, 2 = long) */
488 TRUE
, /* pc_relative */
490 complain_overflow_signed
,/* complain_on_overflow */
491 bfd_elf_generic_reloc
, /* special_function */
492 "R_ARM_CALL", /* name */
493 FALSE
, /* partial_inplace */
494 0x00ffffff, /* src_mask */
495 0x00ffffff, /* dst_mask */
496 TRUE
), /* pcrel_offset */
498 HOWTO (R_ARM_JUMP24
, /* type */
500 2, /* size (0 = byte, 1 = short, 2 = long) */
502 TRUE
, /* pc_relative */
504 complain_overflow_signed
,/* complain_on_overflow */
505 bfd_elf_generic_reloc
, /* special_function */
506 "R_ARM_JUMP24", /* name */
507 FALSE
, /* partial_inplace */
508 0x00ffffff, /* src_mask */
509 0x00ffffff, /* dst_mask */
510 TRUE
), /* pcrel_offset */
512 HOWTO (R_ARM_THM_JUMP24
, /* type */
514 2, /* size (0 = byte, 1 = short, 2 = long) */
516 TRUE
, /* pc_relative */
518 complain_overflow_signed
,/* complain_on_overflow */
519 bfd_elf_generic_reloc
, /* special_function */
520 "R_ARM_THM_JUMP24", /* name */
521 FALSE
, /* partial_inplace */
522 0x07ff2fff, /* src_mask */
523 0x07ff2fff, /* dst_mask */
524 TRUE
), /* pcrel_offset */
526 HOWTO (R_ARM_BASE_ABS
, /* type */
528 2, /* size (0 = byte, 1 = short, 2 = long) */
530 FALSE
, /* pc_relative */
532 complain_overflow_dont
,/* complain_on_overflow */
533 bfd_elf_generic_reloc
, /* special_function */
534 "R_ARM_BASE_ABS", /* name */
535 FALSE
, /* partial_inplace */
536 0xffffffff, /* src_mask */
537 0xffffffff, /* dst_mask */
538 FALSE
), /* pcrel_offset */
540 HOWTO (R_ARM_ALU_PCREL7_0
, /* type */
542 2, /* size (0 = byte, 1 = short, 2 = long) */
544 TRUE
, /* pc_relative */
546 complain_overflow_dont
,/* complain_on_overflow */
547 bfd_elf_generic_reloc
, /* special_function */
548 "R_ARM_ALU_PCREL_7_0", /* name */
549 FALSE
, /* partial_inplace */
550 0x00000fff, /* src_mask */
551 0x00000fff, /* dst_mask */
552 TRUE
), /* pcrel_offset */
554 HOWTO (R_ARM_ALU_PCREL15_8
, /* type */
556 2, /* size (0 = byte, 1 = short, 2 = long) */
558 TRUE
, /* pc_relative */
560 complain_overflow_dont
,/* complain_on_overflow */
561 bfd_elf_generic_reloc
, /* special_function */
562 "R_ARM_ALU_PCREL_15_8",/* name */
563 FALSE
, /* partial_inplace */
564 0x00000fff, /* src_mask */
565 0x00000fff, /* dst_mask */
566 TRUE
), /* pcrel_offset */
568 HOWTO (R_ARM_ALU_PCREL23_15
, /* type */
570 2, /* size (0 = byte, 1 = short, 2 = long) */
572 TRUE
, /* pc_relative */
574 complain_overflow_dont
,/* complain_on_overflow */
575 bfd_elf_generic_reloc
, /* special_function */
576 "R_ARM_ALU_PCREL_23_15",/* name */
577 FALSE
, /* partial_inplace */
578 0x00000fff, /* src_mask */
579 0x00000fff, /* dst_mask */
580 TRUE
), /* pcrel_offset */
582 HOWTO (R_ARM_LDR_SBREL_11_0
, /* type */
584 2, /* size (0 = byte, 1 = short, 2 = long) */
586 FALSE
, /* pc_relative */
588 complain_overflow_dont
,/* complain_on_overflow */
589 bfd_elf_generic_reloc
, /* special_function */
590 "R_ARM_LDR_SBREL_11_0",/* name */
591 FALSE
, /* partial_inplace */
592 0x00000fff, /* src_mask */
593 0x00000fff, /* dst_mask */
594 FALSE
), /* pcrel_offset */
596 HOWTO (R_ARM_ALU_SBREL_19_12
, /* type */
598 2, /* size (0 = byte, 1 = short, 2 = long) */
600 FALSE
, /* pc_relative */
602 complain_overflow_dont
,/* complain_on_overflow */
603 bfd_elf_generic_reloc
, /* special_function */
604 "R_ARM_ALU_SBREL_19_12",/* name */
605 FALSE
, /* partial_inplace */
606 0x000ff000, /* src_mask */
607 0x000ff000, /* dst_mask */
608 FALSE
), /* pcrel_offset */
610 HOWTO (R_ARM_ALU_SBREL_27_20
, /* type */
612 2, /* size (0 = byte, 1 = short, 2 = long) */
614 FALSE
, /* pc_relative */
616 complain_overflow_dont
,/* complain_on_overflow */
617 bfd_elf_generic_reloc
, /* special_function */
618 "R_ARM_ALU_SBREL_27_20",/* name */
619 FALSE
, /* partial_inplace */
620 0x0ff00000, /* src_mask */
621 0x0ff00000, /* dst_mask */
622 FALSE
), /* pcrel_offset */
624 HOWTO (R_ARM_TARGET1
, /* type */
626 2, /* size (0 = byte, 1 = short, 2 = long) */
628 FALSE
, /* pc_relative */
630 complain_overflow_dont
,/* complain_on_overflow */
631 bfd_elf_generic_reloc
, /* special_function */
632 "R_ARM_TARGET1", /* name */
633 FALSE
, /* partial_inplace */
634 0xffffffff, /* src_mask */
635 0xffffffff, /* dst_mask */
636 FALSE
), /* pcrel_offset */
638 HOWTO (R_ARM_ROSEGREL32
, /* type */
640 2, /* size (0 = byte, 1 = short, 2 = long) */
642 FALSE
, /* pc_relative */
644 complain_overflow_dont
,/* complain_on_overflow */
645 bfd_elf_generic_reloc
, /* special_function */
646 "R_ARM_ROSEGREL32", /* name */
647 FALSE
, /* partial_inplace */
648 0xffffffff, /* src_mask */
649 0xffffffff, /* dst_mask */
650 FALSE
), /* pcrel_offset */
652 HOWTO (R_ARM_V4BX
, /* type */
654 2, /* size (0 = byte, 1 = short, 2 = long) */
656 FALSE
, /* pc_relative */
658 complain_overflow_dont
,/* complain_on_overflow */
659 bfd_elf_generic_reloc
, /* special_function */
660 "R_ARM_V4BX", /* name */
661 FALSE
, /* partial_inplace */
662 0xffffffff, /* src_mask */
663 0xffffffff, /* dst_mask */
664 FALSE
), /* pcrel_offset */
666 HOWTO (R_ARM_TARGET2
, /* type */
668 2, /* size (0 = byte, 1 = short, 2 = long) */
670 FALSE
, /* pc_relative */
672 complain_overflow_signed
,/* complain_on_overflow */
673 bfd_elf_generic_reloc
, /* special_function */
674 "R_ARM_TARGET2", /* name */
675 FALSE
, /* partial_inplace */
676 0xffffffff, /* src_mask */
677 0xffffffff, /* dst_mask */
678 TRUE
), /* pcrel_offset */
680 HOWTO (R_ARM_PREL31
, /* type */
682 2, /* size (0 = byte, 1 = short, 2 = long) */
684 TRUE
, /* pc_relative */
686 complain_overflow_signed
,/* complain_on_overflow */
687 bfd_elf_generic_reloc
, /* special_function */
688 "R_ARM_PREL31", /* name */
689 FALSE
, /* partial_inplace */
690 0x7fffffff, /* src_mask */
691 0x7fffffff, /* dst_mask */
692 TRUE
), /* pcrel_offset */
694 HOWTO (R_ARM_MOVW_ABS_NC
, /* type */
696 2, /* size (0 = byte, 1 = short, 2 = long) */
698 FALSE
, /* pc_relative */
700 complain_overflow_dont
,/* complain_on_overflow */
701 bfd_elf_generic_reloc
, /* special_function */
702 "R_ARM_MOVW_ABS_NC", /* name */
703 FALSE
, /* partial_inplace */
704 0x000f0fff, /* src_mask */
705 0x000f0fff, /* dst_mask */
706 FALSE
), /* pcrel_offset */
708 HOWTO (R_ARM_MOVT_ABS
, /* type */
710 2, /* size (0 = byte, 1 = short, 2 = long) */
712 FALSE
, /* pc_relative */
714 complain_overflow_bitfield
,/* complain_on_overflow */
715 bfd_elf_generic_reloc
, /* special_function */
716 "R_ARM_MOVT_ABS", /* name */
717 FALSE
, /* partial_inplace */
718 0x000f0fff, /* src_mask */
719 0x000f0fff, /* dst_mask */
720 FALSE
), /* pcrel_offset */
722 HOWTO (R_ARM_MOVW_PREL_NC
, /* type */
724 2, /* size (0 = byte, 1 = short, 2 = long) */
726 TRUE
, /* pc_relative */
728 complain_overflow_dont
,/* complain_on_overflow */
729 bfd_elf_generic_reloc
, /* special_function */
730 "R_ARM_MOVW_PREL_NC", /* name */
731 FALSE
, /* partial_inplace */
732 0x000f0fff, /* src_mask */
733 0x000f0fff, /* dst_mask */
734 TRUE
), /* pcrel_offset */
736 HOWTO (R_ARM_MOVT_PREL
, /* type */
738 2, /* size (0 = byte, 1 = short, 2 = long) */
740 TRUE
, /* pc_relative */
742 complain_overflow_bitfield
,/* complain_on_overflow */
743 bfd_elf_generic_reloc
, /* special_function */
744 "R_ARM_MOVT_PREL", /* name */
745 FALSE
, /* partial_inplace */
746 0x000f0fff, /* src_mask */
747 0x000f0fff, /* dst_mask */
748 TRUE
), /* pcrel_offset */
750 HOWTO (R_ARM_THM_MOVW_ABS_NC
, /* type */
752 2, /* size (0 = byte, 1 = short, 2 = long) */
754 FALSE
, /* pc_relative */
756 complain_overflow_dont
,/* complain_on_overflow */
757 bfd_elf_generic_reloc
, /* special_function */
758 "R_ARM_THM_MOVW_ABS_NC",/* name */
759 FALSE
, /* partial_inplace */
760 0x040f70ff, /* src_mask */
761 0x040f70ff, /* dst_mask */
762 FALSE
), /* pcrel_offset */
764 HOWTO (R_ARM_THM_MOVT_ABS
, /* type */
766 2, /* size (0 = byte, 1 = short, 2 = long) */
768 FALSE
, /* pc_relative */
770 complain_overflow_bitfield
,/* complain_on_overflow */
771 bfd_elf_generic_reloc
, /* special_function */
772 "R_ARM_THM_MOVT_ABS", /* name */
773 FALSE
, /* partial_inplace */
774 0x040f70ff, /* src_mask */
775 0x040f70ff, /* dst_mask */
776 FALSE
), /* pcrel_offset */
778 HOWTO (R_ARM_THM_MOVW_PREL_NC
,/* type */
780 2, /* size (0 = byte, 1 = short, 2 = long) */
782 TRUE
, /* pc_relative */
784 complain_overflow_dont
,/* complain_on_overflow */
785 bfd_elf_generic_reloc
, /* special_function */
786 "R_ARM_THM_MOVW_PREL_NC",/* name */
787 FALSE
, /* partial_inplace */
788 0x040f70ff, /* src_mask */
789 0x040f70ff, /* dst_mask */
790 TRUE
), /* pcrel_offset */
792 HOWTO (R_ARM_THM_MOVT_PREL
, /* type */
794 2, /* size (0 = byte, 1 = short, 2 = long) */
796 TRUE
, /* pc_relative */
798 complain_overflow_bitfield
,/* complain_on_overflow */
799 bfd_elf_generic_reloc
, /* special_function */
800 "R_ARM_THM_MOVT_PREL", /* name */
801 FALSE
, /* partial_inplace */
802 0x040f70ff, /* src_mask */
803 0x040f70ff, /* dst_mask */
804 TRUE
), /* pcrel_offset */
806 HOWTO (R_ARM_THM_JUMP19
, /* type */
808 2, /* size (0 = byte, 1 = short, 2 = long) */
810 TRUE
, /* pc_relative */
812 complain_overflow_signed
,/* complain_on_overflow */
813 bfd_elf_generic_reloc
, /* special_function */
814 "R_ARM_THM_JUMP19", /* name */
815 FALSE
, /* partial_inplace */
816 0x043f2fff, /* src_mask */
817 0x043f2fff, /* dst_mask */
818 TRUE
), /* pcrel_offset */
820 HOWTO (R_ARM_THM_JUMP6
, /* type */
822 1, /* size (0 = byte, 1 = short, 2 = long) */
824 TRUE
, /* pc_relative */
826 complain_overflow_unsigned
,/* complain_on_overflow */
827 bfd_elf_generic_reloc
, /* special_function */
828 "R_ARM_THM_JUMP6", /* name */
829 FALSE
, /* partial_inplace */
830 0x02f8, /* src_mask */
831 0x02f8, /* dst_mask */
832 TRUE
), /* pcrel_offset */
834 /* These are declared as 13-bit signed relocations because we can
835 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
837 HOWTO (R_ARM_THM_ALU_PREL_11_0
,/* type */
839 2, /* size (0 = byte, 1 = short, 2 = long) */
841 TRUE
, /* pc_relative */
843 complain_overflow_dont
,/* complain_on_overflow */
844 bfd_elf_generic_reloc
, /* special_function */
845 "R_ARM_THM_ALU_PREL_11_0",/* name */
846 FALSE
, /* partial_inplace */
847 0xffffffff, /* src_mask */
848 0xffffffff, /* dst_mask */
849 TRUE
), /* pcrel_offset */
851 HOWTO (R_ARM_THM_PC12
, /* type */
853 2, /* size (0 = byte, 1 = short, 2 = long) */
855 TRUE
, /* pc_relative */
857 complain_overflow_dont
,/* complain_on_overflow */
858 bfd_elf_generic_reloc
, /* special_function */
859 "R_ARM_THM_PC12", /* name */
860 FALSE
, /* partial_inplace */
861 0xffffffff, /* src_mask */
862 0xffffffff, /* dst_mask */
863 TRUE
), /* pcrel_offset */
865 HOWTO (R_ARM_ABS32_NOI
, /* type */
867 2, /* size (0 = byte, 1 = short, 2 = long) */
869 FALSE
, /* pc_relative */
871 complain_overflow_dont
,/* complain_on_overflow */
872 bfd_elf_generic_reloc
, /* special_function */
873 "R_ARM_ABS32_NOI", /* name */
874 FALSE
, /* partial_inplace */
875 0xffffffff, /* src_mask */
876 0xffffffff, /* dst_mask */
877 FALSE
), /* pcrel_offset */
879 HOWTO (R_ARM_REL32_NOI
, /* type */
881 2, /* size (0 = byte, 1 = short, 2 = long) */
883 TRUE
, /* pc_relative */
885 complain_overflow_dont
,/* complain_on_overflow */
886 bfd_elf_generic_reloc
, /* special_function */
887 "R_ARM_REL32_NOI", /* name */
888 FALSE
, /* partial_inplace */
889 0xffffffff, /* src_mask */
890 0xffffffff, /* dst_mask */
891 FALSE
), /* pcrel_offset */
893 /* Group relocations. */
895 HOWTO (R_ARM_ALU_PC_G0_NC
, /* type */
897 2, /* size (0 = byte, 1 = short, 2 = long) */
899 TRUE
, /* pc_relative */
901 complain_overflow_dont
,/* complain_on_overflow */
902 bfd_elf_generic_reloc
, /* special_function */
903 "R_ARM_ALU_PC_G0_NC", /* name */
904 FALSE
, /* partial_inplace */
905 0xffffffff, /* src_mask */
906 0xffffffff, /* dst_mask */
907 TRUE
), /* pcrel_offset */
909 HOWTO (R_ARM_ALU_PC_G0
, /* type */
911 2, /* size (0 = byte, 1 = short, 2 = long) */
913 TRUE
, /* pc_relative */
915 complain_overflow_dont
,/* complain_on_overflow */
916 bfd_elf_generic_reloc
, /* special_function */
917 "R_ARM_ALU_PC_G0", /* name */
918 FALSE
, /* partial_inplace */
919 0xffffffff, /* src_mask */
920 0xffffffff, /* dst_mask */
921 TRUE
), /* pcrel_offset */
923 HOWTO (R_ARM_ALU_PC_G1_NC
, /* type */
925 2, /* size (0 = byte, 1 = short, 2 = long) */
927 TRUE
, /* pc_relative */
929 complain_overflow_dont
,/* complain_on_overflow */
930 bfd_elf_generic_reloc
, /* special_function */
931 "R_ARM_ALU_PC_G1_NC", /* name */
932 FALSE
, /* partial_inplace */
933 0xffffffff, /* src_mask */
934 0xffffffff, /* dst_mask */
935 TRUE
), /* pcrel_offset */
937 HOWTO (R_ARM_ALU_PC_G1
, /* type */
939 2, /* size (0 = byte, 1 = short, 2 = long) */
941 TRUE
, /* pc_relative */
943 complain_overflow_dont
,/* complain_on_overflow */
944 bfd_elf_generic_reloc
, /* special_function */
945 "R_ARM_ALU_PC_G1", /* name */
946 FALSE
, /* partial_inplace */
947 0xffffffff, /* src_mask */
948 0xffffffff, /* dst_mask */
949 TRUE
), /* pcrel_offset */
951 HOWTO (R_ARM_ALU_PC_G2
, /* type */
953 2, /* size (0 = byte, 1 = short, 2 = long) */
955 TRUE
, /* pc_relative */
957 complain_overflow_dont
,/* complain_on_overflow */
958 bfd_elf_generic_reloc
, /* special_function */
959 "R_ARM_ALU_PC_G2", /* name */
960 FALSE
, /* partial_inplace */
961 0xffffffff, /* src_mask */
962 0xffffffff, /* dst_mask */
963 TRUE
), /* pcrel_offset */
965 HOWTO (R_ARM_LDR_PC_G1
, /* type */
967 2, /* size (0 = byte, 1 = short, 2 = long) */
969 TRUE
, /* pc_relative */
971 complain_overflow_dont
,/* complain_on_overflow */
972 bfd_elf_generic_reloc
, /* special_function */
973 "R_ARM_LDR_PC_G1", /* name */
974 FALSE
, /* partial_inplace */
975 0xffffffff, /* src_mask */
976 0xffffffff, /* dst_mask */
977 TRUE
), /* pcrel_offset */
979 HOWTO (R_ARM_LDR_PC_G2
, /* type */
981 2, /* size (0 = byte, 1 = short, 2 = long) */
983 TRUE
, /* pc_relative */
985 complain_overflow_dont
,/* complain_on_overflow */
986 bfd_elf_generic_reloc
, /* special_function */
987 "R_ARM_LDR_PC_G2", /* name */
988 FALSE
, /* partial_inplace */
989 0xffffffff, /* src_mask */
990 0xffffffff, /* dst_mask */
991 TRUE
), /* pcrel_offset */
993 HOWTO (R_ARM_LDRS_PC_G0
, /* type */
995 2, /* size (0 = byte, 1 = short, 2 = long) */
997 TRUE
, /* pc_relative */
999 complain_overflow_dont
,/* complain_on_overflow */
1000 bfd_elf_generic_reloc
, /* special_function */
1001 "R_ARM_LDRS_PC_G0", /* name */
1002 FALSE
, /* partial_inplace */
1003 0xffffffff, /* src_mask */
1004 0xffffffff, /* dst_mask */
1005 TRUE
), /* pcrel_offset */
1007 HOWTO (R_ARM_LDRS_PC_G1
, /* type */
1009 2, /* size (0 = byte, 1 = short, 2 = long) */
1011 TRUE
, /* pc_relative */
1013 complain_overflow_dont
,/* complain_on_overflow */
1014 bfd_elf_generic_reloc
, /* special_function */
1015 "R_ARM_LDRS_PC_G1", /* name */
1016 FALSE
, /* partial_inplace */
1017 0xffffffff, /* src_mask */
1018 0xffffffff, /* dst_mask */
1019 TRUE
), /* pcrel_offset */
1021 HOWTO (R_ARM_LDRS_PC_G2
, /* type */
1023 2, /* size (0 = byte, 1 = short, 2 = long) */
1025 TRUE
, /* pc_relative */
1027 complain_overflow_dont
,/* complain_on_overflow */
1028 bfd_elf_generic_reloc
, /* special_function */
1029 "R_ARM_LDRS_PC_G2", /* name */
1030 FALSE
, /* partial_inplace */
1031 0xffffffff, /* src_mask */
1032 0xffffffff, /* dst_mask */
1033 TRUE
), /* pcrel_offset */
1035 HOWTO (R_ARM_LDC_PC_G0
, /* type */
1037 2, /* size (0 = byte, 1 = short, 2 = long) */
1039 TRUE
, /* pc_relative */
1041 complain_overflow_dont
,/* complain_on_overflow */
1042 bfd_elf_generic_reloc
, /* special_function */
1043 "R_ARM_LDC_PC_G0", /* name */
1044 FALSE
, /* partial_inplace */
1045 0xffffffff, /* src_mask */
1046 0xffffffff, /* dst_mask */
1047 TRUE
), /* pcrel_offset */
1049 HOWTO (R_ARM_LDC_PC_G1
, /* type */
1051 2, /* size (0 = byte, 1 = short, 2 = long) */
1053 TRUE
, /* pc_relative */
1055 complain_overflow_dont
,/* complain_on_overflow */
1056 bfd_elf_generic_reloc
, /* special_function */
1057 "R_ARM_LDC_PC_G1", /* name */
1058 FALSE
, /* partial_inplace */
1059 0xffffffff, /* src_mask */
1060 0xffffffff, /* dst_mask */
1061 TRUE
), /* pcrel_offset */
1063 HOWTO (R_ARM_LDC_PC_G2
, /* type */
1065 2, /* size (0 = byte, 1 = short, 2 = long) */
1067 TRUE
, /* pc_relative */
1069 complain_overflow_dont
,/* complain_on_overflow */
1070 bfd_elf_generic_reloc
, /* special_function */
1071 "R_ARM_LDC_PC_G2", /* name */
1072 FALSE
, /* partial_inplace */
1073 0xffffffff, /* src_mask */
1074 0xffffffff, /* dst_mask */
1075 TRUE
), /* pcrel_offset */
1077 HOWTO (R_ARM_ALU_SB_G0_NC
, /* type */
1079 2, /* size (0 = byte, 1 = short, 2 = long) */
1081 TRUE
, /* pc_relative */
1083 complain_overflow_dont
,/* complain_on_overflow */
1084 bfd_elf_generic_reloc
, /* special_function */
1085 "R_ARM_ALU_SB_G0_NC", /* name */
1086 FALSE
, /* partial_inplace */
1087 0xffffffff, /* src_mask */
1088 0xffffffff, /* dst_mask */
1089 TRUE
), /* pcrel_offset */
1091 HOWTO (R_ARM_ALU_SB_G0
, /* type */
1093 2, /* size (0 = byte, 1 = short, 2 = long) */
1095 TRUE
, /* pc_relative */
1097 complain_overflow_dont
,/* complain_on_overflow */
1098 bfd_elf_generic_reloc
, /* special_function */
1099 "R_ARM_ALU_SB_G0", /* name */
1100 FALSE
, /* partial_inplace */
1101 0xffffffff, /* src_mask */
1102 0xffffffff, /* dst_mask */
1103 TRUE
), /* pcrel_offset */
1105 HOWTO (R_ARM_ALU_SB_G1_NC
, /* type */
1107 2, /* size (0 = byte, 1 = short, 2 = long) */
1109 TRUE
, /* pc_relative */
1111 complain_overflow_dont
,/* complain_on_overflow */
1112 bfd_elf_generic_reloc
, /* special_function */
1113 "R_ARM_ALU_SB_G1_NC", /* name */
1114 FALSE
, /* partial_inplace */
1115 0xffffffff, /* src_mask */
1116 0xffffffff, /* dst_mask */
1117 TRUE
), /* pcrel_offset */
1119 HOWTO (R_ARM_ALU_SB_G1
, /* type */
1121 2, /* size (0 = byte, 1 = short, 2 = long) */
1123 TRUE
, /* pc_relative */
1125 complain_overflow_dont
,/* complain_on_overflow */
1126 bfd_elf_generic_reloc
, /* special_function */
1127 "R_ARM_ALU_SB_G1", /* name */
1128 FALSE
, /* partial_inplace */
1129 0xffffffff, /* src_mask */
1130 0xffffffff, /* dst_mask */
1131 TRUE
), /* pcrel_offset */
1133 HOWTO (R_ARM_ALU_SB_G2
, /* type */
1135 2, /* size (0 = byte, 1 = short, 2 = long) */
1137 TRUE
, /* pc_relative */
1139 complain_overflow_dont
,/* complain_on_overflow */
1140 bfd_elf_generic_reloc
, /* special_function */
1141 "R_ARM_ALU_SB_G2", /* name */
1142 FALSE
, /* partial_inplace */
1143 0xffffffff, /* src_mask */
1144 0xffffffff, /* dst_mask */
1145 TRUE
), /* pcrel_offset */
1147 HOWTO (R_ARM_LDR_SB_G0
, /* type */
1149 2, /* size (0 = byte, 1 = short, 2 = long) */
1151 TRUE
, /* pc_relative */
1153 complain_overflow_dont
,/* complain_on_overflow */
1154 bfd_elf_generic_reloc
, /* special_function */
1155 "R_ARM_LDR_SB_G0", /* name */
1156 FALSE
, /* partial_inplace */
1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
1159 TRUE
), /* pcrel_offset */
1161 HOWTO (R_ARM_LDR_SB_G1
, /* type */
1163 2, /* size (0 = byte, 1 = short, 2 = long) */
1165 TRUE
, /* pc_relative */
1167 complain_overflow_dont
,/* complain_on_overflow */
1168 bfd_elf_generic_reloc
, /* special_function */
1169 "R_ARM_LDR_SB_G1", /* name */
1170 FALSE
, /* partial_inplace */
1171 0xffffffff, /* src_mask */
1172 0xffffffff, /* dst_mask */
1173 TRUE
), /* pcrel_offset */
1175 HOWTO (R_ARM_LDR_SB_G2
, /* type */
1177 2, /* size (0 = byte, 1 = short, 2 = long) */
1179 TRUE
, /* pc_relative */
1181 complain_overflow_dont
,/* complain_on_overflow */
1182 bfd_elf_generic_reloc
, /* special_function */
1183 "R_ARM_LDR_SB_G2", /* name */
1184 FALSE
, /* partial_inplace */
1185 0xffffffff, /* src_mask */
1186 0xffffffff, /* dst_mask */
1187 TRUE
), /* pcrel_offset */
1189 HOWTO (R_ARM_LDRS_SB_G0
, /* type */
1191 2, /* size (0 = byte, 1 = short, 2 = long) */
1193 TRUE
, /* pc_relative */
1195 complain_overflow_dont
,/* complain_on_overflow */
1196 bfd_elf_generic_reloc
, /* special_function */
1197 "R_ARM_LDRS_SB_G0", /* name */
1198 FALSE
, /* partial_inplace */
1199 0xffffffff, /* src_mask */
1200 0xffffffff, /* dst_mask */
1201 TRUE
), /* pcrel_offset */
1203 HOWTO (R_ARM_LDRS_SB_G1
, /* type */
1205 2, /* size (0 = byte, 1 = short, 2 = long) */
1207 TRUE
, /* pc_relative */
1209 complain_overflow_dont
,/* complain_on_overflow */
1210 bfd_elf_generic_reloc
, /* special_function */
1211 "R_ARM_LDRS_SB_G1", /* name */
1212 FALSE
, /* partial_inplace */
1213 0xffffffff, /* src_mask */
1214 0xffffffff, /* dst_mask */
1215 TRUE
), /* pcrel_offset */
1217 HOWTO (R_ARM_LDRS_SB_G2
, /* type */
1219 2, /* size (0 = byte, 1 = short, 2 = long) */
1221 TRUE
, /* pc_relative */
1223 complain_overflow_dont
,/* complain_on_overflow */
1224 bfd_elf_generic_reloc
, /* special_function */
1225 "R_ARM_LDRS_SB_G2", /* name */
1226 FALSE
, /* partial_inplace */
1227 0xffffffff, /* src_mask */
1228 0xffffffff, /* dst_mask */
1229 TRUE
), /* pcrel_offset */
1231 HOWTO (R_ARM_LDC_SB_G0
, /* type */
1233 2, /* size (0 = byte, 1 = short, 2 = long) */
1235 TRUE
, /* pc_relative */
1237 complain_overflow_dont
,/* complain_on_overflow */
1238 bfd_elf_generic_reloc
, /* special_function */
1239 "R_ARM_LDC_SB_G0", /* name */
1240 FALSE
, /* partial_inplace */
1241 0xffffffff, /* src_mask */
1242 0xffffffff, /* dst_mask */
1243 TRUE
), /* pcrel_offset */
1245 HOWTO (R_ARM_LDC_SB_G1
, /* type */
1247 2, /* size (0 = byte, 1 = short, 2 = long) */
1249 TRUE
, /* pc_relative */
1251 complain_overflow_dont
,/* complain_on_overflow */
1252 bfd_elf_generic_reloc
, /* special_function */
1253 "R_ARM_LDC_SB_G1", /* name */
1254 FALSE
, /* partial_inplace */
1255 0xffffffff, /* src_mask */
1256 0xffffffff, /* dst_mask */
1257 TRUE
), /* pcrel_offset */
1259 HOWTO (R_ARM_LDC_SB_G2
, /* type */
1261 2, /* size (0 = byte, 1 = short, 2 = long) */
1263 TRUE
, /* pc_relative */
1265 complain_overflow_dont
,/* complain_on_overflow */
1266 bfd_elf_generic_reloc
, /* special_function */
1267 "R_ARM_LDC_SB_G2", /* name */
1268 FALSE
, /* partial_inplace */
1269 0xffffffff, /* src_mask */
1270 0xffffffff, /* dst_mask */
1271 TRUE
), /* pcrel_offset */
1273 /* End of group relocations. */
1275 HOWTO (R_ARM_MOVW_BREL_NC
, /* type */
1277 2, /* size (0 = byte, 1 = short, 2 = long) */
1279 FALSE
, /* pc_relative */
1281 complain_overflow_dont
,/* complain_on_overflow */
1282 bfd_elf_generic_reloc
, /* special_function */
1283 "R_ARM_MOVW_BREL_NC", /* name */
1284 FALSE
, /* partial_inplace */
1285 0x0000ffff, /* src_mask */
1286 0x0000ffff, /* dst_mask */
1287 FALSE
), /* pcrel_offset */
1289 HOWTO (R_ARM_MOVT_BREL
, /* type */
1291 2, /* size (0 = byte, 1 = short, 2 = long) */
1293 FALSE
, /* pc_relative */
1295 complain_overflow_bitfield
,/* complain_on_overflow */
1296 bfd_elf_generic_reloc
, /* special_function */
1297 "R_ARM_MOVT_BREL", /* name */
1298 FALSE
, /* partial_inplace */
1299 0x0000ffff, /* src_mask */
1300 0x0000ffff, /* dst_mask */
1301 FALSE
), /* pcrel_offset */
1303 HOWTO (R_ARM_MOVW_BREL
, /* type */
1305 2, /* size (0 = byte, 1 = short, 2 = long) */
1307 FALSE
, /* pc_relative */
1309 complain_overflow_dont
,/* complain_on_overflow */
1310 bfd_elf_generic_reloc
, /* special_function */
1311 "R_ARM_MOVW_BREL", /* name */
1312 FALSE
, /* partial_inplace */
1313 0x0000ffff, /* src_mask */
1314 0x0000ffff, /* dst_mask */
1315 FALSE
), /* pcrel_offset */
1317 HOWTO (R_ARM_THM_MOVW_BREL_NC
,/* type */
1319 2, /* size (0 = byte, 1 = short, 2 = long) */
1321 FALSE
, /* pc_relative */
1323 complain_overflow_dont
,/* complain_on_overflow */
1324 bfd_elf_generic_reloc
, /* special_function */
1325 "R_ARM_THM_MOVW_BREL_NC",/* name */
1326 FALSE
, /* partial_inplace */
1327 0x040f70ff, /* src_mask */
1328 0x040f70ff, /* dst_mask */
1329 FALSE
), /* pcrel_offset */
1331 HOWTO (R_ARM_THM_MOVT_BREL
, /* type */
1333 2, /* size (0 = byte, 1 = short, 2 = long) */
1335 FALSE
, /* pc_relative */
1337 complain_overflow_bitfield
,/* complain_on_overflow */
1338 bfd_elf_generic_reloc
, /* special_function */
1339 "R_ARM_THM_MOVT_BREL", /* name */
1340 FALSE
, /* partial_inplace */
1341 0x040f70ff, /* src_mask */
1342 0x040f70ff, /* dst_mask */
1343 FALSE
), /* pcrel_offset */
1345 HOWTO (R_ARM_THM_MOVW_BREL
, /* type */
1347 2, /* size (0 = byte, 1 = short, 2 = long) */
1349 FALSE
, /* pc_relative */
1351 complain_overflow_dont
,/* complain_on_overflow */
1352 bfd_elf_generic_reloc
, /* special_function */
1353 "R_ARM_THM_MOVW_BREL", /* name */
1354 FALSE
, /* partial_inplace */
1355 0x040f70ff, /* src_mask */
1356 0x040f70ff, /* dst_mask */
1357 FALSE
), /* pcrel_offset */
1359 HOWTO (R_ARM_TLS_GOTDESC
, /* type */
1361 2, /* size (0 = byte, 1 = short, 2 = long) */
1363 FALSE
, /* pc_relative */
1365 complain_overflow_bitfield
,/* complain_on_overflow */
1366 NULL
, /* special_function */
1367 "R_ARM_TLS_GOTDESC", /* name */
1368 TRUE
, /* partial_inplace */
1369 0xffffffff, /* src_mask */
1370 0xffffffff, /* dst_mask */
1371 FALSE
), /* pcrel_offset */
1373 HOWTO (R_ARM_TLS_CALL
, /* type */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1377 FALSE
, /* pc_relative */
1379 complain_overflow_dont
,/* complain_on_overflow */
1380 bfd_elf_generic_reloc
, /* special_function */
1381 "R_ARM_TLS_CALL", /* name */
1382 FALSE
, /* partial_inplace */
1383 0x00ffffff, /* src_mask */
1384 0x00ffffff, /* dst_mask */
1385 FALSE
), /* pcrel_offset */
1387 HOWTO (R_ARM_TLS_DESCSEQ
, /* type */
1389 2, /* size (0 = byte, 1 = short, 2 = long) */
1391 FALSE
, /* pc_relative */
1393 complain_overflow_bitfield
,/* complain_on_overflow */
1394 bfd_elf_generic_reloc
, /* special_function */
1395 "R_ARM_TLS_DESCSEQ", /* name */
1396 FALSE
, /* partial_inplace */
1397 0x00000000, /* src_mask */
1398 0x00000000, /* dst_mask */
1399 FALSE
), /* pcrel_offset */
1401 HOWTO (R_ARM_THM_TLS_CALL
, /* type */
1403 2, /* size (0 = byte, 1 = short, 2 = long) */
1405 FALSE
, /* pc_relative */
1407 complain_overflow_dont
,/* complain_on_overflow */
1408 bfd_elf_generic_reloc
, /* special_function */
1409 "R_ARM_THM_TLS_CALL", /* name */
1410 FALSE
, /* partial_inplace */
1411 0x07ff07ff, /* src_mask */
1412 0x07ff07ff, /* dst_mask */
1413 FALSE
), /* pcrel_offset */
1415 HOWTO (R_ARM_PLT32_ABS
, /* type */
1417 2, /* size (0 = byte, 1 = short, 2 = long) */
1419 FALSE
, /* pc_relative */
1421 complain_overflow_dont
,/* complain_on_overflow */
1422 bfd_elf_generic_reloc
, /* special_function */
1423 "R_ARM_PLT32_ABS", /* name */
1424 FALSE
, /* partial_inplace */
1425 0xffffffff, /* src_mask */
1426 0xffffffff, /* dst_mask */
1427 FALSE
), /* pcrel_offset */
1429 HOWTO (R_ARM_GOT_ABS
, /* type */
1431 2, /* size (0 = byte, 1 = short, 2 = long) */
1433 FALSE
, /* pc_relative */
1435 complain_overflow_dont
,/* complain_on_overflow */
1436 bfd_elf_generic_reloc
, /* special_function */
1437 "R_ARM_GOT_ABS", /* name */
1438 FALSE
, /* partial_inplace */
1439 0xffffffff, /* src_mask */
1440 0xffffffff, /* dst_mask */
1441 FALSE
), /* pcrel_offset */
1443 HOWTO (R_ARM_GOT_PREL
, /* type */
1445 2, /* size (0 = byte, 1 = short, 2 = long) */
1447 TRUE
, /* pc_relative */
1449 complain_overflow_dont
, /* complain_on_overflow */
1450 bfd_elf_generic_reloc
, /* special_function */
1451 "R_ARM_GOT_PREL", /* name */
1452 FALSE
, /* partial_inplace */
1453 0xffffffff, /* src_mask */
1454 0xffffffff, /* dst_mask */
1455 TRUE
), /* pcrel_offset */
1457 HOWTO (R_ARM_GOT_BREL12
, /* type */
1459 2, /* size (0 = byte, 1 = short, 2 = long) */
1461 FALSE
, /* pc_relative */
1463 complain_overflow_bitfield
,/* complain_on_overflow */
1464 bfd_elf_generic_reloc
, /* special_function */
1465 "R_ARM_GOT_BREL12", /* name */
1466 FALSE
, /* partial_inplace */
1467 0x00000fff, /* src_mask */
1468 0x00000fff, /* dst_mask */
1469 FALSE
), /* pcrel_offset */
1471 HOWTO (R_ARM_GOTOFF12
, /* type */
1473 2, /* size (0 = byte, 1 = short, 2 = long) */
1475 FALSE
, /* pc_relative */
1477 complain_overflow_bitfield
,/* complain_on_overflow */
1478 bfd_elf_generic_reloc
, /* special_function */
1479 "R_ARM_GOTOFF12", /* name */
1480 FALSE
, /* partial_inplace */
1481 0x00000fff, /* src_mask */
1482 0x00000fff, /* dst_mask */
1483 FALSE
), /* pcrel_offset */
1485 EMPTY_HOWTO (R_ARM_GOTRELAX
), /* reserved for future GOT-load optimizations */
1487 /* GNU extension to record C++ vtable member usage */
1488 HOWTO (R_ARM_GNU_VTENTRY
, /* type */
1490 2, /* size (0 = byte, 1 = short, 2 = long) */
1492 FALSE
, /* pc_relative */
1494 complain_overflow_dont
, /* complain_on_overflow */
1495 _bfd_elf_rel_vtable_reloc_fn
, /* special_function */
1496 "R_ARM_GNU_VTENTRY", /* name */
1497 FALSE
, /* partial_inplace */
1500 FALSE
), /* pcrel_offset */
1502 /* GNU extension to record C++ vtable hierarchy */
1503 HOWTO (R_ARM_GNU_VTINHERIT
, /* type */
1505 2, /* size (0 = byte, 1 = short, 2 = long) */
1507 FALSE
, /* pc_relative */
1509 complain_overflow_dont
, /* complain_on_overflow */
1510 NULL
, /* special_function */
1511 "R_ARM_GNU_VTINHERIT", /* name */
1512 FALSE
, /* partial_inplace */
1515 FALSE
), /* pcrel_offset */
1517 HOWTO (R_ARM_THM_JUMP11
, /* type */
1519 1, /* size (0 = byte, 1 = short, 2 = long) */
1521 TRUE
, /* pc_relative */
1523 complain_overflow_signed
, /* complain_on_overflow */
1524 bfd_elf_generic_reloc
, /* special_function */
1525 "R_ARM_THM_JUMP11", /* name */
1526 FALSE
, /* partial_inplace */
1527 0x000007ff, /* src_mask */
1528 0x000007ff, /* dst_mask */
1529 TRUE
), /* pcrel_offset */
1531 HOWTO (R_ARM_THM_JUMP8
, /* type */
1533 1, /* size (0 = byte, 1 = short, 2 = long) */
1535 TRUE
, /* pc_relative */
1537 complain_overflow_signed
, /* complain_on_overflow */
1538 bfd_elf_generic_reloc
, /* special_function */
1539 "R_ARM_THM_JUMP8", /* name */
1540 FALSE
, /* partial_inplace */
1541 0x000000ff, /* src_mask */
1542 0x000000ff, /* dst_mask */
1543 TRUE
), /* pcrel_offset */
1545 /* TLS relocations */
1546 HOWTO (R_ARM_TLS_GD32
, /* type */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
1550 FALSE
, /* pc_relative */
1552 complain_overflow_bitfield
,/* complain_on_overflow */
1553 NULL
, /* special_function */
1554 "R_ARM_TLS_GD32", /* name */
1555 TRUE
, /* partial_inplace */
1556 0xffffffff, /* src_mask */
1557 0xffffffff, /* dst_mask */
1558 FALSE
), /* pcrel_offset */
1560 HOWTO (R_ARM_TLS_LDM32
, /* type */
1562 2, /* size (0 = byte, 1 = short, 2 = long) */
1564 FALSE
, /* pc_relative */
1566 complain_overflow_bitfield
,/* complain_on_overflow */
1567 bfd_elf_generic_reloc
, /* special_function */
1568 "R_ARM_TLS_LDM32", /* name */
1569 TRUE
, /* partial_inplace */
1570 0xffffffff, /* src_mask */
1571 0xffffffff, /* dst_mask */
1572 FALSE
), /* pcrel_offset */
1574 HOWTO (R_ARM_TLS_LDO32
, /* type */
1576 2, /* size (0 = byte, 1 = short, 2 = long) */
1578 FALSE
, /* pc_relative */
1580 complain_overflow_bitfield
,/* complain_on_overflow */
1581 bfd_elf_generic_reloc
, /* special_function */
1582 "R_ARM_TLS_LDO32", /* name */
1583 TRUE
, /* partial_inplace */
1584 0xffffffff, /* src_mask */
1585 0xffffffff, /* dst_mask */
1586 FALSE
), /* pcrel_offset */
1588 HOWTO (R_ARM_TLS_IE32
, /* type */
1590 2, /* size (0 = byte, 1 = short, 2 = long) */
1592 FALSE
, /* pc_relative */
1594 complain_overflow_bitfield
,/* complain_on_overflow */
1595 NULL
, /* special_function */
1596 "R_ARM_TLS_IE32", /* name */
1597 TRUE
, /* partial_inplace */
1598 0xffffffff, /* src_mask */
1599 0xffffffff, /* dst_mask */
1600 FALSE
), /* pcrel_offset */
1602 HOWTO (R_ARM_TLS_LE32
, /* type */
1604 2, /* size (0 = byte, 1 = short, 2 = long) */
1606 FALSE
, /* pc_relative */
1608 complain_overflow_bitfield
,/* complain_on_overflow */
1609 NULL
, /* special_function */
1610 "R_ARM_TLS_LE32", /* name */
1611 TRUE
, /* partial_inplace */
1612 0xffffffff, /* src_mask */
1613 0xffffffff, /* dst_mask */
1614 FALSE
), /* pcrel_offset */
1616 HOWTO (R_ARM_TLS_LDO12
, /* type */
1618 2, /* size (0 = byte, 1 = short, 2 = long) */
1620 FALSE
, /* pc_relative */
1622 complain_overflow_bitfield
,/* complain_on_overflow */
1623 bfd_elf_generic_reloc
, /* special_function */
1624 "R_ARM_TLS_LDO12", /* name */
1625 FALSE
, /* partial_inplace */
1626 0x00000fff, /* src_mask */
1627 0x00000fff, /* dst_mask */
1628 FALSE
), /* pcrel_offset */
1630 HOWTO (R_ARM_TLS_LE12
, /* type */
1632 2, /* size (0 = byte, 1 = short, 2 = long) */
1634 FALSE
, /* pc_relative */
1636 complain_overflow_bitfield
,/* complain_on_overflow */
1637 bfd_elf_generic_reloc
, /* special_function */
1638 "R_ARM_TLS_LE12", /* name */
1639 FALSE
, /* partial_inplace */
1640 0x00000fff, /* src_mask */
1641 0x00000fff, /* dst_mask */
1642 FALSE
), /* pcrel_offset */
1644 HOWTO (R_ARM_TLS_IE12GP
, /* type */
1646 2, /* size (0 = byte, 1 = short, 2 = long) */
1648 FALSE
, /* pc_relative */
1650 complain_overflow_bitfield
,/* complain_on_overflow */
1651 bfd_elf_generic_reloc
, /* special_function */
1652 "R_ARM_TLS_IE12GP", /* name */
1653 FALSE
, /* partial_inplace */
1654 0x00000fff, /* src_mask */
1655 0x00000fff, /* dst_mask */
1656 FALSE
), /* pcrel_offset */
1658 /* 112-127 private relocations. */
1676 /* R_ARM_ME_TOO, obsolete. */
1679 HOWTO (R_ARM_THM_TLS_DESCSEQ
, /* type */
1681 1, /* size (0 = byte, 1 = short, 2 = long) */
1683 FALSE
, /* pc_relative */
1685 complain_overflow_bitfield
,/* complain_on_overflow */
1686 bfd_elf_generic_reloc
, /* special_function */
1687 "R_ARM_THM_TLS_DESCSEQ",/* name */
1688 FALSE
, /* partial_inplace */
1689 0x00000000, /* src_mask */
1690 0x00000000, /* dst_mask */
1691 FALSE
), /* pcrel_offset */
1694 HOWTO (R_ARM_THM_ALU_ABS_G0_NC
,/* type. */
1695 0, /* rightshift. */
1696 1, /* size (0 = byte, 1 = short, 2 = long). */
1698 FALSE
, /* pc_relative. */
1700 complain_overflow_bitfield
,/* complain_on_overflow. */
1701 bfd_elf_generic_reloc
, /* special_function. */
1702 "R_ARM_THM_ALU_ABS_G0_NC",/* name. */
1703 FALSE
, /* partial_inplace. */
1704 0x00000000, /* src_mask. */
1705 0x00000000, /* dst_mask. */
1706 FALSE
), /* pcrel_offset. */
1707 HOWTO (R_ARM_THM_ALU_ABS_G1_NC
,/* type. */
1708 0, /* rightshift. */
1709 1, /* size (0 = byte, 1 = short, 2 = long). */
1711 FALSE
, /* pc_relative. */
1713 complain_overflow_bitfield
,/* complain_on_overflow. */
1714 bfd_elf_generic_reloc
, /* special_function. */
1715 "R_ARM_THM_ALU_ABS_G1_NC",/* name. */
1716 FALSE
, /* partial_inplace. */
1717 0x00000000, /* src_mask. */
1718 0x00000000, /* dst_mask. */
1719 FALSE
), /* pcrel_offset. */
1720 HOWTO (R_ARM_THM_ALU_ABS_G2_NC
,/* type. */
1721 0, /* rightshift. */
1722 1, /* size (0 = byte, 1 = short, 2 = long). */
1724 FALSE
, /* pc_relative. */
1726 complain_overflow_bitfield
,/* complain_on_overflow. */
1727 bfd_elf_generic_reloc
, /* special_function. */
1728 "R_ARM_THM_ALU_ABS_G2_NC",/* name. */
1729 FALSE
, /* partial_inplace. */
1730 0x00000000, /* src_mask. */
1731 0x00000000, /* dst_mask. */
1732 FALSE
), /* pcrel_offset. */
1733 HOWTO (R_ARM_THM_ALU_ABS_G3_NC
,/* type. */
1734 0, /* rightshift. */
1735 1, /* size (0 = byte, 1 = short, 2 = long). */
1737 FALSE
, /* pc_relative. */
1739 complain_overflow_bitfield
,/* complain_on_overflow. */
1740 bfd_elf_generic_reloc
, /* special_function. */
1741 "R_ARM_THM_ALU_ABS_G3_NC",/* name. */
1742 FALSE
, /* partial_inplace. */
1743 0x00000000, /* src_mask. */
1744 0x00000000, /* dst_mask. */
1745 FALSE
), /* pcrel_offset. */
1749 static reloc_howto_type elf32_arm_howto_table_2
[1] =
1751 HOWTO (R_ARM_IRELATIVE
, /* type */
1753 2, /* size (0 = byte, 1 = short, 2 = long) */
1755 FALSE
, /* pc_relative */
1757 complain_overflow_bitfield
,/* complain_on_overflow */
1758 bfd_elf_generic_reloc
, /* special_function */
1759 "R_ARM_IRELATIVE", /* name */
1760 TRUE
, /* partial_inplace */
1761 0xffffffff, /* src_mask */
1762 0xffffffff, /* dst_mask */
1763 FALSE
) /* pcrel_offset */
1766 /* 249-255 extended, currently unused, relocations: */
1767 static reloc_howto_type elf32_arm_howto_table_3
[4] =
1769 HOWTO (R_ARM_RREL32
, /* type */
1771 0, /* size (0 = byte, 1 = short, 2 = long) */
1773 FALSE
, /* pc_relative */
1775 complain_overflow_dont
,/* complain_on_overflow */
1776 bfd_elf_generic_reloc
, /* special_function */
1777 "R_ARM_RREL32", /* name */
1778 FALSE
, /* partial_inplace */
1781 FALSE
), /* pcrel_offset */
1783 HOWTO (R_ARM_RABS32
, /* type */
1785 0, /* size (0 = byte, 1 = short, 2 = long) */
1787 FALSE
, /* pc_relative */
1789 complain_overflow_dont
,/* complain_on_overflow */
1790 bfd_elf_generic_reloc
, /* special_function */
1791 "R_ARM_RABS32", /* name */
1792 FALSE
, /* partial_inplace */
1795 FALSE
), /* pcrel_offset */
1797 HOWTO (R_ARM_RPC24
, /* type */
1799 0, /* size (0 = byte, 1 = short, 2 = long) */
1801 FALSE
, /* pc_relative */
1803 complain_overflow_dont
,/* complain_on_overflow */
1804 bfd_elf_generic_reloc
, /* special_function */
1805 "R_ARM_RPC24", /* name */
1806 FALSE
, /* partial_inplace */
1809 FALSE
), /* pcrel_offset */
1811 HOWTO (R_ARM_RBASE
, /* type */
1813 0, /* size (0 = byte, 1 = short, 2 = long) */
1815 FALSE
, /* pc_relative */
1817 complain_overflow_dont
,/* complain_on_overflow */
1818 bfd_elf_generic_reloc
, /* special_function */
1819 "R_ARM_RBASE", /* name */
1820 FALSE
, /* partial_inplace */
1823 FALSE
) /* pcrel_offset */
1826 static reloc_howto_type
*
1827 elf32_arm_howto_from_type (unsigned int r_type
)
1829 if (r_type
< ARRAY_SIZE (elf32_arm_howto_table_1
))
1830 return &elf32_arm_howto_table_1
[r_type
];
1832 if (r_type
== R_ARM_IRELATIVE
)
1833 return &elf32_arm_howto_table_2
[r_type
- R_ARM_IRELATIVE
];
1835 if (r_type
>= R_ARM_RREL32
1836 && r_type
< R_ARM_RREL32
+ ARRAY_SIZE (elf32_arm_howto_table_3
))
1837 return &elf32_arm_howto_table_3
[r_type
- R_ARM_RREL32
];
1843 elf32_arm_info_to_howto (bfd
* abfd
, arelent
* bfd_reloc
,
1844 Elf_Internal_Rela
* elf_reloc
)
1846 unsigned int r_type
;
1848 r_type
= ELF32_R_TYPE (elf_reloc
->r_info
);
1849 if ((bfd_reloc
->howto
= elf32_arm_howto_from_type (r_type
)) == NULL
)
1851 /* xgettext:c-format */
1852 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
1854 bfd_set_error (bfd_error_bad_value
);
1860 struct elf32_arm_reloc_map
1862 bfd_reloc_code_real_type bfd_reloc_val
;
1863 unsigned char elf_reloc_val
;
1866 /* All entries in this list must also be present in elf32_arm_howto_table. */
1867 static const struct elf32_arm_reloc_map elf32_arm_reloc_map
[] =
1869 {BFD_RELOC_NONE
, R_ARM_NONE
},
1870 {BFD_RELOC_ARM_PCREL_BRANCH
, R_ARM_PC24
},
1871 {BFD_RELOC_ARM_PCREL_CALL
, R_ARM_CALL
},
1872 {BFD_RELOC_ARM_PCREL_JUMP
, R_ARM_JUMP24
},
1873 {BFD_RELOC_ARM_PCREL_BLX
, R_ARM_XPC25
},
1874 {BFD_RELOC_THUMB_PCREL_BLX
, R_ARM_THM_XPC22
},
1875 {BFD_RELOC_32
, R_ARM_ABS32
},
1876 {BFD_RELOC_32_PCREL
, R_ARM_REL32
},
1877 {BFD_RELOC_8
, R_ARM_ABS8
},
1878 {BFD_RELOC_16
, R_ARM_ABS16
},
1879 {BFD_RELOC_ARM_OFFSET_IMM
, R_ARM_ABS12
},
1880 {BFD_RELOC_ARM_THUMB_OFFSET
, R_ARM_THM_ABS5
},
1881 {BFD_RELOC_THUMB_PCREL_BRANCH25
, R_ARM_THM_JUMP24
},
1882 {BFD_RELOC_THUMB_PCREL_BRANCH23
, R_ARM_THM_CALL
},
1883 {BFD_RELOC_THUMB_PCREL_BRANCH12
, R_ARM_THM_JUMP11
},
1884 {BFD_RELOC_THUMB_PCREL_BRANCH20
, R_ARM_THM_JUMP19
},
1885 {BFD_RELOC_THUMB_PCREL_BRANCH9
, R_ARM_THM_JUMP8
},
1886 {BFD_RELOC_THUMB_PCREL_BRANCH7
, R_ARM_THM_JUMP6
},
1887 {BFD_RELOC_ARM_GLOB_DAT
, R_ARM_GLOB_DAT
},
1888 {BFD_RELOC_ARM_JUMP_SLOT
, R_ARM_JUMP_SLOT
},
1889 {BFD_RELOC_ARM_RELATIVE
, R_ARM_RELATIVE
},
1890 {BFD_RELOC_ARM_GOTOFF
, R_ARM_GOTOFF32
},
1891 {BFD_RELOC_ARM_GOTPC
, R_ARM_GOTPC
},
1892 {BFD_RELOC_ARM_GOT_PREL
, R_ARM_GOT_PREL
},
1893 {BFD_RELOC_ARM_GOT32
, R_ARM_GOT32
},
1894 {BFD_RELOC_ARM_PLT32
, R_ARM_PLT32
},
1895 {BFD_RELOC_ARM_TARGET1
, R_ARM_TARGET1
},
1896 {BFD_RELOC_ARM_ROSEGREL32
, R_ARM_ROSEGREL32
},
1897 {BFD_RELOC_ARM_SBREL32
, R_ARM_SBREL32
},
1898 {BFD_RELOC_ARM_PREL31
, R_ARM_PREL31
},
1899 {BFD_RELOC_ARM_TARGET2
, R_ARM_TARGET2
},
1900 {BFD_RELOC_ARM_PLT32
, R_ARM_PLT32
},
1901 {BFD_RELOC_ARM_TLS_GOTDESC
, R_ARM_TLS_GOTDESC
},
1902 {BFD_RELOC_ARM_TLS_CALL
, R_ARM_TLS_CALL
},
1903 {BFD_RELOC_ARM_THM_TLS_CALL
, R_ARM_THM_TLS_CALL
},
1904 {BFD_RELOC_ARM_TLS_DESCSEQ
, R_ARM_TLS_DESCSEQ
},
1905 {BFD_RELOC_ARM_THM_TLS_DESCSEQ
, R_ARM_THM_TLS_DESCSEQ
},
1906 {BFD_RELOC_ARM_TLS_DESC
, R_ARM_TLS_DESC
},
1907 {BFD_RELOC_ARM_TLS_GD32
, R_ARM_TLS_GD32
},
1908 {BFD_RELOC_ARM_TLS_LDO32
, R_ARM_TLS_LDO32
},
1909 {BFD_RELOC_ARM_TLS_LDM32
, R_ARM_TLS_LDM32
},
1910 {BFD_RELOC_ARM_TLS_DTPMOD32
, R_ARM_TLS_DTPMOD32
},
1911 {BFD_RELOC_ARM_TLS_DTPOFF32
, R_ARM_TLS_DTPOFF32
},
1912 {BFD_RELOC_ARM_TLS_TPOFF32
, R_ARM_TLS_TPOFF32
},
1913 {BFD_RELOC_ARM_TLS_IE32
, R_ARM_TLS_IE32
},
1914 {BFD_RELOC_ARM_TLS_LE32
, R_ARM_TLS_LE32
},
1915 {BFD_RELOC_ARM_IRELATIVE
, R_ARM_IRELATIVE
},
1916 {BFD_RELOC_VTABLE_INHERIT
, R_ARM_GNU_VTINHERIT
},
1917 {BFD_RELOC_VTABLE_ENTRY
, R_ARM_GNU_VTENTRY
},
1918 {BFD_RELOC_ARM_MOVW
, R_ARM_MOVW_ABS_NC
},
1919 {BFD_RELOC_ARM_MOVT
, R_ARM_MOVT_ABS
},
1920 {BFD_RELOC_ARM_MOVW_PCREL
, R_ARM_MOVW_PREL_NC
},
1921 {BFD_RELOC_ARM_MOVT_PCREL
, R_ARM_MOVT_PREL
},
1922 {BFD_RELOC_ARM_THUMB_MOVW
, R_ARM_THM_MOVW_ABS_NC
},
1923 {BFD_RELOC_ARM_THUMB_MOVT
, R_ARM_THM_MOVT_ABS
},
1924 {BFD_RELOC_ARM_THUMB_MOVW_PCREL
, R_ARM_THM_MOVW_PREL_NC
},
1925 {BFD_RELOC_ARM_THUMB_MOVT_PCREL
, R_ARM_THM_MOVT_PREL
},
1926 {BFD_RELOC_ARM_ALU_PC_G0_NC
, R_ARM_ALU_PC_G0_NC
},
1927 {BFD_RELOC_ARM_ALU_PC_G0
, R_ARM_ALU_PC_G0
},
1928 {BFD_RELOC_ARM_ALU_PC_G1_NC
, R_ARM_ALU_PC_G1_NC
},
1929 {BFD_RELOC_ARM_ALU_PC_G1
, R_ARM_ALU_PC_G1
},
1930 {BFD_RELOC_ARM_ALU_PC_G2
, R_ARM_ALU_PC_G2
},
1931 {BFD_RELOC_ARM_LDR_PC_G0
, R_ARM_LDR_PC_G0
},
1932 {BFD_RELOC_ARM_LDR_PC_G1
, R_ARM_LDR_PC_G1
},
1933 {BFD_RELOC_ARM_LDR_PC_G2
, R_ARM_LDR_PC_G2
},
1934 {BFD_RELOC_ARM_LDRS_PC_G0
, R_ARM_LDRS_PC_G0
},
1935 {BFD_RELOC_ARM_LDRS_PC_G1
, R_ARM_LDRS_PC_G1
},
1936 {BFD_RELOC_ARM_LDRS_PC_G2
, R_ARM_LDRS_PC_G2
},
1937 {BFD_RELOC_ARM_LDC_PC_G0
, R_ARM_LDC_PC_G0
},
1938 {BFD_RELOC_ARM_LDC_PC_G1
, R_ARM_LDC_PC_G1
},
1939 {BFD_RELOC_ARM_LDC_PC_G2
, R_ARM_LDC_PC_G2
},
1940 {BFD_RELOC_ARM_ALU_SB_G0_NC
, R_ARM_ALU_SB_G0_NC
},
1941 {BFD_RELOC_ARM_ALU_SB_G0
, R_ARM_ALU_SB_G0
},
1942 {BFD_RELOC_ARM_ALU_SB_G1_NC
, R_ARM_ALU_SB_G1_NC
},
1943 {BFD_RELOC_ARM_ALU_SB_G1
, R_ARM_ALU_SB_G1
},
1944 {BFD_RELOC_ARM_ALU_SB_G2
, R_ARM_ALU_SB_G2
},
1945 {BFD_RELOC_ARM_LDR_SB_G0
, R_ARM_LDR_SB_G0
},
1946 {BFD_RELOC_ARM_LDR_SB_G1
, R_ARM_LDR_SB_G1
},
1947 {BFD_RELOC_ARM_LDR_SB_G2
, R_ARM_LDR_SB_G2
},
1948 {BFD_RELOC_ARM_LDRS_SB_G0
, R_ARM_LDRS_SB_G0
},
1949 {BFD_RELOC_ARM_LDRS_SB_G1
, R_ARM_LDRS_SB_G1
},
1950 {BFD_RELOC_ARM_LDRS_SB_G2
, R_ARM_LDRS_SB_G2
},
1951 {BFD_RELOC_ARM_LDC_SB_G0
, R_ARM_LDC_SB_G0
},
1952 {BFD_RELOC_ARM_LDC_SB_G1
, R_ARM_LDC_SB_G1
},
1953 {BFD_RELOC_ARM_LDC_SB_G2
, R_ARM_LDC_SB_G2
},
1954 {BFD_RELOC_ARM_V4BX
, R_ARM_V4BX
},
1955 {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC
, R_ARM_THM_ALU_ABS_G3_NC
},
1956 {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC
, R_ARM_THM_ALU_ABS_G2_NC
},
1957 {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC
, R_ARM_THM_ALU_ABS_G1_NC
},
1958 {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC
, R_ARM_THM_ALU_ABS_G0_NC
}
1961 static reloc_howto_type
*
1962 elf32_arm_reloc_type_lookup (bfd
*abfd ATTRIBUTE_UNUSED
,
1963 bfd_reloc_code_real_type code
)
1967 for (i
= 0; i
< ARRAY_SIZE (elf32_arm_reloc_map
); i
++)
1968 if (elf32_arm_reloc_map
[i
].bfd_reloc_val
== code
)
1969 return elf32_arm_howto_from_type (elf32_arm_reloc_map
[i
].elf_reloc_val
);
1974 static reloc_howto_type
*
1975 elf32_arm_reloc_name_lookup (bfd
*abfd ATTRIBUTE_UNUSED
,
1980 for (i
= 0; i
< ARRAY_SIZE (elf32_arm_howto_table_1
); i
++)
1981 if (elf32_arm_howto_table_1
[i
].name
!= NULL
1982 && strcasecmp (elf32_arm_howto_table_1
[i
].name
, r_name
) == 0)
1983 return &elf32_arm_howto_table_1
[i
];
1985 for (i
= 0; i
< ARRAY_SIZE (elf32_arm_howto_table_2
); i
++)
1986 if (elf32_arm_howto_table_2
[i
].name
!= NULL
1987 && strcasecmp (elf32_arm_howto_table_2
[i
].name
, r_name
) == 0)
1988 return &elf32_arm_howto_table_2
[i
];
1990 for (i
= 0; i
< ARRAY_SIZE (elf32_arm_howto_table_3
); i
++)
1991 if (elf32_arm_howto_table_3
[i
].name
!= NULL
1992 && strcasecmp (elf32_arm_howto_table_3
[i
].name
, r_name
) == 0)
1993 return &elf32_arm_howto_table_3
[i
];
1998 /* Support for core dump NOTE sections. */
2001 elf32_arm_nabi_grok_prstatus (bfd
*abfd
, Elf_Internal_Note
*note
)
2006 switch (note
->descsz
)
2011 case 148: /* Linux/ARM 32-bit. */
2013 elf_tdata (abfd
)->core
->signal
= bfd_get_16 (abfd
, note
->descdata
+ 12);
2016 elf_tdata (abfd
)->core
->lwpid
= bfd_get_32 (abfd
, note
->descdata
+ 24);
2025 /* Make a ".reg/999" section. */
2026 return _bfd_elfcore_make_pseudosection (abfd
, ".reg",
2027 size
, note
->descpos
+ offset
);
2031 elf32_arm_nabi_grok_psinfo (bfd
*abfd
, Elf_Internal_Note
*note
)
2033 switch (note
->descsz
)
2038 case 124: /* Linux/ARM elf_prpsinfo. */
2039 elf_tdata (abfd
)->core
->pid
2040 = bfd_get_32 (abfd
, note
->descdata
+ 12);
2041 elf_tdata (abfd
)->core
->program
2042 = _bfd_elfcore_strndup (abfd
, note
->descdata
+ 28, 16);
2043 elf_tdata (abfd
)->core
->command
2044 = _bfd_elfcore_strndup (abfd
, note
->descdata
+ 44, 80);
2047 /* Note that for some reason, a spurious space is tacked
2048 onto the end of the args in some (at least one anyway)
2049 implementations, so strip it off if it exists. */
2051 char *command
= elf_tdata (abfd
)->core
->command
;
2052 int n
= strlen (command
);
2054 if (0 < n
&& command
[n
- 1] == ' ')
2055 command
[n
- 1] = '\0';
2062 elf32_arm_nabi_write_core_note (bfd
*abfd
, char *buf
, int *bufsiz
,
2075 va_start (ap
, note_type
);
2076 memset (data
, 0, sizeof (data
));
2077 strncpy (data
+ 28, va_arg (ap
, const char *), 16);
2078 strncpy (data
+ 44, va_arg (ap
, const char *), 80);
2081 return elfcore_write_note (abfd
, buf
, bufsiz
,
2082 "CORE", note_type
, data
, sizeof (data
));
2093 va_start (ap
, note_type
);
2094 memset (data
, 0, sizeof (data
));
2095 pid
= va_arg (ap
, long);
2096 bfd_put_32 (abfd
, pid
, data
+ 24);
2097 cursig
= va_arg (ap
, int);
2098 bfd_put_16 (abfd
, cursig
, data
+ 12);
2099 greg
= va_arg (ap
, const void *);
2100 memcpy (data
+ 72, greg
, 72);
2103 return elfcore_write_note (abfd
, buf
, bufsiz
,
2104 "CORE", note_type
, data
, sizeof (data
));
2109 #define TARGET_LITTLE_SYM arm_elf32_le_vec
2110 #define TARGET_LITTLE_NAME "elf32-littlearm"
2111 #define TARGET_BIG_SYM arm_elf32_be_vec
2112 #define TARGET_BIG_NAME "elf32-bigarm"
2114 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2115 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2116 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2118 typedef unsigned long int insn32
;
2119 typedef unsigned short int insn16
;
2121 /* In lieu of proper flags, assume all EABIv4 or later objects are
2123 #define INTERWORK_FLAG(abfd) \
2124 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2125 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2126 || ((abfd)->flags & BFD_LINKER_CREATED))
2128 /* The linker script knows the section names for placement.
2129 The entry_names are used to do simple name mangling on the stubs.
2130 Given a function name, and its type, the stub can be found. The
2131 name can be changed. The only requirement is the %s be present. */
2132 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2133 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2135 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2136 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2138 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2139 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2141 #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer"
2142 #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "__stm32l4xx_veneer_%x"
2144 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2145 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2147 #define STUB_ENTRY_NAME "__%s_veneer"
2149 #define CMSE_PREFIX "__acle_se_"
2151 /* The name of the dynamic interpreter. This is put in the .interp
2153 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2155 static const unsigned long tls_trampoline
[] =
2157 0xe08e0000, /* add r0, lr, r0 */
2158 0xe5901004, /* ldr r1, [r0,#4] */
2159 0xe12fff11, /* bx r1 */
2162 static const unsigned long dl_tlsdesc_lazy_trampoline
[] =
2164 0xe52d2004, /* push {r2} */
2165 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2166 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2167 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2168 0xe081100f, /* 2: add r1, pc */
2169 0xe12fff12, /* bx r2 */
2170 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2171 + dl_tlsdesc_lazy_resolver(GOT) */
2172 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2175 #ifdef FOUR_WORD_PLT
2177 /* The first entry in a procedure linkage table looks like
2178 this. It is set up so that any shared library function that is
2179 called before the relocation has been set up calls the dynamic
2181 static const bfd_vma elf32_arm_plt0_entry
[] =
2183 0xe52de004, /* str lr, [sp, #-4]! */
2184 0xe59fe010, /* ldr lr, [pc, #16] */
2185 0xe08fe00e, /* add lr, pc, lr */
2186 0xe5bef008, /* ldr pc, [lr, #8]! */
2189 /* Subsequent entries in a procedure linkage table look like
2191 static const bfd_vma elf32_arm_plt_entry
[] =
2193 0xe28fc600, /* add ip, pc, #NN */
2194 0xe28cca00, /* add ip, ip, #NN */
2195 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2196 0x00000000, /* unused */
2199 #else /* not FOUR_WORD_PLT */
2201 /* The first entry in a procedure linkage table looks like
2202 this. It is set up so that any shared library function that is
2203 called before the relocation has been set up calls the dynamic
2205 static const bfd_vma elf32_arm_plt0_entry
[] =
2207 0xe52de004, /* str lr, [sp, #-4]! */
2208 0xe59fe004, /* ldr lr, [pc, #4] */
2209 0xe08fe00e, /* add lr, pc, lr */
2210 0xe5bef008, /* ldr pc, [lr, #8]! */
2211 0x00000000, /* &GOT[0] - . */
2214 /* By default subsequent entries in a procedure linkage table look like
2215 this. Offsets that don't fit into 28 bits will cause link error. */
2216 static const bfd_vma elf32_arm_plt_entry_short
[] =
2218 0xe28fc600, /* add ip, pc, #0xNN00000 */
2219 0xe28cca00, /* add ip, ip, #0xNN000 */
2220 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2223 /* When explicitly asked, we'll use this "long" entry format
2224 which can cope with arbitrary displacements. */
2225 static const bfd_vma elf32_arm_plt_entry_long
[] =
2227 0xe28fc200, /* add ip, pc, #0xN0000000 */
2228 0xe28cc600, /* add ip, ip, #0xNN00000 */
2229 0xe28cca00, /* add ip, ip, #0xNN000 */
2230 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2233 static bfd_boolean elf32_arm_use_long_plt_entry
= FALSE
;
2235 #endif /* not FOUR_WORD_PLT */
2237 /* The first entry in a procedure linkage table looks like this.
2238 It is set up so that any shared library function that is called before the
2239 relocation has been set up calls the dynamic linker first. */
2240 static const bfd_vma elf32_thumb2_plt0_entry
[] =
2242 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2243 an instruction maybe encoded to one or two array elements. */
2244 0xf8dfb500, /* push {lr} */
2245 0x44fee008, /* ldr.w lr, [pc, #8] */
2247 0xff08f85e, /* ldr.w pc, [lr, #8]! */
2248 0x00000000, /* &GOT[0] - . */
2251 /* Subsequent entries in a procedure linkage table for thumb only target
2253 static const bfd_vma elf32_thumb2_plt_entry
[] =
2255 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2256 an instruction maybe encoded to one or two array elements. */
2257 0x0c00f240, /* movw ip, #0xNNNN */
2258 0x0c00f2c0, /* movt ip, #0xNNNN */
2259 0xf8dc44fc, /* add ip, pc */
2260 0xbf00f000 /* ldr.w pc, [ip] */
2264 /* The format of the first entry in the procedure linkage table
2265 for a VxWorks executable. */
2266 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry
[] =
2268 0xe52dc008, /* str ip,[sp,#-8]! */
2269 0xe59fc000, /* ldr ip,[pc] */
2270 0xe59cf008, /* ldr pc,[ip,#8] */
2271 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2274 /* The format of subsequent entries in a VxWorks executable. */
2275 static const bfd_vma elf32_arm_vxworks_exec_plt_entry
[] =
2277 0xe59fc000, /* ldr ip,[pc] */
2278 0xe59cf000, /* ldr pc,[ip] */
2279 0x00000000, /* .long @got */
2280 0xe59fc000, /* ldr ip,[pc] */
2281 0xea000000, /* b _PLT */
2282 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2285 /* The format of entries in a VxWorks shared library. */
2286 static const bfd_vma elf32_arm_vxworks_shared_plt_entry
[] =
2288 0xe59fc000, /* ldr ip,[pc] */
2289 0xe79cf009, /* ldr pc,[ip,r9] */
2290 0x00000000, /* .long @got */
2291 0xe59fc000, /* ldr ip,[pc] */
2292 0xe599f008, /* ldr pc,[r9,#8] */
2293 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2296 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2297 #define PLT_THUMB_STUB_SIZE 4
2298 static const bfd_vma elf32_arm_plt_thumb_stub
[] =
2304 /* The entries in a PLT when using a DLL-based target with multiple
2306 static const bfd_vma elf32_arm_symbian_plt_entry
[] =
2308 0xe51ff004, /* ldr pc, [pc, #-4] */
2309 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2312 /* The first entry in a procedure linkage table looks like
2313 this. It is set up so that any shared library function that is
2314 called before the relocation has been set up calls the dynamic
2316 static const bfd_vma elf32_arm_nacl_plt0_entry
[] =
2319 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2320 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2321 0xe08cc00f, /* add ip, ip, pc */
2322 0xe52dc008, /* str ip, [sp, #-8]! */
2323 /* Second bundle: */
2324 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2325 0xe59cc000, /* ldr ip, [ip] */
2326 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2327 0xe12fff1c, /* bx ip */
2329 0xe320f000, /* nop */
2330 0xe320f000, /* nop */
2331 0xe320f000, /* nop */
2333 0xe50dc004, /* str ip, [sp, #-4] */
2334 /* Fourth bundle: */
2335 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2336 0xe59cc000, /* ldr ip, [ip] */
2337 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2338 0xe12fff1c, /* bx ip */
2340 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2342 /* Subsequent entries in a procedure linkage table look like this. */
2343 static const bfd_vma elf32_arm_nacl_plt_entry
[] =
2345 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2346 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2347 0xe08cc00f, /* add ip, ip, pc */
2348 0xea000000, /* b .Lplt_tail */
2351 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2352 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2353 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2354 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2355 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2356 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2357 #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4)
2358 #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4)
2368 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2369 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2370 is inserted in arm_build_one_stub(). */
2371 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2372 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2373 #define THUMB32_MOVT(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVT_ABS, 0}
2374 #define THUMB32_MOVW(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVW_ABS_NC, 0}
2375 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2376 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2377 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2378 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2383 enum stub_insn_type type
;
2384 unsigned int r_type
;
2388 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2389 to reach the stub if necessary. */
2390 static const insn_sequence elf32_arm_stub_long_branch_any_any
[] =
2392 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2393 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2396 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2398 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb
[] =
2400 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2401 ARM_INSN (0xe12fff1c), /* bx ip */
2402 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2405 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2406 static const insn_sequence elf32_arm_stub_long_branch_thumb_only
[] =
2408 THUMB16_INSN (0xb401), /* push {r0} */
2409 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2410 THUMB16_INSN (0x4684), /* mov ip, r0 */
2411 THUMB16_INSN (0xbc01), /* pop {r0} */
2412 THUMB16_INSN (0x4760), /* bx ip */
2413 THUMB16_INSN (0xbf00), /* nop */
2414 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2417 /* Thumb -> Thumb long branch stub in thumb2 encoding. Used on armv7. */
2418 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only
[] =
2420 THUMB32_INSN (0xf85ff000), /* ldr.w pc, [pc, #-0] */
2421 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(x) */
2424 /* Thumb -> Thumb long branch stub. Used for PureCode sections on Thumb2
2425 M-profile architectures. */
2426 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only_pure
[] =
2428 THUMB32_MOVW (0xf2400c00), /* mov.w ip, R_ARM_MOVW_ABS_NC */
2429 THUMB32_MOVT (0xf2c00c00), /* movt ip, R_ARM_MOVT_ABS << 16 */
2430 THUMB16_INSN (0x4760), /* bx ip */
2433 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2435 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb
[] =
2437 THUMB16_INSN (0x4778), /* bx pc */
2438 THUMB16_INSN (0x46c0), /* nop */
2439 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2440 ARM_INSN (0xe12fff1c), /* bx ip */
2441 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2444 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2446 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm
[] =
2448 THUMB16_INSN (0x4778), /* bx pc */
2449 THUMB16_INSN (0x46c0), /* nop */
2450 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2451 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2454 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2455 one, when the destination is close enough. */
2456 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm
[] =
2458 THUMB16_INSN (0x4778), /* bx pc */
2459 THUMB16_INSN (0x46c0), /* nop */
2460 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2463 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2464 blx to reach the stub if necessary. */
2465 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic
[] =
2467 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2468 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2469 DATA_WORD (0, R_ARM_REL32
, -4), /* dcd R_ARM_REL32(X-4) */
2472 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2473 blx to reach the stub if necessary. We can not add into pc;
2474 it is not guaranteed to mode switch (different in ARMv6 and
2476 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic
[] =
2478 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2479 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2480 ARM_INSN (0xe12fff1c), /* bx ip */
2481 DATA_WORD (0, R_ARM_REL32
, 0), /* dcd R_ARM_REL32(X) */
2484 /* V4T ARM -> ARM long branch stub, PIC. */
2485 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic
[] =
2487 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2488 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2489 ARM_INSN (0xe12fff1c), /* bx ip */
2490 DATA_WORD (0, R_ARM_REL32
, 0), /* dcd R_ARM_REL32(X) */
2493 /* V4T Thumb -> ARM long branch stub, PIC. */
2494 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic
[] =
2496 THUMB16_INSN (0x4778), /* bx pc */
2497 THUMB16_INSN (0x46c0), /* nop */
2498 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2499 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2500 DATA_WORD (0, R_ARM_REL32
, -4), /* dcd R_ARM_REL32(X) */
2503 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2505 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic
[] =
2507 THUMB16_INSN (0xb401), /* push {r0} */
2508 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2509 THUMB16_INSN (0x46fc), /* mov ip, pc */
2510 THUMB16_INSN (0x4484), /* add ip, r0 */
2511 THUMB16_INSN (0xbc01), /* pop {r0} */
2512 THUMB16_INSN (0x4760), /* bx ip */
2513 DATA_WORD (0, R_ARM_REL32
, 4), /* dcd R_ARM_REL32(X) */
2516 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2518 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic
[] =
2520 THUMB16_INSN (0x4778), /* bx pc */
2521 THUMB16_INSN (0x46c0), /* nop */
2522 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2523 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2524 ARM_INSN (0xe12fff1c), /* bx ip */
2525 DATA_WORD (0, R_ARM_REL32
, 0), /* dcd R_ARM_REL32(X) */
2528 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2529 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2530 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic
[] =
2532 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2533 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2534 DATA_WORD (0, R_ARM_REL32
, -4), /* dcd R_ARM_REL32(X-4) */
2537 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2538 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2539 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic
[] =
2541 THUMB16_INSN (0x4778), /* bx pc */
2542 THUMB16_INSN (0x46c0), /* nop */
2543 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2544 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2545 DATA_WORD (0, R_ARM_REL32
, -4), /* dcd R_ARM_REL32(X) */
2548 /* NaCl ARM -> ARM long branch stub. */
2549 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl
[] =
2551 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2552 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2553 ARM_INSN (0xe12fff1c), /* bx ip */
2554 ARM_INSN (0xe320f000), /* nop */
2555 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2556 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2557 DATA_WORD (0, R_ARM_NONE
, 0), /* .word 0 */
2558 DATA_WORD (0, R_ARM_NONE
, 0), /* .word 0 */
2561 /* NaCl ARM -> ARM long branch stub, PIC. */
2562 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic
[] =
2564 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2565 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2566 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2567 ARM_INSN (0xe12fff1c), /* bx ip */
2568 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2569 DATA_WORD (0, R_ARM_REL32
, 8), /* dcd R_ARM_REL32(X+8) */
2570 DATA_WORD (0, R_ARM_NONE
, 0), /* .word 0 */
2571 DATA_WORD (0, R_ARM_NONE
, 0), /* .word 0 */
2574 /* Stub used for transition to secure state (aka SG veneer). */
2575 static const insn_sequence elf32_arm_stub_cmse_branch_thumb_only
[] =
2577 THUMB32_INSN (0xe97fe97f), /* sg. */
2578 THUMB32_B_INSN (0xf000b800, -4), /* b.w original_branch_dest. */
2582 /* Cortex-A8 erratum-workaround stubs. */
2584 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2585 can't use a conditional branch to reach this stub). */
2587 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond
[] =
2589 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2590 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2591 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2594 /* Stub used for b.w and bl.w instructions. */
2596 static const insn_sequence elf32_arm_stub_a8_veneer_b
[] =
2598 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2601 static const insn_sequence elf32_arm_stub_a8_veneer_bl
[] =
2603 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2606 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2607 instruction (which switches to ARM mode) to point to this stub. Jump to the
2608 real destination using an ARM-mode branch. */
2610 static const insn_sequence elf32_arm_stub_a8_veneer_blx
[] =
2612 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2615 /* For each section group there can be a specially created linker section
2616 to hold the stubs for that group. The name of the stub section is based
2617 upon the name of another section within that group with the suffix below
2620 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2621 create what appeared to be a linker stub section when it actually
2622 contained user code/data. For example, consider this fragment:
2624 const char * stubborn_problems[] = { "np" };
2626 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2629 .data.rel.local.stubborn_problems
2631 This then causes problems in arm32_arm_build_stubs() as it triggers:
2633 // Ignore non-stub sections.
2634 if (!strstr (stub_sec->name, STUB_SUFFIX))
2637 And so the section would be ignored instead of being processed. Hence
2638 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2640 #define STUB_SUFFIX ".__stub"
2642 /* One entry per long/short branch stub defined above. */
2644 DEF_STUB(long_branch_any_any) \
2645 DEF_STUB(long_branch_v4t_arm_thumb) \
2646 DEF_STUB(long_branch_thumb_only) \
2647 DEF_STUB(long_branch_v4t_thumb_thumb) \
2648 DEF_STUB(long_branch_v4t_thumb_arm) \
2649 DEF_STUB(short_branch_v4t_thumb_arm) \
2650 DEF_STUB(long_branch_any_arm_pic) \
2651 DEF_STUB(long_branch_any_thumb_pic) \
2652 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2653 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2654 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2655 DEF_STUB(long_branch_thumb_only_pic) \
2656 DEF_STUB(long_branch_any_tls_pic) \
2657 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2658 DEF_STUB(long_branch_arm_nacl) \
2659 DEF_STUB(long_branch_arm_nacl_pic) \
2660 DEF_STUB(cmse_branch_thumb_only) \
2661 DEF_STUB(a8_veneer_b_cond) \
2662 DEF_STUB(a8_veneer_b) \
2663 DEF_STUB(a8_veneer_bl) \
2664 DEF_STUB(a8_veneer_blx) \
2665 DEF_STUB(long_branch_thumb2_only) \
2666 DEF_STUB(long_branch_thumb2_only_pure)
2668 #define DEF_STUB(x) arm_stub_##x,
2669 enum elf32_arm_stub_type
2677 /* Note the first a8_veneer type. */
2678 const unsigned arm_stub_a8_veneer_lwm
= arm_stub_a8_veneer_b_cond
;
2682 const insn_sequence
* template_sequence
;
2686 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2687 static const stub_def stub_definitions
[] =
2693 struct elf32_arm_stub_hash_entry
2695 /* Base hash table entry structure. */
2696 struct bfd_hash_entry root
;
2698 /* The stub section. */
2701 /* Offset within stub_sec of the beginning of this stub. */
2702 bfd_vma stub_offset
;
2704 /* Given the symbol's value and its section we can determine its final
2705 value when building the stubs (so the stub knows where to jump). */
2706 bfd_vma target_value
;
2707 asection
*target_section
;
2709 /* Same as above but for the source of the branch to the stub. Used for
2710 Cortex-A8 erratum workaround to patch it to branch to the stub. As
2711 such, source section does not need to be recorded since Cortex-A8 erratum
2712 workaround stubs are only generated when both source and target are in the
2714 bfd_vma source_value
;
2716 /* The instruction which caused this stub to be generated (only valid for
2717 Cortex-A8 erratum workaround stubs at present). */
2718 unsigned long orig_insn
;
2720 /* The stub type. */
2721 enum elf32_arm_stub_type stub_type
;
2722 /* Its encoding size in bytes. */
2725 const insn_sequence
*stub_template
;
2726 /* The size of the template (number of entries). */
2727 int stub_template_size
;
2729 /* The symbol table entry, if any, that this was derived from. */
2730 struct elf32_arm_link_hash_entry
*h
;
2732 /* Type of branch. */
2733 enum arm_st_branch_type branch_type
;
2735 /* Where this stub is being called from, or, in the case of combined
2736 stub sections, the first input section in the group. */
2739 /* The name for the local symbol at the start of this stub. The
2740 stub name in the hash table has to be unique; this does not, so
2741 it can be friendlier. */
2745 /* Used to build a map of a section. This is required for mixed-endian
2748 typedef struct elf32_elf_section_map
2753 elf32_arm_section_map
;
2755 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2759 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER
,
2760 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER
,
2761 VFP11_ERRATUM_ARM_VENEER
,
2762 VFP11_ERRATUM_THUMB_VENEER
2764 elf32_vfp11_erratum_type
;
2766 typedef struct elf32_vfp11_erratum_list
2768 struct elf32_vfp11_erratum_list
*next
;
2774 struct elf32_vfp11_erratum_list
*veneer
;
2775 unsigned int vfp_insn
;
2779 struct elf32_vfp11_erratum_list
*branch
;
2783 elf32_vfp11_erratum_type type
;
2785 elf32_vfp11_erratum_list
;
2787 /* Information about a STM32L4XX erratum veneer, or a branch to such a
2791 STM32L4XX_ERRATUM_BRANCH_TO_VENEER
,
2792 STM32L4XX_ERRATUM_VENEER
2794 elf32_stm32l4xx_erratum_type
;
2796 typedef struct elf32_stm32l4xx_erratum_list
2798 struct elf32_stm32l4xx_erratum_list
*next
;
2804 struct elf32_stm32l4xx_erratum_list
*veneer
;
2809 struct elf32_stm32l4xx_erratum_list
*branch
;
2813 elf32_stm32l4xx_erratum_type type
;
2815 elf32_stm32l4xx_erratum_list
;
2820 INSERT_EXIDX_CANTUNWIND_AT_END
2822 arm_unwind_edit_type
;
2824 /* A (sorted) list of edits to apply to an unwind table. */
2825 typedef struct arm_unwind_table_edit
2827 arm_unwind_edit_type type
;
2828 /* Note: we sometimes want to insert an unwind entry corresponding to a
2829 section different from the one we're currently writing out, so record the
2830 (text) section this edit relates to here. */
2831 asection
*linked_section
;
2833 struct arm_unwind_table_edit
*next
;
2835 arm_unwind_table_edit
;
2837 typedef struct _arm_elf_section_data
2839 /* Information about mapping symbols. */
2840 struct bfd_elf_section_data elf
;
2841 unsigned int mapcount
;
2842 unsigned int mapsize
;
2843 elf32_arm_section_map
*map
;
2844 /* Information about CPU errata. */
2845 unsigned int erratumcount
;
2846 elf32_vfp11_erratum_list
*erratumlist
;
2847 unsigned int stm32l4xx_erratumcount
;
2848 elf32_stm32l4xx_erratum_list
*stm32l4xx_erratumlist
;
2849 unsigned int additional_reloc_count
;
2850 /* Information about unwind tables. */
2853 /* Unwind info attached to a text section. */
2856 asection
*arm_exidx_sec
;
2859 /* Unwind info attached to an .ARM.exidx section. */
2862 arm_unwind_table_edit
*unwind_edit_list
;
2863 arm_unwind_table_edit
*unwind_edit_tail
;
2867 _arm_elf_section_data
;
2869 #define elf32_arm_section_data(sec) \
2870 ((_arm_elf_section_data *) elf_section_data (sec))
2872 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2873 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2874 so may be created multiple times: we use an array of these entries whilst
2875 relaxing which we can refresh easily, then create stubs for each potentially
2876 erratum-triggering instruction once we've settled on a solution. */
2878 struct a8_erratum_fix
2883 bfd_vma target_offset
;
2884 unsigned long orig_insn
;
2886 enum elf32_arm_stub_type stub_type
;
2887 enum arm_st_branch_type branch_type
;
2890 /* A table of relocs applied to branches which might trigger Cortex-A8
2893 struct a8_erratum_reloc
2896 bfd_vma destination
;
2897 struct elf32_arm_link_hash_entry
*hash
;
2898 const char *sym_name
;
2899 unsigned int r_type
;
2900 enum arm_st_branch_type branch_type
;
2901 bfd_boolean non_a8_stub
;
2904 /* The size of the thread control block. */
2907 /* ARM-specific information about a PLT entry, over and above the usual
2911 /* We reference count Thumb references to a PLT entry separately,
2912 so that we can emit the Thumb trampoline only if needed. */
2913 bfd_signed_vma thumb_refcount
;
2915 /* Some references from Thumb code may be eliminated by BL->BLX
2916 conversion, so record them separately. */
2917 bfd_signed_vma maybe_thumb_refcount
;
2919 /* How many of the recorded PLT accesses were from non-call relocations.
2920 This information is useful when deciding whether anything takes the
2921 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2922 non-call references to the function should resolve directly to the
2923 real runtime target. */
2924 unsigned int noncall_refcount
;
2926 /* Since PLT entries have variable size if the Thumb prologue is
2927 used, we need to record the index into .got.plt instead of
2928 recomputing it from the PLT offset. */
2929 bfd_signed_vma got_offset
;
2932 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
2933 struct arm_local_iplt_info
2935 /* The information that is usually found in the generic ELF part of
2936 the hash table entry. */
2937 union gotplt_union root
;
2939 /* The information that is usually found in the ARM-specific part of
2940 the hash table entry. */
2941 struct arm_plt_info arm
;
2943 /* A list of all potential dynamic relocations against this symbol. */
2944 struct elf_dyn_relocs
*dyn_relocs
;
2947 struct elf_arm_obj_tdata
2949 struct elf_obj_tdata root
;
2951 /* tls_type for each local got entry. */
2952 char *local_got_tls_type
;
2954 /* GOTPLT entries for TLS descriptors. */
2955 bfd_vma
*local_tlsdesc_gotent
;
2957 /* Information for local symbols that need entries in .iplt. */
2958 struct arm_local_iplt_info
**local_iplt
;
2960 /* Zero to warn when linking objects with incompatible enum sizes. */
2961 int no_enum_size_warning
;
2963 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2964 int no_wchar_size_warning
;
2967 #define elf_arm_tdata(bfd) \
2968 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
2970 #define elf32_arm_local_got_tls_type(bfd) \
2971 (elf_arm_tdata (bfd)->local_got_tls_type)
2973 #define elf32_arm_local_tlsdesc_gotent(bfd) \
2974 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2976 #define elf32_arm_local_iplt(bfd) \
2977 (elf_arm_tdata (bfd)->local_iplt)
2979 #define is_arm_elf(bfd) \
2980 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2981 && elf_tdata (bfd) != NULL \
2982 && elf_object_id (bfd) == ARM_ELF_DATA)
2985 elf32_arm_mkobject (bfd
*abfd
)
2987 return bfd_elf_allocate_object (abfd
, sizeof (struct elf_arm_obj_tdata
),
2991 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2993 /* Arm ELF linker hash entry. */
2994 struct elf32_arm_link_hash_entry
2996 struct elf_link_hash_entry root
;
2998 /* Track dynamic relocs copied for this symbol. */
2999 struct elf_dyn_relocs
*dyn_relocs
;
3001 /* ARM-specific PLT information. */
3002 struct arm_plt_info plt
;
3004 #define GOT_UNKNOWN 0
3005 #define GOT_NORMAL 1
3006 #define GOT_TLS_GD 2
3007 #define GOT_TLS_IE 4
3008 #define GOT_TLS_GDESC 8
3009 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
3010 unsigned int tls_type
: 8;
3012 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
3013 unsigned int is_iplt
: 1;
3015 unsigned int unused
: 23;
3017 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
3018 starting at the end of the jump table. */
3019 bfd_vma tlsdesc_got
;
3021 /* The symbol marking the real symbol location for exported thumb
3022 symbols with Arm stubs. */
3023 struct elf_link_hash_entry
*export_glue
;
3025 /* A pointer to the most recently used stub hash entry against this
3027 struct elf32_arm_stub_hash_entry
*stub_cache
;
3030 /* Traverse an arm ELF linker hash table. */
3031 #define elf32_arm_link_hash_traverse(table, func, info) \
3032 (elf_link_hash_traverse \
3034 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
3037 /* Get the ARM elf linker hash table from a link_info structure. */
3038 #define elf32_arm_hash_table(info) \
3039 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
3040 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
3042 #define arm_stub_hash_lookup(table, string, create, copy) \
3043 ((struct elf32_arm_stub_hash_entry *) \
3044 bfd_hash_lookup ((table), (string), (create), (copy)))
3046 /* Array to keep track of which stub sections have been created, and
3047 information on stub grouping. */
3050 /* This is the section to which stubs in the group will be
3053 /* The stub section. */
3057 #define elf32_arm_compute_jump_table_size(htab) \
3058 ((htab)->next_tls_desc_index * 4)
3060 /* ARM ELF linker hash table. */
3061 struct elf32_arm_link_hash_table
3063 /* The main hash table. */
3064 struct elf_link_hash_table root
;
3066 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
3067 bfd_size_type thumb_glue_size
;
3069 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
3070 bfd_size_type arm_glue_size
;
3072 /* The size in bytes of section containing the ARMv4 BX veneers. */
3073 bfd_size_type bx_glue_size
;
3075 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
3076 veneer has been populated. */
3077 bfd_vma bx_glue_offset
[15];
3079 /* The size in bytes of the section containing glue for VFP11 erratum
3081 bfd_size_type vfp11_erratum_glue_size
;
3083 /* The size in bytes of the section containing glue for STM32L4XX erratum
3085 bfd_size_type stm32l4xx_erratum_glue_size
;
3087 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
3088 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
3089 elf32_arm_write_section(). */
3090 struct a8_erratum_fix
*a8_erratum_fixes
;
3091 unsigned int num_a8_erratum_fixes
;
3093 /* An arbitrary input BFD chosen to hold the glue sections. */
3094 bfd
* bfd_of_glue_owner
;
3096 /* Nonzero to output a BE8 image. */
3099 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
3100 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
3103 /* The relocation to use for R_ARM_TARGET2 relocations. */
3106 /* 0 = Ignore R_ARM_V4BX.
3107 1 = Convert BX to MOV PC.
3108 2 = Generate v4 interworing stubs. */
3111 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
3114 /* Whether we should fix the ARM1176 BLX immediate issue. */
3117 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
3120 /* What sort of code sequences we should look for which may trigger the
3121 VFP11 denorm erratum. */
3122 bfd_arm_vfp11_fix vfp11_fix
;
3124 /* Global counter for the number of fixes we have emitted. */
3125 int num_vfp11_fixes
;
3127 /* What sort of code sequences we should look for which may trigger the
3128 STM32L4XX erratum. */
3129 bfd_arm_stm32l4xx_fix stm32l4xx_fix
;
3131 /* Global counter for the number of fixes we have emitted. */
3132 int num_stm32l4xx_fixes
;
3134 /* Nonzero to force PIC branch veneers. */
3137 /* The number of bytes in the initial entry in the PLT. */
3138 bfd_size_type plt_header_size
;
3140 /* The number of bytes in the subsequent PLT etries. */
3141 bfd_size_type plt_entry_size
;
3143 /* True if the target system is VxWorks. */
3146 /* True if the target system is Symbian OS. */
3149 /* True if the target system is Native Client. */
3152 /* True if the target uses REL relocations. */
3153 bfd_boolean use_rel
;
3155 /* Nonzero if import library must be a secure gateway import library
3156 as per ARMv8-M Security Extensions. */
3159 /* The import library whose symbols' address must remain stable in
3160 the import library generated. */
3163 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
3164 bfd_vma next_tls_desc_index
;
3166 /* How many R_ARM_TLS_DESC relocations were generated so far. */
3167 bfd_vma num_tls_desc
;
3169 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
3172 /* The offset into splt of the PLT entry for the TLS descriptor
3173 resolver. Special values are 0, if not necessary (or not found
3174 to be necessary yet), and -1 if needed but not determined
3176 bfd_vma dt_tlsdesc_plt
;
3178 /* The offset into sgot of the GOT entry used by the PLT entry
3180 bfd_vma dt_tlsdesc_got
;
3182 /* Offset in .plt section of tls_arm_trampoline. */
3183 bfd_vma tls_trampoline
;
3185 /* Data for R_ARM_TLS_LDM32 relocations. */
3188 bfd_signed_vma refcount
;
3192 /* Small local sym cache. */
3193 struct sym_cache sym_cache
;
3195 /* For convenience in allocate_dynrelocs. */
3198 /* The amount of space used by the reserved portion of the sgotplt
3199 section, plus whatever space is used by the jump slots. */
3200 bfd_vma sgotplt_jump_table_size
;
3202 /* The stub hash table. */
3203 struct bfd_hash_table stub_hash_table
;
3205 /* Linker stub bfd. */
3208 /* Linker call-backs. */
3209 asection
* (*add_stub_section
) (const char *, asection
*, asection
*,
3211 void (*layout_sections_again
) (void);
3213 /* Array to keep track of which stub sections have been created, and
3214 information on stub grouping. */
3215 struct map_stub
*stub_group
;
3217 /* Input stub section holding secure gateway veneers. */
3218 asection
*cmse_stub_sec
;
3220 /* Offset in cmse_stub_sec where new SG veneers (not in input import library)
3221 start to be allocated. */
3222 bfd_vma new_cmse_stub_offset
;
3224 /* Number of elements in stub_group. */
3225 unsigned int top_id
;
3227 /* Assorted information used by elf32_arm_size_stubs. */
3228 unsigned int bfd_count
;
3229 unsigned int top_index
;
3230 asection
**input_list
;
3234 ctz (unsigned int mask
)
3236 #if GCC_VERSION >= 3004
3237 return __builtin_ctz (mask
);
3241 for (i
= 0; i
< 8 * sizeof (mask
); i
++)
3252 elf32_arm_popcount (unsigned int mask
)
3254 #if GCC_VERSION >= 3004
3255 return __builtin_popcount (mask
);
3260 for (i
= 0; i
< 8 * sizeof (mask
); i
++)
3270 /* Create an entry in an ARM ELF linker hash table. */
3272 static struct bfd_hash_entry
*
3273 elf32_arm_link_hash_newfunc (struct bfd_hash_entry
* entry
,
3274 struct bfd_hash_table
* table
,
3275 const char * string
)
3277 struct elf32_arm_link_hash_entry
* ret
=
3278 (struct elf32_arm_link_hash_entry
*) entry
;
3280 /* Allocate the structure if it has not already been allocated by a
3283 ret
= (struct elf32_arm_link_hash_entry
*)
3284 bfd_hash_allocate (table
, sizeof (struct elf32_arm_link_hash_entry
));
3286 return (struct bfd_hash_entry
*) ret
;
3288 /* Call the allocation method of the superclass. */
3289 ret
= ((struct elf32_arm_link_hash_entry
*)
3290 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry
*) ret
,
3294 ret
->dyn_relocs
= NULL
;
3295 ret
->tls_type
= GOT_UNKNOWN
;
3296 ret
->tlsdesc_got
= (bfd_vma
) -1;
3297 ret
->plt
.thumb_refcount
= 0;
3298 ret
->plt
.maybe_thumb_refcount
= 0;
3299 ret
->plt
.noncall_refcount
= 0;
3300 ret
->plt
.got_offset
= -1;
3301 ret
->is_iplt
= FALSE
;
3302 ret
->export_glue
= NULL
;
3304 ret
->stub_cache
= NULL
;
3307 return (struct bfd_hash_entry
*) ret
;
3310 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3314 elf32_arm_allocate_local_sym_info (bfd
*abfd
)
3316 if (elf_local_got_refcounts (abfd
) == NULL
)
3318 bfd_size_type num_syms
;
3322 num_syms
= elf_tdata (abfd
)->symtab_hdr
.sh_info
;
3323 size
= num_syms
* (sizeof (bfd_signed_vma
)
3324 + sizeof (struct arm_local_iplt_info
*)
3327 data
= bfd_zalloc (abfd
, size
);
3331 elf_local_got_refcounts (abfd
) = (bfd_signed_vma
*) data
;
3332 data
+= num_syms
* sizeof (bfd_signed_vma
);
3334 elf32_arm_local_iplt (abfd
) = (struct arm_local_iplt_info
**) data
;
3335 data
+= num_syms
* sizeof (struct arm_local_iplt_info
*);
3337 elf32_arm_local_tlsdesc_gotent (abfd
) = (bfd_vma
*) data
;
3338 data
+= num_syms
* sizeof (bfd_vma
);
3340 elf32_arm_local_got_tls_type (abfd
) = data
;
3345 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3346 to input bfd ABFD. Create the information if it doesn't already exist.
3347 Return null if an allocation fails. */
3349 static struct arm_local_iplt_info
*
3350 elf32_arm_create_local_iplt (bfd
*abfd
, unsigned long r_symndx
)
3352 struct arm_local_iplt_info
**ptr
;
3354 if (!elf32_arm_allocate_local_sym_info (abfd
))
3357 BFD_ASSERT (r_symndx
< elf_tdata (abfd
)->symtab_hdr
.sh_info
);
3358 ptr
= &elf32_arm_local_iplt (abfd
)[r_symndx
];
3360 *ptr
= bfd_zalloc (abfd
, sizeof (**ptr
));
3364 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3365 in ABFD's symbol table. If the symbol is global, H points to its
3366 hash table entry, otherwise H is null.
3368 Return true if the symbol does have PLT information. When returning
3369 true, point *ROOT_PLT at the target-independent reference count/offset
3370 union and *ARM_PLT at the ARM-specific information. */
3373 elf32_arm_get_plt_info (bfd
*abfd
, struct elf32_arm_link_hash_table
*globals
,
3374 struct elf32_arm_link_hash_entry
*h
,
3375 unsigned long r_symndx
, union gotplt_union
**root_plt
,
3376 struct arm_plt_info
**arm_plt
)
3378 struct arm_local_iplt_info
*local_iplt
;
3380 if (globals
->root
.splt
== NULL
&& globals
->root
.iplt
== NULL
)
3385 *root_plt
= &h
->root
.plt
;
3390 if (elf32_arm_local_iplt (abfd
) == NULL
)
3393 local_iplt
= elf32_arm_local_iplt (abfd
)[r_symndx
];
3394 if (local_iplt
== NULL
)
3397 *root_plt
= &local_iplt
->root
;
3398 *arm_plt
= &local_iplt
->arm
;
3402 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3406 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info
*info
,
3407 struct arm_plt_info
*arm_plt
)
3409 struct elf32_arm_link_hash_table
*htab
;
3411 htab
= elf32_arm_hash_table (info
);
3412 return (arm_plt
->thumb_refcount
!= 0
3413 || (!htab
->use_blx
&& arm_plt
->maybe_thumb_refcount
!= 0));
3416 /* Return a pointer to the head of the dynamic reloc list that should
3417 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3418 ABFD's symbol table. Return null if an error occurs. */
3420 static struct elf_dyn_relocs
**
3421 elf32_arm_get_local_dynreloc_list (bfd
*abfd
, unsigned long r_symndx
,
3422 Elf_Internal_Sym
*isym
)
3424 if (ELF32_ST_TYPE (isym
->st_info
) == STT_GNU_IFUNC
)
3426 struct arm_local_iplt_info
*local_iplt
;
3428 local_iplt
= elf32_arm_create_local_iplt (abfd
, r_symndx
);
3429 if (local_iplt
== NULL
)
3431 return &local_iplt
->dyn_relocs
;
3435 /* Track dynamic relocs needed for local syms too.
3436 We really need local syms available to do this
3441 s
= bfd_section_from_elf_index (abfd
, isym
->st_shndx
);
3445 vpp
= &elf_section_data (s
)->local_dynrel
;
3446 return (struct elf_dyn_relocs
**) vpp
;
3450 /* Initialize an entry in the stub hash table. */
3452 static struct bfd_hash_entry
*
3453 stub_hash_newfunc (struct bfd_hash_entry
*entry
,
3454 struct bfd_hash_table
*table
,
3457 /* Allocate the structure if it has not already been allocated by a
3461 entry
= (struct bfd_hash_entry
*)
3462 bfd_hash_allocate (table
, sizeof (struct elf32_arm_stub_hash_entry
));
3467 /* Call the allocation method of the superclass. */
3468 entry
= bfd_hash_newfunc (entry
, table
, string
);
3471 struct elf32_arm_stub_hash_entry
*eh
;
3473 /* Initialize the local fields. */
3474 eh
= (struct elf32_arm_stub_hash_entry
*) entry
;
3475 eh
->stub_sec
= NULL
;
3476 eh
->stub_offset
= (bfd_vma
) -1;
3477 eh
->source_value
= 0;
3478 eh
->target_value
= 0;
3479 eh
->target_section
= NULL
;
3481 eh
->stub_type
= arm_stub_none
;
3483 eh
->stub_template
= NULL
;
3484 eh
->stub_template_size
= -1;
3487 eh
->output_name
= NULL
;
3493 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3494 shortcuts to them in our hash table. */
3497 create_got_section (bfd
*dynobj
, struct bfd_link_info
*info
)
3499 struct elf32_arm_link_hash_table
*htab
;
3501 htab
= elf32_arm_hash_table (info
);
3505 /* BPABI objects never have a GOT, or associated sections. */
3506 if (htab
->symbian_p
)
3509 if (! _bfd_elf_create_got_section (dynobj
, info
))
3515 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3518 create_ifunc_sections (struct bfd_link_info
*info
)
3520 struct elf32_arm_link_hash_table
*htab
;
3521 const struct elf_backend_data
*bed
;
3526 htab
= elf32_arm_hash_table (info
);
3527 dynobj
= htab
->root
.dynobj
;
3528 bed
= get_elf_backend_data (dynobj
);
3529 flags
= bed
->dynamic_sec_flags
;
3531 if (htab
->root
.iplt
== NULL
)
3533 s
= bfd_make_section_anyway_with_flags (dynobj
, ".iplt",
3534 flags
| SEC_READONLY
| SEC_CODE
);
3536 || !bfd_set_section_alignment (dynobj
, s
, bed
->plt_alignment
))
3538 htab
->root
.iplt
= s
;
3541 if (htab
->root
.irelplt
== NULL
)
3543 s
= bfd_make_section_anyway_with_flags (dynobj
,
3544 RELOC_SECTION (htab
, ".iplt"),
3545 flags
| SEC_READONLY
);
3547 || !bfd_set_section_alignment (dynobj
, s
, bed
->s
->log_file_align
))
3549 htab
->root
.irelplt
= s
;
3552 if (htab
->root
.igotplt
== NULL
)
3554 s
= bfd_make_section_anyway_with_flags (dynobj
, ".igot.plt", flags
);
3556 || !bfd_set_section_alignment (dynobj
, s
, bed
->s
->log_file_align
))
3558 htab
->root
.igotplt
= s
;
3563 /* Determine if we're dealing with a Thumb only architecture. */
3566 using_thumb_only (struct elf32_arm_link_hash_table
*globals
)
3569 int profile
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
3570 Tag_CPU_arch_profile
);
3573 return profile
== 'M';
3575 arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
3577 /* Force return logic to be reviewed for each new architecture. */
3578 BFD_ASSERT (arch
<= TAG_CPU_ARCH_V8M_MAIN
);
3580 if (arch
== TAG_CPU_ARCH_V6_M
3581 || arch
== TAG_CPU_ARCH_V6S_M
3582 || arch
== TAG_CPU_ARCH_V7E_M
3583 || arch
== TAG_CPU_ARCH_V8M_BASE
3584 || arch
== TAG_CPU_ARCH_V8M_MAIN
)
3590 /* Determine if we're dealing with a Thumb-2 object. */
3593 using_thumb2 (struct elf32_arm_link_hash_table
*globals
)
3596 int thumb_isa
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
3600 return thumb_isa
== 2;
3602 arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
3604 /* Force return logic to be reviewed for each new architecture. */
3605 BFD_ASSERT (arch
<= TAG_CPU_ARCH_V8M_MAIN
);
3607 return (arch
== TAG_CPU_ARCH_V6T2
3608 || arch
== TAG_CPU_ARCH_V7
3609 || arch
== TAG_CPU_ARCH_V7E_M
3610 || arch
== TAG_CPU_ARCH_V8
3611 || arch
== TAG_CPU_ARCH_V8R
3612 || arch
== TAG_CPU_ARCH_V8M_MAIN
);
3615 /* Determine whether Thumb-2 BL instruction is available. */
3618 using_thumb2_bl (struct elf32_arm_link_hash_table
*globals
)
3621 bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
3623 /* Force return logic to be reviewed for each new architecture. */
3624 BFD_ASSERT (arch
<= TAG_CPU_ARCH_V8M_MAIN
);
3626 /* Architecture was introduced after ARMv6T2 (eg. ARMv6-M). */
3627 return (arch
== TAG_CPU_ARCH_V6T2
3628 || arch
>= TAG_CPU_ARCH_V7
);
3631 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3632 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3636 elf32_arm_create_dynamic_sections (bfd
*dynobj
, struct bfd_link_info
*info
)
3638 struct elf32_arm_link_hash_table
*htab
;
3640 htab
= elf32_arm_hash_table (info
);
3644 if (!htab
->root
.sgot
&& !create_got_section (dynobj
, info
))
3647 if (!_bfd_elf_create_dynamic_sections (dynobj
, info
))
3650 if (htab
->vxworks_p
)
3652 if (!elf_vxworks_create_dynamic_sections (dynobj
, info
, &htab
->srelplt2
))
3655 if (bfd_link_pic (info
))
3657 htab
->plt_header_size
= 0;
3658 htab
->plt_entry_size
3659 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry
);
3663 htab
->plt_header_size
3664 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry
);
3665 htab
->plt_entry_size
3666 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry
);
3669 if (elf_elfheader (dynobj
))
3670 elf_elfheader (dynobj
)->e_ident
[EI_CLASS
] = ELFCLASS32
;
3675 Test for thumb only architectures. Note - we cannot just call
3676 using_thumb_only() as the attributes in the output bfd have not been
3677 initialised at this point, so instead we use the input bfd. */
3678 bfd
* saved_obfd
= htab
->obfd
;
3680 htab
->obfd
= dynobj
;
3681 if (using_thumb_only (htab
))
3683 htab
->plt_header_size
= 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry
);
3684 htab
->plt_entry_size
= 4 * ARRAY_SIZE (elf32_thumb2_plt_entry
);
3686 htab
->obfd
= saved_obfd
;
3689 if (!htab
->root
.splt
3690 || !htab
->root
.srelplt
3691 || !htab
->root
.sdynbss
3692 || (!bfd_link_pic (info
) && !htab
->root
.srelbss
))
3698 /* Copy the extra info we tack onto an elf_link_hash_entry. */
3701 elf32_arm_copy_indirect_symbol (struct bfd_link_info
*info
,
3702 struct elf_link_hash_entry
*dir
,
3703 struct elf_link_hash_entry
*ind
)
3705 struct elf32_arm_link_hash_entry
*edir
, *eind
;
3707 edir
= (struct elf32_arm_link_hash_entry
*) dir
;
3708 eind
= (struct elf32_arm_link_hash_entry
*) ind
;
3710 if (eind
->dyn_relocs
!= NULL
)
3712 if (edir
->dyn_relocs
!= NULL
)
3714 struct elf_dyn_relocs
**pp
;
3715 struct elf_dyn_relocs
*p
;
3717 /* Add reloc counts against the indirect sym to the direct sym
3718 list. Merge any entries against the same section. */
3719 for (pp
= &eind
->dyn_relocs
; (p
= *pp
) != NULL
; )
3721 struct elf_dyn_relocs
*q
;
3723 for (q
= edir
->dyn_relocs
; q
!= NULL
; q
= q
->next
)
3724 if (q
->sec
== p
->sec
)
3726 q
->pc_count
+= p
->pc_count
;
3727 q
->count
+= p
->count
;
3734 *pp
= edir
->dyn_relocs
;
3737 edir
->dyn_relocs
= eind
->dyn_relocs
;
3738 eind
->dyn_relocs
= NULL
;
3741 if (ind
->root
.type
== bfd_link_hash_indirect
)
3743 /* Copy over PLT info. */
3744 edir
->plt
.thumb_refcount
+= eind
->plt
.thumb_refcount
;
3745 eind
->plt
.thumb_refcount
= 0;
3746 edir
->plt
.maybe_thumb_refcount
+= eind
->plt
.maybe_thumb_refcount
;
3747 eind
->plt
.maybe_thumb_refcount
= 0;
3748 edir
->plt
.noncall_refcount
+= eind
->plt
.noncall_refcount
;
3749 eind
->plt
.noncall_refcount
= 0;
3751 /* We should only allocate a function to .iplt once the final
3752 symbol information is known. */
3753 BFD_ASSERT (!eind
->is_iplt
);
3755 if (dir
->got
.refcount
<= 0)
3757 edir
->tls_type
= eind
->tls_type
;
3758 eind
->tls_type
= GOT_UNKNOWN
;
3762 _bfd_elf_link_hash_copy_indirect (info
, dir
, ind
);
3765 /* Destroy an ARM elf linker hash table. */
3768 elf32_arm_link_hash_table_free (bfd
*obfd
)
3770 struct elf32_arm_link_hash_table
*ret
3771 = (struct elf32_arm_link_hash_table
*) obfd
->link
.hash
;
3773 bfd_hash_table_free (&ret
->stub_hash_table
);
3774 _bfd_elf_link_hash_table_free (obfd
);
3777 /* Create an ARM elf linker hash table. */
3779 static struct bfd_link_hash_table
*
3780 elf32_arm_link_hash_table_create (bfd
*abfd
)
3782 struct elf32_arm_link_hash_table
*ret
;
3783 bfd_size_type amt
= sizeof (struct elf32_arm_link_hash_table
);
3785 ret
= (struct elf32_arm_link_hash_table
*) bfd_zmalloc (amt
);
3789 if (!_bfd_elf_link_hash_table_init (& ret
->root
, abfd
,
3790 elf32_arm_link_hash_newfunc
,
3791 sizeof (struct elf32_arm_link_hash_entry
),
3798 ret
->vfp11_fix
= BFD_ARM_VFP11_FIX_NONE
;
3799 ret
->stm32l4xx_fix
= BFD_ARM_STM32L4XX_FIX_NONE
;
3800 #ifdef FOUR_WORD_PLT
3801 ret
->plt_header_size
= 16;
3802 ret
->plt_entry_size
= 16;
3804 ret
->plt_header_size
= 20;
3805 ret
->plt_entry_size
= elf32_arm_use_long_plt_entry
? 16 : 12;
3807 ret
->use_rel
= TRUE
;
3810 if (!bfd_hash_table_init (&ret
->stub_hash_table
, stub_hash_newfunc
,
3811 sizeof (struct elf32_arm_stub_hash_entry
)))
3813 _bfd_elf_link_hash_table_free (abfd
);
3816 ret
->root
.root
.hash_table_free
= elf32_arm_link_hash_table_free
;
3818 return &ret
->root
.root
;
3821 /* Determine what kind of NOPs are available. */
3824 arch_has_arm_nop (struct elf32_arm_link_hash_table
*globals
)
3826 const int arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
3829 /* Force return logic to be reviewed for each new architecture. */
3830 BFD_ASSERT (arch
<= TAG_CPU_ARCH_V8M_MAIN
);
3832 return (arch
== TAG_CPU_ARCH_V6T2
3833 || arch
== TAG_CPU_ARCH_V6K
3834 || arch
== TAG_CPU_ARCH_V7
3835 || arch
== TAG_CPU_ARCH_V8
3836 || arch
== TAG_CPU_ARCH_V8R
);
3840 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type
)
3844 case arm_stub_long_branch_thumb_only
:
3845 case arm_stub_long_branch_thumb2_only
:
3846 case arm_stub_long_branch_thumb2_only_pure
:
3847 case arm_stub_long_branch_v4t_thumb_arm
:
3848 case arm_stub_short_branch_v4t_thumb_arm
:
3849 case arm_stub_long_branch_v4t_thumb_arm_pic
:
3850 case arm_stub_long_branch_v4t_thumb_tls_pic
:
3851 case arm_stub_long_branch_thumb_only_pic
:
3852 case arm_stub_cmse_branch_thumb_only
:
3863 /* Determine the type of stub needed, if any, for a call. */
3865 static enum elf32_arm_stub_type
3866 arm_type_of_stub (struct bfd_link_info
*info
,
3867 asection
*input_sec
,
3868 const Elf_Internal_Rela
*rel
,
3869 unsigned char st_type
,
3870 enum arm_st_branch_type
*actual_branch_type
,
3871 struct elf32_arm_link_hash_entry
*hash
,
3872 bfd_vma destination
,
3878 bfd_signed_vma branch_offset
;
3879 unsigned int r_type
;
3880 struct elf32_arm_link_hash_table
* globals
;
3881 bfd_boolean thumb2
, thumb2_bl
, thumb_only
;
3882 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
3884 enum arm_st_branch_type branch_type
= *actual_branch_type
;
3885 union gotplt_union
*root_plt
;
3886 struct arm_plt_info
*arm_plt
;
3890 if (branch_type
== ST_BRANCH_LONG
)
3893 globals
= elf32_arm_hash_table (info
);
3894 if (globals
== NULL
)
3897 thumb_only
= using_thumb_only (globals
);
3898 thumb2
= using_thumb2 (globals
);
3899 thumb2_bl
= using_thumb2_bl (globals
);
3901 arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
3903 /* True for architectures that implement the thumb2 movw instruction. */
3904 thumb2_movw
= thumb2
|| (arch
== TAG_CPU_ARCH_V8M_BASE
);
3906 /* Determine where the call point is. */
3907 location
= (input_sec
->output_offset
3908 + input_sec
->output_section
->vma
3911 r_type
= ELF32_R_TYPE (rel
->r_info
);
3913 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
3914 are considering a function call relocation. */
3915 if (thumb_only
&& (r_type
== R_ARM_THM_CALL
|| r_type
== R_ARM_THM_JUMP24
3916 || r_type
== R_ARM_THM_JUMP19
)
3917 && branch_type
== ST_BRANCH_TO_ARM
)
3918 branch_type
= ST_BRANCH_TO_THUMB
;
3920 /* For TLS call relocs, it is the caller's responsibility to provide
3921 the address of the appropriate trampoline. */
3922 if (r_type
!= R_ARM_TLS_CALL
3923 && r_type
!= R_ARM_THM_TLS_CALL
3924 && elf32_arm_get_plt_info (input_bfd
, globals
, hash
,
3925 ELF32_R_SYM (rel
->r_info
), &root_plt
,
3927 && root_plt
->offset
!= (bfd_vma
) -1)
3931 if (hash
== NULL
|| hash
->is_iplt
)
3932 splt
= globals
->root
.iplt
;
3934 splt
= globals
->root
.splt
;
3939 /* Note when dealing with PLT entries: the main PLT stub is in
3940 ARM mode, so if the branch is in Thumb mode, another
3941 Thumb->ARM stub will be inserted later just before the ARM
3942 PLT stub. If a long branch stub is needed, we'll add a
3943 Thumb->Arm one and branch directly to the ARM PLT entry.
3944 Here, we have to check if a pre-PLT Thumb->ARM stub
3945 is needed and if it will be close enough. */
3947 destination
= (splt
->output_section
->vma
3948 + splt
->output_offset
3949 + root_plt
->offset
);
3952 /* Thumb branch/call to PLT: it can become a branch to ARM
3953 or to Thumb. We must perform the same checks and
3954 corrections as in elf32_arm_final_link_relocate. */
3955 if ((r_type
== R_ARM_THM_CALL
)
3956 || (r_type
== R_ARM_THM_JUMP24
))
3958 if (globals
->use_blx
3959 && r_type
== R_ARM_THM_CALL
3962 /* If the Thumb BLX instruction is available, convert
3963 the BL to a BLX instruction to call the ARM-mode
3965 branch_type
= ST_BRANCH_TO_ARM
;
3970 /* Target the Thumb stub before the ARM PLT entry. */
3971 destination
-= PLT_THUMB_STUB_SIZE
;
3972 branch_type
= ST_BRANCH_TO_THUMB
;
3977 branch_type
= ST_BRANCH_TO_ARM
;
3981 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
3982 BFD_ASSERT (st_type
!= STT_GNU_IFUNC
);
3984 branch_offset
= (bfd_signed_vma
)(destination
- location
);
3986 if (r_type
== R_ARM_THM_CALL
|| r_type
== R_ARM_THM_JUMP24
3987 || r_type
== R_ARM_THM_TLS_CALL
|| r_type
== R_ARM_THM_JUMP19
)
3989 /* Handle cases where:
3990 - this call goes too far (different Thumb/Thumb2 max
3992 - it's a Thumb->Arm call and blx is not available, or it's a
3993 Thumb->Arm branch (not bl). A stub is needed in this case,
3994 but only if this call is not through a PLT entry. Indeed,
3995 PLT stubs handle mode switching already. */
3997 && (branch_offset
> THM_MAX_FWD_BRANCH_OFFSET
3998 || (branch_offset
< THM_MAX_BWD_BRANCH_OFFSET
)))
4000 && (branch_offset
> THM2_MAX_FWD_BRANCH_OFFSET
4001 || (branch_offset
< THM2_MAX_BWD_BRANCH_OFFSET
)))
4003 && (branch_offset
> THM2_MAX_FWD_COND_BRANCH_OFFSET
4004 || (branch_offset
< THM2_MAX_BWD_COND_BRANCH_OFFSET
))
4005 && (r_type
== R_ARM_THM_JUMP19
))
4006 || (branch_type
== ST_BRANCH_TO_ARM
4007 && (((r_type
== R_ARM_THM_CALL
4008 || r_type
== R_ARM_THM_TLS_CALL
) && !globals
->use_blx
)
4009 || (r_type
== R_ARM_THM_JUMP24
)
4010 || (r_type
== R_ARM_THM_JUMP19
))
4013 /* If we need to insert a Thumb-Thumb long branch stub to a
4014 PLT, use one that branches directly to the ARM PLT
4015 stub. If we pretended we'd use the pre-PLT Thumb->ARM
4016 stub, undo this now. */
4017 if ((branch_type
== ST_BRANCH_TO_THUMB
) && use_plt
&& !thumb_only
)
4019 branch_type
= ST_BRANCH_TO_ARM
;
4020 branch_offset
+= PLT_THUMB_STUB_SIZE
;
4023 if (branch_type
== ST_BRANCH_TO_THUMB
)
4025 /* Thumb to thumb. */
4028 if (input_sec
->flags
& SEC_ELF_PURECODE
)
4030 (_("%pB(%pA): warning: long branch veneers used in"
4031 " section with SHF_ARM_PURECODE section"
4032 " attribute is only supported for M-profile"
4033 " targets that implement the movw instruction"),
4034 input_bfd
, input_sec
);
4036 stub_type
= (bfd_link_pic (info
) | globals
->pic_veneer
)
4038 ? ((globals
->use_blx
4039 && (r_type
== R_ARM_THM_CALL
))
4040 /* V5T and above. Stub starts with ARM code, so
4041 we must be able to switch mode before
4042 reaching it, which is only possible for 'bl'
4043 (ie R_ARM_THM_CALL relocation). */
4044 ? arm_stub_long_branch_any_thumb_pic
4045 /* On V4T, use Thumb code only. */
4046 : arm_stub_long_branch_v4t_thumb_thumb_pic
)
4048 /* non-PIC stubs. */
4049 : ((globals
->use_blx
4050 && (r_type
== R_ARM_THM_CALL
))
4051 /* V5T and above. */
4052 ? arm_stub_long_branch_any_any
4054 : arm_stub_long_branch_v4t_thumb_thumb
);
4058 if (thumb2_movw
&& (input_sec
->flags
& SEC_ELF_PURECODE
))
4059 stub_type
= arm_stub_long_branch_thumb2_only_pure
;
4062 if (input_sec
->flags
& SEC_ELF_PURECODE
)
4064 (_("%pB(%pA): warning: long branch veneers used in"
4065 " section with SHF_ARM_PURECODE section"
4066 " attribute is only supported for M-profile"
4067 " targets that implement the movw instruction"),
4068 input_bfd
, input_sec
);
4070 stub_type
= (bfd_link_pic (info
) | globals
->pic_veneer
)
4072 ? arm_stub_long_branch_thumb_only_pic
4074 : (thumb2
? arm_stub_long_branch_thumb2_only
4075 : arm_stub_long_branch_thumb_only
);
4081 if (input_sec
->flags
& SEC_ELF_PURECODE
)
4083 (_("%pB(%pA): warning: long branch veneers used in"
4084 " section with SHF_ARM_PURECODE section"
4085 " attribute is only supported" " for M-profile"
4086 " targets that implement the movw instruction"),
4087 input_bfd
, input_sec
);
4091 && sym_sec
->owner
!= NULL
4092 && !INTERWORK_FLAG (sym_sec
->owner
))
4095 (_("%pB(%s): warning: interworking not enabled;"
4096 " first occurrence: %pB: %s call to %s"),
4097 sym_sec
->owner
, name
, input_bfd
, "Thumb", "ARM");
4101 (bfd_link_pic (info
) | globals
->pic_veneer
)
4103 ? (r_type
== R_ARM_THM_TLS_CALL
4104 /* TLS PIC stubs. */
4105 ? (globals
->use_blx
? arm_stub_long_branch_any_tls_pic
4106 : arm_stub_long_branch_v4t_thumb_tls_pic
)
4107 : ((globals
->use_blx
&& r_type
== R_ARM_THM_CALL
)
4108 /* V5T PIC and above. */
4109 ? arm_stub_long_branch_any_arm_pic
4111 : arm_stub_long_branch_v4t_thumb_arm_pic
))
4113 /* non-PIC stubs. */
4114 : ((globals
->use_blx
&& r_type
== R_ARM_THM_CALL
)
4115 /* V5T and above. */
4116 ? arm_stub_long_branch_any_any
4118 : arm_stub_long_branch_v4t_thumb_arm
);
4120 /* Handle v4t short branches. */
4121 if ((stub_type
== arm_stub_long_branch_v4t_thumb_arm
)
4122 && (branch_offset
<= THM_MAX_FWD_BRANCH_OFFSET
)
4123 && (branch_offset
>= THM_MAX_BWD_BRANCH_OFFSET
))
4124 stub_type
= arm_stub_short_branch_v4t_thumb_arm
;
4128 else if (r_type
== R_ARM_CALL
4129 || r_type
== R_ARM_JUMP24
4130 || r_type
== R_ARM_PLT32
4131 || r_type
== R_ARM_TLS_CALL
)
4133 if (input_sec
->flags
& SEC_ELF_PURECODE
)
4135 (_("%pB(%pA): warning: long branch veneers used in"
4136 " section with SHF_ARM_PURECODE section"
4137 " attribute is only supported for M-profile"
4138 " targets that implement the movw instruction"),
4139 input_bfd
, input_sec
);
4140 if (branch_type
== ST_BRANCH_TO_THUMB
)
4145 && sym_sec
->owner
!= NULL
4146 && !INTERWORK_FLAG (sym_sec
->owner
))
4149 (_("%pB(%s): warning: interworking not enabled;"
4150 " first occurrence: %pB: %s call to %s"),
4151 sym_sec
->owner
, name
, input_bfd
, "ARM", "Thumb");
4154 /* We have an extra 2-bytes reach because of
4155 the mode change (bit 24 (H) of BLX encoding). */
4156 if (branch_offset
> (ARM_MAX_FWD_BRANCH_OFFSET
+ 2)
4157 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
)
4158 || (r_type
== R_ARM_CALL
&& !globals
->use_blx
)
4159 || (r_type
== R_ARM_JUMP24
)
4160 || (r_type
== R_ARM_PLT32
))
4162 stub_type
= (bfd_link_pic (info
) | globals
->pic_veneer
)
4164 ? ((globals
->use_blx
)
4165 /* V5T and above. */
4166 ? arm_stub_long_branch_any_thumb_pic
4168 : arm_stub_long_branch_v4t_arm_thumb_pic
)
4170 /* non-PIC stubs. */
4171 : ((globals
->use_blx
)
4172 /* V5T and above. */
4173 ? arm_stub_long_branch_any_any
4175 : arm_stub_long_branch_v4t_arm_thumb
);
4181 if (branch_offset
> ARM_MAX_FWD_BRANCH_OFFSET
4182 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
))
4185 (bfd_link_pic (info
) | globals
->pic_veneer
)
4187 ? (r_type
== R_ARM_TLS_CALL
4189 ? arm_stub_long_branch_any_tls_pic
4191 ? arm_stub_long_branch_arm_nacl_pic
4192 : arm_stub_long_branch_any_arm_pic
))
4193 /* non-PIC stubs. */
4195 ? arm_stub_long_branch_arm_nacl
4196 : arm_stub_long_branch_any_any
);
4201 /* If a stub is needed, record the actual destination type. */
4202 if (stub_type
!= arm_stub_none
)
4203 *actual_branch_type
= branch_type
;
4208 /* Build a name for an entry in the stub hash table. */
4211 elf32_arm_stub_name (const asection
*input_section
,
4212 const asection
*sym_sec
,
4213 const struct elf32_arm_link_hash_entry
*hash
,
4214 const Elf_Internal_Rela
*rel
,
4215 enum elf32_arm_stub_type stub_type
)
4222 len
= 8 + 1 + strlen (hash
->root
.root
.root
.string
) + 1 + 8 + 1 + 2 + 1;
4223 stub_name
= (char *) bfd_malloc (len
);
4224 if (stub_name
!= NULL
)
4225 sprintf (stub_name
, "%08x_%s+%x_%d",
4226 input_section
->id
& 0xffffffff,
4227 hash
->root
.root
.root
.string
,
4228 (int) rel
->r_addend
& 0xffffffff,
4233 len
= 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
4234 stub_name
= (char *) bfd_malloc (len
);
4235 if (stub_name
!= NULL
)
4236 sprintf (stub_name
, "%08x_%x:%x+%x_%d",
4237 input_section
->id
& 0xffffffff,
4238 sym_sec
->id
& 0xffffffff,
4239 ELF32_R_TYPE (rel
->r_info
) == R_ARM_TLS_CALL
4240 || ELF32_R_TYPE (rel
->r_info
) == R_ARM_THM_TLS_CALL
4241 ? 0 : (int) ELF32_R_SYM (rel
->r_info
) & 0xffffffff,
4242 (int) rel
->r_addend
& 0xffffffff,
4249 /* Look up an entry in the stub hash. Stub entries are cached because
4250 creating the stub name takes a bit of time. */
4252 static struct elf32_arm_stub_hash_entry
*
4253 elf32_arm_get_stub_entry (const asection
*input_section
,
4254 const asection
*sym_sec
,
4255 struct elf_link_hash_entry
*hash
,
4256 const Elf_Internal_Rela
*rel
,
4257 struct elf32_arm_link_hash_table
*htab
,
4258 enum elf32_arm_stub_type stub_type
)
4260 struct elf32_arm_stub_hash_entry
*stub_entry
;
4261 struct elf32_arm_link_hash_entry
*h
= (struct elf32_arm_link_hash_entry
*) hash
;
4262 const asection
*id_sec
;
4264 if ((input_section
->flags
& SEC_CODE
) == 0)
4267 /* If this input section is part of a group of sections sharing one
4268 stub section, then use the id of the first section in the group.
4269 Stub names need to include a section id, as there may well be
4270 more than one stub used to reach say, printf, and we need to
4271 distinguish between them. */
4272 BFD_ASSERT (input_section
->id
<= htab
->top_id
);
4273 id_sec
= htab
->stub_group
[input_section
->id
].link_sec
;
4275 if (h
!= NULL
&& h
->stub_cache
!= NULL
4276 && h
->stub_cache
->h
== h
4277 && h
->stub_cache
->id_sec
== id_sec
4278 && h
->stub_cache
->stub_type
== stub_type
)
4280 stub_entry
= h
->stub_cache
;
4286 stub_name
= elf32_arm_stub_name (id_sec
, sym_sec
, h
, rel
, stub_type
);
4287 if (stub_name
== NULL
)
4290 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
,
4291 stub_name
, FALSE
, FALSE
);
4293 h
->stub_cache
= stub_entry
;
4301 /* Whether veneers of type STUB_TYPE require to be in a dedicated output
4305 arm_dedicated_stub_output_section_required (enum elf32_arm_stub_type stub_type
)
4307 if (stub_type
>= max_stub_type
)
4308 abort (); /* Should be unreachable. */
4312 case arm_stub_cmse_branch_thumb_only
:
4319 abort (); /* Should be unreachable. */
4322 /* Required alignment (as a power of 2) for the dedicated section holding
4323 veneers of type STUB_TYPE, or 0 if veneers of this type are interspersed
4324 with input sections. */
4327 arm_dedicated_stub_output_section_required_alignment
4328 (enum elf32_arm_stub_type stub_type
)
4330 if (stub_type
>= max_stub_type
)
4331 abort (); /* Should be unreachable. */
4335 /* Vectors of Secure Gateway veneers must be aligned on 32byte
4337 case arm_stub_cmse_branch_thumb_only
:
4341 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type
));
4345 abort (); /* Should be unreachable. */
4348 /* Name of the dedicated output section to put veneers of type STUB_TYPE, or
4349 NULL if veneers of this type are interspersed with input sections. */
4352 arm_dedicated_stub_output_section_name (enum elf32_arm_stub_type stub_type
)
4354 if (stub_type
>= max_stub_type
)
4355 abort (); /* Should be unreachable. */
4359 case arm_stub_cmse_branch_thumb_only
:
4360 return ".gnu.sgstubs";
4363 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type
));
4367 abort (); /* Should be unreachable. */
4370 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4371 returns the address of the hash table field in HTAB holding a pointer to the
4372 corresponding input section. Otherwise, returns NULL. */
4375 arm_dedicated_stub_input_section_ptr (struct elf32_arm_link_hash_table
*htab
,
4376 enum elf32_arm_stub_type stub_type
)
4378 if (stub_type
>= max_stub_type
)
4379 abort (); /* Should be unreachable. */
4383 case arm_stub_cmse_branch_thumb_only
:
4384 return &htab
->cmse_stub_sec
;
4387 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type
));
4391 abort (); /* Should be unreachable. */
4394 /* Find or create a stub section to contain a stub of type STUB_TYPE. SECTION
4395 is the section that branch into veneer and can be NULL if stub should go in
4396 a dedicated output section. Returns a pointer to the stub section, and the
4397 section to which the stub section will be attached (in *LINK_SEC_P).
4398 LINK_SEC_P may be NULL. */
4401 elf32_arm_create_or_find_stub_sec (asection
**link_sec_p
, asection
*section
,
4402 struct elf32_arm_link_hash_table
*htab
,
4403 enum elf32_arm_stub_type stub_type
)
4405 asection
*link_sec
, *out_sec
, **stub_sec_p
;
4406 const char *stub_sec_prefix
;
4407 bfd_boolean dedicated_output_section
=
4408 arm_dedicated_stub_output_section_required (stub_type
);
4411 if (dedicated_output_section
)
4413 bfd
*output_bfd
= htab
->obfd
;
4414 const char *out_sec_name
=
4415 arm_dedicated_stub_output_section_name (stub_type
);
4417 stub_sec_p
= arm_dedicated_stub_input_section_ptr (htab
, stub_type
);
4418 stub_sec_prefix
= out_sec_name
;
4419 align
= arm_dedicated_stub_output_section_required_alignment (stub_type
);
4420 out_sec
= bfd_get_section_by_name (output_bfd
, out_sec_name
);
4421 if (out_sec
== NULL
)
4423 _bfd_error_handler (_("no address assigned to the veneers output "
4424 "section %s"), out_sec_name
);
4430 BFD_ASSERT (section
->id
<= htab
->top_id
);
4431 link_sec
= htab
->stub_group
[section
->id
].link_sec
;
4432 BFD_ASSERT (link_sec
!= NULL
);
4433 stub_sec_p
= &htab
->stub_group
[section
->id
].stub_sec
;
4434 if (*stub_sec_p
== NULL
)
4435 stub_sec_p
= &htab
->stub_group
[link_sec
->id
].stub_sec
;
4436 stub_sec_prefix
= link_sec
->name
;
4437 out_sec
= link_sec
->output_section
;
4438 align
= htab
->nacl_p
? 4 : 3;
4441 if (*stub_sec_p
== NULL
)
4447 namelen
= strlen (stub_sec_prefix
);
4448 len
= namelen
+ sizeof (STUB_SUFFIX
);
4449 s_name
= (char *) bfd_alloc (htab
->stub_bfd
, len
);
4453 memcpy (s_name
, stub_sec_prefix
, namelen
);
4454 memcpy (s_name
+ namelen
, STUB_SUFFIX
, sizeof (STUB_SUFFIX
));
4455 *stub_sec_p
= (*htab
->add_stub_section
) (s_name
, out_sec
, link_sec
,
4457 if (*stub_sec_p
== NULL
)
4460 out_sec
->flags
|= SEC_ALLOC
| SEC_LOAD
| SEC_READONLY
| SEC_CODE
4461 | SEC_HAS_CONTENTS
| SEC_RELOC
| SEC_IN_MEMORY
4465 if (!dedicated_output_section
)
4466 htab
->stub_group
[section
->id
].stub_sec
= *stub_sec_p
;
4469 *link_sec_p
= link_sec
;
4474 /* Add a new stub entry to the stub hash. Not all fields of the new
4475 stub entry are initialised. */
4477 static struct elf32_arm_stub_hash_entry
*
4478 elf32_arm_add_stub (const char *stub_name
, asection
*section
,
4479 struct elf32_arm_link_hash_table
*htab
,
4480 enum elf32_arm_stub_type stub_type
)
4484 struct elf32_arm_stub_hash_entry
*stub_entry
;
4486 stub_sec
= elf32_arm_create_or_find_stub_sec (&link_sec
, section
, htab
,
4488 if (stub_sec
== NULL
)
4491 /* Enter this entry into the linker stub hash table. */
4492 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
, stub_name
,
4494 if (stub_entry
== NULL
)
4496 if (section
== NULL
)
4498 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
4499 section
->owner
, stub_name
);
4503 stub_entry
->stub_sec
= stub_sec
;
4504 stub_entry
->stub_offset
= (bfd_vma
) -1;
4505 stub_entry
->id_sec
= link_sec
;
4510 /* Store an Arm insn into an output section not processed by
4511 elf32_arm_write_section. */
4514 put_arm_insn (struct elf32_arm_link_hash_table
* htab
,
4515 bfd
* output_bfd
, bfd_vma val
, void * ptr
)
4517 if (htab
->byteswap_code
!= bfd_little_endian (output_bfd
))
4518 bfd_putl32 (val
, ptr
);
4520 bfd_putb32 (val
, ptr
);
4523 /* Store a 16-bit Thumb insn into an output section not processed by
4524 elf32_arm_write_section. */
4527 put_thumb_insn (struct elf32_arm_link_hash_table
* htab
,
4528 bfd
* output_bfd
, bfd_vma val
, void * ptr
)
4530 if (htab
->byteswap_code
!= bfd_little_endian (output_bfd
))
4531 bfd_putl16 (val
, ptr
);
4533 bfd_putb16 (val
, ptr
);
4536 /* Store a Thumb2 insn into an output section not processed by
4537 elf32_arm_write_section. */
4540 put_thumb2_insn (struct elf32_arm_link_hash_table
* htab
,
4541 bfd
* output_bfd
, bfd_vma val
, bfd_byte
* ptr
)
4543 /* T2 instructions are 16-bit streamed. */
4544 if (htab
->byteswap_code
!= bfd_little_endian (output_bfd
))
4546 bfd_putl16 ((val
>> 16) & 0xffff, ptr
);
4547 bfd_putl16 ((val
& 0xffff), ptr
+ 2);
4551 bfd_putb16 ((val
>> 16) & 0xffff, ptr
);
4552 bfd_putb16 ((val
& 0xffff), ptr
+ 2);
4556 /* If it's possible to change R_TYPE to a more efficient access
4557 model, return the new reloc type. */
4560 elf32_arm_tls_transition (struct bfd_link_info
*info
, int r_type
,
4561 struct elf_link_hash_entry
*h
)
4563 int is_local
= (h
== NULL
);
4565 if (bfd_link_pic (info
)
4566 || (h
&& h
->root
.type
== bfd_link_hash_undefweak
))
4569 /* We do not support relaxations for Old TLS models. */
4572 case R_ARM_TLS_GOTDESC
:
4573 case R_ARM_TLS_CALL
:
4574 case R_ARM_THM_TLS_CALL
:
4575 case R_ARM_TLS_DESCSEQ
:
4576 case R_ARM_THM_TLS_DESCSEQ
:
4577 return is_local
? R_ARM_TLS_LE32
: R_ARM_TLS_IE32
;
4583 static bfd_reloc_status_type elf32_arm_final_link_relocate
4584 (reloc_howto_type
*, bfd
*, bfd
*, asection
*, bfd_byte
*,
4585 Elf_Internal_Rela
*, bfd_vma
, struct bfd_link_info
*, asection
*,
4586 const char *, unsigned char, enum arm_st_branch_type
,
4587 struct elf_link_hash_entry
*, bfd_boolean
*, char **);
4590 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type
)
4594 case arm_stub_a8_veneer_b_cond
:
4595 case arm_stub_a8_veneer_b
:
4596 case arm_stub_a8_veneer_bl
:
4599 case arm_stub_long_branch_any_any
:
4600 case arm_stub_long_branch_v4t_arm_thumb
:
4601 case arm_stub_long_branch_thumb_only
:
4602 case arm_stub_long_branch_thumb2_only
:
4603 case arm_stub_long_branch_thumb2_only_pure
:
4604 case arm_stub_long_branch_v4t_thumb_thumb
:
4605 case arm_stub_long_branch_v4t_thumb_arm
:
4606 case arm_stub_short_branch_v4t_thumb_arm
:
4607 case arm_stub_long_branch_any_arm_pic
:
4608 case arm_stub_long_branch_any_thumb_pic
:
4609 case arm_stub_long_branch_v4t_thumb_thumb_pic
:
4610 case arm_stub_long_branch_v4t_arm_thumb_pic
:
4611 case arm_stub_long_branch_v4t_thumb_arm_pic
:
4612 case arm_stub_long_branch_thumb_only_pic
:
4613 case arm_stub_long_branch_any_tls_pic
:
4614 case arm_stub_long_branch_v4t_thumb_tls_pic
:
4615 case arm_stub_cmse_branch_thumb_only
:
4616 case arm_stub_a8_veneer_blx
:
4619 case arm_stub_long_branch_arm_nacl
:
4620 case arm_stub_long_branch_arm_nacl_pic
:
4624 abort (); /* Should be unreachable. */
4628 /* Returns whether stubs of type STUB_TYPE take over the symbol they are
4629 veneering (TRUE) or have their own symbol (FALSE). */
4632 arm_stub_sym_claimed (enum elf32_arm_stub_type stub_type
)
4634 if (stub_type
>= max_stub_type
)
4635 abort (); /* Should be unreachable. */
4639 case arm_stub_cmse_branch_thumb_only
:
4646 abort (); /* Should be unreachable. */
4649 /* Returns the padding needed for the dedicated section used stubs of type
4653 arm_dedicated_stub_section_padding (enum elf32_arm_stub_type stub_type
)
4655 if (stub_type
>= max_stub_type
)
4656 abort (); /* Should be unreachable. */
4660 case arm_stub_cmse_branch_thumb_only
:
4667 abort (); /* Should be unreachable. */
4670 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4671 returns the address of the hash table field in HTAB holding the offset at
4672 which new veneers should be layed out in the stub section. */
4675 arm_new_stubs_start_offset_ptr (struct elf32_arm_link_hash_table
*htab
,
4676 enum elf32_arm_stub_type stub_type
)
4680 case arm_stub_cmse_branch_thumb_only
:
4681 return &htab
->new_cmse_stub_offset
;
4684 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type
));
4690 arm_build_one_stub (struct bfd_hash_entry
*gen_entry
,
4694 bfd_boolean removed_sg_veneer
;
4695 struct elf32_arm_stub_hash_entry
*stub_entry
;
4696 struct elf32_arm_link_hash_table
*globals
;
4697 struct bfd_link_info
*info
;
4704 const insn_sequence
*template_sequence
;
4706 int stub_reloc_idx
[MAXRELOCS
] = {-1, -1};
4707 int stub_reloc_offset
[MAXRELOCS
] = {0, 0};
4709 int just_allocated
= 0;
4711 /* Massage our args to the form they really have. */
4712 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
4713 info
= (struct bfd_link_info
*) in_arg
;
4715 globals
= elf32_arm_hash_table (info
);
4716 if (globals
== NULL
)
4719 stub_sec
= stub_entry
->stub_sec
;
4721 if ((globals
->fix_cortex_a8
< 0)
4722 != (arm_stub_required_alignment (stub_entry
->stub_type
) == 2))
4723 /* We have to do less-strictly-aligned fixes last. */
4726 /* Assign a slot at the end of section if none assigned yet. */
4727 if (stub_entry
->stub_offset
== (bfd_vma
) -1)
4729 stub_entry
->stub_offset
= stub_sec
->size
;
4732 loc
= stub_sec
->contents
+ stub_entry
->stub_offset
;
4734 stub_bfd
= stub_sec
->owner
;
4736 /* This is the address of the stub destination. */
4737 sym_value
= (stub_entry
->target_value
4738 + stub_entry
->target_section
->output_offset
4739 + stub_entry
->target_section
->output_section
->vma
);
4741 template_sequence
= stub_entry
->stub_template
;
4742 template_size
= stub_entry
->stub_template_size
;
4745 for (i
= 0; i
< template_size
; i
++)
4747 switch (template_sequence
[i
].type
)
4751 bfd_vma data
= (bfd_vma
) template_sequence
[i
].data
;
4752 if (template_sequence
[i
].reloc_addend
!= 0)
4754 /* We've borrowed the reloc_addend field to mean we should
4755 insert a condition code into this (Thumb-1 branch)
4756 instruction. See THUMB16_BCOND_INSN. */
4757 BFD_ASSERT ((data
& 0xff00) == 0xd000);
4758 data
|= ((stub_entry
->orig_insn
>> 22) & 0xf) << 8;
4760 bfd_put_16 (stub_bfd
, data
, loc
+ size
);
4766 bfd_put_16 (stub_bfd
,
4767 (template_sequence
[i
].data
>> 16) & 0xffff,
4769 bfd_put_16 (stub_bfd
, template_sequence
[i
].data
& 0xffff,
4771 if (template_sequence
[i
].r_type
!= R_ARM_NONE
)
4773 stub_reloc_idx
[nrelocs
] = i
;
4774 stub_reloc_offset
[nrelocs
++] = size
;
4780 bfd_put_32 (stub_bfd
, template_sequence
[i
].data
,
4782 /* Handle cases where the target is encoded within the
4784 if (template_sequence
[i
].r_type
== R_ARM_JUMP24
)
4786 stub_reloc_idx
[nrelocs
] = i
;
4787 stub_reloc_offset
[nrelocs
++] = size
;
4793 bfd_put_32 (stub_bfd
, template_sequence
[i
].data
, loc
+ size
);
4794 stub_reloc_idx
[nrelocs
] = i
;
4795 stub_reloc_offset
[nrelocs
++] = size
;
4806 stub_sec
->size
+= size
;
4808 /* Stub size has already been computed in arm_size_one_stub. Check
4810 BFD_ASSERT (size
== stub_entry
->stub_size
);
4812 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
4813 if (stub_entry
->branch_type
== ST_BRANCH_TO_THUMB
)
4816 /* Assume non empty slots have at least one and at most MAXRELOCS entries
4817 to relocate in each stub. */
4819 (size
== 0 && stub_entry
->stub_type
== arm_stub_cmse_branch_thumb_only
);
4820 BFD_ASSERT (removed_sg_veneer
|| (nrelocs
!= 0 && nrelocs
<= MAXRELOCS
));
4822 for (i
= 0; i
< nrelocs
; i
++)
4824 Elf_Internal_Rela rel
;
4825 bfd_boolean unresolved_reloc
;
4826 char *error_message
;
4828 sym_value
+ template_sequence
[stub_reloc_idx
[i
]].reloc_addend
;
4830 rel
.r_offset
= stub_entry
->stub_offset
+ stub_reloc_offset
[i
];
4831 rel
.r_info
= ELF32_R_INFO (0,
4832 template_sequence
[stub_reloc_idx
[i
]].r_type
);
4835 if (stub_entry
->stub_type
== arm_stub_a8_veneer_b_cond
&& i
== 0)
4836 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
4837 template should refer back to the instruction after the original
4838 branch. We use target_section as Cortex-A8 erratum workaround stubs
4839 are only generated when both source and target are in the same
4841 points_to
= stub_entry
->target_section
->output_section
->vma
4842 + stub_entry
->target_section
->output_offset
4843 + stub_entry
->source_value
;
4845 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4846 (template_sequence
[stub_reloc_idx
[i
]].r_type
),
4847 stub_bfd
, info
->output_bfd
, stub_sec
, stub_sec
->contents
, &rel
,
4848 points_to
, info
, stub_entry
->target_section
, "", STT_FUNC
,
4849 stub_entry
->branch_type
,
4850 (struct elf_link_hash_entry
*) stub_entry
->h
, &unresolved_reloc
,
4858 /* Calculate the template, template size and instruction size for a stub.
4859 Return value is the instruction size. */
4862 find_stub_size_and_template (enum elf32_arm_stub_type stub_type
,
4863 const insn_sequence
**stub_template
,
4864 int *stub_template_size
)
4866 const insn_sequence
*template_sequence
= NULL
;
4867 int template_size
= 0, i
;
4870 template_sequence
= stub_definitions
[stub_type
].template_sequence
;
4872 *stub_template
= template_sequence
;
4874 template_size
= stub_definitions
[stub_type
].template_size
;
4875 if (stub_template_size
)
4876 *stub_template_size
= template_size
;
4879 for (i
= 0; i
< template_size
; i
++)
4881 switch (template_sequence
[i
].type
)
4902 /* As above, but don't actually build the stub. Just bump offset so
4903 we know stub section sizes. */
4906 arm_size_one_stub (struct bfd_hash_entry
*gen_entry
,
4907 void *in_arg ATTRIBUTE_UNUSED
)
4909 struct elf32_arm_stub_hash_entry
*stub_entry
;
4910 const insn_sequence
*template_sequence
;
4911 int template_size
, size
;
4913 /* Massage our args to the form they really have. */
4914 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
4916 BFD_ASSERT((stub_entry
->stub_type
> arm_stub_none
)
4917 && stub_entry
->stub_type
< ARRAY_SIZE(stub_definitions
));
4919 size
= find_stub_size_and_template (stub_entry
->stub_type
, &template_sequence
,
4922 /* Initialized to -1. Null size indicates an empty slot full of zeros. */
4923 if (stub_entry
->stub_template_size
)
4925 stub_entry
->stub_size
= size
;
4926 stub_entry
->stub_template
= template_sequence
;
4927 stub_entry
->stub_template_size
= template_size
;
4930 /* Already accounted for. */
4931 if (stub_entry
->stub_offset
!= (bfd_vma
) -1)
4934 size
= (size
+ 7) & ~7;
4935 stub_entry
->stub_sec
->size
+= size
;
4940 /* External entry points for sizing and building linker stubs. */
4942 /* Set up various things so that we can make a list of input sections
4943 for each output section included in the link. Returns -1 on error,
4944 0 when no stubs will be needed, and 1 on success. */
4947 elf32_arm_setup_section_lists (bfd
*output_bfd
,
4948 struct bfd_link_info
*info
)
4951 unsigned int bfd_count
;
4952 unsigned int top_id
, top_index
;
4954 asection
**input_list
, **list
;
4956 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
4960 if (! is_elf_hash_table (htab
))
4963 /* Count the number of input BFDs and find the top input section id. */
4964 for (input_bfd
= info
->input_bfds
, bfd_count
= 0, top_id
= 0;
4966 input_bfd
= input_bfd
->link
.next
)
4969 for (section
= input_bfd
->sections
;
4971 section
= section
->next
)
4973 if (top_id
< section
->id
)
4974 top_id
= section
->id
;
4977 htab
->bfd_count
= bfd_count
;
4979 amt
= sizeof (struct map_stub
) * (top_id
+ 1);
4980 htab
->stub_group
= (struct map_stub
*) bfd_zmalloc (amt
);
4981 if (htab
->stub_group
== NULL
)
4983 htab
->top_id
= top_id
;
4985 /* We can't use output_bfd->section_count here to find the top output
4986 section index as some sections may have been removed, and
4987 _bfd_strip_section_from_output doesn't renumber the indices. */
4988 for (section
= output_bfd
->sections
, top_index
= 0;
4990 section
= section
->next
)
4992 if (top_index
< section
->index
)
4993 top_index
= section
->index
;
4996 htab
->top_index
= top_index
;
4997 amt
= sizeof (asection
*) * (top_index
+ 1);
4998 input_list
= (asection
**) bfd_malloc (amt
);
4999 htab
->input_list
= input_list
;
5000 if (input_list
== NULL
)
5003 /* For sections we aren't interested in, mark their entries with a
5004 value we can check later. */
5005 list
= input_list
+ top_index
;
5007 *list
= bfd_abs_section_ptr
;
5008 while (list
-- != input_list
);
5010 for (section
= output_bfd
->sections
;
5012 section
= section
->next
)
5014 if ((section
->flags
& SEC_CODE
) != 0)
5015 input_list
[section
->index
] = NULL
;
5021 /* The linker repeatedly calls this function for each input section,
5022 in the order that input sections are linked into output sections.
5023 Build lists of input sections to determine groupings between which
5024 we may insert linker stubs. */
5027 elf32_arm_next_input_section (struct bfd_link_info
*info
,
5030 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
5035 if (isec
->output_section
->index
<= htab
->top_index
)
5037 asection
**list
= htab
->input_list
+ isec
->output_section
->index
;
5039 if (*list
!= bfd_abs_section_ptr
&& (isec
->flags
& SEC_CODE
) != 0)
5041 /* Steal the link_sec pointer for our list. */
5042 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
5043 /* This happens to make the list in reverse order,
5044 which we reverse later. */
5045 PREV_SEC (isec
) = *list
;
5051 /* See whether we can group stub sections together. Grouping stub
5052 sections may result in fewer stubs. More importantly, we need to
5053 put all .init* and .fini* stubs at the end of the .init or
5054 .fini output sections respectively, because glibc splits the
5055 _init and _fini functions into multiple parts. Putting a stub in
5056 the middle of a function is not a good idea. */
5059 group_sections (struct elf32_arm_link_hash_table
*htab
,
5060 bfd_size_type stub_group_size
,
5061 bfd_boolean stubs_always_after_branch
)
5063 asection
**list
= htab
->input_list
;
5067 asection
*tail
= *list
;
5070 if (tail
== bfd_abs_section_ptr
)
5073 /* Reverse the list: we must avoid placing stubs at the
5074 beginning of the section because the beginning of the text
5075 section may be required for an interrupt vector in bare metal
5077 #define NEXT_SEC PREV_SEC
5079 while (tail
!= NULL
)
5081 /* Pop from tail. */
5082 asection
*item
= tail
;
5083 tail
= PREV_SEC (item
);
5086 NEXT_SEC (item
) = head
;
5090 while (head
!= NULL
)
5094 bfd_vma stub_group_start
= head
->output_offset
;
5095 bfd_vma end_of_next
;
5098 while (NEXT_SEC (curr
) != NULL
)
5100 next
= NEXT_SEC (curr
);
5101 end_of_next
= next
->output_offset
+ next
->size
;
5102 if (end_of_next
- stub_group_start
>= stub_group_size
)
5103 /* End of NEXT is too far from start, so stop. */
5105 /* Add NEXT to the group. */
5109 /* OK, the size from the start to the start of CURR is less
5110 than stub_group_size and thus can be handled by one stub
5111 section. (Or the head section is itself larger than
5112 stub_group_size, in which case we may be toast.)
5113 We should really be keeping track of the total size of
5114 stubs added here, as stubs contribute to the final output
5118 next
= NEXT_SEC (head
);
5119 /* Set up this stub group. */
5120 htab
->stub_group
[head
->id
].link_sec
= curr
;
5122 while (head
!= curr
&& (head
= next
) != NULL
);
5124 /* But wait, there's more! Input sections up to stub_group_size
5125 bytes after the stub section can be handled by it too. */
5126 if (!stubs_always_after_branch
)
5128 stub_group_start
= curr
->output_offset
+ curr
->size
;
5130 while (next
!= NULL
)
5132 end_of_next
= next
->output_offset
+ next
->size
;
5133 if (end_of_next
- stub_group_start
>= stub_group_size
)
5134 /* End of NEXT is too far from stubs, so stop. */
5136 /* Add NEXT to the stub group. */
5138 next
= NEXT_SEC (head
);
5139 htab
->stub_group
[head
->id
].link_sec
= curr
;
5145 while (list
++ != htab
->input_list
+ htab
->top_index
);
5147 free (htab
->input_list
);
5152 /* Comparison function for sorting/searching relocations relating to Cortex-A8
5156 a8_reloc_compare (const void *a
, const void *b
)
5158 const struct a8_erratum_reloc
*ra
= (const struct a8_erratum_reloc
*) a
;
5159 const struct a8_erratum_reloc
*rb
= (const struct a8_erratum_reloc
*) b
;
5161 if (ra
->from
< rb
->from
)
5163 else if (ra
->from
> rb
->from
)
5169 static struct elf_link_hash_entry
*find_thumb_glue (struct bfd_link_info
*,
5170 const char *, char **);
5172 /* Helper function to scan code for sequences which might trigger the Cortex-A8
5173 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
5174 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
5178 cortex_a8_erratum_scan (bfd
*input_bfd
,
5179 struct bfd_link_info
*info
,
5180 struct a8_erratum_fix
**a8_fixes_p
,
5181 unsigned int *num_a8_fixes_p
,
5182 unsigned int *a8_fix_table_size_p
,
5183 struct a8_erratum_reloc
*a8_relocs
,
5184 unsigned int num_a8_relocs
,
5185 unsigned prev_num_a8_fixes
,
5186 bfd_boolean
*stub_changed_p
)
5189 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
5190 struct a8_erratum_fix
*a8_fixes
= *a8_fixes_p
;
5191 unsigned int num_a8_fixes
= *num_a8_fixes_p
;
5192 unsigned int a8_fix_table_size
= *a8_fix_table_size_p
;
5197 for (section
= input_bfd
->sections
;
5199 section
= section
->next
)
5201 bfd_byte
*contents
= NULL
;
5202 struct _arm_elf_section_data
*sec_data
;
5206 if (elf_section_type (section
) != SHT_PROGBITS
5207 || (elf_section_flags (section
) & SHF_EXECINSTR
) == 0
5208 || (section
->flags
& SEC_EXCLUDE
) != 0
5209 || (section
->sec_info_type
== SEC_INFO_TYPE_JUST_SYMS
)
5210 || (section
->output_section
== bfd_abs_section_ptr
))
5213 base_vma
= section
->output_section
->vma
+ section
->output_offset
;
5215 if (elf_section_data (section
)->this_hdr
.contents
!= NULL
)
5216 contents
= elf_section_data (section
)->this_hdr
.contents
;
5217 else if (! bfd_malloc_and_get_section (input_bfd
, section
, &contents
))
5220 sec_data
= elf32_arm_section_data (section
);
5222 for (span
= 0; span
< sec_data
->mapcount
; span
++)
5224 unsigned int span_start
= sec_data
->map
[span
].vma
;
5225 unsigned int span_end
= (span
== sec_data
->mapcount
- 1)
5226 ? section
->size
: sec_data
->map
[span
+ 1].vma
;
5228 char span_type
= sec_data
->map
[span
].type
;
5229 bfd_boolean last_was_32bit
= FALSE
, last_was_branch
= FALSE
;
5231 if (span_type
!= 't')
5234 /* Span is entirely within a single 4KB region: skip scanning. */
5235 if (((base_vma
+ span_start
) & ~0xfff)
5236 == ((base_vma
+ span_end
) & ~0xfff))
5239 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
5241 * The opcode is BLX.W, BL.W, B.W, Bcc.W
5242 * The branch target is in the same 4KB region as the
5243 first half of the branch.
5244 * The instruction before the branch is a 32-bit
5245 length non-branch instruction. */
5246 for (i
= span_start
; i
< span_end
;)
5248 unsigned int insn
= bfd_getl16 (&contents
[i
]);
5249 bfd_boolean insn_32bit
= FALSE
, is_blx
= FALSE
, is_b
= FALSE
;
5250 bfd_boolean is_bl
= FALSE
, is_bcc
= FALSE
, is_32bit_branch
;
5252 if ((insn
& 0xe000) == 0xe000 && (insn
& 0x1800) != 0x0000)
5257 /* Load the rest of the insn (in manual-friendly order). */
5258 insn
= (insn
<< 16) | bfd_getl16 (&contents
[i
+ 2]);
5260 /* Encoding T4: B<c>.W. */
5261 is_b
= (insn
& 0xf800d000) == 0xf0009000;
5262 /* Encoding T1: BL<c>.W. */
5263 is_bl
= (insn
& 0xf800d000) == 0xf000d000;
5264 /* Encoding T2: BLX<c>.W. */
5265 is_blx
= (insn
& 0xf800d000) == 0xf000c000;
5266 /* Encoding T3: B<c>.W (not permitted in IT block). */
5267 is_bcc
= (insn
& 0xf800d000) == 0xf0008000
5268 && (insn
& 0x07f00000) != 0x03800000;
5271 is_32bit_branch
= is_b
|| is_bl
|| is_blx
|| is_bcc
;
5273 if (((base_vma
+ i
) & 0xfff) == 0xffe
5277 && ! last_was_branch
)
5279 bfd_signed_vma offset
= 0;
5280 bfd_boolean force_target_arm
= FALSE
;
5281 bfd_boolean force_target_thumb
= FALSE
;
5283 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
5284 struct a8_erratum_reloc key
, *found
;
5285 bfd_boolean use_plt
= FALSE
;
5287 key
.from
= base_vma
+ i
;
5288 found
= (struct a8_erratum_reloc
*)
5289 bsearch (&key
, a8_relocs
, num_a8_relocs
,
5290 sizeof (struct a8_erratum_reloc
),
5295 char *error_message
= NULL
;
5296 struct elf_link_hash_entry
*entry
;
5298 /* We don't care about the error returned from this
5299 function, only if there is glue or not. */
5300 entry
= find_thumb_glue (info
, found
->sym_name
,
5304 found
->non_a8_stub
= TRUE
;
5306 /* Keep a simpler condition, for the sake of clarity. */
5307 if (htab
->root
.splt
!= NULL
&& found
->hash
!= NULL
5308 && found
->hash
->root
.plt
.offset
!= (bfd_vma
) -1)
5311 if (found
->r_type
== R_ARM_THM_CALL
)
5313 if (found
->branch_type
== ST_BRANCH_TO_ARM
5315 force_target_arm
= TRUE
;
5317 force_target_thumb
= TRUE
;
5321 /* Check if we have an offending branch instruction. */
5323 if (found
&& found
->non_a8_stub
)
5324 /* We've already made a stub for this instruction, e.g.
5325 it's a long branch or a Thumb->ARM stub. Assume that
5326 stub will suffice to work around the A8 erratum (see
5327 setting of always_after_branch above). */
5331 offset
= (insn
& 0x7ff) << 1;
5332 offset
|= (insn
& 0x3f0000) >> 4;
5333 offset
|= (insn
& 0x2000) ? 0x40000 : 0;
5334 offset
|= (insn
& 0x800) ? 0x80000 : 0;
5335 offset
|= (insn
& 0x4000000) ? 0x100000 : 0;
5336 if (offset
& 0x100000)
5337 offset
|= ~ ((bfd_signed_vma
) 0xfffff);
5338 stub_type
= arm_stub_a8_veneer_b_cond
;
5340 else if (is_b
|| is_bl
|| is_blx
)
5342 int s
= (insn
& 0x4000000) != 0;
5343 int j1
= (insn
& 0x2000) != 0;
5344 int j2
= (insn
& 0x800) != 0;
5348 offset
= (insn
& 0x7ff) << 1;
5349 offset
|= (insn
& 0x3ff0000) >> 4;
5353 if (offset
& 0x1000000)
5354 offset
|= ~ ((bfd_signed_vma
) 0xffffff);
5357 offset
&= ~ ((bfd_signed_vma
) 3);
5359 stub_type
= is_blx
? arm_stub_a8_veneer_blx
:
5360 is_bl
? arm_stub_a8_veneer_bl
: arm_stub_a8_veneer_b
;
5363 if (stub_type
!= arm_stub_none
)
5365 bfd_vma pc_for_insn
= base_vma
+ i
+ 4;
5367 /* The original instruction is a BL, but the target is
5368 an ARM instruction. If we were not making a stub,
5369 the BL would have been converted to a BLX. Use the
5370 BLX stub instead in that case. */
5371 if (htab
->use_blx
&& force_target_arm
5372 && stub_type
== arm_stub_a8_veneer_bl
)
5374 stub_type
= arm_stub_a8_veneer_blx
;
5378 /* Conversely, if the original instruction was
5379 BLX but the target is Thumb mode, use the BL
5381 else if (force_target_thumb
5382 && stub_type
== arm_stub_a8_veneer_blx
)
5384 stub_type
= arm_stub_a8_veneer_bl
;
5390 pc_for_insn
&= ~ ((bfd_vma
) 3);
5392 /* If we found a relocation, use the proper destination,
5393 not the offset in the (unrelocated) instruction.
5394 Note this is always done if we switched the stub type
5398 (bfd_signed_vma
) (found
->destination
- pc_for_insn
);
5400 /* If the stub will use a Thumb-mode branch to a
5401 PLT target, redirect it to the preceding Thumb
5403 if (stub_type
!= arm_stub_a8_veneer_blx
&& use_plt
)
5404 offset
-= PLT_THUMB_STUB_SIZE
;
5406 target
= pc_for_insn
+ offset
;
5408 /* The BLX stub is ARM-mode code. Adjust the offset to
5409 take the different PC value (+8 instead of +4) into
5411 if (stub_type
== arm_stub_a8_veneer_blx
)
5414 if (((base_vma
+ i
) & ~0xfff) == (target
& ~0xfff))
5416 char *stub_name
= NULL
;
5418 if (num_a8_fixes
== a8_fix_table_size
)
5420 a8_fix_table_size
*= 2;
5421 a8_fixes
= (struct a8_erratum_fix
*)
5422 bfd_realloc (a8_fixes
,
5423 sizeof (struct a8_erratum_fix
)
5424 * a8_fix_table_size
);
5427 if (num_a8_fixes
< prev_num_a8_fixes
)
5429 /* If we're doing a subsequent scan,
5430 check if we've found the same fix as
5431 before, and try and reuse the stub
5433 stub_name
= a8_fixes
[num_a8_fixes
].stub_name
;
5434 if ((a8_fixes
[num_a8_fixes
].section
!= section
)
5435 || (a8_fixes
[num_a8_fixes
].offset
!= i
))
5439 *stub_changed_p
= TRUE
;
5445 stub_name
= (char *) bfd_malloc (8 + 1 + 8 + 1);
5446 if (stub_name
!= NULL
)
5447 sprintf (stub_name
, "%x:%x", section
->id
, i
);
5450 a8_fixes
[num_a8_fixes
].input_bfd
= input_bfd
;
5451 a8_fixes
[num_a8_fixes
].section
= section
;
5452 a8_fixes
[num_a8_fixes
].offset
= i
;
5453 a8_fixes
[num_a8_fixes
].target_offset
=
5455 a8_fixes
[num_a8_fixes
].orig_insn
= insn
;
5456 a8_fixes
[num_a8_fixes
].stub_name
= stub_name
;
5457 a8_fixes
[num_a8_fixes
].stub_type
= stub_type
;
5458 a8_fixes
[num_a8_fixes
].branch_type
=
5459 is_blx
? ST_BRANCH_TO_ARM
: ST_BRANCH_TO_THUMB
;
5466 i
+= insn_32bit
? 4 : 2;
5467 last_was_32bit
= insn_32bit
;
5468 last_was_branch
= is_32bit_branch
;
5472 if (elf_section_data (section
)->this_hdr
.contents
== NULL
)
5476 *a8_fixes_p
= a8_fixes
;
5477 *num_a8_fixes_p
= num_a8_fixes
;
5478 *a8_fix_table_size_p
= a8_fix_table_size
;
5483 /* Create or update a stub entry depending on whether the stub can already be
5484 found in HTAB. The stub is identified by:
5485 - its type STUB_TYPE
5486 - its source branch (note that several can share the same stub) whose
5487 section and relocation (if any) are given by SECTION and IRELA
5489 - its target symbol whose input section, hash, name, value and branch type
5490 are given in SYM_SEC, HASH, SYM_NAME, SYM_VALUE and BRANCH_TYPE
5493 If found, the value of the stub's target symbol is updated from SYM_VALUE
5494 and *NEW_STUB is set to FALSE. Otherwise, *NEW_STUB is set to
5495 TRUE and the stub entry is initialized.
5497 Returns the stub that was created or updated, or NULL if an error
5500 static struct elf32_arm_stub_hash_entry
*
5501 elf32_arm_create_stub (struct elf32_arm_link_hash_table
*htab
,
5502 enum elf32_arm_stub_type stub_type
, asection
*section
,
5503 Elf_Internal_Rela
*irela
, asection
*sym_sec
,
5504 struct elf32_arm_link_hash_entry
*hash
, char *sym_name
,
5505 bfd_vma sym_value
, enum arm_st_branch_type branch_type
,
5506 bfd_boolean
*new_stub
)
5508 const asection
*id_sec
;
5510 struct elf32_arm_stub_hash_entry
*stub_entry
;
5511 unsigned int r_type
;
5512 bfd_boolean sym_claimed
= arm_stub_sym_claimed (stub_type
);
5514 BFD_ASSERT (stub_type
!= arm_stub_none
);
5518 stub_name
= sym_name
;
5522 BFD_ASSERT (section
);
5523 BFD_ASSERT (section
->id
<= htab
->top_id
);
5525 /* Support for grouping stub sections. */
5526 id_sec
= htab
->stub_group
[section
->id
].link_sec
;
5528 /* Get the name of this stub. */
5529 stub_name
= elf32_arm_stub_name (id_sec
, sym_sec
, hash
, irela
,
5535 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
, stub_name
, FALSE
,
5537 /* The proper stub has already been created, just update its value. */
5538 if (stub_entry
!= NULL
)
5542 stub_entry
->target_value
= sym_value
;
5546 stub_entry
= elf32_arm_add_stub (stub_name
, section
, htab
, stub_type
);
5547 if (stub_entry
== NULL
)
5554 stub_entry
->target_value
= sym_value
;
5555 stub_entry
->target_section
= sym_sec
;
5556 stub_entry
->stub_type
= stub_type
;
5557 stub_entry
->h
= hash
;
5558 stub_entry
->branch_type
= branch_type
;
5561 stub_entry
->output_name
= sym_name
;
5564 if (sym_name
== NULL
)
5565 sym_name
= "unnamed";
5566 stub_entry
->output_name
= (char *)
5567 bfd_alloc (htab
->stub_bfd
, sizeof (THUMB2ARM_GLUE_ENTRY_NAME
)
5568 + strlen (sym_name
));
5569 if (stub_entry
->output_name
== NULL
)
5575 /* For historical reasons, use the existing names for ARM-to-Thumb and
5576 Thumb-to-ARM stubs. */
5577 r_type
= ELF32_R_TYPE (irela
->r_info
);
5578 if ((r_type
== (unsigned int) R_ARM_THM_CALL
5579 || r_type
== (unsigned int) R_ARM_THM_JUMP24
5580 || r_type
== (unsigned int) R_ARM_THM_JUMP19
)
5581 && branch_type
== ST_BRANCH_TO_ARM
)
5582 sprintf (stub_entry
->output_name
, THUMB2ARM_GLUE_ENTRY_NAME
, sym_name
);
5583 else if ((r_type
== (unsigned int) R_ARM_CALL
5584 || r_type
== (unsigned int) R_ARM_JUMP24
)
5585 && branch_type
== ST_BRANCH_TO_THUMB
)
5586 sprintf (stub_entry
->output_name
, ARM2THUMB_GLUE_ENTRY_NAME
, sym_name
);
5588 sprintf (stub_entry
->output_name
, STUB_ENTRY_NAME
, sym_name
);
5595 /* Scan symbols in INPUT_BFD to identify secure entry functions needing a
5596 gateway veneer to transition from non secure to secure state and create them
5599 "ARMv8-M Security Extensions: Requirements on Development Tools" document
5600 defines the conditions that govern Secure Gateway veneer creation for a
5601 given symbol <SYM> as follows:
5602 - it has function type
5603 - it has non local binding
5604 - a symbol named __acle_se_<SYM> (called special symbol) exists with the
5605 same type, binding and value as <SYM> (called normal symbol).
5606 An entry function can handle secure state transition itself in which case
5607 its special symbol would have a different value from the normal symbol.
5609 OUT_ATTR gives the output attributes, SYM_HASHES the symbol index to hash
5610 entry mapping while HTAB gives the name to hash entry mapping.
5611 *CMSE_STUB_CREATED is increased by the number of secure gateway veneer
5614 The return value gives whether a stub failed to be allocated. */
5617 cmse_scan (bfd
*input_bfd
, struct elf32_arm_link_hash_table
*htab
,
5618 obj_attribute
*out_attr
, struct elf_link_hash_entry
**sym_hashes
,
5619 int *cmse_stub_created
)
5621 const struct elf_backend_data
*bed
;
5622 Elf_Internal_Shdr
*symtab_hdr
;
5623 unsigned i
, j
, sym_count
, ext_start
;
5624 Elf_Internal_Sym
*cmse_sym
, *local_syms
;
5625 struct elf32_arm_link_hash_entry
*hash
, *cmse_hash
= NULL
;
5626 enum arm_st_branch_type branch_type
;
5627 char *sym_name
, *lsym_name
;
5630 struct elf32_arm_stub_hash_entry
*stub_entry
;
5631 bfd_boolean is_v8m
, new_stub
, cmse_invalid
, ret
= TRUE
;
5633 bed
= get_elf_backend_data (input_bfd
);
5634 symtab_hdr
= &elf_tdata (input_bfd
)->symtab_hdr
;
5635 sym_count
= symtab_hdr
->sh_size
/ bed
->s
->sizeof_sym
;
5636 ext_start
= symtab_hdr
->sh_info
;
5637 is_v8m
= (out_attr
[Tag_CPU_arch
].i
>= TAG_CPU_ARCH_V8M_BASE
5638 && out_attr
[Tag_CPU_arch_profile
].i
== 'M');
5640 local_syms
= (Elf_Internal_Sym
*) symtab_hdr
->contents
;
5641 if (local_syms
== NULL
)
5642 local_syms
= bfd_elf_get_elf_syms (input_bfd
, symtab_hdr
,
5643 symtab_hdr
->sh_info
, 0, NULL
, NULL
,
5645 if (symtab_hdr
->sh_info
&& local_syms
== NULL
)
5649 for (i
= 0; i
< sym_count
; i
++)
5651 cmse_invalid
= FALSE
;
5655 cmse_sym
= &local_syms
[i
];
5656 /* Not a special symbol. */
5657 if (!ARM_GET_SYM_CMSE_SPCL (cmse_sym
->st_target_internal
))
5659 sym_name
= bfd_elf_string_from_elf_section (input_bfd
,
5660 symtab_hdr
->sh_link
,
5662 /* Special symbol with local binding. */
5663 cmse_invalid
= TRUE
;
5667 cmse_hash
= elf32_arm_hash_entry (sym_hashes
[i
- ext_start
]);
5668 sym_name
= (char *) cmse_hash
->root
.root
.root
.string
;
5670 /* Not a special symbol. */
5671 if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash
->root
.target_internal
))
5674 /* Special symbol has incorrect binding or type. */
5675 if ((cmse_hash
->root
.root
.type
!= bfd_link_hash_defined
5676 && cmse_hash
->root
.root
.type
!= bfd_link_hash_defweak
)
5677 || cmse_hash
->root
.type
!= STT_FUNC
)
5678 cmse_invalid
= TRUE
;
5683 _bfd_error_handler (_("%pB: special symbol `%s' only allowed for "
5684 "ARMv8-M architecture or later"),
5685 input_bfd
, sym_name
);
5686 is_v8m
= TRUE
; /* Avoid multiple warning. */
5692 _bfd_error_handler (_("%pB: invalid special symbol `%s'; it must be"
5693 " a global or weak function symbol"),
5694 input_bfd
, sym_name
);
5700 sym_name
+= strlen (CMSE_PREFIX
);
5701 hash
= (struct elf32_arm_link_hash_entry
*)
5702 elf_link_hash_lookup (&(htab
)->root
, sym_name
, FALSE
, FALSE
, TRUE
);
5704 /* No associated normal symbol or it is neither global nor weak. */
5706 || (hash
->root
.root
.type
!= bfd_link_hash_defined
5707 && hash
->root
.root
.type
!= bfd_link_hash_defweak
)
5708 || hash
->root
.type
!= STT_FUNC
)
5710 /* Initialize here to avoid warning about use of possibly
5711 uninitialized variable. */
5716 /* Searching for a normal symbol with local binding. */
5717 for (; j
< ext_start
; j
++)
5720 bfd_elf_string_from_elf_section (input_bfd
,
5721 symtab_hdr
->sh_link
,
5722 local_syms
[j
].st_name
);
5723 if (!strcmp (sym_name
, lsym_name
))
5728 if (hash
|| j
< ext_start
)
5731 (_("%pB: invalid standard symbol `%s'; it must be "
5732 "a global or weak function symbol"),
5733 input_bfd
, sym_name
);
5737 (_("%pB: absent standard symbol `%s'"), input_bfd
, sym_name
);
5743 sym_value
= hash
->root
.root
.u
.def
.value
;
5744 section
= hash
->root
.root
.u
.def
.section
;
5746 if (cmse_hash
->root
.root
.u
.def
.section
!= section
)
5749 (_("%pB: `%s' and its special symbol are in different sections"),
5750 input_bfd
, sym_name
);
5753 if (cmse_hash
->root
.root
.u
.def
.value
!= sym_value
)
5754 continue; /* Ignore: could be an entry function starting with SG. */
5756 /* If this section is a link-once section that will be discarded, then
5757 don't create any stubs. */
5758 if (section
->output_section
== NULL
)
5761 (_("%pB: entry function `%s' not output"), input_bfd
, sym_name
);
5765 if (hash
->root
.size
== 0)
5768 (_("%pB: entry function `%s' is empty"), input_bfd
, sym_name
);
5774 branch_type
= ARM_GET_SYM_BRANCH_TYPE (hash
->root
.target_internal
);
5776 = elf32_arm_create_stub (htab
, arm_stub_cmse_branch_thumb_only
,
5777 NULL
, NULL
, section
, hash
, sym_name
,
5778 sym_value
, branch_type
, &new_stub
);
5780 if (stub_entry
== NULL
)
5784 BFD_ASSERT (new_stub
);
5785 (*cmse_stub_created
)++;
5789 if (!symtab_hdr
->contents
)
5794 /* Return TRUE iff a symbol identified by its linker HASH entry is a secure
5795 code entry function, ie can be called from non secure code without using a
5799 cmse_entry_fct_p (struct elf32_arm_link_hash_entry
*hash
)
5801 bfd_byte contents
[4];
5802 uint32_t first_insn
;
5807 /* Defined symbol of function type. */
5808 if (hash
->root
.root
.type
!= bfd_link_hash_defined
5809 && hash
->root
.root
.type
!= bfd_link_hash_defweak
)
5811 if (hash
->root
.type
!= STT_FUNC
)
5814 /* Read first instruction. */
5815 section
= hash
->root
.root
.u
.def
.section
;
5816 abfd
= section
->owner
;
5817 offset
= hash
->root
.root
.u
.def
.value
- section
->vma
;
5818 if (!bfd_get_section_contents (abfd
, section
, contents
, offset
,
5822 first_insn
= bfd_get_32 (abfd
, contents
);
5824 /* Starts by SG instruction. */
5825 return first_insn
== 0xe97fe97f;
5828 /* Output the name (in symbol table) of the veneer GEN_ENTRY if it is a new
5829 secure gateway veneers (ie. the veneers was not in the input import library)
5830 and there is no output import library (GEN_INFO->out_implib_bfd is NULL. */
5833 arm_list_new_cmse_stub (struct bfd_hash_entry
*gen_entry
, void *gen_info
)
5835 struct elf32_arm_stub_hash_entry
*stub_entry
;
5836 struct bfd_link_info
*info
;
5838 /* Massage our args to the form they really have. */
5839 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
5840 info
= (struct bfd_link_info
*) gen_info
;
5842 if (info
->out_implib_bfd
)
5845 if (stub_entry
->stub_type
!= arm_stub_cmse_branch_thumb_only
)
5848 if (stub_entry
->stub_offset
== (bfd_vma
) -1)
5849 _bfd_error_handler (" %s", stub_entry
->output_name
);
5854 /* Set offset of each secure gateway veneers so that its address remain
5855 identical to the one in the input import library referred by
5856 HTAB->in_implib_bfd. A warning is issued for veneers that disappeared
5857 (present in input import library but absent from the executable being
5858 linked) or if new veneers appeared and there is no output import library
5859 (INFO->out_implib_bfd is NULL and *CMSE_STUB_CREATED is bigger than the
5860 number of secure gateway veneers found in the input import library.
5862 The function returns whether an error occurred. If no error occurred,
5863 *CMSE_STUB_CREATED gives the number of SG veneers created by both cmse_scan
5864 and this function and HTAB->new_cmse_stub_offset is set to the biggest
5865 veneer observed set for new veneers to be layed out after. */
5868 set_cmse_veneer_addr_from_implib (struct bfd_link_info
*info
,
5869 struct elf32_arm_link_hash_table
*htab
,
5870 int *cmse_stub_created
)
5877 asection
*stub_out_sec
;
5878 bfd_boolean ret
= TRUE
;
5879 Elf_Internal_Sym
*intsym
;
5880 const char *out_sec_name
;
5881 bfd_size_type cmse_stub_size
;
5882 asymbol
**sympp
= NULL
, *sym
;
5883 struct elf32_arm_link_hash_entry
*hash
;
5884 const insn_sequence
*cmse_stub_template
;
5885 struct elf32_arm_stub_hash_entry
*stub_entry
;
5886 int cmse_stub_template_size
, new_cmse_stubs_created
= *cmse_stub_created
;
5887 bfd_vma veneer_value
, stub_offset
, next_cmse_stub_offset
;
5888 bfd_vma cmse_stub_array_start
= (bfd_vma
) -1, cmse_stub_sec_vma
= 0;
5890 /* No input secure gateway import library. */
5891 if (!htab
->in_implib_bfd
)
5894 in_implib_bfd
= htab
->in_implib_bfd
;
5895 if (!htab
->cmse_implib
)
5897 _bfd_error_handler (_("%pB: --in-implib only supported for Secure "
5898 "Gateway import libraries"), in_implib_bfd
);
5902 /* Get symbol table size. */
5903 symsize
= bfd_get_symtab_upper_bound (in_implib_bfd
);
5907 /* Read in the input secure gateway import library's symbol table. */
5908 sympp
= (asymbol
**) xmalloc (symsize
);
5909 symcount
= bfd_canonicalize_symtab (in_implib_bfd
, sympp
);
5916 htab
->new_cmse_stub_offset
= 0;
5918 find_stub_size_and_template (arm_stub_cmse_branch_thumb_only
,
5919 &cmse_stub_template
,
5920 &cmse_stub_template_size
);
5922 arm_dedicated_stub_output_section_name (arm_stub_cmse_branch_thumb_only
);
5924 bfd_get_section_by_name (htab
->obfd
, out_sec_name
);
5925 if (stub_out_sec
!= NULL
)
5926 cmse_stub_sec_vma
= stub_out_sec
->vma
;
5928 /* Set addresses of veneers mentionned in input secure gateway import
5929 library's symbol table. */
5930 for (i
= 0; i
< symcount
; i
++)
5934 sym_name
= (char *) bfd_asymbol_name (sym
);
5935 intsym
= &((elf_symbol_type
*) sym
)->internal_elf_sym
;
5937 if (sym
->section
!= bfd_abs_section_ptr
5938 || !(flags
& (BSF_GLOBAL
| BSF_WEAK
))
5939 || (flags
& BSF_FUNCTION
) != BSF_FUNCTION
5940 || (ARM_GET_SYM_BRANCH_TYPE (intsym
->st_target_internal
)
5941 != ST_BRANCH_TO_THUMB
))
5943 _bfd_error_handler (_("%pB: invalid import library entry: `%s'; "
5944 "symbol should be absolute, global and "
5945 "refer to Thumb functions"),
5946 in_implib_bfd
, sym_name
);
5951 veneer_value
= bfd_asymbol_value (sym
);
5952 stub_offset
= veneer_value
- cmse_stub_sec_vma
;
5953 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
, sym_name
,
5955 hash
= (struct elf32_arm_link_hash_entry
*)
5956 elf_link_hash_lookup (&(htab
)->root
, sym_name
, FALSE
, FALSE
, TRUE
);
5958 /* Stub entry should have been created by cmse_scan or the symbol be of
5959 a secure function callable from non secure code. */
5960 if (!stub_entry
&& !hash
)
5962 bfd_boolean new_stub
;
5965 (_("entry function `%s' disappeared from secure code"), sym_name
);
5966 hash
= (struct elf32_arm_link_hash_entry
*)
5967 elf_link_hash_lookup (&(htab
)->root
, sym_name
, TRUE
, TRUE
, TRUE
);
5969 = elf32_arm_create_stub (htab
, arm_stub_cmse_branch_thumb_only
,
5970 NULL
, NULL
, bfd_abs_section_ptr
, hash
,
5971 sym_name
, veneer_value
,
5972 ST_BRANCH_TO_THUMB
, &new_stub
);
5973 if (stub_entry
== NULL
)
5977 BFD_ASSERT (new_stub
);
5978 new_cmse_stubs_created
++;
5979 (*cmse_stub_created
)++;
5981 stub_entry
->stub_template_size
= stub_entry
->stub_size
= 0;
5982 stub_entry
->stub_offset
= stub_offset
;
5984 /* Symbol found is not callable from non secure code. */
5985 else if (!stub_entry
)
5987 if (!cmse_entry_fct_p (hash
))
5989 _bfd_error_handler (_("`%s' refers to a non entry function"),
5997 /* Only stubs for SG veneers should have been created. */
5998 BFD_ASSERT (stub_entry
->stub_type
== arm_stub_cmse_branch_thumb_only
);
6000 /* Check visibility hasn't changed. */
6001 if (!!(flags
& BSF_GLOBAL
)
6002 != (hash
->root
.root
.type
== bfd_link_hash_defined
))
6004 (_("%pB: visibility of symbol `%s' has changed"), in_implib_bfd
,
6007 stub_entry
->stub_offset
= stub_offset
;
6010 /* Size should match that of a SG veneer. */
6011 if (intsym
->st_size
!= cmse_stub_size
)
6013 _bfd_error_handler (_("%pB: incorrect size for symbol `%s'"),
6014 in_implib_bfd
, sym_name
);
6018 /* Previous veneer address is before current SG veneer section. */
6019 if (veneer_value
< cmse_stub_sec_vma
)
6021 /* Avoid offset underflow. */
6023 stub_entry
->stub_offset
= 0;
6028 /* Complain if stub offset not a multiple of stub size. */
6029 if (stub_offset
% cmse_stub_size
)
6032 (_("offset of veneer for entry function `%s' not a multiple of "
6033 "its size"), sym_name
);
6040 new_cmse_stubs_created
--;
6041 if (veneer_value
< cmse_stub_array_start
)
6042 cmse_stub_array_start
= veneer_value
;
6043 next_cmse_stub_offset
= stub_offset
+ ((cmse_stub_size
+ 7) & ~7);
6044 if (next_cmse_stub_offset
> htab
->new_cmse_stub_offset
)
6045 htab
->new_cmse_stub_offset
= next_cmse_stub_offset
;
6048 if (!info
->out_implib_bfd
&& new_cmse_stubs_created
!= 0)
6050 BFD_ASSERT (new_cmse_stubs_created
> 0);
6052 (_("new entry function(s) introduced but no output import library "
6054 bfd_hash_traverse (&htab
->stub_hash_table
, arm_list_new_cmse_stub
, info
);
6057 if (cmse_stub_array_start
!= cmse_stub_sec_vma
)
6060 (_("start address of `%s' is different from previous link"),
6070 /* Determine and set the size of the stub section for a final link.
6072 The basic idea here is to examine all the relocations looking for
6073 PC-relative calls to a target that is unreachable with a "bl"
6077 elf32_arm_size_stubs (bfd
*output_bfd
,
6079 struct bfd_link_info
*info
,
6080 bfd_signed_vma group_size
,
6081 asection
* (*add_stub_section
) (const char *, asection
*,
6084 void (*layout_sections_again
) (void))
6086 bfd_boolean ret
= TRUE
;
6087 obj_attribute
*out_attr
;
6088 int cmse_stub_created
= 0;
6089 bfd_size_type stub_group_size
;
6090 bfd_boolean m_profile
, stubs_always_after_branch
, first_veneer_scan
= TRUE
;
6091 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
6092 struct a8_erratum_fix
*a8_fixes
= NULL
;
6093 unsigned int num_a8_fixes
= 0, a8_fix_table_size
= 10;
6094 struct a8_erratum_reloc
*a8_relocs
= NULL
;
6095 unsigned int num_a8_relocs
= 0, a8_reloc_table_size
= 10, i
;
6100 if (htab
->fix_cortex_a8
)
6102 a8_fixes
= (struct a8_erratum_fix
*)
6103 bfd_zmalloc (sizeof (struct a8_erratum_fix
) * a8_fix_table_size
);
6104 a8_relocs
= (struct a8_erratum_reloc
*)
6105 bfd_zmalloc (sizeof (struct a8_erratum_reloc
) * a8_reloc_table_size
);
6108 /* Propagate mach to stub bfd, because it may not have been
6109 finalized when we created stub_bfd. */
6110 bfd_set_arch_mach (stub_bfd
, bfd_get_arch (output_bfd
),
6111 bfd_get_mach (output_bfd
));
6113 /* Stash our params away. */
6114 htab
->stub_bfd
= stub_bfd
;
6115 htab
->add_stub_section
= add_stub_section
;
6116 htab
->layout_sections_again
= layout_sections_again
;
6117 stubs_always_after_branch
= group_size
< 0;
6119 out_attr
= elf_known_obj_attributes_proc (output_bfd
);
6120 m_profile
= out_attr
[Tag_CPU_arch_profile
].i
== 'M';
6122 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
6123 as the first half of a 32-bit branch straddling two 4K pages. This is a
6124 crude way of enforcing that. */
6125 if (htab
->fix_cortex_a8
)
6126 stubs_always_after_branch
= 1;
6129 stub_group_size
= -group_size
;
6131 stub_group_size
= group_size
;
6133 if (stub_group_size
== 1)
6135 /* Default values. */
6136 /* Thumb branch range is +-4MB has to be used as the default
6137 maximum size (a given section can contain both ARM and Thumb
6138 code, so the worst case has to be taken into account).
6140 This value is 24K less than that, which allows for 2025
6141 12-byte stubs. If we exceed that, then we will fail to link.
6142 The user will have to relink with an explicit group size
6144 stub_group_size
= 4170000;
6147 group_sections (htab
, stub_group_size
, stubs_always_after_branch
);
6149 /* If we're applying the cortex A8 fix, we need to determine the
6150 program header size now, because we cannot change it later --
6151 that could alter section placements. Notice the A8 erratum fix
6152 ends up requiring the section addresses to remain unchanged
6153 modulo the page size. That's something we cannot represent
6154 inside BFD, and we don't want to force the section alignment to
6155 be the page size. */
6156 if (htab
->fix_cortex_a8
)
6157 (*htab
->layout_sections_again
) ();
6162 unsigned int bfd_indx
;
6164 enum elf32_arm_stub_type stub_type
;
6165 bfd_boolean stub_changed
= FALSE
;
6166 unsigned prev_num_a8_fixes
= num_a8_fixes
;
6169 for (input_bfd
= info
->input_bfds
, bfd_indx
= 0;
6171 input_bfd
= input_bfd
->link
.next
, bfd_indx
++)
6173 Elf_Internal_Shdr
*symtab_hdr
;
6175 Elf_Internal_Sym
*local_syms
= NULL
;
6177 if (!is_arm_elf (input_bfd
))
6182 /* We'll need the symbol table in a second. */
6183 symtab_hdr
= &elf_tdata (input_bfd
)->symtab_hdr
;
6184 if (symtab_hdr
->sh_info
== 0)
6187 /* Limit scan of symbols to object file whose profile is
6188 Microcontroller to not hinder performance in the general case. */
6189 if (m_profile
&& first_veneer_scan
)
6191 struct elf_link_hash_entry
**sym_hashes
;
6193 sym_hashes
= elf_sym_hashes (input_bfd
);
6194 if (!cmse_scan (input_bfd
, htab
, out_attr
, sym_hashes
,
6195 &cmse_stub_created
))
6196 goto error_ret_free_local
;
6198 if (cmse_stub_created
!= 0)
6199 stub_changed
= TRUE
;
6202 /* Walk over each section attached to the input bfd. */
6203 for (section
= input_bfd
->sections
;
6205 section
= section
->next
)
6207 Elf_Internal_Rela
*internal_relocs
, *irelaend
, *irela
;
6209 /* If there aren't any relocs, then there's nothing more
6211 if ((section
->flags
& SEC_RELOC
) == 0
6212 || section
->reloc_count
== 0
6213 || (section
->flags
& SEC_CODE
) == 0)
6216 /* If this section is a link-once section that will be
6217 discarded, then don't create any stubs. */
6218 if (section
->output_section
== NULL
6219 || section
->output_section
->owner
!= output_bfd
)
6222 /* Get the relocs. */
6224 = _bfd_elf_link_read_relocs (input_bfd
, section
, NULL
,
6225 NULL
, info
->keep_memory
);
6226 if (internal_relocs
== NULL
)
6227 goto error_ret_free_local
;
6229 /* Now examine each relocation. */
6230 irela
= internal_relocs
;
6231 irelaend
= irela
+ section
->reloc_count
;
6232 for (; irela
< irelaend
; irela
++)
6234 unsigned int r_type
, r_indx
;
6237 bfd_vma destination
;
6238 struct elf32_arm_link_hash_entry
*hash
;
6239 const char *sym_name
;
6240 unsigned char st_type
;
6241 enum arm_st_branch_type branch_type
;
6242 bfd_boolean created_stub
= FALSE
;
6244 r_type
= ELF32_R_TYPE (irela
->r_info
);
6245 r_indx
= ELF32_R_SYM (irela
->r_info
);
6247 if (r_type
>= (unsigned int) R_ARM_max
)
6249 bfd_set_error (bfd_error_bad_value
);
6250 error_ret_free_internal
:
6251 if (elf_section_data (section
)->relocs
== NULL
)
6252 free (internal_relocs
);
6254 error_ret_free_local
:
6255 if (local_syms
!= NULL
6256 && (symtab_hdr
->contents
6257 != (unsigned char *) local_syms
))
6263 if (r_indx
>= symtab_hdr
->sh_info
)
6264 hash
= elf32_arm_hash_entry
6265 (elf_sym_hashes (input_bfd
)
6266 [r_indx
- symtab_hdr
->sh_info
]);
6268 /* Only look for stubs on branch instructions, or
6269 non-relaxed TLSCALL */
6270 if ((r_type
!= (unsigned int) R_ARM_CALL
)
6271 && (r_type
!= (unsigned int) R_ARM_THM_CALL
)
6272 && (r_type
!= (unsigned int) R_ARM_JUMP24
)
6273 && (r_type
!= (unsigned int) R_ARM_THM_JUMP19
)
6274 && (r_type
!= (unsigned int) R_ARM_THM_XPC22
)
6275 && (r_type
!= (unsigned int) R_ARM_THM_JUMP24
)
6276 && (r_type
!= (unsigned int) R_ARM_PLT32
)
6277 && !((r_type
== (unsigned int) R_ARM_TLS_CALL
6278 || r_type
== (unsigned int) R_ARM_THM_TLS_CALL
)
6279 && r_type
== elf32_arm_tls_transition
6280 (info
, r_type
, &hash
->root
)
6281 && ((hash
? hash
->tls_type
6282 : (elf32_arm_local_got_tls_type
6283 (input_bfd
)[r_indx
]))
6284 & GOT_TLS_GDESC
) != 0))
6287 /* Now determine the call target, its name, value,
6294 if (r_type
== (unsigned int) R_ARM_TLS_CALL
6295 || r_type
== (unsigned int) R_ARM_THM_TLS_CALL
)
6297 /* A non-relaxed TLS call. The target is the
6298 plt-resident trampoline and nothing to do
6300 BFD_ASSERT (htab
->tls_trampoline
> 0);
6301 sym_sec
= htab
->root
.splt
;
6302 sym_value
= htab
->tls_trampoline
;
6305 branch_type
= ST_BRANCH_TO_ARM
;
6309 /* It's a local symbol. */
6310 Elf_Internal_Sym
*sym
;
6312 if (local_syms
== NULL
)
6315 = (Elf_Internal_Sym
*) symtab_hdr
->contents
;
6316 if (local_syms
== NULL
)
6318 = bfd_elf_get_elf_syms (input_bfd
, symtab_hdr
,
6319 symtab_hdr
->sh_info
, 0,
6321 if (local_syms
== NULL
)
6322 goto error_ret_free_internal
;
6325 sym
= local_syms
+ r_indx
;
6326 if (sym
->st_shndx
== SHN_UNDEF
)
6327 sym_sec
= bfd_und_section_ptr
;
6328 else if (sym
->st_shndx
== SHN_ABS
)
6329 sym_sec
= bfd_abs_section_ptr
;
6330 else if (sym
->st_shndx
== SHN_COMMON
)
6331 sym_sec
= bfd_com_section_ptr
;
6334 bfd_section_from_elf_index (input_bfd
, sym
->st_shndx
);
6337 /* This is an undefined symbol. It can never
6341 if (ELF_ST_TYPE (sym
->st_info
) != STT_SECTION
)
6342 sym_value
= sym
->st_value
;
6343 destination
= (sym_value
+ irela
->r_addend
6344 + sym_sec
->output_offset
6345 + sym_sec
->output_section
->vma
);
6346 st_type
= ELF_ST_TYPE (sym
->st_info
);
6348 ARM_GET_SYM_BRANCH_TYPE (sym
->st_target_internal
);
6350 = bfd_elf_string_from_elf_section (input_bfd
,
6351 symtab_hdr
->sh_link
,
6356 /* It's an external symbol. */
6357 while (hash
->root
.root
.type
== bfd_link_hash_indirect
6358 || hash
->root
.root
.type
== bfd_link_hash_warning
)
6359 hash
= ((struct elf32_arm_link_hash_entry
*)
6360 hash
->root
.root
.u
.i
.link
);
6362 if (hash
->root
.root
.type
== bfd_link_hash_defined
6363 || hash
->root
.root
.type
== bfd_link_hash_defweak
)
6365 sym_sec
= hash
->root
.root
.u
.def
.section
;
6366 sym_value
= hash
->root
.root
.u
.def
.value
;
6368 struct elf32_arm_link_hash_table
*globals
=
6369 elf32_arm_hash_table (info
);
6371 /* For a destination in a shared library,
6372 use the PLT stub as target address to
6373 decide whether a branch stub is
6376 && globals
->root
.splt
!= NULL
6378 && hash
->root
.plt
.offset
!= (bfd_vma
) -1)
6380 sym_sec
= globals
->root
.splt
;
6381 sym_value
= hash
->root
.plt
.offset
;
6382 if (sym_sec
->output_section
!= NULL
)
6383 destination
= (sym_value
6384 + sym_sec
->output_offset
6385 + sym_sec
->output_section
->vma
);
6387 else if (sym_sec
->output_section
!= NULL
)
6388 destination
= (sym_value
+ irela
->r_addend
6389 + sym_sec
->output_offset
6390 + sym_sec
->output_section
->vma
);
6392 else if ((hash
->root
.root
.type
== bfd_link_hash_undefined
)
6393 || (hash
->root
.root
.type
== bfd_link_hash_undefweak
))
6395 /* For a shared library, use the PLT stub as
6396 target address to decide whether a long
6397 branch stub is needed.
6398 For absolute code, they cannot be handled. */
6399 struct elf32_arm_link_hash_table
*globals
=
6400 elf32_arm_hash_table (info
);
6403 && globals
->root
.splt
!= NULL
6405 && hash
->root
.plt
.offset
!= (bfd_vma
) -1)
6407 sym_sec
= globals
->root
.splt
;
6408 sym_value
= hash
->root
.plt
.offset
;
6409 if (sym_sec
->output_section
!= NULL
)
6410 destination
= (sym_value
6411 + sym_sec
->output_offset
6412 + sym_sec
->output_section
->vma
);
6419 bfd_set_error (bfd_error_bad_value
);
6420 goto error_ret_free_internal
;
6422 st_type
= hash
->root
.type
;
6424 ARM_GET_SYM_BRANCH_TYPE (hash
->root
.target_internal
);
6425 sym_name
= hash
->root
.root
.root
.string
;
6430 bfd_boolean new_stub
;
6431 struct elf32_arm_stub_hash_entry
*stub_entry
;
6433 /* Determine what (if any) linker stub is needed. */
6434 stub_type
= arm_type_of_stub (info
, section
, irela
,
6435 st_type
, &branch_type
,
6436 hash
, destination
, sym_sec
,
6437 input_bfd
, sym_name
);
6438 if (stub_type
== arm_stub_none
)
6441 /* We've either created a stub for this reloc already,
6442 or we are about to. */
6444 elf32_arm_create_stub (htab
, stub_type
, section
, irela
,
6446 (char *) sym_name
, sym_value
,
6447 branch_type
, &new_stub
);
6449 created_stub
= stub_entry
!= NULL
;
6451 goto error_ret_free_internal
;
6455 stub_changed
= TRUE
;
6459 /* Look for relocations which might trigger Cortex-A8
6461 if (htab
->fix_cortex_a8
6462 && (r_type
== (unsigned int) R_ARM_THM_JUMP24
6463 || r_type
== (unsigned int) R_ARM_THM_JUMP19
6464 || r_type
== (unsigned int) R_ARM_THM_CALL
6465 || r_type
== (unsigned int) R_ARM_THM_XPC22
))
6467 bfd_vma from
= section
->output_section
->vma
6468 + section
->output_offset
6471 if ((from
& 0xfff) == 0xffe)
6473 /* Found a candidate. Note we haven't checked the
6474 destination is within 4K here: if we do so (and
6475 don't create an entry in a8_relocs) we can't tell
6476 that a branch should have been relocated when
6478 if (num_a8_relocs
== a8_reloc_table_size
)
6480 a8_reloc_table_size
*= 2;
6481 a8_relocs
= (struct a8_erratum_reloc
*)
6482 bfd_realloc (a8_relocs
,
6483 sizeof (struct a8_erratum_reloc
)
6484 * a8_reloc_table_size
);
6487 a8_relocs
[num_a8_relocs
].from
= from
;
6488 a8_relocs
[num_a8_relocs
].destination
= destination
;
6489 a8_relocs
[num_a8_relocs
].r_type
= r_type
;
6490 a8_relocs
[num_a8_relocs
].branch_type
= branch_type
;
6491 a8_relocs
[num_a8_relocs
].sym_name
= sym_name
;
6492 a8_relocs
[num_a8_relocs
].non_a8_stub
= created_stub
;
6493 a8_relocs
[num_a8_relocs
].hash
= hash
;
6500 /* We're done with the internal relocs, free them. */
6501 if (elf_section_data (section
)->relocs
== NULL
)
6502 free (internal_relocs
);
6505 if (htab
->fix_cortex_a8
)
6507 /* Sort relocs which might apply to Cortex-A8 erratum. */
6508 qsort (a8_relocs
, num_a8_relocs
,
6509 sizeof (struct a8_erratum_reloc
),
6512 /* Scan for branches which might trigger Cortex-A8 erratum. */
6513 if (cortex_a8_erratum_scan (input_bfd
, info
, &a8_fixes
,
6514 &num_a8_fixes
, &a8_fix_table_size
,
6515 a8_relocs
, num_a8_relocs
,
6516 prev_num_a8_fixes
, &stub_changed
)
6518 goto error_ret_free_local
;
6521 if (local_syms
!= NULL
6522 && symtab_hdr
->contents
!= (unsigned char *) local_syms
)
6524 if (!info
->keep_memory
)
6527 symtab_hdr
->contents
= (unsigned char *) local_syms
;
6531 if (first_veneer_scan
6532 && !set_cmse_veneer_addr_from_implib (info
, htab
,
6533 &cmse_stub_created
))
6536 if (prev_num_a8_fixes
!= num_a8_fixes
)
6537 stub_changed
= TRUE
;
6542 /* OK, we've added some stubs. Find out the new size of the
6544 for (stub_sec
= htab
->stub_bfd
->sections
;
6546 stub_sec
= stub_sec
->next
)
6548 /* Ignore non-stub sections. */
6549 if (!strstr (stub_sec
->name
, STUB_SUFFIX
))
6555 /* Add new SG veneers after those already in the input import
6557 for (stub_type
= arm_stub_none
+ 1; stub_type
< max_stub_type
;
6560 bfd_vma
*start_offset_p
;
6561 asection
**stub_sec_p
;
6563 start_offset_p
= arm_new_stubs_start_offset_ptr (htab
, stub_type
);
6564 stub_sec_p
= arm_dedicated_stub_input_section_ptr (htab
, stub_type
);
6565 if (start_offset_p
== NULL
)
6568 BFD_ASSERT (stub_sec_p
!= NULL
);
6569 if (*stub_sec_p
!= NULL
)
6570 (*stub_sec_p
)->size
= *start_offset_p
;
6573 /* Compute stub section size, considering padding. */
6574 bfd_hash_traverse (&htab
->stub_hash_table
, arm_size_one_stub
, htab
);
6575 for (stub_type
= arm_stub_none
+ 1; stub_type
< max_stub_type
;
6579 asection
**stub_sec_p
;
6581 padding
= arm_dedicated_stub_section_padding (stub_type
);
6582 stub_sec_p
= arm_dedicated_stub_input_section_ptr (htab
, stub_type
);
6583 /* Skip if no stub input section or no stub section padding
6585 if ((stub_sec_p
!= NULL
&& *stub_sec_p
== NULL
) || padding
== 0)
6587 /* Stub section padding required but no dedicated section. */
6588 BFD_ASSERT (stub_sec_p
);
6590 size
= (*stub_sec_p
)->size
;
6591 size
= (size
+ padding
- 1) & ~(padding
- 1);
6592 (*stub_sec_p
)->size
= size
;
6595 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
6596 if (htab
->fix_cortex_a8
)
6597 for (i
= 0; i
< num_a8_fixes
; i
++)
6599 stub_sec
= elf32_arm_create_or_find_stub_sec (NULL
,
6600 a8_fixes
[i
].section
, htab
, a8_fixes
[i
].stub_type
);
6602 if (stub_sec
== NULL
)
6606 += find_stub_size_and_template (a8_fixes
[i
].stub_type
, NULL
,
6611 /* Ask the linker to do its stuff. */
6612 (*htab
->layout_sections_again
) ();
6613 first_veneer_scan
= FALSE
;
6616 /* Add stubs for Cortex-A8 erratum fixes now. */
6617 if (htab
->fix_cortex_a8
)
6619 for (i
= 0; i
< num_a8_fixes
; i
++)
6621 struct elf32_arm_stub_hash_entry
*stub_entry
;
6622 char *stub_name
= a8_fixes
[i
].stub_name
;
6623 asection
*section
= a8_fixes
[i
].section
;
6624 unsigned int section_id
= a8_fixes
[i
].section
->id
;
6625 asection
*link_sec
= htab
->stub_group
[section_id
].link_sec
;
6626 asection
*stub_sec
= htab
->stub_group
[section_id
].stub_sec
;
6627 const insn_sequence
*template_sequence
;
6628 int template_size
, size
= 0;
6630 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
, stub_name
,
6632 if (stub_entry
== NULL
)
6634 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
6635 section
->owner
, stub_name
);
6639 stub_entry
->stub_sec
= stub_sec
;
6640 stub_entry
->stub_offset
= (bfd_vma
) -1;
6641 stub_entry
->id_sec
= link_sec
;
6642 stub_entry
->stub_type
= a8_fixes
[i
].stub_type
;
6643 stub_entry
->source_value
= a8_fixes
[i
].offset
;
6644 stub_entry
->target_section
= a8_fixes
[i
].section
;
6645 stub_entry
->target_value
= a8_fixes
[i
].target_offset
;
6646 stub_entry
->orig_insn
= a8_fixes
[i
].orig_insn
;
6647 stub_entry
->branch_type
= a8_fixes
[i
].branch_type
;
6649 size
= find_stub_size_and_template (a8_fixes
[i
].stub_type
,
6653 stub_entry
->stub_size
= size
;
6654 stub_entry
->stub_template
= template_sequence
;
6655 stub_entry
->stub_template_size
= template_size
;
6658 /* Stash the Cortex-A8 erratum fix array for use later in
6659 elf32_arm_write_section(). */
6660 htab
->a8_erratum_fixes
= a8_fixes
;
6661 htab
->num_a8_erratum_fixes
= num_a8_fixes
;
6665 htab
->a8_erratum_fixes
= NULL
;
6666 htab
->num_a8_erratum_fixes
= 0;
6671 /* Build all the stubs associated with the current output file. The
6672 stubs are kept in a hash table attached to the main linker hash
6673 table. We also set up the .plt entries for statically linked PIC
6674 functions here. This function is called via arm_elf_finish in the
6678 elf32_arm_build_stubs (struct bfd_link_info
*info
)
6681 struct bfd_hash_table
*table
;
6682 enum elf32_arm_stub_type stub_type
;
6683 struct elf32_arm_link_hash_table
*htab
;
6685 htab
= elf32_arm_hash_table (info
);
6689 for (stub_sec
= htab
->stub_bfd
->sections
;
6691 stub_sec
= stub_sec
->next
)
6695 /* Ignore non-stub sections. */
6696 if (!strstr (stub_sec
->name
, STUB_SUFFIX
))
6699 /* Allocate memory to hold the linker stubs. Zeroing the stub sections
6700 must at least be done for stub section requiring padding and for SG
6701 veneers to ensure that a non secure code branching to a removed SG
6702 veneer causes an error. */
6703 size
= stub_sec
->size
;
6704 stub_sec
->contents
= (unsigned char *) bfd_zalloc (htab
->stub_bfd
, size
);
6705 if (stub_sec
->contents
== NULL
&& size
!= 0)
6711 /* Add new SG veneers after those already in the input import library. */
6712 for (stub_type
= arm_stub_none
+ 1; stub_type
< max_stub_type
; stub_type
++)
6714 bfd_vma
*start_offset_p
;
6715 asection
**stub_sec_p
;
6717 start_offset_p
= arm_new_stubs_start_offset_ptr (htab
, stub_type
);
6718 stub_sec_p
= arm_dedicated_stub_input_section_ptr (htab
, stub_type
);
6719 if (start_offset_p
== NULL
)
6722 BFD_ASSERT (stub_sec_p
!= NULL
);
6723 if (*stub_sec_p
!= NULL
)
6724 (*stub_sec_p
)->size
= *start_offset_p
;
6727 /* Build the stubs as directed by the stub hash table. */
6728 table
= &htab
->stub_hash_table
;
6729 bfd_hash_traverse (table
, arm_build_one_stub
, info
);
6730 if (htab
->fix_cortex_a8
)
6732 /* Place the cortex a8 stubs last. */
6733 htab
->fix_cortex_a8
= -1;
6734 bfd_hash_traverse (table
, arm_build_one_stub
, info
);
6740 /* Locate the Thumb encoded calling stub for NAME. */
6742 static struct elf_link_hash_entry
*
6743 find_thumb_glue (struct bfd_link_info
*link_info
,
6745 char **error_message
)
6748 struct elf_link_hash_entry
*hash
;
6749 struct elf32_arm_link_hash_table
*hash_table
;
6751 /* We need a pointer to the armelf specific hash table. */
6752 hash_table
= elf32_arm_hash_table (link_info
);
6753 if (hash_table
== NULL
)
6756 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen (name
)
6757 + strlen (THUMB2ARM_GLUE_ENTRY_NAME
) + 1);
6759 BFD_ASSERT (tmp_name
);
6761 sprintf (tmp_name
, THUMB2ARM_GLUE_ENTRY_NAME
, name
);
6763 hash
= elf_link_hash_lookup
6764 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
6767 && asprintf (error_message
, _("unable to find %s glue '%s' for '%s'"),
6768 "Thumb", tmp_name
, name
) == -1)
6769 *error_message
= (char *) bfd_errmsg (bfd_error_system_call
);
6776 /* Locate the ARM encoded calling stub for NAME. */
6778 static struct elf_link_hash_entry
*
6779 find_arm_glue (struct bfd_link_info
*link_info
,
6781 char **error_message
)
6784 struct elf_link_hash_entry
*myh
;
6785 struct elf32_arm_link_hash_table
*hash_table
;
6787 /* We need a pointer to the elfarm specific hash table. */
6788 hash_table
= elf32_arm_hash_table (link_info
);
6789 if (hash_table
== NULL
)
6792 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen (name
)
6793 + strlen (ARM2THUMB_GLUE_ENTRY_NAME
) + 1);
6795 BFD_ASSERT (tmp_name
);
6797 sprintf (tmp_name
, ARM2THUMB_GLUE_ENTRY_NAME
, name
);
6799 myh
= elf_link_hash_lookup
6800 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
6803 && asprintf (error_message
, _("unable to find %s glue '%s' for '%s'"),
6804 "ARM", tmp_name
, name
) == -1)
6805 *error_message
= (char *) bfd_errmsg (bfd_error_system_call
);
6812 /* ARM->Thumb glue (static images):
6816 ldr r12, __func_addr
6819 .word func @ behave as if you saw a ARM_32 reloc.
6826 .word func @ behave as if you saw a ARM_32 reloc.
6828 (relocatable images)
6831 ldr r12, __func_offset
6837 #define ARM2THUMB_STATIC_GLUE_SIZE 12
6838 static const insn32 a2t1_ldr_insn
= 0xe59fc000;
6839 static const insn32 a2t2_bx_r12_insn
= 0xe12fff1c;
6840 static const insn32 a2t3_func_addr_insn
= 0x00000001;
6842 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
6843 static const insn32 a2t1v5_ldr_insn
= 0xe51ff004;
6844 static const insn32 a2t2v5_func_addr_insn
= 0x00000001;
6846 #define ARM2THUMB_PIC_GLUE_SIZE 16
6847 static const insn32 a2t1p_ldr_insn
= 0xe59fc004;
6848 static const insn32 a2t2p_add_pc_insn
= 0xe08cc00f;
6849 static const insn32 a2t3p_bx_r12_insn
= 0xe12fff1c;
6851 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
6855 __func_from_thumb: __func_from_thumb:
6857 nop ldr r6, __func_addr
6867 #define THUMB2ARM_GLUE_SIZE 8
6868 static const insn16 t2a1_bx_pc_insn
= 0x4778;
6869 static const insn16 t2a2_noop_insn
= 0x46c0;
6870 static const insn32 t2a3_b_insn
= 0xea000000;
6872 #define VFP11_ERRATUM_VENEER_SIZE 8
6873 #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16
6874 #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24
6876 #define ARM_BX_VENEER_SIZE 12
6877 static const insn32 armbx1_tst_insn
= 0xe3100001;
6878 static const insn32 armbx2_moveq_insn
= 0x01a0f000;
6879 static const insn32 armbx3_bx_insn
= 0xe12fff10;
6881 #ifndef ELFARM_NABI_C_INCLUDED
6883 arm_allocate_glue_section_space (bfd
* abfd
, bfd_size_type size
, const char * name
)
6886 bfd_byte
* contents
;
6890 /* Do not include empty glue sections in the output. */
6893 s
= bfd_get_linker_section (abfd
, name
);
6895 s
->flags
|= SEC_EXCLUDE
;
6900 BFD_ASSERT (abfd
!= NULL
);
6902 s
= bfd_get_linker_section (abfd
, name
);
6903 BFD_ASSERT (s
!= NULL
);
6905 contents
= (bfd_byte
*) bfd_alloc (abfd
, size
);
6907 BFD_ASSERT (s
->size
== size
);
6908 s
->contents
= contents
;
6912 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info
* info
)
6914 struct elf32_arm_link_hash_table
* globals
;
6916 globals
= elf32_arm_hash_table (info
);
6917 BFD_ASSERT (globals
!= NULL
);
6919 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
6920 globals
->arm_glue_size
,
6921 ARM2THUMB_GLUE_SECTION_NAME
);
6923 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
6924 globals
->thumb_glue_size
,
6925 THUMB2ARM_GLUE_SECTION_NAME
);
6927 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
6928 globals
->vfp11_erratum_glue_size
,
6929 VFP11_ERRATUM_VENEER_SECTION_NAME
);
6931 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
6932 globals
->stm32l4xx_erratum_glue_size
,
6933 STM32L4XX_ERRATUM_VENEER_SECTION_NAME
);
6935 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
6936 globals
->bx_glue_size
,
6937 ARM_BX_GLUE_SECTION_NAME
);
6942 /* Allocate space and symbols for calling a Thumb function from Arm mode.
6943 returns the symbol identifying the stub. */
6945 static struct elf_link_hash_entry
*
6946 record_arm_to_thumb_glue (struct bfd_link_info
* link_info
,
6947 struct elf_link_hash_entry
* h
)
6949 const char * name
= h
->root
.root
.string
;
6952 struct elf_link_hash_entry
* myh
;
6953 struct bfd_link_hash_entry
* bh
;
6954 struct elf32_arm_link_hash_table
* globals
;
6958 globals
= elf32_arm_hash_table (link_info
);
6959 BFD_ASSERT (globals
!= NULL
);
6960 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
6962 s
= bfd_get_linker_section
6963 (globals
->bfd_of_glue_owner
, ARM2THUMB_GLUE_SECTION_NAME
);
6965 BFD_ASSERT (s
!= NULL
);
6967 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen (name
)
6968 + strlen (ARM2THUMB_GLUE_ENTRY_NAME
) + 1);
6970 BFD_ASSERT (tmp_name
);
6972 sprintf (tmp_name
, ARM2THUMB_GLUE_ENTRY_NAME
, name
);
6974 myh
= elf_link_hash_lookup
6975 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
6979 /* We've already seen this guy. */
6984 /* The only trick here is using hash_table->arm_glue_size as the value.
6985 Even though the section isn't allocated yet, this is where we will be
6986 putting it. The +1 on the value marks that the stub has not been
6987 output yet - not that it is a Thumb function. */
6989 val
= globals
->arm_glue_size
+ 1;
6990 _bfd_generic_link_add_one_symbol (link_info
, globals
->bfd_of_glue_owner
,
6991 tmp_name
, BSF_GLOBAL
, s
, val
,
6992 NULL
, TRUE
, FALSE
, &bh
);
6994 myh
= (struct elf_link_hash_entry
*) bh
;
6995 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
6996 myh
->forced_local
= 1;
7000 if (bfd_link_pic (link_info
)
7001 || globals
->root
.is_relocatable_executable
7002 || globals
->pic_veneer
)
7003 size
= ARM2THUMB_PIC_GLUE_SIZE
;
7004 else if (globals
->use_blx
)
7005 size
= ARM2THUMB_V5_STATIC_GLUE_SIZE
;
7007 size
= ARM2THUMB_STATIC_GLUE_SIZE
;
7010 globals
->arm_glue_size
+= size
;
7015 /* Allocate space for ARMv4 BX veneers. */
7018 record_arm_bx_glue (struct bfd_link_info
* link_info
, int reg
)
7021 struct elf32_arm_link_hash_table
*globals
;
7023 struct elf_link_hash_entry
*myh
;
7024 struct bfd_link_hash_entry
*bh
;
7027 /* BX PC does not need a veneer. */
7031 globals
= elf32_arm_hash_table (link_info
);
7032 BFD_ASSERT (globals
!= NULL
);
7033 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
7035 /* Check if this veneer has already been allocated. */
7036 if (globals
->bx_glue_offset
[reg
])
7039 s
= bfd_get_linker_section
7040 (globals
->bfd_of_glue_owner
, ARM_BX_GLUE_SECTION_NAME
);
7042 BFD_ASSERT (s
!= NULL
);
7044 /* Add symbol for veneer. */
7046 bfd_malloc ((bfd_size_type
) strlen (ARM_BX_GLUE_ENTRY_NAME
) + 1);
7048 BFD_ASSERT (tmp_name
);
7050 sprintf (tmp_name
, ARM_BX_GLUE_ENTRY_NAME
, reg
);
7052 myh
= elf_link_hash_lookup
7053 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
7055 BFD_ASSERT (myh
== NULL
);
7058 val
= globals
->bx_glue_size
;
7059 _bfd_generic_link_add_one_symbol (link_info
, globals
->bfd_of_glue_owner
,
7060 tmp_name
, BSF_FUNCTION
| BSF_LOCAL
, s
, val
,
7061 NULL
, TRUE
, FALSE
, &bh
);
7063 myh
= (struct elf_link_hash_entry
*) bh
;
7064 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
7065 myh
->forced_local
= 1;
7067 s
->size
+= ARM_BX_VENEER_SIZE
;
7068 globals
->bx_glue_offset
[reg
] = globals
->bx_glue_size
| 2;
7069 globals
->bx_glue_size
+= ARM_BX_VENEER_SIZE
;
7073 /* Add an entry to the code/data map for section SEC. */
7076 elf32_arm_section_map_add (asection
*sec
, char type
, bfd_vma vma
)
7078 struct _arm_elf_section_data
*sec_data
= elf32_arm_section_data (sec
);
7079 unsigned int newidx
;
7081 if (sec_data
->map
== NULL
)
7083 sec_data
->map
= (elf32_arm_section_map
*)
7084 bfd_malloc (sizeof (elf32_arm_section_map
));
7085 sec_data
->mapcount
= 0;
7086 sec_data
->mapsize
= 1;
7089 newidx
= sec_data
->mapcount
++;
7091 if (sec_data
->mapcount
> sec_data
->mapsize
)
7093 sec_data
->mapsize
*= 2;
7094 sec_data
->map
= (elf32_arm_section_map
*)
7095 bfd_realloc_or_free (sec_data
->map
, sec_data
->mapsize
7096 * sizeof (elf32_arm_section_map
));
7101 sec_data
->map
[newidx
].vma
= vma
;
7102 sec_data
->map
[newidx
].type
= type
;
7107 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
7108 veneers are handled for now. */
7111 record_vfp11_erratum_veneer (struct bfd_link_info
*link_info
,
7112 elf32_vfp11_erratum_list
*branch
,
7114 asection
*branch_sec
,
7115 unsigned int offset
)
7118 struct elf32_arm_link_hash_table
*hash_table
;
7120 struct elf_link_hash_entry
*myh
;
7121 struct bfd_link_hash_entry
*bh
;
7123 struct _arm_elf_section_data
*sec_data
;
7124 elf32_vfp11_erratum_list
*newerr
;
7126 hash_table
= elf32_arm_hash_table (link_info
);
7127 BFD_ASSERT (hash_table
!= NULL
);
7128 BFD_ASSERT (hash_table
->bfd_of_glue_owner
!= NULL
);
7130 s
= bfd_get_linker_section
7131 (hash_table
->bfd_of_glue_owner
, VFP11_ERRATUM_VENEER_SECTION_NAME
);
7133 sec_data
= elf32_arm_section_data (s
);
7135 BFD_ASSERT (s
!= NULL
);
7137 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen
7138 (VFP11_ERRATUM_VENEER_ENTRY_NAME
) + 10);
7140 BFD_ASSERT (tmp_name
);
7142 sprintf (tmp_name
, VFP11_ERRATUM_VENEER_ENTRY_NAME
,
7143 hash_table
->num_vfp11_fixes
);
7145 myh
= elf_link_hash_lookup
7146 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
7148 BFD_ASSERT (myh
== NULL
);
7151 val
= hash_table
->vfp11_erratum_glue_size
;
7152 _bfd_generic_link_add_one_symbol (link_info
, hash_table
->bfd_of_glue_owner
,
7153 tmp_name
, BSF_FUNCTION
| BSF_LOCAL
, s
, val
,
7154 NULL
, TRUE
, FALSE
, &bh
);
7156 myh
= (struct elf_link_hash_entry
*) bh
;
7157 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
7158 myh
->forced_local
= 1;
7160 /* Link veneer back to calling location. */
7161 sec_data
->erratumcount
+= 1;
7162 newerr
= (elf32_vfp11_erratum_list
*)
7163 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list
));
7165 newerr
->type
= VFP11_ERRATUM_ARM_VENEER
;
7167 newerr
->u
.v
.branch
= branch
;
7168 newerr
->u
.v
.id
= hash_table
->num_vfp11_fixes
;
7169 branch
->u
.b
.veneer
= newerr
;
7171 newerr
->next
= sec_data
->erratumlist
;
7172 sec_data
->erratumlist
= newerr
;
7174 /* A symbol for the return from the veneer. */
7175 sprintf (tmp_name
, VFP11_ERRATUM_VENEER_ENTRY_NAME
"_r",
7176 hash_table
->num_vfp11_fixes
);
7178 myh
= elf_link_hash_lookup
7179 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
7186 _bfd_generic_link_add_one_symbol (link_info
, branch_bfd
, tmp_name
, BSF_LOCAL
,
7187 branch_sec
, val
, NULL
, TRUE
, FALSE
, &bh
);
7189 myh
= (struct elf_link_hash_entry
*) bh
;
7190 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
7191 myh
->forced_local
= 1;
7195 /* Generate a mapping symbol for the veneer section, and explicitly add an
7196 entry for that symbol to the code/data map for the section. */
7197 if (hash_table
->vfp11_erratum_glue_size
== 0)
7200 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
7201 ever requires this erratum fix. */
7202 _bfd_generic_link_add_one_symbol (link_info
,
7203 hash_table
->bfd_of_glue_owner
, "$a",
7204 BSF_LOCAL
, s
, 0, NULL
,
7207 myh
= (struct elf_link_hash_entry
*) bh
;
7208 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_NOTYPE
);
7209 myh
->forced_local
= 1;
7211 /* The elf32_arm_init_maps function only cares about symbols from input
7212 BFDs. We must make a note of this generated mapping symbol
7213 ourselves so that code byteswapping works properly in
7214 elf32_arm_write_section. */
7215 elf32_arm_section_map_add (s
, 'a', 0);
7218 s
->size
+= VFP11_ERRATUM_VENEER_SIZE
;
7219 hash_table
->vfp11_erratum_glue_size
+= VFP11_ERRATUM_VENEER_SIZE
;
7220 hash_table
->num_vfp11_fixes
++;
7222 /* The offset of the veneer. */
7226 /* Record information about a STM32L4XX STM erratum veneer. Only THUMB-mode
7227 veneers need to be handled because used only in Cortex-M. */
7230 record_stm32l4xx_erratum_veneer (struct bfd_link_info
*link_info
,
7231 elf32_stm32l4xx_erratum_list
*branch
,
7233 asection
*branch_sec
,
7234 unsigned int offset
,
7235 bfd_size_type veneer_size
)
7238 struct elf32_arm_link_hash_table
*hash_table
;
7240 struct elf_link_hash_entry
*myh
;
7241 struct bfd_link_hash_entry
*bh
;
7243 struct _arm_elf_section_data
*sec_data
;
7244 elf32_stm32l4xx_erratum_list
*newerr
;
7246 hash_table
= elf32_arm_hash_table (link_info
);
7247 BFD_ASSERT (hash_table
!= NULL
);
7248 BFD_ASSERT (hash_table
->bfd_of_glue_owner
!= NULL
);
7250 s
= bfd_get_linker_section
7251 (hash_table
->bfd_of_glue_owner
, STM32L4XX_ERRATUM_VENEER_SECTION_NAME
);
7253 BFD_ASSERT (s
!= NULL
);
7255 sec_data
= elf32_arm_section_data (s
);
7257 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen
7258 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
) + 10);
7260 BFD_ASSERT (tmp_name
);
7262 sprintf (tmp_name
, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
,
7263 hash_table
->num_stm32l4xx_fixes
);
7265 myh
= elf_link_hash_lookup
7266 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
7268 BFD_ASSERT (myh
== NULL
);
7271 val
= hash_table
->stm32l4xx_erratum_glue_size
;
7272 _bfd_generic_link_add_one_symbol (link_info
, hash_table
->bfd_of_glue_owner
,
7273 tmp_name
, BSF_FUNCTION
| BSF_LOCAL
, s
, val
,
7274 NULL
, TRUE
, FALSE
, &bh
);
7276 myh
= (struct elf_link_hash_entry
*) bh
;
7277 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
7278 myh
->forced_local
= 1;
7280 /* Link veneer back to calling location. */
7281 sec_data
->stm32l4xx_erratumcount
+= 1;
7282 newerr
= (elf32_stm32l4xx_erratum_list
*)
7283 bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list
));
7285 newerr
->type
= STM32L4XX_ERRATUM_VENEER
;
7287 newerr
->u
.v
.branch
= branch
;
7288 newerr
->u
.v
.id
= hash_table
->num_stm32l4xx_fixes
;
7289 branch
->u
.b
.veneer
= newerr
;
7291 newerr
->next
= sec_data
->stm32l4xx_erratumlist
;
7292 sec_data
->stm32l4xx_erratumlist
= newerr
;
7294 /* A symbol for the return from the veneer. */
7295 sprintf (tmp_name
, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
"_r",
7296 hash_table
->num_stm32l4xx_fixes
);
7298 myh
= elf_link_hash_lookup
7299 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
7306 _bfd_generic_link_add_one_symbol (link_info
, branch_bfd
, tmp_name
, BSF_LOCAL
,
7307 branch_sec
, val
, NULL
, TRUE
, FALSE
, &bh
);
7309 myh
= (struct elf_link_hash_entry
*) bh
;
7310 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
7311 myh
->forced_local
= 1;
7315 /* Generate a mapping symbol for the veneer section, and explicitly add an
7316 entry for that symbol to the code/data map for the section. */
7317 if (hash_table
->stm32l4xx_erratum_glue_size
== 0)
7320 /* Creates a THUMB symbol since there is no other choice. */
7321 _bfd_generic_link_add_one_symbol (link_info
,
7322 hash_table
->bfd_of_glue_owner
, "$t",
7323 BSF_LOCAL
, s
, 0, NULL
,
7326 myh
= (struct elf_link_hash_entry
*) bh
;
7327 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_NOTYPE
);
7328 myh
->forced_local
= 1;
7330 /* The elf32_arm_init_maps function only cares about symbols from input
7331 BFDs. We must make a note of this generated mapping symbol
7332 ourselves so that code byteswapping works properly in
7333 elf32_arm_write_section. */
7334 elf32_arm_section_map_add (s
, 't', 0);
7337 s
->size
+= veneer_size
;
7338 hash_table
->stm32l4xx_erratum_glue_size
+= veneer_size
;
7339 hash_table
->num_stm32l4xx_fixes
++;
7341 /* The offset of the veneer. */
7345 #define ARM_GLUE_SECTION_FLAGS \
7346 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
7347 | SEC_READONLY | SEC_LINKER_CREATED)
7349 /* Create a fake section for use by the ARM backend of the linker. */
7352 arm_make_glue_section (bfd
* abfd
, const char * name
)
7356 sec
= bfd_get_linker_section (abfd
, name
);
7361 sec
= bfd_make_section_anyway_with_flags (abfd
, name
, ARM_GLUE_SECTION_FLAGS
);
7364 || !bfd_set_section_alignment (abfd
, sec
, 2))
7367 /* Set the gc mark to prevent the section from being removed by garbage
7368 collection, despite the fact that no relocs refer to this section. */
7374 /* Set size of .plt entries. This function is called from the
7375 linker scripts in ld/emultempl/{armelf}.em. */
7378 bfd_elf32_arm_use_long_plt (void)
7380 elf32_arm_use_long_plt_entry
= TRUE
;
7383 /* Add the glue sections to ABFD. This function is called from the
7384 linker scripts in ld/emultempl/{armelf}.em. */
7387 bfd_elf32_arm_add_glue_sections_to_bfd (bfd
*abfd
,
7388 struct bfd_link_info
*info
)
7390 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (info
);
7391 bfd_boolean dostm32l4xx
= globals
7392 && globals
->stm32l4xx_fix
!= BFD_ARM_STM32L4XX_FIX_NONE
;
7393 bfd_boolean addglue
;
7395 /* If we are only performing a partial
7396 link do not bother adding the glue. */
7397 if (bfd_link_relocatable (info
))
7400 addglue
= arm_make_glue_section (abfd
, ARM2THUMB_GLUE_SECTION_NAME
)
7401 && arm_make_glue_section (abfd
, THUMB2ARM_GLUE_SECTION_NAME
)
7402 && arm_make_glue_section (abfd
, VFP11_ERRATUM_VENEER_SECTION_NAME
)
7403 && arm_make_glue_section (abfd
, ARM_BX_GLUE_SECTION_NAME
);
7409 && arm_make_glue_section (abfd
, STM32L4XX_ERRATUM_VENEER_SECTION_NAME
);
7412 /* Mark output sections of veneers needing a dedicated one with SEC_KEEP. This
7413 ensures they are not marked for deletion by
7414 strip_excluded_output_sections () when veneers are going to be created
7415 later. Not doing so would trigger assert on empty section size in
7416 lang_size_sections_1 (). */
7419 bfd_elf32_arm_keep_private_stub_output_sections (struct bfd_link_info
*info
)
7421 enum elf32_arm_stub_type stub_type
;
7423 /* If we are only performing a partial
7424 link do not bother adding the glue. */
7425 if (bfd_link_relocatable (info
))
7428 for (stub_type
= arm_stub_none
+ 1; stub_type
< max_stub_type
; stub_type
++)
7431 const char *out_sec_name
;
7433 if (!arm_dedicated_stub_output_section_required (stub_type
))
7436 out_sec_name
= arm_dedicated_stub_output_section_name (stub_type
);
7437 out_sec
= bfd_get_section_by_name (info
->output_bfd
, out_sec_name
);
7438 if (out_sec
!= NULL
)
7439 out_sec
->flags
|= SEC_KEEP
;
7443 /* Select a BFD to be used to hold the sections used by the glue code.
7444 This function is called from the linker scripts in ld/emultempl/
7448 bfd_elf32_arm_get_bfd_for_interworking (bfd
*abfd
, struct bfd_link_info
*info
)
7450 struct elf32_arm_link_hash_table
*globals
;
7452 /* If we are only performing a partial link
7453 do not bother getting a bfd to hold the glue. */
7454 if (bfd_link_relocatable (info
))
7457 /* Make sure we don't attach the glue sections to a dynamic object. */
7458 BFD_ASSERT (!(abfd
->flags
& DYNAMIC
));
7460 globals
= elf32_arm_hash_table (info
);
7461 BFD_ASSERT (globals
!= NULL
);
7463 if (globals
->bfd_of_glue_owner
!= NULL
)
7466 /* Save the bfd for later use. */
7467 globals
->bfd_of_glue_owner
= abfd
;
7473 check_use_blx (struct elf32_arm_link_hash_table
*globals
)
7477 cpu_arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
7480 if (globals
->fix_arm1176
)
7482 if (cpu_arch
== TAG_CPU_ARCH_V6T2
|| cpu_arch
> TAG_CPU_ARCH_V6K
)
7483 globals
->use_blx
= 1;
7487 if (cpu_arch
> TAG_CPU_ARCH_V4T
)
7488 globals
->use_blx
= 1;
7493 bfd_elf32_arm_process_before_allocation (bfd
*abfd
,
7494 struct bfd_link_info
*link_info
)
7496 Elf_Internal_Shdr
*symtab_hdr
;
7497 Elf_Internal_Rela
*internal_relocs
= NULL
;
7498 Elf_Internal_Rela
*irel
, *irelend
;
7499 bfd_byte
*contents
= NULL
;
7502 struct elf32_arm_link_hash_table
*globals
;
7504 /* If we are only performing a partial link do not bother
7505 to construct any glue. */
7506 if (bfd_link_relocatable (link_info
))
7509 /* Here we have a bfd that is to be included on the link. We have a
7510 hook to do reloc rummaging, before section sizes are nailed down. */
7511 globals
= elf32_arm_hash_table (link_info
);
7512 BFD_ASSERT (globals
!= NULL
);
7514 check_use_blx (globals
);
7516 if (globals
->byteswap_code
&& !bfd_big_endian (abfd
))
7518 _bfd_error_handler (_("%pB: BE8 images only valid in big-endian mode"),
7523 /* PR 5398: If we have not decided to include any loadable sections in
7524 the output then we will not have a glue owner bfd. This is OK, it
7525 just means that there is nothing else for us to do here. */
7526 if (globals
->bfd_of_glue_owner
== NULL
)
7529 /* Rummage around all the relocs and map the glue vectors. */
7530 sec
= abfd
->sections
;
7535 for (; sec
!= NULL
; sec
= sec
->next
)
7537 if (sec
->reloc_count
== 0)
7540 if ((sec
->flags
& SEC_EXCLUDE
) != 0)
7543 symtab_hdr
= & elf_symtab_hdr (abfd
);
7545 /* Load the relocs. */
7547 = _bfd_elf_link_read_relocs (abfd
, sec
, NULL
, NULL
, FALSE
);
7549 if (internal_relocs
== NULL
)
7552 irelend
= internal_relocs
+ sec
->reloc_count
;
7553 for (irel
= internal_relocs
; irel
< irelend
; irel
++)
7556 unsigned long r_index
;
7558 struct elf_link_hash_entry
*h
;
7560 r_type
= ELF32_R_TYPE (irel
->r_info
);
7561 r_index
= ELF32_R_SYM (irel
->r_info
);
7563 /* These are the only relocation types we care about. */
7564 if ( r_type
!= R_ARM_PC24
7565 && (r_type
!= R_ARM_V4BX
|| globals
->fix_v4bx
< 2))
7568 /* Get the section contents if we haven't done so already. */
7569 if (contents
== NULL
)
7571 /* Get cached copy if it exists. */
7572 if (elf_section_data (sec
)->this_hdr
.contents
!= NULL
)
7573 contents
= elf_section_data (sec
)->this_hdr
.contents
;
7576 /* Go get them off disk. */
7577 if (! bfd_malloc_and_get_section (abfd
, sec
, &contents
))
7582 if (r_type
== R_ARM_V4BX
)
7586 reg
= bfd_get_32 (abfd
, contents
+ irel
->r_offset
) & 0xf;
7587 record_arm_bx_glue (link_info
, reg
);
7591 /* If the relocation is not against a symbol it cannot concern us. */
7594 /* We don't care about local symbols. */
7595 if (r_index
< symtab_hdr
->sh_info
)
7598 /* This is an external symbol. */
7599 r_index
-= symtab_hdr
->sh_info
;
7600 h
= (struct elf_link_hash_entry
*)
7601 elf_sym_hashes (abfd
)[r_index
];
7603 /* If the relocation is against a static symbol it must be within
7604 the current section and so cannot be a cross ARM/Thumb relocation. */
7608 /* If the call will go through a PLT entry then we do not need
7610 if (globals
->root
.splt
!= NULL
&& h
->plt
.offset
!= (bfd_vma
) -1)
7616 /* This one is a call from arm code. We need to look up
7617 the target of the call. If it is a thumb target, we
7619 if (ARM_GET_SYM_BRANCH_TYPE (h
->target_internal
)
7620 == ST_BRANCH_TO_THUMB
)
7621 record_arm_to_thumb_glue (link_info
, h
);
7629 if (contents
!= NULL
7630 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
7634 if (internal_relocs
!= NULL
7635 && elf_section_data (sec
)->relocs
!= internal_relocs
)
7636 free (internal_relocs
);
7637 internal_relocs
= NULL
;
7643 if (contents
!= NULL
7644 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
7646 if (internal_relocs
!= NULL
7647 && elf_section_data (sec
)->relocs
!= internal_relocs
)
7648 free (internal_relocs
);
7655 /* Initialise maps of ARM/Thumb/data for input BFDs. */
7658 bfd_elf32_arm_init_maps (bfd
*abfd
)
7660 Elf_Internal_Sym
*isymbuf
;
7661 Elf_Internal_Shdr
*hdr
;
7662 unsigned int i
, localsyms
;
7664 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
7665 if (! is_arm_elf (abfd
))
7668 if ((abfd
->flags
& DYNAMIC
) != 0)
7671 hdr
= & elf_symtab_hdr (abfd
);
7672 localsyms
= hdr
->sh_info
;
7674 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
7675 should contain the number of local symbols, which should come before any
7676 global symbols. Mapping symbols are always local. */
7677 isymbuf
= bfd_elf_get_elf_syms (abfd
, hdr
, localsyms
, 0, NULL
, NULL
,
7680 /* No internal symbols read? Skip this BFD. */
7681 if (isymbuf
== NULL
)
7684 for (i
= 0; i
< localsyms
; i
++)
7686 Elf_Internal_Sym
*isym
= &isymbuf
[i
];
7687 asection
*sec
= bfd_section_from_elf_index (abfd
, isym
->st_shndx
);
7691 && ELF_ST_BIND (isym
->st_info
) == STB_LOCAL
)
7693 name
= bfd_elf_string_from_elf_section (abfd
,
7694 hdr
->sh_link
, isym
->st_name
);
7696 if (bfd_is_arm_special_symbol_name (name
,
7697 BFD_ARM_SPECIAL_SYM_TYPE_MAP
))
7698 elf32_arm_section_map_add (sec
, name
[1], isym
->st_value
);
7704 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
7705 say what they wanted. */
7708 bfd_elf32_arm_set_cortex_a8_fix (bfd
*obfd
, struct bfd_link_info
*link_info
)
7710 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
7711 obj_attribute
*out_attr
= elf_known_obj_attributes_proc (obfd
);
7713 if (globals
== NULL
)
7716 if (globals
->fix_cortex_a8
== -1)
7718 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
7719 if (out_attr
[Tag_CPU_arch
].i
== TAG_CPU_ARCH_V7
7720 && (out_attr
[Tag_CPU_arch_profile
].i
== 'A'
7721 || out_attr
[Tag_CPU_arch_profile
].i
== 0))
7722 globals
->fix_cortex_a8
= 1;
7724 globals
->fix_cortex_a8
= 0;
7730 bfd_elf32_arm_set_vfp11_fix (bfd
*obfd
, struct bfd_link_info
*link_info
)
7732 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
7733 obj_attribute
*out_attr
= elf_known_obj_attributes_proc (obfd
);
7735 if (globals
== NULL
)
7737 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
7738 if (out_attr
[Tag_CPU_arch
].i
>= TAG_CPU_ARCH_V7
)
7740 switch (globals
->vfp11_fix
)
7742 case BFD_ARM_VFP11_FIX_DEFAULT
:
7743 case BFD_ARM_VFP11_FIX_NONE
:
7744 globals
->vfp11_fix
= BFD_ARM_VFP11_FIX_NONE
;
7748 /* Give a warning, but do as the user requests anyway. */
7749 _bfd_error_handler (_("%pB: warning: selected VFP11 erratum "
7750 "workaround is not necessary for target architecture"), obfd
);
7753 else if (globals
->vfp11_fix
== BFD_ARM_VFP11_FIX_DEFAULT
)
7754 /* For earlier architectures, we might need the workaround, but do not
7755 enable it by default. If users is running with broken hardware, they
7756 must enable the erratum fix explicitly. */
7757 globals
->vfp11_fix
= BFD_ARM_VFP11_FIX_NONE
;
7761 bfd_elf32_arm_set_stm32l4xx_fix (bfd
*obfd
, struct bfd_link_info
*link_info
)
7763 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
7764 obj_attribute
*out_attr
= elf_known_obj_attributes_proc (obfd
);
7766 if (globals
== NULL
)
7769 /* We assume only Cortex-M4 may require the fix. */
7770 if (out_attr
[Tag_CPU_arch
].i
!= TAG_CPU_ARCH_V7E_M
7771 || out_attr
[Tag_CPU_arch_profile
].i
!= 'M')
7773 if (globals
->stm32l4xx_fix
!= BFD_ARM_STM32L4XX_FIX_NONE
)
7774 /* Give a warning, but do as the user requests anyway. */
7776 (_("%pB: warning: selected STM32L4XX erratum "
7777 "workaround is not necessary for target architecture"), obfd
);
7781 enum bfd_arm_vfp11_pipe
7789 /* Return a VFP register number. This is encoded as RX:X for single-precision
7790 registers, or X:RX for double-precision registers, where RX is the group of
7791 four bits in the instruction encoding and X is the single extension bit.
7792 RX and X fields are specified using their lowest (starting) bit. The return
7795 0...31: single-precision registers s0...s31
7796 32...63: double-precision registers d0...d31.
7798 Although X should be zero for VFP11 (encoding d0...d15 only), we might
7799 encounter VFP3 instructions, so we allow the full range for DP registers. */
7802 bfd_arm_vfp11_regno (unsigned int insn
, bfd_boolean is_double
, unsigned int rx
,
7806 return (((insn
>> rx
) & 0xf) | (((insn
>> x
) & 1) << 4)) + 32;
7808 return (((insn
>> rx
) & 0xf) << 1) | ((insn
>> x
) & 1);
7811 /* Set bits in *WMASK according to a register number REG as encoded by
7812 bfd_arm_vfp11_regno(). Ignore d16-d31. */
7815 bfd_arm_vfp11_write_mask (unsigned int *wmask
, unsigned int reg
)
7820 *wmask
|= 3 << ((reg
- 32) * 2);
7823 /* Return TRUE if WMASK overwrites anything in REGS. */
7826 bfd_arm_vfp11_antidependency (unsigned int wmask
, int *regs
, int numregs
)
7830 for (i
= 0; i
< numregs
; i
++)
7832 unsigned int reg
= regs
[i
];
7834 if (reg
< 32 && (wmask
& (1 << reg
)) != 0)
7842 if ((wmask
& (3 << (reg
* 2))) != 0)
7849 /* In this function, we're interested in two things: finding input registers
7850 for VFP data-processing instructions, and finding the set of registers which
7851 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
7852 hold the written set, so FLDM etc. are easy to deal with (we're only
7853 interested in 32 SP registers or 16 dp registers, due to the VFP version
7854 implemented by the chip in question). DP registers are marked by setting
7855 both SP registers in the write mask). */
7857 static enum bfd_arm_vfp11_pipe
7858 bfd_arm_vfp11_insn_decode (unsigned int insn
, unsigned int *destmask
, int *regs
,
7861 enum bfd_arm_vfp11_pipe vpipe
= VFP11_BAD
;
7862 bfd_boolean is_double
= ((insn
& 0xf00) == 0xb00) ? 1 : 0;
7864 if ((insn
& 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
7867 unsigned int fd
= bfd_arm_vfp11_regno (insn
, is_double
, 12, 22);
7868 unsigned int fm
= bfd_arm_vfp11_regno (insn
, is_double
, 0, 5);
7870 pqrs
= ((insn
& 0x00800000) >> 20)
7871 | ((insn
& 0x00300000) >> 19)
7872 | ((insn
& 0x00000040) >> 6);
7876 case 0: /* fmac[sd]. */
7877 case 1: /* fnmac[sd]. */
7878 case 2: /* fmsc[sd]. */
7879 case 3: /* fnmsc[sd]. */
7881 bfd_arm_vfp11_write_mask (destmask
, fd
);
7883 regs
[1] = bfd_arm_vfp11_regno (insn
, is_double
, 16, 7); /* Fn. */
7888 case 4: /* fmul[sd]. */
7889 case 5: /* fnmul[sd]. */
7890 case 6: /* fadd[sd]. */
7891 case 7: /* fsub[sd]. */
7895 case 8: /* fdiv[sd]. */
7898 bfd_arm_vfp11_write_mask (destmask
, fd
);
7899 regs
[0] = bfd_arm_vfp11_regno (insn
, is_double
, 16, 7); /* Fn. */
7904 case 15: /* extended opcode. */
7906 unsigned int extn
= ((insn
>> 15) & 0x1e)
7907 | ((insn
>> 7) & 1);
7911 case 0: /* fcpy[sd]. */
7912 case 1: /* fabs[sd]. */
7913 case 2: /* fneg[sd]. */
7914 case 8: /* fcmp[sd]. */
7915 case 9: /* fcmpe[sd]. */
7916 case 10: /* fcmpz[sd]. */
7917 case 11: /* fcmpez[sd]. */
7918 case 16: /* fuito[sd]. */
7919 case 17: /* fsito[sd]. */
7920 case 24: /* ftoui[sd]. */
7921 case 25: /* ftouiz[sd]. */
7922 case 26: /* ftosi[sd]. */
7923 case 27: /* ftosiz[sd]. */
7924 /* These instructions will not bounce due to underflow. */
7929 case 3: /* fsqrt[sd]. */
7930 /* fsqrt cannot underflow, but it can (perhaps) overwrite
7931 registers to cause the erratum in previous instructions. */
7932 bfd_arm_vfp11_write_mask (destmask
, fd
);
7936 case 15: /* fcvt{ds,sd}. */
7940 bfd_arm_vfp11_write_mask (destmask
, fd
);
7942 /* Only FCVTSD can underflow. */
7943 if ((insn
& 0x100) != 0)
7962 /* Two-register transfer. */
7963 else if ((insn
& 0x0fe00ed0) == 0x0c400a10)
7965 unsigned int fm
= bfd_arm_vfp11_regno (insn
, is_double
, 0, 5);
7967 if ((insn
& 0x100000) == 0)
7970 bfd_arm_vfp11_write_mask (destmask
, fm
);
7973 bfd_arm_vfp11_write_mask (destmask
, fm
);
7974 bfd_arm_vfp11_write_mask (destmask
, fm
+ 1);
7980 else if ((insn
& 0x0e100e00) == 0x0c100a00) /* A load insn. */
7982 int fd
= bfd_arm_vfp11_regno (insn
, is_double
, 12, 22);
7983 unsigned int puw
= ((insn
>> 21) & 0x1) | (((insn
>> 23) & 3) << 1);
7987 case 0: /* Two-reg transfer. We should catch these above. */
7990 case 2: /* fldm[sdx]. */
7994 unsigned int i
, offset
= insn
& 0xff;
7999 for (i
= fd
; i
< fd
+ offset
; i
++)
8000 bfd_arm_vfp11_write_mask (destmask
, i
);
8004 case 4: /* fld[sd]. */
8006 bfd_arm_vfp11_write_mask (destmask
, fd
);
8015 /* Single-register transfer. Note L==0. */
8016 else if ((insn
& 0x0f100e10) == 0x0e000a10)
8018 unsigned int opcode
= (insn
>> 21) & 7;
8019 unsigned int fn
= bfd_arm_vfp11_regno (insn
, is_double
, 16, 7);
8023 case 0: /* fmsr/fmdlr. */
8024 case 1: /* fmdhr. */
8025 /* Mark fmdhr and fmdlr as writing to the whole of the DP
8026 destination register. I don't know if this is exactly right,
8027 but it is the conservative choice. */
8028 bfd_arm_vfp11_write_mask (destmask
, fn
);
8042 static int elf32_arm_compare_mapping (const void * a
, const void * b
);
8045 /* Look for potentially-troublesome code sequences which might trigger the
8046 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
8047 (available from ARM) for details of the erratum. A short version is
8048 described in ld.texinfo. */
8051 bfd_elf32_arm_vfp11_erratum_scan (bfd
*abfd
, struct bfd_link_info
*link_info
)
8054 bfd_byte
*contents
= NULL
;
8056 int regs
[3], numregs
= 0;
8057 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
8058 int use_vector
= (globals
->vfp11_fix
== BFD_ARM_VFP11_FIX_VECTOR
);
8060 if (globals
== NULL
)
8063 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
8064 The states transition as follows:
8066 0 -> 1 (vector) or 0 -> 2 (scalar)
8067 A VFP FMAC-pipeline instruction has been seen. Fill
8068 regs[0]..regs[numregs-1] with its input operands. Remember this
8069 instruction in 'first_fmac'.
8072 Any instruction, except for a VFP instruction which overwrites
8077 A VFP instruction has been seen which overwrites any of regs[*].
8078 We must make a veneer! Reset state to 0 before examining next
8082 If we fail to match anything in state 2, reset to state 0 and reset
8083 the instruction pointer to the instruction after 'first_fmac'.
8085 If the VFP11 vector mode is in use, there must be at least two unrelated
8086 instructions between anti-dependent VFP11 instructions to properly avoid
8087 triggering the erratum, hence the use of the extra state 1. */
8089 /* If we are only performing a partial link do not bother
8090 to construct any glue. */
8091 if (bfd_link_relocatable (link_info
))
8094 /* Skip if this bfd does not correspond to an ELF image. */
8095 if (! is_arm_elf (abfd
))
8098 /* We should have chosen a fix type by the time we get here. */
8099 BFD_ASSERT (globals
->vfp11_fix
!= BFD_ARM_VFP11_FIX_DEFAULT
);
8101 if (globals
->vfp11_fix
== BFD_ARM_VFP11_FIX_NONE
)
8104 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8105 if ((abfd
->flags
& (EXEC_P
| DYNAMIC
)) != 0)
8108 for (sec
= abfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
8110 unsigned int i
, span
, first_fmac
= 0, veneer_of_insn
= 0;
8111 struct _arm_elf_section_data
*sec_data
;
8113 /* If we don't have executable progbits, we're not interested in this
8114 section. Also skip if section is to be excluded. */
8115 if (elf_section_type (sec
) != SHT_PROGBITS
8116 || (elf_section_flags (sec
) & SHF_EXECINSTR
) == 0
8117 || (sec
->flags
& SEC_EXCLUDE
) != 0
8118 || sec
->sec_info_type
== SEC_INFO_TYPE_JUST_SYMS
8119 || sec
->output_section
== bfd_abs_section_ptr
8120 || strcmp (sec
->name
, VFP11_ERRATUM_VENEER_SECTION_NAME
) == 0)
8123 sec_data
= elf32_arm_section_data (sec
);
8125 if (sec_data
->mapcount
== 0)
8128 if (elf_section_data (sec
)->this_hdr
.contents
!= NULL
)
8129 contents
= elf_section_data (sec
)->this_hdr
.contents
;
8130 else if (! bfd_malloc_and_get_section (abfd
, sec
, &contents
))
8133 qsort (sec_data
->map
, sec_data
->mapcount
, sizeof (elf32_arm_section_map
),
8134 elf32_arm_compare_mapping
);
8136 for (span
= 0; span
< sec_data
->mapcount
; span
++)
8138 unsigned int span_start
= sec_data
->map
[span
].vma
;
8139 unsigned int span_end
= (span
== sec_data
->mapcount
- 1)
8140 ? sec
->size
: sec_data
->map
[span
+ 1].vma
;
8141 char span_type
= sec_data
->map
[span
].type
;
8143 /* FIXME: Only ARM mode is supported at present. We may need to
8144 support Thumb-2 mode also at some point. */
8145 if (span_type
!= 'a')
8148 for (i
= span_start
; i
< span_end
;)
8150 unsigned int next_i
= i
+ 4;
8151 unsigned int insn
= bfd_big_endian (abfd
)
8152 ? (contents
[i
] << 24)
8153 | (contents
[i
+ 1] << 16)
8154 | (contents
[i
+ 2] << 8)
8156 : (contents
[i
+ 3] << 24)
8157 | (contents
[i
+ 2] << 16)
8158 | (contents
[i
+ 1] << 8)
8160 unsigned int writemask
= 0;
8161 enum bfd_arm_vfp11_pipe vpipe
;
8166 vpipe
= bfd_arm_vfp11_insn_decode (insn
, &writemask
, regs
,
8168 /* I'm assuming the VFP11 erratum can trigger with denorm
8169 operands on either the FMAC or the DS pipeline. This might
8170 lead to slightly overenthusiastic veneer insertion. */
8171 if (vpipe
== VFP11_FMAC
|| vpipe
== VFP11_DS
)
8173 state
= use_vector
? 1 : 2;
8175 veneer_of_insn
= insn
;
8181 int other_regs
[3], other_numregs
;
8182 vpipe
= bfd_arm_vfp11_insn_decode (insn
, &writemask
,
8185 if (vpipe
!= VFP11_BAD
8186 && bfd_arm_vfp11_antidependency (writemask
, regs
,
8196 int other_regs
[3], other_numregs
;
8197 vpipe
= bfd_arm_vfp11_insn_decode (insn
, &writemask
,
8200 if (vpipe
!= VFP11_BAD
8201 && bfd_arm_vfp11_antidependency (writemask
, regs
,
8207 next_i
= first_fmac
+ 4;
8213 abort (); /* Should be unreachable. */
8218 elf32_vfp11_erratum_list
*newerr
=(elf32_vfp11_erratum_list
*)
8219 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list
));
8221 elf32_arm_section_data (sec
)->erratumcount
+= 1;
8223 newerr
->u
.b
.vfp_insn
= veneer_of_insn
;
8228 newerr
->type
= VFP11_ERRATUM_BRANCH_TO_ARM_VENEER
;
8235 record_vfp11_erratum_veneer (link_info
, newerr
, abfd
, sec
,
8240 newerr
->next
= sec_data
->erratumlist
;
8241 sec_data
->erratumlist
= newerr
;
8250 if (contents
!= NULL
8251 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
8259 if (contents
!= NULL
8260 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
8266 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
8267 after sections have been laid out, using specially-named symbols. */
8270 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd
*abfd
,
8271 struct bfd_link_info
*link_info
)
8274 struct elf32_arm_link_hash_table
*globals
;
8277 if (bfd_link_relocatable (link_info
))
8280 /* Skip if this bfd does not correspond to an ELF image. */
8281 if (! is_arm_elf (abfd
))
8284 globals
= elf32_arm_hash_table (link_info
);
8285 if (globals
== NULL
)
8288 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen
8289 (VFP11_ERRATUM_VENEER_ENTRY_NAME
) + 10);
8291 for (sec
= abfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
8293 struct _arm_elf_section_data
*sec_data
= elf32_arm_section_data (sec
);
8294 elf32_vfp11_erratum_list
*errnode
= sec_data
->erratumlist
;
8296 for (; errnode
!= NULL
; errnode
= errnode
->next
)
8298 struct elf_link_hash_entry
*myh
;
8301 switch (errnode
->type
)
8303 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER
:
8304 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER
:
8305 /* Find veneer symbol. */
8306 sprintf (tmp_name
, VFP11_ERRATUM_VENEER_ENTRY_NAME
,
8307 errnode
->u
.b
.veneer
->u
.v
.id
);
8309 myh
= elf_link_hash_lookup
8310 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
8313 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8314 abfd
, "VFP11", tmp_name
);
8316 vma
= myh
->root
.u
.def
.section
->output_section
->vma
8317 + myh
->root
.u
.def
.section
->output_offset
8318 + myh
->root
.u
.def
.value
;
8320 errnode
->u
.b
.veneer
->vma
= vma
;
8323 case VFP11_ERRATUM_ARM_VENEER
:
8324 case VFP11_ERRATUM_THUMB_VENEER
:
8325 /* Find return location. */
8326 sprintf (tmp_name
, VFP11_ERRATUM_VENEER_ENTRY_NAME
"_r",
8329 myh
= elf_link_hash_lookup
8330 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
8333 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8334 abfd
, "VFP11", tmp_name
);
8336 vma
= myh
->root
.u
.def
.section
->output_section
->vma
8337 + myh
->root
.u
.def
.section
->output_offset
8338 + myh
->root
.u
.def
.value
;
8340 errnode
->u
.v
.branch
->vma
= vma
;
8352 /* Find virtual-memory addresses for STM32L4XX erratum veneers and
8353 return locations after sections have been laid out, using
8354 specially-named symbols. */
8357 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd
*abfd
,
8358 struct bfd_link_info
*link_info
)
8361 struct elf32_arm_link_hash_table
*globals
;
8364 if (bfd_link_relocatable (link_info
))
8367 /* Skip if this bfd does not correspond to an ELF image. */
8368 if (! is_arm_elf (abfd
))
8371 globals
= elf32_arm_hash_table (link_info
);
8372 if (globals
== NULL
)
8375 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen
8376 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
) + 10);
8378 for (sec
= abfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
8380 struct _arm_elf_section_data
*sec_data
= elf32_arm_section_data (sec
);
8381 elf32_stm32l4xx_erratum_list
*errnode
= sec_data
->stm32l4xx_erratumlist
;
8383 for (; errnode
!= NULL
; errnode
= errnode
->next
)
8385 struct elf_link_hash_entry
*myh
;
8388 switch (errnode
->type
)
8390 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER
:
8391 /* Find veneer symbol. */
8392 sprintf (tmp_name
, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
,
8393 errnode
->u
.b
.veneer
->u
.v
.id
);
8395 myh
= elf_link_hash_lookup
8396 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
8399 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8400 abfd
, "STM32L4XX", tmp_name
);
8402 vma
= myh
->root
.u
.def
.section
->output_section
->vma
8403 + myh
->root
.u
.def
.section
->output_offset
8404 + myh
->root
.u
.def
.value
;
8406 errnode
->u
.b
.veneer
->vma
= vma
;
8409 case STM32L4XX_ERRATUM_VENEER
:
8410 /* Find return location. */
8411 sprintf (tmp_name
, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
"_r",
8414 myh
= elf_link_hash_lookup
8415 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
8418 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8419 abfd
, "STM32L4XX", tmp_name
);
8421 vma
= myh
->root
.u
.def
.section
->output_section
->vma
8422 + myh
->root
.u
.def
.section
->output_offset
8423 + myh
->root
.u
.def
.value
;
8425 errnode
->u
.v
.branch
->vma
= vma
;
8437 static inline bfd_boolean
8438 is_thumb2_ldmia (const insn32 insn
)
8440 /* Encoding T2: LDM<c>.W <Rn>{!},<registers>
8441 1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll. */
8442 return (insn
& 0xffd02000) == 0xe8900000;
8445 static inline bfd_boolean
8446 is_thumb2_ldmdb (const insn32 insn
)
8448 /* Encoding T1: LDMDB<c> <Rn>{!},<registers>
8449 1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll. */
8450 return (insn
& 0xffd02000) == 0xe9100000;
8453 static inline bfd_boolean
8454 is_thumb2_vldm (const insn32 insn
)
8456 /* A6.5 Extension register load or store instruction
8458 We look for SP 32-bit and DP 64-bit registers.
8459 Encoding T1 VLDM{mode}<c> <Rn>{!}, <list>
8460 <list> is consecutive 64-bit registers
8461 1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii
8462 Encoding T2 VLDM{mode}<c> <Rn>{!}, <list>
8463 <list> is consecutive 32-bit registers
8464 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii
8465 if P==0 && U==1 && W==1 && Rn=1101 VPOP
8466 if PUW=010 || PUW=011 || PUW=101 VLDM. */
8468 (((insn
& 0xfe100f00) == 0xec100b00) ||
8469 ((insn
& 0xfe100f00) == 0xec100a00))
8470 && /* (IA without !). */
8471 (((((insn
<< 7) >> 28) & 0xd) == 0x4)
8472 /* (IA with !), includes VPOP (when reg number is SP). */
8473 || ((((insn
<< 7) >> 28) & 0xd) == 0x5)
8475 || ((((insn
<< 7) >> 28) & 0xd) == 0x9));
8478 /* STM STM32L4XX erratum : This function assumes that it receives an LDM or
8480 - computes the number and the mode of memory accesses
8481 - decides if the replacement should be done:
8482 . replaces only if > 8-word accesses
8483 . or (testing purposes only) replaces all accesses. */
8486 stm32l4xx_need_create_replacing_stub (const insn32 insn
,
8487 bfd_arm_stm32l4xx_fix stm32l4xx_fix
)
8491 /* The field encoding the register list is the same for both LDMIA
8492 and LDMDB encodings. */
8493 if (is_thumb2_ldmia (insn
) || is_thumb2_ldmdb (insn
))
8494 nb_words
= elf32_arm_popcount (insn
& 0x0000ffff);
8495 else if (is_thumb2_vldm (insn
))
8496 nb_words
= (insn
& 0xff);
8498 /* DEFAULT mode accounts for the real bug condition situation,
8499 ALL mode inserts stubs for each LDM/VLDM instruction (testing). */
8501 (stm32l4xx_fix
== BFD_ARM_STM32L4XX_FIX_DEFAULT
) ? nb_words
> 8 :
8502 (stm32l4xx_fix
== BFD_ARM_STM32L4XX_FIX_ALL
) ? TRUE
: FALSE
;
8505 /* Look for potentially-troublesome code sequences which might trigger
8506 the STM STM32L4XX erratum. */
8509 bfd_elf32_arm_stm32l4xx_erratum_scan (bfd
*abfd
,
8510 struct bfd_link_info
*link_info
)
8513 bfd_byte
*contents
= NULL
;
8514 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
8516 if (globals
== NULL
)
8519 /* If we are only performing a partial link do not bother
8520 to construct any glue. */
8521 if (bfd_link_relocatable (link_info
))
8524 /* Skip if this bfd does not correspond to an ELF image. */
8525 if (! is_arm_elf (abfd
))
8528 if (globals
->stm32l4xx_fix
== BFD_ARM_STM32L4XX_FIX_NONE
)
8531 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8532 if ((abfd
->flags
& (EXEC_P
| DYNAMIC
)) != 0)
8535 for (sec
= abfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
8537 unsigned int i
, span
;
8538 struct _arm_elf_section_data
*sec_data
;
8540 /* If we don't have executable progbits, we're not interested in this
8541 section. Also skip if section is to be excluded. */
8542 if (elf_section_type (sec
) != SHT_PROGBITS
8543 || (elf_section_flags (sec
) & SHF_EXECINSTR
) == 0
8544 || (sec
->flags
& SEC_EXCLUDE
) != 0
8545 || sec
->sec_info_type
== SEC_INFO_TYPE_JUST_SYMS
8546 || sec
->output_section
== bfd_abs_section_ptr
8547 || strcmp (sec
->name
, STM32L4XX_ERRATUM_VENEER_SECTION_NAME
) == 0)
8550 sec_data
= elf32_arm_section_data (sec
);
8552 if (sec_data
->mapcount
== 0)
8555 if (elf_section_data (sec
)->this_hdr
.contents
!= NULL
)
8556 contents
= elf_section_data (sec
)->this_hdr
.contents
;
8557 else if (! bfd_malloc_and_get_section (abfd
, sec
, &contents
))
8560 qsort (sec_data
->map
, sec_data
->mapcount
, sizeof (elf32_arm_section_map
),
8561 elf32_arm_compare_mapping
);
8563 for (span
= 0; span
< sec_data
->mapcount
; span
++)
8565 unsigned int span_start
= sec_data
->map
[span
].vma
;
8566 unsigned int span_end
= (span
== sec_data
->mapcount
- 1)
8567 ? sec
->size
: sec_data
->map
[span
+ 1].vma
;
8568 char span_type
= sec_data
->map
[span
].type
;
8569 int itblock_current_pos
= 0;
8571 /* Only Thumb2 mode need be supported with this CM4 specific
8572 code, we should not encounter any arm mode eg span_type
8574 if (span_type
!= 't')
8577 for (i
= span_start
; i
< span_end
;)
8579 unsigned int insn
= bfd_get_16 (abfd
, &contents
[i
]);
8580 bfd_boolean insn_32bit
= FALSE
;
8581 bfd_boolean is_ldm
= FALSE
;
8582 bfd_boolean is_vldm
= FALSE
;
8583 bfd_boolean is_not_last_in_it_block
= FALSE
;
8585 /* The first 16-bits of all 32-bit thumb2 instructions start
8586 with opcode[15..13]=0b111 and the encoded op1 can be anything
8587 except opcode[12..11]!=0b00.
8588 See 32-bit Thumb instruction encoding. */
8589 if ((insn
& 0xe000) == 0xe000 && (insn
& 0x1800) != 0x0000)
8592 /* Compute the predicate that tells if the instruction
8593 is concerned by the IT block
8594 - Creates an error if there is a ldm that is not
8595 last in the IT block thus cannot be replaced
8596 - Otherwise we can create a branch at the end of the
8597 IT block, it will be controlled naturally by IT
8598 with the proper pseudo-predicate
8599 - So the only interesting predicate is the one that
8600 tells that we are not on the last item of an IT
8602 if (itblock_current_pos
!= 0)
8603 is_not_last_in_it_block
= !!--itblock_current_pos
;
8607 /* Load the rest of the insn (in manual-friendly order). */
8608 insn
= (insn
<< 16) | bfd_get_16 (abfd
, &contents
[i
+ 2]);
8609 is_ldm
= is_thumb2_ldmia (insn
) || is_thumb2_ldmdb (insn
);
8610 is_vldm
= is_thumb2_vldm (insn
);
8612 /* Veneers are created for (v)ldm depending on
8613 option flags and memory accesses conditions; but
8614 if the instruction is not the last instruction of
8615 an IT block, we cannot create a jump there, so we
8617 if ((is_ldm
|| is_vldm
)
8618 && stm32l4xx_need_create_replacing_stub
8619 (insn
, globals
->stm32l4xx_fix
))
8621 if (is_not_last_in_it_block
)
8624 /* xgettext:c-format */
8625 (_("%pB(%pA+%#x): error: multiple load detected"
8626 " in non-last IT block instruction:"
8627 " STM32L4XX veneer cannot be generated; "
8628 "use gcc option -mrestrict-it to generate"
8629 " only one instruction per IT block"),
8634 elf32_stm32l4xx_erratum_list
*newerr
=
8635 (elf32_stm32l4xx_erratum_list
*)
8637 (sizeof (elf32_stm32l4xx_erratum_list
));
8639 elf32_arm_section_data (sec
)
8640 ->stm32l4xx_erratumcount
+= 1;
8641 newerr
->u
.b
.insn
= insn
;
8642 /* We create only thumb branches. */
8644 STM32L4XX_ERRATUM_BRANCH_TO_VENEER
;
8645 record_stm32l4xx_erratum_veneer
8646 (link_info
, newerr
, abfd
, sec
,
8649 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
:
8650 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE
);
8652 newerr
->next
= sec_data
->stm32l4xx_erratumlist
;
8653 sec_data
->stm32l4xx_erratumlist
= newerr
;
8660 IT blocks are only encoded in T1
8661 Encoding T1: IT{x{y{z}}} <firstcond>
8662 1 0 1 1 - 1 1 1 1 - firstcond - mask
8663 if mask = '0000' then see 'related encodings'
8664 We don't deal with UNPREDICTABLE, just ignore these.
8665 There can be no nested IT blocks so an IT block
8666 is naturally a new one for which it is worth
8667 computing its size. */
8668 bfd_boolean is_newitblock
= ((insn
& 0xff00) == 0xbf00)
8669 && ((insn
& 0x000f) != 0x0000);
8670 /* If we have a new IT block we compute its size. */
8673 /* Compute the number of instructions controlled
8674 by the IT block, it will be used to decide
8675 whether we are inside an IT block or not. */
8676 unsigned int mask
= insn
& 0x000f;
8677 itblock_current_pos
= 4 - ctz (mask
);
8681 i
+= insn_32bit
? 4 : 2;
8685 if (contents
!= NULL
8686 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
8694 if (contents
!= NULL
8695 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
8701 /* Set target relocation values needed during linking. */
8704 bfd_elf32_arm_set_target_params (struct bfd
*output_bfd
,
8705 struct bfd_link_info
*link_info
,
8706 struct elf32_arm_params
*params
)
8708 struct elf32_arm_link_hash_table
*globals
;
8710 globals
= elf32_arm_hash_table (link_info
);
8711 if (globals
== NULL
)
8714 globals
->target1_is_rel
= params
->target1_is_rel
;
8715 if (strcmp (params
->target2_type
, "rel") == 0)
8716 globals
->target2_reloc
= R_ARM_REL32
;
8717 else if (strcmp (params
->target2_type
, "abs") == 0)
8718 globals
->target2_reloc
= R_ARM_ABS32
;
8719 else if (strcmp (params
->target2_type
, "got-rel") == 0)
8720 globals
->target2_reloc
= R_ARM_GOT_PREL
;
8723 _bfd_error_handler (_("invalid TARGET2 relocation type '%s'"),
8724 params
->target2_type
);
8726 globals
->fix_v4bx
= params
->fix_v4bx
;
8727 globals
->use_blx
|= params
->use_blx
;
8728 globals
->vfp11_fix
= params
->vfp11_denorm_fix
;
8729 globals
->stm32l4xx_fix
= params
->stm32l4xx_fix
;
8730 globals
->pic_veneer
= params
->pic_veneer
;
8731 globals
->fix_cortex_a8
= params
->fix_cortex_a8
;
8732 globals
->fix_arm1176
= params
->fix_arm1176
;
8733 globals
->cmse_implib
= params
->cmse_implib
;
8734 globals
->in_implib_bfd
= params
->in_implib_bfd
;
8736 BFD_ASSERT (is_arm_elf (output_bfd
));
8737 elf_arm_tdata (output_bfd
)->no_enum_size_warning
8738 = params
->no_enum_size_warning
;
8739 elf_arm_tdata (output_bfd
)->no_wchar_size_warning
8740 = params
->no_wchar_size_warning
;
8743 /* Replace the target offset of a Thumb bl or b.w instruction. */
8746 insert_thumb_branch (bfd
*abfd
, long int offset
, bfd_byte
*insn
)
8752 BFD_ASSERT ((offset
& 1) == 0);
8754 upper
= bfd_get_16 (abfd
, insn
);
8755 lower
= bfd_get_16 (abfd
, insn
+ 2);
8756 reloc_sign
= (offset
< 0) ? 1 : 0;
8757 upper
= (upper
& ~(bfd_vma
) 0x7ff)
8758 | ((offset
>> 12) & 0x3ff)
8759 | (reloc_sign
<< 10);
8760 lower
= (lower
& ~(bfd_vma
) 0x2fff)
8761 | (((!((offset
>> 23) & 1)) ^ reloc_sign
) << 13)
8762 | (((!((offset
>> 22) & 1)) ^ reloc_sign
) << 11)
8763 | ((offset
>> 1) & 0x7ff);
8764 bfd_put_16 (abfd
, upper
, insn
);
8765 bfd_put_16 (abfd
, lower
, insn
+ 2);
8768 /* Thumb code calling an ARM function. */
8771 elf32_thumb_to_arm_stub (struct bfd_link_info
* info
,
8775 asection
* input_section
,
8776 bfd_byte
* hit_data
,
8779 bfd_signed_vma addend
,
8781 char **error_message
)
8785 long int ret_offset
;
8786 struct elf_link_hash_entry
* myh
;
8787 struct elf32_arm_link_hash_table
* globals
;
8789 myh
= find_thumb_glue (info
, name
, error_message
);
8793 globals
= elf32_arm_hash_table (info
);
8794 BFD_ASSERT (globals
!= NULL
);
8795 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
8797 my_offset
= myh
->root
.u
.def
.value
;
8799 s
= bfd_get_linker_section (globals
->bfd_of_glue_owner
,
8800 THUMB2ARM_GLUE_SECTION_NAME
);
8802 BFD_ASSERT (s
!= NULL
);
8803 BFD_ASSERT (s
->contents
!= NULL
);
8804 BFD_ASSERT (s
->output_section
!= NULL
);
8806 if ((my_offset
& 0x01) == 0x01)
8809 && sym_sec
->owner
!= NULL
8810 && !INTERWORK_FLAG (sym_sec
->owner
))
8813 (_("%pB(%s): warning: interworking not enabled;"
8814 " first occurrence: %pB: %s call to %s"),
8815 sym_sec
->owner
, name
, input_bfd
, "Thumb", "ARM");
8821 myh
->root
.u
.def
.value
= my_offset
;
8823 put_thumb_insn (globals
, output_bfd
, (bfd_vma
) t2a1_bx_pc_insn
,
8824 s
->contents
+ my_offset
);
8826 put_thumb_insn (globals
, output_bfd
, (bfd_vma
) t2a2_noop_insn
,
8827 s
->contents
+ my_offset
+ 2);
8830 /* Address of destination of the stub. */
8831 ((bfd_signed_vma
) val
)
8833 /* Offset from the start of the current section
8834 to the start of the stubs. */
8836 /* Offset of the start of this stub from the start of the stubs. */
8838 /* Address of the start of the current section. */
8839 + s
->output_section
->vma
)
8840 /* The branch instruction is 4 bytes into the stub. */
8842 /* ARM branches work from the pc of the instruction + 8. */
8845 put_arm_insn (globals
, output_bfd
,
8846 (bfd_vma
) t2a3_b_insn
| ((ret_offset
>> 2) & 0x00FFFFFF),
8847 s
->contents
+ my_offset
+ 4);
8850 BFD_ASSERT (my_offset
<= globals
->thumb_glue_size
);
8852 /* Now go back and fix up the original BL insn to point to here. */
8854 /* Address of where the stub is located. */
8855 (s
->output_section
->vma
+ s
->output_offset
+ my_offset
)
8856 /* Address of where the BL is located. */
8857 - (input_section
->output_section
->vma
+ input_section
->output_offset
8859 /* Addend in the relocation. */
8861 /* Biassing for PC-relative addressing. */
8864 insert_thumb_branch (input_bfd
, ret_offset
, hit_data
- input_section
->vma
);
8869 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
8871 static struct elf_link_hash_entry
*
8872 elf32_arm_create_thumb_stub (struct bfd_link_info
* info
,
8879 char ** error_message
)
8882 long int ret_offset
;
8883 struct elf_link_hash_entry
* myh
;
8884 struct elf32_arm_link_hash_table
* globals
;
8886 myh
= find_arm_glue (info
, name
, error_message
);
8890 globals
= elf32_arm_hash_table (info
);
8891 BFD_ASSERT (globals
!= NULL
);
8892 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
8894 my_offset
= myh
->root
.u
.def
.value
;
8896 if ((my_offset
& 0x01) == 0x01)
8899 && sym_sec
->owner
!= NULL
8900 && !INTERWORK_FLAG (sym_sec
->owner
))
8903 (_("%pB(%s): warning: interworking not enabled;"
8904 " first occurrence: %pB: %s call to %s"),
8905 sym_sec
->owner
, name
, input_bfd
, "ARM", "Thumb");
8909 myh
->root
.u
.def
.value
= my_offset
;
8911 if (bfd_link_pic (info
)
8912 || globals
->root
.is_relocatable_executable
8913 || globals
->pic_veneer
)
8915 /* For relocatable objects we can't use absolute addresses,
8916 so construct the address from a relative offset. */
8917 /* TODO: If the offset is small it's probably worth
8918 constructing the address with adds. */
8919 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t1p_ldr_insn
,
8920 s
->contents
+ my_offset
);
8921 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t2p_add_pc_insn
,
8922 s
->contents
+ my_offset
+ 4);
8923 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t3p_bx_r12_insn
,
8924 s
->contents
+ my_offset
+ 8);
8925 /* Adjust the offset by 4 for the position of the add,
8926 and 8 for the pipeline offset. */
8927 ret_offset
= (val
- (s
->output_offset
8928 + s
->output_section
->vma
8931 bfd_put_32 (output_bfd
, ret_offset
,
8932 s
->contents
+ my_offset
+ 12);
8934 else if (globals
->use_blx
)
8936 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t1v5_ldr_insn
,
8937 s
->contents
+ my_offset
);
8939 /* It's a thumb address. Add the low order bit. */
8940 bfd_put_32 (output_bfd
, val
| a2t2v5_func_addr_insn
,
8941 s
->contents
+ my_offset
+ 4);
8945 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t1_ldr_insn
,
8946 s
->contents
+ my_offset
);
8948 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t2_bx_r12_insn
,
8949 s
->contents
+ my_offset
+ 4);
8951 /* It's a thumb address. Add the low order bit. */
8952 bfd_put_32 (output_bfd
, val
| a2t3_func_addr_insn
,
8953 s
->contents
+ my_offset
+ 8);
8959 BFD_ASSERT (my_offset
<= globals
->arm_glue_size
);
8964 /* Arm code calling a Thumb function. */
8967 elf32_arm_to_thumb_stub (struct bfd_link_info
* info
,
8971 asection
* input_section
,
8972 bfd_byte
* hit_data
,
8975 bfd_signed_vma addend
,
8977 char **error_message
)
8979 unsigned long int tmp
;
8982 long int ret_offset
;
8983 struct elf_link_hash_entry
* myh
;
8984 struct elf32_arm_link_hash_table
* globals
;
8986 globals
= elf32_arm_hash_table (info
);
8987 BFD_ASSERT (globals
!= NULL
);
8988 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
8990 s
= bfd_get_linker_section (globals
->bfd_of_glue_owner
,
8991 ARM2THUMB_GLUE_SECTION_NAME
);
8992 BFD_ASSERT (s
!= NULL
);
8993 BFD_ASSERT (s
->contents
!= NULL
);
8994 BFD_ASSERT (s
->output_section
!= NULL
);
8996 myh
= elf32_arm_create_thumb_stub (info
, name
, input_bfd
, output_bfd
,
8997 sym_sec
, val
, s
, error_message
);
9001 my_offset
= myh
->root
.u
.def
.value
;
9002 tmp
= bfd_get_32 (input_bfd
, hit_data
);
9003 tmp
= tmp
& 0xFF000000;
9005 /* Somehow these are both 4 too far, so subtract 8. */
9006 ret_offset
= (s
->output_offset
9008 + s
->output_section
->vma
9009 - (input_section
->output_offset
9010 + input_section
->output_section
->vma
9014 tmp
= tmp
| ((ret_offset
>> 2) & 0x00FFFFFF);
9016 bfd_put_32 (output_bfd
, (bfd_vma
) tmp
, hit_data
- input_section
->vma
);
9021 /* Populate Arm stub for an exported Thumb function. */
9024 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry
*h
, void * inf
)
9026 struct bfd_link_info
* info
= (struct bfd_link_info
*) inf
;
9028 struct elf_link_hash_entry
* myh
;
9029 struct elf32_arm_link_hash_entry
*eh
;
9030 struct elf32_arm_link_hash_table
* globals
;
9033 char *error_message
;
9035 eh
= elf32_arm_hash_entry (h
);
9036 /* Allocate stubs for exported Thumb functions on v4t. */
9037 if (eh
->export_glue
== NULL
)
9040 globals
= elf32_arm_hash_table (info
);
9041 BFD_ASSERT (globals
!= NULL
);
9042 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
9044 s
= bfd_get_linker_section (globals
->bfd_of_glue_owner
,
9045 ARM2THUMB_GLUE_SECTION_NAME
);
9046 BFD_ASSERT (s
!= NULL
);
9047 BFD_ASSERT (s
->contents
!= NULL
);
9048 BFD_ASSERT (s
->output_section
!= NULL
);
9050 sec
= eh
->export_glue
->root
.u
.def
.section
;
9052 BFD_ASSERT (sec
->output_section
!= NULL
);
9054 val
= eh
->export_glue
->root
.u
.def
.value
+ sec
->output_offset
9055 + sec
->output_section
->vma
;
9057 myh
= elf32_arm_create_thumb_stub (info
, h
->root
.root
.string
,
9058 h
->root
.u
.def
.section
->owner
,
9059 globals
->obfd
, sec
, val
, s
,
9065 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
9068 elf32_arm_bx_glue (struct bfd_link_info
* info
, int reg
)
9073 struct elf32_arm_link_hash_table
*globals
;
9075 globals
= elf32_arm_hash_table (info
);
9076 BFD_ASSERT (globals
!= NULL
);
9077 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
9079 s
= bfd_get_linker_section (globals
->bfd_of_glue_owner
,
9080 ARM_BX_GLUE_SECTION_NAME
);
9081 BFD_ASSERT (s
!= NULL
);
9082 BFD_ASSERT (s
->contents
!= NULL
);
9083 BFD_ASSERT (s
->output_section
!= NULL
);
9085 BFD_ASSERT (globals
->bx_glue_offset
[reg
] & 2);
9087 glue_addr
= globals
->bx_glue_offset
[reg
] & ~(bfd_vma
)3;
9089 if ((globals
->bx_glue_offset
[reg
] & 1) == 0)
9091 p
= s
->contents
+ glue_addr
;
9092 bfd_put_32 (globals
->obfd
, armbx1_tst_insn
+ (reg
<< 16), p
);
9093 bfd_put_32 (globals
->obfd
, armbx2_moveq_insn
+ reg
, p
+ 4);
9094 bfd_put_32 (globals
->obfd
, armbx3_bx_insn
+ reg
, p
+ 8);
9095 globals
->bx_glue_offset
[reg
] |= 1;
9098 return glue_addr
+ s
->output_section
->vma
+ s
->output_offset
;
9101 /* Generate Arm stubs for exported Thumb symbols. */
9103 elf32_arm_begin_write_processing (bfd
*abfd ATTRIBUTE_UNUSED
,
9104 struct bfd_link_info
*link_info
)
9106 struct elf32_arm_link_hash_table
* globals
;
9108 if (link_info
== NULL
)
9109 /* Ignore this if we are not called by the ELF backend linker. */
9112 globals
= elf32_arm_hash_table (link_info
);
9113 if (globals
== NULL
)
9116 /* If blx is available then exported Thumb symbols are OK and there is
9118 if (globals
->use_blx
)
9121 elf_link_hash_traverse (&globals
->root
, elf32_arm_to_thumb_export_stub
,
9125 /* Reserve space for COUNT dynamic relocations in relocation selection
9129 elf32_arm_allocate_dynrelocs (struct bfd_link_info
*info
, asection
*sreloc
,
9130 bfd_size_type count
)
9132 struct elf32_arm_link_hash_table
*htab
;
9134 htab
= elf32_arm_hash_table (info
);
9135 BFD_ASSERT (htab
->root
.dynamic_sections_created
);
9138 sreloc
->size
+= RELOC_SIZE (htab
) * count
;
9141 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
9142 dynamic, the relocations should go in SRELOC, otherwise they should
9143 go in the special .rel.iplt section. */
9146 elf32_arm_allocate_irelocs (struct bfd_link_info
*info
, asection
*sreloc
,
9147 bfd_size_type count
)
9149 struct elf32_arm_link_hash_table
*htab
;
9151 htab
= elf32_arm_hash_table (info
);
9152 if (!htab
->root
.dynamic_sections_created
)
9153 htab
->root
.irelplt
->size
+= RELOC_SIZE (htab
) * count
;
9156 BFD_ASSERT (sreloc
!= NULL
);
9157 sreloc
->size
+= RELOC_SIZE (htab
) * count
;
9161 /* Add relocation REL to the end of relocation section SRELOC. */
9164 elf32_arm_add_dynreloc (bfd
*output_bfd
, struct bfd_link_info
*info
,
9165 asection
*sreloc
, Elf_Internal_Rela
*rel
)
9168 struct elf32_arm_link_hash_table
*htab
;
9170 htab
= elf32_arm_hash_table (info
);
9171 if (!htab
->root
.dynamic_sections_created
9172 && ELF32_R_TYPE (rel
->r_info
) == R_ARM_IRELATIVE
)
9173 sreloc
= htab
->root
.irelplt
;
9176 loc
= sreloc
->contents
;
9177 loc
+= sreloc
->reloc_count
++ * RELOC_SIZE (htab
);
9178 if (sreloc
->reloc_count
* RELOC_SIZE (htab
) > sreloc
->size
)
9180 SWAP_RELOC_OUT (htab
) (output_bfd
, rel
, loc
);
9183 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
9184 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
9188 elf32_arm_allocate_plt_entry (struct bfd_link_info
*info
,
9189 bfd_boolean is_iplt_entry
,
9190 union gotplt_union
*root_plt
,
9191 struct arm_plt_info
*arm_plt
)
9193 struct elf32_arm_link_hash_table
*htab
;
9197 htab
= elf32_arm_hash_table (info
);
9201 splt
= htab
->root
.iplt
;
9202 sgotplt
= htab
->root
.igotplt
;
9204 /* NaCl uses a special first entry in .iplt too. */
9205 if (htab
->nacl_p
&& splt
->size
== 0)
9206 splt
->size
+= htab
->plt_header_size
;
9208 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
9209 elf32_arm_allocate_irelocs (info
, htab
->root
.irelplt
, 1);
9213 splt
= htab
->root
.splt
;
9214 sgotplt
= htab
->root
.sgotplt
;
9216 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
9217 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelplt
, 1);
9219 /* If this is the first .plt entry, make room for the special
9221 if (splt
->size
== 0)
9222 splt
->size
+= htab
->plt_header_size
;
9224 htab
->next_tls_desc_index
++;
9227 /* Allocate the PLT entry itself, including any leading Thumb stub. */
9228 if (elf32_arm_plt_needs_thumb_stub_p (info
, arm_plt
))
9229 splt
->size
+= PLT_THUMB_STUB_SIZE
;
9230 root_plt
->offset
= splt
->size
;
9231 splt
->size
+= htab
->plt_entry_size
;
9233 if (!htab
->symbian_p
)
9235 /* We also need to make an entry in the .got.plt section, which
9236 will be placed in the .got section by the linker script. */
9238 arm_plt
->got_offset
= sgotplt
->size
;
9240 arm_plt
->got_offset
= sgotplt
->size
- 8 * htab
->num_tls_desc
;
9246 arm_movw_immediate (bfd_vma value
)
9248 return (value
& 0x00000fff) | ((value
& 0x0000f000) << 4);
9252 arm_movt_immediate (bfd_vma value
)
9254 return ((value
& 0x0fff0000) >> 16) | ((value
& 0xf0000000) >> 12);
9257 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
9258 the entry lives in .iplt and resolves to (*SYM_VALUE)().
9259 Otherwise, DYNINDX is the index of the symbol in the dynamic
9260 symbol table and SYM_VALUE is undefined.
9262 ROOT_PLT points to the offset of the PLT entry from the start of its
9263 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
9264 bookkeeping information.
9266 Returns FALSE if there was a problem. */
9269 elf32_arm_populate_plt_entry (bfd
*output_bfd
, struct bfd_link_info
*info
,
9270 union gotplt_union
*root_plt
,
9271 struct arm_plt_info
*arm_plt
,
9272 int dynindx
, bfd_vma sym_value
)
9274 struct elf32_arm_link_hash_table
*htab
;
9280 Elf_Internal_Rela rel
;
9281 bfd_vma plt_header_size
;
9282 bfd_vma got_header_size
;
9284 htab
= elf32_arm_hash_table (info
);
9286 /* Pick the appropriate sections and sizes. */
9289 splt
= htab
->root
.iplt
;
9290 sgot
= htab
->root
.igotplt
;
9291 srel
= htab
->root
.irelplt
;
9293 /* There are no reserved entries in .igot.plt, and no special
9294 first entry in .iplt. */
9295 got_header_size
= 0;
9296 plt_header_size
= 0;
9300 splt
= htab
->root
.splt
;
9301 sgot
= htab
->root
.sgotplt
;
9302 srel
= htab
->root
.srelplt
;
9304 got_header_size
= get_elf_backend_data (output_bfd
)->got_header_size
;
9305 plt_header_size
= htab
->plt_header_size
;
9307 BFD_ASSERT (splt
!= NULL
&& srel
!= NULL
);
9309 /* Fill in the entry in the procedure linkage table. */
9310 if (htab
->symbian_p
)
9312 BFD_ASSERT (dynindx
>= 0);
9313 put_arm_insn (htab
, output_bfd
,
9314 elf32_arm_symbian_plt_entry
[0],
9315 splt
->contents
+ root_plt
->offset
);
9316 bfd_put_32 (output_bfd
,
9317 elf32_arm_symbian_plt_entry
[1],
9318 splt
->contents
+ root_plt
->offset
+ 4);
9320 /* Fill in the entry in the .rel.plt section. */
9321 rel
.r_offset
= (splt
->output_section
->vma
9322 + splt
->output_offset
9323 + root_plt
->offset
+ 4);
9324 rel
.r_info
= ELF32_R_INFO (dynindx
, R_ARM_GLOB_DAT
);
9326 /* Get the index in the procedure linkage table which
9327 corresponds to this symbol. This is the index of this symbol
9328 in all the symbols for which we are making plt entries. The
9329 first entry in the procedure linkage table is reserved. */
9330 plt_index
= ((root_plt
->offset
- plt_header_size
)
9331 / htab
->plt_entry_size
);
9335 bfd_vma got_offset
, got_address
, plt_address
;
9336 bfd_vma got_displacement
, initial_got_entry
;
9339 BFD_ASSERT (sgot
!= NULL
);
9341 /* Get the offset into the .(i)got.plt table of the entry that
9342 corresponds to this function. */
9343 got_offset
= (arm_plt
->got_offset
& -2);
9345 /* Get the index in the procedure linkage table which
9346 corresponds to this symbol. This is the index of this symbol
9347 in all the symbols for which we are making plt entries.
9348 After the reserved .got.plt entries, all symbols appear in
9349 the same order as in .plt. */
9350 plt_index
= (got_offset
- got_header_size
) / 4;
9352 /* Calculate the address of the GOT entry. */
9353 got_address
= (sgot
->output_section
->vma
9354 + sgot
->output_offset
9357 /* ...and the address of the PLT entry. */
9358 plt_address
= (splt
->output_section
->vma
9359 + splt
->output_offset
9360 + root_plt
->offset
);
9362 ptr
= splt
->contents
+ root_plt
->offset
;
9363 if (htab
->vxworks_p
&& bfd_link_pic (info
))
9368 for (i
= 0; i
!= htab
->plt_entry_size
/ 4; i
++, ptr
+= 4)
9370 val
= elf32_arm_vxworks_shared_plt_entry
[i
];
9372 val
|= got_address
- sgot
->output_section
->vma
;
9374 val
|= plt_index
* RELOC_SIZE (htab
);
9375 if (i
== 2 || i
== 5)
9376 bfd_put_32 (output_bfd
, val
, ptr
);
9378 put_arm_insn (htab
, output_bfd
, val
, ptr
);
9381 else if (htab
->vxworks_p
)
9386 for (i
= 0; i
!= htab
->plt_entry_size
/ 4; i
++, ptr
+= 4)
9388 val
= elf32_arm_vxworks_exec_plt_entry
[i
];
9392 val
|= 0xffffff & -((root_plt
->offset
+ i
* 4 + 8) >> 2);
9394 val
|= plt_index
* RELOC_SIZE (htab
);
9395 if (i
== 2 || i
== 5)
9396 bfd_put_32 (output_bfd
, val
, ptr
);
9398 put_arm_insn (htab
, output_bfd
, val
, ptr
);
9401 loc
= (htab
->srelplt2
->contents
9402 + (plt_index
* 2 + 1) * RELOC_SIZE (htab
));
9404 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
9405 referencing the GOT for this PLT entry. */
9406 rel
.r_offset
= plt_address
+ 8;
9407 rel
.r_info
= ELF32_R_INFO (htab
->root
.hgot
->indx
, R_ARM_ABS32
);
9408 rel
.r_addend
= got_offset
;
9409 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, loc
);
9410 loc
+= RELOC_SIZE (htab
);
9412 /* Create the R_ARM_ABS32 relocation referencing the
9413 beginning of the PLT for this GOT entry. */
9414 rel
.r_offset
= got_address
;
9415 rel
.r_info
= ELF32_R_INFO (htab
->root
.hplt
->indx
, R_ARM_ABS32
);
9417 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, loc
);
9419 else if (htab
->nacl_p
)
9421 /* Calculate the displacement between the PLT slot and the
9422 common tail that's part of the special initial PLT slot. */
9423 int32_t tail_displacement
9424 = ((splt
->output_section
->vma
+ splt
->output_offset
9425 + ARM_NACL_PLT_TAIL_OFFSET
)
9426 - (plt_address
+ htab
->plt_entry_size
+ 4));
9427 BFD_ASSERT ((tail_displacement
& 3) == 0);
9428 tail_displacement
>>= 2;
9430 BFD_ASSERT ((tail_displacement
& 0xff000000) == 0
9431 || (-tail_displacement
& 0xff000000) == 0);
9433 /* Calculate the displacement between the PLT slot and the entry
9434 in the GOT. The offset accounts for the value produced by
9435 adding to pc in the penultimate instruction of the PLT stub. */
9436 got_displacement
= (got_address
9437 - (plt_address
+ htab
->plt_entry_size
));
9439 /* NaCl does not support interworking at all. */
9440 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info
, arm_plt
));
9442 put_arm_insn (htab
, output_bfd
,
9443 elf32_arm_nacl_plt_entry
[0]
9444 | arm_movw_immediate (got_displacement
),
9446 put_arm_insn (htab
, output_bfd
,
9447 elf32_arm_nacl_plt_entry
[1]
9448 | arm_movt_immediate (got_displacement
),
9450 put_arm_insn (htab
, output_bfd
,
9451 elf32_arm_nacl_plt_entry
[2],
9453 put_arm_insn (htab
, output_bfd
,
9454 elf32_arm_nacl_plt_entry
[3]
9455 | (tail_displacement
& 0x00ffffff),
9458 else if (using_thumb_only (htab
))
9460 /* PR ld/16017: Generate thumb only PLT entries. */
9461 if (!using_thumb2 (htab
))
9463 /* FIXME: We ought to be able to generate thumb-1 PLT
9465 _bfd_error_handler (_("%pB: warning: thumb-1 mode PLT generation not currently supported"),
9470 /* Calculate the displacement between the PLT slot and the entry in
9471 the GOT. The 12-byte offset accounts for the value produced by
9472 adding to pc in the 3rd instruction of the PLT stub. */
9473 got_displacement
= got_address
- (plt_address
+ 12);
9475 /* As we are using 32 bit instructions we have to use 'put_arm_insn'
9476 instead of 'put_thumb_insn'. */
9477 put_arm_insn (htab
, output_bfd
,
9478 elf32_thumb2_plt_entry
[0]
9479 | ((got_displacement
& 0x000000ff) << 16)
9480 | ((got_displacement
& 0x00000700) << 20)
9481 | ((got_displacement
& 0x00000800) >> 1)
9482 | ((got_displacement
& 0x0000f000) >> 12),
9484 put_arm_insn (htab
, output_bfd
,
9485 elf32_thumb2_plt_entry
[1]
9486 | ((got_displacement
& 0x00ff0000) )
9487 | ((got_displacement
& 0x07000000) << 4)
9488 | ((got_displacement
& 0x08000000) >> 17)
9489 | ((got_displacement
& 0xf0000000) >> 28),
9491 put_arm_insn (htab
, output_bfd
,
9492 elf32_thumb2_plt_entry
[2],
9494 put_arm_insn (htab
, output_bfd
,
9495 elf32_thumb2_plt_entry
[3],
9500 /* Calculate the displacement between the PLT slot and the
9501 entry in the GOT. The eight-byte offset accounts for the
9502 value produced by adding to pc in the first instruction
9504 got_displacement
= got_address
- (plt_address
+ 8);
9506 if (elf32_arm_plt_needs_thumb_stub_p (info
, arm_plt
))
9508 put_thumb_insn (htab
, output_bfd
,
9509 elf32_arm_plt_thumb_stub
[0], ptr
- 4);
9510 put_thumb_insn (htab
, output_bfd
,
9511 elf32_arm_plt_thumb_stub
[1], ptr
- 2);
9514 if (!elf32_arm_use_long_plt_entry
)
9516 BFD_ASSERT ((got_displacement
& 0xf0000000) == 0);
9518 put_arm_insn (htab
, output_bfd
,
9519 elf32_arm_plt_entry_short
[0]
9520 | ((got_displacement
& 0x0ff00000) >> 20),
9522 put_arm_insn (htab
, output_bfd
,
9523 elf32_arm_plt_entry_short
[1]
9524 | ((got_displacement
& 0x000ff000) >> 12),
9526 put_arm_insn (htab
, output_bfd
,
9527 elf32_arm_plt_entry_short
[2]
9528 | (got_displacement
& 0x00000fff),
9530 #ifdef FOUR_WORD_PLT
9531 bfd_put_32 (output_bfd
, elf32_arm_plt_entry_short
[3], ptr
+ 12);
9536 put_arm_insn (htab
, output_bfd
,
9537 elf32_arm_plt_entry_long
[0]
9538 | ((got_displacement
& 0xf0000000) >> 28),
9540 put_arm_insn (htab
, output_bfd
,
9541 elf32_arm_plt_entry_long
[1]
9542 | ((got_displacement
& 0x0ff00000) >> 20),
9544 put_arm_insn (htab
, output_bfd
,
9545 elf32_arm_plt_entry_long
[2]
9546 | ((got_displacement
& 0x000ff000) >> 12),
9548 put_arm_insn (htab
, output_bfd
,
9549 elf32_arm_plt_entry_long
[3]
9550 | (got_displacement
& 0x00000fff),
9555 /* Fill in the entry in the .rel(a).(i)plt section. */
9556 rel
.r_offset
= got_address
;
9560 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
9561 The dynamic linker or static executable then calls SYM_VALUE
9562 to determine the correct run-time value of the .igot.plt entry. */
9563 rel
.r_info
= ELF32_R_INFO (0, R_ARM_IRELATIVE
);
9564 initial_got_entry
= sym_value
;
9568 rel
.r_info
= ELF32_R_INFO (dynindx
, R_ARM_JUMP_SLOT
);
9569 initial_got_entry
= (splt
->output_section
->vma
9570 + splt
->output_offset
);
9573 /* Fill in the entry in the global offset table. */
9574 bfd_put_32 (output_bfd
, initial_got_entry
,
9575 sgot
->contents
+ got_offset
);
9579 elf32_arm_add_dynreloc (output_bfd
, info
, srel
, &rel
);
9582 loc
= srel
->contents
+ plt_index
* RELOC_SIZE (htab
);
9583 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, loc
);
9589 /* Some relocations map to different relocations depending on the
9590 target. Return the real relocation. */
9593 arm_real_reloc_type (struct elf32_arm_link_hash_table
* globals
,
9599 if (globals
->target1_is_rel
)
9605 return globals
->target2_reloc
;
9612 /* Return the base VMA address which should be subtracted from real addresses
9613 when resolving @dtpoff relocation.
9614 This is PT_TLS segment p_vaddr. */
9617 dtpoff_base (struct bfd_link_info
*info
)
9619 /* If tls_sec is NULL, we should have signalled an error already. */
9620 if (elf_hash_table (info
)->tls_sec
== NULL
)
9622 return elf_hash_table (info
)->tls_sec
->vma
;
9625 /* Return the relocation value for @tpoff relocation
9626 if STT_TLS virtual address is ADDRESS. */
9629 tpoff (struct bfd_link_info
*info
, bfd_vma address
)
9631 struct elf_link_hash_table
*htab
= elf_hash_table (info
);
9634 /* If tls_sec is NULL, we should have signalled an error already. */
9635 if (htab
->tls_sec
== NULL
)
9637 base
= align_power ((bfd_vma
) TCB_SIZE
, htab
->tls_sec
->alignment_power
);
9638 return address
- htab
->tls_sec
->vma
+ base
;
9641 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
9642 VALUE is the relocation value. */
9644 static bfd_reloc_status_type
9645 elf32_arm_abs12_reloc (bfd
*abfd
, void *data
, bfd_vma value
)
9648 return bfd_reloc_overflow
;
9650 value
|= bfd_get_32 (abfd
, data
) & 0xfffff000;
9651 bfd_put_32 (abfd
, value
, data
);
9652 return bfd_reloc_ok
;
9655 /* Handle TLS relaxations. Relaxing is possible for symbols that use
9656 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
9657 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
9659 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
9660 is to then call final_link_relocate. Return other values in the
9663 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
9664 the pre-relaxed code. It would be nice if the relocs were updated
9665 to match the optimization. */
9667 static bfd_reloc_status_type
9668 elf32_arm_tls_relax (struct elf32_arm_link_hash_table
*globals
,
9669 bfd
*input_bfd
, asection
*input_sec
, bfd_byte
*contents
,
9670 Elf_Internal_Rela
*rel
, unsigned long is_local
)
9674 switch (ELF32_R_TYPE (rel
->r_info
))
9677 return bfd_reloc_notsupported
;
9679 case R_ARM_TLS_GOTDESC
:
9684 insn
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
);
9686 insn
-= 5; /* THUMB */
9688 insn
-= 8; /* ARM */
9690 bfd_put_32 (input_bfd
, insn
, contents
+ rel
->r_offset
);
9691 return bfd_reloc_continue
;
9693 case R_ARM_THM_TLS_DESCSEQ
:
9695 insn
= bfd_get_16 (input_bfd
, contents
+ rel
->r_offset
);
9696 if ((insn
& 0xff78) == 0x4478) /* add rx, pc */
9700 bfd_put_16 (input_bfd
, 0x46c0, contents
+ rel
->r_offset
);
9702 else if ((insn
& 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
9706 bfd_put_16 (input_bfd
, 0x46c0, contents
+ rel
->r_offset
);
9709 bfd_put_16 (input_bfd
, insn
& 0xf83f, contents
+ rel
->r_offset
);
9711 else if ((insn
& 0xff87) == 0x4780) /* blx rx */
9715 bfd_put_16 (input_bfd
, 0x46c0, contents
+ rel
->r_offset
);
9718 bfd_put_16 (input_bfd
, 0x4600 | (insn
& 0x78),
9719 contents
+ rel
->r_offset
);
9723 if ((insn
& 0xf000) == 0xf000 || (insn
& 0xf800) == 0xe800)
9724 /* It's a 32 bit instruction, fetch the rest of it for
9725 error generation. */
9727 | bfd_get_16 (input_bfd
, contents
+ rel
->r_offset
+ 2);
9729 /* xgettext:c-format */
9730 (_("%pB(%pA+%#" PRIx64
"): "
9731 "unexpected %s instruction '%#lx' in TLS trampoline"),
9732 input_bfd
, input_sec
, (uint64_t) rel
->r_offset
,
9734 return bfd_reloc_notsupported
;
9738 case R_ARM_TLS_DESCSEQ
:
9740 insn
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
);
9741 if ((insn
& 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
9745 bfd_put_32 (input_bfd
, 0xe1a00000 | (insn
& 0xffff),
9746 contents
+ rel
->r_offset
);
9748 else if ((insn
& 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
9752 bfd_put_32 (input_bfd
, 0xe1a00000, contents
+ rel
->r_offset
);
9755 bfd_put_32 (input_bfd
, insn
& 0xfffff000,
9756 contents
+ rel
->r_offset
);
9758 else if ((insn
& 0xfffffff0) == 0xe12fff30) /* blx rx */
9762 bfd_put_32 (input_bfd
, 0xe1a00000, contents
+ rel
->r_offset
);
9765 bfd_put_32 (input_bfd
, 0xe1a00000 | (insn
& 0xf),
9766 contents
+ rel
->r_offset
);
9771 /* xgettext:c-format */
9772 (_("%pB(%pA+%#" PRIx64
"): "
9773 "unexpected %s instruction '%#lx' in TLS trampoline"),
9774 input_bfd
, input_sec
, (uint64_t) rel
->r_offset
,
9776 return bfd_reloc_notsupported
;
9780 case R_ARM_TLS_CALL
:
9781 /* GD->IE relaxation, turn the instruction into 'nop' or
9782 'ldr r0, [pc,r0]' */
9783 insn
= is_local
? 0xe1a00000 : 0xe79f0000;
9784 bfd_put_32 (input_bfd
, insn
, contents
+ rel
->r_offset
);
9787 case R_ARM_THM_TLS_CALL
:
9788 /* GD->IE relaxation. */
9790 /* add r0,pc; ldr r0, [r0] */
9792 else if (using_thumb2 (globals
))
9799 bfd_put_16 (input_bfd
, insn
>> 16, contents
+ rel
->r_offset
);
9800 bfd_put_16 (input_bfd
, insn
& 0xffff, contents
+ rel
->r_offset
+ 2);
9803 return bfd_reloc_ok
;
9806 /* For a given value of n, calculate the value of G_n as required to
9807 deal with group relocations. We return it in the form of an
9808 encoded constant-and-rotation, together with the final residual. If n is
9809 specified as less than zero, then final_residual is filled with the
9810 input value and no further action is performed. */
9813 calculate_group_reloc_mask (bfd_vma value
, int n
, bfd_vma
*final_residual
)
9817 bfd_vma encoded_g_n
= 0;
9818 bfd_vma residual
= value
; /* Also known as Y_n. */
9820 for (current_n
= 0; current_n
<= n
; current_n
++)
9824 /* Calculate which part of the value to mask. */
9831 /* Determine the most significant bit in the residual and
9832 align the resulting value to a 2-bit boundary. */
9833 for (msb
= 30; msb
>= 0; msb
-= 2)
9834 if (residual
& (3 << msb
))
9837 /* The desired shift is now (msb - 6), or zero, whichever
9844 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
9845 g_n
= residual
& (0xff << shift
);
9846 encoded_g_n
= (g_n
>> shift
)
9847 | ((g_n
<= 0xff ? 0 : (32 - shift
) / 2) << 8);
9849 /* Calculate the residual for the next time around. */
9853 *final_residual
= residual
;
9858 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
9859 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
9862 identify_add_or_sub (bfd_vma insn
)
9864 int opcode
= insn
& 0x1e00000;
9866 if (opcode
== 1 << 23) /* ADD */
9869 if (opcode
== 1 << 22) /* SUB */
9875 /* Perform a relocation as part of a final link. */
9877 static bfd_reloc_status_type
9878 elf32_arm_final_link_relocate (reloc_howto_type
* howto
,
9881 asection
* input_section
,
9882 bfd_byte
* contents
,
9883 Elf_Internal_Rela
* rel
,
9885 struct bfd_link_info
* info
,
9887 const char * sym_name
,
9888 unsigned char st_type
,
9889 enum arm_st_branch_type branch_type
,
9890 struct elf_link_hash_entry
* h
,
9891 bfd_boolean
* unresolved_reloc_p
,
9892 char ** error_message
)
9894 unsigned long r_type
= howto
->type
;
9895 unsigned long r_symndx
;
9896 bfd_byte
* hit_data
= contents
+ rel
->r_offset
;
9897 bfd_vma
* local_got_offsets
;
9898 bfd_vma
* local_tlsdesc_gotents
;
9901 asection
* sreloc
= NULL
;
9904 bfd_signed_vma signed_addend
;
9905 unsigned char dynreloc_st_type
;
9906 bfd_vma dynreloc_value
;
9907 struct elf32_arm_link_hash_table
* globals
;
9908 struct elf32_arm_link_hash_entry
*eh
;
9909 union gotplt_union
*root_plt
;
9910 struct arm_plt_info
*arm_plt
;
9912 bfd_vma gotplt_offset
;
9913 bfd_boolean has_iplt_entry
;
9914 bfd_boolean resolved_to_zero
;
9916 globals
= elf32_arm_hash_table (info
);
9917 if (globals
== NULL
)
9918 return bfd_reloc_notsupported
;
9920 BFD_ASSERT (is_arm_elf (input_bfd
));
9921 BFD_ASSERT (howto
!= NULL
);
9923 /* Some relocation types map to different relocations depending on the
9924 target. We pick the right one here. */
9925 r_type
= arm_real_reloc_type (globals
, r_type
);
9927 /* It is possible to have linker relaxations on some TLS access
9928 models. Update our information here. */
9929 r_type
= elf32_arm_tls_transition (info
, r_type
, h
);
9931 if (r_type
!= howto
->type
)
9932 howto
= elf32_arm_howto_from_type (r_type
);
9934 eh
= (struct elf32_arm_link_hash_entry
*) h
;
9935 sgot
= globals
->root
.sgot
;
9936 local_got_offsets
= elf_local_got_offsets (input_bfd
);
9937 local_tlsdesc_gotents
= elf32_arm_local_tlsdesc_gotent (input_bfd
);
9939 if (globals
->root
.dynamic_sections_created
)
9940 srelgot
= globals
->root
.srelgot
;
9944 r_symndx
= ELF32_R_SYM (rel
->r_info
);
9946 if (globals
->use_rel
)
9948 addend
= bfd_get_32 (input_bfd
, hit_data
) & howto
->src_mask
;
9950 if (addend
& ((howto
->src_mask
+ 1) >> 1))
9953 signed_addend
&= ~ howto
->src_mask
;
9954 signed_addend
|= addend
;
9957 signed_addend
= addend
;
9960 addend
= signed_addend
= rel
->r_addend
;
9962 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
9963 are resolving a function call relocation. */
9964 if (using_thumb_only (globals
)
9965 && (r_type
== R_ARM_THM_CALL
9966 || r_type
== R_ARM_THM_JUMP24
)
9967 && branch_type
== ST_BRANCH_TO_ARM
)
9968 branch_type
= ST_BRANCH_TO_THUMB
;
9970 /* Record the symbol information that should be used in dynamic
9972 dynreloc_st_type
= st_type
;
9973 dynreloc_value
= value
;
9974 if (branch_type
== ST_BRANCH_TO_THUMB
)
9975 dynreloc_value
|= 1;
9977 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
9978 VALUE appropriately for relocations that we resolve at link time. */
9979 has_iplt_entry
= FALSE
;
9980 if (elf32_arm_get_plt_info (input_bfd
, globals
, eh
, r_symndx
, &root_plt
,
9982 && root_plt
->offset
!= (bfd_vma
) -1)
9984 plt_offset
= root_plt
->offset
;
9985 gotplt_offset
= arm_plt
->got_offset
;
9987 if (h
== NULL
|| eh
->is_iplt
)
9989 has_iplt_entry
= TRUE
;
9990 splt
= globals
->root
.iplt
;
9992 /* Populate .iplt entries here, because not all of them will
9993 be seen by finish_dynamic_symbol. The lower bit is set if
9994 we have already populated the entry. */
9999 if (elf32_arm_populate_plt_entry (output_bfd
, info
, root_plt
, arm_plt
,
10000 -1, dynreloc_value
))
10001 root_plt
->offset
|= 1;
10003 return bfd_reloc_notsupported
;
10006 /* Static relocations always resolve to the .iplt entry. */
10007 st_type
= STT_FUNC
;
10008 value
= (splt
->output_section
->vma
10009 + splt
->output_offset
10011 branch_type
= ST_BRANCH_TO_ARM
;
10013 /* If there are non-call relocations that resolve to the .iplt
10014 entry, then all dynamic ones must too. */
10015 if (arm_plt
->noncall_refcount
!= 0)
10017 dynreloc_st_type
= st_type
;
10018 dynreloc_value
= value
;
10022 /* We populate the .plt entry in finish_dynamic_symbol. */
10023 splt
= globals
->root
.splt
;
10028 plt_offset
= (bfd_vma
) -1;
10029 gotplt_offset
= (bfd_vma
) -1;
10032 resolved_to_zero
= (h
!= NULL
10033 && UNDEFWEAK_NO_DYNAMIC_RELOC (info
, h
));
10038 /* We don't need to find a value for this symbol. It's just a
10040 *unresolved_reloc_p
= FALSE
;
10041 return bfd_reloc_ok
;
10044 if (!globals
->vxworks_p
)
10045 return elf32_arm_abs12_reloc (input_bfd
, hit_data
, value
+ addend
);
10046 /* Fall through. */
10050 case R_ARM_ABS32_NOI
:
10052 case R_ARM_REL32_NOI
:
10058 /* Handle relocations which should use the PLT entry. ABS32/REL32
10059 will use the symbol's value, which may point to a PLT entry, but we
10060 don't need to handle that here. If we created a PLT entry, all
10061 branches in this object should go to it, except if the PLT is too
10062 far away, in which case a long branch stub should be inserted. */
10063 if ((r_type
!= R_ARM_ABS32
&& r_type
!= R_ARM_REL32
10064 && r_type
!= R_ARM_ABS32_NOI
&& r_type
!= R_ARM_REL32_NOI
10065 && r_type
!= R_ARM_CALL
10066 && r_type
!= R_ARM_JUMP24
10067 && r_type
!= R_ARM_PLT32
)
10068 && plt_offset
!= (bfd_vma
) -1)
10070 /* If we've created a .plt section, and assigned a PLT entry
10071 to this function, it must either be a STT_GNU_IFUNC reference
10072 or not be known to bind locally. In other cases, we should
10073 have cleared the PLT entry by now. */
10074 BFD_ASSERT (has_iplt_entry
|| !SYMBOL_CALLS_LOCAL (info
, h
));
10076 value
= (splt
->output_section
->vma
10077 + splt
->output_offset
10079 *unresolved_reloc_p
= FALSE
;
10080 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
10081 contents
, rel
->r_offset
, value
,
10085 /* When generating a shared object or relocatable executable, these
10086 relocations are copied into the output file to be resolved at
10088 if ((bfd_link_pic (info
)
10089 || globals
->root
.is_relocatable_executable
)
10090 && (input_section
->flags
& SEC_ALLOC
)
10091 && !(globals
->vxworks_p
10092 && strcmp (input_section
->output_section
->name
,
10094 && ((r_type
!= R_ARM_REL32
&& r_type
!= R_ARM_REL32_NOI
)
10095 || !SYMBOL_CALLS_LOCAL (info
, h
))
10096 && !(input_bfd
== globals
->stub_bfd
10097 && strstr (input_section
->name
, STUB_SUFFIX
))
10099 || (ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
10100 && !resolved_to_zero
)
10101 || h
->root
.type
!= bfd_link_hash_undefweak
)
10102 && r_type
!= R_ARM_PC24
10103 && r_type
!= R_ARM_CALL
10104 && r_type
!= R_ARM_JUMP24
10105 && r_type
!= R_ARM_PREL31
10106 && r_type
!= R_ARM_PLT32
)
10108 Elf_Internal_Rela outrel
;
10109 bfd_boolean skip
, relocate
;
10111 if ((r_type
== R_ARM_REL32
|| r_type
== R_ARM_REL32_NOI
)
10112 && !h
->def_regular
)
10114 char *v
= _("shared object");
10116 if (bfd_link_executable (info
))
10117 v
= _("PIE executable");
10120 (_("%pB: relocation %s against external or undefined symbol `%s'"
10121 " can not be used when making a %s; recompile with -fPIC"), input_bfd
,
10122 elf32_arm_howto_table_1
[r_type
].name
, h
->root
.root
.string
, v
);
10123 return bfd_reloc_notsupported
;
10126 *unresolved_reloc_p
= FALSE
;
10128 if (sreloc
== NULL
&& globals
->root
.dynamic_sections_created
)
10130 sreloc
= _bfd_elf_get_dynamic_reloc_section (input_bfd
, input_section
,
10131 ! globals
->use_rel
);
10133 if (sreloc
== NULL
)
10134 return bfd_reloc_notsupported
;
10140 outrel
.r_addend
= addend
;
10142 _bfd_elf_section_offset (output_bfd
, info
, input_section
,
10144 if (outrel
.r_offset
== (bfd_vma
) -1)
10146 else if (outrel
.r_offset
== (bfd_vma
) -2)
10147 skip
= TRUE
, relocate
= TRUE
;
10148 outrel
.r_offset
+= (input_section
->output_section
->vma
10149 + input_section
->output_offset
);
10152 memset (&outrel
, 0, sizeof outrel
);
10154 && h
->dynindx
!= -1
10155 && (!bfd_link_pic (info
)
10156 || !(bfd_link_pie (info
)
10157 || SYMBOLIC_BIND (info
, h
))
10158 || !h
->def_regular
))
10159 outrel
.r_info
= ELF32_R_INFO (h
->dynindx
, r_type
);
10164 /* This symbol is local, or marked to become local. */
10165 BFD_ASSERT (r_type
== R_ARM_ABS32
|| r_type
== R_ARM_ABS32_NOI
);
10166 if (globals
->symbian_p
)
10170 /* On Symbian OS, the data segment and text segement
10171 can be relocated independently. Therefore, we
10172 must indicate the segment to which this
10173 relocation is relative. The BPABI allows us to
10174 use any symbol in the right segment; we just use
10175 the section symbol as it is convenient. (We
10176 cannot use the symbol given by "h" directly as it
10177 will not appear in the dynamic symbol table.)
10179 Note that the dynamic linker ignores the section
10180 symbol value, so we don't subtract osec->vma
10181 from the emitted reloc addend. */
10183 osec
= sym_sec
->output_section
;
10185 osec
= input_section
->output_section
;
10186 symbol
= elf_section_data (osec
)->dynindx
;
10189 struct elf_link_hash_table
*htab
= elf_hash_table (info
);
10191 if ((osec
->flags
& SEC_READONLY
) == 0
10192 && htab
->data_index_section
!= NULL
)
10193 osec
= htab
->data_index_section
;
10195 osec
= htab
->text_index_section
;
10196 symbol
= elf_section_data (osec
)->dynindx
;
10198 BFD_ASSERT (symbol
!= 0);
10201 /* On SVR4-ish systems, the dynamic loader cannot
10202 relocate the text and data segments independently,
10203 so the symbol does not matter. */
10205 if (dynreloc_st_type
== STT_GNU_IFUNC
)
10206 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
10207 to the .iplt entry. Instead, every non-call reference
10208 must use an R_ARM_IRELATIVE relocation to obtain the
10209 correct run-time address. */
10210 outrel
.r_info
= ELF32_R_INFO (symbol
, R_ARM_IRELATIVE
);
10212 outrel
.r_info
= ELF32_R_INFO (symbol
, R_ARM_RELATIVE
);
10213 if (globals
->use_rel
)
10216 outrel
.r_addend
+= dynreloc_value
;
10219 elf32_arm_add_dynreloc (output_bfd
, info
, sreloc
, &outrel
);
10221 /* If this reloc is against an external symbol, we do not want to
10222 fiddle with the addend. Otherwise, we need to include the symbol
10223 value so that it becomes an addend for the dynamic reloc. */
10225 return bfd_reloc_ok
;
10227 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
10228 contents
, rel
->r_offset
,
10229 dynreloc_value
, (bfd_vma
) 0);
10231 else switch (r_type
)
10234 return elf32_arm_abs12_reloc (input_bfd
, hit_data
, value
+ addend
);
10236 case R_ARM_XPC25
: /* Arm BLX instruction. */
10239 case R_ARM_PC24
: /* Arm B/BL instruction. */
10242 struct elf32_arm_stub_hash_entry
*stub_entry
= NULL
;
10244 if (r_type
== R_ARM_XPC25
)
10246 /* Check for Arm calling Arm function. */
10247 /* FIXME: Should we translate the instruction into a BL
10248 instruction instead ? */
10249 if (branch_type
!= ST_BRANCH_TO_THUMB
)
10251 (_("\%pB: warning: %s BLX instruction targets"
10252 " %s function '%s'"),
10254 "ARM", h
? h
->root
.root
.string
: "(local)");
10256 else if (r_type
== R_ARM_PC24
)
10258 /* Check for Arm calling Thumb function. */
10259 if (branch_type
== ST_BRANCH_TO_THUMB
)
10261 if (elf32_arm_to_thumb_stub (info
, sym_name
, input_bfd
,
10262 output_bfd
, input_section
,
10263 hit_data
, sym_sec
, rel
->r_offset
,
10264 signed_addend
, value
,
10266 return bfd_reloc_ok
;
10268 return bfd_reloc_dangerous
;
10272 /* Check if a stub has to be inserted because the
10273 destination is too far or we are changing mode. */
10274 if ( r_type
== R_ARM_CALL
10275 || r_type
== R_ARM_JUMP24
10276 || r_type
== R_ARM_PLT32
)
10278 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
10279 struct elf32_arm_link_hash_entry
*hash
;
10281 hash
= (struct elf32_arm_link_hash_entry
*) h
;
10282 stub_type
= arm_type_of_stub (info
, input_section
, rel
,
10283 st_type
, &branch_type
,
10284 hash
, value
, sym_sec
,
10285 input_bfd
, sym_name
);
10287 if (stub_type
!= arm_stub_none
)
10289 /* The target is out of reach, so redirect the
10290 branch to the local stub for this function. */
10291 stub_entry
= elf32_arm_get_stub_entry (input_section
,
10296 if (stub_entry
!= NULL
)
10297 value
= (stub_entry
->stub_offset
10298 + stub_entry
->stub_sec
->output_offset
10299 + stub_entry
->stub_sec
->output_section
->vma
);
10301 if (plt_offset
!= (bfd_vma
) -1)
10302 *unresolved_reloc_p
= FALSE
;
10307 /* If the call goes through a PLT entry, make sure to
10308 check distance to the right destination address. */
10309 if (plt_offset
!= (bfd_vma
) -1)
10311 value
= (splt
->output_section
->vma
10312 + splt
->output_offset
10314 *unresolved_reloc_p
= FALSE
;
10315 /* The PLT entry is in ARM mode, regardless of the
10316 target function. */
10317 branch_type
= ST_BRANCH_TO_ARM
;
10322 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
10324 S is the address of the symbol in the relocation.
10325 P is address of the instruction being relocated.
10326 A is the addend (extracted from the instruction) in bytes.
10328 S is held in 'value'.
10329 P is the base address of the section containing the
10330 instruction plus the offset of the reloc into that
10332 (input_section->output_section->vma +
10333 input_section->output_offset +
10335 A is the addend, converted into bytes, ie:
10336 (signed_addend * 4)
10338 Note: None of these operations have knowledge of the pipeline
10339 size of the processor, thus it is up to the assembler to
10340 encode this information into the addend. */
10341 value
-= (input_section
->output_section
->vma
10342 + input_section
->output_offset
);
10343 value
-= rel
->r_offset
;
10344 if (globals
->use_rel
)
10345 value
+= (signed_addend
<< howto
->size
);
10347 /* RELA addends do not have to be adjusted by howto->size. */
10348 value
+= signed_addend
;
10350 signed_addend
= value
;
10351 signed_addend
>>= howto
->rightshift
;
10353 /* A branch to an undefined weak symbol is turned into a jump to
10354 the next instruction unless a PLT entry will be created.
10355 Do the same for local undefined symbols (but not for STN_UNDEF).
10356 The jump to the next instruction is optimized as a NOP depending
10357 on the architecture. */
10358 if (h
? (h
->root
.type
== bfd_link_hash_undefweak
10359 && plt_offset
== (bfd_vma
) -1)
10360 : r_symndx
!= STN_UNDEF
&& bfd_is_und_section (sym_sec
))
10362 value
= (bfd_get_32 (input_bfd
, hit_data
) & 0xf0000000);
10364 if (arch_has_arm_nop (globals
))
10365 value
|= 0x0320f000;
10367 value
|= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
10371 /* Perform a signed range check. */
10372 if ( signed_addend
> ((bfd_signed_vma
) (howto
->dst_mask
>> 1))
10373 || signed_addend
< - ((bfd_signed_vma
) ((howto
->dst_mask
+ 1) >> 1)))
10374 return bfd_reloc_overflow
;
10376 addend
= (value
& 2);
10378 value
= (signed_addend
& howto
->dst_mask
)
10379 | (bfd_get_32 (input_bfd
, hit_data
) & (~ howto
->dst_mask
));
10381 if (r_type
== R_ARM_CALL
)
10383 /* Set the H bit in the BLX instruction. */
10384 if (branch_type
== ST_BRANCH_TO_THUMB
)
10387 value
|= (1 << 24);
10389 value
&= ~(bfd_vma
)(1 << 24);
10392 /* Select the correct instruction (BL or BLX). */
10393 /* Only if we are not handling a BL to a stub. In this
10394 case, mode switching is performed by the stub. */
10395 if (branch_type
== ST_BRANCH_TO_THUMB
&& !stub_entry
)
10396 value
|= (1 << 28);
10397 else if (stub_entry
|| branch_type
!= ST_BRANCH_UNKNOWN
)
10399 value
&= ~(bfd_vma
)(1 << 28);
10400 value
|= (1 << 24);
10409 if (branch_type
== ST_BRANCH_TO_THUMB
)
10413 case R_ARM_ABS32_NOI
:
10419 if (branch_type
== ST_BRANCH_TO_THUMB
)
10421 value
-= (input_section
->output_section
->vma
10422 + input_section
->output_offset
+ rel
->r_offset
);
10425 case R_ARM_REL32_NOI
:
10427 value
-= (input_section
->output_section
->vma
10428 + input_section
->output_offset
+ rel
->r_offset
);
10432 value
-= (input_section
->output_section
->vma
10433 + input_section
->output_offset
+ rel
->r_offset
);
10434 value
+= signed_addend
;
10435 if (! h
|| h
->root
.type
!= bfd_link_hash_undefweak
)
10437 /* Check for overflow. */
10438 if ((value
^ (value
>> 1)) & (1 << 30))
10439 return bfd_reloc_overflow
;
10441 value
&= 0x7fffffff;
10442 value
|= (bfd_get_32 (input_bfd
, hit_data
) & 0x80000000);
10443 if (branch_type
== ST_BRANCH_TO_THUMB
)
10448 bfd_put_32 (input_bfd
, value
, hit_data
);
10449 return bfd_reloc_ok
;
10452 /* PR 16202: Refectch the addend using the correct size. */
10453 if (globals
->use_rel
)
10454 addend
= bfd_get_8 (input_bfd
, hit_data
);
10457 /* There is no way to tell whether the user intended to use a signed or
10458 unsigned addend. When checking for overflow we accept either,
10459 as specified by the AAELF. */
10460 if ((long) value
> 0xff || (long) value
< -0x80)
10461 return bfd_reloc_overflow
;
10463 bfd_put_8 (input_bfd
, value
, hit_data
);
10464 return bfd_reloc_ok
;
10467 /* PR 16202: Refectch the addend using the correct size. */
10468 if (globals
->use_rel
)
10469 addend
= bfd_get_16 (input_bfd
, hit_data
);
10472 /* See comment for R_ARM_ABS8. */
10473 if ((long) value
> 0xffff || (long) value
< -0x8000)
10474 return bfd_reloc_overflow
;
10476 bfd_put_16 (input_bfd
, value
, hit_data
);
10477 return bfd_reloc_ok
;
10479 case R_ARM_THM_ABS5
:
10480 /* Support ldr and str instructions for the thumb. */
10481 if (globals
->use_rel
)
10483 /* Need to refetch addend. */
10484 addend
= bfd_get_16 (input_bfd
, hit_data
) & howto
->src_mask
;
10485 /* ??? Need to determine shift amount from operand size. */
10486 addend
>>= howto
->rightshift
;
10490 /* ??? Isn't value unsigned? */
10491 if ((long) value
> 0x1f || (long) value
< -0x10)
10492 return bfd_reloc_overflow
;
10494 /* ??? Value needs to be properly shifted into place first. */
10495 value
|= bfd_get_16 (input_bfd
, hit_data
) & 0xf83f;
10496 bfd_put_16 (input_bfd
, value
, hit_data
);
10497 return bfd_reloc_ok
;
10499 case R_ARM_THM_ALU_PREL_11_0
:
10500 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
10503 bfd_signed_vma relocation
;
10505 insn
= (bfd_get_16 (input_bfd
, hit_data
) << 16)
10506 | bfd_get_16 (input_bfd
, hit_data
+ 2);
10508 if (globals
->use_rel
)
10510 signed_addend
= (insn
& 0xff) | ((insn
& 0x7000) >> 4)
10511 | ((insn
& (1 << 26)) >> 15);
10512 if (insn
& 0xf00000)
10513 signed_addend
= -signed_addend
;
10516 relocation
= value
+ signed_addend
;
10517 relocation
-= Pa (input_section
->output_section
->vma
10518 + input_section
->output_offset
10521 /* PR 21523: Use an absolute value. The user of this reloc will
10522 have already selected an ADD or SUB insn appropriately. */
10523 value
= labs (relocation
);
10525 if (value
>= 0x1000)
10526 return bfd_reloc_overflow
;
10528 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
10529 if (branch_type
== ST_BRANCH_TO_THUMB
)
10532 insn
= (insn
& 0xfb0f8f00) | (value
& 0xff)
10533 | ((value
& 0x700) << 4)
10534 | ((value
& 0x800) << 15);
10535 if (relocation
< 0)
10538 bfd_put_16 (input_bfd
, insn
>> 16, hit_data
);
10539 bfd_put_16 (input_bfd
, insn
& 0xffff, hit_data
+ 2);
10541 return bfd_reloc_ok
;
10544 case R_ARM_THM_PC8
:
10545 /* PR 10073: This reloc is not generated by the GNU toolchain,
10546 but it is supported for compatibility with third party libraries
10547 generated by other compilers, specifically the ARM/IAR. */
10550 bfd_signed_vma relocation
;
10552 insn
= bfd_get_16 (input_bfd
, hit_data
);
10554 if (globals
->use_rel
)
10555 addend
= ((((insn
& 0x00ff) << 2) + 4) & 0x3ff) -4;
10557 relocation
= value
+ addend
;
10558 relocation
-= Pa (input_section
->output_section
->vma
10559 + input_section
->output_offset
10562 value
= relocation
;
10564 /* We do not check for overflow of this reloc. Although strictly
10565 speaking this is incorrect, it appears to be necessary in order
10566 to work with IAR generated relocs. Since GCC and GAS do not
10567 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
10568 a problem for them. */
10571 insn
= (insn
& 0xff00) | (value
>> 2);
10573 bfd_put_16 (input_bfd
, insn
, hit_data
);
10575 return bfd_reloc_ok
;
10578 case R_ARM_THM_PC12
:
10579 /* Corresponds to: ldr.w reg, [pc, #offset]. */
10582 bfd_signed_vma relocation
;
10584 insn
= (bfd_get_16 (input_bfd
, hit_data
) << 16)
10585 | bfd_get_16 (input_bfd
, hit_data
+ 2);
10587 if (globals
->use_rel
)
10589 signed_addend
= insn
& 0xfff;
10590 if (!(insn
& (1 << 23)))
10591 signed_addend
= -signed_addend
;
10594 relocation
= value
+ signed_addend
;
10595 relocation
-= Pa (input_section
->output_section
->vma
10596 + input_section
->output_offset
10599 value
= relocation
;
10601 if (value
>= 0x1000)
10602 return bfd_reloc_overflow
;
10604 insn
= (insn
& 0xff7ff000) | value
;
10605 if (relocation
>= 0)
10608 bfd_put_16 (input_bfd
, insn
>> 16, hit_data
);
10609 bfd_put_16 (input_bfd
, insn
& 0xffff, hit_data
+ 2);
10611 return bfd_reloc_ok
;
10614 case R_ARM_THM_XPC22
:
10615 case R_ARM_THM_CALL
:
10616 case R_ARM_THM_JUMP24
:
10617 /* Thumb BL (branch long instruction). */
10619 bfd_vma relocation
;
10620 bfd_vma reloc_sign
;
10621 bfd_boolean overflow
= FALSE
;
10622 bfd_vma upper_insn
= bfd_get_16 (input_bfd
, hit_data
);
10623 bfd_vma lower_insn
= bfd_get_16 (input_bfd
, hit_data
+ 2);
10624 bfd_signed_vma reloc_signed_max
;
10625 bfd_signed_vma reloc_signed_min
;
10627 bfd_signed_vma signed_check
;
10629 const int thumb2
= using_thumb2 (globals
);
10630 const int thumb2_bl
= using_thumb2_bl (globals
);
10632 /* A branch to an undefined weak symbol is turned into a jump to
10633 the next instruction unless a PLT entry will be created.
10634 The jump to the next instruction is optimized as a NOP.W for
10635 Thumb-2 enabled architectures. */
10636 if (h
&& h
->root
.type
== bfd_link_hash_undefweak
10637 && plt_offset
== (bfd_vma
) -1)
10641 bfd_put_16 (input_bfd
, 0xf3af, hit_data
);
10642 bfd_put_16 (input_bfd
, 0x8000, hit_data
+ 2);
10646 bfd_put_16 (input_bfd
, 0xe000, hit_data
);
10647 bfd_put_16 (input_bfd
, 0xbf00, hit_data
+ 2);
10649 return bfd_reloc_ok
;
10652 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
10653 with Thumb-1) involving the J1 and J2 bits. */
10654 if (globals
->use_rel
)
10656 bfd_vma s
= (upper_insn
& (1 << 10)) >> 10;
10657 bfd_vma upper
= upper_insn
& 0x3ff;
10658 bfd_vma lower
= lower_insn
& 0x7ff;
10659 bfd_vma j1
= (lower_insn
& (1 << 13)) >> 13;
10660 bfd_vma j2
= (lower_insn
& (1 << 11)) >> 11;
10661 bfd_vma i1
= j1
^ s
? 0 : 1;
10662 bfd_vma i2
= j2
^ s
? 0 : 1;
10664 addend
= (i1
<< 23) | (i2
<< 22) | (upper
<< 12) | (lower
<< 1);
10666 addend
= (addend
| ((s
? 0 : 1) << 24)) - (1 << 24);
10668 signed_addend
= addend
;
10671 if (r_type
== R_ARM_THM_XPC22
)
10673 /* Check for Thumb to Thumb call. */
10674 /* FIXME: Should we translate the instruction into a BL
10675 instruction instead ? */
10676 if (branch_type
== ST_BRANCH_TO_THUMB
)
10678 (_("%pB: warning: %s BLX instruction targets"
10679 " %s function '%s'"),
10680 input_bfd
, "Thumb",
10681 "Thumb", h
? h
->root
.root
.string
: "(local)");
10685 /* If it is not a call to Thumb, assume call to Arm.
10686 If it is a call relative to a section name, then it is not a
10687 function call at all, but rather a long jump. Calls through
10688 the PLT do not require stubs. */
10689 if (branch_type
== ST_BRANCH_TO_ARM
&& plt_offset
== (bfd_vma
) -1)
10691 if (globals
->use_blx
&& r_type
== R_ARM_THM_CALL
)
10693 /* Convert BL to BLX. */
10694 lower_insn
= (lower_insn
& ~0x1000) | 0x0800;
10696 else if (( r_type
!= R_ARM_THM_CALL
)
10697 && (r_type
!= R_ARM_THM_JUMP24
))
10699 if (elf32_thumb_to_arm_stub
10700 (info
, sym_name
, input_bfd
, output_bfd
, input_section
,
10701 hit_data
, sym_sec
, rel
->r_offset
, signed_addend
, value
,
10703 return bfd_reloc_ok
;
10705 return bfd_reloc_dangerous
;
10708 else if (branch_type
== ST_BRANCH_TO_THUMB
10709 && globals
->use_blx
10710 && r_type
== R_ARM_THM_CALL
)
10712 /* Make sure this is a BL. */
10713 lower_insn
|= 0x1800;
10717 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
10718 if (r_type
== R_ARM_THM_CALL
|| r_type
== R_ARM_THM_JUMP24
)
10720 /* Check if a stub has to be inserted because the destination
10722 struct elf32_arm_stub_hash_entry
*stub_entry
;
10723 struct elf32_arm_link_hash_entry
*hash
;
10725 hash
= (struct elf32_arm_link_hash_entry
*) h
;
10727 stub_type
= arm_type_of_stub (info
, input_section
, rel
,
10728 st_type
, &branch_type
,
10729 hash
, value
, sym_sec
,
10730 input_bfd
, sym_name
);
10732 if (stub_type
!= arm_stub_none
)
10734 /* The target is out of reach or we are changing modes, so
10735 redirect the branch to the local stub for this
10737 stub_entry
= elf32_arm_get_stub_entry (input_section
,
10741 if (stub_entry
!= NULL
)
10743 value
= (stub_entry
->stub_offset
10744 + stub_entry
->stub_sec
->output_offset
10745 + stub_entry
->stub_sec
->output_section
->vma
);
10747 if (plt_offset
!= (bfd_vma
) -1)
10748 *unresolved_reloc_p
= FALSE
;
10751 /* If this call becomes a call to Arm, force BLX. */
10752 if (globals
->use_blx
&& (r_type
== R_ARM_THM_CALL
))
10755 && !arm_stub_is_thumb (stub_entry
->stub_type
))
10756 || branch_type
!= ST_BRANCH_TO_THUMB
)
10757 lower_insn
= (lower_insn
& ~0x1000) | 0x0800;
10762 /* Handle calls via the PLT. */
10763 if (stub_type
== arm_stub_none
&& plt_offset
!= (bfd_vma
) -1)
10765 value
= (splt
->output_section
->vma
10766 + splt
->output_offset
10769 if (globals
->use_blx
10770 && r_type
== R_ARM_THM_CALL
10771 && ! using_thumb_only (globals
))
10773 /* If the Thumb BLX instruction is available, convert
10774 the BL to a BLX instruction to call the ARM-mode
10776 lower_insn
= (lower_insn
& ~0x1000) | 0x0800;
10777 branch_type
= ST_BRANCH_TO_ARM
;
10781 if (! using_thumb_only (globals
))
10782 /* Target the Thumb stub before the ARM PLT entry. */
10783 value
-= PLT_THUMB_STUB_SIZE
;
10784 branch_type
= ST_BRANCH_TO_THUMB
;
10786 *unresolved_reloc_p
= FALSE
;
10789 relocation
= value
+ signed_addend
;
10791 relocation
-= (input_section
->output_section
->vma
10792 + input_section
->output_offset
10795 check
= relocation
>> howto
->rightshift
;
10797 /* If this is a signed value, the rightshift just dropped
10798 leading 1 bits (assuming twos complement). */
10799 if ((bfd_signed_vma
) relocation
>= 0)
10800 signed_check
= check
;
10802 signed_check
= check
| ~((bfd_vma
) -1 >> howto
->rightshift
);
10804 /* Calculate the permissable maximum and minimum values for
10805 this relocation according to whether we're relocating for
10807 bitsize
= howto
->bitsize
;
10810 reloc_signed_max
= (1 << (bitsize
- 1)) - 1;
10811 reloc_signed_min
= ~reloc_signed_max
;
10813 /* Assumes two's complement. */
10814 if (signed_check
> reloc_signed_max
|| signed_check
< reloc_signed_min
)
10817 if ((lower_insn
& 0x5000) == 0x4000)
10818 /* For a BLX instruction, make sure that the relocation is rounded up
10819 to a word boundary. This follows the semantics of the instruction
10820 which specifies that bit 1 of the target address will come from bit
10821 1 of the base address. */
10822 relocation
= (relocation
+ 2) & ~ 3;
10824 /* Put RELOCATION back into the insn. Assumes two's complement.
10825 We use the Thumb-2 encoding, which is safe even if dealing with
10826 a Thumb-1 instruction by virtue of our overflow check above. */
10827 reloc_sign
= (signed_check
< 0) ? 1 : 0;
10828 upper_insn
= (upper_insn
& ~(bfd_vma
) 0x7ff)
10829 | ((relocation
>> 12) & 0x3ff)
10830 | (reloc_sign
<< 10);
10831 lower_insn
= (lower_insn
& ~(bfd_vma
) 0x2fff)
10832 | (((!((relocation
>> 23) & 1)) ^ reloc_sign
) << 13)
10833 | (((!((relocation
>> 22) & 1)) ^ reloc_sign
) << 11)
10834 | ((relocation
>> 1) & 0x7ff);
10836 /* Put the relocated value back in the object file: */
10837 bfd_put_16 (input_bfd
, upper_insn
, hit_data
);
10838 bfd_put_16 (input_bfd
, lower_insn
, hit_data
+ 2);
10840 return (overflow
? bfd_reloc_overflow
: bfd_reloc_ok
);
10844 case R_ARM_THM_JUMP19
:
10845 /* Thumb32 conditional branch instruction. */
10847 bfd_vma relocation
;
10848 bfd_boolean overflow
= FALSE
;
10849 bfd_vma upper_insn
= bfd_get_16 (input_bfd
, hit_data
);
10850 bfd_vma lower_insn
= bfd_get_16 (input_bfd
, hit_data
+ 2);
10851 bfd_signed_vma reloc_signed_max
= 0xffffe;
10852 bfd_signed_vma reloc_signed_min
= -0x100000;
10853 bfd_signed_vma signed_check
;
10854 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
10855 struct elf32_arm_stub_hash_entry
*stub_entry
;
10856 struct elf32_arm_link_hash_entry
*hash
;
10858 /* Need to refetch the addend, reconstruct the top three bits,
10859 and squish the two 11 bit pieces together. */
10860 if (globals
->use_rel
)
10862 bfd_vma S
= (upper_insn
& 0x0400) >> 10;
10863 bfd_vma upper
= (upper_insn
& 0x003f);
10864 bfd_vma J1
= (lower_insn
& 0x2000) >> 13;
10865 bfd_vma J2
= (lower_insn
& 0x0800) >> 11;
10866 bfd_vma lower
= (lower_insn
& 0x07ff);
10870 upper
|= (!S
) << 8;
10871 upper
-= 0x0100; /* Sign extend. */
10873 addend
= (upper
<< 12) | (lower
<< 1);
10874 signed_addend
= addend
;
10877 /* Handle calls via the PLT. */
10878 if (plt_offset
!= (bfd_vma
) -1)
10880 value
= (splt
->output_section
->vma
10881 + splt
->output_offset
10883 /* Target the Thumb stub before the ARM PLT entry. */
10884 value
-= PLT_THUMB_STUB_SIZE
;
10885 *unresolved_reloc_p
= FALSE
;
10888 hash
= (struct elf32_arm_link_hash_entry
*)h
;
10890 stub_type
= arm_type_of_stub (info
, input_section
, rel
,
10891 st_type
, &branch_type
,
10892 hash
, value
, sym_sec
,
10893 input_bfd
, sym_name
);
10894 if (stub_type
!= arm_stub_none
)
10896 stub_entry
= elf32_arm_get_stub_entry (input_section
,
10900 if (stub_entry
!= NULL
)
10902 value
= (stub_entry
->stub_offset
10903 + stub_entry
->stub_sec
->output_offset
10904 + stub_entry
->stub_sec
->output_section
->vma
);
10908 relocation
= value
+ signed_addend
;
10909 relocation
-= (input_section
->output_section
->vma
10910 + input_section
->output_offset
10912 signed_check
= (bfd_signed_vma
) relocation
;
10914 if (signed_check
> reloc_signed_max
|| signed_check
< reloc_signed_min
)
10917 /* Put RELOCATION back into the insn. */
10919 bfd_vma S
= (relocation
& 0x00100000) >> 20;
10920 bfd_vma J2
= (relocation
& 0x00080000) >> 19;
10921 bfd_vma J1
= (relocation
& 0x00040000) >> 18;
10922 bfd_vma hi
= (relocation
& 0x0003f000) >> 12;
10923 bfd_vma lo
= (relocation
& 0x00000ffe) >> 1;
10925 upper_insn
= (upper_insn
& 0xfbc0) | (S
<< 10) | hi
;
10926 lower_insn
= (lower_insn
& 0xd000) | (J1
<< 13) | (J2
<< 11) | lo
;
10929 /* Put the relocated value back in the object file: */
10930 bfd_put_16 (input_bfd
, upper_insn
, hit_data
);
10931 bfd_put_16 (input_bfd
, lower_insn
, hit_data
+ 2);
10933 return (overflow
? bfd_reloc_overflow
: bfd_reloc_ok
);
10936 case R_ARM_THM_JUMP11
:
10937 case R_ARM_THM_JUMP8
:
10938 case R_ARM_THM_JUMP6
:
10939 /* Thumb B (branch) instruction). */
10941 bfd_signed_vma relocation
;
10942 bfd_signed_vma reloc_signed_max
= (1 << (howto
->bitsize
- 1)) - 1;
10943 bfd_signed_vma reloc_signed_min
= ~ reloc_signed_max
;
10944 bfd_signed_vma signed_check
;
10946 /* CZB cannot jump backward. */
10947 if (r_type
== R_ARM_THM_JUMP6
)
10948 reloc_signed_min
= 0;
10950 if (globals
->use_rel
)
10952 /* Need to refetch addend. */
10953 addend
= bfd_get_16 (input_bfd
, hit_data
) & howto
->src_mask
;
10954 if (addend
& ((howto
->src_mask
+ 1) >> 1))
10956 signed_addend
= -1;
10957 signed_addend
&= ~ howto
->src_mask
;
10958 signed_addend
|= addend
;
10961 signed_addend
= addend
;
10962 /* The value in the insn has been right shifted. We need to
10963 undo this, so that we can perform the address calculation
10964 in terms of bytes. */
10965 signed_addend
<<= howto
->rightshift
;
10967 relocation
= value
+ signed_addend
;
10969 relocation
-= (input_section
->output_section
->vma
10970 + input_section
->output_offset
10973 relocation
>>= howto
->rightshift
;
10974 signed_check
= relocation
;
10976 if (r_type
== R_ARM_THM_JUMP6
)
10977 relocation
= ((relocation
& 0x0020) << 4) | ((relocation
& 0x001f) << 3);
10979 relocation
&= howto
->dst_mask
;
10980 relocation
|= (bfd_get_16 (input_bfd
, hit_data
) & (~ howto
->dst_mask
));
10982 bfd_put_16 (input_bfd
, relocation
, hit_data
);
10984 /* Assumes two's complement. */
10985 if (signed_check
> reloc_signed_max
|| signed_check
< reloc_signed_min
)
10986 return bfd_reloc_overflow
;
10988 return bfd_reloc_ok
;
10991 case R_ARM_ALU_PCREL7_0
:
10992 case R_ARM_ALU_PCREL15_8
:
10993 case R_ARM_ALU_PCREL23_15
:
10996 bfd_vma relocation
;
10998 insn
= bfd_get_32 (input_bfd
, hit_data
);
10999 if (globals
->use_rel
)
11001 /* Extract the addend. */
11002 addend
= (insn
& 0xff) << ((insn
& 0xf00) >> 7);
11003 signed_addend
= addend
;
11005 relocation
= value
+ signed_addend
;
11007 relocation
-= (input_section
->output_section
->vma
11008 + input_section
->output_offset
11010 insn
= (insn
& ~0xfff)
11011 | ((howto
->bitpos
<< 7) & 0xf00)
11012 | ((relocation
>> howto
->bitpos
) & 0xff);
11013 bfd_put_32 (input_bfd
, value
, hit_data
);
11015 return bfd_reloc_ok
;
11017 case R_ARM_GNU_VTINHERIT
:
11018 case R_ARM_GNU_VTENTRY
:
11019 return bfd_reloc_ok
;
11021 case R_ARM_GOTOFF32
:
11022 /* Relocation is relative to the start of the
11023 global offset table. */
11025 BFD_ASSERT (sgot
!= NULL
);
11027 return bfd_reloc_notsupported
;
11029 /* If we are addressing a Thumb function, we need to adjust the
11030 address by one, so that attempts to call the function pointer will
11031 correctly interpret it as Thumb code. */
11032 if (branch_type
== ST_BRANCH_TO_THUMB
)
11035 /* Note that sgot->output_offset is not involved in this
11036 calculation. We always want the start of .got. If we
11037 define _GLOBAL_OFFSET_TABLE in a different way, as is
11038 permitted by the ABI, we might have to change this
11040 value
-= sgot
->output_section
->vma
;
11041 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
11042 contents
, rel
->r_offset
, value
,
11046 /* Use global offset table as symbol value. */
11047 BFD_ASSERT (sgot
!= NULL
);
11050 return bfd_reloc_notsupported
;
11052 *unresolved_reloc_p
= FALSE
;
11053 value
= sgot
->output_section
->vma
;
11054 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
11055 contents
, rel
->r_offset
, value
,
11059 case R_ARM_GOT_PREL
:
11060 /* Relocation is to the entry for this symbol in the
11061 global offset table. */
11063 return bfd_reloc_notsupported
;
11065 if (dynreloc_st_type
== STT_GNU_IFUNC
11066 && plt_offset
!= (bfd_vma
) -1
11067 && (h
== NULL
|| SYMBOL_REFERENCES_LOCAL (info
, h
)))
11069 /* We have a relocation against a locally-binding STT_GNU_IFUNC
11070 symbol, and the relocation resolves directly to the runtime
11071 target rather than to the .iplt entry. This means that any
11072 .got entry would be the same value as the .igot.plt entry,
11073 so there's no point creating both. */
11074 sgot
= globals
->root
.igotplt
;
11075 value
= sgot
->output_offset
+ gotplt_offset
;
11077 else if (h
!= NULL
)
11081 off
= h
->got
.offset
;
11082 BFD_ASSERT (off
!= (bfd_vma
) -1);
11083 if ((off
& 1) != 0)
11085 /* We have already processsed one GOT relocation against
11088 if (globals
->root
.dynamic_sections_created
11089 && !SYMBOL_REFERENCES_LOCAL (info
, h
))
11090 *unresolved_reloc_p
= FALSE
;
11094 Elf_Internal_Rela outrel
;
11096 if (h
->dynindx
!= -1 && !SYMBOL_REFERENCES_LOCAL (info
, h
))
11098 /* If the symbol doesn't resolve locally in a static
11099 object, we have an undefined reference. If the
11100 symbol doesn't resolve locally in a dynamic object,
11101 it should be resolved by the dynamic linker. */
11102 if (globals
->root
.dynamic_sections_created
)
11104 outrel
.r_info
= ELF32_R_INFO (h
->dynindx
, R_ARM_GLOB_DAT
);
11105 *unresolved_reloc_p
= FALSE
;
11109 outrel
.r_addend
= 0;
11113 if (dynreloc_st_type
== STT_GNU_IFUNC
)
11114 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_IRELATIVE
);
11115 else if (bfd_link_pic (info
)
11116 && (ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
11117 || h
->root
.type
!= bfd_link_hash_undefweak
))
11118 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_RELATIVE
);
11121 outrel
.r_addend
= dynreloc_value
;
11124 /* The GOT entry is initialized to zero by default.
11125 See if we should install a different value. */
11126 if (outrel
.r_addend
!= 0
11127 && (outrel
.r_info
== 0 || globals
->use_rel
))
11129 bfd_put_32 (output_bfd
, outrel
.r_addend
,
11130 sgot
->contents
+ off
);
11131 outrel
.r_addend
= 0;
11134 if (outrel
.r_info
!= 0)
11136 outrel
.r_offset
= (sgot
->output_section
->vma
11137 + sgot
->output_offset
11139 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
11141 h
->got
.offset
|= 1;
11143 value
= sgot
->output_offset
+ off
;
11149 BFD_ASSERT (local_got_offsets
!= NULL
11150 && local_got_offsets
[r_symndx
] != (bfd_vma
) -1);
11152 off
= local_got_offsets
[r_symndx
];
11154 /* The offset must always be a multiple of 4. We use the
11155 least significant bit to record whether we have already
11156 generated the necessary reloc. */
11157 if ((off
& 1) != 0)
11161 if (globals
->use_rel
)
11162 bfd_put_32 (output_bfd
, dynreloc_value
, sgot
->contents
+ off
);
11164 if (bfd_link_pic (info
) || dynreloc_st_type
== STT_GNU_IFUNC
)
11166 Elf_Internal_Rela outrel
;
11168 outrel
.r_addend
= addend
+ dynreloc_value
;
11169 outrel
.r_offset
= (sgot
->output_section
->vma
11170 + sgot
->output_offset
11172 if (dynreloc_st_type
== STT_GNU_IFUNC
)
11173 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_IRELATIVE
);
11175 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_RELATIVE
);
11176 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
11179 local_got_offsets
[r_symndx
] |= 1;
11182 value
= sgot
->output_offset
+ off
;
11184 if (r_type
!= R_ARM_GOT32
)
11185 value
+= sgot
->output_section
->vma
;
11187 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
11188 contents
, rel
->r_offset
, value
,
11191 case R_ARM_TLS_LDO32
:
11192 value
= value
- dtpoff_base (info
);
11194 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
11195 contents
, rel
->r_offset
, value
,
11198 case R_ARM_TLS_LDM32
:
11205 off
= globals
->tls_ldm_got
.offset
;
11207 if ((off
& 1) != 0)
11211 /* If we don't know the module number, create a relocation
11213 if (bfd_link_pic (info
))
11215 Elf_Internal_Rela outrel
;
11217 if (srelgot
== NULL
)
11220 outrel
.r_addend
= 0;
11221 outrel
.r_offset
= (sgot
->output_section
->vma
11222 + sgot
->output_offset
+ off
);
11223 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32
);
11225 if (globals
->use_rel
)
11226 bfd_put_32 (output_bfd
, outrel
.r_addend
,
11227 sgot
->contents
+ off
);
11229 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
11232 bfd_put_32 (output_bfd
, 1, sgot
->contents
+ off
);
11234 globals
->tls_ldm_got
.offset
|= 1;
11237 value
= sgot
->output_section
->vma
+ sgot
->output_offset
+ off
11238 - (input_section
->output_section
->vma
+ input_section
->output_offset
+ rel
->r_offset
);
11240 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
11241 contents
, rel
->r_offset
, value
,
11245 case R_ARM_TLS_CALL
:
11246 case R_ARM_THM_TLS_CALL
:
11247 case R_ARM_TLS_GD32
:
11248 case R_ARM_TLS_IE32
:
11249 case R_ARM_TLS_GOTDESC
:
11250 case R_ARM_TLS_DESCSEQ
:
11251 case R_ARM_THM_TLS_DESCSEQ
:
11253 bfd_vma off
, offplt
;
11257 BFD_ASSERT (sgot
!= NULL
);
11262 dyn
= globals
->root
.dynamic_sections_created
;
11263 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn
,
11264 bfd_link_pic (info
),
11266 && (!bfd_link_pic (info
)
11267 || !SYMBOL_REFERENCES_LOCAL (info
, h
)))
11269 *unresolved_reloc_p
= FALSE
;
11272 off
= h
->got
.offset
;
11273 offplt
= elf32_arm_hash_entry (h
)->tlsdesc_got
;
11274 tls_type
= ((struct elf32_arm_link_hash_entry
*) h
)->tls_type
;
11278 BFD_ASSERT (local_got_offsets
!= NULL
);
11279 off
= local_got_offsets
[r_symndx
];
11280 offplt
= local_tlsdesc_gotents
[r_symndx
];
11281 tls_type
= elf32_arm_local_got_tls_type (input_bfd
)[r_symndx
];
11284 /* Linker relaxations happens from one of the
11285 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
11286 if (ELF32_R_TYPE(rel
->r_info
) != r_type
)
11287 tls_type
= GOT_TLS_IE
;
11289 BFD_ASSERT (tls_type
!= GOT_UNKNOWN
);
11291 if ((off
& 1) != 0)
11295 bfd_boolean need_relocs
= FALSE
;
11296 Elf_Internal_Rela outrel
;
11299 /* The GOT entries have not been initialized yet. Do it
11300 now, and emit any relocations. If both an IE GOT and a
11301 GD GOT are necessary, we emit the GD first. */
11303 if ((bfd_link_pic (info
) || indx
!= 0)
11305 || (ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
11306 && !resolved_to_zero
)
11307 || h
->root
.type
!= bfd_link_hash_undefweak
))
11309 need_relocs
= TRUE
;
11310 BFD_ASSERT (srelgot
!= NULL
);
11313 if (tls_type
& GOT_TLS_GDESC
)
11317 /* We should have relaxed, unless this is an undefined
11319 BFD_ASSERT ((h
&& (h
->root
.type
== bfd_link_hash_undefweak
))
11320 || bfd_link_pic (info
));
11321 BFD_ASSERT (globals
->sgotplt_jump_table_size
+ offplt
+ 8
11322 <= globals
->root
.sgotplt
->size
);
11324 outrel
.r_addend
= 0;
11325 outrel
.r_offset
= (globals
->root
.sgotplt
->output_section
->vma
11326 + globals
->root
.sgotplt
->output_offset
11328 + globals
->sgotplt_jump_table_size
);
11330 outrel
.r_info
= ELF32_R_INFO (indx
, R_ARM_TLS_DESC
);
11331 sreloc
= globals
->root
.srelplt
;
11332 loc
= sreloc
->contents
;
11333 loc
+= globals
->next_tls_desc_index
++ * RELOC_SIZE (globals
);
11334 BFD_ASSERT (loc
+ RELOC_SIZE (globals
)
11335 <= sreloc
->contents
+ sreloc
->size
);
11337 SWAP_RELOC_OUT (globals
) (output_bfd
, &outrel
, loc
);
11339 /* For globals, the first word in the relocation gets
11340 the relocation index and the top bit set, or zero,
11341 if we're binding now. For locals, it gets the
11342 symbol's offset in the tls section. */
11343 bfd_put_32 (output_bfd
,
11344 !h
? value
- elf_hash_table (info
)->tls_sec
->vma
11345 : info
->flags
& DF_BIND_NOW
? 0
11346 : 0x80000000 | ELF32_R_SYM (outrel
.r_info
),
11347 globals
->root
.sgotplt
->contents
+ offplt
11348 + globals
->sgotplt_jump_table_size
);
11350 /* Second word in the relocation is always zero. */
11351 bfd_put_32 (output_bfd
, 0,
11352 globals
->root
.sgotplt
->contents
+ offplt
11353 + globals
->sgotplt_jump_table_size
+ 4);
11355 if (tls_type
& GOT_TLS_GD
)
11359 outrel
.r_addend
= 0;
11360 outrel
.r_offset
= (sgot
->output_section
->vma
11361 + sgot
->output_offset
11363 outrel
.r_info
= ELF32_R_INFO (indx
, R_ARM_TLS_DTPMOD32
);
11365 if (globals
->use_rel
)
11366 bfd_put_32 (output_bfd
, outrel
.r_addend
,
11367 sgot
->contents
+ cur_off
);
11369 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
11372 bfd_put_32 (output_bfd
, value
- dtpoff_base (info
),
11373 sgot
->contents
+ cur_off
+ 4);
11376 outrel
.r_addend
= 0;
11377 outrel
.r_info
= ELF32_R_INFO (indx
,
11378 R_ARM_TLS_DTPOFF32
);
11379 outrel
.r_offset
+= 4;
11381 if (globals
->use_rel
)
11382 bfd_put_32 (output_bfd
, outrel
.r_addend
,
11383 sgot
->contents
+ cur_off
+ 4);
11385 elf32_arm_add_dynreloc (output_bfd
, info
,
11391 /* If we are not emitting relocations for a
11392 general dynamic reference, then we must be in a
11393 static link or an executable link with the
11394 symbol binding locally. Mark it as belonging
11395 to module 1, the executable. */
11396 bfd_put_32 (output_bfd
, 1,
11397 sgot
->contents
+ cur_off
);
11398 bfd_put_32 (output_bfd
, value
- dtpoff_base (info
),
11399 sgot
->contents
+ cur_off
+ 4);
11405 if (tls_type
& GOT_TLS_IE
)
11410 outrel
.r_addend
= value
- dtpoff_base (info
);
11412 outrel
.r_addend
= 0;
11413 outrel
.r_offset
= (sgot
->output_section
->vma
11414 + sgot
->output_offset
11416 outrel
.r_info
= ELF32_R_INFO (indx
, R_ARM_TLS_TPOFF32
);
11418 if (globals
->use_rel
)
11419 bfd_put_32 (output_bfd
, outrel
.r_addend
,
11420 sgot
->contents
+ cur_off
);
11422 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
11425 bfd_put_32 (output_bfd
, tpoff (info
, value
),
11426 sgot
->contents
+ cur_off
);
11431 h
->got
.offset
|= 1;
11433 local_got_offsets
[r_symndx
] |= 1;
11436 if ((tls_type
& GOT_TLS_GD
) && r_type
!= R_ARM_TLS_GD32
)
11438 else if (tls_type
& GOT_TLS_GDESC
)
11441 if (ELF32_R_TYPE(rel
->r_info
) == R_ARM_TLS_CALL
11442 || ELF32_R_TYPE(rel
->r_info
) == R_ARM_THM_TLS_CALL
)
11444 bfd_signed_vma offset
;
11445 /* TLS stubs are arm mode. The original symbol is a
11446 data object, so branch_type is bogus. */
11447 branch_type
= ST_BRANCH_TO_ARM
;
11448 enum elf32_arm_stub_type stub_type
11449 = arm_type_of_stub (info
, input_section
, rel
,
11450 st_type
, &branch_type
,
11451 (struct elf32_arm_link_hash_entry
*)h
,
11452 globals
->tls_trampoline
, globals
->root
.splt
,
11453 input_bfd
, sym_name
);
11455 if (stub_type
!= arm_stub_none
)
11457 struct elf32_arm_stub_hash_entry
*stub_entry
11458 = elf32_arm_get_stub_entry
11459 (input_section
, globals
->root
.splt
, 0, rel
,
11460 globals
, stub_type
);
11461 offset
= (stub_entry
->stub_offset
11462 + stub_entry
->stub_sec
->output_offset
11463 + stub_entry
->stub_sec
->output_section
->vma
);
11466 offset
= (globals
->root
.splt
->output_section
->vma
11467 + globals
->root
.splt
->output_offset
11468 + globals
->tls_trampoline
);
11470 if (ELF32_R_TYPE(rel
->r_info
) == R_ARM_TLS_CALL
)
11472 unsigned long inst
;
11474 offset
-= (input_section
->output_section
->vma
11475 + input_section
->output_offset
11476 + rel
->r_offset
+ 8);
11478 inst
= offset
>> 2;
11479 inst
&= 0x00ffffff;
11480 value
= inst
| (globals
->use_blx
? 0xfa000000 : 0xeb000000);
11484 /* Thumb blx encodes the offset in a complicated
11486 unsigned upper_insn
, lower_insn
;
11489 offset
-= (input_section
->output_section
->vma
11490 + input_section
->output_offset
11491 + rel
->r_offset
+ 4);
11493 if (stub_type
!= arm_stub_none
11494 && arm_stub_is_thumb (stub_type
))
11496 lower_insn
= 0xd000;
11500 lower_insn
= 0xc000;
11501 /* Round up the offset to a word boundary. */
11502 offset
= (offset
+ 2) & ~2;
11506 upper_insn
= (0xf000
11507 | ((offset
>> 12) & 0x3ff)
11509 lower_insn
|= (((!((offset
>> 23) & 1)) ^ neg
) << 13)
11510 | (((!((offset
>> 22) & 1)) ^ neg
) << 11)
11511 | ((offset
>> 1) & 0x7ff);
11512 bfd_put_16 (input_bfd
, upper_insn
, hit_data
);
11513 bfd_put_16 (input_bfd
, lower_insn
, hit_data
+ 2);
11514 return bfd_reloc_ok
;
11517 /* These relocations needs special care, as besides the fact
11518 they point somewhere in .gotplt, the addend must be
11519 adjusted accordingly depending on the type of instruction
11521 else if ((r_type
== R_ARM_TLS_GOTDESC
) && (tls_type
& GOT_TLS_GDESC
))
11523 unsigned long data
, insn
;
11526 data
= bfd_get_32 (input_bfd
, hit_data
);
11532 insn
= bfd_get_16 (input_bfd
, contents
+ rel
->r_offset
- data
);
11533 if ((insn
& 0xf000) == 0xf000 || (insn
& 0xf800) == 0xe800)
11534 insn
= (insn
<< 16)
11535 | bfd_get_16 (input_bfd
,
11536 contents
+ rel
->r_offset
- data
+ 2);
11537 if ((insn
& 0xf800c000) == 0xf000c000)
11540 else if ((insn
& 0xffffff00) == 0x4400)
11546 /* xgettext:c-format */
11547 (_("%pB(%pA+%#" PRIx64
"): "
11548 "unexpected %s instruction '%#lx' "
11549 "referenced by TLS_GOTDESC"),
11550 input_bfd
, input_section
, (uint64_t) rel
->r_offset
,
11552 return bfd_reloc_notsupported
;
11557 insn
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
- data
);
11559 switch (insn
>> 24)
11561 case 0xeb: /* bl */
11562 case 0xfa: /* blx */
11566 case 0xe0: /* add */
11572 /* xgettext:c-format */
11573 (_("%pB(%pA+%#" PRIx64
"): "
11574 "unexpected %s instruction '%#lx' "
11575 "referenced by TLS_GOTDESC"),
11576 input_bfd
, input_section
, (uint64_t) rel
->r_offset
,
11578 return bfd_reloc_notsupported
;
11582 value
+= ((globals
->root
.sgotplt
->output_section
->vma
11583 + globals
->root
.sgotplt
->output_offset
+ off
)
11584 - (input_section
->output_section
->vma
11585 + input_section
->output_offset
11587 + globals
->sgotplt_jump_table_size
);
11590 value
= ((globals
->root
.sgot
->output_section
->vma
11591 + globals
->root
.sgot
->output_offset
+ off
)
11592 - (input_section
->output_section
->vma
11593 + input_section
->output_offset
+ rel
->r_offset
));
11595 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
11596 contents
, rel
->r_offset
, value
,
11600 case R_ARM_TLS_LE32
:
11601 if (bfd_link_dll (info
))
11604 /* xgettext:c-format */
11605 (_("%pB(%pA+%#" PRIx64
"): %s relocation not permitted "
11606 "in shared object"),
11607 input_bfd
, input_section
, (uint64_t) rel
->r_offset
, howto
->name
);
11608 return bfd_reloc_notsupported
;
11611 value
= tpoff (info
, value
);
11613 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
11614 contents
, rel
->r_offset
, value
,
11618 if (globals
->fix_v4bx
)
11620 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
11622 /* Ensure that we have a BX instruction. */
11623 BFD_ASSERT ((insn
& 0x0ffffff0) == 0x012fff10);
11625 if (globals
->fix_v4bx
== 2 && (insn
& 0xf) != 0xf)
11627 /* Branch to veneer. */
11629 glue_addr
= elf32_arm_bx_glue (info
, insn
& 0xf);
11630 glue_addr
-= input_section
->output_section
->vma
11631 + input_section
->output_offset
11632 + rel
->r_offset
+ 8;
11633 insn
= (insn
& 0xf0000000) | 0x0a000000
11634 | ((glue_addr
>> 2) & 0x00ffffff);
11638 /* Preserve Rm (lowest four bits) and the condition code
11639 (highest four bits). Other bits encode MOV PC,Rm. */
11640 insn
= (insn
& 0xf000000f) | 0x01a0f000;
11643 bfd_put_32 (input_bfd
, insn
, hit_data
);
11645 return bfd_reloc_ok
;
11647 case R_ARM_MOVW_ABS_NC
:
11648 case R_ARM_MOVT_ABS
:
11649 case R_ARM_MOVW_PREL_NC
:
11650 case R_ARM_MOVT_PREL
:
11651 /* Until we properly support segment-base-relative addressing then
11652 we assume the segment base to be zero, as for the group relocations.
11653 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
11654 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
11655 case R_ARM_MOVW_BREL_NC
:
11656 case R_ARM_MOVW_BREL
:
11657 case R_ARM_MOVT_BREL
:
11659 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
11661 if (globals
->use_rel
)
11663 addend
= ((insn
>> 4) & 0xf000) | (insn
& 0xfff);
11664 signed_addend
= (addend
^ 0x8000) - 0x8000;
11667 value
+= signed_addend
;
11669 if (r_type
== R_ARM_MOVW_PREL_NC
|| r_type
== R_ARM_MOVT_PREL
)
11670 value
-= (input_section
->output_section
->vma
11671 + input_section
->output_offset
+ rel
->r_offset
);
11673 if (r_type
== R_ARM_MOVW_BREL
&& value
>= 0x10000)
11674 return bfd_reloc_overflow
;
11676 if (branch_type
== ST_BRANCH_TO_THUMB
)
11679 if (r_type
== R_ARM_MOVT_ABS
|| r_type
== R_ARM_MOVT_PREL
11680 || r_type
== R_ARM_MOVT_BREL
)
11683 insn
&= 0xfff0f000;
11684 insn
|= value
& 0xfff;
11685 insn
|= (value
& 0xf000) << 4;
11686 bfd_put_32 (input_bfd
, insn
, hit_data
);
11688 return bfd_reloc_ok
;
11690 case R_ARM_THM_MOVW_ABS_NC
:
11691 case R_ARM_THM_MOVT_ABS
:
11692 case R_ARM_THM_MOVW_PREL_NC
:
11693 case R_ARM_THM_MOVT_PREL
:
11694 /* Until we properly support segment-base-relative addressing then
11695 we assume the segment base to be zero, as for the above relocations.
11696 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
11697 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
11698 as R_ARM_THM_MOVT_ABS. */
11699 case R_ARM_THM_MOVW_BREL_NC
:
11700 case R_ARM_THM_MOVW_BREL
:
11701 case R_ARM_THM_MOVT_BREL
:
11705 insn
= bfd_get_16 (input_bfd
, hit_data
) << 16;
11706 insn
|= bfd_get_16 (input_bfd
, hit_data
+ 2);
11708 if (globals
->use_rel
)
11710 addend
= ((insn
>> 4) & 0xf000)
11711 | ((insn
>> 15) & 0x0800)
11712 | ((insn
>> 4) & 0x0700)
11714 signed_addend
= (addend
^ 0x8000) - 0x8000;
11717 value
+= signed_addend
;
11719 if (r_type
== R_ARM_THM_MOVW_PREL_NC
|| r_type
== R_ARM_THM_MOVT_PREL
)
11720 value
-= (input_section
->output_section
->vma
11721 + input_section
->output_offset
+ rel
->r_offset
);
11723 if (r_type
== R_ARM_THM_MOVW_BREL
&& value
>= 0x10000)
11724 return bfd_reloc_overflow
;
11726 if (branch_type
== ST_BRANCH_TO_THUMB
)
11729 if (r_type
== R_ARM_THM_MOVT_ABS
|| r_type
== R_ARM_THM_MOVT_PREL
11730 || r_type
== R_ARM_THM_MOVT_BREL
)
11733 insn
&= 0xfbf08f00;
11734 insn
|= (value
& 0xf000) << 4;
11735 insn
|= (value
& 0x0800) << 15;
11736 insn
|= (value
& 0x0700) << 4;
11737 insn
|= (value
& 0x00ff);
11739 bfd_put_16 (input_bfd
, insn
>> 16, hit_data
);
11740 bfd_put_16 (input_bfd
, insn
& 0xffff, hit_data
+ 2);
11742 return bfd_reloc_ok
;
11744 case R_ARM_ALU_PC_G0_NC
:
11745 case R_ARM_ALU_PC_G1_NC
:
11746 case R_ARM_ALU_PC_G0
:
11747 case R_ARM_ALU_PC_G1
:
11748 case R_ARM_ALU_PC_G2
:
11749 case R_ARM_ALU_SB_G0_NC
:
11750 case R_ARM_ALU_SB_G1_NC
:
11751 case R_ARM_ALU_SB_G0
:
11752 case R_ARM_ALU_SB_G1
:
11753 case R_ARM_ALU_SB_G2
:
11755 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
11756 bfd_vma pc
= input_section
->output_section
->vma
11757 + input_section
->output_offset
+ rel
->r_offset
;
11758 /* sb is the origin of the *segment* containing the symbol. */
11759 bfd_vma sb
= sym_sec
? sym_sec
->output_section
->vma
: 0;
11762 bfd_signed_vma signed_value
;
11765 /* Determine which group of bits to select. */
11768 case R_ARM_ALU_PC_G0_NC
:
11769 case R_ARM_ALU_PC_G0
:
11770 case R_ARM_ALU_SB_G0_NC
:
11771 case R_ARM_ALU_SB_G0
:
11775 case R_ARM_ALU_PC_G1_NC
:
11776 case R_ARM_ALU_PC_G1
:
11777 case R_ARM_ALU_SB_G1_NC
:
11778 case R_ARM_ALU_SB_G1
:
11782 case R_ARM_ALU_PC_G2
:
11783 case R_ARM_ALU_SB_G2
:
11791 /* If REL, extract the addend from the insn. If RELA, it will
11792 have already been fetched for us. */
11793 if (globals
->use_rel
)
11796 bfd_vma constant
= insn
& 0xff;
11797 bfd_vma rotation
= (insn
& 0xf00) >> 8;
11800 signed_addend
= constant
;
11803 /* Compensate for the fact that in the instruction, the
11804 rotation is stored in multiples of 2 bits. */
11807 /* Rotate "constant" right by "rotation" bits. */
11808 signed_addend
= (constant
>> rotation
) |
11809 (constant
<< (8 * sizeof (bfd_vma
) - rotation
));
11812 /* Determine if the instruction is an ADD or a SUB.
11813 (For REL, this determines the sign of the addend.) */
11814 negative
= identify_add_or_sub (insn
);
11818 /* xgettext:c-format */
11819 (_("%pB(%pA+%#" PRIx64
"): only ADD or SUB instructions "
11820 "are allowed for ALU group relocations"),
11821 input_bfd
, input_section
, (uint64_t) rel
->r_offset
);
11822 return bfd_reloc_overflow
;
11825 signed_addend
*= negative
;
11828 /* Compute the value (X) to go in the place. */
11829 if (r_type
== R_ARM_ALU_PC_G0_NC
11830 || r_type
== R_ARM_ALU_PC_G1_NC
11831 || r_type
== R_ARM_ALU_PC_G0
11832 || r_type
== R_ARM_ALU_PC_G1
11833 || r_type
== R_ARM_ALU_PC_G2
)
11835 signed_value
= value
- pc
+ signed_addend
;
11837 /* Section base relative. */
11838 signed_value
= value
- sb
+ signed_addend
;
11840 /* If the target symbol is a Thumb function, then set the
11841 Thumb bit in the address. */
11842 if (branch_type
== ST_BRANCH_TO_THUMB
)
11845 /* Calculate the value of the relevant G_n, in encoded
11846 constant-with-rotation format. */
11847 g_n
= calculate_group_reloc_mask (signed_value
< 0 ? - signed_value
: signed_value
,
11850 /* Check for overflow if required. */
11851 if ((r_type
== R_ARM_ALU_PC_G0
11852 || r_type
== R_ARM_ALU_PC_G1
11853 || r_type
== R_ARM_ALU_PC_G2
11854 || r_type
== R_ARM_ALU_SB_G0
11855 || r_type
== R_ARM_ALU_SB_G1
11856 || r_type
== R_ARM_ALU_SB_G2
) && residual
!= 0)
11859 /* xgettext:c-format */
11860 (_("%pB(%pA+%#" PRIx64
"): overflow whilst "
11861 "splitting %#" PRIx64
" for group relocation %s"),
11862 input_bfd
, input_section
, (uint64_t) rel
->r_offset
,
11863 (uint64_t) (signed_value
< 0 ? -signed_value
: signed_value
),
11865 return bfd_reloc_overflow
;
11868 /* Mask out the value and the ADD/SUB part of the opcode; take care
11869 not to destroy the S bit. */
11870 insn
&= 0xff1ff000;
11872 /* Set the opcode according to whether the value to go in the
11873 place is negative. */
11874 if (signed_value
< 0)
11879 /* Encode the offset. */
11882 bfd_put_32 (input_bfd
, insn
, hit_data
);
11884 return bfd_reloc_ok
;
11886 case R_ARM_LDR_PC_G0
:
11887 case R_ARM_LDR_PC_G1
:
11888 case R_ARM_LDR_PC_G2
:
11889 case R_ARM_LDR_SB_G0
:
11890 case R_ARM_LDR_SB_G1
:
11891 case R_ARM_LDR_SB_G2
:
11893 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
11894 bfd_vma pc
= input_section
->output_section
->vma
11895 + input_section
->output_offset
+ rel
->r_offset
;
11896 /* sb is the origin of the *segment* containing the symbol. */
11897 bfd_vma sb
= sym_sec
? sym_sec
->output_section
->vma
: 0;
11899 bfd_signed_vma signed_value
;
11902 /* Determine which groups of bits to calculate. */
11905 case R_ARM_LDR_PC_G0
:
11906 case R_ARM_LDR_SB_G0
:
11910 case R_ARM_LDR_PC_G1
:
11911 case R_ARM_LDR_SB_G1
:
11915 case R_ARM_LDR_PC_G2
:
11916 case R_ARM_LDR_SB_G2
:
11924 /* If REL, extract the addend from the insn. If RELA, it will
11925 have already been fetched for us. */
11926 if (globals
->use_rel
)
11928 int negative
= (insn
& (1 << 23)) ? 1 : -1;
11929 signed_addend
= negative
* (insn
& 0xfff);
11932 /* Compute the value (X) to go in the place. */
11933 if (r_type
== R_ARM_LDR_PC_G0
11934 || r_type
== R_ARM_LDR_PC_G1
11935 || r_type
== R_ARM_LDR_PC_G2
)
11937 signed_value
= value
- pc
+ signed_addend
;
11939 /* Section base relative. */
11940 signed_value
= value
- sb
+ signed_addend
;
11942 /* Calculate the value of the relevant G_{n-1} to obtain
11943 the residual at that stage. */
11944 calculate_group_reloc_mask (signed_value
< 0 ? - signed_value
: signed_value
,
11945 group
- 1, &residual
);
11947 /* Check for overflow. */
11948 if (residual
>= 0x1000)
11951 /* xgettext:c-format */
11952 (_("%pB(%pA+%#" PRIx64
"): overflow whilst "
11953 "splitting %#" PRIx64
" for group relocation %s"),
11954 input_bfd
, input_section
, (uint64_t) rel
->r_offset
,
11955 (uint64_t) (signed_value
< 0 ? -signed_value
: signed_value
),
11957 return bfd_reloc_overflow
;
11960 /* Mask out the value and U bit. */
11961 insn
&= 0xff7ff000;
11963 /* Set the U bit if the value to go in the place is non-negative. */
11964 if (signed_value
>= 0)
11967 /* Encode the offset. */
11970 bfd_put_32 (input_bfd
, insn
, hit_data
);
11972 return bfd_reloc_ok
;
11974 case R_ARM_LDRS_PC_G0
:
11975 case R_ARM_LDRS_PC_G1
:
11976 case R_ARM_LDRS_PC_G2
:
11977 case R_ARM_LDRS_SB_G0
:
11978 case R_ARM_LDRS_SB_G1
:
11979 case R_ARM_LDRS_SB_G2
:
11981 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
11982 bfd_vma pc
= input_section
->output_section
->vma
11983 + input_section
->output_offset
+ rel
->r_offset
;
11984 /* sb is the origin of the *segment* containing the symbol. */
11985 bfd_vma sb
= sym_sec
? sym_sec
->output_section
->vma
: 0;
11987 bfd_signed_vma signed_value
;
11990 /* Determine which groups of bits to calculate. */
11993 case R_ARM_LDRS_PC_G0
:
11994 case R_ARM_LDRS_SB_G0
:
11998 case R_ARM_LDRS_PC_G1
:
11999 case R_ARM_LDRS_SB_G1
:
12003 case R_ARM_LDRS_PC_G2
:
12004 case R_ARM_LDRS_SB_G2
:
12012 /* If REL, extract the addend from the insn. If RELA, it will
12013 have already been fetched for us. */
12014 if (globals
->use_rel
)
12016 int negative
= (insn
& (1 << 23)) ? 1 : -1;
12017 signed_addend
= negative
* (((insn
& 0xf00) >> 4) + (insn
& 0xf));
12020 /* Compute the value (X) to go in the place. */
12021 if (r_type
== R_ARM_LDRS_PC_G0
12022 || r_type
== R_ARM_LDRS_PC_G1
12023 || r_type
== R_ARM_LDRS_PC_G2
)
12025 signed_value
= value
- pc
+ signed_addend
;
12027 /* Section base relative. */
12028 signed_value
= value
- sb
+ signed_addend
;
12030 /* Calculate the value of the relevant G_{n-1} to obtain
12031 the residual at that stage. */
12032 calculate_group_reloc_mask (signed_value
< 0 ? - signed_value
: signed_value
,
12033 group
- 1, &residual
);
12035 /* Check for overflow. */
12036 if (residual
>= 0x100)
12039 /* xgettext:c-format */
12040 (_("%pB(%pA+%#" PRIx64
"): overflow whilst "
12041 "splitting %#" PRIx64
" for group relocation %s"),
12042 input_bfd
, input_section
, (uint64_t) rel
->r_offset
,
12043 (uint64_t) (signed_value
< 0 ? -signed_value
: signed_value
),
12045 return bfd_reloc_overflow
;
12048 /* Mask out the value and U bit. */
12049 insn
&= 0xff7ff0f0;
12051 /* Set the U bit if the value to go in the place is non-negative. */
12052 if (signed_value
>= 0)
12055 /* Encode the offset. */
12056 insn
|= ((residual
& 0xf0) << 4) | (residual
& 0xf);
12058 bfd_put_32 (input_bfd
, insn
, hit_data
);
12060 return bfd_reloc_ok
;
12062 case R_ARM_LDC_PC_G0
:
12063 case R_ARM_LDC_PC_G1
:
12064 case R_ARM_LDC_PC_G2
:
12065 case R_ARM_LDC_SB_G0
:
12066 case R_ARM_LDC_SB_G1
:
12067 case R_ARM_LDC_SB_G2
:
12069 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
12070 bfd_vma pc
= input_section
->output_section
->vma
12071 + input_section
->output_offset
+ rel
->r_offset
;
12072 /* sb is the origin of the *segment* containing the symbol. */
12073 bfd_vma sb
= sym_sec
? sym_sec
->output_section
->vma
: 0;
12075 bfd_signed_vma signed_value
;
12078 /* Determine which groups of bits to calculate. */
12081 case R_ARM_LDC_PC_G0
:
12082 case R_ARM_LDC_SB_G0
:
12086 case R_ARM_LDC_PC_G1
:
12087 case R_ARM_LDC_SB_G1
:
12091 case R_ARM_LDC_PC_G2
:
12092 case R_ARM_LDC_SB_G2
:
12100 /* If REL, extract the addend from the insn. If RELA, it will
12101 have already been fetched for us. */
12102 if (globals
->use_rel
)
12104 int negative
= (insn
& (1 << 23)) ? 1 : -1;
12105 signed_addend
= negative
* ((insn
& 0xff) << 2);
12108 /* Compute the value (X) to go in the place. */
12109 if (r_type
== R_ARM_LDC_PC_G0
12110 || r_type
== R_ARM_LDC_PC_G1
12111 || r_type
== R_ARM_LDC_PC_G2
)
12113 signed_value
= value
- pc
+ signed_addend
;
12115 /* Section base relative. */
12116 signed_value
= value
- sb
+ signed_addend
;
12118 /* Calculate the value of the relevant G_{n-1} to obtain
12119 the residual at that stage. */
12120 calculate_group_reloc_mask (signed_value
< 0 ? - signed_value
: signed_value
,
12121 group
- 1, &residual
);
12123 /* Check for overflow. (The absolute value to go in the place must be
12124 divisible by four and, after having been divided by four, must
12125 fit in eight bits.) */
12126 if ((residual
& 0x3) != 0 || residual
>= 0x400)
12129 /* xgettext:c-format */
12130 (_("%pB(%pA+%#" PRIx64
"): overflow whilst "
12131 "splitting %#" PRIx64
" for group relocation %s"),
12132 input_bfd
, input_section
, (uint64_t) rel
->r_offset
,
12133 (uint64_t) (signed_value
< 0 ? -signed_value
: signed_value
),
12135 return bfd_reloc_overflow
;
12138 /* Mask out the value and U bit. */
12139 insn
&= 0xff7fff00;
12141 /* Set the U bit if the value to go in the place is non-negative. */
12142 if (signed_value
>= 0)
12145 /* Encode the offset. */
12146 insn
|= residual
>> 2;
12148 bfd_put_32 (input_bfd
, insn
, hit_data
);
12150 return bfd_reloc_ok
;
12152 case R_ARM_THM_ALU_ABS_G0_NC
:
12153 case R_ARM_THM_ALU_ABS_G1_NC
:
12154 case R_ARM_THM_ALU_ABS_G2_NC
:
12155 case R_ARM_THM_ALU_ABS_G3_NC
:
12157 const int shift_array
[4] = {0, 8, 16, 24};
12158 bfd_vma insn
= bfd_get_16 (input_bfd
, hit_data
);
12159 bfd_vma addr
= value
;
12160 int shift
= shift_array
[r_type
- R_ARM_THM_ALU_ABS_G0_NC
];
12162 /* Compute address. */
12163 if (globals
->use_rel
)
12164 signed_addend
= insn
& 0xff;
12165 addr
+= signed_addend
;
12166 if (branch_type
== ST_BRANCH_TO_THUMB
)
12168 /* Clean imm8 insn. */
12170 /* And update with correct part of address. */
12171 insn
|= (addr
>> shift
) & 0xff;
12173 bfd_put_16 (input_bfd
, insn
, hit_data
);
12176 *unresolved_reloc_p
= FALSE
;
12177 return bfd_reloc_ok
;
12180 return bfd_reloc_notsupported
;
12184 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
12186 arm_add_to_rel (bfd
* abfd
,
12187 bfd_byte
* address
,
12188 reloc_howto_type
* howto
,
12189 bfd_signed_vma increment
)
12191 bfd_signed_vma addend
;
12193 if (howto
->type
== R_ARM_THM_CALL
12194 || howto
->type
== R_ARM_THM_JUMP24
)
12196 int upper_insn
, lower_insn
;
12199 upper_insn
= bfd_get_16 (abfd
, address
);
12200 lower_insn
= bfd_get_16 (abfd
, address
+ 2);
12201 upper
= upper_insn
& 0x7ff;
12202 lower
= lower_insn
& 0x7ff;
12204 addend
= (upper
<< 12) | (lower
<< 1);
12205 addend
+= increment
;
12208 upper_insn
= (upper_insn
& 0xf800) | ((addend
>> 11) & 0x7ff);
12209 lower_insn
= (lower_insn
& 0xf800) | (addend
& 0x7ff);
12211 bfd_put_16 (abfd
, (bfd_vma
) upper_insn
, address
);
12212 bfd_put_16 (abfd
, (bfd_vma
) lower_insn
, address
+ 2);
12218 contents
= bfd_get_32 (abfd
, address
);
12220 /* Get the (signed) value from the instruction. */
12221 addend
= contents
& howto
->src_mask
;
12222 if (addend
& ((howto
->src_mask
+ 1) >> 1))
12224 bfd_signed_vma mask
;
12227 mask
&= ~ howto
->src_mask
;
12231 /* Add in the increment, (which is a byte value). */
12232 switch (howto
->type
)
12235 addend
+= increment
;
12242 addend
<<= howto
->size
;
12243 addend
+= increment
;
12245 /* Should we check for overflow here ? */
12247 /* Drop any undesired bits. */
12248 addend
>>= howto
->rightshift
;
12252 contents
= (contents
& ~ howto
->dst_mask
) | (addend
& howto
->dst_mask
);
12254 bfd_put_32 (abfd
, contents
, address
);
12258 #define IS_ARM_TLS_RELOC(R_TYPE) \
12259 ((R_TYPE) == R_ARM_TLS_GD32 \
12260 || (R_TYPE) == R_ARM_TLS_LDO32 \
12261 || (R_TYPE) == R_ARM_TLS_LDM32 \
12262 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
12263 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
12264 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
12265 || (R_TYPE) == R_ARM_TLS_LE32 \
12266 || (R_TYPE) == R_ARM_TLS_IE32 \
12267 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
12269 /* Specific set of relocations for the gnu tls dialect. */
12270 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
12271 ((R_TYPE) == R_ARM_TLS_GOTDESC \
12272 || (R_TYPE) == R_ARM_TLS_CALL \
12273 || (R_TYPE) == R_ARM_THM_TLS_CALL \
12274 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
12275 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
12277 /* Relocate an ARM ELF section. */
12280 elf32_arm_relocate_section (bfd
* output_bfd
,
12281 struct bfd_link_info
* info
,
12283 asection
* input_section
,
12284 bfd_byte
* contents
,
12285 Elf_Internal_Rela
* relocs
,
12286 Elf_Internal_Sym
* local_syms
,
12287 asection
** local_sections
)
12289 Elf_Internal_Shdr
*symtab_hdr
;
12290 struct elf_link_hash_entry
**sym_hashes
;
12291 Elf_Internal_Rela
*rel
;
12292 Elf_Internal_Rela
*relend
;
12294 struct elf32_arm_link_hash_table
* globals
;
12296 globals
= elf32_arm_hash_table (info
);
12297 if (globals
== NULL
)
12300 symtab_hdr
= & elf_symtab_hdr (input_bfd
);
12301 sym_hashes
= elf_sym_hashes (input_bfd
);
12304 relend
= relocs
+ input_section
->reloc_count
;
12305 for (; rel
< relend
; rel
++)
12308 reloc_howto_type
* howto
;
12309 unsigned long r_symndx
;
12310 Elf_Internal_Sym
* sym
;
12312 struct elf_link_hash_entry
* h
;
12313 bfd_vma relocation
;
12314 bfd_reloc_status_type r
;
12317 bfd_boolean unresolved_reloc
= FALSE
;
12318 char *error_message
= NULL
;
12320 r_symndx
= ELF32_R_SYM (rel
->r_info
);
12321 r_type
= ELF32_R_TYPE (rel
->r_info
);
12322 r_type
= arm_real_reloc_type (globals
, r_type
);
12324 if ( r_type
== R_ARM_GNU_VTENTRY
12325 || r_type
== R_ARM_GNU_VTINHERIT
)
12328 howto
= bfd_reloc
.howto
= elf32_arm_howto_from_type (r_type
);
12331 return _bfd_unrecognized_reloc (input_bfd
, input_section
, r_type
);
12337 if (r_symndx
< symtab_hdr
->sh_info
)
12339 sym
= local_syms
+ r_symndx
;
12340 sym_type
= ELF32_ST_TYPE (sym
->st_info
);
12341 sec
= local_sections
[r_symndx
];
12343 /* An object file might have a reference to a local
12344 undefined symbol. This is a daft object file, but we
12345 should at least do something about it. V4BX & NONE
12346 relocations do not use the symbol and are explicitly
12347 allowed to use the undefined symbol, so allow those.
12348 Likewise for relocations against STN_UNDEF. */
12349 if (r_type
!= R_ARM_V4BX
12350 && r_type
!= R_ARM_NONE
12351 && r_symndx
!= STN_UNDEF
12352 && bfd_is_und_section (sec
)
12353 && ELF_ST_BIND (sym
->st_info
) != STB_WEAK
)
12354 (*info
->callbacks
->undefined_symbol
)
12355 (info
, bfd_elf_string_from_elf_section
12356 (input_bfd
, symtab_hdr
->sh_link
, sym
->st_name
),
12357 input_bfd
, input_section
,
12358 rel
->r_offset
, TRUE
);
12360 if (globals
->use_rel
)
12362 relocation
= (sec
->output_section
->vma
12363 + sec
->output_offset
12365 if (!bfd_link_relocatable (info
)
12366 && (sec
->flags
& SEC_MERGE
)
12367 && ELF_ST_TYPE (sym
->st_info
) == STT_SECTION
)
12370 bfd_vma addend
, value
;
12374 case R_ARM_MOVW_ABS_NC
:
12375 case R_ARM_MOVT_ABS
:
12376 value
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
);
12377 addend
= ((value
& 0xf0000) >> 4) | (value
& 0xfff);
12378 addend
= (addend
^ 0x8000) - 0x8000;
12381 case R_ARM_THM_MOVW_ABS_NC
:
12382 case R_ARM_THM_MOVT_ABS
:
12383 value
= bfd_get_16 (input_bfd
, contents
+ rel
->r_offset
)
12385 value
|= bfd_get_16 (input_bfd
,
12386 contents
+ rel
->r_offset
+ 2);
12387 addend
= ((value
& 0xf7000) >> 4) | (value
& 0xff)
12388 | ((value
& 0x04000000) >> 15);
12389 addend
= (addend
^ 0x8000) - 0x8000;
12393 if (howto
->rightshift
12394 || (howto
->src_mask
& (howto
->src_mask
+ 1)))
12397 /* xgettext:c-format */
12398 (_("%pB(%pA+%#" PRIx64
"): "
12399 "%s relocation against SEC_MERGE section"),
12400 input_bfd
, input_section
,
12401 (uint64_t) rel
->r_offset
, howto
->name
);
12405 value
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
);
12407 /* Get the (signed) value from the instruction. */
12408 addend
= value
& howto
->src_mask
;
12409 if (addend
& ((howto
->src_mask
+ 1) >> 1))
12411 bfd_signed_vma mask
;
12414 mask
&= ~ howto
->src_mask
;
12422 _bfd_elf_rel_local_sym (output_bfd
, sym
, &msec
, addend
)
12424 addend
+= msec
->output_section
->vma
+ msec
->output_offset
;
12426 /* Cases here must match those in the preceding
12427 switch statement. */
12430 case R_ARM_MOVW_ABS_NC
:
12431 case R_ARM_MOVT_ABS
:
12432 value
= (value
& 0xfff0f000) | ((addend
& 0xf000) << 4)
12433 | (addend
& 0xfff);
12434 bfd_put_32 (input_bfd
, value
, contents
+ rel
->r_offset
);
12437 case R_ARM_THM_MOVW_ABS_NC
:
12438 case R_ARM_THM_MOVT_ABS
:
12439 value
= (value
& 0xfbf08f00) | ((addend
& 0xf700) << 4)
12440 | (addend
& 0xff) | ((addend
& 0x0800) << 15);
12441 bfd_put_16 (input_bfd
, value
>> 16,
12442 contents
+ rel
->r_offset
);
12443 bfd_put_16 (input_bfd
, value
,
12444 contents
+ rel
->r_offset
+ 2);
12448 value
= (value
& ~ howto
->dst_mask
)
12449 | (addend
& howto
->dst_mask
);
12450 bfd_put_32 (input_bfd
, value
, contents
+ rel
->r_offset
);
12456 relocation
= _bfd_elf_rela_local_sym (output_bfd
, sym
, &sec
, rel
);
12460 bfd_boolean warned
, ignored
;
12462 RELOC_FOR_GLOBAL_SYMBOL (info
, input_bfd
, input_section
, rel
,
12463 r_symndx
, symtab_hdr
, sym_hashes
,
12464 h
, sec
, relocation
,
12465 unresolved_reloc
, warned
, ignored
);
12467 sym_type
= h
->type
;
12470 if (sec
!= NULL
&& discarded_section (sec
))
12471 RELOC_AGAINST_DISCARDED_SECTION (info
, input_bfd
, input_section
,
12472 rel
, 1, relend
, howto
, 0, contents
);
12474 if (bfd_link_relocatable (info
))
12476 /* This is a relocatable link. We don't have to change
12477 anything, unless the reloc is against a section symbol,
12478 in which case we have to adjust according to where the
12479 section symbol winds up in the output section. */
12480 if (sym
!= NULL
&& ELF_ST_TYPE (sym
->st_info
) == STT_SECTION
)
12482 if (globals
->use_rel
)
12483 arm_add_to_rel (input_bfd
, contents
+ rel
->r_offset
,
12484 howto
, (bfd_signed_vma
) sec
->output_offset
);
12486 rel
->r_addend
+= sec
->output_offset
;
12492 name
= h
->root
.root
.string
;
12495 name
= (bfd_elf_string_from_elf_section
12496 (input_bfd
, symtab_hdr
->sh_link
, sym
->st_name
));
12497 if (name
== NULL
|| *name
== '\0')
12498 name
= bfd_section_name (input_bfd
, sec
);
12501 if (r_symndx
!= STN_UNDEF
12502 && r_type
!= R_ARM_NONE
12504 || h
->root
.type
== bfd_link_hash_defined
12505 || h
->root
.type
== bfd_link_hash_defweak
)
12506 && IS_ARM_TLS_RELOC (r_type
) != (sym_type
== STT_TLS
))
12509 ((sym_type
== STT_TLS
12510 /* xgettext:c-format */
12511 ? _("%pB(%pA+%#" PRIx64
"): %s used with TLS symbol %s")
12512 /* xgettext:c-format */
12513 : _("%pB(%pA+%#" PRIx64
"): %s used with non-TLS symbol %s")),
12516 (uint64_t) rel
->r_offset
,
12521 /* We call elf32_arm_final_link_relocate unless we're completely
12522 done, i.e., the relaxation produced the final output we want,
12523 and we won't let anybody mess with it. Also, we have to do
12524 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
12525 both in relaxed and non-relaxed cases. */
12526 if ((elf32_arm_tls_transition (info
, r_type
, h
) != (unsigned)r_type
)
12527 || (IS_ARM_TLS_GNU_RELOC (r_type
)
12528 && !((h
? elf32_arm_hash_entry (h
)->tls_type
:
12529 elf32_arm_local_got_tls_type (input_bfd
)[r_symndx
])
12532 r
= elf32_arm_tls_relax (globals
, input_bfd
, input_section
,
12533 contents
, rel
, h
== NULL
);
12534 /* This may have been marked unresolved because it came from
12535 a shared library. But we've just dealt with that. */
12536 unresolved_reloc
= 0;
12539 r
= bfd_reloc_continue
;
12541 if (r
== bfd_reloc_continue
)
12543 unsigned char branch_type
=
12544 h
? ARM_GET_SYM_BRANCH_TYPE (h
->target_internal
)
12545 : ARM_GET_SYM_BRANCH_TYPE (sym
->st_target_internal
);
12547 r
= elf32_arm_final_link_relocate (howto
, input_bfd
, output_bfd
,
12548 input_section
, contents
, rel
,
12549 relocation
, info
, sec
, name
,
12550 sym_type
, branch_type
, h
,
12555 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
12556 because such sections are not SEC_ALLOC and thus ld.so will
12557 not process them. */
12558 if (unresolved_reloc
12559 && !((input_section
->flags
& SEC_DEBUGGING
) != 0
12561 && _bfd_elf_section_offset (output_bfd
, info
, input_section
,
12562 rel
->r_offset
) != (bfd_vma
) -1)
12565 /* xgettext:c-format */
12566 (_("%pB(%pA+%#" PRIx64
"): "
12567 "unresolvable %s relocation against symbol `%s'"),
12570 (uint64_t) rel
->r_offset
,
12572 h
->root
.root
.string
);
12576 if (r
!= bfd_reloc_ok
)
12580 case bfd_reloc_overflow
:
12581 /* If the overflowing reloc was to an undefined symbol,
12582 we have already printed one error message and there
12583 is no point complaining again. */
12584 if (!h
|| h
->root
.type
!= bfd_link_hash_undefined
)
12585 (*info
->callbacks
->reloc_overflow
)
12586 (info
, (h
? &h
->root
: NULL
), name
, howto
->name
,
12587 (bfd_vma
) 0, input_bfd
, input_section
, rel
->r_offset
);
12590 case bfd_reloc_undefined
:
12591 (*info
->callbacks
->undefined_symbol
)
12592 (info
, name
, input_bfd
, input_section
, rel
->r_offset
, TRUE
);
12595 case bfd_reloc_outofrange
:
12596 error_message
= _("out of range");
12599 case bfd_reloc_notsupported
:
12600 error_message
= _("unsupported relocation");
12603 case bfd_reloc_dangerous
:
12604 /* error_message should already be set. */
12608 error_message
= _("unknown error");
12609 /* Fall through. */
12612 BFD_ASSERT (error_message
!= NULL
);
12613 (*info
->callbacks
->reloc_dangerous
)
12614 (info
, error_message
, input_bfd
, input_section
, rel
->r_offset
);
12623 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
12624 adds the edit to the start of the list. (The list must be built in order of
12625 ascending TINDEX: the function's callers are primarily responsible for
12626 maintaining that condition). */
12629 add_unwind_table_edit (arm_unwind_table_edit
**head
,
12630 arm_unwind_table_edit
**tail
,
12631 arm_unwind_edit_type type
,
12632 asection
*linked_section
,
12633 unsigned int tindex
)
12635 arm_unwind_table_edit
*new_edit
= (arm_unwind_table_edit
*)
12636 xmalloc (sizeof (arm_unwind_table_edit
));
12638 new_edit
->type
= type
;
12639 new_edit
->linked_section
= linked_section
;
12640 new_edit
->index
= tindex
;
12644 new_edit
->next
= NULL
;
12647 (*tail
)->next
= new_edit
;
12649 (*tail
) = new_edit
;
12652 (*head
) = new_edit
;
12656 new_edit
->next
= *head
;
12665 static _arm_elf_section_data
*get_arm_elf_section_data (asection
*);
12667 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
12669 adjust_exidx_size(asection
*exidx_sec
, int adjust
)
12673 if (!exidx_sec
->rawsize
)
12674 exidx_sec
->rawsize
= exidx_sec
->size
;
12676 bfd_set_section_size (exidx_sec
->owner
, exidx_sec
, exidx_sec
->size
+ adjust
);
12677 out_sec
= exidx_sec
->output_section
;
12678 /* Adjust size of output section. */
12679 bfd_set_section_size (out_sec
->owner
, out_sec
, out_sec
->size
+adjust
);
12682 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
12684 insert_cantunwind_after(asection
*text_sec
, asection
*exidx_sec
)
12686 struct _arm_elf_section_data
*exidx_arm_data
;
12688 exidx_arm_data
= get_arm_elf_section_data (exidx_sec
);
12689 add_unwind_table_edit (
12690 &exidx_arm_data
->u
.exidx
.unwind_edit_list
,
12691 &exidx_arm_data
->u
.exidx
.unwind_edit_tail
,
12692 INSERT_EXIDX_CANTUNWIND_AT_END
, text_sec
, UINT_MAX
);
12694 exidx_arm_data
->additional_reloc_count
++;
12696 adjust_exidx_size(exidx_sec
, 8);
12699 /* Scan .ARM.exidx tables, and create a list describing edits which should be
12700 made to those tables, such that:
12702 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
12703 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
12704 codes which have been inlined into the index).
12706 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
12708 The edits are applied when the tables are written
12709 (in elf32_arm_write_section). */
12712 elf32_arm_fix_exidx_coverage (asection
**text_section_order
,
12713 unsigned int num_text_sections
,
12714 struct bfd_link_info
*info
,
12715 bfd_boolean merge_exidx_entries
)
12718 unsigned int last_second_word
= 0, i
;
12719 asection
*last_exidx_sec
= NULL
;
12720 asection
*last_text_sec
= NULL
;
12721 int last_unwind_type
= -1;
12723 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
12725 for (inp
= info
->input_bfds
; inp
!= NULL
; inp
= inp
->link
.next
)
12729 for (sec
= inp
->sections
; sec
!= NULL
; sec
= sec
->next
)
12731 struct bfd_elf_section_data
*elf_sec
= elf_section_data (sec
);
12732 Elf_Internal_Shdr
*hdr
= &elf_sec
->this_hdr
;
12734 if (!hdr
|| hdr
->sh_type
!= SHT_ARM_EXIDX
)
12737 if (elf_sec
->linked_to
)
12739 Elf_Internal_Shdr
*linked_hdr
12740 = &elf_section_data (elf_sec
->linked_to
)->this_hdr
;
12741 struct _arm_elf_section_data
*linked_sec_arm_data
12742 = get_arm_elf_section_data (linked_hdr
->bfd_section
);
12744 if (linked_sec_arm_data
== NULL
)
12747 /* Link this .ARM.exidx section back from the text section it
12749 linked_sec_arm_data
->u
.text
.arm_exidx_sec
= sec
;
12754 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
12755 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
12756 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
12758 for (i
= 0; i
< num_text_sections
; i
++)
12760 asection
*sec
= text_section_order
[i
];
12761 asection
*exidx_sec
;
12762 struct _arm_elf_section_data
*arm_data
= get_arm_elf_section_data (sec
);
12763 struct _arm_elf_section_data
*exidx_arm_data
;
12764 bfd_byte
*contents
= NULL
;
12765 int deleted_exidx_bytes
= 0;
12767 arm_unwind_table_edit
*unwind_edit_head
= NULL
;
12768 arm_unwind_table_edit
*unwind_edit_tail
= NULL
;
12769 Elf_Internal_Shdr
*hdr
;
12772 if (arm_data
== NULL
)
12775 exidx_sec
= arm_data
->u
.text
.arm_exidx_sec
;
12776 if (exidx_sec
== NULL
)
12778 /* Section has no unwind data. */
12779 if (last_unwind_type
== 0 || !last_exidx_sec
)
12782 /* Ignore zero sized sections. */
12783 if (sec
->size
== 0)
12786 insert_cantunwind_after(last_text_sec
, last_exidx_sec
);
12787 last_unwind_type
= 0;
12791 /* Skip /DISCARD/ sections. */
12792 if (bfd_is_abs_section (exidx_sec
->output_section
))
12795 hdr
= &elf_section_data (exidx_sec
)->this_hdr
;
12796 if (hdr
->sh_type
!= SHT_ARM_EXIDX
)
12799 exidx_arm_data
= get_arm_elf_section_data (exidx_sec
);
12800 if (exidx_arm_data
== NULL
)
12803 ibfd
= exidx_sec
->owner
;
12805 if (hdr
->contents
!= NULL
)
12806 contents
= hdr
->contents
;
12807 else if (! bfd_malloc_and_get_section (ibfd
, exidx_sec
, &contents
))
12811 if (last_unwind_type
> 0)
12813 unsigned int first_word
= bfd_get_32 (ibfd
, contents
);
12814 /* Add cantunwind if first unwind item does not match section
12816 if (first_word
!= sec
->vma
)
12818 insert_cantunwind_after (last_text_sec
, last_exidx_sec
);
12819 last_unwind_type
= 0;
12823 for (j
= 0; j
< hdr
->sh_size
; j
+= 8)
12825 unsigned int second_word
= bfd_get_32 (ibfd
, contents
+ j
+ 4);
12829 /* An EXIDX_CANTUNWIND entry. */
12830 if (second_word
== 1)
12832 if (last_unwind_type
== 0)
12836 /* Inlined unwinding data. Merge if equal to previous. */
12837 else if ((second_word
& 0x80000000) != 0)
12839 if (merge_exidx_entries
12840 && last_second_word
== second_word
&& last_unwind_type
== 1)
12843 last_second_word
= second_word
;
12845 /* Normal table entry. In theory we could merge these too,
12846 but duplicate entries are likely to be much less common. */
12850 if (elide
&& !bfd_link_relocatable (info
))
12852 add_unwind_table_edit (&unwind_edit_head
, &unwind_edit_tail
,
12853 DELETE_EXIDX_ENTRY
, NULL
, j
/ 8);
12855 deleted_exidx_bytes
+= 8;
12858 last_unwind_type
= unwind_type
;
12861 /* Free contents if we allocated it ourselves. */
12862 if (contents
!= hdr
->contents
)
12865 /* Record edits to be applied later (in elf32_arm_write_section). */
12866 exidx_arm_data
->u
.exidx
.unwind_edit_list
= unwind_edit_head
;
12867 exidx_arm_data
->u
.exidx
.unwind_edit_tail
= unwind_edit_tail
;
12869 if (deleted_exidx_bytes
> 0)
12870 adjust_exidx_size(exidx_sec
, -deleted_exidx_bytes
);
12872 last_exidx_sec
= exidx_sec
;
12873 last_text_sec
= sec
;
12876 /* Add terminating CANTUNWIND entry. */
12877 if (!bfd_link_relocatable (info
) && last_exidx_sec
12878 && last_unwind_type
!= 0)
12879 insert_cantunwind_after(last_text_sec
, last_exidx_sec
);
12885 elf32_arm_output_glue_section (struct bfd_link_info
*info
, bfd
*obfd
,
12886 bfd
*ibfd
, const char *name
)
12888 asection
*sec
, *osec
;
12890 sec
= bfd_get_linker_section (ibfd
, name
);
12891 if (sec
== NULL
|| (sec
->flags
& SEC_EXCLUDE
) != 0)
12894 osec
= sec
->output_section
;
12895 if (elf32_arm_write_section (obfd
, info
, sec
, sec
->contents
))
12898 if (! bfd_set_section_contents (obfd
, osec
, sec
->contents
,
12899 sec
->output_offset
, sec
->size
))
12906 elf32_arm_final_link (bfd
*abfd
, struct bfd_link_info
*info
)
12908 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (info
);
12909 asection
*sec
, *osec
;
12911 if (globals
== NULL
)
12914 /* Invoke the regular ELF backend linker to do all the work. */
12915 if (!bfd_elf_final_link (abfd
, info
))
12918 /* Process stub sections (eg BE8 encoding, ...). */
12919 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
12921 for (i
=0; i
<htab
->top_id
; i
++)
12923 sec
= htab
->stub_group
[i
].stub_sec
;
12924 /* Only process it once, in its link_sec slot. */
12925 if (sec
&& i
== htab
->stub_group
[i
].link_sec
->id
)
12927 osec
= sec
->output_section
;
12928 elf32_arm_write_section (abfd
, info
, sec
, sec
->contents
);
12929 if (! bfd_set_section_contents (abfd
, osec
, sec
->contents
,
12930 sec
->output_offset
, sec
->size
))
12935 /* Write out any glue sections now that we have created all the
12937 if (globals
->bfd_of_glue_owner
!= NULL
)
12939 if (! elf32_arm_output_glue_section (info
, abfd
,
12940 globals
->bfd_of_glue_owner
,
12941 ARM2THUMB_GLUE_SECTION_NAME
))
12944 if (! elf32_arm_output_glue_section (info
, abfd
,
12945 globals
->bfd_of_glue_owner
,
12946 THUMB2ARM_GLUE_SECTION_NAME
))
12949 if (! elf32_arm_output_glue_section (info
, abfd
,
12950 globals
->bfd_of_glue_owner
,
12951 VFP11_ERRATUM_VENEER_SECTION_NAME
))
12954 if (! elf32_arm_output_glue_section (info
, abfd
,
12955 globals
->bfd_of_glue_owner
,
12956 STM32L4XX_ERRATUM_VENEER_SECTION_NAME
))
12959 if (! elf32_arm_output_glue_section (info
, abfd
,
12960 globals
->bfd_of_glue_owner
,
12961 ARM_BX_GLUE_SECTION_NAME
))
12968 /* Return a best guess for the machine number based on the attributes. */
12970 static unsigned int
12971 bfd_arm_get_mach_from_attributes (bfd
* abfd
)
12973 int arch
= bfd_elf_get_obj_attr_int (abfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
12977 case TAG_CPU_ARCH_V4
: return bfd_mach_arm_4
;
12978 case TAG_CPU_ARCH_V4T
: return bfd_mach_arm_4T
;
12979 case TAG_CPU_ARCH_V5T
: return bfd_mach_arm_5T
;
12981 case TAG_CPU_ARCH_V5TE
:
12985 BFD_ASSERT (Tag_CPU_name
< NUM_KNOWN_OBJ_ATTRIBUTES
);
12986 name
= elf_known_obj_attributes (abfd
) [OBJ_ATTR_PROC
][Tag_CPU_name
].s
;
12990 if (strcmp (name
, "IWMMXT2") == 0)
12991 return bfd_mach_arm_iWMMXt2
;
12993 if (strcmp (name
, "IWMMXT") == 0)
12994 return bfd_mach_arm_iWMMXt
;
12996 if (strcmp (name
, "XSCALE") == 0)
13000 BFD_ASSERT (Tag_WMMX_arch
< NUM_KNOWN_OBJ_ATTRIBUTES
);
13001 wmmx
= elf_known_obj_attributes (abfd
) [OBJ_ATTR_PROC
][Tag_WMMX_arch
].i
;
13004 case 1: return bfd_mach_arm_iWMMXt
;
13005 case 2: return bfd_mach_arm_iWMMXt2
;
13006 default: return bfd_mach_arm_XScale
;
13011 return bfd_mach_arm_5TE
;
13015 return bfd_mach_arm_unknown
;
13019 /* Set the right machine number. */
13022 elf32_arm_object_p (bfd
*abfd
)
13026 mach
= bfd_arm_get_mach_from_notes (abfd
, ARM_NOTE_SECTION
);
13028 if (mach
== bfd_mach_arm_unknown
)
13030 if (elf_elfheader (abfd
)->e_flags
& EF_ARM_MAVERICK_FLOAT
)
13031 mach
= bfd_mach_arm_ep9312
;
13033 mach
= bfd_arm_get_mach_from_attributes (abfd
);
13036 bfd_default_set_arch_mach (abfd
, bfd_arch_arm
, mach
);
13040 /* Function to keep ARM specific flags in the ELF header. */
13043 elf32_arm_set_private_flags (bfd
*abfd
, flagword flags
)
13045 if (elf_flags_init (abfd
)
13046 && elf_elfheader (abfd
)->e_flags
!= flags
)
13048 if (EF_ARM_EABI_VERSION (flags
) == EF_ARM_EABI_UNKNOWN
)
13050 if (flags
& EF_ARM_INTERWORK
)
13052 (_("warning: not setting interworking flag of %pB since it has already been specified as non-interworking"),
13056 (_("warning: clearing the interworking flag of %pB due to outside request"),
13062 elf_elfheader (abfd
)->e_flags
= flags
;
13063 elf_flags_init (abfd
) = TRUE
;
13069 /* Copy backend specific data from one object module to another. */
13072 elf32_arm_copy_private_bfd_data (bfd
*ibfd
, bfd
*obfd
)
13075 flagword out_flags
;
13077 if (! is_arm_elf (ibfd
) || ! is_arm_elf (obfd
))
13080 in_flags
= elf_elfheader (ibfd
)->e_flags
;
13081 out_flags
= elf_elfheader (obfd
)->e_flags
;
13083 if (elf_flags_init (obfd
)
13084 && EF_ARM_EABI_VERSION (out_flags
) == EF_ARM_EABI_UNKNOWN
13085 && in_flags
!= out_flags
)
13087 /* Cannot mix APCS26 and APCS32 code. */
13088 if ((in_flags
& EF_ARM_APCS_26
) != (out_flags
& EF_ARM_APCS_26
))
13091 /* Cannot mix float APCS and non-float APCS code. */
13092 if ((in_flags
& EF_ARM_APCS_FLOAT
) != (out_flags
& EF_ARM_APCS_FLOAT
))
13095 /* If the src and dest have different interworking flags
13096 then turn off the interworking bit. */
13097 if ((in_flags
& EF_ARM_INTERWORK
) != (out_flags
& EF_ARM_INTERWORK
))
13099 if (out_flags
& EF_ARM_INTERWORK
)
13101 (_("warning: clearing the interworking flag of %pB because non-interworking code in %pB has been linked with it"),
13104 in_flags
&= ~EF_ARM_INTERWORK
;
13107 /* Likewise for PIC, though don't warn for this case. */
13108 if ((in_flags
& EF_ARM_PIC
) != (out_flags
& EF_ARM_PIC
))
13109 in_flags
&= ~EF_ARM_PIC
;
13112 elf_elfheader (obfd
)->e_flags
= in_flags
;
13113 elf_flags_init (obfd
) = TRUE
;
13115 return _bfd_elf_copy_private_bfd_data (ibfd
, obfd
);
13118 /* Values for Tag_ABI_PCS_R9_use. */
13127 /* Values for Tag_ABI_PCS_RW_data. */
13130 AEABI_PCS_RW_data_absolute
,
13131 AEABI_PCS_RW_data_PCrel
,
13132 AEABI_PCS_RW_data_SBrel
,
13133 AEABI_PCS_RW_data_unused
13136 /* Values for Tag_ABI_enum_size. */
13142 AEABI_enum_forced_wide
13145 /* Determine whether an object attribute tag takes an integer, a
13149 elf32_arm_obj_attrs_arg_type (int tag
)
13151 if (tag
== Tag_compatibility
)
13152 return ATTR_TYPE_FLAG_INT_VAL
| ATTR_TYPE_FLAG_STR_VAL
;
13153 else if (tag
== Tag_nodefaults
)
13154 return ATTR_TYPE_FLAG_INT_VAL
| ATTR_TYPE_FLAG_NO_DEFAULT
;
13155 else if (tag
== Tag_CPU_raw_name
|| tag
== Tag_CPU_name
)
13156 return ATTR_TYPE_FLAG_STR_VAL
;
13158 return ATTR_TYPE_FLAG_INT_VAL
;
13160 return (tag
& 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL
: ATTR_TYPE_FLAG_INT_VAL
;
13163 /* The ABI defines that Tag_conformance should be emitted first, and that
13164 Tag_nodefaults should be second (if either is defined). This sets those
13165 two positions, and bumps up the position of all the remaining tags to
13168 elf32_arm_obj_attrs_order (int num
)
13170 if (num
== LEAST_KNOWN_OBJ_ATTRIBUTE
)
13171 return Tag_conformance
;
13172 if (num
== LEAST_KNOWN_OBJ_ATTRIBUTE
+ 1)
13173 return Tag_nodefaults
;
13174 if ((num
- 2) < Tag_nodefaults
)
13176 if ((num
- 1) < Tag_conformance
)
13181 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
13183 elf32_arm_obj_attrs_handle_unknown (bfd
*abfd
, int tag
)
13185 if ((tag
& 127) < 64)
13188 (_("%pB: unknown mandatory EABI object attribute %d"),
13190 bfd_set_error (bfd_error_bad_value
);
13196 (_("warning: %pB: unknown EABI object attribute %d"),
13202 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
13203 Returns -1 if no architecture could be read. */
13206 get_secondary_compatible_arch (bfd
*abfd
)
13208 obj_attribute
*attr
=
13209 &elf_known_obj_attributes_proc (abfd
)[Tag_also_compatible_with
];
13211 /* Note: the tag and its argument below are uleb128 values, though
13212 currently-defined values fit in one byte for each. */
13214 && attr
->s
[0] == Tag_CPU_arch
13215 && (attr
->s
[1] & 128) != 128
13216 && attr
->s
[2] == 0)
13219 /* This tag is "safely ignorable", so don't complain if it looks funny. */
13223 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
13224 The tag is removed if ARCH is -1. */
13227 set_secondary_compatible_arch (bfd
*abfd
, int arch
)
13229 obj_attribute
*attr
=
13230 &elf_known_obj_attributes_proc (abfd
)[Tag_also_compatible_with
];
13238 /* Note: the tag and its argument below are uleb128 values, though
13239 currently-defined values fit in one byte for each. */
13241 attr
->s
= (char *) bfd_alloc (abfd
, 3);
13242 attr
->s
[0] = Tag_CPU_arch
;
13247 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
13251 tag_cpu_arch_combine (bfd
*ibfd
, int oldtag
, int *secondary_compat_out
,
13252 int newtag
, int secondary_compat
)
13254 #define T(X) TAG_CPU_ARCH_##X
13255 int tagl
, tagh
, result
;
13258 T(V6T2
), /* PRE_V4. */
13260 T(V6T2
), /* V4T. */
13261 T(V6T2
), /* V5T. */
13262 T(V6T2
), /* V5TE. */
13263 T(V6T2
), /* V5TEJ. */
13266 T(V6T2
) /* V6T2. */
13270 T(V6K
), /* PRE_V4. */
13274 T(V6K
), /* V5TE. */
13275 T(V6K
), /* V5TEJ. */
13277 T(V6KZ
), /* V6KZ. */
13283 T(V7
), /* PRE_V4. */
13288 T(V7
), /* V5TEJ. */
13301 T(V6K
), /* V5TE. */
13302 T(V6K
), /* V5TEJ. */
13304 T(V6KZ
), /* V6KZ. */
13308 T(V6_M
) /* V6_M. */
13310 const int v6s_m
[] =
13316 T(V6K
), /* V5TE. */
13317 T(V6K
), /* V5TEJ. */
13319 T(V6KZ
), /* V6KZ. */
13323 T(V6S_M
), /* V6_M. */
13324 T(V6S_M
) /* V6S_M. */
13326 const int v7e_m
[] =
13330 T(V7E_M
), /* V4T. */
13331 T(V7E_M
), /* V5T. */
13332 T(V7E_M
), /* V5TE. */
13333 T(V7E_M
), /* V5TEJ. */
13334 T(V7E_M
), /* V6. */
13335 T(V7E_M
), /* V6KZ. */
13336 T(V7E_M
), /* V6T2. */
13337 T(V7E_M
), /* V6K. */
13338 T(V7E_M
), /* V7. */
13339 T(V7E_M
), /* V6_M. */
13340 T(V7E_M
), /* V6S_M. */
13341 T(V7E_M
) /* V7E_M. */
13345 T(V8
), /* PRE_V4. */
13350 T(V8
), /* V5TEJ. */
13357 T(V8
), /* V6S_M. */
13358 T(V8
), /* V7E_M. */
13363 T(V8R
), /* PRE_V4. */
13367 T(V8R
), /* V5TE. */
13368 T(V8R
), /* V5TEJ. */
13370 T(V8R
), /* V6KZ. */
13371 T(V8R
), /* V6T2. */
13374 T(V8R
), /* V6_M. */
13375 T(V8R
), /* V6S_M. */
13376 T(V8R
), /* V7E_M. */
13380 const int v8m_baseline
[] =
13393 T(V8M_BASE
), /* V6_M. */
13394 T(V8M_BASE
), /* V6S_M. */
13398 T(V8M_BASE
) /* V8-M BASELINE. */
13400 const int v8m_mainline
[] =
13412 T(V8M_MAIN
), /* V7. */
13413 T(V8M_MAIN
), /* V6_M. */
13414 T(V8M_MAIN
), /* V6S_M. */
13415 T(V8M_MAIN
), /* V7E_M. */
13418 T(V8M_MAIN
), /* V8-M BASELINE. */
13419 T(V8M_MAIN
) /* V8-M MAINLINE. */
13421 const int v4t_plus_v6_m
[] =
13427 T(V5TE
), /* V5TE. */
13428 T(V5TEJ
), /* V5TEJ. */
13430 T(V6KZ
), /* V6KZ. */
13431 T(V6T2
), /* V6T2. */
13434 T(V6_M
), /* V6_M. */
13435 T(V6S_M
), /* V6S_M. */
13436 T(V7E_M
), /* V7E_M. */
13439 T(V8M_BASE
), /* V8-M BASELINE. */
13440 T(V8M_MAIN
), /* V8-M MAINLINE. */
13441 T(V4T_PLUS_V6_M
) /* V4T plus V6_M. */
13443 const int *comb
[] =
13455 /* Pseudo-architecture. */
13459 /* Check we've not got a higher architecture than we know about. */
13461 if (oldtag
> MAX_TAG_CPU_ARCH
|| newtag
> MAX_TAG_CPU_ARCH
)
13463 _bfd_error_handler (_("error: %pB: unknown CPU architecture"), ibfd
);
13467 /* Override old tag if we have a Tag_also_compatible_with on the output. */
13469 if ((oldtag
== T(V6_M
) && *secondary_compat_out
== T(V4T
))
13470 || (oldtag
== T(V4T
) && *secondary_compat_out
== T(V6_M
)))
13471 oldtag
= T(V4T_PLUS_V6_M
);
13473 /* And override the new tag if we have a Tag_also_compatible_with on the
13476 if ((newtag
== T(V6_M
) && secondary_compat
== T(V4T
))
13477 || (newtag
== T(V4T
) && secondary_compat
== T(V6_M
)))
13478 newtag
= T(V4T_PLUS_V6_M
);
13480 tagl
= (oldtag
< newtag
) ? oldtag
: newtag
;
13481 result
= tagh
= (oldtag
> newtag
) ? oldtag
: newtag
;
13483 /* Architectures before V6KZ add features monotonically. */
13484 if (tagh
<= TAG_CPU_ARCH_V6KZ
)
13487 result
= comb
[tagh
- T(V6T2
)] ? comb
[tagh
- T(V6T2
)][tagl
] : -1;
13489 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
13490 as the canonical version. */
13491 if (result
== T(V4T_PLUS_V6_M
))
13494 *secondary_compat_out
= T(V6_M
);
13497 *secondary_compat_out
= -1;
13501 _bfd_error_handler (_("error: %pB: conflicting CPU architectures %d/%d"),
13502 ibfd
, oldtag
, newtag
);
13510 /* Query attributes object to see if integer divide instructions may be
13511 present in an object. */
13513 elf32_arm_attributes_accept_div (const obj_attribute
*attr
)
13515 int arch
= attr
[Tag_CPU_arch
].i
;
13516 int profile
= attr
[Tag_CPU_arch_profile
].i
;
13518 switch (attr
[Tag_DIV_use
].i
)
13521 /* Integer divide allowed if instruction contained in archetecture. */
13522 if (arch
== TAG_CPU_ARCH_V7
&& (profile
== 'R' || profile
== 'M'))
13524 else if (arch
>= TAG_CPU_ARCH_V7E_M
)
13530 /* Integer divide explicitly prohibited. */
13534 /* Unrecognised case - treat as allowing divide everywhere. */
13536 /* Integer divide allowed in ARM state. */
13541 /* Query attributes object to see if integer divide instructions are
13542 forbidden to be in the object. This is not the inverse of
13543 elf32_arm_attributes_accept_div. */
13545 elf32_arm_attributes_forbid_div (const obj_attribute
*attr
)
13547 return attr
[Tag_DIV_use
].i
== 1;
13550 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
13551 are conflicting attributes. */
13554 elf32_arm_merge_eabi_attributes (bfd
*ibfd
, struct bfd_link_info
*info
)
13556 bfd
*obfd
= info
->output_bfd
;
13557 obj_attribute
*in_attr
;
13558 obj_attribute
*out_attr
;
13559 /* Some tags have 0 = don't care, 1 = strong requirement,
13560 2 = weak requirement. */
13561 static const int order_021
[3] = {0, 2, 1};
13563 bfd_boolean result
= TRUE
;
13564 const char *sec_name
= get_elf_backend_data (ibfd
)->obj_attrs_section
;
13566 /* Skip the linker stubs file. This preserves previous behavior
13567 of accepting unknown attributes in the first input file - but
13569 if (ibfd
->flags
& BFD_LINKER_CREATED
)
13572 /* Skip any input that hasn't attribute section.
13573 This enables to link object files without attribute section with
13575 if (bfd_get_section_by_name (ibfd
, sec_name
) == NULL
)
13578 if (!elf_known_obj_attributes_proc (obfd
)[0].i
)
13580 /* This is the first object. Copy the attributes. */
13581 _bfd_elf_copy_obj_attributes (ibfd
, obfd
);
13583 out_attr
= elf_known_obj_attributes_proc (obfd
);
13585 /* Use the Tag_null value to indicate the attributes have been
13589 /* We do not output objects with Tag_MPextension_use_legacy - we move
13590 the attribute's value to Tag_MPextension_use. */
13591 if (out_attr
[Tag_MPextension_use_legacy
].i
!= 0)
13593 if (out_attr
[Tag_MPextension_use
].i
!= 0
13594 && out_attr
[Tag_MPextension_use_legacy
].i
13595 != out_attr
[Tag_MPextension_use
].i
)
13598 (_("Error: %pB has both the current and legacy "
13599 "Tag_MPextension_use attributes"), ibfd
);
13603 out_attr
[Tag_MPextension_use
] =
13604 out_attr
[Tag_MPextension_use_legacy
];
13605 out_attr
[Tag_MPextension_use_legacy
].type
= 0;
13606 out_attr
[Tag_MPextension_use_legacy
].i
= 0;
13612 in_attr
= elf_known_obj_attributes_proc (ibfd
);
13613 out_attr
= elf_known_obj_attributes_proc (obfd
);
13614 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
13615 if (in_attr
[Tag_ABI_VFP_args
].i
!= out_attr
[Tag_ABI_VFP_args
].i
)
13617 /* Ignore mismatches if the object doesn't use floating point or is
13618 floating point ABI independent. */
13619 if (out_attr
[Tag_ABI_FP_number_model
].i
== AEABI_FP_number_model_none
13620 || (in_attr
[Tag_ABI_FP_number_model
].i
!= AEABI_FP_number_model_none
13621 && out_attr
[Tag_ABI_VFP_args
].i
== AEABI_VFP_args_compatible
))
13622 out_attr
[Tag_ABI_VFP_args
].i
= in_attr
[Tag_ABI_VFP_args
].i
;
13623 else if (in_attr
[Tag_ABI_FP_number_model
].i
!= AEABI_FP_number_model_none
13624 && in_attr
[Tag_ABI_VFP_args
].i
!= AEABI_VFP_args_compatible
)
13627 (_("error: %pB uses VFP register arguments, %pB does not"),
13628 in_attr
[Tag_ABI_VFP_args
].i
? ibfd
: obfd
,
13629 in_attr
[Tag_ABI_VFP_args
].i
? obfd
: ibfd
);
13634 for (i
= LEAST_KNOWN_OBJ_ATTRIBUTE
; i
< NUM_KNOWN_OBJ_ATTRIBUTES
; i
++)
13636 /* Merge this attribute with existing attributes. */
13639 case Tag_CPU_raw_name
:
13641 /* These are merged after Tag_CPU_arch. */
13644 case Tag_ABI_optimization_goals
:
13645 case Tag_ABI_FP_optimization_goals
:
13646 /* Use the first value seen. */
13651 int secondary_compat
= -1, secondary_compat_out
= -1;
13652 unsigned int saved_out_attr
= out_attr
[i
].i
;
13654 static const char *name_table
[] =
13656 /* These aren't real CPU names, but we can't guess
13657 that from the architecture version alone. */
13673 "ARM v8-M.baseline",
13674 "ARM v8-M.mainline",
13677 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
13678 secondary_compat
= get_secondary_compatible_arch (ibfd
);
13679 secondary_compat_out
= get_secondary_compatible_arch (obfd
);
13680 arch_attr
= tag_cpu_arch_combine (ibfd
, out_attr
[i
].i
,
13681 &secondary_compat_out
,
13685 /* Return with error if failed to merge. */
13686 if (arch_attr
== -1)
13689 out_attr
[i
].i
= arch_attr
;
13691 set_secondary_compatible_arch (obfd
, secondary_compat_out
);
13693 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
13694 if (out_attr
[i
].i
== saved_out_attr
)
13695 ; /* Leave the names alone. */
13696 else if (out_attr
[i
].i
== in_attr
[i
].i
)
13698 /* The output architecture has been changed to match the
13699 input architecture. Use the input names. */
13700 out_attr
[Tag_CPU_name
].s
= in_attr
[Tag_CPU_name
].s
13701 ? _bfd_elf_attr_strdup (obfd
, in_attr
[Tag_CPU_name
].s
)
13703 out_attr
[Tag_CPU_raw_name
].s
= in_attr
[Tag_CPU_raw_name
].s
13704 ? _bfd_elf_attr_strdup (obfd
, in_attr
[Tag_CPU_raw_name
].s
)
13709 out_attr
[Tag_CPU_name
].s
= NULL
;
13710 out_attr
[Tag_CPU_raw_name
].s
= NULL
;
13713 /* If we still don't have a value for Tag_CPU_name,
13714 make one up now. Tag_CPU_raw_name remains blank. */
13715 if (out_attr
[Tag_CPU_name
].s
== NULL
13716 && out_attr
[i
].i
< ARRAY_SIZE (name_table
))
13717 out_attr
[Tag_CPU_name
].s
=
13718 _bfd_elf_attr_strdup (obfd
, name_table
[out_attr
[i
].i
]);
13722 case Tag_ARM_ISA_use
:
13723 case Tag_THUMB_ISA_use
:
13724 case Tag_WMMX_arch
:
13725 case Tag_Advanced_SIMD_arch
:
13726 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
13727 case Tag_ABI_FP_rounding
:
13728 case Tag_ABI_FP_exceptions
:
13729 case Tag_ABI_FP_user_exceptions
:
13730 case Tag_ABI_FP_number_model
:
13731 case Tag_FP_HP_extension
:
13732 case Tag_CPU_unaligned_access
:
13734 case Tag_MPextension_use
:
13735 /* Use the largest value specified. */
13736 if (in_attr
[i
].i
> out_attr
[i
].i
)
13737 out_attr
[i
].i
= in_attr
[i
].i
;
13740 case Tag_ABI_align_preserved
:
13741 case Tag_ABI_PCS_RO_data
:
13742 /* Use the smallest value specified. */
13743 if (in_attr
[i
].i
< out_attr
[i
].i
)
13744 out_attr
[i
].i
= in_attr
[i
].i
;
13747 case Tag_ABI_align_needed
:
13748 if ((in_attr
[i
].i
> 0 || out_attr
[i
].i
> 0)
13749 && (in_attr
[Tag_ABI_align_preserved
].i
== 0
13750 || out_attr
[Tag_ABI_align_preserved
].i
== 0))
13752 /* This error message should be enabled once all non-conformant
13753 binaries in the toolchain have had the attributes set
13756 (_("error: %pB: 8-byte data alignment conflicts with %pB"),
13760 /* Fall through. */
13761 case Tag_ABI_FP_denormal
:
13762 case Tag_ABI_PCS_GOT_use
:
13763 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
13764 value if greater than 2 (for future-proofing). */
13765 if ((in_attr
[i
].i
> 2 && in_attr
[i
].i
> out_attr
[i
].i
)
13766 || (in_attr
[i
].i
<= 2 && out_attr
[i
].i
<= 2
13767 && order_021
[in_attr
[i
].i
] > order_021
[out_attr
[i
].i
]))
13768 out_attr
[i
].i
= in_attr
[i
].i
;
13771 case Tag_Virtualization_use
:
13772 /* The virtualization tag effectively stores two bits of
13773 information: the intended use of TrustZone (in bit 0), and the
13774 intended use of Virtualization (in bit 1). */
13775 if (out_attr
[i
].i
== 0)
13776 out_attr
[i
].i
= in_attr
[i
].i
;
13777 else if (in_attr
[i
].i
!= 0
13778 && in_attr
[i
].i
!= out_attr
[i
].i
)
13780 if (in_attr
[i
].i
<= 3 && out_attr
[i
].i
<= 3)
13785 (_("error: %pB: unable to merge virtualization attributes "
13793 case Tag_CPU_arch_profile
:
13794 if (out_attr
[i
].i
!= in_attr
[i
].i
)
13796 /* 0 will merge with anything.
13797 'A' and 'S' merge to 'A'.
13798 'R' and 'S' merge to 'R'.
13799 'M' and 'A|R|S' is an error. */
13800 if (out_attr
[i
].i
== 0
13801 || (out_attr
[i
].i
== 'S'
13802 && (in_attr
[i
].i
== 'A' || in_attr
[i
].i
== 'R')))
13803 out_attr
[i
].i
= in_attr
[i
].i
;
13804 else if (in_attr
[i
].i
== 0
13805 || (in_attr
[i
].i
== 'S'
13806 && (out_attr
[i
].i
== 'A' || out_attr
[i
].i
== 'R')))
13807 ; /* Do nothing. */
13811 (_("error: %pB: conflicting architecture profiles %c/%c"),
13813 in_attr
[i
].i
? in_attr
[i
].i
: '0',
13814 out_attr
[i
].i
? out_attr
[i
].i
: '0');
13820 case Tag_DSP_extension
:
13821 /* No need to change output value if any of:
13822 - pre (<=) ARMv5T input architecture (do not have DSP)
13823 - M input profile not ARMv7E-M and do not have DSP. */
13824 if (in_attr
[Tag_CPU_arch
].i
<= 3
13825 || (in_attr
[Tag_CPU_arch_profile
].i
== 'M'
13826 && in_attr
[Tag_CPU_arch
].i
!= 13
13827 && in_attr
[i
].i
== 0))
13828 ; /* Do nothing. */
13829 /* Output value should be 0 if DSP part of architecture, ie.
13830 - post (>=) ARMv5te architecture output
13831 - A, R or S profile output or ARMv7E-M output architecture. */
13832 else if (out_attr
[Tag_CPU_arch
].i
>= 4
13833 && (out_attr
[Tag_CPU_arch_profile
].i
== 'A'
13834 || out_attr
[Tag_CPU_arch_profile
].i
== 'R'
13835 || out_attr
[Tag_CPU_arch_profile
].i
== 'S'
13836 || out_attr
[Tag_CPU_arch
].i
== 13))
13838 /* Otherwise, DSP instructions are added and not part of output
13846 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
13847 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
13848 when it's 0. It might mean absence of FP hardware if
13849 Tag_FP_arch is zero. */
13851 #define VFP_VERSION_COUNT 9
13852 static const struct
13856 } vfp_versions
[VFP_VERSION_COUNT
] =
13872 /* If the output has no requirement about FP hardware,
13873 follow the requirement of the input. */
13874 if (out_attr
[i
].i
== 0)
13876 /* This assert is still reasonable, we shouldn't
13877 produce the suspicious build attribute
13878 combination (See below for in_attr). */
13879 BFD_ASSERT (out_attr
[Tag_ABI_HardFP_use
].i
== 0);
13880 out_attr
[i
].i
= in_attr
[i
].i
;
13881 out_attr
[Tag_ABI_HardFP_use
].i
13882 = in_attr
[Tag_ABI_HardFP_use
].i
;
13885 /* If the input has no requirement about FP hardware, do
13887 else if (in_attr
[i
].i
== 0)
13889 /* We used to assert that Tag_ABI_HardFP_use was
13890 zero here, but we should never assert when
13891 consuming an object file that has suspicious
13892 build attributes. The single precision variant
13893 of 'no FP architecture' is still 'no FP
13894 architecture', so we just ignore the tag in this
13899 /* Both the input and the output have nonzero Tag_FP_arch.
13900 So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */
13902 /* If both the input and the output have zero Tag_ABI_HardFP_use,
13904 if (in_attr
[Tag_ABI_HardFP_use
].i
== 0
13905 && out_attr
[Tag_ABI_HardFP_use
].i
== 0)
13907 /* If the input and the output have different Tag_ABI_HardFP_use,
13908 the combination of them is 0 (implied by Tag_FP_arch). */
13909 else if (in_attr
[Tag_ABI_HardFP_use
].i
13910 != out_attr
[Tag_ABI_HardFP_use
].i
)
13911 out_attr
[Tag_ABI_HardFP_use
].i
= 0;
13913 /* Now we can handle Tag_FP_arch. */
13915 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
13916 pick the biggest. */
13917 if (in_attr
[i
].i
>= VFP_VERSION_COUNT
13918 && in_attr
[i
].i
> out_attr
[i
].i
)
13920 out_attr
[i
] = in_attr
[i
];
13923 /* The output uses the superset of input features
13924 (ISA version) and registers. */
13925 ver
= vfp_versions
[in_attr
[i
].i
].ver
;
13926 if (ver
< vfp_versions
[out_attr
[i
].i
].ver
)
13927 ver
= vfp_versions
[out_attr
[i
].i
].ver
;
13928 regs
= vfp_versions
[in_attr
[i
].i
].regs
;
13929 if (regs
< vfp_versions
[out_attr
[i
].i
].regs
)
13930 regs
= vfp_versions
[out_attr
[i
].i
].regs
;
13931 /* This assumes all possible supersets are also a valid
13933 for (newval
= VFP_VERSION_COUNT
- 1; newval
> 0; newval
--)
13935 if (regs
== vfp_versions
[newval
].regs
13936 && ver
== vfp_versions
[newval
].ver
)
13939 out_attr
[i
].i
= newval
;
13942 case Tag_PCS_config
:
13943 if (out_attr
[i
].i
== 0)
13944 out_attr
[i
].i
= in_attr
[i
].i
;
13945 else if (in_attr
[i
].i
!= 0 && out_attr
[i
].i
!= in_attr
[i
].i
)
13947 /* It's sometimes ok to mix different configs, so this is only
13950 (_("warning: %pB: conflicting platform configuration"), ibfd
);
13953 case Tag_ABI_PCS_R9_use
:
13954 if (in_attr
[i
].i
!= out_attr
[i
].i
13955 && out_attr
[i
].i
!= AEABI_R9_unused
13956 && in_attr
[i
].i
!= AEABI_R9_unused
)
13959 (_("error: %pB: conflicting use of R9"), ibfd
);
13962 if (out_attr
[i
].i
== AEABI_R9_unused
)
13963 out_attr
[i
].i
= in_attr
[i
].i
;
13965 case Tag_ABI_PCS_RW_data
:
13966 if (in_attr
[i
].i
== AEABI_PCS_RW_data_SBrel
13967 && out_attr
[Tag_ABI_PCS_R9_use
].i
!= AEABI_R9_SB
13968 && out_attr
[Tag_ABI_PCS_R9_use
].i
!= AEABI_R9_unused
)
13971 (_("error: %pB: SB relative addressing conflicts with use of R9"),
13975 /* Use the smallest value specified. */
13976 if (in_attr
[i
].i
< out_attr
[i
].i
)
13977 out_attr
[i
].i
= in_attr
[i
].i
;
13979 case Tag_ABI_PCS_wchar_t
:
13980 if (out_attr
[i
].i
&& in_attr
[i
].i
&& out_attr
[i
].i
!= in_attr
[i
].i
13981 && !elf_arm_tdata (obfd
)->no_wchar_size_warning
)
13984 (_("warning: %pB uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
13985 ibfd
, in_attr
[i
].i
, out_attr
[i
].i
);
13987 else if (in_attr
[i
].i
&& !out_attr
[i
].i
)
13988 out_attr
[i
].i
= in_attr
[i
].i
;
13990 case Tag_ABI_enum_size
:
13991 if (in_attr
[i
].i
!= AEABI_enum_unused
)
13993 if (out_attr
[i
].i
== AEABI_enum_unused
13994 || out_attr
[i
].i
== AEABI_enum_forced_wide
)
13996 /* The existing object is compatible with anything.
13997 Use whatever requirements the new object has. */
13998 out_attr
[i
].i
= in_attr
[i
].i
;
14000 else if (in_attr
[i
].i
!= AEABI_enum_forced_wide
14001 && out_attr
[i
].i
!= in_attr
[i
].i
14002 && !elf_arm_tdata (obfd
)->no_enum_size_warning
)
14004 static const char *aeabi_enum_names
[] =
14005 { "", "variable-size", "32-bit", "" };
14006 const char *in_name
=
14007 in_attr
[i
].i
< ARRAY_SIZE(aeabi_enum_names
)
14008 ? aeabi_enum_names
[in_attr
[i
].i
]
14010 const char *out_name
=
14011 out_attr
[i
].i
< ARRAY_SIZE(aeabi_enum_names
)
14012 ? aeabi_enum_names
[out_attr
[i
].i
]
14015 (_("warning: %pB uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
14016 ibfd
, in_name
, out_name
);
14020 case Tag_ABI_VFP_args
:
14023 case Tag_ABI_WMMX_args
:
14024 if (in_attr
[i
].i
!= out_attr
[i
].i
)
14027 (_("error: %pB uses iWMMXt register arguments, %pB does not"),
14032 case Tag_compatibility
:
14033 /* Merged in target-independent code. */
14035 case Tag_ABI_HardFP_use
:
14036 /* This is handled along with Tag_FP_arch. */
14038 case Tag_ABI_FP_16bit_format
:
14039 if (in_attr
[i
].i
!= 0 && out_attr
[i
].i
!= 0)
14041 if (in_attr
[i
].i
!= out_attr
[i
].i
)
14044 (_("error: fp16 format mismatch between %pB and %pB"),
14049 if (in_attr
[i
].i
!= 0)
14050 out_attr
[i
].i
= in_attr
[i
].i
;
14054 /* A value of zero on input means that the divide instruction may
14055 be used if available in the base architecture as specified via
14056 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
14057 the user did not want divide instructions. A value of 2
14058 explicitly means that divide instructions were allowed in ARM
14059 and Thumb state. */
14060 if (in_attr
[i
].i
== out_attr
[i
].i
)
14061 /* Do nothing. */ ;
14062 else if (elf32_arm_attributes_forbid_div (in_attr
)
14063 && !elf32_arm_attributes_accept_div (out_attr
))
14065 else if (elf32_arm_attributes_forbid_div (out_attr
)
14066 && elf32_arm_attributes_accept_div (in_attr
))
14067 out_attr
[i
].i
= in_attr
[i
].i
;
14068 else if (in_attr
[i
].i
== 2)
14069 out_attr
[i
].i
= in_attr
[i
].i
;
14072 case Tag_MPextension_use_legacy
:
14073 /* We don't output objects with Tag_MPextension_use_legacy - we
14074 move the value to Tag_MPextension_use. */
14075 if (in_attr
[i
].i
!= 0 && in_attr
[Tag_MPextension_use
].i
!= 0)
14077 if (in_attr
[Tag_MPextension_use
].i
!= in_attr
[i
].i
)
14080 (_("%pB has both the current and legacy "
14081 "Tag_MPextension_use attributes"),
14087 if (in_attr
[i
].i
> out_attr
[Tag_MPextension_use
].i
)
14088 out_attr
[Tag_MPextension_use
] = in_attr
[i
];
14092 case Tag_nodefaults
:
14093 /* This tag is set if it exists, but the value is unused (and is
14094 typically zero). We don't actually need to do anything here -
14095 the merge happens automatically when the type flags are merged
14098 case Tag_also_compatible_with
:
14099 /* Already done in Tag_CPU_arch. */
14101 case Tag_conformance
:
14102 /* Keep the attribute if it matches. Throw it away otherwise.
14103 No attribute means no claim to conform. */
14104 if (!in_attr
[i
].s
|| !out_attr
[i
].s
14105 || strcmp (in_attr
[i
].s
, out_attr
[i
].s
) != 0)
14106 out_attr
[i
].s
= NULL
;
14111 = result
&& _bfd_elf_merge_unknown_attribute_low (ibfd
, obfd
, i
);
14114 /* If out_attr was copied from in_attr then it won't have a type yet. */
14115 if (in_attr
[i
].type
&& !out_attr
[i
].type
)
14116 out_attr
[i
].type
= in_attr
[i
].type
;
14119 /* Merge Tag_compatibility attributes and any common GNU ones. */
14120 if (!_bfd_elf_merge_object_attributes (ibfd
, info
))
14123 /* Check for any attributes not known on ARM. */
14124 result
&= _bfd_elf_merge_unknown_attribute_list (ibfd
, obfd
);
14130 /* Return TRUE if the two EABI versions are incompatible. */
14133 elf32_arm_versions_compatible (unsigned iver
, unsigned over
)
14135 /* v4 and v5 are the same spec before and after it was released,
14136 so allow mixing them. */
14137 if ((iver
== EF_ARM_EABI_VER4
&& over
== EF_ARM_EABI_VER5
)
14138 || (iver
== EF_ARM_EABI_VER5
&& over
== EF_ARM_EABI_VER4
))
14141 return (iver
== over
);
14144 /* Merge backend specific data from an object file to the output
14145 object file when linking. */
14148 elf32_arm_merge_private_bfd_data (bfd
*, struct bfd_link_info
*);
14150 /* Display the flags field. */
14153 elf32_arm_print_private_bfd_data (bfd
*abfd
, void * ptr
)
14155 FILE * file
= (FILE *) ptr
;
14156 unsigned long flags
;
14158 BFD_ASSERT (abfd
!= NULL
&& ptr
!= NULL
);
14160 /* Print normal ELF private data. */
14161 _bfd_elf_print_private_bfd_data (abfd
, ptr
);
14163 flags
= elf_elfheader (abfd
)->e_flags
;
14164 /* Ignore init flag - it may not be set, despite the flags field
14165 containing valid data. */
14167 fprintf (file
, _("private flags = %lx:"), elf_elfheader (abfd
)->e_flags
);
14169 switch (EF_ARM_EABI_VERSION (flags
))
14171 case EF_ARM_EABI_UNKNOWN
:
14172 /* The following flag bits are GNU extensions and not part of the
14173 official ARM ELF extended ABI. Hence they are only decoded if
14174 the EABI version is not set. */
14175 if (flags
& EF_ARM_INTERWORK
)
14176 fprintf (file
, _(" [interworking enabled]"));
14178 if (flags
& EF_ARM_APCS_26
)
14179 fprintf (file
, " [APCS-26]");
14181 fprintf (file
, " [APCS-32]");
14183 if (flags
& EF_ARM_VFP_FLOAT
)
14184 fprintf (file
, _(" [VFP float format]"));
14185 else if (flags
& EF_ARM_MAVERICK_FLOAT
)
14186 fprintf (file
, _(" [Maverick float format]"));
14188 fprintf (file
, _(" [FPA float format]"));
14190 if (flags
& EF_ARM_APCS_FLOAT
)
14191 fprintf (file
, _(" [floats passed in float registers]"));
14193 if (flags
& EF_ARM_PIC
)
14194 fprintf (file
, _(" [position independent]"));
14196 if (flags
& EF_ARM_NEW_ABI
)
14197 fprintf (file
, _(" [new ABI]"));
14199 if (flags
& EF_ARM_OLD_ABI
)
14200 fprintf (file
, _(" [old ABI]"));
14202 if (flags
& EF_ARM_SOFT_FLOAT
)
14203 fprintf (file
, _(" [software FP]"));
14205 flags
&= ~(EF_ARM_INTERWORK
| EF_ARM_APCS_26
| EF_ARM_APCS_FLOAT
14206 | EF_ARM_PIC
| EF_ARM_NEW_ABI
| EF_ARM_OLD_ABI
14207 | EF_ARM_SOFT_FLOAT
| EF_ARM_VFP_FLOAT
14208 | EF_ARM_MAVERICK_FLOAT
);
14211 case EF_ARM_EABI_VER1
:
14212 fprintf (file
, _(" [Version1 EABI]"));
14214 if (flags
& EF_ARM_SYMSARESORTED
)
14215 fprintf (file
, _(" [sorted symbol table]"));
14217 fprintf (file
, _(" [unsorted symbol table]"));
14219 flags
&= ~ EF_ARM_SYMSARESORTED
;
14222 case EF_ARM_EABI_VER2
:
14223 fprintf (file
, _(" [Version2 EABI]"));
14225 if (flags
& EF_ARM_SYMSARESORTED
)
14226 fprintf (file
, _(" [sorted symbol table]"));
14228 fprintf (file
, _(" [unsorted symbol table]"));
14230 if (flags
& EF_ARM_DYNSYMSUSESEGIDX
)
14231 fprintf (file
, _(" [dynamic symbols use segment index]"));
14233 if (flags
& EF_ARM_MAPSYMSFIRST
)
14234 fprintf (file
, _(" [mapping symbols precede others]"));
14236 flags
&= ~(EF_ARM_SYMSARESORTED
| EF_ARM_DYNSYMSUSESEGIDX
14237 | EF_ARM_MAPSYMSFIRST
);
14240 case EF_ARM_EABI_VER3
:
14241 fprintf (file
, _(" [Version3 EABI]"));
14244 case EF_ARM_EABI_VER4
:
14245 fprintf (file
, _(" [Version4 EABI]"));
14248 case EF_ARM_EABI_VER5
:
14249 fprintf (file
, _(" [Version5 EABI]"));
14251 if (flags
& EF_ARM_ABI_FLOAT_SOFT
)
14252 fprintf (file
, _(" [soft-float ABI]"));
14254 if (flags
& EF_ARM_ABI_FLOAT_HARD
)
14255 fprintf (file
, _(" [hard-float ABI]"));
14257 flags
&= ~(EF_ARM_ABI_FLOAT_SOFT
| EF_ARM_ABI_FLOAT_HARD
);
14260 if (flags
& EF_ARM_BE8
)
14261 fprintf (file
, _(" [BE8]"));
14263 if (flags
& EF_ARM_LE8
)
14264 fprintf (file
, _(" [LE8]"));
14266 flags
&= ~(EF_ARM_LE8
| EF_ARM_BE8
);
14270 fprintf (file
, _(" <EABI version unrecognised>"));
14274 flags
&= ~ EF_ARM_EABIMASK
;
14276 if (flags
& EF_ARM_RELEXEC
)
14277 fprintf (file
, _(" [relocatable executable]"));
14279 flags
&= ~EF_ARM_RELEXEC
;
14282 fprintf (file
, _("<Unrecognised flag bits set>"));
14284 fputc ('\n', file
);
14290 elf32_arm_get_symbol_type (Elf_Internal_Sym
* elf_sym
, int type
)
14292 switch (ELF_ST_TYPE (elf_sym
->st_info
))
14294 case STT_ARM_TFUNC
:
14295 return ELF_ST_TYPE (elf_sym
->st_info
);
14297 case STT_ARM_16BIT
:
14298 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
14299 This allows us to distinguish between data used by Thumb instructions
14300 and non-data (which is probably code) inside Thumb regions of an
14302 if (type
!= STT_OBJECT
&& type
!= STT_TLS
)
14303 return ELF_ST_TYPE (elf_sym
->st_info
);
14314 elf32_arm_gc_mark_hook (asection
*sec
,
14315 struct bfd_link_info
*info
,
14316 Elf_Internal_Rela
*rel
,
14317 struct elf_link_hash_entry
*h
,
14318 Elf_Internal_Sym
*sym
)
14321 switch (ELF32_R_TYPE (rel
->r_info
))
14323 case R_ARM_GNU_VTINHERIT
:
14324 case R_ARM_GNU_VTENTRY
:
14328 return _bfd_elf_gc_mark_hook (sec
, info
, rel
, h
, sym
);
14331 /* Look through the relocs for a section during the first phase. */
14334 elf32_arm_check_relocs (bfd
*abfd
, struct bfd_link_info
*info
,
14335 asection
*sec
, const Elf_Internal_Rela
*relocs
)
14337 Elf_Internal_Shdr
*symtab_hdr
;
14338 struct elf_link_hash_entry
**sym_hashes
;
14339 const Elf_Internal_Rela
*rel
;
14340 const Elf_Internal_Rela
*rel_end
;
14343 struct elf32_arm_link_hash_table
*htab
;
14344 bfd_boolean call_reloc_p
;
14345 bfd_boolean may_become_dynamic_p
;
14346 bfd_boolean may_need_local_target_p
;
14347 unsigned long nsyms
;
14349 if (bfd_link_relocatable (info
))
14352 BFD_ASSERT (is_arm_elf (abfd
));
14354 htab
= elf32_arm_hash_table (info
);
14360 /* Create dynamic sections for relocatable executables so that we can
14361 copy relocations. */
14362 if (htab
->root
.is_relocatable_executable
14363 && ! htab
->root
.dynamic_sections_created
)
14365 if (! _bfd_elf_link_create_dynamic_sections (abfd
, info
))
14369 if (htab
->root
.dynobj
== NULL
)
14370 htab
->root
.dynobj
= abfd
;
14371 if (!create_ifunc_sections (info
))
14374 dynobj
= htab
->root
.dynobj
;
14376 symtab_hdr
= & elf_symtab_hdr (abfd
);
14377 sym_hashes
= elf_sym_hashes (abfd
);
14378 nsyms
= NUM_SHDR_ENTRIES (symtab_hdr
);
14380 rel_end
= relocs
+ sec
->reloc_count
;
14381 for (rel
= relocs
; rel
< rel_end
; rel
++)
14383 Elf_Internal_Sym
*isym
;
14384 struct elf_link_hash_entry
*h
;
14385 struct elf32_arm_link_hash_entry
*eh
;
14386 unsigned int r_symndx
;
14389 r_symndx
= ELF32_R_SYM (rel
->r_info
);
14390 r_type
= ELF32_R_TYPE (rel
->r_info
);
14391 r_type
= arm_real_reloc_type (htab
, r_type
);
14393 if (r_symndx
>= nsyms
14394 /* PR 9934: It is possible to have relocations that do not
14395 refer to symbols, thus it is also possible to have an
14396 object file containing relocations but no symbol table. */
14397 && (r_symndx
> STN_UNDEF
|| nsyms
> 0))
14399 _bfd_error_handler (_("%pB: bad symbol index: %d"), abfd
,
14408 if (r_symndx
< symtab_hdr
->sh_info
)
14410 /* A local symbol. */
14411 isym
= bfd_sym_from_r_symndx (&htab
->sym_cache
,
14418 h
= sym_hashes
[r_symndx
- symtab_hdr
->sh_info
];
14419 while (h
->root
.type
== bfd_link_hash_indirect
14420 || h
->root
.type
== bfd_link_hash_warning
)
14421 h
= (struct elf_link_hash_entry
*) h
->root
.u
.i
.link
;
14425 eh
= (struct elf32_arm_link_hash_entry
*) h
;
14427 call_reloc_p
= FALSE
;
14428 may_become_dynamic_p
= FALSE
;
14429 may_need_local_target_p
= FALSE
;
14431 /* Could be done earlier, if h were already available. */
14432 r_type
= elf32_arm_tls_transition (info
, r_type
, h
);
14436 case R_ARM_GOT_PREL
:
14437 case R_ARM_TLS_GD32
:
14438 case R_ARM_TLS_IE32
:
14439 case R_ARM_TLS_GOTDESC
:
14440 case R_ARM_TLS_DESCSEQ
:
14441 case R_ARM_THM_TLS_DESCSEQ
:
14442 case R_ARM_TLS_CALL
:
14443 case R_ARM_THM_TLS_CALL
:
14444 /* This symbol requires a global offset table entry. */
14446 int tls_type
, old_tls_type
;
14450 case R_ARM_TLS_GD32
: tls_type
= GOT_TLS_GD
; break;
14452 case R_ARM_TLS_IE32
: tls_type
= GOT_TLS_IE
; break;
14454 case R_ARM_TLS_GOTDESC
:
14455 case R_ARM_TLS_CALL
: case R_ARM_THM_TLS_CALL
:
14456 case R_ARM_TLS_DESCSEQ
: case R_ARM_THM_TLS_DESCSEQ
:
14457 tls_type
= GOT_TLS_GDESC
; break;
14459 default: tls_type
= GOT_NORMAL
; break;
14462 if (!bfd_link_executable (info
) && (tls_type
& GOT_TLS_IE
))
14463 info
->flags
|= DF_STATIC_TLS
;
14468 old_tls_type
= elf32_arm_hash_entry (h
)->tls_type
;
14472 /* This is a global offset table entry for a local symbol. */
14473 if (!elf32_arm_allocate_local_sym_info (abfd
))
14475 elf_local_got_refcounts (abfd
)[r_symndx
] += 1;
14476 old_tls_type
= elf32_arm_local_got_tls_type (abfd
) [r_symndx
];
14479 /* If a variable is accessed with both tls methods, two
14480 slots may be created. */
14481 if (GOT_TLS_GD_ANY_P (old_tls_type
)
14482 && GOT_TLS_GD_ANY_P (tls_type
))
14483 tls_type
|= old_tls_type
;
14485 /* We will already have issued an error message if there
14486 is a TLS/non-TLS mismatch, based on the symbol
14487 type. So just combine any TLS types needed. */
14488 if (old_tls_type
!= GOT_UNKNOWN
&& old_tls_type
!= GOT_NORMAL
14489 && tls_type
!= GOT_NORMAL
)
14490 tls_type
|= old_tls_type
;
14492 /* If the symbol is accessed in both IE and GDESC
14493 method, we're able to relax. Turn off the GDESC flag,
14494 without messing up with any other kind of tls types
14495 that may be involved. */
14496 if ((tls_type
& GOT_TLS_IE
) && (tls_type
& GOT_TLS_GDESC
))
14497 tls_type
&= ~GOT_TLS_GDESC
;
14499 if (old_tls_type
!= tls_type
)
14502 elf32_arm_hash_entry (h
)->tls_type
= tls_type
;
14504 elf32_arm_local_got_tls_type (abfd
) [r_symndx
] = tls_type
;
14507 /* Fall through. */
14509 case R_ARM_TLS_LDM32
:
14510 if (r_type
== R_ARM_TLS_LDM32
)
14511 htab
->tls_ldm_got
.refcount
++;
14512 /* Fall through. */
14514 case R_ARM_GOTOFF32
:
14516 if (htab
->root
.sgot
== NULL
14517 && !create_got_section (htab
->root
.dynobj
, info
))
14526 case R_ARM_THM_CALL
:
14527 case R_ARM_THM_JUMP24
:
14528 case R_ARM_THM_JUMP19
:
14529 call_reloc_p
= TRUE
;
14530 may_need_local_target_p
= TRUE
;
14534 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
14535 ldr __GOTT_INDEX__ offsets. */
14536 if (!htab
->vxworks_p
)
14538 may_need_local_target_p
= TRUE
;
14541 else goto jump_over
;
14543 /* Fall through. */
14545 case R_ARM_MOVW_ABS_NC
:
14546 case R_ARM_MOVT_ABS
:
14547 case R_ARM_THM_MOVW_ABS_NC
:
14548 case R_ARM_THM_MOVT_ABS
:
14549 if (bfd_link_pic (info
))
14552 (_("%pB: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
14553 abfd
, elf32_arm_howto_table_1
[r_type
].name
,
14554 (h
) ? h
->root
.root
.string
: "a local symbol");
14555 bfd_set_error (bfd_error_bad_value
);
14559 /* Fall through. */
14561 case R_ARM_ABS32_NOI
:
14563 if (h
!= NULL
&& bfd_link_executable (info
))
14565 h
->pointer_equality_needed
= 1;
14567 /* Fall through. */
14569 case R_ARM_REL32_NOI
:
14570 case R_ARM_MOVW_PREL_NC
:
14571 case R_ARM_MOVT_PREL
:
14572 case R_ARM_THM_MOVW_PREL_NC
:
14573 case R_ARM_THM_MOVT_PREL
:
14575 /* Should the interworking branches be listed here? */
14576 if ((bfd_link_pic (info
) || htab
->root
.is_relocatable_executable
)
14577 && (sec
->flags
& SEC_ALLOC
) != 0)
14580 && elf32_arm_howto_from_type (r_type
)->pc_relative
)
14582 /* In shared libraries and relocatable executables,
14583 we treat local relative references as calls;
14584 see the related SYMBOL_CALLS_LOCAL code in
14585 allocate_dynrelocs. */
14586 call_reloc_p
= TRUE
;
14587 may_need_local_target_p
= TRUE
;
14590 /* We are creating a shared library or relocatable
14591 executable, and this is a reloc against a global symbol,
14592 or a non-PC-relative reloc against a local symbol.
14593 We may need to copy the reloc into the output. */
14594 may_become_dynamic_p
= TRUE
;
14597 may_need_local_target_p
= TRUE
;
14600 /* This relocation describes the C++ object vtable hierarchy.
14601 Reconstruct it for later use during GC. */
14602 case R_ARM_GNU_VTINHERIT
:
14603 if (!bfd_elf_gc_record_vtinherit (abfd
, sec
, h
, rel
->r_offset
))
14607 /* This relocation describes which C++ vtable entries are actually
14608 used. Record for later use during GC. */
14609 case R_ARM_GNU_VTENTRY
:
14610 BFD_ASSERT (h
!= NULL
);
14612 && !bfd_elf_gc_record_vtentry (abfd
, sec
, h
, rel
->r_offset
))
14620 /* We may need a .plt entry if the function this reloc
14621 refers to is in a different object, regardless of the
14622 symbol's type. We can't tell for sure yet, because
14623 something later might force the symbol local. */
14625 else if (may_need_local_target_p
)
14626 /* If this reloc is in a read-only section, we might
14627 need a copy reloc. We can't check reliably at this
14628 stage whether the section is read-only, as input
14629 sections have not yet been mapped to output sections.
14630 Tentatively set the flag for now, and correct in
14631 adjust_dynamic_symbol. */
14632 h
->non_got_ref
= 1;
14635 if (may_need_local_target_p
14636 && (h
!= NULL
|| ELF32_ST_TYPE (isym
->st_info
) == STT_GNU_IFUNC
))
14638 union gotplt_union
*root_plt
;
14639 struct arm_plt_info
*arm_plt
;
14640 struct arm_local_iplt_info
*local_iplt
;
14644 root_plt
= &h
->plt
;
14645 arm_plt
= &eh
->plt
;
14649 local_iplt
= elf32_arm_create_local_iplt (abfd
, r_symndx
);
14650 if (local_iplt
== NULL
)
14652 root_plt
= &local_iplt
->root
;
14653 arm_plt
= &local_iplt
->arm
;
14656 /* If the symbol is a function that doesn't bind locally,
14657 this relocation will need a PLT entry. */
14658 if (root_plt
->refcount
!= -1)
14659 root_plt
->refcount
+= 1;
14662 arm_plt
->noncall_refcount
++;
14664 /* It's too early to use htab->use_blx here, so we have to
14665 record possible blx references separately from
14666 relocs that definitely need a thumb stub. */
14668 if (r_type
== R_ARM_THM_CALL
)
14669 arm_plt
->maybe_thumb_refcount
+= 1;
14671 if (r_type
== R_ARM_THM_JUMP24
14672 || r_type
== R_ARM_THM_JUMP19
)
14673 arm_plt
->thumb_refcount
+= 1;
14676 if (may_become_dynamic_p
)
14678 struct elf_dyn_relocs
*p
, **head
;
14680 /* Create a reloc section in dynobj. */
14681 if (sreloc
== NULL
)
14683 sreloc
= _bfd_elf_make_dynamic_reloc_section
14684 (sec
, dynobj
, 2, abfd
, ! htab
->use_rel
);
14686 if (sreloc
== NULL
)
14689 /* BPABI objects never have dynamic relocations mapped. */
14690 if (htab
->symbian_p
)
14694 flags
= bfd_get_section_flags (dynobj
, sreloc
);
14695 flags
&= ~(SEC_LOAD
| SEC_ALLOC
);
14696 bfd_set_section_flags (dynobj
, sreloc
, flags
);
14700 /* If this is a global symbol, count the number of
14701 relocations we need for this symbol. */
14703 head
= &((struct elf32_arm_link_hash_entry
*) h
)->dyn_relocs
;
14706 head
= elf32_arm_get_local_dynreloc_list (abfd
, r_symndx
, isym
);
14712 if (p
== NULL
|| p
->sec
!= sec
)
14714 bfd_size_type amt
= sizeof *p
;
14716 p
= (struct elf_dyn_relocs
*) bfd_alloc (htab
->root
.dynobj
, amt
);
14726 if (elf32_arm_howto_from_type (r_type
)->pc_relative
)
14736 elf32_arm_update_relocs (asection
*o
,
14737 struct bfd_elf_section_reloc_data
*reldata
)
14739 void (*swap_in
) (bfd
*, const bfd_byte
*, Elf_Internal_Rela
*);
14740 void (*swap_out
) (bfd
*, const Elf_Internal_Rela
*, bfd_byte
*);
14741 const struct elf_backend_data
*bed
;
14742 _arm_elf_section_data
*eado
;
14743 struct bfd_link_order
*p
;
14744 bfd_byte
*erela_head
, *erela
;
14745 Elf_Internal_Rela
*irela_head
, *irela
;
14746 Elf_Internal_Shdr
*rel_hdr
;
14748 unsigned int count
;
14750 eado
= get_arm_elf_section_data (o
);
14752 if (!eado
|| eado
->elf
.this_hdr
.sh_type
!= SHT_ARM_EXIDX
)
14756 bed
= get_elf_backend_data (abfd
);
14757 rel_hdr
= reldata
->hdr
;
14759 if (rel_hdr
->sh_entsize
== bed
->s
->sizeof_rel
)
14761 swap_in
= bed
->s
->swap_reloc_in
;
14762 swap_out
= bed
->s
->swap_reloc_out
;
14764 else if (rel_hdr
->sh_entsize
== bed
->s
->sizeof_rela
)
14766 swap_in
= bed
->s
->swap_reloca_in
;
14767 swap_out
= bed
->s
->swap_reloca_out
;
14772 erela_head
= rel_hdr
->contents
;
14773 irela_head
= (Elf_Internal_Rela
*) bfd_zmalloc
14774 ((NUM_SHDR_ENTRIES (rel_hdr
) + 1) * sizeof (*irela_head
));
14776 erela
= erela_head
;
14777 irela
= irela_head
;
14780 for (p
= o
->map_head
.link_order
; p
; p
= p
->next
)
14782 if (p
->type
== bfd_section_reloc_link_order
14783 || p
->type
== bfd_symbol_reloc_link_order
)
14785 (*swap_in
) (abfd
, erela
, irela
);
14786 erela
+= rel_hdr
->sh_entsize
;
14790 else if (p
->type
== bfd_indirect_link_order
)
14792 struct bfd_elf_section_reloc_data
*input_reldata
;
14793 arm_unwind_table_edit
*edit_list
, *edit_tail
;
14794 _arm_elf_section_data
*eadi
;
14799 i
= p
->u
.indirect
.section
;
14801 eadi
= get_arm_elf_section_data (i
);
14802 edit_list
= eadi
->u
.exidx
.unwind_edit_list
;
14803 edit_tail
= eadi
->u
.exidx
.unwind_edit_tail
;
14804 offset
= o
->vma
+ i
->output_offset
;
14806 if (eadi
->elf
.rel
.hdr
&&
14807 eadi
->elf
.rel
.hdr
->sh_entsize
== rel_hdr
->sh_entsize
)
14808 input_reldata
= &eadi
->elf
.rel
;
14809 else if (eadi
->elf
.rela
.hdr
&&
14810 eadi
->elf
.rela
.hdr
->sh_entsize
== rel_hdr
->sh_entsize
)
14811 input_reldata
= &eadi
->elf
.rela
;
14817 for (j
= 0; j
< NUM_SHDR_ENTRIES (input_reldata
->hdr
); j
++)
14819 arm_unwind_table_edit
*edit_node
, *edit_next
;
14821 bfd_vma reloc_index
;
14823 (*swap_in
) (abfd
, erela
, irela
);
14824 reloc_index
= (irela
->r_offset
- offset
) / 8;
14827 edit_node
= edit_list
;
14828 for (edit_next
= edit_list
;
14829 edit_next
&& edit_next
->index
<= reloc_index
;
14830 edit_next
= edit_node
->next
)
14833 edit_node
= edit_next
;
14836 if (edit_node
->type
!= DELETE_EXIDX_ENTRY
14837 || edit_node
->index
!= reloc_index
)
14839 irela
->r_offset
-= bias
* 8;
14844 erela
+= rel_hdr
->sh_entsize
;
14847 if (edit_tail
->type
== INSERT_EXIDX_CANTUNWIND_AT_END
)
14849 /* New relocation entity. */
14850 asection
*text_sec
= edit_tail
->linked_section
;
14851 asection
*text_out
= text_sec
->output_section
;
14852 bfd_vma exidx_offset
= offset
+ i
->size
- 8;
14854 irela
->r_addend
= 0;
14855 irela
->r_offset
= exidx_offset
;
14856 irela
->r_info
= ELF32_R_INFO
14857 (text_out
->target_index
, R_ARM_PREL31
);
14864 for (j
= 0; j
< NUM_SHDR_ENTRIES (input_reldata
->hdr
); j
++)
14866 (*swap_in
) (abfd
, erela
, irela
);
14867 erela
+= rel_hdr
->sh_entsize
;
14871 count
+= NUM_SHDR_ENTRIES (input_reldata
->hdr
);
14876 reldata
->count
= count
;
14877 rel_hdr
->sh_size
= count
* rel_hdr
->sh_entsize
;
14879 erela
= erela_head
;
14880 irela
= irela_head
;
14883 (*swap_out
) (abfd
, irela
, erela
);
14884 erela
+= rel_hdr
->sh_entsize
;
14891 /* Hashes are no longer valid. */
14892 free (reldata
->hashes
);
14893 reldata
->hashes
= NULL
;
14896 /* Unwinding tables are not referenced directly. This pass marks them as
14897 required if the corresponding code section is marked. Similarly, ARMv8-M
14898 secure entry functions can only be referenced by SG veneers which are
14899 created after the GC process. They need to be marked in case they reside in
14900 their own section (as would be the case if code was compiled with
14901 -ffunction-sections). */
14904 elf32_arm_gc_mark_extra_sections (struct bfd_link_info
*info
,
14905 elf_gc_mark_hook_fn gc_mark_hook
)
14908 Elf_Internal_Shdr
**elf_shdrp
;
14909 asection
*cmse_sec
;
14910 obj_attribute
*out_attr
;
14911 Elf_Internal_Shdr
*symtab_hdr
;
14912 unsigned i
, sym_count
, ext_start
;
14913 const struct elf_backend_data
*bed
;
14914 struct elf_link_hash_entry
**sym_hashes
;
14915 struct elf32_arm_link_hash_entry
*cmse_hash
;
14916 bfd_boolean again
, is_v8m
, first_bfd_browse
= TRUE
;
14918 _bfd_elf_gc_mark_extra_sections (info
, gc_mark_hook
);
14920 out_attr
= elf_known_obj_attributes_proc (info
->output_bfd
);
14921 is_v8m
= out_attr
[Tag_CPU_arch
].i
>= TAG_CPU_ARCH_V8M_BASE
14922 && out_attr
[Tag_CPU_arch_profile
].i
== 'M';
14924 /* Marking EH data may cause additional code sections to be marked,
14925 requiring multiple passes. */
14930 for (sub
= info
->input_bfds
; sub
!= NULL
; sub
= sub
->link
.next
)
14934 if (! is_arm_elf (sub
))
14937 elf_shdrp
= elf_elfsections (sub
);
14938 for (o
= sub
->sections
; o
!= NULL
; o
= o
->next
)
14940 Elf_Internal_Shdr
*hdr
;
14942 hdr
= &elf_section_data (o
)->this_hdr
;
14943 if (hdr
->sh_type
== SHT_ARM_EXIDX
14945 && hdr
->sh_link
< elf_numsections (sub
)
14947 && elf_shdrp
[hdr
->sh_link
]->bfd_section
->gc_mark
)
14950 if (!_bfd_elf_gc_mark (info
, o
, gc_mark_hook
))
14955 /* Mark section holding ARMv8-M secure entry functions. We mark all
14956 of them so no need for a second browsing. */
14957 if (is_v8m
&& first_bfd_browse
)
14959 sym_hashes
= elf_sym_hashes (sub
);
14960 bed
= get_elf_backend_data (sub
);
14961 symtab_hdr
= &elf_tdata (sub
)->symtab_hdr
;
14962 sym_count
= symtab_hdr
->sh_size
/ bed
->s
->sizeof_sym
;
14963 ext_start
= symtab_hdr
->sh_info
;
14965 /* Scan symbols. */
14966 for (i
= ext_start
; i
< sym_count
; i
++)
14968 cmse_hash
= elf32_arm_hash_entry (sym_hashes
[i
- ext_start
]);
14970 /* Assume it is a special symbol. If not, cmse_scan will
14971 warn about it and user can do something about it. */
14972 if (ARM_GET_SYM_CMSE_SPCL (cmse_hash
->root
.target_internal
))
14974 cmse_sec
= cmse_hash
->root
.root
.u
.def
.section
;
14975 if (!cmse_sec
->gc_mark
14976 && !_bfd_elf_gc_mark (info
, cmse_sec
, gc_mark_hook
))
14982 first_bfd_browse
= FALSE
;
14988 /* Treat mapping symbols as special target symbols. */
14991 elf32_arm_is_target_special_symbol (bfd
* abfd ATTRIBUTE_UNUSED
, asymbol
* sym
)
14993 return bfd_is_arm_special_symbol_name (sym
->name
,
14994 BFD_ARM_SPECIAL_SYM_TYPE_ANY
);
14997 /* This is a copy of elf_find_function() from elf.c except that
14998 ARM mapping symbols are ignored when looking for function names
14999 and STT_ARM_TFUNC is considered to a function type. */
15002 arm_elf_find_function (bfd
* abfd ATTRIBUTE_UNUSED
,
15003 asymbol
** symbols
,
15004 asection
* section
,
15006 const char ** filename_ptr
,
15007 const char ** functionname_ptr
)
15009 const char * filename
= NULL
;
15010 asymbol
* func
= NULL
;
15011 bfd_vma low_func
= 0;
15014 for (p
= symbols
; *p
!= NULL
; p
++)
15016 elf_symbol_type
*q
;
15018 q
= (elf_symbol_type
*) *p
;
15020 switch (ELF_ST_TYPE (q
->internal_elf_sym
.st_info
))
15025 filename
= bfd_asymbol_name (&q
->symbol
);
15028 case STT_ARM_TFUNC
:
15030 /* Skip mapping symbols. */
15031 if ((q
->symbol
.flags
& BSF_LOCAL
)
15032 && bfd_is_arm_special_symbol_name (q
->symbol
.name
,
15033 BFD_ARM_SPECIAL_SYM_TYPE_ANY
))
15035 /* Fall through. */
15036 if (bfd_get_section (&q
->symbol
) == section
15037 && q
->symbol
.value
>= low_func
15038 && q
->symbol
.value
<= offset
)
15040 func
= (asymbol
*) q
;
15041 low_func
= q
->symbol
.value
;
15051 *filename_ptr
= filename
;
15052 if (functionname_ptr
)
15053 *functionname_ptr
= bfd_asymbol_name (func
);
15059 /* Find the nearest line to a particular section and offset, for error
15060 reporting. This code is a duplicate of the code in elf.c, except
15061 that it uses arm_elf_find_function. */
15064 elf32_arm_find_nearest_line (bfd
* abfd
,
15065 asymbol
** symbols
,
15066 asection
* section
,
15068 const char ** filename_ptr
,
15069 const char ** functionname_ptr
,
15070 unsigned int * line_ptr
,
15071 unsigned int * discriminator_ptr
)
15073 bfd_boolean found
= FALSE
;
15075 if (_bfd_dwarf2_find_nearest_line (abfd
, symbols
, NULL
, section
, offset
,
15076 filename_ptr
, functionname_ptr
,
15077 line_ptr
, discriminator_ptr
,
15078 dwarf_debug_sections
, 0,
15079 & elf_tdata (abfd
)->dwarf2_find_line_info
))
15081 if (!*functionname_ptr
)
15082 arm_elf_find_function (abfd
, symbols
, section
, offset
,
15083 *filename_ptr
? NULL
: filename_ptr
,
15089 /* Skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain
15092 if (! _bfd_stab_section_find_nearest_line (abfd
, symbols
, section
, offset
,
15093 & found
, filename_ptr
,
15094 functionname_ptr
, line_ptr
,
15095 & elf_tdata (abfd
)->line_info
))
15098 if (found
&& (*functionname_ptr
|| *line_ptr
))
15101 if (symbols
== NULL
)
15104 if (! arm_elf_find_function (abfd
, symbols
, section
, offset
,
15105 filename_ptr
, functionname_ptr
))
15113 elf32_arm_find_inliner_info (bfd
* abfd
,
15114 const char ** filename_ptr
,
15115 const char ** functionname_ptr
,
15116 unsigned int * line_ptr
)
15119 found
= _bfd_dwarf2_find_inliner_info (abfd
, filename_ptr
,
15120 functionname_ptr
, line_ptr
,
15121 & elf_tdata (abfd
)->dwarf2_find_line_info
);
15125 /* Find dynamic relocs for H that apply to read-only sections. */
15128 readonly_dynrelocs (struct elf_link_hash_entry
*h
)
15130 struct elf_dyn_relocs
*p
;
15132 for (p
= elf32_arm_hash_entry (h
)->dyn_relocs
; p
!= NULL
; p
= p
->next
)
15134 asection
*s
= p
->sec
->output_section
;
15136 if (s
!= NULL
&& (s
->flags
& SEC_READONLY
) != 0)
15142 /* Adjust a symbol defined by a dynamic object and referenced by a
15143 regular object. The current definition is in some section of the
15144 dynamic object, but we're not including those sections. We have to
15145 change the definition to something the rest of the link can
15149 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info
* info
,
15150 struct elf_link_hash_entry
* h
)
15153 asection
*s
, *srel
;
15154 struct elf32_arm_link_hash_entry
* eh
;
15155 struct elf32_arm_link_hash_table
*globals
;
15157 globals
= elf32_arm_hash_table (info
);
15158 if (globals
== NULL
)
15161 dynobj
= elf_hash_table (info
)->dynobj
;
15163 /* Make sure we know what is going on here. */
15164 BFD_ASSERT (dynobj
!= NULL
15166 || h
->type
== STT_GNU_IFUNC
15170 && !h
->def_regular
)));
15172 eh
= (struct elf32_arm_link_hash_entry
*) h
;
15174 /* If this is a function, put it in the procedure linkage table. We
15175 will fill in the contents of the procedure linkage table later,
15176 when we know the address of the .got section. */
15177 if (h
->type
== STT_FUNC
|| h
->type
== STT_GNU_IFUNC
|| h
->needs_plt
)
15179 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
15180 symbol binds locally. */
15181 if (h
->plt
.refcount
<= 0
15182 || (h
->type
!= STT_GNU_IFUNC
15183 && (SYMBOL_CALLS_LOCAL (info
, h
)
15184 || (ELF_ST_VISIBILITY (h
->other
) != STV_DEFAULT
15185 && h
->root
.type
== bfd_link_hash_undefweak
))))
15187 /* This case can occur if we saw a PLT32 reloc in an input
15188 file, but the symbol was never referred to by a dynamic
15189 object, or if all references were garbage collected. In
15190 such a case, we don't actually need to build a procedure
15191 linkage table, and we can just do a PC24 reloc instead. */
15192 h
->plt
.offset
= (bfd_vma
) -1;
15193 eh
->plt
.thumb_refcount
= 0;
15194 eh
->plt
.maybe_thumb_refcount
= 0;
15195 eh
->plt
.noncall_refcount
= 0;
15203 /* It's possible that we incorrectly decided a .plt reloc was
15204 needed for an R_ARM_PC24 or similar reloc to a non-function sym
15205 in check_relocs. We can't decide accurately between function
15206 and non-function syms in check-relocs; Objects loaded later in
15207 the link may change h->type. So fix it now. */
15208 h
->plt
.offset
= (bfd_vma
) -1;
15209 eh
->plt
.thumb_refcount
= 0;
15210 eh
->plt
.maybe_thumb_refcount
= 0;
15211 eh
->plt
.noncall_refcount
= 0;
15214 /* If this is a weak symbol, and there is a real definition, the
15215 processor independent code will have arranged for us to see the
15216 real definition first, and we can just use the same value. */
15217 if (h
->is_weakalias
)
15219 struct elf_link_hash_entry
*def
= weakdef (h
);
15220 BFD_ASSERT (def
->root
.type
== bfd_link_hash_defined
);
15221 h
->root
.u
.def
.section
= def
->root
.u
.def
.section
;
15222 h
->root
.u
.def
.value
= def
->root
.u
.def
.value
;
15226 /* If there are no non-GOT references, we do not need a copy
15228 if (!h
->non_got_ref
)
15231 /* This is a reference to a symbol defined by a dynamic object which
15232 is not a function. */
15234 /* If we are creating a shared library, we must presume that the
15235 only references to the symbol are via the global offset table.
15236 For such cases we need not do anything here; the relocations will
15237 be handled correctly by relocate_section. Relocatable executables
15238 can reference data in shared objects directly, so we don't need to
15239 do anything here. */
15240 if (bfd_link_pic (info
) || globals
->root
.is_relocatable_executable
)
15243 /* We must allocate the symbol in our .dynbss section, which will
15244 become part of the .bss section of the executable. There will be
15245 an entry for this symbol in the .dynsym section. The dynamic
15246 object will contain position independent code, so all references
15247 from the dynamic object to this symbol will go through the global
15248 offset table. The dynamic linker will use the .dynsym entry to
15249 determine the address it must put in the global offset table, so
15250 both the dynamic object and the regular object will refer to the
15251 same memory location for the variable. */
15252 /* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic
15253 linker to copy the initial value out of the dynamic object and into
15254 the runtime process image. We need to remember the offset into the
15255 .rel(a).bss section we are going to use. */
15256 if ((h
->root
.u
.def
.section
->flags
& SEC_READONLY
) != 0)
15258 s
= globals
->root
.sdynrelro
;
15259 srel
= globals
->root
.sreldynrelro
;
15263 s
= globals
->root
.sdynbss
;
15264 srel
= globals
->root
.srelbss
;
15266 if (info
->nocopyreloc
== 0
15267 && (h
->root
.u
.def
.section
->flags
& SEC_ALLOC
) != 0
15270 elf32_arm_allocate_dynrelocs (info
, srel
, 1);
15274 return _bfd_elf_adjust_dynamic_copy (info
, h
, s
);
15277 /* Allocate space in .plt, .got and associated reloc sections for
15281 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry
*h
, void * inf
)
15283 struct bfd_link_info
*info
;
15284 struct elf32_arm_link_hash_table
*htab
;
15285 struct elf32_arm_link_hash_entry
*eh
;
15286 struct elf_dyn_relocs
*p
;
15288 if (h
->root
.type
== bfd_link_hash_indirect
)
15291 eh
= (struct elf32_arm_link_hash_entry
*) h
;
15293 info
= (struct bfd_link_info
*) inf
;
15294 htab
= elf32_arm_hash_table (info
);
15298 if ((htab
->root
.dynamic_sections_created
|| h
->type
== STT_GNU_IFUNC
)
15299 && h
->plt
.refcount
> 0)
15301 /* Make sure this symbol is output as a dynamic symbol.
15302 Undefined weak syms won't yet be marked as dynamic. */
15303 if (h
->dynindx
== -1 && !h
->forced_local
15304 && h
->root
.type
== bfd_link_hash_undefweak
)
15306 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
15310 /* If the call in the PLT entry binds locally, the associated
15311 GOT entry should use an R_ARM_IRELATIVE relocation instead of
15312 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
15313 than the .plt section. */
15314 if (h
->type
== STT_GNU_IFUNC
&& SYMBOL_CALLS_LOCAL (info
, h
))
15317 if (eh
->plt
.noncall_refcount
== 0
15318 && SYMBOL_REFERENCES_LOCAL (info
, h
))
15319 /* All non-call references can be resolved directly.
15320 This means that they can (and in some cases, must)
15321 resolve directly to the run-time target, rather than
15322 to the PLT. That in turns means that any .got entry
15323 would be equal to the .igot.plt entry, so there's
15324 no point having both. */
15325 h
->got
.refcount
= 0;
15328 if (bfd_link_pic (info
)
15330 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h
))
15332 elf32_arm_allocate_plt_entry (info
, eh
->is_iplt
, &h
->plt
, &eh
->plt
);
15334 /* If this symbol is not defined in a regular file, and we are
15335 not generating a shared library, then set the symbol to this
15336 location in the .plt. This is required to make function
15337 pointers compare as equal between the normal executable and
15338 the shared library. */
15339 if (! bfd_link_pic (info
)
15340 && !h
->def_regular
)
15342 h
->root
.u
.def
.section
= htab
->root
.splt
;
15343 h
->root
.u
.def
.value
= h
->plt
.offset
;
15345 /* Make sure the function is not marked as Thumb, in case
15346 it is the target of an ABS32 relocation, which will
15347 point to the PLT entry. */
15348 ARM_SET_SYM_BRANCH_TYPE (h
->target_internal
, ST_BRANCH_TO_ARM
);
15351 /* VxWorks executables have a second set of relocations for
15352 each PLT entry. They go in a separate relocation section,
15353 which is processed by the kernel loader. */
15354 if (htab
->vxworks_p
&& !bfd_link_pic (info
))
15356 /* There is a relocation for the initial PLT entry:
15357 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
15358 if (h
->plt
.offset
== htab
->plt_header_size
)
15359 elf32_arm_allocate_dynrelocs (info
, htab
->srelplt2
, 1);
15361 /* There are two extra relocations for each subsequent
15362 PLT entry: an R_ARM_32 relocation for the GOT entry,
15363 and an R_ARM_32 relocation for the PLT entry. */
15364 elf32_arm_allocate_dynrelocs (info
, htab
->srelplt2
, 2);
15369 h
->plt
.offset
= (bfd_vma
) -1;
15375 h
->plt
.offset
= (bfd_vma
) -1;
15379 eh
= (struct elf32_arm_link_hash_entry
*) h
;
15380 eh
->tlsdesc_got
= (bfd_vma
) -1;
15382 if (h
->got
.refcount
> 0)
15386 int tls_type
= elf32_arm_hash_entry (h
)->tls_type
;
15389 /* Make sure this symbol is output as a dynamic symbol.
15390 Undefined weak syms won't yet be marked as dynamic. */
15391 if (h
->dynindx
== -1 && !h
->forced_local
15392 && h
->root
.type
== bfd_link_hash_undefweak
)
15394 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
15398 if (!htab
->symbian_p
)
15400 s
= htab
->root
.sgot
;
15401 h
->got
.offset
= s
->size
;
15403 if (tls_type
== GOT_UNKNOWN
)
15406 if (tls_type
== GOT_NORMAL
)
15407 /* Non-TLS symbols need one GOT slot. */
15411 if (tls_type
& GOT_TLS_GDESC
)
15413 /* R_ARM_TLS_DESC needs 2 GOT slots. */
15415 = (htab
->root
.sgotplt
->size
15416 - elf32_arm_compute_jump_table_size (htab
));
15417 htab
->root
.sgotplt
->size
+= 8;
15418 h
->got
.offset
= (bfd_vma
) -2;
15419 /* plt.got_offset needs to know there's a TLS_DESC
15420 reloc in the middle of .got.plt. */
15421 htab
->num_tls_desc
++;
15424 if (tls_type
& GOT_TLS_GD
)
15426 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
15427 the symbol is both GD and GDESC, got.offset may
15428 have been overwritten. */
15429 h
->got
.offset
= s
->size
;
15433 if (tls_type
& GOT_TLS_IE
)
15434 /* R_ARM_TLS_IE32 needs one GOT slot. */
15438 dyn
= htab
->root
.dynamic_sections_created
;
15441 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn
,
15442 bfd_link_pic (info
),
15444 && (!bfd_link_pic (info
)
15445 || !SYMBOL_REFERENCES_LOCAL (info
, h
)))
15448 if (tls_type
!= GOT_NORMAL
15449 && (bfd_link_pic (info
) || indx
!= 0)
15450 && (ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
15451 || h
->root
.type
!= bfd_link_hash_undefweak
))
15453 if (tls_type
& GOT_TLS_IE
)
15454 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
15456 if (tls_type
& GOT_TLS_GD
)
15457 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
15459 if (tls_type
& GOT_TLS_GDESC
)
15461 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelplt
, 1);
15462 /* GDESC needs a trampoline to jump to. */
15463 htab
->tls_trampoline
= -1;
15466 /* Only GD needs it. GDESC just emits one relocation per
15468 if ((tls_type
& GOT_TLS_GD
) && indx
!= 0)
15469 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
15471 else if (indx
!= -1 && !SYMBOL_REFERENCES_LOCAL (info
, h
))
15473 if (htab
->root
.dynamic_sections_created
)
15474 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
15475 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
15477 else if (h
->type
== STT_GNU_IFUNC
15478 && eh
->plt
.noncall_refcount
== 0)
15479 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
15480 they all resolve dynamically instead. Reserve room for the
15481 GOT entry's R_ARM_IRELATIVE relocation. */
15482 elf32_arm_allocate_irelocs (info
, htab
->root
.srelgot
, 1);
15483 else if (bfd_link_pic (info
)
15484 && (ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
15485 || h
->root
.type
!= bfd_link_hash_undefweak
))
15486 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
15487 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
15491 h
->got
.offset
= (bfd_vma
) -1;
15493 /* Allocate stubs for exported Thumb functions on v4t. */
15494 if (!htab
->use_blx
&& h
->dynindx
!= -1
15496 && ARM_GET_SYM_BRANCH_TYPE (h
->target_internal
) == ST_BRANCH_TO_THUMB
15497 && ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
)
15499 struct elf_link_hash_entry
* th
;
15500 struct bfd_link_hash_entry
* bh
;
15501 struct elf_link_hash_entry
* myh
;
15505 /* Create a new symbol to regist the real location of the function. */
15506 s
= h
->root
.u
.def
.section
;
15507 sprintf (name
, "__real_%s", h
->root
.root
.string
);
15508 _bfd_generic_link_add_one_symbol (info
, s
->owner
,
15509 name
, BSF_GLOBAL
, s
,
15510 h
->root
.u
.def
.value
,
15511 NULL
, TRUE
, FALSE
, &bh
);
15513 myh
= (struct elf_link_hash_entry
*) bh
;
15514 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
15515 myh
->forced_local
= 1;
15516 ARM_SET_SYM_BRANCH_TYPE (myh
->target_internal
, ST_BRANCH_TO_THUMB
);
15517 eh
->export_glue
= myh
;
15518 th
= record_arm_to_thumb_glue (info
, h
);
15519 /* Point the symbol at the stub. */
15520 h
->type
= ELF_ST_INFO (ELF_ST_BIND (h
->type
), STT_FUNC
);
15521 ARM_SET_SYM_BRANCH_TYPE (h
->target_internal
, ST_BRANCH_TO_ARM
);
15522 h
->root
.u
.def
.section
= th
->root
.u
.def
.section
;
15523 h
->root
.u
.def
.value
= th
->root
.u
.def
.value
& ~1;
15526 if (eh
->dyn_relocs
== NULL
)
15529 /* In the shared -Bsymbolic case, discard space allocated for
15530 dynamic pc-relative relocs against symbols which turn out to be
15531 defined in regular objects. For the normal shared case, discard
15532 space for pc-relative relocs that have become local due to symbol
15533 visibility changes. */
15535 if (bfd_link_pic (info
) || htab
->root
.is_relocatable_executable
)
15537 /* Relocs that use pc_count are PC-relative forms, which will appear
15538 on something like ".long foo - ." or "movw REG, foo - .". We want
15539 calls to protected symbols to resolve directly to the function
15540 rather than going via the plt. If people want function pointer
15541 comparisons to work as expected then they should avoid writing
15542 assembly like ".long foo - .". */
15543 if (SYMBOL_CALLS_LOCAL (info
, h
))
15545 struct elf_dyn_relocs
**pp
;
15547 for (pp
= &eh
->dyn_relocs
; (p
= *pp
) != NULL
; )
15549 p
->count
-= p
->pc_count
;
15558 if (htab
->vxworks_p
)
15560 struct elf_dyn_relocs
**pp
;
15562 for (pp
= &eh
->dyn_relocs
; (p
= *pp
) != NULL
; )
15564 if (strcmp (p
->sec
->output_section
->name
, ".tls_vars") == 0)
15571 /* Also discard relocs on undefined weak syms with non-default
15573 if (eh
->dyn_relocs
!= NULL
15574 && h
->root
.type
== bfd_link_hash_undefweak
)
15576 if (ELF_ST_VISIBILITY (h
->other
) != STV_DEFAULT
15577 || UNDEFWEAK_NO_DYNAMIC_RELOC (info
, h
))
15578 eh
->dyn_relocs
= NULL
;
15580 /* Make sure undefined weak symbols are output as a dynamic
15582 else if (h
->dynindx
== -1
15583 && !h
->forced_local
)
15585 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
15590 else if (htab
->root
.is_relocatable_executable
&& h
->dynindx
== -1
15591 && h
->root
.type
== bfd_link_hash_new
)
15593 /* Output absolute symbols so that we can create relocations
15594 against them. For normal symbols we output a relocation
15595 against the section that contains them. */
15596 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
15603 /* For the non-shared case, discard space for relocs against
15604 symbols which turn out to need copy relocs or are not
15607 if (!h
->non_got_ref
15608 && ((h
->def_dynamic
15609 && !h
->def_regular
)
15610 || (htab
->root
.dynamic_sections_created
15611 && (h
->root
.type
== bfd_link_hash_undefweak
15612 || h
->root
.type
== bfd_link_hash_undefined
))))
15614 /* Make sure this symbol is output as a dynamic symbol.
15615 Undefined weak syms won't yet be marked as dynamic. */
15616 if (h
->dynindx
== -1 && !h
->forced_local
15617 && h
->root
.type
== bfd_link_hash_undefweak
)
15619 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
15623 /* If that succeeded, we know we'll be keeping all the
15625 if (h
->dynindx
!= -1)
15629 eh
->dyn_relocs
= NULL
;
15634 /* Finally, allocate space. */
15635 for (p
= eh
->dyn_relocs
; p
!= NULL
; p
= p
->next
)
15637 asection
*sreloc
= elf_section_data (p
->sec
)->sreloc
;
15638 if (h
->type
== STT_GNU_IFUNC
15639 && eh
->plt
.noncall_refcount
== 0
15640 && SYMBOL_REFERENCES_LOCAL (info
, h
))
15641 elf32_arm_allocate_irelocs (info
, sreloc
, p
->count
);
15643 elf32_arm_allocate_dynrelocs (info
, sreloc
, p
->count
);
15649 /* Set DF_TEXTREL if we find any dynamic relocs that apply to
15650 read-only sections. */
15653 maybe_set_textrel (struct elf_link_hash_entry
*h
, void *info_p
)
15657 if (h
->root
.type
== bfd_link_hash_indirect
)
15660 sec
= readonly_dynrelocs (h
);
15663 struct bfd_link_info
*info
= (struct bfd_link_info
*) info_p
;
15665 info
->flags
|= DF_TEXTREL
;
15666 info
->callbacks
->minfo
15667 (_("%pB: dynamic relocation against `%pT' in read-only section `%pA'\n"),
15668 sec
->owner
, h
->root
.root
.string
, sec
);
15670 /* Not an error, just cut short the traversal. */
15677 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info
*info
,
15680 struct elf32_arm_link_hash_table
*globals
;
15682 globals
= elf32_arm_hash_table (info
);
15683 if (globals
== NULL
)
15686 globals
->byteswap_code
= byteswap_code
;
15689 /* Set the sizes of the dynamic sections. */
15692 elf32_arm_size_dynamic_sections (bfd
* output_bfd ATTRIBUTE_UNUSED
,
15693 struct bfd_link_info
* info
)
15698 bfd_boolean relocs
;
15700 struct elf32_arm_link_hash_table
*htab
;
15702 htab
= elf32_arm_hash_table (info
);
15706 dynobj
= elf_hash_table (info
)->dynobj
;
15707 BFD_ASSERT (dynobj
!= NULL
);
15708 check_use_blx (htab
);
15710 if (elf_hash_table (info
)->dynamic_sections_created
)
15712 /* Set the contents of the .interp section to the interpreter. */
15713 if (bfd_link_executable (info
) && !info
->nointerp
)
15715 s
= bfd_get_linker_section (dynobj
, ".interp");
15716 BFD_ASSERT (s
!= NULL
);
15717 s
->size
= sizeof ELF_DYNAMIC_INTERPRETER
;
15718 s
->contents
= (unsigned char *) ELF_DYNAMIC_INTERPRETER
;
15722 /* Set up .got offsets for local syms, and space for local dynamic
15724 for (ibfd
= info
->input_bfds
; ibfd
!= NULL
; ibfd
= ibfd
->link
.next
)
15726 bfd_signed_vma
*local_got
;
15727 bfd_signed_vma
*end_local_got
;
15728 struct arm_local_iplt_info
**local_iplt_ptr
, *local_iplt
;
15729 char *local_tls_type
;
15730 bfd_vma
*local_tlsdesc_gotent
;
15731 bfd_size_type locsymcount
;
15732 Elf_Internal_Shdr
*symtab_hdr
;
15734 bfd_boolean is_vxworks
= htab
->vxworks_p
;
15735 unsigned int symndx
;
15737 if (! is_arm_elf (ibfd
))
15740 for (s
= ibfd
->sections
; s
!= NULL
; s
= s
->next
)
15742 struct elf_dyn_relocs
*p
;
15744 for (p
= (struct elf_dyn_relocs
*)
15745 elf_section_data (s
)->local_dynrel
; p
!= NULL
; p
= p
->next
)
15747 if (!bfd_is_abs_section (p
->sec
)
15748 && bfd_is_abs_section (p
->sec
->output_section
))
15750 /* Input section has been discarded, either because
15751 it is a copy of a linkonce section or due to
15752 linker script /DISCARD/, so we'll be discarding
15755 else if (is_vxworks
15756 && strcmp (p
->sec
->output_section
->name
,
15759 /* Relocations in vxworks .tls_vars sections are
15760 handled specially by the loader. */
15762 else if (p
->count
!= 0)
15764 srel
= elf_section_data (p
->sec
)->sreloc
;
15765 elf32_arm_allocate_dynrelocs (info
, srel
, p
->count
);
15766 if ((p
->sec
->output_section
->flags
& SEC_READONLY
) != 0)
15767 info
->flags
|= DF_TEXTREL
;
15772 local_got
= elf_local_got_refcounts (ibfd
);
15776 symtab_hdr
= & elf_symtab_hdr (ibfd
);
15777 locsymcount
= symtab_hdr
->sh_info
;
15778 end_local_got
= local_got
+ locsymcount
;
15779 local_iplt_ptr
= elf32_arm_local_iplt (ibfd
);
15780 local_tls_type
= elf32_arm_local_got_tls_type (ibfd
);
15781 local_tlsdesc_gotent
= elf32_arm_local_tlsdesc_gotent (ibfd
);
15783 s
= htab
->root
.sgot
;
15784 srel
= htab
->root
.srelgot
;
15785 for (; local_got
< end_local_got
;
15786 ++local_got
, ++local_iplt_ptr
, ++local_tls_type
,
15787 ++local_tlsdesc_gotent
, ++symndx
)
15789 *local_tlsdesc_gotent
= (bfd_vma
) -1;
15790 local_iplt
= *local_iplt_ptr
;
15791 if (local_iplt
!= NULL
)
15793 struct elf_dyn_relocs
*p
;
15795 if (local_iplt
->root
.refcount
> 0)
15797 elf32_arm_allocate_plt_entry (info
, TRUE
,
15800 if (local_iplt
->arm
.noncall_refcount
== 0)
15801 /* All references to the PLT are calls, so all
15802 non-call references can resolve directly to the
15803 run-time target. This means that the .got entry
15804 would be the same as the .igot.plt entry, so there's
15805 no point creating both. */
15810 BFD_ASSERT (local_iplt
->arm
.noncall_refcount
== 0);
15811 local_iplt
->root
.offset
= (bfd_vma
) -1;
15814 for (p
= local_iplt
->dyn_relocs
; p
!= NULL
; p
= p
->next
)
15818 psrel
= elf_section_data (p
->sec
)->sreloc
;
15819 if (local_iplt
->arm
.noncall_refcount
== 0)
15820 elf32_arm_allocate_irelocs (info
, psrel
, p
->count
);
15822 elf32_arm_allocate_dynrelocs (info
, psrel
, p
->count
);
15825 if (*local_got
> 0)
15827 Elf_Internal_Sym
*isym
;
15829 *local_got
= s
->size
;
15830 if (*local_tls_type
& GOT_TLS_GD
)
15831 /* TLS_GD relocs need an 8-byte structure in the GOT. */
15833 if (*local_tls_type
& GOT_TLS_GDESC
)
15835 *local_tlsdesc_gotent
= htab
->root
.sgotplt
->size
15836 - elf32_arm_compute_jump_table_size (htab
);
15837 htab
->root
.sgotplt
->size
+= 8;
15838 *local_got
= (bfd_vma
) -2;
15839 /* plt.got_offset needs to know there's a TLS_DESC
15840 reloc in the middle of .got.plt. */
15841 htab
->num_tls_desc
++;
15843 if (*local_tls_type
& GOT_TLS_IE
)
15846 if (*local_tls_type
& GOT_NORMAL
)
15848 /* If the symbol is both GD and GDESC, *local_got
15849 may have been overwritten. */
15850 *local_got
= s
->size
;
15854 isym
= bfd_sym_from_r_symndx (&htab
->sym_cache
, ibfd
, symndx
);
15858 /* If all references to an STT_GNU_IFUNC PLT are calls,
15859 then all non-call references, including this GOT entry,
15860 resolve directly to the run-time target. */
15861 if (ELF32_ST_TYPE (isym
->st_info
) == STT_GNU_IFUNC
15862 && (local_iplt
== NULL
15863 || local_iplt
->arm
.noncall_refcount
== 0))
15864 elf32_arm_allocate_irelocs (info
, srel
, 1);
15865 else if (bfd_link_pic (info
) || output_bfd
->flags
& DYNAMIC
)
15867 if ((bfd_link_pic (info
) && !(*local_tls_type
& GOT_TLS_GDESC
))
15868 || *local_tls_type
& GOT_TLS_GD
)
15869 elf32_arm_allocate_dynrelocs (info
, srel
, 1);
15871 if (bfd_link_pic (info
) && *local_tls_type
& GOT_TLS_GDESC
)
15873 elf32_arm_allocate_dynrelocs (info
,
15874 htab
->root
.srelplt
, 1);
15875 htab
->tls_trampoline
= -1;
15880 *local_got
= (bfd_vma
) -1;
15884 if (htab
->tls_ldm_got
.refcount
> 0)
15886 /* Allocate two GOT entries and one dynamic relocation (if necessary)
15887 for R_ARM_TLS_LDM32 relocations. */
15888 htab
->tls_ldm_got
.offset
= htab
->root
.sgot
->size
;
15889 htab
->root
.sgot
->size
+= 8;
15890 if (bfd_link_pic (info
))
15891 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
15894 htab
->tls_ldm_got
.offset
= -1;
15896 /* Allocate global sym .plt and .got entries, and space for global
15897 sym dynamic relocs. */
15898 elf_link_hash_traverse (& htab
->root
, allocate_dynrelocs_for_symbol
, info
);
15900 /* Here we rummage through the found bfds to collect glue information. */
15901 for (ibfd
= info
->input_bfds
; ibfd
!= NULL
; ibfd
= ibfd
->link
.next
)
15903 if (! is_arm_elf (ibfd
))
15906 /* Initialise mapping tables for code/data. */
15907 bfd_elf32_arm_init_maps (ibfd
);
15909 if (!bfd_elf32_arm_process_before_allocation (ibfd
, info
)
15910 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd
, info
)
15911 || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd
, info
))
15912 _bfd_error_handler (_("errors encountered processing file %pB"), ibfd
);
15915 /* Allocate space for the glue sections now that we've sized them. */
15916 bfd_elf32_arm_allocate_interworking_sections (info
);
15918 /* For every jump slot reserved in the sgotplt, reloc_count is
15919 incremented. However, when we reserve space for TLS descriptors,
15920 it's not incremented, so in order to compute the space reserved
15921 for them, it suffices to multiply the reloc count by the jump
15923 if (htab
->root
.srelplt
)
15924 htab
->sgotplt_jump_table_size
= elf32_arm_compute_jump_table_size(htab
);
15926 if (htab
->tls_trampoline
)
15928 if (htab
->root
.splt
->size
== 0)
15929 htab
->root
.splt
->size
+= htab
->plt_header_size
;
15931 htab
->tls_trampoline
= htab
->root
.splt
->size
;
15932 htab
->root
.splt
->size
+= htab
->plt_entry_size
;
15934 /* If we're not using lazy TLS relocations, don't generate the
15935 PLT and GOT entries they require. */
15936 if (!(info
->flags
& DF_BIND_NOW
))
15938 htab
->dt_tlsdesc_got
= htab
->root
.sgot
->size
;
15939 htab
->root
.sgot
->size
+= 4;
15941 htab
->dt_tlsdesc_plt
= htab
->root
.splt
->size
;
15942 htab
->root
.splt
->size
+= 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline
);
15946 /* The check_relocs and adjust_dynamic_symbol entry points have
15947 determined the sizes of the various dynamic sections. Allocate
15948 memory for them. */
15951 for (s
= dynobj
->sections
; s
!= NULL
; s
= s
->next
)
15955 if ((s
->flags
& SEC_LINKER_CREATED
) == 0)
15958 /* It's OK to base decisions on the section name, because none
15959 of the dynobj section names depend upon the input files. */
15960 name
= bfd_get_section_name (dynobj
, s
);
15962 if (s
== htab
->root
.splt
)
15964 /* Remember whether there is a PLT. */
15965 plt
= s
->size
!= 0;
15967 else if (CONST_STRNEQ (name
, ".rel"))
15971 /* Remember whether there are any reloc sections other
15972 than .rel(a).plt and .rela.plt.unloaded. */
15973 if (s
!= htab
->root
.srelplt
&& s
!= htab
->srelplt2
)
15976 /* We use the reloc_count field as a counter if we need
15977 to copy relocs into the output file. */
15978 s
->reloc_count
= 0;
15981 else if (s
!= htab
->root
.sgot
15982 && s
!= htab
->root
.sgotplt
15983 && s
!= htab
->root
.iplt
15984 && s
!= htab
->root
.igotplt
15985 && s
!= htab
->root
.sdynbss
15986 && s
!= htab
->root
.sdynrelro
)
15988 /* It's not one of our sections, so don't allocate space. */
15994 /* If we don't need this section, strip it from the
15995 output file. This is mostly to handle .rel(a).bss and
15996 .rel(a).plt. We must create both sections in
15997 create_dynamic_sections, because they must be created
15998 before the linker maps input sections to output
15999 sections. The linker does that before
16000 adjust_dynamic_symbol is called, and it is that
16001 function which decides whether anything needs to go
16002 into these sections. */
16003 s
->flags
|= SEC_EXCLUDE
;
16007 if ((s
->flags
& SEC_HAS_CONTENTS
) == 0)
16010 /* Allocate memory for the section contents. */
16011 s
->contents
= (unsigned char *) bfd_zalloc (dynobj
, s
->size
);
16012 if (s
->contents
== NULL
)
16016 if (elf_hash_table (info
)->dynamic_sections_created
)
16018 /* Add some entries to the .dynamic section. We fill in the
16019 values later, in elf32_arm_finish_dynamic_sections, but we
16020 must add the entries now so that we get the correct size for
16021 the .dynamic section. The DT_DEBUG entry is filled in by the
16022 dynamic linker and used by the debugger. */
16023 #define add_dynamic_entry(TAG, VAL) \
16024 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
16026 if (bfd_link_executable (info
))
16028 if (!add_dynamic_entry (DT_DEBUG
, 0))
16034 if ( !add_dynamic_entry (DT_PLTGOT
, 0)
16035 || !add_dynamic_entry (DT_PLTRELSZ
, 0)
16036 || !add_dynamic_entry (DT_PLTREL
,
16037 htab
->use_rel
? DT_REL
: DT_RELA
)
16038 || !add_dynamic_entry (DT_JMPREL
, 0))
16041 if (htab
->dt_tlsdesc_plt
16042 && (!add_dynamic_entry (DT_TLSDESC_PLT
,0)
16043 || !add_dynamic_entry (DT_TLSDESC_GOT
,0)))
16051 if (!add_dynamic_entry (DT_REL
, 0)
16052 || !add_dynamic_entry (DT_RELSZ
, 0)
16053 || !add_dynamic_entry (DT_RELENT
, RELOC_SIZE (htab
)))
16058 if (!add_dynamic_entry (DT_RELA
, 0)
16059 || !add_dynamic_entry (DT_RELASZ
, 0)
16060 || !add_dynamic_entry (DT_RELAENT
, RELOC_SIZE (htab
)))
16065 /* If any dynamic relocs apply to a read-only section,
16066 then we need a DT_TEXTREL entry. */
16067 if ((info
->flags
& DF_TEXTREL
) == 0)
16068 elf_link_hash_traverse (&htab
->root
, maybe_set_textrel
, info
);
16070 if ((info
->flags
& DF_TEXTREL
) != 0)
16072 if (!add_dynamic_entry (DT_TEXTREL
, 0))
16075 if (htab
->vxworks_p
16076 && !elf_vxworks_add_dynamic_entries (output_bfd
, info
))
16079 #undef add_dynamic_entry
16084 /* Size sections even though they're not dynamic. We use it to setup
16085 _TLS_MODULE_BASE_, if needed. */
16088 elf32_arm_always_size_sections (bfd
*output_bfd
,
16089 struct bfd_link_info
*info
)
16093 if (bfd_link_relocatable (info
))
16096 tls_sec
= elf_hash_table (info
)->tls_sec
;
16100 struct elf_link_hash_entry
*tlsbase
;
16102 tlsbase
= elf_link_hash_lookup
16103 (elf_hash_table (info
), "_TLS_MODULE_BASE_", TRUE
, TRUE
, FALSE
);
16107 struct bfd_link_hash_entry
*bh
= NULL
;
16108 const struct elf_backend_data
*bed
16109 = get_elf_backend_data (output_bfd
);
16111 if (!(_bfd_generic_link_add_one_symbol
16112 (info
, output_bfd
, "_TLS_MODULE_BASE_", BSF_LOCAL
,
16113 tls_sec
, 0, NULL
, FALSE
,
16114 bed
->collect
, &bh
)))
16117 tlsbase
->type
= STT_TLS
;
16118 tlsbase
= (struct elf_link_hash_entry
*)bh
;
16119 tlsbase
->def_regular
= 1;
16120 tlsbase
->other
= STV_HIDDEN
;
16121 (*bed
->elf_backend_hide_symbol
) (info
, tlsbase
, TRUE
);
16127 /* Finish up dynamic symbol handling. We set the contents of various
16128 dynamic sections here. */
16131 elf32_arm_finish_dynamic_symbol (bfd
* output_bfd
,
16132 struct bfd_link_info
* info
,
16133 struct elf_link_hash_entry
* h
,
16134 Elf_Internal_Sym
* sym
)
16136 struct elf32_arm_link_hash_table
*htab
;
16137 struct elf32_arm_link_hash_entry
*eh
;
16139 htab
= elf32_arm_hash_table (info
);
16143 eh
= (struct elf32_arm_link_hash_entry
*) h
;
16145 if (h
->plt
.offset
!= (bfd_vma
) -1)
16149 BFD_ASSERT (h
->dynindx
!= -1);
16150 if (! elf32_arm_populate_plt_entry (output_bfd
, info
, &h
->plt
, &eh
->plt
,
16155 if (!h
->def_regular
)
16157 /* Mark the symbol as undefined, rather than as defined in
16158 the .plt section. */
16159 sym
->st_shndx
= SHN_UNDEF
;
16160 /* If the symbol is weak we need to clear the value.
16161 Otherwise, the PLT entry would provide a definition for
16162 the symbol even if the symbol wasn't defined anywhere,
16163 and so the symbol would never be NULL. Leave the value if
16164 there were any relocations where pointer equality matters
16165 (this is a clue for the dynamic linker, to make function
16166 pointer comparisons work between an application and shared
16168 if (!h
->ref_regular_nonweak
|| !h
->pointer_equality_needed
)
16171 else if (eh
->is_iplt
&& eh
->plt
.noncall_refcount
!= 0)
16173 /* At least one non-call relocation references this .iplt entry,
16174 so the .iplt entry is the function's canonical address. */
16175 sym
->st_info
= ELF_ST_INFO (ELF_ST_BIND (sym
->st_info
), STT_FUNC
);
16176 ARM_SET_SYM_BRANCH_TYPE (sym
->st_target_internal
, ST_BRANCH_TO_ARM
);
16177 sym
->st_shndx
= (_bfd_elf_section_from_bfd_section
16178 (output_bfd
, htab
->root
.iplt
->output_section
));
16179 sym
->st_value
= (h
->plt
.offset
16180 + htab
->root
.iplt
->output_section
->vma
16181 + htab
->root
.iplt
->output_offset
);
16188 Elf_Internal_Rela rel
;
16190 /* This symbol needs a copy reloc. Set it up. */
16191 BFD_ASSERT (h
->dynindx
!= -1
16192 && (h
->root
.type
== bfd_link_hash_defined
16193 || h
->root
.type
== bfd_link_hash_defweak
));
16196 rel
.r_offset
= (h
->root
.u
.def
.value
16197 + h
->root
.u
.def
.section
->output_section
->vma
16198 + h
->root
.u
.def
.section
->output_offset
);
16199 rel
.r_info
= ELF32_R_INFO (h
->dynindx
, R_ARM_COPY
);
16200 if (h
->root
.u
.def
.section
== htab
->root
.sdynrelro
)
16201 s
= htab
->root
.sreldynrelro
;
16203 s
= htab
->root
.srelbss
;
16204 elf32_arm_add_dynreloc (output_bfd
, info
, s
, &rel
);
16207 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
16208 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
16209 to the ".got" section. */
16210 if (h
== htab
->root
.hdynamic
16211 || (!htab
->vxworks_p
&& h
== htab
->root
.hgot
))
16212 sym
->st_shndx
= SHN_ABS
;
16218 arm_put_trampoline (struct elf32_arm_link_hash_table
*htab
, bfd
*output_bfd
,
16220 const unsigned long *template, unsigned count
)
16224 for (ix
= 0; ix
!= count
; ix
++)
16226 unsigned long insn
= template[ix
];
16228 /* Emit mov pc,rx if bx is not permitted. */
16229 if (htab
->fix_v4bx
== 1 && (insn
& 0x0ffffff0) == 0x012fff10)
16230 insn
= (insn
& 0xf000000f) | 0x01a0f000;
16231 put_arm_insn (htab
, output_bfd
, insn
, (char *)contents
+ ix
*4);
16235 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
16236 other variants, NaCl needs this entry in a static executable's
16237 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
16238 zero. For .iplt really only the last bundle is useful, and .iplt
16239 could have a shorter first entry, with each individual PLT entry's
16240 relative branch calculated differently so it targets the last
16241 bundle instead of the instruction before it (labelled .Lplt_tail
16242 above). But it's simpler to keep the size and layout of PLT0
16243 consistent with the dynamic case, at the cost of some dead code at
16244 the start of .iplt and the one dead store to the stack at the start
16247 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table
*htab
, bfd
*output_bfd
,
16248 asection
*plt
, bfd_vma got_displacement
)
16252 put_arm_insn (htab
, output_bfd
,
16253 elf32_arm_nacl_plt0_entry
[0]
16254 | arm_movw_immediate (got_displacement
),
16255 plt
->contents
+ 0);
16256 put_arm_insn (htab
, output_bfd
,
16257 elf32_arm_nacl_plt0_entry
[1]
16258 | arm_movt_immediate (got_displacement
),
16259 plt
->contents
+ 4);
16261 for (i
= 2; i
< ARRAY_SIZE (elf32_arm_nacl_plt0_entry
); ++i
)
16262 put_arm_insn (htab
, output_bfd
,
16263 elf32_arm_nacl_plt0_entry
[i
],
16264 plt
->contents
+ (i
* 4));
16267 /* Finish up the dynamic sections. */
16270 elf32_arm_finish_dynamic_sections (bfd
* output_bfd
, struct bfd_link_info
* info
)
16275 struct elf32_arm_link_hash_table
*htab
;
16277 htab
= elf32_arm_hash_table (info
);
16281 dynobj
= elf_hash_table (info
)->dynobj
;
16283 sgot
= htab
->root
.sgotplt
;
16284 /* A broken linker script might have discarded the dynamic sections.
16285 Catch this here so that we do not seg-fault later on. */
16286 if (sgot
!= NULL
&& bfd_is_abs_section (sgot
->output_section
))
16288 sdyn
= bfd_get_linker_section (dynobj
, ".dynamic");
16290 if (elf_hash_table (info
)->dynamic_sections_created
)
16293 Elf32_External_Dyn
*dyncon
, *dynconend
;
16295 splt
= htab
->root
.splt
;
16296 BFD_ASSERT (splt
!= NULL
&& sdyn
!= NULL
);
16297 BFD_ASSERT (htab
->symbian_p
|| sgot
!= NULL
);
16299 dyncon
= (Elf32_External_Dyn
*) sdyn
->contents
;
16300 dynconend
= (Elf32_External_Dyn
*) (sdyn
->contents
+ sdyn
->size
);
16302 for (; dyncon
< dynconend
; dyncon
++)
16304 Elf_Internal_Dyn dyn
;
16308 bfd_elf32_swap_dyn_in (dynobj
, dyncon
, &dyn
);
16315 if (htab
->vxworks_p
16316 && elf_vxworks_finish_dynamic_entry (output_bfd
, &dyn
))
16317 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
16322 goto get_vma_if_bpabi
;
16325 goto get_vma_if_bpabi
;
16328 goto get_vma_if_bpabi
;
16330 name
= ".gnu.version";
16331 goto get_vma_if_bpabi
;
16333 name
= ".gnu.version_d";
16334 goto get_vma_if_bpabi
;
16336 name
= ".gnu.version_r";
16337 goto get_vma_if_bpabi
;
16340 name
= htab
->symbian_p
? ".got" : ".got.plt";
16343 name
= RELOC_SECTION (htab
, ".plt");
16345 s
= bfd_get_linker_section (dynobj
, name
);
16349 (_("could not find section %s"), name
);
16350 bfd_set_error (bfd_error_invalid_operation
);
16353 if (!htab
->symbian_p
)
16354 dyn
.d_un
.d_ptr
= s
->output_section
->vma
+ s
->output_offset
;
16356 /* In the BPABI, tags in the PT_DYNAMIC section point
16357 at the file offset, not the memory address, for the
16358 convenience of the post linker. */
16359 dyn
.d_un
.d_ptr
= s
->output_section
->filepos
+ s
->output_offset
;
16360 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
16364 if (htab
->symbian_p
)
16369 s
= htab
->root
.srelplt
;
16370 BFD_ASSERT (s
!= NULL
);
16371 dyn
.d_un
.d_val
= s
->size
;
16372 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
16379 /* In the BPABI, the DT_REL tag must point at the file
16380 offset, not the VMA, of the first relocation
16381 section. So, we use code similar to that in
16382 elflink.c, but do not check for SHF_ALLOC on the
16383 relocation section, since relocation sections are
16384 never allocated under the BPABI. PLT relocs are also
16386 if (htab
->symbian_p
)
16389 type
= ((dyn
.d_tag
== DT_REL
|| dyn
.d_tag
== DT_RELSZ
)
16390 ? SHT_REL
: SHT_RELA
);
16391 dyn
.d_un
.d_val
= 0;
16392 for (i
= 1; i
< elf_numsections (output_bfd
); i
++)
16394 Elf_Internal_Shdr
*hdr
16395 = elf_elfsections (output_bfd
)[i
];
16396 if (hdr
->sh_type
== type
)
16398 if (dyn
.d_tag
== DT_RELSZ
16399 || dyn
.d_tag
== DT_RELASZ
)
16400 dyn
.d_un
.d_val
+= hdr
->sh_size
;
16401 else if ((ufile_ptr
) hdr
->sh_offset
16402 <= dyn
.d_un
.d_val
- 1)
16403 dyn
.d_un
.d_val
= hdr
->sh_offset
;
16406 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
16410 case DT_TLSDESC_PLT
:
16411 s
= htab
->root
.splt
;
16412 dyn
.d_un
.d_ptr
= (s
->output_section
->vma
+ s
->output_offset
16413 + htab
->dt_tlsdesc_plt
);
16414 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
16417 case DT_TLSDESC_GOT
:
16418 s
= htab
->root
.sgot
;
16419 dyn
.d_un
.d_ptr
= (s
->output_section
->vma
+ s
->output_offset
16420 + htab
->dt_tlsdesc_got
);
16421 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
16424 /* Set the bottom bit of DT_INIT/FINI if the
16425 corresponding function is Thumb. */
16427 name
= info
->init_function
;
16430 name
= info
->fini_function
;
16432 /* If it wasn't set by elf_bfd_final_link
16433 then there is nothing to adjust. */
16434 if (dyn
.d_un
.d_val
!= 0)
16436 struct elf_link_hash_entry
* eh
;
16438 eh
= elf_link_hash_lookup (elf_hash_table (info
), name
,
16439 FALSE
, FALSE
, TRUE
);
16441 && ARM_GET_SYM_BRANCH_TYPE (eh
->target_internal
)
16442 == ST_BRANCH_TO_THUMB
)
16444 dyn
.d_un
.d_val
|= 1;
16445 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
16452 /* Fill in the first entry in the procedure linkage table. */
16453 if (splt
->size
> 0 && htab
->plt_header_size
)
16455 const bfd_vma
*plt0_entry
;
16456 bfd_vma got_address
, plt_address
, got_displacement
;
16458 /* Calculate the addresses of the GOT and PLT. */
16459 got_address
= sgot
->output_section
->vma
+ sgot
->output_offset
;
16460 plt_address
= splt
->output_section
->vma
+ splt
->output_offset
;
16462 if (htab
->vxworks_p
)
16464 /* The VxWorks GOT is relocated by the dynamic linker.
16465 Therefore, we must emit relocations rather than simply
16466 computing the values now. */
16467 Elf_Internal_Rela rel
;
16469 plt0_entry
= elf32_arm_vxworks_exec_plt0_entry
;
16470 put_arm_insn (htab
, output_bfd
, plt0_entry
[0],
16471 splt
->contents
+ 0);
16472 put_arm_insn (htab
, output_bfd
, plt0_entry
[1],
16473 splt
->contents
+ 4);
16474 put_arm_insn (htab
, output_bfd
, plt0_entry
[2],
16475 splt
->contents
+ 8);
16476 bfd_put_32 (output_bfd
, got_address
, splt
->contents
+ 12);
16478 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
16479 rel
.r_offset
= plt_address
+ 12;
16480 rel
.r_info
= ELF32_R_INFO (htab
->root
.hgot
->indx
, R_ARM_ABS32
);
16482 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
,
16483 htab
->srelplt2
->contents
);
16485 else if (htab
->nacl_p
)
16486 arm_nacl_put_plt0 (htab
, output_bfd
, splt
,
16487 got_address
+ 8 - (plt_address
+ 16));
16488 else if (using_thumb_only (htab
))
16490 got_displacement
= got_address
- (plt_address
+ 12);
16492 plt0_entry
= elf32_thumb2_plt0_entry
;
16493 put_arm_insn (htab
, output_bfd
, plt0_entry
[0],
16494 splt
->contents
+ 0);
16495 put_arm_insn (htab
, output_bfd
, plt0_entry
[1],
16496 splt
->contents
+ 4);
16497 put_arm_insn (htab
, output_bfd
, plt0_entry
[2],
16498 splt
->contents
+ 8);
16500 bfd_put_32 (output_bfd
, got_displacement
, splt
->contents
+ 12);
16504 got_displacement
= got_address
- (plt_address
+ 16);
16506 plt0_entry
= elf32_arm_plt0_entry
;
16507 put_arm_insn (htab
, output_bfd
, plt0_entry
[0],
16508 splt
->contents
+ 0);
16509 put_arm_insn (htab
, output_bfd
, plt0_entry
[1],
16510 splt
->contents
+ 4);
16511 put_arm_insn (htab
, output_bfd
, plt0_entry
[2],
16512 splt
->contents
+ 8);
16513 put_arm_insn (htab
, output_bfd
, plt0_entry
[3],
16514 splt
->contents
+ 12);
16516 #ifdef FOUR_WORD_PLT
16517 /* The displacement value goes in the otherwise-unused
16518 last word of the second entry. */
16519 bfd_put_32 (output_bfd
, got_displacement
, splt
->contents
+ 28);
16521 bfd_put_32 (output_bfd
, got_displacement
, splt
->contents
+ 16);
16526 /* UnixWare sets the entsize of .plt to 4, although that doesn't
16527 really seem like the right value. */
16528 if (splt
->output_section
->owner
== output_bfd
)
16529 elf_section_data (splt
->output_section
)->this_hdr
.sh_entsize
= 4;
16531 if (htab
->dt_tlsdesc_plt
)
16533 bfd_vma got_address
16534 = sgot
->output_section
->vma
+ sgot
->output_offset
;
16535 bfd_vma gotplt_address
= (htab
->root
.sgot
->output_section
->vma
16536 + htab
->root
.sgot
->output_offset
);
16537 bfd_vma plt_address
16538 = splt
->output_section
->vma
+ splt
->output_offset
;
16540 arm_put_trampoline (htab
, output_bfd
,
16541 splt
->contents
+ htab
->dt_tlsdesc_plt
,
16542 dl_tlsdesc_lazy_trampoline
, 6);
16544 bfd_put_32 (output_bfd
,
16545 gotplt_address
+ htab
->dt_tlsdesc_got
16546 - (plt_address
+ htab
->dt_tlsdesc_plt
)
16547 - dl_tlsdesc_lazy_trampoline
[6],
16548 splt
->contents
+ htab
->dt_tlsdesc_plt
+ 24);
16549 bfd_put_32 (output_bfd
,
16550 got_address
- (plt_address
+ htab
->dt_tlsdesc_plt
)
16551 - dl_tlsdesc_lazy_trampoline
[7],
16552 splt
->contents
+ htab
->dt_tlsdesc_plt
+ 24 + 4);
16555 if (htab
->tls_trampoline
)
16557 arm_put_trampoline (htab
, output_bfd
,
16558 splt
->contents
+ htab
->tls_trampoline
,
16559 tls_trampoline
, 3);
16560 #ifdef FOUR_WORD_PLT
16561 bfd_put_32 (output_bfd
, 0x00000000,
16562 splt
->contents
+ htab
->tls_trampoline
+ 12);
16566 if (htab
->vxworks_p
16567 && !bfd_link_pic (info
)
16568 && htab
->root
.splt
->size
> 0)
16570 /* Correct the .rel(a).plt.unloaded relocations. They will have
16571 incorrect symbol indexes. */
16575 num_plts
= ((htab
->root
.splt
->size
- htab
->plt_header_size
)
16576 / htab
->plt_entry_size
);
16577 p
= htab
->srelplt2
->contents
+ RELOC_SIZE (htab
);
16579 for (; num_plts
; num_plts
--)
16581 Elf_Internal_Rela rel
;
16583 SWAP_RELOC_IN (htab
) (output_bfd
, p
, &rel
);
16584 rel
.r_info
= ELF32_R_INFO (htab
->root
.hgot
->indx
, R_ARM_ABS32
);
16585 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, p
);
16586 p
+= RELOC_SIZE (htab
);
16588 SWAP_RELOC_IN (htab
) (output_bfd
, p
, &rel
);
16589 rel
.r_info
= ELF32_R_INFO (htab
->root
.hplt
->indx
, R_ARM_ABS32
);
16590 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, p
);
16591 p
+= RELOC_SIZE (htab
);
16596 if (htab
->nacl_p
&& htab
->root
.iplt
!= NULL
&& htab
->root
.iplt
->size
> 0)
16597 /* NaCl uses a special first entry in .iplt too. */
16598 arm_nacl_put_plt0 (htab
, output_bfd
, htab
->root
.iplt
, 0);
16600 /* Fill in the first three entries in the global offset table. */
16603 if (sgot
->size
> 0)
16606 bfd_put_32 (output_bfd
, (bfd_vma
) 0, sgot
->contents
);
16608 bfd_put_32 (output_bfd
,
16609 sdyn
->output_section
->vma
+ sdyn
->output_offset
,
16611 bfd_put_32 (output_bfd
, (bfd_vma
) 0, sgot
->contents
+ 4);
16612 bfd_put_32 (output_bfd
, (bfd_vma
) 0, sgot
->contents
+ 8);
16615 elf_section_data (sgot
->output_section
)->this_hdr
.sh_entsize
= 4;
16622 elf32_arm_post_process_headers (bfd
* abfd
, struct bfd_link_info
* link_info ATTRIBUTE_UNUSED
)
16624 Elf_Internal_Ehdr
* i_ehdrp
; /* ELF file header, internal form. */
16625 struct elf32_arm_link_hash_table
*globals
;
16626 struct elf_segment_map
*m
;
16628 i_ehdrp
= elf_elfheader (abfd
);
16630 if (EF_ARM_EABI_VERSION (i_ehdrp
->e_flags
) == EF_ARM_EABI_UNKNOWN
)
16631 i_ehdrp
->e_ident
[EI_OSABI
] = ELFOSABI_ARM
;
16633 _bfd_elf_post_process_headers (abfd
, link_info
);
16634 i_ehdrp
->e_ident
[EI_ABIVERSION
] = ARM_ELF_ABI_VERSION
;
16638 globals
= elf32_arm_hash_table (link_info
);
16639 if (globals
!= NULL
&& globals
->byteswap_code
)
16640 i_ehdrp
->e_flags
|= EF_ARM_BE8
;
16643 if (EF_ARM_EABI_VERSION (i_ehdrp
->e_flags
) == EF_ARM_EABI_VER5
16644 && ((i_ehdrp
->e_type
== ET_DYN
) || (i_ehdrp
->e_type
== ET_EXEC
)))
16646 int abi
= bfd_elf_get_obj_attr_int (abfd
, OBJ_ATTR_PROC
, Tag_ABI_VFP_args
);
16647 if (abi
== AEABI_VFP_args_vfp
)
16648 i_ehdrp
->e_flags
|= EF_ARM_ABI_FLOAT_HARD
;
16650 i_ehdrp
->e_flags
|= EF_ARM_ABI_FLOAT_SOFT
;
16653 /* Scan segment to set p_flags attribute if it contains only sections with
16654 SHF_ARM_PURECODE flag. */
16655 for (m
= elf_seg_map (abfd
); m
!= NULL
; m
= m
->next
)
16661 for (j
= 0; j
< m
->count
; j
++)
16663 if (!(elf_section_flags (m
->sections
[j
]) & SHF_ARM_PURECODE
))
16669 m
->p_flags_valid
= 1;
16674 static enum elf_reloc_type_class
16675 elf32_arm_reloc_type_class (const struct bfd_link_info
*info ATTRIBUTE_UNUSED
,
16676 const asection
*rel_sec ATTRIBUTE_UNUSED
,
16677 const Elf_Internal_Rela
*rela
)
16679 switch ((int) ELF32_R_TYPE (rela
->r_info
))
16681 case R_ARM_RELATIVE
:
16682 return reloc_class_relative
;
16683 case R_ARM_JUMP_SLOT
:
16684 return reloc_class_plt
;
16686 return reloc_class_copy
;
16687 case R_ARM_IRELATIVE
:
16688 return reloc_class_ifunc
;
16690 return reloc_class_normal
;
16695 elf32_arm_final_write_processing (bfd
*abfd
, bfd_boolean linker ATTRIBUTE_UNUSED
)
16697 bfd_arm_update_notes (abfd
, ARM_NOTE_SECTION
);
16700 /* Return TRUE if this is an unwinding table entry. */
16703 is_arm_elf_unwind_section_name (bfd
* abfd ATTRIBUTE_UNUSED
, const char * name
)
16705 return (CONST_STRNEQ (name
, ELF_STRING_ARM_unwind
)
16706 || CONST_STRNEQ (name
, ELF_STRING_ARM_unwind_once
));
16710 /* Set the type and flags for an ARM section. We do this by
16711 the section name, which is a hack, but ought to work. */
16714 elf32_arm_fake_sections (bfd
* abfd
, Elf_Internal_Shdr
* hdr
, asection
* sec
)
16718 name
= bfd_get_section_name (abfd
, sec
);
16720 if (is_arm_elf_unwind_section_name (abfd
, name
))
16722 hdr
->sh_type
= SHT_ARM_EXIDX
;
16723 hdr
->sh_flags
|= SHF_LINK_ORDER
;
16726 if (sec
->flags
& SEC_ELF_PURECODE
)
16727 hdr
->sh_flags
|= SHF_ARM_PURECODE
;
16732 /* Handle an ARM specific section when reading an object file. This is
16733 called when bfd_section_from_shdr finds a section with an unknown
16737 elf32_arm_section_from_shdr (bfd
*abfd
,
16738 Elf_Internal_Shdr
* hdr
,
16742 /* There ought to be a place to keep ELF backend specific flags, but
16743 at the moment there isn't one. We just keep track of the
16744 sections by their name, instead. Fortunately, the ABI gives
16745 names for all the ARM specific sections, so we will probably get
16747 switch (hdr
->sh_type
)
16749 case SHT_ARM_EXIDX
:
16750 case SHT_ARM_PREEMPTMAP
:
16751 case SHT_ARM_ATTRIBUTES
:
16758 if (! _bfd_elf_make_section_from_shdr (abfd
, hdr
, name
, shindex
))
16764 static _arm_elf_section_data
*
16765 get_arm_elf_section_data (asection
* sec
)
16767 if (sec
&& sec
->owner
&& is_arm_elf (sec
->owner
))
16768 return elf32_arm_section_data (sec
);
16776 struct bfd_link_info
*info
;
16779 int (*func
) (void *, const char *, Elf_Internal_Sym
*,
16780 asection
*, struct elf_link_hash_entry
*);
16781 } output_arch_syminfo
;
16783 enum map_symbol_type
16791 /* Output a single mapping symbol. */
16794 elf32_arm_output_map_sym (output_arch_syminfo
*osi
,
16795 enum map_symbol_type type
,
16798 static const char *names
[3] = {"$a", "$t", "$d"};
16799 Elf_Internal_Sym sym
;
16801 sym
.st_value
= osi
->sec
->output_section
->vma
16802 + osi
->sec
->output_offset
16806 sym
.st_info
= ELF_ST_INFO (STB_LOCAL
, STT_NOTYPE
);
16807 sym
.st_shndx
= osi
->sec_shndx
;
16808 sym
.st_target_internal
= 0;
16809 elf32_arm_section_map_add (osi
->sec
, names
[type
][1], offset
);
16810 return osi
->func (osi
->flaginfo
, names
[type
], &sym
, osi
->sec
, NULL
) == 1;
16813 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
16814 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
16817 elf32_arm_output_plt_map_1 (output_arch_syminfo
*osi
,
16818 bfd_boolean is_iplt_entry_p
,
16819 union gotplt_union
*root_plt
,
16820 struct arm_plt_info
*arm_plt
)
16822 struct elf32_arm_link_hash_table
*htab
;
16823 bfd_vma addr
, plt_header_size
;
16825 if (root_plt
->offset
== (bfd_vma
) -1)
16828 htab
= elf32_arm_hash_table (osi
->info
);
16832 if (is_iplt_entry_p
)
16834 osi
->sec
= htab
->root
.iplt
;
16835 plt_header_size
= 0;
16839 osi
->sec
= htab
->root
.splt
;
16840 plt_header_size
= htab
->plt_header_size
;
16842 osi
->sec_shndx
= (_bfd_elf_section_from_bfd_section
16843 (osi
->info
->output_bfd
, osi
->sec
->output_section
));
16845 addr
= root_plt
->offset
& -2;
16846 if (htab
->symbian_p
)
16848 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
16850 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 4))
16853 else if (htab
->vxworks_p
)
16855 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
16857 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 8))
16859 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
+ 12))
16861 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 20))
16864 else if (htab
->nacl_p
)
16866 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
16869 else if (using_thumb_only (htab
))
16871 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_THUMB
, addr
))
16876 bfd_boolean thumb_stub_p
;
16878 thumb_stub_p
= elf32_arm_plt_needs_thumb_stub_p (osi
->info
, arm_plt
);
16881 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_THUMB
, addr
- 4))
16884 #ifdef FOUR_WORD_PLT
16885 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
16887 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 12))
16890 /* A three-word PLT with no Thumb thunk contains only Arm code,
16891 so only need to output a mapping symbol for the first PLT entry and
16892 entries with thumb thunks. */
16893 if (thumb_stub_p
|| addr
== plt_header_size
)
16895 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
16904 /* Output mapping symbols for PLT entries associated with H. */
16907 elf32_arm_output_plt_map (struct elf_link_hash_entry
*h
, void *inf
)
16909 output_arch_syminfo
*osi
= (output_arch_syminfo
*) inf
;
16910 struct elf32_arm_link_hash_entry
*eh
;
16912 if (h
->root
.type
== bfd_link_hash_indirect
)
16915 if (h
->root
.type
== bfd_link_hash_warning
)
16916 /* When warning symbols are created, they **replace** the "real"
16917 entry in the hash table, thus we never get to see the real
16918 symbol in a hash traversal. So look at it now. */
16919 h
= (struct elf_link_hash_entry
*) h
->root
.u
.i
.link
;
16921 eh
= (struct elf32_arm_link_hash_entry
*) h
;
16922 return elf32_arm_output_plt_map_1 (osi
, SYMBOL_CALLS_LOCAL (osi
->info
, h
),
16923 &h
->plt
, &eh
->plt
);
16926 /* Bind a veneered symbol to its veneer identified by its hash entry
16927 STUB_ENTRY. The veneered location thus loose its symbol. */
16930 arm_stub_claim_sym (struct elf32_arm_stub_hash_entry
*stub_entry
)
16932 struct elf32_arm_link_hash_entry
*hash
= stub_entry
->h
;
16935 hash
->root
.root
.u
.def
.section
= stub_entry
->stub_sec
;
16936 hash
->root
.root
.u
.def
.value
= stub_entry
->stub_offset
;
16937 hash
->root
.size
= stub_entry
->stub_size
;
16940 /* Output a single local symbol for a generated stub. */
16943 elf32_arm_output_stub_sym (output_arch_syminfo
*osi
, const char *name
,
16944 bfd_vma offset
, bfd_vma size
)
16946 Elf_Internal_Sym sym
;
16948 sym
.st_value
= osi
->sec
->output_section
->vma
16949 + osi
->sec
->output_offset
16951 sym
.st_size
= size
;
16953 sym
.st_info
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
16954 sym
.st_shndx
= osi
->sec_shndx
;
16955 sym
.st_target_internal
= 0;
16956 return osi
->func (osi
->flaginfo
, name
, &sym
, osi
->sec
, NULL
) == 1;
16960 arm_map_one_stub (struct bfd_hash_entry
* gen_entry
,
16963 struct elf32_arm_stub_hash_entry
*stub_entry
;
16964 asection
*stub_sec
;
16967 output_arch_syminfo
*osi
;
16968 const insn_sequence
*template_sequence
;
16969 enum stub_insn_type prev_type
;
16972 enum map_symbol_type sym_type
;
16974 /* Massage our args to the form they really have. */
16975 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
16976 osi
= (output_arch_syminfo
*) in_arg
;
16978 stub_sec
= stub_entry
->stub_sec
;
16980 /* Ensure this stub is attached to the current section being
16982 if (stub_sec
!= osi
->sec
)
16985 addr
= (bfd_vma
) stub_entry
->stub_offset
;
16986 template_sequence
= stub_entry
->stub_template
;
16988 if (arm_stub_sym_claimed (stub_entry
->stub_type
))
16989 arm_stub_claim_sym (stub_entry
);
16992 stub_name
= stub_entry
->output_name
;
16993 switch (template_sequence
[0].type
)
16996 if (!elf32_arm_output_stub_sym (osi
, stub_name
, addr
,
16997 stub_entry
->stub_size
))
17002 if (!elf32_arm_output_stub_sym (osi
, stub_name
, addr
| 1,
17003 stub_entry
->stub_size
))
17012 prev_type
= DATA_TYPE
;
17014 for (i
= 0; i
< stub_entry
->stub_template_size
; i
++)
17016 switch (template_sequence
[i
].type
)
17019 sym_type
= ARM_MAP_ARM
;
17024 sym_type
= ARM_MAP_THUMB
;
17028 sym_type
= ARM_MAP_DATA
;
17036 if (template_sequence
[i
].type
!= prev_type
)
17038 prev_type
= template_sequence
[i
].type
;
17039 if (!elf32_arm_output_map_sym (osi
, sym_type
, addr
+ size
))
17043 switch (template_sequence
[i
].type
)
17067 /* Output mapping symbols for linker generated sections,
17068 and for those data-only sections that do not have a
17072 elf32_arm_output_arch_local_syms (bfd
*output_bfd
,
17073 struct bfd_link_info
*info
,
17075 int (*func
) (void *, const char *,
17076 Elf_Internal_Sym
*,
17078 struct elf_link_hash_entry
*))
17080 output_arch_syminfo osi
;
17081 struct elf32_arm_link_hash_table
*htab
;
17083 bfd_size_type size
;
17086 htab
= elf32_arm_hash_table (info
);
17090 check_use_blx (htab
);
17092 osi
.flaginfo
= flaginfo
;
17096 /* Add a $d mapping symbol to data-only sections that
17097 don't have any mapping symbol. This may result in (harmless) redundant
17098 mapping symbols. */
17099 for (input_bfd
= info
->input_bfds
;
17101 input_bfd
= input_bfd
->link
.next
)
17103 if ((input_bfd
->flags
& (BFD_LINKER_CREATED
| HAS_SYMS
)) == HAS_SYMS
)
17104 for (osi
.sec
= input_bfd
->sections
;
17106 osi
.sec
= osi
.sec
->next
)
17108 if (osi
.sec
->output_section
!= NULL
17109 && ((osi
.sec
->output_section
->flags
& (SEC_ALLOC
| SEC_CODE
))
17111 && (osi
.sec
->flags
& (SEC_HAS_CONTENTS
| SEC_LINKER_CREATED
))
17112 == SEC_HAS_CONTENTS
17113 && get_arm_elf_section_data (osi
.sec
) != NULL
17114 && get_arm_elf_section_data (osi
.sec
)->mapcount
== 0
17115 && osi
.sec
->size
> 0
17116 && (osi
.sec
->flags
& SEC_EXCLUDE
) == 0)
17118 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
17119 (output_bfd
, osi
.sec
->output_section
);
17120 if (osi
.sec_shndx
!= (int)SHN_BAD
)
17121 elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, 0);
17126 /* ARM->Thumb glue. */
17127 if (htab
->arm_glue_size
> 0)
17129 osi
.sec
= bfd_get_linker_section (htab
->bfd_of_glue_owner
,
17130 ARM2THUMB_GLUE_SECTION_NAME
);
17132 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
17133 (output_bfd
, osi
.sec
->output_section
);
17134 if (bfd_link_pic (info
) || htab
->root
.is_relocatable_executable
17135 || htab
->pic_veneer
)
17136 size
= ARM2THUMB_PIC_GLUE_SIZE
;
17137 else if (htab
->use_blx
)
17138 size
= ARM2THUMB_V5_STATIC_GLUE_SIZE
;
17140 size
= ARM2THUMB_STATIC_GLUE_SIZE
;
17142 for (offset
= 0; offset
< htab
->arm_glue_size
; offset
+= size
)
17144 elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, offset
);
17145 elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, offset
+ size
- 4);
17149 /* Thumb->ARM glue. */
17150 if (htab
->thumb_glue_size
> 0)
17152 osi
.sec
= bfd_get_linker_section (htab
->bfd_of_glue_owner
,
17153 THUMB2ARM_GLUE_SECTION_NAME
);
17155 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
17156 (output_bfd
, osi
.sec
->output_section
);
17157 size
= THUMB2ARM_GLUE_SIZE
;
17159 for (offset
= 0; offset
< htab
->thumb_glue_size
; offset
+= size
)
17161 elf32_arm_output_map_sym (&osi
, ARM_MAP_THUMB
, offset
);
17162 elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, offset
+ 4);
17166 /* ARMv4 BX veneers. */
17167 if (htab
->bx_glue_size
> 0)
17169 osi
.sec
= bfd_get_linker_section (htab
->bfd_of_glue_owner
,
17170 ARM_BX_GLUE_SECTION_NAME
);
17172 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
17173 (output_bfd
, osi
.sec
->output_section
);
17175 elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0);
17178 /* Long calls stubs. */
17179 if (htab
->stub_bfd
&& htab
->stub_bfd
->sections
)
17181 asection
* stub_sec
;
17183 for (stub_sec
= htab
->stub_bfd
->sections
;
17185 stub_sec
= stub_sec
->next
)
17187 /* Ignore non-stub sections. */
17188 if (!strstr (stub_sec
->name
, STUB_SUFFIX
))
17191 osi
.sec
= stub_sec
;
17193 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
17194 (output_bfd
, osi
.sec
->output_section
);
17196 bfd_hash_traverse (&htab
->stub_hash_table
, arm_map_one_stub
, &osi
);
17200 /* Finally, output mapping symbols for the PLT. */
17201 if (htab
->root
.splt
&& htab
->root
.splt
->size
> 0)
17203 osi
.sec
= htab
->root
.splt
;
17204 osi
.sec_shndx
= (_bfd_elf_section_from_bfd_section
17205 (output_bfd
, osi
.sec
->output_section
));
17207 /* Output mapping symbols for the plt header. SymbianOS does not have a
17209 if (htab
->vxworks_p
)
17211 /* VxWorks shared libraries have no PLT header. */
17212 if (!bfd_link_pic (info
))
17214 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0))
17216 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, 12))
17220 else if (htab
->nacl_p
)
17222 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0))
17225 else if (using_thumb_only (htab
))
17227 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_THUMB
, 0))
17229 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, 12))
17231 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_THUMB
, 16))
17234 else if (!htab
->symbian_p
)
17236 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0))
17238 #ifndef FOUR_WORD_PLT
17239 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, 16))
17244 if (htab
->nacl_p
&& htab
->root
.iplt
&& htab
->root
.iplt
->size
> 0)
17246 /* NaCl uses a special first entry in .iplt too. */
17247 osi
.sec
= htab
->root
.iplt
;
17248 osi
.sec_shndx
= (_bfd_elf_section_from_bfd_section
17249 (output_bfd
, osi
.sec
->output_section
));
17250 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0))
17253 if ((htab
->root
.splt
&& htab
->root
.splt
->size
> 0)
17254 || (htab
->root
.iplt
&& htab
->root
.iplt
->size
> 0))
17256 elf_link_hash_traverse (&htab
->root
, elf32_arm_output_plt_map
, &osi
);
17257 for (input_bfd
= info
->input_bfds
;
17259 input_bfd
= input_bfd
->link
.next
)
17261 struct arm_local_iplt_info
**local_iplt
;
17262 unsigned int i
, num_syms
;
17264 local_iplt
= elf32_arm_local_iplt (input_bfd
);
17265 if (local_iplt
!= NULL
)
17267 num_syms
= elf_symtab_hdr (input_bfd
).sh_info
;
17268 for (i
= 0; i
< num_syms
; i
++)
17269 if (local_iplt
[i
] != NULL
17270 && !elf32_arm_output_plt_map_1 (&osi
, TRUE
,
17271 &local_iplt
[i
]->root
,
17272 &local_iplt
[i
]->arm
))
17277 if (htab
->dt_tlsdesc_plt
!= 0)
17279 /* Mapping symbols for the lazy tls trampoline. */
17280 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, htab
->dt_tlsdesc_plt
))
17283 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
,
17284 htab
->dt_tlsdesc_plt
+ 24))
17287 if (htab
->tls_trampoline
!= 0)
17289 /* Mapping symbols for the tls trampoline. */
17290 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, htab
->tls_trampoline
))
17292 #ifdef FOUR_WORD_PLT
17293 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
,
17294 htab
->tls_trampoline
+ 12))
17302 /* Filter normal symbols of CMSE entry functions of ABFD to include in
17303 the import library. All SYMCOUNT symbols of ABFD can be examined
17304 from their pointers in SYMS. Pointers of symbols to keep should be
17305 stored continuously at the beginning of that array.
17307 Returns the number of symbols to keep. */
17309 static unsigned int
17310 elf32_arm_filter_cmse_symbols (bfd
*abfd ATTRIBUTE_UNUSED
,
17311 struct bfd_link_info
*info
,
17312 asymbol
**syms
, long symcount
)
17316 long src_count
, dst_count
= 0;
17317 struct elf32_arm_link_hash_table
*htab
;
17319 htab
= elf32_arm_hash_table (info
);
17320 if (!htab
->stub_bfd
|| !htab
->stub_bfd
->sections
)
17324 cmse_name
= (char *) bfd_malloc (maxnamelen
);
17325 for (src_count
= 0; src_count
< symcount
; src_count
++)
17327 struct elf32_arm_link_hash_entry
*cmse_hash
;
17333 sym
= syms
[src_count
];
17334 flags
= sym
->flags
;
17335 name
= (char *) bfd_asymbol_name (sym
);
17337 if ((flags
& BSF_FUNCTION
) != BSF_FUNCTION
)
17339 if (!(flags
& (BSF_GLOBAL
| BSF_WEAK
)))
17342 namelen
= strlen (name
) + sizeof (CMSE_PREFIX
) + 1;
17343 if (namelen
> maxnamelen
)
17345 cmse_name
= (char *)
17346 bfd_realloc (cmse_name
, namelen
);
17347 maxnamelen
= namelen
;
17349 snprintf (cmse_name
, maxnamelen
, "%s%s", CMSE_PREFIX
, name
);
17350 cmse_hash
= (struct elf32_arm_link_hash_entry
*)
17351 elf_link_hash_lookup (&(htab
)->root
, cmse_name
, FALSE
, FALSE
, TRUE
);
17354 || (cmse_hash
->root
.root
.type
!= bfd_link_hash_defined
17355 && cmse_hash
->root
.root
.type
!= bfd_link_hash_defweak
)
17356 || cmse_hash
->root
.type
!= STT_FUNC
)
17359 if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash
->root
.target_internal
))
17362 syms
[dst_count
++] = sym
;
17366 syms
[dst_count
] = NULL
;
17371 /* Filter symbols of ABFD to include in the import library. All
17372 SYMCOUNT symbols of ABFD can be examined from their pointers in
17373 SYMS. Pointers of symbols to keep should be stored continuously at
17374 the beginning of that array.
17376 Returns the number of symbols to keep. */
17378 static unsigned int
17379 elf32_arm_filter_implib_symbols (bfd
*abfd ATTRIBUTE_UNUSED
,
17380 struct bfd_link_info
*info
,
17381 asymbol
**syms
, long symcount
)
17383 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (info
);
17385 /* Requirement 8 of "ARM v8-M Security Extensions: Requirements on
17386 Development Tools" (ARM-ECM-0359818) mandates Secure Gateway import
17387 library to be a relocatable object file. */
17388 BFD_ASSERT (!(bfd_get_file_flags (info
->out_implib_bfd
) & EXEC_P
));
17389 if (globals
->cmse_implib
)
17390 return elf32_arm_filter_cmse_symbols (abfd
, info
, syms
, symcount
);
17392 return _bfd_elf_filter_global_symbols (abfd
, info
, syms
, symcount
);
17395 /* Allocate target specific section data. */
17398 elf32_arm_new_section_hook (bfd
*abfd
, asection
*sec
)
17400 if (!sec
->used_by_bfd
)
17402 _arm_elf_section_data
*sdata
;
17403 bfd_size_type amt
= sizeof (*sdata
);
17405 sdata
= (_arm_elf_section_data
*) bfd_zalloc (abfd
, amt
);
17408 sec
->used_by_bfd
= sdata
;
17411 return _bfd_elf_new_section_hook (abfd
, sec
);
17415 /* Used to order a list of mapping symbols by address. */
17418 elf32_arm_compare_mapping (const void * a
, const void * b
)
17420 const elf32_arm_section_map
*amap
= (const elf32_arm_section_map
*) a
;
17421 const elf32_arm_section_map
*bmap
= (const elf32_arm_section_map
*) b
;
17423 if (amap
->vma
> bmap
->vma
)
17425 else if (amap
->vma
< bmap
->vma
)
17427 else if (amap
->type
> bmap
->type
)
17428 /* Ensure results do not depend on the host qsort for objects with
17429 multiple mapping symbols at the same address by sorting on type
17432 else if (amap
->type
< bmap
->type
)
17438 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
17440 static unsigned long
17441 offset_prel31 (unsigned long addr
, bfd_vma offset
)
17443 return (addr
& ~0x7ffffffful
) | ((addr
+ offset
) & 0x7ffffffful
);
17446 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
17450 copy_exidx_entry (bfd
*output_bfd
, bfd_byte
*to
, bfd_byte
*from
, bfd_vma offset
)
17452 unsigned long first_word
= bfd_get_32 (output_bfd
, from
);
17453 unsigned long second_word
= bfd_get_32 (output_bfd
, from
+ 4);
17455 /* High bit of first word is supposed to be zero. */
17456 if ((first_word
& 0x80000000ul
) == 0)
17457 first_word
= offset_prel31 (first_word
, offset
);
17459 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
17460 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
17461 if ((second_word
!= 0x1) && ((second_word
& 0x80000000ul
) == 0))
17462 second_word
= offset_prel31 (second_word
, offset
);
17464 bfd_put_32 (output_bfd
, first_word
, to
);
17465 bfd_put_32 (output_bfd
, second_word
, to
+ 4);
17468 /* Data for make_branch_to_a8_stub(). */
17470 struct a8_branch_to_stub_data
17472 asection
*writing_section
;
17473 bfd_byte
*contents
;
17477 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
17478 places for a particular section. */
17481 make_branch_to_a8_stub (struct bfd_hash_entry
*gen_entry
,
17484 struct elf32_arm_stub_hash_entry
*stub_entry
;
17485 struct a8_branch_to_stub_data
*data
;
17486 bfd_byte
*contents
;
17487 unsigned long branch_insn
;
17488 bfd_vma veneered_insn_loc
, veneer_entry_loc
;
17489 bfd_signed_vma branch_offset
;
17493 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
17494 data
= (struct a8_branch_to_stub_data
*) in_arg
;
17496 if (stub_entry
->target_section
!= data
->writing_section
17497 || stub_entry
->stub_type
< arm_stub_a8_veneer_lwm
)
17500 contents
= data
->contents
;
17502 /* We use target_section as Cortex-A8 erratum workaround stubs are only
17503 generated when both source and target are in the same section. */
17504 veneered_insn_loc
= stub_entry
->target_section
->output_section
->vma
17505 + stub_entry
->target_section
->output_offset
17506 + stub_entry
->source_value
;
17508 veneer_entry_loc
= stub_entry
->stub_sec
->output_section
->vma
17509 + stub_entry
->stub_sec
->output_offset
17510 + stub_entry
->stub_offset
;
17512 if (stub_entry
->stub_type
== arm_stub_a8_veneer_blx
)
17513 veneered_insn_loc
&= ~3u;
17515 branch_offset
= veneer_entry_loc
- veneered_insn_loc
- 4;
17517 abfd
= stub_entry
->target_section
->owner
;
17518 loc
= stub_entry
->source_value
;
17520 /* We attempt to avoid this condition by setting stubs_always_after_branch
17521 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
17522 This check is just to be on the safe side... */
17523 if ((veneered_insn_loc
& ~0xfff) == (veneer_entry_loc
& ~0xfff))
17525 _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub is "
17526 "allocated in unsafe location"), abfd
);
17530 switch (stub_entry
->stub_type
)
17532 case arm_stub_a8_veneer_b
:
17533 case arm_stub_a8_veneer_b_cond
:
17534 branch_insn
= 0xf0009000;
17537 case arm_stub_a8_veneer_blx
:
17538 branch_insn
= 0xf000e800;
17541 case arm_stub_a8_veneer_bl
:
17543 unsigned int i1
, j1
, i2
, j2
, s
;
17545 branch_insn
= 0xf000d000;
17548 if (branch_offset
< -16777216 || branch_offset
> 16777214)
17550 /* There's not much we can do apart from complain if this
17552 _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub out "
17553 "of range (input file too large)"), abfd
);
17557 /* i1 = not(j1 eor s), so:
17559 j1 = (not i1) eor s. */
17561 branch_insn
|= (branch_offset
>> 1) & 0x7ff;
17562 branch_insn
|= ((branch_offset
>> 12) & 0x3ff) << 16;
17563 i2
= (branch_offset
>> 22) & 1;
17564 i1
= (branch_offset
>> 23) & 1;
17565 s
= (branch_offset
>> 24) & 1;
17568 branch_insn
|= j2
<< 11;
17569 branch_insn
|= j1
<< 13;
17570 branch_insn
|= s
<< 26;
17579 bfd_put_16 (abfd
, (branch_insn
>> 16) & 0xffff, &contents
[loc
]);
17580 bfd_put_16 (abfd
, branch_insn
& 0xffff, &contents
[loc
+ 2]);
17585 /* Beginning of stm32l4xx work-around. */
17587 /* Functions encoding instructions necessary for the emission of the
17588 fix-stm32l4xx-629360.
17589 Encoding is extracted from the
17590 ARM (C) Architecture Reference Manual
17591 ARMv7-A and ARMv7-R edition
17592 ARM DDI 0406C.b (ID072512). */
17594 static inline bfd_vma
17595 create_instruction_branch_absolute (int branch_offset
)
17597 /* A8.8.18 B (A8-334)
17598 B target_address (Encoding T4). */
17599 /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii. */
17600 /* jump offset is: S:I1:I2:imm10:imm11:0. */
17601 /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S). */
17603 int s
= ((branch_offset
& 0x1000000) >> 24);
17604 int j1
= s
^ !((branch_offset
& 0x800000) >> 23);
17605 int j2
= s
^ !((branch_offset
& 0x400000) >> 22);
17607 if (branch_offset
< -(1 << 24) || branch_offset
>= (1 << 24))
17608 BFD_ASSERT (0 && "Error: branch out of range. Cannot create branch.");
17610 bfd_vma patched_inst
= 0xf0009000
17612 | (((unsigned long) (branch_offset
) >> 12) & 0x3ff) << 16 /* imm10. */
17613 | j1
<< 13 /* J1. */
17614 | j2
<< 11 /* J2. */
17615 | (((unsigned long) (branch_offset
) >> 1) & 0x7ff); /* imm11. */
17617 return patched_inst
;
17620 static inline bfd_vma
17621 create_instruction_ldmia (int base_reg
, int wback
, int reg_mask
)
17623 /* A8.8.57 LDM/LDMIA/LDMFD (A8-396)
17624 LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2). */
17625 bfd_vma patched_inst
= 0xe8900000
17626 | (/*W=*/wback
<< 21)
17628 | (reg_mask
& 0x0000ffff);
17630 return patched_inst
;
17633 static inline bfd_vma
17634 create_instruction_ldmdb (int base_reg
, int wback
, int reg_mask
)
17636 /* A8.8.60 LDMDB/LDMEA (A8-402)
17637 LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1). */
17638 bfd_vma patched_inst
= 0xe9100000
17639 | (/*W=*/wback
<< 21)
17641 | (reg_mask
& 0x0000ffff);
17643 return patched_inst
;
17646 static inline bfd_vma
17647 create_instruction_mov (int target_reg
, int source_reg
)
17649 /* A8.8.103 MOV (register) (A8-486)
17650 MOV Rd, Rm (Encoding T1). */
17651 bfd_vma patched_inst
= 0x4600
17652 | (target_reg
& 0x7)
17653 | ((target_reg
& 0x8) >> 3) << 7
17654 | (source_reg
<< 3);
17656 return patched_inst
;
17659 static inline bfd_vma
17660 create_instruction_sub (int target_reg
, int source_reg
, int value
)
17662 /* A8.8.221 SUB (immediate) (A8-708)
17663 SUB Rd, Rn, #value (Encoding T3). */
17664 bfd_vma patched_inst
= 0xf1a00000
17665 | (target_reg
<< 8)
17666 | (source_reg
<< 16)
17668 | ((value
& 0x800) >> 11) << 26
17669 | ((value
& 0x700) >> 8) << 12
17672 return patched_inst
;
17675 static inline bfd_vma
17676 create_instruction_vldmia (int base_reg
, int is_dp
, int wback
, int num_words
,
17679 /* A8.8.332 VLDM (A8-922)
17680 VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */
17681 bfd_vma patched_inst
= (is_dp
? 0xec900b00 : 0xec900a00)
17682 | (/*W=*/wback
<< 21)
17684 | (num_words
& 0x000000ff)
17685 | (((unsigned)first_reg
>> 1) & 0x0000000f) << 12
17686 | (first_reg
& 0x00000001) << 22;
17688 return patched_inst
;
17691 static inline bfd_vma
17692 create_instruction_vldmdb (int base_reg
, int is_dp
, int num_words
,
17695 /* A8.8.332 VLDM (A8-922)
17696 VLMD{MODE} Rn!, {} (Encoding T1 or T2). */
17697 bfd_vma patched_inst
= (is_dp
? 0xed300b00 : 0xed300a00)
17699 | (num_words
& 0x000000ff)
17700 | (((unsigned)first_reg
>>1 ) & 0x0000000f) << 12
17701 | (first_reg
& 0x00000001) << 22;
17703 return patched_inst
;
17706 static inline bfd_vma
17707 create_instruction_udf_w (int value
)
17709 /* A8.8.247 UDF (A8-758)
17710 Undefined (Encoding T2). */
17711 bfd_vma patched_inst
= 0xf7f0a000
17712 | (value
& 0x00000fff)
17713 | (value
& 0x000f0000) << 16;
17715 return patched_inst
;
17718 static inline bfd_vma
17719 create_instruction_udf (int value
)
17721 /* A8.8.247 UDF (A8-758)
17722 Undefined (Encoding T1). */
17723 bfd_vma patched_inst
= 0xde00
17726 return patched_inst
;
17729 /* Functions writing an instruction in memory, returning the next
17730 memory position to write to. */
17732 static inline bfd_byte
*
17733 push_thumb2_insn32 (struct elf32_arm_link_hash_table
* htab
,
17734 bfd
* output_bfd
, bfd_byte
*pt
, insn32 insn
)
17736 put_thumb2_insn (htab
, output_bfd
, insn
, pt
);
17740 static inline bfd_byte
*
17741 push_thumb2_insn16 (struct elf32_arm_link_hash_table
* htab
,
17742 bfd
* output_bfd
, bfd_byte
*pt
, insn32 insn
)
17744 put_thumb_insn (htab
, output_bfd
, insn
, pt
);
17748 /* Function filling up a region in memory with T1 and T2 UDFs taking
17749 care of alignment. */
17752 stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table
* htab
,
17754 const bfd_byte
* const base_stub_contents
,
17755 bfd_byte
* const from_stub_contents
,
17756 const bfd_byte
* const end_stub_contents
)
17758 bfd_byte
*current_stub_contents
= from_stub_contents
;
17760 /* Fill the remaining of the stub with deterministic contents : UDF
17762 Check if realignment is needed on modulo 4 frontier using T1, to
17764 if ((current_stub_contents
< end_stub_contents
)
17765 && !((current_stub_contents
- base_stub_contents
) % 2)
17766 && ((current_stub_contents
- base_stub_contents
) % 4))
17767 current_stub_contents
=
17768 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
17769 create_instruction_udf (0));
17771 for (; current_stub_contents
< end_stub_contents
;)
17772 current_stub_contents
=
17773 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17774 create_instruction_udf_w (0));
17776 return current_stub_contents
;
17779 /* Functions writing the stream of instructions equivalent to the
17780 derived sequence for ldmia, ldmdb, vldm respectively. */
17783 stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table
* htab
,
17785 const insn32 initial_insn
,
17786 const bfd_byte
*const initial_insn_addr
,
17787 bfd_byte
*const base_stub_contents
)
17789 int wback
= (initial_insn
& 0x00200000) >> 21;
17790 int ri
, rn
= (initial_insn
& 0x000F0000) >> 16;
17791 int insn_all_registers
= initial_insn
& 0x0000ffff;
17792 int insn_low_registers
, insn_high_registers
;
17793 int usable_register_mask
;
17794 int nb_registers
= elf32_arm_popcount (insn_all_registers
);
17795 int restore_pc
= (insn_all_registers
& (1 << 15)) ? 1 : 0;
17796 int restore_rn
= (insn_all_registers
& (1 << rn
)) ? 1 : 0;
17797 bfd_byte
*current_stub_contents
= base_stub_contents
;
17799 BFD_ASSERT (is_thumb2_ldmia (initial_insn
));
17801 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
17802 smaller than 8 registers load sequences that do not cause the
17804 if (nb_registers
<= 8)
17806 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
17807 current_stub_contents
=
17808 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17811 /* B initial_insn_addr+4. */
17813 current_stub_contents
=
17814 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17815 create_instruction_branch_absolute
17816 (initial_insn_addr
- current_stub_contents
));
17818 /* Fill the remaining of the stub with deterministic contents. */
17819 current_stub_contents
=
17820 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
17821 base_stub_contents
, current_stub_contents
,
17822 base_stub_contents
+
17823 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
);
17828 /* - reg_list[13] == 0. */
17829 BFD_ASSERT ((insn_all_registers
& (1 << 13))==0);
17831 /* - reg_list[14] & reg_list[15] != 1. */
17832 BFD_ASSERT ((insn_all_registers
& 0xC000) != 0xC000);
17834 /* - if (wback==1) reg_list[rn] == 0. */
17835 BFD_ASSERT (!wback
|| !restore_rn
);
17837 /* - nb_registers > 8. */
17838 BFD_ASSERT (elf32_arm_popcount (insn_all_registers
) > 8);
17840 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
17842 /* In the following algorithm, we split this wide LDM using 2 LDM insns:
17843 - One with the 7 lowest registers (register mask 0x007F)
17844 This LDM will finally contain between 2 and 7 registers
17845 - One with the 7 highest registers (register mask 0xDF80)
17846 This ldm will finally contain between 2 and 7 registers. */
17847 insn_low_registers
= insn_all_registers
& 0x007F;
17848 insn_high_registers
= insn_all_registers
& 0xDF80;
17850 /* A spare register may be needed during this veneer to temporarily
17851 handle the base register. This register will be restored with the
17852 last LDM operation.
17853 The usable register may be any general purpose register (that
17854 excludes PC, SP, LR : register mask is 0x1FFF). */
17855 usable_register_mask
= 0x1FFF;
17857 /* Generate the stub function. */
17860 /* LDMIA Rn!, {R-low-register-list} : (Encoding T2). */
17861 current_stub_contents
=
17862 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17863 create_instruction_ldmia
17864 (rn
, /*wback=*/1, insn_low_registers
));
17866 /* LDMIA Rn!, {R-high-register-list} : (Encoding T2). */
17867 current_stub_contents
=
17868 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17869 create_instruction_ldmia
17870 (rn
, /*wback=*/1, insn_high_registers
));
17873 /* B initial_insn_addr+4. */
17874 current_stub_contents
=
17875 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17876 create_instruction_branch_absolute
17877 (initial_insn_addr
- current_stub_contents
));
17880 else /* if (!wback). */
17884 /* If Rn is not part of the high-register-list, move it there. */
17885 if (!(insn_high_registers
& (1 << rn
)))
17887 /* Choose a Ri in the high-register-list that will be restored. */
17888 ri
= ctz (insn_high_registers
& usable_register_mask
& ~(1 << rn
));
17891 current_stub_contents
=
17892 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
17893 create_instruction_mov (ri
, rn
));
17896 /* LDMIA Ri!, {R-low-register-list} : (Encoding T2). */
17897 current_stub_contents
=
17898 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17899 create_instruction_ldmia
17900 (ri
, /*wback=*/1, insn_low_registers
));
17902 /* LDMIA Ri, {R-high-register-list} : (Encoding T2). */
17903 current_stub_contents
=
17904 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17905 create_instruction_ldmia
17906 (ri
, /*wback=*/0, insn_high_registers
));
17910 /* B initial_insn_addr+4. */
17911 current_stub_contents
=
17912 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17913 create_instruction_branch_absolute
17914 (initial_insn_addr
- current_stub_contents
));
17918 /* Fill the remaining of the stub with deterministic contents. */
17919 current_stub_contents
=
17920 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
17921 base_stub_contents
, current_stub_contents
,
17922 base_stub_contents
+
17923 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
);
17927 stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table
* htab
,
17929 const insn32 initial_insn
,
17930 const bfd_byte
*const initial_insn_addr
,
17931 bfd_byte
*const base_stub_contents
)
17933 int wback
= (initial_insn
& 0x00200000) >> 21;
17934 int ri
, rn
= (initial_insn
& 0x000f0000) >> 16;
17935 int insn_all_registers
= initial_insn
& 0x0000ffff;
17936 int insn_low_registers
, insn_high_registers
;
17937 int usable_register_mask
;
17938 int restore_pc
= (insn_all_registers
& (1 << 15)) ? 1 : 0;
17939 int restore_rn
= (insn_all_registers
& (1 << rn
)) ? 1 : 0;
17940 int nb_registers
= elf32_arm_popcount (insn_all_registers
);
17941 bfd_byte
*current_stub_contents
= base_stub_contents
;
17943 BFD_ASSERT (is_thumb2_ldmdb (initial_insn
));
17945 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
17946 smaller than 8 registers load sequences that do not cause the
17948 if (nb_registers
<= 8)
17950 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
17951 current_stub_contents
=
17952 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17955 /* B initial_insn_addr+4. */
17956 current_stub_contents
=
17957 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17958 create_instruction_branch_absolute
17959 (initial_insn_addr
- current_stub_contents
));
17961 /* Fill the remaining of the stub with deterministic contents. */
17962 current_stub_contents
=
17963 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
17964 base_stub_contents
, current_stub_contents
,
17965 base_stub_contents
+
17966 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
);
17971 /* - reg_list[13] == 0. */
17972 BFD_ASSERT ((insn_all_registers
& (1 << 13)) == 0);
17974 /* - reg_list[14] & reg_list[15] != 1. */
17975 BFD_ASSERT ((insn_all_registers
& 0xC000) != 0xC000);
17977 /* - if (wback==1) reg_list[rn] == 0. */
17978 BFD_ASSERT (!wback
|| !restore_rn
);
17980 /* - nb_registers > 8. */
17981 BFD_ASSERT (elf32_arm_popcount (insn_all_registers
) > 8);
17983 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
17985 /* In the following algorithm, we split this wide LDM using 2 LDM insn:
17986 - One with the 7 lowest registers (register mask 0x007F)
17987 This LDM will finally contain between 2 and 7 registers
17988 - One with the 7 highest registers (register mask 0xDF80)
17989 This ldm will finally contain between 2 and 7 registers. */
17990 insn_low_registers
= insn_all_registers
& 0x007F;
17991 insn_high_registers
= insn_all_registers
& 0xDF80;
17993 /* A spare register may be needed during this veneer to temporarily
17994 handle the base register. This register will be restored with
17995 the last LDM operation.
17996 The usable register may be any general purpose register (that excludes
17997 PC, SP, LR : register mask is 0x1FFF). */
17998 usable_register_mask
= 0x1FFF;
18000 /* Generate the stub function. */
18001 if (!wback
&& !restore_pc
&& !restore_rn
)
18003 /* Choose a Ri in the low-register-list that will be restored. */
18004 ri
= ctz (insn_low_registers
& usable_register_mask
& ~(1 << rn
));
18007 current_stub_contents
=
18008 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
18009 create_instruction_mov (ri
, rn
));
18011 /* LDMDB Ri!, {R-high-register-list}. */
18012 current_stub_contents
=
18013 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18014 create_instruction_ldmdb
18015 (ri
, /*wback=*/1, insn_high_registers
));
18017 /* LDMDB Ri, {R-low-register-list}. */
18018 current_stub_contents
=
18019 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18020 create_instruction_ldmdb
18021 (ri
, /*wback=*/0, insn_low_registers
));
18023 /* B initial_insn_addr+4. */
18024 current_stub_contents
=
18025 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18026 create_instruction_branch_absolute
18027 (initial_insn_addr
- current_stub_contents
));
18029 else if (wback
&& !restore_pc
&& !restore_rn
)
18031 /* LDMDB Rn!, {R-high-register-list}. */
18032 current_stub_contents
=
18033 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18034 create_instruction_ldmdb
18035 (rn
, /*wback=*/1, insn_high_registers
));
18037 /* LDMDB Rn!, {R-low-register-list}. */
18038 current_stub_contents
=
18039 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18040 create_instruction_ldmdb
18041 (rn
, /*wback=*/1, insn_low_registers
));
18043 /* B initial_insn_addr+4. */
18044 current_stub_contents
=
18045 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18046 create_instruction_branch_absolute
18047 (initial_insn_addr
- current_stub_contents
));
18049 else if (!wback
&& restore_pc
&& !restore_rn
)
18051 /* Choose a Ri in the high-register-list that will be restored. */
18052 ri
= ctz (insn_high_registers
& usable_register_mask
& ~(1 << rn
));
18054 /* SUB Ri, Rn, #(4*nb_registers). */
18055 current_stub_contents
=
18056 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18057 create_instruction_sub (ri
, rn
, (4 * nb_registers
)));
18059 /* LDMIA Ri!, {R-low-register-list}. */
18060 current_stub_contents
=
18061 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18062 create_instruction_ldmia
18063 (ri
, /*wback=*/1, insn_low_registers
));
18065 /* LDMIA Ri, {R-high-register-list}. */
18066 current_stub_contents
=
18067 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18068 create_instruction_ldmia
18069 (ri
, /*wback=*/0, insn_high_registers
));
18071 else if (wback
&& restore_pc
&& !restore_rn
)
18073 /* Choose a Ri in the high-register-list that will be restored. */
18074 ri
= ctz (insn_high_registers
& usable_register_mask
& ~(1 << rn
));
18076 /* SUB Rn, Rn, #(4*nb_registers) */
18077 current_stub_contents
=
18078 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18079 create_instruction_sub (rn
, rn
, (4 * nb_registers
)));
18082 current_stub_contents
=
18083 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
18084 create_instruction_mov (ri
, rn
));
18086 /* LDMIA Ri!, {R-low-register-list}. */
18087 current_stub_contents
=
18088 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18089 create_instruction_ldmia
18090 (ri
, /*wback=*/1, insn_low_registers
));
18092 /* LDMIA Ri, {R-high-register-list}. */
18093 current_stub_contents
=
18094 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18095 create_instruction_ldmia
18096 (ri
, /*wback=*/0, insn_high_registers
));
18098 else if (!wback
&& !restore_pc
&& restore_rn
)
18101 if (!(insn_low_registers
& (1 << rn
)))
18103 /* Choose a Ri in the low-register-list that will be restored. */
18104 ri
= ctz (insn_low_registers
& usable_register_mask
& ~(1 << rn
));
18107 current_stub_contents
=
18108 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
18109 create_instruction_mov (ri
, rn
));
18112 /* LDMDB Ri!, {R-high-register-list}. */
18113 current_stub_contents
=
18114 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18115 create_instruction_ldmdb
18116 (ri
, /*wback=*/1, insn_high_registers
));
18118 /* LDMDB Ri, {R-low-register-list}. */
18119 current_stub_contents
=
18120 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18121 create_instruction_ldmdb
18122 (ri
, /*wback=*/0, insn_low_registers
));
18124 /* B initial_insn_addr+4. */
18125 current_stub_contents
=
18126 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18127 create_instruction_branch_absolute
18128 (initial_insn_addr
- current_stub_contents
));
18130 else if (!wback
&& restore_pc
&& restore_rn
)
18133 if (!(insn_high_registers
& (1 << rn
)))
18135 /* Choose a Ri in the high-register-list that will be restored. */
18136 ri
= ctz (insn_high_registers
& usable_register_mask
& ~(1 << rn
));
18139 /* SUB Ri, Rn, #(4*nb_registers). */
18140 current_stub_contents
=
18141 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18142 create_instruction_sub (ri
, rn
, (4 * nb_registers
)));
18144 /* LDMIA Ri!, {R-low-register-list}. */
18145 current_stub_contents
=
18146 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18147 create_instruction_ldmia
18148 (ri
, /*wback=*/1, insn_low_registers
));
18150 /* LDMIA Ri, {R-high-register-list}. */
18151 current_stub_contents
=
18152 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18153 create_instruction_ldmia
18154 (ri
, /*wback=*/0, insn_high_registers
));
18156 else if (wback
&& restore_rn
)
18158 /* The assembler should not have accepted to encode this. */
18159 BFD_ASSERT (0 && "Cannot patch an instruction that has an "
18160 "undefined behavior.\n");
18163 /* Fill the remaining of the stub with deterministic contents. */
18164 current_stub_contents
=
18165 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
18166 base_stub_contents
, current_stub_contents
,
18167 base_stub_contents
+
18168 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
);
18173 stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table
* htab
,
18175 const insn32 initial_insn
,
18176 const bfd_byte
*const initial_insn_addr
,
18177 bfd_byte
*const base_stub_contents
)
18179 int num_words
= ((unsigned int) initial_insn
<< 24) >> 24;
18180 bfd_byte
*current_stub_contents
= base_stub_contents
;
18182 BFD_ASSERT (is_thumb2_vldm (initial_insn
));
18184 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18185 smaller than 8 words load sequences that do not cause the
18187 if (num_words
<= 8)
18189 /* Untouched instruction. */
18190 current_stub_contents
=
18191 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18194 /* B initial_insn_addr+4. */
18195 current_stub_contents
=
18196 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18197 create_instruction_branch_absolute
18198 (initial_insn_addr
- current_stub_contents
));
18202 bfd_boolean is_dp
= /* DP encoding. */
18203 (initial_insn
& 0xfe100f00) == 0xec100b00;
18204 bfd_boolean is_ia_nobang
= /* (IA without !). */
18205 (((initial_insn
<< 7) >> 28) & 0xd) == 0x4;
18206 bfd_boolean is_ia_bang
= /* (IA with !) - includes VPOP. */
18207 (((initial_insn
<< 7) >> 28) & 0xd) == 0x5;
18208 bfd_boolean is_db_bang
= /* (DB with !). */
18209 (((initial_insn
<< 7) >> 28) & 0xd) == 0x9;
18210 int base_reg
= ((unsigned int) initial_insn
<< 12) >> 28;
18211 /* d = UInt (Vd:D);. */
18212 int first_reg
= ((((unsigned int) initial_insn
<< 16) >> 28) << 1)
18213 | (((unsigned int)initial_insn
<< 9) >> 31);
18215 /* Compute the number of 8-words chunks needed to split. */
18216 int chunks
= (num_words
% 8) ? (num_words
/ 8 + 1) : (num_words
/ 8);
18219 /* The test coverage has been done assuming the following
18220 hypothesis that exactly one of the previous is_ predicates is
18222 BFD_ASSERT ( (is_ia_nobang
^ is_ia_bang
^ is_db_bang
)
18223 && !(is_ia_nobang
& is_ia_bang
& is_db_bang
));
18225 /* We treat the cutting of the words in one pass for all
18226 cases, then we emit the adjustments:
18229 -> vldm rx!, {8_words_or_less} for each needed 8_word
18230 -> sub rx, rx, #size (list)
18233 -> vldm rx!, {8_words_or_less} for each needed 8_word
18234 This also handles vpop instruction (when rx is sp)
18237 -> vldmb rx!, {8_words_or_less} for each needed 8_word. */
18238 for (chunk
= 0; chunk
< chunks
; ++chunk
)
18240 bfd_vma new_insn
= 0;
18242 if (is_ia_nobang
|| is_ia_bang
)
18244 new_insn
= create_instruction_vldmia
18248 chunks
- (chunk
+ 1) ?
18249 8 : num_words
- chunk
* 8,
18250 first_reg
+ chunk
* 8);
18252 else if (is_db_bang
)
18254 new_insn
= create_instruction_vldmdb
18257 chunks
- (chunk
+ 1) ?
18258 8 : num_words
- chunk
* 8,
18259 first_reg
+ chunk
* 8);
18263 current_stub_contents
=
18264 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18268 /* Only this case requires the base register compensation
18272 current_stub_contents
=
18273 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18274 create_instruction_sub
18275 (base_reg
, base_reg
, 4*num_words
));
18278 /* B initial_insn_addr+4. */
18279 current_stub_contents
=
18280 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18281 create_instruction_branch_absolute
18282 (initial_insn_addr
- current_stub_contents
));
18285 /* Fill the remaining of the stub with deterministic contents. */
18286 current_stub_contents
=
18287 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
18288 base_stub_contents
, current_stub_contents
,
18289 base_stub_contents
+
18290 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE
);
18294 stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table
* htab
,
18296 const insn32 wrong_insn
,
18297 const bfd_byte
*const wrong_insn_addr
,
18298 bfd_byte
*const stub_contents
)
18300 if (is_thumb2_ldmia (wrong_insn
))
18301 stm32l4xx_create_replacing_stub_ldmia (htab
, output_bfd
,
18302 wrong_insn
, wrong_insn_addr
,
18304 else if (is_thumb2_ldmdb (wrong_insn
))
18305 stm32l4xx_create_replacing_stub_ldmdb (htab
, output_bfd
,
18306 wrong_insn
, wrong_insn_addr
,
18308 else if (is_thumb2_vldm (wrong_insn
))
18309 stm32l4xx_create_replacing_stub_vldm (htab
, output_bfd
,
18310 wrong_insn
, wrong_insn_addr
,
18314 /* End of stm32l4xx work-around. */
18317 /* Do code byteswapping. Return FALSE afterwards so that the section is
18318 written out as normal. */
18321 elf32_arm_write_section (bfd
*output_bfd
,
18322 struct bfd_link_info
*link_info
,
18324 bfd_byte
*contents
)
18326 unsigned int mapcount
, errcount
;
18327 _arm_elf_section_data
*arm_data
;
18328 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
18329 elf32_arm_section_map
*map
;
18330 elf32_vfp11_erratum_list
*errnode
;
18331 elf32_stm32l4xx_erratum_list
*stm32l4xx_errnode
;
18334 bfd_vma offset
= sec
->output_section
->vma
+ sec
->output_offset
;
18338 if (globals
== NULL
)
18341 /* If this section has not been allocated an _arm_elf_section_data
18342 structure then we cannot record anything. */
18343 arm_data
= get_arm_elf_section_data (sec
);
18344 if (arm_data
== NULL
)
18347 mapcount
= arm_data
->mapcount
;
18348 map
= arm_data
->map
;
18349 errcount
= arm_data
->erratumcount
;
18353 unsigned int endianflip
= bfd_big_endian (output_bfd
) ? 3 : 0;
18355 for (errnode
= arm_data
->erratumlist
; errnode
!= 0;
18356 errnode
= errnode
->next
)
18358 bfd_vma target
= errnode
->vma
- offset
;
18360 switch (errnode
->type
)
18362 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER
:
18364 bfd_vma branch_to_veneer
;
18365 /* Original condition code of instruction, plus bit mask for
18366 ARM B instruction. */
18367 unsigned int insn
= (errnode
->u
.b
.vfp_insn
& 0xf0000000)
18370 /* The instruction is before the label. */
18373 /* Above offset included in -4 below. */
18374 branch_to_veneer
= errnode
->u
.b
.veneer
->vma
18375 - errnode
->vma
- 4;
18377 if ((signed) branch_to_veneer
< -(1 << 25)
18378 || (signed) branch_to_veneer
>= (1 << 25))
18379 _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
18380 "range"), output_bfd
);
18382 insn
|= (branch_to_veneer
>> 2) & 0xffffff;
18383 contents
[endianflip
^ target
] = insn
& 0xff;
18384 contents
[endianflip
^ (target
+ 1)] = (insn
>> 8) & 0xff;
18385 contents
[endianflip
^ (target
+ 2)] = (insn
>> 16) & 0xff;
18386 contents
[endianflip
^ (target
+ 3)] = (insn
>> 24) & 0xff;
18390 case VFP11_ERRATUM_ARM_VENEER
:
18392 bfd_vma branch_from_veneer
;
18395 /* Take size of veneer into account. */
18396 branch_from_veneer
= errnode
->u
.v
.branch
->vma
18397 - errnode
->vma
- 12;
18399 if ((signed) branch_from_veneer
< -(1 << 25)
18400 || (signed) branch_from_veneer
>= (1 << 25))
18401 _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
18402 "range"), output_bfd
);
18404 /* Original instruction. */
18405 insn
= errnode
->u
.v
.branch
->u
.b
.vfp_insn
;
18406 contents
[endianflip
^ target
] = insn
& 0xff;
18407 contents
[endianflip
^ (target
+ 1)] = (insn
>> 8) & 0xff;
18408 contents
[endianflip
^ (target
+ 2)] = (insn
>> 16) & 0xff;
18409 contents
[endianflip
^ (target
+ 3)] = (insn
>> 24) & 0xff;
18411 /* Branch back to insn after original insn. */
18412 insn
= 0xea000000 | ((branch_from_veneer
>> 2) & 0xffffff);
18413 contents
[endianflip
^ (target
+ 4)] = insn
& 0xff;
18414 contents
[endianflip
^ (target
+ 5)] = (insn
>> 8) & 0xff;
18415 contents
[endianflip
^ (target
+ 6)] = (insn
>> 16) & 0xff;
18416 contents
[endianflip
^ (target
+ 7)] = (insn
>> 24) & 0xff;
18426 if (arm_data
->stm32l4xx_erratumcount
!= 0)
18428 for (stm32l4xx_errnode
= arm_data
->stm32l4xx_erratumlist
;
18429 stm32l4xx_errnode
!= 0;
18430 stm32l4xx_errnode
= stm32l4xx_errnode
->next
)
18432 bfd_vma target
= stm32l4xx_errnode
->vma
- offset
;
18434 switch (stm32l4xx_errnode
->type
)
18436 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER
:
18439 bfd_vma branch_to_veneer
=
18440 stm32l4xx_errnode
->u
.b
.veneer
->vma
- stm32l4xx_errnode
->vma
;
18442 if ((signed) branch_to_veneer
< -(1 << 24)
18443 || (signed) branch_to_veneer
>= (1 << 24))
18445 bfd_vma out_of_range
=
18446 ((signed) branch_to_veneer
< -(1 << 24)) ?
18447 - branch_to_veneer
- (1 << 24) :
18448 ((signed) branch_to_veneer
>= (1 << 24)) ?
18449 branch_to_veneer
- (1 << 24) : 0;
18452 (_("%pB(%#" PRIx64
"): error: "
18453 "cannot create STM32L4XX veneer; "
18454 "jump out of range by %" PRId64
" bytes; "
18455 "cannot encode branch instruction"),
18457 (uint64_t) (stm32l4xx_errnode
->vma
- 4),
18458 (int64_t) out_of_range
);
18462 insn
= create_instruction_branch_absolute
18463 (stm32l4xx_errnode
->u
.b
.veneer
->vma
- stm32l4xx_errnode
->vma
);
18465 /* The instruction is before the label. */
18468 put_thumb2_insn (globals
, output_bfd
,
18469 (bfd_vma
) insn
, contents
+ target
);
18473 case STM32L4XX_ERRATUM_VENEER
:
18476 bfd_byte
* veneer_r
;
18479 veneer
= contents
+ target
;
18481 + stm32l4xx_errnode
->u
.b
.veneer
->vma
18482 - stm32l4xx_errnode
->vma
- 4;
18484 if ((signed) (veneer_r
- veneer
-
18485 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE
>
18486 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
?
18487 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE
:
18488 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
) < -(1 << 24)
18489 || (signed) (veneer_r
- veneer
) >= (1 << 24))
18491 _bfd_error_handler (_("%pB: error: cannot create STM32L4XX "
18492 "veneer"), output_bfd
);
18496 /* Original instruction. */
18497 insn
= stm32l4xx_errnode
->u
.v
.branch
->u
.b
.insn
;
18499 stm32l4xx_create_replacing_stub
18500 (globals
, output_bfd
, insn
, (void*)veneer_r
, (void*)veneer
);
18510 if (arm_data
->elf
.this_hdr
.sh_type
== SHT_ARM_EXIDX
)
18512 arm_unwind_table_edit
*edit_node
18513 = arm_data
->u
.exidx
.unwind_edit_list
;
18514 /* Now, sec->size is the size of the section we will write. The original
18515 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
18516 markers) was sec->rawsize. (This isn't the case if we perform no
18517 edits, then rawsize will be zero and we should use size). */
18518 bfd_byte
*edited_contents
= (bfd_byte
*) bfd_malloc (sec
->size
);
18519 unsigned int input_size
= sec
->rawsize
? sec
->rawsize
: sec
->size
;
18520 unsigned int in_index
, out_index
;
18521 bfd_vma add_to_offsets
= 0;
18523 for (in_index
= 0, out_index
= 0; in_index
* 8 < input_size
|| edit_node
;)
18527 unsigned int edit_index
= edit_node
->index
;
18529 if (in_index
< edit_index
&& in_index
* 8 < input_size
)
18531 copy_exidx_entry (output_bfd
, edited_contents
+ out_index
* 8,
18532 contents
+ in_index
* 8, add_to_offsets
);
18536 else if (in_index
== edit_index
18537 || (in_index
* 8 >= input_size
18538 && edit_index
== UINT_MAX
))
18540 switch (edit_node
->type
)
18542 case DELETE_EXIDX_ENTRY
:
18544 add_to_offsets
+= 8;
18547 case INSERT_EXIDX_CANTUNWIND_AT_END
:
18549 asection
*text_sec
= edit_node
->linked_section
;
18550 bfd_vma text_offset
= text_sec
->output_section
->vma
18551 + text_sec
->output_offset
18553 bfd_vma exidx_offset
= offset
+ out_index
* 8;
18554 unsigned long prel31_offset
;
18556 /* Note: this is meant to be equivalent to an
18557 R_ARM_PREL31 relocation. These synthetic
18558 EXIDX_CANTUNWIND markers are not relocated by the
18559 usual BFD method. */
18560 prel31_offset
= (text_offset
- exidx_offset
)
18562 if (bfd_link_relocatable (link_info
))
18564 /* Here relocation for new EXIDX_CANTUNWIND is
18565 created, so there is no need to
18566 adjust offset by hand. */
18567 prel31_offset
= text_sec
->output_offset
18571 /* First address we can't unwind. */
18572 bfd_put_32 (output_bfd
, prel31_offset
,
18573 &edited_contents
[out_index
* 8]);
18575 /* Code for EXIDX_CANTUNWIND. */
18576 bfd_put_32 (output_bfd
, 0x1,
18577 &edited_contents
[out_index
* 8 + 4]);
18580 add_to_offsets
-= 8;
18585 edit_node
= edit_node
->next
;
18590 /* No more edits, copy remaining entries verbatim. */
18591 copy_exidx_entry (output_bfd
, edited_contents
+ out_index
* 8,
18592 contents
+ in_index
* 8, add_to_offsets
);
18598 if (!(sec
->flags
& SEC_EXCLUDE
) && !(sec
->flags
& SEC_NEVER_LOAD
))
18599 bfd_set_section_contents (output_bfd
, sec
->output_section
,
18601 (file_ptr
) sec
->output_offset
, sec
->size
);
18606 /* Fix code to point to Cortex-A8 erratum stubs. */
18607 if (globals
->fix_cortex_a8
)
18609 struct a8_branch_to_stub_data data
;
18611 data
.writing_section
= sec
;
18612 data
.contents
= contents
;
18614 bfd_hash_traverse (& globals
->stub_hash_table
, make_branch_to_a8_stub
,
18621 if (globals
->byteswap_code
)
18623 qsort (map
, mapcount
, sizeof (* map
), elf32_arm_compare_mapping
);
18626 for (i
= 0; i
< mapcount
; i
++)
18628 if (i
== mapcount
- 1)
18631 end
= map
[i
+ 1].vma
;
18633 switch (map
[i
].type
)
18636 /* Byte swap code words. */
18637 while (ptr
+ 3 < end
)
18639 tmp
= contents
[ptr
];
18640 contents
[ptr
] = contents
[ptr
+ 3];
18641 contents
[ptr
+ 3] = tmp
;
18642 tmp
= contents
[ptr
+ 1];
18643 contents
[ptr
+ 1] = contents
[ptr
+ 2];
18644 contents
[ptr
+ 2] = tmp
;
18650 /* Byte swap code halfwords. */
18651 while (ptr
+ 1 < end
)
18653 tmp
= contents
[ptr
];
18654 contents
[ptr
] = contents
[ptr
+ 1];
18655 contents
[ptr
+ 1] = tmp
;
18661 /* Leave data alone. */
18669 arm_data
->mapcount
= -1;
18670 arm_data
->mapsize
= 0;
18671 arm_data
->map
= NULL
;
18676 /* Mangle thumb function symbols as we read them in. */
18679 elf32_arm_swap_symbol_in (bfd
* abfd
,
18682 Elf_Internal_Sym
*dst
)
18684 Elf_Internal_Shdr
*symtab_hdr
;
18685 const char *name
= NULL
;
18687 if (!bfd_elf32_swap_symbol_in (abfd
, psrc
, pshn
, dst
))
18689 dst
->st_target_internal
= 0;
18691 /* New EABI objects mark thumb function symbols by setting the low bit of
18693 if (ELF_ST_TYPE (dst
->st_info
) == STT_FUNC
18694 || ELF_ST_TYPE (dst
->st_info
) == STT_GNU_IFUNC
)
18696 if (dst
->st_value
& 1)
18698 dst
->st_value
&= ~(bfd_vma
) 1;
18699 ARM_SET_SYM_BRANCH_TYPE (dst
->st_target_internal
,
18700 ST_BRANCH_TO_THUMB
);
18703 ARM_SET_SYM_BRANCH_TYPE (dst
->st_target_internal
, ST_BRANCH_TO_ARM
);
18705 else if (ELF_ST_TYPE (dst
->st_info
) == STT_ARM_TFUNC
)
18707 dst
->st_info
= ELF_ST_INFO (ELF_ST_BIND (dst
->st_info
), STT_FUNC
);
18708 ARM_SET_SYM_BRANCH_TYPE (dst
->st_target_internal
, ST_BRANCH_TO_THUMB
);
18710 else if (ELF_ST_TYPE (dst
->st_info
) == STT_SECTION
)
18711 ARM_SET_SYM_BRANCH_TYPE (dst
->st_target_internal
, ST_BRANCH_LONG
);
18713 ARM_SET_SYM_BRANCH_TYPE (dst
->st_target_internal
, ST_BRANCH_UNKNOWN
);
18715 /* Mark CMSE special symbols. */
18716 symtab_hdr
= & elf_symtab_hdr (abfd
);
18717 if (symtab_hdr
->sh_size
)
18718 name
= bfd_elf_sym_name (abfd
, symtab_hdr
, dst
, NULL
);
18719 if (name
&& CONST_STRNEQ (name
, CMSE_PREFIX
))
18720 ARM_SET_SYM_CMSE_SPCL (dst
->st_target_internal
);
18726 /* Mangle thumb function symbols as we write them out. */
18729 elf32_arm_swap_symbol_out (bfd
*abfd
,
18730 const Elf_Internal_Sym
*src
,
18734 Elf_Internal_Sym newsym
;
18736 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
18737 of the address set, as per the new EABI. We do this unconditionally
18738 because objcopy does not set the elf header flags until after
18739 it writes out the symbol table. */
18740 if (ARM_GET_SYM_BRANCH_TYPE (src
->st_target_internal
) == ST_BRANCH_TO_THUMB
)
18743 if (ELF_ST_TYPE (src
->st_info
) != STT_GNU_IFUNC
)
18744 newsym
.st_info
= ELF_ST_INFO (ELF_ST_BIND (src
->st_info
), STT_FUNC
);
18745 if (newsym
.st_shndx
!= SHN_UNDEF
)
18747 /* Do this only for defined symbols. At link type, the static
18748 linker will simulate the work of dynamic linker of resolving
18749 symbols and will carry over the thumbness of found symbols to
18750 the output symbol table. It's not clear how it happens, but
18751 the thumbness of undefined symbols can well be different at
18752 runtime, and writing '1' for them will be confusing for users
18753 and possibly for dynamic linker itself.
18755 newsym
.st_value
|= 1;
18760 bfd_elf32_swap_symbol_out (abfd
, src
, cdst
, shndx
);
18763 /* Add the PT_ARM_EXIDX program header. */
18766 elf32_arm_modify_segment_map (bfd
*abfd
,
18767 struct bfd_link_info
*info ATTRIBUTE_UNUSED
)
18769 struct elf_segment_map
*m
;
18772 sec
= bfd_get_section_by_name (abfd
, ".ARM.exidx");
18773 if (sec
!= NULL
&& (sec
->flags
& SEC_LOAD
) != 0)
18775 /* If there is already a PT_ARM_EXIDX header, then we do not
18776 want to add another one. This situation arises when running
18777 "strip"; the input binary already has the header. */
18778 m
= elf_seg_map (abfd
);
18779 while (m
&& m
->p_type
!= PT_ARM_EXIDX
)
18783 m
= (struct elf_segment_map
*)
18784 bfd_zalloc (abfd
, sizeof (struct elf_segment_map
));
18787 m
->p_type
= PT_ARM_EXIDX
;
18789 m
->sections
[0] = sec
;
18791 m
->next
= elf_seg_map (abfd
);
18792 elf_seg_map (abfd
) = m
;
18799 /* We may add a PT_ARM_EXIDX program header. */
18802 elf32_arm_additional_program_headers (bfd
*abfd
,
18803 struct bfd_link_info
*info ATTRIBUTE_UNUSED
)
18807 sec
= bfd_get_section_by_name (abfd
, ".ARM.exidx");
18808 if (sec
!= NULL
&& (sec
->flags
& SEC_LOAD
) != 0)
18814 /* Hook called by the linker routine which adds symbols from an object
18818 elf32_arm_add_symbol_hook (bfd
*abfd
, struct bfd_link_info
*info
,
18819 Elf_Internal_Sym
*sym
, const char **namep
,
18820 flagword
*flagsp
, asection
**secp
, bfd_vma
*valp
)
18822 if (ELF_ST_TYPE (sym
->st_info
) == STT_GNU_IFUNC
18823 && (abfd
->flags
& DYNAMIC
) == 0
18824 && bfd_get_flavour (info
->output_bfd
) == bfd_target_elf_flavour
)
18825 elf_tdata (info
->output_bfd
)->has_gnu_symbols
|= elf_gnu_symbol_ifunc
;
18827 if (elf32_arm_hash_table (info
) == NULL
)
18830 if (elf32_arm_hash_table (info
)->vxworks_p
18831 && !elf_vxworks_add_symbol_hook (abfd
, info
, sym
, namep
,
18832 flagsp
, secp
, valp
))
18838 /* We use this to override swap_symbol_in and swap_symbol_out. */
18839 const struct elf_size_info elf32_arm_size_info
=
18841 sizeof (Elf32_External_Ehdr
),
18842 sizeof (Elf32_External_Phdr
),
18843 sizeof (Elf32_External_Shdr
),
18844 sizeof (Elf32_External_Rel
),
18845 sizeof (Elf32_External_Rela
),
18846 sizeof (Elf32_External_Sym
),
18847 sizeof (Elf32_External_Dyn
),
18848 sizeof (Elf_External_Note
),
18852 ELFCLASS32
, EV_CURRENT
,
18853 bfd_elf32_write_out_phdrs
,
18854 bfd_elf32_write_shdrs_and_ehdr
,
18855 bfd_elf32_checksum_contents
,
18856 bfd_elf32_write_relocs
,
18857 elf32_arm_swap_symbol_in
,
18858 elf32_arm_swap_symbol_out
,
18859 bfd_elf32_slurp_reloc_table
,
18860 bfd_elf32_slurp_symbol_table
,
18861 bfd_elf32_swap_dyn_in
,
18862 bfd_elf32_swap_dyn_out
,
18863 bfd_elf32_swap_reloc_in
,
18864 bfd_elf32_swap_reloc_out
,
18865 bfd_elf32_swap_reloca_in
,
18866 bfd_elf32_swap_reloca_out
18870 read_code32 (const bfd
*abfd
, const bfd_byte
*addr
)
18872 /* V7 BE8 code is always little endian. */
18873 if ((elf_elfheader (abfd
)->e_flags
& EF_ARM_BE8
) != 0)
18874 return bfd_getl32 (addr
);
18876 return bfd_get_32 (abfd
, addr
);
18880 read_code16 (const bfd
*abfd
, const bfd_byte
*addr
)
18882 /* V7 BE8 code is always little endian. */
18883 if ((elf_elfheader (abfd
)->e_flags
& EF_ARM_BE8
) != 0)
18884 return bfd_getl16 (addr
);
18886 return bfd_get_16 (abfd
, addr
);
18889 /* Return size of plt0 entry starting at ADDR
18890 or (bfd_vma) -1 if size can not be determined. */
18893 elf32_arm_plt0_size (const bfd
*abfd
, const bfd_byte
*addr
)
18895 bfd_vma first_word
;
18898 first_word
= read_code32 (abfd
, addr
);
18900 if (first_word
== elf32_arm_plt0_entry
[0])
18901 plt0_size
= 4 * ARRAY_SIZE (elf32_arm_plt0_entry
);
18902 else if (first_word
== elf32_thumb2_plt0_entry
[0])
18903 plt0_size
= 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry
);
18905 /* We don't yet handle this PLT format. */
18906 return (bfd_vma
) -1;
18911 /* Return size of plt entry starting at offset OFFSET
18912 of plt section located at address START
18913 or (bfd_vma) -1 if size can not be determined. */
18916 elf32_arm_plt_size (const bfd
*abfd
, const bfd_byte
*start
, bfd_vma offset
)
18918 bfd_vma first_insn
;
18919 bfd_vma plt_size
= 0;
18920 const bfd_byte
*addr
= start
+ offset
;
18922 /* PLT entry size if fixed on Thumb-only platforms. */
18923 if (read_code32 (abfd
, start
) == elf32_thumb2_plt0_entry
[0])
18924 return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry
);
18926 /* Respect Thumb stub if necessary. */
18927 if (read_code16 (abfd
, addr
) == elf32_arm_plt_thumb_stub
[0])
18929 plt_size
+= 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub
);
18932 /* Strip immediate from first add. */
18933 first_insn
= read_code32 (abfd
, addr
+ plt_size
) & 0xffffff00;
18935 #ifdef FOUR_WORD_PLT
18936 if (first_insn
== elf32_arm_plt_entry
[0])
18937 plt_size
+= 4 * ARRAY_SIZE (elf32_arm_plt_entry
);
18939 if (first_insn
== elf32_arm_plt_entry_long
[0])
18940 plt_size
+= 4 * ARRAY_SIZE (elf32_arm_plt_entry_long
);
18941 else if (first_insn
== elf32_arm_plt_entry_short
[0])
18942 plt_size
+= 4 * ARRAY_SIZE (elf32_arm_plt_entry_short
);
18945 /* We don't yet handle this PLT format. */
18946 return (bfd_vma
) -1;
18951 /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */
18954 elf32_arm_get_synthetic_symtab (bfd
*abfd
,
18955 long symcount ATTRIBUTE_UNUSED
,
18956 asymbol
**syms ATTRIBUTE_UNUSED
,
18966 Elf_Internal_Shdr
*hdr
;
18974 if ((abfd
->flags
& (DYNAMIC
| EXEC_P
)) == 0)
18977 if (dynsymcount
<= 0)
18980 relplt
= bfd_get_section_by_name (abfd
, ".rel.plt");
18981 if (relplt
== NULL
)
18984 hdr
= &elf_section_data (relplt
)->this_hdr
;
18985 if (hdr
->sh_link
!= elf_dynsymtab (abfd
)
18986 || (hdr
->sh_type
!= SHT_REL
&& hdr
->sh_type
!= SHT_RELA
))
18989 plt
= bfd_get_section_by_name (abfd
, ".plt");
18993 if (!elf32_arm_size_info
.slurp_reloc_table (abfd
, relplt
, dynsyms
, TRUE
))
18996 data
= plt
->contents
;
18999 if (!bfd_get_full_section_contents(abfd
, (asection
*) plt
, &data
) || data
== NULL
)
19001 bfd_cache_section_contents((asection
*) plt
, data
);
19004 count
= relplt
->size
/ hdr
->sh_entsize
;
19005 size
= count
* sizeof (asymbol
);
19006 p
= relplt
->relocation
;
19007 for (i
= 0; i
< count
; i
++, p
+= elf32_arm_size_info
.int_rels_per_ext_rel
)
19009 size
+= strlen ((*p
->sym_ptr_ptr
)->name
) + sizeof ("@plt");
19010 if (p
->addend
!= 0)
19011 size
+= sizeof ("+0x") - 1 + 8;
19014 s
= *ret
= (asymbol
*) bfd_malloc (size
);
19018 offset
= elf32_arm_plt0_size (abfd
, data
);
19019 if (offset
== (bfd_vma
) -1)
19022 names
= (char *) (s
+ count
);
19023 p
= relplt
->relocation
;
19025 for (i
= 0; i
< count
; i
++, p
+= elf32_arm_size_info
.int_rels_per_ext_rel
)
19029 bfd_vma plt_size
= elf32_arm_plt_size (abfd
, data
, offset
);
19030 if (plt_size
== (bfd_vma
) -1)
19033 *s
= **p
->sym_ptr_ptr
;
19034 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
19035 we are defining a symbol, ensure one of them is set. */
19036 if ((s
->flags
& BSF_LOCAL
) == 0)
19037 s
->flags
|= BSF_GLOBAL
;
19038 s
->flags
|= BSF_SYNTHETIC
;
19043 len
= strlen ((*p
->sym_ptr_ptr
)->name
);
19044 memcpy (names
, (*p
->sym_ptr_ptr
)->name
, len
);
19046 if (p
->addend
!= 0)
19050 memcpy (names
, "+0x", sizeof ("+0x") - 1);
19051 names
+= sizeof ("+0x") - 1;
19052 bfd_sprintf_vma (abfd
, buf
, p
->addend
);
19053 for (a
= buf
; *a
== '0'; ++a
)
19056 memcpy (names
, a
, len
);
19059 memcpy (names
, "@plt", sizeof ("@plt"));
19060 names
+= sizeof ("@plt");
19062 offset
+= plt_size
;
19069 elf32_arm_section_flags (flagword
*flags
, const Elf_Internal_Shdr
* hdr
)
19071 if (hdr
->sh_flags
& SHF_ARM_PURECODE
)
19072 *flags
|= SEC_ELF_PURECODE
;
19077 elf32_arm_lookup_section_flags (char *flag_name
)
19079 if (!strcmp (flag_name
, "SHF_ARM_PURECODE"))
19080 return SHF_ARM_PURECODE
;
19082 return SEC_NO_FLAGS
;
19085 static unsigned int
19086 elf32_arm_count_additional_relocs (asection
*sec
)
19088 struct _arm_elf_section_data
*arm_data
;
19089 arm_data
= get_arm_elf_section_data (sec
);
19091 return arm_data
== NULL
? 0 : arm_data
->additional_reloc_count
;
19094 /* Called to set the sh_flags, sh_link and sh_info fields of OSECTION which
19095 has a type >= SHT_LOOS. Returns TRUE if these fields were initialised
19096 FALSE otherwise. ISECTION is the best guess matching section from the
19097 input bfd IBFD, but it might be NULL. */
19100 elf32_arm_copy_special_section_fields (const bfd
*ibfd ATTRIBUTE_UNUSED
,
19101 bfd
*obfd ATTRIBUTE_UNUSED
,
19102 const Elf_Internal_Shdr
*isection ATTRIBUTE_UNUSED
,
19103 Elf_Internal_Shdr
*osection
)
19105 switch (osection
->sh_type
)
19107 case SHT_ARM_EXIDX
:
19109 Elf_Internal_Shdr
**oheaders
= elf_elfsections (obfd
);
19110 Elf_Internal_Shdr
**iheaders
= elf_elfsections (ibfd
);
19113 osection
->sh_flags
= SHF_ALLOC
| SHF_LINK_ORDER
;
19114 osection
->sh_info
= 0;
19116 /* The sh_link field must be set to the text section associated with
19117 this index section. Unfortunately the ARM EHABI does not specify
19118 exactly how to determine this association. Our caller does try
19119 to match up OSECTION with its corresponding input section however
19120 so that is a good first guess. */
19121 if (isection
!= NULL
19122 && osection
->bfd_section
!= NULL
19123 && isection
->bfd_section
!= NULL
19124 && isection
->bfd_section
->output_section
!= NULL
19125 && isection
->bfd_section
->output_section
== osection
->bfd_section
19126 && iheaders
!= NULL
19127 && isection
->sh_link
> 0
19128 && isection
->sh_link
< elf_numsections (ibfd
)
19129 && iheaders
[isection
->sh_link
]->bfd_section
!= NULL
19130 && iheaders
[isection
->sh_link
]->bfd_section
->output_section
!= NULL
19133 for (i
= elf_numsections (obfd
); i
-- > 0;)
19134 if (oheaders
[i
]->bfd_section
19135 == iheaders
[isection
->sh_link
]->bfd_section
->output_section
)
19141 /* Failing that we have to find a matching section ourselves. If
19142 we had the output section name available we could compare that
19143 with input section names. Unfortunately we don't. So instead
19144 we use a simple heuristic and look for the nearest executable
19145 section before this one. */
19146 for (i
= elf_numsections (obfd
); i
-- > 0;)
19147 if (oheaders
[i
] == osection
)
19153 if (oheaders
[i
]->sh_type
== SHT_PROGBITS
19154 && (oheaders
[i
]->sh_flags
& (SHF_ALLOC
| SHF_EXECINSTR
))
19155 == (SHF_ALLOC
| SHF_EXECINSTR
))
19161 osection
->sh_link
= i
;
19162 /* If the text section was part of a group
19163 then the index section should be too. */
19164 if (oheaders
[i
]->sh_flags
& SHF_GROUP
)
19165 osection
->sh_flags
|= SHF_GROUP
;
19171 case SHT_ARM_PREEMPTMAP
:
19172 osection
->sh_flags
= SHF_ALLOC
;
19175 case SHT_ARM_ATTRIBUTES
:
19176 case SHT_ARM_DEBUGOVERLAY
:
19177 case SHT_ARM_OVERLAYSECTION
:
19185 /* Returns TRUE if NAME is an ARM mapping symbol.
19186 Traditionally the symbols $a, $d and $t have been used.
19187 The ARM ELF standard also defines $x (for A64 code). It also allows a
19188 period initiated suffix to be added to the symbol: "$[adtx]\.[:sym_char]+".
19189 Other tools might also produce $b (Thumb BL), $f, $p, $m and $v, but we do
19190 not support them here. $t.x indicates the start of ThumbEE instructions. */
19193 is_arm_mapping_symbol (const char * name
)
19195 return name
!= NULL
/* Paranoia. */
19196 && name
[0] == '$' /* Note: if objcopy --prefix-symbols has been used then
19197 the mapping symbols could have acquired a prefix.
19198 We do not support this here, since such symbols no
19199 longer conform to the ARM ELF ABI. */
19200 && (name
[1] == 'a' || name
[1] == 'd' || name
[1] == 't' || name
[1] == 'x')
19201 && (name
[2] == 0 || name
[2] == '.');
19202 /* FIXME: Strictly speaking the symbol is only a valid mapping symbol if
19203 any characters that follow the period are legal characters for the body
19204 of a symbol's name. For now we just assume that this is the case. */
19207 /* Make sure that mapping symbols in object files are not removed via the
19208 "strip --strip-unneeded" tool. These symbols are needed in order to
19209 correctly generate interworking veneers, and for byte swapping code
19210 regions. Once an object file has been linked, it is safe to remove the
19211 symbols as they will no longer be needed. */
19214 elf32_arm_backend_symbol_processing (bfd
*abfd
, asymbol
*sym
)
19216 if (((abfd
->flags
& (EXEC_P
| DYNAMIC
)) == 0)
19217 && sym
->section
!= bfd_abs_section_ptr
19218 && is_arm_mapping_symbol (sym
->name
))
19219 sym
->flags
|= BSF_KEEP
;
19222 #undef elf_backend_copy_special_section_fields
19223 #define elf_backend_copy_special_section_fields elf32_arm_copy_special_section_fields
19225 #define ELF_ARCH bfd_arch_arm
19226 #define ELF_TARGET_ID ARM_ELF_DATA
19227 #define ELF_MACHINE_CODE EM_ARM
19228 #ifdef __QNXTARGET__
19229 #define ELF_MAXPAGESIZE 0x1000
19231 #define ELF_MAXPAGESIZE 0x10000
19233 #define ELF_MINPAGESIZE 0x1000
19234 #define ELF_COMMONPAGESIZE 0x1000
19236 #define bfd_elf32_mkobject elf32_arm_mkobject
19238 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
19239 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
19240 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
19241 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
19242 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
19243 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
19244 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
19245 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
19246 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
19247 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
19248 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
19249 #define bfd_elf32_bfd_final_link elf32_arm_final_link
19250 #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab
19252 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
19253 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
19254 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
19255 #define elf_backend_check_relocs elf32_arm_check_relocs
19256 #define elf_backend_update_relocs elf32_arm_update_relocs
19257 #define elf_backend_relocate_section elf32_arm_relocate_section
19258 #define elf_backend_write_section elf32_arm_write_section
19259 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
19260 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
19261 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
19262 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
19263 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
19264 #define elf_backend_always_size_sections elf32_arm_always_size_sections
19265 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
19266 #define elf_backend_post_process_headers elf32_arm_post_process_headers
19267 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
19268 #define elf_backend_object_p elf32_arm_object_p
19269 #define elf_backend_fake_sections elf32_arm_fake_sections
19270 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
19271 #define elf_backend_final_write_processing elf32_arm_final_write_processing
19272 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
19273 #define elf_backend_size_info elf32_arm_size_info
19274 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
19275 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
19276 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
19277 #define elf_backend_filter_implib_symbols elf32_arm_filter_implib_symbols
19278 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
19279 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
19280 #define elf_backend_count_additional_relocs elf32_arm_count_additional_relocs
19281 #define elf_backend_symbol_processing elf32_arm_backend_symbol_processing
19283 #define elf_backend_can_refcount 1
19284 #define elf_backend_can_gc_sections 1
19285 #define elf_backend_plt_readonly 1
19286 #define elf_backend_want_got_plt 1
19287 #define elf_backend_want_plt_sym 0
19288 #define elf_backend_want_dynrelro 1
19289 #define elf_backend_may_use_rel_p 1
19290 #define elf_backend_may_use_rela_p 0
19291 #define elf_backend_default_use_rela_p 0
19292 #define elf_backend_dtrel_excludes_plt 1
19294 #define elf_backend_got_header_size 12
19295 #define elf_backend_extern_protected_data 1
19297 #undef elf_backend_obj_attrs_vendor
19298 #define elf_backend_obj_attrs_vendor "aeabi"
19299 #undef elf_backend_obj_attrs_section
19300 #define elf_backend_obj_attrs_section ".ARM.attributes"
19301 #undef elf_backend_obj_attrs_arg_type
19302 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
19303 #undef elf_backend_obj_attrs_section_type
19304 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
19305 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
19306 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
19308 #undef elf_backend_section_flags
19309 #define elf_backend_section_flags elf32_arm_section_flags
19310 #undef elf_backend_lookup_section_flags_hook
19311 #define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags
19313 #define elf_backend_linux_prpsinfo32_ugid16 TRUE
19315 #include "elf32-target.h"
19317 /* Native Client targets. */
19319 #undef TARGET_LITTLE_SYM
19320 #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec
19321 #undef TARGET_LITTLE_NAME
19322 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
19323 #undef TARGET_BIG_SYM
19324 #define TARGET_BIG_SYM arm_elf32_nacl_be_vec
19325 #undef TARGET_BIG_NAME
19326 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
19328 /* Like elf32_arm_link_hash_table_create -- but overrides
19329 appropriately for NaCl. */
19331 static struct bfd_link_hash_table
*
19332 elf32_arm_nacl_link_hash_table_create (bfd
*abfd
)
19334 struct bfd_link_hash_table
*ret
;
19336 ret
= elf32_arm_link_hash_table_create (abfd
);
19339 struct elf32_arm_link_hash_table
*htab
19340 = (struct elf32_arm_link_hash_table
*) ret
;
19344 htab
->plt_header_size
= 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry
);
19345 htab
->plt_entry_size
= 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry
);
19350 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
19351 really need to use elf32_arm_modify_segment_map. But we do it
19352 anyway just to reduce gratuitous differences with the stock ARM backend. */
19355 elf32_arm_nacl_modify_segment_map (bfd
*abfd
, struct bfd_link_info
*info
)
19357 return (elf32_arm_modify_segment_map (abfd
, info
)
19358 && nacl_modify_segment_map (abfd
, info
));
19362 elf32_arm_nacl_final_write_processing (bfd
*abfd
, bfd_boolean linker
)
19364 elf32_arm_final_write_processing (abfd
, linker
);
19365 nacl_final_write_processing (abfd
, linker
);
19369 elf32_arm_nacl_plt_sym_val (bfd_vma i
, const asection
*plt
,
19370 const arelent
*rel ATTRIBUTE_UNUSED
)
19373 + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry
) +
19374 i
* ARRAY_SIZE (elf32_arm_nacl_plt_entry
));
19378 #define elf32_bed elf32_arm_nacl_bed
19379 #undef bfd_elf32_bfd_link_hash_table_create
19380 #define bfd_elf32_bfd_link_hash_table_create \
19381 elf32_arm_nacl_link_hash_table_create
19382 #undef elf_backend_plt_alignment
19383 #define elf_backend_plt_alignment 4
19384 #undef elf_backend_modify_segment_map
19385 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
19386 #undef elf_backend_modify_program_headers
19387 #define elf_backend_modify_program_headers nacl_modify_program_headers
19388 #undef elf_backend_final_write_processing
19389 #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
19390 #undef bfd_elf32_get_synthetic_symtab
19391 #undef elf_backend_plt_sym_val
19392 #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
19393 #undef elf_backend_copy_special_section_fields
19395 #undef ELF_MINPAGESIZE
19396 #undef ELF_COMMONPAGESIZE
19399 #include "elf32-target.h"
19401 /* Reset to defaults. */
19402 #undef elf_backend_plt_alignment
19403 #undef elf_backend_modify_segment_map
19404 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
19405 #undef elf_backend_modify_program_headers
19406 #undef elf_backend_final_write_processing
19407 #define elf_backend_final_write_processing elf32_arm_final_write_processing
19408 #undef ELF_MINPAGESIZE
19409 #define ELF_MINPAGESIZE 0x1000
19410 #undef ELF_COMMONPAGESIZE
19411 #define ELF_COMMONPAGESIZE 0x1000
19414 /* VxWorks Targets. */
19416 #undef TARGET_LITTLE_SYM
19417 #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec
19418 #undef TARGET_LITTLE_NAME
19419 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
19420 #undef TARGET_BIG_SYM
19421 #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec
19422 #undef TARGET_BIG_NAME
19423 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
19425 /* Like elf32_arm_link_hash_table_create -- but overrides
19426 appropriately for VxWorks. */
19428 static struct bfd_link_hash_table
*
19429 elf32_arm_vxworks_link_hash_table_create (bfd
*abfd
)
19431 struct bfd_link_hash_table
*ret
;
19433 ret
= elf32_arm_link_hash_table_create (abfd
);
19436 struct elf32_arm_link_hash_table
*htab
19437 = (struct elf32_arm_link_hash_table
*) ret
;
19439 htab
->vxworks_p
= 1;
19445 elf32_arm_vxworks_final_write_processing (bfd
*abfd
, bfd_boolean linker
)
19447 elf32_arm_final_write_processing (abfd
, linker
);
19448 elf_vxworks_final_write_processing (abfd
, linker
);
19452 #define elf32_bed elf32_arm_vxworks_bed
19454 #undef bfd_elf32_bfd_link_hash_table_create
19455 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
19456 #undef elf_backend_final_write_processing
19457 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
19458 #undef elf_backend_emit_relocs
19459 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
19461 #undef elf_backend_may_use_rel_p
19462 #define elf_backend_may_use_rel_p 0
19463 #undef elf_backend_may_use_rela_p
19464 #define elf_backend_may_use_rela_p 1
19465 #undef elf_backend_default_use_rela_p
19466 #define elf_backend_default_use_rela_p 1
19467 #undef elf_backend_want_plt_sym
19468 #define elf_backend_want_plt_sym 1
19469 #undef ELF_MAXPAGESIZE
19470 #define ELF_MAXPAGESIZE 0x1000
19472 #include "elf32-target.h"
19475 /* Merge backend specific data from an object file to the output
19476 object file when linking. */
19479 elf32_arm_merge_private_bfd_data (bfd
*ibfd
, struct bfd_link_info
*info
)
19481 bfd
*obfd
= info
->output_bfd
;
19482 flagword out_flags
;
19484 bfd_boolean flags_compatible
= TRUE
;
19487 /* Check if we have the same endianness. */
19488 if (! _bfd_generic_verify_endian_match (ibfd
, info
))
19491 if (! is_arm_elf (ibfd
) || ! is_arm_elf (obfd
))
19494 if (!elf32_arm_merge_eabi_attributes (ibfd
, info
))
19497 /* The input BFD must have had its flags initialised. */
19498 /* The following seems bogus to me -- The flags are initialized in
19499 the assembler but I don't think an elf_flags_init field is
19500 written into the object. */
19501 /* BFD_ASSERT (elf_flags_init (ibfd)); */
19503 in_flags
= elf_elfheader (ibfd
)->e_flags
;
19504 out_flags
= elf_elfheader (obfd
)->e_flags
;
19506 /* In theory there is no reason why we couldn't handle this. However
19507 in practice it isn't even close to working and there is no real
19508 reason to want it. */
19509 if (EF_ARM_EABI_VERSION (in_flags
) >= EF_ARM_EABI_VER4
19510 && !(ibfd
->flags
& DYNAMIC
)
19511 && (in_flags
& EF_ARM_BE8
))
19513 _bfd_error_handler (_("error: %pB is already in final BE8 format"),
19518 if (!elf_flags_init (obfd
))
19520 /* If the input is the default architecture and had the default
19521 flags then do not bother setting the flags for the output
19522 architecture, instead allow future merges to do this. If no
19523 future merges ever set these flags then they will retain their
19524 uninitialised values, which surprise surprise, correspond
19525 to the default values. */
19526 if (bfd_get_arch_info (ibfd
)->the_default
19527 && elf_elfheader (ibfd
)->e_flags
== 0)
19530 elf_flags_init (obfd
) = TRUE
;
19531 elf_elfheader (obfd
)->e_flags
= in_flags
;
19533 if (bfd_get_arch (obfd
) == bfd_get_arch (ibfd
)
19534 && bfd_get_arch_info (obfd
)->the_default
)
19535 return bfd_set_arch_mach (obfd
, bfd_get_arch (ibfd
), bfd_get_mach (ibfd
));
19540 /* Determine what should happen if the input ARM architecture
19541 does not match the output ARM architecture. */
19542 if (! bfd_arm_merge_machines (ibfd
, obfd
))
19545 /* Identical flags must be compatible. */
19546 if (in_flags
== out_flags
)
19549 /* Check to see if the input BFD actually contains any sections. If
19550 not, its flags may not have been initialised either, but it
19551 cannot actually cause any incompatiblity. Do not short-circuit
19552 dynamic objects; their section list may be emptied by
19553 elf_link_add_object_symbols.
19555 Also check to see if there are no code sections in the input.
19556 In this case there is no need to check for code specific flags.
19557 XXX - do we need to worry about floating-point format compatability
19558 in data sections ? */
19559 if (!(ibfd
->flags
& DYNAMIC
))
19561 bfd_boolean null_input_bfd
= TRUE
;
19562 bfd_boolean only_data_sections
= TRUE
;
19564 for (sec
= ibfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
19566 /* Ignore synthetic glue sections. */
19567 if (strcmp (sec
->name
, ".glue_7")
19568 && strcmp (sec
->name
, ".glue_7t"))
19570 if ((bfd_get_section_flags (ibfd
, sec
)
19571 & (SEC_LOAD
| SEC_CODE
| SEC_HAS_CONTENTS
))
19572 == (SEC_LOAD
| SEC_CODE
| SEC_HAS_CONTENTS
))
19573 only_data_sections
= FALSE
;
19575 null_input_bfd
= FALSE
;
19580 if (null_input_bfd
|| only_data_sections
)
19584 /* Complain about various flag mismatches. */
19585 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags
),
19586 EF_ARM_EABI_VERSION (out_flags
)))
19589 (_("error: source object %pB has EABI version %d, but target %pB has EABI version %d"),
19590 ibfd
, (in_flags
& EF_ARM_EABIMASK
) >> 24,
19591 obfd
, (out_flags
& EF_ARM_EABIMASK
) >> 24);
19595 /* Not sure what needs to be checked for EABI versions >= 1. */
19596 /* VxWorks libraries do not use these flags. */
19597 if (get_elf_backend_data (obfd
) != &elf32_arm_vxworks_bed
19598 && get_elf_backend_data (ibfd
) != &elf32_arm_vxworks_bed
19599 && EF_ARM_EABI_VERSION (in_flags
) == EF_ARM_EABI_UNKNOWN
)
19601 if ((in_flags
& EF_ARM_APCS_26
) != (out_flags
& EF_ARM_APCS_26
))
19604 (_("error: %pB is compiled for APCS-%d, whereas target %pB uses APCS-%d"),
19605 ibfd
, in_flags
& EF_ARM_APCS_26
? 26 : 32,
19606 obfd
, out_flags
& EF_ARM_APCS_26
? 26 : 32);
19607 flags_compatible
= FALSE
;
19610 if ((in_flags
& EF_ARM_APCS_FLOAT
) != (out_flags
& EF_ARM_APCS_FLOAT
))
19612 if (in_flags
& EF_ARM_APCS_FLOAT
)
19614 (_("error: %pB passes floats in float registers, whereas %pB passes them in integer registers"),
19618 (_("error: %pB passes floats in integer registers, whereas %pB passes them in float registers"),
19621 flags_compatible
= FALSE
;
19624 if ((in_flags
& EF_ARM_VFP_FLOAT
) != (out_flags
& EF_ARM_VFP_FLOAT
))
19626 if (in_flags
& EF_ARM_VFP_FLOAT
)
19628 (_("error: %pB uses %s instructions, whereas %pB does not"),
19629 ibfd
, "VFP", obfd
);
19632 (_("error: %pB uses %s instructions, whereas %pB does not"),
19633 ibfd
, "FPA", obfd
);
19635 flags_compatible
= FALSE
;
19638 if ((in_flags
& EF_ARM_MAVERICK_FLOAT
) != (out_flags
& EF_ARM_MAVERICK_FLOAT
))
19640 if (in_flags
& EF_ARM_MAVERICK_FLOAT
)
19642 (_("error: %pB uses %s instructions, whereas %pB does not"),
19643 ibfd
, "Maverick", obfd
);
19646 (_("error: %pB does not use %s instructions, whereas %pB does"),
19647 ibfd
, "Maverick", obfd
);
19649 flags_compatible
= FALSE
;
19652 #ifdef EF_ARM_SOFT_FLOAT
19653 if ((in_flags
& EF_ARM_SOFT_FLOAT
) != (out_flags
& EF_ARM_SOFT_FLOAT
))
19655 /* We can allow interworking between code that is VFP format
19656 layout, and uses either soft float or integer regs for
19657 passing floating point arguments and results. We already
19658 know that the APCS_FLOAT flags match; similarly for VFP
19660 if ((in_flags
& EF_ARM_APCS_FLOAT
) != 0
19661 || (in_flags
& EF_ARM_VFP_FLOAT
) == 0)
19663 if (in_flags
& EF_ARM_SOFT_FLOAT
)
19665 (_("error: %pB uses software FP, whereas %pB uses hardware FP"),
19669 (_("error: %pB uses hardware FP, whereas %pB uses software FP"),
19672 flags_compatible
= FALSE
;
19677 /* Interworking mismatch is only a warning. */
19678 if ((in_flags
& EF_ARM_INTERWORK
) != (out_flags
& EF_ARM_INTERWORK
))
19680 if (in_flags
& EF_ARM_INTERWORK
)
19683 (_("warning: %pB supports interworking, whereas %pB does not"),
19689 (_("warning: %pB does not support interworking, whereas %pB does"),
19695 return flags_compatible
;
19699 /* Symbian OS Targets. */
19701 #undef TARGET_LITTLE_SYM
19702 #define TARGET_LITTLE_SYM arm_elf32_symbian_le_vec
19703 #undef TARGET_LITTLE_NAME
19704 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
19705 #undef TARGET_BIG_SYM
19706 #define TARGET_BIG_SYM arm_elf32_symbian_be_vec
19707 #undef TARGET_BIG_NAME
19708 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
19710 /* Like elf32_arm_link_hash_table_create -- but overrides
19711 appropriately for Symbian OS. */
19713 static struct bfd_link_hash_table
*
19714 elf32_arm_symbian_link_hash_table_create (bfd
*abfd
)
19716 struct bfd_link_hash_table
*ret
;
19718 ret
= elf32_arm_link_hash_table_create (abfd
);
19721 struct elf32_arm_link_hash_table
*htab
19722 = (struct elf32_arm_link_hash_table
*)ret
;
19723 /* There is no PLT header for Symbian OS. */
19724 htab
->plt_header_size
= 0;
19725 /* The PLT entries are each one instruction and one word. */
19726 htab
->plt_entry_size
= 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry
);
19727 htab
->symbian_p
= 1;
19728 /* Symbian uses armv5t or above, so use_blx is always true. */
19730 htab
->root
.is_relocatable_executable
= 1;
19735 static const struct bfd_elf_special_section
19736 elf32_arm_symbian_special_sections
[] =
19738 /* In a BPABI executable, the dynamic linking sections do not go in
19739 the loadable read-only segment. The post-linker may wish to
19740 refer to these sections, but they are not part of the final
19742 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC
, 0 },
19743 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB
, 0 },
19744 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM
, 0 },
19745 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS
, 0 },
19746 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH
, 0 },
19747 /* These sections do not need to be writable as the SymbianOS
19748 postlinker will arrange things so that no dynamic relocation is
19750 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY
, SHF_ALLOC
},
19751 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY
, SHF_ALLOC
},
19752 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY
, SHF_ALLOC
},
19753 { NULL
, 0, 0, 0, 0 }
19757 elf32_arm_symbian_begin_write_processing (bfd
*abfd
,
19758 struct bfd_link_info
*link_info
)
19760 /* BPABI objects are never loaded directly by an OS kernel; they are
19761 processed by a postlinker first, into an OS-specific format. If
19762 the D_PAGED bit is set on the file, BFD will align segments on
19763 page boundaries, so that an OS can directly map the file. With
19764 BPABI objects, that just results in wasted space. In addition,
19765 because we clear the D_PAGED bit, map_sections_to_segments will
19766 recognize that the program headers should not be mapped into any
19767 loadable segment. */
19768 abfd
->flags
&= ~D_PAGED
;
19769 elf32_arm_begin_write_processing (abfd
, link_info
);
19773 elf32_arm_symbian_modify_segment_map (bfd
*abfd
,
19774 struct bfd_link_info
*info
)
19776 struct elf_segment_map
*m
;
19779 /* BPABI shared libraries and executables should have a PT_DYNAMIC
19780 segment. However, because the .dynamic section is not marked
19781 with SEC_LOAD, the generic ELF code will not create such a
19783 dynsec
= bfd_get_section_by_name (abfd
, ".dynamic");
19786 for (m
= elf_seg_map (abfd
); m
!= NULL
; m
= m
->next
)
19787 if (m
->p_type
== PT_DYNAMIC
)
19792 m
= _bfd_elf_make_dynamic_segment (abfd
, dynsec
);
19793 m
->next
= elf_seg_map (abfd
);
19794 elf_seg_map (abfd
) = m
;
19798 /* Also call the generic arm routine. */
19799 return elf32_arm_modify_segment_map (abfd
, info
);
19802 /* Return address for Ith PLT stub in section PLT, for relocation REL
19803 or (bfd_vma) -1 if it should not be included. */
19806 elf32_arm_symbian_plt_sym_val (bfd_vma i
, const asection
*plt
,
19807 const arelent
*rel ATTRIBUTE_UNUSED
)
19809 return plt
->vma
+ 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry
) * i
;
19813 #define elf32_bed elf32_arm_symbian_bed
19815 /* The dynamic sections are not allocated on SymbianOS; the postlinker
19816 will process them and then discard them. */
19817 #undef ELF_DYNAMIC_SEC_FLAGS
19818 #define ELF_DYNAMIC_SEC_FLAGS \
19819 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
19821 #undef elf_backend_emit_relocs
19823 #undef bfd_elf32_bfd_link_hash_table_create
19824 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
19825 #undef elf_backend_special_sections
19826 #define elf_backend_special_sections elf32_arm_symbian_special_sections
19827 #undef elf_backend_begin_write_processing
19828 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
19829 #undef elf_backend_final_write_processing
19830 #define elf_backend_final_write_processing elf32_arm_final_write_processing
19832 #undef elf_backend_modify_segment_map
19833 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
19835 /* There is no .got section for BPABI objects, and hence no header. */
19836 #undef elf_backend_got_header_size
19837 #define elf_backend_got_header_size 0
19839 /* Similarly, there is no .got.plt section. */
19840 #undef elf_backend_want_got_plt
19841 #define elf_backend_want_got_plt 0
19843 #undef elf_backend_plt_sym_val
19844 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
19846 #undef elf_backend_may_use_rel_p
19847 #define elf_backend_may_use_rel_p 1
19848 #undef elf_backend_may_use_rela_p
19849 #define elf_backend_may_use_rela_p 0
19850 #undef elf_backend_default_use_rela_p
19851 #define elf_backend_default_use_rela_p 0
19852 #undef elf_backend_want_plt_sym
19853 #define elf_backend_want_plt_sym 0
19854 #undef elf_backend_dtrel_excludes_plt
19855 #define elf_backend_dtrel_excludes_plt 0
19856 #undef ELF_MAXPAGESIZE
19857 #define ELF_MAXPAGESIZE 0x8000
19859 #include "elf32-target.h"