1 /* 32-bit ELF support for ARM
2 Copyright 1998-2013 Free Software Foundation, Inc.
4 This file is part of BFD, the Binary File Descriptor library.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
25 #include "bfd_stdint.h"
26 #include "libiberty.h"
30 #include "elf-vxworks.h"
33 /* Return the relocation section associated with NAME. HTAB is the
34 bfd's elf32_arm_link_hash_entry. */
35 #define RELOC_SECTION(HTAB, NAME) \
36 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
38 /* Return size of a relocation entry. HTAB is the bfd's
39 elf32_arm_link_hash_entry. */
40 #define RELOC_SIZE(HTAB) \
42 ? sizeof (Elf32_External_Rel) \
43 : sizeof (Elf32_External_Rela))
45 /* Return function to swap relocations in. HTAB is the bfd's
46 elf32_arm_link_hash_entry. */
47 #define SWAP_RELOC_IN(HTAB) \
49 ? bfd_elf32_swap_reloc_in \
50 : bfd_elf32_swap_reloca_in)
52 /* Return function to swap relocations out. HTAB is the bfd's
53 elf32_arm_link_hash_entry. */
54 #define SWAP_RELOC_OUT(HTAB) \
56 ? bfd_elf32_swap_reloc_out \
57 : bfd_elf32_swap_reloca_out)
59 #define elf_info_to_howto 0
60 #define elf_info_to_howto_rel elf32_arm_info_to_howto
62 #define ARM_ELF_ABI_VERSION 0
63 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
65 /* The Adjusted Place, as defined by AAELF. */
66 #define Pa(X) ((X) & 0xfffffffc)
68 static bfd_boolean
elf32_arm_write_section (bfd
*output_bfd
,
69 struct bfd_link_info
*link_info
,
73 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
74 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
77 static reloc_howto_type elf32_arm_howto_table_1
[] =
80 HOWTO (R_ARM_NONE
, /* type */
82 0, /* size (0 = byte, 1 = short, 2 = long) */
84 FALSE
, /* pc_relative */
86 complain_overflow_dont
,/* complain_on_overflow */
87 bfd_elf_generic_reloc
, /* special_function */
88 "R_ARM_NONE", /* name */
89 FALSE
, /* partial_inplace */
92 FALSE
), /* pcrel_offset */
94 HOWTO (R_ARM_PC24
, /* type */
96 2, /* size (0 = byte, 1 = short, 2 = long) */
98 TRUE
, /* pc_relative */
100 complain_overflow_signed
,/* complain_on_overflow */
101 bfd_elf_generic_reloc
, /* special_function */
102 "R_ARM_PC24", /* name */
103 FALSE
, /* partial_inplace */
104 0x00ffffff, /* src_mask */
105 0x00ffffff, /* dst_mask */
106 TRUE
), /* pcrel_offset */
108 /* 32 bit absolute */
109 HOWTO (R_ARM_ABS32
, /* type */
111 2, /* size (0 = byte, 1 = short, 2 = long) */
113 FALSE
, /* pc_relative */
115 complain_overflow_bitfield
,/* complain_on_overflow */
116 bfd_elf_generic_reloc
, /* special_function */
117 "R_ARM_ABS32", /* name */
118 FALSE
, /* partial_inplace */
119 0xffffffff, /* src_mask */
120 0xffffffff, /* dst_mask */
121 FALSE
), /* pcrel_offset */
123 /* standard 32bit pc-relative reloc */
124 HOWTO (R_ARM_REL32
, /* type */
126 2, /* size (0 = byte, 1 = short, 2 = long) */
128 TRUE
, /* pc_relative */
130 complain_overflow_bitfield
,/* complain_on_overflow */
131 bfd_elf_generic_reloc
, /* special_function */
132 "R_ARM_REL32", /* name */
133 FALSE
, /* partial_inplace */
134 0xffffffff, /* src_mask */
135 0xffffffff, /* dst_mask */
136 TRUE
), /* pcrel_offset */
138 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
139 HOWTO (R_ARM_LDR_PC_G0
, /* type */
141 0, /* size (0 = byte, 1 = short, 2 = long) */
143 TRUE
, /* pc_relative */
145 complain_overflow_dont
,/* complain_on_overflow */
146 bfd_elf_generic_reloc
, /* special_function */
147 "R_ARM_LDR_PC_G0", /* name */
148 FALSE
, /* partial_inplace */
149 0xffffffff, /* src_mask */
150 0xffffffff, /* dst_mask */
151 TRUE
), /* pcrel_offset */
153 /* 16 bit absolute */
154 HOWTO (R_ARM_ABS16
, /* type */
156 1, /* size (0 = byte, 1 = short, 2 = long) */
158 FALSE
, /* pc_relative */
160 complain_overflow_bitfield
,/* complain_on_overflow */
161 bfd_elf_generic_reloc
, /* special_function */
162 "R_ARM_ABS16", /* name */
163 FALSE
, /* partial_inplace */
164 0x0000ffff, /* src_mask */
165 0x0000ffff, /* dst_mask */
166 FALSE
), /* pcrel_offset */
168 /* 12 bit absolute */
169 HOWTO (R_ARM_ABS12
, /* type */
171 2, /* size (0 = byte, 1 = short, 2 = long) */
173 FALSE
, /* pc_relative */
175 complain_overflow_bitfield
,/* complain_on_overflow */
176 bfd_elf_generic_reloc
, /* special_function */
177 "R_ARM_ABS12", /* name */
178 FALSE
, /* partial_inplace */
179 0x00000fff, /* src_mask */
180 0x00000fff, /* dst_mask */
181 FALSE
), /* pcrel_offset */
183 HOWTO (R_ARM_THM_ABS5
, /* type */
185 1, /* size (0 = byte, 1 = short, 2 = long) */
187 FALSE
, /* pc_relative */
189 complain_overflow_bitfield
,/* complain_on_overflow */
190 bfd_elf_generic_reloc
, /* special_function */
191 "R_ARM_THM_ABS5", /* name */
192 FALSE
, /* partial_inplace */
193 0x000007e0, /* src_mask */
194 0x000007e0, /* dst_mask */
195 FALSE
), /* pcrel_offset */
198 HOWTO (R_ARM_ABS8
, /* type */
200 0, /* size (0 = byte, 1 = short, 2 = long) */
202 FALSE
, /* pc_relative */
204 complain_overflow_bitfield
,/* complain_on_overflow */
205 bfd_elf_generic_reloc
, /* special_function */
206 "R_ARM_ABS8", /* name */
207 FALSE
, /* partial_inplace */
208 0x000000ff, /* src_mask */
209 0x000000ff, /* dst_mask */
210 FALSE
), /* pcrel_offset */
212 HOWTO (R_ARM_SBREL32
, /* type */
214 2, /* size (0 = byte, 1 = short, 2 = long) */
216 FALSE
, /* pc_relative */
218 complain_overflow_dont
,/* complain_on_overflow */
219 bfd_elf_generic_reloc
, /* special_function */
220 "R_ARM_SBREL32", /* name */
221 FALSE
, /* partial_inplace */
222 0xffffffff, /* src_mask */
223 0xffffffff, /* dst_mask */
224 FALSE
), /* pcrel_offset */
226 HOWTO (R_ARM_THM_CALL
, /* type */
228 2, /* size (0 = byte, 1 = short, 2 = long) */
230 TRUE
, /* pc_relative */
232 complain_overflow_signed
,/* complain_on_overflow */
233 bfd_elf_generic_reloc
, /* special_function */
234 "R_ARM_THM_CALL", /* name */
235 FALSE
, /* partial_inplace */
236 0x07ff2fff, /* src_mask */
237 0x07ff2fff, /* dst_mask */
238 TRUE
), /* pcrel_offset */
240 HOWTO (R_ARM_THM_PC8
, /* type */
242 1, /* size (0 = byte, 1 = short, 2 = long) */
244 TRUE
, /* pc_relative */
246 complain_overflow_signed
,/* complain_on_overflow */
247 bfd_elf_generic_reloc
, /* special_function */
248 "R_ARM_THM_PC8", /* name */
249 FALSE
, /* partial_inplace */
250 0x000000ff, /* src_mask */
251 0x000000ff, /* dst_mask */
252 TRUE
), /* pcrel_offset */
254 HOWTO (R_ARM_BREL_ADJ
, /* type */
256 1, /* size (0 = byte, 1 = short, 2 = long) */
258 FALSE
, /* pc_relative */
260 complain_overflow_signed
,/* complain_on_overflow */
261 bfd_elf_generic_reloc
, /* special_function */
262 "R_ARM_BREL_ADJ", /* name */
263 FALSE
, /* partial_inplace */
264 0xffffffff, /* src_mask */
265 0xffffffff, /* dst_mask */
266 FALSE
), /* pcrel_offset */
268 HOWTO (R_ARM_TLS_DESC
, /* type */
270 2, /* size (0 = byte, 1 = short, 2 = long) */
272 FALSE
, /* pc_relative */
274 complain_overflow_bitfield
,/* complain_on_overflow */
275 bfd_elf_generic_reloc
, /* special_function */
276 "R_ARM_TLS_DESC", /* name */
277 FALSE
, /* partial_inplace */
278 0xffffffff, /* src_mask */
279 0xffffffff, /* dst_mask */
280 FALSE
), /* pcrel_offset */
282 HOWTO (R_ARM_THM_SWI8
, /* type */
284 0, /* size (0 = byte, 1 = short, 2 = long) */
286 FALSE
, /* pc_relative */
288 complain_overflow_signed
,/* complain_on_overflow */
289 bfd_elf_generic_reloc
, /* special_function */
290 "R_ARM_SWI8", /* name */
291 FALSE
, /* partial_inplace */
292 0x00000000, /* src_mask */
293 0x00000000, /* dst_mask */
294 FALSE
), /* pcrel_offset */
296 /* BLX instruction for the ARM. */
297 HOWTO (R_ARM_XPC25
, /* type */
299 2, /* size (0 = byte, 1 = short, 2 = long) */
301 TRUE
, /* pc_relative */
303 complain_overflow_signed
,/* complain_on_overflow */
304 bfd_elf_generic_reloc
, /* special_function */
305 "R_ARM_XPC25", /* name */
306 FALSE
, /* partial_inplace */
307 0x00ffffff, /* src_mask */
308 0x00ffffff, /* dst_mask */
309 TRUE
), /* pcrel_offset */
311 /* BLX instruction for the Thumb. */
312 HOWTO (R_ARM_THM_XPC22
, /* type */
314 2, /* size (0 = byte, 1 = short, 2 = long) */
316 TRUE
, /* pc_relative */
318 complain_overflow_signed
,/* complain_on_overflow */
319 bfd_elf_generic_reloc
, /* special_function */
320 "R_ARM_THM_XPC22", /* name */
321 FALSE
, /* partial_inplace */
322 0x07ff2fff, /* src_mask */
323 0x07ff2fff, /* dst_mask */
324 TRUE
), /* pcrel_offset */
326 /* Dynamic TLS relocations. */
328 HOWTO (R_ARM_TLS_DTPMOD32
, /* type */
330 2, /* size (0 = byte, 1 = short, 2 = long) */
332 FALSE
, /* pc_relative */
334 complain_overflow_bitfield
,/* complain_on_overflow */
335 bfd_elf_generic_reloc
, /* special_function */
336 "R_ARM_TLS_DTPMOD32", /* name */
337 TRUE
, /* partial_inplace */
338 0xffffffff, /* src_mask */
339 0xffffffff, /* dst_mask */
340 FALSE
), /* pcrel_offset */
342 HOWTO (R_ARM_TLS_DTPOFF32
, /* type */
344 2, /* size (0 = byte, 1 = short, 2 = long) */
346 FALSE
, /* pc_relative */
348 complain_overflow_bitfield
,/* complain_on_overflow */
349 bfd_elf_generic_reloc
, /* special_function */
350 "R_ARM_TLS_DTPOFF32", /* name */
351 TRUE
, /* partial_inplace */
352 0xffffffff, /* src_mask */
353 0xffffffff, /* dst_mask */
354 FALSE
), /* pcrel_offset */
356 HOWTO (R_ARM_TLS_TPOFF32
, /* type */
358 2, /* size (0 = byte, 1 = short, 2 = long) */
360 FALSE
, /* pc_relative */
362 complain_overflow_bitfield
,/* complain_on_overflow */
363 bfd_elf_generic_reloc
, /* special_function */
364 "R_ARM_TLS_TPOFF32", /* name */
365 TRUE
, /* partial_inplace */
366 0xffffffff, /* src_mask */
367 0xffffffff, /* dst_mask */
368 FALSE
), /* pcrel_offset */
370 /* Relocs used in ARM Linux */
372 HOWTO (R_ARM_COPY
, /* type */
374 2, /* size (0 = byte, 1 = short, 2 = long) */
376 FALSE
, /* pc_relative */
378 complain_overflow_bitfield
,/* complain_on_overflow */
379 bfd_elf_generic_reloc
, /* special_function */
380 "R_ARM_COPY", /* name */
381 TRUE
, /* partial_inplace */
382 0xffffffff, /* src_mask */
383 0xffffffff, /* dst_mask */
384 FALSE
), /* pcrel_offset */
386 HOWTO (R_ARM_GLOB_DAT
, /* type */
388 2, /* size (0 = byte, 1 = short, 2 = long) */
390 FALSE
, /* pc_relative */
392 complain_overflow_bitfield
,/* complain_on_overflow */
393 bfd_elf_generic_reloc
, /* special_function */
394 "R_ARM_GLOB_DAT", /* name */
395 TRUE
, /* partial_inplace */
396 0xffffffff, /* src_mask */
397 0xffffffff, /* dst_mask */
398 FALSE
), /* pcrel_offset */
400 HOWTO (R_ARM_JUMP_SLOT
, /* type */
402 2, /* size (0 = byte, 1 = short, 2 = long) */
404 FALSE
, /* pc_relative */
406 complain_overflow_bitfield
,/* complain_on_overflow */
407 bfd_elf_generic_reloc
, /* special_function */
408 "R_ARM_JUMP_SLOT", /* name */
409 TRUE
, /* partial_inplace */
410 0xffffffff, /* src_mask */
411 0xffffffff, /* dst_mask */
412 FALSE
), /* pcrel_offset */
414 HOWTO (R_ARM_RELATIVE
, /* type */
416 2, /* size (0 = byte, 1 = short, 2 = long) */
418 FALSE
, /* pc_relative */
420 complain_overflow_bitfield
,/* complain_on_overflow */
421 bfd_elf_generic_reloc
, /* special_function */
422 "R_ARM_RELATIVE", /* name */
423 TRUE
, /* partial_inplace */
424 0xffffffff, /* src_mask */
425 0xffffffff, /* dst_mask */
426 FALSE
), /* pcrel_offset */
428 HOWTO (R_ARM_GOTOFF32
, /* type */
430 2, /* size (0 = byte, 1 = short, 2 = long) */
432 FALSE
, /* pc_relative */
434 complain_overflow_bitfield
,/* complain_on_overflow */
435 bfd_elf_generic_reloc
, /* special_function */
436 "R_ARM_GOTOFF32", /* name */
437 TRUE
, /* partial_inplace */
438 0xffffffff, /* src_mask */
439 0xffffffff, /* dst_mask */
440 FALSE
), /* pcrel_offset */
442 HOWTO (R_ARM_GOTPC
, /* type */
444 2, /* size (0 = byte, 1 = short, 2 = long) */
446 TRUE
, /* pc_relative */
448 complain_overflow_bitfield
,/* complain_on_overflow */
449 bfd_elf_generic_reloc
, /* special_function */
450 "R_ARM_GOTPC", /* name */
451 TRUE
, /* partial_inplace */
452 0xffffffff, /* src_mask */
453 0xffffffff, /* dst_mask */
454 TRUE
), /* pcrel_offset */
456 HOWTO (R_ARM_GOT32
, /* type */
458 2, /* size (0 = byte, 1 = short, 2 = long) */
460 FALSE
, /* pc_relative */
462 complain_overflow_bitfield
,/* complain_on_overflow */
463 bfd_elf_generic_reloc
, /* special_function */
464 "R_ARM_GOT32", /* name */
465 TRUE
, /* partial_inplace */
466 0xffffffff, /* src_mask */
467 0xffffffff, /* dst_mask */
468 FALSE
), /* pcrel_offset */
470 HOWTO (R_ARM_PLT32
, /* type */
472 2, /* size (0 = byte, 1 = short, 2 = long) */
474 TRUE
, /* pc_relative */
476 complain_overflow_bitfield
,/* complain_on_overflow */
477 bfd_elf_generic_reloc
, /* special_function */
478 "R_ARM_PLT32", /* name */
479 FALSE
, /* partial_inplace */
480 0x00ffffff, /* src_mask */
481 0x00ffffff, /* dst_mask */
482 TRUE
), /* pcrel_offset */
484 HOWTO (R_ARM_CALL
, /* type */
486 2, /* size (0 = byte, 1 = short, 2 = long) */
488 TRUE
, /* pc_relative */
490 complain_overflow_signed
,/* complain_on_overflow */
491 bfd_elf_generic_reloc
, /* special_function */
492 "R_ARM_CALL", /* name */
493 FALSE
, /* partial_inplace */
494 0x00ffffff, /* src_mask */
495 0x00ffffff, /* dst_mask */
496 TRUE
), /* pcrel_offset */
498 HOWTO (R_ARM_JUMP24
, /* type */
500 2, /* size (0 = byte, 1 = short, 2 = long) */
502 TRUE
, /* pc_relative */
504 complain_overflow_signed
,/* complain_on_overflow */
505 bfd_elf_generic_reloc
, /* special_function */
506 "R_ARM_JUMP24", /* name */
507 FALSE
, /* partial_inplace */
508 0x00ffffff, /* src_mask */
509 0x00ffffff, /* dst_mask */
510 TRUE
), /* pcrel_offset */
512 HOWTO (R_ARM_THM_JUMP24
, /* type */
514 2, /* size (0 = byte, 1 = short, 2 = long) */
516 TRUE
, /* pc_relative */
518 complain_overflow_signed
,/* complain_on_overflow */
519 bfd_elf_generic_reloc
, /* special_function */
520 "R_ARM_THM_JUMP24", /* name */
521 FALSE
, /* partial_inplace */
522 0x07ff2fff, /* src_mask */
523 0x07ff2fff, /* dst_mask */
524 TRUE
), /* pcrel_offset */
526 HOWTO (R_ARM_BASE_ABS
, /* type */
528 2, /* size (0 = byte, 1 = short, 2 = long) */
530 FALSE
, /* pc_relative */
532 complain_overflow_dont
,/* complain_on_overflow */
533 bfd_elf_generic_reloc
, /* special_function */
534 "R_ARM_BASE_ABS", /* name */
535 FALSE
, /* partial_inplace */
536 0xffffffff, /* src_mask */
537 0xffffffff, /* dst_mask */
538 FALSE
), /* pcrel_offset */
540 HOWTO (R_ARM_ALU_PCREL7_0
, /* type */
542 2, /* size (0 = byte, 1 = short, 2 = long) */
544 TRUE
, /* pc_relative */
546 complain_overflow_dont
,/* complain_on_overflow */
547 bfd_elf_generic_reloc
, /* special_function */
548 "R_ARM_ALU_PCREL_7_0", /* name */
549 FALSE
, /* partial_inplace */
550 0x00000fff, /* src_mask */
551 0x00000fff, /* dst_mask */
552 TRUE
), /* pcrel_offset */
554 HOWTO (R_ARM_ALU_PCREL15_8
, /* type */
556 2, /* size (0 = byte, 1 = short, 2 = long) */
558 TRUE
, /* pc_relative */
560 complain_overflow_dont
,/* complain_on_overflow */
561 bfd_elf_generic_reloc
, /* special_function */
562 "R_ARM_ALU_PCREL_15_8",/* name */
563 FALSE
, /* partial_inplace */
564 0x00000fff, /* src_mask */
565 0x00000fff, /* dst_mask */
566 TRUE
), /* pcrel_offset */
568 HOWTO (R_ARM_ALU_PCREL23_15
, /* type */
570 2, /* size (0 = byte, 1 = short, 2 = long) */
572 TRUE
, /* pc_relative */
574 complain_overflow_dont
,/* complain_on_overflow */
575 bfd_elf_generic_reloc
, /* special_function */
576 "R_ARM_ALU_PCREL_23_15",/* name */
577 FALSE
, /* partial_inplace */
578 0x00000fff, /* src_mask */
579 0x00000fff, /* dst_mask */
580 TRUE
), /* pcrel_offset */
582 HOWTO (R_ARM_LDR_SBREL_11_0
, /* type */
584 2, /* size (0 = byte, 1 = short, 2 = long) */
586 FALSE
, /* pc_relative */
588 complain_overflow_dont
,/* complain_on_overflow */
589 bfd_elf_generic_reloc
, /* special_function */
590 "R_ARM_LDR_SBREL_11_0",/* name */
591 FALSE
, /* partial_inplace */
592 0x00000fff, /* src_mask */
593 0x00000fff, /* dst_mask */
594 FALSE
), /* pcrel_offset */
596 HOWTO (R_ARM_ALU_SBREL_19_12
, /* type */
598 2, /* size (0 = byte, 1 = short, 2 = long) */
600 FALSE
, /* pc_relative */
602 complain_overflow_dont
,/* complain_on_overflow */
603 bfd_elf_generic_reloc
, /* special_function */
604 "R_ARM_ALU_SBREL_19_12",/* name */
605 FALSE
, /* partial_inplace */
606 0x000ff000, /* src_mask */
607 0x000ff000, /* dst_mask */
608 FALSE
), /* pcrel_offset */
610 HOWTO (R_ARM_ALU_SBREL_27_20
, /* type */
612 2, /* size (0 = byte, 1 = short, 2 = long) */
614 FALSE
, /* pc_relative */
616 complain_overflow_dont
,/* complain_on_overflow */
617 bfd_elf_generic_reloc
, /* special_function */
618 "R_ARM_ALU_SBREL_27_20",/* name */
619 FALSE
, /* partial_inplace */
620 0x0ff00000, /* src_mask */
621 0x0ff00000, /* dst_mask */
622 FALSE
), /* pcrel_offset */
624 HOWTO (R_ARM_TARGET1
, /* type */
626 2, /* size (0 = byte, 1 = short, 2 = long) */
628 FALSE
, /* pc_relative */
630 complain_overflow_dont
,/* complain_on_overflow */
631 bfd_elf_generic_reloc
, /* special_function */
632 "R_ARM_TARGET1", /* name */
633 FALSE
, /* partial_inplace */
634 0xffffffff, /* src_mask */
635 0xffffffff, /* dst_mask */
636 FALSE
), /* pcrel_offset */
638 HOWTO (R_ARM_ROSEGREL32
, /* type */
640 2, /* size (0 = byte, 1 = short, 2 = long) */
642 FALSE
, /* pc_relative */
644 complain_overflow_dont
,/* complain_on_overflow */
645 bfd_elf_generic_reloc
, /* special_function */
646 "R_ARM_ROSEGREL32", /* name */
647 FALSE
, /* partial_inplace */
648 0xffffffff, /* src_mask */
649 0xffffffff, /* dst_mask */
650 FALSE
), /* pcrel_offset */
652 HOWTO (R_ARM_V4BX
, /* type */
654 2, /* size (0 = byte, 1 = short, 2 = long) */
656 FALSE
, /* pc_relative */
658 complain_overflow_dont
,/* complain_on_overflow */
659 bfd_elf_generic_reloc
, /* special_function */
660 "R_ARM_V4BX", /* name */
661 FALSE
, /* partial_inplace */
662 0xffffffff, /* src_mask */
663 0xffffffff, /* dst_mask */
664 FALSE
), /* pcrel_offset */
666 HOWTO (R_ARM_TARGET2
, /* type */
668 2, /* size (0 = byte, 1 = short, 2 = long) */
670 FALSE
, /* pc_relative */
672 complain_overflow_signed
,/* complain_on_overflow */
673 bfd_elf_generic_reloc
, /* special_function */
674 "R_ARM_TARGET2", /* name */
675 FALSE
, /* partial_inplace */
676 0xffffffff, /* src_mask */
677 0xffffffff, /* dst_mask */
678 TRUE
), /* pcrel_offset */
680 HOWTO (R_ARM_PREL31
, /* type */
682 2, /* size (0 = byte, 1 = short, 2 = long) */
684 TRUE
, /* pc_relative */
686 complain_overflow_signed
,/* complain_on_overflow */
687 bfd_elf_generic_reloc
, /* special_function */
688 "R_ARM_PREL31", /* name */
689 FALSE
, /* partial_inplace */
690 0x7fffffff, /* src_mask */
691 0x7fffffff, /* dst_mask */
692 TRUE
), /* pcrel_offset */
694 HOWTO (R_ARM_MOVW_ABS_NC
, /* type */
696 2, /* size (0 = byte, 1 = short, 2 = long) */
698 FALSE
, /* pc_relative */
700 complain_overflow_dont
,/* complain_on_overflow */
701 bfd_elf_generic_reloc
, /* special_function */
702 "R_ARM_MOVW_ABS_NC", /* name */
703 FALSE
, /* partial_inplace */
704 0x000f0fff, /* src_mask */
705 0x000f0fff, /* dst_mask */
706 FALSE
), /* pcrel_offset */
708 HOWTO (R_ARM_MOVT_ABS
, /* type */
710 2, /* size (0 = byte, 1 = short, 2 = long) */
712 FALSE
, /* pc_relative */
714 complain_overflow_bitfield
,/* complain_on_overflow */
715 bfd_elf_generic_reloc
, /* special_function */
716 "R_ARM_MOVT_ABS", /* name */
717 FALSE
, /* partial_inplace */
718 0x000f0fff, /* src_mask */
719 0x000f0fff, /* dst_mask */
720 FALSE
), /* pcrel_offset */
722 HOWTO (R_ARM_MOVW_PREL_NC
, /* type */
724 2, /* size (0 = byte, 1 = short, 2 = long) */
726 TRUE
, /* pc_relative */
728 complain_overflow_dont
,/* complain_on_overflow */
729 bfd_elf_generic_reloc
, /* special_function */
730 "R_ARM_MOVW_PREL_NC", /* name */
731 FALSE
, /* partial_inplace */
732 0x000f0fff, /* src_mask */
733 0x000f0fff, /* dst_mask */
734 TRUE
), /* pcrel_offset */
736 HOWTO (R_ARM_MOVT_PREL
, /* type */
738 2, /* size (0 = byte, 1 = short, 2 = long) */
740 TRUE
, /* pc_relative */
742 complain_overflow_bitfield
,/* complain_on_overflow */
743 bfd_elf_generic_reloc
, /* special_function */
744 "R_ARM_MOVT_PREL", /* name */
745 FALSE
, /* partial_inplace */
746 0x000f0fff, /* src_mask */
747 0x000f0fff, /* dst_mask */
748 TRUE
), /* pcrel_offset */
750 HOWTO (R_ARM_THM_MOVW_ABS_NC
, /* type */
752 2, /* size (0 = byte, 1 = short, 2 = long) */
754 FALSE
, /* pc_relative */
756 complain_overflow_dont
,/* complain_on_overflow */
757 bfd_elf_generic_reloc
, /* special_function */
758 "R_ARM_THM_MOVW_ABS_NC",/* name */
759 FALSE
, /* partial_inplace */
760 0x040f70ff, /* src_mask */
761 0x040f70ff, /* dst_mask */
762 FALSE
), /* pcrel_offset */
764 HOWTO (R_ARM_THM_MOVT_ABS
, /* type */
766 2, /* size (0 = byte, 1 = short, 2 = long) */
768 FALSE
, /* pc_relative */
770 complain_overflow_bitfield
,/* complain_on_overflow */
771 bfd_elf_generic_reloc
, /* special_function */
772 "R_ARM_THM_MOVT_ABS", /* name */
773 FALSE
, /* partial_inplace */
774 0x040f70ff, /* src_mask */
775 0x040f70ff, /* dst_mask */
776 FALSE
), /* pcrel_offset */
778 HOWTO (R_ARM_THM_MOVW_PREL_NC
,/* type */
780 2, /* size (0 = byte, 1 = short, 2 = long) */
782 TRUE
, /* pc_relative */
784 complain_overflow_dont
,/* complain_on_overflow */
785 bfd_elf_generic_reloc
, /* special_function */
786 "R_ARM_THM_MOVW_PREL_NC",/* name */
787 FALSE
, /* partial_inplace */
788 0x040f70ff, /* src_mask */
789 0x040f70ff, /* dst_mask */
790 TRUE
), /* pcrel_offset */
792 HOWTO (R_ARM_THM_MOVT_PREL
, /* type */
794 2, /* size (0 = byte, 1 = short, 2 = long) */
796 TRUE
, /* pc_relative */
798 complain_overflow_bitfield
,/* complain_on_overflow */
799 bfd_elf_generic_reloc
, /* special_function */
800 "R_ARM_THM_MOVT_PREL", /* name */
801 FALSE
, /* partial_inplace */
802 0x040f70ff, /* src_mask */
803 0x040f70ff, /* dst_mask */
804 TRUE
), /* pcrel_offset */
806 HOWTO (R_ARM_THM_JUMP19
, /* type */
808 2, /* size (0 = byte, 1 = short, 2 = long) */
810 TRUE
, /* pc_relative */
812 complain_overflow_signed
,/* complain_on_overflow */
813 bfd_elf_generic_reloc
, /* special_function */
814 "R_ARM_THM_JUMP19", /* name */
815 FALSE
, /* partial_inplace */
816 0x043f2fff, /* src_mask */
817 0x043f2fff, /* dst_mask */
818 TRUE
), /* pcrel_offset */
820 HOWTO (R_ARM_THM_JUMP6
, /* type */
822 1, /* size (0 = byte, 1 = short, 2 = long) */
824 TRUE
, /* pc_relative */
826 complain_overflow_unsigned
,/* complain_on_overflow */
827 bfd_elf_generic_reloc
, /* special_function */
828 "R_ARM_THM_JUMP6", /* name */
829 FALSE
, /* partial_inplace */
830 0x02f8, /* src_mask */
831 0x02f8, /* dst_mask */
832 TRUE
), /* pcrel_offset */
834 /* These are declared as 13-bit signed relocations because we can
835 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
837 HOWTO (R_ARM_THM_ALU_PREL_11_0
,/* type */
839 2, /* size (0 = byte, 1 = short, 2 = long) */
841 TRUE
, /* pc_relative */
843 complain_overflow_dont
,/* complain_on_overflow */
844 bfd_elf_generic_reloc
, /* special_function */
845 "R_ARM_THM_ALU_PREL_11_0",/* name */
846 FALSE
, /* partial_inplace */
847 0xffffffff, /* src_mask */
848 0xffffffff, /* dst_mask */
849 TRUE
), /* pcrel_offset */
851 HOWTO (R_ARM_THM_PC12
, /* type */
853 2, /* size (0 = byte, 1 = short, 2 = long) */
855 TRUE
, /* pc_relative */
857 complain_overflow_dont
,/* complain_on_overflow */
858 bfd_elf_generic_reloc
, /* special_function */
859 "R_ARM_THM_PC12", /* name */
860 FALSE
, /* partial_inplace */
861 0xffffffff, /* src_mask */
862 0xffffffff, /* dst_mask */
863 TRUE
), /* pcrel_offset */
865 HOWTO (R_ARM_ABS32_NOI
, /* type */
867 2, /* size (0 = byte, 1 = short, 2 = long) */
869 FALSE
, /* pc_relative */
871 complain_overflow_dont
,/* complain_on_overflow */
872 bfd_elf_generic_reloc
, /* special_function */
873 "R_ARM_ABS32_NOI", /* name */
874 FALSE
, /* partial_inplace */
875 0xffffffff, /* src_mask */
876 0xffffffff, /* dst_mask */
877 FALSE
), /* pcrel_offset */
879 HOWTO (R_ARM_REL32_NOI
, /* type */
881 2, /* size (0 = byte, 1 = short, 2 = long) */
883 TRUE
, /* pc_relative */
885 complain_overflow_dont
,/* complain_on_overflow */
886 bfd_elf_generic_reloc
, /* special_function */
887 "R_ARM_REL32_NOI", /* name */
888 FALSE
, /* partial_inplace */
889 0xffffffff, /* src_mask */
890 0xffffffff, /* dst_mask */
891 FALSE
), /* pcrel_offset */
893 /* Group relocations. */
895 HOWTO (R_ARM_ALU_PC_G0_NC
, /* type */
897 2, /* size (0 = byte, 1 = short, 2 = long) */
899 TRUE
, /* pc_relative */
901 complain_overflow_dont
,/* complain_on_overflow */
902 bfd_elf_generic_reloc
, /* special_function */
903 "R_ARM_ALU_PC_G0_NC", /* name */
904 FALSE
, /* partial_inplace */
905 0xffffffff, /* src_mask */
906 0xffffffff, /* dst_mask */
907 TRUE
), /* pcrel_offset */
909 HOWTO (R_ARM_ALU_PC_G0
, /* type */
911 2, /* size (0 = byte, 1 = short, 2 = long) */
913 TRUE
, /* pc_relative */
915 complain_overflow_dont
,/* complain_on_overflow */
916 bfd_elf_generic_reloc
, /* special_function */
917 "R_ARM_ALU_PC_G0", /* name */
918 FALSE
, /* partial_inplace */
919 0xffffffff, /* src_mask */
920 0xffffffff, /* dst_mask */
921 TRUE
), /* pcrel_offset */
923 HOWTO (R_ARM_ALU_PC_G1_NC
, /* type */
925 2, /* size (0 = byte, 1 = short, 2 = long) */
927 TRUE
, /* pc_relative */
929 complain_overflow_dont
,/* complain_on_overflow */
930 bfd_elf_generic_reloc
, /* special_function */
931 "R_ARM_ALU_PC_G1_NC", /* name */
932 FALSE
, /* partial_inplace */
933 0xffffffff, /* src_mask */
934 0xffffffff, /* dst_mask */
935 TRUE
), /* pcrel_offset */
937 HOWTO (R_ARM_ALU_PC_G1
, /* type */
939 2, /* size (0 = byte, 1 = short, 2 = long) */
941 TRUE
, /* pc_relative */
943 complain_overflow_dont
,/* complain_on_overflow */
944 bfd_elf_generic_reloc
, /* special_function */
945 "R_ARM_ALU_PC_G1", /* name */
946 FALSE
, /* partial_inplace */
947 0xffffffff, /* src_mask */
948 0xffffffff, /* dst_mask */
949 TRUE
), /* pcrel_offset */
951 HOWTO (R_ARM_ALU_PC_G2
, /* type */
953 2, /* size (0 = byte, 1 = short, 2 = long) */
955 TRUE
, /* pc_relative */
957 complain_overflow_dont
,/* complain_on_overflow */
958 bfd_elf_generic_reloc
, /* special_function */
959 "R_ARM_ALU_PC_G2", /* name */
960 FALSE
, /* partial_inplace */
961 0xffffffff, /* src_mask */
962 0xffffffff, /* dst_mask */
963 TRUE
), /* pcrel_offset */
965 HOWTO (R_ARM_LDR_PC_G1
, /* type */
967 2, /* size (0 = byte, 1 = short, 2 = long) */
969 TRUE
, /* pc_relative */
971 complain_overflow_dont
,/* complain_on_overflow */
972 bfd_elf_generic_reloc
, /* special_function */
973 "R_ARM_LDR_PC_G1", /* name */
974 FALSE
, /* partial_inplace */
975 0xffffffff, /* src_mask */
976 0xffffffff, /* dst_mask */
977 TRUE
), /* pcrel_offset */
979 HOWTO (R_ARM_LDR_PC_G2
, /* type */
981 2, /* size (0 = byte, 1 = short, 2 = long) */
983 TRUE
, /* pc_relative */
985 complain_overflow_dont
,/* complain_on_overflow */
986 bfd_elf_generic_reloc
, /* special_function */
987 "R_ARM_LDR_PC_G2", /* name */
988 FALSE
, /* partial_inplace */
989 0xffffffff, /* src_mask */
990 0xffffffff, /* dst_mask */
991 TRUE
), /* pcrel_offset */
993 HOWTO (R_ARM_LDRS_PC_G0
, /* type */
995 2, /* size (0 = byte, 1 = short, 2 = long) */
997 TRUE
, /* pc_relative */
999 complain_overflow_dont
,/* complain_on_overflow */
1000 bfd_elf_generic_reloc
, /* special_function */
1001 "R_ARM_LDRS_PC_G0", /* name */
1002 FALSE
, /* partial_inplace */
1003 0xffffffff, /* src_mask */
1004 0xffffffff, /* dst_mask */
1005 TRUE
), /* pcrel_offset */
1007 HOWTO (R_ARM_LDRS_PC_G1
, /* type */
1009 2, /* size (0 = byte, 1 = short, 2 = long) */
1011 TRUE
, /* pc_relative */
1013 complain_overflow_dont
,/* complain_on_overflow */
1014 bfd_elf_generic_reloc
, /* special_function */
1015 "R_ARM_LDRS_PC_G1", /* name */
1016 FALSE
, /* partial_inplace */
1017 0xffffffff, /* src_mask */
1018 0xffffffff, /* dst_mask */
1019 TRUE
), /* pcrel_offset */
1021 HOWTO (R_ARM_LDRS_PC_G2
, /* type */
1023 2, /* size (0 = byte, 1 = short, 2 = long) */
1025 TRUE
, /* pc_relative */
1027 complain_overflow_dont
,/* complain_on_overflow */
1028 bfd_elf_generic_reloc
, /* special_function */
1029 "R_ARM_LDRS_PC_G2", /* name */
1030 FALSE
, /* partial_inplace */
1031 0xffffffff, /* src_mask */
1032 0xffffffff, /* dst_mask */
1033 TRUE
), /* pcrel_offset */
1035 HOWTO (R_ARM_LDC_PC_G0
, /* type */
1037 2, /* size (0 = byte, 1 = short, 2 = long) */
1039 TRUE
, /* pc_relative */
1041 complain_overflow_dont
,/* complain_on_overflow */
1042 bfd_elf_generic_reloc
, /* special_function */
1043 "R_ARM_LDC_PC_G0", /* name */
1044 FALSE
, /* partial_inplace */
1045 0xffffffff, /* src_mask */
1046 0xffffffff, /* dst_mask */
1047 TRUE
), /* pcrel_offset */
1049 HOWTO (R_ARM_LDC_PC_G1
, /* type */
1051 2, /* size (0 = byte, 1 = short, 2 = long) */
1053 TRUE
, /* pc_relative */
1055 complain_overflow_dont
,/* complain_on_overflow */
1056 bfd_elf_generic_reloc
, /* special_function */
1057 "R_ARM_LDC_PC_G1", /* name */
1058 FALSE
, /* partial_inplace */
1059 0xffffffff, /* src_mask */
1060 0xffffffff, /* dst_mask */
1061 TRUE
), /* pcrel_offset */
1063 HOWTO (R_ARM_LDC_PC_G2
, /* type */
1065 2, /* size (0 = byte, 1 = short, 2 = long) */
1067 TRUE
, /* pc_relative */
1069 complain_overflow_dont
,/* complain_on_overflow */
1070 bfd_elf_generic_reloc
, /* special_function */
1071 "R_ARM_LDC_PC_G2", /* name */
1072 FALSE
, /* partial_inplace */
1073 0xffffffff, /* src_mask */
1074 0xffffffff, /* dst_mask */
1075 TRUE
), /* pcrel_offset */
1077 HOWTO (R_ARM_ALU_SB_G0_NC
, /* type */
1079 2, /* size (0 = byte, 1 = short, 2 = long) */
1081 TRUE
, /* pc_relative */
1083 complain_overflow_dont
,/* complain_on_overflow */
1084 bfd_elf_generic_reloc
, /* special_function */
1085 "R_ARM_ALU_SB_G0_NC", /* name */
1086 FALSE
, /* partial_inplace */
1087 0xffffffff, /* src_mask */
1088 0xffffffff, /* dst_mask */
1089 TRUE
), /* pcrel_offset */
1091 HOWTO (R_ARM_ALU_SB_G0
, /* type */
1093 2, /* size (0 = byte, 1 = short, 2 = long) */
1095 TRUE
, /* pc_relative */
1097 complain_overflow_dont
,/* complain_on_overflow */
1098 bfd_elf_generic_reloc
, /* special_function */
1099 "R_ARM_ALU_SB_G0", /* name */
1100 FALSE
, /* partial_inplace */
1101 0xffffffff, /* src_mask */
1102 0xffffffff, /* dst_mask */
1103 TRUE
), /* pcrel_offset */
1105 HOWTO (R_ARM_ALU_SB_G1_NC
, /* type */
1107 2, /* size (0 = byte, 1 = short, 2 = long) */
1109 TRUE
, /* pc_relative */
1111 complain_overflow_dont
,/* complain_on_overflow */
1112 bfd_elf_generic_reloc
, /* special_function */
1113 "R_ARM_ALU_SB_G1_NC", /* name */
1114 FALSE
, /* partial_inplace */
1115 0xffffffff, /* src_mask */
1116 0xffffffff, /* dst_mask */
1117 TRUE
), /* pcrel_offset */
1119 HOWTO (R_ARM_ALU_SB_G1
, /* type */
1121 2, /* size (0 = byte, 1 = short, 2 = long) */
1123 TRUE
, /* pc_relative */
1125 complain_overflow_dont
,/* complain_on_overflow */
1126 bfd_elf_generic_reloc
, /* special_function */
1127 "R_ARM_ALU_SB_G1", /* name */
1128 FALSE
, /* partial_inplace */
1129 0xffffffff, /* src_mask */
1130 0xffffffff, /* dst_mask */
1131 TRUE
), /* pcrel_offset */
1133 HOWTO (R_ARM_ALU_SB_G2
, /* type */
1135 2, /* size (0 = byte, 1 = short, 2 = long) */
1137 TRUE
, /* pc_relative */
1139 complain_overflow_dont
,/* complain_on_overflow */
1140 bfd_elf_generic_reloc
, /* special_function */
1141 "R_ARM_ALU_SB_G2", /* name */
1142 FALSE
, /* partial_inplace */
1143 0xffffffff, /* src_mask */
1144 0xffffffff, /* dst_mask */
1145 TRUE
), /* pcrel_offset */
1147 HOWTO (R_ARM_LDR_SB_G0
, /* type */
1149 2, /* size (0 = byte, 1 = short, 2 = long) */
1151 TRUE
, /* pc_relative */
1153 complain_overflow_dont
,/* complain_on_overflow */
1154 bfd_elf_generic_reloc
, /* special_function */
1155 "R_ARM_LDR_SB_G0", /* name */
1156 FALSE
, /* partial_inplace */
1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
1159 TRUE
), /* pcrel_offset */
1161 HOWTO (R_ARM_LDR_SB_G1
, /* type */
1163 2, /* size (0 = byte, 1 = short, 2 = long) */
1165 TRUE
, /* pc_relative */
1167 complain_overflow_dont
,/* complain_on_overflow */
1168 bfd_elf_generic_reloc
, /* special_function */
1169 "R_ARM_LDR_SB_G1", /* name */
1170 FALSE
, /* partial_inplace */
1171 0xffffffff, /* src_mask */
1172 0xffffffff, /* dst_mask */
1173 TRUE
), /* pcrel_offset */
1175 HOWTO (R_ARM_LDR_SB_G2
, /* type */
1177 2, /* size (0 = byte, 1 = short, 2 = long) */
1179 TRUE
, /* pc_relative */
1181 complain_overflow_dont
,/* complain_on_overflow */
1182 bfd_elf_generic_reloc
, /* special_function */
1183 "R_ARM_LDR_SB_G2", /* name */
1184 FALSE
, /* partial_inplace */
1185 0xffffffff, /* src_mask */
1186 0xffffffff, /* dst_mask */
1187 TRUE
), /* pcrel_offset */
1189 HOWTO (R_ARM_LDRS_SB_G0
, /* type */
1191 2, /* size (0 = byte, 1 = short, 2 = long) */
1193 TRUE
, /* pc_relative */
1195 complain_overflow_dont
,/* complain_on_overflow */
1196 bfd_elf_generic_reloc
, /* special_function */
1197 "R_ARM_LDRS_SB_G0", /* name */
1198 FALSE
, /* partial_inplace */
1199 0xffffffff, /* src_mask */
1200 0xffffffff, /* dst_mask */
1201 TRUE
), /* pcrel_offset */
1203 HOWTO (R_ARM_LDRS_SB_G1
, /* type */
1205 2, /* size (0 = byte, 1 = short, 2 = long) */
1207 TRUE
, /* pc_relative */
1209 complain_overflow_dont
,/* complain_on_overflow */
1210 bfd_elf_generic_reloc
, /* special_function */
1211 "R_ARM_LDRS_SB_G1", /* name */
1212 FALSE
, /* partial_inplace */
1213 0xffffffff, /* src_mask */
1214 0xffffffff, /* dst_mask */
1215 TRUE
), /* pcrel_offset */
1217 HOWTO (R_ARM_LDRS_SB_G2
, /* type */
1219 2, /* size (0 = byte, 1 = short, 2 = long) */
1221 TRUE
, /* pc_relative */
1223 complain_overflow_dont
,/* complain_on_overflow */
1224 bfd_elf_generic_reloc
, /* special_function */
1225 "R_ARM_LDRS_SB_G2", /* name */
1226 FALSE
, /* partial_inplace */
1227 0xffffffff, /* src_mask */
1228 0xffffffff, /* dst_mask */
1229 TRUE
), /* pcrel_offset */
1231 HOWTO (R_ARM_LDC_SB_G0
, /* type */
1233 2, /* size (0 = byte, 1 = short, 2 = long) */
1235 TRUE
, /* pc_relative */
1237 complain_overflow_dont
,/* complain_on_overflow */
1238 bfd_elf_generic_reloc
, /* special_function */
1239 "R_ARM_LDC_SB_G0", /* name */
1240 FALSE
, /* partial_inplace */
1241 0xffffffff, /* src_mask */
1242 0xffffffff, /* dst_mask */
1243 TRUE
), /* pcrel_offset */
1245 HOWTO (R_ARM_LDC_SB_G1
, /* type */
1247 2, /* size (0 = byte, 1 = short, 2 = long) */
1249 TRUE
, /* pc_relative */
1251 complain_overflow_dont
,/* complain_on_overflow */
1252 bfd_elf_generic_reloc
, /* special_function */
1253 "R_ARM_LDC_SB_G1", /* name */
1254 FALSE
, /* partial_inplace */
1255 0xffffffff, /* src_mask */
1256 0xffffffff, /* dst_mask */
1257 TRUE
), /* pcrel_offset */
1259 HOWTO (R_ARM_LDC_SB_G2
, /* type */
1261 2, /* size (0 = byte, 1 = short, 2 = long) */
1263 TRUE
, /* pc_relative */
1265 complain_overflow_dont
,/* complain_on_overflow */
1266 bfd_elf_generic_reloc
, /* special_function */
1267 "R_ARM_LDC_SB_G2", /* name */
1268 FALSE
, /* partial_inplace */
1269 0xffffffff, /* src_mask */
1270 0xffffffff, /* dst_mask */
1271 TRUE
), /* pcrel_offset */
1273 /* End of group relocations. */
1275 HOWTO (R_ARM_MOVW_BREL_NC
, /* type */
1277 2, /* size (0 = byte, 1 = short, 2 = long) */
1279 FALSE
, /* pc_relative */
1281 complain_overflow_dont
,/* complain_on_overflow */
1282 bfd_elf_generic_reloc
, /* special_function */
1283 "R_ARM_MOVW_BREL_NC", /* name */
1284 FALSE
, /* partial_inplace */
1285 0x0000ffff, /* src_mask */
1286 0x0000ffff, /* dst_mask */
1287 FALSE
), /* pcrel_offset */
1289 HOWTO (R_ARM_MOVT_BREL
, /* type */
1291 2, /* size (0 = byte, 1 = short, 2 = long) */
1293 FALSE
, /* pc_relative */
1295 complain_overflow_bitfield
,/* complain_on_overflow */
1296 bfd_elf_generic_reloc
, /* special_function */
1297 "R_ARM_MOVT_BREL", /* name */
1298 FALSE
, /* partial_inplace */
1299 0x0000ffff, /* src_mask */
1300 0x0000ffff, /* dst_mask */
1301 FALSE
), /* pcrel_offset */
1303 HOWTO (R_ARM_MOVW_BREL
, /* type */
1305 2, /* size (0 = byte, 1 = short, 2 = long) */
1307 FALSE
, /* pc_relative */
1309 complain_overflow_dont
,/* complain_on_overflow */
1310 bfd_elf_generic_reloc
, /* special_function */
1311 "R_ARM_MOVW_BREL", /* name */
1312 FALSE
, /* partial_inplace */
1313 0x0000ffff, /* src_mask */
1314 0x0000ffff, /* dst_mask */
1315 FALSE
), /* pcrel_offset */
1317 HOWTO (R_ARM_THM_MOVW_BREL_NC
,/* type */
1319 2, /* size (0 = byte, 1 = short, 2 = long) */
1321 FALSE
, /* pc_relative */
1323 complain_overflow_dont
,/* complain_on_overflow */
1324 bfd_elf_generic_reloc
, /* special_function */
1325 "R_ARM_THM_MOVW_BREL_NC",/* name */
1326 FALSE
, /* partial_inplace */
1327 0x040f70ff, /* src_mask */
1328 0x040f70ff, /* dst_mask */
1329 FALSE
), /* pcrel_offset */
1331 HOWTO (R_ARM_THM_MOVT_BREL
, /* type */
1333 2, /* size (0 = byte, 1 = short, 2 = long) */
1335 FALSE
, /* pc_relative */
1337 complain_overflow_bitfield
,/* complain_on_overflow */
1338 bfd_elf_generic_reloc
, /* special_function */
1339 "R_ARM_THM_MOVT_BREL", /* name */
1340 FALSE
, /* partial_inplace */
1341 0x040f70ff, /* src_mask */
1342 0x040f70ff, /* dst_mask */
1343 FALSE
), /* pcrel_offset */
1345 HOWTO (R_ARM_THM_MOVW_BREL
, /* type */
1347 2, /* size (0 = byte, 1 = short, 2 = long) */
1349 FALSE
, /* pc_relative */
1351 complain_overflow_dont
,/* complain_on_overflow */
1352 bfd_elf_generic_reloc
, /* special_function */
1353 "R_ARM_THM_MOVW_BREL", /* name */
1354 FALSE
, /* partial_inplace */
1355 0x040f70ff, /* src_mask */
1356 0x040f70ff, /* dst_mask */
1357 FALSE
), /* pcrel_offset */
1359 HOWTO (R_ARM_TLS_GOTDESC
, /* type */
1361 2, /* size (0 = byte, 1 = short, 2 = long) */
1363 FALSE
, /* pc_relative */
1365 complain_overflow_bitfield
,/* complain_on_overflow */
1366 NULL
, /* special_function */
1367 "R_ARM_TLS_GOTDESC", /* name */
1368 TRUE
, /* partial_inplace */
1369 0xffffffff, /* src_mask */
1370 0xffffffff, /* dst_mask */
1371 FALSE
), /* pcrel_offset */
1373 HOWTO (R_ARM_TLS_CALL
, /* type */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1377 FALSE
, /* pc_relative */
1379 complain_overflow_dont
,/* complain_on_overflow */
1380 bfd_elf_generic_reloc
, /* special_function */
1381 "R_ARM_TLS_CALL", /* name */
1382 FALSE
, /* partial_inplace */
1383 0x00ffffff, /* src_mask */
1384 0x00ffffff, /* dst_mask */
1385 FALSE
), /* pcrel_offset */
1387 HOWTO (R_ARM_TLS_DESCSEQ
, /* type */
1389 2, /* size (0 = byte, 1 = short, 2 = long) */
1391 FALSE
, /* pc_relative */
1393 complain_overflow_bitfield
,/* complain_on_overflow */
1394 bfd_elf_generic_reloc
, /* special_function */
1395 "R_ARM_TLS_DESCSEQ", /* name */
1396 FALSE
, /* partial_inplace */
1397 0x00000000, /* src_mask */
1398 0x00000000, /* dst_mask */
1399 FALSE
), /* pcrel_offset */
1401 HOWTO (R_ARM_THM_TLS_CALL
, /* type */
1403 2, /* size (0 = byte, 1 = short, 2 = long) */
1405 FALSE
, /* pc_relative */
1407 complain_overflow_dont
,/* complain_on_overflow */
1408 bfd_elf_generic_reloc
, /* special_function */
1409 "R_ARM_THM_TLS_CALL", /* name */
1410 FALSE
, /* partial_inplace */
1411 0x07ff07ff, /* src_mask */
1412 0x07ff07ff, /* dst_mask */
1413 FALSE
), /* pcrel_offset */
1415 HOWTO (R_ARM_PLT32_ABS
, /* type */
1417 2, /* size (0 = byte, 1 = short, 2 = long) */
1419 FALSE
, /* pc_relative */
1421 complain_overflow_dont
,/* complain_on_overflow */
1422 bfd_elf_generic_reloc
, /* special_function */
1423 "R_ARM_PLT32_ABS", /* name */
1424 FALSE
, /* partial_inplace */
1425 0xffffffff, /* src_mask */
1426 0xffffffff, /* dst_mask */
1427 FALSE
), /* pcrel_offset */
1429 HOWTO (R_ARM_GOT_ABS
, /* type */
1431 2, /* size (0 = byte, 1 = short, 2 = long) */
1433 FALSE
, /* pc_relative */
1435 complain_overflow_dont
,/* complain_on_overflow */
1436 bfd_elf_generic_reloc
, /* special_function */
1437 "R_ARM_GOT_ABS", /* name */
1438 FALSE
, /* partial_inplace */
1439 0xffffffff, /* src_mask */
1440 0xffffffff, /* dst_mask */
1441 FALSE
), /* pcrel_offset */
1443 HOWTO (R_ARM_GOT_PREL
, /* type */
1445 2, /* size (0 = byte, 1 = short, 2 = long) */
1447 TRUE
, /* pc_relative */
1449 complain_overflow_dont
, /* complain_on_overflow */
1450 bfd_elf_generic_reloc
, /* special_function */
1451 "R_ARM_GOT_PREL", /* name */
1452 FALSE
, /* partial_inplace */
1453 0xffffffff, /* src_mask */
1454 0xffffffff, /* dst_mask */
1455 TRUE
), /* pcrel_offset */
1457 HOWTO (R_ARM_GOT_BREL12
, /* type */
1459 2, /* size (0 = byte, 1 = short, 2 = long) */
1461 FALSE
, /* pc_relative */
1463 complain_overflow_bitfield
,/* complain_on_overflow */
1464 bfd_elf_generic_reloc
, /* special_function */
1465 "R_ARM_GOT_BREL12", /* name */
1466 FALSE
, /* partial_inplace */
1467 0x00000fff, /* src_mask */
1468 0x00000fff, /* dst_mask */
1469 FALSE
), /* pcrel_offset */
1471 HOWTO (R_ARM_GOTOFF12
, /* type */
1473 2, /* size (0 = byte, 1 = short, 2 = long) */
1475 FALSE
, /* pc_relative */
1477 complain_overflow_bitfield
,/* complain_on_overflow */
1478 bfd_elf_generic_reloc
, /* special_function */
1479 "R_ARM_GOTOFF12", /* name */
1480 FALSE
, /* partial_inplace */
1481 0x00000fff, /* src_mask */
1482 0x00000fff, /* dst_mask */
1483 FALSE
), /* pcrel_offset */
1485 EMPTY_HOWTO (R_ARM_GOTRELAX
), /* reserved for future GOT-load optimizations */
1487 /* GNU extension to record C++ vtable member usage */
1488 HOWTO (R_ARM_GNU_VTENTRY
, /* type */
1490 2, /* size (0 = byte, 1 = short, 2 = long) */
1492 FALSE
, /* pc_relative */
1494 complain_overflow_dont
, /* complain_on_overflow */
1495 _bfd_elf_rel_vtable_reloc_fn
, /* special_function */
1496 "R_ARM_GNU_VTENTRY", /* name */
1497 FALSE
, /* partial_inplace */
1500 FALSE
), /* pcrel_offset */
1502 /* GNU extension to record C++ vtable hierarchy */
1503 HOWTO (R_ARM_GNU_VTINHERIT
, /* type */
1505 2, /* size (0 = byte, 1 = short, 2 = long) */
1507 FALSE
, /* pc_relative */
1509 complain_overflow_dont
, /* complain_on_overflow */
1510 NULL
, /* special_function */
1511 "R_ARM_GNU_VTINHERIT", /* name */
1512 FALSE
, /* partial_inplace */
1515 FALSE
), /* pcrel_offset */
1517 HOWTO (R_ARM_THM_JUMP11
, /* type */
1519 1, /* size (0 = byte, 1 = short, 2 = long) */
1521 TRUE
, /* pc_relative */
1523 complain_overflow_signed
, /* complain_on_overflow */
1524 bfd_elf_generic_reloc
, /* special_function */
1525 "R_ARM_THM_JUMP11", /* name */
1526 FALSE
, /* partial_inplace */
1527 0x000007ff, /* src_mask */
1528 0x000007ff, /* dst_mask */
1529 TRUE
), /* pcrel_offset */
1531 HOWTO (R_ARM_THM_JUMP8
, /* type */
1533 1, /* size (0 = byte, 1 = short, 2 = long) */
1535 TRUE
, /* pc_relative */
1537 complain_overflow_signed
, /* complain_on_overflow */
1538 bfd_elf_generic_reloc
, /* special_function */
1539 "R_ARM_THM_JUMP8", /* name */
1540 FALSE
, /* partial_inplace */
1541 0x000000ff, /* src_mask */
1542 0x000000ff, /* dst_mask */
1543 TRUE
), /* pcrel_offset */
1545 /* TLS relocations */
1546 HOWTO (R_ARM_TLS_GD32
, /* type */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
1550 FALSE
, /* pc_relative */
1552 complain_overflow_bitfield
,/* complain_on_overflow */
1553 NULL
, /* special_function */
1554 "R_ARM_TLS_GD32", /* name */
1555 TRUE
, /* partial_inplace */
1556 0xffffffff, /* src_mask */
1557 0xffffffff, /* dst_mask */
1558 FALSE
), /* pcrel_offset */
1560 HOWTO (R_ARM_TLS_LDM32
, /* type */
1562 2, /* size (0 = byte, 1 = short, 2 = long) */
1564 FALSE
, /* pc_relative */
1566 complain_overflow_bitfield
,/* complain_on_overflow */
1567 bfd_elf_generic_reloc
, /* special_function */
1568 "R_ARM_TLS_LDM32", /* name */
1569 TRUE
, /* partial_inplace */
1570 0xffffffff, /* src_mask */
1571 0xffffffff, /* dst_mask */
1572 FALSE
), /* pcrel_offset */
1574 HOWTO (R_ARM_TLS_LDO32
, /* type */
1576 2, /* size (0 = byte, 1 = short, 2 = long) */
1578 FALSE
, /* pc_relative */
1580 complain_overflow_bitfield
,/* complain_on_overflow */
1581 bfd_elf_generic_reloc
, /* special_function */
1582 "R_ARM_TLS_LDO32", /* name */
1583 TRUE
, /* partial_inplace */
1584 0xffffffff, /* src_mask */
1585 0xffffffff, /* dst_mask */
1586 FALSE
), /* pcrel_offset */
1588 HOWTO (R_ARM_TLS_IE32
, /* type */
1590 2, /* size (0 = byte, 1 = short, 2 = long) */
1592 FALSE
, /* pc_relative */
1594 complain_overflow_bitfield
,/* complain_on_overflow */
1595 NULL
, /* special_function */
1596 "R_ARM_TLS_IE32", /* name */
1597 TRUE
, /* partial_inplace */
1598 0xffffffff, /* src_mask */
1599 0xffffffff, /* dst_mask */
1600 FALSE
), /* pcrel_offset */
1602 HOWTO (R_ARM_TLS_LE32
, /* type */
1604 2, /* size (0 = byte, 1 = short, 2 = long) */
1606 FALSE
, /* pc_relative */
1608 complain_overflow_bitfield
,/* complain_on_overflow */
1609 bfd_elf_generic_reloc
, /* special_function */
1610 "R_ARM_TLS_LE32", /* name */
1611 TRUE
, /* partial_inplace */
1612 0xffffffff, /* src_mask */
1613 0xffffffff, /* dst_mask */
1614 FALSE
), /* pcrel_offset */
1616 HOWTO (R_ARM_TLS_LDO12
, /* type */
1618 2, /* size (0 = byte, 1 = short, 2 = long) */
1620 FALSE
, /* pc_relative */
1622 complain_overflow_bitfield
,/* complain_on_overflow */
1623 bfd_elf_generic_reloc
, /* special_function */
1624 "R_ARM_TLS_LDO12", /* name */
1625 FALSE
, /* partial_inplace */
1626 0x00000fff, /* src_mask */
1627 0x00000fff, /* dst_mask */
1628 FALSE
), /* pcrel_offset */
1630 HOWTO (R_ARM_TLS_LE12
, /* type */
1632 2, /* size (0 = byte, 1 = short, 2 = long) */
1634 FALSE
, /* pc_relative */
1636 complain_overflow_bitfield
,/* complain_on_overflow */
1637 bfd_elf_generic_reloc
, /* special_function */
1638 "R_ARM_TLS_LE12", /* name */
1639 FALSE
, /* partial_inplace */
1640 0x00000fff, /* src_mask */
1641 0x00000fff, /* dst_mask */
1642 FALSE
), /* pcrel_offset */
1644 HOWTO (R_ARM_TLS_IE12GP
, /* type */
1646 2, /* size (0 = byte, 1 = short, 2 = long) */
1648 FALSE
, /* pc_relative */
1650 complain_overflow_bitfield
,/* complain_on_overflow */
1651 bfd_elf_generic_reloc
, /* special_function */
1652 "R_ARM_TLS_IE12GP", /* name */
1653 FALSE
, /* partial_inplace */
1654 0x00000fff, /* src_mask */
1655 0x00000fff, /* dst_mask */
1656 FALSE
), /* pcrel_offset */
1658 /* 112-127 private relocations. */
1676 /* R_ARM_ME_TOO, obsolete. */
1679 HOWTO (R_ARM_THM_TLS_DESCSEQ
, /* type */
1681 1, /* size (0 = byte, 1 = short, 2 = long) */
1683 FALSE
, /* pc_relative */
1685 complain_overflow_bitfield
,/* complain_on_overflow */
1686 bfd_elf_generic_reloc
, /* special_function */
1687 "R_ARM_THM_TLS_DESCSEQ",/* name */
1688 FALSE
, /* partial_inplace */
1689 0x00000000, /* src_mask */
1690 0x00000000, /* dst_mask */
1691 FALSE
), /* pcrel_offset */
1695 static reloc_howto_type elf32_arm_howto_table_2
[1] =
1697 HOWTO (R_ARM_IRELATIVE
, /* type */
1699 2, /* size (0 = byte, 1 = short, 2 = long) */
1701 FALSE
, /* pc_relative */
1703 complain_overflow_bitfield
,/* complain_on_overflow */
1704 bfd_elf_generic_reloc
, /* special_function */
1705 "R_ARM_IRELATIVE", /* name */
1706 TRUE
, /* partial_inplace */
1707 0xffffffff, /* src_mask */
1708 0xffffffff, /* dst_mask */
1709 FALSE
) /* pcrel_offset */
1712 /* 249-255 extended, currently unused, relocations: */
1713 static reloc_howto_type elf32_arm_howto_table_3
[4] =
1715 HOWTO (R_ARM_RREL32
, /* type */
1717 0, /* size (0 = byte, 1 = short, 2 = long) */
1719 FALSE
, /* pc_relative */
1721 complain_overflow_dont
,/* complain_on_overflow */
1722 bfd_elf_generic_reloc
, /* special_function */
1723 "R_ARM_RREL32", /* name */
1724 FALSE
, /* partial_inplace */
1727 FALSE
), /* pcrel_offset */
1729 HOWTO (R_ARM_RABS32
, /* type */
1731 0, /* size (0 = byte, 1 = short, 2 = long) */
1733 FALSE
, /* pc_relative */
1735 complain_overflow_dont
,/* complain_on_overflow */
1736 bfd_elf_generic_reloc
, /* special_function */
1737 "R_ARM_RABS32", /* name */
1738 FALSE
, /* partial_inplace */
1741 FALSE
), /* pcrel_offset */
1743 HOWTO (R_ARM_RPC24
, /* type */
1745 0, /* size (0 = byte, 1 = short, 2 = long) */
1747 FALSE
, /* pc_relative */
1749 complain_overflow_dont
,/* complain_on_overflow */
1750 bfd_elf_generic_reloc
, /* special_function */
1751 "R_ARM_RPC24", /* name */
1752 FALSE
, /* partial_inplace */
1755 FALSE
), /* pcrel_offset */
1757 HOWTO (R_ARM_RBASE
, /* type */
1759 0, /* size (0 = byte, 1 = short, 2 = long) */
1761 FALSE
, /* pc_relative */
1763 complain_overflow_dont
,/* complain_on_overflow */
1764 bfd_elf_generic_reloc
, /* special_function */
1765 "R_ARM_RBASE", /* name */
1766 FALSE
, /* partial_inplace */
1769 FALSE
) /* pcrel_offset */
1772 static reloc_howto_type
*
1773 elf32_arm_howto_from_type (unsigned int r_type
)
1775 if (r_type
< ARRAY_SIZE (elf32_arm_howto_table_1
))
1776 return &elf32_arm_howto_table_1
[r_type
];
1778 if (r_type
== R_ARM_IRELATIVE
)
1779 return &elf32_arm_howto_table_2
[r_type
- R_ARM_IRELATIVE
];
1781 if (r_type
>= R_ARM_RREL32
1782 && r_type
< R_ARM_RREL32
+ ARRAY_SIZE (elf32_arm_howto_table_3
))
1783 return &elf32_arm_howto_table_3
[r_type
- R_ARM_RREL32
];
1789 elf32_arm_info_to_howto (bfd
* abfd ATTRIBUTE_UNUSED
, arelent
* bfd_reloc
,
1790 Elf_Internal_Rela
* elf_reloc
)
1792 unsigned int r_type
;
1794 r_type
= ELF32_R_TYPE (elf_reloc
->r_info
);
1795 bfd_reloc
->howto
= elf32_arm_howto_from_type (r_type
);
1798 struct elf32_arm_reloc_map
1800 bfd_reloc_code_real_type bfd_reloc_val
;
1801 unsigned char elf_reloc_val
;
1804 /* All entries in this list must also be present in elf32_arm_howto_table. */
1805 static const struct elf32_arm_reloc_map elf32_arm_reloc_map
[] =
1807 {BFD_RELOC_NONE
, R_ARM_NONE
},
1808 {BFD_RELOC_ARM_PCREL_BRANCH
, R_ARM_PC24
},
1809 {BFD_RELOC_ARM_PCREL_CALL
, R_ARM_CALL
},
1810 {BFD_RELOC_ARM_PCREL_JUMP
, R_ARM_JUMP24
},
1811 {BFD_RELOC_ARM_PCREL_BLX
, R_ARM_XPC25
},
1812 {BFD_RELOC_THUMB_PCREL_BLX
, R_ARM_THM_XPC22
},
1813 {BFD_RELOC_32
, R_ARM_ABS32
},
1814 {BFD_RELOC_32_PCREL
, R_ARM_REL32
},
1815 {BFD_RELOC_8
, R_ARM_ABS8
},
1816 {BFD_RELOC_16
, R_ARM_ABS16
},
1817 {BFD_RELOC_ARM_OFFSET_IMM
, R_ARM_ABS12
},
1818 {BFD_RELOC_ARM_THUMB_OFFSET
, R_ARM_THM_ABS5
},
1819 {BFD_RELOC_THUMB_PCREL_BRANCH25
, R_ARM_THM_JUMP24
},
1820 {BFD_RELOC_THUMB_PCREL_BRANCH23
, R_ARM_THM_CALL
},
1821 {BFD_RELOC_THUMB_PCREL_BRANCH12
, R_ARM_THM_JUMP11
},
1822 {BFD_RELOC_THUMB_PCREL_BRANCH20
, R_ARM_THM_JUMP19
},
1823 {BFD_RELOC_THUMB_PCREL_BRANCH9
, R_ARM_THM_JUMP8
},
1824 {BFD_RELOC_THUMB_PCREL_BRANCH7
, R_ARM_THM_JUMP6
},
1825 {BFD_RELOC_ARM_GLOB_DAT
, R_ARM_GLOB_DAT
},
1826 {BFD_RELOC_ARM_JUMP_SLOT
, R_ARM_JUMP_SLOT
},
1827 {BFD_RELOC_ARM_RELATIVE
, R_ARM_RELATIVE
},
1828 {BFD_RELOC_ARM_GOTOFF
, R_ARM_GOTOFF32
},
1829 {BFD_RELOC_ARM_GOTPC
, R_ARM_GOTPC
},
1830 {BFD_RELOC_ARM_GOT_PREL
, R_ARM_GOT_PREL
},
1831 {BFD_RELOC_ARM_GOT32
, R_ARM_GOT32
},
1832 {BFD_RELOC_ARM_PLT32
, R_ARM_PLT32
},
1833 {BFD_RELOC_ARM_TARGET1
, R_ARM_TARGET1
},
1834 {BFD_RELOC_ARM_ROSEGREL32
, R_ARM_ROSEGREL32
},
1835 {BFD_RELOC_ARM_SBREL32
, R_ARM_SBREL32
},
1836 {BFD_RELOC_ARM_PREL31
, R_ARM_PREL31
},
1837 {BFD_RELOC_ARM_TARGET2
, R_ARM_TARGET2
},
1838 {BFD_RELOC_ARM_PLT32
, R_ARM_PLT32
},
1839 {BFD_RELOC_ARM_TLS_GOTDESC
, R_ARM_TLS_GOTDESC
},
1840 {BFD_RELOC_ARM_TLS_CALL
, R_ARM_TLS_CALL
},
1841 {BFD_RELOC_ARM_THM_TLS_CALL
, R_ARM_THM_TLS_CALL
},
1842 {BFD_RELOC_ARM_TLS_DESCSEQ
, R_ARM_TLS_DESCSEQ
},
1843 {BFD_RELOC_ARM_THM_TLS_DESCSEQ
, R_ARM_THM_TLS_DESCSEQ
},
1844 {BFD_RELOC_ARM_TLS_DESC
, R_ARM_TLS_DESC
},
1845 {BFD_RELOC_ARM_TLS_GD32
, R_ARM_TLS_GD32
},
1846 {BFD_RELOC_ARM_TLS_LDO32
, R_ARM_TLS_LDO32
},
1847 {BFD_RELOC_ARM_TLS_LDM32
, R_ARM_TLS_LDM32
},
1848 {BFD_RELOC_ARM_TLS_DTPMOD32
, R_ARM_TLS_DTPMOD32
},
1849 {BFD_RELOC_ARM_TLS_DTPOFF32
, R_ARM_TLS_DTPOFF32
},
1850 {BFD_RELOC_ARM_TLS_TPOFF32
, R_ARM_TLS_TPOFF32
},
1851 {BFD_RELOC_ARM_TLS_IE32
, R_ARM_TLS_IE32
},
1852 {BFD_RELOC_ARM_TLS_LE32
, R_ARM_TLS_LE32
},
1853 {BFD_RELOC_ARM_IRELATIVE
, R_ARM_IRELATIVE
},
1854 {BFD_RELOC_VTABLE_INHERIT
, R_ARM_GNU_VTINHERIT
},
1855 {BFD_RELOC_VTABLE_ENTRY
, R_ARM_GNU_VTENTRY
},
1856 {BFD_RELOC_ARM_MOVW
, R_ARM_MOVW_ABS_NC
},
1857 {BFD_RELOC_ARM_MOVT
, R_ARM_MOVT_ABS
},
1858 {BFD_RELOC_ARM_MOVW_PCREL
, R_ARM_MOVW_PREL_NC
},
1859 {BFD_RELOC_ARM_MOVT_PCREL
, R_ARM_MOVT_PREL
},
1860 {BFD_RELOC_ARM_THUMB_MOVW
, R_ARM_THM_MOVW_ABS_NC
},
1861 {BFD_RELOC_ARM_THUMB_MOVT
, R_ARM_THM_MOVT_ABS
},
1862 {BFD_RELOC_ARM_THUMB_MOVW_PCREL
, R_ARM_THM_MOVW_PREL_NC
},
1863 {BFD_RELOC_ARM_THUMB_MOVT_PCREL
, R_ARM_THM_MOVT_PREL
},
1864 {BFD_RELOC_ARM_ALU_PC_G0_NC
, R_ARM_ALU_PC_G0_NC
},
1865 {BFD_RELOC_ARM_ALU_PC_G0
, R_ARM_ALU_PC_G0
},
1866 {BFD_RELOC_ARM_ALU_PC_G1_NC
, R_ARM_ALU_PC_G1_NC
},
1867 {BFD_RELOC_ARM_ALU_PC_G1
, R_ARM_ALU_PC_G1
},
1868 {BFD_RELOC_ARM_ALU_PC_G2
, R_ARM_ALU_PC_G2
},
1869 {BFD_RELOC_ARM_LDR_PC_G0
, R_ARM_LDR_PC_G0
},
1870 {BFD_RELOC_ARM_LDR_PC_G1
, R_ARM_LDR_PC_G1
},
1871 {BFD_RELOC_ARM_LDR_PC_G2
, R_ARM_LDR_PC_G2
},
1872 {BFD_RELOC_ARM_LDRS_PC_G0
, R_ARM_LDRS_PC_G0
},
1873 {BFD_RELOC_ARM_LDRS_PC_G1
, R_ARM_LDRS_PC_G1
},
1874 {BFD_RELOC_ARM_LDRS_PC_G2
, R_ARM_LDRS_PC_G2
},
1875 {BFD_RELOC_ARM_LDC_PC_G0
, R_ARM_LDC_PC_G0
},
1876 {BFD_RELOC_ARM_LDC_PC_G1
, R_ARM_LDC_PC_G1
},
1877 {BFD_RELOC_ARM_LDC_PC_G2
, R_ARM_LDC_PC_G2
},
1878 {BFD_RELOC_ARM_ALU_SB_G0_NC
, R_ARM_ALU_SB_G0_NC
},
1879 {BFD_RELOC_ARM_ALU_SB_G0
, R_ARM_ALU_SB_G0
},
1880 {BFD_RELOC_ARM_ALU_SB_G1_NC
, R_ARM_ALU_SB_G1_NC
},
1881 {BFD_RELOC_ARM_ALU_SB_G1
, R_ARM_ALU_SB_G1
},
1882 {BFD_RELOC_ARM_ALU_SB_G2
, R_ARM_ALU_SB_G2
},
1883 {BFD_RELOC_ARM_LDR_SB_G0
, R_ARM_LDR_SB_G0
},
1884 {BFD_RELOC_ARM_LDR_SB_G1
, R_ARM_LDR_SB_G1
},
1885 {BFD_RELOC_ARM_LDR_SB_G2
, R_ARM_LDR_SB_G2
},
1886 {BFD_RELOC_ARM_LDRS_SB_G0
, R_ARM_LDRS_SB_G0
},
1887 {BFD_RELOC_ARM_LDRS_SB_G1
, R_ARM_LDRS_SB_G1
},
1888 {BFD_RELOC_ARM_LDRS_SB_G2
, R_ARM_LDRS_SB_G2
},
1889 {BFD_RELOC_ARM_LDC_SB_G0
, R_ARM_LDC_SB_G0
},
1890 {BFD_RELOC_ARM_LDC_SB_G1
, R_ARM_LDC_SB_G1
},
1891 {BFD_RELOC_ARM_LDC_SB_G2
, R_ARM_LDC_SB_G2
},
1892 {BFD_RELOC_ARM_V4BX
, R_ARM_V4BX
}
1895 static reloc_howto_type
*
1896 elf32_arm_reloc_type_lookup (bfd
*abfd ATTRIBUTE_UNUSED
,
1897 bfd_reloc_code_real_type code
)
1901 for (i
= 0; i
< ARRAY_SIZE (elf32_arm_reloc_map
); i
++)
1902 if (elf32_arm_reloc_map
[i
].bfd_reloc_val
== code
)
1903 return elf32_arm_howto_from_type (elf32_arm_reloc_map
[i
].elf_reloc_val
);
1908 static reloc_howto_type
*
1909 elf32_arm_reloc_name_lookup (bfd
*abfd ATTRIBUTE_UNUSED
,
1914 for (i
= 0; i
< ARRAY_SIZE (elf32_arm_howto_table_1
); i
++)
1915 if (elf32_arm_howto_table_1
[i
].name
!= NULL
1916 && strcasecmp (elf32_arm_howto_table_1
[i
].name
, r_name
) == 0)
1917 return &elf32_arm_howto_table_1
[i
];
1919 for (i
= 0; i
< ARRAY_SIZE (elf32_arm_howto_table_2
); i
++)
1920 if (elf32_arm_howto_table_2
[i
].name
!= NULL
1921 && strcasecmp (elf32_arm_howto_table_2
[i
].name
, r_name
) == 0)
1922 return &elf32_arm_howto_table_2
[i
];
1924 for (i
= 0; i
< ARRAY_SIZE (elf32_arm_howto_table_3
); i
++)
1925 if (elf32_arm_howto_table_3
[i
].name
!= NULL
1926 && strcasecmp (elf32_arm_howto_table_3
[i
].name
, r_name
) == 0)
1927 return &elf32_arm_howto_table_3
[i
];
1932 /* Support for core dump NOTE sections. */
1935 elf32_arm_nabi_grok_prstatus (bfd
*abfd
, Elf_Internal_Note
*note
)
1940 switch (note
->descsz
)
1945 case 148: /* Linux/ARM 32-bit. */
1947 elf_tdata (abfd
)->core
->signal
= bfd_get_16 (abfd
, note
->descdata
+ 12);
1950 elf_tdata (abfd
)->core
->lwpid
= bfd_get_32 (abfd
, note
->descdata
+ 24);
1959 /* Make a ".reg/999" section. */
1960 return _bfd_elfcore_make_pseudosection (abfd
, ".reg",
1961 size
, note
->descpos
+ offset
);
1965 elf32_arm_nabi_grok_psinfo (bfd
*abfd
, Elf_Internal_Note
*note
)
1967 switch (note
->descsz
)
1972 case 124: /* Linux/ARM elf_prpsinfo. */
1973 elf_tdata (abfd
)->core
->pid
1974 = bfd_get_32 (abfd
, note
->descdata
+ 12);
1975 elf_tdata (abfd
)->core
->program
1976 = _bfd_elfcore_strndup (abfd
, note
->descdata
+ 28, 16);
1977 elf_tdata (abfd
)->core
->command
1978 = _bfd_elfcore_strndup (abfd
, note
->descdata
+ 44, 80);
1981 /* Note that for some reason, a spurious space is tacked
1982 onto the end of the args in some (at least one anyway)
1983 implementations, so strip it off if it exists. */
1985 char *command
= elf_tdata (abfd
)->core
->command
;
1986 int n
= strlen (command
);
1988 if (0 < n
&& command
[n
- 1] == ' ')
1989 command
[n
- 1] = '\0';
1996 elf32_arm_nabi_write_core_note (bfd
*abfd
, char *buf
, int *bufsiz
,
2009 va_start (ap
, note_type
);
2010 memset (data
, 0, sizeof (data
));
2011 strncpy (data
+ 28, va_arg (ap
, const char *), 16);
2012 strncpy (data
+ 44, va_arg (ap
, const char *), 80);
2015 return elfcore_write_note (abfd
, buf
, bufsiz
,
2016 "CORE", note_type
, data
, sizeof (data
));
2027 va_start (ap
, note_type
);
2028 memset (data
, 0, sizeof (data
));
2029 pid
= va_arg (ap
, long);
2030 bfd_put_32 (abfd
, pid
, data
+ 24);
2031 cursig
= va_arg (ap
, int);
2032 bfd_put_16 (abfd
, cursig
, data
+ 12);
2033 greg
= va_arg (ap
, const void *);
2034 memcpy (data
+ 72, greg
, 72);
2037 return elfcore_write_note (abfd
, buf
, bufsiz
,
2038 "CORE", note_type
, data
, sizeof (data
));
2043 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
2044 #define TARGET_LITTLE_NAME "elf32-littlearm"
2045 #define TARGET_BIG_SYM bfd_elf32_bigarm_vec
2046 #define TARGET_BIG_NAME "elf32-bigarm"
2048 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2049 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2050 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2052 typedef unsigned long int insn32
;
2053 typedef unsigned short int insn16
;
2055 /* In lieu of proper flags, assume all EABIv4 or later objects are
2057 #define INTERWORK_FLAG(abfd) \
2058 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2059 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2060 || ((abfd)->flags & BFD_LINKER_CREATED))
2062 /* The linker script knows the section names for placement.
2063 The entry_names are used to do simple name mangling on the stubs.
2064 Given a function name, and its type, the stub can be found. The
2065 name can be changed. The only requirement is the %s be present. */
2066 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2067 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2069 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2070 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2072 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2073 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2075 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2076 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2078 #define STUB_ENTRY_NAME "__%s_veneer"
2080 /* The name of the dynamic interpreter. This is put in the .interp
2082 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2084 static const unsigned long tls_trampoline
[] =
2086 0xe08e0000, /* add r0, lr, r0 */
2087 0xe5901004, /* ldr r1, [r0,#4] */
2088 0xe12fff11, /* bx r1 */
2091 static const unsigned long dl_tlsdesc_lazy_trampoline
[] =
2093 0xe52d2004, /* push {r2} */
2094 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2095 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2096 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2097 0xe081100f, /* 2: add r1, pc */
2098 0xe12fff12, /* bx r2 */
2099 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2100 + dl_tlsdesc_lazy_resolver(GOT) */
2101 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2104 #ifdef FOUR_WORD_PLT
2106 /* The first entry in a procedure linkage table looks like
2107 this. It is set up so that any shared library function that is
2108 called before the relocation has been set up calls the dynamic
2110 static const bfd_vma elf32_arm_plt0_entry
[] =
2112 0xe52de004, /* str lr, [sp, #-4]! */
2113 0xe59fe010, /* ldr lr, [pc, #16] */
2114 0xe08fe00e, /* add lr, pc, lr */
2115 0xe5bef008, /* ldr pc, [lr, #8]! */
2118 /* Subsequent entries in a procedure linkage table look like
2120 static const bfd_vma elf32_arm_plt_entry
[] =
2122 0xe28fc600, /* add ip, pc, #NN */
2123 0xe28cca00, /* add ip, ip, #NN */
2124 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2125 0x00000000, /* unused */
2130 /* The first entry in a procedure linkage table looks like
2131 this. It is set up so that any shared library function that is
2132 called before the relocation has been set up calls the dynamic
2134 static const bfd_vma elf32_arm_plt0_entry
[] =
2136 0xe52de004, /* str lr, [sp, #-4]! */
2137 0xe59fe004, /* ldr lr, [pc, #4] */
2138 0xe08fe00e, /* add lr, pc, lr */
2139 0xe5bef008, /* ldr pc, [lr, #8]! */
2140 0x00000000, /* &GOT[0] - . */
2143 /* Subsequent entries in a procedure linkage table look like
2145 static const bfd_vma elf32_arm_plt_entry
[] =
2147 0xe28fc600, /* add ip, pc, #0xNN00000 */
2148 0xe28cca00, /* add ip, ip, #0xNN000 */
2149 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2154 /* The format of the first entry in the procedure linkage table
2155 for a VxWorks executable. */
2156 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry
[] =
2158 0xe52dc008, /* str ip,[sp,#-8]! */
2159 0xe59fc000, /* ldr ip,[pc] */
2160 0xe59cf008, /* ldr pc,[ip,#8] */
2161 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2164 /* The format of subsequent entries in a VxWorks executable. */
2165 static const bfd_vma elf32_arm_vxworks_exec_plt_entry
[] =
2167 0xe59fc000, /* ldr ip,[pc] */
2168 0xe59cf000, /* ldr pc,[ip] */
2169 0x00000000, /* .long @got */
2170 0xe59fc000, /* ldr ip,[pc] */
2171 0xea000000, /* b _PLT */
2172 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2175 /* The format of entries in a VxWorks shared library. */
2176 static const bfd_vma elf32_arm_vxworks_shared_plt_entry
[] =
2178 0xe59fc000, /* ldr ip,[pc] */
2179 0xe79cf009, /* ldr pc,[ip,r9] */
2180 0x00000000, /* .long @got */
2181 0xe59fc000, /* ldr ip,[pc] */
2182 0xe599f008, /* ldr pc,[r9,#8] */
2183 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2186 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2187 #define PLT_THUMB_STUB_SIZE 4
2188 static const bfd_vma elf32_arm_plt_thumb_stub
[] =
2194 /* The entries in a PLT when using a DLL-based target with multiple
2196 static const bfd_vma elf32_arm_symbian_plt_entry
[] =
2198 0xe51ff004, /* ldr pc, [pc, #-4] */
2199 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2202 /* The first entry in a procedure linkage table looks like
2203 this. It is set up so that any shared library function that is
2204 called before the relocation has been set up calls the dynamic
2206 static const bfd_vma elf32_arm_nacl_plt0_entry
[] =
2209 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2210 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2211 0xe08cc00f, /* add ip, ip, pc */
2212 0xe52dc008, /* str ip, [sp, #-8]! */
2213 /* Second bundle: */
2214 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2215 0xe59cc000, /* ldr ip, [ip] */
2216 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2217 0xe12fff1c, /* bx ip */
2219 0xe320f000, /* nop */
2220 0xe320f000, /* nop */
2221 0xe320f000, /* nop */
2223 0xe50dc004, /* str ip, [sp, #-4] */
2224 /* Fourth bundle: */
2225 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2226 0xe59cc000, /* ldr ip, [ip] */
2227 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2228 0xe12fff1c, /* bx ip */
2230 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2232 /* Subsequent entries in a procedure linkage table look like this. */
2233 static const bfd_vma elf32_arm_nacl_plt_entry
[] =
2235 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2236 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2237 0xe08cc00f, /* add ip, ip, pc */
2238 0xea000000, /* b .Lplt_tail */
2241 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2242 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2243 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2244 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2245 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2246 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2256 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2257 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2258 is inserted in arm_build_one_stub(). */
2259 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2260 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2261 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2262 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2263 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2264 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2269 enum stub_insn_type type
;
2270 unsigned int r_type
;
2274 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2275 to reach the stub if necessary. */
2276 static const insn_sequence elf32_arm_stub_long_branch_any_any
[] =
2278 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2279 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2282 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2284 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb
[] =
2286 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2287 ARM_INSN (0xe12fff1c), /* bx ip */
2288 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2291 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2292 static const insn_sequence elf32_arm_stub_long_branch_thumb_only
[] =
2294 THUMB16_INSN (0xb401), /* push {r0} */
2295 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2296 THUMB16_INSN (0x4684), /* mov ip, r0 */
2297 THUMB16_INSN (0xbc01), /* pop {r0} */
2298 THUMB16_INSN (0x4760), /* bx ip */
2299 THUMB16_INSN (0xbf00), /* nop */
2300 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2303 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2305 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb
[] =
2307 THUMB16_INSN (0x4778), /* bx pc */
2308 THUMB16_INSN (0x46c0), /* nop */
2309 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2310 ARM_INSN (0xe12fff1c), /* bx ip */
2311 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2314 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2316 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm
[] =
2318 THUMB16_INSN (0x4778), /* bx pc */
2319 THUMB16_INSN (0x46c0), /* nop */
2320 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2321 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2324 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2325 one, when the destination is close enough. */
2326 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm
[] =
2328 THUMB16_INSN (0x4778), /* bx pc */
2329 THUMB16_INSN (0x46c0), /* nop */
2330 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2333 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2334 blx to reach the stub if necessary. */
2335 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic
[] =
2337 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2338 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2339 DATA_WORD (0, R_ARM_REL32
, -4), /* dcd R_ARM_REL32(X-4) */
2342 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2343 blx to reach the stub if necessary. We can not add into pc;
2344 it is not guaranteed to mode switch (different in ARMv6 and
2346 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic
[] =
2348 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2349 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2350 ARM_INSN (0xe12fff1c), /* bx ip */
2351 DATA_WORD (0, R_ARM_REL32
, 0), /* dcd R_ARM_REL32(X) */
2354 /* V4T ARM -> ARM long branch stub, PIC. */
2355 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic
[] =
2357 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2358 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2359 ARM_INSN (0xe12fff1c), /* bx ip */
2360 DATA_WORD (0, R_ARM_REL32
, 0), /* dcd R_ARM_REL32(X) */
2363 /* V4T Thumb -> ARM long branch stub, PIC. */
2364 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic
[] =
2366 THUMB16_INSN (0x4778), /* bx pc */
2367 THUMB16_INSN (0x46c0), /* nop */
2368 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2369 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2370 DATA_WORD (0, R_ARM_REL32
, -4), /* dcd R_ARM_REL32(X) */
2373 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2375 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic
[] =
2377 THUMB16_INSN (0xb401), /* push {r0} */
2378 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2379 THUMB16_INSN (0x46fc), /* mov ip, pc */
2380 THUMB16_INSN (0x4484), /* add ip, r0 */
2381 THUMB16_INSN (0xbc01), /* pop {r0} */
2382 THUMB16_INSN (0x4760), /* bx ip */
2383 DATA_WORD (0, R_ARM_REL32
, 4), /* dcd R_ARM_REL32(X) */
2386 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2388 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic
[] =
2390 THUMB16_INSN (0x4778), /* bx pc */
2391 THUMB16_INSN (0x46c0), /* nop */
2392 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2393 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2394 ARM_INSN (0xe12fff1c), /* bx ip */
2395 DATA_WORD (0, R_ARM_REL32
, 0), /* dcd R_ARM_REL32(X) */
2398 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2399 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2400 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic
[] =
2402 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2403 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2404 DATA_WORD (0, R_ARM_REL32
, -4), /* dcd R_ARM_REL32(X-4) */
2407 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2408 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2409 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic
[] =
2411 THUMB16_INSN (0x4778), /* bx pc */
2412 THUMB16_INSN (0x46c0), /* nop */
2413 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2414 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2415 DATA_WORD (0, R_ARM_REL32
, -4), /* dcd R_ARM_REL32(X) */
2418 /* Cortex-A8 erratum-workaround stubs. */
2420 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2421 can't use a conditional branch to reach this stub). */
2423 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond
[] =
2425 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2426 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2427 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2430 /* Stub used for b.w and bl.w instructions. */
2432 static const insn_sequence elf32_arm_stub_a8_veneer_b
[] =
2434 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2437 static const insn_sequence elf32_arm_stub_a8_veneer_bl
[] =
2439 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2442 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2443 instruction (which switches to ARM mode) to point to this stub. Jump to the
2444 real destination using an ARM-mode branch. */
2446 static const insn_sequence elf32_arm_stub_a8_veneer_blx
[] =
2448 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2451 /* For each section group there can be a specially created linker section
2452 to hold the stubs for that group. The name of the stub section is based
2453 upon the name of another section within that group with the suffix below
2456 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2457 create what appeared to be a linker stub section when it actually
2458 contained user code/data. For example, consider this fragment:
2460 const char * stubborn_problems[] = { "np" };
2462 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2465 .data.rel.local.stubborn_problems
2467 This then causes problems in arm32_arm_build_stubs() as it triggers:
2469 // Ignore non-stub sections.
2470 if (!strstr (stub_sec->name, STUB_SUFFIX))
2473 And so the section would be ignored instead of being processed. Hence
2474 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2476 #define STUB_SUFFIX ".__stub"
2478 /* One entry per long/short branch stub defined above. */
2480 DEF_STUB(long_branch_any_any) \
2481 DEF_STUB(long_branch_v4t_arm_thumb) \
2482 DEF_STUB(long_branch_thumb_only) \
2483 DEF_STUB(long_branch_v4t_thumb_thumb) \
2484 DEF_STUB(long_branch_v4t_thumb_arm) \
2485 DEF_STUB(short_branch_v4t_thumb_arm) \
2486 DEF_STUB(long_branch_any_arm_pic) \
2487 DEF_STUB(long_branch_any_thumb_pic) \
2488 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2489 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2490 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2491 DEF_STUB(long_branch_thumb_only_pic) \
2492 DEF_STUB(long_branch_any_tls_pic) \
2493 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2494 DEF_STUB(a8_veneer_b_cond) \
2495 DEF_STUB(a8_veneer_b) \
2496 DEF_STUB(a8_veneer_bl) \
2497 DEF_STUB(a8_veneer_blx)
2499 #define DEF_STUB(x) arm_stub_##x,
2500 enum elf32_arm_stub_type
2504 /* Note the first a8_veneer type */
2505 arm_stub_a8_veneer_lwm
= arm_stub_a8_veneer_b_cond
2511 const insn_sequence
* template_sequence
;
2515 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2516 static const stub_def stub_definitions
[] =
2522 struct elf32_arm_stub_hash_entry
2524 /* Base hash table entry structure. */
2525 struct bfd_hash_entry root
;
2527 /* The stub section. */
2530 /* Offset within stub_sec of the beginning of this stub. */
2531 bfd_vma stub_offset
;
2533 /* Given the symbol's value and its section we can determine its final
2534 value when building the stubs (so the stub knows where to jump). */
2535 bfd_vma target_value
;
2536 asection
*target_section
;
2538 /* Offset to apply to relocation referencing target_value. */
2539 bfd_vma target_addend
;
2541 /* The instruction which caused this stub to be generated (only valid for
2542 Cortex-A8 erratum workaround stubs at present). */
2543 unsigned long orig_insn
;
2545 /* The stub type. */
2546 enum elf32_arm_stub_type stub_type
;
2547 /* Its encoding size in bytes. */
2550 const insn_sequence
*stub_template
;
2551 /* The size of the template (number of entries). */
2552 int stub_template_size
;
2554 /* The symbol table entry, if any, that this was derived from. */
2555 struct elf32_arm_link_hash_entry
*h
;
2557 /* Type of branch. */
2558 enum arm_st_branch_type branch_type
;
2560 /* Where this stub is being called from, or, in the case of combined
2561 stub sections, the first input section in the group. */
2564 /* The name for the local symbol at the start of this stub. The
2565 stub name in the hash table has to be unique; this does not, so
2566 it can be friendlier. */
2570 /* Used to build a map of a section. This is required for mixed-endian
2573 typedef struct elf32_elf_section_map
2578 elf32_arm_section_map
;
2580 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2584 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER
,
2585 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER
,
2586 VFP11_ERRATUM_ARM_VENEER
,
2587 VFP11_ERRATUM_THUMB_VENEER
2589 elf32_vfp11_erratum_type
;
2591 typedef struct elf32_vfp11_erratum_list
2593 struct elf32_vfp11_erratum_list
*next
;
2599 struct elf32_vfp11_erratum_list
*veneer
;
2600 unsigned int vfp_insn
;
2604 struct elf32_vfp11_erratum_list
*branch
;
2608 elf32_vfp11_erratum_type type
;
2610 elf32_vfp11_erratum_list
;
2615 INSERT_EXIDX_CANTUNWIND_AT_END
2617 arm_unwind_edit_type
;
2619 /* A (sorted) list of edits to apply to an unwind table. */
2620 typedef struct arm_unwind_table_edit
2622 arm_unwind_edit_type type
;
2623 /* Note: we sometimes want to insert an unwind entry corresponding to a
2624 section different from the one we're currently writing out, so record the
2625 (text) section this edit relates to here. */
2626 asection
*linked_section
;
2628 struct arm_unwind_table_edit
*next
;
2630 arm_unwind_table_edit
;
2632 typedef struct _arm_elf_section_data
2634 /* Information about mapping symbols. */
2635 struct bfd_elf_section_data elf
;
2636 unsigned int mapcount
;
2637 unsigned int mapsize
;
2638 elf32_arm_section_map
*map
;
2639 /* Information about CPU errata. */
2640 unsigned int erratumcount
;
2641 elf32_vfp11_erratum_list
*erratumlist
;
2642 /* Information about unwind tables. */
2645 /* Unwind info attached to a text section. */
2648 asection
*arm_exidx_sec
;
2651 /* Unwind info attached to an .ARM.exidx section. */
2654 arm_unwind_table_edit
*unwind_edit_list
;
2655 arm_unwind_table_edit
*unwind_edit_tail
;
2659 _arm_elf_section_data
;
2661 #define elf32_arm_section_data(sec) \
2662 ((_arm_elf_section_data *) elf_section_data (sec))
2664 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2665 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2666 so may be created multiple times: we use an array of these entries whilst
2667 relaxing which we can refresh easily, then create stubs for each potentially
2668 erratum-triggering instruction once we've settled on a solution. */
2670 struct a8_erratum_fix
2676 unsigned long orig_insn
;
2678 enum elf32_arm_stub_type stub_type
;
2679 enum arm_st_branch_type branch_type
;
2682 /* A table of relocs applied to branches which might trigger Cortex-A8
2685 struct a8_erratum_reloc
2688 bfd_vma destination
;
2689 struct elf32_arm_link_hash_entry
*hash
;
2690 const char *sym_name
;
2691 unsigned int r_type
;
2692 enum arm_st_branch_type branch_type
;
2693 bfd_boolean non_a8_stub
;
2696 /* The size of the thread control block. */
2699 /* ARM-specific information about a PLT entry, over and above the usual
2703 /* We reference count Thumb references to a PLT entry separately,
2704 so that we can emit the Thumb trampoline only if needed. */
2705 bfd_signed_vma thumb_refcount
;
2707 /* Some references from Thumb code may be eliminated by BL->BLX
2708 conversion, so record them separately. */
2709 bfd_signed_vma maybe_thumb_refcount
;
2711 /* How many of the recorded PLT accesses were from non-call relocations.
2712 This information is useful when deciding whether anything takes the
2713 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2714 non-call references to the function should resolve directly to the
2715 real runtime target. */
2716 unsigned int noncall_refcount
;
2718 /* Since PLT entries have variable size if the Thumb prologue is
2719 used, we need to record the index into .got.plt instead of
2720 recomputing it from the PLT offset. */
2721 bfd_signed_vma got_offset
;
2724 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
2725 struct arm_local_iplt_info
2727 /* The information that is usually found in the generic ELF part of
2728 the hash table entry. */
2729 union gotplt_union root
;
2731 /* The information that is usually found in the ARM-specific part of
2732 the hash table entry. */
2733 struct arm_plt_info arm
;
2735 /* A list of all potential dynamic relocations against this symbol. */
2736 struct elf_dyn_relocs
*dyn_relocs
;
2739 struct elf_arm_obj_tdata
2741 struct elf_obj_tdata root
;
2743 /* tls_type for each local got entry. */
2744 char *local_got_tls_type
;
2746 /* GOTPLT entries for TLS descriptors. */
2747 bfd_vma
*local_tlsdesc_gotent
;
2749 /* Information for local symbols that need entries in .iplt. */
2750 struct arm_local_iplt_info
**local_iplt
;
2752 /* Zero to warn when linking objects with incompatible enum sizes. */
2753 int no_enum_size_warning
;
2755 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2756 int no_wchar_size_warning
;
2759 #define elf_arm_tdata(bfd) \
2760 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
2762 #define elf32_arm_local_got_tls_type(bfd) \
2763 (elf_arm_tdata (bfd)->local_got_tls_type)
2765 #define elf32_arm_local_tlsdesc_gotent(bfd) \
2766 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2768 #define elf32_arm_local_iplt(bfd) \
2769 (elf_arm_tdata (bfd)->local_iplt)
2771 #define is_arm_elf(bfd) \
2772 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2773 && elf_tdata (bfd) != NULL \
2774 && elf_object_id (bfd) == ARM_ELF_DATA)
2777 elf32_arm_mkobject (bfd
*abfd
)
2779 return bfd_elf_allocate_object (abfd
, sizeof (struct elf_arm_obj_tdata
),
2783 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2785 /* Arm ELF linker hash entry. */
2786 struct elf32_arm_link_hash_entry
2788 struct elf_link_hash_entry root
;
2790 /* Track dynamic relocs copied for this symbol. */
2791 struct elf_dyn_relocs
*dyn_relocs
;
2793 /* ARM-specific PLT information. */
2794 struct arm_plt_info plt
;
2796 #define GOT_UNKNOWN 0
2797 #define GOT_NORMAL 1
2798 #define GOT_TLS_GD 2
2799 #define GOT_TLS_IE 4
2800 #define GOT_TLS_GDESC 8
2801 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
2802 unsigned int tls_type
: 8;
2804 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
2805 unsigned int is_iplt
: 1;
2807 unsigned int unused
: 23;
2809 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
2810 starting at the end of the jump table. */
2811 bfd_vma tlsdesc_got
;
2813 /* The symbol marking the real symbol location for exported thumb
2814 symbols with Arm stubs. */
2815 struct elf_link_hash_entry
*export_glue
;
2817 /* A pointer to the most recently used stub hash entry against this
2819 struct elf32_arm_stub_hash_entry
*stub_cache
;
2822 /* Traverse an arm ELF linker hash table. */
2823 #define elf32_arm_link_hash_traverse(table, func, info) \
2824 (elf_link_hash_traverse \
2826 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
2829 /* Get the ARM elf linker hash table from a link_info structure. */
2830 #define elf32_arm_hash_table(info) \
2831 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
2832 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
2834 #define arm_stub_hash_lookup(table, string, create, copy) \
2835 ((struct elf32_arm_stub_hash_entry *) \
2836 bfd_hash_lookup ((table), (string), (create), (copy)))
2838 /* Array to keep track of which stub sections have been created, and
2839 information on stub grouping. */
2842 /* This is the section to which stubs in the group will be
2845 /* The stub section. */
2849 #define elf32_arm_compute_jump_table_size(htab) \
2850 ((htab)->next_tls_desc_index * 4)
2852 /* ARM ELF linker hash table. */
2853 struct elf32_arm_link_hash_table
2855 /* The main hash table. */
2856 struct elf_link_hash_table root
;
2858 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
2859 bfd_size_type thumb_glue_size
;
2861 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
2862 bfd_size_type arm_glue_size
;
2864 /* The size in bytes of section containing the ARMv4 BX veneers. */
2865 bfd_size_type bx_glue_size
;
2867 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2868 veneer has been populated. */
2869 bfd_vma bx_glue_offset
[15];
2871 /* The size in bytes of the section containing glue for VFP11 erratum
2873 bfd_size_type vfp11_erratum_glue_size
;
2875 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
2876 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
2877 elf32_arm_write_section(). */
2878 struct a8_erratum_fix
*a8_erratum_fixes
;
2879 unsigned int num_a8_erratum_fixes
;
2881 /* An arbitrary input BFD chosen to hold the glue sections. */
2882 bfd
* bfd_of_glue_owner
;
2884 /* Nonzero to output a BE8 image. */
2887 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
2888 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
2891 /* The relocation to use for R_ARM_TARGET2 relocations. */
2894 /* 0 = Ignore R_ARM_V4BX.
2895 1 = Convert BX to MOV PC.
2896 2 = Generate v4 interworing stubs. */
2899 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
2902 /* Whether we should fix the ARM1176 BLX immediate issue. */
2905 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2908 /* What sort of code sequences we should look for which may trigger the
2909 VFP11 denorm erratum. */
2910 bfd_arm_vfp11_fix vfp11_fix
;
2912 /* Global counter for the number of fixes we have emitted. */
2913 int num_vfp11_fixes
;
2915 /* Nonzero to force PIC branch veneers. */
2918 /* The number of bytes in the initial entry in the PLT. */
2919 bfd_size_type plt_header_size
;
2921 /* The number of bytes in the subsequent PLT etries. */
2922 bfd_size_type plt_entry_size
;
2924 /* True if the target system is VxWorks. */
2927 /* True if the target system is Symbian OS. */
2930 /* True if the target system is Native Client. */
2933 /* True if the target uses REL relocations. */
2936 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
2937 bfd_vma next_tls_desc_index
;
2939 /* How many R_ARM_TLS_DESC relocations were generated so far. */
2940 bfd_vma num_tls_desc
;
2942 /* Short-cuts to get to dynamic linker sections. */
2946 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2949 /* The offset into splt of the PLT entry for the TLS descriptor
2950 resolver. Special values are 0, if not necessary (or not found
2951 to be necessary yet), and -1 if needed but not determined
2953 bfd_vma dt_tlsdesc_plt
;
2955 /* The offset into sgot of the GOT entry used by the PLT entry
2957 bfd_vma dt_tlsdesc_got
;
2959 /* Offset in .plt section of tls_arm_trampoline. */
2960 bfd_vma tls_trampoline
;
2962 /* Data for R_ARM_TLS_LDM32 relocations. */
2965 bfd_signed_vma refcount
;
2969 /* Small local sym cache. */
2970 struct sym_cache sym_cache
;
2972 /* For convenience in allocate_dynrelocs. */
2975 /* The amount of space used by the reserved portion of the sgotplt
2976 section, plus whatever space is used by the jump slots. */
2977 bfd_vma sgotplt_jump_table_size
;
2979 /* The stub hash table. */
2980 struct bfd_hash_table stub_hash_table
;
2982 /* Linker stub bfd. */
2985 /* Linker call-backs. */
2986 asection
* (*add_stub_section
) (const char *, asection
*);
2987 void (*layout_sections_again
) (void);
2989 /* Array to keep track of which stub sections have been created, and
2990 information on stub grouping. */
2991 struct map_stub
*stub_group
;
2993 /* Number of elements in stub_group. */
2996 /* Assorted information used by elf32_arm_size_stubs. */
2997 unsigned int bfd_count
;
2999 asection
**input_list
;
3002 /* Create an entry in an ARM ELF linker hash table. */
3004 static struct bfd_hash_entry
*
3005 elf32_arm_link_hash_newfunc (struct bfd_hash_entry
* entry
,
3006 struct bfd_hash_table
* table
,
3007 const char * string
)
3009 struct elf32_arm_link_hash_entry
* ret
=
3010 (struct elf32_arm_link_hash_entry
*) entry
;
3012 /* Allocate the structure if it has not already been allocated by a
3015 ret
= (struct elf32_arm_link_hash_entry
*)
3016 bfd_hash_allocate (table
, sizeof (struct elf32_arm_link_hash_entry
));
3018 return (struct bfd_hash_entry
*) ret
;
3020 /* Call the allocation method of the superclass. */
3021 ret
= ((struct elf32_arm_link_hash_entry
*)
3022 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry
*) ret
,
3026 ret
->dyn_relocs
= NULL
;
3027 ret
->tls_type
= GOT_UNKNOWN
;
3028 ret
->tlsdesc_got
= (bfd_vma
) -1;
3029 ret
->plt
.thumb_refcount
= 0;
3030 ret
->plt
.maybe_thumb_refcount
= 0;
3031 ret
->plt
.noncall_refcount
= 0;
3032 ret
->plt
.got_offset
= -1;
3033 ret
->is_iplt
= FALSE
;
3034 ret
->export_glue
= NULL
;
3036 ret
->stub_cache
= NULL
;
3039 return (struct bfd_hash_entry
*) ret
;
3042 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3046 elf32_arm_allocate_local_sym_info (bfd
*abfd
)
3048 if (elf_local_got_refcounts (abfd
) == NULL
)
3050 bfd_size_type num_syms
;
3054 num_syms
= elf_tdata (abfd
)->symtab_hdr
.sh_info
;
3055 size
= num_syms
* (sizeof (bfd_signed_vma
)
3056 + sizeof (struct arm_local_iplt_info
*)
3059 data
= bfd_zalloc (abfd
, size
);
3063 elf_local_got_refcounts (abfd
) = (bfd_signed_vma
*) data
;
3064 data
+= num_syms
* sizeof (bfd_signed_vma
);
3066 elf32_arm_local_iplt (abfd
) = (struct arm_local_iplt_info
**) data
;
3067 data
+= num_syms
* sizeof (struct arm_local_iplt_info
*);
3069 elf32_arm_local_tlsdesc_gotent (abfd
) = (bfd_vma
*) data
;
3070 data
+= num_syms
* sizeof (bfd_vma
);
3072 elf32_arm_local_got_tls_type (abfd
) = data
;
3077 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3078 to input bfd ABFD. Create the information if it doesn't already exist.
3079 Return null if an allocation fails. */
3081 static struct arm_local_iplt_info
*
3082 elf32_arm_create_local_iplt (bfd
*abfd
, unsigned long r_symndx
)
3084 struct arm_local_iplt_info
**ptr
;
3086 if (!elf32_arm_allocate_local_sym_info (abfd
))
3089 BFD_ASSERT (r_symndx
< elf_tdata (abfd
)->symtab_hdr
.sh_info
);
3090 ptr
= &elf32_arm_local_iplt (abfd
)[r_symndx
];
3092 *ptr
= bfd_zalloc (abfd
, sizeof (**ptr
));
3096 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3097 in ABFD's symbol table. If the symbol is global, H points to its
3098 hash table entry, otherwise H is null.
3100 Return true if the symbol does have PLT information. When returning
3101 true, point *ROOT_PLT at the target-independent reference count/offset
3102 union and *ARM_PLT at the ARM-specific information. */
3105 elf32_arm_get_plt_info (bfd
*abfd
, struct elf32_arm_link_hash_entry
*h
,
3106 unsigned long r_symndx
, union gotplt_union
**root_plt
,
3107 struct arm_plt_info
**arm_plt
)
3109 struct arm_local_iplt_info
*local_iplt
;
3113 *root_plt
= &h
->root
.plt
;
3118 if (elf32_arm_local_iplt (abfd
) == NULL
)
3121 local_iplt
= elf32_arm_local_iplt (abfd
)[r_symndx
];
3122 if (local_iplt
== NULL
)
3125 *root_plt
= &local_iplt
->root
;
3126 *arm_plt
= &local_iplt
->arm
;
3130 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3134 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info
*info
,
3135 struct arm_plt_info
*arm_plt
)
3137 struct elf32_arm_link_hash_table
*htab
;
3139 htab
= elf32_arm_hash_table (info
);
3140 return (arm_plt
->thumb_refcount
!= 0
3141 || (!htab
->use_blx
&& arm_plt
->maybe_thumb_refcount
!= 0));
3144 /* Return a pointer to the head of the dynamic reloc list that should
3145 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3146 ABFD's symbol table. Return null if an error occurs. */
3148 static struct elf_dyn_relocs
**
3149 elf32_arm_get_local_dynreloc_list (bfd
*abfd
, unsigned long r_symndx
,
3150 Elf_Internal_Sym
*isym
)
3152 if (ELF32_ST_TYPE (isym
->st_info
) == STT_GNU_IFUNC
)
3154 struct arm_local_iplt_info
*local_iplt
;
3156 local_iplt
= elf32_arm_create_local_iplt (abfd
, r_symndx
);
3157 if (local_iplt
== NULL
)
3159 return &local_iplt
->dyn_relocs
;
3163 /* Track dynamic relocs needed for local syms too.
3164 We really need local syms available to do this
3169 s
= bfd_section_from_elf_index (abfd
, isym
->st_shndx
);
3173 vpp
= &elf_section_data (s
)->local_dynrel
;
3174 return (struct elf_dyn_relocs
**) vpp
;
3178 /* Initialize an entry in the stub hash table. */
3180 static struct bfd_hash_entry
*
3181 stub_hash_newfunc (struct bfd_hash_entry
*entry
,
3182 struct bfd_hash_table
*table
,
3185 /* Allocate the structure if it has not already been allocated by a
3189 entry
= (struct bfd_hash_entry
*)
3190 bfd_hash_allocate (table
, sizeof (struct elf32_arm_stub_hash_entry
));
3195 /* Call the allocation method of the superclass. */
3196 entry
= bfd_hash_newfunc (entry
, table
, string
);
3199 struct elf32_arm_stub_hash_entry
*eh
;
3201 /* Initialize the local fields. */
3202 eh
= (struct elf32_arm_stub_hash_entry
*) entry
;
3203 eh
->stub_sec
= NULL
;
3204 eh
->stub_offset
= 0;
3205 eh
->target_value
= 0;
3206 eh
->target_section
= NULL
;
3207 eh
->target_addend
= 0;
3209 eh
->stub_type
= arm_stub_none
;
3211 eh
->stub_template
= NULL
;
3212 eh
->stub_template_size
= 0;
3215 eh
->output_name
= NULL
;
3221 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3222 shortcuts to them in our hash table. */
3225 create_got_section (bfd
*dynobj
, struct bfd_link_info
*info
)
3227 struct elf32_arm_link_hash_table
*htab
;
3229 htab
= elf32_arm_hash_table (info
);
3233 /* BPABI objects never have a GOT, or associated sections. */
3234 if (htab
->symbian_p
)
3237 if (! _bfd_elf_create_got_section (dynobj
, info
))
3243 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3246 create_ifunc_sections (struct bfd_link_info
*info
)
3248 struct elf32_arm_link_hash_table
*htab
;
3249 const struct elf_backend_data
*bed
;
3254 htab
= elf32_arm_hash_table (info
);
3255 dynobj
= htab
->root
.dynobj
;
3256 bed
= get_elf_backend_data (dynobj
);
3257 flags
= bed
->dynamic_sec_flags
;
3259 if (htab
->root
.iplt
== NULL
)
3261 s
= bfd_make_section_anyway_with_flags (dynobj
, ".iplt",
3262 flags
| SEC_READONLY
| SEC_CODE
);
3264 || !bfd_set_section_alignment (dynobj
, s
, bed
->plt_alignment
))
3266 htab
->root
.iplt
= s
;
3269 if (htab
->root
.irelplt
== NULL
)
3271 s
= bfd_make_section_anyway_with_flags (dynobj
,
3272 RELOC_SECTION (htab
, ".iplt"),
3273 flags
| SEC_READONLY
);
3275 || !bfd_set_section_alignment (dynobj
, s
, bed
->s
->log_file_align
))
3277 htab
->root
.irelplt
= s
;
3280 if (htab
->root
.igotplt
== NULL
)
3282 s
= bfd_make_section_anyway_with_flags (dynobj
, ".igot.plt", flags
);
3284 || !bfd_set_section_alignment (dynobj
, s
, bed
->s
->log_file_align
))
3286 htab
->root
.igotplt
= s
;
3291 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3292 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3296 elf32_arm_create_dynamic_sections (bfd
*dynobj
, struct bfd_link_info
*info
)
3298 struct elf32_arm_link_hash_table
*htab
;
3300 htab
= elf32_arm_hash_table (info
);
3304 if (!htab
->root
.sgot
&& !create_got_section (dynobj
, info
))
3307 if (!_bfd_elf_create_dynamic_sections (dynobj
, info
))
3310 htab
->sdynbss
= bfd_get_linker_section (dynobj
, ".dynbss");
3312 htab
->srelbss
= bfd_get_linker_section (dynobj
,
3313 RELOC_SECTION (htab
, ".bss"));
3315 if (htab
->vxworks_p
)
3317 if (!elf_vxworks_create_dynamic_sections (dynobj
, info
, &htab
->srelplt2
))
3322 htab
->plt_header_size
= 0;
3323 htab
->plt_entry_size
3324 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry
);
3328 htab
->plt_header_size
3329 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry
);
3330 htab
->plt_entry_size
3331 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry
);
3335 if (!htab
->root
.splt
3336 || !htab
->root
.srelplt
3338 || (!info
->shared
&& !htab
->srelbss
))
3344 /* Copy the extra info we tack onto an elf_link_hash_entry. */
3347 elf32_arm_copy_indirect_symbol (struct bfd_link_info
*info
,
3348 struct elf_link_hash_entry
*dir
,
3349 struct elf_link_hash_entry
*ind
)
3351 struct elf32_arm_link_hash_entry
*edir
, *eind
;
3353 edir
= (struct elf32_arm_link_hash_entry
*) dir
;
3354 eind
= (struct elf32_arm_link_hash_entry
*) ind
;
3356 if (eind
->dyn_relocs
!= NULL
)
3358 if (edir
->dyn_relocs
!= NULL
)
3360 struct elf_dyn_relocs
**pp
;
3361 struct elf_dyn_relocs
*p
;
3363 /* Add reloc counts against the indirect sym to the direct sym
3364 list. Merge any entries against the same section. */
3365 for (pp
= &eind
->dyn_relocs
; (p
= *pp
) != NULL
; )
3367 struct elf_dyn_relocs
*q
;
3369 for (q
= edir
->dyn_relocs
; q
!= NULL
; q
= q
->next
)
3370 if (q
->sec
== p
->sec
)
3372 q
->pc_count
+= p
->pc_count
;
3373 q
->count
+= p
->count
;
3380 *pp
= edir
->dyn_relocs
;
3383 edir
->dyn_relocs
= eind
->dyn_relocs
;
3384 eind
->dyn_relocs
= NULL
;
3387 if (ind
->root
.type
== bfd_link_hash_indirect
)
3389 /* Copy over PLT info. */
3390 edir
->plt
.thumb_refcount
+= eind
->plt
.thumb_refcount
;
3391 eind
->plt
.thumb_refcount
= 0;
3392 edir
->plt
.maybe_thumb_refcount
+= eind
->plt
.maybe_thumb_refcount
;
3393 eind
->plt
.maybe_thumb_refcount
= 0;
3394 edir
->plt
.noncall_refcount
+= eind
->plt
.noncall_refcount
;
3395 eind
->plt
.noncall_refcount
= 0;
3397 /* We should only allocate a function to .iplt once the final
3398 symbol information is known. */
3399 BFD_ASSERT (!eind
->is_iplt
);
3401 if (dir
->got
.refcount
<= 0)
3403 edir
->tls_type
= eind
->tls_type
;
3404 eind
->tls_type
= GOT_UNKNOWN
;
3408 _bfd_elf_link_hash_copy_indirect (info
, dir
, ind
);
3411 /* Create an ARM elf linker hash table. */
3413 static struct bfd_link_hash_table
*
3414 elf32_arm_link_hash_table_create (bfd
*abfd
)
3416 struct elf32_arm_link_hash_table
*ret
;
3417 bfd_size_type amt
= sizeof (struct elf32_arm_link_hash_table
);
3419 ret
= (struct elf32_arm_link_hash_table
*) bfd_zmalloc (amt
);
3423 if (!_bfd_elf_link_hash_table_init (& ret
->root
, abfd
,
3424 elf32_arm_link_hash_newfunc
,
3425 sizeof (struct elf32_arm_link_hash_entry
),
3432 ret
->vfp11_fix
= BFD_ARM_VFP11_FIX_NONE
;
3433 #ifdef FOUR_WORD_PLT
3434 ret
->plt_header_size
= 16;
3435 ret
->plt_entry_size
= 16;
3437 ret
->plt_header_size
= 20;
3438 ret
->plt_entry_size
= 12;
3443 if (!bfd_hash_table_init (&ret
->stub_hash_table
, stub_hash_newfunc
,
3444 sizeof (struct elf32_arm_stub_hash_entry
)))
3450 return &ret
->root
.root
;
3453 /* Free the derived linker hash table. */
3456 elf32_arm_hash_table_free (struct bfd_link_hash_table
*hash
)
3458 struct elf32_arm_link_hash_table
*ret
3459 = (struct elf32_arm_link_hash_table
*) hash
;
3461 bfd_hash_table_free (&ret
->stub_hash_table
);
3462 _bfd_elf_link_hash_table_free (hash
);
3465 /* Determine if we're dealing with a Thumb only architecture. */
3468 using_thumb_only (struct elf32_arm_link_hash_table
*globals
)
3470 int arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
3474 if (arch
== TAG_CPU_ARCH_V6_M
|| arch
== TAG_CPU_ARCH_V6S_M
)
3477 if (arch
!= TAG_CPU_ARCH_V7
&& arch
!= TAG_CPU_ARCH_V7E_M
)
3480 profile
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
3481 Tag_CPU_arch_profile
);
3483 return profile
== 'M';
3486 /* Determine if we're dealing with a Thumb-2 object. */
3489 using_thumb2 (struct elf32_arm_link_hash_table
*globals
)
3491 int arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
3493 return arch
== TAG_CPU_ARCH_V6T2
|| arch
>= TAG_CPU_ARCH_V7
;
3496 /* Determine what kind of NOPs are available. */
3499 arch_has_arm_nop (struct elf32_arm_link_hash_table
*globals
)
3501 const int arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
3503 return arch
== TAG_CPU_ARCH_V6T2
3504 || arch
== TAG_CPU_ARCH_V6K
3505 || arch
== TAG_CPU_ARCH_V7
3506 || arch
== TAG_CPU_ARCH_V7E_M
;
3510 arch_has_thumb2_nop (struct elf32_arm_link_hash_table
*globals
)
3512 const int arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
3514 return (arch
== TAG_CPU_ARCH_V6T2
|| arch
== TAG_CPU_ARCH_V7
3515 || arch
== TAG_CPU_ARCH_V7E_M
);
3519 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type
)
3523 case arm_stub_long_branch_thumb_only
:
3524 case arm_stub_long_branch_v4t_thumb_arm
:
3525 case arm_stub_short_branch_v4t_thumb_arm
:
3526 case arm_stub_long_branch_v4t_thumb_arm_pic
:
3527 case arm_stub_long_branch_v4t_thumb_tls_pic
:
3528 case arm_stub_long_branch_thumb_only_pic
:
3539 /* Determine the type of stub needed, if any, for a call. */
3541 static enum elf32_arm_stub_type
3542 arm_type_of_stub (struct bfd_link_info
*info
,
3543 asection
*input_sec
,
3544 const Elf_Internal_Rela
*rel
,
3545 unsigned char st_type
,
3546 enum arm_st_branch_type
*actual_branch_type
,
3547 struct elf32_arm_link_hash_entry
*hash
,
3548 bfd_vma destination
,
3554 bfd_signed_vma branch_offset
;
3555 unsigned int r_type
;
3556 struct elf32_arm_link_hash_table
* globals
;
3559 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
3561 enum arm_st_branch_type branch_type
= *actual_branch_type
;
3562 union gotplt_union
*root_plt
;
3563 struct arm_plt_info
*arm_plt
;
3565 if (branch_type
== ST_BRANCH_LONG
)
3568 globals
= elf32_arm_hash_table (info
);
3569 if (globals
== NULL
)
3572 thumb_only
= using_thumb_only (globals
);
3574 thumb2
= using_thumb2 (globals
);
3576 /* Determine where the call point is. */
3577 location
= (input_sec
->output_offset
3578 + input_sec
->output_section
->vma
3581 r_type
= ELF32_R_TYPE (rel
->r_info
);
3583 /* For TLS call relocs, it is the caller's responsibility to provide
3584 the address of the appropriate trampoline. */
3585 if (r_type
!= R_ARM_TLS_CALL
3586 && r_type
!= R_ARM_THM_TLS_CALL
3587 && elf32_arm_get_plt_info (input_bfd
, hash
, ELF32_R_SYM (rel
->r_info
),
3588 &root_plt
, &arm_plt
)
3589 && root_plt
->offset
!= (bfd_vma
) -1)
3593 if (hash
== NULL
|| hash
->is_iplt
)
3594 splt
= globals
->root
.iplt
;
3596 splt
= globals
->root
.splt
;
3601 /* Note when dealing with PLT entries: the main PLT stub is in
3602 ARM mode, so if the branch is in Thumb mode, another
3603 Thumb->ARM stub will be inserted later just before the ARM
3604 PLT stub. We don't take this extra distance into account
3605 here, because if a long branch stub is needed, we'll add a
3606 Thumb->Arm one and branch directly to the ARM PLT entry
3607 because it avoids spreading offset corrections in several
3610 destination
= (splt
->output_section
->vma
3611 + splt
->output_offset
3612 + root_plt
->offset
);
3614 branch_type
= ST_BRANCH_TO_ARM
;
3617 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
3618 BFD_ASSERT (st_type
!= STT_GNU_IFUNC
);
3620 branch_offset
= (bfd_signed_vma
)(destination
- location
);
3622 if (r_type
== R_ARM_THM_CALL
|| r_type
== R_ARM_THM_JUMP24
3623 || r_type
== R_ARM_THM_TLS_CALL
)
3625 /* Handle cases where:
3626 - this call goes too far (different Thumb/Thumb2 max
3628 - it's a Thumb->Arm call and blx is not available, or it's a
3629 Thumb->Arm branch (not bl). A stub is needed in this case,
3630 but only if this call is not through a PLT entry. Indeed,
3631 PLT stubs handle mode switching already.
3634 && (branch_offset
> THM_MAX_FWD_BRANCH_OFFSET
3635 || (branch_offset
< THM_MAX_BWD_BRANCH_OFFSET
)))
3637 && (branch_offset
> THM2_MAX_FWD_BRANCH_OFFSET
3638 || (branch_offset
< THM2_MAX_BWD_BRANCH_OFFSET
)))
3639 || (branch_type
== ST_BRANCH_TO_ARM
3640 && (((r_type
== R_ARM_THM_CALL
3641 || r_type
== R_ARM_THM_TLS_CALL
) && !globals
->use_blx
)
3642 || (r_type
== R_ARM_THM_JUMP24
))
3645 if (branch_type
== ST_BRANCH_TO_THUMB
)
3647 /* Thumb to thumb. */
3650 stub_type
= (info
->shared
| globals
->pic_veneer
)
3652 ? ((globals
->use_blx
3653 && (r_type
== R_ARM_THM_CALL
))
3654 /* V5T and above. Stub starts with ARM code, so
3655 we must be able to switch mode before
3656 reaching it, which is only possible for 'bl'
3657 (ie R_ARM_THM_CALL relocation). */
3658 ? arm_stub_long_branch_any_thumb_pic
3659 /* On V4T, use Thumb code only. */
3660 : arm_stub_long_branch_v4t_thumb_thumb_pic
)
3662 /* non-PIC stubs. */
3663 : ((globals
->use_blx
3664 && (r_type
== R_ARM_THM_CALL
))
3665 /* V5T and above. */
3666 ? arm_stub_long_branch_any_any
3668 : arm_stub_long_branch_v4t_thumb_thumb
);
3672 stub_type
= (info
->shared
| globals
->pic_veneer
)
3674 ? arm_stub_long_branch_thumb_only_pic
3676 : arm_stub_long_branch_thumb_only
;
3683 && sym_sec
->owner
!= NULL
3684 && !INTERWORK_FLAG (sym_sec
->owner
))
3686 (*_bfd_error_handler
)
3687 (_("%B(%s): warning: interworking not enabled.\n"
3688 " first occurrence: %B: Thumb call to ARM"),
3689 sym_sec
->owner
, input_bfd
, name
);
3693 (info
->shared
| globals
->pic_veneer
)
3695 ? (r_type
== R_ARM_THM_TLS_CALL
3697 ? (globals
->use_blx
? arm_stub_long_branch_any_tls_pic
3698 : arm_stub_long_branch_v4t_thumb_tls_pic
)
3699 : ((globals
->use_blx
&& r_type
== R_ARM_THM_CALL
)
3700 /* V5T PIC and above. */
3701 ? arm_stub_long_branch_any_arm_pic
3703 : arm_stub_long_branch_v4t_thumb_arm_pic
))
3705 /* non-PIC stubs. */
3706 : ((globals
->use_blx
&& r_type
== R_ARM_THM_CALL
)
3707 /* V5T and above. */
3708 ? arm_stub_long_branch_any_any
3710 : arm_stub_long_branch_v4t_thumb_arm
);
3712 /* Handle v4t short branches. */
3713 if ((stub_type
== arm_stub_long_branch_v4t_thumb_arm
)
3714 && (branch_offset
<= THM_MAX_FWD_BRANCH_OFFSET
)
3715 && (branch_offset
>= THM_MAX_BWD_BRANCH_OFFSET
))
3716 stub_type
= arm_stub_short_branch_v4t_thumb_arm
;
3720 else if (r_type
== R_ARM_CALL
3721 || r_type
== R_ARM_JUMP24
3722 || r_type
== R_ARM_PLT32
3723 || r_type
== R_ARM_TLS_CALL
)
3725 if (branch_type
== ST_BRANCH_TO_THUMB
)
3730 && sym_sec
->owner
!= NULL
3731 && !INTERWORK_FLAG (sym_sec
->owner
))
3733 (*_bfd_error_handler
)
3734 (_("%B(%s): warning: interworking not enabled.\n"
3735 " first occurrence: %B: ARM call to Thumb"),
3736 sym_sec
->owner
, input_bfd
, name
);
3739 /* We have an extra 2-bytes reach because of
3740 the mode change (bit 24 (H) of BLX encoding). */
3741 if (branch_offset
> (ARM_MAX_FWD_BRANCH_OFFSET
+ 2)
3742 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
)
3743 || (r_type
== R_ARM_CALL
&& !globals
->use_blx
)
3744 || (r_type
== R_ARM_JUMP24
)
3745 || (r_type
== R_ARM_PLT32
))
3747 stub_type
= (info
->shared
| globals
->pic_veneer
)
3749 ? ((globals
->use_blx
)
3750 /* V5T and above. */
3751 ? arm_stub_long_branch_any_thumb_pic
3753 : arm_stub_long_branch_v4t_arm_thumb_pic
)
3755 /* non-PIC stubs. */
3756 : ((globals
->use_blx
)
3757 /* V5T and above. */
3758 ? arm_stub_long_branch_any_any
3760 : arm_stub_long_branch_v4t_arm_thumb
);
3766 if (branch_offset
> ARM_MAX_FWD_BRANCH_OFFSET
3767 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
))
3770 (info
->shared
| globals
->pic_veneer
)
3772 ? (r_type
== R_ARM_TLS_CALL
3774 ? arm_stub_long_branch_any_tls_pic
3775 : arm_stub_long_branch_any_arm_pic
)
3776 /* non-PIC stubs. */
3777 : arm_stub_long_branch_any_any
;
3782 /* If a stub is needed, record the actual destination type. */
3783 if (stub_type
!= arm_stub_none
)
3784 *actual_branch_type
= branch_type
;
3789 /* Build a name for an entry in the stub hash table. */
3792 elf32_arm_stub_name (const asection
*input_section
,
3793 const asection
*sym_sec
,
3794 const struct elf32_arm_link_hash_entry
*hash
,
3795 const Elf_Internal_Rela
*rel
,
3796 enum elf32_arm_stub_type stub_type
)
3803 len
= 8 + 1 + strlen (hash
->root
.root
.root
.string
) + 1 + 8 + 1 + 2 + 1;
3804 stub_name
= (char *) bfd_malloc (len
);
3805 if (stub_name
!= NULL
)
3806 sprintf (stub_name
, "%08x_%s+%x_%d",
3807 input_section
->id
& 0xffffffff,
3808 hash
->root
.root
.root
.string
,
3809 (int) rel
->r_addend
& 0xffffffff,
3814 len
= 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
3815 stub_name
= (char *) bfd_malloc (len
);
3816 if (stub_name
!= NULL
)
3817 sprintf (stub_name
, "%08x_%x:%x+%x_%d",
3818 input_section
->id
& 0xffffffff,
3819 sym_sec
->id
& 0xffffffff,
3820 ELF32_R_TYPE (rel
->r_info
) == R_ARM_TLS_CALL
3821 || ELF32_R_TYPE (rel
->r_info
) == R_ARM_THM_TLS_CALL
3822 ? 0 : (int) ELF32_R_SYM (rel
->r_info
) & 0xffffffff,
3823 (int) rel
->r_addend
& 0xffffffff,
3830 /* Look up an entry in the stub hash. Stub entries are cached because
3831 creating the stub name takes a bit of time. */
3833 static struct elf32_arm_stub_hash_entry
*
3834 elf32_arm_get_stub_entry (const asection
*input_section
,
3835 const asection
*sym_sec
,
3836 struct elf_link_hash_entry
*hash
,
3837 const Elf_Internal_Rela
*rel
,
3838 struct elf32_arm_link_hash_table
*htab
,
3839 enum elf32_arm_stub_type stub_type
)
3841 struct elf32_arm_stub_hash_entry
*stub_entry
;
3842 struct elf32_arm_link_hash_entry
*h
= (struct elf32_arm_link_hash_entry
*) hash
;
3843 const asection
*id_sec
;
3845 if ((input_section
->flags
& SEC_CODE
) == 0)
3848 /* If this input section is part of a group of sections sharing one
3849 stub section, then use the id of the first section in the group.
3850 Stub names need to include a section id, as there may well be
3851 more than one stub used to reach say, printf, and we need to
3852 distinguish between them. */
3853 id_sec
= htab
->stub_group
[input_section
->id
].link_sec
;
3855 if (h
!= NULL
&& h
->stub_cache
!= NULL
3856 && h
->stub_cache
->h
== h
3857 && h
->stub_cache
->id_sec
== id_sec
3858 && h
->stub_cache
->stub_type
== stub_type
)
3860 stub_entry
= h
->stub_cache
;
3866 stub_name
= elf32_arm_stub_name (id_sec
, sym_sec
, h
, rel
, stub_type
);
3867 if (stub_name
== NULL
)
3870 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
,
3871 stub_name
, FALSE
, FALSE
);
3873 h
->stub_cache
= stub_entry
;
3881 /* Find or create a stub section. Returns a pointer to the stub section, and
3882 the section to which the stub section will be attached (in *LINK_SEC_P).
3883 LINK_SEC_P may be NULL. */
3886 elf32_arm_create_or_find_stub_sec (asection
**link_sec_p
, asection
*section
,
3887 struct elf32_arm_link_hash_table
*htab
)
3892 link_sec
= htab
->stub_group
[section
->id
].link_sec
;
3893 BFD_ASSERT (link_sec
!= NULL
);
3894 stub_sec
= htab
->stub_group
[section
->id
].stub_sec
;
3896 if (stub_sec
== NULL
)
3898 stub_sec
= htab
->stub_group
[link_sec
->id
].stub_sec
;
3899 if (stub_sec
== NULL
)
3905 namelen
= strlen (link_sec
->name
);
3906 len
= namelen
+ sizeof (STUB_SUFFIX
);
3907 s_name
= (char *) bfd_alloc (htab
->stub_bfd
, len
);
3911 memcpy (s_name
, link_sec
->name
, namelen
);
3912 memcpy (s_name
+ namelen
, STUB_SUFFIX
, sizeof (STUB_SUFFIX
));
3913 stub_sec
= (*htab
->add_stub_section
) (s_name
, link_sec
);
3914 if (stub_sec
== NULL
)
3916 htab
->stub_group
[link_sec
->id
].stub_sec
= stub_sec
;
3918 htab
->stub_group
[section
->id
].stub_sec
= stub_sec
;
3922 *link_sec_p
= link_sec
;
3927 /* Add a new stub entry to the stub hash. Not all fields of the new
3928 stub entry are initialised. */
3930 static struct elf32_arm_stub_hash_entry
*
3931 elf32_arm_add_stub (const char *stub_name
,
3933 struct elf32_arm_link_hash_table
*htab
)
3937 struct elf32_arm_stub_hash_entry
*stub_entry
;
3939 stub_sec
= elf32_arm_create_or_find_stub_sec (&link_sec
, section
, htab
);
3940 if (stub_sec
== NULL
)
3943 /* Enter this entry into the linker stub hash table. */
3944 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
, stub_name
,
3946 if (stub_entry
== NULL
)
3948 (*_bfd_error_handler
) (_("%s: cannot create stub entry %s"),
3954 stub_entry
->stub_sec
= stub_sec
;
3955 stub_entry
->stub_offset
= 0;
3956 stub_entry
->id_sec
= link_sec
;
3961 /* Store an Arm insn into an output section not processed by
3962 elf32_arm_write_section. */
3965 put_arm_insn (struct elf32_arm_link_hash_table
* htab
,
3966 bfd
* output_bfd
, bfd_vma val
, void * ptr
)
3968 if (htab
->byteswap_code
!= bfd_little_endian (output_bfd
))
3969 bfd_putl32 (val
, ptr
);
3971 bfd_putb32 (val
, ptr
);
3974 /* Store a 16-bit Thumb insn into an output section not processed by
3975 elf32_arm_write_section. */
3978 put_thumb_insn (struct elf32_arm_link_hash_table
* htab
,
3979 bfd
* output_bfd
, bfd_vma val
, void * ptr
)
3981 if (htab
->byteswap_code
!= bfd_little_endian (output_bfd
))
3982 bfd_putl16 (val
, ptr
);
3984 bfd_putb16 (val
, ptr
);
3987 /* If it's possible to change R_TYPE to a more efficient access
3988 model, return the new reloc type. */
3991 elf32_arm_tls_transition (struct bfd_link_info
*info
, int r_type
,
3992 struct elf_link_hash_entry
*h
)
3994 int is_local
= (h
== NULL
);
3996 if (info
->shared
|| (h
&& h
->root
.type
== bfd_link_hash_undefweak
))
3999 /* We do not support relaxations for Old TLS models. */
4002 case R_ARM_TLS_GOTDESC
:
4003 case R_ARM_TLS_CALL
:
4004 case R_ARM_THM_TLS_CALL
:
4005 case R_ARM_TLS_DESCSEQ
:
4006 case R_ARM_THM_TLS_DESCSEQ
:
4007 return is_local
? R_ARM_TLS_LE32
: R_ARM_TLS_IE32
;
4013 static bfd_reloc_status_type elf32_arm_final_link_relocate
4014 (reloc_howto_type
*, bfd
*, bfd
*, asection
*, bfd_byte
*,
4015 Elf_Internal_Rela
*, bfd_vma
, struct bfd_link_info
*, asection
*,
4016 const char *, unsigned char, enum arm_st_branch_type
,
4017 struct elf_link_hash_entry
*, bfd_boolean
*, char **);
4020 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type
)
4024 case arm_stub_a8_veneer_b_cond
:
4025 case arm_stub_a8_veneer_b
:
4026 case arm_stub_a8_veneer_bl
:
4029 case arm_stub_long_branch_any_any
:
4030 case arm_stub_long_branch_v4t_arm_thumb
:
4031 case arm_stub_long_branch_thumb_only
:
4032 case arm_stub_long_branch_v4t_thumb_thumb
:
4033 case arm_stub_long_branch_v4t_thumb_arm
:
4034 case arm_stub_short_branch_v4t_thumb_arm
:
4035 case arm_stub_long_branch_any_arm_pic
:
4036 case arm_stub_long_branch_any_thumb_pic
:
4037 case arm_stub_long_branch_v4t_thumb_thumb_pic
:
4038 case arm_stub_long_branch_v4t_arm_thumb_pic
:
4039 case arm_stub_long_branch_v4t_thumb_arm_pic
:
4040 case arm_stub_long_branch_thumb_only_pic
:
4041 case arm_stub_long_branch_any_tls_pic
:
4042 case arm_stub_long_branch_v4t_thumb_tls_pic
:
4043 case arm_stub_a8_veneer_blx
:
4047 abort (); /* Should be unreachable. */
4052 arm_build_one_stub (struct bfd_hash_entry
*gen_entry
,
4056 struct elf32_arm_stub_hash_entry
*stub_entry
;
4057 struct elf32_arm_link_hash_table
*globals
;
4058 struct bfd_link_info
*info
;
4065 const insn_sequence
*template_sequence
;
4067 int stub_reloc_idx
[MAXRELOCS
] = {-1, -1};
4068 int stub_reloc_offset
[MAXRELOCS
] = {0, 0};
4071 /* Massage our args to the form they really have. */
4072 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
4073 info
= (struct bfd_link_info
*) in_arg
;
4075 globals
= elf32_arm_hash_table (info
);
4076 if (globals
== NULL
)
4079 stub_sec
= stub_entry
->stub_sec
;
4081 if ((globals
->fix_cortex_a8
< 0)
4082 != (arm_stub_required_alignment (stub_entry
->stub_type
) == 2))
4083 /* We have to do less-strictly-aligned fixes last. */
4086 /* Make a note of the offset within the stubs for this entry. */
4087 stub_entry
->stub_offset
= stub_sec
->size
;
4088 loc
= stub_sec
->contents
+ stub_entry
->stub_offset
;
4090 stub_bfd
= stub_sec
->owner
;
4092 /* This is the address of the stub destination. */
4093 sym_value
= (stub_entry
->target_value
4094 + stub_entry
->target_section
->output_offset
4095 + stub_entry
->target_section
->output_section
->vma
);
4097 template_sequence
= stub_entry
->stub_template
;
4098 template_size
= stub_entry
->stub_template_size
;
4101 for (i
= 0; i
< template_size
; i
++)
4103 switch (template_sequence
[i
].type
)
4107 bfd_vma data
= (bfd_vma
) template_sequence
[i
].data
;
4108 if (template_sequence
[i
].reloc_addend
!= 0)
4110 /* We've borrowed the reloc_addend field to mean we should
4111 insert a condition code into this (Thumb-1 branch)
4112 instruction. See THUMB16_BCOND_INSN. */
4113 BFD_ASSERT ((data
& 0xff00) == 0xd000);
4114 data
|= ((stub_entry
->orig_insn
>> 22) & 0xf) << 8;
4116 bfd_put_16 (stub_bfd
, data
, loc
+ size
);
4122 bfd_put_16 (stub_bfd
,
4123 (template_sequence
[i
].data
>> 16) & 0xffff,
4125 bfd_put_16 (stub_bfd
, template_sequence
[i
].data
& 0xffff,
4127 if (template_sequence
[i
].r_type
!= R_ARM_NONE
)
4129 stub_reloc_idx
[nrelocs
] = i
;
4130 stub_reloc_offset
[nrelocs
++] = size
;
4136 bfd_put_32 (stub_bfd
, template_sequence
[i
].data
,
4138 /* Handle cases where the target is encoded within the
4140 if (template_sequence
[i
].r_type
== R_ARM_JUMP24
)
4142 stub_reloc_idx
[nrelocs
] = i
;
4143 stub_reloc_offset
[nrelocs
++] = size
;
4149 bfd_put_32 (stub_bfd
, template_sequence
[i
].data
, loc
+ size
);
4150 stub_reloc_idx
[nrelocs
] = i
;
4151 stub_reloc_offset
[nrelocs
++] = size
;
4161 stub_sec
->size
+= size
;
4163 /* Stub size has already been computed in arm_size_one_stub. Check
4165 BFD_ASSERT (size
== stub_entry
->stub_size
);
4167 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
4168 if (stub_entry
->branch_type
== ST_BRANCH_TO_THUMB
)
4171 /* Assume there is at least one and at most MAXRELOCS entries to relocate
4173 BFD_ASSERT (nrelocs
!= 0 && nrelocs
<= MAXRELOCS
);
4175 for (i
= 0; i
< nrelocs
; i
++)
4176 if (template_sequence
[stub_reloc_idx
[i
]].r_type
== R_ARM_THM_JUMP24
4177 || template_sequence
[stub_reloc_idx
[i
]].r_type
== R_ARM_THM_JUMP19
4178 || template_sequence
[stub_reloc_idx
[i
]].r_type
== R_ARM_THM_CALL
4179 || template_sequence
[stub_reloc_idx
[i
]].r_type
== R_ARM_THM_XPC22
)
4181 Elf_Internal_Rela rel
;
4182 bfd_boolean unresolved_reloc
;
4183 char *error_message
;
4184 enum arm_st_branch_type branch_type
4185 = (template_sequence
[stub_reloc_idx
[i
]].r_type
!= R_ARM_THM_XPC22
4186 ? ST_BRANCH_TO_THUMB
: ST_BRANCH_TO_ARM
);
4187 bfd_vma points_to
= sym_value
+ stub_entry
->target_addend
;
4189 rel
.r_offset
= stub_entry
->stub_offset
+ stub_reloc_offset
[i
];
4190 rel
.r_info
= ELF32_R_INFO (0,
4191 template_sequence
[stub_reloc_idx
[i
]].r_type
);
4192 rel
.r_addend
= template_sequence
[stub_reloc_idx
[i
]].reloc_addend
;
4194 if (stub_entry
->stub_type
== arm_stub_a8_veneer_b_cond
&& i
== 0)
4195 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
4196 template should refer back to the instruction after the original
4198 points_to
= sym_value
;
4200 /* There may be unintended consequences if this is not true. */
4201 BFD_ASSERT (stub_entry
->h
== NULL
);
4203 /* Note: _bfd_final_link_relocate doesn't handle these relocations
4204 properly. We should probably use this function unconditionally,
4205 rather than only for certain relocations listed in the enclosing
4206 conditional, for the sake of consistency. */
4207 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4208 (template_sequence
[stub_reloc_idx
[i
]].r_type
),
4209 stub_bfd
, info
->output_bfd
, stub_sec
, stub_sec
->contents
, &rel
,
4210 points_to
, info
, stub_entry
->target_section
, "", STT_FUNC
,
4211 branch_type
, (struct elf_link_hash_entry
*) stub_entry
->h
,
4212 &unresolved_reloc
, &error_message
);
4216 Elf_Internal_Rela rel
;
4217 bfd_boolean unresolved_reloc
;
4218 char *error_message
;
4219 bfd_vma points_to
= sym_value
+ stub_entry
->target_addend
4220 + template_sequence
[stub_reloc_idx
[i
]].reloc_addend
;
4222 rel
.r_offset
= stub_entry
->stub_offset
+ stub_reloc_offset
[i
];
4223 rel
.r_info
= ELF32_R_INFO (0,
4224 template_sequence
[stub_reloc_idx
[i
]].r_type
);
4227 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4228 (template_sequence
[stub_reloc_idx
[i
]].r_type
),
4229 stub_bfd
, info
->output_bfd
, stub_sec
, stub_sec
->contents
, &rel
,
4230 points_to
, info
, stub_entry
->target_section
, "", STT_FUNC
,
4231 stub_entry
->branch_type
,
4232 (struct elf_link_hash_entry
*) stub_entry
->h
, &unresolved_reloc
,
4240 /* Calculate the template, template size and instruction size for a stub.
4241 Return value is the instruction size. */
4244 find_stub_size_and_template (enum elf32_arm_stub_type stub_type
,
4245 const insn_sequence
**stub_template
,
4246 int *stub_template_size
)
4248 const insn_sequence
*template_sequence
= NULL
;
4249 int template_size
= 0, i
;
4252 template_sequence
= stub_definitions
[stub_type
].template_sequence
;
4254 *stub_template
= template_sequence
;
4256 template_size
= stub_definitions
[stub_type
].template_size
;
4257 if (stub_template_size
)
4258 *stub_template_size
= template_size
;
4261 for (i
= 0; i
< template_size
; i
++)
4263 switch (template_sequence
[i
].type
)
4284 /* As above, but don't actually build the stub. Just bump offset so
4285 we know stub section sizes. */
4288 arm_size_one_stub (struct bfd_hash_entry
*gen_entry
,
4289 void *in_arg ATTRIBUTE_UNUSED
)
4291 struct elf32_arm_stub_hash_entry
*stub_entry
;
4292 const insn_sequence
*template_sequence
;
4293 int template_size
, size
;
4295 /* Massage our args to the form they really have. */
4296 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
4298 BFD_ASSERT((stub_entry
->stub_type
> arm_stub_none
)
4299 && stub_entry
->stub_type
< ARRAY_SIZE(stub_definitions
));
4301 size
= find_stub_size_and_template (stub_entry
->stub_type
, &template_sequence
,
4304 stub_entry
->stub_size
= size
;
4305 stub_entry
->stub_template
= template_sequence
;
4306 stub_entry
->stub_template_size
= template_size
;
4308 size
= (size
+ 7) & ~7;
4309 stub_entry
->stub_sec
->size
+= size
;
4314 /* External entry points for sizing and building linker stubs. */
4316 /* Set up various things so that we can make a list of input sections
4317 for each output section included in the link. Returns -1 on error,
4318 0 when no stubs will be needed, and 1 on success. */
4321 elf32_arm_setup_section_lists (bfd
*output_bfd
,
4322 struct bfd_link_info
*info
)
4325 unsigned int bfd_count
;
4326 int top_id
, top_index
;
4328 asection
**input_list
, **list
;
4330 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
4334 if (! is_elf_hash_table (htab
))
4337 /* Count the number of input BFDs and find the top input section id. */
4338 for (input_bfd
= info
->input_bfds
, bfd_count
= 0, top_id
= 0;
4340 input_bfd
= input_bfd
->link_next
)
4343 for (section
= input_bfd
->sections
;
4345 section
= section
->next
)
4347 if (top_id
< section
->id
)
4348 top_id
= section
->id
;
4351 htab
->bfd_count
= bfd_count
;
4353 amt
= sizeof (struct map_stub
) * (top_id
+ 1);
4354 htab
->stub_group
= (struct map_stub
*) bfd_zmalloc (amt
);
4355 if (htab
->stub_group
== NULL
)
4357 htab
->top_id
= top_id
;
4359 /* We can't use output_bfd->section_count here to find the top output
4360 section index as some sections may have been removed, and
4361 _bfd_strip_section_from_output doesn't renumber the indices. */
4362 for (section
= output_bfd
->sections
, top_index
= 0;
4364 section
= section
->next
)
4366 if (top_index
< section
->index
)
4367 top_index
= section
->index
;
4370 htab
->top_index
= top_index
;
4371 amt
= sizeof (asection
*) * (top_index
+ 1);
4372 input_list
= (asection
**) bfd_malloc (amt
);
4373 htab
->input_list
= input_list
;
4374 if (input_list
== NULL
)
4377 /* For sections we aren't interested in, mark their entries with a
4378 value we can check later. */
4379 list
= input_list
+ top_index
;
4381 *list
= bfd_abs_section_ptr
;
4382 while (list
-- != input_list
);
4384 for (section
= output_bfd
->sections
;
4386 section
= section
->next
)
4388 if ((section
->flags
& SEC_CODE
) != 0)
4389 input_list
[section
->index
] = NULL
;
4395 /* The linker repeatedly calls this function for each input section,
4396 in the order that input sections are linked into output sections.
4397 Build lists of input sections to determine groupings between which
4398 we may insert linker stubs. */
4401 elf32_arm_next_input_section (struct bfd_link_info
*info
,
4404 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
4409 if (isec
->output_section
->index
<= htab
->top_index
)
4411 asection
**list
= htab
->input_list
+ isec
->output_section
->index
;
4413 if (*list
!= bfd_abs_section_ptr
&& (isec
->flags
& SEC_CODE
) != 0)
4415 /* Steal the link_sec pointer for our list. */
4416 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
4417 /* This happens to make the list in reverse order,
4418 which we reverse later. */
4419 PREV_SEC (isec
) = *list
;
4425 /* See whether we can group stub sections together. Grouping stub
4426 sections may result in fewer stubs. More importantly, we need to
4427 put all .init* and .fini* stubs at the end of the .init or
4428 .fini output sections respectively, because glibc splits the
4429 _init and _fini functions into multiple parts. Putting a stub in
4430 the middle of a function is not a good idea. */
4433 group_sections (struct elf32_arm_link_hash_table
*htab
,
4434 bfd_size_type stub_group_size
,
4435 bfd_boolean stubs_always_after_branch
)
4437 asection
**list
= htab
->input_list
;
4441 asection
*tail
= *list
;
4444 if (tail
== bfd_abs_section_ptr
)
4447 /* Reverse the list: we must avoid placing stubs at the
4448 beginning of the section because the beginning of the text
4449 section may be required for an interrupt vector in bare metal
4451 #define NEXT_SEC PREV_SEC
4453 while (tail
!= NULL
)
4455 /* Pop from tail. */
4456 asection
*item
= tail
;
4457 tail
= PREV_SEC (item
);
4460 NEXT_SEC (item
) = head
;
4464 while (head
!= NULL
)
4468 bfd_vma stub_group_start
= head
->output_offset
;
4469 bfd_vma end_of_next
;
4472 while (NEXT_SEC (curr
) != NULL
)
4474 next
= NEXT_SEC (curr
);
4475 end_of_next
= next
->output_offset
+ next
->size
;
4476 if (end_of_next
- stub_group_start
>= stub_group_size
)
4477 /* End of NEXT is too far from start, so stop. */
4479 /* Add NEXT to the group. */
4483 /* OK, the size from the start to the start of CURR is less
4484 than stub_group_size and thus can be handled by one stub
4485 section. (Or the head section is itself larger than
4486 stub_group_size, in which case we may be toast.)
4487 We should really be keeping track of the total size of
4488 stubs added here, as stubs contribute to the final output
4492 next
= NEXT_SEC (head
);
4493 /* Set up this stub group. */
4494 htab
->stub_group
[head
->id
].link_sec
= curr
;
4496 while (head
!= curr
&& (head
= next
) != NULL
);
4498 /* But wait, there's more! Input sections up to stub_group_size
4499 bytes after the stub section can be handled by it too. */
4500 if (!stubs_always_after_branch
)
4502 stub_group_start
= curr
->output_offset
+ curr
->size
;
4504 while (next
!= NULL
)
4506 end_of_next
= next
->output_offset
+ next
->size
;
4507 if (end_of_next
- stub_group_start
>= stub_group_size
)
4508 /* End of NEXT is too far from stubs, so stop. */
4510 /* Add NEXT to the stub group. */
4512 next
= NEXT_SEC (head
);
4513 htab
->stub_group
[head
->id
].link_sec
= curr
;
4519 while (list
++ != htab
->input_list
+ htab
->top_index
);
4521 free (htab
->input_list
);
4526 /* Comparison function for sorting/searching relocations relating to Cortex-A8
4530 a8_reloc_compare (const void *a
, const void *b
)
4532 const struct a8_erratum_reloc
*ra
= (const struct a8_erratum_reloc
*) a
;
4533 const struct a8_erratum_reloc
*rb
= (const struct a8_erratum_reloc
*) b
;
4535 if (ra
->from
< rb
->from
)
4537 else if (ra
->from
> rb
->from
)
4543 static struct elf_link_hash_entry
*find_thumb_glue (struct bfd_link_info
*,
4544 const char *, char **);
4546 /* Helper function to scan code for sequences which might trigger the Cortex-A8
4547 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
4548 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
4552 cortex_a8_erratum_scan (bfd
*input_bfd
,
4553 struct bfd_link_info
*info
,
4554 struct a8_erratum_fix
**a8_fixes_p
,
4555 unsigned int *num_a8_fixes_p
,
4556 unsigned int *a8_fix_table_size_p
,
4557 struct a8_erratum_reloc
*a8_relocs
,
4558 unsigned int num_a8_relocs
,
4559 unsigned prev_num_a8_fixes
,
4560 bfd_boolean
*stub_changed_p
)
4563 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
4564 struct a8_erratum_fix
*a8_fixes
= *a8_fixes_p
;
4565 unsigned int num_a8_fixes
= *num_a8_fixes_p
;
4566 unsigned int a8_fix_table_size
= *a8_fix_table_size_p
;
4571 for (section
= input_bfd
->sections
;
4573 section
= section
->next
)
4575 bfd_byte
*contents
= NULL
;
4576 struct _arm_elf_section_data
*sec_data
;
4580 if (elf_section_type (section
) != SHT_PROGBITS
4581 || (elf_section_flags (section
) & SHF_EXECINSTR
) == 0
4582 || (section
->flags
& SEC_EXCLUDE
) != 0
4583 || (section
->sec_info_type
== SEC_INFO_TYPE_JUST_SYMS
)
4584 || (section
->output_section
== bfd_abs_section_ptr
))
4587 base_vma
= section
->output_section
->vma
+ section
->output_offset
;
4589 if (elf_section_data (section
)->this_hdr
.contents
!= NULL
)
4590 contents
= elf_section_data (section
)->this_hdr
.contents
;
4591 else if (! bfd_malloc_and_get_section (input_bfd
, section
, &contents
))
4594 sec_data
= elf32_arm_section_data (section
);
4596 for (span
= 0; span
< sec_data
->mapcount
; span
++)
4598 unsigned int span_start
= sec_data
->map
[span
].vma
;
4599 unsigned int span_end
= (span
== sec_data
->mapcount
- 1)
4600 ? section
->size
: sec_data
->map
[span
+ 1].vma
;
4602 char span_type
= sec_data
->map
[span
].type
;
4603 bfd_boolean last_was_32bit
= FALSE
, last_was_branch
= FALSE
;
4605 if (span_type
!= 't')
4608 /* Span is entirely within a single 4KB region: skip scanning. */
4609 if (((base_vma
+ span_start
) & ~0xfff)
4610 == ((base_vma
+ span_end
) & ~0xfff))
4613 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
4615 * The opcode is BLX.W, BL.W, B.W, Bcc.W
4616 * The branch target is in the same 4KB region as the
4617 first half of the branch.
4618 * The instruction before the branch is a 32-bit
4619 length non-branch instruction. */
4620 for (i
= span_start
; i
< span_end
;)
4622 unsigned int insn
= bfd_getl16 (&contents
[i
]);
4623 bfd_boolean insn_32bit
= FALSE
, is_blx
= FALSE
, is_b
= FALSE
;
4624 bfd_boolean is_bl
= FALSE
, is_bcc
= FALSE
, is_32bit_branch
;
4626 if ((insn
& 0xe000) == 0xe000 && (insn
& 0x1800) != 0x0000)
4631 /* Load the rest of the insn (in manual-friendly order). */
4632 insn
= (insn
<< 16) | bfd_getl16 (&contents
[i
+ 2]);
4634 /* Encoding T4: B<c>.W. */
4635 is_b
= (insn
& 0xf800d000) == 0xf0009000;
4636 /* Encoding T1: BL<c>.W. */
4637 is_bl
= (insn
& 0xf800d000) == 0xf000d000;
4638 /* Encoding T2: BLX<c>.W. */
4639 is_blx
= (insn
& 0xf800d000) == 0xf000c000;
4640 /* Encoding T3: B<c>.W (not permitted in IT block). */
4641 is_bcc
= (insn
& 0xf800d000) == 0xf0008000
4642 && (insn
& 0x07f00000) != 0x03800000;
4645 is_32bit_branch
= is_b
|| is_bl
|| is_blx
|| is_bcc
;
4647 if (((base_vma
+ i
) & 0xfff) == 0xffe
4651 && ! last_was_branch
)
4653 bfd_signed_vma offset
= 0;
4654 bfd_boolean force_target_arm
= FALSE
;
4655 bfd_boolean force_target_thumb
= FALSE
;
4657 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
4658 struct a8_erratum_reloc key
, *found
;
4659 bfd_boolean use_plt
= FALSE
;
4661 key
.from
= base_vma
+ i
;
4662 found
= (struct a8_erratum_reloc
*)
4663 bsearch (&key
, a8_relocs
, num_a8_relocs
,
4664 sizeof (struct a8_erratum_reloc
),
4669 char *error_message
= NULL
;
4670 struct elf_link_hash_entry
*entry
;
4672 /* We don't care about the error returned from this
4673 function, only if there is glue or not. */
4674 entry
= find_thumb_glue (info
, found
->sym_name
,
4678 found
->non_a8_stub
= TRUE
;
4680 /* Keep a simpler condition, for the sake of clarity. */
4681 if (htab
->root
.splt
!= NULL
&& found
->hash
!= NULL
4682 && found
->hash
->root
.plt
.offset
!= (bfd_vma
) -1)
4685 if (found
->r_type
== R_ARM_THM_CALL
)
4687 if (found
->branch_type
== ST_BRANCH_TO_ARM
4689 force_target_arm
= TRUE
;
4691 force_target_thumb
= TRUE
;
4695 /* Check if we have an offending branch instruction. */
4697 if (found
&& found
->non_a8_stub
)
4698 /* We've already made a stub for this instruction, e.g.
4699 it's a long branch or a Thumb->ARM stub. Assume that
4700 stub will suffice to work around the A8 erratum (see
4701 setting of always_after_branch above). */
4705 offset
= (insn
& 0x7ff) << 1;
4706 offset
|= (insn
& 0x3f0000) >> 4;
4707 offset
|= (insn
& 0x2000) ? 0x40000 : 0;
4708 offset
|= (insn
& 0x800) ? 0x80000 : 0;
4709 offset
|= (insn
& 0x4000000) ? 0x100000 : 0;
4710 if (offset
& 0x100000)
4711 offset
|= ~ ((bfd_signed_vma
) 0xfffff);
4712 stub_type
= arm_stub_a8_veneer_b_cond
;
4714 else if (is_b
|| is_bl
|| is_blx
)
4716 int s
= (insn
& 0x4000000) != 0;
4717 int j1
= (insn
& 0x2000) != 0;
4718 int j2
= (insn
& 0x800) != 0;
4722 offset
= (insn
& 0x7ff) << 1;
4723 offset
|= (insn
& 0x3ff0000) >> 4;
4727 if (offset
& 0x1000000)
4728 offset
|= ~ ((bfd_signed_vma
) 0xffffff);
4731 offset
&= ~ ((bfd_signed_vma
) 3);
4733 stub_type
= is_blx
? arm_stub_a8_veneer_blx
:
4734 is_bl
? arm_stub_a8_veneer_bl
: arm_stub_a8_veneer_b
;
4737 if (stub_type
!= arm_stub_none
)
4739 bfd_vma pc_for_insn
= base_vma
+ i
+ 4;
4741 /* The original instruction is a BL, but the target is
4742 an ARM instruction. If we were not making a stub,
4743 the BL would have been converted to a BLX. Use the
4744 BLX stub instead in that case. */
4745 if (htab
->use_blx
&& force_target_arm
4746 && stub_type
== arm_stub_a8_veneer_bl
)
4748 stub_type
= arm_stub_a8_veneer_blx
;
4752 /* Conversely, if the original instruction was
4753 BLX but the target is Thumb mode, use the BL
4755 else if (force_target_thumb
4756 && stub_type
== arm_stub_a8_veneer_blx
)
4758 stub_type
= arm_stub_a8_veneer_bl
;
4764 pc_for_insn
&= ~ ((bfd_vma
) 3);
4766 /* If we found a relocation, use the proper destination,
4767 not the offset in the (unrelocated) instruction.
4768 Note this is always done if we switched the stub type
4772 (bfd_signed_vma
) (found
->destination
- pc_for_insn
);
4774 /* If the stub will use a Thumb-mode branch to a
4775 PLT target, redirect it to the preceding Thumb
4777 if (stub_type
!= arm_stub_a8_veneer_blx
&& use_plt
)
4778 offset
-= PLT_THUMB_STUB_SIZE
;
4780 target
= pc_for_insn
+ offset
;
4782 /* The BLX stub is ARM-mode code. Adjust the offset to
4783 take the different PC value (+8 instead of +4) into
4785 if (stub_type
== arm_stub_a8_veneer_blx
)
4788 if (((base_vma
+ i
) & ~0xfff) == (target
& ~0xfff))
4790 char *stub_name
= NULL
;
4792 if (num_a8_fixes
== a8_fix_table_size
)
4794 a8_fix_table_size
*= 2;
4795 a8_fixes
= (struct a8_erratum_fix
*)
4796 bfd_realloc (a8_fixes
,
4797 sizeof (struct a8_erratum_fix
)
4798 * a8_fix_table_size
);
4801 if (num_a8_fixes
< prev_num_a8_fixes
)
4803 /* If we're doing a subsequent scan,
4804 check if we've found the same fix as
4805 before, and try and reuse the stub
4807 stub_name
= a8_fixes
[num_a8_fixes
].stub_name
;
4808 if ((a8_fixes
[num_a8_fixes
].section
!= section
)
4809 || (a8_fixes
[num_a8_fixes
].offset
!= i
))
4813 *stub_changed_p
= TRUE
;
4819 stub_name
= (char *) bfd_malloc (8 + 1 + 8 + 1);
4820 if (stub_name
!= NULL
)
4821 sprintf (stub_name
, "%x:%x", section
->id
, i
);
4824 a8_fixes
[num_a8_fixes
].input_bfd
= input_bfd
;
4825 a8_fixes
[num_a8_fixes
].section
= section
;
4826 a8_fixes
[num_a8_fixes
].offset
= i
;
4827 a8_fixes
[num_a8_fixes
].addend
= offset
;
4828 a8_fixes
[num_a8_fixes
].orig_insn
= insn
;
4829 a8_fixes
[num_a8_fixes
].stub_name
= stub_name
;
4830 a8_fixes
[num_a8_fixes
].stub_type
= stub_type
;
4831 a8_fixes
[num_a8_fixes
].branch_type
=
4832 is_blx
? ST_BRANCH_TO_ARM
: ST_BRANCH_TO_THUMB
;
4839 i
+= insn_32bit
? 4 : 2;
4840 last_was_32bit
= insn_32bit
;
4841 last_was_branch
= is_32bit_branch
;
4845 if (elf_section_data (section
)->this_hdr
.contents
== NULL
)
4849 *a8_fixes_p
= a8_fixes
;
4850 *num_a8_fixes_p
= num_a8_fixes
;
4851 *a8_fix_table_size_p
= a8_fix_table_size
;
4856 /* Determine and set the size of the stub section for a final link.
4858 The basic idea here is to examine all the relocations looking for
4859 PC-relative calls to a target that is unreachable with a "bl"
4863 elf32_arm_size_stubs (bfd
*output_bfd
,
4865 struct bfd_link_info
*info
,
4866 bfd_signed_vma group_size
,
4867 asection
* (*add_stub_section
) (const char *, asection
*),
4868 void (*layout_sections_again
) (void))
4870 bfd_size_type stub_group_size
;
4871 bfd_boolean stubs_always_after_branch
;
4872 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
4873 struct a8_erratum_fix
*a8_fixes
= NULL
;
4874 unsigned int num_a8_fixes
= 0, a8_fix_table_size
= 10;
4875 struct a8_erratum_reloc
*a8_relocs
= NULL
;
4876 unsigned int num_a8_relocs
= 0, a8_reloc_table_size
= 10, i
;
4881 if (htab
->fix_cortex_a8
)
4883 a8_fixes
= (struct a8_erratum_fix
*)
4884 bfd_zmalloc (sizeof (struct a8_erratum_fix
) * a8_fix_table_size
);
4885 a8_relocs
= (struct a8_erratum_reloc
*)
4886 bfd_zmalloc (sizeof (struct a8_erratum_reloc
) * a8_reloc_table_size
);
4889 /* Propagate mach to stub bfd, because it may not have been
4890 finalized when we created stub_bfd. */
4891 bfd_set_arch_mach (stub_bfd
, bfd_get_arch (output_bfd
),
4892 bfd_get_mach (output_bfd
));
4894 /* Stash our params away. */
4895 htab
->stub_bfd
= stub_bfd
;
4896 htab
->add_stub_section
= add_stub_section
;
4897 htab
->layout_sections_again
= layout_sections_again
;
4898 stubs_always_after_branch
= group_size
< 0;
4900 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
4901 as the first half of a 32-bit branch straddling two 4K pages. This is a
4902 crude way of enforcing that. */
4903 if (htab
->fix_cortex_a8
)
4904 stubs_always_after_branch
= 1;
4907 stub_group_size
= -group_size
;
4909 stub_group_size
= group_size
;
4911 if (stub_group_size
== 1)
4913 /* Default values. */
4914 /* Thumb branch range is +-4MB has to be used as the default
4915 maximum size (a given section can contain both ARM and Thumb
4916 code, so the worst case has to be taken into account).
4918 This value is 24K less than that, which allows for 2025
4919 12-byte stubs. If we exceed that, then we will fail to link.
4920 The user will have to relink with an explicit group size
4922 stub_group_size
= 4170000;
4925 group_sections (htab
, stub_group_size
, stubs_always_after_branch
);
4927 /* If we're applying the cortex A8 fix, we need to determine the
4928 program header size now, because we cannot change it later --
4929 that could alter section placements. Notice the A8 erratum fix
4930 ends up requiring the section addresses to remain unchanged
4931 modulo the page size. That's something we cannot represent
4932 inside BFD, and we don't want to force the section alignment to
4933 be the page size. */
4934 if (htab
->fix_cortex_a8
)
4935 (*htab
->layout_sections_again
) ();
4940 unsigned int bfd_indx
;
4942 bfd_boolean stub_changed
= FALSE
;
4943 unsigned prev_num_a8_fixes
= num_a8_fixes
;
4946 for (input_bfd
= info
->input_bfds
, bfd_indx
= 0;
4948 input_bfd
= input_bfd
->link_next
, bfd_indx
++)
4950 Elf_Internal_Shdr
*symtab_hdr
;
4952 Elf_Internal_Sym
*local_syms
= NULL
;
4954 if (!is_arm_elf (input_bfd
))
4959 /* We'll need the symbol table in a second. */
4960 symtab_hdr
= &elf_tdata (input_bfd
)->symtab_hdr
;
4961 if (symtab_hdr
->sh_info
== 0)
4964 /* Walk over each section attached to the input bfd. */
4965 for (section
= input_bfd
->sections
;
4967 section
= section
->next
)
4969 Elf_Internal_Rela
*internal_relocs
, *irelaend
, *irela
;
4971 /* If there aren't any relocs, then there's nothing more
4973 if ((section
->flags
& SEC_RELOC
) == 0
4974 || section
->reloc_count
== 0
4975 || (section
->flags
& SEC_CODE
) == 0)
4978 /* If this section is a link-once section that will be
4979 discarded, then don't create any stubs. */
4980 if (section
->output_section
== NULL
4981 || section
->output_section
->owner
!= output_bfd
)
4984 /* Get the relocs. */
4986 = _bfd_elf_link_read_relocs (input_bfd
, section
, NULL
,
4987 NULL
, info
->keep_memory
);
4988 if (internal_relocs
== NULL
)
4989 goto error_ret_free_local
;
4991 /* Now examine each relocation. */
4992 irela
= internal_relocs
;
4993 irelaend
= irela
+ section
->reloc_count
;
4994 for (; irela
< irelaend
; irela
++)
4996 unsigned int r_type
, r_indx
;
4997 enum elf32_arm_stub_type stub_type
;
4998 struct elf32_arm_stub_hash_entry
*stub_entry
;
5001 bfd_vma destination
;
5002 struct elf32_arm_link_hash_entry
*hash
;
5003 const char *sym_name
;
5005 const asection
*id_sec
;
5006 unsigned char st_type
;
5007 enum arm_st_branch_type branch_type
;
5008 bfd_boolean created_stub
= FALSE
;
5010 r_type
= ELF32_R_TYPE (irela
->r_info
);
5011 r_indx
= ELF32_R_SYM (irela
->r_info
);
5013 if (r_type
>= (unsigned int) R_ARM_max
)
5015 bfd_set_error (bfd_error_bad_value
);
5016 error_ret_free_internal
:
5017 if (elf_section_data (section
)->relocs
== NULL
)
5018 free (internal_relocs
);
5019 goto error_ret_free_local
;
5023 if (r_indx
>= symtab_hdr
->sh_info
)
5024 hash
= elf32_arm_hash_entry
5025 (elf_sym_hashes (input_bfd
)
5026 [r_indx
- symtab_hdr
->sh_info
]);
5028 /* Only look for stubs on branch instructions, or
5029 non-relaxed TLSCALL */
5030 if ((r_type
!= (unsigned int) R_ARM_CALL
)
5031 && (r_type
!= (unsigned int) R_ARM_THM_CALL
)
5032 && (r_type
!= (unsigned int) R_ARM_JUMP24
)
5033 && (r_type
!= (unsigned int) R_ARM_THM_JUMP19
)
5034 && (r_type
!= (unsigned int) R_ARM_THM_XPC22
)
5035 && (r_type
!= (unsigned int) R_ARM_THM_JUMP24
)
5036 && (r_type
!= (unsigned int) R_ARM_PLT32
)
5037 && !((r_type
== (unsigned int) R_ARM_TLS_CALL
5038 || r_type
== (unsigned int) R_ARM_THM_TLS_CALL
)
5039 && r_type
== elf32_arm_tls_transition
5040 (info
, r_type
, &hash
->root
)
5041 && ((hash
? hash
->tls_type
5042 : (elf32_arm_local_got_tls_type
5043 (input_bfd
)[r_indx
]))
5044 & GOT_TLS_GDESC
) != 0))
5047 /* Now determine the call target, its name, value,
5054 if (r_type
== (unsigned int) R_ARM_TLS_CALL
5055 || r_type
== (unsigned int) R_ARM_THM_TLS_CALL
)
5057 /* A non-relaxed TLS call. The target is the
5058 plt-resident trampoline and nothing to do
5060 BFD_ASSERT (htab
->tls_trampoline
> 0);
5061 sym_sec
= htab
->root
.splt
;
5062 sym_value
= htab
->tls_trampoline
;
5065 branch_type
= ST_BRANCH_TO_ARM
;
5069 /* It's a local symbol. */
5070 Elf_Internal_Sym
*sym
;
5072 if (local_syms
== NULL
)
5075 = (Elf_Internal_Sym
*) symtab_hdr
->contents
;
5076 if (local_syms
== NULL
)
5078 = bfd_elf_get_elf_syms (input_bfd
, symtab_hdr
,
5079 symtab_hdr
->sh_info
, 0,
5081 if (local_syms
== NULL
)
5082 goto error_ret_free_internal
;
5085 sym
= local_syms
+ r_indx
;
5086 if (sym
->st_shndx
== SHN_UNDEF
)
5087 sym_sec
= bfd_und_section_ptr
;
5088 else if (sym
->st_shndx
== SHN_ABS
)
5089 sym_sec
= bfd_abs_section_ptr
;
5090 else if (sym
->st_shndx
== SHN_COMMON
)
5091 sym_sec
= bfd_com_section_ptr
;
5094 bfd_section_from_elf_index (input_bfd
, sym
->st_shndx
);
5097 /* This is an undefined symbol. It can never
5101 if (ELF_ST_TYPE (sym
->st_info
) != STT_SECTION
)
5102 sym_value
= sym
->st_value
;
5103 destination
= (sym_value
+ irela
->r_addend
5104 + sym_sec
->output_offset
5105 + sym_sec
->output_section
->vma
);
5106 st_type
= ELF_ST_TYPE (sym
->st_info
);
5107 branch_type
= ARM_SYM_BRANCH_TYPE (sym
);
5109 = bfd_elf_string_from_elf_section (input_bfd
,
5110 symtab_hdr
->sh_link
,
5115 /* It's an external symbol. */
5116 while (hash
->root
.root
.type
== bfd_link_hash_indirect
5117 || hash
->root
.root
.type
== bfd_link_hash_warning
)
5118 hash
= ((struct elf32_arm_link_hash_entry
*)
5119 hash
->root
.root
.u
.i
.link
);
5121 if (hash
->root
.root
.type
== bfd_link_hash_defined
5122 || hash
->root
.root
.type
== bfd_link_hash_defweak
)
5124 sym_sec
= hash
->root
.root
.u
.def
.section
;
5125 sym_value
= hash
->root
.root
.u
.def
.value
;
5127 struct elf32_arm_link_hash_table
*globals
=
5128 elf32_arm_hash_table (info
);
5130 /* For a destination in a shared library,
5131 use the PLT stub as target address to
5132 decide whether a branch stub is
5135 && globals
->root
.splt
!= NULL
5137 && hash
->root
.plt
.offset
!= (bfd_vma
) -1)
5139 sym_sec
= globals
->root
.splt
;
5140 sym_value
= hash
->root
.plt
.offset
;
5141 if (sym_sec
->output_section
!= NULL
)
5142 destination
= (sym_value
5143 + sym_sec
->output_offset
5144 + sym_sec
->output_section
->vma
);
5146 else if (sym_sec
->output_section
!= NULL
)
5147 destination
= (sym_value
+ irela
->r_addend
5148 + sym_sec
->output_offset
5149 + sym_sec
->output_section
->vma
);
5151 else if ((hash
->root
.root
.type
== bfd_link_hash_undefined
)
5152 || (hash
->root
.root
.type
== bfd_link_hash_undefweak
))
5154 /* For a shared library, use the PLT stub as
5155 target address to decide whether a long
5156 branch stub is needed.
5157 For absolute code, they cannot be handled. */
5158 struct elf32_arm_link_hash_table
*globals
=
5159 elf32_arm_hash_table (info
);
5162 && globals
->root
.splt
!= NULL
5164 && hash
->root
.plt
.offset
!= (bfd_vma
) -1)
5166 sym_sec
= globals
->root
.splt
;
5167 sym_value
= hash
->root
.plt
.offset
;
5168 if (sym_sec
->output_section
!= NULL
)
5169 destination
= (sym_value
5170 + sym_sec
->output_offset
5171 + sym_sec
->output_section
->vma
);
5178 bfd_set_error (bfd_error_bad_value
);
5179 goto error_ret_free_internal
;
5181 st_type
= hash
->root
.type
;
5182 branch_type
= hash
->root
.target_internal
;
5183 sym_name
= hash
->root
.root
.root
.string
;
5188 /* Determine what (if any) linker stub is needed. */
5189 stub_type
= arm_type_of_stub (info
, section
, irela
,
5190 st_type
, &branch_type
,
5191 hash
, destination
, sym_sec
,
5192 input_bfd
, sym_name
);
5193 if (stub_type
== arm_stub_none
)
5196 /* Support for grouping stub sections. */
5197 id_sec
= htab
->stub_group
[section
->id
].link_sec
;
5199 /* Get the name of this stub. */
5200 stub_name
= elf32_arm_stub_name (id_sec
, sym_sec
, hash
,
5203 goto error_ret_free_internal
;
5205 /* We've either created a stub for this reloc already,
5206 or we are about to. */
5207 created_stub
= TRUE
;
5209 stub_entry
= arm_stub_hash_lookup
5210 (&htab
->stub_hash_table
, stub_name
,
5212 if (stub_entry
!= NULL
)
5214 /* The proper stub has already been created. */
5216 stub_entry
->target_value
= sym_value
;
5220 stub_entry
= elf32_arm_add_stub (stub_name
, section
,
5222 if (stub_entry
== NULL
)
5225 goto error_ret_free_internal
;
5228 stub_entry
->target_value
= sym_value
;
5229 stub_entry
->target_section
= sym_sec
;
5230 stub_entry
->stub_type
= stub_type
;
5231 stub_entry
->h
= hash
;
5232 stub_entry
->branch_type
= branch_type
;
5234 if (sym_name
== NULL
)
5235 sym_name
= "unnamed";
5236 stub_entry
->output_name
= (char *)
5237 bfd_alloc (htab
->stub_bfd
,
5238 sizeof (THUMB2ARM_GLUE_ENTRY_NAME
)
5239 + strlen (sym_name
));
5240 if (stub_entry
->output_name
== NULL
)
5243 goto error_ret_free_internal
;
5246 /* For historical reasons, use the existing names for
5247 ARM-to-Thumb and Thumb-to-ARM stubs. */
5248 if ((r_type
== (unsigned int) R_ARM_THM_CALL
5249 || r_type
== (unsigned int) R_ARM_THM_JUMP24
)
5250 && branch_type
== ST_BRANCH_TO_ARM
)
5251 sprintf (stub_entry
->output_name
,
5252 THUMB2ARM_GLUE_ENTRY_NAME
, sym_name
);
5253 else if ((r_type
== (unsigned int) R_ARM_CALL
5254 || r_type
== (unsigned int) R_ARM_JUMP24
)
5255 && branch_type
== ST_BRANCH_TO_THUMB
)
5256 sprintf (stub_entry
->output_name
,
5257 ARM2THUMB_GLUE_ENTRY_NAME
, sym_name
);
5259 sprintf (stub_entry
->output_name
, STUB_ENTRY_NAME
,
5262 stub_changed
= TRUE
;
5266 /* Look for relocations which might trigger Cortex-A8
5268 if (htab
->fix_cortex_a8
5269 && (r_type
== (unsigned int) R_ARM_THM_JUMP24
5270 || r_type
== (unsigned int) R_ARM_THM_JUMP19
5271 || r_type
== (unsigned int) R_ARM_THM_CALL
5272 || r_type
== (unsigned int) R_ARM_THM_XPC22
))
5274 bfd_vma from
= section
->output_section
->vma
5275 + section
->output_offset
5278 if ((from
& 0xfff) == 0xffe)
5280 /* Found a candidate. Note we haven't checked the
5281 destination is within 4K here: if we do so (and
5282 don't create an entry in a8_relocs) we can't tell
5283 that a branch should have been relocated when
5285 if (num_a8_relocs
== a8_reloc_table_size
)
5287 a8_reloc_table_size
*= 2;
5288 a8_relocs
= (struct a8_erratum_reloc
*)
5289 bfd_realloc (a8_relocs
,
5290 sizeof (struct a8_erratum_reloc
)
5291 * a8_reloc_table_size
);
5294 a8_relocs
[num_a8_relocs
].from
= from
;
5295 a8_relocs
[num_a8_relocs
].destination
= destination
;
5296 a8_relocs
[num_a8_relocs
].r_type
= r_type
;
5297 a8_relocs
[num_a8_relocs
].branch_type
= branch_type
;
5298 a8_relocs
[num_a8_relocs
].sym_name
= sym_name
;
5299 a8_relocs
[num_a8_relocs
].non_a8_stub
= created_stub
;
5300 a8_relocs
[num_a8_relocs
].hash
= hash
;
5307 /* We're done with the internal relocs, free them. */
5308 if (elf_section_data (section
)->relocs
== NULL
)
5309 free (internal_relocs
);
5312 if (htab
->fix_cortex_a8
)
5314 /* Sort relocs which might apply to Cortex-A8 erratum. */
5315 qsort (a8_relocs
, num_a8_relocs
,
5316 sizeof (struct a8_erratum_reloc
),
5319 /* Scan for branches which might trigger Cortex-A8 erratum. */
5320 if (cortex_a8_erratum_scan (input_bfd
, info
, &a8_fixes
,
5321 &num_a8_fixes
, &a8_fix_table_size
,
5322 a8_relocs
, num_a8_relocs
,
5323 prev_num_a8_fixes
, &stub_changed
)
5325 goto error_ret_free_local
;
5329 if (prev_num_a8_fixes
!= num_a8_fixes
)
5330 stub_changed
= TRUE
;
5335 /* OK, we've added some stubs. Find out the new size of the
5337 for (stub_sec
= htab
->stub_bfd
->sections
;
5339 stub_sec
= stub_sec
->next
)
5341 /* Ignore non-stub sections. */
5342 if (!strstr (stub_sec
->name
, STUB_SUFFIX
))
5348 bfd_hash_traverse (&htab
->stub_hash_table
, arm_size_one_stub
, htab
);
5350 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
5351 if (htab
->fix_cortex_a8
)
5352 for (i
= 0; i
< num_a8_fixes
; i
++)
5354 stub_sec
= elf32_arm_create_or_find_stub_sec (NULL
,
5355 a8_fixes
[i
].section
, htab
);
5357 if (stub_sec
== NULL
)
5358 goto error_ret_free_local
;
5361 += find_stub_size_and_template (a8_fixes
[i
].stub_type
, NULL
,
5366 /* Ask the linker to do its stuff. */
5367 (*htab
->layout_sections_again
) ();
5370 /* Add stubs for Cortex-A8 erratum fixes now. */
5371 if (htab
->fix_cortex_a8
)
5373 for (i
= 0; i
< num_a8_fixes
; i
++)
5375 struct elf32_arm_stub_hash_entry
*stub_entry
;
5376 char *stub_name
= a8_fixes
[i
].stub_name
;
5377 asection
*section
= a8_fixes
[i
].section
;
5378 unsigned int section_id
= a8_fixes
[i
].section
->id
;
5379 asection
*link_sec
= htab
->stub_group
[section_id
].link_sec
;
5380 asection
*stub_sec
= htab
->stub_group
[section_id
].stub_sec
;
5381 const insn_sequence
*template_sequence
;
5382 int template_size
, size
= 0;
5384 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
, stub_name
,
5386 if (stub_entry
== NULL
)
5388 (*_bfd_error_handler
) (_("%s: cannot create stub entry %s"),
5394 stub_entry
->stub_sec
= stub_sec
;
5395 stub_entry
->stub_offset
= 0;
5396 stub_entry
->id_sec
= link_sec
;
5397 stub_entry
->stub_type
= a8_fixes
[i
].stub_type
;
5398 stub_entry
->target_section
= a8_fixes
[i
].section
;
5399 stub_entry
->target_value
= a8_fixes
[i
].offset
;
5400 stub_entry
->target_addend
= a8_fixes
[i
].addend
;
5401 stub_entry
->orig_insn
= a8_fixes
[i
].orig_insn
;
5402 stub_entry
->branch_type
= a8_fixes
[i
].branch_type
;
5404 size
= find_stub_size_and_template (a8_fixes
[i
].stub_type
,
5408 stub_entry
->stub_size
= size
;
5409 stub_entry
->stub_template
= template_sequence
;
5410 stub_entry
->stub_template_size
= template_size
;
5413 /* Stash the Cortex-A8 erratum fix array for use later in
5414 elf32_arm_write_section(). */
5415 htab
->a8_erratum_fixes
= a8_fixes
;
5416 htab
->num_a8_erratum_fixes
= num_a8_fixes
;
5420 htab
->a8_erratum_fixes
= NULL
;
5421 htab
->num_a8_erratum_fixes
= 0;
5425 error_ret_free_local
:
5429 /* Build all the stubs associated with the current output file. The
5430 stubs are kept in a hash table attached to the main linker hash
5431 table. We also set up the .plt entries for statically linked PIC
5432 functions here. This function is called via arm_elf_finish in the
5436 elf32_arm_build_stubs (struct bfd_link_info
*info
)
5439 struct bfd_hash_table
*table
;
5440 struct elf32_arm_link_hash_table
*htab
;
5442 htab
= elf32_arm_hash_table (info
);
5446 for (stub_sec
= htab
->stub_bfd
->sections
;
5448 stub_sec
= stub_sec
->next
)
5452 /* Ignore non-stub sections. */
5453 if (!strstr (stub_sec
->name
, STUB_SUFFIX
))
5456 /* Allocate memory to hold the linker stubs. */
5457 size
= stub_sec
->size
;
5458 stub_sec
->contents
= (unsigned char *) bfd_zalloc (htab
->stub_bfd
, size
);
5459 if (stub_sec
->contents
== NULL
&& size
!= 0)
5464 /* Build the stubs as directed by the stub hash table. */
5465 table
= &htab
->stub_hash_table
;
5466 bfd_hash_traverse (table
, arm_build_one_stub
, info
);
5467 if (htab
->fix_cortex_a8
)
5469 /* Place the cortex a8 stubs last. */
5470 htab
->fix_cortex_a8
= -1;
5471 bfd_hash_traverse (table
, arm_build_one_stub
, info
);
5477 /* Locate the Thumb encoded calling stub for NAME. */
5479 static struct elf_link_hash_entry
*
5480 find_thumb_glue (struct bfd_link_info
*link_info
,
5482 char **error_message
)
5485 struct elf_link_hash_entry
*hash
;
5486 struct elf32_arm_link_hash_table
*hash_table
;
5488 /* We need a pointer to the armelf specific hash table. */
5489 hash_table
= elf32_arm_hash_table (link_info
);
5490 if (hash_table
== NULL
)
5493 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen (name
)
5494 + strlen (THUMB2ARM_GLUE_ENTRY_NAME
) + 1);
5496 BFD_ASSERT (tmp_name
);
5498 sprintf (tmp_name
, THUMB2ARM_GLUE_ENTRY_NAME
, name
);
5500 hash
= elf_link_hash_lookup
5501 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
5504 && asprintf (error_message
, _("unable to find THUMB glue '%s' for '%s'"),
5505 tmp_name
, name
) == -1)
5506 *error_message
= (char *) bfd_errmsg (bfd_error_system_call
);
5513 /* Locate the ARM encoded calling stub for NAME. */
5515 static struct elf_link_hash_entry
*
5516 find_arm_glue (struct bfd_link_info
*link_info
,
5518 char **error_message
)
5521 struct elf_link_hash_entry
*myh
;
5522 struct elf32_arm_link_hash_table
*hash_table
;
5524 /* We need a pointer to the elfarm specific hash table. */
5525 hash_table
= elf32_arm_hash_table (link_info
);
5526 if (hash_table
== NULL
)
5529 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen (name
)
5530 + strlen (ARM2THUMB_GLUE_ENTRY_NAME
) + 1);
5532 BFD_ASSERT (tmp_name
);
5534 sprintf (tmp_name
, ARM2THUMB_GLUE_ENTRY_NAME
, name
);
5536 myh
= elf_link_hash_lookup
5537 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
5540 && asprintf (error_message
, _("unable to find ARM glue '%s' for '%s'"),
5541 tmp_name
, name
) == -1)
5542 *error_message
= (char *) bfd_errmsg (bfd_error_system_call
);
5549 /* ARM->Thumb glue (static images):
5553 ldr r12, __func_addr
5556 .word func @ behave as if you saw a ARM_32 reloc.
5563 .word func @ behave as if you saw a ARM_32 reloc.
5565 (relocatable images)
5568 ldr r12, __func_offset
5574 #define ARM2THUMB_STATIC_GLUE_SIZE 12
5575 static const insn32 a2t1_ldr_insn
= 0xe59fc000;
5576 static const insn32 a2t2_bx_r12_insn
= 0xe12fff1c;
5577 static const insn32 a2t3_func_addr_insn
= 0x00000001;
5579 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
5580 static const insn32 a2t1v5_ldr_insn
= 0xe51ff004;
5581 static const insn32 a2t2v5_func_addr_insn
= 0x00000001;
5583 #define ARM2THUMB_PIC_GLUE_SIZE 16
5584 static const insn32 a2t1p_ldr_insn
= 0xe59fc004;
5585 static const insn32 a2t2p_add_pc_insn
= 0xe08cc00f;
5586 static const insn32 a2t3p_bx_r12_insn
= 0xe12fff1c;
5588 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
5592 __func_from_thumb: __func_from_thumb:
5594 nop ldr r6, __func_addr
5604 #define THUMB2ARM_GLUE_SIZE 8
5605 static const insn16 t2a1_bx_pc_insn
= 0x4778;
5606 static const insn16 t2a2_noop_insn
= 0x46c0;
5607 static const insn32 t2a3_b_insn
= 0xea000000;
5609 #define VFP11_ERRATUM_VENEER_SIZE 8
5611 #define ARM_BX_VENEER_SIZE 12
5612 static const insn32 armbx1_tst_insn
= 0xe3100001;
5613 static const insn32 armbx2_moveq_insn
= 0x01a0f000;
5614 static const insn32 armbx3_bx_insn
= 0xe12fff10;
5616 #ifndef ELFARM_NABI_C_INCLUDED
5618 arm_allocate_glue_section_space (bfd
* abfd
, bfd_size_type size
, const char * name
)
5621 bfd_byte
* contents
;
5625 /* Do not include empty glue sections in the output. */
5628 s
= bfd_get_linker_section (abfd
, name
);
5630 s
->flags
|= SEC_EXCLUDE
;
5635 BFD_ASSERT (abfd
!= NULL
);
5637 s
= bfd_get_linker_section (abfd
, name
);
5638 BFD_ASSERT (s
!= NULL
);
5640 contents
= (bfd_byte
*) bfd_alloc (abfd
, size
);
5642 BFD_ASSERT (s
->size
== size
);
5643 s
->contents
= contents
;
5647 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info
* info
)
5649 struct elf32_arm_link_hash_table
* globals
;
5651 globals
= elf32_arm_hash_table (info
);
5652 BFD_ASSERT (globals
!= NULL
);
5654 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
5655 globals
->arm_glue_size
,
5656 ARM2THUMB_GLUE_SECTION_NAME
);
5658 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
5659 globals
->thumb_glue_size
,
5660 THUMB2ARM_GLUE_SECTION_NAME
);
5662 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
5663 globals
->vfp11_erratum_glue_size
,
5664 VFP11_ERRATUM_VENEER_SECTION_NAME
);
5666 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
5667 globals
->bx_glue_size
,
5668 ARM_BX_GLUE_SECTION_NAME
);
5673 /* Allocate space and symbols for calling a Thumb function from Arm mode.
5674 returns the symbol identifying the stub. */
5676 static struct elf_link_hash_entry
*
5677 record_arm_to_thumb_glue (struct bfd_link_info
* link_info
,
5678 struct elf_link_hash_entry
* h
)
5680 const char * name
= h
->root
.root
.string
;
5683 struct elf_link_hash_entry
* myh
;
5684 struct bfd_link_hash_entry
* bh
;
5685 struct elf32_arm_link_hash_table
* globals
;
5689 globals
= elf32_arm_hash_table (link_info
);
5690 BFD_ASSERT (globals
!= NULL
);
5691 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
5693 s
= bfd_get_linker_section
5694 (globals
->bfd_of_glue_owner
, ARM2THUMB_GLUE_SECTION_NAME
);
5696 BFD_ASSERT (s
!= NULL
);
5698 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen (name
)
5699 + strlen (ARM2THUMB_GLUE_ENTRY_NAME
) + 1);
5701 BFD_ASSERT (tmp_name
);
5703 sprintf (tmp_name
, ARM2THUMB_GLUE_ENTRY_NAME
, name
);
5705 myh
= elf_link_hash_lookup
5706 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
5710 /* We've already seen this guy. */
5715 /* The only trick here is using hash_table->arm_glue_size as the value.
5716 Even though the section isn't allocated yet, this is where we will be
5717 putting it. The +1 on the value marks that the stub has not been
5718 output yet - not that it is a Thumb function. */
5720 val
= globals
->arm_glue_size
+ 1;
5721 _bfd_generic_link_add_one_symbol (link_info
, globals
->bfd_of_glue_owner
,
5722 tmp_name
, BSF_GLOBAL
, s
, val
,
5723 NULL
, TRUE
, FALSE
, &bh
);
5725 myh
= (struct elf_link_hash_entry
*) bh
;
5726 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
5727 myh
->forced_local
= 1;
5731 if (link_info
->shared
|| globals
->root
.is_relocatable_executable
5732 || globals
->pic_veneer
)
5733 size
= ARM2THUMB_PIC_GLUE_SIZE
;
5734 else if (globals
->use_blx
)
5735 size
= ARM2THUMB_V5_STATIC_GLUE_SIZE
;
5737 size
= ARM2THUMB_STATIC_GLUE_SIZE
;
5740 globals
->arm_glue_size
+= size
;
5745 /* Allocate space for ARMv4 BX veneers. */
5748 record_arm_bx_glue (struct bfd_link_info
* link_info
, int reg
)
5751 struct elf32_arm_link_hash_table
*globals
;
5753 struct elf_link_hash_entry
*myh
;
5754 struct bfd_link_hash_entry
*bh
;
5757 /* BX PC does not need a veneer. */
5761 globals
= elf32_arm_hash_table (link_info
);
5762 BFD_ASSERT (globals
!= NULL
);
5763 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
5765 /* Check if this veneer has already been allocated. */
5766 if (globals
->bx_glue_offset
[reg
])
5769 s
= bfd_get_linker_section
5770 (globals
->bfd_of_glue_owner
, ARM_BX_GLUE_SECTION_NAME
);
5772 BFD_ASSERT (s
!= NULL
);
5774 /* Add symbol for veneer. */
5776 bfd_malloc ((bfd_size_type
) strlen (ARM_BX_GLUE_ENTRY_NAME
) + 1);
5778 BFD_ASSERT (tmp_name
);
5780 sprintf (tmp_name
, ARM_BX_GLUE_ENTRY_NAME
, reg
);
5782 myh
= elf_link_hash_lookup
5783 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
5785 BFD_ASSERT (myh
== NULL
);
5788 val
= globals
->bx_glue_size
;
5789 _bfd_generic_link_add_one_symbol (link_info
, globals
->bfd_of_glue_owner
,
5790 tmp_name
, BSF_FUNCTION
| BSF_LOCAL
, s
, val
,
5791 NULL
, TRUE
, FALSE
, &bh
);
5793 myh
= (struct elf_link_hash_entry
*) bh
;
5794 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
5795 myh
->forced_local
= 1;
5797 s
->size
+= ARM_BX_VENEER_SIZE
;
5798 globals
->bx_glue_offset
[reg
] = globals
->bx_glue_size
| 2;
5799 globals
->bx_glue_size
+= ARM_BX_VENEER_SIZE
;
5803 /* Add an entry to the code/data map for section SEC. */
5806 elf32_arm_section_map_add (asection
*sec
, char type
, bfd_vma vma
)
5808 struct _arm_elf_section_data
*sec_data
= elf32_arm_section_data (sec
);
5809 unsigned int newidx
;
5811 if (sec_data
->map
== NULL
)
5813 sec_data
->map
= (elf32_arm_section_map
*)
5814 bfd_malloc (sizeof (elf32_arm_section_map
));
5815 sec_data
->mapcount
= 0;
5816 sec_data
->mapsize
= 1;
5819 newidx
= sec_data
->mapcount
++;
5821 if (sec_data
->mapcount
> sec_data
->mapsize
)
5823 sec_data
->mapsize
*= 2;
5824 sec_data
->map
= (elf32_arm_section_map
*)
5825 bfd_realloc_or_free (sec_data
->map
, sec_data
->mapsize
5826 * sizeof (elf32_arm_section_map
));
5831 sec_data
->map
[newidx
].vma
= vma
;
5832 sec_data
->map
[newidx
].type
= type
;
5837 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
5838 veneers are handled for now. */
5841 record_vfp11_erratum_veneer (struct bfd_link_info
*link_info
,
5842 elf32_vfp11_erratum_list
*branch
,
5844 asection
*branch_sec
,
5845 unsigned int offset
)
5848 struct elf32_arm_link_hash_table
*hash_table
;
5850 struct elf_link_hash_entry
*myh
;
5851 struct bfd_link_hash_entry
*bh
;
5853 struct _arm_elf_section_data
*sec_data
;
5854 elf32_vfp11_erratum_list
*newerr
;
5856 hash_table
= elf32_arm_hash_table (link_info
);
5857 BFD_ASSERT (hash_table
!= NULL
);
5858 BFD_ASSERT (hash_table
->bfd_of_glue_owner
!= NULL
);
5860 s
= bfd_get_linker_section
5861 (hash_table
->bfd_of_glue_owner
, VFP11_ERRATUM_VENEER_SECTION_NAME
);
5863 sec_data
= elf32_arm_section_data (s
);
5865 BFD_ASSERT (s
!= NULL
);
5867 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen
5868 (VFP11_ERRATUM_VENEER_ENTRY_NAME
) + 10);
5870 BFD_ASSERT (tmp_name
);
5872 sprintf (tmp_name
, VFP11_ERRATUM_VENEER_ENTRY_NAME
,
5873 hash_table
->num_vfp11_fixes
);
5875 myh
= elf_link_hash_lookup
5876 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
5878 BFD_ASSERT (myh
== NULL
);
5881 val
= hash_table
->vfp11_erratum_glue_size
;
5882 _bfd_generic_link_add_one_symbol (link_info
, hash_table
->bfd_of_glue_owner
,
5883 tmp_name
, BSF_FUNCTION
| BSF_LOCAL
, s
, val
,
5884 NULL
, TRUE
, FALSE
, &bh
);
5886 myh
= (struct elf_link_hash_entry
*) bh
;
5887 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
5888 myh
->forced_local
= 1;
5890 /* Link veneer back to calling location. */
5891 sec_data
->erratumcount
+= 1;
5892 newerr
= (elf32_vfp11_erratum_list
*)
5893 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list
));
5895 newerr
->type
= VFP11_ERRATUM_ARM_VENEER
;
5897 newerr
->u
.v
.branch
= branch
;
5898 newerr
->u
.v
.id
= hash_table
->num_vfp11_fixes
;
5899 branch
->u
.b
.veneer
= newerr
;
5901 newerr
->next
= sec_data
->erratumlist
;
5902 sec_data
->erratumlist
= newerr
;
5904 /* A symbol for the return from the veneer. */
5905 sprintf (tmp_name
, VFP11_ERRATUM_VENEER_ENTRY_NAME
"_r",
5906 hash_table
->num_vfp11_fixes
);
5908 myh
= elf_link_hash_lookup
5909 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
5916 _bfd_generic_link_add_one_symbol (link_info
, branch_bfd
, tmp_name
, BSF_LOCAL
,
5917 branch_sec
, val
, NULL
, TRUE
, FALSE
, &bh
);
5919 myh
= (struct elf_link_hash_entry
*) bh
;
5920 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
5921 myh
->forced_local
= 1;
5925 /* Generate a mapping symbol for the veneer section, and explicitly add an
5926 entry for that symbol to the code/data map for the section. */
5927 if (hash_table
->vfp11_erratum_glue_size
== 0)
5930 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
5931 ever requires this erratum fix. */
5932 _bfd_generic_link_add_one_symbol (link_info
,
5933 hash_table
->bfd_of_glue_owner
, "$a",
5934 BSF_LOCAL
, s
, 0, NULL
,
5937 myh
= (struct elf_link_hash_entry
*) bh
;
5938 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_NOTYPE
);
5939 myh
->forced_local
= 1;
5941 /* The elf32_arm_init_maps function only cares about symbols from input
5942 BFDs. We must make a note of this generated mapping symbol
5943 ourselves so that code byteswapping works properly in
5944 elf32_arm_write_section. */
5945 elf32_arm_section_map_add (s
, 'a', 0);
5948 s
->size
+= VFP11_ERRATUM_VENEER_SIZE
;
5949 hash_table
->vfp11_erratum_glue_size
+= VFP11_ERRATUM_VENEER_SIZE
;
5950 hash_table
->num_vfp11_fixes
++;
5952 /* The offset of the veneer. */
5956 #define ARM_GLUE_SECTION_FLAGS \
5957 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
5958 | SEC_READONLY | SEC_LINKER_CREATED)
5960 /* Create a fake section for use by the ARM backend of the linker. */
5963 arm_make_glue_section (bfd
* abfd
, const char * name
)
5967 sec
= bfd_get_linker_section (abfd
, name
);
5972 sec
= bfd_make_section_anyway_with_flags (abfd
, name
, ARM_GLUE_SECTION_FLAGS
);
5975 || !bfd_set_section_alignment (abfd
, sec
, 2))
5978 /* Set the gc mark to prevent the section from being removed by garbage
5979 collection, despite the fact that no relocs refer to this section. */
5985 /* Add the glue sections to ABFD. This function is called from the
5986 linker scripts in ld/emultempl/{armelf}.em. */
5989 bfd_elf32_arm_add_glue_sections_to_bfd (bfd
*abfd
,
5990 struct bfd_link_info
*info
)
5992 /* If we are only performing a partial
5993 link do not bother adding the glue. */
5994 if (info
->relocatable
)
5997 return arm_make_glue_section (abfd
, ARM2THUMB_GLUE_SECTION_NAME
)
5998 && arm_make_glue_section (abfd
, THUMB2ARM_GLUE_SECTION_NAME
)
5999 && arm_make_glue_section (abfd
, VFP11_ERRATUM_VENEER_SECTION_NAME
)
6000 && arm_make_glue_section (abfd
, ARM_BX_GLUE_SECTION_NAME
);
6003 /* Select a BFD to be used to hold the sections used by the glue code.
6004 This function is called from the linker scripts in ld/emultempl/
6008 bfd_elf32_arm_get_bfd_for_interworking (bfd
*abfd
, struct bfd_link_info
*info
)
6010 struct elf32_arm_link_hash_table
*globals
;
6012 /* If we are only performing a partial link
6013 do not bother getting a bfd to hold the glue. */
6014 if (info
->relocatable
)
6017 /* Make sure we don't attach the glue sections to a dynamic object. */
6018 BFD_ASSERT (!(abfd
->flags
& DYNAMIC
));
6020 globals
= elf32_arm_hash_table (info
);
6021 BFD_ASSERT (globals
!= NULL
);
6023 if (globals
->bfd_of_glue_owner
!= NULL
)
6026 /* Save the bfd for later use. */
6027 globals
->bfd_of_glue_owner
= abfd
;
6033 check_use_blx (struct elf32_arm_link_hash_table
*globals
)
6037 cpu_arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
6040 if (globals
->fix_arm1176
)
6042 if (cpu_arch
== TAG_CPU_ARCH_V6T2
|| cpu_arch
> TAG_CPU_ARCH_V6K
)
6043 globals
->use_blx
= 1;
6047 if (cpu_arch
> TAG_CPU_ARCH_V4T
)
6048 globals
->use_blx
= 1;
6053 bfd_elf32_arm_process_before_allocation (bfd
*abfd
,
6054 struct bfd_link_info
*link_info
)
6056 Elf_Internal_Shdr
*symtab_hdr
;
6057 Elf_Internal_Rela
*internal_relocs
= NULL
;
6058 Elf_Internal_Rela
*irel
, *irelend
;
6059 bfd_byte
*contents
= NULL
;
6062 struct elf32_arm_link_hash_table
*globals
;
6064 /* If we are only performing a partial link do not bother
6065 to construct any glue. */
6066 if (link_info
->relocatable
)
6069 /* Here we have a bfd that is to be included on the link. We have a
6070 hook to do reloc rummaging, before section sizes are nailed down. */
6071 globals
= elf32_arm_hash_table (link_info
);
6072 BFD_ASSERT (globals
!= NULL
);
6074 check_use_blx (globals
);
6076 if (globals
->byteswap_code
&& !bfd_big_endian (abfd
))
6078 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
6083 /* PR 5398: If we have not decided to include any loadable sections in
6084 the output then we will not have a glue owner bfd. This is OK, it
6085 just means that there is nothing else for us to do here. */
6086 if (globals
->bfd_of_glue_owner
== NULL
)
6089 /* Rummage around all the relocs and map the glue vectors. */
6090 sec
= abfd
->sections
;
6095 for (; sec
!= NULL
; sec
= sec
->next
)
6097 if (sec
->reloc_count
== 0)
6100 if ((sec
->flags
& SEC_EXCLUDE
) != 0)
6103 symtab_hdr
= & elf_symtab_hdr (abfd
);
6105 /* Load the relocs. */
6107 = _bfd_elf_link_read_relocs (abfd
, sec
, NULL
, NULL
, FALSE
);
6109 if (internal_relocs
== NULL
)
6112 irelend
= internal_relocs
+ sec
->reloc_count
;
6113 for (irel
= internal_relocs
; irel
< irelend
; irel
++)
6116 unsigned long r_index
;
6118 struct elf_link_hash_entry
*h
;
6120 r_type
= ELF32_R_TYPE (irel
->r_info
);
6121 r_index
= ELF32_R_SYM (irel
->r_info
);
6123 /* These are the only relocation types we care about. */
6124 if ( r_type
!= R_ARM_PC24
6125 && (r_type
!= R_ARM_V4BX
|| globals
->fix_v4bx
< 2))
6128 /* Get the section contents if we haven't done so already. */
6129 if (contents
== NULL
)
6131 /* Get cached copy if it exists. */
6132 if (elf_section_data (sec
)->this_hdr
.contents
!= NULL
)
6133 contents
= elf_section_data (sec
)->this_hdr
.contents
;
6136 /* Go get them off disk. */
6137 if (! bfd_malloc_and_get_section (abfd
, sec
, &contents
))
6142 if (r_type
== R_ARM_V4BX
)
6146 reg
= bfd_get_32 (abfd
, contents
+ irel
->r_offset
) & 0xf;
6147 record_arm_bx_glue (link_info
, reg
);
6151 /* If the relocation is not against a symbol it cannot concern us. */
6154 /* We don't care about local symbols. */
6155 if (r_index
< symtab_hdr
->sh_info
)
6158 /* This is an external symbol. */
6159 r_index
-= symtab_hdr
->sh_info
;
6160 h
= (struct elf_link_hash_entry
*)
6161 elf_sym_hashes (abfd
)[r_index
];
6163 /* If the relocation is against a static symbol it must be within
6164 the current section and so cannot be a cross ARM/Thumb relocation. */
6168 /* If the call will go through a PLT entry then we do not need
6170 if (globals
->root
.splt
!= NULL
&& h
->plt
.offset
!= (bfd_vma
) -1)
6176 /* This one is a call from arm code. We need to look up
6177 the target of the call. If it is a thumb target, we
6179 if (h
->target_internal
== ST_BRANCH_TO_THUMB
)
6180 record_arm_to_thumb_glue (link_info
, h
);
6188 if (contents
!= NULL
6189 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
6193 if (internal_relocs
!= NULL
6194 && elf_section_data (sec
)->relocs
!= internal_relocs
)
6195 free (internal_relocs
);
6196 internal_relocs
= NULL
;
6202 if (contents
!= NULL
6203 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
6205 if (internal_relocs
!= NULL
6206 && elf_section_data (sec
)->relocs
!= internal_relocs
)
6207 free (internal_relocs
);
6214 /* Initialise maps of ARM/Thumb/data for input BFDs. */
6217 bfd_elf32_arm_init_maps (bfd
*abfd
)
6219 Elf_Internal_Sym
*isymbuf
;
6220 Elf_Internal_Shdr
*hdr
;
6221 unsigned int i
, localsyms
;
6223 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
6224 if (! is_arm_elf (abfd
))
6227 if ((abfd
->flags
& DYNAMIC
) != 0)
6230 hdr
= & elf_symtab_hdr (abfd
);
6231 localsyms
= hdr
->sh_info
;
6233 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
6234 should contain the number of local symbols, which should come before any
6235 global symbols. Mapping symbols are always local. */
6236 isymbuf
= bfd_elf_get_elf_syms (abfd
, hdr
, localsyms
, 0, NULL
, NULL
,
6239 /* No internal symbols read? Skip this BFD. */
6240 if (isymbuf
== NULL
)
6243 for (i
= 0; i
< localsyms
; i
++)
6245 Elf_Internal_Sym
*isym
= &isymbuf
[i
];
6246 asection
*sec
= bfd_section_from_elf_index (abfd
, isym
->st_shndx
);
6250 && ELF_ST_BIND (isym
->st_info
) == STB_LOCAL
)
6252 name
= bfd_elf_string_from_elf_section (abfd
,
6253 hdr
->sh_link
, isym
->st_name
);
6255 if (bfd_is_arm_special_symbol_name (name
,
6256 BFD_ARM_SPECIAL_SYM_TYPE_MAP
))
6257 elf32_arm_section_map_add (sec
, name
[1], isym
->st_value
);
6263 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
6264 say what they wanted. */
6267 bfd_elf32_arm_set_cortex_a8_fix (bfd
*obfd
, struct bfd_link_info
*link_info
)
6269 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
6270 obj_attribute
*out_attr
= elf_known_obj_attributes_proc (obfd
);
6272 if (globals
== NULL
)
6275 if (globals
->fix_cortex_a8
== -1)
6277 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
6278 if (out_attr
[Tag_CPU_arch
].i
== TAG_CPU_ARCH_V7
6279 && (out_attr
[Tag_CPU_arch_profile
].i
== 'A'
6280 || out_attr
[Tag_CPU_arch_profile
].i
== 0))
6281 globals
->fix_cortex_a8
= 1;
6283 globals
->fix_cortex_a8
= 0;
6289 bfd_elf32_arm_set_vfp11_fix (bfd
*obfd
, struct bfd_link_info
*link_info
)
6291 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
6292 obj_attribute
*out_attr
= elf_known_obj_attributes_proc (obfd
);
6294 if (globals
== NULL
)
6296 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
6297 if (out_attr
[Tag_CPU_arch
].i
>= TAG_CPU_ARCH_V7
)
6299 switch (globals
->vfp11_fix
)
6301 case BFD_ARM_VFP11_FIX_DEFAULT
:
6302 case BFD_ARM_VFP11_FIX_NONE
:
6303 globals
->vfp11_fix
= BFD_ARM_VFP11_FIX_NONE
;
6307 /* Give a warning, but do as the user requests anyway. */
6308 (*_bfd_error_handler
) (_("%B: warning: selected VFP11 erratum "
6309 "workaround is not necessary for target architecture"), obfd
);
6312 else if (globals
->vfp11_fix
== BFD_ARM_VFP11_FIX_DEFAULT
)
6313 /* For earlier architectures, we might need the workaround, but do not
6314 enable it by default. If users is running with broken hardware, they
6315 must enable the erratum fix explicitly. */
6316 globals
->vfp11_fix
= BFD_ARM_VFP11_FIX_NONE
;
6320 enum bfd_arm_vfp11_pipe
6328 /* Return a VFP register number. This is encoded as RX:X for single-precision
6329 registers, or X:RX for double-precision registers, where RX is the group of
6330 four bits in the instruction encoding and X is the single extension bit.
6331 RX and X fields are specified using their lowest (starting) bit. The return
6334 0...31: single-precision registers s0...s31
6335 32...63: double-precision registers d0...d31.
6337 Although X should be zero for VFP11 (encoding d0...d15 only), we might
6338 encounter VFP3 instructions, so we allow the full range for DP registers. */
6341 bfd_arm_vfp11_regno (unsigned int insn
, bfd_boolean is_double
, unsigned int rx
,
6345 return (((insn
>> rx
) & 0xf) | (((insn
>> x
) & 1) << 4)) + 32;
6347 return (((insn
>> rx
) & 0xf) << 1) | ((insn
>> x
) & 1);
6350 /* Set bits in *WMASK according to a register number REG as encoded by
6351 bfd_arm_vfp11_regno(). Ignore d16-d31. */
6354 bfd_arm_vfp11_write_mask (unsigned int *wmask
, unsigned int reg
)
6359 *wmask
|= 3 << ((reg
- 32) * 2);
6362 /* Return TRUE if WMASK overwrites anything in REGS. */
6365 bfd_arm_vfp11_antidependency (unsigned int wmask
, int *regs
, int numregs
)
6369 for (i
= 0; i
< numregs
; i
++)
6371 unsigned int reg
= regs
[i
];
6373 if (reg
< 32 && (wmask
& (1 << reg
)) != 0)
6381 if ((wmask
& (3 << (reg
* 2))) != 0)
6388 /* In this function, we're interested in two things: finding input registers
6389 for VFP data-processing instructions, and finding the set of registers which
6390 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
6391 hold the written set, so FLDM etc. are easy to deal with (we're only
6392 interested in 32 SP registers or 16 dp registers, due to the VFP version
6393 implemented by the chip in question). DP registers are marked by setting
6394 both SP registers in the write mask). */
6396 static enum bfd_arm_vfp11_pipe
6397 bfd_arm_vfp11_insn_decode (unsigned int insn
, unsigned int *destmask
, int *regs
,
6400 enum bfd_arm_vfp11_pipe vpipe
= VFP11_BAD
;
6401 bfd_boolean is_double
= ((insn
& 0xf00) == 0xb00) ? 1 : 0;
6403 if ((insn
& 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
6406 unsigned int fd
= bfd_arm_vfp11_regno (insn
, is_double
, 12, 22);
6407 unsigned int fm
= bfd_arm_vfp11_regno (insn
, is_double
, 0, 5);
6409 pqrs
= ((insn
& 0x00800000) >> 20)
6410 | ((insn
& 0x00300000) >> 19)
6411 | ((insn
& 0x00000040) >> 6);
6415 case 0: /* fmac[sd]. */
6416 case 1: /* fnmac[sd]. */
6417 case 2: /* fmsc[sd]. */
6418 case 3: /* fnmsc[sd]. */
6420 bfd_arm_vfp11_write_mask (destmask
, fd
);
6422 regs
[1] = bfd_arm_vfp11_regno (insn
, is_double
, 16, 7); /* Fn. */
6427 case 4: /* fmul[sd]. */
6428 case 5: /* fnmul[sd]. */
6429 case 6: /* fadd[sd]. */
6430 case 7: /* fsub[sd]. */
6434 case 8: /* fdiv[sd]. */
6437 bfd_arm_vfp11_write_mask (destmask
, fd
);
6438 regs
[0] = bfd_arm_vfp11_regno (insn
, is_double
, 16, 7); /* Fn. */
6443 case 15: /* extended opcode. */
6445 unsigned int extn
= ((insn
>> 15) & 0x1e)
6446 | ((insn
>> 7) & 1);
6450 case 0: /* fcpy[sd]. */
6451 case 1: /* fabs[sd]. */
6452 case 2: /* fneg[sd]. */
6453 case 8: /* fcmp[sd]. */
6454 case 9: /* fcmpe[sd]. */
6455 case 10: /* fcmpz[sd]. */
6456 case 11: /* fcmpez[sd]. */
6457 case 16: /* fuito[sd]. */
6458 case 17: /* fsito[sd]. */
6459 case 24: /* ftoui[sd]. */
6460 case 25: /* ftouiz[sd]. */
6461 case 26: /* ftosi[sd]. */
6462 case 27: /* ftosiz[sd]. */
6463 /* These instructions will not bounce due to underflow. */
6468 case 3: /* fsqrt[sd]. */
6469 /* fsqrt cannot underflow, but it can (perhaps) overwrite
6470 registers to cause the erratum in previous instructions. */
6471 bfd_arm_vfp11_write_mask (destmask
, fd
);
6475 case 15: /* fcvt{ds,sd}. */
6479 bfd_arm_vfp11_write_mask (destmask
, fd
);
6481 /* Only FCVTSD can underflow. */
6482 if ((insn
& 0x100) != 0)
6501 /* Two-register transfer. */
6502 else if ((insn
& 0x0fe00ed0) == 0x0c400a10)
6504 unsigned int fm
= bfd_arm_vfp11_regno (insn
, is_double
, 0, 5);
6506 if ((insn
& 0x100000) == 0)
6509 bfd_arm_vfp11_write_mask (destmask
, fm
);
6512 bfd_arm_vfp11_write_mask (destmask
, fm
);
6513 bfd_arm_vfp11_write_mask (destmask
, fm
+ 1);
6519 else if ((insn
& 0x0e100e00) == 0x0c100a00) /* A load insn. */
6521 int fd
= bfd_arm_vfp11_regno (insn
, is_double
, 12, 22);
6522 unsigned int puw
= ((insn
>> 21) & 0x1) | (((insn
>> 23) & 3) << 1);
6526 case 0: /* Two-reg transfer. We should catch these above. */
6529 case 2: /* fldm[sdx]. */
6533 unsigned int i
, offset
= insn
& 0xff;
6538 for (i
= fd
; i
< fd
+ offset
; i
++)
6539 bfd_arm_vfp11_write_mask (destmask
, i
);
6543 case 4: /* fld[sd]. */
6545 bfd_arm_vfp11_write_mask (destmask
, fd
);
6554 /* Single-register transfer. Note L==0. */
6555 else if ((insn
& 0x0f100e10) == 0x0e000a10)
6557 unsigned int opcode
= (insn
>> 21) & 7;
6558 unsigned int fn
= bfd_arm_vfp11_regno (insn
, is_double
, 16, 7);
6562 case 0: /* fmsr/fmdlr. */
6563 case 1: /* fmdhr. */
6564 /* Mark fmdhr and fmdlr as writing to the whole of the DP
6565 destination register. I don't know if this is exactly right,
6566 but it is the conservative choice. */
6567 bfd_arm_vfp11_write_mask (destmask
, fn
);
6581 static int elf32_arm_compare_mapping (const void * a
, const void * b
);
6584 /* Look for potentially-troublesome code sequences which might trigger the
6585 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
6586 (available from ARM) for details of the erratum. A short version is
6587 described in ld.texinfo. */
6590 bfd_elf32_arm_vfp11_erratum_scan (bfd
*abfd
, struct bfd_link_info
*link_info
)
6593 bfd_byte
*contents
= NULL
;
6595 int regs
[3], numregs
= 0;
6596 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
6597 int use_vector
= (globals
->vfp11_fix
== BFD_ARM_VFP11_FIX_VECTOR
);
6599 if (globals
== NULL
)
6602 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
6603 The states transition as follows:
6605 0 -> 1 (vector) or 0 -> 2 (scalar)
6606 A VFP FMAC-pipeline instruction has been seen. Fill
6607 regs[0]..regs[numregs-1] with its input operands. Remember this
6608 instruction in 'first_fmac'.
6611 Any instruction, except for a VFP instruction which overwrites
6616 A VFP instruction has been seen which overwrites any of regs[*].
6617 We must make a veneer! Reset state to 0 before examining next
6621 If we fail to match anything in state 2, reset to state 0 and reset
6622 the instruction pointer to the instruction after 'first_fmac'.
6624 If the VFP11 vector mode is in use, there must be at least two unrelated
6625 instructions between anti-dependent VFP11 instructions to properly avoid
6626 triggering the erratum, hence the use of the extra state 1. */
6628 /* If we are only performing a partial link do not bother
6629 to construct any glue. */
6630 if (link_info
->relocatable
)
6633 /* Skip if this bfd does not correspond to an ELF image. */
6634 if (! is_arm_elf (abfd
))
6637 /* We should have chosen a fix type by the time we get here. */
6638 BFD_ASSERT (globals
->vfp11_fix
!= BFD_ARM_VFP11_FIX_DEFAULT
);
6640 if (globals
->vfp11_fix
== BFD_ARM_VFP11_FIX_NONE
)
6643 /* Skip this BFD if it corresponds to an executable or dynamic object. */
6644 if ((abfd
->flags
& (EXEC_P
| DYNAMIC
)) != 0)
6647 for (sec
= abfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
6649 unsigned int i
, span
, first_fmac
= 0, veneer_of_insn
= 0;
6650 struct _arm_elf_section_data
*sec_data
;
6652 /* If we don't have executable progbits, we're not interested in this
6653 section. Also skip if section is to be excluded. */
6654 if (elf_section_type (sec
) != SHT_PROGBITS
6655 || (elf_section_flags (sec
) & SHF_EXECINSTR
) == 0
6656 || (sec
->flags
& SEC_EXCLUDE
) != 0
6657 || sec
->sec_info_type
== SEC_INFO_TYPE_JUST_SYMS
6658 || sec
->output_section
== bfd_abs_section_ptr
6659 || strcmp (sec
->name
, VFP11_ERRATUM_VENEER_SECTION_NAME
) == 0)
6662 sec_data
= elf32_arm_section_data (sec
);
6664 if (sec_data
->mapcount
== 0)
6667 if (elf_section_data (sec
)->this_hdr
.contents
!= NULL
)
6668 contents
= elf_section_data (sec
)->this_hdr
.contents
;
6669 else if (! bfd_malloc_and_get_section (abfd
, sec
, &contents
))
6672 qsort (sec_data
->map
, sec_data
->mapcount
, sizeof (elf32_arm_section_map
),
6673 elf32_arm_compare_mapping
);
6675 for (span
= 0; span
< sec_data
->mapcount
; span
++)
6677 unsigned int span_start
= sec_data
->map
[span
].vma
;
6678 unsigned int span_end
= (span
== sec_data
->mapcount
- 1)
6679 ? sec
->size
: sec_data
->map
[span
+ 1].vma
;
6680 char span_type
= sec_data
->map
[span
].type
;
6682 /* FIXME: Only ARM mode is supported at present. We may need to
6683 support Thumb-2 mode also at some point. */
6684 if (span_type
!= 'a')
6687 for (i
= span_start
; i
< span_end
;)
6689 unsigned int next_i
= i
+ 4;
6690 unsigned int insn
= bfd_big_endian (abfd
)
6691 ? (contents
[i
] << 24)
6692 | (contents
[i
+ 1] << 16)
6693 | (contents
[i
+ 2] << 8)
6695 : (contents
[i
+ 3] << 24)
6696 | (contents
[i
+ 2] << 16)
6697 | (contents
[i
+ 1] << 8)
6699 unsigned int writemask
= 0;
6700 enum bfd_arm_vfp11_pipe vpipe
;
6705 vpipe
= bfd_arm_vfp11_insn_decode (insn
, &writemask
, regs
,
6707 /* I'm assuming the VFP11 erratum can trigger with denorm
6708 operands on either the FMAC or the DS pipeline. This might
6709 lead to slightly overenthusiastic veneer insertion. */
6710 if (vpipe
== VFP11_FMAC
|| vpipe
== VFP11_DS
)
6712 state
= use_vector
? 1 : 2;
6714 veneer_of_insn
= insn
;
6720 int other_regs
[3], other_numregs
;
6721 vpipe
= bfd_arm_vfp11_insn_decode (insn
, &writemask
,
6724 if (vpipe
!= VFP11_BAD
6725 && bfd_arm_vfp11_antidependency (writemask
, regs
,
6735 int other_regs
[3], other_numregs
;
6736 vpipe
= bfd_arm_vfp11_insn_decode (insn
, &writemask
,
6739 if (vpipe
!= VFP11_BAD
6740 && bfd_arm_vfp11_antidependency (writemask
, regs
,
6746 next_i
= first_fmac
+ 4;
6752 abort (); /* Should be unreachable. */
6757 elf32_vfp11_erratum_list
*newerr
=(elf32_vfp11_erratum_list
*)
6758 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list
));
6760 elf32_arm_section_data (sec
)->erratumcount
+= 1;
6762 newerr
->u
.b
.vfp_insn
= veneer_of_insn
;
6767 newerr
->type
= VFP11_ERRATUM_BRANCH_TO_ARM_VENEER
;
6774 record_vfp11_erratum_veneer (link_info
, newerr
, abfd
, sec
,
6779 newerr
->next
= sec_data
->erratumlist
;
6780 sec_data
->erratumlist
= newerr
;
6789 if (contents
!= NULL
6790 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
6798 if (contents
!= NULL
6799 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
6805 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
6806 after sections have been laid out, using specially-named symbols. */
6809 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd
*abfd
,
6810 struct bfd_link_info
*link_info
)
6813 struct elf32_arm_link_hash_table
*globals
;
6816 if (link_info
->relocatable
)
6819 /* Skip if this bfd does not correspond to an ELF image. */
6820 if (! is_arm_elf (abfd
))
6823 globals
= elf32_arm_hash_table (link_info
);
6824 if (globals
== NULL
)
6827 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen
6828 (VFP11_ERRATUM_VENEER_ENTRY_NAME
) + 10);
6830 for (sec
= abfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
6832 struct _arm_elf_section_data
*sec_data
= elf32_arm_section_data (sec
);
6833 elf32_vfp11_erratum_list
*errnode
= sec_data
->erratumlist
;
6835 for (; errnode
!= NULL
; errnode
= errnode
->next
)
6837 struct elf_link_hash_entry
*myh
;
6840 switch (errnode
->type
)
6842 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER
:
6843 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER
:
6844 /* Find veneer symbol. */
6845 sprintf (tmp_name
, VFP11_ERRATUM_VENEER_ENTRY_NAME
,
6846 errnode
->u
.b
.veneer
->u
.v
.id
);
6848 myh
= elf_link_hash_lookup
6849 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
6852 (*_bfd_error_handler
) (_("%B: unable to find VFP11 veneer "
6853 "`%s'"), abfd
, tmp_name
);
6855 vma
= myh
->root
.u
.def
.section
->output_section
->vma
6856 + myh
->root
.u
.def
.section
->output_offset
6857 + myh
->root
.u
.def
.value
;
6859 errnode
->u
.b
.veneer
->vma
= vma
;
6862 case VFP11_ERRATUM_ARM_VENEER
:
6863 case VFP11_ERRATUM_THUMB_VENEER
:
6864 /* Find return location. */
6865 sprintf (tmp_name
, VFP11_ERRATUM_VENEER_ENTRY_NAME
"_r",
6868 myh
= elf_link_hash_lookup
6869 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
6872 (*_bfd_error_handler
) (_("%B: unable to find VFP11 veneer "
6873 "`%s'"), abfd
, tmp_name
);
6875 vma
= myh
->root
.u
.def
.section
->output_section
->vma
6876 + myh
->root
.u
.def
.section
->output_offset
6877 + myh
->root
.u
.def
.value
;
6879 errnode
->u
.v
.branch
->vma
= vma
;
6892 /* Set target relocation values needed during linking. */
6895 bfd_elf32_arm_set_target_relocs (struct bfd
*output_bfd
,
6896 struct bfd_link_info
*link_info
,
6898 char * target2_type
,
6901 bfd_arm_vfp11_fix vfp11_fix
,
6902 int no_enum_warn
, int no_wchar_warn
,
6903 int pic_veneer
, int fix_cortex_a8
,
6906 struct elf32_arm_link_hash_table
*globals
;
6908 globals
= elf32_arm_hash_table (link_info
);
6909 if (globals
== NULL
)
6912 globals
->target1_is_rel
= target1_is_rel
;
6913 if (strcmp (target2_type
, "rel") == 0)
6914 globals
->target2_reloc
= R_ARM_REL32
;
6915 else if (strcmp (target2_type
, "abs") == 0)
6916 globals
->target2_reloc
= R_ARM_ABS32
;
6917 else if (strcmp (target2_type
, "got-rel") == 0)
6918 globals
->target2_reloc
= R_ARM_GOT_PREL
;
6921 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
6924 globals
->fix_v4bx
= fix_v4bx
;
6925 globals
->use_blx
|= use_blx
;
6926 globals
->vfp11_fix
= vfp11_fix
;
6927 globals
->pic_veneer
= pic_veneer
;
6928 globals
->fix_cortex_a8
= fix_cortex_a8
;
6929 globals
->fix_arm1176
= fix_arm1176
;
6931 BFD_ASSERT (is_arm_elf (output_bfd
));
6932 elf_arm_tdata (output_bfd
)->no_enum_size_warning
= no_enum_warn
;
6933 elf_arm_tdata (output_bfd
)->no_wchar_size_warning
= no_wchar_warn
;
6936 /* Replace the target offset of a Thumb bl or b.w instruction. */
6939 insert_thumb_branch (bfd
*abfd
, long int offset
, bfd_byte
*insn
)
6945 BFD_ASSERT ((offset
& 1) == 0);
6947 upper
= bfd_get_16 (abfd
, insn
);
6948 lower
= bfd_get_16 (abfd
, insn
+ 2);
6949 reloc_sign
= (offset
< 0) ? 1 : 0;
6950 upper
= (upper
& ~(bfd_vma
) 0x7ff)
6951 | ((offset
>> 12) & 0x3ff)
6952 | (reloc_sign
<< 10);
6953 lower
= (lower
& ~(bfd_vma
) 0x2fff)
6954 | (((!((offset
>> 23) & 1)) ^ reloc_sign
) << 13)
6955 | (((!((offset
>> 22) & 1)) ^ reloc_sign
) << 11)
6956 | ((offset
>> 1) & 0x7ff);
6957 bfd_put_16 (abfd
, upper
, insn
);
6958 bfd_put_16 (abfd
, lower
, insn
+ 2);
6961 /* Thumb code calling an ARM function. */
6964 elf32_thumb_to_arm_stub (struct bfd_link_info
* info
,
6968 asection
* input_section
,
6969 bfd_byte
* hit_data
,
6972 bfd_signed_vma addend
,
6974 char **error_message
)
6978 long int ret_offset
;
6979 struct elf_link_hash_entry
* myh
;
6980 struct elf32_arm_link_hash_table
* globals
;
6982 myh
= find_thumb_glue (info
, name
, error_message
);
6986 globals
= elf32_arm_hash_table (info
);
6987 BFD_ASSERT (globals
!= NULL
);
6988 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
6990 my_offset
= myh
->root
.u
.def
.value
;
6992 s
= bfd_get_linker_section (globals
->bfd_of_glue_owner
,
6993 THUMB2ARM_GLUE_SECTION_NAME
);
6995 BFD_ASSERT (s
!= NULL
);
6996 BFD_ASSERT (s
->contents
!= NULL
);
6997 BFD_ASSERT (s
->output_section
!= NULL
);
6999 if ((my_offset
& 0x01) == 0x01)
7002 && sym_sec
->owner
!= NULL
7003 && !INTERWORK_FLAG (sym_sec
->owner
))
7005 (*_bfd_error_handler
)
7006 (_("%B(%s): warning: interworking not enabled.\n"
7007 " first occurrence: %B: Thumb call to ARM"),
7008 sym_sec
->owner
, input_bfd
, name
);
7014 myh
->root
.u
.def
.value
= my_offset
;
7016 put_thumb_insn (globals
, output_bfd
, (bfd_vma
) t2a1_bx_pc_insn
,
7017 s
->contents
+ my_offset
);
7019 put_thumb_insn (globals
, output_bfd
, (bfd_vma
) t2a2_noop_insn
,
7020 s
->contents
+ my_offset
+ 2);
7023 /* Address of destination of the stub. */
7024 ((bfd_signed_vma
) val
)
7026 /* Offset from the start of the current section
7027 to the start of the stubs. */
7029 /* Offset of the start of this stub from the start of the stubs. */
7031 /* Address of the start of the current section. */
7032 + s
->output_section
->vma
)
7033 /* The branch instruction is 4 bytes into the stub. */
7035 /* ARM branches work from the pc of the instruction + 8. */
7038 put_arm_insn (globals
, output_bfd
,
7039 (bfd_vma
) t2a3_b_insn
| ((ret_offset
>> 2) & 0x00FFFFFF),
7040 s
->contents
+ my_offset
+ 4);
7043 BFD_ASSERT (my_offset
<= globals
->thumb_glue_size
);
7045 /* Now go back and fix up the original BL insn to point to here. */
7047 /* Address of where the stub is located. */
7048 (s
->output_section
->vma
+ s
->output_offset
+ my_offset
)
7049 /* Address of where the BL is located. */
7050 - (input_section
->output_section
->vma
+ input_section
->output_offset
7052 /* Addend in the relocation. */
7054 /* Biassing for PC-relative addressing. */
7057 insert_thumb_branch (input_bfd
, ret_offset
, hit_data
- input_section
->vma
);
7062 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
7064 static struct elf_link_hash_entry
*
7065 elf32_arm_create_thumb_stub (struct bfd_link_info
* info
,
7072 char ** error_message
)
7075 long int ret_offset
;
7076 struct elf_link_hash_entry
* myh
;
7077 struct elf32_arm_link_hash_table
* globals
;
7079 myh
= find_arm_glue (info
, name
, error_message
);
7083 globals
= elf32_arm_hash_table (info
);
7084 BFD_ASSERT (globals
!= NULL
);
7085 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
7087 my_offset
= myh
->root
.u
.def
.value
;
7089 if ((my_offset
& 0x01) == 0x01)
7092 && sym_sec
->owner
!= NULL
7093 && !INTERWORK_FLAG (sym_sec
->owner
))
7095 (*_bfd_error_handler
)
7096 (_("%B(%s): warning: interworking not enabled.\n"
7097 " first occurrence: %B: arm call to thumb"),
7098 sym_sec
->owner
, input_bfd
, name
);
7102 myh
->root
.u
.def
.value
= my_offset
;
7104 if (info
->shared
|| globals
->root
.is_relocatable_executable
7105 || globals
->pic_veneer
)
7107 /* For relocatable objects we can't use absolute addresses,
7108 so construct the address from a relative offset. */
7109 /* TODO: If the offset is small it's probably worth
7110 constructing the address with adds. */
7111 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t1p_ldr_insn
,
7112 s
->contents
+ my_offset
);
7113 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t2p_add_pc_insn
,
7114 s
->contents
+ my_offset
+ 4);
7115 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t3p_bx_r12_insn
,
7116 s
->contents
+ my_offset
+ 8);
7117 /* Adjust the offset by 4 for the position of the add,
7118 and 8 for the pipeline offset. */
7119 ret_offset
= (val
- (s
->output_offset
7120 + s
->output_section
->vma
7123 bfd_put_32 (output_bfd
, ret_offset
,
7124 s
->contents
+ my_offset
+ 12);
7126 else if (globals
->use_blx
)
7128 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t1v5_ldr_insn
,
7129 s
->contents
+ my_offset
);
7131 /* It's a thumb address. Add the low order bit. */
7132 bfd_put_32 (output_bfd
, val
| a2t2v5_func_addr_insn
,
7133 s
->contents
+ my_offset
+ 4);
7137 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t1_ldr_insn
,
7138 s
->contents
+ my_offset
);
7140 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t2_bx_r12_insn
,
7141 s
->contents
+ my_offset
+ 4);
7143 /* It's a thumb address. Add the low order bit. */
7144 bfd_put_32 (output_bfd
, val
| a2t3_func_addr_insn
,
7145 s
->contents
+ my_offset
+ 8);
7151 BFD_ASSERT (my_offset
<= globals
->arm_glue_size
);
7156 /* Arm code calling a Thumb function. */
7159 elf32_arm_to_thumb_stub (struct bfd_link_info
* info
,
7163 asection
* input_section
,
7164 bfd_byte
* hit_data
,
7167 bfd_signed_vma addend
,
7169 char **error_message
)
7171 unsigned long int tmp
;
7174 long int ret_offset
;
7175 struct elf_link_hash_entry
* myh
;
7176 struct elf32_arm_link_hash_table
* globals
;
7178 globals
= elf32_arm_hash_table (info
);
7179 BFD_ASSERT (globals
!= NULL
);
7180 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
7182 s
= bfd_get_linker_section (globals
->bfd_of_glue_owner
,
7183 ARM2THUMB_GLUE_SECTION_NAME
);
7184 BFD_ASSERT (s
!= NULL
);
7185 BFD_ASSERT (s
->contents
!= NULL
);
7186 BFD_ASSERT (s
->output_section
!= NULL
);
7188 myh
= elf32_arm_create_thumb_stub (info
, name
, input_bfd
, output_bfd
,
7189 sym_sec
, val
, s
, error_message
);
7193 my_offset
= myh
->root
.u
.def
.value
;
7194 tmp
= bfd_get_32 (input_bfd
, hit_data
);
7195 tmp
= tmp
& 0xFF000000;
7197 /* Somehow these are both 4 too far, so subtract 8. */
7198 ret_offset
= (s
->output_offset
7200 + s
->output_section
->vma
7201 - (input_section
->output_offset
7202 + input_section
->output_section
->vma
7206 tmp
= tmp
| ((ret_offset
>> 2) & 0x00FFFFFF);
7208 bfd_put_32 (output_bfd
, (bfd_vma
) tmp
, hit_data
- input_section
->vma
);
7213 /* Populate Arm stub for an exported Thumb function. */
7216 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry
*h
, void * inf
)
7218 struct bfd_link_info
* info
= (struct bfd_link_info
*) inf
;
7220 struct elf_link_hash_entry
* myh
;
7221 struct elf32_arm_link_hash_entry
*eh
;
7222 struct elf32_arm_link_hash_table
* globals
;
7225 char *error_message
;
7227 eh
= elf32_arm_hash_entry (h
);
7228 /* Allocate stubs for exported Thumb functions on v4t. */
7229 if (eh
->export_glue
== NULL
)
7232 globals
= elf32_arm_hash_table (info
);
7233 BFD_ASSERT (globals
!= NULL
);
7234 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
7236 s
= bfd_get_linker_section (globals
->bfd_of_glue_owner
,
7237 ARM2THUMB_GLUE_SECTION_NAME
);
7238 BFD_ASSERT (s
!= NULL
);
7239 BFD_ASSERT (s
->contents
!= NULL
);
7240 BFD_ASSERT (s
->output_section
!= NULL
);
7242 sec
= eh
->export_glue
->root
.u
.def
.section
;
7244 BFD_ASSERT (sec
->output_section
!= NULL
);
7246 val
= eh
->export_glue
->root
.u
.def
.value
+ sec
->output_offset
7247 + sec
->output_section
->vma
;
7249 myh
= elf32_arm_create_thumb_stub (info
, h
->root
.root
.string
,
7250 h
->root
.u
.def
.section
->owner
,
7251 globals
->obfd
, sec
, val
, s
,
7257 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
7260 elf32_arm_bx_glue (struct bfd_link_info
* info
, int reg
)
7265 struct elf32_arm_link_hash_table
*globals
;
7267 globals
= elf32_arm_hash_table (info
);
7268 BFD_ASSERT (globals
!= NULL
);
7269 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
7271 s
= bfd_get_linker_section (globals
->bfd_of_glue_owner
,
7272 ARM_BX_GLUE_SECTION_NAME
);
7273 BFD_ASSERT (s
!= NULL
);
7274 BFD_ASSERT (s
->contents
!= NULL
);
7275 BFD_ASSERT (s
->output_section
!= NULL
);
7277 BFD_ASSERT (globals
->bx_glue_offset
[reg
] & 2);
7279 glue_addr
= globals
->bx_glue_offset
[reg
] & ~(bfd_vma
)3;
7281 if ((globals
->bx_glue_offset
[reg
] & 1) == 0)
7283 p
= s
->contents
+ glue_addr
;
7284 bfd_put_32 (globals
->obfd
, armbx1_tst_insn
+ (reg
<< 16), p
);
7285 bfd_put_32 (globals
->obfd
, armbx2_moveq_insn
+ reg
, p
+ 4);
7286 bfd_put_32 (globals
->obfd
, armbx3_bx_insn
+ reg
, p
+ 8);
7287 globals
->bx_glue_offset
[reg
] |= 1;
7290 return glue_addr
+ s
->output_section
->vma
+ s
->output_offset
;
7293 /* Generate Arm stubs for exported Thumb symbols. */
7295 elf32_arm_begin_write_processing (bfd
*abfd ATTRIBUTE_UNUSED
,
7296 struct bfd_link_info
*link_info
)
7298 struct elf32_arm_link_hash_table
* globals
;
7300 if (link_info
== NULL
)
7301 /* Ignore this if we are not called by the ELF backend linker. */
7304 globals
= elf32_arm_hash_table (link_info
);
7305 if (globals
== NULL
)
7308 /* If blx is available then exported Thumb symbols are OK and there is
7310 if (globals
->use_blx
)
7313 elf_link_hash_traverse (&globals
->root
, elf32_arm_to_thumb_export_stub
,
7317 /* Reserve space for COUNT dynamic relocations in relocation selection
7321 elf32_arm_allocate_dynrelocs (struct bfd_link_info
*info
, asection
*sreloc
,
7322 bfd_size_type count
)
7324 struct elf32_arm_link_hash_table
*htab
;
7326 htab
= elf32_arm_hash_table (info
);
7327 BFD_ASSERT (htab
->root
.dynamic_sections_created
);
7330 sreloc
->size
+= RELOC_SIZE (htab
) * count
;
7333 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
7334 dynamic, the relocations should go in SRELOC, otherwise they should
7335 go in the special .rel.iplt section. */
7338 elf32_arm_allocate_irelocs (struct bfd_link_info
*info
, asection
*sreloc
,
7339 bfd_size_type count
)
7341 struct elf32_arm_link_hash_table
*htab
;
7343 htab
= elf32_arm_hash_table (info
);
7344 if (!htab
->root
.dynamic_sections_created
)
7345 htab
->root
.irelplt
->size
+= RELOC_SIZE (htab
) * count
;
7348 BFD_ASSERT (sreloc
!= NULL
);
7349 sreloc
->size
+= RELOC_SIZE (htab
) * count
;
7353 /* Add relocation REL to the end of relocation section SRELOC. */
7356 elf32_arm_add_dynreloc (bfd
*output_bfd
, struct bfd_link_info
*info
,
7357 asection
*sreloc
, Elf_Internal_Rela
*rel
)
7360 struct elf32_arm_link_hash_table
*htab
;
7362 htab
= elf32_arm_hash_table (info
);
7363 if (!htab
->root
.dynamic_sections_created
7364 && ELF32_R_TYPE (rel
->r_info
) == R_ARM_IRELATIVE
)
7365 sreloc
= htab
->root
.irelplt
;
7368 loc
= sreloc
->contents
;
7369 loc
+= sreloc
->reloc_count
++ * RELOC_SIZE (htab
);
7370 if (sreloc
->reloc_count
* RELOC_SIZE (htab
) > sreloc
->size
)
7372 SWAP_RELOC_OUT (htab
) (output_bfd
, rel
, loc
);
7375 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
7376 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
7380 elf32_arm_allocate_plt_entry (struct bfd_link_info
*info
,
7381 bfd_boolean is_iplt_entry
,
7382 union gotplt_union
*root_plt
,
7383 struct arm_plt_info
*arm_plt
)
7385 struct elf32_arm_link_hash_table
*htab
;
7389 htab
= elf32_arm_hash_table (info
);
7393 splt
= htab
->root
.iplt
;
7394 sgotplt
= htab
->root
.igotplt
;
7396 /* NaCl uses a special first entry in .iplt too. */
7397 if (htab
->nacl_p
&& splt
->size
== 0)
7398 splt
->size
+= htab
->plt_header_size
;
7400 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
7401 elf32_arm_allocate_irelocs (info
, htab
->root
.irelplt
, 1);
7405 splt
= htab
->root
.splt
;
7406 sgotplt
= htab
->root
.sgotplt
;
7408 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
7409 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelplt
, 1);
7411 /* If this is the first .plt entry, make room for the special
7413 if (splt
->size
== 0)
7414 splt
->size
+= htab
->plt_header_size
;
7417 /* Allocate the PLT entry itself, including any leading Thumb stub. */
7418 if (elf32_arm_plt_needs_thumb_stub_p (info
, arm_plt
))
7419 splt
->size
+= PLT_THUMB_STUB_SIZE
;
7420 root_plt
->offset
= splt
->size
;
7421 splt
->size
+= htab
->plt_entry_size
;
7423 if (!htab
->symbian_p
)
7425 /* We also need to make an entry in the .got.plt section, which
7426 will be placed in the .got section by the linker script. */
7427 arm_plt
->got_offset
= sgotplt
->size
- 8 * htab
->num_tls_desc
;
7433 arm_movw_immediate (bfd_vma value
)
7435 return (value
& 0x00000fff) | ((value
& 0x0000f000) << 4);
7439 arm_movt_immediate (bfd_vma value
)
7441 return ((value
& 0x0fff0000) >> 16) | ((value
& 0xf0000000) >> 12);
7444 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
7445 the entry lives in .iplt and resolves to (*SYM_VALUE)().
7446 Otherwise, DYNINDX is the index of the symbol in the dynamic
7447 symbol table and SYM_VALUE is undefined.
7449 ROOT_PLT points to the offset of the PLT entry from the start of its
7450 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
7451 bookkeeping information. */
7454 elf32_arm_populate_plt_entry (bfd
*output_bfd
, struct bfd_link_info
*info
,
7455 union gotplt_union
*root_plt
,
7456 struct arm_plt_info
*arm_plt
,
7457 int dynindx
, bfd_vma sym_value
)
7459 struct elf32_arm_link_hash_table
*htab
;
7465 Elf_Internal_Rela rel
;
7466 bfd_vma plt_header_size
;
7467 bfd_vma got_header_size
;
7469 htab
= elf32_arm_hash_table (info
);
7471 /* Pick the appropriate sections and sizes. */
7474 splt
= htab
->root
.iplt
;
7475 sgot
= htab
->root
.igotplt
;
7476 srel
= htab
->root
.irelplt
;
7478 /* There are no reserved entries in .igot.plt, and no special
7479 first entry in .iplt. */
7480 got_header_size
= 0;
7481 plt_header_size
= 0;
7485 splt
= htab
->root
.splt
;
7486 sgot
= htab
->root
.sgotplt
;
7487 srel
= htab
->root
.srelplt
;
7489 got_header_size
= get_elf_backend_data (output_bfd
)->got_header_size
;
7490 plt_header_size
= htab
->plt_header_size
;
7492 BFD_ASSERT (splt
!= NULL
&& srel
!= NULL
);
7494 /* Fill in the entry in the procedure linkage table. */
7495 if (htab
->symbian_p
)
7497 BFD_ASSERT (dynindx
>= 0);
7498 put_arm_insn (htab
, output_bfd
,
7499 elf32_arm_symbian_plt_entry
[0],
7500 splt
->contents
+ root_plt
->offset
);
7501 bfd_put_32 (output_bfd
,
7502 elf32_arm_symbian_plt_entry
[1],
7503 splt
->contents
+ root_plt
->offset
+ 4);
7505 /* Fill in the entry in the .rel.plt section. */
7506 rel
.r_offset
= (splt
->output_section
->vma
7507 + splt
->output_offset
7508 + root_plt
->offset
+ 4);
7509 rel
.r_info
= ELF32_R_INFO (dynindx
, R_ARM_GLOB_DAT
);
7511 /* Get the index in the procedure linkage table which
7512 corresponds to this symbol. This is the index of this symbol
7513 in all the symbols for which we are making plt entries. The
7514 first entry in the procedure linkage table is reserved. */
7515 plt_index
= ((root_plt
->offset
- plt_header_size
)
7516 / htab
->plt_entry_size
);
7520 bfd_vma got_offset
, got_address
, plt_address
;
7521 bfd_vma got_displacement
, initial_got_entry
;
7524 BFD_ASSERT (sgot
!= NULL
);
7526 /* Get the offset into the .(i)got.plt table of the entry that
7527 corresponds to this function. */
7528 got_offset
= (arm_plt
->got_offset
& -2);
7530 /* Get the index in the procedure linkage table which
7531 corresponds to this symbol. This is the index of this symbol
7532 in all the symbols for which we are making plt entries.
7533 After the reserved .got.plt entries, all symbols appear in
7534 the same order as in .plt. */
7535 plt_index
= (got_offset
- got_header_size
) / 4;
7537 /* Calculate the address of the GOT entry. */
7538 got_address
= (sgot
->output_section
->vma
7539 + sgot
->output_offset
7542 /* ...and the address of the PLT entry. */
7543 plt_address
= (splt
->output_section
->vma
7544 + splt
->output_offset
7545 + root_plt
->offset
);
7547 ptr
= splt
->contents
+ root_plt
->offset
;
7548 if (htab
->vxworks_p
&& info
->shared
)
7553 for (i
= 0; i
!= htab
->plt_entry_size
/ 4; i
++, ptr
+= 4)
7555 val
= elf32_arm_vxworks_shared_plt_entry
[i
];
7557 val
|= got_address
- sgot
->output_section
->vma
;
7559 val
|= plt_index
* RELOC_SIZE (htab
);
7560 if (i
== 2 || i
== 5)
7561 bfd_put_32 (output_bfd
, val
, ptr
);
7563 put_arm_insn (htab
, output_bfd
, val
, ptr
);
7566 else if (htab
->vxworks_p
)
7571 for (i
= 0; i
!= htab
->plt_entry_size
/ 4; i
++, ptr
+= 4)
7573 val
= elf32_arm_vxworks_exec_plt_entry
[i
];
7577 val
|= 0xffffff & -((root_plt
->offset
+ i
* 4 + 8) >> 2);
7579 val
|= plt_index
* RELOC_SIZE (htab
);
7580 if (i
== 2 || i
== 5)
7581 bfd_put_32 (output_bfd
, val
, ptr
);
7583 put_arm_insn (htab
, output_bfd
, val
, ptr
);
7586 loc
= (htab
->srelplt2
->contents
7587 + (plt_index
* 2 + 1) * RELOC_SIZE (htab
));
7589 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
7590 referencing the GOT for this PLT entry. */
7591 rel
.r_offset
= plt_address
+ 8;
7592 rel
.r_info
= ELF32_R_INFO (htab
->root
.hgot
->indx
, R_ARM_ABS32
);
7593 rel
.r_addend
= got_offset
;
7594 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, loc
);
7595 loc
+= RELOC_SIZE (htab
);
7597 /* Create the R_ARM_ABS32 relocation referencing the
7598 beginning of the PLT for this GOT entry. */
7599 rel
.r_offset
= got_address
;
7600 rel
.r_info
= ELF32_R_INFO (htab
->root
.hplt
->indx
, R_ARM_ABS32
);
7602 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, loc
);
7604 else if (htab
->nacl_p
)
7606 /* Calculate the displacement between the PLT slot and the
7607 common tail that's part of the special initial PLT slot. */
7608 int32_t tail_displacement
7609 = ((splt
->output_section
->vma
+ splt
->output_offset
7610 + ARM_NACL_PLT_TAIL_OFFSET
)
7611 - (plt_address
+ htab
->plt_entry_size
+ 4));
7612 BFD_ASSERT ((tail_displacement
& 3) == 0);
7613 tail_displacement
>>= 2;
7615 BFD_ASSERT ((tail_displacement
& 0xff000000) == 0
7616 || (-tail_displacement
& 0xff000000) == 0);
7618 /* Calculate the displacement between the PLT slot and the entry
7619 in the GOT. The offset accounts for the value produced by
7620 adding to pc in the penultimate instruction of the PLT stub. */
7621 got_displacement
= (got_address
7622 - (plt_address
+ htab
->plt_entry_size
));
7624 /* NaCl does not support interworking at all. */
7625 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info
, arm_plt
));
7627 put_arm_insn (htab
, output_bfd
,
7628 elf32_arm_nacl_plt_entry
[0]
7629 | arm_movw_immediate (got_displacement
),
7631 put_arm_insn (htab
, output_bfd
,
7632 elf32_arm_nacl_plt_entry
[1]
7633 | arm_movt_immediate (got_displacement
),
7635 put_arm_insn (htab
, output_bfd
,
7636 elf32_arm_nacl_plt_entry
[2],
7638 put_arm_insn (htab
, output_bfd
,
7639 elf32_arm_nacl_plt_entry
[3]
7640 | (tail_displacement
& 0x00ffffff),
7645 /* Calculate the displacement between the PLT slot and the
7646 entry in the GOT. The eight-byte offset accounts for the
7647 value produced by adding to pc in the first instruction
7649 got_displacement
= got_address
- (plt_address
+ 8);
7651 BFD_ASSERT ((got_displacement
& 0xf0000000) == 0);
7653 if (elf32_arm_plt_needs_thumb_stub_p (info
, arm_plt
))
7655 put_thumb_insn (htab
, output_bfd
,
7656 elf32_arm_plt_thumb_stub
[0], ptr
- 4);
7657 put_thumb_insn (htab
, output_bfd
,
7658 elf32_arm_plt_thumb_stub
[1], ptr
- 2);
7661 put_arm_insn (htab
, output_bfd
,
7662 elf32_arm_plt_entry
[0]
7663 | ((got_displacement
& 0x0ff00000) >> 20),
7665 put_arm_insn (htab
, output_bfd
,
7666 elf32_arm_plt_entry
[1]
7667 | ((got_displacement
& 0x000ff000) >> 12),
7669 put_arm_insn (htab
, output_bfd
,
7670 elf32_arm_plt_entry
[2]
7671 | (got_displacement
& 0x00000fff),
7673 #ifdef FOUR_WORD_PLT
7674 bfd_put_32 (output_bfd
, elf32_arm_plt_entry
[3], ptr
+ 12);
7678 /* Fill in the entry in the .rel(a).(i)plt section. */
7679 rel
.r_offset
= got_address
;
7683 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
7684 The dynamic linker or static executable then calls SYM_VALUE
7685 to determine the correct run-time value of the .igot.plt entry. */
7686 rel
.r_info
= ELF32_R_INFO (0, R_ARM_IRELATIVE
);
7687 initial_got_entry
= sym_value
;
7691 rel
.r_info
= ELF32_R_INFO (dynindx
, R_ARM_JUMP_SLOT
);
7692 initial_got_entry
= (splt
->output_section
->vma
7693 + splt
->output_offset
);
7696 /* Fill in the entry in the global offset table. */
7697 bfd_put_32 (output_bfd
, initial_got_entry
,
7698 sgot
->contents
+ got_offset
);
7702 elf32_arm_add_dynreloc (output_bfd
, info
, srel
, &rel
);
7705 loc
= srel
->contents
+ plt_index
* RELOC_SIZE (htab
);
7706 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, loc
);
7710 /* Some relocations map to different relocations depending on the
7711 target. Return the real relocation. */
7714 arm_real_reloc_type (struct elf32_arm_link_hash_table
* globals
,
7720 if (globals
->target1_is_rel
)
7726 return globals
->target2_reloc
;
7733 /* Return the base VMA address which should be subtracted from real addresses
7734 when resolving @dtpoff relocation.
7735 This is PT_TLS segment p_vaddr. */
7738 dtpoff_base (struct bfd_link_info
*info
)
7740 /* If tls_sec is NULL, we should have signalled an error already. */
7741 if (elf_hash_table (info
)->tls_sec
== NULL
)
7743 return elf_hash_table (info
)->tls_sec
->vma
;
7746 /* Return the relocation value for @tpoff relocation
7747 if STT_TLS virtual address is ADDRESS. */
7750 tpoff (struct bfd_link_info
*info
, bfd_vma address
)
7752 struct elf_link_hash_table
*htab
= elf_hash_table (info
);
7755 /* If tls_sec is NULL, we should have signalled an error already. */
7756 if (htab
->tls_sec
== NULL
)
7758 base
= align_power ((bfd_vma
) TCB_SIZE
, htab
->tls_sec
->alignment_power
);
7759 return address
- htab
->tls_sec
->vma
+ base
;
7762 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
7763 VALUE is the relocation value. */
7765 static bfd_reloc_status_type
7766 elf32_arm_abs12_reloc (bfd
*abfd
, void *data
, bfd_vma value
)
7769 return bfd_reloc_overflow
;
7771 value
|= bfd_get_32 (abfd
, data
) & 0xfffff000;
7772 bfd_put_32 (abfd
, value
, data
);
7773 return bfd_reloc_ok
;
7776 /* Handle TLS relaxations. Relaxing is possible for symbols that use
7777 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
7778 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
7780 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
7781 is to then call final_link_relocate. Return other values in the
7784 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
7785 the pre-relaxed code. It would be nice if the relocs were updated
7786 to match the optimization. */
7788 static bfd_reloc_status_type
7789 elf32_arm_tls_relax (struct elf32_arm_link_hash_table
*globals
,
7790 bfd
*input_bfd
, asection
*input_sec
, bfd_byte
*contents
,
7791 Elf_Internal_Rela
*rel
, unsigned long is_local
)
7795 switch (ELF32_R_TYPE (rel
->r_info
))
7798 return bfd_reloc_notsupported
;
7800 case R_ARM_TLS_GOTDESC
:
7805 insn
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
);
7807 insn
-= 5; /* THUMB */
7809 insn
-= 8; /* ARM */
7811 bfd_put_32 (input_bfd
, insn
, contents
+ rel
->r_offset
);
7812 return bfd_reloc_continue
;
7814 case R_ARM_THM_TLS_DESCSEQ
:
7816 insn
= bfd_get_16 (input_bfd
, contents
+ rel
->r_offset
);
7817 if ((insn
& 0xff78) == 0x4478) /* add rx, pc */
7821 bfd_put_16 (input_bfd
, 0x46c0, contents
+ rel
->r_offset
);
7823 else if ((insn
& 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
7827 bfd_put_16 (input_bfd
, 0x46c0, contents
+ rel
->r_offset
);
7830 bfd_put_16 (input_bfd
, insn
& 0xf83f, contents
+ rel
->r_offset
);
7832 else if ((insn
& 0xff87) == 0x4780) /* blx rx */
7836 bfd_put_16 (input_bfd
, 0x46c0, contents
+ rel
->r_offset
);
7839 bfd_put_16 (input_bfd
, 0x4600 | (insn
& 0x78),
7840 contents
+ rel
->r_offset
);
7844 if ((insn
& 0xf000) == 0xf000 || (insn
& 0xf800) == 0xe800)
7845 /* It's a 32 bit instruction, fetch the rest of it for
7846 error generation. */
7848 | bfd_get_16 (input_bfd
, contents
+ rel
->r_offset
+ 2);
7849 (*_bfd_error_handler
)
7850 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"),
7851 input_bfd
, input_sec
, (unsigned long)rel
->r_offset
, insn
);
7852 return bfd_reloc_notsupported
;
7856 case R_ARM_TLS_DESCSEQ
:
7858 insn
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
);
7859 if ((insn
& 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
7863 bfd_put_32 (input_bfd
, 0xe1a00000 | (insn
& 0xffff),
7864 contents
+ rel
->r_offset
);
7866 else if ((insn
& 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
7870 bfd_put_32 (input_bfd
, 0xe1a00000, contents
+ rel
->r_offset
);
7873 bfd_put_32 (input_bfd
, insn
& 0xfffff000,
7874 contents
+ rel
->r_offset
);
7876 else if ((insn
& 0xfffffff0) == 0xe12fff30) /* blx rx */
7880 bfd_put_32 (input_bfd
, 0xe1a00000, contents
+ rel
->r_offset
);
7883 bfd_put_32 (input_bfd
, 0xe1a00000 | (insn
& 0xf),
7884 contents
+ rel
->r_offset
);
7888 (*_bfd_error_handler
)
7889 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline"),
7890 input_bfd
, input_sec
, (unsigned long)rel
->r_offset
, insn
);
7891 return bfd_reloc_notsupported
;
7895 case R_ARM_TLS_CALL
:
7896 /* GD->IE relaxation, turn the instruction into 'nop' or
7897 'ldr r0, [pc,r0]' */
7898 insn
= is_local
? 0xe1a00000 : 0xe79f0000;
7899 bfd_put_32 (input_bfd
, insn
, contents
+ rel
->r_offset
);
7902 case R_ARM_THM_TLS_CALL
:
7903 /* GD->IE relaxation */
7905 /* add r0,pc; ldr r0, [r0] */
7907 else if (arch_has_thumb2_nop (globals
))
7914 bfd_put_16 (input_bfd
, insn
>> 16, contents
+ rel
->r_offset
);
7915 bfd_put_16 (input_bfd
, insn
& 0xffff, contents
+ rel
->r_offset
+ 2);
7918 return bfd_reloc_ok
;
7921 /* For a given value of n, calculate the value of G_n as required to
7922 deal with group relocations. We return it in the form of an
7923 encoded constant-and-rotation, together with the final residual. If n is
7924 specified as less than zero, then final_residual is filled with the
7925 input value and no further action is performed. */
7928 calculate_group_reloc_mask (bfd_vma value
, int n
, bfd_vma
*final_residual
)
7932 bfd_vma encoded_g_n
= 0;
7933 bfd_vma residual
= value
; /* Also known as Y_n. */
7935 for (current_n
= 0; current_n
<= n
; current_n
++)
7939 /* Calculate which part of the value to mask. */
7946 /* Determine the most significant bit in the residual and
7947 align the resulting value to a 2-bit boundary. */
7948 for (msb
= 30; msb
>= 0; msb
-= 2)
7949 if (residual
& (3 << msb
))
7952 /* The desired shift is now (msb - 6), or zero, whichever
7959 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
7960 g_n
= residual
& (0xff << shift
);
7961 encoded_g_n
= (g_n
>> shift
)
7962 | ((g_n
<= 0xff ? 0 : (32 - shift
) / 2) << 8);
7964 /* Calculate the residual for the next time around. */
7968 *final_residual
= residual
;
7973 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
7974 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
7977 identify_add_or_sub (bfd_vma insn
)
7979 int opcode
= insn
& 0x1e00000;
7981 if (opcode
== 1 << 23) /* ADD */
7984 if (opcode
== 1 << 22) /* SUB */
7990 /* Perform a relocation as part of a final link. */
7992 static bfd_reloc_status_type
7993 elf32_arm_final_link_relocate (reloc_howto_type
* howto
,
7996 asection
* input_section
,
7997 bfd_byte
* contents
,
7998 Elf_Internal_Rela
* rel
,
8000 struct bfd_link_info
* info
,
8002 const char * sym_name
,
8003 unsigned char st_type
,
8004 enum arm_st_branch_type branch_type
,
8005 struct elf_link_hash_entry
* h
,
8006 bfd_boolean
* unresolved_reloc_p
,
8007 char ** error_message
)
8009 unsigned long r_type
= howto
->type
;
8010 unsigned long r_symndx
;
8011 bfd_byte
* hit_data
= contents
+ rel
->r_offset
;
8012 bfd_vma
* local_got_offsets
;
8013 bfd_vma
* local_tlsdesc_gotents
;
8016 asection
* sreloc
= NULL
;
8019 bfd_signed_vma signed_addend
;
8020 unsigned char dynreloc_st_type
;
8021 bfd_vma dynreloc_value
;
8022 struct elf32_arm_link_hash_table
* globals
;
8023 struct elf32_arm_link_hash_entry
*eh
;
8024 union gotplt_union
*root_plt
;
8025 struct arm_plt_info
*arm_plt
;
8027 bfd_vma gotplt_offset
;
8028 bfd_boolean has_iplt_entry
;
8030 globals
= elf32_arm_hash_table (info
);
8031 if (globals
== NULL
)
8032 return bfd_reloc_notsupported
;
8034 BFD_ASSERT (is_arm_elf (input_bfd
));
8036 /* Some relocation types map to different relocations depending on the
8037 target. We pick the right one here. */
8038 r_type
= arm_real_reloc_type (globals
, r_type
);
8040 /* It is possible to have linker relaxations on some TLS access
8041 models. Update our information here. */
8042 r_type
= elf32_arm_tls_transition (info
, r_type
, h
);
8044 if (r_type
!= howto
->type
)
8045 howto
= elf32_arm_howto_from_type (r_type
);
8047 /* If the start address has been set, then set the EF_ARM_HASENTRY
8048 flag. Setting this more than once is redundant, but the cost is
8049 not too high, and it keeps the code simple.
8051 The test is done here, rather than somewhere else, because the
8052 start address is only set just before the final link commences.
8054 Note - if the user deliberately sets a start address of 0, the
8055 flag will not be set. */
8056 if (bfd_get_start_address (output_bfd
) != 0)
8057 elf_elfheader (output_bfd
)->e_flags
|= EF_ARM_HASENTRY
;
8059 eh
= (struct elf32_arm_link_hash_entry
*) h
;
8060 sgot
= globals
->root
.sgot
;
8061 local_got_offsets
= elf_local_got_offsets (input_bfd
);
8062 local_tlsdesc_gotents
= elf32_arm_local_tlsdesc_gotent (input_bfd
);
8064 if (globals
->root
.dynamic_sections_created
)
8065 srelgot
= globals
->root
.srelgot
;
8069 r_symndx
= ELF32_R_SYM (rel
->r_info
);
8071 if (globals
->use_rel
)
8073 addend
= bfd_get_32 (input_bfd
, hit_data
) & howto
->src_mask
;
8075 if (addend
& ((howto
->src_mask
+ 1) >> 1))
8078 signed_addend
&= ~ howto
->src_mask
;
8079 signed_addend
|= addend
;
8082 signed_addend
= addend
;
8085 addend
= signed_addend
= rel
->r_addend
;
8087 /* Record the symbol information that should be used in dynamic
8089 dynreloc_st_type
= st_type
;
8090 dynreloc_value
= value
;
8091 if (branch_type
== ST_BRANCH_TO_THUMB
)
8092 dynreloc_value
|= 1;
8094 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
8095 VALUE appropriately for relocations that we resolve at link time. */
8096 has_iplt_entry
= FALSE
;
8097 if (elf32_arm_get_plt_info (input_bfd
, eh
, r_symndx
, &root_plt
, &arm_plt
)
8098 && root_plt
->offset
!= (bfd_vma
) -1)
8100 plt_offset
= root_plt
->offset
;
8101 gotplt_offset
= arm_plt
->got_offset
;
8103 if (h
== NULL
|| eh
->is_iplt
)
8105 has_iplt_entry
= TRUE
;
8106 splt
= globals
->root
.iplt
;
8108 /* Populate .iplt entries here, because not all of them will
8109 be seen by finish_dynamic_symbol. The lower bit is set if
8110 we have already populated the entry. */
8115 elf32_arm_populate_plt_entry (output_bfd
, info
, root_plt
, arm_plt
,
8116 -1, dynreloc_value
);
8117 root_plt
->offset
|= 1;
8120 /* Static relocations always resolve to the .iplt entry. */
8122 value
= (splt
->output_section
->vma
8123 + splt
->output_offset
8125 branch_type
= ST_BRANCH_TO_ARM
;
8127 /* If there are non-call relocations that resolve to the .iplt
8128 entry, then all dynamic ones must too. */
8129 if (arm_plt
->noncall_refcount
!= 0)
8131 dynreloc_st_type
= st_type
;
8132 dynreloc_value
= value
;
8136 /* We populate the .plt entry in finish_dynamic_symbol. */
8137 splt
= globals
->root
.splt
;
8142 plt_offset
= (bfd_vma
) -1;
8143 gotplt_offset
= (bfd_vma
) -1;
8149 /* We don't need to find a value for this symbol. It's just a
8151 *unresolved_reloc_p
= FALSE
;
8152 return bfd_reloc_ok
;
8155 if (!globals
->vxworks_p
)
8156 return elf32_arm_abs12_reloc (input_bfd
, hit_data
, value
+ addend
);
8160 case R_ARM_ABS32_NOI
:
8162 case R_ARM_REL32_NOI
:
8168 /* Handle relocations which should use the PLT entry. ABS32/REL32
8169 will use the symbol's value, which may point to a PLT entry, but we
8170 don't need to handle that here. If we created a PLT entry, all
8171 branches in this object should go to it, except if the PLT is too
8172 far away, in which case a long branch stub should be inserted. */
8173 if ((r_type
!= R_ARM_ABS32
&& r_type
!= R_ARM_REL32
8174 && r_type
!= R_ARM_ABS32_NOI
&& r_type
!= R_ARM_REL32_NOI
8175 && r_type
!= R_ARM_CALL
8176 && r_type
!= R_ARM_JUMP24
8177 && r_type
!= R_ARM_PLT32
)
8178 && plt_offset
!= (bfd_vma
) -1)
8180 /* If we've created a .plt section, and assigned a PLT entry
8181 to this function, it must either be a STT_GNU_IFUNC reference
8182 or not be known to bind locally. In other cases, we should
8183 have cleared the PLT entry by now. */
8184 BFD_ASSERT (has_iplt_entry
|| !SYMBOL_CALLS_LOCAL (info
, h
));
8186 value
= (splt
->output_section
->vma
8187 + splt
->output_offset
8189 *unresolved_reloc_p
= FALSE
;
8190 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
8191 contents
, rel
->r_offset
, value
,
8195 /* When generating a shared object or relocatable executable, these
8196 relocations are copied into the output file to be resolved at
8198 if ((info
->shared
|| globals
->root
.is_relocatable_executable
)
8199 && (input_section
->flags
& SEC_ALLOC
)
8200 && !(globals
->vxworks_p
8201 && strcmp (input_section
->output_section
->name
,
8203 && ((r_type
!= R_ARM_REL32
&& r_type
!= R_ARM_REL32_NOI
)
8204 || !SYMBOL_CALLS_LOCAL (info
, h
))
8205 && !(input_bfd
== globals
->stub_bfd
8206 && strstr (input_section
->name
, STUB_SUFFIX
))
8208 || ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
8209 || h
->root
.type
!= bfd_link_hash_undefweak
)
8210 && r_type
!= R_ARM_PC24
8211 && r_type
!= R_ARM_CALL
8212 && r_type
!= R_ARM_JUMP24
8213 && r_type
!= R_ARM_PREL31
8214 && r_type
!= R_ARM_PLT32
)
8216 Elf_Internal_Rela outrel
;
8217 bfd_boolean skip
, relocate
;
8219 *unresolved_reloc_p
= FALSE
;
8221 if (sreloc
== NULL
&& globals
->root
.dynamic_sections_created
)
8223 sreloc
= _bfd_elf_get_dynamic_reloc_section (input_bfd
, input_section
,
8224 ! globals
->use_rel
);
8227 return bfd_reloc_notsupported
;
8233 outrel
.r_addend
= addend
;
8235 _bfd_elf_section_offset (output_bfd
, info
, input_section
,
8237 if (outrel
.r_offset
== (bfd_vma
) -1)
8239 else if (outrel
.r_offset
== (bfd_vma
) -2)
8240 skip
= TRUE
, relocate
= TRUE
;
8241 outrel
.r_offset
+= (input_section
->output_section
->vma
8242 + input_section
->output_offset
);
8245 memset (&outrel
, 0, sizeof outrel
);
8250 || !h
->def_regular
))
8251 outrel
.r_info
= ELF32_R_INFO (h
->dynindx
, r_type
);
8256 /* This symbol is local, or marked to become local. */
8257 BFD_ASSERT (r_type
== R_ARM_ABS32
|| r_type
== R_ARM_ABS32_NOI
);
8258 if (globals
->symbian_p
)
8262 /* On Symbian OS, the data segment and text segement
8263 can be relocated independently. Therefore, we
8264 must indicate the segment to which this
8265 relocation is relative. The BPABI allows us to
8266 use any symbol in the right segment; we just use
8267 the section symbol as it is convenient. (We
8268 cannot use the symbol given by "h" directly as it
8269 will not appear in the dynamic symbol table.)
8271 Note that the dynamic linker ignores the section
8272 symbol value, so we don't subtract osec->vma
8273 from the emitted reloc addend. */
8275 osec
= sym_sec
->output_section
;
8277 osec
= input_section
->output_section
;
8278 symbol
= elf_section_data (osec
)->dynindx
;
8281 struct elf_link_hash_table
*htab
= elf_hash_table (info
);
8283 if ((osec
->flags
& SEC_READONLY
) == 0
8284 && htab
->data_index_section
!= NULL
)
8285 osec
= htab
->data_index_section
;
8287 osec
= htab
->text_index_section
;
8288 symbol
= elf_section_data (osec
)->dynindx
;
8290 BFD_ASSERT (symbol
!= 0);
8293 /* On SVR4-ish systems, the dynamic loader cannot
8294 relocate the text and data segments independently,
8295 so the symbol does not matter. */
8297 if (dynreloc_st_type
== STT_GNU_IFUNC
)
8298 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
8299 to the .iplt entry. Instead, every non-call reference
8300 must use an R_ARM_IRELATIVE relocation to obtain the
8301 correct run-time address. */
8302 outrel
.r_info
= ELF32_R_INFO (symbol
, R_ARM_IRELATIVE
);
8304 outrel
.r_info
= ELF32_R_INFO (symbol
, R_ARM_RELATIVE
);
8305 if (globals
->use_rel
)
8308 outrel
.r_addend
+= dynreloc_value
;
8311 elf32_arm_add_dynreloc (output_bfd
, info
, sreloc
, &outrel
);
8313 /* If this reloc is against an external symbol, we do not want to
8314 fiddle with the addend. Otherwise, we need to include the symbol
8315 value so that it becomes an addend for the dynamic reloc. */
8317 return bfd_reloc_ok
;
8319 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
8320 contents
, rel
->r_offset
,
8321 dynreloc_value
, (bfd_vma
) 0);
8323 else switch (r_type
)
8326 return elf32_arm_abs12_reloc (input_bfd
, hit_data
, value
+ addend
);
8328 case R_ARM_XPC25
: /* Arm BLX instruction. */
8331 case R_ARM_PC24
: /* Arm B/BL instruction. */
8334 struct elf32_arm_stub_hash_entry
*stub_entry
= NULL
;
8336 if (r_type
== R_ARM_XPC25
)
8338 /* Check for Arm calling Arm function. */
8339 /* FIXME: Should we translate the instruction into a BL
8340 instruction instead ? */
8341 if (branch_type
!= ST_BRANCH_TO_THUMB
)
8342 (*_bfd_error_handler
)
8343 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
8345 h
? h
->root
.root
.string
: "(local)");
8347 else if (r_type
== R_ARM_PC24
)
8349 /* Check for Arm calling Thumb function. */
8350 if (branch_type
== ST_BRANCH_TO_THUMB
)
8352 if (elf32_arm_to_thumb_stub (info
, sym_name
, input_bfd
,
8353 output_bfd
, input_section
,
8354 hit_data
, sym_sec
, rel
->r_offset
,
8355 signed_addend
, value
,
8357 return bfd_reloc_ok
;
8359 return bfd_reloc_dangerous
;
8363 /* Check if a stub has to be inserted because the
8364 destination is too far or we are changing mode. */
8365 if ( r_type
== R_ARM_CALL
8366 || r_type
== R_ARM_JUMP24
8367 || r_type
== R_ARM_PLT32
)
8369 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
8370 struct elf32_arm_link_hash_entry
*hash
;
8372 hash
= (struct elf32_arm_link_hash_entry
*) h
;
8373 stub_type
= arm_type_of_stub (info
, input_section
, rel
,
8374 st_type
, &branch_type
,
8375 hash
, value
, sym_sec
,
8376 input_bfd
, sym_name
);
8378 if (stub_type
!= arm_stub_none
)
8380 /* The target is out of reach, so redirect the
8381 branch to the local stub for this function. */
8382 stub_entry
= elf32_arm_get_stub_entry (input_section
,
8387 if (stub_entry
!= NULL
)
8388 value
= (stub_entry
->stub_offset
8389 + stub_entry
->stub_sec
->output_offset
8390 + stub_entry
->stub_sec
->output_section
->vma
);
8392 if (plt_offset
!= (bfd_vma
) -1)
8393 *unresolved_reloc_p
= FALSE
;
8398 /* If the call goes through a PLT entry, make sure to
8399 check distance to the right destination address. */
8400 if (plt_offset
!= (bfd_vma
) -1)
8402 value
= (splt
->output_section
->vma
8403 + splt
->output_offset
8405 *unresolved_reloc_p
= FALSE
;
8406 /* The PLT entry is in ARM mode, regardless of the
8408 branch_type
= ST_BRANCH_TO_ARM
;
8413 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
8415 S is the address of the symbol in the relocation.
8416 P is address of the instruction being relocated.
8417 A is the addend (extracted from the instruction) in bytes.
8419 S is held in 'value'.
8420 P is the base address of the section containing the
8421 instruction plus the offset of the reloc into that
8423 (input_section->output_section->vma +
8424 input_section->output_offset +
8426 A is the addend, converted into bytes, ie:
8429 Note: None of these operations have knowledge of the pipeline
8430 size of the processor, thus it is up to the assembler to
8431 encode this information into the addend. */
8432 value
-= (input_section
->output_section
->vma
8433 + input_section
->output_offset
);
8434 value
-= rel
->r_offset
;
8435 if (globals
->use_rel
)
8436 value
+= (signed_addend
<< howto
->size
);
8438 /* RELA addends do not have to be adjusted by howto->size. */
8439 value
+= signed_addend
;
8441 signed_addend
= value
;
8442 signed_addend
>>= howto
->rightshift
;
8444 /* A branch to an undefined weak symbol is turned into a jump to
8445 the next instruction unless a PLT entry will be created.
8446 Do the same for local undefined symbols (but not for STN_UNDEF).
8447 The jump to the next instruction is optimized as a NOP depending
8448 on the architecture. */
8449 if (h
? (h
->root
.type
== bfd_link_hash_undefweak
8450 && plt_offset
== (bfd_vma
) -1)
8451 : r_symndx
!= STN_UNDEF
&& bfd_is_und_section (sym_sec
))
8453 value
= (bfd_get_32 (input_bfd
, hit_data
) & 0xf0000000);
8455 if (arch_has_arm_nop (globals
))
8456 value
|= 0x0320f000;
8458 value
|= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
8462 /* Perform a signed range check. */
8463 if ( signed_addend
> ((bfd_signed_vma
) (howto
->dst_mask
>> 1))
8464 || signed_addend
< - ((bfd_signed_vma
) ((howto
->dst_mask
+ 1) >> 1)))
8465 return bfd_reloc_overflow
;
8467 addend
= (value
& 2);
8469 value
= (signed_addend
& howto
->dst_mask
)
8470 | (bfd_get_32 (input_bfd
, hit_data
) & (~ howto
->dst_mask
));
8472 if (r_type
== R_ARM_CALL
)
8474 /* Set the H bit in the BLX instruction. */
8475 if (branch_type
== ST_BRANCH_TO_THUMB
)
8480 value
&= ~(bfd_vma
)(1 << 24);
8483 /* Select the correct instruction (BL or BLX). */
8484 /* Only if we are not handling a BL to a stub. In this
8485 case, mode switching is performed by the stub. */
8486 if (branch_type
== ST_BRANCH_TO_THUMB
&& !stub_entry
)
8488 else if (stub_entry
|| branch_type
!= ST_BRANCH_UNKNOWN
)
8490 value
&= ~(bfd_vma
)(1 << 28);
8500 if (branch_type
== ST_BRANCH_TO_THUMB
)
8504 case R_ARM_ABS32_NOI
:
8510 if (branch_type
== ST_BRANCH_TO_THUMB
)
8512 value
-= (input_section
->output_section
->vma
8513 + input_section
->output_offset
+ rel
->r_offset
);
8516 case R_ARM_REL32_NOI
:
8518 value
-= (input_section
->output_section
->vma
8519 + input_section
->output_offset
+ rel
->r_offset
);
8523 value
-= (input_section
->output_section
->vma
8524 + input_section
->output_offset
+ rel
->r_offset
);
8525 value
+= signed_addend
;
8526 if (! h
|| h
->root
.type
!= bfd_link_hash_undefweak
)
8528 /* Check for overflow. */
8529 if ((value
^ (value
>> 1)) & (1 << 30))
8530 return bfd_reloc_overflow
;
8532 value
&= 0x7fffffff;
8533 value
|= (bfd_get_32 (input_bfd
, hit_data
) & 0x80000000);
8534 if (branch_type
== ST_BRANCH_TO_THUMB
)
8539 bfd_put_32 (input_bfd
, value
, hit_data
);
8540 return bfd_reloc_ok
;
8545 /* There is no way to tell whether the user intended to use a signed or
8546 unsigned addend. When checking for overflow we accept either,
8547 as specified by the AAELF. */
8548 if ((long) value
> 0xff || (long) value
< -0x80)
8549 return bfd_reloc_overflow
;
8551 bfd_put_8 (input_bfd
, value
, hit_data
);
8552 return bfd_reloc_ok
;
8557 /* See comment for R_ARM_ABS8. */
8558 if ((long) value
> 0xffff || (long) value
< -0x8000)
8559 return bfd_reloc_overflow
;
8561 bfd_put_16 (input_bfd
, value
, hit_data
);
8562 return bfd_reloc_ok
;
8564 case R_ARM_THM_ABS5
:
8565 /* Support ldr and str instructions for the thumb. */
8566 if (globals
->use_rel
)
8568 /* Need to refetch addend. */
8569 addend
= bfd_get_16 (input_bfd
, hit_data
) & howto
->src_mask
;
8570 /* ??? Need to determine shift amount from operand size. */
8571 addend
>>= howto
->rightshift
;
8575 /* ??? Isn't value unsigned? */
8576 if ((long) value
> 0x1f || (long) value
< -0x10)
8577 return bfd_reloc_overflow
;
8579 /* ??? Value needs to be properly shifted into place first. */
8580 value
|= bfd_get_16 (input_bfd
, hit_data
) & 0xf83f;
8581 bfd_put_16 (input_bfd
, value
, hit_data
);
8582 return bfd_reloc_ok
;
8584 case R_ARM_THM_ALU_PREL_11_0
:
8585 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
8588 bfd_signed_vma relocation
;
8590 insn
= (bfd_get_16 (input_bfd
, hit_data
) << 16)
8591 | bfd_get_16 (input_bfd
, hit_data
+ 2);
8593 if (globals
->use_rel
)
8595 signed_addend
= (insn
& 0xff) | ((insn
& 0x7000) >> 4)
8596 | ((insn
& (1 << 26)) >> 15);
8597 if (insn
& 0xf00000)
8598 signed_addend
= -signed_addend
;
8601 relocation
= value
+ signed_addend
;
8602 relocation
-= Pa (input_section
->output_section
->vma
8603 + input_section
->output_offset
8606 value
= abs (relocation
);
8608 if (value
>= 0x1000)
8609 return bfd_reloc_overflow
;
8611 insn
= (insn
& 0xfb0f8f00) | (value
& 0xff)
8612 | ((value
& 0x700) << 4)
8613 | ((value
& 0x800) << 15);
8617 bfd_put_16 (input_bfd
, insn
>> 16, hit_data
);
8618 bfd_put_16 (input_bfd
, insn
& 0xffff, hit_data
+ 2);
8620 return bfd_reloc_ok
;
8624 /* PR 10073: This reloc is not generated by the GNU toolchain,
8625 but it is supported for compatibility with third party libraries
8626 generated by other compilers, specifically the ARM/IAR. */
8629 bfd_signed_vma relocation
;
8631 insn
= bfd_get_16 (input_bfd
, hit_data
);
8633 if (globals
->use_rel
)
8634 addend
= ((((insn
& 0x00ff) << 2) + 4) & 0x3ff) -4;
8636 relocation
= value
+ addend
;
8637 relocation
-= Pa (input_section
->output_section
->vma
8638 + input_section
->output_offset
8641 value
= abs (relocation
);
8643 /* We do not check for overflow of this reloc. Although strictly
8644 speaking this is incorrect, it appears to be necessary in order
8645 to work with IAR generated relocs. Since GCC and GAS do not
8646 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
8647 a problem for them. */
8650 insn
= (insn
& 0xff00) | (value
>> 2);
8652 bfd_put_16 (input_bfd
, insn
, hit_data
);
8654 return bfd_reloc_ok
;
8657 case R_ARM_THM_PC12
:
8658 /* Corresponds to: ldr.w reg, [pc, #offset]. */
8661 bfd_signed_vma relocation
;
8663 insn
= (bfd_get_16 (input_bfd
, hit_data
) << 16)
8664 | bfd_get_16 (input_bfd
, hit_data
+ 2);
8666 if (globals
->use_rel
)
8668 signed_addend
= insn
& 0xfff;
8669 if (!(insn
& (1 << 23)))
8670 signed_addend
= -signed_addend
;
8673 relocation
= value
+ signed_addend
;
8674 relocation
-= Pa (input_section
->output_section
->vma
8675 + input_section
->output_offset
8678 value
= abs (relocation
);
8680 if (value
>= 0x1000)
8681 return bfd_reloc_overflow
;
8683 insn
= (insn
& 0xff7ff000) | value
;
8684 if (relocation
>= 0)
8687 bfd_put_16 (input_bfd
, insn
>> 16, hit_data
);
8688 bfd_put_16 (input_bfd
, insn
& 0xffff, hit_data
+ 2);
8690 return bfd_reloc_ok
;
8693 case R_ARM_THM_XPC22
:
8694 case R_ARM_THM_CALL
:
8695 case R_ARM_THM_JUMP24
:
8696 /* Thumb BL (branch long instruction). */
8700 bfd_boolean overflow
= FALSE
;
8701 bfd_vma upper_insn
= bfd_get_16 (input_bfd
, hit_data
);
8702 bfd_vma lower_insn
= bfd_get_16 (input_bfd
, hit_data
+ 2);
8703 bfd_signed_vma reloc_signed_max
;
8704 bfd_signed_vma reloc_signed_min
;
8706 bfd_signed_vma signed_check
;
8708 const int thumb2
= using_thumb2 (globals
);
8710 /* A branch to an undefined weak symbol is turned into a jump to
8711 the next instruction unless a PLT entry will be created.
8712 The jump to the next instruction is optimized as a NOP.W for
8713 Thumb-2 enabled architectures. */
8714 if (h
&& h
->root
.type
== bfd_link_hash_undefweak
8715 && plt_offset
== (bfd_vma
) -1)
8717 if (arch_has_thumb2_nop (globals
))
8719 bfd_put_16 (input_bfd
, 0xf3af, hit_data
);
8720 bfd_put_16 (input_bfd
, 0x8000, hit_data
+ 2);
8724 bfd_put_16 (input_bfd
, 0xe000, hit_data
);
8725 bfd_put_16 (input_bfd
, 0xbf00, hit_data
+ 2);
8727 return bfd_reloc_ok
;
8730 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
8731 with Thumb-1) involving the J1 and J2 bits. */
8732 if (globals
->use_rel
)
8734 bfd_vma s
= (upper_insn
& (1 << 10)) >> 10;
8735 bfd_vma upper
= upper_insn
& 0x3ff;
8736 bfd_vma lower
= lower_insn
& 0x7ff;
8737 bfd_vma j1
= (lower_insn
& (1 << 13)) >> 13;
8738 bfd_vma j2
= (lower_insn
& (1 << 11)) >> 11;
8739 bfd_vma i1
= j1
^ s
? 0 : 1;
8740 bfd_vma i2
= j2
^ s
? 0 : 1;
8742 addend
= (i1
<< 23) | (i2
<< 22) | (upper
<< 12) | (lower
<< 1);
8744 addend
= (addend
| ((s
? 0 : 1) << 24)) - (1 << 24);
8746 signed_addend
= addend
;
8749 if (r_type
== R_ARM_THM_XPC22
)
8751 /* Check for Thumb to Thumb call. */
8752 /* FIXME: Should we translate the instruction into a BL
8753 instruction instead ? */
8754 if (branch_type
== ST_BRANCH_TO_THUMB
)
8755 (*_bfd_error_handler
)
8756 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
8758 h
? h
->root
.root
.string
: "(local)");
8762 /* If it is not a call to Thumb, assume call to Arm.
8763 If it is a call relative to a section name, then it is not a
8764 function call at all, but rather a long jump. Calls through
8765 the PLT do not require stubs. */
8766 if (branch_type
== ST_BRANCH_TO_ARM
&& plt_offset
== (bfd_vma
) -1)
8768 if (globals
->use_blx
&& r_type
== R_ARM_THM_CALL
)
8770 /* Convert BL to BLX. */
8771 lower_insn
= (lower_insn
& ~0x1000) | 0x0800;
8773 else if (( r_type
!= R_ARM_THM_CALL
)
8774 && (r_type
!= R_ARM_THM_JUMP24
))
8776 if (elf32_thumb_to_arm_stub
8777 (info
, sym_name
, input_bfd
, output_bfd
, input_section
,
8778 hit_data
, sym_sec
, rel
->r_offset
, signed_addend
, value
,
8780 return bfd_reloc_ok
;
8782 return bfd_reloc_dangerous
;
8785 else if (branch_type
== ST_BRANCH_TO_THUMB
8787 && r_type
== R_ARM_THM_CALL
)
8789 /* Make sure this is a BL. */
8790 lower_insn
|= 0x1800;
8794 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
8795 if (r_type
== R_ARM_THM_CALL
|| r_type
== R_ARM_THM_JUMP24
)
8797 /* Check if a stub has to be inserted because the destination
8799 struct elf32_arm_stub_hash_entry
*stub_entry
;
8800 struct elf32_arm_link_hash_entry
*hash
;
8802 hash
= (struct elf32_arm_link_hash_entry
*) h
;
8804 stub_type
= arm_type_of_stub (info
, input_section
, rel
,
8805 st_type
, &branch_type
,
8806 hash
, value
, sym_sec
,
8807 input_bfd
, sym_name
);
8809 if (stub_type
!= arm_stub_none
)
8811 /* The target is out of reach or we are changing modes, so
8812 redirect the branch to the local stub for this
8814 stub_entry
= elf32_arm_get_stub_entry (input_section
,
8818 if (stub_entry
!= NULL
)
8820 value
= (stub_entry
->stub_offset
8821 + stub_entry
->stub_sec
->output_offset
8822 + stub_entry
->stub_sec
->output_section
->vma
);
8824 if (plt_offset
!= (bfd_vma
) -1)
8825 *unresolved_reloc_p
= FALSE
;
8828 /* If this call becomes a call to Arm, force BLX. */
8829 if (globals
->use_blx
&& (r_type
== R_ARM_THM_CALL
))
8832 && !arm_stub_is_thumb (stub_entry
->stub_type
))
8833 || branch_type
!= ST_BRANCH_TO_THUMB
)
8834 lower_insn
= (lower_insn
& ~0x1000) | 0x0800;
8839 /* Handle calls via the PLT. */
8840 if (stub_type
== arm_stub_none
&& plt_offset
!= (bfd_vma
) -1)
8842 value
= (splt
->output_section
->vma
8843 + splt
->output_offset
8846 if (globals
->use_blx
&& r_type
== R_ARM_THM_CALL
)
8848 /* If the Thumb BLX instruction is available, convert
8849 the BL to a BLX instruction to call the ARM-mode
8851 lower_insn
= (lower_insn
& ~0x1000) | 0x0800;
8852 branch_type
= ST_BRANCH_TO_ARM
;
8856 /* Target the Thumb stub before the ARM PLT entry. */
8857 value
-= PLT_THUMB_STUB_SIZE
;
8858 branch_type
= ST_BRANCH_TO_THUMB
;
8860 *unresolved_reloc_p
= FALSE
;
8863 relocation
= value
+ signed_addend
;
8865 relocation
-= (input_section
->output_section
->vma
8866 + input_section
->output_offset
8869 check
= relocation
>> howto
->rightshift
;
8871 /* If this is a signed value, the rightshift just dropped
8872 leading 1 bits (assuming twos complement). */
8873 if ((bfd_signed_vma
) relocation
>= 0)
8874 signed_check
= check
;
8876 signed_check
= check
| ~((bfd_vma
) -1 >> howto
->rightshift
);
8878 /* Calculate the permissable maximum and minimum values for
8879 this relocation according to whether we're relocating for
8881 bitsize
= howto
->bitsize
;
8884 reloc_signed_max
= (1 << (bitsize
- 1)) - 1;
8885 reloc_signed_min
= ~reloc_signed_max
;
8887 /* Assumes two's complement. */
8888 if (signed_check
> reloc_signed_max
|| signed_check
< reloc_signed_min
)
8891 if ((lower_insn
& 0x5000) == 0x4000)
8892 /* For a BLX instruction, make sure that the relocation is rounded up
8893 to a word boundary. This follows the semantics of the instruction
8894 which specifies that bit 1 of the target address will come from bit
8895 1 of the base address. */
8896 relocation
= (relocation
+ 2) & ~ 3;
8898 /* Put RELOCATION back into the insn. Assumes two's complement.
8899 We use the Thumb-2 encoding, which is safe even if dealing with
8900 a Thumb-1 instruction by virtue of our overflow check above. */
8901 reloc_sign
= (signed_check
< 0) ? 1 : 0;
8902 upper_insn
= (upper_insn
& ~(bfd_vma
) 0x7ff)
8903 | ((relocation
>> 12) & 0x3ff)
8904 | (reloc_sign
<< 10);
8905 lower_insn
= (lower_insn
& ~(bfd_vma
) 0x2fff)
8906 | (((!((relocation
>> 23) & 1)) ^ reloc_sign
) << 13)
8907 | (((!((relocation
>> 22) & 1)) ^ reloc_sign
) << 11)
8908 | ((relocation
>> 1) & 0x7ff);
8910 /* Put the relocated value back in the object file: */
8911 bfd_put_16 (input_bfd
, upper_insn
, hit_data
);
8912 bfd_put_16 (input_bfd
, lower_insn
, hit_data
+ 2);
8914 return (overflow
? bfd_reloc_overflow
: bfd_reloc_ok
);
8918 case R_ARM_THM_JUMP19
:
8919 /* Thumb32 conditional branch instruction. */
8922 bfd_boolean overflow
= FALSE
;
8923 bfd_vma upper_insn
= bfd_get_16 (input_bfd
, hit_data
);
8924 bfd_vma lower_insn
= bfd_get_16 (input_bfd
, hit_data
+ 2);
8925 bfd_signed_vma reloc_signed_max
= 0xffffe;
8926 bfd_signed_vma reloc_signed_min
= -0x100000;
8927 bfd_signed_vma signed_check
;
8929 /* Need to refetch the addend, reconstruct the top three bits,
8930 and squish the two 11 bit pieces together. */
8931 if (globals
->use_rel
)
8933 bfd_vma S
= (upper_insn
& 0x0400) >> 10;
8934 bfd_vma upper
= (upper_insn
& 0x003f);
8935 bfd_vma J1
= (lower_insn
& 0x2000) >> 13;
8936 bfd_vma J2
= (lower_insn
& 0x0800) >> 11;
8937 bfd_vma lower
= (lower_insn
& 0x07ff);
8942 upper
-= 0x0100; /* Sign extend. */
8944 addend
= (upper
<< 12) | (lower
<< 1);
8945 signed_addend
= addend
;
8948 /* Handle calls via the PLT. */
8949 if (plt_offset
!= (bfd_vma
) -1)
8951 value
= (splt
->output_section
->vma
8952 + splt
->output_offset
8954 /* Target the Thumb stub before the ARM PLT entry. */
8955 value
-= PLT_THUMB_STUB_SIZE
;
8956 *unresolved_reloc_p
= FALSE
;
8959 /* ??? Should handle interworking? GCC might someday try to
8960 use this for tail calls. */
8962 relocation
= value
+ signed_addend
;
8963 relocation
-= (input_section
->output_section
->vma
8964 + input_section
->output_offset
8966 signed_check
= (bfd_signed_vma
) relocation
;
8968 if (signed_check
> reloc_signed_max
|| signed_check
< reloc_signed_min
)
8971 /* Put RELOCATION back into the insn. */
8973 bfd_vma S
= (relocation
& 0x00100000) >> 20;
8974 bfd_vma J2
= (relocation
& 0x00080000) >> 19;
8975 bfd_vma J1
= (relocation
& 0x00040000) >> 18;
8976 bfd_vma hi
= (relocation
& 0x0003f000) >> 12;
8977 bfd_vma lo
= (relocation
& 0x00000ffe) >> 1;
8979 upper_insn
= (upper_insn
& 0xfbc0) | (S
<< 10) | hi
;
8980 lower_insn
= (lower_insn
& 0xd000) | (J1
<< 13) | (J2
<< 11) | lo
;
8983 /* Put the relocated value back in the object file: */
8984 bfd_put_16 (input_bfd
, upper_insn
, hit_data
);
8985 bfd_put_16 (input_bfd
, lower_insn
, hit_data
+ 2);
8987 return (overflow
? bfd_reloc_overflow
: bfd_reloc_ok
);
8990 case R_ARM_THM_JUMP11
:
8991 case R_ARM_THM_JUMP8
:
8992 case R_ARM_THM_JUMP6
:
8993 /* Thumb B (branch) instruction). */
8995 bfd_signed_vma relocation
;
8996 bfd_signed_vma reloc_signed_max
= (1 << (howto
->bitsize
- 1)) - 1;
8997 bfd_signed_vma reloc_signed_min
= ~ reloc_signed_max
;
8998 bfd_signed_vma signed_check
;
9000 /* CZB cannot jump backward. */
9001 if (r_type
== R_ARM_THM_JUMP6
)
9002 reloc_signed_min
= 0;
9004 if (globals
->use_rel
)
9006 /* Need to refetch addend. */
9007 addend
= bfd_get_16 (input_bfd
, hit_data
) & howto
->src_mask
;
9008 if (addend
& ((howto
->src_mask
+ 1) >> 1))
9011 signed_addend
&= ~ howto
->src_mask
;
9012 signed_addend
|= addend
;
9015 signed_addend
= addend
;
9016 /* The value in the insn has been right shifted. We need to
9017 undo this, so that we can perform the address calculation
9018 in terms of bytes. */
9019 signed_addend
<<= howto
->rightshift
;
9021 relocation
= value
+ signed_addend
;
9023 relocation
-= (input_section
->output_section
->vma
9024 + input_section
->output_offset
9027 relocation
>>= howto
->rightshift
;
9028 signed_check
= relocation
;
9030 if (r_type
== R_ARM_THM_JUMP6
)
9031 relocation
= ((relocation
& 0x0020) << 4) | ((relocation
& 0x001f) << 3);
9033 relocation
&= howto
->dst_mask
;
9034 relocation
|= (bfd_get_16 (input_bfd
, hit_data
) & (~ howto
->dst_mask
));
9036 bfd_put_16 (input_bfd
, relocation
, hit_data
);
9038 /* Assumes two's complement. */
9039 if (signed_check
> reloc_signed_max
|| signed_check
< reloc_signed_min
)
9040 return bfd_reloc_overflow
;
9042 return bfd_reloc_ok
;
9045 case R_ARM_ALU_PCREL7_0
:
9046 case R_ARM_ALU_PCREL15_8
:
9047 case R_ARM_ALU_PCREL23_15
:
9052 insn
= bfd_get_32 (input_bfd
, hit_data
);
9053 if (globals
->use_rel
)
9055 /* Extract the addend. */
9056 addend
= (insn
& 0xff) << ((insn
& 0xf00) >> 7);
9057 signed_addend
= addend
;
9059 relocation
= value
+ signed_addend
;
9061 relocation
-= (input_section
->output_section
->vma
9062 + input_section
->output_offset
9064 insn
= (insn
& ~0xfff)
9065 | ((howto
->bitpos
<< 7) & 0xf00)
9066 | ((relocation
>> howto
->bitpos
) & 0xff);
9067 bfd_put_32 (input_bfd
, value
, hit_data
);
9069 return bfd_reloc_ok
;
9071 case R_ARM_GNU_VTINHERIT
:
9072 case R_ARM_GNU_VTENTRY
:
9073 return bfd_reloc_ok
;
9075 case R_ARM_GOTOFF32
:
9076 /* Relocation is relative to the start of the
9077 global offset table. */
9079 BFD_ASSERT (sgot
!= NULL
);
9081 return bfd_reloc_notsupported
;
9083 /* If we are addressing a Thumb function, we need to adjust the
9084 address by one, so that attempts to call the function pointer will
9085 correctly interpret it as Thumb code. */
9086 if (branch_type
== ST_BRANCH_TO_THUMB
)
9089 /* Note that sgot->output_offset is not involved in this
9090 calculation. We always want the start of .got. If we
9091 define _GLOBAL_OFFSET_TABLE in a different way, as is
9092 permitted by the ABI, we might have to change this
9094 value
-= sgot
->output_section
->vma
;
9095 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
9096 contents
, rel
->r_offset
, value
,
9100 /* Use global offset table as symbol value. */
9101 BFD_ASSERT (sgot
!= NULL
);
9104 return bfd_reloc_notsupported
;
9106 *unresolved_reloc_p
= FALSE
;
9107 value
= sgot
->output_section
->vma
;
9108 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
9109 contents
, rel
->r_offset
, value
,
9113 case R_ARM_GOT_PREL
:
9114 /* Relocation is to the entry for this symbol in the
9115 global offset table. */
9117 return bfd_reloc_notsupported
;
9119 if (dynreloc_st_type
== STT_GNU_IFUNC
9120 && plt_offset
!= (bfd_vma
) -1
9121 && (h
== NULL
|| SYMBOL_REFERENCES_LOCAL (info
, h
)))
9123 /* We have a relocation against a locally-binding STT_GNU_IFUNC
9124 symbol, and the relocation resolves directly to the runtime
9125 target rather than to the .iplt entry. This means that any
9126 .got entry would be the same value as the .igot.plt entry,
9127 so there's no point creating both. */
9128 sgot
= globals
->root
.igotplt
;
9129 value
= sgot
->output_offset
+ gotplt_offset
;
9135 off
= h
->got
.offset
;
9136 BFD_ASSERT (off
!= (bfd_vma
) -1);
9139 /* We have already processsed one GOT relocation against
9142 if (globals
->root
.dynamic_sections_created
9143 && !SYMBOL_REFERENCES_LOCAL (info
, h
))
9144 *unresolved_reloc_p
= FALSE
;
9148 Elf_Internal_Rela outrel
;
9150 if (h
->dynindx
!= -1 && !SYMBOL_REFERENCES_LOCAL (info
, h
))
9152 /* If the symbol doesn't resolve locally in a static
9153 object, we have an undefined reference. If the
9154 symbol doesn't resolve locally in a dynamic object,
9155 it should be resolved by the dynamic linker. */
9156 if (globals
->root
.dynamic_sections_created
)
9158 outrel
.r_info
= ELF32_R_INFO (h
->dynindx
, R_ARM_GLOB_DAT
);
9159 *unresolved_reloc_p
= FALSE
;
9163 outrel
.r_addend
= 0;
9167 if (dynreloc_st_type
== STT_GNU_IFUNC
)
9168 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_IRELATIVE
);
9169 else if (info
->shared
&&
9170 (ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
9171 || h
->root
.type
!= bfd_link_hash_undefweak
))
9172 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_RELATIVE
);
9175 outrel
.r_addend
= dynreloc_value
;
9178 /* The GOT entry is initialized to zero by default.
9179 See if we should install a different value. */
9180 if (outrel
.r_addend
!= 0
9181 && (outrel
.r_info
== 0 || globals
->use_rel
))
9183 bfd_put_32 (output_bfd
, outrel
.r_addend
,
9184 sgot
->contents
+ off
);
9185 outrel
.r_addend
= 0;
9188 if (outrel
.r_info
!= 0)
9190 outrel
.r_offset
= (sgot
->output_section
->vma
9191 + sgot
->output_offset
9193 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
9197 value
= sgot
->output_offset
+ off
;
9203 BFD_ASSERT (local_got_offsets
!= NULL
&&
9204 local_got_offsets
[r_symndx
] != (bfd_vma
) -1);
9206 off
= local_got_offsets
[r_symndx
];
9208 /* The offset must always be a multiple of 4. We use the
9209 least significant bit to record whether we have already
9210 generated the necessary reloc. */
9215 if (globals
->use_rel
)
9216 bfd_put_32 (output_bfd
, dynreloc_value
, sgot
->contents
+ off
);
9218 if (info
->shared
|| dynreloc_st_type
== STT_GNU_IFUNC
)
9220 Elf_Internal_Rela outrel
;
9222 outrel
.r_addend
= addend
+ dynreloc_value
;
9223 outrel
.r_offset
= (sgot
->output_section
->vma
9224 + sgot
->output_offset
9226 if (dynreloc_st_type
== STT_GNU_IFUNC
)
9227 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_IRELATIVE
);
9229 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_RELATIVE
);
9230 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
9233 local_got_offsets
[r_symndx
] |= 1;
9236 value
= sgot
->output_offset
+ off
;
9238 if (r_type
!= R_ARM_GOT32
)
9239 value
+= sgot
->output_section
->vma
;
9241 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
9242 contents
, rel
->r_offset
, value
,
9245 case R_ARM_TLS_LDO32
:
9246 value
= value
- dtpoff_base (info
);
9248 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
9249 contents
, rel
->r_offset
, value
,
9252 case R_ARM_TLS_LDM32
:
9259 off
= globals
->tls_ldm_got
.offset
;
9265 /* If we don't know the module number, create a relocation
9269 Elf_Internal_Rela outrel
;
9271 if (srelgot
== NULL
)
9274 outrel
.r_addend
= 0;
9275 outrel
.r_offset
= (sgot
->output_section
->vma
9276 + sgot
->output_offset
+ off
);
9277 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32
);
9279 if (globals
->use_rel
)
9280 bfd_put_32 (output_bfd
, outrel
.r_addend
,
9281 sgot
->contents
+ off
);
9283 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
9286 bfd_put_32 (output_bfd
, 1, sgot
->contents
+ off
);
9288 globals
->tls_ldm_got
.offset
|= 1;
9291 value
= sgot
->output_section
->vma
+ sgot
->output_offset
+ off
9292 - (input_section
->output_section
->vma
+ input_section
->output_offset
+ rel
->r_offset
);
9294 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
9295 contents
, rel
->r_offset
, value
,
9299 case R_ARM_TLS_CALL
:
9300 case R_ARM_THM_TLS_CALL
:
9301 case R_ARM_TLS_GD32
:
9302 case R_ARM_TLS_IE32
:
9303 case R_ARM_TLS_GOTDESC
:
9304 case R_ARM_TLS_DESCSEQ
:
9305 case R_ARM_THM_TLS_DESCSEQ
:
9307 bfd_vma off
, offplt
;
9311 BFD_ASSERT (sgot
!= NULL
);
9316 dyn
= globals
->root
.dynamic_sections_created
;
9317 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn
, info
->shared
, h
)
9319 || !SYMBOL_REFERENCES_LOCAL (info
, h
)))
9321 *unresolved_reloc_p
= FALSE
;
9324 off
= h
->got
.offset
;
9325 offplt
= elf32_arm_hash_entry (h
)->tlsdesc_got
;
9326 tls_type
= ((struct elf32_arm_link_hash_entry
*) h
)->tls_type
;
9330 BFD_ASSERT (local_got_offsets
!= NULL
);
9331 off
= local_got_offsets
[r_symndx
];
9332 offplt
= local_tlsdesc_gotents
[r_symndx
];
9333 tls_type
= elf32_arm_local_got_tls_type (input_bfd
)[r_symndx
];
9336 /* Linker relaxations happens from one of the
9337 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
9338 if (ELF32_R_TYPE(rel
->r_info
) != r_type
)
9339 tls_type
= GOT_TLS_IE
;
9341 BFD_ASSERT (tls_type
!= GOT_UNKNOWN
);
9347 bfd_boolean need_relocs
= FALSE
;
9348 Elf_Internal_Rela outrel
;
9351 /* The GOT entries have not been initialized yet. Do it
9352 now, and emit any relocations. If both an IE GOT and a
9353 GD GOT are necessary, we emit the GD first. */
9355 if ((info
->shared
|| indx
!= 0)
9357 || ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
9358 || h
->root
.type
!= bfd_link_hash_undefweak
))
9361 BFD_ASSERT (srelgot
!= NULL
);
9364 if (tls_type
& GOT_TLS_GDESC
)
9368 /* We should have relaxed, unless this is an undefined
9370 BFD_ASSERT ((h
&& (h
->root
.type
== bfd_link_hash_undefweak
))
9372 BFD_ASSERT (globals
->sgotplt_jump_table_size
+ offplt
+ 8
9373 <= globals
->root
.sgotplt
->size
);
9375 outrel
.r_addend
= 0;
9376 outrel
.r_offset
= (globals
->root
.sgotplt
->output_section
->vma
9377 + globals
->root
.sgotplt
->output_offset
9379 + globals
->sgotplt_jump_table_size
);
9381 outrel
.r_info
= ELF32_R_INFO (indx
, R_ARM_TLS_DESC
);
9382 sreloc
= globals
->root
.srelplt
;
9383 loc
= sreloc
->contents
;
9384 loc
+= globals
->next_tls_desc_index
++ * RELOC_SIZE (globals
);
9385 BFD_ASSERT (loc
+ RELOC_SIZE (globals
)
9386 <= sreloc
->contents
+ sreloc
->size
);
9388 SWAP_RELOC_OUT (globals
) (output_bfd
, &outrel
, loc
);
9390 /* For globals, the first word in the relocation gets
9391 the relocation index and the top bit set, or zero,
9392 if we're binding now. For locals, it gets the
9393 symbol's offset in the tls section. */
9394 bfd_put_32 (output_bfd
,
9395 !h
? value
- elf_hash_table (info
)->tls_sec
->vma
9396 : info
->flags
& DF_BIND_NOW
? 0
9397 : 0x80000000 | ELF32_R_SYM (outrel
.r_info
),
9398 globals
->root
.sgotplt
->contents
+ offplt
9399 + globals
->sgotplt_jump_table_size
);
9401 /* Second word in the relocation is always zero. */
9402 bfd_put_32 (output_bfd
, 0,
9403 globals
->root
.sgotplt
->contents
+ offplt
9404 + globals
->sgotplt_jump_table_size
+ 4);
9406 if (tls_type
& GOT_TLS_GD
)
9410 outrel
.r_addend
= 0;
9411 outrel
.r_offset
= (sgot
->output_section
->vma
9412 + sgot
->output_offset
9414 outrel
.r_info
= ELF32_R_INFO (indx
, R_ARM_TLS_DTPMOD32
);
9416 if (globals
->use_rel
)
9417 bfd_put_32 (output_bfd
, outrel
.r_addend
,
9418 sgot
->contents
+ cur_off
);
9420 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
9423 bfd_put_32 (output_bfd
, value
- dtpoff_base (info
),
9424 sgot
->contents
+ cur_off
+ 4);
9427 outrel
.r_addend
= 0;
9428 outrel
.r_info
= ELF32_R_INFO (indx
,
9429 R_ARM_TLS_DTPOFF32
);
9430 outrel
.r_offset
+= 4;
9432 if (globals
->use_rel
)
9433 bfd_put_32 (output_bfd
, outrel
.r_addend
,
9434 sgot
->contents
+ cur_off
+ 4);
9436 elf32_arm_add_dynreloc (output_bfd
, info
,
9442 /* If we are not emitting relocations for a
9443 general dynamic reference, then we must be in a
9444 static link or an executable link with the
9445 symbol binding locally. Mark it as belonging
9446 to module 1, the executable. */
9447 bfd_put_32 (output_bfd
, 1,
9448 sgot
->contents
+ cur_off
);
9449 bfd_put_32 (output_bfd
, value
- dtpoff_base (info
),
9450 sgot
->contents
+ cur_off
+ 4);
9456 if (tls_type
& GOT_TLS_IE
)
9461 outrel
.r_addend
= value
- dtpoff_base (info
);
9463 outrel
.r_addend
= 0;
9464 outrel
.r_offset
= (sgot
->output_section
->vma
9465 + sgot
->output_offset
9467 outrel
.r_info
= ELF32_R_INFO (indx
, R_ARM_TLS_TPOFF32
);
9469 if (globals
->use_rel
)
9470 bfd_put_32 (output_bfd
, outrel
.r_addend
,
9471 sgot
->contents
+ cur_off
);
9473 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
9476 bfd_put_32 (output_bfd
, tpoff (info
, value
),
9477 sgot
->contents
+ cur_off
);
9484 local_got_offsets
[r_symndx
] |= 1;
9487 if ((tls_type
& GOT_TLS_GD
) && r_type
!= R_ARM_TLS_GD32
)
9489 else if (tls_type
& GOT_TLS_GDESC
)
9492 if (ELF32_R_TYPE(rel
->r_info
) == R_ARM_TLS_CALL
9493 || ELF32_R_TYPE(rel
->r_info
) == R_ARM_THM_TLS_CALL
)
9495 bfd_signed_vma offset
;
9496 /* TLS stubs are arm mode. The original symbol is a
9497 data object, so branch_type is bogus. */
9498 branch_type
= ST_BRANCH_TO_ARM
;
9499 enum elf32_arm_stub_type stub_type
9500 = arm_type_of_stub (info
, input_section
, rel
,
9501 st_type
, &branch_type
,
9502 (struct elf32_arm_link_hash_entry
*)h
,
9503 globals
->tls_trampoline
, globals
->root
.splt
,
9504 input_bfd
, sym_name
);
9506 if (stub_type
!= arm_stub_none
)
9508 struct elf32_arm_stub_hash_entry
*stub_entry
9509 = elf32_arm_get_stub_entry
9510 (input_section
, globals
->root
.splt
, 0, rel
,
9511 globals
, stub_type
);
9512 offset
= (stub_entry
->stub_offset
9513 + stub_entry
->stub_sec
->output_offset
9514 + stub_entry
->stub_sec
->output_section
->vma
);
9517 offset
= (globals
->root
.splt
->output_section
->vma
9518 + globals
->root
.splt
->output_offset
9519 + globals
->tls_trampoline
);
9521 if (ELF32_R_TYPE(rel
->r_info
) == R_ARM_TLS_CALL
)
9525 offset
-= (input_section
->output_section
->vma
9526 + input_section
->output_offset
9527 + rel
->r_offset
+ 8);
9531 value
= inst
| (globals
->use_blx
? 0xfa000000 : 0xeb000000);
9535 /* Thumb blx encodes the offset in a complicated
9537 unsigned upper_insn
, lower_insn
;
9540 offset
-= (input_section
->output_section
->vma
9541 + input_section
->output_offset
9542 + rel
->r_offset
+ 4);
9544 if (stub_type
!= arm_stub_none
9545 && arm_stub_is_thumb (stub_type
))
9547 lower_insn
= 0xd000;
9551 lower_insn
= 0xc000;
9552 /* Round up the offset to a word boundary */
9553 offset
= (offset
+ 2) & ~2;
9557 upper_insn
= (0xf000
9558 | ((offset
>> 12) & 0x3ff)
9560 lower_insn
|= (((!((offset
>> 23) & 1)) ^ neg
) << 13)
9561 | (((!((offset
>> 22) & 1)) ^ neg
) << 11)
9562 | ((offset
>> 1) & 0x7ff);
9563 bfd_put_16 (input_bfd
, upper_insn
, hit_data
);
9564 bfd_put_16 (input_bfd
, lower_insn
, hit_data
+ 2);
9565 return bfd_reloc_ok
;
9568 /* These relocations needs special care, as besides the fact
9569 they point somewhere in .gotplt, the addend must be
9570 adjusted accordingly depending on the type of instruction
9572 else if ((r_type
== R_ARM_TLS_GOTDESC
) && (tls_type
& GOT_TLS_GDESC
))
9574 unsigned long data
, insn
;
9577 data
= bfd_get_32 (input_bfd
, hit_data
);
9583 insn
= bfd_get_16 (input_bfd
, contents
+ rel
->r_offset
- data
);
9584 if ((insn
& 0xf000) == 0xf000 || (insn
& 0xf800) == 0xe800)
9586 | bfd_get_16 (input_bfd
,
9587 contents
+ rel
->r_offset
- data
+ 2);
9588 if ((insn
& 0xf800c000) == 0xf000c000)
9591 else if ((insn
& 0xffffff00) == 0x4400)
9596 (*_bfd_error_handler
)
9597 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"),
9598 input_bfd
, input_section
,
9599 (unsigned long)rel
->r_offset
, insn
);
9600 return bfd_reloc_notsupported
;
9605 insn
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
- data
);
9610 case 0xfa: /* blx */
9614 case 0xe0: /* add */
9619 (*_bfd_error_handler
)
9620 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
9621 input_bfd
, input_section
,
9622 (unsigned long)rel
->r_offset
, insn
);
9623 return bfd_reloc_notsupported
;
9627 value
+= ((globals
->root
.sgotplt
->output_section
->vma
9628 + globals
->root
.sgotplt
->output_offset
+ off
)
9629 - (input_section
->output_section
->vma
9630 + input_section
->output_offset
9632 + globals
->sgotplt_jump_table_size
);
9635 value
= ((globals
->root
.sgot
->output_section
->vma
9636 + globals
->root
.sgot
->output_offset
+ off
)
9637 - (input_section
->output_section
->vma
9638 + input_section
->output_offset
+ rel
->r_offset
));
9640 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
9641 contents
, rel
->r_offset
, value
,
9645 case R_ARM_TLS_LE32
:
9646 if (info
->shared
&& !info
->pie
)
9648 (*_bfd_error_handler
)
9649 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
9650 input_bfd
, input_section
,
9651 (long) rel
->r_offset
, howto
->name
);
9652 return bfd_reloc_notsupported
;
9655 value
= tpoff (info
, value
);
9657 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
9658 contents
, rel
->r_offset
, value
,
9662 if (globals
->fix_v4bx
)
9664 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
9666 /* Ensure that we have a BX instruction. */
9667 BFD_ASSERT ((insn
& 0x0ffffff0) == 0x012fff10);
9669 if (globals
->fix_v4bx
== 2 && (insn
& 0xf) != 0xf)
9671 /* Branch to veneer. */
9673 glue_addr
= elf32_arm_bx_glue (info
, insn
& 0xf);
9674 glue_addr
-= input_section
->output_section
->vma
9675 + input_section
->output_offset
9676 + rel
->r_offset
+ 8;
9677 insn
= (insn
& 0xf0000000) | 0x0a000000
9678 | ((glue_addr
>> 2) & 0x00ffffff);
9682 /* Preserve Rm (lowest four bits) and the condition code
9683 (highest four bits). Other bits encode MOV PC,Rm. */
9684 insn
= (insn
& 0xf000000f) | 0x01a0f000;
9687 bfd_put_32 (input_bfd
, insn
, hit_data
);
9689 return bfd_reloc_ok
;
9691 case R_ARM_MOVW_ABS_NC
:
9692 case R_ARM_MOVT_ABS
:
9693 case R_ARM_MOVW_PREL_NC
:
9694 case R_ARM_MOVT_PREL
:
9695 /* Until we properly support segment-base-relative addressing then
9696 we assume the segment base to be zero, as for the group relocations.
9697 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
9698 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
9699 case R_ARM_MOVW_BREL_NC
:
9700 case R_ARM_MOVW_BREL
:
9701 case R_ARM_MOVT_BREL
:
9703 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
9705 if (globals
->use_rel
)
9707 addend
= ((insn
>> 4) & 0xf000) | (insn
& 0xfff);
9708 signed_addend
= (addend
^ 0x8000) - 0x8000;
9711 value
+= signed_addend
;
9713 if (r_type
== R_ARM_MOVW_PREL_NC
|| r_type
== R_ARM_MOVT_PREL
)
9714 value
-= (input_section
->output_section
->vma
9715 + input_section
->output_offset
+ rel
->r_offset
);
9717 if (r_type
== R_ARM_MOVW_BREL
&& value
>= 0x10000)
9718 return bfd_reloc_overflow
;
9720 if (branch_type
== ST_BRANCH_TO_THUMB
)
9723 if (r_type
== R_ARM_MOVT_ABS
|| r_type
== R_ARM_MOVT_PREL
9724 || r_type
== R_ARM_MOVT_BREL
)
9728 insn
|= value
& 0xfff;
9729 insn
|= (value
& 0xf000) << 4;
9730 bfd_put_32 (input_bfd
, insn
, hit_data
);
9732 return bfd_reloc_ok
;
9734 case R_ARM_THM_MOVW_ABS_NC
:
9735 case R_ARM_THM_MOVT_ABS
:
9736 case R_ARM_THM_MOVW_PREL_NC
:
9737 case R_ARM_THM_MOVT_PREL
:
9738 /* Until we properly support segment-base-relative addressing then
9739 we assume the segment base to be zero, as for the above relocations.
9740 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
9741 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
9742 as R_ARM_THM_MOVT_ABS. */
9743 case R_ARM_THM_MOVW_BREL_NC
:
9744 case R_ARM_THM_MOVW_BREL
:
9745 case R_ARM_THM_MOVT_BREL
:
9749 insn
= bfd_get_16 (input_bfd
, hit_data
) << 16;
9750 insn
|= bfd_get_16 (input_bfd
, hit_data
+ 2);
9752 if (globals
->use_rel
)
9754 addend
= ((insn
>> 4) & 0xf000)
9755 | ((insn
>> 15) & 0x0800)
9756 | ((insn
>> 4) & 0x0700)
9758 signed_addend
= (addend
^ 0x8000) - 0x8000;
9761 value
+= signed_addend
;
9763 if (r_type
== R_ARM_THM_MOVW_PREL_NC
|| r_type
== R_ARM_THM_MOVT_PREL
)
9764 value
-= (input_section
->output_section
->vma
9765 + input_section
->output_offset
+ rel
->r_offset
);
9767 if (r_type
== R_ARM_THM_MOVW_BREL
&& value
>= 0x10000)
9768 return bfd_reloc_overflow
;
9770 if (branch_type
== ST_BRANCH_TO_THUMB
)
9773 if (r_type
== R_ARM_THM_MOVT_ABS
|| r_type
== R_ARM_THM_MOVT_PREL
9774 || r_type
== R_ARM_THM_MOVT_BREL
)
9778 insn
|= (value
& 0xf000) << 4;
9779 insn
|= (value
& 0x0800) << 15;
9780 insn
|= (value
& 0x0700) << 4;
9781 insn
|= (value
& 0x00ff);
9783 bfd_put_16 (input_bfd
, insn
>> 16, hit_data
);
9784 bfd_put_16 (input_bfd
, insn
& 0xffff, hit_data
+ 2);
9786 return bfd_reloc_ok
;
9788 case R_ARM_ALU_PC_G0_NC
:
9789 case R_ARM_ALU_PC_G1_NC
:
9790 case R_ARM_ALU_PC_G0
:
9791 case R_ARM_ALU_PC_G1
:
9792 case R_ARM_ALU_PC_G2
:
9793 case R_ARM_ALU_SB_G0_NC
:
9794 case R_ARM_ALU_SB_G1_NC
:
9795 case R_ARM_ALU_SB_G0
:
9796 case R_ARM_ALU_SB_G1
:
9797 case R_ARM_ALU_SB_G2
:
9799 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
9800 bfd_vma pc
= input_section
->output_section
->vma
9801 + input_section
->output_offset
+ rel
->r_offset
;
9802 /* sb should be the origin of the *segment* containing the symbol.
9803 It is not clear how to obtain this OS-dependent value, so we
9804 make an arbitrary choice of zero. */
9808 bfd_signed_vma signed_value
;
9811 /* Determine which group of bits to select. */
9814 case R_ARM_ALU_PC_G0_NC
:
9815 case R_ARM_ALU_PC_G0
:
9816 case R_ARM_ALU_SB_G0_NC
:
9817 case R_ARM_ALU_SB_G0
:
9821 case R_ARM_ALU_PC_G1_NC
:
9822 case R_ARM_ALU_PC_G1
:
9823 case R_ARM_ALU_SB_G1_NC
:
9824 case R_ARM_ALU_SB_G1
:
9828 case R_ARM_ALU_PC_G2
:
9829 case R_ARM_ALU_SB_G2
:
9837 /* If REL, extract the addend from the insn. If RELA, it will
9838 have already been fetched for us. */
9839 if (globals
->use_rel
)
9842 bfd_vma constant
= insn
& 0xff;
9843 bfd_vma rotation
= (insn
& 0xf00) >> 8;
9846 signed_addend
= constant
;
9849 /* Compensate for the fact that in the instruction, the
9850 rotation is stored in multiples of 2 bits. */
9853 /* Rotate "constant" right by "rotation" bits. */
9854 signed_addend
= (constant
>> rotation
) |
9855 (constant
<< (8 * sizeof (bfd_vma
) - rotation
));
9858 /* Determine if the instruction is an ADD or a SUB.
9859 (For REL, this determines the sign of the addend.) */
9860 negative
= identify_add_or_sub (insn
);
9863 (*_bfd_error_handler
)
9864 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
9865 input_bfd
, input_section
,
9866 (long) rel
->r_offset
, howto
->name
);
9867 return bfd_reloc_overflow
;
9870 signed_addend
*= negative
;
9873 /* Compute the value (X) to go in the place. */
9874 if (r_type
== R_ARM_ALU_PC_G0_NC
9875 || r_type
== R_ARM_ALU_PC_G1_NC
9876 || r_type
== R_ARM_ALU_PC_G0
9877 || r_type
== R_ARM_ALU_PC_G1
9878 || r_type
== R_ARM_ALU_PC_G2
)
9880 signed_value
= value
- pc
+ signed_addend
;
9882 /* Section base relative. */
9883 signed_value
= value
- sb
+ signed_addend
;
9885 /* If the target symbol is a Thumb function, then set the
9886 Thumb bit in the address. */
9887 if (branch_type
== ST_BRANCH_TO_THUMB
)
9890 /* Calculate the value of the relevant G_n, in encoded
9891 constant-with-rotation format. */
9892 g_n
= calculate_group_reloc_mask (abs (signed_value
), group
,
9895 /* Check for overflow if required. */
9896 if ((r_type
== R_ARM_ALU_PC_G0
9897 || r_type
== R_ARM_ALU_PC_G1
9898 || r_type
== R_ARM_ALU_PC_G2
9899 || r_type
== R_ARM_ALU_SB_G0
9900 || r_type
== R_ARM_ALU_SB_G1
9901 || r_type
== R_ARM_ALU_SB_G2
) && residual
!= 0)
9903 (*_bfd_error_handler
)
9904 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
9905 input_bfd
, input_section
,
9906 (long) rel
->r_offset
, abs (signed_value
), howto
->name
);
9907 return bfd_reloc_overflow
;
9910 /* Mask out the value and the ADD/SUB part of the opcode; take care
9911 not to destroy the S bit. */
9914 /* Set the opcode according to whether the value to go in the
9915 place is negative. */
9916 if (signed_value
< 0)
9921 /* Encode the offset. */
9924 bfd_put_32 (input_bfd
, insn
, hit_data
);
9926 return bfd_reloc_ok
;
9928 case R_ARM_LDR_PC_G0
:
9929 case R_ARM_LDR_PC_G1
:
9930 case R_ARM_LDR_PC_G2
:
9931 case R_ARM_LDR_SB_G0
:
9932 case R_ARM_LDR_SB_G1
:
9933 case R_ARM_LDR_SB_G2
:
9935 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
9936 bfd_vma pc
= input_section
->output_section
->vma
9937 + input_section
->output_offset
+ rel
->r_offset
;
9938 bfd_vma sb
= 0; /* See note above. */
9940 bfd_signed_vma signed_value
;
9943 /* Determine which groups of bits to calculate. */
9946 case R_ARM_LDR_PC_G0
:
9947 case R_ARM_LDR_SB_G0
:
9951 case R_ARM_LDR_PC_G1
:
9952 case R_ARM_LDR_SB_G1
:
9956 case R_ARM_LDR_PC_G2
:
9957 case R_ARM_LDR_SB_G2
:
9965 /* If REL, extract the addend from the insn. If RELA, it will
9966 have already been fetched for us. */
9967 if (globals
->use_rel
)
9969 int negative
= (insn
& (1 << 23)) ? 1 : -1;
9970 signed_addend
= negative
* (insn
& 0xfff);
9973 /* Compute the value (X) to go in the place. */
9974 if (r_type
== R_ARM_LDR_PC_G0
9975 || r_type
== R_ARM_LDR_PC_G1
9976 || r_type
== R_ARM_LDR_PC_G2
)
9978 signed_value
= value
- pc
+ signed_addend
;
9980 /* Section base relative. */
9981 signed_value
= value
- sb
+ signed_addend
;
9983 /* Calculate the value of the relevant G_{n-1} to obtain
9984 the residual at that stage. */
9985 calculate_group_reloc_mask (abs (signed_value
), group
- 1, &residual
);
9987 /* Check for overflow. */
9988 if (residual
>= 0x1000)
9990 (*_bfd_error_handler
)
9991 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
9992 input_bfd
, input_section
,
9993 (long) rel
->r_offset
, abs (signed_value
), howto
->name
);
9994 return bfd_reloc_overflow
;
9997 /* Mask out the value and U bit. */
10000 /* Set the U bit if the value to go in the place is non-negative. */
10001 if (signed_value
>= 0)
10004 /* Encode the offset. */
10007 bfd_put_32 (input_bfd
, insn
, hit_data
);
10009 return bfd_reloc_ok
;
10011 case R_ARM_LDRS_PC_G0
:
10012 case R_ARM_LDRS_PC_G1
:
10013 case R_ARM_LDRS_PC_G2
:
10014 case R_ARM_LDRS_SB_G0
:
10015 case R_ARM_LDRS_SB_G1
:
10016 case R_ARM_LDRS_SB_G2
:
10018 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
10019 bfd_vma pc
= input_section
->output_section
->vma
10020 + input_section
->output_offset
+ rel
->r_offset
;
10021 bfd_vma sb
= 0; /* See note above. */
10023 bfd_signed_vma signed_value
;
10026 /* Determine which groups of bits to calculate. */
10029 case R_ARM_LDRS_PC_G0
:
10030 case R_ARM_LDRS_SB_G0
:
10034 case R_ARM_LDRS_PC_G1
:
10035 case R_ARM_LDRS_SB_G1
:
10039 case R_ARM_LDRS_PC_G2
:
10040 case R_ARM_LDRS_SB_G2
:
10048 /* If REL, extract the addend from the insn. If RELA, it will
10049 have already been fetched for us. */
10050 if (globals
->use_rel
)
10052 int negative
= (insn
& (1 << 23)) ? 1 : -1;
10053 signed_addend
= negative
* (((insn
& 0xf00) >> 4) + (insn
& 0xf));
10056 /* Compute the value (X) to go in the place. */
10057 if (r_type
== R_ARM_LDRS_PC_G0
10058 || r_type
== R_ARM_LDRS_PC_G1
10059 || r_type
== R_ARM_LDRS_PC_G2
)
10061 signed_value
= value
- pc
+ signed_addend
;
10063 /* Section base relative. */
10064 signed_value
= value
- sb
+ signed_addend
;
10066 /* Calculate the value of the relevant G_{n-1} to obtain
10067 the residual at that stage. */
10068 calculate_group_reloc_mask (abs (signed_value
), group
- 1, &residual
);
10070 /* Check for overflow. */
10071 if (residual
>= 0x100)
10073 (*_bfd_error_handler
)
10074 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10075 input_bfd
, input_section
,
10076 (long) rel
->r_offset
, abs (signed_value
), howto
->name
);
10077 return bfd_reloc_overflow
;
10080 /* Mask out the value and U bit. */
10081 insn
&= 0xff7ff0f0;
10083 /* Set the U bit if the value to go in the place is non-negative. */
10084 if (signed_value
>= 0)
10087 /* Encode the offset. */
10088 insn
|= ((residual
& 0xf0) << 4) | (residual
& 0xf);
10090 bfd_put_32 (input_bfd
, insn
, hit_data
);
10092 return bfd_reloc_ok
;
10094 case R_ARM_LDC_PC_G0
:
10095 case R_ARM_LDC_PC_G1
:
10096 case R_ARM_LDC_PC_G2
:
10097 case R_ARM_LDC_SB_G0
:
10098 case R_ARM_LDC_SB_G1
:
10099 case R_ARM_LDC_SB_G2
:
10101 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
10102 bfd_vma pc
= input_section
->output_section
->vma
10103 + input_section
->output_offset
+ rel
->r_offset
;
10104 bfd_vma sb
= 0; /* See note above. */
10106 bfd_signed_vma signed_value
;
10109 /* Determine which groups of bits to calculate. */
10112 case R_ARM_LDC_PC_G0
:
10113 case R_ARM_LDC_SB_G0
:
10117 case R_ARM_LDC_PC_G1
:
10118 case R_ARM_LDC_SB_G1
:
10122 case R_ARM_LDC_PC_G2
:
10123 case R_ARM_LDC_SB_G2
:
10131 /* If REL, extract the addend from the insn. If RELA, it will
10132 have already been fetched for us. */
10133 if (globals
->use_rel
)
10135 int negative
= (insn
& (1 << 23)) ? 1 : -1;
10136 signed_addend
= negative
* ((insn
& 0xff) << 2);
10139 /* Compute the value (X) to go in the place. */
10140 if (r_type
== R_ARM_LDC_PC_G0
10141 || r_type
== R_ARM_LDC_PC_G1
10142 || r_type
== R_ARM_LDC_PC_G2
)
10144 signed_value
= value
- pc
+ signed_addend
;
10146 /* Section base relative. */
10147 signed_value
= value
- sb
+ signed_addend
;
10149 /* Calculate the value of the relevant G_{n-1} to obtain
10150 the residual at that stage. */
10151 calculate_group_reloc_mask (abs (signed_value
), group
- 1, &residual
);
10153 /* Check for overflow. (The absolute value to go in the place must be
10154 divisible by four and, after having been divided by four, must
10155 fit in eight bits.) */
10156 if ((residual
& 0x3) != 0 || residual
>= 0x400)
10158 (*_bfd_error_handler
)
10159 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10160 input_bfd
, input_section
,
10161 (long) rel
->r_offset
, abs (signed_value
), howto
->name
);
10162 return bfd_reloc_overflow
;
10165 /* Mask out the value and U bit. */
10166 insn
&= 0xff7fff00;
10168 /* Set the U bit if the value to go in the place is non-negative. */
10169 if (signed_value
>= 0)
10172 /* Encode the offset. */
10173 insn
|= residual
>> 2;
10175 bfd_put_32 (input_bfd
, insn
, hit_data
);
10177 return bfd_reloc_ok
;
10180 return bfd_reloc_notsupported
;
10184 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
10186 arm_add_to_rel (bfd
* abfd
,
10187 bfd_byte
* address
,
10188 reloc_howto_type
* howto
,
10189 bfd_signed_vma increment
)
10191 bfd_signed_vma addend
;
10193 if (howto
->type
== R_ARM_THM_CALL
10194 || howto
->type
== R_ARM_THM_JUMP24
)
10196 int upper_insn
, lower_insn
;
10199 upper_insn
= bfd_get_16 (abfd
, address
);
10200 lower_insn
= bfd_get_16 (abfd
, address
+ 2);
10201 upper
= upper_insn
& 0x7ff;
10202 lower
= lower_insn
& 0x7ff;
10204 addend
= (upper
<< 12) | (lower
<< 1);
10205 addend
+= increment
;
10208 upper_insn
= (upper_insn
& 0xf800) | ((addend
>> 11) & 0x7ff);
10209 lower_insn
= (lower_insn
& 0xf800) | (addend
& 0x7ff);
10211 bfd_put_16 (abfd
, (bfd_vma
) upper_insn
, address
);
10212 bfd_put_16 (abfd
, (bfd_vma
) lower_insn
, address
+ 2);
10218 contents
= bfd_get_32 (abfd
, address
);
10220 /* Get the (signed) value from the instruction. */
10221 addend
= contents
& howto
->src_mask
;
10222 if (addend
& ((howto
->src_mask
+ 1) >> 1))
10224 bfd_signed_vma mask
;
10227 mask
&= ~ howto
->src_mask
;
10231 /* Add in the increment, (which is a byte value). */
10232 switch (howto
->type
)
10235 addend
+= increment
;
10242 addend
<<= howto
->size
;
10243 addend
+= increment
;
10245 /* Should we check for overflow here ? */
10247 /* Drop any undesired bits. */
10248 addend
>>= howto
->rightshift
;
10252 contents
= (contents
& ~ howto
->dst_mask
) | (addend
& howto
->dst_mask
);
10254 bfd_put_32 (abfd
, contents
, address
);
10258 #define IS_ARM_TLS_RELOC(R_TYPE) \
10259 ((R_TYPE) == R_ARM_TLS_GD32 \
10260 || (R_TYPE) == R_ARM_TLS_LDO32 \
10261 || (R_TYPE) == R_ARM_TLS_LDM32 \
10262 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
10263 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
10264 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
10265 || (R_TYPE) == R_ARM_TLS_LE32 \
10266 || (R_TYPE) == R_ARM_TLS_IE32 \
10267 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
10269 /* Specific set of relocations for the gnu tls dialect. */
10270 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
10271 ((R_TYPE) == R_ARM_TLS_GOTDESC \
10272 || (R_TYPE) == R_ARM_TLS_CALL \
10273 || (R_TYPE) == R_ARM_THM_TLS_CALL \
10274 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
10275 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
10277 /* Relocate an ARM ELF section. */
10280 elf32_arm_relocate_section (bfd
* output_bfd
,
10281 struct bfd_link_info
* info
,
10283 asection
* input_section
,
10284 bfd_byte
* contents
,
10285 Elf_Internal_Rela
* relocs
,
10286 Elf_Internal_Sym
* local_syms
,
10287 asection
** local_sections
)
10289 Elf_Internal_Shdr
*symtab_hdr
;
10290 struct elf_link_hash_entry
**sym_hashes
;
10291 Elf_Internal_Rela
*rel
;
10292 Elf_Internal_Rela
*relend
;
10294 struct elf32_arm_link_hash_table
* globals
;
10296 globals
= elf32_arm_hash_table (info
);
10297 if (globals
== NULL
)
10300 symtab_hdr
= & elf_symtab_hdr (input_bfd
);
10301 sym_hashes
= elf_sym_hashes (input_bfd
);
10304 relend
= relocs
+ input_section
->reloc_count
;
10305 for (; rel
< relend
; rel
++)
10308 reloc_howto_type
* howto
;
10309 unsigned long r_symndx
;
10310 Elf_Internal_Sym
* sym
;
10312 struct elf_link_hash_entry
* h
;
10313 bfd_vma relocation
;
10314 bfd_reloc_status_type r
;
10317 bfd_boolean unresolved_reloc
= FALSE
;
10318 char *error_message
= NULL
;
10320 r_symndx
= ELF32_R_SYM (rel
->r_info
);
10321 r_type
= ELF32_R_TYPE (rel
->r_info
);
10322 r_type
= arm_real_reloc_type (globals
, r_type
);
10324 if ( r_type
== R_ARM_GNU_VTENTRY
10325 || r_type
== R_ARM_GNU_VTINHERIT
)
10328 bfd_reloc
.howto
= elf32_arm_howto_from_type (r_type
);
10329 howto
= bfd_reloc
.howto
;
10335 if (r_symndx
< symtab_hdr
->sh_info
)
10337 sym
= local_syms
+ r_symndx
;
10338 sym_type
= ELF32_ST_TYPE (sym
->st_info
);
10339 sec
= local_sections
[r_symndx
];
10341 /* An object file might have a reference to a local
10342 undefined symbol. This is a daft object file, but we
10343 should at least do something about it. V4BX & NONE
10344 relocations do not use the symbol and are explicitly
10345 allowed to use the undefined symbol, so allow those.
10346 Likewise for relocations against STN_UNDEF. */
10347 if (r_type
!= R_ARM_V4BX
10348 && r_type
!= R_ARM_NONE
10349 && r_symndx
!= STN_UNDEF
10350 && bfd_is_und_section (sec
)
10351 && ELF_ST_BIND (sym
->st_info
) != STB_WEAK
)
10353 if (!info
->callbacks
->undefined_symbol
10354 (info
, bfd_elf_string_from_elf_section
10355 (input_bfd
, symtab_hdr
->sh_link
, sym
->st_name
),
10356 input_bfd
, input_section
,
10357 rel
->r_offset
, TRUE
))
10361 if (globals
->use_rel
)
10363 relocation
= (sec
->output_section
->vma
10364 + sec
->output_offset
10366 if (!info
->relocatable
10367 && (sec
->flags
& SEC_MERGE
)
10368 && ELF_ST_TYPE (sym
->st_info
) == STT_SECTION
)
10371 bfd_vma addend
, value
;
10375 case R_ARM_MOVW_ABS_NC
:
10376 case R_ARM_MOVT_ABS
:
10377 value
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
);
10378 addend
= ((value
& 0xf0000) >> 4) | (value
& 0xfff);
10379 addend
= (addend
^ 0x8000) - 0x8000;
10382 case R_ARM_THM_MOVW_ABS_NC
:
10383 case R_ARM_THM_MOVT_ABS
:
10384 value
= bfd_get_16 (input_bfd
, contents
+ rel
->r_offset
)
10386 value
|= bfd_get_16 (input_bfd
,
10387 contents
+ rel
->r_offset
+ 2);
10388 addend
= ((value
& 0xf7000) >> 4) | (value
& 0xff)
10389 | ((value
& 0x04000000) >> 15);
10390 addend
= (addend
^ 0x8000) - 0x8000;
10394 if (howto
->rightshift
10395 || (howto
->src_mask
& (howto
->src_mask
+ 1)))
10397 (*_bfd_error_handler
)
10398 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
10399 input_bfd
, input_section
,
10400 (long) rel
->r_offset
, howto
->name
);
10404 value
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
);
10406 /* Get the (signed) value from the instruction. */
10407 addend
= value
& howto
->src_mask
;
10408 if (addend
& ((howto
->src_mask
+ 1) >> 1))
10410 bfd_signed_vma mask
;
10413 mask
&= ~ howto
->src_mask
;
10421 _bfd_elf_rel_local_sym (output_bfd
, sym
, &msec
, addend
)
10423 addend
+= msec
->output_section
->vma
+ msec
->output_offset
;
10425 /* Cases here must match those in the preceding
10426 switch statement. */
10429 case R_ARM_MOVW_ABS_NC
:
10430 case R_ARM_MOVT_ABS
:
10431 value
= (value
& 0xfff0f000) | ((addend
& 0xf000) << 4)
10432 | (addend
& 0xfff);
10433 bfd_put_32 (input_bfd
, value
, contents
+ rel
->r_offset
);
10436 case R_ARM_THM_MOVW_ABS_NC
:
10437 case R_ARM_THM_MOVT_ABS
:
10438 value
= (value
& 0xfbf08f00) | ((addend
& 0xf700) << 4)
10439 | (addend
& 0xff) | ((addend
& 0x0800) << 15);
10440 bfd_put_16 (input_bfd
, value
>> 16,
10441 contents
+ rel
->r_offset
);
10442 bfd_put_16 (input_bfd
, value
,
10443 contents
+ rel
->r_offset
+ 2);
10447 value
= (value
& ~ howto
->dst_mask
)
10448 | (addend
& howto
->dst_mask
);
10449 bfd_put_32 (input_bfd
, value
, contents
+ rel
->r_offset
);
10455 relocation
= _bfd_elf_rela_local_sym (output_bfd
, sym
, &sec
, rel
);
10459 bfd_boolean warned
;
10461 RELOC_FOR_GLOBAL_SYMBOL (info
, input_bfd
, input_section
, rel
,
10462 r_symndx
, symtab_hdr
, sym_hashes
,
10463 h
, sec
, relocation
,
10464 unresolved_reloc
, warned
);
10466 sym_type
= h
->type
;
10469 if (sec
!= NULL
&& discarded_section (sec
))
10470 RELOC_AGAINST_DISCARDED_SECTION (info
, input_bfd
, input_section
,
10471 rel
, 1, relend
, howto
, 0, contents
);
10473 if (info
->relocatable
)
10475 /* This is a relocatable link. We don't have to change
10476 anything, unless the reloc is against a section symbol,
10477 in which case we have to adjust according to where the
10478 section symbol winds up in the output section. */
10479 if (sym
!= NULL
&& ELF_ST_TYPE (sym
->st_info
) == STT_SECTION
)
10481 if (globals
->use_rel
)
10482 arm_add_to_rel (input_bfd
, contents
+ rel
->r_offset
,
10483 howto
, (bfd_signed_vma
) sec
->output_offset
);
10485 rel
->r_addend
+= sec
->output_offset
;
10491 name
= h
->root
.root
.string
;
10494 name
= (bfd_elf_string_from_elf_section
10495 (input_bfd
, symtab_hdr
->sh_link
, sym
->st_name
));
10496 if (name
== NULL
|| *name
== '\0')
10497 name
= bfd_section_name (input_bfd
, sec
);
10500 if (r_symndx
!= STN_UNDEF
10501 && r_type
!= R_ARM_NONE
10503 || h
->root
.type
== bfd_link_hash_defined
10504 || h
->root
.type
== bfd_link_hash_defweak
)
10505 && IS_ARM_TLS_RELOC (r_type
) != (sym_type
== STT_TLS
))
10507 (*_bfd_error_handler
)
10508 ((sym_type
== STT_TLS
10509 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
10510 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
10513 (long) rel
->r_offset
,
10518 /* We call elf32_arm_final_link_relocate unless we're completely
10519 done, i.e., the relaxation produced the final output we want,
10520 and we won't let anybody mess with it. Also, we have to do
10521 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
10522 both in relaxed and non-relaxed cases */
10523 if ((elf32_arm_tls_transition (info
, r_type
, h
) != (unsigned)r_type
)
10524 || (IS_ARM_TLS_GNU_RELOC (r_type
)
10525 && !((h
? elf32_arm_hash_entry (h
)->tls_type
:
10526 elf32_arm_local_got_tls_type (input_bfd
)[r_symndx
])
10529 r
= elf32_arm_tls_relax (globals
, input_bfd
, input_section
,
10530 contents
, rel
, h
== NULL
);
10531 /* This may have been marked unresolved because it came from
10532 a shared library. But we've just dealt with that. */
10533 unresolved_reloc
= 0;
10536 r
= bfd_reloc_continue
;
10538 if (r
== bfd_reloc_continue
)
10539 r
= elf32_arm_final_link_relocate (howto
, input_bfd
, output_bfd
,
10540 input_section
, contents
, rel
,
10541 relocation
, info
, sec
, name
, sym_type
,
10542 (h
? h
->target_internal
10543 : ARM_SYM_BRANCH_TYPE (sym
)), h
,
10544 &unresolved_reloc
, &error_message
);
10546 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
10547 because such sections are not SEC_ALLOC and thus ld.so will
10548 not process them. */
10549 if (unresolved_reloc
10550 && !((input_section
->flags
& SEC_DEBUGGING
) != 0
10552 && _bfd_elf_section_offset (output_bfd
, info
, input_section
,
10553 rel
->r_offset
) != (bfd_vma
) -1)
10555 (*_bfd_error_handler
)
10556 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
10559 (long) rel
->r_offset
,
10561 h
->root
.root
.string
);
10565 if (r
!= bfd_reloc_ok
)
10569 case bfd_reloc_overflow
:
10570 /* If the overflowing reloc was to an undefined symbol,
10571 we have already printed one error message and there
10572 is no point complaining again. */
10574 h
->root
.type
!= bfd_link_hash_undefined
)
10575 && (!((*info
->callbacks
->reloc_overflow
)
10576 (info
, (h
? &h
->root
: NULL
), name
, howto
->name
,
10577 (bfd_vma
) 0, input_bfd
, input_section
,
10582 case bfd_reloc_undefined
:
10583 if (!((*info
->callbacks
->undefined_symbol
)
10584 (info
, name
, input_bfd
, input_section
,
10585 rel
->r_offset
, TRUE
)))
10589 case bfd_reloc_outofrange
:
10590 error_message
= _("out of range");
10593 case bfd_reloc_notsupported
:
10594 error_message
= _("unsupported relocation");
10597 case bfd_reloc_dangerous
:
10598 /* error_message should already be set. */
10602 error_message
= _("unknown error");
10603 /* Fall through. */
10606 BFD_ASSERT (error_message
!= NULL
);
10607 if (!((*info
->callbacks
->reloc_dangerous
)
10608 (info
, error_message
, input_bfd
, input_section
,
10619 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
10620 adds the edit to the start of the list. (The list must be built in order of
10621 ascending TINDEX: the function's callers are primarily responsible for
10622 maintaining that condition). */
10625 add_unwind_table_edit (arm_unwind_table_edit
**head
,
10626 arm_unwind_table_edit
**tail
,
10627 arm_unwind_edit_type type
,
10628 asection
*linked_section
,
10629 unsigned int tindex
)
10631 arm_unwind_table_edit
*new_edit
= (arm_unwind_table_edit
*)
10632 xmalloc (sizeof (arm_unwind_table_edit
));
10634 new_edit
->type
= type
;
10635 new_edit
->linked_section
= linked_section
;
10636 new_edit
->index
= tindex
;
10640 new_edit
->next
= NULL
;
10643 (*tail
)->next
= new_edit
;
10645 (*tail
) = new_edit
;
10648 (*head
) = new_edit
;
10652 new_edit
->next
= *head
;
10661 static _arm_elf_section_data
*get_arm_elf_section_data (asection
*);
10663 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
10665 adjust_exidx_size(asection
*exidx_sec
, int adjust
)
10669 if (!exidx_sec
->rawsize
)
10670 exidx_sec
->rawsize
= exidx_sec
->size
;
10672 bfd_set_section_size (exidx_sec
->owner
, exidx_sec
, exidx_sec
->size
+ adjust
);
10673 out_sec
= exidx_sec
->output_section
;
10674 /* Adjust size of output section. */
10675 bfd_set_section_size (out_sec
->owner
, out_sec
, out_sec
->size
+adjust
);
10678 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
10680 insert_cantunwind_after(asection
*text_sec
, asection
*exidx_sec
)
10682 struct _arm_elf_section_data
*exidx_arm_data
;
10684 exidx_arm_data
= get_arm_elf_section_data (exidx_sec
);
10685 add_unwind_table_edit (
10686 &exidx_arm_data
->u
.exidx
.unwind_edit_list
,
10687 &exidx_arm_data
->u
.exidx
.unwind_edit_tail
,
10688 INSERT_EXIDX_CANTUNWIND_AT_END
, text_sec
, UINT_MAX
);
10690 adjust_exidx_size(exidx_sec
, 8);
10693 /* Scan .ARM.exidx tables, and create a list describing edits which should be
10694 made to those tables, such that:
10696 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
10697 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
10698 codes which have been inlined into the index).
10700 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
10702 The edits are applied when the tables are written
10703 (in elf32_arm_write_section). */
10706 elf32_arm_fix_exidx_coverage (asection
**text_section_order
,
10707 unsigned int num_text_sections
,
10708 struct bfd_link_info
*info
,
10709 bfd_boolean merge_exidx_entries
)
10712 unsigned int last_second_word
= 0, i
;
10713 asection
*last_exidx_sec
= NULL
;
10714 asection
*last_text_sec
= NULL
;
10715 int last_unwind_type
= -1;
10717 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
10719 for (inp
= info
->input_bfds
; inp
!= NULL
; inp
= inp
->link_next
)
10723 for (sec
= inp
->sections
; sec
!= NULL
; sec
= sec
->next
)
10725 struct bfd_elf_section_data
*elf_sec
= elf_section_data (sec
);
10726 Elf_Internal_Shdr
*hdr
= &elf_sec
->this_hdr
;
10728 if (!hdr
|| hdr
->sh_type
!= SHT_ARM_EXIDX
)
10731 if (elf_sec
->linked_to
)
10733 Elf_Internal_Shdr
*linked_hdr
10734 = &elf_section_data (elf_sec
->linked_to
)->this_hdr
;
10735 struct _arm_elf_section_data
*linked_sec_arm_data
10736 = get_arm_elf_section_data (linked_hdr
->bfd_section
);
10738 if (linked_sec_arm_data
== NULL
)
10741 /* Link this .ARM.exidx section back from the text section it
10743 linked_sec_arm_data
->u
.text
.arm_exidx_sec
= sec
;
10748 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
10749 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
10750 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
10752 for (i
= 0; i
< num_text_sections
; i
++)
10754 asection
*sec
= text_section_order
[i
];
10755 asection
*exidx_sec
;
10756 struct _arm_elf_section_data
*arm_data
= get_arm_elf_section_data (sec
);
10757 struct _arm_elf_section_data
*exidx_arm_data
;
10758 bfd_byte
*contents
= NULL
;
10759 int deleted_exidx_bytes
= 0;
10761 arm_unwind_table_edit
*unwind_edit_head
= NULL
;
10762 arm_unwind_table_edit
*unwind_edit_tail
= NULL
;
10763 Elf_Internal_Shdr
*hdr
;
10766 if (arm_data
== NULL
)
10769 exidx_sec
= arm_data
->u
.text
.arm_exidx_sec
;
10770 if (exidx_sec
== NULL
)
10772 /* Section has no unwind data. */
10773 if (last_unwind_type
== 0 || !last_exidx_sec
)
10776 /* Ignore zero sized sections. */
10777 if (sec
->size
== 0)
10780 insert_cantunwind_after(last_text_sec
, last_exidx_sec
);
10781 last_unwind_type
= 0;
10785 /* Skip /DISCARD/ sections. */
10786 if (bfd_is_abs_section (exidx_sec
->output_section
))
10789 hdr
= &elf_section_data (exidx_sec
)->this_hdr
;
10790 if (hdr
->sh_type
!= SHT_ARM_EXIDX
)
10793 exidx_arm_data
= get_arm_elf_section_data (exidx_sec
);
10794 if (exidx_arm_data
== NULL
)
10797 ibfd
= exidx_sec
->owner
;
10799 if (hdr
->contents
!= NULL
)
10800 contents
= hdr
->contents
;
10801 else if (! bfd_malloc_and_get_section (ibfd
, exidx_sec
, &contents
))
10805 for (j
= 0; j
< hdr
->sh_size
; j
+= 8)
10807 unsigned int second_word
= bfd_get_32 (ibfd
, contents
+ j
+ 4);
10811 /* An EXIDX_CANTUNWIND entry. */
10812 if (second_word
== 1)
10814 if (last_unwind_type
== 0)
10818 /* Inlined unwinding data. Merge if equal to previous. */
10819 else if ((second_word
& 0x80000000) != 0)
10821 if (merge_exidx_entries
10822 && last_second_word
== second_word
&& last_unwind_type
== 1)
10825 last_second_word
= second_word
;
10827 /* Normal table entry. In theory we could merge these too,
10828 but duplicate entries are likely to be much less common. */
10834 add_unwind_table_edit (&unwind_edit_head
, &unwind_edit_tail
,
10835 DELETE_EXIDX_ENTRY
, NULL
, j
/ 8);
10837 deleted_exidx_bytes
+= 8;
10840 last_unwind_type
= unwind_type
;
10843 /* Free contents if we allocated it ourselves. */
10844 if (contents
!= hdr
->contents
)
10847 /* Record edits to be applied later (in elf32_arm_write_section). */
10848 exidx_arm_data
->u
.exidx
.unwind_edit_list
= unwind_edit_head
;
10849 exidx_arm_data
->u
.exidx
.unwind_edit_tail
= unwind_edit_tail
;
10851 if (deleted_exidx_bytes
> 0)
10852 adjust_exidx_size(exidx_sec
, -deleted_exidx_bytes
);
10854 last_exidx_sec
= exidx_sec
;
10855 last_text_sec
= sec
;
10858 /* Add terminating CANTUNWIND entry. */
10859 if (last_exidx_sec
&& last_unwind_type
!= 0)
10860 insert_cantunwind_after(last_text_sec
, last_exidx_sec
);
10866 elf32_arm_output_glue_section (struct bfd_link_info
*info
, bfd
*obfd
,
10867 bfd
*ibfd
, const char *name
)
10869 asection
*sec
, *osec
;
10871 sec
= bfd_get_linker_section (ibfd
, name
);
10872 if (sec
== NULL
|| (sec
->flags
& SEC_EXCLUDE
) != 0)
10875 osec
= sec
->output_section
;
10876 if (elf32_arm_write_section (obfd
, info
, sec
, sec
->contents
))
10879 if (! bfd_set_section_contents (obfd
, osec
, sec
->contents
,
10880 sec
->output_offset
, sec
->size
))
10887 elf32_arm_final_link (bfd
*abfd
, struct bfd_link_info
*info
)
10889 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (info
);
10890 asection
*sec
, *osec
;
10892 if (globals
== NULL
)
10895 /* Invoke the regular ELF backend linker to do all the work. */
10896 if (!bfd_elf_final_link (abfd
, info
))
10899 /* Process stub sections (eg BE8 encoding, ...). */
10900 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
10902 for (i
=0; i
<htab
->top_id
; i
++)
10904 sec
= htab
->stub_group
[i
].stub_sec
;
10905 /* Only process it once, in its link_sec slot. */
10906 if (sec
&& i
== htab
->stub_group
[i
].link_sec
->id
)
10908 osec
= sec
->output_section
;
10909 elf32_arm_write_section (abfd
, info
, sec
, sec
->contents
);
10910 if (! bfd_set_section_contents (abfd
, osec
, sec
->contents
,
10911 sec
->output_offset
, sec
->size
))
10916 /* Write out any glue sections now that we have created all the
10918 if (globals
->bfd_of_glue_owner
!= NULL
)
10920 if (! elf32_arm_output_glue_section (info
, abfd
,
10921 globals
->bfd_of_glue_owner
,
10922 ARM2THUMB_GLUE_SECTION_NAME
))
10925 if (! elf32_arm_output_glue_section (info
, abfd
,
10926 globals
->bfd_of_glue_owner
,
10927 THUMB2ARM_GLUE_SECTION_NAME
))
10930 if (! elf32_arm_output_glue_section (info
, abfd
,
10931 globals
->bfd_of_glue_owner
,
10932 VFP11_ERRATUM_VENEER_SECTION_NAME
))
10935 if (! elf32_arm_output_glue_section (info
, abfd
,
10936 globals
->bfd_of_glue_owner
,
10937 ARM_BX_GLUE_SECTION_NAME
))
10944 /* Return a best guess for the machine number based on the attributes. */
10946 static unsigned int
10947 bfd_arm_get_mach_from_attributes (bfd
* abfd
)
10949 int arch
= bfd_elf_get_obj_attr_int (abfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
10953 case TAG_CPU_ARCH_V4
: return bfd_mach_arm_4
;
10954 case TAG_CPU_ARCH_V4T
: return bfd_mach_arm_4T
;
10955 case TAG_CPU_ARCH_V5T
: return bfd_mach_arm_5T
;
10957 case TAG_CPU_ARCH_V5TE
:
10961 BFD_ASSERT (Tag_CPU_name
< NUM_KNOWN_OBJ_ATTRIBUTES
);
10962 name
= elf_known_obj_attributes (abfd
) [OBJ_ATTR_PROC
][Tag_CPU_name
].s
;
10966 if (strcmp (name
, "IWMMXT2") == 0)
10967 return bfd_mach_arm_iWMMXt2
;
10969 if (strcmp (name
, "IWMMXT") == 0)
10970 return bfd_mach_arm_iWMMXt
;
10972 if (strcmp (name
, "XSCALE") == 0)
10976 BFD_ASSERT (Tag_WMMX_arch
< NUM_KNOWN_OBJ_ATTRIBUTES
);
10977 wmmx
= elf_known_obj_attributes (abfd
) [OBJ_ATTR_PROC
][Tag_WMMX_arch
].i
;
10980 case 1: return bfd_mach_arm_iWMMXt
;
10981 case 2: return bfd_mach_arm_iWMMXt2
;
10982 default: return bfd_mach_arm_XScale
;
10987 return bfd_mach_arm_5TE
;
10991 return bfd_mach_arm_unknown
;
10995 /* Set the right machine number. */
10998 elf32_arm_object_p (bfd
*abfd
)
11002 mach
= bfd_arm_get_mach_from_notes (abfd
, ARM_NOTE_SECTION
);
11004 if (mach
== bfd_mach_arm_unknown
)
11006 if (elf_elfheader (abfd
)->e_flags
& EF_ARM_MAVERICK_FLOAT
)
11007 mach
= bfd_mach_arm_ep9312
;
11009 mach
= bfd_arm_get_mach_from_attributes (abfd
);
11012 bfd_default_set_arch_mach (abfd
, bfd_arch_arm
, mach
);
11016 /* Function to keep ARM specific flags in the ELF header. */
11019 elf32_arm_set_private_flags (bfd
*abfd
, flagword flags
)
11021 if (elf_flags_init (abfd
)
11022 && elf_elfheader (abfd
)->e_flags
!= flags
)
11024 if (EF_ARM_EABI_VERSION (flags
) == EF_ARM_EABI_UNKNOWN
)
11026 if (flags
& EF_ARM_INTERWORK
)
11027 (*_bfd_error_handler
)
11028 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
11032 (_("Warning: Clearing the interworking flag of %B due to outside request"),
11038 elf_elfheader (abfd
)->e_flags
= flags
;
11039 elf_flags_init (abfd
) = TRUE
;
11045 /* Copy backend specific data from one object module to another. */
11048 elf32_arm_copy_private_bfd_data (bfd
*ibfd
, bfd
*obfd
)
11051 flagword out_flags
;
11053 if (! is_arm_elf (ibfd
) || ! is_arm_elf (obfd
))
11056 in_flags
= elf_elfheader (ibfd
)->e_flags
;
11057 out_flags
= elf_elfheader (obfd
)->e_flags
;
11059 if (elf_flags_init (obfd
)
11060 && EF_ARM_EABI_VERSION (out_flags
) == EF_ARM_EABI_UNKNOWN
11061 && in_flags
!= out_flags
)
11063 /* Cannot mix APCS26 and APCS32 code. */
11064 if ((in_flags
& EF_ARM_APCS_26
) != (out_flags
& EF_ARM_APCS_26
))
11067 /* Cannot mix float APCS and non-float APCS code. */
11068 if ((in_flags
& EF_ARM_APCS_FLOAT
) != (out_flags
& EF_ARM_APCS_FLOAT
))
11071 /* If the src and dest have different interworking flags
11072 then turn off the interworking bit. */
11073 if ((in_flags
& EF_ARM_INTERWORK
) != (out_flags
& EF_ARM_INTERWORK
))
11075 if (out_flags
& EF_ARM_INTERWORK
)
11077 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
11080 in_flags
&= ~EF_ARM_INTERWORK
;
11083 /* Likewise for PIC, though don't warn for this case. */
11084 if ((in_flags
& EF_ARM_PIC
) != (out_flags
& EF_ARM_PIC
))
11085 in_flags
&= ~EF_ARM_PIC
;
11088 elf_elfheader (obfd
)->e_flags
= in_flags
;
11089 elf_flags_init (obfd
) = TRUE
;
11091 /* Also copy the EI_OSABI field. */
11092 elf_elfheader (obfd
)->e_ident
[EI_OSABI
] =
11093 elf_elfheader (ibfd
)->e_ident
[EI_OSABI
];
11095 /* Copy object attributes. */
11096 _bfd_elf_copy_obj_attributes (ibfd
, obfd
);
11101 /* Values for Tag_ABI_PCS_R9_use. */
11110 /* Values for Tag_ABI_PCS_RW_data. */
11113 AEABI_PCS_RW_data_absolute
,
11114 AEABI_PCS_RW_data_PCrel
,
11115 AEABI_PCS_RW_data_SBrel
,
11116 AEABI_PCS_RW_data_unused
11119 /* Values for Tag_ABI_enum_size. */
11125 AEABI_enum_forced_wide
11128 /* Determine whether an object attribute tag takes an integer, a
11132 elf32_arm_obj_attrs_arg_type (int tag
)
11134 if (tag
== Tag_compatibility
)
11135 return ATTR_TYPE_FLAG_INT_VAL
| ATTR_TYPE_FLAG_STR_VAL
;
11136 else if (tag
== Tag_nodefaults
)
11137 return ATTR_TYPE_FLAG_INT_VAL
| ATTR_TYPE_FLAG_NO_DEFAULT
;
11138 else if (tag
== Tag_CPU_raw_name
|| tag
== Tag_CPU_name
)
11139 return ATTR_TYPE_FLAG_STR_VAL
;
11141 return ATTR_TYPE_FLAG_INT_VAL
;
11143 return (tag
& 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL
: ATTR_TYPE_FLAG_INT_VAL
;
11146 /* The ABI defines that Tag_conformance should be emitted first, and that
11147 Tag_nodefaults should be second (if either is defined). This sets those
11148 two positions, and bumps up the position of all the remaining tags to
11151 elf32_arm_obj_attrs_order (int num
)
11153 if (num
== LEAST_KNOWN_OBJ_ATTRIBUTE
)
11154 return Tag_conformance
;
11155 if (num
== LEAST_KNOWN_OBJ_ATTRIBUTE
+ 1)
11156 return Tag_nodefaults
;
11157 if ((num
- 2) < Tag_nodefaults
)
11159 if ((num
- 1) < Tag_conformance
)
11164 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
11166 elf32_arm_obj_attrs_handle_unknown (bfd
*abfd
, int tag
)
11168 if ((tag
& 127) < 64)
11171 (_("%B: Unknown mandatory EABI object attribute %d"),
11173 bfd_set_error (bfd_error_bad_value
);
11179 (_("Warning: %B: Unknown EABI object attribute %d"),
11185 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
11186 Returns -1 if no architecture could be read. */
11189 get_secondary_compatible_arch (bfd
*abfd
)
11191 obj_attribute
*attr
=
11192 &elf_known_obj_attributes_proc (abfd
)[Tag_also_compatible_with
];
11194 /* Note: the tag and its argument below are uleb128 values, though
11195 currently-defined values fit in one byte for each. */
11197 && attr
->s
[0] == Tag_CPU_arch
11198 && (attr
->s
[1] & 128) != 128
11199 && attr
->s
[2] == 0)
11202 /* This tag is "safely ignorable", so don't complain if it looks funny. */
11206 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
11207 The tag is removed if ARCH is -1. */
11210 set_secondary_compatible_arch (bfd
*abfd
, int arch
)
11212 obj_attribute
*attr
=
11213 &elf_known_obj_attributes_proc (abfd
)[Tag_also_compatible_with
];
11221 /* Note: the tag and its argument below are uleb128 values, though
11222 currently-defined values fit in one byte for each. */
11224 attr
->s
= (char *) bfd_alloc (abfd
, 3);
11225 attr
->s
[0] = Tag_CPU_arch
;
11230 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
11234 tag_cpu_arch_combine (bfd
*ibfd
, int oldtag
, int *secondary_compat_out
,
11235 int newtag
, int secondary_compat
)
11237 #define T(X) TAG_CPU_ARCH_##X
11238 int tagl
, tagh
, result
;
11241 T(V6T2
), /* PRE_V4. */
11243 T(V6T2
), /* V4T. */
11244 T(V6T2
), /* V5T. */
11245 T(V6T2
), /* V5TE. */
11246 T(V6T2
), /* V5TEJ. */
11249 T(V6T2
) /* V6T2. */
11253 T(V6K
), /* PRE_V4. */
11257 T(V6K
), /* V5TE. */
11258 T(V6K
), /* V5TEJ. */
11260 T(V6KZ
), /* V6KZ. */
11266 T(V7
), /* PRE_V4. */
11271 T(V7
), /* V5TEJ. */
11284 T(V6K
), /* V5TE. */
11285 T(V6K
), /* V5TEJ. */
11287 T(V6KZ
), /* V6KZ. */
11291 T(V6_M
) /* V6_M. */
11293 const int v6s_m
[] =
11299 T(V6K
), /* V5TE. */
11300 T(V6K
), /* V5TEJ. */
11302 T(V6KZ
), /* V6KZ. */
11306 T(V6S_M
), /* V6_M. */
11307 T(V6S_M
) /* V6S_M. */
11309 const int v7e_m
[] =
11313 T(V7E_M
), /* V4T. */
11314 T(V7E_M
), /* V5T. */
11315 T(V7E_M
), /* V5TE. */
11316 T(V7E_M
), /* V5TEJ. */
11317 T(V7E_M
), /* V6. */
11318 T(V7E_M
), /* V6KZ. */
11319 T(V7E_M
), /* V6T2. */
11320 T(V7E_M
), /* V6K. */
11321 T(V7E_M
), /* V7. */
11322 T(V7E_M
), /* V6_M. */
11323 T(V7E_M
), /* V6S_M. */
11324 T(V7E_M
) /* V7E_M. */
11328 T(V8
), /* PRE_V4. */
11333 T(V8
), /* V5TEJ. */
11340 T(V8
), /* V6S_M. */
11341 T(V8
), /* V7E_M. */
11344 const int v4t_plus_v6_m
[] =
11350 T(V5TE
), /* V5TE. */
11351 T(V5TEJ
), /* V5TEJ. */
11353 T(V6KZ
), /* V6KZ. */
11354 T(V6T2
), /* V6T2. */
11357 T(V6_M
), /* V6_M. */
11358 T(V6S_M
), /* V6S_M. */
11359 T(V7E_M
), /* V7E_M. */
11361 T(V4T_PLUS_V6_M
) /* V4T plus V6_M. */
11363 const int *comb
[] =
11372 /* Pseudo-architecture. */
11376 /* Check we've not got a higher architecture than we know about. */
11378 if (oldtag
> MAX_TAG_CPU_ARCH
|| newtag
> MAX_TAG_CPU_ARCH
)
11380 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd
);
11384 /* Override old tag if we have a Tag_also_compatible_with on the output. */
11386 if ((oldtag
== T(V6_M
) && *secondary_compat_out
== T(V4T
))
11387 || (oldtag
== T(V4T
) && *secondary_compat_out
== T(V6_M
)))
11388 oldtag
= T(V4T_PLUS_V6_M
);
11390 /* And override the new tag if we have a Tag_also_compatible_with on the
11393 if ((newtag
== T(V6_M
) && secondary_compat
== T(V4T
))
11394 || (newtag
== T(V4T
) && secondary_compat
== T(V6_M
)))
11395 newtag
= T(V4T_PLUS_V6_M
);
11397 tagl
= (oldtag
< newtag
) ? oldtag
: newtag
;
11398 result
= tagh
= (oldtag
> newtag
) ? oldtag
: newtag
;
11400 /* Architectures before V6KZ add features monotonically. */
11401 if (tagh
<= TAG_CPU_ARCH_V6KZ
)
11404 result
= comb
[tagh
- T(V6T2
)][tagl
];
11406 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
11407 as the canonical version. */
11408 if (result
== T(V4T_PLUS_V6_M
))
11411 *secondary_compat_out
= T(V6_M
);
11414 *secondary_compat_out
= -1;
11418 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
11419 ibfd
, oldtag
, newtag
);
11427 /* Query attributes object to see if integer divide instructions may be
11428 present in an object. */
11430 elf32_arm_attributes_accept_div (const obj_attribute
*attr
)
11432 int arch
= attr
[Tag_CPU_arch
].i
;
11433 int profile
= attr
[Tag_CPU_arch_profile
].i
;
11435 switch (attr
[Tag_DIV_use
].i
)
11438 /* Integer divide allowed if instruction contained in archetecture. */
11439 if (arch
== TAG_CPU_ARCH_V7
&& (profile
== 'R' || profile
== 'M'))
11441 else if (arch
>= TAG_CPU_ARCH_V7E_M
)
11447 /* Integer divide explicitly prohibited. */
11451 /* Unrecognised case - treat as allowing divide everywhere. */
11453 /* Integer divide allowed in ARM state. */
11458 /* Query attributes object to see if integer divide instructions are
11459 forbidden to be in the object. This is not the inverse of
11460 elf32_arm_attributes_accept_div. */
11462 elf32_arm_attributes_forbid_div (const obj_attribute
*attr
)
11464 return attr
[Tag_DIV_use
].i
== 1;
11467 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
11468 are conflicting attributes. */
11471 elf32_arm_merge_eabi_attributes (bfd
*ibfd
, bfd
*obfd
)
11473 obj_attribute
*in_attr
;
11474 obj_attribute
*out_attr
;
11475 /* Some tags have 0 = don't care, 1 = strong requirement,
11476 2 = weak requirement. */
11477 static const int order_021
[3] = {0, 2, 1};
11479 bfd_boolean result
= TRUE
;
11481 /* Skip the linker stubs file. This preserves previous behavior
11482 of accepting unknown attributes in the first input file - but
11484 if (ibfd
->flags
& BFD_LINKER_CREATED
)
11487 if (!elf_known_obj_attributes_proc (obfd
)[0].i
)
11489 /* This is the first object. Copy the attributes. */
11490 _bfd_elf_copy_obj_attributes (ibfd
, obfd
);
11492 out_attr
= elf_known_obj_attributes_proc (obfd
);
11494 /* Use the Tag_null value to indicate the attributes have been
11498 /* We do not output objects with Tag_MPextension_use_legacy - we move
11499 the attribute's value to Tag_MPextension_use. */
11500 if (out_attr
[Tag_MPextension_use_legacy
].i
!= 0)
11502 if (out_attr
[Tag_MPextension_use
].i
!= 0
11503 && out_attr
[Tag_MPextension_use_legacy
].i
11504 != out_attr
[Tag_MPextension_use
].i
)
11507 (_("Error: %B has both the current and legacy "
11508 "Tag_MPextension_use attributes"), ibfd
);
11512 out_attr
[Tag_MPextension_use
] =
11513 out_attr
[Tag_MPextension_use_legacy
];
11514 out_attr
[Tag_MPextension_use_legacy
].type
= 0;
11515 out_attr
[Tag_MPextension_use_legacy
].i
= 0;
11521 in_attr
= elf_known_obj_attributes_proc (ibfd
);
11522 out_attr
= elf_known_obj_attributes_proc (obfd
);
11523 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
11524 if (in_attr
[Tag_ABI_VFP_args
].i
!= out_attr
[Tag_ABI_VFP_args
].i
)
11526 /* Ignore mismatches if the object doesn't use floating point. */
11527 if (out_attr
[Tag_ABI_FP_number_model
].i
== 0)
11528 out_attr
[Tag_ABI_VFP_args
].i
= in_attr
[Tag_ABI_VFP_args
].i
;
11529 else if (in_attr
[Tag_ABI_FP_number_model
].i
!= 0)
11532 (_("error: %B uses VFP register arguments, %B does not"),
11533 in_attr
[Tag_ABI_VFP_args
].i
? ibfd
: obfd
,
11534 in_attr
[Tag_ABI_VFP_args
].i
? obfd
: ibfd
);
11539 for (i
= LEAST_KNOWN_OBJ_ATTRIBUTE
; i
< NUM_KNOWN_OBJ_ATTRIBUTES
; i
++)
11541 /* Merge this attribute with existing attributes. */
11544 case Tag_CPU_raw_name
:
11546 /* These are merged after Tag_CPU_arch. */
11549 case Tag_ABI_optimization_goals
:
11550 case Tag_ABI_FP_optimization_goals
:
11551 /* Use the first value seen. */
11556 int secondary_compat
= -1, secondary_compat_out
= -1;
11557 unsigned int saved_out_attr
= out_attr
[i
].i
;
11558 static const char *name_table
[] = {
11559 /* These aren't real CPU names, but we can't guess
11560 that from the architecture version alone. */
11577 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
11578 secondary_compat
= get_secondary_compatible_arch (ibfd
);
11579 secondary_compat_out
= get_secondary_compatible_arch (obfd
);
11580 out_attr
[i
].i
= tag_cpu_arch_combine (ibfd
, out_attr
[i
].i
,
11581 &secondary_compat_out
,
11584 set_secondary_compatible_arch (obfd
, secondary_compat_out
);
11586 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
11587 if (out_attr
[i
].i
== saved_out_attr
)
11588 ; /* Leave the names alone. */
11589 else if (out_attr
[i
].i
== in_attr
[i
].i
)
11591 /* The output architecture has been changed to match the
11592 input architecture. Use the input names. */
11593 out_attr
[Tag_CPU_name
].s
= in_attr
[Tag_CPU_name
].s
11594 ? _bfd_elf_attr_strdup (obfd
, in_attr
[Tag_CPU_name
].s
)
11596 out_attr
[Tag_CPU_raw_name
].s
= in_attr
[Tag_CPU_raw_name
].s
11597 ? _bfd_elf_attr_strdup (obfd
, in_attr
[Tag_CPU_raw_name
].s
)
11602 out_attr
[Tag_CPU_name
].s
= NULL
;
11603 out_attr
[Tag_CPU_raw_name
].s
= NULL
;
11606 /* If we still don't have a value for Tag_CPU_name,
11607 make one up now. Tag_CPU_raw_name remains blank. */
11608 if (out_attr
[Tag_CPU_name
].s
== NULL
11609 && out_attr
[i
].i
< ARRAY_SIZE (name_table
))
11610 out_attr
[Tag_CPU_name
].s
=
11611 _bfd_elf_attr_strdup (obfd
, name_table
[out_attr
[i
].i
]);
11615 case Tag_ARM_ISA_use
:
11616 case Tag_THUMB_ISA_use
:
11617 case Tag_WMMX_arch
:
11618 case Tag_Advanced_SIMD_arch
:
11619 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
11620 case Tag_ABI_FP_rounding
:
11621 case Tag_ABI_FP_exceptions
:
11622 case Tag_ABI_FP_user_exceptions
:
11623 case Tag_ABI_FP_number_model
:
11624 case Tag_FP_HP_extension
:
11625 case Tag_CPU_unaligned_access
:
11627 case Tag_MPextension_use
:
11628 /* Use the largest value specified. */
11629 if (in_attr
[i
].i
> out_attr
[i
].i
)
11630 out_attr
[i
].i
= in_attr
[i
].i
;
11633 case Tag_ABI_align_preserved
:
11634 case Tag_ABI_PCS_RO_data
:
11635 /* Use the smallest value specified. */
11636 if (in_attr
[i
].i
< out_attr
[i
].i
)
11637 out_attr
[i
].i
= in_attr
[i
].i
;
11640 case Tag_ABI_align_needed
:
11641 if ((in_attr
[i
].i
> 0 || out_attr
[i
].i
> 0)
11642 && (in_attr
[Tag_ABI_align_preserved
].i
== 0
11643 || out_attr
[Tag_ABI_align_preserved
].i
== 0))
11645 /* This error message should be enabled once all non-conformant
11646 binaries in the toolchain have had the attributes set
11649 (_("error: %B: 8-byte data alignment conflicts with %B"),
11653 /* Fall through. */
11654 case Tag_ABI_FP_denormal
:
11655 case Tag_ABI_PCS_GOT_use
:
11656 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
11657 value if greater than 2 (for future-proofing). */
11658 if ((in_attr
[i
].i
> 2 && in_attr
[i
].i
> out_attr
[i
].i
)
11659 || (in_attr
[i
].i
<= 2 && out_attr
[i
].i
<= 2
11660 && order_021
[in_attr
[i
].i
] > order_021
[out_attr
[i
].i
]))
11661 out_attr
[i
].i
= in_attr
[i
].i
;
11664 case Tag_Virtualization_use
:
11665 /* The virtualization tag effectively stores two bits of
11666 information: the intended use of TrustZone (in bit 0), and the
11667 intended use of Virtualization (in bit 1). */
11668 if (out_attr
[i
].i
== 0)
11669 out_attr
[i
].i
= in_attr
[i
].i
;
11670 else if (in_attr
[i
].i
!= 0
11671 && in_attr
[i
].i
!= out_attr
[i
].i
)
11673 if (in_attr
[i
].i
<= 3 && out_attr
[i
].i
<= 3)
11678 (_("error: %B: unable to merge virtualization attributes "
11686 case Tag_CPU_arch_profile
:
11687 if (out_attr
[i
].i
!= in_attr
[i
].i
)
11689 /* 0 will merge with anything.
11690 'A' and 'S' merge to 'A'.
11691 'R' and 'S' merge to 'R'.
11692 'M' and 'A|R|S' is an error. */
11693 if (out_attr
[i
].i
== 0
11694 || (out_attr
[i
].i
== 'S'
11695 && (in_attr
[i
].i
== 'A' || in_attr
[i
].i
== 'R')))
11696 out_attr
[i
].i
= in_attr
[i
].i
;
11697 else if (in_attr
[i
].i
== 0
11698 || (in_attr
[i
].i
== 'S'
11699 && (out_attr
[i
].i
== 'A' || out_attr
[i
].i
== 'R')))
11700 ; /* Do nothing. */
11704 (_("error: %B: Conflicting architecture profiles %c/%c"),
11706 in_attr
[i
].i
? in_attr
[i
].i
: '0',
11707 out_attr
[i
].i
? out_attr
[i
].i
: '0');
11714 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
11715 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
11716 when it's 0. It might mean absence of FP hardware if
11717 Tag_FP_arch is zero, otherwise it is effectively SP + DP. */
11719 #define VFP_VERSION_COUNT 8
11720 static const struct
11724 } vfp_versions
[VFP_VERSION_COUNT
] =
11739 /* If the output has no requirement about FP hardware,
11740 follow the requirement of the input. */
11741 if (out_attr
[i
].i
== 0)
11743 BFD_ASSERT (out_attr
[Tag_ABI_HardFP_use
].i
== 0);
11744 out_attr
[i
].i
= in_attr
[i
].i
;
11745 out_attr
[Tag_ABI_HardFP_use
].i
11746 = in_attr
[Tag_ABI_HardFP_use
].i
;
11749 /* If the input has no requirement about FP hardware, do
11751 else if (in_attr
[i
].i
== 0)
11753 BFD_ASSERT (in_attr
[Tag_ABI_HardFP_use
].i
== 0);
11757 /* Both the input and the output have nonzero Tag_FP_arch.
11758 So Tag_ABI_HardFP_use is (SP & DP) when it's zero. */
11760 /* If both the input and the output have zero Tag_ABI_HardFP_use,
11762 if (in_attr
[Tag_ABI_HardFP_use
].i
== 0
11763 && out_attr
[Tag_ABI_HardFP_use
].i
== 0)
11765 /* If the input and the output have different Tag_ABI_HardFP_use,
11766 the combination of them is 3 (SP & DP). */
11767 else if (in_attr
[Tag_ABI_HardFP_use
].i
11768 != out_attr
[Tag_ABI_HardFP_use
].i
)
11769 out_attr
[Tag_ABI_HardFP_use
].i
= 3;
11771 /* Now we can handle Tag_FP_arch. */
11773 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
11774 pick the biggest. */
11775 if (in_attr
[i
].i
>= VFP_VERSION_COUNT
11776 && in_attr
[i
].i
> out_attr
[i
].i
)
11778 out_attr
[i
] = in_attr
[i
];
11781 /* The output uses the superset of input features
11782 (ISA version) and registers. */
11783 ver
= vfp_versions
[in_attr
[i
].i
].ver
;
11784 if (ver
< vfp_versions
[out_attr
[i
].i
].ver
)
11785 ver
= vfp_versions
[out_attr
[i
].i
].ver
;
11786 regs
= vfp_versions
[in_attr
[i
].i
].regs
;
11787 if (regs
< vfp_versions
[out_attr
[i
].i
].regs
)
11788 regs
= vfp_versions
[out_attr
[i
].i
].regs
;
11789 /* This assumes all possible supersets are also a valid
11791 for (newval
= VFP_VERSION_COUNT
- 1; newval
> 0; newval
--)
11793 if (regs
== vfp_versions
[newval
].regs
11794 && ver
== vfp_versions
[newval
].ver
)
11797 out_attr
[i
].i
= newval
;
11800 case Tag_PCS_config
:
11801 if (out_attr
[i
].i
== 0)
11802 out_attr
[i
].i
= in_attr
[i
].i
;
11803 else if (in_attr
[i
].i
!= 0 && out_attr
[i
].i
!= in_attr
[i
].i
)
11805 /* It's sometimes ok to mix different configs, so this is only
11808 (_("Warning: %B: Conflicting platform configuration"), ibfd
);
11811 case Tag_ABI_PCS_R9_use
:
11812 if (in_attr
[i
].i
!= out_attr
[i
].i
11813 && out_attr
[i
].i
!= AEABI_R9_unused
11814 && in_attr
[i
].i
!= AEABI_R9_unused
)
11817 (_("error: %B: Conflicting use of R9"), ibfd
);
11820 if (out_attr
[i
].i
== AEABI_R9_unused
)
11821 out_attr
[i
].i
= in_attr
[i
].i
;
11823 case Tag_ABI_PCS_RW_data
:
11824 if (in_attr
[i
].i
== AEABI_PCS_RW_data_SBrel
11825 && out_attr
[Tag_ABI_PCS_R9_use
].i
!= AEABI_R9_SB
11826 && out_attr
[Tag_ABI_PCS_R9_use
].i
!= AEABI_R9_unused
)
11829 (_("error: %B: SB relative addressing conflicts with use of R9"),
11833 /* Use the smallest value specified. */
11834 if (in_attr
[i
].i
< out_attr
[i
].i
)
11835 out_attr
[i
].i
= in_attr
[i
].i
;
11837 case Tag_ABI_PCS_wchar_t
:
11838 if (out_attr
[i
].i
&& in_attr
[i
].i
&& out_attr
[i
].i
!= in_attr
[i
].i
11839 && !elf_arm_tdata (obfd
)->no_wchar_size_warning
)
11842 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
11843 ibfd
, in_attr
[i
].i
, out_attr
[i
].i
);
11845 else if (in_attr
[i
].i
&& !out_attr
[i
].i
)
11846 out_attr
[i
].i
= in_attr
[i
].i
;
11848 case Tag_ABI_enum_size
:
11849 if (in_attr
[i
].i
!= AEABI_enum_unused
)
11851 if (out_attr
[i
].i
== AEABI_enum_unused
11852 || out_attr
[i
].i
== AEABI_enum_forced_wide
)
11854 /* The existing object is compatible with anything.
11855 Use whatever requirements the new object has. */
11856 out_attr
[i
].i
= in_attr
[i
].i
;
11858 else if (in_attr
[i
].i
!= AEABI_enum_forced_wide
11859 && out_attr
[i
].i
!= in_attr
[i
].i
11860 && !elf_arm_tdata (obfd
)->no_enum_size_warning
)
11862 static const char *aeabi_enum_names
[] =
11863 { "", "variable-size", "32-bit", "" };
11864 const char *in_name
=
11865 in_attr
[i
].i
< ARRAY_SIZE(aeabi_enum_names
)
11866 ? aeabi_enum_names
[in_attr
[i
].i
]
11868 const char *out_name
=
11869 out_attr
[i
].i
< ARRAY_SIZE(aeabi_enum_names
)
11870 ? aeabi_enum_names
[out_attr
[i
].i
]
11873 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
11874 ibfd
, in_name
, out_name
);
11878 case Tag_ABI_VFP_args
:
11881 case Tag_ABI_WMMX_args
:
11882 if (in_attr
[i
].i
!= out_attr
[i
].i
)
11885 (_("error: %B uses iWMMXt register arguments, %B does not"),
11890 case Tag_compatibility
:
11891 /* Merged in target-independent code. */
11893 case Tag_ABI_HardFP_use
:
11894 /* This is handled along with Tag_FP_arch. */
11896 case Tag_ABI_FP_16bit_format
:
11897 if (in_attr
[i
].i
!= 0 && out_attr
[i
].i
!= 0)
11899 if (in_attr
[i
].i
!= out_attr
[i
].i
)
11902 (_("error: fp16 format mismatch between %B and %B"),
11907 if (in_attr
[i
].i
!= 0)
11908 out_attr
[i
].i
= in_attr
[i
].i
;
11912 /* A value of zero on input means that the divide instruction may
11913 be used if available in the base architecture as specified via
11914 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
11915 the user did not want divide instructions. A value of 2
11916 explicitly means that divide instructions were allowed in ARM
11917 and Thumb state. */
11918 if (in_attr
[i
].i
== out_attr
[i
].i
)
11919 /* Do nothing. */ ;
11920 else if (elf32_arm_attributes_forbid_div (in_attr
)
11921 && !elf32_arm_attributes_accept_div (out_attr
))
11923 else if (elf32_arm_attributes_forbid_div (out_attr
)
11924 && elf32_arm_attributes_accept_div (in_attr
))
11925 out_attr
[i
].i
= in_attr
[i
].i
;
11926 else if (in_attr
[i
].i
== 2)
11927 out_attr
[i
].i
= in_attr
[i
].i
;
11930 case Tag_MPextension_use_legacy
:
11931 /* We don't output objects with Tag_MPextension_use_legacy - we
11932 move the value to Tag_MPextension_use. */
11933 if (in_attr
[i
].i
!= 0 && in_attr
[Tag_MPextension_use
].i
!= 0)
11935 if (in_attr
[Tag_MPextension_use
].i
!= in_attr
[i
].i
)
11938 (_("%B has has both the current and legacy "
11939 "Tag_MPextension_use attributes"),
11945 if (in_attr
[i
].i
> out_attr
[Tag_MPextension_use
].i
)
11946 out_attr
[Tag_MPextension_use
] = in_attr
[i
];
11950 case Tag_nodefaults
:
11951 /* This tag is set if it exists, but the value is unused (and is
11952 typically zero). We don't actually need to do anything here -
11953 the merge happens automatically when the type flags are merged
11956 case Tag_also_compatible_with
:
11957 /* Already done in Tag_CPU_arch. */
11959 case Tag_conformance
:
11960 /* Keep the attribute if it matches. Throw it away otherwise.
11961 No attribute means no claim to conform. */
11962 if (!in_attr
[i
].s
|| !out_attr
[i
].s
11963 || strcmp (in_attr
[i
].s
, out_attr
[i
].s
) != 0)
11964 out_attr
[i
].s
= NULL
;
11969 = result
&& _bfd_elf_merge_unknown_attribute_low (ibfd
, obfd
, i
);
11972 /* If out_attr was copied from in_attr then it won't have a type yet. */
11973 if (in_attr
[i
].type
&& !out_attr
[i
].type
)
11974 out_attr
[i
].type
= in_attr
[i
].type
;
11977 /* Merge Tag_compatibility attributes and any common GNU ones. */
11978 if (!_bfd_elf_merge_object_attributes (ibfd
, obfd
))
11981 /* Check for any attributes not known on ARM. */
11982 result
&= _bfd_elf_merge_unknown_attribute_list (ibfd
, obfd
);
11988 /* Return TRUE if the two EABI versions are incompatible. */
11991 elf32_arm_versions_compatible (unsigned iver
, unsigned over
)
11993 /* v4 and v5 are the same spec before and after it was released,
11994 so allow mixing them. */
11995 if ((iver
== EF_ARM_EABI_VER4
&& over
== EF_ARM_EABI_VER5
)
11996 || (iver
== EF_ARM_EABI_VER5
&& over
== EF_ARM_EABI_VER4
))
11999 return (iver
== over
);
12002 /* Merge backend specific data from an object file to the output
12003 object file when linking. */
12006 elf32_arm_merge_private_bfd_data (bfd
* ibfd
, bfd
* obfd
);
12008 /* Display the flags field. */
12011 elf32_arm_print_private_bfd_data (bfd
*abfd
, void * ptr
)
12013 FILE * file
= (FILE *) ptr
;
12014 unsigned long flags
;
12016 BFD_ASSERT (abfd
!= NULL
&& ptr
!= NULL
);
12018 /* Print normal ELF private data. */
12019 _bfd_elf_print_private_bfd_data (abfd
, ptr
);
12021 flags
= elf_elfheader (abfd
)->e_flags
;
12022 /* Ignore init flag - it may not be set, despite the flags field
12023 containing valid data. */
12025 /* xgettext:c-format */
12026 fprintf (file
, _("private flags = %lx:"), elf_elfheader (abfd
)->e_flags
);
12028 switch (EF_ARM_EABI_VERSION (flags
))
12030 case EF_ARM_EABI_UNKNOWN
:
12031 /* The following flag bits are GNU extensions and not part of the
12032 official ARM ELF extended ABI. Hence they are only decoded if
12033 the EABI version is not set. */
12034 if (flags
& EF_ARM_INTERWORK
)
12035 fprintf (file
, _(" [interworking enabled]"));
12037 if (flags
& EF_ARM_APCS_26
)
12038 fprintf (file
, " [APCS-26]");
12040 fprintf (file
, " [APCS-32]");
12042 if (flags
& EF_ARM_VFP_FLOAT
)
12043 fprintf (file
, _(" [VFP float format]"));
12044 else if (flags
& EF_ARM_MAVERICK_FLOAT
)
12045 fprintf (file
, _(" [Maverick float format]"));
12047 fprintf (file
, _(" [FPA float format]"));
12049 if (flags
& EF_ARM_APCS_FLOAT
)
12050 fprintf (file
, _(" [floats passed in float registers]"));
12052 if (flags
& EF_ARM_PIC
)
12053 fprintf (file
, _(" [position independent]"));
12055 if (flags
& EF_ARM_NEW_ABI
)
12056 fprintf (file
, _(" [new ABI]"));
12058 if (flags
& EF_ARM_OLD_ABI
)
12059 fprintf (file
, _(" [old ABI]"));
12061 if (flags
& EF_ARM_SOFT_FLOAT
)
12062 fprintf (file
, _(" [software FP]"));
12064 flags
&= ~(EF_ARM_INTERWORK
| EF_ARM_APCS_26
| EF_ARM_APCS_FLOAT
12065 | EF_ARM_PIC
| EF_ARM_NEW_ABI
| EF_ARM_OLD_ABI
12066 | EF_ARM_SOFT_FLOAT
| EF_ARM_VFP_FLOAT
12067 | EF_ARM_MAVERICK_FLOAT
);
12070 case EF_ARM_EABI_VER1
:
12071 fprintf (file
, _(" [Version1 EABI]"));
12073 if (flags
& EF_ARM_SYMSARESORTED
)
12074 fprintf (file
, _(" [sorted symbol table]"));
12076 fprintf (file
, _(" [unsorted symbol table]"));
12078 flags
&= ~ EF_ARM_SYMSARESORTED
;
12081 case EF_ARM_EABI_VER2
:
12082 fprintf (file
, _(" [Version2 EABI]"));
12084 if (flags
& EF_ARM_SYMSARESORTED
)
12085 fprintf (file
, _(" [sorted symbol table]"));
12087 fprintf (file
, _(" [unsorted symbol table]"));
12089 if (flags
& EF_ARM_DYNSYMSUSESEGIDX
)
12090 fprintf (file
, _(" [dynamic symbols use segment index]"));
12092 if (flags
& EF_ARM_MAPSYMSFIRST
)
12093 fprintf (file
, _(" [mapping symbols precede others]"));
12095 flags
&= ~(EF_ARM_SYMSARESORTED
| EF_ARM_DYNSYMSUSESEGIDX
12096 | EF_ARM_MAPSYMSFIRST
);
12099 case EF_ARM_EABI_VER3
:
12100 fprintf (file
, _(" [Version3 EABI]"));
12103 case EF_ARM_EABI_VER4
:
12104 fprintf (file
, _(" [Version4 EABI]"));
12107 case EF_ARM_EABI_VER5
:
12108 fprintf (file
, _(" [Version5 EABI]"));
12110 if (flags
& EF_ARM_ABI_FLOAT_SOFT
)
12111 fprintf (file
, _(" [soft-float ABI]"));
12113 if (flags
& EF_ARM_ABI_FLOAT_HARD
)
12114 fprintf (file
, _(" [hard-float ABI]"));
12116 flags
&= ~(EF_ARM_ABI_FLOAT_SOFT
| EF_ARM_ABI_FLOAT_HARD
);
12119 if (flags
& EF_ARM_BE8
)
12120 fprintf (file
, _(" [BE8]"));
12122 if (flags
& EF_ARM_LE8
)
12123 fprintf (file
, _(" [LE8]"));
12125 flags
&= ~(EF_ARM_LE8
| EF_ARM_BE8
);
12129 fprintf (file
, _(" <EABI version unrecognised>"));
12133 flags
&= ~ EF_ARM_EABIMASK
;
12135 if (flags
& EF_ARM_RELEXEC
)
12136 fprintf (file
, _(" [relocatable executable]"));
12138 if (flags
& EF_ARM_HASENTRY
)
12139 fprintf (file
, _(" [has entry point]"));
12141 flags
&= ~ (EF_ARM_RELEXEC
| EF_ARM_HASENTRY
);
12144 fprintf (file
, _("<Unrecognised flag bits set>"));
12146 fputc ('\n', file
);
12152 elf32_arm_get_symbol_type (Elf_Internal_Sym
* elf_sym
, int type
)
12154 switch (ELF_ST_TYPE (elf_sym
->st_info
))
12156 case STT_ARM_TFUNC
:
12157 return ELF_ST_TYPE (elf_sym
->st_info
);
12159 case STT_ARM_16BIT
:
12160 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
12161 This allows us to distinguish between data used by Thumb instructions
12162 and non-data (which is probably code) inside Thumb regions of an
12164 if (type
!= STT_OBJECT
&& type
!= STT_TLS
)
12165 return ELF_ST_TYPE (elf_sym
->st_info
);
12176 elf32_arm_gc_mark_hook (asection
*sec
,
12177 struct bfd_link_info
*info
,
12178 Elf_Internal_Rela
*rel
,
12179 struct elf_link_hash_entry
*h
,
12180 Elf_Internal_Sym
*sym
)
12183 switch (ELF32_R_TYPE (rel
->r_info
))
12185 case R_ARM_GNU_VTINHERIT
:
12186 case R_ARM_GNU_VTENTRY
:
12190 return _bfd_elf_gc_mark_hook (sec
, info
, rel
, h
, sym
);
12193 /* Update the got entry reference counts for the section being removed. */
12196 elf32_arm_gc_sweep_hook (bfd
* abfd
,
12197 struct bfd_link_info
* info
,
12199 const Elf_Internal_Rela
* relocs
)
12201 Elf_Internal_Shdr
*symtab_hdr
;
12202 struct elf_link_hash_entry
**sym_hashes
;
12203 bfd_signed_vma
*local_got_refcounts
;
12204 const Elf_Internal_Rela
*rel
, *relend
;
12205 struct elf32_arm_link_hash_table
* globals
;
12207 if (info
->relocatable
)
12210 globals
= elf32_arm_hash_table (info
);
12211 if (globals
== NULL
)
12214 elf_section_data (sec
)->local_dynrel
= NULL
;
12216 symtab_hdr
= & elf_symtab_hdr (abfd
);
12217 sym_hashes
= elf_sym_hashes (abfd
);
12218 local_got_refcounts
= elf_local_got_refcounts (abfd
);
12220 check_use_blx (globals
);
12222 relend
= relocs
+ sec
->reloc_count
;
12223 for (rel
= relocs
; rel
< relend
; rel
++)
12225 unsigned long r_symndx
;
12226 struct elf_link_hash_entry
*h
= NULL
;
12227 struct elf32_arm_link_hash_entry
*eh
;
12229 bfd_boolean call_reloc_p
;
12230 bfd_boolean may_become_dynamic_p
;
12231 bfd_boolean may_need_local_target_p
;
12232 union gotplt_union
*root_plt
;
12233 struct arm_plt_info
*arm_plt
;
12235 r_symndx
= ELF32_R_SYM (rel
->r_info
);
12236 if (r_symndx
>= symtab_hdr
->sh_info
)
12238 h
= sym_hashes
[r_symndx
- symtab_hdr
->sh_info
];
12239 while (h
->root
.type
== bfd_link_hash_indirect
12240 || h
->root
.type
== bfd_link_hash_warning
)
12241 h
= (struct elf_link_hash_entry
*) h
->root
.u
.i
.link
;
12243 eh
= (struct elf32_arm_link_hash_entry
*) h
;
12245 call_reloc_p
= FALSE
;
12246 may_become_dynamic_p
= FALSE
;
12247 may_need_local_target_p
= FALSE
;
12249 r_type
= ELF32_R_TYPE (rel
->r_info
);
12250 r_type
= arm_real_reloc_type (globals
, r_type
);
12254 case R_ARM_GOT_PREL
:
12255 case R_ARM_TLS_GD32
:
12256 case R_ARM_TLS_IE32
:
12259 if (h
->got
.refcount
> 0)
12260 h
->got
.refcount
-= 1;
12262 else if (local_got_refcounts
!= NULL
)
12264 if (local_got_refcounts
[r_symndx
] > 0)
12265 local_got_refcounts
[r_symndx
] -= 1;
12269 case R_ARM_TLS_LDM32
:
12270 globals
->tls_ldm_got
.refcount
-= 1;
12278 case R_ARM_THM_CALL
:
12279 case R_ARM_THM_JUMP24
:
12280 case R_ARM_THM_JUMP19
:
12281 call_reloc_p
= TRUE
;
12282 may_need_local_target_p
= TRUE
;
12286 if (!globals
->vxworks_p
)
12288 may_need_local_target_p
= TRUE
;
12291 /* Fall through. */
12293 case R_ARM_ABS32_NOI
:
12295 case R_ARM_REL32_NOI
:
12296 case R_ARM_MOVW_ABS_NC
:
12297 case R_ARM_MOVT_ABS
:
12298 case R_ARM_MOVW_PREL_NC
:
12299 case R_ARM_MOVT_PREL
:
12300 case R_ARM_THM_MOVW_ABS_NC
:
12301 case R_ARM_THM_MOVT_ABS
:
12302 case R_ARM_THM_MOVW_PREL_NC
:
12303 case R_ARM_THM_MOVT_PREL
:
12304 /* Should the interworking branches be here also? */
12305 if ((info
->shared
|| globals
->root
.is_relocatable_executable
)
12306 && (sec
->flags
& SEC_ALLOC
) != 0)
12309 && (r_type
== R_ARM_REL32
|| r_type
== R_ARM_REL32_NOI
))
12311 call_reloc_p
= TRUE
;
12312 may_need_local_target_p
= TRUE
;
12315 may_become_dynamic_p
= TRUE
;
12318 may_need_local_target_p
= TRUE
;
12325 if (may_need_local_target_p
12326 && elf32_arm_get_plt_info (abfd
, eh
, r_symndx
, &root_plt
, &arm_plt
))
12328 /* If PLT refcount book-keeping is wrong and too low, we'll
12329 see a zero value (going to -1) for the root PLT reference
12331 if (root_plt
->refcount
>= 0)
12333 BFD_ASSERT (root_plt
->refcount
!= 0);
12334 root_plt
->refcount
-= 1;
12337 /* A value of -1 means the symbol has become local, forced
12338 or seeing a hidden definition. Any other negative value
12340 BFD_ASSERT (root_plt
->refcount
== -1);
12343 arm_plt
->noncall_refcount
--;
12345 if (r_type
== R_ARM_THM_CALL
)
12346 arm_plt
->maybe_thumb_refcount
--;
12348 if (r_type
== R_ARM_THM_JUMP24
12349 || r_type
== R_ARM_THM_JUMP19
)
12350 arm_plt
->thumb_refcount
--;
12353 if (may_become_dynamic_p
)
12355 struct elf_dyn_relocs
**pp
;
12356 struct elf_dyn_relocs
*p
;
12359 pp
= &(eh
->dyn_relocs
);
12362 Elf_Internal_Sym
*isym
;
12364 isym
= bfd_sym_from_r_symndx (&globals
->sym_cache
,
12368 pp
= elf32_arm_get_local_dynreloc_list (abfd
, r_symndx
, isym
);
12372 for (; (p
= *pp
) != NULL
; pp
= &p
->next
)
12375 /* Everything must go for SEC. */
12385 /* Look through the relocs for a section during the first phase. */
12388 elf32_arm_check_relocs (bfd
*abfd
, struct bfd_link_info
*info
,
12389 asection
*sec
, const Elf_Internal_Rela
*relocs
)
12391 Elf_Internal_Shdr
*symtab_hdr
;
12392 struct elf_link_hash_entry
**sym_hashes
;
12393 const Elf_Internal_Rela
*rel
;
12394 const Elf_Internal_Rela
*rel_end
;
12397 struct elf32_arm_link_hash_table
*htab
;
12398 bfd_boolean call_reloc_p
;
12399 bfd_boolean may_become_dynamic_p
;
12400 bfd_boolean may_need_local_target_p
;
12401 unsigned long nsyms
;
12403 if (info
->relocatable
)
12406 BFD_ASSERT (is_arm_elf (abfd
));
12408 htab
= elf32_arm_hash_table (info
);
12414 /* Create dynamic sections for relocatable executables so that we can
12415 copy relocations. */
12416 if (htab
->root
.is_relocatable_executable
12417 && ! htab
->root
.dynamic_sections_created
)
12419 if (! _bfd_elf_link_create_dynamic_sections (abfd
, info
))
12423 if (htab
->root
.dynobj
== NULL
)
12424 htab
->root
.dynobj
= abfd
;
12425 if (!create_ifunc_sections (info
))
12428 dynobj
= htab
->root
.dynobj
;
12430 symtab_hdr
= & elf_symtab_hdr (abfd
);
12431 sym_hashes
= elf_sym_hashes (abfd
);
12432 nsyms
= NUM_SHDR_ENTRIES (symtab_hdr
);
12434 rel_end
= relocs
+ sec
->reloc_count
;
12435 for (rel
= relocs
; rel
< rel_end
; rel
++)
12437 Elf_Internal_Sym
*isym
;
12438 struct elf_link_hash_entry
*h
;
12439 struct elf32_arm_link_hash_entry
*eh
;
12440 unsigned long r_symndx
;
12443 r_symndx
= ELF32_R_SYM (rel
->r_info
);
12444 r_type
= ELF32_R_TYPE (rel
->r_info
);
12445 r_type
= arm_real_reloc_type (htab
, r_type
);
12447 if (r_symndx
>= nsyms
12448 /* PR 9934: It is possible to have relocations that do not
12449 refer to symbols, thus it is also possible to have an
12450 object file containing relocations but no symbol table. */
12451 && (r_symndx
> STN_UNDEF
|| nsyms
> 0))
12453 (*_bfd_error_handler
) (_("%B: bad symbol index: %d"), abfd
,
12462 if (r_symndx
< symtab_hdr
->sh_info
)
12464 /* A local symbol. */
12465 isym
= bfd_sym_from_r_symndx (&htab
->sym_cache
,
12472 h
= sym_hashes
[r_symndx
- symtab_hdr
->sh_info
];
12473 while (h
->root
.type
== bfd_link_hash_indirect
12474 || h
->root
.type
== bfd_link_hash_warning
)
12475 h
= (struct elf_link_hash_entry
*) h
->root
.u
.i
.link
;
12477 /* PR15323, ref flags aren't set for references in the
12479 h
->root
.non_ir_ref
= 1;
12483 eh
= (struct elf32_arm_link_hash_entry
*) h
;
12485 call_reloc_p
= FALSE
;
12486 may_become_dynamic_p
= FALSE
;
12487 may_need_local_target_p
= FALSE
;
12489 /* Could be done earlier, if h were already available. */
12490 r_type
= elf32_arm_tls_transition (info
, r_type
, h
);
12494 case R_ARM_GOT_PREL
:
12495 case R_ARM_TLS_GD32
:
12496 case R_ARM_TLS_IE32
:
12497 case R_ARM_TLS_GOTDESC
:
12498 case R_ARM_TLS_DESCSEQ
:
12499 case R_ARM_THM_TLS_DESCSEQ
:
12500 case R_ARM_TLS_CALL
:
12501 case R_ARM_THM_TLS_CALL
:
12502 /* This symbol requires a global offset table entry. */
12504 int tls_type
, old_tls_type
;
12508 case R_ARM_TLS_GD32
: tls_type
= GOT_TLS_GD
; break;
12510 case R_ARM_TLS_IE32
: tls_type
= GOT_TLS_IE
; break;
12512 case R_ARM_TLS_GOTDESC
:
12513 case R_ARM_TLS_CALL
: case R_ARM_THM_TLS_CALL
:
12514 case R_ARM_TLS_DESCSEQ
: case R_ARM_THM_TLS_DESCSEQ
:
12515 tls_type
= GOT_TLS_GDESC
; break;
12517 default: tls_type
= GOT_NORMAL
; break;
12523 old_tls_type
= elf32_arm_hash_entry (h
)->tls_type
;
12527 /* This is a global offset table entry for a local symbol. */
12528 if (!elf32_arm_allocate_local_sym_info (abfd
))
12530 elf_local_got_refcounts (abfd
)[r_symndx
] += 1;
12531 old_tls_type
= elf32_arm_local_got_tls_type (abfd
) [r_symndx
];
12534 /* If a variable is accessed with both tls methods, two
12535 slots may be created. */
12536 if (GOT_TLS_GD_ANY_P (old_tls_type
)
12537 && GOT_TLS_GD_ANY_P (tls_type
))
12538 tls_type
|= old_tls_type
;
12540 /* We will already have issued an error message if there
12541 is a TLS/non-TLS mismatch, based on the symbol
12542 type. So just combine any TLS types needed. */
12543 if (old_tls_type
!= GOT_UNKNOWN
&& old_tls_type
!= GOT_NORMAL
12544 && tls_type
!= GOT_NORMAL
)
12545 tls_type
|= old_tls_type
;
12547 /* If the symbol is accessed in both IE and GDESC
12548 method, we're able to relax. Turn off the GDESC flag,
12549 without messing up with any other kind of tls types
12550 that may be involved */
12551 if ((tls_type
& GOT_TLS_IE
) && (tls_type
& GOT_TLS_GDESC
))
12552 tls_type
&= ~GOT_TLS_GDESC
;
12554 if (old_tls_type
!= tls_type
)
12557 elf32_arm_hash_entry (h
)->tls_type
= tls_type
;
12559 elf32_arm_local_got_tls_type (abfd
) [r_symndx
] = tls_type
;
12562 /* Fall through. */
12564 case R_ARM_TLS_LDM32
:
12565 if (r_type
== R_ARM_TLS_LDM32
)
12566 htab
->tls_ldm_got
.refcount
++;
12567 /* Fall through. */
12569 case R_ARM_GOTOFF32
:
12571 if (htab
->root
.sgot
== NULL
12572 && !create_got_section (htab
->root
.dynobj
, info
))
12581 case R_ARM_THM_CALL
:
12582 case R_ARM_THM_JUMP24
:
12583 case R_ARM_THM_JUMP19
:
12584 call_reloc_p
= TRUE
;
12585 may_need_local_target_p
= TRUE
;
12589 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
12590 ldr __GOTT_INDEX__ offsets. */
12591 if (!htab
->vxworks_p
)
12593 may_need_local_target_p
= TRUE
;
12596 /* Fall through. */
12598 case R_ARM_MOVW_ABS_NC
:
12599 case R_ARM_MOVT_ABS
:
12600 case R_ARM_THM_MOVW_ABS_NC
:
12601 case R_ARM_THM_MOVT_ABS
:
12604 (*_bfd_error_handler
)
12605 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
12606 abfd
, elf32_arm_howto_table_1
[r_type
].name
,
12607 (h
) ? h
->root
.root
.string
: "a local symbol");
12608 bfd_set_error (bfd_error_bad_value
);
12612 /* Fall through. */
12614 case R_ARM_ABS32_NOI
:
12616 case R_ARM_REL32_NOI
:
12617 case R_ARM_MOVW_PREL_NC
:
12618 case R_ARM_MOVT_PREL
:
12619 case R_ARM_THM_MOVW_PREL_NC
:
12620 case R_ARM_THM_MOVT_PREL
:
12622 /* Should the interworking branches be listed here? */
12623 if ((info
->shared
|| htab
->root
.is_relocatable_executable
)
12624 && (sec
->flags
& SEC_ALLOC
) != 0)
12627 && (r_type
== R_ARM_REL32
|| r_type
== R_ARM_REL32_NOI
))
12629 /* In shared libraries and relocatable executables,
12630 we treat local relative references as calls;
12631 see the related SYMBOL_CALLS_LOCAL code in
12632 allocate_dynrelocs. */
12633 call_reloc_p
= TRUE
;
12634 may_need_local_target_p
= TRUE
;
12637 /* We are creating a shared library or relocatable
12638 executable, and this is a reloc against a global symbol,
12639 or a non-PC-relative reloc against a local symbol.
12640 We may need to copy the reloc into the output. */
12641 may_become_dynamic_p
= TRUE
;
12644 may_need_local_target_p
= TRUE
;
12647 /* This relocation describes the C++ object vtable hierarchy.
12648 Reconstruct it for later use during GC. */
12649 case R_ARM_GNU_VTINHERIT
:
12650 if (!bfd_elf_gc_record_vtinherit (abfd
, sec
, h
, rel
->r_offset
))
12654 /* This relocation describes which C++ vtable entries are actually
12655 used. Record for later use during GC. */
12656 case R_ARM_GNU_VTENTRY
:
12657 BFD_ASSERT (h
!= NULL
);
12659 && !bfd_elf_gc_record_vtentry (abfd
, sec
, h
, rel
->r_offset
))
12667 /* We may need a .plt entry if the function this reloc
12668 refers to is in a different object, regardless of the
12669 symbol's type. We can't tell for sure yet, because
12670 something later might force the symbol local. */
12672 else if (may_need_local_target_p
)
12673 /* If this reloc is in a read-only section, we might
12674 need a copy reloc. We can't check reliably at this
12675 stage whether the section is read-only, as input
12676 sections have not yet been mapped to output sections.
12677 Tentatively set the flag for now, and correct in
12678 adjust_dynamic_symbol. */
12679 h
->non_got_ref
= 1;
12682 if (may_need_local_target_p
12683 && (h
!= NULL
|| ELF32_ST_TYPE (isym
->st_info
) == STT_GNU_IFUNC
))
12685 union gotplt_union
*root_plt
;
12686 struct arm_plt_info
*arm_plt
;
12687 struct arm_local_iplt_info
*local_iplt
;
12691 root_plt
= &h
->plt
;
12692 arm_plt
= &eh
->plt
;
12696 local_iplt
= elf32_arm_create_local_iplt (abfd
, r_symndx
);
12697 if (local_iplt
== NULL
)
12699 root_plt
= &local_iplt
->root
;
12700 arm_plt
= &local_iplt
->arm
;
12703 /* If the symbol is a function that doesn't bind locally,
12704 this relocation will need a PLT entry. */
12705 if (root_plt
->refcount
!= -1)
12706 root_plt
->refcount
+= 1;
12709 arm_plt
->noncall_refcount
++;
12711 /* It's too early to use htab->use_blx here, so we have to
12712 record possible blx references separately from
12713 relocs that definitely need a thumb stub. */
12715 if (r_type
== R_ARM_THM_CALL
)
12716 arm_plt
->maybe_thumb_refcount
+= 1;
12718 if (r_type
== R_ARM_THM_JUMP24
12719 || r_type
== R_ARM_THM_JUMP19
)
12720 arm_plt
->thumb_refcount
+= 1;
12723 if (may_become_dynamic_p
)
12725 struct elf_dyn_relocs
*p
, **head
;
12727 /* Create a reloc section in dynobj. */
12728 if (sreloc
== NULL
)
12730 sreloc
= _bfd_elf_make_dynamic_reloc_section
12731 (sec
, dynobj
, 2, abfd
, ! htab
->use_rel
);
12733 if (sreloc
== NULL
)
12736 /* BPABI objects never have dynamic relocations mapped. */
12737 if (htab
->symbian_p
)
12741 flags
= bfd_get_section_flags (dynobj
, sreloc
);
12742 flags
&= ~(SEC_LOAD
| SEC_ALLOC
);
12743 bfd_set_section_flags (dynobj
, sreloc
, flags
);
12747 /* If this is a global symbol, count the number of
12748 relocations we need for this symbol. */
12750 head
= &((struct elf32_arm_link_hash_entry
*) h
)->dyn_relocs
;
12753 head
= elf32_arm_get_local_dynreloc_list (abfd
, r_symndx
, isym
);
12759 if (p
== NULL
|| p
->sec
!= sec
)
12761 bfd_size_type amt
= sizeof *p
;
12763 p
= (struct elf_dyn_relocs
*) bfd_alloc (htab
->root
.dynobj
, amt
);
12773 if (r_type
== R_ARM_REL32
|| r_type
== R_ARM_REL32_NOI
)
12782 /* Unwinding tables are not referenced directly. This pass marks them as
12783 required if the corresponding code section is marked. */
12786 elf32_arm_gc_mark_extra_sections (struct bfd_link_info
*info
,
12787 elf_gc_mark_hook_fn gc_mark_hook
)
12790 Elf_Internal_Shdr
**elf_shdrp
;
12793 _bfd_elf_gc_mark_extra_sections (info
, gc_mark_hook
);
12795 /* Marking EH data may cause additional code sections to be marked,
12796 requiring multiple passes. */
12801 for (sub
= info
->input_bfds
; sub
!= NULL
; sub
= sub
->link_next
)
12805 if (! is_arm_elf (sub
))
12808 elf_shdrp
= elf_elfsections (sub
);
12809 for (o
= sub
->sections
; o
!= NULL
; o
= o
->next
)
12811 Elf_Internal_Shdr
*hdr
;
12813 hdr
= &elf_section_data (o
)->this_hdr
;
12814 if (hdr
->sh_type
== SHT_ARM_EXIDX
12816 && hdr
->sh_link
< elf_numsections (sub
)
12818 && elf_shdrp
[hdr
->sh_link
]->bfd_section
->gc_mark
)
12821 if (!_bfd_elf_gc_mark (info
, o
, gc_mark_hook
))
12831 /* Treat mapping symbols as special target symbols. */
12834 elf32_arm_is_target_special_symbol (bfd
* abfd ATTRIBUTE_UNUSED
, asymbol
* sym
)
12836 return bfd_is_arm_special_symbol_name (sym
->name
,
12837 BFD_ARM_SPECIAL_SYM_TYPE_ANY
);
12840 /* This is a copy of elf_find_function() from elf.c except that
12841 ARM mapping symbols are ignored when looking for function names
12842 and STT_ARM_TFUNC is considered to a function type. */
12845 arm_elf_find_function (bfd
* abfd ATTRIBUTE_UNUSED
,
12846 asection
* section
,
12847 asymbol
** symbols
,
12849 const char ** filename_ptr
,
12850 const char ** functionname_ptr
)
12852 const char * filename
= NULL
;
12853 asymbol
* func
= NULL
;
12854 bfd_vma low_func
= 0;
12857 for (p
= symbols
; *p
!= NULL
; p
++)
12859 elf_symbol_type
*q
;
12861 q
= (elf_symbol_type
*) *p
;
12863 switch (ELF_ST_TYPE (q
->internal_elf_sym
.st_info
))
12868 filename
= bfd_asymbol_name (&q
->symbol
);
12871 case STT_ARM_TFUNC
:
12873 /* Skip mapping symbols. */
12874 if ((q
->symbol
.flags
& BSF_LOCAL
)
12875 && bfd_is_arm_special_symbol_name (q
->symbol
.name
,
12876 BFD_ARM_SPECIAL_SYM_TYPE_ANY
))
12878 /* Fall through. */
12879 if (bfd_get_section (&q
->symbol
) == section
12880 && q
->symbol
.value
>= low_func
12881 && q
->symbol
.value
<= offset
)
12883 func
= (asymbol
*) q
;
12884 low_func
= q
->symbol
.value
;
12894 *filename_ptr
= filename
;
12895 if (functionname_ptr
)
12896 *functionname_ptr
= bfd_asymbol_name (func
);
12902 /* Find the nearest line to a particular section and offset, for error
12903 reporting. This code is a duplicate of the code in elf.c, except
12904 that it uses arm_elf_find_function. */
12907 elf32_arm_find_nearest_line (bfd
* abfd
,
12908 asection
* section
,
12909 asymbol
** symbols
,
12911 const char ** filename_ptr
,
12912 const char ** functionname_ptr
,
12913 unsigned int * line_ptr
)
12915 bfd_boolean found
= FALSE
;
12917 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
12919 if (_bfd_dwarf2_find_nearest_line (abfd
, dwarf_debug_sections
,
12920 section
, symbols
, offset
,
12921 filename_ptr
, functionname_ptr
,
12923 & elf_tdata (abfd
)->dwarf2_find_line_info
))
12925 if (!*functionname_ptr
)
12926 arm_elf_find_function (abfd
, section
, symbols
, offset
,
12927 *filename_ptr
? NULL
: filename_ptr
,
12933 if (! _bfd_stab_section_find_nearest_line (abfd
, symbols
, section
, offset
,
12934 & found
, filename_ptr
,
12935 functionname_ptr
, line_ptr
,
12936 & elf_tdata (abfd
)->line_info
))
12939 if (found
&& (*functionname_ptr
|| *line_ptr
))
12942 if (symbols
== NULL
)
12945 if (! arm_elf_find_function (abfd
, section
, symbols
, offset
,
12946 filename_ptr
, functionname_ptr
))
12954 elf32_arm_find_inliner_info (bfd
* abfd
,
12955 const char ** filename_ptr
,
12956 const char ** functionname_ptr
,
12957 unsigned int * line_ptr
)
12960 found
= _bfd_dwarf2_find_inliner_info (abfd
, filename_ptr
,
12961 functionname_ptr
, line_ptr
,
12962 & elf_tdata (abfd
)->dwarf2_find_line_info
);
12966 /* Adjust a symbol defined by a dynamic object and referenced by a
12967 regular object. The current definition is in some section of the
12968 dynamic object, but we're not including those sections. We have to
12969 change the definition to something the rest of the link can
12973 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info
* info
,
12974 struct elf_link_hash_entry
* h
)
12978 struct elf32_arm_link_hash_entry
* eh
;
12979 struct elf32_arm_link_hash_table
*globals
;
12981 globals
= elf32_arm_hash_table (info
);
12982 if (globals
== NULL
)
12985 dynobj
= elf_hash_table (info
)->dynobj
;
12987 /* Make sure we know what is going on here. */
12988 BFD_ASSERT (dynobj
!= NULL
12990 || h
->type
== STT_GNU_IFUNC
12991 || h
->u
.weakdef
!= NULL
12994 && !h
->def_regular
)));
12996 eh
= (struct elf32_arm_link_hash_entry
*) h
;
12998 /* If this is a function, put it in the procedure linkage table. We
12999 will fill in the contents of the procedure linkage table later,
13000 when we know the address of the .got section. */
13001 if (h
->type
== STT_FUNC
|| h
->type
== STT_GNU_IFUNC
|| h
->needs_plt
)
13003 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
13004 symbol binds locally. */
13005 if (h
->plt
.refcount
<= 0
13006 || (h
->type
!= STT_GNU_IFUNC
13007 && (SYMBOL_CALLS_LOCAL (info
, h
)
13008 || (ELF_ST_VISIBILITY (h
->other
) != STV_DEFAULT
13009 && h
->root
.type
== bfd_link_hash_undefweak
))))
13011 /* This case can occur if we saw a PLT32 reloc in an input
13012 file, but the symbol was never referred to by a dynamic
13013 object, or if all references were garbage collected. In
13014 such a case, we don't actually need to build a procedure
13015 linkage table, and we can just do a PC24 reloc instead. */
13016 h
->plt
.offset
= (bfd_vma
) -1;
13017 eh
->plt
.thumb_refcount
= 0;
13018 eh
->plt
.maybe_thumb_refcount
= 0;
13019 eh
->plt
.noncall_refcount
= 0;
13027 /* It's possible that we incorrectly decided a .plt reloc was
13028 needed for an R_ARM_PC24 or similar reloc to a non-function sym
13029 in check_relocs. We can't decide accurately between function
13030 and non-function syms in check-relocs; Objects loaded later in
13031 the link may change h->type. So fix it now. */
13032 h
->plt
.offset
= (bfd_vma
) -1;
13033 eh
->plt
.thumb_refcount
= 0;
13034 eh
->plt
.maybe_thumb_refcount
= 0;
13035 eh
->plt
.noncall_refcount
= 0;
13038 /* If this is a weak symbol, and there is a real definition, the
13039 processor independent code will have arranged for us to see the
13040 real definition first, and we can just use the same value. */
13041 if (h
->u
.weakdef
!= NULL
)
13043 BFD_ASSERT (h
->u
.weakdef
->root
.type
== bfd_link_hash_defined
13044 || h
->u
.weakdef
->root
.type
== bfd_link_hash_defweak
);
13045 h
->root
.u
.def
.section
= h
->u
.weakdef
->root
.u
.def
.section
;
13046 h
->root
.u
.def
.value
= h
->u
.weakdef
->root
.u
.def
.value
;
13050 /* If there are no non-GOT references, we do not need a copy
13052 if (!h
->non_got_ref
)
13055 /* This is a reference to a symbol defined by a dynamic object which
13056 is not a function. */
13058 /* If we are creating a shared library, we must presume that the
13059 only references to the symbol are via the global offset table.
13060 For such cases we need not do anything here; the relocations will
13061 be handled correctly by relocate_section. Relocatable executables
13062 can reference data in shared objects directly, so we don't need to
13063 do anything here. */
13064 if (info
->shared
|| globals
->root
.is_relocatable_executable
)
13067 /* We must allocate the symbol in our .dynbss section, which will
13068 become part of the .bss section of the executable. There will be
13069 an entry for this symbol in the .dynsym section. The dynamic
13070 object will contain position independent code, so all references
13071 from the dynamic object to this symbol will go through the global
13072 offset table. The dynamic linker will use the .dynsym entry to
13073 determine the address it must put in the global offset table, so
13074 both the dynamic object and the regular object will refer to the
13075 same memory location for the variable. */
13076 s
= bfd_get_linker_section (dynobj
, ".dynbss");
13077 BFD_ASSERT (s
!= NULL
);
13079 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
13080 copy the initial value out of the dynamic object and into the
13081 runtime process image. We need to remember the offset into the
13082 .rel(a).bss section we are going to use. */
13083 if ((h
->root
.u
.def
.section
->flags
& SEC_ALLOC
) != 0 && h
->size
!= 0)
13087 srel
= bfd_get_linker_section (dynobj
, RELOC_SECTION (globals
, ".bss"));
13088 elf32_arm_allocate_dynrelocs (info
, srel
, 1);
13092 return _bfd_elf_adjust_dynamic_copy (h
, s
);
13095 /* Allocate space in .plt, .got and associated reloc sections for
13099 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry
*h
, void * inf
)
13101 struct bfd_link_info
*info
;
13102 struct elf32_arm_link_hash_table
*htab
;
13103 struct elf32_arm_link_hash_entry
*eh
;
13104 struct elf_dyn_relocs
*p
;
13106 if (h
->root
.type
== bfd_link_hash_indirect
)
13109 eh
= (struct elf32_arm_link_hash_entry
*) h
;
13111 info
= (struct bfd_link_info
*) inf
;
13112 htab
= elf32_arm_hash_table (info
);
13116 if ((htab
->root
.dynamic_sections_created
|| h
->type
== STT_GNU_IFUNC
)
13117 && h
->plt
.refcount
> 0)
13119 /* Make sure this symbol is output as a dynamic symbol.
13120 Undefined weak syms won't yet be marked as dynamic. */
13121 if (h
->dynindx
== -1
13122 && !h
->forced_local
)
13124 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
13128 /* If the call in the PLT entry binds locally, the associated
13129 GOT entry should use an R_ARM_IRELATIVE relocation instead of
13130 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
13131 than the .plt section. */
13132 if (h
->type
== STT_GNU_IFUNC
&& SYMBOL_CALLS_LOCAL (info
, h
))
13135 if (eh
->plt
.noncall_refcount
== 0
13136 && SYMBOL_REFERENCES_LOCAL (info
, h
))
13137 /* All non-call references can be resolved directly.
13138 This means that they can (and in some cases, must)
13139 resolve directly to the run-time target, rather than
13140 to the PLT. That in turns means that any .got entry
13141 would be equal to the .igot.plt entry, so there's
13142 no point having both. */
13143 h
->got
.refcount
= 0;
13148 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h
))
13150 elf32_arm_allocate_plt_entry (info
, eh
->is_iplt
, &h
->plt
, &eh
->plt
);
13152 /* If this symbol is not defined in a regular file, and we are
13153 not generating a shared library, then set the symbol to this
13154 location in the .plt. This is required to make function
13155 pointers compare as equal between the normal executable and
13156 the shared library. */
13158 && !h
->def_regular
)
13160 h
->root
.u
.def
.section
= htab
->root
.splt
;
13161 h
->root
.u
.def
.value
= h
->plt
.offset
;
13163 /* Make sure the function is not marked as Thumb, in case
13164 it is the target of an ABS32 relocation, which will
13165 point to the PLT entry. */
13166 h
->target_internal
= ST_BRANCH_TO_ARM
;
13169 htab
->next_tls_desc_index
++;
13171 /* VxWorks executables have a second set of relocations for
13172 each PLT entry. They go in a separate relocation section,
13173 which is processed by the kernel loader. */
13174 if (htab
->vxworks_p
&& !info
->shared
)
13176 /* There is a relocation for the initial PLT entry:
13177 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
13178 if (h
->plt
.offset
== htab
->plt_header_size
)
13179 elf32_arm_allocate_dynrelocs (info
, htab
->srelplt2
, 1);
13181 /* There are two extra relocations for each subsequent
13182 PLT entry: an R_ARM_32 relocation for the GOT entry,
13183 and an R_ARM_32 relocation for the PLT entry. */
13184 elf32_arm_allocate_dynrelocs (info
, htab
->srelplt2
, 2);
13189 h
->plt
.offset
= (bfd_vma
) -1;
13195 h
->plt
.offset
= (bfd_vma
) -1;
13199 eh
= (struct elf32_arm_link_hash_entry
*) h
;
13200 eh
->tlsdesc_got
= (bfd_vma
) -1;
13202 if (h
->got
.refcount
> 0)
13206 int tls_type
= elf32_arm_hash_entry (h
)->tls_type
;
13209 /* Make sure this symbol is output as a dynamic symbol.
13210 Undefined weak syms won't yet be marked as dynamic. */
13211 if (h
->dynindx
== -1
13212 && !h
->forced_local
)
13214 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
13218 if (!htab
->symbian_p
)
13220 s
= htab
->root
.sgot
;
13221 h
->got
.offset
= s
->size
;
13223 if (tls_type
== GOT_UNKNOWN
)
13226 if (tls_type
== GOT_NORMAL
)
13227 /* Non-TLS symbols need one GOT slot. */
13231 if (tls_type
& GOT_TLS_GDESC
)
13233 /* R_ARM_TLS_DESC needs 2 GOT slots. */
13235 = (htab
->root
.sgotplt
->size
13236 - elf32_arm_compute_jump_table_size (htab
));
13237 htab
->root
.sgotplt
->size
+= 8;
13238 h
->got
.offset
= (bfd_vma
) -2;
13239 /* plt.got_offset needs to know there's a TLS_DESC
13240 reloc in the middle of .got.plt. */
13241 htab
->num_tls_desc
++;
13244 if (tls_type
& GOT_TLS_GD
)
13246 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
13247 the symbol is both GD and GDESC, got.offset may
13248 have been overwritten. */
13249 h
->got
.offset
= s
->size
;
13253 if (tls_type
& GOT_TLS_IE
)
13254 /* R_ARM_TLS_IE32 needs one GOT slot. */
13258 dyn
= htab
->root
.dynamic_sections_created
;
13261 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn
, info
->shared
, h
)
13263 || !SYMBOL_REFERENCES_LOCAL (info
, h
)))
13266 if (tls_type
!= GOT_NORMAL
13267 && (info
->shared
|| indx
!= 0)
13268 && (ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
13269 || h
->root
.type
!= bfd_link_hash_undefweak
))
13271 if (tls_type
& GOT_TLS_IE
)
13272 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
13274 if (tls_type
& GOT_TLS_GD
)
13275 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
13277 if (tls_type
& GOT_TLS_GDESC
)
13279 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelplt
, 1);
13280 /* GDESC needs a trampoline to jump to. */
13281 htab
->tls_trampoline
= -1;
13284 /* Only GD needs it. GDESC just emits one relocation per
13286 if ((tls_type
& GOT_TLS_GD
) && indx
!= 0)
13287 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
13289 else if (indx
!= -1 && !SYMBOL_REFERENCES_LOCAL (info
, h
))
13291 if (htab
->root
.dynamic_sections_created
)
13292 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
13293 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
13295 else if (h
->type
== STT_GNU_IFUNC
13296 && eh
->plt
.noncall_refcount
== 0)
13297 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
13298 they all resolve dynamically instead. Reserve room for the
13299 GOT entry's R_ARM_IRELATIVE relocation. */
13300 elf32_arm_allocate_irelocs (info
, htab
->root
.srelgot
, 1);
13301 else if (info
->shared
&& (ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
13302 || h
->root
.type
!= bfd_link_hash_undefweak
))
13303 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
13304 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
13308 h
->got
.offset
= (bfd_vma
) -1;
13310 /* Allocate stubs for exported Thumb functions on v4t. */
13311 if (!htab
->use_blx
&& h
->dynindx
!= -1
13313 && h
->target_internal
== ST_BRANCH_TO_THUMB
13314 && ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
)
13316 struct elf_link_hash_entry
* th
;
13317 struct bfd_link_hash_entry
* bh
;
13318 struct elf_link_hash_entry
* myh
;
13322 /* Create a new symbol to regist the real location of the function. */
13323 s
= h
->root
.u
.def
.section
;
13324 sprintf (name
, "__real_%s", h
->root
.root
.string
);
13325 _bfd_generic_link_add_one_symbol (info
, s
->owner
,
13326 name
, BSF_GLOBAL
, s
,
13327 h
->root
.u
.def
.value
,
13328 NULL
, TRUE
, FALSE
, &bh
);
13330 myh
= (struct elf_link_hash_entry
*) bh
;
13331 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
13332 myh
->forced_local
= 1;
13333 myh
->target_internal
= ST_BRANCH_TO_THUMB
;
13334 eh
->export_glue
= myh
;
13335 th
= record_arm_to_thumb_glue (info
, h
);
13336 /* Point the symbol at the stub. */
13337 h
->type
= ELF_ST_INFO (ELF_ST_BIND (h
->type
), STT_FUNC
);
13338 h
->target_internal
= ST_BRANCH_TO_ARM
;
13339 h
->root
.u
.def
.section
= th
->root
.u
.def
.section
;
13340 h
->root
.u
.def
.value
= th
->root
.u
.def
.value
& ~1;
13343 if (eh
->dyn_relocs
== NULL
)
13346 /* In the shared -Bsymbolic case, discard space allocated for
13347 dynamic pc-relative relocs against symbols which turn out to be
13348 defined in regular objects. For the normal shared case, discard
13349 space for pc-relative relocs that have become local due to symbol
13350 visibility changes. */
13352 if (info
->shared
|| htab
->root
.is_relocatable_executable
)
13354 /* The only relocs that use pc_count are R_ARM_REL32 and
13355 R_ARM_REL32_NOI, which will appear on something like
13356 ".long foo - .". We want calls to protected symbols to resolve
13357 directly to the function rather than going via the plt. If people
13358 want function pointer comparisons to work as expected then they
13359 should avoid writing assembly like ".long foo - .". */
13360 if (SYMBOL_CALLS_LOCAL (info
, h
))
13362 struct elf_dyn_relocs
**pp
;
13364 for (pp
= &eh
->dyn_relocs
; (p
= *pp
) != NULL
; )
13366 p
->count
-= p
->pc_count
;
13375 if (htab
->vxworks_p
)
13377 struct elf_dyn_relocs
**pp
;
13379 for (pp
= &eh
->dyn_relocs
; (p
= *pp
) != NULL
; )
13381 if (strcmp (p
->sec
->output_section
->name
, ".tls_vars") == 0)
13388 /* Also discard relocs on undefined weak syms with non-default
13390 if (eh
->dyn_relocs
!= NULL
13391 && h
->root
.type
== bfd_link_hash_undefweak
)
13393 if (ELF_ST_VISIBILITY (h
->other
) != STV_DEFAULT
)
13394 eh
->dyn_relocs
= NULL
;
13396 /* Make sure undefined weak symbols are output as a dynamic
13398 else if (h
->dynindx
== -1
13399 && !h
->forced_local
)
13401 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
13406 else if (htab
->root
.is_relocatable_executable
&& h
->dynindx
== -1
13407 && h
->root
.type
== bfd_link_hash_new
)
13409 /* Output absolute symbols so that we can create relocations
13410 against them. For normal symbols we output a relocation
13411 against the section that contains them. */
13412 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
13419 /* For the non-shared case, discard space for relocs against
13420 symbols which turn out to need copy relocs or are not
13423 if (!h
->non_got_ref
13424 && ((h
->def_dynamic
13425 && !h
->def_regular
)
13426 || (htab
->root
.dynamic_sections_created
13427 && (h
->root
.type
== bfd_link_hash_undefweak
13428 || h
->root
.type
== bfd_link_hash_undefined
))))
13430 /* Make sure this symbol is output as a dynamic symbol.
13431 Undefined weak syms won't yet be marked as dynamic. */
13432 if (h
->dynindx
== -1
13433 && !h
->forced_local
)
13435 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
13439 /* If that succeeded, we know we'll be keeping all the
13441 if (h
->dynindx
!= -1)
13445 eh
->dyn_relocs
= NULL
;
13450 /* Finally, allocate space. */
13451 for (p
= eh
->dyn_relocs
; p
!= NULL
; p
= p
->next
)
13453 asection
*sreloc
= elf_section_data (p
->sec
)->sreloc
;
13454 if (h
->type
== STT_GNU_IFUNC
13455 && eh
->plt
.noncall_refcount
== 0
13456 && SYMBOL_REFERENCES_LOCAL (info
, h
))
13457 elf32_arm_allocate_irelocs (info
, sreloc
, p
->count
);
13459 elf32_arm_allocate_dynrelocs (info
, sreloc
, p
->count
);
13465 /* Find any dynamic relocs that apply to read-only sections. */
13468 elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry
* h
, void * inf
)
13470 struct elf32_arm_link_hash_entry
* eh
;
13471 struct elf_dyn_relocs
* p
;
13473 eh
= (struct elf32_arm_link_hash_entry
*) h
;
13474 for (p
= eh
->dyn_relocs
; p
!= NULL
; p
= p
->next
)
13476 asection
*s
= p
->sec
;
13478 if (s
!= NULL
&& (s
->flags
& SEC_READONLY
) != 0)
13480 struct bfd_link_info
*info
= (struct bfd_link_info
*) inf
;
13482 info
->flags
|= DF_TEXTREL
;
13484 /* Not an error, just cut short the traversal. */
13492 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info
*info
,
13495 struct elf32_arm_link_hash_table
*globals
;
13497 globals
= elf32_arm_hash_table (info
);
13498 if (globals
== NULL
)
13501 globals
->byteswap_code
= byteswap_code
;
13504 /* Set the sizes of the dynamic sections. */
13507 elf32_arm_size_dynamic_sections (bfd
* output_bfd ATTRIBUTE_UNUSED
,
13508 struct bfd_link_info
* info
)
13513 bfd_boolean relocs
;
13515 struct elf32_arm_link_hash_table
*htab
;
13517 htab
= elf32_arm_hash_table (info
);
13521 dynobj
= elf_hash_table (info
)->dynobj
;
13522 BFD_ASSERT (dynobj
!= NULL
);
13523 check_use_blx (htab
);
13525 if (elf_hash_table (info
)->dynamic_sections_created
)
13527 /* Set the contents of the .interp section to the interpreter. */
13528 if (info
->executable
)
13530 s
= bfd_get_linker_section (dynobj
, ".interp");
13531 BFD_ASSERT (s
!= NULL
);
13532 s
->size
= sizeof ELF_DYNAMIC_INTERPRETER
;
13533 s
->contents
= (unsigned char *) ELF_DYNAMIC_INTERPRETER
;
13537 /* Set up .got offsets for local syms, and space for local dynamic
13539 for (ibfd
= info
->input_bfds
; ibfd
!= NULL
; ibfd
= ibfd
->link_next
)
13541 bfd_signed_vma
*local_got
;
13542 bfd_signed_vma
*end_local_got
;
13543 struct arm_local_iplt_info
**local_iplt_ptr
, *local_iplt
;
13544 char *local_tls_type
;
13545 bfd_vma
*local_tlsdesc_gotent
;
13546 bfd_size_type locsymcount
;
13547 Elf_Internal_Shdr
*symtab_hdr
;
13549 bfd_boolean is_vxworks
= htab
->vxworks_p
;
13550 unsigned int symndx
;
13552 if (! is_arm_elf (ibfd
))
13555 for (s
= ibfd
->sections
; s
!= NULL
; s
= s
->next
)
13557 struct elf_dyn_relocs
*p
;
13559 for (p
= (struct elf_dyn_relocs
*)
13560 elf_section_data (s
)->local_dynrel
; p
!= NULL
; p
= p
->next
)
13562 if (!bfd_is_abs_section (p
->sec
)
13563 && bfd_is_abs_section (p
->sec
->output_section
))
13565 /* Input section has been discarded, either because
13566 it is a copy of a linkonce section or due to
13567 linker script /DISCARD/, so we'll be discarding
13570 else if (is_vxworks
13571 && strcmp (p
->sec
->output_section
->name
,
13574 /* Relocations in vxworks .tls_vars sections are
13575 handled specially by the loader. */
13577 else if (p
->count
!= 0)
13579 srel
= elf_section_data (p
->sec
)->sreloc
;
13580 elf32_arm_allocate_dynrelocs (info
, srel
, p
->count
);
13581 if ((p
->sec
->output_section
->flags
& SEC_READONLY
) != 0)
13582 info
->flags
|= DF_TEXTREL
;
13587 local_got
= elf_local_got_refcounts (ibfd
);
13591 symtab_hdr
= & elf_symtab_hdr (ibfd
);
13592 locsymcount
= symtab_hdr
->sh_info
;
13593 end_local_got
= local_got
+ locsymcount
;
13594 local_iplt_ptr
= elf32_arm_local_iplt (ibfd
);
13595 local_tls_type
= elf32_arm_local_got_tls_type (ibfd
);
13596 local_tlsdesc_gotent
= elf32_arm_local_tlsdesc_gotent (ibfd
);
13598 s
= htab
->root
.sgot
;
13599 srel
= htab
->root
.srelgot
;
13600 for (; local_got
< end_local_got
;
13601 ++local_got
, ++local_iplt_ptr
, ++local_tls_type
,
13602 ++local_tlsdesc_gotent
, ++symndx
)
13604 *local_tlsdesc_gotent
= (bfd_vma
) -1;
13605 local_iplt
= *local_iplt_ptr
;
13606 if (local_iplt
!= NULL
)
13608 struct elf_dyn_relocs
*p
;
13610 if (local_iplt
->root
.refcount
> 0)
13612 elf32_arm_allocate_plt_entry (info
, TRUE
,
13615 if (local_iplt
->arm
.noncall_refcount
== 0)
13616 /* All references to the PLT are calls, so all
13617 non-call references can resolve directly to the
13618 run-time target. This means that the .got entry
13619 would be the same as the .igot.plt entry, so there's
13620 no point creating both. */
13625 BFD_ASSERT (local_iplt
->arm
.noncall_refcount
== 0);
13626 local_iplt
->root
.offset
= (bfd_vma
) -1;
13629 for (p
= local_iplt
->dyn_relocs
; p
!= NULL
; p
= p
->next
)
13633 psrel
= elf_section_data (p
->sec
)->sreloc
;
13634 if (local_iplt
->arm
.noncall_refcount
== 0)
13635 elf32_arm_allocate_irelocs (info
, psrel
, p
->count
);
13637 elf32_arm_allocate_dynrelocs (info
, psrel
, p
->count
);
13640 if (*local_got
> 0)
13642 Elf_Internal_Sym
*isym
;
13644 *local_got
= s
->size
;
13645 if (*local_tls_type
& GOT_TLS_GD
)
13646 /* TLS_GD relocs need an 8-byte structure in the GOT. */
13648 if (*local_tls_type
& GOT_TLS_GDESC
)
13650 *local_tlsdesc_gotent
= htab
->root
.sgotplt
->size
13651 - elf32_arm_compute_jump_table_size (htab
);
13652 htab
->root
.sgotplt
->size
+= 8;
13653 *local_got
= (bfd_vma
) -2;
13654 /* plt.got_offset needs to know there's a TLS_DESC
13655 reloc in the middle of .got.plt. */
13656 htab
->num_tls_desc
++;
13658 if (*local_tls_type
& GOT_TLS_IE
)
13661 if (*local_tls_type
& GOT_NORMAL
)
13663 /* If the symbol is both GD and GDESC, *local_got
13664 may have been overwritten. */
13665 *local_got
= s
->size
;
13669 isym
= bfd_sym_from_r_symndx (&htab
->sym_cache
, ibfd
, symndx
);
13673 /* If all references to an STT_GNU_IFUNC PLT are calls,
13674 then all non-call references, including this GOT entry,
13675 resolve directly to the run-time target. */
13676 if (ELF32_ST_TYPE (isym
->st_info
) == STT_GNU_IFUNC
13677 && (local_iplt
== NULL
13678 || local_iplt
->arm
.noncall_refcount
== 0))
13679 elf32_arm_allocate_irelocs (info
, srel
, 1);
13680 else if (info
->shared
|| output_bfd
->flags
& DYNAMIC
)
13682 if ((info
->shared
&& !(*local_tls_type
& GOT_TLS_GDESC
))
13683 || *local_tls_type
& GOT_TLS_GD
)
13684 elf32_arm_allocate_dynrelocs (info
, srel
, 1);
13686 if (info
->shared
&& *local_tls_type
& GOT_TLS_GDESC
)
13688 elf32_arm_allocate_dynrelocs (info
,
13689 htab
->root
.srelplt
, 1);
13690 htab
->tls_trampoline
= -1;
13695 *local_got
= (bfd_vma
) -1;
13699 if (htab
->tls_ldm_got
.refcount
> 0)
13701 /* Allocate two GOT entries and one dynamic relocation (if necessary)
13702 for R_ARM_TLS_LDM32 relocations. */
13703 htab
->tls_ldm_got
.offset
= htab
->root
.sgot
->size
;
13704 htab
->root
.sgot
->size
+= 8;
13706 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
13709 htab
->tls_ldm_got
.offset
= -1;
13711 /* Allocate global sym .plt and .got entries, and space for global
13712 sym dynamic relocs. */
13713 elf_link_hash_traverse (& htab
->root
, allocate_dynrelocs_for_symbol
, info
);
13715 /* Here we rummage through the found bfds to collect glue information. */
13716 for (ibfd
= info
->input_bfds
; ibfd
!= NULL
; ibfd
= ibfd
->link_next
)
13718 if (! is_arm_elf (ibfd
))
13721 /* Initialise mapping tables for code/data. */
13722 bfd_elf32_arm_init_maps (ibfd
);
13724 if (!bfd_elf32_arm_process_before_allocation (ibfd
, info
)
13725 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd
, info
))
13726 /* xgettext:c-format */
13727 _bfd_error_handler (_("Errors encountered processing file %s"),
13731 /* Allocate space for the glue sections now that we've sized them. */
13732 bfd_elf32_arm_allocate_interworking_sections (info
);
13734 /* For every jump slot reserved in the sgotplt, reloc_count is
13735 incremented. However, when we reserve space for TLS descriptors,
13736 it's not incremented, so in order to compute the space reserved
13737 for them, it suffices to multiply the reloc count by the jump
13739 if (htab
->root
.srelplt
)
13740 htab
->sgotplt_jump_table_size
= elf32_arm_compute_jump_table_size(htab
);
13742 if (htab
->tls_trampoline
)
13744 if (htab
->root
.splt
->size
== 0)
13745 htab
->root
.splt
->size
+= htab
->plt_header_size
;
13747 htab
->tls_trampoline
= htab
->root
.splt
->size
;
13748 htab
->root
.splt
->size
+= htab
->plt_entry_size
;
13750 /* If we're not using lazy TLS relocations, don't generate the
13751 PLT and GOT entries they require. */
13752 if (!(info
->flags
& DF_BIND_NOW
))
13754 htab
->dt_tlsdesc_got
= htab
->root
.sgot
->size
;
13755 htab
->root
.sgot
->size
+= 4;
13757 htab
->dt_tlsdesc_plt
= htab
->root
.splt
->size
;
13758 htab
->root
.splt
->size
+= 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline
);
13762 /* The check_relocs and adjust_dynamic_symbol entry points have
13763 determined the sizes of the various dynamic sections. Allocate
13764 memory for them. */
13767 for (s
= dynobj
->sections
; s
!= NULL
; s
= s
->next
)
13771 if ((s
->flags
& SEC_LINKER_CREATED
) == 0)
13774 /* It's OK to base decisions on the section name, because none
13775 of the dynobj section names depend upon the input files. */
13776 name
= bfd_get_section_name (dynobj
, s
);
13778 if (s
== htab
->root
.splt
)
13780 /* Remember whether there is a PLT. */
13781 plt
= s
->size
!= 0;
13783 else if (CONST_STRNEQ (name
, ".rel"))
13787 /* Remember whether there are any reloc sections other
13788 than .rel(a).plt and .rela.plt.unloaded. */
13789 if (s
!= htab
->root
.srelplt
&& s
!= htab
->srelplt2
)
13792 /* We use the reloc_count field as a counter if we need
13793 to copy relocs into the output file. */
13794 s
->reloc_count
= 0;
13797 else if (s
!= htab
->root
.sgot
13798 && s
!= htab
->root
.sgotplt
13799 && s
!= htab
->root
.iplt
13800 && s
!= htab
->root
.igotplt
13801 && s
!= htab
->sdynbss
)
13803 /* It's not one of our sections, so don't allocate space. */
13809 /* If we don't need this section, strip it from the
13810 output file. This is mostly to handle .rel(a).bss and
13811 .rel(a).plt. We must create both sections in
13812 create_dynamic_sections, because they must be created
13813 before the linker maps input sections to output
13814 sections. The linker does that before
13815 adjust_dynamic_symbol is called, and it is that
13816 function which decides whether anything needs to go
13817 into these sections. */
13818 s
->flags
|= SEC_EXCLUDE
;
13822 if ((s
->flags
& SEC_HAS_CONTENTS
) == 0)
13825 /* Allocate memory for the section contents. */
13826 s
->contents
= (unsigned char *) bfd_zalloc (dynobj
, s
->size
);
13827 if (s
->contents
== NULL
)
13831 if (elf_hash_table (info
)->dynamic_sections_created
)
13833 /* Add some entries to the .dynamic section. We fill in the
13834 values later, in elf32_arm_finish_dynamic_sections, but we
13835 must add the entries now so that we get the correct size for
13836 the .dynamic section. The DT_DEBUG entry is filled in by the
13837 dynamic linker and used by the debugger. */
13838 #define add_dynamic_entry(TAG, VAL) \
13839 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
13841 if (info
->executable
)
13843 if (!add_dynamic_entry (DT_DEBUG
, 0))
13849 if ( !add_dynamic_entry (DT_PLTGOT
, 0)
13850 || !add_dynamic_entry (DT_PLTRELSZ
, 0)
13851 || !add_dynamic_entry (DT_PLTREL
,
13852 htab
->use_rel
? DT_REL
: DT_RELA
)
13853 || !add_dynamic_entry (DT_JMPREL
, 0))
13856 if (htab
->dt_tlsdesc_plt
&&
13857 (!add_dynamic_entry (DT_TLSDESC_PLT
,0)
13858 || !add_dynamic_entry (DT_TLSDESC_GOT
,0)))
13866 if (!add_dynamic_entry (DT_REL
, 0)
13867 || !add_dynamic_entry (DT_RELSZ
, 0)
13868 || !add_dynamic_entry (DT_RELENT
, RELOC_SIZE (htab
)))
13873 if (!add_dynamic_entry (DT_RELA
, 0)
13874 || !add_dynamic_entry (DT_RELASZ
, 0)
13875 || !add_dynamic_entry (DT_RELAENT
, RELOC_SIZE (htab
)))
13880 /* If any dynamic relocs apply to a read-only section,
13881 then we need a DT_TEXTREL entry. */
13882 if ((info
->flags
& DF_TEXTREL
) == 0)
13883 elf_link_hash_traverse (& htab
->root
, elf32_arm_readonly_dynrelocs
,
13886 if ((info
->flags
& DF_TEXTREL
) != 0)
13888 if (!add_dynamic_entry (DT_TEXTREL
, 0))
13891 if (htab
->vxworks_p
13892 && !elf_vxworks_add_dynamic_entries (output_bfd
, info
))
13895 #undef add_dynamic_entry
13900 /* Size sections even though they're not dynamic. We use it to setup
13901 _TLS_MODULE_BASE_, if needed. */
13904 elf32_arm_always_size_sections (bfd
*output_bfd
,
13905 struct bfd_link_info
*info
)
13909 if (info
->relocatable
)
13912 tls_sec
= elf_hash_table (info
)->tls_sec
;
13916 struct elf_link_hash_entry
*tlsbase
;
13918 tlsbase
= elf_link_hash_lookup
13919 (elf_hash_table (info
), "_TLS_MODULE_BASE_", TRUE
, TRUE
, FALSE
);
13923 struct bfd_link_hash_entry
*bh
= NULL
;
13924 const struct elf_backend_data
*bed
13925 = get_elf_backend_data (output_bfd
);
13927 if (!(_bfd_generic_link_add_one_symbol
13928 (info
, output_bfd
, "_TLS_MODULE_BASE_", BSF_LOCAL
,
13929 tls_sec
, 0, NULL
, FALSE
,
13930 bed
->collect
, &bh
)))
13933 tlsbase
->type
= STT_TLS
;
13934 tlsbase
= (struct elf_link_hash_entry
*)bh
;
13935 tlsbase
->def_regular
= 1;
13936 tlsbase
->other
= STV_HIDDEN
;
13937 (*bed
->elf_backend_hide_symbol
) (info
, tlsbase
, TRUE
);
13943 /* Finish up dynamic symbol handling. We set the contents of various
13944 dynamic sections here. */
13947 elf32_arm_finish_dynamic_symbol (bfd
* output_bfd
,
13948 struct bfd_link_info
* info
,
13949 struct elf_link_hash_entry
* h
,
13950 Elf_Internal_Sym
* sym
)
13952 struct elf32_arm_link_hash_table
*htab
;
13953 struct elf32_arm_link_hash_entry
*eh
;
13955 htab
= elf32_arm_hash_table (info
);
13959 eh
= (struct elf32_arm_link_hash_entry
*) h
;
13961 if (h
->plt
.offset
!= (bfd_vma
) -1)
13965 BFD_ASSERT (h
->dynindx
!= -1);
13966 elf32_arm_populate_plt_entry (output_bfd
, info
, &h
->plt
, &eh
->plt
,
13970 if (!h
->def_regular
)
13972 /* Mark the symbol as undefined, rather than as defined in
13973 the .plt section. Leave the value alone. */
13974 sym
->st_shndx
= SHN_UNDEF
;
13975 /* If the symbol is weak, we do need to clear the value.
13976 Otherwise, the PLT entry would provide a definition for
13977 the symbol even if the symbol wasn't defined anywhere,
13978 and so the symbol would never be NULL. */
13979 if (!h
->ref_regular_nonweak
)
13982 else if (eh
->is_iplt
&& eh
->plt
.noncall_refcount
!= 0)
13984 /* At least one non-call relocation references this .iplt entry,
13985 so the .iplt entry is the function's canonical address. */
13986 sym
->st_info
= ELF_ST_INFO (ELF_ST_BIND (sym
->st_info
), STT_FUNC
);
13987 sym
->st_target_internal
= ST_BRANCH_TO_ARM
;
13988 sym
->st_shndx
= (_bfd_elf_section_from_bfd_section
13989 (output_bfd
, htab
->root
.iplt
->output_section
));
13990 sym
->st_value
= (h
->plt
.offset
13991 + htab
->root
.iplt
->output_section
->vma
13992 + htab
->root
.iplt
->output_offset
);
13999 Elf_Internal_Rela rel
;
14001 /* This symbol needs a copy reloc. Set it up. */
14002 BFD_ASSERT (h
->dynindx
!= -1
14003 && (h
->root
.type
== bfd_link_hash_defined
14004 || h
->root
.type
== bfd_link_hash_defweak
));
14007 BFD_ASSERT (s
!= NULL
);
14010 rel
.r_offset
= (h
->root
.u
.def
.value
14011 + h
->root
.u
.def
.section
->output_section
->vma
14012 + h
->root
.u
.def
.section
->output_offset
);
14013 rel
.r_info
= ELF32_R_INFO (h
->dynindx
, R_ARM_COPY
);
14014 elf32_arm_add_dynreloc (output_bfd
, info
, s
, &rel
);
14017 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
14018 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
14019 to the ".got" section. */
14020 if (h
== htab
->root
.hdynamic
14021 || (!htab
->vxworks_p
&& h
== htab
->root
.hgot
))
14022 sym
->st_shndx
= SHN_ABS
;
14028 arm_put_trampoline (struct elf32_arm_link_hash_table
*htab
, bfd
*output_bfd
,
14030 const unsigned long *template, unsigned count
)
14034 for (ix
= 0; ix
!= count
; ix
++)
14036 unsigned long insn
= template[ix
];
14038 /* Emit mov pc,rx if bx is not permitted. */
14039 if (htab
->fix_v4bx
== 1 && (insn
& 0x0ffffff0) == 0x012fff10)
14040 insn
= (insn
& 0xf000000f) | 0x01a0f000;
14041 put_arm_insn (htab
, output_bfd
, insn
, (char *)contents
+ ix
*4);
14045 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
14046 other variants, NaCl needs this entry in a static executable's
14047 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
14048 zero. For .iplt really only the last bundle is useful, and .iplt
14049 could have a shorter first entry, with each individual PLT entry's
14050 relative branch calculated differently so it targets the last
14051 bundle instead of the instruction before it (labelled .Lplt_tail
14052 above). But it's simpler to keep the size and layout of PLT0
14053 consistent with the dynamic case, at the cost of some dead code at
14054 the start of .iplt and the one dead store to the stack at the start
14057 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table
*htab
, bfd
*output_bfd
,
14058 asection
*plt
, bfd_vma got_displacement
)
14062 put_arm_insn (htab
, output_bfd
,
14063 elf32_arm_nacl_plt0_entry
[0]
14064 | arm_movw_immediate (got_displacement
),
14065 plt
->contents
+ 0);
14066 put_arm_insn (htab
, output_bfd
,
14067 elf32_arm_nacl_plt0_entry
[1]
14068 | arm_movt_immediate (got_displacement
),
14069 plt
->contents
+ 4);
14071 for (i
= 2; i
< ARRAY_SIZE (elf32_arm_nacl_plt0_entry
); ++i
)
14072 put_arm_insn (htab
, output_bfd
,
14073 elf32_arm_nacl_plt0_entry
[i
],
14074 plt
->contents
+ (i
* 4));
14077 /* Finish up the dynamic sections. */
14080 elf32_arm_finish_dynamic_sections (bfd
* output_bfd
, struct bfd_link_info
* info
)
14085 struct elf32_arm_link_hash_table
*htab
;
14087 htab
= elf32_arm_hash_table (info
);
14091 dynobj
= elf_hash_table (info
)->dynobj
;
14093 sgot
= htab
->root
.sgotplt
;
14094 /* A broken linker script might have discarded the dynamic sections.
14095 Catch this here so that we do not seg-fault later on. */
14096 if (sgot
!= NULL
&& bfd_is_abs_section (sgot
->output_section
))
14098 sdyn
= bfd_get_linker_section (dynobj
, ".dynamic");
14100 if (elf_hash_table (info
)->dynamic_sections_created
)
14103 Elf32_External_Dyn
*dyncon
, *dynconend
;
14105 splt
= htab
->root
.splt
;
14106 BFD_ASSERT (splt
!= NULL
&& sdyn
!= NULL
);
14107 BFD_ASSERT (htab
->symbian_p
|| sgot
!= NULL
);
14109 dyncon
= (Elf32_External_Dyn
*) sdyn
->contents
;
14110 dynconend
= (Elf32_External_Dyn
*) (sdyn
->contents
+ sdyn
->size
);
14112 for (; dyncon
< dynconend
; dyncon
++)
14114 Elf_Internal_Dyn dyn
;
14118 bfd_elf32_swap_dyn_in (dynobj
, dyncon
, &dyn
);
14125 if (htab
->vxworks_p
14126 && elf_vxworks_finish_dynamic_entry (output_bfd
, &dyn
))
14127 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
14132 goto get_vma_if_bpabi
;
14135 goto get_vma_if_bpabi
;
14138 goto get_vma_if_bpabi
;
14140 name
= ".gnu.version";
14141 goto get_vma_if_bpabi
;
14143 name
= ".gnu.version_d";
14144 goto get_vma_if_bpabi
;
14146 name
= ".gnu.version_r";
14147 goto get_vma_if_bpabi
;
14153 name
= RELOC_SECTION (htab
, ".plt");
14155 s
= bfd_get_section_by_name (output_bfd
, name
);
14158 /* PR ld/14397: Issue an error message if a required section is missing. */
14159 (*_bfd_error_handler
)
14160 (_("error: required section '%s' not found in the linker script"), name
);
14161 bfd_set_error (bfd_error_invalid_operation
);
14164 if (!htab
->symbian_p
)
14165 dyn
.d_un
.d_ptr
= s
->vma
;
14167 /* In the BPABI, tags in the PT_DYNAMIC section point
14168 at the file offset, not the memory address, for the
14169 convenience of the post linker. */
14170 dyn
.d_un
.d_ptr
= s
->filepos
;
14171 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
14175 if (htab
->symbian_p
)
14180 s
= htab
->root
.srelplt
;
14181 BFD_ASSERT (s
!= NULL
);
14182 dyn
.d_un
.d_val
= s
->size
;
14183 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
14188 if (!htab
->symbian_p
)
14190 /* My reading of the SVR4 ABI indicates that the
14191 procedure linkage table relocs (DT_JMPREL) should be
14192 included in the overall relocs (DT_REL). This is
14193 what Solaris does. However, UnixWare can not handle
14194 that case. Therefore, we override the DT_RELSZ entry
14195 here to make it not include the JMPREL relocs. Since
14196 the linker script arranges for .rel(a).plt to follow all
14197 other relocation sections, we don't have to worry
14198 about changing the DT_REL entry. */
14199 s
= htab
->root
.srelplt
;
14201 dyn
.d_un
.d_val
-= s
->size
;
14202 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
14205 /* Fall through. */
14209 /* In the BPABI, the DT_REL tag must point at the file
14210 offset, not the VMA, of the first relocation
14211 section. So, we use code similar to that in
14212 elflink.c, but do not check for SHF_ALLOC on the
14213 relcoation section, since relocations sections are
14214 never allocated under the BPABI. The comments above
14215 about Unixware notwithstanding, we include all of the
14216 relocations here. */
14217 if (htab
->symbian_p
)
14220 type
= ((dyn
.d_tag
== DT_REL
|| dyn
.d_tag
== DT_RELSZ
)
14221 ? SHT_REL
: SHT_RELA
);
14222 dyn
.d_un
.d_val
= 0;
14223 for (i
= 1; i
< elf_numsections (output_bfd
); i
++)
14225 Elf_Internal_Shdr
*hdr
14226 = elf_elfsections (output_bfd
)[i
];
14227 if (hdr
->sh_type
== type
)
14229 if (dyn
.d_tag
== DT_RELSZ
14230 || dyn
.d_tag
== DT_RELASZ
)
14231 dyn
.d_un
.d_val
+= hdr
->sh_size
;
14232 else if ((ufile_ptr
) hdr
->sh_offset
14233 <= dyn
.d_un
.d_val
- 1)
14234 dyn
.d_un
.d_val
= hdr
->sh_offset
;
14237 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
14241 case DT_TLSDESC_PLT
:
14242 s
= htab
->root
.splt
;
14243 dyn
.d_un
.d_ptr
= (s
->output_section
->vma
+ s
->output_offset
14244 + htab
->dt_tlsdesc_plt
);
14245 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
14248 case DT_TLSDESC_GOT
:
14249 s
= htab
->root
.sgot
;
14250 dyn
.d_un
.d_ptr
= (s
->output_section
->vma
+ s
->output_offset
14251 + htab
->dt_tlsdesc_got
);
14252 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
14255 /* Set the bottom bit of DT_INIT/FINI if the
14256 corresponding function is Thumb. */
14258 name
= info
->init_function
;
14261 name
= info
->fini_function
;
14263 /* If it wasn't set by elf_bfd_final_link
14264 then there is nothing to adjust. */
14265 if (dyn
.d_un
.d_val
!= 0)
14267 struct elf_link_hash_entry
* eh
;
14269 eh
= elf_link_hash_lookup (elf_hash_table (info
), name
,
14270 FALSE
, FALSE
, TRUE
);
14271 if (eh
!= NULL
&& eh
->target_internal
== ST_BRANCH_TO_THUMB
)
14273 dyn
.d_un
.d_val
|= 1;
14274 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
14281 /* Fill in the first entry in the procedure linkage table. */
14282 if (splt
->size
> 0 && htab
->plt_header_size
)
14284 const bfd_vma
*plt0_entry
;
14285 bfd_vma got_address
, plt_address
, got_displacement
;
14287 /* Calculate the addresses of the GOT and PLT. */
14288 got_address
= sgot
->output_section
->vma
+ sgot
->output_offset
;
14289 plt_address
= splt
->output_section
->vma
+ splt
->output_offset
;
14291 if (htab
->vxworks_p
)
14293 /* The VxWorks GOT is relocated by the dynamic linker.
14294 Therefore, we must emit relocations rather than simply
14295 computing the values now. */
14296 Elf_Internal_Rela rel
;
14298 plt0_entry
= elf32_arm_vxworks_exec_plt0_entry
;
14299 put_arm_insn (htab
, output_bfd
, plt0_entry
[0],
14300 splt
->contents
+ 0);
14301 put_arm_insn (htab
, output_bfd
, plt0_entry
[1],
14302 splt
->contents
+ 4);
14303 put_arm_insn (htab
, output_bfd
, plt0_entry
[2],
14304 splt
->contents
+ 8);
14305 bfd_put_32 (output_bfd
, got_address
, splt
->contents
+ 12);
14307 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
14308 rel
.r_offset
= plt_address
+ 12;
14309 rel
.r_info
= ELF32_R_INFO (htab
->root
.hgot
->indx
, R_ARM_ABS32
);
14311 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
,
14312 htab
->srelplt2
->contents
);
14314 else if (htab
->nacl_p
)
14315 arm_nacl_put_plt0 (htab
, output_bfd
, splt
,
14316 got_address
+ 8 - (plt_address
+ 16));
14319 got_displacement
= got_address
- (plt_address
+ 16);
14321 plt0_entry
= elf32_arm_plt0_entry
;
14322 put_arm_insn (htab
, output_bfd
, plt0_entry
[0],
14323 splt
->contents
+ 0);
14324 put_arm_insn (htab
, output_bfd
, plt0_entry
[1],
14325 splt
->contents
+ 4);
14326 put_arm_insn (htab
, output_bfd
, plt0_entry
[2],
14327 splt
->contents
+ 8);
14328 put_arm_insn (htab
, output_bfd
, plt0_entry
[3],
14329 splt
->contents
+ 12);
14331 #ifdef FOUR_WORD_PLT
14332 /* The displacement value goes in the otherwise-unused
14333 last word of the second entry. */
14334 bfd_put_32 (output_bfd
, got_displacement
, splt
->contents
+ 28);
14336 bfd_put_32 (output_bfd
, got_displacement
, splt
->contents
+ 16);
14341 /* UnixWare sets the entsize of .plt to 4, although that doesn't
14342 really seem like the right value. */
14343 if (splt
->output_section
->owner
== output_bfd
)
14344 elf_section_data (splt
->output_section
)->this_hdr
.sh_entsize
= 4;
14346 if (htab
->dt_tlsdesc_plt
)
14348 bfd_vma got_address
14349 = sgot
->output_section
->vma
+ sgot
->output_offset
;
14350 bfd_vma gotplt_address
= (htab
->root
.sgot
->output_section
->vma
14351 + htab
->root
.sgot
->output_offset
);
14352 bfd_vma plt_address
14353 = splt
->output_section
->vma
+ splt
->output_offset
;
14355 arm_put_trampoline (htab
, output_bfd
,
14356 splt
->contents
+ htab
->dt_tlsdesc_plt
,
14357 dl_tlsdesc_lazy_trampoline
, 6);
14359 bfd_put_32 (output_bfd
,
14360 gotplt_address
+ htab
->dt_tlsdesc_got
14361 - (plt_address
+ htab
->dt_tlsdesc_plt
)
14362 - dl_tlsdesc_lazy_trampoline
[6],
14363 splt
->contents
+ htab
->dt_tlsdesc_plt
+ 24);
14364 bfd_put_32 (output_bfd
,
14365 got_address
- (plt_address
+ htab
->dt_tlsdesc_plt
)
14366 - dl_tlsdesc_lazy_trampoline
[7],
14367 splt
->contents
+ htab
->dt_tlsdesc_plt
+ 24 + 4);
14370 if (htab
->tls_trampoline
)
14372 arm_put_trampoline (htab
, output_bfd
,
14373 splt
->contents
+ htab
->tls_trampoline
,
14374 tls_trampoline
, 3);
14375 #ifdef FOUR_WORD_PLT
14376 bfd_put_32 (output_bfd
, 0x00000000,
14377 splt
->contents
+ htab
->tls_trampoline
+ 12);
14381 if (htab
->vxworks_p
&& !info
->shared
&& htab
->root
.splt
->size
> 0)
14383 /* Correct the .rel(a).plt.unloaded relocations. They will have
14384 incorrect symbol indexes. */
14388 num_plts
= ((htab
->root
.splt
->size
- htab
->plt_header_size
)
14389 / htab
->plt_entry_size
);
14390 p
= htab
->srelplt2
->contents
+ RELOC_SIZE (htab
);
14392 for (; num_plts
; num_plts
--)
14394 Elf_Internal_Rela rel
;
14396 SWAP_RELOC_IN (htab
) (output_bfd
, p
, &rel
);
14397 rel
.r_info
= ELF32_R_INFO (htab
->root
.hgot
->indx
, R_ARM_ABS32
);
14398 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, p
);
14399 p
+= RELOC_SIZE (htab
);
14401 SWAP_RELOC_IN (htab
) (output_bfd
, p
, &rel
);
14402 rel
.r_info
= ELF32_R_INFO (htab
->root
.hplt
->indx
, R_ARM_ABS32
);
14403 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, p
);
14404 p
+= RELOC_SIZE (htab
);
14409 if (htab
->nacl_p
&& htab
->root
.iplt
!= NULL
&& htab
->root
.iplt
->size
> 0)
14410 /* NaCl uses a special first entry in .iplt too. */
14411 arm_nacl_put_plt0 (htab
, output_bfd
, htab
->root
.iplt
, 0);
14413 /* Fill in the first three entries in the global offset table. */
14416 if (sgot
->size
> 0)
14419 bfd_put_32 (output_bfd
, (bfd_vma
) 0, sgot
->contents
);
14421 bfd_put_32 (output_bfd
,
14422 sdyn
->output_section
->vma
+ sdyn
->output_offset
,
14424 bfd_put_32 (output_bfd
, (bfd_vma
) 0, sgot
->contents
+ 4);
14425 bfd_put_32 (output_bfd
, (bfd_vma
) 0, sgot
->contents
+ 8);
14428 elf_section_data (sgot
->output_section
)->this_hdr
.sh_entsize
= 4;
14435 elf32_arm_post_process_headers (bfd
* abfd
, struct bfd_link_info
* link_info ATTRIBUTE_UNUSED
)
14437 Elf_Internal_Ehdr
* i_ehdrp
; /* ELF file header, internal form. */
14438 struct elf32_arm_link_hash_table
*globals
;
14440 i_ehdrp
= elf_elfheader (abfd
);
14442 if (EF_ARM_EABI_VERSION (i_ehdrp
->e_flags
) == EF_ARM_EABI_UNKNOWN
)
14443 i_ehdrp
->e_ident
[EI_OSABI
] = ELFOSABI_ARM
;
14445 i_ehdrp
->e_ident
[EI_OSABI
] = 0;
14446 i_ehdrp
->e_ident
[EI_ABIVERSION
] = ARM_ELF_ABI_VERSION
;
14450 globals
= elf32_arm_hash_table (link_info
);
14451 if (globals
!= NULL
&& globals
->byteswap_code
)
14452 i_ehdrp
->e_flags
|= EF_ARM_BE8
;
14455 if (EF_ARM_EABI_VERSION (i_ehdrp
->e_flags
) == EF_ARM_EABI_VER5
14456 && ((i_ehdrp
->e_type
== ET_DYN
) || (i_ehdrp
->e_type
== ET_EXEC
)))
14458 int abi
= bfd_elf_get_obj_attr_int (abfd
, OBJ_ATTR_PROC
, Tag_ABI_VFP_args
);
14460 i_ehdrp
->e_flags
|= EF_ARM_ABI_FLOAT_HARD
;
14462 i_ehdrp
->e_flags
|= EF_ARM_ABI_FLOAT_SOFT
;
14466 static enum elf_reloc_type_class
14467 elf32_arm_reloc_type_class (const struct bfd_link_info
*info ATTRIBUTE_UNUSED
,
14468 const asection
*rel_sec ATTRIBUTE_UNUSED
,
14469 const Elf_Internal_Rela
*rela
)
14471 switch ((int) ELF32_R_TYPE (rela
->r_info
))
14473 case R_ARM_RELATIVE
:
14474 return reloc_class_relative
;
14475 case R_ARM_JUMP_SLOT
:
14476 return reloc_class_plt
;
14478 return reloc_class_copy
;
14480 return reloc_class_normal
;
14485 elf32_arm_final_write_processing (bfd
*abfd
, bfd_boolean linker ATTRIBUTE_UNUSED
)
14487 bfd_arm_update_notes (abfd
, ARM_NOTE_SECTION
);
14490 /* Return TRUE if this is an unwinding table entry. */
14493 is_arm_elf_unwind_section_name (bfd
* abfd ATTRIBUTE_UNUSED
, const char * name
)
14495 return (CONST_STRNEQ (name
, ELF_STRING_ARM_unwind
)
14496 || CONST_STRNEQ (name
, ELF_STRING_ARM_unwind_once
));
14500 /* Set the type and flags for an ARM section. We do this by
14501 the section name, which is a hack, but ought to work. */
14504 elf32_arm_fake_sections (bfd
* abfd
, Elf_Internal_Shdr
* hdr
, asection
* sec
)
14508 name
= bfd_get_section_name (abfd
, sec
);
14510 if (is_arm_elf_unwind_section_name (abfd
, name
))
14512 hdr
->sh_type
= SHT_ARM_EXIDX
;
14513 hdr
->sh_flags
|= SHF_LINK_ORDER
;
14518 /* Handle an ARM specific section when reading an object file. This is
14519 called when bfd_section_from_shdr finds a section with an unknown
14523 elf32_arm_section_from_shdr (bfd
*abfd
,
14524 Elf_Internal_Shdr
* hdr
,
14528 /* There ought to be a place to keep ELF backend specific flags, but
14529 at the moment there isn't one. We just keep track of the
14530 sections by their name, instead. Fortunately, the ABI gives
14531 names for all the ARM specific sections, so we will probably get
14533 switch (hdr
->sh_type
)
14535 case SHT_ARM_EXIDX
:
14536 case SHT_ARM_PREEMPTMAP
:
14537 case SHT_ARM_ATTRIBUTES
:
14544 if (! _bfd_elf_make_section_from_shdr (abfd
, hdr
, name
, shindex
))
14550 static _arm_elf_section_data
*
14551 get_arm_elf_section_data (asection
* sec
)
14553 if (sec
&& sec
->owner
&& is_arm_elf (sec
->owner
))
14554 return elf32_arm_section_data (sec
);
14562 struct bfd_link_info
*info
;
14565 int (*func
) (void *, const char *, Elf_Internal_Sym
*,
14566 asection
*, struct elf_link_hash_entry
*);
14567 } output_arch_syminfo
;
14569 enum map_symbol_type
14577 /* Output a single mapping symbol. */
14580 elf32_arm_output_map_sym (output_arch_syminfo
*osi
,
14581 enum map_symbol_type type
,
14584 static const char *names
[3] = {"$a", "$t", "$d"};
14585 Elf_Internal_Sym sym
;
14587 sym
.st_value
= osi
->sec
->output_section
->vma
14588 + osi
->sec
->output_offset
14592 sym
.st_info
= ELF_ST_INFO (STB_LOCAL
, STT_NOTYPE
);
14593 sym
.st_shndx
= osi
->sec_shndx
;
14594 sym
.st_target_internal
= 0;
14595 elf32_arm_section_map_add (osi
->sec
, names
[type
][1], offset
);
14596 return osi
->func (osi
->flaginfo
, names
[type
], &sym
, osi
->sec
, NULL
) == 1;
14599 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
14600 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
14603 elf32_arm_output_plt_map_1 (output_arch_syminfo
*osi
,
14604 bfd_boolean is_iplt_entry_p
,
14605 union gotplt_union
*root_plt
,
14606 struct arm_plt_info
*arm_plt
)
14608 struct elf32_arm_link_hash_table
*htab
;
14609 bfd_vma addr
, plt_header_size
;
14611 if (root_plt
->offset
== (bfd_vma
) -1)
14614 htab
= elf32_arm_hash_table (osi
->info
);
14618 if (is_iplt_entry_p
)
14620 osi
->sec
= htab
->root
.iplt
;
14621 plt_header_size
= 0;
14625 osi
->sec
= htab
->root
.splt
;
14626 plt_header_size
= htab
->plt_header_size
;
14628 osi
->sec_shndx
= (_bfd_elf_section_from_bfd_section
14629 (osi
->info
->output_bfd
, osi
->sec
->output_section
));
14631 addr
= root_plt
->offset
& -2;
14632 if (htab
->symbian_p
)
14634 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
14636 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 4))
14639 else if (htab
->vxworks_p
)
14641 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
14643 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 8))
14645 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
+ 12))
14647 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 20))
14650 else if (htab
->nacl_p
)
14652 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
14657 bfd_boolean thumb_stub_p
;
14659 thumb_stub_p
= elf32_arm_plt_needs_thumb_stub_p (osi
->info
, arm_plt
);
14662 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_THUMB
, addr
- 4))
14665 #ifdef FOUR_WORD_PLT
14666 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
14668 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 12))
14671 /* A three-word PLT with no Thumb thunk contains only Arm code,
14672 so only need to output a mapping symbol for the first PLT entry and
14673 entries with thumb thunks. */
14674 if (thumb_stub_p
|| addr
== plt_header_size
)
14676 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
14685 /* Output mapping symbols for PLT entries associated with H. */
14688 elf32_arm_output_plt_map (struct elf_link_hash_entry
*h
, void *inf
)
14690 output_arch_syminfo
*osi
= (output_arch_syminfo
*) inf
;
14691 struct elf32_arm_link_hash_entry
*eh
;
14693 if (h
->root
.type
== bfd_link_hash_indirect
)
14696 if (h
->root
.type
== bfd_link_hash_warning
)
14697 /* When warning symbols are created, they **replace** the "real"
14698 entry in the hash table, thus we never get to see the real
14699 symbol in a hash traversal. So look at it now. */
14700 h
= (struct elf_link_hash_entry
*) h
->root
.u
.i
.link
;
14702 eh
= (struct elf32_arm_link_hash_entry
*) h
;
14703 return elf32_arm_output_plt_map_1 (osi
, SYMBOL_CALLS_LOCAL (osi
->info
, h
),
14704 &h
->plt
, &eh
->plt
);
14707 /* Output a single local symbol for a generated stub. */
14710 elf32_arm_output_stub_sym (output_arch_syminfo
*osi
, const char *name
,
14711 bfd_vma offset
, bfd_vma size
)
14713 Elf_Internal_Sym sym
;
14715 sym
.st_value
= osi
->sec
->output_section
->vma
14716 + osi
->sec
->output_offset
14718 sym
.st_size
= size
;
14720 sym
.st_info
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
14721 sym
.st_shndx
= osi
->sec_shndx
;
14722 sym
.st_target_internal
= 0;
14723 return osi
->func (osi
->flaginfo
, name
, &sym
, osi
->sec
, NULL
) == 1;
14727 arm_map_one_stub (struct bfd_hash_entry
* gen_entry
,
14730 struct elf32_arm_stub_hash_entry
*stub_entry
;
14731 asection
*stub_sec
;
14734 output_arch_syminfo
*osi
;
14735 const insn_sequence
*template_sequence
;
14736 enum stub_insn_type prev_type
;
14739 enum map_symbol_type sym_type
;
14741 /* Massage our args to the form they really have. */
14742 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
14743 osi
= (output_arch_syminfo
*) in_arg
;
14745 stub_sec
= stub_entry
->stub_sec
;
14747 /* Ensure this stub is attached to the current section being
14749 if (stub_sec
!= osi
->sec
)
14752 addr
= (bfd_vma
) stub_entry
->stub_offset
;
14753 stub_name
= stub_entry
->output_name
;
14755 template_sequence
= stub_entry
->stub_template
;
14756 switch (template_sequence
[0].type
)
14759 if (!elf32_arm_output_stub_sym (osi
, stub_name
, addr
, stub_entry
->stub_size
))
14764 if (!elf32_arm_output_stub_sym (osi
, stub_name
, addr
| 1,
14765 stub_entry
->stub_size
))
14773 prev_type
= DATA_TYPE
;
14775 for (i
= 0; i
< stub_entry
->stub_template_size
; i
++)
14777 switch (template_sequence
[i
].type
)
14780 sym_type
= ARM_MAP_ARM
;
14785 sym_type
= ARM_MAP_THUMB
;
14789 sym_type
= ARM_MAP_DATA
;
14797 if (template_sequence
[i
].type
!= prev_type
)
14799 prev_type
= template_sequence
[i
].type
;
14800 if (!elf32_arm_output_map_sym (osi
, sym_type
, addr
+ size
))
14804 switch (template_sequence
[i
].type
)
14828 /* Output mapping symbols for linker generated sections,
14829 and for those data-only sections that do not have a
14833 elf32_arm_output_arch_local_syms (bfd
*output_bfd
,
14834 struct bfd_link_info
*info
,
14836 int (*func
) (void *, const char *,
14837 Elf_Internal_Sym
*,
14839 struct elf_link_hash_entry
*))
14841 output_arch_syminfo osi
;
14842 struct elf32_arm_link_hash_table
*htab
;
14844 bfd_size_type size
;
14847 htab
= elf32_arm_hash_table (info
);
14851 check_use_blx (htab
);
14853 osi
.flaginfo
= flaginfo
;
14857 /* Add a $d mapping symbol to data-only sections that
14858 don't have any mapping symbol. This may result in (harmless) redundant
14859 mapping symbols. */
14860 for (input_bfd
= info
->input_bfds
;
14862 input_bfd
= input_bfd
->link_next
)
14864 if ((input_bfd
->flags
& (BFD_LINKER_CREATED
| HAS_SYMS
)) == HAS_SYMS
)
14865 for (osi
.sec
= input_bfd
->sections
;
14867 osi
.sec
= osi
.sec
->next
)
14869 if (osi
.sec
->output_section
!= NULL
14870 && ((osi
.sec
->output_section
->flags
& (SEC_ALLOC
| SEC_CODE
))
14872 && (osi
.sec
->flags
& (SEC_HAS_CONTENTS
| SEC_LINKER_CREATED
))
14873 == SEC_HAS_CONTENTS
14874 && get_arm_elf_section_data (osi
.sec
) != NULL
14875 && get_arm_elf_section_data (osi
.sec
)->mapcount
== 0
14876 && osi
.sec
->size
> 0
14877 && (osi
.sec
->flags
& SEC_EXCLUDE
) == 0)
14879 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
14880 (output_bfd
, osi
.sec
->output_section
);
14881 if (osi
.sec_shndx
!= (int)SHN_BAD
)
14882 elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, 0);
14887 /* ARM->Thumb glue. */
14888 if (htab
->arm_glue_size
> 0)
14890 osi
.sec
= bfd_get_linker_section (htab
->bfd_of_glue_owner
,
14891 ARM2THUMB_GLUE_SECTION_NAME
);
14893 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
14894 (output_bfd
, osi
.sec
->output_section
);
14895 if (info
->shared
|| htab
->root
.is_relocatable_executable
14896 || htab
->pic_veneer
)
14897 size
= ARM2THUMB_PIC_GLUE_SIZE
;
14898 else if (htab
->use_blx
)
14899 size
= ARM2THUMB_V5_STATIC_GLUE_SIZE
;
14901 size
= ARM2THUMB_STATIC_GLUE_SIZE
;
14903 for (offset
= 0; offset
< htab
->arm_glue_size
; offset
+= size
)
14905 elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, offset
);
14906 elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, offset
+ size
- 4);
14910 /* Thumb->ARM glue. */
14911 if (htab
->thumb_glue_size
> 0)
14913 osi
.sec
= bfd_get_linker_section (htab
->bfd_of_glue_owner
,
14914 THUMB2ARM_GLUE_SECTION_NAME
);
14916 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
14917 (output_bfd
, osi
.sec
->output_section
);
14918 size
= THUMB2ARM_GLUE_SIZE
;
14920 for (offset
= 0; offset
< htab
->thumb_glue_size
; offset
+= size
)
14922 elf32_arm_output_map_sym (&osi
, ARM_MAP_THUMB
, offset
);
14923 elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, offset
+ 4);
14927 /* ARMv4 BX veneers. */
14928 if (htab
->bx_glue_size
> 0)
14930 osi
.sec
= bfd_get_linker_section (htab
->bfd_of_glue_owner
,
14931 ARM_BX_GLUE_SECTION_NAME
);
14933 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
14934 (output_bfd
, osi
.sec
->output_section
);
14936 elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0);
14939 /* Long calls stubs. */
14940 if (htab
->stub_bfd
&& htab
->stub_bfd
->sections
)
14942 asection
* stub_sec
;
14944 for (stub_sec
= htab
->stub_bfd
->sections
;
14946 stub_sec
= stub_sec
->next
)
14948 /* Ignore non-stub sections. */
14949 if (!strstr (stub_sec
->name
, STUB_SUFFIX
))
14952 osi
.sec
= stub_sec
;
14954 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
14955 (output_bfd
, osi
.sec
->output_section
);
14957 bfd_hash_traverse (&htab
->stub_hash_table
, arm_map_one_stub
, &osi
);
14961 /* Finally, output mapping symbols for the PLT. */
14962 if (htab
->root
.splt
&& htab
->root
.splt
->size
> 0)
14964 osi
.sec
= htab
->root
.splt
;
14965 osi
.sec_shndx
= (_bfd_elf_section_from_bfd_section
14966 (output_bfd
, osi
.sec
->output_section
));
14968 /* Output mapping symbols for the plt header. SymbianOS does not have a
14970 if (htab
->vxworks_p
)
14972 /* VxWorks shared libraries have no PLT header. */
14975 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0))
14977 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, 12))
14981 else if (htab
->nacl_p
)
14983 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0))
14986 else if (!htab
->symbian_p
)
14988 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0))
14990 #ifndef FOUR_WORD_PLT
14991 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, 16))
14996 if (htab
->nacl_p
&& htab
->root
.iplt
&& htab
->root
.iplt
->size
> 0)
14998 /* NaCl uses a special first entry in .iplt too. */
14999 osi
.sec
= htab
->root
.iplt
;
15000 osi
.sec_shndx
= (_bfd_elf_section_from_bfd_section
15001 (output_bfd
, osi
.sec
->output_section
));
15002 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0))
15005 if ((htab
->root
.splt
&& htab
->root
.splt
->size
> 0)
15006 || (htab
->root
.iplt
&& htab
->root
.iplt
->size
> 0))
15008 elf_link_hash_traverse (&htab
->root
, elf32_arm_output_plt_map
, &osi
);
15009 for (input_bfd
= info
->input_bfds
;
15011 input_bfd
= input_bfd
->link_next
)
15013 struct arm_local_iplt_info
**local_iplt
;
15014 unsigned int i
, num_syms
;
15016 local_iplt
= elf32_arm_local_iplt (input_bfd
);
15017 if (local_iplt
!= NULL
)
15019 num_syms
= elf_symtab_hdr (input_bfd
).sh_info
;
15020 for (i
= 0; i
< num_syms
; i
++)
15021 if (local_iplt
[i
] != NULL
15022 && !elf32_arm_output_plt_map_1 (&osi
, TRUE
,
15023 &local_iplt
[i
]->root
,
15024 &local_iplt
[i
]->arm
))
15029 if (htab
->dt_tlsdesc_plt
!= 0)
15031 /* Mapping symbols for the lazy tls trampoline. */
15032 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, htab
->dt_tlsdesc_plt
))
15035 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
,
15036 htab
->dt_tlsdesc_plt
+ 24))
15039 if (htab
->tls_trampoline
!= 0)
15041 /* Mapping symbols for the tls trampoline. */
15042 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, htab
->tls_trampoline
))
15044 #ifdef FOUR_WORD_PLT
15045 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
,
15046 htab
->tls_trampoline
+ 12))
15054 /* Allocate target specific section data. */
15057 elf32_arm_new_section_hook (bfd
*abfd
, asection
*sec
)
15059 if (!sec
->used_by_bfd
)
15061 _arm_elf_section_data
*sdata
;
15062 bfd_size_type amt
= sizeof (*sdata
);
15064 sdata
= (_arm_elf_section_data
*) bfd_zalloc (abfd
, amt
);
15067 sec
->used_by_bfd
= sdata
;
15070 return _bfd_elf_new_section_hook (abfd
, sec
);
15074 /* Used to order a list of mapping symbols by address. */
15077 elf32_arm_compare_mapping (const void * a
, const void * b
)
15079 const elf32_arm_section_map
*amap
= (const elf32_arm_section_map
*) a
;
15080 const elf32_arm_section_map
*bmap
= (const elf32_arm_section_map
*) b
;
15082 if (amap
->vma
> bmap
->vma
)
15084 else if (amap
->vma
< bmap
->vma
)
15086 else if (amap
->type
> bmap
->type
)
15087 /* Ensure results do not depend on the host qsort for objects with
15088 multiple mapping symbols at the same address by sorting on type
15091 else if (amap
->type
< bmap
->type
)
15097 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
15099 static unsigned long
15100 offset_prel31 (unsigned long addr
, bfd_vma offset
)
15102 return (addr
& ~0x7ffffffful
) | ((addr
+ offset
) & 0x7ffffffful
);
15105 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
15109 copy_exidx_entry (bfd
*output_bfd
, bfd_byte
*to
, bfd_byte
*from
, bfd_vma offset
)
15111 unsigned long first_word
= bfd_get_32 (output_bfd
, from
);
15112 unsigned long second_word
= bfd_get_32 (output_bfd
, from
+ 4);
15114 /* High bit of first word is supposed to be zero. */
15115 if ((first_word
& 0x80000000ul
) == 0)
15116 first_word
= offset_prel31 (first_word
, offset
);
15118 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
15119 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
15120 if ((second_word
!= 0x1) && ((second_word
& 0x80000000ul
) == 0))
15121 second_word
= offset_prel31 (second_word
, offset
);
15123 bfd_put_32 (output_bfd
, first_word
, to
);
15124 bfd_put_32 (output_bfd
, second_word
, to
+ 4);
15127 /* Data for make_branch_to_a8_stub(). */
15129 struct a8_branch_to_stub_data
15131 asection
*writing_section
;
15132 bfd_byte
*contents
;
15136 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
15137 places for a particular section. */
15140 make_branch_to_a8_stub (struct bfd_hash_entry
*gen_entry
,
15143 struct elf32_arm_stub_hash_entry
*stub_entry
;
15144 struct a8_branch_to_stub_data
*data
;
15145 bfd_byte
*contents
;
15146 unsigned long branch_insn
;
15147 bfd_vma veneered_insn_loc
, veneer_entry_loc
;
15148 bfd_signed_vma branch_offset
;
15150 unsigned int target
;
15152 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
15153 data
= (struct a8_branch_to_stub_data
*) in_arg
;
15155 if (stub_entry
->target_section
!= data
->writing_section
15156 || stub_entry
->stub_type
< arm_stub_a8_veneer_lwm
)
15159 contents
= data
->contents
;
15161 veneered_insn_loc
= stub_entry
->target_section
->output_section
->vma
15162 + stub_entry
->target_section
->output_offset
15163 + stub_entry
->target_value
;
15165 veneer_entry_loc
= stub_entry
->stub_sec
->output_section
->vma
15166 + stub_entry
->stub_sec
->output_offset
15167 + stub_entry
->stub_offset
;
15169 if (stub_entry
->stub_type
== arm_stub_a8_veneer_blx
)
15170 veneered_insn_loc
&= ~3u;
15172 branch_offset
= veneer_entry_loc
- veneered_insn_loc
- 4;
15174 abfd
= stub_entry
->target_section
->owner
;
15175 target
= stub_entry
->target_value
;
15177 /* We attempt to avoid this condition by setting stubs_always_after_branch
15178 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
15179 This check is just to be on the safe side... */
15180 if ((veneered_insn_loc
& ~0xfff) == (veneer_entry_loc
& ~0xfff))
15182 (*_bfd_error_handler
) (_("%B: error: Cortex-A8 erratum stub is "
15183 "allocated in unsafe location"), abfd
);
15187 switch (stub_entry
->stub_type
)
15189 case arm_stub_a8_veneer_b
:
15190 case arm_stub_a8_veneer_b_cond
:
15191 branch_insn
= 0xf0009000;
15194 case arm_stub_a8_veneer_blx
:
15195 branch_insn
= 0xf000e800;
15198 case arm_stub_a8_veneer_bl
:
15200 unsigned int i1
, j1
, i2
, j2
, s
;
15202 branch_insn
= 0xf000d000;
15205 if (branch_offset
< -16777216 || branch_offset
> 16777214)
15207 /* There's not much we can do apart from complain if this
15209 (*_bfd_error_handler
) (_("%B: error: Cortex-A8 erratum stub out "
15210 "of range (input file too large)"), abfd
);
15214 /* i1 = not(j1 eor s), so:
15216 j1 = (not i1) eor s. */
15218 branch_insn
|= (branch_offset
>> 1) & 0x7ff;
15219 branch_insn
|= ((branch_offset
>> 12) & 0x3ff) << 16;
15220 i2
= (branch_offset
>> 22) & 1;
15221 i1
= (branch_offset
>> 23) & 1;
15222 s
= (branch_offset
>> 24) & 1;
15225 branch_insn
|= j2
<< 11;
15226 branch_insn
|= j1
<< 13;
15227 branch_insn
|= s
<< 26;
15236 bfd_put_16 (abfd
, (branch_insn
>> 16) & 0xffff, &contents
[target
]);
15237 bfd_put_16 (abfd
, branch_insn
& 0xffff, &contents
[target
+ 2]);
15242 /* Do code byteswapping. Return FALSE afterwards so that the section is
15243 written out as normal. */
15246 elf32_arm_write_section (bfd
*output_bfd
,
15247 struct bfd_link_info
*link_info
,
15249 bfd_byte
*contents
)
15251 unsigned int mapcount
, errcount
;
15252 _arm_elf_section_data
*arm_data
;
15253 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
15254 elf32_arm_section_map
*map
;
15255 elf32_vfp11_erratum_list
*errnode
;
15258 bfd_vma offset
= sec
->output_section
->vma
+ sec
->output_offset
;
15262 if (globals
== NULL
)
15265 /* If this section has not been allocated an _arm_elf_section_data
15266 structure then we cannot record anything. */
15267 arm_data
= get_arm_elf_section_data (sec
);
15268 if (arm_data
== NULL
)
15271 mapcount
= arm_data
->mapcount
;
15272 map
= arm_data
->map
;
15273 errcount
= arm_data
->erratumcount
;
15277 unsigned int endianflip
= bfd_big_endian (output_bfd
) ? 3 : 0;
15279 for (errnode
= arm_data
->erratumlist
; errnode
!= 0;
15280 errnode
= errnode
->next
)
15282 bfd_vma target
= errnode
->vma
- offset
;
15284 switch (errnode
->type
)
15286 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER
:
15288 bfd_vma branch_to_veneer
;
15289 /* Original condition code of instruction, plus bit mask for
15290 ARM B instruction. */
15291 unsigned int insn
= (errnode
->u
.b
.vfp_insn
& 0xf0000000)
15294 /* The instruction is before the label. */
15297 /* Above offset included in -4 below. */
15298 branch_to_veneer
= errnode
->u
.b
.veneer
->vma
15299 - errnode
->vma
- 4;
15301 if ((signed) branch_to_veneer
< -(1 << 25)
15302 || (signed) branch_to_veneer
>= (1 << 25))
15303 (*_bfd_error_handler
) (_("%B: error: VFP11 veneer out of "
15304 "range"), output_bfd
);
15306 insn
|= (branch_to_veneer
>> 2) & 0xffffff;
15307 contents
[endianflip
^ target
] = insn
& 0xff;
15308 contents
[endianflip
^ (target
+ 1)] = (insn
>> 8) & 0xff;
15309 contents
[endianflip
^ (target
+ 2)] = (insn
>> 16) & 0xff;
15310 contents
[endianflip
^ (target
+ 3)] = (insn
>> 24) & 0xff;
15314 case VFP11_ERRATUM_ARM_VENEER
:
15316 bfd_vma branch_from_veneer
;
15319 /* Take size of veneer into account. */
15320 branch_from_veneer
= errnode
->u
.v
.branch
->vma
15321 - errnode
->vma
- 12;
15323 if ((signed) branch_from_veneer
< -(1 << 25)
15324 || (signed) branch_from_veneer
>= (1 << 25))
15325 (*_bfd_error_handler
) (_("%B: error: VFP11 veneer out of "
15326 "range"), output_bfd
);
15328 /* Original instruction. */
15329 insn
= errnode
->u
.v
.branch
->u
.b
.vfp_insn
;
15330 contents
[endianflip
^ target
] = insn
& 0xff;
15331 contents
[endianflip
^ (target
+ 1)] = (insn
>> 8) & 0xff;
15332 contents
[endianflip
^ (target
+ 2)] = (insn
>> 16) & 0xff;
15333 contents
[endianflip
^ (target
+ 3)] = (insn
>> 24) & 0xff;
15335 /* Branch back to insn after original insn. */
15336 insn
= 0xea000000 | ((branch_from_veneer
>> 2) & 0xffffff);
15337 contents
[endianflip
^ (target
+ 4)] = insn
& 0xff;
15338 contents
[endianflip
^ (target
+ 5)] = (insn
>> 8) & 0xff;
15339 contents
[endianflip
^ (target
+ 6)] = (insn
>> 16) & 0xff;
15340 contents
[endianflip
^ (target
+ 7)] = (insn
>> 24) & 0xff;
15350 if (arm_data
->elf
.this_hdr
.sh_type
== SHT_ARM_EXIDX
)
15352 arm_unwind_table_edit
*edit_node
15353 = arm_data
->u
.exidx
.unwind_edit_list
;
15354 /* Now, sec->size is the size of the section we will write. The original
15355 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
15356 markers) was sec->rawsize. (This isn't the case if we perform no
15357 edits, then rawsize will be zero and we should use size). */
15358 bfd_byte
*edited_contents
= (bfd_byte
*) bfd_malloc (sec
->size
);
15359 unsigned int input_size
= sec
->rawsize
? sec
->rawsize
: sec
->size
;
15360 unsigned int in_index
, out_index
;
15361 bfd_vma add_to_offsets
= 0;
15363 for (in_index
= 0, out_index
= 0; in_index
* 8 < input_size
|| edit_node
;)
15367 unsigned int edit_index
= edit_node
->index
;
15369 if (in_index
< edit_index
&& in_index
* 8 < input_size
)
15371 copy_exidx_entry (output_bfd
, edited_contents
+ out_index
* 8,
15372 contents
+ in_index
* 8, add_to_offsets
);
15376 else if (in_index
== edit_index
15377 || (in_index
* 8 >= input_size
15378 && edit_index
== UINT_MAX
))
15380 switch (edit_node
->type
)
15382 case DELETE_EXIDX_ENTRY
:
15384 add_to_offsets
+= 8;
15387 case INSERT_EXIDX_CANTUNWIND_AT_END
:
15389 asection
*text_sec
= edit_node
->linked_section
;
15390 bfd_vma text_offset
= text_sec
->output_section
->vma
15391 + text_sec
->output_offset
15393 bfd_vma exidx_offset
= offset
+ out_index
* 8;
15394 unsigned long prel31_offset
;
15396 /* Note: this is meant to be equivalent to an
15397 R_ARM_PREL31 relocation. These synthetic
15398 EXIDX_CANTUNWIND markers are not relocated by the
15399 usual BFD method. */
15400 prel31_offset
= (text_offset
- exidx_offset
)
15403 /* First address we can't unwind. */
15404 bfd_put_32 (output_bfd
, prel31_offset
,
15405 &edited_contents
[out_index
* 8]);
15407 /* Code for EXIDX_CANTUNWIND. */
15408 bfd_put_32 (output_bfd
, 0x1,
15409 &edited_contents
[out_index
* 8 + 4]);
15412 add_to_offsets
-= 8;
15417 edit_node
= edit_node
->next
;
15422 /* No more edits, copy remaining entries verbatim. */
15423 copy_exidx_entry (output_bfd
, edited_contents
+ out_index
* 8,
15424 contents
+ in_index
* 8, add_to_offsets
);
15430 if (!(sec
->flags
& SEC_EXCLUDE
) && !(sec
->flags
& SEC_NEVER_LOAD
))
15431 bfd_set_section_contents (output_bfd
, sec
->output_section
,
15433 (file_ptr
) sec
->output_offset
, sec
->size
);
15438 /* Fix code to point to Cortex-A8 erratum stubs. */
15439 if (globals
->fix_cortex_a8
)
15441 struct a8_branch_to_stub_data data
;
15443 data
.writing_section
= sec
;
15444 data
.contents
= contents
;
15446 bfd_hash_traverse (&globals
->stub_hash_table
, make_branch_to_a8_stub
,
15453 if (globals
->byteswap_code
)
15455 qsort (map
, mapcount
, sizeof (* map
), elf32_arm_compare_mapping
);
15458 for (i
= 0; i
< mapcount
; i
++)
15460 if (i
== mapcount
- 1)
15463 end
= map
[i
+ 1].vma
;
15465 switch (map
[i
].type
)
15468 /* Byte swap code words. */
15469 while (ptr
+ 3 < end
)
15471 tmp
= contents
[ptr
];
15472 contents
[ptr
] = contents
[ptr
+ 3];
15473 contents
[ptr
+ 3] = tmp
;
15474 tmp
= contents
[ptr
+ 1];
15475 contents
[ptr
+ 1] = contents
[ptr
+ 2];
15476 contents
[ptr
+ 2] = tmp
;
15482 /* Byte swap code halfwords. */
15483 while (ptr
+ 1 < end
)
15485 tmp
= contents
[ptr
];
15486 contents
[ptr
] = contents
[ptr
+ 1];
15487 contents
[ptr
+ 1] = tmp
;
15493 /* Leave data alone. */
15501 arm_data
->mapcount
= -1;
15502 arm_data
->mapsize
= 0;
15503 arm_data
->map
= NULL
;
15508 /* Mangle thumb function symbols as we read them in. */
15511 elf32_arm_swap_symbol_in (bfd
* abfd
,
15514 Elf_Internal_Sym
*dst
)
15516 if (!bfd_elf32_swap_symbol_in (abfd
, psrc
, pshn
, dst
))
15519 /* New EABI objects mark thumb function symbols by setting the low bit of
15521 if (ELF_ST_TYPE (dst
->st_info
) == STT_FUNC
15522 || ELF_ST_TYPE (dst
->st_info
) == STT_GNU_IFUNC
)
15524 if (dst
->st_value
& 1)
15526 dst
->st_value
&= ~(bfd_vma
) 1;
15527 dst
->st_target_internal
= ST_BRANCH_TO_THUMB
;
15530 dst
->st_target_internal
= ST_BRANCH_TO_ARM
;
15532 else if (ELF_ST_TYPE (dst
->st_info
) == STT_ARM_TFUNC
)
15534 dst
->st_info
= ELF_ST_INFO (ELF_ST_BIND (dst
->st_info
), STT_FUNC
);
15535 dst
->st_target_internal
= ST_BRANCH_TO_THUMB
;
15537 else if (ELF_ST_TYPE (dst
->st_info
) == STT_SECTION
)
15538 dst
->st_target_internal
= ST_BRANCH_LONG
;
15540 dst
->st_target_internal
= ST_BRANCH_UNKNOWN
;
15546 /* Mangle thumb function symbols as we write them out. */
15549 elf32_arm_swap_symbol_out (bfd
*abfd
,
15550 const Elf_Internal_Sym
*src
,
15554 Elf_Internal_Sym newsym
;
15556 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
15557 of the address set, as per the new EABI. We do this unconditionally
15558 because objcopy does not set the elf header flags until after
15559 it writes out the symbol table. */
15560 if (src
->st_target_internal
== ST_BRANCH_TO_THUMB
)
15563 if (ELF_ST_TYPE (src
->st_info
) != STT_GNU_IFUNC
)
15564 newsym
.st_info
= ELF_ST_INFO (ELF_ST_BIND (src
->st_info
), STT_FUNC
);
15565 if (newsym
.st_shndx
!= SHN_UNDEF
)
15567 /* Do this only for defined symbols. At link type, the static
15568 linker will simulate the work of dynamic linker of resolving
15569 symbols and will carry over the thumbness of found symbols to
15570 the output symbol table. It's not clear how it happens, but
15571 the thumbness of undefined symbols can well be different at
15572 runtime, and writing '1' for them will be confusing for users
15573 and possibly for dynamic linker itself.
15575 newsym
.st_value
|= 1;
15580 bfd_elf32_swap_symbol_out (abfd
, src
, cdst
, shndx
);
15583 /* Add the PT_ARM_EXIDX program header. */
15586 elf32_arm_modify_segment_map (bfd
*abfd
,
15587 struct bfd_link_info
*info ATTRIBUTE_UNUSED
)
15589 struct elf_segment_map
*m
;
15592 sec
= bfd_get_section_by_name (abfd
, ".ARM.exidx");
15593 if (sec
!= NULL
&& (sec
->flags
& SEC_LOAD
) != 0)
15595 /* If there is already a PT_ARM_EXIDX header, then we do not
15596 want to add another one. This situation arises when running
15597 "strip"; the input binary already has the header. */
15598 m
= elf_seg_map (abfd
);
15599 while (m
&& m
->p_type
!= PT_ARM_EXIDX
)
15603 m
= (struct elf_segment_map
*)
15604 bfd_zalloc (abfd
, sizeof (struct elf_segment_map
));
15607 m
->p_type
= PT_ARM_EXIDX
;
15609 m
->sections
[0] = sec
;
15611 m
->next
= elf_seg_map (abfd
);
15612 elf_seg_map (abfd
) = m
;
15619 /* We may add a PT_ARM_EXIDX program header. */
15622 elf32_arm_additional_program_headers (bfd
*abfd
,
15623 struct bfd_link_info
*info ATTRIBUTE_UNUSED
)
15627 sec
= bfd_get_section_by_name (abfd
, ".ARM.exidx");
15628 if (sec
!= NULL
&& (sec
->flags
& SEC_LOAD
) != 0)
15634 /* Hook called by the linker routine which adds symbols from an object
15638 elf32_arm_add_symbol_hook (bfd
*abfd
, struct bfd_link_info
*info
,
15639 Elf_Internal_Sym
*sym
, const char **namep
,
15640 flagword
*flagsp
, asection
**secp
, bfd_vma
*valp
)
15642 if ((abfd
->flags
& DYNAMIC
) == 0
15643 && (ELF_ST_TYPE (sym
->st_info
) == STT_GNU_IFUNC
15644 || ELF_ST_BIND (sym
->st_info
) == STB_GNU_UNIQUE
))
15645 elf_tdata (info
->output_bfd
)->has_gnu_symbols
= TRUE
;
15647 if (elf32_arm_hash_table (info
)->vxworks_p
15648 && !elf_vxworks_add_symbol_hook (abfd
, info
, sym
, namep
,
15649 flagsp
, secp
, valp
))
15655 /* We use this to override swap_symbol_in and swap_symbol_out. */
15656 const struct elf_size_info elf32_arm_size_info
=
15658 sizeof (Elf32_External_Ehdr
),
15659 sizeof (Elf32_External_Phdr
),
15660 sizeof (Elf32_External_Shdr
),
15661 sizeof (Elf32_External_Rel
),
15662 sizeof (Elf32_External_Rela
),
15663 sizeof (Elf32_External_Sym
),
15664 sizeof (Elf32_External_Dyn
),
15665 sizeof (Elf_External_Note
),
15669 ELFCLASS32
, EV_CURRENT
,
15670 bfd_elf32_write_out_phdrs
,
15671 bfd_elf32_write_shdrs_and_ehdr
,
15672 bfd_elf32_checksum_contents
,
15673 bfd_elf32_write_relocs
,
15674 elf32_arm_swap_symbol_in
,
15675 elf32_arm_swap_symbol_out
,
15676 bfd_elf32_slurp_reloc_table
,
15677 bfd_elf32_slurp_symbol_table
,
15678 bfd_elf32_swap_dyn_in
,
15679 bfd_elf32_swap_dyn_out
,
15680 bfd_elf32_swap_reloc_in
,
15681 bfd_elf32_swap_reloc_out
,
15682 bfd_elf32_swap_reloca_in
,
15683 bfd_elf32_swap_reloca_out
15686 #define ELF_ARCH bfd_arch_arm
15687 #define ELF_TARGET_ID ARM_ELF_DATA
15688 #define ELF_MACHINE_CODE EM_ARM
15689 #ifdef __QNXTARGET__
15690 #define ELF_MAXPAGESIZE 0x1000
15692 #define ELF_MAXPAGESIZE 0x8000
15694 #define ELF_MINPAGESIZE 0x1000
15695 #define ELF_COMMONPAGESIZE 0x1000
15697 #define bfd_elf32_mkobject elf32_arm_mkobject
15699 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
15700 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
15701 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
15702 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
15703 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
15704 #define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free
15705 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
15706 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
15707 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
15708 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
15709 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
15710 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
15711 #define bfd_elf32_bfd_final_link elf32_arm_final_link
15713 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
15714 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
15715 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
15716 #define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
15717 #define elf_backend_check_relocs elf32_arm_check_relocs
15718 #define elf_backend_relocate_section elf32_arm_relocate_section
15719 #define elf_backend_write_section elf32_arm_write_section
15720 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
15721 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
15722 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
15723 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
15724 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
15725 #define elf_backend_always_size_sections elf32_arm_always_size_sections
15726 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
15727 #define elf_backend_post_process_headers elf32_arm_post_process_headers
15728 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
15729 #define elf_backend_object_p elf32_arm_object_p
15730 #define elf_backend_fake_sections elf32_arm_fake_sections
15731 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
15732 #define elf_backend_final_write_processing elf32_arm_final_write_processing
15733 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
15734 #define elf_backend_size_info elf32_arm_size_info
15735 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
15736 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
15737 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
15738 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
15739 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
15741 #define elf_backend_can_refcount 1
15742 #define elf_backend_can_gc_sections 1
15743 #define elf_backend_plt_readonly 1
15744 #define elf_backend_want_got_plt 1
15745 #define elf_backend_want_plt_sym 0
15746 #define elf_backend_may_use_rel_p 1
15747 #define elf_backend_may_use_rela_p 0
15748 #define elf_backend_default_use_rela_p 0
15750 #define elf_backend_got_header_size 12
15752 #undef elf_backend_obj_attrs_vendor
15753 #define elf_backend_obj_attrs_vendor "aeabi"
15754 #undef elf_backend_obj_attrs_section
15755 #define elf_backend_obj_attrs_section ".ARM.attributes"
15756 #undef elf_backend_obj_attrs_arg_type
15757 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
15758 #undef elf_backend_obj_attrs_section_type
15759 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
15760 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
15761 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
15763 #include "elf32-target.h"
15765 /* Native Client targets. */
15767 #undef TARGET_LITTLE_SYM
15768 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_nacl_vec
15769 #undef TARGET_LITTLE_NAME
15770 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
15771 #undef TARGET_BIG_SYM
15772 #define TARGET_BIG_SYM bfd_elf32_bigarm_nacl_vec
15773 #undef TARGET_BIG_NAME
15774 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
15776 /* Like elf32_arm_link_hash_table_create -- but overrides
15777 appropriately for NaCl. */
15779 static struct bfd_link_hash_table
*
15780 elf32_arm_nacl_link_hash_table_create (bfd
*abfd
)
15782 struct bfd_link_hash_table
*ret
;
15784 ret
= elf32_arm_link_hash_table_create (abfd
);
15787 struct elf32_arm_link_hash_table
*htab
15788 = (struct elf32_arm_link_hash_table
*) ret
;
15792 htab
->plt_header_size
= 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry
);
15793 htab
->plt_entry_size
= 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry
);
15798 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
15799 really need to use elf32_arm_modify_segment_map. But we do it
15800 anyway just to reduce gratuitous differences with the stock ARM backend. */
15803 elf32_arm_nacl_modify_segment_map (bfd
*abfd
, struct bfd_link_info
*info
)
15805 return (elf32_arm_modify_segment_map (abfd
, info
)
15806 && nacl_modify_segment_map (abfd
, info
));
15810 #define elf32_bed elf32_arm_nacl_bed
15811 #undef bfd_elf32_bfd_link_hash_table_create
15812 #define bfd_elf32_bfd_link_hash_table_create \
15813 elf32_arm_nacl_link_hash_table_create
15814 #undef elf_backend_plt_alignment
15815 #define elf_backend_plt_alignment 4
15816 #undef elf_backend_modify_segment_map
15817 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
15818 #undef elf_backend_modify_program_headers
15819 #define elf_backend_modify_program_headers nacl_modify_program_headers
15821 #undef ELF_MAXPAGESIZE
15822 #define ELF_MAXPAGESIZE 0x10000
15824 #include "elf32-target.h"
15826 /* Reset to defaults. */
15827 #undef elf_backend_plt_alignment
15828 #undef elf_backend_modify_segment_map
15829 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
15830 #undef elf_backend_modify_program_headers
15832 /* VxWorks Targets. */
15834 #undef TARGET_LITTLE_SYM
15835 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
15836 #undef TARGET_LITTLE_NAME
15837 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
15838 #undef TARGET_BIG_SYM
15839 #define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
15840 #undef TARGET_BIG_NAME
15841 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
15843 /* Like elf32_arm_link_hash_table_create -- but overrides
15844 appropriately for VxWorks. */
15846 static struct bfd_link_hash_table
*
15847 elf32_arm_vxworks_link_hash_table_create (bfd
*abfd
)
15849 struct bfd_link_hash_table
*ret
;
15851 ret
= elf32_arm_link_hash_table_create (abfd
);
15854 struct elf32_arm_link_hash_table
*htab
15855 = (struct elf32_arm_link_hash_table
*) ret
;
15857 htab
->vxworks_p
= 1;
15863 elf32_arm_vxworks_final_write_processing (bfd
*abfd
, bfd_boolean linker
)
15865 elf32_arm_final_write_processing (abfd
, linker
);
15866 elf_vxworks_final_write_processing (abfd
, linker
);
15870 #define elf32_bed elf32_arm_vxworks_bed
15872 #undef bfd_elf32_bfd_link_hash_table_create
15873 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
15874 #undef elf_backend_final_write_processing
15875 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
15876 #undef elf_backend_emit_relocs
15877 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
15879 #undef elf_backend_may_use_rel_p
15880 #define elf_backend_may_use_rel_p 0
15881 #undef elf_backend_may_use_rela_p
15882 #define elf_backend_may_use_rela_p 1
15883 #undef elf_backend_default_use_rela_p
15884 #define elf_backend_default_use_rela_p 1
15885 #undef elf_backend_want_plt_sym
15886 #define elf_backend_want_plt_sym 1
15887 #undef ELF_MAXPAGESIZE
15888 #define ELF_MAXPAGESIZE 0x1000
15890 #include "elf32-target.h"
15893 /* Merge backend specific data from an object file to the output
15894 object file when linking. */
15897 elf32_arm_merge_private_bfd_data (bfd
* ibfd
, bfd
* obfd
)
15899 flagword out_flags
;
15901 bfd_boolean flags_compatible
= TRUE
;
15904 /* Check if we have the same endianness. */
15905 if (! _bfd_generic_verify_endian_match (ibfd
, obfd
))
15908 if (! is_arm_elf (ibfd
) || ! is_arm_elf (obfd
))
15911 if (!elf32_arm_merge_eabi_attributes (ibfd
, obfd
))
15914 /* The input BFD must have had its flags initialised. */
15915 /* The following seems bogus to me -- The flags are initialized in
15916 the assembler but I don't think an elf_flags_init field is
15917 written into the object. */
15918 /* BFD_ASSERT (elf_flags_init (ibfd)); */
15920 in_flags
= elf_elfheader (ibfd
)->e_flags
;
15921 out_flags
= elf_elfheader (obfd
)->e_flags
;
15923 /* In theory there is no reason why we couldn't handle this. However
15924 in practice it isn't even close to working and there is no real
15925 reason to want it. */
15926 if (EF_ARM_EABI_VERSION (in_flags
) >= EF_ARM_EABI_VER4
15927 && !(ibfd
->flags
& DYNAMIC
)
15928 && (in_flags
& EF_ARM_BE8
))
15930 _bfd_error_handler (_("error: %B is already in final BE8 format"),
15935 if (!elf_flags_init (obfd
))
15937 /* If the input is the default architecture and had the default
15938 flags then do not bother setting the flags for the output
15939 architecture, instead allow future merges to do this. If no
15940 future merges ever set these flags then they will retain their
15941 uninitialised values, which surprise surprise, correspond
15942 to the default values. */
15943 if (bfd_get_arch_info (ibfd
)->the_default
15944 && elf_elfheader (ibfd
)->e_flags
== 0)
15947 elf_flags_init (obfd
) = TRUE
;
15948 elf_elfheader (obfd
)->e_flags
= in_flags
;
15950 if (bfd_get_arch (obfd
) == bfd_get_arch (ibfd
)
15951 && bfd_get_arch_info (obfd
)->the_default
)
15952 return bfd_set_arch_mach (obfd
, bfd_get_arch (ibfd
), bfd_get_mach (ibfd
));
15957 /* Determine what should happen if the input ARM architecture
15958 does not match the output ARM architecture. */
15959 if (! bfd_arm_merge_machines (ibfd
, obfd
))
15962 /* Identical flags must be compatible. */
15963 if (in_flags
== out_flags
)
15966 /* Check to see if the input BFD actually contains any sections. If
15967 not, its flags may not have been initialised either, but it
15968 cannot actually cause any incompatiblity. Do not short-circuit
15969 dynamic objects; their section list may be emptied by
15970 elf_link_add_object_symbols.
15972 Also check to see if there are no code sections in the input.
15973 In this case there is no need to check for code specific flags.
15974 XXX - do we need to worry about floating-point format compatability
15975 in data sections ? */
15976 if (!(ibfd
->flags
& DYNAMIC
))
15978 bfd_boolean null_input_bfd
= TRUE
;
15979 bfd_boolean only_data_sections
= TRUE
;
15981 for (sec
= ibfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
15983 /* Ignore synthetic glue sections. */
15984 if (strcmp (sec
->name
, ".glue_7")
15985 && strcmp (sec
->name
, ".glue_7t"))
15987 if ((bfd_get_section_flags (ibfd
, sec
)
15988 & (SEC_LOAD
| SEC_CODE
| SEC_HAS_CONTENTS
))
15989 == (SEC_LOAD
| SEC_CODE
| SEC_HAS_CONTENTS
))
15990 only_data_sections
= FALSE
;
15992 null_input_bfd
= FALSE
;
15997 if (null_input_bfd
|| only_data_sections
)
16001 /* Complain about various flag mismatches. */
16002 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags
),
16003 EF_ARM_EABI_VERSION (out_flags
)))
16006 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
16008 (in_flags
& EF_ARM_EABIMASK
) >> 24,
16009 (out_flags
& EF_ARM_EABIMASK
) >> 24);
16013 /* Not sure what needs to be checked for EABI versions >= 1. */
16014 /* VxWorks libraries do not use these flags. */
16015 if (get_elf_backend_data (obfd
) != &elf32_arm_vxworks_bed
16016 && get_elf_backend_data (ibfd
) != &elf32_arm_vxworks_bed
16017 && EF_ARM_EABI_VERSION (in_flags
) == EF_ARM_EABI_UNKNOWN
)
16019 if ((in_flags
& EF_ARM_APCS_26
) != (out_flags
& EF_ARM_APCS_26
))
16022 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
16024 in_flags
& EF_ARM_APCS_26
? 26 : 32,
16025 out_flags
& EF_ARM_APCS_26
? 26 : 32);
16026 flags_compatible
= FALSE
;
16029 if ((in_flags
& EF_ARM_APCS_FLOAT
) != (out_flags
& EF_ARM_APCS_FLOAT
))
16031 if (in_flags
& EF_ARM_APCS_FLOAT
)
16033 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
16037 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
16040 flags_compatible
= FALSE
;
16043 if ((in_flags
& EF_ARM_VFP_FLOAT
) != (out_flags
& EF_ARM_VFP_FLOAT
))
16045 if (in_flags
& EF_ARM_VFP_FLOAT
)
16047 (_("error: %B uses VFP instructions, whereas %B does not"),
16051 (_("error: %B uses FPA instructions, whereas %B does not"),
16054 flags_compatible
= FALSE
;
16057 if ((in_flags
& EF_ARM_MAVERICK_FLOAT
) != (out_flags
& EF_ARM_MAVERICK_FLOAT
))
16059 if (in_flags
& EF_ARM_MAVERICK_FLOAT
)
16061 (_("error: %B uses Maverick instructions, whereas %B does not"),
16065 (_("error: %B does not use Maverick instructions, whereas %B does"),
16068 flags_compatible
= FALSE
;
16071 #ifdef EF_ARM_SOFT_FLOAT
16072 if ((in_flags
& EF_ARM_SOFT_FLOAT
) != (out_flags
& EF_ARM_SOFT_FLOAT
))
16074 /* We can allow interworking between code that is VFP format
16075 layout, and uses either soft float or integer regs for
16076 passing floating point arguments and results. We already
16077 know that the APCS_FLOAT flags match; similarly for VFP
16079 if ((in_flags
& EF_ARM_APCS_FLOAT
) != 0
16080 || (in_flags
& EF_ARM_VFP_FLOAT
) == 0)
16082 if (in_flags
& EF_ARM_SOFT_FLOAT
)
16084 (_("error: %B uses software FP, whereas %B uses hardware FP"),
16088 (_("error: %B uses hardware FP, whereas %B uses software FP"),
16091 flags_compatible
= FALSE
;
16096 /* Interworking mismatch is only a warning. */
16097 if ((in_flags
& EF_ARM_INTERWORK
) != (out_flags
& EF_ARM_INTERWORK
))
16099 if (in_flags
& EF_ARM_INTERWORK
)
16102 (_("Warning: %B supports interworking, whereas %B does not"),
16108 (_("Warning: %B does not support interworking, whereas %B does"),
16114 return flags_compatible
;
16118 /* Symbian OS Targets. */
16120 #undef TARGET_LITTLE_SYM
16121 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
16122 #undef TARGET_LITTLE_NAME
16123 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
16124 #undef TARGET_BIG_SYM
16125 #define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
16126 #undef TARGET_BIG_NAME
16127 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
16129 /* Like elf32_arm_link_hash_table_create -- but overrides
16130 appropriately for Symbian OS. */
16132 static struct bfd_link_hash_table
*
16133 elf32_arm_symbian_link_hash_table_create (bfd
*abfd
)
16135 struct bfd_link_hash_table
*ret
;
16137 ret
= elf32_arm_link_hash_table_create (abfd
);
16140 struct elf32_arm_link_hash_table
*htab
16141 = (struct elf32_arm_link_hash_table
*)ret
;
16142 /* There is no PLT header for Symbian OS. */
16143 htab
->plt_header_size
= 0;
16144 /* The PLT entries are each one instruction and one word. */
16145 htab
->plt_entry_size
= 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry
);
16146 htab
->symbian_p
= 1;
16147 /* Symbian uses armv5t or above, so use_blx is always true. */
16149 htab
->root
.is_relocatable_executable
= 1;
16154 static const struct bfd_elf_special_section
16155 elf32_arm_symbian_special_sections
[] =
16157 /* In a BPABI executable, the dynamic linking sections do not go in
16158 the loadable read-only segment. The post-linker may wish to
16159 refer to these sections, but they are not part of the final
16161 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC
, 0 },
16162 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB
, 0 },
16163 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM
, 0 },
16164 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS
, 0 },
16165 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH
, 0 },
16166 /* These sections do not need to be writable as the SymbianOS
16167 postlinker will arrange things so that no dynamic relocation is
16169 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY
, SHF_ALLOC
},
16170 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY
, SHF_ALLOC
},
16171 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY
, SHF_ALLOC
},
16172 { NULL
, 0, 0, 0, 0 }
16176 elf32_arm_symbian_begin_write_processing (bfd
*abfd
,
16177 struct bfd_link_info
*link_info
)
16179 /* BPABI objects are never loaded directly by an OS kernel; they are
16180 processed by a postlinker first, into an OS-specific format. If
16181 the D_PAGED bit is set on the file, BFD will align segments on
16182 page boundaries, so that an OS can directly map the file. With
16183 BPABI objects, that just results in wasted space. In addition,
16184 because we clear the D_PAGED bit, map_sections_to_segments will
16185 recognize that the program headers should not be mapped into any
16186 loadable segment. */
16187 abfd
->flags
&= ~D_PAGED
;
16188 elf32_arm_begin_write_processing (abfd
, link_info
);
16192 elf32_arm_symbian_modify_segment_map (bfd
*abfd
,
16193 struct bfd_link_info
*info
)
16195 struct elf_segment_map
*m
;
16198 /* BPABI shared libraries and executables should have a PT_DYNAMIC
16199 segment. However, because the .dynamic section is not marked
16200 with SEC_LOAD, the generic ELF code will not create such a
16202 dynsec
= bfd_get_section_by_name (abfd
, ".dynamic");
16205 for (m
= elf_seg_map (abfd
); m
!= NULL
; m
= m
->next
)
16206 if (m
->p_type
== PT_DYNAMIC
)
16211 m
= _bfd_elf_make_dynamic_segment (abfd
, dynsec
);
16212 m
->next
= elf_seg_map (abfd
);
16213 elf_seg_map (abfd
) = m
;
16217 /* Also call the generic arm routine. */
16218 return elf32_arm_modify_segment_map (abfd
, info
);
16221 /* Return address for Ith PLT stub in section PLT, for relocation REL
16222 or (bfd_vma) -1 if it should not be included. */
16225 elf32_arm_symbian_plt_sym_val (bfd_vma i
, const asection
*plt
,
16226 const arelent
*rel ATTRIBUTE_UNUSED
)
16228 return plt
->vma
+ 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry
) * i
;
16233 #define elf32_bed elf32_arm_symbian_bed
16235 /* The dynamic sections are not allocated on SymbianOS; the postlinker
16236 will process them and then discard them. */
16237 #undef ELF_DYNAMIC_SEC_FLAGS
16238 #define ELF_DYNAMIC_SEC_FLAGS \
16239 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
16241 #undef elf_backend_emit_relocs
16243 #undef bfd_elf32_bfd_link_hash_table_create
16244 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
16245 #undef elf_backend_special_sections
16246 #define elf_backend_special_sections elf32_arm_symbian_special_sections
16247 #undef elf_backend_begin_write_processing
16248 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
16249 #undef elf_backend_final_write_processing
16250 #define elf_backend_final_write_processing elf32_arm_final_write_processing
16252 #undef elf_backend_modify_segment_map
16253 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
16255 /* There is no .got section for BPABI objects, and hence no header. */
16256 #undef elf_backend_got_header_size
16257 #define elf_backend_got_header_size 0
16259 /* Similarly, there is no .got.plt section. */
16260 #undef elf_backend_want_got_plt
16261 #define elf_backend_want_got_plt 0
16263 #undef elf_backend_plt_sym_val
16264 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
16266 #undef elf_backend_may_use_rel_p
16267 #define elf_backend_may_use_rel_p 1
16268 #undef elf_backend_may_use_rela_p
16269 #define elf_backend_may_use_rela_p 0
16270 #undef elf_backend_default_use_rela_p
16271 #define elf_backend_default_use_rela_p 0
16272 #undef elf_backend_want_plt_sym
16273 #define elf_backend_want_plt_sym 0
16274 #undef ELF_MAXPAGESIZE
16275 #define ELF_MAXPAGESIZE 0x8000
16277 #include "elf32-target.h"