1 /* 32-bit ELF support for ARM
2 Copyright (C) 1998-2020 Free Software Foundation, Inc.
4 This file is part of BFD, the Binary File Descriptor library.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
25 #include "libiberty.h"
29 #include "elf-vxworks.h"
31 #include "elf32-arm.h"
34 /* Return the relocation section associated with NAME. HTAB is the
35 bfd's elf32_arm_link_hash_entry. */
36 #define RELOC_SECTION(HTAB, NAME) \
37 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
39 /* Return size of a relocation entry. HTAB is the bfd's
40 elf32_arm_link_hash_entry. */
41 #define RELOC_SIZE(HTAB) \
43 ? sizeof (Elf32_External_Rel) \
44 : sizeof (Elf32_External_Rela))
46 /* Return function to swap relocations in. HTAB is the bfd's
47 elf32_arm_link_hash_entry. */
48 #define SWAP_RELOC_IN(HTAB) \
50 ? bfd_elf32_swap_reloc_in \
51 : bfd_elf32_swap_reloca_in)
53 /* Return function to swap relocations out. HTAB is the bfd's
54 elf32_arm_link_hash_entry. */
55 #define SWAP_RELOC_OUT(HTAB) \
57 ? bfd_elf32_swap_reloc_out \
58 : bfd_elf32_swap_reloca_out)
60 #define elf_info_to_howto NULL
61 #define elf_info_to_howto_rel elf32_arm_info_to_howto
63 #define ARM_ELF_ABI_VERSION 0
64 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
66 /* The Adjusted Place, as defined by AAELF. */
67 #define Pa(X) ((X) & 0xfffffffc)
69 static bfd_boolean
elf32_arm_write_section (bfd
*output_bfd
,
70 struct bfd_link_info
*link_info
,
74 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
75 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
78 static reloc_howto_type elf32_arm_howto_table_1
[] =
81 HOWTO (R_ARM_NONE
, /* type */
83 3, /* size (0 = byte, 1 = short, 2 = long) */
85 FALSE
, /* pc_relative */
87 complain_overflow_dont
,/* complain_on_overflow */
88 bfd_elf_generic_reloc
, /* special_function */
89 "R_ARM_NONE", /* name */
90 FALSE
, /* partial_inplace */
93 FALSE
), /* pcrel_offset */
95 HOWTO (R_ARM_PC24
, /* type */
97 2, /* size (0 = byte, 1 = short, 2 = long) */
99 TRUE
, /* pc_relative */
101 complain_overflow_signed
,/* complain_on_overflow */
102 bfd_elf_generic_reloc
, /* special_function */
103 "R_ARM_PC24", /* name */
104 FALSE
, /* partial_inplace */
105 0x00ffffff, /* src_mask */
106 0x00ffffff, /* dst_mask */
107 TRUE
), /* pcrel_offset */
109 /* 32 bit absolute */
110 HOWTO (R_ARM_ABS32
, /* type */
112 2, /* size (0 = byte, 1 = short, 2 = long) */
114 FALSE
, /* pc_relative */
116 complain_overflow_bitfield
,/* complain_on_overflow */
117 bfd_elf_generic_reloc
, /* special_function */
118 "R_ARM_ABS32", /* name */
119 FALSE
, /* partial_inplace */
120 0xffffffff, /* src_mask */
121 0xffffffff, /* dst_mask */
122 FALSE
), /* pcrel_offset */
124 /* standard 32bit pc-relative reloc */
125 HOWTO (R_ARM_REL32
, /* type */
127 2, /* size (0 = byte, 1 = short, 2 = long) */
129 TRUE
, /* pc_relative */
131 complain_overflow_bitfield
,/* complain_on_overflow */
132 bfd_elf_generic_reloc
, /* special_function */
133 "R_ARM_REL32", /* name */
134 FALSE
, /* partial_inplace */
135 0xffffffff, /* src_mask */
136 0xffffffff, /* dst_mask */
137 TRUE
), /* pcrel_offset */
139 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
140 HOWTO (R_ARM_LDR_PC_G0
, /* type */
142 0, /* size (0 = byte, 1 = short, 2 = long) */
144 TRUE
, /* pc_relative */
146 complain_overflow_dont
,/* complain_on_overflow */
147 bfd_elf_generic_reloc
, /* special_function */
148 "R_ARM_LDR_PC_G0", /* name */
149 FALSE
, /* partial_inplace */
150 0xffffffff, /* src_mask */
151 0xffffffff, /* dst_mask */
152 TRUE
), /* pcrel_offset */
154 /* 16 bit absolute */
155 HOWTO (R_ARM_ABS16
, /* type */
157 1, /* size (0 = byte, 1 = short, 2 = long) */
159 FALSE
, /* pc_relative */
161 complain_overflow_bitfield
,/* complain_on_overflow */
162 bfd_elf_generic_reloc
, /* special_function */
163 "R_ARM_ABS16", /* name */
164 FALSE
, /* partial_inplace */
165 0x0000ffff, /* src_mask */
166 0x0000ffff, /* dst_mask */
167 FALSE
), /* pcrel_offset */
169 /* 12 bit absolute */
170 HOWTO (R_ARM_ABS12
, /* type */
172 2, /* size (0 = byte, 1 = short, 2 = long) */
174 FALSE
, /* pc_relative */
176 complain_overflow_bitfield
,/* complain_on_overflow */
177 bfd_elf_generic_reloc
, /* special_function */
178 "R_ARM_ABS12", /* name */
179 FALSE
, /* partial_inplace */
180 0x00000fff, /* src_mask */
181 0x00000fff, /* dst_mask */
182 FALSE
), /* pcrel_offset */
184 HOWTO (R_ARM_THM_ABS5
, /* type */
186 1, /* size (0 = byte, 1 = short, 2 = long) */
188 FALSE
, /* pc_relative */
190 complain_overflow_bitfield
,/* complain_on_overflow */
191 bfd_elf_generic_reloc
, /* special_function */
192 "R_ARM_THM_ABS5", /* name */
193 FALSE
, /* partial_inplace */
194 0x000007e0, /* src_mask */
195 0x000007e0, /* dst_mask */
196 FALSE
), /* pcrel_offset */
199 HOWTO (R_ARM_ABS8
, /* type */
201 0, /* size (0 = byte, 1 = short, 2 = long) */
203 FALSE
, /* pc_relative */
205 complain_overflow_bitfield
,/* complain_on_overflow */
206 bfd_elf_generic_reloc
, /* special_function */
207 "R_ARM_ABS8", /* name */
208 FALSE
, /* partial_inplace */
209 0x000000ff, /* src_mask */
210 0x000000ff, /* dst_mask */
211 FALSE
), /* pcrel_offset */
213 HOWTO (R_ARM_SBREL32
, /* type */
215 2, /* size (0 = byte, 1 = short, 2 = long) */
217 FALSE
, /* pc_relative */
219 complain_overflow_dont
,/* complain_on_overflow */
220 bfd_elf_generic_reloc
, /* special_function */
221 "R_ARM_SBREL32", /* name */
222 FALSE
, /* partial_inplace */
223 0xffffffff, /* src_mask */
224 0xffffffff, /* dst_mask */
225 FALSE
), /* pcrel_offset */
227 HOWTO (R_ARM_THM_CALL
, /* type */
229 2, /* size (0 = byte, 1 = short, 2 = long) */
231 TRUE
, /* pc_relative */
233 complain_overflow_signed
,/* complain_on_overflow */
234 bfd_elf_generic_reloc
, /* special_function */
235 "R_ARM_THM_CALL", /* name */
236 FALSE
, /* partial_inplace */
237 0x07ff2fff, /* src_mask */
238 0x07ff2fff, /* dst_mask */
239 TRUE
), /* pcrel_offset */
241 HOWTO (R_ARM_THM_PC8
, /* type */
243 1, /* size (0 = byte, 1 = short, 2 = long) */
245 TRUE
, /* pc_relative */
247 complain_overflow_signed
,/* complain_on_overflow */
248 bfd_elf_generic_reloc
, /* special_function */
249 "R_ARM_THM_PC8", /* name */
250 FALSE
, /* partial_inplace */
251 0x000000ff, /* src_mask */
252 0x000000ff, /* dst_mask */
253 TRUE
), /* pcrel_offset */
255 HOWTO (R_ARM_BREL_ADJ
, /* type */
257 1, /* size (0 = byte, 1 = short, 2 = long) */
259 FALSE
, /* pc_relative */
261 complain_overflow_signed
,/* complain_on_overflow */
262 bfd_elf_generic_reloc
, /* special_function */
263 "R_ARM_BREL_ADJ", /* name */
264 FALSE
, /* partial_inplace */
265 0xffffffff, /* src_mask */
266 0xffffffff, /* dst_mask */
267 FALSE
), /* pcrel_offset */
269 HOWTO (R_ARM_TLS_DESC
, /* type */
271 2, /* size (0 = byte, 1 = short, 2 = long) */
273 FALSE
, /* pc_relative */
275 complain_overflow_bitfield
,/* complain_on_overflow */
276 bfd_elf_generic_reloc
, /* special_function */
277 "R_ARM_TLS_DESC", /* name */
278 FALSE
, /* partial_inplace */
279 0xffffffff, /* src_mask */
280 0xffffffff, /* dst_mask */
281 FALSE
), /* pcrel_offset */
283 HOWTO (R_ARM_THM_SWI8
, /* type */
285 0, /* size (0 = byte, 1 = short, 2 = long) */
287 FALSE
, /* pc_relative */
289 complain_overflow_signed
,/* complain_on_overflow */
290 bfd_elf_generic_reloc
, /* special_function */
291 "R_ARM_SWI8", /* name */
292 FALSE
, /* partial_inplace */
293 0x00000000, /* src_mask */
294 0x00000000, /* dst_mask */
295 FALSE
), /* pcrel_offset */
297 /* BLX instruction for the ARM. */
298 HOWTO (R_ARM_XPC25
, /* type */
300 2, /* size (0 = byte, 1 = short, 2 = long) */
302 TRUE
, /* pc_relative */
304 complain_overflow_signed
,/* complain_on_overflow */
305 bfd_elf_generic_reloc
, /* special_function */
306 "R_ARM_XPC25", /* name */
307 FALSE
, /* partial_inplace */
308 0x00ffffff, /* src_mask */
309 0x00ffffff, /* dst_mask */
310 TRUE
), /* pcrel_offset */
312 /* BLX instruction for the Thumb. */
313 HOWTO (R_ARM_THM_XPC22
, /* type */
315 2, /* size (0 = byte, 1 = short, 2 = long) */
317 TRUE
, /* pc_relative */
319 complain_overflow_signed
,/* complain_on_overflow */
320 bfd_elf_generic_reloc
, /* special_function */
321 "R_ARM_THM_XPC22", /* name */
322 FALSE
, /* partial_inplace */
323 0x07ff2fff, /* src_mask */
324 0x07ff2fff, /* dst_mask */
325 TRUE
), /* pcrel_offset */
327 /* Dynamic TLS relocations. */
329 HOWTO (R_ARM_TLS_DTPMOD32
, /* type */
331 2, /* size (0 = byte, 1 = short, 2 = long) */
333 FALSE
, /* pc_relative */
335 complain_overflow_bitfield
,/* complain_on_overflow */
336 bfd_elf_generic_reloc
, /* special_function */
337 "R_ARM_TLS_DTPMOD32", /* name */
338 TRUE
, /* partial_inplace */
339 0xffffffff, /* src_mask */
340 0xffffffff, /* dst_mask */
341 FALSE
), /* pcrel_offset */
343 HOWTO (R_ARM_TLS_DTPOFF32
, /* type */
345 2, /* size (0 = byte, 1 = short, 2 = long) */
347 FALSE
, /* pc_relative */
349 complain_overflow_bitfield
,/* complain_on_overflow */
350 bfd_elf_generic_reloc
, /* special_function */
351 "R_ARM_TLS_DTPOFF32", /* name */
352 TRUE
, /* partial_inplace */
353 0xffffffff, /* src_mask */
354 0xffffffff, /* dst_mask */
355 FALSE
), /* pcrel_offset */
357 HOWTO (R_ARM_TLS_TPOFF32
, /* type */
359 2, /* size (0 = byte, 1 = short, 2 = long) */
361 FALSE
, /* pc_relative */
363 complain_overflow_bitfield
,/* complain_on_overflow */
364 bfd_elf_generic_reloc
, /* special_function */
365 "R_ARM_TLS_TPOFF32", /* name */
366 TRUE
, /* partial_inplace */
367 0xffffffff, /* src_mask */
368 0xffffffff, /* dst_mask */
369 FALSE
), /* pcrel_offset */
371 /* Relocs used in ARM Linux */
373 HOWTO (R_ARM_COPY
, /* type */
375 2, /* size (0 = byte, 1 = short, 2 = long) */
377 FALSE
, /* pc_relative */
379 complain_overflow_bitfield
,/* complain_on_overflow */
380 bfd_elf_generic_reloc
, /* special_function */
381 "R_ARM_COPY", /* name */
382 TRUE
, /* partial_inplace */
383 0xffffffff, /* src_mask */
384 0xffffffff, /* dst_mask */
385 FALSE
), /* pcrel_offset */
387 HOWTO (R_ARM_GLOB_DAT
, /* type */
389 2, /* size (0 = byte, 1 = short, 2 = long) */
391 FALSE
, /* pc_relative */
393 complain_overflow_bitfield
,/* complain_on_overflow */
394 bfd_elf_generic_reloc
, /* special_function */
395 "R_ARM_GLOB_DAT", /* name */
396 TRUE
, /* partial_inplace */
397 0xffffffff, /* src_mask */
398 0xffffffff, /* dst_mask */
399 FALSE
), /* pcrel_offset */
401 HOWTO (R_ARM_JUMP_SLOT
, /* type */
403 2, /* size (0 = byte, 1 = short, 2 = long) */
405 FALSE
, /* pc_relative */
407 complain_overflow_bitfield
,/* complain_on_overflow */
408 bfd_elf_generic_reloc
, /* special_function */
409 "R_ARM_JUMP_SLOT", /* name */
410 TRUE
, /* partial_inplace */
411 0xffffffff, /* src_mask */
412 0xffffffff, /* dst_mask */
413 FALSE
), /* pcrel_offset */
415 HOWTO (R_ARM_RELATIVE
, /* type */
417 2, /* size (0 = byte, 1 = short, 2 = long) */
419 FALSE
, /* pc_relative */
421 complain_overflow_bitfield
,/* complain_on_overflow */
422 bfd_elf_generic_reloc
, /* special_function */
423 "R_ARM_RELATIVE", /* name */
424 TRUE
, /* partial_inplace */
425 0xffffffff, /* src_mask */
426 0xffffffff, /* dst_mask */
427 FALSE
), /* pcrel_offset */
429 HOWTO (R_ARM_GOTOFF32
, /* type */
431 2, /* size (0 = byte, 1 = short, 2 = long) */
433 FALSE
, /* pc_relative */
435 complain_overflow_bitfield
,/* complain_on_overflow */
436 bfd_elf_generic_reloc
, /* special_function */
437 "R_ARM_GOTOFF32", /* name */
438 TRUE
, /* partial_inplace */
439 0xffffffff, /* src_mask */
440 0xffffffff, /* dst_mask */
441 FALSE
), /* pcrel_offset */
443 HOWTO (R_ARM_GOTPC
, /* type */
445 2, /* size (0 = byte, 1 = short, 2 = long) */
447 TRUE
, /* pc_relative */
449 complain_overflow_bitfield
,/* complain_on_overflow */
450 bfd_elf_generic_reloc
, /* special_function */
451 "R_ARM_GOTPC", /* name */
452 TRUE
, /* partial_inplace */
453 0xffffffff, /* src_mask */
454 0xffffffff, /* dst_mask */
455 TRUE
), /* pcrel_offset */
457 HOWTO (R_ARM_GOT32
, /* type */
459 2, /* size (0 = byte, 1 = short, 2 = long) */
461 FALSE
, /* pc_relative */
463 complain_overflow_bitfield
,/* complain_on_overflow */
464 bfd_elf_generic_reloc
, /* special_function */
465 "R_ARM_GOT32", /* name */
466 TRUE
, /* partial_inplace */
467 0xffffffff, /* src_mask */
468 0xffffffff, /* dst_mask */
469 FALSE
), /* pcrel_offset */
471 HOWTO (R_ARM_PLT32
, /* type */
473 2, /* size (0 = byte, 1 = short, 2 = long) */
475 TRUE
, /* pc_relative */
477 complain_overflow_bitfield
,/* complain_on_overflow */
478 bfd_elf_generic_reloc
, /* special_function */
479 "R_ARM_PLT32", /* name */
480 FALSE
, /* partial_inplace */
481 0x00ffffff, /* src_mask */
482 0x00ffffff, /* dst_mask */
483 TRUE
), /* pcrel_offset */
485 HOWTO (R_ARM_CALL
, /* type */
487 2, /* size (0 = byte, 1 = short, 2 = long) */
489 TRUE
, /* pc_relative */
491 complain_overflow_signed
,/* complain_on_overflow */
492 bfd_elf_generic_reloc
, /* special_function */
493 "R_ARM_CALL", /* name */
494 FALSE
, /* partial_inplace */
495 0x00ffffff, /* src_mask */
496 0x00ffffff, /* dst_mask */
497 TRUE
), /* pcrel_offset */
499 HOWTO (R_ARM_JUMP24
, /* type */
501 2, /* size (0 = byte, 1 = short, 2 = long) */
503 TRUE
, /* pc_relative */
505 complain_overflow_signed
,/* complain_on_overflow */
506 bfd_elf_generic_reloc
, /* special_function */
507 "R_ARM_JUMP24", /* name */
508 FALSE
, /* partial_inplace */
509 0x00ffffff, /* src_mask */
510 0x00ffffff, /* dst_mask */
511 TRUE
), /* pcrel_offset */
513 HOWTO (R_ARM_THM_JUMP24
, /* type */
515 2, /* size (0 = byte, 1 = short, 2 = long) */
517 TRUE
, /* pc_relative */
519 complain_overflow_signed
,/* complain_on_overflow */
520 bfd_elf_generic_reloc
, /* special_function */
521 "R_ARM_THM_JUMP24", /* name */
522 FALSE
, /* partial_inplace */
523 0x07ff2fff, /* src_mask */
524 0x07ff2fff, /* dst_mask */
525 TRUE
), /* pcrel_offset */
527 HOWTO (R_ARM_BASE_ABS
, /* type */
529 2, /* size (0 = byte, 1 = short, 2 = long) */
531 FALSE
, /* pc_relative */
533 complain_overflow_dont
,/* complain_on_overflow */
534 bfd_elf_generic_reloc
, /* special_function */
535 "R_ARM_BASE_ABS", /* name */
536 FALSE
, /* partial_inplace */
537 0xffffffff, /* src_mask */
538 0xffffffff, /* dst_mask */
539 FALSE
), /* pcrel_offset */
541 HOWTO (R_ARM_ALU_PCREL7_0
, /* type */
543 2, /* size (0 = byte, 1 = short, 2 = long) */
545 TRUE
, /* pc_relative */
547 complain_overflow_dont
,/* complain_on_overflow */
548 bfd_elf_generic_reloc
, /* special_function */
549 "R_ARM_ALU_PCREL_7_0", /* name */
550 FALSE
, /* partial_inplace */
551 0x00000fff, /* src_mask */
552 0x00000fff, /* dst_mask */
553 TRUE
), /* pcrel_offset */
555 HOWTO (R_ARM_ALU_PCREL15_8
, /* type */
557 2, /* size (0 = byte, 1 = short, 2 = long) */
559 TRUE
, /* pc_relative */
561 complain_overflow_dont
,/* complain_on_overflow */
562 bfd_elf_generic_reloc
, /* special_function */
563 "R_ARM_ALU_PCREL_15_8",/* name */
564 FALSE
, /* partial_inplace */
565 0x00000fff, /* src_mask */
566 0x00000fff, /* dst_mask */
567 TRUE
), /* pcrel_offset */
569 HOWTO (R_ARM_ALU_PCREL23_15
, /* type */
571 2, /* size (0 = byte, 1 = short, 2 = long) */
573 TRUE
, /* pc_relative */
575 complain_overflow_dont
,/* complain_on_overflow */
576 bfd_elf_generic_reloc
, /* special_function */
577 "R_ARM_ALU_PCREL_23_15",/* name */
578 FALSE
, /* partial_inplace */
579 0x00000fff, /* src_mask */
580 0x00000fff, /* dst_mask */
581 TRUE
), /* pcrel_offset */
583 HOWTO (R_ARM_LDR_SBREL_11_0
, /* type */
585 2, /* size (0 = byte, 1 = short, 2 = long) */
587 FALSE
, /* pc_relative */
589 complain_overflow_dont
,/* complain_on_overflow */
590 bfd_elf_generic_reloc
, /* special_function */
591 "R_ARM_LDR_SBREL_11_0",/* name */
592 FALSE
, /* partial_inplace */
593 0x00000fff, /* src_mask */
594 0x00000fff, /* dst_mask */
595 FALSE
), /* pcrel_offset */
597 HOWTO (R_ARM_ALU_SBREL_19_12
, /* type */
599 2, /* size (0 = byte, 1 = short, 2 = long) */
601 FALSE
, /* pc_relative */
603 complain_overflow_dont
,/* complain_on_overflow */
604 bfd_elf_generic_reloc
, /* special_function */
605 "R_ARM_ALU_SBREL_19_12",/* name */
606 FALSE
, /* partial_inplace */
607 0x000ff000, /* src_mask */
608 0x000ff000, /* dst_mask */
609 FALSE
), /* pcrel_offset */
611 HOWTO (R_ARM_ALU_SBREL_27_20
, /* type */
613 2, /* size (0 = byte, 1 = short, 2 = long) */
615 FALSE
, /* pc_relative */
617 complain_overflow_dont
,/* complain_on_overflow */
618 bfd_elf_generic_reloc
, /* special_function */
619 "R_ARM_ALU_SBREL_27_20",/* name */
620 FALSE
, /* partial_inplace */
621 0x0ff00000, /* src_mask */
622 0x0ff00000, /* dst_mask */
623 FALSE
), /* pcrel_offset */
625 HOWTO (R_ARM_TARGET1
, /* type */
627 2, /* size (0 = byte, 1 = short, 2 = long) */
629 FALSE
, /* pc_relative */
631 complain_overflow_dont
,/* complain_on_overflow */
632 bfd_elf_generic_reloc
, /* special_function */
633 "R_ARM_TARGET1", /* name */
634 FALSE
, /* partial_inplace */
635 0xffffffff, /* src_mask */
636 0xffffffff, /* dst_mask */
637 FALSE
), /* pcrel_offset */
639 HOWTO (R_ARM_ROSEGREL32
, /* type */
641 2, /* size (0 = byte, 1 = short, 2 = long) */
643 FALSE
, /* pc_relative */
645 complain_overflow_dont
,/* complain_on_overflow */
646 bfd_elf_generic_reloc
, /* special_function */
647 "R_ARM_ROSEGREL32", /* name */
648 FALSE
, /* partial_inplace */
649 0xffffffff, /* src_mask */
650 0xffffffff, /* dst_mask */
651 FALSE
), /* pcrel_offset */
653 HOWTO (R_ARM_V4BX
, /* type */
655 2, /* size (0 = byte, 1 = short, 2 = long) */
657 FALSE
, /* pc_relative */
659 complain_overflow_dont
,/* complain_on_overflow */
660 bfd_elf_generic_reloc
, /* special_function */
661 "R_ARM_V4BX", /* name */
662 FALSE
, /* partial_inplace */
663 0xffffffff, /* src_mask */
664 0xffffffff, /* dst_mask */
665 FALSE
), /* pcrel_offset */
667 HOWTO (R_ARM_TARGET2
, /* type */
669 2, /* size (0 = byte, 1 = short, 2 = long) */
671 FALSE
, /* pc_relative */
673 complain_overflow_signed
,/* complain_on_overflow */
674 bfd_elf_generic_reloc
, /* special_function */
675 "R_ARM_TARGET2", /* name */
676 FALSE
, /* partial_inplace */
677 0xffffffff, /* src_mask */
678 0xffffffff, /* dst_mask */
679 TRUE
), /* pcrel_offset */
681 HOWTO (R_ARM_PREL31
, /* type */
683 2, /* size (0 = byte, 1 = short, 2 = long) */
685 TRUE
, /* pc_relative */
687 complain_overflow_signed
,/* complain_on_overflow */
688 bfd_elf_generic_reloc
, /* special_function */
689 "R_ARM_PREL31", /* name */
690 FALSE
, /* partial_inplace */
691 0x7fffffff, /* src_mask */
692 0x7fffffff, /* dst_mask */
693 TRUE
), /* pcrel_offset */
695 HOWTO (R_ARM_MOVW_ABS_NC
, /* type */
697 2, /* size (0 = byte, 1 = short, 2 = long) */
699 FALSE
, /* pc_relative */
701 complain_overflow_dont
,/* complain_on_overflow */
702 bfd_elf_generic_reloc
, /* special_function */
703 "R_ARM_MOVW_ABS_NC", /* name */
704 FALSE
, /* partial_inplace */
705 0x000f0fff, /* src_mask */
706 0x000f0fff, /* dst_mask */
707 FALSE
), /* pcrel_offset */
709 HOWTO (R_ARM_MOVT_ABS
, /* type */
711 2, /* size (0 = byte, 1 = short, 2 = long) */
713 FALSE
, /* pc_relative */
715 complain_overflow_bitfield
,/* complain_on_overflow */
716 bfd_elf_generic_reloc
, /* special_function */
717 "R_ARM_MOVT_ABS", /* name */
718 FALSE
, /* partial_inplace */
719 0x000f0fff, /* src_mask */
720 0x000f0fff, /* dst_mask */
721 FALSE
), /* pcrel_offset */
723 HOWTO (R_ARM_MOVW_PREL_NC
, /* type */
725 2, /* size (0 = byte, 1 = short, 2 = long) */
727 TRUE
, /* pc_relative */
729 complain_overflow_dont
,/* complain_on_overflow */
730 bfd_elf_generic_reloc
, /* special_function */
731 "R_ARM_MOVW_PREL_NC", /* name */
732 FALSE
, /* partial_inplace */
733 0x000f0fff, /* src_mask */
734 0x000f0fff, /* dst_mask */
735 TRUE
), /* pcrel_offset */
737 HOWTO (R_ARM_MOVT_PREL
, /* type */
739 2, /* size (0 = byte, 1 = short, 2 = long) */
741 TRUE
, /* pc_relative */
743 complain_overflow_bitfield
,/* complain_on_overflow */
744 bfd_elf_generic_reloc
, /* special_function */
745 "R_ARM_MOVT_PREL", /* name */
746 FALSE
, /* partial_inplace */
747 0x000f0fff, /* src_mask */
748 0x000f0fff, /* dst_mask */
749 TRUE
), /* pcrel_offset */
751 HOWTO (R_ARM_THM_MOVW_ABS_NC
, /* type */
753 2, /* size (0 = byte, 1 = short, 2 = long) */
755 FALSE
, /* pc_relative */
757 complain_overflow_dont
,/* complain_on_overflow */
758 bfd_elf_generic_reloc
, /* special_function */
759 "R_ARM_THM_MOVW_ABS_NC",/* name */
760 FALSE
, /* partial_inplace */
761 0x040f70ff, /* src_mask */
762 0x040f70ff, /* dst_mask */
763 FALSE
), /* pcrel_offset */
765 HOWTO (R_ARM_THM_MOVT_ABS
, /* type */
767 2, /* size (0 = byte, 1 = short, 2 = long) */
769 FALSE
, /* pc_relative */
771 complain_overflow_bitfield
,/* complain_on_overflow */
772 bfd_elf_generic_reloc
, /* special_function */
773 "R_ARM_THM_MOVT_ABS", /* name */
774 FALSE
, /* partial_inplace */
775 0x040f70ff, /* src_mask */
776 0x040f70ff, /* dst_mask */
777 FALSE
), /* pcrel_offset */
779 HOWTO (R_ARM_THM_MOVW_PREL_NC
,/* type */
781 2, /* size (0 = byte, 1 = short, 2 = long) */
783 TRUE
, /* pc_relative */
785 complain_overflow_dont
,/* complain_on_overflow */
786 bfd_elf_generic_reloc
, /* special_function */
787 "R_ARM_THM_MOVW_PREL_NC",/* name */
788 FALSE
, /* partial_inplace */
789 0x040f70ff, /* src_mask */
790 0x040f70ff, /* dst_mask */
791 TRUE
), /* pcrel_offset */
793 HOWTO (R_ARM_THM_MOVT_PREL
, /* type */
795 2, /* size (0 = byte, 1 = short, 2 = long) */
797 TRUE
, /* pc_relative */
799 complain_overflow_bitfield
,/* complain_on_overflow */
800 bfd_elf_generic_reloc
, /* special_function */
801 "R_ARM_THM_MOVT_PREL", /* name */
802 FALSE
, /* partial_inplace */
803 0x040f70ff, /* src_mask */
804 0x040f70ff, /* dst_mask */
805 TRUE
), /* pcrel_offset */
807 HOWTO (R_ARM_THM_JUMP19
, /* type */
809 2, /* size (0 = byte, 1 = short, 2 = long) */
811 TRUE
, /* pc_relative */
813 complain_overflow_signed
,/* complain_on_overflow */
814 bfd_elf_generic_reloc
, /* special_function */
815 "R_ARM_THM_JUMP19", /* name */
816 FALSE
, /* partial_inplace */
817 0x043f2fff, /* src_mask */
818 0x043f2fff, /* dst_mask */
819 TRUE
), /* pcrel_offset */
821 HOWTO (R_ARM_THM_JUMP6
, /* type */
823 1, /* size (0 = byte, 1 = short, 2 = long) */
825 TRUE
, /* pc_relative */
827 complain_overflow_unsigned
,/* complain_on_overflow */
828 bfd_elf_generic_reloc
, /* special_function */
829 "R_ARM_THM_JUMP6", /* name */
830 FALSE
, /* partial_inplace */
831 0x02f8, /* src_mask */
832 0x02f8, /* dst_mask */
833 TRUE
), /* pcrel_offset */
835 /* These are declared as 13-bit signed relocations because we can
836 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
838 HOWTO (R_ARM_THM_ALU_PREL_11_0
,/* type */
840 2, /* size (0 = byte, 1 = short, 2 = long) */
842 TRUE
, /* pc_relative */
844 complain_overflow_dont
,/* complain_on_overflow */
845 bfd_elf_generic_reloc
, /* special_function */
846 "R_ARM_THM_ALU_PREL_11_0",/* name */
847 FALSE
, /* partial_inplace */
848 0xffffffff, /* src_mask */
849 0xffffffff, /* dst_mask */
850 TRUE
), /* pcrel_offset */
852 HOWTO (R_ARM_THM_PC12
, /* type */
854 2, /* size (0 = byte, 1 = short, 2 = long) */
856 TRUE
, /* pc_relative */
858 complain_overflow_dont
,/* complain_on_overflow */
859 bfd_elf_generic_reloc
, /* special_function */
860 "R_ARM_THM_PC12", /* name */
861 FALSE
, /* partial_inplace */
862 0xffffffff, /* src_mask */
863 0xffffffff, /* dst_mask */
864 TRUE
), /* pcrel_offset */
866 HOWTO (R_ARM_ABS32_NOI
, /* type */
868 2, /* size (0 = byte, 1 = short, 2 = long) */
870 FALSE
, /* pc_relative */
872 complain_overflow_dont
,/* complain_on_overflow */
873 bfd_elf_generic_reloc
, /* special_function */
874 "R_ARM_ABS32_NOI", /* name */
875 FALSE
, /* partial_inplace */
876 0xffffffff, /* src_mask */
877 0xffffffff, /* dst_mask */
878 FALSE
), /* pcrel_offset */
880 HOWTO (R_ARM_REL32_NOI
, /* type */
882 2, /* size (0 = byte, 1 = short, 2 = long) */
884 TRUE
, /* pc_relative */
886 complain_overflow_dont
,/* complain_on_overflow */
887 bfd_elf_generic_reloc
, /* special_function */
888 "R_ARM_REL32_NOI", /* name */
889 FALSE
, /* partial_inplace */
890 0xffffffff, /* src_mask */
891 0xffffffff, /* dst_mask */
892 FALSE
), /* pcrel_offset */
894 /* Group relocations. */
896 HOWTO (R_ARM_ALU_PC_G0_NC
, /* type */
898 2, /* size (0 = byte, 1 = short, 2 = long) */
900 TRUE
, /* pc_relative */
902 complain_overflow_dont
,/* complain_on_overflow */
903 bfd_elf_generic_reloc
, /* special_function */
904 "R_ARM_ALU_PC_G0_NC", /* name */
905 FALSE
, /* partial_inplace */
906 0xffffffff, /* src_mask */
907 0xffffffff, /* dst_mask */
908 TRUE
), /* pcrel_offset */
910 HOWTO (R_ARM_ALU_PC_G0
, /* type */
912 2, /* size (0 = byte, 1 = short, 2 = long) */
914 TRUE
, /* pc_relative */
916 complain_overflow_dont
,/* complain_on_overflow */
917 bfd_elf_generic_reloc
, /* special_function */
918 "R_ARM_ALU_PC_G0", /* name */
919 FALSE
, /* partial_inplace */
920 0xffffffff, /* src_mask */
921 0xffffffff, /* dst_mask */
922 TRUE
), /* pcrel_offset */
924 HOWTO (R_ARM_ALU_PC_G1_NC
, /* type */
926 2, /* size (0 = byte, 1 = short, 2 = long) */
928 TRUE
, /* pc_relative */
930 complain_overflow_dont
,/* complain_on_overflow */
931 bfd_elf_generic_reloc
, /* special_function */
932 "R_ARM_ALU_PC_G1_NC", /* name */
933 FALSE
, /* partial_inplace */
934 0xffffffff, /* src_mask */
935 0xffffffff, /* dst_mask */
936 TRUE
), /* pcrel_offset */
938 HOWTO (R_ARM_ALU_PC_G1
, /* type */
940 2, /* size (0 = byte, 1 = short, 2 = long) */
942 TRUE
, /* pc_relative */
944 complain_overflow_dont
,/* complain_on_overflow */
945 bfd_elf_generic_reloc
, /* special_function */
946 "R_ARM_ALU_PC_G1", /* name */
947 FALSE
, /* partial_inplace */
948 0xffffffff, /* src_mask */
949 0xffffffff, /* dst_mask */
950 TRUE
), /* pcrel_offset */
952 HOWTO (R_ARM_ALU_PC_G2
, /* type */
954 2, /* size (0 = byte, 1 = short, 2 = long) */
956 TRUE
, /* pc_relative */
958 complain_overflow_dont
,/* complain_on_overflow */
959 bfd_elf_generic_reloc
, /* special_function */
960 "R_ARM_ALU_PC_G2", /* name */
961 FALSE
, /* partial_inplace */
962 0xffffffff, /* src_mask */
963 0xffffffff, /* dst_mask */
964 TRUE
), /* pcrel_offset */
966 HOWTO (R_ARM_LDR_PC_G1
, /* type */
968 2, /* size (0 = byte, 1 = short, 2 = long) */
970 TRUE
, /* pc_relative */
972 complain_overflow_dont
,/* complain_on_overflow */
973 bfd_elf_generic_reloc
, /* special_function */
974 "R_ARM_LDR_PC_G1", /* name */
975 FALSE
, /* partial_inplace */
976 0xffffffff, /* src_mask */
977 0xffffffff, /* dst_mask */
978 TRUE
), /* pcrel_offset */
980 HOWTO (R_ARM_LDR_PC_G2
, /* type */
982 2, /* size (0 = byte, 1 = short, 2 = long) */
984 TRUE
, /* pc_relative */
986 complain_overflow_dont
,/* complain_on_overflow */
987 bfd_elf_generic_reloc
, /* special_function */
988 "R_ARM_LDR_PC_G2", /* name */
989 FALSE
, /* partial_inplace */
990 0xffffffff, /* src_mask */
991 0xffffffff, /* dst_mask */
992 TRUE
), /* pcrel_offset */
994 HOWTO (R_ARM_LDRS_PC_G0
, /* type */
996 2, /* size (0 = byte, 1 = short, 2 = long) */
998 TRUE
, /* pc_relative */
1000 complain_overflow_dont
,/* complain_on_overflow */
1001 bfd_elf_generic_reloc
, /* special_function */
1002 "R_ARM_LDRS_PC_G0", /* name */
1003 FALSE
, /* partial_inplace */
1004 0xffffffff, /* src_mask */
1005 0xffffffff, /* dst_mask */
1006 TRUE
), /* pcrel_offset */
1008 HOWTO (R_ARM_LDRS_PC_G1
, /* type */
1010 2, /* size (0 = byte, 1 = short, 2 = long) */
1012 TRUE
, /* pc_relative */
1014 complain_overflow_dont
,/* complain_on_overflow */
1015 bfd_elf_generic_reloc
, /* special_function */
1016 "R_ARM_LDRS_PC_G1", /* name */
1017 FALSE
, /* partial_inplace */
1018 0xffffffff, /* src_mask */
1019 0xffffffff, /* dst_mask */
1020 TRUE
), /* pcrel_offset */
1022 HOWTO (R_ARM_LDRS_PC_G2
, /* type */
1024 2, /* size (0 = byte, 1 = short, 2 = long) */
1026 TRUE
, /* pc_relative */
1028 complain_overflow_dont
,/* complain_on_overflow */
1029 bfd_elf_generic_reloc
, /* special_function */
1030 "R_ARM_LDRS_PC_G2", /* name */
1031 FALSE
, /* partial_inplace */
1032 0xffffffff, /* src_mask */
1033 0xffffffff, /* dst_mask */
1034 TRUE
), /* pcrel_offset */
1036 HOWTO (R_ARM_LDC_PC_G0
, /* type */
1038 2, /* size (0 = byte, 1 = short, 2 = long) */
1040 TRUE
, /* pc_relative */
1042 complain_overflow_dont
,/* complain_on_overflow */
1043 bfd_elf_generic_reloc
, /* special_function */
1044 "R_ARM_LDC_PC_G0", /* name */
1045 FALSE
, /* partial_inplace */
1046 0xffffffff, /* src_mask */
1047 0xffffffff, /* dst_mask */
1048 TRUE
), /* pcrel_offset */
1050 HOWTO (R_ARM_LDC_PC_G1
, /* type */
1052 2, /* size (0 = byte, 1 = short, 2 = long) */
1054 TRUE
, /* pc_relative */
1056 complain_overflow_dont
,/* complain_on_overflow */
1057 bfd_elf_generic_reloc
, /* special_function */
1058 "R_ARM_LDC_PC_G1", /* name */
1059 FALSE
, /* partial_inplace */
1060 0xffffffff, /* src_mask */
1061 0xffffffff, /* dst_mask */
1062 TRUE
), /* pcrel_offset */
1064 HOWTO (R_ARM_LDC_PC_G2
, /* type */
1066 2, /* size (0 = byte, 1 = short, 2 = long) */
1068 TRUE
, /* pc_relative */
1070 complain_overflow_dont
,/* complain_on_overflow */
1071 bfd_elf_generic_reloc
, /* special_function */
1072 "R_ARM_LDC_PC_G2", /* name */
1073 FALSE
, /* partial_inplace */
1074 0xffffffff, /* src_mask */
1075 0xffffffff, /* dst_mask */
1076 TRUE
), /* pcrel_offset */
1078 HOWTO (R_ARM_ALU_SB_G0_NC
, /* type */
1080 2, /* size (0 = byte, 1 = short, 2 = long) */
1082 TRUE
, /* pc_relative */
1084 complain_overflow_dont
,/* complain_on_overflow */
1085 bfd_elf_generic_reloc
, /* special_function */
1086 "R_ARM_ALU_SB_G0_NC", /* name */
1087 FALSE
, /* partial_inplace */
1088 0xffffffff, /* src_mask */
1089 0xffffffff, /* dst_mask */
1090 TRUE
), /* pcrel_offset */
1092 HOWTO (R_ARM_ALU_SB_G0
, /* type */
1094 2, /* size (0 = byte, 1 = short, 2 = long) */
1096 TRUE
, /* pc_relative */
1098 complain_overflow_dont
,/* complain_on_overflow */
1099 bfd_elf_generic_reloc
, /* special_function */
1100 "R_ARM_ALU_SB_G0", /* name */
1101 FALSE
, /* partial_inplace */
1102 0xffffffff, /* src_mask */
1103 0xffffffff, /* dst_mask */
1104 TRUE
), /* pcrel_offset */
1106 HOWTO (R_ARM_ALU_SB_G1_NC
, /* type */
1108 2, /* size (0 = byte, 1 = short, 2 = long) */
1110 TRUE
, /* pc_relative */
1112 complain_overflow_dont
,/* complain_on_overflow */
1113 bfd_elf_generic_reloc
, /* special_function */
1114 "R_ARM_ALU_SB_G1_NC", /* name */
1115 FALSE
, /* partial_inplace */
1116 0xffffffff, /* src_mask */
1117 0xffffffff, /* dst_mask */
1118 TRUE
), /* pcrel_offset */
1120 HOWTO (R_ARM_ALU_SB_G1
, /* type */
1122 2, /* size (0 = byte, 1 = short, 2 = long) */
1124 TRUE
, /* pc_relative */
1126 complain_overflow_dont
,/* complain_on_overflow */
1127 bfd_elf_generic_reloc
, /* special_function */
1128 "R_ARM_ALU_SB_G1", /* name */
1129 FALSE
, /* partial_inplace */
1130 0xffffffff, /* src_mask */
1131 0xffffffff, /* dst_mask */
1132 TRUE
), /* pcrel_offset */
1134 HOWTO (R_ARM_ALU_SB_G2
, /* type */
1136 2, /* size (0 = byte, 1 = short, 2 = long) */
1138 TRUE
, /* pc_relative */
1140 complain_overflow_dont
,/* complain_on_overflow */
1141 bfd_elf_generic_reloc
, /* special_function */
1142 "R_ARM_ALU_SB_G2", /* name */
1143 FALSE
, /* partial_inplace */
1144 0xffffffff, /* src_mask */
1145 0xffffffff, /* dst_mask */
1146 TRUE
), /* pcrel_offset */
1148 HOWTO (R_ARM_LDR_SB_G0
, /* type */
1150 2, /* size (0 = byte, 1 = short, 2 = long) */
1152 TRUE
, /* pc_relative */
1154 complain_overflow_dont
,/* complain_on_overflow */
1155 bfd_elf_generic_reloc
, /* special_function */
1156 "R_ARM_LDR_SB_G0", /* name */
1157 FALSE
, /* partial_inplace */
1158 0xffffffff, /* src_mask */
1159 0xffffffff, /* dst_mask */
1160 TRUE
), /* pcrel_offset */
1162 HOWTO (R_ARM_LDR_SB_G1
, /* type */
1164 2, /* size (0 = byte, 1 = short, 2 = long) */
1166 TRUE
, /* pc_relative */
1168 complain_overflow_dont
,/* complain_on_overflow */
1169 bfd_elf_generic_reloc
, /* special_function */
1170 "R_ARM_LDR_SB_G1", /* name */
1171 FALSE
, /* partial_inplace */
1172 0xffffffff, /* src_mask */
1173 0xffffffff, /* dst_mask */
1174 TRUE
), /* pcrel_offset */
1176 HOWTO (R_ARM_LDR_SB_G2
, /* type */
1178 2, /* size (0 = byte, 1 = short, 2 = long) */
1180 TRUE
, /* pc_relative */
1182 complain_overflow_dont
,/* complain_on_overflow */
1183 bfd_elf_generic_reloc
, /* special_function */
1184 "R_ARM_LDR_SB_G2", /* name */
1185 FALSE
, /* partial_inplace */
1186 0xffffffff, /* src_mask */
1187 0xffffffff, /* dst_mask */
1188 TRUE
), /* pcrel_offset */
1190 HOWTO (R_ARM_LDRS_SB_G0
, /* type */
1192 2, /* size (0 = byte, 1 = short, 2 = long) */
1194 TRUE
, /* pc_relative */
1196 complain_overflow_dont
,/* complain_on_overflow */
1197 bfd_elf_generic_reloc
, /* special_function */
1198 "R_ARM_LDRS_SB_G0", /* name */
1199 FALSE
, /* partial_inplace */
1200 0xffffffff, /* src_mask */
1201 0xffffffff, /* dst_mask */
1202 TRUE
), /* pcrel_offset */
1204 HOWTO (R_ARM_LDRS_SB_G1
, /* type */
1206 2, /* size (0 = byte, 1 = short, 2 = long) */
1208 TRUE
, /* pc_relative */
1210 complain_overflow_dont
,/* complain_on_overflow */
1211 bfd_elf_generic_reloc
, /* special_function */
1212 "R_ARM_LDRS_SB_G1", /* name */
1213 FALSE
, /* partial_inplace */
1214 0xffffffff, /* src_mask */
1215 0xffffffff, /* dst_mask */
1216 TRUE
), /* pcrel_offset */
1218 HOWTO (R_ARM_LDRS_SB_G2
, /* type */
1220 2, /* size (0 = byte, 1 = short, 2 = long) */
1222 TRUE
, /* pc_relative */
1224 complain_overflow_dont
,/* complain_on_overflow */
1225 bfd_elf_generic_reloc
, /* special_function */
1226 "R_ARM_LDRS_SB_G2", /* name */
1227 FALSE
, /* partial_inplace */
1228 0xffffffff, /* src_mask */
1229 0xffffffff, /* dst_mask */
1230 TRUE
), /* pcrel_offset */
1232 HOWTO (R_ARM_LDC_SB_G0
, /* type */
1234 2, /* size (0 = byte, 1 = short, 2 = long) */
1236 TRUE
, /* pc_relative */
1238 complain_overflow_dont
,/* complain_on_overflow */
1239 bfd_elf_generic_reloc
, /* special_function */
1240 "R_ARM_LDC_SB_G0", /* name */
1241 FALSE
, /* partial_inplace */
1242 0xffffffff, /* src_mask */
1243 0xffffffff, /* dst_mask */
1244 TRUE
), /* pcrel_offset */
1246 HOWTO (R_ARM_LDC_SB_G1
, /* type */
1248 2, /* size (0 = byte, 1 = short, 2 = long) */
1250 TRUE
, /* pc_relative */
1252 complain_overflow_dont
,/* complain_on_overflow */
1253 bfd_elf_generic_reloc
, /* special_function */
1254 "R_ARM_LDC_SB_G1", /* name */
1255 FALSE
, /* partial_inplace */
1256 0xffffffff, /* src_mask */
1257 0xffffffff, /* dst_mask */
1258 TRUE
), /* pcrel_offset */
1260 HOWTO (R_ARM_LDC_SB_G2
, /* type */
1262 2, /* size (0 = byte, 1 = short, 2 = long) */
1264 TRUE
, /* pc_relative */
1266 complain_overflow_dont
,/* complain_on_overflow */
1267 bfd_elf_generic_reloc
, /* special_function */
1268 "R_ARM_LDC_SB_G2", /* name */
1269 FALSE
, /* partial_inplace */
1270 0xffffffff, /* src_mask */
1271 0xffffffff, /* dst_mask */
1272 TRUE
), /* pcrel_offset */
1274 /* End of group relocations. */
1276 HOWTO (R_ARM_MOVW_BREL_NC
, /* type */
1278 2, /* size (0 = byte, 1 = short, 2 = long) */
1280 FALSE
, /* pc_relative */
1282 complain_overflow_dont
,/* complain_on_overflow */
1283 bfd_elf_generic_reloc
, /* special_function */
1284 "R_ARM_MOVW_BREL_NC", /* name */
1285 FALSE
, /* partial_inplace */
1286 0x0000ffff, /* src_mask */
1287 0x0000ffff, /* dst_mask */
1288 FALSE
), /* pcrel_offset */
1290 HOWTO (R_ARM_MOVT_BREL
, /* type */
1292 2, /* size (0 = byte, 1 = short, 2 = long) */
1294 FALSE
, /* pc_relative */
1296 complain_overflow_bitfield
,/* complain_on_overflow */
1297 bfd_elf_generic_reloc
, /* special_function */
1298 "R_ARM_MOVT_BREL", /* name */
1299 FALSE
, /* partial_inplace */
1300 0x0000ffff, /* src_mask */
1301 0x0000ffff, /* dst_mask */
1302 FALSE
), /* pcrel_offset */
1304 HOWTO (R_ARM_MOVW_BREL
, /* type */
1306 2, /* size (0 = byte, 1 = short, 2 = long) */
1308 FALSE
, /* pc_relative */
1310 complain_overflow_dont
,/* complain_on_overflow */
1311 bfd_elf_generic_reloc
, /* special_function */
1312 "R_ARM_MOVW_BREL", /* name */
1313 FALSE
, /* partial_inplace */
1314 0x0000ffff, /* src_mask */
1315 0x0000ffff, /* dst_mask */
1316 FALSE
), /* pcrel_offset */
1318 HOWTO (R_ARM_THM_MOVW_BREL_NC
,/* type */
1320 2, /* size (0 = byte, 1 = short, 2 = long) */
1322 FALSE
, /* pc_relative */
1324 complain_overflow_dont
,/* complain_on_overflow */
1325 bfd_elf_generic_reloc
, /* special_function */
1326 "R_ARM_THM_MOVW_BREL_NC",/* name */
1327 FALSE
, /* partial_inplace */
1328 0x040f70ff, /* src_mask */
1329 0x040f70ff, /* dst_mask */
1330 FALSE
), /* pcrel_offset */
1332 HOWTO (R_ARM_THM_MOVT_BREL
, /* type */
1334 2, /* size (0 = byte, 1 = short, 2 = long) */
1336 FALSE
, /* pc_relative */
1338 complain_overflow_bitfield
,/* complain_on_overflow */
1339 bfd_elf_generic_reloc
, /* special_function */
1340 "R_ARM_THM_MOVT_BREL", /* name */
1341 FALSE
, /* partial_inplace */
1342 0x040f70ff, /* src_mask */
1343 0x040f70ff, /* dst_mask */
1344 FALSE
), /* pcrel_offset */
1346 HOWTO (R_ARM_THM_MOVW_BREL
, /* type */
1348 2, /* size (0 = byte, 1 = short, 2 = long) */
1350 FALSE
, /* pc_relative */
1352 complain_overflow_dont
,/* complain_on_overflow */
1353 bfd_elf_generic_reloc
, /* special_function */
1354 "R_ARM_THM_MOVW_BREL", /* name */
1355 FALSE
, /* partial_inplace */
1356 0x040f70ff, /* src_mask */
1357 0x040f70ff, /* dst_mask */
1358 FALSE
), /* pcrel_offset */
1360 HOWTO (R_ARM_TLS_GOTDESC
, /* type */
1362 2, /* size (0 = byte, 1 = short, 2 = long) */
1364 FALSE
, /* pc_relative */
1366 complain_overflow_bitfield
,/* complain_on_overflow */
1367 NULL
, /* special_function */
1368 "R_ARM_TLS_GOTDESC", /* name */
1369 TRUE
, /* partial_inplace */
1370 0xffffffff, /* src_mask */
1371 0xffffffff, /* dst_mask */
1372 FALSE
), /* pcrel_offset */
1374 HOWTO (R_ARM_TLS_CALL
, /* type */
1376 2, /* size (0 = byte, 1 = short, 2 = long) */
1378 FALSE
, /* pc_relative */
1380 complain_overflow_dont
,/* complain_on_overflow */
1381 bfd_elf_generic_reloc
, /* special_function */
1382 "R_ARM_TLS_CALL", /* name */
1383 FALSE
, /* partial_inplace */
1384 0x00ffffff, /* src_mask */
1385 0x00ffffff, /* dst_mask */
1386 FALSE
), /* pcrel_offset */
1388 HOWTO (R_ARM_TLS_DESCSEQ
, /* type */
1390 2, /* size (0 = byte, 1 = short, 2 = long) */
1392 FALSE
, /* pc_relative */
1394 complain_overflow_bitfield
,/* complain_on_overflow */
1395 bfd_elf_generic_reloc
, /* special_function */
1396 "R_ARM_TLS_DESCSEQ", /* name */
1397 FALSE
, /* partial_inplace */
1398 0x00000000, /* src_mask */
1399 0x00000000, /* dst_mask */
1400 FALSE
), /* pcrel_offset */
1402 HOWTO (R_ARM_THM_TLS_CALL
, /* type */
1404 2, /* size (0 = byte, 1 = short, 2 = long) */
1406 FALSE
, /* pc_relative */
1408 complain_overflow_dont
,/* complain_on_overflow */
1409 bfd_elf_generic_reloc
, /* special_function */
1410 "R_ARM_THM_TLS_CALL", /* name */
1411 FALSE
, /* partial_inplace */
1412 0x07ff07ff, /* src_mask */
1413 0x07ff07ff, /* dst_mask */
1414 FALSE
), /* pcrel_offset */
1416 HOWTO (R_ARM_PLT32_ABS
, /* type */
1418 2, /* size (0 = byte, 1 = short, 2 = long) */
1420 FALSE
, /* pc_relative */
1422 complain_overflow_dont
,/* complain_on_overflow */
1423 bfd_elf_generic_reloc
, /* special_function */
1424 "R_ARM_PLT32_ABS", /* name */
1425 FALSE
, /* partial_inplace */
1426 0xffffffff, /* src_mask */
1427 0xffffffff, /* dst_mask */
1428 FALSE
), /* pcrel_offset */
1430 HOWTO (R_ARM_GOT_ABS
, /* type */
1432 2, /* size (0 = byte, 1 = short, 2 = long) */
1434 FALSE
, /* pc_relative */
1436 complain_overflow_dont
,/* complain_on_overflow */
1437 bfd_elf_generic_reloc
, /* special_function */
1438 "R_ARM_GOT_ABS", /* name */
1439 FALSE
, /* partial_inplace */
1440 0xffffffff, /* src_mask */
1441 0xffffffff, /* dst_mask */
1442 FALSE
), /* pcrel_offset */
1444 HOWTO (R_ARM_GOT_PREL
, /* type */
1446 2, /* size (0 = byte, 1 = short, 2 = long) */
1448 TRUE
, /* pc_relative */
1450 complain_overflow_dont
, /* complain_on_overflow */
1451 bfd_elf_generic_reloc
, /* special_function */
1452 "R_ARM_GOT_PREL", /* name */
1453 FALSE
, /* partial_inplace */
1454 0xffffffff, /* src_mask */
1455 0xffffffff, /* dst_mask */
1456 TRUE
), /* pcrel_offset */
1458 HOWTO (R_ARM_GOT_BREL12
, /* type */
1460 2, /* size (0 = byte, 1 = short, 2 = long) */
1462 FALSE
, /* pc_relative */
1464 complain_overflow_bitfield
,/* complain_on_overflow */
1465 bfd_elf_generic_reloc
, /* special_function */
1466 "R_ARM_GOT_BREL12", /* name */
1467 FALSE
, /* partial_inplace */
1468 0x00000fff, /* src_mask */
1469 0x00000fff, /* dst_mask */
1470 FALSE
), /* pcrel_offset */
1472 HOWTO (R_ARM_GOTOFF12
, /* type */
1474 2, /* size (0 = byte, 1 = short, 2 = long) */
1476 FALSE
, /* pc_relative */
1478 complain_overflow_bitfield
,/* complain_on_overflow */
1479 bfd_elf_generic_reloc
, /* special_function */
1480 "R_ARM_GOTOFF12", /* name */
1481 FALSE
, /* partial_inplace */
1482 0x00000fff, /* src_mask */
1483 0x00000fff, /* dst_mask */
1484 FALSE
), /* pcrel_offset */
1486 EMPTY_HOWTO (R_ARM_GOTRELAX
), /* reserved for future GOT-load optimizations */
1488 /* GNU extension to record C++ vtable member usage */
1489 HOWTO (R_ARM_GNU_VTENTRY
, /* type */
1491 2, /* size (0 = byte, 1 = short, 2 = long) */
1493 FALSE
, /* pc_relative */
1495 complain_overflow_dont
, /* complain_on_overflow */
1496 _bfd_elf_rel_vtable_reloc_fn
, /* special_function */
1497 "R_ARM_GNU_VTENTRY", /* name */
1498 FALSE
, /* partial_inplace */
1501 FALSE
), /* pcrel_offset */
1503 /* GNU extension to record C++ vtable hierarchy */
1504 HOWTO (R_ARM_GNU_VTINHERIT
, /* type */
1506 2, /* size (0 = byte, 1 = short, 2 = long) */
1508 FALSE
, /* pc_relative */
1510 complain_overflow_dont
, /* complain_on_overflow */
1511 NULL
, /* special_function */
1512 "R_ARM_GNU_VTINHERIT", /* name */
1513 FALSE
, /* partial_inplace */
1516 FALSE
), /* pcrel_offset */
1518 HOWTO (R_ARM_THM_JUMP11
, /* type */
1520 1, /* size (0 = byte, 1 = short, 2 = long) */
1522 TRUE
, /* pc_relative */
1524 complain_overflow_signed
, /* complain_on_overflow */
1525 bfd_elf_generic_reloc
, /* special_function */
1526 "R_ARM_THM_JUMP11", /* name */
1527 FALSE
, /* partial_inplace */
1528 0x000007ff, /* src_mask */
1529 0x000007ff, /* dst_mask */
1530 TRUE
), /* pcrel_offset */
1532 HOWTO (R_ARM_THM_JUMP8
, /* type */
1534 1, /* size (0 = byte, 1 = short, 2 = long) */
1536 TRUE
, /* pc_relative */
1538 complain_overflow_signed
, /* complain_on_overflow */
1539 bfd_elf_generic_reloc
, /* special_function */
1540 "R_ARM_THM_JUMP8", /* name */
1541 FALSE
, /* partial_inplace */
1542 0x000000ff, /* src_mask */
1543 0x000000ff, /* dst_mask */
1544 TRUE
), /* pcrel_offset */
1546 /* TLS relocations */
1547 HOWTO (R_ARM_TLS_GD32
, /* type */
1549 2, /* size (0 = byte, 1 = short, 2 = long) */
1551 FALSE
, /* pc_relative */
1553 complain_overflow_bitfield
,/* complain_on_overflow */
1554 NULL
, /* special_function */
1555 "R_ARM_TLS_GD32", /* name */
1556 TRUE
, /* partial_inplace */
1557 0xffffffff, /* src_mask */
1558 0xffffffff, /* dst_mask */
1559 FALSE
), /* pcrel_offset */
1561 HOWTO (R_ARM_TLS_LDM32
, /* type */
1563 2, /* size (0 = byte, 1 = short, 2 = long) */
1565 FALSE
, /* pc_relative */
1567 complain_overflow_bitfield
,/* complain_on_overflow */
1568 bfd_elf_generic_reloc
, /* special_function */
1569 "R_ARM_TLS_LDM32", /* name */
1570 TRUE
, /* partial_inplace */
1571 0xffffffff, /* src_mask */
1572 0xffffffff, /* dst_mask */
1573 FALSE
), /* pcrel_offset */
1575 HOWTO (R_ARM_TLS_LDO32
, /* type */
1577 2, /* size (0 = byte, 1 = short, 2 = long) */
1579 FALSE
, /* pc_relative */
1581 complain_overflow_bitfield
,/* complain_on_overflow */
1582 bfd_elf_generic_reloc
, /* special_function */
1583 "R_ARM_TLS_LDO32", /* name */
1584 TRUE
, /* partial_inplace */
1585 0xffffffff, /* src_mask */
1586 0xffffffff, /* dst_mask */
1587 FALSE
), /* pcrel_offset */
1589 HOWTO (R_ARM_TLS_IE32
, /* type */
1591 2, /* size (0 = byte, 1 = short, 2 = long) */
1593 FALSE
, /* pc_relative */
1595 complain_overflow_bitfield
,/* complain_on_overflow */
1596 NULL
, /* special_function */
1597 "R_ARM_TLS_IE32", /* name */
1598 TRUE
, /* partial_inplace */
1599 0xffffffff, /* src_mask */
1600 0xffffffff, /* dst_mask */
1601 FALSE
), /* pcrel_offset */
1603 HOWTO (R_ARM_TLS_LE32
, /* type */
1605 2, /* size (0 = byte, 1 = short, 2 = long) */
1607 FALSE
, /* pc_relative */
1609 complain_overflow_bitfield
,/* complain_on_overflow */
1610 NULL
, /* special_function */
1611 "R_ARM_TLS_LE32", /* name */
1612 TRUE
, /* partial_inplace */
1613 0xffffffff, /* src_mask */
1614 0xffffffff, /* dst_mask */
1615 FALSE
), /* pcrel_offset */
1617 HOWTO (R_ARM_TLS_LDO12
, /* type */
1619 2, /* size (0 = byte, 1 = short, 2 = long) */
1621 FALSE
, /* pc_relative */
1623 complain_overflow_bitfield
,/* complain_on_overflow */
1624 bfd_elf_generic_reloc
, /* special_function */
1625 "R_ARM_TLS_LDO12", /* name */
1626 FALSE
, /* partial_inplace */
1627 0x00000fff, /* src_mask */
1628 0x00000fff, /* dst_mask */
1629 FALSE
), /* pcrel_offset */
1631 HOWTO (R_ARM_TLS_LE12
, /* type */
1633 2, /* size (0 = byte, 1 = short, 2 = long) */
1635 FALSE
, /* pc_relative */
1637 complain_overflow_bitfield
,/* complain_on_overflow */
1638 bfd_elf_generic_reloc
, /* special_function */
1639 "R_ARM_TLS_LE12", /* name */
1640 FALSE
, /* partial_inplace */
1641 0x00000fff, /* src_mask */
1642 0x00000fff, /* dst_mask */
1643 FALSE
), /* pcrel_offset */
1645 HOWTO (R_ARM_TLS_IE12GP
, /* type */
1647 2, /* size (0 = byte, 1 = short, 2 = long) */
1649 FALSE
, /* pc_relative */
1651 complain_overflow_bitfield
,/* complain_on_overflow */
1652 bfd_elf_generic_reloc
, /* special_function */
1653 "R_ARM_TLS_IE12GP", /* name */
1654 FALSE
, /* partial_inplace */
1655 0x00000fff, /* src_mask */
1656 0x00000fff, /* dst_mask */
1657 FALSE
), /* pcrel_offset */
1659 /* 112-127 private relocations. */
1677 /* R_ARM_ME_TOO, obsolete. */
1680 HOWTO (R_ARM_THM_TLS_DESCSEQ
, /* type */
1682 1, /* size (0 = byte, 1 = short, 2 = long) */
1684 FALSE
, /* pc_relative */
1686 complain_overflow_bitfield
,/* complain_on_overflow */
1687 bfd_elf_generic_reloc
, /* special_function */
1688 "R_ARM_THM_TLS_DESCSEQ",/* name */
1689 FALSE
, /* partial_inplace */
1690 0x00000000, /* src_mask */
1691 0x00000000, /* dst_mask */
1692 FALSE
), /* pcrel_offset */
1695 HOWTO (R_ARM_THM_ALU_ABS_G0_NC
,/* type. */
1696 0, /* rightshift. */
1697 1, /* size (0 = byte, 1 = short, 2 = long). */
1699 FALSE
, /* pc_relative. */
1701 complain_overflow_bitfield
,/* complain_on_overflow. */
1702 bfd_elf_generic_reloc
, /* special_function. */
1703 "R_ARM_THM_ALU_ABS_G0_NC",/* name. */
1704 FALSE
, /* partial_inplace. */
1705 0x00000000, /* src_mask. */
1706 0x00000000, /* dst_mask. */
1707 FALSE
), /* pcrel_offset. */
1708 HOWTO (R_ARM_THM_ALU_ABS_G1_NC
,/* type. */
1709 0, /* rightshift. */
1710 1, /* size (0 = byte, 1 = short, 2 = long). */
1712 FALSE
, /* pc_relative. */
1714 complain_overflow_bitfield
,/* complain_on_overflow. */
1715 bfd_elf_generic_reloc
, /* special_function. */
1716 "R_ARM_THM_ALU_ABS_G1_NC",/* name. */
1717 FALSE
, /* partial_inplace. */
1718 0x00000000, /* src_mask. */
1719 0x00000000, /* dst_mask. */
1720 FALSE
), /* pcrel_offset. */
1721 HOWTO (R_ARM_THM_ALU_ABS_G2_NC
,/* type. */
1722 0, /* rightshift. */
1723 1, /* size (0 = byte, 1 = short, 2 = long). */
1725 FALSE
, /* pc_relative. */
1727 complain_overflow_bitfield
,/* complain_on_overflow. */
1728 bfd_elf_generic_reloc
, /* special_function. */
1729 "R_ARM_THM_ALU_ABS_G2_NC",/* name. */
1730 FALSE
, /* partial_inplace. */
1731 0x00000000, /* src_mask. */
1732 0x00000000, /* dst_mask. */
1733 FALSE
), /* pcrel_offset. */
1734 HOWTO (R_ARM_THM_ALU_ABS_G3_NC
,/* type. */
1735 0, /* rightshift. */
1736 1, /* size (0 = byte, 1 = short, 2 = long). */
1738 FALSE
, /* pc_relative. */
1740 complain_overflow_bitfield
,/* complain_on_overflow. */
1741 bfd_elf_generic_reloc
, /* special_function. */
1742 "R_ARM_THM_ALU_ABS_G3_NC",/* name. */
1743 FALSE
, /* partial_inplace. */
1744 0x00000000, /* src_mask. */
1745 0x00000000, /* dst_mask. */
1746 FALSE
), /* pcrel_offset. */
1747 /* Relocations for Armv8.1-M Mainline. */
1748 HOWTO (R_ARM_THM_BF16
, /* type. */
1749 0, /* rightshift. */
1750 1, /* size (0 = byte, 1 = short, 2 = long). */
1752 TRUE
, /* pc_relative. */
1754 complain_overflow_dont
,/* do not complain_on_overflow. */
1755 bfd_elf_generic_reloc
, /* special_function. */
1756 "R_ARM_THM_BF16", /* name. */
1757 FALSE
, /* partial_inplace. */
1758 0x001f0ffe, /* src_mask. */
1759 0x001f0ffe, /* dst_mask. */
1760 TRUE
), /* pcrel_offset. */
1761 HOWTO (R_ARM_THM_BF12
, /* type. */
1762 0, /* rightshift. */
1763 1, /* size (0 = byte, 1 = short, 2 = long). */
1765 TRUE
, /* pc_relative. */
1767 complain_overflow_dont
,/* do not complain_on_overflow. */
1768 bfd_elf_generic_reloc
, /* special_function. */
1769 "R_ARM_THM_BF12", /* name. */
1770 FALSE
, /* partial_inplace. */
1771 0x00010ffe, /* src_mask. */
1772 0x00010ffe, /* dst_mask. */
1773 TRUE
), /* pcrel_offset. */
1774 HOWTO (R_ARM_THM_BF18
, /* type. */
1775 0, /* rightshift. */
1776 1, /* size (0 = byte, 1 = short, 2 = long). */
1778 TRUE
, /* pc_relative. */
1780 complain_overflow_dont
,/* do not complain_on_overflow. */
1781 bfd_elf_generic_reloc
, /* special_function. */
1782 "R_ARM_THM_BF18", /* name. */
1783 FALSE
, /* partial_inplace. */
1784 0x007f0ffe, /* src_mask. */
1785 0x007f0ffe, /* dst_mask. */
1786 TRUE
), /* pcrel_offset. */
1790 static reloc_howto_type elf32_arm_howto_table_2
[8] =
1792 HOWTO (R_ARM_IRELATIVE
, /* type */
1794 2, /* size (0 = byte, 1 = short, 2 = long) */
1796 FALSE
, /* pc_relative */
1798 complain_overflow_bitfield
,/* complain_on_overflow */
1799 bfd_elf_generic_reloc
, /* special_function */
1800 "R_ARM_IRELATIVE", /* name */
1801 TRUE
, /* partial_inplace */
1802 0xffffffff, /* src_mask */
1803 0xffffffff, /* dst_mask */
1804 FALSE
), /* pcrel_offset */
1805 HOWTO (R_ARM_GOTFUNCDESC
, /* type */
1807 2, /* size (0 = byte, 1 = short, 2 = long) */
1809 FALSE
, /* pc_relative */
1811 complain_overflow_bitfield
,/* complain_on_overflow */
1812 bfd_elf_generic_reloc
, /* special_function */
1813 "R_ARM_GOTFUNCDESC", /* name */
1814 FALSE
, /* partial_inplace */
1816 0xffffffff, /* dst_mask */
1817 FALSE
), /* pcrel_offset */
1818 HOWTO (R_ARM_GOTOFFFUNCDESC
, /* type */
1820 2, /* size (0 = byte, 1 = short, 2 = long) */
1822 FALSE
, /* pc_relative */
1824 complain_overflow_bitfield
,/* complain_on_overflow */
1825 bfd_elf_generic_reloc
, /* special_function */
1826 "R_ARM_GOTOFFFUNCDESC",/* name */
1827 FALSE
, /* partial_inplace */
1829 0xffffffff, /* dst_mask */
1830 FALSE
), /* pcrel_offset */
1831 HOWTO (R_ARM_FUNCDESC
, /* type */
1833 2, /* size (0 = byte, 1 = short, 2 = long) */
1835 FALSE
, /* pc_relative */
1837 complain_overflow_bitfield
,/* complain_on_overflow */
1838 bfd_elf_generic_reloc
, /* special_function */
1839 "R_ARM_FUNCDESC", /* name */
1840 FALSE
, /* partial_inplace */
1842 0xffffffff, /* dst_mask */
1843 FALSE
), /* pcrel_offset */
1844 HOWTO (R_ARM_FUNCDESC_VALUE
, /* type */
1846 2, /* size (0 = byte, 1 = short, 2 = long) */
1848 FALSE
, /* pc_relative */
1850 complain_overflow_bitfield
,/* complain_on_overflow */
1851 bfd_elf_generic_reloc
, /* special_function */
1852 "R_ARM_FUNCDESC_VALUE",/* name */
1853 FALSE
, /* partial_inplace */
1855 0xffffffff, /* dst_mask */
1856 FALSE
), /* pcrel_offset */
1857 HOWTO (R_ARM_TLS_GD32_FDPIC
, /* type */
1859 2, /* size (0 = byte, 1 = short, 2 = long) */
1861 FALSE
, /* pc_relative */
1863 complain_overflow_bitfield
,/* complain_on_overflow */
1864 bfd_elf_generic_reloc
, /* special_function */
1865 "R_ARM_TLS_GD32_FDPIC",/* name */
1866 FALSE
, /* partial_inplace */
1868 0xffffffff, /* dst_mask */
1869 FALSE
), /* pcrel_offset */
1870 HOWTO (R_ARM_TLS_LDM32_FDPIC
, /* type */
1872 2, /* size (0 = byte, 1 = short, 2 = long) */
1874 FALSE
, /* pc_relative */
1876 complain_overflow_bitfield
,/* complain_on_overflow */
1877 bfd_elf_generic_reloc
, /* special_function */
1878 "R_ARM_TLS_LDM32_FDPIC",/* name */
1879 FALSE
, /* partial_inplace */
1881 0xffffffff, /* dst_mask */
1882 FALSE
), /* pcrel_offset */
1883 HOWTO (R_ARM_TLS_IE32_FDPIC
, /* type */
1885 2, /* size (0 = byte, 1 = short, 2 = long) */
1887 FALSE
, /* pc_relative */
1889 complain_overflow_bitfield
,/* complain_on_overflow */
1890 bfd_elf_generic_reloc
, /* special_function */
1891 "R_ARM_TLS_IE32_FDPIC",/* name */
1892 FALSE
, /* partial_inplace */
1894 0xffffffff, /* dst_mask */
1895 FALSE
), /* pcrel_offset */
1898 /* 249-255 extended, currently unused, relocations: */
1899 static reloc_howto_type elf32_arm_howto_table_3
[4] =
1901 HOWTO (R_ARM_RREL32
, /* type */
1903 0, /* size (0 = byte, 1 = short, 2 = long) */
1905 FALSE
, /* pc_relative */
1907 complain_overflow_dont
,/* complain_on_overflow */
1908 bfd_elf_generic_reloc
, /* special_function */
1909 "R_ARM_RREL32", /* name */
1910 FALSE
, /* partial_inplace */
1913 FALSE
), /* pcrel_offset */
1915 HOWTO (R_ARM_RABS32
, /* type */
1917 0, /* size (0 = byte, 1 = short, 2 = long) */
1919 FALSE
, /* pc_relative */
1921 complain_overflow_dont
,/* complain_on_overflow */
1922 bfd_elf_generic_reloc
, /* special_function */
1923 "R_ARM_RABS32", /* name */
1924 FALSE
, /* partial_inplace */
1927 FALSE
), /* pcrel_offset */
1929 HOWTO (R_ARM_RPC24
, /* type */
1931 0, /* size (0 = byte, 1 = short, 2 = long) */
1933 FALSE
, /* pc_relative */
1935 complain_overflow_dont
,/* complain_on_overflow */
1936 bfd_elf_generic_reloc
, /* special_function */
1937 "R_ARM_RPC24", /* name */
1938 FALSE
, /* partial_inplace */
1941 FALSE
), /* pcrel_offset */
1943 HOWTO (R_ARM_RBASE
, /* type */
1945 0, /* size (0 = byte, 1 = short, 2 = long) */
1947 FALSE
, /* pc_relative */
1949 complain_overflow_dont
,/* complain_on_overflow */
1950 bfd_elf_generic_reloc
, /* special_function */
1951 "R_ARM_RBASE", /* name */
1952 FALSE
, /* partial_inplace */
1955 FALSE
) /* pcrel_offset */
1958 static reloc_howto_type
*
1959 elf32_arm_howto_from_type (unsigned int r_type
)
1961 if (r_type
< ARRAY_SIZE (elf32_arm_howto_table_1
))
1962 return &elf32_arm_howto_table_1
[r_type
];
1964 if (r_type
>= R_ARM_IRELATIVE
1965 && r_type
< R_ARM_IRELATIVE
+ ARRAY_SIZE (elf32_arm_howto_table_2
))
1966 return &elf32_arm_howto_table_2
[r_type
- R_ARM_IRELATIVE
];
1968 if (r_type
>= R_ARM_RREL32
1969 && r_type
< R_ARM_RREL32
+ ARRAY_SIZE (elf32_arm_howto_table_3
))
1970 return &elf32_arm_howto_table_3
[r_type
- R_ARM_RREL32
];
1976 elf32_arm_info_to_howto (bfd
* abfd
, arelent
* bfd_reloc
,
1977 Elf_Internal_Rela
* elf_reloc
)
1979 unsigned int r_type
;
1981 r_type
= ELF32_R_TYPE (elf_reloc
->r_info
);
1982 if ((bfd_reloc
->howto
= elf32_arm_howto_from_type (r_type
)) == NULL
)
1984 /* xgettext:c-format */
1985 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
1987 bfd_set_error (bfd_error_bad_value
);
1993 struct elf32_arm_reloc_map
1995 bfd_reloc_code_real_type bfd_reloc_val
;
1996 unsigned char elf_reloc_val
;
1999 /* All entries in this list must also be present in elf32_arm_howto_table. */
2000 static const struct elf32_arm_reloc_map elf32_arm_reloc_map
[] =
2002 {BFD_RELOC_NONE
, R_ARM_NONE
},
2003 {BFD_RELOC_ARM_PCREL_BRANCH
, R_ARM_PC24
},
2004 {BFD_RELOC_ARM_PCREL_CALL
, R_ARM_CALL
},
2005 {BFD_RELOC_ARM_PCREL_JUMP
, R_ARM_JUMP24
},
2006 {BFD_RELOC_ARM_PCREL_BLX
, R_ARM_XPC25
},
2007 {BFD_RELOC_THUMB_PCREL_BLX
, R_ARM_THM_XPC22
},
2008 {BFD_RELOC_32
, R_ARM_ABS32
},
2009 {BFD_RELOC_32_PCREL
, R_ARM_REL32
},
2010 {BFD_RELOC_8
, R_ARM_ABS8
},
2011 {BFD_RELOC_16
, R_ARM_ABS16
},
2012 {BFD_RELOC_ARM_OFFSET_IMM
, R_ARM_ABS12
},
2013 {BFD_RELOC_ARM_THUMB_OFFSET
, R_ARM_THM_ABS5
},
2014 {BFD_RELOC_THUMB_PCREL_BRANCH25
, R_ARM_THM_JUMP24
},
2015 {BFD_RELOC_THUMB_PCREL_BRANCH23
, R_ARM_THM_CALL
},
2016 {BFD_RELOC_THUMB_PCREL_BRANCH12
, R_ARM_THM_JUMP11
},
2017 {BFD_RELOC_THUMB_PCREL_BRANCH20
, R_ARM_THM_JUMP19
},
2018 {BFD_RELOC_THUMB_PCREL_BRANCH9
, R_ARM_THM_JUMP8
},
2019 {BFD_RELOC_THUMB_PCREL_BRANCH7
, R_ARM_THM_JUMP6
},
2020 {BFD_RELOC_ARM_GLOB_DAT
, R_ARM_GLOB_DAT
},
2021 {BFD_RELOC_ARM_JUMP_SLOT
, R_ARM_JUMP_SLOT
},
2022 {BFD_RELOC_ARM_RELATIVE
, R_ARM_RELATIVE
},
2023 {BFD_RELOC_ARM_GOTOFF
, R_ARM_GOTOFF32
},
2024 {BFD_RELOC_ARM_GOTPC
, R_ARM_GOTPC
},
2025 {BFD_RELOC_ARM_GOT_PREL
, R_ARM_GOT_PREL
},
2026 {BFD_RELOC_ARM_GOT32
, R_ARM_GOT32
},
2027 {BFD_RELOC_ARM_PLT32
, R_ARM_PLT32
},
2028 {BFD_RELOC_ARM_TARGET1
, R_ARM_TARGET1
},
2029 {BFD_RELOC_ARM_ROSEGREL32
, R_ARM_ROSEGREL32
},
2030 {BFD_RELOC_ARM_SBREL32
, R_ARM_SBREL32
},
2031 {BFD_RELOC_ARM_PREL31
, R_ARM_PREL31
},
2032 {BFD_RELOC_ARM_TARGET2
, R_ARM_TARGET2
},
2033 {BFD_RELOC_ARM_PLT32
, R_ARM_PLT32
},
2034 {BFD_RELOC_ARM_TLS_GOTDESC
, R_ARM_TLS_GOTDESC
},
2035 {BFD_RELOC_ARM_TLS_CALL
, R_ARM_TLS_CALL
},
2036 {BFD_RELOC_ARM_THM_TLS_CALL
, R_ARM_THM_TLS_CALL
},
2037 {BFD_RELOC_ARM_TLS_DESCSEQ
, R_ARM_TLS_DESCSEQ
},
2038 {BFD_RELOC_ARM_THM_TLS_DESCSEQ
, R_ARM_THM_TLS_DESCSEQ
},
2039 {BFD_RELOC_ARM_TLS_DESC
, R_ARM_TLS_DESC
},
2040 {BFD_RELOC_ARM_TLS_GD32
, R_ARM_TLS_GD32
},
2041 {BFD_RELOC_ARM_TLS_LDO32
, R_ARM_TLS_LDO32
},
2042 {BFD_RELOC_ARM_TLS_LDM32
, R_ARM_TLS_LDM32
},
2043 {BFD_RELOC_ARM_TLS_DTPMOD32
, R_ARM_TLS_DTPMOD32
},
2044 {BFD_RELOC_ARM_TLS_DTPOFF32
, R_ARM_TLS_DTPOFF32
},
2045 {BFD_RELOC_ARM_TLS_TPOFF32
, R_ARM_TLS_TPOFF32
},
2046 {BFD_RELOC_ARM_TLS_IE32
, R_ARM_TLS_IE32
},
2047 {BFD_RELOC_ARM_TLS_LE32
, R_ARM_TLS_LE32
},
2048 {BFD_RELOC_ARM_IRELATIVE
, R_ARM_IRELATIVE
},
2049 {BFD_RELOC_ARM_GOTFUNCDESC
, R_ARM_GOTFUNCDESC
},
2050 {BFD_RELOC_ARM_GOTOFFFUNCDESC
, R_ARM_GOTOFFFUNCDESC
},
2051 {BFD_RELOC_ARM_FUNCDESC
, R_ARM_FUNCDESC
},
2052 {BFD_RELOC_ARM_FUNCDESC_VALUE
, R_ARM_FUNCDESC_VALUE
},
2053 {BFD_RELOC_ARM_TLS_GD32_FDPIC
, R_ARM_TLS_GD32_FDPIC
},
2054 {BFD_RELOC_ARM_TLS_LDM32_FDPIC
, R_ARM_TLS_LDM32_FDPIC
},
2055 {BFD_RELOC_ARM_TLS_IE32_FDPIC
, R_ARM_TLS_IE32_FDPIC
},
2056 {BFD_RELOC_VTABLE_INHERIT
, R_ARM_GNU_VTINHERIT
},
2057 {BFD_RELOC_VTABLE_ENTRY
, R_ARM_GNU_VTENTRY
},
2058 {BFD_RELOC_ARM_MOVW
, R_ARM_MOVW_ABS_NC
},
2059 {BFD_RELOC_ARM_MOVT
, R_ARM_MOVT_ABS
},
2060 {BFD_RELOC_ARM_MOVW_PCREL
, R_ARM_MOVW_PREL_NC
},
2061 {BFD_RELOC_ARM_MOVT_PCREL
, R_ARM_MOVT_PREL
},
2062 {BFD_RELOC_ARM_THUMB_MOVW
, R_ARM_THM_MOVW_ABS_NC
},
2063 {BFD_RELOC_ARM_THUMB_MOVT
, R_ARM_THM_MOVT_ABS
},
2064 {BFD_RELOC_ARM_THUMB_MOVW_PCREL
, R_ARM_THM_MOVW_PREL_NC
},
2065 {BFD_RELOC_ARM_THUMB_MOVT_PCREL
, R_ARM_THM_MOVT_PREL
},
2066 {BFD_RELOC_ARM_ALU_PC_G0_NC
, R_ARM_ALU_PC_G0_NC
},
2067 {BFD_RELOC_ARM_ALU_PC_G0
, R_ARM_ALU_PC_G0
},
2068 {BFD_RELOC_ARM_ALU_PC_G1_NC
, R_ARM_ALU_PC_G1_NC
},
2069 {BFD_RELOC_ARM_ALU_PC_G1
, R_ARM_ALU_PC_G1
},
2070 {BFD_RELOC_ARM_ALU_PC_G2
, R_ARM_ALU_PC_G2
},
2071 {BFD_RELOC_ARM_LDR_PC_G0
, R_ARM_LDR_PC_G0
},
2072 {BFD_RELOC_ARM_LDR_PC_G1
, R_ARM_LDR_PC_G1
},
2073 {BFD_RELOC_ARM_LDR_PC_G2
, R_ARM_LDR_PC_G2
},
2074 {BFD_RELOC_ARM_LDRS_PC_G0
, R_ARM_LDRS_PC_G0
},
2075 {BFD_RELOC_ARM_LDRS_PC_G1
, R_ARM_LDRS_PC_G1
},
2076 {BFD_RELOC_ARM_LDRS_PC_G2
, R_ARM_LDRS_PC_G2
},
2077 {BFD_RELOC_ARM_LDC_PC_G0
, R_ARM_LDC_PC_G0
},
2078 {BFD_RELOC_ARM_LDC_PC_G1
, R_ARM_LDC_PC_G1
},
2079 {BFD_RELOC_ARM_LDC_PC_G2
, R_ARM_LDC_PC_G2
},
2080 {BFD_RELOC_ARM_ALU_SB_G0_NC
, R_ARM_ALU_SB_G0_NC
},
2081 {BFD_RELOC_ARM_ALU_SB_G0
, R_ARM_ALU_SB_G0
},
2082 {BFD_RELOC_ARM_ALU_SB_G1_NC
, R_ARM_ALU_SB_G1_NC
},
2083 {BFD_RELOC_ARM_ALU_SB_G1
, R_ARM_ALU_SB_G1
},
2084 {BFD_RELOC_ARM_ALU_SB_G2
, R_ARM_ALU_SB_G2
},
2085 {BFD_RELOC_ARM_LDR_SB_G0
, R_ARM_LDR_SB_G0
},
2086 {BFD_RELOC_ARM_LDR_SB_G1
, R_ARM_LDR_SB_G1
},
2087 {BFD_RELOC_ARM_LDR_SB_G2
, R_ARM_LDR_SB_G2
},
2088 {BFD_RELOC_ARM_LDRS_SB_G0
, R_ARM_LDRS_SB_G0
},
2089 {BFD_RELOC_ARM_LDRS_SB_G1
, R_ARM_LDRS_SB_G1
},
2090 {BFD_RELOC_ARM_LDRS_SB_G2
, R_ARM_LDRS_SB_G2
},
2091 {BFD_RELOC_ARM_LDC_SB_G0
, R_ARM_LDC_SB_G0
},
2092 {BFD_RELOC_ARM_LDC_SB_G1
, R_ARM_LDC_SB_G1
},
2093 {BFD_RELOC_ARM_LDC_SB_G2
, R_ARM_LDC_SB_G2
},
2094 {BFD_RELOC_ARM_V4BX
, R_ARM_V4BX
},
2095 {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC
, R_ARM_THM_ALU_ABS_G3_NC
},
2096 {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC
, R_ARM_THM_ALU_ABS_G2_NC
},
2097 {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC
, R_ARM_THM_ALU_ABS_G1_NC
},
2098 {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC
, R_ARM_THM_ALU_ABS_G0_NC
},
2099 {BFD_RELOC_ARM_THUMB_BF17
, R_ARM_THM_BF16
},
2100 {BFD_RELOC_ARM_THUMB_BF13
, R_ARM_THM_BF12
},
2101 {BFD_RELOC_ARM_THUMB_BF19
, R_ARM_THM_BF18
}
2104 static reloc_howto_type
*
2105 elf32_arm_reloc_type_lookup (bfd
*abfd ATTRIBUTE_UNUSED
,
2106 bfd_reloc_code_real_type code
)
2110 for (i
= 0; i
< ARRAY_SIZE (elf32_arm_reloc_map
); i
++)
2111 if (elf32_arm_reloc_map
[i
].bfd_reloc_val
== code
)
2112 return elf32_arm_howto_from_type (elf32_arm_reloc_map
[i
].elf_reloc_val
);
2117 static reloc_howto_type
*
2118 elf32_arm_reloc_name_lookup (bfd
*abfd ATTRIBUTE_UNUSED
,
2123 for (i
= 0; i
< ARRAY_SIZE (elf32_arm_howto_table_1
); i
++)
2124 if (elf32_arm_howto_table_1
[i
].name
!= NULL
2125 && strcasecmp (elf32_arm_howto_table_1
[i
].name
, r_name
) == 0)
2126 return &elf32_arm_howto_table_1
[i
];
2128 for (i
= 0; i
< ARRAY_SIZE (elf32_arm_howto_table_2
); i
++)
2129 if (elf32_arm_howto_table_2
[i
].name
!= NULL
2130 && strcasecmp (elf32_arm_howto_table_2
[i
].name
, r_name
) == 0)
2131 return &elf32_arm_howto_table_2
[i
];
2133 for (i
= 0; i
< ARRAY_SIZE (elf32_arm_howto_table_3
); i
++)
2134 if (elf32_arm_howto_table_3
[i
].name
!= NULL
2135 && strcasecmp (elf32_arm_howto_table_3
[i
].name
, r_name
) == 0)
2136 return &elf32_arm_howto_table_3
[i
];
2141 /* Support for core dump NOTE sections. */
2144 elf32_arm_nabi_grok_prstatus (bfd
*abfd
, Elf_Internal_Note
*note
)
2149 switch (note
->descsz
)
2154 case 148: /* Linux/ARM 32-bit. */
2156 elf_tdata (abfd
)->core
->signal
= bfd_get_16 (abfd
, note
->descdata
+ 12);
2159 elf_tdata (abfd
)->core
->lwpid
= bfd_get_32 (abfd
, note
->descdata
+ 24);
2168 /* Make a ".reg/999" section. */
2169 return _bfd_elfcore_make_pseudosection (abfd
, ".reg",
2170 size
, note
->descpos
+ offset
);
2174 elf32_arm_nabi_grok_psinfo (bfd
*abfd
, Elf_Internal_Note
*note
)
2176 switch (note
->descsz
)
2181 case 124: /* Linux/ARM elf_prpsinfo. */
2182 elf_tdata (abfd
)->core
->pid
2183 = bfd_get_32 (abfd
, note
->descdata
+ 12);
2184 elf_tdata (abfd
)->core
->program
2185 = _bfd_elfcore_strndup (abfd
, note
->descdata
+ 28, 16);
2186 elf_tdata (abfd
)->core
->command
2187 = _bfd_elfcore_strndup (abfd
, note
->descdata
+ 44, 80);
2190 /* Note that for some reason, a spurious space is tacked
2191 onto the end of the args in some (at least one anyway)
2192 implementations, so strip it off if it exists. */
2194 char *command
= elf_tdata (abfd
)->core
->command
;
2195 int n
= strlen (command
);
2197 if (0 < n
&& command
[n
- 1] == ' ')
2198 command
[n
- 1] = '\0';
2205 elf32_arm_nabi_write_core_note (bfd
*abfd
, char *buf
, int *bufsiz
,
2215 char data
[124] ATTRIBUTE_NONSTRING
;
2218 va_start (ap
, note_type
);
2219 memset (data
, 0, sizeof (data
));
2220 strncpy (data
+ 28, va_arg (ap
, const char *), 16);
2221 #if GCC_VERSION == 8000 || GCC_VERSION == 8001
2223 /* GCC 8.0 and 8.1 warn about 80 equals destination size with
2224 -Wstringop-truncation:
2225 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85643
2227 DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION
;
2229 strncpy (data
+ 44, va_arg (ap
, const char *), 80);
2230 #if GCC_VERSION == 8000 || GCC_VERSION == 8001
2235 return elfcore_write_note (abfd
, buf
, bufsiz
,
2236 "CORE", note_type
, data
, sizeof (data
));
2247 va_start (ap
, note_type
);
2248 memset (data
, 0, sizeof (data
));
2249 pid
= va_arg (ap
, long);
2250 bfd_put_32 (abfd
, pid
, data
+ 24);
2251 cursig
= va_arg (ap
, int);
2252 bfd_put_16 (abfd
, cursig
, data
+ 12);
2253 greg
= va_arg (ap
, const void *);
2254 memcpy (data
+ 72, greg
, 72);
2257 return elfcore_write_note (abfd
, buf
, bufsiz
,
2258 "CORE", note_type
, data
, sizeof (data
));
2263 #define TARGET_LITTLE_SYM arm_elf32_le_vec
2264 #define TARGET_LITTLE_NAME "elf32-littlearm"
2265 #define TARGET_BIG_SYM arm_elf32_be_vec
2266 #define TARGET_BIG_NAME "elf32-bigarm"
2268 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2269 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2270 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2272 typedef unsigned long int insn32
;
2273 typedef unsigned short int insn16
;
2275 /* In lieu of proper flags, assume all EABIv4 or later objects are
2277 #define INTERWORK_FLAG(abfd) \
2278 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2279 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2280 || ((abfd)->flags & BFD_LINKER_CREATED))
2282 /* The linker script knows the section names for placement.
2283 The entry_names are used to do simple name mangling on the stubs.
2284 Given a function name, and its type, the stub can be found. The
2285 name can be changed. The only requirement is the %s be present. */
2286 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2287 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2289 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2290 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2292 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2293 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2295 #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer"
2296 #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "__stm32l4xx_veneer_%x"
2298 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2299 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2301 #define STUB_ENTRY_NAME "__%s_veneer"
2303 #define CMSE_PREFIX "__acle_se_"
2305 #define CMSE_STUB_NAME ".gnu.sgstubs"
2307 /* The name of the dynamic interpreter. This is put in the .interp
2309 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2311 /* FDPIC default stack size. */
2312 #define DEFAULT_STACK_SIZE 0x8000
2314 static const unsigned long tls_trampoline
[] =
2316 0xe08e0000, /* add r0, lr, r0 */
2317 0xe5901004, /* ldr r1, [r0,#4] */
2318 0xe12fff11, /* bx r1 */
2321 static const unsigned long dl_tlsdesc_lazy_trampoline
[] =
2323 0xe52d2004, /* push {r2} */
2324 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2325 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2326 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2327 0xe081100f, /* 2: add r1, pc */
2328 0xe12fff12, /* bx r2 */
2329 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2330 + dl_tlsdesc_lazy_resolver(GOT) */
2331 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2334 /* NOTE: [Thumb nop sequence]
2335 When adding code that transitions from Thumb to Arm the instruction that
2336 should be used for the alignment padding should be 0xe7fd (b .-2) instead of
2337 a nop for performance reasons. */
2339 /* ARM FDPIC PLT entry. */
2340 /* The last 5 words contain PLT lazy fragment code and data. */
2341 static const bfd_vma elf32_arm_fdpic_plt_entry
[] =
2343 0xe59fc008, /* ldr r12, .L1 */
2344 0xe08cc009, /* add r12, r12, r9 */
2345 0xe59c9004, /* ldr r9, [r12, #4] */
2346 0xe59cf000, /* ldr pc, [r12] */
2347 0x00000000, /* L1. .word foo(GOTOFFFUNCDESC) */
2348 0x00000000, /* L1. .word foo(funcdesc_value_reloc_offset) */
2349 0xe51fc00c, /* ldr r12, [pc, #-12] */
2350 0xe92d1000, /* push {r12} */
2351 0xe599c004, /* ldr r12, [r9, #4] */
2352 0xe599f000, /* ldr pc, [r9] */
2355 /* Thumb FDPIC PLT entry. */
2356 /* The last 5 words contain PLT lazy fragment code and data. */
2357 static const bfd_vma elf32_arm_fdpic_thumb_plt_entry
[] =
2359 0xc00cf8df, /* ldr.w r12, .L1 */
2360 0x0c09eb0c, /* add.w r12, r12, r9 */
2361 0x9004f8dc, /* ldr.w r9, [r12, #4] */
2362 0xf000f8dc, /* ldr.w pc, [r12] */
2363 0x00000000, /* .L1 .word foo(GOTOFFFUNCDESC) */
2364 0x00000000, /* .L2 .word foo(funcdesc_value_reloc_offset) */
2365 0xc008f85f, /* ldr.w r12, .L2 */
2366 0xcd04f84d, /* push {r12} */
2367 0xc004f8d9, /* ldr.w r12, [r9, #4] */
2368 0xf000f8d9, /* ldr.w pc, [r9] */
2371 #ifdef FOUR_WORD_PLT
2373 /* The first entry in a procedure linkage table looks like
2374 this. It is set up so that any shared library function that is
2375 called before the relocation has been set up calls the dynamic
2377 static const bfd_vma elf32_arm_plt0_entry
[] =
2379 0xe52de004, /* str lr, [sp, #-4]! */
2380 0xe59fe010, /* ldr lr, [pc, #16] */
2381 0xe08fe00e, /* add lr, pc, lr */
2382 0xe5bef008, /* ldr pc, [lr, #8]! */
2385 /* Subsequent entries in a procedure linkage table look like
2387 static const bfd_vma elf32_arm_plt_entry
[] =
2389 0xe28fc600, /* add ip, pc, #NN */
2390 0xe28cca00, /* add ip, ip, #NN */
2391 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2392 0x00000000, /* unused */
2395 #else /* not FOUR_WORD_PLT */
2397 /* The first entry in a procedure linkage table looks like
2398 this. It is set up so that any shared library function that is
2399 called before the relocation has been set up calls the dynamic
2401 static const bfd_vma elf32_arm_plt0_entry
[] =
2403 0xe52de004, /* str lr, [sp, #-4]! */
2404 0xe59fe004, /* ldr lr, [pc, #4] */
2405 0xe08fe00e, /* add lr, pc, lr */
2406 0xe5bef008, /* ldr pc, [lr, #8]! */
2407 0x00000000, /* &GOT[0] - . */
2410 /* By default subsequent entries in a procedure linkage table look like
2411 this. Offsets that don't fit into 28 bits will cause link error. */
2412 static const bfd_vma elf32_arm_plt_entry_short
[] =
2414 0xe28fc600, /* add ip, pc, #0xNN00000 */
2415 0xe28cca00, /* add ip, ip, #0xNN000 */
2416 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2419 /* When explicitly asked, we'll use this "long" entry format
2420 which can cope with arbitrary displacements. */
2421 static const bfd_vma elf32_arm_plt_entry_long
[] =
2423 0xe28fc200, /* add ip, pc, #0xN0000000 */
2424 0xe28cc600, /* add ip, ip, #0xNN00000 */
2425 0xe28cca00, /* add ip, ip, #0xNN000 */
2426 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2429 static bfd_boolean elf32_arm_use_long_plt_entry
= FALSE
;
2431 #endif /* not FOUR_WORD_PLT */
2433 /* The first entry in a procedure linkage table looks like this.
2434 It is set up so that any shared library function that is called before the
2435 relocation has been set up calls the dynamic linker first. */
2436 static const bfd_vma elf32_thumb2_plt0_entry
[] =
2438 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2439 an instruction maybe encoded to one or two array elements. */
2440 0xf8dfb500, /* push {lr} */
2441 0x44fee008, /* ldr.w lr, [pc, #8] */
2443 0xff08f85e, /* ldr.w pc, [lr, #8]! */
2444 0x00000000, /* &GOT[0] - . */
2447 /* Subsequent entries in a procedure linkage table for thumb only target
2449 static const bfd_vma elf32_thumb2_plt_entry
[] =
2451 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2452 an instruction maybe encoded to one or two array elements. */
2453 0x0c00f240, /* movw ip, #0xNNNN */
2454 0x0c00f2c0, /* movt ip, #0xNNNN */
2455 0xf8dc44fc, /* add ip, pc */
2456 0xe7fcf000 /* ldr.w pc, [ip] */
2460 /* The format of the first entry in the procedure linkage table
2461 for a VxWorks executable. */
2462 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry
[] =
2464 0xe52dc008, /* str ip,[sp,#-8]! */
2465 0xe59fc000, /* ldr ip,[pc] */
2466 0xe59cf008, /* ldr pc,[ip,#8] */
2467 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2470 /* The format of subsequent entries in a VxWorks executable. */
2471 static const bfd_vma elf32_arm_vxworks_exec_plt_entry
[] =
2473 0xe59fc000, /* ldr ip,[pc] */
2474 0xe59cf000, /* ldr pc,[ip] */
2475 0x00000000, /* .long @got */
2476 0xe59fc000, /* ldr ip,[pc] */
2477 0xea000000, /* b _PLT */
2478 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2481 /* The format of entries in a VxWorks shared library. */
2482 static const bfd_vma elf32_arm_vxworks_shared_plt_entry
[] =
2484 0xe59fc000, /* ldr ip,[pc] */
2485 0xe79cf009, /* ldr pc,[ip,r9] */
2486 0x00000000, /* .long @got */
2487 0xe59fc000, /* ldr ip,[pc] */
2488 0xe599f008, /* ldr pc,[r9,#8] */
2489 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2492 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2493 #define PLT_THUMB_STUB_SIZE 4
2494 static const bfd_vma elf32_arm_plt_thumb_stub
[] =
2500 /* The entries in a PLT when using a DLL-based target with multiple
2502 static const bfd_vma elf32_arm_symbian_plt_entry
[] =
2504 0xe51ff004, /* ldr pc, [pc, #-4] */
2505 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2508 /* The first entry in a procedure linkage table looks like
2509 this. It is set up so that any shared library function that is
2510 called before the relocation has been set up calls the dynamic
2512 static const bfd_vma elf32_arm_nacl_plt0_entry
[] =
2515 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2516 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2517 0xe08cc00f, /* add ip, ip, pc */
2518 0xe52dc008, /* str ip, [sp, #-8]! */
2519 /* Second bundle: */
2520 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2521 0xe59cc000, /* ldr ip, [ip] */
2522 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2523 0xe12fff1c, /* bx ip */
2525 0xe320f000, /* nop */
2526 0xe320f000, /* nop */
2527 0xe320f000, /* nop */
2529 0xe50dc004, /* str ip, [sp, #-4] */
2530 /* Fourth bundle: */
2531 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2532 0xe59cc000, /* ldr ip, [ip] */
2533 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2534 0xe12fff1c, /* bx ip */
2536 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2538 /* Subsequent entries in a procedure linkage table look like this. */
2539 static const bfd_vma elf32_arm_nacl_plt_entry
[] =
2541 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2542 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2543 0xe08cc00f, /* add ip, ip, pc */
2544 0xea000000, /* b .Lplt_tail */
2547 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2548 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2549 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2550 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2551 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2552 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2553 #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4)
2554 #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4)
2564 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2565 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2566 is inserted in arm_build_one_stub(). */
2567 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2568 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2569 #define THUMB32_MOVT(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVT_ABS, 0}
2570 #define THUMB32_MOVW(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVW_ABS_NC, 0}
2571 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2572 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2573 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2574 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2579 enum stub_insn_type type
;
2580 unsigned int r_type
;
2584 /* See note [Thumb nop sequence] when adding a veneer. */
2586 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2587 to reach the stub if necessary. */
2588 static const insn_sequence elf32_arm_stub_long_branch_any_any
[] =
2590 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2591 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2594 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2596 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb
[] =
2598 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2599 ARM_INSN (0xe12fff1c), /* bx ip */
2600 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2603 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2604 static const insn_sequence elf32_arm_stub_long_branch_thumb_only
[] =
2606 THUMB16_INSN (0xb401), /* push {r0} */
2607 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2608 THUMB16_INSN (0x4684), /* mov ip, r0 */
2609 THUMB16_INSN (0xbc01), /* pop {r0} */
2610 THUMB16_INSN (0x4760), /* bx ip */
2611 THUMB16_INSN (0xbf00), /* nop */
2612 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2615 /* Thumb -> Thumb long branch stub in thumb2 encoding. Used on armv7. */
2616 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only
[] =
2618 THUMB32_INSN (0xf85ff000), /* ldr.w pc, [pc, #-0] */
2619 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(x) */
2622 /* Thumb -> Thumb long branch stub. Used for PureCode sections on Thumb2
2623 M-profile architectures. */
2624 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only_pure
[] =
2626 THUMB32_MOVW (0xf2400c00), /* mov.w ip, R_ARM_MOVW_ABS_NC */
2627 THUMB32_MOVT (0xf2c00c00), /* movt ip, R_ARM_MOVT_ABS << 16 */
2628 THUMB16_INSN (0x4760), /* bx ip */
2631 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2633 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb
[] =
2635 THUMB16_INSN (0x4778), /* bx pc */
2636 THUMB16_INSN (0xe7fd), /* b .-2 */
2637 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2638 ARM_INSN (0xe12fff1c), /* bx ip */
2639 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2642 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2644 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm
[] =
2646 THUMB16_INSN (0x4778), /* bx pc */
2647 THUMB16_INSN (0xe7fd), /* b .-2 */
2648 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2649 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2652 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2653 one, when the destination is close enough. */
2654 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm
[] =
2656 THUMB16_INSN (0x4778), /* bx pc */
2657 THUMB16_INSN (0xe7fd), /* b .-2 */
2658 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2661 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2662 blx to reach the stub if necessary. */
2663 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic
[] =
2665 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2666 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2667 DATA_WORD (0, R_ARM_REL32
, -4), /* dcd R_ARM_REL32(X-4) */
2670 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2671 blx to reach the stub if necessary. We can not add into pc;
2672 it is not guaranteed to mode switch (different in ARMv6 and
2674 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic
[] =
2676 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2677 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2678 ARM_INSN (0xe12fff1c), /* bx ip */
2679 DATA_WORD (0, R_ARM_REL32
, 0), /* dcd R_ARM_REL32(X) */
2682 /* V4T ARM -> ARM long branch stub, PIC. */
2683 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic
[] =
2685 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2686 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2687 ARM_INSN (0xe12fff1c), /* bx ip */
2688 DATA_WORD (0, R_ARM_REL32
, 0), /* dcd R_ARM_REL32(X) */
2691 /* V4T Thumb -> ARM long branch stub, PIC. */
2692 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic
[] =
2694 THUMB16_INSN (0x4778), /* bx pc */
2695 THUMB16_INSN (0xe7fd), /* b .-2 */
2696 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2697 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2698 DATA_WORD (0, R_ARM_REL32
, -4), /* dcd R_ARM_REL32(X) */
2701 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2703 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic
[] =
2705 THUMB16_INSN (0xb401), /* push {r0} */
2706 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2707 THUMB16_INSN (0x46fc), /* mov ip, pc */
2708 THUMB16_INSN (0x4484), /* add ip, r0 */
2709 THUMB16_INSN (0xbc01), /* pop {r0} */
2710 THUMB16_INSN (0x4760), /* bx ip */
2711 DATA_WORD (0, R_ARM_REL32
, 4), /* dcd R_ARM_REL32(X) */
2714 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2716 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic
[] =
2718 THUMB16_INSN (0x4778), /* bx pc */
2719 THUMB16_INSN (0xe7fd), /* b .-2 */
2720 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2721 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2722 ARM_INSN (0xe12fff1c), /* bx ip */
2723 DATA_WORD (0, R_ARM_REL32
, 0), /* dcd R_ARM_REL32(X) */
2726 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2727 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2728 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic
[] =
2730 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2731 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2732 DATA_WORD (0, R_ARM_REL32
, -4), /* dcd R_ARM_REL32(X-4) */
2735 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2736 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2737 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic
[] =
2739 THUMB16_INSN (0x4778), /* bx pc */
2740 THUMB16_INSN (0xe7fd), /* b .-2 */
2741 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2742 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2743 DATA_WORD (0, R_ARM_REL32
, -4), /* dcd R_ARM_REL32(X) */
2746 /* NaCl ARM -> ARM long branch stub. */
2747 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl
[] =
2749 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2750 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2751 ARM_INSN (0xe12fff1c), /* bx ip */
2752 ARM_INSN (0xe320f000), /* nop */
2753 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2754 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2755 DATA_WORD (0, R_ARM_NONE
, 0), /* .word 0 */
2756 DATA_WORD (0, R_ARM_NONE
, 0), /* .word 0 */
2759 /* NaCl ARM -> ARM long branch stub, PIC. */
2760 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic
[] =
2762 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2763 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2764 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2765 ARM_INSN (0xe12fff1c), /* bx ip */
2766 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2767 DATA_WORD (0, R_ARM_REL32
, 8), /* dcd R_ARM_REL32(X+8) */
2768 DATA_WORD (0, R_ARM_NONE
, 0), /* .word 0 */
2769 DATA_WORD (0, R_ARM_NONE
, 0), /* .word 0 */
2772 /* Stub used for transition to secure state (aka SG veneer). */
2773 static const insn_sequence elf32_arm_stub_cmse_branch_thumb_only
[] =
2775 THUMB32_INSN (0xe97fe97f), /* sg. */
2776 THUMB32_B_INSN (0xf000b800, -4), /* b.w original_branch_dest. */
2780 /* Cortex-A8 erratum-workaround stubs. */
2782 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2783 can't use a conditional branch to reach this stub). */
2785 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond
[] =
2787 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2788 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2789 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2792 /* Stub used for b.w and bl.w instructions. */
2794 static const insn_sequence elf32_arm_stub_a8_veneer_b
[] =
2796 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2799 static const insn_sequence elf32_arm_stub_a8_veneer_bl
[] =
2801 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2804 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2805 instruction (which switches to ARM mode) to point to this stub. Jump to the
2806 real destination using an ARM-mode branch. */
2808 static const insn_sequence elf32_arm_stub_a8_veneer_blx
[] =
2810 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2813 /* For each section group there can be a specially created linker section
2814 to hold the stubs for that group. The name of the stub section is based
2815 upon the name of another section within that group with the suffix below
2818 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2819 create what appeared to be a linker stub section when it actually
2820 contained user code/data. For example, consider this fragment:
2822 const char * stubborn_problems[] = { "np" };
2824 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2827 .data.rel.local.stubborn_problems
2829 This then causes problems in arm32_arm_build_stubs() as it triggers:
2831 // Ignore non-stub sections.
2832 if (!strstr (stub_sec->name, STUB_SUFFIX))
2835 And so the section would be ignored instead of being processed. Hence
2836 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2838 #define STUB_SUFFIX ".__stub"
2840 /* One entry per long/short branch stub defined above. */
2842 DEF_STUB(long_branch_any_any) \
2843 DEF_STUB(long_branch_v4t_arm_thumb) \
2844 DEF_STUB(long_branch_thumb_only) \
2845 DEF_STUB(long_branch_v4t_thumb_thumb) \
2846 DEF_STUB(long_branch_v4t_thumb_arm) \
2847 DEF_STUB(short_branch_v4t_thumb_arm) \
2848 DEF_STUB(long_branch_any_arm_pic) \
2849 DEF_STUB(long_branch_any_thumb_pic) \
2850 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2851 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2852 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2853 DEF_STUB(long_branch_thumb_only_pic) \
2854 DEF_STUB(long_branch_any_tls_pic) \
2855 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2856 DEF_STUB(long_branch_arm_nacl) \
2857 DEF_STUB(long_branch_arm_nacl_pic) \
2858 DEF_STUB(cmse_branch_thumb_only) \
2859 DEF_STUB(a8_veneer_b_cond) \
2860 DEF_STUB(a8_veneer_b) \
2861 DEF_STUB(a8_veneer_bl) \
2862 DEF_STUB(a8_veneer_blx) \
2863 DEF_STUB(long_branch_thumb2_only) \
2864 DEF_STUB(long_branch_thumb2_only_pure)
2866 #define DEF_STUB(x) arm_stub_##x,
2867 enum elf32_arm_stub_type
2875 /* Note the first a8_veneer type. */
2876 const unsigned arm_stub_a8_veneer_lwm
= arm_stub_a8_veneer_b_cond
;
2880 const insn_sequence
* template_sequence
;
2884 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2885 static const stub_def stub_definitions
[] =
2891 struct elf32_arm_stub_hash_entry
2893 /* Base hash table entry structure. */
2894 struct bfd_hash_entry root
;
2896 /* The stub section. */
2899 /* Offset within stub_sec of the beginning of this stub. */
2900 bfd_vma stub_offset
;
2902 /* Given the symbol's value and its section we can determine its final
2903 value when building the stubs (so the stub knows where to jump). */
2904 bfd_vma target_value
;
2905 asection
*target_section
;
2907 /* Same as above but for the source of the branch to the stub. Used for
2908 Cortex-A8 erratum workaround to patch it to branch to the stub. As
2909 such, source section does not need to be recorded since Cortex-A8 erratum
2910 workaround stubs are only generated when both source and target are in the
2912 bfd_vma source_value
;
2914 /* The instruction which caused this stub to be generated (only valid for
2915 Cortex-A8 erratum workaround stubs at present). */
2916 unsigned long orig_insn
;
2918 /* The stub type. */
2919 enum elf32_arm_stub_type stub_type
;
2920 /* Its encoding size in bytes. */
2923 const insn_sequence
*stub_template
;
2924 /* The size of the template (number of entries). */
2925 int stub_template_size
;
2927 /* The symbol table entry, if any, that this was derived from. */
2928 struct elf32_arm_link_hash_entry
*h
;
2930 /* Type of branch. */
2931 enum arm_st_branch_type branch_type
;
2933 /* Where this stub is being called from, or, in the case of combined
2934 stub sections, the first input section in the group. */
2937 /* The name for the local symbol at the start of this stub. The
2938 stub name in the hash table has to be unique; this does not, so
2939 it can be friendlier. */
2943 /* Used to build a map of a section. This is required for mixed-endian
2946 typedef struct elf32_elf_section_map
2951 elf32_arm_section_map
;
2953 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2957 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER
,
2958 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER
,
2959 VFP11_ERRATUM_ARM_VENEER
,
2960 VFP11_ERRATUM_THUMB_VENEER
2962 elf32_vfp11_erratum_type
;
2964 typedef struct elf32_vfp11_erratum_list
2966 struct elf32_vfp11_erratum_list
*next
;
2972 struct elf32_vfp11_erratum_list
*veneer
;
2973 unsigned int vfp_insn
;
2977 struct elf32_vfp11_erratum_list
*branch
;
2981 elf32_vfp11_erratum_type type
;
2983 elf32_vfp11_erratum_list
;
2985 /* Information about a STM32L4XX erratum veneer, or a branch to such a
2989 STM32L4XX_ERRATUM_BRANCH_TO_VENEER
,
2990 STM32L4XX_ERRATUM_VENEER
2992 elf32_stm32l4xx_erratum_type
;
2994 typedef struct elf32_stm32l4xx_erratum_list
2996 struct elf32_stm32l4xx_erratum_list
*next
;
3002 struct elf32_stm32l4xx_erratum_list
*veneer
;
3007 struct elf32_stm32l4xx_erratum_list
*branch
;
3011 elf32_stm32l4xx_erratum_type type
;
3013 elf32_stm32l4xx_erratum_list
;
3018 INSERT_EXIDX_CANTUNWIND_AT_END
3020 arm_unwind_edit_type
;
3022 /* A (sorted) list of edits to apply to an unwind table. */
3023 typedef struct arm_unwind_table_edit
3025 arm_unwind_edit_type type
;
3026 /* Note: we sometimes want to insert an unwind entry corresponding to a
3027 section different from the one we're currently writing out, so record the
3028 (text) section this edit relates to here. */
3029 asection
*linked_section
;
3031 struct arm_unwind_table_edit
*next
;
3033 arm_unwind_table_edit
;
3035 typedef struct _arm_elf_section_data
3037 /* Information about mapping symbols. */
3038 struct bfd_elf_section_data elf
;
3039 unsigned int mapcount
;
3040 unsigned int mapsize
;
3041 elf32_arm_section_map
*map
;
3042 /* Information about CPU errata. */
3043 unsigned int erratumcount
;
3044 elf32_vfp11_erratum_list
*erratumlist
;
3045 unsigned int stm32l4xx_erratumcount
;
3046 elf32_stm32l4xx_erratum_list
*stm32l4xx_erratumlist
;
3047 unsigned int additional_reloc_count
;
3048 /* Information about unwind tables. */
3051 /* Unwind info attached to a text section. */
3054 asection
*arm_exidx_sec
;
3057 /* Unwind info attached to an .ARM.exidx section. */
3060 arm_unwind_table_edit
*unwind_edit_list
;
3061 arm_unwind_table_edit
*unwind_edit_tail
;
3065 _arm_elf_section_data
;
3067 #define elf32_arm_section_data(sec) \
3068 ((_arm_elf_section_data *) elf_section_data (sec))
3070 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
3071 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
3072 so may be created multiple times: we use an array of these entries whilst
3073 relaxing which we can refresh easily, then create stubs for each potentially
3074 erratum-triggering instruction once we've settled on a solution. */
3076 struct a8_erratum_fix
3081 bfd_vma target_offset
;
3082 unsigned long orig_insn
;
3084 enum elf32_arm_stub_type stub_type
;
3085 enum arm_st_branch_type branch_type
;
3088 /* A table of relocs applied to branches which might trigger Cortex-A8
3091 struct a8_erratum_reloc
3094 bfd_vma destination
;
3095 struct elf32_arm_link_hash_entry
*hash
;
3096 const char *sym_name
;
3097 unsigned int r_type
;
3098 enum arm_st_branch_type branch_type
;
3099 bfd_boolean non_a8_stub
;
3102 /* The size of the thread control block. */
3105 /* ARM-specific information about a PLT entry, over and above the usual
3109 /* We reference count Thumb references to a PLT entry separately,
3110 so that we can emit the Thumb trampoline only if needed. */
3111 bfd_signed_vma thumb_refcount
;
3113 /* Some references from Thumb code may be eliminated by BL->BLX
3114 conversion, so record them separately. */
3115 bfd_signed_vma maybe_thumb_refcount
;
3117 /* How many of the recorded PLT accesses were from non-call relocations.
3118 This information is useful when deciding whether anything takes the
3119 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
3120 non-call references to the function should resolve directly to the
3121 real runtime target. */
3122 unsigned int noncall_refcount
;
3124 /* Since PLT entries have variable size if the Thumb prologue is
3125 used, we need to record the index into .got.plt instead of
3126 recomputing it from the PLT offset. */
3127 bfd_signed_vma got_offset
;
3130 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
3131 struct arm_local_iplt_info
3133 /* The information that is usually found in the generic ELF part of
3134 the hash table entry. */
3135 union gotplt_union root
;
3137 /* The information that is usually found in the ARM-specific part of
3138 the hash table entry. */
3139 struct arm_plt_info arm
;
3141 /* A list of all potential dynamic relocations against this symbol. */
3142 struct elf_dyn_relocs
*dyn_relocs
;
3145 /* Structure to handle FDPIC support for local functions. */
3146 struct fdpic_local
{
3147 unsigned int funcdesc_cnt
;
3148 unsigned int gotofffuncdesc_cnt
;
3149 int funcdesc_offset
;
3152 struct elf_arm_obj_tdata
3154 struct elf_obj_tdata root
;
3156 /* tls_type for each local got entry. */
3157 char *local_got_tls_type
;
3159 /* GOTPLT entries for TLS descriptors. */
3160 bfd_vma
*local_tlsdesc_gotent
;
3162 /* Information for local symbols that need entries in .iplt. */
3163 struct arm_local_iplt_info
**local_iplt
;
3165 /* Zero to warn when linking objects with incompatible enum sizes. */
3166 int no_enum_size_warning
;
3168 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
3169 int no_wchar_size_warning
;
3171 /* Maintains FDPIC counters and funcdesc info. */
3172 struct fdpic_local
*local_fdpic_cnts
;
3175 #define elf_arm_tdata(bfd) \
3176 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
3178 #define elf32_arm_local_got_tls_type(bfd) \
3179 (elf_arm_tdata (bfd)->local_got_tls_type)
3181 #define elf32_arm_local_tlsdesc_gotent(bfd) \
3182 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
3184 #define elf32_arm_local_iplt(bfd) \
3185 (elf_arm_tdata (bfd)->local_iplt)
3187 #define elf32_arm_local_fdpic_cnts(bfd) \
3188 (elf_arm_tdata (bfd)->local_fdpic_cnts)
3190 #define is_arm_elf(bfd) \
3191 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
3192 && elf_tdata (bfd) != NULL \
3193 && elf_object_id (bfd) == ARM_ELF_DATA)
3196 elf32_arm_mkobject (bfd
*abfd
)
3198 return bfd_elf_allocate_object (abfd
, sizeof (struct elf_arm_obj_tdata
),
3202 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
3204 /* Structure to handle FDPIC support for extern functions. */
3205 struct fdpic_global
{
3206 unsigned int gotofffuncdesc_cnt
;
3207 unsigned int gotfuncdesc_cnt
;
3208 unsigned int funcdesc_cnt
;
3209 int funcdesc_offset
;
3210 int gotfuncdesc_offset
;
3213 /* Arm ELF linker hash entry. */
3214 struct elf32_arm_link_hash_entry
3216 struct elf_link_hash_entry root
;
3218 /* ARM-specific PLT information. */
3219 struct arm_plt_info plt
;
3221 #define GOT_UNKNOWN 0
3222 #define GOT_NORMAL 1
3223 #define GOT_TLS_GD 2
3224 #define GOT_TLS_IE 4
3225 #define GOT_TLS_GDESC 8
3226 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
3227 unsigned int tls_type
: 8;
3229 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
3230 unsigned int is_iplt
: 1;
3232 unsigned int unused
: 23;
3234 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
3235 starting at the end of the jump table. */
3236 bfd_vma tlsdesc_got
;
3238 /* The symbol marking the real symbol location for exported thumb
3239 symbols with Arm stubs. */
3240 struct elf_link_hash_entry
*export_glue
;
3242 /* A pointer to the most recently used stub hash entry against this
3244 struct elf32_arm_stub_hash_entry
*stub_cache
;
3246 /* Counter for FDPIC relocations against this symbol. */
3247 struct fdpic_global fdpic_cnts
;
3250 /* Traverse an arm ELF linker hash table. */
3251 #define elf32_arm_link_hash_traverse(table, func, info) \
3252 (elf_link_hash_traverse \
3254 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
3257 /* Get the ARM elf linker hash table from a link_info structure. */
3258 #define elf32_arm_hash_table(info) \
3259 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
3260 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
3262 #define arm_stub_hash_lookup(table, string, create, copy) \
3263 ((struct elf32_arm_stub_hash_entry *) \
3264 bfd_hash_lookup ((table), (string), (create), (copy)))
3266 /* Array to keep track of which stub sections have been created, and
3267 information on stub grouping. */
3270 /* This is the section to which stubs in the group will be
3273 /* The stub section. */
3277 #define elf32_arm_compute_jump_table_size(htab) \
3278 ((htab)->next_tls_desc_index * 4)
3280 /* ARM ELF linker hash table. */
3281 struct elf32_arm_link_hash_table
3283 /* The main hash table. */
3284 struct elf_link_hash_table root
;
3286 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
3287 bfd_size_type thumb_glue_size
;
3289 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
3290 bfd_size_type arm_glue_size
;
3292 /* The size in bytes of section containing the ARMv4 BX veneers. */
3293 bfd_size_type bx_glue_size
;
3295 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
3296 veneer has been populated. */
3297 bfd_vma bx_glue_offset
[15];
3299 /* The size in bytes of the section containing glue for VFP11 erratum
3301 bfd_size_type vfp11_erratum_glue_size
;
3303 /* The size in bytes of the section containing glue for STM32L4XX erratum
3305 bfd_size_type stm32l4xx_erratum_glue_size
;
3307 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
3308 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
3309 elf32_arm_write_section(). */
3310 struct a8_erratum_fix
*a8_erratum_fixes
;
3311 unsigned int num_a8_erratum_fixes
;
3313 /* An arbitrary input BFD chosen to hold the glue sections. */
3314 bfd
* bfd_of_glue_owner
;
3316 /* Nonzero to output a BE8 image. */
3319 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
3320 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
3323 /* The relocation to use for R_ARM_TARGET2 relocations. */
3326 /* 0 = Ignore R_ARM_V4BX.
3327 1 = Convert BX to MOV PC.
3328 2 = Generate v4 interworing stubs. */
3331 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
3334 /* Whether we should fix the ARM1176 BLX immediate issue. */
3337 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
3340 /* What sort of code sequences we should look for which may trigger the
3341 VFP11 denorm erratum. */
3342 bfd_arm_vfp11_fix vfp11_fix
;
3344 /* Global counter for the number of fixes we have emitted. */
3345 int num_vfp11_fixes
;
3347 /* What sort of code sequences we should look for which may trigger the
3348 STM32L4XX erratum. */
3349 bfd_arm_stm32l4xx_fix stm32l4xx_fix
;
3351 /* Global counter for the number of fixes we have emitted. */
3352 int num_stm32l4xx_fixes
;
3354 /* Nonzero to force PIC branch veneers. */
3357 /* The number of bytes in the initial entry in the PLT. */
3358 bfd_size_type plt_header_size
;
3360 /* The number of bytes in the subsequent PLT etries. */
3361 bfd_size_type plt_entry_size
;
3363 /* True if the target uses REL relocations. */
3364 bfd_boolean use_rel
;
3366 /* Nonzero if import library must be a secure gateway import library
3367 as per ARMv8-M Security Extensions. */
3370 /* The import library whose symbols' address must remain stable in
3371 the import library generated. */
3374 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
3375 bfd_vma next_tls_desc_index
;
3377 /* How many R_ARM_TLS_DESC relocations were generated so far. */
3378 bfd_vma num_tls_desc
;
3380 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
3383 /* The offset into splt of the PLT entry for the TLS descriptor
3384 resolver. Special values are 0, if not necessary (or not found
3385 to be necessary yet), and -1 if needed but not determined
3387 bfd_vma dt_tlsdesc_plt
;
3389 /* The offset into sgot of the GOT entry used by the PLT entry
3391 bfd_vma dt_tlsdesc_got
;
3393 /* Offset in .plt section of tls_arm_trampoline. */
3394 bfd_vma tls_trampoline
;
3396 /* Data for R_ARM_TLS_LDM32/R_ARM_TLS_LDM32_FDPIC relocations. */
3399 bfd_signed_vma refcount
;
3403 /* Small local sym cache. */
3404 struct sym_cache sym_cache
;
3406 /* For convenience in allocate_dynrelocs. */
3409 /* The amount of space used by the reserved portion of the sgotplt
3410 section, plus whatever space is used by the jump slots. */
3411 bfd_vma sgotplt_jump_table_size
;
3413 /* The stub hash table. */
3414 struct bfd_hash_table stub_hash_table
;
3416 /* Linker stub bfd. */
3419 /* Linker call-backs. */
3420 asection
* (*add_stub_section
) (const char *, asection
*, asection
*,
3422 void (*layout_sections_again
) (void);
3424 /* Array to keep track of which stub sections have been created, and
3425 information on stub grouping. */
3426 struct map_stub
*stub_group
;
3428 /* Input stub section holding secure gateway veneers. */
3429 asection
*cmse_stub_sec
;
3431 /* Offset in cmse_stub_sec where new SG veneers (not in input import library)
3432 start to be allocated. */
3433 bfd_vma new_cmse_stub_offset
;
3435 /* Number of elements in stub_group. */
3436 unsigned int top_id
;
3438 /* Assorted information used by elf32_arm_size_stubs. */
3439 unsigned int bfd_count
;
3440 unsigned int top_index
;
3441 asection
**input_list
;
3443 /* True if the target system uses FDPIC. */
3446 /* Fixup section. Used for FDPIC. */
3450 /* Add an FDPIC read-only fixup. */
3452 arm_elf_add_rofixup (bfd
*output_bfd
, asection
*srofixup
, bfd_vma offset
)
3454 bfd_vma fixup_offset
;
3456 fixup_offset
= srofixup
->reloc_count
++ * 4;
3457 BFD_ASSERT (fixup_offset
< srofixup
->size
);
3458 bfd_put_32 (output_bfd
, offset
, srofixup
->contents
+ fixup_offset
);
3462 ctz (unsigned int mask
)
3464 #if GCC_VERSION >= 3004
3465 return __builtin_ctz (mask
);
3469 for (i
= 0; i
< 8 * sizeof (mask
); i
++)
3480 elf32_arm_popcount (unsigned int mask
)
3482 #if GCC_VERSION >= 3004
3483 return __builtin_popcount (mask
);
3488 for (i
= 0; i
< 8 * sizeof (mask
); i
++)
3498 static void elf32_arm_add_dynreloc (bfd
*output_bfd
, struct bfd_link_info
*info
,
3499 asection
*sreloc
, Elf_Internal_Rela
*rel
);
3502 arm_elf_fill_funcdesc(bfd
*output_bfd
,
3503 struct bfd_link_info
*info
,
3504 int *funcdesc_offset
,
3508 bfd_vma dynreloc_value
,
3511 if ((*funcdesc_offset
& 1) == 0)
3513 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (info
);
3514 asection
*sgot
= globals
->root
.sgot
;
3516 if (bfd_link_pic(info
))
3518 asection
*srelgot
= globals
->root
.srelgot
;
3519 Elf_Internal_Rela outrel
;
3521 outrel
.r_info
= ELF32_R_INFO (dynindx
, R_ARM_FUNCDESC_VALUE
);
3522 outrel
.r_offset
= sgot
->output_section
->vma
+ sgot
->output_offset
+ offset
;
3523 outrel
.r_addend
= 0;
3525 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
3526 bfd_put_32 (output_bfd
, addr
, sgot
->contents
+ offset
);
3527 bfd_put_32 (output_bfd
, seg
, sgot
->contents
+ offset
+ 4);
3531 struct elf_link_hash_entry
*hgot
= globals
->root
.hgot
;
3532 bfd_vma got_value
= hgot
->root
.u
.def
.value
3533 + hgot
->root
.u
.def
.section
->output_section
->vma
3534 + hgot
->root
.u
.def
.section
->output_offset
;
3536 arm_elf_add_rofixup(output_bfd
, globals
->srofixup
,
3537 sgot
->output_section
->vma
+ sgot
->output_offset
3539 arm_elf_add_rofixup(output_bfd
, globals
->srofixup
,
3540 sgot
->output_section
->vma
+ sgot
->output_offset
3542 bfd_put_32 (output_bfd
, dynreloc_value
, sgot
->contents
+ offset
);
3543 bfd_put_32 (output_bfd
, got_value
, sgot
->contents
+ offset
+ 4);
3545 *funcdesc_offset
|= 1;
3549 /* Create an entry in an ARM ELF linker hash table. */
3551 static struct bfd_hash_entry
*
3552 elf32_arm_link_hash_newfunc (struct bfd_hash_entry
* entry
,
3553 struct bfd_hash_table
* table
,
3554 const char * string
)
3556 struct elf32_arm_link_hash_entry
* ret
=
3557 (struct elf32_arm_link_hash_entry
*) entry
;
3559 /* Allocate the structure if it has not already been allocated by a
3562 ret
= (struct elf32_arm_link_hash_entry
*)
3563 bfd_hash_allocate (table
, sizeof (struct elf32_arm_link_hash_entry
));
3565 return (struct bfd_hash_entry
*) ret
;
3567 /* Call the allocation method of the superclass. */
3568 ret
= ((struct elf32_arm_link_hash_entry
*)
3569 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry
*) ret
,
3573 ret
->tls_type
= GOT_UNKNOWN
;
3574 ret
->tlsdesc_got
= (bfd_vma
) -1;
3575 ret
->plt
.thumb_refcount
= 0;
3576 ret
->plt
.maybe_thumb_refcount
= 0;
3577 ret
->plt
.noncall_refcount
= 0;
3578 ret
->plt
.got_offset
= -1;
3579 ret
->is_iplt
= FALSE
;
3580 ret
->export_glue
= NULL
;
3582 ret
->stub_cache
= NULL
;
3584 ret
->fdpic_cnts
.gotofffuncdesc_cnt
= 0;
3585 ret
->fdpic_cnts
.gotfuncdesc_cnt
= 0;
3586 ret
->fdpic_cnts
.funcdesc_cnt
= 0;
3587 ret
->fdpic_cnts
.funcdesc_offset
= -1;
3588 ret
->fdpic_cnts
.gotfuncdesc_offset
= -1;
3591 return (struct bfd_hash_entry
*) ret
;
3594 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3598 elf32_arm_allocate_local_sym_info (bfd
*abfd
)
3600 if (elf_local_got_refcounts (abfd
) == NULL
)
3602 bfd_size_type num_syms
;
3606 num_syms
= elf_tdata (abfd
)->symtab_hdr
.sh_info
;
3607 size
= num_syms
* (sizeof (bfd_signed_vma
)
3608 + sizeof (struct arm_local_iplt_info
*)
3611 + sizeof (struct fdpic_local
));
3612 data
= bfd_zalloc (abfd
, size
);
3616 elf32_arm_local_fdpic_cnts (abfd
) = (struct fdpic_local
*) data
;
3617 data
+= num_syms
* sizeof (struct fdpic_local
);
3619 elf_local_got_refcounts (abfd
) = (bfd_signed_vma
*) data
;
3620 data
+= num_syms
* sizeof (bfd_signed_vma
);
3622 elf32_arm_local_iplt (abfd
) = (struct arm_local_iplt_info
**) data
;
3623 data
+= num_syms
* sizeof (struct arm_local_iplt_info
*);
3625 elf32_arm_local_tlsdesc_gotent (abfd
) = (bfd_vma
*) data
;
3626 data
+= num_syms
* sizeof (bfd_vma
);
3628 elf32_arm_local_got_tls_type (abfd
) = data
;
3633 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3634 to input bfd ABFD. Create the information if it doesn't already exist.
3635 Return null if an allocation fails. */
3637 static struct arm_local_iplt_info
*
3638 elf32_arm_create_local_iplt (bfd
*abfd
, unsigned long r_symndx
)
3640 struct arm_local_iplt_info
**ptr
;
3642 if (!elf32_arm_allocate_local_sym_info (abfd
))
3645 BFD_ASSERT (r_symndx
< elf_tdata (abfd
)->symtab_hdr
.sh_info
);
3646 ptr
= &elf32_arm_local_iplt (abfd
)[r_symndx
];
3648 *ptr
= bfd_zalloc (abfd
, sizeof (**ptr
));
3652 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3653 in ABFD's symbol table. If the symbol is global, H points to its
3654 hash table entry, otherwise H is null.
3656 Return true if the symbol does have PLT information. When returning
3657 true, point *ROOT_PLT at the target-independent reference count/offset
3658 union and *ARM_PLT at the ARM-specific information. */
3661 elf32_arm_get_plt_info (bfd
*abfd
, struct elf32_arm_link_hash_table
*globals
,
3662 struct elf32_arm_link_hash_entry
*h
,
3663 unsigned long r_symndx
, union gotplt_union
**root_plt
,
3664 struct arm_plt_info
**arm_plt
)
3666 struct arm_local_iplt_info
*local_iplt
;
3668 if (globals
->root
.splt
== NULL
&& globals
->root
.iplt
== NULL
)
3673 *root_plt
= &h
->root
.plt
;
3678 if (elf32_arm_local_iplt (abfd
) == NULL
)
3681 local_iplt
= elf32_arm_local_iplt (abfd
)[r_symndx
];
3682 if (local_iplt
== NULL
)
3685 *root_plt
= &local_iplt
->root
;
3686 *arm_plt
= &local_iplt
->arm
;
3690 static bfd_boolean
using_thumb_only (struct elf32_arm_link_hash_table
*globals
);
3692 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3696 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info
*info
,
3697 struct arm_plt_info
*arm_plt
)
3699 struct elf32_arm_link_hash_table
*htab
;
3701 htab
= elf32_arm_hash_table (info
);
3703 return (!using_thumb_only(htab
) && (arm_plt
->thumb_refcount
!= 0
3704 || (!htab
->use_blx
&& arm_plt
->maybe_thumb_refcount
!= 0)));
3707 /* Return a pointer to the head of the dynamic reloc list that should
3708 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3709 ABFD's symbol table. Return null if an error occurs. */
3711 static struct elf_dyn_relocs
**
3712 elf32_arm_get_local_dynreloc_list (bfd
*abfd
, unsigned long r_symndx
,
3713 Elf_Internal_Sym
*isym
)
3715 if (ELF32_ST_TYPE (isym
->st_info
) == STT_GNU_IFUNC
)
3717 struct arm_local_iplt_info
*local_iplt
;
3719 local_iplt
= elf32_arm_create_local_iplt (abfd
, r_symndx
);
3720 if (local_iplt
== NULL
)
3722 return &local_iplt
->dyn_relocs
;
3726 /* Track dynamic relocs needed for local syms too.
3727 We really need local syms available to do this
3732 s
= bfd_section_from_elf_index (abfd
, isym
->st_shndx
);
3736 vpp
= &elf_section_data (s
)->local_dynrel
;
3737 return (struct elf_dyn_relocs
**) vpp
;
3741 /* Initialize an entry in the stub hash table. */
3743 static struct bfd_hash_entry
*
3744 stub_hash_newfunc (struct bfd_hash_entry
*entry
,
3745 struct bfd_hash_table
*table
,
3748 /* Allocate the structure if it has not already been allocated by a
3752 entry
= (struct bfd_hash_entry
*)
3753 bfd_hash_allocate (table
, sizeof (struct elf32_arm_stub_hash_entry
));
3758 /* Call the allocation method of the superclass. */
3759 entry
= bfd_hash_newfunc (entry
, table
, string
);
3762 struct elf32_arm_stub_hash_entry
*eh
;
3764 /* Initialize the local fields. */
3765 eh
= (struct elf32_arm_stub_hash_entry
*) entry
;
3766 eh
->stub_sec
= NULL
;
3767 eh
->stub_offset
= (bfd_vma
) -1;
3768 eh
->source_value
= 0;
3769 eh
->target_value
= 0;
3770 eh
->target_section
= NULL
;
3772 eh
->stub_type
= arm_stub_none
;
3774 eh
->stub_template
= NULL
;
3775 eh
->stub_template_size
= -1;
3778 eh
->output_name
= NULL
;
3784 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3785 shortcuts to them in our hash table. */
3788 create_got_section (bfd
*dynobj
, struct bfd_link_info
*info
)
3790 struct elf32_arm_link_hash_table
*htab
;
3792 htab
= elf32_arm_hash_table (info
);
3796 /* BPABI objects never have a GOT, or associated sections. */
3797 if (htab
->root
.target_os
== is_symbian
)
3800 if (! _bfd_elf_create_got_section (dynobj
, info
))
3803 /* Also create .rofixup. */
3806 htab
->srofixup
= bfd_make_section_with_flags (dynobj
, ".rofixup",
3807 (SEC_ALLOC
| SEC_LOAD
| SEC_HAS_CONTENTS
3808 | SEC_IN_MEMORY
| SEC_LINKER_CREATED
| SEC_READONLY
));
3809 if (htab
->srofixup
== NULL
3810 || !bfd_set_section_alignment (htab
->srofixup
, 2))
3817 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3820 create_ifunc_sections (struct bfd_link_info
*info
)
3822 struct elf32_arm_link_hash_table
*htab
;
3823 const struct elf_backend_data
*bed
;
3828 htab
= elf32_arm_hash_table (info
);
3829 dynobj
= htab
->root
.dynobj
;
3830 bed
= get_elf_backend_data (dynobj
);
3831 flags
= bed
->dynamic_sec_flags
;
3833 if (htab
->root
.iplt
== NULL
)
3835 s
= bfd_make_section_anyway_with_flags (dynobj
, ".iplt",
3836 flags
| SEC_READONLY
| SEC_CODE
);
3838 || !bfd_set_section_alignment (s
, bed
->plt_alignment
))
3840 htab
->root
.iplt
= s
;
3843 if (htab
->root
.irelplt
== NULL
)
3845 s
= bfd_make_section_anyway_with_flags (dynobj
,
3846 RELOC_SECTION (htab
, ".iplt"),
3847 flags
| SEC_READONLY
);
3849 || !bfd_set_section_alignment (s
, bed
->s
->log_file_align
))
3851 htab
->root
.irelplt
= s
;
3854 if (htab
->root
.igotplt
== NULL
)
3856 s
= bfd_make_section_anyway_with_flags (dynobj
, ".igot.plt", flags
);
3858 || !bfd_set_section_alignment (s
, bed
->s
->log_file_align
))
3860 htab
->root
.igotplt
= s
;
3865 /* Determine if we're dealing with a Thumb only architecture. */
3868 using_thumb_only (struct elf32_arm_link_hash_table
*globals
)
3871 int profile
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
3872 Tag_CPU_arch_profile
);
3875 return profile
== 'M';
3877 arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
3879 /* Force return logic to be reviewed for each new architecture. */
3880 BFD_ASSERT (arch
<= TAG_CPU_ARCH_V8_1M_MAIN
);
3882 if (arch
== TAG_CPU_ARCH_V6_M
3883 || arch
== TAG_CPU_ARCH_V6S_M
3884 || arch
== TAG_CPU_ARCH_V7E_M
3885 || arch
== TAG_CPU_ARCH_V8M_BASE
3886 || arch
== TAG_CPU_ARCH_V8M_MAIN
3887 || arch
== TAG_CPU_ARCH_V8_1M_MAIN
)
3893 /* Determine if we're dealing with a Thumb-2 object. */
3896 using_thumb2 (struct elf32_arm_link_hash_table
*globals
)
3899 int thumb_isa
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
3903 return thumb_isa
== 2;
3905 arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
3907 /* Force return logic to be reviewed for each new architecture. */
3908 BFD_ASSERT (arch
<= TAG_CPU_ARCH_V8_1M_MAIN
);
3910 return (arch
== TAG_CPU_ARCH_V6T2
3911 || arch
== TAG_CPU_ARCH_V7
3912 || arch
== TAG_CPU_ARCH_V7E_M
3913 || arch
== TAG_CPU_ARCH_V8
3914 || arch
== TAG_CPU_ARCH_V8R
3915 || arch
== TAG_CPU_ARCH_V8M_MAIN
3916 || arch
== TAG_CPU_ARCH_V8_1M_MAIN
);
3919 /* Determine whether Thumb-2 BL instruction is available. */
3922 using_thumb2_bl (struct elf32_arm_link_hash_table
*globals
)
3925 bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
3927 /* Force return logic to be reviewed for each new architecture. */
3928 BFD_ASSERT (arch
<= TAG_CPU_ARCH_V8_1M_MAIN
);
3930 /* Architecture was introduced after ARMv6T2 (eg. ARMv6-M). */
3931 return (arch
== TAG_CPU_ARCH_V6T2
3932 || arch
>= TAG_CPU_ARCH_V7
);
3935 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3936 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3940 elf32_arm_create_dynamic_sections (bfd
*dynobj
, struct bfd_link_info
*info
)
3942 struct elf32_arm_link_hash_table
*htab
;
3944 htab
= elf32_arm_hash_table (info
);
3948 if (!htab
->root
.sgot
&& !create_got_section (dynobj
, info
))
3951 if (!_bfd_elf_create_dynamic_sections (dynobj
, info
))
3954 if (htab
->root
.target_os
== is_vxworks
)
3956 if (!elf_vxworks_create_dynamic_sections (dynobj
, info
, &htab
->srelplt2
))
3959 if (bfd_link_pic (info
))
3961 htab
->plt_header_size
= 0;
3962 htab
->plt_entry_size
3963 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry
);
3967 htab
->plt_header_size
3968 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry
);
3969 htab
->plt_entry_size
3970 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry
);
3973 if (elf_elfheader (dynobj
))
3974 elf_elfheader (dynobj
)->e_ident
[EI_CLASS
] = ELFCLASS32
;
3979 Test for thumb only architectures. Note - we cannot just call
3980 using_thumb_only() as the attributes in the output bfd have not been
3981 initialised at this point, so instead we use the input bfd. */
3982 bfd
* saved_obfd
= htab
->obfd
;
3984 htab
->obfd
= dynobj
;
3985 if (using_thumb_only (htab
))
3987 htab
->plt_header_size
= 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry
);
3988 htab
->plt_entry_size
= 4 * ARRAY_SIZE (elf32_thumb2_plt_entry
);
3990 htab
->obfd
= saved_obfd
;
3993 if (htab
->fdpic_p
) {
3994 htab
->plt_header_size
= 0;
3995 if (info
->flags
& DF_BIND_NOW
)
3996 htab
->plt_entry_size
= 4 * (ARRAY_SIZE(elf32_arm_fdpic_plt_entry
) - 5);
3998 htab
->plt_entry_size
= 4 * ARRAY_SIZE(elf32_arm_fdpic_plt_entry
);
4001 if (!htab
->root
.splt
4002 || !htab
->root
.srelplt
4003 || !htab
->root
.sdynbss
4004 || (!bfd_link_pic (info
) && !htab
->root
.srelbss
))
4010 /* Copy the extra info we tack onto an elf_link_hash_entry. */
4013 elf32_arm_copy_indirect_symbol (struct bfd_link_info
*info
,
4014 struct elf_link_hash_entry
*dir
,
4015 struct elf_link_hash_entry
*ind
)
4017 struct elf32_arm_link_hash_entry
*edir
, *eind
;
4019 edir
= (struct elf32_arm_link_hash_entry
*) dir
;
4020 eind
= (struct elf32_arm_link_hash_entry
*) ind
;
4022 if (ind
->root
.type
== bfd_link_hash_indirect
)
4024 /* Copy over PLT info. */
4025 edir
->plt
.thumb_refcount
+= eind
->plt
.thumb_refcount
;
4026 eind
->plt
.thumb_refcount
= 0;
4027 edir
->plt
.maybe_thumb_refcount
+= eind
->plt
.maybe_thumb_refcount
;
4028 eind
->plt
.maybe_thumb_refcount
= 0;
4029 edir
->plt
.noncall_refcount
+= eind
->plt
.noncall_refcount
;
4030 eind
->plt
.noncall_refcount
= 0;
4032 /* Copy FDPIC counters. */
4033 edir
->fdpic_cnts
.gotofffuncdesc_cnt
+= eind
->fdpic_cnts
.gotofffuncdesc_cnt
;
4034 edir
->fdpic_cnts
.gotfuncdesc_cnt
+= eind
->fdpic_cnts
.gotfuncdesc_cnt
;
4035 edir
->fdpic_cnts
.funcdesc_cnt
+= eind
->fdpic_cnts
.funcdesc_cnt
;
4037 /* We should only allocate a function to .iplt once the final
4038 symbol information is known. */
4039 BFD_ASSERT (!eind
->is_iplt
);
4041 if (dir
->got
.refcount
<= 0)
4043 edir
->tls_type
= eind
->tls_type
;
4044 eind
->tls_type
= GOT_UNKNOWN
;
4048 _bfd_elf_link_hash_copy_indirect (info
, dir
, ind
);
4051 /* Destroy an ARM elf linker hash table. */
4054 elf32_arm_link_hash_table_free (bfd
*obfd
)
4056 struct elf32_arm_link_hash_table
*ret
4057 = (struct elf32_arm_link_hash_table
*) obfd
->link
.hash
;
4059 bfd_hash_table_free (&ret
->stub_hash_table
);
4060 _bfd_elf_link_hash_table_free (obfd
);
4063 /* Create an ARM elf linker hash table. */
4065 static struct bfd_link_hash_table
*
4066 elf32_arm_link_hash_table_create (bfd
*abfd
)
4068 struct elf32_arm_link_hash_table
*ret
;
4069 size_t amt
= sizeof (struct elf32_arm_link_hash_table
);
4071 ret
= (struct elf32_arm_link_hash_table
*) bfd_zmalloc (amt
);
4075 if (!_bfd_elf_link_hash_table_init (& ret
->root
, abfd
,
4076 elf32_arm_link_hash_newfunc
,
4077 sizeof (struct elf32_arm_link_hash_entry
),
4084 ret
->vfp11_fix
= BFD_ARM_VFP11_FIX_NONE
;
4085 ret
->stm32l4xx_fix
= BFD_ARM_STM32L4XX_FIX_NONE
;
4086 #ifdef FOUR_WORD_PLT
4087 ret
->plt_header_size
= 16;
4088 ret
->plt_entry_size
= 16;
4090 ret
->plt_header_size
= 20;
4091 ret
->plt_entry_size
= elf32_arm_use_long_plt_entry
? 16 : 12;
4093 ret
->use_rel
= TRUE
;
4097 if (!bfd_hash_table_init (&ret
->stub_hash_table
, stub_hash_newfunc
,
4098 sizeof (struct elf32_arm_stub_hash_entry
)))
4100 _bfd_elf_link_hash_table_free (abfd
);
4103 ret
->root
.root
.hash_table_free
= elf32_arm_link_hash_table_free
;
4105 return &ret
->root
.root
;
4108 /* Determine what kind of NOPs are available. */
4111 arch_has_arm_nop (struct elf32_arm_link_hash_table
*globals
)
4113 const int arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
4116 /* Force return logic to be reviewed for each new architecture. */
4117 BFD_ASSERT (arch
<= TAG_CPU_ARCH_V8_1M_MAIN
);
4119 return (arch
== TAG_CPU_ARCH_V6T2
4120 || arch
== TAG_CPU_ARCH_V6K
4121 || arch
== TAG_CPU_ARCH_V7
4122 || arch
== TAG_CPU_ARCH_V8
4123 || arch
== TAG_CPU_ARCH_V8R
);
4127 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type
)
4131 case arm_stub_long_branch_thumb_only
:
4132 case arm_stub_long_branch_thumb2_only
:
4133 case arm_stub_long_branch_thumb2_only_pure
:
4134 case arm_stub_long_branch_v4t_thumb_arm
:
4135 case arm_stub_short_branch_v4t_thumb_arm
:
4136 case arm_stub_long_branch_v4t_thumb_arm_pic
:
4137 case arm_stub_long_branch_v4t_thumb_tls_pic
:
4138 case arm_stub_long_branch_thumb_only_pic
:
4139 case arm_stub_cmse_branch_thumb_only
:
4150 /* Determine the type of stub needed, if any, for a call. */
4152 static enum elf32_arm_stub_type
4153 arm_type_of_stub (struct bfd_link_info
*info
,
4154 asection
*input_sec
,
4155 const Elf_Internal_Rela
*rel
,
4156 unsigned char st_type
,
4157 enum arm_st_branch_type
*actual_branch_type
,
4158 struct elf32_arm_link_hash_entry
*hash
,
4159 bfd_vma destination
,
4165 bfd_signed_vma branch_offset
;
4166 unsigned int r_type
;
4167 struct elf32_arm_link_hash_table
* globals
;
4168 bfd_boolean thumb2
, thumb2_bl
, thumb_only
;
4169 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
4171 enum arm_st_branch_type branch_type
= *actual_branch_type
;
4172 union gotplt_union
*root_plt
;
4173 struct arm_plt_info
*arm_plt
;
4177 if (branch_type
== ST_BRANCH_LONG
)
4180 globals
= elf32_arm_hash_table (info
);
4181 if (globals
== NULL
)
4184 thumb_only
= using_thumb_only (globals
);
4185 thumb2
= using_thumb2 (globals
);
4186 thumb2_bl
= using_thumb2_bl (globals
);
4188 arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
4190 /* True for architectures that implement the thumb2 movw instruction. */
4191 thumb2_movw
= thumb2
|| (arch
== TAG_CPU_ARCH_V8M_BASE
);
4193 /* Determine where the call point is. */
4194 location
= (input_sec
->output_offset
4195 + input_sec
->output_section
->vma
4198 r_type
= ELF32_R_TYPE (rel
->r_info
);
4200 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
4201 are considering a function call relocation. */
4202 if (thumb_only
&& (r_type
== R_ARM_THM_CALL
|| r_type
== R_ARM_THM_JUMP24
4203 || r_type
== R_ARM_THM_JUMP19
)
4204 && branch_type
== ST_BRANCH_TO_ARM
)
4205 branch_type
= ST_BRANCH_TO_THUMB
;
4207 /* For TLS call relocs, it is the caller's responsibility to provide
4208 the address of the appropriate trampoline. */
4209 if (r_type
!= R_ARM_TLS_CALL
4210 && r_type
!= R_ARM_THM_TLS_CALL
4211 && elf32_arm_get_plt_info (input_bfd
, globals
, hash
,
4212 ELF32_R_SYM (rel
->r_info
), &root_plt
,
4214 && root_plt
->offset
!= (bfd_vma
) -1)
4218 if (hash
== NULL
|| hash
->is_iplt
)
4219 splt
= globals
->root
.iplt
;
4221 splt
= globals
->root
.splt
;
4226 /* Note when dealing with PLT entries: the main PLT stub is in
4227 ARM mode, so if the branch is in Thumb mode, another
4228 Thumb->ARM stub will be inserted later just before the ARM
4229 PLT stub. If a long branch stub is needed, we'll add a
4230 Thumb->Arm one and branch directly to the ARM PLT entry.
4231 Here, we have to check if a pre-PLT Thumb->ARM stub
4232 is needed and if it will be close enough. */
4234 destination
= (splt
->output_section
->vma
4235 + splt
->output_offset
4236 + root_plt
->offset
);
4239 /* Thumb branch/call to PLT: it can become a branch to ARM
4240 or to Thumb. We must perform the same checks and
4241 corrections as in elf32_arm_final_link_relocate. */
4242 if ((r_type
== R_ARM_THM_CALL
)
4243 || (r_type
== R_ARM_THM_JUMP24
))
4245 if (globals
->use_blx
4246 && r_type
== R_ARM_THM_CALL
4249 /* If the Thumb BLX instruction is available, convert
4250 the BL to a BLX instruction to call the ARM-mode
4252 branch_type
= ST_BRANCH_TO_ARM
;
4257 /* Target the Thumb stub before the ARM PLT entry. */
4258 destination
-= PLT_THUMB_STUB_SIZE
;
4259 branch_type
= ST_BRANCH_TO_THUMB
;
4264 branch_type
= ST_BRANCH_TO_ARM
;
4268 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
4269 BFD_ASSERT (st_type
!= STT_GNU_IFUNC
);
4271 branch_offset
= (bfd_signed_vma
)(destination
- location
);
4273 if (r_type
== R_ARM_THM_CALL
|| r_type
== R_ARM_THM_JUMP24
4274 || r_type
== R_ARM_THM_TLS_CALL
|| r_type
== R_ARM_THM_JUMP19
)
4276 /* Handle cases where:
4277 - this call goes too far (different Thumb/Thumb2 max
4279 - it's a Thumb->Arm call and blx is not available, or it's a
4280 Thumb->Arm branch (not bl). A stub is needed in this case,
4281 but only if this call is not through a PLT entry. Indeed,
4282 PLT stubs handle mode switching already. */
4284 && (branch_offset
> THM_MAX_FWD_BRANCH_OFFSET
4285 || (branch_offset
< THM_MAX_BWD_BRANCH_OFFSET
)))
4287 && (branch_offset
> THM2_MAX_FWD_BRANCH_OFFSET
4288 || (branch_offset
< THM2_MAX_BWD_BRANCH_OFFSET
)))
4290 && (branch_offset
> THM2_MAX_FWD_COND_BRANCH_OFFSET
4291 || (branch_offset
< THM2_MAX_BWD_COND_BRANCH_OFFSET
))
4292 && (r_type
== R_ARM_THM_JUMP19
))
4293 || (branch_type
== ST_BRANCH_TO_ARM
4294 && (((r_type
== R_ARM_THM_CALL
4295 || r_type
== R_ARM_THM_TLS_CALL
) && !globals
->use_blx
)
4296 || (r_type
== R_ARM_THM_JUMP24
)
4297 || (r_type
== R_ARM_THM_JUMP19
))
4300 /* If we need to insert a Thumb-Thumb long branch stub to a
4301 PLT, use one that branches directly to the ARM PLT
4302 stub. If we pretended we'd use the pre-PLT Thumb->ARM
4303 stub, undo this now. */
4304 if ((branch_type
== ST_BRANCH_TO_THUMB
) && use_plt
&& !thumb_only
)
4306 branch_type
= ST_BRANCH_TO_ARM
;
4307 branch_offset
+= PLT_THUMB_STUB_SIZE
;
4310 if (branch_type
== ST_BRANCH_TO_THUMB
)
4312 /* Thumb to thumb. */
4315 if (input_sec
->flags
& SEC_ELF_PURECODE
)
4317 (_("%pB(%pA): warning: long branch veneers used in"
4318 " section with SHF_ARM_PURECODE section"
4319 " attribute is only supported for M-profile"
4320 " targets that implement the movw instruction"),
4321 input_bfd
, input_sec
);
4323 stub_type
= (bfd_link_pic (info
) | globals
->pic_veneer
)
4325 ? ((globals
->use_blx
4326 && (r_type
== R_ARM_THM_CALL
))
4327 /* V5T and above. Stub starts with ARM code, so
4328 we must be able to switch mode before
4329 reaching it, which is only possible for 'bl'
4330 (ie R_ARM_THM_CALL relocation). */
4331 ? arm_stub_long_branch_any_thumb_pic
4332 /* On V4T, use Thumb code only. */
4333 : arm_stub_long_branch_v4t_thumb_thumb_pic
)
4335 /* non-PIC stubs. */
4336 : ((globals
->use_blx
4337 && (r_type
== R_ARM_THM_CALL
))
4338 /* V5T and above. */
4339 ? arm_stub_long_branch_any_any
4341 : arm_stub_long_branch_v4t_thumb_thumb
);
4345 if (thumb2_movw
&& (input_sec
->flags
& SEC_ELF_PURECODE
))
4346 stub_type
= arm_stub_long_branch_thumb2_only_pure
;
4349 if (input_sec
->flags
& SEC_ELF_PURECODE
)
4351 (_("%pB(%pA): warning: long branch veneers used in"
4352 " section with SHF_ARM_PURECODE section"
4353 " attribute is only supported for M-profile"
4354 " targets that implement the movw instruction"),
4355 input_bfd
, input_sec
);
4357 stub_type
= (bfd_link_pic (info
) | globals
->pic_veneer
)
4359 ? arm_stub_long_branch_thumb_only_pic
4361 : (thumb2
? arm_stub_long_branch_thumb2_only
4362 : arm_stub_long_branch_thumb_only
);
4368 if (input_sec
->flags
& SEC_ELF_PURECODE
)
4370 (_("%pB(%pA): warning: long branch veneers used in"
4371 " section with SHF_ARM_PURECODE section"
4372 " attribute is only supported" " for M-profile"
4373 " targets that implement the movw instruction"),
4374 input_bfd
, input_sec
);
4378 && sym_sec
->owner
!= NULL
4379 && !INTERWORK_FLAG (sym_sec
->owner
))
4382 (_("%pB(%s): warning: interworking not enabled;"
4383 " first occurrence: %pB: %s call to %s"),
4384 sym_sec
->owner
, name
, input_bfd
, "Thumb", "ARM");
4388 (bfd_link_pic (info
) | globals
->pic_veneer
)
4390 ? (r_type
== R_ARM_THM_TLS_CALL
4391 /* TLS PIC stubs. */
4392 ? (globals
->use_blx
? arm_stub_long_branch_any_tls_pic
4393 : arm_stub_long_branch_v4t_thumb_tls_pic
)
4394 : ((globals
->use_blx
&& r_type
== R_ARM_THM_CALL
)
4395 /* V5T PIC and above. */
4396 ? arm_stub_long_branch_any_arm_pic
4398 : arm_stub_long_branch_v4t_thumb_arm_pic
))
4400 /* non-PIC stubs. */
4401 : ((globals
->use_blx
&& r_type
== R_ARM_THM_CALL
)
4402 /* V5T and above. */
4403 ? arm_stub_long_branch_any_any
4405 : arm_stub_long_branch_v4t_thumb_arm
);
4407 /* Handle v4t short branches. */
4408 if ((stub_type
== arm_stub_long_branch_v4t_thumb_arm
)
4409 && (branch_offset
<= THM_MAX_FWD_BRANCH_OFFSET
)
4410 && (branch_offset
>= THM_MAX_BWD_BRANCH_OFFSET
))
4411 stub_type
= arm_stub_short_branch_v4t_thumb_arm
;
4415 else if (r_type
== R_ARM_CALL
4416 || r_type
== R_ARM_JUMP24
4417 || r_type
== R_ARM_PLT32
4418 || r_type
== R_ARM_TLS_CALL
)
4420 if (input_sec
->flags
& SEC_ELF_PURECODE
)
4422 (_("%pB(%pA): warning: long branch veneers used in"
4423 " section with SHF_ARM_PURECODE section"
4424 " attribute is only supported for M-profile"
4425 " targets that implement the movw instruction"),
4426 input_bfd
, input_sec
);
4427 if (branch_type
== ST_BRANCH_TO_THUMB
)
4432 && sym_sec
->owner
!= NULL
4433 && !INTERWORK_FLAG (sym_sec
->owner
))
4436 (_("%pB(%s): warning: interworking not enabled;"
4437 " first occurrence: %pB: %s call to %s"),
4438 sym_sec
->owner
, name
, input_bfd
, "ARM", "Thumb");
4441 /* We have an extra 2-bytes reach because of
4442 the mode change (bit 24 (H) of BLX encoding). */
4443 if (branch_offset
> (ARM_MAX_FWD_BRANCH_OFFSET
+ 2)
4444 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
)
4445 || (r_type
== R_ARM_CALL
&& !globals
->use_blx
)
4446 || (r_type
== R_ARM_JUMP24
)
4447 || (r_type
== R_ARM_PLT32
))
4449 stub_type
= (bfd_link_pic (info
) | globals
->pic_veneer
)
4451 ? ((globals
->use_blx
)
4452 /* V5T and above. */
4453 ? arm_stub_long_branch_any_thumb_pic
4455 : arm_stub_long_branch_v4t_arm_thumb_pic
)
4457 /* non-PIC stubs. */
4458 : ((globals
->use_blx
)
4459 /* V5T and above. */
4460 ? arm_stub_long_branch_any_any
4462 : arm_stub_long_branch_v4t_arm_thumb
);
4468 if (branch_offset
> ARM_MAX_FWD_BRANCH_OFFSET
4469 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
))
4472 (bfd_link_pic (info
) | globals
->pic_veneer
)
4474 ? (r_type
== R_ARM_TLS_CALL
4476 ? arm_stub_long_branch_any_tls_pic
4477 : (globals
->root
.target_os
== is_nacl
4478 ? arm_stub_long_branch_arm_nacl_pic
4479 : arm_stub_long_branch_any_arm_pic
))
4480 /* non-PIC stubs. */
4481 : (globals
->root
.target_os
== is_nacl
4482 ? arm_stub_long_branch_arm_nacl
4483 : arm_stub_long_branch_any_any
);
4488 /* If a stub is needed, record the actual destination type. */
4489 if (stub_type
!= arm_stub_none
)
4490 *actual_branch_type
= branch_type
;
4495 /* Build a name for an entry in the stub hash table. */
4498 elf32_arm_stub_name (const asection
*input_section
,
4499 const asection
*sym_sec
,
4500 const struct elf32_arm_link_hash_entry
*hash
,
4501 const Elf_Internal_Rela
*rel
,
4502 enum elf32_arm_stub_type stub_type
)
4509 len
= 8 + 1 + strlen (hash
->root
.root
.root
.string
) + 1 + 8 + 1 + 2 + 1;
4510 stub_name
= (char *) bfd_malloc (len
);
4511 if (stub_name
!= NULL
)
4512 sprintf (stub_name
, "%08x_%s+%x_%d",
4513 input_section
->id
& 0xffffffff,
4514 hash
->root
.root
.root
.string
,
4515 (int) rel
->r_addend
& 0xffffffff,
4520 len
= 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
4521 stub_name
= (char *) bfd_malloc (len
);
4522 if (stub_name
!= NULL
)
4523 sprintf (stub_name
, "%08x_%x:%x+%x_%d",
4524 input_section
->id
& 0xffffffff,
4525 sym_sec
->id
& 0xffffffff,
4526 ELF32_R_TYPE (rel
->r_info
) == R_ARM_TLS_CALL
4527 || ELF32_R_TYPE (rel
->r_info
) == R_ARM_THM_TLS_CALL
4528 ? 0 : (int) ELF32_R_SYM (rel
->r_info
) & 0xffffffff,
4529 (int) rel
->r_addend
& 0xffffffff,
4536 /* Look up an entry in the stub hash. Stub entries are cached because
4537 creating the stub name takes a bit of time. */
4539 static struct elf32_arm_stub_hash_entry
*
4540 elf32_arm_get_stub_entry (const asection
*input_section
,
4541 const asection
*sym_sec
,
4542 struct elf_link_hash_entry
*hash
,
4543 const Elf_Internal_Rela
*rel
,
4544 struct elf32_arm_link_hash_table
*htab
,
4545 enum elf32_arm_stub_type stub_type
)
4547 struct elf32_arm_stub_hash_entry
*stub_entry
;
4548 struct elf32_arm_link_hash_entry
*h
= (struct elf32_arm_link_hash_entry
*) hash
;
4549 const asection
*id_sec
;
4551 if ((input_section
->flags
& SEC_CODE
) == 0)
4554 /* If the input section is the CMSE stubs one and it needs a long
4555 branch stub to reach it's final destination, give up with an
4556 error message: this is not supported. See PR ld/24709. */
4557 if (!strncmp (input_section
->name
, CMSE_STUB_NAME
, strlen(CMSE_STUB_NAME
)))
4559 bfd
*output_bfd
= htab
->obfd
;
4560 asection
*out_sec
= bfd_get_section_by_name (output_bfd
, CMSE_STUB_NAME
);
4562 _bfd_error_handler (_("ERROR: CMSE stub (%s section) too far "
4563 "(%#" PRIx64
") from destination (%#" PRIx64
")"),
4565 (uint64_t)out_sec
->output_section
->vma
4566 + out_sec
->output_offset
,
4567 (uint64_t)sym_sec
->output_section
->vma
4568 + sym_sec
->output_offset
4569 + h
->root
.root
.u
.def
.value
);
4570 /* Exit, rather than leave incompletely processed
4575 /* If this input section is part of a group of sections sharing one
4576 stub section, then use the id of the first section in the group.
4577 Stub names need to include a section id, as there may well be
4578 more than one stub used to reach say, printf, and we need to
4579 distinguish between them. */
4580 BFD_ASSERT (input_section
->id
<= htab
->top_id
);
4581 id_sec
= htab
->stub_group
[input_section
->id
].link_sec
;
4583 if (h
!= NULL
&& h
->stub_cache
!= NULL
4584 && h
->stub_cache
->h
== h
4585 && h
->stub_cache
->id_sec
== id_sec
4586 && h
->stub_cache
->stub_type
== stub_type
)
4588 stub_entry
= h
->stub_cache
;
4594 stub_name
= elf32_arm_stub_name (id_sec
, sym_sec
, h
, rel
, stub_type
);
4595 if (stub_name
== NULL
)
4598 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
,
4599 stub_name
, FALSE
, FALSE
);
4601 h
->stub_cache
= stub_entry
;
4609 /* Whether veneers of type STUB_TYPE require to be in a dedicated output
4613 arm_dedicated_stub_output_section_required (enum elf32_arm_stub_type stub_type
)
4615 if (stub_type
>= max_stub_type
)
4616 abort (); /* Should be unreachable. */
4620 case arm_stub_cmse_branch_thumb_only
:
4627 abort (); /* Should be unreachable. */
4630 /* Required alignment (as a power of 2) for the dedicated section holding
4631 veneers of type STUB_TYPE, or 0 if veneers of this type are interspersed
4632 with input sections. */
4635 arm_dedicated_stub_output_section_required_alignment
4636 (enum elf32_arm_stub_type stub_type
)
4638 if (stub_type
>= max_stub_type
)
4639 abort (); /* Should be unreachable. */
4643 /* Vectors of Secure Gateway veneers must be aligned on 32byte
4645 case arm_stub_cmse_branch_thumb_only
:
4649 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type
));
4653 abort (); /* Should be unreachable. */
4656 /* Name of the dedicated output section to put veneers of type STUB_TYPE, or
4657 NULL if veneers of this type are interspersed with input sections. */
4660 arm_dedicated_stub_output_section_name (enum elf32_arm_stub_type stub_type
)
4662 if (stub_type
>= max_stub_type
)
4663 abort (); /* Should be unreachable. */
4667 case arm_stub_cmse_branch_thumb_only
:
4668 return CMSE_STUB_NAME
;
4671 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type
));
4675 abort (); /* Should be unreachable. */
4678 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4679 returns the address of the hash table field in HTAB holding a pointer to the
4680 corresponding input section. Otherwise, returns NULL. */
4683 arm_dedicated_stub_input_section_ptr (struct elf32_arm_link_hash_table
*htab
,
4684 enum elf32_arm_stub_type stub_type
)
4686 if (stub_type
>= max_stub_type
)
4687 abort (); /* Should be unreachable. */
4691 case arm_stub_cmse_branch_thumb_only
:
4692 return &htab
->cmse_stub_sec
;
4695 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type
));
4699 abort (); /* Should be unreachable. */
4702 /* Find or create a stub section to contain a stub of type STUB_TYPE. SECTION
4703 is the section that branch into veneer and can be NULL if stub should go in
4704 a dedicated output section. Returns a pointer to the stub section, and the
4705 section to which the stub section will be attached (in *LINK_SEC_P).
4706 LINK_SEC_P may be NULL. */
4709 elf32_arm_create_or_find_stub_sec (asection
**link_sec_p
, asection
*section
,
4710 struct elf32_arm_link_hash_table
*htab
,
4711 enum elf32_arm_stub_type stub_type
)
4713 asection
*link_sec
, *out_sec
, **stub_sec_p
;
4714 const char *stub_sec_prefix
;
4715 bfd_boolean dedicated_output_section
=
4716 arm_dedicated_stub_output_section_required (stub_type
);
4719 if (dedicated_output_section
)
4721 bfd
*output_bfd
= htab
->obfd
;
4722 const char *out_sec_name
=
4723 arm_dedicated_stub_output_section_name (stub_type
);
4725 stub_sec_p
= arm_dedicated_stub_input_section_ptr (htab
, stub_type
);
4726 stub_sec_prefix
= out_sec_name
;
4727 align
= arm_dedicated_stub_output_section_required_alignment (stub_type
);
4728 out_sec
= bfd_get_section_by_name (output_bfd
, out_sec_name
);
4729 if (out_sec
== NULL
)
4731 _bfd_error_handler (_("no address assigned to the veneers output "
4732 "section %s"), out_sec_name
);
4738 BFD_ASSERT (section
->id
<= htab
->top_id
);
4739 link_sec
= htab
->stub_group
[section
->id
].link_sec
;
4740 BFD_ASSERT (link_sec
!= NULL
);
4741 stub_sec_p
= &htab
->stub_group
[section
->id
].stub_sec
;
4742 if (*stub_sec_p
== NULL
)
4743 stub_sec_p
= &htab
->stub_group
[link_sec
->id
].stub_sec
;
4744 stub_sec_prefix
= link_sec
->name
;
4745 out_sec
= link_sec
->output_section
;
4746 align
= htab
->root
.target_os
== is_nacl
? 4 : 3;
4749 if (*stub_sec_p
== NULL
)
4755 namelen
= strlen (stub_sec_prefix
);
4756 len
= namelen
+ sizeof (STUB_SUFFIX
);
4757 s_name
= (char *) bfd_alloc (htab
->stub_bfd
, len
);
4761 memcpy (s_name
, stub_sec_prefix
, namelen
);
4762 memcpy (s_name
+ namelen
, STUB_SUFFIX
, sizeof (STUB_SUFFIX
));
4763 *stub_sec_p
= (*htab
->add_stub_section
) (s_name
, out_sec
, link_sec
,
4765 if (*stub_sec_p
== NULL
)
4768 out_sec
->flags
|= SEC_ALLOC
| SEC_LOAD
| SEC_READONLY
| SEC_CODE
4769 | SEC_HAS_CONTENTS
| SEC_RELOC
| SEC_IN_MEMORY
4773 if (!dedicated_output_section
)
4774 htab
->stub_group
[section
->id
].stub_sec
= *stub_sec_p
;
4777 *link_sec_p
= link_sec
;
4782 /* Add a new stub entry to the stub hash. Not all fields of the new
4783 stub entry are initialised. */
4785 static struct elf32_arm_stub_hash_entry
*
4786 elf32_arm_add_stub (const char *stub_name
, asection
*section
,
4787 struct elf32_arm_link_hash_table
*htab
,
4788 enum elf32_arm_stub_type stub_type
)
4792 struct elf32_arm_stub_hash_entry
*stub_entry
;
4794 stub_sec
= elf32_arm_create_or_find_stub_sec (&link_sec
, section
, htab
,
4796 if (stub_sec
== NULL
)
4799 /* Enter this entry into the linker stub hash table. */
4800 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
, stub_name
,
4802 if (stub_entry
== NULL
)
4804 if (section
== NULL
)
4806 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
4807 section
->owner
, stub_name
);
4811 stub_entry
->stub_sec
= stub_sec
;
4812 stub_entry
->stub_offset
= (bfd_vma
) -1;
4813 stub_entry
->id_sec
= link_sec
;
4818 /* Store an Arm insn into an output section not processed by
4819 elf32_arm_write_section. */
4822 put_arm_insn (struct elf32_arm_link_hash_table
* htab
,
4823 bfd
* output_bfd
, bfd_vma val
, void * ptr
)
4825 if (htab
->byteswap_code
!= bfd_little_endian (output_bfd
))
4826 bfd_putl32 (val
, ptr
);
4828 bfd_putb32 (val
, ptr
);
4831 /* Store a 16-bit Thumb insn into an output section not processed by
4832 elf32_arm_write_section. */
4835 put_thumb_insn (struct elf32_arm_link_hash_table
* htab
,
4836 bfd
* output_bfd
, bfd_vma val
, void * ptr
)
4838 if (htab
->byteswap_code
!= bfd_little_endian (output_bfd
))
4839 bfd_putl16 (val
, ptr
);
4841 bfd_putb16 (val
, ptr
);
4844 /* Store a Thumb2 insn into an output section not processed by
4845 elf32_arm_write_section. */
4848 put_thumb2_insn (struct elf32_arm_link_hash_table
* htab
,
4849 bfd
* output_bfd
, bfd_vma val
, bfd_byte
* ptr
)
4851 /* T2 instructions are 16-bit streamed. */
4852 if (htab
->byteswap_code
!= bfd_little_endian (output_bfd
))
4854 bfd_putl16 ((val
>> 16) & 0xffff, ptr
);
4855 bfd_putl16 ((val
& 0xffff), ptr
+ 2);
4859 bfd_putb16 ((val
>> 16) & 0xffff, ptr
);
4860 bfd_putb16 ((val
& 0xffff), ptr
+ 2);
4864 /* If it's possible to change R_TYPE to a more efficient access
4865 model, return the new reloc type. */
4868 elf32_arm_tls_transition (struct bfd_link_info
*info
, int r_type
,
4869 struct elf_link_hash_entry
*h
)
4871 int is_local
= (h
== NULL
);
4873 if (bfd_link_dll (info
)
4874 || (h
&& h
->root
.type
== bfd_link_hash_undefweak
))
4877 /* We do not support relaxations for Old TLS models. */
4880 case R_ARM_TLS_GOTDESC
:
4881 case R_ARM_TLS_CALL
:
4882 case R_ARM_THM_TLS_CALL
:
4883 case R_ARM_TLS_DESCSEQ
:
4884 case R_ARM_THM_TLS_DESCSEQ
:
4885 return is_local
? R_ARM_TLS_LE32
: R_ARM_TLS_IE32
;
4891 static bfd_reloc_status_type elf32_arm_final_link_relocate
4892 (reloc_howto_type
*, bfd
*, bfd
*, asection
*, bfd_byte
*,
4893 Elf_Internal_Rela
*, bfd_vma
, struct bfd_link_info
*, asection
*,
4894 const char *, unsigned char, enum arm_st_branch_type
,
4895 struct elf_link_hash_entry
*, bfd_boolean
*, char **);
4898 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type
)
4902 case arm_stub_a8_veneer_b_cond
:
4903 case arm_stub_a8_veneer_b
:
4904 case arm_stub_a8_veneer_bl
:
4907 case arm_stub_long_branch_any_any
:
4908 case arm_stub_long_branch_v4t_arm_thumb
:
4909 case arm_stub_long_branch_thumb_only
:
4910 case arm_stub_long_branch_thumb2_only
:
4911 case arm_stub_long_branch_thumb2_only_pure
:
4912 case arm_stub_long_branch_v4t_thumb_thumb
:
4913 case arm_stub_long_branch_v4t_thumb_arm
:
4914 case arm_stub_short_branch_v4t_thumb_arm
:
4915 case arm_stub_long_branch_any_arm_pic
:
4916 case arm_stub_long_branch_any_thumb_pic
:
4917 case arm_stub_long_branch_v4t_thumb_thumb_pic
:
4918 case arm_stub_long_branch_v4t_arm_thumb_pic
:
4919 case arm_stub_long_branch_v4t_thumb_arm_pic
:
4920 case arm_stub_long_branch_thumb_only_pic
:
4921 case arm_stub_long_branch_any_tls_pic
:
4922 case arm_stub_long_branch_v4t_thumb_tls_pic
:
4923 case arm_stub_cmse_branch_thumb_only
:
4924 case arm_stub_a8_veneer_blx
:
4927 case arm_stub_long_branch_arm_nacl
:
4928 case arm_stub_long_branch_arm_nacl_pic
:
4932 abort (); /* Should be unreachable. */
4936 /* Returns whether stubs of type STUB_TYPE take over the symbol they are
4937 veneering (TRUE) or have their own symbol (FALSE). */
4940 arm_stub_sym_claimed (enum elf32_arm_stub_type stub_type
)
4942 if (stub_type
>= max_stub_type
)
4943 abort (); /* Should be unreachable. */
4947 case arm_stub_cmse_branch_thumb_only
:
4954 abort (); /* Should be unreachable. */
4957 /* Returns the padding needed for the dedicated section used stubs of type
4961 arm_dedicated_stub_section_padding (enum elf32_arm_stub_type stub_type
)
4963 if (stub_type
>= max_stub_type
)
4964 abort (); /* Should be unreachable. */
4968 case arm_stub_cmse_branch_thumb_only
:
4975 abort (); /* Should be unreachable. */
4978 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4979 returns the address of the hash table field in HTAB holding the offset at
4980 which new veneers should be layed out in the stub section. */
4983 arm_new_stubs_start_offset_ptr (struct elf32_arm_link_hash_table
*htab
,
4984 enum elf32_arm_stub_type stub_type
)
4988 case arm_stub_cmse_branch_thumb_only
:
4989 return &htab
->new_cmse_stub_offset
;
4992 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type
));
4998 arm_build_one_stub (struct bfd_hash_entry
*gen_entry
,
5002 bfd_boolean removed_sg_veneer
;
5003 struct elf32_arm_stub_hash_entry
*stub_entry
;
5004 struct elf32_arm_link_hash_table
*globals
;
5005 struct bfd_link_info
*info
;
5012 const insn_sequence
*template_sequence
;
5014 int stub_reloc_idx
[MAXRELOCS
] = {-1, -1};
5015 int stub_reloc_offset
[MAXRELOCS
] = {0, 0};
5017 int just_allocated
= 0;
5019 /* Massage our args to the form they really have. */
5020 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
5021 info
= (struct bfd_link_info
*) in_arg
;
5023 /* Fail if the target section could not be assigned to an output
5024 section. The user should fix his linker script. */
5025 if (stub_entry
->target_section
->output_section
== NULL
5026 && info
->non_contiguous_regions
)
5027 info
->callbacks
->einfo (_("%F%P: Could not assign '%pA' to an output section. "
5028 "Retry without --enable-non-contiguous-regions.\n"),
5029 stub_entry
->target_section
);
5031 globals
= elf32_arm_hash_table (info
);
5032 if (globals
== NULL
)
5035 stub_sec
= stub_entry
->stub_sec
;
5037 if ((globals
->fix_cortex_a8
< 0)
5038 != (arm_stub_required_alignment (stub_entry
->stub_type
) == 2))
5039 /* We have to do less-strictly-aligned fixes last. */
5042 /* Assign a slot at the end of section if none assigned yet. */
5043 if (stub_entry
->stub_offset
== (bfd_vma
) -1)
5045 stub_entry
->stub_offset
= stub_sec
->size
;
5048 loc
= stub_sec
->contents
+ stub_entry
->stub_offset
;
5050 stub_bfd
= stub_sec
->owner
;
5052 /* This is the address of the stub destination. */
5053 sym_value
= (stub_entry
->target_value
5054 + stub_entry
->target_section
->output_offset
5055 + stub_entry
->target_section
->output_section
->vma
);
5057 template_sequence
= stub_entry
->stub_template
;
5058 template_size
= stub_entry
->stub_template_size
;
5061 for (i
= 0; i
< template_size
; i
++)
5063 switch (template_sequence
[i
].type
)
5067 bfd_vma data
= (bfd_vma
) template_sequence
[i
].data
;
5068 if (template_sequence
[i
].reloc_addend
!= 0)
5070 /* We've borrowed the reloc_addend field to mean we should
5071 insert a condition code into this (Thumb-1 branch)
5072 instruction. See THUMB16_BCOND_INSN. */
5073 BFD_ASSERT ((data
& 0xff00) == 0xd000);
5074 data
|= ((stub_entry
->orig_insn
>> 22) & 0xf) << 8;
5076 bfd_put_16 (stub_bfd
, data
, loc
+ size
);
5082 bfd_put_16 (stub_bfd
,
5083 (template_sequence
[i
].data
>> 16) & 0xffff,
5085 bfd_put_16 (stub_bfd
, template_sequence
[i
].data
& 0xffff,
5087 if (template_sequence
[i
].r_type
!= R_ARM_NONE
)
5089 stub_reloc_idx
[nrelocs
] = i
;
5090 stub_reloc_offset
[nrelocs
++] = size
;
5096 bfd_put_32 (stub_bfd
, template_sequence
[i
].data
,
5098 /* Handle cases where the target is encoded within the
5100 if (template_sequence
[i
].r_type
== R_ARM_JUMP24
)
5102 stub_reloc_idx
[nrelocs
] = i
;
5103 stub_reloc_offset
[nrelocs
++] = size
;
5109 bfd_put_32 (stub_bfd
, template_sequence
[i
].data
, loc
+ size
);
5110 stub_reloc_idx
[nrelocs
] = i
;
5111 stub_reloc_offset
[nrelocs
++] = size
;
5122 stub_sec
->size
+= size
;
5124 /* Stub size has already been computed in arm_size_one_stub. Check
5126 BFD_ASSERT (size
== stub_entry
->stub_size
);
5128 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
5129 if (stub_entry
->branch_type
== ST_BRANCH_TO_THUMB
)
5132 /* Assume non empty slots have at least one and at most MAXRELOCS entries
5133 to relocate in each stub. */
5135 (size
== 0 && stub_entry
->stub_type
== arm_stub_cmse_branch_thumb_only
);
5136 BFD_ASSERT (removed_sg_veneer
|| (nrelocs
!= 0 && nrelocs
<= MAXRELOCS
));
5138 for (i
= 0; i
< nrelocs
; i
++)
5140 Elf_Internal_Rela rel
;
5141 bfd_boolean unresolved_reloc
;
5142 char *error_message
;
5144 sym_value
+ template_sequence
[stub_reloc_idx
[i
]].reloc_addend
;
5146 rel
.r_offset
= stub_entry
->stub_offset
+ stub_reloc_offset
[i
];
5147 rel
.r_info
= ELF32_R_INFO (0,
5148 template_sequence
[stub_reloc_idx
[i
]].r_type
);
5151 if (stub_entry
->stub_type
== arm_stub_a8_veneer_b_cond
&& i
== 0)
5152 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
5153 template should refer back to the instruction after the original
5154 branch. We use target_section as Cortex-A8 erratum workaround stubs
5155 are only generated when both source and target are in the same
5157 points_to
= stub_entry
->target_section
->output_section
->vma
5158 + stub_entry
->target_section
->output_offset
5159 + stub_entry
->source_value
;
5161 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
5162 (template_sequence
[stub_reloc_idx
[i
]].r_type
),
5163 stub_bfd
, info
->output_bfd
, stub_sec
, stub_sec
->contents
, &rel
,
5164 points_to
, info
, stub_entry
->target_section
, "", STT_FUNC
,
5165 stub_entry
->branch_type
,
5166 (struct elf_link_hash_entry
*) stub_entry
->h
, &unresolved_reloc
,
5174 /* Calculate the template, template size and instruction size for a stub.
5175 Return value is the instruction size. */
5178 find_stub_size_and_template (enum elf32_arm_stub_type stub_type
,
5179 const insn_sequence
**stub_template
,
5180 int *stub_template_size
)
5182 const insn_sequence
*template_sequence
= NULL
;
5183 int template_size
= 0, i
;
5186 template_sequence
= stub_definitions
[stub_type
].template_sequence
;
5188 *stub_template
= template_sequence
;
5190 template_size
= stub_definitions
[stub_type
].template_size
;
5191 if (stub_template_size
)
5192 *stub_template_size
= template_size
;
5195 for (i
= 0; i
< template_size
; i
++)
5197 switch (template_sequence
[i
].type
)
5218 /* As above, but don't actually build the stub. Just bump offset so
5219 we know stub section sizes. */
5222 arm_size_one_stub (struct bfd_hash_entry
*gen_entry
,
5223 void *in_arg ATTRIBUTE_UNUSED
)
5225 struct elf32_arm_stub_hash_entry
*stub_entry
;
5226 const insn_sequence
*template_sequence
;
5227 int template_size
, size
;
5229 /* Massage our args to the form they really have. */
5230 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
5232 BFD_ASSERT((stub_entry
->stub_type
> arm_stub_none
)
5233 && stub_entry
->stub_type
< ARRAY_SIZE(stub_definitions
));
5235 size
= find_stub_size_and_template (stub_entry
->stub_type
, &template_sequence
,
5238 /* Initialized to -1. Null size indicates an empty slot full of zeros. */
5239 if (stub_entry
->stub_template_size
)
5241 stub_entry
->stub_size
= size
;
5242 stub_entry
->stub_template
= template_sequence
;
5243 stub_entry
->stub_template_size
= template_size
;
5246 /* Already accounted for. */
5247 if (stub_entry
->stub_offset
!= (bfd_vma
) -1)
5250 size
= (size
+ 7) & ~7;
5251 stub_entry
->stub_sec
->size
+= size
;
5256 /* External entry points for sizing and building linker stubs. */
5258 /* Set up various things so that we can make a list of input sections
5259 for each output section included in the link. Returns -1 on error,
5260 0 when no stubs will be needed, and 1 on success. */
5263 elf32_arm_setup_section_lists (bfd
*output_bfd
,
5264 struct bfd_link_info
*info
)
5267 unsigned int bfd_count
;
5268 unsigned int top_id
, top_index
;
5270 asection
**input_list
, **list
;
5272 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
5276 if (! is_elf_hash_table (htab
))
5279 /* Count the number of input BFDs and find the top input section id. */
5280 for (input_bfd
= info
->input_bfds
, bfd_count
= 0, top_id
= 0;
5282 input_bfd
= input_bfd
->link
.next
)
5285 for (section
= input_bfd
->sections
;
5287 section
= section
->next
)
5289 if (top_id
< section
->id
)
5290 top_id
= section
->id
;
5293 htab
->bfd_count
= bfd_count
;
5295 amt
= sizeof (struct map_stub
) * (top_id
+ 1);
5296 htab
->stub_group
= (struct map_stub
*) bfd_zmalloc (amt
);
5297 if (htab
->stub_group
== NULL
)
5299 htab
->top_id
= top_id
;
5301 /* We can't use output_bfd->section_count here to find the top output
5302 section index as some sections may have been removed, and
5303 _bfd_strip_section_from_output doesn't renumber the indices. */
5304 for (section
= output_bfd
->sections
, top_index
= 0;
5306 section
= section
->next
)
5308 if (top_index
< section
->index
)
5309 top_index
= section
->index
;
5312 htab
->top_index
= top_index
;
5313 amt
= sizeof (asection
*) * (top_index
+ 1);
5314 input_list
= (asection
**) bfd_malloc (amt
);
5315 htab
->input_list
= input_list
;
5316 if (input_list
== NULL
)
5319 /* For sections we aren't interested in, mark their entries with a
5320 value we can check later. */
5321 list
= input_list
+ top_index
;
5323 *list
= bfd_abs_section_ptr
;
5324 while (list
-- != input_list
);
5326 for (section
= output_bfd
->sections
;
5328 section
= section
->next
)
5330 if ((section
->flags
& SEC_CODE
) != 0)
5331 input_list
[section
->index
] = NULL
;
5337 /* The linker repeatedly calls this function for each input section,
5338 in the order that input sections are linked into output sections.
5339 Build lists of input sections to determine groupings between which
5340 we may insert linker stubs. */
5343 elf32_arm_next_input_section (struct bfd_link_info
*info
,
5346 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
5351 if (isec
->output_section
->index
<= htab
->top_index
)
5353 asection
**list
= htab
->input_list
+ isec
->output_section
->index
;
5355 if (*list
!= bfd_abs_section_ptr
&& (isec
->flags
& SEC_CODE
) != 0)
5357 /* Steal the link_sec pointer for our list. */
5358 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
5359 /* This happens to make the list in reverse order,
5360 which we reverse later. */
5361 PREV_SEC (isec
) = *list
;
5367 /* See whether we can group stub sections together. Grouping stub
5368 sections may result in fewer stubs. More importantly, we need to
5369 put all .init* and .fini* stubs at the end of the .init or
5370 .fini output sections respectively, because glibc splits the
5371 _init and _fini functions into multiple parts. Putting a stub in
5372 the middle of a function is not a good idea. */
5375 group_sections (struct elf32_arm_link_hash_table
*htab
,
5376 bfd_size_type stub_group_size
,
5377 bfd_boolean stubs_always_after_branch
)
5379 asection
**list
= htab
->input_list
;
5383 asection
*tail
= *list
;
5386 if (tail
== bfd_abs_section_ptr
)
5389 /* Reverse the list: we must avoid placing stubs at the
5390 beginning of the section because the beginning of the text
5391 section may be required for an interrupt vector in bare metal
5393 #define NEXT_SEC PREV_SEC
5395 while (tail
!= NULL
)
5397 /* Pop from tail. */
5398 asection
*item
= tail
;
5399 tail
= PREV_SEC (item
);
5402 NEXT_SEC (item
) = head
;
5406 while (head
!= NULL
)
5410 bfd_vma stub_group_start
= head
->output_offset
;
5411 bfd_vma end_of_next
;
5414 while (NEXT_SEC (curr
) != NULL
)
5416 next
= NEXT_SEC (curr
);
5417 end_of_next
= next
->output_offset
+ next
->size
;
5418 if (end_of_next
- stub_group_start
>= stub_group_size
)
5419 /* End of NEXT is too far from start, so stop. */
5421 /* Add NEXT to the group. */
5425 /* OK, the size from the start to the start of CURR is less
5426 than stub_group_size and thus can be handled by one stub
5427 section. (Or the head section is itself larger than
5428 stub_group_size, in which case we may be toast.)
5429 We should really be keeping track of the total size of
5430 stubs added here, as stubs contribute to the final output
5434 next
= NEXT_SEC (head
);
5435 /* Set up this stub group. */
5436 htab
->stub_group
[head
->id
].link_sec
= curr
;
5438 while (head
!= curr
&& (head
= next
) != NULL
);
5440 /* But wait, there's more! Input sections up to stub_group_size
5441 bytes after the stub section can be handled by it too. */
5442 if (!stubs_always_after_branch
)
5444 stub_group_start
= curr
->output_offset
+ curr
->size
;
5446 while (next
!= NULL
)
5448 end_of_next
= next
->output_offset
+ next
->size
;
5449 if (end_of_next
- stub_group_start
>= stub_group_size
)
5450 /* End of NEXT is too far from stubs, so stop. */
5452 /* Add NEXT to the stub group. */
5454 next
= NEXT_SEC (head
);
5455 htab
->stub_group
[head
->id
].link_sec
= curr
;
5461 while (list
++ != htab
->input_list
+ htab
->top_index
);
5463 free (htab
->input_list
);
5468 /* Comparison function for sorting/searching relocations relating to Cortex-A8
5472 a8_reloc_compare (const void *a
, const void *b
)
5474 const struct a8_erratum_reloc
*ra
= (const struct a8_erratum_reloc
*) a
;
5475 const struct a8_erratum_reloc
*rb
= (const struct a8_erratum_reloc
*) b
;
5477 if (ra
->from
< rb
->from
)
5479 else if (ra
->from
> rb
->from
)
5485 static struct elf_link_hash_entry
*find_thumb_glue (struct bfd_link_info
*,
5486 const char *, char **);
5488 /* Helper function to scan code for sequences which might trigger the Cortex-A8
5489 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
5490 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
5494 cortex_a8_erratum_scan (bfd
*input_bfd
,
5495 struct bfd_link_info
*info
,
5496 struct a8_erratum_fix
**a8_fixes_p
,
5497 unsigned int *num_a8_fixes_p
,
5498 unsigned int *a8_fix_table_size_p
,
5499 struct a8_erratum_reloc
*a8_relocs
,
5500 unsigned int num_a8_relocs
,
5501 unsigned prev_num_a8_fixes
,
5502 bfd_boolean
*stub_changed_p
)
5505 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
5506 struct a8_erratum_fix
*a8_fixes
= *a8_fixes_p
;
5507 unsigned int num_a8_fixes
= *num_a8_fixes_p
;
5508 unsigned int a8_fix_table_size
= *a8_fix_table_size_p
;
5513 for (section
= input_bfd
->sections
;
5515 section
= section
->next
)
5517 bfd_byte
*contents
= NULL
;
5518 struct _arm_elf_section_data
*sec_data
;
5522 if (elf_section_type (section
) != SHT_PROGBITS
5523 || (elf_section_flags (section
) & SHF_EXECINSTR
) == 0
5524 || (section
->flags
& SEC_EXCLUDE
) != 0
5525 || (section
->sec_info_type
== SEC_INFO_TYPE_JUST_SYMS
)
5526 || (section
->output_section
== bfd_abs_section_ptr
))
5529 base_vma
= section
->output_section
->vma
+ section
->output_offset
;
5531 if (elf_section_data (section
)->this_hdr
.contents
!= NULL
)
5532 contents
= elf_section_data (section
)->this_hdr
.contents
;
5533 else if (! bfd_malloc_and_get_section (input_bfd
, section
, &contents
))
5536 sec_data
= elf32_arm_section_data (section
);
5538 for (span
= 0; span
< sec_data
->mapcount
; span
++)
5540 unsigned int span_start
= sec_data
->map
[span
].vma
;
5541 unsigned int span_end
= (span
== sec_data
->mapcount
- 1)
5542 ? section
->size
: sec_data
->map
[span
+ 1].vma
;
5544 char span_type
= sec_data
->map
[span
].type
;
5545 bfd_boolean last_was_32bit
= FALSE
, last_was_branch
= FALSE
;
5547 if (span_type
!= 't')
5550 /* Span is entirely within a single 4KB region: skip scanning. */
5551 if (((base_vma
+ span_start
) & ~0xfff)
5552 == ((base_vma
+ span_end
) & ~0xfff))
5555 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
5557 * The opcode is BLX.W, BL.W, B.W, Bcc.W
5558 * The branch target is in the same 4KB region as the
5559 first half of the branch.
5560 * The instruction before the branch is a 32-bit
5561 length non-branch instruction. */
5562 for (i
= span_start
; i
< span_end
;)
5564 unsigned int insn
= bfd_getl16 (&contents
[i
]);
5565 bfd_boolean insn_32bit
= FALSE
, is_blx
= FALSE
, is_b
= FALSE
;
5566 bfd_boolean is_bl
= FALSE
, is_bcc
= FALSE
, is_32bit_branch
;
5568 if ((insn
& 0xe000) == 0xe000 && (insn
& 0x1800) != 0x0000)
5573 /* Load the rest of the insn (in manual-friendly order). */
5574 insn
= (insn
<< 16) | bfd_getl16 (&contents
[i
+ 2]);
5576 /* Encoding T4: B<c>.W. */
5577 is_b
= (insn
& 0xf800d000) == 0xf0009000;
5578 /* Encoding T1: BL<c>.W. */
5579 is_bl
= (insn
& 0xf800d000) == 0xf000d000;
5580 /* Encoding T2: BLX<c>.W. */
5581 is_blx
= (insn
& 0xf800d000) == 0xf000c000;
5582 /* Encoding T3: B<c>.W (not permitted in IT block). */
5583 is_bcc
= (insn
& 0xf800d000) == 0xf0008000
5584 && (insn
& 0x07f00000) != 0x03800000;
5587 is_32bit_branch
= is_b
|| is_bl
|| is_blx
|| is_bcc
;
5589 if (((base_vma
+ i
) & 0xfff) == 0xffe
5593 && ! last_was_branch
)
5595 bfd_signed_vma offset
= 0;
5596 bfd_boolean force_target_arm
= FALSE
;
5597 bfd_boolean force_target_thumb
= FALSE
;
5599 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
5600 struct a8_erratum_reloc key
, *found
;
5601 bfd_boolean use_plt
= FALSE
;
5603 key
.from
= base_vma
+ i
;
5604 found
= (struct a8_erratum_reloc
*)
5605 bsearch (&key
, a8_relocs
, num_a8_relocs
,
5606 sizeof (struct a8_erratum_reloc
),
5611 char *error_message
= NULL
;
5612 struct elf_link_hash_entry
*entry
;
5614 /* We don't care about the error returned from this
5615 function, only if there is glue or not. */
5616 entry
= find_thumb_glue (info
, found
->sym_name
,
5620 found
->non_a8_stub
= TRUE
;
5622 /* Keep a simpler condition, for the sake of clarity. */
5623 if (htab
->root
.splt
!= NULL
&& found
->hash
!= NULL
5624 && found
->hash
->root
.plt
.offset
!= (bfd_vma
) -1)
5627 if (found
->r_type
== R_ARM_THM_CALL
)
5629 if (found
->branch_type
== ST_BRANCH_TO_ARM
5631 force_target_arm
= TRUE
;
5633 force_target_thumb
= TRUE
;
5637 /* Check if we have an offending branch instruction. */
5639 if (found
&& found
->non_a8_stub
)
5640 /* We've already made a stub for this instruction, e.g.
5641 it's a long branch or a Thumb->ARM stub. Assume that
5642 stub will suffice to work around the A8 erratum (see
5643 setting of always_after_branch above). */
5647 offset
= (insn
& 0x7ff) << 1;
5648 offset
|= (insn
& 0x3f0000) >> 4;
5649 offset
|= (insn
& 0x2000) ? 0x40000 : 0;
5650 offset
|= (insn
& 0x800) ? 0x80000 : 0;
5651 offset
|= (insn
& 0x4000000) ? 0x100000 : 0;
5652 if (offset
& 0x100000)
5653 offset
|= ~ ((bfd_signed_vma
) 0xfffff);
5654 stub_type
= arm_stub_a8_veneer_b_cond
;
5656 else if (is_b
|| is_bl
|| is_blx
)
5658 int s
= (insn
& 0x4000000) != 0;
5659 int j1
= (insn
& 0x2000) != 0;
5660 int j2
= (insn
& 0x800) != 0;
5664 offset
= (insn
& 0x7ff) << 1;
5665 offset
|= (insn
& 0x3ff0000) >> 4;
5669 if (offset
& 0x1000000)
5670 offset
|= ~ ((bfd_signed_vma
) 0xffffff);
5673 offset
&= ~ ((bfd_signed_vma
) 3);
5675 stub_type
= is_blx
? arm_stub_a8_veneer_blx
:
5676 is_bl
? arm_stub_a8_veneer_bl
: arm_stub_a8_veneer_b
;
5679 if (stub_type
!= arm_stub_none
)
5681 bfd_vma pc_for_insn
= base_vma
+ i
+ 4;
5683 /* The original instruction is a BL, but the target is
5684 an ARM instruction. If we were not making a stub,
5685 the BL would have been converted to a BLX. Use the
5686 BLX stub instead in that case. */
5687 if (htab
->use_blx
&& force_target_arm
5688 && stub_type
== arm_stub_a8_veneer_bl
)
5690 stub_type
= arm_stub_a8_veneer_blx
;
5694 /* Conversely, if the original instruction was
5695 BLX but the target is Thumb mode, use the BL
5697 else if (force_target_thumb
5698 && stub_type
== arm_stub_a8_veneer_blx
)
5700 stub_type
= arm_stub_a8_veneer_bl
;
5706 pc_for_insn
&= ~ ((bfd_vma
) 3);
5708 /* If we found a relocation, use the proper destination,
5709 not the offset in the (unrelocated) instruction.
5710 Note this is always done if we switched the stub type
5714 (bfd_signed_vma
) (found
->destination
- pc_for_insn
);
5716 /* If the stub will use a Thumb-mode branch to a
5717 PLT target, redirect it to the preceding Thumb
5719 if (stub_type
!= arm_stub_a8_veneer_blx
&& use_plt
)
5720 offset
-= PLT_THUMB_STUB_SIZE
;
5722 target
= pc_for_insn
+ offset
;
5724 /* The BLX stub is ARM-mode code. Adjust the offset to
5725 take the different PC value (+8 instead of +4) into
5727 if (stub_type
== arm_stub_a8_veneer_blx
)
5730 if (((base_vma
+ i
) & ~0xfff) == (target
& ~0xfff))
5732 char *stub_name
= NULL
;
5734 if (num_a8_fixes
== a8_fix_table_size
)
5736 a8_fix_table_size
*= 2;
5737 a8_fixes
= (struct a8_erratum_fix
*)
5738 bfd_realloc (a8_fixes
,
5739 sizeof (struct a8_erratum_fix
)
5740 * a8_fix_table_size
);
5743 if (num_a8_fixes
< prev_num_a8_fixes
)
5745 /* If we're doing a subsequent scan,
5746 check if we've found the same fix as
5747 before, and try and reuse the stub
5749 stub_name
= a8_fixes
[num_a8_fixes
].stub_name
;
5750 if ((a8_fixes
[num_a8_fixes
].section
!= section
)
5751 || (a8_fixes
[num_a8_fixes
].offset
!= i
))
5755 *stub_changed_p
= TRUE
;
5761 stub_name
= (char *) bfd_malloc (8 + 1 + 8 + 1);
5762 if (stub_name
!= NULL
)
5763 sprintf (stub_name
, "%x:%x", section
->id
, i
);
5766 a8_fixes
[num_a8_fixes
].input_bfd
= input_bfd
;
5767 a8_fixes
[num_a8_fixes
].section
= section
;
5768 a8_fixes
[num_a8_fixes
].offset
= i
;
5769 a8_fixes
[num_a8_fixes
].target_offset
=
5771 a8_fixes
[num_a8_fixes
].orig_insn
= insn
;
5772 a8_fixes
[num_a8_fixes
].stub_name
= stub_name
;
5773 a8_fixes
[num_a8_fixes
].stub_type
= stub_type
;
5774 a8_fixes
[num_a8_fixes
].branch_type
=
5775 is_blx
? ST_BRANCH_TO_ARM
: ST_BRANCH_TO_THUMB
;
5782 i
+= insn_32bit
? 4 : 2;
5783 last_was_32bit
= insn_32bit
;
5784 last_was_branch
= is_32bit_branch
;
5788 if (elf_section_data (section
)->this_hdr
.contents
== NULL
)
5792 *a8_fixes_p
= a8_fixes
;
5793 *num_a8_fixes_p
= num_a8_fixes
;
5794 *a8_fix_table_size_p
= a8_fix_table_size
;
5799 /* Create or update a stub entry depending on whether the stub can already be
5800 found in HTAB. The stub is identified by:
5801 - its type STUB_TYPE
5802 - its source branch (note that several can share the same stub) whose
5803 section and relocation (if any) are given by SECTION and IRELA
5805 - its target symbol whose input section, hash, name, value and branch type
5806 are given in SYM_SEC, HASH, SYM_NAME, SYM_VALUE and BRANCH_TYPE
5809 If found, the value of the stub's target symbol is updated from SYM_VALUE
5810 and *NEW_STUB is set to FALSE. Otherwise, *NEW_STUB is set to
5811 TRUE and the stub entry is initialized.
5813 Returns the stub that was created or updated, or NULL if an error
5816 static struct elf32_arm_stub_hash_entry
*
5817 elf32_arm_create_stub (struct elf32_arm_link_hash_table
*htab
,
5818 enum elf32_arm_stub_type stub_type
, asection
*section
,
5819 Elf_Internal_Rela
*irela
, asection
*sym_sec
,
5820 struct elf32_arm_link_hash_entry
*hash
, char *sym_name
,
5821 bfd_vma sym_value
, enum arm_st_branch_type branch_type
,
5822 bfd_boolean
*new_stub
)
5824 const asection
*id_sec
;
5826 struct elf32_arm_stub_hash_entry
*stub_entry
;
5827 unsigned int r_type
;
5828 bfd_boolean sym_claimed
= arm_stub_sym_claimed (stub_type
);
5830 BFD_ASSERT (stub_type
!= arm_stub_none
);
5834 stub_name
= sym_name
;
5838 BFD_ASSERT (section
);
5839 BFD_ASSERT (section
->id
<= htab
->top_id
);
5841 /* Support for grouping stub sections. */
5842 id_sec
= htab
->stub_group
[section
->id
].link_sec
;
5844 /* Get the name of this stub. */
5845 stub_name
= elf32_arm_stub_name (id_sec
, sym_sec
, hash
, irela
,
5851 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
, stub_name
, FALSE
,
5853 /* The proper stub has already been created, just update its value. */
5854 if (stub_entry
!= NULL
)
5858 stub_entry
->target_value
= sym_value
;
5862 stub_entry
= elf32_arm_add_stub (stub_name
, section
, htab
, stub_type
);
5863 if (stub_entry
== NULL
)
5870 stub_entry
->target_value
= sym_value
;
5871 stub_entry
->target_section
= sym_sec
;
5872 stub_entry
->stub_type
= stub_type
;
5873 stub_entry
->h
= hash
;
5874 stub_entry
->branch_type
= branch_type
;
5877 stub_entry
->output_name
= sym_name
;
5880 if (sym_name
== NULL
)
5881 sym_name
= "unnamed";
5882 stub_entry
->output_name
= (char *)
5883 bfd_alloc (htab
->stub_bfd
, sizeof (THUMB2ARM_GLUE_ENTRY_NAME
)
5884 + strlen (sym_name
));
5885 if (stub_entry
->output_name
== NULL
)
5891 /* For historical reasons, use the existing names for ARM-to-Thumb and
5892 Thumb-to-ARM stubs. */
5893 r_type
= ELF32_R_TYPE (irela
->r_info
);
5894 if ((r_type
== (unsigned int) R_ARM_THM_CALL
5895 || r_type
== (unsigned int) R_ARM_THM_JUMP24
5896 || r_type
== (unsigned int) R_ARM_THM_JUMP19
)
5897 && branch_type
== ST_BRANCH_TO_ARM
)
5898 sprintf (stub_entry
->output_name
, THUMB2ARM_GLUE_ENTRY_NAME
, sym_name
);
5899 else if ((r_type
== (unsigned int) R_ARM_CALL
5900 || r_type
== (unsigned int) R_ARM_JUMP24
)
5901 && branch_type
== ST_BRANCH_TO_THUMB
)
5902 sprintf (stub_entry
->output_name
, ARM2THUMB_GLUE_ENTRY_NAME
, sym_name
);
5904 sprintf (stub_entry
->output_name
, STUB_ENTRY_NAME
, sym_name
);
5911 /* Scan symbols in INPUT_BFD to identify secure entry functions needing a
5912 gateway veneer to transition from non secure to secure state and create them
5915 "ARMv8-M Security Extensions: Requirements on Development Tools" document
5916 defines the conditions that govern Secure Gateway veneer creation for a
5917 given symbol <SYM> as follows:
5918 - it has function type
5919 - it has non local binding
5920 - a symbol named __acle_se_<SYM> (called special symbol) exists with the
5921 same type, binding and value as <SYM> (called normal symbol).
5922 An entry function can handle secure state transition itself in which case
5923 its special symbol would have a different value from the normal symbol.
5925 OUT_ATTR gives the output attributes, SYM_HASHES the symbol index to hash
5926 entry mapping while HTAB gives the name to hash entry mapping.
5927 *CMSE_STUB_CREATED is increased by the number of secure gateway veneer
5930 The return value gives whether a stub failed to be allocated. */
5933 cmse_scan (bfd
*input_bfd
, struct elf32_arm_link_hash_table
*htab
,
5934 obj_attribute
*out_attr
, struct elf_link_hash_entry
**sym_hashes
,
5935 int *cmse_stub_created
)
5937 const struct elf_backend_data
*bed
;
5938 Elf_Internal_Shdr
*symtab_hdr
;
5939 unsigned i
, j
, sym_count
, ext_start
;
5940 Elf_Internal_Sym
*cmse_sym
, *local_syms
;
5941 struct elf32_arm_link_hash_entry
*hash
, *cmse_hash
= NULL
;
5942 enum arm_st_branch_type branch_type
;
5943 char *sym_name
, *lsym_name
;
5946 struct elf32_arm_stub_hash_entry
*stub_entry
;
5947 bfd_boolean is_v8m
, new_stub
, cmse_invalid
, ret
= TRUE
;
5949 bed
= get_elf_backend_data (input_bfd
);
5950 symtab_hdr
= &elf_tdata (input_bfd
)->symtab_hdr
;
5951 sym_count
= symtab_hdr
->sh_size
/ bed
->s
->sizeof_sym
;
5952 ext_start
= symtab_hdr
->sh_info
;
5953 is_v8m
= (out_attr
[Tag_CPU_arch
].i
>= TAG_CPU_ARCH_V8M_BASE
5954 && out_attr
[Tag_CPU_arch_profile
].i
== 'M');
5956 local_syms
= (Elf_Internal_Sym
*) symtab_hdr
->contents
;
5957 if (local_syms
== NULL
)
5958 local_syms
= bfd_elf_get_elf_syms (input_bfd
, symtab_hdr
,
5959 symtab_hdr
->sh_info
, 0, NULL
, NULL
,
5961 if (symtab_hdr
->sh_info
&& local_syms
== NULL
)
5965 for (i
= 0; i
< sym_count
; i
++)
5967 cmse_invalid
= FALSE
;
5971 cmse_sym
= &local_syms
[i
];
5972 sym_name
= bfd_elf_string_from_elf_section (input_bfd
,
5973 symtab_hdr
->sh_link
,
5975 if (!sym_name
|| !CONST_STRNEQ (sym_name
, CMSE_PREFIX
))
5978 /* Special symbol with local binding. */
5979 cmse_invalid
= TRUE
;
5983 cmse_hash
= elf32_arm_hash_entry (sym_hashes
[i
- ext_start
]);
5984 sym_name
= (char *) cmse_hash
->root
.root
.root
.string
;
5985 if (!CONST_STRNEQ (sym_name
, CMSE_PREFIX
))
5988 /* Special symbol has incorrect binding or type. */
5989 if ((cmse_hash
->root
.root
.type
!= bfd_link_hash_defined
5990 && cmse_hash
->root
.root
.type
!= bfd_link_hash_defweak
)
5991 || cmse_hash
->root
.type
!= STT_FUNC
)
5992 cmse_invalid
= TRUE
;
5997 _bfd_error_handler (_("%pB: special symbol `%s' only allowed for "
5998 "ARMv8-M architecture or later"),
5999 input_bfd
, sym_name
);
6000 is_v8m
= TRUE
; /* Avoid multiple warning. */
6006 _bfd_error_handler (_("%pB: invalid special symbol `%s'; it must be"
6007 " a global or weak function symbol"),
6008 input_bfd
, sym_name
);
6014 sym_name
+= strlen (CMSE_PREFIX
);
6015 hash
= (struct elf32_arm_link_hash_entry
*)
6016 elf_link_hash_lookup (&(htab
)->root
, sym_name
, FALSE
, FALSE
, TRUE
);
6018 /* No associated normal symbol or it is neither global nor weak. */
6020 || (hash
->root
.root
.type
!= bfd_link_hash_defined
6021 && hash
->root
.root
.type
!= bfd_link_hash_defweak
)
6022 || hash
->root
.type
!= STT_FUNC
)
6024 /* Initialize here to avoid warning about use of possibly
6025 uninitialized variable. */
6030 /* Searching for a normal symbol with local binding. */
6031 for (; j
< ext_start
; j
++)
6034 bfd_elf_string_from_elf_section (input_bfd
,
6035 symtab_hdr
->sh_link
,
6036 local_syms
[j
].st_name
);
6037 if (!strcmp (sym_name
, lsym_name
))
6042 if (hash
|| j
< ext_start
)
6045 (_("%pB: invalid standard symbol `%s'; it must be "
6046 "a global or weak function symbol"),
6047 input_bfd
, sym_name
);
6051 (_("%pB: absent standard symbol `%s'"), input_bfd
, sym_name
);
6057 sym_value
= hash
->root
.root
.u
.def
.value
;
6058 section
= hash
->root
.root
.u
.def
.section
;
6060 if (cmse_hash
->root
.root
.u
.def
.section
!= section
)
6063 (_("%pB: `%s' and its special symbol are in different sections"),
6064 input_bfd
, sym_name
);
6067 if (cmse_hash
->root
.root
.u
.def
.value
!= sym_value
)
6068 continue; /* Ignore: could be an entry function starting with SG. */
6070 /* If this section is a link-once section that will be discarded, then
6071 don't create any stubs. */
6072 if (section
->output_section
== NULL
)
6075 (_("%pB: entry function `%s' not output"), input_bfd
, sym_name
);
6079 if (hash
->root
.size
== 0)
6082 (_("%pB: entry function `%s' is empty"), input_bfd
, sym_name
);
6088 branch_type
= ARM_GET_SYM_BRANCH_TYPE (hash
->root
.target_internal
);
6090 = elf32_arm_create_stub (htab
, arm_stub_cmse_branch_thumb_only
,
6091 NULL
, NULL
, section
, hash
, sym_name
,
6092 sym_value
, branch_type
, &new_stub
);
6094 if (stub_entry
== NULL
)
6098 BFD_ASSERT (new_stub
);
6099 (*cmse_stub_created
)++;
6103 if (!symtab_hdr
->contents
)
6108 /* Return TRUE iff a symbol identified by its linker HASH entry is a secure
6109 code entry function, ie can be called from non secure code without using a
6113 cmse_entry_fct_p (struct elf32_arm_link_hash_entry
*hash
)
6115 bfd_byte contents
[4];
6116 uint32_t first_insn
;
6121 /* Defined symbol of function type. */
6122 if (hash
->root
.root
.type
!= bfd_link_hash_defined
6123 && hash
->root
.root
.type
!= bfd_link_hash_defweak
)
6125 if (hash
->root
.type
!= STT_FUNC
)
6128 /* Read first instruction. */
6129 section
= hash
->root
.root
.u
.def
.section
;
6130 abfd
= section
->owner
;
6131 offset
= hash
->root
.root
.u
.def
.value
- section
->vma
;
6132 if (!bfd_get_section_contents (abfd
, section
, contents
, offset
,
6136 first_insn
= bfd_get_32 (abfd
, contents
);
6138 /* Starts by SG instruction. */
6139 return first_insn
== 0xe97fe97f;
6142 /* Output the name (in symbol table) of the veneer GEN_ENTRY if it is a new
6143 secure gateway veneers (ie. the veneers was not in the input import library)
6144 and there is no output import library (GEN_INFO->out_implib_bfd is NULL. */
6147 arm_list_new_cmse_stub (struct bfd_hash_entry
*gen_entry
, void *gen_info
)
6149 struct elf32_arm_stub_hash_entry
*stub_entry
;
6150 struct bfd_link_info
*info
;
6152 /* Massage our args to the form they really have. */
6153 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
6154 info
= (struct bfd_link_info
*) gen_info
;
6156 if (info
->out_implib_bfd
)
6159 if (stub_entry
->stub_type
!= arm_stub_cmse_branch_thumb_only
)
6162 if (stub_entry
->stub_offset
== (bfd_vma
) -1)
6163 _bfd_error_handler (" %s", stub_entry
->output_name
);
6168 /* Set offset of each secure gateway veneers so that its address remain
6169 identical to the one in the input import library referred by
6170 HTAB->in_implib_bfd. A warning is issued for veneers that disappeared
6171 (present in input import library but absent from the executable being
6172 linked) or if new veneers appeared and there is no output import library
6173 (INFO->out_implib_bfd is NULL and *CMSE_STUB_CREATED is bigger than the
6174 number of secure gateway veneers found in the input import library.
6176 The function returns whether an error occurred. If no error occurred,
6177 *CMSE_STUB_CREATED gives the number of SG veneers created by both cmse_scan
6178 and this function and HTAB->new_cmse_stub_offset is set to the biggest
6179 veneer observed set for new veneers to be layed out after. */
6182 set_cmse_veneer_addr_from_implib (struct bfd_link_info
*info
,
6183 struct elf32_arm_link_hash_table
*htab
,
6184 int *cmse_stub_created
)
6191 asection
*stub_out_sec
;
6192 bfd_boolean ret
= TRUE
;
6193 Elf_Internal_Sym
*intsym
;
6194 const char *out_sec_name
;
6195 bfd_size_type cmse_stub_size
;
6196 asymbol
**sympp
= NULL
, *sym
;
6197 struct elf32_arm_link_hash_entry
*hash
;
6198 const insn_sequence
*cmse_stub_template
;
6199 struct elf32_arm_stub_hash_entry
*stub_entry
;
6200 int cmse_stub_template_size
, new_cmse_stubs_created
= *cmse_stub_created
;
6201 bfd_vma veneer_value
, stub_offset
, next_cmse_stub_offset
;
6202 bfd_vma cmse_stub_array_start
= (bfd_vma
) -1, cmse_stub_sec_vma
= 0;
6204 /* No input secure gateway import library. */
6205 if (!htab
->in_implib_bfd
)
6208 in_implib_bfd
= htab
->in_implib_bfd
;
6209 if (!htab
->cmse_implib
)
6211 _bfd_error_handler (_("%pB: --in-implib only supported for Secure "
6212 "Gateway import libraries"), in_implib_bfd
);
6216 /* Get symbol table size. */
6217 symsize
= bfd_get_symtab_upper_bound (in_implib_bfd
);
6221 /* Read in the input secure gateway import library's symbol table. */
6222 sympp
= (asymbol
**) bfd_malloc (symsize
);
6226 symcount
= bfd_canonicalize_symtab (in_implib_bfd
, sympp
);
6233 htab
->new_cmse_stub_offset
= 0;
6235 find_stub_size_and_template (arm_stub_cmse_branch_thumb_only
,
6236 &cmse_stub_template
,
6237 &cmse_stub_template_size
);
6239 arm_dedicated_stub_output_section_name (arm_stub_cmse_branch_thumb_only
);
6241 bfd_get_section_by_name (htab
->obfd
, out_sec_name
);
6242 if (stub_out_sec
!= NULL
)
6243 cmse_stub_sec_vma
= stub_out_sec
->vma
;
6245 /* Set addresses of veneers mentionned in input secure gateway import
6246 library's symbol table. */
6247 for (i
= 0; i
< symcount
; i
++)
6251 sym_name
= (char *) bfd_asymbol_name (sym
);
6252 intsym
= &((elf_symbol_type
*) sym
)->internal_elf_sym
;
6254 if (sym
->section
!= bfd_abs_section_ptr
6255 || !(flags
& (BSF_GLOBAL
| BSF_WEAK
))
6256 || (flags
& BSF_FUNCTION
) != BSF_FUNCTION
6257 || (ARM_GET_SYM_BRANCH_TYPE (intsym
->st_target_internal
)
6258 != ST_BRANCH_TO_THUMB
))
6260 _bfd_error_handler (_("%pB: invalid import library entry: `%s'; "
6261 "symbol should be absolute, global and "
6262 "refer to Thumb functions"),
6263 in_implib_bfd
, sym_name
);
6268 veneer_value
= bfd_asymbol_value (sym
);
6269 stub_offset
= veneer_value
- cmse_stub_sec_vma
;
6270 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
, sym_name
,
6272 hash
= (struct elf32_arm_link_hash_entry
*)
6273 elf_link_hash_lookup (&(htab
)->root
, sym_name
, FALSE
, FALSE
, TRUE
);
6275 /* Stub entry should have been created by cmse_scan or the symbol be of
6276 a secure function callable from non secure code. */
6277 if (!stub_entry
&& !hash
)
6279 bfd_boolean new_stub
;
6282 (_("entry function `%s' disappeared from secure code"), sym_name
);
6283 hash
= (struct elf32_arm_link_hash_entry
*)
6284 elf_link_hash_lookup (&(htab
)->root
, sym_name
, TRUE
, TRUE
, TRUE
);
6286 = elf32_arm_create_stub (htab
, arm_stub_cmse_branch_thumb_only
,
6287 NULL
, NULL
, bfd_abs_section_ptr
, hash
,
6288 sym_name
, veneer_value
,
6289 ST_BRANCH_TO_THUMB
, &new_stub
);
6290 if (stub_entry
== NULL
)
6294 BFD_ASSERT (new_stub
);
6295 new_cmse_stubs_created
++;
6296 (*cmse_stub_created
)++;
6298 stub_entry
->stub_template_size
= stub_entry
->stub_size
= 0;
6299 stub_entry
->stub_offset
= stub_offset
;
6301 /* Symbol found is not callable from non secure code. */
6302 else if (!stub_entry
)
6304 if (!cmse_entry_fct_p (hash
))
6306 _bfd_error_handler (_("`%s' refers to a non entry function"),
6314 /* Only stubs for SG veneers should have been created. */
6315 BFD_ASSERT (stub_entry
->stub_type
== arm_stub_cmse_branch_thumb_only
);
6317 /* Check visibility hasn't changed. */
6318 if (!!(flags
& BSF_GLOBAL
)
6319 != (hash
->root
.root
.type
== bfd_link_hash_defined
))
6321 (_("%pB: visibility of symbol `%s' has changed"), in_implib_bfd
,
6324 stub_entry
->stub_offset
= stub_offset
;
6327 /* Size should match that of a SG veneer. */
6328 if (intsym
->st_size
!= cmse_stub_size
)
6330 _bfd_error_handler (_("%pB: incorrect size for symbol `%s'"),
6331 in_implib_bfd
, sym_name
);
6335 /* Previous veneer address is before current SG veneer section. */
6336 if (veneer_value
< cmse_stub_sec_vma
)
6338 /* Avoid offset underflow. */
6340 stub_entry
->stub_offset
= 0;
6345 /* Complain if stub offset not a multiple of stub size. */
6346 if (stub_offset
% cmse_stub_size
)
6349 (_("offset of veneer for entry function `%s' not a multiple of "
6350 "its size"), sym_name
);
6357 new_cmse_stubs_created
--;
6358 if (veneer_value
< cmse_stub_array_start
)
6359 cmse_stub_array_start
= veneer_value
;
6360 next_cmse_stub_offset
= stub_offset
+ ((cmse_stub_size
+ 7) & ~7);
6361 if (next_cmse_stub_offset
> htab
->new_cmse_stub_offset
)
6362 htab
->new_cmse_stub_offset
= next_cmse_stub_offset
;
6365 if (!info
->out_implib_bfd
&& new_cmse_stubs_created
!= 0)
6367 BFD_ASSERT (new_cmse_stubs_created
> 0);
6369 (_("new entry function(s) introduced but no output import library "
6371 bfd_hash_traverse (&htab
->stub_hash_table
, arm_list_new_cmse_stub
, info
);
6374 if (cmse_stub_array_start
!= cmse_stub_sec_vma
)
6377 (_("start address of `%s' is different from previous link"),
6387 /* Determine and set the size of the stub section for a final link.
6389 The basic idea here is to examine all the relocations looking for
6390 PC-relative calls to a target that is unreachable with a "bl"
6394 elf32_arm_size_stubs (bfd
*output_bfd
,
6396 struct bfd_link_info
*info
,
6397 bfd_signed_vma group_size
,
6398 asection
* (*add_stub_section
) (const char *, asection
*,
6401 void (*layout_sections_again
) (void))
6403 bfd_boolean ret
= TRUE
;
6404 obj_attribute
*out_attr
;
6405 int cmse_stub_created
= 0;
6406 bfd_size_type stub_group_size
;
6407 bfd_boolean m_profile
, stubs_always_after_branch
, first_veneer_scan
= TRUE
;
6408 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
6409 struct a8_erratum_fix
*a8_fixes
= NULL
;
6410 unsigned int num_a8_fixes
= 0, a8_fix_table_size
= 10;
6411 struct a8_erratum_reloc
*a8_relocs
= NULL
;
6412 unsigned int num_a8_relocs
= 0, a8_reloc_table_size
= 10, i
;
6417 if (htab
->fix_cortex_a8
)
6419 a8_fixes
= (struct a8_erratum_fix
*)
6420 bfd_zmalloc (sizeof (struct a8_erratum_fix
) * a8_fix_table_size
);
6421 a8_relocs
= (struct a8_erratum_reloc
*)
6422 bfd_zmalloc (sizeof (struct a8_erratum_reloc
) * a8_reloc_table_size
);
6425 /* Propagate mach to stub bfd, because it may not have been
6426 finalized when we created stub_bfd. */
6427 bfd_set_arch_mach (stub_bfd
, bfd_get_arch (output_bfd
),
6428 bfd_get_mach (output_bfd
));
6430 /* Stash our params away. */
6431 htab
->stub_bfd
= stub_bfd
;
6432 htab
->add_stub_section
= add_stub_section
;
6433 htab
->layout_sections_again
= layout_sections_again
;
6434 stubs_always_after_branch
= group_size
< 0;
6436 out_attr
= elf_known_obj_attributes_proc (output_bfd
);
6437 m_profile
= out_attr
[Tag_CPU_arch_profile
].i
== 'M';
6439 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
6440 as the first half of a 32-bit branch straddling two 4K pages. This is a
6441 crude way of enforcing that. */
6442 if (htab
->fix_cortex_a8
)
6443 stubs_always_after_branch
= 1;
6446 stub_group_size
= -group_size
;
6448 stub_group_size
= group_size
;
6450 if (stub_group_size
== 1)
6452 /* Default values. */
6453 /* Thumb branch range is +-4MB has to be used as the default
6454 maximum size (a given section can contain both ARM and Thumb
6455 code, so the worst case has to be taken into account).
6457 This value is 24K less than that, which allows for 2025
6458 12-byte stubs. If we exceed that, then we will fail to link.
6459 The user will have to relink with an explicit group size
6461 stub_group_size
= 4170000;
6464 group_sections (htab
, stub_group_size
, stubs_always_after_branch
);
6466 /* If we're applying the cortex A8 fix, we need to determine the
6467 program header size now, because we cannot change it later --
6468 that could alter section placements. Notice the A8 erratum fix
6469 ends up requiring the section addresses to remain unchanged
6470 modulo the page size. That's something we cannot represent
6471 inside BFD, and we don't want to force the section alignment to
6472 be the page size. */
6473 if (htab
->fix_cortex_a8
)
6474 (*htab
->layout_sections_again
) ();
6479 unsigned int bfd_indx
;
6481 enum elf32_arm_stub_type stub_type
;
6482 bfd_boolean stub_changed
= FALSE
;
6483 unsigned prev_num_a8_fixes
= num_a8_fixes
;
6486 for (input_bfd
= info
->input_bfds
, bfd_indx
= 0;
6488 input_bfd
= input_bfd
->link
.next
, bfd_indx
++)
6490 Elf_Internal_Shdr
*symtab_hdr
;
6492 Elf_Internal_Sym
*local_syms
= NULL
;
6494 if (!is_arm_elf (input_bfd
))
6496 if ((input_bfd
->flags
& DYNAMIC
) != 0
6497 && (elf_sym_hashes (input_bfd
) == NULL
6498 || (elf_dyn_lib_class (input_bfd
) & DYN_AS_NEEDED
) != 0))
6503 /* We'll need the symbol table in a second. */
6504 symtab_hdr
= &elf_tdata (input_bfd
)->symtab_hdr
;
6505 if (symtab_hdr
->sh_info
== 0)
6508 /* Limit scan of symbols to object file whose profile is
6509 Microcontroller to not hinder performance in the general case. */
6510 if (m_profile
&& first_veneer_scan
)
6512 struct elf_link_hash_entry
**sym_hashes
;
6514 sym_hashes
= elf_sym_hashes (input_bfd
);
6515 if (!cmse_scan (input_bfd
, htab
, out_attr
, sym_hashes
,
6516 &cmse_stub_created
))
6517 goto error_ret_free_local
;
6519 if (cmse_stub_created
!= 0)
6520 stub_changed
= TRUE
;
6523 /* Walk over each section attached to the input bfd. */
6524 for (section
= input_bfd
->sections
;
6526 section
= section
->next
)
6528 Elf_Internal_Rela
*internal_relocs
, *irelaend
, *irela
;
6530 /* If there aren't any relocs, then there's nothing more
6532 if ((section
->flags
& SEC_RELOC
) == 0
6533 || section
->reloc_count
== 0
6534 || (section
->flags
& SEC_CODE
) == 0)
6537 /* If this section is a link-once section that will be
6538 discarded, then don't create any stubs. */
6539 if (section
->output_section
== NULL
6540 || section
->output_section
->owner
!= output_bfd
)
6543 /* Get the relocs. */
6545 = _bfd_elf_link_read_relocs (input_bfd
, section
, NULL
,
6546 NULL
, info
->keep_memory
);
6547 if (internal_relocs
== NULL
)
6548 goto error_ret_free_local
;
6550 /* Now examine each relocation. */
6551 irela
= internal_relocs
;
6552 irelaend
= irela
+ section
->reloc_count
;
6553 for (; irela
< irelaend
; irela
++)
6555 unsigned int r_type
, r_indx
;
6558 bfd_vma destination
;
6559 struct elf32_arm_link_hash_entry
*hash
;
6560 const char *sym_name
;
6561 unsigned char st_type
;
6562 enum arm_st_branch_type branch_type
;
6563 bfd_boolean created_stub
= FALSE
;
6565 r_type
= ELF32_R_TYPE (irela
->r_info
);
6566 r_indx
= ELF32_R_SYM (irela
->r_info
);
6568 if (r_type
>= (unsigned int) R_ARM_max
)
6570 bfd_set_error (bfd_error_bad_value
);
6571 error_ret_free_internal
:
6572 if (elf_section_data (section
)->relocs
== NULL
)
6573 free (internal_relocs
);
6575 error_ret_free_local
:
6576 if (symtab_hdr
->contents
!= (unsigned char *) local_syms
)
6582 if (r_indx
>= symtab_hdr
->sh_info
)
6583 hash
= elf32_arm_hash_entry
6584 (elf_sym_hashes (input_bfd
)
6585 [r_indx
- symtab_hdr
->sh_info
]);
6587 /* Only look for stubs on branch instructions, or
6588 non-relaxed TLSCALL */
6589 if ((r_type
!= (unsigned int) R_ARM_CALL
)
6590 && (r_type
!= (unsigned int) R_ARM_THM_CALL
)
6591 && (r_type
!= (unsigned int) R_ARM_JUMP24
)
6592 && (r_type
!= (unsigned int) R_ARM_THM_JUMP19
)
6593 && (r_type
!= (unsigned int) R_ARM_THM_XPC22
)
6594 && (r_type
!= (unsigned int) R_ARM_THM_JUMP24
)
6595 && (r_type
!= (unsigned int) R_ARM_PLT32
)
6596 && !((r_type
== (unsigned int) R_ARM_TLS_CALL
6597 || r_type
== (unsigned int) R_ARM_THM_TLS_CALL
)
6598 && r_type
== elf32_arm_tls_transition
6599 (info
, r_type
, &hash
->root
)
6600 && ((hash
? hash
->tls_type
6601 : (elf32_arm_local_got_tls_type
6602 (input_bfd
)[r_indx
]))
6603 & GOT_TLS_GDESC
) != 0))
6606 /* Now determine the call target, its name, value,
6613 if (r_type
== (unsigned int) R_ARM_TLS_CALL
6614 || r_type
== (unsigned int) R_ARM_THM_TLS_CALL
)
6616 /* A non-relaxed TLS call. The target is the
6617 plt-resident trampoline and nothing to do
6619 BFD_ASSERT (htab
->tls_trampoline
> 0);
6620 sym_sec
= htab
->root
.splt
;
6621 sym_value
= htab
->tls_trampoline
;
6624 branch_type
= ST_BRANCH_TO_ARM
;
6628 /* It's a local symbol. */
6629 Elf_Internal_Sym
*sym
;
6631 if (local_syms
== NULL
)
6634 = (Elf_Internal_Sym
*) symtab_hdr
->contents
;
6635 if (local_syms
== NULL
)
6637 = bfd_elf_get_elf_syms (input_bfd
, symtab_hdr
,
6638 symtab_hdr
->sh_info
, 0,
6640 if (local_syms
== NULL
)
6641 goto error_ret_free_internal
;
6644 sym
= local_syms
+ r_indx
;
6645 if (sym
->st_shndx
== SHN_UNDEF
)
6646 sym_sec
= bfd_und_section_ptr
;
6647 else if (sym
->st_shndx
== SHN_ABS
)
6648 sym_sec
= bfd_abs_section_ptr
;
6649 else if (sym
->st_shndx
== SHN_COMMON
)
6650 sym_sec
= bfd_com_section_ptr
;
6653 bfd_section_from_elf_index (input_bfd
, sym
->st_shndx
);
6656 /* This is an undefined symbol. It can never
6660 if (ELF_ST_TYPE (sym
->st_info
) != STT_SECTION
)
6661 sym_value
= sym
->st_value
;
6662 destination
= (sym_value
+ irela
->r_addend
6663 + sym_sec
->output_offset
6664 + sym_sec
->output_section
->vma
);
6665 st_type
= ELF_ST_TYPE (sym
->st_info
);
6667 ARM_GET_SYM_BRANCH_TYPE (sym
->st_target_internal
);
6669 = bfd_elf_string_from_elf_section (input_bfd
,
6670 symtab_hdr
->sh_link
,
6675 /* It's an external symbol. */
6676 while (hash
->root
.root
.type
== bfd_link_hash_indirect
6677 || hash
->root
.root
.type
== bfd_link_hash_warning
)
6678 hash
= ((struct elf32_arm_link_hash_entry
*)
6679 hash
->root
.root
.u
.i
.link
);
6681 if (hash
->root
.root
.type
== bfd_link_hash_defined
6682 || hash
->root
.root
.type
== bfd_link_hash_defweak
)
6684 sym_sec
= hash
->root
.root
.u
.def
.section
;
6685 sym_value
= hash
->root
.root
.u
.def
.value
;
6687 struct elf32_arm_link_hash_table
*globals
=
6688 elf32_arm_hash_table (info
);
6690 /* For a destination in a shared library,
6691 use the PLT stub as target address to
6692 decide whether a branch stub is
6695 && globals
->root
.splt
!= NULL
6697 && hash
->root
.plt
.offset
!= (bfd_vma
) -1)
6699 sym_sec
= globals
->root
.splt
;
6700 sym_value
= hash
->root
.plt
.offset
;
6701 if (sym_sec
->output_section
!= NULL
)
6702 destination
= (sym_value
6703 + sym_sec
->output_offset
6704 + sym_sec
->output_section
->vma
);
6706 else if (sym_sec
->output_section
!= NULL
)
6707 destination
= (sym_value
+ irela
->r_addend
6708 + sym_sec
->output_offset
6709 + sym_sec
->output_section
->vma
);
6711 else if ((hash
->root
.root
.type
== bfd_link_hash_undefined
)
6712 || (hash
->root
.root
.type
== bfd_link_hash_undefweak
))
6714 /* For a shared library, use the PLT stub as
6715 target address to decide whether a long
6716 branch stub is needed.
6717 For absolute code, they cannot be handled. */
6718 struct elf32_arm_link_hash_table
*globals
=
6719 elf32_arm_hash_table (info
);
6722 && globals
->root
.splt
!= NULL
6724 && hash
->root
.plt
.offset
!= (bfd_vma
) -1)
6726 sym_sec
= globals
->root
.splt
;
6727 sym_value
= hash
->root
.plt
.offset
;
6728 if (sym_sec
->output_section
!= NULL
)
6729 destination
= (sym_value
6730 + sym_sec
->output_offset
6731 + sym_sec
->output_section
->vma
);
6738 bfd_set_error (bfd_error_bad_value
);
6739 goto error_ret_free_internal
;
6741 st_type
= hash
->root
.type
;
6743 ARM_GET_SYM_BRANCH_TYPE (hash
->root
.target_internal
);
6744 sym_name
= hash
->root
.root
.root
.string
;
6749 bfd_boolean new_stub
;
6750 struct elf32_arm_stub_hash_entry
*stub_entry
;
6752 /* Determine what (if any) linker stub is needed. */
6753 stub_type
= arm_type_of_stub (info
, section
, irela
,
6754 st_type
, &branch_type
,
6755 hash
, destination
, sym_sec
,
6756 input_bfd
, sym_name
);
6757 if (stub_type
== arm_stub_none
)
6760 /* We've either created a stub for this reloc already,
6761 or we are about to. */
6763 elf32_arm_create_stub (htab
, stub_type
, section
, irela
,
6765 (char *) sym_name
, sym_value
,
6766 branch_type
, &new_stub
);
6768 created_stub
= stub_entry
!= NULL
;
6770 goto error_ret_free_internal
;
6774 stub_changed
= TRUE
;
6778 /* Look for relocations which might trigger Cortex-A8
6780 if (htab
->fix_cortex_a8
6781 && (r_type
== (unsigned int) R_ARM_THM_JUMP24
6782 || r_type
== (unsigned int) R_ARM_THM_JUMP19
6783 || r_type
== (unsigned int) R_ARM_THM_CALL
6784 || r_type
== (unsigned int) R_ARM_THM_XPC22
))
6786 bfd_vma from
= section
->output_section
->vma
6787 + section
->output_offset
6790 if ((from
& 0xfff) == 0xffe)
6792 /* Found a candidate. Note we haven't checked the
6793 destination is within 4K here: if we do so (and
6794 don't create an entry in a8_relocs) we can't tell
6795 that a branch should have been relocated when
6797 if (num_a8_relocs
== a8_reloc_table_size
)
6799 a8_reloc_table_size
*= 2;
6800 a8_relocs
= (struct a8_erratum_reloc
*)
6801 bfd_realloc (a8_relocs
,
6802 sizeof (struct a8_erratum_reloc
)
6803 * a8_reloc_table_size
);
6806 a8_relocs
[num_a8_relocs
].from
= from
;
6807 a8_relocs
[num_a8_relocs
].destination
= destination
;
6808 a8_relocs
[num_a8_relocs
].r_type
= r_type
;
6809 a8_relocs
[num_a8_relocs
].branch_type
= branch_type
;
6810 a8_relocs
[num_a8_relocs
].sym_name
= sym_name
;
6811 a8_relocs
[num_a8_relocs
].non_a8_stub
= created_stub
;
6812 a8_relocs
[num_a8_relocs
].hash
= hash
;
6819 /* We're done with the internal relocs, free them. */
6820 if (elf_section_data (section
)->relocs
== NULL
)
6821 free (internal_relocs
);
6824 if (htab
->fix_cortex_a8
)
6826 /* Sort relocs which might apply to Cortex-A8 erratum. */
6827 qsort (a8_relocs
, num_a8_relocs
,
6828 sizeof (struct a8_erratum_reloc
),
6831 /* Scan for branches which might trigger Cortex-A8 erratum. */
6832 if (cortex_a8_erratum_scan (input_bfd
, info
, &a8_fixes
,
6833 &num_a8_fixes
, &a8_fix_table_size
,
6834 a8_relocs
, num_a8_relocs
,
6835 prev_num_a8_fixes
, &stub_changed
)
6837 goto error_ret_free_local
;
6840 if (local_syms
!= NULL
6841 && symtab_hdr
->contents
!= (unsigned char *) local_syms
)
6843 if (!info
->keep_memory
)
6846 symtab_hdr
->contents
= (unsigned char *) local_syms
;
6850 if (first_veneer_scan
6851 && !set_cmse_veneer_addr_from_implib (info
, htab
,
6852 &cmse_stub_created
))
6855 if (prev_num_a8_fixes
!= num_a8_fixes
)
6856 stub_changed
= TRUE
;
6861 /* OK, we've added some stubs. Find out the new size of the
6863 for (stub_sec
= htab
->stub_bfd
->sections
;
6865 stub_sec
= stub_sec
->next
)
6867 /* Ignore non-stub sections. */
6868 if (!strstr (stub_sec
->name
, STUB_SUFFIX
))
6874 /* Add new SG veneers after those already in the input import
6876 for (stub_type
= arm_stub_none
+ 1; stub_type
< max_stub_type
;
6879 bfd_vma
*start_offset_p
;
6880 asection
**stub_sec_p
;
6882 start_offset_p
= arm_new_stubs_start_offset_ptr (htab
, stub_type
);
6883 stub_sec_p
= arm_dedicated_stub_input_section_ptr (htab
, stub_type
);
6884 if (start_offset_p
== NULL
)
6887 BFD_ASSERT (stub_sec_p
!= NULL
);
6888 if (*stub_sec_p
!= NULL
)
6889 (*stub_sec_p
)->size
= *start_offset_p
;
6892 /* Compute stub section size, considering padding. */
6893 bfd_hash_traverse (&htab
->stub_hash_table
, arm_size_one_stub
, htab
);
6894 for (stub_type
= arm_stub_none
+ 1; stub_type
< max_stub_type
;
6898 asection
**stub_sec_p
;
6900 padding
= arm_dedicated_stub_section_padding (stub_type
);
6901 stub_sec_p
= arm_dedicated_stub_input_section_ptr (htab
, stub_type
);
6902 /* Skip if no stub input section or no stub section padding
6904 if ((stub_sec_p
!= NULL
&& *stub_sec_p
== NULL
) || padding
== 0)
6906 /* Stub section padding required but no dedicated section. */
6907 BFD_ASSERT (stub_sec_p
);
6909 size
= (*stub_sec_p
)->size
;
6910 size
= (size
+ padding
- 1) & ~(padding
- 1);
6911 (*stub_sec_p
)->size
= size
;
6914 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
6915 if (htab
->fix_cortex_a8
)
6916 for (i
= 0; i
< num_a8_fixes
; i
++)
6918 stub_sec
= elf32_arm_create_or_find_stub_sec (NULL
,
6919 a8_fixes
[i
].section
, htab
, a8_fixes
[i
].stub_type
);
6921 if (stub_sec
== NULL
)
6925 += find_stub_size_and_template (a8_fixes
[i
].stub_type
, NULL
,
6930 /* Ask the linker to do its stuff. */
6931 (*htab
->layout_sections_again
) ();
6932 first_veneer_scan
= FALSE
;
6935 /* Add stubs for Cortex-A8 erratum fixes now. */
6936 if (htab
->fix_cortex_a8
)
6938 for (i
= 0; i
< num_a8_fixes
; i
++)
6940 struct elf32_arm_stub_hash_entry
*stub_entry
;
6941 char *stub_name
= a8_fixes
[i
].stub_name
;
6942 asection
*section
= a8_fixes
[i
].section
;
6943 unsigned int section_id
= a8_fixes
[i
].section
->id
;
6944 asection
*link_sec
= htab
->stub_group
[section_id
].link_sec
;
6945 asection
*stub_sec
= htab
->stub_group
[section_id
].stub_sec
;
6946 const insn_sequence
*template_sequence
;
6947 int template_size
, size
= 0;
6949 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
, stub_name
,
6951 if (stub_entry
== NULL
)
6953 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
6954 section
->owner
, stub_name
);
6958 stub_entry
->stub_sec
= stub_sec
;
6959 stub_entry
->stub_offset
= (bfd_vma
) -1;
6960 stub_entry
->id_sec
= link_sec
;
6961 stub_entry
->stub_type
= a8_fixes
[i
].stub_type
;
6962 stub_entry
->source_value
= a8_fixes
[i
].offset
;
6963 stub_entry
->target_section
= a8_fixes
[i
].section
;
6964 stub_entry
->target_value
= a8_fixes
[i
].target_offset
;
6965 stub_entry
->orig_insn
= a8_fixes
[i
].orig_insn
;
6966 stub_entry
->branch_type
= a8_fixes
[i
].branch_type
;
6968 size
= find_stub_size_and_template (a8_fixes
[i
].stub_type
,
6972 stub_entry
->stub_size
= size
;
6973 stub_entry
->stub_template
= template_sequence
;
6974 stub_entry
->stub_template_size
= template_size
;
6977 /* Stash the Cortex-A8 erratum fix array for use later in
6978 elf32_arm_write_section(). */
6979 htab
->a8_erratum_fixes
= a8_fixes
;
6980 htab
->num_a8_erratum_fixes
= num_a8_fixes
;
6984 htab
->a8_erratum_fixes
= NULL
;
6985 htab
->num_a8_erratum_fixes
= 0;
6990 /* Build all the stubs associated with the current output file. The
6991 stubs are kept in a hash table attached to the main linker hash
6992 table. We also set up the .plt entries for statically linked PIC
6993 functions here. This function is called via arm_elf_finish in the
6997 elf32_arm_build_stubs (struct bfd_link_info
*info
)
7000 struct bfd_hash_table
*table
;
7001 enum elf32_arm_stub_type stub_type
;
7002 struct elf32_arm_link_hash_table
*htab
;
7004 htab
= elf32_arm_hash_table (info
);
7008 for (stub_sec
= htab
->stub_bfd
->sections
;
7010 stub_sec
= stub_sec
->next
)
7014 /* Ignore non-stub sections. */
7015 if (!strstr (stub_sec
->name
, STUB_SUFFIX
))
7018 /* Allocate memory to hold the linker stubs. Zeroing the stub sections
7019 must at least be done for stub section requiring padding and for SG
7020 veneers to ensure that a non secure code branching to a removed SG
7021 veneer causes an error. */
7022 size
= stub_sec
->size
;
7023 stub_sec
->contents
= (unsigned char *) bfd_zalloc (htab
->stub_bfd
, size
);
7024 if (stub_sec
->contents
== NULL
&& size
!= 0)
7030 /* Add new SG veneers after those already in the input import library. */
7031 for (stub_type
= arm_stub_none
+ 1; stub_type
< max_stub_type
; stub_type
++)
7033 bfd_vma
*start_offset_p
;
7034 asection
**stub_sec_p
;
7036 start_offset_p
= arm_new_stubs_start_offset_ptr (htab
, stub_type
);
7037 stub_sec_p
= arm_dedicated_stub_input_section_ptr (htab
, stub_type
);
7038 if (start_offset_p
== NULL
)
7041 BFD_ASSERT (stub_sec_p
!= NULL
);
7042 if (*stub_sec_p
!= NULL
)
7043 (*stub_sec_p
)->size
= *start_offset_p
;
7046 /* Build the stubs as directed by the stub hash table. */
7047 table
= &htab
->stub_hash_table
;
7048 bfd_hash_traverse (table
, arm_build_one_stub
, info
);
7049 if (htab
->fix_cortex_a8
)
7051 /* Place the cortex a8 stubs last. */
7052 htab
->fix_cortex_a8
= -1;
7053 bfd_hash_traverse (table
, arm_build_one_stub
, info
);
7059 /* Locate the Thumb encoded calling stub for NAME. */
7061 static struct elf_link_hash_entry
*
7062 find_thumb_glue (struct bfd_link_info
*link_info
,
7064 char **error_message
)
7067 struct elf_link_hash_entry
*hash
;
7068 struct elf32_arm_link_hash_table
*hash_table
;
7070 /* We need a pointer to the armelf specific hash table. */
7071 hash_table
= elf32_arm_hash_table (link_info
);
7072 if (hash_table
== NULL
)
7075 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen (name
)
7076 + strlen (THUMB2ARM_GLUE_ENTRY_NAME
) + 1);
7078 BFD_ASSERT (tmp_name
);
7080 sprintf (tmp_name
, THUMB2ARM_GLUE_ENTRY_NAME
, name
);
7082 hash
= elf_link_hash_lookup
7083 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
7086 && asprintf (error_message
, _("unable to find %s glue '%s' for '%s'"),
7087 "Thumb", tmp_name
, name
) == -1)
7088 *error_message
= (char *) bfd_errmsg (bfd_error_system_call
);
7095 /* Locate the ARM encoded calling stub for NAME. */
7097 static struct elf_link_hash_entry
*
7098 find_arm_glue (struct bfd_link_info
*link_info
,
7100 char **error_message
)
7103 struct elf_link_hash_entry
*myh
;
7104 struct elf32_arm_link_hash_table
*hash_table
;
7106 /* We need a pointer to the elfarm specific hash table. */
7107 hash_table
= elf32_arm_hash_table (link_info
);
7108 if (hash_table
== NULL
)
7111 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen (name
)
7112 + strlen (ARM2THUMB_GLUE_ENTRY_NAME
) + 1);
7113 BFD_ASSERT (tmp_name
);
7115 sprintf (tmp_name
, ARM2THUMB_GLUE_ENTRY_NAME
, name
);
7117 myh
= elf_link_hash_lookup
7118 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
7121 && asprintf (error_message
, _("unable to find %s glue '%s' for '%s'"),
7122 "ARM", tmp_name
, name
) == -1)
7123 *error_message
= (char *) bfd_errmsg (bfd_error_system_call
);
7130 /* ARM->Thumb glue (static images):
7134 ldr r12, __func_addr
7137 .word func @ behave as if you saw a ARM_32 reloc.
7144 .word func @ behave as if you saw a ARM_32 reloc.
7146 (relocatable images)
7149 ldr r12, __func_offset
7155 #define ARM2THUMB_STATIC_GLUE_SIZE 12
7156 static const insn32 a2t1_ldr_insn
= 0xe59fc000;
7157 static const insn32 a2t2_bx_r12_insn
= 0xe12fff1c;
7158 static const insn32 a2t3_func_addr_insn
= 0x00000001;
7160 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
7161 static const insn32 a2t1v5_ldr_insn
= 0xe51ff004;
7162 static const insn32 a2t2v5_func_addr_insn
= 0x00000001;
7164 #define ARM2THUMB_PIC_GLUE_SIZE 16
7165 static const insn32 a2t1p_ldr_insn
= 0xe59fc004;
7166 static const insn32 a2t2p_add_pc_insn
= 0xe08cc00f;
7167 static const insn32 a2t3p_bx_r12_insn
= 0xe12fff1c;
7169 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
7173 __func_from_thumb: __func_from_thumb:
7175 nop ldr r6, __func_addr
7185 #define THUMB2ARM_GLUE_SIZE 8
7186 static const insn16 t2a1_bx_pc_insn
= 0x4778;
7187 static const insn16 t2a2_noop_insn
= 0x46c0;
7188 static const insn32 t2a3_b_insn
= 0xea000000;
7190 #define VFP11_ERRATUM_VENEER_SIZE 8
7191 #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16
7192 #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24
7194 #define ARM_BX_VENEER_SIZE 12
7195 static const insn32 armbx1_tst_insn
= 0xe3100001;
7196 static const insn32 armbx2_moveq_insn
= 0x01a0f000;
7197 static const insn32 armbx3_bx_insn
= 0xe12fff10;
7199 #ifndef ELFARM_NABI_C_INCLUDED
7201 arm_allocate_glue_section_space (bfd
* abfd
, bfd_size_type size
, const char * name
)
7204 bfd_byte
* contents
;
7208 /* Do not include empty glue sections in the output. */
7211 s
= bfd_get_linker_section (abfd
, name
);
7213 s
->flags
|= SEC_EXCLUDE
;
7218 BFD_ASSERT (abfd
!= NULL
);
7220 s
= bfd_get_linker_section (abfd
, name
);
7221 BFD_ASSERT (s
!= NULL
);
7223 contents
= (bfd_byte
*) bfd_zalloc (abfd
, size
);
7225 BFD_ASSERT (s
->size
== size
);
7226 s
->contents
= contents
;
7230 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info
* info
)
7232 struct elf32_arm_link_hash_table
* globals
;
7234 globals
= elf32_arm_hash_table (info
);
7235 BFD_ASSERT (globals
!= NULL
);
7237 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
7238 globals
->arm_glue_size
,
7239 ARM2THUMB_GLUE_SECTION_NAME
);
7241 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
7242 globals
->thumb_glue_size
,
7243 THUMB2ARM_GLUE_SECTION_NAME
);
7245 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
7246 globals
->vfp11_erratum_glue_size
,
7247 VFP11_ERRATUM_VENEER_SECTION_NAME
);
7249 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
7250 globals
->stm32l4xx_erratum_glue_size
,
7251 STM32L4XX_ERRATUM_VENEER_SECTION_NAME
);
7253 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
7254 globals
->bx_glue_size
,
7255 ARM_BX_GLUE_SECTION_NAME
);
7260 /* Allocate space and symbols for calling a Thumb function from Arm mode.
7261 returns the symbol identifying the stub. */
7263 static struct elf_link_hash_entry
*
7264 record_arm_to_thumb_glue (struct bfd_link_info
* link_info
,
7265 struct elf_link_hash_entry
* h
)
7267 const char * name
= h
->root
.root
.string
;
7270 struct elf_link_hash_entry
* myh
;
7271 struct bfd_link_hash_entry
* bh
;
7272 struct elf32_arm_link_hash_table
* globals
;
7276 globals
= elf32_arm_hash_table (link_info
);
7277 BFD_ASSERT (globals
!= NULL
);
7278 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
7280 s
= bfd_get_linker_section
7281 (globals
->bfd_of_glue_owner
, ARM2THUMB_GLUE_SECTION_NAME
);
7283 BFD_ASSERT (s
!= NULL
);
7285 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen (name
)
7286 + strlen (ARM2THUMB_GLUE_ENTRY_NAME
) + 1);
7287 BFD_ASSERT (tmp_name
);
7289 sprintf (tmp_name
, ARM2THUMB_GLUE_ENTRY_NAME
, name
);
7291 myh
= elf_link_hash_lookup
7292 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
7296 /* We've already seen this guy. */
7301 /* The only trick here is using hash_table->arm_glue_size as the value.
7302 Even though the section isn't allocated yet, this is where we will be
7303 putting it. The +1 on the value marks that the stub has not been
7304 output yet - not that it is a Thumb function. */
7306 val
= globals
->arm_glue_size
+ 1;
7307 _bfd_generic_link_add_one_symbol (link_info
, globals
->bfd_of_glue_owner
,
7308 tmp_name
, BSF_GLOBAL
, s
, val
,
7309 NULL
, TRUE
, FALSE
, &bh
);
7311 myh
= (struct elf_link_hash_entry
*) bh
;
7312 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
7313 myh
->forced_local
= 1;
7317 if (bfd_link_pic (link_info
)
7318 || globals
->root
.is_relocatable_executable
7319 || globals
->pic_veneer
)
7320 size
= ARM2THUMB_PIC_GLUE_SIZE
;
7321 else if (globals
->use_blx
)
7322 size
= ARM2THUMB_V5_STATIC_GLUE_SIZE
;
7324 size
= ARM2THUMB_STATIC_GLUE_SIZE
;
7327 globals
->arm_glue_size
+= size
;
7332 /* Allocate space for ARMv4 BX veneers. */
7335 record_arm_bx_glue (struct bfd_link_info
* link_info
, int reg
)
7338 struct elf32_arm_link_hash_table
*globals
;
7340 struct elf_link_hash_entry
*myh
;
7341 struct bfd_link_hash_entry
*bh
;
7344 /* BX PC does not need a veneer. */
7348 globals
= elf32_arm_hash_table (link_info
);
7349 BFD_ASSERT (globals
!= NULL
);
7350 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
7352 /* Check if this veneer has already been allocated. */
7353 if (globals
->bx_glue_offset
[reg
])
7356 s
= bfd_get_linker_section
7357 (globals
->bfd_of_glue_owner
, ARM_BX_GLUE_SECTION_NAME
);
7359 BFD_ASSERT (s
!= NULL
);
7361 /* Add symbol for veneer. */
7363 bfd_malloc ((bfd_size_type
) strlen (ARM_BX_GLUE_ENTRY_NAME
) + 1);
7364 BFD_ASSERT (tmp_name
);
7366 sprintf (tmp_name
, ARM_BX_GLUE_ENTRY_NAME
, reg
);
7368 myh
= elf_link_hash_lookup
7369 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
7371 BFD_ASSERT (myh
== NULL
);
7374 val
= globals
->bx_glue_size
;
7375 _bfd_generic_link_add_one_symbol (link_info
, globals
->bfd_of_glue_owner
,
7376 tmp_name
, BSF_FUNCTION
| BSF_LOCAL
, s
, val
,
7377 NULL
, TRUE
, FALSE
, &bh
);
7379 myh
= (struct elf_link_hash_entry
*) bh
;
7380 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
7381 myh
->forced_local
= 1;
7383 s
->size
+= ARM_BX_VENEER_SIZE
;
7384 globals
->bx_glue_offset
[reg
] = globals
->bx_glue_size
| 2;
7385 globals
->bx_glue_size
+= ARM_BX_VENEER_SIZE
;
7389 /* Add an entry to the code/data map for section SEC. */
7392 elf32_arm_section_map_add (asection
*sec
, char type
, bfd_vma vma
)
7394 struct _arm_elf_section_data
*sec_data
= elf32_arm_section_data (sec
);
7395 unsigned int newidx
;
7397 if (sec_data
->map
== NULL
)
7399 sec_data
->map
= (elf32_arm_section_map
*)
7400 bfd_malloc (sizeof (elf32_arm_section_map
));
7401 sec_data
->mapcount
= 0;
7402 sec_data
->mapsize
= 1;
7405 newidx
= sec_data
->mapcount
++;
7407 if (sec_data
->mapcount
> sec_data
->mapsize
)
7409 sec_data
->mapsize
*= 2;
7410 sec_data
->map
= (elf32_arm_section_map
*)
7411 bfd_realloc_or_free (sec_data
->map
, sec_data
->mapsize
7412 * sizeof (elf32_arm_section_map
));
7417 sec_data
->map
[newidx
].vma
= vma
;
7418 sec_data
->map
[newidx
].type
= type
;
7423 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
7424 veneers are handled for now. */
7427 record_vfp11_erratum_veneer (struct bfd_link_info
*link_info
,
7428 elf32_vfp11_erratum_list
*branch
,
7430 asection
*branch_sec
,
7431 unsigned int offset
)
7434 struct elf32_arm_link_hash_table
*hash_table
;
7436 struct elf_link_hash_entry
*myh
;
7437 struct bfd_link_hash_entry
*bh
;
7439 struct _arm_elf_section_data
*sec_data
;
7440 elf32_vfp11_erratum_list
*newerr
;
7442 hash_table
= elf32_arm_hash_table (link_info
);
7443 BFD_ASSERT (hash_table
!= NULL
);
7444 BFD_ASSERT (hash_table
->bfd_of_glue_owner
!= NULL
);
7446 s
= bfd_get_linker_section
7447 (hash_table
->bfd_of_glue_owner
, VFP11_ERRATUM_VENEER_SECTION_NAME
);
7449 sec_data
= elf32_arm_section_data (s
);
7451 BFD_ASSERT (s
!= NULL
);
7453 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen
7454 (VFP11_ERRATUM_VENEER_ENTRY_NAME
) + 10);
7455 BFD_ASSERT (tmp_name
);
7457 sprintf (tmp_name
, VFP11_ERRATUM_VENEER_ENTRY_NAME
,
7458 hash_table
->num_vfp11_fixes
);
7460 myh
= elf_link_hash_lookup
7461 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
7463 BFD_ASSERT (myh
== NULL
);
7466 val
= hash_table
->vfp11_erratum_glue_size
;
7467 _bfd_generic_link_add_one_symbol (link_info
, hash_table
->bfd_of_glue_owner
,
7468 tmp_name
, BSF_FUNCTION
| BSF_LOCAL
, s
, val
,
7469 NULL
, TRUE
, FALSE
, &bh
);
7471 myh
= (struct elf_link_hash_entry
*) bh
;
7472 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
7473 myh
->forced_local
= 1;
7475 /* Link veneer back to calling location. */
7476 sec_data
->erratumcount
+= 1;
7477 newerr
= (elf32_vfp11_erratum_list
*)
7478 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list
));
7480 newerr
->type
= VFP11_ERRATUM_ARM_VENEER
;
7482 newerr
->u
.v
.branch
= branch
;
7483 newerr
->u
.v
.id
= hash_table
->num_vfp11_fixes
;
7484 branch
->u
.b
.veneer
= newerr
;
7486 newerr
->next
= sec_data
->erratumlist
;
7487 sec_data
->erratumlist
= newerr
;
7489 /* A symbol for the return from the veneer. */
7490 sprintf (tmp_name
, VFP11_ERRATUM_VENEER_ENTRY_NAME
"_r",
7491 hash_table
->num_vfp11_fixes
);
7493 myh
= elf_link_hash_lookup
7494 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
7501 _bfd_generic_link_add_one_symbol (link_info
, branch_bfd
, tmp_name
, BSF_LOCAL
,
7502 branch_sec
, val
, NULL
, TRUE
, FALSE
, &bh
);
7504 myh
= (struct elf_link_hash_entry
*) bh
;
7505 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
7506 myh
->forced_local
= 1;
7510 /* Generate a mapping symbol for the veneer section, and explicitly add an
7511 entry for that symbol to the code/data map for the section. */
7512 if (hash_table
->vfp11_erratum_glue_size
== 0)
7515 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
7516 ever requires this erratum fix. */
7517 _bfd_generic_link_add_one_symbol (link_info
,
7518 hash_table
->bfd_of_glue_owner
, "$a",
7519 BSF_LOCAL
, s
, 0, NULL
,
7522 myh
= (struct elf_link_hash_entry
*) bh
;
7523 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_NOTYPE
);
7524 myh
->forced_local
= 1;
7526 /* The elf32_arm_init_maps function only cares about symbols from input
7527 BFDs. We must make a note of this generated mapping symbol
7528 ourselves so that code byteswapping works properly in
7529 elf32_arm_write_section. */
7530 elf32_arm_section_map_add (s
, 'a', 0);
7533 s
->size
+= VFP11_ERRATUM_VENEER_SIZE
;
7534 hash_table
->vfp11_erratum_glue_size
+= VFP11_ERRATUM_VENEER_SIZE
;
7535 hash_table
->num_vfp11_fixes
++;
7537 /* The offset of the veneer. */
7541 /* Record information about a STM32L4XX STM erratum veneer. Only THUMB-mode
7542 veneers need to be handled because used only in Cortex-M. */
7545 record_stm32l4xx_erratum_veneer (struct bfd_link_info
*link_info
,
7546 elf32_stm32l4xx_erratum_list
*branch
,
7548 asection
*branch_sec
,
7549 unsigned int offset
,
7550 bfd_size_type veneer_size
)
7553 struct elf32_arm_link_hash_table
*hash_table
;
7555 struct elf_link_hash_entry
*myh
;
7556 struct bfd_link_hash_entry
*bh
;
7558 struct _arm_elf_section_data
*sec_data
;
7559 elf32_stm32l4xx_erratum_list
*newerr
;
7561 hash_table
= elf32_arm_hash_table (link_info
);
7562 BFD_ASSERT (hash_table
!= NULL
);
7563 BFD_ASSERT (hash_table
->bfd_of_glue_owner
!= NULL
);
7565 s
= bfd_get_linker_section
7566 (hash_table
->bfd_of_glue_owner
, STM32L4XX_ERRATUM_VENEER_SECTION_NAME
);
7568 BFD_ASSERT (s
!= NULL
);
7570 sec_data
= elf32_arm_section_data (s
);
7572 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen
7573 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
) + 10);
7574 BFD_ASSERT (tmp_name
);
7576 sprintf (tmp_name
, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
,
7577 hash_table
->num_stm32l4xx_fixes
);
7579 myh
= elf_link_hash_lookup
7580 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
7582 BFD_ASSERT (myh
== NULL
);
7585 val
= hash_table
->stm32l4xx_erratum_glue_size
;
7586 _bfd_generic_link_add_one_symbol (link_info
, hash_table
->bfd_of_glue_owner
,
7587 tmp_name
, BSF_FUNCTION
| BSF_LOCAL
, s
, val
,
7588 NULL
, TRUE
, FALSE
, &bh
);
7590 myh
= (struct elf_link_hash_entry
*) bh
;
7591 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
7592 myh
->forced_local
= 1;
7594 /* Link veneer back to calling location. */
7595 sec_data
->stm32l4xx_erratumcount
+= 1;
7596 newerr
= (elf32_stm32l4xx_erratum_list
*)
7597 bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list
));
7599 newerr
->type
= STM32L4XX_ERRATUM_VENEER
;
7601 newerr
->u
.v
.branch
= branch
;
7602 newerr
->u
.v
.id
= hash_table
->num_stm32l4xx_fixes
;
7603 branch
->u
.b
.veneer
= newerr
;
7605 newerr
->next
= sec_data
->stm32l4xx_erratumlist
;
7606 sec_data
->stm32l4xx_erratumlist
= newerr
;
7608 /* A symbol for the return from the veneer. */
7609 sprintf (tmp_name
, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
"_r",
7610 hash_table
->num_stm32l4xx_fixes
);
7612 myh
= elf_link_hash_lookup
7613 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
7620 _bfd_generic_link_add_one_symbol (link_info
, branch_bfd
, tmp_name
, BSF_LOCAL
,
7621 branch_sec
, val
, NULL
, TRUE
, FALSE
, &bh
);
7623 myh
= (struct elf_link_hash_entry
*) bh
;
7624 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
7625 myh
->forced_local
= 1;
7629 /* Generate a mapping symbol for the veneer section, and explicitly add an
7630 entry for that symbol to the code/data map for the section. */
7631 if (hash_table
->stm32l4xx_erratum_glue_size
== 0)
7634 /* Creates a THUMB symbol since there is no other choice. */
7635 _bfd_generic_link_add_one_symbol (link_info
,
7636 hash_table
->bfd_of_glue_owner
, "$t",
7637 BSF_LOCAL
, s
, 0, NULL
,
7640 myh
= (struct elf_link_hash_entry
*) bh
;
7641 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_NOTYPE
);
7642 myh
->forced_local
= 1;
7644 /* The elf32_arm_init_maps function only cares about symbols from input
7645 BFDs. We must make a note of this generated mapping symbol
7646 ourselves so that code byteswapping works properly in
7647 elf32_arm_write_section. */
7648 elf32_arm_section_map_add (s
, 't', 0);
7651 s
->size
+= veneer_size
;
7652 hash_table
->stm32l4xx_erratum_glue_size
+= veneer_size
;
7653 hash_table
->num_stm32l4xx_fixes
++;
7655 /* The offset of the veneer. */
7659 #define ARM_GLUE_SECTION_FLAGS \
7660 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
7661 | SEC_READONLY | SEC_LINKER_CREATED)
7663 /* Create a fake section for use by the ARM backend of the linker. */
7666 arm_make_glue_section (bfd
* abfd
, const char * name
)
7670 sec
= bfd_get_linker_section (abfd
, name
);
7675 sec
= bfd_make_section_anyway_with_flags (abfd
, name
, ARM_GLUE_SECTION_FLAGS
);
7678 || !bfd_set_section_alignment (sec
, 2))
7681 /* Set the gc mark to prevent the section from being removed by garbage
7682 collection, despite the fact that no relocs refer to this section. */
7688 /* Set size of .plt entries. This function is called from the
7689 linker scripts in ld/emultempl/{armelf}.em. */
7692 bfd_elf32_arm_use_long_plt (void)
7694 elf32_arm_use_long_plt_entry
= TRUE
;
7697 /* Add the glue sections to ABFD. This function is called from the
7698 linker scripts in ld/emultempl/{armelf}.em. */
7701 bfd_elf32_arm_add_glue_sections_to_bfd (bfd
*abfd
,
7702 struct bfd_link_info
*info
)
7704 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (info
);
7705 bfd_boolean dostm32l4xx
= globals
7706 && globals
->stm32l4xx_fix
!= BFD_ARM_STM32L4XX_FIX_NONE
;
7707 bfd_boolean addglue
;
7709 /* If we are only performing a partial
7710 link do not bother adding the glue. */
7711 if (bfd_link_relocatable (info
))
7714 addglue
= arm_make_glue_section (abfd
, ARM2THUMB_GLUE_SECTION_NAME
)
7715 && arm_make_glue_section (abfd
, THUMB2ARM_GLUE_SECTION_NAME
)
7716 && arm_make_glue_section (abfd
, VFP11_ERRATUM_VENEER_SECTION_NAME
)
7717 && arm_make_glue_section (abfd
, ARM_BX_GLUE_SECTION_NAME
);
7723 && arm_make_glue_section (abfd
, STM32L4XX_ERRATUM_VENEER_SECTION_NAME
);
7726 /* Mark output sections of veneers needing a dedicated one with SEC_KEEP. This
7727 ensures they are not marked for deletion by
7728 strip_excluded_output_sections () when veneers are going to be created
7729 later. Not doing so would trigger assert on empty section size in
7730 lang_size_sections_1 (). */
7733 bfd_elf32_arm_keep_private_stub_output_sections (struct bfd_link_info
*info
)
7735 enum elf32_arm_stub_type stub_type
;
7737 /* If we are only performing a partial
7738 link do not bother adding the glue. */
7739 if (bfd_link_relocatable (info
))
7742 for (stub_type
= arm_stub_none
+ 1; stub_type
< max_stub_type
; stub_type
++)
7745 const char *out_sec_name
;
7747 if (!arm_dedicated_stub_output_section_required (stub_type
))
7750 out_sec_name
= arm_dedicated_stub_output_section_name (stub_type
);
7751 out_sec
= bfd_get_section_by_name (info
->output_bfd
, out_sec_name
);
7752 if (out_sec
!= NULL
)
7753 out_sec
->flags
|= SEC_KEEP
;
7757 /* Select a BFD to be used to hold the sections used by the glue code.
7758 This function is called from the linker scripts in ld/emultempl/
7762 bfd_elf32_arm_get_bfd_for_interworking (bfd
*abfd
, struct bfd_link_info
*info
)
7764 struct elf32_arm_link_hash_table
*globals
;
7766 /* If we are only performing a partial link
7767 do not bother getting a bfd to hold the glue. */
7768 if (bfd_link_relocatable (info
))
7771 /* Make sure we don't attach the glue sections to a dynamic object. */
7772 BFD_ASSERT (!(abfd
->flags
& DYNAMIC
));
7774 globals
= elf32_arm_hash_table (info
);
7775 BFD_ASSERT (globals
!= NULL
);
7777 if (globals
->bfd_of_glue_owner
!= NULL
)
7780 /* Save the bfd for later use. */
7781 globals
->bfd_of_glue_owner
= abfd
;
7787 check_use_blx (struct elf32_arm_link_hash_table
*globals
)
7791 cpu_arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
7794 if (globals
->fix_arm1176
)
7796 if (cpu_arch
== TAG_CPU_ARCH_V6T2
|| cpu_arch
> TAG_CPU_ARCH_V6K
)
7797 globals
->use_blx
= 1;
7801 if (cpu_arch
> TAG_CPU_ARCH_V4T
)
7802 globals
->use_blx
= 1;
7807 bfd_elf32_arm_process_before_allocation (bfd
*abfd
,
7808 struct bfd_link_info
*link_info
)
7810 Elf_Internal_Shdr
*symtab_hdr
;
7811 Elf_Internal_Rela
*internal_relocs
= NULL
;
7812 Elf_Internal_Rela
*irel
, *irelend
;
7813 bfd_byte
*contents
= NULL
;
7816 struct elf32_arm_link_hash_table
*globals
;
7818 /* If we are only performing a partial link do not bother
7819 to construct any glue. */
7820 if (bfd_link_relocatable (link_info
))
7823 /* Here we have a bfd that is to be included on the link. We have a
7824 hook to do reloc rummaging, before section sizes are nailed down. */
7825 globals
= elf32_arm_hash_table (link_info
);
7826 BFD_ASSERT (globals
!= NULL
);
7828 check_use_blx (globals
);
7830 if (globals
->byteswap_code
&& !bfd_big_endian (abfd
))
7832 _bfd_error_handler (_("%pB: BE8 images only valid in big-endian mode"),
7837 /* PR 5398: If we have not decided to include any loadable sections in
7838 the output then we will not have a glue owner bfd. This is OK, it
7839 just means that there is nothing else for us to do here. */
7840 if (globals
->bfd_of_glue_owner
== NULL
)
7843 /* Rummage around all the relocs and map the glue vectors. */
7844 sec
= abfd
->sections
;
7849 for (; sec
!= NULL
; sec
= sec
->next
)
7851 if (sec
->reloc_count
== 0)
7854 if ((sec
->flags
& SEC_EXCLUDE
) != 0)
7857 symtab_hdr
= & elf_symtab_hdr (abfd
);
7859 /* Load the relocs. */
7861 = _bfd_elf_link_read_relocs (abfd
, sec
, NULL
, NULL
, FALSE
);
7863 if (internal_relocs
== NULL
)
7866 irelend
= internal_relocs
+ sec
->reloc_count
;
7867 for (irel
= internal_relocs
; irel
< irelend
; irel
++)
7870 unsigned long r_index
;
7872 struct elf_link_hash_entry
*h
;
7874 r_type
= ELF32_R_TYPE (irel
->r_info
);
7875 r_index
= ELF32_R_SYM (irel
->r_info
);
7877 /* These are the only relocation types we care about. */
7878 if ( r_type
!= R_ARM_PC24
7879 && (r_type
!= R_ARM_V4BX
|| globals
->fix_v4bx
< 2))
7882 /* Get the section contents if we haven't done so already. */
7883 if (contents
== NULL
)
7885 /* Get cached copy if it exists. */
7886 if (elf_section_data (sec
)->this_hdr
.contents
!= NULL
)
7887 contents
= elf_section_data (sec
)->this_hdr
.contents
;
7890 /* Go get them off disk. */
7891 if (! bfd_malloc_and_get_section (abfd
, sec
, &contents
))
7896 if (r_type
== R_ARM_V4BX
)
7900 reg
= bfd_get_32 (abfd
, contents
+ irel
->r_offset
) & 0xf;
7901 record_arm_bx_glue (link_info
, reg
);
7905 /* If the relocation is not against a symbol it cannot concern us. */
7908 /* We don't care about local symbols. */
7909 if (r_index
< symtab_hdr
->sh_info
)
7912 /* This is an external symbol. */
7913 r_index
-= symtab_hdr
->sh_info
;
7914 h
= (struct elf_link_hash_entry
*)
7915 elf_sym_hashes (abfd
)[r_index
];
7917 /* If the relocation is against a static symbol it must be within
7918 the current section and so cannot be a cross ARM/Thumb relocation. */
7922 /* If the call will go through a PLT entry then we do not need
7924 if (globals
->root
.splt
!= NULL
&& h
->plt
.offset
!= (bfd_vma
) -1)
7930 /* This one is a call from arm code. We need to look up
7931 the target of the call. If it is a thumb target, we
7933 if (ARM_GET_SYM_BRANCH_TYPE (h
->target_internal
)
7934 == ST_BRANCH_TO_THUMB
)
7935 record_arm_to_thumb_glue (link_info
, h
);
7943 if (elf_section_data (sec
)->this_hdr
.contents
!= contents
)
7947 if (elf_section_data (sec
)->relocs
!= internal_relocs
)
7948 free (internal_relocs
);
7949 internal_relocs
= NULL
;
7955 if (elf_section_data (sec
)->this_hdr
.contents
!= contents
)
7957 if (elf_section_data (sec
)->relocs
!= internal_relocs
)
7958 free (internal_relocs
);
7965 /* Initialise maps of ARM/Thumb/data for input BFDs. */
7968 bfd_elf32_arm_init_maps (bfd
*abfd
)
7970 Elf_Internal_Sym
*isymbuf
;
7971 Elf_Internal_Shdr
*hdr
;
7972 unsigned int i
, localsyms
;
7974 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
7975 if (! is_arm_elf (abfd
))
7978 if ((abfd
->flags
& DYNAMIC
) != 0)
7981 hdr
= & elf_symtab_hdr (abfd
);
7982 localsyms
= hdr
->sh_info
;
7984 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
7985 should contain the number of local symbols, which should come before any
7986 global symbols. Mapping symbols are always local. */
7987 isymbuf
= bfd_elf_get_elf_syms (abfd
, hdr
, localsyms
, 0, NULL
, NULL
,
7990 /* No internal symbols read? Skip this BFD. */
7991 if (isymbuf
== NULL
)
7994 for (i
= 0; i
< localsyms
; i
++)
7996 Elf_Internal_Sym
*isym
= &isymbuf
[i
];
7997 asection
*sec
= bfd_section_from_elf_index (abfd
, isym
->st_shndx
);
8001 && ELF_ST_BIND (isym
->st_info
) == STB_LOCAL
)
8003 name
= bfd_elf_string_from_elf_section (abfd
,
8004 hdr
->sh_link
, isym
->st_name
);
8006 if (bfd_is_arm_special_symbol_name (name
,
8007 BFD_ARM_SPECIAL_SYM_TYPE_MAP
))
8008 elf32_arm_section_map_add (sec
, name
[1], isym
->st_value
);
8014 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
8015 say what they wanted. */
8018 bfd_elf32_arm_set_cortex_a8_fix (bfd
*obfd
, struct bfd_link_info
*link_info
)
8020 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
8021 obj_attribute
*out_attr
= elf_known_obj_attributes_proc (obfd
);
8023 if (globals
== NULL
)
8026 if (globals
->fix_cortex_a8
== -1)
8028 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
8029 if (out_attr
[Tag_CPU_arch
].i
== TAG_CPU_ARCH_V7
8030 && (out_attr
[Tag_CPU_arch_profile
].i
== 'A'
8031 || out_attr
[Tag_CPU_arch_profile
].i
== 0))
8032 globals
->fix_cortex_a8
= 1;
8034 globals
->fix_cortex_a8
= 0;
8040 bfd_elf32_arm_set_vfp11_fix (bfd
*obfd
, struct bfd_link_info
*link_info
)
8042 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
8043 obj_attribute
*out_attr
= elf_known_obj_attributes_proc (obfd
);
8045 if (globals
== NULL
)
8047 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
8048 if (out_attr
[Tag_CPU_arch
].i
>= TAG_CPU_ARCH_V7
)
8050 switch (globals
->vfp11_fix
)
8052 case BFD_ARM_VFP11_FIX_DEFAULT
:
8053 case BFD_ARM_VFP11_FIX_NONE
:
8054 globals
->vfp11_fix
= BFD_ARM_VFP11_FIX_NONE
;
8058 /* Give a warning, but do as the user requests anyway. */
8059 _bfd_error_handler (_("%pB: warning: selected VFP11 erratum "
8060 "workaround is not necessary for target architecture"), obfd
);
8063 else if (globals
->vfp11_fix
== BFD_ARM_VFP11_FIX_DEFAULT
)
8064 /* For earlier architectures, we might need the workaround, but do not
8065 enable it by default. If users is running with broken hardware, they
8066 must enable the erratum fix explicitly. */
8067 globals
->vfp11_fix
= BFD_ARM_VFP11_FIX_NONE
;
8071 bfd_elf32_arm_set_stm32l4xx_fix (bfd
*obfd
, struct bfd_link_info
*link_info
)
8073 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
8074 obj_attribute
*out_attr
= elf_known_obj_attributes_proc (obfd
);
8076 if (globals
== NULL
)
8079 /* We assume only Cortex-M4 may require the fix. */
8080 if (out_attr
[Tag_CPU_arch
].i
!= TAG_CPU_ARCH_V7E_M
8081 || out_attr
[Tag_CPU_arch_profile
].i
!= 'M')
8083 if (globals
->stm32l4xx_fix
!= BFD_ARM_STM32L4XX_FIX_NONE
)
8084 /* Give a warning, but do as the user requests anyway. */
8086 (_("%pB: warning: selected STM32L4XX erratum "
8087 "workaround is not necessary for target architecture"), obfd
);
8091 enum bfd_arm_vfp11_pipe
8099 /* Return a VFP register number. This is encoded as RX:X for single-precision
8100 registers, or X:RX for double-precision registers, where RX is the group of
8101 four bits in the instruction encoding and X is the single extension bit.
8102 RX and X fields are specified using their lowest (starting) bit. The return
8105 0...31: single-precision registers s0...s31
8106 32...63: double-precision registers d0...d31.
8108 Although X should be zero for VFP11 (encoding d0...d15 only), we might
8109 encounter VFP3 instructions, so we allow the full range for DP registers. */
8112 bfd_arm_vfp11_regno (unsigned int insn
, bfd_boolean is_double
, unsigned int rx
,
8116 return (((insn
>> rx
) & 0xf) | (((insn
>> x
) & 1) << 4)) + 32;
8118 return (((insn
>> rx
) & 0xf) << 1) | ((insn
>> x
) & 1);
8121 /* Set bits in *WMASK according to a register number REG as encoded by
8122 bfd_arm_vfp11_regno(). Ignore d16-d31. */
8125 bfd_arm_vfp11_write_mask (unsigned int *wmask
, unsigned int reg
)
8130 *wmask
|= 3 << ((reg
- 32) * 2);
8133 /* Return TRUE if WMASK overwrites anything in REGS. */
8136 bfd_arm_vfp11_antidependency (unsigned int wmask
, int *regs
, int numregs
)
8140 for (i
= 0; i
< numregs
; i
++)
8142 unsigned int reg
= regs
[i
];
8144 if (reg
< 32 && (wmask
& (1 << reg
)) != 0)
8152 if ((wmask
& (3 << (reg
* 2))) != 0)
8159 /* In this function, we're interested in two things: finding input registers
8160 for VFP data-processing instructions, and finding the set of registers which
8161 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
8162 hold the written set, so FLDM etc. are easy to deal with (we're only
8163 interested in 32 SP registers or 16 dp registers, due to the VFP version
8164 implemented by the chip in question). DP registers are marked by setting
8165 both SP registers in the write mask). */
8167 static enum bfd_arm_vfp11_pipe
8168 bfd_arm_vfp11_insn_decode (unsigned int insn
, unsigned int *destmask
, int *regs
,
8171 enum bfd_arm_vfp11_pipe vpipe
= VFP11_BAD
;
8172 bfd_boolean is_double
= ((insn
& 0xf00) == 0xb00) ? 1 : 0;
8174 if ((insn
& 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
8177 unsigned int fd
= bfd_arm_vfp11_regno (insn
, is_double
, 12, 22);
8178 unsigned int fm
= bfd_arm_vfp11_regno (insn
, is_double
, 0, 5);
8180 pqrs
= ((insn
& 0x00800000) >> 20)
8181 | ((insn
& 0x00300000) >> 19)
8182 | ((insn
& 0x00000040) >> 6);
8186 case 0: /* fmac[sd]. */
8187 case 1: /* fnmac[sd]. */
8188 case 2: /* fmsc[sd]. */
8189 case 3: /* fnmsc[sd]. */
8191 bfd_arm_vfp11_write_mask (destmask
, fd
);
8193 regs
[1] = bfd_arm_vfp11_regno (insn
, is_double
, 16, 7); /* Fn. */
8198 case 4: /* fmul[sd]. */
8199 case 5: /* fnmul[sd]. */
8200 case 6: /* fadd[sd]. */
8201 case 7: /* fsub[sd]. */
8205 case 8: /* fdiv[sd]. */
8208 bfd_arm_vfp11_write_mask (destmask
, fd
);
8209 regs
[0] = bfd_arm_vfp11_regno (insn
, is_double
, 16, 7); /* Fn. */
8214 case 15: /* extended opcode. */
8216 unsigned int extn
= ((insn
>> 15) & 0x1e)
8217 | ((insn
>> 7) & 1);
8221 case 0: /* fcpy[sd]. */
8222 case 1: /* fabs[sd]. */
8223 case 2: /* fneg[sd]. */
8224 case 8: /* fcmp[sd]. */
8225 case 9: /* fcmpe[sd]. */
8226 case 10: /* fcmpz[sd]. */
8227 case 11: /* fcmpez[sd]. */
8228 case 16: /* fuito[sd]. */
8229 case 17: /* fsito[sd]. */
8230 case 24: /* ftoui[sd]. */
8231 case 25: /* ftouiz[sd]. */
8232 case 26: /* ftosi[sd]. */
8233 case 27: /* ftosiz[sd]. */
8234 /* These instructions will not bounce due to underflow. */
8239 case 3: /* fsqrt[sd]. */
8240 /* fsqrt cannot underflow, but it can (perhaps) overwrite
8241 registers to cause the erratum in previous instructions. */
8242 bfd_arm_vfp11_write_mask (destmask
, fd
);
8246 case 15: /* fcvt{ds,sd}. */
8250 bfd_arm_vfp11_write_mask (destmask
, fd
);
8252 /* Only FCVTSD can underflow. */
8253 if ((insn
& 0x100) != 0)
8272 /* Two-register transfer. */
8273 else if ((insn
& 0x0fe00ed0) == 0x0c400a10)
8275 unsigned int fm
= bfd_arm_vfp11_regno (insn
, is_double
, 0, 5);
8277 if ((insn
& 0x100000) == 0)
8280 bfd_arm_vfp11_write_mask (destmask
, fm
);
8283 bfd_arm_vfp11_write_mask (destmask
, fm
);
8284 bfd_arm_vfp11_write_mask (destmask
, fm
+ 1);
8290 else if ((insn
& 0x0e100e00) == 0x0c100a00) /* A load insn. */
8292 int fd
= bfd_arm_vfp11_regno (insn
, is_double
, 12, 22);
8293 unsigned int puw
= ((insn
>> 21) & 0x1) | (((insn
>> 23) & 3) << 1);
8297 case 0: /* Two-reg transfer. We should catch these above. */
8300 case 2: /* fldm[sdx]. */
8304 unsigned int i
, offset
= insn
& 0xff;
8309 for (i
= fd
; i
< fd
+ offset
; i
++)
8310 bfd_arm_vfp11_write_mask (destmask
, i
);
8314 case 4: /* fld[sd]. */
8316 bfd_arm_vfp11_write_mask (destmask
, fd
);
8325 /* Single-register transfer. Note L==0. */
8326 else if ((insn
& 0x0f100e10) == 0x0e000a10)
8328 unsigned int opcode
= (insn
>> 21) & 7;
8329 unsigned int fn
= bfd_arm_vfp11_regno (insn
, is_double
, 16, 7);
8333 case 0: /* fmsr/fmdlr. */
8334 case 1: /* fmdhr. */
8335 /* Mark fmdhr and fmdlr as writing to the whole of the DP
8336 destination register. I don't know if this is exactly right,
8337 but it is the conservative choice. */
8338 bfd_arm_vfp11_write_mask (destmask
, fn
);
8352 static int elf32_arm_compare_mapping (const void * a
, const void * b
);
8355 /* Look for potentially-troublesome code sequences which might trigger the
8356 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
8357 (available from ARM) for details of the erratum. A short version is
8358 described in ld.texinfo. */
8361 bfd_elf32_arm_vfp11_erratum_scan (bfd
*abfd
, struct bfd_link_info
*link_info
)
8364 bfd_byte
*contents
= NULL
;
8366 int regs
[3], numregs
= 0;
8367 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
8368 int use_vector
= (globals
->vfp11_fix
== BFD_ARM_VFP11_FIX_VECTOR
);
8370 if (globals
== NULL
)
8373 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
8374 The states transition as follows:
8376 0 -> 1 (vector) or 0 -> 2 (scalar)
8377 A VFP FMAC-pipeline instruction has been seen. Fill
8378 regs[0]..regs[numregs-1] with its input operands. Remember this
8379 instruction in 'first_fmac'.
8382 Any instruction, except for a VFP instruction which overwrites
8387 A VFP instruction has been seen which overwrites any of regs[*].
8388 We must make a veneer! Reset state to 0 before examining next
8392 If we fail to match anything in state 2, reset to state 0 and reset
8393 the instruction pointer to the instruction after 'first_fmac'.
8395 If the VFP11 vector mode is in use, there must be at least two unrelated
8396 instructions between anti-dependent VFP11 instructions to properly avoid
8397 triggering the erratum, hence the use of the extra state 1. */
8399 /* If we are only performing a partial link do not bother
8400 to construct any glue. */
8401 if (bfd_link_relocatable (link_info
))
8404 /* Skip if this bfd does not correspond to an ELF image. */
8405 if (! is_arm_elf (abfd
))
8408 /* We should have chosen a fix type by the time we get here. */
8409 BFD_ASSERT (globals
->vfp11_fix
!= BFD_ARM_VFP11_FIX_DEFAULT
);
8411 if (globals
->vfp11_fix
== BFD_ARM_VFP11_FIX_NONE
)
8414 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8415 if ((abfd
->flags
& (EXEC_P
| DYNAMIC
)) != 0)
8418 for (sec
= abfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
8420 unsigned int i
, span
, first_fmac
= 0, veneer_of_insn
= 0;
8421 struct _arm_elf_section_data
*sec_data
;
8423 /* If we don't have executable progbits, we're not interested in this
8424 section. Also skip if section is to be excluded. */
8425 if (elf_section_type (sec
) != SHT_PROGBITS
8426 || (elf_section_flags (sec
) & SHF_EXECINSTR
) == 0
8427 || (sec
->flags
& SEC_EXCLUDE
) != 0
8428 || sec
->sec_info_type
== SEC_INFO_TYPE_JUST_SYMS
8429 || sec
->output_section
== bfd_abs_section_ptr
8430 || strcmp (sec
->name
, VFP11_ERRATUM_VENEER_SECTION_NAME
) == 0)
8433 sec_data
= elf32_arm_section_data (sec
);
8435 if (sec_data
->mapcount
== 0)
8438 if (elf_section_data (sec
)->this_hdr
.contents
!= NULL
)
8439 contents
= elf_section_data (sec
)->this_hdr
.contents
;
8440 else if (! bfd_malloc_and_get_section (abfd
, sec
, &contents
))
8443 qsort (sec_data
->map
, sec_data
->mapcount
, sizeof (elf32_arm_section_map
),
8444 elf32_arm_compare_mapping
);
8446 for (span
= 0; span
< sec_data
->mapcount
; span
++)
8448 unsigned int span_start
= sec_data
->map
[span
].vma
;
8449 unsigned int span_end
= (span
== sec_data
->mapcount
- 1)
8450 ? sec
->size
: sec_data
->map
[span
+ 1].vma
;
8451 char span_type
= sec_data
->map
[span
].type
;
8453 /* FIXME: Only ARM mode is supported at present. We may need to
8454 support Thumb-2 mode also at some point. */
8455 if (span_type
!= 'a')
8458 for (i
= span_start
; i
< span_end
;)
8460 unsigned int next_i
= i
+ 4;
8461 unsigned int insn
= bfd_big_endian (abfd
)
8462 ? (((unsigned) contents
[i
] << 24)
8463 | (contents
[i
+ 1] << 16)
8464 | (contents
[i
+ 2] << 8)
8466 : (((unsigned) contents
[i
+ 3] << 24)
8467 | (contents
[i
+ 2] << 16)
8468 | (contents
[i
+ 1] << 8)
8470 unsigned int writemask
= 0;
8471 enum bfd_arm_vfp11_pipe vpipe
;
8476 vpipe
= bfd_arm_vfp11_insn_decode (insn
, &writemask
, regs
,
8478 /* I'm assuming the VFP11 erratum can trigger with denorm
8479 operands on either the FMAC or the DS pipeline. This might
8480 lead to slightly overenthusiastic veneer insertion. */
8481 if (vpipe
== VFP11_FMAC
|| vpipe
== VFP11_DS
)
8483 state
= use_vector
? 1 : 2;
8485 veneer_of_insn
= insn
;
8491 int other_regs
[3], other_numregs
;
8492 vpipe
= bfd_arm_vfp11_insn_decode (insn
, &writemask
,
8495 if (vpipe
!= VFP11_BAD
8496 && bfd_arm_vfp11_antidependency (writemask
, regs
,
8506 int other_regs
[3], other_numregs
;
8507 vpipe
= bfd_arm_vfp11_insn_decode (insn
, &writemask
,
8510 if (vpipe
!= VFP11_BAD
8511 && bfd_arm_vfp11_antidependency (writemask
, regs
,
8517 next_i
= first_fmac
+ 4;
8523 abort (); /* Should be unreachable. */
8528 elf32_vfp11_erratum_list
*newerr
=(elf32_vfp11_erratum_list
*)
8529 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list
));
8531 elf32_arm_section_data (sec
)->erratumcount
+= 1;
8533 newerr
->u
.b
.vfp_insn
= veneer_of_insn
;
8538 newerr
->type
= VFP11_ERRATUM_BRANCH_TO_ARM_VENEER
;
8545 record_vfp11_erratum_veneer (link_info
, newerr
, abfd
, sec
,
8550 newerr
->next
= sec_data
->erratumlist
;
8551 sec_data
->erratumlist
= newerr
;
8560 if (elf_section_data (sec
)->this_hdr
.contents
!= contents
)
8568 if (elf_section_data (sec
)->this_hdr
.contents
!= contents
)
8574 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
8575 after sections have been laid out, using specially-named symbols. */
8578 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd
*abfd
,
8579 struct bfd_link_info
*link_info
)
8582 struct elf32_arm_link_hash_table
*globals
;
8585 if (bfd_link_relocatable (link_info
))
8588 /* Skip if this bfd does not correspond to an ELF image. */
8589 if (! is_arm_elf (abfd
))
8592 globals
= elf32_arm_hash_table (link_info
);
8593 if (globals
== NULL
)
8596 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen
8597 (VFP11_ERRATUM_VENEER_ENTRY_NAME
) + 10);
8598 BFD_ASSERT (tmp_name
);
8600 for (sec
= abfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
8602 struct _arm_elf_section_data
*sec_data
= elf32_arm_section_data (sec
);
8603 elf32_vfp11_erratum_list
*errnode
= sec_data
->erratumlist
;
8605 for (; errnode
!= NULL
; errnode
= errnode
->next
)
8607 struct elf_link_hash_entry
*myh
;
8610 switch (errnode
->type
)
8612 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER
:
8613 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER
:
8614 /* Find veneer symbol. */
8615 sprintf (tmp_name
, VFP11_ERRATUM_VENEER_ENTRY_NAME
,
8616 errnode
->u
.b
.veneer
->u
.v
.id
);
8618 myh
= elf_link_hash_lookup
8619 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
8622 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8623 abfd
, "VFP11", tmp_name
);
8625 vma
= myh
->root
.u
.def
.section
->output_section
->vma
8626 + myh
->root
.u
.def
.section
->output_offset
8627 + myh
->root
.u
.def
.value
;
8629 errnode
->u
.b
.veneer
->vma
= vma
;
8632 case VFP11_ERRATUM_ARM_VENEER
:
8633 case VFP11_ERRATUM_THUMB_VENEER
:
8634 /* Find return location. */
8635 sprintf (tmp_name
, VFP11_ERRATUM_VENEER_ENTRY_NAME
"_r",
8638 myh
= elf_link_hash_lookup
8639 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
8642 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8643 abfd
, "VFP11", tmp_name
);
8645 vma
= myh
->root
.u
.def
.section
->output_section
->vma
8646 + myh
->root
.u
.def
.section
->output_offset
8647 + myh
->root
.u
.def
.value
;
8649 errnode
->u
.v
.branch
->vma
= vma
;
8661 /* Find virtual-memory addresses for STM32L4XX erratum veneers and
8662 return locations after sections have been laid out, using
8663 specially-named symbols. */
8666 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd
*abfd
,
8667 struct bfd_link_info
*link_info
)
8670 struct elf32_arm_link_hash_table
*globals
;
8673 if (bfd_link_relocatable (link_info
))
8676 /* Skip if this bfd does not correspond to an ELF image. */
8677 if (! is_arm_elf (abfd
))
8680 globals
= elf32_arm_hash_table (link_info
);
8681 if (globals
== NULL
)
8684 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen
8685 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
) + 10);
8686 BFD_ASSERT (tmp_name
);
8688 for (sec
= abfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
8690 struct _arm_elf_section_data
*sec_data
= elf32_arm_section_data (sec
);
8691 elf32_stm32l4xx_erratum_list
*errnode
= sec_data
->stm32l4xx_erratumlist
;
8693 for (; errnode
!= NULL
; errnode
= errnode
->next
)
8695 struct elf_link_hash_entry
*myh
;
8698 switch (errnode
->type
)
8700 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER
:
8701 /* Find veneer symbol. */
8702 sprintf (tmp_name
, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
,
8703 errnode
->u
.b
.veneer
->u
.v
.id
);
8705 myh
= elf_link_hash_lookup
8706 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
8709 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8710 abfd
, "STM32L4XX", tmp_name
);
8712 vma
= myh
->root
.u
.def
.section
->output_section
->vma
8713 + myh
->root
.u
.def
.section
->output_offset
8714 + myh
->root
.u
.def
.value
;
8716 errnode
->u
.b
.veneer
->vma
= vma
;
8719 case STM32L4XX_ERRATUM_VENEER
:
8720 /* Find return location. */
8721 sprintf (tmp_name
, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
"_r",
8724 myh
= elf_link_hash_lookup
8725 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
8728 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8729 abfd
, "STM32L4XX", tmp_name
);
8731 vma
= myh
->root
.u
.def
.section
->output_section
->vma
8732 + myh
->root
.u
.def
.section
->output_offset
8733 + myh
->root
.u
.def
.value
;
8735 errnode
->u
.v
.branch
->vma
= vma
;
8747 static inline bfd_boolean
8748 is_thumb2_ldmia (const insn32 insn
)
8750 /* Encoding T2: LDM<c>.W <Rn>{!},<registers>
8751 1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll. */
8752 return (insn
& 0xffd02000) == 0xe8900000;
8755 static inline bfd_boolean
8756 is_thumb2_ldmdb (const insn32 insn
)
8758 /* Encoding T1: LDMDB<c> <Rn>{!},<registers>
8759 1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll. */
8760 return (insn
& 0xffd02000) == 0xe9100000;
8763 static inline bfd_boolean
8764 is_thumb2_vldm (const insn32 insn
)
8766 /* A6.5 Extension register load or store instruction
8768 We look for SP 32-bit and DP 64-bit registers.
8769 Encoding T1 VLDM{mode}<c> <Rn>{!}, <list>
8770 <list> is consecutive 64-bit registers
8771 1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii
8772 Encoding T2 VLDM{mode}<c> <Rn>{!}, <list>
8773 <list> is consecutive 32-bit registers
8774 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii
8775 if P==0 && U==1 && W==1 && Rn=1101 VPOP
8776 if PUW=010 || PUW=011 || PUW=101 VLDM. */
8778 (((insn
& 0xfe100f00) == 0xec100b00) ||
8779 ((insn
& 0xfe100f00) == 0xec100a00))
8780 && /* (IA without !). */
8781 (((((insn
<< 7) >> 28) & 0xd) == 0x4)
8782 /* (IA with !), includes VPOP (when reg number is SP). */
8783 || ((((insn
<< 7) >> 28) & 0xd) == 0x5)
8785 || ((((insn
<< 7) >> 28) & 0xd) == 0x9));
8788 /* STM STM32L4XX erratum : This function assumes that it receives an LDM or
8790 - computes the number and the mode of memory accesses
8791 - decides if the replacement should be done:
8792 . replaces only if > 8-word accesses
8793 . or (testing purposes only) replaces all accesses. */
8796 stm32l4xx_need_create_replacing_stub (const insn32 insn
,
8797 bfd_arm_stm32l4xx_fix stm32l4xx_fix
)
8801 /* The field encoding the register list is the same for both LDMIA
8802 and LDMDB encodings. */
8803 if (is_thumb2_ldmia (insn
) || is_thumb2_ldmdb (insn
))
8804 nb_words
= elf32_arm_popcount (insn
& 0x0000ffff);
8805 else if (is_thumb2_vldm (insn
))
8806 nb_words
= (insn
& 0xff);
8808 /* DEFAULT mode accounts for the real bug condition situation,
8809 ALL mode inserts stubs for each LDM/VLDM instruction (testing). */
8811 (stm32l4xx_fix
== BFD_ARM_STM32L4XX_FIX_DEFAULT
) ? nb_words
> 8 :
8812 (stm32l4xx_fix
== BFD_ARM_STM32L4XX_FIX_ALL
) ? TRUE
: FALSE
;
8815 /* Look for potentially-troublesome code sequences which might trigger
8816 the STM STM32L4XX erratum. */
8819 bfd_elf32_arm_stm32l4xx_erratum_scan (bfd
*abfd
,
8820 struct bfd_link_info
*link_info
)
8823 bfd_byte
*contents
= NULL
;
8824 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
8826 if (globals
== NULL
)
8829 /* If we are only performing a partial link do not bother
8830 to construct any glue. */
8831 if (bfd_link_relocatable (link_info
))
8834 /* Skip if this bfd does not correspond to an ELF image. */
8835 if (! is_arm_elf (abfd
))
8838 if (globals
->stm32l4xx_fix
== BFD_ARM_STM32L4XX_FIX_NONE
)
8841 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8842 if ((abfd
->flags
& (EXEC_P
| DYNAMIC
)) != 0)
8845 for (sec
= abfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
8847 unsigned int i
, span
;
8848 struct _arm_elf_section_data
*sec_data
;
8850 /* If we don't have executable progbits, we're not interested in this
8851 section. Also skip if section is to be excluded. */
8852 if (elf_section_type (sec
) != SHT_PROGBITS
8853 || (elf_section_flags (sec
) & SHF_EXECINSTR
) == 0
8854 || (sec
->flags
& SEC_EXCLUDE
) != 0
8855 || sec
->sec_info_type
== SEC_INFO_TYPE_JUST_SYMS
8856 || sec
->output_section
== bfd_abs_section_ptr
8857 || strcmp (sec
->name
, STM32L4XX_ERRATUM_VENEER_SECTION_NAME
) == 0)
8860 sec_data
= elf32_arm_section_data (sec
);
8862 if (sec_data
->mapcount
== 0)
8865 if (elf_section_data (sec
)->this_hdr
.contents
!= NULL
)
8866 contents
= elf_section_data (sec
)->this_hdr
.contents
;
8867 else if (! bfd_malloc_and_get_section (abfd
, sec
, &contents
))
8870 qsort (sec_data
->map
, sec_data
->mapcount
, sizeof (elf32_arm_section_map
),
8871 elf32_arm_compare_mapping
);
8873 for (span
= 0; span
< sec_data
->mapcount
; span
++)
8875 unsigned int span_start
= sec_data
->map
[span
].vma
;
8876 unsigned int span_end
= (span
== sec_data
->mapcount
- 1)
8877 ? sec
->size
: sec_data
->map
[span
+ 1].vma
;
8878 char span_type
= sec_data
->map
[span
].type
;
8879 int itblock_current_pos
= 0;
8881 /* Only Thumb2 mode need be supported with this CM4 specific
8882 code, we should not encounter any arm mode eg span_type
8884 if (span_type
!= 't')
8887 for (i
= span_start
; i
< span_end
;)
8889 unsigned int insn
= bfd_get_16 (abfd
, &contents
[i
]);
8890 bfd_boolean insn_32bit
= FALSE
;
8891 bfd_boolean is_ldm
= FALSE
;
8892 bfd_boolean is_vldm
= FALSE
;
8893 bfd_boolean is_not_last_in_it_block
= FALSE
;
8895 /* The first 16-bits of all 32-bit thumb2 instructions start
8896 with opcode[15..13]=0b111 and the encoded op1 can be anything
8897 except opcode[12..11]!=0b00.
8898 See 32-bit Thumb instruction encoding. */
8899 if ((insn
& 0xe000) == 0xe000 && (insn
& 0x1800) != 0x0000)
8902 /* Compute the predicate that tells if the instruction
8903 is concerned by the IT block
8904 - Creates an error if there is a ldm that is not
8905 last in the IT block thus cannot be replaced
8906 - Otherwise we can create a branch at the end of the
8907 IT block, it will be controlled naturally by IT
8908 with the proper pseudo-predicate
8909 - So the only interesting predicate is the one that
8910 tells that we are not on the last item of an IT
8912 if (itblock_current_pos
!= 0)
8913 is_not_last_in_it_block
= !!--itblock_current_pos
;
8917 /* Load the rest of the insn (in manual-friendly order). */
8918 insn
= (insn
<< 16) | bfd_get_16 (abfd
, &contents
[i
+ 2]);
8919 is_ldm
= is_thumb2_ldmia (insn
) || is_thumb2_ldmdb (insn
);
8920 is_vldm
= is_thumb2_vldm (insn
);
8922 /* Veneers are created for (v)ldm depending on
8923 option flags and memory accesses conditions; but
8924 if the instruction is not the last instruction of
8925 an IT block, we cannot create a jump there, so we
8927 if ((is_ldm
|| is_vldm
)
8928 && stm32l4xx_need_create_replacing_stub
8929 (insn
, globals
->stm32l4xx_fix
))
8931 if (is_not_last_in_it_block
)
8934 /* xgettext:c-format */
8935 (_("%pB(%pA+%#x): error: multiple load detected"
8936 " in non-last IT block instruction:"
8937 " STM32L4XX veneer cannot be generated; "
8938 "use gcc option -mrestrict-it to generate"
8939 " only one instruction per IT block"),
8944 elf32_stm32l4xx_erratum_list
*newerr
=
8945 (elf32_stm32l4xx_erratum_list
*)
8947 (sizeof (elf32_stm32l4xx_erratum_list
));
8949 elf32_arm_section_data (sec
)
8950 ->stm32l4xx_erratumcount
+= 1;
8951 newerr
->u
.b
.insn
= insn
;
8952 /* We create only thumb branches. */
8954 STM32L4XX_ERRATUM_BRANCH_TO_VENEER
;
8955 record_stm32l4xx_erratum_veneer
8956 (link_info
, newerr
, abfd
, sec
,
8959 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
:
8960 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE
);
8962 newerr
->next
= sec_data
->stm32l4xx_erratumlist
;
8963 sec_data
->stm32l4xx_erratumlist
= newerr
;
8970 IT blocks are only encoded in T1
8971 Encoding T1: IT{x{y{z}}} <firstcond>
8972 1 0 1 1 - 1 1 1 1 - firstcond - mask
8973 if mask = '0000' then see 'related encodings'
8974 We don't deal with UNPREDICTABLE, just ignore these.
8975 There can be no nested IT blocks so an IT block
8976 is naturally a new one for which it is worth
8977 computing its size. */
8978 bfd_boolean is_newitblock
= ((insn
& 0xff00) == 0xbf00)
8979 && ((insn
& 0x000f) != 0x0000);
8980 /* If we have a new IT block we compute its size. */
8983 /* Compute the number of instructions controlled
8984 by the IT block, it will be used to decide
8985 whether we are inside an IT block or not. */
8986 unsigned int mask
= insn
& 0x000f;
8987 itblock_current_pos
= 4 - ctz (mask
);
8991 i
+= insn_32bit
? 4 : 2;
8995 if (elf_section_data (sec
)->this_hdr
.contents
!= contents
)
9003 if (elf_section_data (sec
)->this_hdr
.contents
!= contents
)
9009 /* Set target relocation values needed during linking. */
9012 bfd_elf32_arm_set_target_params (struct bfd
*output_bfd
,
9013 struct bfd_link_info
*link_info
,
9014 struct elf32_arm_params
*params
)
9016 struct elf32_arm_link_hash_table
*globals
;
9018 globals
= elf32_arm_hash_table (link_info
);
9019 if (globals
== NULL
)
9022 globals
->target1_is_rel
= params
->target1_is_rel
;
9023 if (globals
->fdpic_p
)
9024 globals
->target2_reloc
= R_ARM_GOT32
;
9025 else if (strcmp (params
->target2_type
, "rel") == 0)
9026 globals
->target2_reloc
= R_ARM_REL32
;
9027 else if (strcmp (params
->target2_type
, "abs") == 0)
9028 globals
->target2_reloc
= R_ARM_ABS32
;
9029 else if (strcmp (params
->target2_type
, "got-rel") == 0)
9030 globals
->target2_reloc
= R_ARM_GOT_PREL
;
9033 _bfd_error_handler (_("invalid TARGET2 relocation type '%s'"),
9034 params
->target2_type
);
9036 globals
->fix_v4bx
= params
->fix_v4bx
;
9037 globals
->use_blx
|= params
->use_blx
;
9038 globals
->vfp11_fix
= params
->vfp11_denorm_fix
;
9039 globals
->stm32l4xx_fix
= params
->stm32l4xx_fix
;
9040 if (globals
->fdpic_p
)
9041 globals
->pic_veneer
= 1;
9043 globals
->pic_veneer
= params
->pic_veneer
;
9044 globals
->fix_cortex_a8
= params
->fix_cortex_a8
;
9045 globals
->fix_arm1176
= params
->fix_arm1176
;
9046 globals
->cmse_implib
= params
->cmse_implib
;
9047 globals
->in_implib_bfd
= params
->in_implib_bfd
;
9049 BFD_ASSERT (is_arm_elf (output_bfd
));
9050 elf_arm_tdata (output_bfd
)->no_enum_size_warning
9051 = params
->no_enum_size_warning
;
9052 elf_arm_tdata (output_bfd
)->no_wchar_size_warning
9053 = params
->no_wchar_size_warning
;
9056 /* Replace the target offset of a Thumb bl or b.w instruction. */
9059 insert_thumb_branch (bfd
*abfd
, long int offset
, bfd_byte
*insn
)
9065 BFD_ASSERT ((offset
& 1) == 0);
9067 upper
= bfd_get_16 (abfd
, insn
);
9068 lower
= bfd_get_16 (abfd
, insn
+ 2);
9069 reloc_sign
= (offset
< 0) ? 1 : 0;
9070 upper
= (upper
& ~(bfd_vma
) 0x7ff)
9071 | ((offset
>> 12) & 0x3ff)
9072 | (reloc_sign
<< 10);
9073 lower
= (lower
& ~(bfd_vma
) 0x2fff)
9074 | (((!((offset
>> 23) & 1)) ^ reloc_sign
) << 13)
9075 | (((!((offset
>> 22) & 1)) ^ reloc_sign
) << 11)
9076 | ((offset
>> 1) & 0x7ff);
9077 bfd_put_16 (abfd
, upper
, insn
);
9078 bfd_put_16 (abfd
, lower
, insn
+ 2);
9081 /* Thumb code calling an ARM function. */
9084 elf32_thumb_to_arm_stub (struct bfd_link_info
* info
,
9088 asection
* input_section
,
9089 bfd_byte
* hit_data
,
9092 bfd_signed_vma addend
,
9094 char **error_message
)
9098 long int ret_offset
;
9099 struct elf_link_hash_entry
* myh
;
9100 struct elf32_arm_link_hash_table
* globals
;
9102 myh
= find_thumb_glue (info
, name
, error_message
);
9106 globals
= elf32_arm_hash_table (info
);
9107 BFD_ASSERT (globals
!= NULL
);
9108 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
9110 my_offset
= myh
->root
.u
.def
.value
;
9112 s
= bfd_get_linker_section (globals
->bfd_of_glue_owner
,
9113 THUMB2ARM_GLUE_SECTION_NAME
);
9115 BFD_ASSERT (s
!= NULL
);
9116 BFD_ASSERT (s
->contents
!= NULL
);
9117 BFD_ASSERT (s
->output_section
!= NULL
);
9119 if ((my_offset
& 0x01) == 0x01)
9122 && sym_sec
->owner
!= NULL
9123 && !INTERWORK_FLAG (sym_sec
->owner
))
9126 (_("%pB(%s): warning: interworking not enabled;"
9127 " first occurrence: %pB: %s call to %s"),
9128 sym_sec
->owner
, name
, input_bfd
, "Thumb", "ARM");
9134 myh
->root
.u
.def
.value
= my_offset
;
9136 put_thumb_insn (globals
, output_bfd
, (bfd_vma
) t2a1_bx_pc_insn
,
9137 s
->contents
+ my_offset
);
9139 put_thumb_insn (globals
, output_bfd
, (bfd_vma
) t2a2_noop_insn
,
9140 s
->contents
+ my_offset
+ 2);
9143 /* Address of destination of the stub. */
9144 ((bfd_signed_vma
) val
)
9146 /* Offset from the start of the current section
9147 to the start of the stubs. */
9149 /* Offset of the start of this stub from the start of the stubs. */
9151 /* Address of the start of the current section. */
9152 + s
->output_section
->vma
)
9153 /* The branch instruction is 4 bytes into the stub. */
9155 /* ARM branches work from the pc of the instruction + 8. */
9158 put_arm_insn (globals
, output_bfd
,
9159 (bfd_vma
) t2a3_b_insn
| ((ret_offset
>> 2) & 0x00FFFFFF),
9160 s
->contents
+ my_offset
+ 4);
9163 BFD_ASSERT (my_offset
<= globals
->thumb_glue_size
);
9165 /* Now go back and fix up the original BL insn to point to here. */
9167 /* Address of where the stub is located. */
9168 (s
->output_section
->vma
+ s
->output_offset
+ my_offset
)
9169 /* Address of where the BL is located. */
9170 - (input_section
->output_section
->vma
+ input_section
->output_offset
9172 /* Addend in the relocation. */
9174 /* Biassing for PC-relative addressing. */
9177 insert_thumb_branch (input_bfd
, ret_offset
, hit_data
- input_section
->vma
);
9182 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
9184 static struct elf_link_hash_entry
*
9185 elf32_arm_create_thumb_stub (struct bfd_link_info
* info
,
9192 char ** error_message
)
9195 long int ret_offset
;
9196 struct elf_link_hash_entry
* myh
;
9197 struct elf32_arm_link_hash_table
* globals
;
9199 myh
= find_arm_glue (info
, name
, error_message
);
9203 globals
= elf32_arm_hash_table (info
);
9204 BFD_ASSERT (globals
!= NULL
);
9205 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
9207 my_offset
= myh
->root
.u
.def
.value
;
9209 if ((my_offset
& 0x01) == 0x01)
9212 && sym_sec
->owner
!= NULL
9213 && !INTERWORK_FLAG (sym_sec
->owner
))
9216 (_("%pB(%s): warning: interworking not enabled;"
9217 " first occurrence: %pB: %s call to %s"),
9218 sym_sec
->owner
, name
, input_bfd
, "ARM", "Thumb");
9222 myh
->root
.u
.def
.value
= my_offset
;
9224 if (bfd_link_pic (info
)
9225 || globals
->root
.is_relocatable_executable
9226 || globals
->pic_veneer
)
9228 /* For relocatable objects we can't use absolute addresses,
9229 so construct the address from a relative offset. */
9230 /* TODO: If the offset is small it's probably worth
9231 constructing the address with adds. */
9232 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t1p_ldr_insn
,
9233 s
->contents
+ my_offset
);
9234 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t2p_add_pc_insn
,
9235 s
->contents
+ my_offset
+ 4);
9236 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t3p_bx_r12_insn
,
9237 s
->contents
+ my_offset
+ 8);
9238 /* Adjust the offset by 4 for the position of the add,
9239 and 8 for the pipeline offset. */
9240 ret_offset
= (val
- (s
->output_offset
9241 + s
->output_section
->vma
9244 bfd_put_32 (output_bfd
, ret_offset
,
9245 s
->contents
+ my_offset
+ 12);
9247 else if (globals
->use_blx
)
9249 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t1v5_ldr_insn
,
9250 s
->contents
+ my_offset
);
9252 /* It's a thumb address. Add the low order bit. */
9253 bfd_put_32 (output_bfd
, val
| a2t2v5_func_addr_insn
,
9254 s
->contents
+ my_offset
+ 4);
9258 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t1_ldr_insn
,
9259 s
->contents
+ my_offset
);
9261 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t2_bx_r12_insn
,
9262 s
->contents
+ my_offset
+ 4);
9264 /* It's a thumb address. Add the low order bit. */
9265 bfd_put_32 (output_bfd
, val
| a2t3_func_addr_insn
,
9266 s
->contents
+ my_offset
+ 8);
9272 BFD_ASSERT (my_offset
<= globals
->arm_glue_size
);
9277 /* Arm code calling a Thumb function. */
9280 elf32_arm_to_thumb_stub (struct bfd_link_info
* info
,
9284 asection
* input_section
,
9285 bfd_byte
* hit_data
,
9288 bfd_signed_vma addend
,
9290 char **error_message
)
9292 unsigned long int tmp
;
9295 long int ret_offset
;
9296 struct elf_link_hash_entry
* myh
;
9297 struct elf32_arm_link_hash_table
* globals
;
9299 globals
= elf32_arm_hash_table (info
);
9300 BFD_ASSERT (globals
!= NULL
);
9301 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
9303 s
= bfd_get_linker_section (globals
->bfd_of_glue_owner
,
9304 ARM2THUMB_GLUE_SECTION_NAME
);
9305 BFD_ASSERT (s
!= NULL
);
9306 BFD_ASSERT (s
->contents
!= NULL
);
9307 BFD_ASSERT (s
->output_section
!= NULL
);
9309 myh
= elf32_arm_create_thumb_stub (info
, name
, input_bfd
, output_bfd
,
9310 sym_sec
, val
, s
, error_message
);
9314 my_offset
= myh
->root
.u
.def
.value
;
9315 tmp
= bfd_get_32 (input_bfd
, hit_data
);
9316 tmp
= tmp
& 0xFF000000;
9318 /* Somehow these are both 4 too far, so subtract 8. */
9319 ret_offset
= (s
->output_offset
9321 + s
->output_section
->vma
9322 - (input_section
->output_offset
9323 + input_section
->output_section
->vma
9327 tmp
= tmp
| ((ret_offset
>> 2) & 0x00FFFFFF);
9329 bfd_put_32 (output_bfd
, (bfd_vma
) tmp
, hit_data
- input_section
->vma
);
9334 /* Populate Arm stub for an exported Thumb function. */
9337 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry
*h
, void * inf
)
9339 struct bfd_link_info
* info
= (struct bfd_link_info
*) inf
;
9341 struct elf_link_hash_entry
* myh
;
9342 struct elf32_arm_link_hash_entry
*eh
;
9343 struct elf32_arm_link_hash_table
* globals
;
9346 char *error_message
;
9348 eh
= elf32_arm_hash_entry (h
);
9349 /* Allocate stubs for exported Thumb functions on v4t. */
9350 if (eh
->export_glue
== NULL
)
9353 globals
= elf32_arm_hash_table (info
);
9354 BFD_ASSERT (globals
!= NULL
);
9355 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
9357 s
= bfd_get_linker_section (globals
->bfd_of_glue_owner
,
9358 ARM2THUMB_GLUE_SECTION_NAME
);
9359 BFD_ASSERT (s
!= NULL
);
9360 BFD_ASSERT (s
->contents
!= NULL
);
9361 BFD_ASSERT (s
->output_section
!= NULL
);
9363 sec
= eh
->export_glue
->root
.u
.def
.section
;
9365 BFD_ASSERT (sec
->output_section
!= NULL
);
9367 val
= eh
->export_glue
->root
.u
.def
.value
+ sec
->output_offset
9368 + sec
->output_section
->vma
;
9370 myh
= elf32_arm_create_thumb_stub (info
, h
->root
.root
.string
,
9371 h
->root
.u
.def
.section
->owner
,
9372 globals
->obfd
, sec
, val
, s
,
9378 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
9381 elf32_arm_bx_glue (struct bfd_link_info
* info
, int reg
)
9386 struct elf32_arm_link_hash_table
*globals
;
9388 globals
= elf32_arm_hash_table (info
);
9389 BFD_ASSERT (globals
!= NULL
);
9390 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
9392 s
= bfd_get_linker_section (globals
->bfd_of_glue_owner
,
9393 ARM_BX_GLUE_SECTION_NAME
);
9394 BFD_ASSERT (s
!= NULL
);
9395 BFD_ASSERT (s
->contents
!= NULL
);
9396 BFD_ASSERT (s
->output_section
!= NULL
);
9398 BFD_ASSERT (globals
->bx_glue_offset
[reg
] & 2);
9400 glue_addr
= globals
->bx_glue_offset
[reg
] & ~(bfd_vma
)3;
9402 if ((globals
->bx_glue_offset
[reg
] & 1) == 0)
9404 p
= s
->contents
+ glue_addr
;
9405 bfd_put_32 (globals
->obfd
, armbx1_tst_insn
+ (reg
<< 16), p
);
9406 bfd_put_32 (globals
->obfd
, armbx2_moveq_insn
+ reg
, p
+ 4);
9407 bfd_put_32 (globals
->obfd
, armbx3_bx_insn
+ reg
, p
+ 8);
9408 globals
->bx_glue_offset
[reg
] |= 1;
9411 return glue_addr
+ s
->output_section
->vma
+ s
->output_offset
;
9414 /* Generate Arm stubs for exported Thumb symbols. */
9416 elf32_arm_begin_write_processing (bfd
*abfd ATTRIBUTE_UNUSED
,
9417 struct bfd_link_info
*link_info
)
9419 struct elf32_arm_link_hash_table
* globals
;
9421 if (link_info
== NULL
)
9422 /* Ignore this if we are not called by the ELF backend linker. */
9425 globals
= elf32_arm_hash_table (link_info
);
9426 if (globals
== NULL
)
9429 /* If blx is available then exported Thumb symbols are OK and there is
9431 if (globals
->use_blx
)
9434 elf_link_hash_traverse (&globals
->root
, elf32_arm_to_thumb_export_stub
,
9438 /* Reserve space for COUNT dynamic relocations in relocation selection
9442 elf32_arm_allocate_dynrelocs (struct bfd_link_info
*info
, asection
*sreloc
,
9443 bfd_size_type count
)
9445 struct elf32_arm_link_hash_table
*htab
;
9447 htab
= elf32_arm_hash_table (info
);
9448 BFD_ASSERT (htab
->root
.dynamic_sections_created
);
9451 sreloc
->size
+= RELOC_SIZE (htab
) * count
;
9454 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
9455 dynamic, the relocations should go in SRELOC, otherwise they should
9456 go in the special .rel.iplt section. */
9459 elf32_arm_allocate_irelocs (struct bfd_link_info
*info
, asection
*sreloc
,
9460 bfd_size_type count
)
9462 struct elf32_arm_link_hash_table
*htab
;
9464 htab
= elf32_arm_hash_table (info
);
9465 if (!htab
->root
.dynamic_sections_created
)
9466 htab
->root
.irelplt
->size
+= RELOC_SIZE (htab
) * count
;
9469 BFD_ASSERT (sreloc
!= NULL
);
9470 sreloc
->size
+= RELOC_SIZE (htab
) * count
;
9474 /* Add relocation REL to the end of relocation section SRELOC. */
9477 elf32_arm_add_dynreloc (bfd
*output_bfd
, struct bfd_link_info
*info
,
9478 asection
*sreloc
, Elf_Internal_Rela
*rel
)
9481 struct elf32_arm_link_hash_table
*htab
;
9483 htab
= elf32_arm_hash_table (info
);
9484 if (!htab
->root
.dynamic_sections_created
9485 && ELF32_R_TYPE (rel
->r_info
) == R_ARM_IRELATIVE
)
9486 sreloc
= htab
->root
.irelplt
;
9489 loc
= sreloc
->contents
;
9490 loc
+= sreloc
->reloc_count
++ * RELOC_SIZE (htab
);
9491 if (sreloc
->reloc_count
* RELOC_SIZE (htab
) > sreloc
->size
)
9493 SWAP_RELOC_OUT (htab
) (output_bfd
, rel
, loc
);
9496 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
9497 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
9501 elf32_arm_allocate_plt_entry (struct bfd_link_info
*info
,
9502 bfd_boolean is_iplt_entry
,
9503 union gotplt_union
*root_plt
,
9504 struct arm_plt_info
*arm_plt
)
9506 struct elf32_arm_link_hash_table
*htab
;
9510 htab
= elf32_arm_hash_table (info
);
9514 splt
= htab
->root
.iplt
;
9515 sgotplt
= htab
->root
.igotplt
;
9517 /* NaCl uses a special first entry in .iplt too. */
9518 if (htab
->root
.target_os
== is_nacl
&& splt
->size
== 0)
9519 splt
->size
+= htab
->plt_header_size
;
9521 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
9522 elf32_arm_allocate_irelocs (info
, htab
->root
.irelplt
, 1);
9526 splt
= htab
->root
.splt
;
9527 sgotplt
= htab
->root
.sgotplt
;
9531 /* Allocate room for R_ARM_FUNCDESC_VALUE. */
9532 /* For lazy binding, relocations will be put into .rel.plt, in
9533 .rel.got otherwise. */
9534 /* FIXME: today we don't support lazy binding so put it in .rel.got */
9535 if (info
->flags
& DF_BIND_NOW
)
9536 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
9538 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelplt
, 1);
9542 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
9543 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelplt
, 1);
9546 /* If this is the first .plt entry, make room for the special
9548 if (splt
->size
== 0)
9549 splt
->size
+= htab
->plt_header_size
;
9551 htab
->next_tls_desc_index
++;
9554 /* Allocate the PLT entry itself, including any leading Thumb stub. */
9555 if (elf32_arm_plt_needs_thumb_stub_p (info
, arm_plt
))
9556 splt
->size
+= PLT_THUMB_STUB_SIZE
;
9557 root_plt
->offset
= splt
->size
;
9558 splt
->size
+= htab
->plt_entry_size
;
9560 if (htab
->root
.target_os
!= is_symbian
)
9562 /* We also need to make an entry in the .got.plt section, which
9563 will be placed in the .got section by the linker script. */
9565 arm_plt
->got_offset
= sgotplt
->size
;
9567 arm_plt
->got_offset
= sgotplt
->size
- 8 * htab
->num_tls_desc
;
9569 /* Function descriptor takes 64 bits in GOT. */
9577 arm_movw_immediate (bfd_vma value
)
9579 return (value
& 0x00000fff) | ((value
& 0x0000f000) << 4);
9583 arm_movt_immediate (bfd_vma value
)
9585 return ((value
& 0x0fff0000) >> 16) | ((value
& 0xf0000000) >> 12);
9588 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
9589 the entry lives in .iplt and resolves to (*SYM_VALUE)().
9590 Otherwise, DYNINDX is the index of the symbol in the dynamic
9591 symbol table and SYM_VALUE is undefined.
9593 ROOT_PLT points to the offset of the PLT entry from the start of its
9594 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
9595 bookkeeping information.
9597 Returns FALSE if there was a problem. */
9600 elf32_arm_populate_plt_entry (bfd
*output_bfd
, struct bfd_link_info
*info
,
9601 union gotplt_union
*root_plt
,
9602 struct arm_plt_info
*arm_plt
,
9603 int dynindx
, bfd_vma sym_value
)
9605 struct elf32_arm_link_hash_table
*htab
;
9611 Elf_Internal_Rela rel
;
9612 bfd_vma plt_header_size
;
9613 bfd_vma got_header_size
;
9615 htab
= elf32_arm_hash_table (info
);
9617 /* Pick the appropriate sections and sizes. */
9620 splt
= htab
->root
.iplt
;
9621 sgot
= htab
->root
.igotplt
;
9622 srel
= htab
->root
.irelplt
;
9624 /* There are no reserved entries in .igot.plt, and no special
9625 first entry in .iplt. */
9626 got_header_size
= 0;
9627 plt_header_size
= 0;
9631 splt
= htab
->root
.splt
;
9632 sgot
= htab
->root
.sgotplt
;
9633 srel
= htab
->root
.srelplt
;
9635 got_header_size
= get_elf_backend_data (output_bfd
)->got_header_size
;
9636 plt_header_size
= htab
->plt_header_size
;
9638 BFD_ASSERT (splt
!= NULL
&& srel
!= NULL
);
9640 /* Fill in the entry in the procedure linkage table. */
9641 if (htab
->root
.target_os
== is_symbian
)
9643 BFD_ASSERT (dynindx
>= 0);
9644 put_arm_insn (htab
, output_bfd
,
9645 elf32_arm_symbian_plt_entry
[0],
9646 splt
->contents
+ root_plt
->offset
);
9647 bfd_put_32 (output_bfd
,
9648 elf32_arm_symbian_plt_entry
[1],
9649 splt
->contents
+ root_plt
->offset
+ 4);
9651 /* Fill in the entry in the .rel.plt section. */
9652 rel
.r_offset
= (splt
->output_section
->vma
9653 + splt
->output_offset
9654 + root_plt
->offset
+ 4);
9655 rel
.r_info
= ELF32_R_INFO (dynindx
, R_ARM_GLOB_DAT
);
9657 /* Get the index in the procedure linkage table which
9658 corresponds to this symbol. This is the index of this symbol
9659 in all the symbols for which we are making plt entries. The
9660 first entry in the procedure linkage table is reserved. */
9661 plt_index
= ((root_plt
->offset
- plt_header_size
)
9662 / htab
->plt_entry_size
);
9666 bfd_vma got_offset
, got_address
, plt_address
;
9667 bfd_vma got_displacement
, initial_got_entry
;
9670 BFD_ASSERT (sgot
!= NULL
);
9672 /* Get the offset into the .(i)got.plt table of the entry that
9673 corresponds to this function. */
9674 got_offset
= (arm_plt
->got_offset
& -2);
9676 /* Get the index in the procedure linkage table which
9677 corresponds to this symbol. This is the index of this symbol
9678 in all the symbols for which we are making plt entries.
9679 After the reserved .got.plt entries, all symbols appear in
9680 the same order as in .plt. */
9682 /* Function descriptor takes 8 bytes. */
9683 plt_index
= (got_offset
- got_header_size
) / 8;
9685 plt_index
= (got_offset
- got_header_size
) / 4;
9687 /* Calculate the address of the GOT entry. */
9688 got_address
= (sgot
->output_section
->vma
9689 + sgot
->output_offset
9692 /* ...and the address of the PLT entry. */
9693 plt_address
= (splt
->output_section
->vma
9694 + splt
->output_offset
9695 + root_plt
->offset
);
9697 ptr
= splt
->contents
+ root_plt
->offset
;
9698 if (htab
->root
.target_os
== is_vxworks
&& bfd_link_pic (info
))
9703 for (i
= 0; i
!= htab
->plt_entry_size
/ 4; i
++, ptr
+= 4)
9705 val
= elf32_arm_vxworks_shared_plt_entry
[i
];
9707 val
|= got_address
- sgot
->output_section
->vma
;
9709 val
|= plt_index
* RELOC_SIZE (htab
);
9710 if (i
== 2 || i
== 5)
9711 bfd_put_32 (output_bfd
, val
, ptr
);
9713 put_arm_insn (htab
, output_bfd
, val
, ptr
);
9716 else if (htab
->root
.target_os
== is_vxworks
)
9721 for (i
= 0; i
!= htab
->plt_entry_size
/ 4; i
++, ptr
+= 4)
9723 val
= elf32_arm_vxworks_exec_plt_entry
[i
];
9727 val
|= 0xffffff & -((root_plt
->offset
+ i
* 4 + 8) >> 2);
9729 val
|= plt_index
* RELOC_SIZE (htab
);
9730 if (i
== 2 || i
== 5)
9731 bfd_put_32 (output_bfd
, val
, ptr
);
9733 put_arm_insn (htab
, output_bfd
, val
, ptr
);
9736 loc
= (htab
->srelplt2
->contents
9737 + (plt_index
* 2 + 1) * RELOC_SIZE (htab
));
9739 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
9740 referencing the GOT for this PLT entry. */
9741 rel
.r_offset
= plt_address
+ 8;
9742 rel
.r_info
= ELF32_R_INFO (htab
->root
.hgot
->indx
, R_ARM_ABS32
);
9743 rel
.r_addend
= got_offset
;
9744 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, loc
);
9745 loc
+= RELOC_SIZE (htab
);
9747 /* Create the R_ARM_ABS32 relocation referencing the
9748 beginning of the PLT for this GOT entry. */
9749 rel
.r_offset
= got_address
;
9750 rel
.r_info
= ELF32_R_INFO (htab
->root
.hplt
->indx
, R_ARM_ABS32
);
9752 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, loc
);
9754 else if (htab
->root
.target_os
== is_nacl
)
9756 /* Calculate the displacement between the PLT slot and the
9757 common tail that's part of the special initial PLT slot. */
9758 int32_t tail_displacement
9759 = ((splt
->output_section
->vma
+ splt
->output_offset
9760 + ARM_NACL_PLT_TAIL_OFFSET
)
9761 - (plt_address
+ htab
->plt_entry_size
+ 4));
9762 BFD_ASSERT ((tail_displacement
& 3) == 0);
9763 tail_displacement
>>= 2;
9765 BFD_ASSERT ((tail_displacement
& 0xff000000) == 0
9766 || (-tail_displacement
& 0xff000000) == 0);
9768 /* Calculate the displacement between the PLT slot and the entry
9769 in the GOT. The offset accounts for the value produced by
9770 adding to pc in the penultimate instruction of the PLT stub. */
9771 got_displacement
= (got_address
9772 - (plt_address
+ htab
->plt_entry_size
));
9774 /* NaCl does not support interworking at all. */
9775 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info
, arm_plt
));
9777 put_arm_insn (htab
, output_bfd
,
9778 elf32_arm_nacl_plt_entry
[0]
9779 | arm_movw_immediate (got_displacement
),
9781 put_arm_insn (htab
, output_bfd
,
9782 elf32_arm_nacl_plt_entry
[1]
9783 | arm_movt_immediate (got_displacement
),
9785 put_arm_insn (htab
, output_bfd
,
9786 elf32_arm_nacl_plt_entry
[2],
9788 put_arm_insn (htab
, output_bfd
,
9789 elf32_arm_nacl_plt_entry
[3]
9790 | (tail_displacement
& 0x00ffffff),
9793 else if (htab
->fdpic_p
)
9795 const bfd_vma
*plt_entry
= using_thumb_only(htab
)
9796 ? elf32_arm_fdpic_thumb_plt_entry
9797 : elf32_arm_fdpic_plt_entry
;
9799 /* Fill-up Thumb stub if needed. */
9800 if (elf32_arm_plt_needs_thumb_stub_p (info
, arm_plt
))
9802 put_thumb_insn (htab
, output_bfd
,
9803 elf32_arm_plt_thumb_stub
[0], ptr
- 4);
9804 put_thumb_insn (htab
, output_bfd
,
9805 elf32_arm_plt_thumb_stub
[1], ptr
- 2);
9807 /* As we are using 32 bit instructions even for the Thumb
9808 version, we have to use 'put_arm_insn' instead of
9809 'put_thumb_insn'. */
9810 put_arm_insn(htab
, output_bfd
, plt_entry
[0], ptr
+ 0);
9811 put_arm_insn(htab
, output_bfd
, plt_entry
[1], ptr
+ 4);
9812 put_arm_insn(htab
, output_bfd
, plt_entry
[2], ptr
+ 8);
9813 put_arm_insn(htab
, output_bfd
, plt_entry
[3], ptr
+ 12);
9814 bfd_put_32 (output_bfd
, got_offset
, ptr
+ 16);
9816 if (!(info
->flags
& DF_BIND_NOW
))
9818 /* funcdesc_value_reloc_offset. */
9819 bfd_put_32 (output_bfd
,
9820 htab
->root
.srelplt
->reloc_count
* RELOC_SIZE (htab
),
9822 put_arm_insn(htab
, output_bfd
, plt_entry
[6], ptr
+ 24);
9823 put_arm_insn(htab
, output_bfd
, plt_entry
[7], ptr
+ 28);
9824 put_arm_insn(htab
, output_bfd
, plt_entry
[8], ptr
+ 32);
9825 put_arm_insn(htab
, output_bfd
, plt_entry
[9], ptr
+ 36);
9828 else if (using_thumb_only (htab
))
9830 /* PR ld/16017: Generate thumb only PLT entries. */
9831 if (!using_thumb2 (htab
))
9833 /* FIXME: We ought to be able to generate thumb-1 PLT
9835 _bfd_error_handler (_("%pB: warning: thumb-1 mode PLT generation not currently supported"),
9840 /* Calculate the displacement between the PLT slot and the entry in
9841 the GOT. The 12-byte offset accounts for the value produced by
9842 adding to pc in the 3rd instruction of the PLT stub. */
9843 got_displacement
= got_address
- (plt_address
+ 12);
9845 /* As we are using 32 bit instructions we have to use 'put_arm_insn'
9846 instead of 'put_thumb_insn'. */
9847 put_arm_insn (htab
, output_bfd
,
9848 elf32_thumb2_plt_entry
[0]
9849 | ((got_displacement
& 0x000000ff) << 16)
9850 | ((got_displacement
& 0x00000700) << 20)
9851 | ((got_displacement
& 0x00000800) >> 1)
9852 | ((got_displacement
& 0x0000f000) >> 12),
9854 put_arm_insn (htab
, output_bfd
,
9855 elf32_thumb2_plt_entry
[1]
9856 | ((got_displacement
& 0x00ff0000) )
9857 | ((got_displacement
& 0x07000000) << 4)
9858 | ((got_displacement
& 0x08000000) >> 17)
9859 | ((got_displacement
& 0xf0000000) >> 28),
9861 put_arm_insn (htab
, output_bfd
,
9862 elf32_thumb2_plt_entry
[2],
9864 put_arm_insn (htab
, output_bfd
,
9865 elf32_thumb2_plt_entry
[3],
9870 /* Calculate the displacement between the PLT slot and the
9871 entry in the GOT. The eight-byte offset accounts for the
9872 value produced by adding to pc in the first instruction
9874 got_displacement
= got_address
- (plt_address
+ 8);
9876 if (elf32_arm_plt_needs_thumb_stub_p (info
, arm_plt
))
9878 put_thumb_insn (htab
, output_bfd
,
9879 elf32_arm_plt_thumb_stub
[0], ptr
- 4);
9880 put_thumb_insn (htab
, output_bfd
,
9881 elf32_arm_plt_thumb_stub
[1], ptr
- 2);
9884 if (!elf32_arm_use_long_plt_entry
)
9886 BFD_ASSERT ((got_displacement
& 0xf0000000) == 0);
9888 put_arm_insn (htab
, output_bfd
,
9889 elf32_arm_plt_entry_short
[0]
9890 | ((got_displacement
& 0x0ff00000) >> 20),
9892 put_arm_insn (htab
, output_bfd
,
9893 elf32_arm_plt_entry_short
[1]
9894 | ((got_displacement
& 0x000ff000) >> 12),
9896 put_arm_insn (htab
, output_bfd
,
9897 elf32_arm_plt_entry_short
[2]
9898 | (got_displacement
& 0x00000fff),
9900 #ifdef FOUR_WORD_PLT
9901 bfd_put_32 (output_bfd
, elf32_arm_plt_entry_short
[3], ptr
+ 12);
9906 put_arm_insn (htab
, output_bfd
,
9907 elf32_arm_plt_entry_long
[0]
9908 | ((got_displacement
& 0xf0000000) >> 28),
9910 put_arm_insn (htab
, output_bfd
,
9911 elf32_arm_plt_entry_long
[1]
9912 | ((got_displacement
& 0x0ff00000) >> 20),
9914 put_arm_insn (htab
, output_bfd
,
9915 elf32_arm_plt_entry_long
[2]
9916 | ((got_displacement
& 0x000ff000) >> 12),
9918 put_arm_insn (htab
, output_bfd
,
9919 elf32_arm_plt_entry_long
[3]
9920 | (got_displacement
& 0x00000fff),
9925 /* Fill in the entry in the .rel(a).(i)plt section. */
9926 rel
.r_offset
= got_address
;
9930 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
9931 The dynamic linker or static executable then calls SYM_VALUE
9932 to determine the correct run-time value of the .igot.plt entry. */
9933 rel
.r_info
= ELF32_R_INFO (0, R_ARM_IRELATIVE
);
9934 initial_got_entry
= sym_value
;
9938 /* For FDPIC we will have to resolve a R_ARM_FUNCDESC_VALUE
9939 used by PLT entry. */
9942 rel
.r_info
= ELF32_R_INFO (dynindx
, R_ARM_FUNCDESC_VALUE
);
9943 initial_got_entry
= 0;
9947 rel
.r_info
= ELF32_R_INFO (dynindx
, R_ARM_JUMP_SLOT
);
9948 initial_got_entry
= (splt
->output_section
->vma
9949 + splt
->output_offset
);
9952 When thumb only we need to set the LSB for any address that
9953 will be used with an interworking branch instruction. */
9954 if (using_thumb_only (htab
))
9955 initial_got_entry
|= 1;
9959 /* Fill in the entry in the global offset table. */
9960 bfd_put_32 (output_bfd
, initial_got_entry
,
9961 sgot
->contents
+ got_offset
);
9963 if (htab
->fdpic_p
&& !(info
->flags
& DF_BIND_NOW
))
9965 /* Setup initial funcdesc value. */
9966 /* FIXME: we don't support lazy binding because there is a
9967 race condition between both words getting written and
9968 some other thread attempting to read them. The ARM
9969 architecture does not have an atomic 64 bit load/store
9970 instruction that could be used to prevent it; it is
9971 recommended that threaded FDPIC applications run with the
9972 LD_BIND_NOW environment variable set. */
9973 bfd_put_32(output_bfd
, plt_address
+ 0x18,
9974 sgot
->contents
+ got_offset
);
9975 bfd_put_32(output_bfd
, -1 /*TODO*/,
9976 sgot
->contents
+ got_offset
+ 4);
9981 elf32_arm_add_dynreloc (output_bfd
, info
, srel
, &rel
);
9986 /* For FDPIC we put PLT relocationss into .rel.got when not
9987 lazy binding otherwise we put them in .rel.plt. For now,
9988 we don't support lazy binding so put it in .rel.got. */
9989 if (info
->flags
& DF_BIND_NOW
)
9990 elf32_arm_add_dynreloc(output_bfd
, info
, htab
->root
.srelgot
, &rel
);
9992 elf32_arm_add_dynreloc(output_bfd
, info
, htab
->root
.srelplt
, &rel
);
9996 loc
= srel
->contents
+ plt_index
* RELOC_SIZE (htab
);
9997 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, loc
);
10004 /* Some relocations map to different relocations depending on the
10005 target. Return the real relocation. */
10008 arm_real_reloc_type (struct elf32_arm_link_hash_table
* globals
,
10013 case R_ARM_TARGET1
:
10014 if (globals
->target1_is_rel
)
10015 return R_ARM_REL32
;
10017 return R_ARM_ABS32
;
10019 case R_ARM_TARGET2
:
10020 return globals
->target2_reloc
;
10027 /* Return the base VMA address which should be subtracted from real addresses
10028 when resolving @dtpoff relocation.
10029 This is PT_TLS segment p_vaddr. */
10032 dtpoff_base (struct bfd_link_info
*info
)
10034 /* If tls_sec is NULL, we should have signalled an error already. */
10035 if (elf_hash_table (info
)->tls_sec
== NULL
)
10037 return elf_hash_table (info
)->tls_sec
->vma
;
10040 /* Return the relocation value for @tpoff relocation
10041 if STT_TLS virtual address is ADDRESS. */
10044 tpoff (struct bfd_link_info
*info
, bfd_vma address
)
10046 struct elf_link_hash_table
*htab
= elf_hash_table (info
);
10049 /* If tls_sec is NULL, we should have signalled an error already. */
10050 if (htab
->tls_sec
== NULL
)
10052 base
= align_power ((bfd_vma
) TCB_SIZE
, htab
->tls_sec
->alignment_power
);
10053 return address
- htab
->tls_sec
->vma
+ base
;
10056 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
10057 VALUE is the relocation value. */
10059 static bfd_reloc_status_type
10060 elf32_arm_abs12_reloc (bfd
*abfd
, void *data
, bfd_vma value
)
10063 return bfd_reloc_overflow
;
10065 value
|= bfd_get_32 (abfd
, data
) & 0xfffff000;
10066 bfd_put_32 (abfd
, value
, data
);
10067 return bfd_reloc_ok
;
10070 /* Handle TLS relaxations. Relaxing is possible for symbols that use
10071 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
10072 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
10074 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
10075 is to then call final_link_relocate. Return other values in the
10078 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
10079 the pre-relaxed code. It would be nice if the relocs were updated
10080 to match the optimization. */
10082 static bfd_reloc_status_type
10083 elf32_arm_tls_relax (struct elf32_arm_link_hash_table
*globals
,
10084 bfd
*input_bfd
, asection
*input_sec
, bfd_byte
*contents
,
10085 Elf_Internal_Rela
*rel
, unsigned long is_local
)
10087 unsigned long insn
;
10089 switch (ELF32_R_TYPE (rel
->r_info
))
10092 return bfd_reloc_notsupported
;
10094 case R_ARM_TLS_GOTDESC
:
10099 insn
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
);
10101 insn
-= 5; /* THUMB */
10103 insn
-= 8; /* ARM */
10105 bfd_put_32 (input_bfd
, insn
, contents
+ rel
->r_offset
);
10106 return bfd_reloc_continue
;
10108 case R_ARM_THM_TLS_DESCSEQ
:
10110 insn
= bfd_get_16 (input_bfd
, contents
+ rel
->r_offset
);
10111 if ((insn
& 0xff78) == 0x4478) /* add rx, pc */
10115 bfd_put_16 (input_bfd
, 0x46c0, contents
+ rel
->r_offset
);
10117 else if ((insn
& 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
10121 bfd_put_16 (input_bfd
, 0x46c0, contents
+ rel
->r_offset
);
10124 bfd_put_16 (input_bfd
, insn
& 0xf83f, contents
+ rel
->r_offset
);
10126 else if ((insn
& 0xff87) == 0x4780) /* blx rx */
10130 bfd_put_16 (input_bfd
, 0x46c0, contents
+ rel
->r_offset
);
10133 bfd_put_16 (input_bfd
, 0x4600 | (insn
& 0x78),
10134 contents
+ rel
->r_offset
);
10138 if ((insn
& 0xf000) == 0xf000 || (insn
& 0xf800) == 0xe800)
10139 /* It's a 32 bit instruction, fetch the rest of it for
10140 error generation. */
10141 insn
= (insn
<< 16)
10142 | bfd_get_16 (input_bfd
, contents
+ rel
->r_offset
+ 2);
10144 /* xgettext:c-format */
10145 (_("%pB(%pA+%#" PRIx64
"): "
10146 "unexpected %s instruction '%#lx' in TLS trampoline"),
10147 input_bfd
, input_sec
, (uint64_t) rel
->r_offset
,
10149 return bfd_reloc_notsupported
;
10153 case R_ARM_TLS_DESCSEQ
:
10155 insn
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
);
10156 if ((insn
& 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
10160 bfd_put_32 (input_bfd
, 0xe1a00000 | (insn
& 0xffff),
10161 contents
+ rel
->r_offset
);
10163 else if ((insn
& 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
10167 bfd_put_32 (input_bfd
, 0xe1a00000, contents
+ rel
->r_offset
);
10170 bfd_put_32 (input_bfd
, insn
& 0xfffff000,
10171 contents
+ rel
->r_offset
);
10173 else if ((insn
& 0xfffffff0) == 0xe12fff30) /* blx rx */
10177 bfd_put_32 (input_bfd
, 0xe1a00000, contents
+ rel
->r_offset
);
10180 bfd_put_32 (input_bfd
, 0xe1a00000 | (insn
& 0xf),
10181 contents
+ rel
->r_offset
);
10186 /* xgettext:c-format */
10187 (_("%pB(%pA+%#" PRIx64
"): "
10188 "unexpected %s instruction '%#lx' in TLS trampoline"),
10189 input_bfd
, input_sec
, (uint64_t) rel
->r_offset
,
10191 return bfd_reloc_notsupported
;
10195 case R_ARM_TLS_CALL
:
10196 /* GD->IE relaxation, turn the instruction into 'nop' or
10197 'ldr r0, [pc,r0]' */
10198 insn
= is_local
? 0xe1a00000 : 0xe79f0000;
10199 bfd_put_32 (input_bfd
, insn
, contents
+ rel
->r_offset
);
10202 case R_ARM_THM_TLS_CALL
:
10203 /* GD->IE relaxation. */
10205 /* add r0,pc; ldr r0, [r0] */
10207 else if (using_thumb2 (globals
))
10214 bfd_put_16 (input_bfd
, insn
>> 16, contents
+ rel
->r_offset
);
10215 bfd_put_16 (input_bfd
, insn
& 0xffff, contents
+ rel
->r_offset
+ 2);
10218 return bfd_reloc_ok
;
10221 /* For a given value of n, calculate the value of G_n as required to
10222 deal with group relocations. We return it in the form of an
10223 encoded constant-and-rotation, together with the final residual. If n is
10224 specified as less than zero, then final_residual is filled with the
10225 input value and no further action is performed. */
10228 calculate_group_reloc_mask (bfd_vma value
, int n
, bfd_vma
*final_residual
)
10232 bfd_vma encoded_g_n
= 0;
10233 bfd_vma residual
= value
; /* Also known as Y_n. */
10235 for (current_n
= 0; current_n
<= n
; current_n
++)
10239 /* Calculate which part of the value to mask. */
10246 /* Determine the most significant bit in the residual and
10247 align the resulting value to a 2-bit boundary. */
10248 for (msb
= 30; msb
>= 0; msb
-= 2)
10249 if (residual
& (3 << msb
))
10252 /* The desired shift is now (msb - 6), or zero, whichever
10259 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
10260 g_n
= residual
& (0xff << shift
);
10261 encoded_g_n
= (g_n
>> shift
)
10262 | ((g_n
<= 0xff ? 0 : (32 - shift
) / 2) << 8);
10264 /* Calculate the residual for the next time around. */
10268 *final_residual
= residual
;
10270 return encoded_g_n
;
10273 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
10274 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
10277 identify_add_or_sub (bfd_vma insn
)
10279 int opcode
= insn
& 0x1e00000;
10281 if (opcode
== 1 << 23) /* ADD */
10284 if (opcode
== 1 << 22) /* SUB */
10290 /* Perform a relocation as part of a final link. */
10292 static bfd_reloc_status_type
10293 elf32_arm_final_link_relocate (reloc_howto_type
* howto
,
10296 asection
* input_section
,
10297 bfd_byte
* contents
,
10298 Elf_Internal_Rela
* rel
,
10300 struct bfd_link_info
* info
,
10301 asection
* sym_sec
,
10302 const char * sym_name
,
10303 unsigned char st_type
,
10304 enum arm_st_branch_type branch_type
,
10305 struct elf_link_hash_entry
* h
,
10306 bfd_boolean
* unresolved_reloc_p
,
10307 char ** error_message
)
10309 unsigned long r_type
= howto
->type
;
10310 unsigned long r_symndx
;
10311 bfd_byte
* hit_data
= contents
+ rel
->r_offset
;
10312 bfd_vma
* local_got_offsets
;
10313 bfd_vma
* local_tlsdesc_gotents
;
10316 asection
* sreloc
= NULL
;
10317 asection
* srelgot
;
10319 bfd_signed_vma signed_addend
;
10320 unsigned char dynreloc_st_type
;
10321 bfd_vma dynreloc_value
;
10322 struct elf32_arm_link_hash_table
* globals
;
10323 struct elf32_arm_link_hash_entry
*eh
;
10324 union gotplt_union
*root_plt
;
10325 struct arm_plt_info
*arm_plt
;
10326 bfd_vma plt_offset
;
10327 bfd_vma gotplt_offset
;
10328 bfd_boolean has_iplt_entry
;
10329 bfd_boolean resolved_to_zero
;
10331 globals
= elf32_arm_hash_table (info
);
10332 if (globals
== NULL
)
10333 return bfd_reloc_notsupported
;
10335 BFD_ASSERT (is_arm_elf (input_bfd
));
10336 BFD_ASSERT (howto
!= NULL
);
10338 /* Some relocation types map to different relocations depending on the
10339 target. We pick the right one here. */
10340 r_type
= arm_real_reloc_type (globals
, r_type
);
10342 /* It is possible to have linker relaxations on some TLS access
10343 models. Update our information here. */
10344 r_type
= elf32_arm_tls_transition (info
, r_type
, h
);
10346 if (r_type
!= howto
->type
)
10347 howto
= elf32_arm_howto_from_type (r_type
);
10349 eh
= (struct elf32_arm_link_hash_entry
*) h
;
10350 sgot
= globals
->root
.sgot
;
10351 local_got_offsets
= elf_local_got_offsets (input_bfd
);
10352 local_tlsdesc_gotents
= elf32_arm_local_tlsdesc_gotent (input_bfd
);
10354 if (globals
->root
.dynamic_sections_created
)
10355 srelgot
= globals
->root
.srelgot
;
10359 r_symndx
= ELF32_R_SYM (rel
->r_info
);
10361 if (globals
->use_rel
)
10363 addend
= bfd_get_32 (input_bfd
, hit_data
) & howto
->src_mask
;
10365 if (addend
& ((howto
->src_mask
+ 1) >> 1))
10367 signed_addend
= -1;
10368 signed_addend
&= ~ howto
->src_mask
;
10369 signed_addend
|= addend
;
10372 signed_addend
= addend
;
10375 addend
= signed_addend
= rel
->r_addend
;
10377 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
10378 are resolving a function call relocation. */
10379 if (using_thumb_only (globals
)
10380 && (r_type
== R_ARM_THM_CALL
10381 || r_type
== R_ARM_THM_JUMP24
)
10382 && branch_type
== ST_BRANCH_TO_ARM
)
10383 branch_type
= ST_BRANCH_TO_THUMB
;
10385 /* Record the symbol information that should be used in dynamic
10387 dynreloc_st_type
= st_type
;
10388 dynreloc_value
= value
;
10389 if (branch_type
== ST_BRANCH_TO_THUMB
)
10390 dynreloc_value
|= 1;
10392 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
10393 VALUE appropriately for relocations that we resolve at link time. */
10394 has_iplt_entry
= FALSE
;
10395 if (elf32_arm_get_plt_info (input_bfd
, globals
, eh
, r_symndx
, &root_plt
,
10397 && root_plt
->offset
!= (bfd_vma
) -1)
10399 plt_offset
= root_plt
->offset
;
10400 gotplt_offset
= arm_plt
->got_offset
;
10402 if (h
== NULL
|| eh
->is_iplt
)
10404 has_iplt_entry
= TRUE
;
10405 splt
= globals
->root
.iplt
;
10407 /* Populate .iplt entries here, because not all of them will
10408 be seen by finish_dynamic_symbol. The lower bit is set if
10409 we have already populated the entry. */
10410 if (plt_offset
& 1)
10414 if (elf32_arm_populate_plt_entry (output_bfd
, info
, root_plt
, arm_plt
,
10415 -1, dynreloc_value
))
10416 root_plt
->offset
|= 1;
10418 return bfd_reloc_notsupported
;
10421 /* Static relocations always resolve to the .iplt entry. */
10422 st_type
= STT_FUNC
;
10423 value
= (splt
->output_section
->vma
10424 + splt
->output_offset
10426 branch_type
= ST_BRANCH_TO_ARM
;
10428 /* If there are non-call relocations that resolve to the .iplt
10429 entry, then all dynamic ones must too. */
10430 if (arm_plt
->noncall_refcount
!= 0)
10432 dynreloc_st_type
= st_type
;
10433 dynreloc_value
= value
;
10437 /* We populate the .plt entry in finish_dynamic_symbol. */
10438 splt
= globals
->root
.splt
;
10443 plt_offset
= (bfd_vma
) -1;
10444 gotplt_offset
= (bfd_vma
) -1;
10447 resolved_to_zero
= (h
!= NULL
10448 && UNDEFWEAK_NO_DYNAMIC_RELOC (info
, h
));
10453 /* We don't need to find a value for this symbol. It's just a
10455 *unresolved_reloc_p
= FALSE
;
10456 return bfd_reloc_ok
;
10459 if (globals
->root
.target_os
!= is_vxworks
)
10460 return elf32_arm_abs12_reloc (input_bfd
, hit_data
, value
+ addend
);
10461 /* Fall through. */
10465 case R_ARM_ABS32_NOI
:
10467 case R_ARM_REL32_NOI
:
10473 /* Handle relocations which should use the PLT entry. ABS32/REL32
10474 will use the symbol's value, which may point to a PLT entry, but we
10475 don't need to handle that here. If we created a PLT entry, all
10476 branches in this object should go to it, except if the PLT is too
10477 far away, in which case a long branch stub should be inserted. */
10478 if ((r_type
!= R_ARM_ABS32
&& r_type
!= R_ARM_REL32
10479 && r_type
!= R_ARM_ABS32_NOI
&& r_type
!= R_ARM_REL32_NOI
10480 && r_type
!= R_ARM_CALL
10481 && r_type
!= R_ARM_JUMP24
10482 && r_type
!= R_ARM_PLT32
)
10483 && plt_offset
!= (bfd_vma
) -1)
10485 /* If we've created a .plt section, and assigned a PLT entry
10486 to this function, it must either be a STT_GNU_IFUNC reference
10487 or not be known to bind locally. In other cases, we should
10488 have cleared the PLT entry by now. */
10489 BFD_ASSERT (has_iplt_entry
|| !SYMBOL_CALLS_LOCAL (info
, h
));
10491 value
= (splt
->output_section
->vma
10492 + splt
->output_offset
10494 *unresolved_reloc_p
= FALSE
;
10495 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
10496 contents
, rel
->r_offset
, value
,
10500 /* When generating a shared object or relocatable executable, these
10501 relocations are copied into the output file to be resolved at
10503 if ((bfd_link_pic (info
)
10504 || globals
->root
.is_relocatable_executable
10505 || globals
->fdpic_p
)
10506 && (input_section
->flags
& SEC_ALLOC
)
10507 && !(globals
->root
.target_os
== is_vxworks
10508 && strcmp (input_section
->output_section
->name
,
10510 && ((r_type
!= R_ARM_REL32
&& r_type
!= R_ARM_REL32_NOI
)
10511 || !SYMBOL_CALLS_LOCAL (info
, h
))
10512 && !(input_bfd
== globals
->stub_bfd
10513 && strstr (input_section
->name
, STUB_SUFFIX
))
10515 || (ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
10516 && !resolved_to_zero
)
10517 || h
->root
.type
!= bfd_link_hash_undefweak
)
10518 && r_type
!= R_ARM_PC24
10519 && r_type
!= R_ARM_CALL
10520 && r_type
!= R_ARM_JUMP24
10521 && r_type
!= R_ARM_PREL31
10522 && r_type
!= R_ARM_PLT32
)
10524 Elf_Internal_Rela outrel
;
10525 bfd_boolean skip
, relocate
;
10528 if ((r_type
== R_ARM_REL32
|| r_type
== R_ARM_REL32_NOI
)
10529 && !h
->def_regular
)
10531 char *v
= _("shared object");
10533 if (bfd_link_executable (info
))
10534 v
= _("PIE executable");
10537 (_("%pB: relocation %s against external or undefined symbol `%s'"
10538 " can not be used when making a %s; recompile with -fPIC"), input_bfd
,
10539 elf32_arm_howto_table_1
[r_type
].name
, h
->root
.root
.string
, v
);
10540 return bfd_reloc_notsupported
;
10543 *unresolved_reloc_p
= FALSE
;
10545 if (sreloc
== NULL
&& globals
->root
.dynamic_sections_created
)
10547 sreloc
= _bfd_elf_get_dynamic_reloc_section (input_bfd
, input_section
,
10548 ! globals
->use_rel
);
10550 if (sreloc
== NULL
)
10551 return bfd_reloc_notsupported
;
10557 outrel
.r_addend
= addend
;
10559 _bfd_elf_section_offset (output_bfd
, info
, input_section
,
10561 if (outrel
.r_offset
== (bfd_vma
) -1)
10563 else if (outrel
.r_offset
== (bfd_vma
) -2)
10564 skip
= TRUE
, relocate
= TRUE
;
10565 outrel
.r_offset
+= (input_section
->output_section
->vma
10566 + input_section
->output_offset
);
10569 memset (&outrel
, 0, sizeof outrel
);
10571 && h
->dynindx
!= -1
10572 && (!bfd_link_pic (info
)
10573 || !(bfd_link_pie (info
)
10574 || SYMBOLIC_BIND (info
, h
))
10575 || !h
->def_regular
))
10576 outrel
.r_info
= ELF32_R_INFO (h
->dynindx
, r_type
);
10581 /* This symbol is local, or marked to become local. */
10582 BFD_ASSERT (r_type
== R_ARM_ABS32
|| r_type
== R_ARM_ABS32_NOI
10583 || (globals
->fdpic_p
&& !bfd_link_pic(info
)));
10584 if (globals
->root
.target_os
== is_symbian
)
10588 /* On Symbian OS, the data segment and text segement
10589 can be relocated independently. Therefore, we
10590 must indicate the segment to which this
10591 relocation is relative. The BPABI allows us to
10592 use any symbol in the right segment; we just use
10593 the section symbol as it is convenient. (We
10594 cannot use the symbol given by "h" directly as it
10595 will not appear in the dynamic symbol table.)
10597 Note that the dynamic linker ignores the section
10598 symbol value, so we don't subtract osec->vma
10599 from the emitted reloc addend. */
10601 osec
= sym_sec
->output_section
;
10603 osec
= input_section
->output_section
;
10604 symbol
= elf_section_data (osec
)->dynindx
;
10607 struct elf_link_hash_table
*htab
= elf_hash_table (info
);
10609 if ((osec
->flags
& SEC_READONLY
) == 0
10610 && htab
->data_index_section
!= NULL
)
10611 osec
= htab
->data_index_section
;
10613 osec
= htab
->text_index_section
;
10614 symbol
= elf_section_data (osec
)->dynindx
;
10616 BFD_ASSERT (symbol
!= 0);
10619 /* On SVR4-ish systems, the dynamic loader cannot
10620 relocate the text and data segments independently,
10621 so the symbol does not matter. */
10623 if (dynreloc_st_type
== STT_GNU_IFUNC
)
10624 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
10625 to the .iplt entry. Instead, every non-call reference
10626 must use an R_ARM_IRELATIVE relocation to obtain the
10627 correct run-time address. */
10628 outrel
.r_info
= ELF32_R_INFO (symbol
, R_ARM_IRELATIVE
);
10629 else if (globals
->fdpic_p
&& !bfd_link_pic(info
))
10632 outrel
.r_info
= ELF32_R_INFO (symbol
, R_ARM_RELATIVE
);
10633 if (globals
->use_rel
)
10636 outrel
.r_addend
+= dynreloc_value
;
10640 arm_elf_add_rofixup(output_bfd
, globals
->srofixup
, outrel
.r_offset
);
10642 elf32_arm_add_dynreloc (output_bfd
, info
, sreloc
, &outrel
);
10644 /* If this reloc is against an external symbol, we do not want to
10645 fiddle with the addend. Otherwise, we need to include the symbol
10646 value so that it becomes an addend for the dynamic reloc. */
10648 return bfd_reloc_ok
;
10650 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
10651 contents
, rel
->r_offset
,
10652 dynreloc_value
, (bfd_vma
) 0);
10654 else switch (r_type
)
10657 return elf32_arm_abs12_reloc (input_bfd
, hit_data
, value
+ addend
);
10659 case R_ARM_XPC25
: /* Arm BLX instruction. */
10662 case R_ARM_PC24
: /* Arm B/BL instruction. */
10665 struct elf32_arm_stub_hash_entry
*stub_entry
= NULL
;
10667 if (r_type
== R_ARM_XPC25
)
10669 /* Check for Arm calling Arm function. */
10670 /* FIXME: Should we translate the instruction into a BL
10671 instruction instead ? */
10672 if (branch_type
!= ST_BRANCH_TO_THUMB
)
10674 (_("\%pB: warning: %s BLX instruction targets"
10675 " %s function '%s'"),
10677 "ARM", h
? h
->root
.root
.string
: "(local)");
10679 else if (r_type
== R_ARM_PC24
)
10681 /* Check for Arm calling Thumb function. */
10682 if (branch_type
== ST_BRANCH_TO_THUMB
)
10684 if (elf32_arm_to_thumb_stub (info
, sym_name
, input_bfd
,
10685 output_bfd
, input_section
,
10686 hit_data
, sym_sec
, rel
->r_offset
,
10687 signed_addend
, value
,
10689 return bfd_reloc_ok
;
10691 return bfd_reloc_dangerous
;
10695 /* Check if a stub has to be inserted because the
10696 destination is too far or we are changing mode. */
10697 if ( r_type
== R_ARM_CALL
10698 || r_type
== R_ARM_JUMP24
10699 || r_type
== R_ARM_PLT32
)
10701 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
10702 struct elf32_arm_link_hash_entry
*hash
;
10704 hash
= (struct elf32_arm_link_hash_entry
*) h
;
10705 stub_type
= arm_type_of_stub (info
, input_section
, rel
,
10706 st_type
, &branch_type
,
10707 hash
, value
, sym_sec
,
10708 input_bfd
, sym_name
);
10710 if (stub_type
!= arm_stub_none
)
10712 /* The target is out of reach, so redirect the
10713 branch to the local stub for this function. */
10714 stub_entry
= elf32_arm_get_stub_entry (input_section
,
10719 if (stub_entry
!= NULL
)
10720 value
= (stub_entry
->stub_offset
10721 + stub_entry
->stub_sec
->output_offset
10722 + stub_entry
->stub_sec
->output_section
->vma
);
10724 if (plt_offset
!= (bfd_vma
) -1)
10725 *unresolved_reloc_p
= FALSE
;
10730 /* If the call goes through a PLT entry, make sure to
10731 check distance to the right destination address. */
10732 if (plt_offset
!= (bfd_vma
) -1)
10734 value
= (splt
->output_section
->vma
10735 + splt
->output_offset
10737 *unresolved_reloc_p
= FALSE
;
10738 /* The PLT entry is in ARM mode, regardless of the
10739 target function. */
10740 branch_type
= ST_BRANCH_TO_ARM
;
10745 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
10747 S is the address of the symbol in the relocation.
10748 P is address of the instruction being relocated.
10749 A is the addend (extracted from the instruction) in bytes.
10751 S is held in 'value'.
10752 P is the base address of the section containing the
10753 instruction plus the offset of the reloc into that
10755 (input_section->output_section->vma +
10756 input_section->output_offset +
10758 A is the addend, converted into bytes, ie:
10759 (signed_addend * 4)
10761 Note: None of these operations have knowledge of the pipeline
10762 size of the processor, thus it is up to the assembler to
10763 encode this information into the addend. */
10764 value
-= (input_section
->output_section
->vma
10765 + input_section
->output_offset
);
10766 value
-= rel
->r_offset
;
10767 if (globals
->use_rel
)
10768 value
+= (signed_addend
<< howto
->size
);
10770 /* RELA addends do not have to be adjusted by howto->size. */
10771 value
+= signed_addend
;
10773 signed_addend
= value
;
10774 signed_addend
>>= howto
->rightshift
;
10776 /* A branch to an undefined weak symbol is turned into a jump to
10777 the next instruction unless a PLT entry will be created.
10778 Do the same for local undefined symbols (but not for STN_UNDEF).
10779 The jump to the next instruction is optimized as a NOP depending
10780 on the architecture. */
10781 if (h
? (h
->root
.type
== bfd_link_hash_undefweak
10782 && plt_offset
== (bfd_vma
) -1)
10783 : r_symndx
!= STN_UNDEF
&& bfd_is_und_section (sym_sec
))
10785 value
= (bfd_get_32 (input_bfd
, hit_data
) & 0xf0000000);
10787 if (arch_has_arm_nop (globals
))
10788 value
|= 0x0320f000;
10790 value
|= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
10794 /* Perform a signed range check. */
10795 if ( signed_addend
> ((bfd_signed_vma
) (howto
->dst_mask
>> 1))
10796 || signed_addend
< - ((bfd_signed_vma
) ((howto
->dst_mask
+ 1) >> 1)))
10797 return bfd_reloc_overflow
;
10799 addend
= (value
& 2);
10801 value
= (signed_addend
& howto
->dst_mask
)
10802 | (bfd_get_32 (input_bfd
, hit_data
) & (~ howto
->dst_mask
));
10804 if (r_type
== R_ARM_CALL
)
10806 /* Set the H bit in the BLX instruction. */
10807 if (branch_type
== ST_BRANCH_TO_THUMB
)
10810 value
|= (1 << 24);
10812 value
&= ~(bfd_vma
)(1 << 24);
10815 /* Select the correct instruction (BL or BLX). */
10816 /* Only if we are not handling a BL to a stub. In this
10817 case, mode switching is performed by the stub. */
10818 if (branch_type
== ST_BRANCH_TO_THUMB
&& !stub_entry
)
10819 value
|= (1 << 28);
10820 else if (stub_entry
|| branch_type
!= ST_BRANCH_UNKNOWN
)
10822 value
&= ~(bfd_vma
)(1 << 28);
10823 value
|= (1 << 24);
10832 if (branch_type
== ST_BRANCH_TO_THUMB
)
10836 case R_ARM_ABS32_NOI
:
10842 if (branch_type
== ST_BRANCH_TO_THUMB
)
10844 value
-= (input_section
->output_section
->vma
10845 + input_section
->output_offset
+ rel
->r_offset
);
10848 case R_ARM_REL32_NOI
:
10850 value
-= (input_section
->output_section
->vma
10851 + input_section
->output_offset
+ rel
->r_offset
);
10855 value
-= (input_section
->output_section
->vma
10856 + input_section
->output_offset
+ rel
->r_offset
);
10857 value
+= signed_addend
;
10858 if (! h
|| h
->root
.type
!= bfd_link_hash_undefweak
)
10860 /* Check for overflow. */
10861 if ((value
^ (value
>> 1)) & (1 << 30))
10862 return bfd_reloc_overflow
;
10864 value
&= 0x7fffffff;
10865 value
|= (bfd_get_32 (input_bfd
, hit_data
) & 0x80000000);
10866 if (branch_type
== ST_BRANCH_TO_THUMB
)
10871 bfd_put_32 (input_bfd
, value
, hit_data
);
10872 return bfd_reloc_ok
;
10875 /* PR 16202: Refectch the addend using the correct size. */
10876 if (globals
->use_rel
)
10877 addend
= bfd_get_8 (input_bfd
, hit_data
);
10880 /* There is no way to tell whether the user intended to use a signed or
10881 unsigned addend. When checking for overflow we accept either,
10882 as specified by the AAELF. */
10883 if ((long) value
> 0xff || (long) value
< -0x80)
10884 return bfd_reloc_overflow
;
10886 bfd_put_8 (input_bfd
, value
, hit_data
);
10887 return bfd_reloc_ok
;
10890 /* PR 16202: Refectch the addend using the correct size. */
10891 if (globals
->use_rel
)
10892 addend
= bfd_get_16 (input_bfd
, hit_data
);
10895 /* See comment for R_ARM_ABS8. */
10896 if ((long) value
> 0xffff || (long) value
< -0x8000)
10897 return bfd_reloc_overflow
;
10899 bfd_put_16 (input_bfd
, value
, hit_data
);
10900 return bfd_reloc_ok
;
10902 case R_ARM_THM_ABS5
:
10903 /* Support ldr and str instructions for the thumb. */
10904 if (globals
->use_rel
)
10906 /* Need to refetch addend. */
10907 addend
= bfd_get_16 (input_bfd
, hit_data
) & howto
->src_mask
;
10908 /* ??? Need to determine shift amount from operand size. */
10909 addend
>>= howto
->rightshift
;
10913 /* ??? Isn't value unsigned? */
10914 if ((long) value
> 0x1f || (long) value
< -0x10)
10915 return bfd_reloc_overflow
;
10917 /* ??? Value needs to be properly shifted into place first. */
10918 value
|= bfd_get_16 (input_bfd
, hit_data
) & 0xf83f;
10919 bfd_put_16 (input_bfd
, value
, hit_data
);
10920 return bfd_reloc_ok
;
10922 case R_ARM_THM_ALU_PREL_11_0
:
10923 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
10926 bfd_signed_vma relocation
;
10928 insn
= (bfd_get_16 (input_bfd
, hit_data
) << 16)
10929 | bfd_get_16 (input_bfd
, hit_data
+ 2);
10931 if (globals
->use_rel
)
10933 signed_addend
= (insn
& 0xff) | ((insn
& 0x7000) >> 4)
10934 | ((insn
& (1 << 26)) >> 15);
10935 if (insn
& 0xf00000)
10936 signed_addend
= -signed_addend
;
10939 relocation
= value
+ signed_addend
;
10940 relocation
-= Pa (input_section
->output_section
->vma
10941 + input_section
->output_offset
10944 /* PR 21523: Use an absolute value. The user of this reloc will
10945 have already selected an ADD or SUB insn appropriately. */
10946 value
= llabs (relocation
);
10948 if (value
>= 0x1000)
10949 return bfd_reloc_overflow
;
10951 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
10952 if (branch_type
== ST_BRANCH_TO_THUMB
)
10955 insn
= (insn
& 0xfb0f8f00) | (value
& 0xff)
10956 | ((value
& 0x700) << 4)
10957 | ((value
& 0x800) << 15);
10958 if (relocation
< 0)
10961 bfd_put_16 (input_bfd
, insn
>> 16, hit_data
);
10962 bfd_put_16 (input_bfd
, insn
& 0xffff, hit_data
+ 2);
10964 return bfd_reloc_ok
;
10967 case R_ARM_THM_PC8
:
10968 /* PR 10073: This reloc is not generated by the GNU toolchain,
10969 but it is supported for compatibility with third party libraries
10970 generated by other compilers, specifically the ARM/IAR. */
10973 bfd_signed_vma relocation
;
10975 insn
= bfd_get_16 (input_bfd
, hit_data
);
10977 if (globals
->use_rel
)
10978 addend
= ((((insn
& 0x00ff) << 2) + 4) & 0x3ff) -4;
10980 relocation
= value
+ addend
;
10981 relocation
-= Pa (input_section
->output_section
->vma
10982 + input_section
->output_offset
10985 value
= relocation
;
10987 /* We do not check for overflow of this reloc. Although strictly
10988 speaking this is incorrect, it appears to be necessary in order
10989 to work with IAR generated relocs. Since GCC and GAS do not
10990 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
10991 a problem for them. */
10994 insn
= (insn
& 0xff00) | (value
>> 2);
10996 bfd_put_16 (input_bfd
, insn
, hit_data
);
10998 return bfd_reloc_ok
;
11001 case R_ARM_THM_PC12
:
11002 /* Corresponds to: ldr.w reg, [pc, #offset]. */
11005 bfd_signed_vma relocation
;
11007 insn
= (bfd_get_16 (input_bfd
, hit_data
) << 16)
11008 | bfd_get_16 (input_bfd
, hit_data
+ 2);
11010 if (globals
->use_rel
)
11012 signed_addend
= insn
& 0xfff;
11013 if (!(insn
& (1 << 23)))
11014 signed_addend
= -signed_addend
;
11017 relocation
= value
+ signed_addend
;
11018 relocation
-= Pa (input_section
->output_section
->vma
11019 + input_section
->output_offset
11022 value
= relocation
;
11024 if (value
>= 0x1000)
11025 return bfd_reloc_overflow
;
11027 insn
= (insn
& 0xff7ff000) | value
;
11028 if (relocation
>= 0)
11031 bfd_put_16 (input_bfd
, insn
>> 16, hit_data
);
11032 bfd_put_16 (input_bfd
, insn
& 0xffff, hit_data
+ 2);
11034 return bfd_reloc_ok
;
11037 case R_ARM_THM_XPC22
:
11038 case R_ARM_THM_CALL
:
11039 case R_ARM_THM_JUMP24
:
11040 /* Thumb BL (branch long instruction). */
11042 bfd_vma relocation
;
11043 bfd_vma reloc_sign
;
11044 bfd_boolean overflow
= FALSE
;
11045 bfd_vma upper_insn
= bfd_get_16 (input_bfd
, hit_data
);
11046 bfd_vma lower_insn
= bfd_get_16 (input_bfd
, hit_data
+ 2);
11047 bfd_signed_vma reloc_signed_max
;
11048 bfd_signed_vma reloc_signed_min
;
11050 bfd_signed_vma signed_check
;
11052 const int thumb2
= using_thumb2 (globals
);
11053 const int thumb2_bl
= using_thumb2_bl (globals
);
11055 /* A branch to an undefined weak symbol is turned into a jump to
11056 the next instruction unless a PLT entry will be created.
11057 The jump to the next instruction is optimized as a NOP.W for
11058 Thumb-2 enabled architectures. */
11059 if (h
&& h
->root
.type
== bfd_link_hash_undefweak
11060 && plt_offset
== (bfd_vma
) -1)
11064 bfd_put_16 (input_bfd
, 0xf3af, hit_data
);
11065 bfd_put_16 (input_bfd
, 0x8000, hit_data
+ 2);
11069 bfd_put_16 (input_bfd
, 0xe000, hit_data
);
11070 bfd_put_16 (input_bfd
, 0xbf00, hit_data
+ 2);
11072 return bfd_reloc_ok
;
11075 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
11076 with Thumb-1) involving the J1 and J2 bits. */
11077 if (globals
->use_rel
)
11079 bfd_vma s
= (upper_insn
& (1 << 10)) >> 10;
11080 bfd_vma upper
= upper_insn
& 0x3ff;
11081 bfd_vma lower
= lower_insn
& 0x7ff;
11082 bfd_vma j1
= (lower_insn
& (1 << 13)) >> 13;
11083 bfd_vma j2
= (lower_insn
& (1 << 11)) >> 11;
11084 bfd_vma i1
= j1
^ s
? 0 : 1;
11085 bfd_vma i2
= j2
^ s
? 0 : 1;
11087 addend
= (i1
<< 23) | (i2
<< 22) | (upper
<< 12) | (lower
<< 1);
11089 addend
= (addend
| ((s
? 0 : 1) << 24)) - (1 << 24);
11091 signed_addend
= addend
;
11094 if (r_type
== R_ARM_THM_XPC22
)
11096 /* Check for Thumb to Thumb call. */
11097 /* FIXME: Should we translate the instruction into a BL
11098 instruction instead ? */
11099 if (branch_type
== ST_BRANCH_TO_THUMB
)
11101 (_("%pB: warning: %s BLX instruction targets"
11102 " %s function '%s'"),
11103 input_bfd
, "Thumb",
11104 "Thumb", h
? h
->root
.root
.string
: "(local)");
11108 /* If it is not a call to Thumb, assume call to Arm.
11109 If it is a call relative to a section name, then it is not a
11110 function call at all, but rather a long jump. Calls through
11111 the PLT do not require stubs. */
11112 if (branch_type
== ST_BRANCH_TO_ARM
&& plt_offset
== (bfd_vma
) -1)
11114 if (globals
->use_blx
&& r_type
== R_ARM_THM_CALL
)
11116 /* Convert BL to BLX. */
11117 lower_insn
= (lower_insn
& ~0x1000) | 0x0800;
11119 else if (( r_type
!= R_ARM_THM_CALL
)
11120 && (r_type
!= R_ARM_THM_JUMP24
))
11122 if (elf32_thumb_to_arm_stub
11123 (info
, sym_name
, input_bfd
, output_bfd
, input_section
,
11124 hit_data
, sym_sec
, rel
->r_offset
, signed_addend
, value
,
11126 return bfd_reloc_ok
;
11128 return bfd_reloc_dangerous
;
11131 else if (branch_type
== ST_BRANCH_TO_THUMB
11132 && globals
->use_blx
11133 && r_type
== R_ARM_THM_CALL
)
11135 /* Make sure this is a BL. */
11136 lower_insn
|= 0x1800;
11140 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
11141 if (r_type
== R_ARM_THM_CALL
|| r_type
== R_ARM_THM_JUMP24
)
11143 /* Check if a stub has to be inserted because the destination
11145 struct elf32_arm_stub_hash_entry
*stub_entry
;
11146 struct elf32_arm_link_hash_entry
*hash
;
11148 hash
= (struct elf32_arm_link_hash_entry
*) h
;
11150 stub_type
= arm_type_of_stub (info
, input_section
, rel
,
11151 st_type
, &branch_type
,
11152 hash
, value
, sym_sec
,
11153 input_bfd
, sym_name
);
11155 if (stub_type
!= arm_stub_none
)
11157 /* The target is out of reach or we are changing modes, so
11158 redirect the branch to the local stub for this
11160 stub_entry
= elf32_arm_get_stub_entry (input_section
,
11164 if (stub_entry
!= NULL
)
11166 value
= (stub_entry
->stub_offset
11167 + stub_entry
->stub_sec
->output_offset
11168 + stub_entry
->stub_sec
->output_section
->vma
);
11170 if (plt_offset
!= (bfd_vma
) -1)
11171 *unresolved_reloc_p
= FALSE
;
11174 /* If this call becomes a call to Arm, force BLX. */
11175 if (globals
->use_blx
&& (r_type
== R_ARM_THM_CALL
))
11178 && !arm_stub_is_thumb (stub_entry
->stub_type
))
11179 || branch_type
!= ST_BRANCH_TO_THUMB
)
11180 lower_insn
= (lower_insn
& ~0x1000) | 0x0800;
11185 /* Handle calls via the PLT. */
11186 if (stub_type
== arm_stub_none
&& plt_offset
!= (bfd_vma
) -1)
11188 value
= (splt
->output_section
->vma
11189 + splt
->output_offset
11192 if (globals
->use_blx
11193 && r_type
== R_ARM_THM_CALL
11194 && ! using_thumb_only (globals
))
11196 /* If the Thumb BLX instruction is available, convert
11197 the BL to a BLX instruction to call the ARM-mode
11199 lower_insn
= (lower_insn
& ~0x1000) | 0x0800;
11200 branch_type
= ST_BRANCH_TO_ARM
;
11204 if (! using_thumb_only (globals
))
11205 /* Target the Thumb stub before the ARM PLT entry. */
11206 value
-= PLT_THUMB_STUB_SIZE
;
11207 branch_type
= ST_BRANCH_TO_THUMB
;
11209 *unresolved_reloc_p
= FALSE
;
11212 relocation
= value
+ signed_addend
;
11214 relocation
-= (input_section
->output_section
->vma
11215 + input_section
->output_offset
11218 check
= relocation
>> howto
->rightshift
;
11220 /* If this is a signed value, the rightshift just dropped
11221 leading 1 bits (assuming twos complement). */
11222 if ((bfd_signed_vma
) relocation
>= 0)
11223 signed_check
= check
;
11225 signed_check
= check
| ~((bfd_vma
) -1 >> howto
->rightshift
);
11227 /* Calculate the permissable maximum and minimum values for
11228 this relocation according to whether we're relocating for
11230 bitsize
= howto
->bitsize
;
11233 reloc_signed_max
= (1 << (bitsize
- 1)) - 1;
11234 reloc_signed_min
= ~reloc_signed_max
;
11236 /* Assumes two's complement. */
11237 if (signed_check
> reloc_signed_max
|| signed_check
< reloc_signed_min
)
11240 if ((lower_insn
& 0x5000) == 0x4000)
11241 /* For a BLX instruction, make sure that the relocation is rounded up
11242 to a word boundary. This follows the semantics of the instruction
11243 which specifies that bit 1 of the target address will come from bit
11244 1 of the base address. */
11245 relocation
= (relocation
+ 2) & ~ 3;
11247 /* Put RELOCATION back into the insn. Assumes two's complement.
11248 We use the Thumb-2 encoding, which is safe even if dealing with
11249 a Thumb-1 instruction by virtue of our overflow check above. */
11250 reloc_sign
= (signed_check
< 0) ? 1 : 0;
11251 upper_insn
= (upper_insn
& ~(bfd_vma
) 0x7ff)
11252 | ((relocation
>> 12) & 0x3ff)
11253 | (reloc_sign
<< 10);
11254 lower_insn
= (lower_insn
& ~(bfd_vma
) 0x2fff)
11255 | (((!((relocation
>> 23) & 1)) ^ reloc_sign
) << 13)
11256 | (((!((relocation
>> 22) & 1)) ^ reloc_sign
) << 11)
11257 | ((relocation
>> 1) & 0x7ff);
11259 /* Put the relocated value back in the object file: */
11260 bfd_put_16 (input_bfd
, upper_insn
, hit_data
);
11261 bfd_put_16 (input_bfd
, lower_insn
, hit_data
+ 2);
11263 return (overflow
? bfd_reloc_overflow
: bfd_reloc_ok
);
11267 case R_ARM_THM_JUMP19
:
11268 /* Thumb32 conditional branch instruction. */
11270 bfd_vma relocation
;
11271 bfd_boolean overflow
= FALSE
;
11272 bfd_vma upper_insn
= bfd_get_16 (input_bfd
, hit_data
);
11273 bfd_vma lower_insn
= bfd_get_16 (input_bfd
, hit_data
+ 2);
11274 bfd_signed_vma reloc_signed_max
= 0xffffe;
11275 bfd_signed_vma reloc_signed_min
= -0x100000;
11276 bfd_signed_vma signed_check
;
11277 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
11278 struct elf32_arm_stub_hash_entry
*stub_entry
;
11279 struct elf32_arm_link_hash_entry
*hash
;
11281 /* Need to refetch the addend, reconstruct the top three bits,
11282 and squish the two 11 bit pieces together. */
11283 if (globals
->use_rel
)
11285 bfd_vma S
= (upper_insn
& 0x0400) >> 10;
11286 bfd_vma upper
= (upper_insn
& 0x003f);
11287 bfd_vma J1
= (lower_insn
& 0x2000) >> 13;
11288 bfd_vma J2
= (lower_insn
& 0x0800) >> 11;
11289 bfd_vma lower
= (lower_insn
& 0x07ff);
11293 upper
|= (!S
) << 8;
11294 upper
-= 0x0100; /* Sign extend. */
11296 addend
= (upper
<< 12) | (lower
<< 1);
11297 signed_addend
= addend
;
11300 /* Handle calls via the PLT. */
11301 if (plt_offset
!= (bfd_vma
) -1)
11303 value
= (splt
->output_section
->vma
11304 + splt
->output_offset
11306 /* Target the Thumb stub before the ARM PLT entry. */
11307 value
-= PLT_THUMB_STUB_SIZE
;
11308 *unresolved_reloc_p
= FALSE
;
11311 hash
= (struct elf32_arm_link_hash_entry
*)h
;
11313 stub_type
= arm_type_of_stub (info
, input_section
, rel
,
11314 st_type
, &branch_type
,
11315 hash
, value
, sym_sec
,
11316 input_bfd
, sym_name
);
11317 if (stub_type
!= arm_stub_none
)
11319 stub_entry
= elf32_arm_get_stub_entry (input_section
,
11323 if (stub_entry
!= NULL
)
11325 value
= (stub_entry
->stub_offset
11326 + stub_entry
->stub_sec
->output_offset
11327 + stub_entry
->stub_sec
->output_section
->vma
);
11331 relocation
= value
+ signed_addend
;
11332 relocation
-= (input_section
->output_section
->vma
11333 + input_section
->output_offset
11335 signed_check
= (bfd_signed_vma
) relocation
;
11337 if (signed_check
> reloc_signed_max
|| signed_check
< reloc_signed_min
)
11340 /* Put RELOCATION back into the insn. */
11342 bfd_vma S
= (relocation
& 0x00100000) >> 20;
11343 bfd_vma J2
= (relocation
& 0x00080000) >> 19;
11344 bfd_vma J1
= (relocation
& 0x00040000) >> 18;
11345 bfd_vma hi
= (relocation
& 0x0003f000) >> 12;
11346 bfd_vma lo
= (relocation
& 0x00000ffe) >> 1;
11348 upper_insn
= (upper_insn
& 0xfbc0) | (S
<< 10) | hi
;
11349 lower_insn
= (lower_insn
& 0xd000) | (J1
<< 13) | (J2
<< 11) | lo
;
11352 /* Put the relocated value back in the object file: */
11353 bfd_put_16 (input_bfd
, upper_insn
, hit_data
);
11354 bfd_put_16 (input_bfd
, lower_insn
, hit_data
+ 2);
11356 return (overflow
? bfd_reloc_overflow
: bfd_reloc_ok
);
11359 case R_ARM_THM_JUMP11
:
11360 case R_ARM_THM_JUMP8
:
11361 case R_ARM_THM_JUMP6
:
11362 /* Thumb B (branch) instruction). */
11364 bfd_signed_vma relocation
;
11365 bfd_signed_vma reloc_signed_max
= (1 << (howto
->bitsize
- 1)) - 1;
11366 bfd_signed_vma reloc_signed_min
= ~ reloc_signed_max
;
11367 bfd_signed_vma signed_check
;
11369 /* CZB cannot jump backward. */
11370 if (r_type
== R_ARM_THM_JUMP6
)
11371 reloc_signed_min
= 0;
11373 if (globals
->use_rel
)
11375 /* Need to refetch addend. */
11376 addend
= bfd_get_16 (input_bfd
, hit_data
) & howto
->src_mask
;
11377 if (addend
& ((howto
->src_mask
+ 1) >> 1))
11379 signed_addend
= -1;
11380 signed_addend
&= ~ howto
->src_mask
;
11381 signed_addend
|= addend
;
11384 signed_addend
= addend
;
11385 /* The value in the insn has been right shifted. We need to
11386 undo this, so that we can perform the address calculation
11387 in terms of bytes. */
11388 signed_addend
<<= howto
->rightshift
;
11390 relocation
= value
+ signed_addend
;
11392 relocation
-= (input_section
->output_section
->vma
11393 + input_section
->output_offset
11396 relocation
>>= howto
->rightshift
;
11397 signed_check
= relocation
;
11399 if (r_type
== R_ARM_THM_JUMP6
)
11400 relocation
= ((relocation
& 0x0020) << 4) | ((relocation
& 0x001f) << 3);
11402 relocation
&= howto
->dst_mask
;
11403 relocation
|= (bfd_get_16 (input_bfd
, hit_data
) & (~ howto
->dst_mask
));
11405 bfd_put_16 (input_bfd
, relocation
, hit_data
);
11407 /* Assumes two's complement. */
11408 if (signed_check
> reloc_signed_max
|| signed_check
< reloc_signed_min
)
11409 return bfd_reloc_overflow
;
11411 return bfd_reloc_ok
;
11414 case R_ARM_ALU_PCREL7_0
:
11415 case R_ARM_ALU_PCREL15_8
:
11416 case R_ARM_ALU_PCREL23_15
:
11419 bfd_vma relocation
;
11421 insn
= bfd_get_32 (input_bfd
, hit_data
);
11422 if (globals
->use_rel
)
11424 /* Extract the addend. */
11425 addend
= (insn
& 0xff) << ((insn
& 0xf00) >> 7);
11426 signed_addend
= addend
;
11428 relocation
= value
+ signed_addend
;
11430 relocation
-= (input_section
->output_section
->vma
11431 + input_section
->output_offset
11433 insn
= (insn
& ~0xfff)
11434 | ((howto
->bitpos
<< 7) & 0xf00)
11435 | ((relocation
>> howto
->bitpos
) & 0xff);
11436 bfd_put_32 (input_bfd
, value
, hit_data
);
11438 return bfd_reloc_ok
;
11440 case R_ARM_GNU_VTINHERIT
:
11441 case R_ARM_GNU_VTENTRY
:
11442 return bfd_reloc_ok
;
11444 case R_ARM_GOTOFF32
:
11445 /* Relocation is relative to the start of the
11446 global offset table. */
11448 BFD_ASSERT (sgot
!= NULL
);
11450 return bfd_reloc_notsupported
;
11452 /* If we are addressing a Thumb function, we need to adjust the
11453 address by one, so that attempts to call the function pointer will
11454 correctly interpret it as Thumb code. */
11455 if (branch_type
== ST_BRANCH_TO_THUMB
)
11458 /* Note that sgot->output_offset is not involved in this
11459 calculation. We always want the start of .got. If we
11460 define _GLOBAL_OFFSET_TABLE in a different way, as is
11461 permitted by the ABI, we might have to change this
11463 value
-= sgot
->output_section
->vma
;
11464 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
11465 contents
, rel
->r_offset
, value
,
11469 /* Use global offset table as symbol value. */
11470 BFD_ASSERT (sgot
!= NULL
);
11473 return bfd_reloc_notsupported
;
11475 *unresolved_reloc_p
= FALSE
;
11476 value
= sgot
->output_section
->vma
;
11477 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
11478 contents
, rel
->r_offset
, value
,
11482 case R_ARM_GOT_PREL
:
11483 /* Relocation is to the entry for this symbol in the
11484 global offset table. */
11486 return bfd_reloc_notsupported
;
11488 if (dynreloc_st_type
== STT_GNU_IFUNC
11489 && plt_offset
!= (bfd_vma
) -1
11490 && (h
== NULL
|| SYMBOL_REFERENCES_LOCAL (info
, h
)))
11492 /* We have a relocation against a locally-binding STT_GNU_IFUNC
11493 symbol, and the relocation resolves directly to the runtime
11494 target rather than to the .iplt entry. This means that any
11495 .got entry would be the same value as the .igot.plt entry,
11496 so there's no point creating both. */
11497 sgot
= globals
->root
.igotplt
;
11498 value
= sgot
->output_offset
+ gotplt_offset
;
11500 else if (h
!= NULL
)
11504 off
= h
->got
.offset
;
11505 BFD_ASSERT (off
!= (bfd_vma
) -1);
11506 if ((off
& 1) != 0)
11508 /* We have already processsed one GOT relocation against
11511 if (globals
->root
.dynamic_sections_created
11512 && !SYMBOL_REFERENCES_LOCAL (info
, h
))
11513 *unresolved_reloc_p
= FALSE
;
11517 Elf_Internal_Rela outrel
;
11520 if (((h
->dynindx
!= -1) || globals
->fdpic_p
)
11521 && !SYMBOL_REFERENCES_LOCAL (info
, h
))
11523 /* If the symbol doesn't resolve locally in a static
11524 object, we have an undefined reference. If the
11525 symbol doesn't resolve locally in a dynamic object,
11526 it should be resolved by the dynamic linker. */
11527 if (globals
->root
.dynamic_sections_created
)
11529 outrel
.r_info
= ELF32_R_INFO (h
->dynindx
, R_ARM_GLOB_DAT
);
11530 *unresolved_reloc_p
= FALSE
;
11534 outrel
.r_addend
= 0;
11538 if (dynreloc_st_type
== STT_GNU_IFUNC
)
11539 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_IRELATIVE
);
11540 else if (bfd_link_pic (info
)
11541 && !UNDEFWEAK_NO_DYNAMIC_RELOC (info
, h
))
11542 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_RELATIVE
);
11546 if (globals
->fdpic_p
)
11549 outrel
.r_addend
= dynreloc_value
;
11552 /* The GOT entry is initialized to zero by default.
11553 See if we should install a different value. */
11554 if (outrel
.r_addend
!= 0
11555 && (globals
->use_rel
|| outrel
.r_info
== 0))
11557 bfd_put_32 (output_bfd
, outrel
.r_addend
,
11558 sgot
->contents
+ off
);
11559 outrel
.r_addend
= 0;
11563 arm_elf_add_rofixup (output_bfd
,
11564 elf32_arm_hash_table(info
)->srofixup
,
11565 sgot
->output_section
->vma
11566 + sgot
->output_offset
+ off
);
11568 else if (outrel
.r_info
!= 0)
11570 outrel
.r_offset
= (sgot
->output_section
->vma
11571 + sgot
->output_offset
11573 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
11576 h
->got
.offset
|= 1;
11578 value
= sgot
->output_offset
+ off
;
11584 BFD_ASSERT (local_got_offsets
!= NULL
11585 && local_got_offsets
[r_symndx
] != (bfd_vma
) -1);
11587 off
= local_got_offsets
[r_symndx
];
11589 /* The offset must always be a multiple of 4. We use the
11590 least significant bit to record whether we have already
11591 generated the necessary reloc. */
11592 if ((off
& 1) != 0)
11596 Elf_Internal_Rela outrel
;
11599 if (dynreloc_st_type
== STT_GNU_IFUNC
)
11600 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_IRELATIVE
);
11601 else if (bfd_link_pic (info
))
11602 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_RELATIVE
);
11606 if (globals
->fdpic_p
)
11610 /* The GOT entry is initialized to zero by default.
11611 See if we should install a different value. */
11612 if (globals
->use_rel
|| outrel
.r_info
== 0)
11613 bfd_put_32 (output_bfd
, dynreloc_value
, sgot
->contents
+ off
);
11616 arm_elf_add_rofixup (output_bfd
,
11618 sgot
->output_section
->vma
11619 + sgot
->output_offset
+ off
);
11621 else if (outrel
.r_info
!= 0)
11623 outrel
.r_addend
= addend
+ dynreloc_value
;
11624 outrel
.r_offset
= (sgot
->output_section
->vma
11625 + sgot
->output_offset
11627 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
11630 local_got_offsets
[r_symndx
] |= 1;
11633 value
= sgot
->output_offset
+ off
;
11635 if (r_type
!= R_ARM_GOT32
)
11636 value
+= sgot
->output_section
->vma
;
11638 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
11639 contents
, rel
->r_offset
, value
,
11642 case R_ARM_TLS_LDO32
:
11643 value
= value
- dtpoff_base (info
);
11645 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
11646 contents
, rel
->r_offset
, value
,
11649 case R_ARM_TLS_LDM32
:
11650 case R_ARM_TLS_LDM32_FDPIC
:
11657 off
= globals
->tls_ldm_got
.offset
;
11659 if ((off
& 1) != 0)
11663 /* If we don't know the module number, create a relocation
11665 if (bfd_link_dll (info
))
11667 Elf_Internal_Rela outrel
;
11669 if (srelgot
== NULL
)
11672 outrel
.r_addend
= 0;
11673 outrel
.r_offset
= (sgot
->output_section
->vma
11674 + sgot
->output_offset
+ off
);
11675 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32
);
11677 if (globals
->use_rel
)
11678 bfd_put_32 (output_bfd
, outrel
.r_addend
,
11679 sgot
->contents
+ off
);
11681 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
11684 bfd_put_32 (output_bfd
, 1, sgot
->contents
+ off
);
11686 globals
->tls_ldm_got
.offset
|= 1;
11689 if (r_type
== R_ARM_TLS_LDM32_FDPIC
)
11691 bfd_put_32(output_bfd
,
11692 globals
->root
.sgot
->output_offset
+ off
,
11693 contents
+ rel
->r_offset
);
11695 return bfd_reloc_ok
;
11699 value
= sgot
->output_section
->vma
+ sgot
->output_offset
+ off
11700 - (input_section
->output_section
->vma
11701 + input_section
->output_offset
+ rel
->r_offset
);
11703 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
11704 contents
, rel
->r_offset
, value
,
11709 case R_ARM_TLS_CALL
:
11710 case R_ARM_THM_TLS_CALL
:
11711 case R_ARM_TLS_GD32
:
11712 case R_ARM_TLS_GD32_FDPIC
:
11713 case R_ARM_TLS_IE32
:
11714 case R_ARM_TLS_IE32_FDPIC
:
11715 case R_ARM_TLS_GOTDESC
:
11716 case R_ARM_TLS_DESCSEQ
:
11717 case R_ARM_THM_TLS_DESCSEQ
:
11719 bfd_vma off
, offplt
;
11723 BFD_ASSERT (sgot
!= NULL
);
11728 dyn
= globals
->root
.dynamic_sections_created
;
11729 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn
,
11730 bfd_link_pic (info
),
11732 && (!bfd_link_pic (info
)
11733 || !SYMBOL_REFERENCES_LOCAL (info
, h
)))
11735 *unresolved_reloc_p
= FALSE
;
11738 off
= h
->got
.offset
;
11739 offplt
= elf32_arm_hash_entry (h
)->tlsdesc_got
;
11740 tls_type
= ((struct elf32_arm_link_hash_entry
*) h
)->tls_type
;
11744 BFD_ASSERT (local_got_offsets
!= NULL
);
11745 off
= local_got_offsets
[r_symndx
];
11746 offplt
= local_tlsdesc_gotents
[r_symndx
];
11747 tls_type
= elf32_arm_local_got_tls_type (input_bfd
)[r_symndx
];
11750 /* Linker relaxations happens from one of the
11751 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
11752 if (ELF32_R_TYPE(rel
->r_info
) != r_type
)
11753 tls_type
= GOT_TLS_IE
;
11755 BFD_ASSERT (tls_type
!= GOT_UNKNOWN
);
11757 if ((off
& 1) != 0)
11761 bfd_boolean need_relocs
= FALSE
;
11762 Elf_Internal_Rela outrel
;
11765 /* The GOT entries have not been initialized yet. Do it
11766 now, and emit any relocations. If both an IE GOT and a
11767 GD GOT are necessary, we emit the GD first. */
11769 if ((bfd_link_dll (info
) || indx
!= 0)
11771 || (ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
11772 && !resolved_to_zero
)
11773 || h
->root
.type
!= bfd_link_hash_undefweak
))
11775 need_relocs
= TRUE
;
11776 BFD_ASSERT (srelgot
!= NULL
);
11779 if (tls_type
& GOT_TLS_GDESC
)
11783 /* We should have relaxed, unless this is an undefined
11785 BFD_ASSERT ((h
&& (h
->root
.type
== bfd_link_hash_undefweak
))
11786 || bfd_link_dll (info
));
11787 BFD_ASSERT (globals
->sgotplt_jump_table_size
+ offplt
+ 8
11788 <= globals
->root
.sgotplt
->size
);
11790 outrel
.r_addend
= 0;
11791 outrel
.r_offset
= (globals
->root
.sgotplt
->output_section
->vma
11792 + globals
->root
.sgotplt
->output_offset
11794 + globals
->sgotplt_jump_table_size
);
11796 outrel
.r_info
= ELF32_R_INFO (indx
, R_ARM_TLS_DESC
);
11797 sreloc
= globals
->root
.srelplt
;
11798 loc
= sreloc
->contents
;
11799 loc
+= globals
->next_tls_desc_index
++ * RELOC_SIZE (globals
);
11800 BFD_ASSERT (loc
+ RELOC_SIZE (globals
)
11801 <= sreloc
->contents
+ sreloc
->size
);
11803 SWAP_RELOC_OUT (globals
) (output_bfd
, &outrel
, loc
);
11805 /* For globals, the first word in the relocation gets
11806 the relocation index and the top bit set, or zero,
11807 if we're binding now. For locals, it gets the
11808 symbol's offset in the tls section. */
11809 bfd_put_32 (output_bfd
,
11810 !h
? value
- elf_hash_table (info
)->tls_sec
->vma
11811 : info
->flags
& DF_BIND_NOW
? 0
11812 : 0x80000000 | ELF32_R_SYM (outrel
.r_info
),
11813 globals
->root
.sgotplt
->contents
+ offplt
11814 + globals
->sgotplt_jump_table_size
);
11816 /* Second word in the relocation is always zero. */
11817 bfd_put_32 (output_bfd
, 0,
11818 globals
->root
.sgotplt
->contents
+ offplt
11819 + globals
->sgotplt_jump_table_size
+ 4);
11821 if (tls_type
& GOT_TLS_GD
)
11825 outrel
.r_addend
= 0;
11826 outrel
.r_offset
= (sgot
->output_section
->vma
11827 + sgot
->output_offset
11829 outrel
.r_info
= ELF32_R_INFO (indx
, R_ARM_TLS_DTPMOD32
);
11831 if (globals
->use_rel
)
11832 bfd_put_32 (output_bfd
, outrel
.r_addend
,
11833 sgot
->contents
+ cur_off
);
11835 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
11838 bfd_put_32 (output_bfd
, value
- dtpoff_base (info
),
11839 sgot
->contents
+ cur_off
+ 4);
11842 outrel
.r_addend
= 0;
11843 outrel
.r_info
= ELF32_R_INFO (indx
,
11844 R_ARM_TLS_DTPOFF32
);
11845 outrel
.r_offset
+= 4;
11847 if (globals
->use_rel
)
11848 bfd_put_32 (output_bfd
, outrel
.r_addend
,
11849 sgot
->contents
+ cur_off
+ 4);
11851 elf32_arm_add_dynreloc (output_bfd
, info
,
11857 /* If we are not emitting relocations for a
11858 general dynamic reference, then we must be in a
11859 static link or an executable link with the
11860 symbol binding locally. Mark it as belonging
11861 to module 1, the executable. */
11862 bfd_put_32 (output_bfd
, 1,
11863 sgot
->contents
+ cur_off
);
11864 bfd_put_32 (output_bfd
, value
- dtpoff_base (info
),
11865 sgot
->contents
+ cur_off
+ 4);
11871 if (tls_type
& GOT_TLS_IE
)
11876 outrel
.r_addend
= value
- dtpoff_base (info
);
11878 outrel
.r_addend
= 0;
11879 outrel
.r_offset
= (sgot
->output_section
->vma
11880 + sgot
->output_offset
11882 outrel
.r_info
= ELF32_R_INFO (indx
, R_ARM_TLS_TPOFF32
);
11884 if (globals
->use_rel
)
11885 bfd_put_32 (output_bfd
, outrel
.r_addend
,
11886 sgot
->contents
+ cur_off
);
11888 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
11891 bfd_put_32 (output_bfd
, tpoff (info
, value
),
11892 sgot
->contents
+ cur_off
);
11897 h
->got
.offset
|= 1;
11899 local_got_offsets
[r_symndx
] |= 1;
11902 if ((tls_type
& GOT_TLS_GD
) && r_type
!= R_ARM_TLS_GD32
&& r_type
!= R_ARM_TLS_GD32_FDPIC
)
11904 else if (tls_type
& GOT_TLS_GDESC
)
11907 if (ELF32_R_TYPE(rel
->r_info
) == R_ARM_TLS_CALL
11908 || ELF32_R_TYPE(rel
->r_info
) == R_ARM_THM_TLS_CALL
)
11910 bfd_signed_vma offset
;
11911 /* TLS stubs are arm mode. The original symbol is a
11912 data object, so branch_type is bogus. */
11913 branch_type
= ST_BRANCH_TO_ARM
;
11914 enum elf32_arm_stub_type stub_type
11915 = arm_type_of_stub (info
, input_section
, rel
,
11916 st_type
, &branch_type
,
11917 (struct elf32_arm_link_hash_entry
*)h
,
11918 globals
->tls_trampoline
, globals
->root
.splt
,
11919 input_bfd
, sym_name
);
11921 if (stub_type
!= arm_stub_none
)
11923 struct elf32_arm_stub_hash_entry
*stub_entry
11924 = elf32_arm_get_stub_entry
11925 (input_section
, globals
->root
.splt
, 0, rel
,
11926 globals
, stub_type
);
11927 offset
= (stub_entry
->stub_offset
11928 + stub_entry
->stub_sec
->output_offset
11929 + stub_entry
->stub_sec
->output_section
->vma
);
11932 offset
= (globals
->root
.splt
->output_section
->vma
11933 + globals
->root
.splt
->output_offset
11934 + globals
->tls_trampoline
);
11936 if (ELF32_R_TYPE(rel
->r_info
) == R_ARM_TLS_CALL
)
11938 unsigned long inst
;
11940 offset
-= (input_section
->output_section
->vma
11941 + input_section
->output_offset
11942 + rel
->r_offset
+ 8);
11944 inst
= offset
>> 2;
11945 inst
&= 0x00ffffff;
11946 value
= inst
| (globals
->use_blx
? 0xfa000000 : 0xeb000000);
11950 /* Thumb blx encodes the offset in a complicated
11952 unsigned upper_insn
, lower_insn
;
11955 offset
-= (input_section
->output_section
->vma
11956 + input_section
->output_offset
11957 + rel
->r_offset
+ 4);
11959 if (stub_type
!= arm_stub_none
11960 && arm_stub_is_thumb (stub_type
))
11962 lower_insn
= 0xd000;
11966 lower_insn
= 0xc000;
11967 /* Round up the offset to a word boundary. */
11968 offset
= (offset
+ 2) & ~2;
11972 upper_insn
= (0xf000
11973 | ((offset
>> 12) & 0x3ff)
11975 lower_insn
|= (((!((offset
>> 23) & 1)) ^ neg
) << 13)
11976 | (((!((offset
>> 22) & 1)) ^ neg
) << 11)
11977 | ((offset
>> 1) & 0x7ff);
11978 bfd_put_16 (input_bfd
, upper_insn
, hit_data
);
11979 bfd_put_16 (input_bfd
, lower_insn
, hit_data
+ 2);
11980 return bfd_reloc_ok
;
11983 /* These relocations needs special care, as besides the fact
11984 they point somewhere in .gotplt, the addend must be
11985 adjusted accordingly depending on the type of instruction
11987 else if ((r_type
== R_ARM_TLS_GOTDESC
) && (tls_type
& GOT_TLS_GDESC
))
11989 unsigned long data
, insn
;
11992 data
= bfd_get_signed_32 (input_bfd
, hit_data
);
11998 insn
= bfd_get_16 (input_bfd
, contents
+ rel
->r_offset
- data
);
11999 if ((insn
& 0xf000) == 0xf000 || (insn
& 0xf800) == 0xe800)
12000 insn
= (insn
<< 16)
12001 | bfd_get_16 (input_bfd
,
12002 contents
+ rel
->r_offset
- data
+ 2);
12003 if ((insn
& 0xf800c000) == 0xf000c000)
12006 else if ((insn
& 0xffffff00) == 0x4400)
12012 /* xgettext:c-format */
12013 (_("%pB(%pA+%#" PRIx64
"): "
12014 "unexpected %s instruction '%#lx' "
12015 "referenced by TLS_GOTDESC"),
12016 input_bfd
, input_section
, (uint64_t) rel
->r_offset
,
12018 return bfd_reloc_notsupported
;
12023 insn
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
- data
);
12025 switch (insn
>> 24)
12027 case 0xeb: /* bl */
12028 case 0xfa: /* blx */
12032 case 0xe0: /* add */
12038 /* xgettext:c-format */
12039 (_("%pB(%pA+%#" PRIx64
"): "
12040 "unexpected %s instruction '%#lx' "
12041 "referenced by TLS_GOTDESC"),
12042 input_bfd
, input_section
, (uint64_t) rel
->r_offset
,
12044 return bfd_reloc_notsupported
;
12048 value
+= ((globals
->root
.sgotplt
->output_section
->vma
12049 + globals
->root
.sgotplt
->output_offset
+ off
)
12050 - (input_section
->output_section
->vma
12051 + input_section
->output_offset
12053 + globals
->sgotplt_jump_table_size
);
12056 value
= ((globals
->root
.sgot
->output_section
->vma
12057 + globals
->root
.sgot
->output_offset
+ off
)
12058 - (input_section
->output_section
->vma
12059 + input_section
->output_offset
+ rel
->r_offset
));
12061 if (globals
->fdpic_p
&& (r_type
== R_ARM_TLS_GD32_FDPIC
||
12062 r_type
== R_ARM_TLS_IE32_FDPIC
))
12064 /* For FDPIC relocations, resolve to the offset of the GOT
12065 entry from the start of GOT. */
12066 bfd_put_32(output_bfd
,
12067 globals
->root
.sgot
->output_offset
+ off
,
12068 contents
+ rel
->r_offset
);
12070 return bfd_reloc_ok
;
12074 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
12075 contents
, rel
->r_offset
, value
,
12080 case R_ARM_TLS_LE32
:
12081 if (bfd_link_dll (info
))
12084 /* xgettext:c-format */
12085 (_("%pB(%pA+%#" PRIx64
"): %s relocation not permitted "
12086 "in shared object"),
12087 input_bfd
, input_section
, (uint64_t) rel
->r_offset
, howto
->name
);
12088 return bfd_reloc_notsupported
;
12091 value
= tpoff (info
, value
);
12093 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
12094 contents
, rel
->r_offset
, value
,
12098 if (globals
->fix_v4bx
)
12100 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
12102 /* Ensure that we have a BX instruction. */
12103 BFD_ASSERT ((insn
& 0x0ffffff0) == 0x012fff10);
12105 if (globals
->fix_v4bx
== 2 && (insn
& 0xf) != 0xf)
12107 /* Branch to veneer. */
12109 glue_addr
= elf32_arm_bx_glue (info
, insn
& 0xf);
12110 glue_addr
-= input_section
->output_section
->vma
12111 + input_section
->output_offset
12112 + rel
->r_offset
+ 8;
12113 insn
= (insn
& 0xf0000000) | 0x0a000000
12114 | ((glue_addr
>> 2) & 0x00ffffff);
12118 /* Preserve Rm (lowest four bits) and the condition code
12119 (highest four bits). Other bits encode MOV PC,Rm. */
12120 insn
= (insn
& 0xf000000f) | 0x01a0f000;
12123 bfd_put_32 (input_bfd
, insn
, hit_data
);
12125 return bfd_reloc_ok
;
12127 case R_ARM_MOVW_ABS_NC
:
12128 case R_ARM_MOVT_ABS
:
12129 case R_ARM_MOVW_PREL_NC
:
12130 case R_ARM_MOVT_PREL
:
12131 /* Until we properly support segment-base-relative addressing then
12132 we assume the segment base to be zero, as for the group relocations.
12133 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
12134 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
12135 case R_ARM_MOVW_BREL_NC
:
12136 case R_ARM_MOVW_BREL
:
12137 case R_ARM_MOVT_BREL
:
12139 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
12141 if (globals
->use_rel
)
12143 addend
= ((insn
>> 4) & 0xf000) | (insn
& 0xfff);
12144 signed_addend
= (addend
^ 0x8000) - 0x8000;
12147 value
+= signed_addend
;
12149 if (r_type
== R_ARM_MOVW_PREL_NC
|| r_type
== R_ARM_MOVT_PREL
)
12150 value
-= (input_section
->output_section
->vma
12151 + input_section
->output_offset
+ rel
->r_offset
);
12153 if (r_type
== R_ARM_MOVW_BREL
&& value
>= 0x10000)
12154 return bfd_reloc_overflow
;
12156 if (branch_type
== ST_BRANCH_TO_THUMB
)
12159 if (r_type
== R_ARM_MOVT_ABS
|| r_type
== R_ARM_MOVT_PREL
12160 || r_type
== R_ARM_MOVT_BREL
)
12163 insn
&= 0xfff0f000;
12164 insn
|= value
& 0xfff;
12165 insn
|= (value
& 0xf000) << 4;
12166 bfd_put_32 (input_bfd
, insn
, hit_data
);
12168 return bfd_reloc_ok
;
12170 case R_ARM_THM_MOVW_ABS_NC
:
12171 case R_ARM_THM_MOVT_ABS
:
12172 case R_ARM_THM_MOVW_PREL_NC
:
12173 case R_ARM_THM_MOVT_PREL
:
12174 /* Until we properly support segment-base-relative addressing then
12175 we assume the segment base to be zero, as for the above relocations.
12176 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
12177 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
12178 as R_ARM_THM_MOVT_ABS. */
12179 case R_ARM_THM_MOVW_BREL_NC
:
12180 case R_ARM_THM_MOVW_BREL
:
12181 case R_ARM_THM_MOVT_BREL
:
12185 insn
= bfd_get_16 (input_bfd
, hit_data
) << 16;
12186 insn
|= bfd_get_16 (input_bfd
, hit_data
+ 2);
12188 if (globals
->use_rel
)
12190 addend
= ((insn
>> 4) & 0xf000)
12191 | ((insn
>> 15) & 0x0800)
12192 | ((insn
>> 4) & 0x0700)
12194 signed_addend
= (addend
^ 0x8000) - 0x8000;
12197 value
+= signed_addend
;
12199 if (r_type
== R_ARM_THM_MOVW_PREL_NC
|| r_type
== R_ARM_THM_MOVT_PREL
)
12200 value
-= (input_section
->output_section
->vma
12201 + input_section
->output_offset
+ rel
->r_offset
);
12203 if (r_type
== R_ARM_THM_MOVW_BREL
&& value
>= 0x10000)
12204 return bfd_reloc_overflow
;
12206 if (branch_type
== ST_BRANCH_TO_THUMB
)
12209 if (r_type
== R_ARM_THM_MOVT_ABS
|| r_type
== R_ARM_THM_MOVT_PREL
12210 || r_type
== R_ARM_THM_MOVT_BREL
)
12213 insn
&= 0xfbf08f00;
12214 insn
|= (value
& 0xf000) << 4;
12215 insn
|= (value
& 0x0800) << 15;
12216 insn
|= (value
& 0x0700) << 4;
12217 insn
|= (value
& 0x00ff);
12219 bfd_put_16 (input_bfd
, insn
>> 16, hit_data
);
12220 bfd_put_16 (input_bfd
, insn
& 0xffff, hit_data
+ 2);
12222 return bfd_reloc_ok
;
12224 case R_ARM_ALU_PC_G0_NC
:
12225 case R_ARM_ALU_PC_G1_NC
:
12226 case R_ARM_ALU_PC_G0
:
12227 case R_ARM_ALU_PC_G1
:
12228 case R_ARM_ALU_PC_G2
:
12229 case R_ARM_ALU_SB_G0_NC
:
12230 case R_ARM_ALU_SB_G1_NC
:
12231 case R_ARM_ALU_SB_G0
:
12232 case R_ARM_ALU_SB_G1
:
12233 case R_ARM_ALU_SB_G2
:
12235 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
12236 bfd_vma pc
= input_section
->output_section
->vma
12237 + input_section
->output_offset
+ rel
->r_offset
;
12238 /* sb is the origin of the *segment* containing the symbol. */
12239 bfd_vma sb
= sym_sec
? sym_sec
->output_section
->vma
: 0;
12242 bfd_signed_vma signed_value
;
12245 /* Determine which group of bits to select. */
12248 case R_ARM_ALU_PC_G0_NC
:
12249 case R_ARM_ALU_PC_G0
:
12250 case R_ARM_ALU_SB_G0_NC
:
12251 case R_ARM_ALU_SB_G0
:
12255 case R_ARM_ALU_PC_G1_NC
:
12256 case R_ARM_ALU_PC_G1
:
12257 case R_ARM_ALU_SB_G1_NC
:
12258 case R_ARM_ALU_SB_G1
:
12262 case R_ARM_ALU_PC_G2
:
12263 case R_ARM_ALU_SB_G2
:
12271 /* If REL, extract the addend from the insn. If RELA, it will
12272 have already been fetched for us. */
12273 if (globals
->use_rel
)
12276 bfd_vma constant
= insn
& 0xff;
12277 bfd_vma rotation
= (insn
& 0xf00) >> 8;
12280 signed_addend
= constant
;
12283 /* Compensate for the fact that in the instruction, the
12284 rotation is stored in multiples of 2 bits. */
12287 /* Rotate "constant" right by "rotation" bits. */
12288 signed_addend
= (constant
>> rotation
) |
12289 (constant
<< (8 * sizeof (bfd_vma
) - rotation
));
12292 /* Determine if the instruction is an ADD or a SUB.
12293 (For REL, this determines the sign of the addend.) */
12294 negative
= identify_add_or_sub (insn
);
12298 /* xgettext:c-format */
12299 (_("%pB(%pA+%#" PRIx64
"): only ADD or SUB instructions "
12300 "are allowed for ALU group relocations"),
12301 input_bfd
, input_section
, (uint64_t) rel
->r_offset
);
12302 return bfd_reloc_overflow
;
12305 signed_addend
*= negative
;
12308 /* Compute the value (X) to go in the place. */
12309 if (r_type
== R_ARM_ALU_PC_G0_NC
12310 || r_type
== R_ARM_ALU_PC_G1_NC
12311 || r_type
== R_ARM_ALU_PC_G0
12312 || r_type
== R_ARM_ALU_PC_G1
12313 || r_type
== R_ARM_ALU_PC_G2
)
12315 signed_value
= value
- pc
+ signed_addend
;
12317 /* Section base relative. */
12318 signed_value
= value
- sb
+ signed_addend
;
12320 /* If the target symbol is a Thumb function, then set the
12321 Thumb bit in the address. */
12322 if (branch_type
== ST_BRANCH_TO_THUMB
)
12325 /* Calculate the value of the relevant G_n, in encoded
12326 constant-with-rotation format. */
12327 g_n
= calculate_group_reloc_mask (signed_value
< 0 ? - signed_value
: signed_value
,
12330 /* Check for overflow if required. */
12331 if ((r_type
== R_ARM_ALU_PC_G0
12332 || r_type
== R_ARM_ALU_PC_G1
12333 || r_type
== R_ARM_ALU_PC_G2
12334 || r_type
== R_ARM_ALU_SB_G0
12335 || r_type
== R_ARM_ALU_SB_G1
12336 || r_type
== R_ARM_ALU_SB_G2
) && residual
!= 0)
12339 /* xgettext:c-format */
12340 (_("%pB(%pA+%#" PRIx64
"): overflow whilst "
12341 "splitting %#" PRIx64
" for group relocation %s"),
12342 input_bfd
, input_section
, (uint64_t) rel
->r_offset
,
12343 (uint64_t) (signed_value
< 0 ? -signed_value
: signed_value
),
12345 return bfd_reloc_overflow
;
12348 /* Mask out the value and the ADD/SUB part of the opcode; take care
12349 not to destroy the S bit. */
12350 insn
&= 0xff1ff000;
12352 /* Set the opcode according to whether the value to go in the
12353 place is negative. */
12354 if (signed_value
< 0)
12359 /* Encode the offset. */
12362 bfd_put_32 (input_bfd
, insn
, hit_data
);
12364 return bfd_reloc_ok
;
12366 case R_ARM_LDR_PC_G0
:
12367 case R_ARM_LDR_PC_G1
:
12368 case R_ARM_LDR_PC_G2
:
12369 case R_ARM_LDR_SB_G0
:
12370 case R_ARM_LDR_SB_G1
:
12371 case R_ARM_LDR_SB_G2
:
12373 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
12374 bfd_vma pc
= input_section
->output_section
->vma
12375 + input_section
->output_offset
+ rel
->r_offset
;
12376 /* sb is the origin of the *segment* containing the symbol. */
12377 bfd_vma sb
= sym_sec
? sym_sec
->output_section
->vma
: 0;
12379 bfd_signed_vma signed_value
;
12382 /* Determine which groups of bits to calculate. */
12385 case R_ARM_LDR_PC_G0
:
12386 case R_ARM_LDR_SB_G0
:
12390 case R_ARM_LDR_PC_G1
:
12391 case R_ARM_LDR_SB_G1
:
12395 case R_ARM_LDR_PC_G2
:
12396 case R_ARM_LDR_SB_G2
:
12404 /* If REL, extract the addend from the insn. If RELA, it will
12405 have already been fetched for us. */
12406 if (globals
->use_rel
)
12408 int negative
= (insn
& (1 << 23)) ? 1 : -1;
12409 signed_addend
= negative
* (insn
& 0xfff);
12412 /* Compute the value (X) to go in the place. */
12413 if (r_type
== R_ARM_LDR_PC_G0
12414 || r_type
== R_ARM_LDR_PC_G1
12415 || r_type
== R_ARM_LDR_PC_G2
)
12417 signed_value
= value
- pc
+ signed_addend
;
12419 /* Section base relative. */
12420 signed_value
= value
- sb
+ signed_addend
;
12422 /* Calculate the value of the relevant G_{n-1} to obtain
12423 the residual at that stage. */
12424 calculate_group_reloc_mask (signed_value
< 0 ? - signed_value
: signed_value
,
12425 group
- 1, &residual
);
12427 /* Check for overflow. */
12428 if (residual
>= 0x1000)
12431 /* xgettext:c-format */
12432 (_("%pB(%pA+%#" PRIx64
"): overflow whilst "
12433 "splitting %#" PRIx64
" for group relocation %s"),
12434 input_bfd
, input_section
, (uint64_t) rel
->r_offset
,
12435 (uint64_t) (signed_value
< 0 ? -signed_value
: signed_value
),
12437 return bfd_reloc_overflow
;
12440 /* Mask out the value and U bit. */
12441 insn
&= 0xff7ff000;
12443 /* Set the U bit if the value to go in the place is non-negative. */
12444 if (signed_value
>= 0)
12447 /* Encode the offset. */
12450 bfd_put_32 (input_bfd
, insn
, hit_data
);
12452 return bfd_reloc_ok
;
12454 case R_ARM_LDRS_PC_G0
:
12455 case R_ARM_LDRS_PC_G1
:
12456 case R_ARM_LDRS_PC_G2
:
12457 case R_ARM_LDRS_SB_G0
:
12458 case R_ARM_LDRS_SB_G1
:
12459 case R_ARM_LDRS_SB_G2
:
12461 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
12462 bfd_vma pc
= input_section
->output_section
->vma
12463 + input_section
->output_offset
+ rel
->r_offset
;
12464 /* sb is the origin of the *segment* containing the symbol. */
12465 bfd_vma sb
= sym_sec
? sym_sec
->output_section
->vma
: 0;
12467 bfd_signed_vma signed_value
;
12470 /* Determine which groups of bits to calculate. */
12473 case R_ARM_LDRS_PC_G0
:
12474 case R_ARM_LDRS_SB_G0
:
12478 case R_ARM_LDRS_PC_G1
:
12479 case R_ARM_LDRS_SB_G1
:
12483 case R_ARM_LDRS_PC_G2
:
12484 case R_ARM_LDRS_SB_G2
:
12492 /* If REL, extract the addend from the insn. If RELA, it will
12493 have already been fetched for us. */
12494 if (globals
->use_rel
)
12496 int negative
= (insn
& (1 << 23)) ? 1 : -1;
12497 signed_addend
= negative
* (((insn
& 0xf00) >> 4) + (insn
& 0xf));
12500 /* Compute the value (X) to go in the place. */
12501 if (r_type
== R_ARM_LDRS_PC_G0
12502 || r_type
== R_ARM_LDRS_PC_G1
12503 || r_type
== R_ARM_LDRS_PC_G2
)
12505 signed_value
= value
- pc
+ signed_addend
;
12507 /* Section base relative. */
12508 signed_value
= value
- sb
+ signed_addend
;
12510 /* Calculate the value of the relevant G_{n-1} to obtain
12511 the residual at that stage. */
12512 calculate_group_reloc_mask (signed_value
< 0 ? - signed_value
: signed_value
,
12513 group
- 1, &residual
);
12515 /* Check for overflow. */
12516 if (residual
>= 0x100)
12519 /* xgettext:c-format */
12520 (_("%pB(%pA+%#" PRIx64
"): overflow whilst "
12521 "splitting %#" PRIx64
" for group relocation %s"),
12522 input_bfd
, input_section
, (uint64_t) rel
->r_offset
,
12523 (uint64_t) (signed_value
< 0 ? -signed_value
: signed_value
),
12525 return bfd_reloc_overflow
;
12528 /* Mask out the value and U bit. */
12529 insn
&= 0xff7ff0f0;
12531 /* Set the U bit if the value to go in the place is non-negative. */
12532 if (signed_value
>= 0)
12535 /* Encode the offset. */
12536 insn
|= ((residual
& 0xf0) << 4) | (residual
& 0xf);
12538 bfd_put_32 (input_bfd
, insn
, hit_data
);
12540 return bfd_reloc_ok
;
12542 case R_ARM_LDC_PC_G0
:
12543 case R_ARM_LDC_PC_G1
:
12544 case R_ARM_LDC_PC_G2
:
12545 case R_ARM_LDC_SB_G0
:
12546 case R_ARM_LDC_SB_G1
:
12547 case R_ARM_LDC_SB_G2
:
12549 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
12550 bfd_vma pc
= input_section
->output_section
->vma
12551 + input_section
->output_offset
+ rel
->r_offset
;
12552 /* sb is the origin of the *segment* containing the symbol. */
12553 bfd_vma sb
= sym_sec
? sym_sec
->output_section
->vma
: 0;
12555 bfd_signed_vma signed_value
;
12558 /* Determine which groups of bits to calculate. */
12561 case R_ARM_LDC_PC_G0
:
12562 case R_ARM_LDC_SB_G0
:
12566 case R_ARM_LDC_PC_G1
:
12567 case R_ARM_LDC_SB_G1
:
12571 case R_ARM_LDC_PC_G2
:
12572 case R_ARM_LDC_SB_G2
:
12580 /* If REL, extract the addend from the insn. If RELA, it will
12581 have already been fetched for us. */
12582 if (globals
->use_rel
)
12584 int negative
= (insn
& (1 << 23)) ? 1 : -1;
12585 signed_addend
= negative
* ((insn
& 0xff) << 2);
12588 /* Compute the value (X) to go in the place. */
12589 if (r_type
== R_ARM_LDC_PC_G0
12590 || r_type
== R_ARM_LDC_PC_G1
12591 || r_type
== R_ARM_LDC_PC_G2
)
12593 signed_value
= value
- pc
+ signed_addend
;
12595 /* Section base relative. */
12596 signed_value
= value
- sb
+ signed_addend
;
12598 /* Calculate the value of the relevant G_{n-1} to obtain
12599 the residual at that stage. */
12600 calculate_group_reloc_mask (signed_value
< 0 ? - signed_value
: signed_value
,
12601 group
- 1, &residual
);
12603 /* Check for overflow. (The absolute value to go in the place must be
12604 divisible by four and, after having been divided by four, must
12605 fit in eight bits.) */
12606 if ((residual
& 0x3) != 0 || residual
>= 0x400)
12609 /* xgettext:c-format */
12610 (_("%pB(%pA+%#" PRIx64
"): overflow whilst "
12611 "splitting %#" PRIx64
" for group relocation %s"),
12612 input_bfd
, input_section
, (uint64_t) rel
->r_offset
,
12613 (uint64_t) (signed_value
< 0 ? -signed_value
: signed_value
),
12615 return bfd_reloc_overflow
;
12618 /* Mask out the value and U bit. */
12619 insn
&= 0xff7fff00;
12621 /* Set the U bit if the value to go in the place is non-negative. */
12622 if (signed_value
>= 0)
12625 /* Encode the offset. */
12626 insn
|= residual
>> 2;
12628 bfd_put_32 (input_bfd
, insn
, hit_data
);
12630 return bfd_reloc_ok
;
12632 case R_ARM_THM_ALU_ABS_G0_NC
:
12633 case R_ARM_THM_ALU_ABS_G1_NC
:
12634 case R_ARM_THM_ALU_ABS_G2_NC
:
12635 case R_ARM_THM_ALU_ABS_G3_NC
:
12637 const int shift_array
[4] = {0, 8, 16, 24};
12638 bfd_vma insn
= bfd_get_16 (input_bfd
, hit_data
);
12639 bfd_vma addr
= value
;
12640 int shift
= shift_array
[r_type
- R_ARM_THM_ALU_ABS_G0_NC
];
12642 /* Compute address. */
12643 if (globals
->use_rel
)
12644 signed_addend
= insn
& 0xff;
12645 addr
+= signed_addend
;
12646 if (branch_type
== ST_BRANCH_TO_THUMB
)
12648 /* Clean imm8 insn. */
12650 /* And update with correct part of address. */
12651 insn
|= (addr
>> shift
) & 0xff;
12653 bfd_put_16 (input_bfd
, insn
, hit_data
);
12656 *unresolved_reloc_p
= FALSE
;
12657 return bfd_reloc_ok
;
12659 case R_ARM_GOTOFFFUNCDESC
:
12663 struct fdpic_local
*local_fdpic_cnts
= elf32_arm_local_fdpic_cnts(input_bfd
);
12664 int dynindx
= elf_section_data (sym_sec
->output_section
)->dynindx
;
12665 int offset
= local_fdpic_cnts
[r_symndx
].funcdesc_offset
& ~1;
12666 bfd_vma addr
= dynreloc_value
- sym_sec
->output_section
->vma
;
12669 if (bfd_link_pic(info
) && dynindx
== 0)
12672 /* Resolve relocation. */
12673 bfd_put_32(output_bfd
, (offset
+ sgot
->output_offset
)
12674 , contents
+ rel
->r_offset
);
12675 /* Emit R_ARM_FUNCDESC_VALUE or two fixups on funcdesc if
12677 arm_elf_fill_funcdesc(output_bfd
, info
,
12678 &local_fdpic_cnts
[r_symndx
].funcdesc_offset
,
12679 dynindx
, offset
, addr
, dynreloc_value
, seg
);
12684 int offset
= eh
->fdpic_cnts
.funcdesc_offset
& ~1;
12688 /* For static binaries, sym_sec can be null. */
12691 dynindx
= elf_section_data (sym_sec
->output_section
)->dynindx
;
12692 addr
= dynreloc_value
- sym_sec
->output_section
->vma
;
12700 if (bfd_link_pic(info
) && dynindx
== 0)
12703 /* This case cannot occur since funcdesc is allocated by
12704 the dynamic loader so we cannot resolve the relocation. */
12705 if (h
->dynindx
!= -1)
12708 /* Resolve relocation. */
12709 bfd_put_32(output_bfd
, (offset
+ sgot
->output_offset
),
12710 contents
+ rel
->r_offset
);
12711 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12712 arm_elf_fill_funcdesc(output_bfd
, info
,
12713 &eh
->fdpic_cnts
.funcdesc_offset
,
12714 dynindx
, offset
, addr
, dynreloc_value
, seg
);
12717 *unresolved_reloc_p
= FALSE
;
12718 return bfd_reloc_ok
;
12720 case R_ARM_GOTFUNCDESC
:
12724 Elf_Internal_Rela outrel
;
12726 /* Resolve relocation. */
12727 bfd_put_32(output_bfd
, ((eh
->fdpic_cnts
.gotfuncdesc_offset
& ~1)
12728 + sgot
->output_offset
),
12729 contents
+ rel
->r_offset
);
12730 /* Add funcdesc and associated R_ARM_FUNCDESC_VALUE. */
12731 if(h
->dynindx
== -1)
12734 int offset
= eh
->fdpic_cnts
.funcdesc_offset
& ~1;
12738 /* For static binaries sym_sec can be null. */
12741 dynindx
= elf_section_data (sym_sec
->output_section
)->dynindx
;
12742 addr
= dynreloc_value
- sym_sec
->output_section
->vma
;
12750 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12751 arm_elf_fill_funcdesc(output_bfd
, info
,
12752 &eh
->fdpic_cnts
.funcdesc_offset
,
12753 dynindx
, offset
, addr
, dynreloc_value
, seg
);
12756 /* Add a dynamic relocation on GOT entry if not already done. */
12757 if ((eh
->fdpic_cnts
.gotfuncdesc_offset
& 1) == 0)
12759 if (h
->dynindx
== -1)
12761 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_RELATIVE
);
12762 if (h
->root
.type
== bfd_link_hash_undefweak
)
12763 bfd_put_32(output_bfd
, 0, sgot
->contents
12764 + (eh
->fdpic_cnts
.gotfuncdesc_offset
& ~1));
12766 bfd_put_32(output_bfd
, sgot
->output_section
->vma
12767 + sgot
->output_offset
12768 + (eh
->fdpic_cnts
.funcdesc_offset
& ~1),
12770 + (eh
->fdpic_cnts
.gotfuncdesc_offset
& ~1));
12774 outrel
.r_info
= ELF32_R_INFO (h
->dynindx
, R_ARM_FUNCDESC
);
12776 outrel
.r_offset
= sgot
->output_section
->vma
12777 + sgot
->output_offset
12778 + (eh
->fdpic_cnts
.gotfuncdesc_offset
& ~1);
12779 outrel
.r_addend
= 0;
12780 if (h
->dynindx
== -1 && !bfd_link_pic(info
))
12781 if (h
->root
.type
== bfd_link_hash_undefweak
)
12782 arm_elf_add_rofixup(output_bfd
, globals
->srofixup
, -1);
12784 arm_elf_add_rofixup(output_bfd
, globals
->srofixup
,
12787 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
12788 eh
->fdpic_cnts
.gotfuncdesc_offset
|= 1;
12793 /* Such relocation on static function should not have been
12794 emitted by the compiler. */
12798 *unresolved_reloc_p
= FALSE
;
12799 return bfd_reloc_ok
;
12801 case R_ARM_FUNCDESC
:
12805 struct fdpic_local
*local_fdpic_cnts
= elf32_arm_local_fdpic_cnts(input_bfd
);
12806 Elf_Internal_Rela outrel
;
12807 int dynindx
= elf_section_data (sym_sec
->output_section
)->dynindx
;
12808 int offset
= local_fdpic_cnts
[r_symndx
].funcdesc_offset
& ~1;
12809 bfd_vma addr
= dynreloc_value
- sym_sec
->output_section
->vma
;
12812 if (bfd_link_pic(info
) && dynindx
== 0)
12815 /* Replace static FUNCDESC relocation with a
12816 R_ARM_RELATIVE dynamic relocation or with a rofixup for
12818 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_RELATIVE
);
12819 outrel
.r_offset
= input_section
->output_section
->vma
12820 + input_section
->output_offset
+ rel
->r_offset
;
12821 outrel
.r_addend
= 0;
12822 if (bfd_link_pic(info
))
12823 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
12825 arm_elf_add_rofixup(output_bfd
, globals
->srofixup
, outrel
.r_offset
);
12827 bfd_put_32 (input_bfd
, sgot
->output_section
->vma
12828 + sgot
->output_offset
+ offset
, hit_data
);
12830 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12831 arm_elf_fill_funcdesc(output_bfd
, info
,
12832 &local_fdpic_cnts
[r_symndx
].funcdesc_offset
,
12833 dynindx
, offset
, addr
, dynreloc_value
, seg
);
12837 if (h
->dynindx
== -1)
12840 int offset
= eh
->fdpic_cnts
.funcdesc_offset
& ~1;
12843 Elf_Internal_Rela outrel
;
12845 /* For static binaries sym_sec can be null. */
12848 dynindx
= elf_section_data (sym_sec
->output_section
)->dynindx
;
12849 addr
= dynreloc_value
- sym_sec
->output_section
->vma
;
12857 if (bfd_link_pic(info
) && dynindx
== 0)
12860 /* Replace static FUNCDESC relocation with a
12861 R_ARM_RELATIVE dynamic relocation. */
12862 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_RELATIVE
);
12863 outrel
.r_offset
= input_section
->output_section
->vma
12864 + input_section
->output_offset
+ rel
->r_offset
;
12865 outrel
.r_addend
= 0;
12866 if (bfd_link_pic(info
))
12867 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
12869 arm_elf_add_rofixup(output_bfd
, globals
->srofixup
, outrel
.r_offset
);
12871 bfd_put_32 (input_bfd
, sgot
->output_section
->vma
12872 + sgot
->output_offset
+ offset
, hit_data
);
12874 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12875 arm_elf_fill_funcdesc(output_bfd
, info
,
12876 &eh
->fdpic_cnts
.funcdesc_offset
,
12877 dynindx
, offset
, addr
, dynreloc_value
, seg
);
12881 Elf_Internal_Rela outrel
;
12883 /* Add a dynamic relocation. */
12884 outrel
.r_info
= ELF32_R_INFO (h
->dynindx
, R_ARM_FUNCDESC
);
12885 outrel
.r_offset
= input_section
->output_section
->vma
12886 + input_section
->output_offset
+ rel
->r_offset
;
12887 outrel
.r_addend
= 0;
12888 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
12892 *unresolved_reloc_p
= FALSE
;
12893 return bfd_reloc_ok
;
12895 case R_ARM_THM_BF16
:
12897 bfd_vma relocation
;
12898 bfd_vma upper_insn
= bfd_get_16 (input_bfd
, hit_data
);
12899 bfd_vma lower_insn
= bfd_get_16 (input_bfd
, hit_data
+ 2);
12901 if (globals
->use_rel
)
12903 bfd_vma immA
= (upper_insn
& 0x001f);
12904 bfd_vma immB
= (lower_insn
& 0x07fe) >> 1;
12905 bfd_vma immC
= (lower_insn
& 0x0800) >> 11;
12906 addend
= (immA
<< 12);
12907 addend
|= (immB
<< 2);
12908 addend
|= (immC
<< 1);
12911 signed_addend
= (addend
& 0x10000) ? addend
- (1 << 17) : addend
;
12914 relocation
= value
+ signed_addend
;
12915 relocation
-= (input_section
->output_section
->vma
12916 + input_section
->output_offset
12919 /* Put RELOCATION back into the insn. */
12921 bfd_vma immA
= (relocation
& 0x0001f000) >> 12;
12922 bfd_vma immB
= (relocation
& 0x00000ffc) >> 2;
12923 bfd_vma immC
= (relocation
& 0x00000002) >> 1;
12925 upper_insn
= (upper_insn
& 0xffe0) | immA
;
12926 lower_insn
= (lower_insn
& 0xf001) | (immC
<< 11) | (immB
<< 1);
12929 /* Put the relocated value back in the object file: */
12930 bfd_put_16 (input_bfd
, upper_insn
, hit_data
);
12931 bfd_put_16 (input_bfd
, lower_insn
, hit_data
+ 2);
12933 return bfd_reloc_ok
;
12936 case R_ARM_THM_BF12
:
12938 bfd_vma relocation
;
12939 bfd_vma upper_insn
= bfd_get_16 (input_bfd
, hit_data
);
12940 bfd_vma lower_insn
= bfd_get_16 (input_bfd
, hit_data
+ 2);
12942 if (globals
->use_rel
)
12944 bfd_vma immA
= (upper_insn
& 0x0001);
12945 bfd_vma immB
= (lower_insn
& 0x07fe) >> 1;
12946 bfd_vma immC
= (lower_insn
& 0x0800) >> 11;
12947 addend
= (immA
<< 12);
12948 addend
|= (immB
<< 2);
12949 addend
|= (immC
<< 1);
12952 addend
= (addend
& 0x1000) ? addend
- (1 << 13) : addend
;
12953 signed_addend
= addend
;
12956 relocation
= value
+ signed_addend
;
12957 relocation
-= (input_section
->output_section
->vma
12958 + input_section
->output_offset
12961 /* Put RELOCATION back into the insn. */
12963 bfd_vma immA
= (relocation
& 0x00001000) >> 12;
12964 bfd_vma immB
= (relocation
& 0x00000ffc) >> 2;
12965 bfd_vma immC
= (relocation
& 0x00000002) >> 1;
12967 upper_insn
= (upper_insn
& 0xfffe) | immA
;
12968 lower_insn
= (lower_insn
& 0xf001) | (immC
<< 11) | (immB
<< 1);
12971 /* Put the relocated value back in the object file: */
12972 bfd_put_16 (input_bfd
, upper_insn
, hit_data
);
12973 bfd_put_16 (input_bfd
, lower_insn
, hit_data
+ 2);
12975 return bfd_reloc_ok
;
12978 case R_ARM_THM_BF18
:
12980 bfd_vma relocation
;
12981 bfd_vma upper_insn
= bfd_get_16 (input_bfd
, hit_data
);
12982 bfd_vma lower_insn
= bfd_get_16 (input_bfd
, hit_data
+ 2);
12984 if (globals
->use_rel
)
12986 bfd_vma immA
= (upper_insn
& 0x007f);
12987 bfd_vma immB
= (lower_insn
& 0x07fe) >> 1;
12988 bfd_vma immC
= (lower_insn
& 0x0800) >> 11;
12989 addend
= (immA
<< 12);
12990 addend
|= (immB
<< 2);
12991 addend
|= (immC
<< 1);
12994 addend
= (addend
& 0x40000) ? addend
- (1 << 19) : addend
;
12995 signed_addend
= addend
;
12998 relocation
= value
+ signed_addend
;
12999 relocation
-= (input_section
->output_section
->vma
13000 + input_section
->output_offset
13003 /* Put RELOCATION back into the insn. */
13005 bfd_vma immA
= (relocation
& 0x0007f000) >> 12;
13006 bfd_vma immB
= (relocation
& 0x00000ffc) >> 2;
13007 bfd_vma immC
= (relocation
& 0x00000002) >> 1;
13009 upper_insn
= (upper_insn
& 0xff80) | immA
;
13010 lower_insn
= (lower_insn
& 0xf001) | (immC
<< 11) | (immB
<< 1);
13013 /* Put the relocated value back in the object file: */
13014 bfd_put_16 (input_bfd
, upper_insn
, hit_data
);
13015 bfd_put_16 (input_bfd
, lower_insn
, hit_data
+ 2);
13017 return bfd_reloc_ok
;
13021 return bfd_reloc_notsupported
;
13025 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
13027 arm_add_to_rel (bfd
* abfd
,
13028 bfd_byte
* address
,
13029 reloc_howto_type
* howto
,
13030 bfd_signed_vma increment
)
13032 bfd_signed_vma addend
;
13034 if (howto
->type
== R_ARM_THM_CALL
13035 || howto
->type
== R_ARM_THM_JUMP24
)
13037 int upper_insn
, lower_insn
;
13040 upper_insn
= bfd_get_16 (abfd
, address
);
13041 lower_insn
= bfd_get_16 (abfd
, address
+ 2);
13042 upper
= upper_insn
& 0x7ff;
13043 lower
= lower_insn
& 0x7ff;
13045 addend
= (upper
<< 12) | (lower
<< 1);
13046 addend
+= increment
;
13049 upper_insn
= (upper_insn
& 0xf800) | ((addend
>> 11) & 0x7ff);
13050 lower_insn
= (lower_insn
& 0xf800) | (addend
& 0x7ff);
13052 bfd_put_16 (abfd
, (bfd_vma
) upper_insn
, address
);
13053 bfd_put_16 (abfd
, (bfd_vma
) lower_insn
, address
+ 2);
13059 contents
= bfd_get_32 (abfd
, address
);
13061 /* Get the (signed) value from the instruction. */
13062 addend
= contents
& howto
->src_mask
;
13063 if (addend
& ((howto
->src_mask
+ 1) >> 1))
13065 bfd_signed_vma mask
;
13068 mask
&= ~ howto
->src_mask
;
13072 /* Add in the increment, (which is a byte value). */
13073 switch (howto
->type
)
13076 addend
+= increment
;
13083 addend
<<= howto
->size
;
13084 addend
+= increment
;
13086 /* Should we check for overflow here ? */
13088 /* Drop any undesired bits. */
13089 addend
>>= howto
->rightshift
;
13093 contents
= (contents
& ~ howto
->dst_mask
) | (addend
& howto
->dst_mask
);
13095 bfd_put_32 (abfd
, contents
, address
);
13099 #define IS_ARM_TLS_RELOC(R_TYPE) \
13100 ((R_TYPE) == R_ARM_TLS_GD32 \
13101 || (R_TYPE) == R_ARM_TLS_GD32_FDPIC \
13102 || (R_TYPE) == R_ARM_TLS_LDO32 \
13103 || (R_TYPE) == R_ARM_TLS_LDM32 \
13104 || (R_TYPE) == R_ARM_TLS_LDM32_FDPIC \
13105 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
13106 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
13107 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
13108 || (R_TYPE) == R_ARM_TLS_LE32 \
13109 || (R_TYPE) == R_ARM_TLS_IE32 \
13110 || (R_TYPE) == R_ARM_TLS_IE32_FDPIC \
13111 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
13113 /* Specific set of relocations for the gnu tls dialect. */
13114 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
13115 ((R_TYPE) == R_ARM_TLS_GOTDESC \
13116 || (R_TYPE) == R_ARM_TLS_CALL \
13117 || (R_TYPE) == R_ARM_THM_TLS_CALL \
13118 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
13119 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
13121 /* Relocate an ARM ELF section. */
13124 elf32_arm_relocate_section (bfd
* output_bfd
,
13125 struct bfd_link_info
* info
,
13127 asection
* input_section
,
13128 bfd_byte
* contents
,
13129 Elf_Internal_Rela
* relocs
,
13130 Elf_Internal_Sym
* local_syms
,
13131 asection
** local_sections
)
13133 Elf_Internal_Shdr
*symtab_hdr
;
13134 struct elf_link_hash_entry
**sym_hashes
;
13135 Elf_Internal_Rela
*rel
;
13136 Elf_Internal_Rela
*relend
;
13138 struct elf32_arm_link_hash_table
* globals
;
13140 globals
= elf32_arm_hash_table (info
);
13141 if (globals
== NULL
)
13144 symtab_hdr
= & elf_symtab_hdr (input_bfd
);
13145 sym_hashes
= elf_sym_hashes (input_bfd
);
13148 relend
= relocs
+ input_section
->reloc_count
;
13149 for (; rel
< relend
; rel
++)
13152 reloc_howto_type
* howto
;
13153 unsigned long r_symndx
;
13154 Elf_Internal_Sym
* sym
;
13156 struct elf_link_hash_entry
* h
;
13157 bfd_vma relocation
;
13158 bfd_reloc_status_type r
;
13161 bfd_boolean unresolved_reloc
= FALSE
;
13162 char *error_message
= NULL
;
13164 r_symndx
= ELF32_R_SYM (rel
->r_info
);
13165 r_type
= ELF32_R_TYPE (rel
->r_info
);
13166 r_type
= arm_real_reloc_type (globals
, r_type
);
13168 if ( r_type
== R_ARM_GNU_VTENTRY
13169 || r_type
== R_ARM_GNU_VTINHERIT
)
13172 howto
= bfd_reloc
.howto
= elf32_arm_howto_from_type (r_type
);
13175 return _bfd_unrecognized_reloc (input_bfd
, input_section
, r_type
);
13181 if (r_symndx
< symtab_hdr
->sh_info
)
13183 sym
= local_syms
+ r_symndx
;
13184 sym_type
= ELF32_ST_TYPE (sym
->st_info
);
13185 sec
= local_sections
[r_symndx
];
13187 /* An object file might have a reference to a local
13188 undefined symbol. This is a daft object file, but we
13189 should at least do something about it. V4BX & NONE
13190 relocations do not use the symbol and are explicitly
13191 allowed to use the undefined symbol, so allow those.
13192 Likewise for relocations against STN_UNDEF. */
13193 if (r_type
!= R_ARM_V4BX
13194 && r_type
!= R_ARM_NONE
13195 && r_symndx
!= STN_UNDEF
13196 && bfd_is_und_section (sec
)
13197 && ELF_ST_BIND (sym
->st_info
) != STB_WEAK
)
13198 (*info
->callbacks
->undefined_symbol
)
13199 (info
, bfd_elf_string_from_elf_section
13200 (input_bfd
, symtab_hdr
->sh_link
, sym
->st_name
),
13201 input_bfd
, input_section
,
13202 rel
->r_offset
, TRUE
);
13204 if (globals
->use_rel
)
13206 relocation
= (sec
->output_section
->vma
13207 + sec
->output_offset
13209 if (!bfd_link_relocatable (info
)
13210 && (sec
->flags
& SEC_MERGE
)
13211 && ELF_ST_TYPE (sym
->st_info
) == STT_SECTION
)
13214 bfd_vma addend
, value
;
13218 case R_ARM_MOVW_ABS_NC
:
13219 case R_ARM_MOVT_ABS
:
13220 value
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
);
13221 addend
= ((value
& 0xf0000) >> 4) | (value
& 0xfff);
13222 addend
= (addend
^ 0x8000) - 0x8000;
13225 case R_ARM_THM_MOVW_ABS_NC
:
13226 case R_ARM_THM_MOVT_ABS
:
13227 value
= bfd_get_16 (input_bfd
, contents
+ rel
->r_offset
)
13229 value
|= bfd_get_16 (input_bfd
,
13230 contents
+ rel
->r_offset
+ 2);
13231 addend
= ((value
& 0xf7000) >> 4) | (value
& 0xff)
13232 | ((value
& 0x04000000) >> 15);
13233 addend
= (addend
^ 0x8000) - 0x8000;
13237 if (howto
->rightshift
13238 || (howto
->src_mask
& (howto
->src_mask
+ 1)))
13241 /* xgettext:c-format */
13242 (_("%pB(%pA+%#" PRIx64
"): "
13243 "%s relocation against SEC_MERGE section"),
13244 input_bfd
, input_section
,
13245 (uint64_t) rel
->r_offset
, howto
->name
);
13249 value
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
);
13251 /* Get the (signed) value from the instruction. */
13252 addend
= value
& howto
->src_mask
;
13253 if (addend
& ((howto
->src_mask
+ 1) >> 1))
13255 bfd_signed_vma mask
;
13258 mask
&= ~ howto
->src_mask
;
13266 _bfd_elf_rel_local_sym (output_bfd
, sym
, &msec
, addend
)
13268 addend
+= msec
->output_section
->vma
+ msec
->output_offset
;
13270 /* Cases here must match those in the preceding
13271 switch statement. */
13274 case R_ARM_MOVW_ABS_NC
:
13275 case R_ARM_MOVT_ABS
:
13276 value
= (value
& 0xfff0f000) | ((addend
& 0xf000) << 4)
13277 | (addend
& 0xfff);
13278 bfd_put_32 (input_bfd
, value
, contents
+ rel
->r_offset
);
13281 case R_ARM_THM_MOVW_ABS_NC
:
13282 case R_ARM_THM_MOVT_ABS
:
13283 value
= (value
& 0xfbf08f00) | ((addend
& 0xf700) << 4)
13284 | (addend
& 0xff) | ((addend
& 0x0800) << 15);
13285 bfd_put_16 (input_bfd
, value
>> 16,
13286 contents
+ rel
->r_offset
);
13287 bfd_put_16 (input_bfd
, value
,
13288 contents
+ rel
->r_offset
+ 2);
13292 value
= (value
& ~ howto
->dst_mask
)
13293 | (addend
& howto
->dst_mask
);
13294 bfd_put_32 (input_bfd
, value
, contents
+ rel
->r_offset
);
13300 relocation
= _bfd_elf_rela_local_sym (output_bfd
, sym
, &sec
, rel
);
13304 bfd_boolean warned
, ignored
;
13306 RELOC_FOR_GLOBAL_SYMBOL (info
, input_bfd
, input_section
, rel
,
13307 r_symndx
, symtab_hdr
, sym_hashes
,
13308 h
, sec
, relocation
,
13309 unresolved_reloc
, warned
, ignored
);
13311 sym_type
= h
->type
;
13314 if (sec
!= NULL
&& discarded_section (sec
))
13315 RELOC_AGAINST_DISCARDED_SECTION (info
, input_bfd
, input_section
,
13316 rel
, 1, relend
, howto
, 0, contents
);
13318 if (bfd_link_relocatable (info
))
13320 /* This is a relocatable link. We don't have to change
13321 anything, unless the reloc is against a section symbol,
13322 in which case we have to adjust according to where the
13323 section symbol winds up in the output section. */
13324 if (sym
!= NULL
&& ELF_ST_TYPE (sym
->st_info
) == STT_SECTION
)
13326 if (globals
->use_rel
)
13327 arm_add_to_rel (input_bfd
, contents
+ rel
->r_offset
,
13328 howto
, (bfd_signed_vma
) sec
->output_offset
);
13330 rel
->r_addend
+= sec
->output_offset
;
13336 name
= h
->root
.root
.string
;
13339 name
= (bfd_elf_string_from_elf_section
13340 (input_bfd
, symtab_hdr
->sh_link
, sym
->st_name
));
13341 if (name
== NULL
|| *name
== '\0')
13342 name
= bfd_section_name (sec
);
13345 if (r_symndx
!= STN_UNDEF
13346 && r_type
!= R_ARM_NONE
13348 || h
->root
.type
== bfd_link_hash_defined
13349 || h
->root
.type
== bfd_link_hash_defweak
)
13350 && IS_ARM_TLS_RELOC (r_type
) != (sym_type
== STT_TLS
))
13353 ((sym_type
== STT_TLS
13354 /* xgettext:c-format */
13355 ? _("%pB(%pA+%#" PRIx64
"): %s used with TLS symbol %s")
13356 /* xgettext:c-format */
13357 : _("%pB(%pA+%#" PRIx64
"): %s used with non-TLS symbol %s")),
13360 (uint64_t) rel
->r_offset
,
13365 /* We call elf32_arm_final_link_relocate unless we're completely
13366 done, i.e., the relaxation produced the final output we want,
13367 and we won't let anybody mess with it. Also, we have to do
13368 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
13369 both in relaxed and non-relaxed cases. */
13370 if ((elf32_arm_tls_transition (info
, r_type
, h
) != (unsigned)r_type
)
13371 || (IS_ARM_TLS_GNU_RELOC (r_type
)
13372 && !((h
? elf32_arm_hash_entry (h
)->tls_type
:
13373 elf32_arm_local_got_tls_type (input_bfd
)[r_symndx
])
13376 r
= elf32_arm_tls_relax (globals
, input_bfd
, input_section
,
13377 contents
, rel
, h
== NULL
);
13378 /* This may have been marked unresolved because it came from
13379 a shared library. But we've just dealt with that. */
13380 unresolved_reloc
= 0;
13383 r
= bfd_reloc_continue
;
13385 if (r
== bfd_reloc_continue
)
13387 unsigned char branch_type
=
13388 h
? ARM_GET_SYM_BRANCH_TYPE (h
->target_internal
)
13389 : ARM_GET_SYM_BRANCH_TYPE (sym
->st_target_internal
);
13391 r
= elf32_arm_final_link_relocate (howto
, input_bfd
, output_bfd
,
13392 input_section
, contents
, rel
,
13393 relocation
, info
, sec
, name
,
13394 sym_type
, branch_type
, h
,
13399 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
13400 because such sections are not SEC_ALLOC and thus ld.so will
13401 not process them. */
13402 if (unresolved_reloc
13403 && !((input_section
->flags
& SEC_DEBUGGING
) != 0
13405 && _bfd_elf_section_offset (output_bfd
, info
, input_section
,
13406 rel
->r_offset
) != (bfd_vma
) -1)
13409 /* xgettext:c-format */
13410 (_("%pB(%pA+%#" PRIx64
"): "
13411 "unresolvable %s relocation against symbol `%s'"),
13414 (uint64_t) rel
->r_offset
,
13416 h
->root
.root
.string
);
13420 if (r
!= bfd_reloc_ok
)
13424 case bfd_reloc_overflow
:
13425 /* If the overflowing reloc was to an undefined symbol,
13426 we have already printed one error message and there
13427 is no point complaining again. */
13428 if (!h
|| h
->root
.type
!= bfd_link_hash_undefined
)
13429 (*info
->callbacks
->reloc_overflow
)
13430 (info
, (h
? &h
->root
: NULL
), name
, howto
->name
,
13431 (bfd_vma
) 0, input_bfd
, input_section
, rel
->r_offset
);
13434 case bfd_reloc_undefined
:
13435 (*info
->callbacks
->undefined_symbol
)
13436 (info
, name
, input_bfd
, input_section
, rel
->r_offset
, TRUE
);
13439 case bfd_reloc_outofrange
:
13440 error_message
= _("out of range");
13443 case bfd_reloc_notsupported
:
13444 error_message
= _("unsupported relocation");
13447 case bfd_reloc_dangerous
:
13448 /* error_message should already be set. */
13452 error_message
= _("unknown error");
13453 /* Fall through. */
13456 BFD_ASSERT (error_message
!= NULL
);
13457 (*info
->callbacks
->reloc_dangerous
)
13458 (info
, error_message
, input_bfd
, input_section
, rel
->r_offset
);
13467 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
13468 adds the edit to the start of the list. (The list must be built in order of
13469 ascending TINDEX: the function's callers are primarily responsible for
13470 maintaining that condition). */
13473 add_unwind_table_edit (arm_unwind_table_edit
**head
,
13474 arm_unwind_table_edit
**tail
,
13475 arm_unwind_edit_type type
,
13476 asection
*linked_section
,
13477 unsigned int tindex
)
13479 arm_unwind_table_edit
*new_edit
= (arm_unwind_table_edit
*)
13480 xmalloc (sizeof (arm_unwind_table_edit
));
13482 new_edit
->type
= type
;
13483 new_edit
->linked_section
= linked_section
;
13484 new_edit
->index
= tindex
;
13488 new_edit
->next
= NULL
;
13491 (*tail
)->next
= new_edit
;
13493 (*tail
) = new_edit
;
13496 (*head
) = new_edit
;
13500 new_edit
->next
= *head
;
13509 static _arm_elf_section_data
*get_arm_elf_section_data (asection
*);
13511 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
13513 adjust_exidx_size(asection
*exidx_sec
, int adjust
)
13517 if (!exidx_sec
->rawsize
)
13518 exidx_sec
->rawsize
= exidx_sec
->size
;
13520 bfd_set_section_size (exidx_sec
, exidx_sec
->size
+ adjust
);
13521 out_sec
= exidx_sec
->output_section
;
13522 /* Adjust size of output section. */
13523 bfd_set_section_size (out_sec
, out_sec
->size
+adjust
);
13526 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
13528 insert_cantunwind_after(asection
*text_sec
, asection
*exidx_sec
)
13530 struct _arm_elf_section_data
*exidx_arm_data
;
13532 exidx_arm_data
= get_arm_elf_section_data (exidx_sec
);
13533 add_unwind_table_edit (
13534 &exidx_arm_data
->u
.exidx
.unwind_edit_list
,
13535 &exidx_arm_data
->u
.exidx
.unwind_edit_tail
,
13536 INSERT_EXIDX_CANTUNWIND_AT_END
, text_sec
, UINT_MAX
);
13538 exidx_arm_data
->additional_reloc_count
++;
13540 adjust_exidx_size(exidx_sec
, 8);
13543 /* Scan .ARM.exidx tables, and create a list describing edits which should be
13544 made to those tables, such that:
13546 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
13547 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
13548 codes which have been inlined into the index).
13550 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
13552 The edits are applied when the tables are written
13553 (in elf32_arm_write_section). */
13556 elf32_arm_fix_exidx_coverage (asection
**text_section_order
,
13557 unsigned int num_text_sections
,
13558 struct bfd_link_info
*info
,
13559 bfd_boolean merge_exidx_entries
)
13562 unsigned int last_second_word
= 0, i
;
13563 asection
*last_exidx_sec
= NULL
;
13564 asection
*last_text_sec
= NULL
;
13565 int last_unwind_type
= -1;
13567 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
13569 for (inp
= info
->input_bfds
; inp
!= NULL
; inp
= inp
->link
.next
)
13573 for (sec
= inp
->sections
; sec
!= NULL
; sec
= sec
->next
)
13575 struct bfd_elf_section_data
*elf_sec
= elf_section_data (sec
);
13576 Elf_Internal_Shdr
*hdr
= &elf_sec
->this_hdr
;
13578 if (!hdr
|| hdr
->sh_type
!= SHT_ARM_EXIDX
)
13581 if (elf_sec
->linked_to
)
13583 Elf_Internal_Shdr
*linked_hdr
13584 = &elf_section_data (elf_sec
->linked_to
)->this_hdr
;
13585 struct _arm_elf_section_data
*linked_sec_arm_data
13586 = get_arm_elf_section_data (linked_hdr
->bfd_section
);
13588 if (linked_sec_arm_data
== NULL
)
13591 /* Link this .ARM.exidx section back from the text section it
13593 linked_sec_arm_data
->u
.text
.arm_exidx_sec
= sec
;
13598 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
13599 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
13600 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
13602 for (i
= 0; i
< num_text_sections
; i
++)
13604 asection
*sec
= text_section_order
[i
];
13605 asection
*exidx_sec
;
13606 struct _arm_elf_section_data
*arm_data
= get_arm_elf_section_data (sec
);
13607 struct _arm_elf_section_data
*exidx_arm_data
;
13608 bfd_byte
*contents
= NULL
;
13609 int deleted_exidx_bytes
= 0;
13611 arm_unwind_table_edit
*unwind_edit_head
= NULL
;
13612 arm_unwind_table_edit
*unwind_edit_tail
= NULL
;
13613 Elf_Internal_Shdr
*hdr
;
13616 if (arm_data
== NULL
)
13619 exidx_sec
= arm_data
->u
.text
.arm_exidx_sec
;
13620 if (exidx_sec
== NULL
)
13622 /* Section has no unwind data. */
13623 if (last_unwind_type
== 0 || !last_exidx_sec
)
13626 /* Ignore zero sized sections. */
13627 if (sec
->size
== 0)
13630 insert_cantunwind_after(last_text_sec
, last_exidx_sec
);
13631 last_unwind_type
= 0;
13635 /* Skip /DISCARD/ sections. */
13636 if (bfd_is_abs_section (exidx_sec
->output_section
))
13639 hdr
= &elf_section_data (exidx_sec
)->this_hdr
;
13640 if (hdr
->sh_type
!= SHT_ARM_EXIDX
)
13643 exidx_arm_data
= get_arm_elf_section_data (exidx_sec
);
13644 if (exidx_arm_data
== NULL
)
13647 ibfd
= exidx_sec
->owner
;
13649 if (hdr
->contents
!= NULL
)
13650 contents
= hdr
->contents
;
13651 else if (! bfd_malloc_and_get_section (ibfd
, exidx_sec
, &contents
))
13655 if (last_unwind_type
> 0)
13657 unsigned int first_word
= bfd_get_32 (ibfd
, contents
);
13658 /* Add cantunwind if first unwind item does not match section
13660 if (first_word
!= sec
->vma
)
13662 insert_cantunwind_after (last_text_sec
, last_exidx_sec
);
13663 last_unwind_type
= 0;
13667 for (j
= 0; j
< hdr
->sh_size
; j
+= 8)
13669 unsigned int second_word
= bfd_get_32 (ibfd
, contents
+ j
+ 4);
13673 /* An EXIDX_CANTUNWIND entry. */
13674 if (second_word
== 1)
13676 if (last_unwind_type
== 0)
13680 /* Inlined unwinding data. Merge if equal to previous. */
13681 else if ((second_word
& 0x80000000) != 0)
13683 if (merge_exidx_entries
13684 && last_second_word
== second_word
&& last_unwind_type
== 1)
13687 last_second_word
= second_word
;
13689 /* Normal table entry. In theory we could merge these too,
13690 but duplicate entries are likely to be much less common. */
13694 if (elide
&& !bfd_link_relocatable (info
))
13696 add_unwind_table_edit (&unwind_edit_head
, &unwind_edit_tail
,
13697 DELETE_EXIDX_ENTRY
, NULL
, j
/ 8);
13699 deleted_exidx_bytes
+= 8;
13702 last_unwind_type
= unwind_type
;
13705 /* Free contents if we allocated it ourselves. */
13706 if (contents
!= hdr
->contents
)
13709 /* Record edits to be applied later (in elf32_arm_write_section). */
13710 exidx_arm_data
->u
.exidx
.unwind_edit_list
= unwind_edit_head
;
13711 exidx_arm_data
->u
.exidx
.unwind_edit_tail
= unwind_edit_tail
;
13713 if (deleted_exidx_bytes
> 0)
13714 adjust_exidx_size(exidx_sec
, -deleted_exidx_bytes
);
13716 last_exidx_sec
= exidx_sec
;
13717 last_text_sec
= sec
;
13720 /* Add terminating CANTUNWIND entry. */
13721 if (!bfd_link_relocatable (info
) && last_exidx_sec
13722 && last_unwind_type
!= 0)
13723 insert_cantunwind_after(last_text_sec
, last_exidx_sec
);
13729 elf32_arm_output_glue_section (struct bfd_link_info
*info
, bfd
*obfd
,
13730 bfd
*ibfd
, const char *name
)
13732 asection
*sec
, *osec
;
13734 sec
= bfd_get_linker_section (ibfd
, name
);
13735 if (sec
== NULL
|| (sec
->flags
& SEC_EXCLUDE
) != 0)
13738 osec
= sec
->output_section
;
13739 if (elf32_arm_write_section (obfd
, info
, sec
, sec
->contents
))
13742 if (! bfd_set_section_contents (obfd
, osec
, sec
->contents
,
13743 sec
->output_offset
, sec
->size
))
13750 elf32_arm_final_link (bfd
*abfd
, struct bfd_link_info
*info
)
13752 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (info
);
13753 asection
*sec
, *osec
;
13755 if (globals
== NULL
)
13758 /* Invoke the regular ELF backend linker to do all the work. */
13759 if (!bfd_elf_final_link (abfd
, info
))
13762 /* Process stub sections (eg BE8 encoding, ...). */
13763 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
13765 for (i
=0; i
<htab
->top_id
; i
++)
13767 sec
= htab
->stub_group
[i
].stub_sec
;
13768 /* Only process it once, in its link_sec slot. */
13769 if (sec
&& i
== htab
->stub_group
[i
].link_sec
->id
)
13771 osec
= sec
->output_section
;
13772 elf32_arm_write_section (abfd
, info
, sec
, sec
->contents
);
13773 if (! bfd_set_section_contents (abfd
, osec
, sec
->contents
,
13774 sec
->output_offset
, sec
->size
))
13779 /* Write out any glue sections now that we have created all the
13781 if (globals
->bfd_of_glue_owner
!= NULL
)
13783 if (! elf32_arm_output_glue_section (info
, abfd
,
13784 globals
->bfd_of_glue_owner
,
13785 ARM2THUMB_GLUE_SECTION_NAME
))
13788 if (! elf32_arm_output_glue_section (info
, abfd
,
13789 globals
->bfd_of_glue_owner
,
13790 THUMB2ARM_GLUE_SECTION_NAME
))
13793 if (! elf32_arm_output_glue_section (info
, abfd
,
13794 globals
->bfd_of_glue_owner
,
13795 VFP11_ERRATUM_VENEER_SECTION_NAME
))
13798 if (! elf32_arm_output_glue_section (info
, abfd
,
13799 globals
->bfd_of_glue_owner
,
13800 STM32L4XX_ERRATUM_VENEER_SECTION_NAME
))
13803 if (! elf32_arm_output_glue_section (info
, abfd
,
13804 globals
->bfd_of_glue_owner
,
13805 ARM_BX_GLUE_SECTION_NAME
))
13812 /* Return a best guess for the machine number based on the attributes. */
13814 static unsigned int
13815 bfd_arm_get_mach_from_attributes (bfd
* abfd
)
13817 int arch
= bfd_elf_get_obj_attr_int (abfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
13821 case TAG_CPU_ARCH_PRE_V4
: return bfd_mach_arm_3M
;
13822 case TAG_CPU_ARCH_V4
: return bfd_mach_arm_4
;
13823 case TAG_CPU_ARCH_V4T
: return bfd_mach_arm_4T
;
13824 case TAG_CPU_ARCH_V5T
: return bfd_mach_arm_5T
;
13826 case TAG_CPU_ARCH_V5TE
:
13830 BFD_ASSERT (Tag_CPU_name
< NUM_KNOWN_OBJ_ATTRIBUTES
);
13831 name
= elf_known_obj_attributes (abfd
) [OBJ_ATTR_PROC
][Tag_CPU_name
].s
;
13835 if (strcmp (name
, "IWMMXT2") == 0)
13836 return bfd_mach_arm_iWMMXt2
;
13838 if (strcmp (name
, "IWMMXT") == 0)
13839 return bfd_mach_arm_iWMMXt
;
13841 if (strcmp (name
, "XSCALE") == 0)
13845 BFD_ASSERT (Tag_WMMX_arch
< NUM_KNOWN_OBJ_ATTRIBUTES
);
13846 wmmx
= elf_known_obj_attributes (abfd
) [OBJ_ATTR_PROC
][Tag_WMMX_arch
].i
;
13849 case 1: return bfd_mach_arm_iWMMXt
;
13850 case 2: return bfd_mach_arm_iWMMXt2
;
13851 default: return bfd_mach_arm_XScale
;
13856 return bfd_mach_arm_5TE
;
13859 case TAG_CPU_ARCH_V5TEJ
:
13860 return bfd_mach_arm_5TEJ
;
13861 case TAG_CPU_ARCH_V6
:
13862 return bfd_mach_arm_6
;
13863 case TAG_CPU_ARCH_V6KZ
:
13864 return bfd_mach_arm_6KZ
;
13865 case TAG_CPU_ARCH_V6T2
:
13866 return bfd_mach_arm_6T2
;
13867 case TAG_CPU_ARCH_V6K
:
13868 return bfd_mach_arm_6K
;
13869 case TAG_CPU_ARCH_V7
:
13870 return bfd_mach_arm_7
;
13871 case TAG_CPU_ARCH_V6_M
:
13872 return bfd_mach_arm_6M
;
13873 case TAG_CPU_ARCH_V6S_M
:
13874 return bfd_mach_arm_6SM
;
13875 case TAG_CPU_ARCH_V7E_M
:
13876 return bfd_mach_arm_7EM
;
13877 case TAG_CPU_ARCH_V8
:
13878 return bfd_mach_arm_8
;
13879 case TAG_CPU_ARCH_V8R
:
13880 return bfd_mach_arm_8R
;
13881 case TAG_CPU_ARCH_V8M_BASE
:
13882 return bfd_mach_arm_8M_BASE
;
13883 case TAG_CPU_ARCH_V8M_MAIN
:
13884 return bfd_mach_arm_8M_MAIN
;
13885 case TAG_CPU_ARCH_V8_1M_MAIN
:
13886 return bfd_mach_arm_8_1M_MAIN
;
13889 /* Force entry to be added for any new known Tag_CPU_arch value. */
13890 BFD_ASSERT (arch
> MAX_TAG_CPU_ARCH
);
13892 /* Unknown Tag_CPU_arch value. */
13893 return bfd_mach_arm_unknown
;
13897 /* Set the right machine number. */
13900 elf32_arm_object_p (bfd
*abfd
)
13904 mach
= bfd_arm_get_mach_from_notes (abfd
, ARM_NOTE_SECTION
);
13906 if (mach
== bfd_mach_arm_unknown
)
13908 if (elf_elfheader (abfd
)->e_flags
& EF_ARM_MAVERICK_FLOAT
)
13909 mach
= bfd_mach_arm_ep9312
;
13911 mach
= bfd_arm_get_mach_from_attributes (abfd
);
13914 bfd_default_set_arch_mach (abfd
, bfd_arch_arm
, mach
);
13918 /* Function to keep ARM specific flags in the ELF header. */
13921 elf32_arm_set_private_flags (bfd
*abfd
, flagword flags
)
13923 if (elf_flags_init (abfd
)
13924 && elf_elfheader (abfd
)->e_flags
!= flags
)
13926 if (EF_ARM_EABI_VERSION (flags
) == EF_ARM_EABI_UNKNOWN
)
13928 if (flags
& EF_ARM_INTERWORK
)
13930 (_("warning: not setting interworking flag of %pB since it has already been specified as non-interworking"),
13934 (_("warning: clearing the interworking flag of %pB due to outside request"),
13940 elf_elfheader (abfd
)->e_flags
= flags
;
13941 elf_flags_init (abfd
) = TRUE
;
13947 /* Copy backend specific data from one object module to another. */
13950 elf32_arm_copy_private_bfd_data (bfd
*ibfd
, bfd
*obfd
)
13953 flagword out_flags
;
13955 if (! is_arm_elf (ibfd
) || ! is_arm_elf (obfd
))
13958 in_flags
= elf_elfheader (ibfd
)->e_flags
;
13959 out_flags
= elf_elfheader (obfd
)->e_flags
;
13961 if (elf_flags_init (obfd
)
13962 && EF_ARM_EABI_VERSION (out_flags
) == EF_ARM_EABI_UNKNOWN
13963 && in_flags
!= out_flags
)
13965 /* Cannot mix APCS26 and APCS32 code. */
13966 if ((in_flags
& EF_ARM_APCS_26
) != (out_flags
& EF_ARM_APCS_26
))
13969 /* Cannot mix float APCS and non-float APCS code. */
13970 if ((in_flags
& EF_ARM_APCS_FLOAT
) != (out_flags
& EF_ARM_APCS_FLOAT
))
13973 /* If the src and dest have different interworking flags
13974 then turn off the interworking bit. */
13975 if ((in_flags
& EF_ARM_INTERWORK
) != (out_flags
& EF_ARM_INTERWORK
))
13977 if (out_flags
& EF_ARM_INTERWORK
)
13979 (_("warning: clearing the interworking flag of %pB because non-interworking code in %pB has been linked with it"),
13982 in_flags
&= ~EF_ARM_INTERWORK
;
13985 /* Likewise for PIC, though don't warn for this case. */
13986 if ((in_flags
& EF_ARM_PIC
) != (out_flags
& EF_ARM_PIC
))
13987 in_flags
&= ~EF_ARM_PIC
;
13990 elf_elfheader (obfd
)->e_flags
= in_flags
;
13991 elf_flags_init (obfd
) = TRUE
;
13993 return _bfd_elf_copy_private_bfd_data (ibfd
, obfd
);
13996 /* Values for Tag_ABI_PCS_R9_use. */
14005 /* Values for Tag_ABI_PCS_RW_data. */
14008 AEABI_PCS_RW_data_absolute
,
14009 AEABI_PCS_RW_data_PCrel
,
14010 AEABI_PCS_RW_data_SBrel
,
14011 AEABI_PCS_RW_data_unused
14014 /* Values for Tag_ABI_enum_size. */
14020 AEABI_enum_forced_wide
14023 /* Determine whether an object attribute tag takes an integer, a
14027 elf32_arm_obj_attrs_arg_type (int tag
)
14029 if (tag
== Tag_compatibility
)
14030 return ATTR_TYPE_FLAG_INT_VAL
| ATTR_TYPE_FLAG_STR_VAL
;
14031 else if (tag
== Tag_nodefaults
)
14032 return ATTR_TYPE_FLAG_INT_VAL
| ATTR_TYPE_FLAG_NO_DEFAULT
;
14033 else if (tag
== Tag_CPU_raw_name
|| tag
== Tag_CPU_name
)
14034 return ATTR_TYPE_FLAG_STR_VAL
;
14036 return ATTR_TYPE_FLAG_INT_VAL
;
14038 return (tag
& 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL
: ATTR_TYPE_FLAG_INT_VAL
;
14041 /* The ABI defines that Tag_conformance should be emitted first, and that
14042 Tag_nodefaults should be second (if either is defined). This sets those
14043 two positions, and bumps up the position of all the remaining tags to
14046 elf32_arm_obj_attrs_order (int num
)
14048 if (num
== LEAST_KNOWN_OBJ_ATTRIBUTE
)
14049 return Tag_conformance
;
14050 if (num
== LEAST_KNOWN_OBJ_ATTRIBUTE
+ 1)
14051 return Tag_nodefaults
;
14052 if ((num
- 2) < Tag_nodefaults
)
14054 if ((num
- 1) < Tag_conformance
)
14059 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
14061 elf32_arm_obj_attrs_handle_unknown (bfd
*abfd
, int tag
)
14063 if ((tag
& 127) < 64)
14066 (_("%pB: unknown mandatory EABI object attribute %d"),
14068 bfd_set_error (bfd_error_bad_value
);
14074 (_("warning: %pB: unknown EABI object attribute %d"),
14080 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
14081 Returns -1 if no architecture could be read. */
14084 get_secondary_compatible_arch (bfd
*abfd
)
14086 obj_attribute
*attr
=
14087 &elf_known_obj_attributes_proc (abfd
)[Tag_also_compatible_with
];
14089 /* Note: the tag and its argument below are uleb128 values, though
14090 currently-defined values fit in one byte for each. */
14092 && attr
->s
[0] == Tag_CPU_arch
14093 && (attr
->s
[1] & 128) != 128
14094 && attr
->s
[2] == 0)
14097 /* This tag is "safely ignorable", so don't complain if it looks funny. */
14101 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
14102 The tag is removed if ARCH is -1. */
14105 set_secondary_compatible_arch (bfd
*abfd
, int arch
)
14107 obj_attribute
*attr
=
14108 &elf_known_obj_attributes_proc (abfd
)[Tag_also_compatible_with
];
14116 /* Note: the tag and its argument below are uleb128 values, though
14117 currently-defined values fit in one byte for each. */
14119 attr
->s
= (char *) bfd_alloc (abfd
, 3);
14120 attr
->s
[0] = Tag_CPU_arch
;
14125 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
14129 tag_cpu_arch_combine (bfd
*ibfd
, int oldtag
, int *secondary_compat_out
,
14130 int newtag
, int secondary_compat
)
14132 #define T(X) TAG_CPU_ARCH_##X
14133 int tagl
, tagh
, result
;
14136 T(V6T2
), /* PRE_V4. */
14138 T(V6T2
), /* V4T. */
14139 T(V6T2
), /* V5T. */
14140 T(V6T2
), /* V5TE. */
14141 T(V6T2
), /* V5TEJ. */
14144 T(V6T2
) /* V6T2. */
14148 T(V6K
), /* PRE_V4. */
14152 T(V6K
), /* V5TE. */
14153 T(V6K
), /* V5TEJ. */
14155 T(V6KZ
), /* V6KZ. */
14161 T(V7
), /* PRE_V4. */
14166 T(V7
), /* V5TEJ. */
14179 T(V6K
), /* V5TE. */
14180 T(V6K
), /* V5TEJ. */
14182 T(V6KZ
), /* V6KZ. */
14186 T(V6_M
) /* V6_M. */
14188 const int v6s_m
[] =
14194 T(V6K
), /* V5TE. */
14195 T(V6K
), /* V5TEJ. */
14197 T(V6KZ
), /* V6KZ. */
14201 T(V6S_M
), /* V6_M. */
14202 T(V6S_M
) /* V6S_M. */
14204 const int v7e_m
[] =
14208 T(V7E_M
), /* V4T. */
14209 T(V7E_M
), /* V5T. */
14210 T(V7E_M
), /* V5TE. */
14211 T(V7E_M
), /* V5TEJ. */
14212 T(V7E_M
), /* V6. */
14213 T(V7E_M
), /* V6KZ. */
14214 T(V7E_M
), /* V6T2. */
14215 T(V7E_M
), /* V6K. */
14216 T(V7E_M
), /* V7. */
14217 T(V7E_M
), /* V6_M. */
14218 T(V7E_M
), /* V6S_M. */
14219 T(V7E_M
) /* V7E_M. */
14223 T(V8
), /* PRE_V4. */
14228 T(V8
), /* V5TEJ. */
14235 T(V8
), /* V6S_M. */
14236 T(V8
), /* V7E_M. */
14241 T(V8R
), /* PRE_V4. */
14245 T(V8R
), /* V5TE. */
14246 T(V8R
), /* V5TEJ. */
14248 T(V8R
), /* V6KZ. */
14249 T(V8R
), /* V6T2. */
14252 T(V8R
), /* V6_M. */
14253 T(V8R
), /* V6S_M. */
14254 T(V8R
), /* V7E_M. */
14258 const int v8m_baseline
[] =
14271 T(V8M_BASE
), /* V6_M. */
14272 T(V8M_BASE
), /* V6S_M. */
14276 T(V8M_BASE
) /* V8-M BASELINE. */
14278 const int v8m_mainline
[] =
14290 T(V8M_MAIN
), /* V7. */
14291 T(V8M_MAIN
), /* V6_M. */
14292 T(V8M_MAIN
), /* V6S_M. */
14293 T(V8M_MAIN
), /* V7E_M. */
14296 T(V8M_MAIN
), /* V8-M BASELINE. */
14297 T(V8M_MAIN
) /* V8-M MAINLINE. */
14299 const int v8_1m_mainline
[] =
14311 T(V8_1M_MAIN
), /* V7. */
14312 T(V8_1M_MAIN
), /* V6_M. */
14313 T(V8_1M_MAIN
), /* V6S_M. */
14314 T(V8_1M_MAIN
), /* V7E_M. */
14317 T(V8_1M_MAIN
), /* V8-M BASELINE. */
14318 T(V8_1M_MAIN
), /* V8-M MAINLINE. */
14319 -1, /* Unused (18). */
14320 -1, /* Unused (19). */
14321 -1, /* Unused (20). */
14322 T(V8_1M_MAIN
) /* V8.1-M MAINLINE. */
14324 const int v4t_plus_v6_m
[] =
14330 T(V5TE
), /* V5TE. */
14331 T(V5TEJ
), /* V5TEJ. */
14333 T(V6KZ
), /* V6KZ. */
14334 T(V6T2
), /* V6T2. */
14337 T(V6_M
), /* V6_M. */
14338 T(V6S_M
), /* V6S_M. */
14339 T(V7E_M
), /* V7E_M. */
14342 T(V8M_BASE
), /* V8-M BASELINE. */
14343 T(V8M_MAIN
), /* V8-M MAINLINE. */
14344 -1, /* Unused (18). */
14345 -1, /* Unused (19). */
14346 -1, /* Unused (20). */
14347 T(V8_1M_MAIN
), /* V8.1-M MAINLINE. */
14348 T(V4T_PLUS_V6_M
) /* V4T plus V6_M. */
14350 const int *comb
[] =
14366 /* Pseudo-architecture. */
14370 /* Check we've not got a higher architecture than we know about. */
14372 if (oldtag
> MAX_TAG_CPU_ARCH
|| newtag
> MAX_TAG_CPU_ARCH
)
14374 _bfd_error_handler (_("error: %pB: unknown CPU architecture"), ibfd
);
14378 /* Override old tag if we have a Tag_also_compatible_with on the output. */
14380 if ((oldtag
== T(V6_M
) && *secondary_compat_out
== T(V4T
))
14381 || (oldtag
== T(V4T
) && *secondary_compat_out
== T(V6_M
)))
14382 oldtag
= T(V4T_PLUS_V6_M
);
14384 /* And override the new tag if we have a Tag_also_compatible_with on the
14387 if ((newtag
== T(V6_M
) && secondary_compat
== T(V4T
))
14388 || (newtag
== T(V4T
) && secondary_compat
== T(V6_M
)))
14389 newtag
= T(V4T_PLUS_V6_M
);
14391 tagl
= (oldtag
< newtag
) ? oldtag
: newtag
;
14392 result
= tagh
= (oldtag
> newtag
) ? oldtag
: newtag
;
14394 /* Architectures before V6KZ add features monotonically. */
14395 if (tagh
<= TAG_CPU_ARCH_V6KZ
)
14398 result
= comb
[tagh
- T(V6T2
)] ? comb
[tagh
- T(V6T2
)][tagl
] : -1;
14400 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
14401 as the canonical version. */
14402 if (result
== T(V4T_PLUS_V6_M
))
14405 *secondary_compat_out
= T(V6_M
);
14408 *secondary_compat_out
= -1;
14412 _bfd_error_handler (_("error: %pB: conflicting CPU architectures %d/%d"),
14413 ibfd
, oldtag
, newtag
);
14421 /* Query attributes object to see if integer divide instructions may be
14422 present in an object. */
14424 elf32_arm_attributes_accept_div (const obj_attribute
*attr
)
14426 int arch
= attr
[Tag_CPU_arch
].i
;
14427 int profile
= attr
[Tag_CPU_arch_profile
].i
;
14429 switch (attr
[Tag_DIV_use
].i
)
14432 /* Integer divide allowed if instruction contained in archetecture. */
14433 if (arch
== TAG_CPU_ARCH_V7
&& (profile
== 'R' || profile
== 'M'))
14435 else if (arch
>= TAG_CPU_ARCH_V7E_M
)
14441 /* Integer divide explicitly prohibited. */
14445 /* Unrecognised case - treat as allowing divide everywhere. */
14447 /* Integer divide allowed in ARM state. */
14452 /* Query attributes object to see if integer divide instructions are
14453 forbidden to be in the object. This is not the inverse of
14454 elf32_arm_attributes_accept_div. */
14456 elf32_arm_attributes_forbid_div (const obj_attribute
*attr
)
14458 return attr
[Tag_DIV_use
].i
== 1;
14461 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
14462 are conflicting attributes. */
14465 elf32_arm_merge_eabi_attributes (bfd
*ibfd
, struct bfd_link_info
*info
)
14467 bfd
*obfd
= info
->output_bfd
;
14468 obj_attribute
*in_attr
;
14469 obj_attribute
*out_attr
;
14470 /* Some tags have 0 = don't care, 1 = strong requirement,
14471 2 = weak requirement. */
14472 static const int order_021
[3] = {0, 2, 1};
14474 bfd_boolean result
= TRUE
;
14475 const char *sec_name
= get_elf_backend_data (ibfd
)->obj_attrs_section
;
14477 /* Skip the linker stubs file. This preserves previous behavior
14478 of accepting unknown attributes in the first input file - but
14480 if (ibfd
->flags
& BFD_LINKER_CREATED
)
14483 /* Skip any input that hasn't attribute section.
14484 This enables to link object files without attribute section with
14486 if (bfd_get_section_by_name (ibfd
, sec_name
) == NULL
)
14489 if (!elf_known_obj_attributes_proc (obfd
)[0].i
)
14491 /* This is the first object. Copy the attributes. */
14492 _bfd_elf_copy_obj_attributes (ibfd
, obfd
);
14494 out_attr
= elf_known_obj_attributes_proc (obfd
);
14496 /* Use the Tag_null value to indicate the attributes have been
14500 /* We do not output objects with Tag_MPextension_use_legacy - we move
14501 the attribute's value to Tag_MPextension_use. */
14502 if (out_attr
[Tag_MPextension_use_legacy
].i
!= 0)
14504 if (out_attr
[Tag_MPextension_use
].i
!= 0
14505 && out_attr
[Tag_MPextension_use_legacy
].i
14506 != out_attr
[Tag_MPextension_use
].i
)
14509 (_("Error: %pB has both the current and legacy "
14510 "Tag_MPextension_use attributes"), ibfd
);
14514 out_attr
[Tag_MPextension_use
] =
14515 out_attr
[Tag_MPextension_use_legacy
];
14516 out_attr
[Tag_MPextension_use_legacy
].type
= 0;
14517 out_attr
[Tag_MPextension_use_legacy
].i
= 0;
14523 in_attr
= elf_known_obj_attributes_proc (ibfd
);
14524 out_attr
= elf_known_obj_attributes_proc (obfd
);
14525 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
14526 if (in_attr
[Tag_ABI_VFP_args
].i
!= out_attr
[Tag_ABI_VFP_args
].i
)
14528 /* Ignore mismatches if the object doesn't use floating point or is
14529 floating point ABI independent. */
14530 if (out_attr
[Tag_ABI_FP_number_model
].i
== AEABI_FP_number_model_none
14531 || (in_attr
[Tag_ABI_FP_number_model
].i
!= AEABI_FP_number_model_none
14532 && out_attr
[Tag_ABI_VFP_args
].i
== AEABI_VFP_args_compatible
))
14533 out_attr
[Tag_ABI_VFP_args
].i
= in_attr
[Tag_ABI_VFP_args
].i
;
14534 else if (in_attr
[Tag_ABI_FP_number_model
].i
!= AEABI_FP_number_model_none
14535 && in_attr
[Tag_ABI_VFP_args
].i
!= AEABI_VFP_args_compatible
)
14538 (_("error: %pB uses VFP register arguments, %pB does not"),
14539 in_attr
[Tag_ABI_VFP_args
].i
? ibfd
: obfd
,
14540 in_attr
[Tag_ABI_VFP_args
].i
? obfd
: ibfd
);
14545 for (i
= LEAST_KNOWN_OBJ_ATTRIBUTE
; i
< NUM_KNOWN_OBJ_ATTRIBUTES
; i
++)
14547 /* Merge this attribute with existing attributes. */
14550 case Tag_CPU_raw_name
:
14552 /* These are merged after Tag_CPU_arch. */
14555 case Tag_ABI_optimization_goals
:
14556 case Tag_ABI_FP_optimization_goals
:
14557 /* Use the first value seen. */
14562 int secondary_compat
= -1, secondary_compat_out
= -1;
14563 unsigned int saved_out_attr
= out_attr
[i
].i
;
14565 static const char *name_table
[] =
14567 /* These aren't real CPU names, but we can't guess
14568 that from the architecture version alone. */
14584 "ARM v8-M.baseline",
14585 "ARM v8-M.mainline",
14588 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
14589 secondary_compat
= get_secondary_compatible_arch (ibfd
);
14590 secondary_compat_out
= get_secondary_compatible_arch (obfd
);
14591 arch_attr
= tag_cpu_arch_combine (ibfd
, out_attr
[i
].i
,
14592 &secondary_compat_out
,
14596 /* Return with error if failed to merge. */
14597 if (arch_attr
== -1)
14600 out_attr
[i
].i
= arch_attr
;
14602 set_secondary_compatible_arch (obfd
, secondary_compat_out
);
14604 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
14605 if (out_attr
[i
].i
== saved_out_attr
)
14606 ; /* Leave the names alone. */
14607 else if (out_attr
[i
].i
== in_attr
[i
].i
)
14609 /* The output architecture has been changed to match the
14610 input architecture. Use the input names. */
14611 out_attr
[Tag_CPU_name
].s
= in_attr
[Tag_CPU_name
].s
14612 ? _bfd_elf_attr_strdup (obfd
, in_attr
[Tag_CPU_name
].s
)
14614 out_attr
[Tag_CPU_raw_name
].s
= in_attr
[Tag_CPU_raw_name
].s
14615 ? _bfd_elf_attr_strdup (obfd
, in_attr
[Tag_CPU_raw_name
].s
)
14620 out_attr
[Tag_CPU_name
].s
= NULL
;
14621 out_attr
[Tag_CPU_raw_name
].s
= NULL
;
14624 /* If we still don't have a value for Tag_CPU_name,
14625 make one up now. Tag_CPU_raw_name remains blank. */
14626 if (out_attr
[Tag_CPU_name
].s
== NULL
14627 && out_attr
[i
].i
< ARRAY_SIZE (name_table
))
14628 out_attr
[Tag_CPU_name
].s
=
14629 _bfd_elf_attr_strdup (obfd
, name_table
[out_attr
[i
].i
]);
14633 case Tag_ARM_ISA_use
:
14634 case Tag_THUMB_ISA_use
:
14635 case Tag_WMMX_arch
:
14636 case Tag_Advanced_SIMD_arch
:
14637 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
14638 case Tag_ABI_FP_rounding
:
14639 case Tag_ABI_FP_exceptions
:
14640 case Tag_ABI_FP_user_exceptions
:
14641 case Tag_ABI_FP_number_model
:
14642 case Tag_FP_HP_extension
:
14643 case Tag_CPU_unaligned_access
:
14645 case Tag_MPextension_use
:
14647 /* Use the largest value specified. */
14648 if (in_attr
[i
].i
> out_attr
[i
].i
)
14649 out_attr
[i
].i
= in_attr
[i
].i
;
14652 case Tag_ABI_align_preserved
:
14653 case Tag_ABI_PCS_RO_data
:
14654 /* Use the smallest value specified. */
14655 if (in_attr
[i
].i
< out_attr
[i
].i
)
14656 out_attr
[i
].i
= in_attr
[i
].i
;
14659 case Tag_ABI_align_needed
:
14660 if ((in_attr
[i
].i
> 0 || out_attr
[i
].i
> 0)
14661 && (in_attr
[Tag_ABI_align_preserved
].i
== 0
14662 || out_attr
[Tag_ABI_align_preserved
].i
== 0))
14664 /* This error message should be enabled once all non-conformant
14665 binaries in the toolchain have had the attributes set
14668 (_("error: %pB: 8-byte data alignment conflicts with %pB"),
14672 /* Fall through. */
14673 case Tag_ABI_FP_denormal
:
14674 case Tag_ABI_PCS_GOT_use
:
14675 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
14676 value if greater than 2 (for future-proofing). */
14677 if ((in_attr
[i
].i
> 2 && in_attr
[i
].i
> out_attr
[i
].i
)
14678 || (in_attr
[i
].i
<= 2 && out_attr
[i
].i
<= 2
14679 && order_021
[in_attr
[i
].i
] > order_021
[out_attr
[i
].i
]))
14680 out_attr
[i
].i
= in_attr
[i
].i
;
14683 case Tag_Virtualization_use
:
14684 /* The virtualization tag effectively stores two bits of
14685 information: the intended use of TrustZone (in bit 0), and the
14686 intended use of Virtualization (in bit 1). */
14687 if (out_attr
[i
].i
== 0)
14688 out_attr
[i
].i
= in_attr
[i
].i
;
14689 else if (in_attr
[i
].i
!= 0
14690 && in_attr
[i
].i
!= out_attr
[i
].i
)
14692 if (in_attr
[i
].i
<= 3 && out_attr
[i
].i
<= 3)
14697 (_("error: %pB: unable to merge virtualization attributes "
14705 case Tag_CPU_arch_profile
:
14706 if (out_attr
[i
].i
!= in_attr
[i
].i
)
14708 /* 0 will merge with anything.
14709 'A' and 'S' merge to 'A'.
14710 'R' and 'S' merge to 'R'.
14711 'M' and 'A|R|S' is an error. */
14712 if (out_attr
[i
].i
== 0
14713 || (out_attr
[i
].i
== 'S'
14714 && (in_attr
[i
].i
== 'A' || in_attr
[i
].i
== 'R')))
14715 out_attr
[i
].i
= in_attr
[i
].i
;
14716 else if (in_attr
[i
].i
== 0
14717 || (in_attr
[i
].i
== 'S'
14718 && (out_attr
[i
].i
== 'A' || out_attr
[i
].i
== 'R')))
14719 ; /* Do nothing. */
14723 (_("error: %pB: conflicting architecture profiles %c/%c"),
14725 in_attr
[i
].i
? in_attr
[i
].i
: '0',
14726 out_attr
[i
].i
? out_attr
[i
].i
: '0');
14732 case Tag_DSP_extension
:
14733 /* No need to change output value if any of:
14734 - pre (<=) ARMv5T input architecture (do not have DSP)
14735 - M input profile not ARMv7E-M and do not have DSP. */
14736 if (in_attr
[Tag_CPU_arch
].i
<= 3
14737 || (in_attr
[Tag_CPU_arch_profile
].i
== 'M'
14738 && in_attr
[Tag_CPU_arch
].i
!= 13
14739 && in_attr
[i
].i
== 0))
14740 ; /* Do nothing. */
14741 /* Output value should be 0 if DSP part of architecture, ie.
14742 - post (>=) ARMv5te architecture output
14743 - A, R or S profile output or ARMv7E-M output architecture. */
14744 else if (out_attr
[Tag_CPU_arch
].i
>= 4
14745 && (out_attr
[Tag_CPU_arch_profile
].i
== 'A'
14746 || out_attr
[Tag_CPU_arch_profile
].i
== 'R'
14747 || out_attr
[Tag_CPU_arch_profile
].i
== 'S'
14748 || out_attr
[Tag_CPU_arch
].i
== 13))
14750 /* Otherwise, DSP instructions are added and not part of output
14758 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
14759 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
14760 when it's 0. It might mean absence of FP hardware if
14761 Tag_FP_arch is zero. */
14763 #define VFP_VERSION_COUNT 9
14764 static const struct
14768 } vfp_versions
[VFP_VERSION_COUNT
] =
14784 /* If the output has no requirement about FP hardware,
14785 follow the requirement of the input. */
14786 if (out_attr
[i
].i
== 0)
14788 /* This assert is still reasonable, we shouldn't
14789 produce the suspicious build attribute
14790 combination (See below for in_attr). */
14791 BFD_ASSERT (out_attr
[Tag_ABI_HardFP_use
].i
== 0);
14792 out_attr
[i
].i
= in_attr
[i
].i
;
14793 out_attr
[Tag_ABI_HardFP_use
].i
14794 = in_attr
[Tag_ABI_HardFP_use
].i
;
14797 /* If the input has no requirement about FP hardware, do
14799 else if (in_attr
[i
].i
== 0)
14801 /* We used to assert that Tag_ABI_HardFP_use was
14802 zero here, but we should never assert when
14803 consuming an object file that has suspicious
14804 build attributes. The single precision variant
14805 of 'no FP architecture' is still 'no FP
14806 architecture', so we just ignore the tag in this
14811 /* Both the input and the output have nonzero Tag_FP_arch.
14812 So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */
14814 /* If both the input and the output have zero Tag_ABI_HardFP_use,
14816 if (in_attr
[Tag_ABI_HardFP_use
].i
== 0
14817 && out_attr
[Tag_ABI_HardFP_use
].i
== 0)
14819 /* If the input and the output have different Tag_ABI_HardFP_use,
14820 the combination of them is 0 (implied by Tag_FP_arch). */
14821 else if (in_attr
[Tag_ABI_HardFP_use
].i
14822 != out_attr
[Tag_ABI_HardFP_use
].i
)
14823 out_attr
[Tag_ABI_HardFP_use
].i
= 0;
14825 /* Now we can handle Tag_FP_arch. */
14827 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
14828 pick the biggest. */
14829 if (in_attr
[i
].i
>= VFP_VERSION_COUNT
14830 && in_attr
[i
].i
> out_attr
[i
].i
)
14832 out_attr
[i
] = in_attr
[i
];
14835 /* The output uses the superset of input features
14836 (ISA version) and registers. */
14837 ver
= vfp_versions
[in_attr
[i
].i
].ver
;
14838 if (ver
< vfp_versions
[out_attr
[i
].i
].ver
)
14839 ver
= vfp_versions
[out_attr
[i
].i
].ver
;
14840 regs
= vfp_versions
[in_attr
[i
].i
].regs
;
14841 if (regs
< vfp_versions
[out_attr
[i
].i
].regs
)
14842 regs
= vfp_versions
[out_attr
[i
].i
].regs
;
14843 /* This assumes all possible supersets are also a valid
14845 for (newval
= VFP_VERSION_COUNT
- 1; newval
> 0; newval
--)
14847 if (regs
== vfp_versions
[newval
].regs
14848 && ver
== vfp_versions
[newval
].ver
)
14851 out_attr
[i
].i
= newval
;
14854 case Tag_PCS_config
:
14855 if (out_attr
[i
].i
== 0)
14856 out_attr
[i
].i
= in_attr
[i
].i
;
14857 else if (in_attr
[i
].i
!= 0 && out_attr
[i
].i
!= in_attr
[i
].i
)
14859 /* It's sometimes ok to mix different configs, so this is only
14862 (_("warning: %pB: conflicting platform configuration"), ibfd
);
14865 case Tag_ABI_PCS_R9_use
:
14866 if (in_attr
[i
].i
!= out_attr
[i
].i
14867 && out_attr
[i
].i
!= AEABI_R9_unused
14868 && in_attr
[i
].i
!= AEABI_R9_unused
)
14871 (_("error: %pB: conflicting use of R9"), ibfd
);
14874 if (out_attr
[i
].i
== AEABI_R9_unused
)
14875 out_attr
[i
].i
= in_attr
[i
].i
;
14877 case Tag_ABI_PCS_RW_data
:
14878 if (in_attr
[i
].i
== AEABI_PCS_RW_data_SBrel
14879 && out_attr
[Tag_ABI_PCS_R9_use
].i
!= AEABI_R9_SB
14880 && out_attr
[Tag_ABI_PCS_R9_use
].i
!= AEABI_R9_unused
)
14883 (_("error: %pB: SB relative addressing conflicts with use of R9"),
14887 /* Use the smallest value specified. */
14888 if (in_attr
[i
].i
< out_attr
[i
].i
)
14889 out_attr
[i
].i
= in_attr
[i
].i
;
14891 case Tag_ABI_PCS_wchar_t
:
14892 if (out_attr
[i
].i
&& in_attr
[i
].i
&& out_attr
[i
].i
!= in_attr
[i
].i
14893 && !elf_arm_tdata (obfd
)->no_wchar_size_warning
)
14896 (_("warning: %pB uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
14897 ibfd
, in_attr
[i
].i
, out_attr
[i
].i
);
14899 else if (in_attr
[i
].i
&& !out_attr
[i
].i
)
14900 out_attr
[i
].i
= in_attr
[i
].i
;
14902 case Tag_ABI_enum_size
:
14903 if (in_attr
[i
].i
!= AEABI_enum_unused
)
14905 if (out_attr
[i
].i
== AEABI_enum_unused
14906 || out_attr
[i
].i
== AEABI_enum_forced_wide
)
14908 /* The existing object is compatible with anything.
14909 Use whatever requirements the new object has. */
14910 out_attr
[i
].i
= in_attr
[i
].i
;
14912 else if (in_attr
[i
].i
!= AEABI_enum_forced_wide
14913 && out_attr
[i
].i
!= in_attr
[i
].i
14914 && !elf_arm_tdata (obfd
)->no_enum_size_warning
)
14916 static const char *aeabi_enum_names
[] =
14917 { "", "variable-size", "32-bit", "" };
14918 const char *in_name
=
14919 in_attr
[i
].i
< ARRAY_SIZE(aeabi_enum_names
)
14920 ? aeabi_enum_names
[in_attr
[i
].i
]
14922 const char *out_name
=
14923 out_attr
[i
].i
< ARRAY_SIZE(aeabi_enum_names
)
14924 ? aeabi_enum_names
[out_attr
[i
].i
]
14927 (_("warning: %pB uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
14928 ibfd
, in_name
, out_name
);
14932 case Tag_ABI_VFP_args
:
14935 case Tag_ABI_WMMX_args
:
14936 if (in_attr
[i
].i
!= out_attr
[i
].i
)
14939 (_("error: %pB uses iWMMXt register arguments, %pB does not"),
14944 case Tag_compatibility
:
14945 /* Merged in target-independent code. */
14947 case Tag_ABI_HardFP_use
:
14948 /* This is handled along with Tag_FP_arch. */
14950 case Tag_ABI_FP_16bit_format
:
14951 if (in_attr
[i
].i
!= 0 && out_attr
[i
].i
!= 0)
14953 if (in_attr
[i
].i
!= out_attr
[i
].i
)
14956 (_("error: fp16 format mismatch between %pB and %pB"),
14961 if (in_attr
[i
].i
!= 0)
14962 out_attr
[i
].i
= in_attr
[i
].i
;
14966 /* A value of zero on input means that the divide instruction may
14967 be used if available in the base architecture as specified via
14968 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
14969 the user did not want divide instructions. A value of 2
14970 explicitly means that divide instructions were allowed in ARM
14971 and Thumb state. */
14972 if (in_attr
[i
].i
== out_attr
[i
].i
)
14973 /* Do nothing. */ ;
14974 else if (elf32_arm_attributes_forbid_div (in_attr
)
14975 && !elf32_arm_attributes_accept_div (out_attr
))
14977 else if (elf32_arm_attributes_forbid_div (out_attr
)
14978 && elf32_arm_attributes_accept_div (in_attr
))
14979 out_attr
[i
].i
= in_attr
[i
].i
;
14980 else if (in_attr
[i
].i
== 2)
14981 out_attr
[i
].i
= in_attr
[i
].i
;
14984 case Tag_MPextension_use_legacy
:
14985 /* We don't output objects with Tag_MPextension_use_legacy - we
14986 move the value to Tag_MPextension_use. */
14987 if (in_attr
[i
].i
!= 0 && in_attr
[Tag_MPextension_use
].i
!= 0)
14989 if (in_attr
[Tag_MPextension_use
].i
!= in_attr
[i
].i
)
14992 (_("%pB has both the current and legacy "
14993 "Tag_MPextension_use attributes"),
14999 if (in_attr
[i
].i
> out_attr
[Tag_MPextension_use
].i
)
15000 out_attr
[Tag_MPextension_use
] = in_attr
[i
];
15004 case Tag_nodefaults
:
15005 /* This tag is set if it exists, but the value is unused (and is
15006 typically zero). We don't actually need to do anything here -
15007 the merge happens automatically when the type flags are merged
15010 case Tag_also_compatible_with
:
15011 /* Already done in Tag_CPU_arch. */
15013 case Tag_conformance
:
15014 /* Keep the attribute if it matches. Throw it away otherwise.
15015 No attribute means no claim to conform. */
15016 if (!in_attr
[i
].s
|| !out_attr
[i
].s
15017 || strcmp (in_attr
[i
].s
, out_attr
[i
].s
) != 0)
15018 out_attr
[i
].s
= NULL
;
15023 = result
&& _bfd_elf_merge_unknown_attribute_low (ibfd
, obfd
, i
);
15026 /* If out_attr was copied from in_attr then it won't have a type yet. */
15027 if (in_attr
[i
].type
&& !out_attr
[i
].type
)
15028 out_attr
[i
].type
= in_attr
[i
].type
;
15031 /* Merge Tag_compatibility attributes and any common GNU ones. */
15032 if (!_bfd_elf_merge_object_attributes (ibfd
, info
))
15035 /* Check for any attributes not known on ARM. */
15036 result
&= _bfd_elf_merge_unknown_attribute_list (ibfd
, obfd
);
15042 /* Return TRUE if the two EABI versions are incompatible. */
15045 elf32_arm_versions_compatible (unsigned iver
, unsigned over
)
15047 /* v4 and v5 are the same spec before and after it was released,
15048 so allow mixing them. */
15049 if ((iver
== EF_ARM_EABI_VER4
&& over
== EF_ARM_EABI_VER5
)
15050 || (iver
== EF_ARM_EABI_VER5
&& over
== EF_ARM_EABI_VER4
))
15053 return (iver
== over
);
15056 /* Merge backend specific data from an object file to the output
15057 object file when linking. */
15060 elf32_arm_merge_private_bfd_data (bfd
*, struct bfd_link_info
*);
15062 /* Display the flags field. */
15065 elf32_arm_print_private_bfd_data (bfd
*abfd
, void * ptr
)
15067 FILE * file
= (FILE *) ptr
;
15068 unsigned long flags
;
15070 BFD_ASSERT (abfd
!= NULL
&& ptr
!= NULL
);
15072 /* Print normal ELF private data. */
15073 _bfd_elf_print_private_bfd_data (abfd
, ptr
);
15075 flags
= elf_elfheader (abfd
)->e_flags
;
15076 /* Ignore init flag - it may not be set, despite the flags field
15077 containing valid data. */
15079 fprintf (file
, _("private flags = %lx:"), elf_elfheader (abfd
)->e_flags
);
15081 switch (EF_ARM_EABI_VERSION (flags
))
15083 case EF_ARM_EABI_UNKNOWN
:
15084 /* The following flag bits are GNU extensions and not part of the
15085 official ARM ELF extended ABI. Hence they are only decoded if
15086 the EABI version is not set. */
15087 if (flags
& EF_ARM_INTERWORK
)
15088 fprintf (file
, _(" [interworking enabled]"));
15090 if (flags
& EF_ARM_APCS_26
)
15091 fprintf (file
, " [APCS-26]");
15093 fprintf (file
, " [APCS-32]");
15095 if (flags
& EF_ARM_VFP_FLOAT
)
15096 fprintf (file
, _(" [VFP float format]"));
15097 else if (flags
& EF_ARM_MAVERICK_FLOAT
)
15098 fprintf (file
, _(" [Maverick float format]"));
15100 fprintf (file
, _(" [FPA float format]"));
15102 if (flags
& EF_ARM_APCS_FLOAT
)
15103 fprintf (file
, _(" [floats passed in float registers]"));
15105 if (flags
& EF_ARM_PIC
)
15106 fprintf (file
, _(" [position independent]"));
15108 if (flags
& EF_ARM_NEW_ABI
)
15109 fprintf (file
, _(" [new ABI]"));
15111 if (flags
& EF_ARM_OLD_ABI
)
15112 fprintf (file
, _(" [old ABI]"));
15114 if (flags
& EF_ARM_SOFT_FLOAT
)
15115 fprintf (file
, _(" [software FP]"));
15117 flags
&= ~(EF_ARM_INTERWORK
| EF_ARM_APCS_26
| EF_ARM_APCS_FLOAT
15118 | EF_ARM_PIC
| EF_ARM_NEW_ABI
| EF_ARM_OLD_ABI
15119 | EF_ARM_SOFT_FLOAT
| EF_ARM_VFP_FLOAT
15120 | EF_ARM_MAVERICK_FLOAT
);
15123 case EF_ARM_EABI_VER1
:
15124 fprintf (file
, _(" [Version1 EABI]"));
15126 if (flags
& EF_ARM_SYMSARESORTED
)
15127 fprintf (file
, _(" [sorted symbol table]"));
15129 fprintf (file
, _(" [unsorted symbol table]"));
15131 flags
&= ~ EF_ARM_SYMSARESORTED
;
15134 case EF_ARM_EABI_VER2
:
15135 fprintf (file
, _(" [Version2 EABI]"));
15137 if (flags
& EF_ARM_SYMSARESORTED
)
15138 fprintf (file
, _(" [sorted symbol table]"));
15140 fprintf (file
, _(" [unsorted symbol table]"));
15142 if (flags
& EF_ARM_DYNSYMSUSESEGIDX
)
15143 fprintf (file
, _(" [dynamic symbols use segment index]"));
15145 if (flags
& EF_ARM_MAPSYMSFIRST
)
15146 fprintf (file
, _(" [mapping symbols precede others]"));
15148 flags
&= ~(EF_ARM_SYMSARESORTED
| EF_ARM_DYNSYMSUSESEGIDX
15149 | EF_ARM_MAPSYMSFIRST
);
15152 case EF_ARM_EABI_VER3
:
15153 fprintf (file
, _(" [Version3 EABI]"));
15156 case EF_ARM_EABI_VER4
:
15157 fprintf (file
, _(" [Version4 EABI]"));
15160 case EF_ARM_EABI_VER5
:
15161 fprintf (file
, _(" [Version5 EABI]"));
15163 if (flags
& EF_ARM_ABI_FLOAT_SOFT
)
15164 fprintf (file
, _(" [soft-float ABI]"));
15166 if (flags
& EF_ARM_ABI_FLOAT_HARD
)
15167 fprintf (file
, _(" [hard-float ABI]"));
15169 flags
&= ~(EF_ARM_ABI_FLOAT_SOFT
| EF_ARM_ABI_FLOAT_HARD
);
15172 if (flags
& EF_ARM_BE8
)
15173 fprintf (file
, _(" [BE8]"));
15175 if (flags
& EF_ARM_LE8
)
15176 fprintf (file
, _(" [LE8]"));
15178 flags
&= ~(EF_ARM_LE8
| EF_ARM_BE8
);
15182 fprintf (file
, _(" <EABI version unrecognised>"));
15186 flags
&= ~ EF_ARM_EABIMASK
;
15188 if (flags
& EF_ARM_RELEXEC
)
15189 fprintf (file
, _(" [relocatable executable]"));
15191 if (flags
& EF_ARM_PIC
)
15192 fprintf (file
, _(" [position independent]"));
15194 if (elf_elfheader (abfd
)->e_ident
[EI_OSABI
] == ELFOSABI_ARM_FDPIC
)
15195 fprintf (file
, _(" [FDPIC ABI supplement]"));
15197 flags
&= ~ (EF_ARM_RELEXEC
| EF_ARM_PIC
);
15200 fprintf (file
, _("<Unrecognised flag bits set>"));
15202 fputc ('\n', file
);
15208 elf32_arm_get_symbol_type (Elf_Internal_Sym
* elf_sym
, int type
)
15210 switch (ELF_ST_TYPE (elf_sym
->st_info
))
15212 case STT_ARM_TFUNC
:
15213 return ELF_ST_TYPE (elf_sym
->st_info
);
15215 case STT_ARM_16BIT
:
15216 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
15217 This allows us to distinguish between data used by Thumb instructions
15218 and non-data (which is probably code) inside Thumb regions of an
15220 if (type
!= STT_OBJECT
&& type
!= STT_TLS
)
15221 return ELF_ST_TYPE (elf_sym
->st_info
);
15232 elf32_arm_gc_mark_hook (asection
*sec
,
15233 struct bfd_link_info
*info
,
15234 Elf_Internal_Rela
*rel
,
15235 struct elf_link_hash_entry
*h
,
15236 Elf_Internal_Sym
*sym
)
15239 switch (ELF32_R_TYPE (rel
->r_info
))
15241 case R_ARM_GNU_VTINHERIT
:
15242 case R_ARM_GNU_VTENTRY
:
15246 return _bfd_elf_gc_mark_hook (sec
, info
, rel
, h
, sym
);
15249 /* Look through the relocs for a section during the first phase. */
15252 elf32_arm_check_relocs (bfd
*abfd
, struct bfd_link_info
*info
,
15253 asection
*sec
, const Elf_Internal_Rela
*relocs
)
15255 Elf_Internal_Shdr
*symtab_hdr
;
15256 struct elf_link_hash_entry
**sym_hashes
;
15257 const Elf_Internal_Rela
*rel
;
15258 const Elf_Internal_Rela
*rel_end
;
15261 struct elf32_arm_link_hash_table
*htab
;
15262 bfd_boolean call_reloc_p
;
15263 bfd_boolean may_become_dynamic_p
;
15264 bfd_boolean may_need_local_target_p
;
15265 unsigned long nsyms
;
15267 if (bfd_link_relocatable (info
))
15270 BFD_ASSERT (is_arm_elf (abfd
));
15272 htab
= elf32_arm_hash_table (info
);
15278 /* Create dynamic sections for relocatable executables so that we can
15279 copy relocations. */
15280 if (htab
->root
.is_relocatable_executable
15281 && ! htab
->root
.dynamic_sections_created
)
15283 if (! _bfd_elf_link_create_dynamic_sections (abfd
, info
))
15287 if (htab
->root
.dynobj
== NULL
)
15288 htab
->root
.dynobj
= abfd
;
15289 if (!create_ifunc_sections (info
))
15292 dynobj
= htab
->root
.dynobj
;
15294 symtab_hdr
= & elf_symtab_hdr (abfd
);
15295 sym_hashes
= elf_sym_hashes (abfd
);
15296 nsyms
= NUM_SHDR_ENTRIES (symtab_hdr
);
15298 rel_end
= relocs
+ sec
->reloc_count
;
15299 for (rel
= relocs
; rel
< rel_end
; rel
++)
15301 Elf_Internal_Sym
*isym
;
15302 struct elf_link_hash_entry
*h
;
15303 struct elf32_arm_link_hash_entry
*eh
;
15304 unsigned int r_symndx
;
15307 r_symndx
= ELF32_R_SYM (rel
->r_info
);
15308 r_type
= ELF32_R_TYPE (rel
->r_info
);
15309 r_type
= arm_real_reloc_type (htab
, r_type
);
15311 if (r_symndx
>= nsyms
15312 /* PR 9934: It is possible to have relocations that do not
15313 refer to symbols, thus it is also possible to have an
15314 object file containing relocations but no symbol table. */
15315 && (r_symndx
> STN_UNDEF
|| nsyms
> 0))
15317 _bfd_error_handler (_("%pB: bad symbol index: %d"), abfd
,
15326 if (r_symndx
< symtab_hdr
->sh_info
)
15328 /* A local symbol. */
15329 isym
= bfd_sym_from_r_symndx (&htab
->sym_cache
,
15336 h
= sym_hashes
[r_symndx
- symtab_hdr
->sh_info
];
15337 while (h
->root
.type
== bfd_link_hash_indirect
15338 || h
->root
.type
== bfd_link_hash_warning
)
15339 h
= (struct elf_link_hash_entry
*) h
->root
.u
.i
.link
;
15343 eh
= (struct elf32_arm_link_hash_entry
*) h
;
15345 call_reloc_p
= FALSE
;
15346 may_become_dynamic_p
= FALSE
;
15347 may_need_local_target_p
= FALSE
;
15349 /* Could be done earlier, if h were already available. */
15350 r_type
= elf32_arm_tls_transition (info
, r_type
, h
);
15353 case R_ARM_GOTOFFFUNCDESC
:
15357 if (!elf32_arm_allocate_local_sym_info (abfd
))
15359 elf32_arm_local_fdpic_cnts(abfd
)[r_symndx
].gotofffuncdesc_cnt
+= 1;
15360 elf32_arm_local_fdpic_cnts(abfd
)[r_symndx
].funcdesc_offset
= -1;
15364 eh
->fdpic_cnts
.gotofffuncdesc_cnt
++;
15369 case R_ARM_GOTFUNCDESC
:
15373 /* Such a relocation is not supposed to be generated
15374 by gcc on a static function. */
15375 /* Anyway if needed it could be handled. */
15380 eh
->fdpic_cnts
.gotfuncdesc_cnt
++;
15385 case R_ARM_FUNCDESC
:
15389 if (!elf32_arm_allocate_local_sym_info (abfd
))
15391 elf32_arm_local_fdpic_cnts(abfd
)[r_symndx
].funcdesc_cnt
+= 1;
15392 elf32_arm_local_fdpic_cnts(abfd
)[r_symndx
].funcdesc_offset
= -1;
15396 eh
->fdpic_cnts
.funcdesc_cnt
++;
15402 case R_ARM_GOT_PREL
:
15403 case R_ARM_TLS_GD32
:
15404 case R_ARM_TLS_GD32_FDPIC
:
15405 case R_ARM_TLS_IE32
:
15406 case R_ARM_TLS_IE32_FDPIC
:
15407 case R_ARM_TLS_GOTDESC
:
15408 case R_ARM_TLS_DESCSEQ
:
15409 case R_ARM_THM_TLS_DESCSEQ
:
15410 case R_ARM_TLS_CALL
:
15411 case R_ARM_THM_TLS_CALL
:
15412 /* This symbol requires a global offset table entry. */
15414 int tls_type
, old_tls_type
;
15418 case R_ARM_TLS_GD32
: tls_type
= GOT_TLS_GD
; break;
15419 case R_ARM_TLS_GD32_FDPIC
: tls_type
= GOT_TLS_GD
; break;
15421 case R_ARM_TLS_IE32
: tls_type
= GOT_TLS_IE
; break;
15422 case R_ARM_TLS_IE32_FDPIC
: tls_type
= GOT_TLS_IE
; break;
15424 case R_ARM_TLS_GOTDESC
:
15425 case R_ARM_TLS_CALL
: case R_ARM_THM_TLS_CALL
:
15426 case R_ARM_TLS_DESCSEQ
: case R_ARM_THM_TLS_DESCSEQ
:
15427 tls_type
= GOT_TLS_GDESC
; break;
15429 default: tls_type
= GOT_NORMAL
; break;
15432 if (!bfd_link_executable (info
) && (tls_type
& GOT_TLS_IE
))
15433 info
->flags
|= DF_STATIC_TLS
;
15438 old_tls_type
= elf32_arm_hash_entry (h
)->tls_type
;
15442 /* This is a global offset table entry for a local symbol. */
15443 if (!elf32_arm_allocate_local_sym_info (abfd
))
15445 elf_local_got_refcounts (abfd
)[r_symndx
] += 1;
15446 old_tls_type
= elf32_arm_local_got_tls_type (abfd
) [r_symndx
];
15449 /* If a variable is accessed with both tls methods, two
15450 slots may be created. */
15451 if (GOT_TLS_GD_ANY_P (old_tls_type
)
15452 && GOT_TLS_GD_ANY_P (tls_type
))
15453 tls_type
|= old_tls_type
;
15455 /* We will already have issued an error message if there
15456 is a TLS/non-TLS mismatch, based on the symbol
15457 type. So just combine any TLS types needed. */
15458 if (old_tls_type
!= GOT_UNKNOWN
&& old_tls_type
!= GOT_NORMAL
15459 && tls_type
!= GOT_NORMAL
)
15460 tls_type
|= old_tls_type
;
15462 /* If the symbol is accessed in both IE and GDESC
15463 method, we're able to relax. Turn off the GDESC flag,
15464 without messing up with any other kind of tls types
15465 that may be involved. */
15466 if ((tls_type
& GOT_TLS_IE
) && (tls_type
& GOT_TLS_GDESC
))
15467 tls_type
&= ~GOT_TLS_GDESC
;
15469 if (old_tls_type
!= tls_type
)
15472 elf32_arm_hash_entry (h
)->tls_type
= tls_type
;
15474 elf32_arm_local_got_tls_type (abfd
) [r_symndx
] = tls_type
;
15477 /* Fall through. */
15479 case R_ARM_TLS_LDM32
:
15480 case R_ARM_TLS_LDM32_FDPIC
:
15481 if (r_type
== R_ARM_TLS_LDM32
|| r_type
== R_ARM_TLS_LDM32_FDPIC
)
15482 htab
->tls_ldm_got
.refcount
++;
15483 /* Fall through. */
15485 case R_ARM_GOTOFF32
:
15487 if (htab
->root
.sgot
== NULL
15488 && !create_got_section (htab
->root
.dynobj
, info
))
15497 case R_ARM_THM_CALL
:
15498 case R_ARM_THM_JUMP24
:
15499 case R_ARM_THM_JUMP19
:
15500 call_reloc_p
= TRUE
;
15501 may_need_local_target_p
= TRUE
;
15505 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
15506 ldr __GOTT_INDEX__ offsets. */
15507 if (htab
->root
.target_os
!= is_vxworks
)
15509 may_need_local_target_p
= TRUE
;
15512 else goto jump_over
;
15514 /* Fall through. */
15516 case R_ARM_MOVW_ABS_NC
:
15517 case R_ARM_MOVT_ABS
:
15518 case R_ARM_THM_MOVW_ABS_NC
:
15519 case R_ARM_THM_MOVT_ABS
:
15520 if (bfd_link_pic (info
))
15523 (_("%pB: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
15524 abfd
, elf32_arm_howto_table_1
[r_type
].name
,
15525 (h
) ? h
->root
.root
.string
: "a local symbol");
15526 bfd_set_error (bfd_error_bad_value
);
15530 /* Fall through. */
15532 case R_ARM_ABS32_NOI
:
15534 if (h
!= NULL
&& bfd_link_executable (info
))
15536 h
->pointer_equality_needed
= 1;
15538 /* Fall through. */
15540 case R_ARM_REL32_NOI
:
15541 case R_ARM_MOVW_PREL_NC
:
15542 case R_ARM_MOVT_PREL
:
15543 case R_ARM_THM_MOVW_PREL_NC
:
15544 case R_ARM_THM_MOVT_PREL
:
15546 /* Should the interworking branches be listed here? */
15547 if ((bfd_link_pic (info
) || htab
->root
.is_relocatable_executable
15549 && (sec
->flags
& SEC_ALLOC
) != 0)
15552 && elf32_arm_howto_from_type (r_type
)->pc_relative
)
15554 /* In shared libraries and relocatable executables,
15555 we treat local relative references as calls;
15556 see the related SYMBOL_CALLS_LOCAL code in
15557 allocate_dynrelocs. */
15558 call_reloc_p
= TRUE
;
15559 may_need_local_target_p
= TRUE
;
15562 /* We are creating a shared library or relocatable
15563 executable, and this is a reloc against a global symbol,
15564 or a non-PC-relative reloc against a local symbol.
15565 We may need to copy the reloc into the output. */
15566 may_become_dynamic_p
= TRUE
;
15569 may_need_local_target_p
= TRUE
;
15572 /* This relocation describes the C++ object vtable hierarchy.
15573 Reconstruct it for later use during GC. */
15574 case R_ARM_GNU_VTINHERIT
:
15575 if (!bfd_elf_gc_record_vtinherit (abfd
, sec
, h
, rel
->r_offset
))
15579 /* This relocation describes which C++ vtable entries are actually
15580 used. Record for later use during GC. */
15581 case R_ARM_GNU_VTENTRY
:
15582 if (!bfd_elf_gc_record_vtentry (abfd
, sec
, h
, rel
->r_offset
))
15590 /* We may need a .plt entry if the function this reloc
15591 refers to is in a different object, regardless of the
15592 symbol's type. We can't tell for sure yet, because
15593 something later might force the symbol local. */
15595 else if (may_need_local_target_p
)
15596 /* If this reloc is in a read-only section, we might
15597 need a copy reloc. We can't check reliably at this
15598 stage whether the section is read-only, as input
15599 sections have not yet been mapped to output sections.
15600 Tentatively set the flag for now, and correct in
15601 adjust_dynamic_symbol. */
15602 h
->non_got_ref
= 1;
15605 if (may_need_local_target_p
15606 && (h
!= NULL
|| ELF32_ST_TYPE (isym
->st_info
) == STT_GNU_IFUNC
))
15608 union gotplt_union
*root_plt
;
15609 struct arm_plt_info
*arm_plt
;
15610 struct arm_local_iplt_info
*local_iplt
;
15614 root_plt
= &h
->plt
;
15615 arm_plt
= &eh
->plt
;
15619 local_iplt
= elf32_arm_create_local_iplt (abfd
, r_symndx
);
15620 if (local_iplt
== NULL
)
15622 root_plt
= &local_iplt
->root
;
15623 arm_plt
= &local_iplt
->arm
;
15626 /* If the symbol is a function that doesn't bind locally,
15627 this relocation will need a PLT entry. */
15628 if (root_plt
->refcount
!= -1)
15629 root_plt
->refcount
+= 1;
15632 arm_plt
->noncall_refcount
++;
15634 /* It's too early to use htab->use_blx here, so we have to
15635 record possible blx references separately from
15636 relocs that definitely need a thumb stub. */
15638 if (r_type
== R_ARM_THM_CALL
)
15639 arm_plt
->maybe_thumb_refcount
+= 1;
15641 if (r_type
== R_ARM_THM_JUMP24
15642 || r_type
== R_ARM_THM_JUMP19
)
15643 arm_plt
->thumb_refcount
+= 1;
15646 if (may_become_dynamic_p
)
15648 struct elf_dyn_relocs
*p
, **head
;
15650 /* Create a reloc section in dynobj. */
15651 if (sreloc
== NULL
)
15653 sreloc
= _bfd_elf_make_dynamic_reloc_section
15654 (sec
, dynobj
, 2, abfd
, ! htab
->use_rel
);
15656 if (sreloc
== NULL
)
15659 /* BPABI objects never have dynamic relocations mapped. */
15660 if (htab
->root
.target_os
== is_symbian
)
15664 flags
= bfd_section_flags (sreloc
);
15665 flags
&= ~(SEC_LOAD
| SEC_ALLOC
);
15666 bfd_set_section_flags (sreloc
, flags
);
15670 /* If this is a global symbol, count the number of
15671 relocations we need for this symbol. */
15673 head
= &h
->dyn_relocs
;
15676 head
= elf32_arm_get_local_dynreloc_list (abfd
, r_symndx
, isym
);
15682 if (p
== NULL
|| p
->sec
!= sec
)
15684 size_t amt
= sizeof *p
;
15686 p
= (struct elf_dyn_relocs
*) bfd_alloc (htab
->root
.dynobj
, amt
);
15696 if (elf32_arm_howto_from_type (r_type
)->pc_relative
)
15699 if (h
== NULL
&& htab
->fdpic_p
&& !bfd_link_pic(info
)
15700 && r_type
!= R_ARM_ABS32
&& r_type
!= R_ARM_ABS32_NOI
) {
15701 /* Here we only support R_ARM_ABS32 and R_ARM_ABS32_NOI
15702 that will become rofixup. */
15703 /* This is due to the fact that we suppose all will become rofixup. */
15704 fprintf(stderr
, "FDPIC does not yet support %d relocation to become dynamic for executable\n", r_type
);
15706 (_("FDPIC does not yet support %s relocation"
15707 " to become dynamic for executable"),
15708 elf32_arm_howto_table_1
[r_type
].name
);
15718 elf32_arm_update_relocs (asection
*o
,
15719 struct bfd_elf_section_reloc_data
*reldata
)
15721 void (*swap_in
) (bfd
*, const bfd_byte
*, Elf_Internal_Rela
*);
15722 void (*swap_out
) (bfd
*, const Elf_Internal_Rela
*, bfd_byte
*);
15723 const struct elf_backend_data
*bed
;
15724 _arm_elf_section_data
*eado
;
15725 struct bfd_link_order
*p
;
15726 bfd_byte
*erela_head
, *erela
;
15727 Elf_Internal_Rela
*irela_head
, *irela
;
15728 Elf_Internal_Shdr
*rel_hdr
;
15730 unsigned int count
;
15732 eado
= get_arm_elf_section_data (o
);
15734 if (!eado
|| eado
->elf
.this_hdr
.sh_type
!= SHT_ARM_EXIDX
)
15738 bed
= get_elf_backend_data (abfd
);
15739 rel_hdr
= reldata
->hdr
;
15741 if (rel_hdr
->sh_entsize
== bed
->s
->sizeof_rel
)
15743 swap_in
= bed
->s
->swap_reloc_in
;
15744 swap_out
= bed
->s
->swap_reloc_out
;
15746 else if (rel_hdr
->sh_entsize
== bed
->s
->sizeof_rela
)
15748 swap_in
= bed
->s
->swap_reloca_in
;
15749 swap_out
= bed
->s
->swap_reloca_out
;
15754 erela_head
= rel_hdr
->contents
;
15755 irela_head
= (Elf_Internal_Rela
*) bfd_zmalloc
15756 ((NUM_SHDR_ENTRIES (rel_hdr
) + 1) * sizeof (*irela_head
));
15758 erela
= erela_head
;
15759 irela
= irela_head
;
15762 for (p
= o
->map_head
.link_order
; p
; p
= p
->next
)
15764 if (p
->type
== bfd_section_reloc_link_order
15765 || p
->type
== bfd_symbol_reloc_link_order
)
15767 (*swap_in
) (abfd
, erela
, irela
);
15768 erela
+= rel_hdr
->sh_entsize
;
15772 else if (p
->type
== bfd_indirect_link_order
)
15774 struct bfd_elf_section_reloc_data
*input_reldata
;
15775 arm_unwind_table_edit
*edit_list
, *edit_tail
;
15776 _arm_elf_section_data
*eadi
;
15781 i
= p
->u
.indirect
.section
;
15783 eadi
= get_arm_elf_section_data (i
);
15784 edit_list
= eadi
->u
.exidx
.unwind_edit_list
;
15785 edit_tail
= eadi
->u
.exidx
.unwind_edit_tail
;
15786 offset
= i
->output_offset
;
15788 if (eadi
->elf
.rel
.hdr
&&
15789 eadi
->elf
.rel
.hdr
->sh_entsize
== rel_hdr
->sh_entsize
)
15790 input_reldata
= &eadi
->elf
.rel
;
15791 else if (eadi
->elf
.rela
.hdr
&&
15792 eadi
->elf
.rela
.hdr
->sh_entsize
== rel_hdr
->sh_entsize
)
15793 input_reldata
= &eadi
->elf
.rela
;
15799 for (j
= 0; j
< NUM_SHDR_ENTRIES (input_reldata
->hdr
); j
++)
15801 arm_unwind_table_edit
*edit_node
, *edit_next
;
15803 bfd_vma reloc_index
;
15805 (*swap_in
) (abfd
, erela
, irela
);
15806 reloc_index
= (irela
->r_offset
- offset
) / 8;
15809 edit_node
= edit_list
;
15810 for (edit_next
= edit_list
;
15811 edit_next
&& edit_next
->index
<= reloc_index
;
15812 edit_next
= edit_node
->next
)
15815 edit_node
= edit_next
;
15818 if (edit_node
->type
!= DELETE_EXIDX_ENTRY
15819 || edit_node
->index
!= reloc_index
)
15821 irela
->r_offset
-= bias
* 8;
15826 erela
+= rel_hdr
->sh_entsize
;
15829 if (edit_tail
->type
== INSERT_EXIDX_CANTUNWIND_AT_END
)
15831 /* New relocation entity. */
15832 asection
*text_sec
= edit_tail
->linked_section
;
15833 asection
*text_out
= text_sec
->output_section
;
15834 bfd_vma exidx_offset
= offset
+ i
->size
- 8;
15836 irela
->r_addend
= 0;
15837 irela
->r_offset
= exidx_offset
;
15838 irela
->r_info
= ELF32_R_INFO
15839 (text_out
->target_index
, R_ARM_PREL31
);
15846 for (j
= 0; j
< NUM_SHDR_ENTRIES (input_reldata
->hdr
); j
++)
15848 (*swap_in
) (abfd
, erela
, irela
);
15849 erela
+= rel_hdr
->sh_entsize
;
15853 count
+= NUM_SHDR_ENTRIES (input_reldata
->hdr
);
15858 reldata
->count
= count
;
15859 rel_hdr
->sh_size
= count
* rel_hdr
->sh_entsize
;
15861 erela
= erela_head
;
15862 irela
= irela_head
;
15865 (*swap_out
) (abfd
, irela
, erela
);
15866 erela
+= rel_hdr
->sh_entsize
;
15873 /* Hashes are no longer valid. */
15874 free (reldata
->hashes
);
15875 reldata
->hashes
= NULL
;
15878 /* Unwinding tables are not referenced directly. This pass marks them as
15879 required if the corresponding code section is marked. Similarly, ARMv8-M
15880 secure entry functions can only be referenced by SG veneers which are
15881 created after the GC process. They need to be marked in case they reside in
15882 their own section (as would be the case if code was compiled with
15883 -ffunction-sections). */
15886 elf32_arm_gc_mark_extra_sections (struct bfd_link_info
*info
,
15887 elf_gc_mark_hook_fn gc_mark_hook
)
15890 Elf_Internal_Shdr
**elf_shdrp
;
15891 asection
*cmse_sec
;
15892 obj_attribute
*out_attr
;
15893 Elf_Internal_Shdr
*symtab_hdr
;
15894 unsigned i
, sym_count
, ext_start
;
15895 const struct elf_backend_data
*bed
;
15896 struct elf_link_hash_entry
**sym_hashes
;
15897 struct elf32_arm_link_hash_entry
*cmse_hash
;
15898 bfd_boolean again
, is_v8m
, first_bfd_browse
= TRUE
;
15899 bfd_boolean debug_sec_need_to_be_marked
= FALSE
;
15902 _bfd_elf_gc_mark_extra_sections (info
, gc_mark_hook
);
15904 out_attr
= elf_known_obj_attributes_proc (info
->output_bfd
);
15905 is_v8m
= out_attr
[Tag_CPU_arch
].i
>= TAG_CPU_ARCH_V8M_BASE
15906 && out_attr
[Tag_CPU_arch_profile
].i
== 'M';
15908 /* Marking EH data may cause additional code sections to be marked,
15909 requiring multiple passes. */
15914 for (sub
= info
->input_bfds
; sub
!= NULL
; sub
= sub
->link
.next
)
15918 if (! is_arm_elf (sub
))
15921 elf_shdrp
= elf_elfsections (sub
);
15922 for (o
= sub
->sections
; o
!= NULL
; o
= o
->next
)
15924 Elf_Internal_Shdr
*hdr
;
15926 hdr
= &elf_section_data (o
)->this_hdr
;
15927 if (hdr
->sh_type
== SHT_ARM_EXIDX
15929 && hdr
->sh_link
< elf_numsections (sub
)
15931 && elf_shdrp
[hdr
->sh_link
]->bfd_section
->gc_mark
)
15934 if (!_bfd_elf_gc_mark (info
, o
, gc_mark_hook
))
15939 /* Mark section holding ARMv8-M secure entry functions. We mark all
15940 of them so no need for a second browsing. */
15941 if (is_v8m
&& first_bfd_browse
)
15943 sym_hashes
= elf_sym_hashes (sub
);
15944 bed
= get_elf_backend_data (sub
);
15945 symtab_hdr
= &elf_tdata (sub
)->symtab_hdr
;
15946 sym_count
= symtab_hdr
->sh_size
/ bed
->s
->sizeof_sym
;
15947 ext_start
= symtab_hdr
->sh_info
;
15949 /* Scan symbols. */
15950 for (i
= ext_start
; i
< sym_count
; i
++)
15952 cmse_hash
= elf32_arm_hash_entry (sym_hashes
[i
- ext_start
]);
15954 /* Assume it is a special symbol. If not, cmse_scan will
15955 warn about it and user can do something about it. */
15956 if (CONST_STRNEQ (cmse_hash
->root
.root
.root
.string
,
15959 cmse_sec
= cmse_hash
->root
.root
.u
.def
.section
;
15960 if (!cmse_sec
->gc_mark
15961 && !_bfd_elf_gc_mark (info
, cmse_sec
, gc_mark_hook
))
15963 /* The debug sections related to these secure entry
15964 functions are marked on enabling below flag. */
15965 debug_sec_need_to_be_marked
= TRUE
;
15969 if (debug_sec_need_to_be_marked
)
15971 /* Looping over all the sections of the object file containing
15972 Armv8-M secure entry functions and marking all the debug
15974 for (isec
= sub
->sections
; isec
!= NULL
; isec
= isec
->next
)
15976 /* If not a debug sections, skip it. */
15977 if (!isec
->gc_mark
&& (isec
->flags
& SEC_DEBUGGING
))
15978 isec
->gc_mark
= 1 ;
15980 debug_sec_need_to_be_marked
= FALSE
;
15984 first_bfd_browse
= FALSE
;
15990 /* Treat mapping symbols as special target symbols. */
15993 elf32_arm_is_target_special_symbol (bfd
* abfd ATTRIBUTE_UNUSED
, asymbol
* sym
)
15995 return bfd_is_arm_special_symbol_name (sym
->name
,
15996 BFD_ARM_SPECIAL_SYM_TYPE_ANY
);
15999 /* If the ELF symbol SYM might be a function in SEC, return the
16000 function size and set *CODE_OFF to the function's entry point,
16001 otherwise return zero. */
16003 static bfd_size_type
16004 elf32_arm_maybe_function_sym (const asymbol
*sym
, asection
*sec
,
16007 bfd_size_type size
;
16009 if ((sym
->flags
& (BSF_SECTION_SYM
| BSF_FILE
| BSF_OBJECT
16010 | BSF_THREAD_LOCAL
| BSF_RELC
| BSF_SRELC
)) != 0
16011 || sym
->section
!= sec
)
16014 if (!(sym
->flags
& BSF_SYNTHETIC
))
16015 switch (ELF_ST_TYPE (((elf_symbol_type
*) sym
)->internal_elf_sym
.st_info
))
16018 case STT_ARM_TFUNC
:
16025 if ((sym
->flags
& BSF_LOCAL
)
16026 && bfd_is_arm_special_symbol_name (sym
->name
,
16027 BFD_ARM_SPECIAL_SYM_TYPE_ANY
))
16030 *code_off
= sym
->value
;
16032 if (!(sym
->flags
& BSF_SYNTHETIC
))
16033 size
= ((elf_symbol_type
*) sym
)->internal_elf_sym
.st_size
;
16040 elf32_arm_find_inliner_info (bfd
* abfd
,
16041 const char ** filename_ptr
,
16042 const char ** functionname_ptr
,
16043 unsigned int * line_ptr
)
16046 found
= _bfd_dwarf2_find_inliner_info (abfd
, filename_ptr
,
16047 functionname_ptr
, line_ptr
,
16048 & elf_tdata (abfd
)->dwarf2_find_line_info
);
16052 /* Adjust a symbol defined by a dynamic object and referenced by a
16053 regular object. The current definition is in some section of the
16054 dynamic object, but we're not including those sections. We have to
16055 change the definition to something the rest of the link can
16059 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info
* info
,
16060 struct elf_link_hash_entry
* h
)
16063 asection
*s
, *srel
;
16064 struct elf32_arm_link_hash_entry
* eh
;
16065 struct elf32_arm_link_hash_table
*globals
;
16067 globals
= elf32_arm_hash_table (info
);
16068 if (globals
== NULL
)
16071 dynobj
= elf_hash_table (info
)->dynobj
;
16073 /* Make sure we know what is going on here. */
16074 BFD_ASSERT (dynobj
!= NULL
16076 || h
->type
== STT_GNU_IFUNC
16080 && !h
->def_regular
)));
16082 eh
= (struct elf32_arm_link_hash_entry
*) h
;
16084 /* If this is a function, put it in the procedure linkage table. We
16085 will fill in the contents of the procedure linkage table later,
16086 when we know the address of the .got section. */
16087 if (h
->type
== STT_FUNC
|| h
->type
== STT_GNU_IFUNC
|| h
->needs_plt
)
16089 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
16090 symbol binds locally. */
16091 if (h
->plt
.refcount
<= 0
16092 || (h
->type
!= STT_GNU_IFUNC
16093 && (SYMBOL_CALLS_LOCAL (info
, h
)
16094 || (ELF_ST_VISIBILITY (h
->other
) != STV_DEFAULT
16095 && h
->root
.type
== bfd_link_hash_undefweak
))))
16097 /* This case can occur if we saw a PLT32 reloc in an input
16098 file, but the symbol was never referred to by a dynamic
16099 object, or if all references were garbage collected. In
16100 such a case, we don't actually need to build a procedure
16101 linkage table, and we can just do a PC24 reloc instead. */
16102 h
->plt
.offset
= (bfd_vma
) -1;
16103 eh
->plt
.thumb_refcount
= 0;
16104 eh
->plt
.maybe_thumb_refcount
= 0;
16105 eh
->plt
.noncall_refcount
= 0;
16113 /* It's possible that we incorrectly decided a .plt reloc was
16114 needed for an R_ARM_PC24 or similar reloc to a non-function sym
16115 in check_relocs. We can't decide accurately between function
16116 and non-function syms in check-relocs; Objects loaded later in
16117 the link may change h->type. So fix it now. */
16118 h
->plt
.offset
= (bfd_vma
) -1;
16119 eh
->plt
.thumb_refcount
= 0;
16120 eh
->plt
.maybe_thumb_refcount
= 0;
16121 eh
->plt
.noncall_refcount
= 0;
16124 /* If this is a weak symbol, and there is a real definition, the
16125 processor independent code will have arranged for us to see the
16126 real definition first, and we can just use the same value. */
16127 if (h
->is_weakalias
)
16129 struct elf_link_hash_entry
*def
= weakdef (h
);
16130 BFD_ASSERT (def
->root
.type
== bfd_link_hash_defined
);
16131 h
->root
.u
.def
.section
= def
->root
.u
.def
.section
;
16132 h
->root
.u
.def
.value
= def
->root
.u
.def
.value
;
16136 /* If there are no non-GOT references, we do not need a copy
16138 if (!h
->non_got_ref
)
16141 /* This is a reference to a symbol defined by a dynamic object which
16142 is not a function. */
16144 /* If we are creating a shared library, we must presume that the
16145 only references to the symbol are via the global offset table.
16146 For such cases we need not do anything here; the relocations will
16147 be handled correctly by relocate_section. Relocatable executables
16148 can reference data in shared objects directly, so we don't need to
16149 do anything here. */
16150 if (bfd_link_pic (info
) || globals
->root
.is_relocatable_executable
)
16153 /* We must allocate the symbol in our .dynbss section, which will
16154 become part of the .bss section of the executable. There will be
16155 an entry for this symbol in the .dynsym section. The dynamic
16156 object will contain position independent code, so all references
16157 from the dynamic object to this symbol will go through the global
16158 offset table. The dynamic linker will use the .dynsym entry to
16159 determine the address it must put in the global offset table, so
16160 both the dynamic object and the regular object will refer to the
16161 same memory location for the variable. */
16162 /* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic
16163 linker to copy the initial value out of the dynamic object and into
16164 the runtime process image. We need to remember the offset into the
16165 .rel(a).bss section we are going to use. */
16166 if ((h
->root
.u
.def
.section
->flags
& SEC_READONLY
) != 0)
16168 s
= globals
->root
.sdynrelro
;
16169 srel
= globals
->root
.sreldynrelro
;
16173 s
= globals
->root
.sdynbss
;
16174 srel
= globals
->root
.srelbss
;
16176 if (info
->nocopyreloc
== 0
16177 && (h
->root
.u
.def
.section
->flags
& SEC_ALLOC
) != 0
16180 elf32_arm_allocate_dynrelocs (info
, srel
, 1);
16184 return _bfd_elf_adjust_dynamic_copy (info
, h
, s
);
16187 /* Allocate space in .plt, .got and associated reloc sections for
16191 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry
*h
, void * inf
)
16193 struct bfd_link_info
*info
;
16194 struct elf32_arm_link_hash_table
*htab
;
16195 struct elf32_arm_link_hash_entry
*eh
;
16196 struct elf_dyn_relocs
*p
;
16198 if (h
->root
.type
== bfd_link_hash_indirect
)
16201 eh
= (struct elf32_arm_link_hash_entry
*) h
;
16203 info
= (struct bfd_link_info
*) inf
;
16204 htab
= elf32_arm_hash_table (info
);
16208 if ((htab
->root
.dynamic_sections_created
|| h
->type
== STT_GNU_IFUNC
)
16209 && h
->plt
.refcount
> 0)
16211 /* Make sure this symbol is output as a dynamic symbol.
16212 Undefined weak syms won't yet be marked as dynamic. */
16213 if (h
->dynindx
== -1 && !h
->forced_local
16214 && h
->root
.type
== bfd_link_hash_undefweak
)
16216 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
16220 /* If the call in the PLT entry binds locally, the associated
16221 GOT entry should use an R_ARM_IRELATIVE relocation instead of
16222 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
16223 than the .plt section. */
16224 if (h
->type
== STT_GNU_IFUNC
&& SYMBOL_CALLS_LOCAL (info
, h
))
16227 if (eh
->plt
.noncall_refcount
== 0
16228 && SYMBOL_REFERENCES_LOCAL (info
, h
))
16229 /* All non-call references can be resolved directly.
16230 This means that they can (and in some cases, must)
16231 resolve directly to the run-time target, rather than
16232 to the PLT. That in turns means that any .got entry
16233 would be equal to the .igot.plt entry, so there's
16234 no point having both. */
16235 h
->got
.refcount
= 0;
16238 if (bfd_link_pic (info
)
16240 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h
))
16242 elf32_arm_allocate_plt_entry (info
, eh
->is_iplt
, &h
->plt
, &eh
->plt
);
16244 /* If this symbol is not defined in a regular file, and we are
16245 not generating a shared library, then set the symbol to this
16246 location in the .plt. This is required to make function
16247 pointers compare as equal between the normal executable and
16248 the shared library. */
16249 if (! bfd_link_pic (info
)
16250 && !h
->def_regular
)
16252 h
->root
.u
.def
.section
= htab
->root
.splt
;
16253 h
->root
.u
.def
.value
= h
->plt
.offset
;
16255 /* Make sure the function is not marked as Thumb, in case
16256 it is the target of an ABS32 relocation, which will
16257 point to the PLT entry. */
16258 ARM_SET_SYM_BRANCH_TYPE (h
->target_internal
, ST_BRANCH_TO_ARM
);
16261 /* VxWorks executables have a second set of relocations for
16262 each PLT entry. They go in a separate relocation section,
16263 which is processed by the kernel loader. */
16264 if (htab
->root
.target_os
== is_vxworks
&& !bfd_link_pic (info
))
16266 /* There is a relocation for the initial PLT entry:
16267 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
16268 if (h
->plt
.offset
== htab
->plt_header_size
)
16269 elf32_arm_allocate_dynrelocs (info
, htab
->srelplt2
, 1);
16271 /* There are two extra relocations for each subsequent
16272 PLT entry: an R_ARM_32 relocation for the GOT entry,
16273 and an R_ARM_32 relocation for the PLT entry. */
16274 elf32_arm_allocate_dynrelocs (info
, htab
->srelplt2
, 2);
16279 h
->plt
.offset
= (bfd_vma
) -1;
16285 h
->plt
.offset
= (bfd_vma
) -1;
16289 eh
= (struct elf32_arm_link_hash_entry
*) h
;
16290 eh
->tlsdesc_got
= (bfd_vma
) -1;
16292 if (h
->got
.refcount
> 0)
16296 int tls_type
= elf32_arm_hash_entry (h
)->tls_type
;
16299 /* Make sure this symbol is output as a dynamic symbol.
16300 Undefined weak syms won't yet be marked as dynamic. */
16301 if (htab
->root
.dynamic_sections_created
&& h
->dynindx
== -1 && !h
->forced_local
16302 && h
->root
.type
== bfd_link_hash_undefweak
)
16304 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
16308 if (htab
->root
.target_os
!= is_symbian
)
16310 s
= htab
->root
.sgot
;
16311 h
->got
.offset
= s
->size
;
16313 if (tls_type
== GOT_UNKNOWN
)
16316 if (tls_type
== GOT_NORMAL
)
16317 /* Non-TLS symbols need one GOT slot. */
16321 if (tls_type
& GOT_TLS_GDESC
)
16323 /* R_ARM_TLS_DESC needs 2 GOT slots. */
16325 = (htab
->root
.sgotplt
->size
16326 - elf32_arm_compute_jump_table_size (htab
));
16327 htab
->root
.sgotplt
->size
+= 8;
16328 h
->got
.offset
= (bfd_vma
) -2;
16329 /* plt.got_offset needs to know there's a TLS_DESC
16330 reloc in the middle of .got.plt. */
16331 htab
->num_tls_desc
++;
16334 if (tls_type
& GOT_TLS_GD
)
16336 /* R_ARM_TLS_GD32 and R_ARM_TLS_GD32_FDPIC need two
16337 consecutive GOT slots. If the symbol is both GD
16338 and GDESC, got.offset may have been
16340 h
->got
.offset
= s
->size
;
16344 if (tls_type
& GOT_TLS_IE
)
16345 /* R_ARM_TLS_IE32/R_ARM_TLS_IE32_FDPIC need one GOT
16350 dyn
= htab
->root
.dynamic_sections_created
;
16353 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn
,
16354 bfd_link_pic (info
),
16356 && (!bfd_link_pic (info
)
16357 || !SYMBOL_REFERENCES_LOCAL (info
, h
)))
16360 if (tls_type
!= GOT_NORMAL
16361 && (bfd_link_dll (info
) || indx
!= 0)
16362 && (ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
16363 || h
->root
.type
!= bfd_link_hash_undefweak
))
16365 if (tls_type
& GOT_TLS_IE
)
16366 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
16368 if (tls_type
& GOT_TLS_GD
)
16369 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
16371 if (tls_type
& GOT_TLS_GDESC
)
16373 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelplt
, 1);
16374 /* GDESC needs a trampoline to jump to. */
16375 htab
->tls_trampoline
= -1;
16378 /* Only GD needs it. GDESC just emits one relocation per
16380 if ((tls_type
& GOT_TLS_GD
) && indx
!= 0)
16381 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
16383 else if (((indx
!= -1) || htab
->fdpic_p
)
16384 && !SYMBOL_REFERENCES_LOCAL (info
, h
))
16386 if (htab
->root
.dynamic_sections_created
)
16387 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
16388 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
16390 else if (h
->type
== STT_GNU_IFUNC
16391 && eh
->plt
.noncall_refcount
== 0)
16392 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
16393 they all resolve dynamically instead. Reserve room for the
16394 GOT entry's R_ARM_IRELATIVE relocation. */
16395 elf32_arm_allocate_irelocs (info
, htab
->root
.srelgot
, 1);
16396 else if (bfd_link_pic (info
)
16397 && !UNDEFWEAK_NO_DYNAMIC_RELOC (info
, h
))
16398 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
16399 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
16400 else if (htab
->fdpic_p
&& tls_type
== GOT_NORMAL
)
16401 /* Reserve room for rofixup for FDPIC executable. */
16402 /* TLS relocs do not need space since they are completely
16404 htab
->srofixup
->size
+= 4;
16408 h
->got
.offset
= (bfd_vma
) -1;
16410 /* FDPIC support. */
16411 if (eh
->fdpic_cnts
.gotofffuncdesc_cnt
> 0)
16413 /* Symbol musn't be exported. */
16414 if (h
->dynindx
!= -1)
16417 /* We only allocate one function descriptor with its associated relocation. */
16418 if (eh
->fdpic_cnts
.funcdesc_offset
== -1)
16420 asection
*s
= htab
->root
.sgot
;
16422 eh
->fdpic_cnts
.funcdesc_offset
= s
->size
;
16424 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16425 if (bfd_link_pic(info
))
16426 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
16428 htab
->srofixup
->size
+= 8;
16432 if (eh
->fdpic_cnts
.gotfuncdesc_cnt
> 0)
16434 asection
*s
= htab
->root
.sgot
;
16436 if (htab
->root
.dynamic_sections_created
&& h
->dynindx
== -1
16437 && !h
->forced_local
)
16438 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
16441 if (h
->dynindx
== -1)
16443 /* We only allocate one function descriptor with its associated relocation. q */
16444 if (eh
->fdpic_cnts
.funcdesc_offset
== -1)
16447 eh
->fdpic_cnts
.funcdesc_offset
= s
->size
;
16449 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16450 if (bfd_link_pic(info
))
16451 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
16453 htab
->srofixup
->size
+= 8;
16457 /* Add one entry into the GOT and a R_ARM_FUNCDESC or
16458 R_ARM_RELATIVE/rofixup relocation on it. */
16459 eh
->fdpic_cnts
.gotfuncdesc_offset
= s
->size
;
16461 if (h
->dynindx
== -1 && !bfd_link_pic(info
))
16462 htab
->srofixup
->size
+= 4;
16464 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
16467 if (eh
->fdpic_cnts
.funcdesc_cnt
> 0)
16469 if (htab
->root
.dynamic_sections_created
&& h
->dynindx
== -1
16470 && !h
->forced_local
)
16471 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
16474 if (h
->dynindx
== -1)
16476 /* We only allocate one function descriptor with its associated relocation. */
16477 if (eh
->fdpic_cnts
.funcdesc_offset
== -1)
16479 asection
*s
= htab
->root
.sgot
;
16481 eh
->fdpic_cnts
.funcdesc_offset
= s
->size
;
16483 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16484 if (bfd_link_pic(info
))
16485 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
16487 htab
->srofixup
->size
+= 8;
16490 if (h
->dynindx
== -1 && !bfd_link_pic(info
))
16492 /* For FDPIC executable we replace R_ARM_RELATIVE with a rofixup. */
16493 htab
->srofixup
->size
+= 4 * eh
->fdpic_cnts
.funcdesc_cnt
;
16497 /* Will need one dynamic reloc per reference. will be either
16498 R_ARM_FUNCDESC or R_ARM_RELATIVE for hidden symbols. */
16499 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
,
16500 eh
->fdpic_cnts
.funcdesc_cnt
);
16504 /* Allocate stubs for exported Thumb functions on v4t. */
16505 if (!htab
->use_blx
&& h
->dynindx
!= -1
16507 && ARM_GET_SYM_BRANCH_TYPE (h
->target_internal
) == ST_BRANCH_TO_THUMB
16508 && ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
)
16510 struct elf_link_hash_entry
* th
;
16511 struct bfd_link_hash_entry
* bh
;
16512 struct elf_link_hash_entry
* myh
;
16516 /* Create a new symbol to regist the real location of the function. */
16517 s
= h
->root
.u
.def
.section
;
16518 sprintf (name
, "__real_%s", h
->root
.root
.string
);
16519 _bfd_generic_link_add_one_symbol (info
, s
->owner
,
16520 name
, BSF_GLOBAL
, s
,
16521 h
->root
.u
.def
.value
,
16522 NULL
, TRUE
, FALSE
, &bh
);
16524 myh
= (struct elf_link_hash_entry
*) bh
;
16525 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
16526 myh
->forced_local
= 1;
16527 ARM_SET_SYM_BRANCH_TYPE (myh
->target_internal
, ST_BRANCH_TO_THUMB
);
16528 eh
->export_glue
= myh
;
16529 th
= record_arm_to_thumb_glue (info
, h
);
16530 /* Point the symbol at the stub. */
16531 h
->type
= ELF_ST_INFO (ELF_ST_BIND (h
->type
), STT_FUNC
);
16532 ARM_SET_SYM_BRANCH_TYPE (h
->target_internal
, ST_BRANCH_TO_ARM
);
16533 h
->root
.u
.def
.section
= th
->root
.u
.def
.section
;
16534 h
->root
.u
.def
.value
= th
->root
.u
.def
.value
& ~1;
16537 if (h
->dyn_relocs
== NULL
)
16540 /* In the shared -Bsymbolic case, discard space allocated for
16541 dynamic pc-relative relocs against symbols which turn out to be
16542 defined in regular objects. For the normal shared case, discard
16543 space for pc-relative relocs that have become local due to symbol
16544 visibility changes. */
16546 if (bfd_link_pic (info
) || htab
->root
.is_relocatable_executable
|| htab
->fdpic_p
)
16548 /* Relocs that use pc_count are PC-relative forms, which will appear
16549 on something like ".long foo - ." or "movw REG, foo - .". We want
16550 calls to protected symbols to resolve directly to the function
16551 rather than going via the plt. If people want function pointer
16552 comparisons to work as expected then they should avoid writing
16553 assembly like ".long foo - .". */
16554 if (SYMBOL_CALLS_LOCAL (info
, h
))
16556 struct elf_dyn_relocs
**pp
;
16558 for (pp
= &h
->dyn_relocs
; (p
= *pp
) != NULL
; )
16560 p
->count
-= p
->pc_count
;
16569 if (htab
->root
.target_os
== is_vxworks
)
16571 struct elf_dyn_relocs
**pp
;
16573 for (pp
= &h
->dyn_relocs
; (p
= *pp
) != NULL
; )
16575 if (strcmp (p
->sec
->output_section
->name
, ".tls_vars") == 0)
16582 /* Also discard relocs on undefined weak syms with non-default
16584 if (h
->dyn_relocs
!= NULL
16585 && h
->root
.type
== bfd_link_hash_undefweak
)
16587 if (ELF_ST_VISIBILITY (h
->other
) != STV_DEFAULT
16588 || UNDEFWEAK_NO_DYNAMIC_RELOC (info
, h
))
16589 h
->dyn_relocs
= NULL
;
16591 /* Make sure undefined weak symbols are output as a dynamic
16593 else if (htab
->root
.dynamic_sections_created
&& h
->dynindx
== -1
16594 && !h
->forced_local
)
16596 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
16601 else if (htab
->root
.is_relocatable_executable
&& h
->dynindx
== -1
16602 && h
->root
.type
== bfd_link_hash_new
)
16604 /* Output absolute symbols so that we can create relocations
16605 against them. For normal symbols we output a relocation
16606 against the section that contains them. */
16607 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
16614 /* For the non-shared case, discard space for relocs against
16615 symbols which turn out to need copy relocs or are not
16618 if (!h
->non_got_ref
16619 && ((h
->def_dynamic
16620 && !h
->def_regular
)
16621 || (htab
->root
.dynamic_sections_created
16622 && (h
->root
.type
== bfd_link_hash_undefweak
16623 || h
->root
.type
== bfd_link_hash_undefined
))))
16625 /* Make sure this symbol is output as a dynamic symbol.
16626 Undefined weak syms won't yet be marked as dynamic. */
16627 if (h
->dynindx
== -1 && !h
->forced_local
16628 && h
->root
.type
== bfd_link_hash_undefweak
)
16630 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
16634 /* If that succeeded, we know we'll be keeping all the
16636 if (h
->dynindx
!= -1)
16640 h
->dyn_relocs
= NULL
;
16645 /* Finally, allocate space. */
16646 for (p
= h
->dyn_relocs
; p
!= NULL
; p
= p
->next
)
16648 asection
*sreloc
= elf_section_data (p
->sec
)->sreloc
;
16650 if (h
->type
== STT_GNU_IFUNC
16651 && eh
->plt
.noncall_refcount
== 0
16652 && SYMBOL_REFERENCES_LOCAL (info
, h
))
16653 elf32_arm_allocate_irelocs (info
, sreloc
, p
->count
);
16654 else if (h
->dynindx
!= -1 && (!bfd_link_pic(info
) || !info
->symbolic
|| !h
->def_regular
))
16655 elf32_arm_allocate_dynrelocs (info
, sreloc
, p
->count
);
16656 else if (htab
->fdpic_p
&& !bfd_link_pic(info
))
16657 htab
->srofixup
->size
+= 4 * p
->count
;
16659 elf32_arm_allocate_dynrelocs (info
, sreloc
, p
->count
);
16666 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info
*info
,
16669 struct elf32_arm_link_hash_table
*globals
;
16671 globals
= elf32_arm_hash_table (info
);
16672 if (globals
== NULL
)
16675 globals
->byteswap_code
= byteswap_code
;
16678 /* Set the sizes of the dynamic sections. */
16681 elf32_arm_size_dynamic_sections (bfd
* output_bfd ATTRIBUTE_UNUSED
,
16682 struct bfd_link_info
* info
)
16687 bfd_boolean relocs
;
16689 struct elf32_arm_link_hash_table
*htab
;
16691 htab
= elf32_arm_hash_table (info
);
16695 dynobj
= elf_hash_table (info
)->dynobj
;
16696 BFD_ASSERT (dynobj
!= NULL
);
16697 check_use_blx (htab
);
16699 if (elf_hash_table (info
)->dynamic_sections_created
)
16701 /* Set the contents of the .interp section to the interpreter. */
16702 if (bfd_link_executable (info
) && !info
->nointerp
)
16704 s
= bfd_get_linker_section (dynobj
, ".interp");
16705 BFD_ASSERT (s
!= NULL
);
16706 s
->size
= sizeof ELF_DYNAMIC_INTERPRETER
;
16707 s
->contents
= (unsigned char *) ELF_DYNAMIC_INTERPRETER
;
16711 /* Set up .got offsets for local syms, and space for local dynamic
16713 for (ibfd
= info
->input_bfds
; ibfd
!= NULL
; ibfd
= ibfd
->link
.next
)
16715 bfd_signed_vma
*local_got
;
16716 bfd_signed_vma
*end_local_got
;
16717 struct arm_local_iplt_info
**local_iplt_ptr
, *local_iplt
;
16718 char *local_tls_type
;
16719 bfd_vma
*local_tlsdesc_gotent
;
16720 bfd_size_type locsymcount
;
16721 Elf_Internal_Shdr
*symtab_hdr
;
16723 unsigned int symndx
;
16724 struct fdpic_local
*local_fdpic_cnts
;
16726 if (! is_arm_elf (ibfd
))
16729 for (s
= ibfd
->sections
; s
!= NULL
; s
= s
->next
)
16731 struct elf_dyn_relocs
*p
;
16733 for (p
= (struct elf_dyn_relocs
*)
16734 elf_section_data (s
)->local_dynrel
; p
!= NULL
; p
= p
->next
)
16736 if (!bfd_is_abs_section (p
->sec
)
16737 && bfd_is_abs_section (p
->sec
->output_section
))
16739 /* Input section has been discarded, either because
16740 it is a copy of a linkonce section or due to
16741 linker script /DISCARD/, so we'll be discarding
16744 else if (htab
->root
.target_os
== is_vxworks
16745 && strcmp (p
->sec
->output_section
->name
,
16748 /* Relocations in vxworks .tls_vars sections are
16749 handled specially by the loader. */
16751 else if (p
->count
!= 0)
16753 srel
= elf_section_data (p
->sec
)->sreloc
;
16754 if (htab
->fdpic_p
&& !bfd_link_pic(info
))
16755 htab
->srofixup
->size
+= 4 * p
->count
;
16757 elf32_arm_allocate_dynrelocs (info
, srel
, p
->count
);
16758 if ((p
->sec
->output_section
->flags
& SEC_READONLY
) != 0)
16759 info
->flags
|= DF_TEXTREL
;
16764 local_got
= elf_local_got_refcounts (ibfd
);
16768 symtab_hdr
= & elf_symtab_hdr (ibfd
);
16769 locsymcount
= symtab_hdr
->sh_info
;
16770 end_local_got
= local_got
+ locsymcount
;
16771 local_iplt_ptr
= elf32_arm_local_iplt (ibfd
);
16772 local_tls_type
= elf32_arm_local_got_tls_type (ibfd
);
16773 local_tlsdesc_gotent
= elf32_arm_local_tlsdesc_gotent (ibfd
);
16774 local_fdpic_cnts
= elf32_arm_local_fdpic_cnts (ibfd
);
16776 s
= htab
->root
.sgot
;
16777 srel
= htab
->root
.srelgot
;
16778 for (; local_got
< end_local_got
;
16779 ++local_got
, ++local_iplt_ptr
, ++local_tls_type
,
16780 ++local_tlsdesc_gotent
, ++symndx
, ++local_fdpic_cnts
)
16782 *local_tlsdesc_gotent
= (bfd_vma
) -1;
16783 local_iplt
= *local_iplt_ptr
;
16785 /* FDPIC support. */
16786 if (local_fdpic_cnts
->gotofffuncdesc_cnt
> 0)
16788 if (local_fdpic_cnts
->funcdesc_offset
== -1)
16790 local_fdpic_cnts
->funcdesc_offset
= s
->size
;
16793 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16794 if (bfd_link_pic(info
))
16795 elf32_arm_allocate_dynrelocs (info
, srel
, 1);
16797 htab
->srofixup
->size
+= 8;
16801 if (local_fdpic_cnts
->funcdesc_cnt
> 0)
16803 if (local_fdpic_cnts
->funcdesc_offset
== -1)
16805 local_fdpic_cnts
->funcdesc_offset
= s
->size
;
16808 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16809 if (bfd_link_pic(info
))
16810 elf32_arm_allocate_dynrelocs (info
, srel
, 1);
16812 htab
->srofixup
->size
+= 8;
16815 /* We will add n R_ARM_RELATIVE relocations or n rofixups. */
16816 if (bfd_link_pic(info
))
16817 elf32_arm_allocate_dynrelocs (info
, srel
, local_fdpic_cnts
->funcdesc_cnt
);
16819 htab
->srofixup
->size
+= 4 * local_fdpic_cnts
->funcdesc_cnt
;
16822 if (local_iplt
!= NULL
)
16824 struct elf_dyn_relocs
*p
;
16826 if (local_iplt
->root
.refcount
> 0)
16828 elf32_arm_allocate_plt_entry (info
, TRUE
,
16831 if (local_iplt
->arm
.noncall_refcount
== 0)
16832 /* All references to the PLT are calls, so all
16833 non-call references can resolve directly to the
16834 run-time target. This means that the .got entry
16835 would be the same as the .igot.plt entry, so there's
16836 no point creating both. */
16841 BFD_ASSERT (local_iplt
->arm
.noncall_refcount
== 0);
16842 local_iplt
->root
.offset
= (bfd_vma
) -1;
16845 for (p
= local_iplt
->dyn_relocs
; p
!= NULL
; p
= p
->next
)
16849 psrel
= elf_section_data (p
->sec
)->sreloc
;
16850 if (local_iplt
->arm
.noncall_refcount
== 0)
16851 elf32_arm_allocate_irelocs (info
, psrel
, p
->count
);
16853 elf32_arm_allocate_dynrelocs (info
, psrel
, p
->count
);
16856 if (*local_got
> 0)
16858 Elf_Internal_Sym
*isym
;
16860 *local_got
= s
->size
;
16861 if (*local_tls_type
& GOT_TLS_GD
)
16862 /* TLS_GD relocs need an 8-byte structure in the GOT. */
16864 if (*local_tls_type
& GOT_TLS_GDESC
)
16866 *local_tlsdesc_gotent
= htab
->root
.sgotplt
->size
16867 - elf32_arm_compute_jump_table_size (htab
);
16868 htab
->root
.sgotplt
->size
+= 8;
16869 *local_got
= (bfd_vma
) -2;
16870 /* plt.got_offset needs to know there's a TLS_DESC
16871 reloc in the middle of .got.plt. */
16872 htab
->num_tls_desc
++;
16874 if (*local_tls_type
& GOT_TLS_IE
)
16877 if (*local_tls_type
& GOT_NORMAL
)
16879 /* If the symbol is both GD and GDESC, *local_got
16880 may have been overwritten. */
16881 *local_got
= s
->size
;
16885 isym
= bfd_sym_from_r_symndx (&htab
->sym_cache
, ibfd
, symndx
);
16889 /* If all references to an STT_GNU_IFUNC PLT are calls,
16890 then all non-call references, including this GOT entry,
16891 resolve directly to the run-time target. */
16892 if (ELF32_ST_TYPE (isym
->st_info
) == STT_GNU_IFUNC
16893 && (local_iplt
== NULL
16894 || local_iplt
->arm
.noncall_refcount
== 0))
16895 elf32_arm_allocate_irelocs (info
, srel
, 1);
16896 else if (bfd_link_pic (info
) || output_bfd
->flags
& DYNAMIC
|| htab
->fdpic_p
)
16898 if ((bfd_link_pic (info
) && !(*local_tls_type
& GOT_TLS_GDESC
)))
16899 elf32_arm_allocate_dynrelocs (info
, srel
, 1);
16900 else if (htab
->fdpic_p
&& *local_tls_type
& GOT_NORMAL
)
16901 htab
->srofixup
->size
+= 4;
16903 if ((bfd_link_pic (info
) || htab
->fdpic_p
)
16904 && *local_tls_type
& GOT_TLS_GDESC
)
16906 elf32_arm_allocate_dynrelocs (info
,
16907 htab
->root
.srelplt
, 1);
16908 htab
->tls_trampoline
= -1;
16913 *local_got
= (bfd_vma
) -1;
16917 if (htab
->tls_ldm_got
.refcount
> 0)
16919 /* Allocate two GOT entries and one dynamic relocation (if necessary)
16920 for R_ARM_TLS_LDM32/R_ARM_TLS_LDM32_FDPIC relocations. */
16921 htab
->tls_ldm_got
.offset
= htab
->root
.sgot
->size
;
16922 htab
->root
.sgot
->size
+= 8;
16923 if (bfd_link_pic (info
))
16924 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
16927 htab
->tls_ldm_got
.offset
= -1;
16929 /* At the very end of the .rofixup section is a pointer to the GOT,
16930 reserve space for it. */
16931 if (htab
->fdpic_p
&& htab
->srofixup
!= NULL
)
16932 htab
->srofixup
->size
+= 4;
16934 /* Allocate global sym .plt and .got entries, and space for global
16935 sym dynamic relocs. */
16936 elf_link_hash_traverse (& htab
->root
, allocate_dynrelocs_for_symbol
, info
);
16938 /* Here we rummage through the found bfds to collect glue information. */
16939 for (ibfd
= info
->input_bfds
; ibfd
!= NULL
; ibfd
= ibfd
->link
.next
)
16941 if (! is_arm_elf (ibfd
))
16944 /* Initialise mapping tables for code/data. */
16945 bfd_elf32_arm_init_maps (ibfd
);
16947 if (!bfd_elf32_arm_process_before_allocation (ibfd
, info
)
16948 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd
, info
)
16949 || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd
, info
))
16950 _bfd_error_handler (_("errors encountered processing file %pB"), ibfd
);
16953 /* Allocate space for the glue sections now that we've sized them. */
16954 bfd_elf32_arm_allocate_interworking_sections (info
);
16956 /* For every jump slot reserved in the sgotplt, reloc_count is
16957 incremented. However, when we reserve space for TLS descriptors,
16958 it's not incremented, so in order to compute the space reserved
16959 for them, it suffices to multiply the reloc count by the jump
16961 if (htab
->root
.srelplt
)
16962 htab
->sgotplt_jump_table_size
= elf32_arm_compute_jump_table_size(htab
);
16964 if (htab
->tls_trampoline
)
16966 if (htab
->root
.splt
->size
== 0)
16967 htab
->root
.splt
->size
+= htab
->plt_header_size
;
16969 htab
->tls_trampoline
= htab
->root
.splt
->size
;
16970 htab
->root
.splt
->size
+= htab
->plt_entry_size
;
16972 /* If we're not using lazy TLS relocations, don't generate the
16973 PLT and GOT entries they require. */
16974 if (!(info
->flags
& DF_BIND_NOW
))
16976 htab
->dt_tlsdesc_got
= htab
->root
.sgot
->size
;
16977 htab
->root
.sgot
->size
+= 4;
16979 htab
->dt_tlsdesc_plt
= htab
->root
.splt
->size
;
16980 htab
->root
.splt
->size
+= 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline
);
16984 /* The check_relocs and adjust_dynamic_symbol entry points have
16985 determined the sizes of the various dynamic sections. Allocate
16986 memory for them. */
16989 for (s
= dynobj
->sections
; s
!= NULL
; s
= s
->next
)
16993 if ((s
->flags
& SEC_LINKER_CREATED
) == 0)
16996 /* It's OK to base decisions on the section name, because none
16997 of the dynobj section names depend upon the input files. */
16998 name
= bfd_section_name (s
);
17000 if (s
== htab
->root
.splt
)
17002 /* Remember whether there is a PLT. */
17003 plt
= s
->size
!= 0;
17005 else if (CONST_STRNEQ (name
, ".rel"))
17009 /* Remember whether there are any reloc sections other
17010 than .rel(a).plt and .rela.plt.unloaded. */
17011 if (s
!= htab
->root
.srelplt
&& s
!= htab
->srelplt2
)
17014 /* We use the reloc_count field as a counter if we need
17015 to copy relocs into the output file. */
17016 s
->reloc_count
= 0;
17019 else if (s
!= htab
->root
.sgot
17020 && s
!= htab
->root
.sgotplt
17021 && s
!= htab
->root
.iplt
17022 && s
!= htab
->root
.igotplt
17023 && s
!= htab
->root
.sdynbss
17024 && s
!= htab
->root
.sdynrelro
17025 && s
!= htab
->srofixup
)
17027 /* It's not one of our sections, so don't allocate space. */
17033 /* If we don't need this section, strip it from the
17034 output file. This is mostly to handle .rel(a).bss and
17035 .rel(a).plt. We must create both sections in
17036 create_dynamic_sections, because they must be created
17037 before the linker maps input sections to output
17038 sections. The linker does that before
17039 adjust_dynamic_symbol is called, and it is that
17040 function which decides whether anything needs to go
17041 into these sections. */
17042 s
->flags
|= SEC_EXCLUDE
;
17046 if ((s
->flags
& SEC_HAS_CONTENTS
) == 0)
17049 /* Allocate memory for the section contents. */
17050 s
->contents
= (unsigned char *) bfd_zalloc (dynobj
, s
->size
);
17051 if (s
->contents
== NULL
)
17055 if (elf_hash_table (info
)->dynamic_sections_created
)
17057 /* Add some entries to the .dynamic section. We fill in the
17058 values later, in elf32_arm_finish_dynamic_sections, but we
17059 must add the entries now so that we get the correct size for
17060 the .dynamic section. The DT_DEBUG entry is filled in by the
17061 dynamic linker and used by the debugger. */
17062 #define add_dynamic_entry(TAG, VAL) \
17063 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
17065 if (bfd_link_executable (info
))
17067 if (!add_dynamic_entry (DT_DEBUG
, 0))
17073 if ( !add_dynamic_entry (DT_PLTGOT
, 0)
17074 || !add_dynamic_entry (DT_PLTRELSZ
, 0)
17075 || !add_dynamic_entry (DT_PLTREL
,
17076 htab
->use_rel
? DT_REL
: DT_RELA
)
17077 || !add_dynamic_entry (DT_JMPREL
, 0))
17080 if (htab
->dt_tlsdesc_plt
17081 && (!add_dynamic_entry (DT_TLSDESC_PLT
,0)
17082 || !add_dynamic_entry (DT_TLSDESC_GOT
,0)))
17090 if (!add_dynamic_entry (DT_REL
, 0)
17091 || !add_dynamic_entry (DT_RELSZ
, 0)
17092 || !add_dynamic_entry (DT_RELENT
, RELOC_SIZE (htab
)))
17097 if (!add_dynamic_entry (DT_RELA
, 0)
17098 || !add_dynamic_entry (DT_RELASZ
, 0)
17099 || !add_dynamic_entry (DT_RELAENT
, RELOC_SIZE (htab
)))
17104 /* If any dynamic relocs apply to a read-only section,
17105 then we need a DT_TEXTREL entry. */
17106 if ((info
->flags
& DF_TEXTREL
) == 0)
17107 elf_link_hash_traverse (&htab
->root
,
17108 _bfd_elf_maybe_set_textrel
, info
);
17110 if ((info
->flags
& DF_TEXTREL
) != 0)
17112 if (!add_dynamic_entry (DT_TEXTREL
, 0))
17115 if (htab
->root
.target_os
== is_vxworks
17116 && !elf_vxworks_add_dynamic_entries (output_bfd
, info
))
17119 #undef add_dynamic_entry
17124 /* Size sections even though they're not dynamic. We use it to setup
17125 _TLS_MODULE_BASE_, if needed. */
17128 elf32_arm_always_size_sections (bfd
*output_bfd
,
17129 struct bfd_link_info
*info
)
17132 struct elf32_arm_link_hash_table
*htab
;
17134 htab
= elf32_arm_hash_table (info
);
17136 if (bfd_link_relocatable (info
))
17139 tls_sec
= elf_hash_table (info
)->tls_sec
;
17143 struct elf_link_hash_entry
*tlsbase
;
17145 tlsbase
= elf_link_hash_lookup
17146 (elf_hash_table (info
), "_TLS_MODULE_BASE_", TRUE
, TRUE
, FALSE
);
17150 struct bfd_link_hash_entry
*bh
= NULL
;
17151 const struct elf_backend_data
*bed
17152 = get_elf_backend_data (output_bfd
);
17154 if (!(_bfd_generic_link_add_one_symbol
17155 (info
, output_bfd
, "_TLS_MODULE_BASE_", BSF_LOCAL
,
17156 tls_sec
, 0, NULL
, FALSE
,
17157 bed
->collect
, &bh
)))
17160 tlsbase
->type
= STT_TLS
;
17161 tlsbase
= (struct elf_link_hash_entry
*)bh
;
17162 tlsbase
->def_regular
= 1;
17163 tlsbase
->other
= STV_HIDDEN
;
17164 (*bed
->elf_backend_hide_symbol
) (info
, tlsbase
, TRUE
);
17168 if (htab
->fdpic_p
&& !bfd_link_relocatable (info
)
17169 && !bfd_elf_stack_segment_size (output_bfd
, info
,
17170 "__stacksize", DEFAULT_STACK_SIZE
))
17176 /* Finish up dynamic symbol handling. We set the contents of various
17177 dynamic sections here. */
17180 elf32_arm_finish_dynamic_symbol (bfd
* output_bfd
,
17181 struct bfd_link_info
* info
,
17182 struct elf_link_hash_entry
* h
,
17183 Elf_Internal_Sym
* sym
)
17185 struct elf32_arm_link_hash_table
*htab
;
17186 struct elf32_arm_link_hash_entry
*eh
;
17188 htab
= elf32_arm_hash_table (info
);
17192 eh
= (struct elf32_arm_link_hash_entry
*) h
;
17194 if (h
->plt
.offset
!= (bfd_vma
) -1)
17198 BFD_ASSERT (h
->dynindx
!= -1);
17199 if (! elf32_arm_populate_plt_entry (output_bfd
, info
, &h
->plt
, &eh
->plt
,
17204 if (!h
->def_regular
)
17206 /* Mark the symbol as undefined, rather than as defined in
17207 the .plt section. */
17208 sym
->st_shndx
= SHN_UNDEF
;
17209 /* If the symbol is weak we need to clear the value.
17210 Otherwise, the PLT entry would provide a definition for
17211 the symbol even if the symbol wasn't defined anywhere,
17212 and so the symbol would never be NULL. Leave the value if
17213 there were any relocations where pointer equality matters
17214 (this is a clue for the dynamic linker, to make function
17215 pointer comparisons work between an application and shared
17217 if (!h
->ref_regular_nonweak
|| !h
->pointer_equality_needed
)
17220 else if (eh
->is_iplt
&& eh
->plt
.noncall_refcount
!= 0)
17222 /* At least one non-call relocation references this .iplt entry,
17223 so the .iplt entry is the function's canonical address. */
17224 sym
->st_info
= ELF_ST_INFO (ELF_ST_BIND (sym
->st_info
), STT_FUNC
);
17225 ARM_SET_SYM_BRANCH_TYPE (sym
->st_target_internal
, ST_BRANCH_TO_ARM
);
17226 sym
->st_shndx
= (_bfd_elf_section_from_bfd_section
17227 (output_bfd
, htab
->root
.iplt
->output_section
));
17228 sym
->st_value
= (h
->plt
.offset
17229 + htab
->root
.iplt
->output_section
->vma
17230 + htab
->root
.iplt
->output_offset
);
17237 Elf_Internal_Rela rel
;
17239 /* This symbol needs a copy reloc. Set it up. */
17240 BFD_ASSERT (h
->dynindx
!= -1
17241 && (h
->root
.type
== bfd_link_hash_defined
17242 || h
->root
.type
== bfd_link_hash_defweak
));
17245 rel
.r_offset
= (h
->root
.u
.def
.value
17246 + h
->root
.u
.def
.section
->output_section
->vma
17247 + h
->root
.u
.def
.section
->output_offset
);
17248 rel
.r_info
= ELF32_R_INFO (h
->dynindx
, R_ARM_COPY
);
17249 if (h
->root
.u
.def
.section
== htab
->root
.sdynrelro
)
17250 s
= htab
->root
.sreldynrelro
;
17252 s
= htab
->root
.srelbss
;
17253 elf32_arm_add_dynreloc (output_bfd
, info
, s
, &rel
);
17256 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
17257 and for FDPIC, the _GLOBAL_OFFSET_TABLE_ symbol is not absolute:
17258 it is relative to the ".got" section. */
17259 if (h
== htab
->root
.hdynamic
17261 && htab
->root
.target_os
!= is_vxworks
17262 && h
== htab
->root
.hgot
))
17263 sym
->st_shndx
= SHN_ABS
;
17269 arm_put_trampoline (struct elf32_arm_link_hash_table
*htab
, bfd
*output_bfd
,
17271 const unsigned long *template, unsigned count
)
17275 for (ix
= 0; ix
!= count
; ix
++)
17277 unsigned long insn
= template[ix
];
17279 /* Emit mov pc,rx if bx is not permitted. */
17280 if (htab
->fix_v4bx
== 1 && (insn
& 0x0ffffff0) == 0x012fff10)
17281 insn
= (insn
& 0xf000000f) | 0x01a0f000;
17282 put_arm_insn (htab
, output_bfd
, insn
, (char *)contents
+ ix
*4);
17286 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
17287 other variants, NaCl needs this entry in a static executable's
17288 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
17289 zero. For .iplt really only the last bundle is useful, and .iplt
17290 could have a shorter first entry, with each individual PLT entry's
17291 relative branch calculated differently so it targets the last
17292 bundle instead of the instruction before it (labelled .Lplt_tail
17293 above). But it's simpler to keep the size and layout of PLT0
17294 consistent with the dynamic case, at the cost of some dead code at
17295 the start of .iplt and the one dead store to the stack at the start
17298 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table
*htab
, bfd
*output_bfd
,
17299 asection
*plt
, bfd_vma got_displacement
)
17303 put_arm_insn (htab
, output_bfd
,
17304 elf32_arm_nacl_plt0_entry
[0]
17305 | arm_movw_immediate (got_displacement
),
17306 plt
->contents
+ 0);
17307 put_arm_insn (htab
, output_bfd
,
17308 elf32_arm_nacl_plt0_entry
[1]
17309 | arm_movt_immediate (got_displacement
),
17310 plt
->contents
+ 4);
17312 for (i
= 2; i
< ARRAY_SIZE (elf32_arm_nacl_plt0_entry
); ++i
)
17313 put_arm_insn (htab
, output_bfd
,
17314 elf32_arm_nacl_plt0_entry
[i
],
17315 plt
->contents
+ (i
* 4));
17318 /* Finish up the dynamic sections. */
17321 elf32_arm_finish_dynamic_sections (bfd
* output_bfd
, struct bfd_link_info
* info
)
17326 struct elf32_arm_link_hash_table
*htab
;
17328 htab
= elf32_arm_hash_table (info
);
17332 dynobj
= elf_hash_table (info
)->dynobj
;
17334 sgot
= htab
->root
.sgotplt
;
17335 /* A broken linker script might have discarded the dynamic sections.
17336 Catch this here so that we do not seg-fault later on. */
17337 if (sgot
!= NULL
&& bfd_is_abs_section (sgot
->output_section
))
17339 sdyn
= bfd_get_linker_section (dynobj
, ".dynamic");
17341 if (elf_hash_table (info
)->dynamic_sections_created
)
17344 Elf32_External_Dyn
*dyncon
, *dynconend
;
17346 splt
= htab
->root
.splt
;
17347 BFD_ASSERT (splt
!= NULL
&& sdyn
!= NULL
);
17348 BFD_ASSERT (htab
->root
.target_os
== is_symbian
|| sgot
!= NULL
);
17350 dyncon
= (Elf32_External_Dyn
*) sdyn
->contents
;
17351 dynconend
= (Elf32_External_Dyn
*) (sdyn
->contents
+ sdyn
->size
);
17353 for (; dyncon
< dynconend
; dyncon
++)
17355 Elf_Internal_Dyn dyn
;
17359 bfd_elf32_swap_dyn_in (dynobj
, dyncon
, &dyn
);
17366 if (htab
->root
.target_os
== is_vxworks
17367 && elf_vxworks_finish_dynamic_entry (output_bfd
, &dyn
))
17368 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
17373 goto get_vma_if_bpabi
;
17376 goto get_vma_if_bpabi
;
17379 goto get_vma_if_bpabi
;
17381 name
= ".gnu.version";
17382 goto get_vma_if_bpabi
;
17384 name
= ".gnu.version_d";
17385 goto get_vma_if_bpabi
;
17387 name
= ".gnu.version_r";
17388 goto get_vma_if_bpabi
;
17391 name
= (htab
->root
.target_os
== is_symbian
17392 ? ".got" : ".got.plt");
17395 name
= RELOC_SECTION (htab
, ".plt");
17397 s
= bfd_get_linker_section (dynobj
, name
);
17401 (_("could not find section %s"), name
);
17402 bfd_set_error (bfd_error_invalid_operation
);
17405 if (htab
->root
.target_os
!= is_symbian
)
17406 dyn
.d_un
.d_ptr
= s
->output_section
->vma
+ s
->output_offset
;
17408 /* In the BPABI, tags in the PT_DYNAMIC section point
17409 at the file offset, not the memory address, for the
17410 convenience of the post linker. */
17411 dyn
.d_un
.d_ptr
= s
->output_section
->filepos
+ s
->output_offset
;
17412 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
17416 if (htab
->root
.target_os
== is_symbian
)
17421 s
= htab
->root
.srelplt
;
17422 BFD_ASSERT (s
!= NULL
);
17423 dyn
.d_un
.d_val
= s
->size
;
17424 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
17431 /* In the BPABI, the DT_REL tag must point at the file
17432 offset, not the VMA, of the first relocation
17433 section. So, we use code similar to that in
17434 elflink.c, but do not check for SHF_ALLOC on the
17435 relocation section, since relocation sections are
17436 never allocated under the BPABI. PLT relocs are also
17438 if (htab
->root
.target_os
== is_symbian
)
17441 type
= ((dyn
.d_tag
== DT_REL
|| dyn
.d_tag
== DT_RELSZ
)
17442 ? SHT_REL
: SHT_RELA
);
17443 dyn
.d_un
.d_val
= 0;
17444 for (i
= 1; i
< elf_numsections (output_bfd
); i
++)
17446 Elf_Internal_Shdr
*hdr
17447 = elf_elfsections (output_bfd
)[i
];
17448 if (hdr
->sh_type
== type
)
17450 if (dyn
.d_tag
== DT_RELSZ
17451 || dyn
.d_tag
== DT_RELASZ
)
17452 dyn
.d_un
.d_val
+= hdr
->sh_size
;
17453 else if ((ufile_ptr
) hdr
->sh_offset
17454 <= dyn
.d_un
.d_val
- 1)
17455 dyn
.d_un
.d_val
= hdr
->sh_offset
;
17458 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
17462 case DT_TLSDESC_PLT
:
17463 s
= htab
->root
.splt
;
17464 dyn
.d_un
.d_ptr
= (s
->output_section
->vma
+ s
->output_offset
17465 + htab
->dt_tlsdesc_plt
);
17466 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
17469 case DT_TLSDESC_GOT
:
17470 s
= htab
->root
.sgot
;
17471 dyn
.d_un
.d_ptr
= (s
->output_section
->vma
+ s
->output_offset
17472 + htab
->dt_tlsdesc_got
);
17473 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
17476 /* Set the bottom bit of DT_INIT/FINI if the
17477 corresponding function is Thumb. */
17479 name
= info
->init_function
;
17482 name
= info
->fini_function
;
17484 /* If it wasn't set by elf_bfd_final_link
17485 then there is nothing to adjust. */
17486 if (dyn
.d_un
.d_val
!= 0)
17488 struct elf_link_hash_entry
* eh
;
17490 eh
= elf_link_hash_lookup (elf_hash_table (info
), name
,
17491 FALSE
, FALSE
, TRUE
);
17493 && ARM_GET_SYM_BRANCH_TYPE (eh
->target_internal
)
17494 == ST_BRANCH_TO_THUMB
)
17496 dyn
.d_un
.d_val
|= 1;
17497 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
17504 /* Fill in the first entry in the procedure linkage table. */
17505 if (splt
->size
> 0 && htab
->plt_header_size
)
17507 const bfd_vma
*plt0_entry
;
17508 bfd_vma got_address
, plt_address
, got_displacement
;
17510 /* Calculate the addresses of the GOT and PLT. */
17511 got_address
= sgot
->output_section
->vma
+ sgot
->output_offset
;
17512 plt_address
= splt
->output_section
->vma
+ splt
->output_offset
;
17514 if (htab
->root
.target_os
== is_vxworks
)
17516 /* The VxWorks GOT is relocated by the dynamic linker.
17517 Therefore, we must emit relocations rather than simply
17518 computing the values now. */
17519 Elf_Internal_Rela rel
;
17521 plt0_entry
= elf32_arm_vxworks_exec_plt0_entry
;
17522 put_arm_insn (htab
, output_bfd
, plt0_entry
[0],
17523 splt
->contents
+ 0);
17524 put_arm_insn (htab
, output_bfd
, plt0_entry
[1],
17525 splt
->contents
+ 4);
17526 put_arm_insn (htab
, output_bfd
, plt0_entry
[2],
17527 splt
->contents
+ 8);
17528 bfd_put_32 (output_bfd
, got_address
, splt
->contents
+ 12);
17530 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
17531 rel
.r_offset
= plt_address
+ 12;
17532 rel
.r_info
= ELF32_R_INFO (htab
->root
.hgot
->indx
, R_ARM_ABS32
);
17534 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
,
17535 htab
->srelplt2
->contents
);
17537 else if (htab
->root
.target_os
== is_nacl
)
17538 arm_nacl_put_plt0 (htab
, output_bfd
, splt
,
17539 got_address
+ 8 - (plt_address
+ 16));
17540 else if (using_thumb_only (htab
))
17542 got_displacement
= got_address
- (plt_address
+ 12);
17544 plt0_entry
= elf32_thumb2_plt0_entry
;
17545 put_arm_insn (htab
, output_bfd
, plt0_entry
[0],
17546 splt
->contents
+ 0);
17547 put_arm_insn (htab
, output_bfd
, plt0_entry
[1],
17548 splt
->contents
+ 4);
17549 put_arm_insn (htab
, output_bfd
, plt0_entry
[2],
17550 splt
->contents
+ 8);
17552 bfd_put_32 (output_bfd
, got_displacement
, splt
->contents
+ 12);
17556 got_displacement
= got_address
- (plt_address
+ 16);
17558 plt0_entry
= elf32_arm_plt0_entry
;
17559 put_arm_insn (htab
, output_bfd
, plt0_entry
[0],
17560 splt
->contents
+ 0);
17561 put_arm_insn (htab
, output_bfd
, plt0_entry
[1],
17562 splt
->contents
+ 4);
17563 put_arm_insn (htab
, output_bfd
, plt0_entry
[2],
17564 splt
->contents
+ 8);
17565 put_arm_insn (htab
, output_bfd
, plt0_entry
[3],
17566 splt
->contents
+ 12);
17568 #ifdef FOUR_WORD_PLT
17569 /* The displacement value goes in the otherwise-unused
17570 last word of the second entry. */
17571 bfd_put_32 (output_bfd
, got_displacement
, splt
->contents
+ 28);
17573 bfd_put_32 (output_bfd
, got_displacement
, splt
->contents
+ 16);
17578 /* UnixWare sets the entsize of .plt to 4, although that doesn't
17579 really seem like the right value. */
17580 if (splt
->output_section
->owner
== output_bfd
)
17581 elf_section_data (splt
->output_section
)->this_hdr
.sh_entsize
= 4;
17583 if (htab
->dt_tlsdesc_plt
)
17585 bfd_vma got_address
17586 = sgot
->output_section
->vma
+ sgot
->output_offset
;
17587 bfd_vma gotplt_address
= (htab
->root
.sgot
->output_section
->vma
17588 + htab
->root
.sgot
->output_offset
);
17589 bfd_vma plt_address
17590 = splt
->output_section
->vma
+ splt
->output_offset
;
17592 arm_put_trampoline (htab
, output_bfd
,
17593 splt
->contents
+ htab
->dt_tlsdesc_plt
,
17594 dl_tlsdesc_lazy_trampoline
, 6);
17596 bfd_put_32 (output_bfd
,
17597 gotplt_address
+ htab
->dt_tlsdesc_got
17598 - (plt_address
+ htab
->dt_tlsdesc_plt
)
17599 - dl_tlsdesc_lazy_trampoline
[6],
17600 splt
->contents
+ htab
->dt_tlsdesc_plt
+ 24);
17601 bfd_put_32 (output_bfd
,
17602 got_address
- (plt_address
+ htab
->dt_tlsdesc_plt
)
17603 - dl_tlsdesc_lazy_trampoline
[7],
17604 splt
->contents
+ htab
->dt_tlsdesc_plt
+ 24 + 4);
17607 if (htab
->tls_trampoline
)
17609 arm_put_trampoline (htab
, output_bfd
,
17610 splt
->contents
+ htab
->tls_trampoline
,
17611 tls_trampoline
, 3);
17612 #ifdef FOUR_WORD_PLT
17613 bfd_put_32 (output_bfd
, 0x00000000,
17614 splt
->contents
+ htab
->tls_trampoline
+ 12);
17618 if (htab
->root
.target_os
== is_vxworks
17619 && !bfd_link_pic (info
)
17620 && htab
->root
.splt
->size
> 0)
17622 /* Correct the .rel(a).plt.unloaded relocations. They will have
17623 incorrect symbol indexes. */
17627 num_plts
= ((htab
->root
.splt
->size
- htab
->plt_header_size
)
17628 / htab
->plt_entry_size
);
17629 p
= htab
->srelplt2
->contents
+ RELOC_SIZE (htab
);
17631 for (; num_plts
; num_plts
--)
17633 Elf_Internal_Rela rel
;
17635 SWAP_RELOC_IN (htab
) (output_bfd
, p
, &rel
);
17636 rel
.r_info
= ELF32_R_INFO (htab
->root
.hgot
->indx
, R_ARM_ABS32
);
17637 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, p
);
17638 p
+= RELOC_SIZE (htab
);
17640 SWAP_RELOC_IN (htab
) (output_bfd
, p
, &rel
);
17641 rel
.r_info
= ELF32_R_INFO (htab
->root
.hplt
->indx
, R_ARM_ABS32
);
17642 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, p
);
17643 p
+= RELOC_SIZE (htab
);
17648 if (htab
->root
.target_os
== is_nacl
17649 && htab
->root
.iplt
!= NULL
17650 && htab
->root
.iplt
->size
> 0)
17651 /* NaCl uses a special first entry in .iplt too. */
17652 arm_nacl_put_plt0 (htab
, output_bfd
, htab
->root
.iplt
, 0);
17654 /* Fill in the first three entries in the global offset table. */
17657 if (sgot
->size
> 0)
17660 bfd_put_32 (output_bfd
, (bfd_vma
) 0, sgot
->contents
);
17662 bfd_put_32 (output_bfd
,
17663 sdyn
->output_section
->vma
+ sdyn
->output_offset
,
17665 bfd_put_32 (output_bfd
, (bfd_vma
) 0, sgot
->contents
+ 4);
17666 bfd_put_32 (output_bfd
, (bfd_vma
) 0, sgot
->contents
+ 8);
17669 elf_section_data (sgot
->output_section
)->this_hdr
.sh_entsize
= 4;
17672 /* At the very end of the .rofixup section is a pointer to the GOT. */
17673 if (htab
->fdpic_p
&& htab
->srofixup
!= NULL
)
17675 struct elf_link_hash_entry
*hgot
= htab
->root
.hgot
;
17677 bfd_vma got_value
= hgot
->root
.u
.def
.value
17678 + hgot
->root
.u
.def
.section
->output_section
->vma
17679 + hgot
->root
.u
.def
.section
->output_offset
;
17681 arm_elf_add_rofixup(output_bfd
, htab
->srofixup
, got_value
);
17683 /* Make sure we allocated and generated the same number of fixups. */
17684 BFD_ASSERT (htab
->srofixup
->reloc_count
* 4 == htab
->srofixup
->size
);
17691 elf32_arm_init_file_header (bfd
*abfd
, struct bfd_link_info
*link_info
)
17693 Elf_Internal_Ehdr
* i_ehdrp
; /* ELF file header, internal form. */
17694 struct elf32_arm_link_hash_table
*globals
;
17695 struct elf_segment_map
*m
;
17697 if (!_bfd_elf_init_file_header (abfd
, link_info
))
17700 i_ehdrp
= elf_elfheader (abfd
);
17702 if (EF_ARM_EABI_VERSION (i_ehdrp
->e_flags
) == EF_ARM_EABI_UNKNOWN
)
17703 i_ehdrp
->e_ident
[EI_OSABI
] = ELFOSABI_ARM
;
17704 i_ehdrp
->e_ident
[EI_ABIVERSION
] = ARM_ELF_ABI_VERSION
;
17708 globals
= elf32_arm_hash_table (link_info
);
17709 if (globals
!= NULL
&& globals
->byteswap_code
)
17710 i_ehdrp
->e_flags
|= EF_ARM_BE8
;
17712 if (globals
->fdpic_p
)
17713 i_ehdrp
->e_ident
[EI_OSABI
] |= ELFOSABI_ARM_FDPIC
;
17716 if (EF_ARM_EABI_VERSION (i_ehdrp
->e_flags
) == EF_ARM_EABI_VER5
17717 && ((i_ehdrp
->e_type
== ET_DYN
) || (i_ehdrp
->e_type
== ET_EXEC
)))
17719 int abi
= bfd_elf_get_obj_attr_int (abfd
, OBJ_ATTR_PROC
, Tag_ABI_VFP_args
);
17720 if (abi
== AEABI_VFP_args_vfp
)
17721 i_ehdrp
->e_flags
|= EF_ARM_ABI_FLOAT_HARD
;
17723 i_ehdrp
->e_flags
|= EF_ARM_ABI_FLOAT_SOFT
;
17726 /* Scan segment to set p_flags attribute if it contains only sections with
17727 SHF_ARM_PURECODE flag. */
17728 for (m
= elf_seg_map (abfd
); m
!= NULL
; m
= m
->next
)
17734 for (j
= 0; j
< m
->count
; j
++)
17736 if (!(elf_section_flags (m
->sections
[j
]) & SHF_ARM_PURECODE
))
17742 m
->p_flags_valid
= 1;
17748 static enum elf_reloc_type_class
17749 elf32_arm_reloc_type_class (const struct bfd_link_info
*info ATTRIBUTE_UNUSED
,
17750 const asection
*rel_sec ATTRIBUTE_UNUSED
,
17751 const Elf_Internal_Rela
*rela
)
17753 switch ((int) ELF32_R_TYPE (rela
->r_info
))
17755 case R_ARM_RELATIVE
:
17756 return reloc_class_relative
;
17757 case R_ARM_JUMP_SLOT
:
17758 return reloc_class_plt
;
17760 return reloc_class_copy
;
17761 case R_ARM_IRELATIVE
:
17762 return reloc_class_ifunc
;
17764 return reloc_class_normal
;
17769 arm_final_write_processing (bfd
*abfd
)
17771 bfd_arm_update_notes (abfd
, ARM_NOTE_SECTION
);
17775 elf32_arm_final_write_processing (bfd
*abfd
)
17777 arm_final_write_processing (abfd
);
17778 return _bfd_elf_final_write_processing (abfd
);
17781 /* Return TRUE if this is an unwinding table entry. */
17784 is_arm_elf_unwind_section_name (bfd
* abfd ATTRIBUTE_UNUSED
, const char * name
)
17786 return (CONST_STRNEQ (name
, ELF_STRING_ARM_unwind
)
17787 || CONST_STRNEQ (name
, ELF_STRING_ARM_unwind_once
));
17791 /* Set the type and flags for an ARM section. We do this by
17792 the section name, which is a hack, but ought to work. */
17795 elf32_arm_fake_sections (bfd
* abfd
, Elf_Internal_Shdr
* hdr
, asection
* sec
)
17799 name
= bfd_section_name (sec
);
17801 if (is_arm_elf_unwind_section_name (abfd
, name
))
17803 hdr
->sh_type
= SHT_ARM_EXIDX
;
17804 hdr
->sh_flags
|= SHF_LINK_ORDER
;
17807 if (sec
->flags
& SEC_ELF_PURECODE
)
17808 hdr
->sh_flags
|= SHF_ARM_PURECODE
;
17813 /* Handle an ARM specific section when reading an object file. This is
17814 called when bfd_section_from_shdr finds a section with an unknown
17818 elf32_arm_section_from_shdr (bfd
*abfd
,
17819 Elf_Internal_Shdr
* hdr
,
17823 /* There ought to be a place to keep ELF backend specific flags, but
17824 at the moment there isn't one. We just keep track of the
17825 sections by their name, instead. Fortunately, the ABI gives
17826 names for all the ARM specific sections, so we will probably get
17828 switch (hdr
->sh_type
)
17830 case SHT_ARM_EXIDX
:
17831 case SHT_ARM_PREEMPTMAP
:
17832 case SHT_ARM_ATTRIBUTES
:
17839 if (! _bfd_elf_make_section_from_shdr (abfd
, hdr
, name
, shindex
))
17845 static _arm_elf_section_data
*
17846 get_arm_elf_section_data (asection
* sec
)
17848 if (sec
&& sec
->owner
&& is_arm_elf (sec
->owner
))
17849 return elf32_arm_section_data (sec
);
17857 struct bfd_link_info
*info
;
17860 int (*func
) (void *, const char *, Elf_Internal_Sym
*,
17861 asection
*, struct elf_link_hash_entry
*);
17862 } output_arch_syminfo
;
17864 enum map_symbol_type
17872 /* Output a single mapping symbol. */
17875 elf32_arm_output_map_sym (output_arch_syminfo
*osi
,
17876 enum map_symbol_type type
,
17879 static const char *names
[3] = {"$a", "$t", "$d"};
17880 Elf_Internal_Sym sym
;
17882 sym
.st_value
= osi
->sec
->output_section
->vma
17883 + osi
->sec
->output_offset
17887 sym
.st_info
= ELF_ST_INFO (STB_LOCAL
, STT_NOTYPE
);
17888 sym
.st_shndx
= osi
->sec_shndx
;
17889 sym
.st_target_internal
= 0;
17890 elf32_arm_section_map_add (osi
->sec
, names
[type
][1], offset
);
17891 return osi
->func (osi
->flaginfo
, names
[type
], &sym
, osi
->sec
, NULL
) == 1;
17894 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
17895 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
17898 elf32_arm_output_plt_map_1 (output_arch_syminfo
*osi
,
17899 bfd_boolean is_iplt_entry_p
,
17900 union gotplt_union
*root_plt
,
17901 struct arm_plt_info
*arm_plt
)
17903 struct elf32_arm_link_hash_table
*htab
;
17904 bfd_vma addr
, plt_header_size
;
17906 if (root_plt
->offset
== (bfd_vma
) -1)
17909 htab
= elf32_arm_hash_table (osi
->info
);
17913 if (is_iplt_entry_p
)
17915 osi
->sec
= htab
->root
.iplt
;
17916 plt_header_size
= 0;
17920 osi
->sec
= htab
->root
.splt
;
17921 plt_header_size
= htab
->plt_header_size
;
17923 osi
->sec_shndx
= (_bfd_elf_section_from_bfd_section
17924 (osi
->info
->output_bfd
, osi
->sec
->output_section
));
17926 addr
= root_plt
->offset
& -2;
17927 if (htab
->root
.target_os
== is_symbian
)
17929 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
17931 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 4))
17934 else if (htab
->root
.target_os
== is_vxworks
)
17936 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
17938 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 8))
17940 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
+ 12))
17942 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 20))
17945 else if (htab
->root
.target_os
== is_nacl
)
17947 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
17950 else if (htab
->fdpic_p
)
17952 enum map_symbol_type type
= using_thumb_only(htab
)
17956 if (elf32_arm_plt_needs_thumb_stub_p (osi
->info
, arm_plt
))
17957 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_THUMB
, addr
- 4))
17959 if (!elf32_arm_output_map_sym (osi
, type
, addr
))
17961 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 16))
17963 if (htab
->plt_entry_size
== 4 * ARRAY_SIZE(elf32_arm_fdpic_plt_entry
))
17964 if (!elf32_arm_output_map_sym (osi
, type
, addr
+ 24))
17967 else if (using_thumb_only (htab
))
17969 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_THUMB
, addr
))
17974 bfd_boolean thumb_stub_p
;
17976 thumb_stub_p
= elf32_arm_plt_needs_thumb_stub_p (osi
->info
, arm_plt
);
17979 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_THUMB
, addr
- 4))
17982 #ifdef FOUR_WORD_PLT
17983 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
17985 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 12))
17988 /* A three-word PLT with no Thumb thunk contains only Arm code,
17989 so only need to output a mapping symbol for the first PLT entry and
17990 entries with thumb thunks. */
17991 if (thumb_stub_p
|| addr
== plt_header_size
)
17993 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
18002 /* Output mapping symbols for PLT entries associated with H. */
18005 elf32_arm_output_plt_map (struct elf_link_hash_entry
*h
, void *inf
)
18007 output_arch_syminfo
*osi
= (output_arch_syminfo
*) inf
;
18008 struct elf32_arm_link_hash_entry
*eh
;
18010 if (h
->root
.type
== bfd_link_hash_indirect
)
18013 if (h
->root
.type
== bfd_link_hash_warning
)
18014 /* When warning symbols are created, they **replace** the "real"
18015 entry in the hash table, thus we never get to see the real
18016 symbol in a hash traversal. So look at it now. */
18017 h
= (struct elf_link_hash_entry
*) h
->root
.u
.i
.link
;
18019 eh
= (struct elf32_arm_link_hash_entry
*) h
;
18020 return elf32_arm_output_plt_map_1 (osi
, SYMBOL_CALLS_LOCAL (osi
->info
, h
),
18021 &h
->plt
, &eh
->plt
);
18024 /* Bind a veneered symbol to its veneer identified by its hash entry
18025 STUB_ENTRY. The veneered location thus loose its symbol. */
18028 arm_stub_claim_sym (struct elf32_arm_stub_hash_entry
*stub_entry
)
18030 struct elf32_arm_link_hash_entry
*hash
= stub_entry
->h
;
18033 hash
->root
.root
.u
.def
.section
= stub_entry
->stub_sec
;
18034 hash
->root
.root
.u
.def
.value
= stub_entry
->stub_offset
;
18035 hash
->root
.size
= stub_entry
->stub_size
;
18038 /* Output a single local symbol for a generated stub. */
18041 elf32_arm_output_stub_sym (output_arch_syminfo
*osi
, const char *name
,
18042 bfd_vma offset
, bfd_vma size
)
18044 Elf_Internal_Sym sym
;
18046 sym
.st_value
= osi
->sec
->output_section
->vma
18047 + osi
->sec
->output_offset
18049 sym
.st_size
= size
;
18051 sym
.st_info
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
18052 sym
.st_shndx
= osi
->sec_shndx
;
18053 sym
.st_target_internal
= 0;
18054 return osi
->func (osi
->flaginfo
, name
, &sym
, osi
->sec
, NULL
) == 1;
18058 arm_map_one_stub (struct bfd_hash_entry
* gen_entry
,
18061 struct elf32_arm_stub_hash_entry
*stub_entry
;
18062 asection
*stub_sec
;
18065 output_arch_syminfo
*osi
;
18066 const insn_sequence
*template_sequence
;
18067 enum stub_insn_type prev_type
;
18070 enum map_symbol_type sym_type
;
18072 /* Massage our args to the form they really have. */
18073 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
18074 osi
= (output_arch_syminfo
*) in_arg
;
18076 stub_sec
= stub_entry
->stub_sec
;
18078 /* Ensure this stub is attached to the current section being
18080 if (stub_sec
!= osi
->sec
)
18083 addr
= (bfd_vma
) stub_entry
->stub_offset
;
18084 template_sequence
= stub_entry
->stub_template
;
18086 if (arm_stub_sym_claimed (stub_entry
->stub_type
))
18087 arm_stub_claim_sym (stub_entry
);
18090 stub_name
= stub_entry
->output_name
;
18091 switch (template_sequence
[0].type
)
18094 if (!elf32_arm_output_stub_sym (osi
, stub_name
, addr
,
18095 stub_entry
->stub_size
))
18100 if (!elf32_arm_output_stub_sym (osi
, stub_name
, addr
| 1,
18101 stub_entry
->stub_size
))
18110 prev_type
= DATA_TYPE
;
18112 for (i
= 0; i
< stub_entry
->stub_template_size
; i
++)
18114 switch (template_sequence
[i
].type
)
18117 sym_type
= ARM_MAP_ARM
;
18122 sym_type
= ARM_MAP_THUMB
;
18126 sym_type
= ARM_MAP_DATA
;
18134 if (template_sequence
[i
].type
!= prev_type
)
18136 prev_type
= template_sequence
[i
].type
;
18137 if (!elf32_arm_output_map_sym (osi
, sym_type
, addr
+ size
))
18141 switch (template_sequence
[i
].type
)
18165 /* Output mapping symbols for linker generated sections,
18166 and for those data-only sections that do not have a
18170 elf32_arm_output_arch_local_syms (bfd
*output_bfd
,
18171 struct bfd_link_info
*info
,
18173 int (*func
) (void *, const char *,
18174 Elf_Internal_Sym
*,
18176 struct elf_link_hash_entry
*))
18178 output_arch_syminfo osi
;
18179 struct elf32_arm_link_hash_table
*htab
;
18181 bfd_size_type size
;
18184 htab
= elf32_arm_hash_table (info
);
18188 check_use_blx (htab
);
18190 osi
.flaginfo
= flaginfo
;
18194 /* Add a $d mapping symbol to data-only sections that
18195 don't have any mapping symbol. This may result in (harmless) redundant
18196 mapping symbols. */
18197 for (input_bfd
= info
->input_bfds
;
18199 input_bfd
= input_bfd
->link
.next
)
18201 if ((input_bfd
->flags
& (BFD_LINKER_CREATED
| HAS_SYMS
)) == HAS_SYMS
)
18202 for (osi
.sec
= input_bfd
->sections
;
18204 osi
.sec
= osi
.sec
->next
)
18206 if (osi
.sec
->output_section
!= NULL
18207 && ((osi
.sec
->output_section
->flags
& (SEC_ALLOC
| SEC_CODE
))
18209 && (osi
.sec
->flags
& (SEC_HAS_CONTENTS
| SEC_LINKER_CREATED
))
18210 == SEC_HAS_CONTENTS
18211 && get_arm_elf_section_data (osi
.sec
) != NULL
18212 && get_arm_elf_section_data (osi
.sec
)->mapcount
== 0
18213 && osi
.sec
->size
> 0
18214 && (osi
.sec
->flags
& SEC_EXCLUDE
) == 0)
18216 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
18217 (output_bfd
, osi
.sec
->output_section
);
18218 if (osi
.sec_shndx
!= (int)SHN_BAD
)
18219 elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, 0);
18224 /* ARM->Thumb glue. */
18225 if (htab
->arm_glue_size
> 0)
18227 osi
.sec
= bfd_get_linker_section (htab
->bfd_of_glue_owner
,
18228 ARM2THUMB_GLUE_SECTION_NAME
);
18230 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
18231 (output_bfd
, osi
.sec
->output_section
);
18232 if (bfd_link_pic (info
) || htab
->root
.is_relocatable_executable
18233 || htab
->pic_veneer
)
18234 size
= ARM2THUMB_PIC_GLUE_SIZE
;
18235 else if (htab
->use_blx
)
18236 size
= ARM2THUMB_V5_STATIC_GLUE_SIZE
;
18238 size
= ARM2THUMB_STATIC_GLUE_SIZE
;
18240 for (offset
= 0; offset
< htab
->arm_glue_size
; offset
+= size
)
18242 elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, offset
);
18243 elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, offset
+ size
- 4);
18247 /* Thumb->ARM glue. */
18248 if (htab
->thumb_glue_size
> 0)
18250 osi
.sec
= bfd_get_linker_section (htab
->bfd_of_glue_owner
,
18251 THUMB2ARM_GLUE_SECTION_NAME
);
18253 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
18254 (output_bfd
, osi
.sec
->output_section
);
18255 size
= THUMB2ARM_GLUE_SIZE
;
18257 for (offset
= 0; offset
< htab
->thumb_glue_size
; offset
+= size
)
18259 elf32_arm_output_map_sym (&osi
, ARM_MAP_THUMB
, offset
);
18260 elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, offset
+ 4);
18264 /* ARMv4 BX veneers. */
18265 if (htab
->bx_glue_size
> 0)
18267 osi
.sec
= bfd_get_linker_section (htab
->bfd_of_glue_owner
,
18268 ARM_BX_GLUE_SECTION_NAME
);
18270 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
18271 (output_bfd
, osi
.sec
->output_section
);
18273 elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0);
18276 /* Long calls stubs. */
18277 if (htab
->stub_bfd
&& htab
->stub_bfd
->sections
)
18279 asection
* stub_sec
;
18281 for (stub_sec
= htab
->stub_bfd
->sections
;
18283 stub_sec
= stub_sec
->next
)
18285 /* Ignore non-stub sections. */
18286 if (!strstr (stub_sec
->name
, STUB_SUFFIX
))
18289 osi
.sec
= stub_sec
;
18291 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
18292 (output_bfd
, osi
.sec
->output_section
);
18294 bfd_hash_traverse (&htab
->stub_hash_table
, arm_map_one_stub
, &osi
);
18298 /* Finally, output mapping symbols for the PLT. */
18299 if (htab
->root
.splt
&& htab
->root
.splt
->size
> 0)
18301 osi
.sec
= htab
->root
.splt
;
18302 osi
.sec_shndx
= (_bfd_elf_section_from_bfd_section
18303 (output_bfd
, osi
.sec
->output_section
));
18305 /* Output mapping symbols for the plt header. SymbianOS does not have a
18307 if (htab
->root
.target_os
== is_vxworks
)
18309 /* VxWorks shared libraries have no PLT header. */
18310 if (!bfd_link_pic (info
))
18312 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0))
18314 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, 12))
18318 else if (htab
->root
.target_os
== is_nacl
)
18320 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0))
18323 else if (using_thumb_only (htab
) && !htab
->fdpic_p
)
18325 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_THUMB
, 0))
18327 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, 12))
18329 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_THUMB
, 16))
18332 else if (htab
->root
.target_os
!= is_symbian
&& !htab
->fdpic_p
)
18334 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0))
18336 #ifndef FOUR_WORD_PLT
18337 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, 16))
18342 if (htab
->root
.target_os
== is_nacl
18344 && htab
->root
.iplt
->size
> 0)
18346 /* NaCl uses a special first entry in .iplt too. */
18347 osi
.sec
= htab
->root
.iplt
;
18348 osi
.sec_shndx
= (_bfd_elf_section_from_bfd_section
18349 (output_bfd
, osi
.sec
->output_section
));
18350 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0))
18353 if ((htab
->root
.splt
&& htab
->root
.splt
->size
> 0)
18354 || (htab
->root
.iplt
&& htab
->root
.iplt
->size
> 0))
18356 elf_link_hash_traverse (&htab
->root
, elf32_arm_output_plt_map
, &osi
);
18357 for (input_bfd
= info
->input_bfds
;
18359 input_bfd
= input_bfd
->link
.next
)
18361 struct arm_local_iplt_info
**local_iplt
;
18362 unsigned int i
, num_syms
;
18364 local_iplt
= elf32_arm_local_iplt (input_bfd
);
18365 if (local_iplt
!= NULL
)
18367 num_syms
= elf_symtab_hdr (input_bfd
).sh_info
;
18368 for (i
= 0; i
< num_syms
; i
++)
18369 if (local_iplt
[i
] != NULL
18370 && !elf32_arm_output_plt_map_1 (&osi
, TRUE
,
18371 &local_iplt
[i
]->root
,
18372 &local_iplt
[i
]->arm
))
18377 if (htab
->dt_tlsdesc_plt
!= 0)
18379 /* Mapping symbols for the lazy tls trampoline. */
18380 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, htab
->dt_tlsdesc_plt
))
18383 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
,
18384 htab
->dt_tlsdesc_plt
+ 24))
18387 if (htab
->tls_trampoline
!= 0)
18389 /* Mapping symbols for the tls trampoline. */
18390 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, htab
->tls_trampoline
))
18392 #ifdef FOUR_WORD_PLT
18393 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
,
18394 htab
->tls_trampoline
+ 12))
18402 /* Filter normal symbols of CMSE entry functions of ABFD to include in
18403 the import library. All SYMCOUNT symbols of ABFD can be examined
18404 from their pointers in SYMS. Pointers of symbols to keep should be
18405 stored continuously at the beginning of that array.
18407 Returns the number of symbols to keep. */
18409 static unsigned int
18410 elf32_arm_filter_cmse_symbols (bfd
*abfd ATTRIBUTE_UNUSED
,
18411 struct bfd_link_info
*info
,
18412 asymbol
**syms
, long symcount
)
18416 long src_count
, dst_count
= 0;
18417 struct elf32_arm_link_hash_table
*htab
;
18419 htab
= elf32_arm_hash_table (info
);
18420 if (!htab
->stub_bfd
|| !htab
->stub_bfd
->sections
)
18424 cmse_name
= (char *) bfd_malloc (maxnamelen
);
18425 BFD_ASSERT (cmse_name
);
18427 for (src_count
= 0; src_count
< symcount
; src_count
++)
18429 struct elf32_arm_link_hash_entry
*cmse_hash
;
18435 sym
= syms
[src_count
];
18436 flags
= sym
->flags
;
18437 name
= (char *) bfd_asymbol_name (sym
);
18439 if ((flags
& BSF_FUNCTION
) != BSF_FUNCTION
)
18441 if (!(flags
& (BSF_GLOBAL
| BSF_WEAK
)))
18444 namelen
= strlen (name
) + sizeof (CMSE_PREFIX
) + 1;
18445 if (namelen
> maxnamelen
)
18447 cmse_name
= (char *)
18448 bfd_realloc (cmse_name
, namelen
);
18449 maxnamelen
= namelen
;
18451 snprintf (cmse_name
, maxnamelen
, "%s%s", CMSE_PREFIX
, name
);
18452 cmse_hash
= (struct elf32_arm_link_hash_entry
*)
18453 elf_link_hash_lookup (&(htab
)->root
, cmse_name
, FALSE
, FALSE
, TRUE
);
18456 || (cmse_hash
->root
.root
.type
!= bfd_link_hash_defined
18457 && cmse_hash
->root
.root
.type
!= bfd_link_hash_defweak
)
18458 || cmse_hash
->root
.type
!= STT_FUNC
)
18461 syms
[dst_count
++] = sym
;
18465 syms
[dst_count
] = NULL
;
18470 /* Filter symbols of ABFD to include in the import library. All
18471 SYMCOUNT symbols of ABFD can be examined from their pointers in
18472 SYMS. Pointers of symbols to keep should be stored continuously at
18473 the beginning of that array.
18475 Returns the number of symbols to keep. */
18477 static unsigned int
18478 elf32_arm_filter_implib_symbols (bfd
*abfd ATTRIBUTE_UNUSED
,
18479 struct bfd_link_info
*info
,
18480 asymbol
**syms
, long symcount
)
18482 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (info
);
18484 /* Requirement 8 of "ARM v8-M Security Extensions: Requirements on
18485 Development Tools" (ARM-ECM-0359818) mandates Secure Gateway import
18486 library to be a relocatable object file. */
18487 BFD_ASSERT (!(bfd_get_file_flags (info
->out_implib_bfd
) & EXEC_P
));
18488 if (globals
->cmse_implib
)
18489 return elf32_arm_filter_cmse_symbols (abfd
, info
, syms
, symcount
);
18491 return _bfd_elf_filter_global_symbols (abfd
, info
, syms
, symcount
);
18494 /* Allocate target specific section data. */
18497 elf32_arm_new_section_hook (bfd
*abfd
, asection
*sec
)
18499 if (!sec
->used_by_bfd
)
18501 _arm_elf_section_data
*sdata
;
18502 size_t amt
= sizeof (*sdata
);
18504 sdata
= (_arm_elf_section_data
*) bfd_zalloc (abfd
, amt
);
18507 sec
->used_by_bfd
= sdata
;
18510 return _bfd_elf_new_section_hook (abfd
, sec
);
18514 /* Used to order a list of mapping symbols by address. */
18517 elf32_arm_compare_mapping (const void * a
, const void * b
)
18519 const elf32_arm_section_map
*amap
= (const elf32_arm_section_map
*) a
;
18520 const elf32_arm_section_map
*bmap
= (const elf32_arm_section_map
*) b
;
18522 if (amap
->vma
> bmap
->vma
)
18524 else if (amap
->vma
< bmap
->vma
)
18526 else if (amap
->type
> bmap
->type
)
18527 /* Ensure results do not depend on the host qsort for objects with
18528 multiple mapping symbols at the same address by sorting on type
18531 else if (amap
->type
< bmap
->type
)
18537 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
18539 static unsigned long
18540 offset_prel31 (unsigned long addr
, bfd_vma offset
)
18542 return (addr
& ~0x7ffffffful
) | ((addr
+ offset
) & 0x7ffffffful
);
18545 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
18549 copy_exidx_entry (bfd
*output_bfd
, bfd_byte
*to
, bfd_byte
*from
, bfd_vma offset
)
18551 unsigned long first_word
= bfd_get_32 (output_bfd
, from
);
18552 unsigned long second_word
= bfd_get_32 (output_bfd
, from
+ 4);
18554 /* High bit of first word is supposed to be zero. */
18555 if ((first_word
& 0x80000000ul
) == 0)
18556 first_word
= offset_prel31 (first_word
, offset
);
18558 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
18559 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
18560 if ((second_word
!= 0x1) && ((second_word
& 0x80000000ul
) == 0))
18561 second_word
= offset_prel31 (second_word
, offset
);
18563 bfd_put_32 (output_bfd
, first_word
, to
);
18564 bfd_put_32 (output_bfd
, second_word
, to
+ 4);
18567 /* Data for make_branch_to_a8_stub(). */
18569 struct a8_branch_to_stub_data
18571 asection
*writing_section
;
18572 bfd_byte
*contents
;
18576 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
18577 places for a particular section. */
18580 make_branch_to_a8_stub (struct bfd_hash_entry
*gen_entry
,
18583 struct elf32_arm_stub_hash_entry
*stub_entry
;
18584 struct a8_branch_to_stub_data
*data
;
18585 bfd_byte
*contents
;
18586 unsigned long branch_insn
;
18587 bfd_vma veneered_insn_loc
, veneer_entry_loc
;
18588 bfd_signed_vma branch_offset
;
18592 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
18593 data
= (struct a8_branch_to_stub_data
*) in_arg
;
18595 if (stub_entry
->target_section
!= data
->writing_section
18596 || stub_entry
->stub_type
< arm_stub_a8_veneer_lwm
)
18599 contents
= data
->contents
;
18601 /* We use target_section as Cortex-A8 erratum workaround stubs are only
18602 generated when both source and target are in the same section. */
18603 veneered_insn_loc
= stub_entry
->target_section
->output_section
->vma
18604 + stub_entry
->target_section
->output_offset
18605 + stub_entry
->source_value
;
18607 veneer_entry_loc
= stub_entry
->stub_sec
->output_section
->vma
18608 + stub_entry
->stub_sec
->output_offset
18609 + stub_entry
->stub_offset
;
18611 if (stub_entry
->stub_type
== arm_stub_a8_veneer_blx
)
18612 veneered_insn_loc
&= ~3u;
18614 branch_offset
= veneer_entry_loc
- veneered_insn_loc
- 4;
18616 abfd
= stub_entry
->target_section
->owner
;
18617 loc
= stub_entry
->source_value
;
18619 /* We attempt to avoid this condition by setting stubs_always_after_branch
18620 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
18621 This check is just to be on the safe side... */
18622 if ((veneered_insn_loc
& ~0xfff) == (veneer_entry_loc
& ~0xfff))
18624 _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub is "
18625 "allocated in unsafe location"), abfd
);
18629 switch (stub_entry
->stub_type
)
18631 case arm_stub_a8_veneer_b
:
18632 case arm_stub_a8_veneer_b_cond
:
18633 branch_insn
= 0xf0009000;
18636 case arm_stub_a8_veneer_blx
:
18637 branch_insn
= 0xf000e800;
18640 case arm_stub_a8_veneer_bl
:
18642 unsigned int i1
, j1
, i2
, j2
, s
;
18644 branch_insn
= 0xf000d000;
18647 if (branch_offset
< -16777216 || branch_offset
> 16777214)
18649 /* There's not much we can do apart from complain if this
18651 _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub out "
18652 "of range (input file too large)"), abfd
);
18656 /* i1 = not(j1 eor s), so:
18658 j1 = (not i1) eor s. */
18660 branch_insn
|= (branch_offset
>> 1) & 0x7ff;
18661 branch_insn
|= ((branch_offset
>> 12) & 0x3ff) << 16;
18662 i2
= (branch_offset
>> 22) & 1;
18663 i1
= (branch_offset
>> 23) & 1;
18664 s
= (branch_offset
>> 24) & 1;
18667 branch_insn
|= j2
<< 11;
18668 branch_insn
|= j1
<< 13;
18669 branch_insn
|= s
<< 26;
18678 bfd_put_16 (abfd
, (branch_insn
>> 16) & 0xffff, &contents
[loc
]);
18679 bfd_put_16 (abfd
, branch_insn
& 0xffff, &contents
[loc
+ 2]);
18684 /* Beginning of stm32l4xx work-around. */
18686 /* Functions encoding instructions necessary for the emission of the
18687 fix-stm32l4xx-629360.
18688 Encoding is extracted from the
18689 ARM (C) Architecture Reference Manual
18690 ARMv7-A and ARMv7-R edition
18691 ARM DDI 0406C.b (ID072512). */
18693 static inline bfd_vma
18694 create_instruction_branch_absolute (int branch_offset
)
18696 /* A8.8.18 B (A8-334)
18697 B target_address (Encoding T4). */
18698 /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii. */
18699 /* jump offset is: S:I1:I2:imm10:imm11:0. */
18700 /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S). */
18702 int s
= ((branch_offset
& 0x1000000) >> 24);
18703 int j1
= s
^ !((branch_offset
& 0x800000) >> 23);
18704 int j2
= s
^ !((branch_offset
& 0x400000) >> 22);
18706 if (branch_offset
< -(1 << 24) || branch_offset
>= (1 << 24))
18707 BFD_ASSERT (0 && "Error: branch out of range. Cannot create branch.");
18709 bfd_vma patched_inst
= 0xf0009000
18711 | (((unsigned long) (branch_offset
) >> 12) & 0x3ff) << 16 /* imm10. */
18712 | j1
<< 13 /* J1. */
18713 | j2
<< 11 /* J2. */
18714 | (((unsigned long) (branch_offset
) >> 1) & 0x7ff); /* imm11. */
18716 return patched_inst
;
18719 static inline bfd_vma
18720 create_instruction_ldmia (int base_reg
, int wback
, int reg_mask
)
18722 /* A8.8.57 LDM/LDMIA/LDMFD (A8-396)
18723 LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2). */
18724 bfd_vma patched_inst
= 0xe8900000
18725 | (/*W=*/wback
<< 21)
18727 | (reg_mask
& 0x0000ffff);
18729 return patched_inst
;
18732 static inline bfd_vma
18733 create_instruction_ldmdb (int base_reg
, int wback
, int reg_mask
)
18735 /* A8.8.60 LDMDB/LDMEA (A8-402)
18736 LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1). */
18737 bfd_vma patched_inst
= 0xe9100000
18738 | (/*W=*/wback
<< 21)
18740 | (reg_mask
& 0x0000ffff);
18742 return patched_inst
;
18745 static inline bfd_vma
18746 create_instruction_mov (int target_reg
, int source_reg
)
18748 /* A8.8.103 MOV (register) (A8-486)
18749 MOV Rd, Rm (Encoding T1). */
18750 bfd_vma patched_inst
= 0x4600
18751 | (target_reg
& 0x7)
18752 | ((target_reg
& 0x8) >> 3) << 7
18753 | (source_reg
<< 3);
18755 return patched_inst
;
18758 static inline bfd_vma
18759 create_instruction_sub (int target_reg
, int source_reg
, int value
)
18761 /* A8.8.221 SUB (immediate) (A8-708)
18762 SUB Rd, Rn, #value (Encoding T3). */
18763 bfd_vma patched_inst
= 0xf1a00000
18764 | (target_reg
<< 8)
18765 | (source_reg
<< 16)
18767 | ((value
& 0x800) >> 11) << 26
18768 | ((value
& 0x700) >> 8) << 12
18771 return patched_inst
;
18774 static inline bfd_vma
18775 create_instruction_vldmia (int base_reg
, int is_dp
, int wback
, int num_words
,
18778 /* A8.8.332 VLDM (A8-922)
18779 VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */
18780 bfd_vma patched_inst
= (is_dp
? 0xec900b00 : 0xec900a00)
18781 | (/*W=*/wback
<< 21)
18783 | (num_words
& 0x000000ff)
18784 | (((unsigned)first_reg
>> 1) & 0x0000000f) << 12
18785 | (first_reg
& 0x00000001) << 22;
18787 return patched_inst
;
18790 static inline bfd_vma
18791 create_instruction_vldmdb (int base_reg
, int is_dp
, int num_words
,
18794 /* A8.8.332 VLDM (A8-922)
18795 VLMD{MODE} Rn!, {} (Encoding T1 or T2). */
18796 bfd_vma patched_inst
= (is_dp
? 0xed300b00 : 0xed300a00)
18798 | (num_words
& 0x000000ff)
18799 | (((unsigned)first_reg
>>1 ) & 0x0000000f) << 12
18800 | (first_reg
& 0x00000001) << 22;
18802 return patched_inst
;
18805 static inline bfd_vma
18806 create_instruction_udf_w (int value
)
18808 /* A8.8.247 UDF (A8-758)
18809 Undefined (Encoding T2). */
18810 bfd_vma patched_inst
= 0xf7f0a000
18811 | (value
& 0x00000fff)
18812 | (value
& 0x000f0000) << 16;
18814 return patched_inst
;
18817 static inline bfd_vma
18818 create_instruction_udf (int value
)
18820 /* A8.8.247 UDF (A8-758)
18821 Undefined (Encoding T1). */
18822 bfd_vma patched_inst
= 0xde00
18825 return patched_inst
;
18828 /* Functions writing an instruction in memory, returning the next
18829 memory position to write to. */
18831 static inline bfd_byte
*
18832 push_thumb2_insn32 (struct elf32_arm_link_hash_table
* htab
,
18833 bfd
* output_bfd
, bfd_byte
*pt
, insn32 insn
)
18835 put_thumb2_insn (htab
, output_bfd
, insn
, pt
);
18839 static inline bfd_byte
*
18840 push_thumb2_insn16 (struct elf32_arm_link_hash_table
* htab
,
18841 bfd
* output_bfd
, bfd_byte
*pt
, insn32 insn
)
18843 put_thumb_insn (htab
, output_bfd
, insn
, pt
);
18847 /* Function filling up a region in memory with T1 and T2 UDFs taking
18848 care of alignment. */
18851 stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table
* htab
,
18853 const bfd_byte
* const base_stub_contents
,
18854 bfd_byte
* const from_stub_contents
,
18855 const bfd_byte
* const end_stub_contents
)
18857 bfd_byte
*current_stub_contents
= from_stub_contents
;
18859 /* Fill the remaining of the stub with deterministic contents : UDF
18861 Check if realignment is needed on modulo 4 frontier using T1, to
18863 if ((current_stub_contents
< end_stub_contents
)
18864 && !((current_stub_contents
- base_stub_contents
) % 2)
18865 && ((current_stub_contents
- base_stub_contents
) % 4))
18866 current_stub_contents
=
18867 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
18868 create_instruction_udf (0));
18870 for (; current_stub_contents
< end_stub_contents
;)
18871 current_stub_contents
=
18872 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18873 create_instruction_udf_w (0));
18875 return current_stub_contents
;
18878 /* Functions writing the stream of instructions equivalent to the
18879 derived sequence for ldmia, ldmdb, vldm respectively. */
18882 stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table
* htab
,
18884 const insn32 initial_insn
,
18885 const bfd_byte
*const initial_insn_addr
,
18886 bfd_byte
*const base_stub_contents
)
18888 int wback
= (initial_insn
& 0x00200000) >> 21;
18889 int ri
, rn
= (initial_insn
& 0x000F0000) >> 16;
18890 int insn_all_registers
= initial_insn
& 0x0000ffff;
18891 int insn_low_registers
, insn_high_registers
;
18892 int usable_register_mask
;
18893 int nb_registers
= elf32_arm_popcount (insn_all_registers
);
18894 int restore_pc
= (insn_all_registers
& (1 << 15)) ? 1 : 0;
18895 int restore_rn
= (insn_all_registers
& (1 << rn
)) ? 1 : 0;
18896 bfd_byte
*current_stub_contents
= base_stub_contents
;
18898 BFD_ASSERT (is_thumb2_ldmia (initial_insn
));
18900 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18901 smaller than 8 registers load sequences that do not cause the
18903 if (nb_registers
<= 8)
18905 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
18906 current_stub_contents
=
18907 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18910 /* B initial_insn_addr+4. */
18912 current_stub_contents
=
18913 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18914 create_instruction_branch_absolute
18915 (initial_insn_addr
- current_stub_contents
));
18917 /* Fill the remaining of the stub with deterministic contents. */
18918 current_stub_contents
=
18919 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
18920 base_stub_contents
, current_stub_contents
,
18921 base_stub_contents
+
18922 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
);
18927 /* - reg_list[13] == 0. */
18928 BFD_ASSERT ((insn_all_registers
& (1 << 13))==0);
18930 /* - reg_list[14] & reg_list[15] != 1. */
18931 BFD_ASSERT ((insn_all_registers
& 0xC000) != 0xC000);
18933 /* - if (wback==1) reg_list[rn] == 0. */
18934 BFD_ASSERT (!wback
|| !restore_rn
);
18936 /* - nb_registers > 8. */
18937 BFD_ASSERT (elf32_arm_popcount (insn_all_registers
) > 8);
18939 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
18941 /* In the following algorithm, we split this wide LDM using 2 LDM insns:
18942 - One with the 7 lowest registers (register mask 0x007F)
18943 This LDM will finally contain between 2 and 7 registers
18944 - One with the 7 highest registers (register mask 0xDF80)
18945 This ldm will finally contain between 2 and 7 registers. */
18946 insn_low_registers
= insn_all_registers
& 0x007F;
18947 insn_high_registers
= insn_all_registers
& 0xDF80;
18949 /* A spare register may be needed during this veneer to temporarily
18950 handle the base register. This register will be restored with the
18951 last LDM operation.
18952 The usable register may be any general purpose register (that
18953 excludes PC, SP, LR : register mask is 0x1FFF). */
18954 usable_register_mask
= 0x1FFF;
18956 /* Generate the stub function. */
18959 /* LDMIA Rn!, {R-low-register-list} : (Encoding T2). */
18960 current_stub_contents
=
18961 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18962 create_instruction_ldmia
18963 (rn
, /*wback=*/1, insn_low_registers
));
18965 /* LDMIA Rn!, {R-high-register-list} : (Encoding T2). */
18966 current_stub_contents
=
18967 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18968 create_instruction_ldmia
18969 (rn
, /*wback=*/1, insn_high_registers
));
18972 /* B initial_insn_addr+4. */
18973 current_stub_contents
=
18974 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18975 create_instruction_branch_absolute
18976 (initial_insn_addr
- current_stub_contents
));
18979 else /* if (!wback). */
18983 /* If Rn is not part of the high-register-list, move it there. */
18984 if (!(insn_high_registers
& (1 << rn
)))
18986 /* Choose a Ri in the high-register-list that will be restored. */
18987 ri
= ctz (insn_high_registers
& usable_register_mask
& ~(1 << rn
));
18990 current_stub_contents
=
18991 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
18992 create_instruction_mov (ri
, rn
));
18995 /* LDMIA Ri!, {R-low-register-list} : (Encoding T2). */
18996 current_stub_contents
=
18997 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18998 create_instruction_ldmia
18999 (ri
, /*wback=*/1, insn_low_registers
));
19001 /* LDMIA Ri, {R-high-register-list} : (Encoding T2). */
19002 current_stub_contents
=
19003 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19004 create_instruction_ldmia
19005 (ri
, /*wback=*/0, insn_high_registers
));
19009 /* B initial_insn_addr+4. */
19010 current_stub_contents
=
19011 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19012 create_instruction_branch_absolute
19013 (initial_insn_addr
- current_stub_contents
));
19017 /* Fill the remaining of the stub with deterministic contents. */
19018 current_stub_contents
=
19019 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
19020 base_stub_contents
, current_stub_contents
,
19021 base_stub_contents
+
19022 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
);
19026 stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table
* htab
,
19028 const insn32 initial_insn
,
19029 const bfd_byte
*const initial_insn_addr
,
19030 bfd_byte
*const base_stub_contents
)
19032 int wback
= (initial_insn
& 0x00200000) >> 21;
19033 int ri
, rn
= (initial_insn
& 0x000f0000) >> 16;
19034 int insn_all_registers
= initial_insn
& 0x0000ffff;
19035 int insn_low_registers
, insn_high_registers
;
19036 int usable_register_mask
;
19037 int restore_pc
= (insn_all_registers
& (1 << 15)) ? 1 : 0;
19038 int restore_rn
= (insn_all_registers
& (1 << rn
)) ? 1 : 0;
19039 int nb_registers
= elf32_arm_popcount (insn_all_registers
);
19040 bfd_byte
*current_stub_contents
= base_stub_contents
;
19042 BFD_ASSERT (is_thumb2_ldmdb (initial_insn
));
19044 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
19045 smaller than 8 registers load sequences that do not cause the
19047 if (nb_registers
<= 8)
19049 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
19050 current_stub_contents
=
19051 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19054 /* B initial_insn_addr+4. */
19055 current_stub_contents
=
19056 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19057 create_instruction_branch_absolute
19058 (initial_insn_addr
- current_stub_contents
));
19060 /* Fill the remaining of the stub with deterministic contents. */
19061 current_stub_contents
=
19062 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
19063 base_stub_contents
, current_stub_contents
,
19064 base_stub_contents
+
19065 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
);
19070 /* - reg_list[13] == 0. */
19071 BFD_ASSERT ((insn_all_registers
& (1 << 13)) == 0);
19073 /* - reg_list[14] & reg_list[15] != 1. */
19074 BFD_ASSERT ((insn_all_registers
& 0xC000) != 0xC000);
19076 /* - if (wback==1) reg_list[rn] == 0. */
19077 BFD_ASSERT (!wback
|| !restore_rn
);
19079 /* - nb_registers > 8. */
19080 BFD_ASSERT (elf32_arm_popcount (insn_all_registers
) > 8);
19082 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
19084 /* In the following algorithm, we split this wide LDM using 2 LDM insn:
19085 - One with the 7 lowest registers (register mask 0x007F)
19086 This LDM will finally contain between 2 and 7 registers
19087 - One with the 7 highest registers (register mask 0xDF80)
19088 This ldm will finally contain between 2 and 7 registers. */
19089 insn_low_registers
= insn_all_registers
& 0x007F;
19090 insn_high_registers
= insn_all_registers
& 0xDF80;
19092 /* A spare register may be needed during this veneer to temporarily
19093 handle the base register. This register will be restored with
19094 the last LDM operation.
19095 The usable register may be any general purpose register (that excludes
19096 PC, SP, LR : register mask is 0x1FFF). */
19097 usable_register_mask
= 0x1FFF;
19099 /* Generate the stub function. */
19100 if (!wback
&& !restore_pc
&& !restore_rn
)
19102 /* Choose a Ri in the low-register-list that will be restored. */
19103 ri
= ctz (insn_low_registers
& usable_register_mask
& ~(1 << rn
));
19106 current_stub_contents
=
19107 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
19108 create_instruction_mov (ri
, rn
));
19110 /* LDMDB Ri!, {R-high-register-list}. */
19111 current_stub_contents
=
19112 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19113 create_instruction_ldmdb
19114 (ri
, /*wback=*/1, insn_high_registers
));
19116 /* LDMDB Ri, {R-low-register-list}. */
19117 current_stub_contents
=
19118 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19119 create_instruction_ldmdb
19120 (ri
, /*wback=*/0, insn_low_registers
));
19122 /* B initial_insn_addr+4. */
19123 current_stub_contents
=
19124 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19125 create_instruction_branch_absolute
19126 (initial_insn_addr
- current_stub_contents
));
19128 else if (wback
&& !restore_pc
&& !restore_rn
)
19130 /* LDMDB Rn!, {R-high-register-list}. */
19131 current_stub_contents
=
19132 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19133 create_instruction_ldmdb
19134 (rn
, /*wback=*/1, insn_high_registers
));
19136 /* LDMDB Rn!, {R-low-register-list}. */
19137 current_stub_contents
=
19138 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19139 create_instruction_ldmdb
19140 (rn
, /*wback=*/1, insn_low_registers
));
19142 /* B initial_insn_addr+4. */
19143 current_stub_contents
=
19144 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19145 create_instruction_branch_absolute
19146 (initial_insn_addr
- current_stub_contents
));
19148 else if (!wback
&& restore_pc
&& !restore_rn
)
19150 /* Choose a Ri in the high-register-list that will be restored. */
19151 ri
= ctz (insn_high_registers
& usable_register_mask
& ~(1 << rn
));
19153 /* SUB Ri, Rn, #(4*nb_registers). */
19154 current_stub_contents
=
19155 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19156 create_instruction_sub (ri
, rn
, (4 * nb_registers
)));
19158 /* LDMIA Ri!, {R-low-register-list}. */
19159 current_stub_contents
=
19160 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19161 create_instruction_ldmia
19162 (ri
, /*wback=*/1, insn_low_registers
));
19164 /* LDMIA Ri, {R-high-register-list}. */
19165 current_stub_contents
=
19166 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19167 create_instruction_ldmia
19168 (ri
, /*wback=*/0, insn_high_registers
));
19170 else if (wback
&& restore_pc
&& !restore_rn
)
19172 /* Choose a Ri in the high-register-list that will be restored. */
19173 ri
= ctz (insn_high_registers
& usable_register_mask
& ~(1 << rn
));
19175 /* SUB Rn, Rn, #(4*nb_registers) */
19176 current_stub_contents
=
19177 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19178 create_instruction_sub (rn
, rn
, (4 * nb_registers
)));
19181 current_stub_contents
=
19182 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
19183 create_instruction_mov (ri
, rn
));
19185 /* LDMIA Ri!, {R-low-register-list}. */
19186 current_stub_contents
=
19187 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19188 create_instruction_ldmia
19189 (ri
, /*wback=*/1, insn_low_registers
));
19191 /* LDMIA Ri, {R-high-register-list}. */
19192 current_stub_contents
=
19193 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19194 create_instruction_ldmia
19195 (ri
, /*wback=*/0, insn_high_registers
));
19197 else if (!wback
&& !restore_pc
&& restore_rn
)
19200 if (!(insn_low_registers
& (1 << rn
)))
19202 /* Choose a Ri in the low-register-list that will be restored. */
19203 ri
= ctz (insn_low_registers
& usable_register_mask
& ~(1 << rn
));
19206 current_stub_contents
=
19207 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
19208 create_instruction_mov (ri
, rn
));
19211 /* LDMDB Ri!, {R-high-register-list}. */
19212 current_stub_contents
=
19213 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19214 create_instruction_ldmdb
19215 (ri
, /*wback=*/1, insn_high_registers
));
19217 /* LDMDB Ri, {R-low-register-list}. */
19218 current_stub_contents
=
19219 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19220 create_instruction_ldmdb
19221 (ri
, /*wback=*/0, insn_low_registers
));
19223 /* B initial_insn_addr+4. */
19224 current_stub_contents
=
19225 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19226 create_instruction_branch_absolute
19227 (initial_insn_addr
- current_stub_contents
));
19229 else if (!wback
&& restore_pc
&& restore_rn
)
19232 if (!(insn_high_registers
& (1 << rn
)))
19234 /* Choose a Ri in the high-register-list that will be restored. */
19235 ri
= ctz (insn_high_registers
& usable_register_mask
& ~(1 << rn
));
19238 /* SUB Ri, Rn, #(4*nb_registers). */
19239 current_stub_contents
=
19240 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19241 create_instruction_sub (ri
, rn
, (4 * nb_registers
)));
19243 /* LDMIA Ri!, {R-low-register-list}. */
19244 current_stub_contents
=
19245 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19246 create_instruction_ldmia
19247 (ri
, /*wback=*/1, insn_low_registers
));
19249 /* LDMIA Ri, {R-high-register-list}. */
19250 current_stub_contents
=
19251 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19252 create_instruction_ldmia
19253 (ri
, /*wback=*/0, insn_high_registers
));
19255 else if (wback
&& restore_rn
)
19257 /* The assembler should not have accepted to encode this. */
19258 BFD_ASSERT (0 && "Cannot patch an instruction that has an "
19259 "undefined behavior.\n");
19262 /* Fill the remaining of the stub with deterministic contents. */
19263 current_stub_contents
=
19264 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
19265 base_stub_contents
, current_stub_contents
,
19266 base_stub_contents
+
19267 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
);
19272 stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table
* htab
,
19274 const insn32 initial_insn
,
19275 const bfd_byte
*const initial_insn_addr
,
19276 bfd_byte
*const base_stub_contents
)
19278 int num_words
= initial_insn
& 0xff;
19279 bfd_byte
*current_stub_contents
= base_stub_contents
;
19281 BFD_ASSERT (is_thumb2_vldm (initial_insn
));
19283 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
19284 smaller than 8 words load sequences that do not cause the
19286 if (num_words
<= 8)
19288 /* Untouched instruction. */
19289 current_stub_contents
=
19290 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19293 /* B initial_insn_addr+4. */
19294 current_stub_contents
=
19295 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19296 create_instruction_branch_absolute
19297 (initial_insn_addr
- current_stub_contents
));
19301 bfd_boolean is_dp
= /* DP encoding. */
19302 (initial_insn
& 0xfe100f00) == 0xec100b00;
19303 bfd_boolean is_ia_nobang
= /* (IA without !). */
19304 (((initial_insn
<< 7) >> 28) & 0xd) == 0x4;
19305 bfd_boolean is_ia_bang
= /* (IA with !) - includes VPOP. */
19306 (((initial_insn
<< 7) >> 28) & 0xd) == 0x5;
19307 bfd_boolean is_db_bang
= /* (DB with !). */
19308 (((initial_insn
<< 7) >> 28) & 0xd) == 0x9;
19309 int base_reg
= ((unsigned int) initial_insn
<< 12) >> 28;
19310 /* d = UInt (Vd:D);. */
19311 int first_reg
= ((((unsigned int) initial_insn
<< 16) >> 28) << 1)
19312 | (((unsigned int)initial_insn
<< 9) >> 31);
19314 /* Compute the number of 8-words chunks needed to split. */
19315 int chunks
= (num_words
% 8) ? (num_words
/ 8 + 1) : (num_words
/ 8);
19318 /* The test coverage has been done assuming the following
19319 hypothesis that exactly one of the previous is_ predicates is
19321 BFD_ASSERT ( (is_ia_nobang
^ is_ia_bang
^ is_db_bang
)
19322 && !(is_ia_nobang
& is_ia_bang
& is_db_bang
));
19324 /* We treat the cutting of the words in one pass for all
19325 cases, then we emit the adjustments:
19328 -> vldm rx!, {8_words_or_less} for each needed 8_word
19329 -> sub rx, rx, #size (list)
19332 -> vldm rx!, {8_words_or_less} for each needed 8_word
19333 This also handles vpop instruction (when rx is sp)
19336 -> vldmb rx!, {8_words_or_less} for each needed 8_word. */
19337 for (chunk
= 0; chunk
< chunks
; ++chunk
)
19339 bfd_vma new_insn
= 0;
19341 if (is_ia_nobang
|| is_ia_bang
)
19343 new_insn
= create_instruction_vldmia
19347 chunks
- (chunk
+ 1) ?
19348 8 : num_words
- chunk
* 8,
19349 first_reg
+ chunk
* 8);
19351 else if (is_db_bang
)
19353 new_insn
= create_instruction_vldmdb
19356 chunks
- (chunk
+ 1) ?
19357 8 : num_words
- chunk
* 8,
19358 first_reg
+ chunk
* 8);
19362 current_stub_contents
=
19363 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19367 /* Only this case requires the base register compensation
19371 current_stub_contents
=
19372 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19373 create_instruction_sub
19374 (base_reg
, base_reg
, 4*num_words
));
19377 /* B initial_insn_addr+4. */
19378 current_stub_contents
=
19379 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19380 create_instruction_branch_absolute
19381 (initial_insn_addr
- current_stub_contents
));
19384 /* Fill the remaining of the stub with deterministic contents. */
19385 current_stub_contents
=
19386 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
19387 base_stub_contents
, current_stub_contents
,
19388 base_stub_contents
+
19389 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE
);
19393 stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table
* htab
,
19395 const insn32 wrong_insn
,
19396 const bfd_byte
*const wrong_insn_addr
,
19397 bfd_byte
*const stub_contents
)
19399 if (is_thumb2_ldmia (wrong_insn
))
19400 stm32l4xx_create_replacing_stub_ldmia (htab
, output_bfd
,
19401 wrong_insn
, wrong_insn_addr
,
19403 else if (is_thumb2_ldmdb (wrong_insn
))
19404 stm32l4xx_create_replacing_stub_ldmdb (htab
, output_bfd
,
19405 wrong_insn
, wrong_insn_addr
,
19407 else if (is_thumb2_vldm (wrong_insn
))
19408 stm32l4xx_create_replacing_stub_vldm (htab
, output_bfd
,
19409 wrong_insn
, wrong_insn_addr
,
19413 /* End of stm32l4xx work-around. */
19416 /* Do code byteswapping. Return FALSE afterwards so that the section is
19417 written out as normal. */
19420 elf32_arm_write_section (bfd
*output_bfd
,
19421 struct bfd_link_info
*link_info
,
19423 bfd_byte
*contents
)
19425 unsigned int mapcount
, errcount
;
19426 _arm_elf_section_data
*arm_data
;
19427 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
19428 elf32_arm_section_map
*map
;
19429 elf32_vfp11_erratum_list
*errnode
;
19430 elf32_stm32l4xx_erratum_list
*stm32l4xx_errnode
;
19433 bfd_vma offset
= sec
->output_section
->vma
+ sec
->output_offset
;
19437 if (globals
== NULL
)
19440 /* If this section has not been allocated an _arm_elf_section_data
19441 structure then we cannot record anything. */
19442 arm_data
= get_arm_elf_section_data (sec
);
19443 if (arm_data
== NULL
)
19446 mapcount
= arm_data
->mapcount
;
19447 map
= arm_data
->map
;
19448 errcount
= arm_data
->erratumcount
;
19452 unsigned int endianflip
= bfd_big_endian (output_bfd
) ? 3 : 0;
19454 for (errnode
= arm_data
->erratumlist
; errnode
!= 0;
19455 errnode
= errnode
->next
)
19457 bfd_vma target
= errnode
->vma
- offset
;
19459 switch (errnode
->type
)
19461 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER
:
19463 bfd_vma branch_to_veneer
;
19464 /* Original condition code of instruction, plus bit mask for
19465 ARM B instruction. */
19466 unsigned int insn
= (errnode
->u
.b
.vfp_insn
& 0xf0000000)
19469 /* The instruction is before the label. */
19472 /* Above offset included in -4 below. */
19473 branch_to_veneer
= errnode
->u
.b
.veneer
->vma
19474 - errnode
->vma
- 4;
19476 if ((signed) branch_to_veneer
< -(1 << 25)
19477 || (signed) branch_to_veneer
>= (1 << 25))
19478 _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
19479 "range"), output_bfd
);
19481 insn
|= (branch_to_veneer
>> 2) & 0xffffff;
19482 contents
[endianflip
^ target
] = insn
& 0xff;
19483 contents
[endianflip
^ (target
+ 1)] = (insn
>> 8) & 0xff;
19484 contents
[endianflip
^ (target
+ 2)] = (insn
>> 16) & 0xff;
19485 contents
[endianflip
^ (target
+ 3)] = (insn
>> 24) & 0xff;
19489 case VFP11_ERRATUM_ARM_VENEER
:
19491 bfd_vma branch_from_veneer
;
19494 /* Take size of veneer into account. */
19495 branch_from_veneer
= errnode
->u
.v
.branch
->vma
19496 - errnode
->vma
- 12;
19498 if ((signed) branch_from_veneer
< -(1 << 25)
19499 || (signed) branch_from_veneer
>= (1 << 25))
19500 _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
19501 "range"), output_bfd
);
19503 /* Original instruction. */
19504 insn
= errnode
->u
.v
.branch
->u
.b
.vfp_insn
;
19505 contents
[endianflip
^ target
] = insn
& 0xff;
19506 contents
[endianflip
^ (target
+ 1)] = (insn
>> 8) & 0xff;
19507 contents
[endianflip
^ (target
+ 2)] = (insn
>> 16) & 0xff;
19508 contents
[endianflip
^ (target
+ 3)] = (insn
>> 24) & 0xff;
19510 /* Branch back to insn after original insn. */
19511 insn
= 0xea000000 | ((branch_from_veneer
>> 2) & 0xffffff);
19512 contents
[endianflip
^ (target
+ 4)] = insn
& 0xff;
19513 contents
[endianflip
^ (target
+ 5)] = (insn
>> 8) & 0xff;
19514 contents
[endianflip
^ (target
+ 6)] = (insn
>> 16) & 0xff;
19515 contents
[endianflip
^ (target
+ 7)] = (insn
>> 24) & 0xff;
19525 if (arm_data
->stm32l4xx_erratumcount
!= 0)
19527 for (stm32l4xx_errnode
= arm_data
->stm32l4xx_erratumlist
;
19528 stm32l4xx_errnode
!= 0;
19529 stm32l4xx_errnode
= stm32l4xx_errnode
->next
)
19531 bfd_vma target
= stm32l4xx_errnode
->vma
- offset
;
19533 switch (stm32l4xx_errnode
->type
)
19535 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER
:
19538 bfd_vma branch_to_veneer
=
19539 stm32l4xx_errnode
->u
.b
.veneer
->vma
- stm32l4xx_errnode
->vma
;
19541 if ((signed) branch_to_veneer
< -(1 << 24)
19542 || (signed) branch_to_veneer
>= (1 << 24))
19544 bfd_vma out_of_range
=
19545 ((signed) branch_to_veneer
< -(1 << 24)) ?
19546 - branch_to_veneer
- (1 << 24) :
19547 ((signed) branch_to_veneer
>= (1 << 24)) ?
19548 branch_to_veneer
- (1 << 24) : 0;
19551 (_("%pB(%#" PRIx64
"): error: "
19552 "cannot create STM32L4XX veneer; "
19553 "jump out of range by %" PRId64
" bytes; "
19554 "cannot encode branch instruction"),
19556 (uint64_t) (stm32l4xx_errnode
->vma
- 4),
19557 (int64_t) out_of_range
);
19561 insn
= create_instruction_branch_absolute
19562 (stm32l4xx_errnode
->u
.b
.veneer
->vma
- stm32l4xx_errnode
->vma
);
19564 /* The instruction is before the label. */
19567 put_thumb2_insn (globals
, output_bfd
,
19568 (bfd_vma
) insn
, contents
+ target
);
19572 case STM32L4XX_ERRATUM_VENEER
:
19575 bfd_byte
* veneer_r
;
19578 veneer
= contents
+ target
;
19580 + stm32l4xx_errnode
->u
.b
.veneer
->vma
19581 - stm32l4xx_errnode
->vma
- 4;
19583 if ((signed) (veneer_r
- veneer
-
19584 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE
>
19585 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
?
19586 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE
:
19587 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
) < -(1 << 24)
19588 || (signed) (veneer_r
- veneer
) >= (1 << 24))
19590 _bfd_error_handler (_("%pB: error: cannot create STM32L4XX "
19591 "veneer"), output_bfd
);
19595 /* Original instruction. */
19596 insn
= stm32l4xx_errnode
->u
.v
.branch
->u
.b
.insn
;
19598 stm32l4xx_create_replacing_stub
19599 (globals
, output_bfd
, insn
, (void*)veneer_r
, (void*)veneer
);
19609 if (arm_data
->elf
.this_hdr
.sh_type
== SHT_ARM_EXIDX
)
19611 arm_unwind_table_edit
*edit_node
19612 = arm_data
->u
.exidx
.unwind_edit_list
;
19613 /* Now, sec->size is the size of the section we will write. The original
19614 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
19615 markers) was sec->rawsize. (This isn't the case if we perform no
19616 edits, then rawsize will be zero and we should use size). */
19617 bfd_byte
*edited_contents
= (bfd_byte
*) bfd_malloc (sec
->size
);
19618 unsigned int input_size
= sec
->rawsize
? sec
->rawsize
: sec
->size
;
19619 unsigned int in_index
, out_index
;
19620 bfd_vma add_to_offsets
= 0;
19622 if (edited_contents
== NULL
)
19624 for (in_index
= 0, out_index
= 0; in_index
* 8 < input_size
|| edit_node
;)
19628 unsigned int edit_index
= edit_node
->index
;
19630 if (in_index
< edit_index
&& in_index
* 8 < input_size
)
19632 copy_exidx_entry (output_bfd
, edited_contents
+ out_index
* 8,
19633 contents
+ in_index
* 8, add_to_offsets
);
19637 else if (in_index
== edit_index
19638 || (in_index
* 8 >= input_size
19639 && edit_index
== UINT_MAX
))
19641 switch (edit_node
->type
)
19643 case DELETE_EXIDX_ENTRY
:
19645 add_to_offsets
+= 8;
19648 case INSERT_EXIDX_CANTUNWIND_AT_END
:
19650 asection
*text_sec
= edit_node
->linked_section
;
19651 bfd_vma text_offset
= text_sec
->output_section
->vma
19652 + text_sec
->output_offset
19654 bfd_vma exidx_offset
= offset
+ out_index
* 8;
19655 unsigned long prel31_offset
;
19657 /* Note: this is meant to be equivalent to an
19658 R_ARM_PREL31 relocation. These synthetic
19659 EXIDX_CANTUNWIND markers are not relocated by the
19660 usual BFD method. */
19661 prel31_offset
= (text_offset
- exidx_offset
)
19663 if (bfd_link_relocatable (link_info
))
19665 /* Here relocation for new EXIDX_CANTUNWIND is
19666 created, so there is no need to
19667 adjust offset by hand. */
19668 prel31_offset
= text_sec
->output_offset
19672 /* First address we can't unwind. */
19673 bfd_put_32 (output_bfd
, prel31_offset
,
19674 &edited_contents
[out_index
* 8]);
19676 /* Code for EXIDX_CANTUNWIND. */
19677 bfd_put_32 (output_bfd
, 0x1,
19678 &edited_contents
[out_index
* 8 + 4]);
19681 add_to_offsets
-= 8;
19686 edit_node
= edit_node
->next
;
19691 /* No more edits, copy remaining entries verbatim. */
19692 copy_exidx_entry (output_bfd
, edited_contents
+ out_index
* 8,
19693 contents
+ in_index
* 8, add_to_offsets
);
19699 if (!(sec
->flags
& SEC_EXCLUDE
) && !(sec
->flags
& SEC_NEVER_LOAD
))
19700 bfd_set_section_contents (output_bfd
, sec
->output_section
,
19702 (file_ptr
) sec
->output_offset
, sec
->size
);
19707 /* Fix code to point to Cortex-A8 erratum stubs. */
19708 if (globals
->fix_cortex_a8
)
19710 struct a8_branch_to_stub_data data
;
19712 data
.writing_section
= sec
;
19713 data
.contents
= contents
;
19715 bfd_hash_traverse (& globals
->stub_hash_table
, make_branch_to_a8_stub
,
19722 if (globals
->byteswap_code
)
19724 qsort (map
, mapcount
, sizeof (* map
), elf32_arm_compare_mapping
);
19727 for (i
= 0; i
< mapcount
; i
++)
19729 if (i
== mapcount
- 1)
19732 end
= map
[i
+ 1].vma
;
19734 switch (map
[i
].type
)
19737 /* Byte swap code words. */
19738 while (ptr
+ 3 < end
)
19740 tmp
= contents
[ptr
];
19741 contents
[ptr
] = contents
[ptr
+ 3];
19742 contents
[ptr
+ 3] = tmp
;
19743 tmp
= contents
[ptr
+ 1];
19744 contents
[ptr
+ 1] = contents
[ptr
+ 2];
19745 contents
[ptr
+ 2] = tmp
;
19751 /* Byte swap code halfwords. */
19752 while (ptr
+ 1 < end
)
19754 tmp
= contents
[ptr
];
19755 contents
[ptr
] = contents
[ptr
+ 1];
19756 contents
[ptr
+ 1] = tmp
;
19762 /* Leave data alone. */
19770 arm_data
->mapcount
= -1;
19771 arm_data
->mapsize
= 0;
19772 arm_data
->map
= NULL
;
19777 /* Mangle thumb function symbols as we read them in. */
19780 elf32_arm_swap_symbol_in (bfd
* abfd
,
19783 Elf_Internal_Sym
*dst
)
19785 if (!bfd_elf32_swap_symbol_in (abfd
, psrc
, pshn
, dst
))
19787 dst
->st_target_internal
= 0;
19789 /* New EABI objects mark thumb function symbols by setting the low bit of
19791 if (ELF_ST_TYPE (dst
->st_info
) == STT_FUNC
19792 || ELF_ST_TYPE (dst
->st_info
) == STT_GNU_IFUNC
)
19794 if (dst
->st_value
& 1)
19796 dst
->st_value
&= ~(bfd_vma
) 1;
19797 ARM_SET_SYM_BRANCH_TYPE (dst
->st_target_internal
,
19798 ST_BRANCH_TO_THUMB
);
19801 ARM_SET_SYM_BRANCH_TYPE (dst
->st_target_internal
, ST_BRANCH_TO_ARM
);
19803 else if (ELF_ST_TYPE (dst
->st_info
) == STT_ARM_TFUNC
)
19805 dst
->st_info
= ELF_ST_INFO (ELF_ST_BIND (dst
->st_info
), STT_FUNC
);
19806 ARM_SET_SYM_BRANCH_TYPE (dst
->st_target_internal
, ST_BRANCH_TO_THUMB
);
19808 else if (ELF_ST_TYPE (dst
->st_info
) == STT_SECTION
)
19809 ARM_SET_SYM_BRANCH_TYPE (dst
->st_target_internal
, ST_BRANCH_LONG
);
19811 ARM_SET_SYM_BRANCH_TYPE (dst
->st_target_internal
, ST_BRANCH_UNKNOWN
);
19817 /* Mangle thumb function symbols as we write them out. */
19820 elf32_arm_swap_symbol_out (bfd
*abfd
,
19821 const Elf_Internal_Sym
*src
,
19825 Elf_Internal_Sym newsym
;
19827 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
19828 of the address set, as per the new EABI. We do this unconditionally
19829 because objcopy does not set the elf header flags until after
19830 it writes out the symbol table. */
19831 if (ARM_GET_SYM_BRANCH_TYPE (src
->st_target_internal
) == ST_BRANCH_TO_THUMB
)
19834 if (ELF_ST_TYPE (src
->st_info
) != STT_GNU_IFUNC
)
19835 newsym
.st_info
= ELF_ST_INFO (ELF_ST_BIND (src
->st_info
), STT_FUNC
);
19836 if (newsym
.st_shndx
!= SHN_UNDEF
)
19838 /* Do this only for defined symbols. At link type, the static
19839 linker will simulate the work of dynamic linker of resolving
19840 symbols and will carry over the thumbness of found symbols to
19841 the output symbol table. It's not clear how it happens, but
19842 the thumbness of undefined symbols can well be different at
19843 runtime, and writing '1' for them will be confusing for users
19844 and possibly for dynamic linker itself.
19846 newsym
.st_value
|= 1;
19851 bfd_elf32_swap_symbol_out (abfd
, src
, cdst
, shndx
);
19854 /* Add the PT_ARM_EXIDX program header. */
19857 elf32_arm_modify_segment_map (bfd
*abfd
,
19858 struct bfd_link_info
*info ATTRIBUTE_UNUSED
)
19860 struct elf_segment_map
*m
;
19863 sec
= bfd_get_section_by_name (abfd
, ".ARM.exidx");
19864 if (sec
!= NULL
&& (sec
->flags
& SEC_LOAD
) != 0)
19866 /* If there is already a PT_ARM_EXIDX header, then we do not
19867 want to add another one. This situation arises when running
19868 "strip"; the input binary already has the header. */
19869 m
= elf_seg_map (abfd
);
19870 while (m
&& m
->p_type
!= PT_ARM_EXIDX
)
19874 m
= (struct elf_segment_map
*)
19875 bfd_zalloc (abfd
, sizeof (struct elf_segment_map
));
19878 m
->p_type
= PT_ARM_EXIDX
;
19880 m
->sections
[0] = sec
;
19882 m
->next
= elf_seg_map (abfd
);
19883 elf_seg_map (abfd
) = m
;
19890 /* We may add a PT_ARM_EXIDX program header. */
19893 elf32_arm_additional_program_headers (bfd
*abfd
,
19894 struct bfd_link_info
*info ATTRIBUTE_UNUSED
)
19898 sec
= bfd_get_section_by_name (abfd
, ".ARM.exidx");
19899 if (sec
!= NULL
&& (sec
->flags
& SEC_LOAD
) != 0)
19905 /* Hook called by the linker routine which adds symbols from an object
19909 elf32_arm_add_symbol_hook (bfd
*abfd
, struct bfd_link_info
*info
,
19910 Elf_Internal_Sym
*sym
, const char **namep
,
19911 flagword
*flagsp
, asection
**secp
, bfd_vma
*valp
)
19913 if (elf32_arm_hash_table (info
) == NULL
)
19916 if (elf32_arm_hash_table (info
)->root
.target_os
== is_vxworks
19917 && !elf_vxworks_add_symbol_hook (abfd
, info
, sym
, namep
,
19918 flagsp
, secp
, valp
))
19924 /* We use this to override swap_symbol_in and swap_symbol_out. */
19925 const struct elf_size_info elf32_arm_size_info
=
19927 sizeof (Elf32_External_Ehdr
),
19928 sizeof (Elf32_External_Phdr
),
19929 sizeof (Elf32_External_Shdr
),
19930 sizeof (Elf32_External_Rel
),
19931 sizeof (Elf32_External_Rela
),
19932 sizeof (Elf32_External_Sym
),
19933 sizeof (Elf32_External_Dyn
),
19934 sizeof (Elf_External_Note
),
19938 ELFCLASS32
, EV_CURRENT
,
19939 bfd_elf32_write_out_phdrs
,
19940 bfd_elf32_write_shdrs_and_ehdr
,
19941 bfd_elf32_checksum_contents
,
19942 bfd_elf32_write_relocs
,
19943 elf32_arm_swap_symbol_in
,
19944 elf32_arm_swap_symbol_out
,
19945 bfd_elf32_slurp_reloc_table
,
19946 bfd_elf32_slurp_symbol_table
,
19947 bfd_elf32_swap_dyn_in
,
19948 bfd_elf32_swap_dyn_out
,
19949 bfd_elf32_swap_reloc_in
,
19950 bfd_elf32_swap_reloc_out
,
19951 bfd_elf32_swap_reloca_in
,
19952 bfd_elf32_swap_reloca_out
19956 read_code32 (const bfd
*abfd
, const bfd_byte
*addr
)
19958 /* V7 BE8 code is always little endian. */
19959 if ((elf_elfheader (abfd
)->e_flags
& EF_ARM_BE8
) != 0)
19960 return bfd_getl32 (addr
);
19962 return bfd_get_32 (abfd
, addr
);
19966 read_code16 (const bfd
*abfd
, const bfd_byte
*addr
)
19968 /* V7 BE8 code is always little endian. */
19969 if ((elf_elfheader (abfd
)->e_flags
& EF_ARM_BE8
) != 0)
19970 return bfd_getl16 (addr
);
19972 return bfd_get_16 (abfd
, addr
);
19975 /* Return size of plt0 entry starting at ADDR
19976 or (bfd_vma) -1 if size can not be determined. */
19979 elf32_arm_plt0_size (const bfd
*abfd
, const bfd_byte
*addr
)
19981 bfd_vma first_word
;
19984 first_word
= read_code32 (abfd
, addr
);
19986 if (first_word
== elf32_arm_plt0_entry
[0])
19987 plt0_size
= 4 * ARRAY_SIZE (elf32_arm_plt0_entry
);
19988 else if (first_word
== elf32_thumb2_plt0_entry
[0])
19989 plt0_size
= 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry
);
19991 /* We don't yet handle this PLT format. */
19992 return (bfd_vma
) -1;
19997 /* Return size of plt entry starting at offset OFFSET
19998 of plt section located at address START
19999 or (bfd_vma) -1 if size can not be determined. */
20002 elf32_arm_plt_size (const bfd
*abfd
, const bfd_byte
*start
, bfd_vma offset
)
20004 bfd_vma first_insn
;
20005 bfd_vma plt_size
= 0;
20006 const bfd_byte
*addr
= start
+ offset
;
20008 /* PLT entry size if fixed on Thumb-only platforms. */
20009 if (read_code32 (abfd
, start
) == elf32_thumb2_plt0_entry
[0])
20010 return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry
);
20012 /* Respect Thumb stub if necessary. */
20013 if (read_code16 (abfd
, addr
) == elf32_arm_plt_thumb_stub
[0])
20015 plt_size
+= 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub
);
20018 /* Strip immediate from first add. */
20019 first_insn
= read_code32 (abfd
, addr
+ plt_size
) & 0xffffff00;
20021 #ifdef FOUR_WORD_PLT
20022 if (first_insn
== elf32_arm_plt_entry
[0])
20023 plt_size
+= 4 * ARRAY_SIZE (elf32_arm_plt_entry
);
20025 if (first_insn
== elf32_arm_plt_entry_long
[0])
20026 plt_size
+= 4 * ARRAY_SIZE (elf32_arm_plt_entry_long
);
20027 else if (first_insn
== elf32_arm_plt_entry_short
[0])
20028 plt_size
+= 4 * ARRAY_SIZE (elf32_arm_plt_entry_short
);
20031 /* We don't yet handle this PLT format. */
20032 return (bfd_vma
) -1;
20037 /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */
20040 elf32_arm_get_synthetic_symtab (bfd
*abfd
,
20041 long symcount ATTRIBUTE_UNUSED
,
20042 asymbol
**syms ATTRIBUTE_UNUSED
,
20052 Elf_Internal_Shdr
*hdr
;
20060 if ((abfd
->flags
& (DYNAMIC
| EXEC_P
)) == 0)
20063 if (dynsymcount
<= 0)
20066 relplt
= bfd_get_section_by_name (abfd
, ".rel.plt");
20067 if (relplt
== NULL
)
20070 hdr
= &elf_section_data (relplt
)->this_hdr
;
20071 if (hdr
->sh_link
!= elf_dynsymtab (abfd
)
20072 || (hdr
->sh_type
!= SHT_REL
&& hdr
->sh_type
!= SHT_RELA
))
20075 plt
= bfd_get_section_by_name (abfd
, ".plt");
20079 if (!elf32_arm_size_info
.slurp_reloc_table (abfd
, relplt
, dynsyms
, TRUE
))
20082 data
= plt
->contents
;
20085 if (!bfd_get_full_section_contents(abfd
, (asection
*) plt
, &data
) || data
== NULL
)
20087 bfd_cache_section_contents((asection
*) plt
, data
);
20090 count
= relplt
->size
/ hdr
->sh_entsize
;
20091 size
= count
* sizeof (asymbol
);
20092 p
= relplt
->relocation
;
20093 for (i
= 0; i
< count
; i
++, p
+= elf32_arm_size_info
.int_rels_per_ext_rel
)
20095 size
+= strlen ((*p
->sym_ptr_ptr
)->name
) + sizeof ("@plt");
20096 if (p
->addend
!= 0)
20097 size
+= sizeof ("+0x") - 1 + 8;
20100 s
= *ret
= (asymbol
*) bfd_malloc (size
);
20104 offset
= elf32_arm_plt0_size (abfd
, data
);
20105 if (offset
== (bfd_vma
) -1)
20108 names
= (char *) (s
+ count
);
20109 p
= relplt
->relocation
;
20111 for (i
= 0; i
< count
; i
++, p
+= elf32_arm_size_info
.int_rels_per_ext_rel
)
20115 bfd_vma plt_size
= elf32_arm_plt_size (abfd
, data
, offset
);
20116 if (plt_size
== (bfd_vma
) -1)
20119 *s
= **p
->sym_ptr_ptr
;
20120 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
20121 we are defining a symbol, ensure one of them is set. */
20122 if ((s
->flags
& BSF_LOCAL
) == 0)
20123 s
->flags
|= BSF_GLOBAL
;
20124 s
->flags
|= BSF_SYNTHETIC
;
20129 len
= strlen ((*p
->sym_ptr_ptr
)->name
);
20130 memcpy (names
, (*p
->sym_ptr_ptr
)->name
, len
);
20132 if (p
->addend
!= 0)
20136 memcpy (names
, "+0x", sizeof ("+0x") - 1);
20137 names
+= sizeof ("+0x") - 1;
20138 bfd_sprintf_vma (abfd
, buf
, p
->addend
);
20139 for (a
= buf
; *a
== '0'; ++a
)
20142 memcpy (names
, a
, len
);
20145 memcpy (names
, "@plt", sizeof ("@plt"));
20146 names
+= sizeof ("@plt");
20148 offset
+= plt_size
;
20155 elf32_arm_section_flags (const Elf_Internal_Shdr
*hdr
)
20157 if (hdr
->sh_flags
& SHF_ARM_PURECODE
)
20158 hdr
->bfd_section
->flags
|= SEC_ELF_PURECODE
;
20163 elf32_arm_lookup_section_flags (char *flag_name
)
20165 if (!strcmp (flag_name
, "SHF_ARM_PURECODE"))
20166 return SHF_ARM_PURECODE
;
20168 return SEC_NO_FLAGS
;
20171 static unsigned int
20172 elf32_arm_count_additional_relocs (asection
*sec
)
20174 struct _arm_elf_section_data
*arm_data
;
20175 arm_data
= get_arm_elf_section_data (sec
);
20177 return arm_data
== NULL
? 0 : arm_data
->additional_reloc_count
;
20180 /* Called to set the sh_flags, sh_link and sh_info fields of OSECTION which
20181 has a type >= SHT_LOOS. Returns TRUE if these fields were initialised
20182 FALSE otherwise. ISECTION is the best guess matching section from the
20183 input bfd IBFD, but it might be NULL. */
20186 elf32_arm_copy_special_section_fields (const bfd
*ibfd ATTRIBUTE_UNUSED
,
20187 bfd
*obfd ATTRIBUTE_UNUSED
,
20188 const Elf_Internal_Shdr
*isection ATTRIBUTE_UNUSED
,
20189 Elf_Internal_Shdr
*osection
)
20191 switch (osection
->sh_type
)
20193 case SHT_ARM_EXIDX
:
20195 Elf_Internal_Shdr
**oheaders
= elf_elfsections (obfd
);
20196 Elf_Internal_Shdr
**iheaders
= elf_elfsections (ibfd
);
20199 osection
->sh_flags
= SHF_ALLOC
| SHF_LINK_ORDER
;
20200 osection
->sh_info
= 0;
20202 /* The sh_link field must be set to the text section associated with
20203 this index section. Unfortunately the ARM EHABI does not specify
20204 exactly how to determine this association. Our caller does try
20205 to match up OSECTION with its corresponding input section however
20206 so that is a good first guess. */
20207 if (isection
!= NULL
20208 && osection
->bfd_section
!= NULL
20209 && isection
->bfd_section
!= NULL
20210 && isection
->bfd_section
->output_section
!= NULL
20211 && isection
->bfd_section
->output_section
== osection
->bfd_section
20212 && iheaders
!= NULL
20213 && isection
->sh_link
> 0
20214 && isection
->sh_link
< elf_numsections (ibfd
)
20215 && iheaders
[isection
->sh_link
]->bfd_section
!= NULL
20216 && iheaders
[isection
->sh_link
]->bfd_section
->output_section
!= NULL
20219 for (i
= elf_numsections (obfd
); i
-- > 0;)
20220 if (oheaders
[i
]->bfd_section
20221 == iheaders
[isection
->sh_link
]->bfd_section
->output_section
)
20227 /* Failing that we have to find a matching section ourselves. If
20228 we had the output section name available we could compare that
20229 with input section names. Unfortunately we don't. So instead
20230 we use a simple heuristic and look for the nearest executable
20231 section before this one. */
20232 for (i
= elf_numsections (obfd
); i
-- > 0;)
20233 if (oheaders
[i
] == osection
)
20239 if (oheaders
[i
]->sh_type
== SHT_PROGBITS
20240 && (oheaders
[i
]->sh_flags
& (SHF_ALLOC
| SHF_EXECINSTR
))
20241 == (SHF_ALLOC
| SHF_EXECINSTR
))
20247 osection
->sh_link
= i
;
20248 /* If the text section was part of a group
20249 then the index section should be too. */
20250 if (oheaders
[i
]->sh_flags
& SHF_GROUP
)
20251 osection
->sh_flags
|= SHF_GROUP
;
20257 case SHT_ARM_PREEMPTMAP
:
20258 osection
->sh_flags
= SHF_ALLOC
;
20261 case SHT_ARM_ATTRIBUTES
:
20262 case SHT_ARM_DEBUGOVERLAY
:
20263 case SHT_ARM_OVERLAYSECTION
:
20271 /* Returns TRUE if NAME is an ARM mapping symbol.
20272 Traditionally the symbols $a, $d and $t have been used.
20273 The ARM ELF standard also defines $x (for A64 code). It also allows a
20274 period initiated suffix to be added to the symbol: "$[adtx]\.[:sym_char]+".
20275 Other tools might also produce $b (Thumb BL), $f, $p, $m and $v, but we do
20276 not support them here. $t.x indicates the start of ThumbEE instructions. */
20279 is_arm_mapping_symbol (const char * name
)
20281 return name
!= NULL
/* Paranoia. */
20282 && name
[0] == '$' /* Note: if objcopy --prefix-symbols has been used then
20283 the mapping symbols could have acquired a prefix.
20284 We do not support this here, since such symbols no
20285 longer conform to the ARM ELF ABI. */
20286 && (name
[1] == 'a' || name
[1] == 'd' || name
[1] == 't' || name
[1] == 'x')
20287 && (name
[2] == 0 || name
[2] == '.');
20288 /* FIXME: Strictly speaking the symbol is only a valid mapping symbol if
20289 any characters that follow the period are legal characters for the body
20290 of a symbol's name. For now we just assume that this is the case. */
20293 /* Make sure that mapping symbols in object files are not removed via the
20294 "strip --strip-unneeded" tool. These symbols are needed in order to
20295 correctly generate interworking veneers, and for byte swapping code
20296 regions. Once an object file has been linked, it is safe to remove the
20297 symbols as they will no longer be needed. */
20300 elf32_arm_backend_symbol_processing (bfd
*abfd
, asymbol
*sym
)
20302 if (((abfd
->flags
& (EXEC_P
| DYNAMIC
)) == 0)
20303 && sym
->section
!= bfd_abs_section_ptr
20304 && is_arm_mapping_symbol (sym
->name
))
20305 sym
->flags
|= BSF_KEEP
;
20308 #undef elf_backend_copy_special_section_fields
20309 #define elf_backend_copy_special_section_fields elf32_arm_copy_special_section_fields
20311 #define ELF_ARCH bfd_arch_arm
20312 #define ELF_TARGET_ID ARM_ELF_DATA
20313 #define ELF_MACHINE_CODE EM_ARM
20314 #ifdef __QNXTARGET__
20315 #define ELF_MAXPAGESIZE 0x1000
20317 #define ELF_MAXPAGESIZE 0x10000
20319 #define ELF_MINPAGESIZE 0x1000
20320 #define ELF_COMMONPAGESIZE 0x1000
20322 #define bfd_elf32_mkobject elf32_arm_mkobject
20324 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
20325 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
20326 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
20327 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
20328 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
20329 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
20330 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
20331 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
20332 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
20333 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
20334 #define bfd_elf32_bfd_final_link elf32_arm_final_link
20335 #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab
20337 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
20338 #define elf_backend_maybe_function_sym elf32_arm_maybe_function_sym
20339 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
20340 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
20341 #define elf_backend_check_relocs elf32_arm_check_relocs
20342 #define elf_backend_update_relocs elf32_arm_update_relocs
20343 #define elf_backend_relocate_section elf32_arm_relocate_section
20344 #define elf_backend_write_section elf32_arm_write_section
20345 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
20346 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
20347 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
20348 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
20349 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
20350 #define elf_backend_always_size_sections elf32_arm_always_size_sections
20351 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
20352 #define elf_backend_init_file_header elf32_arm_init_file_header
20353 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
20354 #define elf_backend_object_p elf32_arm_object_p
20355 #define elf_backend_fake_sections elf32_arm_fake_sections
20356 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
20357 #define elf_backend_final_write_processing elf32_arm_final_write_processing
20358 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
20359 #define elf_backend_size_info elf32_arm_size_info
20360 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
20361 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
20362 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
20363 #define elf_backend_filter_implib_symbols elf32_arm_filter_implib_symbols
20364 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
20365 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
20366 #define elf_backend_count_additional_relocs elf32_arm_count_additional_relocs
20367 #define elf_backend_symbol_processing elf32_arm_backend_symbol_processing
20369 #define elf_backend_can_refcount 1
20370 #define elf_backend_can_gc_sections 1
20371 #define elf_backend_plt_readonly 1
20372 #define elf_backend_want_got_plt 1
20373 #define elf_backend_want_plt_sym 0
20374 #define elf_backend_want_dynrelro 1
20375 #define elf_backend_may_use_rel_p 1
20376 #define elf_backend_may_use_rela_p 0
20377 #define elf_backend_default_use_rela_p 0
20378 #define elf_backend_dtrel_excludes_plt 1
20380 #define elf_backend_got_header_size 12
20381 #define elf_backend_extern_protected_data 1
20383 #undef elf_backend_obj_attrs_vendor
20384 #define elf_backend_obj_attrs_vendor "aeabi"
20385 #undef elf_backend_obj_attrs_section
20386 #define elf_backend_obj_attrs_section ".ARM.attributes"
20387 #undef elf_backend_obj_attrs_arg_type
20388 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
20389 #undef elf_backend_obj_attrs_section_type
20390 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
20391 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
20392 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
20394 #undef elf_backend_section_flags
20395 #define elf_backend_section_flags elf32_arm_section_flags
20396 #undef elf_backend_lookup_section_flags_hook
20397 #define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags
20399 #define elf_backend_linux_prpsinfo32_ugid16 TRUE
20401 #include "elf32-target.h"
20403 /* Native Client targets. */
20405 #undef TARGET_LITTLE_SYM
20406 #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec
20407 #undef TARGET_LITTLE_NAME
20408 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
20409 #undef TARGET_BIG_SYM
20410 #define TARGET_BIG_SYM arm_elf32_nacl_be_vec
20411 #undef TARGET_BIG_NAME
20412 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
20414 /* Like elf32_arm_link_hash_table_create -- but overrides
20415 appropriately for NaCl. */
20417 static struct bfd_link_hash_table
*
20418 elf32_arm_nacl_link_hash_table_create (bfd
*abfd
)
20420 struct bfd_link_hash_table
*ret
;
20422 ret
= elf32_arm_link_hash_table_create (abfd
);
20425 struct elf32_arm_link_hash_table
*htab
20426 = (struct elf32_arm_link_hash_table
*) ret
;
20428 htab
->plt_header_size
= 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry
);
20429 htab
->plt_entry_size
= 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry
);
20434 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
20435 really need to use elf32_arm_modify_segment_map. But we do it
20436 anyway just to reduce gratuitous differences with the stock ARM backend. */
20439 elf32_arm_nacl_modify_segment_map (bfd
*abfd
, struct bfd_link_info
*info
)
20441 return (elf32_arm_modify_segment_map (abfd
, info
)
20442 && nacl_modify_segment_map (abfd
, info
));
20446 elf32_arm_nacl_final_write_processing (bfd
*abfd
)
20448 arm_final_write_processing (abfd
);
20449 return nacl_final_write_processing (abfd
);
20453 elf32_arm_nacl_plt_sym_val (bfd_vma i
, const asection
*plt
,
20454 const arelent
*rel ATTRIBUTE_UNUSED
)
20457 + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry
) +
20458 i
* ARRAY_SIZE (elf32_arm_nacl_plt_entry
));
20462 #define elf32_bed elf32_arm_nacl_bed
20463 #undef bfd_elf32_bfd_link_hash_table_create
20464 #define bfd_elf32_bfd_link_hash_table_create \
20465 elf32_arm_nacl_link_hash_table_create
20466 #undef elf_backend_plt_alignment
20467 #define elf_backend_plt_alignment 4
20468 #undef elf_backend_modify_segment_map
20469 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
20470 #undef elf_backend_modify_headers
20471 #define elf_backend_modify_headers nacl_modify_headers
20472 #undef elf_backend_final_write_processing
20473 #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
20474 #undef bfd_elf32_get_synthetic_symtab
20475 #undef elf_backend_plt_sym_val
20476 #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
20477 #undef elf_backend_copy_special_section_fields
20479 #undef ELF_MINPAGESIZE
20480 #undef ELF_COMMONPAGESIZE
20482 #undef ELF_TARGET_OS
20483 #define ELF_TARGET_OS is_nacl
20485 #include "elf32-target.h"
20487 /* Reset to defaults. */
20488 #undef elf_backend_plt_alignment
20489 #undef elf_backend_modify_segment_map
20490 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
20491 #undef elf_backend_modify_headers
20492 #undef elf_backend_final_write_processing
20493 #define elf_backend_final_write_processing elf32_arm_final_write_processing
20494 #undef ELF_MINPAGESIZE
20495 #define ELF_MINPAGESIZE 0x1000
20496 #undef ELF_COMMONPAGESIZE
20497 #define ELF_COMMONPAGESIZE 0x1000
20500 /* FDPIC Targets. */
20502 #undef TARGET_LITTLE_SYM
20503 #define TARGET_LITTLE_SYM arm_elf32_fdpic_le_vec
20504 #undef TARGET_LITTLE_NAME
20505 #define TARGET_LITTLE_NAME "elf32-littlearm-fdpic"
20506 #undef TARGET_BIG_SYM
20507 #define TARGET_BIG_SYM arm_elf32_fdpic_be_vec
20508 #undef TARGET_BIG_NAME
20509 #define TARGET_BIG_NAME "elf32-bigarm-fdpic"
20510 #undef elf_match_priority
20511 #define elf_match_priority 128
20513 #define ELF_OSABI ELFOSABI_ARM_FDPIC
20515 /* Like elf32_arm_link_hash_table_create -- but overrides
20516 appropriately for FDPIC. */
20518 static struct bfd_link_hash_table
*
20519 elf32_arm_fdpic_link_hash_table_create (bfd
*abfd
)
20521 struct bfd_link_hash_table
*ret
;
20523 ret
= elf32_arm_link_hash_table_create (abfd
);
20526 struct elf32_arm_link_hash_table
*htab
= (struct elf32_arm_link_hash_table
*) ret
;
20533 /* We need dynamic symbols for every section, since segments can
20534 relocate independently. */
20536 elf32_arm_fdpic_omit_section_dynsym (bfd
*output_bfd ATTRIBUTE_UNUSED
,
20537 struct bfd_link_info
*info
20539 asection
*p ATTRIBUTE_UNUSED
)
20541 switch (elf_section_data (p
)->this_hdr
.sh_type
)
20545 /* If sh_type is yet undecided, assume it could be
20546 SHT_PROGBITS/SHT_NOBITS. */
20550 /* There shouldn't be section relative relocations
20551 against any other section. */
20558 #define elf32_bed elf32_arm_fdpic_bed
20560 #undef bfd_elf32_bfd_link_hash_table_create
20561 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_fdpic_link_hash_table_create
20563 #undef elf_backend_omit_section_dynsym
20564 #define elf_backend_omit_section_dynsym elf32_arm_fdpic_omit_section_dynsym
20566 #undef ELF_TARGET_OS
20568 #include "elf32-target.h"
20570 #undef elf_match_priority
20572 #undef elf_backend_omit_section_dynsym
20574 /* VxWorks Targets. */
20576 #undef TARGET_LITTLE_SYM
20577 #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec
20578 #undef TARGET_LITTLE_NAME
20579 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
20580 #undef TARGET_BIG_SYM
20581 #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec
20582 #undef TARGET_BIG_NAME
20583 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
20585 /* Like elf32_arm_link_hash_table_create -- but overrides
20586 appropriately for VxWorks. */
20588 static struct bfd_link_hash_table
*
20589 elf32_arm_vxworks_link_hash_table_create (bfd
*abfd
)
20591 struct bfd_link_hash_table
*ret
;
20593 ret
= elf32_arm_link_hash_table_create (abfd
);
20596 struct elf32_arm_link_hash_table
*htab
20597 = (struct elf32_arm_link_hash_table
*) ret
;
20604 elf32_arm_vxworks_final_write_processing (bfd
*abfd
)
20606 arm_final_write_processing (abfd
);
20607 return elf_vxworks_final_write_processing (abfd
);
20611 #define elf32_bed elf32_arm_vxworks_bed
20613 #undef bfd_elf32_bfd_link_hash_table_create
20614 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
20615 #undef elf_backend_final_write_processing
20616 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
20617 #undef elf_backend_emit_relocs
20618 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
20620 #undef elf_backend_may_use_rel_p
20621 #define elf_backend_may_use_rel_p 0
20622 #undef elf_backend_may_use_rela_p
20623 #define elf_backend_may_use_rela_p 1
20624 #undef elf_backend_default_use_rela_p
20625 #define elf_backend_default_use_rela_p 1
20626 #undef elf_backend_want_plt_sym
20627 #define elf_backend_want_plt_sym 1
20628 #undef ELF_MAXPAGESIZE
20629 #define ELF_MAXPAGESIZE 0x1000
20630 #undef ELF_TARGET_OS
20631 #define ELF_TARGET_OS is_vxworks
20633 #include "elf32-target.h"
20636 /* Merge backend specific data from an object file to the output
20637 object file when linking. */
20640 elf32_arm_merge_private_bfd_data (bfd
*ibfd
, struct bfd_link_info
*info
)
20642 bfd
*obfd
= info
->output_bfd
;
20643 flagword out_flags
;
20645 bfd_boolean flags_compatible
= TRUE
;
20648 /* Check if we have the same endianness. */
20649 if (! _bfd_generic_verify_endian_match (ibfd
, info
))
20652 if (! is_arm_elf (ibfd
) || ! is_arm_elf (obfd
))
20655 if (!elf32_arm_merge_eabi_attributes (ibfd
, info
))
20658 /* The input BFD must have had its flags initialised. */
20659 /* The following seems bogus to me -- The flags are initialized in
20660 the assembler but I don't think an elf_flags_init field is
20661 written into the object. */
20662 /* BFD_ASSERT (elf_flags_init (ibfd)); */
20664 in_flags
= elf_elfheader (ibfd
)->e_flags
;
20665 out_flags
= elf_elfheader (obfd
)->e_flags
;
20667 /* In theory there is no reason why we couldn't handle this. However
20668 in practice it isn't even close to working and there is no real
20669 reason to want it. */
20670 if (EF_ARM_EABI_VERSION (in_flags
) >= EF_ARM_EABI_VER4
20671 && !(ibfd
->flags
& DYNAMIC
)
20672 && (in_flags
& EF_ARM_BE8
))
20674 _bfd_error_handler (_("error: %pB is already in final BE8 format"),
20679 if (!elf_flags_init (obfd
))
20681 /* If the input is the default architecture and had the default
20682 flags then do not bother setting the flags for the output
20683 architecture, instead allow future merges to do this. If no
20684 future merges ever set these flags then they will retain their
20685 uninitialised values, which surprise surprise, correspond
20686 to the default values. */
20687 if (bfd_get_arch_info (ibfd
)->the_default
20688 && elf_elfheader (ibfd
)->e_flags
== 0)
20691 elf_flags_init (obfd
) = TRUE
;
20692 elf_elfheader (obfd
)->e_flags
= in_flags
;
20694 if (bfd_get_arch (obfd
) == bfd_get_arch (ibfd
)
20695 && bfd_get_arch_info (obfd
)->the_default
)
20696 return bfd_set_arch_mach (obfd
, bfd_get_arch (ibfd
), bfd_get_mach (ibfd
));
20701 /* Determine what should happen if the input ARM architecture
20702 does not match the output ARM architecture. */
20703 if (! bfd_arm_merge_machines (ibfd
, obfd
))
20706 /* Identical flags must be compatible. */
20707 if (in_flags
== out_flags
)
20710 /* Check to see if the input BFD actually contains any sections. If
20711 not, its flags may not have been initialised either, but it
20712 cannot actually cause any incompatiblity. Do not short-circuit
20713 dynamic objects; their section list may be emptied by
20714 elf_link_add_object_symbols.
20716 Also check to see if there are no code sections in the input.
20717 In this case there is no need to check for code specific flags.
20718 XXX - do we need to worry about floating-point format compatability
20719 in data sections ? */
20720 if (!(ibfd
->flags
& DYNAMIC
))
20722 bfd_boolean null_input_bfd
= TRUE
;
20723 bfd_boolean only_data_sections
= TRUE
;
20725 for (sec
= ibfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
20727 /* Ignore synthetic glue sections. */
20728 if (strcmp (sec
->name
, ".glue_7")
20729 && strcmp (sec
->name
, ".glue_7t"))
20731 if ((bfd_section_flags (sec
)
20732 & (SEC_LOAD
| SEC_CODE
| SEC_HAS_CONTENTS
))
20733 == (SEC_LOAD
| SEC_CODE
| SEC_HAS_CONTENTS
))
20734 only_data_sections
= FALSE
;
20736 null_input_bfd
= FALSE
;
20741 if (null_input_bfd
|| only_data_sections
)
20745 /* Complain about various flag mismatches. */
20746 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags
),
20747 EF_ARM_EABI_VERSION (out_flags
)))
20750 (_("error: source object %pB has EABI version %d, but target %pB has EABI version %d"),
20751 ibfd
, (in_flags
& EF_ARM_EABIMASK
) >> 24,
20752 obfd
, (out_flags
& EF_ARM_EABIMASK
) >> 24);
20756 /* Not sure what needs to be checked for EABI versions >= 1. */
20757 /* VxWorks libraries do not use these flags. */
20758 if (get_elf_backend_data (obfd
) != &elf32_arm_vxworks_bed
20759 && get_elf_backend_data (ibfd
) != &elf32_arm_vxworks_bed
20760 && EF_ARM_EABI_VERSION (in_flags
) == EF_ARM_EABI_UNKNOWN
)
20762 if ((in_flags
& EF_ARM_APCS_26
) != (out_flags
& EF_ARM_APCS_26
))
20765 (_("error: %pB is compiled for APCS-%d, whereas target %pB uses APCS-%d"),
20766 ibfd
, in_flags
& EF_ARM_APCS_26
? 26 : 32,
20767 obfd
, out_flags
& EF_ARM_APCS_26
? 26 : 32);
20768 flags_compatible
= FALSE
;
20771 if ((in_flags
& EF_ARM_APCS_FLOAT
) != (out_flags
& EF_ARM_APCS_FLOAT
))
20773 if (in_flags
& EF_ARM_APCS_FLOAT
)
20775 (_("error: %pB passes floats in float registers, whereas %pB passes them in integer registers"),
20779 (_("error: %pB passes floats in integer registers, whereas %pB passes them in float registers"),
20782 flags_compatible
= FALSE
;
20785 if ((in_flags
& EF_ARM_VFP_FLOAT
) != (out_flags
& EF_ARM_VFP_FLOAT
))
20787 if (in_flags
& EF_ARM_VFP_FLOAT
)
20789 (_("error: %pB uses %s instructions, whereas %pB does not"),
20790 ibfd
, "VFP", obfd
);
20793 (_("error: %pB uses %s instructions, whereas %pB does not"),
20794 ibfd
, "FPA", obfd
);
20796 flags_compatible
= FALSE
;
20799 if ((in_flags
& EF_ARM_MAVERICK_FLOAT
) != (out_flags
& EF_ARM_MAVERICK_FLOAT
))
20801 if (in_flags
& EF_ARM_MAVERICK_FLOAT
)
20803 (_("error: %pB uses %s instructions, whereas %pB does not"),
20804 ibfd
, "Maverick", obfd
);
20807 (_("error: %pB does not use %s instructions, whereas %pB does"),
20808 ibfd
, "Maverick", obfd
);
20810 flags_compatible
= FALSE
;
20813 #ifdef EF_ARM_SOFT_FLOAT
20814 if ((in_flags
& EF_ARM_SOFT_FLOAT
) != (out_flags
& EF_ARM_SOFT_FLOAT
))
20816 /* We can allow interworking between code that is VFP format
20817 layout, and uses either soft float or integer regs for
20818 passing floating point arguments and results. We already
20819 know that the APCS_FLOAT flags match; similarly for VFP
20821 if ((in_flags
& EF_ARM_APCS_FLOAT
) != 0
20822 || (in_flags
& EF_ARM_VFP_FLOAT
) == 0)
20824 if (in_flags
& EF_ARM_SOFT_FLOAT
)
20826 (_("error: %pB uses software FP, whereas %pB uses hardware FP"),
20830 (_("error: %pB uses hardware FP, whereas %pB uses software FP"),
20833 flags_compatible
= FALSE
;
20838 /* Interworking mismatch is only a warning. */
20839 if ((in_flags
& EF_ARM_INTERWORK
) != (out_flags
& EF_ARM_INTERWORK
))
20841 if (in_flags
& EF_ARM_INTERWORK
)
20844 (_("warning: %pB supports interworking, whereas %pB does not"),
20850 (_("warning: %pB does not support interworking, whereas %pB does"),
20856 return flags_compatible
;
20860 /* Symbian OS Targets. */
20862 #undef TARGET_LITTLE_SYM
20863 #define TARGET_LITTLE_SYM arm_elf32_symbian_le_vec
20864 #undef TARGET_LITTLE_NAME
20865 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
20866 #undef TARGET_BIG_SYM
20867 #define TARGET_BIG_SYM arm_elf32_symbian_be_vec
20868 #undef TARGET_BIG_NAME
20869 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
20871 /* Like elf32_arm_link_hash_table_create -- but overrides
20872 appropriately for Symbian OS. */
20874 static struct bfd_link_hash_table
*
20875 elf32_arm_symbian_link_hash_table_create (bfd
*abfd
)
20877 struct bfd_link_hash_table
*ret
;
20879 ret
= elf32_arm_link_hash_table_create (abfd
);
20882 struct elf32_arm_link_hash_table
*htab
20883 = (struct elf32_arm_link_hash_table
*)ret
;
20884 /* There is no PLT header for Symbian OS. */
20885 htab
->plt_header_size
= 0;
20886 /* The PLT entries are each one instruction and one word. */
20887 htab
->plt_entry_size
= 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry
);
20888 /* Symbian uses armv5t or above, so use_blx is always true. */
20890 htab
->root
.is_relocatable_executable
= 1;
20895 static const struct bfd_elf_special_section
20896 elf32_arm_symbian_special_sections
[] =
20898 /* In a BPABI executable, the dynamic linking sections do not go in
20899 the loadable read-only segment. The post-linker may wish to
20900 refer to these sections, but they are not part of the final
20902 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC
, 0 },
20903 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB
, 0 },
20904 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM
, 0 },
20905 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS
, 0 },
20906 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH
, 0 },
20907 /* These sections do not need to be writable as the SymbianOS
20908 postlinker will arrange things so that no dynamic relocation is
20910 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY
, SHF_ALLOC
},
20911 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY
, SHF_ALLOC
},
20912 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY
, SHF_ALLOC
},
20913 { NULL
, 0, 0, 0, 0 }
20917 elf32_arm_symbian_begin_write_processing (bfd
*abfd
,
20918 struct bfd_link_info
*link_info
)
20920 /* BPABI objects are never loaded directly by an OS kernel; they are
20921 processed by a postlinker first, into an OS-specific format. If
20922 the D_PAGED bit is set on the file, BFD will align segments on
20923 page boundaries, so that an OS can directly map the file. With
20924 BPABI objects, that just results in wasted space. In addition,
20925 because we clear the D_PAGED bit, map_sections_to_segments will
20926 recognize that the program headers should not be mapped into any
20927 loadable segment. */
20928 abfd
->flags
&= ~D_PAGED
;
20929 elf32_arm_begin_write_processing (abfd
, link_info
);
20933 elf32_arm_symbian_modify_segment_map (bfd
*abfd
,
20934 struct bfd_link_info
*info
)
20936 struct elf_segment_map
*m
;
20939 /* BPABI shared libraries and executables should have a PT_DYNAMIC
20940 segment. However, because the .dynamic section is not marked
20941 with SEC_LOAD, the generic ELF code will not create such a
20943 dynsec
= bfd_get_section_by_name (abfd
, ".dynamic");
20946 for (m
= elf_seg_map (abfd
); m
!= NULL
; m
= m
->next
)
20947 if (m
->p_type
== PT_DYNAMIC
)
20952 m
= _bfd_elf_make_dynamic_segment (abfd
, dynsec
);
20953 m
->next
= elf_seg_map (abfd
);
20954 elf_seg_map (abfd
) = m
;
20958 /* Also call the generic arm routine. */
20959 return elf32_arm_modify_segment_map (abfd
, info
);
20962 /* Return address for Ith PLT stub in section PLT, for relocation REL
20963 or (bfd_vma) -1 if it should not be included. */
20966 elf32_arm_symbian_plt_sym_val (bfd_vma i
, const asection
*plt
,
20967 const arelent
*rel ATTRIBUTE_UNUSED
)
20969 return plt
->vma
+ 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry
) * i
;
20973 #define elf32_bed elf32_arm_symbian_bed
20975 /* The dynamic sections are not allocated on SymbianOS; the postlinker
20976 will process them and then discard them. */
20977 #undef ELF_DYNAMIC_SEC_FLAGS
20978 #define ELF_DYNAMIC_SEC_FLAGS \
20979 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
20981 #undef elf_backend_emit_relocs
20983 #undef bfd_elf32_bfd_link_hash_table_create
20984 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
20985 #undef elf_backend_special_sections
20986 #define elf_backend_special_sections elf32_arm_symbian_special_sections
20987 #undef elf_backend_begin_write_processing
20988 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
20989 #undef elf_backend_final_write_processing
20990 #define elf_backend_final_write_processing elf32_arm_final_write_processing
20992 #undef elf_backend_modify_segment_map
20993 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
20995 /* There is no .got section for BPABI objects, and hence no header. */
20996 #undef elf_backend_got_header_size
20997 #define elf_backend_got_header_size 0
20999 /* Similarly, there is no .got.plt section. */
21000 #undef elf_backend_want_got_plt
21001 #define elf_backend_want_got_plt 0
21003 #undef elf_backend_plt_sym_val
21004 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
21006 #undef elf_backend_may_use_rel_p
21007 #define elf_backend_may_use_rel_p 1
21008 #undef elf_backend_may_use_rela_p
21009 #define elf_backend_may_use_rela_p 0
21010 #undef elf_backend_default_use_rela_p
21011 #define elf_backend_default_use_rela_p 0
21012 #undef elf_backend_want_plt_sym
21013 #define elf_backend_want_plt_sym 0
21014 #undef elf_backend_dtrel_excludes_plt
21015 #define elf_backend_dtrel_excludes_plt 0
21016 #undef ELF_MAXPAGESIZE
21017 #define ELF_MAXPAGESIZE 0x8000
21018 #undef ELF_TARGET_OS
21019 #define ELF_TARGET_OS is_symbian
21021 #include "elf32-target.h"