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[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
1 /* 32-bit ELF support for ARM
2 Copyright (C) 1998-2020 Free Software Foundation, Inc.
3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
20
21 #include "sysdep.h"
22 #include <limits.h>
23
24 #include "bfd.h"
25 #include "libiberty.h"
26 #include "libbfd.h"
27 #include "elf-bfd.h"
28 #include "elf-nacl.h"
29 #include "elf-vxworks.h"
30 #include "elf/arm.h"
31 #include "elf32-arm.h"
32 #include "cpu-arm.h"
33
34 /* Return the relocation section associated with NAME. HTAB is the
35 bfd's elf32_arm_link_hash_entry. */
36 #define RELOC_SECTION(HTAB, NAME) \
37 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
38
39 /* Return size of a relocation entry. HTAB is the bfd's
40 elf32_arm_link_hash_entry. */
41 #define RELOC_SIZE(HTAB) \
42 ((HTAB)->use_rel \
43 ? sizeof (Elf32_External_Rel) \
44 : sizeof (Elf32_External_Rela))
45
46 /* Return function to swap relocations in. HTAB is the bfd's
47 elf32_arm_link_hash_entry. */
48 #define SWAP_RELOC_IN(HTAB) \
49 ((HTAB)->use_rel \
50 ? bfd_elf32_swap_reloc_in \
51 : bfd_elf32_swap_reloca_in)
52
53 /* Return function to swap relocations out. HTAB is the bfd's
54 elf32_arm_link_hash_entry. */
55 #define SWAP_RELOC_OUT(HTAB) \
56 ((HTAB)->use_rel \
57 ? bfd_elf32_swap_reloc_out \
58 : bfd_elf32_swap_reloca_out)
59
60 #define elf_info_to_howto NULL
61 #define elf_info_to_howto_rel elf32_arm_info_to_howto
62
63 #define ARM_ELF_ABI_VERSION 0
64 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
65
66 /* The Adjusted Place, as defined by AAELF. */
67 #define Pa(X) ((X) & 0xfffffffc)
68
69 static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
70 struct bfd_link_info *link_info,
71 asection *sec,
72 bfd_byte *contents);
73
74 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
75 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
76 in that slot. */
77
78 static reloc_howto_type elf32_arm_howto_table_1[] =
79 {
80 /* No relocation. */
81 HOWTO (R_ARM_NONE, /* type */
82 0, /* rightshift */
83 3, /* size (0 = byte, 1 = short, 2 = long) */
84 0, /* bitsize */
85 FALSE, /* pc_relative */
86 0, /* bitpos */
87 complain_overflow_dont,/* complain_on_overflow */
88 bfd_elf_generic_reloc, /* special_function */
89 "R_ARM_NONE", /* name */
90 FALSE, /* partial_inplace */
91 0, /* src_mask */
92 0, /* dst_mask */
93 FALSE), /* pcrel_offset */
94
95 HOWTO (R_ARM_PC24, /* type */
96 2, /* rightshift */
97 2, /* size (0 = byte, 1 = short, 2 = long) */
98 24, /* bitsize */
99 TRUE, /* pc_relative */
100 0, /* bitpos */
101 complain_overflow_signed,/* complain_on_overflow */
102 bfd_elf_generic_reloc, /* special_function */
103 "R_ARM_PC24", /* name */
104 FALSE, /* partial_inplace */
105 0x00ffffff, /* src_mask */
106 0x00ffffff, /* dst_mask */
107 TRUE), /* pcrel_offset */
108
109 /* 32 bit absolute */
110 HOWTO (R_ARM_ABS32, /* type */
111 0, /* rightshift */
112 2, /* size (0 = byte, 1 = short, 2 = long) */
113 32, /* bitsize */
114 FALSE, /* pc_relative */
115 0, /* bitpos */
116 complain_overflow_bitfield,/* complain_on_overflow */
117 bfd_elf_generic_reloc, /* special_function */
118 "R_ARM_ABS32", /* name */
119 FALSE, /* partial_inplace */
120 0xffffffff, /* src_mask */
121 0xffffffff, /* dst_mask */
122 FALSE), /* pcrel_offset */
123
124 /* standard 32bit pc-relative reloc */
125 HOWTO (R_ARM_REL32, /* type */
126 0, /* rightshift */
127 2, /* size (0 = byte, 1 = short, 2 = long) */
128 32, /* bitsize */
129 TRUE, /* pc_relative */
130 0, /* bitpos */
131 complain_overflow_bitfield,/* complain_on_overflow */
132 bfd_elf_generic_reloc, /* special_function */
133 "R_ARM_REL32", /* name */
134 FALSE, /* partial_inplace */
135 0xffffffff, /* src_mask */
136 0xffffffff, /* dst_mask */
137 TRUE), /* pcrel_offset */
138
139 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
140 HOWTO (R_ARM_LDR_PC_G0, /* type */
141 0, /* rightshift */
142 0, /* size (0 = byte, 1 = short, 2 = long) */
143 32, /* bitsize */
144 TRUE, /* pc_relative */
145 0, /* bitpos */
146 complain_overflow_dont,/* complain_on_overflow */
147 bfd_elf_generic_reloc, /* special_function */
148 "R_ARM_LDR_PC_G0", /* name */
149 FALSE, /* partial_inplace */
150 0xffffffff, /* src_mask */
151 0xffffffff, /* dst_mask */
152 TRUE), /* pcrel_offset */
153
154 /* 16 bit absolute */
155 HOWTO (R_ARM_ABS16, /* type */
156 0, /* rightshift */
157 1, /* size (0 = byte, 1 = short, 2 = long) */
158 16, /* bitsize */
159 FALSE, /* pc_relative */
160 0, /* bitpos */
161 complain_overflow_bitfield,/* complain_on_overflow */
162 bfd_elf_generic_reloc, /* special_function */
163 "R_ARM_ABS16", /* name */
164 FALSE, /* partial_inplace */
165 0x0000ffff, /* src_mask */
166 0x0000ffff, /* dst_mask */
167 FALSE), /* pcrel_offset */
168
169 /* 12 bit absolute */
170 HOWTO (R_ARM_ABS12, /* type */
171 0, /* rightshift */
172 2, /* size (0 = byte, 1 = short, 2 = long) */
173 12, /* bitsize */
174 FALSE, /* pc_relative */
175 0, /* bitpos */
176 complain_overflow_bitfield,/* complain_on_overflow */
177 bfd_elf_generic_reloc, /* special_function */
178 "R_ARM_ABS12", /* name */
179 FALSE, /* partial_inplace */
180 0x00000fff, /* src_mask */
181 0x00000fff, /* dst_mask */
182 FALSE), /* pcrel_offset */
183
184 HOWTO (R_ARM_THM_ABS5, /* type */
185 6, /* rightshift */
186 1, /* size (0 = byte, 1 = short, 2 = long) */
187 5, /* bitsize */
188 FALSE, /* pc_relative */
189 0, /* bitpos */
190 complain_overflow_bitfield,/* complain_on_overflow */
191 bfd_elf_generic_reloc, /* special_function */
192 "R_ARM_THM_ABS5", /* name */
193 FALSE, /* partial_inplace */
194 0x000007e0, /* src_mask */
195 0x000007e0, /* dst_mask */
196 FALSE), /* pcrel_offset */
197
198 /* 8 bit absolute */
199 HOWTO (R_ARM_ABS8, /* type */
200 0, /* rightshift */
201 0, /* size (0 = byte, 1 = short, 2 = long) */
202 8, /* bitsize */
203 FALSE, /* pc_relative */
204 0, /* bitpos */
205 complain_overflow_bitfield,/* complain_on_overflow */
206 bfd_elf_generic_reloc, /* special_function */
207 "R_ARM_ABS8", /* name */
208 FALSE, /* partial_inplace */
209 0x000000ff, /* src_mask */
210 0x000000ff, /* dst_mask */
211 FALSE), /* pcrel_offset */
212
213 HOWTO (R_ARM_SBREL32, /* type */
214 0, /* rightshift */
215 2, /* size (0 = byte, 1 = short, 2 = long) */
216 32, /* bitsize */
217 FALSE, /* pc_relative */
218 0, /* bitpos */
219 complain_overflow_dont,/* complain_on_overflow */
220 bfd_elf_generic_reloc, /* special_function */
221 "R_ARM_SBREL32", /* name */
222 FALSE, /* partial_inplace */
223 0xffffffff, /* src_mask */
224 0xffffffff, /* dst_mask */
225 FALSE), /* pcrel_offset */
226
227 HOWTO (R_ARM_THM_CALL, /* type */
228 1, /* rightshift */
229 2, /* size (0 = byte, 1 = short, 2 = long) */
230 24, /* bitsize */
231 TRUE, /* pc_relative */
232 0, /* bitpos */
233 complain_overflow_signed,/* complain_on_overflow */
234 bfd_elf_generic_reloc, /* special_function */
235 "R_ARM_THM_CALL", /* name */
236 FALSE, /* partial_inplace */
237 0x07ff2fff, /* src_mask */
238 0x07ff2fff, /* dst_mask */
239 TRUE), /* pcrel_offset */
240
241 HOWTO (R_ARM_THM_PC8, /* type */
242 1, /* rightshift */
243 1, /* size (0 = byte, 1 = short, 2 = long) */
244 8, /* bitsize */
245 TRUE, /* pc_relative */
246 0, /* bitpos */
247 complain_overflow_signed,/* complain_on_overflow */
248 bfd_elf_generic_reloc, /* special_function */
249 "R_ARM_THM_PC8", /* name */
250 FALSE, /* partial_inplace */
251 0x000000ff, /* src_mask */
252 0x000000ff, /* dst_mask */
253 TRUE), /* pcrel_offset */
254
255 HOWTO (R_ARM_BREL_ADJ, /* type */
256 1, /* rightshift */
257 1, /* size (0 = byte, 1 = short, 2 = long) */
258 32, /* bitsize */
259 FALSE, /* pc_relative */
260 0, /* bitpos */
261 complain_overflow_signed,/* complain_on_overflow */
262 bfd_elf_generic_reloc, /* special_function */
263 "R_ARM_BREL_ADJ", /* name */
264 FALSE, /* partial_inplace */
265 0xffffffff, /* src_mask */
266 0xffffffff, /* dst_mask */
267 FALSE), /* pcrel_offset */
268
269 HOWTO (R_ARM_TLS_DESC, /* type */
270 0, /* rightshift */
271 2, /* size (0 = byte, 1 = short, 2 = long) */
272 32, /* bitsize */
273 FALSE, /* pc_relative */
274 0, /* bitpos */
275 complain_overflow_bitfield,/* complain_on_overflow */
276 bfd_elf_generic_reloc, /* special_function */
277 "R_ARM_TLS_DESC", /* name */
278 FALSE, /* partial_inplace */
279 0xffffffff, /* src_mask */
280 0xffffffff, /* dst_mask */
281 FALSE), /* pcrel_offset */
282
283 HOWTO (R_ARM_THM_SWI8, /* type */
284 0, /* rightshift */
285 0, /* size (0 = byte, 1 = short, 2 = long) */
286 0, /* bitsize */
287 FALSE, /* pc_relative */
288 0, /* bitpos */
289 complain_overflow_signed,/* complain_on_overflow */
290 bfd_elf_generic_reloc, /* special_function */
291 "R_ARM_SWI8", /* name */
292 FALSE, /* partial_inplace */
293 0x00000000, /* src_mask */
294 0x00000000, /* dst_mask */
295 FALSE), /* pcrel_offset */
296
297 /* BLX instruction for the ARM. */
298 HOWTO (R_ARM_XPC25, /* type */
299 2, /* rightshift */
300 2, /* size (0 = byte, 1 = short, 2 = long) */
301 24, /* bitsize */
302 TRUE, /* pc_relative */
303 0, /* bitpos */
304 complain_overflow_signed,/* complain_on_overflow */
305 bfd_elf_generic_reloc, /* special_function */
306 "R_ARM_XPC25", /* name */
307 FALSE, /* partial_inplace */
308 0x00ffffff, /* src_mask */
309 0x00ffffff, /* dst_mask */
310 TRUE), /* pcrel_offset */
311
312 /* BLX instruction for the Thumb. */
313 HOWTO (R_ARM_THM_XPC22, /* type */
314 2, /* rightshift */
315 2, /* size (0 = byte, 1 = short, 2 = long) */
316 24, /* bitsize */
317 TRUE, /* pc_relative */
318 0, /* bitpos */
319 complain_overflow_signed,/* complain_on_overflow */
320 bfd_elf_generic_reloc, /* special_function */
321 "R_ARM_THM_XPC22", /* name */
322 FALSE, /* partial_inplace */
323 0x07ff2fff, /* src_mask */
324 0x07ff2fff, /* dst_mask */
325 TRUE), /* pcrel_offset */
326
327 /* Dynamic TLS relocations. */
328
329 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
330 0, /* rightshift */
331 2, /* size (0 = byte, 1 = short, 2 = long) */
332 32, /* bitsize */
333 FALSE, /* pc_relative */
334 0, /* bitpos */
335 complain_overflow_bitfield,/* complain_on_overflow */
336 bfd_elf_generic_reloc, /* special_function */
337 "R_ARM_TLS_DTPMOD32", /* name */
338 TRUE, /* partial_inplace */
339 0xffffffff, /* src_mask */
340 0xffffffff, /* dst_mask */
341 FALSE), /* pcrel_offset */
342
343 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
344 0, /* rightshift */
345 2, /* size (0 = byte, 1 = short, 2 = long) */
346 32, /* bitsize */
347 FALSE, /* pc_relative */
348 0, /* bitpos */
349 complain_overflow_bitfield,/* complain_on_overflow */
350 bfd_elf_generic_reloc, /* special_function */
351 "R_ARM_TLS_DTPOFF32", /* name */
352 TRUE, /* partial_inplace */
353 0xffffffff, /* src_mask */
354 0xffffffff, /* dst_mask */
355 FALSE), /* pcrel_offset */
356
357 HOWTO (R_ARM_TLS_TPOFF32, /* type */
358 0, /* rightshift */
359 2, /* size (0 = byte, 1 = short, 2 = long) */
360 32, /* bitsize */
361 FALSE, /* pc_relative */
362 0, /* bitpos */
363 complain_overflow_bitfield,/* complain_on_overflow */
364 bfd_elf_generic_reloc, /* special_function */
365 "R_ARM_TLS_TPOFF32", /* name */
366 TRUE, /* partial_inplace */
367 0xffffffff, /* src_mask */
368 0xffffffff, /* dst_mask */
369 FALSE), /* pcrel_offset */
370
371 /* Relocs used in ARM Linux */
372
373 HOWTO (R_ARM_COPY, /* type */
374 0, /* rightshift */
375 2, /* size (0 = byte, 1 = short, 2 = long) */
376 32, /* bitsize */
377 FALSE, /* pc_relative */
378 0, /* bitpos */
379 complain_overflow_bitfield,/* complain_on_overflow */
380 bfd_elf_generic_reloc, /* special_function */
381 "R_ARM_COPY", /* name */
382 TRUE, /* partial_inplace */
383 0xffffffff, /* src_mask */
384 0xffffffff, /* dst_mask */
385 FALSE), /* pcrel_offset */
386
387 HOWTO (R_ARM_GLOB_DAT, /* type */
388 0, /* rightshift */
389 2, /* size (0 = byte, 1 = short, 2 = long) */
390 32, /* bitsize */
391 FALSE, /* pc_relative */
392 0, /* bitpos */
393 complain_overflow_bitfield,/* complain_on_overflow */
394 bfd_elf_generic_reloc, /* special_function */
395 "R_ARM_GLOB_DAT", /* name */
396 TRUE, /* partial_inplace */
397 0xffffffff, /* src_mask */
398 0xffffffff, /* dst_mask */
399 FALSE), /* pcrel_offset */
400
401 HOWTO (R_ARM_JUMP_SLOT, /* type */
402 0, /* rightshift */
403 2, /* size (0 = byte, 1 = short, 2 = long) */
404 32, /* bitsize */
405 FALSE, /* pc_relative */
406 0, /* bitpos */
407 complain_overflow_bitfield,/* complain_on_overflow */
408 bfd_elf_generic_reloc, /* special_function */
409 "R_ARM_JUMP_SLOT", /* name */
410 TRUE, /* partial_inplace */
411 0xffffffff, /* src_mask */
412 0xffffffff, /* dst_mask */
413 FALSE), /* pcrel_offset */
414
415 HOWTO (R_ARM_RELATIVE, /* type */
416 0, /* rightshift */
417 2, /* size (0 = byte, 1 = short, 2 = long) */
418 32, /* bitsize */
419 FALSE, /* pc_relative */
420 0, /* bitpos */
421 complain_overflow_bitfield,/* complain_on_overflow */
422 bfd_elf_generic_reloc, /* special_function */
423 "R_ARM_RELATIVE", /* name */
424 TRUE, /* partial_inplace */
425 0xffffffff, /* src_mask */
426 0xffffffff, /* dst_mask */
427 FALSE), /* pcrel_offset */
428
429 HOWTO (R_ARM_GOTOFF32, /* type */
430 0, /* rightshift */
431 2, /* size (0 = byte, 1 = short, 2 = long) */
432 32, /* bitsize */
433 FALSE, /* pc_relative */
434 0, /* bitpos */
435 complain_overflow_bitfield,/* complain_on_overflow */
436 bfd_elf_generic_reloc, /* special_function */
437 "R_ARM_GOTOFF32", /* name */
438 TRUE, /* partial_inplace */
439 0xffffffff, /* src_mask */
440 0xffffffff, /* dst_mask */
441 FALSE), /* pcrel_offset */
442
443 HOWTO (R_ARM_GOTPC, /* type */
444 0, /* rightshift */
445 2, /* size (0 = byte, 1 = short, 2 = long) */
446 32, /* bitsize */
447 TRUE, /* pc_relative */
448 0, /* bitpos */
449 complain_overflow_bitfield,/* complain_on_overflow */
450 bfd_elf_generic_reloc, /* special_function */
451 "R_ARM_GOTPC", /* name */
452 TRUE, /* partial_inplace */
453 0xffffffff, /* src_mask */
454 0xffffffff, /* dst_mask */
455 TRUE), /* pcrel_offset */
456
457 HOWTO (R_ARM_GOT32, /* type */
458 0, /* rightshift */
459 2, /* size (0 = byte, 1 = short, 2 = long) */
460 32, /* bitsize */
461 FALSE, /* pc_relative */
462 0, /* bitpos */
463 complain_overflow_bitfield,/* complain_on_overflow */
464 bfd_elf_generic_reloc, /* special_function */
465 "R_ARM_GOT32", /* name */
466 TRUE, /* partial_inplace */
467 0xffffffff, /* src_mask */
468 0xffffffff, /* dst_mask */
469 FALSE), /* pcrel_offset */
470
471 HOWTO (R_ARM_PLT32, /* type */
472 2, /* rightshift */
473 2, /* size (0 = byte, 1 = short, 2 = long) */
474 24, /* bitsize */
475 TRUE, /* pc_relative */
476 0, /* bitpos */
477 complain_overflow_bitfield,/* complain_on_overflow */
478 bfd_elf_generic_reloc, /* special_function */
479 "R_ARM_PLT32", /* name */
480 FALSE, /* partial_inplace */
481 0x00ffffff, /* src_mask */
482 0x00ffffff, /* dst_mask */
483 TRUE), /* pcrel_offset */
484
485 HOWTO (R_ARM_CALL, /* type */
486 2, /* rightshift */
487 2, /* size (0 = byte, 1 = short, 2 = long) */
488 24, /* bitsize */
489 TRUE, /* pc_relative */
490 0, /* bitpos */
491 complain_overflow_signed,/* complain_on_overflow */
492 bfd_elf_generic_reloc, /* special_function */
493 "R_ARM_CALL", /* name */
494 FALSE, /* partial_inplace */
495 0x00ffffff, /* src_mask */
496 0x00ffffff, /* dst_mask */
497 TRUE), /* pcrel_offset */
498
499 HOWTO (R_ARM_JUMP24, /* type */
500 2, /* rightshift */
501 2, /* size (0 = byte, 1 = short, 2 = long) */
502 24, /* bitsize */
503 TRUE, /* pc_relative */
504 0, /* bitpos */
505 complain_overflow_signed,/* complain_on_overflow */
506 bfd_elf_generic_reloc, /* special_function */
507 "R_ARM_JUMP24", /* name */
508 FALSE, /* partial_inplace */
509 0x00ffffff, /* src_mask */
510 0x00ffffff, /* dst_mask */
511 TRUE), /* pcrel_offset */
512
513 HOWTO (R_ARM_THM_JUMP24, /* type */
514 1, /* rightshift */
515 2, /* size (0 = byte, 1 = short, 2 = long) */
516 24, /* bitsize */
517 TRUE, /* pc_relative */
518 0, /* bitpos */
519 complain_overflow_signed,/* complain_on_overflow */
520 bfd_elf_generic_reloc, /* special_function */
521 "R_ARM_THM_JUMP24", /* name */
522 FALSE, /* partial_inplace */
523 0x07ff2fff, /* src_mask */
524 0x07ff2fff, /* dst_mask */
525 TRUE), /* pcrel_offset */
526
527 HOWTO (R_ARM_BASE_ABS, /* type */
528 0, /* rightshift */
529 2, /* size (0 = byte, 1 = short, 2 = long) */
530 32, /* bitsize */
531 FALSE, /* pc_relative */
532 0, /* bitpos */
533 complain_overflow_dont,/* complain_on_overflow */
534 bfd_elf_generic_reloc, /* special_function */
535 "R_ARM_BASE_ABS", /* name */
536 FALSE, /* partial_inplace */
537 0xffffffff, /* src_mask */
538 0xffffffff, /* dst_mask */
539 FALSE), /* pcrel_offset */
540
541 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
542 0, /* rightshift */
543 2, /* size (0 = byte, 1 = short, 2 = long) */
544 12, /* bitsize */
545 TRUE, /* pc_relative */
546 0, /* bitpos */
547 complain_overflow_dont,/* complain_on_overflow */
548 bfd_elf_generic_reloc, /* special_function */
549 "R_ARM_ALU_PCREL_7_0", /* name */
550 FALSE, /* partial_inplace */
551 0x00000fff, /* src_mask */
552 0x00000fff, /* dst_mask */
553 TRUE), /* pcrel_offset */
554
555 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
556 0, /* rightshift */
557 2, /* size (0 = byte, 1 = short, 2 = long) */
558 12, /* bitsize */
559 TRUE, /* pc_relative */
560 8, /* bitpos */
561 complain_overflow_dont,/* complain_on_overflow */
562 bfd_elf_generic_reloc, /* special_function */
563 "R_ARM_ALU_PCREL_15_8",/* name */
564 FALSE, /* partial_inplace */
565 0x00000fff, /* src_mask */
566 0x00000fff, /* dst_mask */
567 TRUE), /* pcrel_offset */
568
569 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
570 0, /* rightshift */
571 2, /* size (0 = byte, 1 = short, 2 = long) */
572 12, /* bitsize */
573 TRUE, /* pc_relative */
574 16, /* bitpos */
575 complain_overflow_dont,/* complain_on_overflow */
576 bfd_elf_generic_reloc, /* special_function */
577 "R_ARM_ALU_PCREL_23_15",/* name */
578 FALSE, /* partial_inplace */
579 0x00000fff, /* src_mask */
580 0x00000fff, /* dst_mask */
581 TRUE), /* pcrel_offset */
582
583 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
584 0, /* rightshift */
585 2, /* size (0 = byte, 1 = short, 2 = long) */
586 12, /* bitsize */
587 FALSE, /* pc_relative */
588 0, /* bitpos */
589 complain_overflow_dont,/* complain_on_overflow */
590 bfd_elf_generic_reloc, /* special_function */
591 "R_ARM_LDR_SBREL_11_0",/* name */
592 FALSE, /* partial_inplace */
593 0x00000fff, /* src_mask */
594 0x00000fff, /* dst_mask */
595 FALSE), /* pcrel_offset */
596
597 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
598 0, /* rightshift */
599 2, /* size (0 = byte, 1 = short, 2 = long) */
600 8, /* bitsize */
601 FALSE, /* pc_relative */
602 12, /* bitpos */
603 complain_overflow_dont,/* complain_on_overflow */
604 bfd_elf_generic_reloc, /* special_function */
605 "R_ARM_ALU_SBREL_19_12",/* name */
606 FALSE, /* partial_inplace */
607 0x000ff000, /* src_mask */
608 0x000ff000, /* dst_mask */
609 FALSE), /* pcrel_offset */
610
611 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
612 0, /* rightshift */
613 2, /* size (0 = byte, 1 = short, 2 = long) */
614 8, /* bitsize */
615 FALSE, /* pc_relative */
616 20, /* bitpos */
617 complain_overflow_dont,/* complain_on_overflow */
618 bfd_elf_generic_reloc, /* special_function */
619 "R_ARM_ALU_SBREL_27_20",/* name */
620 FALSE, /* partial_inplace */
621 0x0ff00000, /* src_mask */
622 0x0ff00000, /* dst_mask */
623 FALSE), /* pcrel_offset */
624
625 HOWTO (R_ARM_TARGET1, /* type */
626 0, /* rightshift */
627 2, /* size (0 = byte, 1 = short, 2 = long) */
628 32, /* bitsize */
629 FALSE, /* pc_relative */
630 0, /* bitpos */
631 complain_overflow_dont,/* complain_on_overflow */
632 bfd_elf_generic_reloc, /* special_function */
633 "R_ARM_TARGET1", /* name */
634 FALSE, /* partial_inplace */
635 0xffffffff, /* src_mask */
636 0xffffffff, /* dst_mask */
637 FALSE), /* pcrel_offset */
638
639 HOWTO (R_ARM_ROSEGREL32, /* type */
640 0, /* rightshift */
641 2, /* size (0 = byte, 1 = short, 2 = long) */
642 32, /* bitsize */
643 FALSE, /* pc_relative */
644 0, /* bitpos */
645 complain_overflow_dont,/* complain_on_overflow */
646 bfd_elf_generic_reloc, /* special_function */
647 "R_ARM_ROSEGREL32", /* name */
648 FALSE, /* partial_inplace */
649 0xffffffff, /* src_mask */
650 0xffffffff, /* dst_mask */
651 FALSE), /* pcrel_offset */
652
653 HOWTO (R_ARM_V4BX, /* type */
654 0, /* rightshift */
655 2, /* size (0 = byte, 1 = short, 2 = long) */
656 32, /* bitsize */
657 FALSE, /* pc_relative */
658 0, /* bitpos */
659 complain_overflow_dont,/* complain_on_overflow */
660 bfd_elf_generic_reloc, /* special_function */
661 "R_ARM_V4BX", /* name */
662 FALSE, /* partial_inplace */
663 0xffffffff, /* src_mask */
664 0xffffffff, /* dst_mask */
665 FALSE), /* pcrel_offset */
666
667 HOWTO (R_ARM_TARGET2, /* type */
668 0, /* rightshift */
669 2, /* size (0 = byte, 1 = short, 2 = long) */
670 32, /* bitsize */
671 FALSE, /* pc_relative */
672 0, /* bitpos */
673 complain_overflow_signed,/* complain_on_overflow */
674 bfd_elf_generic_reloc, /* special_function */
675 "R_ARM_TARGET2", /* name */
676 FALSE, /* partial_inplace */
677 0xffffffff, /* src_mask */
678 0xffffffff, /* dst_mask */
679 TRUE), /* pcrel_offset */
680
681 HOWTO (R_ARM_PREL31, /* type */
682 0, /* rightshift */
683 2, /* size (0 = byte, 1 = short, 2 = long) */
684 31, /* bitsize */
685 TRUE, /* pc_relative */
686 0, /* bitpos */
687 complain_overflow_signed,/* complain_on_overflow */
688 bfd_elf_generic_reloc, /* special_function */
689 "R_ARM_PREL31", /* name */
690 FALSE, /* partial_inplace */
691 0x7fffffff, /* src_mask */
692 0x7fffffff, /* dst_mask */
693 TRUE), /* pcrel_offset */
694
695 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
696 0, /* rightshift */
697 2, /* size (0 = byte, 1 = short, 2 = long) */
698 16, /* bitsize */
699 FALSE, /* pc_relative */
700 0, /* bitpos */
701 complain_overflow_dont,/* complain_on_overflow */
702 bfd_elf_generic_reloc, /* special_function */
703 "R_ARM_MOVW_ABS_NC", /* name */
704 FALSE, /* partial_inplace */
705 0x000f0fff, /* src_mask */
706 0x000f0fff, /* dst_mask */
707 FALSE), /* pcrel_offset */
708
709 HOWTO (R_ARM_MOVT_ABS, /* type */
710 0, /* rightshift */
711 2, /* size (0 = byte, 1 = short, 2 = long) */
712 16, /* bitsize */
713 FALSE, /* pc_relative */
714 0, /* bitpos */
715 complain_overflow_bitfield,/* complain_on_overflow */
716 bfd_elf_generic_reloc, /* special_function */
717 "R_ARM_MOVT_ABS", /* name */
718 FALSE, /* partial_inplace */
719 0x000f0fff, /* src_mask */
720 0x000f0fff, /* dst_mask */
721 FALSE), /* pcrel_offset */
722
723 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
724 0, /* rightshift */
725 2, /* size (0 = byte, 1 = short, 2 = long) */
726 16, /* bitsize */
727 TRUE, /* pc_relative */
728 0, /* bitpos */
729 complain_overflow_dont,/* complain_on_overflow */
730 bfd_elf_generic_reloc, /* special_function */
731 "R_ARM_MOVW_PREL_NC", /* name */
732 FALSE, /* partial_inplace */
733 0x000f0fff, /* src_mask */
734 0x000f0fff, /* dst_mask */
735 TRUE), /* pcrel_offset */
736
737 HOWTO (R_ARM_MOVT_PREL, /* type */
738 0, /* rightshift */
739 2, /* size (0 = byte, 1 = short, 2 = long) */
740 16, /* bitsize */
741 TRUE, /* pc_relative */
742 0, /* bitpos */
743 complain_overflow_bitfield,/* complain_on_overflow */
744 bfd_elf_generic_reloc, /* special_function */
745 "R_ARM_MOVT_PREL", /* name */
746 FALSE, /* partial_inplace */
747 0x000f0fff, /* src_mask */
748 0x000f0fff, /* dst_mask */
749 TRUE), /* pcrel_offset */
750
751 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
752 0, /* rightshift */
753 2, /* size (0 = byte, 1 = short, 2 = long) */
754 16, /* bitsize */
755 FALSE, /* pc_relative */
756 0, /* bitpos */
757 complain_overflow_dont,/* complain_on_overflow */
758 bfd_elf_generic_reloc, /* special_function */
759 "R_ARM_THM_MOVW_ABS_NC",/* name */
760 FALSE, /* partial_inplace */
761 0x040f70ff, /* src_mask */
762 0x040f70ff, /* dst_mask */
763 FALSE), /* pcrel_offset */
764
765 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
766 0, /* rightshift */
767 2, /* size (0 = byte, 1 = short, 2 = long) */
768 16, /* bitsize */
769 FALSE, /* pc_relative */
770 0, /* bitpos */
771 complain_overflow_bitfield,/* complain_on_overflow */
772 bfd_elf_generic_reloc, /* special_function */
773 "R_ARM_THM_MOVT_ABS", /* name */
774 FALSE, /* partial_inplace */
775 0x040f70ff, /* src_mask */
776 0x040f70ff, /* dst_mask */
777 FALSE), /* pcrel_offset */
778
779 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
780 0, /* rightshift */
781 2, /* size (0 = byte, 1 = short, 2 = long) */
782 16, /* bitsize */
783 TRUE, /* pc_relative */
784 0, /* bitpos */
785 complain_overflow_dont,/* complain_on_overflow */
786 bfd_elf_generic_reloc, /* special_function */
787 "R_ARM_THM_MOVW_PREL_NC",/* name */
788 FALSE, /* partial_inplace */
789 0x040f70ff, /* src_mask */
790 0x040f70ff, /* dst_mask */
791 TRUE), /* pcrel_offset */
792
793 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
794 0, /* rightshift */
795 2, /* size (0 = byte, 1 = short, 2 = long) */
796 16, /* bitsize */
797 TRUE, /* pc_relative */
798 0, /* bitpos */
799 complain_overflow_bitfield,/* complain_on_overflow */
800 bfd_elf_generic_reloc, /* special_function */
801 "R_ARM_THM_MOVT_PREL", /* name */
802 FALSE, /* partial_inplace */
803 0x040f70ff, /* src_mask */
804 0x040f70ff, /* dst_mask */
805 TRUE), /* pcrel_offset */
806
807 HOWTO (R_ARM_THM_JUMP19, /* type */
808 1, /* rightshift */
809 2, /* size (0 = byte, 1 = short, 2 = long) */
810 19, /* bitsize */
811 TRUE, /* pc_relative */
812 0, /* bitpos */
813 complain_overflow_signed,/* complain_on_overflow */
814 bfd_elf_generic_reloc, /* special_function */
815 "R_ARM_THM_JUMP19", /* name */
816 FALSE, /* partial_inplace */
817 0x043f2fff, /* src_mask */
818 0x043f2fff, /* dst_mask */
819 TRUE), /* pcrel_offset */
820
821 HOWTO (R_ARM_THM_JUMP6, /* type */
822 1, /* rightshift */
823 1, /* size (0 = byte, 1 = short, 2 = long) */
824 6, /* bitsize */
825 TRUE, /* pc_relative */
826 0, /* bitpos */
827 complain_overflow_unsigned,/* complain_on_overflow */
828 bfd_elf_generic_reloc, /* special_function */
829 "R_ARM_THM_JUMP6", /* name */
830 FALSE, /* partial_inplace */
831 0x02f8, /* src_mask */
832 0x02f8, /* dst_mask */
833 TRUE), /* pcrel_offset */
834
835 /* These are declared as 13-bit signed relocations because we can
836 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
837 versa. */
838 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
839 0, /* rightshift */
840 2, /* size (0 = byte, 1 = short, 2 = long) */
841 13, /* bitsize */
842 TRUE, /* pc_relative */
843 0, /* bitpos */
844 complain_overflow_dont,/* complain_on_overflow */
845 bfd_elf_generic_reloc, /* special_function */
846 "R_ARM_THM_ALU_PREL_11_0",/* name */
847 FALSE, /* partial_inplace */
848 0xffffffff, /* src_mask */
849 0xffffffff, /* dst_mask */
850 TRUE), /* pcrel_offset */
851
852 HOWTO (R_ARM_THM_PC12, /* type */
853 0, /* rightshift */
854 2, /* size (0 = byte, 1 = short, 2 = long) */
855 13, /* bitsize */
856 TRUE, /* pc_relative */
857 0, /* bitpos */
858 complain_overflow_dont,/* complain_on_overflow */
859 bfd_elf_generic_reloc, /* special_function */
860 "R_ARM_THM_PC12", /* name */
861 FALSE, /* partial_inplace */
862 0xffffffff, /* src_mask */
863 0xffffffff, /* dst_mask */
864 TRUE), /* pcrel_offset */
865
866 HOWTO (R_ARM_ABS32_NOI, /* type */
867 0, /* rightshift */
868 2, /* size (0 = byte, 1 = short, 2 = long) */
869 32, /* bitsize */
870 FALSE, /* pc_relative */
871 0, /* bitpos */
872 complain_overflow_dont,/* complain_on_overflow */
873 bfd_elf_generic_reloc, /* special_function */
874 "R_ARM_ABS32_NOI", /* name */
875 FALSE, /* partial_inplace */
876 0xffffffff, /* src_mask */
877 0xffffffff, /* dst_mask */
878 FALSE), /* pcrel_offset */
879
880 HOWTO (R_ARM_REL32_NOI, /* type */
881 0, /* rightshift */
882 2, /* size (0 = byte, 1 = short, 2 = long) */
883 32, /* bitsize */
884 TRUE, /* pc_relative */
885 0, /* bitpos */
886 complain_overflow_dont,/* complain_on_overflow */
887 bfd_elf_generic_reloc, /* special_function */
888 "R_ARM_REL32_NOI", /* name */
889 FALSE, /* partial_inplace */
890 0xffffffff, /* src_mask */
891 0xffffffff, /* dst_mask */
892 FALSE), /* pcrel_offset */
893
894 /* Group relocations. */
895
896 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
897 0, /* rightshift */
898 2, /* size (0 = byte, 1 = short, 2 = long) */
899 32, /* bitsize */
900 TRUE, /* pc_relative */
901 0, /* bitpos */
902 complain_overflow_dont,/* complain_on_overflow */
903 bfd_elf_generic_reloc, /* special_function */
904 "R_ARM_ALU_PC_G0_NC", /* name */
905 FALSE, /* partial_inplace */
906 0xffffffff, /* src_mask */
907 0xffffffff, /* dst_mask */
908 TRUE), /* pcrel_offset */
909
910 HOWTO (R_ARM_ALU_PC_G0, /* type */
911 0, /* rightshift */
912 2, /* size (0 = byte, 1 = short, 2 = long) */
913 32, /* bitsize */
914 TRUE, /* pc_relative */
915 0, /* bitpos */
916 complain_overflow_dont,/* complain_on_overflow */
917 bfd_elf_generic_reloc, /* special_function */
918 "R_ARM_ALU_PC_G0", /* name */
919 FALSE, /* partial_inplace */
920 0xffffffff, /* src_mask */
921 0xffffffff, /* dst_mask */
922 TRUE), /* pcrel_offset */
923
924 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
925 0, /* rightshift */
926 2, /* size (0 = byte, 1 = short, 2 = long) */
927 32, /* bitsize */
928 TRUE, /* pc_relative */
929 0, /* bitpos */
930 complain_overflow_dont,/* complain_on_overflow */
931 bfd_elf_generic_reloc, /* special_function */
932 "R_ARM_ALU_PC_G1_NC", /* name */
933 FALSE, /* partial_inplace */
934 0xffffffff, /* src_mask */
935 0xffffffff, /* dst_mask */
936 TRUE), /* pcrel_offset */
937
938 HOWTO (R_ARM_ALU_PC_G1, /* type */
939 0, /* rightshift */
940 2, /* size (0 = byte, 1 = short, 2 = long) */
941 32, /* bitsize */
942 TRUE, /* pc_relative */
943 0, /* bitpos */
944 complain_overflow_dont,/* complain_on_overflow */
945 bfd_elf_generic_reloc, /* special_function */
946 "R_ARM_ALU_PC_G1", /* name */
947 FALSE, /* partial_inplace */
948 0xffffffff, /* src_mask */
949 0xffffffff, /* dst_mask */
950 TRUE), /* pcrel_offset */
951
952 HOWTO (R_ARM_ALU_PC_G2, /* type */
953 0, /* rightshift */
954 2, /* size (0 = byte, 1 = short, 2 = long) */
955 32, /* bitsize */
956 TRUE, /* pc_relative */
957 0, /* bitpos */
958 complain_overflow_dont,/* complain_on_overflow */
959 bfd_elf_generic_reloc, /* special_function */
960 "R_ARM_ALU_PC_G2", /* name */
961 FALSE, /* partial_inplace */
962 0xffffffff, /* src_mask */
963 0xffffffff, /* dst_mask */
964 TRUE), /* pcrel_offset */
965
966 HOWTO (R_ARM_LDR_PC_G1, /* type */
967 0, /* rightshift */
968 2, /* size (0 = byte, 1 = short, 2 = long) */
969 32, /* bitsize */
970 TRUE, /* pc_relative */
971 0, /* bitpos */
972 complain_overflow_dont,/* complain_on_overflow */
973 bfd_elf_generic_reloc, /* special_function */
974 "R_ARM_LDR_PC_G1", /* name */
975 FALSE, /* partial_inplace */
976 0xffffffff, /* src_mask */
977 0xffffffff, /* dst_mask */
978 TRUE), /* pcrel_offset */
979
980 HOWTO (R_ARM_LDR_PC_G2, /* type */
981 0, /* rightshift */
982 2, /* size (0 = byte, 1 = short, 2 = long) */
983 32, /* bitsize */
984 TRUE, /* pc_relative */
985 0, /* bitpos */
986 complain_overflow_dont,/* complain_on_overflow */
987 bfd_elf_generic_reloc, /* special_function */
988 "R_ARM_LDR_PC_G2", /* name */
989 FALSE, /* partial_inplace */
990 0xffffffff, /* src_mask */
991 0xffffffff, /* dst_mask */
992 TRUE), /* pcrel_offset */
993
994 HOWTO (R_ARM_LDRS_PC_G0, /* type */
995 0, /* rightshift */
996 2, /* size (0 = byte, 1 = short, 2 = long) */
997 32, /* bitsize */
998 TRUE, /* pc_relative */
999 0, /* bitpos */
1000 complain_overflow_dont,/* complain_on_overflow */
1001 bfd_elf_generic_reloc, /* special_function */
1002 "R_ARM_LDRS_PC_G0", /* name */
1003 FALSE, /* partial_inplace */
1004 0xffffffff, /* src_mask */
1005 0xffffffff, /* dst_mask */
1006 TRUE), /* pcrel_offset */
1007
1008 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1009 0, /* rightshift */
1010 2, /* size (0 = byte, 1 = short, 2 = long) */
1011 32, /* bitsize */
1012 TRUE, /* pc_relative */
1013 0, /* bitpos */
1014 complain_overflow_dont,/* complain_on_overflow */
1015 bfd_elf_generic_reloc, /* special_function */
1016 "R_ARM_LDRS_PC_G1", /* name */
1017 FALSE, /* partial_inplace */
1018 0xffffffff, /* src_mask */
1019 0xffffffff, /* dst_mask */
1020 TRUE), /* pcrel_offset */
1021
1022 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1023 0, /* rightshift */
1024 2, /* size (0 = byte, 1 = short, 2 = long) */
1025 32, /* bitsize */
1026 TRUE, /* pc_relative */
1027 0, /* bitpos */
1028 complain_overflow_dont,/* complain_on_overflow */
1029 bfd_elf_generic_reloc, /* special_function */
1030 "R_ARM_LDRS_PC_G2", /* name */
1031 FALSE, /* partial_inplace */
1032 0xffffffff, /* src_mask */
1033 0xffffffff, /* dst_mask */
1034 TRUE), /* pcrel_offset */
1035
1036 HOWTO (R_ARM_LDC_PC_G0, /* type */
1037 0, /* rightshift */
1038 2, /* size (0 = byte, 1 = short, 2 = long) */
1039 32, /* bitsize */
1040 TRUE, /* pc_relative */
1041 0, /* bitpos */
1042 complain_overflow_dont,/* complain_on_overflow */
1043 bfd_elf_generic_reloc, /* special_function */
1044 "R_ARM_LDC_PC_G0", /* name */
1045 FALSE, /* partial_inplace */
1046 0xffffffff, /* src_mask */
1047 0xffffffff, /* dst_mask */
1048 TRUE), /* pcrel_offset */
1049
1050 HOWTO (R_ARM_LDC_PC_G1, /* type */
1051 0, /* rightshift */
1052 2, /* size (0 = byte, 1 = short, 2 = long) */
1053 32, /* bitsize */
1054 TRUE, /* pc_relative */
1055 0, /* bitpos */
1056 complain_overflow_dont,/* complain_on_overflow */
1057 bfd_elf_generic_reloc, /* special_function */
1058 "R_ARM_LDC_PC_G1", /* name */
1059 FALSE, /* partial_inplace */
1060 0xffffffff, /* src_mask */
1061 0xffffffff, /* dst_mask */
1062 TRUE), /* pcrel_offset */
1063
1064 HOWTO (R_ARM_LDC_PC_G2, /* type */
1065 0, /* rightshift */
1066 2, /* size (0 = byte, 1 = short, 2 = long) */
1067 32, /* bitsize */
1068 TRUE, /* pc_relative */
1069 0, /* bitpos */
1070 complain_overflow_dont,/* complain_on_overflow */
1071 bfd_elf_generic_reloc, /* special_function */
1072 "R_ARM_LDC_PC_G2", /* name */
1073 FALSE, /* partial_inplace */
1074 0xffffffff, /* src_mask */
1075 0xffffffff, /* dst_mask */
1076 TRUE), /* pcrel_offset */
1077
1078 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1079 0, /* rightshift */
1080 2, /* size (0 = byte, 1 = short, 2 = long) */
1081 32, /* bitsize */
1082 TRUE, /* pc_relative */
1083 0, /* bitpos */
1084 complain_overflow_dont,/* complain_on_overflow */
1085 bfd_elf_generic_reloc, /* special_function */
1086 "R_ARM_ALU_SB_G0_NC", /* name */
1087 FALSE, /* partial_inplace */
1088 0xffffffff, /* src_mask */
1089 0xffffffff, /* dst_mask */
1090 TRUE), /* pcrel_offset */
1091
1092 HOWTO (R_ARM_ALU_SB_G0, /* type */
1093 0, /* rightshift */
1094 2, /* size (0 = byte, 1 = short, 2 = long) */
1095 32, /* bitsize */
1096 TRUE, /* pc_relative */
1097 0, /* bitpos */
1098 complain_overflow_dont,/* complain_on_overflow */
1099 bfd_elf_generic_reloc, /* special_function */
1100 "R_ARM_ALU_SB_G0", /* name */
1101 FALSE, /* partial_inplace */
1102 0xffffffff, /* src_mask */
1103 0xffffffff, /* dst_mask */
1104 TRUE), /* pcrel_offset */
1105
1106 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1107 0, /* rightshift */
1108 2, /* size (0 = byte, 1 = short, 2 = long) */
1109 32, /* bitsize */
1110 TRUE, /* pc_relative */
1111 0, /* bitpos */
1112 complain_overflow_dont,/* complain_on_overflow */
1113 bfd_elf_generic_reloc, /* special_function */
1114 "R_ARM_ALU_SB_G1_NC", /* name */
1115 FALSE, /* partial_inplace */
1116 0xffffffff, /* src_mask */
1117 0xffffffff, /* dst_mask */
1118 TRUE), /* pcrel_offset */
1119
1120 HOWTO (R_ARM_ALU_SB_G1, /* type */
1121 0, /* rightshift */
1122 2, /* size (0 = byte, 1 = short, 2 = long) */
1123 32, /* bitsize */
1124 TRUE, /* pc_relative */
1125 0, /* bitpos */
1126 complain_overflow_dont,/* complain_on_overflow */
1127 bfd_elf_generic_reloc, /* special_function */
1128 "R_ARM_ALU_SB_G1", /* name */
1129 FALSE, /* partial_inplace */
1130 0xffffffff, /* src_mask */
1131 0xffffffff, /* dst_mask */
1132 TRUE), /* pcrel_offset */
1133
1134 HOWTO (R_ARM_ALU_SB_G2, /* type */
1135 0, /* rightshift */
1136 2, /* size (0 = byte, 1 = short, 2 = long) */
1137 32, /* bitsize */
1138 TRUE, /* pc_relative */
1139 0, /* bitpos */
1140 complain_overflow_dont,/* complain_on_overflow */
1141 bfd_elf_generic_reloc, /* special_function */
1142 "R_ARM_ALU_SB_G2", /* name */
1143 FALSE, /* partial_inplace */
1144 0xffffffff, /* src_mask */
1145 0xffffffff, /* dst_mask */
1146 TRUE), /* pcrel_offset */
1147
1148 HOWTO (R_ARM_LDR_SB_G0, /* type */
1149 0, /* rightshift */
1150 2, /* size (0 = byte, 1 = short, 2 = long) */
1151 32, /* bitsize */
1152 TRUE, /* pc_relative */
1153 0, /* bitpos */
1154 complain_overflow_dont,/* complain_on_overflow */
1155 bfd_elf_generic_reloc, /* special_function */
1156 "R_ARM_LDR_SB_G0", /* name */
1157 FALSE, /* partial_inplace */
1158 0xffffffff, /* src_mask */
1159 0xffffffff, /* dst_mask */
1160 TRUE), /* pcrel_offset */
1161
1162 HOWTO (R_ARM_LDR_SB_G1, /* type */
1163 0, /* rightshift */
1164 2, /* size (0 = byte, 1 = short, 2 = long) */
1165 32, /* bitsize */
1166 TRUE, /* pc_relative */
1167 0, /* bitpos */
1168 complain_overflow_dont,/* complain_on_overflow */
1169 bfd_elf_generic_reloc, /* special_function */
1170 "R_ARM_LDR_SB_G1", /* name */
1171 FALSE, /* partial_inplace */
1172 0xffffffff, /* src_mask */
1173 0xffffffff, /* dst_mask */
1174 TRUE), /* pcrel_offset */
1175
1176 HOWTO (R_ARM_LDR_SB_G2, /* type */
1177 0, /* rightshift */
1178 2, /* size (0 = byte, 1 = short, 2 = long) */
1179 32, /* bitsize */
1180 TRUE, /* pc_relative */
1181 0, /* bitpos */
1182 complain_overflow_dont,/* complain_on_overflow */
1183 bfd_elf_generic_reloc, /* special_function */
1184 "R_ARM_LDR_SB_G2", /* name */
1185 FALSE, /* partial_inplace */
1186 0xffffffff, /* src_mask */
1187 0xffffffff, /* dst_mask */
1188 TRUE), /* pcrel_offset */
1189
1190 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1191 0, /* rightshift */
1192 2, /* size (0 = byte, 1 = short, 2 = long) */
1193 32, /* bitsize */
1194 TRUE, /* pc_relative */
1195 0, /* bitpos */
1196 complain_overflow_dont,/* complain_on_overflow */
1197 bfd_elf_generic_reloc, /* special_function */
1198 "R_ARM_LDRS_SB_G0", /* name */
1199 FALSE, /* partial_inplace */
1200 0xffffffff, /* src_mask */
1201 0xffffffff, /* dst_mask */
1202 TRUE), /* pcrel_offset */
1203
1204 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1205 0, /* rightshift */
1206 2, /* size (0 = byte, 1 = short, 2 = long) */
1207 32, /* bitsize */
1208 TRUE, /* pc_relative */
1209 0, /* bitpos */
1210 complain_overflow_dont,/* complain_on_overflow */
1211 bfd_elf_generic_reloc, /* special_function */
1212 "R_ARM_LDRS_SB_G1", /* name */
1213 FALSE, /* partial_inplace */
1214 0xffffffff, /* src_mask */
1215 0xffffffff, /* dst_mask */
1216 TRUE), /* pcrel_offset */
1217
1218 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1219 0, /* rightshift */
1220 2, /* size (0 = byte, 1 = short, 2 = long) */
1221 32, /* bitsize */
1222 TRUE, /* pc_relative */
1223 0, /* bitpos */
1224 complain_overflow_dont,/* complain_on_overflow */
1225 bfd_elf_generic_reloc, /* special_function */
1226 "R_ARM_LDRS_SB_G2", /* name */
1227 FALSE, /* partial_inplace */
1228 0xffffffff, /* src_mask */
1229 0xffffffff, /* dst_mask */
1230 TRUE), /* pcrel_offset */
1231
1232 HOWTO (R_ARM_LDC_SB_G0, /* type */
1233 0, /* rightshift */
1234 2, /* size (0 = byte, 1 = short, 2 = long) */
1235 32, /* bitsize */
1236 TRUE, /* pc_relative */
1237 0, /* bitpos */
1238 complain_overflow_dont,/* complain_on_overflow */
1239 bfd_elf_generic_reloc, /* special_function */
1240 "R_ARM_LDC_SB_G0", /* name */
1241 FALSE, /* partial_inplace */
1242 0xffffffff, /* src_mask */
1243 0xffffffff, /* dst_mask */
1244 TRUE), /* pcrel_offset */
1245
1246 HOWTO (R_ARM_LDC_SB_G1, /* type */
1247 0, /* rightshift */
1248 2, /* size (0 = byte, 1 = short, 2 = long) */
1249 32, /* bitsize */
1250 TRUE, /* pc_relative */
1251 0, /* bitpos */
1252 complain_overflow_dont,/* complain_on_overflow */
1253 bfd_elf_generic_reloc, /* special_function */
1254 "R_ARM_LDC_SB_G1", /* name */
1255 FALSE, /* partial_inplace */
1256 0xffffffff, /* src_mask */
1257 0xffffffff, /* dst_mask */
1258 TRUE), /* pcrel_offset */
1259
1260 HOWTO (R_ARM_LDC_SB_G2, /* type */
1261 0, /* rightshift */
1262 2, /* size (0 = byte, 1 = short, 2 = long) */
1263 32, /* bitsize */
1264 TRUE, /* pc_relative */
1265 0, /* bitpos */
1266 complain_overflow_dont,/* complain_on_overflow */
1267 bfd_elf_generic_reloc, /* special_function */
1268 "R_ARM_LDC_SB_G2", /* name */
1269 FALSE, /* partial_inplace */
1270 0xffffffff, /* src_mask */
1271 0xffffffff, /* dst_mask */
1272 TRUE), /* pcrel_offset */
1273
1274 /* End of group relocations. */
1275
1276 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1277 0, /* rightshift */
1278 2, /* size (0 = byte, 1 = short, 2 = long) */
1279 16, /* bitsize */
1280 FALSE, /* pc_relative */
1281 0, /* bitpos */
1282 complain_overflow_dont,/* complain_on_overflow */
1283 bfd_elf_generic_reloc, /* special_function */
1284 "R_ARM_MOVW_BREL_NC", /* name */
1285 FALSE, /* partial_inplace */
1286 0x0000ffff, /* src_mask */
1287 0x0000ffff, /* dst_mask */
1288 FALSE), /* pcrel_offset */
1289
1290 HOWTO (R_ARM_MOVT_BREL, /* type */
1291 0, /* rightshift */
1292 2, /* size (0 = byte, 1 = short, 2 = long) */
1293 16, /* bitsize */
1294 FALSE, /* pc_relative */
1295 0, /* bitpos */
1296 complain_overflow_bitfield,/* complain_on_overflow */
1297 bfd_elf_generic_reloc, /* special_function */
1298 "R_ARM_MOVT_BREL", /* name */
1299 FALSE, /* partial_inplace */
1300 0x0000ffff, /* src_mask */
1301 0x0000ffff, /* dst_mask */
1302 FALSE), /* pcrel_offset */
1303
1304 HOWTO (R_ARM_MOVW_BREL, /* type */
1305 0, /* rightshift */
1306 2, /* size (0 = byte, 1 = short, 2 = long) */
1307 16, /* bitsize */
1308 FALSE, /* pc_relative */
1309 0, /* bitpos */
1310 complain_overflow_dont,/* complain_on_overflow */
1311 bfd_elf_generic_reloc, /* special_function */
1312 "R_ARM_MOVW_BREL", /* name */
1313 FALSE, /* partial_inplace */
1314 0x0000ffff, /* src_mask */
1315 0x0000ffff, /* dst_mask */
1316 FALSE), /* pcrel_offset */
1317
1318 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1319 0, /* rightshift */
1320 2, /* size (0 = byte, 1 = short, 2 = long) */
1321 16, /* bitsize */
1322 FALSE, /* pc_relative */
1323 0, /* bitpos */
1324 complain_overflow_dont,/* complain_on_overflow */
1325 bfd_elf_generic_reloc, /* special_function */
1326 "R_ARM_THM_MOVW_BREL_NC",/* name */
1327 FALSE, /* partial_inplace */
1328 0x040f70ff, /* src_mask */
1329 0x040f70ff, /* dst_mask */
1330 FALSE), /* pcrel_offset */
1331
1332 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1333 0, /* rightshift */
1334 2, /* size (0 = byte, 1 = short, 2 = long) */
1335 16, /* bitsize */
1336 FALSE, /* pc_relative */
1337 0, /* bitpos */
1338 complain_overflow_bitfield,/* complain_on_overflow */
1339 bfd_elf_generic_reloc, /* special_function */
1340 "R_ARM_THM_MOVT_BREL", /* name */
1341 FALSE, /* partial_inplace */
1342 0x040f70ff, /* src_mask */
1343 0x040f70ff, /* dst_mask */
1344 FALSE), /* pcrel_offset */
1345
1346 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1347 0, /* rightshift */
1348 2, /* size (0 = byte, 1 = short, 2 = long) */
1349 16, /* bitsize */
1350 FALSE, /* pc_relative */
1351 0, /* bitpos */
1352 complain_overflow_dont,/* complain_on_overflow */
1353 bfd_elf_generic_reloc, /* special_function */
1354 "R_ARM_THM_MOVW_BREL", /* name */
1355 FALSE, /* partial_inplace */
1356 0x040f70ff, /* src_mask */
1357 0x040f70ff, /* dst_mask */
1358 FALSE), /* pcrel_offset */
1359
1360 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1361 0, /* rightshift */
1362 2, /* size (0 = byte, 1 = short, 2 = long) */
1363 32, /* bitsize */
1364 FALSE, /* pc_relative */
1365 0, /* bitpos */
1366 complain_overflow_bitfield,/* complain_on_overflow */
1367 NULL, /* special_function */
1368 "R_ARM_TLS_GOTDESC", /* name */
1369 TRUE, /* partial_inplace */
1370 0xffffffff, /* src_mask */
1371 0xffffffff, /* dst_mask */
1372 FALSE), /* pcrel_offset */
1373
1374 HOWTO (R_ARM_TLS_CALL, /* type */
1375 0, /* rightshift */
1376 2, /* size (0 = byte, 1 = short, 2 = long) */
1377 24, /* bitsize */
1378 FALSE, /* pc_relative */
1379 0, /* bitpos */
1380 complain_overflow_dont,/* complain_on_overflow */
1381 bfd_elf_generic_reloc, /* special_function */
1382 "R_ARM_TLS_CALL", /* name */
1383 FALSE, /* partial_inplace */
1384 0x00ffffff, /* src_mask */
1385 0x00ffffff, /* dst_mask */
1386 FALSE), /* pcrel_offset */
1387
1388 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1389 0, /* rightshift */
1390 2, /* size (0 = byte, 1 = short, 2 = long) */
1391 0, /* bitsize */
1392 FALSE, /* pc_relative */
1393 0, /* bitpos */
1394 complain_overflow_bitfield,/* complain_on_overflow */
1395 bfd_elf_generic_reloc, /* special_function */
1396 "R_ARM_TLS_DESCSEQ", /* name */
1397 FALSE, /* partial_inplace */
1398 0x00000000, /* src_mask */
1399 0x00000000, /* dst_mask */
1400 FALSE), /* pcrel_offset */
1401
1402 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1403 0, /* rightshift */
1404 2, /* size (0 = byte, 1 = short, 2 = long) */
1405 24, /* bitsize */
1406 FALSE, /* pc_relative */
1407 0, /* bitpos */
1408 complain_overflow_dont,/* complain_on_overflow */
1409 bfd_elf_generic_reloc, /* special_function */
1410 "R_ARM_THM_TLS_CALL", /* name */
1411 FALSE, /* partial_inplace */
1412 0x07ff07ff, /* src_mask */
1413 0x07ff07ff, /* dst_mask */
1414 FALSE), /* pcrel_offset */
1415
1416 HOWTO (R_ARM_PLT32_ABS, /* type */
1417 0, /* rightshift */
1418 2, /* size (0 = byte, 1 = short, 2 = long) */
1419 32, /* bitsize */
1420 FALSE, /* pc_relative */
1421 0, /* bitpos */
1422 complain_overflow_dont,/* complain_on_overflow */
1423 bfd_elf_generic_reloc, /* special_function */
1424 "R_ARM_PLT32_ABS", /* name */
1425 FALSE, /* partial_inplace */
1426 0xffffffff, /* src_mask */
1427 0xffffffff, /* dst_mask */
1428 FALSE), /* pcrel_offset */
1429
1430 HOWTO (R_ARM_GOT_ABS, /* type */
1431 0, /* rightshift */
1432 2, /* size (0 = byte, 1 = short, 2 = long) */
1433 32, /* bitsize */
1434 FALSE, /* pc_relative */
1435 0, /* bitpos */
1436 complain_overflow_dont,/* complain_on_overflow */
1437 bfd_elf_generic_reloc, /* special_function */
1438 "R_ARM_GOT_ABS", /* name */
1439 FALSE, /* partial_inplace */
1440 0xffffffff, /* src_mask */
1441 0xffffffff, /* dst_mask */
1442 FALSE), /* pcrel_offset */
1443
1444 HOWTO (R_ARM_GOT_PREL, /* type */
1445 0, /* rightshift */
1446 2, /* size (0 = byte, 1 = short, 2 = long) */
1447 32, /* bitsize */
1448 TRUE, /* pc_relative */
1449 0, /* bitpos */
1450 complain_overflow_dont, /* complain_on_overflow */
1451 bfd_elf_generic_reloc, /* special_function */
1452 "R_ARM_GOT_PREL", /* name */
1453 FALSE, /* partial_inplace */
1454 0xffffffff, /* src_mask */
1455 0xffffffff, /* dst_mask */
1456 TRUE), /* pcrel_offset */
1457
1458 HOWTO (R_ARM_GOT_BREL12, /* type */
1459 0, /* rightshift */
1460 2, /* size (0 = byte, 1 = short, 2 = long) */
1461 12, /* bitsize */
1462 FALSE, /* pc_relative */
1463 0, /* bitpos */
1464 complain_overflow_bitfield,/* complain_on_overflow */
1465 bfd_elf_generic_reloc, /* special_function */
1466 "R_ARM_GOT_BREL12", /* name */
1467 FALSE, /* partial_inplace */
1468 0x00000fff, /* src_mask */
1469 0x00000fff, /* dst_mask */
1470 FALSE), /* pcrel_offset */
1471
1472 HOWTO (R_ARM_GOTOFF12, /* type */
1473 0, /* rightshift */
1474 2, /* size (0 = byte, 1 = short, 2 = long) */
1475 12, /* bitsize */
1476 FALSE, /* pc_relative */
1477 0, /* bitpos */
1478 complain_overflow_bitfield,/* complain_on_overflow */
1479 bfd_elf_generic_reloc, /* special_function */
1480 "R_ARM_GOTOFF12", /* name */
1481 FALSE, /* partial_inplace */
1482 0x00000fff, /* src_mask */
1483 0x00000fff, /* dst_mask */
1484 FALSE), /* pcrel_offset */
1485
1486 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1487
1488 /* GNU extension to record C++ vtable member usage */
1489 HOWTO (R_ARM_GNU_VTENTRY, /* type */
1490 0, /* rightshift */
1491 2, /* size (0 = byte, 1 = short, 2 = long) */
1492 0, /* bitsize */
1493 FALSE, /* pc_relative */
1494 0, /* bitpos */
1495 complain_overflow_dont, /* complain_on_overflow */
1496 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1497 "R_ARM_GNU_VTENTRY", /* name */
1498 FALSE, /* partial_inplace */
1499 0, /* src_mask */
1500 0, /* dst_mask */
1501 FALSE), /* pcrel_offset */
1502
1503 /* GNU extension to record C++ vtable hierarchy */
1504 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1505 0, /* rightshift */
1506 2, /* size (0 = byte, 1 = short, 2 = long) */
1507 0, /* bitsize */
1508 FALSE, /* pc_relative */
1509 0, /* bitpos */
1510 complain_overflow_dont, /* complain_on_overflow */
1511 NULL, /* special_function */
1512 "R_ARM_GNU_VTINHERIT", /* name */
1513 FALSE, /* partial_inplace */
1514 0, /* src_mask */
1515 0, /* dst_mask */
1516 FALSE), /* pcrel_offset */
1517
1518 HOWTO (R_ARM_THM_JUMP11, /* type */
1519 1, /* rightshift */
1520 1, /* size (0 = byte, 1 = short, 2 = long) */
1521 11, /* bitsize */
1522 TRUE, /* pc_relative */
1523 0, /* bitpos */
1524 complain_overflow_signed, /* complain_on_overflow */
1525 bfd_elf_generic_reloc, /* special_function */
1526 "R_ARM_THM_JUMP11", /* name */
1527 FALSE, /* partial_inplace */
1528 0x000007ff, /* src_mask */
1529 0x000007ff, /* dst_mask */
1530 TRUE), /* pcrel_offset */
1531
1532 HOWTO (R_ARM_THM_JUMP8, /* type */
1533 1, /* rightshift */
1534 1, /* size (0 = byte, 1 = short, 2 = long) */
1535 8, /* bitsize */
1536 TRUE, /* pc_relative */
1537 0, /* bitpos */
1538 complain_overflow_signed, /* complain_on_overflow */
1539 bfd_elf_generic_reloc, /* special_function */
1540 "R_ARM_THM_JUMP8", /* name */
1541 FALSE, /* partial_inplace */
1542 0x000000ff, /* src_mask */
1543 0x000000ff, /* dst_mask */
1544 TRUE), /* pcrel_offset */
1545
1546 /* TLS relocations */
1547 HOWTO (R_ARM_TLS_GD32, /* type */
1548 0, /* rightshift */
1549 2, /* size (0 = byte, 1 = short, 2 = long) */
1550 32, /* bitsize */
1551 FALSE, /* pc_relative */
1552 0, /* bitpos */
1553 complain_overflow_bitfield,/* complain_on_overflow */
1554 NULL, /* special_function */
1555 "R_ARM_TLS_GD32", /* name */
1556 TRUE, /* partial_inplace */
1557 0xffffffff, /* src_mask */
1558 0xffffffff, /* dst_mask */
1559 FALSE), /* pcrel_offset */
1560
1561 HOWTO (R_ARM_TLS_LDM32, /* type */
1562 0, /* rightshift */
1563 2, /* size (0 = byte, 1 = short, 2 = long) */
1564 32, /* bitsize */
1565 FALSE, /* pc_relative */
1566 0, /* bitpos */
1567 complain_overflow_bitfield,/* complain_on_overflow */
1568 bfd_elf_generic_reloc, /* special_function */
1569 "R_ARM_TLS_LDM32", /* name */
1570 TRUE, /* partial_inplace */
1571 0xffffffff, /* src_mask */
1572 0xffffffff, /* dst_mask */
1573 FALSE), /* pcrel_offset */
1574
1575 HOWTO (R_ARM_TLS_LDO32, /* type */
1576 0, /* rightshift */
1577 2, /* size (0 = byte, 1 = short, 2 = long) */
1578 32, /* bitsize */
1579 FALSE, /* pc_relative */
1580 0, /* bitpos */
1581 complain_overflow_bitfield,/* complain_on_overflow */
1582 bfd_elf_generic_reloc, /* special_function */
1583 "R_ARM_TLS_LDO32", /* name */
1584 TRUE, /* partial_inplace */
1585 0xffffffff, /* src_mask */
1586 0xffffffff, /* dst_mask */
1587 FALSE), /* pcrel_offset */
1588
1589 HOWTO (R_ARM_TLS_IE32, /* type */
1590 0, /* rightshift */
1591 2, /* size (0 = byte, 1 = short, 2 = long) */
1592 32, /* bitsize */
1593 FALSE, /* pc_relative */
1594 0, /* bitpos */
1595 complain_overflow_bitfield,/* complain_on_overflow */
1596 NULL, /* special_function */
1597 "R_ARM_TLS_IE32", /* name */
1598 TRUE, /* partial_inplace */
1599 0xffffffff, /* src_mask */
1600 0xffffffff, /* dst_mask */
1601 FALSE), /* pcrel_offset */
1602
1603 HOWTO (R_ARM_TLS_LE32, /* type */
1604 0, /* rightshift */
1605 2, /* size (0 = byte, 1 = short, 2 = long) */
1606 32, /* bitsize */
1607 FALSE, /* pc_relative */
1608 0, /* bitpos */
1609 complain_overflow_bitfield,/* complain_on_overflow */
1610 NULL, /* special_function */
1611 "R_ARM_TLS_LE32", /* name */
1612 TRUE, /* partial_inplace */
1613 0xffffffff, /* src_mask */
1614 0xffffffff, /* dst_mask */
1615 FALSE), /* pcrel_offset */
1616
1617 HOWTO (R_ARM_TLS_LDO12, /* type */
1618 0, /* rightshift */
1619 2, /* size (0 = byte, 1 = short, 2 = long) */
1620 12, /* bitsize */
1621 FALSE, /* pc_relative */
1622 0, /* bitpos */
1623 complain_overflow_bitfield,/* complain_on_overflow */
1624 bfd_elf_generic_reloc, /* special_function */
1625 "R_ARM_TLS_LDO12", /* name */
1626 FALSE, /* partial_inplace */
1627 0x00000fff, /* src_mask */
1628 0x00000fff, /* dst_mask */
1629 FALSE), /* pcrel_offset */
1630
1631 HOWTO (R_ARM_TLS_LE12, /* type */
1632 0, /* rightshift */
1633 2, /* size (0 = byte, 1 = short, 2 = long) */
1634 12, /* bitsize */
1635 FALSE, /* pc_relative */
1636 0, /* bitpos */
1637 complain_overflow_bitfield,/* complain_on_overflow */
1638 bfd_elf_generic_reloc, /* special_function */
1639 "R_ARM_TLS_LE12", /* name */
1640 FALSE, /* partial_inplace */
1641 0x00000fff, /* src_mask */
1642 0x00000fff, /* dst_mask */
1643 FALSE), /* pcrel_offset */
1644
1645 HOWTO (R_ARM_TLS_IE12GP, /* type */
1646 0, /* rightshift */
1647 2, /* size (0 = byte, 1 = short, 2 = long) */
1648 12, /* bitsize */
1649 FALSE, /* pc_relative */
1650 0, /* bitpos */
1651 complain_overflow_bitfield,/* complain_on_overflow */
1652 bfd_elf_generic_reloc, /* special_function */
1653 "R_ARM_TLS_IE12GP", /* name */
1654 FALSE, /* partial_inplace */
1655 0x00000fff, /* src_mask */
1656 0x00000fff, /* dst_mask */
1657 FALSE), /* pcrel_offset */
1658
1659 /* 112-127 private relocations. */
1660 EMPTY_HOWTO (112),
1661 EMPTY_HOWTO (113),
1662 EMPTY_HOWTO (114),
1663 EMPTY_HOWTO (115),
1664 EMPTY_HOWTO (116),
1665 EMPTY_HOWTO (117),
1666 EMPTY_HOWTO (118),
1667 EMPTY_HOWTO (119),
1668 EMPTY_HOWTO (120),
1669 EMPTY_HOWTO (121),
1670 EMPTY_HOWTO (122),
1671 EMPTY_HOWTO (123),
1672 EMPTY_HOWTO (124),
1673 EMPTY_HOWTO (125),
1674 EMPTY_HOWTO (126),
1675 EMPTY_HOWTO (127),
1676
1677 /* R_ARM_ME_TOO, obsolete. */
1678 EMPTY_HOWTO (128),
1679
1680 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1681 0, /* rightshift */
1682 1, /* size (0 = byte, 1 = short, 2 = long) */
1683 0, /* bitsize */
1684 FALSE, /* pc_relative */
1685 0, /* bitpos */
1686 complain_overflow_bitfield,/* complain_on_overflow */
1687 bfd_elf_generic_reloc, /* special_function */
1688 "R_ARM_THM_TLS_DESCSEQ",/* name */
1689 FALSE, /* partial_inplace */
1690 0x00000000, /* src_mask */
1691 0x00000000, /* dst_mask */
1692 FALSE), /* pcrel_offset */
1693 EMPTY_HOWTO (130),
1694 EMPTY_HOWTO (131),
1695 HOWTO (R_ARM_THM_ALU_ABS_G0_NC,/* type. */
1696 0, /* rightshift. */
1697 1, /* size (0 = byte, 1 = short, 2 = long). */
1698 16, /* bitsize. */
1699 FALSE, /* pc_relative. */
1700 0, /* bitpos. */
1701 complain_overflow_bitfield,/* complain_on_overflow. */
1702 bfd_elf_generic_reloc, /* special_function. */
1703 "R_ARM_THM_ALU_ABS_G0_NC",/* name. */
1704 FALSE, /* partial_inplace. */
1705 0x00000000, /* src_mask. */
1706 0x00000000, /* dst_mask. */
1707 FALSE), /* pcrel_offset. */
1708 HOWTO (R_ARM_THM_ALU_ABS_G1_NC,/* type. */
1709 0, /* rightshift. */
1710 1, /* size (0 = byte, 1 = short, 2 = long). */
1711 16, /* bitsize. */
1712 FALSE, /* pc_relative. */
1713 0, /* bitpos. */
1714 complain_overflow_bitfield,/* complain_on_overflow. */
1715 bfd_elf_generic_reloc, /* special_function. */
1716 "R_ARM_THM_ALU_ABS_G1_NC",/* name. */
1717 FALSE, /* partial_inplace. */
1718 0x00000000, /* src_mask. */
1719 0x00000000, /* dst_mask. */
1720 FALSE), /* pcrel_offset. */
1721 HOWTO (R_ARM_THM_ALU_ABS_G2_NC,/* type. */
1722 0, /* rightshift. */
1723 1, /* size (0 = byte, 1 = short, 2 = long). */
1724 16, /* bitsize. */
1725 FALSE, /* pc_relative. */
1726 0, /* bitpos. */
1727 complain_overflow_bitfield,/* complain_on_overflow. */
1728 bfd_elf_generic_reloc, /* special_function. */
1729 "R_ARM_THM_ALU_ABS_G2_NC",/* name. */
1730 FALSE, /* partial_inplace. */
1731 0x00000000, /* src_mask. */
1732 0x00000000, /* dst_mask. */
1733 FALSE), /* pcrel_offset. */
1734 HOWTO (R_ARM_THM_ALU_ABS_G3_NC,/* type. */
1735 0, /* rightshift. */
1736 1, /* size (0 = byte, 1 = short, 2 = long). */
1737 16, /* bitsize. */
1738 FALSE, /* pc_relative. */
1739 0, /* bitpos. */
1740 complain_overflow_bitfield,/* complain_on_overflow. */
1741 bfd_elf_generic_reloc, /* special_function. */
1742 "R_ARM_THM_ALU_ABS_G3_NC",/* name. */
1743 FALSE, /* partial_inplace. */
1744 0x00000000, /* src_mask. */
1745 0x00000000, /* dst_mask. */
1746 FALSE), /* pcrel_offset. */
1747 /* Relocations for Armv8.1-M Mainline. */
1748 HOWTO (R_ARM_THM_BF16, /* type. */
1749 0, /* rightshift. */
1750 1, /* size (0 = byte, 1 = short, 2 = long). */
1751 16, /* bitsize. */
1752 TRUE, /* pc_relative. */
1753 0, /* bitpos. */
1754 complain_overflow_dont,/* do not complain_on_overflow. */
1755 bfd_elf_generic_reloc, /* special_function. */
1756 "R_ARM_THM_BF16", /* name. */
1757 FALSE, /* partial_inplace. */
1758 0x001f0ffe, /* src_mask. */
1759 0x001f0ffe, /* dst_mask. */
1760 TRUE), /* pcrel_offset. */
1761 HOWTO (R_ARM_THM_BF12, /* type. */
1762 0, /* rightshift. */
1763 1, /* size (0 = byte, 1 = short, 2 = long). */
1764 12, /* bitsize. */
1765 TRUE, /* pc_relative. */
1766 0, /* bitpos. */
1767 complain_overflow_dont,/* do not complain_on_overflow. */
1768 bfd_elf_generic_reloc, /* special_function. */
1769 "R_ARM_THM_BF12", /* name. */
1770 FALSE, /* partial_inplace. */
1771 0x00010ffe, /* src_mask. */
1772 0x00010ffe, /* dst_mask. */
1773 TRUE), /* pcrel_offset. */
1774 HOWTO (R_ARM_THM_BF18, /* type. */
1775 0, /* rightshift. */
1776 1, /* size (0 = byte, 1 = short, 2 = long). */
1777 18, /* bitsize. */
1778 TRUE, /* pc_relative. */
1779 0, /* bitpos. */
1780 complain_overflow_dont,/* do not complain_on_overflow. */
1781 bfd_elf_generic_reloc, /* special_function. */
1782 "R_ARM_THM_BF18", /* name. */
1783 FALSE, /* partial_inplace. */
1784 0x007f0ffe, /* src_mask. */
1785 0x007f0ffe, /* dst_mask. */
1786 TRUE), /* pcrel_offset. */
1787 };
1788
1789 /* 160 onwards: */
1790 static reloc_howto_type elf32_arm_howto_table_2[8] =
1791 {
1792 HOWTO (R_ARM_IRELATIVE, /* type */
1793 0, /* rightshift */
1794 2, /* size (0 = byte, 1 = short, 2 = long) */
1795 32, /* bitsize */
1796 FALSE, /* pc_relative */
1797 0, /* bitpos */
1798 complain_overflow_bitfield,/* complain_on_overflow */
1799 bfd_elf_generic_reloc, /* special_function */
1800 "R_ARM_IRELATIVE", /* name */
1801 TRUE, /* partial_inplace */
1802 0xffffffff, /* src_mask */
1803 0xffffffff, /* dst_mask */
1804 FALSE), /* pcrel_offset */
1805 HOWTO (R_ARM_GOTFUNCDESC, /* type */
1806 0, /* rightshift */
1807 2, /* size (0 = byte, 1 = short, 2 = long) */
1808 32, /* bitsize */
1809 FALSE, /* pc_relative */
1810 0, /* bitpos */
1811 complain_overflow_bitfield,/* complain_on_overflow */
1812 bfd_elf_generic_reloc, /* special_function */
1813 "R_ARM_GOTFUNCDESC", /* name */
1814 FALSE, /* partial_inplace */
1815 0, /* src_mask */
1816 0xffffffff, /* dst_mask */
1817 FALSE), /* pcrel_offset */
1818 HOWTO (R_ARM_GOTOFFFUNCDESC, /* type */
1819 0, /* rightshift */
1820 2, /* size (0 = byte, 1 = short, 2 = long) */
1821 32, /* bitsize */
1822 FALSE, /* pc_relative */
1823 0, /* bitpos */
1824 complain_overflow_bitfield,/* complain_on_overflow */
1825 bfd_elf_generic_reloc, /* special_function */
1826 "R_ARM_GOTOFFFUNCDESC",/* name */
1827 FALSE, /* partial_inplace */
1828 0, /* src_mask */
1829 0xffffffff, /* dst_mask */
1830 FALSE), /* pcrel_offset */
1831 HOWTO (R_ARM_FUNCDESC, /* type */
1832 0, /* rightshift */
1833 2, /* size (0 = byte, 1 = short, 2 = long) */
1834 32, /* bitsize */
1835 FALSE, /* pc_relative */
1836 0, /* bitpos */
1837 complain_overflow_bitfield,/* complain_on_overflow */
1838 bfd_elf_generic_reloc, /* special_function */
1839 "R_ARM_FUNCDESC", /* name */
1840 FALSE, /* partial_inplace */
1841 0, /* src_mask */
1842 0xffffffff, /* dst_mask */
1843 FALSE), /* pcrel_offset */
1844 HOWTO (R_ARM_FUNCDESC_VALUE, /* type */
1845 0, /* rightshift */
1846 2, /* size (0 = byte, 1 = short, 2 = long) */
1847 64, /* bitsize */
1848 FALSE, /* pc_relative */
1849 0, /* bitpos */
1850 complain_overflow_bitfield,/* complain_on_overflow */
1851 bfd_elf_generic_reloc, /* special_function */
1852 "R_ARM_FUNCDESC_VALUE",/* name */
1853 FALSE, /* partial_inplace */
1854 0, /* src_mask */
1855 0xffffffff, /* dst_mask */
1856 FALSE), /* pcrel_offset */
1857 HOWTO (R_ARM_TLS_GD32_FDPIC, /* type */
1858 0, /* rightshift */
1859 2, /* size (0 = byte, 1 = short, 2 = long) */
1860 32, /* bitsize */
1861 FALSE, /* pc_relative */
1862 0, /* bitpos */
1863 complain_overflow_bitfield,/* complain_on_overflow */
1864 bfd_elf_generic_reloc, /* special_function */
1865 "R_ARM_TLS_GD32_FDPIC",/* name */
1866 FALSE, /* partial_inplace */
1867 0, /* src_mask */
1868 0xffffffff, /* dst_mask */
1869 FALSE), /* pcrel_offset */
1870 HOWTO (R_ARM_TLS_LDM32_FDPIC, /* type */
1871 0, /* rightshift */
1872 2, /* size (0 = byte, 1 = short, 2 = long) */
1873 32, /* bitsize */
1874 FALSE, /* pc_relative */
1875 0, /* bitpos */
1876 complain_overflow_bitfield,/* complain_on_overflow */
1877 bfd_elf_generic_reloc, /* special_function */
1878 "R_ARM_TLS_LDM32_FDPIC",/* name */
1879 FALSE, /* partial_inplace */
1880 0, /* src_mask */
1881 0xffffffff, /* dst_mask */
1882 FALSE), /* pcrel_offset */
1883 HOWTO (R_ARM_TLS_IE32_FDPIC, /* type */
1884 0, /* rightshift */
1885 2, /* size (0 = byte, 1 = short, 2 = long) */
1886 32, /* bitsize */
1887 FALSE, /* pc_relative */
1888 0, /* bitpos */
1889 complain_overflow_bitfield,/* complain_on_overflow */
1890 bfd_elf_generic_reloc, /* special_function */
1891 "R_ARM_TLS_IE32_FDPIC",/* name */
1892 FALSE, /* partial_inplace */
1893 0, /* src_mask */
1894 0xffffffff, /* dst_mask */
1895 FALSE), /* pcrel_offset */
1896 };
1897
1898 /* 249-255 extended, currently unused, relocations: */
1899 static reloc_howto_type elf32_arm_howto_table_3[4] =
1900 {
1901 HOWTO (R_ARM_RREL32, /* type */
1902 0, /* rightshift */
1903 0, /* size (0 = byte, 1 = short, 2 = long) */
1904 0, /* bitsize */
1905 FALSE, /* pc_relative */
1906 0, /* bitpos */
1907 complain_overflow_dont,/* complain_on_overflow */
1908 bfd_elf_generic_reloc, /* special_function */
1909 "R_ARM_RREL32", /* name */
1910 FALSE, /* partial_inplace */
1911 0, /* src_mask */
1912 0, /* dst_mask */
1913 FALSE), /* pcrel_offset */
1914
1915 HOWTO (R_ARM_RABS32, /* type */
1916 0, /* rightshift */
1917 0, /* size (0 = byte, 1 = short, 2 = long) */
1918 0, /* bitsize */
1919 FALSE, /* pc_relative */
1920 0, /* bitpos */
1921 complain_overflow_dont,/* complain_on_overflow */
1922 bfd_elf_generic_reloc, /* special_function */
1923 "R_ARM_RABS32", /* name */
1924 FALSE, /* partial_inplace */
1925 0, /* src_mask */
1926 0, /* dst_mask */
1927 FALSE), /* pcrel_offset */
1928
1929 HOWTO (R_ARM_RPC24, /* type */
1930 0, /* rightshift */
1931 0, /* size (0 = byte, 1 = short, 2 = long) */
1932 0, /* bitsize */
1933 FALSE, /* pc_relative */
1934 0, /* bitpos */
1935 complain_overflow_dont,/* complain_on_overflow */
1936 bfd_elf_generic_reloc, /* special_function */
1937 "R_ARM_RPC24", /* name */
1938 FALSE, /* partial_inplace */
1939 0, /* src_mask */
1940 0, /* dst_mask */
1941 FALSE), /* pcrel_offset */
1942
1943 HOWTO (R_ARM_RBASE, /* type */
1944 0, /* rightshift */
1945 0, /* size (0 = byte, 1 = short, 2 = long) */
1946 0, /* bitsize */
1947 FALSE, /* pc_relative */
1948 0, /* bitpos */
1949 complain_overflow_dont,/* complain_on_overflow */
1950 bfd_elf_generic_reloc, /* special_function */
1951 "R_ARM_RBASE", /* name */
1952 FALSE, /* partial_inplace */
1953 0, /* src_mask */
1954 0, /* dst_mask */
1955 FALSE) /* pcrel_offset */
1956 };
1957
1958 static reloc_howto_type *
1959 elf32_arm_howto_from_type (unsigned int r_type)
1960 {
1961 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
1962 return &elf32_arm_howto_table_1[r_type];
1963
1964 if (r_type >= R_ARM_IRELATIVE
1965 && r_type < R_ARM_IRELATIVE + ARRAY_SIZE (elf32_arm_howto_table_2))
1966 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1967
1968 if (r_type >= R_ARM_RREL32
1969 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1970 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
1971
1972 return NULL;
1973 }
1974
1975 static bfd_boolean
1976 elf32_arm_info_to_howto (bfd * abfd, arelent * bfd_reloc,
1977 Elf_Internal_Rela * elf_reloc)
1978 {
1979 unsigned int r_type;
1980
1981 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1982 if ((bfd_reloc->howto = elf32_arm_howto_from_type (r_type)) == NULL)
1983 {
1984 /* xgettext:c-format */
1985 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
1986 abfd, r_type);
1987 bfd_set_error (bfd_error_bad_value);
1988 return FALSE;
1989 }
1990 return TRUE;
1991 }
1992
1993 struct elf32_arm_reloc_map
1994 {
1995 bfd_reloc_code_real_type bfd_reloc_val;
1996 unsigned char elf_reloc_val;
1997 };
1998
1999 /* All entries in this list must also be present in elf32_arm_howto_table. */
2000 static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
2001 {
2002 {BFD_RELOC_NONE, R_ARM_NONE},
2003 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
2004 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
2005 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
2006 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
2007 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
2008 {BFD_RELOC_32, R_ARM_ABS32},
2009 {BFD_RELOC_32_PCREL, R_ARM_REL32},
2010 {BFD_RELOC_8, R_ARM_ABS8},
2011 {BFD_RELOC_16, R_ARM_ABS16},
2012 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
2013 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
2014 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
2015 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
2016 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
2017 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
2018 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
2019 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
2020 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
2021 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
2022 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
2023 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
2024 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
2025 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
2026 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
2027 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
2028 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
2029 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
2030 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
2031 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
2032 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
2033 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
2034 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
2035 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
2036 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
2037 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
2038 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
2039 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
2040 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
2041 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
2042 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
2043 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
2044 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
2045 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
2046 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
2047 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
2048 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
2049 {BFD_RELOC_ARM_GOTFUNCDESC, R_ARM_GOTFUNCDESC},
2050 {BFD_RELOC_ARM_GOTOFFFUNCDESC, R_ARM_GOTOFFFUNCDESC},
2051 {BFD_RELOC_ARM_FUNCDESC, R_ARM_FUNCDESC},
2052 {BFD_RELOC_ARM_FUNCDESC_VALUE, R_ARM_FUNCDESC_VALUE},
2053 {BFD_RELOC_ARM_TLS_GD32_FDPIC, R_ARM_TLS_GD32_FDPIC},
2054 {BFD_RELOC_ARM_TLS_LDM32_FDPIC, R_ARM_TLS_LDM32_FDPIC},
2055 {BFD_RELOC_ARM_TLS_IE32_FDPIC, R_ARM_TLS_IE32_FDPIC},
2056 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
2057 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
2058 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
2059 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
2060 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
2061 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
2062 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
2063 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
2064 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
2065 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
2066 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
2067 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
2068 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
2069 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
2070 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
2071 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
2072 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
2073 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
2074 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
2075 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
2076 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
2077 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
2078 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
2079 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
2080 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
2081 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
2082 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
2083 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
2084 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
2085 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
2086 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
2087 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
2088 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
2089 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
2090 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
2091 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
2092 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
2093 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
2094 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX},
2095 {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC, R_ARM_THM_ALU_ABS_G3_NC},
2096 {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC, R_ARM_THM_ALU_ABS_G2_NC},
2097 {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC, R_ARM_THM_ALU_ABS_G1_NC},
2098 {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G0_NC},
2099 {BFD_RELOC_ARM_THUMB_BF17, R_ARM_THM_BF16},
2100 {BFD_RELOC_ARM_THUMB_BF13, R_ARM_THM_BF12},
2101 {BFD_RELOC_ARM_THUMB_BF19, R_ARM_THM_BF18}
2102 };
2103
2104 static reloc_howto_type *
2105 elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2106 bfd_reloc_code_real_type code)
2107 {
2108 unsigned int i;
2109
2110 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
2111 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
2112 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
2113
2114 return NULL;
2115 }
2116
2117 static reloc_howto_type *
2118 elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2119 const char *r_name)
2120 {
2121 unsigned int i;
2122
2123 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
2124 if (elf32_arm_howto_table_1[i].name != NULL
2125 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
2126 return &elf32_arm_howto_table_1[i];
2127
2128 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
2129 if (elf32_arm_howto_table_2[i].name != NULL
2130 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
2131 return &elf32_arm_howto_table_2[i];
2132
2133 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
2134 if (elf32_arm_howto_table_3[i].name != NULL
2135 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
2136 return &elf32_arm_howto_table_3[i];
2137
2138 return NULL;
2139 }
2140
2141 /* Support for core dump NOTE sections. */
2142
2143 static bfd_boolean
2144 elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
2145 {
2146 int offset;
2147 size_t size;
2148
2149 switch (note->descsz)
2150 {
2151 default:
2152 return FALSE;
2153
2154 case 148: /* Linux/ARM 32-bit. */
2155 /* pr_cursig */
2156 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2157
2158 /* pr_pid */
2159 elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
2160
2161 /* pr_reg */
2162 offset = 72;
2163 size = 72;
2164
2165 break;
2166 }
2167
2168 /* Make a ".reg/999" section. */
2169 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
2170 size, note->descpos + offset);
2171 }
2172
2173 static bfd_boolean
2174 elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
2175 {
2176 switch (note->descsz)
2177 {
2178 default:
2179 return FALSE;
2180
2181 case 124: /* Linux/ARM elf_prpsinfo. */
2182 elf_tdata (abfd)->core->pid
2183 = bfd_get_32 (abfd, note->descdata + 12);
2184 elf_tdata (abfd)->core->program
2185 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
2186 elf_tdata (abfd)->core->command
2187 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
2188 }
2189
2190 /* Note that for some reason, a spurious space is tacked
2191 onto the end of the args in some (at least one anyway)
2192 implementations, so strip it off if it exists. */
2193 {
2194 char *command = elf_tdata (abfd)->core->command;
2195 int n = strlen (command);
2196
2197 if (0 < n && command[n - 1] == ' ')
2198 command[n - 1] = '\0';
2199 }
2200
2201 return TRUE;
2202 }
2203
2204 static char *
2205 elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
2206 int note_type, ...)
2207 {
2208 switch (note_type)
2209 {
2210 default:
2211 return NULL;
2212
2213 case NT_PRPSINFO:
2214 {
2215 char data[124] ATTRIBUTE_NONSTRING;
2216 va_list ap;
2217
2218 va_start (ap, note_type);
2219 memset (data, 0, sizeof (data));
2220 strncpy (data + 28, va_arg (ap, const char *), 16);
2221 #if GCC_VERSION == 8000 || GCC_VERSION == 8001
2222 DIAGNOSTIC_PUSH;
2223 /* GCC 8.0 and 8.1 warn about 80 equals destination size with
2224 -Wstringop-truncation:
2225 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85643
2226 */
2227 DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION;
2228 #endif
2229 strncpy (data + 44, va_arg (ap, const char *), 80);
2230 #if GCC_VERSION == 8000 || GCC_VERSION == 8001
2231 DIAGNOSTIC_POP;
2232 #endif
2233 va_end (ap);
2234
2235 return elfcore_write_note (abfd, buf, bufsiz,
2236 "CORE", note_type, data, sizeof (data));
2237 }
2238
2239 case NT_PRSTATUS:
2240 {
2241 char data[148];
2242 va_list ap;
2243 long pid;
2244 int cursig;
2245 const void *greg;
2246
2247 va_start (ap, note_type);
2248 memset (data, 0, sizeof (data));
2249 pid = va_arg (ap, long);
2250 bfd_put_32 (abfd, pid, data + 24);
2251 cursig = va_arg (ap, int);
2252 bfd_put_16 (abfd, cursig, data + 12);
2253 greg = va_arg (ap, const void *);
2254 memcpy (data + 72, greg, 72);
2255 va_end (ap);
2256
2257 return elfcore_write_note (abfd, buf, bufsiz,
2258 "CORE", note_type, data, sizeof (data));
2259 }
2260 }
2261 }
2262
2263 #define TARGET_LITTLE_SYM arm_elf32_le_vec
2264 #define TARGET_LITTLE_NAME "elf32-littlearm"
2265 #define TARGET_BIG_SYM arm_elf32_be_vec
2266 #define TARGET_BIG_NAME "elf32-bigarm"
2267
2268 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2269 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2270 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2271
2272 typedef unsigned long int insn32;
2273 typedef unsigned short int insn16;
2274
2275 /* In lieu of proper flags, assume all EABIv4 or later objects are
2276 interworkable. */
2277 #define INTERWORK_FLAG(abfd) \
2278 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2279 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2280 || ((abfd)->flags & BFD_LINKER_CREATED))
2281
2282 /* The linker script knows the section names for placement.
2283 The entry_names are used to do simple name mangling on the stubs.
2284 Given a function name, and its type, the stub can be found. The
2285 name can be changed. The only requirement is the %s be present. */
2286 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2287 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2288
2289 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2290 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2291
2292 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2293 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2294
2295 #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer"
2296 #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "__stm32l4xx_veneer_%x"
2297
2298 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2299 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2300
2301 #define STUB_ENTRY_NAME "__%s_veneer"
2302
2303 #define CMSE_PREFIX "__acle_se_"
2304
2305 #define CMSE_STUB_NAME ".gnu.sgstubs"
2306
2307 /* The name of the dynamic interpreter. This is put in the .interp
2308 section. */
2309 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2310
2311 /* FDPIC default stack size. */
2312 #define DEFAULT_STACK_SIZE 0x8000
2313
2314 static const unsigned long tls_trampoline [] =
2315 {
2316 0xe08e0000, /* add r0, lr, r0 */
2317 0xe5901004, /* ldr r1, [r0,#4] */
2318 0xe12fff11, /* bx r1 */
2319 };
2320
2321 static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2322 {
2323 0xe52d2004, /* push {r2} */
2324 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2325 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2326 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2327 0xe081100f, /* 2: add r1, pc */
2328 0xe12fff12, /* bx r2 */
2329 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2330 + dl_tlsdesc_lazy_resolver(GOT) */
2331 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2332 };
2333
2334 /* NOTE: [Thumb nop sequence]
2335 When adding code that transitions from Thumb to Arm the instruction that
2336 should be used for the alignment padding should be 0xe7fd (b .-2) instead of
2337 a nop for performance reasons. */
2338
2339 /* ARM FDPIC PLT entry. */
2340 /* The last 5 words contain PLT lazy fragment code and data. */
2341 static const bfd_vma elf32_arm_fdpic_plt_entry [] =
2342 {
2343 0xe59fc008, /* ldr r12, .L1 */
2344 0xe08cc009, /* add r12, r12, r9 */
2345 0xe59c9004, /* ldr r9, [r12, #4] */
2346 0xe59cf000, /* ldr pc, [r12] */
2347 0x00000000, /* L1. .word foo(GOTOFFFUNCDESC) */
2348 0x00000000, /* L1. .word foo(funcdesc_value_reloc_offset) */
2349 0xe51fc00c, /* ldr r12, [pc, #-12] */
2350 0xe92d1000, /* push {r12} */
2351 0xe599c004, /* ldr r12, [r9, #4] */
2352 0xe599f000, /* ldr pc, [r9] */
2353 };
2354
2355 /* Thumb FDPIC PLT entry. */
2356 /* The last 5 words contain PLT lazy fragment code and data. */
2357 static const bfd_vma elf32_arm_fdpic_thumb_plt_entry [] =
2358 {
2359 0xc00cf8df, /* ldr.w r12, .L1 */
2360 0x0c09eb0c, /* add.w r12, r12, r9 */
2361 0x9004f8dc, /* ldr.w r9, [r12, #4] */
2362 0xf000f8dc, /* ldr.w pc, [r12] */
2363 0x00000000, /* .L1 .word foo(GOTOFFFUNCDESC) */
2364 0x00000000, /* .L2 .word foo(funcdesc_value_reloc_offset) */
2365 0xc008f85f, /* ldr.w r12, .L2 */
2366 0xcd04f84d, /* push {r12} */
2367 0xc004f8d9, /* ldr.w r12, [r9, #4] */
2368 0xf000f8d9, /* ldr.w pc, [r9] */
2369 };
2370
2371 #ifdef FOUR_WORD_PLT
2372
2373 /* The first entry in a procedure linkage table looks like
2374 this. It is set up so that any shared library function that is
2375 called before the relocation has been set up calls the dynamic
2376 linker first. */
2377 static const bfd_vma elf32_arm_plt0_entry [] =
2378 {
2379 0xe52de004, /* str lr, [sp, #-4]! */
2380 0xe59fe010, /* ldr lr, [pc, #16] */
2381 0xe08fe00e, /* add lr, pc, lr */
2382 0xe5bef008, /* ldr pc, [lr, #8]! */
2383 };
2384
2385 /* Subsequent entries in a procedure linkage table look like
2386 this. */
2387 static const bfd_vma elf32_arm_plt_entry [] =
2388 {
2389 0xe28fc600, /* add ip, pc, #NN */
2390 0xe28cca00, /* add ip, ip, #NN */
2391 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2392 0x00000000, /* unused */
2393 };
2394
2395 #else /* not FOUR_WORD_PLT */
2396
2397 /* The first entry in a procedure linkage table looks like
2398 this. It is set up so that any shared library function that is
2399 called before the relocation has been set up calls the dynamic
2400 linker first. */
2401 static const bfd_vma elf32_arm_plt0_entry [] =
2402 {
2403 0xe52de004, /* str lr, [sp, #-4]! */
2404 0xe59fe004, /* ldr lr, [pc, #4] */
2405 0xe08fe00e, /* add lr, pc, lr */
2406 0xe5bef008, /* ldr pc, [lr, #8]! */
2407 0x00000000, /* &GOT[0] - . */
2408 };
2409
2410 /* By default subsequent entries in a procedure linkage table look like
2411 this. Offsets that don't fit into 28 bits will cause link error. */
2412 static const bfd_vma elf32_arm_plt_entry_short [] =
2413 {
2414 0xe28fc600, /* add ip, pc, #0xNN00000 */
2415 0xe28cca00, /* add ip, ip, #0xNN000 */
2416 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2417 };
2418
2419 /* When explicitly asked, we'll use this "long" entry format
2420 which can cope with arbitrary displacements. */
2421 static const bfd_vma elf32_arm_plt_entry_long [] =
2422 {
2423 0xe28fc200, /* add ip, pc, #0xN0000000 */
2424 0xe28cc600, /* add ip, ip, #0xNN00000 */
2425 0xe28cca00, /* add ip, ip, #0xNN000 */
2426 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2427 };
2428
2429 static bfd_boolean elf32_arm_use_long_plt_entry = FALSE;
2430
2431 #endif /* not FOUR_WORD_PLT */
2432
2433 /* The first entry in a procedure linkage table looks like this.
2434 It is set up so that any shared library function that is called before the
2435 relocation has been set up calls the dynamic linker first. */
2436 static const bfd_vma elf32_thumb2_plt0_entry [] =
2437 {
2438 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2439 an instruction maybe encoded to one or two array elements. */
2440 0xf8dfb500, /* push {lr} */
2441 0x44fee008, /* ldr.w lr, [pc, #8] */
2442 /* add lr, pc */
2443 0xff08f85e, /* ldr.w pc, [lr, #8]! */
2444 0x00000000, /* &GOT[0] - . */
2445 };
2446
2447 /* Subsequent entries in a procedure linkage table for thumb only target
2448 look like this. */
2449 static const bfd_vma elf32_thumb2_plt_entry [] =
2450 {
2451 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2452 an instruction maybe encoded to one or two array elements. */
2453 0x0c00f240, /* movw ip, #0xNNNN */
2454 0x0c00f2c0, /* movt ip, #0xNNNN */
2455 0xf8dc44fc, /* add ip, pc */
2456 0xe7fcf000 /* ldr.w pc, [ip] */
2457 /* b .-4 */
2458 };
2459
2460 /* The format of the first entry in the procedure linkage table
2461 for a VxWorks executable. */
2462 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2463 {
2464 0xe52dc008, /* str ip,[sp,#-8]! */
2465 0xe59fc000, /* ldr ip,[pc] */
2466 0xe59cf008, /* ldr pc,[ip,#8] */
2467 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2468 };
2469
2470 /* The format of subsequent entries in a VxWorks executable. */
2471 static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2472 {
2473 0xe59fc000, /* ldr ip,[pc] */
2474 0xe59cf000, /* ldr pc,[ip] */
2475 0x00000000, /* .long @got */
2476 0xe59fc000, /* ldr ip,[pc] */
2477 0xea000000, /* b _PLT */
2478 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2479 };
2480
2481 /* The format of entries in a VxWorks shared library. */
2482 static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2483 {
2484 0xe59fc000, /* ldr ip,[pc] */
2485 0xe79cf009, /* ldr pc,[ip,r9] */
2486 0x00000000, /* .long @got */
2487 0xe59fc000, /* ldr ip,[pc] */
2488 0xe599f008, /* ldr pc,[r9,#8] */
2489 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2490 };
2491
2492 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2493 #define PLT_THUMB_STUB_SIZE 4
2494 static const bfd_vma elf32_arm_plt_thumb_stub [] =
2495 {
2496 0x4778, /* bx pc */
2497 0xe7fd /* b .-2 */
2498 };
2499
2500 /* The entries in a PLT when using a DLL-based target with multiple
2501 address spaces. */
2502 static const bfd_vma elf32_arm_symbian_plt_entry [] =
2503 {
2504 0xe51ff004, /* ldr pc, [pc, #-4] */
2505 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2506 };
2507
2508 /* The first entry in a procedure linkage table looks like
2509 this. It is set up so that any shared library function that is
2510 called before the relocation has been set up calls the dynamic
2511 linker first. */
2512 static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2513 {
2514 /* First bundle: */
2515 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2516 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2517 0xe08cc00f, /* add ip, ip, pc */
2518 0xe52dc008, /* str ip, [sp, #-8]! */
2519 /* Second bundle: */
2520 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2521 0xe59cc000, /* ldr ip, [ip] */
2522 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2523 0xe12fff1c, /* bx ip */
2524 /* Third bundle: */
2525 0xe320f000, /* nop */
2526 0xe320f000, /* nop */
2527 0xe320f000, /* nop */
2528 /* .Lplt_tail: */
2529 0xe50dc004, /* str ip, [sp, #-4] */
2530 /* Fourth bundle: */
2531 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2532 0xe59cc000, /* ldr ip, [ip] */
2533 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2534 0xe12fff1c, /* bx ip */
2535 };
2536 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2537
2538 /* Subsequent entries in a procedure linkage table look like this. */
2539 static const bfd_vma elf32_arm_nacl_plt_entry [] =
2540 {
2541 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2542 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2543 0xe08cc00f, /* add ip, ip, pc */
2544 0xea000000, /* b .Lplt_tail */
2545 };
2546
2547 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2548 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2549 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2550 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2551 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2552 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2553 #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4)
2554 #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4)
2555
2556 enum stub_insn_type
2557 {
2558 THUMB16_TYPE = 1,
2559 THUMB32_TYPE,
2560 ARM_TYPE,
2561 DATA_TYPE
2562 };
2563
2564 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2565 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2566 is inserted in arm_build_one_stub(). */
2567 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2568 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2569 #define THUMB32_MOVT(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVT_ABS, 0}
2570 #define THUMB32_MOVW(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVW_ABS_NC, 0}
2571 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2572 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2573 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2574 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2575
2576 typedef struct
2577 {
2578 bfd_vma data;
2579 enum stub_insn_type type;
2580 unsigned int r_type;
2581 int reloc_addend;
2582 } insn_sequence;
2583
2584 /* See note [Thumb nop sequence] when adding a veneer. */
2585
2586 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2587 to reach the stub if necessary. */
2588 static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
2589 {
2590 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2591 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2592 };
2593
2594 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2595 available. */
2596 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
2597 {
2598 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2599 ARM_INSN (0xe12fff1c), /* bx ip */
2600 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2601 };
2602
2603 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2604 static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
2605 {
2606 THUMB16_INSN (0xb401), /* push {r0} */
2607 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2608 THUMB16_INSN (0x4684), /* mov ip, r0 */
2609 THUMB16_INSN (0xbc01), /* pop {r0} */
2610 THUMB16_INSN (0x4760), /* bx ip */
2611 THUMB16_INSN (0xbf00), /* nop */
2612 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2613 };
2614
2615 /* Thumb -> Thumb long branch stub in thumb2 encoding. Used on armv7. */
2616 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only[] =
2617 {
2618 THUMB32_INSN (0xf85ff000), /* ldr.w pc, [pc, #-0] */
2619 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(x) */
2620 };
2621
2622 /* Thumb -> Thumb long branch stub. Used for PureCode sections on Thumb2
2623 M-profile architectures. */
2624 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only_pure[] =
2625 {
2626 THUMB32_MOVW (0xf2400c00), /* mov.w ip, R_ARM_MOVW_ABS_NC */
2627 THUMB32_MOVT (0xf2c00c00), /* movt ip, R_ARM_MOVT_ABS << 16 */
2628 THUMB16_INSN (0x4760), /* bx ip */
2629 };
2630
2631 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2632 allowed. */
2633 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2634 {
2635 THUMB16_INSN (0x4778), /* bx pc */
2636 THUMB16_INSN (0xe7fd), /* b .-2 */
2637 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2638 ARM_INSN (0xe12fff1c), /* bx ip */
2639 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2640 };
2641
2642 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2643 available. */
2644 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
2645 {
2646 THUMB16_INSN (0x4778), /* bx pc */
2647 THUMB16_INSN (0xe7fd), /* b .-2 */
2648 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2649 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2650 };
2651
2652 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2653 one, when the destination is close enough. */
2654 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
2655 {
2656 THUMB16_INSN (0x4778), /* bx pc */
2657 THUMB16_INSN (0xe7fd), /* b .-2 */
2658 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2659 };
2660
2661 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2662 blx to reach the stub if necessary. */
2663 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
2664 {
2665 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2666 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2667 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2668 };
2669
2670 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2671 blx to reach the stub if necessary. We can not add into pc;
2672 it is not guaranteed to mode switch (different in ARMv6 and
2673 ARMv7). */
2674 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2675 {
2676 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2677 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2678 ARM_INSN (0xe12fff1c), /* bx ip */
2679 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2680 };
2681
2682 /* V4T ARM -> ARM long branch stub, PIC. */
2683 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2684 {
2685 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2686 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2687 ARM_INSN (0xe12fff1c), /* bx ip */
2688 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2689 };
2690
2691 /* V4T Thumb -> ARM long branch stub, PIC. */
2692 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2693 {
2694 THUMB16_INSN (0x4778), /* bx pc */
2695 THUMB16_INSN (0xe7fd), /* b .-2 */
2696 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2697 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2698 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2699 };
2700
2701 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2702 architectures. */
2703 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2704 {
2705 THUMB16_INSN (0xb401), /* push {r0} */
2706 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2707 THUMB16_INSN (0x46fc), /* mov ip, pc */
2708 THUMB16_INSN (0x4484), /* add ip, r0 */
2709 THUMB16_INSN (0xbc01), /* pop {r0} */
2710 THUMB16_INSN (0x4760), /* bx ip */
2711 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2712 };
2713
2714 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2715 allowed. */
2716 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2717 {
2718 THUMB16_INSN (0x4778), /* bx pc */
2719 THUMB16_INSN (0xe7fd), /* b .-2 */
2720 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2721 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2722 ARM_INSN (0xe12fff1c), /* bx ip */
2723 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2724 };
2725
2726 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2727 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2728 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2729 {
2730 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2731 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2732 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2733 };
2734
2735 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2736 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2737 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2738 {
2739 THUMB16_INSN (0x4778), /* bx pc */
2740 THUMB16_INSN (0xe7fd), /* b .-2 */
2741 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2742 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2743 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2744 };
2745
2746 /* NaCl ARM -> ARM long branch stub. */
2747 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] =
2748 {
2749 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2750 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2751 ARM_INSN (0xe12fff1c), /* bx ip */
2752 ARM_INSN (0xe320f000), /* nop */
2753 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2754 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2755 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2756 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2757 };
2758
2759 /* NaCl ARM -> ARM long branch stub, PIC. */
2760 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] =
2761 {
2762 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2763 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2764 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2765 ARM_INSN (0xe12fff1c), /* bx ip */
2766 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2767 DATA_WORD (0, R_ARM_REL32, 8), /* dcd R_ARM_REL32(X+8) */
2768 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2769 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2770 };
2771
2772 /* Stub used for transition to secure state (aka SG veneer). */
2773 static const insn_sequence elf32_arm_stub_cmse_branch_thumb_only[] =
2774 {
2775 THUMB32_INSN (0xe97fe97f), /* sg. */
2776 THUMB32_B_INSN (0xf000b800, -4), /* b.w original_branch_dest. */
2777 };
2778
2779
2780 /* Cortex-A8 erratum-workaround stubs. */
2781
2782 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2783 can't use a conditional branch to reach this stub). */
2784
2785 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2786 {
2787 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2788 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2789 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2790 };
2791
2792 /* Stub used for b.w and bl.w instructions. */
2793
2794 static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2795 {
2796 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2797 };
2798
2799 static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2800 {
2801 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2802 };
2803
2804 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2805 instruction (which switches to ARM mode) to point to this stub. Jump to the
2806 real destination using an ARM-mode branch. */
2807
2808 static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2809 {
2810 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2811 };
2812
2813 /* For each section group there can be a specially created linker section
2814 to hold the stubs for that group. The name of the stub section is based
2815 upon the name of another section within that group with the suffix below
2816 applied.
2817
2818 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2819 create what appeared to be a linker stub section when it actually
2820 contained user code/data. For example, consider this fragment:
2821
2822 const char * stubborn_problems[] = { "np" };
2823
2824 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2825 section called:
2826
2827 .data.rel.local.stubborn_problems
2828
2829 This then causes problems in arm32_arm_build_stubs() as it triggers:
2830
2831 // Ignore non-stub sections.
2832 if (!strstr (stub_sec->name, STUB_SUFFIX))
2833 continue;
2834
2835 And so the section would be ignored instead of being processed. Hence
2836 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2837 C identifier. */
2838 #define STUB_SUFFIX ".__stub"
2839
2840 /* One entry per long/short branch stub defined above. */
2841 #define DEF_STUBS \
2842 DEF_STUB(long_branch_any_any) \
2843 DEF_STUB(long_branch_v4t_arm_thumb) \
2844 DEF_STUB(long_branch_thumb_only) \
2845 DEF_STUB(long_branch_v4t_thumb_thumb) \
2846 DEF_STUB(long_branch_v4t_thumb_arm) \
2847 DEF_STUB(short_branch_v4t_thumb_arm) \
2848 DEF_STUB(long_branch_any_arm_pic) \
2849 DEF_STUB(long_branch_any_thumb_pic) \
2850 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2851 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2852 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2853 DEF_STUB(long_branch_thumb_only_pic) \
2854 DEF_STUB(long_branch_any_tls_pic) \
2855 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2856 DEF_STUB(long_branch_arm_nacl) \
2857 DEF_STUB(long_branch_arm_nacl_pic) \
2858 DEF_STUB(cmse_branch_thumb_only) \
2859 DEF_STUB(a8_veneer_b_cond) \
2860 DEF_STUB(a8_veneer_b) \
2861 DEF_STUB(a8_veneer_bl) \
2862 DEF_STUB(a8_veneer_blx) \
2863 DEF_STUB(long_branch_thumb2_only) \
2864 DEF_STUB(long_branch_thumb2_only_pure)
2865
2866 #define DEF_STUB(x) arm_stub_##x,
2867 enum elf32_arm_stub_type
2868 {
2869 arm_stub_none,
2870 DEF_STUBS
2871 max_stub_type
2872 };
2873 #undef DEF_STUB
2874
2875 /* Note the first a8_veneer type. */
2876 const unsigned arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond;
2877
2878 typedef struct
2879 {
2880 const insn_sequence* template_sequence;
2881 int template_size;
2882 } stub_def;
2883
2884 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2885 static const stub_def stub_definitions[] =
2886 {
2887 {NULL, 0},
2888 DEF_STUBS
2889 };
2890
2891 struct elf32_arm_stub_hash_entry
2892 {
2893 /* Base hash table entry structure. */
2894 struct bfd_hash_entry root;
2895
2896 /* The stub section. */
2897 asection *stub_sec;
2898
2899 /* Offset within stub_sec of the beginning of this stub. */
2900 bfd_vma stub_offset;
2901
2902 /* Given the symbol's value and its section we can determine its final
2903 value when building the stubs (so the stub knows where to jump). */
2904 bfd_vma target_value;
2905 asection *target_section;
2906
2907 /* Same as above but for the source of the branch to the stub. Used for
2908 Cortex-A8 erratum workaround to patch it to branch to the stub. As
2909 such, source section does not need to be recorded since Cortex-A8 erratum
2910 workaround stubs are only generated when both source and target are in the
2911 same section. */
2912 bfd_vma source_value;
2913
2914 /* The instruction which caused this stub to be generated (only valid for
2915 Cortex-A8 erratum workaround stubs at present). */
2916 unsigned long orig_insn;
2917
2918 /* The stub type. */
2919 enum elf32_arm_stub_type stub_type;
2920 /* Its encoding size in bytes. */
2921 int stub_size;
2922 /* Its template. */
2923 const insn_sequence *stub_template;
2924 /* The size of the template (number of entries). */
2925 int stub_template_size;
2926
2927 /* The symbol table entry, if any, that this was derived from. */
2928 struct elf32_arm_link_hash_entry *h;
2929
2930 /* Type of branch. */
2931 enum arm_st_branch_type branch_type;
2932
2933 /* Where this stub is being called from, or, in the case of combined
2934 stub sections, the first input section in the group. */
2935 asection *id_sec;
2936
2937 /* The name for the local symbol at the start of this stub. The
2938 stub name in the hash table has to be unique; this does not, so
2939 it can be friendlier. */
2940 char *output_name;
2941 };
2942
2943 /* Used to build a map of a section. This is required for mixed-endian
2944 code/data. */
2945
2946 typedef struct elf32_elf_section_map
2947 {
2948 bfd_vma vma;
2949 char type;
2950 }
2951 elf32_arm_section_map;
2952
2953 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2954
2955 typedef enum
2956 {
2957 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2958 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2959 VFP11_ERRATUM_ARM_VENEER,
2960 VFP11_ERRATUM_THUMB_VENEER
2961 }
2962 elf32_vfp11_erratum_type;
2963
2964 typedef struct elf32_vfp11_erratum_list
2965 {
2966 struct elf32_vfp11_erratum_list *next;
2967 bfd_vma vma;
2968 union
2969 {
2970 struct
2971 {
2972 struct elf32_vfp11_erratum_list *veneer;
2973 unsigned int vfp_insn;
2974 } b;
2975 struct
2976 {
2977 struct elf32_vfp11_erratum_list *branch;
2978 unsigned int id;
2979 } v;
2980 } u;
2981 elf32_vfp11_erratum_type type;
2982 }
2983 elf32_vfp11_erratum_list;
2984
2985 /* Information about a STM32L4XX erratum veneer, or a branch to such a
2986 veneer. */
2987 typedef enum
2988 {
2989 STM32L4XX_ERRATUM_BRANCH_TO_VENEER,
2990 STM32L4XX_ERRATUM_VENEER
2991 }
2992 elf32_stm32l4xx_erratum_type;
2993
2994 typedef struct elf32_stm32l4xx_erratum_list
2995 {
2996 struct elf32_stm32l4xx_erratum_list *next;
2997 bfd_vma vma;
2998 union
2999 {
3000 struct
3001 {
3002 struct elf32_stm32l4xx_erratum_list *veneer;
3003 unsigned int insn;
3004 } b;
3005 struct
3006 {
3007 struct elf32_stm32l4xx_erratum_list *branch;
3008 unsigned int id;
3009 } v;
3010 } u;
3011 elf32_stm32l4xx_erratum_type type;
3012 }
3013 elf32_stm32l4xx_erratum_list;
3014
3015 typedef enum
3016 {
3017 DELETE_EXIDX_ENTRY,
3018 INSERT_EXIDX_CANTUNWIND_AT_END
3019 }
3020 arm_unwind_edit_type;
3021
3022 /* A (sorted) list of edits to apply to an unwind table. */
3023 typedef struct arm_unwind_table_edit
3024 {
3025 arm_unwind_edit_type type;
3026 /* Note: we sometimes want to insert an unwind entry corresponding to a
3027 section different from the one we're currently writing out, so record the
3028 (text) section this edit relates to here. */
3029 asection *linked_section;
3030 unsigned int index;
3031 struct arm_unwind_table_edit *next;
3032 }
3033 arm_unwind_table_edit;
3034
3035 typedef struct _arm_elf_section_data
3036 {
3037 /* Information about mapping symbols. */
3038 struct bfd_elf_section_data elf;
3039 unsigned int mapcount;
3040 unsigned int mapsize;
3041 elf32_arm_section_map *map;
3042 /* Information about CPU errata. */
3043 unsigned int erratumcount;
3044 elf32_vfp11_erratum_list *erratumlist;
3045 unsigned int stm32l4xx_erratumcount;
3046 elf32_stm32l4xx_erratum_list *stm32l4xx_erratumlist;
3047 unsigned int additional_reloc_count;
3048 /* Information about unwind tables. */
3049 union
3050 {
3051 /* Unwind info attached to a text section. */
3052 struct
3053 {
3054 asection *arm_exidx_sec;
3055 } text;
3056
3057 /* Unwind info attached to an .ARM.exidx section. */
3058 struct
3059 {
3060 arm_unwind_table_edit *unwind_edit_list;
3061 arm_unwind_table_edit *unwind_edit_tail;
3062 } exidx;
3063 } u;
3064 }
3065 _arm_elf_section_data;
3066
3067 #define elf32_arm_section_data(sec) \
3068 ((_arm_elf_section_data *) elf_section_data (sec))
3069
3070 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
3071 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
3072 so may be created multiple times: we use an array of these entries whilst
3073 relaxing which we can refresh easily, then create stubs for each potentially
3074 erratum-triggering instruction once we've settled on a solution. */
3075
3076 struct a8_erratum_fix
3077 {
3078 bfd *input_bfd;
3079 asection *section;
3080 bfd_vma offset;
3081 bfd_vma target_offset;
3082 unsigned long orig_insn;
3083 char *stub_name;
3084 enum elf32_arm_stub_type stub_type;
3085 enum arm_st_branch_type branch_type;
3086 };
3087
3088 /* A table of relocs applied to branches which might trigger Cortex-A8
3089 erratum. */
3090
3091 struct a8_erratum_reloc
3092 {
3093 bfd_vma from;
3094 bfd_vma destination;
3095 struct elf32_arm_link_hash_entry *hash;
3096 const char *sym_name;
3097 unsigned int r_type;
3098 enum arm_st_branch_type branch_type;
3099 bfd_boolean non_a8_stub;
3100 };
3101
3102 /* The size of the thread control block. */
3103 #define TCB_SIZE 8
3104
3105 /* ARM-specific information about a PLT entry, over and above the usual
3106 gotplt_union. */
3107 struct arm_plt_info
3108 {
3109 /* We reference count Thumb references to a PLT entry separately,
3110 so that we can emit the Thumb trampoline only if needed. */
3111 bfd_signed_vma thumb_refcount;
3112
3113 /* Some references from Thumb code may be eliminated by BL->BLX
3114 conversion, so record them separately. */
3115 bfd_signed_vma maybe_thumb_refcount;
3116
3117 /* How many of the recorded PLT accesses were from non-call relocations.
3118 This information is useful when deciding whether anything takes the
3119 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
3120 non-call references to the function should resolve directly to the
3121 real runtime target. */
3122 unsigned int noncall_refcount;
3123
3124 /* Since PLT entries have variable size if the Thumb prologue is
3125 used, we need to record the index into .got.plt instead of
3126 recomputing it from the PLT offset. */
3127 bfd_signed_vma got_offset;
3128 };
3129
3130 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
3131 struct arm_local_iplt_info
3132 {
3133 /* The information that is usually found in the generic ELF part of
3134 the hash table entry. */
3135 union gotplt_union root;
3136
3137 /* The information that is usually found in the ARM-specific part of
3138 the hash table entry. */
3139 struct arm_plt_info arm;
3140
3141 /* A list of all potential dynamic relocations against this symbol. */
3142 struct elf_dyn_relocs *dyn_relocs;
3143 };
3144
3145 /* Structure to handle FDPIC support for local functions. */
3146 struct fdpic_local {
3147 unsigned int funcdesc_cnt;
3148 unsigned int gotofffuncdesc_cnt;
3149 int funcdesc_offset;
3150 };
3151
3152 struct elf_arm_obj_tdata
3153 {
3154 struct elf_obj_tdata root;
3155
3156 /* tls_type for each local got entry. */
3157 char *local_got_tls_type;
3158
3159 /* GOTPLT entries for TLS descriptors. */
3160 bfd_vma *local_tlsdesc_gotent;
3161
3162 /* Information for local symbols that need entries in .iplt. */
3163 struct arm_local_iplt_info **local_iplt;
3164
3165 /* Zero to warn when linking objects with incompatible enum sizes. */
3166 int no_enum_size_warning;
3167
3168 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
3169 int no_wchar_size_warning;
3170
3171 /* Maintains FDPIC counters and funcdesc info. */
3172 struct fdpic_local *local_fdpic_cnts;
3173 };
3174
3175 #define elf_arm_tdata(bfd) \
3176 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
3177
3178 #define elf32_arm_local_got_tls_type(bfd) \
3179 (elf_arm_tdata (bfd)->local_got_tls_type)
3180
3181 #define elf32_arm_local_tlsdesc_gotent(bfd) \
3182 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
3183
3184 #define elf32_arm_local_iplt(bfd) \
3185 (elf_arm_tdata (bfd)->local_iplt)
3186
3187 #define elf32_arm_local_fdpic_cnts(bfd) \
3188 (elf_arm_tdata (bfd)->local_fdpic_cnts)
3189
3190 #define is_arm_elf(bfd) \
3191 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
3192 && elf_tdata (bfd) != NULL \
3193 && elf_object_id (bfd) == ARM_ELF_DATA)
3194
3195 static bfd_boolean
3196 elf32_arm_mkobject (bfd *abfd)
3197 {
3198 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
3199 ARM_ELF_DATA);
3200 }
3201
3202 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
3203
3204 /* Structure to handle FDPIC support for extern functions. */
3205 struct fdpic_global {
3206 unsigned int gotofffuncdesc_cnt;
3207 unsigned int gotfuncdesc_cnt;
3208 unsigned int funcdesc_cnt;
3209 int funcdesc_offset;
3210 int gotfuncdesc_offset;
3211 };
3212
3213 /* Arm ELF linker hash entry. */
3214 struct elf32_arm_link_hash_entry
3215 {
3216 struct elf_link_hash_entry root;
3217
3218 /* ARM-specific PLT information. */
3219 struct arm_plt_info plt;
3220
3221 #define GOT_UNKNOWN 0
3222 #define GOT_NORMAL 1
3223 #define GOT_TLS_GD 2
3224 #define GOT_TLS_IE 4
3225 #define GOT_TLS_GDESC 8
3226 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
3227 unsigned int tls_type : 8;
3228
3229 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
3230 unsigned int is_iplt : 1;
3231
3232 unsigned int unused : 23;
3233
3234 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
3235 starting at the end of the jump table. */
3236 bfd_vma tlsdesc_got;
3237
3238 /* The symbol marking the real symbol location for exported thumb
3239 symbols with Arm stubs. */
3240 struct elf_link_hash_entry *export_glue;
3241
3242 /* A pointer to the most recently used stub hash entry against this
3243 symbol. */
3244 struct elf32_arm_stub_hash_entry *stub_cache;
3245
3246 /* Counter for FDPIC relocations against this symbol. */
3247 struct fdpic_global fdpic_cnts;
3248 };
3249
3250 /* Traverse an arm ELF linker hash table. */
3251 #define elf32_arm_link_hash_traverse(table, func, info) \
3252 (elf_link_hash_traverse \
3253 (&(table)->root, \
3254 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
3255 (info)))
3256
3257 /* Get the ARM elf linker hash table from a link_info structure. */
3258 #define elf32_arm_hash_table(info) \
3259 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
3260 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
3261
3262 #define arm_stub_hash_lookup(table, string, create, copy) \
3263 ((struct elf32_arm_stub_hash_entry *) \
3264 bfd_hash_lookup ((table), (string), (create), (copy)))
3265
3266 /* Array to keep track of which stub sections have been created, and
3267 information on stub grouping. */
3268 struct map_stub
3269 {
3270 /* This is the section to which stubs in the group will be
3271 attached. */
3272 asection *link_sec;
3273 /* The stub section. */
3274 asection *stub_sec;
3275 };
3276
3277 #define elf32_arm_compute_jump_table_size(htab) \
3278 ((htab)->next_tls_desc_index * 4)
3279
3280 /* ARM ELF linker hash table. */
3281 struct elf32_arm_link_hash_table
3282 {
3283 /* The main hash table. */
3284 struct elf_link_hash_table root;
3285
3286 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
3287 bfd_size_type thumb_glue_size;
3288
3289 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
3290 bfd_size_type arm_glue_size;
3291
3292 /* The size in bytes of section containing the ARMv4 BX veneers. */
3293 bfd_size_type bx_glue_size;
3294
3295 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
3296 veneer has been populated. */
3297 bfd_vma bx_glue_offset[15];
3298
3299 /* The size in bytes of the section containing glue for VFP11 erratum
3300 veneers. */
3301 bfd_size_type vfp11_erratum_glue_size;
3302
3303 /* The size in bytes of the section containing glue for STM32L4XX erratum
3304 veneers. */
3305 bfd_size_type stm32l4xx_erratum_glue_size;
3306
3307 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
3308 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
3309 elf32_arm_write_section(). */
3310 struct a8_erratum_fix *a8_erratum_fixes;
3311 unsigned int num_a8_erratum_fixes;
3312
3313 /* An arbitrary input BFD chosen to hold the glue sections. */
3314 bfd * bfd_of_glue_owner;
3315
3316 /* Nonzero to output a BE8 image. */
3317 int byteswap_code;
3318
3319 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
3320 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
3321 int target1_is_rel;
3322
3323 /* The relocation to use for R_ARM_TARGET2 relocations. */
3324 int target2_reloc;
3325
3326 /* 0 = Ignore R_ARM_V4BX.
3327 1 = Convert BX to MOV PC.
3328 2 = Generate v4 interworing stubs. */
3329 int fix_v4bx;
3330
3331 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
3332 int fix_cortex_a8;
3333
3334 /* Whether we should fix the ARM1176 BLX immediate issue. */
3335 int fix_arm1176;
3336
3337 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
3338 int use_blx;
3339
3340 /* What sort of code sequences we should look for which may trigger the
3341 VFP11 denorm erratum. */
3342 bfd_arm_vfp11_fix vfp11_fix;
3343
3344 /* Global counter for the number of fixes we have emitted. */
3345 int num_vfp11_fixes;
3346
3347 /* What sort of code sequences we should look for which may trigger the
3348 STM32L4XX erratum. */
3349 bfd_arm_stm32l4xx_fix stm32l4xx_fix;
3350
3351 /* Global counter for the number of fixes we have emitted. */
3352 int num_stm32l4xx_fixes;
3353
3354 /* Nonzero to force PIC branch veneers. */
3355 int pic_veneer;
3356
3357 /* The number of bytes in the initial entry in the PLT. */
3358 bfd_size_type plt_header_size;
3359
3360 /* The number of bytes in the subsequent PLT etries. */
3361 bfd_size_type plt_entry_size;
3362
3363 /* True if the target uses REL relocations. */
3364 bfd_boolean use_rel;
3365
3366 /* Nonzero if import library must be a secure gateway import library
3367 as per ARMv8-M Security Extensions. */
3368 int cmse_implib;
3369
3370 /* The import library whose symbols' address must remain stable in
3371 the import library generated. */
3372 bfd *in_implib_bfd;
3373
3374 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
3375 bfd_vma next_tls_desc_index;
3376
3377 /* How many R_ARM_TLS_DESC relocations were generated so far. */
3378 bfd_vma num_tls_desc;
3379
3380 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
3381 asection *srelplt2;
3382
3383 /* The offset into splt of the PLT entry for the TLS descriptor
3384 resolver. Special values are 0, if not necessary (or not found
3385 to be necessary yet), and -1 if needed but not determined
3386 yet. */
3387 bfd_vma dt_tlsdesc_plt;
3388
3389 /* The offset into sgot of the GOT entry used by the PLT entry
3390 above. */
3391 bfd_vma dt_tlsdesc_got;
3392
3393 /* Offset in .plt section of tls_arm_trampoline. */
3394 bfd_vma tls_trampoline;
3395
3396 /* Data for R_ARM_TLS_LDM32/R_ARM_TLS_LDM32_FDPIC relocations. */
3397 union
3398 {
3399 bfd_signed_vma refcount;
3400 bfd_vma offset;
3401 } tls_ldm_got;
3402
3403 /* Small local sym cache. */
3404 struct sym_cache sym_cache;
3405
3406 /* For convenience in allocate_dynrelocs. */
3407 bfd * obfd;
3408
3409 /* The amount of space used by the reserved portion of the sgotplt
3410 section, plus whatever space is used by the jump slots. */
3411 bfd_vma sgotplt_jump_table_size;
3412
3413 /* The stub hash table. */
3414 struct bfd_hash_table stub_hash_table;
3415
3416 /* Linker stub bfd. */
3417 bfd *stub_bfd;
3418
3419 /* Linker call-backs. */
3420 asection * (*add_stub_section) (const char *, asection *, asection *,
3421 unsigned int);
3422 void (*layout_sections_again) (void);
3423
3424 /* Array to keep track of which stub sections have been created, and
3425 information on stub grouping. */
3426 struct map_stub *stub_group;
3427
3428 /* Input stub section holding secure gateway veneers. */
3429 asection *cmse_stub_sec;
3430
3431 /* Offset in cmse_stub_sec where new SG veneers (not in input import library)
3432 start to be allocated. */
3433 bfd_vma new_cmse_stub_offset;
3434
3435 /* Number of elements in stub_group. */
3436 unsigned int top_id;
3437
3438 /* Assorted information used by elf32_arm_size_stubs. */
3439 unsigned int bfd_count;
3440 unsigned int top_index;
3441 asection **input_list;
3442
3443 /* True if the target system uses FDPIC. */
3444 int fdpic_p;
3445
3446 /* Fixup section. Used for FDPIC. */
3447 asection *srofixup;
3448 };
3449
3450 /* Add an FDPIC read-only fixup. */
3451 static void
3452 arm_elf_add_rofixup (bfd *output_bfd, asection *srofixup, bfd_vma offset)
3453 {
3454 bfd_vma fixup_offset;
3455
3456 fixup_offset = srofixup->reloc_count++ * 4;
3457 BFD_ASSERT (fixup_offset < srofixup->size);
3458 bfd_put_32 (output_bfd, offset, srofixup->contents + fixup_offset);
3459 }
3460
3461 static inline int
3462 ctz (unsigned int mask)
3463 {
3464 #if GCC_VERSION >= 3004
3465 return __builtin_ctz (mask);
3466 #else
3467 unsigned int i;
3468
3469 for (i = 0; i < 8 * sizeof (mask); i++)
3470 {
3471 if (mask & 0x1)
3472 break;
3473 mask = (mask >> 1);
3474 }
3475 return i;
3476 #endif
3477 }
3478
3479 static inline int
3480 elf32_arm_popcount (unsigned int mask)
3481 {
3482 #if GCC_VERSION >= 3004
3483 return __builtin_popcount (mask);
3484 #else
3485 unsigned int i;
3486 int sum = 0;
3487
3488 for (i = 0; i < 8 * sizeof (mask); i++)
3489 {
3490 if (mask & 0x1)
3491 sum++;
3492 mask = (mask >> 1);
3493 }
3494 return sum;
3495 #endif
3496 }
3497
3498 static void elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
3499 asection *sreloc, Elf_Internal_Rela *rel);
3500
3501 static void
3502 arm_elf_fill_funcdesc(bfd *output_bfd,
3503 struct bfd_link_info *info,
3504 int *funcdesc_offset,
3505 int dynindx,
3506 int offset,
3507 bfd_vma addr,
3508 bfd_vma dynreloc_value,
3509 bfd_vma seg)
3510 {
3511 if ((*funcdesc_offset & 1) == 0)
3512 {
3513 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
3514 asection *sgot = globals->root.sgot;
3515
3516 if (bfd_link_pic(info))
3517 {
3518 asection *srelgot = globals->root.srelgot;
3519 Elf_Internal_Rela outrel;
3520
3521 outrel.r_info = ELF32_R_INFO (dynindx, R_ARM_FUNCDESC_VALUE);
3522 outrel.r_offset = sgot->output_section->vma + sgot->output_offset + offset;
3523 outrel.r_addend = 0;
3524
3525 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
3526 bfd_put_32 (output_bfd, addr, sgot->contents + offset);
3527 bfd_put_32 (output_bfd, seg, sgot->contents + offset + 4);
3528 }
3529 else
3530 {
3531 struct elf_link_hash_entry *hgot = globals->root.hgot;
3532 bfd_vma got_value = hgot->root.u.def.value
3533 + hgot->root.u.def.section->output_section->vma
3534 + hgot->root.u.def.section->output_offset;
3535
3536 arm_elf_add_rofixup(output_bfd, globals->srofixup,
3537 sgot->output_section->vma + sgot->output_offset
3538 + offset);
3539 arm_elf_add_rofixup(output_bfd, globals->srofixup,
3540 sgot->output_section->vma + sgot->output_offset
3541 + offset + 4);
3542 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + offset);
3543 bfd_put_32 (output_bfd, got_value, sgot->contents + offset + 4);
3544 }
3545 *funcdesc_offset |= 1;
3546 }
3547 }
3548
3549 /* Create an entry in an ARM ELF linker hash table. */
3550
3551 static struct bfd_hash_entry *
3552 elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
3553 struct bfd_hash_table * table,
3554 const char * string)
3555 {
3556 struct elf32_arm_link_hash_entry * ret =
3557 (struct elf32_arm_link_hash_entry *) entry;
3558
3559 /* Allocate the structure if it has not already been allocated by a
3560 subclass. */
3561 if (ret == NULL)
3562 ret = (struct elf32_arm_link_hash_entry *)
3563 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
3564 if (ret == NULL)
3565 return (struct bfd_hash_entry *) ret;
3566
3567 /* Call the allocation method of the superclass. */
3568 ret = ((struct elf32_arm_link_hash_entry *)
3569 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3570 table, string));
3571 if (ret != NULL)
3572 {
3573 ret->tls_type = GOT_UNKNOWN;
3574 ret->tlsdesc_got = (bfd_vma) -1;
3575 ret->plt.thumb_refcount = 0;
3576 ret->plt.maybe_thumb_refcount = 0;
3577 ret->plt.noncall_refcount = 0;
3578 ret->plt.got_offset = -1;
3579 ret->is_iplt = FALSE;
3580 ret->export_glue = NULL;
3581
3582 ret->stub_cache = NULL;
3583
3584 ret->fdpic_cnts.gotofffuncdesc_cnt = 0;
3585 ret->fdpic_cnts.gotfuncdesc_cnt = 0;
3586 ret->fdpic_cnts.funcdesc_cnt = 0;
3587 ret->fdpic_cnts.funcdesc_offset = -1;
3588 ret->fdpic_cnts.gotfuncdesc_offset = -1;
3589 }
3590
3591 return (struct bfd_hash_entry *) ret;
3592 }
3593
3594 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3595 symbols. */
3596
3597 static bfd_boolean
3598 elf32_arm_allocate_local_sym_info (bfd *abfd)
3599 {
3600 if (elf_local_got_refcounts (abfd) == NULL)
3601 {
3602 bfd_size_type num_syms;
3603 bfd_size_type size;
3604 char *data;
3605
3606 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3607 size = num_syms * (sizeof (bfd_signed_vma)
3608 + sizeof (struct arm_local_iplt_info *)
3609 + sizeof (bfd_vma)
3610 + sizeof (char)
3611 + sizeof (struct fdpic_local));
3612 data = bfd_zalloc (abfd, size);
3613 if (data == NULL)
3614 return FALSE;
3615
3616 elf32_arm_local_fdpic_cnts (abfd) = (struct fdpic_local *) data;
3617 data += num_syms * sizeof (struct fdpic_local);
3618
3619 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3620 data += num_syms * sizeof (bfd_signed_vma);
3621
3622 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3623 data += num_syms * sizeof (struct arm_local_iplt_info *);
3624
3625 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3626 data += num_syms * sizeof (bfd_vma);
3627
3628 elf32_arm_local_got_tls_type (abfd) = data;
3629 }
3630 return TRUE;
3631 }
3632
3633 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3634 to input bfd ABFD. Create the information if it doesn't already exist.
3635 Return null if an allocation fails. */
3636
3637 static struct arm_local_iplt_info *
3638 elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3639 {
3640 struct arm_local_iplt_info **ptr;
3641
3642 if (!elf32_arm_allocate_local_sym_info (abfd))
3643 return NULL;
3644
3645 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3646 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3647 if (*ptr == NULL)
3648 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3649 return *ptr;
3650 }
3651
3652 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3653 in ABFD's symbol table. If the symbol is global, H points to its
3654 hash table entry, otherwise H is null.
3655
3656 Return true if the symbol does have PLT information. When returning
3657 true, point *ROOT_PLT at the target-independent reference count/offset
3658 union and *ARM_PLT at the ARM-specific information. */
3659
3660 static bfd_boolean
3661 elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_table *globals,
3662 struct elf32_arm_link_hash_entry *h,
3663 unsigned long r_symndx, union gotplt_union **root_plt,
3664 struct arm_plt_info **arm_plt)
3665 {
3666 struct arm_local_iplt_info *local_iplt;
3667
3668 if (globals->root.splt == NULL && globals->root.iplt == NULL)
3669 return FALSE;
3670
3671 if (h != NULL)
3672 {
3673 *root_plt = &h->root.plt;
3674 *arm_plt = &h->plt;
3675 return TRUE;
3676 }
3677
3678 if (elf32_arm_local_iplt (abfd) == NULL)
3679 return FALSE;
3680
3681 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3682 if (local_iplt == NULL)
3683 return FALSE;
3684
3685 *root_plt = &local_iplt->root;
3686 *arm_plt = &local_iplt->arm;
3687 return TRUE;
3688 }
3689
3690 static bfd_boolean using_thumb_only (struct elf32_arm_link_hash_table *globals);
3691
3692 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3693 before it. */
3694
3695 static bfd_boolean
3696 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3697 struct arm_plt_info *arm_plt)
3698 {
3699 struct elf32_arm_link_hash_table *htab;
3700
3701 htab = elf32_arm_hash_table (info);
3702
3703 return (!using_thumb_only(htab) && (arm_plt->thumb_refcount != 0
3704 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0)));
3705 }
3706
3707 /* Return a pointer to the head of the dynamic reloc list that should
3708 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3709 ABFD's symbol table. Return null if an error occurs. */
3710
3711 static struct elf_dyn_relocs **
3712 elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3713 Elf_Internal_Sym *isym)
3714 {
3715 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3716 {
3717 struct arm_local_iplt_info *local_iplt;
3718
3719 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3720 if (local_iplt == NULL)
3721 return NULL;
3722 return &local_iplt->dyn_relocs;
3723 }
3724 else
3725 {
3726 /* Track dynamic relocs needed for local syms too.
3727 We really need local syms available to do this
3728 easily. Oh well. */
3729 asection *s;
3730 void *vpp;
3731
3732 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3733 if (s == NULL)
3734 abort ();
3735
3736 vpp = &elf_section_data (s)->local_dynrel;
3737 return (struct elf_dyn_relocs **) vpp;
3738 }
3739 }
3740
3741 /* Initialize an entry in the stub hash table. */
3742
3743 static struct bfd_hash_entry *
3744 stub_hash_newfunc (struct bfd_hash_entry *entry,
3745 struct bfd_hash_table *table,
3746 const char *string)
3747 {
3748 /* Allocate the structure if it has not already been allocated by a
3749 subclass. */
3750 if (entry == NULL)
3751 {
3752 entry = (struct bfd_hash_entry *)
3753 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
3754 if (entry == NULL)
3755 return entry;
3756 }
3757
3758 /* Call the allocation method of the superclass. */
3759 entry = bfd_hash_newfunc (entry, table, string);
3760 if (entry != NULL)
3761 {
3762 struct elf32_arm_stub_hash_entry *eh;
3763
3764 /* Initialize the local fields. */
3765 eh = (struct elf32_arm_stub_hash_entry *) entry;
3766 eh->stub_sec = NULL;
3767 eh->stub_offset = (bfd_vma) -1;
3768 eh->source_value = 0;
3769 eh->target_value = 0;
3770 eh->target_section = NULL;
3771 eh->orig_insn = 0;
3772 eh->stub_type = arm_stub_none;
3773 eh->stub_size = 0;
3774 eh->stub_template = NULL;
3775 eh->stub_template_size = -1;
3776 eh->h = NULL;
3777 eh->id_sec = NULL;
3778 eh->output_name = NULL;
3779 }
3780
3781 return entry;
3782 }
3783
3784 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3785 shortcuts to them in our hash table. */
3786
3787 static bfd_boolean
3788 create_got_section (bfd *dynobj, struct bfd_link_info *info)
3789 {
3790 struct elf32_arm_link_hash_table *htab;
3791
3792 htab = elf32_arm_hash_table (info);
3793 if (htab == NULL)
3794 return FALSE;
3795
3796 /* BPABI objects never have a GOT, or associated sections. */
3797 if (htab->root.target_os == is_symbian)
3798 return TRUE;
3799
3800 if (! _bfd_elf_create_got_section (dynobj, info))
3801 return FALSE;
3802
3803 /* Also create .rofixup. */
3804 if (htab->fdpic_p)
3805 {
3806 htab->srofixup = bfd_make_section_with_flags (dynobj, ".rofixup",
3807 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
3808 | SEC_IN_MEMORY | SEC_LINKER_CREATED | SEC_READONLY));
3809 if (htab->srofixup == NULL
3810 || !bfd_set_section_alignment (htab->srofixup, 2))
3811 return FALSE;
3812 }
3813
3814 return TRUE;
3815 }
3816
3817 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3818
3819 static bfd_boolean
3820 create_ifunc_sections (struct bfd_link_info *info)
3821 {
3822 struct elf32_arm_link_hash_table *htab;
3823 const struct elf_backend_data *bed;
3824 bfd *dynobj;
3825 asection *s;
3826 flagword flags;
3827
3828 htab = elf32_arm_hash_table (info);
3829 dynobj = htab->root.dynobj;
3830 bed = get_elf_backend_data (dynobj);
3831 flags = bed->dynamic_sec_flags;
3832
3833 if (htab->root.iplt == NULL)
3834 {
3835 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3836 flags | SEC_READONLY | SEC_CODE);
3837 if (s == NULL
3838 || !bfd_set_section_alignment (s, bed->plt_alignment))
3839 return FALSE;
3840 htab->root.iplt = s;
3841 }
3842
3843 if (htab->root.irelplt == NULL)
3844 {
3845 s = bfd_make_section_anyway_with_flags (dynobj,
3846 RELOC_SECTION (htab, ".iplt"),
3847 flags | SEC_READONLY);
3848 if (s == NULL
3849 || !bfd_set_section_alignment (s, bed->s->log_file_align))
3850 return FALSE;
3851 htab->root.irelplt = s;
3852 }
3853
3854 if (htab->root.igotplt == NULL)
3855 {
3856 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
3857 if (s == NULL
3858 || !bfd_set_section_alignment (s, bed->s->log_file_align))
3859 return FALSE;
3860 htab->root.igotplt = s;
3861 }
3862 return TRUE;
3863 }
3864
3865 /* Determine if we're dealing with a Thumb only architecture. */
3866
3867 static bfd_boolean
3868 using_thumb_only (struct elf32_arm_link_hash_table *globals)
3869 {
3870 int arch;
3871 int profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3872 Tag_CPU_arch_profile);
3873
3874 if (profile)
3875 return profile == 'M';
3876
3877 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3878
3879 /* Force return logic to be reviewed for each new architecture. */
3880 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8_1M_MAIN);
3881
3882 if (arch == TAG_CPU_ARCH_V6_M
3883 || arch == TAG_CPU_ARCH_V6S_M
3884 || arch == TAG_CPU_ARCH_V7E_M
3885 || arch == TAG_CPU_ARCH_V8M_BASE
3886 || arch == TAG_CPU_ARCH_V8M_MAIN
3887 || arch == TAG_CPU_ARCH_V8_1M_MAIN)
3888 return TRUE;
3889
3890 return FALSE;
3891 }
3892
3893 /* Determine if we're dealing with a Thumb-2 object. */
3894
3895 static bfd_boolean
3896 using_thumb2 (struct elf32_arm_link_hash_table *globals)
3897 {
3898 int arch;
3899 int thumb_isa = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3900 Tag_THUMB_ISA_use);
3901
3902 if (thumb_isa)
3903 return thumb_isa == 2;
3904
3905 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3906
3907 /* Force return logic to be reviewed for each new architecture. */
3908 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8_1M_MAIN);
3909
3910 return (arch == TAG_CPU_ARCH_V6T2
3911 || arch == TAG_CPU_ARCH_V7
3912 || arch == TAG_CPU_ARCH_V7E_M
3913 || arch == TAG_CPU_ARCH_V8
3914 || arch == TAG_CPU_ARCH_V8R
3915 || arch == TAG_CPU_ARCH_V8M_MAIN
3916 || arch == TAG_CPU_ARCH_V8_1M_MAIN);
3917 }
3918
3919 /* Determine whether Thumb-2 BL instruction is available. */
3920
3921 static bfd_boolean
3922 using_thumb2_bl (struct elf32_arm_link_hash_table *globals)
3923 {
3924 int arch =
3925 bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3926
3927 /* Force return logic to be reviewed for each new architecture. */
3928 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8_1M_MAIN);
3929
3930 /* Architecture was introduced after ARMv6T2 (eg. ARMv6-M). */
3931 return (arch == TAG_CPU_ARCH_V6T2
3932 || arch >= TAG_CPU_ARCH_V7);
3933 }
3934
3935 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3936 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3937 hash table. */
3938
3939 static bfd_boolean
3940 elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
3941 {
3942 struct elf32_arm_link_hash_table *htab;
3943
3944 htab = elf32_arm_hash_table (info);
3945 if (htab == NULL)
3946 return FALSE;
3947
3948 if (!htab->root.sgot && !create_got_section (dynobj, info))
3949 return FALSE;
3950
3951 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3952 return FALSE;
3953
3954 if (htab->root.target_os == is_vxworks)
3955 {
3956 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3957 return FALSE;
3958
3959 if (bfd_link_pic (info))
3960 {
3961 htab->plt_header_size = 0;
3962 htab->plt_entry_size
3963 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3964 }
3965 else
3966 {
3967 htab->plt_header_size
3968 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3969 htab->plt_entry_size
3970 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3971 }
3972
3973 if (elf_elfheader (dynobj))
3974 elf_elfheader (dynobj)->e_ident[EI_CLASS] = ELFCLASS32;
3975 }
3976 else
3977 {
3978 /* PR ld/16017
3979 Test for thumb only architectures. Note - we cannot just call
3980 using_thumb_only() as the attributes in the output bfd have not been
3981 initialised at this point, so instead we use the input bfd. */
3982 bfd * saved_obfd = htab->obfd;
3983
3984 htab->obfd = dynobj;
3985 if (using_thumb_only (htab))
3986 {
3987 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
3988 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
3989 }
3990 htab->obfd = saved_obfd;
3991 }
3992
3993 if (htab->fdpic_p) {
3994 htab->plt_header_size = 0;
3995 if (info->flags & DF_BIND_NOW)
3996 htab->plt_entry_size = 4 * (ARRAY_SIZE(elf32_arm_fdpic_plt_entry) - 5);
3997 else
3998 htab->plt_entry_size = 4 * ARRAY_SIZE(elf32_arm_fdpic_plt_entry);
3999 }
4000
4001 if (!htab->root.splt
4002 || !htab->root.srelplt
4003 || !htab->root.sdynbss
4004 || (!bfd_link_pic (info) && !htab->root.srelbss))
4005 abort ();
4006
4007 return TRUE;
4008 }
4009
4010 /* Copy the extra info we tack onto an elf_link_hash_entry. */
4011
4012 static void
4013 elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
4014 struct elf_link_hash_entry *dir,
4015 struct elf_link_hash_entry *ind)
4016 {
4017 struct elf32_arm_link_hash_entry *edir, *eind;
4018
4019 edir = (struct elf32_arm_link_hash_entry *) dir;
4020 eind = (struct elf32_arm_link_hash_entry *) ind;
4021
4022 if (ind->root.type == bfd_link_hash_indirect)
4023 {
4024 /* Copy over PLT info. */
4025 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
4026 eind->plt.thumb_refcount = 0;
4027 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
4028 eind->plt.maybe_thumb_refcount = 0;
4029 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
4030 eind->plt.noncall_refcount = 0;
4031
4032 /* Copy FDPIC counters. */
4033 edir->fdpic_cnts.gotofffuncdesc_cnt += eind->fdpic_cnts.gotofffuncdesc_cnt;
4034 edir->fdpic_cnts.gotfuncdesc_cnt += eind->fdpic_cnts.gotfuncdesc_cnt;
4035 edir->fdpic_cnts.funcdesc_cnt += eind->fdpic_cnts.funcdesc_cnt;
4036
4037 /* We should only allocate a function to .iplt once the final
4038 symbol information is known. */
4039 BFD_ASSERT (!eind->is_iplt);
4040
4041 if (dir->got.refcount <= 0)
4042 {
4043 edir->tls_type = eind->tls_type;
4044 eind->tls_type = GOT_UNKNOWN;
4045 }
4046 }
4047
4048 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
4049 }
4050
4051 /* Destroy an ARM elf linker hash table. */
4052
4053 static void
4054 elf32_arm_link_hash_table_free (bfd *obfd)
4055 {
4056 struct elf32_arm_link_hash_table *ret
4057 = (struct elf32_arm_link_hash_table *) obfd->link.hash;
4058
4059 bfd_hash_table_free (&ret->stub_hash_table);
4060 _bfd_elf_link_hash_table_free (obfd);
4061 }
4062
4063 /* Create an ARM elf linker hash table. */
4064
4065 static struct bfd_link_hash_table *
4066 elf32_arm_link_hash_table_create (bfd *abfd)
4067 {
4068 struct elf32_arm_link_hash_table *ret;
4069 size_t amt = sizeof (struct elf32_arm_link_hash_table);
4070
4071 ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt);
4072 if (ret == NULL)
4073 return NULL;
4074
4075 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
4076 elf32_arm_link_hash_newfunc,
4077 sizeof (struct elf32_arm_link_hash_entry),
4078 ARM_ELF_DATA))
4079 {
4080 free (ret);
4081 return NULL;
4082 }
4083
4084 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
4085 ret->stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE;
4086 #ifdef FOUR_WORD_PLT
4087 ret->plt_header_size = 16;
4088 ret->plt_entry_size = 16;
4089 #else
4090 ret->plt_header_size = 20;
4091 ret->plt_entry_size = elf32_arm_use_long_plt_entry ? 16 : 12;
4092 #endif
4093 ret->use_rel = TRUE;
4094 ret->obfd = abfd;
4095 ret->fdpic_p = 0;
4096
4097 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
4098 sizeof (struct elf32_arm_stub_hash_entry)))
4099 {
4100 _bfd_elf_link_hash_table_free (abfd);
4101 return NULL;
4102 }
4103 ret->root.root.hash_table_free = elf32_arm_link_hash_table_free;
4104
4105 return &ret->root.root;
4106 }
4107
4108 /* Determine what kind of NOPs are available. */
4109
4110 static bfd_boolean
4111 arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
4112 {
4113 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
4114 Tag_CPU_arch);
4115
4116 /* Force return logic to be reviewed for each new architecture. */
4117 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8_1M_MAIN);
4118
4119 return (arch == TAG_CPU_ARCH_V6T2
4120 || arch == TAG_CPU_ARCH_V6K
4121 || arch == TAG_CPU_ARCH_V7
4122 || arch == TAG_CPU_ARCH_V8
4123 || arch == TAG_CPU_ARCH_V8R);
4124 }
4125
4126 static bfd_boolean
4127 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
4128 {
4129 switch (stub_type)
4130 {
4131 case arm_stub_long_branch_thumb_only:
4132 case arm_stub_long_branch_thumb2_only:
4133 case arm_stub_long_branch_thumb2_only_pure:
4134 case arm_stub_long_branch_v4t_thumb_arm:
4135 case arm_stub_short_branch_v4t_thumb_arm:
4136 case arm_stub_long_branch_v4t_thumb_arm_pic:
4137 case arm_stub_long_branch_v4t_thumb_tls_pic:
4138 case arm_stub_long_branch_thumb_only_pic:
4139 case arm_stub_cmse_branch_thumb_only:
4140 return TRUE;
4141 case arm_stub_none:
4142 BFD_FAIL ();
4143 return FALSE;
4144 break;
4145 default:
4146 return FALSE;
4147 }
4148 }
4149
4150 /* Determine the type of stub needed, if any, for a call. */
4151
4152 static enum elf32_arm_stub_type
4153 arm_type_of_stub (struct bfd_link_info *info,
4154 asection *input_sec,
4155 const Elf_Internal_Rela *rel,
4156 unsigned char st_type,
4157 enum arm_st_branch_type *actual_branch_type,
4158 struct elf32_arm_link_hash_entry *hash,
4159 bfd_vma destination,
4160 asection *sym_sec,
4161 bfd *input_bfd,
4162 const char *name)
4163 {
4164 bfd_vma location;
4165 bfd_signed_vma branch_offset;
4166 unsigned int r_type;
4167 struct elf32_arm_link_hash_table * globals;
4168 bfd_boolean thumb2, thumb2_bl, thumb_only;
4169 enum elf32_arm_stub_type stub_type = arm_stub_none;
4170 int use_plt = 0;
4171 enum arm_st_branch_type branch_type = *actual_branch_type;
4172 union gotplt_union *root_plt;
4173 struct arm_plt_info *arm_plt;
4174 int arch;
4175 int thumb2_movw;
4176
4177 if (branch_type == ST_BRANCH_LONG)
4178 return stub_type;
4179
4180 globals = elf32_arm_hash_table (info);
4181 if (globals == NULL)
4182 return stub_type;
4183
4184 thumb_only = using_thumb_only (globals);
4185 thumb2 = using_thumb2 (globals);
4186 thumb2_bl = using_thumb2_bl (globals);
4187
4188 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
4189
4190 /* True for architectures that implement the thumb2 movw instruction. */
4191 thumb2_movw = thumb2 || (arch == TAG_CPU_ARCH_V8M_BASE);
4192
4193 /* Determine where the call point is. */
4194 location = (input_sec->output_offset
4195 + input_sec->output_section->vma
4196 + rel->r_offset);
4197
4198 r_type = ELF32_R_TYPE (rel->r_info);
4199
4200 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
4201 are considering a function call relocation. */
4202 if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
4203 || r_type == R_ARM_THM_JUMP19)
4204 && branch_type == ST_BRANCH_TO_ARM)
4205 branch_type = ST_BRANCH_TO_THUMB;
4206
4207 /* For TLS call relocs, it is the caller's responsibility to provide
4208 the address of the appropriate trampoline. */
4209 if (r_type != R_ARM_TLS_CALL
4210 && r_type != R_ARM_THM_TLS_CALL
4211 && elf32_arm_get_plt_info (input_bfd, globals, hash,
4212 ELF32_R_SYM (rel->r_info), &root_plt,
4213 &arm_plt)
4214 && root_plt->offset != (bfd_vma) -1)
4215 {
4216 asection *splt;
4217
4218 if (hash == NULL || hash->is_iplt)
4219 splt = globals->root.iplt;
4220 else
4221 splt = globals->root.splt;
4222 if (splt != NULL)
4223 {
4224 use_plt = 1;
4225
4226 /* Note when dealing with PLT entries: the main PLT stub is in
4227 ARM mode, so if the branch is in Thumb mode, another
4228 Thumb->ARM stub will be inserted later just before the ARM
4229 PLT stub. If a long branch stub is needed, we'll add a
4230 Thumb->Arm one and branch directly to the ARM PLT entry.
4231 Here, we have to check if a pre-PLT Thumb->ARM stub
4232 is needed and if it will be close enough. */
4233
4234 destination = (splt->output_section->vma
4235 + splt->output_offset
4236 + root_plt->offset);
4237 st_type = STT_FUNC;
4238
4239 /* Thumb branch/call to PLT: it can become a branch to ARM
4240 or to Thumb. We must perform the same checks and
4241 corrections as in elf32_arm_final_link_relocate. */
4242 if ((r_type == R_ARM_THM_CALL)
4243 || (r_type == R_ARM_THM_JUMP24))
4244 {
4245 if (globals->use_blx
4246 && r_type == R_ARM_THM_CALL
4247 && !thumb_only)
4248 {
4249 /* If the Thumb BLX instruction is available, convert
4250 the BL to a BLX instruction to call the ARM-mode
4251 PLT entry. */
4252 branch_type = ST_BRANCH_TO_ARM;
4253 }
4254 else
4255 {
4256 if (!thumb_only)
4257 /* Target the Thumb stub before the ARM PLT entry. */
4258 destination -= PLT_THUMB_STUB_SIZE;
4259 branch_type = ST_BRANCH_TO_THUMB;
4260 }
4261 }
4262 else
4263 {
4264 branch_type = ST_BRANCH_TO_ARM;
4265 }
4266 }
4267 }
4268 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
4269 BFD_ASSERT (st_type != STT_GNU_IFUNC);
4270
4271 branch_offset = (bfd_signed_vma)(destination - location);
4272
4273 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
4274 || r_type == R_ARM_THM_TLS_CALL || r_type == R_ARM_THM_JUMP19)
4275 {
4276 /* Handle cases where:
4277 - this call goes too far (different Thumb/Thumb2 max
4278 distance)
4279 - it's a Thumb->Arm call and blx is not available, or it's a
4280 Thumb->Arm branch (not bl). A stub is needed in this case,
4281 but only if this call is not through a PLT entry. Indeed,
4282 PLT stubs handle mode switching already. */
4283 if ((!thumb2_bl
4284 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
4285 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
4286 || (thumb2_bl
4287 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
4288 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
4289 || (thumb2
4290 && (branch_offset > THM2_MAX_FWD_COND_BRANCH_OFFSET
4291 || (branch_offset < THM2_MAX_BWD_COND_BRANCH_OFFSET))
4292 && (r_type == R_ARM_THM_JUMP19))
4293 || (branch_type == ST_BRANCH_TO_ARM
4294 && (((r_type == R_ARM_THM_CALL
4295 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
4296 || (r_type == R_ARM_THM_JUMP24)
4297 || (r_type == R_ARM_THM_JUMP19))
4298 && !use_plt))
4299 {
4300 /* If we need to insert a Thumb-Thumb long branch stub to a
4301 PLT, use one that branches directly to the ARM PLT
4302 stub. If we pretended we'd use the pre-PLT Thumb->ARM
4303 stub, undo this now. */
4304 if ((branch_type == ST_BRANCH_TO_THUMB) && use_plt && !thumb_only)
4305 {
4306 branch_type = ST_BRANCH_TO_ARM;
4307 branch_offset += PLT_THUMB_STUB_SIZE;
4308 }
4309
4310 if (branch_type == ST_BRANCH_TO_THUMB)
4311 {
4312 /* Thumb to thumb. */
4313 if (!thumb_only)
4314 {
4315 if (input_sec->flags & SEC_ELF_PURECODE)
4316 _bfd_error_handler
4317 (_("%pB(%pA): warning: long branch veneers used in"
4318 " section with SHF_ARM_PURECODE section"
4319 " attribute is only supported for M-profile"
4320 " targets that implement the movw instruction"),
4321 input_bfd, input_sec);
4322
4323 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4324 /* PIC stubs. */
4325 ? ((globals->use_blx
4326 && (r_type == R_ARM_THM_CALL))
4327 /* V5T and above. Stub starts with ARM code, so
4328 we must be able to switch mode before
4329 reaching it, which is only possible for 'bl'
4330 (ie R_ARM_THM_CALL relocation). */
4331 ? arm_stub_long_branch_any_thumb_pic
4332 /* On V4T, use Thumb code only. */
4333 : arm_stub_long_branch_v4t_thumb_thumb_pic)
4334
4335 /* non-PIC stubs. */
4336 : ((globals->use_blx
4337 && (r_type == R_ARM_THM_CALL))
4338 /* V5T and above. */
4339 ? arm_stub_long_branch_any_any
4340 /* V4T. */
4341 : arm_stub_long_branch_v4t_thumb_thumb);
4342 }
4343 else
4344 {
4345 if (thumb2_movw && (input_sec->flags & SEC_ELF_PURECODE))
4346 stub_type = arm_stub_long_branch_thumb2_only_pure;
4347 else
4348 {
4349 if (input_sec->flags & SEC_ELF_PURECODE)
4350 _bfd_error_handler
4351 (_("%pB(%pA): warning: long branch veneers used in"
4352 " section with SHF_ARM_PURECODE section"
4353 " attribute is only supported for M-profile"
4354 " targets that implement the movw instruction"),
4355 input_bfd, input_sec);
4356
4357 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4358 /* PIC stub. */
4359 ? arm_stub_long_branch_thumb_only_pic
4360 /* non-PIC stub. */
4361 : (thumb2 ? arm_stub_long_branch_thumb2_only
4362 : arm_stub_long_branch_thumb_only);
4363 }
4364 }
4365 }
4366 else
4367 {
4368 if (input_sec->flags & SEC_ELF_PURECODE)
4369 _bfd_error_handler
4370 (_("%pB(%pA): warning: long branch veneers used in"
4371 " section with SHF_ARM_PURECODE section"
4372 " attribute is only supported" " for M-profile"
4373 " targets that implement the movw instruction"),
4374 input_bfd, input_sec);
4375
4376 /* Thumb to arm. */
4377 if (sym_sec != NULL
4378 && sym_sec->owner != NULL
4379 && !INTERWORK_FLAG (sym_sec->owner))
4380 {
4381 _bfd_error_handler
4382 (_("%pB(%s): warning: interworking not enabled;"
4383 " first occurrence: %pB: %s call to %s"),
4384 sym_sec->owner, name, input_bfd, "Thumb", "ARM");
4385 }
4386
4387 stub_type =
4388 (bfd_link_pic (info) | globals->pic_veneer)
4389 /* PIC stubs. */
4390 ? (r_type == R_ARM_THM_TLS_CALL
4391 /* TLS PIC stubs. */
4392 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
4393 : arm_stub_long_branch_v4t_thumb_tls_pic)
4394 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4395 /* V5T PIC and above. */
4396 ? arm_stub_long_branch_any_arm_pic
4397 /* V4T PIC stub. */
4398 : arm_stub_long_branch_v4t_thumb_arm_pic))
4399
4400 /* non-PIC stubs. */
4401 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4402 /* V5T and above. */
4403 ? arm_stub_long_branch_any_any
4404 /* V4T. */
4405 : arm_stub_long_branch_v4t_thumb_arm);
4406
4407 /* Handle v4t short branches. */
4408 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
4409 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
4410 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
4411 stub_type = arm_stub_short_branch_v4t_thumb_arm;
4412 }
4413 }
4414 }
4415 else if (r_type == R_ARM_CALL
4416 || r_type == R_ARM_JUMP24
4417 || r_type == R_ARM_PLT32
4418 || r_type == R_ARM_TLS_CALL)
4419 {
4420 if (input_sec->flags & SEC_ELF_PURECODE)
4421 _bfd_error_handler
4422 (_("%pB(%pA): warning: long branch veneers used in"
4423 " section with SHF_ARM_PURECODE section"
4424 " attribute is only supported for M-profile"
4425 " targets that implement the movw instruction"),
4426 input_bfd, input_sec);
4427 if (branch_type == ST_BRANCH_TO_THUMB)
4428 {
4429 /* Arm to thumb. */
4430
4431 if (sym_sec != NULL
4432 && sym_sec->owner != NULL
4433 && !INTERWORK_FLAG (sym_sec->owner))
4434 {
4435 _bfd_error_handler
4436 (_("%pB(%s): warning: interworking not enabled;"
4437 " first occurrence: %pB: %s call to %s"),
4438 sym_sec->owner, name, input_bfd, "ARM", "Thumb");
4439 }
4440
4441 /* We have an extra 2-bytes reach because of
4442 the mode change (bit 24 (H) of BLX encoding). */
4443 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
4444 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
4445 || (r_type == R_ARM_CALL && !globals->use_blx)
4446 || (r_type == R_ARM_JUMP24)
4447 || (r_type == R_ARM_PLT32))
4448 {
4449 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4450 /* PIC stubs. */
4451 ? ((globals->use_blx)
4452 /* V5T and above. */
4453 ? arm_stub_long_branch_any_thumb_pic
4454 /* V4T stub. */
4455 : arm_stub_long_branch_v4t_arm_thumb_pic)
4456
4457 /* non-PIC stubs. */
4458 : ((globals->use_blx)
4459 /* V5T and above. */
4460 ? arm_stub_long_branch_any_any
4461 /* V4T. */
4462 : arm_stub_long_branch_v4t_arm_thumb);
4463 }
4464 }
4465 else
4466 {
4467 /* Arm to arm. */
4468 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
4469 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
4470 {
4471 stub_type =
4472 (bfd_link_pic (info) | globals->pic_veneer)
4473 /* PIC stubs. */
4474 ? (r_type == R_ARM_TLS_CALL
4475 /* TLS PIC Stub. */
4476 ? arm_stub_long_branch_any_tls_pic
4477 : (globals->root.target_os == is_nacl
4478 ? arm_stub_long_branch_arm_nacl_pic
4479 : arm_stub_long_branch_any_arm_pic))
4480 /* non-PIC stubs. */
4481 : (globals->root.target_os == is_nacl
4482 ? arm_stub_long_branch_arm_nacl
4483 : arm_stub_long_branch_any_any);
4484 }
4485 }
4486 }
4487
4488 /* If a stub is needed, record the actual destination type. */
4489 if (stub_type != arm_stub_none)
4490 *actual_branch_type = branch_type;
4491
4492 return stub_type;
4493 }
4494
4495 /* Build a name for an entry in the stub hash table. */
4496
4497 static char *
4498 elf32_arm_stub_name (const asection *input_section,
4499 const asection *sym_sec,
4500 const struct elf32_arm_link_hash_entry *hash,
4501 const Elf_Internal_Rela *rel,
4502 enum elf32_arm_stub_type stub_type)
4503 {
4504 char *stub_name;
4505 bfd_size_type len;
4506
4507 if (hash)
4508 {
4509 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
4510 stub_name = (char *) bfd_malloc (len);
4511 if (stub_name != NULL)
4512 sprintf (stub_name, "%08x_%s+%x_%d",
4513 input_section->id & 0xffffffff,
4514 hash->root.root.root.string,
4515 (int) rel->r_addend & 0xffffffff,
4516 (int) stub_type);
4517 }
4518 else
4519 {
4520 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
4521 stub_name = (char *) bfd_malloc (len);
4522 if (stub_name != NULL)
4523 sprintf (stub_name, "%08x_%x:%x+%x_%d",
4524 input_section->id & 0xffffffff,
4525 sym_sec->id & 0xffffffff,
4526 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
4527 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
4528 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
4529 (int) rel->r_addend & 0xffffffff,
4530 (int) stub_type);
4531 }
4532
4533 return stub_name;
4534 }
4535
4536 /* Look up an entry in the stub hash. Stub entries are cached because
4537 creating the stub name takes a bit of time. */
4538
4539 static struct elf32_arm_stub_hash_entry *
4540 elf32_arm_get_stub_entry (const asection *input_section,
4541 const asection *sym_sec,
4542 struct elf_link_hash_entry *hash,
4543 const Elf_Internal_Rela *rel,
4544 struct elf32_arm_link_hash_table *htab,
4545 enum elf32_arm_stub_type stub_type)
4546 {
4547 struct elf32_arm_stub_hash_entry *stub_entry;
4548 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
4549 const asection *id_sec;
4550
4551 if ((input_section->flags & SEC_CODE) == 0)
4552 return NULL;
4553
4554 /* If the input section is the CMSE stubs one and it needs a long
4555 branch stub to reach it's final destination, give up with an
4556 error message: this is not supported. See PR ld/24709. */
4557 if (!strncmp (input_section->name, CMSE_STUB_NAME, strlen(CMSE_STUB_NAME)))
4558 {
4559 bfd *output_bfd = htab->obfd;
4560 asection *out_sec = bfd_get_section_by_name (output_bfd, CMSE_STUB_NAME);
4561
4562 _bfd_error_handler (_("ERROR: CMSE stub (%s section) too far "
4563 "(%#" PRIx64 ") from destination (%#" PRIx64 ")"),
4564 CMSE_STUB_NAME,
4565 (uint64_t)out_sec->output_section->vma
4566 + out_sec->output_offset,
4567 (uint64_t)sym_sec->output_section->vma
4568 + sym_sec->output_offset
4569 + h->root.root.u.def.value);
4570 /* Exit, rather than leave incompletely processed
4571 relocations. */
4572 xexit(1);
4573 }
4574
4575 /* If this input section is part of a group of sections sharing one
4576 stub section, then use the id of the first section in the group.
4577 Stub names need to include a section id, as there may well be
4578 more than one stub used to reach say, printf, and we need to
4579 distinguish between them. */
4580 BFD_ASSERT (input_section->id <= htab->top_id);
4581 id_sec = htab->stub_group[input_section->id].link_sec;
4582
4583 if (h != NULL && h->stub_cache != NULL
4584 && h->stub_cache->h == h
4585 && h->stub_cache->id_sec == id_sec
4586 && h->stub_cache->stub_type == stub_type)
4587 {
4588 stub_entry = h->stub_cache;
4589 }
4590 else
4591 {
4592 char *stub_name;
4593
4594 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
4595 if (stub_name == NULL)
4596 return NULL;
4597
4598 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
4599 stub_name, FALSE, FALSE);
4600 if (h != NULL)
4601 h->stub_cache = stub_entry;
4602
4603 free (stub_name);
4604 }
4605
4606 return stub_entry;
4607 }
4608
4609 /* Whether veneers of type STUB_TYPE require to be in a dedicated output
4610 section. */
4611
4612 static bfd_boolean
4613 arm_dedicated_stub_output_section_required (enum elf32_arm_stub_type stub_type)
4614 {
4615 if (stub_type >= max_stub_type)
4616 abort (); /* Should be unreachable. */
4617
4618 switch (stub_type)
4619 {
4620 case arm_stub_cmse_branch_thumb_only:
4621 return TRUE;
4622
4623 default:
4624 return FALSE;
4625 }
4626
4627 abort (); /* Should be unreachable. */
4628 }
4629
4630 /* Required alignment (as a power of 2) for the dedicated section holding
4631 veneers of type STUB_TYPE, or 0 if veneers of this type are interspersed
4632 with input sections. */
4633
4634 static int
4635 arm_dedicated_stub_output_section_required_alignment
4636 (enum elf32_arm_stub_type stub_type)
4637 {
4638 if (stub_type >= max_stub_type)
4639 abort (); /* Should be unreachable. */
4640
4641 switch (stub_type)
4642 {
4643 /* Vectors of Secure Gateway veneers must be aligned on 32byte
4644 boundary. */
4645 case arm_stub_cmse_branch_thumb_only:
4646 return 5;
4647
4648 default:
4649 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4650 return 0;
4651 }
4652
4653 abort (); /* Should be unreachable. */
4654 }
4655
4656 /* Name of the dedicated output section to put veneers of type STUB_TYPE, or
4657 NULL if veneers of this type are interspersed with input sections. */
4658
4659 static const char *
4660 arm_dedicated_stub_output_section_name (enum elf32_arm_stub_type stub_type)
4661 {
4662 if (stub_type >= max_stub_type)
4663 abort (); /* Should be unreachable. */
4664
4665 switch (stub_type)
4666 {
4667 case arm_stub_cmse_branch_thumb_only:
4668 return CMSE_STUB_NAME;
4669
4670 default:
4671 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4672 return NULL;
4673 }
4674
4675 abort (); /* Should be unreachable. */
4676 }
4677
4678 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4679 returns the address of the hash table field in HTAB holding a pointer to the
4680 corresponding input section. Otherwise, returns NULL. */
4681
4682 static asection **
4683 arm_dedicated_stub_input_section_ptr (struct elf32_arm_link_hash_table *htab,
4684 enum elf32_arm_stub_type stub_type)
4685 {
4686 if (stub_type >= max_stub_type)
4687 abort (); /* Should be unreachable. */
4688
4689 switch (stub_type)
4690 {
4691 case arm_stub_cmse_branch_thumb_only:
4692 return &htab->cmse_stub_sec;
4693
4694 default:
4695 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4696 return NULL;
4697 }
4698
4699 abort (); /* Should be unreachable. */
4700 }
4701
4702 /* Find or create a stub section to contain a stub of type STUB_TYPE. SECTION
4703 is the section that branch into veneer and can be NULL if stub should go in
4704 a dedicated output section. Returns a pointer to the stub section, and the
4705 section to which the stub section will be attached (in *LINK_SEC_P).
4706 LINK_SEC_P may be NULL. */
4707
4708 static asection *
4709 elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
4710 struct elf32_arm_link_hash_table *htab,
4711 enum elf32_arm_stub_type stub_type)
4712 {
4713 asection *link_sec, *out_sec, **stub_sec_p;
4714 const char *stub_sec_prefix;
4715 bfd_boolean dedicated_output_section =
4716 arm_dedicated_stub_output_section_required (stub_type);
4717 int align;
4718
4719 if (dedicated_output_section)
4720 {
4721 bfd *output_bfd = htab->obfd;
4722 const char *out_sec_name =
4723 arm_dedicated_stub_output_section_name (stub_type);
4724 link_sec = NULL;
4725 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
4726 stub_sec_prefix = out_sec_name;
4727 align = arm_dedicated_stub_output_section_required_alignment (stub_type);
4728 out_sec = bfd_get_section_by_name (output_bfd, out_sec_name);
4729 if (out_sec == NULL)
4730 {
4731 _bfd_error_handler (_("no address assigned to the veneers output "
4732 "section %s"), out_sec_name);
4733 return NULL;
4734 }
4735 }
4736 else
4737 {
4738 BFD_ASSERT (section->id <= htab->top_id);
4739 link_sec = htab->stub_group[section->id].link_sec;
4740 BFD_ASSERT (link_sec != NULL);
4741 stub_sec_p = &htab->stub_group[section->id].stub_sec;
4742 if (*stub_sec_p == NULL)
4743 stub_sec_p = &htab->stub_group[link_sec->id].stub_sec;
4744 stub_sec_prefix = link_sec->name;
4745 out_sec = link_sec->output_section;
4746 align = htab->root.target_os == is_nacl ? 4 : 3;
4747 }
4748
4749 if (*stub_sec_p == NULL)
4750 {
4751 size_t namelen;
4752 bfd_size_type len;
4753 char *s_name;
4754
4755 namelen = strlen (stub_sec_prefix);
4756 len = namelen + sizeof (STUB_SUFFIX);
4757 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
4758 if (s_name == NULL)
4759 return NULL;
4760
4761 memcpy (s_name, stub_sec_prefix, namelen);
4762 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
4763 *stub_sec_p = (*htab->add_stub_section) (s_name, out_sec, link_sec,
4764 align);
4765 if (*stub_sec_p == NULL)
4766 return NULL;
4767
4768 out_sec->flags |= SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE
4769 | SEC_HAS_CONTENTS | SEC_RELOC | SEC_IN_MEMORY
4770 | SEC_KEEP;
4771 }
4772
4773 if (!dedicated_output_section)
4774 htab->stub_group[section->id].stub_sec = *stub_sec_p;
4775
4776 if (link_sec_p)
4777 *link_sec_p = link_sec;
4778
4779 return *stub_sec_p;
4780 }
4781
4782 /* Add a new stub entry to the stub hash. Not all fields of the new
4783 stub entry are initialised. */
4784
4785 static struct elf32_arm_stub_hash_entry *
4786 elf32_arm_add_stub (const char *stub_name, asection *section,
4787 struct elf32_arm_link_hash_table *htab,
4788 enum elf32_arm_stub_type stub_type)
4789 {
4790 asection *link_sec;
4791 asection *stub_sec;
4792 struct elf32_arm_stub_hash_entry *stub_entry;
4793
4794 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab,
4795 stub_type);
4796 if (stub_sec == NULL)
4797 return NULL;
4798
4799 /* Enter this entry into the linker stub hash table. */
4800 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4801 TRUE, FALSE);
4802 if (stub_entry == NULL)
4803 {
4804 if (section == NULL)
4805 section = stub_sec;
4806 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
4807 section->owner, stub_name);
4808 return NULL;
4809 }
4810
4811 stub_entry->stub_sec = stub_sec;
4812 stub_entry->stub_offset = (bfd_vma) -1;
4813 stub_entry->id_sec = link_sec;
4814
4815 return stub_entry;
4816 }
4817
4818 /* Store an Arm insn into an output section not processed by
4819 elf32_arm_write_section. */
4820
4821 static void
4822 put_arm_insn (struct elf32_arm_link_hash_table * htab,
4823 bfd * output_bfd, bfd_vma val, void * ptr)
4824 {
4825 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4826 bfd_putl32 (val, ptr);
4827 else
4828 bfd_putb32 (val, ptr);
4829 }
4830
4831 /* Store a 16-bit Thumb insn into an output section not processed by
4832 elf32_arm_write_section. */
4833
4834 static void
4835 put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4836 bfd * output_bfd, bfd_vma val, void * ptr)
4837 {
4838 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4839 bfd_putl16 (val, ptr);
4840 else
4841 bfd_putb16 (val, ptr);
4842 }
4843
4844 /* Store a Thumb2 insn into an output section not processed by
4845 elf32_arm_write_section. */
4846
4847 static void
4848 put_thumb2_insn (struct elf32_arm_link_hash_table * htab,
4849 bfd * output_bfd, bfd_vma val, bfd_byte * ptr)
4850 {
4851 /* T2 instructions are 16-bit streamed. */
4852 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4853 {
4854 bfd_putl16 ((val >> 16) & 0xffff, ptr);
4855 bfd_putl16 ((val & 0xffff), ptr + 2);
4856 }
4857 else
4858 {
4859 bfd_putb16 ((val >> 16) & 0xffff, ptr);
4860 bfd_putb16 ((val & 0xffff), ptr + 2);
4861 }
4862 }
4863
4864 /* If it's possible to change R_TYPE to a more efficient access
4865 model, return the new reloc type. */
4866
4867 static unsigned
4868 elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
4869 struct elf_link_hash_entry *h)
4870 {
4871 int is_local = (h == NULL);
4872
4873 if (bfd_link_dll (info)
4874 || (h && h->root.type == bfd_link_hash_undefweak))
4875 return r_type;
4876
4877 /* We do not support relaxations for Old TLS models. */
4878 switch (r_type)
4879 {
4880 case R_ARM_TLS_GOTDESC:
4881 case R_ARM_TLS_CALL:
4882 case R_ARM_THM_TLS_CALL:
4883 case R_ARM_TLS_DESCSEQ:
4884 case R_ARM_THM_TLS_DESCSEQ:
4885 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4886 }
4887
4888 return r_type;
4889 }
4890
4891 static bfd_reloc_status_type elf32_arm_final_link_relocate
4892 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4893 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
4894 const char *, unsigned char, enum arm_st_branch_type,
4895 struct elf_link_hash_entry *, bfd_boolean *, char **);
4896
4897 static unsigned int
4898 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4899 {
4900 switch (stub_type)
4901 {
4902 case arm_stub_a8_veneer_b_cond:
4903 case arm_stub_a8_veneer_b:
4904 case arm_stub_a8_veneer_bl:
4905 return 2;
4906
4907 case arm_stub_long_branch_any_any:
4908 case arm_stub_long_branch_v4t_arm_thumb:
4909 case arm_stub_long_branch_thumb_only:
4910 case arm_stub_long_branch_thumb2_only:
4911 case arm_stub_long_branch_thumb2_only_pure:
4912 case arm_stub_long_branch_v4t_thumb_thumb:
4913 case arm_stub_long_branch_v4t_thumb_arm:
4914 case arm_stub_short_branch_v4t_thumb_arm:
4915 case arm_stub_long_branch_any_arm_pic:
4916 case arm_stub_long_branch_any_thumb_pic:
4917 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4918 case arm_stub_long_branch_v4t_arm_thumb_pic:
4919 case arm_stub_long_branch_v4t_thumb_arm_pic:
4920 case arm_stub_long_branch_thumb_only_pic:
4921 case arm_stub_long_branch_any_tls_pic:
4922 case arm_stub_long_branch_v4t_thumb_tls_pic:
4923 case arm_stub_cmse_branch_thumb_only:
4924 case arm_stub_a8_veneer_blx:
4925 return 4;
4926
4927 case arm_stub_long_branch_arm_nacl:
4928 case arm_stub_long_branch_arm_nacl_pic:
4929 return 16;
4930
4931 default:
4932 abort (); /* Should be unreachable. */
4933 }
4934 }
4935
4936 /* Returns whether stubs of type STUB_TYPE take over the symbol they are
4937 veneering (TRUE) or have their own symbol (FALSE). */
4938
4939 static bfd_boolean
4940 arm_stub_sym_claimed (enum elf32_arm_stub_type stub_type)
4941 {
4942 if (stub_type >= max_stub_type)
4943 abort (); /* Should be unreachable. */
4944
4945 switch (stub_type)
4946 {
4947 case arm_stub_cmse_branch_thumb_only:
4948 return TRUE;
4949
4950 default:
4951 return FALSE;
4952 }
4953
4954 abort (); /* Should be unreachable. */
4955 }
4956
4957 /* Returns the padding needed for the dedicated section used stubs of type
4958 STUB_TYPE. */
4959
4960 static int
4961 arm_dedicated_stub_section_padding (enum elf32_arm_stub_type stub_type)
4962 {
4963 if (stub_type >= max_stub_type)
4964 abort (); /* Should be unreachable. */
4965
4966 switch (stub_type)
4967 {
4968 case arm_stub_cmse_branch_thumb_only:
4969 return 32;
4970
4971 default:
4972 return 0;
4973 }
4974
4975 abort (); /* Should be unreachable. */
4976 }
4977
4978 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4979 returns the address of the hash table field in HTAB holding the offset at
4980 which new veneers should be layed out in the stub section. */
4981
4982 static bfd_vma*
4983 arm_new_stubs_start_offset_ptr (struct elf32_arm_link_hash_table *htab,
4984 enum elf32_arm_stub_type stub_type)
4985 {
4986 switch (stub_type)
4987 {
4988 case arm_stub_cmse_branch_thumb_only:
4989 return &htab->new_cmse_stub_offset;
4990
4991 default:
4992 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4993 return NULL;
4994 }
4995 }
4996
4997 static bfd_boolean
4998 arm_build_one_stub (struct bfd_hash_entry *gen_entry,
4999 void * in_arg)
5000 {
5001 #define MAXRELOCS 3
5002 bfd_boolean removed_sg_veneer;
5003 struct elf32_arm_stub_hash_entry *stub_entry;
5004 struct elf32_arm_link_hash_table *globals;
5005 struct bfd_link_info *info;
5006 asection *stub_sec;
5007 bfd *stub_bfd;
5008 bfd_byte *loc;
5009 bfd_vma sym_value;
5010 int template_size;
5011 int size;
5012 const insn_sequence *template_sequence;
5013 int i;
5014 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
5015 int stub_reloc_offset[MAXRELOCS] = {0, 0};
5016 int nrelocs = 0;
5017 int just_allocated = 0;
5018
5019 /* Massage our args to the form they really have. */
5020 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
5021 info = (struct bfd_link_info *) in_arg;
5022
5023 /* Fail if the target section could not be assigned to an output
5024 section. The user should fix his linker script. */
5025 if (stub_entry->target_section->output_section == NULL
5026 && info->non_contiguous_regions)
5027 info->callbacks->einfo (_("%F%P: Could not assign '%pA' to an output section. "
5028 "Retry without --enable-non-contiguous-regions.\n"),
5029 stub_entry->target_section);
5030
5031 globals = elf32_arm_hash_table (info);
5032 if (globals == NULL)
5033 return FALSE;
5034
5035 stub_sec = stub_entry->stub_sec;
5036
5037 if ((globals->fix_cortex_a8 < 0)
5038 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
5039 /* We have to do less-strictly-aligned fixes last. */
5040 return TRUE;
5041
5042 /* Assign a slot at the end of section if none assigned yet. */
5043 if (stub_entry->stub_offset == (bfd_vma) -1)
5044 {
5045 stub_entry->stub_offset = stub_sec->size;
5046 just_allocated = 1;
5047 }
5048 loc = stub_sec->contents + stub_entry->stub_offset;
5049
5050 stub_bfd = stub_sec->owner;
5051
5052 /* This is the address of the stub destination. */
5053 sym_value = (stub_entry->target_value
5054 + stub_entry->target_section->output_offset
5055 + stub_entry->target_section->output_section->vma);
5056
5057 template_sequence = stub_entry->stub_template;
5058 template_size = stub_entry->stub_template_size;
5059
5060 size = 0;
5061 for (i = 0; i < template_size; i++)
5062 {
5063 switch (template_sequence[i].type)
5064 {
5065 case THUMB16_TYPE:
5066 {
5067 bfd_vma data = (bfd_vma) template_sequence[i].data;
5068 if (template_sequence[i].reloc_addend != 0)
5069 {
5070 /* We've borrowed the reloc_addend field to mean we should
5071 insert a condition code into this (Thumb-1 branch)
5072 instruction. See THUMB16_BCOND_INSN. */
5073 BFD_ASSERT ((data & 0xff00) == 0xd000);
5074 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
5075 }
5076 bfd_put_16 (stub_bfd, data, loc + size);
5077 size += 2;
5078 }
5079 break;
5080
5081 case THUMB32_TYPE:
5082 bfd_put_16 (stub_bfd,
5083 (template_sequence[i].data >> 16) & 0xffff,
5084 loc + size);
5085 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
5086 loc + size + 2);
5087 if (template_sequence[i].r_type != R_ARM_NONE)
5088 {
5089 stub_reloc_idx[nrelocs] = i;
5090 stub_reloc_offset[nrelocs++] = size;
5091 }
5092 size += 4;
5093 break;
5094
5095 case ARM_TYPE:
5096 bfd_put_32 (stub_bfd, template_sequence[i].data,
5097 loc + size);
5098 /* Handle cases where the target is encoded within the
5099 instruction. */
5100 if (template_sequence[i].r_type == R_ARM_JUMP24)
5101 {
5102 stub_reloc_idx[nrelocs] = i;
5103 stub_reloc_offset[nrelocs++] = size;
5104 }
5105 size += 4;
5106 break;
5107
5108 case DATA_TYPE:
5109 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
5110 stub_reloc_idx[nrelocs] = i;
5111 stub_reloc_offset[nrelocs++] = size;
5112 size += 4;
5113 break;
5114
5115 default:
5116 BFD_FAIL ();
5117 return FALSE;
5118 }
5119 }
5120
5121 if (just_allocated)
5122 stub_sec->size += size;
5123
5124 /* Stub size has already been computed in arm_size_one_stub. Check
5125 consistency. */
5126 BFD_ASSERT (size == stub_entry->stub_size);
5127
5128 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
5129 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
5130 sym_value |= 1;
5131
5132 /* Assume non empty slots have at least one and at most MAXRELOCS entries
5133 to relocate in each stub. */
5134 removed_sg_veneer =
5135 (size == 0 && stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
5136 BFD_ASSERT (removed_sg_veneer || (nrelocs != 0 && nrelocs <= MAXRELOCS));
5137
5138 for (i = 0; i < nrelocs; i++)
5139 {
5140 Elf_Internal_Rela rel;
5141 bfd_boolean unresolved_reloc;
5142 char *error_message;
5143 bfd_vma points_to =
5144 sym_value + template_sequence[stub_reloc_idx[i]].reloc_addend;
5145
5146 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
5147 rel.r_info = ELF32_R_INFO (0,
5148 template_sequence[stub_reloc_idx[i]].r_type);
5149 rel.r_addend = 0;
5150
5151 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
5152 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
5153 template should refer back to the instruction after the original
5154 branch. We use target_section as Cortex-A8 erratum workaround stubs
5155 are only generated when both source and target are in the same
5156 section. */
5157 points_to = stub_entry->target_section->output_section->vma
5158 + stub_entry->target_section->output_offset
5159 + stub_entry->source_value;
5160
5161 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
5162 (template_sequence[stub_reloc_idx[i]].r_type),
5163 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
5164 points_to, info, stub_entry->target_section, "", STT_FUNC,
5165 stub_entry->branch_type,
5166 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
5167 &error_message);
5168 }
5169
5170 return TRUE;
5171 #undef MAXRELOCS
5172 }
5173
5174 /* Calculate the template, template size and instruction size for a stub.
5175 Return value is the instruction size. */
5176
5177 static unsigned int
5178 find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
5179 const insn_sequence **stub_template,
5180 int *stub_template_size)
5181 {
5182 const insn_sequence *template_sequence = NULL;
5183 int template_size = 0, i;
5184 unsigned int size;
5185
5186 template_sequence = stub_definitions[stub_type].template_sequence;
5187 if (stub_template)
5188 *stub_template = template_sequence;
5189
5190 template_size = stub_definitions[stub_type].template_size;
5191 if (stub_template_size)
5192 *stub_template_size = template_size;
5193
5194 size = 0;
5195 for (i = 0; i < template_size; i++)
5196 {
5197 switch (template_sequence[i].type)
5198 {
5199 case THUMB16_TYPE:
5200 size += 2;
5201 break;
5202
5203 case ARM_TYPE:
5204 case THUMB32_TYPE:
5205 case DATA_TYPE:
5206 size += 4;
5207 break;
5208
5209 default:
5210 BFD_FAIL ();
5211 return 0;
5212 }
5213 }
5214
5215 return size;
5216 }
5217
5218 /* As above, but don't actually build the stub. Just bump offset so
5219 we know stub section sizes. */
5220
5221 static bfd_boolean
5222 arm_size_one_stub (struct bfd_hash_entry *gen_entry,
5223 void *in_arg ATTRIBUTE_UNUSED)
5224 {
5225 struct elf32_arm_stub_hash_entry *stub_entry;
5226 const insn_sequence *template_sequence;
5227 int template_size, size;
5228
5229 /* Massage our args to the form they really have. */
5230 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
5231
5232 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
5233 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
5234
5235 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
5236 &template_size);
5237
5238 /* Initialized to -1. Null size indicates an empty slot full of zeros. */
5239 if (stub_entry->stub_template_size)
5240 {
5241 stub_entry->stub_size = size;
5242 stub_entry->stub_template = template_sequence;
5243 stub_entry->stub_template_size = template_size;
5244 }
5245
5246 /* Already accounted for. */
5247 if (stub_entry->stub_offset != (bfd_vma) -1)
5248 return TRUE;
5249
5250 size = (size + 7) & ~7;
5251 stub_entry->stub_sec->size += size;
5252
5253 return TRUE;
5254 }
5255
5256 /* External entry points for sizing and building linker stubs. */
5257
5258 /* Set up various things so that we can make a list of input sections
5259 for each output section included in the link. Returns -1 on error,
5260 0 when no stubs will be needed, and 1 on success. */
5261
5262 int
5263 elf32_arm_setup_section_lists (bfd *output_bfd,
5264 struct bfd_link_info *info)
5265 {
5266 bfd *input_bfd;
5267 unsigned int bfd_count;
5268 unsigned int top_id, top_index;
5269 asection *section;
5270 asection **input_list, **list;
5271 size_t amt;
5272 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5273
5274 if (htab == NULL)
5275 return 0;
5276 if (! is_elf_hash_table (htab))
5277 return 0;
5278
5279 /* Count the number of input BFDs and find the top input section id. */
5280 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
5281 input_bfd != NULL;
5282 input_bfd = input_bfd->link.next)
5283 {
5284 bfd_count += 1;
5285 for (section = input_bfd->sections;
5286 section != NULL;
5287 section = section->next)
5288 {
5289 if (top_id < section->id)
5290 top_id = section->id;
5291 }
5292 }
5293 htab->bfd_count = bfd_count;
5294
5295 amt = sizeof (struct map_stub) * (top_id + 1);
5296 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
5297 if (htab->stub_group == NULL)
5298 return -1;
5299 htab->top_id = top_id;
5300
5301 /* We can't use output_bfd->section_count here to find the top output
5302 section index as some sections may have been removed, and
5303 _bfd_strip_section_from_output doesn't renumber the indices. */
5304 for (section = output_bfd->sections, top_index = 0;
5305 section != NULL;
5306 section = section->next)
5307 {
5308 if (top_index < section->index)
5309 top_index = section->index;
5310 }
5311
5312 htab->top_index = top_index;
5313 amt = sizeof (asection *) * (top_index + 1);
5314 input_list = (asection **) bfd_malloc (amt);
5315 htab->input_list = input_list;
5316 if (input_list == NULL)
5317 return -1;
5318
5319 /* For sections we aren't interested in, mark their entries with a
5320 value we can check later. */
5321 list = input_list + top_index;
5322 do
5323 *list = bfd_abs_section_ptr;
5324 while (list-- != input_list);
5325
5326 for (section = output_bfd->sections;
5327 section != NULL;
5328 section = section->next)
5329 {
5330 if ((section->flags & SEC_CODE) != 0)
5331 input_list[section->index] = NULL;
5332 }
5333
5334 return 1;
5335 }
5336
5337 /* The linker repeatedly calls this function for each input section,
5338 in the order that input sections are linked into output sections.
5339 Build lists of input sections to determine groupings between which
5340 we may insert linker stubs. */
5341
5342 void
5343 elf32_arm_next_input_section (struct bfd_link_info *info,
5344 asection *isec)
5345 {
5346 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5347
5348 if (htab == NULL)
5349 return;
5350
5351 if (isec->output_section->index <= htab->top_index)
5352 {
5353 asection **list = htab->input_list + isec->output_section->index;
5354
5355 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
5356 {
5357 /* Steal the link_sec pointer for our list. */
5358 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
5359 /* This happens to make the list in reverse order,
5360 which we reverse later. */
5361 PREV_SEC (isec) = *list;
5362 *list = isec;
5363 }
5364 }
5365 }
5366
5367 /* See whether we can group stub sections together. Grouping stub
5368 sections may result in fewer stubs. More importantly, we need to
5369 put all .init* and .fini* stubs at the end of the .init or
5370 .fini output sections respectively, because glibc splits the
5371 _init and _fini functions into multiple parts. Putting a stub in
5372 the middle of a function is not a good idea. */
5373
5374 static void
5375 group_sections (struct elf32_arm_link_hash_table *htab,
5376 bfd_size_type stub_group_size,
5377 bfd_boolean stubs_always_after_branch)
5378 {
5379 asection **list = htab->input_list;
5380
5381 do
5382 {
5383 asection *tail = *list;
5384 asection *head;
5385
5386 if (tail == bfd_abs_section_ptr)
5387 continue;
5388
5389 /* Reverse the list: we must avoid placing stubs at the
5390 beginning of the section because the beginning of the text
5391 section may be required for an interrupt vector in bare metal
5392 code. */
5393 #define NEXT_SEC PREV_SEC
5394 head = NULL;
5395 while (tail != NULL)
5396 {
5397 /* Pop from tail. */
5398 asection *item = tail;
5399 tail = PREV_SEC (item);
5400
5401 /* Push on head. */
5402 NEXT_SEC (item) = head;
5403 head = item;
5404 }
5405
5406 while (head != NULL)
5407 {
5408 asection *curr;
5409 asection *next;
5410 bfd_vma stub_group_start = head->output_offset;
5411 bfd_vma end_of_next;
5412
5413 curr = head;
5414 while (NEXT_SEC (curr) != NULL)
5415 {
5416 next = NEXT_SEC (curr);
5417 end_of_next = next->output_offset + next->size;
5418 if (end_of_next - stub_group_start >= stub_group_size)
5419 /* End of NEXT is too far from start, so stop. */
5420 break;
5421 /* Add NEXT to the group. */
5422 curr = next;
5423 }
5424
5425 /* OK, the size from the start to the start of CURR is less
5426 than stub_group_size and thus can be handled by one stub
5427 section. (Or the head section is itself larger than
5428 stub_group_size, in which case we may be toast.)
5429 We should really be keeping track of the total size of
5430 stubs added here, as stubs contribute to the final output
5431 section size. */
5432 do
5433 {
5434 next = NEXT_SEC (head);
5435 /* Set up this stub group. */
5436 htab->stub_group[head->id].link_sec = curr;
5437 }
5438 while (head != curr && (head = next) != NULL);
5439
5440 /* But wait, there's more! Input sections up to stub_group_size
5441 bytes after the stub section can be handled by it too. */
5442 if (!stubs_always_after_branch)
5443 {
5444 stub_group_start = curr->output_offset + curr->size;
5445
5446 while (next != NULL)
5447 {
5448 end_of_next = next->output_offset + next->size;
5449 if (end_of_next - stub_group_start >= stub_group_size)
5450 /* End of NEXT is too far from stubs, so stop. */
5451 break;
5452 /* Add NEXT to the stub group. */
5453 head = next;
5454 next = NEXT_SEC (head);
5455 htab->stub_group[head->id].link_sec = curr;
5456 }
5457 }
5458 head = next;
5459 }
5460 }
5461 while (list++ != htab->input_list + htab->top_index);
5462
5463 free (htab->input_list);
5464 #undef PREV_SEC
5465 #undef NEXT_SEC
5466 }
5467
5468 /* Comparison function for sorting/searching relocations relating to Cortex-A8
5469 erratum fix. */
5470
5471 static int
5472 a8_reloc_compare (const void *a, const void *b)
5473 {
5474 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
5475 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
5476
5477 if (ra->from < rb->from)
5478 return -1;
5479 else if (ra->from > rb->from)
5480 return 1;
5481 else
5482 return 0;
5483 }
5484
5485 static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
5486 const char *, char **);
5487
5488 /* Helper function to scan code for sequences which might trigger the Cortex-A8
5489 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
5490 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
5491 otherwise. */
5492
5493 static bfd_boolean
5494 cortex_a8_erratum_scan (bfd *input_bfd,
5495 struct bfd_link_info *info,
5496 struct a8_erratum_fix **a8_fixes_p,
5497 unsigned int *num_a8_fixes_p,
5498 unsigned int *a8_fix_table_size_p,
5499 struct a8_erratum_reloc *a8_relocs,
5500 unsigned int num_a8_relocs,
5501 unsigned prev_num_a8_fixes,
5502 bfd_boolean *stub_changed_p)
5503 {
5504 asection *section;
5505 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5506 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
5507 unsigned int num_a8_fixes = *num_a8_fixes_p;
5508 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
5509
5510 if (htab == NULL)
5511 return FALSE;
5512
5513 for (section = input_bfd->sections;
5514 section != NULL;
5515 section = section->next)
5516 {
5517 bfd_byte *contents = NULL;
5518 struct _arm_elf_section_data *sec_data;
5519 unsigned int span;
5520 bfd_vma base_vma;
5521
5522 if (elf_section_type (section) != SHT_PROGBITS
5523 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
5524 || (section->flags & SEC_EXCLUDE) != 0
5525 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
5526 || (section->output_section == bfd_abs_section_ptr))
5527 continue;
5528
5529 base_vma = section->output_section->vma + section->output_offset;
5530
5531 if (elf_section_data (section)->this_hdr.contents != NULL)
5532 contents = elf_section_data (section)->this_hdr.contents;
5533 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
5534 return TRUE;
5535
5536 sec_data = elf32_arm_section_data (section);
5537
5538 for (span = 0; span < sec_data->mapcount; span++)
5539 {
5540 unsigned int span_start = sec_data->map[span].vma;
5541 unsigned int span_end = (span == sec_data->mapcount - 1)
5542 ? section->size : sec_data->map[span + 1].vma;
5543 unsigned int i;
5544 char span_type = sec_data->map[span].type;
5545 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
5546
5547 if (span_type != 't')
5548 continue;
5549
5550 /* Span is entirely within a single 4KB region: skip scanning. */
5551 if (((base_vma + span_start) & ~0xfff)
5552 == ((base_vma + span_end) & ~0xfff))
5553 continue;
5554
5555 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
5556
5557 * The opcode is BLX.W, BL.W, B.W, Bcc.W
5558 * The branch target is in the same 4KB region as the
5559 first half of the branch.
5560 * The instruction before the branch is a 32-bit
5561 length non-branch instruction. */
5562 for (i = span_start; i < span_end;)
5563 {
5564 unsigned int insn = bfd_getl16 (&contents[i]);
5565 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
5566 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
5567
5568 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
5569 insn_32bit = TRUE;
5570
5571 if (insn_32bit)
5572 {
5573 /* Load the rest of the insn (in manual-friendly order). */
5574 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
5575
5576 /* Encoding T4: B<c>.W. */
5577 is_b = (insn & 0xf800d000) == 0xf0009000;
5578 /* Encoding T1: BL<c>.W. */
5579 is_bl = (insn & 0xf800d000) == 0xf000d000;
5580 /* Encoding T2: BLX<c>.W. */
5581 is_blx = (insn & 0xf800d000) == 0xf000c000;
5582 /* Encoding T3: B<c>.W (not permitted in IT block). */
5583 is_bcc = (insn & 0xf800d000) == 0xf0008000
5584 && (insn & 0x07f00000) != 0x03800000;
5585 }
5586
5587 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
5588
5589 if (((base_vma + i) & 0xfff) == 0xffe
5590 && insn_32bit
5591 && is_32bit_branch
5592 && last_was_32bit
5593 && ! last_was_branch)
5594 {
5595 bfd_signed_vma offset = 0;
5596 bfd_boolean force_target_arm = FALSE;
5597 bfd_boolean force_target_thumb = FALSE;
5598 bfd_vma target;
5599 enum elf32_arm_stub_type stub_type = arm_stub_none;
5600 struct a8_erratum_reloc key, *found;
5601 bfd_boolean use_plt = FALSE;
5602
5603 key.from = base_vma + i;
5604 found = (struct a8_erratum_reloc *)
5605 bsearch (&key, a8_relocs, num_a8_relocs,
5606 sizeof (struct a8_erratum_reloc),
5607 &a8_reloc_compare);
5608
5609 if (found)
5610 {
5611 char *error_message = NULL;
5612 struct elf_link_hash_entry *entry;
5613
5614 /* We don't care about the error returned from this
5615 function, only if there is glue or not. */
5616 entry = find_thumb_glue (info, found->sym_name,
5617 &error_message);
5618
5619 if (entry)
5620 found->non_a8_stub = TRUE;
5621
5622 /* Keep a simpler condition, for the sake of clarity. */
5623 if (htab->root.splt != NULL && found->hash != NULL
5624 && found->hash->root.plt.offset != (bfd_vma) -1)
5625 use_plt = TRUE;
5626
5627 if (found->r_type == R_ARM_THM_CALL)
5628 {
5629 if (found->branch_type == ST_BRANCH_TO_ARM
5630 || use_plt)
5631 force_target_arm = TRUE;
5632 else
5633 force_target_thumb = TRUE;
5634 }
5635 }
5636
5637 /* Check if we have an offending branch instruction. */
5638
5639 if (found && found->non_a8_stub)
5640 /* We've already made a stub for this instruction, e.g.
5641 it's a long branch or a Thumb->ARM stub. Assume that
5642 stub will suffice to work around the A8 erratum (see
5643 setting of always_after_branch above). */
5644 ;
5645 else if (is_bcc)
5646 {
5647 offset = (insn & 0x7ff) << 1;
5648 offset |= (insn & 0x3f0000) >> 4;
5649 offset |= (insn & 0x2000) ? 0x40000 : 0;
5650 offset |= (insn & 0x800) ? 0x80000 : 0;
5651 offset |= (insn & 0x4000000) ? 0x100000 : 0;
5652 if (offset & 0x100000)
5653 offset |= ~ ((bfd_signed_vma) 0xfffff);
5654 stub_type = arm_stub_a8_veneer_b_cond;
5655 }
5656 else if (is_b || is_bl || is_blx)
5657 {
5658 int s = (insn & 0x4000000) != 0;
5659 int j1 = (insn & 0x2000) != 0;
5660 int j2 = (insn & 0x800) != 0;
5661 int i1 = !(j1 ^ s);
5662 int i2 = !(j2 ^ s);
5663
5664 offset = (insn & 0x7ff) << 1;
5665 offset |= (insn & 0x3ff0000) >> 4;
5666 offset |= i2 << 22;
5667 offset |= i1 << 23;
5668 offset |= s << 24;
5669 if (offset & 0x1000000)
5670 offset |= ~ ((bfd_signed_vma) 0xffffff);
5671
5672 if (is_blx)
5673 offset &= ~ ((bfd_signed_vma) 3);
5674
5675 stub_type = is_blx ? arm_stub_a8_veneer_blx :
5676 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
5677 }
5678
5679 if (stub_type != arm_stub_none)
5680 {
5681 bfd_vma pc_for_insn = base_vma + i + 4;
5682
5683 /* The original instruction is a BL, but the target is
5684 an ARM instruction. If we were not making a stub,
5685 the BL would have been converted to a BLX. Use the
5686 BLX stub instead in that case. */
5687 if (htab->use_blx && force_target_arm
5688 && stub_type == arm_stub_a8_veneer_bl)
5689 {
5690 stub_type = arm_stub_a8_veneer_blx;
5691 is_blx = TRUE;
5692 is_bl = FALSE;
5693 }
5694 /* Conversely, if the original instruction was
5695 BLX but the target is Thumb mode, use the BL
5696 stub. */
5697 else if (force_target_thumb
5698 && stub_type == arm_stub_a8_veneer_blx)
5699 {
5700 stub_type = arm_stub_a8_veneer_bl;
5701 is_blx = FALSE;
5702 is_bl = TRUE;
5703 }
5704
5705 if (is_blx)
5706 pc_for_insn &= ~ ((bfd_vma) 3);
5707
5708 /* If we found a relocation, use the proper destination,
5709 not the offset in the (unrelocated) instruction.
5710 Note this is always done if we switched the stub type
5711 above. */
5712 if (found)
5713 offset =
5714 (bfd_signed_vma) (found->destination - pc_for_insn);
5715
5716 /* If the stub will use a Thumb-mode branch to a
5717 PLT target, redirect it to the preceding Thumb
5718 entry point. */
5719 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
5720 offset -= PLT_THUMB_STUB_SIZE;
5721
5722 target = pc_for_insn + offset;
5723
5724 /* The BLX stub is ARM-mode code. Adjust the offset to
5725 take the different PC value (+8 instead of +4) into
5726 account. */
5727 if (stub_type == arm_stub_a8_veneer_blx)
5728 offset += 4;
5729
5730 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
5731 {
5732 char *stub_name = NULL;
5733
5734 if (num_a8_fixes == a8_fix_table_size)
5735 {
5736 a8_fix_table_size *= 2;
5737 a8_fixes = (struct a8_erratum_fix *)
5738 bfd_realloc (a8_fixes,
5739 sizeof (struct a8_erratum_fix)
5740 * a8_fix_table_size);
5741 }
5742
5743 if (num_a8_fixes < prev_num_a8_fixes)
5744 {
5745 /* If we're doing a subsequent scan,
5746 check if we've found the same fix as
5747 before, and try and reuse the stub
5748 name. */
5749 stub_name = a8_fixes[num_a8_fixes].stub_name;
5750 if ((a8_fixes[num_a8_fixes].section != section)
5751 || (a8_fixes[num_a8_fixes].offset != i))
5752 {
5753 free (stub_name);
5754 stub_name = NULL;
5755 *stub_changed_p = TRUE;
5756 }
5757 }
5758
5759 if (!stub_name)
5760 {
5761 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
5762 if (stub_name != NULL)
5763 sprintf (stub_name, "%x:%x", section->id, i);
5764 }
5765
5766 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
5767 a8_fixes[num_a8_fixes].section = section;
5768 a8_fixes[num_a8_fixes].offset = i;
5769 a8_fixes[num_a8_fixes].target_offset =
5770 target - base_vma;
5771 a8_fixes[num_a8_fixes].orig_insn = insn;
5772 a8_fixes[num_a8_fixes].stub_name = stub_name;
5773 a8_fixes[num_a8_fixes].stub_type = stub_type;
5774 a8_fixes[num_a8_fixes].branch_type =
5775 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
5776
5777 num_a8_fixes++;
5778 }
5779 }
5780 }
5781
5782 i += insn_32bit ? 4 : 2;
5783 last_was_32bit = insn_32bit;
5784 last_was_branch = is_32bit_branch;
5785 }
5786 }
5787
5788 if (elf_section_data (section)->this_hdr.contents == NULL)
5789 free (contents);
5790 }
5791
5792 *a8_fixes_p = a8_fixes;
5793 *num_a8_fixes_p = num_a8_fixes;
5794 *a8_fix_table_size_p = a8_fix_table_size;
5795
5796 return FALSE;
5797 }
5798
5799 /* Create or update a stub entry depending on whether the stub can already be
5800 found in HTAB. The stub is identified by:
5801 - its type STUB_TYPE
5802 - its source branch (note that several can share the same stub) whose
5803 section and relocation (if any) are given by SECTION and IRELA
5804 respectively
5805 - its target symbol whose input section, hash, name, value and branch type
5806 are given in SYM_SEC, HASH, SYM_NAME, SYM_VALUE and BRANCH_TYPE
5807 respectively
5808
5809 If found, the value of the stub's target symbol is updated from SYM_VALUE
5810 and *NEW_STUB is set to FALSE. Otherwise, *NEW_STUB is set to
5811 TRUE and the stub entry is initialized.
5812
5813 Returns the stub that was created or updated, or NULL if an error
5814 occurred. */
5815
5816 static struct elf32_arm_stub_hash_entry *
5817 elf32_arm_create_stub (struct elf32_arm_link_hash_table *htab,
5818 enum elf32_arm_stub_type stub_type, asection *section,
5819 Elf_Internal_Rela *irela, asection *sym_sec,
5820 struct elf32_arm_link_hash_entry *hash, char *sym_name,
5821 bfd_vma sym_value, enum arm_st_branch_type branch_type,
5822 bfd_boolean *new_stub)
5823 {
5824 const asection *id_sec;
5825 char *stub_name;
5826 struct elf32_arm_stub_hash_entry *stub_entry;
5827 unsigned int r_type;
5828 bfd_boolean sym_claimed = arm_stub_sym_claimed (stub_type);
5829
5830 BFD_ASSERT (stub_type != arm_stub_none);
5831 *new_stub = FALSE;
5832
5833 if (sym_claimed)
5834 stub_name = sym_name;
5835 else
5836 {
5837 BFD_ASSERT (irela);
5838 BFD_ASSERT (section);
5839 BFD_ASSERT (section->id <= htab->top_id);
5840
5841 /* Support for grouping stub sections. */
5842 id_sec = htab->stub_group[section->id].link_sec;
5843
5844 /* Get the name of this stub. */
5845 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash, irela,
5846 stub_type);
5847 if (!stub_name)
5848 return NULL;
5849 }
5850
5851 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, FALSE,
5852 FALSE);
5853 /* The proper stub has already been created, just update its value. */
5854 if (stub_entry != NULL)
5855 {
5856 if (!sym_claimed)
5857 free (stub_name);
5858 stub_entry->target_value = sym_value;
5859 return stub_entry;
5860 }
5861
5862 stub_entry = elf32_arm_add_stub (stub_name, section, htab, stub_type);
5863 if (stub_entry == NULL)
5864 {
5865 if (!sym_claimed)
5866 free (stub_name);
5867 return NULL;
5868 }
5869
5870 stub_entry->target_value = sym_value;
5871 stub_entry->target_section = sym_sec;
5872 stub_entry->stub_type = stub_type;
5873 stub_entry->h = hash;
5874 stub_entry->branch_type = branch_type;
5875
5876 if (sym_claimed)
5877 stub_entry->output_name = sym_name;
5878 else
5879 {
5880 if (sym_name == NULL)
5881 sym_name = "unnamed";
5882 stub_entry->output_name = (char *)
5883 bfd_alloc (htab->stub_bfd, sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5884 + strlen (sym_name));
5885 if (stub_entry->output_name == NULL)
5886 {
5887 free (stub_name);
5888 return NULL;
5889 }
5890
5891 /* For historical reasons, use the existing names for ARM-to-Thumb and
5892 Thumb-to-ARM stubs. */
5893 r_type = ELF32_R_TYPE (irela->r_info);
5894 if ((r_type == (unsigned int) R_ARM_THM_CALL
5895 || r_type == (unsigned int) R_ARM_THM_JUMP24
5896 || r_type == (unsigned int) R_ARM_THM_JUMP19)
5897 && branch_type == ST_BRANCH_TO_ARM)
5898 sprintf (stub_entry->output_name, THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5899 else if ((r_type == (unsigned int) R_ARM_CALL
5900 || r_type == (unsigned int) R_ARM_JUMP24)
5901 && branch_type == ST_BRANCH_TO_THUMB)
5902 sprintf (stub_entry->output_name, ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5903 else
5904 sprintf (stub_entry->output_name, STUB_ENTRY_NAME, sym_name);
5905 }
5906
5907 *new_stub = TRUE;
5908 return stub_entry;
5909 }
5910
5911 /* Scan symbols in INPUT_BFD to identify secure entry functions needing a
5912 gateway veneer to transition from non secure to secure state and create them
5913 accordingly.
5914
5915 "ARMv8-M Security Extensions: Requirements on Development Tools" document
5916 defines the conditions that govern Secure Gateway veneer creation for a
5917 given symbol <SYM> as follows:
5918 - it has function type
5919 - it has non local binding
5920 - a symbol named __acle_se_<SYM> (called special symbol) exists with the
5921 same type, binding and value as <SYM> (called normal symbol).
5922 An entry function can handle secure state transition itself in which case
5923 its special symbol would have a different value from the normal symbol.
5924
5925 OUT_ATTR gives the output attributes, SYM_HASHES the symbol index to hash
5926 entry mapping while HTAB gives the name to hash entry mapping.
5927 *CMSE_STUB_CREATED is increased by the number of secure gateway veneer
5928 created.
5929
5930 The return value gives whether a stub failed to be allocated. */
5931
5932 static bfd_boolean
5933 cmse_scan (bfd *input_bfd, struct elf32_arm_link_hash_table *htab,
5934 obj_attribute *out_attr, struct elf_link_hash_entry **sym_hashes,
5935 int *cmse_stub_created)
5936 {
5937 const struct elf_backend_data *bed;
5938 Elf_Internal_Shdr *symtab_hdr;
5939 unsigned i, j, sym_count, ext_start;
5940 Elf_Internal_Sym *cmse_sym, *local_syms;
5941 struct elf32_arm_link_hash_entry *hash, *cmse_hash = NULL;
5942 enum arm_st_branch_type branch_type;
5943 char *sym_name, *lsym_name;
5944 bfd_vma sym_value;
5945 asection *section;
5946 struct elf32_arm_stub_hash_entry *stub_entry;
5947 bfd_boolean is_v8m, new_stub, cmse_invalid, ret = TRUE;
5948
5949 bed = get_elf_backend_data (input_bfd);
5950 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5951 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
5952 ext_start = symtab_hdr->sh_info;
5953 is_v8m = (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
5954 && out_attr[Tag_CPU_arch_profile].i == 'M');
5955
5956 local_syms = (Elf_Internal_Sym *) symtab_hdr->contents;
5957 if (local_syms == NULL)
5958 local_syms = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5959 symtab_hdr->sh_info, 0, NULL, NULL,
5960 NULL);
5961 if (symtab_hdr->sh_info && local_syms == NULL)
5962 return FALSE;
5963
5964 /* Scan symbols. */
5965 for (i = 0; i < sym_count; i++)
5966 {
5967 cmse_invalid = FALSE;
5968
5969 if (i < ext_start)
5970 {
5971 cmse_sym = &local_syms[i];
5972 sym_name = bfd_elf_string_from_elf_section (input_bfd,
5973 symtab_hdr->sh_link,
5974 cmse_sym->st_name);
5975 if (!sym_name || !CONST_STRNEQ (sym_name, CMSE_PREFIX))
5976 continue;
5977
5978 /* Special symbol with local binding. */
5979 cmse_invalid = TRUE;
5980 }
5981 else
5982 {
5983 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
5984 sym_name = (char *) cmse_hash->root.root.root.string;
5985 if (!CONST_STRNEQ (sym_name, CMSE_PREFIX))
5986 continue;
5987
5988 /* Special symbol has incorrect binding or type. */
5989 if ((cmse_hash->root.root.type != bfd_link_hash_defined
5990 && cmse_hash->root.root.type != bfd_link_hash_defweak)
5991 || cmse_hash->root.type != STT_FUNC)
5992 cmse_invalid = TRUE;
5993 }
5994
5995 if (!is_v8m)
5996 {
5997 _bfd_error_handler (_("%pB: special symbol `%s' only allowed for "
5998 "ARMv8-M architecture or later"),
5999 input_bfd, sym_name);
6000 is_v8m = TRUE; /* Avoid multiple warning. */
6001 ret = FALSE;
6002 }
6003
6004 if (cmse_invalid)
6005 {
6006 _bfd_error_handler (_("%pB: invalid special symbol `%s'; it must be"
6007 " a global or weak function symbol"),
6008 input_bfd, sym_name);
6009 ret = FALSE;
6010 if (i < ext_start)
6011 continue;
6012 }
6013
6014 sym_name += strlen (CMSE_PREFIX);
6015 hash = (struct elf32_arm_link_hash_entry *)
6016 elf_link_hash_lookup (&(htab)->root, sym_name, FALSE, FALSE, TRUE);
6017
6018 /* No associated normal symbol or it is neither global nor weak. */
6019 if (!hash
6020 || (hash->root.root.type != bfd_link_hash_defined
6021 && hash->root.root.type != bfd_link_hash_defweak)
6022 || hash->root.type != STT_FUNC)
6023 {
6024 /* Initialize here to avoid warning about use of possibly
6025 uninitialized variable. */
6026 j = 0;
6027
6028 if (!hash)
6029 {
6030 /* Searching for a normal symbol with local binding. */
6031 for (; j < ext_start; j++)
6032 {
6033 lsym_name =
6034 bfd_elf_string_from_elf_section (input_bfd,
6035 symtab_hdr->sh_link,
6036 local_syms[j].st_name);
6037 if (!strcmp (sym_name, lsym_name))
6038 break;
6039 }
6040 }
6041
6042 if (hash || j < ext_start)
6043 {
6044 _bfd_error_handler
6045 (_("%pB: invalid standard symbol `%s'; it must be "
6046 "a global or weak function symbol"),
6047 input_bfd, sym_name);
6048 }
6049 else
6050 _bfd_error_handler
6051 (_("%pB: absent standard symbol `%s'"), input_bfd, sym_name);
6052 ret = FALSE;
6053 if (!hash)
6054 continue;
6055 }
6056
6057 sym_value = hash->root.root.u.def.value;
6058 section = hash->root.root.u.def.section;
6059
6060 if (cmse_hash->root.root.u.def.section != section)
6061 {
6062 _bfd_error_handler
6063 (_("%pB: `%s' and its special symbol are in different sections"),
6064 input_bfd, sym_name);
6065 ret = FALSE;
6066 }
6067 if (cmse_hash->root.root.u.def.value != sym_value)
6068 continue; /* Ignore: could be an entry function starting with SG. */
6069
6070 /* If this section is a link-once section that will be discarded, then
6071 don't create any stubs. */
6072 if (section->output_section == NULL)
6073 {
6074 _bfd_error_handler
6075 (_("%pB: entry function `%s' not output"), input_bfd, sym_name);
6076 continue;
6077 }
6078
6079 if (hash->root.size == 0)
6080 {
6081 _bfd_error_handler
6082 (_("%pB: entry function `%s' is empty"), input_bfd, sym_name);
6083 ret = FALSE;
6084 }
6085
6086 if (!ret)
6087 continue;
6088 branch_type = ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
6089 stub_entry
6090 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
6091 NULL, NULL, section, hash, sym_name,
6092 sym_value, branch_type, &new_stub);
6093
6094 if (stub_entry == NULL)
6095 ret = FALSE;
6096 else
6097 {
6098 BFD_ASSERT (new_stub);
6099 (*cmse_stub_created)++;
6100 }
6101 }
6102
6103 if (!symtab_hdr->contents)
6104 free (local_syms);
6105 return ret;
6106 }
6107
6108 /* Return TRUE iff a symbol identified by its linker HASH entry is a secure
6109 code entry function, ie can be called from non secure code without using a
6110 veneer. */
6111
6112 static bfd_boolean
6113 cmse_entry_fct_p (struct elf32_arm_link_hash_entry *hash)
6114 {
6115 bfd_byte contents[4];
6116 uint32_t first_insn;
6117 asection *section;
6118 file_ptr offset;
6119 bfd *abfd;
6120
6121 /* Defined symbol of function type. */
6122 if (hash->root.root.type != bfd_link_hash_defined
6123 && hash->root.root.type != bfd_link_hash_defweak)
6124 return FALSE;
6125 if (hash->root.type != STT_FUNC)
6126 return FALSE;
6127
6128 /* Read first instruction. */
6129 section = hash->root.root.u.def.section;
6130 abfd = section->owner;
6131 offset = hash->root.root.u.def.value - section->vma;
6132 if (!bfd_get_section_contents (abfd, section, contents, offset,
6133 sizeof (contents)))
6134 return FALSE;
6135
6136 first_insn = bfd_get_32 (abfd, contents);
6137
6138 /* Starts by SG instruction. */
6139 return first_insn == 0xe97fe97f;
6140 }
6141
6142 /* Output the name (in symbol table) of the veneer GEN_ENTRY if it is a new
6143 secure gateway veneers (ie. the veneers was not in the input import library)
6144 and there is no output import library (GEN_INFO->out_implib_bfd is NULL. */
6145
6146 static bfd_boolean
6147 arm_list_new_cmse_stub (struct bfd_hash_entry *gen_entry, void *gen_info)
6148 {
6149 struct elf32_arm_stub_hash_entry *stub_entry;
6150 struct bfd_link_info *info;
6151
6152 /* Massage our args to the form they really have. */
6153 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
6154 info = (struct bfd_link_info *) gen_info;
6155
6156 if (info->out_implib_bfd)
6157 return TRUE;
6158
6159 if (stub_entry->stub_type != arm_stub_cmse_branch_thumb_only)
6160 return TRUE;
6161
6162 if (stub_entry->stub_offset == (bfd_vma) -1)
6163 _bfd_error_handler (" %s", stub_entry->output_name);
6164
6165 return TRUE;
6166 }
6167
6168 /* Set offset of each secure gateway veneers so that its address remain
6169 identical to the one in the input import library referred by
6170 HTAB->in_implib_bfd. A warning is issued for veneers that disappeared
6171 (present in input import library but absent from the executable being
6172 linked) or if new veneers appeared and there is no output import library
6173 (INFO->out_implib_bfd is NULL and *CMSE_STUB_CREATED is bigger than the
6174 number of secure gateway veneers found in the input import library.
6175
6176 The function returns whether an error occurred. If no error occurred,
6177 *CMSE_STUB_CREATED gives the number of SG veneers created by both cmse_scan
6178 and this function and HTAB->new_cmse_stub_offset is set to the biggest
6179 veneer observed set for new veneers to be layed out after. */
6180
6181 static bfd_boolean
6182 set_cmse_veneer_addr_from_implib (struct bfd_link_info *info,
6183 struct elf32_arm_link_hash_table *htab,
6184 int *cmse_stub_created)
6185 {
6186 long symsize;
6187 char *sym_name;
6188 flagword flags;
6189 long i, symcount;
6190 bfd *in_implib_bfd;
6191 asection *stub_out_sec;
6192 bfd_boolean ret = TRUE;
6193 Elf_Internal_Sym *intsym;
6194 const char *out_sec_name;
6195 bfd_size_type cmse_stub_size;
6196 asymbol **sympp = NULL, *sym;
6197 struct elf32_arm_link_hash_entry *hash;
6198 const insn_sequence *cmse_stub_template;
6199 struct elf32_arm_stub_hash_entry *stub_entry;
6200 int cmse_stub_template_size, new_cmse_stubs_created = *cmse_stub_created;
6201 bfd_vma veneer_value, stub_offset, next_cmse_stub_offset;
6202 bfd_vma cmse_stub_array_start = (bfd_vma) -1, cmse_stub_sec_vma = 0;
6203
6204 /* No input secure gateway import library. */
6205 if (!htab->in_implib_bfd)
6206 return TRUE;
6207
6208 in_implib_bfd = htab->in_implib_bfd;
6209 if (!htab->cmse_implib)
6210 {
6211 _bfd_error_handler (_("%pB: --in-implib only supported for Secure "
6212 "Gateway import libraries"), in_implib_bfd);
6213 return FALSE;
6214 }
6215
6216 /* Get symbol table size. */
6217 symsize = bfd_get_symtab_upper_bound (in_implib_bfd);
6218 if (symsize < 0)
6219 return FALSE;
6220
6221 /* Read in the input secure gateway import library's symbol table. */
6222 sympp = (asymbol **) bfd_malloc (symsize);
6223 if (sympp == NULL)
6224 return FALSE;
6225
6226 symcount = bfd_canonicalize_symtab (in_implib_bfd, sympp);
6227 if (symcount < 0)
6228 {
6229 ret = FALSE;
6230 goto free_sym_buf;
6231 }
6232
6233 htab->new_cmse_stub_offset = 0;
6234 cmse_stub_size =
6235 find_stub_size_and_template (arm_stub_cmse_branch_thumb_only,
6236 &cmse_stub_template,
6237 &cmse_stub_template_size);
6238 out_sec_name =
6239 arm_dedicated_stub_output_section_name (arm_stub_cmse_branch_thumb_only);
6240 stub_out_sec =
6241 bfd_get_section_by_name (htab->obfd, out_sec_name);
6242 if (stub_out_sec != NULL)
6243 cmse_stub_sec_vma = stub_out_sec->vma;
6244
6245 /* Set addresses of veneers mentionned in input secure gateway import
6246 library's symbol table. */
6247 for (i = 0; i < symcount; i++)
6248 {
6249 sym = sympp[i];
6250 flags = sym->flags;
6251 sym_name = (char *) bfd_asymbol_name (sym);
6252 intsym = &((elf_symbol_type *) sym)->internal_elf_sym;
6253
6254 if (sym->section != bfd_abs_section_ptr
6255 || !(flags & (BSF_GLOBAL | BSF_WEAK))
6256 || (flags & BSF_FUNCTION) != BSF_FUNCTION
6257 || (ARM_GET_SYM_BRANCH_TYPE (intsym->st_target_internal)
6258 != ST_BRANCH_TO_THUMB))
6259 {
6260 _bfd_error_handler (_("%pB: invalid import library entry: `%s'; "
6261 "symbol should be absolute, global and "
6262 "refer to Thumb functions"),
6263 in_implib_bfd, sym_name);
6264 ret = FALSE;
6265 continue;
6266 }
6267
6268 veneer_value = bfd_asymbol_value (sym);
6269 stub_offset = veneer_value - cmse_stub_sec_vma;
6270 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, sym_name,
6271 FALSE, FALSE);
6272 hash = (struct elf32_arm_link_hash_entry *)
6273 elf_link_hash_lookup (&(htab)->root, sym_name, FALSE, FALSE, TRUE);
6274
6275 /* Stub entry should have been created by cmse_scan or the symbol be of
6276 a secure function callable from non secure code. */
6277 if (!stub_entry && !hash)
6278 {
6279 bfd_boolean new_stub;
6280
6281 _bfd_error_handler
6282 (_("entry function `%s' disappeared from secure code"), sym_name);
6283 hash = (struct elf32_arm_link_hash_entry *)
6284 elf_link_hash_lookup (&(htab)->root, sym_name, TRUE, TRUE, TRUE);
6285 stub_entry
6286 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
6287 NULL, NULL, bfd_abs_section_ptr, hash,
6288 sym_name, veneer_value,
6289 ST_BRANCH_TO_THUMB, &new_stub);
6290 if (stub_entry == NULL)
6291 ret = FALSE;
6292 else
6293 {
6294 BFD_ASSERT (new_stub);
6295 new_cmse_stubs_created++;
6296 (*cmse_stub_created)++;
6297 }
6298 stub_entry->stub_template_size = stub_entry->stub_size = 0;
6299 stub_entry->stub_offset = stub_offset;
6300 }
6301 /* Symbol found is not callable from non secure code. */
6302 else if (!stub_entry)
6303 {
6304 if (!cmse_entry_fct_p (hash))
6305 {
6306 _bfd_error_handler (_("`%s' refers to a non entry function"),
6307 sym_name);
6308 ret = FALSE;
6309 }
6310 continue;
6311 }
6312 else
6313 {
6314 /* Only stubs for SG veneers should have been created. */
6315 BFD_ASSERT (stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
6316
6317 /* Check visibility hasn't changed. */
6318 if (!!(flags & BSF_GLOBAL)
6319 != (hash->root.root.type == bfd_link_hash_defined))
6320 _bfd_error_handler
6321 (_("%pB: visibility of symbol `%s' has changed"), in_implib_bfd,
6322 sym_name);
6323
6324 stub_entry->stub_offset = stub_offset;
6325 }
6326
6327 /* Size should match that of a SG veneer. */
6328 if (intsym->st_size != cmse_stub_size)
6329 {
6330 _bfd_error_handler (_("%pB: incorrect size for symbol `%s'"),
6331 in_implib_bfd, sym_name);
6332 ret = FALSE;
6333 }
6334
6335 /* Previous veneer address is before current SG veneer section. */
6336 if (veneer_value < cmse_stub_sec_vma)
6337 {
6338 /* Avoid offset underflow. */
6339 if (stub_entry)
6340 stub_entry->stub_offset = 0;
6341 stub_offset = 0;
6342 ret = FALSE;
6343 }
6344
6345 /* Complain if stub offset not a multiple of stub size. */
6346 if (stub_offset % cmse_stub_size)
6347 {
6348 _bfd_error_handler
6349 (_("offset of veneer for entry function `%s' not a multiple of "
6350 "its size"), sym_name);
6351 ret = FALSE;
6352 }
6353
6354 if (!ret)
6355 continue;
6356
6357 new_cmse_stubs_created--;
6358 if (veneer_value < cmse_stub_array_start)
6359 cmse_stub_array_start = veneer_value;
6360 next_cmse_stub_offset = stub_offset + ((cmse_stub_size + 7) & ~7);
6361 if (next_cmse_stub_offset > htab->new_cmse_stub_offset)
6362 htab->new_cmse_stub_offset = next_cmse_stub_offset;
6363 }
6364
6365 if (!info->out_implib_bfd && new_cmse_stubs_created != 0)
6366 {
6367 BFD_ASSERT (new_cmse_stubs_created > 0);
6368 _bfd_error_handler
6369 (_("new entry function(s) introduced but no output import library "
6370 "specified:"));
6371 bfd_hash_traverse (&htab->stub_hash_table, arm_list_new_cmse_stub, info);
6372 }
6373
6374 if (cmse_stub_array_start != cmse_stub_sec_vma)
6375 {
6376 _bfd_error_handler
6377 (_("start address of `%s' is different from previous link"),
6378 out_sec_name);
6379 ret = FALSE;
6380 }
6381
6382 free_sym_buf:
6383 free (sympp);
6384 return ret;
6385 }
6386
6387 /* Determine and set the size of the stub section for a final link.
6388
6389 The basic idea here is to examine all the relocations looking for
6390 PC-relative calls to a target that is unreachable with a "bl"
6391 instruction. */
6392
6393 bfd_boolean
6394 elf32_arm_size_stubs (bfd *output_bfd,
6395 bfd *stub_bfd,
6396 struct bfd_link_info *info,
6397 bfd_signed_vma group_size,
6398 asection * (*add_stub_section) (const char *, asection *,
6399 asection *,
6400 unsigned int),
6401 void (*layout_sections_again) (void))
6402 {
6403 bfd_boolean ret = TRUE;
6404 obj_attribute *out_attr;
6405 int cmse_stub_created = 0;
6406 bfd_size_type stub_group_size;
6407 bfd_boolean m_profile, stubs_always_after_branch, first_veneer_scan = TRUE;
6408 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
6409 struct a8_erratum_fix *a8_fixes = NULL;
6410 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
6411 struct a8_erratum_reloc *a8_relocs = NULL;
6412 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
6413
6414 if (htab == NULL)
6415 return FALSE;
6416
6417 if (htab->fix_cortex_a8)
6418 {
6419 a8_fixes = (struct a8_erratum_fix *)
6420 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
6421 a8_relocs = (struct a8_erratum_reloc *)
6422 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
6423 }
6424
6425 /* Propagate mach to stub bfd, because it may not have been
6426 finalized when we created stub_bfd. */
6427 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
6428 bfd_get_mach (output_bfd));
6429
6430 /* Stash our params away. */
6431 htab->stub_bfd = stub_bfd;
6432 htab->add_stub_section = add_stub_section;
6433 htab->layout_sections_again = layout_sections_again;
6434 stubs_always_after_branch = group_size < 0;
6435
6436 out_attr = elf_known_obj_attributes_proc (output_bfd);
6437 m_profile = out_attr[Tag_CPU_arch_profile].i == 'M';
6438
6439 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
6440 as the first half of a 32-bit branch straddling two 4K pages. This is a
6441 crude way of enforcing that. */
6442 if (htab->fix_cortex_a8)
6443 stubs_always_after_branch = 1;
6444
6445 if (group_size < 0)
6446 stub_group_size = -group_size;
6447 else
6448 stub_group_size = group_size;
6449
6450 if (stub_group_size == 1)
6451 {
6452 /* Default values. */
6453 /* Thumb branch range is +-4MB has to be used as the default
6454 maximum size (a given section can contain both ARM and Thumb
6455 code, so the worst case has to be taken into account).
6456
6457 This value is 24K less than that, which allows for 2025
6458 12-byte stubs. If we exceed that, then we will fail to link.
6459 The user will have to relink with an explicit group size
6460 option. */
6461 stub_group_size = 4170000;
6462 }
6463
6464 group_sections (htab, stub_group_size, stubs_always_after_branch);
6465
6466 /* If we're applying the cortex A8 fix, we need to determine the
6467 program header size now, because we cannot change it later --
6468 that could alter section placements. Notice the A8 erratum fix
6469 ends up requiring the section addresses to remain unchanged
6470 modulo the page size. That's something we cannot represent
6471 inside BFD, and we don't want to force the section alignment to
6472 be the page size. */
6473 if (htab->fix_cortex_a8)
6474 (*htab->layout_sections_again) ();
6475
6476 while (1)
6477 {
6478 bfd *input_bfd;
6479 unsigned int bfd_indx;
6480 asection *stub_sec;
6481 enum elf32_arm_stub_type stub_type;
6482 bfd_boolean stub_changed = FALSE;
6483 unsigned prev_num_a8_fixes = num_a8_fixes;
6484
6485 num_a8_fixes = 0;
6486 for (input_bfd = info->input_bfds, bfd_indx = 0;
6487 input_bfd != NULL;
6488 input_bfd = input_bfd->link.next, bfd_indx++)
6489 {
6490 Elf_Internal_Shdr *symtab_hdr;
6491 asection *section;
6492 Elf_Internal_Sym *local_syms = NULL;
6493
6494 if (!is_arm_elf (input_bfd))
6495 continue;
6496 if ((input_bfd->flags & DYNAMIC) != 0
6497 && (elf_sym_hashes (input_bfd) == NULL
6498 || (elf_dyn_lib_class (input_bfd) & DYN_AS_NEEDED) != 0))
6499 continue;
6500
6501 num_a8_relocs = 0;
6502
6503 /* We'll need the symbol table in a second. */
6504 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
6505 if (symtab_hdr->sh_info == 0)
6506 continue;
6507
6508 /* Limit scan of symbols to object file whose profile is
6509 Microcontroller to not hinder performance in the general case. */
6510 if (m_profile && first_veneer_scan)
6511 {
6512 struct elf_link_hash_entry **sym_hashes;
6513
6514 sym_hashes = elf_sym_hashes (input_bfd);
6515 if (!cmse_scan (input_bfd, htab, out_attr, sym_hashes,
6516 &cmse_stub_created))
6517 goto error_ret_free_local;
6518
6519 if (cmse_stub_created != 0)
6520 stub_changed = TRUE;
6521 }
6522
6523 /* Walk over each section attached to the input bfd. */
6524 for (section = input_bfd->sections;
6525 section != NULL;
6526 section = section->next)
6527 {
6528 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
6529
6530 /* If there aren't any relocs, then there's nothing more
6531 to do. */
6532 if ((section->flags & SEC_RELOC) == 0
6533 || section->reloc_count == 0
6534 || (section->flags & SEC_CODE) == 0)
6535 continue;
6536
6537 /* If this section is a link-once section that will be
6538 discarded, then don't create any stubs. */
6539 if (section->output_section == NULL
6540 || section->output_section->owner != output_bfd)
6541 continue;
6542
6543 /* Get the relocs. */
6544 internal_relocs
6545 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
6546 NULL, info->keep_memory);
6547 if (internal_relocs == NULL)
6548 goto error_ret_free_local;
6549
6550 /* Now examine each relocation. */
6551 irela = internal_relocs;
6552 irelaend = irela + section->reloc_count;
6553 for (; irela < irelaend; irela++)
6554 {
6555 unsigned int r_type, r_indx;
6556 asection *sym_sec;
6557 bfd_vma sym_value;
6558 bfd_vma destination;
6559 struct elf32_arm_link_hash_entry *hash;
6560 const char *sym_name;
6561 unsigned char st_type;
6562 enum arm_st_branch_type branch_type;
6563 bfd_boolean created_stub = FALSE;
6564
6565 r_type = ELF32_R_TYPE (irela->r_info);
6566 r_indx = ELF32_R_SYM (irela->r_info);
6567
6568 if (r_type >= (unsigned int) R_ARM_max)
6569 {
6570 bfd_set_error (bfd_error_bad_value);
6571 error_ret_free_internal:
6572 if (elf_section_data (section)->relocs == NULL)
6573 free (internal_relocs);
6574 /* Fall through. */
6575 error_ret_free_local:
6576 if (symtab_hdr->contents != (unsigned char *) local_syms)
6577 free (local_syms);
6578 return FALSE;
6579 }
6580
6581 hash = NULL;
6582 if (r_indx >= symtab_hdr->sh_info)
6583 hash = elf32_arm_hash_entry
6584 (elf_sym_hashes (input_bfd)
6585 [r_indx - symtab_hdr->sh_info]);
6586
6587 /* Only look for stubs on branch instructions, or
6588 non-relaxed TLSCALL */
6589 if ((r_type != (unsigned int) R_ARM_CALL)
6590 && (r_type != (unsigned int) R_ARM_THM_CALL)
6591 && (r_type != (unsigned int) R_ARM_JUMP24)
6592 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
6593 && (r_type != (unsigned int) R_ARM_THM_XPC22)
6594 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
6595 && (r_type != (unsigned int) R_ARM_PLT32)
6596 && !((r_type == (unsigned int) R_ARM_TLS_CALL
6597 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6598 && r_type == elf32_arm_tls_transition
6599 (info, r_type, &hash->root)
6600 && ((hash ? hash->tls_type
6601 : (elf32_arm_local_got_tls_type
6602 (input_bfd)[r_indx]))
6603 & GOT_TLS_GDESC) != 0))
6604 continue;
6605
6606 /* Now determine the call target, its name, value,
6607 section. */
6608 sym_sec = NULL;
6609 sym_value = 0;
6610 destination = 0;
6611 sym_name = NULL;
6612
6613 if (r_type == (unsigned int) R_ARM_TLS_CALL
6614 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6615 {
6616 /* A non-relaxed TLS call. The target is the
6617 plt-resident trampoline and nothing to do
6618 with the symbol. */
6619 BFD_ASSERT (htab->tls_trampoline > 0);
6620 sym_sec = htab->root.splt;
6621 sym_value = htab->tls_trampoline;
6622 hash = 0;
6623 st_type = STT_FUNC;
6624 branch_type = ST_BRANCH_TO_ARM;
6625 }
6626 else if (!hash)
6627 {
6628 /* It's a local symbol. */
6629 Elf_Internal_Sym *sym;
6630
6631 if (local_syms == NULL)
6632 {
6633 local_syms
6634 = (Elf_Internal_Sym *) symtab_hdr->contents;
6635 if (local_syms == NULL)
6636 local_syms
6637 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
6638 symtab_hdr->sh_info, 0,
6639 NULL, NULL, NULL);
6640 if (local_syms == NULL)
6641 goto error_ret_free_internal;
6642 }
6643
6644 sym = local_syms + r_indx;
6645 if (sym->st_shndx == SHN_UNDEF)
6646 sym_sec = bfd_und_section_ptr;
6647 else if (sym->st_shndx == SHN_ABS)
6648 sym_sec = bfd_abs_section_ptr;
6649 else if (sym->st_shndx == SHN_COMMON)
6650 sym_sec = bfd_com_section_ptr;
6651 else
6652 sym_sec =
6653 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
6654
6655 if (!sym_sec)
6656 /* This is an undefined symbol. It can never
6657 be resolved. */
6658 continue;
6659
6660 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
6661 sym_value = sym->st_value;
6662 destination = (sym_value + irela->r_addend
6663 + sym_sec->output_offset
6664 + sym_sec->output_section->vma);
6665 st_type = ELF_ST_TYPE (sym->st_info);
6666 branch_type =
6667 ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
6668 sym_name
6669 = bfd_elf_string_from_elf_section (input_bfd,
6670 symtab_hdr->sh_link,
6671 sym->st_name);
6672 }
6673 else
6674 {
6675 /* It's an external symbol. */
6676 while (hash->root.root.type == bfd_link_hash_indirect
6677 || hash->root.root.type == bfd_link_hash_warning)
6678 hash = ((struct elf32_arm_link_hash_entry *)
6679 hash->root.root.u.i.link);
6680
6681 if (hash->root.root.type == bfd_link_hash_defined
6682 || hash->root.root.type == bfd_link_hash_defweak)
6683 {
6684 sym_sec = hash->root.root.u.def.section;
6685 sym_value = hash->root.root.u.def.value;
6686
6687 struct elf32_arm_link_hash_table *globals =
6688 elf32_arm_hash_table (info);
6689
6690 /* For a destination in a shared library,
6691 use the PLT stub as target address to
6692 decide whether a branch stub is
6693 needed. */
6694 if (globals != NULL
6695 && globals->root.splt != NULL
6696 && hash != NULL
6697 && hash->root.plt.offset != (bfd_vma) -1)
6698 {
6699 sym_sec = globals->root.splt;
6700 sym_value = hash->root.plt.offset;
6701 if (sym_sec->output_section != NULL)
6702 destination = (sym_value
6703 + sym_sec->output_offset
6704 + sym_sec->output_section->vma);
6705 }
6706 else if (sym_sec->output_section != NULL)
6707 destination = (sym_value + irela->r_addend
6708 + sym_sec->output_offset
6709 + sym_sec->output_section->vma);
6710 }
6711 else if ((hash->root.root.type == bfd_link_hash_undefined)
6712 || (hash->root.root.type == bfd_link_hash_undefweak))
6713 {
6714 /* For a shared library, use the PLT stub as
6715 target address to decide whether a long
6716 branch stub is needed.
6717 For absolute code, they cannot be handled. */
6718 struct elf32_arm_link_hash_table *globals =
6719 elf32_arm_hash_table (info);
6720
6721 if (globals != NULL
6722 && globals->root.splt != NULL
6723 && hash != NULL
6724 && hash->root.plt.offset != (bfd_vma) -1)
6725 {
6726 sym_sec = globals->root.splt;
6727 sym_value = hash->root.plt.offset;
6728 if (sym_sec->output_section != NULL)
6729 destination = (sym_value
6730 + sym_sec->output_offset
6731 + sym_sec->output_section->vma);
6732 }
6733 else
6734 continue;
6735 }
6736 else
6737 {
6738 bfd_set_error (bfd_error_bad_value);
6739 goto error_ret_free_internal;
6740 }
6741 st_type = hash->root.type;
6742 branch_type =
6743 ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
6744 sym_name = hash->root.root.root.string;
6745 }
6746
6747 do
6748 {
6749 bfd_boolean new_stub;
6750 struct elf32_arm_stub_hash_entry *stub_entry;
6751
6752 /* Determine what (if any) linker stub is needed. */
6753 stub_type = arm_type_of_stub (info, section, irela,
6754 st_type, &branch_type,
6755 hash, destination, sym_sec,
6756 input_bfd, sym_name);
6757 if (stub_type == arm_stub_none)
6758 break;
6759
6760 /* We've either created a stub for this reloc already,
6761 or we are about to. */
6762 stub_entry =
6763 elf32_arm_create_stub (htab, stub_type, section, irela,
6764 sym_sec, hash,
6765 (char *) sym_name, sym_value,
6766 branch_type, &new_stub);
6767
6768 created_stub = stub_entry != NULL;
6769 if (!created_stub)
6770 goto error_ret_free_internal;
6771 else if (!new_stub)
6772 break;
6773 else
6774 stub_changed = TRUE;
6775 }
6776 while (0);
6777
6778 /* Look for relocations which might trigger Cortex-A8
6779 erratum. */
6780 if (htab->fix_cortex_a8
6781 && (r_type == (unsigned int) R_ARM_THM_JUMP24
6782 || r_type == (unsigned int) R_ARM_THM_JUMP19
6783 || r_type == (unsigned int) R_ARM_THM_CALL
6784 || r_type == (unsigned int) R_ARM_THM_XPC22))
6785 {
6786 bfd_vma from = section->output_section->vma
6787 + section->output_offset
6788 + irela->r_offset;
6789
6790 if ((from & 0xfff) == 0xffe)
6791 {
6792 /* Found a candidate. Note we haven't checked the
6793 destination is within 4K here: if we do so (and
6794 don't create an entry in a8_relocs) we can't tell
6795 that a branch should have been relocated when
6796 scanning later. */
6797 if (num_a8_relocs == a8_reloc_table_size)
6798 {
6799 a8_reloc_table_size *= 2;
6800 a8_relocs = (struct a8_erratum_reloc *)
6801 bfd_realloc (a8_relocs,
6802 sizeof (struct a8_erratum_reloc)
6803 * a8_reloc_table_size);
6804 }
6805
6806 a8_relocs[num_a8_relocs].from = from;
6807 a8_relocs[num_a8_relocs].destination = destination;
6808 a8_relocs[num_a8_relocs].r_type = r_type;
6809 a8_relocs[num_a8_relocs].branch_type = branch_type;
6810 a8_relocs[num_a8_relocs].sym_name = sym_name;
6811 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
6812 a8_relocs[num_a8_relocs].hash = hash;
6813
6814 num_a8_relocs++;
6815 }
6816 }
6817 }
6818
6819 /* We're done with the internal relocs, free them. */
6820 if (elf_section_data (section)->relocs == NULL)
6821 free (internal_relocs);
6822 }
6823
6824 if (htab->fix_cortex_a8)
6825 {
6826 /* Sort relocs which might apply to Cortex-A8 erratum. */
6827 qsort (a8_relocs, num_a8_relocs,
6828 sizeof (struct a8_erratum_reloc),
6829 &a8_reloc_compare);
6830
6831 /* Scan for branches which might trigger Cortex-A8 erratum. */
6832 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
6833 &num_a8_fixes, &a8_fix_table_size,
6834 a8_relocs, num_a8_relocs,
6835 prev_num_a8_fixes, &stub_changed)
6836 != 0)
6837 goto error_ret_free_local;
6838 }
6839
6840 if (local_syms != NULL
6841 && symtab_hdr->contents != (unsigned char *) local_syms)
6842 {
6843 if (!info->keep_memory)
6844 free (local_syms);
6845 else
6846 symtab_hdr->contents = (unsigned char *) local_syms;
6847 }
6848 }
6849
6850 if (first_veneer_scan
6851 && !set_cmse_veneer_addr_from_implib (info, htab,
6852 &cmse_stub_created))
6853 ret = FALSE;
6854
6855 if (prev_num_a8_fixes != num_a8_fixes)
6856 stub_changed = TRUE;
6857
6858 if (!stub_changed)
6859 break;
6860
6861 /* OK, we've added some stubs. Find out the new size of the
6862 stub sections. */
6863 for (stub_sec = htab->stub_bfd->sections;
6864 stub_sec != NULL;
6865 stub_sec = stub_sec->next)
6866 {
6867 /* Ignore non-stub sections. */
6868 if (!strstr (stub_sec->name, STUB_SUFFIX))
6869 continue;
6870
6871 stub_sec->size = 0;
6872 }
6873
6874 /* Add new SG veneers after those already in the input import
6875 library. */
6876 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6877 stub_type++)
6878 {
6879 bfd_vma *start_offset_p;
6880 asection **stub_sec_p;
6881
6882 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
6883 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6884 if (start_offset_p == NULL)
6885 continue;
6886
6887 BFD_ASSERT (stub_sec_p != NULL);
6888 if (*stub_sec_p != NULL)
6889 (*stub_sec_p)->size = *start_offset_p;
6890 }
6891
6892 /* Compute stub section size, considering padding. */
6893 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
6894 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6895 stub_type++)
6896 {
6897 int size, padding;
6898 asection **stub_sec_p;
6899
6900 padding = arm_dedicated_stub_section_padding (stub_type);
6901 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6902 /* Skip if no stub input section or no stub section padding
6903 required. */
6904 if ((stub_sec_p != NULL && *stub_sec_p == NULL) || padding == 0)
6905 continue;
6906 /* Stub section padding required but no dedicated section. */
6907 BFD_ASSERT (stub_sec_p);
6908
6909 size = (*stub_sec_p)->size;
6910 size = (size + padding - 1) & ~(padding - 1);
6911 (*stub_sec_p)->size = size;
6912 }
6913
6914 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
6915 if (htab->fix_cortex_a8)
6916 for (i = 0; i < num_a8_fixes; i++)
6917 {
6918 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
6919 a8_fixes[i].section, htab, a8_fixes[i].stub_type);
6920
6921 if (stub_sec == NULL)
6922 return FALSE;
6923
6924 stub_sec->size
6925 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
6926 NULL);
6927 }
6928
6929
6930 /* Ask the linker to do its stuff. */
6931 (*htab->layout_sections_again) ();
6932 first_veneer_scan = FALSE;
6933 }
6934
6935 /* Add stubs for Cortex-A8 erratum fixes now. */
6936 if (htab->fix_cortex_a8)
6937 {
6938 for (i = 0; i < num_a8_fixes; i++)
6939 {
6940 struct elf32_arm_stub_hash_entry *stub_entry;
6941 char *stub_name = a8_fixes[i].stub_name;
6942 asection *section = a8_fixes[i].section;
6943 unsigned int section_id = a8_fixes[i].section->id;
6944 asection *link_sec = htab->stub_group[section_id].link_sec;
6945 asection *stub_sec = htab->stub_group[section_id].stub_sec;
6946 const insn_sequence *template_sequence;
6947 int template_size, size = 0;
6948
6949 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
6950 TRUE, FALSE);
6951 if (stub_entry == NULL)
6952 {
6953 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
6954 section->owner, stub_name);
6955 return FALSE;
6956 }
6957
6958 stub_entry->stub_sec = stub_sec;
6959 stub_entry->stub_offset = (bfd_vma) -1;
6960 stub_entry->id_sec = link_sec;
6961 stub_entry->stub_type = a8_fixes[i].stub_type;
6962 stub_entry->source_value = a8_fixes[i].offset;
6963 stub_entry->target_section = a8_fixes[i].section;
6964 stub_entry->target_value = a8_fixes[i].target_offset;
6965 stub_entry->orig_insn = a8_fixes[i].orig_insn;
6966 stub_entry->branch_type = a8_fixes[i].branch_type;
6967
6968 size = find_stub_size_and_template (a8_fixes[i].stub_type,
6969 &template_sequence,
6970 &template_size);
6971
6972 stub_entry->stub_size = size;
6973 stub_entry->stub_template = template_sequence;
6974 stub_entry->stub_template_size = template_size;
6975 }
6976
6977 /* Stash the Cortex-A8 erratum fix array for use later in
6978 elf32_arm_write_section(). */
6979 htab->a8_erratum_fixes = a8_fixes;
6980 htab->num_a8_erratum_fixes = num_a8_fixes;
6981 }
6982 else
6983 {
6984 htab->a8_erratum_fixes = NULL;
6985 htab->num_a8_erratum_fixes = 0;
6986 }
6987 return ret;
6988 }
6989
6990 /* Build all the stubs associated with the current output file. The
6991 stubs are kept in a hash table attached to the main linker hash
6992 table. We also set up the .plt entries for statically linked PIC
6993 functions here. This function is called via arm_elf_finish in the
6994 linker. */
6995
6996 bfd_boolean
6997 elf32_arm_build_stubs (struct bfd_link_info *info)
6998 {
6999 asection *stub_sec;
7000 struct bfd_hash_table *table;
7001 enum elf32_arm_stub_type stub_type;
7002 struct elf32_arm_link_hash_table *htab;
7003
7004 htab = elf32_arm_hash_table (info);
7005 if (htab == NULL)
7006 return FALSE;
7007
7008 for (stub_sec = htab->stub_bfd->sections;
7009 stub_sec != NULL;
7010 stub_sec = stub_sec->next)
7011 {
7012 bfd_size_type size;
7013
7014 /* Ignore non-stub sections. */
7015 if (!strstr (stub_sec->name, STUB_SUFFIX))
7016 continue;
7017
7018 /* Allocate memory to hold the linker stubs. Zeroing the stub sections
7019 must at least be done for stub section requiring padding and for SG
7020 veneers to ensure that a non secure code branching to a removed SG
7021 veneer causes an error. */
7022 size = stub_sec->size;
7023 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
7024 if (stub_sec->contents == NULL && size != 0)
7025 return FALSE;
7026
7027 stub_sec->size = 0;
7028 }
7029
7030 /* Add new SG veneers after those already in the input import library. */
7031 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
7032 {
7033 bfd_vma *start_offset_p;
7034 asection **stub_sec_p;
7035
7036 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
7037 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
7038 if (start_offset_p == NULL)
7039 continue;
7040
7041 BFD_ASSERT (stub_sec_p != NULL);
7042 if (*stub_sec_p != NULL)
7043 (*stub_sec_p)->size = *start_offset_p;
7044 }
7045
7046 /* Build the stubs as directed by the stub hash table. */
7047 table = &htab->stub_hash_table;
7048 bfd_hash_traverse (table, arm_build_one_stub, info);
7049 if (htab->fix_cortex_a8)
7050 {
7051 /* Place the cortex a8 stubs last. */
7052 htab->fix_cortex_a8 = -1;
7053 bfd_hash_traverse (table, arm_build_one_stub, info);
7054 }
7055
7056 return TRUE;
7057 }
7058
7059 /* Locate the Thumb encoded calling stub for NAME. */
7060
7061 static struct elf_link_hash_entry *
7062 find_thumb_glue (struct bfd_link_info *link_info,
7063 const char *name,
7064 char **error_message)
7065 {
7066 char *tmp_name;
7067 struct elf_link_hash_entry *hash;
7068 struct elf32_arm_link_hash_table *hash_table;
7069
7070 /* We need a pointer to the armelf specific hash table. */
7071 hash_table = elf32_arm_hash_table (link_info);
7072 if (hash_table == NULL)
7073 return NULL;
7074
7075 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
7076 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
7077
7078 BFD_ASSERT (tmp_name);
7079
7080 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
7081
7082 hash = elf_link_hash_lookup
7083 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
7084
7085 if (hash == NULL
7086 && asprintf (error_message, _("unable to find %s glue '%s' for '%s'"),
7087 "Thumb", tmp_name, name) == -1)
7088 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
7089
7090 free (tmp_name);
7091
7092 return hash;
7093 }
7094
7095 /* Locate the ARM encoded calling stub for NAME. */
7096
7097 static struct elf_link_hash_entry *
7098 find_arm_glue (struct bfd_link_info *link_info,
7099 const char *name,
7100 char **error_message)
7101 {
7102 char *tmp_name;
7103 struct elf_link_hash_entry *myh;
7104 struct elf32_arm_link_hash_table *hash_table;
7105
7106 /* We need a pointer to the elfarm specific hash table. */
7107 hash_table = elf32_arm_hash_table (link_info);
7108 if (hash_table == NULL)
7109 return NULL;
7110
7111 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
7112 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
7113 BFD_ASSERT (tmp_name);
7114
7115 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
7116
7117 myh = elf_link_hash_lookup
7118 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
7119
7120 if (myh == NULL
7121 && asprintf (error_message, _("unable to find %s glue '%s' for '%s'"),
7122 "ARM", tmp_name, name) == -1)
7123 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
7124
7125 free (tmp_name);
7126
7127 return myh;
7128 }
7129
7130 /* ARM->Thumb glue (static images):
7131
7132 .arm
7133 __func_from_arm:
7134 ldr r12, __func_addr
7135 bx r12
7136 __func_addr:
7137 .word func @ behave as if you saw a ARM_32 reloc.
7138
7139 (v5t static images)
7140 .arm
7141 __func_from_arm:
7142 ldr pc, __func_addr
7143 __func_addr:
7144 .word func @ behave as if you saw a ARM_32 reloc.
7145
7146 (relocatable images)
7147 .arm
7148 __func_from_arm:
7149 ldr r12, __func_offset
7150 add r12, r12, pc
7151 bx r12
7152 __func_offset:
7153 .word func - . */
7154
7155 #define ARM2THUMB_STATIC_GLUE_SIZE 12
7156 static const insn32 a2t1_ldr_insn = 0xe59fc000;
7157 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
7158 static const insn32 a2t3_func_addr_insn = 0x00000001;
7159
7160 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
7161 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
7162 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
7163
7164 #define ARM2THUMB_PIC_GLUE_SIZE 16
7165 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
7166 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
7167 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
7168
7169 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
7170
7171 .thumb .thumb
7172 .align 2 .align 2
7173 __func_from_thumb: __func_from_thumb:
7174 bx pc push {r6, lr}
7175 nop ldr r6, __func_addr
7176 .arm mov lr, pc
7177 b func bx r6
7178 .arm
7179 ;; back_to_thumb
7180 ldmia r13! {r6, lr}
7181 bx lr
7182 __func_addr:
7183 .word func */
7184
7185 #define THUMB2ARM_GLUE_SIZE 8
7186 static const insn16 t2a1_bx_pc_insn = 0x4778;
7187 static const insn16 t2a2_noop_insn = 0x46c0;
7188 static const insn32 t2a3_b_insn = 0xea000000;
7189
7190 #define VFP11_ERRATUM_VENEER_SIZE 8
7191 #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16
7192 #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24
7193
7194 #define ARM_BX_VENEER_SIZE 12
7195 static const insn32 armbx1_tst_insn = 0xe3100001;
7196 static const insn32 armbx2_moveq_insn = 0x01a0f000;
7197 static const insn32 armbx3_bx_insn = 0xe12fff10;
7198
7199 #ifndef ELFARM_NABI_C_INCLUDED
7200 static void
7201 arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
7202 {
7203 asection * s;
7204 bfd_byte * contents;
7205
7206 if (size == 0)
7207 {
7208 /* Do not include empty glue sections in the output. */
7209 if (abfd != NULL)
7210 {
7211 s = bfd_get_linker_section (abfd, name);
7212 if (s != NULL)
7213 s->flags |= SEC_EXCLUDE;
7214 }
7215 return;
7216 }
7217
7218 BFD_ASSERT (abfd != NULL);
7219
7220 s = bfd_get_linker_section (abfd, name);
7221 BFD_ASSERT (s != NULL);
7222
7223 contents = (bfd_byte *) bfd_zalloc (abfd, size);
7224
7225 BFD_ASSERT (s->size == size);
7226 s->contents = contents;
7227 }
7228
7229 bfd_boolean
7230 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
7231 {
7232 struct elf32_arm_link_hash_table * globals;
7233
7234 globals = elf32_arm_hash_table (info);
7235 BFD_ASSERT (globals != NULL);
7236
7237 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7238 globals->arm_glue_size,
7239 ARM2THUMB_GLUE_SECTION_NAME);
7240
7241 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7242 globals->thumb_glue_size,
7243 THUMB2ARM_GLUE_SECTION_NAME);
7244
7245 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7246 globals->vfp11_erratum_glue_size,
7247 VFP11_ERRATUM_VENEER_SECTION_NAME);
7248
7249 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7250 globals->stm32l4xx_erratum_glue_size,
7251 STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7252
7253 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7254 globals->bx_glue_size,
7255 ARM_BX_GLUE_SECTION_NAME);
7256
7257 return TRUE;
7258 }
7259
7260 /* Allocate space and symbols for calling a Thumb function from Arm mode.
7261 returns the symbol identifying the stub. */
7262
7263 static struct elf_link_hash_entry *
7264 record_arm_to_thumb_glue (struct bfd_link_info * link_info,
7265 struct elf_link_hash_entry * h)
7266 {
7267 const char * name = h->root.root.string;
7268 asection * s;
7269 char * tmp_name;
7270 struct elf_link_hash_entry * myh;
7271 struct bfd_link_hash_entry * bh;
7272 struct elf32_arm_link_hash_table * globals;
7273 bfd_vma val;
7274 bfd_size_type size;
7275
7276 globals = elf32_arm_hash_table (link_info);
7277 BFD_ASSERT (globals != NULL);
7278 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7279
7280 s = bfd_get_linker_section
7281 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
7282
7283 BFD_ASSERT (s != NULL);
7284
7285 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
7286 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
7287 BFD_ASSERT (tmp_name);
7288
7289 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
7290
7291 myh = elf_link_hash_lookup
7292 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
7293
7294 if (myh != NULL)
7295 {
7296 /* We've already seen this guy. */
7297 free (tmp_name);
7298 return myh;
7299 }
7300
7301 /* The only trick here is using hash_table->arm_glue_size as the value.
7302 Even though the section isn't allocated yet, this is where we will be
7303 putting it. The +1 on the value marks that the stub has not been
7304 output yet - not that it is a Thumb function. */
7305 bh = NULL;
7306 val = globals->arm_glue_size + 1;
7307 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
7308 tmp_name, BSF_GLOBAL, s, val,
7309 NULL, TRUE, FALSE, &bh);
7310
7311 myh = (struct elf_link_hash_entry *) bh;
7312 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7313 myh->forced_local = 1;
7314
7315 free (tmp_name);
7316
7317 if (bfd_link_pic (link_info)
7318 || globals->root.is_relocatable_executable
7319 || globals->pic_veneer)
7320 size = ARM2THUMB_PIC_GLUE_SIZE;
7321 else if (globals->use_blx)
7322 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
7323 else
7324 size = ARM2THUMB_STATIC_GLUE_SIZE;
7325
7326 s->size += size;
7327 globals->arm_glue_size += size;
7328
7329 return myh;
7330 }
7331
7332 /* Allocate space for ARMv4 BX veneers. */
7333
7334 static void
7335 record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
7336 {
7337 asection * s;
7338 struct elf32_arm_link_hash_table *globals;
7339 char *tmp_name;
7340 struct elf_link_hash_entry *myh;
7341 struct bfd_link_hash_entry *bh;
7342 bfd_vma val;
7343
7344 /* BX PC does not need a veneer. */
7345 if (reg == 15)
7346 return;
7347
7348 globals = elf32_arm_hash_table (link_info);
7349 BFD_ASSERT (globals != NULL);
7350 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7351
7352 /* Check if this veneer has already been allocated. */
7353 if (globals->bx_glue_offset[reg])
7354 return;
7355
7356 s = bfd_get_linker_section
7357 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
7358
7359 BFD_ASSERT (s != NULL);
7360
7361 /* Add symbol for veneer. */
7362 tmp_name = (char *)
7363 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
7364 BFD_ASSERT (tmp_name);
7365
7366 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
7367
7368 myh = elf_link_hash_lookup
7369 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
7370
7371 BFD_ASSERT (myh == NULL);
7372
7373 bh = NULL;
7374 val = globals->bx_glue_size;
7375 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
7376 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7377 NULL, TRUE, FALSE, &bh);
7378
7379 myh = (struct elf_link_hash_entry *) bh;
7380 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7381 myh->forced_local = 1;
7382
7383 s->size += ARM_BX_VENEER_SIZE;
7384 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
7385 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
7386 }
7387
7388
7389 /* Add an entry to the code/data map for section SEC. */
7390
7391 static void
7392 elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
7393 {
7394 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
7395 unsigned int newidx;
7396
7397 if (sec_data->map == NULL)
7398 {
7399 sec_data->map = (elf32_arm_section_map *)
7400 bfd_malloc (sizeof (elf32_arm_section_map));
7401 sec_data->mapcount = 0;
7402 sec_data->mapsize = 1;
7403 }
7404
7405 newidx = sec_data->mapcount++;
7406
7407 if (sec_data->mapcount > sec_data->mapsize)
7408 {
7409 sec_data->mapsize *= 2;
7410 sec_data->map = (elf32_arm_section_map *)
7411 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
7412 * sizeof (elf32_arm_section_map));
7413 }
7414
7415 if (sec_data->map)
7416 {
7417 sec_data->map[newidx].vma = vma;
7418 sec_data->map[newidx].type = type;
7419 }
7420 }
7421
7422
7423 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
7424 veneers are handled for now. */
7425
7426 static bfd_vma
7427 record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
7428 elf32_vfp11_erratum_list *branch,
7429 bfd *branch_bfd,
7430 asection *branch_sec,
7431 unsigned int offset)
7432 {
7433 asection *s;
7434 struct elf32_arm_link_hash_table *hash_table;
7435 char *tmp_name;
7436 struct elf_link_hash_entry *myh;
7437 struct bfd_link_hash_entry *bh;
7438 bfd_vma val;
7439 struct _arm_elf_section_data *sec_data;
7440 elf32_vfp11_erratum_list *newerr;
7441
7442 hash_table = elf32_arm_hash_table (link_info);
7443 BFD_ASSERT (hash_table != NULL);
7444 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7445
7446 s = bfd_get_linker_section
7447 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
7448
7449 sec_data = elf32_arm_section_data (s);
7450
7451 BFD_ASSERT (s != NULL);
7452
7453 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7454 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
7455 BFD_ASSERT (tmp_name);
7456
7457 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
7458 hash_table->num_vfp11_fixes);
7459
7460 myh = elf_link_hash_lookup
7461 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7462
7463 BFD_ASSERT (myh == NULL);
7464
7465 bh = NULL;
7466 val = hash_table->vfp11_erratum_glue_size;
7467 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7468 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7469 NULL, TRUE, FALSE, &bh);
7470
7471 myh = (struct elf_link_hash_entry *) bh;
7472 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7473 myh->forced_local = 1;
7474
7475 /* Link veneer back to calling location. */
7476 sec_data->erratumcount += 1;
7477 newerr = (elf32_vfp11_erratum_list *)
7478 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
7479
7480 newerr->type = VFP11_ERRATUM_ARM_VENEER;
7481 newerr->vma = -1;
7482 newerr->u.v.branch = branch;
7483 newerr->u.v.id = hash_table->num_vfp11_fixes;
7484 branch->u.b.veneer = newerr;
7485
7486 newerr->next = sec_data->erratumlist;
7487 sec_data->erratumlist = newerr;
7488
7489 /* A symbol for the return from the veneer. */
7490 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
7491 hash_table->num_vfp11_fixes);
7492
7493 myh = elf_link_hash_lookup
7494 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7495
7496 if (myh != NULL)
7497 abort ();
7498
7499 bh = NULL;
7500 val = offset + 4;
7501 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7502 branch_sec, val, NULL, TRUE, FALSE, &bh);
7503
7504 myh = (struct elf_link_hash_entry *) bh;
7505 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7506 myh->forced_local = 1;
7507
7508 free (tmp_name);
7509
7510 /* Generate a mapping symbol for the veneer section, and explicitly add an
7511 entry for that symbol to the code/data map for the section. */
7512 if (hash_table->vfp11_erratum_glue_size == 0)
7513 {
7514 bh = NULL;
7515 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
7516 ever requires this erratum fix. */
7517 _bfd_generic_link_add_one_symbol (link_info,
7518 hash_table->bfd_of_glue_owner, "$a",
7519 BSF_LOCAL, s, 0, NULL,
7520 TRUE, FALSE, &bh);
7521
7522 myh = (struct elf_link_hash_entry *) bh;
7523 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7524 myh->forced_local = 1;
7525
7526 /* The elf32_arm_init_maps function only cares about symbols from input
7527 BFDs. We must make a note of this generated mapping symbol
7528 ourselves so that code byteswapping works properly in
7529 elf32_arm_write_section. */
7530 elf32_arm_section_map_add (s, 'a', 0);
7531 }
7532
7533 s->size += VFP11_ERRATUM_VENEER_SIZE;
7534 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
7535 hash_table->num_vfp11_fixes++;
7536
7537 /* The offset of the veneer. */
7538 return val;
7539 }
7540
7541 /* Record information about a STM32L4XX STM erratum veneer. Only THUMB-mode
7542 veneers need to be handled because used only in Cortex-M. */
7543
7544 static bfd_vma
7545 record_stm32l4xx_erratum_veneer (struct bfd_link_info *link_info,
7546 elf32_stm32l4xx_erratum_list *branch,
7547 bfd *branch_bfd,
7548 asection *branch_sec,
7549 unsigned int offset,
7550 bfd_size_type veneer_size)
7551 {
7552 asection *s;
7553 struct elf32_arm_link_hash_table *hash_table;
7554 char *tmp_name;
7555 struct elf_link_hash_entry *myh;
7556 struct bfd_link_hash_entry *bh;
7557 bfd_vma val;
7558 struct _arm_elf_section_data *sec_data;
7559 elf32_stm32l4xx_erratum_list *newerr;
7560
7561 hash_table = elf32_arm_hash_table (link_info);
7562 BFD_ASSERT (hash_table != NULL);
7563 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7564
7565 s = bfd_get_linker_section
7566 (hash_table->bfd_of_glue_owner, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7567
7568 BFD_ASSERT (s != NULL);
7569
7570 sec_data = elf32_arm_section_data (s);
7571
7572 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7573 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
7574 BFD_ASSERT (tmp_name);
7575
7576 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
7577 hash_table->num_stm32l4xx_fixes);
7578
7579 myh = elf_link_hash_lookup
7580 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7581
7582 BFD_ASSERT (myh == NULL);
7583
7584 bh = NULL;
7585 val = hash_table->stm32l4xx_erratum_glue_size;
7586 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7587 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7588 NULL, TRUE, FALSE, &bh);
7589
7590 myh = (struct elf_link_hash_entry *) bh;
7591 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7592 myh->forced_local = 1;
7593
7594 /* Link veneer back to calling location. */
7595 sec_data->stm32l4xx_erratumcount += 1;
7596 newerr = (elf32_stm32l4xx_erratum_list *)
7597 bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list));
7598
7599 newerr->type = STM32L4XX_ERRATUM_VENEER;
7600 newerr->vma = -1;
7601 newerr->u.v.branch = branch;
7602 newerr->u.v.id = hash_table->num_stm32l4xx_fixes;
7603 branch->u.b.veneer = newerr;
7604
7605 newerr->next = sec_data->stm32l4xx_erratumlist;
7606 sec_data->stm32l4xx_erratumlist = newerr;
7607
7608 /* A symbol for the return from the veneer. */
7609 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
7610 hash_table->num_stm32l4xx_fixes);
7611
7612 myh = elf_link_hash_lookup
7613 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7614
7615 if (myh != NULL)
7616 abort ();
7617
7618 bh = NULL;
7619 val = offset + 4;
7620 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7621 branch_sec, val, NULL, TRUE, FALSE, &bh);
7622
7623 myh = (struct elf_link_hash_entry *) bh;
7624 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7625 myh->forced_local = 1;
7626
7627 free (tmp_name);
7628
7629 /* Generate a mapping symbol for the veneer section, and explicitly add an
7630 entry for that symbol to the code/data map for the section. */
7631 if (hash_table->stm32l4xx_erratum_glue_size == 0)
7632 {
7633 bh = NULL;
7634 /* Creates a THUMB symbol since there is no other choice. */
7635 _bfd_generic_link_add_one_symbol (link_info,
7636 hash_table->bfd_of_glue_owner, "$t",
7637 BSF_LOCAL, s, 0, NULL,
7638 TRUE, FALSE, &bh);
7639
7640 myh = (struct elf_link_hash_entry *) bh;
7641 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7642 myh->forced_local = 1;
7643
7644 /* The elf32_arm_init_maps function only cares about symbols from input
7645 BFDs. We must make a note of this generated mapping symbol
7646 ourselves so that code byteswapping works properly in
7647 elf32_arm_write_section. */
7648 elf32_arm_section_map_add (s, 't', 0);
7649 }
7650
7651 s->size += veneer_size;
7652 hash_table->stm32l4xx_erratum_glue_size += veneer_size;
7653 hash_table->num_stm32l4xx_fixes++;
7654
7655 /* The offset of the veneer. */
7656 return val;
7657 }
7658
7659 #define ARM_GLUE_SECTION_FLAGS \
7660 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
7661 | SEC_READONLY | SEC_LINKER_CREATED)
7662
7663 /* Create a fake section for use by the ARM backend of the linker. */
7664
7665 static bfd_boolean
7666 arm_make_glue_section (bfd * abfd, const char * name)
7667 {
7668 asection * sec;
7669
7670 sec = bfd_get_linker_section (abfd, name);
7671 if (sec != NULL)
7672 /* Already made. */
7673 return TRUE;
7674
7675 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
7676
7677 if (sec == NULL
7678 || !bfd_set_section_alignment (sec, 2))
7679 return FALSE;
7680
7681 /* Set the gc mark to prevent the section from being removed by garbage
7682 collection, despite the fact that no relocs refer to this section. */
7683 sec->gc_mark = 1;
7684
7685 return TRUE;
7686 }
7687
7688 /* Set size of .plt entries. This function is called from the
7689 linker scripts in ld/emultempl/{armelf}.em. */
7690
7691 void
7692 bfd_elf32_arm_use_long_plt (void)
7693 {
7694 elf32_arm_use_long_plt_entry = TRUE;
7695 }
7696
7697 /* Add the glue sections to ABFD. This function is called from the
7698 linker scripts in ld/emultempl/{armelf}.em. */
7699
7700 bfd_boolean
7701 bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
7702 struct bfd_link_info *info)
7703 {
7704 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
7705 bfd_boolean dostm32l4xx = globals
7706 && globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE;
7707 bfd_boolean addglue;
7708
7709 /* If we are only performing a partial
7710 link do not bother adding the glue. */
7711 if (bfd_link_relocatable (info))
7712 return TRUE;
7713
7714 addglue = arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
7715 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
7716 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
7717 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
7718
7719 if (!dostm32l4xx)
7720 return addglue;
7721
7722 return addglue
7723 && arm_make_glue_section (abfd, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7724 }
7725
7726 /* Mark output sections of veneers needing a dedicated one with SEC_KEEP. This
7727 ensures they are not marked for deletion by
7728 strip_excluded_output_sections () when veneers are going to be created
7729 later. Not doing so would trigger assert on empty section size in
7730 lang_size_sections_1 (). */
7731
7732 void
7733 bfd_elf32_arm_keep_private_stub_output_sections (struct bfd_link_info *info)
7734 {
7735 enum elf32_arm_stub_type stub_type;
7736
7737 /* If we are only performing a partial
7738 link do not bother adding the glue. */
7739 if (bfd_link_relocatable (info))
7740 return;
7741
7742 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
7743 {
7744 asection *out_sec;
7745 const char *out_sec_name;
7746
7747 if (!arm_dedicated_stub_output_section_required (stub_type))
7748 continue;
7749
7750 out_sec_name = arm_dedicated_stub_output_section_name (stub_type);
7751 out_sec = bfd_get_section_by_name (info->output_bfd, out_sec_name);
7752 if (out_sec != NULL)
7753 out_sec->flags |= SEC_KEEP;
7754 }
7755 }
7756
7757 /* Select a BFD to be used to hold the sections used by the glue code.
7758 This function is called from the linker scripts in ld/emultempl/
7759 {armelf/pe}.em. */
7760
7761 bfd_boolean
7762 bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
7763 {
7764 struct elf32_arm_link_hash_table *globals;
7765
7766 /* If we are only performing a partial link
7767 do not bother getting a bfd to hold the glue. */
7768 if (bfd_link_relocatable (info))
7769 return TRUE;
7770
7771 /* Make sure we don't attach the glue sections to a dynamic object. */
7772 BFD_ASSERT (!(abfd->flags & DYNAMIC));
7773
7774 globals = elf32_arm_hash_table (info);
7775 BFD_ASSERT (globals != NULL);
7776
7777 if (globals->bfd_of_glue_owner != NULL)
7778 return TRUE;
7779
7780 /* Save the bfd for later use. */
7781 globals->bfd_of_glue_owner = abfd;
7782
7783 return TRUE;
7784 }
7785
7786 static void
7787 check_use_blx (struct elf32_arm_link_hash_table *globals)
7788 {
7789 int cpu_arch;
7790
7791 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
7792 Tag_CPU_arch);
7793
7794 if (globals->fix_arm1176)
7795 {
7796 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
7797 globals->use_blx = 1;
7798 }
7799 else
7800 {
7801 if (cpu_arch > TAG_CPU_ARCH_V4T)
7802 globals->use_blx = 1;
7803 }
7804 }
7805
7806 bfd_boolean
7807 bfd_elf32_arm_process_before_allocation (bfd *abfd,
7808 struct bfd_link_info *link_info)
7809 {
7810 Elf_Internal_Shdr *symtab_hdr;
7811 Elf_Internal_Rela *internal_relocs = NULL;
7812 Elf_Internal_Rela *irel, *irelend;
7813 bfd_byte *contents = NULL;
7814
7815 asection *sec;
7816 struct elf32_arm_link_hash_table *globals;
7817
7818 /* If we are only performing a partial link do not bother
7819 to construct any glue. */
7820 if (bfd_link_relocatable (link_info))
7821 return TRUE;
7822
7823 /* Here we have a bfd that is to be included on the link. We have a
7824 hook to do reloc rummaging, before section sizes are nailed down. */
7825 globals = elf32_arm_hash_table (link_info);
7826 BFD_ASSERT (globals != NULL);
7827
7828 check_use_blx (globals);
7829
7830 if (globals->byteswap_code && !bfd_big_endian (abfd))
7831 {
7832 _bfd_error_handler (_("%pB: BE8 images only valid in big-endian mode"),
7833 abfd);
7834 return FALSE;
7835 }
7836
7837 /* PR 5398: If we have not decided to include any loadable sections in
7838 the output then we will not have a glue owner bfd. This is OK, it
7839 just means that there is nothing else for us to do here. */
7840 if (globals->bfd_of_glue_owner == NULL)
7841 return TRUE;
7842
7843 /* Rummage around all the relocs and map the glue vectors. */
7844 sec = abfd->sections;
7845
7846 if (sec == NULL)
7847 return TRUE;
7848
7849 for (; sec != NULL; sec = sec->next)
7850 {
7851 if (sec->reloc_count == 0)
7852 continue;
7853
7854 if ((sec->flags & SEC_EXCLUDE) != 0)
7855 continue;
7856
7857 symtab_hdr = & elf_symtab_hdr (abfd);
7858
7859 /* Load the relocs. */
7860 internal_relocs
7861 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
7862
7863 if (internal_relocs == NULL)
7864 goto error_return;
7865
7866 irelend = internal_relocs + sec->reloc_count;
7867 for (irel = internal_relocs; irel < irelend; irel++)
7868 {
7869 long r_type;
7870 unsigned long r_index;
7871
7872 struct elf_link_hash_entry *h;
7873
7874 r_type = ELF32_R_TYPE (irel->r_info);
7875 r_index = ELF32_R_SYM (irel->r_info);
7876
7877 /* These are the only relocation types we care about. */
7878 if ( r_type != R_ARM_PC24
7879 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
7880 continue;
7881
7882 /* Get the section contents if we haven't done so already. */
7883 if (contents == NULL)
7884 {
7885 /* Get cached copy if it exists. */
7886 if (elf_section_data (sec)->this_hdr.contents != NULL)
7887 contents = elf_section_data (sec)->this_hdr.contents;
7888 else
7889 {
7890 /* Go get them off disk. */
7891 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
7892 goto error_return;
7893 }
7894 }
7895
7896 if (r_type == R_ARM_V4BX)
7897 {
7898 int reg;
7899
7900 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
7901 record_arm_bx_glue (link_info, reg);
7902 continue;
7903 }
7904
7905 /* If the relocation is not against a symbol it cannot concern us. */
7906 h = NULL;
7907
7908 /* We don't care about local symbols. */
7909 if (r_index < symtab_hdr->sh_info)
7910 continue;
7911
7912 /* This is an external symbol. */
7913 r_index -= symtab_hdr->sh_info;
7914 h = (struct elf_link_hash_entry *)
7915 elf_sym_hashes (abfd)[r_index];
7916
7917 /* If the relocation is against a static symbol it must be within
7918 the current section and so cannot be a cross ARM/Thumb relocation. */
7919 if (h == NULL)
7920 continue;
7921
7922 /* If the call will go through a PLT entry then we do not need
7923 glue. */
7924 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
7925 continue;
7926
7927 switch (r_type)
7928 {
7929 case R_ARM_PC24:
7930 /* This one is a call from arm code. We need to look up
7931 the target of the call. If it is a thumb target, we
7932 insert glue. */
7933 if (ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
7934 == ST_BRANCH_TO_THUMB)
7935 record_arm_to_thumb_glue (link_info, h);
7936 break;
7937
7938 default:
7939 abort ();
7940 }
7941 }
7942
7943 if (elf_section_data (sec)->this_hdr.contents != contents)
7944 free (contents);
7945 contents = NULL;
7946
7947 if (elf_section_data (sec)->relocs != internal_relocs)
7948 free (internal_relocs);
7949 internal_relocs = NULL;
7950 }
7951
7952 return TRUE;
7953
7954 error_return:
7955 if (elf_section_data (sec)->this_hdr.contents != contents)
7956 free (contents);
7957 if (elf_section_data (sec)->relocs != internal_relocs)
7958 free (internal_relocs);
7959
7960 return FALSE;
7961 }
7962 #endif
7963
7964
7965 /* Initialise maps of ARM/Thumb/data for input BFDs. */
7966
7967 void
7968 bfd_elf32_arm_init_maps (bfd *abfd)
7969 {
7970 Elf_Internal_Sym *isymbuf;
7971 Elf_Internal_Shdr *hdr;
7972 unsigned int i, localsyms;
7973
7974 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
7975 if (! is_arm_elf (abfd))
7976 return;
7977
7978 if ((abfd->flags & DYNAMIC) != 0)
7979 return;
7980
7981 hdr = & elf_symtab_hdr (abfd);
7982 localsyms = hdr->sh_info;
7983
7984 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
7985 should contain the number of local symbols, which should come before any
7986 global symbols. Mapping symbols are always local. */
7987 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
7988 NULL);
7989
7990 /* No internal symbols read? Skip this BFD. */
7991 if (isymbuf == NULL)
7992 return;
7993
7994 for (i = 0; i < localsyms; i++)
7995 {
7996 Elf_Internal_Sym *isym = &isymbuf[i];
7997 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
7998 const char *name;
7999
8000 if (sec != NULL
8001 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
8002 {
8003 name = bfd_elf_string_from_elf_section (abfd,
8004 hdr->sh_link, isym->st_name);
8005
8006 if (bfd_is_arm_special_symbol_name (name,
8007 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
8008 elf32_arm_section_map_add (sec, name[1], isym->st_value);
8009 }
8010 }
8011 }
8012
8013
8014 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
8015 say what they wanted. */
8016
8017 void
8018 bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
8019 {
8020 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8021 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
8022
8023 if (globals == NULL)
8024 return;
8025
8026 if (globals->fix_cortex_a8 == -1)
8027 {
8028 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
8029 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
8030 && (out_attr[Tag_CPU_arch_profile].i == 'A'
8031 || out_attr[Tag_CPU_arch_profile].i == 0))
8032 globals->fix_cortex_a8 = 1;
8033 else
8034 globals->fix_cortex_a8 = 0;
8035 }
8036 }
8037
8038
8039 void
8040 bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
8041 {
8042 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8043 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
8044
8045 if (globals == NULL)
8046 return;
8047 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
8048 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
8049 {
8050 switch (globals->vfp11_fix)
8051 {
8052 case BFD_ARM_VFP11_FIX_DEFAULT:
8053 case BFD_ARM_VFP11_FIX_NONE:
8054 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
8055 break;
8056
8057 default:
8058 /* Give a warning, but do as the user requests anyway. */
8059 _bfd_error_handler (_("%pB: warning: selected VFP11 erratum "
8060 "workaround is not necessary for target architecture"), obfd);
8061 }
8062 }
8063 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
8064 /* For earlier architectures, we might need the workaround, but do not
8065 enable it by default. If users is running with broken hardware, they
8066 must enable the erratum fix explicitly. */
8067 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
8068 }
8069
8070 void
8071 bfd_elf32_arm_set_stm32l4xx_fix (bfd *obfd, struct bfd_link_info *link_info)
8072 {
8073 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8074 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
8075
8076 if (globals == NULL)
8077 return;
8078
8079 /* We assume only Cortex-M4 may require the fix. */
8080 if (out_attr[Tag_CPU_arch].i != TAG_CPU_ARCH_V7E_M
8081 || out_attr[Tag_CPU_arch_profile].i != 'M')
8082 {
8083 if (globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE)
8084 /* Give a warning, but do as the user requests anyway. */
8085 _bfd_error_handler
8086 (_("%pB: warning: selected STM32L4XX erratum "
8087 "workaround is not necessary for target architecture"), obfd);
8088 }
8089 }
8090
8091 enum bfd_arm_vfp11_pipe
8092 {
8093 VFP11_FMAC,
8094 VFP11_LS,
8095 VFP11_DS,
8096 VFP11_BAD
8097 };
8098
8099 /* Return a VFP register number. This is encoded as RX:X for single-precision
8100 registers, or X:RX for double-precision registers, where RX is the group of
8101 four bits in the instruction encoding and X is the single extension bit.
8102 RX and X fields are specified using their lowest (starting) bit. The return
8103 value is:
8104
8105 0...31: single-precision registers s0...s31
8106 32...63: double-precision registers d0...d31.
8107
8108 Although X should be zero for VFP11 (encoding d0...d15 only), we might
8109 encounter VFP3 instructions, so we allow the full range for DP registers. */
8110
8111 static unsigned int
8112 bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
8113 unsigned int x)
8114 {
8115 if (is_double)
8116 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
8117 else
8118 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
8119 }
8120
8121 /* Set bits in *WMASK according to a register number REG as encoded by
8122 bfd_arm_vfp11_regno(). Ignore d16-d31. */
8123
8124 static void
8125 bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
8126 {
8127 if (reg < 32)
8128 *wmask |= 1 << reg;
8129 else if (reg < 48)
8130 *wmask |= 3 << ((reg - 32) * 2);
8131 }
8132
8133 /* Return TRUE if WMASK overwrites anything in REGS. */
8134
8135 static bfd_boolean
8136 bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
8137 {
8138 int i;
8139
8140 for (i = 0; i < numregs; i++)
8141 {
8142 unsigned int reg = regs[i];
8143
8144 if (reg < 32 && (wmask & (1 << reg)) != 0)
8145 return TRUE;
8146
8147 reg -= 32;
8148
8149 if (reg >= 16)
8150 continue;
8151
8152 if ((wmask & (3 << (reg * 2))) != 0)
8153 return TRUE;
8154 }
8155
8156 return FALSE;
8157 }
8158
8159 /* In this function, we're interested in two things: finding input registers
8160 for VFP data-processing instructions, and finding the set of registers which
8161 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
8162 hold the written set, so FLDM etc. are easy to deal with (we're only
8163 interested in 32 SP registers or 16 dp registers, due to the VFP version
8164 implemented by the chip in question). DP registers are marked by setting
8165 both SP registers in the write mask). */
8166
8167 static enum bfd_arm_vfp11_pipe
8168 bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
8169 int *numregs)
8170 {
8171 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
8172 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
8173
8174 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
8175 {
8176 unsigned int pqrs;
8177 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
8178 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
8179
8180 pqrs = ((insn & 0x00800000) >> 20)
8181 | ((insn & 0x00300000) >> 19)
8182 | ((insn & 0x00000040) >> 6);
8183
8184 switch (pqrs)
8185 {
8186 case 0: /* fmac[sd]. */
8187 case 1: /* fnmac[sd]. */
8188 case 2: /* fmsc[sd]. */
8189 case 3: /* fnmsc[sd]. */
8190 vpipe = VFP11_FMAC;
8191 bfd_arm_vfp11_write_mask (destmask, fd);
8192 regs[0] = fd;
8193 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
8194 regs[2] = fm;
8195 *numregs = 3;
8196 break;
8197
8198 case 4: /* fmul[sd]. */
8199 case 5: /* fnmul[sd]. */
8200 case 6: /* fadd[sd]. */
8201 case 7: /* fsub[sd]. */
8202 vpipe = VFP11_FMAC;
8203 goto vfp_binop;
8204
8205 case 8: /* fdiv[sd]. */
8206 vpipe = VFP11_DS;
8207 vfp_binop:
8208 bfd_arm_vfp11_write_mask (destmask, fd);
8209 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
8210 regs[1] = fm;
8211 *numregs = 2;
8212 break;
8213
8214 case 15: /* extended opcode. */
8215 {
8216 unsigned int extn = ((insn >> 15) & 0x1e)
8217 | ((insn >> 7) & 1);
8218
8219 switch (extn)
8220 {
8221 case 0: /* fcpy[sd]. */
8222 case 1: /* fabs[sd]. */
8223 case 2: /* fneg[sd]. */
8224 case 8: /* fcmp[sd]. */
8225 case 9: /* fcmpe[sd]. */
8226 case 10: /* fcmpz[sd]. */
8227 case 11: /* fcmpez[sd]. */
8228 case 16: /* fuito[sd]. */
8229 case 17: /* fsito[sd]. */
8230 case 24: /* ftoui[sd]. */
8231 case 25: /* ftouiz[sd]. */
8232 case 26: /* ftosi[sd]. */
8233 case 27: /* ftosiz[sd]. */
8234 /* These instructions will not bounce due to underflow. */
8235 *numregs = 0;
8236 vpipe = VFP11_FMAC;
8237 break;
8238
8239 case 3: /* fsqrt[sd]. */
8240 /* fsqrt cannot underflow, but it can (perhaps) overwrite
8241 registers to cause the erratum in previous instructions. */
8242 bfd_arm_vfp11_write_mask (destmask, fd);
8243 vpipe = VFP11_DS;
8244 break;
8245
8246 case 15: /* fcvt{ds,sd}. */
8247 {
8248 int rnum = 0;
8249
8250 bfd_arm_vfp11_write_mask (destmask, fd);
8251
8252 /* Only FCVTSD can underflow. */
8253 if ((insn & 0x100) != 0)
8254 regs[rnum++] = fm;
8255
8256 *numregs = rnum;
8257
8258 vpipe = VFP11_FMAC;
8259 }
8260 break;
8261
8262 default:
8263 return VFP11_BAD;
8264 }
8265 }
8266 break;
8267
8268 default:
8269 return VFP11_BAD;
8270 }
8271 }
8272 /* Two-register transfer. */
8273 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
8274 {
8275 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
8276
8277 if ((insn & 0x100000) == 0)
8278 {
8279 if (is_double)
8280 bfd_arm_vfp11_write_mask (destmask, fm);
8281 else
8282 {
8283 bfd_arm_vfp11_write_mask (destmask, fm);
8284 bfd_arm_vfp11_write_mask (destmask, fm + 1);
8285 }
8286 }
8287
8288 vpipe = VFP11_LS;
8289 }
8290 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
8291 {
8292 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
8293 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
8294
8295 switch (puw)
8296 {
8297 case 0: /* Two-reg transfer. We should catch these above. */
8298 abort ();
8299
8300 case 2: /* fldm[sdx]. */
8301 case 3:
8302 case 5:
8303 {
8304 unsigned int i, offset = insn & 0xff;
8305
8306 if (is_double)
8307 offset >>= 1;
8308
8309 for (i = fd; i < fd + offset; i++)
8310 bfd_arm_vfp11_write_mask (destmask, i);
8311 }
8312 break;
8313
8314 case 4: /* fld[sd]. */
8315 case 6:
8316 bfd_arm_vfp11_write_mask (destmask, fd);
8317 break;
8318
8319 default:
8320 return VFP11_BAD;
8321 }
8322
8323 vpipe = VFP11_LS;
8324 }
8325 /* Single-register transfer. Note L==0. */
8326 else if ((insn & 0x0f100e10) == 0x0e000a10)
8327 {
8328 unsigned int opcode = (insn >> 21) & 7;
8329 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
8330
8331 switch (opcode)
8332 {
8333 case 0: /* fmsr/fmdlr. */
8334 case 1: /* fmdhr. */
8335 /* Mark fmdhr and fmdlr as writing to the whole of the DP
8336 destination register. I don't know if this is exactly right,
8337 but it is the conservative choice. */
8338 bfd_arm_vfp11_write_mask (destmask, fn);
8339 break;
8340
8341 case 7: /* fmxr. */
8342 break;
8343 }
8344
8345 vpipe = VFP11_LS;
8346 }
8347
8348 return vpipe;
8349 }
8350
8351
8352 static int elf32_arm_compare_mapping (const void * a, const void * b);
8353
8354
8355 /* Look for potentially-troublesome code sequences which might trigger the
8356 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
8357 (available from ARM) for details of the erratum. A short version is
8358 described in ld.texinfo. */
8359
8360 bfd_boolean
8361 bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
8362 {
8363 asection *sec;
8364 bfd_byte *contents = NULL;
8365 int state = 0;
8366 int regs[3], numregs = 0;
8367 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8368 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
8369
8370 if (globals == NULL)
8371 return FALSE;
8372
8373 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
8374 The states transition as follows:
8375
8376 0 -> 1 (vector) or 0 -> 2 (scalar)
8377 A VFP FMAC-pipeline instruction has been seen. Fill
8378 regs[0]..regs[numregs-1] with its input operands. Remember this
8379 instruction in 'first_fmac'.
8380
8381 1 -> 2
8382 Any instruction, except for a VFP instruction which overwrites
8383 regs[*].
8384
8385 1 -> 3 [ -> 0 ] or
8386 2 -> 3 [ -> 0 ]
8387 A VFP instruction has been seen which overwrites any of regs[*].
8388 We must make a veneer! Reset state to 0 before examining next
8389 instruction.
8390
8391 2 -> 0
8392 If we fail to match anything in state 2, reset to state 0 and reset
8393 the instruction pointer to the instruction after 'first_fmac'.
8394
8395 If the VFP11 vector mode is in use, there must be at least two unrelated
8396 instructions between anti-dependent VFP11 instructions to properly avoid
8397 triggering the erratum, hence the use of the extra state 1. */
8398
8399 /* If we are only performing a partial link do not bother
8400 to construct any glue. */
8401 if (bfd_link_relocatable (link_info))
8402 return TRUE;
8403
8404 /* Skip if this bfd does not correspond to an ELF image. */
8405 if (! is_arm_elf (abfd))
8406 return TRUE;
8407
8408 /* We should have chosen a fix type by the time we get here. */
8409 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
8410
8411 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
8412 return TRUE;
8413
8414 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8415 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8416 return TRUE;
8417
8418 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8419 {
8420 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
8421 struct _arm_elf_section_data *sec_data;
8422
8423 /* If we don't have executable progbits, we're not interested in this
8424 section. Also skip if section is to be excluded. */
8425 if (elf_section_type (sec) != SHT_PROGBITS
8426 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8427 || (sec->flags & SEC_EXCLUDE) != 0
8428 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8429 || sec->output_section == bfd_abs_section_ptr
8430 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
8431 continue;
8432
8433 sec_data = elf32_arm_section_data (sec);
8434
8435 if (sec_data->mapcount == 0)
8436 continue;
8437
8438 if (elf_section_data (sec)->this_hdr.contents != NULL)
8439 contents = elf_section_data (sec)->this_hdr.contents;
8440 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8441 goto error_return;
8442
8443 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8444 elf32_arm_compare_mapping);
8445
8446 for (span = 0; span < sec_data->mapcount; span++)
8447 {
8448 unsigned int span_start = sec_data->map[span].vma;
8449 unsigned int span_end = (span == sec_data->mapcount - 1)
8450 ? sec->size : sec_data->map[span + 1].vma;
8451 char span_type = sec_data->map[span].type;
8452
8453 /* FIXME: Only ARM mode is supported at present. We may need to
8454 support Thumb-2 mode also at some point. */
8455 if (span_type != 'a')
8456 continue;
8457
8458 for (i = span_start; i < span_end;)
8459 {
8460 unsigned int next_i = i + 4;
8461 unsigned int insn = bfd_big_endian (abfd)
8462 ? (((unsigned) contents[i] << 24)
8463 | (contents[i + 1] << 16)
8464 | (contents[i + 2] << 8)
8465 | contents[i + 3])
8466 : (((unsigned) contents[i + 3] << 24)
8467 | (contents[i + 2] << 16)
8468 | (contents[i + 1] << 8)
8469 | contents[i]);
8470 unsigned int writemask = 0;
8471 enum bfd_arm_vfp11_pipe vpipe;
8472
8473 switch (state)
8474 {
8475 case 0:
8476 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
8477 &numregs);
8478 /* I'm assuming the VFP11 erratum can trigger with denorm
8479 operands on either the FMAC or the DS pipeline. This might
8480 lead to slightly overenthusiastic veneer insertion. */
8481 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
8482 {
8483 state = use_vector ? 1 : 2;
8484 first_fmac = i;
8485 veneer_of_insn = insn;
8486 }
8487 break;
8488
8489 case 1:
8490 {
8491 int other_regs[3], other_numregs;
8492 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8493 other_regs,
8494 &other_numregs);
8495 if (vpipe != VFP11_BAD
8496 && bfd_arm_vfp11_antidependency (writemask, regs,
8497 numregs))
8498 state = 3;
8499 else
8500 state = 2;
8501 }
8502 break;
8503
8504 case 2:
8505 {
8506 int other_regs[3], other_numregs;
8507 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8508 other_regs,
8509 &other_numregs);
8510 if (vpipe != VFP11_BAD
8511 && bfd_arm_vfp11_antidependency (writemask, regs,
8512 numregs))
8513 state = 3;
8514 else
8515 {
8516 state = 0;
8517 next_i = first_fmac + 4;
8518 }
8519 }
8520 break;
8521
8522 case 3:
8523 abort (); /* Should be unreachable. */
8524 }
8525
8526 if (state == 3)
8527 {
8528 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
8529 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
8530
8531 elf32_arm_section_data (sec)->erratumcount += 1;
8532
8533 newerr->u.b.vfp_insn = veneer_of_insn;
8534
8535 switch (span_type)
8536 {
8537 case 'a':
8538 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
8539 break;
8540
8541 default:
8542 abort ();
8543 }
8544
8545 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
8546 first_fmac);
8547
8548 newerr->vma = -1;
8549
8550 newerr->next = sec_data->erratumlist;
8551 sec_data->erratumlist = newerr;
8552
8553 state = 0;
8554 }
8555
8556 i = next_i;
8557 }
8558 }
8559
8560 if (elf_section_data (sec)->this_hdr.contents != contents)
8561 free (contents);
8562 contents = NULL;
8563 }
8564
8565 return TRUE;
8566
8567 error_return:
8568 if (elf_section_data (sec)->this_hdr.contents != contents)
8569 free (contents);
8570
8571 return FALSE;
8572 }
8573
8574 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
8575 after sections have been laid out, using specially-named symbols. */
8576
8577 void
8578 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
8579 struct bfd_link_info *link_info)
8580 {
8581 asection *sec;
8582 struct elf32_arm_link_hash_table *globals;
8583 char *tmp_name;
8584
8585 if (bfd_link_relocatable (link_info))
8586 return;
8587
8588 /* Skip if this bfd does not correspond to an ELF image. */
8589 if (! is_arm_elf (abfd))
8590 return;
8591
8592 globals = elf32_arm_hash_table (link_info);
8593 if (globals == NULL)
8594 return;
8595
8596 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8597 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
8598 BFD_ASSERT (tmp_name);
8599
8600 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8601 {
8602 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8603 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
8604
8605 for (; errnode != NULL; errnode = errnode->next)
8606 {
8607 struct elf_link_hash_entry *myh;
8608 bfd_vma vma;
8609
8610 switch (errnode->type)
8611 {
8612 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
8613 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
8614 /* Find veneer symbol. */
8615 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
8616 errnode->u.b.veneer->u.v.id);
8617
8618 myh = elf_link_hash_lookup
8619 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8620
8621 if (myh == NULL)
8622 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8623 abfd, "VFP11", tmp_name);
8624
8625 vma = myh->root.u.def.section->output_section->vma
8626 + myh->root.u.def.section->output_offset
8627 + myh->root.u.def.value;
8628
8629 errnode->u.b.veneer->vma = vma;
8630 break;
8631
8632 case VFP11_ERRATUM_ARM_VENEER:
8633 case VFP11_ERRATUM_THUMB_VENEER:
8634 /* Find return location. */
8635 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
8636 errnode->u.v.id);
8637
8638 myh = elf_link_hash_lookup
8639 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8640
8641 if (myh == NULL)
8642 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8643 abfd, "VFP11", tmp_name);
8644
8645 vma = myh->root.u.def.section->output_section->vma
8646 + myh->root.u.def.section->output_offset
8647 + myh->root.u.def.value;
8648
8649 errnode->u.v.branch->vma = vma;
8650 break;
8651
8652 default:
8653 abort ();
8654 }
8655 }
8656 }
8657
8658 free (tmp_name);
8659 }
8660
8661 /* Find virtual-memory addresses for STM32L4XX erratum veneers and
8662 return locations after sections have been laid out, using
8663 specially-named symbols. */
8664
8665 void
8666 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd *abfd,
8667 struct bfd_link_info *link_info)
8668 {
8669 asection *sec;
8670 struct elf32_arm_link_hash_table *globals;
8671 char *tmp_name;
8672
8673 if (bfd_link_relocatable (link_info))
8674 return;
8675
8676 /* Skip if this bfd does not correspond to an ELF image. */
8677 if (! is_arm_elf (abfd))
8678 return;
8679
8680 globals = elf32_arm_hash_table (link_info);
8681 if (globals == NULL)
8682 return;
8683
8684 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8685 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
8686 BFD_ASSERT (tmp_name);
8687
8688 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8689 {
8690 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8691 elf32_stm32l4xx_erratum_list *errnode = sec_data->stm32l4xx_erratumlist;
8692
8693 for (; errnode != NULL; errnode = errnode->next)
8694 {
8695 struct elf_link_hash_entry *myh;
8696 bfd_vma vma;
8697
8698 switch (errnode->type)
8699 {
8700 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
8701 /* Find veneer symbol. */
8702 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
8703 errnode->u.b.veneer->u.v.id);
8704
8705 myh = elf_link_hash_lookup
8706 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8707
8708 if (myh == NULL)
8709 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8710 abfd, "STM32L4XX", tmp_name);
8711
8712 vma = myh->root.u.def.section->output_section->vma
8713 + myh->root.u.def.section->output_offset
8714 + myh->root.u.def.value;
8715
8716 errnode->u.b.veneer->vma = vma;
8717 break;
8718
8719 case STM32L4XX_ERRATUM_VENEER:
8720 /* Find return location. */
8721 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
8722 errnode->u.v.id);
8723
8724 myh = elf_link_hash_lookup
8725 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8726
8727 if (myh == NULL)
8728 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8729 abfd, "STM32L4XX", tmp_name);
8730
8731 vma = myh->root.u.def.section->output_section->vma
8732 + myh->root.u.def.section->output_offset
8733 + myh->root.u.def.value;
8734
8735 errnode->u.v.branch->vma = vma;
8736 break;
8737
8738 default:
8739 abort ();
8740 }
8741 }
8742 }
8743
8744 free (tmp_name);
8745 }
8746
8747 static inline bfd_boolean
8748 is_thumb2_ldmia (const insn32 insn)
8749 {
8750 /* Encoding T2: LDM<c>.W <Rn>{!},<registers>
8751 1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll. */
8752 return (insn & 0xffd02000) == 0xe8900000;
8753 }
8754
8755 static inline bfd_boolean
8756 is_thumb2_ldmdb (const insn32 insn)
8757 {
8758 /* Encoding T1: LDMDB<c> <Rn>{!},<registers>
8759 1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll. */
8760 return (insn & 0xffd02000) == 0xe9100000;
8761 }
8762
8763 static inline bfd_boolean
8764 is_thumb2_vldm (const insn32 insn)
8765 {
8766 /* A6.5 Extension register load or store instruction
8767 A7.7.229
8768 We look for SP 32-bit and DP 64-bit registers.
8769 Encoding T1 VLDM{mode}<c> <Rn>{!}, <list>
8770 <list> is consecutive 64-bit registers
8771 1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii
8772 Encoding T2 VLDM{mode}<c> <Rn>{!}, <list>
8773 <list> is consecutive 32-bit registers
8774 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii
8775 if P==0 && U==1 && W==1 && Rn=1101 VPOP
8776 if PUW=010 || PUW=011 || PUW=101 VLDM. */
8777 return
8778 (((insn & 0xfe100f00) == 0xec100b00) ||
8779 ((insn & 0xfe100f00) == 0xec100a00))
8780 && /* (IA without !). */
8781 (((((insn << 7) >> 28) & 0xd) == 0x4)
8782 /* (IA with !), includes VPOP (when reg number is SP). */
8783 || ((((insn << 7) >> 28) & 0xd) == 0x5)
8784 /* (DB with !). */
8785 || ((((insn << 7) >> 28) & 0xd) == 0x9));
8786 }
8787
8788 /* STM STM32L4XX erratum : This function assumes that it receives an LDM or
8789 VLDM opcode and:
8790 - computes the number and the mode of memory accesses
8791 - decides if the replacement should be done:
8792 . replaces only if > 8-word accesses
8793 . or (testing purposes only) replaces all accesses. */
8794
8795 static bfd_boolean
8796 stm32l4xx_need_create_replacing_stub (const insn32 insn,
8797 bfd_arm_stm32l4xx_fix stm32l4xx_fix)
8798 {
8799 int nb_words = 0;
8800
8801 /* The field encoding the register list is the same for both LDMIA
8802 and LDMDB encodings. */
8803 if (is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn))
8804 nb_words = elf32_arm_popcount (insn & 0x0000ffff);
8805 else if (is_thumb2_vldm (insn))
8806 nb_words = (insn & 0xff);
8807
8808 /* DEFAULT mode accounts for the real bug condition situation,
8809 ALL mode inserts stubs for each LDM/VLDM instruction (testing). */
8810 return
8811 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_DEFAULT) ? nb_words > 8 :
8812 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_ALL) ? TRUE : FALSE;
8813 }
8814
8815 /* Look for potentially-troublesome code sequences which might trigger
8816 the STM STM32L4XX erratum. */
8817
8818 bfd_boolean
8819 bfd_elf32_arm_stm32l4xx_erratum_scan (bfd *abfd,
8820 struct bfd_link_info *link_info)
8821 {
8822 asection *sec;
8823 bfd_byte *contents = NULL;
8824 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8825
8826 if (globals == NULL)
8827 return FALSE;
8828
8829 /* If we are only performing a partial link do not bother
8830 to construct any glue. */
8831 if (bfd_link_relocatable (link_info))
8832 return TRUE;
8833
8834 /* Skip if this bfd does not correspond to an ELF image. */
8835 if (! is_arm_elf (abfd))
8836 return TRUE;
8837
8838 if (globals->stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_NONE)
8839 return TRUE;
8840
8841 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8842 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8843 return TRUE;
8844
8845 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8846 {
8847 unsigned int i, span;
8848 struct _arm_elf_section_data *sec_data;
8849
8850 /* If we don't have executable progbits, we're not interested in this
8851 section. Also skip if section is to be excluded. */
8852 if (elf_section_type (sec) != SHT_PROGBITS
8853 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8854 || (sec->flags & SEC_EXCLUDE) != 0
8855 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8856 || sec->output_section == bfd_abs_section_ptr
8857 || strcmp (sec->name, STM32L4XX_ERRATUM_VENEER_SECTION_NAME) == 0)
8858 continue;
8859
8860 sec_data = elf32_arm_section_data (sec);
8861
8862 if (sec_data->mapcount == 0)
8863 continue;
8864
8865 if (elf_section_data (sec)->this_hdr.contents != NULL)
8866 contents = elf_section_data (sec)->this_hdr.contents;
8867 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8868 goto error_return;
8869
8870 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8871 elf32_arm_compare_mapping);
8872
8873 for (span = 0; span < sec_data->mapcount; span++)
8874 {
8875 unsigned int span_start = sec_data->map[span].vma;
8876 unsigned int span_end = (span == sec_data->mapcount - 1)
8877 ? sec->size : sec_data->map[span + 1].vma;
8878 char span_type = sec_data->map[span].type;
8879 int itblock_current_pos = 0;
8880
8881 /* Only Thumb2 mode need be supported with this CM4 specific
8882 code, we should not encounter any arm mode eg span_type
8883 != 'a'. */
8884 if (span_type != 't')
8885 continue;
8886
8887 for (i = span_start; i < span_end;)
8888 {
8889 unsigned int insn = bfd_get_16 (abfd, &contents[i]);
8890 bfd_boolean insn_32bit = FALSE;
8891 bfd_boolean is_ldm = FALSE;
8892 bfd_boolean is_vldm = FALSE;
8893 bfd_boolean is_not_last_in_it_block = FALSE;
8894
8895 /* The first 16-bits of all 32-bit thumb2 instructions start
8896 with opcode[15..13]=0b111 and the encoded op1 can be anything
8897 except opcode[12..11]!=0b00.
8898 See 32-bit Thumb instruction encoding. */
8899 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
8900 insn_32bit = TRUE;
8901
8902 /* Compute the predicate that tells if the instruction
8903 is concerned by the IT block
8904 - Creates an error if there is a ldm that is not
8905 last in the IT block thus cannot be replaced
8906 - Otherwise we can create a branch at the end of the
8907 IT block, it will be controlled naturally by IT
8908 with the proper pseudo-predicate
8909 - So the only interesting predicate is the one that
8910 tells that we are not on the last item of an IT
8911 block. */
8912 if (itblock_current_pos != 0)
8913 is_not_last_in_it_block = !!--itblock_current_pos;
8914
8915 if (insn_32bit)
8916 {
8917 /* Load the rest of the insn (in manual-friendly order). */
8918 insn = (insn << 16) | bfd_get_16 (abfd, &contents[i + 2]);
8919 is_ldm = is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn);
8920 is_vldm = is_thumb2_vldm (insn);
8921
8922 /* Veneers are created for (v)ldm depending on
8923 option flags and memory accesses conditions; but
8924 if the instruction is not the last instruction of
8925 an IT block, we cannot create a jump there, so we
8926 bail out. */
8927 if ((is_ldm || is_vldm)
8928 && stm32l4xx_need_create_replacing_stub
8929 (insn, globals->stm32l4xx_fix))
8930 {
8931 if (is_not_last_in_it_block)
8932 {
8933 _bfd_error_handler
8934 /* xgettext:c-format */
8935 (_("%pB(%pA+%#x): error: multiple load detected"
8936 " in non-last IT block instruction:"
8937 " STM32L4XX veneer cannot be generated; "
8938 "use gcc option -mrestrict-it to generate"
8939 " only one instruction per IT block"),
8940 abfd, sec, i);
8941 }
8942 else
8943 {
8944 elf32_stm32l4xx_erratum_list *newerr =
8945 (elf32_stm32l4xx_erratum_list *)
8946 bfd_zmalloc
8947 (sizeof (elf32_stm32l4xx_erratum_list));
8948
8949 elf32_arm_section_data (sec)
8950 ->stm32l4xx_erratumcount += 1;
8951 newerr->u.b.insn = insn;
8952 /* We create only thumb branches. */
8953 newerr->type =
8954 STM32L4XX_ERRATUM_BRANCH_TO_VENEER;
8955 record_stm32l4xx_erratum_veneer
8956 (link_info, newerr, abfd, sec,
8957 i,
8958 is_ldm ?
8959 STM32L4XX_ERRATUM_LDM_VENEER_SIZE:
8960 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
8961 newerr->vma = -1;
8962 newerr->next = sec_data->stm32l4xx_erratumlist;
8963 sec_data->stm32l4xx_erratumlist = newerr;
8964 }
8965 }
8966 }
8967 else
8968 {
8969 /* A7.7.37 IT p208
8970 IT blocks are only encoded in T1
8971 Encoding T1: IT{x{y{z}}} <firstcond>
8972 1 0 1 1 - 1 1 1 1 - firstcond - mask
8973 if mask = '0000' then see 'related encodings'
8974 We don't deal with UNPREDICTABLE, just ignore these.
8975 There can be no nested IT blocks so an IT block
8976 is naturally a new one for which it is worth
8977 computing its size. */
8978 bfd_boolean is_newitblock = ((insn & 0xff00) == 0xbf00)
8979 && ((insn & 0x000f) != 0x0000);
8980 /* If we have a new IT block we compute its size. */
8981 if (is_newitblock)
8982 {
8983 /* Compute the number of instructions controlled
8984 by the IT block, it will be used to decide
8985 whether we are inside an IT block or not. */
8986 unsigned int mask = insn & 0x000f;
8987 itblock_current_pos = 4 - ctz (mask);
8988 }
8989 }
8990
8991 i += insn_32bit ? 4 : 2;
8992 }
8993 }
8994
8995 if (elf_section_data (sec)->this_hdr.contents != contents)
8996 free (contents);
8997 contents = NULL;
8998 }
8999
9000 return TRUE;
9001
9002 error_return:
9003 if (elf_section_data (sec)->this_hdr.contents != contents)
9004 free (contents);
9005
9006 return FALSE;
9007 }
9008
9009 /* Set target relocation values needed during linking. */
9010
9011 void
9012 bfd_elf32_arm_set_target_params (struct bfd *output_bfd,
9013 struct bfd_link_info *link_info,
9014 struct elf32_arm_params *params)
9015 {
9016 struct elf32_arm_link_hash_table *globals;
9017
9018 globals = elf32_arm_hash_table (link_info);
9019 if (globals == NULL)
9020 return;
9021
9022 globals->target1_is_rel = params->target1_is_rel;
9023 if (globals->fdpic_p)
9024 globals->target2_reloc = R_ARM_GOT32;
9025 else if (strcmp (params->target2_type, "rel") == 0)
9026 globals->target2_reloc = R_ARM_REL32;
9027 else if (strcmp (params->target2_type, "abs") == 0)
9028 globals->target2_reloc = R_ARM_ABS32;
9029 else if (strcmp (params->target2_type, "got-rel") == 0)
9030 globals->target2_reloc = R_ARM_GOT_PREL;
9031 else
9032 {
9033 _bfd_error_handler (_("invalid TARGET2 relocation type '%s'"),
9034 params->target2_type);
9035 }
9036 globals->fix_v4bx = params->fix_v4bx;
9037 globals->use_blx |= params->use_blx;
9038 globals->vfp11_fix = params->vfp11_denorm_fix;
9039 globals->stm32l4xx_fix = params->stm32l4xx_fix;
9040 if (globals->fdpic_p)
9041 globals->pic_veneer = 1;
9042 else
9043 globals->pic_veneer = params->pic_veneer;
9044 globals->fix_cortex_a8 = params->fix_cortex_a8;
9045 globals->fix_arm1176 = params->fix_arm1176;
9046 globals->cmse_implib = params->cmse_implib;
9047 globals->in_implib_bfd = params->in_implib_bfd;
9048
9049 BFD_ASSERT (is_arm_elf (output_bfd));
9050 elf_arm_tdata (output_bfd)->no_enum_size_warning
9051 = params->no_enum_size_warning;
9052 elf_arm_tdata (output_bfd)->no_wchar_size_warning
9053 = params->no_wchar_size_warning;
9054 }
9055
9056 /* Replace the target offset of a Thumb bl or b.w instruction. */
9057
9058 static void
9059 insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
9060 {
9061 bfd_vma upper;
9062 bfd_vma lower;
9063 int reloc_sign;
9064
9065 BFD_ASSERT ((offset & 1) == 0);
9066
9067 upper = bfd_get_16 (abfd, insn);
9068 lower = bfd_get_16 (abfd, insn + 2);
9069 reloc_sign = (offset < 0) ? 1 : 0;
9070 upper = (upper & ~(bfd_vma) 0x7ff)
9071 | ((offset >> 12) & 0x3ff)
9072 | (reloc_sign << 10);
9073 lower = (lower & ~(bfd_vma) 0x2fff)
9074 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
9075 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
9076 | ((offset >> 1) & 0x7ff);
9077 bfd_put_16 (abfd, upper, insn);
9078 bfd_put_16 (abfd, lower, insn + 2);
9079 }
9080
9081 /* Thumb code calling an ARM function. */
9082
9083 static int
9084 elf32_thumb_to_arm_stub (struct bfd_link_info * info,
9085 const char * name,
9086 bfd * input_bfd,
9087 bfd * output_bfd,
9088 asection * input_section,
9089 bfd_byte * hit_data,
9090 asection * sym_sec,
9091 bfd_vma offset,
9092 bfd_signed_vma addend,
9093 bfd_vma val,
9094 char **error_message)
9095 {
9096 asection * s = 0;
9097 bfd_vma my_offset;
9098 long int ret_offset;
9099 struct elf_link_hash_entry * myh;
9100 struct elf32_arm_link_hash_table * globals;
9101
9102 myh = find_thumb_glue (info, name, error_message);
9103 if (myh == NULL)
9104 return FALSE;
9105
9106 globals = elf32_arm_hash_table (info);
9107 BFD_ASSERT (globals != NULL);
9108 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9109
9110 my_offset = myh->root.u.def.value;
9111
9112 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9113 THUMB2ARM_GLUE_SECTION_NAME);
9114
9115 BFD_ASSERT (s != NULL);
9116 BFD_ASSERT (s->contents != NULL);
9117 BFD_ASSERT (s->output_section != NULL);
9118
9119 if ((my_offset & 0x01) == 0x01)
9120 {
9121 if (sym_sec != NULL
9122 && sym_sec->owner != NULL
9123 && !INTERWORK_FLAG (sym_sec->owner))
9124 {
9125 _bfd_error_handler
9126 (_("%pB(%s): warning: interworking not enabled;"
9127 " first occurrence: %pB: %s call to %s"),
9128 sym_sec->owner, name, input_bfd, "Thumb", "ARM");
9129
9130 return FALSE;
9131 }
9132
9133 --my_offset;
9134 myh->root.u.def.value = my_offset;
9135
9136 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
9137 s->contents + my_offset);
9138
9139 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
9140 s->contents + my_offset + 2);
9141
9142 ret_offset =
9143 /* Address of destination of the stub. */
9144 ((bfd_signed_vma) val)
9145 - ((bfd_signed_vma)
9146 /* Offset from the start of the current section
9147 to the start of the stubs. */
9148 (s->output_offset
9149 /* Offset of the start of this stub from the start of the stubs. */
9150 + my_offset
9151 /* Address of the start of the current section. */
9152 + s->output_section->vma)
9153 /* The branch instruction is 4 bytes into the stub. */
9154 + 4
9155 /* ARM branches work from the pc of the instruction + 8. */
9156 + 8);
9157
9158 put_arm_insn (globals, output_bfd,
9159 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
9160 s->contents + my_offset + 4);
9161 }
9162
9163 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
9164
9165 /* Now go back and fix up the original BL insn to point to here. */
9166 ret_offset =
9167 /* Address of where the stub is located. */
9168 (s->output_section->vma + s->output_offset + my_offset)
9169 /* Address of where the BL is located. */
9170 - (input_section->output_section->vma + input_section->output_offset
9171 + offset)
9172 /* Addend in the relocation. */
9173 - addend
9174 /* Biassing for PC-relative addressing. */
9175 - 8;
9176
9177 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
9178
9179 return TRUE;
9180 }
9181
9182 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
9183
9184 static struct elf_link_hash_entry *
9185 elf32_arm_create_thumb_stub (struct bfd_link_info * info,
9186 const char * name,
9187 bfd * input_bfd,
9188 bfd * output_bfd,
9189 asection * sym_sec,
9190 bfd_vma val,
9191 asection * s,
9192 char ** error_message)
9193 {
9194 bfd_vma my_offset;
9195 long int ret_offset;
9196 struct elf_link_hash_entry * myh;
9197 struct elf32_arm_link_hash_table * globals;
9198
9199 myh = find_arm_glue (info, name, error_message);
9200 if (myh == NULL)
9201 return NULL;
9202
9203 globals = elf32_arm_hash_table (info);
9204 BFD_ASSERT (globals != NULL);
9205 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9206
9207 my_offset = myh->root.u.def.value;
9208
9209 if ((my_offset & 0x01) == 0x01)
9210 {
9211 if (sym_sec != NULL
9212 && sym_sec->owner != NULL
9213 && !INTERWORK_FLAG (sym_sec->owner))
9214 {
9215 _bfd_error_handler
9216 (_("%pB(%s): warning: interworking not enabled;"
9217 " first occurrence: %pB: %s call to %s"),
9218 sym_sec->owner, name, input_bfd, "ARM", "Thumb");
9219 }
9220
9221 --my_offset;
9222 myh->root.u.def.value = my_offset;
9223
9224 if (bfd_link_pic (info)
9225 || globals->root.is_relocatable_executable
9226 || globals->pic_veneer)
9227 {
9228 /* For relocatable objects we can't use absolute addresses,
9229 so construct the address from a relative offset. */
9230 /* TODO: If the offset is small it's probably worth
9231 constructing the address with adds. */
9232 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
9233 s->contents + my_offset);
9234 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
9235 s->contents + my_offset + 4);
9236 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
9237 s->contents + my_offset + 8);
9238 /* Adjust the offset by 4 for the position of the add,
9239 and 8 for the pipeline offset. */
9240 ret_offset = (val - (s->output_offset
9241 + s->output_section->vma
9242 + my_offset + 12))
9243 | 1;
9244 bfd_put_32 (output_bfd, ret_offset,
9245 s->contents + my_offset + 12);
9246 }
9247 else if (globals->use_blx)
9248 {
9249 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
9250 s->contents + my_offset);
9251
9252 /* It's a thumb address. Add the low order bit. */
9253 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
9254 s->contents + my_offset + 4);
9255 }
9256 else
9257 {
9258 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
9259 s->contents + my_offset);
9260
9261 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
9262 s->contents + my_offset + 4);
9263
9264 /* It's a thumb address. Add the low order bit. */
9265 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
9266 s->contents + my_offset + 8);
9267
9268 my_offset += 12;
9269 }
9270 }
9271
9272 BFD_ASSERT (my_offset <= globals->arm_glue_size);
9273
9274 return myh;
9275 }
9276
9277 /* Arm code calling a Thumb function. */
9278
9279 static int
9280 elf32_arm_to_thumb_stub (struct bfd_link_info * info,
9281 const char * name,
9282 bfd * input_bfd,
9283 bfd * output_bfd,
9284 asection * input_section,
9285 bfd_byte * hit_data,
9286 asection * sym_sec,
9287 bfd_vma offset,
9288 bfd_signed_vma addend,
9289 bfd_vma val,
9290 char **error_message)
9291 {
9292 unsigned long int tmp;
9293 bfd_vma my_offset;
9294 asection * s;
9295 long int ret_offset;
9296 struct elf_link_hash_entry * myh;
9297 struct elf32_arm_link_hash_table * globals;
9298
9299 globals = elf32_arm_hash_table (info);
9300 BFD_ASSERT (globals != NULL);
9301 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9302
9303 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9304 ARM2THUMB_GLUE_SECTION_NAME);
9305 BFD_ASSERT (s != NULL);
9306 BFD_ASSERT (s->contents != NULL);
9307 BFD_ASSERT (s->output_section != NULL);
9308
9309 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
9310 sym_sec, val, s, error_message);
9311 if (!myh)
9312 return FALSE;
9313
9314 my_offset = myh->root.u.def.value;
9315 tmp = bfd_get_32 (input_bfd, hit_data);
9316 tmp = tmp & 0xFF000000;
9317
9318 /* Somehow these are both 4 too far, so subtract 8. */
9319 ret_offset = (s->output_offset
9320 + my_offset
9321 + s->output_section->vma
9322 - (input_section->output_offset
9323 + input_section->output_section->vma
9324 + offset + addend)
9325 - 8);
9326
9327 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
9328
9329 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
9330
9331 return TRUE;
9332 }
9333
9334 /* Populate Arm stub for an exported Thumb function. */
9335
9336 static bfd_boolean
9337 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
9338 {
9339 struct bfd_link_info * info = (struct bfd_link_info *) inf;
9340 asection * s;
9341 struct elf_link_hash_entry * myh;
9342 struct elf32_arm_link_hash_entry *eh;
9343 struct elf32_arm_link_hash_table * globals;
9344 asection *sec;
9345 bfd_vma val;
9346 char *error_message;
9347
9348 eh = elf32_arm_hash_entry (h);
9349 /* Allocate stubs for exported Thumb functions on v4t. */
9350 if (eh->export_glue == NULL)
9351 return TRUE;
9352
9353 globals = elf32_arm_hash_table (info);
9354 BFD_ASSERT (globals != NULL);
9355 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9356
9357 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9358 ARM2THUMB_GLUE_SECTION_NAME);
9359 BFD_ASSERT (s != NULL);
9360 BFD_ASSERT (s->contents != NULL);
9361 BFD_ASSERT (s->output_section != NULL);
9362
9363 sec = eh->export_glue->root.u.def.section;
9364
9365 BFD_ASSERT (sec->output_section != NULL);
9366
9367 val = eh->export_glue->root.u.def.value + sec->output_offset
9368 + sec->output_section->vma;
9369
9370 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
9371 h->root.u.def.section->owner,
9372 globals->obfd, sec, val, s,
9373 &error_message);
9374 BFD_ASSERT (myh);
9375 return TRUE;
9376 }
9377
9378 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
9379
9380 static bfd_vma
9381 elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
9382 {
9383 bfd_byte *p;
9384 bfd_vma glue_addr;
9385 asection *s;
9386 struct elf32_arm_link_hash_table *globals;
9387
9388 globals = elf32_arm_hash_table (info);
9389 BFD_ASSERT (globals != NULL);
9390 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9391
9392 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9393 ARM_BX_GLUE_SECTION_NAME);
9394 BFD_ASSERT (s != NULL);
9395 BFD_ASSERT (s->contents != NULL);
9396 BFD_ASSERT (s->output_section != NULL);
9397
9398 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
9399
9400 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
9401
9402 if ((globals->bx_glue_offset[reg] & 1) == 0)
9403 {
9404 p = s->contents + glue_addr;
9405 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
9406 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
9407 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
9408 globals->bx_glue_offset[reg] |= 1;
9409 }
9410
9411 return glue_addr + s->output_section->vma + s->output_offset;
9412 }
9413
9414 /* Generate Arm stubs for exported Thumb symbols. */
9415 static void
9416 elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
9417 struct bfd_link_info *link_info)
9418 {
9419 struct elf32_arm_link_hash_table * globals;
9420
9421 if (link_info == NULL)
9422 /* Ignore this if we are not called by the ELF backend linker. */
9423 return;
9424
9425 globals = elf32_arm_hash_table (link_info);
9426 if (globals == NULL)
9427 return;
9428
9429 /* If blx is available then exported Thumb symbols are OK and there is
9430 nothing to do. */
9431 if (globals->use_blx)
9432 return;
9433
9434 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
9435 link_info);
9436 }
9437
9438 /* Reserve space for COUNT dynamic relocations in relocation selection
9439 SRELOC. */
9440
9441 static void
9442 elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
9443 bfd_size_type count)
9444 {
9445 struct elf32_arm_link_hash_table *htab;
9446
9447 htab = elf32_arm_hash_table (info);
9448 BFD_ASSERT (htab->root.dynamic_sections_created);
9449 if (sreloc == NULL)
9450 abort ();
9451 sreloc->size += RELOC_SIZE (htab) * count;
9452 }
9453
9454 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
9455 dynamic, the relocations should go in SRELOC, otherwise they should
9456 go in the special .rel.iplt section. */
9457
9458 static void
9459 elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
9460 bfd_size_type count)
9461 {
9462 struct elf32_arm_link_hash_table *htab;
9463
9464 htab = elf32_arm_hash_table (info);
9465 if (!htab->root.dynamic_sections_created)
9466 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
9467 else
9468 {
9469 BFD_ASSERT (sreloc != NULL);
9470 sreloc->size += RELOC_SIZE (htab) * count;
9471 }
9472 }
9473
9474 /* Add relocation REL to the end of relocation section SRELOC. */
9475
9476 static void
9477 elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
9478 asection *sreloc, Elf_Internal_Rela *rel)
9479 {
9480 bfd_byte *loc;
9481 struct elf32_arm_link_hash_table *htab;
9482
9483 htab = elf32_arm_hash_table (info);
9484 if (!htab->root.dynamic_sections_created
9485 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
9486 sreloc = htab->root.irelplt;
9487 if (sreloc == NULL)
9488 abort ();
9489 loc = sreloc->contents;
9490 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
9491 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
9492 abort ();
9493 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
9494 }
9495
9496 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
9497 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
9498 to .plt. */
9499
9500 static void
9501 elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
9502 bfd_boolean is_iplt_entry,
9503 union gotplt_union *root_plt,
9504 struct arm_plt_info *arm_plt)
9505 {
9506 struct elf32_arm_link_hash_table *htab;
9507 asection *splt;
9508 asection *sgotplt;
9509
9510 htab = elf32_arm_hash_table (info);
9511
9512 if (is_iplt_entry)
9513 {
9514 splt = htab->root.iplt;
9515 sgotplt = htab->root.igotplt;
9516
9517 /* NaCl uses a special first entry in .iplt too. */
9518 if (htab->root.target_os == is_nacl && splt->size == 0)
9519 splt->size += htab->plt_header_size;
9520
9521 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
9522 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
9523 }
9524 else
9525 {
9526 splt = htab->root.splt;
9527 sgotplt = htab->root.sgotplt;
9528
9529 if (htab->fdpic_p)
9530 {
9531 /* Allocate room for R_ARM_FUNCDESC_VALUE. */
9532 /* For lazy binding, relocations will be put into .rel.plt, in
9533 .rel.got otherwise. */
9534 /* FIXME: today we don't support lazy binding so put it in .rel.got */
9535 if (info->flags & DF_BIND_NOW)
9536 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
9537 else
9538 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
9539 }
9540 else
9541 {
9542 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
9543 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
9544 }
9545
9546 /* If this is the first .plt entry, make room for the special
9547 first entry. */
9548 if (splt->size == 0)
9549 splt->size += htab->plt_header_size;
9550
9551 htab->next_tls_desc_index++;
9552 }
9553
9554 /* Allocate the PLT entry itself, including any leading Thumb stub. */
9555 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9556 splt->size += PLT_THUMB_STUB_SIZE;
9557 root_plt->offset = splt->size;
9558 splt->size += htab->plt_entry_size;
9559
9560 if (htab->root.target_os != is_symbian)
9561 {
9562 /* We also need to make an entry in the .got.plt section, which
9563 will be placed in the .got section by the linker script. */
9564 if (is_iplt_entry)
9565 arm_plt->got_offset = sgotplt->size;
9566 else
9567 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
9568 if (htab->fdpic_p)
9569 /* Function descriptor takes 64 bits in GOT. */
9570 sgotplt->size += 8;
9571 else
9572 sgotplt->size += 4;
9573 }
9574 }
9575
9576 static bfd_vma
9577 arm_movw_immediate (bfd_vma value)
9578 {
9579 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
9580 }
9581
9582 static bfd_vma
9583 arm_movt_immediate (bfd_vma value)
9584 {
9585 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
9586 }
9587
9588 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
9589 the entry lives in .iplt and resolves to (*SYM_VALUE)().
9590 Otherwise, DYNINDX is the index of the symbol in the dynamic
9591 symbol table and SYM_VALUE is undefined.
9592
9593 ROOT_PLT points to the offset of the PLT entry from the start of its
9594 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
9595 bookkeeping information.
9596
9597 Returns FALSE if there was a problem. */
9598
9599 static bfd_boolean
9600 elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
9601 union gotplt_union *root_plt,
9602 struct arm_plt_info *arm_plt,
9603 int dynindx, bfd_vma sym_value)
9604 {
9605 struct elf32_arm_link_hash_table *htab;
9606 asection *sgot;
9607 asection *splt;
9608 asection *srel;
9609 bfd_byte *loc;
9610 bfd_vma plt_index;
9611 Elf_Internal_Rela rel;
9612 bfd_vma plt_header_size;
9613 bfd_vma got_header_size;
9614
9615 htab = elf32_arm_hash_table (info);
9616
9617 /* Pick the appropriate sections and sizes. */
9618 if (dynindx == -1)
9619 {
9620 splt = htab->root.iplt;
9621 sgot = htab->root.igotplt;
9622 srel = htab->root.irelplt;
9623
9624 /* There are no reserved entries in .igot.plt, and no special
9625 first entry in .iplt. */
9626 got_header_size = 0;
9627 plt_header_size = 0;
9628 }
9629 else
9630 {
9631 splt = htab->root.splt;
9632 sgot = htab->root.sgotplt;
9633 srel = htab->root.srelplt;
9634
9635 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
9636 plt_header_size = htab->plt_header_size;
9637 }
9638 BFD_ASSERT (splt != NULL && srel != NULL);
9639
9640 /* Fill in the entry in the procedure linkage table. */
9641 if (htab->root.target_os == is_symbian)
9642 {
9643 BFD_ASSERT (dynindx >= 0);
9644 put_arm_insn (htab, output_bfd,
9645 elf32_arm_symbian_plt_entry[0],
9646 splt->contents + root_plt->offset);
9647 bfd_put_32 (output_bfd,
9648 elf32_arm_symbian_plt_entry[1],
9649 splt->contents + root_plt->offset + 4);
9650
9651 /* Fill in the entry in the .rel.plt section. */
9652 rel.r_offset = (splt->output_section->vma
9653 + splt->output_offset
9654 + root_plt->offset + 4);
9655 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
9656
9657 /* Get the index in the procedure linkage table which
9658 corresponds to this symbol. This is the index of this symbol
9659 in all the symbols for which we are making plt entries. The
9660 first entry in the procedure linkage table is reserved. */
9661 plt_index = ((root_plt->offset - plt_header_size)
9662 / htab->plt_entry_size);
9663 }
9664 else
9665 {
9666 bfd_vma got_offset, got_address, plt_address;
9667 bfd_vma got_displacement, initial_got_entry;
9668 bfd_byte * ptr;
9669
9670 BFD_ASSERT (sgot != NULL);
9671
9672 /* Get the offset into the .(i)got.plt table of the entry that
9673 corresponds to this function. */
9674 got_offset = (arm_plt->got_offset & -2);
9675
9676 /* Get the index in the procedure linkage table which
9677 corresponds to this symbol. This is the index of this symbol
9678 in all the symbols for which we are making plt entries.
9679 After the reserved .got.plt entries, all symbols appear in
9680 the same order as in .plt. */
9681 if (htab->fdpic_p)
9682 /* Function descriptor takes 8 bytes. */
9683 plt_index = (got_offset - got_header_size) / 8;
9684 else
9685 plt_index = (got_offset - got_header_size) / 4;
9686
9687 /* Calculate the address of the GOT entry. */
9688 got_address = (sgot->output_section->vma
9689 + sgot->output_offset
9690 + got_offset);
9691
9692 /* ...and the address of the PLT entry. */
9693 plt_address = (splt->output_section->vma
9694 + splt->output_offset
9695 + root_plt->offset);
9696
9697 ptr = splt->contents + root_plt->offset;
9698 if (htab->root.target_os == is_vxworks && bfd_link_pic (info))
9699 {
9700 unsigned int i;
9701 bfd_vma val;
9702
9703 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9704 {
9705 val = elf32_arm_vxworks_shared_plt_entry[i];
9706 if (i == 2)
9707 val |= got_address - sgot->output_section->vma;
9708 if (i == 5)
9709 val |= plt_index * RELOC_SIZE (htab);
9710 if (i == 2 || i == 5)
9711 bfd_put_32 (output_bfd, val, ptr);
9712 else
9713 put_arm_insn (htab, output_bfd, val, ptr);
9714 }
9715 }
9716 else if (htab->root.target_os == is_vxworks)
9717 {
9718 unsigned int i;
9719 bfd_vma val;
9720
9721 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9722 {
9723 val = elf32_arm_vxworks_exec_plt_entry[i];
9724 if (i == 2)
9725 val |= got_address;
9726 if (i == 4)
9727 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
9728 if (i == 5)
9729 val |= plt_index * RELOC_SIZE (htab);
9730 if (i == 2 || i == 5)
9731 bfd_put_32 (output_bfd, val, ptr);
9732 else
9733 put_arm_insn (htab, output_bfd, val, ptr);
9734 }
9735
9736 loc = (htab->srelplt2->contents
9737 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
9738
9739 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
9740 referencing the GOT for this PLT entry. */
9741 rel.r_offset = plt_address + 8;
9742 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
9743 rel.r_addend = got_offset;
9744 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9745 loc += RELOC_SIZE (htab);
9746
9747 /* Create the R_ARM_ABS32 relocation referencing the
9748 beginning of the PLT for this GOT entry. */
9749 rel.r_offset = got_address;
9750 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
9751 rel.r_addend = 0;
9752 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9753 }
9754 else if (htab->root.target_os == is_nacl)
9755 {
9756 /* Calculate the displacement between the PLT slot and the
9757 common tail that's part of the special initial PLT slot. */
9758 int32_t tail_displacement
9759 = ((splt->output_section->vma + splt->output_offset
9760 + ARM_NACL_PLT_TAIL_OFFSET)
9761 - (plt_address + htab->plt_entry_size + 4));
9762 BFD_ASSERT ((tail_displacement & 3) == 0);
9763 tail_displacement >>= 2;
9764
9765 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
9766 || (-tail_displacement & 0xff000000) == 0);
9767
9768 /* Calculate the displacement between the PLT slot and the entry
9769 in the GOT. The offset accounts for the value produced by
9770 adding to pc in the penultimate instruction of the PLT stub. */
9771 got_displacement = (got_address
9772 - (plt_address + htab->plt_entry_size));
9773
9774 /* NaCl does not support interworking at all. */
9775 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
9776
9777 put_arm_insn (htab, output_bfd,
9778 elf32_arm_nacl_plt_entry[0]
9779 | arm_movw_immediate (got_displacement),
9780 ptr + 0);
9781 put_arm_insn (htab, output_bfd,
9782 elf32_arm_nacl_plt_entry[1]
9783 | arm_movt_immediate (got_displacement),
9784 ptr + 4);
9785 put_arm_insn (htab, output_bfd,
9786 elf32_arm_nacl_plt_entry[2],
9787 ptr + 8);
9788 put_arm_insn (htab, output_bfd,
9789 elf32_arm_nacl_plt_entry[3]
9790 | (tail_displacement & 0x00ffffff),
9791 ptr + 12);
9792 }
9793 else if (htab->fdpic_p)
9794 {
9795 const bfd_vma *plt_entry = using_thumb_only(htab)
9796 ? elf32_arm_fdpic_thumb_plt_entry
9797 : elf32_arm_fdpic_plt_entry;
9798
9799 /* Fill-up Thumb stub if needed. */
9800 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9801 {
9802 put_thumb_insn (htab, output_bfd,
9803 elf32_arm_plt_thumb_stub[0], ptr - 4);
9804 put_thumb_insn (htab, output_bfd,
9805 elf32_arm_plt_thumb_stub[1], ptr - 2);
9806 }
9807 /* As we are using 32 bit instructions even for the Thumb
9808 version, we have to use 'put_arm_insn' instead of
9809 'put_thumb_insn'. */
9810 put_arm_insn(htab, output_bfd, plt_entry[0], ptr + 0);
9811 put_arm_insn(htab, output_bfd, plt_entry[1], ptr + 4);
9812 put_arm_insn(htab, output_bfd, plt_entry[2], ptr + 8);
9813 put_arm_insn(htab, output_bfd, plt_entry[3], ptr + 12);
9814 bfd_put_32 (output_bfd, got_offset, ptr + 16);
9815
9816 if (!(info->flags & DF_BIND_NOW))
9817 {
9818 /* funcdesc_value_reloc_offset. */
9819 bfd_put_32 (output_bfd,
9820 htab->root.srelplt->reloc_count * RELOC_SIZE (htab),
9821 ptr + 20);
9822 put_arm_insn(htab, output_bfd, plt_entry[6], ptr + 24);
9823 put_arm_insn(htab, output_bfd, plt_entry[7], ptr + 28);
9824 put_arm_insn(htab, output_bfd, plt_entry[8], ptr + 32);
9825 put_arm_insn(htab, output_bfd, plt_entry[9], ptr + 36);
9826 }
9827 }
9828 else if (using_thumb_only (htab))
9829 {
9830 /* PR ld/16017: Generate thumb only PLT entries. */
9831 if (!using_thumb2 (htab))
9832 {
9833 /* FIXME: We ought to be able to generate thumb-1 PLT
9834 instructions... */
9835 _bfd_error_handler (_("%pB: warning: thumb-1 mode PLT generation not currently supported"),
9836 output_bfd);
9837 return FALSE;
9838 }
9839
9840 /* Calculate the displacement between the PLT slot and the entry in
9841 the GOT. The 12-byte offset accounts for the value produced by
9842 adding to pc in the 3rd instruction of the PLT stub. */
9843 got_displacement = got_address - (plt_address + 12);
9844
9845 /* As we are using 32 bit instructions we have to use 'put_arm_insn'
9846 instead of 'put_thumb_insn'. */
9847 put_arm_insn (htab, output_bfd,
9848 elf32_thumb2_plt_entry[0]
9849 | ((got_displacement & 0x000000ff) << 16)
9850 | ((got_displacement & 0x00000700) << 20)
9851 | ((got_displacement & 0x00000800) >> 1)
9852 | ((got_displacement & 0x0000f000) >> 12),
9853 ptr + 0);
9854 put_arm_insn (htab, output_bfd,
9855 elf32_thumb2_plt_entry[1]
9856 | ((got_displacement & 0x00ff0000) )
9857 | ((got_displacement & 0x07000000) << 4)
9858 | ((got_displacement & 0x08000000) >> 17)
9859 | ((got_displacement & 0xf0000000) >> 28),
9860 ptr + 4);
9861 put_arm_insn (htab, output_bfd,
9862 elf32_thumb2_plt_entry[2],
9863 ptr + 8);
9864 put_arm_insn (htab, output_bfd,
9865 elf32_thumb2_plt_entry[3],
9866 ptr + 12);
9867 }
9868 else
9869 {
9870 /* Calculate the displacement between the PLT slot and the
9871 entry in the GOT. The eight-byte offset accounts for the
9872 value produced by adding to pc in the first instruction
9873 of the PLT stub. */
9874 got_displacement = got_address - (plt_address + 8);
9875
9876 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9877 {
9878 put_thumb_insn (htab, output_bfd,
9879 elf32_arm_plt_thumb_stub[0], ptr - 4);
9880 put_thumb_insn (htab, output_bfd,
9881 elf32_arm_plt_thumb_stub[1], ptr - 2);
9882 }
9883
9884 if (!elf32_arm_use_long_plt_entry)
9885 {
9886 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
9887
9888 put_arm_insn (htab, output_bfd,
9889 elf32_arm_plt_entry_short[0]
9890 | ((got_displacement & 0x0ff00000) >> 20),
9891 ptr + 0);
9892 put_arm_insn (htab, output_bfd,
9893 elf32_arm_plt_entry_short[1]
9894 | ((got_displacement & 0x000ff000) >> 12),
9895 ptr+ 4);
9896 put_arm_insn (htab, output_bfd,
9897 elf32_arm_plt_entry_short[2]
9898 | (got_displacement & 0x00000fff),
9899 ptr + 8);
9900 #ifdef FOUR_WORD_PLT
9901 bfd_put_32 (output_bfd, elf32_arm_plt_entry_short[3], ptr + 12);
9902 #endif
9903 }
9904 else
9905 {
9906 put_arm_insn (htab, output_bfd,
9907 elf32_arm_plt_entry_long[0]
9908 | ((got_displacement & 0xf0000000) >> 28),
9909 ptr + 0);
9910 put_arm_insn (htab, output_bfd,
9911 elf32_arm_plt_entry_long[1]
9912 | ((got_displacement & 0x0ff00000) >> 20),
9913 ptr + 4);
9914 put_arm_insn (htab, output_bfd,
9915 elf32_arm_plt_entry_long[2]
9916 | ((got_displacement & 0x000ff000) >> 12),
9917 ptr+ 8);
9918 put_arm_insn (htab, output_bfd,
9919 elf32_arm_plt_entry_long[3]
9920 | (got_displacement & 0x00000fff),
9921 ptr + 12);
9922 }
9923 }
9924
9925 /* Fill in the entry in the .rel(a).(i)plt section. */
9926 rel.r_offset = got_address;
9927 rel.r_addend = 0;
9928 if (dynindx == -1)
9929 {
9930 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
9931 The dynamic linker or static executable then calls SYM_VALUE
9932 to determine the correct run-time value of the .igot.plt entry. */
9933 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9934 initial_got_entry = sym_value;
9935 }
9936 else
9937 {
9938 /* For FDPIC we will have to resolve a R_ARM_FUNCDESC_VALUE
9939 used by PLT entry. */
9940 if (htab->fdpic_p)
9941 {
9942 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_FUNCDESC_VALUE);
9943 initial_got_entry = 0;
9944 }
9945 else
9946 {
9947 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
9948 initial_got_entry = (splt->output_section->vma
9949 + splt->output_offset);
9950
9951 /* PR ld/16017
9952 When thumb only we need to set the LSB for any address that
9953 will be used with an interworking branch instruction. */
9954 if (using_thumb_only (htab))
9955 initial_got_entry |= 1;
9956 }
9957 }
9958
9959 /* Fill in the entry in the global offset table. */
9960 bfd_put_32 (output_bfd, initial_got_entry,
9961 sgot->contents + got_offset);
9962
9963 if (htab->fdpic_p && !(info->flags & DF_BIND_NOW))
9964 {
9965 /* Setup initial funcdesc value. */
9966 /* FIXME: we don't support lazy binding because there is a
9967 race condition between both words getting written and
9968 some other thread attempting to read them. The ARM
9969 architecture does not have an atomic 64 bit load/store
9970 instruction that could be used to prevent it; it is
9971 recommended that threaded FDPIC applications run with the
9972 LD_BIND_NOW environment variable set. */
9973 bfd_put_32(output_bfd, plt_address + 0x18,
9974 sgot->contents + got_offset);
9975 bfd_put_32(output_bfd, -1 /*TODO*/,
9976 sgot->contents + got_offset + 4);
9977 }
9978 }
9979
9980 if (dynindx == -1)
9981 elf32_arm_add_dynreloc (output_bfd, info, srel, &rel);
9982 else
9983 {
9984 if (htab->fdpic_p)
9985 {
9986 /* For FDPIC we put PLT relocationss into .rel.got when not
9987 lazy binding otherwise we put them in .rel.plt. For now,
9988 we don't support lazy binding so put it in .rel.got. */
9989 if (info->flags & DF_BIND_NOW)
9990 elf32_arm_add_dynreloc(output_bfd, info, htab->root.srelgot, &rel);
9991 else
9992 elf32_arm_add_dynreloc(output_bfd, info, htab->root.srelplt, &rel);
9993 }
9994 else
9995 {
9996 loc = srel->contents + plt_index * RELOC_SIZE (htab);
9997 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9998 }
9999 }
10000
10001 return TRUE;
10002 }
10003
10004 /* Some relocations map to different relocations depending on the
10005 target. Return the real relocation. */
10006
10007 static int
10008 arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
10009 int r_type)
10010 {
10011 switch (r_type)
10012 {
10013 case R_ARM_TARGET1:
10014 if (globals->target1_is_rel)
10015 return R_ARM_REL32;
10016 else
10017 return R_ARM_ABS32;
10018
10019 case R_ARM_TARGET2:
10020 return globals->target2_reloc;
10021
10022 default:
10023 return r_type;
10024 }
10025 }
10026
10027 /* Return the base VMA address which should be subtracted from real addresses
10028 when resolving @dtpoff relocation.
10029 This is PT_TLS segment p_vaddr. */
10030
10031 static bfd_vma
10032 dtpoff_base (struct bfd_link_info *info)
10033 {
10034 /* If tls_sec is NULL, we should have signalled an error already. */
10035 if (elf_hash_table (info)->tls_sec == NULL)
10036 return 0;
10037 return elf_hash_table (info)->tls_sec->vma;
10038 }
10039
10040 /* Return the relocation value for @tpoff relocation
10041 if STT_TLS virtual address is ADDRESS. */
10042
10043 static bfd_vma
10044 tpoff (struct bfd_link_info *info, bfd_vma address)
10045 {
10046 struct elf_link_hash_table *htab = elf_hash_table (info);
10047 bfd_vma base;
10048
10049 /* If tls_sec is NULL, we should have signalled an error already. */
10050 if (htab->tls_sec == NULL)
10051 return 0;
10052 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
10053 return address - htab->tls_sec->vma + base;
10054 }
10055
10056 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
10057 VALUE is the relocation value. */
10058
10059 static bfd_reloc_status_type
10060 elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
10061 {
10062 if (value > 0xfff)
10063 return bfd_reloc_overflow;
10064
10065 value |= bfd_get_32 (abfd, data) & 0xfffff000;
10066 bfd_put_32 (abfd, value, data);
10067 return bfd_reloc_ok;
10068 }
10069
10070 /* Handle TLS relaxations. Relaxing is possible for symbols that use
10071 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
10072 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
10073
10074 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
10075 is to then call final_link_relocate. Return other values in the
10076 case of error.
10077
10078 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
10079 the pre-relaxed code. It would be nice if the relocs were updated
10080 to match the optimization. */
10081
10082 static bfd_reloc_status_type
10083 elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
10084 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
10085 Elf_Internal_Rela *rel, unsigned long is_local)
10086 {
10087 unsigned long insn;
10088
10089 switch (ELF32_R_TYPE (rel->r_info))
10090 {
10091 default:
10092 return bfd_reloc_notsupported;
10093
10094 case R_ARM_TLS_GOTDESC:
10095 if (is_local)
10096 insn = 0;
10097 else
10098 {
10099 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
10100 if (insn & 1)
10101 insn -= 5; /* THUMB */
10102 else
10103 insn -= 8; /* ARM */
10104 }
10105 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
10106 return bfd_reloc_continue;
10107
10108 case R_ARM_THM_TLS_DESCSEQ:
10109 /* Thumb insn. */
10110 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
10111 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
10112 {
10113 if (is_local)
10114 /* nop */
10115 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
10116 }
10117 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
10118 {
10119 if (is_local)
10120 /* nop */
10121 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
10122 else
10123 /* ldr rx,[ry] */
10124 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
10125 }
10126 else if ((insn & 0xff87) == 0x4780) /* blx rx */
10127 {
10128 if (is_local)
10129 /* nop */
10130 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
10131 else
10132 /* mov r0, rx */
10133 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
10134 contents + rel->r_offset);
10135 }
10136 else
10137 {
10138 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
10139 /* It's a 32 bit instruction, fetch the rest of it for
10140 error generation. */
10141 insn = (insn << 16)
10142 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
10143 _bfd_error_handler
10144 /* xgettext:c-format */
10145 (_("%pB(%pA+%#" PRIx64 "): "
10146 "unexpected %s instruction '%#lx' in TLS trampoline"),
10147 input_bfd, input_sec, (uint64_t) rel->r_offset,
10148 "Thumb", insn);
10149 return bfd_reloc_notsupported;
10150 }
10151 break;
10152
10153 case R_ARM_TLS_DESCSEQ:
10154 /* arm insn. */
10155 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
10156 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
10157 {
10158 if (is_local)
10159 /* mov rx, ry */
10160 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
10161 contents + rel->r_offset);
10162 }
10163 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
10164 {
10165 if (is_local)
10166 /* nop */
10167 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
10168 else
10169 /* ldr rx,[ry] */
10170 bfd_put_32 (input_bfd, insn & 0xfffff000,
10171 contents + rel->r_offset);
10172 }
10173 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
10174 {
10175 if (is_local)
10176 /* nop */
10177 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
10178 else
10179 /* mov r0, rx */
10180 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
10181 contents + rel->r_offset);
10182 }
10183 else
10184 {
10185 _bfd_error_handler
10186 /* xgettext:c-format */
10187 (_("%pB(%pA+%#" PRIx64 "): "
10188 "unexpected %s instruction '%#lx' in TLS trampoline"),
10189 input_bfd, input_sec, (uint64_t) rel->r_offset,
10190 "ARM", insn);
10191 return bfd_reloc_notsupported;
10192 }
10193 break;
10194
10195 case R_ARM_TLS_CALL:
10196 /* GD->IE relaxation, turn the instruction into 'nop' or
10197 'ldr r0, [pc,r0]' */
10198 insn = is_local ? 0xe1a00000 : 0xe79f0000;
10199 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
10200 break;
10201
10202 case R_ARM_THM_TLS_CALL:
10203 /* GD->IE relaxation. */
10204 if (!is_local)
10205 /* add r0,pc; ldr r0, [r0] */
10206 insn = 0x44786800;
10207 else if (using_thumb2 (globals))
10208 /* nop.w */
10209 insn = 0xf3af8000;
10210 else
10211 /* nop; nop */
10212 insn = 0xbf00bf00;
10213
10214 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
10215 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
10216 break;
10217 }
10218 return bfd_reloc_ok;
10219 }
10220
10221 /* For a given value of n, calculate the value of G_n as required to
10222 deal with group relocations. We return it in the form of an
10223 encoded constant-and-rotation, together with the final residual. If n is
10224 specified as less than zero, then final_residual is filled with the
10225 input value and no further action is performed. */
10226
10227 static bfd_vma
10228 calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
10229 {
10230 int current_n;
10231 bfd_vma g_n;
10232 bfd_vma encoded_g_n = 0;
10233 bfd_vma residual = value; /* Also known as Y_n. */
10234
10235 for (current_n = 0; current_n <= n; current_n++)
10236 {
10237 int shift;
10238
10239 /* Calculate which part of the value to mask. */
10240 if (residual == 0)
10241 shift = 0;
10242 else
10243 {
10244 int msb;
10245
10246 /* Determine the most significant bit in the residual and
10247 align the resulting value to a 2-bit boundary. */
10248 for (msb = 30; msb >= 0; msb -= 2)
10249 if (residual & (3 << msb))
10250 break;
10251
10252 /* The desired shift is now (msb - 6), or zero, whichever
10253 is the greater. */
10254 shift = msb - 6;
10255 if (shift < 0)
10256 shift = 0;
10257 }
10258
10259 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
10260 g_n = residual & (0xff << shift);
10261 encoded_g_n = (g_n >> shift)
10262 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
10263
10264 /* Calculate the residual for the next time around. */
10265 residual &= ~g_n;
10266 }
10267
10268 *final_residual = residual;
10269
10270 return encoded_g_n;
10271 }
10272
10273 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
10274 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
10275
10276 static int
10277 identify_add_or_sub (bfd_vma insn)
10278 {
10279 int opcode = insn & 0x1e00000;
10280
10281 if (opcode == 1 << 23) /* ADD */
10282 return 1;
10283
10284 if (opcode == 1 << 22) /* SUB */
10285 return -1;
10286
10287 return 0;
10288 }
10289
10290 /* Perform a relocation as part of a final link. */
10291
10292 static bfd_reloc_status_type
10293 elf32_arm_final_link_relocate (reloc_howto_type * howto,
10294 bfd * input_bfd,
10295 bfd * output_bfd,
10296 asection * input_section,
10297 bfd_byte * contents,
10298 Elf_Internal_Rela * rel,
10299 bfd_vma value,
10300 struct bfd_link_info * info,
10301 asection * sym_sec,
10302 const char * sym_name,
10303 unsigned char st_type,
10304 enum arm_st_branch_type branch_type,
10305 struct elf_link_hash_entry * h,
10306 bfd_boolean * unresolved_reloc_p,
10307 char ** error_message)
10308 {
10309 unsigned long r_type = howto->type;
10310 unsigned long r_symndx;
10311 bfd_byte * hit_data = contents + rel->r_offset;
10312 bfd_vma * local_got_offsets;
10313 bfd_vma * local_tlsdesc_gotents;
10314 asection * sgot;
10315 asection * splt;
10316 asection * sreloc = NULL;
10317 asection * srelgot;
10318 bfd_vma addend;
10319 bfd_signed_vma signed_addend;
10320 unsigned char dynreloc_st_type;
10321 bfd_vma dynreloc_value;
10322 struct elf32_arm_link_hash_table * globals;
10323 struct elf32_arm_link_hash_entry *eh;
10324 union gotplt_union *root_plt;
10325 struct arm_plt_info *arm_plt;
10326 bfd_vma plt_offset;
10327 bfd_vma gotplt_offset;
10328 bfd_boolean has_iplt_entry;
10329 bfd_boolean resolved_to_zero;
10330
10331 globals = elf32_arm_hash_table (info);
10332 if (globals == NULL)
10333 return bfd_reloc_notsupported;
10334
10335 BFD_ASSERT (is_arm_elf (input_bfd));
10336 BFD_ASSERT (howto != NULL);
10337
10338 /* Some relocation types map to different relocations depending on the
10339 target. We pick the right one here. */
10340 r_type = arm_real_reloc_type (globals, r_type);
10341
10342 /* It is possible to have linker relaxations on some TLS access
10343 models. Update our information here. */
10344 r_type = elf32_arm_tls_transition (info, r_type, h);
10345
10346 if (r_type != howto->type)
10347 howto = elf32_arm_howto_from_type (r_type);
10348
10349 eh = (struct elf32_arm_link_hash_entry *) h;
10350 sgot = globals->root.sgot;
10351 local_got_offsets = elf_local_got_offsets (input_bfd);
10352 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
10353
10354 if (globals->root.dynamic_sections_created)
10355 srelgot = globals->root.srelgot;
10356 else
10357 srelgot = NULL;
10358
10359 r_symndx = ELF32_R_SYM (rel->r_info);
10360
10361 if (globals->use_rel)
10362 {
10363 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
10364
10365 if (addend & ((howto->src_mask + 1) >> 1))
10366 {
10367 signed_addend = -1;
10368 signed_addend &= ~ howto->src_mask;
10369 signed_addend |= addend;
10370 }
10371 else
10372 signed_addend = addend;
10373 }
10374 else
10375 addend = signed_addend = rel->r_addend;
10376
10377 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
10378 are resolving a function call relocation. */
10379 if (using_thumb_only (globals)
10380 && (r_type == R_ARM_THM_CALL
10381 || r_type == R_ARM_THM_JUMP24)
10382 && branch_type == ST_BRANCH_TO_ARM)
10383 branch_type = ST_BRANCH_TO_THUMB;
10384
10385 /* Record the symbol information that should be used in dynamic
10386 relocations. */
10387 dynreloc_st_type = st_type;
10388 dynreloc_value = value;
10389 if (branch_type == ST_BRANCH_TO_THUMB)
10390 dynreloc_value |= 1;
10391
10392 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
10393 VALUE appropriately for relocations that we resolve at link time. */
10394 has_iplt_entry = FALSE;
10395 if (elf32_arm_get_plt_info (input_bfd, globals, eh, r_symndx, &root_plt,
10396 &arm_plt)
10397 && root_plt->offset != (bfd_vma) -1)
10398 {
10399 plt_offset = root_plt->offset;
10400 gotplt_offset = arm_plt->got_offset;
10401
10402 if (h == NULL || eh->is_iplt)
10403 {
10404 has_iplt_entry = TRUE;
10405 splt = globals->root.iplt;
10406
10407 /* Populate .iplt entries here, because not all of them will
10408 be seen by finish_dynamic_symbol. The lower bit is set if
10409 we have already populated the entry. */
10410 if (plt_offset & 1)
10411 plt_offset--;
10412 else
10413 {
10414 if (elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
10415 -1, dynreloc_value))
10416 root_plt->offset |= 1;
10417 else
10418 return bfd_reloc_notsupported;
10419 }
10420
10421 /* Static relocations always resolve to the .iplt entry. */
10422 st_type = STT_FUNC;
10423 value = (splt->output_section->vma
10424 + splt->output_offset
10425 + plt_offset);
10426 branch_type = ST_BRANCH_TO_ARM;
10427
10428 /* If there are non-call relocations that resolve to the .iplt
10429 entry, then all dynamic ones must too. */
10430 if (arm_plt->noncall_refcount != 0)
10431 {
10432 dynreloc_st_type = st_type;
10433 dynreloc_value = value;
10434 }
10435 }
10436 else
10437 /* We populate the .plt entry in finish_dynamic_symbol. */
10438 splt = globals->root.splt;
10439 }
10440 else
10441 {
10442 splt = NULL;
10443 plt_offset = (bfd_vma) -1;
10444 gotplt_offset = (bfd_vma) -1;
10445 }
10446
10447 resolved_to_zero = (h != NULL
10448 && UNDEFWEAK_NO_DYNAMIC_RELOC (info, h));
10449
10450 switch (r_type)
10451 {
10452 case R_ARM_NONE:
10453 /* We don't need to find a value for this symbol. It's just a
10454 marker. */
10455 *unresolved_reloc_p = FALSE;
10456 return bfd_reloc_ok;
10457
10458 case R_ARM_ABS12:
10459 if (globals->root.target_os != is_vxworks)
10460 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10461 /* Fall through. */
10462
10463 case R_ARM_PC24:
10464 case R_ARM_ABS32:
10465 case R_ARM_ABS32_NOI:
10466 case R_ARM_REL32:
10467 case R_ARM_REL32_NOI:
10468 case R_ARM_CALL:
10469 case R_ARM_JUMP24:
10470 case R_ARM_XPC25:
10471 case R_ARM_PREL31:
10472 case R_ARM_PLT32:
10473 /* Handle relocations which should use the PLT entry. ABS32/REL32
10474 will use the symbol's value, which may point to a PLT entry, but we
10475 don't need to handle that here. If we created a PLT entry, all
10476 branches in this object should go to it, except if the PLT is too
10477 far away, in which case a long branch stub should be inserted. */
10478 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
10479 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
10480 && r_type != R_ARM_CALL
10481 && r_type != R_ARM_JUMP24
10482 && r_type != R_ARM_PLT32)
10483 && plt_offset != (bfd_vma) -1)
10484 {
10485 /* If we've created a .plt section, and assigned a PLT entry
10486 to this function, it must either be a STT_GNU_IFUNC reference
10487 or not be known to bind locally. In other cases, we should
10488 have cleared the PLT entry by now. */
10489 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
10490
10491 value = (splt->output_section->vma
10492 + splt->output_offset
10493 + plt_offset);
10494 *unresolved_reloc_p = FALSE;
10495 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10496 contents, rel->r_offset, value,
10497 rel->r_addend);
10498 }
10499
10500 /* When generating a shared object or relocatable executable, these
10501 relocations are copied into the output file to be resolved at
10502 run time. */
10503 if ((bfd_link_pic (info)
10504 || globals->root.is_relocatable_executable
10505 || globals->fdpic_p)
10506 && (input_section->flags & SEC_ALLOC)
10507 && !(globals->root.target_os == is_vxworks
10508 && strcmp (input_section->output_section->name,
10509 ".tls_vars") == 0)
10510 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
10511 || !SYMBOL_CALLS_LOCAL (info, h))
10512 && !(input_bfd == globals->stub_bfd
10513 && strstr (input_section->name, STUB_SUFFIX))
10514 && (h == NULL
10515 || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
10516 && !resolved_to_zero)
10517 || h->root.type != bfd_link_hash_undefweak)
10518 && r_type != R_ARM_PC24
10519 && r_type != R_ARM_CALL
10520 && r_type != R_ARM_JUMP24
10521 && r_type != R_ARM_PREL31
10522 && r_type != R_ARM_PLT32)
10523 {
10524 Elf_Internal_Rela outrel;
10525 bfd_boolean skip, relocate;
10526 int isrofixup = 0;
10527
10528 if ((r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
10529 && !h->def_regular)
10530 {
10531 char *v = _("shared object");
10532
10533 if (bfd_link_executable (info))
10534 v = _("PIE executable");
10535
10536 _bfd_error_handler
10537 (_("%pB: relocation %s against external or undefined symbol `%s'"
10538 " can not be used when making a %s; recompile with -fPIC"), input_bfd,
10539 elf32_arm_howto_table_1[r_type].name, h->root.root.string, v);
10540 return bfd_reloc_notsupported;
10541 }
10542
10543 *unresolved_reloc_p = FALSE;
10544
10545 if (sreloc == NULL && globals->root.dynamic_sections_created)
10546 {
10547 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
10548 ! globals->use_rel);
10549
10550 if (sreloc == NULL)
10551 return bfd_reloc_notsupported;
10552 }
10553
10554 skip = FALSE;
10555 relocate = FALSE;
10556
10557 outrel.r_addend = addend;
10558 outrel.r_offset =
10559 _bfd_elf_section_offset (output_bfd, info, input_section,
10560 rel->r_offset);
10561 if (outrel.r_offset == (bfd_vma) -1)
10562 skip = TRUE;
10563 else if (outrel.r_offset == (bfd_vma) -2)
10564 skip = TRUE, relocate = TRUE;
10565 outrel.r_offset += (input_section->output_section->vma
10566 + input_section->output_offset);
10567
10568 if (skip)
10569 memset (&outrel, 0, sizeof outrel);
10570 else if (h != NULL
10571 && h->dynindx != -1
10572 && (!bfd_link_pic (info)
10573 || !(bfd_link_pie (info)
10574 || SYMBOLIC_BIND (info, h))
10575 || !h->def_regular))
10576 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
10577 else
10578 {
10579 int symbol;
10580
10581 /* This symbol is local, or marked to become local. */
10582 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI
10583 || (globals->fdpic_p && !bfd_link_pic(info)));
10584 if (globals->root.target_os == is_symbian)
10585 {
10586 asection *osec;
10587
10588 /* On Symbian OS, the data segment and text segement
10589 can be relocated independently. Therefore, we
10590 must indicate the segment to which this
10591 relocation is relative. The BPABI allows us to
10592 use any symbol in the right segment; we just use
10593 the section symbol as it is convenient. (We
10594 cannot use the symbol given by "h" directly as it
10595 will not appear in the dynamic symbol table.)
10596
10597 Note that the dynamic linker ignores the section
10598 symbol value, so we don't subtract osec->vma
10599 from the emitted reloc addend. */
10600 if (sym_sec)
10601 osec = sym_sec->output_section;
10602 else
10603 osec = input_section->output_section;
10604 symbol = elf_section_data (osec)->dynindx;
10605 if (symbol == 0)
10606 {
10607 struct elf_link_hash_table *htab = elf_hash_table (info);
10608
10609 if ((osec->flags & SEC_READONLY) == 0
10610 && htab->data_index_section != NULL)
10611 osec = htab->data_index_section;
10612 else
10613 osec = htab->text_index_section;
10614 symbol = elf_section_data (osec)->dynindx;
10615 }
10616 BFD_ASSERT (symbol != 0);
10617 }
10618 else
10619 /* On SVR4-ish systems, the dynamic loader cannot
10620 relocate the text and data segments independently,
10621 so the symbol does not matter. */
10622 symbol = 0;
10623 if (dynreloc_st_type == STT_GNU_IFUNC)
10624 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
10625 to the .iplt entry. Instead, every non-call reference
10626 must use an R_ARM_IRELATIVE relocation to obtain the
10627 correct run-time address. */
10628 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
10629 else if (globals->fdpic_p && !bfd_link_pic(info))
10630 isrofixup = 1;
10631 else
10632 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
10633 if (globals->use_rel)
10634 relocate = TRUE;
10635 else
10636 outrel.r_addend += dynreloc_value;
10637 }
10638
10639 if (isrofixup)
10640 arm_elf_add_rofixup(output_bfd, globals->srofixup, outrel.r_offset);
10641 else
10642 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
10643
10644 /* If this reloc is against an external symbol, we do not want to
10645 fiddle with the addend. Otherwise, we need to include the symbol
10646 value so that it becomes an addend for the dynamic reloc. */
10647 if (! relocate)
10648 return bfd_reloc_ok;
10649
10650 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10651 contents, rel->r_offset,
10652 dynreloc_value, (bfd_vma) 0);
10653 }
10654 else switch (r_type)
10655 {
10656 case R_ARM_ABS12:
10657 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10658
10659 case R_ARM_XPC25: /* Arm BLX instruction. */
10660 case R_ARM_CALL:
10661 case R_ARM_JUMP24:
10662 case R_ARM_PC24: /* Arm B/BL instruction. */
10663 case R_ARM_PLT32:
10664 {
10665 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
10666
10667 if (r_type == R_ARM_XPC25)
10668 {
10669 /* Check for Arm calling Arm function. */
10670 /* FIXME: Should we translate the instruction into a BL
10671 instruction instead ? */
10672 if (branch_type != ST_BRANCH_TO_THUMB)
10673 _bfd_error_handler
10674 (_("\%pB: warning: %s BLX instruction targets"
10675 " %s function '%s'"),
10676 input_bfd, "ARM",
10677 "ARM", h ? h->root.root.string : "(local)");
10678 }
10679 else if (r_type == R_ARM_PC24)
10680 {
10681 /* Check for Arm calling Thumb function. */
10682 if (branch_type == ST_BRANCH_TO_THUMB)
10683 {
10684 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
10685 output_bfd, input_section,
10686 hit_data, sym_sec, rel->r_offset,
10687 signed_addend, value,
10688 error_message))
10689 return bfd_reloc_ok;
10690 else
10691 return bfd_reloc_dangerous;
10692 }
10693 }
10694
10695 /* Check if a stub has to be inserted because the
10696 destination is too far or we are changing mode. */
10697 if ( r_type == R_ARM_CALL
10698 || r_type == R_ARM_JUMP24
10699 || r_type == R_ARM_PLT32)
10700 {
10701 enum elf32_arm_stub_type stub_type = arm_stub_none;
10702 struct elf32_arm_link_hash_entry *hash;
10703
10704 hash = (struct elf32_arm_link_hash_entry *) h;
10705 stub_type = arm_type_of_stub (info, input_section, rel,
10706 st_type, &branch_type,
10707 hash, value, sym_sec,
10708 input_bfd, sym_name);
10709
10710 if (stub_type != arm_stub_none)
10711 {
10712 /* The target is out of reach, so redirect the
10713 branch to the local stub for this function. */
10714 stub_entry = elf32_arm_get_stub_entry (input_section,
10715 sym_sec, h,
10716 rel, globals,
10717 stub_type);
10718 {
10719 if (stub_entry != NULL)
10720 value = (stub_entry->stub_offset
10721 + stub_entry->stub_sec->output_offset
10722 + stub_entry->stub_sec->output_section->vma);
10723
10724 if (plt_offset != (bfd_vma) -1)
10725 *unresolved_reloc_p = FALSE;
10726 }
10727 }
10728 else
10729 {
10730 /* If the call goes through a PLT entry, make sure to
10731 check distance to the right destination address. */
10732 if (plt_offset != (bfd_vma) -1)
10733 {
10734 value = (splt->output_section->vma
10735 + splt->output_offset
10736 + plt_offset);
10737 *unresolved_reloc_p = FALSE;
10738 /* The PLT entry is in ARM mode, regardless of the
10739 target function. */
10740 branch_type = ST_BRANCH_TO_ARM;
10741 }
10742 }
10743 }
10744
10745 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
10746 where:
10747 S is the address of the symbol in the relocation.
10748 P is address of the instruction being relocated.
10749 A is the addend (extracted from the instruction) in bytes.
10750
10751 S is held in 'value'.
10752 P is the base address of the section containing the
10753 instruction plus the offset of the reloc into that
10754 section, ie:
10755 (input_section->output_section->vma +
10756 input_section->output_offset +
10757 rel->r_offset).
10758 A is the addend, converted into bytes, ie:
10759 (signed_addend * 4)
10760
10761 Note: None of these operations have knowledge of the pipeline
10762 size of the processor, thus it is up to the assembler to
10763 encode this information into the addend. */
10764 value -= (input_section->output_section->vma
10765 + input_section->output_offset);
10766 value -= rel->r_offset;
10767 if (globals->use_rel)
10768 value += (signed_addend << howto->size);
10769 else
10770 /* RELA addends do not have to be adjusted by howto->size. */
10771 value += signed_addend;
10772
10773 signed_addend = value;
10774 signed_addend >>= howto->rightshift;
10775
10776 /* A branch to an undefined weak symbol is turned into a jump to
10777 the next instruction unless a PLT entry will be created.
10778 Do the same for local undefined symbols (but not for STN_UNDEF).
10779 The jump to the next instruction is optimized as a NOP depending
10780 on the architecture. */
10781 if (h ? (h->root.type == bfd_link_hash_undefweak
10782 && plt_offset == (bfd_vma) -1)
10783 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
10784 {
10785 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
10786
10787 if (arch_has_arm_nop (globals))
10788 value |= 0x0320f000;
10789 else
10790 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
10791 }
10792 else
10793 {
10794 /* Perform a signed range check. */
10795 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
10796 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
10797 return bfd_reloc_overflow;
10798
10799 addend = (value & 2);
10800
10801 value = (signed_addend & howto->dst_mask)
10802 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
10803
10804 if (r_type == R_ARM_CALL)
10805 {
10806 /* Set the H bit in the BLX instruction. */
10807 if (branch_type == ST_BRANCH_TO_THUMB)
10808 {
10809 if (addend)
10810 value |= (1 << 24);
10811 else
10812 value &= ~(bfd_vma)(1 << 24);
10813 }
10814
10815 /* Select the correct instruction (BL or BLX). */
10816 /* Only if we are not handling a BL to a stub. In this
10817 case, mode switching is performed by the stub. */
10818 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
10819 value |= (1 << 28);
10820 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
10821 {
10822 value &= ~(bfd_vma)(1 << 28);
10823 value |= (1 << 24);
10824 }
10825 }
10826 }
10827 }
10828 break;
10829
10830 case R_ARM_ABS32:
10831 value += addend;
10832 if (branch_type == ST_BRANCH_TO_THUMB)
10833 value |= 1;
10834 break;
10835
10836 case R_ARM_ABS32_NOI:
10837 value += addend;
10838 break;
10839
10840 case R_ARM_REL32:
10841 value += addend;
10842 if (branch_type == ST_BRANCH_TO_THUMB)
10843 value |= 1;
10844 value -= (input_section->output_section->vma
10845 + input_section->output_offset + rel->r_offset);
10846 break;
10847
10848 case R_ARM_REL32_NOI:
10849 value += addend;
10850 value -= (input_section->output_section->vma
10851 + input_section->output_offset + rel->r_offset);
10852 break;
10853
10854 case R_ARM_PREL31:
10855 value -= (input_section->output_section->vma
10856 + input_section->output_offset + rel->r_offset);
10857 value += signed_addend;
10858 if (! h || h->root.type != bfd_link_hash_undefweak)
10859 {
10860 /* Check for overflow. */
10861 if ((value ^ (value >> 1)) & (1 << 30))
10862 return bfd_reloc_overflow;
10863 }
10864 value &= 0x7fffffff;
10865 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
10866 if (branch_type == ST_BRANCH_TO_THUMB)
10867 value |= 1;
10868 break;
10869 }
10870
10871 bfd_put_32 (input_bfd, value, hit_data);
10872 return bfd_reloc_ok;
10873
10874 case R_ARM_ABS8:
10875 /* PR 16202: Refectch the addend using the correct size. */
10876 if (globals->use_rel)
10877 addend = bfd_get_8 (input_bfd, hit_data);
10878 value += addend;
10879
10880 /* There is no way to tell whether the user intended to use a signed or
10881 unsigned addend. When checking for overflow we accept either,
10882 as specified by the AAELF. */
10883 if ((long) value > 0xff || (long) value < -0x80)
10884 return bfd_reloc_overflow;
10885
10886 bfd_put_8 (input_bfd, value, hit_data);
10887 return bfd_reloc_ok;
10888
10889 case R_ARM_ABS16:
10890 /* PR 16202: Refectch the addend using the correct size. */
10891 if (globals->use_rel)
10892 addend = bfd_get_16 (input_bfd, hit_data);
10893 value += addend;
10894
10895 /* See comment for R_ARM_ABS8. */
10896 if ((long) value > 0xffff || (long) value < -0x8000)
10897 return bfd_reloc_overflow;
10898
10899 bfd_put_16 (input_bfd, value, hit_data);
10900 return bfd_reloc_ok;
10901
10902 case R_ARM_THM_ABS5:
10903 /* Support ldr and str instructions for the thumb. */
10904 if (globals->use_rel)
10905 {
10906 /* Need to refetch addend. */
10907 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
10908 /* ??? Need to determine shift amount from operand size. */
10909 addend >>= howto->rightshift;
10910 }
10911 value += addend;
10912
10913 /* ??? Isn't value unsigned? */
10914 if ((long) value > 0x1f || (long) value < -0x10)
10915 return bfd_reloc_overflow;
10916
10917 /* ??? Value needs to be properly shifted into place first. */
10918 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
10919 bfd_put_16 (input_bfd, value, hit_data);
10920 return bfd_reloc_ok;
10921
10922 case R_ARM_THM_ALU_PREL_11_0:
10923 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
10924 {
10925 bfd_vma insn;
10926 bfd_signed_vma relocation;
10927
10928 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10929 | bfd_get_16 (input_bfd, hit_data + 2);
10930
10931 if (globals->use_rel)
10932 {
10933 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
10934 | ((insn & (1 << 26)) >> 15);
10935 if (insn & 0xf00000)
10936 signed_addend = -signed_addend;
10937 }
10938
10939 relocation = value + signed_addend;
10940 relocation -= Pa (input_section->output_section->vma
10941 + input_section->output_offset
10942 + rel->r_offset);
10943
10944 /* PR 21523: Use an absolute value. The user of this reloc will
10945 have already selected an ADD or SUB insn appropriately. */
10946 value = llabs (relocation);
10947
10948 if (value >= 0x1000)
10949 return bfd_reloc_overflow;
10950
10951 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
10952 if (branch_type == ST_BRANCH_TO_THUMB)
10953 value |= 1;
10954
10955 insn = (insn & 0xfb0f8f00) | (value & 0xff)
10956 | ((value & 0x700) << 4)
10957 | ((value & 0x800) << 15);
10958 if (relocation < 0)
10959 insn |= 0xa00000;
10960
10961 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10962 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10963
10964 return bfd_reloc_ok;
10965 }
10966
10967 case R_ARM_THM_PC8:
10968 /* PR 10073: This reloc is not generated by the GNU toolchain,
10969 but it is supported for compatibility with third party libraries
10970 generated by other compilers, specifically the ARM/IAR. */
10971 {
10972 bfd_vma insn;
10973 bfd_signed_vma relocation;
10974
10975 insn = bfd_get_16 (input_bfd, hit_data);
10976
10977 if (globals->use_rel)
10978 addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
10979
10980 relocation = value + addend;
10981 relocation -= Pa (input_section->output_section->vma
10982 + input_section->output_offset
10983 + rel->r_offset);
10984
10985 value = relocation;
10986
10987 /* We do not check for overflow of this reloc. Although strictly
10988 speaking this is incorrect, it appears to be necessary in order
10989 to work with IAR generated relocs. Since GCC and GAS do not
10990 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
10991 a problem for them. */
10992 value &= 0x3fc;
10993
10994 insn = (insn & 0xff00) | (value >> 2);
10995
10996 bfd_put_16 (input_bfd, insn, hit_data);
10997
10998 return bfd_reloc_ok;
10999 }
11000
11001 case R_ARM_THM_PC12:
11002 /* Corresponds to: ldr.w reg, [pc, #offset]. */
11003 {
11004 bfd_vma insn;
11005 bfd_signed_vma relocation;
11006
11007 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
11008 | bfd_get_16 (input_bfd, hit_data + 2);
11009
11010 if (globals->use_rel)
11011 {
11012 signed_addend = insn & 0xfff;
11013 if (!(insn & (1 << 23)))
11014 signed_addend = -signed_addend;
11015 }
11016
11017 relocation = value + signed_addend;
11018 relocation -= Pa (input_section->output_section->vma
11019 + input_section->output_offset
11020 + rel->r_offset);
11021
11022 value = relocation;
11023
11024 if (value >= 0x1000)
11025 return bfd_reloc_overflow;
11026
11027 insn = (insn & 0xff7ff000) | value;
11028 if (relocation >= 0)
11029 insn |= (1 << 23);
11030
11031 bfd_put_16 (input_bfd, insn >> 16, hit_data);
11032 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
11033
11034 return bfd_reloc_ok;
11035 }
11036
11037 case R_ARM_THM_XPC22:
11038 case R_ARM_THM_CALL:
11039 case R_ARM_THM_JUMP24:
11040 /* Thumb BL (branch long instruction). */
11041 {
11042 bfd_vma relocation;
11043 bfd_vma reloc_sign;
11044 bfd_boolean overflow = FALSE;
11045 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
11046 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
11047 bfd_signed_vma reloc_signed_max;
11048 bfd_signed_vma reloc_signed_min;
11049 bfd_vma check;
11050 bfd_signed_vma signed_check;
11051 int bitsize;
11052 const int thumb2 = using_thumb2 (globals);
11053 const int thumb2_bl = using_thumb2_bl (globals);
11054
11055 /* A branch to an undefined weak symbol is turned into a jump to
11056 the next instruction unless a PLT entry will be created.
11057 The jump to the next instruction is optimized as a NOP.W for
11058 Thumb-2 enabled architectures. */
11059 if (h && h->root.type == bfd_link_hash_undefweak
11060 && plt_offset == (bfd_vma) -1)
11061 {
11062 if (thumb2)
11063 {
11064 bfd_put_16 (input_bfd, 0xf3af, hit_data);
11065 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
11066 }
11067 else
11068 {
11069 bfd_put_16 (input_bfd, 0xe000, hit_data);
11070 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
11071 }
11072 return bfd_reloc_ok;
11073 }
11074
11075 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
11076 with Thumb-1) involving the J1 and J2 bits. */
11077 if (globals->use_rel)
11078 {
11079 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
11080 bfd_vma upper = upper_insn & 0x3ff;
11081 bfd_vma lower = lower_insn & 0x7ff;
11082 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
11083 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
11084 bfd_vma i1 = j1 ^ s ? 0 : 1;
11085 bfd_vma i2 = j2 ^ s ? 0 : 1;
11086
11087 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
11088 /* Sign extend. */
11089 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
11090
11091 signed_addend = addend;
11092 }
11093
11094 if (r_type == R_ARM_THM_XPC22)
11095 {
11096 /* Check for Thumb to Thumb call. */
11097 /* FIXME: Should we translate the instruction into a BL
11098 instruction instead ? */
11099 if (branch_type == ST_BRANCH_TO_THUMB)
11100 _bfd_error_handler
11101 (_("%pB: warning: %s BLX instruction targets"
11102 " %s function '%s'"),
11103 input_bfd, "Thumb",
11104 "Thumb", h ? h->root.root.string : "(local)");
11105 }
11106 else
11107 {
11108 /* If it is not a call to Thumb, assume call to Arm.
11109 If it is a call relative to a section name, then it is not a
11110 function call at all, but rather a long jump. Calls through
11111 the PLT do not require stubs. */
11112 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
11113 {
11114 if (globals->use_blx && r_type == R_ARM_THM_CALL)
11115 {
11116 /* Convert BL to BLX. */
11117 lower_insn = (lower_insn & ~0x1000) | 0x0800;
11118 }
11119 else if (( r_type != R_ARM_THM_CALL)
11120 && (r_type != R_ARM_THM_JUMP24))
11121 {
11122 if (elf32_thumb_to_arm_stub
11123 (info, sym_name, input_bfd, output_bfd, input_section,
11124 hit_data, sym_sec, rel->r_offset, signed_addend, value,
11125 error_message))
11126 return bfd_reloc_ok;
11127 else
11128 return bfd_reloc_dangerous;
11129 }
11130 }
11131 else if (branch_type == ST_BRANCH_TO_THUMB
11132 && globals->use_blx
11133 && r_type == R_ARM_THM_CALL)
11134 {
11135 /* Make sure this is a BL. */
11136 lower_insn |= 0x1800;
11137 }
11138 }
11139
11140 enum elf32_arm_stub_type stub_type = arm_stub_none;
11141 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
11142 {
11143 /* Check if a stub has to be inserted because the destination
11144 is too far. */
11145 struct elf32_arm_stub_hash_entry *stub_entry;
11146 struct elf32_arm_link_hash_entry *hash;
11147
11148 hash = (struct elf32_arm_link_hash_entry *) h;
11149
11150 stub_type = arm_type_of_stub (info, input_section, rel,
11151 st_type, &branch_type,
11152 hash, value, sym_sec,
11153 input_bfd, sym_name);
11154
11155 if (stub_type != arm_stub_none)
11156 {
11157 /* The target is out of reach or we are changing modes, so
11158 redirect the branch to the local stub for this
11159 function. */
11160 stub_entry = elf32_arm_get_stub_entry (input_section,
11161 sym_sec, h,
11162 rel, globals,
11163 stub_type);
11164 if (stub_entry != NULL)
11165 {
11166 value = (stub_entry->stub_offset
11167 + stub_entry->stub_sec->output_offset
11168 + stub_entry->stub_sec->output_section->vma);
11169
11170 if (plt_offset != (bfd_vma) -1)
11171 *unresolved_reloc_p = FALSE;
11172 }
11173
11174 /* If this call becomes a call to Arm, force BLX. */
11175 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
11176 {
11177 if ((stub_entry
11178 && !arm_stub_is_thumb (stub_entry->stub_type))
11179 || branch_type != ST_BRANCH_TO_THUMB)
11180 lower_insn = (lower_insn & ~0x1000) | 0x0800;
11181 }
11182 }
11183 }
11184
11185 /* Handle calls via the PLT. */
11186 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
11187 {
11188 value = (splt->output_section->vma
11189 + splt->output_offset
11190 + plt_offset);
11191
11192 if (globals->use_blx
11193 && r_type == R_ARM_THM_CALL
11194 && ! using_thumb_only (globals))
11195 {
11196 /* If the Thumb BLX instruction is available, convert
11197 the BL to a BLX instruction to call the ARM-mode
11198 PLT entry. */
11199 lower_insn = (lower_insn & ~0x1000) | 0x0800;
11200 branch_type = ST_BRANCH_TO_ARM;
11201 }
11202 else
11203 {
11204 if (! using_thumb_only (globals))
11205 /* Target the Thumb stub before the ARM PLT entry. */
11206 value -= PLT_THUMB_STUB_SIZE;
11207 branch_type = ST_BRANCH_TO_THUMB;
11208 }
11209 *unresolved_reloc_p = FALSE;
11210 }
11211
11212 relocation = value + signed_addend;
11213
11214 relocation -= (input_section->output_section->vma
11215 + input_section->output_offset
11216 + rel->r_offset);
11217
11218 check = relocation >> howto->rightshift;
11219
11220 /* If this is a signed value, the rightshift just dropped
11221 leading 1 bits (assuming twos complement). */
11222 if ((bfd_signed_vma) relocation >= 0)
11223 signed_check = check;
11224 else
11225 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
11226
11227 /* Calculate the permissable maximum and minimum values for
11228 this relocation according to whether we're relocating for
11229 Thumb-2 or not. */
11230 bitsize = howto->bitsize;
11231 if (!thumb2_bl)
11232 bitsize -= 2;
11233 reloc_signed_max = (1 << (bitsize - 1)) - 1;
11234 reloc_signed_min = ~reloc_signed_max;
11235
11236 /* Assumes two's complement. */
11237 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11238 overflow = TRUE;
11239
11240 if ((lower_insn & 0x5000) == 0x4000)
11241 /* For a BLX instruction, make sure that the relocation is rounded up
11242 to a word boundary. This follows the semantics of the instruction
11243 which specifies that bit 1 of the target address will come from bit
11244 1 of the base address. */
11245 relocation = (relocation + 2) & ~ 3;
11246
11247 /* Put RELOCATION back into the insn. Assumes two's complement.
11248 We use the Thumb-2 encoding, which is safe even if dealing with
11249 a Thumb-1 instruction by virtue of our overflow check above. */
11250 reloc_sign = (signed_check < 0) ? 1 : 0;
11251 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
11252 | ((relocation >> 12) & 0x3ff)
11253 | (reloc_sign << 10);
11254 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
11255 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
11256 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
11257 | ((relocation >> 1) & 0x7ff);
11258
11259 /* Put the relocated value back in the object file: */
11260 bfd_put_16 (input_bfd, upper_insn, hit_data);
11261 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11262
11263 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
11264 }
11265 break;
11266
11267 case R_ARM_THM_JUMP19:
11268 /* Thumb32 conditional branch instruction. */
11269 {
11270 bfd_vma relocation;
11271 bfd_boolean overflow = FALSE;
11272 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
11273 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
11274 bfd_signed_vma reloc_signed_max = 0xffffe;
11275 bfd_signed_vma reloc_signed_min = -0x100000;
11276 bfd_signed_vma signed_check;
11277 enum elf32_arm_stub_type stub_type = arm_stub_none;
11278 struct elf32_arm_stub_hash_entry *stub_entry;
11279 struct elf32_arm_link_hash_entry *hash;
11280
11281 /* Need to refetch the addend, reconstruct the top three bits,
11282 and squish the two 11 bit pieces together. */
11283 if (globals->use_rel)
11284 {
11285 bfd_vma S = (upper_insn & 0x0400) >> 10;
11286 bfd_vma upper = (upper_insn & 0x003f);
11287 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
11288 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
11289 bfd_vma lower = (lower_insn & 0x07ff);
11290
11291 upper |= J1 << 6;
11292 upper |= J2 << 7;
11293 upper |= (!S) << 8;
11294 upper -= 0x0100; /* Sign extend. */
11295
11296 addend = (upper << 12) | (lower << 1);
11297 signed_addend = addend;
11298 }
11299
11300 /* Handle calls via the PLT. */
11301 if (plt_offset != (bfd_vma) -1)
11302 {
11303 value = (splt->output_section->vma
11304 + splt->output_offset
11305 + plt_offset);
11306 /* Target the Thumb stub before the ARM PLT entry. */
11307 value -= PLT_THUMB_STUB_SIZE;
11308 *unresolved_reloc_p = FALSE;
11309 }
11310
11311 hash = (struct elf32_arm_link_hash_entry *)h;
11312
11313 stub_type = arm_type_of_stub (info, input_section, rel,
11314 st_type, &branch_type,
11315 hash, value, sym_sec,
11316 input_bfd, sym_name);
11317 if (stub_type != arm_stub_none)
11318 {
11319 stub_entry = elf32_arm_get_stub_entry (input_section,
11320 sym_sec, h,
11321 rel, globals,
11322 stub_type);
11323 if (stub_entry != NULL)
11324 {
11325 value = (stub_entry->stub_offset
11326 + stub_entry->stub_sec->output_offset
11327 + stub_entry->stub_sec->output_section->vma);
11328 }
11329 }
11330
11331 relocation = value + signed_addend;
11332 relocation -= (input_section->output_section->vma
11333 + input_section->output_offset
11334 + rel->r_offset);
11335 signed_check = (bfd_signed_vma) relocation;
11336
11337 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11338 overflow = TRUE;
11339
11340 /* Put RELOCATION back into the insn. */
11341 {
11342 bfd_vma S = (relocation & 0x00100000) >> 20;
11343 bfd_vma J2 = (relocation & 0x00080000) >> 19;
11344 bfd_vma J1 = (relocation & 0x00040000) >> 18;
11345 bfd_vma hi = (relocation & 0x0003f000) >> 12;
11346 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
11347
11348 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
11349 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
11350 }
11351
11352 /* Put the relocated value back in the object file: */
11353 bfd_put_16 (input_bfd, upper_insn, hit_data);
11354 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11355
11356 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
11357 }
11358
11359 case R_ARM_THM_JUMP11:
11360 case R_ARM_THM_JUMP8:
11361 case R_ARM_THM_JUMP6:
11362 /* Thumb B (branch) instruction). */
11363 {
11364 bfd_signed_vma relocation;
11365 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
11366 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
11367 bfd_signed_vma signed_check;
11368
11369 /* CZB cannot jump backward. */
11370 if (r_type == R_ARM_THM_JUMP6)
11371 reloc_signed_min = 0;
11372
11373 if (globals->use_rel)
11374 {
11375 /* Need to refetch addend. */
11376 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
11377 if (addend & ((howto->src_mask + 1) >> 1))
11378 {
11379 signed_addend = -1;
11380 signed_addend &= ~ howto->src_mask;
11381 signed_addend |= addend;
11382 }
11383 else
11384 signed_addend = addend;
11385 /* The value in the insn has been right shifted. We need to
11386 undo this, so that we can perform the address calculation
11387 in terms of bytes. */
11388 signed_addend <<= howto->rightshift;
11389 }
11390 relocation = value + signed_addend;
11391
11392 relocation -= (input_section->output_section->vma
11393 + input_section->output_offset
11394 + rel->r_offset);
11395
11396 relocation >>= howto->rightshift;
11397 signed_check = relocation;
11398
11399 if (r_type == R_ARM_THM_JUMP6)
11400 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
11401 else
11402 relocation &= howto->dst_mask;
11403 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
11404
11405 bfd_put_16 (input_bfd, relocation, hit_data);
11406
11407 /* Assumes two's complement. */
11408 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11409 return bfd_reloc_overflow;
11410
11411 return bfd_reloc_ok;
11412 }
11413
11414 case R_ARM_ALU_PCREL7_0:
11415 case R_ARM_ALU_PCREL15_8:
11416 case R_ARM_ALU_PCREL23_15:
11417 {
11418 bfd_vma insn;
11419 bfd_vma relocation;
11420
11421 insn = bfd_get_32 (input_bfd, hit_data);
11422 if (globals->use_rel)
11423 {
11424 /* Extract the addend. */
11425 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
11426 signed_addend = addend;
11427 }
11428 relocation = value + signed_addend;
11429
11430 relocation -= (input_section->output_section->vma
11431 + input_section->output_offset
11432 + rel->r_offset);
11433 insn = (insn & ~0xfff)
11434 | ((howto->bitpos << 7) & 0xf00)
11435 | ((relocation >> howto->bitpos) & 0xff);
11436 bfd_put_32 (input_bfd, value, hit_data);
11437 }
11438 return bfd_reloc_ok;
11439
11440 case R_ARM_GNU_VTINHERIT:
11441 case R_ARM_GNU_VTENTRY:
11442 return bfd_reloc_ok;
11443
11444 case R_ARM_GOTOFF32:
11445 /* Relocation is relative to the start of the
11446 global offset table. */
11447
11448 BFD_ASSERT (sgot != NULL);
11449 if (sgot == NULL)
11450 return bfd_reloc_notsupported;
11451
11452 /* If we are addressing a Thumb function, we need to adjust the
11453 address by one, so that attempts to call the function pointer will
11454 correctly interpret it as Thumb code. */
11455 if (branch_type == ST_BRANCH_TO_THUMB)
11456 value += 1;
11457
11458 /* Note that sgot->output_offset is not involved in this
11459 calculation. We always want the start of .got. If we
11460 define _GLOBAL_OFFSET_TABLE in a different way, as is
11461 permitted by the ABI, we might have to change this
11462 calculation. */
11463 value -= sgot->output_section->vma;
11464 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11465 contents, rel->r_offset, value,
11466 rel->r_addend);
11467
11468 case R_ARM_GOTPC:
11469 /* Use global offset table as symbol value. */
11470 BFD_ASSERT (sgot != NULL);
11471
11472 if (sgot == NULL)
11473 return bfd_reloc_notsupported;
11474
11475 *unresolved_reloc_p = FALSE;
11476 value = sgot->output_section->vma;
11477 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11478 contents, rel->r_offset, value,
11479 rel->r_addend);
11480
11481 case R_ARM_GOT32:
11482 case R_ARM_GOT_PREL:
11483 /* Relocation is to the entry for this symbol in the
11484 global offset table. */
11485 if (sgot == NULL)
11486 return bfd_reloc_notsupported;
11487
11488 if (dynreloc_st_type == STT_GNU_IFUNC
11489 && plt_offset != (bfd_vma) -1
11490 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
11491 {
11492 /* We have a relocation against a locally-binding STT_GNU_IFUNC
11493 symbol, and the relocation resolves directly to the runtime
11494 target rather than to the .iplt entry. This means that any
11495 .got entry would be the same value as the .igot.plt entry,
11496 so there's no point creating both. */
11497 sgot = globals->root.igotplt;
11498 value = sgot->output_offset + gotplt_offset;
11499 }
11500 else if (h != NULL)
11501 {
11502 bfd_vma off;
11503
11504 off = h->got.offset;
11505 BFD_ASSERT (off != (bfd_vma) -1);
11506 if ((off & 1) != 0)
11507 {
11508 /* We have already processsed one GOT relocation against
11509 this symbol. */
11510 off &= ~1;
11511 if (globals->root.dynamic_sections_created
11512 && !SYMBOL_REFERENCES_LOCAL (info, h))
11513 *unresolved_reloc_p = FALSE;
11514 }
11515 else
11516 {
11517 Elf_Internal_Rela outrel;
11518 int isrofixup = 0;
11519
11520 if (((h->dynindx != -1) || globals->fdpic_p)
11521 && !SYMBOL_REFERENCES_LOCAL (info, h))
11522 {
11523 /* If the symbol doesn't resolve locally in a static
11524 object, we have an undefined reference. If the
11525 symbol doesn't resolve locally in a dynamic object,
11526 it should be resolved by the dynamic linker. */
11527 if (globals->root.dynamic_sections_created)
11528 {
11529 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
11530 *unresolved_reloc_p = FALSE;
11531 }
11532 else
11533 outrel.r_info = 0;
11534 outrel.r_addend = 0;
11535 }
11536 else
11537 {
11538 if (dynreloc_st_type == STT_GNU_IFUNC)
11539 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11540 else if (bfd_link_pic (info)
11541 && !UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
11542 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11543 else
11544 {
11545 outrel.r_info = 0;
11546 if (globals->fdpic_p)
11547 isrofixup = 1;
11548 }
11549 outrel.r_addend = dynreloc_value;
11550 }
11551
11552 /* The GOT entry is initialized to zero by default.
11553 See if we should install a different value. */
11554 if (outrel.r_addend != 0
11555 && (globals->use_rel || outrel.r_info == 0))
11556 {
11557 bfd_put_32 (output_bfd, outrel.r_addend,
11558 sgot->contents + off);
11559 outrel.r_addend = 0;
11560 }
11561
11562 if (isrofixup)
11563 arm_elf_add_rofixup (output_bfd,
11564 elf32_arm_hash_table(info)->srofixup,
11565 sgot->output_section->vma
11566 + sgot->output_offset + off);
11567
11568 else if (outrel.r_info != 0)
11569 {
11570 outrel.r_offset = (sgot->output_section->vma
11571 + sgot->output_offset
11572 + off);
11573 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11574 }
11575
11576 h->got.offset |= 1;
11577 }
11578 value = sgot->output_offset + off;
11579 }
11580 else
11581 {
11582 bfd_vma off;
11583
11584 BFD_ASSERT (local_got_offsets != NULL
11585 && local_got_offsets[r_symndx] != (bfd_vma) -1);
11586
11587 off = local_got_offsets[r_symndx];
11588
11589 /* The offset must always be a multiple of 4. We use the
11590 least significant bit to record whether we have already
11591 generated the necessary reloc. */
11592 if ((off & 1) != 0)
11593 off &= ~1;
11594 else
11595 {
11596 Elf_Internal_Rela outrel;
11597 int isrofixup = 0;
11598
11599 if (dynreloc_st_type == STT_GNU_IFUNC)
11600 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11601 else if (bfd_link_pic (info))
11602 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11603 else
11604 {
11605 outrel.r_info = 0;
11606 if (globals->fdpic_p)
11607 isrofixup = 1;
11608 }
11609
11610 /* The GOT entry is initialized to zero by default.
11611 See if we should install a different value. */
11612 if (globals->use_rel || outrel.r_info == 0)
11613 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
11614
11615 if (isrofixup)
11616 arm_elf_add_rofixup (output_bfd,
11617 globals->srofixup,
11618 sgot->output_section->vma
11619 + sgot->output_offset + off);
11620
11621 else if (outrel.r_info != 0)
11622 {
11623 outrel.r_addend = addend + dynreloc_value;
11624 outrel.r_offset = (sgot->output_section->vma
11625 + sgot->output_offset
11626 + off);
11627 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11628 }
11629
11630 local_got_offsets[r_symndx] |= 1;
11631 }
11632
11633 value = sgot->output_offset + off;
11634 }
11635 if (r_type != R_ARM_GOT32)
11636 value += sgot->output_section->vma;
11637
11638 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11639 contents, rel->r_offset, value,
11640 rel->r_addend);
11641
11642 case R_ARM_TLS_LDO32:
11643 value = value - dtpoff_base (info);
11644
11645 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11646 contents, rel->r_offset, value,
11647 rel->r_addend);
11648
11649 case R_ARM_TLS_LDM32:
11650 case R_ARM_TLS_LDM32_FDPIC:
11651 {
11652 bfd_vma off;
11653
11654 if (sgot == NULL)
11655 abort ();
11656
11657 off = globals->tls_ldm_got.offset;
11658
11659 if ((off & 1) != 0)
11660 off &= ~1;
11661 else
11662 {
11663 /* If we don't know the module number, create a relocation
11664 for it. */
11665 if (bfd_link_dll (info))
11666 {
11667 Elf_Internal_Rela outrel;
11668
11669 if (srelgot == NULL)
11670 abort ();
11671
11672 outrel.r_addend = 0;
11673 outrel.r_offset = (sgot->output_section->vma
11674 + sgot->output_offset + off);
11675 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
11676
11677 if (globals->use_rel)
11678 bfd_put_32 (output_bfd, outrel.r_addend,
11679 sgot->contents + off);
11680
11681 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11682 }
11683 else
11684 bfd_put_32 (output_bfd, 1, sgot->contents + off);
11685
11686 globals->tls_ldm_got.offset |= 1;
11687 }
11688
11689 if (r_type == R_ARM_TLS_LDM32_FDPIC)
11690 {
11691 bfd_put_32(output_bfd,
11692 globals->root.sgot->output_offset + off,
11693 contents + rel->r_offset);
11694
11695 return bfd_reloc_ok;
11696 }
11697 else
11698 {
11699 value = sgot->output_section->vma + sgot->output_offset + off
11700 - (input_section->output_section->vma
11701 + input_section->output_offset + rel->r_offset);
11702
11703 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11704 contents, rel->r_offset, value,
11705 rel->r_addend);
11706 }
11707 }
11708
11709 case R_ARM_TLS_CALL:
11710 case R_ARM_THM_TLS_CALL:
11711 case R_ARM_TLS_GD32:
11712 case R_ARM_TLS_GD32_FDPIC:
11713 case R_ARM_TLS_IE32:
11714 case R_ARM_TLS_IE32_FDPIC:
11715 case R_ARM_TLS_GOTDESC:
11716 case R_ARM_TLS_DESCSEQ:
11717 case R_ARM_THM_TLS_DESCSEQ:
11718 {
11719 bfd_vma off, offplt;
11720 int indx = 0;
11721 char tls_type;
11722
11723 BFD_ASSERT (sgot != NULL);
11724
11725 if (h != NULL)
11726 {
11727 bfd_boolean dyn;
11728 dyn = globals->root.dynamic_sections_created;
11729 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
11730 bfd_link_pic (info),
11731 h)
11732 && (!bfd_link_pic (info)
11733 || !SYMBOL_REFERENCES_LOCAL (info, h)))
11734 {
11735 *unresolved_reloc_p = FALSE;
11736 indx = h->dynindx;
11737 }
11738 off = h->got.offset;
11739 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
11740 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
11741 }
11742 else
11743 {
11744 BFD_ASSERT (local_got_offsets != NULL);
11745 off = local_got_offsets[r_symndx];
11746 offplt = local_tlsdesc_gotents[r_symndx];
11747 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
11748 }
11749
11750 /* Linker relaxations happens from one of the
11751 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
11752 if (ELF32_R_TYPE(rel->r_info) != r_type)
11753 tls_type = GOT_TLS_IE;
11754
11755 BFD_ASSERT (tls_type != GOT_UNKNOWN);
11756
11757 if ((off & 1) != 0)
11758 off &= ~1;
11759 else
11760 {
11761 bfd_boolean need_relocs = FALSE;
11762 Elf_Internal_Rela outrel;
11763 int cur_off = off;
11764
11765 /* The GOT entries have not been initialized yet. Do it
11766 now, and emit any relocations. If both an IE GOT and a
11767 GD GOT are necessary, we emit the GD first. */
11768
11769 if ((bfd_link_dll (info) || indx != 0)
11770 && (h == NULL
11771 || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11772 && !resolved_to_zero)
11773 || h->root.type != bfd_link_hash_undefweak))
11774 {
11775 need_relocs = TRUE;
11776 BFD_ASSERT (srelgot != NULL);
11777 }
11778
11779 if (tls_type & GOT_TLS_GDESC)
11780 {
11781 bfd_byte *loc;
11782
11783 /* We should have relaxed, unless this is an undefined
11784 weak symbol. */
11785 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
11786 || bfd_link_dll (info));
11787 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
11788 <= globals->root.sgotplt->size);
11789
11790 outrel.r_addend = 0;
11791 outrel.r_offset = (globals->root.sgotplt->output_section->vma
11792 + globals->root.sgotplt->output_offset
11793 + offplt
11794 + globals->sgotplt_jump_table_size);
11795
11796 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
11797 sreloc = globals->root.srelplt;
11798 loc = sreloc->contents;
11799 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
11800 BFD_ASSERT (loc + RELOC_SIZE (globals)
11801 <= sreloc->contents + sreloc->size);
11802
11803 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
11804
11805 /* For globals, the first word in the relocation gets
11806 the relocation index and the top bit set, or zero,
11807 if we're binding now. For locals, it gets the
11808 symbol's offset in the tls section. */
11809 bfd_put_32 (output_bfd,
11810 !h ? value - elf_hash_table (info)->tls_sec->vma
11811 : info->flags & DF_BIND_NOW ? 0
11812 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
11813 globals->root.sgotplt->contents + offplt
11814 + globals->sgotplt_jump_table_size);
11815
11816 /* Second word in the relocation is always zero. */
11817 bfd_put_32 (output_bfd, 0,
11818 globals->root.sgotplt->contents + offplt
11819 + globals->sgotplt_jump_table_size + 4);
11820 }
11821 if (tls_type & GOT_TLS_GD)
11822 {
11823 if (need_relocs)
11824 {
11825 outrel.r_addend = 0;
11826 outrel.r_offset = (sgot->output_section->vma
11827 + sgot->output_offset
11828 + cur_off);
11829 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
11830
11831 if (globals->use_rel)
11832 bfd_put_32 (output_bfd, outrel.r_addend,
11833 sgot->contents + cur_off);
11834
11835 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11836
11837 if (indx == 0)
11838 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11839 sgot->contents + cur_off + 4);
11840 else
11841 {
11842 outrel.r_addend = 0;
11843 outrel.r_info = ELF32_R_INFO (indx,
11844 R_ARM_TLS_DTPOFF32);
11845 outrel.r_offset += 4;
11846
11847 if (globals->use_rel)
11848 bfd_put_32 (output_bfd, outrel.r_addend,
11849 sgot->contents + cur_off + 4);
11850
11851 elf32_arm_add_dynreloc (output_bfd, info,
11852 srelgot, &outrel);
11853 }
11854 }
11855 else
11856 {
11857 /* If we are not emitting relocations for a
11858 general dynamic reference, then we must be in a
11859 static link or an executable link with the
11860 symbol binding locally. Mark it as belonging
11861 to module 1, the executable. */
11862 bfd_put_32 (output_bfd, 1,
11863 sgot->contents + cur_off);
11864 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11865 sgot->contents + cur_off + 4);
11866 }
11867
11868 cur_off += 8;
11869 }
11870
11871 if (tls_type & GOT_TLS_IE)
11872 {
11873 if (need_relocs)
11874 {
11875 if (indx == 0)
11876 outrel.r_addend = value - dtpoff_base (info);
11877 else
11878 outrel.r_addend = 0;
11879 outrel.r_offset = (sgot->output_section->vma
11880 + sgot->output_offset
11881 + cur_off);
11882 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
11883
11884 if (globals->use_rel)
11885 bfd_put_32 (output_bfd, outrel.r_addend,
11886 sgot->contents + cur_off);
11887
11888 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11889 }
11890 else
11891 bfd_put_32 (output_bfd, tpoff (info, value),
11892 sgot->contents + cur_off);
11893 cur_off += 4;
11894 }
11895
11896 if (h != NULL)
11897 h->got.offset |= 1;
11898 else
11899 local_got_offsets[r_symndx] |= 1;
11900 }
11901
11902 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32 && r_type != R_ARM_TLS_GD32_FDPIC)
11903 off += 8;
11904 else if (tls_type & GOT_TLS_GDESC)
11905 off = offplt;
11906
11907 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
11908 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
11909 {
11910 bfd_signed_vma offset;
11911 /* TLS stubs are arm mode. The original symbol is a
11912 data object, so branch_type is bogus. */
11913 branch_type = ST_BRANCH_TO_ARM;
11914 enum elf32_arm_stub_type stub_type
11915 = arm_type_of_stub (info, input_section, rel,
11916 st_type, &branch_type,
11917 (struct elf32_arm_link_hash_entry *)h,
11918 globals->tls_trampoline, globals->root.splt,
11919 input_bfd, sym_name);
11920
11921 if (stub_type != arm_stub_none)
11922 {
11923 struct elf32_arm_stub_hash_entry *stub_entry
11924 = elf32_arm_get_stub_entry
11925 (input_section, globals->root.splt, 0, rel,
11926 globals, stub_type);
11927 offset = (stub_entry->stub_offset
11928 + stub_entry->stub_sec->output_offset
11929 + stub_entry->stub_sec->output_section->vma);
11930 }
11931 else
11932 offset = (globals->root.splt->output_section->vma
11933 + globals->root.splt->output_offset
11934 + globals->tls_trampoline);
11935
11936 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
11937 {
11938 unsigned long inst;
11939
11940 offset -= (input_section->output_section->vma
11941 + input_section->output_offset
11942 + rel->r_offset + 8);
11943
11944 inst = offset >> 2;
11945 inst &= 0x00ffffff;
11946 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
11947 }
11948 else
11949 {
11950 /* Thumb blx encodes the offset in a complicated
11951 fashion. */
11952 unsigned upper_insn, lower_insn;
11953 unsigned neg;
11954
11955 offset -= (input_section->output_section->vma
11956 + input_section->output_offset
11957 + rel->r_offset + 4);
11958
11959 if (stub_type != arm_stub_none
11960 && arm_stub_is_thumb (stub_type))
11961 {
11962 lower_insn = 0xd000;
11963 }
11964 else
11965 {
11966 lower_insn = 0xc000;
11967 /* Round up the offset to a word boundary. */
11968 offset = (offset + 2) & ~2;
11969 }
11970
11971 neg = offset < 0;
11972 upper_insn = (0xf000
11973 | ((offset >> 12) & 0x3ff)
11974 | (neg << 10));
11975 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
11976 | (((!((offset >> 22) & 1)) ^ neg) << 11)
11977 | ((offset >> 1) & 0x7ff);
11978 bfd_put_16 (input_bfd, upper_insn, hit_data);
11979 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11980 return bfd_reloc_ok;
11981 }
11982 }
11983 /* These relocations needs special care, as besides the fact
11984 they point somewhere in .gotplt, the addend must be
11985 adjusted accordingly depending on the type of instruction
11986 we refer to. */
11987 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
11988 {
11989 unsigned long data, insn;
11990 unsigned thumb;
11991
11992 data = bfd_get_signed_32 (input_bfd, hit_data);
11993 thumb = data & 1;
11994 data &= ~1ul;
11995
11996 if (thumb)
11997 {
11998 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
11999 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
12000 insn = (insn << 16)
12001 | bfd_get_16 (input_bfd,
12002 contents + rel->r_offset - data + 2);
12003 if ((insn & 0xf800c000) == 0xf000c000)
12004 /* bl/blx */
12005 value = -6;
12006 else if ((insn & 0xffffff00) == 0x4400)
12007 /* add */
12008 value = -5;
12009 else
12010 {
12011 _bfd_error_handler
12012 /* xgettext:c-format */
12013 (_("%pB(%pA+%#" PRIx64 "): "
12014 "unexpected %s instruction '%#lx' "
12015 "referenced by TLS_GOTDESC"),
12016 input_bfd, input_section, (uint64_t) rel->r_offset,
12017 "Thumb", insn);
12018 return bfd_reloc_notsupported;
12019 }
12020 }
12021 else
12022 {
12023 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
12024
12025 switch (insn >> 24)
12026 {
12027 case 0xeb: /* bl */
12028 case 0xfa: /* blx */
12029 value = -4;
12030 break;
12031
12032 case 0xe0: /* add */
12033 value = -8;
12034 break;
12035
12036 default:
12037 _bfd_error_handler
12038 /* xgettext:c-format */
12039 (_("%pB(%pA+%#" PRIx64 "): "
12040 "unexpected %s instruction '%#lx' "
12041 "referenced by TLS_GOTDESC"),
12042 input_bfd, input_section, (uint64_t) rel->r_offset,
12043 "ARM", insn);
12044 return bfd_reloc_notsupported;
12045 }
12046 }
12047
12048 value += ((globals->root.sgotplt->output_section->vma
12049 + globals->root.sgotplt->output_offset + off)
12050 - (input_section->output_section->vma
12051 + input_section->output_offset
12052 + rel->r_offset)
12053 + globals->sgotplt_jump_table_size);
12054 }
12055 else
12056 value = ((globals->root.sgot->output_section->vma
12057 + globals->root.sgot->output_offset + off)
12058 - (input_section->output_section->vma
12059 + input_section->output_offset + rel->r_offset));
12060
12061 if (globals->fdpic_p && (r_type == R_ARM_TLS_GD32_FDPIC ||
12062 r_type == R_ARM_TLS_IE32_FDPIC))
12063 {
12064 /* For FDPIC relocations, resolve to the offset of the GOT
12065 entry from the start of GOT. */
12066 bfd_put_32(output_bfd,
12067 globals->root.sgot->output_offset + off,
12068 contents + rel->r_offset);
12069
12070 return bfd_reloc_ok;
12071 }
12072 else
12073 {
12074 return _bfd_final_link_relocate (howto, input_bfd, input_section,
12075 contents, rel->r_offset, value,
12076 rel->r_addend);
12077 }
12078 }
12079
12080 case R_ARM_TLS_LE32:
12081 if (bfd_link_dll (info))
12082 {
12083 _bfd_error_handler
12084 /* xgettext:c-format */
12085 (_("%pB(%pA+%#" PRIx64 "): %s relocation not permitted "
12086 "in shared object"),
12087 input_bfd, input_section, (uint64_t) rel->r_offset, howto->name);
12088 return bfd_reloc_notsupported;
12089 }
12090 else
12091 value = tpoff (info, value);
12092
12093 return _bfd_final_link_relocate (howto, input_bfd, input_section,
12094 contents, rel->r_offset, value,
12095 rel->r_addend);
12096
12097 case R_ARM_V4BX:
12098 if (globals->fix_v4bx)
12099 {
12100 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12101
12102 /* Ensure that we have a BX instruction. */
12103 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
12104
12105 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
12106 {
12107 /* Branch to veneer. */
12108 bfd_vma glue_addr;
12109 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
12110 glue_addr -= input_section->output_section->vma
12111 + input_section->output_offset
12112 + rel->r_offset + 8;
12113 insn = (insn & 0xf0000000) | 0x0a000000
12114 | ((glue_addr >> 2) & 0x00ffffff);
12115 }
12116 else
12117 {
12118 /* Preserve Rm (lowest four bits) and the condition code
12119 (highest four bits). Other bits encode MOV PC,Rm. */
12120 insn = (insn & 0xf000000f) | 0x01a0f000;
12121 }
12122
12123 bfd_put_32 (input_bfd, insn, hit_data);
12124 }
12125 return bfd_reloc_ok;
12126
12127 case R_ARM_MOVW_ABS_NC:
12128 case R_ARM_MOVT_ABS:
12129 case R_ARM_MOVW_PREL_NC:
12130 case R_ARM_MOVT_PREL:
12131 /* Until we properly support segment-base-relative addressing then
12132 we assume the segment base to be zero, as for the group relocations.
12133 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
12134 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
12135 case R_ARM_MOVW_BREL_NC:
12136 case R_ARM_MOVW_BREL:
12137 case R_ARM_MOVT_BREL:
12138 {
12139 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12140
12141 if (globals->use_rel)
12142 {
12143 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
12144 signed_addend = (addend ^ 0x8000) - 0x8000;
12145 }
12146
12147 value += signed_addend;
12148
12149 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
12150 value -= (input_section->output_section->vma
12151 + input_section->output_offset + rel->r_offset);
12152
12153 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
12154 return bfd_reloc_overflow;
12155
12156 if (branch_type == ST_BRANCH_TO_THUMB)
12157 value |= 1;
12158
12159 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
12160 || r_type == R_ARM_MOVT_BREL)
12161 value >>= 16;
12162
12163 insn &= 0xfff0f000;
12164 insn |= value & 0xfff;
12165 insn |= (value & 0xf000) << 4;
12166 bfd_put_32 (input_bfd, insn, hit_data);
12167 }
12168 return bfd_reloc_ok;
12169
12170 case R_ARM_THM_MOVW_ABS_NC:
12171 case R_ARM_THM_MOVT_ABS:
12172 case R_ARM_THM_MOVW_PREL_NC:
12173 case R_ARM_THM_MOVT_PREL:
12174 /* Until we properly support segment-base-relative addressing then
12175 we assume the segment base to be zero, as for the above relocations.
12176 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
12177 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
12178 as R_ARM_THM_MOVT_ABS. */
12179 case R_ARM_THM_MOVW_BREL_NC:
12180 case R_ARM_THM_MOVW_BREL:
12181 case R_ARM_THM_MOVT_BREL:
12182 {
12183 bfd_vma insn;
12184
12185 insn = bfd_get_16 (input_bfd, hit_data) << 16;
12186 insn |= bfd_get_16 (input_bfd, hit_data + 2);
12187
12188 if (globals->use_rel)
12189 {
12190 addend = ((insn >> 4) & 0xf000)
12191 | ((insn >> 15) & 0x0800)
12192 | ((insn >> 4) & 0x0700)
12193 | (insn & 0x00ff);
12194 signed_addend = (addend ^ 0x8000) - 0x8000;
12195 }
12196
12197 value += signed_addend;
12198
12199 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
12200 value -= (input_section->output_section->vma
12201 + input_section->output_offset + rel->r_offset);
12202
12203 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
12204 return bfd_reloc_overflow;
12205
12206 if (branch_type == ST_BRANCH_TO_THUMB)
12207 value |= 1;
12208
12209 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
12210 || r_type == R_ARM_THM_MOVT_BREL)
12211 value >>= 16;
12212
12213 insn &= 0xfbf08f00;
12214 insn |= (value & 0xf000) << 4;
12215 insn |= (value & 0x0800) << 15;
12216 insn |= (value & 0x0700) << 4;
12217 insn |= (value & 0x00ff);
12218
12219 bfd_put_16 (input_bfd, insn >> 16, hit_data);
12220 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
12221 }
12222 return bfd_reloc_ok;
12223
12224 case R_ARM_ALU_PC_G0_NC:
12225 case R_ARM_ALU_PC_G1_NC:
12226 case R_ARM_ALU_PC_G0:
12227 case R_ARM_ALU_PC_G1:
12228 case R_ARM_ALU_PC_G2:
12229 case R_ARM_ALU_SB_G0_NC:
12230 case R_ARM_ALU_SB_G1_NC:
12231 case R_ARM_ALU_SB_G0:
12232 case R_ARM_ALU_SB_G1:
12233 case R_ARM_ALU_SB_G2:
12234 {
12235 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12236 bfd_vma pc = input_section->output_section->vma
12237 + input_section->output_offset + rel->r_offset;
12238 /* sb is the origin of the *segment* containing the symbol. */
12239 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12240 bfd_vma residual;
12241 bfd_vma g_n;
12242 bfd_signed_vma signed_value;
12243 int group = 0;
12244
12245 /* Determine which group of bits to select. */
12246 switch (r_type)
12247 {
12248 case R_ARM_ALU_PC_G0_NC:
12249 case R_ARM_ALU_PC_G0:
12250 case R_ARM_ALU_SB_G0_NC:
12251 case R_ARM_ALU_SB_G0:
12252 group = 0;
12253 break;
12254
12255 case R_ARM_ALU_PC_G1_NC:
12256 case R_ARM_ALU_PC_G1:
12257 case R_ARM_ALU_SB_G1_NC:
12258 case R_ARM_ALU_SB_G1:
12259 group = 1;
12260 break;
12261
12262 case R_ARM_ALU_PC_G2:
12263 case R_ARM_ALU_SB_G2:
12264 group = 2;
12265 break;
12266
12267 default:
12268 abort ();
12269 }
12270
12271 /* If REL, extract the addend from the insn. If RELA, it will
12272 have already been fetched for us. */
12273 if (globals->use_rel)
12274 {
12275 int negative;
12276 bfd_vma constant = insn & 0xff;
12277 bfd_vma rotation = (insn & 0xf00) >> 8;
12278
12279 if (rotation == 0)
12280 signed_addend = constant;
12281 else
12282 {
12283 /* Compensate for the fact that in the instruction, the
12284 rotation is stored in multiples of 2 bits. */
12285 rotation *= 2;
12286
12287 /* Rotate "constant" right by "rotation" bits. */
12288 signed_addend = (constant >> rotation) |
12289 (constant << (8 * sizeof (bfd_vma) - rotation));
12290 }
12291
12292 /* Determine if the instruction is an ADD or a SUB.
12293 (For REL, this determines the sign of the addend.) */
12294 negative = identify_add_or_sub (insn);
12295 if (negative == 0)
12296 {
12297 _bfd_error_handler
12298 /* xgettext:c-format */
12299 (_("%pB(%pA+%#" PRIx64 "): only ADD or SUB instructions "
12300 "are allowed for ALU group relocations"),
12301 input_bfd, input_section, (uint64_t) rel->r_offset);
12302 return bfd_reloc_overflow;
12303 }
12304
12305 signed_addend *= negative;
12306 }
12307
12308 /* Compute the value (X) to go in the place. */
12309 if (r_type == R_ARM_ALU_PC_G0_NC
12310 || r_type == R_ARM_ALU_PC_G1_NC
12311 || r_type == R_ARM_ALU_PC_G0
12312 || r_type == R_ARM_ALU_PC_G1
12313 || r_type == R_ARM_ALU_PC_G2)
12314 /* PC relative. */
12315 signed_value = value - pc + signed_addend;
12316 else
12317 /* Section base relative. */
12318 signed_value = value - sb + signed_addend;
12319
12320 /* If the target symbol is a Thumb function, then set the
12321 Thumb bit in the address. */
12322 if (branch_type == ST_BRANCH_TO_THUMB)
12323 signed_value |= 1;
12324
12325 /* Calculate the value of the relevant G_n, in encoded
12326 constant-with-rotation format. */
12327 g_n = calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12328 group, &residual);
12329
12330 /* Check for overflow if required. */
12331 if ((r_type == R_ARM_ALU_PC_G0
12332 || r_type == R_ARM_ALU_PC_G1
12333 || r_type == R_ARM_ALU_PC_G2
12334 || r_type == R_ARM_ALU_SB_G0
12335 || r_type == R_ARM_ALU_SB_G1
12336 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
12337 {
12338 _bfd_error_handler
12339 /* xgettext:c-format */
12340 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12341 "splitting %#" PRIx64 " for group relocation %s"),
12342 input_bfd, input_section, (uint64_t) rel->r_offset,
12343 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12344 howto->name);
12345 return bfd_reloc_overflow;
12346 }
12347
12348 /* Mask out the value and the ADD/SUB part of the opcode; take care
12349 not to destroy the S bit. */
12350 insn &= 0xff1ff000;
12351
12352 /* Set the opcode according to whether the value to go in the
12353 place is negative. */
12354 if (signed_value < 0)
12355 insn |= 1 << 22;
12356 else
12357 insn |= 1 << 23;
12358
12359 /* Encode the offset. */
12360 insn |= g_n;
12361
12362 bfd_put_32 (input_bfd, insn, hit_data);
12363 }
12364 return bfd_reloc_ok;
12365
12366 case R_ARM_LDR_PC_G0:
12367 case R_ARM_LDR_PC_G1:
12368 case R_ARM_LDR_PC_G2:
12369 case R_ARM_LDR_SB_G0:
12370 case R_ARM_LDR_SB_G1:
12371 case R_ARM_LDR_SB_G2:
12372 {
12373 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12374 bfd_vma pc = input_section->output_section->vma
12375 + input_section->output_offset + rel->r_offset;
12376 /* sb is the origin of the *segment* containing the symbol. */
12377 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12378 bfd_vma residual;
12379 bfd_signed_vma signed_value;
12380 int group = 0;
12381
12382 /* Determine which groups of bits to calculate. */
12383 switch (r_type)
12384 {
12385 case R_ARM_LDR_PC_G0:
12386 case R_ARM_LDR_SB_G0:
12387 group = 0;
12388 break;
12389
12390 case R_ARM_LDR_PC_G1:
12391 case R_ARM_LDR_SB_G1:
12392 group = 1;
12393 break;
12394
12395 case R_ARM_LDR_PC_G2:
12396 case R_ARM_LDR_SB_G2:
12397 group = 2;
12398 break;
12399
12400 default:
12401 abort ();
12402 }
12403
12404 /* If REL, extract the addend from the insn. If RELA, it will
12405 have already been fetched for us. */
12406 if (globals->use_rel)
12407 {
12408 int negative = (insn & (1 << 23)) ? 1 : -1;
12409 signed_addend = negative * (insn & 0xfff);
12410 }
12411
12412 /* Compute the value (X) to go in the place. */
12413 if (r_type == R_ARM_LDR_PC_G0
12414 || r_type == R_ARM_LDR_PC_G1
12415 || r_type == R_ARM_LDR_PC_G2)
12416 /* PC relative. */
12417 signed_value = value - pc + signed_addend;
12418 else
12419 /* Section base relative. */
12420 signed_value = value - sb + signed_addend;
12421
12422 /* Calculate the value of the relevant G_{n-1} to obtain
12423 the residual at that stage. */
12424 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12425 group - 1, &residual);
12426
12427 /* Check for overflow. */
12428 if (residual >= 0x1000)
12429 {
12430 _bfd_error_handler
12431 /* xgettext:c-format */
12432 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12433 "splitting %#" PRIx64 " for group relocation %s"),
12434 input_bfd, input_section, (uint64_t) rel->r_offset,
12435 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12436 howto->name);
12437 return bfd_reloc_overflow;
12438 }
12439
12440 /* Mask out the value and U bit. */
12441 insn &= 0xff7ff000;
12442
12443 /* Set the U bit if the value to go in the place is non-negative. */
12444 if (signed_value >= 0)
12445 insn |= 1 << 23;
12446
12447 /* Encode the offset. */
12448 insn |= residual;
12449
12450 bfd_put_32 (input_bfd, insn, hit_data);
12451 }
12452 return bfd_reloc_ok;
12453
12454 case R_ARM_LDRS_PC_G0:
12455 case R_ARM_LDRS_PC_G1:
12456 case R_ARM_LDRS_PC_G2:
12457 case R_ARM_LDRS_SB_G0:
12458 case R_ARM_LDRS_SB_G1:
12459 case R_ARM_LDRS_SB_G2:
12460 {
12461 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12462 bfd_vma pc = input_section->output_section->vma
12463 + input_section->output_offset + rel->r_offset;
12464 /* sb is the origin of the *segment* containing the symbol. */
12465 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12466 bfd_vma residual;
12467 bfd_signed_vma signed_value;
12468 int group = 0;
12469
12470 /* Determine which groups of bits to calculate. */
12471 switch (r_type)
12472 {
12473 case R_ARM_LDRS_PC_G0:
12474 case R_ARM_LDRS_SB_G0:
12475 group = 0;
12476 break;
12477
12478 case R_ARM_LDRS_PC_G1:
12479 case R_ARM_LDRS_SB_G1:
12480 group = 1;
12481 break;
12482
12483 case R_ARM_LDRS_PC_G2:
12484 case R_ARM_LDRS_SB_G2:
12485 group = 2;
12486 break;
12487
12488 default:
12489 abort ();
12490 }
12491
12492 /* If REL, extract the addend from the insn. If RELA, it will
12493 have already been fetched for us. */
12494 if (globals->use_rel)
12495 {
12496 int negative = (insn & (1 << 23)) ? 1 : -1;
12497 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
12498 }
12499
12500 /* Compute the value (X) to go in the place. */
12501 if (r_type == R_ARM_LDRS_PC_G0
12502 || r_type == R_ARM_LDRS_PC_G1
12503 || r_type == R_ARM_LDRS_PC_G2)
12504 /* PC relative. */
12505 signed_value = value - pc + signed_addend;
12506 else
12507 /* Section base relative. */
12508 signed_value = value - sb + signed_addend;
12509
12510 /* Calculate the value of the relevant G_{n-1} to obtain
12511 the residual at that stage. */
12512 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12513 group - 1, &residual);
12514
12515 /* Check for overflow. */
12516 if (residual >= 0x100)
12517 {
12518 _bfd_error_handler
12519 /* xgettext:c-format */
12520 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12521 "splitting %#" PRIx64 " for group relocation %s"),
12522 input_bfd, input_section, (uint64_t) rel->r_offset,
12523 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12524 howto->name);
12525 return bfd_reloc_overflow;
12526 }
12527
12528 /* Mask out the value and U bit. */
12529 insn &= 0xff7ff0f0;
12530
12531 /* Set the U bit if the value to go in the place is non-negative. */
12532 if (signed_value >= 0)
12533 insn |= 1 << 23;
12534
12535 /* Encode the offset. */
12536 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
12537
12538 bfd_put_32 (input_bfd, insn, hit_data);
12539 }
12540 return bfd_reloc_ok;
12541
12542 case R_ARM_LDC_PC_G0:
12543 case R_ARM_LDC_PC_G1:
12544 case R_ARM_LDC_PC_G2:
12545 case R_ARM_LDC_SB_G0:
12546 case R_ARM_LDC_SB_G1:
12547 case R_ARM_LDC_SB_G2:
12548 {
12549 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12550 bfd_vma pc = input_section->output_section->vma
12551 + input_section->output_offset + rel->r_offset;
12552 /* sb is the origin of the *segment* containing the symbol. */
12553 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12554 bfd_vma residual;
12555 bfd_signed_vma signed_value;
12556 int group = 0;
12557
12558 /* Determine which groups of bits to calculate. */
12559 switch (r_type)
12560 {
12561 case R_ARM_LDC_PC_G0:
12562 case R_ARM_LDC_SB_G0:
12563 group = 0;
12564 break;
12565
12566 case R_ARM_LDC_PC_G1:
12567 case R_ARM_LDC_SB_G1:
12568 group = 1;
12569 break;
12570
12571 case R_ARM_LDC_PC_G2:
12572 case R_ARM_LDC_SB_G2:
12573 group = 2;
12574 break;
12575
12576 default:
12577 abort ();
12578 }
12579
12580 /* If REL, extract the addend from the insn. If RELA, it will
12581 have already been fetched for us. */
12582 if (globals->use_rel)
12583 {
12584 int negative = (insn & (1 << 23)) ? 1 : -1;
12585 signed_addend = negative * ((insn & 0xff) << 2);
12586 }
12587
12588 /* Compute the value (X) to go in the place. */
12589 if (r_type == R_ARM_LDC_PC_G0
12590 || r_type == R_ARM_LDC_PC_G1
12591 || r_type == R_ARM_LDC_PC_G2)
12592 /* PC relative. */
12593 signed_value = value - pc + signed_addend;
12594 else
12595 /* Section base relative. */
12596 signed_value = value - sb + signed_addend;
12597
12598 /* Calculate the value of the relevant G_{n-1} to obtain
12599 the residual at that stage. */
12600 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12601 group - 1, &residual);
12602
12603 /* Check for overflow. (The absolute value to go in the place must be
12604 divisible by four and, after having been divided by four, must
12605 fit in eight bits.) */
12606 if ((residual & 0x3) != 0 || residual >= 0x400)
12607 {
12608 _bfd_error_handler
12609 /* xgettext:c-format */
12610 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12611 "splitting %#" PRIx64 " for group relocation %s"),
12612 input_bfd, input_section, (uint64_t) rel->r_offset,
12613 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12614 howto->name);
12615 return bfd_reloc_overflow;
12616 }
12617
12618 /* Mask out the value and U bit. */
12619 insn &= 0xff7fff00;
12620
12621 /* Set the U bit if the value to go in the place is non-negative. */
12622 if (signed_value >= 0)
12623 insn |= 1 << 23;
12624
12625 /* Encode the offset. */
12626 insn |= residual >> 2;
12627
12628 bfd_put_32 (input_bfd, insn, hit_data);
12629 }
12630 return bfd_reloc_ok;
12631
12632 case R_ARM_THM_ALU_ABS_G0_NC:
12633 case R_ARM_THM_ALU_ABS_G1_NC:
12634 case R_ARM_THM_ALU_ABS_G2_NC:
12635 case R_ARM_THM_ALU_ABS_G3_NC:
12636 {
12637 const int shift_array[4] = {0, 8, 16, 24};
12638 bfd_vma insn = bfd_get_16 (input_bfd, hit_data);
12639 bfd_vma addr = value;
12640 int shift = shift_array[r_type - R_ARM_THM_ALU_ABS_G0_NC];
12641
12642 /* Compute address. */
12643 if (globals->use_rel)
12644 signed_addend = insn & 0xff;
12645 addr += signed_addend;
12646 if (branch_type == ST_BRANCH_TO_THUMB)
12647 addr |= 1;
12648 /* Clean imm8 insn. */
12649 insn &= 0xff00;
12650 /* And update with correct part of address. */
12651 insn |= (addr >> shift) & 0xff;
12652 /* Update insn. */
12653 bfd_put_16 (input_bfd, insn, hit_data);
12654 }
12655
12656 *unresolved_reloc_p = FALSE;
12657 return bfd_reloc_ok;
12658
12659 case R_ARM_GOTOFFFUNCDESC:
12660 {
12661 if (h == NULL)
12662 {
12663 struct fdpic_local *local_fdpic_cnts = elf32_arm_local_fdpic_cnts(input_bfd);
12664 int dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12665 int offset = local_fdpic_cnts[r_symndx].funcdesc_offset & ~1;
12666 bfd_vma addr = dynreloc_value - sym_sec->output_section->vma;
12667 bfd_vma seg = -1;
12668
12669 if (bfd_link_pic(info) && dynindx == 0)
12670 abort();
12671
12672 /* Resolve relocation. */
12673 bfd_put_32(output_bfd, (offset + sgot->output_offset)
12674 , contents + rel->r_offset);
12675 /* Emit R_ARM_FUNCDESC_VALUE or two fixups on funcdesc if
12676 not done yet. */
12677 arm_elf_fill_funcdesc(output_bfd, info,
12678 &local_fdpic_cnts[r_symndx].funcdesc_offset,
12679 dynindx, offset, addr, dynreloc_value, seg);
12680 }
12681 else
12682 {
12683 int dynindx;
12684 int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
12685 bfd_vma addr;
12686 bfd_vma seg = -1;
12687
12688 /* For static binaries, sym_sec can be null. */
12689 if (sym_sec)
12690 {
12691 dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12692 addr = dynreloc_value - sym_sec->output_section->vma;
12693 }
12694 else
12695 {
12696 dynindx = 0;
12697 addr = 0;
12698 }
12699
12700 if (bfd_link_pic(info) && dynindx == 0)
12701 abort();
12702
12703 /* This case cannot occur since funcdesc is allocated by
12704 the dynamic loader so we cannot resolve the relocation. */
12705 if (h->dynindx != -1)
12706 abort();
12707
12708 /* Resolve relocation. */
12709 bfd_put_32(output_bfd, (offset + sgot->output_offset),
12710 contents + rel->r_offset);
12711 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12712 arm_elf_fill_funcdesc(output_bfd, info,
12713 &eh->fdpic_cnts.funcdesc_offset,
12714 dynindx, offset, addr, dynreloc_value, seg);
12715 }
12716 }
12717 *unresolved_reloc_p = FALSE;
12718 return bfd_reloc_ok;
12719
12720 case R_ARM_GOTFUNCDESC:
12721 {
12722 if (h != NULL)
12723 {
12724 Elf_Internal_Rela outrel;
12725
12726 /* Resolve relocation. */
12727 bfd_put_32(output_bfd, ((eh->fdpic_cnts.gotfuncdesc_offset & ~1)
12728 + sgot->output_offset),
12729 contents + rel->r_offset);
12730 /* Add funcdesc and associated R_ARM_FUNCDESC_VALUE. */
12731 if(h->dynindx == -1)
12732 {
12733 int dynindx;
12734 int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
12735 bfd_vma addr;
12736 bfd_vma seg = -1;
12737
12738 /* For static binaries sym_sec can be null. */
12739 if (sym_sec)
12740 {
12741 dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12742 addr = dynreloc_value - sym_sec->output_section->vma;
12743 }
12744 else
12745 {
12746 dynindx = 0;
12747 addr = 0;
12748 }
12749
12750 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12751 arm_elf_fill_funcdesc(output_bfd, info,
12752 &eh->fdpic_cnts.funcdesc_offset,
12753 dynindx, offset, addr, dynreloc_value, seg);
12754 }
12755
12756 /* Add a dynamic relocation on GOT entry if not already done. */
12757 if ((eh->fdpic_cnts.gotfuncdesc_offset & 1) == 0)
12758 {
12759 if (h->dynindx == -1)
12760 {
12761 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12762 if (h->root.type == bfd_link_hash_undefweak)
12763 bfd_put_32(output_bfd, 0, sgot->contents
12764 + (eh->fdpic_cnts.gotfuncdesc_offset & ~1));
12765 else
12766 bfd_put_32(output_bfd, sgot->output_section->vma
12767 + sgot->output_offset
12768 + (eh->fdpic_cnts.funcdesc_offset & ~1),
12769 sgot->contents
12770 + (eh->fdpic_cnts.gotfuncdesc_offset & ~1));
12771 }
12772 else
12773 {
12774 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_FUNCDESC);
12775 }
12776 outrel.r_offset = sgot->output_section->vma
12777 + sgot->output_offset
12778 + (eh->fdpic_cnts.gotfuncdesc_offset & ~1);
12779 outrel.r_addend = 0;
12780 if (h->dynindx == -1 && !bfd_link_pic(info))
12781 if (h->root.type == bfd_link_hash_undefweak)
12782 arm_elf_add_rofixup(output_bfd, globals->srofixup, -1);
12783 else
12784 arm_elf_add_rofixup(output_bfd, globals->srofixup,
12785 outrel.r_offset);
12786 else
12787 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12788 eh->fdpic_cnts.gotfuncdesc_offset |= 1;
12789 }
12790 }
12791 else
12792 {
12793 /* Such relocation on static function should not have been
12794 emitted by the compiler. */
12795 abort();
12796 }
12797 }
12798 *unresolved_reloc_p = FALSE;
12799 return bfd_reloc_ok;
12800
12801 case R_ARM_FUNCDESC:
12802 {
12803 if (h == NULL)
12804 {
12805 struct fdpic_local *local_fdpic_cnts = elf32_arm_local_fdpic_cnts(input_bfd);
12806 Elf_Internal_Rela outrel;
12807 int dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12808 int offset = local_fdpic_cnts[r_symndx].funcdesc_offset & ~1;
12809 bfd_vma addr = dynreloc_value - sym_sec->output_section->vma;
12810 bfd_vma seg = -1;
12811
12812 if (bfd_link_pic(info) && dynindx == 0)
12813 abort();
12814
12815 /* Replace static FUNCDESC relocation with a
12816 R_ARM_RELATIVE dynamic relocation or with a rofixup for
12817 executable. */
12818 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12819 outrel.r_offset = input_section->output_section->vma
12820 + input_section->output_offset + rel->r_offset;
12821 outrel.r_addend = 0;
12822 if (bfd_link_pic(info))
12823 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12824 else
12825 arm_elf_add_rofixup(output_bfd, globals->srofixup, outrel.r_offset);
12826
12827 bfd_put_32 (input_bfd, sgot->output_section->vma
12828 + sgot->output_offset + offset, hit_data);
12829
12830 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12831 arm_elf_fill_funcdesc(output_bfd, info,
12832 &local_fdpic_cnts[r_symndx].funcdesc_offset,
12833 dynindx, offset, addr, dynreloc_value, seg);
12834 }
12835 else
12836 {
12837 if (h->dynindx == -1)
12838 {
12839 int dynindx;
12840 int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
12841 bfd_vma addr;
12842 bfd_vma seg = -1;
12843 Elf_Internal_Rela outrel;
12844
12845 /* For static binaries sym_sec can be null. */
12846 if (sym_sec)
12847 {
12848 dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12849 addr = dynreloc_value - sym_sec->output_section->vma;
12850 }
12851 else
12852 {
12853 dynindx = 0;
12854 addr = 0;
12855 }
12856
12857 if (bfd_link_pic(info) && dynindx == 0)
12858 abort();
12859
12860 /* Replace static FUNCDESC relocation with a
12861 R_ARM_RELATIVE dynamic relocation. */
12862 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12863 outrel.r_offset = input_section->output_section->vma
12864 + input_section->output_offset + rel->r_offset;
12865 outrel.r_addend = 0;
12866 if (bfd_link_pic(info))
12867 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12868 else
12869 arm_elf_add_rofixup(output_bfd, globals->srofixup, outrel.r_offset);
12870
12871 bfd_put_32 (input_bfd, sgot->output_section->vma
12872 + sgot->output_offset + offset, hit_data);
12873
12874 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12875 arm_elf_fill_funcdesc(output_bfd, info,
12876 &eh->fdpic_cnts.funcdesc_offset,
12877 dynindx, offset, addr, dynreloc_value, seg);
12878 }
12879 else
12880 {
12881 Elf_Internal_Rela outrel;
12882
12883 /* Add a dynamic relocation. */
12884 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_FUNCDESC);
12885 outrel.r_offset = input_section->output_section->vma
12886 + input_section->output_offset + rel->r_offset;
12887 outrel.r_addend = 0;
12888 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12889 }
12890 }
12891 }
12892 *unresolved_reloc_p = FALSE;
12893 return bfd_reloc_ok;
12894
12895 case R_ARM_THM_BF16:
12896 {
12897 bfd_vma relocation;
12898 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
12899 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
12900
12901 if (globals->use_rel)
12902 {
12903 bfd_vma immA = (upper_insn & 0x001f);
12904 bfd_vma immB = (lower_insn & 0x07fe) >> 1;
12905 bfd_vma immC = (lower_insn & 0x0800) >> 11;
12906 addend = (immA << 12);
12907 addend |= (immB << 2);
12908 addend |= (immC << 1);
12909 addend |= 1;
12910 /* Sign extend. */
12911 signed_addend = (addend & 0x10000) ? addend - (1 << 17) : addend;
12912 }
12913
12914 relocation = value + signed_addend;
12915 relocation -= (input_section->output_section->vma
12916 + input_section->output_offset
12917 + rel->r_offset);
12918
12919 /* Put RELOCATION back into the insn. */
12920 {
12921 bfd_vma immA = (relocation & 0x0001f000) >> 12;
12922 bfd_vma immB = (relocation & 0x00000ffc) >> 2;
12923 bfd_vma immC = (relocation & 0x00000002) >> 1;
12924
12925 upper_insn = (upper_insn & 0xffe0) | immA;
12926 lower_insn = (lower_insn & 0xf001) | (immC << 11) | (immB << 1);
12927 }
12928
12929 /* Put the relocated value back in the object file: */
12930 bfd_put_16 (input_bfd, upper_insn, hit_data);
12931 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
12932
12933 return bfd_reloc_ok;
12934 }
12935
12936 case R_ARM_THM_BF12:
12937 {
12938 bfd_vma relocation;
12939 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
12940 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
12941
12942 if (globals->use_rel)
12943 {
12944 bfd_vma immA = (upper_insn & 0x0001);
12945 bfd_vma immB = (lower_insn & 0x07fe) >> 1;
12946 bfd_vma immC = (lower_insn & 0x0800) >> 11;
12947 addend = (immA << 12);
12948 addend |= (immB << 2);
12949 addend |= (immC << 1);
12950 addend |= 1;
12951 /* Sign extend. */
12952 addend = (addend & 0x1000) ? addend - (1 << 13) : addend;
12953 signed_addend = addend;
12954 }
12955
12956 relocation = value + signed_addend;
12957 relocation -= (input_section->output_section->vma
12958 + input_section->output_offset
12959 + rel->r_offset);
12960
12961 /* Put RELOCATION back into the insn. */
12962 {
12963 bfd_vma immA = (relocation & 0x00001000) >> 12;
12964 bfd_vma immB = (relocation & 0x00000ffc) >> 2;
12965 bfd_vma immC = (relocation & 0x00000002) >> 1;
12966
12967 upper_insn = (upper_insn & 0xfffe) | immA;
12968 lower_insn = (lower_insn & 0xf001) | (immC << 11) | (immB << 1);
12969 }
12970
12971 /* Put the relocated value back in the object file: */
12972 bfd_put_16 (input_bfd, upper_insn, hit_data);
12973 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
12974
12975 return bfd_reloc_ok;
12976 }
12977
12978 case R_ARM_THM_BF18:
12979 {
12980 bfd_vma relocation;
12981 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
12982 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
12983
12984 if (globals->use_rel)
12985 {
12986 bfd_vma immA = (upper_insn & 0x007f);
12987 bfd_vma immB = (lower_insn & 0x07fe) >> 1;
12988 bfd_vma immC = (lower_insn & 0x0800) >> 11;
12989 addend = (immA << 12);
12990 addend |= (immB << 2);
12991 addend |= (immC << 1);
12992 addend |= 1;
12993 /* Sign extend. */
12994 addend = (addend & 0x40000) ? addend - (1 << 19) : addend;
12995 signed_addend = addend;
12996 }
12997
12998 relocation = value + signed_addend;
12999 relocation -= (input_section->output_section->vma
13000 + input_section->output_offset
13001 + rel->r_offset);
13002
13003 /* Put RELOCATION back into the insn. */
13004 {
13005 bfd_vma immA = (relocation & 0x0007f000) >> 12;
13006 bfd_vma immB = (relocation & 0x00000ffc) >> 2;
13007 bfd_vma immC = (relocation & 0x00000002) >> 1;
13008
13009 upper_insn = (upper_insn & 0xff80) | immA;
13010 lower_insn = (lower_insn & 0xf001) | (immC << 11) | (immB << 1);
13011 }
13012
13013 /* Put the relocated value back in the object file: */
13014 bfd_put_16 (input_bfd, upper_insn, hit_data);
13015 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
13016
13017 return bfd_reloc_ok;
13018 }
13019
13020 default:
13021 return bfd_reloc_notsupported;
13022 }
13023 }
13024
13025 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
13026 static void
13027 arm_add_to_rel (bfd * abfd,
13028 bfd_byte * address,
13029 reloc_howto_type * howto,
13030 bfd_signed_vma increment)
13031 {
13032 bfd_signed_vma addend;
13033
13034 if (howto->type == R_ARM_THM_CALL
13035 || howto->type == R_ARM_THM_JUMP24)
13036 {
13037 int upper_insn, lower_insn;
13038 int upper, lower;
13039
13040 upper_insn = bfd_get_16 (abfd, address);
13041 lower_insn = bfd_get_16 (abfd, address + 2);
13042 upper = upper_insn & 0x7ff;
13043 lower = lower_insn & 0x7ff;
13044
13045 addend = (upper << 12) | (lower << 1);
13046 addend += increment;
13047 addend >>= 1;
13048
13049 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
13050 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
13051
13052 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
13053 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
13054 }
13055 else
13056 {
13057 bfd_vma contents;
13058
13059 contents = bfd_get_32 (abfd, address);
13060
13061 /* Get the (signed) value from the instruction. */
13062 addend = contents & howto->src_mask;
13063 if (addend & ((howto->src_mask + 1) >> 1))
13064 {
13065 bfd_signed_vma mask;
13066
13067 mask = -1;
13068 mask &= ~ howto->src_mask;
13069 addend |= mask;
13070 }
13071
13072 /* Add in the increment, (which is a byte value). */
13073 switch (howto->type)
13074 {
13075 default:
13076 addend += increment;
13077 break;
13078
13079 case R_ARM_PC24:
13080 case R_ARM_PLT32:
13081 case R_ARM_CALL:
13082 case R_ARM_JUMP24:
13083 addend <<= howto->size;
13084 addend += increment;
13085
13086 /* Should we check for overflow here ? */
13087
13088 /* Drop any undesired bits. */
13089 addend >>= howto->rightshift;
13090 break;
13091 }
13092
13093 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
13094
13095 bfd_put_32 (abfd, contents, address);
13096 }
13097 }
13098
13099 #define IS_ARM_TLS_RELOC(R_TYPE) \
13100 ((R_TYPE) == R_ARM_TLS_GD32 \
13101 || (R_TYPE) == R_ARM_TLS_GD32_FDPIC \
13102 || (R_TYPE) == R_ARM_TLS_LDO32 \
13103 || (R_TYPE) == R_ARM_TLS_LDM32 \
13104 || (R_TYPE) == R_ARM_TLS_LDM32_FDPIC \
13105 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
13106 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
13107 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
13108 || (R_TYPE) == R_ARM_TLS_LE32 \
13109 || (R_TYPE) == R_ARM_TLS_IE32 \
13110 || (R_TYPE) == R_ARM_TLS_IE32_FDPIC \
13111 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
13112
13113 /* Specific set of relocations for the gnu tls dialect. */
13114 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
13115 ((R_TYPE) == R_ARM_TLS_GOTDESC \
13116 || (R_TYPE) == R_ARM_TLS_CALL \
13117 || (R_TYPE) == R_ARM_THM_TLS_CALL \
13118 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
13119 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
13120
13121 /* Relocate an ARM ELF section. */
13122
13123 static bfd_boolean
13124 elf32_arm_relocate_section (bfd * output_bfd,
13125 struct bfd_link_info * info,
13126 bfd * input_bfd,
13127 asection * input_section,
13128 bfd_byte * contents,
13129 Elf_Internal_Rela * relocs,
13130 Elf_Internal_Sym * local_syms,
13131 asection ** local_sections)
13132 {
13133 Elf_Internal_Shdr *symtab_hdr;
13134 struct elf_link_hash_entry **sym_hashes;
13135 Elf_Internal_Rela *rel;
13136 Elf_Internal_Rela *relend;
13137 const char *name;
13138 struct elf32_arm_link_hash_table * globals;
13139
13140 globals = elf32_arm_hash_table (info);
13141 if (globals == NULL)
13142 return FALSE;
13143
13144 symtab_hdr = & elf_symtab_hdr (input_bfd);
13145 sym_hashes = elf_sym_hashes (input_bfd);
13146
13147 rel = relocs;
13148 relend = relocs + input_section->reloc_count;
13149 for (; rel < relend; rel++)
13150 {
13151 int r_type;
13152 reloc_howto_type * howto;
13153 unsigned long r_symndx;
13154 Elf_Internal_Sym * sym;
13155 asection * sec;
13156 struct elf_link_hash_entry * h;
13157 bfd_vma relocation;
13158 bfd_reloc_status_type r;
13159 arelent bfd_reloc;
13160 char sym_type;
13161 bfd_boolean unresolved_reloc = FALSE;
13162 char *error_message = NULL;
13163
13164 r_symndx = ELF32_R_SYM (rel->r_info);
13165 r_type = ELF32_R_TYPE (rel->r_info);
13166 r_type = arm_real_reloc_type (globals, r_type);
13167
13168 if ( r_type == R_ARM_GNU_VTENTRY
13169 || r_type == R_ARM_GNU_VTINHERIT)
13170 continue;
13171
13172 howto = bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
13173
13174 if (howto == NULL)
13175 return _bfd_unrecognized_reloc (input_bfd, input_section, r_type);
13176
13177 h = NULL;
13178 sym = NULL;
13179 sec = NULL;
13180
13181 if (r_symndx < symtab_hdr->sh_info)
13182 {
13183 sym = local_syms + r_symndx;
13184 sym_type = ELF32_ST_TYPE (sym->st_info);
13185 sec = local_sections[r_symndx];
13186
13187 /* An object file might have a reference to a local
13188 undefined symbol. This is a daft object file, but we
13189 should at least do something about it. V4BX & NONE
13190 relocations do not use the symbol and are explicitly
13191 allowed to use the undefined symbol, so allow those.
13192 Likewise for relocations against STN_UNDEF. */
13193 if (r_type != R_ARM_V4BX
13194 && r_type != R_ARM_NONE
13195 && r_symndx != STN_UNDEF
13196 && bfd_is_und_section (sec)
13197 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
13198 (*info->callbacks->undefined_symbol)
13199 (info, bfd_elf_string_from_elf_section
13200 (input_bfd, symtab_hdr->sh_link, sym->st_name),
13201 input_bfd, input_section,
13202 rel->r_offset, TRUE);
13203
13204 if (globals->use_rel)
13205 {
13206 relocation = (sec->output_section->vma
13207 + sec->output_offset
13208 + sym->st_value);
13209 if (!bfd_link_relocatable (info)
13210 && (sec->flags & SEC_MERGE)
13211 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
13212 {
13213 asection *msec;
13214 bfd_vma addend, value;
13215
13216 switch (r_type)
13217 {
13218 case R_ARM_MOVW_ABS_NC:
13219 case R_ARM_MOVT_ABS:
13220 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
13221 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
13222 addend = (addend ^ 0x8000) - 0x8000;
13223 break;
13224
13225 case R_ARM_THM_MOVW_ABS_NC:
13226 case R_ARM_THM_MOVT_ABS:
13227 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
13228 << 16;
13229 value |= bfd_get_16 (input_bfd,
13230 contents + rel->r_offset + 2);
13231 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
13232 | ((value & 0x04000000) >> 15);
13233 addend = (addend ^ 0x8000) - 0x8000;
13234 break;
13235
13236 default:
13237 if (howto->rightshift
13238 || (howto->src_mask & (howto->src_mask + 1)))
13239 {
13240 _bfd_error_handler
13241 /* xgettext:c-format */
13242 (_("%pB(%pA+%#" PRIx64 "): "
13243 "%s relocation against SEC_MERGE section"),
13244 input_bfd, input_section,
13245 (uint64_t) rel->r_offset, howto->name);
13246 return FALSE;
13247 }
13248
13249 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
13250
13251 /* Get the (signed) value from the instruction. */
13252 addend = value & howto->src_mask;
13253 if (addend & ((howto->src_mask + 1) >> 1))
13254 {
13255 bfd_signed_vma mask;
13256
13257 mask = -1;
13258 mask &= ~ howto->src_mask;
13259 addend |= mask;
13260 }
13261 break;
13262 }
13263
13264 msec = sec;
13265 addend =
13266 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
13267 - relocation;
13268 addend += msec->output_section->vma + msec->output_offset;
13269
13270 /* Cases here must match those in the preceding
13271 switch statement. */
13272 switch (r_type)
13273 {
13274 case R_ARM_MOVW_ABS_NC:
13275 case R_ARM_MOVT_ABS:
13276 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
13277 | (addend & 0xfff);
13278 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
13279 break;
13280
13281 case R_ARM_THM_MOVW_ABS_NC:
13282 case R_ARM_THM_MOVT_ABS:
13283 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
13284 | (addend & 0xff) | ((addend & 0x0800) << 15);
13285 bfd_put_16 (input_bfd, value >> 16,
13286 contents + rel->r_offset);
13287 bfd_put_16 (input_bfd, value,
13288 contents + rel->r_offset + 2);
13289 break;
13290
13291 default:
13292 value = (value & ~ howto->dst_mask)
13293 | (addend & howto->dst_mask);
13294 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
13295 break;
13296 }
13297 }
13298 }
13299 else
13300 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
13301 }
13302 else
13303 {
13304 bfd_boolean warned, ignored;
13305
13306 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
13307 r_symndx, symtab_hdr, sym_hashes,
13308 h, sec, relocation,
13309 unresolved_reloc, warned, ignored);
13310
13311 sym_type = h->type;
13312 }
13313
13314 if (sec != NULL && discarded_section (sec))
13315 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
13316 rel, 1, relend, howto, 0, contents);
13317
13318 if (bfd_link_relocatable (info))
13319 {
13320 /* This is a relocatable link. We don't have to change
13321 anything, unless the reloc is against a section symbol,
13322 in which case we have to adjust according to where the
13323 section symbol winds up in the output section. */
13324 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
13325 {
13326 if (globals->use_rel)
13327 arm_add_to_rel (input_bfd, contents + rel->r_offset,
13328 howto, (bfd_signed_vma) sec->output_offset);
13329 else
13330 rel->r_addend += sec->output_offset;
13331 }
13332 continue;
13333 }
13334
13335 if (h != NULL)
13336 name = h->root.root.string;
13337 else
13338 {
13339 name = (bfd_elf_string_from_elf_section
13340 (input_bfd, symtab_hdr->sh_link, sym->st_name));
13341 if (name == NULL || *name == '\0')
13342 name = bfd_section_name (sec);
13343 }
13344
13345 if (r_symndx != STN_UNDEF
13346 && r_type != R_ARM_NONE
13347 && (h == NULL
13348 || h->root.type == bfd_link_hash_defined
13349 || h->root.type == bfd_link_hash_defweak)
13350 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
13351 {
13352 _bfd_error_handler
13353 ((sym_type == STT_TLS
13354 /* xgettext:c-format */
13355 ? _("%pB(%pA+%#" PRIx64 "): %s used with TLS symbol %s")
13356 /* xgettext:c-format */
13357 : _("%pB(%pA+%#" PRIx64 "): %s used with non-TLS symbol %s")),
13358 input_bfd,
13359 input_section,
13360 (uint64_t) rel->r_offset,
13361 howto->name,
13362 name);
13363 }
13364
13365 /* We call elf32_arm_final_link_relocate unless we're completely
13366 done, i.e., the relaxation produced the final output we want,
13367 and we won't let anybody mess with it. Also, we have to do
13368 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
13369 both in relaxed and non-relaxed cases. */
13370 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
13371 || (IS_ARM_TLS_GNU_RELOC (r_type)
13372 && !((h ? elf32_arm_hash_entry (h)->tls_type :
13373 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
13374 & GOT_TLS_GDESC)))
13375 {
13376 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
13377 contents, rel, h == NULL);
13378 /* This may have been marked unresolved because it came from
13379 a shared library. But we've just dealt with that. */
13380 unresolved_reloc = 0;
13381 }
13382 else
13383 r = bfd_reloc_continue;
13384
13385 if (r == bfd_reloc_continue)
13386 {
13387 unsigned char branch_type =
13388 h ? ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
13389 : ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
13390
13391 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
13392 input_section, contents, rel,
13393 relocation, info, sec, name,
13394 sym_type, branch_type, h,
13395 &unresolved_reloc,
13396 &error_message);
13397 }
13398
13399 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
13400 because such sections are not SEC_ALLOC and thus ld.so will
13401 not process them. */
13402 if (unresolved_reloc
13403 && !((input_section->flags & SEC_DEBUGGING) != 0
13404 && h->def_dynamic)
13405 && _bfd_elf_section_offset (output_bfd, info, input_section,
13406 rel->r_offset) != (bfd_vma) -1)
13407 {
13408 _bfd_error_handler
13409 /* xgettext:c-format */
13410 (_("%pB(%pA+%#" PRIx64 "): "
13411 "unresolvable %s relocation against symbol `%s'"),
13412 input_bfd,
13413 input_section,
13414 (uint64_t) rel->r_offset,
13415 howto->name,
13416 h->root.root.string);
13417 return FALSE;
13418 }
13419
13420 if (r != bfd_reloc_ok)
13421 {
13422 switch (r)
13423 {
13424 case bfd_reloc_overflow:
13425 /* If the overflowing reloc was to an undefined symbol,
13426 we have already printed one error message and there
13427 is no point complaining again. */
13428 if (!h || h->root.type != bfd_link_hash_undefined)
13429 (*info->callbacks->reloc_overflow)
13430 (info, (h ? &h->root : NULL), name, howto->name,
13431 (bfd_vma) 0, input_bfd, input_section, rel->r_offset);
13432 break;
13433
13434 case bfd_reloc_undefined:
13435 (*info->callbacks->undefined_symbol)
13436 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
13437 break;
13438
13439 case bfd_reloc_outofrange:
13440 error_message = _("out of range");
13441 goto common_error;
13442
13443 case bfd_reloc_notsupported:
13444 error_message = _("unsupported relocation");
13445 goto common_error;
13446
13447 case bfd_reloc_dangerous:
13448 /* error_message should already be set. */
13449 goto common_error;
13450
13451 default:
13452 error_message = _("unknown error");
13453 /* Fall through. */
13454
13455 common_error:
13456 BFD_ASSERT (error_message != NULL);
13457 (*info->callbacks->reloc_dangerous)
13458 (info, error_message, input_bfd, input_section, rel->r_offset);
13459 break;
13460 }
13461 }
13462 }
13463
13464 return TRUE;
13465 }
13466
13467 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
13468 adds the edit to the start of the list. (The list must be built in order of
13469 ascending TINDEX: the function's callers are primarily responsible for
13470 maintaining that condition). */
13471
13472 static void
13473 add_unwind_table_edit (arm_unwind_table_edit **head,
13474 arm_unwind_table_edit **tail,
13475 arm_unwind_edit_type type,
13476 asection *linked_section,
13477 unsigned int tindex)
13478 {
13479 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
13480 xmalloc (sizeof (arm_unwind_table_edit));
13481
13482 new_edit->type = type;
13483 new_edit->linked_section = linked_section;
13484 new_edit->index = tindex;
13485
13486 if (tindex > 0)
13487 {
13488 new_edit->next = NULL;
13489
13490 if (*tail)
13491 (*tail)->next = new_edit;
13492
13493 (*tail) = new_edit;
13494
13495 if (!*head)
13496 (*head) = new_edit;
13497 }
13498 else
13499 {
13500 new_edit->next = *head;
13501
13502 if (!*tail)
13503 *tail = new_edit;
13504
13505 *head = new_edit;
13506 }
13507 }
13508
13509 static _arm_elf_section_data *get_arm_elf_section_data (asection *);
13510
13511 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
13512 static void
13513 adjust_exidx_size(asection *exidx_sec, int adjust)
13514 {
13515 asection *out_sec;
13516
13517 if (!exidx_sec->rawsize)
13518 exidx_sec->rawsize = exidx_sec->size;
13519
13520 bfd_set_section_size (exidx_sec, exidx_sec->size + adjust);
13521 out_sec = exidx_sec->output_section;
13522 /* Adjust size of output section. */
13523 bfd_set_section_size (out_sec, out_sec->size +adjust);
13524 }
13525
13526 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
13527 static void
13528 insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
13529 {
13530 struct _arm_elf_section_data *exidx_arm_data;
13531
13532 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
13533 add_unwind_table_edit (
13534 &exidx_arm_data->u.exidx.unwind_edit_list,
13535 &exidx_arm_data->u.exidx.unwind_edit_tail,
13536 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
13537
13538 exidx_arm_data->additional_reloc_count++;
13539
13540 adjust_exidx_size(exidx_sec, 8);
13541 }
13542
13543 /* Scan .ARM.exidx tables, and create a list describing edits which should be
13544 made to those tables, such that:
13545
13546 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
13547 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
13548 codes which have been inlined into the index).
13549
13550 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
13551
13552 The edits are applied when the tables are written
13553 (in elf32_arm_write_section). */
13554
13555 bfd_boolean
13556 elf32_arm_fix_exidx_coverage (asection **text_section_order,
13557 unsigned int num_text_sections,
13558 struct bfd_link_info *info,
13559 bfd_boolean merge_exidx_entries)
13560 {
13561 bfd *inp;
13562 unsigned int last_second_word = 0, i;
13563 asection *last_exidx_sec = NULL;
13564 asection *last_text_sec = NULL;
13565 int last_unwind_type = -1;
13566
13567 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
13568 text sections. */
13569 for (inp = info->input_bfds; inp != NULL; inp = inp->link.next)
13570 {
13571 asection *sec;
13572
13573 for (sec = inp->sections; sec != NULL; sec = sec->next)
13574 {
13575 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
13576 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
13577
13578 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
13579 continue;
13580
13581 if (elf_sec->linked_to)
13582 {
13583 Elf_Internal_Shdr *linked_hdr
13584 = &elf_section_data (elf_sec->linked_to)->this_hdr;
13585 struct _arm_elf_section_data *linked_sec_arm_data
13586 = get_arm_elf_section_data (linked_hdr->bfd_section);
13587
13588 if (linked_sec_arm_data == NULL)
13589 continue;
13590
13591 /* Link this .ARM.exidx section back from the text section it
13592 describes. */
13593 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
13594 }
13595 }
13596 }
13597
13598 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
13599 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
13600 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
13601
13602 for (i = 0; i < num_text_sections; i++)
13603 {
13604 asection *sec = text_section_order[i];
13605 asection *exidx_sec;
13606 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
13607 struct _arm_elf_section_data *exidx_arm_data;
13608 bfd_byte *contents = NULL;
13609 int deleted_exidx_bytes = 0;
13610 bfd_vma j;
13611 arm_unwind_table_edit *unwind_edit_head = NULL;
13612 arm_unwind_table_edit *unwind_edit_tail = NULL;
13613 Elf_Internal_Shdr *hdr;
13614 bfd *ibfd;
13615
13616 if (arm_data == NULL)
13617 continue;
13618
13619 exidx_sec = arm_data->u.text.arm_exidx_sec;
13620 if (exidx_sec == NULL)
13621 {
13622 /* Section has no unwind data. */
13623 if (last_unwind_type == 0 || !last_exidx_sec)
13624 continue;
13625
13626 /* Ignore zero sized sections. */
13627 if (sec->size == 0)
13628 continue;
13629
13630 insert_cantunwind_after(last_text_sec, last_exidx_sec);
13631 last_unwind_type = 0;
13632 continue;
13633 }
13634
13635 /* Skip /DISCARD/ sections. */
13636 if (bfd_is_abs_section (exidx_sec->output_section))
13637 continue;
13638
13639 hdr = &elf_section_data (exidx_sec)->this_hdr;
13640 if (hdr->sh_type != SHT_ARM_EXIDX)
13641 continue;
13642
13643 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
13644 if (exidx_arm_data == NULL)
13645 continue;
13646
13647 ibfd = exidx_sec->owner;
13648
13649 if (hdr->contents != NULL)
13650 contents = hdr->contents;
13651 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
13652 /* An error? */
13653 continue;
13654
13655 if (last_unwind_type > 0)
13656 {
13657 unsigned int first_word = bfd_get_32 (ibfd, contents);
13658 /* Add cantunwind if first unwind item does not match section
13659 start. */
13660 if (first_word != sec->vma)
13661 {
13662 insert_cantunwind_after (last_text_sec, last_exidx_sec);
13663 last_unwind_type = 0;
13664 }
13665 }
13666
13667 for (j = 0; j < hdr->sh_size; j += 8)
13668 {
13669 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
13670 int unwind_type;
13671 int elide = 0;
13672
13673 /* An EXIDX_CANTUNWIND entry. */
13674 if (second_word == 1)
13675 {
13676 if (last_unwind_type == 0)
13677 elide = 1;
13678 unwind_type = 0;
13679 }
13680 /* Inlined unwinding data. Merge if equal to previous. */
13681 else if ((second_word & 0x80000000) != 0)
13682 {
13683 if (merge_exidx_entries
13684 && last_second_word == second_word && last_unwind_type == 1)
13685 elide = 1;
13686 unwind_type = 1;
13687 last_second_word = second_word;
13688 }
13689 /* Normal table entry. In theory we could merge these too,
13690 but duplicate entries are likely to be much less common. */
13691 else
13692 unwind_type = 2;
13693
13694 if (elide && !bfd_link_relocatable (info))
13695 {
13696 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
13697 DELETE_EXIDX_ENTRY, NULL, j / 8);
13698
13699 deleted_exidx_bytes += 8;
13700 }
13701
13702 last_unwind_type = unwind_type;
13703 }
13704
13705 /* Free contents if we allocated it ourselves. */
13706 if (contents != hdr->contents)
13707 free (contents);
13708
13709 /* Record edits to be applied later (in elf32_arm_write_section). */
13710 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
13711 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
13712
13713 if (deleted_exidx_bytes > 0)
13714 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
13715
13716 last_exidx_sec = exidx_sec;
13717 last_text_sec = sec;
13718 }
13719
13720 /* Add terminating CANTUNWIND entry. */
13721 if (!bfd_link_relocatable (info) && last_exidx_sec
13722 && last_unwind_type != 0)
13723 insert_cantunwind_after(last_text_sec, last_exidx_sec);
13724
13725 return TRUE;
13726 }
13727
13728 static bfd_boolean
13729 elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
13730 bfd *ibfd, const char *name)
13731 {
13732 asection *sec, *osec;
13733
13734 sec = bfd_get_linker_section (ibfd, name);
13735 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
13736 return TRUE;
13737
13738 osec = sec->output_section;
13739 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
13740 return TRUE;
13741
13742 if (! bfd_set_section_contents (obfd, osec, sec->contents,
13743 sec->output_offset, sec->size))
13744 return FALSE;
13745
13746 return TRUE;
13747 }
13748
13749 static bfd_boolean
13750 elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
13751 {
13752 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
13753 asection *sec, *osec;
13754
13755 if (globals == NULL)
13756 return FALSE;
13757
13758 /* Invoke the regular ELF backend linker to do all the work. */
13759 if (!bfd_elf_final_link (abfd, info))
13760 return FALSE;
13761
13762 /* Process stub sections (eg BE8 encoding, ...). */
13763 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
13764 unsigned int i;
13765 for (i=0; i<htab->top_id; i++)
13766 {
13767 sec = htab->stub_group[i].stub_sec;
13768 /* Only process it once, in its link_sec slot. */
13769 if (sec && i == htab->stub_group[i].link_sec->id)
13770 {
13771 osec = sec->output_section;
13772 elf32_arm_write_section (abfd, info, sec, sec->contents);
13773 if (! bfd_set_section_contents (abfd, osec, sec->contents,
13774 sec->output_offset, sec->size))
13775 return FALSE;
13776 }
13777 }
13778
13779 /* Write out any glue sections now that we have created all the
13780 stubs. */
13781 if (globals->bfd_of_glue_owner != NULL)
13782 {
13783 if (! elf32_arm_output_glue_section (info, abfd,
13784 globals->bfd_of_glue_owner,
13785 ARM2THUMB_GLUE_SECTION_NAME))
13786 return FALSE;
13787
13788 if (! elf32_arm_output_glue_section (info, abfd,
13789 globals->bfd_of_glue_owner,
13790 THUMB2ARM_GLUE_SECTION_NAME))
13791 return FALSE;
13792
13793 if (! elf32_arm_output_glue_section (info, abfd,
13794 globals->bfd_of_glue_owner,
13795 VFP11_ERRATUM_VENEER_SECTION_NAME))
13796 return FALSE;
13797
13798 if (! elf32_arm_output_glue_section (info, abfd,
13799 globals->bfd_of_glue_owner,
13800 STM32L4XX_ERRATUM_VENEER_SECTION_NAME))
13801 return FALSE;
13802
13803 if (! elf32_arm_output_glue_section (info, abfd,
13804 globals->bfd_of_glue_owner,
13805 ARM_BX_GLUE_SECTION_NAME))
13806 return FALSE;
13807 }
13808
13809 return TRUE;
13810 }
13811
13812 /* Return a best guess for the machine number based on the attributes. */
13813
13814 static unsigned int
13815 bfd_arm_get_mach_from_attributes (bfd * abfd)
13816 {
13817 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
13818
13819 switch (arch)
13820 {
13821 case TAG_CPU_ARCH_PRE_V4: return bfd_mach_arm_3M;
13822 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
13823 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
13824 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
13825
13826 case TAG_CPU_ARCH_V5TE:
13827 {
13828 char * name;
13829
13830 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
13831 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
13832
13833 if (name)
13834 {
13835 if (strcmp (name, "IWMMXT2") == 0)
13836 return bfd_mach_arm_iWMMXt2;
13837
13838 if (strcmp (name, "IWMMXT") == 0)
13839 return bfd_mach_arm_iWMMXt;
13840
13841 if (strcmp (name, "XSCALE") == 0)
13842 {
13843 int wmmx;
13844
13845 BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES);
13846 wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i;
13847 switch (wmmx)
13848 {
13849 case 1: return bfd_mach_arm_iWMMXt;
13850 case 2: return bfd_mach_arm_iWMMXt2;
13851 default: return bfd_mach_arm_XScale;
13852 }
13853 }
13854 }
13855
13856 return bfd_mach_arm_5TE;
13857 }
13858
13859 case TAG_CPU_ARCH_V5TEJ:
13860 return bfd_mach_arm_5TEJ;
13861 case TAG_CPU_ARCH_V6:
13862 return bfd_mach_arm_6;
13863 case TAG_CPU_ARCH_V6KZ:
13864 return bfd_mach_arm_6KZ;
13865 case TAG_CPU_ARCH_V6T2:
13866 return bfd_mach_arm_6T2;
13867 case TAG_CPU_ARCH_V6K:
13868 return bfd_mach_arm_6K;
13869 case TAG_CPU_ARCH_V7:
13870 return bfd_mach_arm_7;
13871 case TAG_CPU_ARCH_V6_M:
13872 return bfd_mach_arm_6M;
13873 case TAG_CPU_ARCH_V6S_M:
13874 return bfd_mach_arm_6SM;
13875 case TAG_CPU_ARCH_V7E_M:
13876 return bfd_mach_arm_7EM;
13877 case TAG_CPU_ARCH_V8:
13878 return bfd_mach_arm_8;
13879 case TAG_CPU_ARCH_V8R:
13880 return bfd_mach_arm_8R;
13881 case TAG_CPU_ARCH_V8M_BASE:
13882 return bfd_mach_arm_8M_BASE;
13883 case TAG_CPU_ARCH_V8M_MAIN:
13884 return bfd_mach_arm_8M_MAIN;
13885 case TAG_CPU_ARCH_V8_1M_MAIN:
13886 return bfd_mach_arm_8_1M_MAIN;
13887
13888 default:
13889 /* Force entry to be added for any new known Tag_CPU_arch value. */
13890 BFD_ASSERT (arch > MAX_TAG_CPU_ARCH);
13891
13892 /* Unknown Tag_CPU_arch value. */
13893 return bfd_mach_arm_unknown;
13894 }
13895 }
13896
13897 /* Set the right machine number. */
13898
13899 static bfd_boolean
13900 elf32_arm_object_p (bfd *abfd)
13901 {
13902 unsigned int mach;
13903
13904 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
13905
13906 if (mach == bfd_mach_arm_unknown)
13907 {
13908 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
13909 mach = bfd_mach_arm_ep9312;
13910 else
13911 mach = bfd_arm_get_mach_from_attributes (abfd);
13912 }
13913
13914 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
13915 return TRUE;
13916 }
13917
13918 /* Function to keep ARM specific flags in the ELF header. */
13919
13920 static bfd_boolean
13921 elf32_arm_set_private_flags (bfd *abfd, flagword flags)
13922 {
13923 if (elf_flags_init (abfd)
13924 && elf_elfheader (abfd)->e_flags != flags)
13925 {
13926 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
13927 {
13928 if (flags & EF_ARM_INTERWORK)
13929 _bfd_error_handler
13930 (_("warning: not setting interworking flag of %pB since it has already been specified as non-interworking"),
13931 abfd);
13932 else
13933 _bfd_error_handler
13934 (_("warning: clearing the interworking flag of %pB due to outside request"),
13935 abfd);
13936 }
13937 }
13938 else
13939 {
13940 elf_elfheader (abfd)->e_flags = flags;
13941 elf_flags_init (abfd) = TRUE;
13942 }
13943
13944 return TRUE;
13945 }
13946
13947 /* Copy backend specific data from one object module to another. */
13948
13949 static bfd_boolean
13950 elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
13951 {
13952 flagword in_flags;
13953 flagword out_flags;
13954
13955 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
13956 return TRUE;
13957
13958 in_flags = elf_elfheader (ibfd)->e_flags;
13959 out_flags = elf_elfheader (obfd)->e_flags;
13960
13961 if (elf_flags_init (obfd)
13962 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
13963 && in_flags != out_flags)
13964 {
13965 /* Cannot mix APCS26 and APCS32 code. */
13966 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
13967 return FALSE;
13968
13969 /* Cannot mix float APCS and non-float APCS code. */
13970 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
13971 return FALSE;
13972
13973 /* If the src and dest have different interworking flags
13974 then turn off the interworking bit. */
13975 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
13976 {
13977 if (out_flags & EF_ARM_INTERWORK)
13978 _bfd_error_handler
13979 (_("warning: clearing the interworking flag of %pB because non-interworking code in %pB has been linked with it"),
13980 obfd, ibfd);
13981
13982 in_flags &= ~EF_ARM_INTERWORK;
13983 }
13984
13985 /* Likewise for PIC, though don't warn for this case. */
13986 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
13987 in_flags &= ~EF_ARM_PIC;
13988 }
13989
13990 elf_elfheader (obfd)->e_flags = in_flags;
13991 elf_flags_init (obfd) = TRUE;
13992
13993 return _bfd_elf_copy_private_bfd_data (ibfd, obfd);
13994 }
13995
13996 /* Values for Tag_ABI_PCS_R9_use. */
13997 enum
13998 {
13999 AEABI_R9_V6,
14000 AEABI_R9_SB,
14001 AEABI_R9_TLS,
14002 AEABI_R9_unused
14003 };
14004
14005 /* Values for Tag_ABI_PCS_RW_data. */
14006 enum
14007 {
14008 AEABI_PCS_RW_data_absolute,
14009 AEABI_PCS_RW_data_PCrel,
14010 AEABI_PCS_RW_data_SBrel,
14011 AEABI_PCS_RW_data_unused
14012 };
14013
14014 /* Values for Tag_ABI_enum_size. */
14015 enum
14016 {
14017 AEABI_enum_unused,
14018 AEABI_enum_short,
14019 AEABI_enum_wide,
14020 AEABI_enum_forced_wide
14021 };
14022
14023 /* Determine whether an object attribute tag takes an integer, a
14024 string or both. */
14025
14026 static int
14027 elf32_arm_obj_attrs_arg_type (int tag)
14028 {
14029 if (tag == Tag_compatibility)
14030 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
14031 else if (tag == Tag_nodefaults)
14032 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
14033 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
14034 return ATTR_TYPE_FLAG_STR_VAL;
14035 else if (tag < 32)
14036 return ATTR_TYPE_FLAG_INT_VAL;
14037 else
14038 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
14039 }
14040
14041 /* The ABI defines that Tag_conformance should be emitted first, and that
14042 Tag_nodefaults should be second (if either is defined). This sets those
14043 two positions, and bumps up the position of all the remaining tags to
14044 compensate. */
14045 static int
14046 elf32_arm_obj_attrs_order (int num)
14047 {
14048 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
14049 return Tag_conformance;
14050 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
14051 return Tag_nodefaults;
14052 if ((num - 2) < Tag_nodefaults)
14053 return num - 2;
14054 if ((num - 1) < Tag_conformance)
14055 return num - 1;
14056 return num;
14057 }
14058
14059 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
14060 static bfd_boolean
14061 elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
14062 {
14063 if ((tag & 127) < 64)
14064 {
14065 _bfd_error_handler
14066 (_("%pB: unknown mandatory EABI object attribute %d"),
14067 abfd, tag);
14068 bfd_set_error (bfd_error_bad_value);
14069 return FALSE;
14070 }
14071 else
14072 {
14073 _bfd_error_handler
14074 (_("warning: %pB: unknown EABI object attribute %d"),
14075 abfd, tag);
14076 return TRUE;
14077 }
14078 }
14079
14080 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
14081 Returns -1 if no architecture could be read. */
14082
14083 static int
14084 get_secondary_compatible_arch (bfd *abfd)
14085 {
14086 obj_attribute *attr =
14087 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
14088
14089 /* Note: the tag and its argument below are uleb128 values, though
14090 currently-defined values fit in one byte for each. */
14091 if (attr->s
14092 && attr->s[0] == Tag_CPU_arch
14093 && (attr->s[1] & 128) != 128
14094 && attr->s[2] == 0)
14095 return attr->s[1];
14096
14097 /* This tag is "safely ignorable", so don't complain if it looks funny. */
14098 return -1;
14099 }
14100
14101 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
14102 The tag is removed if ARCH is -1. */
14103
14104 static void
14105 set_secondary_compatible_arch (bfd *abfd, int arch)
14106 {
14107 obj_attribute *attr =
14108 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
14109
14110 if (arch == -1)
14111 {
14112 attr->s = NULL;
14113 return;
14114 }
14115
14116 /* Note: the tag and its argument below are uleb128 values, though
14117 currently-defined values fit in one byte for each. */
14118 if (!attr->s)
14119 attr->s = (char *) bfd_alloc (abfd, 3);
14120 attr->s[0] = Tag_CPU_arch;
14121 attr->s[1] = arch;
14122 attr->s[2] = '\0';
14123 }
14124
14125 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
14126 into account. */
14127
14128 static int
14129 tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
14130 int newtag, int secondary_compat)
14131 {
14132 #define T(X) TAG_CPU_ARCH_##X
14133 int tagl, tagh, result;
14134 const int v6t2[] =
14135 {
14136 T(V6T2), /* PRE_V4. */
14137 T(V6T2), /* V4. */
14138 T(V6T2), /* V4T. */
14139 T(V6T2), /* V5T. */
14140 T(V6T2), /* V5TE. */
14141 T(V6T2), /* V5TEJ. */
14142 T(V6T2), /* V6. */
14143 T(V7), /* V6KZ. */
14144 T(V6T2) /* V6T2. */
14145 };
14146 const int v6k[] =
14147 {
14148 T(V6K), /* PRE_V4. */
14149 T(V6K), /* V4. */
14150 T(V6K), /* V4T. */
14151 T(V6K), /* V5T. */
14152 T(V6K), /* V5TE. */
14153 T(V6K), /* V5TEJ. */
14154 T(V6K), /* V6. */
14155 T(V6KZ), /* V6KZ. */
14156 T(V7), /* V6T2. */
14157 T(V6K) /* V6K. */
14158 };
14159 const int v7[] =
14160 {
14161 T(V7), /* PRE_V4. */
14162 T(V7), /* V4. */
14163 T(V7), /* V4T. */
14164 T(V7), /* V5T. */
14165 T(V7), /* V5TE. */
14166 T(V7), /* V5TEJ. */
14167 T(V7), /* V6. */
14168 T(V7), /* V6KZ. */
14169 T(V7), /* V6T2. */
14170 T(V7), /* V6K. */
14171 T(V7) /* V7. */
14172 };
14173 const int v6_m[] =
14174 {
14175 -1, /* PRE_V4. */
14176 -1, /* V4. */
14177 T(V6K), /* V4T. */
14178 T(V6K), /* V5T. */
14179 T(V6K), /* V5TE. */
14180 T(V6K), /* V5TEJ. */
14181 T(V6K), /* V6. */
14182 T(V6KZ), /* V6KZ. */
14183 T(V7), /* V6T2. */
14184 T(V6K), /* V6K. */
14185 T(V7), /* V7. */
14186 T(V6_M) /* V6_M. */
14187 };
14188 const int v6s_m[] =
14189 {
14190 -1, /* PRE_V4. */
14191 -1, /* V4. */
14192 T(V6K), /* V4T. */
14193 T(V6K), /* V5T. */
14194 T(V6K), /* V5TE. */
14195 T(V6K), /* V5TEJ. */
14196 T(V6K), /* V6. */
14197 T(V6KZ), /* V6KZ. */
14198 T(V7), /* V6T2. */
14199 T(V6K), /* V6K. */
14200 T(V7), /* V7. */
14201 T(V6S_M), /* V6_M. */
14202 T(V6S_M) /* V6S_M. */
14203 };
14204 const int v7e_m[] =
14205 {
14206 -1, /* PRE_V4. */
14207 -1, /* V4. */
14208 T(V7E_M), /* V4T. */
14209 T(V7E_M), /* V5T. */
14210 T(V7E_M), /* V5TE. */
14211 T(V7E_M), /* V5TEJ. */
14212 T(V7E_M), /* V6. */
14213 T(V7E_M), /* V6KZ. */
14214 T(V7E_M), /* V6T2. */
14215 T(V7E_M), /* V6K. */
14216 T(V7E_M), /* V7. */
14217 T(V7E_M), /* V6_M. */
14218 T(V7E_M), /* V6S_M. */
14219 T(V7E_M) /* V7E_M. */
14220 };
14221 const int v8[] =
14222 {
14223 T(V8), /* PRE_V4. */
14224 T(V8), /* V4. */
14225 T(V8), /* V4T. */
14226 T(V8), /* V5T. */
14227 T(V8), /* V5TE. */
14228 T(V8), /* V5TEJ. */
14229 T(V8), /* V6. */
14230 T(V8), /* V6KZ. */
14231 T(V8), /* V6T2. */
14232 T(V8), /* V6K. */
14233 T(V8), /* V7. */
14234 T(V8), /* V6_M. */
14235 T(V8), /* V6S_M. */
14236 T(V8), /* V7E_M. */
14237 T(V8) /* V8. */
14238 };
14239 const int v8r[] =
14240 {
14241 T(V8R), /* PRE_V4. */
14242 T(V8R), /* V4. */
14243 T(V8R), /* V4T. */
14244 T(V8R), /* V5T. */
14245 T(V8R), /* V5TE. */
14246 T(V8R), /* V5TEJ. */
14247 T(V8R), /* V6. */
14248 T(V8R), /* V6KZ. */
14249 T(V8R), /* V6T2. */
14250 T(V8R), /* V6K. */
14251 T(V8R), /* V7. */
14252 T(V8R), /* V6_M. */
14253 T(V8R), /* V6S_M. */
14254 T(V8R), /* V7E_M. */
14255 T(V8), /* V8. */
14256 T(V8R), /* V8R. */
14257 };
14258 const int v8m_baseline[] =
14259 {
14260 -1, /* PRE_V4. */
14261 -1, /* V4. */
14262 -1, /* V4T. */
14263 -1, /* V5T. */
14264 -1, /* V5TE. */
14265 -1, /* V5TEJ. */
14266 -1, /* V6. */
14267 -1, /* V6KZ. */
14268 -1, /* V6T2. */
14269 -1, /* V6K. */
14270 -1, /* V7. */
14271 T(V8M_BASE), /* V6_M. */
14272 T(V8M_BASE), /* V6S_M. */
14273 -1, /* V7E_M. */
14274 -1, /* V8. */
14275 -1, /* V8R. */
14276 T(V8M_BASE) /* V8-M BASELINE. */
14277 };
14278 const int v8m_mainline[] =
14279 {
14280 -1, /* PRE_V4. */
14281 -1, /* V4. */
14282 -1, /* V4T. */
14283 -1, /* V5T. */
14284 -1, /* V5TE. */
14285 -1, /* V5TEJ. */
14286 -1, /* V6. */
14287 -1, /* V6KZ. */
14288 -1, /* V6T2. */
14289 -1, /* V6K. */
14290 T(V8M_MAIN), /* V7. */
14291 T(V8M_MAIN), /* V6_M. */
14292 T(V8M_MAIN), /* V6S_M. */
14293 T(V8M_MAIN), /* V7E_M. */
14294 -1, /* V8. */
14295 -1, /* V8R. */
14296 T(V8M_MAIN), /* V8-M BASELINE. */
14297 T(V8M_MAIN) /* V8-M MAINLINE. */
14298 };
14299 const int v8_1m_mainline[] =
14300 {
14301 -1, /* PRE_V4. */
14302 -1, /* V4. */
14303 -1, /* V4T. */
14304 -1, /* V5T. */
14305 -1, /* V5TE. */
14306 -1, /* V5TEJ. */
14307 -1, /* V6. */
14308 -1, /* V6KZ. */
14309 -1, /* V6T2. */
14310 -1, /* V6K. */
14311 T(V8_1M_MAIN), /* V7. */
14312 T(V8_1M_MAIN), /* V6_M. */
14313 T(V8_1M_MAIN), /* V6S_M. */
14314 T(V8_1M_MAIN), /* V7E_M. */
14315 -1, /* V8. */
14316 -1, /* V8R. */
14317 T(V8_1M_MAIN), /* V8-M BASELINE. */
14318 T(V8_1M_MAIN), /* V8-M MAINLINE. */
14319 -1, /* Unused (18). */
14320 -1, /* Unused (19). */
14321 -1, /* Unused (20). */
14322 T(V8_1M_MAIN) /* V8.1-M MAINLINE. */
14323 };
14324 const int v4t_plus_v6_m[] =
14325 {
14326 -1, /* PRE_V4. */
14327 -1, /* V4. */
14328 T(V4T), /* V4T. */
14329 T(V5T), /* V5T. */
14330 T(V5TE), /* V5TE. */
14331 T(V5TEJ), /* V5TEJ. */
14332 T(V6), /* V6. */
14333 T(V6KZ), /* V6KZ. */
14334 T(V6T2), /* V6T2. */
14335 T(V6K), /* V6K. */
14336 T(V7), /* V7. */
14337 T(V6_M), /* V6_M. */
14338 T(V6S_M), /* V6S_M. */
14339 T(V7E_M), /* V7E_M. */
14340 T(V8), /* V8. */
14341 -1, /* V8R. */
14342 T(V8M_BASE), /* V8-M BASELINE. */
14343 T(V8M_MAIN), /* V8-M MAINLINE. */
14344 -1, /* Unused (18). */
14345 -1, /* Unused (19). */
14346 -1, /* Unused (20). */
14347 T(V8_1M_MAIN), /* V8.1-M MAINLINE. */
14348 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
14349 };
14350 const int *comb[] =
14351 {
14352 v6t2,
14353 v6k,
14354 v7,
14355 v6_m,
14356 v6s_m,
14357 v7e_m,
14358 v8,
14359 v8r,
14360 v8m_baseline,
14361 v8m_mainline,
14362 NULL,
14363 NULL,
14364 NULL,
14365 v8_1m_mainline,
14366 /* Pseudo-architecture. */
14367 v4t_plus_v6_m
14368 };
14369
14370 /* Check we've not got a higher architecture than we know about. */
14371
14372 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
14373 {
14374 _bfd_error_handler (_("error: %pB: unknown CPU architecture"), ibfd);
14375 return -1;
14376 }
14377
14378 /* Override old tag if we have a Tag_also_compatible_with on the output. */
14379
14380 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
14381 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
14382 oldtag = T(V4T_PLUS_V6_M);
14383
14384 /* And override the new tag if we have a Tag_also_compatible_with on the
14385 input. */
14386
14387 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
14388 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
14389 newtag = T(V4T_PLUS_V6_M);
14390
14391 tagl = (oldtag < newtag) ? oldtag : newtag;
14392 result = tagh = (oldtag > newtag) ? oldtag : newtag;
14393
14394 /* Architectures before V6KZ add features monotonically. */
14395 if (tagh <= TAG_CPU_ARCH_V6KZ)
14396 return result;
14397
14398 result = comb[tagh - T(V6T2)] ? comb[tagh - T(V6T2)][tagl] : -1;
14399
14400 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
14401 as the canonical version. */
14402 if (result == T(V4T_PLUS_V6_M))
14403 {
14404 result = T(V4T);
14405 *secondary_compat_out = T(V6_M);
14406 }
14407 else
14408 *secondary_compat_out = -1;
14409
14410 if (result == -1)
14411 {
14412 _bfd_error_handler (_("error: %pB: conflicting CPU architectures %d/%d"),
14413 ibfd, oldtag, newtag);
14414 return -1;
14415 }
14416
14417 return result;
14418 #undef T
14419 }
14420
14421 /* Query attributes object to see if integer divide instructions may be
14422 present in an object. */
14423 static bfd_boolean
14424 elf32_arm_attributes_accept_div (const obj_attribute *attr)
14425 {
14426 int arch = attr[Tag_CPU_arch].i;
14427 int profile = attr[Tag_CPU_arch_profile].i;
14428
14429 switch (attr[Tag_DIV_use].i)
14430 {
14431 case 0:
14432 /* Integer divide allowed if instruction contained in archetecture. */
14433 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
14434 return TRUE;
14435 else if (arch >= TAG_CPU_ARCH_V7E_M)
14436 return TRUE;
14437 else
14438 return FALSE;
14439
14440 case 1:
14441 /* Integer divide explicitly prohibited. */
14442 return FALSE;
14443
14444 default:
14445 /* Unrecognised case - treat as allowing divide everywhere. */
14446 case 2:
14447 /* Integer divide allowed in ARM state. */
14448 return TRUE;
14449 }
14450 }
14451
14452 /* Query attributes object to see if integer divide instructions are
14453 forbidden to be in the object. This is not the inverse of
14454 elf32_arm_attributes_accept_div. */
14455 static bfd_boolean
14456 elf32_arm_attributes_forbid_div (const obj_attribute *attr)
14457 {
14458 return attr[Tag_DIV_use].i == 1;
14459 }
14460
14461 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
14462 are conflicting attributes. */
14463
14464 static bfd_boolean
14465 elf32_arm_merge_eabi_attributes (bfd *ibfd, struct bfd_link_info *info)
14466 {
14467 bfd *obfd = info->output_bfd;
14468 obj_attribute *in_attr;
14469 obj_attribute *out_attr;
14470 /* Some tags have 0 = don't care, 1 = strong requirement,
14471 2 = weak requirement. */
14472 static const int order_021[3] = {0, 2, 1};
14473 int i;
14474 bfd_boolean result = TRUE;
14475 const char *sec_name = get_elf_backend_data (ibfd)->obj_attrs_section;
14476
14477 /* Skip the linker stubs file. This preserves previous behavior
14478 of accepting unknown attributes in the first input file - but
14479 is that a bug? */
14480 if (ibfd->flags & BFD_LINKER_CREATED)
14481 return TRUE;
14482
14483 /* Skip any input that hasn't attribute section.
14484 This enables to link object files without attribute section with
14485 any others. */
14486 if (bfd_get_section_by_name (ibfd, sec_name) == NULL)
14487 return TRUE;
14488
14489 if (!elf_known_obj_attributes_proc (obfd)[0].i)
14490 {
14491 /* This is the first object. Copy the attributes. */
14492 _bfd_elf_copy_obj_attributes (ibfd, obfd);
14493
14494 out_attr = elf_known_obj_attributes_proc (obfd);
14495
14496 /* Use the Tag_null value to indicate the attributes have been
14497 initialized. */
14498 out_attr[0].i = 1;
14499
14500 /* We do not output objects with Tag_MPextension_use_legacy - we move
14501 the attribute's value to Tag_MPextension_use. */
14502 if (out_attr[Tag_MPextension_use_legacy].i != 0)
14503 {
14504 if (out_attr[Tag_MPextension_use].i != 0
14505 && out_attr[Tag_MPextension_use_legacy].i
14506 != out_attr[Tag_MPextension_use].i)
14507 {
14508 _bfd_error_handler
14509 (_("Error: %pB has both the current and legacy "
14510 "Tag_MPextension_use attributes"), ibfd);
14511 result = FALSE;
14512 }
14513
14514 out_attr[Tag_MPextension_use] =
14515 out_attr[Tag_MPextension_use_legacy];
14516 out_attr[Tag_MPextension_use_legacy].type = 0;
14517 out_attr[Tag_MPextension_use_legacy].i = 0;
14518 }
14519
14520 return result;
14521 }
14522
14523 in_attr = elf_known_obj_attributes_proc (ibfd);
14524 out_attr = elf_known_obj_attributes_proc (obfd);
14525 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
14526 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
14527 {
14528 /* Ignore mismatches if the object doesn't use floating point or is
14529 floating point ABI independent. */
14530 if (out_attr[Tag_ABI_FP_number_model].i == AEABI_FP_number_model_none
14531 || (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
14532 && out_attr[Tag_ABI_VFP_args].i == AEABI_VFP_args_compatible))
14533 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
14534 else if (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
14535 && in_attr[Tag_ABI_VFP_args].i != AEABI_VFP_args_compatible)
14536 {
14537 _bfd_error_handler
14538 (_("error: %pB uses VFP register arguments, %pB does not"),
14539 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
14540 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
14541 result = FALSE;
14542 }
14543 }
14544
14545 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
14546 {
14547 /* Merge this attribute with existing attributes. */
14548 switch (i)
14549 {
14550 case Tag_CPU_raw_name:
14551 case Tag_CPU_name:
14552 /* These are merged after Tag_CPU_arch. */
14553 break;
14554
14555 case Tag_ABI_optimization_goals:
14556 case Tag_ABI_FP_optimization_goals:
14557 /* Use the first value seen. */
14558 break;
14559
14560 case Tag_CPU_arch:
14561 {
14562 int secondary_compat = -1, secondary_compat_out = -1;
14563 unsigned int saved_out_attr = out_attr[i].i;
14564 int arch_attr;
14565 static const char *name_table[] =
14566 {
14567 /* These aren't real CPU names, but we can't guess
14568 that from the architecture version alone. */
14569 "Pre v4",
14570 "ARM v4",
14571 "ARM v4T",
14572 "ARM v5T",
14573 "ARM v5TE",
14574 "ARM v5TEJ",
14575 "ARM v6",
14576 "ARM v6KZ",
14577 "ARM v6T2",
14578 "ARM v6K",
14579 "ARM v7",
14580 "ARM v6-M",
14581 "ARM v6S-M",
14582 "ARM v8",
14583 "",
14584 "ARM v8-M.baseline",
14585 "ARM v8-M.mainline",
14586 };
14587
14588 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
14589 secondary_compat = get_secondary_compatible_arch (ibfd);
14590 secondary_compat_out = get_secondary_compatible_arch (obfd);
14591 arch_attr = tag_cpu_arch_combine (ibfd, out_attr[i].i,
14592 &secondary_compat_out,
14593 in_attr[i].i,
14594 secondary_compat);
14595
14596 /* Return with error if failed to merge. */
14597 if (arch_attr == -1)
14598 return FALSE;
14599
14600 out_attr[i].i = arch_attr;
14601
14602 set_secondary_compatible_arch (obfd, secondary_compat_out);
14603
14604 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
14605 if (out_attr[i].i == saved_out_attr)
14606 ; /* Leave the names alone. */
14607 else if (out_attr[i].i == in_attr[i].i)
14608 {
14609 /* The output architecture has been changed to match the
14610 input architecture. Use the input names. */
14611 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
14612 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
14613 : NULL;
14614 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
14615 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
14616 : NULL;
14617 }
14618 else
14619 {
14620 out_attr[Tag_CPU_name].s = NULL;
14621 out_attr[Tag_CPU_raw_name].s = NULL;
14622 }
14623
14624 /* If we still don't have a value for Tag_CPU_name,
14625 make one up now. Tag_CPU_raw_name remains blank. */
14626 if (out_attr[Tag_CPU_name].s == NULL
14627 && out_attr[i].i < ARRAY_SIZE (name_table))
14628 out_attr[Tag_CPU_name].s =
14629 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
14630 }
14631 break;
14632
14633 case Tag_ARM_ISA_use:
14634 case Tag_THUMB_ISA_use:
14635 case Tag_WMMX_arch:
14636 case Tag_Advanced_SIMD_arch:
14637 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
14638 case Tag_ABI_FP_rounding:
14639 case Tag_ABI_FP_exceptions:
14640 case Tag_ABI_FP_user_exceptions:
14641 case Tag_ABI_FP_number_model:
14642 case Tag_FP_HP_extension:
14643 case Tag_CPU_unaligned_access:
14644 case Tag_T2EE_use:
14645 case Tag_MPextension_use:
14646 case Tag_MVE_arch:
14647 /* Use the largest value specified. */
14648 if (in_attr[i].i > out_attr[i].i)
14649 out_attr[i].i = in_attr[i].i;
14650 break;
14651
14652 case Tag_ABI_align_preserved:
14653 case Tag_ABI_PCS_RO_data:
14654 /* Use the smallest value specified. */
14655 if (in_attr[i].i < out_attr[i].i)
14656 out_attr[i].i = in_attr[i].i;
14657 break;
14658
14659 case Tag_ABI_align_needed:
14660 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
14661 && (in_attr[Tag_ABI_align_preserved].i == 0
14662 || out_attr[Tag_ABI_align_preserved].i == 0))
14663 {
14664 /* This error message should be enabled once all non-conformant
14665 binaries in the toolchain have had the attributes set
14666 properly.
14667 _bfd_error_handler
14668 (_("error: %pB: 8-byte data alignment conflicts with %pB"),
14669 obfd, ibfd);
14670 result = FALSE; */
14671 }
14672 /* Fall through. */
14673 case Tag_ABI_FP_denormal:
14674 case Tag_ABI_PCS_GOT_use:
14675 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
14676 value if greater than 2 (for future-proofing). */
14677 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
14678 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
14679 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
14680 out_attr[i].i = in_attr[i].i;
14681 break;
14682
14683 case Tag_Virtualization_use:
14684 /* The virtualization tag effectively stores two bits of
14685 information: the intended use of TrustZone (in bit 0), and the
14686 intended use of Virtualization (in bit 1). */
14687 if (out_attr[i].i == 0)
14688 out_attr[i].i = in_attr[i].i;
14689 else if (in_attr[i].i != 0
14690 && in_attr[i].i != out_attr[i].i)
14691 {
14692 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
14693 out_attr[i].i = 3;
14694 else
14695 {
14696 _bfd_error_handler
14697 (_("error: %pB: unable to merge virtualization attributes "
14698 "with %pB"),
14699 obfd, ibfd);
14700 result = FALSE;
14701 }
14702 }
14703 break;
14704
14705 case Tag_CPU_arch_profile:
14706 if (out_attr[i].i != in_attr[i].i)
14707 {
14708 /* 0 will merge with anything.
14709 'A' and 'S' merge to 'A'.
14710 'R' and 'S' merge to 'R'.
14711 'M' and 'A|R|S' is an error. */
14712 if (out_attr[i].i == 0
14713 || (out_attr[i].i == 'S'
14714 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
14715 out_attr[i].i = in_attr[i].i;
14716 else if (in_attr[i].i == 0
14717 || (in_attr[i].i == 'S'
14718 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
14719 ; /* Do nothing. */
14720 else
14721 {
14722 _bfd_error_handler
14723 (_("error: %pB: conflicting architecture profiles %c/%c"),
14724 ibfd,
14725 in_attr[i].i ? in_attr[i].i : '0',
14726 out_attr[i].i ? out_attr[i].i : '0');
14727 result = FALSE;
14728 }
14729 }
14730 break;
14731
14732 case Tag_DSP_extension:
14733 /* No need to change output value if any of:
14734 - pre (<=) ARMv5T input architecture (do not have DSP)
14735 - M input profile not ARMv7E-M and do not have DSP. */
14736 if (in_attr[Tag_CPU_arch].i <= 3
14737 || (in_attr[Tag_CPU_arch_profile].i == 'M'
14738 && in_attr[Tag_CPU_arch].i != 13
14739 && in_attr[i].i == 0))
14740 ; /* Do nothing. */
14741 /* Output value should be 0 if DSP part of architecture, ie.
14742 - post (>=) ARMv5te architecture output
14743 - A, R or S profile output or ARMv7E-M output architecture. */
14744 else if (out_attr[Tag_CPU_arch].i >= 4
14745 && (out_attr[Tag_CPU_arch_profile].i == 'A'
14746 || out_attr[Tag_CPU_arch_profile].i == 'R'
14747 || out_attr[Tag_CPU_arch_profile].i == 'S'
14748 || out_attr[Tag_CPU_arch].i == 13))
14749 out_attr[i].i = 0;
14750 /* Otherwise, DSP instructions are added and not part of output
14751 architecture. */
14752 else
14753 out_attr[i].i = 1;
14754 break;
14755
14756 case Tag_FP_arch:
14757 {
14758 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
14759 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
14760 when it's 0. It might mean absence of FP hardware if
14761 Tag_FP_arch is zero. */
14762
14763 #define VFP_VERSION_COUNT 9
14764 static const struct
14765 {
14766 int ver;
14767 int regs;
14768 } vfp_versions[VFP_VERSION_COUNT] =
14769 {
14770 {0, 0},
14771 {1, 16},
14772 {2, 16},
14773 {3, 32},
14774 {3, 16},
14775 {4, 32},
14776 {4, 16},
14777 {8, 32},
14778 {8, 16}
14779 };
14780 int ver;
14781 int regs;
14782 int newval;
14783
14784 /* If the output has no requirement about FP hardware,
14785 follow the requirement of the input. */
14786 if (out_attr[i].i == 0)
14787 {
14788 /* This assert is still reasonable, we shouldn't
14789 produce the suspicious build attribute
14790 combination (See below for in_attr). */
14791 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
14792 out_attr[i].i = in_attr[i].i;
14793 out_attr[Tag_ABI_HardFP_use].i
14794 = in_attr[Tag_ABI_HardFP_use].i;
14795 break;
14796 }
14797 /* If the input has no requirement about FP hardware, do
14798 nothing. */
14799 else if (in_attr[i].i == 0)
14800 {
14801 /* We used to assert that Tag_ABI_HardFP_use was
14802 zero here, but we should never assert when
14803 consuming an object file that has suspicious
14804 build attributes. The single precision variant
14805 of 'no FP architecture' is still 'no FP
14806 architecture', so we just ignore the tag in this
14807 case. */
14808 break;
14809 }
14810
14811 /* Both the input and the output have nonzero Tag_FP_arch.
14812 So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */
14813
14814 /* If both the input and the output have zero Tag_ABI_HardFP_use,
14815 do nothing. */
14816 if (in_attr[Tag_ABI_HardFP_use].i == 0
14817 && out_attr[Tag_ABI_HardFP_use].i == 0)
14818 ;
14819 /* If the input and the output have different Tag_ABI_HardFP_use,
14820 the combination of them is 0 (implied by Tag_FP_arch). */
14821 else if (in_attr[Tag_ABI_HardFP_use].i
14822 != out_attr[Tag_ABI_HardFP_use].i)
14823 out_attr[Tag_ABI_HardFP_use].i = 0;
14824
14825 /* Now we can handle Tag_FP_arch. */
14826
14827 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
14828 pick the biggest. */
14829 if (in_attr[i].i >= VFP_VERSION_COUNT
14830 && in_attr[i].i > out_attr[i].i)
14831 {
14832 out_attr[i] = in_attr[i];
14833 break;
14834 }
14835 /* The output uses the superset of input features
14836 (ISA version) and registers. */
14837 ver = vfp_versions[in_attr[i].i].ver;
14838 if (ver < vfp_versions[out_attr[i].i].ver)
14839 ver = vfp_versions[out_attr[i].i].ver;
14840 regs = vfp_versions[in_attr[i].i].regs;
14841 if (regs < vfp_versions[out_attr[i].i].regs)
14842 regs = vfp_versions[out_attr[i].i].regs;
14843 /* This assumes all possible supersets are also a valid
14844 options. */
14845 for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
14846 {
14847 if (regs == vfp_versions[newval].regs
14848 && ver == vfp_versions[newval].ver)
14849 break;
14850 }
14851 out_attr[i].i = newval;
14852 }
14853 break;
14854 case Tag_PCS_config:
14855 if (out_attr[i].i == 0)
14856 out_attr[i].i = in_attr[i].i;
14857 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
14858 {
14859 /* It's sometimes ok to mix different configs, so this is only
14860 a warning. */
14861 _bfd_error_handler
14862 (_("warning: %pB: conflicting platform configuration"), ibfd);
14863 }
14864 break;
14865 case Tag_ABI_PCS_R9_use:
14866 if (in_attr[i].i != out_attr[i].i
14867 && out_attr[i].i != AEABI_R9_unused
14868 && in_attr[i].i != AEABI_R9_unused)
14869 {
14870 _bfd_error_handler
14871 (_("error: %pB: conflicting use of R9"), ibfd);
14872 result = FALSE;
14873 }
14874 if (out_attr[i].i == AEABI_R9_unused)
14875 out_attr[i].i = in_attr[i].i;
14876 break;
14877 case Tag_ABI_PCS_RW_data:
14878 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
14879 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
14880 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
14881 {
14882 _bfd_error_handler
14883 (_("error: %pB: SB relative addressing conflicts with use of R9"),
14884 ibfd);
14885 result = FALSE;
14886 }
14887 /* Use the smallest value specified. */
14888 if (in_attr[i].i < out_attr[i].i)
14889 out_attr[i].i = in_attr[i].i;
14890 break;
14891 case Tag_ABI_PCS_wchar_t:
14892 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
14893 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
14894 {
14895 _bfd_error_handler
14896 (_("warning: %pB uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
14897 ibfd, in_attr[i].i, out_attr[i].i);
14898 }
14899 else if (in_attr[i].i && !out_attr[i].i)
14900 out_attr[i].i = in_attr[i].i;
14901 break;
14902 case Tag_ABI_enum_size:
14903 if (in_attr[i].i != AEABI_enum_unused)
14904 {
14905 if (out_attr[i].i == AEABI_enum_unused
14906 || out_attr[i].i == AEABI_enum_forced_wide)
14907 {
14908 /* The existing object is compatible with anything.
14909 Use whatever requirements the new object has. */
14910 out_attr[i].i = in_attr[i].i;
14911 }
14912 else if (in_attr[i].i != AEABI_enum_forced_wide
14913 && out_attr[i].i != in_attr[i].i
14914 && !elf_arm_tdata (obfd)->no_enum_size_warning)
14915 {
14916 static const char *aeabi_enum_names[] =
14917 { "", "variable-size", "32-bit", "" };
14918 const char *in_name =
14919 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
14920 ? aeabi_enum_names[in_attr[i].i]
14921 : "<unknown>";
14922 const char *out_name =
14923 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
14924 ? aeabi_enum_names[out_attr[i].i]
14925 : "<unknown>";
14926 _bfd_error_handler
14927 (_("warning: %pB uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
14928 ibfd, in_name, out_name);
14929 }
14930 }
14931 break;
14932 case Tag_ABI_VFP_args:
14933 /* Aready done. */
14934 break;
14935 case Tag_ABI_WMMX_args:
14936 if (in_attr[i].i != out_attr[i].i)
14937 {
14938 _bfd_error_handler
14939 (_("error: %pB uses iWMMXt register arguments, %pB does not"),
14940 ibfd, obfd);
14941 result = FALSE;
14942 }
14943 break;
14944 case Tag_compatibility:
14945 /* Merged in target-independent code. */
14946 break;
14947 case Tag_ABI_HardFP_use:
14948 /* This is handled along with Tag_FP_arch. */
14949 break;
14950 case Tag_ABI_FP_16bit_format:
14951 if (in_attr[i].i != 0 && out_attr[i].i != 0)
14952 {
14953 if (in_attr[i].i != out_attr[i].i)
14954 {
14955 _bfd_error_handler
14956 (_("error: fp16 format mismatch between %pB and %pB"),
14957 ibfd, obfd);
14958 result = FALSE;
14959 }
14960 }
14961 if (in_attr[i].i != 0)
14962 out_attr[i].i = in_attr[i].i;
14963 break;
14964
14965 case Tag_DIV_use:
14966 /* A value of zero on input means that the divide instruction may
14967 be used if available in the base architecture as specified via
14968 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
14969 the user did not want divide instructions. A value of 2
14970 explicitly means that divide instructions were allowed in ARM
14971 and Thumb state. */
14972 if (in_attr[i].i == out_attr[i].i)
14973 /* Do nothing. */ ;
14974 else if (elf32_arm_attributes_forbid_div (in_attr)
14975 && !elf32_arm_attributes_accept_div (out_attr))
14976 out_attr[i].i = 1;
14977 else if (elf32_arm_attributes_forbid_div (out_attr)
14978 && elf32_arm_attributes_accept_div (in_attr))
14979 out_attr[i].i = in_attr[i].i;
14980 else if (in_attr[i].i == 2)
14981 out_attr[i].i = in_attr[i].i;
14982 break;
14983
14984 case Tag_MPextension_use_legacy:
14985 /* We don't output objects with Tag_MPextension_use_legacy - we
14986 move the value to Tag_MPextension_use. */
14987 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
14988 {
14989 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
14990 {
14991 _bfd_error_handler
14992 (_("%pB has both the current and legacy "
14993 "Tag_MPextension_use attributes"),
14994 ibfd);
14995 result = FALSE;
14996 }
14997 }
14998
14999 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
15000 out_attr[Tag_MPextension_use] = in_attr[i];
15001
15002 break;
15003
15004 case Tag_nodefaults:
15005 /* This tag is set if it exists, but the value is unused (and is
15006 typically zero). We don't actually need to do anything here -
15007 the merge happens automatically when the type flags are merged
15008 below. */
15009 break;
15010 case Tag_also_compatible_with:
15011 /* Already done in Tag_CPU_arch. */
15012 break;
15013 case Tag_conformance:
15014 /* Keep the attribute if it matches. Throw it away otherwise.
15015 No attribute means no claim to conform. */
15016 if (!in_attr[i].s || !out_attr[i].s
15017 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
15018 out_attr[i].s = NULL;
15019 break;
15020
15021 default:
15022 result
15023 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
15024 }
15025
15026 /* If out_attr was copied from in_attr then it won't have a type yet. */
15027 if (in_attr[i].type && !out_attr[i].type)
15028 out_attr[i].type = in_attr[i].type;
15029 }
15030
15031 /* Merge Tag_compatibility attributes and any common GNU ones. */
15032 if (!_bfd_elf_merge_object_attributes (ibfd, info))
15033 return FALSE;
15034
15035 /* Check for any attributes not known on ARM. */
15036 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
15037
15038 return result;
15039 }
15040
15041
15042 /* Return TRUE if the two EABI versions are incompatible. */
15043
15044 static bfd_boolean
15045 elf32_arm_versions_compatible (unsigned iver, unsigned over)
15046 {
15047 /* v4 and v5 are the same spec before and after it was released,
15048 so allow mixing them. */
15049 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
15050 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
15051 return TRUE;
15052
15053 return (iver == over);
15054 }
15055
15056 /* Merge backend specific data from an object file to the output
15057 object file when linking. */
15058
15059 static bfd_boolean
15060 elf32_arm_merge_private_bfd_data (bfd *, struct bfd_link_info *);
15061
15062 /* Display the flags field. */
15063
15064 static bfd_boolean
15065 elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
15066 {
15067 FILE * file = (FILE *) ptr;
15068 unsigned long flags;
15069
15070 BFD_ASSERT (abfd != NULL && ptr != NULL);
15071
15072 /* Print normal ELF private data. */
15073 _bfd_elf_print_private_bfd_data (abfd, ptr);
15074
15075 flags = elf_elfheader (abfd)->e_flags;
15076 /* Ignore init flag - it may not be set, despite the flags field
15077 containing valid data. */
15078
15079 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
15080
15081 switch (EF_ARM_EABI_VERSION (flags))
15082 {
15083 case EF_ARM_EABI_UNKNOWN:
15084 /* The following flag bits are GNU extensions and not part of the
15085 official ARM ELF extended ABI. Hence they are only decoded if
15086 the EABI version is not set. */
15087 if (flags & EF_ARM_INTERWORK)
15088 fprintf (file, _(" [interworking enabled]"));
15089
15090 if (flags & EF_ARM_APCS_26)
15091 fprintf (file, " [APCS-26]");
15092 else
15093 fprintf (file, " [APCS-32]");
15094
15095 if (flags & EF_ARM_VFP_FLOAT)
15096 fprintf (file, _(" [VFP float format]"));
15097 else if (flags & EF_ARM_MAVERICK_FLOAT)
15098 fprintf (file, _(" [Maverick float format]"));
15099 else
15100 fprintf (file, _(" [FPA float format]"));
15101
15102 if (flags & EF_ARM_APCS_FLOAT)
15103 fprintf (file, _(" [floats passed in float registers]"));
15104
15105 if (flags & EF_ARM_PIC)
15106 fprintf (file, _(" [position independent]"));
15107
15108 if (flags & EF_ARM_NEW_ABI)
15109 fprintf (file, _(" [new ABI]"));
15110
15111 if (flags & EF_ARM_OLD_ABI)
15112 fprintf (file, _(" [old ABI]"));
15113
15114 if (flags & EF_ARM_SOFT_FLOAT)
15115 fprintf (file, _(" [software FP]"));
15116
15117 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
15118 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
15119 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
15120 | EF_ARM_MAVERICK_FLOAT);
15121 break;
15122
15123 case EF_ARM_EABI_VER1:
15124 fprintf (file, _(" [Version1 EABI]"));
15125
15126 if (flags & EF_ARM_SYMSARESORTED)
15127 fprintf (file, _(" [sorted symbol table]"));
15128 else
15129 fprintf (file, _(" [unsorted symbol table]"));
15130
15131 flags &= ~ EF_ARM_SYMSARESORTED;
15132 break;
15133
15134 case EF_ARM_EABI_VER2:
15135 fprintf (file, _(" [Version2 EABI]"));
15136
15137 if (flags & EF_ARM_SYMSARESORTED)
15138 fprintf (file, _(" [sorted symbol table]"));
15139 else
15140 fprintf (file, _(" [unsorted symbol table]"));
15141
15142 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
15143 fprintf (file, _(" [dynamic symbols use segment index]"));
15144
15145 if (flags & EF_ARM_MAPSYMSFIRST)
15146 fprintf (file, _(" [mapping symbols precede others]"));
15147
15148 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
15149 | EF_ARM_MAPSYMSFIRST);
15150 break;
15151
15152 case EF_ARM_EABI_VER3:
15153 fprintf (file, _(" [Version3 EABI]"));
15154 break;
15155
15156 case EF_ARM_EABI_VER4:
15157 fprintf (file, _(" [Version4 EABI]"));
15158 goto eabi;
15159
15160 case EF_ARM_EABI_VER5:
15161 fprintf (file, _(" [Version5 EABI]"));
15162
15163 if (flags & EF_ARM_ABI_FLOAT_SOFT)
15164 fprintf (file, _(" [soft-float ABI]"));
15165
15166 if (flags & EF_ARM_ABI_FLOAT_HARD)
15167 fprintf (file, _(" [hard-float ABI]"));
15168
15169 flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
15170
15171 eabi:
15172 if (flags & EF_ARM_BE8)
15173 fprintf (file, _(" [BE8]"));
15174
15175 if (flags & EF_ARM_LE8)
15176 fprintf (file, _(" [LE8]"));
15177
15178 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
15179 break;
15180
15181 default:
15182 fprintf (file, _(" <EABI version unrecognised>"));
15183 break;
15184 }
15185
15186 flags &= ~ EF_ARM_EABIMASK;
15187
15188 if (flags & EF_ARM_RELEXEC)
15189 fprintf (file, _(" [relocatable executable]"));
15190
15191 if (flags & EF_ARM_PIC)
15192 fprintf (file, _(" [position independent]"));
15193
15194 if (elf_elfheader (abfd)->e_ident[EI_OSABI] == ELFOSABI_ARM_FDPIC)
15195 fprintf (file, _(" [FDPIC ABI supplement]"));
15196
15197 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_PIC);
15198
15199 if (flags)
15200 fprintf (file, _("<Unrecognised flag bits set>"));
15201
15202 fputc ('\n', file);
15203
15204 return TRUE;
15205 }
15206
15207 static int
15208 elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
15209 {
15210 switch (ELF_ST_TYPE (elf_sym->st_info))
15211 {
15212 case STT_ARM_TFUNC:
15213 return ELF_ST_TYPE (elf_sym->st_info);
15214
15215 case STT_ARM_16BIT:
15216 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
15217 This allows us to distinguish between data used by Thumb instructions
15218 and non-data (which is probably code) inside Thumb regions of an
15219 executable. */
15220 if (type != STT_OBJECT && type != STT_TLS)
15221 return ELF_ST_TYPE (elf_sym->st_info);
15222 break;
15223
15224 default:
15225 break;
15226 }
15227
15228 return type;
15229 }
15230
15231 static asection *
15232 elf32_arm_gc_mark_hook (asection *sec,
15233 struct bfd_link_info *info,
15234 Elf_Internal_Rela *rel,
15235 struct elf_link_hash_entry *h,
15236 Elf_Internal_Sym *sym)
15237 {
15238 if (h != NULL)
15239 switch (ELF32_R_TYPE (rel->r_info))
15240 {
15241 case R_ARM_GNU_VTINHERIT:
15242 case R_ARM_GNU_VTENTRY:
15243 return NULL;
15244 }
15245
15246 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
15247 }
15248
15249 /* Look through the relocs for a section during the first phase. */
15250
15251 static bfd_boolean
15252 elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
15253 asection *sec, const Elf_Internal_Rela *relocs)
15254 {
15255 Elf_Internal_Shdr *symtab_hdr;
15256 struct elf_link_hash_entry **sym_hashes;
15257 const Elf_Internal_Rela *rel;
15258 const Elf_Internal_Rela *rel_end;
15259 bfd *dynobj;
15260 asection *sreloc;
15261 struct elf32_arm_link_hash_table *htab;
15262 bfd_boolean call_reloc_p;
15263 bfd_boolean may_become_dynamic_p;
15264 bfd_boolean may_need_local_target_p;
15265 unsigned long nsyms;
15266
15267 if (bfd_link_relocatable (info))
15268 return TRUE;
15269
15270 BFD_ASSERT (is_arm_elf (abfd));
15271
15272 htab = elf32_arm_hash_table (info);
15273 if (htab == NULL)
15274 return FALSE;
15275
15276 sreloc = NULL;
15277
15278 /* Create dynamic sections for relocatable executables so that we can
15279 copy relocations. */
15280 if (htab->root.is_relocatable_executable
15281 && ! htab->root.dynamic_sections_created)
15282 {
15283 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
15284 return FALSE;
15285 }
15286
15287 if (htab->root.dynobj == NULL)
15288 htab->root.dynobj = abfd;
15289 if (!create_ifunc_sections (info))
15290 return FALSE;
15291
15292 dynobj = htab->root.dynobj;
15293
15294 symtab_hdr = & elf_symtab_hdr (abfd);
15295 sym_hashes = elf_sym_hashes (abfd);
15296 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
15297
15298 rel_end = relocs + sec->reloc_count;
15299 for (rel = relocs; rel < rel_end; rel++)
15300 {
15301 Elf_Internal_Sym *isym;
15302 struct elf_link_hash_entry *h;
15303 struct elf32_arm_link_hash_entry *eh;
15304 unsigned int r_symndx;
15305 int r_type;
15306
15307 r_symndx = ELF32_R_SYM (rel->r_info);
15308 r_type = ELF32_R_TYPE (rel->r_info);
15309 r_type = arm_real_reloc_type (htab, r_type);
15310
15311 if (r_symndx >= nsyms
15312 /* PR 9934: It is possible to have relocations that do not
15313 refer to symbols, thus it is also possible to have an
15314 object file containing relocations but no symbol table. */
15315 && (r_symndx > STN_UNDEF || nsyms > 0))
15316 {
15317 _bfd_error_handler (_("%pB: bad symbol index: %d"), abfd,
15318 r_symndx);
15319 return FALSE;
15320 }
15321
15322 h = NULL;
15323 isym = NULL;
15324 if (nsyms > 0)
15325 {
15326 if (r_symndx < symtab_hdr->sh_info)
15327 {
15328 /* A local symbol. */
15329 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
15330 abfd, r_symndx);
15331 if (isym == NULL)
15332 return FALSE;
15333 }
15334 else
15335 {
15336 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
15337 while (h->root.type == bfd_link_hash_indirect
15338 || h->root.type == bfd_link_hash_warning)
15339 h = (struct elf_link_hash_entry *) h->root.u.i.link;
15340 }
15341 }
15342
15343 eh = (struct elf32_arm_link_hash_entry *) h;
15344
15345 call_reloc_p = FALSE;
15346 may_become_dynamic_p = FALSE;
15347 may_need_local_target_p = FALSE;
15348
15349 /* Could be done earlier, if h were already available. */
15350 r_type = elf32_arm_tls_transition (info, r_type, h);
15351 switch (r_type)
15352 {
15353 case R_ARM_GOTOFFFUNCDESC:
15354 {
15355 if (h == NULL)
15356 {
15357 if (!elf32_arm_allocate_local_sym_info (abfd))
15358 return FALSE;
15359 elf32_arm_local_fdpic_cnts(abfd)[r_symndx].gotofffuncdesc_cnt += 1;
15360 elf32_arm_local_fdpic_cnts(abfd)[r_symndx].funcdesc_offset = -1;
15361 }
15362 else
15363 {
15364 eh->fdpic_cnts.gotofffuncdesc_cnt++;
15365 }
15366 }
15367 break;
15368
15369 case R_ARM_GOTFUNCDESC:
15370 {
15371 if (h == NULL)
15372 {
15373 /* Such a relocation is not supposed to be generated
15374 by gcc on a static function. */
15375 /* Anyway if needed it could be handled. */
15376 abort();
15377 }
15378 else
15379 {
15380 eh->fdpic_cnts.gotfuncdesc_cnt++;
15381 }
15382 }
15383 break;
15384
15385 case R_ARM_FUNCDESC:
15386 {
15387 if (h == NULL)
15388 {
15389 if (!elf32_arm_allocate_local_sym_info (abfd))
15390 return FALSE;
15391 elf32_arm_local_fdpic_cnts(abfd)[r_symndx].funcdesc_cnt += 1;
15392 elf32_arm_local_fdpic_cnts(abfd)[r_symndx].funcdesc_offset = -1;
15393 }
15394 else
15395 {
15396 eh->fdpic_cnts.funcdesc_cnt++;
15397 }
15398 }
15399 break;
15400
15401 case R_ARM_GOT32:
15402 case R_ARM_GOT_PREL:
15403 case R_ARM_TLS_GD32:
15404 case R_ARM_TLS_GD32_FDPIC:
15405 case R_ARM_TLS_IE32:
15406 case R_ARM_TLS_IE32_FDPIC:
15407 case R_ARM_TLS_GOTDESC:
15408 case R_ARM_TLS_DESCSEQ:
15409 case R_ARM_THM_TLS_DESCSEQ:
15410 case R_ARM_TLS_CALL:
15411 case R_ARM_THM_TLS_CALL:
15412 /* This symbol requires a global offset table entry. */
15413 {
15414 int tls_type, old_tls_type;
15415
15416 switch (r_type)
15417 {
15418 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
15419 case R_ARM_TLS_GD32_FDPIC: tls_type = GOT_TLS_GD; break;
15420
15421 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
15422 case R_ARM_TLS_IE32_FDPIC: tls_type = GOT_TLS_IE; break;
15423
15424 case R_ARM_TLS_GOTDESC:
15425 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
15426 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
15427 tls_type = GOT_TLS_GDESC; break;
15428
15429 default: tls_type = GOT_NORMAL; break;
15430 }
15431
15432 if (!bfd_link_executable (info) && (tls_type & GOT_TLS_IE))
15433 info->flags |= DF_STATIC_TLS;
15434
15435 if (h != NULL)
15436 {
15437 h->got.refcount++;
15438 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
15439 }
15440 else
15441 {
15442 /* This is a global offset table entry for a local symbol. */
15443 if (!elf32_arm_allocate_local_sym_info (abfd))
15444 return FALSE;
15445 elf_local_got_refcounts (abfd)[r_symndx] += 1;
15446 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
15447 }
15448
15449 /* If a variable is accessed with both tls methods, two
15450 slots may be created. */
15451 if (GOT_TLS_GD_ANY_P (old_tls_type)
15452 && GOT_TLS_GD_ANY_P (tls_type))
15453 tls_type |= old_tls_type;
15454
15455 /* We will already have issued an error message if there
15456 is a TLS/non-TLS mismatch, based on the symbol
15457 type. So just combine any TLS types needed. */
15458 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
15459 && tls_type != GOT_NORMAL)
15460 tls_type |= old_tls_type;
15461
15462 /* If the symbol is accessed in both IE and GDESC
15463 method, we're able to relax. Turn off the GDESC flag,
15464 without messing up with any other kind of tls types
15465 that may be involved. */
15466 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
15467 tls_type &= ~GOT_TLS_GDESC;
15468
15469 if (old_tls_type != tls_type)
15470 {
15471 if (h != NULL)
15472 elf32_arm_hash_entry (h)->tls_type = tls_type;
15473 else
15474 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
15475 }
15476 }
15477 /* Fall through. */
15478
15479 case R_ARM_TLS_LDM32:
15480 case R_ARM_TLS_LDM32_FDPIC:
15481 if (r_type == R_ARM_TLS_LDM32 || r_type == R_ARM_TLS_LDM32_FDPIC)
15482 htab->tls_ldm_got.refcount++;
15483 /* Fall through. */
15484
15485 case R_ARM_GOTOFF32:
15486 case R_ARM_GOTPC:
15487 if (htab->root.sgot == NULL
15488 && !create_got_section (htab->root.dynobj, info))
15489 return FALSE;
15490 break;
15491
15492 case R_ARM_PC24:
15493 case R_ARM_PLT32:
15494 case R_ARM_CALL:
15495 case R_ARM_JUMP24:
15496 case R_ARM_PREL31:
15497 case R_ARM_THM_CALL:
15498 case R_ARM_THM_JUMP24:
15499 case R_ARM_THM_JUMP19:
15500 call_reloc_p = TRUE;
15501 may_need_local_target_p = TRUE;
15502 break;
15503
15504 case R_ARM_ABS12:
15505 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
15506 ldr __GOTT_INDEX__ offsets. */
15507 if (htab->root.target_os != is_vxworks)
15508 {
15509 may_need_local_target_p = TRUE;
15510 break;
15511 }
15512 else goto jump_over;
15513
15514 /* Fall through. */
15515
15516 case R_ARM_MOVW_ABS_NC:
15517 case R_ARM_MOVT_ABS:
15518 case R_ARM_THM_MOVW_ABS_NC:
15519 case R_ARM_THM_MOVT_ABS:
15520 if (bfd_link_pic (info))
15521 {
15522 _bfd_error_handler
15523 (_("%pB: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
15524 abfd, elf32_arm_howto_table_1[r_type].name,
15525 (h) ? h->root.root.string : "a local symbol");
15526 bfd_set_error (bfd_error_bad_value);
15527 return FALSE;
15528 }
15529
15530 /* Fall through. */
15531 case R_ARM_ABS32:
15532 case R_ARM_ABS32_NOI:
15533 jump_over:
15534 if (h != NULL && bfd_link_executable (info))
15535 {
15536 h->pointer_equality_needed = 1;
15537 }
15538 /* Fall through. */
15539 case R_ARM_REL32:
15540 case R_ARM_REL32_NOI:
15541 case R_ARM_MOVW_PREL_NC:
15542 case R_ARM_MOVT_PREL:
15543 case R_ARM_THM_MOVW_PREL_NC:
15544 case R_ARM_THM_MOVT_PREL:
15545
15546 /* Should the interworking branches be listed here? */
15547 if ((bfd_link_pic (info) || htab->root.is_relocatable_executable
15548 || htab->fdpic_p)
15549 && (sec->flags & SEC_ALLOC) != 0)
15550 {
15551 if (h == NULL
15552 && elf32_arm_howto_from_type (r_type)->pc_relative)
15553 {
15554 /* In shared libraries and relocatable executables,
15555 we treat local relative references as calls;
15556 see the related SYMBOL_CALLS_LOCAL code in
15557 allocate_dynrelocs. */
15558 call_reloc_p = TRUE;
15559 may_need_local_target_p = TRUE;
15560 }
15561 else
15562 /* We are creating a shared library or relocatable
15563 executable, and this is a reloc against a global symbol,
15564 or a non-PC-relative reloc against a local symbol.
15565 We may need to copy the reloc into the output. */
15566 may_become_dynamic_p = TRUE;
15567 }
15568 else
15569 may_need_local_target_p = TRUE;
15570 break;
15571
15572 /* This relocation describes the C++ object vtable hierarchy.
15573 Reconstruct it for later use during GC. */
15574 case R_ARM_GNU_VTINHERIT:
15575 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
15576 return FALSE;
15577 break;
15578
15579 /* This relocation describes which C++ vtable entries are actually
15580 used. Record for later use during GC. */
15581 case R_ARM_GNU_VTENTRY:
15582 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
15583 return FALSE;
15584 break;
15585 }
15586
15587 if (h != NULL)
15588 {
15589 if (call_reloc_p)
15590 /* We may need a .plt entry if the function this reloc
15591 refers to is in a different object, regardless of the
15592 symbol's type. We can't tell for sure yet, because
15593 something later might force the symbol local. */
15594 h->needs_plt = 1;
15595 else if (may_need_local_target_p)
15596 /* If this reloc is in a read-only section, we might
15597 need a copy reloc. We can't check reliably at this
15598 stage whether the section is read-only, as input
15599 sections have not yet been mapped to output sections.
15600 Tentatively set the flag for now, and correct in
15601 adjust_dynamic_symbol. */
15602 h->non_got_ref = 1;
15603 }
15604
15605 if (may_need_local_target_p
15606 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
15607 {
15608 union gotplt_union *root_plt;
15609 struct arm_plt_info *arm_plt;
15610 struct arm_local_iplt_info *local_iplt;
15611
15612 if (h != NULL)
15613 {
15614 root_plt = &h->plt;
15615 arm_plt = &eh->plt;
15616 }
15617 else
15618 {
15619 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
15620 if (local_iplt == NULL)
15621 return FALSE;
15622 root_plt = &local_iplt->root;
15623 arm_plt = &local_iplt->arm;
15624 }
15625
15626 /* If the symbol is a function that doesn't bind locally,
15627 this relocation will need a PLT entry. */
15628 if (root_plt->refcount != -1)
15629 root_plt->refcount += 1;
15630
15631 if (!call_reloc_p)
15632 arm_plt->noncall_refcount++;
15633
15634 /* It's too early to use htab->use_blx here, so we have to
15635 record possible blx references separately from
15636 relocs that definitely need a thumb stub. */
15637
15638 if (r_type == R_ARM_THM_CALL)
15639 arm_plt->maybe_thumb_refcount += 1;
15640
15641 if (r_type == R_ARM_THM_JUMP24
15642 || r_type == R_ARM_THM_JUMP19)
15643 arm_plt->thumb_refcount += 1;
15644 }
15645
15646 if (may_become_dynamic_p)
15647 {
15648 struct elf_dyn_relocs *p, **head;
15649
15650 /* Create a reloc section in dynobj. */
15651 if (sreloc == NULL)
15652 {
15653 sreloc = _bfd_elf_make_dynamic_reloc_section
15654 (sec, dynobj, 2, abfd, ! htab->use_rel);
15655
15656 if (sreloc == NULL)
15657 return FALSE;
15658
15659 /* BPABI objects never have dynamic relocations mapped. */
15660 if (htab->root.target_os == is_symbian)
15661 {
15662 flagword flags;
15663
15664 flags = bfd_section_flags (sreloc);
15665 flags &= ~(SEC_LOAD | SEC_ALLOC);
15666 bfd_set_section_flags (sreloc, flags);
15667 }
15668 }
15669
15670 /* If this is a global symbol, count the number of
15671 relocations we need for this symbol. */
15672 if (h != NULL)
15673 head = &h->dyn_relocs;
15674 else
15675 {
15676 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
15677 if (head == NULL)
15678 return FALSE;
15679 }
15680
15681 p = *head;
15682 if (p == NULL || p->sec != sec)
15683 {
15684 size_t amt = sizeof *p;
15685
15686 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
15687 if (p == NULL)
15688 return FALSE;
15689 p->next = *head;
15690 *head = p;
15691 p->sec = sec;
15692 p->count = 0;
15693 p->pc_count = 0;
15694 }
15695
15696 if (elf32_arm_howto_from_type (r_type)->pc_relative)
15697 p->pc_count += 1;
15698 p->count += 1;
15699 if (h == NULL && htab->fdpic_p && !bfd_link_pic(info)
15700 && r_type != R_ARM_ABS32 && r_type != R_ARM_ABS32_NOI) {
15701 /* Here we only support R_ARM_ABS32 and R_ARM_ABS32_NOI
15702 that will become rofixup. */
15703 /* This is due to the fact that we suppose all will become rofixup. */
15704 fprintf(stderr, "FDPIC does not yet support %d relocation to become dynamic for executable\n", r_type);
15705 _bfd_error_handler
15706 (_("FDPIC does not yet support %s relocation"
15707 " to become dynamic for executable"),
15708 elf32_arm_howto_table_1[r_type].name);
15709 abort();
15710 }
15711 }
15712 }
15713
15714 return TRUE;
15715 }
15716
15717 static void
15718 elf32_arm_update_relocs (asection *o,
15719 struct bfd_elf_section_reloc_data *reldata)
15720 {
15721 void (*swap_in) (bfd *, const bfd_byte *, Elf_Internal_Rela *);
15722 void (*swap_out) (bfd *, const Elf_Internal_Rela *, bfd_byte *);
15723 const struct elf_backend_data *bed;
15724 _arm_elf_section_data *eado;
15725 struct bfd_link_order *p;
15726 bfd_byte *erela_head, *erela;
15727 Elf_Internal_Rela *irela_head, *irela;
15728 Elf_Internal_Shdr *rel_hdr;
15729 bfd *abfd;
15730 unsigned int count;
15731
15732 eado = get_arm_elf_section_data (o);
15733
15734 if (!eado || eado->elf.this_hdr.sh_type != SHT_ARM_EXIDX)
15735 return;
15736
15737 abfd = o->owner;
15738 bed = get_elf_backend_data (abfd);
15739 rel_hdr = reldata->hdr;
15740
15741 if (rel_hdr->sh_entsize == bed->s->sizeof_rel)
15742 {
15743 swap_in = bed->s->swap_reloc_in;
15744 swap_out = bed->s->swap_reloc_out;
15745 }
15746 else if (rel_hdr->sh_entsize == bed->s->sizeof_rela)
15747 {
15748 swap_in = bed->s->swap_reloca_in;
15749 swap_out = bed->s->swap_reloca_out;
15750 }
15751 else
15752 abort ();
15753
15754 erela_head = rel_hdr->contents;
15755 irela_head = (Elf_Internal_Rela *) bfd_zmalloc
15756 ((NUM_SHDR_ENTRIES (rel_hdr) + 1) * sizeof (*irela_head));
15757
15758 erela = erela_head;
15759 irela = irela_head;
15760 count = 0;
15761
15762 for (p = o->map_head.link_order; p; p = p->next)
15763 {
15764 if (p->type == bfd_section_reloc_link_order
15765 || p->type == bfd_symbol_reloc_link_order)
15766 {
15767 (*swap_in) (abfd, erela, irela);
15768 erela += rel_hdr->sh_entsize;
15769 irela++;
15770 count++;
15771 }
15772 else if (p->type == bfd_indirect_link_order)
15773 {
15774 struct bfd_elf_section_reloc_data *input_reldata;
15775 arm_unwind_table_edit *edit_list, *edit_tail;
15776 _arm_elf_section_data *eadi;
15777 bfd_size_type j;
15778 bfd_vma offset;
15779 asection *i;
15780
15781 i = p->u.indirect.section;
15782
15783 eadi = get_arm_elf_section_data (i);
15784 edit_list = eadi->u.exidx.unwind_edit_list;
15785 edit_tail = eadi->u.exidx.unwind_edit_tail;
15786 offset = i->output_offset;
15787
15788 if (eadi->elf.rel.hdr &&
15789 eadi->elf.rel.hdr->sh_entsize == rel_hdr->sh_entsize)
15790 input_reldata = &eadi->elf.rel;
15791 else if (eadi->elf.rela.hdr &&
15792 eadi->elf.rela.hdr->sh_entsize == rel_hdr->sh_entsize)
15793 input_reldata = &eadi->elf.rela;
15794 else
15795 abort ();
15796
15797 if (edit_list)
15798 {
15799 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
15800 {
15801 arm_unwind_table_edit *edit_node, *edit_next;
15802 bfd_vma bias;
15803 bfd_vma reloc_index;
15804
15805 (*swap_in) (abfd, erela, irela);
15806 reloc_index = (irela->r_offset - offset) / 8;
15807
15808 bias = 0;
15809 edit_node = edit_list;
15810 for (edit_next = edit_list;
15811 edit_next && edit_next->index <= reloc_index;
15812 edit_next = edit_node->next)
15813 {
15814 bias++;
15815 edit_node = edit_next;
15816 }
15817
15818 if (edit_node->type != DELETE_EXIDX_ENTRY
15819 || edit_node->index != reloc_index)
15820 {
15821 irela->r_offset -= bias * 8;
15822 irela++;
15823 count++;
15824 }
15825
15826 erela += rel_hdr->sh_entsize;
15827 }
15828
15829 if (edit_tail->type == INSERT_EXIDX_CANTUNWIND_AT_END)
15830 {
15831 /* New relocation entity. */
15832 asection *text_sec = edit_tail->linked_section;
15833 asection *text_out = text_sec->output_section;
15834 bfd_vma exidx_offset = offset + i->size - 8;
15835
15836 irela->r_addend = 0;
15837 irela->r_offset = exidx_offset;
15838 irela->r_info = ELF32_R_INFO
15839 (text_out->target_index, R_ARM_PREL31);
15840 irela++;
15841 count++;
15842 }
15843 }
15844 else
15845 {
15846 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
15847 {
15848 (*swap_in) (abfd, erela, irela);
15849 erela += rel_hdr->sh_entsize;
15850 irela++;
15851 }
15852
15853 count += NUM_SHDR_ENTRIES (input_reldata->hdr);
15854 }
15855 }
15856 }
15857
15858 reldata->count = count;
15859 rel_hdr->sh_size = count * rel_hdr->sh_entsize;
15860
15861 erela = erela_head;
15862 irela = irela_head;
15863 while (count > 0)
15864 {
15865 (*swap_out) (abfd, irela, erela);
15866 erela += rel_hdr->sh_entsize;
15867 irela++;
15868 count--;
15869 }
15870
15871 free (irela_head);
15872
15873 /* Hashes are no longer valid. */
15874 free (reldata->hashes);
15875 reldata->hashes = NULL;
15876 }
15877
15878 /* Unwinding tables are not referenced directly. This pass marks them as
15879 required if the corresponding code section is marked. Similarly, ARMv8-M
15880 secure entry functions can only be referenced by SG veneers which are
15881 created after the GC process. They need to be marked in case they reside in
15882 their own section (as would be the case if code was compiled with
15883 -ffunction-sections). */
15884
15885 static bfd_boolean
15886 elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
15887 elf_gc_mark_hook_fn gc_mark_hook)
15888 {
15889 bfd *sub;
15890 Elf_Internal_Shdr **elf_shdrp;
15891 asection *cmse_sec;
15892 obj_attribute *out_attr;
15893 Elf_Internal_Shdr *symtab_hdr;
15894 unsigned i, sym_count, ext_start;
15895 const struct elf_backend_data *bed;
15896 struct elf_link_hash_entry **sym_hashes;
15897 struct elf32_arm_link_hash_entry *cmse_hash;
15898 bfd_boolean again, is_v8m, first_bfd_browse = TRUE;
15899 bfd_boolean debug_sec_need_to_be_marked = FALSE;
15900 asection *isec;
15901
15902 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
15903
15904 out_attr = elf_known_obj_attributes_proc (info->output_bfd);
15905 is_v8m = out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
15906 && out_attr[Tag_CPU_arch_profile].i == 'M';
15907
15908 /* Marking EH data may cause additional code sections to be marked,
15909 requiring multiple passes. */
15910 again = TRUE;
15911 while (again)
15912 {
15913 again = FALSE;
15914 for (sub = info->input_bfds; sub != NULL; sub = sub->link.next)
15915 {
15916 asection *o;
15917
15918 if (! is_arm_elf (sub))
15919 continue;
15920
15921 elf_shdrp = elf_elfsections (sub);
15922 for (o = sub->sections; o != NULL; o = o->next)
15923 {
15924 Elf_Internal_Shdr *hdr;
15925
15926 hdr = &elf_section_data (o)->this_hdr;
15927 if (hdr->sh_type == SHT_ARM_EXIDX
15928 && hdr->sh_link
15929 && hdr->sh_link < elf_numsections (sub)
15930 && !o->gc_mark
15931 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
15932 {
15933 again = TRUE;
15934 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
15935 return FALSE;
15936 }
15937 }
15938
15939 /* Mark section holding ARMv8-M secure entry functions. We mark all
15940 of them so no need for a second browsing. */
15941 if (is_v8m && first_bfd_browse)
15942 {
15943 sym_hashes = elf_sym_hashes (sub);
15944 bed = get_elf_backend_data (sub);
15945 symtab_hdr = &elf_tdata (sub)->symtab_hdr;
15946 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
15947 ext_start = symtab_hdr->sh_info;
15948
15949 /* Scan symbols. */
15950 for (i = ext_start; i < sym_count; i++)
15951 {
15952 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
15953
15954 /* Assume it is a special symbol. If not, cmse_scan will
15955 warn about it and user can do something about it. */
15956 if (CONST_STRNEQ (cmse_hash->root.root.root.string,
15957 CMSE_PREFIX))
15958 {
15959 cmse_sec = cmse_hash->root.root.u.def.section;
15960 if (!cmse_sec->gc_mark
15961 && !_bfd_elf_gc_mark (info, cmse_sec, gc_mark_hook))
15962 return FALSE;
15963 /* The debug sections related to these secure entry
15964 functions are marked on enabling below flag. */
15965 debug_sec_need_to_be_marked = TRUE;
15966 }
15967 }
15968
15969 if (debug_sec_need_to_be_marked)
15970 {
15971 /* Looping over all the sections of the object file containing
15972 Armv8-M secure entry functions and marking all the debug
15973 sections. */
15974 for (isec = sub->sections; isec != NULL; isec = isec->next)
15975 {
15976 /* If not a debug sections, skip it. */
15977 if (!isec->gc_mark && (isec->flags & SEC_DEBUGGING))
15978 isec->gc_mark = 1 ;
15979 }
15980 debug_sec_need_to_be_marked = FALSE;
15981 }
15982 }
15983 }
15984 first_bfd_browse = FALSE;
15985 }
15986
15987 return TRUE;
15988 }
15989
15990 /* Treat mapping symbols as special target symbols. */
15991
15992 static bfd_boolean
15993 elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
15994 {
15995 return bfd_is_arm_special_symbol_name (sym->name,
15996 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
15997 }
15998
15999 /* If the ELF symbol SYM might be a function in SEC, return the
16000 function size and set *CODE_OFF to the function's entry point,
16001 otherwise return zero. */
16002
16003 static bfd_size_type
16004 elf32_arm_maybe_function_sym (const asymbol *sym, asection *sec,
16005 bfd_vma *code_off)
16006 {
16007 bfd_size_type size;
16008
16009 if ((sym->flags & (BSF_SECTION_SYM | BSF_FILE | BSF_OBJECT
16010 | BSF_THREAD_LOCAL | BSF_RELC | BSF_SRELC)) != 0
16011 || sym->section != sec)
16012 return 0;
16013
16014 if (!(sym->flags & BSF_SYNTHETIC))
16015 switch (ELF_ST_TYPE (((elf_symbol_type *) sym)->internal_elf_sym.st_info))
16016 {
16017 case STT_FUNC:
16018 case STT_ARM_TFUNC:
16019 case STT_NOTYPE:
16020 break;
16021 default:
16022 return 0;
16023 }
16024
16025 if ((sym->flags & BSF_LOCAL)
16026 && bfd_is_arm_special_symbol_name (sym->name,
16027 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
16028 return 0;
16029
16030 *code_off = sym->value;
16031 size = 0;
16032 if (!(sym->flags & BSF_SYNTHETIC))
16033 size = ((elf_symbol_type *) sym)->internal_elf_sym.st_size;
16034 if (size == 0)
16035 size = 1;
16036 return size;
16037 }
16038
16039 static bfd_boolean
16040 elf32_arm_find_inliner_info (bfd * abfd,
16041 const char ** filename_ptr,
16042 const char ** functionname_ptr,
16043 unsigned int * line_ptr)
16044 {
16045 bfd_boolean found;
16046 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
16047 functionname_ptr, line_ptr,
16048 & elf_tdata (abfd)->dwarf2_find_line_info);
16049 return found;
16050 }
16051
16052 /* Adjust a symbol defined by a dynamic object and referenced by a
16053 regular object. The current definition is in some section of the
16054 dynamic object, but we're not including those sections. We have to
16055 change the definition to something the rest of the link can
16056 understand. */
16057
16058 static bfd_boolean
16059 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
16060 struct elf_link_hash_entry * h)
16061 {
16062 bfd * dynobj;
16063 asection *s, *srel;
16064 struct elf32_arm_link_hash_entry * eh;
16065 struct elf32_arm_link_hash_table *globals;
16066
16067 globals = elf32_arm_hash_table (info);
16068 if (globals == NULL)
16069 return FALSE;
16070
16071 dynobj = elf_hash_table (info)->dynobj;
16072
16073 /* Make sure we know what is going on here. */
16074 BFD_ASSERT (dynobj != NULL
16075 && (h->needs_plt
16076 || h->type == STT_GNU_IFUNC
16077 || h->is_weakalias
16078 || (h->def_dynamic
16079 && h->ref_regular
16080 && !h->def_regular)));
16081
16082 eh = (struct elf32_arm_link_hash_entry *) h;
16083
16084 /* If this is a function, put it in the procedure linkage table. We
16085 will fill in the contents of the procedure linkage table later,
16086 when we know the address of the .got section. */
16087 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
16088 {
16089 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
16090 symbol binds locally. */
16091 if (h->plt.refcount <= 0
16092 || (h->type != STT_GNU_IFUNC
16093 && (SYMBOL_CALLS_LOCAL (info, h)
16094 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
16095 && h->root.type == bfd_link_hash_undefweak))))
16096 {
16097 /* This case can occur if we saw a PLT32 reloc in an input
16098 file, but the symbol was never referred to by a dynamic
16099 object, or if all references were garbage collected. In
16100 such a case, we don't actually need to build a procedure
16101 linkage table, and we can just do a PC24 reloc instead. */
16102 h->plt.offset = (bfd_vma) -1;
16103 eh->plt.thumb_refcount = 0;
16104 eh->plt.maybe_thumb_refcount = 0;
16105 eh->plt.noncall_refcount = 0;
16106 h->needs_plt = 0;
16107 }
16108
16109 return TRUE;
16110 }
16111 else
16112 {
16113 /* It's possible that we incorrectly decided a .plt reloc was
16114 needed for an R_ARM_PC24 or similar reloc to a non-function sym
16115 in check_relocs. We can't decide accurately between function
16116 and non-function syms in check-relocs; Objects loaded later in
16117 the link may change h->type. So fix it now. */
16118 h->plt.offset = (bfd_vma) -1;
16119 eh->plt.thumb_refcount = 0;
16120 eh->plt.maybe_thumb_refcount = 0;
16121 eh->plt.noncall_refcount = 0;
16122 }
16123
16124 /* If this is a weak symbol, and there is a real definition, the
16125 processor independent code will have arranged for us to see the
16126 real definition first, and we can just use the same value. */
16127 if (h->is_weakalias)
16128 {
16129 struct elf_link_hash_entry *def = weakdef (h);
16130 BFD_ASSERT (def->root.type == bfd_link_hash_defined);
16131 h->root.u.def.section = def->root.u.def.section;
16132 h->root.u.def.value = def->root.u.def.value;
16133 return TRUE;
16134 }
16135
16136 /* If there are no non-GOT references, we do not need a copy
16137 relocation. */
16138 if (!h->non_got_ref)
16139 return TRUE;
16140
16141 /* This is a reference to a symbol defined by a dynamic object which
16142 is not a function. */
16143
16144 /* If we are creating a shared library, we must presume that the
16145 only references to the symbol are via the global offset table.
16146 For such cases we need not do anything here; the relocations will
16147 be handled correctly by relocate_section. Relocatable executables
16148 can reference data in shared objects directly, so we don't need to
16149 do anything here. */
16150 if (bfd_link_pic (info) || globals->root.is_relocatable_executable)
16151 return TRUE;
16152
16153 /* We must allocate the symbol in our .dynbss section, which will
16154 become part of the .bss section of the executable. There will be
16155 an entry for this symbol in the .dynsym section. The dynamic
16156 object will contain position independent code, so all references
16157 from the dynamic object to this symbol will go through the global
16158 offset table. The dynamic linker will use the .dynsym entry to
16159 determine the address it must put in the global offset table, so
16160 both the dynamic object and the regular object will refer to the
16161 same memory location for the variable. */
16162 /* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic
16163 linker to copy the initial value out of the dynamic object and into
16164 the runtime process image. We need to remember the offset into the
16165 .rel(a).bss section we are going to use. */
16166 if ((h->root.u.def.section->flags & SEC_READONLY) != 0)
16167 {
16168 s = globals->root.sdynrelro;
16169 srel = globals->root.sreldynrelro;
16170 }
16171 else
16172 {
16173 s = globals->root.sdynbss;
16174 srel = globals->root.srelbss;
16175 }
16176 if (info->nocopyreloc == 0
16177 && (h->root.u.def.section->flags & SEC_ALLOC) != 0
16178 && h->size != 0)
16179 {
16180 elf32_arm_allocate_dynrelocs (info, srel, 1);
16181 h->needs_copy = 1;
16182 }
16183
16184 return _bfd_elf_adjust_dynamic_copy (info, h, s);
16185 }
16186
16187 /* Allocate space in .plt, .got and associated reloc sections for
16188 dynamic relocs. */
16189
16190 static bfd_boolean
16191 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
16192 {
16193 struct bfd_link_info *info;
16194 struct elf32_arm_link_hash_table *htab;
16195 struct elf32_arm_link_hash_entry *eh;
16196 struct elf_dyn_relocs *p;
16197
16198 if (h->root.type == bfd_link_hash_indirect)
16199 return TRUE;
16200
16201 eh = (struct elf32_arm_link_hash_entry *) h;
16202
16203 info = (struct bfd_link_info *) inf;
16204 htab = elf32_arm_hash_table (info);
16205 if (htab == NULL)
16206 return FALSE;
16207
16208 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
16209 && h->plt.refcount > 0)
16210 {
16211 /* Make sure this symbol is output as a dynamic symbol.
16212 Undefined weak syms won't yet be marked as dynamic. */
16213 if (h->dynindx == -1 && !h->forced_local
16214 && h->root.type == bfd_link_hash_undefweak)
16215 {
16216 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16217 return FALSE;
16218 }
16219
16220 /* If the call in the PLT entry binds locally, the associated
16221 GOT entry should use an R_ARM_IRELATIVE relocation instead of
16222 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
16223 than the .plt section. */
16224 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
16225 {
16226 eh->is_iplt = 1;
16227 if (eh->plt.noncall_refcount == 0
16228 && SYMBOL_REFERENCES_LOCAL (info, h))
16229 /* All non-call references can be resolved directly.
16230 This means that they can (and in some cases, must)
16231 resolve directly to the run-time target, rather than
16232 to the PLT. That in turns means that any .got entry
16233 would be equal to the .igot.plt entry, so there's
16234 no point having both. */
16235 h->got.refcount = 0;
16236 }
16237
16238 if (bfd_link_pic (info)
16239 || eh->is_iplt
16240 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
16241 {
16242 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
16243
16244 /* If this symbol is not defined in a regular file, and we are
16245 not generating a shared library, then set the symbol to this
16246 location in the .plt. This is required to make function
16247 pointers compare as equal between the normal executable and
16248 the shared library. */
16249 if (! bfd_link_pic (info)
16250 && !h->def_regular)
16251 {
16252 h->root.u.def.section = htab->root.splt;
16253 h->root.u.def.value = h->plt.offset;
16254
16255 /* Make sure the function is not marked as Thumb, in case
16256 it is the target of an ABS32 relocation, which will
16257 point to the PLT entry. */
16258 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
16259 }
16260
16261 /* VxWorks executables have a second set of relocations for
16262 each PLT entry. They go in a separate relocation section,
16263 which is processed by the kernel loader. */
16264 if (htab->root.target_os == is_vxworks && !bfd_link_pic (info))
16265 {
16266 /* There is a relocation for the initial PLT entry:
16267 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
16268 if (h->plt.offset == htab->plt_header_size)
16269 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
16270
16271 /* There are two extra relocations for each subsequent
16272 PLT entry: an R_ARM_32 relocation for the GOT entry,
16273 and an R_ARM_32 relocation for the PLT entry. */
16274 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
16275 }
16276 }
16277 else
16278 {
16279 h->plt.offset = (bfd_vma) -1;
16280 h->needs_plt = 0;
16281 }
16282 }
16283 else
16284 {
16285 h->plt.offset = (bfd_vma) -1;
16286 h->needs_plt = 0;
16287 }
16288
16289 eh = (struct elf32_arm_link_hash_entry *) h;
16290 eh->tlsdesc_got = (bfd_vma) -1;
16291
16292 if (h->got.refcount > 0)
16293 {
16294 asection *s;
16295 bfd_boolean dyn;
16296 int tls_type = elf32_arm_hash_entry (h)->tls_type;
16297 int indx;
16298
16299 /* Make sure this symbol is output as a dynamic symbol.
16300 Undefined weak syms won't yet be marked as dynamic. */
16301 if (htab->root.dynamic_sections_created && h->dynindx == -1 && !h->forced_local
16302 && h->root.type == bfd_link_hash_undefweak)
16303 {
16304 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16305 return FALSE;
16306 }
16307
16308 if (htab->root.target_os != is_symbian)
16309 {
16310 s = htab->root.sgot;
16311 h->got.offset = s->size;
16312
16313 if (tls_type == GOT_UNKNOWN)
16314 abort ();
16315
16316 if (tls_type == GOT_NORMAL)
16317 /* Non-TLS symbols need one GOT slot. */
16318 s->size += 4;
16319 else
16320 {
16321 if (tls_type & GOT_TLS_GDESC)
16322 {
16323 /* R_ARM_TLS_DESC needs 2 GOT slots. */
16324 eh->tlsdesc_got
16325 = (htab->root.sgotplt->size
16326 - elf32_arm_compute_jump_table_size (htab));
16327 htab->root.sgotplt->size += 8;
16328 h->got.offset = (bfd_vma) -2;
16329 /* plt.got_offset needs to know there's a TLS_DESC
16330 reloc in the middle of .got.plt. */
16331 htab->num_tls_desc++;
16332 }
16333
16334 if (tls_type & GOT_TLS_GD)
16335 {
16336 /* R_ARM_TLS_GD32 and R_ARM_TLS_GD32_FDPIC need two
16337 consecutive GOT slots. If the symbol is both GD
16338 and GDESC, got.offset may have been
16339 overwritten. */
16340 h->got.offset = s->size;
16341 s->size += 8;
16342 }
16343
16344 if (tls_type & GOT_TLS_IE)
16345 /* R_ARM_TLS_IE32/R_ARM_TLS_IE32_FDPIC need one GOT
16346 slot. */
16347 s->size += 4;
16348 }
16349
16350 dyn = htab->root.dynamic_sections_created;
16351
16352 indx = 0;
16353 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
16354 bfd_link_pic (info),
16355 h)
16356 && (!bfd_link_pic (info)
16357 || !SYMBOL_REFERENCES_LOCAL (info, h)))
16358 indx = h->dynindx;
16359
16360 if (tls_type != GOT_NORMAL
16361 && (bfd_link_dll (info) || indx != 0)
16362 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
16363 || h->root.type != bfd_link_hash_undefweak))
16364 {
16365 if (tls_type & GOT_TLS_IE)
16366 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16367
16368 if (tls_type & GOT_TLS_GD)
16369 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16370
16371 if (tls_type & GOT_TLS_GDESC)
16372 {
16373 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
16374 /* GDESC needs a trampoline to jump to. */
16375 htab->tls_trampoline = -1;
16376 }
16377
16378 /* Only GD needs it. GDESC just emits one relocation per
16379 2 entries. */
16380 if ((tls_type & GOT_TLS_GD) && indx != 0)
16381 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16382 }
16383 else if (((indx != -1) || htab->fdpic_p)
16384 && !SYMBOL_REFERENCES_LOCAL (info, h))
16385 {
16386 if (htab->root.dynamic_sections_created)
16387 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
16388 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16389 }
16390 else if (h->type == STT_GNU_IFUNC
16391 && eh->plt.noncall_refcount == 0)
16392 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
16393 they all resolve dynamically instead. Reserve room for the
16394 GOT entry's R_ARM_IRELATIVE relocation. */
16395 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
16396 else if (bfd_link_pic (info)
16397 && !UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
16398 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
16399 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16400 else if (htab->fdpic_p && tls_type == GOT_NORMAL)
16401 /* Reserve room for rofixup for FDPIC executable. */
16402 /* TLS relocs do not need space since they are completely
16403 resolved. */
16404 htab->srofixup->size += 4;
16405 }
16406 }
16407 else
16408 h->got.offset = (bfd_vma) -1;
16409
16410 /* FDPIC support. */
16411 if (eh->fdpic_cnts.gotofffuncdesc_cnt > 0)
16412 {
16413 /* Symbol musn't be exported. */
16414 if (h->dynindx != -1)
16415 abort();
16416
16417 /* We only allocate one function descriptor with its associated relocation. */
16418 if (eh->fdpic_cnts.funcdesc_offset == -1)
16419 {
16420 asection *s = htab->root.sgot;
16421
16422 eh->fdpic_cnts.funcdesc_offset = s->size;
16423 s->size += 8;
16424 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16425 if (bfd_link_pic(info))
16426 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16427 else
16428 htab->srofixup->size += 8;
16429 }
16430 }
16431
16432 if (eh->fdpic_cnts.gotfuncdesc_cnt > 0)
16433 {
16434 asection *s = htab->root.sgot;
16435
16436 if (htab->root.dynamic_sections_created && h->dynindx == -1
16437 && !h->forced_local)
16438 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16439 return FALSE;
16440
16441 if (h->dynindx == -1)
16442 {
16443 /* We only allocate one function descriptor with its associated relocation. q */
16444 if (eh->fdpic_cnts.funcdesc_offset == -1)
16445 {
16446
16447 eh->fdpic_cnts.funcdesc_offset = s->size;
16448 s->size += 8;
16449 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16450 if (bfd_link_pic(info))
16451 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16452 else
16453 htab->srofixup->size += 8;
16454 }
16455 }
16456
16457 /* Add one entry into the GOT and a R_ARM_FUNCDESC or
16458 R_ARM_RELATIVE/rofixup relocation on it. */
16459 eh->fdpic_cnts.gotfuncdesc_offset = s->size;
16460 s->size += 4;
16461 if (h->dynindx == -1 && !bfd_link_pic(info))
16462 htab->srofixup->size += 4;
16463 else
16464 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16465 }
16466
16467 if (eh->fdpic_cnts.funcdesc_cnt > 0)
16468 {
16469 if (htab->root.dynamic_sections_created && h->dynindx == -1
16470 && !h->forced_local)
16471 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16472 return FALSE;
16473
16474 if (h->dynindx == -1)
16475 {
16476 /* We only allocate one function descriptor with its associated relocation. */
16477 if (eh->fdpic_cnts.funcdesc_offset == -1)
16478 {
16479 asection *s = htab->root.sgot;
16480
16481 eh->fdpic_cnts.funcdesc_offset = s->size;
16482 s->size += 8;
16483 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16484 if (bfd_link_pic(info))
16485 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16486 else
16487 htab->srofixup->size += 8;
16488 }
16489 }
16490 if (h->dynindx == -1 && !bfd_link_pic(info))
16491 {
16492 /* For FDPIC executable we replace R_ARM_RELATIVE with a rofixup. */
16493 htab->srofixup->size += 4 * eh->fdpic_cnts.funcdesc_cnt;
16494 }
16495 else
16496 {
16497 /* Will need one dynamic reloc per reference. will be either
16498 R_ARM_FUNCDESC or R_ARM_RELATIVE for hidden symbols. */
16499 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot,
16500 eh->fdpic_cnts.funcdesc_cnt);
16501 }
16502 }
16503
16504 /* Allocate stubs for exported Thumb functions on v4t. */
16505 if (!htab->use_blx && h->dynindx != -1
16506 && h->def_regular
16507 && ARM_GET_SYM_BRANCH_TYPE (h->target_internal) == ST_BRANCH_TO_THUMB
16508 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
16509 {
16510 struct elf_link_hash_entry * th;
16511 struct bfd_link_hash_entry * bh;
16512 struct elf_link_hash_entry * myh;
16513 char name[1024];
16514 asection *s;
16515 bh = NULL;
16516 /* Create a new symbol to regist the real location of the function. */
16517 s = h->root.u.def.section;
16518 sprintf (name, "__real_%s", h->root.root.string);
16519 _bfd_generic_link_add_one_symbol (info, s->owner,
16520 name, BSF_GLOBAL, s,
16521 h->root.u.def.value,
16522 NULL, TRUE, FALSE, &bh);
16523
16524 myh = (struct elf_link_hash_entry *) bh;
16525 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
16526 myh->forced_local = 1;
16527 ARM_SET_SYM_BRANCH_TYPE (myh->target_internal, ST_BRANCH_TO_THUMB);
16528 eh->export_glue = myh;
16529 th = record_arm_to_thumb_glue (info, h);
16530 /* Point the symbol at the stub. */
16531 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
16532 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
16533 h->root.u.def.section = th->root.u.def.section;
16534 h->root.u.def.value = th->root.u.def.value & ~1;
16535 }
16536
16537 if (h->dyn_relocs == NULL)
16538 return TRUE;
16539
16540 /* In the shared -Bsymbolic case, discard space allocated for
16541 dynamic pc-relative relocs against symbols which turn out to be
16542 defined in regular objects. For the normal shared case, discard
16543 space for pc-relative relocs that have become local due to symbol
16544 visibility changes. */
16545
16546 if (bfd_link_pic (info) || htab->root.is_relocatable_executable || htab->fdpic_p)
16547 {
16548 /* Relocs that use pc_count are PC-relative forms, which will appear
16549 on something like ".long foo - ." or "movw REG, foo - .". We want
16550 calls to protected symbols to resolve directly to the function
16551 rather than going via the plt. If people want function pointer
16552 comparisons to work as expected then they should avoid writing
16553 assembly like ".long foo - .". */
16554 if (SYMBOL_CALLS_LOCAL (info, h))
16555 {
16556 struct elf_dyn_relocs **pp;
16557
16558 for (pp = &h->dyn_relocs; (p = *pp) != NULL; )
16559 {
16560 p->count -= p->pc_count;
16561 p->pc_count = 0;
16562 if (p->count == 0)
16563 *pp = p->next;
16564 else
16565 pp = &p->next;
16566 }
16567 }
16568
16569 if (htab->root.target_os == is_vxworks)
16570 {
16571 struct elf_dyn_relocs **pp;
16572
16573 for (pp = &h->dyn_relocs; (p = *pp) != NULL; )
16574 {
16575 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
16576 *pp = p->next;
16577 else
16578 pp = &p->next;
16579 }
16580 }
16581
16582 /* Also discard relocs on undefined weak syms with non-default
16583 visibility. */
16584 if (h->dyn_relocs != NULL
16585 && h->root.type == bfd_link_hash_undefweak)
16586 {
16587 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
16588 || UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
16589 h->dyn_relocs = NULL;
16590
16591 /* Make sure undefined weak symbols are output as a dynamic
16592 symbol in PIEs. */
16593 else if (htab->root.dynamic_sections_created && h->dynindx == -1
16594 && !h->forced_local)
16595 {
16596 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16597 return FALSE;
16598 }
16599 }
16600
16601 else if (htab->root.is_relocatable_executable && h->dynindx == -1
16602 && h->root.type == bfd_link_hash_new)
16603 {
16604 /* Output absolute symbols so that we can create relocations
16605 against them. For normal symbols we output a relocation
16606 against the section that contains them. */
16607 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16608 return FALSE;
16609 }
16610
16611 }
16612 else
16613 {
16614 /* For the non-shared case, discard space for relocs against
16615 symbols which turn out to need copy relocs or are not
16616 dynamic. */
16617
16618 if (!h->non_got_ref
16619 && ((h->def_dynamic
16620 && !h->def_regular)
16621 || (htab->root.dynamic_sections_created
16622 && (h->root.type == bfd_link_hash_undefweak
16623 || h->root.type == bfd_link_hash_undefined))))
16624 {
16625 /* Make sure this symbol is output as a dynamic symbol.
16626 Undefined weak syms won't yet be marked as dynamic. */
16627 if (h->dynindx == -1 && !h->forced_local
16628 && h->root.type == bfd_link_hash_undefweak)
16629 {
16630 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16631 return FALSE;
16632 }
16633
16634 /* If that succeeded, we know we'll be keeping all the
16635 relocs. */
16636 if (h->dynindx != -1)
16637 goto keep;
16638 }
16639
16640 h->dyn_relocs = NULL;
16641
16642 keep: ;
16643 }
16644
16645 /* Finally, allocate space. */
16646 for (p = h->dyn_relocs; p != NULL; p = p->next)
16647 {
16648 asection *sreloc = elf_section_data (p->sec)->sreloc;
16649
16650 if (h->type == STT_GNU_IFUNC
16651 && eh->plt.noncall_refcount == 0
16652 && SYMBOL_REFERENCES_LOCAL (info, h))
16653 elf32_arm_allocate_irelocs (info, sreloc, p->count);
16654 else if (h->dynindx != -1 && (!bfd_link_pic(info) || !info->symbolic || !h->def_regular))
16655 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
16656 else if (htab->fdpic_p && !bfd_link_pic(info))
16657 htab->srofixup->size += 4 * p->count;
16658 else
16659 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
16660 }
16661
16662 return TRUE;
16663 }
16664
16665 void
16666 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
16667 int byteswap_code)
16668 {
16669 struct elf32_arm_link_hash_table *globals;
16670
16671 globals = elf32_arm_hash_table (info);
16672 if (globals == NULL)
16673 return;
16674
16675 globals->byteswap_code = byteswap_code;
16676 }
16677
16678 /* Set the sizes of the dynamic sections. */
16679
16680 static bfd_boolean
16681 elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
16682 struct bfd_link_info * info)
16683 {
16684 bfd * dynobj;
16685 asection * s;
16686 bfd_boolean plt;
16687 bfd_boolean relocs;
16688 bfd *ibfd;
16689 struct elf32_arm_link_hash_table *htab;
16690
16691 htab = elf32_arm_hash_table (info);
16692 if (htab == NULL)
16693 return FALSE;
16694
16695 dynobj = elf_hash_table (info)->dynobj;
16696 BFD_ASSERT (dynobj != NULL);
16697 check_use_blx (htab);
16698
16699 if (elf_hash_table (info)->dynamic_sections_created)
16700 {
16701 /* Set the contents of the .interp section to the interpreter. */
16702 if (bfd_link_executable (info) && !info->nointerp)
16703 {
16704 s = bfd_get_linker_section (dynobj, ".interp");
16705 BFD_ASSERT (s != NULL);
16706 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
16707 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
16708 }
16709 }
16710
16711 /* Set up .got offsets for local syms, and space for local dynamic
16712 relocs. */
16713 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
16714 {
16715 bfd_signed_vma *local_got;
16716 bfd_signed_vma *end_local_got;
16717 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
16718 char *local_tls_type;
16719 bfd_vma *local_tlsdesc_gotent;
16720 bfd_size_type locsymcount;
16721 Elf_Internal_Shdr *symtab_hdr;
16722 asection *srel;
16723 unsigned int symndx;
16724 struct fdpic_local *local_fdpic_cnts;
16725
16726 if (! is_arm_elf (ibfd))
16727 continue;
16728
16729 for (s = ibfd->sections; s != NULL; s = s->next)
16730 {
16731 struct elf_dyn_relocs *p;
16732
16733 for (p = (struct elf_dyn_relocs *)
16734 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
16735 {
16736 if (!bfd_is_abs_section (p->sec)
16737 && bfd_is_abs_section (p->sec->output_section))
16738 {
16739 /* Input section has been discarded, either because
16740 it is a copy of a linkonce section or due to
16741 linker script /DISCARD/, so we'll be discarding
16742 the relocs too. */
16743 }
16744 else if (htab->root.target_os == is_vxworks
16745 && strcmp (p->sec->output_section->name,
16746 ".tls_vars") == 0)
16747 {
16748 /* Relocations in vxworks .tls_vars sections are
16749 handled specially by the loader. */
16750 }
16751 else if (p->count != 0)
16752 {
16753 srel = elf_section_data (p->sec)->sreloc;
16754 if (htab->fdpic_p && !bfd_link_pic(info))
16755 htab->srofixup->size += 4 * p->count;
16756 else
16757 elf32_arm_allocate_dynrelocs (info, srel, p->count);
16758 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
16759 info->flags |= DF_TEXTREL;
16760 }
16761 }
16762 }
16763
16764 local_got = elf_local_got_refcounts (ibfd);
16765 if (!local_got)
16766 continue;
16767
16768 symtab_hdr = & elf_symtab_hdr (ibfd);
16769 locsymcount = symtab_hdr->sh_info;
16770 end_local_got = local_got + locsymcount;
16771 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
16772 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
16773 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
16774 local_fdpic_cnts = elf32_arm_local_fdpic_cnts (ibfd);
16775 symndx = 0;
16776 s = htab->root.sgot;
16777 srel = htab->root.srelgot;
16778 for (; local_got < end_local_got;
16779 ++local_got, ++local_iplt_ptr, ++local_tls_type,
16780 ++local_tlsdesc_gotent, ++symndx, ++local_fdpic_cnts)
16781 {
16782 *local_tlsdesc_gotent = (bfd_vma) -1;
16783 local_iplt = *local_iplt_ptr;
16784
16785 /* FDPIC support. */
16786 if (local_fdpic_cnts->gotofffuncdesc_cnt > 0)
16787 {
16788 if (local_fdpic_cnts->funcdesc_offset == -1)
16789 {
16790 local_fdpic_cnts->funcdesc_offset = s->size;
16791 s->size += 8;
16792
16793 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16794 if (bfd_link_pic(info))
16795 elf32_arm_allocate_dynrelocs (info, srel, 1);
16796 else
16797 htab->srofixup->size += 8;
16798 }
16799 }
16800
16801 if (local_fdpic_cnts->funcdesc_cnt > 0)
16802 {
16803 if (local_fdpic_cnts->funcdesc_offset == -1)
16804 {
16805 local_fdpic_cnts->funcdesc_offset = s->size;
16806 s->size += 8;
16807
16808 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16809 if (bfd_link_pic(info))
16810 elf32_arm_allocate_dynrelocs (info, srel, 1);
16811 else
16812 htab->srofixup->size += 8;
16813 }
16814
16815 /* We will add n R_ARM_RELATIVE relocations or n rofixups. */
16816 if (bfd_link_pic(info))
16817 elf32_arm_allocate_dynrelocs (info, srel, local_fdpic_cnts->funcdesc_cnt);
16818 else
16819 htab->srofixup->size += 4 * local_fdpic_cnts->funcdesc_cnt;
16820 }
16821
16822 if (local_iplt != NULL)
16823 {
16824 struct elf_dyn_relocs *p;
16825
16826 if (local_iplt->root.refcount > 0)
16827 {
16828 elf32_arm_allocate_plt_entry (info, TRUE,
16829 &local_iplt->root,
16830 &local_iplt->arm);
16831 if (local_iplt->arm.noncall_refcount == 0)
16832 /* All references to the PLT are calls, so all
16833 non-call references can resolve directly to the
16834 run-time target. This means that the .got entry
16835 would be the same as the .igot.plt entry, so there's
16836 no point creating both. */
16837 *local_got = 0;
16838 }
16839 else
16840 {
16841 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
16842 local_iplt->root.offset = (bfd_vma) -1;
16843 }
16844
16845 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
16846 {
16847 asection *psrel;
16848
16849 psrel = elf_section_data (p->sec)->sreloc;
16850 if (local_iplt->arm.noncall_refcount == 0)
16851 elf32_arm_allocate_irelocs (info, psrel, p->count);
16852 else
16853 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
16854 }
16855 }
16856 if (*local_got > 0)
16857 {
16858 Elf_Internal_Sym *isym;
16859
16860 *local_got = s->size;
16861 if (*local_tls_type & GOT_TLS_GD)
16862 /* TLS_GD relocs need an 8-byte structure in the GOT. */
16863 s->size += 8;
16864 if (*local_tls_type & GOT_TLS_GDESC)
16865 {
16866 *local_tlsdesc_gotent = htab->root.sgotplt->size
16867 - elf32_arm_compute_jump_table_size (htab);
16868 htab->root.sgotplt->size += 8;
16869 *local_got = (bfd_vma) -2;
16870 /* plt.got_offset needs to know there's a TLS_DESC
16871 reloc in the middle of .got.plt. */
16872 htab->num_tls_desc++;
16873 }
16874 if (*local_tls_type & GOT_TLS_IE)
16875 s->size += 4;
16876
16877 if (*local_tls_type & GOT_NORMAL)
16878 {
16879 /* If the symbol is both GD and GDESC, *local_got
16880 may have been overwritten. */
16881 *local_got = s->size;
16882 s->size += 4;
16883 }
16884
16885 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
16886 if (isym == NULL)
16887 return FALSE;
16888
16889 /* If all references to an STT_GNU_IFUNC PLT are calls,
16890 then all non-call references, including this GOT entry,
16891 resolve directly to the run-time target. */
16892 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
16893 && (local_iplt == NULL
16894 || local_iplt->arm.noncall_refcount == 0))
16895 elf32_arm_allocate_irelocs (info, srel, 1);
16896 else if (bfd_link_pic (info) || output_bfd->flags & DYNAMIC || htab->fdpic_p)
16897 {
16898 if ((bfd_link_pic (info) && !(*local_tls_type & GOT_TLS_GDESC)))
16899 elf32_arm_allocate_dynrelocs (info, srel, 1);
16900 else if (htab->fdpic_p && *local_tls_type & GOT_NORMAL)
16901 htab->srofixup->size += 4;
16902
16903 if ((bfd_link_pic (info) || htab->fdpic_p)
16904 && *local_tls_type & GOT_TLS_GDESC)
16905 {
16906 elf32_arm_allocate_dynrelocs (info,
16907 htab->root.srelplt, 1);
16908 htab->tls_trampoline = -1;
16909 }
16910 }
16911 }
16912 else
16913 *local_got = (bfd_vma) -1;
16914 }
16915 }
16916
16917 if (htab->tls_ldm_got.refcount > 0)
16918 {
16919 /* Allocate two GOT entries and one dynamic relocation (if necessary)
16920 for R_ARM_TLS_LDM32/R_ARM_TLS_LDM32_FDPIC relocations. */
16921 htab->tls_ldm_got.offset = htab->root.sgot->size;
16922 htab->root.sgot->size += 8;
16923 if (bfd_link_pic (info))
16924 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16925 }
16926 else
16927 htab->tls_ldm_got.offset = -1;
16928
16929 /* At the very end of the .rofixup section is a pointer to the GOT,
16930 reserve space for it. */
16931 if (htab->fdpic_p && htab->srofixup != NULL)
16932 htab->srofixup->size += 4;
16933
16934 /* Allocate global sym .plt and .got entries, and space for global
16935 sym dynamic relocs. */
16936 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
16937
16938 /* Here we rummage through the found bfds to collect glue information. */
16939 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
16940 {
16941 if (! is_arm_elf (ibfd))
16942 continue;
16943
16944 /* Initialise mapping tables for code/data. */
16945 bfd_elf32_arm_init_maps (ibfd);
16946
16947 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
16948 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info)
16949 || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd, info))
16950 _bfd_error_handler (_("errors encountered processing file %pB"), ibfd);
16951 }
16952
16953 /* Allocate space for the glue sections now that we've sized them. */
16954 bfd_elf32_arm_allocate_interworking_sections (info);
16955
16956 /* For every jump slot reserved in the sgotplt, reloc_count is
16957 incremented. However, when we reserve space for TLS descriptors,
16958 it's not incremented, so in order to compute the space reserved
16959 for them, it suffices to multiply the reloc count by the jump
16960 slot size. */
16961 if (htab->root.srelplt)
16962 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
16963
16964 if (htab->tls_trampoline)
16965 {
16966 if (htab->root.splt->size == 0)
16967 htab->root.splt->size += htab->plt_header_size;
16968
16969 htab->tls_trampoline = htab->root.splt->size;
16970 htab->root.splt->size += htab->plt_entry_size;
16971
16972 /* If we're not using lazy TLS relocations, don't generate the
16973 PLT and GOT entries they require. */
16974 if (!(info->flags & DF_BIND_NOW))
16975 {
16976 htab->dt_tlsdesc_got = htab->root.sgot->size;
16977 htab->root.sgot->size += 4;
16978
16979 htab->dt_tlsdesc_plt = htab->root.splt->size;
16980 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
16981 }
16982 }
16983
16984 /* The check_relocs and adjust_dynamic_symbol entry points have
16985 determined the sizes of the various dynamic sections. Allocate
16986 memory for them. */
16987 plt = FALSE;
16988 relocs = FALSE;
16989 for (s = dynobj->sections; s != NULL; s = s->next)
16990 {
16991 const char * name;
16992
16993 if ((s->flags & SEC_LINKER_CREATED) == 0)
16994 continue;
16995
16996 /* It's OK to base decisions on the section name, because none
16997 of the dynobj section names depend upon the input files. */
16998 name = bfd_section_name (s);
16999
17000 if (s == htab->root.splt)
17001 {
17002 /* Remember whether there is a PLT. */
17003 plt = s->size != 0;
17004 }
17005 else if (CONST_STRNEQ (name, ".rel"))
17006 {
17007 if (s->size != 0)
17008 {
17009 /* Remember whether there are any reloc sections other
17010 than .rel(a).plt and .rela.plt.unloaded. */
17011 if (s != htab->root.srelplt && s != htab->srelplt2)
17012 relocs = TRUE;
17013
17014 /* We use the reloc_count field as a counter if we need
17015 to copy relocs into the output file. */
17016 s->reloc_count = 0;
17017 }
17018 }
17019 else if (s != htab->root.sgot
17020 && s != htab->root.sgotplt
17021 && s != htab->root.iplt
17022 && s != htab->root.igotplt
17023 && s != htab->root.sdynbss
17024 && s != htab->root.sdynrelro
17025 && s != htab->srofixup)
17026 {
17027 /* It's not one of our sections, so don't allocate space. */
17028 continue;
17029 }
17030
17031 if (s->size == 0)
17032 {
17033 /* If we don't need this section, strip it from the
17034 output file. This is mostly to handle .rel(a).bss and
17035 .rel(a).plt. We must create both sections in
17036 create_dynamic_sections, because they must be created
17037 before the linker maps input sections to output
17038 sections. The linker does that before
17039 adjust_dynamic_symbol is called, and it is that
17040 function which decides whether anything needs to go
17041 into these sections. */
17042 s->flags |= SEC_EXCLUDE;
17043 continue;
17044 }
17045
17046 if ((s->flags & SEC_HAS_CONTENTS) == 0)
17047 continue;
17048
17049 /* Allocate memory for the section contents. */
17050 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
17051 if (s->contents == NULL)
17052 return FALSE;
17053 }
17054
17055 if (elf_hash_table (info)->dynamic_sections_created)
17056 {
17057 /* Add some entries to the .dynamic section. We fill in the
17058 values later, in elf32_arm_finish_dynamic_sections, but we
17059 must add the entries now so that we get the correct size for
17060 the .dynamic section. The DT_DEBUG entry is filled in by the
17061 dynamic linker and used by the debugger. */
17062 #define add_dynamic_entry(TAG, VAL) \
17063 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
17064
17065 if (bfd_link_executable (info))
17066 {
17067 if (!add_dynamic_entry (DT_DEBUG, 0))
17068 return FALSE;
17069 }
17070
17071 if (plt)
17072 {
17073 if ( !add_dynamic_entry (DT_PLTGOT, 0)
17074 || !add_dynamic_entry (DT_PLTRELSZ, 0)
17075 || !add_dynamic_entry (DT_PLTREL,
17076 htab->use_rel ? DT_REL : DT_RELA)
17077 || !add_dynamic_entry (DT_JMPREL, 0))
17078 return FALSE;
17079
17080 if (htab->dt_tlsdesc_plt
17081 && (!add_dynamic_entry (DT_TLSDESC_PLT,0)
17082 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
17083 return FALSE;
17084 }
17085
17086 if (relocs)
17087 {
17088 if (htab->use_rel)
17089 {
17090 if (!add_dynamic_entry (DT_REL, 0)
17091 || !add_dynamic_entry (DT_RELSZ, 0)
17092 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
17093 return FALSE;
17094 }
17095 else
17096 {
17097 if (!add_dynamic_entry (DT_RELA, 0)
17098 || !add_dynamic_entry (DT_RELASZ, 0)
17099 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
17100 return FALSE;
17101 }
17102 }
17103
17104 /* If any dynamic relocs apply to a read-only section,
17105 then we need a DT_TEXTREL entry. */
17106 if ((info->flags & DF_TEXTREL) == 0)
17107 elf_link_hash_traverse (&htab->root,
17108 _bfd_elf_maybe_set_textrel, info);
17109
17110 if ((info->flags & DF_TEXTREL) != 0)
17111 {
17112 if (!add_dynamic_entry (DT_TEXTREL, 0))
17113 return FALSE;
17114 }
17115 if (htab->root.target_os == is_vxworks
17116 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
17117 return FALSE;
17118 }
17119 #undef add_dynamic_entry
17120
17121 return TRUE;
17122 }
17123
17124 /* Size sections even though they're not dynamic. We use it to setup
17125 _TLS_MODULE_BASE_, if needed. */
17126
17127 static bfd_boolean
17128 elf32_arm_always_size_sections (bfd *output_bfd,
17129 struct bfd_link_info *info)
17130 {
17131 asection *tls_sec;
17132 struct elf32_arm_link_hash_table *htab;
17133
17134 htab = elf32_arm_hash_table (info);
17135
17136 if (bfd_link_relocatable (info))
17137 return TRUE;
17138
17139 tls_sec = elf_hash_table (info)->tls_sec;
17140
17141 if (tls_sec)
17142 {
17143 struct elf_link_hash_entry *tlsbase;
17144
17145 tlsbase = elf_link_hash_lookup
17146 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
17147
17148 if (tlsbase)
17149 {
17150 struct bfd_link_hash_entry *bh = NULL;
17151 const struct elf_backend_data *bed
17152 = get_elf_backend_data (output_bfd);
17153
17154 if (!(_bfd_generic_link_add_one_symbol
17155 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
17156 tls_sec, 0, NULL, FALSE,
17157 bed->collect, &bh)))
17158 return FALSE;
17159
17160 tlsbase->type = STT_TLS;
17161 tlsbase = (struct elf_link_hash_entry *)bh;
17162 tlsbase->def_regular = 1;
17163 tlsbase->other = STV_HIDDEN;
17164 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
17165 }
17166 }
17167
17168 if (htab->fdpic_p && !bfd_link_relocatable (info)
17169 && !bfd_elf_stack_segment_size (output_bfd, info,
17170 "__stacksize", DEFAULT_STACK_SIZE))
17171 return FALSE;
17172
17173 return TRUE;
17174 }
17175
17176 /* Finish up dynamic symbol handling. We set the contents of various
17177 dynamic sections here. */
17178
17179 static bfd_boolean
17180 elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
17181 struct bfd_link_info * info,
17182 struct elf_link_hash_entry * h,
17183 Elf_Internal_Sym * sym)
17184 {
17185 struct elf32_arm_link_hash_table *htab;
17186 struct elf32_arm_link_hash_entry *eh;
17187
17188 htab = elf32_arm_hash_table (info);
17189 if (htab == NULL)
17190 return FALSE;
17191
17192 eh = (struct elf32_arm_link_hash_entry *) h;
17193
17194 if (h->plt.offset != (bfd_vma) -1)
17195 {
17196 if (!eh->is_iplt)
17197 {
17198 BFD_ASSERT (h->dynindx != -1);
17199 if (! elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
17200 h->dynindx, 0))
17201 return FALSE;
17202 }
17203
17204 if (!h->def_regular)
17205 {
17206 /* Mark the symbol as undefined, rather than as defined in
17207 the .plt section. */
17208 sym->st_shndx = SHN_UNDEF;
17209 /* If the symbol is weak we need to clear the value.
17210 Otherwise, the PLT entry would provide a definition for
17211 the symbol even if the symbol wasn't defined anywhere,
17212 and so the symbol would never be NULL. Leave the value if
17213 there were any relocations where pointer equality matters
17214 (this is a clue for the dynamic linker, to make function
17215 pointer comparisons work between an application and shared
17216 library). */
17217 if (!h->ref_regular_nonweak || !h->pointer_equality_needed)
17218 sym->st_value = 0;
17219 }
17220 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
17221 {
17222 /* At least one non-call relocation references this .iplt entry,
17223 so the .iplt entry is the function's canonical address. */
17224 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
17225 ARM_SET_SYM_BRANCH_TYPE (sym->st_target_internal, ST_BRANCH_TO_ARM);
17226 sym->st_shndx = (_bfd_elf_section_from_bfd_section
17227 (output_bfd, htab->root.iplt->output_section));
17228 sym->st_value = (h->plt.offset
17229 + htab->root.iplt->output_section->vma
17230 + htab->root.iplt->output_offset);
17231 }
17232 }
17233
17234 if (h->needs_copy)
17235 {
17236 asection * s;
17237 Elf_Internal_Rela rel;
17238
17239 /* This symbol needs a copy reloc. Set it up. */
17240 BFD_ASSERT (h->dynindx != -1
17241 && (h->root.type == bfd_link_hash_defined
17242 || h->root.type == bfd_link_hash_defweak));
17243
17244 rel.r_addend = 0;
17245 rel.r_offset = (h->root.u.def.value
17246 + h->root.u.def.section->output_section->vma
17247 + h->root.u.def.section->output_offset);
17248 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
17249 if (h->root.u.def.section == htab->root.sdynrelro)
17250 s = htab->root.sreldynrelro;
17251 else
17252 s = htab->root.srelbss;
17253 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
17254 }
17255
17256 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
17257 and for FDPIC, the _GLOBAL_OFFSET_TABLE_ symbol is not absolute:
17258 it is relative to the ".got" section. */
17259 if (h == htab->root.hdynamic
17260 || (!htab->fdpic_p
17261 && htab->root.target_os != is_vxworks
17262 && h == htab->root.hgot))
17263 sym->st_shndx = SHN_ABS;
17264
17265 return TRUE;
17266 }
17267
17268 static void
17269 arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
17270 void *contents,
17271 const unsigned long *template, unsigned count)
17272 {
17273 unsigned ix;
17274
17275 for (ix = 0; ix != count; ix++)
17276 {
17277 unsigned long insn = template[ix];
17278
17279 /* Emit mov pc,rx if bx is not permitted. */
17280 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
17281 insn = (insn & 0xf000000f) | 0x01a0f000;
17282 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
17283 }
17284 }
17285
17286 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
17287 other variants, NaCl needs this entry in a static executable's
17288 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
17289 zero. For .iplt really only the last bundle is useful, and .iplt
17290 could have a shorter first entry, with each individual PLT entry's
17291 relative branch calculated differently so it targets the last
17292 bundle instead of the instruction before it (labelled .Lplt_tail
17293 above). But it's simpler to keep the size and layout of PLT0
17294 consistent with the dynamic case, at the cost of some dead code at
17295 the start of .iplt and the one dead store to the stack at the start
17296 of .Lplt_tail. */
17297 static void
17298 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
17299 asection *plt, bfd_vma got_displacement)
17300 {
17301 unsigned int i;
17302
17303 put_arm_insn (htab, output_bfd,
17304 elf32_arm_nacl_plt0_entry[0]
17305 | arm_movw_immediate (got_displacement),
17306 plt->contents + 0);
17307 put_arm_insn (htab, output_bfd,
17308 elf32_arm_nacl_plt0_entry[1]
17309 | arm_movt_immediate (got_displacement),
17310 plt->contents + 4);
17311
17312 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
17313 put_arm_insn (htab, output_bfd,
17314 elf32_arm_nacl_plt0_entry[i],
17315 plt->contents + (i * 4));
17316 }
17317
17318 /* Finish up the dynamic sections. */
17319
17320 static bfd_boolean
17321 elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
17322 {
17323 bfd * dynobj;
17324 asection * sgot;
17325 asection * sdyn;
17326 struct elf32_arm_link_hash_table *htab;
17327
17328 htab = elf32_arm_hash_table (info);
17329 if (htab == NULL)
17330 return FALSE;
17331
17332 dynobj = elf_hash_table (info)->dynobj;
17333
17334 sgot = htab->root.sgotplt;
17335 /* A broken linker script might have discarded the dynamic sections.
17336 Catch this here so that we do not seg-fault later on. */
17337 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
17338 return FALSE;
17339 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
17340
17341 if (elf_hash_table (info)->dynamic_sections_created)
17342 {
17343 asection *splt;
17344 Elf32_External_Dyn *dyncon, *dynconend;
17345
17346 splt = htab->root.splt;
17347 BFD_ASSERT (splt != NULL && sdyn != NULL);
17348 BFD_ASSERT (htab->root.target_os == is_symbian || sgot != NULL);
17349
17350 dyncon = (Elf32_External_Dyn *) sdyn->contents;
17351 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
17352
17353 for (; dyncon < dynconend; dyncon++)
17354 {
17355 Elf_Internal_Dyn dyn;
17356 const char * name;
17357 asection * s;
17358
17359 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
17360
17361 switch (dyn.d_tag)
17362 {
17363 unsigned int type;
17364
17365 default:
17366 if (htab->root.target_os == is_vxworks
17367 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
17368 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17369 break;
17370
17371 case DT_HASH:
17372 name = ".hash";
17373 goto get_vma_if_bpabi;
17374 case DT_STRTAB:
17375 name = ".dynstr";
17376 goto get_vma_if_bpabi;
17377 case DT_SYMTAB:
17378 name = ".dynsym";
17379 goto get_vma_if_bpabi;
17380 case DT_VERSYM:
17381 name = ".gnu.version";
17382 goto get_vma_if_bpabi;
17383 case DT_VERDEF:
17384 name = ".gnu.version_d";
17385 goto get_vma_if_bpabi;
17386 case DT_VERNEED:
17387 name = ".gnu.version_r";
17388 goto get_vma_if_bpabi;
17389
17390 case DT_PLTGOT:
17391 name = (htab->root.target_os == is_symbian
17392 ? ".got" : ".got.plt");
17393 goto get_vma;
17394 case DT_JMPREL:
17395 name = RELOC_SECTION (htab, ".plt");
17396 get_vma:
17397 s = bfd_get_linker_section (dynobj, name);
17398 if (s == NULL)
17399 {
17400 _bfd_error_handler
17401 (_("could not find section %s"), name);
17402 bfd_set_error (bfd_error_invalid_operation);
17403 return FALSE;
17404 }
17405 if (htab->root.target_os != is_symbian)
17406 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
17407 else
17408 /* In the BPABI, tags in the PT_DYNAMIC section point
17409 at the file offset, not the memory address, for the
17410 convenience of the post linker. */
17411 dyn.d_un.d_ptr = s->output_section->filepos + s->output_offset;
17412 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17413 break;
17414
17415 get_vma_if_bpabi:
17416 if (htab->root.target_os == is_symbian)
17417 goto get_vma;
17418 break;
17419
17420 case DT_PLTRELSZ:
17421 s = htab->root.srelplt;
17422 BFD_ASSERT (s != NULL);
17423 dyn.d_un.d_val = s->size;
17424 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17425 break;
17426
17427 case DT_RELSZ:
17428 case DT_RELASZ:
17429 case DT_REL:
17430 case DT_RELA:
17431 /* In the BPABI, the DT_REL tag must point at the file
17432 offset, not the VMA, of the first relocation
17433 section. So, we use code similar to that in
17434 elflink.c, but do not check for SHF_ALLOC on the
17435 relocation section, since relocation sections are
17436 never allocated under the BPABI. PLT relocs are also
17437 included. */
17438 if (htab->root.target_os == is_symbian)
17439 {
17440 unsigned int i;
17441 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
17442 ? SHT_REL : SHT_RELA);
17443 dyn.d_un.d_val = 0;
17444 for (i = 1; i < elf_numsections (output_bfd); i++)
17445 {
17446 Elf_Internal_Shdr *hdr
17447 = elf_elfsections (output_bfd)[i];
17448 if (hdr->sh_type == type)
17449 {
17450 if (dyn.d_tag == DT_RELSZ
17451 || dyn.d_tag == DT_RELASZ)
17452 dyn.d_un.d_val += hdr->sh_size;
17453 else if ((ufile_ptr) hdr->sh_offset
17454 <= dyn.d_un.d_val - 1)
17455 dyn.d_un.d_val = hdr->sh_offset;
17456 }
17457 }
17458 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17459 }
17460 break;
17461
17462 case DT_TLSDESC_PLT:
17463 s = htab->root.splt;
17464 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
17465 + htab->dt_tlsdesc_plt);
17466 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17467 break;
17468
17469 case DT_TLSDESC_GOT:
17470 s = htab->root.sgot;
17471 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
17472 + htab->dt_tlsdesc_got);
17473 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17474 break;
17475
17476 /* Set the bottom bit of DT_INIT/FINI if the
17477 corresponding function is Thumb. */
17478 case DT_INIT:
17479 name = info->init_function;
17480 goto get_sym;
17481 case DT_FINI:
17482 name = info->fini_function;
17483 get_sym:
17484 /* If it wasn't set by elf_bfd_final_link
17485 then there is nothing to adjust. */
17486 if (dyn.d_un.d_val != 0)
17487 {
17488 struct elf_link_hash_entry * eh;
17489
17490 eh = elf_link_hash_lookup (elf_hash_table (info), name,
17491 FALSE, FALSE, TRUE);
17492 if (eh != NULL
17493 && ARM_GET_SYM_BRANCH_TYPE (eh->target_internal)
17494 == ST_BRANCH_TO_THUMB)
17495 {
17496 dyn.d_un.d_val |= 1;
17497 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17498 }
17499 }
17500 break;
17501 }
17502 }
17503
17504 /* Fill in the first entry in the procedure linkage table. */
17505 if (splt->size > 0 && htab->plt_header_size)
17506 {
17507 const bfd_vma *plt0_entry;
17508 bfd_vma got_address, plt_address, got_displacement;
17509
17510 /* Calculate the addresses of the GOT and PLT. */
17511 got_address = sgot->output_section->vma + sgot->output_offset;
17512 plt_address = splt->output_section->vma + splt->output_offset;
17513
17514 if (htab->root.target_os == is_vxworks)
17515 {
17516 /* The VxWorks GOT is relocated by the dynamic linker.
17517 Therefore, we must emit relocations rather than simply
17518 computing the values now. */
17519 Elf_Internal_Rela rel;
17520
17521 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
17522 put_arm_insn (htab, output_bfd, plt0_entry[0],
17523 splt->contents + 0);
17524 put_arm_insn (htab, output_bfd, plt0_entry[1],
17525 splt->contents + 4);
17526 put_arm_insn (htab, output_bfd, plt0_entry[2],
17527 splt->contents + 8);
17528 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
17529
17530 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
17531 rel.r_offset = plt_address + 12;
17532 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
17533 rel.r_addend = 0;
17534 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
17535 htab->srelplt2->contents);
17536 }
17537 else if (htab->root.target_os == is_nacl)
17538 arm_nacl_put_plt0 (htab, output_bfd, splt,
17539 got_address + 8 - (plt_address + 16));
17540 else if (using_thumb_only (htab))
17541 {
17542 got_displacement = got_address - (plt_address + 12);
17543
17544 plt0_entry = elf32_thumb2_plt0_entry;
17545 put_arm_insn (htab, output_bfd, plt0_entry[0],
17546 splt->contents + 0);
17547 put_arm_insn (htab, output_bfd, plt0_entry[1],
17548 splt->contents + 4);
17549 put_arm_insn (htab, output_bfd, plt0_entry[2],
17550 splt->contents + 8);
17551
17552 bfd_put_32 (output_bfd, got_displacement, splt->contents + 12);
17553 }
17554 else
17555 {
17556 got_displacement = got_address - (plt_address + 16);
17557
17558 plt0_entry = elf32_arm_plt0_entry;
17559 put_arm_insn (htab, output_bfd, plt0_entry[0],
17560 splt->contents + 0);
17561 put_arm_insn (htab, output_bfd, plt0_entry[1],
17562 splt->contents + 4);
17563 put_arm_insn (htab, output_bfd, plt0_entry[2],
17564 splt->contents + 8);
17565 put_arm_insn (htab, output_bfd, plt0_entry[3],
17566 splt->contents + 12);
17567
17568 #ifdef FOUR_WORD_PLT
17569 /* The displacement value goes in the otherwise-unused
17570 last word of the second entry. */
17571 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
17572 #else
17573 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
17574 #endif
17575 }
17576 }
17577
17578 /* UnixWare sets the entsize of .plt to 4, although that doesn't
17579 really seem like the right value. */
17580 if (splt->output_section->owner == output_bfd)
17581 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
17582
17583 if (htab->dt_tlsdesc_plt)
17584 {
17585 bfd_vma got_address
17586 = sgot->output_section->vma + sgot->output_offset;
17587 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
17588 + htab->root.sgot->output_offset);
17589 bfd_vma plt_address
17590 = splt->output_section->vma + splt->output_offset;
17591
17592 arm_put_trampoline (htab, output_bfd,
17593 splt->contents + htab->dt_tlsdesc_plt,
17594 dl_tlsdesc_lazy_trampoline, 6);
17595
17596 bfd_put_32 (output_bfd,
17597 gotplt_address + htab->dt_tlsdesc_got
17598 - (plt_address + htab->dt_tlsdesc_plt)
17599 - dl_tlsdesc_lazy_trampoline[6],
17600 splt->contents + htab->dt_tlsdesc_plt + 24);
17601 bfd_put_32 (output_bfd,
17602 got_address - (plt_address + htab->dt_tlsdesc_plt)
17603 - dl_tlsdesc_lazy_trampoline[7],
17604 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
17605 }
17606
17607 if (htab->tls_trampoline)
17608 {
17609 arm_put_trampoline (htab, output_bfd,
17610 splt->contents + htab->tls_trampoline,
17611 tls_trampoline, 3);
17612 #ifdef FOUR_WORD_PLT
17613 bfd_put_32 (output_bfd, 0x00000000,
17614 splt->contents + htab->tls_trampoline + 12);
17615 #endif
17616 }
17617
17618 if (htab->root.target_os == is_vxworks
17619 && !bfd_link_pic (info)
17620 && htab->root.splt->size > 0)
17621 {
17622 /* Correct the .rel(a).plt.unloaded relocations. They will have
17623 incorrect symbol indexes. */
17624 int num_plts;
17625 unsigned char *p;
17626
17627 num_plts = ((htab->root.splt->size - htab->plt_header_size)
17628 / htab->plt_entry_size);
17629 p = htab->srelplt2->contents + RELOC_SIZE (htab);
17630
17631 for (; num_plts; num_plts--)
17632 {
17633 Elf_Internal_Rela rel;
17634
17635 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
17636 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
17637 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
17638 p += RELOC_SIZE (htab);
17639
17640 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
17641 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
17642 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
17643 p += RELOC_SIZE (htab);
17644 }
17645 }
17646 }
17647
17648 if (htab->root.target_os == is_nacl
17649 && htab->root.iplt != NULL
17650 && htab->root.iplt->size > 0)
17651 /* NaCl uses a special first entry in .iplt too. */
17652 arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0);
17653
17654 /* Fill in the first three entries in the global offset table. */
17655 if (sgot)
17656 {
17657 if (sgot->size > 0)
17658 {
17659 if (sdyn == NULL)
17660 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
17661 else
17662 bfd_put_32 (output_bfd,
17663 sdyn->output_section->vma + sdyn->output_offset,
17664 sgot->contents);
17665 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
17666 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
17667 }
17668
17669 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
17670 }
17671
17672 /* At the very end of the .rofixup section is a pointer to the GOT. */
17673 if (htab->fdpic_p && htab->srofixup != NULL)
17674 {
17675 struct elf_link_hash_entry *hgot = htab->root.hgot;
17676
17677 bfd_vma got_value = hgot->root.u.def.value
17678 + hgot->root.u.def.section->output_section->vma
17679 + hgot->root.u.def.section->output_offset;
17680
17681 arm_elf_add_rofixup(output_bfd, htab->srofixup, got_value);
17682
17683 /* Make sure we allocated and generated the same number of fixups. */
17684 BFD_ASSERT (htab->srofixup->reloc_count * 4 == htab->srofixup->size);
17685 }
17686
17687 return TRUE;
17688 }
17689
17690 static bfd_boolean
17691 elf32_arm_init_file_header (bfd *abfd, struct bfd_link_info *link_info)
17692 {
17693 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
17694 struct elf32_arm_link_hash_table *globals;
17695 struct elf_segment_map *m;
17696
17697 if (!_bfd_elf_init_file_header (abfd, link_info))
17698 return FALSE;
17699
17700 i_ehdrp = elf_elfheader (abfd);
17701
17702 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
17703 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
17704 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
17705
17706 if (link_info)
17707 {
17708 globals = elf32_arm_hash_table (link_info);
17709 if (globals != NULL && globals->byteswap_code)
17710 i_ehdrp->e_flags |= EF_ARM_BE8;
17711
17712 if (globals->fdpic_p)
17713 i_ehdrp->e_ident[EI_OSABI] |= ELFOSABI_ARM_FDPIC;
17714 }
17715
17716 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
17717 && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
17718 {
17719 int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
17720 if (abi == AEABI_VFP_args_vfp)
17721 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
17722 else
17723 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
17724 }
17725
17726 /* Scan segment to set p_flags attribute if it contains only sections with
17727 SHF_ARM_PURECODE flag. */
17728 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
17729 {
17730 unsigned int j;
17731
17732 if (m->count == 0)
17733 continue;
17734 for (j = 0; j < m->count; j++)
17735 {
17736 if (!(elf_section_flags (m->sections[j]) & SHF_ARM_PURECODE))
17737 break;
17738 }
17739 if (j == m->count)
17740 {
17741 m->p_flags = PF_X;
17742 m->p_flags_valid = 1;
17743 }
17744 }
17745 return TRUE;
17746 }
17747
17748 static enum elf_reloc_type_class
17749 elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
17750 const asection *rel_sec ATTRIBUTE_UNUSED,
17751 const Elf_Internal_Rela *rela)
17752 {
17753 switch ((int) ELF32_R_TYPE (rela->r_info))
17754 {
17755 case R_ARM_RELATIVE:
17756 return reloc_class_relative;
17757 case R_ARM_JUMP_SLOT:
17758 return reloc_class_plt;
17759 case R_ARM_COPY:
17760 return reloc_class_copy;
17761 case R_ARM_IRELATIVE:
17762 return reloc_class_ifunc;
17763 default:
17764 return reloc_class_normal;
17765 }
17766 }
17767
17768 static void
17769 arm_final_write_processing (bfd *abfd)
17770 {
17771 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
17772 }
17773
17774 static bfd_boolean
17775 elf32_arm_final_write_processing (bfd *abfd)
17776 {
17777 arm_final_write_processing (abfd);
17778 return _bfd_elf_final_write_processing (abfd);
17779 }
17780
17781 /* Return TRUE if this is an unwinding table entry. */
17782
17783 static bfd_boolean
17784 is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
17785 {
17786 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
17787 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
17788 }
17789
17790
17791 /* Set the type and flags for an ARM section. We do this by
17792 the section name, which is a hack, but ought to work. */
17793
17794 static bfd_boolean
17795 elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
17796 {
17797 const char * name;
17798
17799 name = bfd_section_name (sec);
17800
17801 if (is_arm_elf_unwind_section_name (abfd, name))
17802 {
17803 hdr->sh_type = SHT_ARM_EXIDX;
17804 hdr->sh_flags |= SHF_LINK_ORDER;
17805 }
17806
17807 if (sec->flags & SEC_ELF_PURECODE)
17808 hdr->sh_flags |= SHF_ARM_PURECODE;
17809
17810 return TRUE;
17811 }
17812
17813 /* Handle an ARM specific section when reading an object file. This is
17814 called when bfd_section_from_shdr finds a section with an unknown
17815 type. */
17816
17817 static bfd_boolean
17818 elf32_arm_section_from_shdr (bfd *abfd,
17819 Elf_Internal_Shdr * hdr,
17820 const char *name,
17821 int shindex)
17822 {
17823 /* There ought to be a place to keep ELF backend specific flags, but
17824 at the moment there isn't one. We just keep track of the
17825 sections by their name, instead. Fortunately, the ABI gives
17826 names for all the ARM specific sections, so we will probably get
17827 away with this. */
17828 switch (hdr->sh_type)
17829 {
17830 case SHT_ARM_EXIDX:
17831 case SHT_ARM_PREEMPTMAP:
17832 case SHT_ARM_ATTRIBUTES:
17833 break;
17834
17835 default:
17836 return FALSE;
17837 }
17838
17839 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
17840 return FALSE;
17841
17842 return TRUE;
17843 }
17844
17845 static _arm_elf_section_data *
17846 get_arm_elf_section_data (asection * sec)
17847 {
17848 if (sec && sec->owner && is_arm_elf (sec->owner))
17849 return elf32_arm_section_data (sec);
17850 else
17851 return NULL;
17852 }
17853
17854 typedef struct
17855 {
17856 void *flaginfo;
17857 struct bfd_link_info *info;
17858 asection *sec;
17859 int sec_shndx;
17860 int (*func) (void *, const char *, Elf_Internal_Sym *,
17861 asection *, struct elf_link_hash_entry *);
17862 } output_arch_syminfo;
17863
17864 enum map_symbol_type
17865 {
17866 ARM_MAP_ARM,
17867 ARM_MAP_THUMB,
17868 ARM_MAP_DATA
17869 };
17870
17871
17872 /* Output a single mapping symbol. */
17873
17874 static bfd_boolean
17875 elf32_arm_output_map_sym (output_arch_syminfo *osi,
17876 enum map_symbol_type type,
17877 bfd_vma offset)
17878 {
17879 static const char *names[3] = {"$a", "$t", "$d"};
17880 Elf_Internal_Sym sym;
17881
17882 sym.st_value = osi->sec->output_section->vma
17883 + osi->sec->output_offset
17884 + offset;
17885 sym.st_size = 0;
17886 sym.st_other = 0;
17887 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
17888 sym.st_shndx = osi->sec_shndx;
17889 sym.st_target_internal = 0;
17890 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
17891 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
17892 }
17893
17894 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
17895 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
17896
17897 static bfd_boolean
17898 elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
17899 bfd_boolean is_iplt_entry_p,
17900 union gotplt_union *root_plt,
17901 struct arm_plt_info *arm_plt)
17902 {
17903 struct elf32_arm_link_hash_table *htab;
17904 bfd_vma addr, plt_header_size;
17905
17906 if (root_plt->offset == (bfd_vma) -1)
17907 return TRUE;
17908
17909 htab = elf32_arm_hash_table (osi->info);
17910 if (htab == NULL)
17911 return FALSE;
17912
17913 if (is_iplt_entry_p)
17914 {
17915 osi->sec = htab->root.iplt;
17916 plt_header_size = 0;
17917 }
17918 else
17919 {
17920 osi->sec = htab->root.splt;
17921 plt_header_size = htab->plt_header_size;
17922 }
17923 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
17924 (osi->info->output_bfd, osi->sec->output_section));
17925
17926 addr = root_plt->offset & -2;
17927 if (htab->root.target_os == is_symbian)
17928 {
17929 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17930 return FALSE;
17931 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
17932 return FALSE;
17933 }
17934 else if (htab->root.target_os == is_vxworks)
17935 {
17936 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17937 return FALSE;
17938 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
17939 return FALSE;
17940 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
17941 return FALSE;
17942 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
17943 return FALSE;
17944 }
17945 else if (htab->root.target_os == is_nacl)
17946 {
17947 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17948 return FALSE;
17949 }
17950 else if (htab->fdpic_p)
17951 {
17952 enum map_symbol_type type = using_thumb_only(htab)
17953 ? ARM_MAP_THUMB
17954 : ARM_MAP_ARM;
17955
17956 if (elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt))
17957 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
17958 return FALSE;
17959 if (!elf32_arm_output_map_sym (osi, type, addr))
17960 return FALSE;
17961 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 16))
17962 return FALSE;
17963 if (htab->plt_entry_size == 4 * ARRAY_SIZE(elf32_arm_fdpic_plt_entry))
17964 if (!elf32_arm_output_map_sym (osi, type, addr + 24))
17965 return FALSE;
17966 }
17967 else if (using_thumb_only (htab))
17968 {
17969 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr))
17970 return FALSE;
17971 }
17972 else
17973 {
17974 bfd_boolean thumb_stub_p;
17975
17976 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
17977 if (thumb_stub_p)
17978 {
17979 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
17980 return FALSE;
17981 }
17982 #ifdef FOUR_WORD_PLT
17983 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17984 return FALSE;
17985 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
17986 return FALSE;
17987 #else
17988 /* A three-word PLT with no Thumb thunk contains only Arm code,
17989 so only need to output a mapping symbol for the first PLT entry and
17990 entries with thumb thunks. */
17991 if (thumb_stub_p || addr == plt_header_size)
17992 {
17993 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17994 return FALSE;
17995 }
17996 #endif
17997 }
17998
17999 return TRUE;
18000 }
18001
18002 /* Output mapping symbols for PLT entries associated with H. */
18003
18004 static bfd_boolean
18005 elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
18006 {
18007 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
18008 struct elf32_arm_link_hash_entry *eh;
18009
18010 if (h->root.type == bfd_link_hash_indirect)
18011 return TRUE;
18012
18013 if (h->root.type == bfd_link_hash_warning)
18014 /* When warning symbols are created, they **replace** the "real"
18015 entry in the hash table, thus we never get to see the real
18016 symbol in a hash traversal. So look at it now. */
18017 h = (struct elf_link_hash_entry *) h->root.u.i.link;
18018
18019 eh = (struct elf32_arm_link_hash_entry *) h;
18020 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
18021 &h->plt, &eh->plt);
18022 }
18023
18024 /* Bind a veneered symbol to its veneer identified by its hash entry
18025 STUB_ENTRY. The veneered location thus loose its symbol. */
18026
18027 static void
18028 arm_stub_claim_sym (struct elf32_arm_stub_hash_entry *stub_entry)
18029 {
18030 struct elf32_arm_link_hash_entry *hash = stub_entry->h;
18031
18032 BFD_ASSERT (hash);
18033 hash->root.root.u.def.section = stub_entry->stub_sec;
18034 hash->root.root.u.def.value = stub_entry->stub_offset;
18035 hash->root.size = stub_entry->stub_size;
18036 }
18037
18038 /* Output a single local symbol for a generated stub. */
18039
18040 static bfd_boolean
18041 elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
18042 bfd_vma offset, bfd_vma size)
18043 {
18044 Elf_Internal_Sym sym;
18045
18046 sym.st_value = osi->sec->output_section->vma
18047 + osi->sec->output_offset
18048 + offset;
18049 sym.st_size = size;
18050 sym.st_other = 0;
18051 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
18052 sym.st_shndx = osi->sec_shndx;
18053 sym.st_target_internal = 0;
18054 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
18055 }
18056
18057 static bfd_boolean
18058 arm_map_one_stub (struct bfd_hash_entry * gen_entry,
18059 void * in_arg)
18060 {
18061 struct elf32_arm_stub_hash_entry *stub_entry;
18062 asection *stub_sec;
18063 bfd_vma addr;
18064 char *stub_name;
18065 output_arch_syminfo *osi;
18066 const insn_sequence *template_sequence;
18067 enum stub_insn_type prev_type;
18068 int size;
18069 int i;
18070 enum map_symbol_type sym_type;
18071
18072 /* Massage our args to the form they really have. */
18073 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
18074 osi = (output_arch_syminfo *) in_arg;
18075
18076 stub_sec = stub_entry->stub_sec;
18077
18078 /* Ensure this stub is attached to the current section being
18079 processed. */
18080 if (stub_sec != osi->sec)
18081 return TRUE;
18082
18083 addr = (bfd_vma) stub_entry->stub_offset;
18084 template_sequence = stub_entry->stub_template;
18085
18086 if (arm_stub_sym_claimed (stub_entry->stub_type))
18087 arm_stub_claim_sym (stub_entry);
18088 else
18089 {
18090 stub_name = stub_entry->output_name;
18091 switch (template_sequence[0].type)
18092 {
18093 case ARM_TYPE:
18094 if (!elf32_arm_output_stub_sym (osi, stub_name, addr,
18095 stub_entry->stub_size))
18096 return FALSE;
18097 break;
18098 case THUMB16_TYPE:
18099 case THUMB32_TYPE:
18100 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
18101 stub_entry->stub_size))
18102 return FALSE;
18103 break;
18104 default:
18105 BFD_FAIL ();
18106 return 0;
18107 }
18108 }
18109
18110 prev_type = DATA_TYPE;
18111 size = 0;
18112 for (i = 0; i < stub_entry->stub_template_size; i++)
18113 {
18114 switch (template_sequence[i].type)
18115 {
18116 case ARM_TYPE:
18117 sym_type = ARM_MAP_ARM;
18118 break;
18119
18120 case THUMB16_TYPE:
18121 case THUMB32_TYPE:
18122 sym_type = ARM_MAP_THUMB;
18123 break;
18124
18125 case DATA_TYPE:
18126 sym_type = ARM_MAP_DATA;
18127 break;
18128
18129 default:
18130 BFD_FAIL ();
18131 return FALSE;
18132 }
18133
18134 if (template_sequence[i].type != prev_type)
18135 {
18136 prev_type = template_sequence[i].type;
18137 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
18138 return FALSE;
18139 }
18140
18141 switch (template_sequence[i].type)
18142 {
18143 case ARM_TYPE:
18144 case THUMB32_TYPE:
18145 size += 4;
18146 break;
18147
18148 case THUMB16_TYPE:
18149 size += 2;
18150 break;
18151
18152 case DATA_TYPE:
18153 size += 4;
18154 break;
18155
18156 default:
18157 BFD_FAIL ();
18158 return FALSE;
18159 }
18160 }
18161
18162 return TRUE;
18163 }
18164
18165 /* Output mapping symbols for linker generated sections,
18166 and for those data-only sections that do not have a
18167 $d. */
18168
18169 static bfd_boolean
18170 elf32_arm_output_arch_local_syms (bfd *output_bfd,
18171 struct bfd_link_info *info,
18172 void *flaginfo,
18173 int (*func) (void *, const char *,
18174 Elf_Internal_Sym *,
18175 asection *,
18176 struct elf_link_hash_entry *))
18177 {
18178 output_arch_syminfo osi;
18179 struct elf32_arm_link_hash_table *htab;
18180 bfd_vma offset;
18181 bfd_size_type size;
18182 bfd *input_bfd;
18183
18184 htab = elf32_arm_hash_table (info);
18185 if (htab == NULL)
18186 return FALSE;
18187
18188 check_use_blx (htab);
18189
18190 osi.flaginfo = flaginfo;
18191 osi.info = info;
18192 osi.func = func;
18193
18194 /* Add a $d mapping symbol to data-only sections that
18195 don't have any mapping symbol. This may result in (harmless) redundant
18196 mapping symbols. */
18197 for (input_bfd = info->input_bfds;
18198 input_bfd != NULL;
18199 input_bfd = input_bfd->link.next)
18200 {
18201 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
18202 for (osi.sec = input_bfd->sections;
18203 osi.sec != NULL;
18204 osi.sec = osi.sec->next)
18205 {
18206 if (osi.sec->output_section != NULL
18207 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
18208 != 0)
18209 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
18210 == SEC_HAS_CONTENTS
18211 && get_arm_elf_section_data (osi.sec) != NULL
18212 && get_arm_elf_section_data (osi.sec)->mapcount == 0
18213 && osi.sec->size > 0
18214 && (osi.sec->flags & SEC_EXCLUDE) == 0)
18215 {
18216 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18217 (output_bfd, osi.sec->output_section);
18218 if (osi.sec_shndx != (int)SHN_BAD)
18219 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
18220 }
18221 }
18222 }
18223
18224 /* ARM->Thumb glue. */
18225 if (htab->arm_glue_size > 0)
18226 {
18227 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
18228 ARM2THUMB_GLUE_SECTION_NAME);
18229
18230 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18231 (output_bfd, osi.sec->output_section);
18232 if (bfd_link_pic (info) || htab->root.is_relocatable_executable
18233 || htab->pic_veneer)
18234 size = ARM2THUMB_PIC_GLUE_SIZE;
18235 else if (htab->use_blx)
18236 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
18237 else
18238 size = ARM2THUMB_STATIC_GLUE_SIZE;
18239
18240 for (offset = 0; offset < htab->arm_glue_size; offset += size)
18241 {
18242 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
18243 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
18244 }
18245 }
18246
18247 /* Thumb->ARM glue. */
18248 if (htab->thumb_glue_size > 0)
18249 {
18250 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
18251 THUMB2ARM_GLUE_SECTION_NAME);
18252
18253 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18254 (output_bfd, osi.sec->output_section);
18255 size = THUMB2ARM_GLUE_SIZE;
18256
18257 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
18258 {
18259 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
18260 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
18261 }
18262 }
18263
18264 /* ARMv4 BX veneers. */
18265 if (htab->bx_glue_size > 0)
18266 {
18267 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
18268 ARM_BX_GLUE_SECTION_NAME);
18269
18270 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18271 (output_bfd, osi.sec->output_section);
18272
18273 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
18274 }
18275
18276 /* Long calls stubs. */
18277 if (htab->stub_bfd && htab->stub_bfd->sections)
18278 {
18279 asection* stub_sec;
18280
18281 for (stub_sec = htab->stub_bfd->sections;
18282 stub_sec != NULL;
18283 stub_sec = stub_sec->next)
18284 {
18285 /* Ignore non-stub sections. */
18286 if (!strstr (stub_sec->name, STUB_SUFFIX))
18287 continue;
18288
18289 osi.sec = stub_sec;
18290
18291 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18292 (output_bfd, osi.sec->output_section);
18293
18294 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
18295 }
18296 }
18297
18298 /* Finally, output mapping symbols for the PLT. */
18299 if (htab->root.splt && htab->root.splt->size > 0)
18300 {
18301 osi.sec = htab->root.splt;
18302 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
18303 (output_bfd, osi.sec->output_section));
18304
18305 /* Output mapping symbols for the plt header. SymbianOS does not have a
18306 plt header. */
18307 if (htab->root.target_os == is_vxworks)
18308 {
18309 /* VxWorks shared libraries have no PLT header. */
18310 if (!bfd_link_pic (info))
18311 {
18312 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18313 return FALSE;
18314 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
18315 return FALSE;
18316 }
18317 }
18318 else if (htab->root.target_os == is_nacl)
18319 {
18320 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18321 return FALSE;
18322 }
18323 else if (using_thumb_only (htab) && !htab->fdpic_p)
18324 {
18325 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 0))
18326 return FALSE;
18327 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
18328 return FALSE;
18329 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 16))
18330 return FALSE;
18331 }
18332 else if (htab->root.target_os != is_symbian && !htab->fdpic_p)
18333 {
18334 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18335 return FALSE;
18336 #ifndef FOUR_WORD_PLT
18337 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
18338 return FALSE;
18339 #endif
18340 }
18341 }
18342 if (htab->root.target_os == is_nacl
18343 && htab->root.iplt
18344 && htab->root.iplt->size > 0)
18345 {
18346 /* NaCl uses a special first entry in .iplt too. */
18347 osi.sec = htab->root.iplt;
18348 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
18349 (output_bfd, osi.sec->output_section));
18350 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18351 return FALSE;
18352 }
18353 if ((htab->root.splt && htab->root.splt->size > 0)
18354 || (htab->root.iplt && htab->root.iplt->size > 0))
18355 {
18356 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
18357 for (input_bfd = info->input_bfds;
18358 input_bfd != NULL;
18359 input_bfd = input_bfd->link.next)
18360 {
18361 struct arm_local_iplt_info **local_iplt;
18362 unsigned int i, num_syms;
18363
18364 local_iplt = elf32_arm_local_iplt (input_bfd);
18365 if (local_iplt != NULL)
18366 {
18367 num_syms = elf_symtab_hdr (input_bfd).sh_info;
18368 for (i = 0; i < num_syms; i++)
18369 if (local_iplt[i] != NULL
18370 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
18371 &local_iplt[i]->root,
18372 &local_iplt[i]->arm))
18373 return FALSE;
18374 }
18375 }
18376 }
18377 if (htab->dt_tlsdesc_plt != 0)
18378 {
18379 /* Mapping symbols for the lazy tls trampoline. */
18380 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
18381 return FALSE;
18382
18383 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
18384 htab->dt_tlsdesc_plt + 24))
18385 return FALSE;
18386 }
18387 if (htab->tls_trampoline != 0)
18388 {
18389 /* Mapping symbols for the tls trampoline. */
18390 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
18391 return FALSE;
18392 #ifdef FOUR_WORD_PLT
18393 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
18394 htab->tls_trampoline + 12))
18395 return FALSE;
18396 #endif
18397 }
18398
18399 return TRUE;
18400 }
18401
18402 /* Filter normal symbols of CMSE entry functions of ABFD to include in
18403 the import library. All SYMCOUNT symbols of ABFD can be examined
18404 from their pointers in SYMS. Pointers of symbols to keep should be
18405 stored continuously at the beginning of that array.
18406
18407 Returns the number of symbols to keep. */
18408
18409 static unsigned int
18410 elf32_arm_filter_cmse_symbols (bfd *abfd ATTRIBUTE_UNUSED,
18411 struct bfd_link_info *info,
18412 asymbol **syms, long symcount)
18413 {
18414 size_t maxnamelen;
18415 char *cmse_name;
18416 long src_count, dst_count = 0;
18417 struct elf32_arm_link_hash_table *htab;
18418
18419 htab = elf32_arm_hash_table (info);
18420 if (!htab->stub_bfd || !htab->stub_bfd->sections)
18421 symcount = 0;
18422
18423 maxnamelen = 128;
18424 cmse_name = (char *) bfd_malloc (maxnamelen);
18425 BFD_ASSERT (cmse_name);
18426
18427 for (src_count = 0; src_count < symcount; src_count++)
18428 {
18429 struct elf32_arm_link_hash_entry *cmse_hash;
18430 asymbol *sym;
18431 flagword flags;
18432 char *name;
18433 size_t namelen;
18434
18435 sym = syms[src_count];
18436 flags = sym->flags;
18437 name = (char *) bfd_asymbol_name (sym);
18438
18439 if ((flags & BSF_FUNCTION) != BSF_FUNCTION)
18440 continue;
18441 if (!(flags & (BSF_GLOBAL | BSF_WEAK)))
18442 continue;
18443
18444 namelen = strlen (name) + sizeof (CMSE_PREFIX) + 1;
18445 if (namelen > maxnamelen)
18446 {
18447 cmse_name = (char *)
18448 bfd_realloc (cmse_name, namelen);
18449 maxnamelen = namelen;
18450 }
18451 snprintf (cmse_name, maxnamelen, "%s%s", CMSE_PREFIX, name);
18452 cmse_hash = (struct elf32_arm_link_hash_entry *)
18453 elf_link_hash_lookup (&(htab)->root, cmse_name, FALSE, FALSE, TRUE);
18454
18455 if (!cmse_hash
18456 || (cmse_hash->root.root.type != bfd_link_hash_defined
18457 && cmse_hash->root.root.type != bfd_link_hash_defweak)
18458 || cmse_hash->root.type != STT_FUNC)
18459 continue;
18460
18461 syms[dst_count++] = sym;
18462 }
18463 free (cmse_name);
18464
18465 syms[dst_count] = NULL;
18466
18467 return dst_count;
18468 }
18469
18470 /* Filter symbols of ABFD to include in the import library. All
18471 SYMCOUNT symbols of ABFD can be examined from their pointers in
18472 SYMS. Pointers of symbols to keep should be stored continuously at
18473 the beginning of that array.
18474
18475 Returns the number of symbols to keep. */
18476
18477 static unsigned int
18478 elf32_arm_filter_implib_symbols (bfd *abfd ATTRIBUTE_UNUSED,
18479 struct bfd_link_info *info,
18480 asymbol **syms, long symcount)
18481 {
18482 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
18483
18484 /* Requirement 8 of "ARM v8-M Security Extensions: Requirements on
18485 Development Tools" (ARM-ECM-0359818) mandates Secure Gateway import
18486 library to be a relocatable object file. */
18487 BFD_ASSERT (!(bfd_get_file_flags (info->out_implib_bfd) & EXEC_P));
18488 if (globals->cmse_implib)
18489 return elf32_arm_filter_cmse_symbols (abfd, info, syms, symcount);
18490 else
18491 return _bfd_elf_filter_global_symbols (abfd, info, syms, symcount);
18492 }
18493
18494 /* Allocate target specific section data. */
18495
18496 static bfd_boolean
18497 elf32_arm_new_section_hook (bfd *abfd, asection *sec)
18498 {
18499 if (!sec->used_by_bfd)
18500 {
18501 _arm_elf_section_data *sdata;
18502 size_t amt = sizeof (*sdata);
18503
18504 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
18505 if (sdata == NULL)
18506 return FALSE;
18507 sec->used_by_bfd = sdata;
18508 }
18509
18510 return _bfd_elf_new_section_hook (abfd, sec);
18511 }
18512
18513
18514 /* Used to order a list of mapping symbols by address. */
18515
18516 static int
18517 elf32_arm_compare_mapping (const void * a, const void * b)
18518 {
18519 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
18520 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
18521
18522 if (amap->vma > bmap->vma)
18523 return 1;
18524 else if (amap->vma < bmap->vma)
18525 return -1;
18526 else if (amap->type > bmap->type)
18527 /* Ensure results do not depend on the host qsort for objects with
18528 multiple mapping symbols at the same address by sorting on type
18529 after vma. */
18530 return 1;
18531 else if (amap->type < bmap->type)
18532 return -1;
18533 else
18534 return 0;
18535 }
18536
18537 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
18538
18539 static unsigned long
18540 offset_prel31 (unsigned long addr, bfd_vma offset)
18541 {
18542 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
18543 }
18544
18545 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
18546 relocations. */
18547
18548 static void
18549 copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
18550 {
18551 unsigned long first_word = bfd_get_32 (output_bfd, from);
18552 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
18553
18554 /* High bit of first word is supposed to be zero. */
18555 if ((first_word & 0x80000000ul) == 0)
18556 first_word = offset_prel31 (first_word, offset);
18557
18558 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
18559 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
18560 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
18561 second_word = offset_prel31 (second_word, offset);
18562
18563 bfd_put_32 (output_bfd, first_word, to);
18564 bfd_put_32 (output_bfd, second_word, to + 4);
18565 }
18566
18567 /* Data for make_branch_to_a8_stub(). */
18568
18569 struct a8_branch_to_stub_data
18570 {
18571 asection *writing_section;
18572 bfd_byte *contents;
18573 };
18574
18575
18576 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
18577 places for a particular section. */
18578
18579 static bfd_boolean
18580 make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
18581 void *in_arg)
18582 {
18583 struct elf32_arm_stub_hash_entry *stub_entry;
18584 struct a8_branch_to_stub_data *data;
18585 bfd_byte *contents;
18586 unsigned long branch_insn;
18587 bfd_vma veneered_insn_loc, veneer_entry_loc;
18588 bfd_signed_vma branch_offset;
18589 bfd *abfd;
18590 unsigned int loc;
18591
18592 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
18593 data = (struct a8_branch_to_stub_data *) in_arg;
18594
18595 if (stub_entry->target_section != data->writing_section
18596 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
18597 return TRUE;
18598
18599 contents = data->contents;
18600
18601 /* We use target_section as Cortex-A8 erratum workaround stubs are only
18602 generated when both source and target are in the same section. */
18603 veneered_insn_loc = stub_entry->target_section->output_section->vma
18604 + stub_entry->target_section->output_offset
18605 + stub_entry->source_value;
18606
18607 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
18608 + stub_entry->stub_sec->output_offset
18609 + stub_entry->stub_offset;
18610
18611 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
18612 veneered_insn_loc &= ~3u;
18613
18614 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
18615
18616 abfd = stub_entry->target_section->owner;
18617 loc = stub_entry->source_value;
18618
18619 /* We attempt to avoid this condition by setting stubs_always_after_branch
18620 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
18621 This check is just to be on the safe side... */
18622 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
18623 {
18624 _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub is "
18625 "allocated in unsafe location"), abfd);
18626 return FALSE;
18627 }
18628
18629 switch (stub_entry->stub_type)
18630 {
18631 case arm_stub_a8_veneer_b:
18632 case arm_stub_a8_veneer_b_cond:
18633 branch_insn = 0xf0009000;
18634 goto jump24;
18635
18636 case arm_stub_a8_veneer_blx:
18637 branch_insn = 0xf000e800;
18638 goto jump24;
18639
18640 case arm_stub_a8_veneer_bl:
18641 {
18642 unsigned int i1, j1, i2, j2, s;
18643
18644 branch_insn = 0xf000d000;
18645
18646 jump24:
18647 if (branch_offset < -16777216 || branch_offset > 16777214)
18648 {
18649 /* There's not much we can do apart from complain if this
18650 happens. */
18651 _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub out "
18652 "of range (input file too large)"), abfd);
18653 return FALSE;
18654 }
18655
18656 /* i1 = not(j1 eor s), so:
18657 not i1 = j1 eor s
18658 j1 = (not i1) eor s. */
18659
18660 branch_insn |= (branch_offset >> 1) & 0x7ff;
18661 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
18662 i2 = (branch_offset >> 22) & 1;
18663 i1 = (branch_offset >> 23) & 1;
18664 s = (branch_offset >> 24) & 1;
18665 j1 = (!i1) ^ s;
18666 j2 = (!i2) ^ s;
18667 branch_insn |= j2 << 11;
18668 branch_insn |= j1 << 13;
18669 branch_insn |= s << 26;
18670 }
18671 break;
18672
18673 default:
18674 BFD_FAIL ();
18675 return FALSE;
18676 }
18677
18678 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[loc]);
18679 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[loc + 2]);
18680
18681 return TRUE;
18682 }
18683
18684 /* Beginning of stm32l4xx work-around. */
18685
18686 /* Functions encoding instructions necessary for the emission of the
18687 fix-stm32l4xx-629360.
18688 Encoding is extracted from the
18689 ARM (C) Architecture Reference Manual
18690 ARMv7-A and ARMv7-R edition
18691 ARM DDI 0406C.b (ID072512). */
18692
18693 static inline bfd_vma
18694 create_instruction_branch_absolute (int branch_offset)
18695 {
18696 /* A8.8.18 B (A8-334)
18697 B target_address (Encoding T4). */
18698 /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii. */
18699 /* jump offset is: S:I1:I2:imm10:imm11:0. */
18700 /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S). */
18701
18702 int s = ((branch_offset & 0x1000000) >> 24);
18703 int j1 = s ^ !((branch_offset & 0x800000) >> 23);
18704 int j2 = s ^ !((branch_offset & 0x400000) >> 22);
18705
18706 if (branch_offset < -(1 << 24) || branch_offset >= (1 << 24))
18707 BFD_ASSERT (0 && "Error: branch out of range. Cannot create branch.");
18708
18709 bfd_vma patched_inst = 0xf0009000
18710 | s << 26 /* S. */
18711 | (((unsigned long) (branch_offset) >> 12) & 0x3ff) << 16 /* imm10. */
18712 | j1 << 13 /* J1. */
18713 | j2 << 11 /* J2. */
18714 | (((unsigned long) (branch_offset) >> 1) & 0x7ff); /* imm11. */
18715
18716 return patched_inst;
18717 }
18718
18719 static inline bfd_vma
18720 create_instruction_ldmia (int base_reg, int wback, int reg_mask)
18721 {
18722 /* A8.8.57 LDM/LDMIA/LDMFD (A8-396)
18723 LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2). */
18724 bfd_vma patched_inst = 0xe8900000
18725 | (/*W=*/wback << 21)
18726 | (base_reg << 16)
18727 | (reg_mask & 0x0000ffff);
18728
18729 return patched_inst;
18730 }
18731
18732 static inline bfd_vma
18733 create_instruction_ldmdb (int base_reg, int wback, int reg_mask)
18734 {
18735 /* A8.8.60 LDMDB/LDMEA (A8-402)
18736 LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1). */
18737 bfd_vma patched_inst = 0xe9100000
18738 | (/*W=*/wback << 21)
18739 | (base_reg << 16)
18740 | (reg_mask & 0x0000ffff);
18741
18742 return patched_inst;
18743 }
18744
18745 static inline bfd_vma
18746 create_instruction_mov (int target_reg, int source_reg)
18747 {
18748 /* A8.8.103 MOV (register) (A8-486)
18749 MOV Rd, Rm (Encoding T1). */
18750 bfd_vma patched_inst = 0x4600
18751 | (target_reg & 0x7)
18752 | ((target_reg & 0x8) >> 3) << 7
18753 | (source_reg << 3);
18754
18755 return patched_inst;
18756 }
18757
18758 static inline bfd_vma
18759 create_instruction_sub (int target_reg, int source_reg, int value)
18760 {
18761 /* A8.8.221 SUB (immediate) (A8-708)
18762 SUB Rd, Rn, #value (Encoding T3). */
18763 bfd_vma patched_inst = 0xf1a00000
18764 | (target_reg << 8)
18765 | (source_reg << 16)
18766 | (/*S=*/0 << 20)
18767 | ((value & 0x800) >> 11) << 26
18768 | ((value & 0x700) >> 8) << 12
18769 | (value & 0x0ff);
18770
18771 return patched_inst;
18772 }
18773
18774 static inline bfd_vma
18775 create_instruction_vldmia (int base_reg, int is_dp, int wback, int num_words,
18776 int first_reg)
18777 {
18778 /* A8.8.332 VLDM (A8-922)
18779 VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */
18780 bfd_vma patched_inst = (is_dp ? 0xec900b00 : 0xec900a00)
18781 | (/*W=*/wback << 21)
18782 | (base_reg << 16)
18783 | (num_words & 0x000000ff)
18784 | (((unsigned)first_reg >> 1) & 0x0000000f) << 12
18785 | (first_reg & 0x00000001) << 22;
18786
18787 return patched_inst;
18788 }
18789
18790 static inline bfd_vma
18791 create_instruction_vldmdb (int base_reg, int is_dp, int num_words,
18792 int first_reg)
18793 {
18794 /* A8.8.332 VLDM (A8-922)
18795 VLMD{MODE} Rn!, {} (Encoding T1 or T2). */
18796 bfd_vma patched_inst = (is_dp ? 0xed300b00 : 0xed300a00)
18797 | (base_reg << 16)
18798 | (num_words & 0x000000ff)
18799 | (((unsigned)first_reg >>1 ) & 0x0000000f) << 12
18800 | (first_reg & 0x00000001) << 22;
18801
18802 return patched_inst;
18803 }
18804
18805 static inline bfd_vma
18806 create_instruction_udf_w (int value)
18807 {
18808 /* A8.8.247 UDF (A8-758)
18809 Undefined (Encoding T2). */
18810 bfd_vma patched_inst = 0xf7f0a000
18811 | (value & 0x00000fff)
18812 | (value & 0x000f0000) << 16;
18813
18814 return patched_inst;
18815 }
18816
18817 static inline bfd_vma
18818 create_instruction_udf (int value)
18819 {
18820 /* A8.8.247 UDF (A8-758)
18821 Undefined (Encoding T1). */
18822 bfd_vma patched_inst = 0xde00
18823 | (value & 0xff);
18824
18825 return patched_inst;
18826 }
18827
18828 /* Functions writing an instruction in memory, returning the next
18829 memory position to write to. */
18830
18831 static inline bfd_byte *
18832 push_thumb2_insn32 (struct elf32_arm_link_hash_table * htab,
18833 bfd * output_bfd, bfd_byte *pt, insn32 insn)
18834 {
18835 put_thumb2_insn (htab, output_bfd, insn, pt);
18836 return pt + 4;
18837 }
18838
18839 static inline bfd_byte *
18840 push_thumb2_insn16 (struct elf32_arm_link_hash_table * htab,
18841 bfd * output_bfd, bfd_byte *pt, insn32 insn)
18842 {
18843 put_thumb_insn (htab, output_bfd, insn, pt);
18844 return pt + 2;
18845 }
18846
18847 /* Function filling up a region in memory with T1 and T2 UDFs taking
18848 care of alignment. */
18849
18850 static bfd_byte *
18851 stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table * htab,
18852 bfd * output_bfd,
18853 const bfd_byte * const base_stub_contents,
18854 bfd_byte * const from_stub_contents,
18855 const bfd_byte * const end_stub_contents)
18856 {
18857 bfd_byte *current_stub_contents = from_stub_contents;
18858
18859 /* Fill the remaining of the stub with deterministic contents : UDF
18860 instructions.
18861 Check if realignment is needed on modulo 4 frontier using T1, to
18862 further use T2. */
18863 if ((current_stub_contents < end_stub_contents)
18864 && !((current_stub_contents - base_stub_contents) % 2)
18865 && ((current_stub_contents - base_stub_contents) % 4))
18866 current_stub_contents =
18867 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18868 create_instruction_udf (0));
18869
18870 for (; current_stub_contents < end_stub_contents;)
18871 current_stub_contents =
18872 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18873 create_instruction_udf_w (0));
18874
18875 return current_stub_contents;
18876 }
18877
18878 /* Functions writing the stream of instructions equivalent to the
18879 derived sequence for ldmia, ldmdb, vldm respectively. */
18880
18881 static void
18882 stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table * htab,
18883 bfd * output_bfd,
18884 const insn32 initial_insn,
18885 const bfd_byte *const initial_insn_addr,
18886 bfd_byte *const base_stub_contents)
18887 {
18888 int wback = (initial_insn & 0x00200000) >> 21;
18889 int ri, rn = (initial_insn & 0x000F0000) >> 16;
18890 int insn_all_registers = initial_insn & 0x0000ffff;
18891 int insn_low_registers, insn_high_registers;
18892 int usable_register_mask;
18893 int nb_registers = elf32_arm_popcount (insn_all_registers);
18894 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
18895 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
18896 bfd_byte *current_stub_contents = base_stub_contents;
18897
18898 BFD_ASSERT (is_thumb2_ldmia (initial_insn));
18899
18900 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18901 smaller than 8 registers load sequences that do not cause the
18902 hardware issue. */
18903 if (nb_registers <= 8)
18904 {
18905 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
18906 current_stub_contents =
18907 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18908 initial_insn);
18909
18910 /* B initial_insn_addr+4. */
18911 if (!restore_pc)
18912 current_stub_contents =
18913 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18914 create_instruction_branch_absolute
18915 (initial_insn_addr - current_stub_contents));
18916
18917 /* Fill the remaining of the stub with deterministic contents. */
18918 current_stub_contents =
18919 stm32l4xx_fill_stub_udf (htab, output_bfd,
18920 base_stub_contents, current_stub_contents,
18921 base_stub_contents +
18922 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18923
18924 return;
18925 }
18926
18927 /* - reg_list[13] == 0. */
18928 BFD_ASSERT ((insn_all_registers & (1 << 13))==0);
18929
18930 /* - reg_list[14] & reg_list[15] != 1. */
18931 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
18932
18933 /* - if (wback==1) reg_list[rn] == 0. */
18934 BFD_ASSERT (!wback || !restore_rn);
18935
18936 /* - nb_registers > 8. */
18937 BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8);
18938
18939 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
18940
18941 /* In the following algorithm, we split this wide LDM using 2 LDM insns:
18942 - One with the 7 lowest registers (register mask 0x007F)
18943 This LDM will finally contain between 2 and 7 registers
18944 - One with the 7 highest registers (register mask 0xDF80)
18945 This ldm will finally contain between 2 and 7 registers. */
18946 insn_low_registers = insn_all_registers & 0x007F;
18947 insn_high_registers = insn_all_registers & 0xDF80;
18948
18949 /* A spare register may be needed during this veneer to temporarily
18950 handle the base register. This register will be restored with the
18951 last LDM operation.
18952 The usable register may be any general purpose register (that
18953 excludes PC, SP, LR : register mask is 0x1FFF). */
18954 usable_register_mask = 0x1FFF;
18955
18956 /* Generate the stub function. */
18957 if (wback)
18958 {
18959 /* LDMIA Rn!, {R-low-register-list} : (Encoding T2). */
18960 current_stub_contents =
18961 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18962 create_instruction_ldmia
18963 (rn, /*wback=*/1, insn_low_registers));
18964
18965 /* LDMIA Rn!, {R-high-register-list} : (Encoding T2). */
18966 current_stub_contents =
18967 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18968 create_instruction_ldmia
18969 (rn, /*wback=*/1, insn_high_registers));
18970 if (!restore_pc)
18971 {
18972 /* B initial_insn_addr+4. */
18973 current_stub_contents =
18974 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18975 create_instruction_branch_absolute
18976 (initial_insn_addr - current_stub_contents));
18977 }
18978 }
18979 else /* if (!wback). */
18980 {
18981 ri = rn;
18982
18983 /* If Rn is not part of the high-register-list, move it there. */
18984 if (!(insn_high_registers & (1 << rn)))
18985 {
18986 /* Choose a Ri in the high-register-list that will be restored. */
18987 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18988
18989 /* MOV Ri, Rn. */
18990 current_stub_contents =
18991 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18992 create_instruction_mov (ri, rn));
18993 }
18994
18995 /* LDMIA Ri!, {R-low-register-list} : (Encoding T2). */
18996 current_stub_contents =
18997 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18998 create_instruction_ldmia
18999 (ri, /*wback=*/1, insn_low_registers));
19000
19001 /* LDMIA Ri, {R-high-register-list} : (Encoding T2). */
19002 current_stub_contents =
19003 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19004 create_instruction_ldmia
19005 (ri, /*wback=*/0, insn_high_registers));
19006
19007 if (!restore_pc)
19008 {
19009 /* B initial_insn_addr+4. */
19010 current_stub_contents =
19011 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19012 create_instruction_branch_absolute
19013 (initial_insn_addr - current_stub_contents));
19014 }
19015 }
19016
19017 /* Fill the remaining of the stub with deterministic contents. */
19018 current_stub_contents =
19019 stm32l4xx_fill_stub_udf (htab, output_bfd,
19020 base_stub_contents, current_stub_contents,
19021 base_stub_contents +
19022 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
19023 }
19024
19025 static void
19026 stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table * htab,
19027 bfd * output_bfd,
19028 const insn32 initial_insn,
19029 const bfd_byte *const initial_insn_addr,
19030 bfd_byte *const base_stub_contents)
19031 {
19032 int wback = (initial_insn & 0x00200000) >> 21;
19033 int ri, rn = (initial_insn & 0x000f0000) >> 16;
19034 int insn_all_registers = initial_insn & 0x0000ffff;
19035 int insn_low_registers, insn_high_registers;
19036 int usable_register_mask;
19037 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
19038 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
19039 int nb_registers = elf32_arm_popcount (insn_all_registers);
19040 bfd_byte *current_stub_contents = base_stub_contents;
19041
19042 BFD_ASSERT (is_thumb2_ldmdb (initial_insn));
19043
19044 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
19045 smaller than 8 registers load sequences that do not cause the
19046 hardware issue. */
19047 if (nb_registers <= 8)
19048 {
19049 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
19050 current_stub_contents =
19051 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19052 initial_insn);
19053
19054 /* B initial_insn_addr+4. */
19055 current_stub_contents =
19056 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19057 create_instruction_branch_absolute
19058 (initial_insn_addr - current_stub_contents));
19059
19060 /* Fill the remaining of the stub with deterministic contents. */
19061 current_stub_contents =
19062 stm32l4xx_fill_stub_udf (htab, output_bfd,
19063 base_stub_contents, current_stub_contents,
19064 base_stub_contents +
19065 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
19066
19067 return;
19068 }
19069
19070 /* - reg_list[13] == 0. */
19071 BFD_ASSERT ((insn_all_registers & (1 << 13)) == 0);
19072
19073 /* - reg_list[14] & reg_list[15] != 1. */
19074 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
19075
19076 /* - if (wback==1) reg_list[rn] == 0. */
19077 BFD_ASSERT (!wback || !restore_rn);
19078
19079 /* - nb_registers > 8. */
19080 BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8);
19081
19082 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
19083
19084 /* In the following algorithm, we split this wide LDM using 2 LDM insn:
19085 - One with the 7 lowest registers (register mask 0x007F)
19086 This LDM will finally contain between 2 and 7 registers
19087 - One with the 7 highest registers (register mask 0xDF80)
19088 This ldm will finally contain between 2 and 7 registers. */
19089 insn_low_registers = insn_all_registers & 0x007F;
19090 insn_high_registers = insn_all_registers & 0xDF80;
19091
19092 /* A spare register may be needed during this veneer to temporarily
19093 handle the base register. This register will be restored with
19094 the last LDM operation.
19095 The usable register may be any general purpose register (that excludes
19096 PC, SP, LR : register mask is 0x1FFF). */
19097 usable_register_mask = 0x1FFF;
19098
19099 /* Generate the stub function. */
19100 if (!wback && !restore_pc && !restore_rn)
19101 {
19102 /* Choose a Ri in the low-register-list that will be restored. */
19103 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
19104
19105 /* MOV Ri, Rn. */
19106 current_stub_contents =
19107 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
19108 create_instruction_mov (ri, rn));
19109
19110 /* LDMDB Ri!, {R-high-register-list}. */
19111 current_stub_contents =
19112 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19113 create_instruction_ldmdb
19114 (ri, /*wback=*/1, insn_high_registers));
19115
19116 /* LDMDB Ri, {R-low-register-list}. */
19117 current_stub_contents =
19118 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19119 create_instruction_ldmdb
19120 (ri, /*wback=*/0, insn_low_registers));
19121
19122 /* B initial_insn_addr+4. */
19123 current_stub_contents =
19124 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19125 create_instruction_branch_absolute
19126 (initial_insn_addr - current_stub_contents));
19127 }
19128 else if (wback && !restore_pc && !restore_rn)
19129 {
19130 /* LDMDB Rn!, {R-high-register-list}. */
19131 current_stub_contents =
19132 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19133 create_instruction_ldmdb
19134 (rn, /*wback=*/1, insn_high_registers));
19135
19136 /* LDMDB Rn!, {R-low-register-list}. */
19137 current_stub_contents =
19138 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19139 create_instruction_ldmdb
19140 (rn, /*wback=*/1, insn_low_registers));
19141
19142 /* B initial_insn_addr+4. */
19143 current_stub_contents =
19144 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19145 create_instruction_branch_absolute
19146 (initial_insn_addr - current_stub_contents));
19147 }
19148 else if (!wback && restore_pc && !restore_rn)
19149 {
19150 /* Choose a Ri in the high-register-list that will be restored. */
19151 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
19152
19153 /* SUB Ri, Rn, #(4*nb_registers). */
19154 current_stub_contents =
19155 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19156 create_instruction_sub (ri, rn, (4 * nb_registers)));
19157
19158 /* LDMIA Ri!, {R-low-register-list}. */
19159 current_stub_contents =
19160 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19161 create_instruction_ldmia
19162 (ri, /*wback=*/1, insn_low_registers));
19163
19164 /* LDMIA Ri, {R-high-register-list}. */
19165 current_stub_contents =
19166 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19167 create_instruction_ldmia
19168 (ri, /*wback=*/0, insn_high_registers));
19169 }
19170 else if (wback && restore_pc && !restore_rn)
19171 {
19172 /* Choose a Ri in the high-register-list that will be restored. */
19173 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
19174
19175 /* SUB Rn, Rn, #(4*nb_registers) */
19176 current_stub_contents =
19177 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19178 create_instruction_sub (rn, rn, (4 * nb_registers)));
19179
19180 /* MOV Ri, Rn. */
19181 current_stub_contents =
19182 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
19183 create_instruction_mov (ri, rn));
19184
19185 /* LDMIA Ri!, {R-low-register-list}. */
19186 current_stub_contents =
19187 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19188 create_instruction_ldmia
19189 (ri, /*wback=*/1, insn_low_registers));
19190
19191 /* LDMIA Ri, {R-high-register-list}. */
19192 current_stub_contents =
19193 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19194 create_instruction_ldmia
19195 (ri, /*wback=*/0, insn_high_registers));
19196 }
19197 else if (!wback && !restore_pc && restore_rn)
19198 {
19199 ri = rn;
19200 if (!(insn_low_registers & (1 << rn)))
19201 {
19202 /* Choose a Ri in the low-register-list that will be restored. */
19203 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
19204
19205 /* MOV Ri, Rn. */
19206 current_stub_contents =
19207 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
19208 create_instruction_mov (ri, rn));
19209 }
19210
19211 /* LDMDB Ri!, {R-high-register-list}. */
19212 current_stub_contents =
19213 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19214 create_instruction_ldmdb
19215 (ri, /*wback=*/1, insn_high_registers));
19216
19217 /* LDMDB Ri, {R-low-register-list}. */
19218 current_stub_contents =
19219 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19220 create_instruction_ldmdb
19221 (ri, /*wback=*/0, insn_low_registers));
19222
19223 /* B initial_insn_addr+4. */
19224 current_stub_contents =
19225 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19226 create_instruction_branch_absolute
19227 (initial_insn_addr - current_stub_contents));
19228 }
19229 else if (!wback && restore_pc && restore_rn)
19230 {
19231 ri = rn;
19232 if (!(insn_high_registers & (1 << rn)))
19233 {
19234 /* Choose a Ri in the high-register-list that will be restored. */
19235 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
19236 }
19237
19238 /* SUB Ri, Rn, #(4*nb_registers). */
19239 current_stub_contents =
19240 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19241 create_instruction_sub (ri, rn, (4 * nb_registers)));
19242
19243 /* LDMIA Ri!, {R-low-register-list}. */
19244 current_stub_contents =
19245 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19246 create_instruction_ldmia
19247 (ri, /*wback=*/1, insn_low_registers));
19248
19249 /* LDMIA Ri, {R-high-register-list}. */
19250 current_stub_contents =
19251 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19252 create_instruction_ldmia
19253 (ri, /*wback=*/0, insn_high_registers));
19254 }
19255 else if (wback && restore_rn)
19256 {
19257 /* The assembler should not have accepted to encode this. */
19258 BFD_ASSERT (0 && "Cannot patch an instruction that has an "
19259 "undefined behavior.\n");
19260 }
19261
19262 /* Fill the remaining of the stub with deterministic contents. */
19263 current_stub_contents =
19264 stm32l4xx_fill_stub_udf (htab, output_bfd,
19265 base_stub_contents, current_stub_contents,
19266 base_stub_contents +
19267 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
19268
19269 }
19270
19271 static void
19272 stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table * htab,
19273 bfd * output_bfd,
19274 const insn32 initial_insn,
19275 const bfd_byte *const initial_insn_addr,
19276 bfd_byte *const base_stub_contents)
19277 {
19278 int num_words = initial_insn & 0xff;
19279 bfd_byte *current_stub_contents = base_stub_contents;
19280
19281 BFD_ASSERT (is_thumb2_vldm (initial_insn));
19282
19283 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
19284 smaller than 8 words load sequences that do not cause the
19285 hardware issue. */
19286 if (num_words <= 8)
19287 {
19288 /* Untouched instruction. */
19289 current_stub_contents =
19290 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19291 initial_insn);
19292
19293 /* B initial_insn_addr+4. */
19294 current_stub_contents =
19295 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19296 create_instruction_branch_absolute
19297 (initial_insn_addr - current_stub_contents));
19298 }
19299 else
19300 {
19301 bfd_boolean is_dp = /* DP encoding. */
19302 (initial_insn & 0xfe100f00) == 0xec100b00;
19303 bfd_boolean is_ia_nobang = /* (IA without !). */
19304 (((initial_insn << 7) >> 28) & 0xd) == 0x4;
19305 bfd_boolean is_ia_bang = /* (IA with !) - includes VPOP. */
19306 (((initial_insn << 7) >> 28) & 0xd) == 0x5;
19307 bfd_boolean is_db_bang = /* (DB with !). */
19308 (((initial_insn << 7) >> 28) & 0xd) == 0x9;
19309 int base_reg = ((unsigned int) initial_insn << 12) >> 28;
19310 /* d = UInt (Vd:D);. */
19311 int first_reg = ((((unsigned int) initial_insn << 16) >> 28) << 1)
19312 | (((unsigned int)initial_insn << 9) >> 31);
19313
19314 /* Compute the number of 8-words chunks needed to split. */
19315 int chunks = (num_words % 8) ? (num_words / 8 + 1) : (num_words / 8);
19316 int chunk;
19317
19318 /* The test coverage has been done assuming the following
19319 hypothesis that exactly one of the previous is_ predicates is
19320 true. */
19321 BFD_ASSERT ( (is_ia_nobang ^ is_ia_bang ^ is_db_bang)
19322 && !(is_ia_nobang & is_ia_bang & is_db_bang));
19323
19324 /* We treat the cutting of the words in one pass for all
19325 cases, then we emit the adjustments:
19326
19327 vldm rx, {...}
19328 -> vldm rx!, {8_words_or_less} for each needed 8_word
19329 -> sub rx, rx, #size (list)
19330
19331 vldm rx!, {...}
19332 -> vldm rx!, {8_words_or_less} for each needed 8_word
19333 This also handles vpop instruction (when rx is sp)
19334
19335 vldmd rx!, {...}
19336 -> vldmb rx!, {8_words_or_less} for each needed 8_word. */
19337 for (chunk = 0; chunk < chunks; ++chunk)
19338 {
19339 bfd_vma new_insn = 0;
19340
19341 if (is_ia_nobang || is_ia_bang)
19342 {
19343 new_insn = create_instruction_vldmia
19344 (base_reg,
19345 is_dp,
19346 /*wback= . */1,
19347 chunks - (chunk + 1) ?
19348 8 : num_words - chunk * 8,
19349 first_reg + chunk * 8);
19350 }
19351 else if (is_db_bang)
19352 {
19353 new_insn = create_instruction_vldmdb
19354 (base_reg,
19355 is_dp,
19356 chunks - (chunk + 1) ?
19357 8 : num_words - chunk * 8,
19358 first_reg + chunk * 8);
19359 }
19360
19361 if (new_insn)
19362 current_stub_contents =
19363 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19364 new_insn);
19365 }
19366
19367 /* Only this case requires the base register compensation
19368 subtract. */
19369 if (is_ia_nobang)
19370 {
19371 current_stub_contents =
19372 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19373 create_instruction_sub
19374 (base_reg, base_reg, 4*num_words));
19375 }
19376
19377 /* B initial_insn_addr+4. */
19378 current_stub_contents =
19379 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19380 create_instruction_branch_absolute
19381 (initial_insn_addr - current_stub_contents));
19382 }
19383
19384 /* Fill the remaining of the stub with deterministic contents. */
19385 current_stub_contents =
19386 stm32l4xx_fill_stub_udf (htab, output_bfd,
19387 base_stub_contents, current_stub_contents,
19388 base_stub_contents +
19389 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
19390 }
19391
19392 static void
19393 stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table * htab,
19394 bfd * output_bfd,
19395 const insn32 wrong_insn,
19396 const bfd_byte *const wrong_insn_addr,
19397 bfd_byte *const stub_contents)
19398 {
19399 if (is_thumb2_ldmia (wrong_insn))
19400 stm32l4xx_create_replacing_stub_ldmia (htab, output_bfd,
19401 wrong_insn, wrong_insn_addr,
19402 stub_contents);
19403 else if (is_thumb2_ldmdb (wrong_insn))
19404 stm32l4xx_create_replacing_stub_ldmdb (htab, output_bfd,
19405 wrong_insn, wrong_insn_addr,
19406 stub_contents);
19407 else if (is_thumb2_vldm (wrong_insn))
19408 stm32l4xx_create_replacing_stub_vldm (htab, output_bfd,
19409 wrong_insn, wrong_insn_addr,
19410 stub_contents);
19411 }
19412
19413 /* End of stm32l4xx work-around. */
19414
19415
19416 /* Do code byteswapping. Return FALSE afterwards so that the section is
19417 written out as normal. */
19418
19419 static bfd_boolean
19420 elf32_arm_write_section (bfd *output_bfd,
19421 struct bfd_link_info *link_info,
19422 asection *sec,
19423 bfd_byte *contents)
19424 {
19425 unsigned int mapcount, errcount;
19426 _arm_elf_section_data *arm_data;
19427 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
19428 elf32_arm_section_map *map;
19429 elf32_vfp11_erratum_list *errnode;
19430 elf32_stm32l4xx_erratum_list *stm32l4xx_errnode;
19431 bfd_vma ptr;
19432 bfd_vma end;
19433 bfd_vma offset = sec->output_section->vma + sec->output_offset;
19434 bfd_byte tmp;
19435 unsigned int i;
19436
19437 if (globals == NULL)
19438 return FALSE;
19439
19440 /* If this section has not been allocated an _arm_elf_section_data
19441 structure then we cannot record anything. */
19442 arm_data = get_arm_elf_section_data (sec);
19443 if (arm_data == NULL)
19444 return FALSE;
19445
19446 mapcount = arm_data->mapcount;
19447 map = arm_data->map;
19448 errcount = arm_data->erratumcount;
19449
19450 if (errcount != 0)
19451 {
19452 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
19453
19454 for (errnode = arm_data->erratumlist; errnode != 0;
19455 errnode = errnode->next)
19456 {
19457 bfd_vma target = errnode->vma - offset;
19458
19459 switch (errnode->type)
19460 {
19461 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
19462 {
19463 bfd_vma branch_to_veneer;
19464 /* Original condition code of instruction, plus bit mask for
19465 ARM B instruction. */
19466 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
19467 | 0x0a000000;
19468
19469 /* The instruction is before the label. */
19470 target -= 4;
19471
19472 /* Above offset included in -4 below. */
19473 branch_to_veneer = errnode->u.b.veneer->vma
19474 - errnode->vma - 4;
19475
19476 if ((signed) branch_to_veneer < -(1 << 25)
19477 || (signed) branch_to_veneer >= (1 << 25))
19478 _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
19479 "range"), output_bfd);
19480
19481 insn |= (branch_to_veneer >> 2) & 0xffffff;
19482 contents[endianflip ^ target] = insn & 0xff;
19483 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
19484 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
19485 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
19486 }
19487 break;
19488
19489 case VFP11_ERRATUM_ARM_VENEER:
19490 {
19491 bfd_vma branch_from_veneer;
19492 unsigned int insn;
19493
19494 /* Take size of veneer into account. */
19495 branch_from_veneer = errnode->u.v.branch->vma
19496 - errnode->vma - 12;
19497
19498 if ((signed) branch_from_veneer < -(1 << 25)
19499 || (signed) branch_from_veneer >= (1 << 25))
19500 _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
19501 "range"), output_bfd);
19502
19503 /* Original instruction. */
19504 insn = errnode->u.v.branch->u.b.vfp_insn;
19505 contents[endianflip ^ target] = insn & 0xff;
19506 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
19507 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
19508 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
19509
19510 /* Branch back to insn after original insn. */
19511 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
19512 contents[endianflip ^ (target + 4)] = insn & 0xff;
19513 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
19514 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
19515 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
19516 }
19517 break;
19518
19519 default:
19520 abort ();
19521 }
19522 }
19523 }
19524
19525 if (arm_data->stm32l4xx_erratumcount != 0)
19526 {
19527 for (stm32l4xx_errnode = arm_data->stm32l4xx_erratumlist;
19528 stm32l4xx_errnode != 0;
19529 stm32l4xx_errnode = stm32l4xx_errnode->next)
19530 {
19531 bfd_vma target = stm32l4xx_errnode->vma - offset;
19532
19533 switch (stm32l4xx_errnode->type)
19534 {
19535 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
19536 {
19537 unsigned int insn;
19538 bfd_vma branch_to_veneer =
19539 stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma;
19540
19541 if ((signed) branch_to_veneer < -(1 << 24)
19542 || (signed) branch_to_veneer >= (1 << 24))
19543 {
19544 bfd_vma out_of_range =
19545 ((signed) branch_to_veneer < -(1 << 24)) ?
19546 - branch_to_veneer - (1 << 24) :
19547 ((signed) branch_to_veneer >= (1 << 24)) ?
19548 branch_to_veneer - (1 << 24) : 0;
19549
19550 _bfd_error_handler
19551 (_("%pB(%#" PRIx64 "): error: "
19552 "cannot create STM32L4XX veneer; "
19553 "jump out of range by %" PRId64 " bytes; "
19554 "cannot encode branch instruction"),
19555 output_bfd,
19556 (uint64_t) (stm32l4xx_errnode->vma - 4),
19557 (int64_t) out_of_range);
19558 continue;
19559 }
19560
19561 insn = create_instruction_branch_absolute
19562 (stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma);
19563
19564 /* The instruction is before the label. */
19565 target -= 4;
19566
19567 put_thumb2_insn (globals, output_bfd,
19568 (bfd_vma) insn, contents + target);
19569 }
19570 break;
19571
19572 case STM32L4XX_ERRATUM_VENEER:
19573 {
19574 bfd_byte * veneer;
19575 bfd_byte * veneer_r;
19576 unsigned int insn;
19577
19578 veneer = contents + target;
19579 veneer_r = veneer
19580 + stm32l4xx_errnode->u.b.veneer->vma
19581 - stm32l4xx_errnode->vma - 4;
19582
19583 if ((signed) (veneer_r - veneer -
19584 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE >
19585 STM32L4XX_ERRATUM_LDM_VENEER_SIZE ?
19586 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE :
19587 STM32L4XX_ERRATUM_LDM_VENEER_SIZE) < -(1 << 24)
19588 || (signed) (veneer_r - veneer) >= (1 << 24))
19589 {
19590 _bfd_error_handler (_("%pB: error: cannot create STM32L4XX "
19591 "veneer"), output_bfd);
19592 continue;
19593 }
19594
19595 /* Original instruction. */
19596 insn = stm32l4xx_errnode->u.v.branch->u.b.insn;
19597
19598 stm32l4xx_create_replacing_stub
19599 (globals, output_bfd, insn, (void*)veneer_r, (void*)veneer);
19600 }
19601 break;
19602
19603 default:
19604 abort ();
19605 }
19606 }
19607 }
19608
19609 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
19610 {
19611 arm_unwind_table_edit *edit_node
19612 = arm_data->u.exidx.unwind_edit_list;
19613 /* Now, sec->size is the size of the section we will write. The original
19614 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
19615 markers) was sec->rawsize. (This isn't the case if we perform no
19616 edits, then rawsize will be zero and we should use size). */
19617 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
19618 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
19619 unsigned int in_index, out_index;
19620 bfd_vma add_to_offsets = 0;
19621
19622 if (edited_contents == NULL)
19623 return FALSE;
19624 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
19625 {
19626 if (edit_node)
19627 {
19628 unsigned int edit_index = edit_node->index;
19629
19630 if (in_index < edit_index && in_index * 8 < input_size)
19631 {
19632 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
19633 contents + in_index * 8, add_to_offsets);
19634 out_index++;
19635 in_index++;
19636 }
19637 else if (in_index == edit_index
19638 || (in_index * 8 >= input_size
19639 && edit_index == UINT_MAX))
19640 {
19641 switch (edit_node->type)
19642 {
19643 case DELETE_EXIDX_ENTRY:
19644 in_index++;
19645 add_to_offsets += 8;
19646 break;
19647
19648 case INSERT_EXIDX_CANTUNWIND_AT_END:
19649 {
19650 asection *text_sec = edit_node->linked_section;
19651 bfd_vma text_offset = text_sec->output_section->vma
19652 + text_sec->output_offset
19653 + text_sec->size;
19654 bfd_vma exidx_offset = offset + out_index * 8;
19655 unsigned long prel31_offset;
19656
19657 /* Note: this is meant to be equivalent to an
19658 R_ARM_PREL31 relocation. These synthetic
19659 EXIDX_CANTUNWIND markers are not relocated by the
19660 usual BFD method. */
19661 prel31_offset = (text_offset - exidx_offset)
19662 & 0x7ffffffful;
19663 if (bfd_link_relocatable (link_info))
19664 {
19665 /* Here relocation for new EXIDX_CANTUNWIND is
19666 created, so there is no need to
19667 adjust offset by hand. */
19668 prel31_offset = text_sec->output_offset
19669 + text_sec->size;
19670 }
19671
19672 /* First address we can't unwind. */
19673 bfd_put_32 (output_bfd, prel31_offset,
19674 &edited_contents[out_index * 8]);
19675
19676 /* Code for EXIDX_CANTUNWIND. */
19677 bfd_put_32 (output_bfd, 0x1,
19678 &edited_contents[out_index * 8 + 4]);
19679
19680 out_index++;
19681 add_to_offsets -= 8;
19682 }
19683 break;
19684 }
19685
19686 edit_node = edit_node->next;
19687 }
19688 }
19689 else
19690 {
19691 /* No more edits, copy remaining entries verbatim. */
19692 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
19693 contents + in_index * 8, add_to_offsets);
19694 out_index++;
19695 in_index++;
19696 }
19697 }
19698
19699 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
19700 bfd_set_section_contents (output_bfd, sec->output_section,
19701 edited_contents,
19702 (file_ptr) sec->output_offset, sec->size);
19703
19704 return TRUE;
19705 }
19706
19707 /* Fix code to point to Cortex-A8 erratum stubs. */
19708 if (globals->fix_cortex_a8)
19709 {
19710 struct a8_branch_to_stub_data data;
19711
19712 data.writing_section = sec;
19713 data.contents = contents;
19714
19715 bfd_hash_traverse (& globals->stub_hash_table, make_branch_to_a8_stub,
19716 & data);
19717 }
19718
19719 if (mapcount == 0)
19720 return FALSE;
19721
19722 if (globals->byteswap_code)
19723 {
19724 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
19725
19726 ptr = map[0].vma;
19727 for (i = 0; i < mapcount; i++)
19728 {
19729 if (i == mapcount - 1)
19730 end = sec->size;
19731 else
19732 end = map[i + 1].vma;
19733
19734 switch (map[i].type)
19735 {
19736 case 'a':
19737 /* Byte swap code words. */
19738 while (ptr + 3 < end)
19739 {
19740 tmp = contents[ptr];
19741 contents[ptr] = contents[ptr + 3];
19742 contents[ptr + 3] = tmp;
19743 tmp = contents[ptr + 1];
19744 contents[ptr + 1] = contents[ptr + 2];
19745 contents[ptr + 2] = tmp;
19746 ptr += 4;
19747 }
19748 break;
19749
19750 case 't':
19751 /* Byte swap code halfwords. */
19752 while (ptr + 1 < end)
19753 {
19754 tmp = contents[ptr];
19755 contents[ptr] = contents[ptr + 1];
19756 contents[ptr + 1] = tmp;
19757 ptr += 2;
19758 }
19759 break;
19760
19761 case 'd':
19762 /* Leave data alone. */
19763 break;
19764 }
19765 ptr = end;
19766 }
19767 }
19768
19769 free (map);
19770 arm_data->mapcount = -1;
19771 arm_data->mapsize = 0;
19772 arm_data->map = NULL;
19773
19774 return FALSE;
19775 }
19776
19777 /* Mangle thumb function symbols as we read them in. */
19778
19779 static bfd_boolean
19780 elf32_arm_swap_symbol_in (bfd * abfd,
19781 const void *psrc,
19782 const void *pshn,
19783 Elf_Internal_Sym *dst)
19784 {
19785 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
19786 return FALSE;
19787 dst->st_target_internal = 0;
19788
19789 /* New EABI objects mark thumb function symbols by setting the low bit of
19790 the address. */
19791 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
19792 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
19793 {
19794 if (dst->st_value & 1)
19795 {
19796 dst->st_value &= ~(bfd_vma) 1;
19797 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal,
19798 ST_BRANCH_TO_THUMB);
19799 }
19800 else
19801 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_ARM);
19802 }
19803 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
19804 {
19805 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
19806 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_THUMB);
19807 }
19808 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
19809 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_LONG);
19810 else
19811 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_UNKNOWN);
19812
19813 return TRUE;
19814 }
19815
19816
19817 /* Mangle thumb function symbols as we write them out. */
19818
19819 static void
19820 elf32_arm_swap_symbol_out (bfd *abfd,
19821 const Elf_Internal_Sym *src,
19822 void *cdst,
19823 void *shndx)
19824 {
19825 Elf_Internal_Sym newsym;
19826
19827 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
19828 of the address set, as per the new EABI. We do this unconditionally
19829 because objcopy does not set the elf header flags until after
19830 it writes out the symbol table. */
19831 if (ARM_GET_SYM_BRANCH_TYPE (src->st_target_internal) == ST_BRANCH_TO_THUMB)
19832 {
19833 newsym = *src;
19834 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
19835 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
19836 if (newsym.st_shndx != SHN_UNDEF)
19837 {
19838 /* Do this only for defined symbols. At link type, the static
19839 linker will simulate the work of dynamic linker of resolving
19840 symbols and will carry over the thumbness of found symbols to
19841 the output symbol table. It's not clear how it happens, but
19842 the thumbness of undefined symbols can well be different at
19843 runtime, and writing '1' for them will be confusing for users
19844 and possibly for dynamic linker itself.
19845 */
19846 newsym.st_value |= 1;
19847 }
19848
19849 src = &newsym;
19850 }
19851 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
19852 }
19853
19854 /* Add the PT_ARM_EXIDX program header. */
19855
19856 static bfd_boolean
19857 elf32_arm_modify_segment_map (bfd *abfd,
19858 struct bfd_link_info *info ATTRIBUTE_UNUSED)
19859 {
19860 struct elf_segment_map *m;
19861 asection *sec;
19862
19863 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
19864 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
19865 {
19866 /* If there is already a PT_ARM_EXIDX header, then we do not
19867 want to add another one. This situation arises when running
19868 "strip"; the input binary already has the header. */
19869 m = elf_seg_map (abfd);
19870 while (m && m->p_type != PT_ARM_EXIDX)
19871 m = m->next;
19872 if (!m)
19873 {
19874 m = (struct elf_segment_map *)
19875 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
19876 if (m == NULL)
19877 return FALSE;
19878 m->p_type = PT_ARM_EXIDX;
19879 m->count = 1;
19880 m->sections[0] = sec;
19881
19882 m->next = elf_seg_map (abfd);
19883 elf_seg_map (abfd) = m;
19884 }
19885 }
19886
19887 return TRUE;
19888 }
19889
19890 /* We may add a PT_ARM_EXIDX program header. */
19891
19892 static int
19893 elf32_arm_additional_program_headers (bfd *abfd,
19894 struct bfd_link_info *info ATTRIBUTE_UNUSED)
19895 {
19896 asection *sec;
19897
19898 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
19899 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
19900 return 1;
19901 else
19902 return 0;
19903 }
19904
19905 /* Hook called by the linker routine which adds symbols from an object
19906 file. */
19907
19908 static bfd_boolean
19909 elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
19910 Elf_Internal_Sym *sym, const char **namep,
19911 flagword *flagsp, asection **secp, bfd_vma *valp)
19912 {
19913 if (elf32_arm_hash_table (info) == NULL)
19914 return FALSE;
19915
19916 if (elf32_arm_hash_table (info)->root.target_os == is_vxworks
19917 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
19918 flagsp, secp, valp))
19919 return FALSE;
19920
19921 return TRUE;
19922 }
19923
19924 /* We use this to override swap_symbol_in and swap_symbol_out. */
19925 const struct elf_size_info elf32_arm_size_info =
19926 {
19927 sizeof (Elf32_External_Ehdr),
19928 sizeof (Elf32_External_Phdr),
19929 sizeof (Elf32_External_Shdr),
19930 sizeof (Elf32_External_Rel),
19931 sizeof (Elf32_External_Rela),
19932 sizeof (Elf32_External_Sym),
19933 sizeof (Elf32_External_Dyn),
19934 sizeof (Elf_External_Note),
19935 4,
19936 1,
19937 32, 2,
19938 ELFCLASS32, EV_CURRENT,
19939 bfd_elf32_write_out_phdrs,
19940 bfd_elf32_write_shdrs_and_ehdr,
19941 bfd_elf32_checksum_contents,
19942 bfd_elf32_write_relocs,
19943 elf32_arm_swap_symbol_in,
19944 elf32_arm_swap_symbol_out,
19945 bfd_elf32_slurp_reloc_table,
19946 bfd_elf32_slurp_symbol_table,
19947 bfd_elf32_swap_dyn_in,
19948 bfd_elf32_swap_dyn_out,
19949 bfd_elf32_swap_reloc_in,
19950 bfd_elf32_swap_reloc_out,
19951 bfd_elf32_swap_reloca_in,
19952 bfd_elf32_swap_reloca_out
19953 };
19954
19955 static bfd_vma
19956 read_code32 (const bfd *abfd, const bfd_byte *addr)
19957 {
19958 /* V7 BE8 code is always little endian. */
19959 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
19960 return bfd_getl32 (addr);
19961
19962 return bfd_get_32 (abfd, addr);
19963 }
19964
19965 static bfd_vma
19966 read_code16 (const bfd *abfd, const bfd_byte *addr)
19967 {
19968 /* V7 BE8 code is always little endian. */
19969 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
19970 return bfd_getl16 (addr);
19971
19972 return bfd_get_16 (abfd, addr);
19973 }
19974
19975 /* Return size of plt0 entry starting at ADDR
19976 or (bfd_vma) -1 if size can not be determined. */
19977
19978 static bfd_vma
19979 elf32_arm_plt0_size (const bfd *abfd, const bfd_byte *addr)
19980 {
19981 bfd_vma first_word;
19982 bfd_vma plt0_size;
19983
19984 first_word = read_code32 (abfd, addr);
19985
19986 if (first_word == elf32_arm_plt0_entry[0])
19987 plt0_size = 4 * ARRAY_SIZE (elf32_arm_plt0_entry);
19988 else if (first_word == elf32_thumb2_plt0_entry[0])
19989 plt0_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
19990 else
19991 /* We don't yet handle this PLT format. */
19992 return (bfd_vma) -1;
19993
19994 return plt0_size;
19995 }
19996
19997 /* Return size of plt entry starting at offset OFFSET
19998 of plt section located at address START
19999 or (bfd_vma) -1 if size can not be determined. */
20000
20001 static bfd_vma
20002 elf32_arm_plt_size (const bfd *abfd, const bfd_byte *start, bfd_vma offset)
20003 {
20004 bfd_vma first_insn;
20005 bfd_vma plt_size = 0;
20006 const bfd_byte *addr = start + offset;
20007
20008 /* PLT entry size if fixed on Thumb-only platforms. */
20009 if (read_code32 (abfd, start) == elf32_thumb2_plt0_entry[0])
20010 return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
20011
20012 /* Respect Thumb stub if necessary. */
20013 if (read_code16 (abfd, addr) == elf32_arm_plt_thumb_stub[0])
20014 {
20015 plt_size += 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub);
20016 }
20017
20018 /* Strip immediate from first add. */
20019 first_insn = read_code32 (abfd, addr + plt_size) & 0xffffff00;
20020
20021 #ifdef FOUR_WORD_PLT
20022 if (first_insn == elf32_arm_plt_entry[0])
20023 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry);
20024 #else
20025 if (first_insn == elf32_arm_plt_entry_long[0])
20026 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_long);
20027 else if (first_insn == elf32_arm_plt_entry_short[0])
20028 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_short);
20029 #endif
20030 else
20031 /* We don't yet handle this PLT format. */
20032 return (bfd_vma) -1;
20033
20034 return plt_size;
20035 }
20036
20037 /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */
20038
20039 static long
20040 elf32_arm_get_synthetic_symtab (bfd *abfd,
20041 long symcount ATTRIBUTE_UNUSED,
20042 asymbol **syms ATTRIBUTE_UNUSED,
20043 long dynsymcount,
20044 asymbol **dynsyms,
20045 asymbol **ret)
20046 {
20047 asection *relplt;
20048 asymbol *s;
20049 arelent *p;
20050 long count, i, n;
20051 size_t size;
20052 Elf_Internal_Shdr *hdr;
20053 char *names;
20054 asection *plt;
20055 bfd_vma offset;
20056 bfd_byte *data;
20057
20058 *ret = NULL;
20059
20060 if ((abfd->flags & (DYNAMIC | EXEC_P)) == 0)
20061 return 0;
20062
20063 if (dynsymcount <= 0)
20064 return 0;
20065
20066 relplt = bfd_get_section_by_name (abfd, ".rel.plt");
20067 if (relplt == NULL)
20068 return 0;
20069
20070 hdr = &elf_section_data (relplt)->this_hdr;
20071 if (hdr->sh_link != elf_dynsymtab (abfd)
20072 || (hdr->sh_type != SHT_REL && hdr->sh_type != SHT_RELA))
20073 return 0;
20074
20075 plt = bfd_get_section_by_name (abfd, ".plt");
20076 if (plt == NULL)
20077 return 0;
20078
20079 if (!elf32_arm_size_info.slurp_reloc_table (abfd, relplt, dynsyms, TRUE))
20080 return -1;
20081
20082 data = plt->contents;
20083 if (data == NULL)
20084 {
20085 if (!bfd_get_full_section_contents(abfd, (asection *) plt, &data) || data == NULL)
20086 return -1;
20087 bfd_cache_section_contents((asection *) plt, data);
20088 }
20089
20090 count = relplt->size / hdr->sh_entsize;
20091 size = count * sizeof (asymbol);
20092 p = relplt->relocation;
20093 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
20094 {
20095 size += strlen ((*p->sym_ptr_ptr)->name) + sizeof ("@plt");
20096 if (p->addend != 0)
20097 size += sizeof ("+0x") - 1 + 8;
20098 }
20099
20100 s = *ret = (asymbol *) bfd_malloc (size);
20101 if (s == NULL)
20102 return -1;
20103
20104 offset = elf32_arm_plt0_size (abfd, data);
20105 if (offset == (bfd_vma) -1)
20106 return -1;
20107
20108 names = (char *) (s + count);
20109 p = relplt->relocation;
20110 n = 0;
20111 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
20112 {
20113 size_t len;
20114
20115 bfd_vma plt_size = elf32_arm_plt_size (abfd, data, offset);
20116 if (plt_size == (bfd_vma) -1)
20117 break;
20118
20119 *s = **p->sym_ptr_ptr;
20120 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
20121 we are defining a symbol, ensure one of them is set. */
20122 if ((s->flags & BSF_LOCAL) == 0)
20123 s->flags |= BSF_GLOBAL;
20124 s->flags |= BSF_SYNTHETIC;
20125 s->section = plt;
20126 s->value = offset;
20127 s->name = names;
20128 s->udata.p = NULL;
20129 len = strlen ((*p->sym_ptr_ptr)->name);
20130 memcpy (names, (*p->sym_ptr_ptr)->name, len);
20131 names += len;
20132 if (p->addend != 0)
20133 {
20134 char buf[30], *a;
20135
20136 memcpy (names, "+0x", sizeof ("+0x") - 1);
20137 names += sizeof ("+0x") - 1;
20138 bfd_sprintf_vma (abfd, buf, p->addend);
20139 for (a = buf; *a == '0'; ++a)
20140 ;
20141 len = strlen (a);
20142 memcpy (names, a, len);
20143 names += len;
20144 }
20145 memcpy (names, "@plt", sizeof ("@plt"));
20146 names += sizeof ("@plt");
20147 ++s, ++n;
20148 offset += plt_size;
20149 }
20150
20151 return n;
20152 }
20153
20154 static bfd_boolean
20155 elf32_arm_section_flags (const Elf_Internal_Shdr *hdr)
20156 {
20157 if (hdr->sh_flags & SHF_ARM_PURECODE)
20158 hdr->bfd_section->flags |= SEC_ELF_PURECODE;
20159 return TRUE;
20160 }
20161
20162 static flagword
20163 elf32_arm_lookup_section_flags (char *flag_name)
20164 {
20165 if (!strcmp (flag_name, "SHF_ARM_PURECODE"))
20166 return SHF_ARM_PURECODE;
20167
20168 return SEC_NO_FLAGS;
20169 }
20170
20171 static unsigned int
20172 elf32_arm_count_additional_relocs (asection *sec)
20173 {
20174 struct _arm_elf_section_data *arm_data;
20175 arm_data = get_arm_elf_section_data (sec);
20176
20177 return arm_data == NULL ? 0 : arm_data->additional_reloc_count;
20178 }
20179
20180 /* Called to set the sh_flags, sh_link and sh_info fields of OSECTION which
20181 has a type >= SHT_LOOS. Returns TRUE if these fields were initialised
20182 FALSE otherwise. ISECTION is the best guess matching section from the
20183 input bfd IBFD, but it might be NULL. */
20184
20185 static bfd_boolean
20186 elf32_arm_copy_special_section_fields (const bfd *ibfd ATTRIBUTE_UNUSED,
20187 bfd *obfd ATTRIBUTE_UNUSED,
20188 const Elf_Internal_Shdr *isection ATTRIBUTE_UNUSED,
20189 Elf_Internal_Shdr *osection)
20190 {
20191 switch (osection->sh_type)
20192 {
20193 case SHT_ARM_EXIDX:
20194 {
20195 Elf_Internal_Shdr **oheaders = elf_elfsections (obfd);
20196 Elf_Internal_Shdr **iheaders = elf_elfsections (ibfd);
20197 unsigned i = 0;
20198
20199 osection->sh_flags = SHF_ALLOC | SHF_LINK_ORDER;
20200 osection->sh_info = 0;
20201
20202 /* The sh_link field must be set to the text section associated with
20203 this index section. Unfortunately the ARM EHABI does not specify
20204 exactly how to determine this association. Our caller does try
20205 to match up OSECTION with its corresponding input section however
20206 so that is a good first guess. */
20207 if (isection != NULL
20208 && osection->bfd_section != NULL
20209 && isection->bfd_section != NULL
20210 && isection->bfd_section->output_section != NULL
20211 && isection->bfd_section->output_section == osection->bfd_section
20212 && iheaders != NULL
20213 && isection->sh_link > 0
20214 && isection->sh_link < elf_numsections (ibfd)
20215 && iheaders[isection->sh_link]->bfd_section != NULL
20216 && iheaders[isection->sh_link]->bfd_section->output_section != NULL
20217 )
20218 {
20219 for (i = elf_numsections (obfd); i-- > 0;)
20220 if (oheaders[i]->bfd_section
20221 == iheaders[isection->sh_link]->bfd_section->output_section)
20222 break;
20223 }
20224
20225 if (i == 0)
20226 {
20227 /* Failing that we have to find a matching section ourselves. If
20228 we had the output section name available we could compare that
20229 with input section names. Unfortunately we don't. So instead
20230 we use a simple heuristic and look for the nearest executable
20231 section before this one. */
20232 for (i = elf_numsections (obfd); i-- > 0;)
20233 if (oheaders[i] == osection)
20234 break;
20235 if (i == 0)
20236 break;
20237
20238 while (i-- > 0)
20239 if (oheaders[i]->sh_type == SHT_PROGBITS
20240 && (oheaders[i]->sh_flags & (SHF_ALLOC | SHF_EXECINSTR))
20241 == (SHF_ALLOC | SHF_EXECINSTR))
20242 break;
20243 }
20244
20245 if (i)
20246 {
20247 osection->sh_link = i;
20248 /* If the text section was part of a group
20249 then the index section should be too. */
20250 if (oheaders[i]->sh_flags & SHF_GROUP)
20251 osection->sh_flags |= SHF_GROUP;
20252 return TRUE;
20253 }
20254 }
20255 break;
20256
20257 case SHT_ARM_PREEMPTMAP:
20258 osection->sh_flags = SHF_ALLOC;
20259 break;
20260
20261 case SHT_ARM_ATTRIBUTES:
20262 case SHT_ARM_DEBUGOVERLAY:
20263 case SHT_ARM_OVERLAYSECTION:
20264 default:
20265 break;
20266 }
20267
20268 return FALSE;
20269 }
20270
20271 /* Returns TRUE if NAME is an ARM mapping symbol.
20272 Traditionally the symbols $a, $d and $t have been used.
20273 The ARM ELF standard also defines $x (for A64 code). It also allows a
20274 period initiated suffix to be added to the symbol: "$[adtx]\.[:sym_char]+".
20275 Other tools might also produce $b (Thumb BL), $f, $p, $m and $v, but we do
20276 not support them here. $t.x indicates the start of ThumbEE instructions. */
20277
20278 static bfd_boolean
20279 is_arm_mapping_symbol (const char * name)
20280 {
20281 return name != NULL /* Paranoia. */
20282 && name[0] == '$' /* Note: if objcopy --prefix-symbols has been used then
20283 the mapping symbols could have acquired a prefix.
20284 We do not support this here, since such symbols no
20285 longer conform to the ARM ELF ABI. */
20286 && (name[1] == 'a' || name[1] == 'd' || name[1] == 't' || name[1] == 'x')
20287 && (name[2] == 0 || name[2] == '.');
20288 /* FIXME: Strictly speaking the symbol is only a valid mapping symbol if
20289 any characters that follow the period are legal characters for the body
20290 of a symbol's name. For now we just assume that this is the case. */
20291 }
20292
20293 /* Make sure that mapping symbols in object files are not removed via the
20294 "strip --strip-unneeded" tool. These symbols are needed in order to
20295 correctly generate interworking veneers, and for byte swapping code
20296 regions. Once an object file has been linked, it is safe to remove the
20297 symbols as they will no longer be needed. */
20298
20299 static void
20300 elf32_arm_backend_symbol_processing (bfd *abfd, asymbol *sym)
20301 {
20302 if (((abfd->flags & (EXEC_P | DYNAMIC)) == 0)
20303 && sym->section != bfd_abs_section_ptr
20304 && is_arm_mapping_symbol (sym->name))
20305 sym->flags |= BSF_KEEP;
20306 }
20307
20308 #undef elf_backend_copy_special_section_fields
20309 #define elf_backend_copy_special_section_fields elf32_arm_copy_special_section_fields
20310
20311 #define ELF_ARCH bfd_arch_arm
20312 #define ELF_TARGET_ID ARM_ELF_DATA
20313 #define ELF_MACHINE_CODE EM_ARM
20314 #ifdef __QNXTARGET__
20315 #define ELF_MAXPAGESIZE 0x1000
20316 #else
20317 #define ELF_MAXPAGESIZE 0x10000
20318 #endif
20319 #define ELF_MINPAGESIZE 0x1000
20320 #define ELF_COMMONPAGESIZE 0x1000
20321
20322 #define bfd_elf32_mkobject elf32_arm_mkobject
20323
20324 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
20325 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
20326 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
20327 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
20328 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
20329 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
20330 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
20331 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
20332 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
20333 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
20334 #define bfd_elf32_bfd_final_link elf32_arm_final_link
20335 #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab
20336
20337 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
20338 #define elf_backend_maybe_function_sym elf32_arm_maybe_function_sym
20339 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
20340 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
20341 #define elf_backend_check_relocs elf32_arm_check_relocs
20342 #define elf_backend_update_relocs elf32_arm_update_relocs
20343 #define elf_backend_relocate_section elf32_arm_relocate_section
20344 #define elf_backend_write_section elf32_arm_write_section
20345 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
20346 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
20347 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
20348 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
20349 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
20350 #define elf_backend_always_size_sections elf32_arm_always_size_sections
20351 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
20352 #define elf_backend_init_file_header elf32_arm_init_file_header
20353 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
20354 #define elf_backend_object_p elf32_arm_object_p
20355 #define elf_backend_fake_sections elf32_arm_fake_sections
20356 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
20357 #define elf_backend_final_write_processing elf32_arm_final_write_processing
20358 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
20359 #define elf_backend_size_info elf32_arm_size_info
20360 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
20361 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
20362 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
20363 #define elf_backend_filter_implib_symbols elf32_arm_filter_implib_symbols
20364 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
20365 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
20366 #define elf_backend_count_additional_relocs elf32_arm_count_additional_relocs
20367 #define elf_backend_symbol_processing elf32_arm_backend_symbol_processing
20368
20369 #define elf_backend_can_refcount 1
20370 #define elf_backend_can_gc_sections 1
20371 #define elf_backend_plt_readonly 1
20372 #define elf_backend_want_got_plt 1
20373 #define elf_backend_want_plt_sym 0
20374 #define elf_backend_want_dynrelro 1
20375 #define elf_backend_may_use_rel_p 1
20376 #define elf_backend_may_use_rela_p 0
20377 #define elf_backend_default_use_rela_p 0
20378 #define elf_backend_dtrel_excludes_plt 1
20379
20380 #define elf_backend_got_header_size 12
20381 #define elf_backend_extern_protected_data 1
20382
20383 #undef elf_backend_obj_attrs_vendor
20384 #define elf_backend_obj_attrs_vendor "aeabi"
20385 #undef elf_backend_obj_attrs_section
20386 #define elf_backend_obj_attrs_section ".ARM.attributes"
20387 #undef elf_backend_obj_attrs_arg_type
20388 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
20389 #undef elf_backend_obj_attrs_section_type
20390 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
20391 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
20392 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
20393
20394 #undef elf_backend_section_flags
20395 #define elf_backend_section_flags elf32_arm_section_flags
20396 #undef elf_backend_lookup_section_flags_hook
20397 #define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags
20398
20399 #define elf_backend_linux_prpsinfo32_ugid16 TRUE
20400
20401 #include "elf32-target.h"
20402
20403 /* Native Client targets. */
20404
20405 #undef TARGET_LITTLE_SYM
20406 #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec
20407 #undef TARGET_LITTLE_NAME
20408 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
20409 #undef TARGET_BIG_SYM
20410 #define TARGET_BIG_SYM arm_elf32_nacl_be_vec
20411 #undef TARGET_BIG_NAME
20412 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
20413
20414 /* Like elf32_arm_link_hash_table_create -- but overrides
20415 appropriately for NaCl. */
20416
20417 static struct bfd_link_hash_table *
20418 elf32_arm_nacl_link_hash_table_create (bfd *abfd)
20419 {
20420 struct bfd_link_hash_table *ret;
20421
20422 ret = elf32_arm_link_hash_table_create (abfd);
20423 if (ret)
20424 {
20425 struct elf32_arm_link_hash_table *htab
20426 = (struct elf32_arm_link_hash_table *) ret;
20427
20428 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
20429 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
20430 }
20431 return ret;
20432 }
20433
20434 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
20435 really need to use elf32_arm_modify_segment_map. But we do it
20436 anyway just to reduce gratuitous differences with the stock ARM backend. */
20437
20438 static bfd_boolean
20439 elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
20440 {
20441 return (elf32_arm_modify_segment_map (abfd, info)
20442 && nacl_modify_segment_map (abfd, info));
20443 }
20444
20445 static bfd_boolean
20446 elf32_arm_nacl_final_write_processing (bfd *abfd)
20447 {
20448 arm_final_write_processing (abfd);
20449 return nacl_final_write_processing (abfd);
20450 }
20451
20452 static bfd_vma
20453 elf32_arm_nacl_plt_sym_val (bfd_vma i, const asection *plt,
20454 const arelent *rel ATTRIBUTE_UNUSED)
20455 {
20456 return plt->vma
20457 + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry) +
20458 i * ARRAY_SIZE (elf32_arm_nacl_plt_entry));
20459 }
20460
20461 #undef elf32_bed
20462 #define elf32_bed elf32_arm_nacl_bed
20463 #undef bfd_elf32_bfd_link_hash_table_create
20464 #define bfd_elf32_bfd_link_hash_table_create \
20465 elf32_arm_nacl_link_hash_table_create
20466 #undef elf_backend_plt_alignment
20467 #define elf_backend_plt_alignment 4
20468 #undef elf_backend_modify_segment_map
20469 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
20470 #undef elf_backend_modify_headers
20471 #define elf_backend_modify_headers nacl_modify_headers
20472 #undef elf_backend_final_write_processing
20473 #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
20474 #undef bfd_elf32_get_synthetic_symtab
20475 #undef elf_backend_plt_sym_val
20476 #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
20477 #undef elf_backend_copy_special_section_fields
20478
20479 #undef ELF_MINPAGESIZE
20480 #undef ELF_COMMONPAGESIZE
20481
20482 #undef ELF_TARGET_OS
20483 #define ELF_TARGET_OS is_nacl
20484
20485 #include "elf32-target.h"
20486
20487 /* Reset to defaults. */
20488 #undef elf_backend_plt_alignment
20489 #undef elf_backend_modify_segment_map
20490 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
20491 #undef elf_backend_modify_headers
20492 #undef elf_backend_final_write_processing
20493 #define elf_backend_final_write_processing elf32_arm_final_write_processing
20494 #undef ELF_MINPAGESIZE
20495 #define ELF_MINPAGESIZE 0x1000
20496 #undef ELF_COMMONPAGESIZE
20497 #define ELF_COMMONPAGESIZE 0x1000
20498
20499
20500 /* FDPIC Targets. */
20501
20502 #undef TARGET_LITTLE_SYM
20503 #define TARGET_LITTLE_SYM arm_elf32_fdpic_le_vec
20504 #undef TARGET_LITTLE_NAME
20505 #define TARGET_LITTLE_NAME "elf32-littlearm-fdpic"
20506 #undef TARGET_BIG_SYM
20507 #define TARGET_BIG_SYM arm_elf32_fdpic_be_vec
20508 #undef TARGET_BIG_NAME
20509 #define TARGET_BIG_NAME "elf32-bigarm-fdpic"
20510 #undef elf_match_priority
20511 #define elf_match_priority 128
20512 #undef ELF_OSABI
20513 #define ELF_OSABI ELFOSABI_ARM_FDPIC
20514
20515 /* Like elf32_arm_link_hash_table_create -- but overrides
20516 appropriately for FDPIC. */
20517
20518 static struct bfd_link_hash_table *
20519 elf32_arm_fdpic_link_hash_table_create (bfd *abfd)
20520 {
20521 struct bfd_link_hash_table *ret;
20522
20523 ret = elf32_arm_link_hash_table_create (abfd);
20524 if (ret)
20525 {
20526 struct elf32_arm_link_hash_table *htab = (struct elf32_arm_link_hash_table *) ret;
20527
20528 htab->fdpic_p = 1;
20529 }
20530 return ret;
20531 }
20532
20533 /* We need dynamic symbols for every section, since segments can
20534 relocate independently. */
20535 static bfd_boolean
20536 elf32_arm_fdpic_omit_section_dynsym (bfd *output_bfd ATTRIBUTE_UNUSED,
20537 struct bfd_link_info *info
20538 ATTRIBUTE_UNUSED,
20539 asection *p ATTRIBUTE_UNUSED)
20540 {
20541 switch (elf_section_data (p)->this_hdr.sh_type)
20542 {
20543 case SHT_PROGBITS:
20544 case SHT_NOBITS:
20545 /* If sh_type is yet undecided, assume it could be
20546 SHT_PROGBITS/SHT_NOBITS. */
20547 case SHT_NULL:
20548 return FALSE;
20549
20550 /* There shouldn't be section relative relocations
20551 against any other section. */
20552 default:
20553 return TRUE;
20554 }
20555 }
20556
20557 #undef elf32_bed
20558 #define elf32_bed elf32_arm_fdpic_bed
20559
20560 #undef bfd_elf32_bfd_link_hash_table_create
20561 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_fdpic_link_hash_table_create
20562
20563 #undef elf_backend_omit_section_dynsym
20564 #define elf_backend_omit_section_dynsym elf32_arm_fdpic_omit_section_dynsym
20565
20566 #undef ELF_TARGET_OS
20567
20568 #include "elf32-target.h"
20569
20570 #undef elf_match_priority
20571 #undef ELF_OSABI
20572 #undef elf_backend_omit_section_dynsym
20573
20574 /* VxWorks Targets. */
20575
20576 #undef TARGET_LITTLE_SYM
20577 #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec
20578 #undef TARGET_LITTLE_NAME
20579 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
20580 #undef TARGET_BIG_SYM
20581 #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec
20582 #undef TARGET_BIG_NAME
20583 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
20584
20585 /* Like elf32_arm_link_hash_table_create -- but overrides
20586 appropriately for VxWorks. */
20587
20588 static struct bfd_link_hash_table *
20589 elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
20590 {
20591 struct bfd_link_hash_table *ret;
20592
20593 ret = elf32_arm_link_hash_table_create (abfd);
20594 if (ret)
20595 {
20596 struct elf32_arm_link_hash_table *htab
20597 = (struct elf32_arm_link_hash_table *) ret;
20598 htab->use_rel = 0;
20599 }
20600 return ret;
20601 }
20602
20603 static bfd_boolean
20604 elf32_arm_vxworks_final_write_processing (bfd *abfd)
20605 {
20606 arm_final_write_processing (abfd);
20607 return elf_vxworks_final_write_processing (abfd);
20608 }
20609
20610 #undef elf32_bed
20611 #define elf32_bed elf32_arm_vxworks_bed
20612
20613 #undef bfd_elf32_bfd_link_hash_table_create
20614 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
20615 #undef elf_backend_final_write_processing
20616 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
20617 #undef elf_backend_emit_relocs
20618 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
20619
20620 #undef elf_backend_may_use_rel_p
20621 #define elf_backend_may_use_rel_p 0
20622 #undef elf_backend_may_use_rela_p
20623 #define elf_backend_may_use_rela_p 1
20624 #undef elf_backend_default_use_rela_p
20625 #define elf_backend_default_use_rela_p 1
20626 #undef elf_backend_want_plt_sym
20627 #define elf_backend_want_plt_sym 1
20628 #undef ELF_MAXPAGESIZE
20629 #define ELF_MAXPAGESIZE 0x1000
20630 #undef ELF_TARGET_OS
20631 #define ELF_TARGET_OS is_vxworks
20632
20633 #include "elf32-target.h"
20634
20635
20636 /* Merge backend specific data from an object file to the output
20637 object file when linking. */
20638
20639 static bfd_boolean
20640 elf32_arm_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
20641 {
20642 bfd *obfd = info->output_bfd;
20643 flagword out_flags;
20644 flagword in_flags;
20645 bfd_boolean flags_compatible = TRUE;
20646 asection *sec;
20647
20648 /* Check if we have the same endianness. */
20649 if (! _bfd_generic_verify_endian_match (ibfd, info))
20650 return FALSE;
20651
20652 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
20653 return TRUE;
20654
20655 if (!elf32_arm_merge_eabi_attributes (ibfd, info))
20656 return FALSE;
20657
20658 /* The input BFD must have had its flags initialised. */
20659 /* The following seems bogus to me -- The flags are initialized in
20660 the assembler but I don't think an elf_flags_init field is
20661 written into the object. */
20662 /* BFD_ASSERT (elf_flags_init (ibfd)); */
20663
20664 in_flags = elf_elfheader (ibfd)->e_flags;
20665 out_flags = elf_elfheader (obfd)->e_flags;
20666
20667 /* In theory there is no reason why we couldn't handle this. However
20668 in practice it isn't even close to working and there is no real
20669 reason to want it. */
20670 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
20671 && !(ibfd->flags & DYNAMIC)
20672 && (in_flags & EF_ARM_BE8))
20673 {
20674 _bfd_error_handler (_("error: %pB is already in final BE8 format"),
20675 ibfd);
20676 return FALSE;
20677 }
20678
20679 if (!elf_flags_init (obfd))
20680 {
20681 /* If the input is the default architecture and had the default
20682 flags then do not bother setting the flags for the output
20683 architecture, instead allow future merges to do this. If no
20684 future merges ever set these flags then they will retain their
20685 uninitialised values, which surprise surprise, correspond
20686 to the default values. */
20687 if (bfd_get_arch_info (ibfd)->the_default
20688 && elf_elfheader (ibfd)->e_flags == 0)
20689 return TRUE;
20690
20691 elf_flags_init (obfd) = TRUE;
20692 elf_elfheader (obfd)->e_flags = in_flags;
20693
20694 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
20695 && bfd_get_arch_info (obfd)->the_default)
20696 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
20697
20698 return TRUE;
20699 }
20700
20701 /* Determine what should happen if the input ARM architecture
20702 does not match the output ARM architecture. */
20703 if (! bfd_arm_merge_machines (ibfd, obfd))
20704 return FALSE;
20705
20706 /* Identical flags must be compatible. */
20707 if (in_flags == out_flags)
20708 return TRUE;
20709
20710 /* Check to see if the input BFD actually contains any sections. If
20711 not, its flags may not have been initialised either, but it
20712 cannot actually cause any incompatiblity. Do not short-circuit
20713 dynamic objects; their section list may be emptied by
20714 elf_link_add_object_symbols.
20715
20716 Also check to see if there are no code sections in the input.
20717 In this case there is no need to check for code specific flags.
20718 XXX - do we need to worry about floating-point format compatability
20719 in data sections ? */
20720 if (!(ibfd->flags & DYNAMIC))
20721 {
20722 bfd_boolean null_input_bfd = TRUE;
20723 bfd_boolean only_data_sections = TRUE;
20724
20725 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
20726 {
20727 /* Ignore synthetic glue sections. */
20728 if (strcmp (sec->name, ".glue_7")
20729 && strcmp (sec->name, ".glue_7t"))
20730 {
20731 if ((bfd_section_flags (sec)
20732 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
20733 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
20734 only_data_sections = FALSE;
20735
20736 null_input_bfd = FALSE;
20737 break;
20738 }
20739 }
20740
20741 if (null_input_bfd || only_data_sections)
20742 return TRUE;
20743 }
20744
20745 /* Complain about various flag mismatches. */
20746 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
20747 EF_ARM_EABI_VERSION (out_flags)))
20748 {
20749 _bfd_error_handler
20750 (_("error: source object %pB has EABI version %d, but target %pB has EABI version %d"),
20751 ibfd, (in_flags & EF_ARM_EABIMASK) >> 24,
20752 obfd, (out_flags & EF_ARM_EABIMASK) >> 24);
20753 return FALSE;
20754 }
20755
20756 /* Not sure what needs to be checked for EABI versions >= 1. */
20757 /* VxWorks libraries do not use these flags. */
20758 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
20759 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
20760 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
20761 {
20762 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
20763 {
20764 _bfd_error_handler
20765 (_("error: %pB is compiled for APCS-%d, whereas target %pB uses APCS-%d"),
20766 ibfd, in_flags & EF_ARM_APCS_26 ? 26 : 32,
20767 obfd, out_flags & EF_ARM_APCS_26 ? 26 : 32);
20768 flags_compatible = FALSE;
20769 }
20770
20771 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
20772 {
20773 if (in_flags & EF_ARM_APCS_FLOAT)
20774 _bfd_error_handler
20775 (_("error: %pB passes floats in float registers, whereas %pB passes them in integer registers"),
20776 ibfd, obfd);
20777 else
20778 _bfd_error_handler
20779 (_("error: %pB passes floats in integer registers, whereas %pB passes them in float registers"),
20780 ibfd, obfd);
20781
20782 flags_compatible = FALSE;
20783 }
20784
20785 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
20786 {
20787 if (in_flags & EF_ARM_VFP_FLOAT)
20788 _bfd_error_handler
20789 (_("error: %pB uses %s instructions, whereas %pB does not"),
20790 ibfd, "VFP", obfd);
20791 else
20792 _bfd_error_handler
20793 (_("error: %pB uses %s instructions, whereas %pB does not"),
20794 ibfd, "FPA", obfd);
20795
20796 flags_compatible = FALSE;
20797 }
20798
20799 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
20800 {
20801 if (in_flags & EF_ARM_MAVERICK_FLOAT)
20802 _bfd_error_handler
20803 (_("error: %pB uses %s instructions, whereas %pB does not"),
20804 ibfd, "Maverick", obfd);
20805 else
20806 _bfd_error_handler
20807 (_("error: %pB does not use %s instructions, whereas %pB does"),
20808 ibfd, "Maverick", obfd);
20809
20810 flags_compatible = FALSE;
20811 }
20812
20813 #ifdef EF_ARM_SOFT_FLOAT
20814 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
20815 {
20816 /* We can allow interworking between code that is VFP format
20817 layout, and uses either soft float or integer regs for
20818 passing floating point arguments and results. We already
20819 know that the APCS_FLOAT flags match; similarly for VFP
20820 flags. */
20821 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
20822 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
20823 {
20824 if (in_flags & EF_ARM_SOFT_FLOAT)
20825 _bfd_error_handler
20826 (_("error: %pB uses software FP, whereas %pB uses hardware FP"),
20827 ibfd, obfd);
20828 else
20829 _bfd_error_handler
20830 (_("error: %pB uses hardware FP, whereas %pB uses software FP"),
20831 ibfd, obfd);
20832
20833 flags_compatible = FALSE;
20834 }
20835 }
20836 #endif
20837
20838 /* Interworking mismatch is only a warning. */
20839 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
20840 {
20841 if (in_flags & EF_ARM_INTERWORK)
20842 {
20843 _bfd_error_handler
20844 (_("warning: %pB supports interworking, whereas %pB does not"),
20845 ibfd, obfd);
20846 }
20847 else
20848 {
20849 _bfd_error_handler
20850 (_("warning: %pB does not support interworking, whereas %pB does"),
20851 ibfd, obfd);
20852 }
20853 }
20854 }
20855
20856 return flags_compatible;
20857 }
20858
20859
20860 /* Symbian OS Targets. */
20861
20862 #undef TARGET_LITTLE_SYM
20863 #define TARGET_LITTLE_SYM arm_elf32_symbian_le_vec
20864 #undef TARGET_LITTLE_NAME
20865 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
20866 #undef TARGET_BIG_SYM
20867 #define TARGET_BIG_SYM arm_elf32_symbian_be_vec
20868 #undef TARGET_BIG_NAME
20869 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
20870
20871 /* Like elf32_arm_link_hash_table_create -- but overrides
20872 appropriately for Symbian OS. */
20873
20874 static struct bfd_link_hash_table *
20875 elf32_arm_symbian_link_hash_table_create (bfd *abfd)
20876 {
20877 struct bfd_link_hash_table *ret;
20878
20879 ret = elf32_arm_link_hash_table_create (abfd);
20880 if (ret)
20881 {
20882 struct elf32_arm_link_hash_table *htab
20883 = (struct elf32_arm_link_hash_table *)ret;
20884 /* There is no PLT header for Symbian OS. */
20885 htab->plt_header_size = 0;
20886 /* The PLT entries are each one instruction and one word. */
20887 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
20888 /* Symbian uses armv5t or above, so use_blx is always true. */
20889 htab->use_blx = 1;
20890 htab->root.is_relocatable_executable = 1;
20891 }
20892 return ret;
20893 }
20894
20895 static const struct bfd_elf_special_section
20896 elf32_arm_symbian_special_sections[] =
20897 {
20898 /* In a BPABI executable, the dynamic linking sections do not go in
20899 the loadable read-only segment. The post-linker may wish to
20900 refer to these sections, but they are not part of the final
20901 program image. */
20902 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
20903 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
20904 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
20905 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
20906 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
20907 /* These sections do not need to be writable as the SymbianOS
20908 postlinker will arrange things so that no dynamic relocation is
20909 required. */
20910 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
20911 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
20912 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
20913 { NULL, 0, 0, 0, 0 }
20914 };
20915
20916 static void
20917 elf32_arm_symbian_begin_write_processing (bfd *abfd,
20918 struct bfd_link_info *link_info)
20919 {
20920 /* BPABI objects are never loaded directly by an OS kernel; they are
20921 processed by a postlinker first, into an OS-specific format. If
20922 the D_PAGED bit is set on the file, BFD will align segments on
20923 page boundaries, so that an OS can directly map the file. With
20924 BPABI objects, that just results in wasted space. In addition,
20925 because we clear the D_PAGED bit, map_sections_to_segments will
20926 recognize that the program headers should not be mapped into any
20927 loadable segment. */
20928 abfd->flags &= ~D_PAGED;
20929 elf32_arm_begin_write_processing (abfd, link_info);
20930 }
20931
20932 static bfd_boolean
20933 elf32_arm_symbian_modify_segment_map (bfd *abfd,
20934 struct bfd_link_info *info)
20935 {
20936 struct elf_segment_map *m;
20937 asection *dynsec;
20938
20939 /* BPABI shared libraries and executables should have a PT_DYNAMIC
20940 segment. However, because the .dynamic section is not marked
20941 with SEC_LOAD, the generic ELF code will not create such a
20942 segment. */
20943 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
20944 if (dynsec)
20945 {
20946 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
20947 if (m->p_type == PT_DYNAMIC)
20948 break;
20949
20950 if (m == NULL)
20951 {
20952 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
20953 m->next = elf_seg_map (abfd);
20954 elf_seg_map (abfd) = m;
20955 }
20956 }
20957
20958 /* Also call the generic arm routine. */
20959 return elf32_arm_modify_segment_map (abfd, info);
20960 }
20961
20962 /* Return address for Ith PLT stub in section PLT, for relocation REL
20963 or (bfd_vma) -1 if it should not be included. */
20964
20965 static bfd_vma
20966 elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
20967 const arelent *rel ATTRIBUTE_UNUSED)
20968 {
20969 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
20970 }
20971
20972 #undef elf32_bed
20973 #define elf32_bed elf32_arm_symbian_bed
20974
20975 /* The dynamic sections are not allocated on SymbianOS; the postlinker
20976 will process them and then discard them. */
20977 #undef ELF_DYNAMIC_SEC_FLAGS
20978 #define ELF_DYNAMIC_SEC_FLAGS \
20979 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
20980
20981 #undef elf_backend_emit_relocs
20982
20983 #undef bfd_elf32_bfd_link_hash_table_create
20984 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
20985 #undef elf_backend_special_sections
20986 #define elf_backend_special_sections elf32_arm_symbian_special_sections
20987 #undef elf_backend_begin_write_processing
20988 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
20989 #undef elf_backend_final_write_processing
20990 #define elf_backend_final_write_processing elf32_arm_final_write_processing
20991
20992 #undef elf_backend_modify_segment_map
20993 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
20994
20995 /* There is no .got section for BPABI objects, and hence no header. */
20996 #undef elf_backend_got_header_size
20997 #define elf_backend_got_header_size 0
20998
20999 /* Similarly, there is no .got.plt section. */
21000 #undef elf_backend_want_got_plt
21001 #define elf_backend_want_got_plt 0
21002
21003 #undef elf_backend_plt_sym_val
21004 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
21005
21006 #undef elf_backend_may_use_rel_p
21007 #define elf_backend_may_use_rel_p 1
21008 #undef elf_backend_may_use_rela_p
21009 #define elf_backend_may_use_rela_p 0
21010 #undef elf_backend_default_use_rela_p
21011 #define elf_backend_default_use_rela_p 0
21012 #undef elf_backend_want_plt_sym
21013 #define elf_backend_want_plt_sym 0
21014 #undef elf_backend_dtrel_excludes_plt
21015 #define elf_backend_dtrel_excludes_plt 0
21016 #undef ELF_MAXPAGESIZE
21017 #define ELF_MAXPAGESIZE 0x8000
21018 #undef ELF_TARGET_OS
21019 #define ELF_TARGET_OS is_symbian
21020
21021 #include "elf32-target.h"
GDB Binutils - Deliverables
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