1 /* 32-bit ELF support for ARM
2 Copyright (C) 1998-2020 Free Software Foundation, Inc.
4 This file is part of BFD, the Binary File Descriptor library.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
25 #include "libiberty.h"
29 #include "elf-vxworks.h"
31 #include "elf32-arm.h"
34 /* Return the relocation section associated with NAME. HTAB is the
35 bfd's elf32_arm_link_hash_entry. */
36 #define RELOC_SECTION(HTAB, NAME) \
37 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
39 /* Return size of a relocation entry. HTAB is the bfd's
40 elf32_arm_link_hash_entry. */
41 #define RELOC_SIZE(HTAB) \
43 ? sizeof (Elf32_External_Rel) \
44 : sizeof (Elf32_External_Rela))
46 /* Return function to swap relocations in. HTAB is the bfd's
47 elf32_arm_link_hash_entry. */
48 #define SWAP_RELOC_IN(HTAB) \
50 ? bfd_elf32_swap_reloc_in \
51 : bfd_elf32_swap_reloca_in)
53 /* Return function to swap relocations out. HTAB is the bfd's
54 elf32_arm_link_hash_entry. */
55 #define SWAP_RELOC_OUT(HTAB) \
57 ? bfd_elf32_swap_reloc_out \
58 : bfd_elf32_swap_reloca_out)
60 #define elf_info_to_howto NULL
61 #define elf_info_to_howto_rel elf32_arm_info_to_howto
63 #define ARM_ELF_ABI_VERSION 0
64 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
66 /* The Adjusted Place, as defined by AAELF. */
67 #define Pa(X) ((X) & 0xfffffffc)
69 static bfd_boolean
elf32_arm_write_section (bfd
*output_bfd
,
70 struct bfd_link_info
*link_info
,
74 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
75 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
78 static reloc_howto_type elf32_arm_howto_table_1
[] =
81 HOWTO (R_ARM_NONE
, /* type */
83 3, /* size (0 = byte, 1 = short, 2 = long) */
85 FALSE
, /* pc_relative */
87 complain_overflow_dont
,/* complain_on_overflow */
88 bfd_elf_generic_reloc
, /* special_function */
89 "R_ARM_NONE", /* name */
90 FALSE
, /* partial_inplace */
93 FALSE
), /* pcrel_offset */
95 HOWTO (R_ARM_PC24
, /* type */
97 2, /* size (0 = byte, 1 = short, 2 = long) */
99 TRUE
, /* pc_relative */
101 complain_overflow_signed
,/* complain_on_overflow */
102 bfd_elf_generic_reloc
, /* special_function */
103 "R_ARM_PC24", /* name */
104 FALSE
, /* partial_inplace */
105 0x00ffffff, /* src_mask */
106 0x00ffffff, /* dst_mask */
107 TRUE
), /* pcrel_offset */
109 /* 32 bit absolute */
110 HOWTO (R_ARM_ABS32
, /* type */
112 2, /* size (0 = byte, 1 = short, 2 = long) */
114 FALSE
, /* pc_relative */
116 complain_overflow_bitfield
,/* complain_on_overflow */
117 bfd_elf_generic_reloc
, /* special_function */
118 "R_ARM_ABS32", /* name */
119 FALSE
, /* partial_inplace */
120 0xffffffff, /* src_mask */
121 0xffffffff, /* dst_mask */
122 FALSE
), /* pcrel_offset */
124 /* standard 32bit pc-relative reloc */
125 HOWTO (R_ARM_REL32
, /* type */
127 2, /* size (0 = byte, 1 = short, 2 = long) */
129 TRUE
, /* pc_relative */
131 complain_overflow_bitfield
,/* complain_on_overflow */
132 bfd_elf_generic_reloc
, /* special_function */
133 "R_ARM_REL32", /* name */
134 FALSE
, /* partial_inplace */
135 0xffffffff, /* src_mask */
136 0xffffffff, /* dst_mask */
137 TRUE
), /* pcrel_offset */
139 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
140 HOWTO (R_ARM_LDR_PC_G0
, /* type */
142 0, /* size (0 = byte, 1 = short, 2 = long) */
144 TRUE
, /* pc_relative */
146 complain_overflow_dont
,/* complain_on_overflow */
147 bfd_elf_generic_reloc
, /* special_function */
148 "R_ARM_LDR_PC_G0", /* name */
149 FALSE
, /* partial_inplace */
150 0xffffffff, /* src_mask */
151 0xffffffff, /* dst_mask */
152 TRUE
), /* pcrel_offset */
154 /* 16 bit absolute */
155 HOWTO (R_ARM_ABS16
, /* type */
157 1, /* size (0 = byte, 1 = short, 2 = long) */
159 FALSE
, /* pc_relative */
161 complain_overflow_bitfield
,/* complain_on_overflow */
162 bfd_elf_generic_reloc
, /* special_function */
163 "R_ARM_ABS16", /* name */
164 FALSE
, /* partial_inplace */
165 0x0000ffff, /* src_mask */
166 0x0000ffff, /* dst_mask */
167 FALSE
), /* pcrel_offset */
169 /* 12 bit absolute */
170 HOWTO (R_ARM_ABS12
, /* type */
172 2, /* size (0 = byte, 1 = short, 2 = long) */
174 FALSE
, /* pc_relative */
176 complain_overflow_bitfield
,/* complain_on_overflow */
177 bfd_elf_generic_reloc
, /* special_function */
178 "R_ARM_ABS12", /* name */
179 FALSE
, /* partial_inplace */
180 0x00000fff, /* src_mask */
181 0x00000fff, /* dst_mask */
182 FALSE
), /* pcrel_offset */
184 HOWTO (R_ARM_THM_ABS5
, /* type */
186 1, /* size (0 = byte, 1 = short, 2 = long) */
188 FALSE
, /* pc_relative */
190 complain_overflow_bitfield
,/* complain_on_overflow */
191 bfd_elf_generic_reloc
, /* special_function */
192 "R_ARM_THM_ABS5", /* name */
193 FALSE
, /* partial_inplace */
194 0x000007e0, /* src_mask */
195 0x000007e0, /* dst_mask */
196 FALSE
), /* pcrel_offset */
199 HOWTO (R_ARM_ABS8
, /* type */
201 0, /* size (0 = byte, 1 = short, 2 = long) */
203 FALSE
, /* pc_relative */
205 complain_overflow_bitfield
,/* complain_on_overflow */
206 bfd_elf_generic_reloc
, /* special_function */
207 "R_ARM_ABS8", /* name */
208 FALSE
, /* partial_inplace */
209 0x000000ff, /* src_mask */
210 0x000000ff, /* dst_mask */
211 FALSE
), /* pcrel_offset */
213 HOWTO (R_ARM_SBREL32
, /* type */
215 2, /* size (0 = byte, 1 = short, 2 = long) */
217 FALSE
, /* pc_relative */
219 complain_overflow_dont
,/* complain_on_overflow */
220 bfd_elf_generic_reloc
, /* special_function */
221 "R_ARM_SBREL32", /* name */
222 FALSE
, /* partial_inplace */
223 0xffffffff, /* src_mask */
224 0xffffffff, /* dst_mask */
225 FALSE
), /* pcrel_offset */
227 HOWTO (R_ARM_THM_CALL
, /* type */
229 2, /* size (0 = byte, 1 = short, 2 = long) */
231 TRUE
, /* pc_relative */
233 complain_overflow_signed
,/* complain_on_overflow */
234 bfd_elf_generic_reloc
, /* special_function */
235 "R_ARM_THM_CALL", /* name */
236 FALSE
, /* partial_inplace */
237 0x07ff2fff, /* src_mask */
238 0x07ff2fff, /* dst_mask */
239 TRUE
), /* pcrel_offset */
241 HOWTO (R_ARM_THM_PC8
, /* type */
243 1, /* size (0 = byte, 1 = short, 2 = long) */
245 TRUE
, /* pc_relative */
247 complain_overflow_signed
,/* complain_on_overflow */
248 bfd_elf_generic_reloc
, /* special_function */
249 "R_ARM_THM_PC8", /* name */
250 FALSE
, /* partial_inplace */
251 0x000000ff, /* src_mask */
252 0x000000ff, /* dst_mask */
253 TRUE
), /* pcrel_offset */
255 HOWTO (R_ARM_BREL_ADJ
, /* type */
257 1, /* size (0 = byte, 1 = short, 2 = long) */
259 FALSE
, /* pc_relative */
261 complain_overflow_signed
,/* complain_on_overflow */
262 bfd_elf_generic_reloc
, /* special_function */
263 "R_ARM_BREL_ADJ", /* name */
264 FALSE
, /* partial_inplace */
265 0xffffffff, /* src_mask */
266 0xffffffff, /* dst_mask */
267 FALSE
), /* pcrel_offset */
269 HOWTO (R_ARM_TLS_DESC
, /* type */
271 2, /* size (0 = byte, 1 = short, 2 = long) */
273 FALSE
, /* pc_relative */
275 complain_overflow_bitfield
,/* complain_on_overflow */
276 bfd_elf_generic_reloc
, /* special_function */
277 "R_ARM_TLS_DESC", /* name */
278 FALSE
, /* partial_inplace */
279 0xffffffff, /* src_mask */
280 0xffffffff, /* dst_mask */
281 FALSE
), /* pcrel_offset */
283 HOWTO (R_ARM_THM_SWI8
, /* type */
285 0, /* size (0 = byte, 1 = short, 2 = long) */
287 FALSE
, /* pc_relative */
289 complain_overflow_signed
,/* complain_on_overflow */
290 bfd_elf_generic_reloc
, /* special_function */
291 "R_ARM_SWI8", /* name */
292 FALSE
, /* partial_inplace */
293 0x00000000, /* src_mask */
294 0x00000000, /* dst_mask */
295 FALSE
), /* pcrel_offset */
297 /* BLX instruction for the ARM. */
298 HOWTO (R_ARM_XPC25
, /* type */
300 2, /* size (0 = byte, 1 = short, 2 = long) */
302 TRUE
, /* pc_relative */
304 complain_overflow_signed
,/* complain_on_overflow */
305 bfd_elf_generic_reloc
, /* special_function */
306 "R_ARM_XPC25", /* name */
307 FALSE
, /* partial_inplace */
308 0x00ffffff, /* src_mask */
309 0x00ffffff, /* dst_mask */
310 TRUE
), /* pcrel_offset */
312 /* BLX instruction for the Thumb. */
313 HOWTO (R_ARM_THM_XPC22
, /* type */
315 2, /* size (0 = byte, 1 = short, 2 = long) */
317 TRUE
, /* pc_relative */
319 complain_overflow_signed
,/* complain_on_overflow */
320 bfd_elf_generic_reloc
, /* special_function */
321 "R_ARM_THM_XPC22", /* name */
322 FALSE
, /* partial_inplace */
323 0x07ff2fff, /* src_mask */
324 0x07ff2fff, /* dst_mask */
325 TRUE
), /* pcrel_offset */
327 /* Dynamic TLS relocations. */
329 HOWTO (R_ARM_TLS_DTPMOD32
, /* type */
331 2, /* size (0 = byte, 1 = short, 2 = long) */
333 FALSE
, /* pc_relative */
335 complain_overflow_bitfield
,/* complain_on_overflow */
336 bfd_elf_generic_reloc
, /* special_function */
337 "R_ARM_TLS_DTPMOD32", /* name */
338 TRUE
, /* partial_inplace */
339 0xffffffff, /* src_mask */
340 0xffffffff, /* dst_mask */
341 FALSE
), /* pcrel_offset */
343 HOWTO (R_ARM_TLS_DTPOFF32
, /* type */
345 2, /* size (0 = byte, 1 = short, 2 = long) */
347 FALSE
, /* pc_relative */
349 complain_overflow_bitfield
,/* complain_on_overflow */
350 bfd_elf_generic_reloc
, /* special_function */
351 "R_ARM_TLS_DTPOFF32", /* name */
352 TRUE
, /* partial_inplace */
353 0xffffffff, /* src_mask */
354 0xffffffff, /* dst_mask */
355 FALSE
), /* pcrel_offset */
357 HOWTO (R_ARM_TLS_TPOFF32
, /* type */
359 2, /* size (0 = byte, 1 = short, 2 = long) */
361 FALSE
, /* pc_relative */
363 complain_overflow_bitfield
,/* complain_on_overflow */
364 bfd_elf_generic_reloc
, /* special_function */
365 "R_ARM_TLS_TPOFF32", /* name */
366 TRUE
, /* partial_inplace */
367 0xffffffff, /* src_mask */
368 0xffffffff, /* dst_mask */
369 FALSE
), /* pcrel_offset */
371 /* Relocs used in ARM Linux */
373 HOWTO (R_ARM_COPY
, /* type */
375 2, /* size (0 = byte, 1 = short, 2 = long) */
377 FALSE
, /* pc_relative */
379 complain_overflow_bitfield
,/* complain_on_overflow */
380 bfd_elf_generic_reloc
, /* special_function */
381 "R_ARM_COPY", /* name */
382 TRUE
, /* partial_inplace */
383 0xffffffff, /* src_mask */
384 0xffffffff, /* dst_mask */
385 FALSE
), /* pcrel_offset */
387 HOWTO (R_ARM_GLOB_DAT
, /* type */
389 2, /* size (0 = byte, 1 = short, 2 = long) */
391 FALSE
, /* pc_relative */
393 complain_overflow_bitfield
,/* complain_on_overflow */
394 bfd_elf_generic_reloc
, /* special_function */
395 "R_ARM_GLOB_DAT", /* name */
396 TRUE
, /* partial_inplace */
397 0xffffffff, /* src_mask */
398 0xffffffff, /* dst_mask */
399 FALSE
), /* pcrel_offset */
401 HOWTO (R_ARM_JUMP_SLOT
, /* type */
403 2, /* size (0 = byte, 1 = short, 2 = long) */
405 FALSE
, /* pc_relative */
407 complain_overflow_bitfield
,/* complain_on_overflow */
408 bfd_elf_generic_reloc
, /* special_function */
409 "R_ARM_JUMP_SLOT", /* name */
410 TRUE
, /* partial_inplace */
411 0xffffffff, /* src_mask */
412 0xffffffff, /* dst_mask */
413 FALSE
), /* pcrel_offset */
415 HOWTO (R_ARM_RELATIVE
, /* type */
417 2, /* size (0 = byte, 1 = short, 2 = long) */
419 FALSE
, /* pc_relative */
421 complain_overflow_bitfield
,/* complain_on_overflow */
422 bfd_elf_generic_reloc
, /* special_function */
423 "R_ARM_RELATIVE", /* name */
424 TRUE
, /* partial_inplace */
425 0xffffffff, /* src_mask */
426 0xffffffff, /* dst_mask */
427 FALSE
), /* pcrel_offset */
429 HOWTO (R_ARM_GOTOFF32
, /* type */
431 2, /* size (0 = byte, 1 = short, 2 = long) */
433 FALSE
, /* pc_relative */
435 complain_overflow_bitfield
,/* complain_on_overflow */
436 bfd_elf_generic_reloc
, /* special_function */
437 "R_ARM_GOTOFF32", /* name */
438 TRUE
, /* partial_inplace */
439 0xffffffff, /* src_mask */
440 0xffffffff, /* dst_mask */
441 FALSE
), /* pcrel_offset */
443 HOWTO (R_ARM_GOTPC
, /* type */
445 2, /* size (0 = byte, 1 = short, 2 = long) */
447 TRUE
, /* pc_relative */
449 complain_overflow_bitfield
,/* complain_on_overflow */
450 bfd_elf_generic_reloc
, /* special_function */
451 "R_ARM_GOTPC", /* name */
452 TRUE
, /* partial_inplace */
453 0xffffffff, /* src_mask */
454 0xffffffff, /* dst_mask */
455 TRUE
), /* pcrel_offset */
457 HOWTO (R_ARM_GOT32
, /* type */
459 2, /* size (0 = byte, 1 = short, 2 = long) */
461 FALSE
, /* pc_relative */
463 complain_overflow_bitfield
,/* complain_on_overflow */
464 bfd_elf_generic_reloc
, /* special_function */
465 "R_ARM_GOT32", /* name */
466 TRUE
, /* partial_inplace */
467 0xffffffff, /* src_mask */
468 0xffffffff, /* dst_mask */
469 FALSE
), /* pcrel_offset */
471 HOWTO (R_ARM_PLT32
, /* type */
473 2, /* size (0 = byte, 1 = short, 2 = long) */
475 TRUE
, /* pc_relative */
477 complain_overflow_bitfield
,/* complain_on_overflow */
478 bfd_elf_generic_reloc
, /* special_function */
479 "R_ARM_PLT32", /* name */
480 FALSE
, /* partial_inplace */
481 0x00ffffff, /* src_mask */
482 0x00ffffff, /* dst_mask */
483 TRUE
), /* pcrel_offset */
485 HOWTO (R_ARM_CALL
, /* type */
487 2, /* size (0 = byte, 1 = short, 2 = long) */
489 TRUE
, /* pc_relative */
491 complain_overflow_signed
,/* complain_on_overflow */
492 bfd_elf_generic_reloc
, /* special_function */
493 "R_ARM_CALL", /* name */
494 FALSE
, /* partial_inplace */
495 0x00ffffff, /* src_mask */
496 0x00ffffff, /* dst_mask */
497 TRUE
), /* pcrel_offset */
499 HOWTO (R_ARM_JUMP24
, /* type */
501 2, /* size (0 = byte, 1 = short, 2 = long) */
503 TRUE
, /* pc_relative */
505 complain_overflow_signed
,/* complain_on_overflow */
506 bfd_elf_generic_reloc
, /* special_function */
507 "R_ARM_JUMP24", /* name */
508 FALSE
, /* partial_inplace */
509 0x00ffffff, /* src_mask */
510 0x00ffffff, /* dst_mask */
511 TRUE
), /* pcrel_offset */
513 HOWTO (R_ARM_THM_JUMP24
, /* type */
515 2, /* size (0 = byte, 1 = short, 2 = long) */
517 TRUE
, /* pc_relative */
519 complain_overflow_signed
,/* complain_on_overflow */
520 bfd_elf_generic_reloc
, /* special_function */
521 "R_ARM_THM_JUMP24", /* name */
522 FALSE
, /* partial_inplace */
523 0x07ff2fff, /* src_mask */
524 0x07ff2fff, /* dst_mask */
525 TRUE
), /* pcrel_offset */
527 HOWTO (R_ARM_BASE_ABS
, /* type */
529 2, /* size (0 = byte, 1 = short, 2 = long) */
531 FALSE
, /* pc_relative */
533 complain_overflow_dont
,/* complain_on_overflow */
534 bfd_elf_generic_reloc
, /* special_function */
535 "R_ARM_BASE_ABS", /* name */
536 FALSE
, /* partial_inplace */
537 0xffffffff, /* src_mask */
538 0xffffffff, /* dst_mask */
539 FALSE
), /* pcrel_offset */
541 HOWTO (R_ARM_ALU_PCREL7_0
, /* type */
543 2, /* size (0 = byte, 1 = short, 2 = long) */
545 TRUE
, /* pc_relative */
547 complain_overflow_dont
,/* complain_on_overflow */
548 bfd_elf_generic_reloc
, /* special_function */
549 "R_ARM_ALU_PCREL_7_0", /* name */
550 FALSE
, /* partial_inplace */
551 0x00000fff, /* src_mask */
552 0x00000fff, /* dst_mask */
553 TRUE
), /* pcrel_offset */
555 HOWTO (R_ARM_ALU_PCREL15_8
, /* type */
557 2, /* size (0 = byte, 1 = short, 2 = long) */
559 TRUE
, /* pc_relative */
561 complain_overflow_dont
,/* complain_on_overflow */
562 bfd_elf_generic_reloc
, /* special_function */
563 "R_ARM_ALU_PCREL_15_8",/* name */
564 FALSE
, /* partial_inplace */
565 0x00000fff, /* src_mask */
566 0x00000fff, /* dst_mask */
567 TRUE
), /* pcrel_offset */
569 HOWTO (R_ARM_ALU_PCREL23_15
, /* type */
571 2, /* size (0 = byte, 1 = short, 2 = long) */
573 TRUE
, /* pc_relative */
575 complain_overflow_dont
,/* complain_on_overflow */
576 bfd_elf_generic_reloc
, /* special_function */
577 "R_ARM_ALU_PCREL_23_15",/* name */
578 FALSE
, /* partial_inplace */
579 0x00000fff, /* src_mask */
580 0x00000fff, /* dst_mask */
581 TRUE
), /* pcrel_offset */
583 HOWTO (R_ARM_LDR_SBREL_11_0
, /* type */
585 2, /* size (0 = byte, 1 = short, 2 = long) */
587 FALSE
, /* pc_relative */
589 complain_overflow_dont
,/* complain_on_overflow */
590 bfd_elf_generic_reloc
, /* special_function */
591 "R_ARM_LDR_SBREL_11_0",/* name */
592 FALSE
, /* partial_inplace */
593 0x00000fff, /* src_mask */
594 0x00000fff, /* dst_mask */
595 FALSE
), /* pcrel_offset */
597 HOWTO (R_ARM_ALU_SBREL_19_12
, /* type */
599 2, /* size (0 = byte, 1 = short, 2 = long) */
601 FALSE
, /* pc_relative */
603 complain_overflow_dont
,/* complain_on_overflow */
604 bfd_elf_generic_reloc
, /* special_function */
605 "R_ARM_ALU_SBREL_19_12",/* name */
606 FALSE
, /* partial_inplace */
607 0x000ff000, /* src_mask */
608 0x000ff000, /* dst_mask */
609 FALSE
), /* pcrel_offset */
611 HOWTO (R_ARM_ALU_SBREL_27_20
, /* type */
613 2, /* size (0 = byte, 1 = short, 2 = long) */
615 FALSE
, /* pc_relative */
617 complain_overflow_dont
,/* complain_on_overflow */
618 bfd_elf_generic_reloc
, /* special_function */
619 "R_ARM_ALU_SBREL_27_20",/* name */
620 FALSE
, /* partial_inplace */
621 0x0ff00000, /* src_mask */
622 0x0ff00000, /* dst_mask */
623 FALSE
), /* pcrel_offset */
625 HOWTO (R_ARM_TARGET1
, /* type */
627 2, /* size (0 = byte, 1 = short, 2 = long) */
629 FALSE
, /* pc_relative */
631 complain_overflow_dont
,/* complain_on_overflow */
632 bfd_elf_generic_reloc
, /* special_function */
633 "R_ARM_TARGET1", /* name */
634 FALSE
, /* partial_inplace */
635 0xffffffff, /* src_mask */
636 0xffffffff, /* dst_mask */
637 FALSE
), /* pcrel_offset */
639 HOWTO (R_ARM_ROSEGREL32
, /* type */
641 2, /* size (0 = byte, 1 = short, 2 = long) */
643 FALSE
, /* pc_relative */
645 complain_overflow_dont
,/* complain_on_overflow */
646 bfd_elf_generic_reloc
, /* special_function */
647 "R_ARM_ROSEGREL32", /* name */
648 FALSE
, /* partial_inplace */
649 0xffffffff, /* src_mask */
650 0xffffffff, /* dst_mask */
651 FALSE
), /* pcrel_offset */
653 HOWTO (R_ARM_V4BX
, /* type */
655 2, /* size (0 = byte, 1 = short, 2 = long) */
657 FALSE
, /* pc_relative */
659 complain_overflow_dont
,/* complain_on_overflow */
660 bfd_elf_generic_reloc
, /* special_function */
661 "R_ARM_V4BX", /* name */
662 FALSE
, /* partial_inplace */
663 0xffffffff, /* src_mask */
664 0xffffffff, /* dst_mask */
665 FALSE
), /* pcrel_offset */
667 HOWTO (R_ARM_TARGET2
, /* type */
669 2, /* size (0 = byte, 1 = short, 2 = long) */
671 FALSE
, /* pc_relative */
673 complain_overflow_signed
,/* complain_on_overflow */
674 bfd_elf_generic_reloc
, /* special_function */
675 "R_ARM_TARGET2", /* name */
676 FALSE
, /* partial_inplace */
677 0xffffffff, /* src_mask */
678 0xffffffff, /* dst_mask */
679 TRUE
), /* pcrel_offset */
681 HOWTO (R_ARM_PREL31
, /* type */
683 2, /* size (0 = byte, 1 = short, 2 = long) */
685 TRUE
, /* pc_relative */
687 complain_overflow_signed
,/* complain_on_overflow */
688 bfd_elf_generic_reloc
, /* special_function */
689 "R_ARM_PREL31", /* name */
690 FALSE
, /* partial_inplace */
691 0x7fffffff, /* src_mask */
692 0x7fffffff, /* dst_mask */
693 TRUE
), /* pcrel_offset */
695 HOWTO (R_ARM_MOVW_ABS_NC
, /* type */
697 2, /* size (0 = byte, 1 = short, 2 = long) */
699 FALSE
, /* pc_relative */
701 complain_overflow_dont
,/* complain_on_overflow */
702 bfd_elf_generic_reloc
, /* special_function */
703 "R_ARM_MOVW_ABS_NC", /* name */
704 FALSE
, /* partial_inplace */
705 0x000f0fff, /* src_mask */
706 0x000f0fff, /* dst_mask */
707 FALSE
), /* pcrel_offset */
709 HOWTO (R_ARM_MOVT_ABS
, /* type */
711 2, /* size (0 = byte, 1 = short, 2 = long) */
713 FALSE
, /* pc_relative */
715 complain_overflow_bitfield
,/* complain_on_overflow */
716 bfd_elf_generic_reloc
, /* special_function */
717 "R_ARM_MOVT_ABS", /* name */
718 FALSE
, /* partial_inplace */
719 0x000f0fff, /* src_mask */
720 0x000f0fff, /* dst_mask */
721 FALSE
), /* pcrel_offset */
723 HOWTO (R_ARM_MOVW_PREL_NC
, /* type */
725 2, /* size (0 = byte, 1 = short, 2 = long) */
727 TRUE
, /* pc_relative */
729 complain_overflow_dont
,/* complain_on_overflow */
730 bfd_elf_generic_reloc
, /* special_function */
731 "R_ARM_MOVW_PREL_NC", /* name */
732 FALSE
, /* partial_inplace */
733 0x000f0fff, /* src_mask */
734 0x000f0fff, /* dst_mask */
735 TRUE
), /* pcrel_offset */
737 HOWTO (R_ARM_MOVT_PREL
, /* type */
739 2, /* size (0 = byte, 1 = short, 2 = long) */
741 TRUE
, /* pc_relative */
743 complain_overflow_bitfield
,/* complain_on_overflow */
744 bfd_elf_generic_reloc
, /* special_function */
745 "R_ARM_MOVT_PREL", /* name */
746 FALSE
, /* partial_inplace */
747 0x000f0fff, /* src_mask */
748 0x000f0fff, /* dst_mask */
749 TRUE
), /* pcrel_offset */
751 HOWTO (R_ARM_THM_MOVW_ABS_NC
, /* type */
753 2, /* size (0 = byte, 1 = short, 2 = long) */
755 FALSE
, /* pc_relative */
757 complain_overflow_dont
,/* complain_on_overflow */
758 bfd_elf_generic_reloc
, /* special_function */
759 "R_ARM_THM_MOVW_ABS_NC",/* name */
760 FALSE
, /* partial_inplace */
761 0x040f70ff, /* src_mask */
762 0x040f70ff, /* dst_mask */
763 FALSE
), /* pcrel_offset */
765 HOWTO (R_ARM_THM_MOVT_ABS
, /* type */
767 2, /* size (0 = byte, 1 = short, 2 = long) */
769 FALSE
, /* pc_relative */
771 complain_overflow_bitfield
,/* complain_on_overflow */
772 bfd_elf_generic_reloc
, /* special_function */
773 "R_ARM_THM_MOVT_ABS", /* name */
774 FALSE
, /* partial_inplace */
775 0x040f70ff, /* src_mask */
776 0x040f70ff, /* dst_mask */
777 FALSE
), /* pcrel_offset */
779 HOWTO (R_ARM_THM_MOVW_PREL_NC
,/* type */
781 2, /* size (0 = byte, 1 = short, 2 = long) */
783 TRUE
, /* pc_relative */
785 complain_overflow_dont
,/* complain_on_overflow */
786 bfd_elf_generic_reloc
, /* special_function */
787 "R_ARM_THM_MOVW_PREL_NC",/* name */
788 FALSE
, /* partial_inplace */
789 0x040f70ff, /* src_mask */
790 0x040f70ff, /* dst_mask */
791 TRUE
), /* pcrel_offset */
793 HOWTO (R_ARM_THM_MOVT_PREL
, /* type */
795 2, /* size (0 = byte, 1 = short, 2 = long) */
797 TRUE
, /* pc_relative */
799 complain_overflow_bitfield
,/* complain_on_overflow */
800 bfd_elf_generic_reloc
, /* special_function */
801 "R_ARM_THM_MOVT_PREL", /* name */
802 FALSE
, /* partial_inplace */
803 0x040f70ff, /* src_mask */
804 0x040f70ff, /* dst_mask */
805 TRUE
), /* pcrel_offset */
807 HOWTO (R_ARM_THM_JUMP19
, /* type */
809 2, /* size (0 = byte, 1 = short, 2 = long) */
811 TRUE
, /* pc_relative */
813 complain_overflow_signed
,/* complain_on_overflow */
814 bfd_elf_generic_reloc
, /* special_function */
815 "R_ARM_THM_JUMP19", /* name */
816 FALSE
, /* partial_inplace */
817 0x043f2fff, /* src_mask */
818 0x043f2fff, /* dst_mask */
819 TRUE
), /* pcrel_offset */
821 HOWTO (R_ARM_THM_JUMP6
, /* type */
823 1, /* size (0 = byte, 1 = short, 2 = long) */
825 TRUE
, /* pc_relative */
827 complain_overflow_unsigned
,/* complain_on_overflow */
828 bfd_elf_generic_reloc
, /* special_function */
829 "R_ARM_THM_JUMP6", /* name */
830 FALSE
, /* partial_inplace */
831 0x02f8, /* src_mask */
832 0x02f8, /* dst_mask */
833 TRUE
), /* pcrel_offset */
835 /* These are declared as 13-bit signed relocations because we can
836 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
838 HOWTO (R_ARM_THM_ALU_PREL_11_0
,/* type */
840 2, /* size (0 = byte, 1 = short, 2 = long) */
842 TRUE
, /* pc_relative */
844 complain_overflow_dont
,/* complain_on_overflow */
845 bfd_elf_generic_reloc
, /* special_function */
846 "R_ARM_THM_ALU_PREL_11_0",/* name */
847 FALSE
, /* partial_inplace */
848 0xffffffff, /* src_mask */
849 0xffffffff, /* dst_mask */
850 TRUE
), /* pcrel_offset */
852 HOWTO (R_ARM_THM_PC12
, /* type */
854 2, /* size (0 = byte, 1 = short, 2 = long) */
856 TRUE
, /* pc_relative */
858 complain_overflow_dont
,/* complain_on_overflow */
859 bfd_elf_generic_reloc
, /* special_function */
860 "R_ARM_THM_PC12", /* name */
861 FALSE
, /* partial_inplace */
862 0xffffffff, /* src_mask */
863 0xffffffff, /* dst_mask */
864 TRUE
), /* pcrel_offset */
866 HOWTO (R_ARM_ABS32_NOI
, /* type */
868 2, /* size (0 = byte, 1 = short, 2 = long) */
870 FALSE
, /* pc_relative */
872 complain_overflow_dont
,/* complain_on_overflow */
873 bfd_elf_generic_reloc
, /* special_function */
874 "R_ARM_ABS32_NOI", /* name */
875 FALSE
, /* partial_inplace */
876 0xffffffff, /* src_mask */
877 0xffffffff, /* dst_mask */
878 FALSE
), /* pcrel_offset */
880 HOWTO (R_ARM_REL32_NOI
, /* type */
882 2, /* size (0 = byte, 1 = short, 2 = long) */
884 TRUE
, /* pc_relative */
886 complain_overflow_dont
,/* complain_on_overflow */
887 bfd_elf_generic_reloc
, /* special_function */
888 "R_ARM_REL32_NOI", /* name */
889 FALSE
, /* partial_inplace */
890 0xffffffff, /* src_mask */
891 0xffffffff, /* dst_mask */
892 FALSE
), /* pcrel_offset */
894 /* Group relocations. */
896 HOWTO (R_ARM_ALU_PC_G0_NC
, /* type */
898 2, /* size (0 = byte, 1 = short, 2 = long) */
900 TRUE
, /* pc_relative */
902 complain_overflow_dont
,/* complain_on_overflow */
903 bfd_elf_generic_reloc
, /* special_function */
904 "R_ARM_ALU_PC_G0_NC", /* name */
905 FALSE
, /* partial_inplace */
906 0xffffffff, /* src_mask */
907 0xffffffff, /* dst_mask */
908 TRUE
), /* pcrel_offset */
910 HOWTO (R_ARM_ALU_PC_G0
, /* type */
912 2, /* size (0 = byte, 1 = short, 2 = long) */
914 TRUE
, /* pc_relative */
916 complain_overflow_dont
,/* complain_on_overflow */
917 bfd_elf_generic_reloc
, /* special_function */
918 "R_ARM_ALU_PC_G0", /* name */
919 FALSE
, /* partial_inplace */
920 0xffffffff, /* src_mask */
921 0xffffffff, /* dst_mask */
922 TRUE
), /* pcrel_offset */
924 HOWTO (R_ARM_ALU_PC_G1_NC
, /* type */
926 2, /* size (0 = byte, 1 = short, 2 = long) */
928 TRUE
, /* pc_relative */
930 complain_overflow_dont
,/* complain_on_overflow */
931 bfd_elf_generic_reloc
, /* special_function */
932 "R_ARM_ALU_PC_G1_NC", /* name */
933 FALSE
, /* partial_inplace */
934 0xffffffff, /* src_mask */
935 0xffffffff, /* dst_mask */
936 TRUE
), /* pcrel_offset */
938 HOWTO (R_ARM_ALU_PC_G1
, /* type */
940 2, /* size (0 = byte, 1 = short, 2 = long) */
942 TRUE
, /* pc_relative */
944 complain_overflow_dont
,/* complain_on_overflow */
945 bfd_elf_generic_reloc
, /* special_function */
946 "R_ARM_ALU_PC_G1", /* name */
947 FALSE
, /* partial_inplace */
948 0xffffffff, /* src_mask */
949 0xffffffff, /* dst_mask */
950 TRUE
), /* pcrel_offset */
952 HOWTO (R_ARM_ALU_PC_G2
, /* type */
954 2, /* size (0 = byte, 1 = short, 2 = long) */
956 TRUE
, /* pc_relative */
958 complain_overflow_dont
,/* complain_on_overflow */
959 bfd_elf_generic_reloc
, /* special_function */
960 "R_ARM_ALU_PC_G2", /* name */
961 FALSE
, /* partial_inplace */
962 0xffffffff, /* src_mask */
963 0xffffffff, /* dst_mask */
964 TRUE
), /* pcrel_offset */
966 HOWTO (R_ARM_LDR_PC_G1
, /* type */
968 2, /* size (0 = byte, 1 = short, 2 = long) */
970 TRUE
, /* pc_relative */
972 complain_overflow_dont
,/* complain_on_overflow */
973 bfd_elf_generic_reloc
, /* special_function */
974 "R_ARM_LDR_PC_G1", /* name */
975 FALSE
, /* partial_inplace */
976 0xffffffff, /* src_mask */
977 0xffffffff, /* dst_mask */
978 TRUE
), /* pcrel_offset */
980 HOWTO (R_ARM_LDR_PC_G2
, /* type */
982 2, /* size (0 = byte, 1 = short, 2 = long) */
984 TRUE
, /* pc_relative */
986 complain_overflow_dont
,/* complain_on_overflow */
987 bfd_elf_generic_reloc
, /* special_function */
988 "R_ARM_LDR_PC_G2", /* name */
989 FALSE
, /* partial_inplace */
990 0xffffffff, /* src_mask */
991 0xffffffff, /* dst_mask */
992 TRUE
), /* pcrel_offset */
994 HOWTO (R_ARM_LDRS_PC_G0
, /* type */
996 2, /* size (0 = byte, 1 = short, 2 = long) */
998 TRUE
, /* pc_relative */
1000 complain_overflow_dont
,/* complain_on_overflow */
1001 bfd_elf_generic_reloc
, /* special_function */
1002 "R_ARM_LDRS_PC_G0", /* name */
1003 FALSE
, /* partial_inplace */
1004 0xffffffff, /* src_mask */
1005 0xffffffff, /* dst_mask */
1006 TRUE
), /* pcrel_offset */
1008 HOWTO (R_ARM_LDRS_PC_G1
, /* type */
1010 2, /* size (0 = byte, 1 = short, 2 = long) */
1012 TRUE
, /* pc_relative */
1014 complain_overflow_dont
,/* complain_on_overflow */
1015 bfd_elf_generic_reloc
, /* special_function */
1016 "R_ARM_LDRS_PC_G1", /* name */
1017 FALSE
, /* partial_inplace */
1018 0xffffffff, /* src_mask */
1019 0xffffffff, /* dst_mask */
1020 TRUE
), /* pcrel_offset */
1022 HOWTO (R_ARM_LDRS_PC_G2
, /* type */
1024 2, /* size (0 = byte, 1 = short, 2 = long) */
1026 TRUE
, /* pc_relative */
1028 complain_overflow_dont
,/* complain_on_overflow */
1029 bfd_elf_generic_reloc
, /* special_function */
1030 "R_ARM_LDRS_PC_G2", /* name */
1031 FALSE
, /* partial_inplace */
1032 0xffffffff, /* src_mask */
1033 0xffffffff, /* dst_mask */
1034 TRUE
), /* pcrel_offset */
1036 HOWTO (R_ARM_LDC_PC_G0
, /* type */
1038 2, /* size (0 = byte, 1 = short, 2 = long) */
1040 TRUE
, /* pc_relative */
1042 complain_overflow_dont
,/* complain_on_overflow */
1043 bfd_elf_generic_reloc
, /* special_function */
1044 "R_ARM_LDC_PC_G0", /* name */
1045 FALSE
, /* partial_inplace */
1046 0xffffffff, /* src_mask */
1047 0xffffffff, /* dst_mask */
1048 TRUE
), /* pcrel_offset */
1050 HOWTO (R_ARM_LDC_PC_G1
, /* type */
1052 2, /* size (0 = byte, 1 = short, 2 = long) */
1054 TRUE
, /* pc_relative */
1056 complain_overflow_dont
,/* complain_on_overflow */
1057 bfd_elf_generic_reloc
, /* special_function */
1058 "R_ARM_LDC_PC_G1", /* name */
1059 FALSE
, /* partial_inplace */
1060 0xffffffff, /* src_mask */
1061 0xffffffff, /* dst_mask */
1062 TRUE
), /* pcrel_offset */
1064 HOWTO (R_ARM_LDC_PC_G2
, /* type */
1066 2, /* size (0 = byte, 1 = short, 2 = long) */
1068 TRUE
, /* pc_relative */
1070 complain_overflow_dont
,/* complain_on_overflow */
1071 bfd_elf_generic_reloc
, /* special_function */
1072 "R_ARM_LDC_PC_G2", /* name */
1073 FALSE
, /* partial_inplace */
1074 0xffffffff, /* src_mask */
1075 0xffffffff, /* dst_mask */
1076 TRUE
), /* pcrel_offset */
1078 HOWTO (R_ARM_ALU_SB_G0_NC
, /* type */
1080 2, /* size (0 = byte, 1 = short, 2 = long) */
1082 TRUE
, /* pc_relative */
1084 complain_overflow_dont
,/* complain_on_overflow */
1085 bfd_elf_generic_reloc
, /* special_function */
1086 "R_ARM_ALU_SB_G0_NC", /* name */
1087 FALSE
, /* partial_inplace */
1088 0xffffffff, /* src_mask */
1089 0xffffffff, /* dst_mask */
1090 TRUE
), /* pcrel_offset */
1092 HOWTO (R_ARM_ALU_SB_G0
, /* type */
1094 2, /* size (0 = byte, 1 = short, 2 = long) */
1096 TRUE
, /* pc_relative */
1098 complain_overflow_dont
,/* complain_on_overflow */
1099 bfd_elf_generic_reloc
, /* special_function */
1100 "R_ARM_ALU_SB_G0", /* name */
1101 FALSE
, /* partial_inplace */
1102 0xffffffff, /* src_mask */
1103 0xffffffff, /* dst_mask */
1104 TRUE
), /* pcrel_offset */
1106 HOWTO (R_ARM_ALU_SB_G1_NC
, /* type */
1108 2, /* size (0 = byte, 1 = short, 2 = long) */
1110 TRUE
, /* pc_relative */
1112 complain_overflow_dont
,/* complain_on_overflow */
1113 bfd_elf_generic_reloc
, /* special_function */
1114 "R_ARM_ALU_SB_G1_NC", /* name */
1115 FALSE
, /* partial_inplace */
1116 0xffffffff, /* src_mask */
1117 0xffffffff, /* dst_mask */
1118 TRUE
), /* pcrel_offset */
1120 HOWTO (R_ARM_ALU_SB_G1
, /* type */
1122 2, /* size (0 = byte, 1 = short, 2 = long) */
1124 TRUE
, /* pc_relative */
1126 complain_overflow_dont
,/* complain_on_overflow */
1127 bfd_elf_generic_reloc
, /* special_function */
1128 "R_ARM_ALU_SB_G1", /* name */
1129 FALSE
, /* partial_inplace */
1130 0xffffffff, /* src_mask */
1131 0xffffffff, /* dst_mask */
1132 TRUE
), /* pcrel_offset */
1134 HOWTO (R_ARM_ALU_SB_G2
, /* type */
1136 2, /* size (0 = byte, 1 = short, 2 = long) */
1138 TRUE
, /* pc_relative */
1140 complain_overflow_dont
,/* complain_on_overflow */
1141 bfd_elf_generic_reloc
, /* special_function */
1142 "R_ARM_ALU_SB_G2", /* name */
1143 FALSE
, /* partial_inplace */
1144 0xffffffff, /* src_mask */
1145 0xffffffff, /* dst_mask */
1146 TRUE
), /* pcrel_offset */
1148 HOWTO (R_ARM_LDR_SB_G0
, /* type */
1150 2, /* size (0 = byte, 1 = short, 2 = long) */
1152 TRUE
, /* pc_relative */
1154 complain_overflow_dont
,/* complain_on_overflow */
1155 bfd_elf_generic_reloc
, /* special_function */
1156 "R_ARM_LDR_SB_G0", /* name */
1157 FALSE
, /* partial_inplace */
1158 0xffffffff, /* src_mask */
1159 0xffffffff, /* dst_mask */
1160 TRUE
), /* pcrel_offset */
1162 HOWTO (R_ARM_LDR_SB_G1
, /* type */
1164 2, /* size (0 = byte, 1 = short, 2 = long) */
1166 TRUE
, /* pc_relative */
1168 complain_overflow_dont
,/* complain_on_overflow */
1169 bfd_elf_generic_reloc
, /* special_function */
1170 "R_ARM_LDR_SB_G1", /* name */
1171 FALSE
, /* partial_inplace */
1172 0xffffffff, /* src_mask */
1173 0xffffffff, /* dst_mask */
1174 TRUE
), /* pcrel_offset */
1176 HOWTO (R_ARM_LDR_SB_G2
, /* type */
1178 2, /* size (0 = byte, 1 = short, 2 = long) */
1180 TRUE
, /* pc_relative */
1182 complain_overflow_dont
,/* complain_on_overflow */
1183 bfd_elf_generic_reloc
, /* special_function */
1184 "R_ARM_LDR_SB_G2", /* name */
1185 FALSE
, /* partial_inplace */
1186 0xffffffff, /* src_mask */
1187 0xffffffff, /* dst_mask */
1188 TRUE
), /* pcrel_offset */
1190 HOWTO (R_ARM_LDRS_SB_G0
, /* type */
1192 2, /* size (0 = byte, 1 = short, 2 = long) */
1194 TRUE
, /* pc_relative */
1196 complain_overflow_dont
,/* complain_on_overflow */
1197 bfd_elf_generic_reloc
, /* special_function */
1198 "R_ARM_LDRS_SB_G0", /* name */
1199 FALSE
, /* partial_inplace */
1200 0xffffffff, /* src_mask */
1201 0xffffffff, /* dst_mask */
1202 TRUE
), /* pcrel_offset */
1204 HOWTO (R_ARM_LDRS_SB_G1
, /* type */
1206 2, /* size (0 = byte, 1 = short, 2 = long) */
1208 TRUE
, /* pc_relative */
1210 complain_overflow_dont
,/* complain_on_overflow */
1211 bfd_elf_generic_reloc
, /* special_function */
1212 "R_ARM_LDRS_SB_G1", /* name */
1213 FALSE
, /* partial_inplace */
1214 0xffffffff, /* src_mask */
1215 0xffffffff, /* dst_mask */
1216 TRUE
), /* pcrel_offset */
1218 HOWTO (R_ARM_LDRS_SB_G2
, /* type */
1220 2, /* size (0 = byte, 1 = short, 2 = long) */
1222 TRUE
, /* pc_relative */
1224 complain_overflow_dont
,/* complain_on_overflow */
1225 bfd_elf_generic_reloc
, /* special_function */
1226 "R_ARM_LDRS_SB_G2", /* name */
1227 FALSE
, /* partial_inplace */
1228 0xffffffff, /* src_mask */
1229 0xffffffff, /* dst_mask */
1230 TRUE
), /* pcrel_offset */
1232 HOWTO (R_ARM_LDC_SB_G0
, /* type */
1234 2, /* size (0 = byte, 1 = short, 2 = long) */
1236 TRUE
, /* pc_relative */
1238 complain_overflow_dont
,/* complain_on_overflow */
1239 bfd_elf_generic_reloc
, /* special_function */
1240 "R_ARM_LDC_SB_G0", /* name */
1241 FALSE
, /* partial_inplace */
1242 0xffffffff, /* src_mask */
1243 0xffffffff, /* dst_mask */
1244 TRUE
), /* pcrel_offset */
1246 HOWTO (R_ARM_LDC_SB_G1
, /* type */
1248 2, /* size (0 = byte, 1 = short, 2 = long) */
1250 TRUE
, /* pc_relative */
1252 complain_overflow_dont
,/* complain_on_overflow */
1253 bfd_elf_generic_reloc
, /* special_function */
1254 "R_ARM_LDC_SB_G1", /* name */
1255 FALSE
, /* partial_inplace */
1256 0xffffffff, /* src_mask */
1257 0xffffffff, /* dst_mask */
1258 TRUE
), /* pcrel_offset */
1260 HOWTO (R_ARM_LDC_SB_G2
, /* type */
1262 2, /* size (0 = byte, 1 = short, 2 = long) */
1264 TRUE
, /* pc_relative */
1266 complain_overflow_dont
,/* complain_on_overflow */
1267 bfd_elf_generic_reloc
, /* special_function */
1268 "R_ARM_LDC_SB_G2", /* name */
1269 FALSE
, /* partial_inplace */
1270 0xffffffff, /* src_mask */
1271 0xffffffff, /* dst_mask */
1272 TRUE
), /* pcrel_offset */
1274 /* End of group relocations. */
1276 HOWTO (R_ARM_MOVW_BREL_NC
, /* type */
1278 2, /* size (0 = byte, 1 = short, 2 = long) */
1280 FALSE
, /* pc_relative */
1282 complain_overflow_dont
,/* complain_on_overflow */
1283 bfd_elf_generic_reloc
, /* special_function */
1284 "R_ARM_MOVW_BREL_NC", /* name */
1285 FALSE
, /* partial_inplace */
1286 0x0000ffff, /* src_mask */
1287 0x0000ffff, /* dst_mask */
1288 FALSE
), /* pcrel_offset */
1290 HOWTO (R_ARM_MOVT_BREL
, /* type */
1292 2, /* size (0 = byte, 1 = short, 2 = long) */
1294 FALSE
, /* pc_relative */
1296 complain_overflow_bitfield
,/* complain_on_overflow */
1297 bfd_elf_generic_reloc
, /* special_function */
1298 "R_ARM_MOVT_BREL", /* name */
1299 FALSE
, /* partial_inplace */
1300 0x0000ffff, /* src_mask */
1301 0x0000ffff, /* dst_mask */
1302 FALSE
), /* pcrel_offset */
1304 HOWTO (R_ARM_MOVW_BREL
, /* type */
1306 2, /* size (0 = byte, 1 = short, 2 = long) */
1308 FALSE
, /* pc_relative */
1310 complain_overflow_dont
,/* complain_on_overflow */
1311 bfd_elf_generic_reloc
, /* special_function */
1312 "R_ARM_MOVW_BREL", /* name */
1313 FALSE
, /* partial_inplace */
1314 0x0000ffff, /* src_mask */
1315 0x0000ffff, /* dst_mask */
1316 FALSE
), /* pcrel_offset */
1318 HOWTO (R_ARM_THM_MOVW_BREL_NC
,/* type */
1320 2, /* size (0 = byte, 1 = short, 2 = long) */
1322 FALSE
, /* pc_relative */
1324 complain_overflow_dont
,/* complain_on_overflow */
1325 bfd_elf_generic_reloc
, /* special_function */
1326 "R_ARM_THM_MOVW_BREL_NC",/* name */
1327 FALSE
, /* partial_inplace */
1328 0x040f70ff, /* src_mask */
1329 0x040f70ff, /* dst_mask */
1330 FALSE
), /* pcrel_offset */
1332 HOWTO (R_ARM_THM_MOVT_BREL
, /* type */
1334 2, /* size (0 = byte, 1 = short, 2 = long) */
1336 FALSE
, /* pc_relative */
1338 complain_overflow_bitfield
,/* complain_on_overflow */
1339 bfd_elf_generic_reloc
, /* special_function */
1340 "R_ARM_THM_MOVT_BREL", /* name */
1341 FALSE
, /* partial_inplace */
1342 0x040f70ff, /* src_mask */
1343 0x040f70ff, /* dst_mask */
1344 FALSE
), /* pcrel_offset */
1346 HOWTO (R_ARM_THM_MOVW_BREL
, /* type */
1348 2, /* size (0 = byte, 1 = short, 2 = long) */
1350 FALSE
, /* pc_relative */
1352 complain_overflow_dont
,/* complain_on_overflow */
1353 bfd_elf_generic_reloc
, /* special_function */
1354 "R_ARM_THM_MOVW_BREL", /* name */
1355 FALSE
, /* partial_inplace */
1356 0x040f70ff, /* src_mask */
1357 0x040f70ff, /* dst_mask */
1358 FALSE
), /* pcrel_offset */
1360 HOWTO (R_ARM_TLS_GOTDESC
, /* type */
1362 2, /* size (0 = byte, 1 = short, 2 = long) */
1364 FALSE
, /* pc_relative */
1366 complain_overflow_bitfield
,/* complain_on_overflow */
1367 NULL
, /* special_function */
1368 "R_ARM_TLS_GOTDESC", /* name */
1369 TRUE
, /* partial_inplace */
1370 0xffffffff, /* src_mask */
1371 0xffffffff, /* dst_mask */
1372 FALSE
), /* pcrel_offset */
1374 HOWTO (R_ARM_TLS_CALL
, /* type */
1376 2, /* size (0 = byte, 1 = short, 2 = long) */
1378 FALSE
, /* pc_relative */
1380 complain_overflow_dont
,/* complain_on_overflow */
1381 bfd_elf_generic_reloc
, /* special_function */
1382 "R_ARM_TLS_CALL", /* name */
1383 FALSE
, /* partial_inplace */
1384 0x00ffffff, /* src_mask */
1385 0x00ffffff, /* dst_mask */
1386 FALSE
), /* pcrel_offset */
1388 HOWTO (R_ARM_TLS_DESCSEQ
, /* type */
1390 2, /* size (0 = byte, 1 = short, 2 = long) */
1392 FALSE
, /* pc_relative */
1394 complain_overflow_bitfield
,/* complain_on_overflow */
1395 bfd_elf_generic_reloc
, /* special_function */
1396 "R_ARM_TLS_DESCSEQ", /* name */
1397 FALSE
, /* partial_inplace */
1398 0x00000000, /* src_mask */
1399 0x00000000, /* dst_mask */
1400 FALSE
), /* pcrel_offset */
1402 HOWTO (R_ARM_THM_TLS_CALL
, /* type */
1404 2, /* size (0 = byte, 1 = short, 2 = long) */
1406 FALSE
, /* pc_relative */
1408 complain_overflow_dont
,/* complain_on_overflow */
1409 bfd_elf_generic_reloc
, /* special_function */
1410 "R_ARM_THM_TLS_CALL", /* name */
1411 FALSE
, /* partial_inplace */
1412 0x07ff07ff, /* src_mask */
1413 0x07ff07ff, /* dst_mask */
1414 FALSE
), /* pcrel_offset */
1416 HOWTO (R_ARM_PLT32_ABS
, /* type */
1418 2, /* size (0 = byte, 1 = short, 2 = long) */
1420 FALSE
, /* pc_relative */
1422 complain_overflow_dont
,/* complain_on_overflow */
1423 bfd_elf_generic_reloc
, /* special_function */
1424 "R_ARM_PLT32_ABS", /* name */
1425 FALSE
, /* partial_inplace */
1426 0xffffffff, /* src_mask */
1427 0xffffffff, /* dst_mask */
1428 FALSE
), /* pcrel_offset */
1430 HOWTO (R_ARM_GOT_ABS
, /* type */
1432 2, /* size (0 = byte, 1 = short, 2 = long) */
1434 FALSE
, /* pc_relative */
1436 complain_overflow_dont
,/* complain_on_overflow */
1437 bfd_elf_generic_reloc
, /* special_function */
1438 "R_ARM_GOT_ABS", /* name */
1439 FALSE
, /* partial_inplace */
1440 0xffffffff, /* src_mask */
1441 0xffffffff, /* dst_mask */
1442 FALSE
), /* pcrel_offset */
1444 HOWTO (R_ARM_GOT_PREL
, /* type */
1446 2, /* size (0 = byte, 1 = short, 2 = long) */
1448 TRUE
, /* pc_relative */
1450 complain_overflow_dont
, /* complain_on_overflow */
1451 bfd_elf_generic_reloc
, /* special_function */
1452 "R_ARM_GOT_PREL", /* name */
1453 FALSE
, /* partial_inplace */
1454 0xffffffff, /* src_mask */
1455 0xffffffff, /* dst_mask */
1456 TRUE
), /* pcrel_offset */
1458 HOWTO (R_ARM_GOT_BREL12
, /* type */
1460 2, /* size (0 = byte, 1 = short, 2 = long) */
1462 FALSE
, /* pc_relative */
1464 complain_overflow_bitfield
,/* complain_on_overflow */
1465 bfd_elf_generic_reloc
, /* special_function */
1466 "R_ARM_GOT_BREL12", /* name */
1467 FALSE
, /* partial_inplace */
1468 0x00000fff, /* src_mask */
1469 0x00000fff, /* dst_mask */
1470 FALSE
), /* pcrel_offset */
1472 HOWTO (R_ARM_GOTOFF12
, /* type */
1474 2, /* size (0 = byte, 1 = short, 2 = long) */
1476 FALSE
, /* pc_relative */
1478 complain_overflow_bitfield
,/* complain_on_overflow */
1479 bfd_elf_generic_reloc
, /* special_function */
1480 "R_ARM_GOTOFF12", /* name */
1481 FALSE
, /* partial_inplace */
1482 0x00000fff, /* src_mask */
1483 0x00000fff, /* dst_mask */
1484 FALSE
), /* pcrel_offset */
1486 EMPTY_HOWTO (R_ARM_GOTRELAX
), /* reserved for future GOT-load optimizations */
1488 /* GNU extension to record C++ vtable member usage */
1489 HOWTO (R_ARM_GNU_VTENTRY
, /* type */
1491 2, /* size (0 = byte, 1 = short, 2 = long) */
1493 FALSE
, /* pc_relative */
1495 complain_overflow_dont
, /* complain_on_overflow */
1496 _bfd_elf_rel_vtable_reloc_fn
, /* special_function */
1497 "R_ARM_GNU_VTENTRY", /* name */
1498 FALSE
, /* partial_inplace */
1501 FALSE
), /* pcrel_offset */
1503 /* GNU extension to record C++ vtable hierarchy */
1504 HOWTO (R_ARM_GNU_VTINHERIT
, /* type */
1506 2, /* size (0 = byte, 1 = short, 2 = long) */
1508 FALSE
, /* pc_relative */
1510 complain_overflow_dont
, /* complain_on_overflow */
1511 NULL
, /* special_function */
1512 "R_ARM_GNU_VTINHERIT", /* name */
1513 FALSE
, /* partial_inplace */
1516 FALSE
), /* pcrel_offset */
1518 HOWTO (R_ARM_THM_JUMP11
, /* type */
1520 1, /* size (0 = byte, 1 = short, 2 = long) */
1522 TRUE
, /* pc_relative */
1524 complain_overflow_signed
, /* complain_on_overflow */
1525 bfd_elf_generic_reloc
, /* special_function */
1526 "R_ARM_THM_JUMP11", /* name */
1527 FALSE
, /* partial_inplace */
1528 0x000007ff, /* src_mask */
1529 0x000007ff, /* dst_mask */
1530 TRUE
), /* pcrel_offset */
1532 HOWTO (R_ARM_THM_JUMP8
, /* type */
1534 1, /* size (0 = byte, 1 = short, 2 = long) */
1536 TRUE
, /* pc_relative */
1538 complain_overflow_signed
, /* complain_on_overflow */
1539 bfd_elf_generic_reloc
, /* special_function */
1540 "R_ARM_THM_JUMP8", /* name */
1541 FALSE
, /* partial_inplace */
1542 0x000000ff, /* src_mask */
1543 0x000000ff, /* dst_mask */
1544 TRUE
), /* pcrel_offset */
1546 /* TLS relocations */
1547 HOWTO (R_ARM_TLS_GD32
, /* type */
1549 2, /* size (0 = byte, 1 = short, 2 = long) */
1551 FALSE
, /* pc_relative */
1553 complain_overflow_bitfield
,/* complain_on_overflow */
1554 NULL
, /* special_function */
1555 "R_ARM_TLS_GD32", /* name */
1556 TRUE
, /* partial_inplace */
1557 0xffffffff, /* src_mask */
1558 0xffffffff, /* dst_mask */
1559 FALSE
), /* pcrel_offset */
1561 HOWTO (R_ARM_TLS_LDM32
, /* type */
1563 2, /* size (0 = byte, 1 = short, 2 = long) */
1565 FALSE
, /* pc_relative */
1567 complain_overflow_bitfield
,/* complain_on_overflow */
1568 bfd_elf_generic_reloc
, /* special_function */
1569 "R_ARM_TLS_LDM32", /* name */
1570 TRUE
, /* partial_inplace */
1571 0xffffffff, /* src_mask */
1572 0xffffffff, /* dst_mask */
1573 FALSE
), /* pcrel_offset */
1575 HOWTO (R_ARM_TLS_LDO32
, /* type */
1577 2, /* size (0 = byte, 1 = short, 2 = long) */
1579 FALSE
, /* pc_relative */
1581 complain_overflow_bitfield
,/* complain_on_overflow */
1582 bfd_elf_generic_reloc
, /* special_function */
1583 "R_ARM_TLS_LDO32", /* name */
1584 TRUE
, /* partial_inplace */
1585 0xffffffff, /* src_mask */
1586 0xffffffff, /* dst_mask */
1587 FALSE
), /* pcrel_offset */
1589 HOWTO (R_ARM_TLS_IE32
, /* type */
1591 2, /* size (0 = byte, 1 = short, 2 = long) */
1593 FALSE
, /* pc_relative */
1595 complain_overflow_bitfield
,/* complain_on_overflow */
1596 NULL
, /* special_function */
1597 "R_ARM_TLS_IE32", /* name */
1598 TRUE
, /* partial_inplace */
1599 0xffffffff, /* src_mask */
1600 0xffffffff, /* dst_mask */
1601 FALSE
), /* pcrel_offset */
1603 HOWTO (R_ARM_TLS_LE32
, /* type */
1605 2, /* size (0 = byte, 1 = short, 2 = long) */
1607 FALSE
, /* pc_relative */
1609 complain_overflow_bitfield
,/* complain_on_overflow */
1610 NULL
, /* special_function */
1611 "R_ARM_TLS_LE32", /* name */
1612 TRUE
, /* partial_inplace */
1613 0xffffffff, /* src_mask */
1614 0xffffffff, /* dst_mask */
1615 FALSE
), /* pcrel_offset */
1617 HOWTO (R_ARM_TLS_LDO12
, /* type */
1619 2, /* size (0 = byte, 1 = short, 2 = long) */
1621 FALSE
, /* pc_relative */
1623 complain_overflow_bitfield
,/* complain_on_overflow */
1624 bfd_elf_generic_reloc
, /* special_function */
1625 "R_ARM_TLS_LDO12", /* name */
1626 FALSE
, /* partial_inplace */
1627 0x00000fff, /* src_mask */
1628 0x00000fff, /* dst_mask */
1629 FALSE
), /* pcrel_offset */
1631 HOWTO (R_ARM_TLS_LE12
, /* type */
1633 2, /* size (0 = byte, 1 = short, 2 = long) */
1635 FALSE
, /* pc_relative */
1637 complain_overflow_bitfield
,/* complain_on_overflow */
1638 bfd_elf_generic_reloc
, /* special_function */
1639 "R_ARM_TLS_LE12", /* name */
1640 FALSE
, /* partial_inplace */
1641 0x00000fff, /* src_mask */
1642 0x00000fff, /* dst_mask */
1643 FALSE
), /* pcrel_offset */
1645 HOWTO (R_ARM_TLS_IE12GP
, /* type */
1647 2, /* size (0 = byte, 1 = short, 2 = long) */
1649 FALSE
, /* pc_relative */
1651 complain_overflow_bitfield
,/* complain_on_overflow */
1652 bfd_elf_generic_reloc
, /* special_function */
1653 "R_ARM_TLS_IE12GP", /* name */
1654 FALSE
, /* partial_inplace */
1655 0x00000fff, /* src_mask */
1656 0x00000fff, /* dst_mask */
1657 FALSE
), /* pcrel_offset */
1659 /* 112-127 private relocations. */
1677 /* R_ARM_ME_TOO, obsolete. */
1680 HOWTO (R_ARM_THM_TLS_DESCSEQ
, /* type */
1682 1, /* size (0 = byte, 1 = short, 2 = long) */
1684 FALSE
, /* pc_relative */
1686 complain_overflow_bitfield
,/* complain_on_overflow */
1687 bfd_elf_generic_reloc
, /* special_function */
1688 "R_ARM_THM_TLS_DESCSEQ",/* name */
1689 FALSE
, /* partial_inplace */
1690 0x00000000, /* src_mask */
1691 0x00000000, /* dst_mask */
1692 FALSE
), /* pcrel_offset */
1695 HOWTO (R_ARM_THM_ALU_ABS_G0_NC
,/* type. */
1696 0, /* rightshift. */
1697 1, /* size (0 = byte, 1 = short, 2 = long). */
1699 FALSE
, /* pc_relative. */
1701 complain_overflow_bitfield
,/* complain_on_overflow. */
1702 bfd_elf_generic_reloc
, /* special_function. */
1703 "R_ARM_THM_ALU_ABS_G0_NC",/* name. */
1704 FALSE
, /* partial_inplace. */
1705 0x00000000, /* src_mask. */
1706 0x00000000, /* dst_mask. */
1707 FALSE
), /* pcrel_offset. */
1708 HOWTO (R_ARM_THM_ALU_ABS_G1_NC
,/* type. */
1709 0, /* rightshift. */
1710 1, /* size (0 = byte, 1 = short, 2 = long). */
1712 FALSE
, /* pc_relative. */
1714 complain_overflow_bitfield
,/* complain_on_overflow. */
1715 bfd_elf_generic_reloc
, /* special_function. */
1716 "R_ARM_THM_ALU_ABS_G1_NC",/* name. */
1717 FALSE
, /* partial_inplace. */
1718 0x00000000, /* src_mask. */
1719 0x00000000, /* dst_mask. */
1720 FALSE
), /* pcrel_offset. */
1721 HOWTO (R_ARM_THM_ALU_ABS_G2_NC
,/* type. */
1722 0, /* rightshift. */
1723 1, /* size (0 = byte, 1 = short, 2 = long). */
1725 FALSE
, /* pc_relative. */
1727 complain_overflow_bitfield
,/* complain_on_overflow. */
1728 bfd_elf_generic_reloc
, /* special_function. */
1729 "R_ARM_THM_ALU_ABS_G2_NC",/* name. */
1730 FALSE
, /* partial_inplace. */
1731 0x00000000, /* src_mask. */
1732 0x00000000, /* dst_mask. */
1733 FALSE
), /* pcrel_offset. */
1734 HOWTO (R_ARM_THM_ALU_ABS_G3_NC
,/* type. */
1735 0, /* rightshift. */
1736 1, /* size (0 = byte, 1 = short, 2 = long). */
1738 FALSE
, /* pc_relative. */
1740 complain_overflow_bitfield
,/* complain_on_overflow. */
1741 bfd_elf_generic_reloc
, /* special_function. */
1742 "R_ARM_THM_ALU_ABS_G3_NC",/* name. */
1743 FALSE
, /* partial_inplace. */
1744 0x00000000, /* src_mask. */
1745 0x00000000, /* dst_mask. */
1746 FALSE
), /* pcrel_offset. */
1747 /* Relocations for Armv8.1-M Mainline. */
1748 HOWTO (R_ARM_THM_BF16
, /* type. */
1749 0, /* rightshift. */
1750 1, /* size (0 = byte, 1 = short, 2 = long). */
1752 TRUE
, /* pc_relative. */
1754 complain_overflow_dont
,/* do not complain_on_overflow. */
1755 bfd_elf_generic_reloc
, /* special_function. */
1756 "R_ARM_THM_BF16", /* name. */
1757 FALSE
, /* partial_inplace. */
1758 0x001f0ffe, /* src_mask. */
1759 0x001f0ffe, /* dst_mask. */
1760 TRUE
), /* pcrel_offset. */
1761 HOWTO (R_ARM_THM_BF12
, /* type. */
1762 0, /* rightshift. */
1763 1, /* size (0 = byte, 1 = short, 2 = long). */
1765 TRUE
, /* pc_relative. */
1767 complain_overflow_dont
,/* do not complain_on_overflow. */
1768 bfd_elf_generic_reloc
, /* special_function. */
1769 "R_ARM_THM_BF12", /* name. */
1770 FALSE
, /* partial_inplace. */
1771 0x00010ffe, /* src_mask. */
1772 0x00010ffe, /* dst_mask. */
1773 TRUE
), /* pcrel_offset. */
1774 HOWTO (R_ARM_THM_BF18
, /* type. */
1775 0, /* rightshift. */
1776 1, /* size (0 = byte, 1 = short, 2 = long). */
1778 TRUE
, /* pc_relative. */
1780 complain_overflow_dont
,/* do not complain_on_overflow. */
1781 bfd_elf_generic_reloc
, /* special_function. */
1782 "R_ARM_THM_BF18", /* name. */
1783 FALSE
, /* partial_inplace. */
1784 0x007f0ffe, /* src_mask. */
1785 0x007f0ffe, /* dst_mask. */
1786 TRUE
), /* pcrel_offset. */
1790 static reloc_howto_type elf32_arm_howto_table_2
[8] =
1792 HOWTO (R_ARM_IRELATIVE
, /* type */
1794 2, /* size (0 = byte, 1 = short, 2 = long) */
1796 FALSE
, /* pc_relative */
1798 complain_overflow_bitfield
,/* complain_on_overflow */
1799 bfd_elf_generic_reloc
, /* special_function */
1800 "R_ARM_IRELATIVE", /* name */
1801 TRUE
, /* partial_inplace */
1802 0xffffffff, /* src_mask */
1803 0xffffffff, /* dst_mask */
1804 FALSE
), /* pcrel_offset */
1805 HOWTO (R_ARM_GOTFUNCDESC
, /* type */
1807 2, /* size (0 = byte, 1 = short, 2 = long) */
1809 FALSE
, /* pc_relative */
1811 complain_overflow_bitfield
,/* complain_on_overflow */
1812 bfd_elf_generic_reloc
, /* special_function */
1813 "R_ARM_GOTFUNCDESC", /* name */
1814 FALSE
, /* partial_inplace */
1816 0xffffffff, /* dst_mask */
1817 FALSE
), /* pcrel_offset */
1818 HOWTO (R_ARM_GOTOFFFUNCDESC
, /* type */
1820 2, /* size (0 = byte, 1 = short, 2 = long) */
1822 FALSE
, /* pc_relative */
1824 complain_overflow_bitfield
,/* complain_on_overflow */
1825 bfd_elf_generic_reloc
, /* special_function */
1826 "R_ARM_GOTOFFFUNCDESC",/* name */
1827 FALSE
, /* partial_inplace */
1829 0xffffffff, /* dst_mask */
1830 FALSE
), /* pcrel_offset */
1831 HOWTO (R_ARM_FUNCDESC
, /* type */
1833 2, /* size (0 = byte, 1 = short, 2 = long) */
1835 FALSE
, /* pc_relative */
1837 complain_overflow_bitfield
,/* complain_on_overflow */
1838 bfd_elf_generic_reloc
, /* special_function */
1839 "R_ARM_FUNCDESC", /* name */
1840 FALSE
, /* partial_inplace */
1842 0xffffffff, /* dst_mask */
1843 FALSE
), /* pcrel_offset */
1844 HOWTO (R_ARM_FUNCDESC_VALUE
, /* type */
1846 2, /* size (0 = byte, 1 = short, 2 = long) */
1848 FALSE
, /* pc_relative */
1850 complain_overflow_bitfield
,/* complain_on_overflow */
1851 bfd_elf_generic_reloc
, /* special_function */
1852 "R_ARM_FUNCDESC_VALUE",/* name */
1853 FALSE
, /* partial_inplace */
1855 0xffffffff, /* dst_mask */
1856 FALSE
), /* pcrel_offset */
1857 HOWTO (R_ARM_TLS_GD32_FDPIC
, /* type */
1859 2, /* size (0 = byte, 1 = short, 2 = long) */
1861 FALSE
, /* pc_relative */
1863 complain_overflow_bitfield
,/* complain_on_overflow */
1864 bfd_elf_generic_reloc
, /* special_function */
1865 "R_ARM_TLS_GD32_FDPIC",/* name */
1866 FALSE
, /* partial_inplace */
1868 0xffffffff, /* dst_mask */
1869 FALSE
), /* pcrel_offset */
1870 HOWTO (R_ARM_TLS_LDM32_FDPIC
, /* type */
1872 2, /* size (0 = byte, 1 = short, 2 = long) */
1874 FALSE
, /* pc_relative */
1876 complain_overflow_bitfield
,/* complain_on_overflow */
1877 bfd_elf_generic_reloc
, /* special_function */
1878 "R_ARM_TLS_LDM32_FDPIC",/* name */
1879 FALSE
, /* partial_inplace */
1881 0xffffffff, /* dst_mask */
1882 FALSE
), /* pcrel_offset */
1883 HOWTO (R_ARM_TLS_IE32_FDPIC
, /* type */
1885 2, /* size (0 = byte, 1 = short, 2 = long) */
1887 FALSE
, /* pc_relative */
1889 complain_overflow_bitfield
,/* complain_on_overflow */
1890 bfd_elf_generic_reloc
, /* special_function */
1891 "R_ARM_TLS_IE32_FDPIC",/* name */
1892 FALSE
, /* partial_inplace */
1894 0xffffffff, /* dst_mask */
1895 FALSE
), /* pcrel_offset */
1898 /* 249-255 extended, currently unused, relocations: */
1899 static reloc_howto_type elf32_arm_howto_table_3
[4] =
1901 HOWTO (R_ARM_RREL32
, /* type */
1903 0, /* size (0 = byte, 1 = short, 2 = long) */
1905 FALSE
, /* pc_relative */
1907 complain_overflow_dont
,/* complain_on_overflow */
1908 bfd_elf_generic_reloc
, /* special_function */
1909 "R_ARM_RREL32", /* name */
1910 FALSE
, /* partial_inplace */
1913 FALSE
), /* pcrel_offset */
1915 HOWTO (R_ARM_RABS32
, /* type */
1917 0, /* size (0 = byte, 1 = short, 2 = long) */
1919 FALSE
, /* pc_relative */
1921 complain_overflow_dont
,/* complain_on_overflow */
1922 bfd_elf_generic_reloc
, /* special_function */
1923 "R_ARM_RABS32", /* name */
1924 FALSE
, /* partial_inplace */
1927 FALSE
), /* pcrel_offset */
1929 HOWTO (R_ARM_RPC24
, /* type */
1931 0, /* size (0 = byte, 1 = short, 2 = long) */
1933 FALSE
, /* pc_relative */
1935 complain_overflow_dont
,/* complain_on_overflow */
1936 bfd_elf_generic_reloc
, /* special_function */
1937 "R_ARM_RPC24", /* name */
1938 FALSE
, /* partial_inplace */
1941 FALSE
), /* pcrel_offset */
1943 HOWTO (R_ARM_RBASE
, /* type */
1945 0, /* size (0 = byte, 1 = short, 2 = long) */
1947 FALSE
, /* pc_relative */
1949 complain_overflow_dont
,/* complain_on_overflow */
1950 bfd_elf_generic_reloc
, /* special_function */
1951 "R_ARM_RBASE", /* name */
1952 FALSE
, /* partial_inplace */
1955 FALSE
) /* pcrel_offset */
1958 static reloc_howto_type
*
1959 elf32_arm_howto_from_type (unsigned int r_type
)
1961 if (r_type
< ARRAY_SIZE (elf32_arm_howto_table_1
))
1962 return &elf32_arm_howto_table_1
[r_type
];
1964 if (r_type
>= R_ARM_IRELATIVE
1965 && r_type
< R_ARM_IRELATIVE
+ ARRAY_SIZE (elf32_arm_howto_table_2
))
1966 return &elf32_arm_howto_table_2
[r_type
- R_ARM_IRELATIVE
];
1968 if (r_type
>= R_ARM_RREL32
1969 && r_type
< R_ARM_RREL32
+ ARRAY_SIZE (elf32_arm_howto_table_3
))
1970 return &elf32_arm_howto_table_3
[r_type
- R_ARM_RREL32
];
1976 elf32_arm_info_to_howto (bfd
* abfd
, arelent
* bfd_reloc
,
1977 Elf_Internal_Rela
* elf_reloc
)
1979 unsigned int r_type
;
1981 r_type
= ELF32_R_TYPE (elf_reloc
->r_info
);
1982 if ((bfd_reloc
->howto
= elf32_arm_howto_from_type (r_type
)) == NULL
)
1984 /* xgettext:c-format */
1985 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
1987 bfd_set_error (bfd_error_bad_value
);
1993 struct elf32_arm_reloc_map
1995 bfd_reloc_code_real_type bfd_reloc_val
;
1996 unsigned char elf_reloc_val
;
1999 /* All entries in this list must also be present in elf32_arm_howto_table. */
2000 static const struct elf32_arm_reloc_map elf32_arm_reloc_map
[] =
2002 {BFD_RELOC_NONE
, R_ARM_NONE
},
2003 {BFD_RELOC_ARM_PCREL_BRANCH
, R_ARM_PC24
},
2004 {BFD_RELOC_ARM_PCREL_CALL
, R_ARM_CALL
},
2005 {BFD_RELOC_ARM_PCREL_JUMP
, R_ARM_JUMP24
},
2006 {BFD_RELOC_ARM_PCREL_BLX
, R_ARM_XPC25
},
2007 {BFD_RELOC_THUMB_PCREL_BLX
, R_ARM_THM_XPC22
},
2008 {BFD_RELOC_32
, R_ARM_ABS32
},
2009 {BFD_RELOC_32_PCREL
, R_ARM_REL32
},
2010 {BFD_RELOC_8
, R_ARM_ABS8
},
2011 {BFD_RELOC_16
, R_ARM_ABS16
},
2012 {BFD_RELOC_ARM_OFFSET_IMM
, R_ARM_ABS12
},
2013 {BFD_RELOC_ARM_THUMB_OFFSET
, R_ARM_THM_ABS5
},
2014 {BFD_RELOC_THUMB_PCREL_BRANCH25
, R_ARM_THM_JUMP24
},
2015 {BFD_RELOC_THUMB_PCREL_BRANCH23
, R_ARM_THM_CALL
},
2016 {BFD_RELOC_THUMB_PCREL_BRANCH12
, R_ARM_THM_JUMP11
},
2017 {BFD_RELOC_THUMB_PCREL_BRANCH20
, R_ARM_THM_JUMP19
},
2018 {BFD_RELOC_THUMB_PCREL_BRANCH9
, R_ARM_THM_JUMP8
},
2019 {BFD_RELOC_THUMB_PCREL_BRANCH7
, R_ARM_THM_JUMP6
},
2020 {BFD_RELOC_ARM_GLOB_DAT
, R_ARM_GLOB_DAT
},
2021 {BFD_RELOC_ARM_JUMP_SLOT
, R_ARM_JUMP_SLOT
},
2022 {BFD_RELOC_ARM_RELATIVE
, R_ARM_RELATIVE
},
2023 {BFD_RELOC_ARM_GOTOFF
, R_ARM_GOTOFF32
},
2024 {BFD_RELOC_ARM_GOTPC
, R_ARM_GOTPC
},
2025 {BFD_RELOC_ARM_GOT_PREL
, R_ARM_GOT_PREL
},
2026 {BFD_RELOC_ARM_GOT32
, R_ARM_GOT32
},
2027 {BFD_RELOC_ARM_PLT32
, R_ARM_PLT32
},
2028 {BFD_RELOC_ARM_TARGET1
, R_ARM_TARGET1
},
2029 {BFD_RELOC_ARM_ROSEGREL32
, R_ARM_ROSEGREL32
},
2030 {BFD_RELOC_ARM_SBREL32
, R_ARM_SBREL32
},
2031 {BFD_RELOC_ARM_PREL31
, R_ARM_PREL31
},
2032 {BFD_RELOC_ARM_TARGET2
, R_ARM_TARGET2
},
2033 {BFD_RELOC_ARM_PLT32
, R_ARM_PLT32
},
2034 {BFD_RELOC_ARM_TLS_GOTDESC
, R_ARM_TLS_GOTDESC
},
2035 {BFD_RELOC_ARM_TLS_CALL
, R_ARM_TLS_CALL
},
2036 {BFD_RELOC_ARM_THM_TLS_CALL
, R_ARM_THM_TLS_CALL
},
2037 {BFD_RELOC_ARM_TLS_DESCSEQ
, R_ARM_TLS_DESCSEQ
},
2038 {BFD_RELOC_ARM_THM_TLS_DESCSEQ
, R_ARM_THM_TLS_DESCSEQ
},
2039 {BFD_RELOC_ARM_TLS_DESC
, R_ARM_TLS_DESC
},
2040 {BFD_RELOC_ARM_TLS_GD32
, R_ARM_TLS_GD32
},
2041 {BFD_RELOC_ARM_TLS_LDO32
, R_ARM_TLS_LDO32
},
2042 {BFD_RELOC_ARM_TLS_LDM32
, R_ARM_TLS_LDM32
},
2043 {BFD_RELOC_ARM_TLS_DTPMOD32
, R_ARM_TLS_DTPMOD32
},
2044 {BFD_RELOC_ARM_TLS_DTPOFF32
, R_ARM_TLS_DTPOFF32
},
2045 {BFD_RELOC_ARM_TLS_TPOFF32
, R_ARM_TLS_TPOFF32
},
2046 {BFD_RELOC_ARM_TLS_IE32
, R_ARM_TLS_IE32
},
2047 {BFD_RELOC_ARM_TLS_LE32
, R_ARM_TLS_LE32
},
2048 {BFD_RELOC_ARM_IRELATIVE
, R_ARM_IRELATIVE
},
2049 {BFD_RELOC_ARM_GOTFUNCDESC
, R_ARM_GOTFUNCDESC
},
2050 {BFD_RELOC_ARM_GOTOFFFUNCDESC
, R_ARM_GOTOFFFUNCDESC
},
2051 {BFD_RELOC_ARM_FUNCDESC
, R_ARM_FUNCDESC
},
2052 {BFD_RELOC_ARM_FUNCDESC_VALUE
, R_ARM_FUNCDESC_VALUE
},
2053 {BFD_RELOC_ARM_TLS_GD32_FDPIC
, R_ARM_TLS_GD32_FDPIC
},
2054 {BFD_RELOC_ARM_TLS_LDM32_FDPIC
, R_ARM_TLS_LDM32_FDPIC
},
2055 {BFD_RELOC_ARM_TLS_IE32_FDPIC
, R_ARM_TLS_IE32_FDPIC
},
2056 {BFD_RELOC_VTABLE_INHERIT
, R_ARM_GNU_VTINHERIT
},
2057 {BFD_RELOC_VTABLE_ENTRY
, R_ARM_GNU_VTENTRY
},
2058 {BFD_RELOC_ARM_MOVW
, R_ARM_MOVW_ABS_NC
},
2059 {BFD_RELOC_ARM_MOVT
, R_ARM_MOVT_ABS
},
2060 {BFD_RELOC_ARM_MOVW_PCREL
, R_ARM_MOVW_PREL_NC
},
2061 {BFD_RELOC_ARM_MOVT_PCREL
, R_ARM_MOVT_PREL
},
2062 {BFD_RELOC_ARM_THUMB_MOVW
, R_ARM_THM_MOVW_ABS_NC
},
2063 {BFD_RELOC_ARM_THUMB_MOVT
, R_ARM_THM_MOVT_ABS
},
2064 {BFD_RELOC_ARM_THUMB_MOVW_PCREL
, R_ARM_THM_MOVW_PREL_NC
},
2065 {BFD_RELOC_ARM_THUMB_MOVT_PCREL
, R_ARM_THM_MOVT_PREL
},
2066 {BFD_RELOC_ARM_ALU_PC_G0_NC
, R_ARM_ALU_PC_G0_NC
},
2067 {BFD_RELOC_ARM_ALU_PC_G0
, R_ARM_ALU_PC_G0
},
2068 {BFD_RELOC_ARM_ALU_PC_G1_NC
, R_ARM_ALU_PC_G1_NC
},
2069 {BFD_RELOC_ARM_ALU_PC_G1
, R_ARM_ALU_PC_G1
},
2070 {BFD_RELOC_ARM_ALU_PC_G2
, R_ARM_ALU_PC_G2
},
2071 {BFD_RELOC_ARM_LDR_PC_G0
, R_ARM_LDR_PC_G0
},
2072 {BFD_RELOC_ARM_LDR_PC_G1
, R_ARM_LDR_PC_G1
},
2073 {BFD_RELOC_ARM_LDR_PC_G2
, R_ARM_LDR_PC_G2
},
2074 {BFD_RELOC_ARM_LDRS_PC_G0
, R_ARM_LDRS_PC_G0
},
2075 {BFD_RELOC_ARM_LDRS_PC_G1
, R_ARM_LDRS_PC_G1
},
2076 {BFD_RELOC_ARM_LDRS_PC_G2
, R_ARM_LDRS_PC_G2
},
2077 {BFD_RELOC_ARM_LDC_PC_G0
, R_ARM_LDC_PC_G0
},
2078 {BFD_RELOC_ARM_LDC_PC_G1
, R_ARM_LDC_PC_G1
},
2079 {BFD_RELOC_ARM_LDC_PC_G2
, R_ARM_LDC_PC_G2
},
2080 {BFD_RELOC_ARM_ALU_SB_G0_NC
, R_ARM_ALU_SB_G0_NC
},
2081 {BFD_RELOC_ARM_ALU_SB_G0
, R_ARM_ALU_SB_G0
},
2082 {BFD_RELOC_ARM_ALU_SB_G1_NC
, R_ARM_ALU_SB_G1_NC
},
2083 {BFD_RELOC_ARM_ALU_SB_G1
, R_ARM_ALU_SB_G1
},
2084 {BFD_RELOC_ARM_ALU_SB_G2
, R_ARM_ALU_SB_G2
},
2085 {BFD_RELOC_ARM_LDR_SB_G0
, R_ARM_LDR_SB_G0
},
2086 {BFD_RELOC_ARM_LDR_SB_G1
, R_ARM_LDR_SB_G1
},
2087 {BFD_RELOC_ARM_LDR_SB_G2
, R_ARM_LDR_SB_G2
},
2088 {BFD_RELOC_ARM_LDRS_SB_G0
, R_ARM_LDRS_SB_G0
},
2089 {BFD_RELOC_ARM_LDRS_SB_G1
, R_ARM_LDRS_SB_G1
},
2090 {BFD_RELOC_ARM_LDRS_SB_G2
, R_ARM_LDRS_SB_G2
},
2091 {BFD_RELOC_ARM_LDC_SB_G0
, R_ARM_LDC_SB_G0
},
2092 {BFD_RELOC_ARM_LDC_SB_G1
, R_ARM_LDC_SB_G1
},
2093 {BFD_RELOC_ARM_LDC_SB_G2
, R_ARM_LDC_SB_G2
},
2094 {BFD_RELOC_ARM_V4BX
, R_ARM_V4BX
},
2095 {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC
, R_ARM_THM_ALU_ABS_G3_NC
},
2096 {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC
, R_ARM_THM_ALU_ABS_G2_NC
},
2097 {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC
, R_ARM_THM_ALU_ABS_G1_NC
},
2098 {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC
, R_ARM_THM_ALU_ABS_G0_NC
},
2099 {BFD_RELOC_ARM_THUMB_BF17
, R_ARM_THM_BF16
},
2100 {BFD_RELOC_ARM_THUMB_BF13
, R_ARM_THM_BF12
},
2101 {BFD_RELOC_ARM_THUMB_BF19
, R_ARM_THM_BF18
}
2104 static reloc_howto_type
*
2105 elf32_arm_reloc_type_lookup (bfd
*abfd ATTRIBUTE_UNUSED
,
2106 bfd_reloc_code_real_type code
)
2110 for (i
= 0; i
< ARRAY_SIZE (elf32_arm_reloc_map
); i
++)
2111 if (elf32_arm_reloc_map
[i
].bfd_reloc_val
== code
)
2112 return elf32_arm_howto_from_type (elf32_arm_reloc_map
[i
].elf_reloc_val
);
2117 static reloc_howto_type
*
2118 elf32_arm_reloc_name_lookup (bfd
*abfd ATTRIBUTE_UNUSED
,
2123 for (i
= 0; i
< ARRAY_SIZE (elf32_arm_howto_table_1
); i
++)
2124 if (elf32_arm_howto_table_1
[i
].name
!= NULL
2125 && strcasecmp (elf32_arm_howto_table_1
[i
].name
, r_name
) == 0)
2126 return &elf32_arm_howto_table_1
[i
];
2128 for (i
= 0; i
< ARRAY_SIZE (elf32_arm_howto_table_2
); i
++)
2129 if (elf32_arm_howto_table_2
[i
].name
!= NULL
2130 && strcasecmp (elf32_arm_howto_table_2
[i
].name
, r_name
) == 0)
2131 return &elf32_arm_howto_table_2
[i
];
2133 for (i
= 0; i
< ARRAY_SIZE (elf32_arm_howto_table_3
); i
++)
2134 if (elf32_arm_howto_table_3
[i
].name
!= NULL
2135 && strcasecmp (elf32_arm_howto_table_3
[i
].name
, r_name
) == 0)
2136 return &elf32_arm_howto_table_3
[i
];
2141 /* Support for core dump NOTE sections. */
2144 elf32_arm_nabi_grok_prstatus (bfd
*abfd
, Elf_Internal_Note
*note
)
2149 switch (note
->descsz
)
2154 case 148: /* Linux/ARM 32-bit. */
2156 elf_tdata (abfd
)->core
->signal
= bfd_get_16 (abfd
, note
->descdata
+ 12);
2159 elf_tdata (abfd
)->core
->lwpid
= bfd_get_32 (abfd
, note
->descdata
+ 24);
2168 /* Make a ".reg/999" section. */
2169 return _bfd_elfcore_make_pseudosection (abfd
, ".reg",
2170 size
, note
->descpos
+ offset
);
2174 elf32_arm_nabi_grok_psinfo (bfd
*abfd
, Elf_Internal_Note
*note
)
2176 switch (note
->descsz
)
2181 case 124: /* Linux/ARM elf_prpsinfo. */
2182 elf_tdata (abfd
)->core
->pid
2183 = bfd_get_32 (abfd
, note
->descdata
+ 12);
2184 elf_tdata (abfd
)->core
->program
2185 = _bfd_elfcore_strndup (abfd
, note
->descdata
+ 28, 16);
2186 elf_tdata (abfd
)->core
->command
2187 = _bfd_elfcore_strndup (abfd
, note
->descdata
+ 44, 80);
2190 /* Note that for some reason, a spurious space is tacked
2191 onto the end of the args in some (at least one anyway)
2192 implementations, so strip it off if it exists. */
2194 char *command
= elf_tdata (abfd
)->core
->command
;
2195 int n
= strlen (command
);
2197 if (0 < n
&& command
[n
- 1] == ' ')
2198 command
[n
- 1] = '\0';
2205 elf32_arm_nabi_write_core_note (bfd
*abfd
, char *buf
, int *bufsiz
,
2215 char data
[124] ATTRIBUTE_NONSTRING
;
2218 va_start (ap
, note_type
);
2219 memset (data
, 0, sizeof (data
));
2220 strncpy (data
+ 28, va_arg (ap
, const char *), 16);
2221 #if GCC_VERSION == 8000 || GCC_VERSION == 8001
2223 /* GCC 8.0 and 8.1 warn about 80 equals destination size with
2224 -Wstringop-truncation:
2225 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85643
2227 DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION
;
2229 strncpy (data
+ 44, va_arg (ap
, const char *), 80);
2230 #if GCC_VERSION == 8000 || GCC_VERSION == 8001
2235 return elfcore_write_note (abfd
, buf
, bufsiz
,
2236 "CORE", note_type
, data
, sizeof (data
));
2247 va_start (ap
, note_type
);
2248 memset (data
, 0, sizeof (data
));
2249 pid
= va_arg (ap
, long);
2250 bfd_put_32 (abfd
, pid
, data
+ 24);
2251 cursig
= va_arg (ap
, int);
2252 bfd_put_16 (abfd
, cursig
, data
+ 12);
2253 greg
= va_arg (ap
, const void *);
2254 memcpy (data
+ 72, greg
, 72);
2257 return elfcore_write_note (abfd
, buf
, bufsiz
,
2258 "CORE", note_type
, data
, sizeof (data
));
2263 #define TARGET_LITTLE_SYM arm_elf32_le_vec
2264 #define TARGET_LITTLE_NAME "elf32-littlearm"
2265 #define TARGET_BIG_SYM arm_elf32_be_vec
2266 #define TARGET_BIG_NAME "elf32-bigarm"
2268 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2269 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2270 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2272 typedef unsigned long int insn32
;
2273 typedef unsigned short int insn16
;
2275 /* In lieu of proper flags, assume all EABIv4 or later objects are
2277 #define INTERWORK_FLAG(abfd) \
2278 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2279 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2280 || ((abfd)->flags & BFD_LINKER_CREATED))
2282 /* The linker script knows the section names for placement.
2283 The entry_names are used to do simple name mangling on the stubs.
2284 Given a function name, and its type, the stub can be found. The
2285 name can be changed. The only requirement is the %s be present. */
2286 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2287 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2289 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2290 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2292 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2293 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2295 #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer"
2296 #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "__stm32l4xx_veneer_%x"
2298 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2299 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2301 #define STUB_ENTRY_NAME "__%s_veneer"
2303 #define CMSE_PREFIX "__acle_se_"
2305 #define CMSE_STUB_NAME ".gnu.sgstubs"
2307 /* The name of the dynamic interpreter. This is put in the .interp
2309 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2311 /* FDPIC default stack size. */
2312 #define DEFAULT_STACK_SIZE 0x8000
2314 static const unsigned long tls_trampoline
[] =
2316 0xe08e0000, /* add r0, lr, r0 */
2317 0xe5901004, /* ldr r1, [r0,#4] */
2318 0xe12fff11, /* bx r1 */
2321 static const unsigned long dl_tlsdesc_lazy_trampoline
[] =
2323 0xe52d2004, /* push {r2} */
2324 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2325 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2326 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2327 0xe081100f, /* 2: add r1, pc */
2328 0xe12fff12, /* bx r2 */
2329 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2330 + dl_tlsdesc_lazy_resolver(GOT) */
2331 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2334 /* NOTE: [Thumb nop sequence]
2335 When adding code that transitions from Thumb to Arm the instruction that
2336 should be used for the alignment padding should be 0xe7fd (b .-2) instead of
2337 a nop for performance reasons. */
2339 /* ARM FDPIC PLT entry. */
2340 /* The last 5 words contain PLT lazy fragment code and data. */
2341 static const bfd_vma elf32_arm_fdpic_plt_entry
[] =
2343 0xe59fc008, /* ldr r12, .L1 */
2344 0xe08cc009, /* add r12, r12, r9 */
2345 0xe59c9004, /* ldr r9, [r12, #4] */
2346 0xe59cf000, /* ldr pc, [r12] */
2347 0x00000000, /* L1. .word foo(GOTOFFFUNCDESC) */
2348 0x00000000, /* L1. .word foo(funcdesc_value_reloc_offset) */
2349 0xe51fc00c, /* ldr r12, [pc, #-12] */
2350 0xe92d1000, /* push {r12} */
2351 0xe599c004, /* ldr r12, [r9, #4] */
2352 0xe599f000, /* ldr pc, [r9] */
2355 /* Thumb FDPIC PLT entry. */
2356 /* The last 5 words contain PLT lazy fragment code and data. */
2357 static const bfd_vma elf32_arm_fdpic_thumb_plt_entry
[] =
2359 0xc00cf8df, /* ldr.w r12, .L1 */
2360 0x0c09eb0c, /* add.w r12, r12, r9 */
2361 0x9004f8dc, /* ldr.w r9, [r12, #4] */
2362 0xf000f8dc, /* ldr.w pc, [r12] */
2363 0x00000000, /* .L1 .word foo(GOTOFFFUNCDESC) */
2364 0x00000000, /* .L2 .word foo(funcdesc_value_reloc_offset) */
2365 0xc008f85f, /* ldr.w r12, .L2 */
2366 0xcd04f84d, /* push {r12} */
2367 0xc004f8d9, /* ldr.w r12, [r9, #4] */
2368 0xf000f8d9, /* ldr.w pc, [r9] */
2371 #ifdef FOUR_WORD_PLT
2373 /* The first entry in a procedure linkage table looks like
2374 this. It is set up so that any shared library function that is
2375 called before the relocation has been set up calls the dynamic
2377 static const bfd_vma elf32_arm_plt0_entry
[] =
2379 0xe52de004, /* str lr, [sp, #-4]! */
2380 0xe59fe010, /* ldr lr, [pc, #16] */
2381 0xe08fe00e, /* add lr, pc, lr */
2382 0xe5bef008, /* ldr pc, [lr, #8]! */
2385 /* Subsequent entries in a procedure linkage table look like
2387 static const bfd_vma elf32_arm_plt_entry
[] =
2389 0xe28fc600, /* add ip, pc, #NN */
2390 0xe28cca00, /* add ip, ip, #NN */
2391 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2392 0x00000000, /* unused */
2395 #else /* not FOUR_WORD_PLT */
2397 /* The first entry in a procedure linkage table looks like
2398 this. It is set up so that any shared library function that is
2399 called before the relocation has been set up calls the dynamic
2401 static const bfd_vma elf32_arm_plt0_entry
[] =
2403 0xe52de004, /* str lr, [sp, #-4]! */
2404 0xe59fe004, /* ldr lr, [pc, #4] */
2405 0xe08fe00e, /* add lr, pc, lr */
2406 0xe5bef008, /* ldr pc, [lr, #8]! */
2407 0x00000000, /* &GOT[0] - . */
2410 /* By default subsequent entries in a procedure linkage table look like
2411 this. Offsets that don't fit into 28 bits will cause link error. */
2412 static const bfd_vma elf32_arm_plt_entry_short
[] =
2414 0xe28fc600, /* add ip, pc, #0xNN00000 */
2415 0xe28cca00, /* add ip, ip, #0xNN000 */
2416 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2419 /* When explicitly asked, we'll use this "long" entry format
2420 which can cope with arbitrary displacements. */
2421 static const bfd_vma elf32_arm_plt_entry_long
[] =
2423 0xe28fc200, /* add ip, pc, #0xN0000000 */
2424 0xe28cc600, /* add ip, ip, #0xNN00000 */
2425 0xe28cca00, /* add ip, ip, #0xNN000 */
2426 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2429 static bfd_boolean elf32_arm_use_long_plt_entry
= FALSE
;
2431 #endif /* not FOUR_WORD_PLT */
2433 /* The first entry in a procedure linkage table looks like this.
2434 It is set up so that any shared library function that is called before the
2435 relocation has been set up calls the dynamic linker first. */
2436 static const bfd_vma elf32_thumb2_plt0_entry
[] =
2438 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2439 an instruction maybe encoded to one or two array elements. */
2440 0xf8dfb500, /* push {lr} */
2441 0x44fee008, /* ldr.w lr, [pc, #8] */
2443 0xff08f85e, /* ldr.w pc, [lr, #8]! */
2444 0x00000000, /* &GOT[0] - . */
2447 /* Subsequent entries in a procedure linkage table for thumb only target
2449 static const bfd_vma elf32_thumb2_plt_entry
[] =
2451 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2452 an instruction maybe encoded to one or two array elements. */
2453 0x0c00f240, /* movw ip, #0xNNNN */
2454 0x0c00f2c0, /* movt ip, #0xNNNN */
2455 0xf8dc44fc, /* add ip, pc */
2456 0xe7fcf000 /* ldr.w pc, [ip] */
2460 /* The format of the first entry in the procedure linkage table
2461 for a VxWorks executable. */
2462 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry
[] =
2464 0xe52dc008, /* str ip,[sp,#-8]! */
2465 0xe59fc000, /* ldr ip,[pc] */
2466 0xe59cf008, /* ldr pc,[ip,#8] */
2467 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2470 /* The format of subsequent entries in a VxWorks executable. */
2471 static const bfd_vma elf32_arm_vxworks_exec_plt_entry
[] =
2473 0xe59fc000, /* ldr ip,[pc] */
2474 0xe59cf000, /* ldr pc,[ip] */
2475 0x00000000, /* .long @got */
2476 0xe59fc000, /* ldr ip,[pc] */
2477 0xea000000, /* b _PLT */
2478 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2481 /* The format of entries in a VxWorks shared library. */
2482 static const bfd_vma elf32_arm_vxworks_shared_plt_entry
[] =
2484 0xe59fc000, /* ldr ip,[pc] */
2485 0xe79cf009, /* ldr pc,[ip,r9] */
2486 0x00000000, /* .long @got */
2487 0xe59fc000, /* ldr ip,[pc] */
2488 0xe599f008, /* ldr pc,[r9,#8] */
2489 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2492 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2493 #define PLT_THUMB_STUB_SIZE 4
2494 static const bfd_vma elf32_arm_plt_thumb_stub
[] =
2500 /* The entries in a PLT when using a DLL-based target with multiple
2502 static const bfd_vma elf32_arm_symbian_plt_entry
[] =
2504 0xe51ff004, /* ldr pc, [pc, #-4] */
2505 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2508 /* The first entry in a procedure linkage table looks like
2509 this. It is set up so that any shared library function that is
2510 called before the relocation has been set up calls the dynamic
2512 static const bfd_vma elf32_arm_nacl_plt0_entry
[] =
2515 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2516 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2517 0xe08cc00f, /* add ip, ip, pc */
2518 0xe52dc008, /* str ip, [sp, #-8]! */
2519 /* Second bundle: */
2520 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2521 0xe59cc000, /* ldr ip, [ip] */
2522 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2523 0xe12fff1c, /* bx ip */
2525 0xe320f000, /* nop */
2526 0xe320f000, /* nop */
2527 0xe320f000, /* nop */
2529 0xe50dc004, /* str ip, [sp, #-4] */
2530 /* Fourth bundle: */
2531 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2532 0xe59cc000, /* ldr ip, [ip] */
2533 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2534 0xe12fff1c, /* bx ip */
2536 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2538 /* Subsequent entries in a procedure linkage table look like this. */
2539 static const bfd_vma elf32_arm_nacl_plt_entry
[] =
2541 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2542 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2543 0xe08cc00f, /* add ip, ip, pc */
2544 0xea000000, /* b .Lplt_tail */
2547 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2548 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2549 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2550 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2551 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2552 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2553 #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4)
2554 #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4)
2564 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2565 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2566 is inserted in arm_build_one_stub(). */
2567 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2568 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2569 #define THUMB32_MOVT(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVT_ABS, 0}
2570 #define THUMB32_MOVW(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVW_ABS_NC, 0}
2571 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2572 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2573 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2574 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2579 enum stub_insn_type type
;
2580 unsigned int r_type
;
2584 /* See note [Thumb nop sequence] when adding a veneer. */
2586 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2587 to reach the stub if necessary. */
2588 static const insn_sequence elf32_arm_stub_long_branch_any_any
[] =
2590 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2591 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2594 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2596 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb
[] =
2598 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2599 ARM_INSN (0xe12fff1c), /* bx ip */
2600 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2603 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2604 static const insn_sequence elf32_arm_stub_long_branch_thumb_only
[] =
2606 THUMB16_INSN (0xb401), /* push {r0} */
2607 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2608 THUMB16_INSN (0x4684), /* mov ip, r0 */
2609 THUMB16_INSN (0xbc01), /* pop {r0} */
2610 THUMB16_INSN (0x4760), /* bx ip */
2611 THUMB16_INSN (0xbf00), /* nop */
2612 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2615 /* Thumb -> Thumb long branch stub in thumb2 encoding. Used on armv7. */
2616 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only
[] =
2618 THUMB32_INSN (0xf85ff000), /* ldr.w pc, [pc, #-0] */
2619 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(x) */
2622 /* Thumb -> Thumb long branch stub. Used for PureCode sections on Thumb2
2623 M-profile architectures. */
2624 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only_pure
[] =
2626 THUMB32_MOVW (0xf2400c00), /* mov.w ip, R_ARM_MOVW_ABS_NC */
2627 THUMB32_MOVT (0xf2c00c00), /* movt ip, R_ARM_MOVT_ABS << 16 */
2628 THUMB16_INSN (0x4760), /* bx ip */
2631 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2633 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb
[] =
2635 THUMB16_INSN (0x4778), /* bx pc */
2636 THUMB16_INSN (0xe7fd), /* b .-2 */
2637 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2638 ARM_INSN (0xe12fff1c), /* bx ip */
2639 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2642 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2644 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm
[] =
2646 THUMB16_INSN (0x4778), /* bx pc */
2647 THUMB16_INSN (0xe7fd), /* b .-2 */
2648 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2649 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2652 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2653 one, when the destination is close enough. */
2654 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm
[] =
2656 THUMB16_INSN (0x4778), /* bx pc */
2657 THUMB16_INSN (0xe7fd), /* b .-2 */
2658 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2661 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2662 blx to reach the stub if necessary. */
2663 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic
[] =
2665 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2666 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2667 DATA_WORD (0, R_ARM_REL32
, -4), /* dcd R_ARM_REL32(X-4) */
2670 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2671 blx to reach the stub if necessary. We can not add into pc;
2672 it is not guaranteed to mode switch (different in ARMv6 and
2674 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic
[] =
2676 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2677 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2678 ARM_INSN (0xe12fff1c), /* bx ip */
2679 DATA_WORD (0, R_ARM_REL32
, 0), /* dcd R_ARM_REL32(X) */
2682 /* V4T ARM -> ARM long branch stub, PIC. */
2683 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic
[] =
2685 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2686 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2687 ARM_INSN (0xe12fff1c), /* bx ip */
2688 DATA_WORD (0, R_ARM_REL32
, 0), /* dcd R_ARM_REL32(X) */
2691 /* V4T Thumb -> ARM long branch stub, PIC. */
2692 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic
[] =
2694 THUMB16_INSN (0x4778), /* bx pc */
2695 THUMB16_INSN (0xe7fd), /* b .-2 */
2696 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2697 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2698 DATA_WORD (0, R_ARM_REL32
, -4), /* dcd R_ARM_REL32(X) */
2701 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2703 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic
[] =
2705 THUMB16_INSN (0xb401), /* push {r0} */
2706 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2707 THUMB16_INSN (0x46fc), /* mov ip, pc */
2708 THUMB16_INSN (0x4484), /* add ip, r0 */
2709 THUMB16_INSN (0xbc01), /* pop {r0} */
2710 THUMB16_INSN (0x4760), /* bx ip */
2711 DATA_WORD (0, R_ARM_REL32
, 4), /* dcd R_ARM_REL32(X) */
2714 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2716 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic
[] =
2718 THUMB16_INSN (0x4778), /* bx pc */
2719 THUMB16_INSN (0xe7fd), /* b .-2 */
2720 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2721 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2722 ARM_INSN (0xe12fff1c), /* bx ip */
2723 DATA_WORD (0, R_ARM_REL32
, 0), /* dcd R_ARM_REL32(X) */
2726 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2727 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2728 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic
[] =
2730 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2731 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2732 DATA_WORD (0, R_ARM_REL32
, -4), /* dcd R_ARM_REL32(X-4) */
2735 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2736 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2737 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic
[] =
2739 THUMB16_INSN (0x4778), /* bx pc */
2740 THUMB16_INSN (0xe7fd), /* b .-2 */
2741 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2742 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2743 DATA_WORD (0, R_ARM_REL32
, -4), /* dcd R_ARM_REL32(X) */
2746 /* NaCl ARM -> ARM long branch stub. */
2747 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl
[] =
2749 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2750 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2751 ARM_INSN (0xe12fff1c), /* bx ip */
2752 ARM_INSN (0xe320f000), /* nop */
2753 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2754 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2755 DATA_WORD (0, R_ARM_NONE
, 0), /* .word 0 */
2756 DATA_WORD (0, R_ARM_NONE
, 0), /* .word 0 */
2759 /* NaCl ARM -> ARM long branch stub, PIC. */
2760 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic
[] =
2762 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2763 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2764 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2765 ARM_INSN (0xe12fff1c), /* bx ip */
2766 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2767 DATA_WORD (0, R_ARM_REL32
, 8), /* dcd R_ARM_REL32(X+8) */
2768 DATA_WORD (0, R_ARM_NONE
, 0), /* .word 0 */
2769 DATA_WORD (0, R_ARM_NONE
, 0), /* .word 0 */
2772 /* Stub used for transition to secure state (aka SG veneer). */
2773 static const insn_sequence elf32_arm_stub_cmse_branch_thumb_only
[] =
2775 THUMB32_INSN (0xe97fe97f), /* sg. */
2776 THUMB32_B_INSN (0xf000b800, -4), /* b.w original_branch_dest. */
2780 /* Cortex-A8 erratum-workaround stubs. */
2782 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2783 can't use a conditional branch to reach this stub). */
2785 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond
[] =
2787 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2788 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2789 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2792 /* Stub used for b.w and bl.w instructions. */
2794 static const insn_sequence elf32_arm_stub_a8_veneer_b
[] =
2796 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2799 static const insn_sequence elf32_arm_stub_a8_veneer_bl
[] =
2801 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2804 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2805 instruction (which switches to ARM mode) to point to this stub. Jump to the
2806 real destination using an ARM-mode branch. */
2808 static const insn_sequence elf32_arm_stub_a8_veneer_blx
[] =
2810 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2813 /* For each section group there can be a specially created linker section
2814 to hold the stubs for that group. The name of the stub section is based
2815 upon the name of another section within that group with the suffix below
2818 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2819 create what appeared to be a linker stub section when it actually
2820 contained user code/data. For example, consider this fragment:
2822 const char * stubborn_problems[] = { "np" };
2824 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2827 .data.rel.local.stubborn_problems
2829 This then causes problems in arm32_arm_build_stubs() as it triggers:
2831 // Ignore non-stub sections.
2832 if (!strstr (stub_sec->name, STUB_SUFFIX))
2835 And so the section would be ignored instead of being processed. Hence
2836 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2838 #define STUB_SUFFIX ".__stub"
2840 /* One entry per long/short branch stub defined above. */
2842 DEF_STUB(long_branch_any_any) \
2843 DEF_STUB(long_branch_v4t_arm_thumb) \
2844 DEF_STUB(long_branch_thumb_only) \
2845 DEF_STUB(long_branch_v4t_thumb_thumb) \
2846 DEF_STUB(long_branch_v4t_thumb_arm) \
2847 DEF_STUB(short_branch_v4t_thumb_arm) \
2848 DEF_STUB(long_branch_any_arm_pic) \
2849 DEF_STUB(long_branch_any_thumb_pic) \
2850 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2851 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2852 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2853 DEF_STUB(long_branch_thumb_only_pic) \
2854 DEF_STUB(long_branch_any_tls_pic) \
2855 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2856 DEF_STUB(long_branch_arm_nacl) \
2857 DEF_STUB(long_branch_arm_nacl_pic) \
2858 DEF_STUB(cmse_branch_thumb_only) \
2859 DEF_STUB(a8_veneer_b_cond) \
2860 DEF_STUB(a8_veneer_b) \
2861 DEF_STUB(a8_veneer_bl) \
2862 DEF_STUB(a8_veneer_blx) \
2863 DEF_STUB(long_branch_thumb2_only) \
2864 DEF_STUB(long_branch_thumb2_only_pure)
2866 #define DEF_STUB(x) arm_stub_##x,
2867 enum elf32_arm_stub_type
2875 /* Note the first a8_veneer type. */
2876 const unsigned arm_stub_a8_veneer_lwm
= arm_stub_a8_veneer_b_cond
;
2880 const insn_sequence
* template_sequence
;
2884 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2885 static const stub_def stub_definitions
[] =
2891 struct elf32_arm_stub_hash_entry
2893 /* Base hash table entry structure. */
2894 struct bfd_hash_entry root
;
2896 /* The stub section. */
2899 /* Offset within stub_sec of the beginning of this stub. */
2900 bfd_vma stub_offset
;
2902 /* Given the symbol's value and its section we can determine its final
2903 value when building the stubs (so the stub knows where to jump). */
2904 bfd_vma target_value
;
2905 asection
*target_section
;
2907 /* Same as above but for the source of the branch to the stub. Used for
2908 Cortex-A8 erratum workaround to patch it to branch to the stub. As
2909 such, source section does not need to be recorded since Cortex-A8 erratum
2910 workaround stubs are only generated when both source and target are in the
2912 bfd_vma source_value
;
2914 /* The instruction which caused this stub to be generated (only valid for
2915 Cortex-A8 erratum workaround stubs at present). */
2916 unsigned long orig_insn
;
2918 /* The stub type. */
2919 enum elf32_arm_stub_type stub_type
;
2920 /* Its encoding size in bytes. */
2923 const insn_sequence
*stub_template
;
2924 /* The size of the template (number of entries). */
2925 int stub_template_size
;
2927 /* The symbol table entry, if any, that this was derived from. */
2928 struct elf32_arm_link_hash_entry
*h
;
2930 /* Type of branch. */
2931 enum arm_st_branch_type branch_type
;
2933 /* Where this stub is being called from, or, in the case of combined
2934 stub sections, the first input section in the group. */
2937 /* The name for the local symbol at the start of this stub. The
2938 stub name in the hash table has to be unique; this does not, so
2939 it can be friendlier. */
2943 /* Used to build a map of a section. This is required for mixed-endian
2946 typedef struct elf32_elf_section_map
2951 elf32_arm_section_map
;
2953 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2957 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER
,
2958 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER
,
2959 VFP11_ERRATUM_ARM_VENEER
,
2960 VFP11_ERRATUM_THUMB_VENEER
2962 elf32_vfp11_erratum_type
;
2964 typedef struct elf32_vfp11_erratum_list
2966 struct elf32_vfp11_erratum_list
*next
;
2972 struct elf32_vfp11_erratum_list
*veneer
;
2973 unsigned int vfp_insn
;
2977 struct elf32_vfp11_erratum_list
*branch
;
2981 elf32_vfp11_erratum_type type
;
2983 elf32_vfp11_erratum_list
;
2985 /* Information about a STM32L4XX erratum veneer, or a branch to such a
2989 STM32L4XX_ERRATUM_BRANCH_TO_VENEER
,
2990 STM32L4XX_ERRATUM_VENEER
2992 elf32_stm32l4xx_erratum_type
;
2994 typedef struct elf32_stm32l4xx_erratum_list
2996 struct elf32_stm32l4xx_erratum_list
*next
;
3002 struct elf32_stm32l4xx_erratum_list
*veneer
;
3007 struct elf32_stm32l4xx_erratum_list
*branch
;
3011 elf32_stm32l4xx_erratum_type type
;
3013 elf32_stm32l4xx_erratum_list
;
3018 INSERT_EXIDX_CANTUNWIND_AT_END
3020 arm_unwind_edit_type
;
3022 /* A (sorted) list of edits to apply to an unwind table. */
3023 typedef struct arm_unwind_table_edit
3025 arm_unwind_edit_type type
;
3026 /* Note: we sometimes want to insert an unwind entry corresponding to a
3027 section different from the one we're currently writing out, so record the
3028 (text) section this edit relates to here. */
3029 asection
*linked_section
;
3031 struct arm_unwind_table_edit
*next
;
3033 arm_unwind_table_edit
;
3035 typedef struct _arm_elf_section_data
3037 /* Information about mapping symbols. */
3038 struct bfd_elf_section_data elf
;
3039 unsigned int mapcount
;
3040 unsigned int mapsize
;
3041 elf32_arm_section_map
*map
;
3042 /* Information about CPU errata. */
3043 unsigned int erratumcount
;
3044 elf32_vfp11_erratum_list
*erratumlist
;
3045 unsigned int stm32l4xx_erratumcount
;
3046 elf32_stm32l4xx_erratum_list
*stm32l4xx_erratumlist
;
3047 unsigned int additional_reloc_count
;
3048 /* Information about unwind tables. */
3051 /* Unwind info attached to a text section. */
3054 asection
*arm_exidx_sec
;
3057 /* Unwind info attached to an .ARM.exidx section. */
3060 arm_unwind_table_edit
*unwind_edit_list
;
3061 arm_unwind_table_edit
*unwind_edit_tail
;
3065 _arm_elf_section_data
;
3067 #define elf32_arm_section_data(sec) \
3068 ((_arm_elf_section_data *) elf_section_data (sec))
3070 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
3071 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
3072 so may be created multiple times: we use an array of these entries whilst
3073 relaxing which we can refresh easily, then create stubs for each potentially
3074 erratum-triggering instruction once we've settled on a solution. */
3076 struct a8_erratum_fix
3081 bfd_vma target_offset
;
3082 unsigned long orig_insn
;
3084 enum elf32_arm_stub_type stub_type
;
3085 enum arm_st_branch_type branch_type
;
3088 /* A table of relocs applied to branches which might trigger Cortex-A8
3091 struct a8_erratum_reloc
3094 bfd_vma destination
;
3095 struct elf32_arm_link_hash_entry
*hash
;
3096 const char *sym_name
;
3097 unsigned int r_type
;
3098 enum arm_st_branch_type branch_type
;
3099 bfd_boolean non_a8_stub
;
3102 /* The size of the thread control block. */
3105 /* ARM-specific information about a PLT entry, over and above the usual
3109 /* We reference count Thumb references to a PLT entry separately,
3110 so that we can emit the Thumb trampoline only if needed. */
3111 bfd_signed_vma thumb_refcount
;
3113 /* Some references from Thumb code may be eliminated by BL->BLX
3114 conversion, so record them separately. */
3115 bfd_signed_vma maybe_thumb_refcount
;
3117 /* How many of the recorded PLT accesses were from non-call relocations.
3118 This information is useful when deciding whether anything takes the
3119 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
3120 non-call references to the function should resolve directly to the
3121 real runtime target. */
3122 unsigned int noncall_refcount
;
3124 /* Since PLT entries have variable size if the Thumb prologue is
3125 used, we need to record the index into .got.plt instead of
3126 recomputing it from the PLT offset. */
3127 bfd_signed_vma got_offset
;
3130 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
3131 struct arm_local_iplt_info
3133 /* The information that is usually found in the generic ELF part of
3134 the hash table entry. */
3135 union gotplt_union root
;
3137 /* The information that is usually found in the ARM-specific part of
3138 the hash table entry. */
3139 struct arm_plt_info arm
;
3141 /* A list of all potential dynamic relocations against this symbol. */
3142 struct elf_dyn_relocs
*dyn_relocs
;
3145 /* Structure to handle FDPIC support for local functions. */
3146 struct fdpic_local
{
3147 unsigned int funcdesc_cnt
;
3148 unsigned int gotofffuncdesc_cnt
;
3149 int funcdesc_offset
;
3152 struct elf_arm_obj_tdata
3154 struct elf_obj_tdata root
;
3156 /* tls_type for each local got entry. */
3157 char *local_got_tls_type
;
3159 /* GOTPLT entries for TLS descriptors. */
3160 bfd_vma
*local_tlsdesc_gotent
;
3162 /* Information for local symbols that need entries in .iplt. */
3163 struct arm_local_iplt_info
**local_iplt
;
3165 /* Zero to warn when linking objects with incompatible enum sizes. */
3166 int no_enum_size_warning
;
3168 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
3169 int no_wchar_size_warning
;
3171 /* Maintains FDPIC counters and funcdesc info. */
3172 struct fdpic_local
*local_fdpic_cnts
;
3175 #define elf_arm_tdata(bfd) \
3176 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
3178 #define elf32_arm_local_got_tls_type(bfd) \
3179 (elf_arm_tdata (bfd)->local_got_tls_type)
3181 #define elf32_arm_local_tlsdesc_gotent(bfd) \
3182 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
3184 #define elf32_arm_local_iplt(bfd) \
3185 (elf_arm_tdata (bfd)->local_iplt)
3187 #define elf32_arm_local_fdpic_cnts(bfd) \
3188 (elf_arm_tdata (bfd)->local_fdpic_cnts)
3190 #define is_arm_elf(bfd) \
3191 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
3192 && elf_tdata (bfd) != NULL \
3193 && elf_object_id (bfd) == ARM_ELF_DATA)
3196 elf32_arm_mkobject (bfd
*abfd
)
3198 return bfd_elf_allocate_object (abfd
, sizeof (struct elf_arm_obj_tdata
),
3202 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
3204 /* Structure to handle FDPIC support for extern functions. */
3205 struct fdpic_global
{
3206 unsigned int gotofffuncdesc_cnt
;
3207 unsigned int gotfuncdesc_cnt
;
3208 unsigned int funcdesc_cnt
;
3209 int funcdesc_offset
;
3210 int gotfuncdesc_offset
;
3213 /* Arm ELF linker hash entry. */
3214 struct elf32_arm_link_hash_entry
3216 struct elf_link_hash_entry root
;
3218 /* ARM-specific PLT information. */
3219 struct arm_plt_info plt
;
3221 #define GOT_UNKNOWN 0
3222 #define GOT_NORMAL 1
3223 #define GOT_TLS_GD 2
3224 #define GOT_TLS_IE 4
3225 #define GOT_TLS_GDESC 8
3226 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
3227 unsigned int tls_type
: 8;
3229 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
3230 unsigned int is_iplt
: 1;
3232 unsigned int unused
: 23;
3234 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
3235 starting at the end of the jump table. */
3236 bfd_vma tlsdesc_got
;
3238 /* The symbol marking the real symbol location for exported thumb
3239 symbols with Arm stubs. */
3240 struct elf_link_hash_entry
*export_glue
;
3242 /* A pointer to the most recently used stub hash entry against this
3244 struct elf32_arm_stub_hash_entry
*stub_cache
;
3246 /* Counter for FDPIC relocations against this symbol. */
3247 struct fdpic_global fdpic_cnts
;
3250 /* Traverse an arm ELF linker hash table. */
3251 #define elf32_arm_link_hash_traverse(table, func, info) \
3252 (elf_link_hash_traverse \
3254 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
3257 /* Get the ARM elf linker hash table from a link_info structure. */
3258 #define elf32_arm_hash_table(info) \
3259 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
3260 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
3262 #define arm_stub_hash_lookup(table, string, create, copy) \
3263 ((struct elf32_arm_stub_hash_entry *) \
3264 bfd_hash_lookup ((table), (string), (create), (copy)))
3266 /* Array to keep track of which stub sections have been created, and
3267 information on stub grouping. */
3270 /* This is the section to which stubs in the group will be
3273 /* The stub section. */
3277 #define elf32_arm_compute_jump_table_size(htab) \
3278 ((htab)->next_tls_desc_index * 4)
3280 /* ARM ELF linker hash table. */
3281 struct elf32_arm_link_hash_table
3283 /* The main hash table. */
3284 struct elf_link_hash_table root
;
3286 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
3287 bfd_size_type thumb_glue_size
;
3289 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
3290 bfd_size_type arm_glue_size
;
3292 /* The size in bytes of section containing the ARMv4 BX veneers. */
3293 bfd_size_type bx_glue_size
;
3295 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
3296 veneer has been populated. */
3297 bfd_vma bx_glue_offset
[15];
3299 /* The size in bytes of the section containing glue for VFP11 erratum
3301 bfd_size_type vfp11_erratum_glue_size
;
3303 /* The size in bytes of the section containing glue for STM32L4XX erratum
3305 bfd_size_type stm32l4xx_erratum_glue_size
;
3307 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
3308 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
3309 elf32_arm_write_section(). */
3310 struct a8_erratum_fix
*a8_erratum_fixes
;
3311 unsigned int num_a8_erratum_fixes
;
3313 /* An arbitrary input BFD chosen to hold the glue sections. */
3314 bfd
* bfd_of_glue_owner
;
3316 /* Nonzero to output a BE8 image. */
3319 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
3320 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
3323 /* The relocation to use for R_ARM_TARGET2 relocations. */
3326 /* 0 = Ignore R_ARM_V4BX.
3327 1 = Convert BX to MOV PC.
3328 2 = Generate v4 interworing stubs. */
3331 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
3334 /* Whether we should fix the ARM1176 BLX immediate issue. */
3337 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
3340 /* What sort of code sequences we should look for which may trigger the
3341 VFP11 denorm erratum. */
3342 bfd_arm_vfp11_fix vfp11_fix
;
3344 /* Global counter for the number of fixes we have emitted. */
3345 int num_vfp11_fixes
;
3347 /* What sort of code sequences we should look for which may trigger the
3348 STM32L4XX erratum. */
3349 bfd_arm_stm32l4xx_fix stm32l4xx_fix
;
3351 /* Global counter for the number of fixes we have emitted. */
3352 int num_stm32l4xx_fixes
;
3354 /* Nonzero to force PIC branch veneers. */
3357 /* The number of bytes in the initial entry in the PLT. */
3358 bfd_size_type plt_header_size
;
3360 /* The number of bytes in the subsequent PLT etries. */
3361 bfd_size_type plt_entry_size
;
3363 /* True if the target system is VxWorks. */
3366 /* True if the target system is Symbian OS. */
3369 /* True if the target system is Native Client. */
3372 /* True if the target uses REL relocations. */
3373 bfd_boolean use_rel
;
3375 /* Nonzero if import library must be a secure gateway import library
3376 as per ARMv8-M Security Extensions. */
3379 /* The import library whose symbols' address must remain stable in
3380 the import library generated. */
3383 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
3384 bfd_vma next_tls_desc_index
;
3386 /* How many R_ARM_TLS_DESC relocations were generated so far. */
3387 bfd_vma num_tls_desc
;
3389 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
3392 /* The offset into splt of the PLT entry for the TLS descriptor
3393 resolver. Special values are 0, if not necessary (or not found
3394 to be necessary yet), and -1 if needed but not determined
3396 bfd_vma dt_tlsdesc_plt
;
3398 /* The offset into sgot of the GOT entry used by the PLT entry
3400 bfd_vma dt_tlsdesc_got
;
3402 /* Offset in .plt section of tls_arm_trampoline. */
3403 bfd_vma tls_trampoline
;
3405 /* Data for R_ARM_TLS_LDM32/R_ARM_TLS_LDM32_FDPIC relocations. */
3408 bfd_signed_vma refcount
;
3412 /* Small local sym cache. */
3413 struct sym_cache sym_cache
;
3415 /* For convenience in allocate_dynrelocs. */
3418 /* The amount of space used by the reserved portion of the sgotplt
3419 section, plus whatever space is used by the jump slots. */
3420 bfd_vma sgotplt_jump_table_size
;
3422 /* The stub hash table. */
3423 struct bfd_hash_table stub_hash_table
;
3425 /* Linker stub bfd. */
3428 /* Linker call-backs. */
3429 asection
* (*add_stub_section
) (const char *, asection
*, asection
*,
3431 void (*layout_sections_again
) (void);
3433 /* Array to keep track of which stub sections have been created, and
3434 information on stub grouping. */
3435 struct map_stub
*stub_group
;
3437 /* Input stub section holding secure gateway veneers. */
3438 asection
*cmse_stub_sec
;
3440 /* Offset in cmse_stub_sec where new SG veneers (not in input import library)
3441 start to be allocated. */
3442 bfd_vma new_cmse_stub_offset
;
3444 /* Number of elements in stub_group. */
3445 unsigned int top_id
;
3447 /* Assorted information used by elf32_arm_size_stubs. */
3448 unsigned int bfd_count
;
3449 unsigned int top_index
;
3450 asection
**input_list
;
3452 /* True if the target system uses FDPIC. */
3455 /* Fixup section. Used for FDPIC. */
3459 /* Add an FDPIC read-only fixup. */
3461 arm_elf_add_rofixup (bfd
*output_bfd
, asection
*srofixup
, bfd_vma offset
)
3463 bfd_vma fixup_offset
;
3465 fixup_offset
= srofixup
->reloc_count
++ * 4;
3466 BFD_ASSERT (fixup_offset
< srofixup
->size
);
3467 bfd_put_32 (output_bfd
, offset
, srofixup
->contents
+ fixup_offset
);
3471 ctz (unsigned int mask
)
3473 #if GCC_VERSION >= 3004
3474 return __builtin_ctz (mask
);
3478 for (i
= 0; i
< 8 * sizeof (mask
); i
++)
3489 elf32_arm_popcount (unsigned int mask
)
3491 #if GCC_VERSION >= 3004
3492 return __builtin_popcount (mask
);
3497 for (i
= 0; i
< 8 * sizeof (mask
); i
++)
3507 static void elf32_arm_add_dynreloc (bfd
*output_bfd
, struct bfd_link_info
*info
,
3508 asection
*sreloc
, Elf_Internal_Rela
*rel
);
3511 arm_elf_fill_funcdesc(bfd
*output_bfd
,
3512 struct bfd_link_info
*info
,
3513 int *funcdesc_offset
,
3517 bfd_vma dynreloc_value
,
3520 if ((*funcdesc_offset
& 1) == 0)
3522 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (info
);
3523 asection
*sgot
= globals
->root
.sgot
;
3525 if (bfd_link_pic(info
))
3527 asection
*srelgot
= globals
->root
.srelgot
;
3528 Elf_Internal_Rela outrel
;
3530 outrel
.r_info
= ELF32_R_INFO (dynindx
, R_ARM_FUNCDESC_VALUE
);
3531 outrel
.r_offset
= sgot
->output_section
->vma
+ sgot
->output_offset
+ offset
;
3532 outrel
.r_addend
= 0;
3534 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
3535 bfd_put_32 (output_bfd
, addr
, sgot
->contents
+ offset
);
3536 bfd_put_32 (output_bfd
, seg
, sgot
->contents
+ offset
+ 4);
3540 struct elf_link_hash_entry
*hgot
= globals
->root
.hgot
;
3541 bfd_vma got_value
= hgot
->root
.u
.def
.value
3542 + hgot
->root
.u
.def
.section
->output_section
->vma
3543 + hgot
->root
.u
.def
.section
->output_offset
;
3545 arm_elf_add_rofixup(output_bfd
, globals
->srofixup
,
3546 sgot
->output_section
->vma
+ sgot
->output_offset
3548 arm_elf_add_rofixup(output_bfd
, globals
->srofixup
,
3549 sgot
->output_section
->vma
+ sgot
->output_offset
3551 bfd_put_32 (output_bfd
, dynreloc_value
, sgot
->contents
+ offset
);
3552 bfd_put_32 (output_bfd
, got_value
, sgot
->contents
+ offset
+ 4);
3554 *funcdesc_offset
|= 1;
3558 /* Create an entry in an ARM ELF linker hash table. */
3560 static struct bfd_hash_entry
*
3561 elf32_arm_link_hash_newfunc (struct bfd_hash_entry
* entry
,
3562 struct bfd_hash_table
* table
,
3563 const char * string
)
3565 struct elf32_arm_link_hash_entry
* ret
=
3566 (struct elf32_arm_link_hash_entry
*) entry
;
3568 /* Allocate the structure if it has not already been allocated by a
3571 ret
= (struct elf32_arm_link_hash_entry
*)
3572 bfd_hash_allocate (table
, sizeof (struct elf32_arm_link_hash_entry
));
3574 return (struct bfd_hash_entry
*) ret
;
3576 /* Call the allocation method of the superclass. */
3577 ret
= ((struct elf32_arm_link_hash_entry
*)
3578 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry
*) ret
,
3582 ret
->tls_type
= GOT_UNKNOWN
;
3583 ret
->tlsdesc_got
= (bfd_vma
) -1;
3584 ret
->plt
.thumb_refcount
= 0;
3585 ret
->plt
.maybe_thumb_refcount
= 0;
3586 ret
->plt
.noncall_refcount
= 0;
3587 ret
->plt
.got_offset
= -1;
3588 ret
->is_iplt
= FALSE
;
3589 ret
->export_glue
= NULL
;
3591 ret
->stub_cache
= NULL
;
3593 ret
->fdpic_cnts
.gotofffuncdesc_cnt
= 0;
3594 ret
->fdpic_cnts
.gotfuncdesc_cnt
= 0;
3595 ret
->fdpic_cnts
.funcdesc_cnt
= 0;
3596 ret
->fdpic_cnts
.funcdesc_offset
= -1;
3597 ret
->fdpic_cnts
.gotfuncdesc_offset
= -1;
3600 return (struct bfd_hash_entry
*) ret
;
3603 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3607 elf32_arm_allocate_local_sym_info (bfd
*abfd
)
3609 if (elf_local_got_refcounts (abfd
) == NULL
)
3611 bfd_size_type num_syms
;
3615 num_syms
= elf_tdata (abfd
)->symtab_hdr
.sh_info
;
3616 size
= num_syms
* (sizeof (bfd_signed_vma
)
3617 + sizeof (struct arm_local_iplt_info
*)
3620 + sizeof (struct fdpic_local
));
3621 data
= bfd_zalloc (abfd
, size
);
3625 elf32_arm_local_fdpic_cnts (abfd
) = (struct fdpic_local
*) data
;
3626 data
+= num_syms
* sizeof (struct fdpic_local
);
3628 elf_local_got_refcounts (abfd
) = (bfd_signed_vma
*) data
;
3629 data
+= num_syms
* sizeof (bfd_signed_vma
);
3631 elf32_arm_local_iplt (abfd
) = (struct arm_local_iplt_info
**) data
;
3632 data
+= num_syms
* sizeof (struct arm_local_iplt_info
*);
3634 elf32_arm_local_tlsdesc_gotent (abfd
) = (bfd_vma
*) data
;
3635 data
+= num_syms
* sizeof (bfd_vma
);
3637 elf32_arm_local_got_tls_type (abfd
) = data
;
3642 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3643 to input bfd ABFD. Create the information if it doesn't already exist.
3644 Return null if an allocation fails. */
3646 static struct arm_local_iplt_info
*
3647 elf32_arm_create_local_iplt (bfd
*abfd
, unsigned long r_symndx
)
3649 struct arm_local_iplt_info
**ptr
;
3651 if (!elf32_arm_allocate_local_sym_info (abfd
))
3654 BFD_ASSERT (r_symndx
< elf_tdata (abfd
)->symtab_hdr
.sh_info
);
3655 ptr
= &elf32_arm_local_iplt (abfd
)[r_symndx
];
3657 *ptr
= bfd_zalloc (abfd
, sizeof (**ptr
));
3661 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3662 in ABFD's symbol table. If the symbol is global, H points to its
3663 hash table entry, otherwise H is null.
3665 Return true if the symbol does have PLT information. When returning
3666 true, point *ROOT_PLT at the target-independent reference count/offset
3667 union and *ARM_PLT at the ARM-specific information. */
3670 elf32_arm_get_plt_info (bfd
*abfd
, struct elf32_arm_link_hash_table
*globals
,
3671 struct elf32_arm_link_hash_entry
*h
,
3672 unsigned long r_symndx
, union gotplt_union
**root_plt
,
3673 struct arm_plt_info
**arm_plt
)
3675 struct arm_local_iplt_info
*local_iplt
;
3677 if (globals
->root
.splt
== NULL
&& globals
->root
.iplt
== NULL
)
3682 *root_plt
= &h
->root
.plt
;
3687 if (elf32_arm_local_iplt (abfd
) == NULL
)
3690 local_iplt
= elf32_arm_local_iplt (abfd
)[r_symndx
];
3691 if (local_iplt
== NULL
)
3694 *root_plt
= &local_iplt
->root
;
3695 *arm_plt
= &local_iplt
->arm
;
3699 static bfd_boolean
using_thumb_only (struct elf32_arm_link_hash_table
*globals
);
3701 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3705 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info
*info
,
3706 struct arm_plt_info
*arm_plt
)
3708 struct elf32_arm_link_hash_table
*htab
;
3710 htab
= elf32_arm_hash_table (info
);
3712 return (!using_thumb_only(htab
) && (arm_plt
->thumb_refcount
!= 0
3713 || (!htab
->use_blx
&& arm_plt
->maybe_thumb_refcount
!= 0)));
3716 /* Return a pointer to the head of the dynamic reloc list that should
3717 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3718 ABFD's symbol table. Return null if an error occurs. */
3720 static struct elf_dyn_relocs
**
3721 elf32_arm_get_local_dynreloc_list (bfd
*abfd
, unsigned long r_symndx
,
3722 Elf_Internal_Sym
*isym
)
3724 if (ELF32_ST_TYPE (isym
->st_info
) == STT_GNU_IFUNC
)
3726 struct arm_local_iplt_info
*local_iplt
;
3728 local_iplt
= elf32_arm_create_local_iplt (abfd
, r_symndx
);
3729 if (local_iplt
== NULL
)
3731 return &local_iplt
->dyn_relocs
;
3735 /* Track dynamic relocs needed for local syms too.
3736 We really need local syms available to do this
3741 s
= bfd_section_from_elf_index (abfd
, isym
->st_shndx
);
3745 vpp
= &elf_section_data (s
)->local_dynrel
;
3746 return (struct elf_dyn_relocs
**) vpp
;
3750 /* Initialize an entry in the stub hash table. */
3752 static struct bfd_hash_entry
*
3753 stub_hash_newfunc (struct bfd_hash_entry
*entry
,
3754 struct bfd_hash_table
*table
,
3757 /* Allocate the structure if it has not already been allocated by a
3761 entry
= (struct bfd_hash_entry
*)
3762 bfd_hash_allocate (table
, sizeof (struct elf32_arm_stub_hash_entry
));
3767 /* Call the allocation method of the superclass. */
3768 entry
= bfd_hash_newfunc (entry
, table
, string
);
3771 struct elf32_arm_stub_hash_entry
*eh
;
3773 /* Initialize the local fields. */
3774 eh
= (struct elf32_arm_stub_hash_entry
*) entry
;
3775 eh
->stub_sec
= NULL
;
3776 eh
->stub_offset
= (bfd_vma
) -1;
3777 eh
->source_value
= 0;
3778 eh
->target_value
= 0;
3779 eh
->target_section
= NULL
;
3781 eh
->stub_type
= arm_stub_none
;
3783 eh
->stub_template
= NULL
;
3784 eh
->stub_template_size
= -1;
3787 eh
->output_name
= NULL
;
3793 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3794 shortcuts to them in our hash table. */
3797 create_got_section (bfd
*dynobj
, struct bfd_link_info
*info
)
3799 struct elf32_arm_link_hash_table
*htab
;
3801 htab
= elf32_arm_hash_table (info
);
3805 /* BPABI objects never have a GOT, or associated sections. */
3806 if (htab
->symbian_p
)
3809 if (! _bfd_elf_create_got_section (dynobj
, info
))
3812 /* Also create .rofixup. */
3815 htab
->srofixup
= bfd_make_section_with_flags (dynobj
, ".rofixup",
3816 (SEC_ALLOC
| SEC_LOAD
| SEC_HAS_CONTENTS
3817 | SEC_IN_MEMORY
| SEC_LINKER_CREATED
| SEC_READONLY
));
3818 if (htab
->srofixup
== NULL
3819 || !bfd_set_section_alignment (htab
->srofixup
, 2))
3826 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3829 create_ifunc_sections (struct bfd_link_info
*info
)
3831 struct elf32_arm_link_hash_table
*htab
;
3832 const struct elf_backend_data
*bed
;
3837 htab
= elf32_arm_hash_table (info
);
3838 dynobj
= htab
->root
.dynobj
;
3839 bed
= get_elf_backend_data (dynobj
);
3840 flags
= bed
->dynamic_sec_flags
;
3842 if (htab
->root
.iplt
== NULL
)
3844 s
= bfd_make_section_anyway_with_flags (dynobj
, ".iplt",
3845 flags
| SEC_READONLY
| SEC_CODE
);
3847 || !bfd_set_section_alignment (s
, bed
->plt_alignment
))
3849 htab
->root
.iplt
= s
;
3852 if (htab
->root
.irelplt
== NULL
)
3854 s
= bfd_make_section_anyway_with_flags (dynobj
,
3855 RELOC_SECTION (htab
, ".iplt"),
3856 flags
| SEC_READONLY
);
3858 || !bfd_set_section_alignment (s
, bed
->s
->log_file_align
))
3860 htab
->root
.irelplt
= s
;
3863 if (htab
->root
.igotplt
== NULL
)
3865 s
= bfd_make_section_anyway_with_flags (dynobj
, ".igot.plt", flags
);
3867 || !bfd_set_section_alignment (s
, bed
->s
->log_file_align
))
3869 htab
->root
.igotplt
= s
;
3874 /* Determine if we're dealing with a Thumb only architecture. */
3877 using_thumb_only (struct elf32_arm_link_hash_table
*globals
)
3880 int profile
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
3881 Tag_CPU_arch_profile
);
3884 return profile
== 'M';
3886 arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
3888 /* Force return logic to be reviewed for each new architecture. */
3889 BFD_ASSERT (arch
<= TAG_CPU_ARCH_V8_1M_MAIN
);
3891 if (arch
== TAG_CPU_ARCH_V6_M
3892 || arch
== TAG_CPU_ARCH_V6S_M
3893 || arch
== TAG_CPU_ARCH_V7E_M
3894 || arch
== TAG_CPU_ARCH_V8M_BASE
3895 || arch
== TAG_CPU_ARCH_V8M_MAIN
3896 || arch
== TAG_CPU_ARCH_V8_1M_MAIN
)
3902 /* Determine if we're dealing with a Thumb-2 object. */
3905 using_thumb2 (struct elf32_arm_link_hash_table
*globals
)
3908 int thumb_isa
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
3912 return thumb_isa
== 2;
3914 arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
3916 /* Force return logic to be reviewed for each new architecture. */
3917 BFD_ASSERT (arch
<= TAG_CPU_ARCH_V8_1M_MAIN
);
3919 return (arch
== TAG_CPU_ARCH_V6T2
3920 || arch
== TAG_CPU_ARCH_V7
3921 || arch
== TAG_CPU_ARCH_V7E_M
3922 || arch
== TAG_CPU_ARCH_V8
3923 || arch
== TAG_CPU_ARCH_V8R
3924 || arch
== TAG_CPU_ARCH_V8M_MAIN
3925 || arch
== TAG_CPU_ARCH_V8_1M_MAIN
);
3928 /* Determine whether Thumb-2 BL instruction is available. */
3931 using_thumb2_bl (struct elf32_arm_link_hash_table
*globals
)
3934 bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
3936 /* Force return logic to be reviewed for each new architecture. */
3937 BFD_ASSERT (arch
<= TAG_CPU_ARCH_V8_1M_MAIN
);
3939 /* Architecture was introduced after ARMv6T2 (eg. ARMv6-M). */
3940 return (arch
== TAG_CPU_ARCH_V6T2
3941 || arch
>= TAG_CPU_ARCH_V7
);
3944 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3945 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3949 elf32_arm_create_dynamic_sections (bfd
*dynobj
, struct bfd_link_info
*info
)
3951 struct elf32_arm_link_hash_table
*htab
;
3953 htab
= elf32_arm_hash_table (info
);
3957 if (!htab
->root
.sgot
&& !create_got_section (dynobj
, info
))
3960 if (!_bfd_elf_create_dynamic_sections (dynobj
, info
))
3963 if (htab
->vxworks_p
)
3965 if (!elf_vxworks_create_dynamic_sections (dynobj
, info
, &htab
->srelplt2
))
3968 if (bfd_link_pic (info
))
3970 htab
->plt_header_size
= 0;
3971 htab
->plt_entry_size
3972 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry
);
3976 htab
->plt_header_size
3977 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry
);
3978 htab
->plt_entry_size
3979 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry
);
3982 if (elf_elfheader (dynobj
))
3983 elf_elfheader (dynobj
)->e_ident
[EI_CLASS
] = ELFCLASS32
;
3988 Test for thumb only architectures. Note - we cannot just call
3989 using_thumb_only() as the attributes in the output bfd have not been
3990 initialised at this point, so instead we use the input bfd. */
3991 bfd
* saved_obfd
= htab
->obfd
;
3993 htab
->obfd
= dynobj
;
3994 if (using_thumb_only (htab
))
3996 htab
->plt_header_size
= 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry
);
3997 htab
->plt_entry_size
= 4 * ARRAY_SIZE (elf32_thumb2_plt_entry
);
3999 htab
->obfd
= saved_obfd
;
4002 if (htab
->fdpic_p
) {
4003 htab
->plt_header_size
= 0;
4004 if (info
->flags
& DF_BIND_NOW
)
4005 htab
->plt_entry_size
= 4 * (ARRAY_SIZE(elf32_arm_fdpic_plt_entry
) - 5);
4007 htab
->plt_entry_size
= 4 * ARRAY_SIZE(elf32_arm_fdpic_plt_entry
);
4010 if (!htab
->root
.splt
4011 || !htab
->root
.srelplt
4012 || !htab
->root
.sdynbss
4013 || (!bfd_link_pic (info
) && !htab
->root
.srelbss
))
4019 /* Copy the extra info we tack onto an elf_link_hash_entry. */
4022 elf32_arm_copy_indirect_symbol (struct bfd_link_info
*info
,
4023 struct elf_link_hash_entry
*dir
,
4024 struct elf_link_hash_entry
*ind
)
4026 struct elf32_arm_link_hash_entry
*edir
, *eind
;
4028 edir
= (struct elf32_arm_link_hash_entry
*) dir
;
4029 eind
= (struct elf32_arm_link_hash_entry
*) ind
;
4031 if (ind
->dyn_relocs
!= NULL
)
4033 if (dir
->dyn_relocs
!= NULL
)
4035 struct elf_dyn_relocs
**pp
;
4036 struct elf_dyn_relocs
*p
;
4038 /* Add reloc counts against the indirect sym to the direct sym
4039 list. Merge any entries against the same section. */
4040 for (pp
= &ind
->dyn_relocs
; (p
= *pp
) != NULL
; )
4042 struct elf_dyn_relocs
*q
;
4044 for (q
= dir
->dyn_relocs
; q
!= NULL
; q
= q
->next
)
4045 if (q
->sec
== p
->sec
)
4047 q
->pc_count
+= p
->pc_count
;
4048 q
->count
+= p
->count
;
4055 *pp
= dir
->dyn_relocs
;
4058 dir
->dyn_relocs
= ind
->dyn_relocs
;
4059 ind
->dyn_relocs
= NULL
;
4062 if (ind
->root
.type
== bfd_link_hash_indirect
)
4064 /* Copy over PLT info. */
4065 edir
->plt
.thumb_refcount
+= eind
->plt
.thumb_refcount
;
4066 eind
->plt
.thumb_refcount
= 0;
4067 edir
->plt
.maybe_thumb_refcount
+= eind
->plt
.maybe_thumb_refcount
;
4068 eind
->plt
.maybe_thumb_refcount
= 0;
4069 edir
->plt
.noncall_refcount
+= eind
->plt
.noncall_refcount
;
4070 eind
->plt
.noncall_refcount
= 0;
4072 /* Copy FDPIC counters. */
4073 edir
->fdpic_cnts
.gotofffuncdesc_cnt
+= eind
->fdpic_cnts
.gotofffuncdesc_cnt
;
4074 edir
->fdpic_cnts
.gotfuncdesc_cnt
+= eind
->fdpic_cnts
.gotfuncdesc_cnt
;
4075 edir
->fdpic_cnts
.funcdesc_cnt
+= eind
->fdpic_cnts
.funcdesc_cnt
;
4077 /* We should only allocate a function to .iplt once the final
4078 symbol information is known. */
4079 BFD_ASSERT (!eind
->is_iplt
);
4081 if (dir
->got
.refcount
<= 0)
4083 edir
->tls_type
= eind
->tls_type
;
4084 eind
->tls_type
= GOT_UNKNOWN
;
4088 _bfd_elf_link_hash_copy_indirect (info
, dir
, ind
);
4091 /* Destroy an ARM elf linker hash table. */
4094 elf32_arm_link_hash_table_free (bfd
*obfd
)
4096 struct elf32_arm_link_hash_table
*ret
4097 = (struct elf32_arm_link_hash_table
*) obfd
->link
.hash
;
4099 bfd_hash_table_free (&ret
->stub_hash_table
);
4100 _bfd_elf_link_hash_table_free (obfd
);
4103 /* Create an ARM elf linker hash table. */
4105 static struct bfd_link_hash_table
*
4106 elf32_arm_link_hash_table_create (bfd
*abfd
)
4108 struct elf32_arm_link_hash_table
*ret
;
4109 size_t amt
= sizeof (struct elf32_arm_link_hash_table
);
4111 ret
= (struct elf32_arm_link_hash_table
*) bfd_zmalloc (amt
);
4115 if (!_bfd_elf_link_hash_table_init (& ret
->root
, abfd
,
4116 elf32_arm_link_hash_newfunc
,
4117 sizeof (struct elf32_arm_link_hash_entry
),
4124 ret
->vfp11_fix
= BFD_ARM_VFP11_FIX_NONE
;
4125 ret
->stm32l4xx_fix
= BFD_ARM_STM32L4XX_FIX_NONE
;
4126 #ifdef FOUR_WORD_PLT
4127 ret
->plt_header_size
= 16;
4128 ret
->plt_entry_size
= 16;
4130 ret
->plt_header_size
= 20;
4131 ret
->plt_entry_size
= elf32_arm_use_long_plt_entry
? 16 : 12;
4133 ret
->use_rel
= TRUE
;
4137 if (!bfd_hash_table_init (&ret
->stub_hash_table
, stub_hash_newfunc
,
4138 sizeof (struct elf32_arm_stub_hash_entry
)))
4140 _bfd_elf_link_hash_table_free (abfd
);
4143 ret
->root
.root
.hash_table_free
= elf32_arm_link_hash_table_free
;
4145 return &ret
->root
.root
;
4148 /* Determine what kind of NOPs are available. */
4151 arch_has_arm_nop (struct elf32_arm_link_hash_table
*globals
)
4153 const int arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
4156 /* Force return logic to be reviewed for each new architecture. */
4157 BFD_ASSERT (arch
<= TAG_CPU_ARCH_V8_1M_MAIN
);
4159 return (arch
== TAG_CPU_ARCH_V6T2
4160 || arch
== TAG_CPU_ARCH_V6K
4161 || arch
== TAG_CPU_ARCH_V7
4162 || arch
== TAG_CPU_ARCH_V8
4163 || arch
== TAG_CPU_ARCH_V8R
);
4167 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type
)
4171 case arm_stub_long_branch_thumb_only
:
4172 case arm_stub_long_branch_thumb2_only
:
4173 case arm_stub_long_branch_thumb2_only_pure
:
4174 case arm_stub_long_branch_v4t_thumb_arm
:
4175 case arm_stub_short_branch_v4t_thumb_arm
:
4176 case arm_stub_long_branch_v4t_thumb_arm_pic
:
4177 case arm_stub_long_branch_v4t_thumb_tls_pic
:
4178 case arm_stub_long_branch_thumb_only_pic
:
4179 case arm_stub_cmse_branch_thumb_only
:
4190 /* Determine the type of stub needed, if any, for a call. */
4192 static enum elf32_arm_stub_type
4193 arm_type_of_stub (struct bfd_link_info
*info
,
4194 asection
*input_sec
,
4195 const Elf_Internal_Rela
*rel
,
4196 unsigned char st_type
,
4197 enum arm_st_branch_type
*actual_branch_type
,
4198 struct elf32_arm_link_hash_entry
*hash
,
4199 bfd_vma destination
,
4205 bfd_signed_vma branch_offset
;
4206 unsigned int r_type
;
4207 struct elf32_arm_link_hash_table
* globals
;
4208 bfd_boolean thumb2
, thumb2_bl
, thumb_only
;
4209 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
4211 enum arm_st_branch_type branch_type
= *actual_branch_type
;
4212 union gotplt_union
*root_plt
;
4213 struct arm_plt_info
*arm_plt
;
4217 if (branch_type
== ST_BRANCH_LONG
)
4220 globals
= elf32_arm_hash_table (info
);
4221 if (globals
== NULL
)
4224 thumb_only
= using_thumb_only (globals
);
4225 thumb2
= using_thumb2 (globals
);
4226 thumb2_bl
= using_thumb2_bl (globals
);
4228 arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
4230 /* True for architectures that implement the thumb2 movw instruction. */
4231 thumb2_movw
= thumb2
|| (arch
== TAG_CPU_ARCH_V8M_BASE
);
4233 /* Determine where the call point is. */
4234 location
= (input_sec
->output_offset
4235 + input_sec
->output_section
->vma
4238 r_type
= ELF32_R_TYPE (rel
->r_info
);
4240 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
4241 are considering a function call relocation. */
4242 if (thumb_only
&& (r_type
== R_ARM_THM_CALL
|| r_type
== R_ARM_THM_JUMP24
4243 || r_type
== R_ARM_THM_JUMP19
)
4244 && branch_type
== ST_BRANCH_TO_ARM
)
4245 branch_type
= ST_BRANCH_TO_THUMB
;
4247 /* For TLS call relocs, it is the caller's responsibility to provide
4248 the address of the appropriate trampoline. */
4249 if (r_type
!= R_ARM_TLS_CALL
4250 && r_type
!= R_ARM_THM_TLS_CALL
4251 && elf32_arm_get_plt_info (input_bfd
, globals
, hash
,
4252 ELF32_R_SYM (rel
->r_info
), &root_plt
,
4254 && root_plt
->offset
!= (bfd_vma
) -1)
4258 if (hash
== NULL
|| hash
->is_iplt
)
4259 splt
= globals
->root
.iplt
;
4261 splt
= globals
->root
.splt
;
4266 /* Note when dealing with PLT entries: the main PLT stub is in
4267 ARM mode, so if the branch is in Thumb mode, another
4268 Thumb->ARM stub will be inserted later just before the ARM
4269 PLT stub. If a long branch stub is needed, we'll add a
4270 Thumb->Arm one and branch directly to the ARM PLT entry.
4271 Here, we have to check if a pre-PLT Thumb->ARM stub
4272 is needed and if it will be close enough. */
4274 destination
= (splt
->output_section
->vma
4275 + splt
->output_offset
4276 + root_plt
->offset
);
4279 /* Thumb branch/call to PLT: it can become a branch to ARM
4280 or to Thumb. We must perform the same checks and
4281 corrections as in elf32_arm_final_link_relocate. */
4282 if ((r_type
== R_ARM_THM_CALL
)
4283 || (r_type
== R_ARM_THM_JUMP24
))
4285 if (globals
->use_blx
4286 && r_type
== R_ARM_THM_CALL
4289 /* If the Thumb BLX instruction is available, convert
4290 the BL to a BLX instruction to call the ARM-mode
4292 branch_type
= ST_BRANCH_TO_ARM
;
4297 /* Target the Thumb stub before the ARM PLT entry. */
4298 destination
-= PLT_THUMB_STUB_SIZE
;
4299 branch_type
= ST_BRANCH_TO_THUMB
;
4304 branch_type
= ST_BRANCH_TO_ARM
;
4308 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
4309 BFD_ASSERT (st_type
!= STT_GNU_IFUNC
);
4311 branch_offset
= (bfd_signed_vma
)(destination
- location
);
4313 if (r_type
== R_ARM_THM_CALL
|| r_type
== R_ARM_THM_JUMP24
4314 || r_type
== R_ARM_THM_TLS_CALL
|| r_type
== R_ARM_THM_JUMP19
)
4316 /* Handle cases where:
4317 - this call goes too far (different Thumb/Thumb2 max
4319 - it's a Thumb->Arm call and blx is not available, or it's a
4320 Thumb->Arm branch (not bl). A stub is needed in this case,
4321 but only if this call is not through a PLT entry. Indeed,
4322 PLT stubs handle mode switching already. */
4324 && (branch_offset
> THM_MAX_FWD_BRANCH_OFFSET
4325 || (branch_offset
< THM_MAX_BWD_BRANCH_OFFSET
)))
4327 && (branch_offset
> THM2_MAX_FWD_BRANCH_OFFSET
4328 || (branch_offset
< THM2_MAX_BWD_BRANCH_OFFSET
)))
4330 && (branch_offset
> THM2_MAX_FWD_COND_BRANCH_OFFSET
4331 || (branch_offset
< THM2_MAX_BWD_COND_BRANCH_OFFSET
))
4332 && (r_type
== R_ARM_THM_JUMP19
))
4333 || (branch_type
== ST_BRANCH_TO_ARM
4334 && (((r_type
== R_ARM_THM_CALL
4335 || r_type
== R_ARM_THM_TLS_CALL
) && !globals
->use_blx
)
4336 || (r_type
== R_ARM_THM_JUMP24
)
4337 || (r_type
== R_ARM_THM_JUMP19
))
4340 /* If we need to insert a Thumb-Thumb long branch stub to a
4341 PLT, use one that branches directly to the ARM PLT
4342 stub. If we pretended we'd use the pre-PLT Thumb->ARM
4343 stub, undo this now. */
4344 if ((branch_type
== ST_BRANCH_TO_THUMB
) && use_plt
&& !thumb_only
)
4346 branch_type
= ST_BRANCH_TO_ARM
;
4347 branch_offset
+= PLT_THUMB_STUB_SIZE
;
4350 if (branch_type
== ST_BRANCH_TO_THUMB
)
4352 /* Thumb to thumb. */
4355 if (input_sec
->flags
& SEC_ELF_PURECODE
)
4357 (_("%pB(%pA): warning: long branch veneers used in"
4358 " section with SHF_ARM_PURECODE section"
4359 " attribute is only supported for M-profile"
4360 " targets that implement the movw instruction"),
4361 input_bfd
, input_sec
);
4363 stub_type
= (bfd_link_pic (info
) | globals
->pic_veneer
)
4365 ? ((globals
->use_blx
4366 && (r_type
== R_ARM_THM_CALL
))
4367 /* V5T and above. Stub starts with ARM code, so
4368 we must be able to switch mode before
4369 reaching it, which is only possible for 'bl'
4370 (ie R_ARM_THM_CALL relocation). */
4371 ? arm_stub_long_branch_any_thumb_pic
4372 /* On V4T, use Thumb code only. */
4373 : arm_stub_long_branch_v4t_thumb_thumb_pic
)
4375 /* non-PIC stubs. */
4376 : ((globals
->use_blx
4377 && (r_type
== R_ARM_THM_CALL
))
4378 /* V5T and above. */
4379 ? arm_stub_long_branch_any_any
4381 : arm_stub_long_branch_v4t_thumb_thumb
);
4385 if (thumb2_movw
&& (input_sec
->flags
& SEC_ELF_PURECODE
))
4386 stub_type
= arm_stub_long_branch_thumb2_only_pure
;
4389 if (input_sec
->flags
& SEC_ELF_PURECODE
)
4391 (_("%pB(%pA): warning: long branch veneers used in"
4392 " section with SHF_ARM_PURECODE section"
4393 " attribute is only supported for M-profile"
4394 " targets that implement the movw instruction"),
4395 input_bfd
, input_sec
);
4397 stub_type
= (bfd_link_pic (info
) | globals
->pic_veneer
)
4399 ? arm_stub_long_branch_thumb_only_pic
4401 : (thumb2
? arm_stub_long_branch_thumb2_only
4402 : arm_stub_long_branch_thumb_only
);
4408 if (input_sec
->flags
& SEC_ELF_PURECODE
)
4410 (_("%pB(%pA): warning: long branch veneers used in"
4411 " section with SHF_ARM_PURECODE section"
4412 " attribute is only supported" " for M-profile"
4413 " targets that implement the movw instruction"),
4414 input_bfd
, input_sec
);
4418 && sym_sec
->owner
!= NULL
4419 && !INTERWORK_FLAG (sym_sec
->owner
))
4422 (_("%pB(%s): warning: interworking not enabled;"
4423 " first occurrence: %pB: %s call to %s"),
4424 sym_sec
->owner
, name
, input_bfd
, "Thumb", "ARM");
4428 (bfd_link_pic (info
) | globals
->pic_veneer
)
4430 ? (r_type
== R_ARM_THM_TLS_CALL
4431 /* TLS PIC stubs. */
4432 ? (globals
->use_blx
? arm_stub_long_branch_any_tls_pic
4433 : arm_stub_long_branch_v4t_thumb_tls_pic
)
4434 : ((globals
->use_blx
&& r_type
== R_ARM_THM_CALL
)
4435 /* V5T PIC and above. */
4436 ? arm_stub_long_branch_any_arm_pic
4438 : arm_stub_long_branch_v4t_thumb_arm_pic
))
4440 /* non-PIC stubs. */
4441 : ((globals
->use_blx
&& r_type
== R_ARM_THM_CALL
)
4442 /* V5T and above. */
4443 ? arm_stub_long_branch_any_any
4445 : arm_stub_long_branch_v4t_thumb_arm
);
4447 /* Handle v4t short branches. */
4448 if ((stub_type
== arm_stub_long_branch_v4t_thumb_arm
)
4449 && (branch_offset
<= THM_MAX_FWD_BRANCH_OFFSET
)
4450 && (branch_offset
>= THM_MAX_BWD_BRANCH_OFFSET
))
4451 stub_type
= arm_stub_short_branch_v4t_thumb_arm
;
4455 else if (r_type
== R_ARM_CALL
4456 || r_type
== R_ARM_JUMP24
4457 || r_type
== R_ARM_PLT32
4458 || r_type
== R_ARM_TLS_CALL
)
4460 if (input_sec
->flags
& SEC_ELF_PURECODE
)
4462 (_("%pB(%pA): warning: long branch veneers used in"
4463 " section with SHF_ARM_PURECODE section"
4464 " attribute is only supported for M-profile"
4465 " targets that implement the movw instruction"),
4466 input_bfd
, input_sec
);
4467 if (branch_type
== ST_BRANCH_TO_THUMB
)
4472 && sym_sec
->owner
!= NULL
4473 && !INTERWORK_FLAG (sym_sec
->owner
))
4476 (_("%pB(%s): warning: interworking not enabled;"
4477 " first occurrence: %pB: %s call to %s"),
4478 sym_sec
->owner
, name
, input_bfd
, "ARM", "Thumb");
4481 /* We have an extra 2-bytes reach because of
4482 the mode change (bit 24 (H) of BLX encoding). */
4483 if (branch_offset
> (ARM_MAX_FWD_BRANCH_OFFSET
+ 2)
4484 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
)
4485 || (r_type
== R_ARM_CALL
&& !globals
->use_blx
)
4486 || (r_type
== R_ARM_JUMP24
)
4487 || (r_type
== R_ARM_PLT32
))
4489 stub_type
= (bfd_link_pic (info
) | globals
->pic_veneer
)
4491 ? ((globals
->use_blx
)
4492 /* V5T and above. */
4493 ? arm_stub_long_branch_any_thumb_pic
4495 : arm_stub_long_branch_v4t_arm_thumb_pic
)
4497 /* non-PIC stubs. */
4498 : ((globals
->use_blx
)
4499 /* V5T and above. */
4500 ? arm_stub_long_branch_any_any
4502 : arm_stub_long_branch_v4t_arm_thumb
);
4508 if (branch_offset
> ARM_MAX_FWD_BRANCH_OFFSET
4509 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
))
4512 (bfd_link_pic (info
) | globals
->pic_veneer
)
4514 ? (r_type
== R_ARM_TLS_CALL
4516 ? arm_stub_long_branch_any_tls_pic
4518 ? arm_stub_long_branch_arm_nacl_pic
4519 : arm_stub_long_branch_any_arm_pic
))
4520 /* non-PIC stubs. */
4522 ? arm_stub_long_branch_arm_nacl
4523 : arm_stub_long_branch_any_any
);
4528 /* If a stub is needed, record the actual destination type. */
4529 if (stub_type
!= arm_stub_none
)
4530 *actual_branch_type
= branch_type
;
4535 /* Build a name for an entry in the stub hash table. */
4538 elf32_arm_stub_name (const asection
*input_section
,
4539 const asection
*sym_sec
,
4540 const struct elf32_arm_link_hash_entry
*hash
,
4541 const Elf_Internal_Rela
*rel
,
4542 enum elf32_arm_stub_type stub_type
)
4549 len
= 8 + 1 + strlen (hash
->root
.root
.root
.string
) + 1 + 8 + 1 + 2 + 1;
4550 stub_name
= (char *) bfd_malloc (len
);
4551 if (stub_name
!= NULL
)
4552 sprintf (stub_name
, "%08x_%s+%x_%d",
4553 input_section
->id
& 0xffffffff,
4554 hash
->root
.root
.root
.string
,
4555 (int) rel
->r_addend
& 0xffffffff,
4560 len
= 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
4561 stub_name
= (char *) bfd_malloc (len
);
4562 if (stub_name
!= NULL
)
4563 sprintf (stub_name
, "%08x_%x:%x+%x_%d",
4564 input_section
->id
& 0xffffffff,
4565 sym_sec
->id
& 0xffffffff,
4566 ELF32_R_TYPE (rel
->r_info
) == R_ARM_TLS_CALL
4567 || ELF32_R_TYPE (rel
->r_info
) == R_ARM_THM_TLS_CALL
4568 ? 0 : (int) ELF32_R_SYM (rel
->r_info
) & 0xffffffff,
4569 (int) rel
->r_addend
& 0xffffffff,
4576 /* Look up an entry in the stub hash. Stub entries are cached because
4577 creating the stub name takes a bit of time. */
4579 static struct elf32_arm_stub_hash_entry
*
4580 elf32_arm_get_stub_entry (const asection
*input_section
,
4581 const asection
*sym_sec
,
4582 struct elf_link_hash_entry
*hash
,
4583 const Elf_Internal_Rela
*rel
,
4584 struct elf32_arm_link_hash_table
*htab
,
4585 enum elf32_arm_stub_type stub_type
)
4587 struct elf32_arm_stub_hash_entry
*stub_entry
;
4588 struct elf32_arm_link_hash_entry
*h
= (struct elf32_arm_link_hash_entry
*) hash
;
4589 const asection
*id_sec
;
4591 if ((input_section
->flags
& SEC_CODE
) == 0)
4594 /* If the input section is the CMSE stubs one and it needs a long
4595 branch stub to reach it's final destination, give up with an
4596 error message: this is not supported. See PR ld/24709. */
4597 if (!strncmp (input_section
->name
, CMSE_STUB_NAME
, strlen(CMSE_STUB_NAME
)))
4599 bfd
*output_bfd
= htab
->obfd
;
4600 asection
*out_sec
= bfd_get_section_by_name (output_bfd
, CMSE_STUB_NAME
);
4602 _bfd_error_handler (_("ERROR: CMSE stub (%s section) too far "
4603 "(%#" PRIx64
") from destination (%#" PRIx64
")"),
4605 (uint64_t)out_sec
->output_section
->vma
4606 + out_sec
->output_offset
,
4607 (uint64_t)sym_sec
->output_section
->vma
4608 + sym_sec
->output_offset
4609 + h
->root
.root
.u
.def
.value
);
4610 /* Exit, rather than leave incompletely processed
4615 /* If this input section is part of a group of sections sharing one
4616 stub section, then use the id of the first section in the group.
4617 Stub names need to include a section id, as there may well be
4618 more than one stub used to reach say, printf, and we need to
4619 distinguish between them. */
4620 BFD_ASSERT (input_section
->id
<= htab
->top_id
);
4621 id_sec
= htab
->stub_group
[input_section
->id
].link_sec
;
4623 if (h
!= NULL
&& h
->stub_cache
!= NULL
4624 && h
->stub_cache
->h
== h
4625 && h
->stub_cache
->id_sec
== id_sec
4626 && h
->stub_cache
->stub_type
== stub_type
)
4628 stub_entry
= h
->stub_cache
;
4634 stub_name
= elf32_arm_stub_name (id_sec
, sym_sec
, h
, rel
, stub_type
);
4635 if (stub_name
== NULL
)
4638 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
,
4639 stub_name
, FALSE
, FALSE
);
4641 h
->stub_cache
= stub_entry
;
4649 /* Whether veneers of type STUB_TYPE require to be in a dedicated output
4653 arm_dedicated_stub_output_section_required (enum elf32_arm_stub_type stub_type
)
4655 if (stub_type
>= max_stub_type
)
4656 abort (); /* Should be unreachable. */
4660 case arm_stub_cmse_branch_thumb_only
:
4667 abort (); /* Should be unreachable. */
4670 /* Required alignment (as a power of 2) for the dedicated section holding
4671 veneers of type STUB_TYPE, or 0 if veneers of this type are interspersed
4672 with input sections. */
4675 arm_dedicated_stub_output_section_required_alignment
4676 (enum elf32_arm_stub_type stub_type
)
4678 if (stub_type
>= max_stub_type
)
4679 abort (); /* Should be unreachable. */
4683 /* Vectors of Secure Gateway veneers must be aligned on 32byte
4685 case arm_stub_cmse_branch_thumb_only
:
4689 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type
));
4693 abort (); /* Should be unreachable. */
4696 /* Name of the dedicated output section to put veneers of type STUB_TYPE, or
4697 NULL if veneers of this type are interspersed with input sections. */
4700 arm_dedicated_stub_output_section_name (enum elf32_arm_stub_type stub_type
)
4702 if (stub_type
>= max_stub_type
)
4703 abort (); /* Should be unreachable. */
4707 case arm_stub_cmse_branch_thumb_only
:
4708 return CMSE_STUB_NAME
;
4711 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type
));
4715 abort (); /* Should be unreachable. */
4718 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4719 returns the address of the hash table field in HTAB holding a pointer to the
4720 corresponding input section. Otherwise, returns NULL. */
4723 arm_dedicated_stub_input_section_ptr (struct elf32_arm_link_hash_table
*htab
,
4724 enum elf32_arm_stub_type stub_type
)
4726 if (stub_type
>= max_stub_type
)
4727 abort (); /* Should be unreachable. */
4731 case arm_stub_cmse_branch_thumb_only
:
4732 return &htab
->cmse_stub_sec
;
4735 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type
));
4739 abort (); /* Should be unreachable. */
4742 /* Find or create a stub section to contain a stub of type STUB_TYPE. SECTION
4743 is the section that branch into veneer and can be NULL if stub should go in
4744 a dedicated output section. Returns a pointer to the stub section, and the
4745 section to which the stub section will be attached (in *LINK_SEC_P).
4746 LINK_SEC_P may be NULL. */
4749 elf32_arm_create_or_find_stub_sec (asection
**link_sec_p
, asection
*section
,
4750 struct elf32_arm_link_hash_table
*htab
,
4751 enum elf32_arm_stub_type stub_type
)
4753 asection
*link_sec
, *out_sec
, **stub_sec_p
;
4754 const char *stub_sec_prefix
;
4755 bfd_boolean dedicated_output_section
=
4756 arm_dedicated_stub_output_section_required (stub_type
);
4759 if (dedicated_output_section
)
4761 bfd
*output_bfd
= htab
->obfd
;
4762 const char *out_sec_name
=
4763 arm_dedicated_stub_output_section_name (stub_type
);
4765 stub_sec_p
= arm_dedicated_stub_input_section_ptr (htab
, stub_type
);
4766 stub_sec_prefix
= out_sec_name
;
4767 align
= arm_dedicated_stub_output_section_required_alignment (stub_type
);
4768 out_sec
= bfd_get_section_by_name (output_bfd
, out_sec_name
);
4769 if (out_sec
== NULL
)
4771 _bfd_error_handler (_("no address assigned to the veneers output "
4772 "section %s"), out_sec_name
);
4778 BFD_ASSERT (section
->id
<= htab
->top_id
);
4779 link_sec
= htab
->stub_group
[section
->id
].link_sec
;
4780 BFD_ASSERT (link_sec
!= NULL
);
4781 stub_sec_p
= &htab
->stub_group
[section
->id
].stub_sec
;
4782 if (*stub_sec_p
== NULL
)
4783 stub_sec_p
= &htab
->stub_group
[link_sec
->id
].stub_sec
;
4784 stub_sec_prefix
= link_sec
->name
;
4785 out_sec
= link_sec
->output_section
;
4786 align
= htab
->nacl_p
? 4 : 3;
4789 if (*stub_sec_p
== NULL
)
4795 namelen
= strlen (stub_sec_prefix
);
4796 len
= namelen
+ sizeof (STUB_SUFFIX
);
4797 s_name
= (char *) bfd_alloc (htab
->stub_bfd
, len
);
4801 memcpy (s_name
, stub_sec_prefix
, namelen
);
4802 memcpy (s_name
+ namelen
, STUB_SUFFIX
, sizeof (STUB_SUFFIX
));
4803 *stub_sec_p
= (*htab
->add_stub_section
) (s_name
, out_sec
, link_sec
,
4805 if (*stub_sec_p
== NULL
)
4808 out_sec
->flags
|= SEC_ALLOC
| SEC_LOAD
| SEC_READONLY
| SEC_CODE
4809 | SEC_HAS_CONTENTS
| SEC_RELOC
| SEC_IN_MEMORY
4813 if (!dedicated_output_section
)
4814 htab
->stub_group
[section
->id
].stub_sec
= *stub_sec_p
;
4817 *link_sec_p
= link_sec
;
4822 /* Add a new stub entry to the stub hash. Not all fields of the new
4823 stub entry are initialised. */
4825 static struct elf32_arm_stub_hash_entry
*
4826 elf32_arm_add_stub (const char *stub_name
, asection
*section
,
4827 struct elf32_arm_link_hash_table
*htab
,
4828 enum elf32_arm_stub_type stub_type
)
4832 struct elf32_arm_stub_hash_entry
*stub_entry
;
4834 stub_sec
= elf32_arm_create_or_find_stub_sec (&link_sec
, section
, htab
,
4836 if (stub_sec
== NULL
)
4839 /* Enter this entry into the linker stub hash table. */
4840 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
, stub_name
,
4842 if (stub_entry
== NULL
)
4844 if (section
== NULL
)
4846 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
4847 section
->owner
, stub_name
);
4851 stub_entry
->stub_sec
= stub_sec
;
4852 stub_entry
->stub_offset
= (bfd_vma
) -1;
4853 stub_entry
->id_sec
= link_sec
;
4858 /* Store an Arm insn into an output section not processed by
4859 elf32_arm_write_section. */
4862 put_arm_insn (struct elf32_arm_link_hash_table
* htab
,
4863 bfd
* output_bfd
, bfd_vma val
, void * ptr
)
4865 if (htab
->byteswap_code
!= bfd_little_endian (output_bfd
))
4866 bfd_putl32 (val
, ptr
);
4868 bfd_putb32 (val
, ptr
);
4871 /* Store a 16-bit Thumb insn into an output section not processed by
4872 elf32_arm_write_section. */
4875 put_thumb_insn (struct elf32_arm_link_hash_table
* htab
,
4876 bfd
* output_bfd
, bfd_vma val
, void * ptr
)
4878 if (htab
->byteswap_code
!= bfd_little_endian (output_bfd
))
4879 bfd_putl16 (val
, ptr
);
4881 bfd_putb16 (val
, ptr
);
4884 /* Store a Thumb2 insn into an output section not processed by
4885 elf32_arm_write_section. */
4888 put_thumb2_insn (struct elf32_arm_link_hash_table
* htab
,
4889 bfd
* output_bfd
, bfd_vma val
, bfd_byte
* ptr
)
4891 /* T2 instructions are 16-bit streamed. */
4892 if (htab
->byteswap_code
!= bfd_little_endian (output_bfd
))
4894 bfd_putl16 ((val
>> 16) & 0xffff, ptr
);
4895 bfd_putl16 ((val
& 0xffff), ptr
+ 2);
4899 bfd_putb16 ((val
>> 16) & 0xffff, ptr
);
4900 bfd_putb16 ((val
& 0xffff), ptr
+ 2);
4904 /* If it's possible to change R_TYPE to a more efficient access
4905 model, return the new reloc type. */
4908 elf32_arm_tls_transition (struct bfd_link_info
*info
, int r_type
,
4909 struct elf_link_hash_entry
*h
)
4911 int is_local
= (h
== NULL
);
4913 if (bfd_link_dll (info
)
4914 || (h
&& h
->root
.type
== bfd_link_hash_undefweak
))
4917 /* We do not support relaxations for Old TLS models. */
4920 case R_ARM_TLS_GOTDESC
:
4921 case R_ARM_TLS_CALL
:
4922 case R_ARM_THM_TLS_CALL
:
4923 case R_ARM_TLS_DESCSEQ
:
4924 case R_ARM_THM_TLS_DESCSEQ
:
4925 return is_local
? R_ARM_TLS_LE32
: R_ARM_TLS_IE32
;
4931 static bfd_reloc_status_type elf32_arm_final_link_relocate
4932 (reloc_howto_type
*, bfd
*, bfd
*, asection
*, bfd_byte
*,
4933 Elf_Internal_Rela
*, bfd_vma
, struct bfd_link_info
*, asection
*,
4934 const char *, unsigned char, enum arm_st_branch_type
,
4935 struct elf_link_hash_entry
*, bfd_boolean
*, char **);
4938 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type
)
4942 case arm_stub_a8_veneer_b_cond
:
4943 case arm_stub_a8_veneer_b
:
4944 case arm_stub_a8_veneer_bl
:
4947 case arm_stub_long_branch_any_any
:
4948 case arm_stub_long_branch_v4t_arm_thumb
:
4949 case arm_stub_long_branch_thumb_only
:
4950 case arm_stub_long_branch_thumb2_only
:
4951 case arm_stub_long_branch_thumb2_only_pure
:
4952 case arm_stub_long_branch_v4t_thumb_thumb
:
4953 case arm_stub_long_branch_v4t_thumb_arm
:
4954 case arm_stub_short_branch_v4t_thumb_arm
:
4955 case arm_stub_long_branch_any_arm_pic
:
4956 case arm_stub_long_branch_any_thumb_pic
:
4957 case arm_stub_long_branch_v4t_thumb_thumb_pic
:
4958 case arm_stub_long_branch_v4t_arm_thumb_pic
:
4959 case arm_stub_long_branch_v4t_thumb_arm_pic
:
4960 case arm_stub_long_branch_thumb_only_pic
:
4961 case arm_stub_long_branch_any_tls_pic
:
4962 case arm_stub_long_branch_v4t_thumb_tls_pic
:
4963 case arm_stub_cmse_branch_thumb_only
:
4964 case arm_stub_a8_veneer_blx
:
4967 case arm_stub_long_branch_arm_nacl
:
4968 case arm_stub_long_branch_arm_nacl_pic
:
4972 abort (); /* Should be unreachable. */
4976 /* Returns whether stubs of type STUB_TYPE take over the symbol they are
4977 veneering (TRUE) or have their own symbol (FALSE). */
4980 arm_stub_sym_claimed (enum elf32_arm_stub_type stub_type
)
4982 if (stub_type
>= max_stub_type
)
4983 abort (); /* Should be unreachable. */
4987 case arm_stub_cmse_branch_thumb_only
:
4994 abort (); /* Should be unreachable. */
4997 /* Returns the padding needed for the dedicated section used stubs of type
5001 arm_dedicated_stub_section_padding (enum elf32_arm_stub_type stub_type
)
5003 if (stub_type
>= max_stub_type
)
5004 abort (); /* Should be unreachable. */
5008 case arm_stub_cmse_branch_thumb_only
:
5015 abort (); /* Should be unreachable. */
5018 /* If veneers of type STUB_TYPE should go in a dedicated output section,
5019 returns the address of the hash table field in HTAB holding the offset at
5020 which new veneers should be layed out in the stub section. */
5023 arm_new_stubs_start_offset_ptr (struct elf32_arm_link_hash_table
*htab
,
5024 enum elf32_arm_stub_type stub_type
)
5028 case arm_stub_cmse_branch_thumb_only
:
5029 return &htab
->new_cmse_stub_offset
;
5032 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type
));
5038 arm_build_one_stub (struct bfd_hash_entry
*gen_entry
,
5042 bfd_boolean removed_sg_veneer
;
5043 struct elf32_arm_stub_hash_entry
*stub_entry
;
5044 struct elf32_arm_link_hash_table
*globals
;
5045 struct bfd_link_info
*info
;
5052 const insn_sequence
*template_sequence
;
5054 int stub_reloc_idx
[MAXRELOCS
] = {-1, -1};
5055 int stub_reloc_offset
[MAXRELOCS
] = {0, 0};
5057 int just_allocated
= 0;
5059 /* Massage our args to the form they really have. */
5060 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
5061 info
= (struct bfd_link_info
*) in_arg
;
5063 /* Fail if the target section could not be assigned to an output
5064 section. The user should fix his linker script. */
5065 if (stub_entry
->target_section
->output_section
== NULL
5066 && info
->non_contiguous_regions
)
5067 info
->callbacks
->einfo (_("%F%P: Could not assign '%pA' to an output section. "
5068 "Retry without --enable-non-contiguous-regions.\n"),
5069 stub_entry
->target_section
);
5071 globals
= elf32_arm_hash_table (info
);
5072 if (globals
== NULL
)
5075 stub_sec
= stub_entry
->stub_sec
;
5077 if ((globals
->fix_cortex_a8
< 0)
5078 != (arm_stub_required_alignment (stub_entry
->stub_type
) == 2))
5079 /* We have to do less-strictly-aligned fixes last. */
5082 /* Assign a slot at the end of section if none assigned yet. */
5083 if (stub_entry
->stub_offset
== (bfd_vma
) -1)
5085 stub_entry
->stub_offset
= stub_sec
->size
;
5088 loc
= stub_sec
->contents
+ stub_entry
->stub_offset
;
5090 stub_bfd
= stub_sec
->owner
;
5092 /* This is the address of the stub destination. */
5093 sym_value
= (stub_entry
->target_value
5094 + stub_entry
->target_section
->output_offset
5095 + stub_entry
->target_section
->output_section
->vma
);
5097 template_sequence
= stub_entry
->stub_template
;
5098 template_size
= stub_entry
->stub_template_size
;
5101 for (i
= 0; i
< template_size
; i
++)
5103 switch (template_sequence
[i
].type
)
5107 bfd_vma data
= (bfd_vma
) template_sequence
[i
].data
;
5108 if (template_sequence
[i
].reloc_addend
!= 0)
5110 /* We've borrowed the reloc_addend field to mean we should
5111 insert a condition code into this (Thumb-1 branch)
5112 instruction. See THUMB16_BCOND_INSN. */
5113 BFD_ASSERT ((data
& 0xff00) == 0xd000);
5114 data
|= ((stub_entry
->orig_insn
>> 22) & 0xf) << 8;
5116 bfd_put_16 (stub_bfd
, data
, loc
+ size
);
5122 bfd_put_16 (stub_bfd
,
5123 (template_sequence
[i
].data
>> 16) & 0xffff,
5125 bfd_put_16 (stub_bfd
, template_sequence
[i
].data
& 0xffff,
5127 if (template_sequence
[i
].r_type
!= R_ARM_NONE
)
5129 stub_reloc_idx
[nrelocs
] = i
;
5130 stub_reloc_offset
[nrelocs
++] = size
;
5136 bfd_put_32 (stub_bfd
, template_sequence
[i
].data
,
5138 /* Handle cases where the target is encoded within the
5140 if (template_sequence
[i
].r_type
== R_ARM_JUMP24
)
5142 stub_reloc_idx
[nrelocs
] = i
;
5143 stub_reloc_offset
[nrelocs
++] = size
;
5149 bfd_put_32 (stub_bfd
, template_sequence
[i
].data
, loc
+ size
);
5150 stub_reloc_idx
[nrelocs
] = i
;
5151 stub_reloc_offset
[nrelocs
++] = size
;
5162 stub_sec
->size
+= size
;
5164 /* Stub size has already been computed in arm_size_one_stub. Check
5166 BFD_ASSERT (size
== stub_entry
->stub_size
);
5168 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
5169 if (stub_entry
->branch_type
== ST_BRANCH_TO_THUMB
)
5172 /* Assume non empty slots have at least one and at most MAXRELOCS entries
5173 to relocate in each stub. */
5175 (size
== 0 && stub_entry
->stub_type
== arm_stub_cmse_branch_thumb_only
);
5176 BFD_ASSERT (removed_sg_veneer
|| (nrelocs
!= 0 && nrelocs
<= MAXRELOCS
));
5178 for (i
= 0; i
< nrelocs
; i
++)
5180 Elf_Internal_Rela rel
;
5181 bfd_boolean unresolved_reloc
;
5182 char *error_message
;
5184 sym_value
+ template_sequence
[stub_reloc_idx
[i
]].reloc_addend
;
5186 rel
.r_offset
= stub_entry
->stub_offset
+ stub_reloc_offset
[i
];
5187 rel
.r_info
= ELF32_R_INFO (0,
5188 template_sequence
[stub_reloc_idx
[i
]].r_type
);
5191 if (stub_entry
->stub_type
== arm_stub_a8_veneer_b_cond
&& i
== 0)
5192 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
5193 template should refer back to the instruction after the original
5194 branch. We use target_section as Cortex-A8 erratum workaround stubs
5195 are only generated when both source and target are in the same
5197 points_to
= stub_entry
->target_section
->output_section
->vma
5198 + stub_entry
->target_section
->output_offset
5199 + stub_entry
->source_value
;
5201 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
5202 (template_sequence
[stub_reloc_idx
[i
]].r_type
),
5203 stub_bfd
, info
->output_bfd
, stub_sec
, stub_sec
->contents
, &rel
,
5204 points_to
, info
, stub_entry
->target_section
, "", STT_FUNC
,
5205 stub_entry
->branch_type
,
5206 (struct elf_link_hash_entry
*) stub_entry
->h
, &unresolved_reloc
,
5214 /* Calculate the template, template size and instruction size for a stub.
5215 Return value is the instruction size. */
5218 find_stub_size_and_template (enum elf32_arm_stub_type stub_type
,
5219 const insn_sequence
**stub_template
,
5220 int *stub_template_size
)
5222 const insn_sequence
*template_sequence
= NULL
;
5223 int template_size
= 0, i
;
5226 template_sequence
= stub_definitions
[stub_type
].template_sequence
;
5228 *stub_template
= template_sequence
;
5230 template_size
= stub_definitions
[stub_type
].template_size
;
5231 if (stub_template_size
)
5232 *stub_template_size
= template_size
;
5235 for (i
= 0; i
< template_size
; i
++)
5237 switch (template_sequence
[i
].type
)
5258 /* As above, but don't actually build the stub. Just bump offset so
5259 we know stub section sizes. */
5262 arm_size_one_stub (struct bfd_hash_entry
*gen_entry
,
5263 void *in_arg ATTRIBUTE_UNUSED
)
5265 struct elf32_arm_stub_hash_entry
*stub_entry
;
5266 const insn_sequence
*template_sequence
;
5267 int template_size
, size
;
5269 /* Massage our args to the form they really have. */
5270 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
5272 BFD_ASSERT((stub_entry
->stub_type
> arm_stub_none
)
5273 && stub_entry
->stub_type
< ARRAY_SIZE(stub_definitions
));
5275 size
= find_stub_size_and_template (stub_entry
->stub_type
, &template_sequence
,
5278 /* Initialized to -1. Null size indicates an empty slot full of zeros. */
5279 if (stub_entry
->stub_template_size
)
5281 stub_entry
->stub_size
= size
;
5282 stub_entry
->stub_template
= template_sequence
;
5283 stub_entry
->stub_template_size
= template_size
;
5286 /* Already accounted for. */
5287 if (stub_entry
->stub_offset
!= (bfd_vma
) -1)
5290 size
= (size
+ 7) & ~7;
5291 stub_entry
->stub_sec
->size
+= size
;
5296 /* External entry points for sizing and building linker stubs. */
5298 /* Set up various things so that we can make a list of input sections
5299 for each output section included in the link. Returns -1 on error,
5300 0 when no stubs will be needed, and 1 on success. */
5303 elf32_arm_setup_section_lists (bfd
*output_bfd
,
5304 struct bfd_link_info
*info
)
5307 unsigned int bfd_count
;
5308 unsigned int top_id
, top_index
;
5310 asection
**input_list
, **list
;
5312 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
5316 if (! is_elf_hash_table (htab
))
5319 /* Count the number of input BFDs and find the top input section id. */
5320 for (input_bfd
= info
->input_bfds
, bfd_count
= 0, top_id
= 0;
5322 input_bfd
= input_bfd
->link
.next
)
5325 for (section
= input_bfd
->sections
;
5327 section
= section
->next
)
5329 if (top_id
< section
->id
)
5330 top_id
= section
->id
;
5333 htab
->bfd_count
= bfd_count
;
5335 amt
= sizeof (struct map_stub
) * (top_id
+ 1);
5336 htab
->stub_group
= (struct map_stub
*) bfd_zmalloc (amt
);
5337 if (htab
->stub_group
== NULL
)
5339 htab
->top_id
= top_id
;
5341 /* We can't use output_bfd->section_count here to find the top output
5342 section index as some sections may have been removed, and
5343 _bfd_strip_section_from_output doesn't renumber the indices. */
5344 for (section
= output_bfd
->sections
, top_index
= 0;
5346 section
= section
->next
)
5348 if (top_index
< section
->index
)
5349 top_index
= section
->index
;
5352 htab
->top_index
= top_index
;
5353 amt
= sizeof (asection
*) * (top_index
+ 1);
5354 input_list
= (asection
**) bfd_malloc (amt
);
5355 htab
->input_list
= input_list
;
5356 if (input_list
== NULL
)
5359 /* For sections we aren't interested in, mark their entries with a
5360 value we can check later. */
5361 list
= input_list
+ top_index
;
5363 *list
= bfd_abs_section_ptr
;
5364 while (list
-- != input_list
);
5366 for (section
= output_bfd
->sections
;
5368 section
= section
->next
)
5370 if ((section
->flags
& SEC_CODE
) != 0)
5371 input_list
[section
->index
] = NULL
;
5377 /* The linker repeatedly calls this function for each input section,
5378 in the order that input sections are linked into output sections.
5379 Build lists of input sections to determine groupings between which
5380 we may insert linker stubs. */
5383 elf32_arm_next_input_section (struct bfd_link_info
*info
,
5386 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
5391 if (isec
->output_section
->index
<= htab
->top_index
)
5393 asection
**list
= htab
->input_list
+ isec
->output_section
->index
;
5395 if (*list
!= bfd_abs_section_ptr
&& (isec
->flags
& SEC_CODE
) != 0)
5397 /* Steal the link_sec pointer for our list. */
5398 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
5399 /* This happens to make the list in reverse order,
5400 which we reverse later. */
5401 PREV_SEC (isec
) = *list
;
5407 /* See whether we can group stub sections together. Grouping stub
5408 sections may result in fewer stubs. More importantly, we need to
5409 put all .init* and .fini* stubs at the end of the .init or
5410 .fini output sections respectively, because glibc splits the
5411 _init and _fini functions into multiple parts. Putting a stub in
5412 the middle of a function is not a good idea. */
5415 group_sections (struct elf32_arm_link_hash_table
*htab
,
5416 bfd_size_type stub_group_size
,
5417 bfd_boolean stubs_always_after_branch
)
5419 asection
**list
= htab
->input_list
;
5423 asection
*tail
= *list
;
5426 if (tail
== bfd_abs_section_ptr
)
5429 /* Reverse the list: we must avoid placing stubs at the
5430 beginning of the section because the beginning of the text
5431 section may be required for an interrupt vector in bare metal
5433 #define NEXT_SEC PREV_SEC
5435 while (tail
!= NULL
)
5437 /* Pop from tail. */
5438 asection
*item
= tail
;
5439 tail
= PREV_SEC (item
);
5442 NEXT_SEC (item
) = head
;
5446 while (head
!= NULL
)
5450 bfd_vma stub_group_start
= head
->output_offset
;
5451 bfd_vma end_of_next
;
5454 while (NEXT_SEC (curr
) != NULL
)
5456 next
= NEXT_SEC (curr
);
5457 end_of_next
= next
->output_offset
+ next
->size
;
5458 if (end_of_next
- stub_group_start
>= stub_group_size
)
5459 /* End of NEXT is too far from start, so stop. */
5461 /* Add NEXT to the group. */
5465 /* OK, the size from the start to the start of CURR is less
5466 than stub_group_size and thus can be handled by one stub
5467 section. (Or the head section is itself larger than
5468 stub_group_size, in which case we may be toast.)
5469 We should really be keeping track of the total size of
5470 stubs added here, as stubs contribute to the final output
5474 next
= NEXT_SEC (head
);
5475 /* Set up this stub group. */
5476 htab
->stub_group
[head
->id
].link_sec
= curr
;
5478 while (head
!= curr
&& (head
= next
) != NULL
);
5480 /* But wait, there's more! Input sections up to stub_group_size
5481 bytes after the stub section can be handled by it too. */
5482 if (!stubs_always_after_branch
)
5484 stub_group_start
= curr
->output_offset
+ curr
->size
;
5486 while (next
!= NULL
)
5488 end_of_next
= next
->output_offset
+ next
->size
;
5489 if (end_of_next
- stub_group_start
>= stub_group_size
)
5490 /* End of NEXT is too far from stubs, so stop. */
5492 /* Add NEXT to the stub group. */
5494 next
= NEXT_SEC (head
);
5495 htab
->stub_group
[head
->id
].link_sec
= curr
;
5501 while (list
++ != htab
->input_list
+ htab
->top_index
);
5503 free (htab
->input_list
);
5508 /* Comparison function for sorting/searching relocations relating to Cortex-A8
5512 a8_reloc_compare (const void *a
, const void *b
)
5514 const struct a8_erratum_reloc
*ra
= (const struct a8_erratum_reloc
*) a
;
5515 const struct a8_erratum_reloc
*rb
= (const struct a8_erratum_reloc
*) b
;
5517 if (ra
->from
< rb
->from
)
5519 else if (ra
->from
> rb
->from
)
5525 static struct elf_link_hash_entry
*find_thumb_glue (struct bfd_link_info
*,
5526 const char *, char **);
5528 /* Helper function to scan code for sequences which might trigger the Cortex-A8
5529 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
5530 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
5534 cortex_a8_erratum_scan (bfd
*input_bfd
,
5535 struct bfd_link_info
*info
,
5536 struct a8_erratum_fix
**a8_fixes_p
,
5537 unsigned int *num_a8_fixes_p
,
5538 unsigned int *a8_fix_table_size_p
,
5539 struct a8_erratum_reloc
*a8_relocs
,
5540 unsigned int num_a8_relocs
,
5541 unsigned prev_num_a8_fixes
,
5542 bfd_boolean
*stub_changed_p
)
5545 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
5546 struct a8_erratum_fix
*a8_fixes
= *a8_fixes_p
;
5547 unsigned int num_a8_fixes
= *num_a8_fixes_p
;
5548 unsigned int a8_fix_table_size
= *a8_fix_table_size_p
;
5553 for (section
= input_bfd
->sections
;
5555 section
= section
->next
)
5557 bfd_byte
*contents
= NULL
;
5558 struct _arm_elf_section_data
*sec_data
;
5562 if (elf_section_type (section
) != SHT_PROGBITS
5563 || (elf_section_flags (section
) & SHF_EXECINSTR
) == 0
5564 || (section
->flags
& SEC_EXCLUDE
) != 0
5565 || (section
->sec_info_type
== SEC_INFO_TYPE_JUST_SYMS
)
5566 || (section
->output_section
== bfd_abs_section_ptr
))
5569 base_vma
= section
->output_section
->vma
+ section
->output_offset
;
5571 if (elf_section_data (section
)->this_hdr
.contents
!= NULL
)
5572 contents
= elf_section_data (section
)->this_hdr
.contents
;
5573 else if (! bfd_malloc_and_get_section (input_bfd
, section
, &contents
))
5576 sec_data
= elf32_arm_section_data (section
);
5578 for (span
= 0; span
< sec_data
->mapcount
; span
++)
5580 unsigned int span_start
= sec_data
->map
[span
].vma
;
5581 unsigned int span_end
= (span
== sec_data
->mapcount
- 1)
5582 ? section
->size
: sec_data
->map
[span
+ 1].vma
;
5584 char span_type
= sec_data
->map
[span
].type
;
5585 bfd_boolean last_was_32bit
= FALSE
, last_was_branch
= FALSE
;
5587 if (span_type
!= 't')
5590 /* Span is entirely within a single 4KB region: skip scanning. */
5591 if (((base_vma
+ span_start
) & ~0xfff)
5592 == ((base_vma
+ span_end
) & ~0xfff))
5595 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
5597 * The opcode is BLX.W, BL.W, B.W, Bcc.W
5598 * The branch target is in the same 4KB region as the
5599 first half of the branch.
5600 * The instruction before the branch is a 32-bit
5601 length non-branch instruction. */
5602 for (i
= span_start
; i
< span_end
;)
5604 unsigned int insn
= bfd_getl16 (&contents
[i
]);
5605 bfd_boolean insn_32bit
= FALSE
, is_blx
= FALSE
, is_b
= FALSE
;
5606 bfd_boolean is_bl
= FALSE
, is_bcc
= FALSE
, is_32bit_branch
;
5608 if ((insn
& 0xe000) == 0xe000 && (insn
& 0x1800) != 0x0000)
5613 /* Load the rest of the insn (in manual-friendly order). */
5614 insn
= (insn
<< 16) | bfd_getl16 (&contents
[i
+ 2]);
5616 /* Encoding T4: B<c>.W. */
5617 is_b
= (insn
& 0xf800d000) == 0xf0009000;
5618 /* Encoding T1: BL<c>.W. */
5619 is_bl
= (insn
& 0xf800d000) == 0xf000d000;
5620 /* Encoding T2: BLX<c>.W. */
5621 is_blx
= (insn
& 0xf800d000) == 0xf000c000;
5622 /* Encoding T3: B<c>.W (not permitted in IT block). */
5623 is_bcc
= (insn
& 0xf800d000) == 0xf0008000
5624 && (insn
& 0x07f00000) != 0x03800000;
5627 is_32bit_branch
= is_b
|| is_bl
|| is_blx
|| is_bcc
;
5629 if (((base_vma
+ i
) & 0xfff) == 0xffe
5633 && ! last_was_branch
)
5635 bfd_signed_vma offset
= 0;
5636 bfd_boolean force_target_arm
= FALSE
;
5637 bfd_boolean force_target_thumb
= FALSE
;
5639 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
5640 struct a8_erratum_reloc key
, *found
;
5641 bfd_boolean use_plt
= FALSE
;
5643 key
.from
= base_vma
+ i
;
5644 found
= (struct a8_erratum_reloc
*)
5645 bsearch (&key
, a8_relocs
, num_a8_relocs
,
5646 sizeof (struct a8_erratum_reloc
),
5651 char *error_message
= NULL
;
5652 struct elf_link_hash_entry
*entry
;
5654 /* We don't care about the error returned from this
5655 function, only if there is glue or not. */
5656 entry
= find_thumb_glue (info
, found
->sym_name
,
5660 found
->non_a8_stub
= TRUE
;
5662 /* Keep a simpler condition, for the sake of clarity. */
5663 if (htab
->root
.splt
!= NULL
&& found
->hash
!= NULL
5664 && found
->hash
->root
.plt
.offset
!= (bfd_vma
) -1)
5667 if (found
->r_type
== R_ARM_THM_CALL
)
5669 if (found
->branch_type
== ST_BRANCH_TO_ARM
5671 force_target_arm
= TRUE
;
5673 force_target_thumb
= TRUE
;
5677 /* Check if we have an offending branch instruction. */
5679 if (found
&& found
->non_a8_stub
)
5680 /* We've already made a stub for this instruction, e.g.
5681 it's a long branch or a Thumb->ARM stub. Assume that
5682 stub will suffice to work around the A8 erratum (see
5683 setting of always_after_branch above). */
5687 offset
= (insn
& 0x7ff) << 1;
5688 offset
|= (insn
& 0x3f0000) >> 4;
5689 offset
|= (insn
& 0x2000) ? 0x40000 : 0;
5690 offset
|= (insn
& 0x800) ? 0x80000 : 0;
5691 offset
|= (insn
& 0x4000000) ? 0x100000 : 0;
5692 if (offset
& 0x100000)
5693 offset
|= ~ ((bfd_signed_vma
) 0xfffff);
5694 stub_type
= arm_stub_a8_veneer_b_cond
;
5696 else if (is_b
|| is_bl
|| is_blx
)
5698 int s
= (insn
& 0x4000000) != 0;
5699 int j1
= (insn
& 0x2000) != 0;
5700 int j2
= (insn
& 0x800) != 0;
5704 offset
= (insn
& 0x7ff) << 1;
5705 offset
|= (insn
& 0x3ff0000) >> 4;
5709 if (offset
& 0x1000000)
5710 offset
|= ~ ((bfd_signed_vma
) 0xffffff);
5713 offset
&= ~ ((bfd_signed_vma
) 3);
5715 stub_type
= is_blx
? arm_stub_a8_veneer_blx
:
5716 is_bl
? arm_stub_a8_veneer_bl
: arm_stub_a8_veneer_b
;
5719 if (stub_type
!= arm_stub_none
)
5721 bfd_vma pc_for_insn
= base_vma
+ i
+ 4;
5723 /* The original instruction is a BL, but the target is
5724 an ARM instruction. If we were not making a stub,
5725 the BL would have been converted to a BLX. Use the
5726 BLX stub instead in that case. */
5727 if (htab
->use_blx
&& force_target_arm
5728 && stub_type
== arm_stub_a8_veneer_bl
)
5730 stub_type
= arm_stub_a8_veneer_blx
;
5734 /* Conversely, if the original instruction was
5735 BLX but the target is Thumb mode, use the BL
5737 else if (force_target_thumb
5738 && stub_type
== arm_stub_a8_veneer_blx
)
5740 stub_type
= arm_stub_a8_veneer_bl
;
5746 pc_for_insn
&= ~ ((bfd_vma
) 3);
5748 /* If we found a relocation, use the proper destination,
5749 not the offset in the (unrelocated) instruction.
5750 Note this is always done if we switched the stub type
5754 (bfd_signed_vma
) (found
->destination
- pc_for_insn
);
5756 /* If the stub will use a Thumb-mode branch to a
5757 PLT target, redirect it to the preceding Thumb
5759 if (stub_type
!= arm_stub_a8_veneer_blx
&& use_plt
)
5760 offset
-= PLT_THUMB_STUB_SIZE
;
5762 target
= pc_for_insn
+ offset
;
5764 /* The BLX stub is ARM-mode code. Adjust the offset to
5765 take the different PC value (+8 instead of +4) into
5767 if (stub_type
== arm_stub_a8_veneer_blx
)
5770 if (((base_vma
+ i
) & ~0xfff) == (target
& ~0xfff))
5772 char *stub_name
= NULL
;
5774 if (num_a8_fixes
== a8_fix_table_size
)
5776 a8_fix_table_size
*= 2;
5777 a8_fixes
= (struct a8_erratum_fix
*)
5778 bfd_realloc (a8_fixes
,
5779 sizeof (struct a8_erratum_fix
)
5780 * a8_fix_table_size
);
5783 if (num_a8_fixes
< prev_num_a8_fixes
)
5785 /* If we're doing a subsequent scan,
5786 check if we've found the same fix as
5787 before, and try and reuse the stub
5789 stub_name
= a8_fixes
[num_a8_fixes
].stub_name
;
5790 if ((a8_fixes
[num_a8_fixes
].section
!= section
)
5791 || (a8_fixes
[num_a8_fixes
].offset
!= i
))
5795 *stub_changed_p
= TRUE
;
5801 stub_name
= (char *) bfd_malloc (8 + 1 + 8 + 1);
5802 if (stub_name
!= NULL
)
5803 sprintf (stub_name
, "%x:%x", section
->id
, i
);
5806 a8_fixes
[num_a8_fixes
].input_bfd
= input_bfd
;
5807 a8_fixes
[num_a8_fixes
].section
= section
;
5808 a8_fixes
[num_a8_fixes
].offset
= i
;
5809 a8_fixes
[num_a8_fixes
].target_offset
=
5811 a8_fixes
[num_a8_fixes
].orig_insn
= insn
;
5812 a8_fixes
[num_a8_fixes
].stub_name
= stub_name
;
5813 a8_fixes
[num_a8_fixes
].stub_type
= stub_type
;
5814 a8_fixes
[num_a8_fixes
].branch_type
=
5815 is_blx
? ST_BRANCH_TO_ARM
: ST_BRANCH_TO_THUMB
;
5822 i
+= insn_32bit
? 4 : 2;
5823 last_was_32bit
= insn_32bit
;
5824 last_was_branch
= is_32bit_branch
;
5828 if (elf_section_data (section
)->this_hdr
.contents
== NULL
)
5832 *a8_fixes_p
= a8_fixes
;
5833 *num_a8_fixes_p
= num_a8_fixes
;
5834 *a8_fix_table_size_p
= a8_fix_table_size
;
5839 /* Create or update a stub entry depending on whether the stub can already be
5840 found in HTAB. The stub is identified by:
5841 - its type STUB_TYPE
5842 - its source branch (note that several can share the same stub) whose
5843 section and relocation (if any) are given by SECTION and IRELA
5845 - its target symbol whose input section, hash, name, value and branch type
5846 are given in SYM_SEC, HASH, SYM_NAME, SYM_VALUE and BRANCH_TYPE
5849 If found, the value of the stub's target symbol is updated from SYM_VALUE
5850 and *NEW_STUB is set to FALSE. Otherwise, *NEW_STUB is set to
5851 TRUE and the stub entry is initialized.
5853 Returns the stub that was created or updated, or NULL if an error
5856 static struct elf32_arm_stub_hash_entry
*
5857 elf32_arm_create_stub (struct elf32_arm_link_hash_table
*htab
,
5858 enum elf32_arm_stub_type stub_type
, asection
*section
,
5859 Elf_Internal_Rela
*irela
, asection
*sym_sec
,
5860 struct elf32_arm_link_hash_entry
*hash
, char *sym_name
,
5861 bfd_vma sym_value
, enum arm_st_branch_type branch_type
,
5862 bfd_boolean
*new_stub
)
5864 const asection
*id_sec
;
5866 struct elf32_arm_stub_hash_entry
*stub_entry
;
5867 unsigned int r_type
;
5868 bfd_boolean sym_claimed
= arm_stub_sym_claimed (stub_type
);
5870 BFD_ASSERT (stub_type
!= arm_stub_none
);
5874 stub_name
= sym_name
;
5878 BFD_ASSERT (section
);
5879 BFD_ASSERT (section
->id
<= htab
->top_id
);
5881 /* Support for grouping stub sections. */
5882 id_sec
= htab
->stub_group
[section
->id
].link_sec
;
5884 /* Get the name of this stub. */
5885 stub_name
= elf32_arm_stub_name (id_sec
, sym_sec
, hash
, irela
,
5891 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
, stub_name
, FALSE
,
5893 /* The proper stub has already been created, just update its value. */
5894 if (stub_entry
!= NULL
)
5898 stub_entry
->target_value
= sym_value
;
5902 stub_entry
= elf32_arm_add_stub (stub_name
, section
, htab
, stub_type
);
5903 if (stub_entry
== NULL
)
5910 stub_entry
->target_value
= sym_value
;
5911 stub_entry
->target_section
= sym_sec
;
5912 stub_entry
->stub_type
= stub_type
;
5913 stub_entry
->h
= hash
;
5914 stub_entry
->branch_type
= branch_type
;
5917 stub_entry
->output_name
= sym_name
;
5920 if (sym_name
== NULL
)
5921 sym_name
= "unnamed";
5922 stub_entry
->output_name
= (char *)
5923 bfd_alloc (htab
->stub_bfd
, sizeof (THUMB2ARM_GLUE_ENTRY_NAME
)
5924 + strlen (sym_name
));
5925 if (stub_entry
->output_name
== NULL
)
5931 /* For historical reasons, use the existing names for ARM-to-Thumb and
5932 Thumb-to-ARM stubs. */
5933 r_type
= ELF32_R_TYPE (irela
->r_info
);
5934 if ((r_type
== (unsigned int) R_ARM_THM_CALL
5935 || r_type
== (unsigned int) R_ARM_THM_JUMP24
5936 || r_type
== (unsigned int) R_ARM_THM_JUMP19
)
5937 && branch_type
== ST_BRANCH_TO_ARM
)
5938 sprintf (stub_entry
->output_name
, THUMB2ARM_GLUE_ENTRY_NAME
, sym_name
);
5939 else if ((r_type
== (unsigned int) R_ARM_CALL
5940 || r_type
== (unsigned int) R_ARM_JUMP24
)
5941 && branch_type
== ST_BRANCH_TO_THUMB
)
5942 sprintf (stub_entry
->output_name
, ARM2THUMB_GLUE_ENTRY_NAME
, sym_name
);
5944 sprintf (stub_entry
->output_name
, STUB_ENTRY_NAME
, sym_name
);
5951 /* Scan symbols in INPUT_BFD to identify secure entry functions needing a
5952 gateway veneer to transition from non secure to secure state and create them
5955 "ARMv8-M Security Extensions: Requirements on Development Tools" document
5956 defines the conditions that govern Secure Gateway veneer creation for a
5957 given symbol <SYM> as follows:
5958 - it has function type
5959 - it has non local binding
5960 - a symbol named __acle_se_<SYM> (called special symbol) exists with the
5961 same type, binding and value as <SYM> (called normal symbol).
5962 An entry function can handle secure state transition itself in which case
5963 its special symbol would have a different value from the normal symbol.
5965 OUT_ATTR gives the output attributes, SYM_HASHES the symbol index to hash
5966 entry mapping while HTAB gives the name to hash entry mapping.
5967 *CMSE_STUB_CREATED is increased by the number of secure gateway veneer
5970 The return value gives whether a stub failed to be allocated. */
5973 cmse_scan (bfd
*input_bfd
, struct elf32_arm_link_hash_table
*htab
,
5974 obj_attribute
*out_attr
, struct elf_link_hash_entry
**sym_hashes
,
5975 int *cmse_stub_created
)
5977 const struct elf_backend_data
*bed
;
5978 Elf_Internal_Shdr
*symtab_hdr
;
5979 unsigned i
, j
, sym_count
, ext_start
;
5980 Elf_Internal_Sym
*cmse_sym
, *local_syms
;
5981 struct elf32_arm_link_hash_entry
*hash
, *cmse_hash
= NULL
;
5982 enum arm_st_branch_type branch_type
;
5983 char *sym_name
, *lsym_name
;
5986 struct elf32_arm_stub_hash_entry
*stub_entry
;
5987 bfd_boolean is_v8m
, new_stub
, cmse_invalid
, ret
= TRUE
;
5989 bed
= get_elf_backend_data (input_bfd
);
5990 symtab_hdr
= &elf_tdata (input_bfd
)->symtab_hdr
;
5991 sym_count
= symtab_hdr
->sh_size
/ bed
->s
->sizeof_sym
;
5992 ext_start
= symtab_hdr
->sh_info
;
5993 is_v8m
= (out_attr
[Tag_CPU_arch
].i
>= TAG_CPU_ARCH_V8M_BASE
5994 && out_attr
[Tag_CPU_arch_profile
].i
== 'M');
5996 local_syms
= (Elf_Internal_Sym
*) symtab_hdr
->contents
;
5997 if (local_syms
== NULL
)
5998 local_syms
= bfd_elf_get_elf_syms (input_bfd
, symtab_hdr
,
5999 symtab_hdr
->sh_info
, 0, NULL
, NULL
,
6001 if (symtab_hdr
->sh_info
&& local_syms
== NULL
)
6005 for (i
= 0; i
< sym_count
; i
++)
6007 cmse_invalid
= FALSE
;
6011 cmse_sym
= &local_syms
[i
];
6012 sym_name
= bfd_elf_string_from_elf_section (input_bfd
,
6013 symtab_hdr
->sh_link
,
6015 if (!sym_name
|| !CONST_STRNEQ (sym_name
, CMSE_PREFIX
))
6018 /* Special symbol with local binding. */
6019 cmse_invalid
= TRUE
;
6023 cmse_hash
= elf32_arm_hash_entry (sym_hashes
[i
- ext_start
]);
6024 sym_name
= (char *) cmse_hash
->root
.root
.root
.string
;
6025 if (!CONST_STRNEQ (sym_name
, CMSE_PREFIX
))
6028 /* Special symbol has incorrect binding or type. */
6029 if ((cmse_hash
->root
.root
.type
!= bfd_link_hash_defined
6030 && cmse_hash
->root
.root
.type
!= bfd_link_hash_defweak
)
6031 || cmse_hash
->root
.type
!= STT_FUNC
)
6032 cmse_invalid
= TRUE
;
6037 _bfd_error_handler (_("%pB: special symbol `%s' only allowed for "
6038 "ARMv8-M architecture or later"),
6039 input_bfd
, sym_name
);
6040 is_v8m
= TRUE
; /* Avoid multiple warning. */
6046 _bfd_error_handler (_("%pB: invalid special symbol `%s'; it must be"
6047 " a global or weak function symbol"),
6048 input_bfd
, sym_name
);
6054 sym_name
+= strlen (CMSE_PREFIX
);
6055 hash
= (struct elf32_arm_link_hash_entry
*)
6056 elf_link_hash_lookup (&(htab
)->root
, sym_name
, FALSE
, FALSE
, TRUE
);
6058 /* No associated normal symbol or it is neither global nor weak. */
6060 || (hash
->root
.root
.type
!= bfd_link_hash_defined
6061 && hash
->root
.root
.type
!= bfd_link_hash_defweak
)
6062 || hash
->root
.type
!= STT_FUNC
)
6064 /* Initialize here to avoid warning about use of possibly
6065 uninitialized variable. */
6070 /* Searching for a normal symbol with local binding. */
6071 for (; j
< ext_start
; j
++)
6074 bfd_elf_string_from_elf_section (input_bfd
,
6075 symtab_hdr
->sh_link
,
6076 local_syms
[j
].st_name
);
6077 if (!strcmp (sym_name
, lsym_name
))
6082 if (hash
|| j
< ext_start
)
6085 (_("%pB: invalid standard symbol `%s'; it must be "
6086 "a global or weak function symbol"),
6087 input_bfd
, sym_name
);
6091 (_("%pB: absent standard symbol `%s'"), input_bfd
, sym_name
);
6097 sym_value
= hash
->root
.root
.u
.def
.value
;
6098 section
= hash
->root
.root
.u
.def
.section
;
6100 if (cmse_hash
->root
.root
.u
.def
.section
!= section
)
6103 (_("%pB: `%s' and its special symbol are in different sections"),
6104 input_bfd
, sym_name
);
6107 if (cmse_hash
->root
.root
.u
.def
.value
!= sym_value
)
6108 continue; /* Ignore: could be an entry function starting with SG. */
6110 /* If this section is a link-once section that will be discarded, then
6111 don't create any stubs. */
6112 if (section
->output_section
== NULL
)
6115 (_("%pB: entry function `%s' not output"), input_bfd
, sym_name
);
6119 if (hash
->root
.size
== 0)
6122 (_("%pB: entry function `%s' is empty"), input_bfd
, sym_name
);
6128 branch_type
= ARM_GET_SYM_BRANCH_TYPE (hash
->root
.target_internal
);
6130 = elf32_arm_create_stub (htab
, arm_stub_cmse_branch_thumb_only
,
6131 NULL
, NULL
, section
, hash
, sym_name
,
6132 sym_value
, branch_type
, &new_stub
);
6134 if (stub_entry
== NULL
)
6138 BFD_ASSERT (new_stub
);
6139 (*cmse_stub_created
)++;
6143 if (!symtab_hdr
->contents
)
6148 /* Return TRUE iff a symbol identified by its linker HASH entry is a secure
6149 code entry function, ie can be called from non secure code without using a
6153 cmse_entry_fct_p (struct elf32_arm_link_hash_entry
*hash
)
6155 bfd_byte contents
[4];
6156 uint32_t first_insn
;
6161 /* Defined symbol of function type. */
6162 if (hash
->root
.root
.type
!= bfd_link_hash_defined
6163 && hash
->root
.root
.type
!= bfd_link_hash_defweak
)
6165 if (hash
->root
.type
!= STT_FUNC
)
6168 /* Read first instruction. */
6169 section
= hash
->root
.root
.u
.def
.section
;
6170 abfd
= section
->owner
;
6171 offset
= hash
->root
.root
.u
.def
.value
- section
->vma
;
6172 if (!bfd_get_section_contents (abfd
, section
, contents
, offset
,
6176 first_insn
= bfd_get_32 (abfd
, contents
);
6178 /* Starts by SG instruction. */
6179 return first_insn
== 0xe97fe97f;
6182 /* Output the name (in symbol table) of the veneer GEN_ENTRY if it is a new
6183 secure gateway veneers (ie. the veneers was not in the input import library)
6184 and there is no output import library (GEN_INFO->out_implib_bfd is NULL. */
6187 arm_list_new_cmse_stub (struct bfd_hash_entry
*gen_entry
, void *gen_info
)
6189 struct elf32_arm_stub_hash_entry
*stub_entry
;
6190 struct bfd_link_info
*info
;
6192 /* Massage our args to the form they really have. */
6193 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
6194 info
= (struct bfd_link_info
*) gen_info
;
6196 if (info
->out_implib_bfd
)
6199 if (stub_entry
->stub_type
!= arm_stub_cmse_branch_thumb_only
)
6202 if (stub_entry
->stub_offset
== (bfd_vma
) -1)
6203 _bfd_error_handler (" %s", stub_entry
->output_name
);
6208 /* Set offset of each secure gateway veneers so that its address remain
6209 identical to the one in the input import library referred by
6210 HTAB->in_implib_bfd. A warning is issued for veneers that disappeared
6211 (present in input import library but absent from the executable being
6212 linked) or if new veneers appeared and there is no output import library
6213 (INFO->out_implib_bfd is NULL and *CMSE_STUB_CREATED is bigger than the
6214 number of secure gateway veneers found in the input import library.
6216 The function returns whether an error occurred. If no error occurred,
6217 *CMSE_STUB_CREATED gives the number of SG veneers created by both cmse_scan
6218 and this function and HTAB->new_cmse_stub_offset is set to the biggest
6219 veneer observed set for new veneers to be layed out after. */
6222 set_cmse_veneer_addr_from_implib (struct bfd_link_info
*info
,
6223 struct elf32_arm_link_hash_table
*htab
,
6224 int *cmse_stub_created
)
6231 asection
*stub_out_sec
;
6232 bfd_boolean ret
= TRUE
;
6233 Elf_Internal_Sym
*intsym
;
6234 const char *out_sec_name
;
6235 bfd_size_type cmse_stub_size
;
6236 asymbol
**sympp
= NULL
, *sym
;
6237 struct elf32_arm_link_hash_entry
*hash
;
6238 const insn_sequence
*cmse_stub_template
;
6239 struct elf32_arm_stub_hash_entry
*stub_entry
;
6240 int cmse_stub_template_size
, new_cmse_stubs_created
= *cmse_stub_created
;
6241 bfd_vma veneer_value
, stub_offset
, next_cmse_stub_offset
;
6242 bfd_vma cmse_stub_array_start
= (bfd_vma
) -1, cmse_stub_sec_vma
= 0;
6244 /* No input secure gateway import library. */
6245 if (!htab
->in_implib_bfd
)
6248 in_implib_bfd
= htab
->in_implib_bfd
;
6249 if (!htab
->cmse_implib
)
6251 _bfd_error_handler (_("%pB: --in-implib only supported for Secure "
6252 "Gateway import libraries"), in_implib_bfd
);
6256 /* Get symbol table size. */
6257 symsize
= bfd_get_symtab_upper_bound (in_implib_bfd
);
6261 /* Read in the input secure gateway import library's symbol table. */
6262 sympp
= (asymbol
**) bfd_malloc (symsize
);
6266 symcount
= bfd_canonicalize_symtab (in_implib_bfd
, sympp
);
6273 htab
->new_cmse_stub_offset
= 0;
6275 find_stub_size_and_template (arm_stub_cmse_branch_thumb_only
,
6276 &cmse_stub_template
,
6277 &cmse_stub_template_size
);
6279 arm_dedicated_stub_output_section_name (arm_stub_cmse_branch_thumb_only
);
6281 bfd_get_section_by_name (htab
->obfd
, out_sec_name
);
6282 if (stub_out_sec
!= NULL
)
6283 cmse_stub_sec_vma
= stub_out_sec
->vma
;
6285 /* Set addresses of veneers mentionned in input secure gateway import
6286 library's symbol table. */
6287 for (i
= 0; i
< symcount
; i
++)
6291 sym_name
= (char *) bfd_asymbol_name (sym
);
6292 intsym
= &((elf_symbol_type
*) sym
)->internal_elf_sym
;
6294 if (sym
->section
!= bfd_abs_section_ptr
6295 || !(flags
& (BSF_GLOBAL
| BSF_WEAK
))
6296 || (flags
& BSF_FUNCTION
) != BSF_FUNCTION
6297 || (ARM_GET_SYM_BRANCH_TYPE (intsym
->st_target_internal
)
6298 != ST_BRANCH_TO_THUMB
))
6300 _bfd_error_handler (_("%pB: invalid import library entry: `%s'; "
6301 "symbol should be absolute, global and "
6302 "refer to Thumb functions"),
6303 in_implib_bfd
, sym_name
);
6308 veneer_value
= bfd_asymbol_value (sym
);
6309 stub_offset
= veneer_value
- cmse_stub_sec_vma
;
6310 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
, sym_name
,
6312 hash
= (struct elf32_arm_link_hash_entry
*)
6313 elf_link_hash_lookup (&(htab
)->root
, sym_name
, FALSE
, FALSE
, TRUE
);
6315 /* Stub entry should have been created by cmse_scan or the symbol be of
6316 a secure function callable from non secure code. */
6317 if (!stub_entry
&& !hash
)
6319 bfd_boolean new_stub
;
6322 (_("entry function `%s' disappeared from secure code"), sym_name
);
6323 hash
= (struct elf32_arm_link_hash_entry
*)
6324 elf_link_hash_lookup (&(htab
)->root
, sym_name
, TRUE
, TRUE
, TRUE
);
6326 = elf32_arm_create_stub (htab
, arm_stub_cmse_branch_thumb_only
,
6327 NULL
, NULL
, bfd_abs_section_ptr
, hash
,
6328 sym_name
, veneer_value
,
6329 ST_BRANCH_TO_THUMB
, &new_stub
);
6330 if (stub_entry
== NULL
)
6334 BFD_ASSERT (new_stub
);
6335 new_cmse_stubs_created
++;
6336 (*cmse_stub_created
)++;
6338 stub_entry
->stub_template_size
= stub_entry
->stub_size
= 0;
6339 stub_entry
->stub_offset
= stub_offset
;
6341 /* Symbol found is not callable from non secure code. */
6342 else if (!stub_entry
)
6344 if (!cmse_entry_fct_p (hash
))
6346 _bfd_error_handler (_("`%s' refers to a non entry function"),
6354 /* Only stubs for SG veneers should have been created. */
6355 BFD_ASSERT (stub_entry
->stub_type
== arm_stub_cmse_branch_thumb_only
);
6357 /* Check visibility hasn't changed. */
6358 if (!!(flags
& BSF_GLOBAL
)
6359 != (hash
->root
.root
.type
== bfd_link_hash_defined
))
6361 (_("%pB: visibility of symbol `%s' has changed"), in_implib_bfd
,
6364 stub_entry
->stub_offset
= stub_offset
;
6367 /* Size should match that of a SG veneer. */
6368 if (intsym
->st_size
!= cmse_stub_size
)
6370 _bfd_error_handler (_("%pB: incorrect size for symbol `%s'"),
6371 in_implib_bfd
, sym_name
);
6375 /* Previous veneer address is before current SG veneer section. */
6376 if (veneer_value
< cmse_stub_sec_vma
)
6378 /* Avoid offset underflow. */
6380 stub_entry
->stub_offset
= 0;
6385 /* Complain if stub offset not a multiple of stub size. */
6386 if (stub_offset
% cmse_stub_size
)
6389 (_("offset of veneer for entry function `%s' not a multiple of "
6390 "its size"), sym_name
);
6397 new_cmse_stubs_created
--;
6398 if (veneer_value
< cmse_stub_array_start
)
6399 cmse_stub_array_start
= veneer_value
;
6400 next_cmse_stub_offset
= stub_offset
+ ((cmse_stub_size
+ 7) & ~7);
6401 if (next_cmse_stub_offset
> htab
->new_cmse_stub_offset
)
6402 htab
->new_cmse_stub_offset
= next_cmse_stub_offset
;
6405 if (!info
->out_implib_bfd
&& new_cmse_stubs_created
!= 0)
6407 BFD_ASSERT (new_cmse_stubs_created
> 0);
6409 (_("new entry function(s) introduced but no output import library "
6411 bfd_hash_traverse (&htab
->stub_hash_table
, arm_list_new_cmse_stub
, info
);
6414 if (cmse_stub_array_start
!= cmse_stub_sec_vma
)
6417 (_("start address of `%s' is different from previous link"),
6427 /* Determine and set the size of the stub section for a final link.
6429 The basic idea here is to examine all the relocations looking for
6430 PC-relative calls to a target that is unreachable with a "bl"
6434 elf32_arm_size_stubs (bfd
*output_bfd
,
6436 struct bfd_link_info
*info
,
6437 bfd_signed_vma group_size
,
6438 asection
* (*add_stub_section
) (const char *, asection
*,
6441 void (*layout_sections_again
) (void))
6443 bfd_boolean ret
= TRUE
;
6444 obj_attribute
*out_attr
;
6445 int cmse_stub_created
= 0;
6446 bfd_size_type stub_group_size
;
6447 bfd_boolean m_profile
, stubs_always_after_branch
, first_veneer_scan
= TRUE
;
6448 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
6449 struct a8_erratum_fix
*a8_fixes
= NULL
;
6450 unsigned int num_a8_fixes
= 0, a8_fix_table_size
= 10;
6451 struct a8_erratum_reloc
*a8_relocs
= NULL
;
6452 unsigned int num_a8_relocs
= 0, a8_reloc_table_size
= 10, i
;
6457 if (htab
->fix_cortex_a8
)
6459 a8_fixes
= (struct a8_erratum_fix
*)
6460 bfd_zmalloc (sizeof (struct a8_erratum_fix
) * a8_fix_table_size
);
6461 a8_relocs
= (struct a8_erratum_reloc
*)
6462 bfd_zmalloc (sizeof (struct a8_erratum_reloc
) * a8_reloc_table_size
);
6465 /* Propagate mach to stub bfd, because it may not have been
6466 finalized when we created stub_bfd. */
6467 bfd_set_arch_mach (stub_bfd
, bfd_get_arch (output_bfd
),
6468 bfd_get_mach (output_bfd
));
6470 /* Stash our params away. */
6471 htab
->stub_bfd
= stub_bfd
;
6472 htab
->add_stub_section
= add_stub_section
;
6473 htab
->layout_sections_again
= layout_sections_again
;
6474 stubs_always_after_branch
= group_size
< 0;
6476 out_attr
= elf_known_obj_attributes_proc (output_bfd
);
6477 m_profile
= out_attr
[Tag_CPU_arch_profile
].i
== 'M';
6479 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
6480 as the first half of a 32-bit branch straddling two 4K pages. This is a
6481 crude way of enforcing that. */
6482 if (htab
->fix_cortex_a8
)
6483 stubs_always_after_branch
= 1;
6486 stub_group_size
= -group_size
;
6488 stub_group_size
= group_size
;
6490 if (stub_group_size
== 1)
6492 /* Default values. */
6493 /* Thumb branch range is +-4MB has to be used as the default
6494 maximum size (a given section can contain both ARM and Thumb
6495 code, so the worst case has to be taken into account).
6497 This value is 24K less than that, which allows for 2025
6498 12-byte stubs. If we exceed that, then we will fail to link.
6499 The user will have to relink with an explicit group size
6501 stub_group_size
= 4170000;
6504 group_sections (htab
, stub_group_size
, stubs_always_after_branch
);
6506 /* If we're applying the cortex A8 fix, we need to determine the
6507 program header size now, because we cannot change it later --
6508 that could alter section placements. Notice the A8 erratum fix
6509 ends up requiring the section addresses to remain unchanged
6510 modulo the page size. That's something we cannot represent
6511 inside BFD, and we don't want to force the section alignment to
6512 be the page size. */
6513 if (htab
->fix_cortex_a8
)
6514 (*htab
->layout_sections_again
) ();
6519 unsigned int bfd_indx
;
6521 enum elf32_arm_stub_type stub_type
;
6522 bfd_boolean stub_changed
= FALSE
;
6523 unsigned prev_num_a8_fixes
= num_a8_fixes
;
6526 for (input_bfd
= info
->input_bfds
, bfd_indx
= 0;
6528 input_bfd
= input_bfd
->link
.next
, bfd_indx
++)
6530 Elf_Internal_Shdr
*symtab_hdr
;
6532 Elf_Internal_Sym
*local_syms
= NULL
;
6534 if (!is_arm_elf (input_bfd
))
6536 if ((input_bfd
->flags
& DYNAMIC
) != 0
6537 && (elf_sym_hashes (input_bfd
) == NULL
6538 || (elf_dyn_lib_class (input_bfd
) & DYN_AS_NEEDED
) != 0))
6543 /* We'll need the symbol table in a second. */
6544 symtab_hdr
= &elf_tdata (input_bfd
)->symtab_hdr
;
6545 if (symtab_hdr
->sh_info
== 0)
6548 /* Limit scan of symbols to object file whose profile is
6549 Microcontroller to not hinder performance in the general case. */
6550 if (m_profile
&& first_veneer_scan
)
6552 struct elf_link_hash_entry
**sym_hashes
;
6554 sym_hashes
= elf_sym_hashes (input_bfd
);
6555 if (!cmse_scan (input_bfd
, htab
, out_attr
, sym_hashes
,
6556 &cmse_stub_created
))
6557 goto error_ret_free_local
;
6559 if (cmse_stub_created
!= 0)
6560 stub_changed
= TRUE
;
6563 /* Walk over each section attached to the input bfd. */
6564 for (section
= input_bfd
->sections
;
6566 section
= section
->next
)
6568 Elf_Internal_Rela
*internal_relocs
, *irelaend
, *irela
;
6570 /* If there aren't any relocs, then there's nothing more
6572 if ((section
->flags
& SEC_RELOC
) == 0
6573 || section
->reloc_count
== 0
6574 || (section
->flags
& SEC_CODE
) == 0)
6577 /* If this section is a link-once section that will be
6578 discarded, then don't create any stubs. */
6579 if (section
->output_section
== NULL
6580 || section
->output_section
->owner
!= output_bfd
)
6583 /* Get the relocs. */
6585 = _bfd_elf_link_read_relocs (input_bfd
, section
, NULL
,
6586 NULL
, info
->keep_memory
);
6587 if (internal_relocs
== NULL
)
6588 goto error_ret_free_local
;
6590 /* Now examine each relocation. */
6591 irela
= internal_relocs
;
6592 irelaend
= irela
+ section
->reloc_count
;
6593 for (; irela
< irelaend
; irela
++)
6595 unsigned int r_type
, r_indx
;
6598 bfd_vma destination
;
6599 struct elf32_arm_link_hash_entry
*hash
;
6600 const char *sym_name
;
6601 unsigned char st_type
;
6602 enum arm_st_branch_type branch_type
;
6603 bfd_boolean created_stub
= FALSE
;
6605 r_type
= ELF32_R_TYPE (irela
->r_info
);
6606 r_indx
= ELF32_R_SYM (irela
->r_info
);
6608 if (r_type
>= (unsigned int) R_ARM_max
)
6610 bfd_set_error (bfd_error_bad_value
);
6611 error_ret_free_internal
:
6612 if (elf_section_data (section
)->relocs
== NULL
)
6613 free (internal_relocs
);
6615 error_ret_free_local
:
6616 if (symtab_hdr
->contents
!= (unsigned char *) local_syms
)
6622 if (r_indx
>= symtab_hdr
->sh_info
)
6623 hash
= elf32_arm_hash_entry
6624 (elf_sym_hashes (input_bfd
)
6625 [r_indx
- symtab_hdr
->sh_info
]);
6627 /* Only look for stubs on branch instructions, or
6628 non-relaxed TLSCALL */
6629 if ((r_type
!= (unsigned int) R_ARM_CALL
)
6630 && (r_type
!= (unsigned int) R_ARM_THM_CALL
)
6631 && (r_type
!= (unsigned int) R_ARM_JUMP24
)
6632 && (r_type
!= (unsigned int) R_ARM_THM_JUMP19
)
6633 && (r_type
!= (unsigned int) R_ARM_THM_XPC22
)
6634 && (r_type
!= (unsigned int) R_ARM_THM_JUMP24
)
6635 && (r_type
!= (unsigned int) R_ARM_PLT32
)
6636 && !((r_type
== (unsigned int) R_ARM_TLS_CALL
6637 || r_type
== (unsigned int) R_ARM_THM_TLS_CALL
)
6638 && r_type
== elf32_arm_tls_transition
6639 (info
, r_type
, &hash
->root
)
6640 && ((hash
? hash
->tls_type
6641 : (elf32_arm_local_got_tls_type
6642 (input_bfd
)[r_indx
]))
6643 & GOT_TLS_GDESC
) != 0))
6646 /* Now determine the call target, its name, value,
6653 if (r_type
== (unsigned int) R_ARM_TLS_CALL
6654 || r_type
== (unsigned int) R_ARM_THM_TLS_CALL
)
6656 /* A non-relaxed TLS call. The target is the
6657 plt-resident trampoline and nothing to do
6659 BFD_ASSERT (htab
->tls_trampoline
> 0);
6660 sym_sec
= htab
->root
.splt
;
6661 sym_value
= htab
->tls_trampoline
;
6664 branch_type
= ST_BRANCH_TO_ARM
;
6668 /* It's a local symbol. */
6669 Elf_Internal_Sym
*sym
;
6671 if (local_syms
== NULL
)
6674 = (Elf_Internal_Sym
*) symtab_hdr
->contents
;
6675 if (local_syms
== NULL
)
6677 = bfd_elf_get_elf_syms (input_bfd
, symtab_hdr
,
6678 symtab_hdr
->sh_info
, 0,
6680 if (local_syms
== NULL
)
6681 goto error_ret_free_internal
;
6684 sym
= local_syms
+ r_indx
;
6685 if (sym
->st_shndx
== SHN_UNDEF
)
6686 sym_sec
= bfd_und_section_ptr
;
6687 else if (sym
->st_shndx
== SHN_ABS
)
6688 sym_sec
= bfd_abs_section_ptr
;
6689 else if (sym
->st_shndx
== SHN_COMMON
)
6690 sym_sec
= bfd_com_section_ptr
;
6693 bfd_section_from_elf_index (input_bfd
, sym
->st_shndx
);
6696 /* This is an undefined symbol. It can never
6700 if (ELF_ST_TYPE (sym
->st_info
) != STT_SECTION
)
6701 sym_value
= sym
->st_value
;
6702 destination
= (sym_value
+ irela
->r_addend
6703 + sym_sec
->output_offset
6704 + sym_sec
->output_section
->vma
);
6705 st_type
= ELF_ST_TYPE (sym
->st_info
);
6707 ARM_GET_SYM_BRANCH_TYPE (sym
->st_target_internal
);
6709 = bfd_elf_string_from_elf_section (input_bfd
,
6710 symtab_hdr
->sh_link
,
6715 /* It's an external symbol. */
6716 while (hash
->root
.root
.type
== bfd_link_hash_indirect
6717 || hash
->root
.root
.type
== bfd_link_hash_warning
)
6718 hash
= ((struct elf32_arm_link_hash_entry
*)
6719 hash
->root
.root
.u
.i
.link
);
6721 if (hash
->root
.root
.type
== bfd_link_hash_defined
6722 || hash
->root
.root
.type
== bfd_link_hash_defweak
)
6724 sym_sec
= hash
->root
.root
.u
.def
.section
;
6725 sym_value
= hash
->root
.root
.u
.def
.value
;
6727 struct elf32_arm_link_hash_table
*globals
=
6728 elf32_arm_hash_table (info
);
6730 /* For a destination in a shared library,
6731 use the PLT stub as target address to
6732 decide whether a branch stub is
6735 && globals
->root
.splt
!= NULL
6737 && hash
->root
.plt
.offset
!= (bfd_vma
) -1)
6739 sym_sec
= globals
->root
.splt
;
6740 sym_value
= hash
->root
.plt
.offset
;
6741 if (sym_sec
->output_section
!= NULL
)
6742 destination
= (sym_value
6743 + sym_sec
->output_offset
6744 + sym_sec
->output_section
->vma
);
6746 else if (sym_sec
->output_section
!= NULL
)
6747 destination
= (sym_value
+ irela
->r_addend
6748 + sym_sec
->output_offset
6749 + sym_sec
->output_section
->vma
);
6751 else if ((hash
->root
.root
.type
== bfd_link_hash_undefined
)
6752 || (hash
->root
.root
.type
== bfd_link_hash_undefweak
))
6754 /* For a shared library, use the PLT stub as
6755 target address to decide whether a long
6756 branch stub is needed.
6757 For absolute code, they cannot be handled. */
6758 struct elf32_arm_link_hash_table
*globals
=
6759 elf32_arm_hash_table (info
);
6762 && globals
->root
.splt
!= NULL
6764 && hash
->root
.plt
.offset
!= (bfd_vma
) -1)
6766 sym_sec
= globals
->root
.splt
;
6767 sym_value
= hash
->root
.plt
.offset
;
6768 if (sym_sec
->output_section
!= NULL
)
6769 destination
= (sym_value
6770 + sym_sec
->output_offset
6771 + sym_sec
->output_section
->vma
);
6778 bfd_set_error (bfd_error_bad_value
);
6779 goto error_ret_free_internal
;
6781 st_type
= hash
->root
.type
;
6783 ARM_GET_SYM_BRANCH_TYPE (hash
->root
.target_internal
);
6784 sym_name
= hash
->root
.root
.root
.string
;
6789 bfd_boolean new_stub
;
6790 struct elf32_arm_stub_hash_entry
*stub_entry
;
6792 /* Determine what (if any) linker stub is needed. */
6793 stub_type
= arm_type_of_stub (info
, section
, irela
,
6794 st_type
, &branch_type
,
6795 hash
, destination
, sym_sec
,
6796 input_bfd
, sym_name
);
6797 if (stub_type
== arm_stub_none
)
6800 /* We've either created a stub for this reloc already,
6801 or we are about to. */
6803 elf32_arm_create_stub (htab
, stub_type
, section
, irela
,
6805 (char *) sym_name
, sym_value
,
6806 branch_type
, &new_stub
);
6808 created_stub
= stub_entry
!= NULL
;
6810 goto error_ret_free_internal
;
6814 stub_changed
= TRUE
;
6818 /* Look for relocations which might trigger Cortex-A8
6820 if (htab
->fix_cortex_a8
6821 && (r_type
== (unsigned int) R_ARM_THM_JUMP24
6822 || r_type
== (unsigned int) R_ARM_THM_JUMP19
6823 || r_type
== (unsigned int) R_ARM_THM_CALL
6824 || r_type
== (unsigned int) R_ARM_THM_XPC22
))
6826 bfd_vma from
= section
->output_section
->vma
6827 + section
->output_offset
6830 if ((from
& 0xfff) == 0xffe)
6832 /* Found a candidate. Note we haven't checked the
6833 destination is within 4K here: if we do so (and
6834 don't create an entry in a8_relocs) we can't tell
6835 that a branch should have been relocated when
6837 if (num_a8_relocs
== a8_reloc_table_size
)
6839 a8_reloc_table_size
*= 2;
6840 a8_relocs
= (struct a8_erratum_reloc
*)
6841 bfd_realloc (a8_relocs
,
6842 sizeof (struct a8_erratum_reloc
)
6843 * a8_reloc_table_size
);
6846 a8_relocs
[num_a8_relocs
].from
= from
;
6847 a8_relocs
[num_a8_relocs
].destination
= destination
;
6848 a8_relocs
[num_a8_relocs
].r_type
= r_type
;
6849 a8_relocs
[num_a8_relocs
].branch_type
= branch_type
;
6850 a8_relocs
[num_a8_relocs
].sym_name
= sym_name
;
6851 a8_relocs
[num_a8_relocs
].non_a8_stub
= created_stub
;
6852 a8_relocs
[num_a8_relocs
].hash
= hash
;
6859 /* We're done with the internal relocs, free them. */
6860 if (elf_section_data (section
)->relocs
== NULL
)
6861 free (internal_relocs
);
6864 if (htab
->fix_cortex_a8
)
6866 /* Sort relocs which might apply to Cortex-A8 erratum. */
6867 qsort (a8_relocs
, num_a8_relocs
,
6868 sizeof (struct a8_erratum_reloc
),
6871 /* Scan for branches which might trigger Cortex-A8 erratum. */
6872 if (cortex_a8_erratum_scan (input_bfd
, info
, &a8_fixes
,
6873 &num_a8_fixes
, &a8_fix_table_size
,
6874 a8_relocs
, num_a8_relocs
,
6875 prev_num_a8_fixes
, &stub_changed
)
6877 goto error_ret_free_local
;
6880 if (local_syms
!= NULL
6881 && symtab_hdr
->contents
!= (unsigned char *) local_syms
)
6883 if (!info
->keep_memory
)
6886 symtab_hdr
->contents
= (unsigned char *) local_syms
;
6890 if (first_veneer_scan
6891 && !set_cmse_veneer_addr_from_implib (info
, htab
,
6892 &cmse_stub_created
))
6895 if (prev_num_a8_fixes
!= num_a8_fixes
)
6896 stub_changed
= TRUE
;
6901 /* OK, we've added some stubs. Find out the new size of the
6903 for (stub_sec
= htab
->stub_bfd
->sections
;
6905 stub_sec
= stub_sec
->next
)
6907 /* Ignore non-stub sections. */
6908 if (!strstr (stub_sec
->name
, STUB_SUFFIX
))
6914 /* Add new SG veneers after those already in the input import
6916 for (stub_type
= arm_stub_none
+ 1; stub_type
< max_stub_type
;
6919 bfd_vma
*start_offset_p
;
6920 asection
**stub_sec_p
;
6922 start_offset_p
= arm_new_stubs_start_offset_ptr (htab
, stub_type
);
6923 stub_sec_p
= arm_dedicated_stub_input_section_ptr (htab
, stub_type
);
6924 if (start_offset_p
== NULL
)
6927 BFD_ASSERT (stub_sec_p
!= NULL
);
6928 if (*stub_sec_p
!= NULL
)
6929 (*stub_sec_p
)->size
= *start_offset_p
;
6932 /* Compute stub section size, considering padding. */
6933 bfd_hash_traverse (&htab
->stub_hash_table
, arm_size_one_stub
, htab
);
6934 for (stub_type
= arm_stub_none
+ 1; stub_type
< max_stub_type
;
6938 asection
**stub_sec_p
;
6940 padding
= arm_dedicated_stub_section_padding (stub_type
);
6941 stub_sec_p
= arm_dedicated_stub_input_section_ptr (htab
, stub_type
);
6942 /* Skip if no stub input section or no stub section padding
6944 if ((stub_sec_p
!= NULL
&& *stub_sec_p
== NULL
) || padding
== 0)
6946 /* Stub section padding required but no dedicated section. */
6947 BFD_ASSERT (stub_sec_p
);
6949 size
= (*stub_sec_p
)->size
;
6950 size
= (size
+ padding
- 1) & ~(padding
- 1);
6951 (*stub_sec_p
)->size
= size
;
6954 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
6955 if (htab
->fix_cortex_a8
)
6956 for (i
= 0; i
< num_a8_fixes
; i
++)
6958 stub_sec
= elf32_arm_create_or_find_stub_sec (NULL
,
6959 a8_fixes
[i
].section
, htab
, a8_fixes
[i
].stub_type
);
6961 if (stub_sec
== NULL
)
6965 += find_stub_size_and_template (a8_fixes
[i
].stub_type
, NULL
,
6970 /* Ask the linker to do its stuff. */
6971 (*htab
->layout_sections_again
) ();
6972 first_veneer_scan
= FALSE
;
6975 /* Add stubs for Cortex-A8 erratum fixes now. */
6976 if (htab
->fix_cortex_a8
)
6978 for (i
= 0; i
< num_a8_fixes
; i
++)
6980 struct elf32_arm_stub_hash_entry
*stub_entry
;
6981 char *stub_name
= a8_fixes
[i
].stub_name
;
6982 asection
*section
= a8_fixes
[i
].section
;
6983 unsigned int section_id
= a8_fixes
[i
].section
->id
;
6984 asection
*link_sec
= htab
->stub_group
[section_id
].link_sec
;
6985 asection
*stub_sec
= htab
->stub_group
[section_id
].stub_sec
;
6986 const insn_sequence
*template_sequence
;
6987 int template_size
, size
= 0;
6989 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
, stub_name
,
6991 if (stub_entry
== NULL
)
6993 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
6994 section
->owner
, stub_name
);
6998 stub_entry
->stub_sec
= stub_sec
;
6999 stub_entry
->stub_offset
= (bfd_vma
) -1;
7000 stub_entry
->id_sec
= link_sec
;
7001 stub_entry
->stub_type
= a8_fixes
[i
].stub_type
;
7002 stub_entry
->source_value
= a8_fixes
[i
].offset
;
7003 stub_entry
->target_section
= a8_fixes
[i
].section
;
7004 stub_entry
->target_value
= a8_fixes
[i
].target_offset
;
7005 stub_entry
->orig_insn
= a8_fixes
[i
].orig_insn
;
7006 stub_entry
->branch_type
= a8_fixes
[i
].branch_type
;
7008 size
= find_stub_size_and_template (a8_fixes
[i
].stub_type
,
7012 stub_entry
->stub_size
= size
;
7013 stub_entry
->stub_template
= template_sequence
;
7014 stub_entry
->stub_template_size
= template_size
;
7017 /* Stash the Cortex-A8 erratum fix array for use later in
7018 elf32_arm_write_section(). */
7019 htab
->a8_erratum_fixes
= a8_fixes
;
7020 htab
->num_a8_erratum_fixes
= num_a8_fixes
;
7024 htab
->a8_erratum_fixes
= NULL
;
7025 htab
->num_a8_erratum_fixes
= 0;
7030 /* Build all the stubs associated with the current output file. The
7031 stubs are kept in a hash table attached to the main linker hash
7032 table. We also set up the .plt entries for statically linked PIC
7033 functions here. This function is called via arm_elf_finish in the
7037 elf32_arm_build_stubs (struct bfd_link_info
*info
)
7040 struct bfd_hash_table
*table
;
7041 enum elf32_arm_stub_type stub_type
;
7042 struct elf32_arm_link_hash_table
*htab
;
7044 htab
= elf32_arm_hash_table (info
);
7048 for (stub_sec
= htab
->stub_bfd
->sections
;
7050 stub_sec
= stub_sec
->next
)
7054 /* Ignore non-stub sections. */
7055 if (!strstr (stub_sec
->name
, STUB_SUFFIX
))
7058 /* Allocate memory to hold the linker stubs. Zeroing the stub sections
7059 must at least be done for stub section requiring padding and for SG
7060 veneers to ensure that a non secure code branching to a removed SG
7061 veneer causes an error. */
7062 size
= stub_sec
->size
;
7063 stub_sec
->contents
= (unsigned char *) bfd_zalloc (htab
->stub_bfd
, size
);
7064 if (stub_sec
->contents
== NULL
&& size
!= 0)
7070 /* Add new SG veneers after those already in the input import library. */
7071 for (stub_type
= arm_stub_none
+ 1; stub_type
< max_stub_type
; stub_type
++)
7073 bfd_vma
*start_offset_p
;
7074 asection
**stub_sec_p
;
7076 start_offset_p
= arm_new_stubs_start_offset_ptr (htab
, stub_type
);
7077 stub_sec_p
= arm_dedicated_stub_input_section_ptr (htab
, stub_type
);
7078 if (start_offset_p
== NULL
)
7081 BFD_ASSERT (stub_sec_p
!= NULL
);
7082 if (*stub_sec_p
!= NULL
)
7083 (*stub_sec_p
)->size
= *start_offset_p
;
7086 /* Build the stubs as directed by the stub hash table. */
7087 table
= &htab
->stub_hash_table
;
7088 bfd_hash_traverse (table
, arm_build_one_stub
, info
);
7089 if (htab
->fix_cortex_a8
)
7091 /* Place the cortex a8 stubs last. */
7092 htab
->fix_cortex_a8
= -1;
7093 bfd_hash_traverse (table
, arm_build_one_stub
, info
);
7099 /* Locate the Thumb encoded calling stub for NAME. */
7101 static struct elf_link_hash_entry
*
7102 find_thumb_glue (struct bfd_link_info
*link_info
,
7104 char **error_message
)
7107 struct elf_link_hash_entry
*hash
;
7108 struct elf32_arm_link_hash_table
*hash_table
;
7110 /* We need a pointer to the armelf specific hash table. */
7111 hash_table
= elf32_arm_hash_table (link_info
);
7112 if (hash_table
== NULL
)
7115 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen (name
)
7116 + strlen (THUMB2ARM_GLUE_ENTRY_NAME
) + 1);
7118 BFD_ASSERT (tmp_name
);
7120 sprintf (tmp_name
, THUMB2ARM_GLUE_ENTRY_NAME
, name
);
7122 hash
= elf_link_hash_lookup
7123 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
7126 && asprintf (error_message
, _("unable to find %s glue '%s' for '%s'"),
7127 "Thumb", tmp_name
, name
) == -1)
7128 *error_message
= (char *) bfd_errmsg (bfd_error_system_call
);
7135 /* Locate the ARM encoded calling stub for NAME. */
7137 static struct elf_link_hash_entry
*
7138 find_arm_glue (struct bfd_link_info
*link_info
,
7140 char **error_message
)
7143 struct elf_link_hash_entry
*myh
;
7144 struct elf32_arm_link_hash_table
*hash_table
;
7146 /* We need a pointer to the elfarm specific hash table. */
7147 hash_table
= elf32_arm_hash_table (link_info
);
7148 if (hash_table
== NULL
)
7151 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen (name
)
7152 + strlen (ARM2THUMB_GLUE_ENTRY_NAME
) + 1);
7153 BFD_ASSERT (tmp_name
);
7155 sprintf (tmp_name
, ARM2THUMB_GLUE_ENTRY_NAME
, name
);
7157 myh
= elf_link_hash_lookup
7158 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
7161 && asprintf (error_message
, _("unable to find %s glue '%s' for '%s'"),
7162 "ARM", tmp_name
, name
) == -1)
7163 *error_message
= (char *) bfd_errmsg (bfd_error_system_call
);
7170 /* ARM->Thumb glue (static images):
7174 ldr r12, __func_addr
7177 .word func @ behave as if you saw a ARM_32 reloc.
7184 .word func @ behave as if you saw a ARM_32 reloc.
7186 (relocatable images)
7189 ldr r12, __func_offset
7195 #define ARM2THUMB_STATIC_GLUE_SIZE 12
7196 static const insn32 a2t1_ldr_insn
= 0xe59fc000;
7197 static const insn32 a2t2_bx_r12_insn
= 0xe12fff1c;
7198 static const insn32 a2t3_func_addr_insn
= 0x00000001;
7200 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
7201 static const insn32 a2t1v5_ldr_insn
= 0xe51ff004;
7202 static const insn32 a2t2v5_func_addr_insn
= 0x00000001;
7204 #define ARM2THUMB_PIC_GLUE_SIZE 16
7205 static const insn32 a2t1p_ldr_insn
= 0xe59fc004;
7206 static const insn32 a2t2p_add_pc_insn
= 0xe08cc00f;
7207 static const insn32 a2t3p_bx_r12_insn
= 0xe12fff1c;
7209 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
7213 __func_from_thumb: __func_from_thumb:
7215 nop ldr r6, __func_addr
7225 #define THUMB2ARM_GLUE_SIZE 8
7226 static const insn16 t2a1_bx_pc_insn
= 0x4778;
7227 static const insn16 t2a2_noop_insn
= 0x46c0;
7228 static const insn32 t2a3_b_insn
= 0xea000000;
7230 #define VFP11_ERRATUM_VENEER_SIZE 8
7231 #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16
7232 #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24
7234 #define ARM_BX_VENEER_SIZE 12
7235 static const insn32 armbx1_tst_insn
= 0xe3100001;
7236 static const insn32 armbx2_moveq_insn
= 0x01a0f000;
7237 static const insn32 armbx3_bx_insn
= 0xe12fff10;
7239 #ifndef ELFARM_NABI_C_INCLUDED
7241 arm_allocate_glue_section_space (bfd
* abfd
, bfd_size_type size
, const char * name
)
7244 bfd_byte
* contents
;
7248 /* Do not include empty glue sections in the output. */
7251 s
= bfd_get_linker_section (abfd
, name
);
7253 s
->flags
|= SEC_EXCLUDE
;
7258 BFD_ASSERT (abfd
!= NULL
);
7260 s
= bfd_get_linker_section (abfd
, name
);
7261 BFD_ASSERT (s
!= NULL
);
7263 contents
= (bfd_byte
*) bfd_zalloc (abfd
, size
);
7265 BFD_ASSERT (s
->size
== size
);
7266 s
->contents
= contents
;
7270 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info
* info
)
7272 struct elf32_arm_link_hash_table
* globals
;
7274 globals
= elf32_arm_hash_table (info
);
7275 BFD_ASSERT (globals
!= NULL
);
7277 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
7278 globals
->arm_glue_size
,
7279 ARM2THUMB_GLUE_SECTION_NAME
);
7281 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
7282 globals
->thumb_glue_size
,
7283 THUMB2ARM_GLUE_SECTION_NAME
);
7285 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
7286 globals
->vfp11_erratum_glue_size
,
7287 VFP11_ERRATUM_VENEER_SECTION_NAME
);
7289 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
7290 globals
->stm32l4xx_erratum_glue_size
,
7291 STM32L4XX_ERRATUM_VENEER_SECTION_NAME
);
7293 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
7294 globals
->bx_glue_size
,
7295 ARM_BX_GLUE_SECTION_NAME
);
7300 /* Allocate space and symbols for calling a Thumb function from Arm mode.
7301 returns the symbol identifying the stub. */
7303 static struct elf_link_hash_entry
*
7304 record_arm_to_thumb_glue (struct bfd_link_info
* link_info
,
7305 struct elf_link_hash_entry
* h
)
7307 const char * name
= h
->root
.root
.string
;
7310 struct elf_link_hash_entry
* myh
;
7311 struct bfd_link_hash_entry
* bh
;
7312 struct elf32_arm_link_hash_table
* globals
;
7316 globals
= elf32_arm_hash_table (link_info
);
7317 BFD_ASSERT (globals
!= NULL
);
7318 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
7320 s
= bfd_get_linker_section
7321 (globals
->bfd_of_glue_owner
, ARM2THUMB_GLUE_SECTION_NAME
);
7323 BFD_ASSERT (s
!= NULL
);
7325 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen (name
)
7326 + strlen (ARM2THUMB_GLUE_ENTRY_NAME
) + 1);
7327 BFD_ASSERT (tmp_name
);
7329 sprintf (tmp_name
, ARM2THUMB_GLUE_ENTRY_NAME
, name
);
7331 myh
= elf_link_hash_lookup
7332 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
7336 /* We've already seen this guy. */
7341 /* The only trick here is using hash_table->arm_glue_size as the value.
7342 Even though the section isn't allocated yet, this is where we will be
7343 putting it. The +1 on the value marks that the stub has not been
7344 output yet - not that it is a Thumb function. */
7346 val
= globals
->arm_glue_size
+ 1;
7347 _bfd_generic_link_add_one_symbol (link_info
, globals
->bfd_of_glue_owner
,
7348 tmp_name
, BSF_GLOBAL
, s
, val
,
7349 NULL
, TRUE
, FALSE
, &bh
);
7351 myh
= (struct elf_link_hash_entry
*) bh
;
7352 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
7353 myh
->forced_local
= 1;
7357 if (bfd_link_pic (link_info
)
7358 || globals
->root
.is_relocatable_executable
7359 || globals
->pic_veneer
)
7360 size
= ARM2THUMB_PIC_GLUE_SIZE
;
7361 else if (globals
->use_blx
)
7362 size
= ARM2THUMB_V5_STATIC_GLUE_SIZE
;
7364 size
= ARM2THUMB_STATIC_GLUE_SIZE
;
7367 globals
->arm_glue_size
+= size
;
7372 /* Allocate space for ARMv4 BX veneers. */
7375 record_arm_bx_glue (struct bfd_link_info
* link_info
, int reg
)
7378 struct elf32_arm_link_hash_table
*globals
;
7380 struct elf_link_hash_entry
*myh
;
7381 struct bfd_link_hash_entry
*bh
;
7384 /* BX PC does not need a veneer. */
7388 globals
= elf32_arm_hash_table (link_info
);
7389 BFD_ASSERT (globals
!= NULL
);
7390 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
7392 /* Check if this veneer has already been allocated. */
7393 if (globals
->bx_glue_offset
[reg
])
7396 s
= bfd_get_linker_section
7397 (globals
->bfd_of_glue_owner
, ARM_BX_GLUE_SECTION_NAME
);
7399 BFD_ASSERT (s
!= NULL
);
7401 /* Add symbol for veneer. */
7403 bfd_malloc ((bfd_size_type
) strlen (ARM_BX_GLUE_ENTRY_NAME
) + 1);
7404 BFD_ASSERT (tmp_name
);
7406 sprintf (tmp_name
, ARM_BX_GLUE_ENTRY_NAME
, reg
);
7408 myh
= elf_link_hash_lookup
7409 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
7411 BFD_ASSERT (myh
== NULL
);
7414 val
= globals
->bx_glue_size
;
7415 _bfd_generic_link_add_one_symbol (link_info
, globals
->bfd_of_glue_owner
,
7416 tmp_name
, BSF_FUNCTION
| BSF_LOCAL
, s
, val
,
7417 NULL
, TRUE
, FALSE
, &bh
);
7419 myh
= (struct elf_link_hash_entry
*) bh
;
7420 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
7421 myh
->forced_local
= 1;
7423 s
->size
+= ARM_BX_VENEER_SIZE
;
7424 globals
->bx_glue_offset
[reg
] = globals
->bx_glue_size
| 2;
7425 globals
->bx_glue_size
+= ARM_BX_VENEER_SIZE
;
7429 /* Add an entry to the code/data map for section SEC. */
7432 elf32_arm_section_map_add (asection
*sec
, char type
, bfd_vma vma
)
7434 struct _arm_elf_section_data
*sec_data
= elf32_arm_section_data (sec
);
7435 unsigned int newidx
;
7437 if (sec_data
->map
== NULL
)
7439 sec_data
->map
= (elf32_arm_section_map
*)
7440 bfd_malloc (sizeof (elf32_arm_section_map
));
7441 sec_data
->mapcount
= 0;
7442 sec_data
->mapsize
= 1;
7445 newidx
= sec_data
->mapcount
++;
7447 if (sec_data
->mapcount
> sec_data
->mapsize
)
7449 sec_data
->mapsize
*= 2;
7450 sec_data
->map
= (elf32_arm_section_map
*)
7451 bfd_realloc_or_free (sec_data
->map
, sec_data
->mapsize
7452 * sizeof (elf32_arm_section_map
));
7457 sec_data
->map
[newidx
].vma
= vma
;
7458 sec_data
->map
[newidx
].type
= type
;
7463 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
7464 veneers are handled for now. */
7467 record_vfp11_erratum_veneer (struct bfd_link_info
*link_info
,
7468 elf32_vfp11_erratum_list
*branch
,
7470 asection
*branch_sec
,
7471 unsigned int offset
)
7474 struct elf32_arm_link_hash_table
*hash_table
;
7476 struct elf_link_hash_entry
*myh
;
7477 struct bfd_link_hash_entry
*bh
;
7479 struct _arm_elf_section_data
*sec_data
;
7480 elf32_vfp11_erratum_list
*newerr
;
7482 hash_table
= elf32_arm_hash_table (link_info
);
7483 BFD_ASSERT (hash_table
!= NULL
);
7484 BFD_ASSERT (hash_table
->bfd_of_glue_owner
!= NULL
);
7486 s
= bfd_get_linker_section
7487 (hash_table
->bfd_of_glue_owner
, VFP11_ERRATUM_VENEER_SECTION_NAME
);
7489 sec_data
= elf32_arm_section_data (s
);
7491 BFD_ASSERT (s
!= NULL
);
7493 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen
7494 (VFP11_ERRATUM_VENEER_ENTRY_NAME
) + 10);
7495 BFD_ASSERT (tmp_name
);
7497 sprintf (tmp_name
, VFP11_ERRATUM_VENEER_ENTRY_NAME
,
7498 hash_table
->num_vfp11_fixes
);
7500 myh
= elf_link_hash_lookup
7501 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
7503 BFD_ASSERT (myh
== NULL
);
7506 val
= hash_table
->vfp11_erratum_glue_size
;
7507 _bfd_generic_link_add_one_symbol (link_info
, hash_table
->bfd_of_glue_owner
,
7508 tmp_name
, BSF_FUNCTION
| BSF_LOCAL
, s
, val
,
7509 NULL
, TRUE
, FALSE
, &bh
);
7511 myh
= (struct elf_link_hash_entry
*) bh
;
7512 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
7513 myh
->forced_local
= 1;
7515 /* Link veneer back to calling location. */
7516 sec_data
->erratumcount
+= 1;
7517 newerr
= (elf32_vfp11_erratum_list
*)
7518 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list
));
7520 newerr
->type
= VFP11_ERRATUM_ARM_VENEER
;
7522 newerr
->u
.v
.branch
= branch
;
7523 newerr
->u
.v
.id
= hash_table
->num_vfp11_fixes
;
7524 branch
->u
.b
.veneer
= newerr
;
7526 newerr
->next
= sec_data
->erratumlist
;
7527 sec_data
->erratumlist
= newerr
;
7529 /* A symbol for the return from the veneer. */
7530 sprintf (tmp_name
, VFP11_ERRATUM_VENEER_ENTRY_NAME
"_r",
7531 hash_table
->num_vfp11_fixes
);
7533 myh
= elf_link_hash_lookup
7534 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
7541 _bfd_generic_link_add_one_symbol (link_info
, branch_bfd
, tmp_name
, BSF_LOCAL
,
7542 branch_sec
, val
, NULL
, TRUE
, FALSE
, &bh
);
7544 myh
= (struct elf_link_hash_entry
*) bh
;
7545 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
7546 myh
->forced_local
= 1;
7550 /* Generate a mapping symbol for the veneer section, and explicitly add an
7551 entry for that symbol to the code/data map for the section. */
7552 if (hash_table
->vfp11_erratum_glue_size
== 0)
7555 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
7556 ever requires this erratum fix. */
7557 _bfd_generic_link_add_one_symbol (link_info
,
7558 hash_table
->bfd_of_glue_owner
, "$a",
7559 BSF_LOCAL
, s
, 0, NULL
,
7562 myh
= (struct elf_link_hash_entry
*) bh
;
7563 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_NOTYPE
);
7564 myh
->forced_local
= 1;
7566 /* The elf32_arm_init_maps function only cares about symbols from input
7567 BFDs. We must make a note of this generated mapping symbol
7568 ourselves so that code byteswapping works properly in
7569 elf32_arm_write_section. */
7570 elf32_arm_section_map_add (s
, 'a', 0);
7573 s
->size
+= VFP11_ERRATUM_VENEER_SIZE
;
7574 hash_table
->vfp11_erratum_glue_size
+= VFP11_ERRATUM_VENEER_SIZE
;
7575 hash_table
->num_vfp11_fixes
++;
7577 /* The offset of the veneer. */
7581 /* Record information about a STM32L4XX STM erratum veneer. Only THUMB-mode
7582 veneers need to be handled because used only in Cortex-M. */
7585 record_stm32l4xx_erratum_veneer (struct bfd_link_info
*link_info
,
7586 elf32_stm32l4xx_erratum_list
*branch
,
7588 asection
*branch_sec
,
7589 unsigned int offset
,
7590 bfd_size_type veneer_size
)
7593 struct elf32_arm_link_hash_table
*hash_table
;
7595 struct elf_link_hash_entry
*myh
;
7596 struct bfd_link_hash_entry
*bh
;
7598 struct _arm_elf_section_data
*sec_data
;
7599 elf32_stm32l4xx_erratum_list
*newerr
;
7601 hash_table
= elf32_arm_hash_table (link_info
);
7602 BFD_ASSERT (hash_table
!= NULL
);
7603 BFD_ASSERT (hash_table
->bfd_of_glue_owner
!= NULL
);
7605 s
= bfd_get_linker_section
7606 (hash_table
->bfd_of_glue_owner
, STM32L4XX_ERRATUM_VENEER_SECTION_NAME
);
7608 BFD_ASSERT (s
!= NULL
);
7610 sec_data
= elf32_arm_section_data (s
);
7612 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen
7613 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
) + 10);
7614 BFD_ASSERT (tmp_name
);
7616 sprintf (tmp_name
, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
,
7617 hash_table
->num_stm32l4xx_fixes
);
7619 myh
= elf_link_hash_lookup
7620 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
7622 BFD_ASSERT (myh
== NULL
);
7625 val
= hash_table
->stm32l4xx_erratum_glue_size
;
7626 _bfd_generic_link_add_one_symbol (link_info
, hash_table
->bfd_of_glue_owner
,
7627 tmp_name
, BSF_FUNCTION
| BSF_LOCAL
, s
, val
,
7628 NULL
, TRUE
, FALSE
, &bh
);
7630 myh
= (struct elf_link_hash_entry
*) bh
;
7631 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
7632 myh
->forced_local
= 1;
7634 /* Link veneer back to calling location. */
7635 sec_data
->stm32l4xx_erratumcount
+= 1;
7636 newerr
= (elf32_stm32l4xx_erratum_list
*)
7637 bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list
));
7639 newerr
->type
= STM32L4XX_ERRATUM_VENEER
;
7641 newerr
->u
.v
.branch
= branch
;
7642 newerr
->u
.v
.id
= hash_table
->num_stm32l4xx_fixes
;
7643 branch
->u
.b
.veneer
= newerr
;
7645 newerr
->next
= sec_data
->stm32l4xx_erratumlist
;
7646 sec_data
->stm32l4xx_erratumlist
= newerr
;
7648 /* A symbol for the return from the veneer. */
7649 sprintf (tmp_name
, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
"_r",
7650 hash_table
->num_stm32l4xx_fixes
);
7652 myh
= elf_link_hash_lookup
7653 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
7660 _bfd_generic_link_add_one_symbol (link_info
, branch_bfd
, tmp_name
, BSF_LOCAL
,
7661 branch_sec
, val
, NULL
, TRUE
, FALSE
, &bh
);
7663 myh
= (struct elf_link_hash_entry
*) bh
;
7664 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
7665 myh
->forced_local
= 1;
7669 /* Generate a mapping symbol for the veneer section, and explicitly add an
7670 entry for that symbol to the code/data map for the section. */
7671 if (hash_table
->stm32l4xx_erratum_glue_size
== 0)
7674 /* Creates a THUMB symbol since there is no other choice. */
7675 _bfd_generic_link_add_one_symbol (link_info
,
7676 hash_table
->bfd_of_glue_owner
, "$t",
7677 BSF_LOCAL
, s
, 0, NULL
,
7680 myh
= (struct elf_link_hash_entry
*) bh
;
7681 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_NOTYPE
);
7682 myh
->forced_local
= 1;
7684 /* The elf32_arm_init_maps function only cares about symbols from input
7685 BFDs. We must make a note of this generated mapping symbol
7686 ourselves so that code byteswapping works properly in
7687 elf32_arm_write_section. */
7688 elf32_arm_section_map_add (s
, 't', 0);
7691 s
->size
+= veneer_size
;
7692 hash_table
->stm32l4xx_erratum_glue_size
+= veneer_size
;
7693 hash_table
->num_stm32l4xx_fixes
++;
7695 /* The offset of the veneer. */
7699 #define ARM_GLUE_SECTION_FLAGS \
7700 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
7701 | SEC_READONLY | SEC_LINKER_CREATED)
7703 /* Create a fake section for use by the ARM backend of the linker. */
7706 arm_make_glue_section (bfd
* abfd
, const char * name
)
7710 sec
= bfd_get_linker_section (abfd
, name
);
7715 sec
= bfd_make_section_anyway_with_flags (abfd
, name
, ARM_GLUE_SECTION_FLAGS
);
7718 || !bfd_set_section_alignment (sec
, 2))
7721 /* Set the gc mark to prevent the section from being removed by garbage
7722 collection, despite the fact that no relocs refer to this section. */
7728 /* Set size of .plt entries. This function is called from the
7729 linker scripts in ld/emultempl/{armelf}.em. */
7732 bfd_elf32_arm_use_long_plt (void)
7734 elf32_arm_use_long_plt_entry
= TRUE
;
7737 /* Add the glue sections to ABFD. This function is called from the
7738 linker scripts in ld/emultempl/{armelf}.em. */
7741 bfd_elf32_arm_add_glue_sections_to_bfd (bfd
*abfd
,
7742 struct bfd_link_info
*info
)
7744 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (info
);
7745 bfd_boolean dostm32l4xx
= globals
7746 && globals
->stm32l4xx_fix
!= BFD_ARM_STM32L4XX_FIX_NONE
;
7747 bfd_boolean addglue
;
7749 /* If we are only performing a partial
7750 link do not bother adding the glue. */
7751 if (bfd_link_relocatable (info
))
7754 addglue
= arm_make_glue_section (abfd
, ARM2THUMB_GLUE_SECTION_NAME
)
7755 && arm_make_glue_section (abfd
, THUMB2ARM_GLUE_SECTION_NAME
)
7756 && arm_make_glue_section (abfd
, VFP11_ERRATUM_VENEER_SECTION_NAME
)
7757 && arm_make_glue_section (abfd
, ARM_BX_GLUE_SECTION_NAME
);
7763 && arm_make_glue_section (abfd
, STM32L4XX_ERRATUM_VENEER_SECTION_NAME
);
7766 /* Mark output sections of veneers needing a dedicated one with SEC_KEEP. This
7767 ensures they are not marked for deletion by
7768 strip_excluded_output_sections () when veneers are going to be created
7769 later. Not doing so would trigger assert on empty section size in
7770 lang_size_sections_1 (). */
7773 bfd_elf32_arm_keep_private_stub_output_sections (struct bfd_link_info
*info
)
7775 enum elf32_arm_stub_type stub_type
;
7777 /* If we are only performing a partial
7778 link do not bother adding the glue. */
7779 if (bfd_link_relocatable (info
))
7782 for (stub_type
= arm_stub_none
+ 1; stub_type
< max_stub_type
; stub_type
++)
7785 const char *out_sec_name
;
7787 if (!arm_dedicated_stub_output_section_required (stub_type
))
7790 out_sec_name
= arm_dedicated_stub_output_section_name (stub_type
);
7791 out_sec
= bfd_get_section_by_name (info
->output_bfd
, out_sec_name
);
7792 if (out_sec
!= NULL
)
7793 out_sec
->flags
|= SEC_KEEP
;
7797 /* Select a BFD to be used to hold the sections used by the glue code.
7798 This function is called from the linker scripts in ld/emultempl/
7802 bfd_elf32_arm_get_bfd_for_interworking (bfd
*abfd
, struct bfd_link_info
*info
)
7804 struct elf32_arm_link_hash_table
*globals
;
7806 /* If we are only performing a partial link
7807 do not bother getting a bfd to hold the glue. */
7808 if (bfd_link_relocatable (info
))
7811 /* Make sure we don't attach the glue sections to a dynamic object. */
7812 BFD_ASSERT (!(abfd
->flags
& DYNAMIC
));
7814 globals
= elf32_arm_hash_table (info
);
7815 BFD_ASSERT (globals
!= NULL
);
7817 if (globals
->bfd_of_glue_owner
!= NULL
)
7820 /* Save the bfd for later use. */
7821 globals
->bfd_of_glue_owner
= abfd
;
7827 check_use_blx (struct elf32_arm_link_hash_table
*globals
)
7831 cpu_arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
7834 if (globals
->fix_arm1176
)
7836 if (cpu_arch
== TAG_CPU_ARCH_V6T2
|| cpu_arch
> TAG_CPU_ARCH_V6K
)
7837 globals
->use_blx
= 1;
7841 if (cpu_arch
> TAG_CPU_ARCH_V4T
)
7842 globals
->use_blx
= 1;
7847 bfd_elf32_arm_process_before_allocation (bfd
*abfd
,
7848 struct bfd_link_info
*link_info
)
7850 Elf_Internal_Shdr
*symtab_hdr
;
7851 Elf_Internal_Rela
*internal_relocs
= NULL
;
7852 Elf_Internal_Rela
*irel
, *irelend
;
7853 bfd_byte
*contents
= NULL
;
7856 struct elf32_arm_link_hash_table
*globals
;
7858 /* If we are only performing a partial link do not bother
7859 to construct any glue. */
7860 if (bfd_link_relocatable (link_info
))
7863 /* Here we have a bfd that is to be included on the link. We have a
7864 hook to do reloc rummaging, before section sizes are nailed down. */
7865 globals
= elf32_arm_hash_table (link_info
);
7866 BFD_ASSERT (globals
!= NULL
);
7868 check_use_blx (globals
);
7870 if (globals
->byteswap_code
&& !bfd_big_endian (abfd
))
7872 _bfd_error_handler (_("%pB: BE8 images only valid in big-endian mode"),
7877 /* PR 5398: If we have not decided to include any loadable sections in
7878 the output then we will not have a glue owner bfd. This is OK, it
7879 just means that there is nothing else for us to do here. */
7880 if (globals
->bfd_of_glue_owner
== NULL
)
7883 /* Rummage around all the relocs and map the glue vectors. */
7884 sec
= abfd
->sections
;
7889 for (; sec
!= NULL
; sec
= sec
->next
)
7891 if (sec
->reloc_count
== 0)
7894 if ((sec
->flags
& SEC_EXCLUDE
) != 0)
7897 symtab_hdr
= & elf_symtab_hdr (abfd
);
7899 /* Load the relocs. */
7901 = _bfd_elf_link_read_relocs (abfd
, sec
, NULL
, NULL
, FALSE
);
7903 if (internal_relocs
== NULL
)
7906 irelend
= internal_relocs
+ sec
->reloc_count
;
7907 for (irel
= internal_relocs
; irel
< irelend
; irel
++)
7910 unsigned long r_index
;
7912 struct elf_link_hash_entry
*h
;
7914 r_type
= ELF32_R_TYPE (irel
->r_info
);
7915 r_index
= ELF32_R_SYM (irel
->r_info
);
7917 /* These are the only relocation types we care about. */
7918 if ( r_type
!= R_ARM_PC24
7919 && (r_type
!= R_ARM_V4BX
|| globals
->fix_v4bx
< 2))
7922 /* Get the section contents if we haven't done so already. */
7923 if (contents
== NULL
)
7925 /* Get cached copy if it exists. */
7926 if (elf_section_data (sec
)->this_hdr
.contents
!= NULL
)
7927 contents
= elf_section_data (sec
)->this_hdr
.contents
;
7930 /* Go get them off disk. */
7931 if (! bfd_malloc_and_get_section (abfd
, sec
, &contents
))
7936 if (r_type
== R_ARM_V4BX
)
7940 reg
= bfd_get_32 (abfd
, contents
+ irel
->r_offset
) & 0xf;
7941 record_arm_bx_glue (link_info
, reg
);
7945 /* If the relocation is not against a symbol it cannot concern us. */
7948 /* We don't care about local symbols. */
7949 if (r_index
< symtab_hdr
->sh_info
)
7952 /* This is an external symbol. */
7953 r_index
-= symtab_hdr
->sh_info
;
7954 h
= (struct elf_link_hash_entry
*)
7955 elf_sym_hashes (abfd
)[r_index
];
7957 /* If the relocation is against a static symbol it must be within
7958 the current section and so cannot be a cross ARM/Thumb relocation. */
7962 /* If the call will go through a PLT entry then we do not need
7964 if (globals
->root
.splt
!= NULL
&& h
->plt
.offset
!= (bfd_vma
) -1)
7970 /* This one is a call from arm code. We need to look up
7971 the target of the call. If it is a thumb target, we
7973 if (ARM_GET_SYM_BRANCH_TYPE (h
->target_internal
)
7974 == ST_BRANCH_TO_THUMB
)
7975 record_arm_to_thumb_glue (link_info
, h
);
7983 if (elf_section_data (sec
)->this_hdr
.contents
!= contents
)
7987 if (elf_section_data (sec
)->relocs
!= internal_relocs
)
7988 free (internal_relocs
);
7989 internal_relocs
= NULL
;
7995 if (elf_section_data (sec
)->this_hdr
.contents
!= contents
)
7997 if (elf_section_data (sec
)->relocs
!= internal_relocs
)
7998 free (internal_relocs
);
8005 /* Initialise maps of ARM/Thumb/data for input BFDs. */
8008 bfd_elf32_arm_init_maps (bfd
*abfd
)
8010 Elf_Internal_Sym
*isymbuf
;
8011 Elf_Internal_Shdr
*hdr
;
8012 unsigned int i
, localsyms
;
8014 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
8015 if (! is_arm_elf (abfd
))
8018 if ((abfd
->flags
& DYNAMIC
) != 0)
8021 hdr
= & elf_symtab_hdr (abfd
);
8022 localsyms
= hdr
->sh_info
;
8024 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
8025 should contain the number of local symbols, which should come before any
8026 global symbols. Mapping symbols are always local. */
8027 isymbuf
= bfd_elf_get_elf_syms (abfd
, hdr
, localsyms
, 0, NULL
, NULL
,
8030 /* No internal symbols read? Skip this BFD. */
8031 if (isymbuf
== NULL
)
8034 for (i
= 0; i
< localsyms
; i
++)
8036 Elf_Internal_Sym
*isym
= &isymbuf
[i
];
8037 asection
*sec
= bfd_section_from_elf_index (abfd
, isym
->st_shndx
);
8041 && ELF_ST_BIND (isym
->st_info
) == STB_LOCAL
)
8043 name
= bfd_elf_string_from_elf_section (abfd
,
8044 hdr
->sh_link
, isym
->st_name
);
8046 if (bfd_is_arm_special_symbol_name (name
,
8047 BFD_ARM_SPECIAL_SYM_TYPE_MAP
))
8048 elf32_arm_section_map_add (sec
, name
[1], isym
->st_value
);
8054 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
8055 say what they wanted. */
8058 bfd_elf32_arm_set_cortex_a8_fix (bfd
*obfd
, struct bfd_link_info
*link_info
)
8060 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
8061 obj_attribute
*out_attr
= elf_known_obj_attributes_proc (obfd
);
8063 if (globals
== NULL
)
8066 if (globals
->fix_cortex_a8
== -1)
8068 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
8069 if (out_attr
[Tag_CPU_arch
].i
== TAG_CPU_ARCH_V7
8070 && (out_attr
[Tag_CPU_arch_profile
].i
== 'A'
8071 || out_attr
[Tag_CPU_arch_profile
].i
== 0))
8072 globals
->fix_cortex_a8
= 1;
8074 globals
->fix_cortex_a8
= 0;
8080 bfd_elf32_arm_set_vfp11_fix (bfd
*obfd
, struct bfd_link_info
*link_info
)
8082 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
8083 obj_attribute
*out_attr
= elf_known_obj_attributes_proc (obfd
);
8085 if (globals
== NULL
)
8087 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
8088 if (out_attr
[Tag_CPU_arch
].i
>= TAG_CPU_ARCH_V7
)
8090 switch (globals
->vfp11_fix
)
8092 case BFD_ARM_VFP11_FIX_DEFAULT
:
8093 case BFD_ARM_VFP11_FIX_NONE
:
8094 globals
->vfp11_fix
= BFD_ARM_VFP11_FIX_NONE
;
8098 /* Give a warning, but do as the user requests anyway. */
8099 _bfd_error_handler (_("%pB: warning: selected VFP11 erratum "
8100 "workaround is not necessary for target architecture"), obfd
);
8103 else if (globals
->vfp11_fix
== BFD_ARM_VFP11_FIX_DEFAULT
)
8104 /* For earlier architectures, we might need the workaround, but do not
8105 enable it by default. If users is running with broken hardware, they
8106 must enable the erratum fix explicitly. */
8107 globals
->vfp11_fix
= BFD_ARM_VFP11_FIX_NONE
;
8111 bfd_elf32_arm_set_stm32l4xx_fix (bfd
*obfd
, struct bfd_link_info
*link_info
)
8113 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
8114 obj_attribute
*out_attr
= elf_known_obj_attributes_proc (obfd
);
8116 if (globals
== NULL
)
8119 /* We assume only Cortex-M4 may require the fix. */
8120 if (out_attr
[Tag_CPU_arch
].i
!= TAG_CPU_ARCH_V7E_M
8121 || out_attr
[Tag_CPU_arch_profile
].i
!= 'M')
8123 if (globals
->stm32l4xx_fix
!= BFD_ARM_STM32L4XX_FIX_NONE
)
8124 /* Give a warning, but do as the user requests anyway. */
8126 (_("%pB: warning: selected STM32L4XX erratum "
8127 "workaround is not necessary for target architecture"), obfd
);
8131 enum bfd_arm_vfp11_pipe
8139 /* Return a VFP register number. This is encoded as RX:X for single-precision
8140 registers, or X:RX for double-precision registers, where RX is the group of
8141 four bits in the instruction encoding and X is the single extension bit.
8142 RX and X fields are specified using their lowest (starting) bit. The return
8145 0...31: single-precision registers s0...s31
8146 32...63: double-precision registers d0...d31.
8148 Although X should be zero for VFP11 (encoding d0...d15 only), we might
8149 encounter VFP3 instructions, so we allow the full range for DP registers. */
8152 bfd_arm_vfp11_regno (unsigned int insn
, bfd_boolean is_double
, unsigned int rx
,
8156 return (((insn
>> rx
) & 0xf) | (((insn
>> x
) & 1) << 4)) + 32;
8158 return (((insn
>> rx
) & 0xf) << 1) | ((insn
>> x
) & 1);
8161 /* Set bits in *WMASK according to a register number REG as encoded by
8162 bfd_arm_vfp11_regno(). Ignore d16-d31. */
8165 bfd_arm_vfp11_write_mask (unsigned int *wmask
, unsigned int reg
)
8170 *wmask
|= 3 << ((reg
- 32) * 2);
8173 /* Return TRUE if WMASK overwrites anything in REGS. */
8176 bfd_arm_vfp11_antidependency (unsigned int wmask
, int *regs
, int numregs
)
8180 for (i
= 0; i
< numregs
; i
++)
8182 unsigned int reg
= regs
[i
];
8184 if (reg
< 32 && (wmask
& (1 << reg
)) != 0)
8192 if ((wmask
& (3 << (reg
* 2))) != 0)
8199 /* In this function, we're interested in two things: finding input registers
8200 for VFP data-processing instructions, and finding the set of registers which
8201 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
8202 hold the written set, so FLDM etc. are easy to deal with (we're only
8203 interested in 32 SP registers or 16 dp registers, due to the VFP version
8204 implemented by the chip in question). DP registers are marked by setting
8205 both SP registers in the write mask). */
8207 static enum bfd_arm_vfp11_pipe
8208 bfd_arm_vfp11_insn_decode (unsigned int insn
, unsigned int *destmask
, int *regs
,
8211 enum bfd_arm_vfp11_pipe vpipe
= VFP11_BAD
;
8212 bfd_boolean is_double
= ((insn
& 0xf00) == 0xb00) ? 1 : 0;
8214 if ((insn
& 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
8217 unsigned int fd
= bfd_arm_vfp11_regno (insn
, is_double
, 12, 22);
8218 unsigned int fm
= bfd_arm_vfp11_regno (insn
, is_double
, 0, 5);
8220 pqrs
= ((insn
& 0x00800000) >> 20)
8221 | ((insn
& 0x00300000) >> 19)
8222 | ((insn
& 0x00000040) >> 6);
8226 case 0: /* fmac[sd]. */
8227 case 1: /* fnmac[sd]. */
8228 case 2: /* fmsc[sd]. */
8229 case 3: /* fnmsc[sd]. */
8231 bfd_arm_vfp11_write_mask (destmask
, fd
);
8233 regs
[1] = bfd_arm_vfp11_regno (insn
, is_double
, 16, 7); /* Fn. */
8238 case 4: /* fmul[sd]. */
8239 case 5: /* fnmul[sd]. */
8240 case 6: /* fadd[sd]. */
8241 case 7: /* fsub[sd]. */
8245 case 8: /* fdiv[sd]. */
8248 bfd_arm_vfp11_write_mask (destmask
, fd
);
8249 regs
[0] = bfd_arm_vfp11_regno (insn
, is_double
, 16, 7); /* Fn. */
8254 case 15: /* extended opcode. */
8256 unsigned int extn
= ((insn
>> 15) & 0x1e)
8257 | ((insn
>> 7) & 1);
8261 case 0: /* fcpy[sd]. */
8262 case 1: /* fabs[sd]. */
8263 case 2: /* fneg[sd]. */
8264 case 8: /* fcmp[sd]. */
8265 case 9: /* fcmpe[sd]. */
8266 case 10: /* fcmpz[sd]. */
8267 case 11: /* fcmpez[sd]. */
8268 case 16: /* fuito[sd]. */
8269 case 17: /* fsito[sd]. */
8270 case 24: /* ftoui[sd]. */
8271 case 25: /* ftouiz[sd]. */
8272 case 26: /* ftosi[sd]. */
8273 case 27: /* ftosiz[sd]. */
8274 /* These instructions will not bounce due to underflow. */
8279 case 3: /* fsqrt[sd]. */
8280 /* fsqrt cannot underflow, but it can (perhaps) overwrite
8281 registers to cause the erratum in previous instructions. */
8282 bfd_arm_vfp11_write_mask (destmask
, fd
);
8286 case 15: /* fcvt{ds,sd}. */
8290 bfd_arm_vfp11_write_mask (destmask
, fd
);
8292 /* Only FCVTSD can underflow. */
8293 if ((insn
& 0x100) != 0)
8312 /* Two-register transfer. */
8313 else if ((insn
& 0x0fe00ed0) == 0x0c400a10)
8315 unsigned int fm
= bfd_arm_vfp11_regno (insn
, is_double
, 0, 5);
8317 if ((insn
& 0x100000) == 0)
8320 bfd_arm_vfp11_write_mask (destmask
, fm
);
8323 bfd_arm_vfp11_write_mask (destmask
, fm
);
8324 bfd_arm_vfp11_write_mask (destmask
, fm
+ 1);
8330 else if ((insn
& 0x0e100e00) == 0x0c100a00) /* A load insn. */
8332 int fd
= bfd_arm_vfp11_regno (insn
, is_double
, 12, 22);
8333 unsigned int puw
= ((insn
>> 21) & 0x1) | (((insn
>> 23) & 3) << 1);
8337 case 0: /* Two-reg transfer. We should catch these above. */
8340 case 2: /* fldm[sdx]. */
8344 unsigned int i
, offset
= insn
& 0xff;
8349 for (i
= fd
; i
< fd
+ offset
; i
++)
8350 bfd_arm_vfp11_write_mask (destmask
, i
);
8354 case 4: /* fld[sd]. */
8356 bfd_arm_vfp11_write_mask (destmask
, fd
);
8365 /* Single-register transfer. Note L==0. */
8366 else if ((insn
& 0x0f100e10) == 0x0e000a10)
8368 unsigned int opcode
= (insn
>> 21) & 7;
8369 unsigned int fn
= bfd_arm_vfp11_regno (insn
, is_double
, 16, 7);
8373 case 0: /* fmsr/fmdlr. */
8374 case 1: /* fmdhr. */
8375 /* Mark fmdhr and fmdlr as writing to the whole of the DP
8376 destination register. I don't know if this is exactly right,
8377 but it is the conservative choice. */
8378 bfd_arm_vfp11_write_mask (destmask
, fn
);
8392 static int elf32_arm_compare_mapping (const void * a
, const void * b
);
8395 /* Look for potentially-troublesome code sequences which might trigger the
8396 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
8397 (available from ARM) for details of the erratum. A short version is
8398 described in ld.texinfo. */
8401 bfd_elf32_arm_vfp11_erratum_scan (bfd
*abfd
, struct bfd_link_info
*link_info
)
8404 bfd_byte
*contents
= NULL
;
8406 int regs
[3], numregs
= 0;
8407 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
8408 int use_vector
= (globals
->vfp11_fix
== BFD_ARM_VFP11_FIX_VECTOR
);
8410 if (globals
== NULL
)
8413 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
8414 The states transition as follows:
8416 0 -> 1 (vector) or 0 -> 2 (scalar)
8417 A VFP FMAC-pipeline instruction has been seen. Fill
8418 regs[0]..regs[numregs-1] with its input operands. Remember this
8419 instruction in 'first_fmac'.
8422 Any instruction, except for a VFP instruction which overwrites
8427 A VFP instruction has been seen which overwrites any of regs[*].
8428 We must make a veneer! Reset state to 0 before examining next
8432 If we fail to match anything in state 2, reset to state 0 and reset
8433 the instruction pointer to the instruction after 'first_fmac'.
8435 If the VFP11 vector mode is in use, there must be at least two unrelated
8436 instructions between anti-dependent VFP11 instructions to properly avoid
8437 triggering the erratum, hence the use of the extra state 1. */
8439 /* If we are only performing a partial link do not bother
8440 to construct any glue. */
8441 if (bfd_link_relocatable (link_info
))
8444 /* Skip if this bfd does not correspond to an ELF image. */
8445 if (! is_arm_elf (abfd
))
8448 /* We should have chosen a fix type by the time we get here. */
8449 BFD_ASSERT (globals
->vfp11_fix
!= BFD_ARM_VFP11_FIX_DEFAULT
);
8451 if (globals
->vfp11_fix
== BFD_ARM_VFP11_FIX_NONE
)
8454 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8455 if ((abfd
->flags
& (EXEC_P
| DYNAMIC
)) != 0)
8458 for (sec
= abfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
8460 unsigned int i
, span
, first_fmac
= 0, veneer_of_insn
= 0;
8461 struct _arm_elf_section_data
*sec_data
;
8463 /* If we don't have executable progbits, we're not interested in this
8464 section. Also skip if section is to be excluded. */
8465 if (elf_section_type (sec
) != SHT_PROGBITS
8466 || (elf_section_flags (sec
) & SHF_EXECINSTR
) == 0
8467 || (sec
->flags
& SEC_EXCLUDE
) != 0
8468 || sec
->sec_info_type
== SEC_INFO_TYPE_JUST_SYMS
8469 || sec
->output_section
== bfd_abs_section_ptr
8470 || strcmp (sec
->name
, VFP11_ERRATUM_VENEER_SECTION_NAME
) == 0)
8473 sec_data
= elf32_arm_section_data (sec
);
8475 if (sec_data
->mapcount
== 0)
8478 if (elf_section_data (sec
)->this_hdr
.contents
!= NULL
)
8479 contents
= elf_section_data (sec
)->this_hdr
.contents
;
8480 else if (! bfd_malloc_and_get_section (abfd
, sec
, &contents
))
8483 qsort (sec_data
->map
, sec_data
->mapcount
, sizeof (elf32_arm_section_map
),
8484 elf32_arm_compare_mapping
);
8486 for (span
= 0; span
< sec_data
->mapcount
; span
++)
8488 unsigned int span_start
= sec_data
->map
[span
].vma
;
8489 unsigned int span_end
= (span
== sec_data
->mapcount
- 1)
8490 ? sec
->size
: sec_data
->map
[span
+ 1].vma
;
8491 char span_type
= sec_data
->map
[span
].type
;
8493 /* FIXME: Only ARM mode is supported at present. We may need to
8494 support Thumb-2 mode also at some point. */
8495 if (span_type
!= 'a')
8498 for (i
= span_start
; i
< span_end
;)
8500 unsigned int next_i
= i
+ 4;
8501 unsigned int insn
= bfd_big_endian (abfd
)
8502 ? (((unsigned) contents
[i
] << 24)
8503 | (contents
[i
+ 1] << 16)
8504 | (contents
[i
+ 2] << 8)
8506 : (((unsigned) contents
[i
+ 3] << 24)
8507 | (contents
[i
+ 2] << 16)
8508 | (contents
[i
+ 1] << 8)
8510 unsigned int writemask
= 0;
8511 enum bfd_arm_vfp11_pipe vpipe
;
8516 vpipe
= bfd_arm_vfp11_insn_decode (insn
, &writemask
, regs
,
8518 /* I'm assuming the VFP11 erratum can trigger with denorm
8519 operands on either the FMAC or the DS pipeline. This might
8520 lead to slightly overenthusiastic veneer insertion. */
8521 if (vpipe
== VFP11_FMAC
|| vpipe
== VFP11_DS
)
8523 state
= use_vector
? 1 : 2;
8525 veneer_of_insn
= insn
;
8531 int other_regs
[3], other_numregs
;
8532 vpipe
= bfd_arm_vfp11_insn_decode (insn
, &writemask
,
8535 if (vpipe
!= VFP11_BAD
8536 && bfd_arm_vfp11_antidependency (writemask
, regs
,
8546 int other_regs
[3], other_numregs
;
8547 vpipe
= bfd_arm_vfp11_insn_decode (insn
, &writemask
,
8550 if (vpipe
!= VFP11_BAD
8551 && bfd_arm_vfp11_antidependency (writemask
, regs
,
8557 next_i
= first_fmac
+ 4;
8563 abort (); /* Should be unreachable. */
8568 elf32_vfp11_erratum_list
*newerr
=(elf32_vfp11_erratum_list
*)
8569 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list
));
8571 elf32_arm_section_data (sec
)->erratumcount
+= 1;
8573 newerr
->u
.b
.vfp_insn
= veneer_of_insn
;
8578 newerr
->type
= VFP11_ERRATUM_BRANCH_TO_ARM_VENEER
;
8585 record_vfp11_erratum_veneer (link_info
, newerr
, abfd
, sec
,
8590 newerr
->next
= sec_data
->erratumlist
;
8591 sec_data
->erratumlist
= newerr
;
8600 if (elf_section_data (sec
)->this_hdr
.contents
!= contents
)
8608 if (elf_section_data (sec
)->this_hdr
.contents
!= contents
)
8614 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
8615 after sections have been laid out, using specially-named symbols. */
8618 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd
*abfd
,
8619 struct bfd_link_info
*link_info
)
8622 struct elf32_arm_link_hash_table
*globals
;
8625 if (bfd_link_relocatable (link_info
))
8628 /* Skip if this bfd does not correspond to an ELF image. */
8629 if (! is_arm_elf (abfd
))
8632 globals
= elf32_arm_hash_table (link_info
);
8633 if (globals
== NULL
)
8636 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen
8637 (VFP11_ERRATUM_VENEER_ENTRY_NAME
) + 10);
8638 BFD_ASSERT (tmp_name
);
8640 for (sec
= abfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
8642 struct _arm_elf_section_data
*sec_data
= elf32_arm_section_data (sec
);
8643 elf32_vfp11_erratum_list
*errnode
= sec_data
->erratumlist
;
8645 for (; errnode
!= NULL
; errnode
= errnode
->next
)
8647 struct elf_link_hash_entry
*myh
;
8650 switch (errnode
->type
)
8652 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER
:
8653 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER
:
8654 /* Find veneer symbol. */
8655 sprintf (tmp_name
, VFP11_ERRATUM_VENEER_ENTRY_NAME
,
8656 errnode
->u
.b
.veneer
->u
.v
.id
);
8658 myh
= elf_link_hash_lookup
8659 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
8662 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8663 abfd
, "VFP11", tmp_name
);
8665 vma
= myh
->root
.u
.def
.section
->output_section
->vma
8666 + myh
->root
.u
.def
.section
->output_offset
8667 + myh
->root
.u
.def
.value
;
8669 errnode
->u
.b
.veneer
->vma
= vma
;
8672 case VFP11_ERRATUM_ARM_VENEER
:
8673 case VFP11_ERRATUM_THUMB_VENEER
:
8674 /* Find return location. */
8675 sprintf (tmp_name
, VFP11_ERRATUM_VENEER_ENTRY_NAME
"_r",
8678 myh
= elf_link_hash_lookup
8679 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
8682 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8683 abfd
, "VFP11", tmp_name
);
8685 vma
= myh
->root
.u
.def
.section
->output_section
->vma
8686 + myh
->root
.u
.def
.section
->output_offset
8687 + myh
->root
.u
.def
.value
;
8689 errnode
->u
.v
.branch
->vma
= vma
;
8701 /* Find virtual-memory addresses for STM32L4XX erratum veneers and
8702 return locations after sections have been laid out, using
8703 specially-named symbols. */
8706 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd
*abfd
,
8707 struct bfd_link_info
*link_info
)
8710 struct elf32_arm_link_hash_table
*globals
;
8713 if (bfd_link_relocatable (link_info
))
8716 /* Skip if this bfd does not correspond to an ELF image. */
8717 if (! is_arm_elf (abfd
))
8720 globals
= elf32_arm_hash_table (link_info
);
8721 if (globals
== NULL
)
8724 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen
8725 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
) + 10);
8726 BFD_ASSERT (tmp_name
);
8728 for (sec
= abfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
8730 struct _arm_elf_section_data
*sec_data
= elf32_arm_section_data (sec
);
8731 elf32_stm32l4xx_erratum_list
*errnode
= sec_data
->stm32l4xx_erratumlist
;
8733 for (; errnode
!= NULL
; errnode
= errnode
->next
)
8735 struct elf_link_hash_entry
*myh
;
8738 switch (errnode
->type
)
8740 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER
:
8741 /* Find veneer symbol. */
8742 sprintf (tmp_name
, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
,
8743 errnode
->u
.b
.veneer
->u
.v
.id
);
8745 myh
= elf_link_hash_lookup
8746 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
8749 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8750 abfd
, "STM32L4XX", tmp_name
);
8752 vma
= myh
->root
.u
.def
.section
->output_section
->vma
8753 + myh
->root
.u
.def
.section
->output_offset
8754 + myh
->root
.u
.def
.value
;
8756 errnode
->u
.b
.veneer
->vma
= vma
;
8759 case STM32L4XX_ERRATUM_VENEER
:
8760 /* Find return location. */
8761 sprintf (tmp_name
, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
"_r",
8764 myh
= elf_link_hash_lookup
8765 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
8768 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8769 abfd
, "STM32L4XX", tmp_name
);
8771 vma
= myh
->root
.u
.def
.section
->output_section
->vma
8772 + myh
->root
.u
.def
.section
->output_offset
8773 + myh
->root
.u
.def
.value
;
8775 errnode
->u
.v
.branch
->vma
= vma
;
8787 static inline bfd_boolean
8788 is_thumb2_ldmia (const insn32 insn
)
8790 /* Encoding T2: LDM<c>.W <Rn>{!},<registers>
8791 1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll. */
8792 return (insn
& 0xffd02000) == 0xe8900000;
8795 static inline bfd_boolean
8796 is_thumb2_ldmdb (const insn32 insn
)
8798 /* Encoding T1: LDMDB<c> <Rn>{!},<registers>
8799 1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll. */
8800 return (insn
& 0xffd02000) == 0xe9100000;
8803 static inline bfd_boolean
8804 is_thumb2_vldm (const insn32 insn
)
8806 /* A6.5 Extension register load or store instruction
8808 We look for SP 32-bit and DP 64-bit registers.
8809 Encoding T1 VLDM{mode}<c> <Rn>{!}, <list>
8810 <list> is consecutive 64-bit registers
8811 1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii
8812 Encoding T2 VLDM{mode}<c> <Rn>{!}, <list>
8813 <list> is consecutive 32-bit registers
8814 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii
8815 if P==0 && U==1 && W==1 && Rn=1101 VPOP
8816 if PUW=010 || PUW=011 || PUW=101 VLDM. */
8818 (((insn
& 0xfe100f00) == 0xec100b00) ||
8819 ((insn
& 0xfe100f00) == 0xec100a00))
8820 && /* (IA without !). */
8821 (((((insn
<< 7) >> 28) & 0xd) == 0x4)
8822 /* (IA with !), includes VPOP (when reg number is SP). */
8823 || ((((insn
<< 7) >> 28) & 0xd) == 0x5)
8825 || ((((insn
<< 7) >> 28) & 0xd) == 0x9));
8828 /* STM STM32L4XX erratum : This function assumes that it receives an LDM or
8830 - computes the number and the mode of memory accesses
8831 - decides if the replacement should be done:
8832 . replaces only if > 8-word accesses
8833 . or (testing purposes only) replaces all accesses. */
8836 stm32l4xx_need_create_replacing_stub (const insn32 insn
,
8837 bfd_arm_stm32l4xx_fix stm32l4xx_fix
)
8841 /* The field encoding the register list is the same for both LDMIA
8842 and LDMDB encodings. */
8843 if (is_thumb2_ldmia (insn
) || is_thumb2_ldmdb (insn
))
8844 nb_words
= elf32_arm_popcount (insn
& 0x0000ffff);
8845 else if (is_thumb2_vldm (insn
))
8846 nb_words
= (insn
& 0xff);
8848 /* DEFAULT mode accounts for the real bug condition situation,
8849 ALL mode inserts stubs for each LDM/VLDM instruction (testing). */
8851 (stm32l4xx_fix
== BFD_ARM_STM32L4XX_FIX_DEFAULT
) ? nb_words
> 8 :
8852 (stm32l4xx_fix
== BFD_ARM_STM32L4XX_FIX_ALL
) ? TRUE
: FALSE
;
8855 /* Look for potentially-troublesome code sequences which might trigger
8856 the STM STM32L4XX erratum. */
8859 bfd_elf32_arm_stm32l4xx_erratum_scan (bfd
*abfd
,
8860 struct bfd_link_info
*link_info
)
8863 bfd_byte
*contents
= NULL
;
8864 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
8866 if (globals
== NULL
)
8869 /* If we are only performing a partial link do not bother
8870 to construct any glue. */
8871 if (bfd_link_relocatable (link_info
))
8874 /* Skip if this bfd does not correspond to an ELF image. */
8875 if (! is_arm_elf (abfd
))
8878 if (globals
->stm32l4xx_fix
== BFD_ARM_STM32L4XX_FIX_NONE
)
8881 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8882 if ((abfd
->flags
& (EXEC_P
| DYNAMIC
)) != 0)
8885 for (sec
= abfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
8887 unsigned int i
, span
;
8888 struct _arm_elf_section_data
*sec_data
;
8890 /* If we don't have executable progbits, we're not interested in this
8891 section. Also skip if section is to be excluded. */
8892 if (elf_section_type (sec
) != SHT_PROGBITS
8893 || (elf_section_flags (sec
) & SHF_EXECINSTR
) == 0
8894 || (sec
->flags
& SEC_EXCLUDE
) != 0
8895 || sec
->sec_info_type
== SEC_INFO_TYPE_JUST_SYMS
8896 || sec
->output_section
== bfd_abs_section_ptr
8897 || strcmp (sec
->name
, STM32L4XX_ERRATUM_VENEER_SECTION_NAME
) == 0)
8900 sec_data
= elf32_arm_section_data (sec
);
8902 if (sec_data
->mapcount
== 0)
8905 if (elf_section_data (sec
)->this_hdr
.contents
!= NULL
)
8906 contents
= elf_section_data (sec
)->this_hdr
.contents
;
8907 else if (! bfd_malloc_and_get_section (abfd
, sec
, &contents
))
8910 qsort (sec_data
->map
, sec_data
->mapcount
, sizeof (elf32_arm_section_map
),
8911 elf32_arm_compare_mapping
);
8913 for (span
= 0; span
< sec_data
->mapcount
; span
++)
8915 unsigned int span_start
= sec_data
->map
[span
].vma
;
8916 unsigned int span_end
= (span
== sec_data
->mapcount
- 1)
8917 ? sec
->size
: sec_data
->map
[span
+ 1].vma
;
8918 char span_type
= sec_data
->map
[span
].type
;
8919 int itblock_current_pos
= 0;
8921 /* Only Thumb2 mode need be supported with this CM4 specific
8922 code, we should not encounter any arm mode eg span_type
8924 if (span_type
!= 't')
8927 for (i
= span_start
; i
< span_end
;)
8929 unsigned int insn
= bfd_get_16 (abfd
, &contents
[i
]);
8930 bfd_boolean insn_32bit
= FALSE
;
8931 bfd_boolean is_ldm
= FALSE
;
8932 bfd_boolean is_vldm
= FALSE
;
8933 bfd_boolean is_not_last_in_it_block
= FALSE
;
8935 /* The first 16-bits of all 32-bit thumb2 instructions start
8936 with opcode[15..13]=0b111 and the encoded op1 can be anything
8937 except opcode[12..11]!=0b00.
8938 See 32-bit Thumb instruction encoding. */
8939 if ((insn
& 0xe000) == 0xe000 && (insn
& 0x1800) != 0x0000)
8942 /* Compute the predicate that tells if the instruction
8943 is concerned by the IT block
8944 - Creates an error if there is a ldm that is not
8945 last in the IT block thus cannot be replaced
8946 - Otherwise we can create a branch at the end of the
8947 IT block, it will be controlled naturally by IT
8948 with the proper pseudo-predicate
8949 - So the only interesting predicate is the one that
8950 tells that we are not on the last item of an IT
8952 if (itblock_current_pos
!= 0)
8953 is_not_last_in_it_block
= !!--itblock_current_pos
;
8957 /* Load the rest of the insn (in manual-friendly order). */
8958 insn
= (insn
<< 16) | bfd_get_16 (abfd
, &contents
[i
+ 2]);
8959 is_ldm
= is_thumb2_ldmia (insn
) || is_thumb2_ldmdb (insn
);
8960 is_vldm
= is_thumb2_vldm (insn
);
8962 /* Veneers are created for (v)ldm depending on
8963 option flags and memory accesses conditions; but
8964 if the instruction is not the last instruction of
8965 an IT block, we cannot create a jump there, so we
8967 if ((is_ldm
|| is_vldm
)
8968 && stm32l4xx_need_create_replacing_stub
8969 (insn
, globals
->stm32l4xx_fix
))
8971 if (is_not_last_in_it_block
)
8974 /* xgettext:c-format */
8975 (_("%pB(%pA+%#x): error: multiple load detected"
8976 " in non-last IT block instruction:"
8977 " STM32L4XX veneer cannot be generated; "
8978 "use gcc option -mrestrict-it to generate"
8979 " only one instruction per IT block"),
8984 elf32_stm32l4xx_erratum_list
*newerr
=
8985 (elf32_stm32l4xx_erratum_list
*)
8987 (sizeof (elf32_stm32l4xx_erratum_list
));
8989 elf32_arm_section_data (sec
)
8990 ->stm32l4xx_erratumcount
+= 1;
8991 newerr
->u
.b
.insn
= insn
;
8992 /* We create only thumb branches. */
8994 STM32L4XX_ERRATUM_BRANCH_TO_VENEER
;
8995 record_stm32l4xx_erratum_veneer
8996 (link_info
, newerr
, abfd
, sec
,
8999 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
:
9000 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE
);
9002 newerr
->next
= sec_data
->stm32l4xx_erratumlist
;
9003 sec_data
->stm32l4xx_erratumlist
= newerr
;
9010 IT blocks are only encoded in T1
9011 Encoding T1: IT{x{y{z}}} <firstcond>
9012 1 0 1 1 - 1 1 1 1 - firstcond - mask
9013 if mask = '0000' then see 'related encodings'
9014 We don't deal with UNPREDICTABLE, just ignore these.
9015 There can be no nested IT blocks so an IT block
9016 is naturally a new one for which it is worth
9017 computing its size. */
9018 bfd_boolean is_newitblock
= ((insn
& 0xff00) == 0xbf00)
9019 && ((insn
& 0x000f) != 0x0000);
9020 /* If we have a new IT block we compute its size. */
9023 /* Compute the number of instructions controlled
9024 by the IT block, it will be used to decide
9025 whether we are inside an IT block or not. */
9026 unsigned int mask
= insn
& 0x000f;
9027 itblock_current_pos
= 4 - ctz (mask
);
9031 i
+= insn_32bit
? 4 : 2;
9035 if (elf_section_data (sec
)->this_hdr
.contents
!= contents
)
9043 if (elf_section_data (sec
)->this_hdr
.contents
!= contents
)
9049 /* Set target relocation values needed during linking. */
9052 bfd_elf32_arm_set_target_params (struct bfd
*output_bfd
,
9053 struct bfd_link_info
*link_info
,
9054 struct elf32_arm_params
*params
)
9056 struct elf32_arm_link_hash_table
*globals
;
9058 globals
= elf32_arm_hash_table (link_info
);
9059 if (globals
== NULL
)
9062 globals
->target1_is_rel
= params
->target1_is_rel
;
9063 if (globals
->fdpic_p
)
9064 globals
->target2_reloc
= R_ARM_GOT32
;
9065 else if (strcmp (params
->target2_type
, "rel") == 0)
9066 globals
->target2_reloc
= R_ARM_REL32
;
9067 else if (strcmp (params
->target2_type
, "abs") == 0)
9068 globals
->target2_reloc
= R_ARM_ABS32
;
9069 else if (strcmp (params
->target2_type
, "got-rel") == 0)
9070 globals
->target2_reloc
= R_ARM_GOT_PREL
;
9073 _bfd_error_handler (_("invalid TARGET2 relocation type '%s'"),
9074 params
->target2_type
);
9076 globals
->fix_v4bx
= params
->fix_v4bx
;
9077 globals
->use_blx
|= params
->use_blx
;
9078 globals
->vfp11_fix
= params
->vfp11_denorm_fix
;
9079 globals
->stm32l4xx_fix
= params
->stm32l4xx_fix
;
9080 if (globals
->fdpic_p
)
9081 globals
->pic_veneer
= 1;
9083 globals
->pic_veneer
= params
->pic_veneer
;
9084 globals
->fix_cortex_a8
= params
->fix_cortex_a8
;
9085 globals
->fix_arm1176
= params
->fix_arm1176
;
9086 globals
->cmse_implib
= params
->cmse_implib
;
9087 globals
->in_implib_bfd
= params
->in_implib_bfd
;
9089 BFD_ASSERT (is_arm_elf (output_bfd
));
9090 elf_arm_tdata (output_bfd
)->no_enum_size_warning
9091 = params
->no_enum_size_warning
;
9092 elf_arm_tdata (output_bfd
)->no_wchar_size_warning
9093 = params
->no_wchar_size_warning
;
9096 /* Replace the target offset of a Thumb bl or b.w instruction. */
9099 insert_thumb_branch (bfd
*abfd
, long int offset
, bfd_byte
*insn
)
9105 BFD_ASSERT ((offset
& 1) == 0);
9107 upper
= bfd_get_16 (abfd
, insn
);
9108 lower
= bfd_get_16 (abfd
, insn
+ 2);
9109 reloc_sign
= (offset
< 0) ? 1 : 0;
9110 upper
= (upper
& ~(bfd_vma
) 0x7ff)
9111 | ((offset
>> 12) & 0x3ff)
9112 | (reloc_sign
<< 10);
9113 lower
= (lower
& ~(bfd_vma
) 0x2fff)
9114 | (((!((offset
>> 23) & 1)) ^ reloc_sign
) << 13)
9115 | (((!((offset
>> 22) & 1)) ^ reloc_sign
) << 11)
9116 | ((offset
>> 1) & 0x7ff);
9117 bfd_put_16 (abfd
, upper
, insn
);
9118 bfd_put_16 (abfd
, lower
, insn
+ 2);
9121 /* Thumb code calling an ARM function. */
9124 elf32_thumb_to_arm_stub (struct bfd_link_info
* info
,
9128 asection
* input_section
,
9129 bfd_byte
* hit_data
,
9132 bfd_signed_vma addend
,
9134 char **error_message
)
9138 long int ret_offset
;
9139 struct elf_link_hash_entry
* myh
;
9140 struct elf32_arm_link_hash_table
* globals
;
9142 myh
= find_thumb_glue (info
, name
, error_message
);
9146 globals
= elf32_arm_hash_table (info
);
9147 BFD_ASSERT (globals
!= NULL
);
9148 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
9150 my_offset
= myh
->root
.u
.def
.value
;
9152 s
= bfd_get_linker_section (globals
->bfd_of_glue_owner
,
9153 THUMB2ARM_GLUE_SECTION_NAME
);
9155 BFD_ASSERT (s
!= NULL
);
9156 BFD_ASSERT (s
->contents
!= NULL
);
9157 BFD_ASSERT (s
->output_section
!= NULL
);
9159 if ((my_offset
& 0x01) == 0x01)
9162 && sym_sec
->owner
!= NULL
9163 && !INTERWORK_FLAG (sym_sec
->owner
))
9166 (_("%pB(%s): warning: interworking not enabled;"
9167 " first occurrence: %pB: %s call to %s"),
9168 sym_sec
->owner
, name
, input_bfd
, "Thumb", "ARM");
9174 myh
->root
.u
.def
.value
= my_offset
;
9176 put_thumb_insn (globals
, output_bfd
, (bfd_vma
) t2a1_bx_pc_insn
,
9177 s
->contents
+ my_offset
);
9179 put_thumb_insn (globals
, output_bfd
, (bfd_vma
) t2a2_noop_insn
,
9180 s
->contents
+ my_offset
+ 2);
9183 /* Address of destination of the stub. */
9184 ((bfd_signed_vma
) val
)
9186 /* Offset from the start of the current section
9187 to the start of the stubs. */
9189 /* Offset of the start of this stub from the start of the stubs. */
9191 /* Address of the start of the current section. */
9192 + s
->output_section
->vma
)
9193 /* The branch instruction is 4 bytes into the stub. */
9195 /* ARM branches work from the pc of the instruction + 8. */
9198 put_arm_insn (globals
, output_bfd
,
9199 (bfd_vma
) t2a3_b_insn
| ((ret_offset
>> 2) & 0x00FFFFFF),
9200 s
->contents
+ my_offset
+ 4);
9203 BFD_ASSERT (my_offset
<= globals
->thumb_glue_size
);
9205 /* Now go back and fix up the original BL insn to point to here. */
9207 /* Address of where the stub is located. */
9208 (s
->output_section
->vma
+ s
->output_offset
+ my_offset
)
9209 /* Address of where the BL is located. */
9210 - (input_section
->output_section
->vma
+ input_section
->output_offset
9212 /* Addend in the relocation. */
9214 /* Biassing for PC-relative addressing. */
9217 insert_thumb_branch (input_bfd
, ret_offset
, hit_data
- input_section
->vma
);
9222 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
9224 static struct elf_link_hash_entry
*
9225 elf32_arm_create_thumb_stub (struct bfd_link_info
* info
,
9232 char ** error_message
)
9235 long int ret_offset
;
9236 struct elf_link_hash_entry
* myh
;
9237 struct elf32_arm_link_hash_table
* globals
;
9239 myh
= find_arm_glue (info
, name
, error_message
);
9243 globals
= elf32_arm_hash_table (info
);
9244 BFD_ASSERT (globals
!= NULL
);
9245 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
9247 my_offset
= myh
->root
.u
.def
.value
;
9249 if ((my_offset
& 0x01) == 0x01)
9252 && sym_sec
->owner
!= NULL
9253 && !INTERWORK_FLAG (sym_sec
->owner
))
9256 (_("%pB(%s): warning: interworking not enabled;"
9257 " first occurrence: %pB: %s call to %s"),
9258 sym_sec
->owner
, name
, input_bfd
, "ARM", "Thumb");
9262 myh
->root
.u
.def
.value
= my_offset
;
9264 if (bfd_link_pic (info
)
9265 || globals
->root
.is_relocatable_executable
9266 || globals
->pic_veneer
)
9268 /* For relocatable objects we can't use absolute addresses,
9269 so construct the address from a relative offset. */
9270 /* TODO: If the offset is small it's probably worth
9271 constructing the address with adds. */
9272 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t1p_ldr_insn
,
9273 s
->contents
+ my_offset
);
9274 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t2p_add_pc_insn
,
9275 s
->contents
+ my_offset
+ 4);
9276 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t3p_bx_r12_insn
,
9277 s
->contents
+ my_offset
+ 8);
9278 /* Adjust the offset by 4 for the position of the add,
9279 and 8 for the pipeline offset. */
9280 ret_offset
= (val
- (s
->output_offset
9281 + s
->output_section
->vma
9284 bfd_put_32 (output_bfd
, ret_offset
,
9285 s
->contents
+ my_offset
+ 12);
9287 else if (globals
->use_blx
)
9289 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t1v5_ldr_insn
,
9290 s
->contents
+ my_offset
);
9292 /* It's a thumb address. Add the low order bit. */
9293 bfd_put_32 (output_bfd
, val
| a2t2v5_func_addr_insn
,
9294 s
->contents
+ my_offset
+ 4);
9298 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t1_ldr_insn
,
9299 s
->contents
+ my_offset
);
9301 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t2_bx_r12_insn
,
9302 s
->contents
+ my_offset
+ 4);
9304 /* It's a thumb address. Add the low order bit. */
9305 bfd_put_32 (output_bfd
, val
| a2t3_func_addr_insn
,
9306 s
->contents
+ my_offset
+ 8);
9312 BFD_ASSERT (my_offset
<= globals
->arm_glue_size
);
9317 /* Arm code calling a Thumb function. */
9320 elf32_arm_to_thumb_stub (struct bfd_link_info
* info
,
9324 asection
* input_section
,
9325 bfd_byte
* hit_data
,
9328 bfd_signed_vma addend
,
9330 char **error_message
)
9332 unsigned long int tmp
;
9335 long int ret_offset
;
9336 struct elf_link_hash_entry
* myh
;
9337 struct elf32_arm_link_hash_table
* globals
;
9339 globals
= elf32_arm_hash_table (info
);
9340 BFD_ASSERT (globals
!= NULL
);
9341 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
9343 s
= bfd_get_linker_section (globals
->bfd_of_glue_owner
,
9344 ARM2THUMB_GLUE_SECTION_NAME
);
9345 BFD_ASSERT (s
!= NULL
);
9346 BFD_ASSERT (s
->contents
!= NULL
);
9347 BFD_ASSERT (s
->output_section
!= NULL
);
9349 myh
= elf32_arm_create_thumb_stub (info
, name
, input_bfd
, output_bfd
,
9350 sym_sec
, val
, s
, error_message
);
9354 my_offset
= myh
->root
.u
.def
.value
;
9355 tmp
= bfd_get_32 (input_bfd
, hit_data
);
9356 tmp
= tmp
& 0xFF000000;
9358 /* Somehow these are both 4 too far, so subtract 8. */
9359 ret_offset
= (s
->output_offset
9361 + s
->output_section
->vma
9362 - (input_section
->output_offset
9363 + input_section
->output_section
->vma
9367 tmp
= tmp
| ((ret_offset
>> 2) & 0x00FFFFFF);
9369 bfd_put_32 (output_bfd
, (bfd_vma
) tmp
, hit_data
- input_section
->vma
);
9374 /* Populate Arm stub for an exported Thumb function. */
9377 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry
*h
, void * inf
)
9379 struct bfd_link_info
* info
= (struct bfd_link_info
*) inf
;
9381 struct elf_link_hash_entry
* myh
;
9382 struct elf32_arm_link_hash_entry
*eh
;
9383 struct elf32_arm_link_hash_table
* globals
;
9386 char *error_message
;
9388 eh
= elf32_arm_hash_entry (h
);
9389 /* Allocate stubs for exported Thumb functions on v4t. */
9390 if (eh
->export_glue
== NULL
)
9393 globals
= elf32_arm_hash_table (info
);
9394 BFD_ASSERT (globals
!= NULL
);
9395 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
9397 s
= bfd_get_linker_section (globals
->bfd_of_glue_owner
,
9398 ARM2THUMB_GLUE_SECTION_NAME
);
9399 BFD_ASSERT (s
!= NULL
);
9400 BFD_ASSERT (s
->contents
!= NULL
);
9401 BFD_ASSERT (s
->output_section
!= NULL
);
9403 sec
= eh
->export_glue
->root
.u
.def
.section
;
9405 BFD_ASSERT (sec
->output_section
!= NULL
);
9407 val
= eh
->export_glue
->root
.u
.def
.value
+ sec
->output_offset
9408 + sec
->output_section
->vma
;
9410 myh
= elf32_arm_create_thumb_stub (info
, h
->root
.root
.string
,
9411 h
->root
.u
.def
.section
->owner
,
9412 globals
->obfd
, sec
, val
, s
,
9418 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
9421 elf32_arm_bx_glue (struct bfd_link_info
* info
, int reg
)
9426 struct elf32_arm_link_hash_table
*globals
;
9428 globals
= elf32_arm_hash_table (info
);
9429 BFD_ASSERT (globals
!= NULL
);
9430 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
9432 s
= bfd_get_linker_section (globals
->bfd_of_glue_owner
,
9433 ARM_BX_GLUE_SECTION_NAME
);
9434 BFD_ASSERT (s
!= NULL
);
9435 BFD_ASSERT (s
->contents
!= NULL
);
9436 BFD_ASSERT (s
->output_section
!= NULL
);
9438 BFD_ASSERT (globals
->bx_glue_offset
[reg
] & 2);
9440 glue_addr
= globals
->bx_glue_offset
[reg
] & ~(bfd_vma
)3;
9442 if ((globals
->bx_glue_offset
[reg
] & 1) == 0)
9444 p
= s
->contents
+ glue_addr
;
9445 bfd_put_32 (globals
->obfd
, armbx1_tst_insn
+ (reg
<< 16), p
);
9446 bfd_put_32 (globals
->obfd
, armbx2_moveq_insn
+ reg
, p
+ 4);
9447 bfd_put_32 (globals
->obfd
, armbx3_bx_insn
+ reg
, p
+ 8);
9448 globals
->bx_glue_offset
[reg
] |= 1;
9451 return glue_addr
+ s
->output_section
->vma
+ s
->output_offset
;
9454 /* Generate Arm stubs for exported Thumb symbols. */
9456 elf32_arm_begin_write_processing (bfd
*abfd ATTRIBUTE_UNUSED
,
9457 struct bfd_link_info
*link_info
)
9459 struct elf32_arm_link_hash_table
* globals
;
9461 if (link_info
== NULL
)
9462 /* Ignore this if we are not called by the ELF backend linker. */
9465 globals
= elf32_arm_hash_table (link_info
);
9466 if (globals
== NULL
)
9469 /* If blx is available then exported Thumb symbols are OK and there is
9471 if (globals
->use_blx
)
9474 elf_link_hash_traverse (&globals
->root
, elf32_arm_to_thumb_export_stub
,
9478 /* Reserve space for COUNT dynamic relocations in relocation selection
9482 elf32_arm_allocate_dynrelocs (struct bfd_link_info
*info
, asection
*sreloc
,
9483 bfd_size_type count
)
9485 struct elf32_arm_link_hash_table
*htab
;
9487 htab
= elf32_arm_hash_table (info
);
9488 BFD_ASSERT (htab
->root
.dynamic_sections_created
);
9491 sreloc
->size
+= RELOC_SIZE (htab
) * count
;
9494 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
9495 dynamic, the relocations should go in SRELOC, otherwise they should
9496 go in the special .rel.iplt section. */
9499 elf32_arm_allocate_irelocs (struct bfd_link_info
*info
, asection
*sreloc
,
9500 bfd_size_type count
)
9502 struct elf32_arm_link_hash_table
*htab
;
9504 htab
= elf32_arm_hash_table (info
);
9505 if (!htab
->root
.dynamic_sections_created
)
9506 htab
->root
.irelplt
->size
+= RELOC_SIZE (htab
) * count
;
9509 BFD_ASSERT (sreloc
!= NULL
);
9510 sreloc
->size
+= RELOC_SIZE (htab
) * count
;
9514 /* Add relocation REL to the end of relocation section SRELOC. */
9517 elf32_arm_add_dynreloc (bfd
*output_bfd
, struct bfd_link_info
*info
,
9518 asection
*sreloc
, Elf_Internal_Rela
*rel
)
9521 struct elf32_arm_link_hash_table
*htab
;
9523 htab
= elf32_arm_hash_table (info
);
9524 if (!htab
->root
.dynamic_sections_created
9525 && ELF32_R_TYPE (rel
->r_info
) == R_ARM_IRELATIVE
)
9526 sreloc
= htab
->root
.irelplt
;
9529 loc
= sreloc
->contents
;
9530 loc
+= sreloc
->reloc_count
++ * RELOC_SIZE (htab
);
9531 if (sreloc
->reloc_count
* RELOC_SIZE (htab
) > sreloc
->size
)
9533 SWAP_RELOC_OUT (htab
) (output_bfd
, rel
, loc
);
9536 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
9537 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
9541 elf32_arm_allocate_plt_entry (struct bfd_link_info
*info
,
9542 bfd_boolean is_iplt_entry
,
9543 union gotplt_union
*root_plt
,
9544 struct arm_plt_info
*arm_plt
)
9546 struct elf32_arm_link_hash_table
*htab
;
9550 htab
= elf32_arm_hash_table (info
);
9554 splt
= htab
->root
.iplt
;
9555 sgotplt
= htab
->root
.igotplt
;
9557 /* NaCl uses a special first entry in .iplt too. */
9558 if (htab
->nacl_p
&& splt
->size
== 0)
9559 splt
->size
+= htab
->plt_header_size
;
9561 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
9562 elf32_arm_allocate_irelocs (info
, htab
->root
.irelplt
, 1);
9566 splt
= htab
->root
.splt
;
9567 sgotplt
= htab
->root
.sgotplt
;
9571 /* Allocate room for R_ARM_FUNCDESC_VALUE. */
9572 /* For lazy binding, relocations will be put into .rel.plt, in
9573 .rel.got otherwise. */
9574 /* FIXME: today we don't support lazy binding so put it in .rel.got */
9575 if (info
->flags
& DF_BIND_NOW
)
9576 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
9578 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelplt
, 1);
9582 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
9583 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelplt
, 1);
9586 /* If this is the first .plt entry, make room for the special
9588 if (splt
->size
== 0)
9589 splt
->size
+= htab
->plt_header_size
;
9591 htab
->next_tls_desc_index
++;
9594 /* Allocate the PLT entry itself, including any leading Thumb stub. */
9595 if (elf32_arm_plt_needs_thumb_stub_p (info
, arm_plt
))
9596 splt
->size
+= PLT_THUMB_STUB_SIZE
;
9597 root_plt
->offset
= splt
->size
;
9598 splt
->size
+= htab
->plt_entry_size
;
9600 if (!htab
->symbian_p
)
9602 /* We also need to make an entry in the .got.plt section, which
9603 will be placed in the .got section by the linker script. */
9605 arm_plt
->got_offset
= sgotplt
->size
;
9607 arm_plt
->got_offset
= sgotplt
->size
- 8 * htab
->num_tls_desc
;
9609 /* Function descriptor takes 64 bits in GOT. */
9617 arm_movw_immediate (bfd_vma value
)
9619 return (value
& 0x00000fff) | ((value
& 0x0000f000) << 4);
9623 arm_movt_immediate (bfd_vma value
)
9625 return ((value
& 0x0fff0000) >> 16) | ((value
& 0xf0000000) >> 12);
9628 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
9629 the entry lives in .iplt and resolves to (*SYM_VALUE)().
9630 Otherwise, DYNINDX is the index of the symbol in the dynamic
9631 symbol table and SYM_VALUE is undefined.
9633 ROOT_PLT points to the offset of the PLT entry from the start of its
9634 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
9635 bookkeeping information.
9637 Returns FALSE if there was a problem. */
9640 elf32_arm_populate_plt_entry (bfd
*output_bfd
, struct bfd_link_info
*info
,
9641 union gotplt_union
*root_plt
,
9642 struct arm_plt_info
*arm_plt
,
9643 int dynindx
, bfd_vma sym_value
)
9645 struct elf32_arm_link_hash_table
*htab
;
9651 Elf_Internal_Rela rel
;
9652 bfd_vma plt_header_size
;
9653 bfd_vma got_header_size
;
9655 htab
= elf32_arm_hash_table (info
);
9657 /* Pick the appropriate sections and sizes. */
9660 splt
= htab
->root
.iplt
;
9661 sgot
= htab
->root
.igotplt
;
9662 srel
= htab
->root
.irelplt
;
9664 /* There are no reserved entries in .igot.plt, and no special
9665 first entry in .iplt. */
9666 got_header_size
= 0;
9667 plt_header_size
= 0;
9671 splt
= htab
->root
.splt
;
9672 sgot
= htab
->root
.sgotplt
;
9673 srel
= htab
->root
.srelplt
;
9675 got_header_size
= get_elf_backend_data (output_bfd
)->got_header_size
;
9676 plt_header_size
= htab
->plt_header_size
;
9678 BFD_ASSERT (splt
!= NULL
&& srel
!= NULL
);
9680 /* Fill in the entry in the procedure linkage table. */
9681 if (htab
->symbian_p
)
9683 BFD_ASSERT (dynindx
>= 0);
9684 put_arm_insn (htab
, output_bfd
,
9685 elf32_arm_symbian_plt_entry
[0],
9686 splt
->contents
+ root_plt
->offset
);
9687 bfd_put_32 (output_bfd
,
9688 elf32_arm_symbian_plt_entry
[1],
9689 splt
->contents
+ root_plt
->offset
+ 4);
9691 /* Fill in the entry in the .rel.plt section. */
9692 rel
.r_offset
= (splt
->output_section
->vma
9693 + splt
->output_offset
9694 + root_plt
->offset
+ 4);
9695 rel
.r_info
= ELF32_R_INFO (dynindx
, R_ARM_GLOB_DAT
);
9697 /* Get the index in the procedure linkage table which
9698 corresponds to this symbol. This is the index of this symbol
9699 in all the symbols for which we are making plt entries. The
9700 first entry in the procedure linkage table is reserved. */
9701 plt_index
= ((root_plt
->offset
- plt_header_size
)
9702 / htab
->plt_entry_size
);
9706 bfd_vma got_offset
, got_address
, plt_address
;
9707 bfd_vma got_displacement
, initial_got_entry
;
9710 BFD_ASSERT (sgot
!= NULL
);
9712 /* Get the offset into the .(i)got.plt table of the entry that
9713 corresponds to this function. */
9714 got_offset
= (arm_plt
->got_offset
& -2);
9716 /* Get the index in the procedure linkage table which
9717 corresponds to this symbol. This is the index of this symbol
9718 in all the symbols for which we are making plt entries.
9719 After the reserved .got.plt entries, all symbols appear in
9720 the same order as in .plt. */
9722 /* Function descriptor takes 8 bytes. */
9723 plt_index
= (got_offset
- got_header_size
) / 8;
9725 plt_index
= (got_offset
- got_header_size
) / 4;
9727 /* Calculate the address of the GOT entry. */
9728 got_address
= (sgot
->output_section
->vma
9729 + sgot
->output_offset
9732 /* ...and the address of the PLT entry. */
9733 plt_address
= (splt
->output_section
->vma
9734 + splt
->output_offset
9735 + root_plt
->offset
);
9737 ptr
= splt
->contents
+ root_plt
->offset
;
9738 if (htab
->vxworks_p
&& bfd_link_pic (info
))
9743 for (i
= 0; i
!= htab
->plt_entry_size
/ 4; i
++, ptr
+= 4)
9745 val
= elf32_arm_vxworks_shared_plt_entry
[i
];
9747 val
|= got_address
- sgot
->output_section
->vma
;
9749 val
|= plt_index
* RELOC_SIZE (htab
);
9750 if (i
== 2 || i
== 5)
9751 bfd_put_32 (output_bfd
, val
, ptr
);
9753 put_arm_insn (htab
, output_bfd
, val
, ptr
);
9756 else if (htab
->vxworks_p
)
9761 for (i
= 0; i
!= htab
->plt_entry_size
/ 4; i
++, ptr
+= 4)
9763 val
= elf32_arm_vxworks_exec_plt_entry
[i
];
9767 val
|= 0xffffff & -((root_plt
->offset
+ i
* 4 + 8) >> 2);
9769 val
|= plt_index
* RELOC_SIZE (htab
);
9770 if (i
== 2 || i
== 5)
9771 bfd_put_32 (output_bfd
, val
, ptr
);
9773 put_arm_insn (htab
, output_bfd
, val
, ptr
);
9776 loc
= (htab
->srelplt2
->contents
9777 + (plt_index
* 2 + 1) * RELOC_SIZE (htab
));
9779 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
9780 referencing the GOT for this PLT entry. */
9781 rel
.r_offset
= plt_address
+ 8;
9782 rel
.r_info
= ELF32_R_INFO (htab
->root
.hgot
->indx
, R_ARM_ABS32
);
9783 rel
.r_addend
= got_offset
;
9784 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, loc
);
9785 loc
+= RELOC_SIZE (htab
);
9787 /* Create the R_ARM_ABS32 relocation referencing the
9788 beginning of the PLT for this GOT entry. */
9789 rel
.r_offset
= got_address
;
9790 rel
.r_info
= ELF32_R_INFO (htab
->root
.hplt
->indx
, R_ARM_ABS32
);
9792 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, loc
);
9794 else if (htab
->nacl_p
)
9796 /* Calculate the displacement between the PLT slot and the
9797 common tail that's part of the special initial PLT slot. */
9798 int32_t tail_displacement
9799 = ((splt
->output_section
->vma
+ splt
->output_offset
9800 + ARM_NACL_PLT_TAIL_OFFSET
)
9801 - (plt_address
+ htab
->plt_entry_size
+ 4));
9802 BFD_ASSERT ((tail_displacement
& 3) == 0);
9803 tail_displacement
>>= 2;
9805 BFD_ASSERT ((tail_displacement
& 0xff000000) == 0
9806 || (-tail_displacement
& 0xff000000) == 0);
9808 /* Calculate the displacement between the PLT slot and the entry
9809 in the GOT. The offset accounts for the value produced by
9810 adding to pc in the penultimate instruction of the PLT stub. */
9811 got_displacement
= (got_address
9812 - (plt_address
+ htab
->plt_entry_size
));
9814 /* NaCl does not support interworking at all. */
9815 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info
, arm_plt
));
9817 put_arm_insn (htab
, output_bfd
,
9818 elf32_arm_nacl_plt_entry
[0]
9819 | arm_movw_immediate (got_displacement
),
9821 put_arm_insn (htab
, output_bfd
,
9822 elf32_arm_nacl_plt_entry
[1]
9823 | arm_movt_immediate (got_displacement
),
9825 put_arm_insn (htab
, output_bfd
,
9826 elf32_arm_nacl_plt_entry
[2],
9828 put_arm_insn (htab
, output_bfd
,
9829 elf32_arm_nacl_plt_entry
[3]
9830 | (tail_displacement
& 0x00ffffff),
9833 else if (htab
->fdpic_p
)
9835 const bfd_vma
*plt_entry
= using_thumb_only(htab
)
9836 ? elf32_arm_fdpic_thumb_plt_entry
9837 : elf32_arm_fdpic_plt_entry
;
9839 /* Fill-up Thumb stub if needed. */
9840 if (elf32_arm_plt_needs_thumb_stub_p (info
, arm_plt
))
9842 put_thumb_insn (htab
, output_bfd
,
9843 elf32_arm_plt_thumb_stub
[0], ptr
- 4);
9844 put_thumb_insn (htab
, output_bfd
,
9845 elf32_arm_plt_thumb_stub
[1], ptr
- 2);
9847 /* As we are using 32 bit instructions even for the Thumb
9848 version, we have to use 'put_arm_insn' instead of
9849 'put_thumb_insn'. */
9850 put_arm_insn(htab
, output_bfd
, plt_entry
[0], ptr
+ 0);
9851 put_arm_insn(htab
, output_bfd
, plt_entry
[1], ptr
+ 4);
9852 put_arm_insn(htab
, output_bfd
, plt_entry
[2], ptr
+ 8);
9853 put_arm_insn(htab
, output_bfd
, plt_entry
[3], ptr
+ 12);
9854 bfd_put_32 (output_bfd
, got_offset
, ptr
+ 16);
9856 if (!(info
->flags
& DF_BIND_NOW
))
9858 /* funcdesc_value_reloc_offset. */
9859 bfd_put_32 (output_bfd
,
9860 htab
->root
.srelplt
->reloc_count
* RELOC_SIZE (htab
),
9862 put_arm_insn(htab
, output_bfd
, plt_entry
[6], ptr
+ 24);
9863 put_arm_insn(htab
, output_bfd
, plt_entry
[7], ptr
+ 28);
9864 put_arm_insn(htab
, output_bfd
, plt_entry
[8], ptr
+ 32);
9865 put_arm_insn(htab
, output_bfd
, plt_entry
[9], ptr
+ 36);
9868 else if (using_thumb_only (htab
))
9870 /* PR ld/16017: Generate thumb only PLT entries. */
9871 if (!using_thumb2 (htab
))
9873 /* FIXME: We ought to be able to generate thumb-1 PLT
9875 _bfd_error_handler (_("%pB: warning: thumb-1 mode PLT generation not currently supported"),
9880 /* Calculate the displacement between the PLT slot and the entry in
9881 the GOT. The 12-byte offset accounts for the value produced by
9882 adding to pc in the 3rd instruction of the PLT stub. */
9883 got_displacement
= got_address
- (plt_address
+ 12);
9885 /* As we are using 32 bit instructions we have to use 'put_arm_insn'
9886 instead of 'put_thumb_insn'. */
9887 put_arm_insn (htab
, output_bfd
,
9888 elf32_thumb2_plt_entry
[0]
9889 | ((got_displacement
& 0x000000ff) << 16)
9890 | ((got_displacement
& 0x00000700) << 20)
9891 | ((got_displacement
& 0x00000800) >> 1)
9892 | ((got_displacement
& 0x0000f000) >> 12),
9894 put_arm_insn (htab
, output_bfd
,
9895 elf32_thumb2_plt_entry
[1]
9896 | ((got_displacement
& 0x00ff0000) )
9897 | ((got_displacement
& 0x07000000) << 4)
9898 | ((got_displacement
& 0x08000000) >> 17)
9899 | ((got_displacement
& 0xf0000000) >> 28),
9901 put_arm_insn (htab
, output_bfd
,
9902 elf32_thumb2_plt_entry
[2],
9904 put_arm_insn (htab
, output_bfd
,
9905 elf32_thumb2_plt_entry
[3],
9910 /* Calculate the displacement between the PLT slot and the
9911 entry in the GOT. The eight-byte offset accounts for the
9912 value produced by adding to pc in the first instruction
9914 got_displacement
= got_address
- (plt_address
+ 8);
9916 if (elf32_arm_plt_needs_thumb_stub_p (info
, arm_plt
))
9918 put_thumb_insn (htab
, output_bfd
,
9919 elf32_arm_plt_thumb_stub
[0], ptr
- 4);
9920 put_thumb_insn (htab
, output_bfd
,
9921 elf32_arm_plt_thumb_stub
[1], ptr
- 2);
9924 if (!elf32_arm_use_long_plt_entry
)
9926 BFD_ASSERT ((got_displacement
& 0xf0000000) == 0);
9928 put_arm_insn (htab
, output_bfd
,
9929 elf32_arm_plt_entry_short
[0]
9930 | ((got_displacement
& 0x0ff00000) >> 20),
9932 put_arm_insn (htab
, output_bfd
,
9933 elf32_arm_plt_entry_short
[1]
9934 | ((got_displacement
& 0x000ff000) >> 12),
9936 put_arm_insn (htab
, output_bfd
,
9937 elf32_arm_plt_entry_short
[2]
9938 | (got_displacement
& 0x00000fff),
9940 #ifdef FOUR_WORD_PLT
9941 bfd_put_32 (output_bfd
, elf32_arm_plt_entry_short
[3], ptr
+ 12);
9946 put_arm_insn (htab
, output_bfd
,
9947 elf32_arm_plt_entry_long
[0]
9948 | ((got_displacement
& 0xf0000000) >> 28),
9950 put_arm_insn (htab
, output_bfd
,
9951 elf32_arm_plt_entry_long
[1]
9952 | ((got_displacement
& 0x0ff00000) >> 20),
9954 put_arm_insn (htab
, output_bfd
,
9955 elf32_arm_plt_entry_long
[2]
9956 | ((got_displacement
& 0x000ff000) >> 12),
9958 put_arm_insn (htab
, output_bfd
,
9959 elf32_arm_plt_entry_long
[3]
9960 | (got_displacement
& 0x00000fff),
9965 /* Fill in the entry in the .rel(a).(i)plt section. */
9966 rel
.r_offset
= got_address
;
9970 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
9971 The dynamic linker or static executable then calls SYM_VALUE
9972 to determine the correct run-time value of the .igot.plt entry. */
9973 rel
.r_info
= ELF32_R_INFO (0, R_ARM_IRELATIVE
);
9974 initial_got_entry
= sym_value
;
9978 /* For FDPIC we will have to resolve a R_ARM_FUNCDESC_VALUE
9979 used by PLT entry. */
9982 rel
.r_info
= ELF32_R_INFO (dynindx
, R_ARM_FUNCDESC_VALUE
);
9983 initial_got_entry
= 0;
9987 rel
.r_info
= ELF32_R_INFO (dynindx
, R_ARM_JUMP_SLOT
);
9988 initial_got_entry
= (splt
->output_section
->vma
9989 + splt
->output_offset
);
9992 When thumb only we need to set the LSB for any address that
9993 will be used with an interworking branch instruction. */
9994 if (using_thumb_only (htab
))
9995 initial_got_entry
|= 1;
9999 /* Fill in the entry in the global offset table. */
10000 bfd_put_32 (output_bfd
, initial_got_entry
,
10001 sgot
->contents
+ got_offset
);
10003 if (htab
->fdpic_p
&& !(info
->flags
& DF_BIND_NOW
))
10005 /* Setup initial funcdesc value. */
10006 /* FIXME: we don't support lazy binding because there is a
10007 race condition between both words getting written and
10008 some other thread attempting to read them. The ARM
10009 architecture does not have an atomic 64 bit load/store
10010 instruction that could be used to prevent it; it is
10011 recommended that threaded FDPIC applications run with the
10012 LD_BIND_NOW environment variable set. */
10013 bfd_put_32(output_bfd
, plt_address
+ 0x18,
10014 sgot
->contents
+ got_offset
);
10015 bfd_put_32(output_bfd
, -1 /*TODO*/,
10016 sgot
->contents
+ got_offset
+ 4);
10021 elf32_arm_add_dynreloc (output_bfd
, info
, srel
, &rel
);
10026 /* For FDPIC we put PLT relocationss into .rel.got when not
10027 lazy binding otherwise we put them in .rel.plt. For now,
10028 we don't support lazy binding so put it in .rel.got. */
10029 if (info
->flags
& DF_BIND_NOW
)
10030 elf32_arm_add_dynreloc(output_bfd
, info
, htab
->root
.srelgot
, &rel
);
10032 elf32_arm_add_dynreloc(output_bfd
, info
, htab
->root
.srelplt
, &rel
);
10036 loc
= srel
->contents
+ plt_index
* RELOC_SIZE (htab
);
10037 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, loc
);
10044 /* Some relocations map to different relocations depending on the
10045 target. Return the real relocation. */
10048 arm_real_reloc_type (struct elf32_arm_link_hash_table
* globals
,
10053 case R_ARM_TARGET1
:
10054 if (globals
->target1_is_rel
)
10055 return R_ARM_REL32
;
10057 return R_ARM_ABS32
;
10059 case R_ARM_TARGET2
:
10060 return globals
->target2_reloc
;
10067 /* Return the base VMA address which should be subtracted from real addresses
10068 when resolving @dtpoff relocation.
10069 This is PT_TLS segment p_vaddr. */
10072 dtpoff_base (struct bfd_link_info
*info
)
10074 /* If tls_sec is NULL, we should have signalled an error already. */
10075 if (elf_hash_table (info
)->tls_sec
== NULL
)
10077 return elf_hash_table (info
)->tls_sec
->vma
;
10080 /* Return the relocation value for @tpoff relocation
10081 if STT_TLS virtual address is ADDRESS. */
10084 tpoff (struct bfd_link_info
*info
, bfd_vma address
)
10086 struct elf_link_hash_table
*htab
= elf_hash_table (info
);
10089 /* If tls_sec is NULL, we should have signalled an error already. */
10090 if (htab
->tls_sec
== NULL
)
10092 base
= align_power ((bfd_vma
) TCB_SIZE
, htab
->tls_sec
->alignment_power
);
10093 return address
- htab
->tls_sec
->vma
+ base
;
10096 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
10097 VALUE is the relocation value. */
10099 static bfd_reloc_status_type
10100 elf32_arm_abs12_reloc (bfd
*abfd
, void *data
, bfd_vma value
)
10103 return bfd_reloc_overflow
;
10105 value
|= bfd_get_32 (abfd
, data
) & 0xfffff000;
10106 bfd_put_32 (abfd
, value
, data
);
10107 return bfd_reloc_ok
;
10110 /* Handle TLS relaxations. Relaxing is possible for symbols that use
10111 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
10112 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
10114 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
10115 is to then call final_link_relocate. Return other values in the
10118 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
10119 the pre-relaxed code. It would be nice if the relocs were updated
10120 to match the optimization. */
10122 static bfd_reloc_status_type
10123 elf32_arm_tls_relax (struct elf32_arm_link_hash_table
*globals
,
10124 bfd
*input_bfd
, asection
*input_sec
, bfd_byte
*contents
,
10125 Elf_Internal_Rela
*rel
, unsigned long is_local
)
10127 unsigned long insn
;
10129 switch (ELF32_R_TYPE (rel
->r_info
))
10132 return bfd_reloc_notsupported
;
10134 case R_ARM_TLS_GOTDESC
:
10139 insn
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
);
10141 insn
-= 5; /* THUMB */
10143 insn
-= 8; /* ARM */
10145 bfd_put_32 (input_bfd
, insn
, contents
+ rel
->r_offset
);
10146 return bfd_reloc_continue
;
10148 case R_ARM_THM_TLS_DESCSEQ
:
10150 insn
= bfd_get_16 (input_bfd
, contents
+ rel
->r_offset
);
10151 if ((insn
& 0xff78) == 0x4478) /* add rx, pc */
10155 bfd_put_16 (input_bfd
, 0x46c0, contents
+ rel
->r_offset
);
10157 else if ((insn
& 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
10161 bfd_put_16 (input_bfd
, 0x46c0, contents
+ rel
->r_offset
);
10164 bfd_put_16 (input_bfd
, insn
& 0xf83f, contents
+ rel
->r_offset
);
10166 else if ((insn
& 0xff87) == 0x4780) /* blx rx */
10170 bfd_put_16 (input_bfd
, 0x46c0, contents
+ rel
->r_offset
);
10173 bfd_put_16 (input_bfd
, 0x4600 | (insn
& 0x78),
10174 contents
+ rel
->r_offset
);
10178 if ((insn
& 0xf000) == 0xf000 || (insn
& 0xf800) == 0xe800)
10179 /* It's a 32 bit instruction, fetch the rest of it for
10180 error generation. */
10181 insn
= (insn
<< 16)
10182 | bfd_get_16 (input_bfd
, contents
+ rel
->r_offset
+ 2);
10184 /* xgettext:c-format */
10185 (_("%pB(%pA+%#" PRIx64
"): "
10186 "unexpected %s instruction '%#lx' in TLS trampoline"),
10187 input_bfd
, input_sec
, (uint64_t) rel
->r_offset
,
10189 return bfd_reloc_notsupported
;
10193 case R_ARM_TLS_DESCSEQ
:
10195 insn
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
);
10196 if ((insn
& 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
10200 bfd_put_32 (input_bfd
, 0xe1a00000 | (insn
& 0xffff),
10201 contents
+ rel
->r_offset
);
10203 else if ((insn
& 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
10207 bfd_put_32 (input_bfd
, 0xe1a00000, contents
+ rel
->r_offset
);
10210 bfd_put_32 (input_bfd
, insn
& 0xfffff000,
10211 contents
+ rel
->r_offset
);
10213 else if ((insn
& 0xfffffff0) == 0xe12fff30) /* blx rx */
10217 bfd_put_32 (input_bfd
, 0xe1a00000, contents
+ rel
->r_offset
);
10220 bfd_put_32 (input_bfd
, 0xe1a00000 | (insn
& 0xf),
10221 contents
+ rel
->r_offset
);
10226 /* xgettext:c-format */
10227 (_("%pB(%pA+%#" PRIx64
"): "
10228 "unexpected %s instruction '%#lx' in TLS trampoline"),
10229 input_bfd
, input_sec
, (uint64_t) rel
->r_offset
,
10231 return bfd_reloc_notsupported
;
10235 case R_ARM_TLS_CALL
:
10236 /* GD->IE relaxation, turn the instruction into 'nop' or
10237 'ldr r0, [pc,r0]' */
10238 insn
= is_local
? 0xe1a00000 : 0xe79f0000;
10239 bfd_put_32 (input_bfd
, insn
, contents
+ rel
->r_offset
);
10242 case R_ARM_THM_TLS_CALL
:
10243 /* GD->IE relaxation. */
10245 /* add r0,pc; ldr r0, [r0] */
10247 else if (using_thumb2 (globals
))
10254 bfd_put_16 (input_bfd
, insn
>> 16, contents
+ rel
->r_offset
);
10255 bfd_put_16 (input_bfd
, insn
& 0xffff, contents
+ rel
->r_offset
+ 2);
10258 return bfd_reloc_ok
;
10261 /* For a given value of n, calculate the value of G_n as required to
10262 deal with group relocations. We return it in the form of an
10263 encoded constant-and-rotation, together with the final residual. If n is
10264 specified as less than zero, then final_residual is filled with the
10265 input value and no further action is performed. */
10268 calculate_group_reloc_mask (bfd_vma value
, int n
, bfd_vma
*final_residual
)
10272 bfd_vma encoded_g_n
= 0;
10273 bfd_vma residual
= value
; /* Also known as Y_n. */
10275 for (current_n
= 0; current_n
<= n
; current_n
++)
10279 /* Calculate which part of the value to mask. */
10286 /* Determine the most significant bit in the residual and
10287 align the resulting value to a 2-bit boundary. */
10288 for (msb
= 30; msb
>= 0; msb
-= 2)
10289 if (residual
& (3 << msb
))
10292 /* The desired shift is now (msb - 6), or zero, whichever
10299 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
10300 g_n
= residual
& (0xff << shift
);
10301 encoded_g_n
= (g_n
>> shift
)
10302 | ((g_n
<= 0xff ? 0 : (32 - shift
) / 2) << 8);
10304 /* Calculate the residual for the next time around. */
10308 *final_residual
= residual
;
10310 return encoded_g_n
;
10313 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
10314 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
10317 identify_add_or_sub (bfd_vma insn
)
10319 int opcode
= insn
& 0x1e00000;
10321 if (opcode
== 1 << 23) /* ADD */
10324 if (opcode
== 1 << 22) /* SUB */
10330 /* Perform a relocation as part of a final link. */
10332 static bfd_reloc_status_type
10333 elf32_arm_final_link_relocate (reloc_howto_type
* howto
,
10336 asection
* input_section
,
10337 bfd_byte
* contents
,
10338 Elf_Internal_Rela
* rel
,
10340 struct bfd_link_info
* info
,
10341 asection
* sym_sec
,
10342 const char * sym_name
,
10343 unsigned char st_type
,
10344 enum arm_st_branch_type branch_type
,
10345 struct elf_link_hash_entry
* h
,
10346 bfd_boolean
* unresolved_reloc_p
,
10347 char ** error_message
)
10349 unsigned long r_type
= howto
->type
;
10350 unsigned long r_symndx
;
10351 bfd_byte
* hit_data
= contents
+ rel
->r_offset
;
10352 bfd_vma
* local_got_offsets
;
10353 bfd_vma
* local_tlsdesc_gotents
;
10356 asection
* sreloc
= NULL
;
10357 asection
* srelgot
;
10359 bfd_signed_vma signed_addend
;
10360 unsigned char dynreloc_st_type
;
10361 bfd_vma dynreloc_value
;
10362 struct elf32_arm_link_hash_table
* globals
;
10363 struct elf32_arm_link_hash_entry
*eh
;
10364 union gotplt_union
*root_plt
;
10365 struct arm_plt_info
*arm_plt
;
10366 bfd_vma plt_offset
;
10367 bfd_vma gotplt_offset
;
10368 bfd_boolean has_iplt_entry
;
10369 bfd_boolean resolved_to_zero
;
10371 globals
= elf32_arm_hash_table (info
);
10372 if (globals
== NULL
)
10373 return bfd_reloc_notsupported
;
10375 BFD_ASSERT (is_arm_elf (input_bfd
));
10376 BFD_ASSERT (howto
!= NULL
);
10378 /* Some relocation types map to different relocations depending on the
10379 target. We pick the right one here. */
10380 r_type
= arm_real_reloc_type (globals
, r_type
);
10382 /* It is possible to have linker relaxations on some TLS access
10383 models. Update our information here. */
10384 r_type
= elf32_arm_tls_transition (info
, r_type
, h
);
10386 if (r_type
!= howto
->type
)
10387 howto
= elf32_arm_howto_from_type (r_type
);
10389 eh
= (struct elf32_arm_link_hash_entry
*) h
;
10390 sgot
= globals
->root
.sgot
;
10391 local_got_offsets
= elf_local_got_offsets (input_bfd
);
10392 local_tlsdesc_gotents
= elf32_arm_local_tlsdesc_gotent (input_bfd
);
10394 if (globals
->root
.dynamic_sections_created
)
10395 srelgot
= globals
->root
.srelgot
;
10399 r_symndx
= ELF32_R_SYM (rel
->r_info
);
10401 if (globals
->use_rel
)
10403 addend
= bfd_get_32 (input_bfd
, hit_data
) & howto
->src_mask
;
10405 if (addend
& ((howto
->src_mask
+ 1) >> 1))
10407 signed_addend
= -1;
10408 signed_addend
&= ~ howto
->src_mask
;
10409 signed_addend
|= addend
;
10412 signed_addend
= addend
;
10415 addend
= signed_addend
= rel
->r_addend
;
10417 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
10418 are resolving a function call relocation. */
10419 if (using_thumb_only (globals
)
10420 && (r_type
== R_ARM_THM_CALL
10421 || r_type
== R_ARM_THM_JUMP24
)
10422 && branch_type
== ST_BRANCH_TO_ARM
)
10423 branch_type
= ST_BRANCH_TO_THUMB
;
10425 /* Record the symbol information that should be used in dynamic
10427 dynreloc_st_type
= st_type
;
10428 dynreloc_value
= value
;
10429 if (branch_type
== ST_BRANCH_TO_THUMB
)
10430 dynreloc_value
|= 1;
10432 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
10433 VALUE appropriately for relocations that we resolve at link time. */
10434 has_iplt_entry
= FALSE
;
10435 if (elf32_arm_get_plt_info (input_bfd
, globals
, eh
, r_symndx
, &root_plt
,
10437 && root_plt
->offset
!= (bfd_vma
) -1)
10439 plt_offset
= root_plt
->offset
;
10440 gotplt_offset
= arm_plt
->got_offset
;
10442 if (h
== NULL
|| eh
->is_iplt
)
10444 has_iplt_entry
= TRUE
;
10445 splt
= globals
->root
.iplt
;
10447 /* Populate .iplt entries here, because not all of them will
10448 be seen by finish_dynamic_symbol. The lower bit is set if
10449 we have already populated the entry. */
10450 if (plt_offset
& 1)
10454 if (elf32_arm_populate_plt_entry (output_bfd
, info
, root_plt
, arm_plt
,
10455 -1, dynreloc_value
))
10456 root_plt
->offset
|= 1;
10458 return bfd_reloc_notsupported
;
10461 /* Static relocations always resolve to the .iplt entry. */
10462 st_type
= STT_FUNC
;
10463 value
= (splt
->output_section
->vma
10464 + splt
->output_offset
10466 branch_type
= ST_BRANCH_TO_ARM
;
10468 /* If there are non-call relocations that resolve to the .iplt
10469 entry, then all dynamic ones must too. */
10470 if (arm_plt
->noncall_refcount
!= 0)
10472 dynreloc_st_type
= st_type
;
10473 dynreloc_value
= value
;
10477 /* We populate the .plt entry in finish_dynamic_symbol. */
10478 splt
= globals
->root
.splt
;
10483 plt_offset
= (bfd_vma
) -1;
10484 gotplt_offset
= (bfd_vma
) -1;
10487 resolved_to_zero
= (h
!= NULL
10488 && UNDEFWEAK_NO_DYNAMIC_RELOC (info
, h
));
10493 /* We don't need to find a value for this symbol. It's just a
10495 *unresolved_reloc_p
= FALSE
;
10496 return bfd_reloc_ok
;
10499 if (!globals
->vxworks_p
)
10500 return elf32_arm_abs12_reloc (input_bfd
, hit_data
, value
+ addend
);
10501 /* Fall through. */
10505 case R_ARM_ABS32_NOI
:
10507 case R_ARM_REL32_NOI
:
10513 /* Handle relocations which should use the PLT entry. ABS32/REL32
10514 will use the symbol's value, which may point to a PLT entry, but we
10515 don't need to handle that here. If we created a PLT entry, all
10516 branches in this object should go to it, except if the PLT is too
10517 far away, in which case a long branch stub should be inserted. */
10518 if ((r_type
!= R_ARM_ABS32
&& r_type
!= R_ARM_REL32
10519 && r_type
!= R_ARM_ABS32_NOI
&& r_type
!= R_ARM_REL32_NOI
10520 && r_type
!= R_ARM_CALL
10521 && r_type
!= R_ARM_JUMP24
10522 && r_type
!= R_ARM_PLT32
)
10523 && plt_offset
!= (bfd_vma
) -1)
10525 /* If we've created a .plt section, and assigned a PLT entry
10526 to this function, it must either be a STT_GNU_IFUNC reference
10527 or not be known to bind locally. In other cases, we should
10528 have cleared the PLT entry by now. */
10529 BFD_ASSERT (has_iplt_entry
|| !SYMBOL_CALLS_LOCAL (info
, h
));
10531 value
= (splt
->output_section
->vma
10532 + splt
->output_offset
10534 *unresolved_reloc_p
= FALSE
;
10535 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
10536 contents
, rel
->r_offset
, value
,
10540 /* When generating a shared object or relocatable executable, these
10541 relocations are copied into the output file to be resolved at
10543 if ((bfd_link_pic (info
)
10544 || globals
->root
.is_relocatable_executable
10545 || globals
->fdpic_p
)
10546 && (input_section
->flags
& SEC_ALLOC
)
10547 && !(globals
->vxworks_p
10548 && strcmp (input_section
->output_section
->name
,
10550 && ((r_type
!= R_ARM_REL32
&& r_type
!= R_ARM_REL32_NOI
)
10551 || !SYMBOL_CALLS_LOCAL (info
, h
))
10552 && !(input_bfd
== globals
->stub_bfd
10553 && strstr (input_section
->name
, STUB_SUFFIX
))
10555 || (ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
10556 && !resolved_to_zero
)
10557 || h
->root
.type
!= bfd_link_hash_undefweak
)
10558 && r_type
!= R_ARM_PC24
10559 && r_type
!= R_ARM_CALL
10560 && r_type
!= R_ARM_JUMP24
10561 && r_type
!= R_ARM_PREL31
10562 && r_type
!= R_ARM_PLT32
)
10564 Elf_Internal_Rela outrel
;
10565 bfd_boolean skip
, relocate
;
10568 if ((r_type
== R_ARM_REL32
|| r_type
== R_ARM_REL32_NOI
)
10569 && !h
->def_regular
)
10571 char *v
= _("shared object");
10573 if (bfd_link_executable (info
))
10574 v
= _("PIE executable");
10577 (_("%pB: relocation %s against external or undefined symbol `%s'"
10578 " can not be used when making a %s; recompile with -fPIC"), input_bfd
,
10579 elf32_arm_howto_table_1
[r_type
].name
, h
->root
.root
.string
, v
);
10580 return bfd_reloc_notsupported
;
10583 *unresolved_reloc_p
= FALSE
;
10585 if (sreloc
== NULL
&& globals
->root
.dynamic_sections_created
)
10587 sreloc
= _bfd_elf_get_dynamic_reloc_section (input_bfd
, input_section
,
10588 ! globals
->use_rel
);
10590 if (sreloc
== NULL
)
10591 return bfd_reloc_notsupported
;
10597 outrel
.r_addend
= addend
;
10599 _bfd_elf_section_offset (output_bfd
, info
, input_section
,
10601 if (outrel
.r_offset
== (bfd_vma
) -1)
10603 else if (outrel
.r_offset
== (bfd_vma
) -2)
10604 skip
= TRUE
, relocate
= TRUE
;
10605 outrel
.r_offset
+= (input_section
->output_section
->vma
10606 + input_section
->output_offset
);
10609 memset (&outrel
, 0, sizeof outrel
);
10611 && h
->dynindx
!= -1
10612 && (!bfd_link_pic (info
)
10613 || !(bfd_link_pie (info
)
10614 || SYMBOLIC_BIND (info
, h
))
10615 || !h
->def_regular
))
10616 outrel
.r_info
= ELF32_R_INFO (h
->dynindx
, r_type
);
10621 /* This symbol is local, or marked to become local. */
10622 BFD_ASSERT (r_type
== R_ARM_ABS32
|| r_type
== R_ARM_ABS32_NOI
10623 || (globals
->fdpic_p
&& !bfd_link_pic(info
)));
10624 if (globals
->symbian_p
)
10628 /* On Symbian OS, the data segment and text segement
10629 can be relocated independently. Therefore, we
10630 must indicate the segment to which this
10631 relocation is relative. The BPABI allows us to
10632 use any symbol in the right segment; we just use
10633 the section symbol as it is convenient. (We
10634 cannot use the symbol given by "h" directly as it
10635 will not appear in the dynamic symbol table.)
10637 Note that the dynamic linker ignores the section
10638 symbol value, so we don't subtract osec->vma
10639 from the emitted reloc addend. */
10641 osec
= sym_sec
->output_section
;
10643 osec
= input_section
->output_section
;
10644 symbol
= elf_section_data (osec
)->dynindx
;
10647 struct elf_link_hash_table
*htab
= elf_hash_table (info
);
10649 if ((osec
->flags
& SEC_READONLY
) == 0
10650 && htab
->data_index_section
!= NULL
)
10651 osec
= htab
->data_index_section
;
10653 osec
= htab
->text_index_section
;
10654 symbol
= elf_section_data (osec
)->dynindx
;
10656 BFD_ASSERT (symbol
!= 0);
10659 /* On SVR4-ish systems, the dynamic loader cannot
10660 relocate the text and data segments independently,
10661 so the symbol does not matter. */
10663 if (dynreloc_st_type
== STT_GNU_IFUNC
)
10664 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
10665 to the .iplt entry. Instead, every non-call reference
10666 must use an R_ARM_IRELATIVE relocation to obtain the
10667 correct run-time address. */
10668 outrel
.r_info
= ELF32_R_INFO (symbol
, R_ARM_IRELATIVE
);
10669 else if (globals
->fdpic_p
&& !bfd_link_pic(info
))
10672 outrel
.r_info
= ELF32_R_INFO (symbol
, R_ARM_RELATIVE
);
10673 if (globals
->use_rel
)
10676 outrel
.r_addend
+= dynreloc_value
;
10680 arm_elf_add_rofixup(output_bfd
, globals
->srofixup
, outrel
.r_offset
);
10682 elf32_arm_add_dynreloc (output_bfd
, info
, sreloc
, &outrel
);
10684 /* If this reloc is against an external symbol, we do not want to
10685 fiddle with the addend. Otherwise, we need to include the symbol
10686 value so that it becomes an addend for the dynamic reloc. */
10688 return bfd_reloc_ok
;
10690 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
10691 contents
, rel
->r_offset
,
10692 dynreloc_value
, (bfd_vma
) 0);
10694 else switch (r_type
)
10697 return elf32_arm_abs12_reloc (input_bfd
, hit_data
, value
+ addend
);
10699 case R_ARM_XPC25
: /* Arm BLX instruction. */
10702 case R_ARM_PC24
: /* Arm B/BL instruction. */
10705 struct elf32_arm_stub_hash_entry
*stub_entry
= NULL
;
10707 if (r_type
== R_ARM_XPC25
)
10709 /* Check for Arm calling Arm function. */
10710 /* FIXME: Should we translate the instruction into a BL
10711 instruction instead ? */
10712 if (branch_type
!= ST_BRANCH_TO_THUMB
)
10714 (_("\%pB: warning: %s BLX instruction targets"
10715 " %s function '%s'"),
10717 "ARM", h
? h
->root
.root
.string
: "(local)");
10719 else if (r_type
== R_ARM_PC24
)
10721 /* Check for Arm calling Thumb function. */
10722 if (branch_type
== ST_BRANCH_TO_THUMB
)
10724 if (elf32_arm_to_thumb_stub (info
, sym_name
, input_bfd
,
10725 output_bfd
, input_section
,
10726 hit_data
, sym_sec
, rel
->r_offset
,
10727 signed_addend
, value
,
10729 return bfd_reloc_ok
;
10731 return bfd_reloc_dangerous
;
10735 /* Check if a stub has to be inserted because the
10736 destination is too far or we are changing mode. */
10737 if ( r_type
== R_ARM_CALL
10738 || r_type
== R_ARM_JUMP24
10739 || r_type
== R_ARM_PLT32
)
10741 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
10742 struct elf32_arm_link_hash_entry
*hash
;
10744 hash
= (struct elf32_arm_link_hash_entry
*) h
;
10745 stub_type
= arm_type_of_stub (info
, input_section
, rel
,
10746 st_type
, &branch_type
,
10747 hash
, value
, sym_sec
,
10748 input_bfd
, sym_name
);
10750 if (stub_type
!= arm_stub_none
)
10752 /* The target is out of reach, so redirect the
10753 branch to the local stub for this function. */
10754 stub_entry
= elf32_arm_get_stub_entry (input_section
,
10759 if (stub_entry
!= NULL
)
10760 value
= (stub_entry
->stub_offset
10761 + stub_entry
->stub_sec
->output_offset
10762 + stub_entry
->stub_sec
->output_section
->vma
);
10764 if (plt_offset
!= (bfd_vma
) -1)
10765 *unresolved_reloc_p
= FALSE
;
10770 /* If the call goes through a PLT entry, make sure to
10771 check distance to the right destination address. */
10772 if (plt_offset
!= (bfd_vma
) -1)
10774 value
= (splt
->output_section
->vma
10775 + splt
->output_offset
10777 *unresolved_reloc_p
= FALSE
;
10778 /* The PLT entry is in ARM mode, regardless of the
10779 target function. */
10780 branch_type
= ST_BRANCH_TO_ARM
;
10785 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
10787 S is the address of the symbol in the relocation.
10788 P is address of the instruction being relocated.
10789 A is the addend (extracted from the instruction) in bytes.
10791 S is held in 'value'.
10792 P is the base address of the section containing the
10793 instruction plus the offset of the reloc into that
10795 (input_section->output_section->vma +
10796 input_section->output_offset +
10798 A is the addend, converted into bytes, ie:
10799 (signed_addend * 4)
10801 Note: None of these operations have knowledge of the pipeline
10802 size of the processor, thus it is up to the assembler to
10803 encode this information into the addend. */
10804 value
-= (input_section
->output_section
->vma
10805 + input_section
->output_offset
);
10806 value
-= rel
->r_offset
;
10807 if (globals
->use_rel
)
10808 value
+= (signed_addend
<< howto
->size
);
10810 /* RELA addends do not have to be adjusted by howto->size. */
10811 value
+= signed_addend
;
10813 signed_addend
= value
;
10814 signed_addend
>>= howto
->rightshift
;
10816 /* A branch to an undefined weak symbol is turned into a jump to
10817 the next instruction unless a PLT entry will be created.
10818 Do the same for local undefined symbols (but not for STN_UNDEF).
10819 The jump to the next instruction is optimized as a NOP depending
10820 on the architecture. */
10821 if (h
? (h
->root
.type
== bfd_link_hash_undefweak
10822 && plt_offset
== (bfd_vma
) -1)
10823 : r_symndx
!= STN_UNDEF
&& bfd_is_und_section (sym_sec
))
10825 value
= (bfd_get_32 (input_bfd
, hit_data
) & 0xf0000000);
10827 if (arch_has_arm_nop (globals
))
10828 value
|= 0x0320f000;
10830 value
|= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
10834 /* Perform a signed range check. */
10835 if ( signed_addend
> ((bfd_signed_vma
) (howto
->dst_mask
>> 1))
10836 || signed_addend
< - ((bfd_signed_vma
) ((howto
->dst_mask
+ 1) >> 1)))
10837 return bfd_reloc_overflow
;
10839 addend
= (value
& 2);
10841 value
= (signed_addend
& howto
->dst_mask
)
10842 | (bfd_get_32 (input_bfd
, hit_data
) & (~ howto
->dst_mask
));
10844 if (r_type
== R_ARM_CALL
)
10846 /* Set the H bit in the BLX instruction. */
10847 if (branch_type
== ST_BRANCH_TO_THUMB
)
10850 value
|= (1 << 24);
10852 value
&= ~(bfd_vma
)(1 << 24);
10855 /* Select the correct instruction (BL or BLX). */
10856 /* Only if we are not handling a BL to a stub. In this
10857 case, mode switching is performed by the stub. */
10858 if (branch_type
== ST_BRANCH_TO_THUMB
&& !stub_entry
)
10859 value
|= (1 << 28);
10860 else if (stub_entry
|| branch_type
!= ST_BRANCH_UNKNOWN
)
10862 value
&= ~(bfd_vma
)(1 << 28);
10863 value
|= (1 << 24);
10872 if (branch_type
== ST_BRANCH_TO_THUMB
)
10876 case R_ARM_ABS32_NOI
:
10882 if (branch_type
== ST_BRANCH_TO_THUMB
)
10884 value
-= (input_section
->output_section
->vma
10885 + input_section
->output_offset
+ rel
->r_offset
);
10888 case R_ARM_REL32_NOI
:
10890 value
-= (input_section
->output_section
->vma
10891 + input_section
->output_offset
+ rel
->r_offset
);
10895 value
-= (input_section
->output_section
->vma
10896 + input_section
->output_offset
+ rel
->r_offset
);
10897 value
+= signed_addend
;
10898 if (! h
|| h
->root
.type
!= bfd_link_hash_undefweak
)
10900 /* Check for overflow. */
10901 if ((value
^ (value
>> 1)) & (1 << 30))
10902 return bfd_reloc_overflow
;
10904 value
&= 0x7fffffff;
10905 value
|= (bfd_get_32 (input_bfd
, hit_data
) & 0x80000000);
10906 if (branch_type
== ST_BRANCH_TO_THUMB
)
10911 bfd_put_32 (input_bfd
, value
, hit_data
);
10912 return bfd_reloc_ok
;
10915 /* PR 16202: Refectch the addend using the correct size. */
10916 if (globals
->use_rel
)
10917 addend
= bfd_get_8 (input_bfd
, hit_data
);
10920 /* There is no way to tell whether the user intended to use a signed or
10921 unsigned addend. When checking for overflow we accept either,
10922 as specified by the AAELF. */
10923 if ((long) value
> 0xff || (long) value
< -0x80)
10924 return bfd_reloc_overflow
;
10926 bfd_put_8 (input_bfd
, value
, hit_data
);
10927 return bfd_reloc_ok
;
10930 /* PR 16202: Refectch the addend using the correct size. */
10931 if (globals
->use_rel
)
10932 addend
= bfd_get_16 (input_bfd
, hit_data
);
10935 /* See comment for R_ARM_ABS8. */
10936 if ((long) value
> 0xffff || (long) value
< -0x8000)
10937 return bfd_reloc_overflow
;
10939 bfd_put_16 (input_bfd
, value
, hit_data
);
10940 return bfd_reloc_ok
;
10942 case R_ARM_THM_ABS5
:
10943 /* Support ldr and str instructions for the thumb. */
10944 if (globals
->use_rel
)
10946 /* Need to refetch addend. */
10947 addend
= bfd_get_16 (input_bfd
, hit_data
) & howto
->src_mask
;
10948 /* ??? Need to determine shift amount from operand size. */
10949 addend
>>= howto
->rightshift
;
10953 /* ??? Isn't value unsigned? */
10954 if ((long) value
> 0x1f || (long) value
< -0x10)
10955 return bfd_reloc_overflow
;
10957 /* ??? Value needs to be properly shifted into place first. */
10958 value
|= bfd_get_16 (input_bfd
, hit_data
) & 0xf83f;
10959 bfd_put_16 (input_bfd
, value
, hit_data
);
10960 return bfd_reloc_ok
;
10962 case R_ARM_THM_ALU_PREL_11_0
:
10963 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
10966 bfd_signed_vma relocation
;
10968 insn
= (bfd_get_16 (input_bfd
, hit_data
) << 16)
10969 | bfd_get_16 (input_bfd
, hit_data
+ 2);
10971 if (globals
->use_rel
)
10973 signed_addend
= (insn
& 0xff) | ((insn
& 0x7000) >> 4)
10974 | ((insn
& (1 << 26)) >> 15);
10975 if (insn
& 0xf00000)
10976 signed_addend
= -signed_addend
;
10979 relocation
= value
+ signed_addend
;
10980 relocation
-= Pa (input_section
->output_section
->vma
10981 + input_section
->output_offset
10984 /* PR 21523: Use an absolute value. The user of this reloc will
10985 have already selected an ADD or SUB insn appropriately. */
10986 value
= llabs (relocation
);
10988 if (value
>= 0x1000)
10989 return bfd_reloc_overflow
;
10991 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
10992 if (branch_type
== ST_BRANCH_TO_THUMB
)
10995 insn
= (insn
& 0xfb0f8f00) | (value
& 0xff)
10996 | ((value
& 0x700) << 4)
10997 | ((value
& 0x800) << 15);
10998 if (relocation
< 0)
11001 bfd_put_16 (input_bfd
, insn
>> 16, hit_data
);
11002 bfd_put_16 (input_bfd
, insn
& 0xffff, hit_data
+ 2);
11004 return bfd_reloc_ok
;
11007 case R_ARM_THM_PC8
:
11008 /* PR 10073: This reloc is not generated by the GNU toolchain,
11009 but it is supported for compatibility with third party libraries
11010 generated by other compilers, specifically the ARM/IAR. */
11013 bfd_signed_vma relocation
;
11015 insn
= bfd_get_16 (input_bfd
, hit_data
);
11017 if (globals
->use_rel
)
11018 addend
= ((((insn
& 0x00ff) << 2) + 4) & 0x3ff) -4;
11020 relocation
= value
+ addend
;
11021 relocation
-= Pa (input_section
->output_section
->vma
11022 + input_section
->output_offset
11025 value
= relocation
;
11027 /* We do not check for overflow of this reloc. Although strictly
11028 speaking this is incorrect, it appears to be necessary in order
11029 to work with IAR generated relocs. Since GCC and GAS do not
11030 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
11031 a problem for them. */
11034 insn
= (insn
& 0xff00) | (value
>> 2);
11036 bfd_put_16 (input_bfd
, insn
, hit_data
);
11038 return bfd_reloc_ok
;
11041 case R_ARM_THM_PC12
:
11042 /* Corresponds to: ldr.w reg, [pc, #offset]. */
11045 bfd_signed_vma relocation
;
11047 insn
= (bfd_get_16 (input_bfd
, hit_data
) << 16)
11048 | bfd_get_16 (input_bfd
, hit_data
+ 2);
11050 if (globals
->use_rel
)
11052 signed_addend
= insn
& 0xfff;
11053 if (!(insn
& (1 << 23)))
11054 signed_addend
= -signed_addend
;
11057 relocation
= value
+ signed_addend
;
11058 relocation
-= Pa (input_section
->output_section
->vma
11059 + input_section
->output_offset
11062 value
= relocation
;
11064 if (value
>= 0x1000)
11065 return bfd_reloc_overflow
;
11067 insn
= (insn
& 0xff7ff000) | value
;
11068 if (relocation
>= 0)
11071 bfd_put_16 (input_bfd
, insn
>> 16, hit_data
);
11072 bfd_put_16 (input_bfd
, insn
& 0xffff, hit_data
+ 2);
11074 return bfd_reloc_ok
;
11077 case R_ARM_THM_XPC22
:
11078 case R_ARM_THM_CALL
:
11079 case R_ARM_THM_JUMP24
:
11080 /* Thumb BL (branch long instruction). */
11082 bfd_vma relocation
;
11083 bfd_vma reloc_sign
;
11084 bfd_boolean overflow
= FALSE
;
11085 bfd_vma upper_insn
= bfd_get_16 (input_bfd
, hit_data
);
11086 bfd_vma lower_insn
= bfd_get_16 (input_bfd
, hit_data
+ 2);
11087 bfd_signed_vma reloc_signed_max
;
11088 bfd_signed_vma reloc_signed_min
;
11090 bfd_signed_vma signed_check
;
11092 const int thumb2
= using_thumb2 (globals
);
11093 const int thumb2_bl
= using_thumb2_bl (globals
);
11095 /* A branch to an undefined weak symbol is turned into a jump to
11096 the next instruction unless a PLT entry will be created.
11097 The jump to the next instruction is optimized as a NOP.W for
11098 Thumb-2 enabled architectures. */
11099 if (h
&& h
->root
.type
== bfd_link_hash_undefweak
11100 && plt_offset
== (bfd_vma
) -1)
11104 bfd_put_16 (input_bfd
, 0xf3af, hit_data
);
11105 bfd_put_16 (input_bfd
, 0x8000, hit_data
+ 2);
11109 bfd_put_16 (input_bfd
, 0xe000, hit_data
);
11110 bfd_put_16 (input_bfd
, 0xbf00, hit_data
+ 2);
11112 return bfd_reloc_ok
;
11115 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
11116 with Thumb-1) involving the J1 and J2 bits. */
11117 if (globals
->use_rel
)
11119 bfd_vma s
= (upper_insn
& (1 << 10)) >> 10;
11120 bfd_vma upper
= upper_insn
& 0x3ff;
11121 bfd_vma lower
= lower_insn
& 0x7ff;
11122 bfd_vma j1
= (lower_insn
& (1 << 13)) >> 13;
11123 bfd_vma j2
= (lower_insn
& (1 << 11)) >> 11;
11124 bfd_vma i1
= j1
^ s
? 0 : 1;
11125 bfd_vma i2
= j2
^ s
? 0 : 1;
11127 addend
= (i1
<< 23) | (i2
<< 22) | (upper
<< 12) | (lower
<< 1);
11129 addend
= (addend
| ((s
? 0 : 1) << 24)) - (1 << 24);
11131 signed_addend
= addend
;
11134 if (r_type
== R_ARM_THM_XPC22
)
11136 /* Check for Thumb to Thumb call. */
11137 /* FIXME: Should we translate the instruction into a BL
11138 instruction instead ? */
11139 if (branch_type
== ST_BRANCH_TO_THUMB
)
11141 (_("%pB: warning: %s BLX instruction targets"
11142 " %s function '%s'"),
11143 input_bfd
, "Thumb",
11144 "Thumb", h
? h
->root
.root
.string
: "(local)");
11148 /* If it is not a call to Thumb, assume call to Arm.
11149 If it is a call relative to a section name, then it is not a
11150 function call at all, but rather a long jump. Calls through
11151 the PLT do not require stubs. */
11152 if (branch_type
== ST_BRANCH_TO_ARM
&& plt_offset
== (bfd_vma
) -1)
11154 if (globals
->use_blx
&& r_type
== R_ARM_THM_CALL
)
11156 /* Convert BL to BLX. */
11157 lower_insn
= (lower_insn
& ~0x1000) | 0x0800;
11159 else if (( r_type
!= R_ARM_THM_CALL
)
11160 && (r_type
!= R_ARM_THM_JUMP24
))
11162 if (elf32_thumb_to_arm_stub
11163 (info
, sym_name
, input_bfd
, output_bfd
, input_section
,
11164 hit_data
, sym_sec
, rel
->r_offset
, signed_addend
, value
,
11166 return bfd_reloc_ok
;
11168 return bfd_reloc_dangerous
;
11171 else if (branch_type
== ST_BRANCH_TO_THUMB
11172 && globals
->use_blx
11173 && r_type
== R_ARM_THM_CALL
)
11175 /* Make sure this is a BL. */
11176 lower_insn
|= 0x1800;
11180 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
11181 if (r_type
== R_ARM_THM_CALL
|| r_type
== R_ARM_THM_JUMP24
)
11183 /* Check if a stub has to be inserted because the destination
11185 struct elf32_arm_stub_hash_entry
*stub_entry
;
11186 struct elf32_arm_link_hash_entry
*hash
;
11188 hash
= (struct elf32_arm_link_hash_entry
*) h
;
11190 stub_type
= arm_type_of_stub (info
, input_section
, rel
,
11191 st_type
, &branch_type
,
11192 hash
, value
, sym_sec
,
11193 input_bfd
, sym_name
);
11195 if (stub_type
!= arm_stub_none
)
11197 /* The target is out of reach or we are changing modes, so
11198 redirect the branch to the local stub for this
11200 stub_entry
= elf32_arm_get_stub_entry (input_section
,
11204 if (stub_entry
!= NULL
)
11206 value
= (stub_entry
->stub_offset
11207 + stub_entry
->stub_sec
->output_offset
11208 + stub_entry
->stub_sec
->output_section
->vma
);
11210 if (plt_offset
!= (bfd_vma
) -1)
11211 *unresolved_reloc_p
= FALSE
;
11214 /* If this call becomes a call to Arm, force BLX. */
11215 if (globals
->use_blx
&& (r_type
== R_ARM_THM_CALL
))
11218 && !arm_stub_is_thumb (stub_entry
->stub_type
))
11219 || branch_type
!= ST_BRANCH_TO_THUMB
)
11220 lower_insn
= (lower_insn
& ~0x1000) | 0x0800;
11225 /* Handle calls via the PLT. */
11226 if (stub_type
== arm_stub_none
&& plt_offset
!= (bfd_vma
) -1)
11228 value
= (splt
->output_section
->vma
11229 + splt
->output_offset
11232 if (globals
->use_blx
11233 && r_type
== R_ARM_THM_CALL
11234 && ! using_thumb_only (globals
))
11236 /* If the Thumb BLX instruction is available, convert
11237 the BL to a BLX instruction to call the ARM-mode
11239 lower_insn
= (lower_insn
& ~0x1000) | 0x0800;
11240 branch_type
= ST_BRANCH_TO_ARM
;
11244 if (! using_thumb_only (globals
))
11245 /* Target the Thumb stub before the ARM PLT entry. */
11246 value
-= PLT_THUMB_STUB_SIZE
;
11247 branch_type
= ST_BRANCH_TO_THUMB
;
11249 *unresolved_reloc_p
= FALSE
;
11252 relocation
= value
+ signed_addend
;
11254 relocation
-= (input_section
->output_section
->vma
11255 + input_section
->output_offset
11258 check
= relocation
>> howto
->rightshift
;
11260 /* If this is a signed value, the rightshift just dropped
11261 leading 1 bits (assuming twos complement). */
11262 if ((bfd_signed_vma
) relocation
>= 0)
11263 signed_check
= check
;
11265 signed_check
= check
| ~((bfd_vma
) -1 >> howto
->rightshift
);
11267 /* Calculate the permissable maximum and minimum values for
11268 this relocation according to whether we're relocating for
11270 bitsize
= howto
->bitsize
;
11273 reloc_signed_max
= (1 << (bitsize
- 1)) - 1;
11274 reloc_signed_min
= ~reloc_signed_max
;
11276 /* Assumes two's complement. */
11277 if (signed_check
> reloc_signed_max
|| signed_check
< reloc_signed_min
)
11280 if ((lower_insn
& 0x5000) == 0x4000)
11281 /* For a BLX instruction, make sure that the relocation is rounded up
11282 to a word boundary. This follows the semantics of the instruction
11283 which specifies that bit 1 of the target address will come from bit
11284 1 of the base address. */
11285 relocation
= (relocation
+ 2) & ~ 3;
11287 /* Put RELOCATION back into the insn. Assumes two's complement.
11288 We use the Thumb-2 encoding, which is safe even if dealing with
11289 a Thumb-1 instruction by virtue of our overflow check above. */
11290 reloc_sign
= (signed_check
< 0) ? 1 : 0;
11291 upper_insn
= (upper_insn
& ~(bfd_vma
) 0x7ff)
11292 | ((relocation
>> 12) & 0x3ff)
11293 | (reloc_sign
<< 10);
11294 lower_insn
= (lower_insn
& ~(bfd_vma
) 0x2fff)
11295 | (((!((relocation
>> 23) & 1)) ^ reloc_sign
) << 13)
11296 | (((!((relocation
>> 22) & 1)) ^ reloc_sign
) << 11)
11297 | ((relocation
>> 1) & 0x7ff);
11299 /* Put the relocated value back in the object file: */
11300 bfd_put_16 (input_bfd
, upper_insn
, hit_data
);
11301 bfd_put_16 (input_bfd
, lower_insn
, hit_data
+ 2);
11303 return (overflow
? bfd_reloc_overflow
: bfd_reloc_ok
);
11307 case R_ARM_THM_JUMP19
:
11308 /* Thumb32 conditional branch instruction. */
11310 bfd_vma relocation
;
11311 bfd_boolean overflow
= FALSE
;
11312 bfd_vma upper_insn
= bfd_get_16 (input_bfd
, hit_data
);
11313 bfd_vma lower_insn
= bfd_get_16 (input_bfd
, hit_data
+ 2);
11314 bfd_signed_vma reloc_signed_max
= 0xffffe;
11315 bfd_signed_vma reloc_signed_min
= -0x100000;
11316 bfd_signed_vma signed_check
;
11317 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
11318 struct elf32_arm_stub_hash_entry
*stub_entry
;
11319 struct elf32_arm_link_hash_entry
*hash
;
11321 /* Need to refetch the addend, reconstruct the top three bits,
11322 and squish the two 11 bit pieces together. */
11323 if (globals
->use_rel
)
11325 bfd_vma S
= (upper_insn
& 0x0400) >> 10;
11326 bfd_vma upper
= (upper_insn
& 0x003f);
11327 bfd_vma J1
= (lower_insn
& 0x2000) >> 13;
11328 bfd_vma J2
= (lower_insn
& 0x0800) >> 11;
11329 bfd_vma lower
= (lower_insn
& 0x07ff);
11333 upper
|= (!S
) << 8;
11334 upper
-= 0x0100; /* Sign extend. */
11336 addend
= (upper
<< 12) | (lower
<< 1);
11337 signed_addend
= addend
;
11340 /* Handle calls via the PLT. */
11341 if (plt_offset
!= (bfd_vma
) -1)
11343 value
= (splt
->output_section
->vma
11344 + splt
->output_offset
11346 /* Target the Thumb stub before the ARM PLT entry. */
11347 value
-= PLT_THUMB_STUB_SIZE
;
11348 *unresolved_reloc_p
= FALSE
;
11351 hash
= (struct elf32_arm_link_hash_entry
*)h
;
11353 stub_type
= arm_type_of_stub (info
, input_section
, rel
,
11354 st_type
, &branch_type
,
11355 hash
, value
, sym_sec
,
11356 input_bfd
, sym_name
);
11357 if (stub_type
!= arm_stub_none
)
11359 stub_entry
= elf32_arm_get_stub_entry (input_section
,
11363 if (stub_entry
!= NULL
)
11365 value
= (stub_entry
->stub_offset
11366 + stub_entry
->stub_sec
->output_offset
11367 + stub_entry
->stub_sec
->output_section
->vma
);
11371 relocation
= value
+ signed_addend
;
11372 relocation
-= (input_section
->output_section
->vma
11373 + input_section
->output_offset
11375 signed_check
= (bfd_signed_vma
) relocation
;
11377 if (signed_check
> reloc_signed_max
|| signed_check
< reloc_signed_min
)
11380 /* Put RELOCATION back into the insn. */
11382 bfd_vma S
= (relocation
& 0x00100000) >> 20;
11383 bfd_vma J2
= (relocation
& 0x00080000) >> 19;
11384 bfd_vma J1
= (relocation
& 0x00040000) >> 18;
11385 bfd_vma hi
= (relocation
& 0x0003f000) >> 12;
11386 bfd_vma lo
= (relocation
& 0x00000ffe) >> 1;
11388 upper_insn
= (upper_insn
& 0xfbc0) | (S
<< 10) | hi
;
11389 lower_insn
= (lower_insn
& 0xd000) | (J1
<< 13) | (J2
<< 11) | lo
;
11392 /* Put the relocated value back in the object file: */
11393 bfd_put_16 (input_bfd
, upper_insn
, hit_data
);
11394 bfd_put_16 (input_bfd
, lower_insn
, hit_data
+ 2);
11396 return (overflow
? bfd_reloc_overflow
: bfd_reloc_ok
);
11399 case R_ARM_THM_JUMP11
:
11400 case R_ARM_THM_JUMP8
:
11401 case R_ARM_THM_JUMP6
:
11402 /* Thumb B (branch) instruction). */
11404 bfd_signed_vma relocation
;
11405 bfd_signed_vma reloc_signed_max
= (1 << (howto
->bitsize
- 1)) - 1;
11406 bfd_signed_vma reloc_signed_min
= ~ reloc_signed_max
;
11407 bfd_signed_vma signed_check
;
11409 /* CZB cannot jump backward. */
11410 if (r_type
== R_ARM_THM_JUMP6
)
11411 reloc_signed_min
= 0;
11413 if (globals
->use_rel
)
11415 /* Need to refetch addend. */
11416 addend
= bfd_get_16 (input_bfd
, hit_data
) & howto
->src_mask
;
11417 if (addend
& ((howto
->src_mask
+ 1) >> 1))
11419 signed_addend
= -1;
11420 signed_addend
&= ~ howto
->src_mask
;
11421 signed_addend
|= addend
;
11424 signed_addend
= addend
;
11425 /* The value in the insn has been right shifted. We need to
11426 undo this, so that we can perform the address calculation
11427 in terms of bytes. */
11428 signed_addend
<<= howto
->rightshift
;
11430 relocation
= value
+ signed_addend
;
11432 relocation
-= (input_section
->output_section
->vma
11433 + input_section
->output_offset
11436 relocation
>>= howto
->rightshift
;
11437 signed_check
= relocation
;
11439 if (r_type
== R_ARM_THM_JUMP6
)
11440 relocation
= ((relocation
& 0x0020) << 4) | ((relocation
& 0x001f) << 3);
11442 relocation
&= howto
->dst_mask
;
11443 relocation
|= (bfd_get_16 (input_bfd
, hit_data
) & (~ howto
->dst_mask
));
11445 bfd_put_16 (input_bfd
, relocation
, hit_data
);
11447 /* Assumes two's complement. */
11448 if (signed_check
> reloc_signed_max
|| signed_check
< reloc_signed_min
)
11449 return bfd_reloc_overflow
;
11451 return bfd_reloc_ok
;
11454 case R_ARM_ALU_PCREL7_0
:
11455 case R_ARM_ALU_PCREL15_8
:
11456 case R_ARM_ALU_PCREL23_15
:
11459 bfd_vma relocation
;
11461 insn
= bfd_get_32 (input_bfd
, hit_data
);
11462 if (globals
->use_rel
)
11464 /* Extract the addend. */
11465 addend
= (insn
& 0xff) << ((insn
& 0xf00) >> 7);
11466 signed_addend
= addend
;
11468 relocation
= value
+ signed_addend
;
11470 relocation
-= (input_section
->output_section
->vma
11471 + input_section
->output_offset
11473 insn
= (insn
& ~0xfff)
11474 | ((howto
->bitpos
<< 7) & 0xf00)
11475 | ((relocation
>> howto
->bitpos
) & 0xff);
11476 bfd_put_32 (input_bfd
, value
, hit_data
);
11478 return bfd_reloc_ok
;
11480 case R_ARM_GNU_VTINHERIT
:
11481 case R_ARM_GNU_VTENTRY
:
11482 return bfd_reloc_ok
;
11484 case R_ARM_GOTOFF32
:
11485 /* Relocation is relative to the start of the
11486 global offset table. */
11488 BFD_ASSERT (sgot
!= NULL
);
11490 return bfd_reloc_notsupported
;
11492 /* If we are addressing a Thumb function, we need to adjust the
11493 address by one, so that attempts to call the function pointer will
11494 correctly interpret it as Thumb code. */
11495 if (branch_type
== ST_BRANCH_TO_THUMB
)
11498 /* Note that sgot->output_offset is not involved in this
11499 calculation. We always want the start of .got. If we
11500 define _GLOBAL_OFFSET_TABLE in a different way, as is
11501 permitted by the ABI, we might have to change this
11503 value
-= sgot
->output_section
->vma
;
11504 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
11505 contents
, rel
->r_offset
, value
,
11509 /* Use global offset table as symbol value. */
11510 BFD_ASSERT (sgot
!= NULL
);
11513 return bfd_reloc_notsupported
;
11515 *unresolved_reloc_p
= FALSE
;
11516 value
= sgot
->output_section
->vma
;
11517 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
11518 contents
, rel
->r_offset
, value
,
11522 case R_ARM_GOT_PREL
:
11523 /* Relocation is to the entry for this symbol in the
11524 global offset table. */
11526 return bfd_reloc_notsupported
;
11528 if (dynreloc_st_type
== STT_GNU_IFUNC
11529 && plt_offset
!= (bfd_vma
) -1
11530 && (h
== NULL
|| SYMBOL_REFERENCES_LOCAL (info
, h
)))
11532 /* We have a relocation against a locally-binding STT_GNU_IFUNC
11533 symbol, and the relocation resolves directly to the runtime
11534 target rather than to the .iplt entry. This means that any
11535 .got entry would be the same value as the .igot.plt entry,
11536 so there's no point creating both. */
11537 sgot
= globals
->root
.igotplt
;
11538 value
= sgot
->output_offset
+ gotplt_offset
;
11540 else if (h
!= NULL
)
11544 off
= h
->got
.offset
;
11545 BFD_ASSERT (off
!= (bfd_vma
) -1);
11546 if ((off
& 1) != 0)
11548 /* We have already processsed one GOT relocation against
11551 if (globals
->root
.dynamic_sections_created
11552 && !SYMBOL_REFERENCES_LOCAL (info
, h
))
11553 *unresolved_reloc_p
= FALSE
;
11557 Elf_Internal_Rela outrel
;
11560 if (((h
->dynindx
!= -1) || globals
->fdpic_p
)
11561 && !SYMBOL_REFERENCES_LOCAL (info
, h
))
11563 /* If the symbol doesn't resolve locally in a static
11564 object, we have an undefined reference. If the
11565 symbol doesn't resolve locally in a dynamic object,
11566 it should be resolved by the dynamic linker. */
11567 if (globals
->root
.dynamic_sections_created
)
11569 outrel
.r_info
= ELF32_R_INFO (h
->dynindx
, R_ARM_GLOB_DAT
);
11570 *unresolved_reloc_p
= FALSE
;
11574 outrel
.r_addend
= 0;
11578 if (dynreloc_st_type
== STT_GNU_IFUNC
)
11579 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_IRELATIVE
);
11580 else if (bfd_link_pic (info
)
11581 && !UNDEFWEAK_NO_DYNAMIC_RELOC (info
, h
))
11582 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_RELATIVE
);
11586 if (globals
->fdpic_p
)
11589 outrel
.r_addend
= dynreloc_value
;
11592 /* The GOT entry is initialized to zero by default.
11593 See if we should install a different value. */
11594 if (outrel
.r_addend
!= 0
11595 && (globals
->use_rel
|| outrel
.r_info
== 0))
11597 bfd_put_32 (output_bfd
, outrel
.r_addend
,
11598 sgot
->contents
+ off
);
11599 outrel
.r_addend
= 0;
11603 arm_elf_add_rofixup (output_bfd
,
11604 elf32_arm_hash_table(info
)->srofixup
,
11605 sgot
->output_section
->vma
11606 + sgot
->output_offset
+ off
);
11608 else if (outrel
.r_info
!= 0)
11610 outrel
.r_offset
= (sgot
->output_section
->vma
11611 + sgot
->output_offset
11613 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
11616 h
->got
.offset
|= 1;
11618 value
= sgot
->output_offset
+ off
;
11624 BFD_ASSERT (local_got_offsets
!= NULL
11625 && local_got_offsets
[r_symndx
] != (bfd_vma
) -1);
11627 off
= local_got_offsets
[r_symndx
];
11629 /* The offset must always be a multiple of 4. We use the
11630 least significant bit to record whether we have already
11631 generated the necessary reloc. */
11632 if ((off
& 1) != 0)
11636 Elf_Internal_Rela outrel
;
11639 if (dynreloc_st_type
== STT_GNU_IFUNC
)
11640 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_IRELATIVE
);
11641 else if (bfd_link_pic (info
))
11642 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_RELATIVE
);
11646 if (globals
->fdpic_p
)
11650 /* The GOT entry is initialized to zero by default.
11651 See if we should install a different value. */
11652 if (globals
->use_rel
|| outrel
.r_info
== 0)
11653 bfd_put_32 (output_bfd
, dynreloc_value
, sgot
->contents
+ off
);
11656 arm_elf_add_rofixup (output_bfd
,
11658 sgot
->output_section
->vma
11659 + sgot
->output_offset
+ off
);
11661 else if (outrel
.r_info
!= 0)
11663 outrel
.r_addend
= addend
+ dynreloc_value
;
11664 outrel
.r_offset
= (sgot
->output_section
->vma
11665 + sgot
->output_offset
11667 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
11670 local_got_offsets
[r_symndx
] |= 1;
11673 value
= sgot
->output_offset
+ off
;
11675 if (r_type
!= R_ARM_GOT32
)
11676 value
+= sgot
->output_section
->vma
;
11678 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
11679 contents
, rel
->r_offset
, value
,
11682 case R_ARM_TLS_LDO32
:
11683 value
= value
- dtpoff_base (info
);
11685 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
11686 contents
, rel
->r_offset
, value
,
11689 case R_ARM_TLS_LDM32
:
11690 case R_ARM_TLS_LDM32_FDPIC
:
11697 off
= globals
->tls_ldm_got
.offset
;
11699 if ((off
& 1) != 0)
11703 /* If we don't know the module number, create a relocation
11705 if (bfd_link_dll (info
))
11707 Elf_Internal_Rela outrel
;
11709 if (srelgot
== NULL
)
11712 outrel
.r_addend
= 0;
11713 outrel
.r_offset
= (sgot
->output_section
->vma
11714 + sgot
->output_offset
+ off
);
11715 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32
);
11717 if (globals
->use_rel
)
11718 bfd_put_32 (output_bfd
, outrel
.r_addend
,
11719 sgot
->contents
+ off
);
11721 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
11724 bfd_put_32 (output_bfd
, 1, sgot
->contents
+ off
);
11726 globals
->tls_ldm_got
.offset
|= 1;
11729 if (r_type
== R_ARM_TLS_LDM32_FDPIC
)
11731 bfd_put_32(output_bfd
,
11732 globals
->root
.sgot
->output_offset
+ off
,
11733 contents
+ rel
->r_offset
);
11735 return bfd_reloc_ok
;
11739 value
= sgot
->output_section
->vma
+ sgot
->output_offset
+ off
11740 - (input_section
->output_section
->vma
11741 + input_section
->output_offset
+ rel
->r_offset
);
11743 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
11744 contents
, rel
->r_offset
, value
,
11749 case R_ARM_TLS_CALL
:
11750 case R_ARM_THM_TLS_CALL
:
11751 case R_ARM_TLS_GD32
:
11752 case R_ARM_TLS_GD32_FDPIC
:
11753 case R_ARM_TLS_IE32
:
11754 case R_ARM_TLS_IE32_FDPIC
:
11755 case R_ARM_TLS_GOTDESC
:
11756 case R_ARM_TLS_DESCSEQ
:
11757 case R_ARM_THM_TLS_DESCSEQ
:
11759 bfd_vma off
, offplt
;
11763 BFD_ASSERT (sgot
!= NULL
);
11768 dyn
= globals
->root
.dynamic_sections_created
;
11769 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn
,
11770 bfd_link_pic (info
),
11772 && (!bfd_link_pic (info
)
11773 || !SYMBOL_REFERENCES_LOCAL (info
, h
)))
11775 *unresolved_reloc_p
= FALSE
;
11778 off
= h
->got
.offset
;
11779 offplt
= elf32_arm_hash_entry (h
)->tlsdesc_got
;
11780 tls_type
= ((struct elf32_arm_link_hash_entry
*) h
)->tls_type
;
11784 BFD_ASSERT (local_got_offsets
!= NULL
);
11785 off
= local_got_offsets
[r_symndx
];
11786 offplt
= local_tlsdesc_gotents
[r_symndx
];
11787 tls_type
= elf32_arm_local_got_tls_type (input_bfd
)[r_symndx
];
11790 /* Linker relaxations happens from one of the
11791 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
11792 if (ELF32_R_TYPE(rel
->r_info
) != r_type
)
11793 tls_type
= GOT_TLS_IE
;
11795 BFD_ASSERT (tls_type
!= GOT_UNKNOWN
);
11797 if ((off
& 1) != 0)
11801 bfd_boolean need_relocs
= FALSE
;
11802 Elf_Internal_Rela outrel
;
11805 /* The GOT entries have not been initialized yet. Do it
11806 now, and emit any relocations. If both an IE GOT and a
11807 GD GOT are necessary, we emit the GD first. */
11809 if ((bfd_link_dll (info
) || indx
!= 0)
11811 || (ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
11812 && !resolved_to_zero
)
11813 || h
->root
.type
!= bfd_link_hash_undefweak
))
11815 need_relocs
= TRUE
;
11816 BFD_ASSERT (srelgot
!= NULL
);
11819 if (tls_type
& GOT_TLS_GDESC
)
11823 /* We should have relaxed, unless this is an undefined
11825 BFD_ASSERT ((h
&& (h
->root
.type
== bfd_link_hash_undefweak
))
11826 || bfd_link_dll (info
));
11827 BFD_ASSERT (globals
->sgotplt_jump_table_size
+ offplt
+ 8
11828 <= globals
->root
.sgotplt
->size
);
11830 outrel
.r_addend
= 0;
11831 outrel
.r_offset
= (globals
->root
.sgotplt
->output_section
->vma
11832 + globals
->root
.sgotplt
->output_offset
11834 + globals
->sgotplt_jump_table_size
);
11836 outrel
.r_info
= ELF32_R_INFO (indx
, R_ARM_TLS_DESC
);
11837 sreloc
= globals
->root
.srelplt
;
11838 loc
= sreloc
->contents
;
11839 loc
+= globals
->next_tls_desc_index
++ * RELOC_SIZE (globals
);
11840 BFD_ASSERT (loc
+ RELOC_SIZE (globals
)
11841 <= sreloc
->contents
+ sreloc
->size
);
11843 SWAP_RELOC_OUT (globals
) (output_bfd
, &outrel
, loc
);
11845 /* For globals, the first word in the relocation gets
11846 the relocation index and the top bit set, or zero,
11847 if we're binding now. For locals, it gets the
11848 symbol's offset in the tls section. */
11849 bfd_put_32 (output_bfd
,
11850 !h
? value
- elf_hash_table (info
)->tls_sec
->vma
11851 : info
->flags
& DF_BIND_NOW
? 0
11852 : 0x80000000 | ELF32_R_SYM (outrel
.r_info
),
11853 globals
->root
.sgotplt
->contents
+ offplt
11854 + globals
->sgotplt_jump_table_size
);
11856 /* Second word in the relocation is always zero. */
11857 bfd_put_32 (output_bfd
, 0,
11858 globals
->root
.sgotplt
->contents
+ offplt
11859 + globals
->sgotplt_jump_table_size
+ 4);
11861 if (tls_type
& GOT_TLS_GD
)
11865 outrel
.r_addend
= 0;
11866 outrel
.r_offset
= (sgot
->output_section
->vma
11867 + sgot
->output_offset
11869 outrel
.r_info
= ELF32_R_INFO (indx
, R_ARM_TLS_DTPMOD32
);
11871 if (globals
->use_rel
)
11872 bfd_put_32 (output_bfd
, outrel
.r_addend
,
11873 sgot
->contents
+ cur_off
);
11875 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
11878 bfd_put_32 (output_bfd
, value
- dtpoff_base (info
),
11879 sgot
->contents
+ cur_off
+ 4);
11882 outrel
.r_addend
= 0;
11883 outrel
.r_info
= ELF32_R_INFO (indx
,
11884 R_ARM_TLS_DTPOFF32
);
11885 outrel
.r_offset
+= 4;
11887 if (globals
->use_rel
)
11888 bfd_put_32 (output_bfd
, outrel
.r_addend
,
11889 sgot
->contents
+ cur_off
+ 4);
11891 elf32_arm_add_dynreloc (output_bfd
, info
,
11897 /* If we are not emitting relocations for a
11898 general dynamic reference, then we must be in a
11899 static link or an executable link with the
11900 symbol binding locally. Mark it as belonging
11901 to module 1, the executable. */
11902 bfd_put_32 (output_bfd
, 1,
11903 sgot
->contents
+ cur_off
);
11904 bfd_put_32 (output_bfd
, value
- dtpoff_base (info
),
11905 sgot
->contents
+ cur_off
+ 4);
11911 if (tls_type
& GOT_TLS_IE
)
11916 outrel
.r_addend
= value
- dtpoff_base (info
);
11918 outrel
.r_addend
= 0;
11919 outrel
.r_offset
= (sgot
->output_section
->vma
11920 + sgot
->output_offset
11922 outrel
.r_info
= ELF32_R_INFO (indx
, R_ARM_TLS_TPOFF32
);
11924 if (globals
->use_rel
)
11925 bfd_put_32 (output_bfd
, outrel
.r_addend
,
11926 sgot
->contents
+ cur_off
);
11928 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
11931 bfd_put_32 (output_bfd
, tpoff (info
, value
),
11932 sgot
->contents
+ cur_off
);
11937 h
->got
.offset
|= 1;
11939 local_got_offsets
[r_symndx
] |= 1;
11942 if ((tls_type
& GOT_TLS_GD
) && r_type
!= R_ARM_TLS_GD32
&& r_type
!= R_ARM_TLS_GD32_FDPIC
)
11944 else if (tls_type
& GOT_TLS_GDESC
)
11947 if (ELF32_R_TYPE(rel
->r_info
) == R_ARM_TLS_CALL
11948 || ELF32_R_TYPE(rel
->r_info
) == R_ARM_THM_TLS_CALL
)
11950 bfd_signed_vma offset
;
11951 /* TLS stubs are arm mode. The original symbol is a
11952 data object, so branch_type is bogus. */
11953 branch_type
= ST_BRANCH_TO_ARM
;
11954 enum elf32_arm_stub_type stub_type
11955 = arm_type_of_stub (info
, input_section
, rel
,
11956 st_type
, &branch_type
,
11957 (struct elf32_arm_link_hash_entry
*)h
,
11958 globals
->tls_trampoline
, globals
->root
.splt
,
11959 input_bfd
, sym_name
);
11961 if (stub_type
!= arm_stub_none
)
11963 struct elf32_arm_stub_hash_entry
*stub_entry
11964 = elf32_arm_get_stub_entry
11965 (input_section
, globals
->root
.splt
, 0, rel
,
11966 globals
, stub_type
);
11967 offset
= (stub_entry
->stub_offset
11968 + stub_entry
->stub_sec
->output_offset
11969 + stub_entry
->stub_sec
->output_section
->vma
);
11972 offset
= (globals
->root
.splt
->output_section
->vma
11973 + globals
->root
.splt
->output_offset
11974 + globals
->tls_trampoline
);
11976 if (ELF32_R_TYPE(rel
->r_info
) == R_ARM_TLS_CALL
)
11978 unsigned long inst
;
11980 offset
-= (input_section
->output_section
->vma
11981 + input_section
->output_offset
11982 + rel
->r_offset
+ 8);
11984 inst
= offset
>> 2;
11985 inst
&= 0x00ffffff;
11986 value
= inst
| (globals
->use_blx
? 0xfa000000 : 0xeb000000);
11990 /* Thumb blx encodes the offset in a complicated
11992 unsigned upper_insn
, lower_insn
;
11995 offset
-= (input_section
->output_section
->vma
11996 + input_section
->output_offset
11997 + rel
->r_offset
+ 4);
11999 if (stub_type
!= arm_stub_none
12000 && arm_stub_is_thumb (stub_type
))
12002 lower_insn
= 0xd000;
12006 lower_insn
= 0xc000;
12007 /* Round up the offset to a word boundary. */
12008 offset
= (offset
+ 2) & ~2;
12012 upper_insn
= (0xf000
12013 | ((offset
>> 12) & 0x3ff)
12015 lower_insn
|= (((!((offset
>> 23) & 1)) ^ neg
) << 13)
12016 | (((!((offset
>> 22) & 1)) ^ neg
) << 11)
12017 | ((offset
>> 1) & 0x7ff);
12018 bfd_put_16 (input_bfd
, upper_insn
, hit_data
);
12019 bfd_put_16 (input_bfd
, lower_insn
, hit_data
+ 2);
12020 return bfd_reloc_ok
;
12023 /* These relocations needs special care, as besides the fact
12024 they point somewhere in .gotplt, the addend must be
12025 adjusted accordingly depending on the type of instruction
12027 else if ((r_type
== R_ARM_TLS_GOTDESC
) && (tls_type
& GOT_TLS_GDESC
))
12029 unsigned long data
, insn
;
12032 data
= bfd_get_signed_32 (input_bfd
, hit_data
);
12038 insn
= bfd_get_16 (input_bfd
, contents
+ rel
->r_offset
- data
);
12039 if ((insn
& 0xf000) == 0xf000 || (insn
& 0xf800) == 0xe800)
12040 insn
= (insn
<< 16)
12041 | bfd_get_16 (input_bfd
,
12042 contents
+ rel
->r_offset
- data
+ 2);
12043 if ((insn
& 0xf800c000) == 0xf000c000)
12046 else if ((insn
& 0xffffff00) == 0x4400)
12052 /* xgettext:c-format */
12053 (_("%pB(%pA+%#" PRIx64
"): "
12054 "unexpected %s instruction '%#lx' "
12055 "referenced by TLS_GOTDESC"),
12056 input_bfd
, input_section
, (uint64_t) rel
->r_offset
,
12058 return bfd_reloc_notsupported
;
12063 insn
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
- data
);
12065 switch (insn
>> 24)
12067 case 0xeb: /* bl */
12068 case 0xfa: /* blx */
12072 case 0xe0: /* add */
12078 /* xgettext:c-format */
12079 (_("%pB(%pA+%#" PRIx64
"): "
12080 "unexpected %s instruction '%#lx' "
12081 "referenced by TLS_GOTDESC"),
12082 input_bfd
, input_section
, (uint64_t) rel
->r_offset
,
12084 return bfd_reloc_notsupported
;
12088 value
+= ((globals
->root
.sgotplt
->output_section
->vma
12089 + globals
->root
.sgotplt
->output_offset
+ off
)
12090 - (input_section
->output_section
->vma
12091 + input_section
->output_offset
12093 + globals
->sgotplt_jump_table_size
);
12096 value
= ((globals
->root
.sgot
->output_section
->vma
12097 + globals
->root
.sgot
->output_offset
+ off
)
12098 - (input_section
->output_section
->vma
12099 + input_section
->output_offset
+ rel
->r_offset
));
12101 if (globals
->fdpic_p
&& (r_type
== R_ARM_TLS_GD32_FDPIC
||
12102 r_type
== R_ARM_TLS_IE32_FDPIC
))
12104 /* For FDPIC relocations, resolve to the offset of the GOT
12105 entry from the start of GOT. */
12106 bfd_put_32(output_bfd
,
12107 globals
->root
.sgot
->output_offset
+ off
,
12108 contents
+ rel
->r_offset
);
12110 return bfd_reloc_ok
;
12114 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
12115 contents
, rel
->r_offset
, value
,
12120 case R_ARM_TLS_LE32
:
12121 if (bfd_link_dll (info
))
12124 /* xgettext:c-format */
12125 (_("%pB(%pA+%#" PRIx64
"): %s relocation not permitted "
12126 "in shared object"),
12127 input_bfd
, input_section
, (uint64_t) rel
->r_offset
, howto
->name
);
12128 return bfd_reloc_notsupported
;
12131 value
= tpoff (info
, value
);
12133 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
12134 contents
, rel
->r_offset
, value
,
12138 if (globals
->fix_v4bx
)
12140 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
12142 /* Ensure that we have a BX instruction. */
12143 BFD_ASSERT ((insn
& 0x0ffffff0) == 0x012fff10);
12145 if (globals
->fix_v4bx
== 2 && (insn
& 0xf) != 0xf)
12147 /* Branch to veneer. */
12149 glue_addr
= elf32_arm_bx_glue (info
, insn
& 0xf);
12150 glue_addr
-= input_section
->output_section
->vma
12151 + input_section
->output_offset
12152 + rel
->r_offset
+ 8;
12153 insn
= (insn
& 0xf0000000) | 0x0a000000
12154 | ((glue_addr
>> 2) & 0x00ffffff);
12158 /* Preserve Rm (lowest four bits) and the condition code
12159 (highest four bits). Other bits encode MOV PC,Rm. */
12160 insn
= (insn
& 0xf000000f) | 0x01a0f000;
12163 bfd_put_32 (input_bfd
, insn
, hit_data
);
12165 return bfd_reloc_ok
;
12167 case R_ARM_MOVW_ABS_NC
:
12168 case R_ARM_MOVT_ABS
:
12169 case R_ARM_MOVW_PREL_NC
:
12170 case R_ARM_MOVT_PREL
:
12171 /* Until we properly support segment-base-relative addressing then
12172 we assume the segment base to be zero, as for the group relocations.
12173 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
12174 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
12175 case R_ARM_MOVW_BREL_NC
:
12176 case R_ARM_MOVW_BREL
:
12177 case R_ARM_MOVT_BREL
:
12179 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
12181 if (globals
->use_rel
)
12183 addend
= ((insn
>> 4) & 0xf000) | (insn
& 0xfff);
12184 signed_addend
= (addend
^ 0x8000) - 0x8000;
12187 value
+= signed_addend
;
12189 if (r_type
== R_ARM_MOVW_PREL_NC
|| r_type
== R_ARM_MOVT_PREL
)
12190 value
-= (input_section
->output_section
->vma
12191 + input_section
->output_offset
+ rel
->r_offset
);
12193 if (r_type
== R_ARM_MOVW_BREL
&& value
>= 0x10000)
12194 return bfd_reloc_overflow
;
12196 if (branch_type
== ST_BRANCH_TO_THUMB
)
12199 if (r_type
== R_ARM_MOVT_ABS
|| r_type
== R_ARM_MOVT_PREL
12200 || r_type
== R_ARM_MOVT_BREL
)
12203 insn
&= 0xfff0f000;
12204 insn
|= value
& 0xfff;
12205 insn
|= (value
& 0xf000) << 4;
12206 bfd_put_32 (input_bfd
, insn
, hit_data
);
12208 return bfd_reloc_ok
;
12210 case R_ARM_THM_MOVW_ABS_NC
:
12211 case R_ARM_THM_MOVT_ABS
:
12212 case R_ARM_THM_MOVW_PREL_NC
:
12213 case R_ARM_THM_MOVT_PREL
:
12214 /* Until we properly support segment-base-relative addressing then
12215 we assume the segment base to be zero, as for the above relocations.
12216 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
12217 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
12218 as R_ARM_THM_MOVT_ABS. */
12219 case R_ARM_THM_MOVW_BREL_NC
:
12220 case R_ARM_THM_MOVW_BREL
:
12221 case R_ARM_THM_MOVT_BREL
:
12225 insn
= bfd_get_16 (input_bfd
, hit_data
) << 16;
12226 insn
|= bfd_get_16 (input_bfd
, hit_data
+ 2);
12228 if (globals
->use_rel
)
12230 addend
= ((insn
>> 4) & 0xf000)
12231 | ((insn
>> 15) & 0x0800)
12232 | ((insn
>> 4) & 0x0700)
12234 signed_addend
= (addend
^ 0x8000) - 0x8000;
12237 value
+= signed_addend
;
12239 if (r_type
== R_ARM_THM_MOVW_PREL_NC
|| r_type
== R_ARM_THM_MOVT_PREL
)
12240 value
-= (input_section
->output_section
->vma
12241 + input_section
->output_offset
+ rel
->r_offset
);
12243 if (r_type
== R_ARM_THM_MOVW_BREL
&& value
>= 0x10000)
12244 return bfd_reloc_overflow
;
12246 if (branch_type
== ST_BRANCH_TO_THUMB
)
12249 if (r_type
== R_ARM_THM_MOVT_ABS
|| r_type
== R_ARM_THM_MOVT_PREL
12250 || r_type
== R_ARM_THM_MOVT_BREL
)
12253 insn
&= 0xfbf08f00;
12254 insn
|= (value
& 0xf000) << 4;
12255 insn
|= (value
& 0x0800) << 15;
12256 insn
|= (value
& 0x0700) << 4;
12257 insn
|= (value
& 0x00ff);
12259 bfd_put_16 (input_bfd
, insn
>> 16, hit_data
);
12260 bfd_put_16 (input_bfd
, insn
& 0xffff, hit_data
+ 2);
12262 return bfd_reloc_ok
;
12264 case R_ARM_ALU_PC_G0_NC
:
12265 case R_ARM_ALU_PC_G1_NC
:
12266 case R_ARM_ALU_PC_G0
:
12267 case R_ARM_ALU_PC_G1
:
12268 case R_ARM_ALU_PC_G2
:
12269 case R_ARM_ALU_SB_G0_NC
:
12270 case R_ARM_ALU_SB_G1_NC
:
12271 case R_ARM_ALU_SB_G0
:
12272 case R_ARM_ALU_SB_G1
:
12273 case R_ARM_ALU_SB_G2
:
12275 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
12276 bfd_vma pc
= input_section
->output_section
->vma
12277 + input_section
->output_offset
+ rel
->r_offset
;
12278 /* sb is the origin of the *segment* containing the symbol. */
12279 bfd_vma sb
= sym_sec
? sym_sec
->output_section
->vma
: 0;
12282 bfd_signed_vma signed_value
;
12285 /* Determine which group of bits to select. */
12288 case R_ARM_ALU_PC_G0_NC
:
12289 case R_ARM_ALU_PC_G0
:
12290 case R_ARM_ALU_SB_G0_NC
:
12291 case R_ARM_ALU_SB_G0
:
12295 case R_ARM_ALU_PC_G1_NC
:
12296 case R_ARM_ALU_PC_G1
:
12297 case R_ARM_ALU_SB_G1_NC
:
12298 case R_ARM_ALU_SB_G1
:
12302 case R_ARM_ALU_PC_G2
:
12303 case R_ARM_ALU_SB_G2
:
12311 /* If REL, extract the addend from the insn. If RELA, it will
12312 have already been fetched for us. */
12313 if (globals
->use_rel
)
12316 bfd_vma constant
= insn
& 0xff;
12317 bfd_vma rotation
= (insn
& 0xf00) >> 8;
12320 signed_addend
= constant
;
12323 /* Compensate for the fact that in the instruction, the
12324 rotation is stored in multiples of 2 bits. */
12327 /* Rotate "constant" right by "rotation" bits. */
12328 signed_addend
= (constant
>> rotation
) |
12329 (constant
<< (8 * sizeof (bfd_vma
) - rotation
));
12332 /* Determine if the instruction is an ADD or a SUB.
12333 (For REL, this determines the sign of the addend.) */
12334 negative
= identify_add_or_sub (insn
);
12338 /* xgettext:c-format */
12339 (_("%pB(%pA+%#" PRIx64
"): only ADD or SUB instructions "
12340 "are allowed for ALU group relocations"),
12341 input_bfd
, input_section
, (uint64_t) rel
->r_offset
);
12342 return bfd_reloc_overflow
;
12345 signed_addend
*= negative
;
12348 /* Compute the value (X) to go in the place. */
12349 if (r_type
== R_ARM_ALU_PC_G0_NC
12350 || r_type
== R_ARM_ALU_PC_G1_NC
12351 || r_type
== R_ARM_ALU_PC_G0
12352 || r_type
== R_ARM_ALU_PC_G1
12353 || r_type
== R_ARM_ALU_PC_G2
)
12355 signed_value
= value
- pc
+ signed_addend
;
12357 /* Section base relative. */
12358 signed_value
= value
- sb
+ signed_addend
;
12360 /* If the target symbol is a Thumb function, then set the
12361 Thumb bit in the address. */
12362 if (branch_type
== ST_BRANCH_TO_THUMB
)
12365 /* Calculate the value of the relevant G_n, in encoded
12366 constant-with-rotation format. */
12367 g_n
= calculate_group_reloc_mask (signed_value
< 0 ? - signed_value
: signed_value
,
12370 /* Check for overflow if required. */
12371 if ((r_type
== R_ARM_ALU_PC_G0
12372 || r_type
== R_ARM_ALU_PC_G1
12373 || r_type
== R_ARM_ALU_PC_G2
12374 || r_type
== R_ARM_ALU_SB_G0
12375 || r_type
== R_ARM_ALU_SB_G1
12376 || r_type
== R_ARM_ALU_SB_G2
) && residual
!= 0)
12379 /* xgettext:c-format */
12380 (_("%pB(%pA+%#" PRIx64
"): overflow whilst "
12381 "splitting %#" PRIx64
" for group relocation %s"),
12382 input_bfd
, input_section
, (uint64_t) rel
->r_offset
,
12383 (uint64_t) (signed_value
< 0 ? -signed_value
: signed_value
),
12385 return bfd_reloc_overflow
;
12388 /* Mask out the value and the ADD/SUB part of the opcode; take care
12389 not to destroy the S bit. */
12390 insn
&= 0xff1ff000;
12392 /* Set the opcode according to whether the value to go in the
12393 place is negative. */
12394 if (signed_value
< 0)
12399 /* Encode the offset. */
12402 bfd_put_32 (input_bfd
, insn
, hit_data
);
12404 return bfd_reloc_ok
;
12406 case R_ARM_LDR_PC_G0
:
12407 case R_ARM_LDR_PC_G1
:
12408 case R_ARM_LDR_PC_G2
:
12409 case R_ARM_LDR_SB_G0
:
12410 case R_ARM_LDR_SB_G1
:
12411 case R_ARM_LDR_SB_G2
:
12413 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
12414 bfd_vma pc
= input_section
->output_section
->vma
12415 + input_section
->output_offset
+ rel
->r_offset
;
12416 /* sb is the origin of the *segment* containing the symbol. */
12417 bfd_vma sb
= sym_sec
? sym_sec
->output_section
->vma
: 0;
12419 bfd_signed_vma signed_value
;
12422 /* Determine which groups of bits to calculate. */
12425 case R_ARM_LDR_PC_G0
:
12426 case R_ARM_LDR_SB_G0
:
12430 case R_ARM_LDR_PC_G1
:
12431 case R_ARM_LDR_SB_G1
:
12435 case R_ARM_LDR_PC_G2
:
12436 case R_ARM_LDR_SB_G2
:
12444 /* If REL, extract the addend from the insn. If RELA, it will
12445 have already been fetched for us. */
12446 if (globals
->use_rel
)
12448 int negative
= (insn
& (1 << 23)) ? 1 : -1;
12449 signed_addend
= negative
* (insn
& 0xfff);
12452 /* Compute the value (X) to go in the place. */
12453 if (r_type
== R_ARM_LDR_PC_G0
12454 || r_type
== R_ARM_LDR_PC_G1
12455 || r_type
== R_ARM_LDR_PC_G2
)
12457 signed_value
= value
- pc
+ signed_addend
;
12459 /* Section base relative. */
12460 signed_value
= value
- sb
+ signed_addend
;
12462 /* Calculate the value of the relevant G_{n-1} to obtain
12463 the residual at that stage. */
12464 calculate_group_reloc_mask (signed_value
< 0 ? - signed_value
: signed_value
,
12465 group
- 1, &residual
);
12467 /* Check for overflow. */
12468 if (residual
>= 0x1000)
12471 /* xgettext:c-format */
12472 (_("%pB(%pA+%#" PRIx64
"): overflow whilst "
12473 "splitting %#" PRIx64
" for group relocation %s"),
12474 input_bfd
, input_section
, (uint64_t) rel
->r_offset
,
12475 (uint64_t) (signed_value
< 0 ? -signed_value
: signed_value
),
12477 return bfd_reloc_overflow
;
12480 /* Mask out the value and U bit. */
12481 insn
&= 0xff7ff000;
12483 /* Set the U bit if the value to go in the place is non-negative. */
12484 if (signed_value
>= 0)
12487 /* Encode the offset. */
12490 bfd_put_32 (input_bfd
, insn
, hit_data
);
12492 return bfd_reloc_ok
;
12494 case R_ARM_LDRS_PC_G0
:
12495 case R_ARM_LDRS_PC_G1
:
12496 case R_ARM_LDRS_PC_G2
:
12497 case R_ARM_LDRS_SB_G0
:
12498 case R_ARM_LDRS_SB_G1
:
12499 case R_ARM_LDRS_SB_G2
:
12501 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
12502 bfd_vma pc
= input_section
->output_section
->vma
12503 + input_section
->output_offset
+ rel
->r_offset
;
12504 /* sb is the origin of the *segment* containing the symbol. */
12505 bfd_vma sb
= sym_sec
? sym_sec
->output_section
->vma
: 0;
12507 bfd_signed_vma signed_value
;
12510 /* Determine which groups of bits to calculate. */
12513 case R_ARM_LDRS_PC_G0
:
12514 case R_ARM_LDRS_SB_G0
:
12518 case R_ARM_LDRS_PC_G1
:
12519 case R_ARM_LDRS_SB_G1
:
12523 case R_ARM_LDRS_PC_G2
:
12524 case R_ARM_LDRS_SB_G2
:
12532 /* If REL, extract the addend from the insn. If RELA, it will
12533 have already been fetched for us. */
12534 if (globals
->use_rel
)
12536 int negative
= (insn
& (1 << 23)) ? 1 : -1;
12537 signed_addend
= negative
* (((insn
& 0xf00) >> 4) + (insn
& 0xf));
12540 /* Compute the value (X) to go in the place. */
12541 if (r_type
== R_ARM_LDRS_PC_G0
12542 || r_type
== R_ARM_LDRS_PC_G1
12543 || r_type
== R_ARM_LDRS_PC_G2
)
12545 signed_value
= value
- pc
+ signed_addend
;
12547 /* Section base relative. */
12548 signed_value
= value
- sb
+ signed_addend
;
12550 /* Calculate the value of the relevant G_{n-1} to obtain
12551 the residual at that stage. */
12552 calculate_group_reloc_mask (signed_value
< 0 ? - signed_value
: signed_value
,
12553 group
- 1, &residual
);
12555 /* Check for overflow. */
12556 if (residual
>= 0x100)
12559 /* xgettext:c-format */
12560 (_("%pB(%pA+%#" PRIx64
"): overflow whilst "
12561 "splitting %#" PRIx64
" for group relocation %s"),
12562 input_bfd
, input_section
, (uint64_t) rel
->r_offset
,
12563 (uint64_t) (signed_value
< 0 ? -signed_value
: signed_value
),
12565 return bfd_reloc_overflow
;
12568 /* Mask out the value and U bit. */
12569 insn
&= 0xff7ff0f0;
12571 /* Set the U bit if the value to go in the place is non-negative. */
12572 if (signed_value
>= 0)
12575 /* Encode the offset. */
12576 insn
|= ((residual
& 0xf0) << 4) | (residual
& 0xf);
12578 bfd_put_32 (input_bfd
, insn
, hit_data
);
12580 return bfd_reloc_ok
;
12582 case R_ARM_LDC_PC_G0
:
12583 case R_ARM_LDC_PC_G1
:
12584 case R_ARM_LDC_PC_G2
:
12585 case R_ARM_LDC_SB_G0
:
12586 case R_ARM_LDC_SB_G1
:
12587 case R_ARM_LDC_SB_G2
:
12589 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
12590 bfd_vma pc
= input_section
->output_section
->vma
12591 + input_section
->output_offset
+ rel
->r_offset
;
12592 /* sb is the origin of the *segment* containing the symbol. */
12593 bfd_vma sb
= sym_sec
? sym_sec
->output_section
->vma
: 0;
12595 bfd_signed_vma signed_value
;
12598 /* Determine which groups of bits to calculate. */
12601 case R_ARM_LDC_PC_G0
:
12602 case R_ARM_LDC_SB_G0
:
12606 case R_ARM_LDC_PC_G1
:
12607 case R_ARM_LDC_SB_G1
:
12611 case R_ARM_LDC_PC_G2
:
12612 case R_ARM_LDC_SB_G2
:
12620 /* If REL, extract the addend from the insn. If RELA, it will
12621 have already been fetched for us. */
12622 if (globals
->use_rel
)
12624 int negative
= (insn
& (1 << 23)) ? 1 : -1;
12625 signed_addend
= negative
* ((insn
& 0xff) << 2);
12628 /* Compute the value (X) to go in the place. */
12629 if (r_type
== R_ARM_LDC_PC_G0
12630 || r_type
== R_ARM_LDC_PC_G1
12631 || r_type
== R_ARM_LDC_PC_G2
)
12633 signed_value
= value
- pc
+ signed_addend
;
12635 /* Section base relative. */
12636 signed_value
= value
- sb
+ signed_addend
;
12638 /* Calculate the value of the relevant G_{n-1} to obtain
12639 the residual at that stage. */
12640 calculate_group_reloc_mask (signed_value
< 0 ? - signed_value
: signed_value
,
12641 group
- 1, &residual
);
12643 /* Check for overflow. (The absolute value to go in the place must be
12644 divisible by four and, after having been divided by four, must
12645 fit in eight bits.) */
12646 if ((residual
& 0x3) != 0 || residual
>= 0x400)
12649 /* xgettext:c-format */
12650 (_("%pB(%pA+%#" PRIx64
"): overflow whilst "
12651 "splitting %#" PRIx64
" for group relocation %s"),
12652 input_bfd
, input_section
, (uint64_t) rel
->r_offset
,
12653 (uint64_t) (signed_value
< 0 ? -signed_value
: signed_value
),
12655 return bfd_reloc_overflow
;
12658 /* Mask out the value and U bit. */
12659 insn
&= 0xff7fff00;
12661 /* Set the U bit if the value to go in the place is non-negative. */
12662 if (signed_value
>= 0)
12665 /* Encode the offset. */
12666 insn
|= residual
>> 2;
12668 bfd_put_32 (input_bfd
, insn
, hit_data
);
12670 return bfd_reloc_ok
;
12672 case R_ARM_THM_ALU_ABS_G0_NC
:
12673 case R_ARM_THM_ALU_ABS_G1_NC
:
12674 case R_ARM_THM_ALU_ABS_G2_NC
:
12675 case R_ARM_THM_ALU_ABS_G3_NC
:
12677 const int shift_array
[4] = {0, 8, 16, 24};
12678 bfd_vma insn
= bfd_get_16 (input_bfd
, hit_data
);
12679 bfd_vma addr
= value
;
12680 int shift
= shift_array
[r_type
- R_ARM_THM_ALU_ABS_G0_NC
];
12682 /* Compute address. */
12683 if (globals
->use_rel
)
12684 signed_addend
= insn
& 0xff;
12685 addr
+= signed_addend
;
12686 if (branch_type
== ST_BRANCH_TO_THUMB
)
12688 /* Clean imm8 insn. */
12690 /* And update with correct part of address. */
12691 insn
|= (addr
>> shift
) & 0xff;
12693 bfd_put_16 (input_bfd
, insn
, hit_data
);
12696 *unresolved_reloc_p
= FALSE
;
12697 return bfd_reloc_ok
;
12699 case R_ARM_GOTOFFFUNCDESC
:
12703 struct fdpic_local
*local_fdpic_cnts
= elf32_arm_local_fdpic_cnts(input_bfd
);
12704 int dynindx
= elf_section_data (sym_sec
->output_section
)->dynindx
;
12705 int offset
= local_fdpic_cnts
[r_symndx
].funcdesc_offset
& ~1;
12706 bfd_vma addr
= dynreloc_value
- sym_sec
->output_section
->vma
;
12709 if (bfd_link_pic(info
) && dynindx
== 0)
12712 /* Resolve relocation. */
12713 bfd_put_32(output_bfd
, (offset
+ sgot
->output_offset
)
12714 , contents
+ rel
->r_offset
);
12715 /* Emit R_ARM_FUNCDESC_VALUE or two fixups on funcdesc if
12717 arm_elf_fill_funcdesc(output_bfd
, info
,
12718 &local_fdpic_cnts
[r_symndx
].funcdesc_offset
,
12719 dynindx
, offset
, addr
, dynreloc_value
, seg
);
12724 int offset
= eh
->fdpic_cnts
.funcdesc_offset
& ~1;
12728 /* For static binaries, sym_sec can be null. */
12731 dynindx
= elf_section_data (sym_sec
->output_section
)->dynindx
;
12732 addr
= dynreloc_value
- sym_sec
->output_section
->vma
;
12740 if (bfd_link_pic(info
) && dynindx
== 0)
12743 /* This case cannot occur since funcdesc is allocated by
12744 the dynamic loader so we cannot resolve the relocation. */
12745 if (h
->dynindx
!= -1)
12748 /* Resolve relocation. */
12749 bfd_put_32(output_bfd
, (offset
+ sgot
->output_offset
),
12750 contents
+ rel
->r_offset
);
12751 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12752 arm_elf_fill_funcdesc(output_bfd
, info
,
12753 &eh
->fdpic_cnts
.funcdesc_offset
,
12754 dynindx
, offset
, addr
, dynreloc_value
, seg
);
12757 *unresolved_reloc_p
= FALSE
;
12758 return bfd_reloc_ok
;
12760 case R_ARM_GOTFUNCDESC
:
12764 Elf_Internal_Rela outrel
;
12766 /* Resolve relocation. */
12767 bfd_put_32(output_bfd
, ((eh
->fdpic_cnts
.gotfuncdesc_offset
& ~1)
12768 + sgot
->output_offset
),
12769 contents
+ rel
->r_offset
);
12770 /* Add funcdesc and associated R_ARM_FUNCDESC_VALUE. */
12771 if(h
->dynindx
== -1)
12774 int offset
= eh
->fdpic_cnts
.funcdesc_offset
& ~1;
12778 /* For static binaries sym_sec can be null. */
12781 dynindx
= elf_section_data (sym_sec
->output_section
)->dynindx
;
12782 addr
= dynreloc_value
- sym_sec
->output_section
->vma
;
12790 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12791 arm_elf_fill_funcdesc(output_bfd
, info
,
12792 &eh
->fdpic_cnts
.funcdesc_offset
,
12793 dynindx
, offset
, addr
, dynreloc_value
, seg
);
12796 /* Add a dynamic relocation on GOT entry if not already done. */
12797 if ((eh
->fdpic_cnts
.gotfuncdesc_offset
& 1) == 0)
12799 if (h
->dynindx
== -1)
12801 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_RELATIVE
);
12802 if (h
->root
.type
== bfd_link_hash_undefweak
)
12803 bfd_put_32(output_bfd
, 0, sgot
->contents
12804 + (eh
->fdpic_cnts
.gotfuncdesc_offset
& ~1));
12806 bfd_put_32(output_bfd
, sgot
->output_section
->vma
12807 + sgot
->output_offset
12808 + (eh
->fdpic_cnts
.funcdesc_offset
& ~1),
12810 + (eh
->fdpic_cnts
.gotfuncdesc_offset
& ~1));
12814 outrel
.r_info
= ELF32_R_INFO (h
->dynindx
, R_ARM_FUNCDESC
);
12816 outrel
.r_offset
= sgot
->output_section
->vma
12817 + sgot
->output_offset
12818 + (eh
->fdpic_cnts
.gotfuncdesc_offset
& ~1);
12819 outrel
.r_addend
= 0;
12820 if (h
->dynindx
== -1 && !bfd_link_pic(info
))
12821 if (h
->root
.type
== bfd_link_hash_undefweak
)
12822 arm_elf_add_rofixup(output_bfd
, globals
->srofixup
, -1);
12824 arm_elf_add_rofixup(output_bfd
, globals
->srofixup
,
12827 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
12828 eh
->fdpic_cnts
.gotfuncdesc_offset
|= 1;
12833 /* Such relocation on static function should not have been
12834 emitted by the compiler. */
12838 *unresolved_reloc_p
= FALSE
;
12839 return bfd_reloc_ok
;
12841 case R_ARM_FUNCDESC
:
12845 struct fdpic_local
*local_fdpic_cnts
= elf32_arm_local_fdpic_cnts(input_bfd
);
12846 Elf_Internal_Rela outrel
;
12847 int dynindx
= elf_section_data (sym_sec
->output_section
)->dynindx
;
12848 int offset
= local_fdpic_cnts
[r_symndx
].funcdesc_offset
& ~1;
12849 bfd_vma addr
= dynreloc_value
- sym_sec
->output_section
->vma
;
12852 if (bfd_link_pic(info
) && dynindx
== 0)
12855 /* Replace static FUNCDESC relocation with a
12856 R_ARM_RELATIVE dynamic relocation or with a rofixup for
12858 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_RELATIVE
);
12859 outrel
.r_offset
= input_section
->output_section
->vma
12860 + input_section
->output_offset
+ rel
->r_offset
;
12861 outrel
.r_addend
= 0;
12862 if (bfd_link_pic(info
))
12863 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
12865 arm_elf_add_rofixup(output_bfd
, globals
->srofixup
, outrel
.r_offset
);
12867 bfd_put_32 (input_bfd
, sgot
->output_section
->vma
12868 + sgot
->output_offset
+ offset
, hit_data
);
12870 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12871 arm_elf_fill_funcdesc(output_bfd
, info
,
12872 &local_fdpic_cnts
[r_symndx
].funcdesc_offset
,
12873 dynindx
, offset
, addr
, dynreloc_value
, seg
);
12877 if (h
->dynindx
== -1)
12880 int offset
= eh
->fdpic_cnts
.funcdesc_offset
& ~1;
12883 Elf_Internal_Rela outrel
;
12885 /* For static binaries sym_sec can be null. */
12888 dynindx
= elf_section_data (sym_sec
->output_section
)->dynindx
;
12889 addr
= dynreloc_value
- sym_sec
->output_section
->vma
;
12897 if (bfd_link_pic(info
) && dynindx
== 0)
12900 /* Replace static FUNCDESC relocation with a
12901 R_ARM_RELATIVE dynamic relocation. */
12902 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_RELATIVE
);
12903 outrel
.r_offset
= input_section
->output_section
->vma
12904 + input_section
->output_offset
+ rel
->r_offset
;
12905 outrel
.r_addend
= 0;
12906 if (bfd_link_pic(info
))
12907 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
12909 arm_elf_add_rofixup(output_bfd
, globals
->srofixup
, outrel
.r_offset
);
12911 bfd_put_32 (input_bfd
, sgot
->output_section
->vma
12912 + sgot
->output_offset
+ offset
, hit_data
);
12914 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12915 arm_elf_fill_funcdesc(output_bfd
, info
,
12916 &eh
->fdpic_cnts
.funcdesc_offset
,
12917 dynindx
, offset
, addr
, dynreloc_value
, seg
);
12921 Elf_Internal_Rela outrel
;
12923 /* Add a dynamic relocation. */
12924 outrel
.r_info
= ELF32_R_INFO (h
->dynindx
, R_ARM_FUNCDESC
);
12925 outrel
.r_offset
= input_section
->output_section
->vma
12926 + input_section
->output_offset
+ rel
->r_offset
;
12927 outrel
.r_addend
= 0;
12928 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
12932 *unresolved_reloc_p
= FALSE
;
12933 return bfd_reloc_ok
;
12935 case R_ARM_THM_BF16
:
12937 bfd_vma relocation
;
12938 bfd_vma upper_insn
= bfd_get_16 (input_bfd
, hit_data
);
12939 bfd_vma lower_insn
= bfd_get_16 (input_bfd
, hit_data
+ 2);
12941 if (globals
->use_rel
)
12943 bfd_vma immA
= (upper_insn
& 0x001f);
12944 bfd_vma immB
= (lower_insn
& 0x07fe) >> 1;
12945 bfd_vma immC
= (lower_insn
& 0x0800) >> 11;
12946 addend
= (immA
<< 12);
12947 addend
|= (immB
<< 2);
12948 addend
|= (immC
<< 1);
12951 signed_addend
= (addend
& 0x10000) ? addend
- (1 << 17) : addend
;
12954 relocation
= value
+ signed_addend
;
12955 relocation
-= (input_section
->output_section
->vma
12956 + input_section
->output_offset
12959 /* Put RELOCATION back into the insn. */
12961 bfd_vma immA
= (relocation
& 0x0001f000) >> 12;
12962 bfd_vma immB
= (relocation
& 0x00000ffc) >> 2;
12963 bfd_vma immC
= (relocation
& 0x00000002) >> 1;
12965 upper_insn
= (upper_insn
& 0xffe0) | immA
;
12966 lower_insn
= (lower_insn
& 0xf001) | (immC
<< 11) | (immB
<< 1);
12969 /* Put the relocated value back in the object file: */
12970 bfd_put_16 (input_bfd
, upper_insn
, hit_data
);
12971 bfd_put_16 (input_bfd
, lower_insn
, hit_data
+ 2);
12973 return bfd_reloc_ok
;
12976 case R_ARM_THM_BF12
:
12978 bfd_vma relocation
;
12979 bfd_vma upper_insn
= bfd_get_16 (input_bfd
, hit_data
);
12980 bfd_vma lower_insn
= bfd_get_16 (input_bfd
, hit_data
+ 2);
12982 if (globals
->use_rel
)
12984 bfd_vma immA
= (upper_insn
& 0x0001);
12985 bfd_vma immB
= (lower_insn
& 0x07fe) >> 1;
12986 bfd_vma immC
= (lower_insn
& 0x0800) >> 11;
12987 addend
= (immA
<< 12);
12988 addend
|= (immB
<< 2);
12989 addend
|= (immC
<< 1);
12992 addend
= (addend
& 0x1000) ? addend
- (1 << 13) : addend
;
12993 signed_addend
= addend
;
12996 relocation
= value
+ signed_addend
;
12997 relocation
-= (input_section
->output_section
->vma
12998 + input_section
->output_offset
13001 /* Put RELOCATION back into the insn. */
13003 bfd_vma immA
= (relocation
& 0x00001000) >> 12;
13004 bfd_vma immB
= (relocation
& 0x00000ffc) >> 2;
13005 bfd_vma immC
= (relocation
& 0x00000002) >> 1;
13007 upper_insn
= (upper_insn
& 0xfffe) | immA
;
13008 lower_insn
= (lower_insn
& 0xf001) | (immC
<< 11) | (immB
<< 1);
13011 /* Put the relocated value back in the object file: */
13012 bfd_put_16 (input_bfd
, upper_insn
, hit_data
);
13013 bfd_put_16 (input_bfd
, lower_insn
, hit_data
+ 2);
13015 return bfd_reloc_ok
;
13018 case R_ARM_THM_BF18
:
13020 bfd_vma relocation
;
13021 bfd_vma upper_insn
= bfd_get_16 (input_bfd
, hit_data
);
13022 bfd_vma lower_insn
= bfd_get_16 (input_bfd
, hit_data
+ 2);
13024 if (globals
->use_rel
)
13026 bfd_vma immA
= (upper_insn
& 0x007f);
13027 bfd_vma immB
= (lower_insn
& 0x07fe) >> 1;
13028 bfd_vma immC
= (lower_insn
& 0x0800) >> 11;
13029 addend
= (immA
<< 12);
13030 addend
|= (immB
<< 2);
13031 addend
|= (immC
<< 1);
13034 addend
= (addend
& 0x40000) ? addend
- (1 << 19) : addend
;
13035 signed_addend
= addend
;
13038 relocation
= value
+ signed_addend
;
13039 relocation
-= (input_section
->output_section
->vma
13040 + input_section
->output_offset
13043 /* Put RELOCATION back into the insn. */
13045 bfd_vma immA
= (relocation
& 0x0007f000) >> 12;
13046 bfd_vma immB
= (relocation
& 0x00000ffc) >> 2;
13047 bfd_vma immC
= (relocation
& 0x00000002) >> 1;
13049 upper_insn
= (upper_insn
& 0xff80) | immA
;
13050 lower_insn
= (lower_insn
& 0xf001) | (immC
<< 11) | (immB
<< 1);
13053 /* Put the relocated value back in the object file: */
13054 bfd_put_16 (input_bfd
, upper_insn
, hit_data
);
13055 bfd_put_16 (input_bfd
, lower_insn
, hit_data
+ 2);
13057 return bfd_reloc_ok
;
13061 return bfd_reloc_notsupported
;
13065 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
13067 arm_add_to_rel (bfd
* abfd
,
13068 bfd_byte
* address
,
13069 reloc_howto_type
* howto
,
13070 bfd_signed_vma increment
)
13072 bfd_signed_vma addend
;
13074 if (howto
->type
== R_ARM_THM_CALL
13075 || howto
->type
== R_ARM_THM_JUMP24
)
13077 int upper_insn
, lower_insn
;
13080 upper_insn
= bfd_get_16 (abfd
, address
);
13081 lower_insn
= bfd_get_16 (abfd
, address
+ 2);
13082 upper
= upper_insn
& 0x7ff;
13083 lower
= lower_insn
& 0x7ff;
13085 addend
= (upper
<< 12) | (lower
<< 1);
13086 addend
+= increment
;
13089 upper_insn
= (upper_insn
& 0xf800) | ((addend
>> 11) & 0x7ff);
13090 lower_insn
= (lower_insn
& 0xf800) | (addend
& 0x7ff);
13092 bfd_put_16 (abfd
, (bfd_vma
) upper_insn
, address
);
13093 bfd_put_16 (abfd
, (bfd_vma
) lower_insn
, address
+ 2);
13099 contents
= bfd_get_32 (abfd
, address
);
13101 /* Get the (signed) value from the instruction. */
13102 addend
= contents
& howto
->src_mask
;
13103 if (addend
& ((howto
->src_mask
+ 1) >> 1))
13105 bfd_signed_vma mask
;
13108 mask
&= ~ howto
->src_mask
;
13112 /* Add in the increment, (which is a byte value). */
13113 switch (howto
->type
)
13116 addend
+= increment
;
13123 addend
<<= howto
->size
;
13124 addend
+= increment
;
13126 /* Should we check for overflow here ? */
13128 /* Drop any undesired bits. */
13129 addend
>>= howto
->rightshift
;
13133 contents
= (contents
& ~ howto
->dst_mask
) | (addend
& howto
->dst_mask
);
13135 bfd_put_32 (abfd
, contents
, address
);
13139 #define IS_ARM_TLS_RELOC(R_TYPE) \
13140 ((R_TYPE) == R_ARM_TLS_GD32 \
13141 || (R_TYPE) == R_ARM_TLS_GD32_FDPIC \
13142 || (R_TYPE) == R_ARM_TLS_LDO32 \
13143 || (R_TYPE) == R_ARM_TLS_LDM32 \
13144 || (R_TYPE) == R_ARM_TLS_LDM32_FDPIC \
13145 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
13146 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
13147 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
13148 || (R_TYPE) == R_ARM_TLS_LE32 \
13149 || (R_TYPE) == R_ARM_TLS_IE32 \
13150 || (R_TYPE) == R_ARM_TLS_IE32_FDPIC \
13151 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
13153 /* Specific set of relocations for the gnu tls dialect. */
13154 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
13155 ((R_TYPE) == R_ARM_TLS_GOTDESC \
13156 || (R_TYPE) == R_ARM_TLS_CALL \
13157 || (R_TYPE) == R_ARM_THM_TLS_CALL \
13158 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
13159 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
13161 /* Relocate an ARM ELF section. */
13164 elf32_arm_relocate_section (bfd
* output_bfd
,
13165 struct bfd_link_info
* info
,
13167 asection
* input_section
,
13168 bfd_byte
* contents
,
13169 Elf_Internal_Rela
* relocs
,
13170 Elf_Internal_Sym
* local_syms
,
13171 asection
** local_sections
)
13173 Elf_Internal_Shdr
*symtab_hdr
;
13174 struct elf_link_hash_entry
**sym_hashes
;
13175 Elf_Internal_Rela
*rel
;
13176 Elf_Internal_Rela
*relend
;
13178 struct elf32_arm_link_hash_table
* globals
;
13180 globals
= elf32_arm_hash_table (info
);
13181 if (globals
== NULL
)
13184 symtab_hdr
= & elf_symtab_hdr (input_bfd
);
13185 sym_hashes
= elf_sym_hashes (input_bfd
);
13188 relend
= relocs
+ input_section
->reloc_count
;
13189 for (; rel
< relend
; rel
++)
13192 reloc_howto_type
* howto
;
13193 unsigned long r_symndx
;
13194 Elf_Internal_Sym
* sym
;
13196 struct elf_link_hash_entry
* h
;
13197 bfd_vma relocation
;
13198 bfd_reloc_status_type r
;
13201 bfd_boolean unresolved_reloc
= FALSE
;
13202 char *error_message
= NULL
;
13204 r_symndx
= ELF32_R_SYM (rel
->r_info
);
13205 r_type
= ELF32_R_TYPE (rel
->r_info
);
13206 r_type
= arm_real_reloc_type (globals
, r_type
);
13208 if ( r_type
== R_ARM_GNU_VTENTRY
13209 || r_type
== R_ARM_GNU_VTINHERIT
)
13212 howto
= bfd_reloc
.howto
= elf32_arm_howto_from_type (r_type
);
13215 return _bfd_unrecognized_reloc (input_bfd
, input_section
, r_type
);
13221 if (r_symndx
< symtab_hdr
->sh_info
)
13223 sym
= local_syms
+ r_symndx
;
13224 sym_type
= ELF32_ST_TYPE (sym
->st_info
);
13225 sec
= local_sections
[r_symndx
];
13227 /* An object file might have a reference to a local
13228 undefined symbol. This is a daft object file, but we
13229 should at least do something about it. V4BX & NONE
13230 relocations do not use the symbol and are explicitly
13231 allowed to use the undefined symbol, so allow those.
13232 Likewise for relocations against STN_UNDEF. */
13233 if (r_type
!= R_ARM_V4BX
13234 && r_type
!= R_ARM_NONE
13235 && r_symndx
!= STN_UNDEF
13236 && bfd_is_und_section (sec
)
13237 && ELF_ST_BIND (sym
->st_info
) != STB_WEAK
)
13238 (*info
->callbacks
->undefined_symbol
)
13239 (info
, bfd_elf_string_from_elf_section
13240 (input_bfd
, symtab_hdr
->sh_link
, sym
->st_name
),
13241 input_bfd
, input_section
,
13242 rel
->r_offset
, TRUE
);
13244 if (globals
->use_rel
)
13246 relocation
= (sec
->output_section
->vma
13247 + sec
->output_offset
13249 if (!bfd_link_relocatable (info
)
13250 && (sec
->flags
& SEC_MERGE
)
13251 && ELF_ST_TYPE (sym
->st_info
) == STT_SECTION
)
13254 bfd_vma addend
, value
;
13258 case R_ARM_MOVW_ABS_NC
:
13259 case R_ARM_MOVT_ABS
:
13260 value
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
);
13261 addend
= ((value
& 0xf0000) >> 4) | (value
& 0xfff);
13262 addend
= (addend
^ 0x8000) - 0x8000;
13265 case R_ARM_THM_MOVW_ABS_NC
:
13266 case R_ARM_THM_MOVT_ABS
:
13267 value
= bfd_get_16 (input_bfd
, contents
+ rel
->r_offset
)
13269 value
|= bfd_get_16 (input_bfd
,
13270 contents
+ rel
->r_offset
+ 2);
13271 addend
= ((value
& 0xf7000) >> 4) | (value
& 0xff)
13272 | ((value
& 0x04000000) >> 15);
13273 addend
= (addend
^ 0x8000) - 0x8000;
13277 if (howto
->rightshift
13278 || (howto
->src_mask
& (howto
->src_mask
+ 1)))
13281 /* xgettext:c-format */
13282 (_("%pB(%pA+%#" PRIx64
"): "
13283 "%s relocation against SEC_MERGE section"),
13284 input_bfd
, input_section
,
13285 (uint64_t) rel
->r_offset
, howto
->name
);
13289 value
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
);
13291 /* Get the (signed) value from the instruction. */
13292 addend
= value
& howto
->src_mask
;
13293 if (addend
& ((howto
->src_mask
+ 1) >> 1))
13295 bfd_signed_vma mask
;
13298 mask
&= ~ howto
->src_mask
;
13306 _bfd_elf_rel_local_sym (output_bfd
, sym
, &msec
, addend
)
13308 addend
+= msec
->output_section
->vma
+ msec
->output_offset
;
13310 /* Cases here must match those in the preceding
13311 switch statement. */
13314 case R_ARM_MOVW_ABS_NC
:
13315 case R_ARM_MOVT_ABS
:
13316 value
= (value
& 0xfff0f000) | ((addend
& 0xf000) << 4)
13317 | (addend
& 0xfff);
13318 bfd_put_32 (input_bfd
, value
, contents
+ rel
->r_offset
);
13321 case R_ARM_THM_MOVW_ABS_NC
:
13322 case R_ARM_THM_MOVT_ABS
:
13323 value
= (value
& 0xfbf08f00) | ((addend
& 0xf700) << 4)
13324 | (addend
& 0xff) | ((addend
& 0x0800) << 15);
13325 bfd_put_16 (input_bfd
, value
>> 16,
13326 contents
+ rel
->r_offset
);
13327 bfd_put_16 (input_bfd
, value
,
13328 contents
+ rel
->r_offset
+ 2);
13332 value
= (value
& ~ howto
->dst_mask
)
13333 | (addend
& howto
->dst_mask
);
13334 bfd_put_32 (input_bfd
, value
, contents
+ rel
->r_offset
);
13340 relocation
= _bfd_elf_rela_local_sym (output_bfd
, sym
, &sec
, rel
);
13344 bfd_boolean warned
, ignored
;
13346 RELOC_FOR_GLOBAL_SYMBOL (info
, input_bfd
, input_section
, rel
,
13347 r_symndx
, symtab_hdr
, sym_hashes
,
13348 h
, sec
, relocation
,
13349 unresolved_reloc
, warned
, ignored
);
13351 sym_type
= h
->type
;
13354 if (sec
!= NULL
&& discarded_section (sec
))
13355 RELOC_AGAINST_DISCARDED_SECTION (info
, input_bfd
, input_section
,
13356 rel
, 1, relend
, howto
, 0, contents
);
13358 if (bfd_link_relocatable (info
))
13360 /* This is a relocatable link. We don't have to change
13361 anything, unless the reloc is against a section symbol,
13362 in which case we have to adjust according to where the
13363 section symbol winds up in the output section. */
13364 if (sym
!= NULL
&& ELF_ST_TYPE (sym
->st_info
) == STT_SECTION
)
13366 if (globals
->use_rel
)
13367 arm_add_to_rel (input_bfd
, contents
+ rel
->r_offset
,
13368 howto
, (bfd_signed_vma
) sec
->output_offset
);
13370 rel
->r_addend
+= sec
->output_offset
;
13376 name
= h
->root
.root
.string
;
13379 name
= (bfd_elf_string_from_elf_section
13380 (input_bfd
, symtab_hdr
->sh_link
, sym
->st_name
));
13381 if (name
== NULL
|| *name
== '\0')
13382 name
= bfd_section_name (sec
);
13385 if (r_symndx
!= STN_UNDEF
13386 && r_type
!= R_ARM_NONE
13388 || h
->root
.type
== bfd_link_hash_defined
13389 || h
->root
.type
== bfd_link_hash_defweak
)
13390 && IS_ARM_TLS_RELOC (r_type
) != (sym_type
== STT_TLS
))
13393 ((sym_type
== STT_TLS
13394 /* xgettext:c-format */
13395 ? _("%pB(%pA+%#" PRIx64
"): %s used with TLS symbol %s")
13396 /* xgettext:c-format */
13397 : _("%pB(%pA+%#" PRIx64
"): %s used with non-TLS symbol %s")),
13400 (uint64_t) rel
->r_offset
,
13405 /* We call elf32_arm_final_link_relocate unless we're completely
13406 done, i.e., the relaxation produced the final output we want,
13407 and we won't let anybody mess with it. Also, we have to do
13408 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
13409 both in relaxed and non-relaxed cases. */
13410 if ((elf32_arm_tls_transition (info
, r_type
, h
) != (unsigned)r_type
)
13411 || (IS_ARM_TLS_GNU_RELOC (r_type
)
13412 && !((h
? elf32_arm_hash_entry (h
)->tls_type
:
13413 elf32_arm_local_got_tls_type (input_bfd
)[r_symndx
])
13416 r
= elf32_arm_tls_relax (globals
, input_bfd
, input_section
,
13417 contents
, rel
, h
== NULL
);
13418 /* This may have been marked unresolved because it came from
13419 a shared library. But we've just dealt with that. */
13420 unresolved_reloc
= 0;
13423 r
= bfd_reloc_continue
;
13425 if (r
== bfd_reloc_continue
)
13427 unsigned char branch_type
=
13428 h
? ARM_GET_SYM_BRANCH_TYPE (h
->target_internal
)
13429 : ARM_GET_SYM_BRANCH_TYPE (sym
->st_target_internal
);
13431 r
= elf32_arm_final_link_relocate (howto
, input_bfd
, output_bfd
,
13432 input_section
, contents
, rel
,
13433 relocation
, info
, sec
, name
,
13434 sym_type
, branch_type
, h
,
13439 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
13440 because such sections are not SEC_ALLOC and thus ld.so will
13441 not process them. */
13442 if (unresolved_reloc
13443 && !((input_section
->flags
& SEC_DEBUGGING
) != 0
13445 && _bfd_elf_section_offset (output_bfd
, info
, input_section
,
13446 rel
->r_offset
) != (bfd_vma
) -1)
13449 /* xgettext:c-format */
13450 (_("%pB(%pA+%#" PRIx64
"): "
13451 "unresolvable %s relocation against symbol `%s'"),
13454 (uint64_t) rel
->r_offset
,
13456 h
->root
.root
.string
);
13460 if (r
!= bfd_reloc_ok
)
13464 case bfd_reloc_overflow
:
13465 /* If the overflowing reloc was to an undefined symbol,
13466 we have already printed one error message and there
13467 is no point complaining again. */
13468 if (!h
|| h
->root
.type
!= bfd_link_hash_undefined
)
13469 (*info
->callbacks
->reloc_overflow
)
13470 (info
, (h
? &h
->root
: NULL
), name
, howto
->name
,
13471 (bfd_vma
) 0, input_bfd
, input_section
, rel
->r_offset
);
13474 case bfd_reloc_undefined
:
13475 (*info
->callbacks
->undefined_symbol
)
13476 (info
, name
, input_bfd
, input_section
, rel
->r_offset
, TRUE
);
13479 case bfd_reloc_outofrange
:
13480 error_message
= _("out of range");
13483 case bfd_reloc_notsupported
:
13484 error_message
= _("unsupported relocation");
13487 case bfd_reloc_dangerous
:
13488 /* error_message should already be set. */
13492 error_message
= _("unknown error");
13493 /* Fall through. */
13496 BFD_ASSERT (error_message
!= NULL
);
13497 (*info
->callbacks
->reloc_dangerous
)
13498 (info
, error_message
, input_bfd
, input_section
, rel
->r_offset
);
13507 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
13508 adds the edit to the start of the list. (The list must be built in order of
13509 ascending TINDEX: the function's callers are primarily responsible for
13510 maintaining that condition). */
13513 add_unwind_table_edit (arm_unwind_table_edit
**head
,
13514 arm_unwind_table_edit
**tail
,
13515 arm_unwind_edit_type type
,
13516 asection
*linked_section
,
13517 unsigned int tindex
)
13519 arm_unwind_table_edit
*new_edit
= (arm_unwind_table_edit
*)
13520 xmalloc (sizeof (arm_unwind_table_edit
));
13522 new_edit
->type
= type
;
13523 new_edit
->linked_section
= linked_section
;
13524 new_edit
->index
= tindex
;
13528 new_edit
->next
= NULL
;
13531 (*tail
)->next
= new_edit
;
13533 (*tail
) = new_edit
;
13536 (*head
) = new_edit
;
13540 new_edit
->next
= *head
;
13549 static _arm_elf_section_data
*get_arm_elf_section_data (asection
*);
13551 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
13553 adjust_exidx_size(asection
*exidx_sec
, int adjust
)
13557 if (!exidx_sec
->rawsize
)
13558 exidx_sec
->rawsize
= exidx_sec
->size
;
13560 bfd_set_section_size (exidx_sec
, exidx_sec
->size
+ adjust
);
13561 out_sec
= exidx_sec
->output_section
;
13562 /* Adjust size of output section. */
13563 bfd_set_section_size (out_sec
, out_sec
->size
+adjust
);
13566 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
13568 insert_cantunwind_after(asection
*text_sec
, asection
*exidx_sec
)
13570 struct _arm_elf_section_data
*exidx_arm_data
;
13572 exidx_arm_data
= get_arm_elf_section_data (exidx_sec
);
13573 add_unwind_table_edit (
13574 &exidx_arm_data
->u
.exidx
.unwind_edit_list
,
13575 &exidx_arm_data
->u
.exidx
.unwind_edit_tail
,
13576 INSERT_EXIDX_CANTUNWIND_AT_END
, text_sec
, UINT_MAX
);
13578 exidx_arm_data
->additional_reloc_count
++;
13580 adjust_exidx_size(exidx_sec
, 8);
13583 /* Scan .ARM.exidx tables, and create a list describing edits which should be
13584 made to those tables, such that:
13586 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
13587 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
13588 codes which have been inlined into the index).
13590 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
13592 The edits are applied when the tables are written
13593 (in elf32_arm_write_section). */
13596 elf32_arm_fix_exidx_coverage (asection
**text_section_order
,
13597 unsigned int num_text_sections
,
13598 struct bfd_link_info
*info
,
13599 bfd_boolean merge_exidx_entries
)
13602 unsigned int last_second_word
= 0, i
;
13603 asection
*last_exidx_sec
= NULL
;
13604 asection
*last_text_sec
= NULL
;
13605 int last_unwind_type
= -1;
13607 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
13609 for (inp
= info
->input_bfds
; inp
!= NULL
; inp
= inp
->link
.next
)
13613 for (sec
= inp
->sections
; sec
!= NULL
; sec
= sec
->next
)
13615 struct bfd_elf_section_data
*elf_sec
= elf_section_data (sec
);
13616 Elf_Internal_Shdr
*hdr
= &elf_sec
->this_hdr
;
13618 if (!hdr
|| hdr
->sh_type
!= SHT_ARM_EXIDX
)
13621 if (elf_sec
->linked_to
)
13623 Elf_Internal_Shdr
*linked_hdr
13624 = &elf_section_data (elf_sec
->linked_to
)->this_hdr
;
13625 struct _arm_elf_section_data
*linked_sec_arm_data
13626 = get_arm_elf_section_data (linked_hdr
->bfd_section
);
13628 if (linked_sec_arm_data
== NULL
)
13631 /* Link this .ARM.exidx section back from the text section it
13633 linked_sec_arm_data
->u
.text
.arm_exidx_sec
= sec
;
13638 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
13639 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
13640 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
13642 for (i
= 0; i
< num_text_sections
; i
++)
13644 asection
*sec
= text_section_order
[i
];
13645 asection
*exidx_sec
;
13646 struct _arm_elf_section_data
*arm_data
= get_arm_elf_section_data (sec
);
13647 struct _arm_elf_section_data
*exidx_arm_data
;
13648 bfd_byte
*contents
= NULL
;
13649 int deleted_exidx_bytes
= 0;
13651 arm_unwind_table_edit
*unwind_edit_head
= NULL
;
13652 arm_unwind_table_edit
*unwind_edit_tail
= NULL
;
13653 Elf_Internal_Shdr
*hdr
;
13656 if (arm_data
== NULL
)
13659 exidx_sec
= arm_data
->u
.text
.arm_exidx_sec
;
13660 if (exidx_sec
== NULL
)
13662 /* Section has no unwind data. */
13663 if (last_unwind_type
== 0 || !last_exidx_sec
)
13666 /* Ignore zero sized sections. */
13667 if (sec
->size
== 0)
13670 insert_cantunwind_after(last_text_sec
, last_exidx_sec
);
13671 last_unwind_type
= 0;
13675 /* Skip /DISCARD/ sections. */
13676 if (bfd_is_abs_section (exidx_sec
->output_section
))
13679 hdr
= &elf_section_data (exidx_sec
)->this_hdr
;
13680 if (hdr
->sh_type
!= SHT_ARM_EXIDX
)
13683 exidx_arm_data
= get_arm_elf_section_data (exidx_sec
);
13684 if (exidx_arm_data
== NULL
)
13687 ibfd
= exidx_sec
->owner
;
13689 if (hdr
->contents
!= NULL
)
13690 contents
= hdr
->contents
;
13691 else if (! bfd_malloc_and_get_section (ibfd
, exidx_sec
, &contents
))
13695 if (last_unwind_type
> 0)
13697 unsigned int first_word
= bfd_get_32 (ibfd
, contents
);
13698 /* Add cantunwind if first unwind item does not match section
13700 if (first_word
!= sec
->vma
)
13702 insert_cantunwind_after (last_text_sec
, last_exidx_sec
);
13703 last_unwind_type
= 0;
13707 for (j
= 0; j
< hdr
->sh_size
; j
+= 8)
13709 unsigned int second_word
= bfd_get_32 (ibfd
, contents
+ j
+ 4);
13713 /* An EXIDX_CANTUNWIND entry. */
13714 if (second_word
== 1)
13716 if (last_unwind_type
== 0)
13720 /* Inlined unwinding data. Merge if equal to previous. */
13721 else if ((second_word
& 0x80000000) != 0)
13723 if (merge_exidx_entries
13724 && last_second_word
== second_word
&& last_unwind_type
== 1)
13727 last_second_word
= second_word
;
13729 /* Normal table entry. In theory we could merge these too,
13730 but duplicate entries are likely to be much less common. */
13734 if (elide
&& !bfd_link_relocatable (info
))
13736 add_unwind_table_edit (&unwind_edit_head
, &unwind_edit_tail
,
13737 DELETE_EXIDX_ENTRY
, NULL
, j
/ 8);
13739 deleted_exidx_bytes
+= 8;
13742 last_unwind_type
= unwind_type
;
13745 /* Free contents if we allocated it ourselves. */
13746 if (contents
!= hdr
->contents
)
13749 /* Record edits to be applied later (in elf32_arm_write_section). */
13750 exidx_arm_data
->u
.exidx
.unwind_edit_list
= unwind_edit_head
;
13751 exidx_arm_data
->u
.exidx
.unwind_edit_tail
= unwind_edit_tail
;
13753 if (deleted_exidx_bytes
> 0)
13754 adjust_exidx_size(exidx_sec
, -deleted_exidx_bytes
);
13756 last_exidx_sec
= exidx_sec
;
13757 last_text_sec
= sec
;
13760 /* Add terminating CANTUNWIND entry. */
13761 if (!bfd_link_relocatable (info
) && last_exidx_sec
13762 && last_unwind_type
!= 0)
13763 insert_cantunwind_after(last_text_sec
, last_exidx_sec
);
13769 elf32_arm_output_glue_section (struct bfd_link_info
*info
, bfd
*obfd
,
13770 bfd
*ibfd
, const char *name
)
13772 asection
*sec
, *osec
;
13774 sec
= bfd_get_linker_section (ibfd
, name
);
13775 if (sec
== NULL
|| (sec
->flags
& SEC_EXCLUDE
) != 0)
13778 osec
= sec
->output_section
;
13779 if (elf32_arm_write_section (obfd
, info
, sec
, sec
->contents
))
13782 if (! bfd_set_section_contents (obfd
, osec
, sec
->contents
,
13783 sec
->output_offset
, sec
->size
))
13790 elf32_arm_final_link (bfd
*abfd
, struct bfd_link_info
*info
)
13792 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (info
);
13793 asection
*sec
, *osec
;
13795 if (globals
== NULL
)
13798 /* Invoke the regular ELF backend linker to do all the work. */
13799 if (!bfd_elf_final_link (abfd
, info
))
13802 /* Process stub sections (eg BE8 encoding, ...). */
13803 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
13805 for (i
=0; i
<htab
->top_id
; i
++)
13807 sec
= htab
->stub_group
[i
].stub_sec
;
13808 /* Only process it once, in its link_sec slot. */
13809 if (sec
&& i
== htab
->stub_group
[i
].link_sec
->id
)
13811 osec
= sec
->output_section
;
13812 elf32_arm_write_section (abfd
, info
, sec
, sec
->contents
);
13813 if (! bfd_set_section_contents (abfd
, osec
, sec
->contents
,
13814 sec
->output_offset
, sec
->size
))
13819 /* Write out any glue sections now that we have created all the
13821 if (globals
->bfd_of_glue_owner
!= NULL
)
13823 if (! elf32_arm_output_glue_section (info
, abfd
,
13824 globals
->bfd_of_glue_owner
,
13825 ARM2THUMB_GLUE_SECTION_NAME
))
13828 if (! elf32_arm_output_glue_section (info
, abfd
,
13829 globals
->bfd_of_glue_owner
,
13830 THUMB2ARM_GLUE_SECTION_NAME
))
13833 if (! elf32_arm_output_glue_section (info
, abfd
,
13834 globals
->bfd_of_glue_owner
,
13835 VFP11_ERRATUM_VENEER_SECTION_NAME
))
13838 if (! elf32_arm_output_glue_section (info
, abfd
,
13839 globals
->bfd_of_glue_owner
,
13840 STM32L4XX_ERRATUM_VENEER_SECTION_NAME
))
13843 if (! elf32_arm_output_glue_section (info
, abfd
,
13844 globals
->bfd_of_glue_owner
,
13845 ARM_BX_GLUE_SECTION_NAME
))
13852 /* Return a best guess for the machine number based on the attributes. */
13854 static unsigned int
13855 bfd_arm_get_mach_from_attributes (bfd
* abfd
)
13857 int arch
= bfd_elf_get_obj_attr_int (abfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
13861 case TAG_CPU_ARCH_PRE_V4
: return bfd_mach_arm_3M
;
13862 case TAG_CPU_ARCH_V4
: return bfd_mach_arm_4
;
13863 case TAG_CPU_ARCH_V4T
: return bfd_mach_arm_4T
;
13864 case TAG_CPU_ARCH_V5T
: return bfd_mach_arm_5T
;
13866 case TAG_CPU_ARCH_V5TE
:
13870 BFD_ASSERT (Tag_CPU_name
< NUM_KNOWN_OBJ_ATTRIBUTES
);
13871 name
= elf_known_obj_attributes (abfd
) [OBJ_ATTR_PROC
][Tag_CPU_name
].s
;
13875 if (strcmp (name
, "IWMMXT2") == 0)
13876 return bfd_mach_arm_iWMMXt2
;
13878 if (strcmp (name
, "IWMMXT") == 0)
13879 return bfd_mach_arm_iWMMXt
;
13881 if (strcmp (name
, "XSCALE") == 0)
13885 BFD_ASSERT (Tag_WMMX_arch
< NUM_KNOWN_OBJ_ATTRIBUTES
);
13886 wmmx
= elf_known_obj_attributes (abfd
) [OBJ_ATTR_PROC
][Tag_WMMX_arch
].i
;
13889 case 1: return bfd_mach_arm_iWMMXt
;
13890 case 2: return bfd_mach_arm_iWMMXt2
;
13891 default: return bfd_mach_arm_XScale
;
13896 return bfd_mach_arm_5TE
;
13899 case TAG_CPU_ARCH_V5TEJ
:
13900 return bfd_mach_arm_5TEJ
;
13901 case TAG_CPU_ARCH_V6
:
13902 return bfd_mach_arm_6
;
13903 case TAG_CPU_ARCH_V6KZ
:
13904 return bfd_mach_arm_6KZ
;
13905 case TAG_CPU_ARCH_V6T2
:
13906 return bfd_mach_arm_6T2
;
13907 case TAG_CPU_ARCH_V6K
:
13908 return bfd_mach_arm_6K
;
13909 case TAG_CPU_ARCH_V7
:
13910 return bfd_mach_arm_7
;
13911 case TAG_CPU_ARCH_V6_M
:
13912 return bfd_mach_arm_6M
;
13913 case TAG_CPU_ARCH_V6S_M
:
13914 return bfd_mach_arm_6SM
;
13915 case TAG_CPU_ARCH_V7E_M
:
13916 return bfd_mach_arm_7EM
;
13917 case TAG_CPU_ARCH_V8
:
13918 return bfd_mach_arm_8
;
13919 case TAG_CPU_ARCH_V8R
:
13920 return bfd_mach_arm_8R
;
13921 case TAG_CPU_ARCH_V8M_BASE
:
13922 return bfd_mach_arm_8M_BASE
;
13923 case TAG_CPU_ARCH_V8M_MAIN
:
13924 return bfd_mach_arm_8M_MAIN
;
13925 case TAG_CPU_ARCH_V8_1M_MAIN
:
13926 return bfd_mach_arm_8_1M_MAIN
;
13929 /* Force entry to be added for any new known Tag_CPU_arch value. */
13930 BFD_ASSERT (arch
> MAX_TAG_CPU_ARCH
);
13932 /* Unknown Tag_CPU_arch value. */
13933 return bfd_mach_arm_unknown
;
13937 /* Set the right machine number. */
13940 elf32_arm_object_p (bfd
*abfd
)
13944 mach
= bfd_arm_get_mach_from_notes (abfd
, ARM_NOTE_SECTION
);
13946 if (mach
== bfd_mach_arm_unknown
)
13948 if (elf_elfheader (abfd
)->e_flags
& EF_ARM_MAVERICK_FLOAT
)
13949 mach
= bfd_mach_arm_ep9312
;
13951 mach
= bfd_arm_get_mach_from_attributes (abfd
);
13954 bfd_default_set_arch_mach (abfd
, bfd_arch_arm
, mach
);
13958 /* Function to keep ARM specific flags in the ELF header. */
13961 elf32_arm_set_private_flags (bfd
*abfd
, flagword flags
)
13963 if (elf_flags_init (abfd
)
13964 && elf_elfheader (abfd
)->e_flags
!= flags
)
13966 if (EF_ARM_EABI_VERSION (flags
) == EF_ARM_EABI_UNKNOWN
)
13968 if (flags
& EF_ARM_INTERWORK
)
13970 (_("warning: not setting interworking flag of %pB since it has already been specified as non-interworking"),
13974 (_("warning: clearing the interworking flag of %pB due to outside request"),
13980 elf_elfheader (abfd
)->e_flags
= flags
;
13981 elf_flags_init (abfd
) = TRUE
;
13987 /* Copy backend specific data from one object module to another. */
13990 elf32_arm_copy_private_bfd_data (bfd
*ibfd
, bfd
*obfd
)
13993 flagword out_flags
;
13995 if (! is_arm_elf (ibfd
) || ! is_arm_elf (obfd
))
13998 in_flags
= elf_elfheader (ibfd
)->e_flags
;
13999 out_flags
= elf_elfheader (obfd
)->e_flags
;
14001 if (elf_flags_init (obfd
)
14002 && EF_ARM_EABI_VERSION (out_flags
) == EF_ARM_EABI_UNKNOWN
14003 && in_flags
!= out_flags
)
14005 /* Cannot mix APCS26 and APCS32 code. */
14006 if ((in_flags
& EF_ARM_APCS_26
) != (out_flags
& EF_ARM_APCS_26
))
14009 /* Cannot mix float APCS and non-float APCS code. */
14010 if ((in_flags
& EF_ARM_APCS_FLOAT
) != (out_flags
& EF_ARM_APCS_FLOAT
))
14013 /* If the src and dest have different interworking flags
14014 then turn off the interworking bit. */
14015 if ((in_flags
& EF_ARM_INTERWORK
) != (out_flags
& EF_ARM_INTERWORK
))
14017 if (out_flags
& EF_ARM_INTERWORK
)
14019 (_("warning: clearing the interworking flag of %pB because non-interworking code in %pB has been linked with it"),
14022 in_flags
&= ~EF_ARM_INTERWORK
;
14025 /* Likewise for PIC, though don't warn for this case. */
14026 if ((in_flags
& EF_ARM_PIC
) != (out_flags
& EF_ARM_PIC
))
14027 in_flags
&= ~EF_ARM_PIC
;
14030 elf_elfheader (obfd
)->e_flags
= in_flags
;
14031 elf_flags_init (obfd
) = TRUE
;
14033 return _bfd_elf_copy_private_bfd_data (ibfd
, obfd
);
14036 /* Values for Tag_ABI_PCS_R9_use. */
14045 /* Values for Tag_ABI_PCS_RW_data. */
14048 AEABI_PCS_RW_data_absolute
,
14049 AEABI_PCS_RW_data_PCrel
,
14050 AEABI_PCS_RW_data_SBrel
,
14051 AEABI_PCS_RW_data_unused
14054 /* Values for Tag_ABI_enum_size. */
14060 AEABI_enum_forced_wide
14063 /* Determine whether an object attribute tag takes an integer, a
14067 elf32_arm_obj_attrs_arg_type (int tag
)
14069 if (tag
== Tag_compatibility
)
14070 return ATTR_TYPE_FLAG_INT_VAL
| ATTR_TYPE_FLAG_STR_VAL
;
14071 else if (tag
== Tag_nodefaults
)
14072 return ATTR_TYPE_FLAG_INT_VAL
| ATTR_TYPE_FLAG_NO_DEFAULT
;
14073 else if (tag
== Tag_CPU_raw_name
|| tag
== Tag_CPU_name
)
14074 return ATTR_TYPE_FLAG_STR_VAL
;
14076 return ATTR_TYPE_FLAG_INT_VAL
;
14078 return (tag
& 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL
: ATTR_TYPE_FLAG_INT_VAL
;
14081 /* The ABI defines that Tag_conformance should be emitted first, and that
14082 Tag_nodefaults should be second (if either is defined). This sets those
14083 two positions, and bumps up the position of all the remaining tags to
14086 elf32_arm_obj_attrs_order (int num
)
14088 if (num
== LEAST_KNOWN_OBJ_ATTRIBUTE
)
14089 return Tag_conformance
;
14090 if (num
== LEAST_KNOWN_OBJ_ATTRIBUTE
+ 1)
14091 return Tag_nodefaults
;
14092 if ((num
- 2) < Tag_nodefaults
)
14094 if ((num
- 1) < Tag_conformance
)
14099 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
14101 elf32_arm_obj_attrs_handle_unknown (bfd
*abfd
, int tag
)
14103 if ((tag
& 127) < 64)
14106 (_("%pB: unknown mandatory EABI object attribute %d"),
14108 bfd_set_error (bfd_error_bad_value
);
14114 (_("warning: %pB: unknown EABI object attribute %d"),
14120 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
14121 Returns -1 if no architecture could be read. */
14124 get_secondary_compatible_arch (bfd
*abfd
)
14126 obj_attribute
*attr
=
14127 &elf_known_obj_attributes_proc (abfd
)[Tag_also_compatible_with
];
14129 /* Note: the tag and its argument below are uleb128 values, though
14130 currently-defined values fit in one byte for each. */
14132 && attr
->s
[0] == Tag_CPU_arch
14133 && (attr
->s
[1] & 128) != 128
14134 && attr
->s
[2] == 0)
14137 /* This tag is "safely ignorable", so don't complain if it looks funny. */
14141 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
14142 The tag is removed if ARCH is -1. */
14145 set_secondary_compatible_arch (bfd
*abfd
, int arch
)
14147 obj_attribute
*attr
=
14148 &elf_known_obj_attributes_proc (abfd
)[Tag_also_compatible_with
];
14156 /* Note: the tag and its argument below are uleb128 values, though
14157 currently-defined values fit in one byte for each. */
14159 attr
->s
= (char *) bfd_alloc (abfd
, 3);
14160 attr
->s
[0] = Tag_CPU_arch
;
14165 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
14169 tag_cpu_arch_combine (bfd
*ibfd
, int oldtag
, int *secondary_compat_out
,
14170 int newtag
, int secondary_compat
)
14172 #define T(X) TAG_CPU_ARCH_##X
14173 int tagl
, tagh
, result
;
14176 T(V6T2
), /* PRE_V4. */
14178 T(V6T2
), /* V4T. */
14179 T(V6T2
), /* V5T. */
14180 T(V6T2
), /* V5TE. */
14181 T(V6T2
), /* V5TEJ. */
14184 T(V6T2
) /* V6T2. */
14188 T(V6K
), /* PRE_V4. */
14192 T(V6K
), /* V5TE. */
14193 T(V6K
), /* V5TEJ. */
14195 T(V6KZ
), /* V6KZ. */
14201 T(V7
), /* PRE_V4. */
14206 T(V7
), /* V5TEJ. */
14219 T(V6K
), /* V5TE. */
14220 T(V6K
), /* V5TEJ. */
14222 T(V6KZ
), /* V6KZ. */
14226 T(V6_M
) /* V6_M. */
14228 const int v6s_m
[] =
14234 T(V6K
), /* V5TE. */
14235 T(V6K
), /* V5TEJ. */
14237 T(V6KZ
), /* V6KZ. */
14241 T(V6S_M
), /* V6_M. */
14242 T(V6S_M
) /* V6S_M. */
14244 const int v7e_m
[] =
14248 T(V7E_M
), /* V4T. */
14249 T(V7E_M
), /* V5T. */
14250 T(V7E_M
), /* V5TE. */
14251 T(V7E_M
), /* V5TEJ. */
14252 T(V7E_M
), /* V6. */
14253 T(V7E_M
), /* V6KZ. */
14254 T(V7E_M
), /* V6T2. */
14255 T(V7E_M
), /* V6K. */
14256 T(V7E_M
), /* V7. */
14257 T(V7E_M
), /* V6_M. */
14258 T(V7E_M
), /* V6S_M. */
14259 T(V7E_M
) /* V7E_M. */
14263 T(V8
), /* PRE_V4. */
14268 T(V8
), /* V5TEJ. */
14275 T(V8
), /* V6S_M. */
14276 T(V8
), /* V7E_M. */
14281 T(V8R
), /* PRE_V4. */
14285 T(V8R
), /* V5TE. */
14286 T(V8R
), /* V5TEJ. */
14288 T(V8R
), /* V6KZ. */
14289 T(V8R
), /* V6T2. */
14292 T(V8R
), /* V6_M. */
14293 T(V8R
), /* V6S_M. */
14294 T(V8R
), /* V7E_M. */
14298 const int v8m_baseline
[] =
14311 T(V8M_BASE
), /* V6_M. */
14312 T(V8M_BASE
), /* V6S_M. */
14316 T(V8M_BASE
) /* V8-M BASELINE. */
14318 const int v8m_mainline
[] =
14330 T(V8M_MAIN
), /* V7. */
14331 T(V8M_MAIN
), /* V6_M. */
14332 T(V8M_MAIN
), /* V6S_M. */
14333 T(V8M_MAIN
), /* V7E_M. */
14336 T(V8M_MAIN
), /* V8-M BASELINE. */
14337 T(V8M_MAIN
) /* V8-M MAINLINE. */
14339 const int v8_1m_mainline
[] =
14351 T(V8_1M_MAIN
), /* V7. */
14352 T(V8_1M_MAIN
), /* V6_M. */
14353 T(V8_1M_MAIN
), /* V6S_M. */
14354 T(V8_1M_MAIN
), /* V7E_M. */
14357 T(V8_1M_MAIN
), /* V8-M BASELINE. */
14358 T(V8_1M_MAIN
), /* V8-M MAINLINE. */
14359 -1, /* Unused (18). */
14360 -1, /* Unused (19). */
14361 -1, /* Unused (20). */
14362 T(V8_1M_MAIN
) /* V8.1-M MAINLINE. */
14364 const int v4t_plus_v6_m
[] =
14370 T(V5TE
), /* V5TE. */
14371 T(V5TEJ
), /* V5TEJ. */
14373 T(V6KZ
), /* V6KZ. */
14374 T(V6T2
), /* V6T2. */
14377 T(V6_M
), /* V6_M. */
14378 T(V6S_M
), /* V6S_M. */
14379 T(V7E_M
), /* V7E_M. */
14382 T(V8M_BASE
), /* V8-M BASELINE. */
14383 T(V8M_MAIN
), /* V8-M MAINLINE. */
14384 -1, /* Unused (18). */
14385 -1, /* Unused (19). */
14386 -1, /* Unused (20). */
14387 T(V8_1M_MAIN
), /* V8.1-M MAINLINE. */
14388 T(V4T_PLUS_V6_M
) /* V4T plus V6_M. */
14390 const int *comb
[] =
14406 /* Pseudo-architecture. */
14410 /* Check we've not got a higher architecture than we know about. */
14412 if (oldtag
> MAX_TAG_CPU_ARCH
|| newtag
> MAX_TAG_CPU_ARCH
)
14414 _bfd_error_handler (_("error: %pB: unknown CPU architecture"), ibfd
);
14418 /* Override old tag if we have a Tag_also_compatible_with on the output. */
14420 if ((oldtag
== T(V6_M
) && *secondary_compat_out
== T(V4T
))
14421 || (oldtag
== T(V4T
) && *secondary_compat_out
== T(V6_M
)))
14422 oldtag
= T(V4T_PLUS_V6_M
);
14424 /* And override the new tag if we have a Tag_also_compatible_with on the
14427 if ((newtag
== T(V6_M
) && secondary_compat
== T(V4T
))
14428 || (newtag
== T(V4T
) && secondary_compat
== T(V6_M
)))
14429 newtag
= T(V4T_PLUS_V6_M
);
14431 tagl
= (oldtag
< newtag
) ? oldtag
: newtag
;
14432 result
= tagh
= (oldtag
> newtag
) ? oldtag
: newtag
;
14434 /* Architectures before V6KZ add features monotonically. */
14435 if (tagh
<= TAG_CPU_ARCH_V6KZ
)
14438 result
= comb
[tagh
- T(V6T2
)] ? comb
[tagh
- T(V6T2
)][tagl
] : -1;
14440 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
14441 as the canonical version. */
14442 if (result
== T(V4T_PLUS_V6_M
))
14445 *secondary_compat_out
= T(V6_M
);
14448 *secondary_compat_out
= -1;
14452 _bfd_error_handler (_("error: %pB: conflicting CPU architectures %d/%d"),
14453 ibfd
, oldtag
, newtag
);
14461 /* Query attributes object to see if integer divide instructions may be
14462 present in an object. */
14464 elf32_arm_attributes_accept_div (const obj_attribute
*attr
)
14466 int arch
= attr
[Tag_CPU_arch
].i
;
14467 int profile
= attr
[Tag_CPU_arch_profile
].i
;
14469 switch (attr
[Tag_DIV_use
].i
)
14472 /* Integer divide allowed if instruction contained in archetecture. */
14473 if (arch
== TAG_CPU_ARCH_V7
&& (profile
== 'R' || profile
== 'M'))
14475 else if (arch
>= TAG_CPU_ARCH_V7E_M
)
14481 /* Integer divide explicitly prohibited. */
14485 /* Unrecognised case - treat as allowing divide everywhere. */
14487 /* Integer divide allowed in ARM state. */
14492 /* Query attributes object to see if integer divide instructions are
14493 forbidden to be in the object. This is not the inverse of
14494 elf32_arm_attributes_accept_div. */
14496 elf32_arm_attributes_forbid_div (const obj_attribute
*attr
)
14498 return attr
[Tag_DIV_use
].i
== 1;
14501 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
14502 are conflicting attributes. */
14505 elf32_arm_merge_eabi_attributes (bfd
*ibfd
, struct bfd_link_info
*info
)
14507 bfd
*obfd
= info
->output_bfd
;
14508 obj_attribute
*in_attr
;
14509 obj_attribute
*out_attr
;
14510 /* Some tags have 0 = don't care, 1 = strong requirement,
14511 2 = weak requirement. */
14512 static const int order_021
[3] = {0, 2, 1};
14514 bfd_boolean result
= TRUE
;
14515 const char *sec_name
= get_elf_backend_data (ibfd
)->obj_attrs_section
;
14517 /* Skip the linker stubs file. This preserves previous behavior
14518 of accepting unknown attributes in the first input file - but
14520 if (ibfd
->flags
& BFD_LINKER_CREATED
)
14523 /* Skip any input that hasn't attribute section.
14524 This enables to link object files without attribute section with
14526 if (bfd_get_section_by_name (ibfd
, sec_name
) == NULL
)
14529 if (!elf_known_obj_attributes_proc (obfd
)[0].i
)
14531 /* This is the first object. Copy the attributes. */
14532 _bfd_elf_copy_obj_attributes (ibfd
, obfd
);
14534 out_attr
= elf_known_obj_attributes_proc (obfd
);
14536 /* Use the Tag_null value to indicate the attributes have been
14540 /* We do not output objects with Tag_MPextension_use_legacy - we move
14541 the attribute's value to Tag_MPextension_use. */
14542 if (out_attr
[Tag_MPextension_use_legacy
].i
!= 0)
14544 if (out_attr
[Tag_MPextension_use
].i
!= 0
14545 && out_attr
[Tag_MPextension_use_legacy
].i
14546 != out_attr
[Tag_MPextension_use
].i
)
14549 (_("Error: %pB has both the current and legacy "
14550 "Tag_MPextension_use attributes"), ibfd
);
14554 out_attr
[Tag_MPextension_use
] =
14555 out_attr
[Tag_MPextension_use_legacy
];
14556 out_attr
[Tag_MPextension_use_legacy
].type
= 0;
14557 out_attr
[Tag_MPextension_use_legacy
].i
= 0;
14563 in_attr
= elf_known_obj_attributes_proc (ibfd
);
14564 out_attr
= elf_known_obj_attributes_proc (obfd
);
14565 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
14566 if (in_attr
[Tag_ABI_VFP_args
].i
!= out_attr
[Tag_ABI_VFP_args
].i
)
14568 /* Ignore mismatches if the object doesn't use floating point or is
14569 floating point ABI independent. */
14570 if (out_attr
[Tag_ABI_FP_number_model
].i
== AEABI_FP_number_model_none
14571 || (in_attr
[Tag_ABI_FP_number_model
].i
!= AEABI_FP_number_model_none
14572 && out_attr
[Tag_ABI_VFP_args
].i
== AEABI_VFP_args_compatible
))
14573 out_attr
[Tag_ABI_VFP_args
].i
= in_attr
[Tag_ABI_VFP_args
].i
;
14574 else if (in_attr
[Tag_ABI_FP_number_model
].i
!= AEABI_FP_number_model_none
14575 && in_attr
[Tag_ABI_VFP_args
].i
!= AEABI_VFP_args_compatible
)
14578 (_("error: %pB uses VFP register arguments, %pB does not"),
14579 in_attr
[Tag_ABI_VFP_args
].i
? ibfd
: obfd
,
14580 in_attr
[Tag_ABI_VFP_args
].i
? obfd
: ibfd
);
14585 for (i
= LEAST_KNOWN_OBJ_ATTRIBUTE
; i
< NUM_KNOWN_OBJ_ATTRIBUTES
; i
++)
14587 /* Merge this attribute with existing attributes. */
14590 case Tag_CPU_raw_name
:
14592 /* These are merged after Tag_CPU_arch. */
14595 case Tag_ABI_optimization_goals
:
14596 case Tag_ABI_FP_optimization_goals
:
14597 /* Use the first value seen. */
14602 int secondary_compat
= -1, secondary_compat_out
= -1;
14603 unsigned int saved_out_attr
= out_attr
[i
].i
;
14605 static const char *name_table
[] =
14607 /* These aren't real CPU names, but we can't guess
14608 that from the architecture version alone. */
14624 "ARM v8-M.baseline",
14625 "ARM v8-M.mainline",
14628 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
14629 secondary_compat
= get_secondary_compatible_arch (ibfd
);
14630 secondary_compat_out
= get_secondary_compatible_arch (obfd
);
14631 arch_attr
= tag_cpu_arch_combine (ibfd
, out_attr
[i
].i
,
14632 &secondary_compat_out
,
14636 /* Return with error if failed to merge. */
14637 if (arch_attr
== -1)
14640 out_attr
[i
].i
= arch_attr
;
14642 set_secondary_compatible_arch (obfd
, secondary_compat_out
);
14644 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
14645 if (out_attr
[i
].i
== saved_out_attr
)
14646 ; /* Leave the names alone. */
14647 else if (out_attr
[i
].i
== in_attr
[i
].i
)
14649 /* The output architecture has been changed to match the
14650 input architecture. Use the input names. */
14651 out_attr
[Tag_CPU_name
].s
= in_attr
[Tag_CPU_name
].s
14652 ? _bfd_elf_attr_strdup (obfd
, in_attr
[Tag_CPU_name
].s
)
14654 out_attr
[Tag_CPU_raw_name
].s
= in_attr
[Tag_CPU_raw_name
].s
14655 ? _bfd_elf_attr_strdup (obfd
, in_attr
[Tag_CPU_raw_name
].s
)
14660 out_attr
[Tag_CPU_name
].s
= NULL
;
14661 out_attr
[Tag_CPU_raw_name
].s
= NULL
;
14664 /* If we still don't have a value for Tag_CPU_name,
14665 make one up now. Tag_CPU_raw_name remains blank. */
14666 if (out_attr
[Tag_CPU_name
].s
== NULL
14667 && out_attr
[i
].i
< ARRAY_SIZE (name_table
))
14668 out_attr
[Tag_CPU_name
].s
=
14669 _bfd_elf_attr_strdup (obfd
, name_table
[out_attr
[i
].i
]);
14673 case Tag_ARM_ISA_use
:
14674 case Tag_THUMB_ISA_use
:
14675 case Tag_WMMX_arch
:
14676 case Tag_Advanced_SIMD_arch
:
14677 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
14678 case Tag_ABI_FP_rounding
:
14679 case Tag_ABI_FP_exceptions
:
14680 case Tag_ABI_FP_user_exceptions
:
14681 case Tag_ABI_FP_number_model
:
14682 case Tag_FP_HP_extension
:
14683 case Tag_CPU_unaligned_access
:
14685 case Tag_MPextension_use
:
14687 /* Use the largest value specified. */
14688 if (in_attr
[i
].i
> out_attr
[i
].i
)
14689 out_attr
[i
].i
= in_attr
[i
].i
;
14692 case Tag_ABI_align_preserved
:
14693 case Tag_ABI_PCS_RO_data
:
14694 /* Use the smallest value specified. */
14695 if (in_attr
[i
].i
< out_attr
[i
].i
)
14696 out_attr
[i
].i
= in_attr
[i
].i
;
14699 case Tag_ABI_align_needed
:
14700 if ((in_attr
[i
].i
> 0 || out_attr
[i
].i
> 0)
14701 && (in_attr
[Tag_ABI_align_preserved
].i
== 0
14702 || out_attr
[Tag_ABI_align_preserved
].i
== 0))
14704 /* This error message should be enabled once all non-conformant
14705 binaries in the toolchain have had the attributes set
14708 (_("error: %pB: 8-byte data alignment conflicts with %pB"),
14712 /* Fall through. */
14713 case Tag_ABI_FP_denormal
:
14714 case Tag_ABI_PCS_GOT_use
:
14715 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
14716 value if greater than 2 (for future-proofing). */
14717 if ((in_attr
[i
].i
> 2 && in_attr
[i
].i
> out_attr
[i
].i
)
14718 || (in_attr
[i
].i
<= 2 && out_attr
[i
].i
<= 2
14719 && order_021
[in_attr
[i
].i
] > order_021
[out_attr
[i
].i
]))
14720 out_attr
[i
].i
= in_attr
[i
].i
;
14723 case Tag_Virtualization_use
:
14724 /* The virtualization tag effectively stores two bits of
14725 information: the intended use of TrustZone (in bit 0), and the
14726 intended use of Virtualization (in bit 1). */
14727 if (out_attr
[i
].i
== 0)
14728 out_attr
[i
].i
= in_attr
[i
].i
;
14729 else if (in_attr
[i
].i
!= 0
14730 && in_attr
[i
].i
!= out_attr
[i
].i
)
14732 if (in_attr
[i
].i
<= 3 && out_attr
[i
].i
<= 3)
14737 (_("error: %pB: unable to merge virtualization attributes "
14745 case Tag_CPU_arch_profile
:
14746 if (out_attr
[i
].i
!= in_attr
[i
].i
)
14748 /* 0 will merge with anything.
14749 'A' and 'S' merge to 'A'.
14750 'R' and 'S' merge to 'R'.
14751 'M' and 'A|R|S' is an error. */
14752 if (out_attr
[i
].i
== 0
14753 || (out_attr
[i
].i
== 'S'
14754 && (in_attr
[i
].i
== 'A' || in_attr
[i
].i
== 'R')))
14755 out_attr
[i
].i
= in_attr
[i
].i
;
14756 else if (in_attr
[i
].i
== 0
14757 || (in_attr
[i
].i
== 'S'
14758 && (out_attr
[i
].i
== 'A' || out_attr
[i
].i
== 'R')))
14759 ; /* Do nothing. */
14763 (_("error: %pB: conflicting architecture profiles %c/%c"),
14765 in_attr
[i
].i
? in_attr
[i
].i
: '0',
14766 out_attr
[i
].i
? out_attr
[i
].i
: '0');
14772 case Tag_DSP_extension
:
14773 /* No need to change output value if any of:
14774 - pre (<=) ARMv5T input architecture (do not have DSP)
14775 - M input profile not ARMv7E-M and do not have DSP. */
14776 if (in_attr
[Tag_CPU_arch
].i
<= 3
14777 || (in_attr
[Tag_CPU_arch_profile
].i
== 'M'
14778 && in_attr
[Tag_CPU_arch
].i
!= 13
14779 && in_attr
[i
].i
== 0))
14780 ; /* Do nothing. */
14781 /* Output value should be 0 if DSP part of architecture, ie.
14782 - post (>=) ARMv5te architecture output
14783 - A, R or S profile output or ARMv7E-M output architecture. */
14784 else if (out_attr
[Tag_CPU_arch
].i
>= 4
14785 && (out_attr
[Tag_CPU_arch_profile
].i
== 'A'
14786 || out_attr
[Tag_CPU_arch_profile
].i
== 'R'
14787 || out_attr
[Tag_CPU_arch_profile
].i
== 'S'
14788 || out_attr
[Tag_CPU_arch
].i
== 13))
14790 /* Otherwise, DSP instructions are added and not part of output
14798 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
14799 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
14800 when it's 0. It might mean absence of FP hardware if
14801 Tag_FP_arch is zero. */
14803 #define VFP_VERSION_COUNT 9
14804 static const struct
14808 } vfp_versions
[VFP_VERSION_COUNT
] =
14824 /* If the output has no requirement about FP hardware,
14825 follow the requirement of the input. */
14826 if (out_attr
[i
].i
== 0)
14828 /* This assert is still reasonable, we shouldn't
14829 produce the suspicious build attribute
14830 combination (See below for in_attr). */
14831 BFD_ASSERT (out_attr
[Tag_ABI_HardFP_use
].i
== 0);
14832 out_attr
[i
].i
= in_attr
[i
].i
;
14833 out_attr
[Tag_ABI_HardFP_use
].i
14834 = in_attr
[Tag_ABI_HardFP_use
].i
;
14837 /* If the input has no requirement about FP hardware, do
14839 else if (in_attr
[i
].i
== 0)
14841 /* We used to assert that Tag_ABI_HardFP_use was
14842 zero here, but we should never assert when
14843 consuming an object file that has suspicious
14844 build attributes. The single precision variant
14845 of 'no FP architecture' is still 'no FP
14846 architecture', so we just ignore the tag in this
14851 /* Both the input and the output have nonzero Tag_FP_arch.
14852 So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */
14854 /* If both the input and the output have zero Tag_ABI_HardFP_use,
14856 if (in_attr
[Tag_ABI_HardFP_use
].i
== 0
14857 && out_attr
[Tag_ABI_HardFP_use
].i
== 0)
14859 /* If the input and the output have different Tag_ABI_HardFP_use,
14860 the combination of them is 0 (implied by Tag_FP_arch). */
14861 else if (in_attr
[Tag_ABI_HardFP_use
].i
14862 != out_attr
[Tag_ABI_HardFP_use
].i
)
14863 out_attr
[Tag_ABI_HardFP_use
].i
= 0;
14865 /* Now we can handle Tag_FP_arch. */
14867 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
14868 pick the biggest. */
14869 if (in_attr
[i
].i
>= VFP_VERSION_COUNT
14870 && in_attr
[i
].i
> out_attr
[i
].i
)
14872 out_attr
[i
] = in_attr
[i
];
14875 /* The output uses the superset of input features
14876 (ISA version) and registers. */
14877 ver
= vfp_versions
[in_attr
[i
].i
].ver
;
14878 if (ver
< vfp_versions
[out_attr
[i
].i
].ver
)
14879 ver
= vfp_versions
[out_attr
[i
].i
].ver
;
14880 regs
= vfp_versions
[in_attr
[i
].i
].regs
;
14881 if (regs
< vfp_versions
[out_attr
[i
].i
].regs
)
14882 regs
= vfp_versions
[out_attr
[i
].i
].regs
;
14883 /* This assumes all possible supersets are also a valid
14885 for (newval
= VFP_VERSION_COUNT
- 1; newval
> 0; newval
--)
14887 if (regs
== vfp_versions
[newval
].regs
14888 && ver
== vfp_versions
[newval
].ver
)
14891 out_attr
[i
].i
= newval
;
14894 case Tag_PCS_config
:
14895 if (out_attr
[i
].i
== 0)
14896 out_attr
[i
].i
= in_attr
[i
].i
;
14897 else if (in_attr
[i
].i
!= 0 && out_attr
[i
].i
!= in_attr
[i
].i
)
14899 /* It's sometimes ok to mix different configs, so this is only
14902 (_("warning: %pB: conflicting platform configuration"), ibfd
);
14905 case Tag_ABI_PCS_R9_use
:
14906 if (in_attr
[i
].i
!= out_attr
[i
].i
14907 && out_attr
[i
].i
!= AEABI_R9_unused
14908 && in_attr
[i
].i
!= AEABI_R9_unused
)
14911 (_("error: %pB: conflicting use of R9"), ibfd
);
14914 if (out_attr
[i
].i
== AEABI_R9_unused
)
14915 out_attr
[i
].i
= in_attr
[i
].i
;
14917 case Tag_ABI_PCS_RW_data
:
14918 if (in_attr
[i
].i
== AEABI_PCS_RW_data_SBrel
14919 && out_attr
[Tag_ABI_PCS_R9_use
].i
!= AEABI_R9_SB
14920 && out_attr
[Tag_ABI_PCS_R9_use
].i
!= AEABI_R9_unused
)
14923 (_("error: %pB: SB relative addressing conflicts with use of R9"),
14927 /* Use the smallest value specified. */
14928 if (in_attr
[i
].i
< out_attr
[i
].i
)
14929 out_attr
[i
].i
= in_attr
[i
].i
;
14931 case Tag_ABI_PCS_wchar_t
:
14932 if (out_attr
[i
].i
&& in_attr
[i
].i
&& out_attr
[i
].i
!= in_attr
[i
].i
14933 && !elf_arm_tdata (obfd
)->no_wchar_size_warning
)
14936 (_("warning: %pB uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
14937 ibfd
, in_attr
[i
].i
, out_attr
[i
].i
);
14939 else if (in_attr
[i
].i
&& !out_attr
[i
].i
)
14940 out_attr
[i
].i
= in_attr
[i
].i
;
14942 case Tag_ABI_enum_size
:
14943 if (in_attr
[i
].i
!= AEABI_enum_unused
)
14945 if (out_attr
[i
].i
== AEABI_enum_unused
14946 || out_attr
[i
].i
== AEABI_enum_forced_wide
)
14948 /* The existing object is compatible with anything.
14949 Use whatever requirements the new object has. */
14950 out_attr
[i
].i
= in_attr
[i
].i
;
14952 else if (in_attr
[i
].i
!= AEABI_enum_forced_wide
14953 && out_attr
[i
].i
!= in_attr
[i
].i
14954 && !elf_arm_tdata (obfd
)->no_enum_size_warning
)
14956 static const char *aeabi_enum_names
[] =
14957 { "", "variable-size", "32-bit", "" };
14958 const char *in_name
=
14959 in_attr
[i
].i
< ARRAY_SIZE(aeabi_enum_names
)
14960 ? aeabi_enum_names
[in_attr
[i
].i
]
14962 const char *out_name
=
14963 out_attr
[i
].i
< ARRAY_SIZE(aeabi_enum_names
)
14964 ? aeabi_enum_names
[out_attr
[i
].i
]
14967 (_("warning: %pB uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
14968 ibfd
, in_name
, out_name
);
14972 case Tag_ABI_VFP_args
:
14975 case Tag_ABI_WMMX_args
:
14976 if (in_attr
[i
].i
!= out_attr
[i
].i
)
14979 (_("error: %pB uses iWMMXt register arguments, %pB does not"),
14984 case Tag_compatibility
:
14985 /* Merged in target-independent code. */
14987 case Tag_ABI_HardFP_use
:
14988 /* This is handled along with Tag_FP_arch. */
14990 case Tag_ABI_FP_16bit_format
:
14991 if (in_attr
[i
].i
!= 0 && out_attr
[i
].i
!= 0)
14993 if (in_attr
[i
].i
!= out_attr
[i
].i
)
14996 (_("error: fp16 format mismatch between %pB and %pB"),
15001 if (in_attr
[i
].i
!= 0)
15002 out_attr
[i
].i
= in_attr
[i
].i
;
15006 /* A value of zero on input means that the divide instruction may
15007 be used if available in the base architecture as specified via
15008 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
15009 the user did not want divide instructions. A value of 2
15010 explicitly means that divide instructions were allowed in ARM
15011 and Thumb state. */
15012 if (in_attr
[i
].i
== out_attr
[i
].i
)
15013 /* Do nothing. */ ;
15014 else if (elf32_arm_attributes_forbid_div (in_attr
)
15015 && !elf32_arm_attributes_accept_div (out_attr
))
15017 else if (elf32_arm_attributes_forbid_div (out_attr
)
15018 && elf32_arm_attributes_accept_div (in_attr
))
15019 out_attr
[i
].i
= in_attr
[i
].i
;
15020 else if (in_attr
[i
].i
== 2)
15021 out_attr
[i
].i
= in_attr
[i
].i
;
15024 case Tag_MPextension_use_legacy
:
15025 /* We don't output objects with Tag_MPextension_use_legacy - we
15026 move the value to Tag_MPextension_use. */
15027 if (in_attr
[i
].i
!= 0 && in_attr
[Tag_MPextension_use
].i
!= 0)
15029 if (in_attr
[Tag_MPextension_use
].i
!= in_attr
[i
].i
)
15032 (_("%pB has both the current and legacy "
15033 "Tag_MPextension_use attributes"),
15039 if (in_attr
[i
].i
> out_attr
[Tag_MPextension_use
].i
)
15040 out_attr
[Tag_MPextension_use
] = in_attr
[i
];
15044 case Tag_nodefaults
:
15045 /* This tag is set if it exists, but the value is unused (and is
15046 typically zero). We don't actually need to do anything here -
15047 the merge happens automatically when the type flags are merged
15050 case Tag_also_compatible_with
:
15051 /* Already done in Tag_CPU_arch. */
15053 case Tag_conformance
:
15054 /* Keep the attribute if it matches. Throw it away otherwise.
15055 No attribute means no claim to conform. */
15056 if (!in_attr
[i
].s
|| !out_attr
[i
].s
15057 || strcmp (in_attr
[i
].s
, out_attr
[i
].s
) != 0)
15058 out_attr
[i
].s
= NULL
;
15063 = result
&& _bfd_elf_merge_unknown_attribute_low (ibfd
, obfd
, i
);
15066 /* If out_attr was copied from in_attr then it won't have a type yet. */
15067 if (in_attr
[i
].type
&& !out_attr
[i
].type
)
15068 out_attr
[i
].type
= in_attr
[i
].type
;
15071 /* Merge Tag_compatibility attributes and any common GNU ones. */
15072 if (!_bfd_elf_merge_object_attributes (ibfd
, info
))
15075 /* Check for any attributes not known on ARM. */
15076 result
&= _bfd_elf_merge_unknown_attribute_list (ibfd
, obfd
);
15082 /* Return TRUE if the two EABI versions are incompatible. */
15085 elf32_arm_versions_compatible (unsigned iver
, unsigned over
)
15087 /* v4 and v5 are the same spec before and after it was released,
15088 so allow mixing them. */
15089 if ((iver
== EF_ARM_EABI_VER4
&& over
== EF_ARM_EABI_VER5
)
15090 || (iver
== EF_ARM_EABI_VER5
&& over
== EF_ARM_EABI_VER4
))
15093 return (iver
== over
);
15096 /* Merge backend specific data from an object file to the output
15097 object file when linking. */
15100 elf32_arm_merge_private_bfd_data (bfd
*, struct bfd_link_info
*);
15102 /* Display the flags field. */
15105 elf32_arm_print_private_bfd_data (bfd
*abfd
, void * ptr
)
15107 FILE * file
= (FILE *) ptr
;
15108 unsigned long flags
;
15110 BFD_ASSERT (abfd
!= NULL
&& ptr
!= NULL
);
15112 /* Print normal ELF private data. */
15113 _bfd_elf_print_private_bfd_data (abfd
, ptr
);
15115 flags
= elf_elfheader (abfd
)->e_flags
;
15116 /* Ignore init flag - it may not be set, despite the flags field
15117 containing valid data. */
15119 fprintf (file
, _("private flags = %lx:"), elf_elfheader (abfd
)->e_flags
);
15121 switch (EF_ARM_EABI_VERSION (flags
))
15123 case EF_ARM_EABI_UNKNOWN
:
15124 /* The following flag bits are GNU extensions and not part of the
15125 official ARM ELF extended ABI. Hence they are only decoded if
15126 the EABI version is not set. */
15127 if (flags
& EF_ARM_INTERWORK
)
15128 fprintf (file
, _(" [interworking enabled]"));
15130 if (flags
& EF_ARM_APCS_26
)
15131 fprintf (file
, " [APCS-26]");
15133 fprintf (file
, " [APCS-32]");
15135 if (flags
& EF_ARM_VFP_FLOAT
)
15136 fprintf (file
, _(" [VFP float format]"));
15137 else if (flags
& EF_ARM_MAVERICK_FLOAT
)
15138 fprintf (file
, _(" [Maverick float format]"));
15140 fprintf (file
, _(" [FPA float format]"));
15142 if (flags
& EF_ARM_APCS_FLOAT
)
15143 fprintf (file
, _(" [floats passed in float registers]"));
15145 if (flags
& EF_ARM_PIC
)
15146 fprintf (file
, _(" [position independent]"));
15148 if (flags
& EF_ARM_NEW_ABI
)
15149 fprintf (file
, _(" [new ABI]"));
15151 if (flags
& EF_ARM_OLD_ABI
)
15152 fprintf (file
, _(" [old ABI]"));
15154 if (flags
& EF_ARM_SOFT_FLOAT
)
15155 fprintf (file
, _(" [software FP]"));
15157 flags
&= ~(EF_ARM_INTERWORK
| EF_ARM_APCS_26
| EF_ARM_APCS_FLOAT
15158 | EF_ARM_PIC
| EF_ARM_NEW_ABI
| EF_ARM_OLD_ABI
15159 | EF_ARM_SOFT_FLOAT
| EF_ARM_VFP_FLOAT
15160 | EF_ARM_MAVERICK_FLOAT
);
15163 case EF_ARM_EABI_VER1
:
15164 fprintf (file
, _(" [Version1 EABI]"));
15166 if (flags
& EF_ARM_SYMSARESORTED
)
15167 fprintf (file
, _(" [sorted symbol table]"));
15169 fprintf (file
, _(" [unsorted symbol table]"));
15171 flags
&= ~ EF_ARM_SYMSARESORTED
;
15174 case EF_ARM_EABI_VER2
:
15175 fprintf (file
, _(" [Version2 EABI]"));
15177 if (flags
& EF_ARM_SYMSARESORTED
)
15178 fprintf (file
, _(" [sorted symbol table]"));
15180 fprintf (file
, _(" [unsorted symbol table]"));
15182 if (flags
& EF_ARM_DYNSYMSUSESEGIDX
)
15183 fprintf (file
, _(" [dynamic symbols use segment index]"));
15185 if (flags
& EF_ARM_MAPSYMSFIRST
)
15186 fprintf (file
, _(" [mapping symbols precede others]"));
15188 flags
&= ~(EF_ARM_SYMSARESORTED
| EF_ARM_DYNSYMSUSESEGIDX
15189 | EF_ARM_MAPSYMSFIRST
);
15192 case EF_ARM_EABI_VER3
:
15193 fprintf (file
, _(" [Version3 EABI]"));
15196 case EF_ARM_EABI_VER4
:
15197 fprintf (file
, _(" [Version4 EABI]"));
15200 case EF_ARM_EABI_VER5
:
15201 fprintf (file
, _(" [Version5 EABI]"));
15203 if (flags
& EF_ARM_ABI_FLOAT_SOFT
)
15204 fprintf (file
, _(" [soft-float ABI]"));
15206 if (flags
& EF_ARM_ABI_FLOAT_HARD
)
15207 fprintf (file
, _(" [hard-float ABI]"));
15209 flags
&= ~(EF_ARM_ABI_FLOAT_SOFT
| EF_ARM_ABI_FLOAT_HARD
);
15212 if (flags
& EF_ARM_BE8
)
15213 fprintf (file
, _(" [BE8]"));
15215 if (flags
& EF_ARM_LE8
)
15216 fprintf (file
, _(" [LE8]"));
15218 flags
&= ~(EF_ARM_LE8
| EF_ARM_BE8
);
15222 fprintf (file
, _(" <EABI version unrecognised>"));
15226 flags
&= ~ EF_ARM_EABIMASK
;
15228 if (flags
& EF_ARM_RELEXEC
)
15229 fprintf (file
, _(" [relocatable executable]"));
15231 if (flags
& EF_ARM_PIC
)
15232 fprintf (file
, _(" [position independent]"));
15234 if (elf_elfheader (abfd
)->e_ident
[EI_OSABI
] == ELFOSABI_ARM_FDPIC
)
15235 fprintf (file
, _(" [FDPIC ABI supplement]"));
15237 flags
&= ~ (EF_ARM_RELEXEC
| EF_ARM_PIC
);
15240 fprintf (file
, _("<Unrecognised flag bits set>"));
15242 fputc ('\n', file
);
15248 elf32_arm_get_symbol_type (Elf_Internal_Sym
* elf_sym
, int type
)
15250 switch (ELF_ST_TYPE (elf_sym
->st_info
))
15252 case STT_ARM_TFUNC
:
15253 return ELF_ST_TYPE (elf_sym
->st_info
);
15255 case STT_ARM_16BIT
:
15256 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
15257 This allows us to distinguish between data used by Thumb instructions
15258 and non-data (which is probably code) inside Thumb regions of an
15260 if (type
!= STT_OBJECT
&& type
!= STT_TLS
)
15261 return ELF_ST_TYPE (elf_sym
->st_info
);
15272 elf32_arm_gc_mark_hook (asection
*sec
,
15273 struct bfd_link_info
*info
,
15274 Elf_Internal_Rela
*rel
,
15275 struct elf_link_hash_entry
*h
,
15276 Elf_Internal_Sym
*sym
)
15279 switch (ELF32_R_TYPE (rel
->r_info
))
15281 case R_ARM_GNU_VTINHERIT
:
15282 case R_ARM_GNU_VTENTRY
:
15286 return _bfd_elf_gc_mark_hook (sec
, info
, rel
, h
, sym
);
15289 /* Look through the relocs for a section during the first phase. */
15292 elf32_arm_check_relocs (bfd
*abfd
, struct bfd_link_info
*info
,
15293 asection
*sec
, const Elf_Internal_Rela
*relocs
)
15295 Elf_Internal_Shdr
*symtab_hdr
;
15296 struct elf_link_hash_entry
**sym_hashes
;
15297 const Elf_Internal_Rela
*rel
;
15298 const Elf_Internal_Rela
*rel_end
;
15301 struct elf32_arm_link_hash_table
*htab
;
15302 bfd_boolean call_reloc_p
;
15303 bfd_boolean may_become_dynamic_p
;
15304 bfd_boolean may_need_local_target_p
;
15305 unsigned long nsyms
;
15307 if (bfd_link_relocatable (info
))
15310 BFD_ASSERT (is_arm_elf (abfd
));
15312 htab
= elf32_arm_hash_table (info
);
15318 /* Create dynamic sections for relocatable executables so that we can
15319 copy relocations. */
15320 if (htab
->root
.is_relocatable_executable
15321 && ! htab
->root
.dynamic_sections_created
)
15323 if (! _bfd_elf_link_create_dynamic_sections (abfd
, info
))
15327 if (htab
->root
.dynobj
== NULL
)
15328 htab
->root
.dynobj
= abfd
;
15329 if (!create_ifunc_sections (info
))
15332 dynobj
= htab
->root
.dynobj
;
15334 symtab_hdr
= & elf_symtab_hdr (abfd
);
15335 sym_hashes
= elf_sym_hashes (abfd
);
15336 nsyms
= NUM_SHDR_ENTRIES (symtab_hdr
);
15338 rel_end
= relocs
+ sec
->reloc_count
;
15339 for (rel
= relocs
; rel
< rel_end
; rel
++)
15341 Elf_Internal_Sym
*isym
;
15342 struct elf_link_hash_entry
*h
;
15343 struct elf32_arm_link_hash_entry
*eh
;
15344 unsigned int r_symndx
;
15347 r_symndx
= ELF32_R_SYM (rel
->r_info
);
15348 r_type
= ELF32_R_TYPE (rel
->r_info
);
15349 r_type
= arm_real_reloc_type (htab
, r_type
);
15351 if (r_symndx
>= nsyms
15352 /* PR 9934: It is possible to have relocations that do not
15353 refer to symbols, thus it is also possible to have an
15354 object file containing relocations but no symbol table. */
15355 && (r_symndx
> STN_UNDEF
|| nsyms
> 0))
15357 _bfd_error_handler (_("%pB: bad symbol index: %d"), abfd
,
15366 if (r_symndx
< symtab_hdr
->sh_info
)
15368 /* A local symbol. */
15369 isym
= bfd_sym_from_r_symndx (&htab
->sym_cache
,
15376 h
= sym_hashes
[r_symndx
- symtab_hdr
->sh_info
];
15377 while (h
->root
.type
== bfd_link_hash_indirect
15378 || h
->root
.type
== bfd_link_hash_warning
)
15379 h
= (struct elf_link_hash_entry
*) h
->root
.u
.i
.link
;
15383 eh
= (struct elf32_arm_link_hash_entry
*) h
;
15385 call_reloc_p
= FALSE
;
15386 may_become_dynamic_p
= FALSE
;
15387 may_need_local_target_p
= FALSE
;
15389 /* Could be done earlier, if h were already available. */
15390 r_type
= elf32_arm_tls_transition (info
, r_type
, h
);
15393 case R_ARM_GOTOFFFUNCDESC
:
15397 if (!elf32_arm_allocate_local_sym_info (abfd
))
15399 elf32_arm_local_fdpic_cnts(abfd
)[r_symndx
].gotofffuncdesc_cnt
+= 1;
15400 elf32_arm_local_fdpic_cnts(abfd
)[r_symndx
].funcdesc_offset
= -1;
15404 eh
->fdpic_cnts
.gotofffuncdesc_cnt
++;
15409 case R_ARM_GOTFUNCDESC
:
15413 /* Such a relocation is not supposed to be generated
15414 by gcc on a static function. */
15415 /* Anyway if needed it could be handled. */
15420 eh
->fdpic_cnts
.gotfuncdesc_cnt
++;
15425 case R_ARM_FUNCDESC
:
15429 if (!elf32_arm_allocate_local_sym_info (abfd
))
15431 elf32_arm_local_fdpic_cnts(abfd
)[r_symndx
].funcdesc_cnt
+= 1;
15432 elf32_arm_local_fdpic_cnts(abfd
)[r_symndx
].funcdesc_offset
= -1;
15436 eh
->fdpic_cnts
.funcdesc_cnt
++;
15442 case R_ARM_GOT_PREL
:
15443 case R_ARM_TLS_GD32
:
15444 case R_ARM_TLS_GD32_FDPIC
:
15445 case R_ARM_TLS_IE32
:
15446 case R_ARM_TLS_IE32_FDPIC
:
15447 case R_ARM_TLS_GOTDESC
:
15448 case R_ARM_TLS_DESCSEQ
:
15449 case R_ARM_THM_TLS_DESCSEQ
:
15450 case R_ARM_TLS_CALL
:
15451 case R_ARM_THM_TLS_CALL
:
15452 /* This symbol requires a global offset table entry. */
15454 int tls_type
, old_tls_type
;
15458 case R_ARM_TLS_GD32
: tls_type
= GOT_TLS_GD
; break;
15459 case R_ARM_TLS_GD32_FDPIC
: tls_type
= GOT_TLS_GD
; break;
15461 case R_ARM_TLS_IE32
: tls_type
= GOT_TLS_IE
; break;
15462 case R_ARM_TLS_IE32_FDPIC
: tls_type
= GOT_TLS_IE
; break;
15464 case R_ARM_TLS_GOTDESC
:
15465 case R_ARM_TLS_CALL
: case R_ARM_THM_TLS_CALL
:
15466 case R_ARM_TLS_DESCSEQ
: case R_ARM_THM_TLS_DESCSEQ
:
15467 tls_type
= GOT_TLS_GDESC
; break;
15469 default: tls_type
= GOT_NORMAL
; break;
15472 if (!bfd_link_executable (info
) && (tls_type
& GOT_TLS_IE
))
15473 info
->flags
|= DF_STATIC_TLS
;
15478 old_tls_type
= elf32_arm_hash_entry (h
)->tls_type
;
15482 /* This is a global offset table entry for a local symbol. */
15483 if (!elf32_arm_allocate_local_sym_info (abfd
))
15485 elf_local_got_refcounts (abfd
)[r_symndx
] += 1;
15486 old_tls_type
= elf32_arm_local_got_tls_type (abfd
) [r_symndx
];
15489 /* If a variable is accessed with both tls methods, two
15490 slots may be created. */
15491 if (GOT_TLS_GD_ANY_P (old_tls_type
)
15492 && GOT_TLS_GD_ANY_P (tls_type
))
15493 tls_type
|= old_tls_type
;
15495 /* We will already have issued an error message if there
15496 is a TLS/non-TLS mismatch, based on the symbol
15497 type. So just combine any TLS types needed. */
15498 if (old_tls_type
!= GOT_UNKNOWN
&& old_tls_type
!= GOT_NORMAL
15499 && tls_type
!= GOT_NORMAL
)
15500 tls_type
|= old_tls_type
;
15502 /* If the symbol is accessed in both IE and GDESC
15503 method, we're able to relax. Turn off the GDESC flag,
15504 without messing up with any other kind of tls types
15505 that may be involved. */
15506 if ((tls_type
& GOT_TLS_IE
) && (tls_type
& GOT_TLS_GDESC
))
15507 tls_type
&= ~GOT_TLS_GDESC
;
15509 if (old_tls_type
!= tls_type
)
15512 elf32_arm_hash_entry (h
)->tls_type
= tls_type
;
15514 elf32_arm_local_got_tls_type (abfd
) [r_symndx
] = tls_type
;
15517 /* Fall through. */
15519 case R_ARM_TLS_LDM32
:
15520 case R_ARM_TLS_LDM32_FDPIC
:
15521 if (r_type
== R_ARM_TLS_LDM32
|| r_type
== R_ARM_TLS_LDM32_FDPIC
)
15522 htab
->tls_ldm_got
.refcount
++;
15523 /* Fall through. */
15525 case R_ARM_GOTOFF32
:
15527 if (htab
->root
.sgot
== NULL
15528 && !create_got_section (htab
->root
.dynobj
, info
))
15537 case R_ARM_THM_CALL
:
15538 case R_ARM_THM_JUMP24
:
15539 case R_ARM_THM_JUMP19
:
15540 call_reloc_p
= TRUE
;
15541 may_need_local_target_p
= TRUE
;
15545 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
15546 ldr __GOTT_INDEX__ offsets. */
15547 if (!htab
->vxworks_p
)
15549 may_need_local_target_p
= TRUE
;
15552 else goto jump_over
;
15554 /* Fall through. */
15556 case R_ARM_MOVW_ABS_NC
:
15557 case R_ARM_MOVT_ABS
:
15558 case R_ARM_THM_MOVW_ABS_NC
:
15559 case R_ARM_THM_MOVT_ABS
:
15560 if (bfd_link_pic (info
))
15563 (_("%pB: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
15564 abfd
, elf32_arm_howto_table_1
[r_type
].name
,
15565 (h
) ? h
->root
.root
.string
: "a local symbol");
15566 bfd_set_error (bfd_error_bad_value
);
15570 /* Fall through. */
15572 case R_ARM_ABS32_NOI
:
15574 if (h
!= NULL
&& bfd_link_executable (info
))
15576 h
->pointer_equality_needed
= 1;
15578 /* Fall through. */
15580 case R_ARM_REL32_NOI
:
15581 case R_ARM_MOVW_PREL_NC
:
15582 case R_ARM_MOVT_PREL
:
15583 case R_ARM_THM_MOVW_PREL_NC
:
15584 case R_ARM_THM_MOVT_PREL
:
15586 /* Should the interworking branches be listed here? */
15587 if ((bfd_link_pic (info
) || htab
->root
.is_relocatable_executable
15589 && (sec
->flags
& SEC_ALLOC
) != 0)
15592 && elf32_arm_howto_from_type (r_type
)->pc_relative
)
15594 /* In shared libraries and relocatable executables,
15595 we treat local relative references as calls;
15596 see the related SYMBOL_CALLS_LOCAL code in
15597 allocate_dynrelocs. */
15598 call_reloc_p
= TRUE
;
15599 may_need_local_target_p
= TRUE
;
15602 /* We are creating a shared library or relocatable
15603 executable, and this is a reloc against a global symbol,
15604 or a non-PC-relative reloc against a local symbol.
15605 We may need to copy the reloc into the output. */
15606 may_become_dynamic_p
= TRUE
;
15609 may_need_local_target_p
= TRUE
;
15612 /* This relocation describes the C++ object vtable hierarchy.
15613 Reconstruct it for later use during GC. */
15614 case R_ARM_GNU_VTINHERIT
:
15615 if (!bfd_elf_gc_record_vtinherit (abfd
, sec
, h
, rel
->r_offset
))
15619 /* This relocation describes which C++ vtable entries are actually
15620 used. Record for later use during GC. */
15621 case R_ARM_GNU_VTENTRY
:
15622 if (!bfd_elf_gc_record_vtentry (abfd
, sec
, h
, rel
->r_offset
))
15630 /* We may need a .plt entry if the function this reloc
15631 refers to is in a different object, regardless of the
15632 symbol's type. We can't tell for sure yet, because
15633 something later might force the symbol local. */
15635 else if (may_need_local_target_p
)
15636 /* If this reloc is in a read-only section, we might
15637 need a copy reloc. We can't check reliably at this
15638 stage whether the section is read-only, as input
15639 sections have not yet been mapped to output sections.
15640 Tentatively set the flag for now, and correct in
15641 adjust_dynamic_symbol. */
15642 h
->non_got_ref
= 1;
15645 if (may_need_local_target_p
15646 && (h
!= NULL
|| ELF32_ST_TYPE (isym
->st_info
) == STT_GNU_IFUNC
))
15648 union gotplt_union
*root_plt
;
15649 struct arm_plt_info
*arm_plt
;
15650 struct arm_local_iplt_info
*local_iplt
;
15654 root_plt
= &h
->plt
;
15655 arm_plt
= &eh
->plt
;
15659 local_iplt
= elf32_arm_create_local_iplt (abfd
, r_symndx
);
15660 if (local_iplt
== NULL
)
15662 root_plt
= &local_iplt
->root
;
15663 arm_plt
= &local_iplt
->arm
;
15666 /* If the symbol is a function that doesn't bind locally,
15667 this relocation will need a PLT entry. */
15668 if (root_plt
->refcount
!= -1)
15669 root_plt
->refcount
+= 1;
15672 arm_plt
->noncall_refcount
++;
15674 /* It's too early to use htab->use_blx here, so we have to
15675 record possible blx references separately from
15676 relocs that definitely need a thumb stub. */
15678 if (r_type
== R_ARM_THM_CALL
)
15679 arm_plt
->maybe_thumb_refcount
+= 1;
15681 if (r_type
== R_ARM_THM_JUMP24
15682 || r_type
== R_ARM_THM_JUMP19
)
15683 arm_plt
->thumb_refcount
+= 1;
15686 if (may_become_dynamic_p
)
15688 struct elf_dyn_relocs
*p
, **head
;
15690 /* Create a reloc section in dynobj. */
15691 if (sreloc
== NULL
)
15693 sreloc
= _bfd_elf_make_dynamic_reloc_section
15694 (sec
, dynobj
, 2, abfd
, ! htab
->use_rel
);
15696 if (sreloc
== NULL
)
15699 /* BPABI objects never have dynamic relocations mapped. */
15700 if (htab
->symbian_p
)
15704 flags
= bfd_section_flags (sreloc
);
15705 flags
&= ~(SEC_LOAD
| SEC_ALLOC
);
15706 bfd_set_section_flags (sreloc
, flags
);
15710 /* If this is a global symbol, count the number of
15711 relocations we need for this symbol. */
15713 head
= &h
->dyn_relocs
;
15716 head
= elf32_arm_get_local_dynreloc_list (abfd
, r_symndx
, isym
);
15722 if (p
== NULL
|| p
->sec
!= sec
)
15724 size_t amt
= sizeof *p
;
15726 p
= (struct elf_dyn_relocs
*) bfd_alloc (htab
->root
.dynobj
, amt
);
15736 if (elf32_arm_howto_from_type (r_type
)->pc_relative
)
15739 if (h
== NULL
&& htab
->fdpic_p
&& !bfd_link_pic(info
)
15740 && r_type
!= R_ARM_ABS32
&& r_type
!= R_ARM_ABS32_NOI
) {
15741 /* Here we only support R_ARM_ABS32 and R_ARM_ABS32_NOI
15742 that will become rofixup. */
15743 /* This is due to the fact that we suppose all will become rofixup. */
15744 fprintf(stderr
, "FDPIC does not yet support %d relocation to become dynamic for executable\n", r_type
);
15746 (_("FDPIC does not yet support %s relocation"
15747 " to become dynamic for executable"),
15748 elf32_arm_howto_table_1
[r_type
].name
);
15758 elf32_arm_update_relocs (asection
*o
,
15759 struct bfd_elf_section_reloc_data
*reldata
)
15761 void (*swap_in
) (bfd
*, const bfd_byte
*, Elf_Internal_Rela
*);
15762 void (*swap_out
) (bfd
*, const Elf_Internal_Rela
*, bfd_byte
*);
15763 const struct elf_backend_data
*bed
;
15764 _arm_elf_section_data
*eado
;
15765 struct bfd_link_order
*p
;
15766 bfd_byte
*erela_head
, *erela
;
15767 Elf_Internal_Rela
*irela_head
, *irela
;
15768 Elf_Internal_Shdr
*rel_hdr
;
15770 unsigned int count
;
15772 eado
= get_arm_elf_section_data (o
);
15774 if (!eado
|| eado
->elf
.this_hdr
.sh_type
!= SHT_ARM_EXIDX
)
15778 bed
= get_elf_backend_data (abfd
);
15779 rel_hdr
= reldata
->hdr
;
15781 if (rel_hdr
->sh_entsize
== bed
->s
->sizeof_rel
)
15783 swap_in
= bed
->s
->swap_reloc_in
;
15784 swap_out
= bed
->s
->swap_reloc_out
;
15786 else if (rel_hdr
->sh_entsize
== bed
->s
->sizeof_rela
)
15788 swap_in
= bed
->s
->swap_reloca_in
;
15789 swap_out
= bed
->s
->swap_reloca_out
;
15794 erela_head
= rel_hdr
->contents
;
15795 irela_head
= (Elf_Internal_Rela
*) bfd_zmalloc
15796 ((NUM_SHDR_ENTRIES (rel_hdr
) + 1) * sizeof (*irela_head
));
15798 erela
= erela_head
;
15799 irela
= irela_head
;
15802 for (p
= o
->map_head
.link_order
; p
; p
= p
->next
)
15804 if (p
->type
== bfd_section_reloc_link_order
15805 || p
->type
== bfd_symbol_reloc_link_order
)
15807 (*swap_in
) (abfd
, erela
, irela
);
15808 erela
+= rel_hdr
->sh_entsize
;
15812 else if (p
->type
== bfd_indirect_link_order
)
15814 struct bfd_elf_section_reloc_data
*input_reldata
;
15815 arm_unwind_table_edit
*edit_list
, *edit_tail
;
15816 _arm_elf_section_data
*eadi
;
15821 i
= p
->u
.indirect
.section
;
15823 eadi
= get_arm_elf_section_data (i
);
15824 edit_list
= eadi
->u
.exidx
.unwind_edit_list
;
15825 edit_tail
= eadi
->u
.exidx
.unwind_edit_tail
;
15826 offset
= i
->output_offset
;
15828 if (eadi
->elf
.rel
.hdr
&&
15829 eadi
->elf
.rel
.hdr
->sh_entsize
== rel_hdr
->sh_entsize
)
15830 input_reldata
= &eadi
->elf
.rel
;
15831 else if (eadi
->elf
.rela
.hdr
&&
15832 eadi
->elf
.rela
.hdr
->sh_entsize
== rel_hdr
->sh_entsize
)
15833 input_reldata
= &eadi
->elf
.rela
;
15839 for (j
= 0; j
< NUM_SHDR_ENTRIES (input_reldata
->hdr
); j
++)
15841 arm_unwind_table_edit
*edit_node
, *edit_next
;
15843 bfd_vma reloc_index
;
15845 (*swap_in
) (abfd
, erela
, irela
);
15846 reloc_index
= (irela
->r_offset
- offset
) / 8;
15849 edit_node
= edit_list
;
15850 for (edit_next
= edit_list
;
15851 edit_next
&& edit_next
->index
<= reloc_index
;
15852 edit_next
= edit_node
->next
)
15855 edit_node
= edit_next
;
15858 if (edit_node
->type
!= DELETE_EXIDX_ENTRY
15859 || edit_node
->index
!= reloc_index
)
15861 irela
->r_offset
-= bias
* 8;
15866 erela
+= rel_hdr
->sh_entsize
;
15869 if (edit_tail
->type
== INSERT_EXIDX_CANTUNWIND_AT_END
)
15871 /* New relocation entity. */
15872 asection
*text_sec
= edit_tail
->linked_section
;
15873 asection
*text_out
= text_sec
->output_section
;
15874 bfd_vma exidx_offset
= offset
+ i
->size
- 8;
15876 irela
->r_addend
= 0;
15877 irela
->r_offset
= exidx_offset
;
15878 irela
->r_info
= ELF32_R_INFO
15879 (text_out
->target_index
, R_ARM_PREL31
);
15886 for (j
= 0; j
< NUM_SHDR_ENTRIES (input_reldata
->hdr
); j
++)
15888 (*swap_in
) (abfd
, erela
, irela
);
15889 erela
+= rel_hdr
->sh_entsize
;
15893 count
+= NUM_SHDR_ENTRIES (input_reldata
->hdr
);
15898 reldata
->count
= count
;
15899 rel_hdr
->sh_size
= count
* rel_hdr
->sh_entsize
;
15901 erela
= erela_head
;
15902 irela
= irela_head
;
15905 (*swap_out
) (abfd
, irela
, erela
);
15906 erela
+= rel_hdr
->sh_entsize
;
15913 /* Hashes are no longer valid. */
15914 free (reldata
->hashes
);
15915 reldata
->hashes
= NULL
;
15918 /* Unwinding tables are not referenced directly. This pass marks them as
15919 required if the corresponding code section is marked. Similarly, ARMv8-M
15920 secure entry functions can only be referenced by SG veneers which are
15921 created after the GC process. They need to be marked in case they reside in
15922 their own section (as would be the case if code was compiled with
15923 -ffunction-sections). */
15926 elf32_arm_gc_mark_extra_sections (struct bfd_link_info
*info
,
15927 elf_gc_mark_hook_fn gc_mark_hook
)
15930 Elf_Internal_Shdr
**elf_shdrp
;
15931 asection
*cmse_sec
;
15932 obj_attribute
*out_attr
;
15933 Elf_Internal_Shdr
*symtab_hdr
;
15934 unsigned i
, sym_count
, ext_start
;
15935 const struct elf_backend_data
*bed
;
15936 struct elf_link_hash_entry
**sym_hashes
;
15937 struct elf32_arm_link_hash_entry
*cmse_hash
;
15938 bfd_boolean again
, is_v8m
, first_bfd_browse
= TRUE
;
15939 bfd_boolean debug_sec_need_to_be_marked
= FALSE
;
15942 _bfd_elf_gc_mark_extra_sections (info
, gc_mark_hook
);
15944 out_attr
= elf_known_obj_attributes_proc (info
->output_bfd
);
15945 is_v8m
= out_attr
[Tag_CPU_arch
].i
>= TAG_CPU_ARCH_V8M_BASE
15946 && out_attr
[Tag_CPU_arch_profile
].i
== 'M';
15948 /* Marking EH data may cause additional code sections to be marked,
15949 requiring multiple passes. */
15954 for (sub
= info
->input_bfds
; sub
!= NULL
; sub
= sub
->link
.next
)
15958 if (! is_arm_elf (sub
))
15961 elf_shdrp
= elf_elfsections (sub
);
15962 for (o
= sub
->sections
; o
!= NULL
; o
= o
->next
)
15964 Elf_Internal_Shdr
*hdr
;
15966 hdr
= &elf_section_data (o
)->this_hdr
;
15967 if (hdr
->sh_type
== SHT_ARM_EXIDX
15969 && hdr
->sh_link
< elf_numsections (sub
)
15971 && elf_shdrp
[hdr
->sh_link
]->bfd_section
->gc_mark
)
15974 if (!_bfd_elf_gc_mark (info
, o
, gc_mark_hook
))
15979 /* Mark section holding ARMv8-M secure entry functions. We mark all
15980 of them so no need for a second browsing. */
15981 if (is_v8m
&& first_bfd_browse
)
15983 sym_hashes
= elf_sym_hashes (sub
);
15984 bed
= get_elf_backend_data (sub
);
15985 symtab_hdr
= &elf_tdata (sub
)->symtab_hdr
;
15986 sym_count
= symtab_hdr
->sh_size
/ bed
->s
->sizeof_sym
;
15987 ext_start
= symtab_hdr
->sh_info
;
15989 /* Scan symbols. */
15990 for (i
= ext_start
; i
< sym_count
; i
++)
15992 cmse_hash
= elf32_arm_hash_entry (sym_hashes
[i
- ext_start
]);
15994 /* Assume it is a special symbol. If not, cmse_scan will
15995 warn about it and user can do something about it. */
15996 if (CONST_STRNEQ (cmse_hash
->root
.root
.root
.string
,
15999 cmse_sec
= cmse_hash
->root
.root
.u
.def
.section
;
16000 if (!cmse_sec
->gc_mark
16001 && !_bfd_elf_gc_mark (info
, cmse_sec
, gc_mark_hook
))
16003 /* The debug sections related to these secure entry
16004 functions are marked on enabling below flag. */
16005 debug_sec_need_to_be_marked
= TRUE
;
16009 if (debug_sec_need_to_be_marked
)
16011 /* Looping over all the sections of the object file containing
16012 Armv8-M secure entry functions and marking all the debug
16014 for (isec
= sub
->sections
; isec
!= NULL
; isec
= isec
->next
)
16016 /* If not a debug sections, skip it. */
16017 if (!isec
->gc_mark
&& (isec
->flags
& SEC_DEBUGGING
))
16018 isec
->gc_mark
= 1 ;
16020 debug_sec_need_to_be_marked
= FALSE
;
16024 first_bfd_browse
= FALSE
;
16030 /* Treat mapping symbols as special target symbols. */
16033 elf32_arm_is_target_special_symbol (bfd
* abfd ATTRIBUTE_UNUSED
, asymbol
* sym
)
16035 return bfd_is_arm_special_symbol_name (sym
->name
,
16036 BFD_ARM_SPECIAL_SYM_TYPE_ANY
);
16039 /* If the ELF symbol SYM might be a function in SEC, return the
16040 function size and set *CODE_OFF to the function's entry point,
16041 otherwise return zero. */
16043 static bfd_size_type
16044 elf32_arm_maybe_function_sym (const asymbol
*sym
, asection
*sec
,
16047 bfd_size_type size
;
16049 if ((sym
->flags
& (BSF_SECTION_SYM
| BSF_FILE
| BSF_OBJECT
16050 | BSF_THREAD_LOCAL
| BSF_RELC
| BSF_SRELC
)) != 0
16051 || sym
->section
!= sec
)
16054 if (!(sym
->flags
& BSF_SYNTHETIC
))
16055 switch (ELF_ST_TYPE (((elf_symbol_type
*) sym
)->internal_elf_sym
.st_info
))
16058 case STT_ARM_TFUNC
:
16065 if ((sym
->flags
& BSF_LOCAL
)
16066 && bfd_is_arm_special_symbol_name (sym
->name
,
16067 BFD_ARM_SPECIAL_SYM_TYPE_ANY
))
16070 *code_off
= sym
->value
;
16072 if (!(sym
->flags
& BSF_SYNTHETIC
))
16073 size
= ((elf_symbol_type
*) sym
)->internal_elf_sym
.st_size
;
16080 elf32_arm_find_inliner_info (bfd
* abfd
,
16081 const char ** filename_ptr
,
16082 const char ** functionname_ptr
,
16083 unsigned int * line_ptr
)
16086 found
= _bfd_dwarf2_find_inliner_info (abfd
, filename_ptr
,
16087 functionname_ptr
, line_ptr
,
16088 & elf_tdata (abfd
)->dwarf2_find_line_info
);
16092 /* Find dynamic relocs for H that apply to read-only sections. */
16095 readonly_dynrelocs (struct elf_link_hash_entry
*h
)
16097 struct elf_dyn_relocs
*p
;
16099 for (p
= h
->dyn_relocs
; p
!= NULL
; p
= p
->next
)
16101 asection
*s
= p
->sec
->output_section
;
16103 if (s
!= NULL
&& (s
->flags
& SEC_READONLY
) != 0)
16109 /* Adjust a symbol defined by a dynamic object and referenced by a
16110 regular object. The current definition is in some section of the
16111 dynamic object, but we're not including those sections. We have to
16112 change the definition to something the rest of the link can
16116 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info
* info
,
16117 struct elf_link_hash_entry
* h
)
16120 asection
*s
, *srel
;
16121 struct elf32_arm_link_hash_entry
* eh
;
16122 struct elf32_arm_link_hash_table
*globals
;
16124 globals
= elf32_arm_hash_table (info
);
16125 if (globals
== NULL
)
16128 dynobj
= elf_hash_table (info
)->dynobj
;
16130 /* Make sure we know what is going on here. */
16131 BFD_ASSERT (dynobj
!= NULL
16133 || h
->type
== STT_GNU_IFUNC
16137 && !h
->def_regular
)));
16139 eh
= (struct elf32_arm_link_hash_entry
*) h
;
16141 /* If this is a function, put it in the procedure linkage table. We
16142 will fill in the contents of the procedure linkage table later,
16143 when we know the address of the .got section. */
16144 if (h
->type
== STT_FUNC
|| h
->type
== STT_GNU_IFUNC
|| h
->needs_plt
)
16146 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
16147 symbol binds locally. */
16148 if (h
->plt
.refcount
<= 0
16149 || (h
->type
!= STT_GNU_IFUNC
16150 && (SYMBOL_CALLS_LOCAL (info
, h
)
16151 || (ELF_ST_VISIBILITY (h
->other
) != STV_DEFAULT
16152 && h
->root
.type
== bfd_link_hash_undefweak
))))
16154 /* This case can occur if we saw a PLT32 reloc in an input
16155 file, but the symbol was never referred to by a dynamic
16156 object, or if all references were garbage collected. In
16157 such a case, we don't actually need to build a procedure
16158 linkage table, and we can just do a PC24 reloc instead. */
16159 h
->plt
.offset
= (bfd_vma
) -1;
16160 eh
->plt
.thumb_refcount
= 0;
16161 eh
->plt
.maybe_thumb_refcount
= 0;
16162 eh
->plt
.noncall_refcount
= 0;
16170 /* It's possible that we incorrectly decided a .plt reloc was
16171 needed for an R_ARM_PC24 or similar reloc to a non-function sym
16172 in check_relocs. We can't decide accurately between function
16173 and non-function syms in check-relocs; Objects loaded later in
16174 the link may change h->type. So fix it now. */
16175 h
->plt
.offset
= (bfd_vma
) -1;
16176 eh
->plt
.thumb_refcount
= 0;
16177 eh
->plt
.maybe_thumb_refcount
= 0;
16178 eh
->plt
.noncall_refcount
= 0;
16181 /* If this is a weak symbol, and there is a real definition, the
16182 processor independent code will have arranged for us to see the
16183 real definition first, and we can just use the same value. */
16184 if (h
->is_weakalias
)
16186 struct elf_link_hash_entry
*def
= weakdef (h
);
16187 BFD_ASSERT (def
->root
.type
== bfd_link_hash_defined
);
16188 h
->root
.u
.def
.section
= def
->root
.u
.def
.section
;
16189 h
->root
.u
.def
.value
= def
->root
.u
.def
.value
;
16193 /* If there are no non-GOT references, we do not need a copy
16195 if (!h
->non_got_ref
)
16198 /* This is a reference to a symbol defined by a dynamic object which
16199 is not a function. */
16201 /* If we are creating a shared library, we must presume that the
16202 only references to the symbol are via the global offset table.
16203 For such cases we need not do anything here; the relocations will
16204 be handled correctly by relocate_section. Relocatable executables
16205 can reference data in shared objects directly, so we don't need to
16206 do anything here. */
16207 if (bfd_link_pic (info
) || globals
->root
.is_relocatable_executable
)
16210 /* We must allocate the symbol in our .dynbss section, which will
16211 become part of the .bss section of the executable. There will be
16212 an entry for this symbol in the .dynsym section. The dynamic
16213 object will contain position independent code, so all references
16214 from the dynamic object to this symbol will go through the global
16215 offset table. The dynamic linker will use the .dynsym entry to
16216 determine the address it must put in the global offset table, so
16217 both the dynamic object and the regular object will refer to the
16218 same memory location for the variable. */
16219 /* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic
16220 linker to copy the initial value out of the dynamic object and into
16221 the runtime process image. We need to remember the offset into the
16222 .rel(a).bss section we are going to use. */
16223 if ((h
->root
.u
.def
.section
->flags
& SEC_READONLY
) != 0)
16225 s
= globals
->root
.sdynrelro
;
16226 srel
= globals
->root
.sreldynrelro
;
16230 s
= globals
->root
.sdynbss
;
16231 srel
= globals
->root
.srelbss
;
16233 if (info
->nocopyreloc
== 0
16234 && (h
->root
.u
.def
.section
->flags
& SEC_ALLOC
) != 0
16237 elf32_arm_allocate_dynrelocs (info
, srel
, 1);
16241 return _bfd_elf_adjust_dynamic_copy (info
, h
, s
);
16244 /* Allocate space in .plt, .got and associated reloc sections for
16248 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry
*h
, void * inf
)
16250 struct bfd_link_info
*info
;
16251 struct elf32_arm_link_hash_table
*htab
;
16252 struct elf32_arm_link_hash_entry
*eh
;
16253 struct elf_dyn_relocs
*p
;
16255 if (h
->root
.type
== bfd_link_hash_indirect
)
16258 eh
= (struct elf32_arm_link_hash_entry
*) h
;
16260 info
= (struct bfd_link_info
*) inf
;
16261 htab
= elf32_arm_hash_table (info
);
16265 if ((htab
->root
.dynamic_sections_created
|| h
->type
== STT_GNU_IFUNC
)
16266 && h
->plt
.refcount
> 0)
16268 /* Make sure this symbol is output as a dynamic symbol.
16269 Undefined weak syms won't yet be marked as dynamic. */
16270 if (h
->dynindx
== -1 && !h
->forced_local
16271 && h
->root
.type
== bfd_link_hash_undefweak
)
16273 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
16277 /* If the call in the PLT entry binds locally, the associated
16278 GOT entry should use an R_ARM_IRELATIVE relocation instead of
16279 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
16280 than the .plt section. */
16281 if (h
->type
== STT_GNU_IFUNC
&& SYMBOL_CALLS_LOCAL (info
, h
))
16284 if (eh
->plt
.noncall_refcount
== 0
16285 && SYMBOL_REFERENCES_LOCAL (info
, h
))
16286 /* All non-call references can be resolved directly.
16287 This means that they can (and in some cases, must)
16288 resolve directly to the run-time target, rather than
16289 to the PLT. That in turns means that any .got entry
16290 would be equal to the .igot.plt entry, so there's
16291 no point having both. */
16292 h
->got
.refcount
= 0;
16295 if (bfd_link_pic (info
)
16297 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h
))
16299 elf32_arm_allocate_plt_entry (info
, eh
->is_iplt
, &h
->plt
, &eh
->plt
);
16301 /* If this symbol is not defined in a regular file, and we are
16302 not generating a shared library, then set the symbol to this
16303 location in the .plt. This is required to make function
16304 pointers compare as equal between the normal executable and
16305 the shared library. */
16306 if (! bfd_link_pic (info
)
16307 && !h
->def_regular
)
16309 h
->root
.u
.def
.section
= htab
->root
.splt
;
16310 h
->root
.u
.def
.value
= h
->plt
.offset
;
16312 /* Make sure the function is not marked as Thumb, in case
16313 it is the target of an ABS32 relocation, which will
16314 point to the PLT entry. */
16315 ARM_SET_SYM_BRANCH_TYPE (h
->target_internal
, ST_BRANCH_TO_ARM
);
16318 /* VxWorks executables have a second set of relocations for
16319 each PLT entry. They go in a separate relocation section,
16320 which is processed by the kernel loader. */
16321 if (htab
->vxworks_p
&& !bfd_link_pic (info
))
16323 /* There is a relocation for the initial PLT entry:
16324 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
16325 if (h
->plt
.offset
== htab
->plt_header_size
)
16326 elf32_arm_allocate_dynrelocs (info
, htab
->srelplt2
, 1);
16328 /* There are two extra relocations for each subsequent
16329 PLT entry: an R_ARM_32 relocation for the GOT entry,
16330 and an R_ARM_32 relocation for the PLT entry. */
16331 elf32_arm_allocate_dynrelocs (info
, htab
->srelplt2
, 2);
16336 h
->plt
.offset
= (bfd_vma
) -1;
16342 h
->plt
.offset
= (bfd_vma
) -1;
16346 eh
= (struct elf32_arm_link_hash_entry
*) h
;
16347 eh
->tlsdesc_got
= (bfd_vma
) -1;
16349 if (h
->got
.refcount
> 0)
16353 int tls_type
= elf32_arm_hash_entry (h
)->tls_type
;
16356 /* Make sure this symbol is output as a dynamic symbol.
16357 Undefined weak syms won't yet be marked as dynamic. */
16358 if (htab
->root
.dynamic_sections_created
&& h
->dynindx
== -1 && !h
->forced_local
16359 && h
->root
.type
== bfd_link_hash_undefweak
)
16361 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
16365 if (!htab
->symbian_p
)
16367 s
= htab
->root
.sgot
;
16368 h
->got
.offset
= s
->size
;
16370 if (tls_type
== GOT_UNKNOWN
)
16373 if (tls_type
== GOT_NORMAL
)
16374 /* Non-TLS symbols need one GOT slot. */
16378 if (tls_type
& GOT_TLS_GDESC
)
16380 /* R_ARM_TLS_DESC needs 2 GOT slots. */
16382 = (htab
->root
.sgotplt
->size
16383 - elf32_arm_compute_jump_table_size (htab
));
16384 htab
->root
.sgotplt
->size
+= 8;
16385 h
->got
.offset
= (bfd_vma
) -2;
16386 /* plt.got_offset needs to know there's a TLS_DESC
16387 reloc in the middle of .got.plt. */
16388 htab
->num_tls_desc
++;
16391 if (tls_type
& GOT_TLS_GD
)
16393 /* R_ARM_TLS_GD32 and R_ARM_TLS_GD32_FDPIC need two
16394 consecutive GOT slots. If the symbol is both GD
16395 and GDESC, got.offset may have been
16397 h
->got
.offset
= s
->size
;
16401 if (tls_type
& GOT_TLS_IE
)
16402 /* R_ARM_TLS_IE32/R_ARM_TLS_IE32_FDPIC need one GOT
16407 dyn
= htab
->root
.dynamic_sections_created
;
16410 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn
,
16411 bfd_link_pic (info
),
16413 && (!bfd_link_pic (info
)
16414 || !SYMBOL_REFERENCES_LOCAL (info
, h
)))
16417 if (tls_type
!= GOT_NORMAL
16418 && (bfd_link_dll (info
) || indx
!= 0)
16419 && (ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
16420 || h
->root
.type
!= bfd_link_hash_undefweak
))
16422 if (tls_type
& GOT_TLS_IE
)
16423 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
16425 if (tls_type
& GOT_TLS_GD
)
16426 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
16428 if (tls_type
& GOT_TLS_GDESC
)
16430 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelplt
, 1);
16431 /* GDESC needs a trampoline to jump to. */
16432 htab
->tls_trampoline
= -1;
16435 /* Only GD needs it. GDESC just emits one relocation per
16437 if ((tls_type
& GOT_TLS_GD
) && indx
!= 0)
16438 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
16440 else if (((indx
!= -1) || htab
->fdpic_p
)
16441 && !SYMBOL_REFERENCES_LOCAL (info
, h
))
16443 if (htab
->root
.dynamic_sections_created
)
16444 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
16445 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
16447 else if (h
->type
== STT_GNU_IFUNC
16448 && eh
->plt
.noncall_refcount
== 0)
16449 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
16450 they all resolve dynamically instead. Reserve room for the
16451 GOT entry's R_ARM_IRELATIVE relocation. */
16452 elf32_arm_allocate_irelocs (info
, htab
->root
.srelgot
, 1);
16453 else if (bfd_link_pic (info
)
16454 && !UNDEFWEAK_NO_DYNAMIC_RELOC (info
, h
))
16455 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
16456 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
16457 else if (htab
->fdpic_p
&& tls_type
== GOT_NORMAL
)
16458 /* Reserve room for rofixup for FDPIC executable. */
16459 /* TLS relocs do not need space since they are completely
16461 htab
->srofixup
->size
+= 4;
16465 h
->got
.offset
= (bfd_vma
) -1;
16467 /* FDPIC support. */
16468 if (eh
->fdpic_cnts
.gotofffuncdesc_cnt
> 0)
16470 /* Symbol musn't be exported. */
16471 if (h
->dynindx
!= -1)
16474 /* We only allocate one function descriptor with its associated relocation. */
16475 if (eh
->fdpic_cnts
.funcdesc_offset
== -1)
16477 asection
*s
= htab
->root
.sgot
;
16479 eh
->fdpic_cnts
.funcdesc_offset
= s
->size
;
16481 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16482 if (bfd_link_pic(info
))
16483 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
16485 htab
->srofixup
->size
+= 8;
16489 if (eh
->fdpic_cnts
.gotfuncdesc_cnt
> 0)
16491 asection
*s
= htab
->root
.sgot
;
16493 if (htab
->root
.dynamic_sections_created
&& h
->dynindx
== -1
16494 && !h
->forced_local
)
16495 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
16498 if (h
->dynindx
== -1)
16500 /* We only allocate one function descriptor with its associated relocation. q */
16501 if (eh
->fdpic_cnts
.funcdesc_offset
== -1)
16504 eh
->fdpic_cnts
.funcdesc_offset
= s
->size
;
16506 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16507 if (bfd_link_pic(info
))
16508 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
16510 htab
->srofixup
->size
+= 8;
16514 /* Add one entry into the GOT and a R_ARM_FUNCDESC or
16515 R_ARM_RELATIVE/rofixup relocation on it. */
16516 eh
->fdpic_cnts
.gotfuncdesc_offset
= s
->size
;
16518 if (h
->dynindx
== -1 && !bfd_link_pic(info
))
16519 htab
->srofixup
->size
+= 4;
16521 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
16524 if (eh
->fdpic_cnts
.funcdesc_cnt
> 0)
16526 if (htab
->root
.dynamic_sections_created
&& h
->dynindx
== -1
16527 && !h
->forced_local
)
16528 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
16531 if (h
->dynindx
== -1)
16533 /* We only allocate one function descriptor with its associated relocation. */
16534 if (eh
->fdpic_cnts
.funcdesc_offset
== -1)
16536 asection
*s
= htab
->root
.sgot
;
16538 eh
->fdpic_cnts
.funcdesc_offset
= s
->size
;
16540 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16541 if (bfd_link_pic(info
))
16542 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
16544 htab
->srofixup
->size
+= 8;
16547 if (h
->dynindx
== -1 && !bfd_link_pic(info
))
16549 /* For FDPIC executable we replace R_ARM_RELATIVE with a rofixup. */
16550 htab
->srofixup
->size
+= 4 * eh
->fdpic_cnts
.funcdesc_cnt
;
16554 /* Will need one dynamic reloc per reference. will be either
16555 R_ARM_FUNCDESC or R_ARM_RELATIVE for hidden symbols. */
16556 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
,
16557 eh
->fdpic_cnts
.funcdesc_cnt
);
16561 /* Allocate stubs for exported Thumb functions on v4t. */
16562 if (!htab
->use_blx
&& h
->dynindx
!= -1
16564 && ARM_GET_SYM_BRANCH_TYPE (h
->target_internal
) == ST_BRANCH_TO_THUMB
16565 && ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
)
16567 struct elf_link_hash_entry
* th
;
16568 struct bfd_link_hash_entry
* bh
;
16569 struct elf_link_hash_entry
* myh
;
16573 /* Create a new symbol to regist the real location of the function. */
16574 s
= h
->root
.u
.def
.section
;
16575 sprintf (name
, "__real_%s", h
->root
.root
.string
);
16576 _bfd_generic_link_add_one_symbol (info
, s
->owner
,
16577 name
, BSF_GLOBAL
, s
,
16578 h
->root
.u
.def
.value
,
16579 NULL
, TRUE
, FALSE
, &bh
);
16581 myh
= (struct elf_link_hash_entry
*) bh
;
16582 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
16583 myh
->forced_local
= 1;
16584 ARM_SET_SYM_BRANCH_TYPE (myh
->target_internal
, ST_BRANCH_TO_THUMB
);
16585 eh
->export_glue
= myh
;
16586 th
= record_arm_to_thumb_glue (info
, h
);
16587 /* Point the symbol at the stub. */
16588 h
->type
= ELF_ST_INFO (ELF_ST_BIND (h
->type
), STT_FUNC
);
16589 ARM_SET_SYM_BRANCH_TYPE (h
->target_internal
, ST_BRANCH_TO_ARM
);
16590 h
->root
.u
.def
.section
= th
->root
.u
.def
.section
;
16591 h
->root
.u
.def
.value
= th
->root
.u
.def
.value
& ~1;
16594 if (h
->dyn_relocs
== NULL
)
16597 /* In the shared -Bsymbolic case, discard space allocated for
16598 dynamic pc-relative relocs against symbols which turn out to be
16599 defined in regular objects. For the normal shared case, discard
16600 space for pc-relative relocs that have become local due to symbol
16601 visibility changes. */
16603 if (bfd_link_pic (info
) || htab
->root
.is_relocatable_executable
|| htab
->fdpic_p
)
16605 /* Relocs that use pc_count are PC-relative forms, which will appear
16606 on something like ".long foo - ." or "movw REG, foo - .". We want
16607 calls to protected symbols to resolve directly to the function
16608 rather than going via the plt. If people want function pointer
16609 comparisons to work as expected then they should avoid writing
16610 assembly like ".long foo - .". */
16611 if (SYMBOL_CALLS_LOCAL (info
, h
))
16613 struct elf_dyn_relocs
**pp
;
16615 for (pp
= &h
->dyn_relocs
; (p
= *pp
) != NULL
; )
16617 p
->count
-= p
->pc_count
;
16626 if (htab
->vxworks_p
)
16628 struct elf_dyn_relocs
**pp
;
16630 for (pp
= &h
->dyn_relocs
; (p
= *pp
) != NULL
; )
16632 if (strcmp (p
->sec
->output_section
->name
, ".tls_vars") == 0)
16639 /* Also discard relocs on undefined weak syms with non-default
16641 if (h
->dyn_relocs
!= NULL
16642 && h
->root
.type
== bfd_link_hash_undefweak
)
16644 if (ELF_ST_VISIBILITY (h
->other
) != STV_DEFAULT
16645 || UNDEFWEAK_NO_DYNAMIC_RELOC (info
, h
))
16646 h
->dyn_relocs
= NULL
;
16648 /* Make sure undefined weak symbols are output as a dynamic
16650 else if (htab
->root
.dynamic_sections_created
&& h
->dynindx
== -1
16651 && !h
->forced_local
)
16653 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
16658 else if (htab
->root
.is_relocatable_executable
&& h
->dynindx
== -1
16659 && h
->root
.type
== bfd_link_hash_new
)
16661 /* Output absolute symbols so that we can create relocations
16662 against them. For normal symbols we output a relocation
16663 against the section that contains them. */
16664 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
16671 /* For the non-shared case, discard space for relocs against
16672 symbols which turn out to need copy relocs or are not
16675 if (!h
->non_got_ref
16676 && ((h
->def_dynamic
16677 && !h
->def_regular
)
16678 || (htab
->root
.dynamic_sections_created
16679 && (h
->root
.type
== bfd_link_hash_undefweak
16680 || h
->root
.type
== bfd_link_hash_undefined
))))
16682 /* Make sure this symbol is output as a dynamic symbol.
16683 Undefined weak syms won't yet be marked as dynamic. */
16684 if (h
->dynindx
== -1 && !h
->forced_local
16685 && h
->root
.type
== bfd_link_hash_undefweak
)
16687 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
16691 /* If that succeeded, we know we'll be keeping all the
16693 if (h
->dynindx
!= -1)
16697 h
->dyn_relocs
= NULL
;
16702 /* Finally, allocate space. */
16703 for (p
= h
->dyn_relocs
; p
!= NULL
; p
= p
->next
)
16705 asection
*sreloc
= elf_section_data (p
->sec
)->sreloc
;
16707 if (h
->type
== STT_GNU_IFUNC
16708 && eh
->plt
.noncall_refcount
== 0
16709 && SYMBOL_REFERENCES_LOCAL (info
, h
))
16710 elf32_arm_allocate_irelocs (info
, sreloc
, p
->count
);
16711 else if (h
->dynindx
!= -1 && (!bfd_link_pic(info
) || !info
->symbolic
|| !h
->def_regular
))
16712 elf32_arm_allocate_dynrelocs (info
, sreloc
, p
->count
);
16713 else if (htab
->fdpic_p
&& !bfd_link_pic(info
))
16714 htab
->srofixup
->size
+= 4 * p
->count
;
16716 elf32_arm_allocate_dynrelocs (info
, sreloc
, p
->count
);
16722 /* Set DF_TEXTREL if we find any dynamic relocs that apply to
16723 read-only sections. */
16726 maybe_set_textrel (struct elf_link_hash_entry
*h
, void *info_p
)
16730 if (h
->root
.type
== bfd_link_hash_indirect
)
16733 sec
= readonly_dynrelocs (h
);
16736 struct bfd_link_info
*info
= (struct bfd_link_info
*) info_p
;
16738 info
->flags
|= DF_TEXTREL
;
16739 info
->callbacks
->minfo
16740 (_("%pB: dynamic relocation against `%pT' in read-only section `%pA'\n"),
16741 sec
->owner
, h
->root
.root
.string
, sec
);
16743 /* Not an error, just cut short the traversal. */
16751 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info
*info
,
16754 struct elf32_arm_link_hash_table
*globals
;
16756 globals
= elf32_arm_hash_table (info
);
16757 if (globals
== NULL
)
16760 globals
->byteswap_code
= byteswap_code
;
16763 /* Set the sizes of the dynamic sections. */
16766 elf32_arm_size_dynamic_sections (bfd
* output_bfd ATTRIBUTE_UNUSED
,
16767 struct bfd_link_info
* info
)
16772 bfd_boolean relocs
;
16774 struct elf32_arm_link_hash_table
*htab
;
16776 htab
= elf32_arm_hash_table (info
);
16780 dynobj
= elf_hash_table (info
)->dynobj
;
16781 BFD_ASSERT (dynobj
!= NULL
);
16782 check_use_blx (htab
);
16784 if (elf_hash_table (info
)->dynamic_sections_created
)
16786 /* Set the contents of the .interp section to the interpreter. */
16787 if (bfd_link_executable (info
) && !info
->nointerp
)
16789 s
= bfd_get_linker_section (dynobj
, ".interp");
16790 BFD_ASSERT (s
!= NULL
);
16791 s
->size
= sizeof ELF_DYNAMIC_INTERPRETER
;
16792 s
->contents
= (unsigned char *) ELF_DYNAMIC_INTERPRETER
;
16796 /* Set up .got offsets for local syms, and space for local dynamic
16798 for (ibfd
= info
->input_bfds
; ibfd
!= NULL
; ibfd
= ibfd
->link
.next
)
16800 bfd_signed_vma
*local_got
;
16801 bfd_signed_vma
*end_local_got
;
16802 struct arm_local_iplt_info
**local_iplt_ptr
, *local_iplt
;
16803 char *local_tls_type
;
16804 bfd_vma
*local_tlsdesc_gotent
;
16805 bfd_size_type locsymcount
;
16806 Elf_Internal_Shdr
*symtab_hdr
;
16808 bfd_boolean is_vxworks
= htab
->vxworks_p
;
16809 unsigned int symndx
;
16810 struct fdpic_local
*local_fdpic_cnts
;
16812 if (! is_arm_elf (ibfd
))
16815 for (s
= ibfd
->sections
; s
!= NULL
; s
= s
->next
)
16817 struct elf_dyn_relocs
*p
;
16819 for (p
= (struct elf_dyn_relocs
*)
16820 elf_section_data (s
)->local_dynrel
; p
!= NULL
; p
= p
->next
)
16822 if (!bfd_is_abs_section (p
->sec
)
16823 && bfd_is_abs_section (p
->sec
->output_section
))
16825 /* Input section has been discarded, either because
16826 it is a copy of a linkonce section or due to
16827 linker script /DISCARD/, so we'll be discarding
16830 else if (is_vxworks
16831 && strcmp (p
->sec
->output_section
->name
,
16834 /* Relocations in vxworks .tls_vars sections are
16835 handled specially by the loader. */
16837 else if (p
->count
!= 0)
16839 srel
= elf_section_data (p
->sec
)->sreloc
;
16840 if (htab
->fdpic_p
&& !bfd_link_pic(info
))
16841 htab
->srofixup
->size
+= 4 * p
->count
;
16843 elf32_arm_allocate_dynrelocs (info
, srel
, p
->count
);
16844 if ((p
->sec
->output_section
->flags
& SEC_READONLY
) != 0)
16845 info
->flags
|= DF_TEXTREL
;
16850 local_got
= elf_local_got_refcounts (ibfd
);
16854 symtab_hdr
= & elf_symtab_hdr (ibfd
);
16855 locsymcount
= symtab_hdr
->sh_info
;
16856 end_local_got
= local_got
+ locsymcount
;
16857 local_iplt_ptr
= elf32_arm_local_iplt (ibfd
);
16858 local_tls_type
= elf32_arm_local_got_tls_type (ibfd
);
16859 local_tlsdesc_gotent
= elf32_arm_local_tlsdesc_gotent (ibfd
);
16860 local_fdpic_cnts
= elf32_arm_local_fdpic_cnts (ibfd
);
16862 s
= htab
->root
.sgot
;
16863 srel
= htab
->root
.srelgot
;
16864 for (; local_got
< end_local_got
;
16865 ++local_got
, ++local_iplt_ptr
, ++local_tls_type
,
16866 ++local_tlsdesc_gotent
, ++symndx
, ++local_fdpic_cnts
)
16868 *local_tlsdesc_gotent
= (bfd_vma
) -1;
16869 local_iplt
= *local_iplt_ptr
;
16871 /* FDPIC support. */
16872 if (local_fdpic_cnts
->gotofffuncdesc_cnt
> 0)
16874 if (local_fdpic_cnts
->funcdesc_offset
== -1)
16876 local_fdpic_cnts
->funcdesc_offset
= s
->size
;
16879 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16880 if (bfd_link_pic(info
))
16881 elf32_arm_allocate_dynrelocs (info
, srel
, 1);
16883 htab
->srofixup
->size
+= 8;
16887 if (local_fdpic_cnts
->funcdesc_cnt
> 0)
16889 if (local_fdpic_cnts
->funcdesc_offset
== -1)
16891 local_fdpic_cnts
->funcdesc_offset
= s
->size
;
16894 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16895 if (bfd_link_pic(info
))
16896 elf32_arm_allocate_dynrelocs (info
, srel
, 1);
16898 htab
->srofixup
->size
+= 8;
16901 /* We will add n R_ARM_RELATIVE relocations or n rofixups. */
16902 if (bfd_link_pic(info
))
16903 elf32_arm_allocate_dynrelocs (info
, srel
, local_fdpic_cnts
->funcdesc_cnt
);
16905 htab
->srofixup
->size
+= 4 * local_fdpic_cnts
->funcdesc_cnt
;
16908 if (local_iplt
!= NULL
)
16910 struct elf_dyn_relocs
*p
;
16912 if (local_iplt
->root
.refcount
> 0)
16914 elf32_arm_allocate_plt_entry (info
, TRUE
,
16917 if (local_iplt
->arm
.noncall_refcount
== 0)
16918 /* All references to the PLT are calls, so all
16919 non-call references can resolve directly to the
16920 run-time target. This means that the .got entry
16921 would be the same as the .igot.plt entry, so there's
16922 no point creating both. */
16927 BFD_ASSERT (local_iplt
->arm
.noncall_refcount
== 0);
16928 local_iplt
->root
.offset
= (bfd_vma
) -1;
16931 for (p
= local_iplt
->dyn_relocs
; p
!= NULL
; p
= p
->next
)
16935 psrel
= elf_section_data (p
->sec
)->sreloc
;
16936 if (local_iplt
->arm
.noncall_refcount
== 0)
16937 elf32_arm_allocate_irelocs (info
, psrel
, p
->count
);
16939 elf32_arm_allocate_dynrelocs (info
, psrel
, p
->count
);
16942 if (*local_got
> 0)
16944 Elf_Internal_Sym
*isym
;
16946 *local_got
= s
->size
;
16947 if (*local_tls_type
& GOT_TLS_GD
)
16948 /* TLS_GD relocs need an 8-byte structure in the GOT. */
16950 if (*local_tls_type
& GOT_TLS_GDESC
)
16952 *local_tlsdesc_gotent
= htab
->root
.sgotplt
->size
16953 - elf32_arm_compute_jump_table_size (htab
);
16954 htab
->root
.sgotplt
->size
+= 8;
16955 *local_got
= (bfd_vma
) -2;
16956 /* plt.got_offset needs to know there's a TLS_DESC
16957 reloc in the middle of .got.plt. */
16958 htab
->num_tls_desc
++;
16960 if (*local_tls_type
& GOT_TLS_IE
)
16963 if (*local_tls_type
& GOT_NORMAL
)
16965 /* If the symbol is both GD and GDESC, *local_got
16966 may have been overwritten. */
16967 *local_got
= s
->size
;
16971 isym
= bfd_sym_from_r_symndx (&htab
->sym_cache
, ibfd
, symndx
);
16975 /* If all references to an STT_GNU_IFUNC PLT are calls,
16976 then all non-call references, including this GOT entry,
16977 resolve directly to the run-time target. */
16978 if (ELF32_ST_TYPE (isym
->st_info
) == STT_GNU_IFUNC
16979 && (local_iplt
== NULL
16980 || local_iplt
->arm
.noncall_refcount
== 0))
16981 elf32_arm_allocate_irelocs (info
, srel
, 1);
16982 else if (bfd_link_pic (info
) || output_bfd
->flags
& DYNAMIC
|| htab
->fdpic_p
)
16984 if ((bfd_link_pic (info
) && !(*local_tls_type
& GOT_TLS_GDESC
)))
16985 elf32_arm_allocate_dynrelocs (info
, srel
, 1);
16986 else if (htab
->fdpic_p
&& *local_tls_type
& GOT_NORMAL
)
16987 htab
->srofixup
->size
+= 4;
16989 if ((bfd_link_pic (info
) || htab
->fdpic_p
)
16990 && *local_tls_type
& GOT_TLS_GDESC
)
16992 elf32_arm_allocate_dynrelocs (info
,
16993 htab
->root
.srelplt
, 1);
16994 htab
->tls_trampoline
= -1;
16999 *local_got
= (bfd_vma
) -1;
17003 if (htab
->tls_ldm_got
.refcount
> 0)
17005 /* Allocate two GOT entries and one dynamic relocation (if necessary)
17006 for R_ARM_TLS_LDM32/R_ARM_TLS_LDM32_FDPIC relocations. */
17007 htab
->tls_ldm_got
.offset
= htab
->root
.sgot
->size
;
17008 htab
->root
.sgot
->size
+= 8;
17009 if (bfd_link_pic (info
))
17010 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
17013 htab
->tls_ldm_got
.offset
= -1;
17015 /* At the very end of the .rofixup section is a pointer to the GOT,
17016 reserve space for it. */
17017 if (htab
->fdpic_p
&& htab
->srofixup
!= NULL
)
17018 htab
->srofixup
->size
+= 4;
17020 /* Allocate global sym .plt and .got entries, and space for global
17021 sym dynamic relocs. */
17022 elf_link_hash_traverse (& htab
->root
, allocate_dynrelocs_for_symbol
, info
);
17024 /* Here we rummage through the found bfds to collect glue information. */
17025 for (ibfd
= info
->input_bfds
; ibfd
!= NULL
; ibfd
= ibfd
->link
.next
)
17027 if (! is_arm_elf (ibfd
))
17030 /* Initialise mapping tables for code/data. */
17031 bfd_elf32_arm_init_maps (ibfd
);
17033 if (!bfd_elf32_arm_process_before_allocation (ibfd
, info
)
17034 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd
, info
)
17035 || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd
, info
))
17036 _bfd_error_handler (_("errors encountered processing file %pB"), ibfd
);
17039 /* Allocate space for the glue sections now that we've sized them. */
17040 bfd_elf32_arm_allocate_interworking_sections (info
);
17042 /* For every jump slot reserved in the sgotplt, reloc_count is
17043 incremented. However, when we reserve space for TLS descriptors,
17044 it's not incremented, so in order to compute the space reserved
17045 for them, it suffices to multiply the reloc count by the jump
17047 if (htab
->root
.srelplt
)
17048 htab
->sgotplt_jump_table_size
= elf32_arm_compute_jump_table_size(htab
);
17050 if (htab
->tls_trampoline
)
17052 if (htab
->root
.splt
->size
== 0)
17053 htab
->root
.splt
->size
+= htab
->plt_header_size
;
17055 htab
->tls_trampoline
= htab
->root
.splt
->size
;
17056 htab
->root
.splt
->size
+= htab
->plt_entry_size
;
17058 /* If we're not using lazy TLS relocations, don't generate the
17059 PLT and GOT entries they require. */
17060 if (!(info
->flags
& DF_BIND_NOW
))
17062 htab
->dt_tlsdesc_got
= htab
->root
.sgot
->size
;
17063 htab
->root
.sgot
->size
+= 4;
17065 htab
->dt_tlsdesc_plt
= htab
->root
.splt
->size
;
17066 htab
->root
.splt
->size
+= 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline
);
17070 /* The check_relocs and adjust_dynamic_symbol entry points have
17071 determined the sizes of the various dynamic sections. Allocate
17072 memory for them. */
17075 for (s
= dynobj
->sections
; s
!= NULL
; s
= s
->next
)
17079 if ((s
->flags
& SEC_LINKER_CREATED
) == 0)
17082 /* It's OK to base decisions on the section name, because none
17083 of the dynobj section names depend upon the input files. */
17084 name
= bfd_section_name (s
);
17086 if (s
== htab
->root
.splt
)
17088 /* Remember whether there is a PLT. */
17089 plt
= s
->size
!= 0;
17091 else if (CONST_STRNEQ (name
, ".rel"))
17095 /* Remember whether there are any reloc sections other
17096 than .rel(a).plt and .rela.plt.unloaded. */
17097 if (s
!= htab
->root
.srelplt
&& s
!= htab
->srelplt2
)
17100 /* We use the reloc_count field as a counter if we need
17101 to copy relocs into the output file. */
17102 s
->reloc_count
= 0;
17105 else if (s
!= htab
->root
.sgot
17106 && s
!= htab
->root
.sgotplt
17107 && s
!= htab
->root
.iplt
17108 && s
!= htab
->root
.igotplt
17109 && s
!= htab
->root
.sdynbss
17110 && s
!= htab
->root
.sdynrelro
17111 && s
!= htab
->srofixup
)
17113 /* It's not one of our sections, so don't allocate space. */
17119 /* If we don't need this section, strip it from the
17120 output file. This is mostly to handle .rel(a).bss and
17121 .rel(a).plt. We must create both sections in
17122 create_dynamic_sections, because they must be created
17123 before the linker maps input sections to output
17124 sections. The linker does that before
17125 adjust_dynamic_symbol is called, and it is that
17126 function which decides whether anything needs to go
17127 into these sections. */
17128 s
->flags
|= SEC_EXCLUDE
;
17132 if ((s
->flags
& SEC_HAS_CONTENTS
) == 0)
17135 /* Allocate memory for the section contents. */
17136 s
->contents
= (unsigned char *) bfd_zalloc (dynobj
, s
->size
);
17137 if (s
->contents
== NULL
)
17141 if (elf_hash_table (info
)->dynamic_sections_created
)
17143 /* Add some entries to the .dynamic section. We fill in the
17144 values later, in elf32_arm_finish_dynamic_sections, but we
17145 must add the entries now so that we get the correct size for
17146 the .dynamic section. The DT_DEBUG entry is filled in by the
17147 dynamic linker and used by the debugger. */
17148 #define add_dynamic_entry(TAG, VAL) \
17149 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
17151 if (bfd_link_executable (info
))
17153 if (!add_dynamic_entry (DT_DEBUG
, 0))
17159 if ( !add_dynamic_entry (DT_PLTGOT
, 0)
17160 || !add_dynamic_entry (DT_PLTRELSZ
, 0)
17161 || !add_dynamic_entry (DT_PLTREL
,
17162 htab
->use_rel
? DT_REL
: DT_RELA
)
17163 || !add_dynamic_entry (DT_JMPREL
, 0))
17166 if (htab
->dt_tlsdesc_plt
17167 && (!add_dynamic_entry (DT_TLSDESC_PLT
,0)
17168 || !add_dynamic_entry (DT_TLSDESC_GOT
,0)))
17176 if (!add_dynamic_entry (DT_REL
, 0)
17177 || !add_dynamic_entry (DT_RELSZ
, 0)
17178 || !add_dynamic_entry (DT_RELENT
, RELOC_SIZE (htab
)))
17183 if (!add_dynamic_entry (DT_RELA
, 0)
17184 || !add_dynamic_entry (DT_RELASZ
, 0)
17185 || !add_dynamic_entry (DT_RELAENT
, RELOC_SIZE (htab
)))
17190 /* If any dynamic relocs apply to a read-only section,
17191 then we need a DT_TEXTREL entry. */
17192 if ((info
->flags
& DF_TEXTREL
) == 0)
17193 elf_link_hash_traverse (&htab
->root
, maybe_set_textrel
, info
);
17195 if ((info
->flags
& DF_TEXTREL
) != 0)
17197 if (!add_dynamic_entry (DT_TEXTREL
, 0))
17200 if (htab
->vxworks_p
17201 && !elf_vxworks_add_dynamic_entries (output_bfd
, info
))
17204 #undef add_dynamic_entry
17209 /* Size sections even though they're not dynamic. We use it to setup
17210 _TLS_MODULE_BASE_, if needed. */
17213 elf32_arm_always_size_sections (bfd
*output_bfd
,
17214 struct bfd_link_info
*info
)
17217 struct elf32_arm_link_hash_table
*htab
;
17219 htab
= elf32_arm_hash_table (info
);
17221 if (bfd_link_relocatable (info
))
17224 tls_sec
= elf_hash_table (info
)->tls_sec
;
17228 struct elf_link_hash_entry
*tlsbase
;
17230 tlsbase
= elf_link_hash_lookup
17231 (elf_hash_table (info
), "_TLS_MODULE_BASE_", TRUE
, TRUE
, FALSE
);
17235 struct bfd_link_hash_entry
*bh
= NULL
;
17236 const struct elf_backend_data
*bed
17237 = get_elf_backend_data (output_bfd
);
17239 if (!(_bfd_generic_link_add_one_symbol
17240 (info
, output_bfd
, "_TLS_MODULE_BASE_", BSF_LOCAL
,
17241 tls_sec
, 0, NULL
, FALSE
,
17242 bed
->collect
, &bh
)))
17245 tlsbase
->type
= STT_TLS
;
17246 tlsbase
= (struct elf_link_hash_entry
*)bh
;
17247 tlsbase
->def_regular
= 1;
17248 tlsbase
->other
= STV_HIDDEN
;
17249 (*bed
->elf_backend_hide_symbol
) (info
, tlsbase
, TRUE
);
17253 if (htab
->fdpic_p
&& !bfd_link_relocatable (info
)
17254 && !bfd_elf_stack_segment_size (output_bfd
, info
,
17255 "__stacksize", DEFAULT_STACK_SIZE
))
17261 /* Finish up dynamic symbol handling. We set the contents of various
17262 dynamic sections here. */
17265 elf32_arm_finish_dynamic_symbol (bfd
* output_bfd
,
17266 struct bfd_link_info
* info
,
17267 struct elf_link_hash_entry
* h
,
17268 Elf_Internal_Sym
* sym
)
17270 struct elf32_arm_link_hash_table
*htab
;
17271 struct elf32_arm_link_hash_entry
*eh
;
17273 htab
= elf32_arm_hash_table (info
);
17277 eh
= (struct elf32_arm_link_hash_entry
*) h
;
17279 if (h
->plt
.offset
!= (bfd_vma
) -1)
17283 BFD_ASSERT (h
->dynindx
!= -1);
17284 if (! elf32_arm_populate_plt_entry (output_bfd
, info
, &h
->plt
, &eh
->plt
,
17289 if (!h
->def_regular
)
17291 /* Mark the symbol as undefined, rather than as defined in
17292 the .plt section. */
17293 sym
->st_shndx
= SHN_UNDEF
;
17294 /* If the symbol is weak we need to clear the value.
17295 Otherwise, the PLT entry would provide a definition for
17296 the symbol even if the symbol wasn't defined anywhere,
17297 and so the symbol would never be NULL. Leave the value if
17298 there were any relocations where pointer equality matters
17299 (this is a clue for the dynamic linker, to make function
17300 pointer comparisons work between an application and shared
17302 if (!h
->ref_regular_nonweak
|| !h
->pointer_equality_needed
)
17305 else if (eh
->is_iplt
&& eh
->plt
.noncall_refcount
!= 0)
17307 /* At least one non-call relocation references this .iplt entry,
17308 so the .iplt entry is the function's canonical address. */
17309 sym
->st_info
= ELF_ST_INFO (ELF_ST_BIND (sym
->st_info
), STT_FUNC
);
17310 ARM_SET_SYM_BRANCH_TYPE (sym
->st_target_internal
, ST_BRANCH_TO_ARM
);
17311 sym
->st_shndx
= (_bfd_elf_section_from_bfd_section
17312 (output_bfd
, htab
->root
.iplt
->output_section
));
17313 sym
->st_value
= (h
->plt
.offset
17314 + htab
->root
.iplt
->output_section
->vma
17315 + htab
->root
.iplt
->output_offset
);
17322 Elf_Internal_Rela rel
;
17324 /* This symbol needs a copy reloc. Set it up. */
17325 BFD_ASSERT (h
->dynindx
!= -1
17326 && (h
->root
.type
== bfd_link_hash_defined
17327 || h
->root
.type
== bfd_link_hash_defweak
));
17330 rel
.r_offset
= (h
->root
.u
.def
.value
17331 + h
->root
.u
.def
.section
->output_section
->vma
17332 + h
->root
.u
.def
.section
->output_offset
);
17333 rel
.r_info
= ELF32_R_INFO (h
->dynindx
, R_ARM_COPY
);
17334 if (h
->root
.u
.def
.section
== htab
->root
.sdynrelro
)
17335 s
= htab
->root
.sreldynrelro
;
17337 s
= htab
->root
.srelbss
;
17338 elf32_arm_add_dynreloc (output_bfd
, info
, s
, &rel
);
17341 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
17342 and for FDPIC, the _GLOBAL_OFFSET_TABLE_ symbol is not absolute:
17343 it is relative to the ".got" section. */
17344 if (h
== htab
->root
.hdynamic
17345 || (!htab
->fdpic_p
&& !htab
->vxworks_p
&& h
== htab
->root
.hgot
))
17346 sym
->st_shndx
= SHN_ABS
;
17352 arm_put_trampoline (struct elf32_arm_link_hash_table
*htab
, bfd
*output_bfd
,
17354 const unsigned long *template, unsigned count
)
17358 for (ix
= 0; ix
!= count
; ix
++)
17360 unsigned long insn
= template[ix
];
17362 /* Emit mov pc,rx if bx is not permitted. */
17363 if (htab
->fix_v4bx
== 1 && (insn
& 0x0ffffff0) == 0x012fff10)
17364 insn
= (insn
& 0xf000000f) | 0x01a0f000;
17365 put_arm_insn (htab
, output_bfd
, insn
, (char *)contents
+ ix
*4);
17369 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
17370 other variants, NaCl needs this entry in a static executable's
17371 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
17372 zero. For .iplt really only the last bundle is useful, and .iplt
17373 could have a shorter first entry, with each individual PLT entry's
17374 relative branch calculated differently so it targets the last
17375 bundle instead of the instruction before it (labelled .Lplt_tail
17376 above). But it's simpler to keep the size and layout of PLT0
17377 consistent with the dynamic case, at the cost of some dead code at
17378 the start of .iplt and the one dead store to the stack at the start
17381 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table
*htab
, bfd
*output_bfd
,
17382 asection
*plt
, bfd_vma got_displacement
)
17386 put_arm_insn (htab
, output_bfd
,
17387 elf32_arm_nacl_plt0_entry
[0]
17388 | arm_movw_immediate (got_displacement
),
17389 plt
->contents
+ 0);
17390 put_arm_insn (htab
, output_bfd
,
17391 elf32_arm_nacl_plt0_entry
[1]
17392 | arm_movt_immediate (got_displacement
),
17393 plt
->contents
+ 4);
17395 for (i
= 2; i
< ARRAY_SIZE (elf32_arm_nacl_plt0_entry
); ++i
)
17396 put_arm_insn (htab
, output_bfd
,
17397 elf32_arm_nacl_plt0_entry
[i
],
17398 plt
->contents
+ (i
* 4));
17401 /* Finish up the dynamic sections. */
17404 elf32_arm_finish_dynamic_sections (bfd
* output_bfd
, struct bfd_link_info
* info
)
17409 struct elf32_arm_link_hash_table
*htab
;
17411 htab
= elf32_arm_hash_table (info
);
17415 dynobj
= elf_hash_table (info
)->dynobj
;
17417 sgot
= htab
->root
.sgotplt
;
17418 /* A broken linker script might have discarded the dynamic sections.
17419 Catch this here so that we do not seg-fault later on. */
17420 if (sgot
!= NULL
&& bfd_is_abs_section (sgot
->output_section
))
17422 sdyn
= bfd_get_linker_section (dynobj
, ".dynamic");
17424 if (elf_hash_table (info
)->dynamic_sections_created
)
17427 Elf32_External_Dyn
*dyncon
, *dynconend
;
17429 splt
= htab
->root
.splt
;
17430 BFD_ASSERT (splt
!= NULL
&& sdyn
!= NULL
);
17431 BFD_ASSERT (htab
->symbian_p
|| sgot
!= NULL
);
17433 dyncon
= (Elf32_External_Dyn
*) sdyn
->contents
;
17434 dynconend
= (Elf32_External_Dyn
*) (sdyn
->contents
+ sdyn
->size
);
17436 for (; dyncon
< dynconend
; dyncon
++)
17438 Elf_Internal_Dyn dyn
;
17442 bfd_elf32_swap_dyn_in (dynobj
, dyncon
, &dyn
);
17449 if (htab
->vxworks_p
17450 && elf_vxworks_finish_dynamic_entry (output_bfd
, &dyn
))
17451 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
17456 goto get_vma_if_bpabi
;
17459 goto get_vma_if_bpabi
;
17462 goto get_vma_if_bpabi
;
17464 name
= ".gnu.version";
17465 goto get_vma_if_bpabi
;
17467 name
= ".gnu.version_d";
17468 goto get_vma_if_bpabi
;
17470 name
= ".gnu.version_r";
17471 goto get_vma_if_bpabi
;
17474 name
= htab
->symbian_p
? ".got" : ".got.plt";
17477 name
= RELOC_SECTION (htab
, ".plt");
17479 s
= bfd_get_linker_section (dynobj
, name
);
17483 (_("could not find section %s"), name
);
17484 bfd_set_error (bfd_error_invalid_operation
);
17487 if (!htab
->symbian_p
)
17488 dyn
.d_un
.d_ptr
= s
->output_section
->vma
+ s
->output_offset
;
17490 /* In the BPABI, tags in the PT_DYNAMIC section point
17491 at the file offset, not the memory address, for the
17492 convenience of the post linker. */
17493 dyn
.d_un
.d_ptr
= s
->output_section
->filepos
+ s
->output_offset
;
17494 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
17498 if (htab
->symbian_p
)
17503 s
= htab
->root
.srelplt
;
17504 BFD_ASSERT (s
!= NULL
);
17505 dyn
.d_un
.d_val
= s
->size
;
17506 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
17513 /* In the BPABI, the DT_REL tag must point at the file
17514 offset, not the VMA, of the first relocation
17515 section. So, we use code similar to that in
17516 elflink.c, but do not check for SHF_ALLOC on the
17517 relocation section, since relocation sections are
17518 never allocated under the BPABI. PLT relocs are also
17520 if (htab
->symbian_p
)
17523 type
= ((dyn
.d_tag
== DT_REL
|| dyn
.d_tag
== DT_RELSZ
)
17524 ? SHT_REL
: SHT_RELA
);
17525 dyn
.d_un
.d_val
= 0;
17526 for (i
= 1; i
< elf_numsections (output_bfd
); i
++)
17528 Elf_Internal_Shdr
*hdr
17529 = elf_elfsections (output_bfd
)[i
];
17530 if (hdr
->sh_type
== type
)
17532 if (dyn
.d_tag
== DT_RELSZ
17533 || dyn
.d_tag
== DT_RELASZ
)
17534 dyn
.d_un
.d_val
+= hdr
->sh_size
;
17535 else if ((ufile_ptr
) hdr
->sh_offset
17536 <= dyn
.d_un
.d_val
- 1)
17537 dyn
.d_un
.d_val
= hdr
->sh_offset
;
17540 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
17544 case DT_TLSDESC_PLT
:
17545 s
= htab
->root
.splt
;
17546 dyn
.d_un
.d_ptr
= (s
->output_section
->vma
+ s
->output_offset
17547 + htab
->dt_tlsdesc_plt
);
17548 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
17551 case DT_TLSDESC_GOT
:
17552 s
= htab
->root
.sgot
;
17553 dyn
.d_un
.d_ptr
= (s
->output_section
->vma
+ s
->output_offset
17554 + htab
->dt_tlsdesc_got
);
17555 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
17558 /* Set the bottom bit of DT_INIT/FINI if the
17559 corresponding function is Thumb. */
17561 name
= info
->init_function
;
17564 name
= info
->fini_function
;
17566 /* If it wasn't set by elf_bfd_final_link
17567 then there is nothing to adjust. */
17568 if (dyn
.d_un
.d_val
!= 0)
17570 struct elf_link_hash_entry
* eh
;
17572 eh
= elf_link_hash_lookup (elf_hash_table (info
), name
,
17573 FALSE
, FALSE
, TRUE
);
17575 && ARM_GET_SYM_BRANCH_TYPE (eh
->target_internal
)
17576 == ST_BRANCH_TO_THUMB
)
17578 dyn
.d_un
.d_val
|= 1;
17579 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
17586 /* Fill in the first entry in the procedure linkage table. */
17587 if (splt
->size
> 0 && htab
->plt_header_size
)
17589 const bfd_vma
*plt0_entry
;
17590 bfd_vma got_address
, plt_address
, got_displacement
;
17592 /* Calculate the addresses of the GOT and PLT. */
17593 got_address
= sgot
->output_section
->vma
+ sgot
->output_offset
;
17594 plt_address
= splt
->output_section
->vma
+ splt
->output_offset
;
17596 if (htab
->vxworks_p
)
17598 /* The VxWorks GOT is relocated by the dynamic linker.
17599 Therefore, we must emit relocations rather than simply
17600 computing the values now. */
17601 Elf_Internal_Rela rel
;
17603 plt0_entry
= elf32_arm_vxworks_exec_plt0_entry
;
17604 put_arm_insn (htab
, output_bfd
, plt0_entry
[0],
17605 splt
->contents
+ 0);
17606 put_arm_insn (htab
, output_bfd
, plt0_entry
[1],
17607 splt
->contents
+ 4);
17608 put_arm_insn (htab
, output_bfd
, plt0_entry
[2],
17609 splt
->contents
+ 8);
17610 bfd_put_32 (output_bfd
, got_address
, splt
->contents
+ 12);
17612 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
17613 rel
.r_offset
= plt_address
+ 12;
17614 rel
.r_info
= ELF32_R_INFO (htab
->root
.hgot
->indx
, R_ARM_ABS32
);
17616 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
,
17617 htab
->srelplt2
->contents
);
17619 else if (htab
->nacl_p
)
17620 arm_nacl_put_plt0 (htab
, output_bfd
, splt
,
17621 got_address
+ 8 - (plt_address
+ 16));
17622 else if (using_thumb_only (htab
))
17624 got_displacement
= got_address
- (plt_address
+ 12);
17626 plt0_entry
= elf32_thumb2_plt0_entry
;
17627 put_arm_insn (htab
, output_bfd
, plt0_entry
[0],
17628 splt
->contents
+ 0);
17629 put_arm_insn (htab
, output_bfd
, plt0_entry
[1],
17630 splt
->contents
+ 4);
17631 put_arm_insn (htab
, output_bfd
, plt0_entry
[2],
17632 splt
->contents
+ 8);
17634 bfd_put_32 (output_bfd
, got_displacement
, splt
->contents
+ 12);
17638 got_displacement
= got_address
- (plt_address
+ 16);
17640 plt0_entry
= elf32_arm_plt0_entry
;
17641 put_arm_insn (htab
, output_bfd
, plt0_entry
[0],
17642 splt
->contents
+ 0);
17643 put_arm_insn (htab
, output_bfd
, plt0_entry
[1],
17644 splt
->contents
+ 4);
17645 put_arm_insn (htab
, output_bfd
, plt0_entry
[2],
17646 splt
->contents
+ 8);
17647 put_arm_insn (htab
, output_bfd
, plt0_entry
[3],
17648 splt
->contents
+ 12);
17650 #ifdef FOUR_WORD_PLT
17651 /* The displacement value goes in the otherwise-unused
17652 last word of the second entry. */
17653 bfd_put_32 (output_bfd
, got_displacement
, splt
->contents
+ 28);
17655 bfd_put_32 (output_bfd
, got_displacement
, splt
->contents
+ 16);
17660 /* UnixWare sets the entsize of .plt to 4, although that doesn't
17661 really seem like the right value. */
17662 if (splt
->output_section
->owner
== output_bfd
)
17663 elf_section_data (splt
->output_section
)->this_hdr
.sh_entsize
= 4;
17665 if (htab
->dt_tlsdesc_plt
)
17667 bfd_vma got_address
17668 = sgot
->output_section
->vma
+ sgot
->output_offset
;
17669 bfd_vma gotplt_address
= (htab
->root
.sgot
->output_section
->vma
17670 + htab
->root
.sgot
->output_offset
);
17671 bfd_vma plt_address
17672 = splt
->output_section
->vma
+ splt
->output_offset
;
17674 arm_put_trampoline (htab
, output_bfd
,
17675 splt
->contents
+ htab
->dt_tlsdesc_plt
,
17676 dl_tlsdesc_lazy_trampoline
, 6);
17678 bfd_put_32 (output_bfd
,
17679 gotplt_address
+ htab
->dt_tlsdesc_got
17680 - (plt_address
+ htab
->dt_tlsdesc_plt
)
17681 - dl_tlsdesc_lazy_trampoline
[6],
17682 splt
->contents
+ htab
->dt_tlsdesc_plt
+ 24);
17683 bfd_put_32 (output_bfd
,
17684 got_address
- (plt_address
+ htab
->dt_tlsdesc_plt
)
17685 - dl_tlsdesc_lazy_trampoline
[7],
17686 splt
->contents
+ htab
->dt_tlsdesc_plt
+ 24 + 4);
17689 if (htab
->tls_trampoline
)
17691 arm_put_trampoline (htab
, output_bfd
,
17692 splt
->contents
+ htab
->tls_trampoline
,
17693 tls_trampoline
, 3);
17694 #ifdef FOUR_WORD_PLT
17695 bfd_put_32 (output_bfd
, 0x00000000,
17696 splt
->contents
+ htab
->tls_trampoline
+ 12);
17700 if (htab
->vxworks_p
17701 && !bfd_link_pic (info
)
17702 && htab
->root
.splt
->size
> 0)
17704 /* Correct the .rel(a).plt.unloaded relocations. They will have
17705 incorrect symbol indexes. */
17709 num_plts
= ((htab
->root
.splt
->size
- htab
->plt_header_size
)
17710 / htab
->plt_entry_size
);
17711 p
= htab
->srelplt2
->contents
+ RELOC_SIZE (htab
);
17713 for (; num_plts
; num_plts
--)
17715 Elf_Internal_Rela rel
;
17717 SWAP_RELOC_IN (htab
) (output_bfd
, p
, &rel
);
17718 rel
.r_info
= ELF32_R_INFO (htab
->root
.hgot
->indx
, R_ARM_ABS32
);
17719 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, p
);
17720 p
+= RELOC_SIZE (htab
);
17722 SWAP_RELOC_IN (htab
) (output_bfd
, p
, &rel
);
17723 rel
.r_info
= ELF32_R_INFO (htab
->root
.hplt
->indx
, R_ARM_ABS32
);
17724 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, p
);
17725 p
+= RELOC_SIZE (htab
);
17730 if (htab
->nacl_p
&& htab
->root
.iplt
!= NULL
&& htab
->root
.iplt
->size
> 0)
17731 /* NaCl uses a special first entry in .iplt too. */
17732 arm_nacl_put_plt0 (htab
, output_bfd
, htab
->root
.iplt
, 0);
17734 /* Fill in the first three entries in the global offset table. */
17737 if (sgot
->size
> 0)
17740 bfd_put_32 (output_bfd
, (bfd_vma
) 0, sgot
->contents
);
17742 bfd_put_32 (output_bfd
,
17743 sdyn
->output_section
->vma
+ sdyn
->output_offset
,
17745 bfd_put_32 (output_bfd
, (bfd_vma
) 0, sgot
->contents
+ 4);
17746 bfd_put_32 (output_bfd
, (bfd_vma
) 0, sgot
->contents
+ 8);
17749 elf_section_data (sgot
->output_section
)->this_hdr
.sh_entsize
= 4;
17752 /* At the very end of the .rofixup section is a pointer to the GOT. */
17753 if (htab
->fdpic_p
&& htab
->srofixup
!= NULL
)
17755 struct elf_link_hash_entry
*hgot
= htab
->root
.hgot
;
17757 bfd_vma got_value
= hgot
->root
.u
.def
.value
17758 + hgot
->root
.u
.def
.section
->output_section
->vma
17759 + hgot
->root
.u
.def
.section
->output_offset
;
17761 arm_elf_add_rofixup(output_bfd
, htab
->srofixup
, got_value
);
17763 /* Make sure we allocated and generated the same number of fixups. */
17764 BFD_ASSERT (htab
->srofixup
->reloc_count
* 4 == htab
->srofixup
->size
);
17771 elf32_arm_init_file_header (bfd
*abfd
, struct bfd_link_info
*link_info
)
17773 Elf_Internal_Ehdr
* i_ehdrp
; /* ELF file header, internal form. */
17774 struct elf32_arm_link_hash_table
*globals
;
17775 struct elf_segment_map
*m
;
17777 if (!_bfd_elf_init_file_header (abfd
, link_info
))
17780 i_ehdrp
= elf_elfheader (abfd
);
17782 if (EF_ARM_EABI_VERSION (i_ehdrp
->e_flags
) == EF_ARM_EABI_UNKNOWN
)
17783 i_ehdrp
->e_ident
[EI_OSABI
] = ELFOSABI_ARM
;
17784 i_ehdrp
->e_ident
[EI_ABIVERSION
] = ARM_ELF_ABI_VERSION
;
17788 globals
= elf32_arm_hash_table (link_info
);
17789 if (globals
!= NULL
&& globals
->byteswap_code
)
17790 i_ehdrp
->e_flags
|= EF_ARM_BE8
;
17792 if (globals
->fdpic_p
)
17793 i_ehdrp
->e_ident
[EI_OSABI
] |= ELFOSABI_ARM_FDPIC
;
17796 if (EF_ARM_EABI_VERSION (i_ehdrp
->e_flags
) == EF_ARM_EABI_VER5
17797 && ((i_ehdrp
->e_type
== ET_DYN
) || (i_ehdrp
->e_type
== ET_EXEC
)))
17799 int abi
= bfd_elf_get_obj_attr_int (abfd
, OBJ_ATTR_PROC
, Tag_ABI_VFP_args
);
17800 if (abi
== AEABI_VFP_args_vfp
)
17801 i_ehdrp
->e_flags
|= EF_ARM_ABI_FLOAT_HARD
;
17803 i_ehdrp
->e_flags
|= EF_ARM_ABI_FLOAT_SOFT
;
17806 /* Scan segment to set p_flags attribute if it contains only sections with
17807 SHF_ARM_PURECODE flag. */
17808 for (m
= elf_seg_map (abfd
); m
!= NULL
; m
= m
->next
)
17814 for (j
= 0; j
< m
->count
; j
++)
17816 if (!(elf_section_flags (m
->sections
[j
]) & SHF_ARM_PURECODE
))
17822 m
->p_flags_valid
= 1;
17828 static enum elf_reloc_type_class
17829 elf32_arm_reloc_type_class (const struct bfd_link_info
*info ATTRIBUTE_UNUSED
,
17830 const asection
*rel_sec ATTRIBUTE_UNUSED
,
17831 const Elf_Internal_Rela
*rela
)
17833 switch ((int) ELF32_R_TYPE (rela
->r_info
))
17835 case R_ARM_RELATIVE
:
17836 return reloc_class_relative
;
17837 case R_ARM_JUMP_SLOT
:
17838 return reloc_class_plt
;
17840 return reloc_class_copy
;
17841 case R_ARM_IRELATIVE
:
17842 return reloc_class_ifunc
;
17844 return reloc_class_normal
;
17849 arm_final_write_processing (bfd
*abfd
)
17851 bfd_arm_update_notes (abfd
, ARM_NOTE_SECTION
);
17855 elf32_arm_final_write_processing (bfd
*abfd
)
17857 arm_final_write_processing (abfd
);
17858 return _bfd_elf_final_write_processing (abfd
);
17861 /* Return TRUE if this is an unwinding table entry. */
17864 is_arm_elf_unwind_section_name (bfd
* abfd ATTRIBUTE_UNUSED
, const char * name
)
17866 return (CONST_STRNEQ (name
, ELF_STRING_ARM_unwind
)
17867 || CONST_STRNEQ (name
, ELF_STRING_ARM_unwind_once
));
17871 /* Set the type and flags for an ARM section. We do this by
17872 the section name, which is a hack, but ought to work. */
17875 elf32_arm_fake_sections (bfd
* abfd
, Elf_Internal_Shdr
* hdr
, asection
* sec
)
17879 name
= bfd_section_name (sec
);
17881 if (is_arm_elf_unwind_section_name (abfd
, name
))
17883 hdr
->sh_type
= SHT_ARM_EXIDX
;
17884 hdr
->sh_flags
|= SHF_LINK_ORDER
;
17887 if (sec
->flags
& SEC_ELF_PURECODE
)
17888 hdr
->sh_flags
|= SHF_ARM_PURECODE
;
17893 /* Handle an ARM specific section when reading an object file. This is
17894 called when bfd_section_from_shdr finds a section with an unknown
17898 elf32_arm_section_from_shdr (bfd
*abfd
,
17899 Elf_Internal_Shdr
* hdr
,
17903 /* There ought to be a place to keep ELF backend specific flags, but
17904 at the moment there isn't one. We just keep track of the
17905 sections by their name, instead. Fortunately, the ABI gives
17906 names for all the ARM specific sections, so we will probably get
17908 switch (hdr
->sh_type
)
17910 case SHT_ARM_EXIDX
:
17911 case SHT_ARM_PREEMPTMAP
:
17912 case SHT_ARM_ATTRIBUTES
:
17919 if (! _bfd_elf_make_section_from_shdr (abfd
, hdr
, name
, shindex
))
17925 static _arm_elf_section_data
*
17926 get_arm_elf_section_data (asection
* sec
)
17928 if (sec
&& sec
->owner
&& is_arm_elf (sec
->owner
))
17929 return elf32_arm_section_data (sec
);
17937 struct bfd_link_info
*info
;
17940 int (*func
) (void *, const char *, Elf_Internal_Sym
*,
17941 asection
*, struct elf_link_hash_entry
*);
17942 } output_arch_syminfo
;
17944 enum map_symbol_type
17952 /* Output a single mapping symbol. */
17955 elf32_arm_output_map_sym (output_arch_syminfo
*osi
,
17956 enum map_symbol_type type
,
17959 static const char *names
[3] = {"$a", "$t", "$d"};
17960 Elf_Internal_Sym sym
;
17962 sym
.st_value
= osi
->sec
->output_section
->vma
17963 + osi
->sec
->output_offset
17967 sym
.st_info
= ELF_ST_INFO (STB_LOCAL
, STT_NOTYPE
);
17968 sym
.st_shndx
= osi
->sec_shndx
;
17969 sym
.st_target_internal
= 0;
17970 elf32_arm_section_map_add (osi
->sec
, names
[type
][1], offset
);
17971 return osi
->func (osi
->flaginfo
, names
[type
], &sym
, osi
->sec
, NULL
) == 1;
17974 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
17975 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
17978 elf32_arm_output_plt_map_1 (output_arch_syminfo
*osi
,
17979 bfd_boolean is_iplt_entry_p
,
17980 union gotplt_union
*root_plt
,
17981 struct arm_plt_info
*arm_plt
)
17983 struct elf32_arm_link_hash_table
*htab
;
17984 bfd_vma addr
, plt_header_size
;
17986 if (root_plt
->offset
== (bfd_vma
) -1)
17989 htab
= elf32_arm_hash_table (osi
->info
);
17993 if (is_iplt_entry_p
)
17995 osi
->sec
= htab
->root
.iplt
;
17996 plt_header_size
= 0;
18000 osi
->sec
= htab
->root
.splt
;
18001 plt_header_size
= htab
->plt_header_size
;
18003 osi
->sec_shndx
= (_bfd_elf_section_from_bfd_section
18004 (osi
->info
->output_bfd
, osi
->sec
->output_section
));
18006 addr
= root_plt
->offset
& -2;
18007 if (htab
->symbian_p
)
18009 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
18011 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 4))
18014 else if (htab
->vxworks_p
)
18016 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
18018 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 8))
18020 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
+ 12))
18022 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 20))
18025 else if (htab
->nacl_p
)
18027 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
18030 else if (htab
->fdpic_p
)
18032 enum map_symbol_type type
= using_thumb_only(htab
)
18036 if (elf32_arm_plt_needs_thumb_stub_p (osi
->info
, arm_plt
))
18037 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_THUMB
, addr
- 4))
18039 if (!elf32_arm_output_map_sym (osi
, type
, addr
))
18041 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 16))
18043 if (htab
->plt_entry_size
== 4 * ARRAY_SIZE(elf32_arm_fdpic_plt_entry
))
18044 if (!elf32_arm_output_map_sym (osi
, type
, addr
+ 24))
18047 else if (using_thumb_only (htab
))
18049 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_THUMB
, addr
))
18054 bfd_boolean thumb_stub_p
;
18056 thumb_stub_p
= elf32_arm_plt_needs_thumb_stub_p (osi
->info
, arm_plt
);
18059 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_THUMB
, addr
- 4))
18062 #ifdef FOUR_WORD_PLT
18063 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
18065 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 12))
18068 /* A three-word PLT with no Thumb thunk contains only Arm code,
18069 so only need to output a mapping symbol for the first PLT entry and
18070 entries with thumb thunks. */
18071 if (thumb_stub_p
|| addr
== plt_header_size
)
18073 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
18082 /* Output mapping symbols for PLT entries associated with H. */
18085 elf32_arm_output_plt_map (struct elf_link_hash_entry
*h
, void *inf
)
18087 output_arch_syminfo
*osi
= (output_arch_syminfo
*) inf
;
18088 struct elf32_arm_link_hash_entry
*eh
;
18090 if (h
->root
.type
== bfd_link_hash_indirect
)
18093 if (h
->root
.type
== bfd_link_hash_warning
)
18094 /* When warning symbols are created, they **replace** the "real"
18095 entry in the hash table, thus we never get to see the real
18096 symbol in a hash traversal. So look at it now. */
18097 h
= (struct elf_link_hash_entry
*) h
->root
.u
.i
.link
;
18099 eh
= (struct elf32_arm_link_hash_entry
*) h
;
18100 return elf32_arm_output_plt_map_1 (osi
, SYMBOL_CALLS_LOCAL (osi
->info
, h
),
18101 &h
->plt
, &eh
->plt
);
18104 /* Bind a veneered symbol to its veneer identified by its hash entry
18105 STUB_ENTRY. The veneered location thus loose its symbol. */
18108 arm_stub_claim_sym (struct elf32_arm_stub_hash_entry
*stub_entry
)
18110 struct elf32_arm_link_hash_entry
*hash
= stub_entry
->h
;
18113 hash
->root
.root
.u
.def
.section
= stub_entry
->stub_sec
;
18114 hash
->root
.root
.u
.def
.value
= stub_entry
->stub_offset
;
18115 hash
->root
.size
= stub_entry
->stub_size
;
18118 /* Output a single local symbol for a generated stub. */
18121 elf32_arm_output_stub_sym (output_arch_syminfo
*osi
, const char *name
,
18122 bfd_vma offset
, bfd_vma size
)
18124 Elf_Internal_Sym sym
;
18126 sym
.st_value
= osi
->sec
->output_section
->vma
18127 + osi
->sec
->output_offset
18129 sym
.st_size
= size
;
18131 sym
.st_info
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
18132 sym
.st_shndx
= osi
->sec_shndx
;
18133 sym
.st_target_internal
= 0;
18134 return osi
->func (osi
->flaginfo
, name
, &sym
, osi
->sec
, NULL
) == 1;
18138 arm_map_one_stub (struct bfd_hash_entry
* gen_entry
,
18141 struct elf32_arm_stub_hash_entry
*stub_entry
;
18142 asection
*stub_sec
;
18145 output_arch_syminfo
*osi
;
18146 const insn_sequence
*template_sequence
;
18147 enum stub_insn_type prev_type
;
18150 enum map_symbol_type sym_type
;
18152 /* Massage our args to the form they really have. */
18153 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
18154 osi
= (output_arch_syminfo
*) in_arg
;
18156 stub_sec
= stub_entry
->stub_sec
;
18158 /* Ensure this stub is attached to the current section being
18160 if (stub_sec
!= osi
->sec
)
18163 addr
= (bfd_vma
) stub_entry
->stub_offset
;
18164 template_sequence
= stub_entry
->stub_template
;
18166 if (arm_stub_sym_claimed (stub_entry
->stub_type
))
18167 arm_stub_claim_sym (stub_entry
);
18170 stub_name
= stub_entry
->output_name
;
18171 switch (template_sequence
[0].type
)
18174 if (!elf32_arm_output_stub_sym (osi
, stub_name
, addr
,
18175 stub_entry
->stub_size
))
18180 if (!elf32_arm_output_stub_sym (osi
, stub_name
, addr
| 1,
18181 stub_entry
->stub_size
))
18190 prev_type
= DATA_TYPE
;
18192 for (i
= 0; i
< stub_entry
->stub_template_size
; i
++)
18194 switch (template_sequence
[i
].type
)
18197 sym_type
= ARM_MAP_ARM
;
18202 sym_type
= ARM_MAP_THUMB
;
18206 sym_type
= ARM_MAP_DATA
;
18214 if (template_sequence
[i
].type
!= prev_type
)
18216 prev_type
= template_sequence
[i
].type
;
18217 if (!elf32_arm_output_map_sym (osi
, sym_type
, addr
+ size
))
18221 switch (template_sequence
[i
].type
)
18245 /* Output mapping symbols for linker generated sections,
18246 and for those data-only sections that do not have a
18250 elf32_arm_output_arch_local_syms (bfd
*output_bfd
,
18251 struct bfd_link_info
*info
,
18253 int (*func
) (void *, const char *,
18254 Elf_Internal_Sym
*,
18256 struct elf_link_hash_entry
*))
18258 output_arch_syminfo osi
;
18259 struct elf32_arm_link_hash_table
*htab
;
18261 bfd_size_type size
;
18264 htab
= elf32_arm_hash_table (info
);
18268 check_use_blx (htab
);
18270 osi
.flaginfo
= flaginfo
;
18274 /* Add a $d mapping symbol to data-only sections that
18275 don't have any mapping symbol. This may result in (harmless) redundant
18276 mapping symbols. */
18277 for (input_bfd
= info
->input_bfds
;
18279 input_bfd
= input_bfd
->link
.next
)
18281 if ((input_bfd
->flags
& (BFD_LINKER_CREATED
| HAS_SYMS
)) == HAS_SYMS
)
18282 for (osi
.sec
= input_bfd
->sections
;
18284 osi
.sec
= osi
.sec
->next
)
18286 if (osi
.sec
->output_section
!= NULL
18287 && ((osi
.sec
->output_section
->flags
& (SEC_ALLOC
| SEC_CODE
))
18289 && (osi
.sec
->flags
& (SEC_HAS_CONTENTS
| SEC_LINKER_CREATED
))
18290 == SEC_HAS_CONTENTS
18291 && get_arm_elf_section_data (osi
.sec
) != NULL
18292 && get_arm_elf_section_data (osi
.sec
)->mapcount
== 0
18293 && osi
.sec
->size
> 0
18294 && (osi
.sec
->flags
& SEC_EXCLUDE
) == 0)
18296 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
18297 (output_bfd
, osi
.sec
->output_section
);
18298 if (osi
.sec_shndx
!= (int)SHN_BAD
)
18299 elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, 0);
18304 /* ARM->Thumb glue. */
18305 if (htab
->arm_glue_size
> 0)
18307 osi
.sec
= bfd_get_linker_section (htab
->bfd_of_glue_owner
,
18308 ARM2THUMB_GLUE_SECTION_NAME
);
18310 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
18311 (output_bfd
, osi
.sec
->output_section
);
18312 if (bfd_link_pic (info
) || htab
->root
.is_relocatable_executable
18313 || htab
->pic_veneer
)
18314 size
= ARM2THUMB_PIC_GLUE_SIZE
;
18315 else if (htab
->use_blx
)
18316 size
= ARM2THUMB_V5_STATIC_GLUE_SIZE
;
18318 size
= ARM2THUMB_STATIC_GLUE_SIZE
;
18320 for (offset
= 0; offset
< htab
->arm_glue_size
; offset
+= size
)
18322 elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, offset
);
18323 elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, offset
+ size
- 4);
18327 /* Thumb->ARM glue. */
18328 if (htab
->thumb_glue_size
> 0)
18330 osi
.sec
= bfd_get_linker_section (htab
->bfd_of_glue_owner
,
18331 THUMB2ARM_GLUE_SECTION_NAME
);
18333 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
18334 (output_bfd
, osi
.sec
->output_section
);
18335 size
= THUMB2ARM_GLUE_SIZE
;
18337 for (offset
= 0; offset
< htab
->thumb_glue_size
; offset
+= size
)
18339 elf32_arm_output_map_sym (&osi
, ARM_MAP_THUMB
, offset
);
18340 elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, offset
+ 4);
18344 /* ARMv4 BX veneers. */
18345 if (htab
->bx_glue_size
> 0)
18347 osi
.sec
= bfd_get_linker_section (htab
->bfd_of_glue_owner
,
18348 ARM_BX_GLUE_SECTION_NAME
);
18350 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
18351 (output_bfd
, osi
.sec
->output_section
);
18353 elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0);
18356 /* Long calls stubs. */
18357 if (htab
->stub_bfd
&& htab
->stub_bfd
->sections
)
18359 asection
* stub_sec
;
18361 for (stub_sec
= htab
->stub_bfd
->sections
;
18363 stub_sec
= stub_sec
->next
)
18365 /* Ignore non-stub sections. */
18366 if (!strstr (stub_sec
->name
, STUB_SUFFIX
))
18369 osi
.sec
= stub_sec
;
18371 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
18372 (output_bfd
, osi
.sec
->output_section
);
18374 bfd_hash_traverse (&htab
->stub_hash_table
, arm_map_one_stub
, &osi
);
18378 /* Finally, output mapping symbols for the PLT. */
18379 if (htab
->root
.splt
&& htab
->root
.splt
->size
> 0)
18381 osi
.sec
= htab
->root
.splt
;
18382 osi
.sec_shndx
= (_bfd_elf_section_from_bfd_section
18383 (output_bfd
, osi
.sec
->output_section
));
18385 /* Output mapping symbols for the plt header. SymbianOS does not have a
18387 if (htab
->vxworks_p
)
18389 /* VxWorks shared libraries have no PLT header. */
18390 if (!bfd_link_pic (info
))
18392 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0))
18394 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, 12))
18398 else if (htab
->nacl_p
)
18400 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0))
18403 else if (using_thumb_only (htab
) && !htab
->fdpic_p
)
18405 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_THUMB
, 0))
18407 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, 12))
18409 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_THUMB
, 16))
18412 else if (!htab
->symbian_p
&& !htab
->fdpic_p
)
18414 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0))
18416 #ifndef FOUR_WORD_PLT
18417 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, 16))
18422 if (htab
->nacl_p
&& htab
->root
.iplt
&& htab
->root
.iplt
->size
> 0)
18424 /* NaCl uses a special first entry in .iplt too. */
18425 osi
.sec
= htab
->root
.iplt
;
18426 osi
.sec_shndx
= (_bfd_elf_section_from_bfd_section
18427 (output_bfd
, osi
.sec
->output_section
));
18428 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0))
18431 if ((htab
->root
.splt
&& htab
->root
.splt
->size
> 0)
18432 || (htab
->root
.iplt
&& htab
->root
.iplt
->size
> 0))
18434 elf_link_hash_traverse (&htab
->root
, elf32_arm_output_plt_map
, &osi
);
18435 for (input_bfd
= info
->input_bfds
;
18437 input_bfd
= input_bfd
->link
.next
)
18439 struct arm_local_iplt_info
**local_iplt
;
18440 unsigned int i
, num_syms
;
18442 local_iplt
= elf32_arm_local_iplt (input_bfd
);
18443 if (local_iplt
!= NULL
)
18445 num_syms
= elf_symtab_hdr (input_bfd
).sh_info
;
18446 for (i
= 0; i
< num_syms
; i
++)
18447 if (local_iplt
[i
] != NULL
18448 && !elf32_arm_output_plt_map_1 (&osi
, TRUE
,
18449 &local_iplt
[i
]->root
,
18450 &local_iplt
[i
]->arm
))
18455 if (htab
->dt_tlsdesc_plt
!= 0)
18457 /* Mapping symbols for the lazy tls trampoline. */
18458 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, htab
->dt_tlsdesc_plt
))
18461 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
,
18462 htab
->dt_tlsdesc_plt
+ 24))
18465 if (htab
->tls_trampoline
!= 0)
18467 /* Mapping symbols for the tls trampoline. */
18468 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, htab
->tls_trampoline
))
18470 #ifdef FOUR_WORD_PLT
18471 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
,
18472 htab
->tls_trampoline
+ 12))
18480 /* Filter normal symbols of CMSE entry functions of ABFD to include in
18481 the import library. All SYMCOUNT symbols of ABFD can be examined
18482 from their pointers in SYMS. Pointers of symbols to keep should be
18483 stored continuously at the beginning of that array.
18485 Returns the number of symbols to keep. */
18487 static unsigned int
18488 elf32_arm_filter_cmse_symbols (bfd
*abfd ATTRIBUTE_UNUSED
,
18489 struct bfd_link_info
*info
,
18490 asymbol
**syms
, long symcount
)
18494 long src_count
, dst_count
= 0;
18495 struct elf32_arm_link_hash_table
*htab
;
18497 htab
= elf32_arm_hash_table (info
);
18498 if (!htab
->stub_bfd
|| !htab
->stub_bfd
->sections
)
18502 cmse_name
= (char *) bfd_malloc (maxnamelen
);
18503 BFD_ASSERT (cmse_name
);
18505 for (src_count
= 0; src_count
< symcount
; src_count
++)
18507 struct elf32_arm_link_hash_entry
*cmse_hash
;
18513 sym
= syms
[src_count
];
18514 flags
= sym
->flags
;
18515 name
= (char *) bfd_asymbol_name (sym
);
18517 if ((flags
& BSF_FUNCTION
) != BSF_FUNCTION
)
18519 if (!(flags
& (BSF_GLOBAL
| BSF_WEAK
)))
18522 namelen
= strlen (name
) + sizeof (CMSE_PREFIX
) + 1;
18523 if (namelen
> maxnamelen
)
18525 cmse_name
= (char *)
18526 bfd_realloc (cmse_name
, namelen
);
18527 maxnamelen
= namelen
;
18529 snprintf (cmse_name
, maxnamelen
, "%s%s", CMSE_PREFIX
, name
);
18530 cmse_hash
= (struct elf32_arm_link_hash_entry
*)
18531 elf_link_hash_lookup (&(htab
)->root
, cmse_name
, FALSE
, FALSE
, TRUE
);
18534 || (cmse_hash
->root
.root
.type
!= bfd_link_hash_defined
18535 && cmse_hash
->root
.root
.type
!= bfd_link_hash_defweak
)
18536 || cmse_hash
->root
.type
!= STT_FUNC
)
18539 syms
[dst_count
++] = sym
;
18543 syms
[dst_count
] = NULL
;
18548 /* Filter symbols of ABFD to include in the import library. All
18549 SYMCOUNT symbols of ABFD can be examined from their pointers in
18550 SYMS. Pointers of symbols to keep should be stored continuously at
18551 the beginning of that array.
18553 Returns the number of symbols to keep. */
18555 static unsigned int
18556 elf32_arm_filter_implib_symbols (bfd
*abfd ATTRIBUTE_UNUSED
,
18557 struct bfd_link_info
*info
,
18558 asymbol
**syms
, long symcount
)
18560 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (info
);
18562 /* Requirement 8 of "ARM v8-M Security Extensions: Requirements on
18563 Development Tools" (ARM-ECM-0359818) mandates Secure Gateway import
18564 library to be a relocatable object file. */
18565 BFD_ASSERT (!(bfd_get_file_flags (info
->out_implib_bfd
) & EXEC_P
));
18566 if (globals
->cmse_implib
)
18567 return elf32_arm_filter_cmse_symbols (abfd
, info
, syms
, symcount
);
18569 return _bfd_elf_filter_global_symbols (abfd
, info
, syms
, symcount
);
18572 /* Allocate target specific section data. */
18575 elf32_arm_new_section_hook (bfd
*abfd
, asection
*sec
)
18577 if (!sec
->used_by_bfd
)
18579 _arm_elf_section_data
*sdata
;
18580 size_t amt
= sizeof (*sdata
);
18582 sdata
= (_arm_elf_section_data
*) bfd_zalloc (abfd
, amt
);
18585 sec
->used_by_bfd
= sdata
;
18588 return _bfd_elf_new_section_hook (abfd
, sec
);
18592 /* Used to order a list of mapping symbols by address. */
18595 elf32_arm_compare_mapping (const void * a
, const void * b
)
18597 const elf32_arm_section_map
*amap
= (const elf32_arm_section_map
*) a
;
18598 const elf32_arm_section_map
*bmap
= (const elf32_arm_section_map
*) b
;
18600 if (amap
->vma
> bmap
->vma
)
18602 else if (amap
->vma
< bmap
->vma
)
18604 else if (amap
->type
> bmap
->type
)
18605 /* Ensure results do not depend on the host qsort for objects with
18606 multiple mapping symbols at the same address by sorting on type
18609 else if (amap
->type
< bmap
->type
)
18615 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
18617 static unsigned long
18618 offset_prel31 (unsigned long addr
, bfd_vma offset
)
18620 return (addr
& ~0x7ffffffful
) | ((addr
+ offset
) & 0x7ffffffful
);
18623 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
18627 copy_exidx_entry (bfd
*output_bfd
, bfd_byte
*to
, bfd_byte
*from
, bfd_vma offset
)
18629 unsigned long first_word
= bfd_get_32 (output_bfd
, from
);
18630 unsigned long second_word
= bfd_get_32 (output_bfd
, from
+ 4);
18632 /* High bit of first word is supposed to be zero. */
18633 if ((first_word
& 0x80000000ul
) == 0)
18634 first_word
= offset_prel31 (first_word
, offset
);
18636 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
18637 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
18638 if ((second_word
!= 0x1) && ((second_word
& 0x80000000ul
) == 0))
18639 second_word
= offset_prel31 (second_word
, offset
);
18641 bfd_put_32 (output_bfd
, first_word
, to
);
18642 bfd_put_32 (output_bfd
, second_word
, to
+ 4);
18645 /* Data for make_branch_to_a8_stub(). */
18647 struct a8_branch_to_stub_data
18649 asection
*writing_section
;
18650 bfd_byte
*contents
;
18654 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
18655 places for a particular section. */
18658 make_branch_to_a8_stub (struct bfd_hash_entry
*gen_entry
,
18661 struct elf32_arm_stub_hash_entry
*stub_entry
;
18662 struct a8_branch_to_stub_data
*data
;
18663 bfd_byte
*contents
;
18664 unsigned long branch_insn
;
18665 bfd_vma veneered_insn_loc
, veneer_entry_loc
;
18666 bfd_signed_vma branch_offset
;
18670 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
18671 data
= (struct a8_branch_to_stub_data
*) in_arg
;
18673 if (stub_entry
->target_section
!= data
->writing_section
18674 || stub_entry
->stub_type
< arm_stub_a8_veneer_lwm
)
18677 contents
= data
->contents
;
18679 /* We use target_section as Cortex-A8 erratum workaround stubs are only
18680 generated when both source and target are in the same section. */
18681 veneered_insn_loc
= stub_entry
->target_section
->output_section
->vma
18682 + stub_entry
->target_section
->output_offset
18683 + stub_entry
->source_value
;
18685 veneer_entry_loc
= stub_entry
->stub_sec
->output_section
->vma
18686 + stub_entry
->stub_sec
->output_offset
18687 + stub_entry
->stub_offset
;
18689 if (stub_entry
->stub_type
== arm_stub_a8_veneer_blx
)
18690 veneered_insn_loc
&= ~3u;
18692 branch_offset
= veneer_entry_loc
- veneered_insn_loc
- 4;
18694 abfd
= stub_entry
->target_section
->owner
;
18695 loc
= stub_entry
->source_value
;
18697 /* We attempt to avoid this condition by setting stubs_always_after_branch
18698 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
18699 This check is just to be on the safe side... */
18700 if ((veneered_insn_loc
& ~0xfff) == (veneer_entry_loc
& ~0xfff))
18702 _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub is "
18703 "allocated in unsafe location"), abfd
);
18707 switch (stub_entry
->stub_type
)
18709 case arm_stub_a8_veneer_b
:
18710 case arm_stub_a8_veneer_b_cond
:
18711 branch_insn
= 0xf0009000;
18714 case arm_stub_a8_veneer_blx
:
18715 branch_insn
= 0xf000e800;
18718 case arm_stub_a8_veneer_bl
:
18720 unsigned int i1
, j1
, i2
, j2
, s
;
18722 branch_insn
= 0xf000d000;
18725 if (branch_offset
< -16777216 || branch_offset
> 16777214)
18727 /* There's not much we can do apart from complain if this
18729 _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub out "
18730 "of range (input file too large)"), abfd
);
18734 /* i1 = not(j1 eor s), so:
18736 j1 = (not i1) eor s. */
18738 branch_insn
|= (branch_offset
>> 1) & 0x7ff;
18739 branch_insn
|= ((branch_offset
>> 12) & 0x3ff) << 16;
18740 i2
= (branch_offset
>> 22) & 1;
18741 i1
= (branch_offset
>> 23) & 1;
18742 s
= (branch_offset
>> 24) & 1;
18745 branch_insn
|= j2
<< 11;
18746 branch_insn
|= j1
<< 13;
18747 branch_insn
|= s
<< 26;
18756 bfd_put_16 (abfd
, (branch_insn
>> 16) & 0xffff, &contents
[loc
]);
18757 bfd_put_16 (abfd
, branch_insn
& 0xffff, &contents
[loc
+ 2]);
18762 /* Beginning of stm32l4xx work-around. */
18764 /* Functions encoding instructions necessary for the emission of the
18765 fix-stm32l4xx-629360.
18766 Encoding is extracted from the
18767 ARM (C) Architecture Reference Manual
18768 ARMv7-A and ARMv7-R edition
18769 ARM DDI 0406C.b (ID072512). */
18771 static inline bfd_vma
18772 create_instruction_branch_absolute (int branch_offset
)
18774 /* A8.8.18 B (A8-334)
18775 B target_address (Encoding T4). */
18776 /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii. */
18777 /* jump offset is: S:I1:I2:imm10:imm11:0. */
18778 /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S). */
18780 int s
= ((branch_offset
& 0x1000000) >> 24);
18781 int j1
= s
^ !((branch_offset
& 0x800000) >> 23);
18782 int j2
= s
^ !((branch_offset
& 0x400000) >> 22);
18784 if (branch_offset
< -(1 << 24) || branch_offset
>= (1 << 24))
18785 BFD_ASSERT (0 && "Error: branch out of range. Cannot create branch.");
18787 bfd_vma patched_inst
= 0xf0009000
18789 | (((unsigned long) (branch_offset
) >> 12) & 0x3ff) << 16 /* imm10. */
18790 | j1
<< 13 /* J1. */
18791 | j2
<< 11 /* J2. */
18792 | (((unsigned long) (branch_offset
) >> 1) & 0x7ff); /* imm11. */
18794 return patched_inst
;
18797 static inline bfd_vma
18798 create_instruction_ldmia (int base_reg
, int wback
, int reg_mask
)
18800 /* A8.8.57 LDM/LDMIA/LDMFD (A8-396)
18801 LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2). */
18802 bfd_vma patched_inst
= 0xe8900000
18803 | (/*W=*/wback
<< 21)
18805 | (reg_mask
& 0x0000ffff);
18807 return patched_inst
;
18810 static inline bfd_vma
18811 create_instruction_ldmdb (int base_reg
, int wback
, int reg_mask
)
18813 /* A8.8.60 LDMDB/LDMEA (A8-402)
18814 LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1). */
18815 bfd_vma patched_inst
= 0xe9100000
18816 | (/*W=*/wback
<< 21)
18818 | (reg_mask
& 0x0000ffff);
18820 return patched_inst
;
18823 static inline bfd_vma
18824 create_instruction_mov (int target_reg
, int source_reg
)
18826 /* A8.8.103 MOV (register) (A8-486)
18827 MOV Rd, Rm (Encoding T1). */
18828 bfd_vma patched_inst
= 0x4600
18829 | (target_reg
& 0x7)
18830 | ((target_reg
& 0x8) >> 3) << 7
18831 | (source_reg
<< 3);
18833 return patched_inst
;
18836 static inline bfd_vma
18837 create_instruction_sub (int target_reg
, int source_reg
, int value
)
18839 /* A8.8.221 SUB (immediate) (A8-708)
18840 SUB Rd, Rn, #value (Encoding T3). */
18841 bfd_vma patched_inst
= 0xf1a00000
18842 | (target_reg
<< 8)
18843 | (source_reg
<< 16)
18845 | ((value
& 0x800) >> 11) << 26
18846 | ((value
& 0x700) >> 8) << 12
18849 return patched_inst
;
18852 static inline bfd_vma
18853 create_instruction_vldmia (int base_reg
, int is_dp
, int wback
, int num_words
,
18856 /* A8.8.332 VLDM (A8-922)
18857 VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */
18858 bfd_vma patched_inst
= (is_dp
? 0xec900b00 : 0xec900a00)
18859 | (/*W=*/wback
<< 21)
18861 | (num_words
& 0x000000ff)
18862 | (((unsigned)first_reg
>> 1) & 0x0000000f) << 12
18863 | (first_reg
& 0x00000001) << 22;
18865 return patched_inst
;
18868 static inline bfd_vma
18869 create_instruction_vldmdb (int base_reg
, int is_dp
, int num_words
,
18872 /* A8.8.332 VLDM (A8-922)
18873 VLMD{MODE} Rn!, {} (Encoding T1 or T2). */
18874 bfd_vma patched_inst
= (is_dp
? 0xed300b00 : 0xed300a00)
18876 | (num_words
& 0x000000ff)
18877 | (((unsigned)first_reg
>>1 ) & 0x0000000f) << 12
18878 | (first_reg
& 0x00000001) << 22;
18880 return patched_inst
;
18883 static inline bfd_vma
18884 create_instruction_udf_w (int value
)
18886 /* A8.8.247 UDF (A8-758)
18887 Undefined (Encoding T2). */
18888 bfd_vma patched_inst
= 0xf7f0a000
18889 | (value
& 0x00000fff)
18890 | (value
& 0x000f0000) << 16;
18892 return patched_inst
;
18895 static inline bfd_vma
18896 create_instruction_udf (int value
)
18898 /* A8.8.247 UDF (A8-758)
18899 Undefined (Encoding T1). */
18900 bfd_vma patched_inst
= 0xde00
18903 return patched_inst
;
18906 /* Functions writing an instruction in memory, returning the next
18907 memory position to write to. */
18909 static inline bfd_byte
*
18910 push_thumb2_insn32 (struct elf32_arm_link_hash_table
* htab
,
18911 bfd
* output_bfd
, bfd_byte
*pt
, insn32 insn
)
18913 put_thumb2_insn (htab
, output_bfd
, insn
, pt
);
18917 static inline bfd_byte
*
18918 push_thumb2_insn16 (struct elf32_arm_link_hash_table
* htab
,
18919 bfd
* output_bfd
, bfd_byte
*pt
, insn32 insn
)
18921 put_thumb_insn (htab
, output_bfd
, insn
, pt
);
18925 /* Function filling up a region in memory with T1 and T2 UDFs taking
18926 care of alignment. */
18929 stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table
* htab
,
18931 const bfd_byte
* const base_stub_contents
,
18932 bfd_byte
* const from_stub_contents
,
18933 const bfd_byte
* const end_stub_contents
)
18935 bfd_byte
*current_stub_contents
= from_stub_contents
;
18937 /* Fill the remaining of the stub with deterministic contents : UDF
18939 Check if realignment is needed on modulo 4 frontier using T1, to
18941 if ((current_stub_contents
< end_stub_contents
)
18942 && !((current_stub_contents
- base_stub_contents
) % 2)
18943 && ((current_stub_contents
- base_stub_contents
) % 4))
18944 current_stub_contents
=
18945 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
18946 create_instruction_udf (0));
18948 for (; current_stub_contents
< end_stub_contents
;)
18949 current_stub_contents
=
18950 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18951 create_instruction_udf_w (0));
18953 return current_stub_contents
;
18956 /* Functions writing the stream of instructions equivalent to the
18957 derived sequence for ldmia, ldmdb, vldm respectively. */
18960 stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table
* htab
,
18962 const insn32 initial_insn
,
18963 const bfd_byte
*const initial_insn_addr
,
18964 bfd_byte
*const base_stub_contents
)
18966 int wback
= (initial_insn
& 0x00200000) >> 21;
18967 int ri
, rn
= (initial_insn
& 0x000F0000) >> 16;
18968 int insn_all_registers
= initial_insn
& 0x0000ffff;
18969 int insn_low_registers
, insn_high_registers
;
18970 int usable_register_mask
;
18971 int nb_registers
= elf32_arm_popcount (insn_all_registers
);
18972 int restore_pc
= (insn_all_registers
& (1 << 15)) ? 1 : 0;
18973 int restore_rn
= (insn_all_registers
& (1 << rn
)) ? 1 : 0;
18974 bfd_byte
*current_stub_contents
= base_stub_contents
;
18976 BFD_ASSERT (is_thumb2_ldmia (initial_insn
));
18978 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18979 smaller than 8 registers load sequences that do not cause the
18981 if (nb_registers
<= 8)
18983 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
18984 current_stub_contents
=
18985 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18988 /* B initial_insn_addr+4. */
18990 current_stub_contents
=
18991 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18992 create_instruction_branch_absolute
18993 (initial_insn_addr
- current_stub_contents
));
18995 /* Fill the remaining of the stub with deterministic contents. */
18996 current_stub_contents
=
18997 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
18998 base_stub_contents
, current_stub_contents
,
18999 base_stub_contents
+
19000 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
);
19005 /* - reg_list[13] == 0. */
19006 BFD_ASSERT ((insn_all_registers
& (1 << 13))==0);
19008 /* - reg_list[14] & reg_list[15] != 1. */
19009 BFD_ASSERT ((insn_all_registers
& 0xC000) != 0xC000);
19011 /* - if (wback==1) reg_list[rn] == 0. */
19012 BFD_ASSERT (!wback
|| !restore_rn
);
19014 /* - nb_registers > 8. */
19015 BFD_ASSERT (elf32_arm_popcount (insn_all_registers
) > 8);
19017 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
19019 /* In the following algorithm, we split this wide LDM using 2 LDM insns:
19020 - One with the 7 lowest registers (register mask 0x007F)
19021 This LDM will finally contain between 2 and 7 registers
19022 - One with the 7 highest registers (register mask 0xDF80)
19023 This ldm will finally contain between 2 and 7 registers. */
19024 insn_low_registers
= insn_all_registers
& 0x007F;
19025 insn_high_registers
= insn_all_registers
& 0xDF80;
19027 /* A spare register may be needed during this veneer to temporarily
19028 handle the base register. This register will be restored with the
19029 last LDM operation.
19030 The usable register may be any general purpose register (that
19031 excludes PC, SP, LR : register mask is 0x1FFF). */
19032 usable_register_mask
= 0x1FFF;
19034 /* Generate the stub function. */
19037 /* LDMIA Rn!, {R-low-register-list} : (Encoding T2). */
19038 current_stub_contents
=
19039 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19040 create_instruction_ldmia
19041 (rn
, /*wback=*/1, insn_low_registers
));
19043 /* LDMIA Rn!, {R-high-register-list} : (Encoding T2). */
19044 current_stub_contents
=
19045 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19046 create_instruction_ldmia
19047 (rn
, /*wback=*/1, insn_high_registers
));
19050 /* B initial_insn_addr+4. */
19051 current_stub_contents
=
19052 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19053 create_instruction_branch_absolute
19054 (initial_insn_addr
- current_stub_contents
));
19057 else /* if (!wback). */
19061 /* If Rn is not part of the high-register-list, move it there. */
19062 if (!(insn_high_registers
& (1 << rn
)))
19064 /* Choose a Ri in the high-register-list that will be restored. */
19065 ri
= ctz (insn_high_registers
& usable_register_mask
& ~(1 << rn
));
19068 current_stub_contents
=
19069 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
19070 create_instruction_mov (ri
, rn
));
19073 /* LDMIA Ri!, {R-low-register-list} : (Encoding T2). */
19074 current_stub_contents
=
19075 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19076 create_instruction_ldmia
19077 (ri
, /*wback=*/1, insn_low_registers
));
19079 /* LDMIA Ri, {R-high-register-list} : (Encoding T2). */
19080 current_stub_contents
=
19081 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19082 create_instruction_ldmia
19083 (ri
, /*wback=*/0, insn_high_registers
));
19087 /* B initial_insn_addr+4. */
19088 current_stub_contents
=
19089 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19090 create_instruction_branch_absolute
19091 (initial_insn_addr
- current_stub_contents
));
19095 /* Fill the remaining of the stub with deterministic contents. */
19096 current_stub_contents
=
19097 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
19098 base_stub_contents
, current_stub_contents
,
19099 base_stub_contents
+
19100 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
);
19104 stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table
* htab
,
19106 const insn32 initial_insn
,
19107 const bfd_byte
*const initial_insn_addr
,
19108 bfd_byte
*const base_stub_contents
)
19110 int wback
= (initial_insn
& 0x00200000) >> 21;
19111 int ri
, rn
= (initial_insn
& 0x000f0000) >> 16;
19112 int insn_all_registers
= initial_insn
& 0x0000ffff;
19113 int insn_low_registers
, insn_high_registers
;
19114 int usable_register_mask
;
19115 int restore_pc
= (insn_all_registers
& (1 << 15)) ? 1 : 0;
19116 int restore_rn
= (insn_all_registers
& (1 << rn
)) ? 1 : 0;
19117 int nb_registers
= elf32_arm_popcount (insn_all_registers
);
19118 bfd_byte
*current_stub_contents
= base_stub_contents
;
19120 BFD_ASSERT (is_thumb2_ldmdb (initial_insn
));
19122 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
19123 smaller than 8 registers load sequences that do not cause the
19125 if (nb_registers
<= 8)
19127 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
19128 current_stub_contents
=
19129 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19132 /* B initial_insn_addr+4. */
19133 current_stub_contents
=
19134 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19135 create_instruction_branch_absolute
19136 (initial_insn_addr
- current_stub_contents
));
19138 /* Fill the remaining of the stub with deterministic contents. */
19139 current_stub_contents
=
19140 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
19141 base_stub_contents
, current_stub_contents
,
19142 base_stub_contents
+
19143 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
);
19148 /* - reg_list[13] == 0. */
19149 BFD_ASSERT ((insn_all_registers
& (1 << 13)) == 0);
19151 /* - reg_list[14] & reg_list[15] != 1. */
19152 BFD_ASSERT ((insn_all_registers
& 0xC000) != 0xC000);
19154 /* - if (wback==1) reg_list[rn] == 0. */
19155 BFD_ASSERT (!wback
|| !restore_rn
);
19157 /* - nb_registers > 8. */
19158 BFD_ASSERT (elf32_arm_popcount (insn_all_registers
) > 8);
19160 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
19162 /* In the following algorithm, we split this wide LDM using 2 LDM insn:
19163 - One with the 7 lowest registers (register mask 0x007F)
19164 This LDM will finally contain between 2 and 7 registers
19165 - One with the 7 highest registers (register mask 0xDF80)
19166 This ldm will finally contain between 2 and 7 registers. */
19167 insn_low_registers
= insn_all_registers
& 0x007F;
19168 insn_high_registers
= insn_all_registers
& 0xDF80;
19170 /* A spare register may be needed during this veneer to temporarily
19171 handle the base register. This register will be restored with
19172 the last LDM operation.
19173 The usable register may be any general purpose register (that excludes
19174 PC, SP, LR : register mask is 0x1FFF). */
19175 usable_register_mask
= 0x1FFF;
19177 /* Generate the stub function. */
19178 if (!wback
&& !restore_pc
&& !restore_rn
)
19180 /* Choose a Ri in the low-register-list that will be restored. */
19181 ri
= ctz (insn_low_registers
& usable_register_mask
& ~(1 << rn
));
19184 current_stub_contents
=
19185 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
19186 create_instruction_mov (ri
, rn
));
19188 /* LDMDB Ri!, {R-high-register-list}. */
19189 current_stub_contents
=
19190 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19191 create_instruction_ldmdb
19192 (ri
, /*wback=*/1, insn_high_registers
));
19194 /* LDMDB Ri, {R-low-register-list}. */
19195 current_stub_contents
=
19196 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19197 create_instruction_ldmdb
19198 (ri
, /*wback=*/0, insn_low_registers
));
19200 /* B initial_insn_addr+4. */
19201 current_stub_contents
=
19202 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19203 create_instruction_branch_absolute
19204 (initial_insn_addr
- current_stub_contents
));
19206 else if (wback
&& !restore_pc
&& !restore_rn
)
19208 /* LDMDB Rn!, {R-high-register-list}. */
19209 current_stub_contents
=
19210 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19211 create_instruction_ldmdb
19212 (rn
, /*wback=*/1, insn_high_registers
));
19214 /* LDMDB Rn!, {R-low-register-list}. */
19215 current_stub_contents
=
19216 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19217 create_instruction_ldmdb
19218 (rn
, /*wback=*/1, insn_low_registers
));
19220 /* B initial_insn_addr+4. */
19221 current_stub_contents
=
19222 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19223 create_instruction_branch_absolute
19224 (initial_insn_addr
- current_stub_contents
));
19226 else if (!wback
&& restore_pc
&& !restore_rn
)
19228 /* Choose a Ri in the high-register-list that will be restored. */
19229 ri
= ctz (insn_high_registers
& usable_register_mask
& ~(1 << rn
));
19231 /* SUB Ri, Rn, #(4*nb_registers). */
19232 current_stub_contents
=
19233 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19234 create_instruction_sub (ri
, rn
, (4 * nb_registers
)));
19236 /* LDMIA Ri!, {R-low-register-list}. */
19237 current_stub_contents
=
19238 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19239 create_instruction_ldmia
19240 (ri
, /*wback=*/1, insn_low_registers
));
19242 /* LDMIA Ri, {R-high-register-list}. */
19243 current_stub_contents
=
19244 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19245 create_instruction_ldmia
19246 (ri
, /*wback=*/0, insn_high_registers
));
19248 else if (wback
&& restore_pc
&& !restore_rn
)
19250 /* Choose a Ri in the high-register-list that will be restored. */
19251 ri
= ctz (insn_high_registers
& usable_register_mask
& ~(1 << rn
));
19253 /* SUB Rn, Rn, #(4*nb_registers) */
19254 current_stub_contents
=
19255 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19256 create_instruction_sub (rn
, rn
, (4 * nb_registers
)));
19259 current_stub_contents
=
19260 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
19261 create_instruction_mov (ri
, rn
));
19263 /* LDMIA Ri!, {R-low-register-list}. */
19264 current_stub_contents
=
19265 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19266 create_instruction_ldmia
19267 (ri
, /*wback=*/1, insn_low_registers
));
19269 /* LDMIA Ri, {R-high-register-list}. */
19270 current_stub_contents
=
19271 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19272 create_instruction_ldmia
19273 (ri
, /*wback=*/0, insn_high_registers
));
19275 else if (!wback
&& !restore_pc
&& restore_rn
)
19278 if (!(insn_low_registers
& (1 << rn
)))
19280 /* Choose a Ri in the low-register-list that will be restored. */
19281 ri
= ctz (insn_low_registers
& usable_register_mask
& ~(1 << rn
));
19284 current_stub_contents
=
19285 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
19286 create_instruction_mov (ri
, rn
));
19289 /* LDMDB Ri!, {R-high-register-list}. */
19290 current_stub_contents
=
19291 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19292 create_instruction_ldmdb
19293 (ri
, /*wback=*/1, insn_high_registers
));
19295 /* LDMDB Ri, {R-low-register-list}. */
19296 current_stub_contents
=
19297 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19298 create_instruction_ldmdb
19299 (ri
, /*wback=*/0, insn_low_registers
));
19301 /* B initial_insn_addr+4. */
19302 current_stub_contents
=
19303 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19304 create_instruction_branch_absolute
19305 (initial_insn_addr
- current_stub_contents
));
19307 else if (!wback
&& restore_pc
&& restore_rn
)
19310 if (!(insn_high_registers
& (1 << rn
)))
19312 /* Choose a Ri in the high-register-list that will be restored. */
19313 ri
= ctz (insn_high_registers
& usable_register_mask
& ~(1 << rn
));
19316 /* SUB Ri, Rn, #(4*nb_registers). */
19317 current_stub_contents
=
19318 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19319 create_instruction_sub (ri
, rn
, (4 * nb_registers
)));
19321 /* LDMIA Ri!, {R-low-register-list}. */
19322 current_stub_contents
=
19323 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19324 create_instruction_ldmia
19325 (ri
, /*wback=*/1, insn_low_registers
));
19327 /* LDMIA Ri, {R-high-register-list}. */
19328 current_stub_contents
=
19329 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19330 create_instruction_ldmia
19331 (ri
, /*wback=*/0, insn_high_registers
));
19333 else if (wback
&& restore_rn
)
19335 /* The assembler should not have accepted to encode this. */
19336 BFD_ASSERT (0 && "Cannot patch an instruction that has an "
19337 "undefined behavior.\n");
19340 /* Fill the remaining of the stub with deterministic contents. */
19341 current_stub_contents
=
19342 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
19343 base_stub_contents
, current_stub_contents
,
19344 base_stub_contents
+
19345 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
);
19350 stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table
* htab
,
19352 const insn32 initial_insn
,
19353 const bfd_byte
*const initial_insn_addr
,
19354 bfd_byte
*const base_stub_contents
)
19356 int num_words
= initial_insn
& 0xff;
19357 bfd_byte
*current_stub_contents
= base_stub_contents
;
19359 BFD_ASSERT (is_thumb2_vldm (initial_insn
));
19361 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
19362 smaller than 8 words load sequences that do not cause the
19364 if (num_words
<= 8)
19366 /* Untouched instruction. */
19367 current_stub_contents
=
19368 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19371 /* B initial_insn_addr+4. */
19372 current_stub_contents
=
19373 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19374 create_instruction_branch_absolute
19375 (initial_insn_addr
- current_stub_contents
));
19379 bfd_boolean is_dp
= /* DP encoding. */
19380 (initial_insn
& 0xfe100f00) == 0xec100b00;
19381 bfd_boolean is_ia_nobang
= /* (IA without !). */
19382 (((initial_insn
<< 7) >> 28) & 0xd) == 0x4;
19383 bfd_boolean is_ia_bang
= /* (IA with !) - includes VPOP. */
19384 (((initial_insn
<< 7) >> 28) & 0xd) == 0x5;
19385 bfd_boolean is_db_bang
= /* (DB with !). */
19386 (((initial_insn
<< 7) >> 28) & 0xd) == 0x9;
19387 int base_reg
= ((unsigned int) initial_insn
<< 12) >> 28;
19388 /* d = UInt (Vd:D);. */
19389 int first_reg
= ((((unsigned int) initial_insn
<< 16) >> 28) << 1)
19390 | (((unsigned int)initial_insn
<< 9) >> 31);
19392 /* Compute the number of 8-words chunks needed to split. */
19393 int chunks
= (num_words
% 8) ? (num_words
/ 8 + 1) : (num_words
/ 8);
19396 /* The test coverage has been done assuming the following
19397 hypothesis that exactly one of the previous is_ predicates is
19399 BFD_ASSERT ( (is_ia_nobang
^ is_ia_bang
^ is_db_bang
)
19400 && !(is_ia_nobang
& is_ia_bang
& is_db_bang
));
19402 /* We treat the cutting of the words in one pass for all
19403 cases, then we emit the adjustments:
19406 -> vldm rx!, {8_words_or_less} for each needed 8_word
19407 -> sub rx, rx, #size (list)
19410 -> vldm rx!, {8_words_or_less} for each needed 8_word
19411 This also handles vpop instruction (when rx is sp)
19414 -> vldmb rx!, {8_words_or_less} for each needed 8_word. */
19415 for (chunk
= 0; chunk
< chunks
; ++chunk
)
19417 bfd_vma new_insn
= 0;
19419 if (is_ia_nobang
|| is_ia_bang
)
19421 new_insn
= create_instruction_vldmia
19425 chunks
- (chunk
+ 1) ?
19426 8 : num_words
- chunk
* 8,
19427 first_reg
+ chunk
* 8);
19429 else if (is_db_bang
)
19431 new_insn
= create_instruction_vldmdb
19434 chunks
- (chunk
+ 1) ?
19435 8 : num_words
- chunk
* 8,
19436 first_reg
+ chunk
* 8);
19440 current_stub_contents
=
19441 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19445 /* Only this case requires the base register compensation
19449 current_stub_contents
=
19450 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19451 create_instruction_sub
19452 (base_reg
, base_reg
, 4*num_words
));
19455 /* B initial_insn_addr+4. */
19456 current_stub_contents
=
19457 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19458 create_instruction_branch_absolute
19459 (initial_insn_addr
- current_stub_contents
));
19462 /* Fill the remaining of the stub with deterministic contents. */
19463 current_stub_contents
=
19464 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
19465 base_stub_contents
, current_stub_contents
,
19466 base_stub_contents
+
19467 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE
);
19471 stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table
* htab
,
19473 const insn32 wrong_insn
,
19474 const bfd_byte
*const wrong_insn_addr
,
19475 bfd_byte
*const stub_contents
)
19477 if (is_thumb2_ldmia (wrong_insn
))
19478 stm32l4xx_create_replacing_stub_ldmia (htab
, output_bfd
,
19479 wrong_insn
, wrong_insn_addr
,
19481 else if (is_thumb2_ldmdb (wrong_insn
))
19482 stm32l4xx_create_replacing_stub_ldmdb (htab
, output_bfd
,
19483 wrong_insn
, wrong_insn_addr
,
19485 else if (is_thumb2_vldm (wrong_insn
))
19486 stm32l4xx_create_replacing_stub_vldm (htab
, output_bfd
,
19487 wrong_insn
, wrong_insn_addr
,
19491 /* End of stm32l4xx work-around. */
19494 /* Do code byteswapping. Return FALSE afterwards so that the section is
19495 written out as normal. */
19498 elf32_arm_write_section (bfd
*output_bfd
,
19499 struct bfd_link_info
*link_info
,
19501 bfd_byte
*contents
)
19503 unsigned int mapcount
, errcount
;
19504 _arm_elf_section_data
*arm_data
;
19505 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
19506 elf32_arm_section_map
*map
;
19507 elf32_vfp11_erratum_list
*errnode
;
19508 elf32_stm32l4xx_erratum_list
*stm32l4xx_errnode
;
19511 bfd_vma offset
= sec
->output_section
->vma
+ sec
->output_offset
;
19515 if (globals
== NULL
)
19518 /* If this section has not been allocated an _arm_elf_section_data
19519 structure then we cannot record anything. */
19520 arm_data
= get_arm_elf_section_data (sec
);
19521 if (arm_data
== NULL
)
19524 mapcount
= arm_data
->mapcount
;
19525 map
= arm_data
->map
;
19526 errcount
= arm_data
->erratumcount
;
19530 unsigned int endianflip
= bfd_big_endian (output_bfd
) ? 3 : 0;
19532 for (errnode
= arm_data
->erratumlist
; errnode
!= 0;
19533 errnode
= errnode
->next
)
19535 bfd_vma target
= errnode
->vma
- offset
;
19537 switch (errnode
->type
)
19539 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER
:
19541 bfd_vma branch_to_veneer
;
19542 /* Original condition code of instruction, plus bit mask for
19543 ARM B instruction. */
19544 unsigned int insn
= (errnode
->u
.b
.vfp_insn
& 0xf0000000)
19547 /* The instruction is before the label. */
19550 /* Above offset included in -4 below. */
19551 branch_to_veneer
= errnode
->u
.b
.veneer
->vma
19552 - errnode
->vma
- 4;
19554 if ((signed) branch_to_veneer
< -(1 << 25)
19555 || (signed) branch_to_veneer
>= (1 << 25))
19556 _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
19557 "range"), output_bfd
);
19559 insn
|= (branch_to_veneer
>> 2) & 0xffffff;
19560 contents
[endianflip
^ target
] = insn
& 0xff;
19561 contents
[endianflip
^ (target
+ 1)] = (insn
>> 8) & 0xff;
19562 contents
[endianflip
^ (target
+ 2)] = (insn
>> 16) & 0xff;
19563 contents
[endianflip
^ (target
+ 3)] = (insn
>> 24) & 0xff;
19567 case VFP11_ERRATUM_ARM_VENEER
:
19569 bfd_vma branch_from_veneer
;
19572 /* Take size of veneer into account. */
19573 branch_from_veneer
= errnode
->u
.v
.branch
->vma
19574 - errnode
->vma
- 12;
19576 if ((signed) branch_from_veneer
< -(1 << 25)
19577 || (signed) branch_from_veneer
>= (1 << 25))
19578 _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
19579 "range"), output_bfd
);
19581 /* Original instruction. */
19582 insn
= errnode
->u
.v
.branch
->u
.b
.vfp_insn
;
19583 contents
[endianflip
^ target
] = insn
& 0xff;
19584 contents
[endianflip
^ (target
+ 1)] = (insn
>> 8) & 0xff;
19585 contents
[endianflip
^ (target
+ 2)] = (insn
>> 16) & 0xff;
19586 contents
[endianflip
^ (target
+ 3)] = (insn
>> 24) & 0xff;
19588 /* Branch back to insn after original insn. */
19589 insn
= 0xea000000 | ((branch_from_veneer
>> 2) & 0xffffff);
19590 contents
[endianflip
^ (target
+ 4)] = insn
& 0xff;
19591 contents
[endianflip
^ (target
+ 5)] = (insn
>> 8) & 0xff;
19592 contents
[endianflip
^ (target
+ 6)] = (insn
>> 16) & 0xff;
19593 contents
[endianflip
^ (target
+ 7)] = (insn
>> 24) & 0xff;
19603 if (arm_data
->stm32l4xx_erratumcount
!= 0)
19605 for (stm32l4xx_errnode
= arm_data
->stm32l4xx_erratumlist
;
19606 stm32l4xx_errnode
!= 0;
19607 stm32l4xx_errnode
= stm32l4xx_errnode
->next
)
19609 bfd_vma target
= stm32l4xx_errnode
->vma
- offset
;
19611 switch (stm32l4xx_errnode
->type
)
19613 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER
:
19616 bfd_vma branch_to_veneer
=
19617 stm32l4xx_errnode
->u
.b
.veneer
->vma
- stm32l4xx_errnode
->vma
;
19619 if ((signed) branch_to_veneer
< -(1 << 24)
19620 || (signed) branch_to_veneer
>= (1 << 24))
19622 bfd_vma out_of_range
=
19623 ((signed) branch_to_veneer
< -(1 << 24)) ?
19624 - branch_to_veneer
- (1 << 24) :
19625 ((signed) branch_to_veneer
>= (1 << 24)) ?
19626 branch_to_veneer
- (1 << 24) : 0;
19629 (_("%pB(%#" PRIx64
"): error: "
19630 "cannot create STM32L4XX veneer; "
19631 "jump out of range by %" PRId64
" bytes; "
19632 "cannot encode branch instruction"),
19634 (uint64_t) (stm32l4xx_errnode
->vma
- 4),
19635 (int64_t) out_of_range
);
19639 insn
= create_instruction_branch_absolute
19640 (stm32l4xx_errnode
->u
.b
.veneer
->vma
- stm32l4xx_errnode
->vma
);
19642 /* The instruction is before the label. */
19645 put_thumb2_insn (globals
, output_bfd
,
19646 (bfd_vma
) insn
, contents
+ target
);
19650 case STM32L4XX_ERRATUM_VENEER
:
19653 bfd_byte
* veneer_r
;
19656 veneer
= contents
+ target
;
19658 + stm32l4xx_errnode
->u
.b
.veneer
->vma
19659 - stm32l4xx_errnode
->vma
- 4;
19661 if ((signed) (veneer_r
- veneer
-
19662 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE
>
19663 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
?
19664 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE
:
19665 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
) < -(1 << 24)
19666 || (signed) (veneer_r
- veneer
) >= (1 << 24))
19668 _bfd_error_handler (_("%pB: error: cannot create STM32L4XX "
19669 "veneer"), output_bfd
);
19673 /* Original instruction. */
19674 insn
= stm32l4xx_errnode
->u
.v
.branch
->u
.b
.insn
;
19676 stm32l4xx_create_replacing_stub
19677 (globals
, output_bfd
, insn
, (void*)veneer_r
, (void*)veneer
);
19687 if (arm_data
->elf
.this_hdr
.sh_type
== SHT_ARM_EXIDX
)
19689 arm_unwind_table_edit
*edit_node
19690 = arm_data
->u
.exidx
.unwind_edit_list
;
19691 /* Now, sec->size is the size of the section we will write. The original
19692 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
19693 markers) was sec->rawsize. (This isn't the case if we perform no
19694 edits, then rawsize will be zero and we should use size). */
19695 bfd_byte
*edited_contents
= (bfd_byte
*) bfd_malloc (sec
->size
);
19696 unsigned int input_size
= sec
->rawsize
? sec
->rawsize
: sec
->size
;
19697 unsigned int in_index
, out_index
;
19698 bfd_vma add_to_offsets
= 0;
19700 if (edited_contents
== NULL
)
19702 for (in_index
= 0, out_index
= 0; in_index
* 8 < input_size
|| edit_node
;)
19706 unsigned int edit_index
= edit_node
->index
;
19708 if (in_index
< edit_index
&& in_index
* 8 < input_size
)
19710 copy_exidx_entry (output_bfd
, edited_contents
+ out_index
* 8,
19711 contents
+ in_index
* 8, add_to_offsets
);
19715 else if (in_index
== edit_index
19716 || (in_index
* 8 >= input_size
19717 && edit_index
== UINT_MAX
))
19719 switch (edit_node
->type
)
19721 case DELETE_EXIDX_ENTRY
:
19723 add_to_offsets
+= 8;
19726 case INSERT_EXIDX_CANTUNWIND_AT_END
:
19728 asection
*text_sec
= edit_node
->linked_section
;
19729 bfd_vma text_offset
= text_sec
->output_section
->vma
19730 + text_sec
->output_offset
19732 bfd_vma exidx_offset
= offset
+ out_index
* 8;
19733 unsigned long prel31_offset
;
19735 /* Note: this is meant to be equivalent to an
19736 R_ARM_PREL31 relocation. These synthetic
19737 EXIDX_CANTUNWIND markers are not relocated by the
19738 usual BFD method. */
19739 prel31_offset
= (text_offset
- exidx_offset
)
19741 if (bfd_link_relocatable (link_info
))
19743 /* Here relocation for new EXIDX_CANTUNWIND is
19744 created, so there is no need to
19745 adjust offset by hand. */
19746 prel31_offset
= text_sec
->output_offset
19750 /* First address we can't unwind. */
19751 bfd_put_32 (output_bfd
, prel31_offset
,
19752 &edited_contents
[out_index
* 8]);
19754 /* Code for EXIDX_CANTUNWIND. */
19755 bfd_put_32 (output_bfd
, 0x1,
19756 &edited_contents
[out_index
* 8 + 4]);
19759 add_to_offsets
-= 8;
19764 edit_node
= edit_node
->next
;
19769 /* No more edits, copy remaining entries verbatim. */
19770 copy_exidx_entry (output_bfd
, edited_contents
+ out_index
* 8,
19771 contents
+ in_index
* 8, add_to_offsets
);
19777 if (!(sec
->flags
& SEC_EXCLUDE
) && !(sec
->flags
& SEC_NEVER_LOAD
))
19778 bfd_set_section_contents (output_bfd
, sec
->output_section
,
19780 (file_ptr
) sec
->output_offset
, sec
->size
);
19785 /* Fix code to point to Cortex-A8 erratum stubs. */
19786 if (globals
->fix_cortex_a8
)
19788 struct a8_branch_to_stub_data data
;
19790 data
.writing_section
= sec
;
19791 data
.contents
= contents
;
19793 bfd_hash_traverse (& globals
->stub_hash_table
, make_branch_to_a8_stub
,
19800 if (globals
->byteswap_code
)
19802 qsort (map
, mapcount
, sizeof (* map
), elf32_arm_compare_mapping
);
19805 for (i
= 0; i
< mapcount
; i
++)
19807 if (i
== mapcount
- 1)
19810 end
= map
[i
+ 1].vma
;
19812 switch (map
[i
].type
)
19815 /* Byte swap code words. */
19816 while (ptr
+ 3 < end
)
19818 tmp
= contents
[ptr
];
19819 contents
[ptr
] = contents
[ptr
+ 3];
19820 contents
[ptr
+ 3] = tmp
;
19821 tmp
= contents
[ptr
+ 1];
19822 contents
[ptr
+ 1] = contents
[ptr
+ 2];
19823 contents
[ptr
+ 2] = tmp
;
19829 /* Byte swap code halfwords. */
19830 while (ptr
+ 1 < end
)
19832 tmp
= contents
[ptr
];
19833 contents
[ptr
] = contents
[ptr
+ 1];
19834 contents
[ptr
+ 1] = tmp
;
19840 /* Leave data alone. */
19848 arm_data
->mapcount
= -1;
19849 arm_data
->mapsize
= 0;
19850 arm_data
->map
= NULL
;
19855 /* Mangle thumb function symbols as we read them in. */
19858 elf32_arm_swap_symbol_in (bfd
* abfd
,
19861 Elf_Internal_Sym
*dst
)
19863 if (!bfd_elf32_swap_symbol_in (abfd
, psrc
, pshn
, dst
))
19865 dst
->st_target_internal
= 0;
19867 /* New EABI objects mark thumb function symbols by setting the low bit of
19869 if (ELF_ST_TYPE (dst
->st_info
) == STT_FUNC
19870 || ELF_ST_TYPE (dst
->st_info
) == STT_GNU_IFUNC
)
19872 if (dst
->st_value
& 1)
19874 dst
->st_value
&= ~(bfd_vma
) 1;
19875 ARM_SET_SYM_BRANCH_TYPE (dst
->st_target_internal
,
19876 ST_BRANCH_TO_THUMB
);
19879 ARM_SET_SYM_BRANCH_TYPE (dst
->st_target_internal
, ST_BRANCH_TO_ARM
);
19881 else if (ELF_ST_TYPE (dst
->st_info
) == STT_ARM_TFUNC
)
19883 dst
->st_info
= ELF_ST_INFO (ELF_ST_BIND (dst
->st_info
), STT_FUNC
);
19884 ARM_SET_SYM_BRANCH_TYPE (dst
->st_target_internal
, ST_BRANCH_TO_THUMB
);
19886 else if (ELF_ST_TYPE (dst
->st_info
) == STT_SECTION
)
19887 ARM_SET_SYM_BRANCH_TYPE (dst
->st_target_internal
, ST_BRANCH_LONG
);
19889 ARM_SET_SYM_BRANCH_TYPE (dst
->st_target_internal
, ST_BRANCH_UNKNOWN
);
19895 /* Mangle thumb function symbols as we write them out. */
19898 elf32_arm_swap_symbol_out (bfd
*abfd
,
19899 const Elf_Internal_Sym
*src
,
19903 Elf_Internal_Sym newsym
;
19905 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
19906 of the address set, as per the new EABI. We do this unconditionally
19907 because objcopy does not set the elf header flags until after
19908 it writes out the symbol table. */
19909 if (ARM_GET_SYM_BRANCH_TYPE (src
->st_target_internal
) == ST_BRANCH_TO_THUMB
)
19912 if (ELF_ST_TYPE (src
->st_info
) != STT_GNU_IFUNC
)
19913 newsym
.st_info
= ELF_ST_INFO (ELF_ST_BIND (src
->st_info
), STT_FUNC
);
19914 if (newsym
.st_shndx
!= SHN_UNDEF
)
19916 /* Do this only for defined symbols. At link type, the static
19917 linker will simulate the work of dynamic linker of resolving
19918 symbols and will carry over the thumbness of found symbols to
19919 the output symbol table. It's not clear how it happens, but
19920 the thumbness of undefined symbols can well be different at
19921 runtime, and writing '1' for them will be confusing for users
19922 and possibly for dynamic linker itself.
19924 newsym
.st_value
|= 1;
19929 bfd_elf32_swap_symbol_out (abfd
, src
, cdst
, shndx
);
19932 /* Add the PT_ARM_EXIDX program header. */
19935 elf32_arm_modify_segment_map (bfd
*abfd
,
19936 struct bfd_link_info
*info ATTRIBUTE_UNUSED
)
19938 struct elf_segment_map
*m
;
19941 sec
= bfd_get_section_by_name (abfd
, ".ARM.exidx");
19942 if (sec
!= NULL
&& (sec
->flags
& SEC_LOAD
) != 0)
19944 /* If there is already a PT_ARM_EXIDX header, then we do not
19945 want to add another one. This situation arises when running
19946 "strip"; the input binary already has the header. */
19947 m
= elf_seg_map (abfd
);
19948 while (m
&& m
->p_type
!= PT_ARM_EXIDX
)
19952 m
= (struct elf_segment_map
*)
19953 bfd_zalloc (abfd
, sizeof (struct elf_segment_map
));
19956 m
->p_type
= PT_ARM_EXIDX
;
19958 m
->sections
[0] = sec
;
19960 m
->next
= elf_seg_map (abfd
);
19961 elf_seg_map (abfd
) = m
;
19968 /* We may add a PT_ARM_EXIDX program header. */
19971 elf32_arm_additional_program_headers (bfd
*abfd
,
19972 struct bfd_link_info
*info ATTRIBUTE_UNUSED
)
19976 sec
= bfd_get_section_by_name (abfd
, ".ARM.exidx");
19977 if (sec
!= NULL
&& (sec
->flags
& SEC_LOAD
) != 0)
19983 /* Hook called by the linker routine which adds symbols from an object
19987 elf32_arm_add_symbol_hook (bfd
*abfd
, struct bfd_link_info
*info
,
19988 Elf_Internal_Sym
*sym
, const char **namep
,
19989 flagword
*flagsp
, asection
**secp
, bfd_vma
*valp
)
19991 if (elf32_arm_hash_table (info
) == NULL
)
19994 if (elf32_arm_hash_table (info
)->vxworks_p
19995 && !elf_vxworks_add_symbol_hook (abfd
, info
, sym
, namep
,
19996 flagsp
, secp
, valp
))
20002 /* We use this to override swap_symbol_in and swap_symbol_out. */
20003 const struct elf_size_info elf32_arm_size_info
=
20005 sizeof (Elf32_External_Ehdr
),
20006 sizeof (Elf32_External_Phdr
),
20007 sizeof (Elf32_External_Shdr
),
20008 sizeof (Elf32_External_Rel
),
20009 sizeof (Elf32_External_Rela
),
20010 sizeof (Elf32_External_Sym
),
20011 sizeof (Elf32_External_Dyn
),
20012 sizeof (Elf_External_Note
),
20016 ELFCLASS32
, EV_CURRENT
,
20017 bfd_elf32_write_out_phdrs
,
20018 bfd_elf32_write_shdrs_and_ehdr
,
20019 bfd_elf32_checksum_contents
,
20020 bfd_elf32_write_relocs
,
20021 elf32_arm_swap_symbol_in
,
20022 elf32_arm_swap_symbol_out
,
20023 bfd_elf32_slurp_reloc_table
,
20024 bfd_elf32_slurp_symbol_table
,
20025 bfd_elf32_swap_dyn_in
,
20026 bfd_elf32_swap_dyn_out
,
20027 bfd_elf32_swap_reloc_in
,
20028 bfd_elf32_swap_reloc_out
,
20029 bfd_elf32_swap_reloca_in
,
20030 bfd_elf32_swap_reloca_out
20034 read_code32 (const bfd
*abfd
, const bfd_byte
*addr
)
20036 /* V7 BE8 code is always little endian. */
20037 if ((elf_elfheader (abfd
)->e_flags
& EF_ARM_BE8
) != 0)
20038 return bfd_getl32 (addr
);
20040 return bfd_get_32 (abfd
, addr
);
20044 read_code16 (const bfd
*abfd
, const bfd_byte
*addr
)
20046 /* V7 BE8 code is always little endian. */
20047 if ((elf_elfheader (abfd
)->e_flags
& EF_ARM_BE8
) != 0)
20048 return bfd_getl16 (addr
);
20050 return bfd_get_16 (abfd
, addr
);
20053 /* Return size of plt0 entry starting at ADDR
20054 or (bfd_vma) -1 if size can not be determined. */
20057 elf32_arm_plt0_size (const bfd
*abfd
, const bfd_byte
*addr
)
20059 bfd_vma first_word
;
20062 first_word
= read_code32 (abfd
, addr
);
20064 if (first_word
== elf32_arm_plt0_entry
[0])
20065 plt0_size
= 4 * ARRAY_SIZE (elf32_arm_plt0_entry
);
20066 else if (first_word
== elf32_thumb2_plt0_entry
[0])
20067 plt0_size
= 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry
);
20069 /* We don't yet handle this PLT format. */
20070 return (bfd_vma
) -1;
20075 /* Return size of plt entry starting at offset OFFSET
20076 of plt section located at address START
20077 or (bfd_vma) -1 if size can not be determined. */
20080 elf32_arm_plt_size (const bfd
*abfd
, const bfd_byte
*start
, bfd_vma offset
)
20082 bfd_vma first_insn
;
20083 bfd_vma plt_size
= 0;
20084 const bfd_byte
*addr
= start
+ offset
;
20086 /* PLT entry size if fixed on Thumb-only platforms. */
20087 if (read_code32 (abfd
, start
) == elf32_thumb2_plt0_entry
[0])
20088 return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry
);
20090 /* Respect Thumb stub if necessary. */
20091 if (read_code16 (abfd
, addr
) == elf32_arm_plt_thumb_stub
[0])
20093 plt_size
+= 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub
);
20096 /* Strip immediate from first add. */
20097 first_insn
= read_code32 (abfd
, addr
+ plt_size
) & 0xffffff00;
20099 #ifdef FOUR_WORD_PLT
20100 if (first_insn
== elf32_arm_plt_entry
[0])
20101 plt_size
+= 4 * ARRAY_SIZE (elf32_arm_plt_entry
);
20103 if (first_insn
== elf32_arm_plt_entry_long
[0])
20104 plt_size
+= 4 * ARRAY_SIZE (elf32_arm_plt_entry_long
);
20105 else if (first_insn
== elf32_arm_plt_entry_short
[0])
20106 plt_size
+= 4 * ARRAY_SIZE (elf32_arm_plt_entry_short
);
20109 /* We don't yet handle this PLT format. */
20110 return (bfd_vma
) -1;
20115 /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */
20118 elf32_arm_get_synthetic_symtab (bfd
*abfd
,
20119 long symcount ATTRIBUTE_UNUSED
,
20120 asymbol
**syms ATTRIBUTE_UNUSED
,
20130 Elf_Internal_Shdr
*hdr
;
20138 if ((abfd
->flags
& (DYNAMIC
| EXEC_P
)) == 0)
20141 if (dynsymcount
<= 0)
20144 relplt
= bfd_get_section_by_name (abfd
, ".rel.plt");
20145 if (relplt
== NULL
)
20148 hdr
= &elf_section_data (relplt
)->this_hdr
;
20149 if (hdr
->sh_link
!= elf_dynsymtab (abfd
)
20150 || (hdr
->sh_type
!= SHT_REL
&& hdr
->sh_type
!= SHT_RELA
))
20153 plt
= bfd_get_section_by_name (abfd
, ".plt");
20157 if (!elf32_arm_size_info
.slurp_reloc_table (abfd
, relplt
, dynsyms
, TRUE
))
20160 data
= plt
->contents
;
20163 if (!bfd_get_full_section_contents(abfd
, (asection
*) plt
, &data
) || data
== NULL
)
20165 bfd_cache_section_contents((asection
*) plt
, data
);
20168 count
= relplt
->size
/ hdr
->sh_entsize
;
20169 size
= count
* sizeof (asymbol
);
20170 p
= relplt
->relocation
;
20171 for (i
= 0; i
< count
; i
++, p
+= elf32_arm_size_info
.int_rels_per_ext_rel
)
20173 size
+= strlen ((*p
->sym_ptr_ptr
)->name
) + sizeof ("@plt");
20174 if (p
->addend
!= 0)
20175 size
+= sizeof ("+0x") - 1 + 8;
20178 s
= *ret
= (asymbol
*) bfd_malloc (size
);
20182 offset
= elf32_arm_plt0_size (abfd
, data
);
20183 if (offset
== (bfd_vma
) -1)
20186 names
= (char *) (s
+ count
);
20187 p
= relplt
->relocation
;
20189 for (i
= 0; i
< count
; i
++, p
+= elf32_arm_size_info
.int_rels_per_ext_rel
)
20193 bfd_vma plt_size
= elf32_arm_plt_size (abfd
, data
, offset
);
20194 if (plt_size
== (bfd_vma
) -1)
20197 *s
= **p
->sym_ptr_ptr
;
20198 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
20199 we are defining a symbol, ensure one of them is set. */
20200 if ((s
->flags
& BSF_LOCAL
) == 0)
20201 s
->flags
|= BSF_GLOBAL
;
20202 s
->flags
|= BSF_SYNTHETIC
;
20207 len
= strlen ((*p
->sym_ptr_ptr
)->name
);
20208 memcpy (names
, (*p
->sym_ptr_ptr
)->name
, len
);
20210 if (p
->addend
!= 0)
20214 memcpy (names
, "+0x", sizeof ("+0x") - 1);
20215 names
+= sizeof ("+0x") - 1;
20216 bfd_sprintf_vma (abfd
, buf
, p
->addend
);
20217 for (a
= buf
; *a
== '0'; ++a
)
20220 memcpy (names
, a
, len
);
20223 memcpy (names
, "@plt", sizeof ("@plt"));
20224 names
+= sizeof ("@plt");
20226 offset
+= plt_size
;
20233 elf32_arm_section_flags (const Elf_Internal_Shdr
*hdr
)
20235 if (hdr
->sh_flags
& SHF_ARM_PURECODE
)
20236 hdr
->bfd_section
->flags
|= SEC_ELF_PURECODE
;
20241 elf32_arm_lookup_section_flags (char *flag_name
)
20243 if (!strcmp (flag_name
, "SHF_ARM_PURECODE"))
20244 return SHF_ARM_PURECODE
;
20246 return SEC_NO_FLAGS
;
20249 static unsigned int
20250 elf32_arm_count_additional_relocs (asection
*sec
)
20252 struct _arm_elf_section_data
*arm_data
;
20253 arm_data
= get_arm_elf_section_data (sec
);
20255 return arm_data
== NULL
? 0 : arm_data
->additional_reloc_count
;
20258 /* Called to set the sh_flags, sh_link and sh_info fields of OSECTION which
20259 has a type >= SHT_LOOS. Returns TRUE if these fields were initialised
20260 FALSE otherwise. ISECTION is the best guess matching section from the
20261 input bfd IBFD, but it might be NULL. */
20264 elf32_arm_copy_special_section_fields (const bfd
*ibfd ATTRIBUTE_UNUSED
,
20265 bfd
*obfd ATTRIBUTE_UNUSED
,
20266 const Elf_Internal_Shdr
*isection ATTRIBUTE_UNUSED
,
20267 Elf_Internal_Shdr
*osection
)
20269 switch (osection
->sh_type
)
20271 case SHT_ARM_EXIDX
:
20273 Elf_Internal_Shdr
**oheaders
= elf_elfsections (obfd
);
20274 Elf_Internal_Shdr
**iheaders
= elf_elfsections (ibfd
);
20277 osection
->sh_flags
= SHF_ALLOC
| SHF_LINK_ORDER
;
20278 osection
->sh_info
= 0;
20280 /* The sh_link field must be set to the text section associated with
20281 this index section. Unfortunately the ARM EHABI does not specify
20282 exactly how to determine this association. Our caller does try
20283 to match up OSECTION with its corresponding input section however
20284 so that is a good first guess. */
20285 if (isection
!= NULL
20286 && osection
->bfd_section
!= NULL
20287 && isection
->bfd_section
!= NULL
20288 && isection
->bfd_section
->output_section
!= NULL
20289 && isection
->bfd_section
->output_section
== osection
->bfd_section
20290 && iheaders
!= NULL
20291 && isection
->sh_link
> 0
20292 && isection
->sh_link
< elf_numsections (ibfd
)
20293 && iheaders
[isection
->sh_link
]->bfd_section
!= NULL
20294 && iheaders
[isection
->sh_link
]->bfd_section
->output_section
!= NULL
20297 for (i
= elf_numsections (obfd
); i
-- > 0;)
20298 if (oheaders
[i
]->bfd_section
20299 == iheaders
[isection
->sh_link
]->bfd_section
->output_section
)
20305 /* Failing that we have to find a matching section ourselves. If
20306 we had the output section name available we could compare that
20307 with input section names. Unfortunately we don't. So instead
20308 we use a simple heuristic and look for the nearest executable
20309 section before this one. */
20310 for (i
= elf_numsections (obfd
); i
-- > 0;)
20311 if (oheaders
[i
] == osection
)
20317 if (oheaders
[i
]->sh_type
== SHT_PROGBITS
20318 && (oheaders
[i
]->sh_flags
& (SHF_ALLOC
| SHF_EXECINSTR
))
20319 == (SHF_ALLOC
| SHF_EXECINSTR
))
20325 osection
->sh_link
= i
;
20326 /* If the text section was part of a group
20327 then the index section should be too. */
20328 if (oheaders
[i
]->sh_flags
& SHF_GROUP
)
20329 osection
->sh_flags
|= SHF_GROUP
;
20335 case SHT_ARM_PREEMPTMAP
:
20336 osection
->sh_flags
= SHF_ALLOC
;
20339 case SHT_ARM_ATTRIBUTES
:
20340 case SHT_ARM_DEBUGOVERLAY
:
20341 case SHT_ARM_OVERLAYSECTION
:
20349 /* Returns TRUE if NAME is an ARM mapping symbol.
20350 Traditionally the symbols $a, $d and $t have been used.
20351 The ARM ELF standard also defines $x (for A64 code). It also allows a
20352 period initiated suffix to be added to the symbol: "$[adtx]\.[:sym_char]+".
20353 Other tools might also produce $b (Thumb BL), $f, $p, $m and $v, but we do
20354 not support them here. $t.x indicates the start of ThumbEE instructions. */
20357 is_arm_mapping_symbol (const char * name
)
20359 return name
!= NULL
/* Paranoia. */
20360 && name
[0] == '$' /* Note: if objcopy --prefix-symbols has been used then
20361 the mapping symbols could have acquired a prefix.
20362 We do not support this here, since such symbols no
20363 longer conform to the ARM ELF ABI. */
20364 && (name
[1] == 'a' || name
[1] == 'd' || name
[1] == 't' || name
[1] == 'x')
20365 && (name
[2] == 0 || name
[2] == '.');
20366 /* FIXME: Strictly speaking the symbol is only a valid mapping symbol if
20367 any characters that follow the period are legal characters for the body
20368 of a symbol's name. For now we just assume that this is the case. */
20371 /* Make sure that mapping symbols in object files are not removed via the
20372 "strip --strip-unneeded" tool. These symbols are needed in order to
20373 correctly generate interworking veneers, and for byte swapping code
20374 regions. Once an object file has been linked, it is safe to remove the
20375 symbols as they will no longer be needed. */
20378 elf32_arm_backend_symbol_processing (bfd
*abfd
, asymbol
*sym
)
20380 if (((abfd
->flags
& (EXEC_P
| DYNAMIC
)) == 0)
20381 && sym
->section
!= bfd_abs_section_ptr
20382 && is_arm_mapping_symbol (sym
->name
))
20383 sym
->flags
|= BSF_KEEP
;
20386 #undef elf_backend_copy_special_section_fields
20387 #define elf_backend_copy_special_section_fields elf32_arm_copy_special_section_fields
20389 #define ELF_ARCH bfd_arch_arm
20390 #define ELF_TARGET_ID ARM_ELF_DATA
20391 #define ELF_MACHINE_CODE EM_ARM
20392 #ifdef __QNXTARGET__
20393 #define ELF_MAXPAGESIZE 0x1000
20395 #define ELF_MAXPAGESIZE 0x10000
20397 #define ELF_MINPAGESIZE 0x1000
20398 #define ELF_COMMONPAGESIZE 0x1000
20400 #define bfd_elf32_mkobject elf32_arm_mkobject
20402 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
20403 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
20404 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
20405 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
20406 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
20407 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
20408 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
20409 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
20410 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
20411 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
20412 #define bfd_elf32_bfd_final_link elf32_arm_final_link
20413 #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab
20415 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
20416 #define elf_backend_maybe_function_sym elf32_arm_maybe_function_sym
20417 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
20418 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
20419 #define elf_backend_check_relocs elf32_arm_check_relocs
20420 #define elf_backend_update_relocs elf32_arm_update_relocs
20421 #define elf_backend_relocate_section elf32_arm_relocate_section
20422 #define elf_backend_write_section elf32_arm_write_section
20423 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
20424 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
20425 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
20426 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
20427 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
20428 #define elf_backend_always_size_sections elf32_arm_always_size_sections
20429 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
20430 #define elf_backend_init_file_header elf32_arm_init_file_header
20431 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
20432 #define elf_backend_object_p elf32_arm_object_p
20433 #define elf_backend_fake_sections elf32_arm_fake_sections
20434 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
20435 #define elf_backend_final_write_processing elf32_arm_final_write_processing
20436 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
20437 #define elf_backend_size_info elf32_arm_size_info
20438 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
20439 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
20440 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
20441 #define elf_backend_filter_implib_symbols elf32_arm_filter_implib_symbols
20442 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
20443 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
20444 #define elf_backend_count_additional_relocs elf32_arm_count_additional_relocs
20445 #define elf_backend_symbol_processing elf32_arm_backend_symbol_processing
20447 #define elf_backend_can_refcount 1
20448 #define elf_backend_can_gc_sections 1
20449 #define elf_backend_plt_readonly 1
20450 #define elf_backend_want_got_plt 1
20451 #define elf_backend_want_plt_sym 0
20452 #define elf_backend_want_dynrelro 1
20453 #define elf_backend_may_use_rel_p 1
20454 #define elf_backend_may_use_rela_p 0
20455 #define elf_backend_default_use_rela_p 0
20456 #define elf_backend_dtrel_excludes_plt 1
20458 #define elf_backend_got_header_size 12
20459 #define elf_backend_extern_protected_data 1
20461 #undef elf_backend_obj_attrs_vendor
20462 #define elf_backend_obj_attrs_vendor "aeabi"
20463 #undef elf_backend_obj_attrs_section
20464 #define elf_backend_obj_attrs_section ".ARM.attributes"
20465 #undef elf_backend_obj_attrs_arg_type
20466 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
20467 #undef elf_backend_obj_attrs_section_type
20468 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
20469 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
20470 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
20472 #undef elf_backend_section_flags
20473 #define elf_backend_section_flags elf32_arm_section_flags
20474 #undef elf_backend_lookup_section_flags_hook
20475 #define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags
20477 #define elf_backend_linux_prpsinfo32_ugid16 TRUE
20479 #include "elf32-target.h"
20481 /* Native Client targets. */
20483 #undef TARGET_LITTLE_SYM
20484 #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec
20485 #undef TARGET_LITTLE_NAME
20486 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
20487 #undef TARGET_BIG_SYM
20488 #define TARGET_BIG_SYM arm_elf32_nacl_be_vec
20489 #undef TARGET_BIG_NAME
20490 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
20492 /* Like elf32_arm_link_hash_table_create -- but overrides
20493 appropriately for NaCl. */
20495 static struct bfd_link_hash_table
*
20496 elf32_arm_nacl_link_hash_table_create (bfd
*abfd
)
20498 struct bfd_link_hash_table
*ret
;
20500 ret
= elf32_arm_link_hash_table_create (abfd
);
20503 struct elf32_arm_link_hash_table
*htab
20504 = (struct elf32_arm_link_hash_table
*) ret
;
20508 htab
->plt_header_size
= 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry
);
20509 htab
->plt_entry_size
= 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry
);
20514 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
20515 really need to use elf32_arm_modify_segment_map. But we do it
20516 anyway just to reduce gratuitous differences with the stock ARM backend. */
20519 elf32_arm_nacl_modify_segment_map (bfd
*abfd
, struct bfd_link_info
*info
)
20521 return (elf32_arm_modify_segment_map (abfd
, info
)
20522 && nacl_modify_segment_map (abfd
, info
));
20526 elf32_arm_nacl_final_write_processing (bfd
*abfd
)
20528 arm_final_write_processing (abfd
);
20529 return nacl_final_write_processing (abfd
);
20533 elf32_arm_nacl_plt_sym_val (bfd_vma i
, const asection
*plt
,
20534 const arelent
*rel ATTRIBUTE_UNUSED
)
20537 + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry
) +
20538 i
* ARRAY_SIZE (elf32_arm_nacl_plt_entry
));
20542 #define elf32_bed elf32_arm_nacl_bed
20543 #undef bfd_elf32_bfd_link_hash_table_create
20544 #define bfd_elf32_bfd_link_hash_table_create \
20545 elf32_arm_nacl_link_hash_table_create
20546 #undef elf_backend_plt_alignment
20547 #define elf_backend_plt_alignment 4
20548 #undef elf_backend_modify_segment_map
20549 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
20550 #undef elf_backend_modify_headers
20551 #define elf_backend_modify_headers nacl_modify_headers
20552 #undef elf_backend_final_write_processing
20553 #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
20554 #undef bfd_elf32_get_synthetic_symtab
20555 #undef elf_backend_plt_sym_val
20556 #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
20557 #undef elf_backend_copy_special_section_fields
20559 #undef ELF_MINPAGESIZE
20560 #undef ELF_COMMONPAGESIZE
20563 #include "elf32-target.h"
20565 /* Reset to defaults. */
20566 #undef elf_backend_plt_alignment
20567 #undef elf_backend_modify_segment_map
20568 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
20569 #undef elf_backend_modify_headers
20570 #undef elf_backend_final_write_processing
20571 #define elf_backend_final_write_processing elf32_arm_final_write_processing
20572 #undef ELF_MINPAGESIZE
20573 #define ELF_MINPAGESIZE 0x1000
20574 #undef ELF_COMMONPAGESIZE
20575 #define ELF_COMMONPAGESIZE 0x1000
20578 /* FDPIC Targets. */
20580 #undef TARGET_LITTLE_SYM
20581 #define TARGET_LITTLE_SYM arm_elf32_fdpic_le_vec
20582 #undef TARGET_LITTLE_NAME
20583 #define TARGET_LITTLE_NAME "elf32-littlearm-fdpic"
20584 #undef TARGET_BIG_SYM
20585 #define TARGET_BIG_SYM arm_elf32_fdpic_be_vec
20586 #undef TARGET_BIG_NAME
20587 #define TARGET_BIG_NAME "elf32-bigarm-fdpic"
20588 #undef elf_match_priority
20589 #define elf_match_priority 128
20591 #define ELF_OSABI ELFOSABI_ARM_FDPIC
20593 /* Like elf32_arm_link_hash_table_create -- but overrides
20594 appropriately for FDPIC. */
20596 static struct bfd_link_hash_table
*
20597 elf32_arm_fdpic_link_hash_table_create (bfd
*abfd
)
20599 struct bfd_link_hash_table
*ret
;
20601 ret
= elf32_arm_link_hash_table_create (abfd
);
20604 struct elf32_arm_link_hash_table
*htab
= (struct elf32_arm_link_hash_table
*) ret
;
20611 /* We need dynamic symbols for every section, since segments can
20612 relocate independently. */
20614 elf32_arm_fdpic_omit_section_dynsym (bfd
*output_bfd ATTRIBUTE_UNUSED
,
20615 struct bfd_link_info
*info
20617 asection
*p ATTRIBUTE_UNUSED
)
20619 switch (elf_section_data (p
)->this_hdr
.sh_type
)
20623 /* If sh_type is yet undecided, assume it could be
20624 SHT_PROGBITS/SHT_NOBITS. */
20628 /* There shouldn't be section relative relocations
20629 against any other section. */
20636 #define elf32_bed elf32_arm_fdpic_bed
20638 #undef bfd_elf32_bfd_link_hash_table_create
20639 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_fdpic_link_hash_table_create
20641 #undef elf_backend_omit_section_dynsym
20642 #define elf_backend_omit_section_dynsym elf32_arm_fdpic_omit_section_dynsym
20644 #include "elf32-target.h"
20646 #undef elf_match_priority
20648 #undef elf_backend_omit_section_dynsym
20650 /* VxWorks Targets. */
20652 #undef TARGET_LITTLE_SYM
20653 #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec
20654 #undef TARGET_LITTLE_NAME
20655 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
20656 #undef TARGET_BIG_SYM
20657 #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec
20658 #undef TARGET_BIG_NAME
20659 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
20661 /* Like elf32_arm_link_hash_table_create -- but overrides
20662 appropriately for VxWorks. */
20664 static struct bfd_link_hash_table
*
20665 elf32_arm_vxworks_link_hash_table_create (bfd
*abfd
)
20667 struct bfd_link_hash_table
*ret
;
20669 ret
= elf32_arm_link_hash_table_create (abfd
);
20672 struct elf32_arm_link_hash_table
*htab
20673 = (struct elf32_arm_link_hash_table
*) ret
;
20675 htab
->vxworks_p
= 1;
20681 elf32_arm_vxworks_final_write_processing (bfd
*abfd
)
20683 arm_final_write_processing (abfd
);
20684 return elf_vxworks_final_write_processing (abfd
);
20688 #define elf32_bed elf32_arm_vxworks_bed
20690 #undef bfd_elf32_bfd_link_hash_table_create
20691 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
20692 #undef elf_backend_final_write_processing
20693 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
20694 #undef elf_backend_emit_relocs
20695 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
20697 #undef elf_backend_may_use_rel_p
20698 #define elf_backend_may_use_rel_p 0
20699 #undef elf_backend_may_use_rela_p
20700 #define elf_backend_may_use_rela_p 1
20701 #undef elf_backend_default_use_rela_p
20702 #define elf_backend_default_use_rela_p 1
20703 #undef elf_backend_want_plt_sym
20704 #define elf_backend_want_plt_sym 1
20705 #undef ELF_MAXPAGESIZE
20706 #define ELF_MAXPAGESIZE 0x1000
20708 #include "elf32-target.h"
20711 /* Merge backend specific data from an object file to the output
20712 object file when linking. */
20715 elf32_arm_merge_private_bfd_data (bfd
*ibfd
, struct bfd_link_info
*info
)
20717 bfd
*obfd
= info
->output_bfd
;
20718 flagword out_flags
;
20720 bfd_boolean flags_compatible
= TRUE
;
20723 /* Check if we have the same endianness. */
20724 if (! _bfd_generic_verify_endian_match (ibfd
, info
))
20727 if (! is_arm_elf (ibfd
) || ! is_arm_elf (obfd
))
20730 if (!elf32_arm_merge_eabi_attributes (ibfd
, info
))
20733 /* The input BFD must have had its flags initialised. */
20734 /* The following seems bogus to me -- The flags are initialized in
20735 the assembler but I don't think an elf_flags_init field is
20736 written into the object. */
20737 /* BFD_ASSERT (elf_flags_init (ibfd)); */
20739 in_flags
= elf_elfheader (ibfd
)->e_flags
;
20740 out_flags
= elf_elfheader (obfd
)->e_flags
;
20742 /* In theory there is no reason why we couldn't handle this. However
20743 in practice it isn't even close to working and there is no real
20744 reason to want it. */
20745 if (EF_ARM_EABI_VERSION (in_flags
) >= EF_ARM_EABI_VER4
20746 && !(ibfd
->flags
& DYNAMIC
)
20747 && (in_flags
& EF_ARM_BE8
))
20749 _bfd_error_handler (_("error: %pB is already in final BE8 format"),
20754 if (!elf_flags_init (obfd
))
20756 /* If the input is the default architecture and had the default
20757 flags then do not bother setting the flags for the output
20758 architecture, instead allow future merges to do this. If no
20759 future merges ever set these flags then they will retain their
20760 uninitialised values, which surprise surprise, correspond
20761 to the default values. */
20762 if (bfd_get_arch_info (ibfd
)->the_default
20763 && elf_elfheader (ibfd
)->e_flags
== 0)
20766 elf_flags_init (obfd
) = TRUE
;
20767 elf_elfheader (obfd
)->e_flags
= in_flags
;
20769 if (bfd_get_arch (obfd
) == bfd_get_arch (ibfd
)
20770 && bfd_get_arch_info (obfd
)->the_default
)
20771 return bfd_set_arch_mach (obfd
, bfd_get_arch (ibfd
), bfd_get_mach (ibfd
));
20776 /* Determine what should happen if the input ARM architecture
20777 does not match the output ARM architecture. */
20778 if (! bfd_arm_merge_machines (ibfd
, obfd
))
20781 /* Identical flags must be compatible. */
20782 if (in_flags
== out_flags
)
20785 /* Check to see if the input BFD actually contains any sections. If
20786 not, its flags may not have been initialised either, but it
20787 cannot actually cause any incompatiblity. Do not short-circuit
20788 dynamic objects; their section list may be emptied by
20789 elf_link_add_object_symbols.
20791 Also check to see if there are no code sections in the input.
20792 In this case there is no need to check for code specific flags.
20793 XXX - do we need to worry about floating-point format compatability
20794 in data sections ? */
20795 if (!(ibfd
->flags
& DYNAMIC
))
20797 bfd_boolean null_input_bfd
= TRUE
;
20798 bfd_boolean only_data_sections
= TRUE
;
20800 for (sec
= ibfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
20802 /* Ignore synthetic glue sections. */
20803 if (strcmp (sec
->name
, ".glue_7")
20804 && strcmp (sec
->name
, ".glue_7t"))
20806 if ((bfd_section_flags (sec
)
20807 & (SEC_LOAD
| SEC_CODE
| SEC_HAS_CONTENTS
))
20808 == (SEC_LOAD
| SEC_CODE
| SEC_HAS_CONTENTS
))
20809 only_data_sections
= FALSE
;
20811 null_input_bfd
= FALSE
;
20816 if (null_input_bfd
|| only_data_sections
)
20820 /* Complain about various flag mismatches. */
20821 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags
),
20822 EF_ARM_EABI_VERSION (out_flags
)))
20825 (_("error: source object %pB has EABI version %d, but target %pB has EABI version %d"),
20826 ibfd
, (in_flags
& EF_ARM_EABIMASK
) >> 24,
20827 obfd
, (out_flags
& EF_ARM_EABIMASK
) >> 24);
20831 /* Not sure what needs to be checked for EABI versions >= 1. */
20832 /* VxWorks libraries do not use these flags. */
20833 if (get_elf_backend_data (obfd
) != &elf32_arm_vxworks_bed
20834 && get_elf_backend_data (ibfd
) != &elf32_arm_vxworks_bed
20835 && EF_ARM_EABI_VERSION (in_flags
) == EF_ARM_EABI_UNKNOWN
)
20837 if ((in_flags
& EF_ARM_APCS_26
) != (out_flags
& EF_ARM_APCS_26
))
20840 (_("error: %pB is compiled for APCS-%d, whereas target %pB uses APCS-%d"),
20841 ibfd
, in_flags
& EF_ARM_APCS_26
? 26 : 32,
20842 obfd
, out_flags
& EF_ARM_APCS_26
? 26 : 32);
20843 flags_compatible
= FALSE
;
20846 if ((in_flags
& EF_ARM_APCS_FLOAT
) != (out_flags
& EF_ARM_APCS_FLOAT
))
20848 if (in_flags
& EF_ARM_APCS_FLOAT
)
20850 (_("error: %pB passes floats in float registers, whereas %pB passes them in integer registers"),
20854 (_("error: %pB passes floats in integer registers, whereas %pB passes them in float registers"),
20857 flags_compatible
= FALSE
;
20860 if ((in_flags
& EF_ARM_VFP_FLOAT
) != (out_flags
& EF_ARM_VFP_FLOAT
))
20862 if (in_flags
& EF_ARM_VFP_FLOAT
)
20864 (_("error: %pB uses %s instructions, whereas %pB does not"),
20865 ibfd
, "VFP", obfd
);
20868 (_("error: %pB uses %s instructions, whereas %pB does not"),
20869 ibfd
, "FPA", obfd
);
20871 flags_compatible
= FALSE
;
20874 if ((in_flags
& EF_ARM_MAVERICK_FLOAT
) != (out_flags
& EF_ARM_MAVERICK_FLOAT
))
20876 if (in_flags
& EF_ARM_MAVERICK_FLOAT
)
20878 (_("error: %pB uses %s instructions, whereas %pB does not"),
20879 ibfd
, "Maverick", obfd
);
20882 (_("error: %pB does not use %s instructions, whereas %pB does"),
20883 ibfd
, "Maverick", obfd
);
20885 flags_compatible
= FALSE
;
20888 #ifdef EF_ARM_SOFT_FLOAT
20889 if ((in_flags
& EF_ARM_SOFT_FLOAT
) != (out_flags
& EF_ARM_SOFT_FLOAT
))
20891 /* We can allow interworking between code that is VFP format
20892 layout, and uses either soft float or integer regs for
20893 passing floating point arguments and results. We already
20894 know that the APCS_FLOAT flags match; similarly for VFP
20896 if ((in_flags
& EF_ARM_APCS_FLOAT
) != 0
20897 || (in_flags
& EF_ARM_VFP_FLOAT
) == 0)
20899 if (in_flags
& EF_ARM_SOFT_FLOAT
)
20901 (_("error: %pB uses software FP, whereas %pB uses hardware FP"),
20905 (_("error: %pB uses hardware FP, whereas %pB uses software FP"),
20908 flags_compatible
= FALSE
;
20913 /* Interworking mismatch is only a warning. */
20914 if ((in_flags
& EF_ARM_INTERWORK
) != (out_flags
& EF_ARM_INTERWORK
))
20916 if (in_flags
& EF_ARM_INTERWORK
)
20919 (_("warning: %pB supports interworking, whereas %pB does not"),
20925 (_("warning: %pB does not support interworking, whereas %pB does"),
20931 return flags_compatible
;
20935 /* Symbian OS Targets. */
20937 #undef TARGET_LITTLE_SYM
20938 #define TARGET_LITTLE_SYM arm_elf32_symbian_le_vec
20939 #undef TARGET_LITTLE_NAME
20940 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
20941 #undef TARGET_BIG_SYM
20942 #define TARGET_BIG_SYM arm_elf32_symbian_be_vec
20943 #undef TARGET_BIG_NAME
20944 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
20946 /* Like elf32_arm_link_hash_table_create -- but overrides
20947 appropriately for Symbian OS. */
20949 static struct bfd_link_hash_table
*
20950 elf32_arm_symbian_link_hash_table_create (bfd
*abfd
)
20952 struct bfd_link_hash_table
*ret
;
20954 ret
= elf32_arm_link_hash_table_create (abfd
);
20957 struct elf32_arm_link_hash_table
*htab
20958 = (struct elf32_arm_link_hash_table
*)ret
;
20959 /* There is no PLT header for Symbian OS. */
20960 htab
->plt_header_size
= 0;
20961 /* The PLT entries are each one instruction and one word. */
20962 htab
->plt_entry_size
= 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry
);
20963 htab
->symbian_p
= 1;
20964 /* Symbian uses armv5t or above, so use_blx is always true. */
20966 htab
->root
.is_relocatable_executable
= 1;
20971 static const struct bfd_elf_special_section
20972 elf32_arm_symbian_special_sections
[] =
20974 /* In a BPABI executable, the dynamic linking sections do not go in
20975 the loadable read-only segment. The post-linker may wish to
20976 refer to these sections, but they are not part of the final
20978 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC
, 0 },
20979 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB
, 0 },
20980 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM
, 0 },
20981 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS
, 0 },
20982 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH
, 0 },
20983 /* These sections do not need to be writable as the SymbianOS
20984 postlinker will arrange things so that no dynamic relocation is
20986 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY
, SHF_ALLOC
},
20987 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY
, SHF_ALLOC
},
20988 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY
, SHF_ALLOC
},
20989 { NULL
, 0, 0, 0, 0 }
20993 elf32_arm_symbian_begin_write_processing (bfd
*abfd
,
20994 struct bfd_link_info
*link_info
)
20996 /* BPABI objects are never loaded directly by an OS kernel; they are
20997 processed by a postlinker first, into an OS-specific format. If
20998 the D_PAGED bit is set on the file, BFD will align segments on
20999 page boundaries, so that an OS can directly map the file. With
21000 BPABI objects, that just results in wasted space. In addition,
21001 because we clear the D_PAGED bit, map_sections_to_segments will
21002 recognize that the program headers should not be mapped into any
21003 loadable segment. */
21004 abfd
->flags
&= ~D_PAGED
;
21005 elf32_arm_begin_write_processing (abfd
, link_info
);
21009 elf32_arm_symbian_modify_segment_map (bfd
*abfd
,
21010 struct bfd_link_info
*info
)
21012 struct elf_segment_map
*m
;
21015 /* BPABI shared libraries and executables should have a PT_DYNAMIC
21016 segment. However, because the .dynamic section is not marked
21017 with SEC_LOAD, the generic ELF code will not create such a
21019 dynsec
= bfd_get_section_by_name (abfd
, ".dynamic");
21022 for (m
= elf_seg_map (abfd
); m
!= NULL
; m
= m
->next
)
21023 if (m
->p_type
== PT_DYNAMIC
)
21028 m
= _bfd_elf_make_dynamic_segment (abfd
, dynsec
);
21029 m
->next
= elf_seg_map (abfd
);
21030 elf_seg_map (abfd
) = m
;
21034 /* Also call the generic arm routine. */
21035 return elf32_arm_modify_segment_map (abfd
, info
);
21038 /* Return address for Ith PLT stub in section PLT, for relocation REL
21039 or (bfd_vma) -1 if it should not be included. */
21042 elf32_arm_symbian_plt_sym_val (bfd_vma i
, const asection
*plt
,
21043 const arelent
*rel ATTRIBUTE_UNUSED
)
21045 return plt
->vma
+ 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry
) * i
;
21049 #define elf32_bed elf32_arm_symbian_bed
21051 /* The dynamic sections are not allocated on SymbianOS; the postlinker
21052 will process them and then discard them. */
21053 #undef ELF_DYNAMIC_SEC_FLAGS
21054 #define ELF_DYNAMIC_SEC_FLAGS \
21055 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
21057 #undef elf_backend_emit_relocs
21059 #undef bfd_elf32_bfd_link_hash_table_create
21060 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
21061 #undef elf_backend_special_sections
21062 #define elf_backend_special_sections elf32_arm_symbian_special_sections
21063 #undef elf_backend_begin_write_processing
21064 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
21065 #undef elf_backend_final_write_processing
21066 #define elf_backend_final_write_processing elf32_arm_final_write_processing
21068 #undef elf_backend_modify_segment_map
21069 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
21071 /* There is no .got section for BPABI objects, and hence no header. */
21072 #undef elf_backend_got_header_size
21073 #define elf_backend_got_header_size 0
21075 /* Similarly, there is no .got.plt section. */
21076 #undef elf_backend_want_got_plt
21077 #define elf_backend_want_got_plt 0
21079 #undef elf_backend_plt_sym_val
21080 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
21082 #undef elf_backend_may_use_rel_p
21083 #define elf_backend_may_use_rel_p 1
21084 #undef elf_backend_may_use_rela_p
21085 #define elf_backend_may_use_rela_p 0
21086 #undef elf_backend_default_use_rela_p
21087 #define elf_backend_default_use_rela_p 0
21088 #undef elf_backend_want_plt_sym
21089 #define elf_backend_want_plt_sym 0
21090 #undef elf_backend_dtrel_excludes_plt
21091 #define elf_backend_dtrel_excludes_plt 0
21092 #undef ELF_MAXPAGESIZE
21093 #define ELF_MAXPAGESIZE 0x8000
21095 #include "elf32-target.h"