1 /* 32-bit ELF support for ARM
2 Copyright (C) 1998-2019 Free Software Foundation, Inc.
4 This file is part of BFD, the Binary File Descriptor library.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
25 #include "libiberty.h"
29 #include "elf-vxworks.h"
32 /* Return the relocation section associated with NAME. HTAB is the
33 bfd's elf32_arm_link_hash_entry. */
34 #define RELOC_SECTION(HTAB, NAME) \
35 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
37 /* Return size of a relocation entry. HTAB is the bfd's
38 elf32_arm_link_hash_entry. */
39 #define RELOC_SIZE(HTAB) \
41 ? sizeof (Elf32_External_Rel) \
42 : sizeof (Elf32_External_Rela))
44 /* Return function to swap relocations in. HTAB is the bfd's
45 elf32_arm_link_hash_entry. */
46 #define SWAP_RELOC_IN(HTAB) \
48 ? bfd_elf32_swap_reloc_in \
49 : bfd_elf32_swap_reloca_in)
51 /* Return function to swap relocations out. HTAB is the bfd's
52 elf32_arm_link_hash_entry. */
53 #define SWAP_RELOC_OUT(HTAB) \
55 ? bfd_elf32_swap_reloc_out \
56 : bfd_elf32_swap_reloca_out)
58 #define elf_info_to_howto NULL
59 #define elf_info_to_howto_rel elf32_arm_info_to_howto
61 #define ARM_ELF_ABI_VERSION 0
62 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
64 /* The Adjusted Place, as defined by AAELF. */
65 #define Pa(X) ((X) & 0xfffffffc)
67 static bfd_boolean
elf32_arm_write_section (bfd
*output_bfd
,
68 struct bfd_link_info
*link_info
,
72 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
73 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
76 static reloc_howto_type elf32_arm_howto_table_1
[] =
79 HOWTO (R_ARM_NONE
, /* type */
81 3, /* size (0 = byte, 1 = short, 2 = long) */
83 FALSE
, /* pc_relative */
85 complain_overflow_dont
,/* complain_on_overflow */
86 bfd_elf_generic_reloc
, /* special_function */
87 "R_ARM_NONE", /* name */
88 FALSE
, /* partial_inplace */
91 FALSE
), /* pcrel_offset */
93 HOWTO (R_ARM_PC24
, /* type */
95 2, /* size (0 = byte, 1 = short, 2 = long) */
97 TRUE
, /* pc_relative */
99 complain_overflow_signed
,/* complain_on_overflow */
100 bfd_elf_generic_reloc
, /* special_function */
101 "R_ARM_PC24", /* name */
102 FALSE
, /* partial_inplace */
103 0x00ffffff, /* src_mask */
104 0x00ffffff, /* dst_mask */
105 TRUE
), /* pcrel_offset */
107 /* 32 bit absolute */
108 HOWTO (R_ARM_ABS32
, /* type */
110 2, /* size (0 = byte, 1 = short, 2 = long) */
112 FALSE
, /* pc_relative */
114 complain_overflow_bitfield
,/* complain_on_overflow */
115 bfd_elf_generic_reloc
, /* special_function */
116 "R_ARM_ABS32", /* name */
117 FALSE
, /* partial_inplace */
118 0xffffffff, /* src_mask */
119 0xffffffff, /* dst_mask */
120 FALSE
), /* pcrel_offset */
122 /* standard 32bit pc-relative reloc */
123 HOWTO (R_ARM_REL32
, /* type */
125 2, /* size (0 = byte, 1 = short, 2 = long) */
127 TRUE
, /* pc_relative */
129 complain_overflow_bitfield
,/* complain_on_overflow */
130 bfd_elf_generic_reloc
, /* special_function */
131 "R_ARM_REL32", /* name */
132 FALSE
, /* partial_inplace */
133 0xffffffff, /* src_mask */
134 0xffffffff, /* dst_mask */
135 TRUE
), /* pcrel_offset */
137 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
138 HOWTO (R_ARM_LDR_PC_G0
, /* type */
140 0, /* size (0 = byte, 1 = short, 2 = long) */
142 TRUE
, /* pc_relative */
144 complain_overflow_dont
,/* complain_on_overflow */
145 bfd_elf_generic_reloc
, /* special_function */
146 "R_ARM_LDR_PC_G0", /* name */
147 FALSE
, /* partial_inplace */
148 0xffffffff, /* src_mask */
149 0xffffffff, /* dst_mask */
150 TRUE
), /* pcrel_offset */
152 /* 16 bit absolute */
153 HOWTO (R_ARM_ABS16
, /* type */
155 1, /* size (0 = byte, 1 = short, 2 = long) */
157 FALSE
, /* pc_relative */
159 complain_overflow_bitfield
,/* complain_on_overflow */
160 bfd_elf_generic_reloc
, /* special_function */
161 "R_ARM_ABS16", /* name */
162 FALSE
, /* partial_inplace */
163 0x0000ffff, /* src_mask */
164 0x0000ffff, /* dst_mask */
165 FALSE
), /* pcrel_offset */
167 /* 12 bit absolute */
168 HOWTO (R_ARM_ABS12
, /* type */
170 2, /* size (0 = byte, 1 = short, 2 = long) */
172 FALSE
, /* pc_relative */
174 complain_overflow_bitfield
,/* complain_on_overflow */
175 bfd_elf_generic_reloc
, /* special_function */
176 "R_ARM_ABS12", /* name */
177 FALSE
, /* partial_inplace */
178 0x00000fff, /* src_mask */
179 0x00000fff, /* dst_mask */
180 FALSE
), /* pcrel_offset */
182 HOWTO (R_ARM_THM_ABS5
, /* type */
184 1, /* size (0 = byte, 1 = short, 2 = long) */
186 FALSE
, /* pc_relative */
188 complain_overflow_bitfield
,/* complain_on_overflow */
189 bfd_elf_generic_reloc
, /* special_function */
190 "R_ARM_THM_ABS5", /* name */
191 FALSE
, /* partial_inplace */
192 0x000007e0, /* src_mask */
193 0x000007e0, /* dst_mask */
194 FALSE
), /* pcrel_offset */
197 HOWTO (R_ARM_ABS8
, /* type */
199 0, /* size (0 = byte, 1 = short, 2 = long) */
201 FALSE
, /* pc_relative */
203 complain_overflow_bitfield
,/* complain_on_overflow */
204 bfd_elf_generic_reloc
, /* special_function */
205 "R_ARM_ABS8", /* name */
206 FALSE
, /* partial_inplace */
207 0x000000ff, /* src_mask */
208 0x000000ff, /* dst_mask */
209 FALSE
), /* pcrel_offset */
211 HOWTO (R_ARM_SBREL32
, /* type */
213 2, /* size (0 = byte, 1 = short, 2 = long) */
215 FALSE
, /* pc_relative */
217 complain_overflow_dont
,/* complain_on_overflow */
218 bfd_elf_generic_reloc
, /* special_function */
219 "R_ARM_SBREL32", /* name */
220 FALSE
, /* partial_inplace */
221 0xffffffff, /* src_mask */
222 0xffffffff, /* dst_mask */
223 FALSE
), /* pcrel_offset */
225 HOWTO (R_ARM_THM_CALL
, /* type */
227 2, /* size (0 = byte, 1 = short, 2 = long) */
229 TRUE
, /* pc_relative */
231 complain_overflow_signed
,/* complain_on_overflow */
232 bfd_elf_generic_reloc
, /* special_function */
233 "R_ARM_THM_CALL", /* name */
234 FALSE
, /* partial_inplace */
235 0x07ff2fff, /* src_mask */
236 0x07ff2fff, /* dst_mask */
237 TRUE
), /* pcrel_offset */
239 HOWTO (R_ARM_THM_PC8
, /* type */
241 1, /* size (0 = byte, 1 = short, 2 = long) */
243 TRUE
, /* pc_relative */
245 complain_overflow_signed
,/* complain_on_overflow */
246 bfd_elf_generic_reloc
, /* special_function */
247 "R_ARM_THM_PC8", /* name */
248 FALSE
, /* partial_inplace */
249 0x000000ff, /* src_mask */
250 0x000000ff, /* dst_mask */
251 TRUE
), /* pcrel_offset */
253 HOWTO (R_ARM_BREL_ADJ
, /* type */
255 1, /* size (0 = byte, 1 = short, 2 = long) */
257 FALSE
, /* pc_relative */
259 complain_overflow_signed
,/* complain_on_overflow */
260 bfd_elf_generic_reloc
, /* special_function */
261 "R_ARM_BREL_ADJ", /* name */
262 FALSE
, /* partial_inplace */
263 0xffffffff, /* src_mask */
264 0xffffffff, /* dst_mask */
265 FALSE
), /* pcrel_offset */
267 HOWTO (R_ARM_TLS_DESC
, /* type */
269 2, /* size (0 = byte, 1 = short, 2 = long) */
271 FALSE
, /* pc_relative */
273 complain_overflow_bitfield
,/* complain_on_overflow */
274 bfd_elf_generic_reloc
, /* special_function */
275 "R_ARM_TLS_DESC", /* name */
276 FALSE
, /* partial_inplace */
277 0xffffffff, /* src_mask */
278 0xffffffff, /* dst_mask */
279 FALSE
), /* pcrel_offset */
281 HOWTO (R_ARM_THM_SWI8
, /* type */
283 0, /* size (0 = byte, 1 = short, 2 = long) */
285 FALSE
, /* pc_relative */
287 complain_overflow_signed
,/* complain_on_overflow */
288 bfd_elf_generic_reloc
, /* special_function */
289 "R_ARM_SWI8", /* name */
290 FALSE
, /* partial_inplace */
291 0x00000000, /* src_mask */
292 0x00000000, /* dst_mask */
293 FALSE
), /* pcrel_offset */
295 /* BLX instruction for the ARM. */
296 HOWTO (R_ARM_XPC25
, /* type */
298 2, /* size (0 = byte, 1 = short, 2 = long) */
300 TRUE
, /* pc_relative */
302 complain_overflow_signed
,/* complain_on_overflow */
303 bfd_elf_generic_reloc
, /* special_function */
304 "R_ARM_XPC25", /* name */
305 FALSE
, /* partial_inplace */
306 0x00ffffff, /* src_mask */
307 0x00ffffff, /* dst_mask */
308 TRUE
), /* pcrel_offset */
310 /* BLX instruction for the Thumb. */
311 HOWTO (R_ARM_THM_XPC22
, /* type */
313 2, /* size (0 = byte, 1 = short, 2 = long) */
315 TRUE
, /* pc_relative */
317 complain_overflow_signed
,/* complain_on_overflow */
318 bfd_elf_generic_reloc
, /* special_function */
319 "R_ARM_THM_XPC22", /* name */
320 FALSE
, /* partial_inplace */
321 0x07ff2fff, /* src_mask */
322 0x07ff2fff, /* dst_mask */
323 TRUE
), /* pcrel_offset */
325 /* Dynamic TLS relocations. */
327 HOWTO (R_ARM_TLS_DTPMOD32
, /* type */
329 2, /* size (0 = byte, 1 = short, 2 = long) */
331 FALSE
, /* pc_relative */
333 complain_overflow_bitfield
,/* complain_on_overflow */
334 bfd_elf_generic_reloc
, /* special_function */
335 "R_ARM_TLS_DTPMOD32", /* name */
336 TRUE
, /* partial_inplace */
337 0xffffffff, /* src_mask */
338 0xffffffff, /* dst_mask */
339 FALSE
), /* pcrel_offset */
341 HOWTO (R_ARM_TLS_DTPOFF32
, /* type */
343 2, /* size (0 = byte, 1 = short, 2 = long) */
345 FALSE
, /* pc_relative */
347 complain_overflow_bitfield
,/* complain_on_overflow */
348 bfd_elf_generic_reloc
, /* special_function */
349 "R_ARM_TLS_DTPOFF32", /* name */
350 TRUE
, /* partial_inplace */
351 0xffffffff, /* src_mask */
352 0xffffffff, /* dst_mask */
353 FALSE
), /* pcrel_offset */
355 HOWTO (R_ARM_TLS_TPOFF32
, /* type */
357 2, /* size (0 = byte, 1 = short, 2 = long) */
359 FALSE
, /* pc_relative */
361 complain_overflow_bitfield
,/* complain_on_overflow */
362 bfd_elf_generic_reloc
, /* special_function */
363 "R_ARM_TLS_TPOFF32", /* name */
364 TRUE
, /* partial_inplace */
365 0xffffffff, /* src_mask */
366 0xffffffff, /* dst_mask */
367 FALSE
), /* pcrel_offset */
369 /* Relocs used in ARM Linux */
371 HOWTO (R_ARM_COPY
, /* type */
373 2, /* size (0 = byte, 1 = short, 2 = long) */
375 FALSE
, /* pc_relative */
377 complain_overflow_bitfield
,/* complain_on_overflow */
378 bfd_elf_generic_reloc
, /* special_function */
379 "R_ARM_COPY", /* name */
380 TRUE
, /* partial_inplace */
381 0xffffffff, /* src_mask */
382 0xffffffff, /* dst_mask */
383 FALSE
), /* pcrel_offset */
385 HOWTO (R_ARM_GLOB_DAT
, /* type */
387 2, /* size (0 = byte, 1 = short, 2 = long) */
389 FALSE
, /* pc_relative */
391 complain_overflow_bitfield
,/* complain_on_overflow */
392 bfd_elf_generic_reloc
, /* special_function */
393 "R_ARM_GLOB_DAT", /* name */
394 TRUE
, /* partial_inplace */
395 0xffffffff, /* src_mask */
396 0xffffffff, /* dst_mask */
397 FALSE
), /* pcrel_offset */
399 HOWTO (R_ARM_JUMP_SLOT
, /* type */
401 2, /* size (0 = byte, 1 = short, 2 = long) */
403 FALSE
, /* pc_relative */
405 complain_overflow_bitfield
,/* complain_on_overflow */
406 bfd_elf_generic_reloc
, /* special_function */
407 "R_ARM_JUMP_SLOT", /* name */
408 TRUE
, /* partial_inplace */
409 0xffffffff, /* src_mask */
410 0xffffffff, /* dst_mask */
411 FALSE
), /* pcrel_offset */
413 HOWTO (R_ARM_RELATIVE
, /* type */
415 2, /* size (0 = byte, 1 = short, 2 = long) */
417 FALSE
, /* pc_relative */
419 complain_overflow_bitfield
,/* complain_on_overflow */
420 bfd_elf_generic_reloc
, /* special_function */
421 "R_ARM_RELATIVE", /* name */
422 TRUE
, /* partial_inplace */
423 0xffffffff, /* src_mask */
424 0xffffffff, /* dst_mask */
425 FALSE
), /* pcrel_offset */
427 HOWTO (R_ARM_GOTOFF32
, /* type */
429 2, /* size (0 = byte, 1 = short, 2 = long) */
431 FALSE
, /* pc_relative */
433 complain_overflow_bitfield
,/* complain_on_overflow */
434 bfd_elf_generic_reloc
, /* special_function */
435 "R_ARM_GOTOFF32", /* name */
436 TRUE
, /* partial_inplace */
437 0xffffffff, /* src_mask */
438 0xffffffff, /* dst_mask */
439 FALSE
), /* pcrel_offset */
441 HOWTO (R_ARM_GOTPC
, /* type */
443 2, /* size (0 = byte, 1 = short, 2 = long) */
445 TRUE
, /* pc_relative */
447 complain_overflow_bitfield
,/* complain_on_overflow */
448 bfd_elf_generic_reloc
, /* special_function */
449 "R_ARM_GOTPC", /* name */
450 TRUE
, /* partial_inplace */
451 0xffffffff, /* src_mask */
452 0xffffffff, /* dst_mask */
453 TRUE
), /* pcrel_offset */
455 HOWTO (R_ARM_GOT32
, /* type */
457 2, /* size (0 = byte, 1 = short, 2 = long) */
459 FALSE
, /* pc_relative */
461 complain_overflow_bitfield
,/* complain_on_overflow */
462 bfd_elf_generic_reloc
, /* special_function */
463 "R_ARM_GOT32", /* name */
464 TRUE
, /* partial_inplace */
465 0xffffffff, /* src_mask */
466 0xffffffff, /* dst_mask */
467 FALSE
), /* pcrel_offset */
469 HOWTO (R_ARM_PLT32
, /* type */
471 2, /* size (0 = byte, 1 = short, 2 = long) */
473 TRUE
, /* pc_relative */
475 complain_overflow_bitfield
,/* complain_on_overflow */
476 bfd_elf_generic_reloc
, /* special_function */
477 "R_ARM_PLT32", /* name */
478 FALSE
, /* partial_inplace */
479 0x00ffffff, /* src_mask */
480 0x00ffffff, /* dst_mask */
481 TRUE
), /* pcrel_offset */
483 HOWTO (R_ARM_CALL
, /* type */
485 2, /* size (0 = byte, 1 = short, 2 = long) */
487 TRUE
, /* pc_relative */
489 complain_overflow_signed
,/* complain_on_overflow */
490 bfd_elf_generic_reloc
, /* special_function */
491 "R_ARM_CALL", /* name */
492 FALSE
, /* partial_inplace */
493 0x00ffffff, /* src_mask */
494 0x00ffffff, /* dst_mask */
495 TRUE
), /* pcrel_offset */
497 HOWTO (R_ARM_JUMP24
, /* type */
499 2, /* size (0 = byte, 1 = short, 2 = long) */
501 TRUE
, /* pc_relative */
503 complain_overflow_signed
,/* complain_on_overflow */
504 bfd_elf_generic_reloc
, /* special_function */
505 "R_ARM_JUMP24", /* name */
506 FALSE
, /* partial_inplace */
507 0x00ffffff, /* src_mask */
508 0x00ffffff, /* dst_mask */
509 TRUE
), /* pcrel_offset */
511 HOWTO (R_ARM_THM_JUMP24
, /* type */
513 2, /* size (0 = byte, 1 = short, 2 = long) */
515 TRUE
, /* pc_relative */
517 complain_overflow_signed
,/* complain_on_overflow */
518 bfd_elf_generic_reloc
, /* special_function */
519 "R_ARM_THM_JUMP24", /* name */
520 FALSE
, /* partial_inplace */
521 0x07ff2fff, /* src_mask */
522 0x07ff2fff, /* dst_mask */
523 TRUE
), /* pcrel_offset */
525 HOWTO (R_ARM_BASE_ABS
, /* type */
527 2, /* size (0 = byte, 1 = short, 2 = long) */
529 FALSE
, /* pc_relative */
531 complain_overflow_dont
,/* complain_on_overflow */
532 bfd_elf_generic_reloc
, /* special_function */
533 "R_ARM_BASE_ABS", /* name */
534 FALSE
, /* partial_inplace */
535 0xffffffff, /* src_mask */
536 0xffffffff, /* dst_mask */
537 FALSE
), /* pcrel_offset */
539 HOWTO (R_ARM_ALU_PCREL7_0
, /* type */
541 2, /* size (0 = byte, 1 = short, 2 = long) */
543 TRUE
, /* pc_relative */
545 complain_overflow_dont
,/* complain_on_overflow */
546 bfd_elf_generic_reloc
, /* special_function */
547 "R_ARM_ALU_PCREL_7_0", /* name */
548 FALSE
, /* partial_inplace */
549 0x00000fff, /* src_mask */
550 0x00000fff, /* dst_mask */
551 TRUE
), /* pcrel_offset */
553 HOWTO (R_ARM_ALU_PCREL15_8
, /* type */
555 2, /* size (0 = byte, 1 = short, 2 = long) */
557 TRUE
, /* pc_relative */
559 complain_overflow_dont
,/* complain_on_overflow */
560 bfd_elf_generic_reloc
, /* special_function */
561 "R_ARM_ALU_PCREL_15_8",/* name */
562 FALSE
, /* partial_inplace */
563 0x00000fff, /* src_mask */
564 0x00000fff, /* dst_mask */
565 TRUE
), /* pcrel_offset */
567 HOWTO (R_ARM_ALU_PCREL23_15
, /* type */
569 2, /* size (0 = byte, 1 = short, 2 = long) */
571 TRUE
, /* pc_relative */
573 complain_overflow_dont
,/* complain_on_overflow */
574 bfd_elf_generic_reloc
, /* special_function */
575 "R_ARM_ALU_PCREL_23_15",/* name */
576 FALSE
, /* partial_inplace */
577 0x00000fff, /* src_mask */
578 0x00000fff, /* dst_mask */
579 TRUE
), /* pcrel_offset */
581 HOWTO (R_ARM_LDR_SBREL_11_0
, /* type */
583 2, /* size (0 = byte, 1 = short, 2 = long) */
585 FALSE
, /* pc_relative */
587 complain_overflow_dont
,/* complain_on_overflow */
588 bfd_elf_generic_reloc
, /* special_function */
589 "R_ARM_LDR_SBREL_11_0",/* name */
590 FALSE
, /* partial_inplace */
591 0x00000fff, /* src_mask */
592 0x00000fff, /* dst_mask */
593 FALSE
), /* pcrel_offset */
595 HOWTO (R_ARM_ALU_SBREL_19_12
, /* type */
597 2, /* size (0 = byte, 1 = short, 2 = long) */
599 FALSE
, /* pc_relative */
601 complain_overflow_dont
,/* complain_on_overflow */
602 bfd_elf_generic_reloc
, /* special_function */
603 "R_ARM_ALU_SBREL_19_12",/* name */
604 FALSE
, /* partial_inplace */
605 0x000ff000, /* src_mask */
606 0x000ff000, /* dst_mask */
607 FALSE
), /* pcrel_offset */
609 HOWTO (R_ARM_ALU_SBREL_27_20
, /* type */
611 2, /* size (0 = byte, 1 = short, 2 = long) */
613 FALSE
, /* pc_relative */
615 complain_overflow_dont
,/* complain_on_overflow */
616 bfd_elf_generic_reloc
, /* special_function */
617 "R_ARM_ALU_SBREL_27_20",/* name */
618 FALSE
, /* partial_inplace */
619 0x0ff00000, /* src_mask */
620 0x0ff00000, /* dst_mask */
621 FALSE
), /* pcrel_offset */
623 HOWTO (R_ARM_TARGET1
, /* type */
625 2, /* size (0 = byte, 1 = short, 2 = long) */
627 FALSE
, /* pc_relative */
629 complain_overflow_dont
,/* complain_on_overflow */
630 bfd_elf_generic_reloc
, /* special_function */
631 "R_ARM_TARGET1", /* name */
632 FALSE
, /* partial_inplace */
633 0xffffffff, /* src_mask */
634 0xffffffff, /* dst_mask */
635 FALSE
), /* pcrel_offset */
637 HOWTO (R_ARM_ROSEGREL32
, /* type */
639 2, /* size (0 = byte, 1 = short, 2 = long) */
641 FALSE
, /* pc_relative */
643 complain_overflow_dont
,/* complain_on_overflow */
644 bfd_elf_generic_reloc
, /* special_function */
645 "R_ARM_ROSEGREL32", /* name */
646 FALSE
, /* partial_inplace */
647 0xffffffff, /* src_mask */
648 0xffffffff, /* dst_mask */
649 FALSE
), /* pcrel_offset */
651 HOWTO (R_ARM_V4BX
, /* type */
653 2, /* size (0 = byte, 1 = short, 2 = long) */
655 FALSE
, /* pc_relative */
657 complain_overflow_dont
,/* complain_on_overflow */
658 bfd_elf_generic_reloc
, /* special_function */
659 "R_ARM_V4BX", /* name */
660 FALSE
, /* partial_inplace */
661 0xffffffff, /* src_mask */
662 0xffffffff, /* dst_mask */
663 FALSE
), /* pcrel_offset */
665 HOWTO (R_ARM_TARGET2
, /* type */
667 2, /* size (0 = byte, 1 = short, 2 = long) */
669 FALSE
, /* pc_relative */
671 complain_overflow_signed
,/* complain_on_overflow */
672 bfd_elf_generic_reloc
, /* special_function */
673 "R_ARM_TARGET2", /* name */
674 FALSE
, /* partial_inplace */
675 0xffffffff, /* src_mask */
676 0xffffffff, /* dst_mask */
677 TRUE
), /* pcrel_offset */
679 HOWTO (R_ARM_PREL31
, /* type */
681 2, /* size (0 = byte, 1 = short, 2 = long) */
683 TRUE
, /* pc_relative */
685 complain_overflow_signed
,/* complain_on_overflow */
686 bfd_elf_generic_reloc
, /* special_function */
687 "R_ARM_PREL31", /* name */
688 FALSE
, /* partial_inplace */
689 0x7fffffff, /* src_mask */
690 0x7fffffff, /* dst_mask */
691 TRUE
), /* pcrel_offset */
693 HOWTO (R_ARM_MOVW_ABS_NC
, /* type */
695 2, /* size (0 = byte, 1 = short, 2 = long) */
697 FALSE
, /* pc_relative */
699 complain_overflow_dont
,/* complain_on_overflow */
700 bfd_elf_generic_reloc
, /* special_function */
701 "R_ARM_MOVW_ABS_NC", /* name */
702 FALSE
, /* partial_inplace */
703 0x000f0fff, /* src_mask */
704 0x000f0fff, /* dst_mask */
705 FALSE
), /* pcrel_offset */
707 HOWTO (R_ARM_MOVT_ABS
, /* type */
709 2, /* size (0 = byte, 1 = short, 2 = long) */
711 FALSE
, /* pc_relative */
713 complain_overflow_bitfield
,/* complain_on_overflow */
714 bfd_elf_generic_reloc
, /* special_function */
715 "R_ARM_MOVT_ABS", /* name */
716 FALSE
, /* partial_inplace */
717 0x000f0fff, /* src_mask */
718 0x000f0fff, /* dst_mask */
719 FALSE
), /* pcrel_offset */
721 HOWTO (R_ARM_MOVW_PREL_NC
, /* type */
723 2, /* size (0 = byte, 1 = short, 2 = long) */
725 TRUE
, /* pc_relative */
727 complain_overflow_dont
,/* complain_on_overflow */
728 bfd_elf_generic_reloc
, /* special_function */
729 "R_ARM_MOVW_PREL_NC", /* name */
730 FALSE
, /* partial_inplace */
731 0x000f0fff, /* src_mask */
732 0x000f0fff, /* dst_mask */
733 TRUE
), /* pcrel_offset */
735 HOWTO (R_ARM_MOVT_PREL
, /* type */
737 2, /* size (0 = byte, 1 = short, 2 = long) */
739 TRUE
, /* pc_relative */
741 complain_overflow_bitfield
,/* complain_on_overflow */
742 bfd_elf_generic_reloc
, /* special_function */
743 "R_ARM_MOVT_PREL", /* name */
744 FALSE
, /* partial_inplace */
745 0x000f0fff, /* src_mask */
746 0x000f0fff, /* dst_mask */
747 TRUE
), /* pcrel_offset */
749 HOWTO (R_ARM_THM_MOVW_ABS_NC
, /* type */
751 2, /* size (0 = byte, 1 = short, 2 = long) */
753 FALSE
, /* pc_relative */
755 complain_overflow_dont
,/* complain_on_overflow */
756 bfd_elf_generic_reloc
, /* special_function */
757 "R_ARM_THM_MOVW_ABS_NC",/* name */
758 FALSE
, /* partial_inplace */
759 0x040f70ff, /* src_mask */
760 0x040f70ff, /* dst_mask */
761 FALSE
), /* pcrel_offset */
763 HOWTO (R_ARM_THM_MOVT_ABS
, /* type */
765 2, /* size (0 = byte, 1 = short, 2 = long) */
767 FALSE
, /* pc_relative */
769 complain_overflow_bitfield
,/* complain_on_overflow */
770 bfd_elf_generic_reloc
, /* special_function */
771 "R_ARM_THM_MOVT_ABS", /* name */
772 FALSE
, /* partial_inplace */
773 0x040f70ff, /* src_mask */
774 0x040f70ff, /* dst_mask */
775 FALSE
), /* pcrel_offset */
777 HOWTO (R_ARM_THM_MOVW_PREL_NC
,/* type */
779 2, /* size (0 = byte, 1 = short, 2 = long) */
781 TRUE
, /* pc_relative */
783 complain_overflow_dont
,/* complain_on_overflow */
784 bfd_elf_generic_reloc
, /* special_function */
785 "R_ARM_THM_MOVW_PREL_NC",/* name */
786 FALSE
, /* partial_inplace */
787 0x040f70ff, /* src_mask */
788 0x040f70ff, /* dst_mask */
789 TRUE
), /* pcrel_offset */
791 HOWTO (R_ARM_THM_MOVT_PREL
, /* type */
793 2, /* size (0 = byte, 1 = short, 2 = long) */
795 TRUE
, /* pc_relative */
797 complain_overflow_bitfield
,/* complain_on_overflow */
798 bfd_elf_generic_reloc
, /* special_function */
799 "R_ARM_THM_MOVT_PREL", /* name */
800 FALSE
, /* partial_inplace */
801 0x040f70ff, /* src_mask */
802 0x040f70ff, /* dst_mask */
803 TRUE
), /* pcrel_offset */
805 HOWTO (R_ARM_THM_JUMP19
, /* type */
807 2, /* size (0 = byte, 1 = short, 2 = long) */
809 TRUE
, /* pc_relative */
811 complain_overflow_signed
,/* complain_on_overflow */
812 bfd_elf_generic_reloc
, /* special_function */
813 "R_ARM_THM_JUMP19", /* name */
814 FALSE
, /* partial_inplace */
815 0x043f2fff, /* src_mask */
816 0x043f2fff, /* dst_mask */
817 TRUE
), /* pcrel_offset */
819 HOWTO (R_ARM_THM_JUMP6
, /* type */
821 1, /* size (0 = byte, 1 = short, 2 = long) */
823 TRUE
, /* pc_relative */
825 complain_overflow_unsigned
,/* complain_on_overflow */
826 bfd_elf_generic_reloc
, /* special_function */
827 "R_ARM_THM_JUMP6", /* name */
828 FALSE
, /* partial_inplace */
829 0x02f8, /* src_mask */
830 0x02f8, /* dst_mask */
831 TRUE
), /* pcrel_offset */
833 /* These are declared as 13-bit signed relocations because we can
834 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
836 HOWTO (R_ARM_THM_ALU_PREL_11_0
,/* type */
838 2, /* size (0 = byte, 1 = short, 2 = long) */
840 TRUE
, /* pc_relative */
842 complain_overflow_dont
,/* complain_on_overflow */
843 bfd_elf_generic_reloc
, /* special_function */
844 "R_ARM_THM_ALU_PREL_11_0",/* name */
845 FALSE
, /* partial_inplace */
846 0xffffffff, /* src_mask */
847 0xffffffff, /* dst_mask */
848 TRUE
), /* pcrel_offset */
850 HOWTO (R_ARM_THM_PC12
, /* type */
852 2, /* size (0 = byte, 1 = short, 2 = long) */
854 TRUE
, /* pc_relative */
856 complain_overflow_dont
,/* complain_on_overflow */
857 bfd_elf_generic_reloc
, /* special_function */
858 "R_ARM_THM_PC12", /* name */
859 FALSE
, /* partial_inplace */
860 0xffffffff, /* src_mask */
861 0xffffffff, /* dst_mask */
862 TRUE
), /* pcrel_offset */
864 HOWTO (R_ARM_ABS32_NOI
, /* type */
866 2, /* size (0 = byte, 1 = short, 2 = long) */
868 FALSE
, /* pc_relative */
870 complain_overflow_dont
,/* complain_on_overflow */
871 bfd_elf_generic_reloc
, /* special_function */
872 "R_ARM_ABS32_NOI", /* name */
873 FALSE
, /* partial_inplace */
874 0xffffffff, /* src_mask */
875 0xffffffff, /* dst_mask */
876 FALSE
), /* pcrel_offset */
878 HOWTO (R_ARM_REL32_NOI
, /* type */
880 2, /* size (0 = byte, 1 = short, 2 = long) */
882 TRUE
, /* pc_relative */
884 complain_overflow_dont
,/* complain_on_overflow */
885 bfd_elf_generic_reloc
, /* special_function */
886 "R_ARM_REL32_NOI", /* name */
887 FALSE
, /* partial_inplace */
888 0xffffffff, /* src_mask */
889 0xffffffff, /* dst_mask */
890 FALSE
), /* pcrel_offset */
892 /* Group relocations. */
894 HOWTO (R_ARM_ALU_PC_G0_NC
, /* type */
896 2, /* size (0 = byte, 1 = short, 2 = long) */
898 TRUE
, /* pc_relative */
900 complain_overflow_dont
,/* complain_on_overflow */
901 bfd_elf_generic_reloc
, /* special_function */
902 "R_ARM_ALU_PC_G0_NC", /* name */
903 FALSE
, /* partial_inplace */
904 0xffffffff, /* src_mask */
905 0xffffffff, /* dst_mask */
906 TRUE
), /* pcrel_offset */
908 HOWTO (R_ARM_ALU_PC_G0
, /* type */
910 2, /* size (0 = byte, 1 = short, 2 = long) */
912 TRUE
, /* pc_relative */
914 complain_overflow_dont
,/* complain_on_overflow */
915 bfd_elf_generic_reloc
, /* special_function */
916 "R_ARM_ALU_PC_G0", /* name */
917 FALSE
, /* partial_inplace */
918 0xffffffff, /* src_mask */
919 0xffffffff, /* dst_mask */
920 TRUE
), /* pcrel_offset */
922 HOWTO (R_ARM_ALU_PC_G1_NC
, /* type */
924 2, /* size (0 = byte, 1 = short, 2 = long) */
926 TRUE
, /* pc_relative */
928 complain_overflow_dont
,/* complain_on_overflow */
929 bfd_elf_generic_reloc
, /* special_function */
930 "R_ARM_ALU_PC_G1_NC", /* name */
931 FALSE
, /* partial_inplace */
932 0xffffffff, /* src_mask */
933 0xffffffff, /* dst_mask */
934 TRUE
), /* pcrel_offset */
936 HOWTO (R_ARM_ALU_PC_G1
, /* type */
938 2, /* size (0 = byte, 1 = short, 2 = long) */
940 TRUE
, /* pc_relative */
942 complain_overflow_dont
,/* complain_on_overflow */
943 bfd_elf_generic_reloc
, /* special_function */
944 "R_ARM_ALU_PC_G1", /* name */
945 FALSE
, /* partial_inplace */
946 0xffffffff, /* src_mask */
947 0xffffffff, /* dst_mask */
948 TRUE
), /* pcrel_offset */
950 HOWTO (R_ARM_ALU_PC_G2
, /* type */
952 2, /* size (0 = byte, 1 = short, 2 = long) */
954 TRUE
, /* pc_relative */
956 complain_overflow_dont
,/* complain_on_overflow */
957 bfd_elf_generic_reloc
, /* special_function */
958 "R_ARM_ALU_PC_G2", /* name */
959 FALSE
, /* partial_inplace */
960 0xffffffff, /* src_mask */
961 0xffffffff, /* dst_mask */
962 TRUE
), /* pcrel_offset */
964 HOWTO (R_ARM_LDR_PC_G1
, /* type */
966 2, /* size (0 = byte, 1 = short, 2 = long) */
968 TRUE
, /* pc_relative */
970 complain_overflow_dont
,/* complain_on_overflow */
971 bfd_elf_generic_reloc
, /* special_function */
972 "R_ARM_LDR_PC_G1", /* name */
973 FALSE
, /* partial_inplace */
974 0xffffffff, /* src_mask */
975 0xffffffff, /* dst_mask */
976 TRUE
), /* pcrel_offset */
978 HOWTO (R_ARM_LDR_PC_G2
, /* type */
980 2, /* size (0 = byte, 1 = short, 2 = long) */
982 TRUE
, /* pc_relative */
984 complain_overflow_dont
,/* complain_on_overflow */
985 bfd_elf_generic_reloc
, /* special_function */
986 "R_ARM_LDR_PC_G2", /* name */
987 FALSE
, /* partial_inplace */
988 0xffffffff, /* src_mask */
989 0xffffffff, /* dst_mask */
990 TRUE
), /* pcrel_offset */
992 HOWTO (R_ARM_LDRS_PC_G0
, /* type */
994 2, /* size (0 = byte, 1 = short, 2 = long) */
996 TRUE
, /* pc_relative */
998 complain_overflow_dont
,/* complain_on_overflow */
999 bfd_elf_generic_reloc
, /* special_function */
1000 "R_ARM_LDRS_PC_G0", /* name */
1001 FALSE
, /* partial_inplace */
1002 0xffffffff, /* src_mask */
1003 0xffffffff, /* dst_mask */
1004 TRUE
), /* pcrel_offset */
1006 HOWTO (R_ARM_LDRS_PC_G1
, /* type */
1008 2, /* size (0 = byte, 1 = short, 2 = long) */
1010 TRUE
, /* pc_relative */
1012 complain_overflow_dont
,/* complain_on_overflow */
1013 bfd_elf_generic_reloc
, /* special_function */
1014 "R_ARM_LDRS_PC_G1", /* name */
1015 FALSE
, /* partial_inplace */
1016 0xffffffff, /* src_mask */
1017 0xffffffff, /* dst_mask */
1018 TRUE
), /* pcrel_offset */
1020 HOWTO (R_ARM_LDRS_PC_G2
, /* type */
1022 2, /* size (0 = byte, 1 = short, 2 = long) */
1024 TRUE
, /* pc_relative */
1026 complain_overflow_dont
,/* complain_on_overflow */
1027 bfd_elf_generic_reloc
, /* special_function */
1028 "R_ARM_LDRS_PC_G2", /* name */
1029 FALSE
, /* partial_inplace */
1030 0xffffffff, /* src_mask */
1031 0xffffffff, /* dst_mask */
1032 TRUE
), /* pcrel_offset */
1034 HOWTO (R_ARM_LDC_PC_G0
, /* type */
1036 2, /* size (0 = byte, 1 = short, 2 = long) */
1038 TRUE
, /* pc_relative */
1040 complain_overflow_dont
,/* complain_on_overflow */
1041 bfd_elf_generic_reloc
, /* special_function */
1042 "R_ARM_LDC_PC_G0", /* name */
1043 FALSE
, /* partial_inplace */
1044 0xffffffff, /* src_mask */
1045 0xffffffff, /* dst_mask */
1046 TRUE
), /* pcrel_offset */
1048 HOWTO (R_ARM_LDC_PC_G1
, /* type */
1050 2, /* size (0 = byte, 1 = short, 2 = long) */
1052 TRUE
, /* pc_relative */
1054 complain_overflow_dont
,/* complain_on_overflow */
1055 bfd_elf_generic_reloc
, /* special_function */
1056 "R_ARM_LDC_PC_G1", /* name */
1057 FALSE
, /* partial_inplace */
1058 0xffffffff, /* src_mask */
1059 0xffffffff, /* dst_mask */
1060 TRUE
), /* pcrel_offset */
1062 HOWTO (R_ARM_LDC_PC_G2
, /* type */
1064 2, /* size (0 = byte, 1 = short, 2 = long) */
1066 TRUE
, /* pc_relative */
1068 complain_overflow_dont
,/* complain_on_overflow */
1069 bfd_elf_generic_reloc
, /* special_function */
1070 "R_ARM_LDC_PC_G2", /* name */
1071 FALSE
, /* partial_inplace */
1072 0xffffffff, /* src_mask */
1073 0xffffffff, /* dst_mask */
1074 TRUE
), /* pcrel_offset */
1076 HOWTO (R_ARM_ALU_SB_G0_NC
, /* type */
1078 2, /* size (0 = byte, 1 = short, 2 = long) */
1080 TRUE
, /* pc_relative */
1082 complain_overflow_dont
,/* complain_on_overflow */
1083 bfd_elf_generic_reloc
, /* special_function */
1084 "R_ARM_ALU_SB_G0_NC", /* name */
1085 FALSE
, /* partial_inplace */
1086 0xffffffff, /* src_mask */
1087 0xffffffff, /* dst_mask */
1088 TRUE
), /* pcrel_offset */
1090 HOWTO (R_ARM_ALU_SB_G0
, /* type */
1092 2, /* size (0 = byte, 1 = short, 2 = long) */
1094 TRUE
, /* pc_relative */
1096 complain_overflow_dont
,/* complain_on_overflow */
1097 bfd_elf_generic_reloc
, /* special_function */
1098 "R_ARM_ALU_SB_G0", /* name */
1099 FALSE
, /* partial_inplace */
1100 0xffffffff, /* src_mask */
1101 0xffffffff, /* dst_mask */
1102 TRUE
), /* pcrel_offset */
1104 HOWTO (R_ARM_ALU_SB_G1_NC
, /* type */
1106 2, /* size (0 = byte, 1 = short, 2 = long) */
1108 TRUE
, /* pc_relative */
1110 complain_overflow_dont
,/* complain_on_overflow */
1111 bfd_elf_generic_reloc
, /* special_function */
1112 "R_ARM_ALU_SB_G1_NC", /* name */
1113 FALSE
, /* partial_inplace */
1114 0xffffffff, /* src_mask */
1115 0xffffffff, /* dst_mask */
1116 TRUE
), /* pcrel_offset */
1118 HOWTO (R_ARM_ALU_SB_G1
, /* type */
1120 2, /* size (0 = byte, 1 = short, 2 = long) */
1122 TRUE
, /* pc_relative */
1124 complain_overflow_dont
,/* complain_on_overflow */
1125 bfd_elf_generic_reloc
, /* special_function */
1126 "R_ARM_ALU_SB_G1", /* name */
1127 FALSE
, /* partial_inplace */
1128 0xffffffff, /* src_mask */
1129 0xffffffff, /* dst_mask */
1130 TRUE
), /* pcrel_offset */
1132 HOWTO (R_ARM_ALU_SB_G2
, /* type */
1134 2, /* size (0 = byte, 1 = short, 2 = long) */
1136 TRUE
, /* pc_relative */
1138 complain_overflow_dont
,/* complain_on_overflow */
1139 bfd_elf_generic_reloc
, /* special_function */
1140 "R_ARM_ALU_SB_G2", /* name */
1141 FALSE
, /* partial_inplace */
1142 0xffffffff, /* src_mask */
1143 0xffffffff, /* dst_mask */
1144 TRUE
), /* pcrel_offset */
1146 HOWTO (R_ARM_LDR_SB_G0
, /* type */
1148 2, /* size (0 = byte, 1 = short, 2 = long) */
1150 TRUE
, /* pc_relative */
1152 complain_overflow_dont
,/* complain_on_overflow */
1153 bfd_elf_generic_reloc
, /* special_function */
1154 "R_ARM_LDR_SB_G0", /* name */
1155 FALSE
, /* partial_inplace */
1156 0xffffffff, /* src_mask */
1157 0xffffffff, /* dst_mask */
1158 TRUE
), /* pcrel_offset */
1160 HOWTO (R_ARM_LDR_SB_G1
, /* type */
1162 2, /* size (0 = byte, 1 = short, 2 = long) */
1164 TRUE
, /* pc_relative */
1166 complain_overflow_dont
,/* complain_on_overflow */
1167 bfd_elf_generic_reloc
, /* special_function */
1168 "R_ARM_LDR_SB_G1", /* name */
1169 FALSE
, /* partial_inplace */
1170 0xffffffff, /* src_mask */
1171 0xffffffff, /* dst_mask */
1172 TRUE
), /* pcrel_offset */
1174 HOWTO (R_ARM_LDR_SB_G2
, /* type */
1176 2, /* size (0 = byte, 1 = short, 2 = long) */
1178 TRUE
, /* pc_relative */
1180 complain_overflow_dont
,/* complain_on_overflow */
1181 bfd_elf_generic_reloc
, /* special_function */
1182 "R_ARM_LDR_SB_G2", /* name */
1183 FALSE
, /* partial_inplace */
1184 0xffffffff, /* src_mask */
1185 0xffffffff, /* dst_mask */
1186 TRUE
), /* pcrel_offset */
1188 HOWTO (R_ARM_LDRS_SB_G0
, /* type */
1190 2, /* size (0 = byte, 1 = short, 2 = long) */
1192 TRUE
, /* pc_relative */
1194 complain_overflow_dont
,/* complain_on_overflow */
1195 bfd_elf_generic_reloc
, /* special_function */
1196 "R_ARM_LDRS_SB_G0", /* name */
1197 FALSE
, /* partial_inplace */
1198 0xffffffff, /* src_mask */
1199 0xffffffff, /* dst_mask */
1200 TRUE
), /* pcrel_offset */
1202 HOWTO (R_ARM_LDRS_SB_G1
, /* type */
1204 2, /* size (0 = byte, 1 = short, 2 = long) */
1206 TRUE
, /* pc_relative */
1208 complain_overflow_dont
,/* complain_on_overflow */
1209 bfd_elf_generic_reloc
, /* special_function */
1210 "R_ARM_LDRS_SB_G1", /* name */
1211 FALSE
, /* partial_inplace */
1212 0xffffffff, /* src_mask */
1213 0xffffffff, /* dst_mask */
1214 TRUE
), /* pcrel_offset */
1216 HOWTO (R_ARM_LDRS_SB_G2
, /* type */
1218 2, /* size (0 = byte, 1 = short, 2 = long) */
1220 TRUE
, /* pc_relative */
1222 complain_overflow_dont
,/* complain_on_overflow */
1223 bfd_elf_generic_reloc
, /* special_function */
1224 "R_ARM_LDRS_SB_G2", /* name */
1225 FALSE
, /* partial_inplace */
1226 0xffffffff, /* src_mask */
1227 0xffffffff, /* dst_mask */
1228 TRUE
), /* pcrel_offset */
1230 HOWTO (R_ARM_LDC_SB_G0
, /* type */
1232 2, /* size (0 = byte, 1 = short, 2 = long) */
1234 TRUE
, /* pc_relative */
1236 complain_overflow_dont
,/* complain_on_overflow */
1237 bfd_elf_generic_reloc
, /* special_function */
1238 "R_ARM_LDC_SB_G0", /* name */
1239 FALSE
, /* partial_inplace */
1240 0xffffffff, /* src_mask */
1241 0xffffffff, /* dst_mask */
1242 TRUE
), /* pcrel_offset */
1244 HOWTO (R_ARM_LDC_SB_G1
, /* type */
1246 2, /* size (0 = byte, 1 = short, 2 = long) */
1248 TRUE
, /* pc_relative */
1250 complain_overflow_dont
,/* complain_on_overflow */
1251 bfd_elf_generic_reloc
, /* special_function */
1252 "R_ARM_LDC_SB_G1", /* name */
1253 FALSE
, /* partial_inplace */
1254 0xffffffff, /* src_mask */
1255 0xffffffff, /* dst_mask */
1256 TRUE
), /* pcrel_offset */
1258 HOWTO (R_ARM_LDC_SB_G2
, /* type */
1260 2, /* size (0 = byte, 1 = short, 2 = long) */
1262 TRUE
, /* pc_relative */
1264 complain_overflow_dont
,/* complain_on_overflow */
1265 bfd_elf_generic_reloc
, /* special_function */
1266 "R_ARM_LDC_SB_G2", /* name */
1267 FALSE
, /* partial_inplace */
1268 0xffffffff, /* src_mask */
1269 0xffffffff, /* dst_mask */
1270 TRUE
), /* pcrel_offset */
1272 /* End of group relocations. */
1274 HOWTO (R_ARM_MOVW_BREL_NC
, /* type */
1276 2, /* size (0 = byte, 1 = short, 2 = long) */
1278 FALSE
, /* pc_relative */
1280 complain_overflow_dont
,/* complain_on_overflow */
1281 bfd_elf_generic_reloc
, /* special_function */
1282 "R_ARM_MOVW_BREL_NC", /* name */
1283 FALSE
, /* partial_inplace */
1284 0x0000ffff, /* src_mask */
1285 0x0000ffff, /* dst_mask */
1286 FALSE
), /* pcrel_offset */
1288 HOWTO (R_ARM_MOVT_BREL
, /* type */
1290 2, /* size (0 = byte, 1 = short, 2 = long) */
1292 FALSE
, /* pc_relative */
1294 complain_overflow_bitfield
,/* complain_on_overflow */
1295 bfd_elf_generic_reloc
, /* special_function */
1296 "R_ARM_MOVT_BREL", /* name */
1297 FALSE
, /* partial_inplace */
1298 0x0000ffff, /* src_mask */
1299 0x0000ffff, /* dst_mask */
1300 FALSE
), /* pcrel_offset */
1302 HOWTO (R_ARM_MOVW_BREL
, /* type */
1304 2, /* size (0 = byte, 1 = short, 2 = long) */
1306 FALSE
, /* pc_relative */
1308 complain_overflow_dont
,/* complain_on_overflow */
1309 bfd_elf_generic_reloc
, /* special_function */
1310 "R_ARM_MOVW_BREL", /* name */
1311 FALSE
, /* partial_inplace */
1312 0x0000ffff, /* src_mask */
1313 0x0000ffff, /* dst_mask */
1314 FALSE
), /* pcrel_offset */
1316 HOWTO (R_ARM_THM_MOVW_BREL_NC
,/* type */
1318 2, /* size (0 = byte, 1 = short, 2 = long) */
1320 FALSE
, /* pc_relative */
1322 complain_overflow_dont
,/* complain_on_overflow */
1323 bfd_elf_generic_reloc
, /* special_function */
1324 "R_ARM_THM_MOVW_BREL_NC",/* name */
1325 FALSE
, /* partial_inplace */
1326 0x040f70ff, /* src_mask */
1327 0x040f70ff, /* dst_mask */
1328 FALSE
), /* pcrel_offset */
1330 HOWTO (R_ARM_THM_MOVT_BREL
, /* type */
1332 2, /* size (0 = byte, 1 = short, 2 = long) */
1334 FALSE
, /* pc_relative */
1336 complain_overflow_bitfield
,/* complain_on_overflow */
1337 bfd_elf_generic_reloc
, /* special_function */
1338 "R_ARM_THM_MOVT_BREL", /* name */
1339 FALSE
, /* partial_inplace */
1340 0x040f70ff, /* src_mask */
1341 0x040f70ff, /* dst_mask */
1342 FALSE
), /* pcrel_offset */
1344 HOWTO (R_ARM_THM_MOVW_BREL
, /* type */
1346 2, /* size (0 = byte, 1 = short, 2 = long) */
1348 FALSE
, /* pc_relative */
1350 complain_overflow_dont
,/* complain_on_overflow */
1351 bfd_elf_generic_reloc
, /* special_function */
1352 "R_ARM_THM_MOVW_BREL", /* name */
1353 FALSE
, /* partial_inplace */
1354 0x040f70ff, /* src_mask */
1355 0x040f70ff, /* dst_mask */
1356 FALSE
), /* pcrel_offset */
1358 HOWTO (R_ARM_TLS_GOTDESC
, /* type */
1360 2, /* size (0 = byte, 1 = short, 2 = long) */
1362 FALSE
, /* pc_relative */
1364 complain_overflow_bitfield
,/* complain_on_overflow */
1365 NULL
, /* special_function */
1366 "R_ARM_TLS_GOTDESC", /* name */
1367 TRUE
, /* partial_inplace */
1368 0xffffffff, /* src_mask */
1369 0xffffffff, /* dst_mask */
1370 FALSE
), /* pcrel_offset */
1372 HOWTO (R_ARM_TLS_CALL
, /* type */
1374 2, /* size (0 = byte, 1 = short, 2 = long) */
1376 FALSE
, /* pc_relative */
1378 complain_overflow_dont
,/* complain_on_overflow */
1379 bfd_elf_generic_reloc
, /* special_function */
1380 "R_ARM_TLS_CALL", /* name */
1381 FALSE
, /* partial_inplace */
1382 0x00ffffff, /* src_mask */
1383 0x00ffffff, /* dst_mask */
1384 FALSE
), /* pcrel_offset */
1386 HOWTO (R_ARM_TLS_DESCSEQ
, /* type */
1388 2, /* size (0 = byte, 1 = short, 2 = long) */
1390 FALSE
, /* pc_relative */
1392 complain_overflow_bitfield
,/* complain_on_overflow */
1393 bfd_elf_generic_reloc
, /* special_function */
1394 "R_ARM_TLS_DESCSEQ", /* name */
1395 FALSE
, /* partial_inplace */
1396 0x00000000, /* src_mask */
1397 0x00000000, /* dst_mask */
1398 FALSE
), /* pcrel_offset */
1400 HOWTO (R_ARM_THM_TLS_CALL
, /* type */
1402 2, /* size (0 = byte, 1 = short, 2 = long) */
1404 FALSE
, /* pc_relative */
1406 complain_overflow_dont
,/* complain_on_overflow */
1407 bfd_elf_generic_reloc
, /* special_function */
1408 "R_ARM_THM_TLS_CALL", /* name */
1409 FALSE
, /* partial_inplace */
1410 0x07ff07ff, /* src_mask */
1411 0x07ff07ff, /* dst_mask */
1412 FALSE
), /* pcrel_offset */
1414 HOWTO (R_ARM_PLT32_ABS
, /* type */
1416 2, /* size (0 = byte, 1 = short, 2 = long) */
1418 FALSE
, /* pc_relative */
1420 complain_overflow_dont
,/* complain_on_overflow */
1421 bfd_elf_generic_reloc
, /* special_function */
1422 "R_ARM_PLT32_ABS", /* name */
1423 FALSE
, /* partial_inplace */
1424 0xffffffff, /* src_mask */
1425 0xffffffff, /* dst_mask */
1426 FALSE
), /* pcrel_offset */
1428 HOWTO (R_ARM_GOT_ABS
, /* type */
1430 2, /* size (0 = byte, 1 = short, 2 = long) */
1432 FALSE
, /* pc_relative */
1434 complain_overflow_dont
,/* complain_on_overflow */
1435 bfd_elf_generic_reloc
, /* special_function */
1436 "R_ARM_GOT_ABS", /* name */
1437 FALSE
, /* partial_inplace */
1438 0xffffffff, /* src_mask */
1439 0xffffffff, /* dst_mask */
1440 FALSE
), /* pcrel_offset */
1442 HOWTO (R_ARM_GOT_PREL
, /* type */
1444 2, /* size (0 = byte, 1 = short, 2 = long) */
1446 TRUE
, /* pc_relative */
1448 complain_overflow_dont
, /* complain_on_overflow */
1449 bfd_elf_generic_reloc
, /* special_function */
1450 "R_ARM_GOT_PREL", /* name */
1451 FALSE
, /* partial_inplace */
1452 0xffffffff, /* src_mask */
1453 0xffffffff, /* dst_mask */
1454 TRUE
), /* pcrel_offset */
1456 HOWTO (R_ARM_GOT_BREL12
, /* type */
1458 2, /* size (0 = byte, 1 = short, 2 = long) */
1460 FALSE
, /* pc_relative */
1462 complain_overflow_bitfield
,/* complain_on_overflow */
1463 bfd_elf_generic_reloc
, /* special_function */
1464 "R_ARM_GOT_BREL12", /* name */
1465 FALSE
, /* partial_inplace */
1466 0x00000fff, /* src_mask */
1467 0x00000fff, /* dst_mask */
1468 FALSE
), /* pcrel_offset */
1470 HOWTO (R_ARM_GOTOFF12
, /* type */
1472 2, /* size (0 = byte, 1 = short, 2 = long) */
1474 FALSE
, /* pc_relative */
1476 complain_overflow_bitfield
,/* complain_on_overflow */
1477 bfd_elf_generic_reloc
, /* special_function */
1478 "R_ARM_GOTOFF12", /* name */
1479 FALSE
, /* partial_inplace */
1480 0x00000fff, /* src_mask */
1481 0x00000fff, /* dst_mask */
1482 FALSE
), /* pcrel_offset */
1484 EMPTY_HOWTO (R_ARM_GOTRELAX
), /* reserved for future GOT-load optimizations */
1486 /* GNU extension to record C++ vtable member usage */
1487 HOWTO (R_ARM_GNU_VTENTRY
, /* type */
1489 2, /* size (0 = byte, 1 = short, 2 = long) */
1491 FALSE
, /* pc_relative */
1493 complain_overflow_dont
, /* complain_on_overflow */
1494 _bfd_elf_rel_vtable_reloc_fn
, /* special_function */
1495 "R_ARM_GNU_VTENTRY", /* name */
1496 FALSE
, /* partial_inplace */
1499 FALSE
), /* pcrel_offset */
1501 /* GNU extension to record C++ vtable hierarchy */
1502 HOWTO (R_ARM_GNU_VTINHERIT
, /* type */
1504 2, /* size (0 = byte, 1 = short, 2 = long) */
1506 FALSE
, /* pc_relative */
1508 complain_overflow_dont
, /* complain_on_overflow */
1509 NULL
, /* special_function */
1510 "R_ARM_GNU_VTINHERIT", /* name */
1511 FALSE
, /* partial_inplace */
1514 FALSE
), /* pcrel_offset */
1516 HOWTO (R_ARM_THM_JUMP11
, /* type */
1518 1, /* size (0 = byte, 1 = short, 2 = long) */
1520 TRUE
, /* pc_relative */
1522 complain_overflow_signed
, /* complain_on_overflow */
1523 bfd_elf_generic_reloc
, /* special_function */
1524 "R_ARM_THM_JUMP11", /* name */
1525 FALSE
, /* partial_inplace */
1526 0x000007ff, /* src_mask */
1527 0x000007ff, /* dst_mask */
1528 TRUE
), /* pcrel_offset */
1530 HOWTO (R_ARM_THM_JUMP8
, /* type */
1532 1, /* size (0 = byte, 1 = short, 2 = long) */
1534 TRUE
, /* pc_relative */
1536 complain_overflow_signed
, /* complain_on_overflow */
1537 bfd_elf_generic_reloc
, /* special_function */
1538 "R_ARM_THM_JUMP8", /* name */
1539 FALSE
, /* partial_inplace */
1540 0x000000ff, /* src_mask */
1541 0x000000ff, /* dst_mask */
1542 TRUE
), /* pcrel_offset */
1544 /* TLS relocations */
1545 HOWTO (R_ARM_TLS_GD32
, /* type */
1547 2, /* size (0 = byte, 1 = short, 2 = long) */
1549 FALSE
, /* pc_relative */
1551 complain_overflow_bitfield
,/* complain_on_overflow */
1552 NULL
, /* special_function */
1553 "R_ARM_TLS_GD32", /* name */
1554 TRUE
, /* partial_inplace */
1555 0xffffffff, /* src_mask */
1556 0xffffffff, /* dst_mask */
1557 FALSE
), /* pcrel_offset */
1559 HOWTO (R_ARM_TLS_LDM32
, /* type */
1561 2, /* size (0 = byte, 1 = short, 2 = long) */
1563 FALSE
, /* pc_relative */
1565 complain_overflow_bitfield
,/* complain_on_overflow */
1566 bfd_elf_generic_reloc
, /* special_function */
1567 "R_ARM_TLS_LDM32", /* name */
1568 TRUE
, /* partial_inplace */
1569 0xffffffff, /* src_mask */
1570 0xffffffff, /* dst_mask */
1571 FALSE
), /* pcrel_offset */
1573 HOWTO (R_ARM_TLS_LDO32
, /* type */
1575 2, /* size (0 = byte, 1 = short, 2 = long) */
1577 FALSE
, /* pc_relative */
1579 complain_overflow_bitfield
,/* complain_on_overflow */
1580 bfd_elf_generic_reloc
, /* special_function */
1581 "R_ARM_TLS_LDO32", /* name */
1582 TRUE
, /* partial_inplace */
1583 0xffffffff, /* src_mask */
1584 0xffffffff, /* dst_mask */
1585 FALSE
), /* pcrel_offset */
1587 HOWTO (R_ARM_TLS_IE32
, /* type */
1589 2, /* size (0 = byte, 1 = short, 2 = long) */
1591 FALSE
, /* pc_relative */
1593 complain_overflow_bitfield
,/* complain_on_overflow */
1594 NULL
, /* special_function */
1595 "R_ARM_TLS_IE32", /* name */
1596 TRUE
, /* partial_inplace */
1597 0xffffffff, /* src_mask */
1598 0xffffffff, /* dst_mask */
1599 FALSE
), /* pcrel_offset */
1601 HOWTO (R_ARM_TLS_LE32
, /* type */
1603 2, /* size (0 = byte, 1 = short, 2 = long) */
1605 FALSE
, /* pc_relative */
1607 complain_overflow_bitfield
,/* complain_on_overflow */
1608 NULL
, /* special_function */
1609 "R_ARM_TLS_LE32", /* name */
1610 TRUE
, /* partial_inplace */
1611 0xffffffff, /* src_mask */
1612 0xffffffff, /* dst_mask */
1613 FALSE
), /* pcrel_offset */
1615 HOWTO (R_ARM_TLS_LDO12
, /* type */
1617 2, /* size (0 = byte, 1 = short, 2 = long) */
1619 FALSE
, /* pc_relative */
1621 complain_overflow_bitfield
,/* complain_on_overflow */
1622 bfd_elf_generic_reloc
, /* special_function */
1623 "R_ARM_TLS_LDO12", /* name */
1624 FALSE
, /* partial_inplace */
1625 0x00000fff, /* src_mask */
1626 0x00000fff, /* dst_mask */
1627 FALSE
), /* pcrel_offset */
1629 HOWTO (R_ARM_TLS_LE12
, /* type */
1631 2, /* size (0 = byte, 1 = short, 2 = long) */
1633 FALSE
, /* pc_relative */
1635 complain_overflow_bitfield
,/* complain_on_overflow */
1636 bfd_elf_generic_reloc
, /* special_function */
1637 "R_ARM_TLS_LE12", /* name */
1638 FALSE
, /* partial_inplace */
1639 0x00000fff, /* src_mask */
1640 0x00000fff, /* dst_mask */
1641 FALSE
), /* pcrel_offset */
1643 HOWTO (R_ARM_TLS_IE12GP
, /* type */
1645 2, /* size (0 = byte, 1 = short, 2 = long) */
1647 FALSE
, /* pc_relative */
1649 complain_overflow_bitfield
,/* complain_on_overflow */
1650 bfd_elf_generic_reloc
, /* special_function */
1651 "R_ARM_TLS_IE12GP", /* name */
1652 FALSE
, /* partial_inplace */
1653 0x00000fff, /* src_mask */
1654 0x00000fff, /* dst_mask */
1655 FALSE
), /* pcrel_offset */
1657 /* 112-127 private relocations. */
1675 /* R_ARM_ME_TOO, obsolete. */
1678 HOWTO (R_ARM_THM_TLS_DESCSEQ
, /* type */
1680 1, /* size (0 = byte, 1 = short, 2 = long) */
1682 FALSE
, /* pc_relative */
1684 complain_overflow_bitfield
,/* complain_on_overflow */
1685 bfd_elf_generic_reloc
, /* special_function */
1686 "R_ARM_THM_TLS_DESCSEQ",/* name */
1687 FALSE
, /* partial_inplace */
1688 0x00000000, /* src_mask */
1689 0x00000000, /* dst_mask */
1690 FALSE
), /* pcrel_offset */
1693 HOWTO (R_ARM_THM_ALU_ABS_G0_NC
,/* type. */
1694 0, /* rightshift. */
1695 1, /* size (0 = byte, 1 = short, 2 = long). */
1697 FALSE
, /* pc_relative. */
1699 complain_overflow_bitfield
,/* complain_on_overflow. */
1700 bfd_elf_generic_reloc
, /* special_function. */
1701 "R_ARM_THM_ALU_ABS_G0_NC",/* name. */
1702 FALSE
, /* partial_inplace. */
1703 0x00000000, /* src_mask. */
1704 0x00000000, /* dst_mask. */
1705 FALSE
), /* pcrel_offset. */
1706 HOWTO (R_ARM_THM_ALU_ABS_G1_NC
,/* type. */
1707 0, /* rightshift. */
1708 1, /* size (0 = byte, 1 = short, 2 = long). */
1710 FALSE
, /* pc_relative. */
1712 complain_overflow_bitfield
,/* complain_on_overflow. */
1713 bfd_elf_generic_reloc
, /* special_function. */
1714 "R_ARM_THM_ALU_ABS_G1_NC",/* name. */
1715 FALSE
, /* partial_inplace. */
1716 0x00000000, /* src_mask. */
1717 0x00000000, /* dst_mask. */
1718 FALSE
), /* pcrel_offset. */
1719 HOWTO (R_ARM_THM_ALU_ABS_G2_NC
,/* type. */
1720 0, /* rightshift. */
1721 1, /* size (0 = byte, 1 = short, 2 = long). */
1723 FALSE
, /* pc_relative. */
1725 complain_overflow_bitfield
,/* complain_on_overflow. */
1726 bfd_elf_generic_reloc
, /* special_function. */
1727 "R_ARM_THM_ALU_ABS_G2_NC",/* name. */
1728 FALSE
, /* partial_inplace. */
1729 0x00000000, /* src_mask. */
1730 0x00000000, /* dst_mask. */
1731 FALSE
), /* pcrel_offset. */
1732 HOWTO (R_ARM_THM_ALU_ABS_G3_NC
,/* type. */
1733 0, /* rightshift. */
1734 1, /* size (0 = byte, 1 = short, 2 = long). */
1736 FALSE
, /* pc_relative. */
1738 complain_overflow_bitfield
,/* complain_on_overflow. */
1739 bfd_elf_generic_reloc
, /* special_function. */
1740 "R_ARM_THM_ALU_ABS_G3_NC",/* name. */
1741 FALSE
, /* partial_inplace. */
1742 0x00000000, /* src_mask. */
1743 0x00000000, /* dst_mask. */
1744 FALSE
), /* pcrel_offset. */
1748 static reloc_howto_type elf32_arm_howto_table_2
[8] =
1750 HOWTO (R_ARM_IRELATIVE
, /* type */
1752 2, /* size (0 = byte, 1 = short, 2 = long) */
1754 FALSE
, /* pc_relative */
1756 complain_overflow_bitfield
,/* complain_on_overflow */
1757 bfd_elf_generic_reloc
, /* special_function */
1758 "R_ARM_IRELATIVE", /* name */
1759 TRUE
, /* partial_inplace */
1760 0xffffffff, /* src_mask */
1761 0xffffffff, /* dst_mask */
1762 FALSE
), /* pcrel_offset */
1763 HOWTO (R_ARM_GOTFUNCDESC
, /* type */
1765 2, /* size (0 = byte, 1 = short, 2 = long) */
1767 FALSE
, /* pc_relative */
1769 complain_overflow_bitfield
,/* complain_on_overflow */
1770 bfd_elf_generic_reloc
, /* special_function */
1771 "R_ARM_GOTFUNCDESC", /* name */
1772 FALSE
, /* partial_inplace */
1774 0xffffffff, /* dst_mask */
1775 FALSE
), /* pcrel_offset */
1776 HOWTO (R_ARM_GOTOFFFUNCDESC
, /* type */
1778 2, /* size (0 = byte, 1 = short, 2 = long) */
1780 FALSE
, /* pc_relative */
1782 complain_overflow_bitfield
,/* complain_on_overflow */
1783 bfd_elf_generic_reloc
, /* special_function */
1784 "R_ARM_GOTOFFFUNCDESC",/* name */
1785 FALSE
, /* partial_inplace */
1787 0xffffffff, /* dst_mask */
1788 FALSE
), /* pcrel_offset */
1789 HOWTO (R_ARM_FUNCDESC
, /* type */
1791 2, /* size (0 = byte, 1 = short, 2 = long) */
1793 FALSE
, /* pc_relative */
1795 complain_overflow_bitfield
,/* complain_on_overflow */
1796 bfd_elf_generic_reloc
, /* special_function */
1797 "R_ARM_FUNCDESC", /* name */
1798 FALSE
, /* partial_inplace */
1800 0xffffffff, /* dst_mask */
1801 FALSE
), /* pcrel_offset */
1802 HOWTO (R_ARM_FUNCDESC_VALUE
, /* type */
1804 2, /* size (0 = byte, 1 = short, 2 = long) */
1806 FALSE
, /* pc_relative */
1808 complain_overflow_bitfield
,/* complain_on_overflow */
1809 bfd_elf_generic_reloc
, /* special_function */
1810 "R_ARM_FUNCDESC_VALUE",/* name */
1811 FALSE
, /* partial_inplace */
1813 0xffffffff, /* dst_mask */
1814 FALSE
), /* pcrel_offset */
1815 HOWTO (R_ARM_TLS_GD32_FDPIC
, /* type */
1817 2, /* size (0 = byte, 1 = short, 2 = long) */
1819 FALSE
, /* pc_relative */
1821 complain_overflow_bitfield
,/* complain_on_overflow */
1822 bfd_elf_generic_reloc
, /* special_function */
1823 "R_ARM_TLS_GD32_FDPIC",/* name */
1824 FALSE
, /* partial_inplace */
1826 0xffffffff, /* dst_mask */
1827 FALSE
), /* pcrel_offset */
1828 HOWTO (R_ARM_TLS_LDM32_FDPIC
, /* type */
1830 2, /* size (0 = byte, 1 = short, 2 = long) */
1832 FALSE
, /* pc_relative */
1834 complain_overflow_bitfield
,/* complain_on_overflow */
1835 bfd_elf_generic_reloc
, /* special_function */
1836 "R_ARM_TLS_LDM32_FDPIC",/* name */
1837 FALSE
, /* partial_inplace */
1839 0xffffffff, /* dst_mask */
1840 FALSE
), /* pcrel_offset */
1841 HOWTO (R_ARM_TLS_IE32_FDPIC
, /* type */
1843 2, /* size (0 = byte, 1 = short, 2 = long) */
1845 FALSE
, /* pc_relative */
1847 complain_overflow_bitfield
,/* complain_on_overflow */
1848 bfd_elf_generic_reloc
, /* special_function */
1849 "R_ARM_TLS_IE32_FDPIC",/* name */
1850 FALSE
, /* partial_inplace */
1852 0xffffffff, /* dst_mask */
1853 FALSE
), /* pcrel_offset */
1856 /* 249-255 extended, currently unused, relocations: */
1857 static reloc_howto_type elf32_arm_howto_table_3
[4] =
1859 HOWTO (R_ARM_RREL32
, /* type */
1861 0, /* size (0 = byte, 1 = short, 2 = long) */
1863 FALSE
, /* pc_relative */
1865 complain_overflow_dont
,/* complain_on_overflow */
1866 bfd_elf_generic_reloc
, /* special_function */
1867 "R_ARM_RREL32", /* name */
1868 FALSE
, /* partial_inplace */
1871 FALSE
), /* pcrel_offset */
1873 HOWTO (R_ARM_RABS32
, /* type */
1875 0, /* size (0 = byte, 1 = short, 2 = long) */
1877 FALSE
, /* pc_relative */
1879 complain_overflow_dont
,/* complain_on_overflow */
1880 bfd_elf_generic_reloc
, /* special_function */
1881 "R_ARM_RABS32", /* name */
1882 FALSE
, /* partial_inplace */
1885 FALSE
), /* pcrel_offset */
1887 HOWTO (R_ARM_RPC24
, /* type */
1889 0, /* size (0 = byte, 1 = short, 2 = long) */
1891 FALSE
, /* pc_relative */
1893 complain_overflow_dont
,/* complain_on_overflow */
1894 bfd_elf_generic_reloc
, /* special_function */
1895 "R_ARM_RPC24", /* name */
1896 FALSE
, /* partial_inplace */
1899 FALSE
), /* pcrel_offset */
1901 HOWTO (R_ARM_RBASE
, /* type */
1903 0, /* size (0 = byte, 1 = short, 2 = long) */
1905 FALSE
, /* pc_relative */
1907 complain_overflow_dont
,/* complain_on_overflow */
1908 bfd_elf_generic_reloc
, /* special_function */
1909 "R_ARM_RBASE", /* name */
1910 FALSE
, /* partial_inplace */
1913 FALSE
) /* pcrel_offset */
1916 static reloc_howto_type
*
1917 elf32_arm_howto_from_type (unsigned int r_type
)
1919 if (r_type
< ARRAY_SIZE (elf32_arm_howto_table_1
))
1920 return &elf32_arm_howto_table_1
[r_type
];
1922 if (r_type
>= R_ARM_IRELATIVE
1923 && r_type
< R_ARM_IRELATIVE
+ ARRAY_SIZE (elf32_arm_howto_table_2
))
1924 return &elf32_arm_howto_table_2
[r_type
- R_ARM_IRELATIVE
];
1926 if (r_type
>= R_ARM_RREL32
1927 && r_type
< R_ARM_RREL32
+ ARRAY_SIZE (elf32_arm_howto_table_3
))
1928 return &elf32_arm_howto_table_3
[r_type
- R_ARM_RREL32
];
1934 elf32_arm_info_to_howto (bfd
* abfd
, arelent
* bfd_reloc
,
1935 Elf_Internal_Rela
* elf_reloc
)
1937 unsigned int r_type
;
1939 r_type
= ELF32_R_TYPE (elf_reloc
->r_info
);
1940 if ((bfd_reloc
->howto
= elf32_arm_howto_from_type (r_type
)) == NULL
)
1942 /* xgettext:c-format */
1943 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
1945 bfd_set_error (bfd_error_bad_value
);
1951 struct elf32_arm_reloc_map
1953 bfd_reloc_code_real_type bfd_reloc_val
;
1954 unsigned char elf_reloc_val
;
1957 /* All entries in this list must also be present in elf32_arm_howto_table. */
1958 static const struct elf32_arm_reloc_map elf32_arm_reloc_map
[] =
1960 {BFD_RELOC_NONE
, R_ARM_NONE
},
1961 {BFD_RELOC_ARM_PCREL_BRANCH
, R_ARM_PC24
},
1962 {BFD_RELOC_ARM_PCREL_CALL
, R_ARM_CALL
},
1963 {BFD_RELOC_ARM_PCREL_JUMP
, R_ARM_JUMP24
},
1964 {BFD_RELOC_ARM_PCREL_BLX
, R_ARM_XPC25
},
1965 {BFD_RELOC_THUMB_PCREL_BLX
, R_ARM_THM_XPC22
},
1966 {BFD_RELOC_32
, R_ARM_ABS32
},
1967 {BFD_RELOC_32_PCREL
, R_ARM_REL32
},
1968 {BFD_RELOC_8
, R_ARM_ABS8
},
1969 {BFD_RELOC_16
, R_ARM_ABS16
},
1970 {BFD_RELOC_ARM_OFFSET_IMM
, R_ARM_ABS12
},
1971 {BFD_RELOC_ARM_THUMB_OFFSET
, R_ARM_THM_ABS5
},
1972 {BFD_RELOC_THUMB_PCREL_BRANCH25
, R_ARM_THM_JUMP24
},
1973 {BFD_RELOC_THUMB_PCREL_BRANCH23
, R_ARM_THM_CALL
},
1974 {BFD_RELOC_THUMB_PCREL_BRANCH12
, R_ARM_THM_JUMP11
},
1975 {BFD_RELOC_THUMB_PCREL_BRANCH20
, R_ARM_THM_JUMP19
},
1976 {BFD_RELOC_THUMB_PCREL_BRANCH9
, R_ARM_THM_JUMP8
},
1977 {BFD_RELOC_THUMB_PCREL_BRANCH7
, R_ARM_THM_JUMP6
},
1978 {BFD_RELOC_ARM_GLOB_DAT
, R_ARM_GLOB_DAT
},
1979 {BFD_RELOC_ARM_JUMP_SLOT
, R_ARM_JUMP_SLOT
},
1980 {BFD_RELOC_ARM_RELATIVE
, R_ARM_RELATIVE
},
1981 {BFD_RELOC_ARM_GOTOFF
, R_ARM_GOTOFF32
},
1982 {BFD_RELOC_ARM_GOTPC
, R_ARM_GOTPC
},
1983 {BFD_RELOC_ARM_GOT_PREL
, R_ARM_GOT_PREL
},
1984 {BFD_RELOC_ARM_GOT32
, R_ARM_GOT32
},
1985 {BFD_RELOC_ARM_PLT32
, R_ARM_PLT32
},
1986 {BFD_RELOC_ARM_TARGET1
, R_ARM_TARGET1
},
1987 {BFD_RELOC_ARM_ROSEGREL32
, R_ARM_ROSEGREL32
},
1988 {BFD_RELOC_ARM_SBREL32
, R_ARM_SBREL32
},
1989 {BFD_RELOC_ARM_PREL31
, R_ARM_PREL31
},
1990 {BFD_RELOC_ARM_TARGET2
, R_ARM_TARGET2
},
1991 {BFD_RELOC_ARM_PLT32
, R_ARM_PLT32
},
1992 {BFD_RELOC_ARM_TLS_GOTDESC
, R_ARM_TLS_GOTDESC
},
1993 {BFD_RELOC_ARM_TLS_CALL
, R_ARM_TLS_CALL
},
1994 {BFD_RELOC_ARM_THM_TLS_CALL
, R_ARM_THM_TLS_CALL
},
1995 {BFD_RELOC_ARM_TLS_DESCSEQ
, R_ARM_TLS_DESCSEQ
},
1996 {BFD_RELOC_ARM_THM_TLS_DESCSEQ
, R_ARM_THM_TLS_DESCSEQ
},
1997 {BFD_RELOC_ARM_TLS_DESC
, R_ARM_TLS_DESC
},
1998 {BFD_RELOC_ARM_TLS_GD32
, R_ARM_TLS_GD32
},
1999 {BFD_RELOC_ARM_TLS_LDO32
, R_ARM_TLS_LDO32
},
2000 {BFD_RELOC_ARM_TLS_LDM32
, R_ARM_TLS_LDM32
},
2001 {BFD_RELOC_ARM_TLS_DTPMOD32
, R_ARM_TLS_DTPMOD32
},
2002 {BFD_RELOC_ARM_TLS_DTPOFF32
, R_ARM_TLS_DTPOFF32
},
2003 {BFD_RELOC_ARM_TLS_TPOFF32
, R_ARM_TLS_TPOFF32
},
2004 {BFD_RELOC_ARM_TLS_IE32
, R_ARM_TLS_IE32
},
2005 {BFD_RELOC_ARM_TLS_LE32
, R_ARM_TLS_LE32
},
2006 {BFD_RELOC_ARM_IRELATIVE
, R_ARM_IRELATIVE
},
2007 {BFD_RELOC_ARM_GOTFUNCDESC
, R_ARM_GOTFUNCDESC
},
2008 {BFD_RELOC_ARM_GOTOFFFUNCDESC
, R_ARM_GOTOFFFUNCDESC
},
2009 {BFD_RELOC_ARM_FUNCDESC
, R_ARM_FUNCDESC
},
2010 {BFD_RELOC_ARM_FUNCDESC_VALUE
, R_ARM_FUNCDESC_VALUE
},
2011 {BFD_RELOC_ARM_TLS_GD32_FDPIC
, R_ARM_TLS_GD32_FDPIC
},
2012 {BFD_RELOC_ARM_TLS_LDM32_FDPIC
, R_ARM_TLS_LDM32_FDPIC
},
2013 {BFD_RELOC_ARM_TLS_IE32_FDPIC
, R_ARM_TLS_IE32_FDPIC
},
2014 {BFD_RELOC_VTABLE_INHERIT
, R_ARM_GNU_VTINHERIT
},
2015 {BFD_RELOC_VTABLE_ENTRY
, R_ARM_GNU_VTENTRY
},
2016 {BFD_RELOC_ARM_MOVW
, R_ARM_MOVW_ABS_NC
},
2017 {BFD_RELOC_ARM_MOVT
, R_ARM_MOVT_ABS
},
2018 {BFD_RELOC_ARM_MOVW_PCREL
, R_ARM_MOVW_PREL_NC
},
2019 {BFD_RELOC_ARM_MOVT_PCREL
, R_ARM_MOVT_PREL
},
2020 {BFD_RELOC_ARM_THUMB_MOVW
, R_ARM_THM_MOVW_ABS_NC
},
2021 {BFD_RELOC_ARM_THUMB_MOVT
, R_ARM_THM_MOVT_ABS
},
2022 {BFD_RELOC_ARM_THUMB_MOVW_PCREL
, R_ARM_THM_MOVW_PREL_NC
},
2023 {BFD_RELOC_ARM_THUMB_MOVT_PCREL
, R_ARM_THM_MOVT_PREL
},
2024 {BFD_RELOC_ARM_ALU_PC_G0_NC
, R_ARM_ALU_PC_G0_NC
},
2025 {BFD_RELOC_ARM_ALU_PC_G0
, R_ARM_ALU_PC_G0
},
2026 {BFD_RELOC_ARM_ALU_PC_G1_NC
, R_ARM_ALU_PC_G1_NC
},
2027 {BFD_RELOC_ARM_ALU_PC_G1
, R_ARM_ALU_PC_G1
},
2028 {BFD_RELOC_ARM_ALU_PC_G2
, R_ARM_ALU_PC_G2
},
2029 {BFD_RELOC_ARM_LDR_PC_G0
, R_ARM_LDR_PC_G0
},
2030 {BFD_RELOC_ARM_LDR_PC_G1
, R_ARM_LDR_PC_G1
},
2031 {BFD_RELOC_ARM_LDR_PC_G2
, R_ARM_LDR_PC_G2
},
2032 {BFD_RELOC_ARM_LDRS_PC_G0
, R_ARM_LDRS_PC_G0
},
2033 {BFD_RELOC_ARM_LDRS_PC_G1
, R_ARM_LDRS_PC_G1
},
2034 {BFD_RELOC_ARM_LDRS_PC_G2
, R_ARM_LDRS_PC_G2
},
2035 {BFD_RELOC_ARM_LDC_PC_G0
, R_ARM_LDC_PC_G0
},
2036 {BFD_RELOC_ARM_LDC_PC_G1
, R_ARM_LDC_PC_G1
},
2037 {BFD_RELOC_ARM_LDC_PC_G2
, R_ARM_LDC_PC_G2
},
2038 {BFD_RELOC_ARM_ALU_SB_G0_NC
, R_ARM_ALU_SB_G0_NC
},
2039 {BFD_RELOC_ARM_ALU_SB_G0
, R_ARM_ALU_SB_G0
},
2040 {BFD_RELOC_ARM_ALU_SB_G1_NC
, R_ARM_ALU_SB_G1_NC
},
2041 {BFD_RELOC_ARM_ALU_SB_G1
, R_ARM_ALU_SB_G1
},
2042 {BFD_RELOC_ARM_ALU_SB_G2
, R_ARM_ALU_SB_G2
},
2043 {BFD_RELOC_ARM_LDR_SB_G0
, R_ARM_LDR_SB_G0
},
2044 {BFD_RELOC_ARM_LDR_SB_G1
, R_ARM_LDR_SB_G1
},
2045 {BFD_RELOC_ARM_LDR_SB_G2
, R_ARM_LDR_SB_G2
},
2046 {BFD_RELOC_ARM_LDRS_SB_G0
, R_ARM_LDRS_SB_G0
},
2047 {BFD_RELOC_ARM_LDRS_SB_G1
, R_ARM_LDRS_SB_G1
},
2048 {BFD_RELOC_ARM_LDRS_SB_G2
, R_ARM_LDRS_SB_G2
},
2049 {BFD_RELOC_ARM_LDC_SB_G0
, R_ARM_LDC_SB_G0
},
2050 {BFD_RELOC_ARM_LDC_SB_G1
, R_ARM_LDC_SB_G1
},
2051 {BFD_RELOC_ARM_LDC_SB_G2
, R_ARM_LDC_SB_G2
},
2052 {BFD_RELOC_ARM_V4BX
, R_ARM_V4BX
},
2053 {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC
, R_ARM_THM_ALU_ABS_G3_NC
},
2054 {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC
, R_ARM_THM_ALU_ABS_G2_NC
},
2055 {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC
, R_ARM_THM_ALU_ABS_G1_NC
},
2056 {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC
, R_ARM_THM_ALU_ABS_G0_NC
}
2059 static reloc_howto_type
*
2060 elf32_arm_reloc_type_lookup (bfd
*abfd ATTRIBUTE_UNUSED
,
2061 bfd_reloc_code_real_type code
)
2065 for (i
= 0; i
< ARRAY_SIZE (elf32_arm_reloc_map
); i
++)
2066 if (elf32_arm_reloc_map
[i
].bfd_reloc_val
== code
)
2067 return elf32_arm_howto_from_type (elf32_arm_reloc_map
[i
].elf_reloc_val
);
2072 static reloc_howto_type
*
2073 elf32_arm_reloc_name_lookup (bfd
*abfd ATTRIBUTE_UNUSED
,
2078 for (i
= 0; i
< ARRAY_SIZE (elf32_arm_howto_table_1
); i
++)
2079 if (elf32_arm_howto_table_1
[i
].name
!= NULL
2080 && strcasecmp (elf32_arm_howto_table_1
[i
].name
, r_name
) == 0)
2081 return &elf32_arm_howto_table_1
[i
];
2083 for (i
= 0; i
< ARRAY_SIZE (elf32_arm_howto_table_2
); i
++)
2084 if (elf32_arm_howto_table_2
[i
].name
!= NULL
2085 && strcasecmp (elf32_arm_howto_table_2
[i
].name
, r_name
) == 0)
2086 return &elf32_arm_howto_table_2
[i
];
2088 for (i
= 0; i
< ARRAY_SIZE (elf32_arm_howto_table_3
); i
++)
2089 if (elf32_arm_howto_table_3
[i
].name
!= NULL
2090 && strcasecmp (elf32_arm_howto_table_3
[i
].name
, r_name
) == 0)
2091 return &elf32_arm_howto_table_3
[i
];
2096 /* Support for core dump NOTE sections. */
2099 elf32_arm_nabi_grok_prstatus (bfd
*abfd
, Elf_Internal_Note
*note
)
2104 switch (note
->descsz
)
2109 case 148: /* Linux/ARM 32-bit. */
2111 elf_tdata (abfd
)->core
->signal
= bfd_get_16 (abfd
, note
->descdata
+ 12);
2114 elf_tdata (abfd
)->core
->lwpid
= bfd_get_32 (abfd
, note
->descdata
+ 24);
2123 /* Make a ".reg/999" section. */
2124 return _bfd_elfcore_make_pseudosection (abfd
, ".reg",
2125 size
, note
->descpos
+ offset
);
2129 elf32_arm_nabi_grok_psinfo (bfd
*abfd
, Elf_Internal_Note
*note
)
2131 switch (note
->descsz
)
2136 case 124: /* Linux/ARM elf_prpsinfo. */
2137 elf_tdata (abfd
)->core
->pid
2138 = bfd_get_32 (abfd
, note
->descdata
+ 12);
2139 elf_tdata (abfd
)->core
->program
2140 = _bfd_elfcore_strndup (abfd
, note
->descdata
+ 28, 16);
2141 elf_tdata (abfd
)->core
->command
2142 = _bfd_elfcore_strndup (abfd
, note
->descdata
+ 44, 80);
2145 /* Note that for some reason, a spurious space is tacked
2146 onto the end of the args in some (at least one anyway)
2147 implementations, so strip it off if it exists. */
2149 char *command
= elf_tdata (abfd
)->core
->command
;
2150 int n
= strlen (command
);
2152 if (0 < n
&& command
[n
- 1] == ' ')
2153 command
[n
- 1] = '\0';
2160 elf32_arm_nabi_write_core_note (bfd
*abfd
, char *buf
, int *bufsiz
,
2170 char data
[124] ATTRIBUTE_NONSTRING
;
2173 va_start (ap
, note_type
);
2174 memset (data
, 0, sizeof (data
));
2175 strncpy (data
+ 28, va_arg (ap
, const char *), 16);
2176 #if GCC_VERSION == 8000 || GCC_VERSION == 8001
2178 /* GCC 8.0 and 8.1 warn about 80 equals destination size with
2179 -Wstringop-truncation:
2180 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85643
2182 DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION
;
2184 strncpy (data
+ 44, va_arg (ap
, const char *), 80);
2185 #if GCC_VERSION == 8000 || GCC_VERSION == 8001
2190 return elfcore_write_note (abfd
, buf
, bufsiz
,
2191 "CORE", note_type
, data
, sizeof (data
));
2202 va_start (ap
, note_type
);
2203 memset (data
, 0, sizeof (data
));
2204 pid
= va_arg (ap
, long);
2205 bfd_put_32 (abfd
, pid
, data
+ 24);
2206 cursig
= va_arg (ap
, int);
2207 bfd_put_16 (abfd
, cursig
, data
+ 12);
2208 greg
= va_arg (ap
, const void *);
2209 memcpy (data
+ 72, greg
, 72);
2212 return elfcore_write_note (abfd
, buf
, bufsiz
,
2213 "CORE", note_type
, data
, sizeof (data
));
2218 #define TARGET_LITTLE_SYM arm_elf32_le_vec
2219 #define TARGET_LITTLE_NAME "elf32-littlearm"
2220 #define TARGET_BIG_SYM arm_elf32_be_vec
2221 #define TARGET_BIG_NAME "elf32-bigarm"
2223 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2224 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2225 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2227 typedef unsigned long int insn32
;
2228 typedef unsigned short int insn16
;
2230 /* In lieu of proper flags, assume all EABIv4 or later objects are
2232 #define INTERWORK_FLAG(abfd) \
2233 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2234 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2235 || ((abfd)->flags & BFD_LINKER_CREATED))
2237 /* The linker script knows the section names for placement.
2238 The entry_names are used to do simple name mangling on the stubs.
2239 Given a function name, and its type, the stub can be found. The
2240 name can be changed. The only requirement is the %s be present. */
2241 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2242 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2244 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2245 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2247 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2248 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2250 #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer"
2251 #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "__stm32l4xx_veneer_%x"
2253 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2254 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2256 #define STUB_ENTRY_NAME "__%s_veneer"
2258 #define CMSE_PREFIX "__acle_se_"
2260 /* The name of the dynamic interpreter. This is put in the .interp
2262 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2264 /* FDPIC default stack size. */
2265 #define DEFAULT_STACK_SIZE 0x8000
2267 static const unsigned long tls_trampoline
[] =
2269 0xe08e0000, /* add r0, lr, r0 */
2270 0xe5901004, /* ldr r1, [r0,#4] */
2271 0xe12fff11, /* bx r1 */
2274 static const unsigned long dl_tlsdesc_lazy_trampoline
[] =
2276 0xe52d2004, /* push {r2} */
2277 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2278 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2279 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2280 0xe081100f, /* 2: add r1, pc */
2281 0xe12fff12, /* bx r2 */
2282 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2283 + dl_tlsdesc_lazy_resolver(GOT) */
2284 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2287 /* ARM FDPIC PLT entry. */
2288 /* The last 5 words contain PLT lazy fragment code and data. */
2289 static const bfd_vma elf32_arm_fdpic_plt_entry
[] =
2291 0xe59fc008, /* ldr r12, .L1 */
2292 0xe08cc009, /* add r12, r12, r9 */
2293 0xe59c9004, /* ldr r9, [r12, #4] */
2294 0xe59cf000, /* ldr pc, [r12] */
2295 0x00000000, /* L1. .word foo(GOTOFFFUNCDESC) */
2296 0x00000000, /* L1. .word foo(funcdesc_value_reloc_offset) */
2297 0xe51fc00c, /* ldr r12, [pc, #-12] */
2298 0xe92d1000, /* push {r12} */
2299 0xe599c004, /* ldr r12, [r9, #4] */
2300 0xe599f000, /* ldr pc, [r9] */
2303 /* Thumb FDPIC PLT entry. */
2304 /* The last 5 words contain PLT lazy fragment code and data. */
2305 static const bfd_vma elf32_arm_fdpic_thumb_plt_entry
[] =
2307 0xc00cf8df, /* ldr.w r12, .L1 */
2308 0x0c09eb0c, /* add.w r12, r12, r9 */
2309 0x9004f8dc, /* ldr.w r9, [r12, #4] */
2310 0xf000f8dc, /* ldr.w pc, [r12] */
2311 0x00000000, /* .L1 .word foo(GOTOFFFUNCDESC) */
2312 0x00000000, /* .L2 .word foo(funcdesc_value_reloc_offset) */
2313 0xc008f85f, /* ldr.w r12, .L2 */
2314 0xcd04f84d, /* push {r12} */
2315 0xc004f8d9, /* ldr.w r12, [r9, #4] */
2316 0xf000f8d9, /* ldr.w pc, [r9] */
2319 #ifdef FOUR_WORD_PLT
2321 /* The first entry in a procedure linkage table looks like
2322 this. It is set up so that any shared library function that is
2323 called before the relocation has been set up calls the dynamic
2325 static const bfd_vma elf32_arm_plt0_entry
[] =
2327 0xe52de004, /* str lr, [sp, #-4]! */
2328 0xe59fe010, /* ldr lr, [pc, #16] */
2329 0xe08fe00e, /* add lr, pc, lr */
2330 0xe5bef008, /* ldr pc, [lr, #8]! */
2333 /* Subsequent entries in a procedure linkage table look like
2335 static const bfd_vma elf32_arm_plt_entry
[] =
2337 0xe28fc600, /* add ip, pc, #NN */
2338 0xe28cca00, /* add ip, ip, #NN */
2339 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2340 0x00000000, /* unused */
2343 #else /* not FOUR_WORD_PLT */
2345 /* The first entry in a procedure linkage table looks like
2346 this. It is set up so that any shared library function that is
2347 called before the relocation has been set up calls the dynamic
2349 static const bfd_vma elf32_arm_plt0_entry
[] =
2351 0xe52de004, /* str lr, [sp, #-4]! */
2352 0xe59fe004, /* ldr lr, [pc, #4] */
2353 0xe08fe00e, /* add lr, pc, lr */
2354 0xe5bef008, /* ldr pc, [lr, #8]! */
2355 0x00000000, /* &GOT[0] - . */
2358 /* By default subsequent entries in a procedure linkage table look like
2359 this. Offsets that don't fit into 28 bits will cause link error. */
2360 static const bfd_vma elf32_arm_plt_entry_short
[] =
2362 0xe28fc600, /* add ip, pc, #0xNN00000 */
2363 0xe28cca00, /* add ip, ip, #0xNN000 */
2364 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2367 /* When explicitly asked, we'll use this "long" entry format
2368 which can cope with arbitrary displacements. */
2369 static const bfd_vma elf32_arm_plt_entry_long
[] =
2371 0xe28fc200, /* add ip, pc, #0xN0000000 */
2372 0xe28cc600, /* add ip, ip, #0xNN00000 */
2373 0xe28cca00, /* add ip, ip, #0xNN000 */
2374 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2377 static bfd_boolean elf32_arm_use_long_plt_entry
= FALSE
;
2379 #endif /* not FOUR_WORD_PLT */
2381 /* The first entry in a procedure linkage table looks like this.
2382 It is set up so that any shared library function that is called before the
2383 relocation has been set up calls the dynamic linker first. */
2384 static const bfd_vma elf32_thumb2_plt0_entry
[] =
2386 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2387 an instruction maybe encoded to one or two array elements. */
2388 0xf8dfb500, /* push {lr} */
2389 0x44fee008, /* ldr.w lr, [pc, #8] */
2391 0xff08f85e, /* ldr.w pc, [lr, #8]! */
2392 0x00000000, /* &GOT[0] - . */
2395 /* Subsequent entries in a procedure linkage table for thumb only target
2397 static const bfd_vma elf32_thumb2_plt_entry
[] =
2399 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2400 an instruction maybe encoded to one or two array elements. */
2401 0x0c00f240, /* movw ip, #0xNNNN */
2402 0x0c00f2c0, /* movt ip, #0xNNNN */
2403 0xf8dc44fc, /* add ip, pc */
2404 0xbf00f000 /* ldr.w pc, [ip] */
2408 /* The format of the first entry in the procedure linkage table
2409 for a VxWorks executable. */
2410 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry
[] =
2412 0xe52dc008, /* str ip,[sp,#-8]! */
2413 0xe59fc000, /* ldr ip,[pc] */
2414 0xe59cf008, /* ldr pc,[ip,#8] */
2415 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2418 /* The format of subsequent entries in a VxWorks executable. */
2419 static const bfd_vma elf32_arm_vxworks_exec_plt_entry
[] =
2421 0xe59fc000, /* ldr ip,[pc] */
2422 0xe59cf000, /* ldr pc,[ip] */
2423 0x00000000, /* .long @got */
2424 0xe59fc000, /* ldr ip,[pc] */
2425 0xea000000, /* b _PLT */
2426 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2429 /* The format of entries in a VxWorks shared library. */
2430 static const bfd_vma elf32_arm_vxworks_shared_plt_entry
[] =
2432 0xe59fc000, /* ldr ip,[pc] */
2433 0xe79cf009, /* ldr pc,[ip,r9] */
2434 0x00000000, /* .long @got */
2435 0xe59fc000, /* ldr ip,[pc] */
2436 0xe599f008, /* ldr pc,[r9,#8] */
2437 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2440 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2441 #define PLT_THUMB_STUB_SIZE 4
2442 static const bfd_vma elf32_arm_plt_thumb_stub
[] =
2448 /* The entries in a PLT when using a DLL-based target with multiple
2450 static const bfd_vma elf32_arm_symbian_plt_entry
[] =
2452 0xe51ff004, /* ldr pc, [pc, #-4] */
2453 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2456 /* The first entry in a procedure linkage table looks like
2457 this. It is set up so that any shared library function that is
2458 called before the relocation has been set up calls the dynamic
2460 static const bfd_vma elf32_arm_nacl_plt0_entry
[] =
2463 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2464 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2465 0xe08cc00f, /* add ip, ip, pc */
2466 0xe52dc008, /* str ip, [sp, #-8]! */
2467 /* Second bundle: */
2468 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2469 0xe59cc000, /* ldr ip, [ip] */
2470 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2471 0xe12fff1c, /* bx ip */
2473 0xe320f000, /* nop */
2474 0xe320f000, /* nop */
2475 0xe320f000, /* nop */
2477 0xe50dc004, /* str ip, [sp, #-4] */
2478 /* Fourth bundle: */
2479 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2480 0xe59cc000, /* ldr ip, [ip] */
2481 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2482 0xe12fff1c, /* bx ip */
2484 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2486 /* Subsequent entries in a procedure linkage table look like this. */
2487 static const bfd_vma elf32_arm_nacl_plt_entry
[] =
2489 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2490 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2491 0xe08cc00f, /* add ip, ip, pc */
2492 0xea000000, /* b .Lplt_tail */
2495 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2496 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2497 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2498 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2499 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2500 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2501 #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4)
2502 #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4)
2512 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2513 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2514 is inserted in arm_build_one_stub(). */
2515 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2516 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2517 #define THUMB32_MOVT(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVT_ABS, 0}
2518 #define THUMB32_MOVW(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVW_ABS_NC, 0}
2519 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2520 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2521 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2522 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2527 enum stub_insn_type type
;
2528 unsigned int r_type
;
2532 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2533 to reach the stub if necessary. */
2534 static const insn_sequence elf32_arm_stub_long_branch_any_any
[] =
2536 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2537 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2540 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2542 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb
[] =
2544 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2545 ARM_INSN (0xe12fff1c), /* bx ip */
2546 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2549 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2550 static const insn_sequence elf32_arm_stub_long_branch_thumb_only
[] =
2552 THUMB16_INSN (0xb401), /* push {r0} */
2553 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2554 THUMB16_INSN (0x4684), /* mov ip, r0 */
2555 THUMB16_INSN (0xbc01), /* pop {r0} */
2556 THUMB16_INSN (0x4760), /* bx ip */
2557 THUMB16_INSN (0xbf00), /* nop */
2558 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2561 /* Thumb -> Thumb long branch stub in thumb2 encoding. Used on armv7. */
2562 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only
[] =
2564 THUMB32_INSN (0xf85ff000), /* ldr.w pc, [pc, #-0] */
2565 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(x) */
2568 /* Thumb -> Thumb long branch stub. Used for PureCode sections on Thumb2
2569 M-profile architectures. */
2570 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only_pure
[] =
2572 THUMB32_MOVW (0xf2400c00), /* mov.w ip, R_ARM_MOVW_ABS_NC */
2573 THUMB32_MOVT (0xf2c00c00), /* movt ip, R_ARM_MOVT_ABS << 16 */
2574 THUMB16_INSN (0x4760), /* bx ip */
2577 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2579 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb
[] =
2581 THUMB16_INSN (0x4778), /* bx pc */
2582 THUMB16_INSN (0x46c0), /* nop */
2583 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2584 ARM_INSN (0xe12fff1c), /* bx ip */
2585 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2588 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2590 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm
[] =
2592 THUMB16_INSN (0x4778), /* bx pc */
2593 THUMB16_INSN (0x46c0), /* nop */
2594 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2595 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2598 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2599 one, when the destination is close enough. */
2600 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm
[] =
2602 THUMB16_INSN (0x4778), /* bx pc */
2603 THUMB16_INSN (0x46c0), /* nop */
2604 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2607 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2608 blx to reach the stub if necessary. */
2609 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic
[] =
2611 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2612 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2613 DATA_WORD (0, R_ARM_REL32
, -4), /* dcd R_ARM_REL32(X-4) */
2616 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2617 blx to reach the stub if necessary. We can not add into pc;
2618 it is not guaranteed to mode switch (different in ARMv6 and
2620 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic
[] =
2622 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2623 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2624 ARM_INSN (0xe12fff1c), /* bx ip */
2625 DATA_WORD (0, R_ARM_REL32
, 0), /* dcd R_ARM_REL32(X) */
2628 /* V4T ARM -> ARM long branch stub, PIC. */
2629 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic
[] =
2631 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2632 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2633 ARM_INSN (0xe12fff1c), /* bx ip */
2634 DATA_WORD (0, R_ARM_REL32
, 0), /* dcd R_ARM_REL32(X) */
2637 /* V4T Thumb -> ARM long branch stub, PIC. */
2638 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic
[] =
2640 THUMB16_INSN (0x4778), /* bx pc */
2641 THUMB16_INSN (0x46c0), /* nop */
2642 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2643 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2644 DATA_WORD (0, R_ARM_REL32
, -4), /* dcd R_ARM_REL32(X) */
2647 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2649 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic
[] =
2651 THUMB16_INSN (0xb401), /* push {r0} */
2652 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2653 THUMB16_INSN (0x46fc), /* mov ip, pc */
2654 THUMB16_INSN (0x4484), /* add ip, r0 */
2655 THUMB16_INSN (0xbc01), /* pop {r0} */
2656 THUMB16_INSN (0x4760), /* bx ip */
2657 DATA_WORD (0, R_ARM_REL32
, 4), /* dcd R_ARM_REL32(X) */
2660 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2662 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic
[] =
2664 THUMB16_INSN (0x4778), /* bx pc */
2665 THUMB16_INSN (0x46c0), /* nop */
2666 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2667 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2668 ARM_INSN (0xe12fff1c), /* bx ip */
2669 DATA_WORD (0, R_ARM_REL32
, 0), /* dcd R_ARM_REL32(X) */
2672 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2673 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2674 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic
[] =
2676 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2677 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2678 DATA_WORD (0, R_ARM_REL32
, -4), /* dcd R_ARM_REL32(X-4) */
2681 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2682 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2683 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic
[] =
2685 THUMB16_INSN (0x4778), /* bx pc */
2686 THUMB16_INSN (0x46c0), /* nop */
2687 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2688 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2689 DATA_WORD (0, R_ARM_REL32
, -4), /* dcd R_ARM_REL32(X) */
2692 /* NaCl ARM -> ARM long branch stub. */
2693 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl
[] =
2695 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2696 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2697 ARM_INSN (0xe12fff1c), /* bx ip */
2698 ARM_INSN (0xe320f000), /* nop */
2699 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2700 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2701 DATA_WORD (0, R_ARM_NONE
, 0), /* .word 0 */
2702 DATA_WORD (0, R_ARM_NONE
, 0), /* .word 0 */
2705 /* NaCl ARM -> ARM long branch stub, PIC. */
2706 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic
[] =
2708 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2709 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2710 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2711 ARM_INSN (0xe12fff1c), /* bx ip */
2712 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2713 DATA_WORD (0, R_ARM_REL32
, 8), /* dcd R_ARM_REL32(X+8) */
2714 DATA_WORD (0, R_ARM_NONE
, 0), /* .word 0 */
2715 DATA_WORD (0, R_ARM_NONE
, 0), /* .word 0 */
2718 /* Stub used for transition to secure state (aka SG veneer). */
2719 static const insn_sequence elf32_arm_stub_cmse_branch_thumb_only
[] =
2721 THUMB32_INSN (0xe97fe97f), /* sg. */
2722 THUMB32_B_INSN (0xf000b800, -4), /* b.w original_branch_dest. */
2726 /* Cortex-A8 erratum-workaround stubs. */
2728 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2729 can't use a conditional branch to reach this stub). */
2731 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond
[] =
2733 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2734 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2735 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2738 /* Stub used for b.w and bl.w instructions. */
2740 static const insn_sequence elf32_arm_stub_a8_veneer_b
[] =
2742 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2745 static const insn_sequence elf32_arm_stub_a8_veneer_bl
[] =
2747 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2750 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2751 instruction (which switches to ARM mode) to point to this stub. Jump to the
2752 real destination using an ARM-mode branch. */
2754 static const insn_sequence elf32_arm_stub_a8_veneer_blx
[] =
2756 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2759 /* For each section group there can be a specially created linker section
2760 to hold the stubs for that group. The name of the stub section is based
2761 upon the name of another section within that group with the suffix below
2764 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2765 create what appeared to be a linker stub section when it actually
2766 contained user code/data. For example, consider this fragment:
2768 const char * stubborn_problems[] = { "np" };
2770 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2773 .data.rel.local.stubborn_problems
2775 This then causes problems in arm32_arm_build_stubs() as it triggers:
2777 // Ignore non-stub sections.
2778 if (!strstr (stub_sec->name, STUB_SUFFIX))
2781 And so the section would be ignored instead of being processed. Hence
2782 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2784 #define STUB_SUFFIX ".__stub"
2786 /* One entry per long/short branch stub defined above. */
2788 DEF_STUB(long_branch_any_any) \
2789 DEF_STUB(long_branch_v4t_arm_thumb) \
2790 DEF_STUB(long_branch_thumb_only) \
2791 DEF_STUB(long_branch_v4t_thumb_thumb) \
2792 DEF_STUB(long_branch_v4t_thumb_arm) \
2793 DEF_STUB(short_branch_v4t_thumb_arm) \
2794 DEF_STUB(long_branch_any_arm_pic) \
2795 DEF_STUB(long_branch_any_thumb_pic) \
2796 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2797 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2798 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2799 DEF_STUB(long_branch_thumb_only_pic) \
2800 DEF_STUB(long_branch_any_tls_pic) \
2801 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2802 DEF_STUB(long_branch_arm_nacl) \
2803 DEF_STUB(long_branch_arm_nacl_pic) \
2804 DEF_STUB(cmse_branch_thumb_only) \
2805 DEF_STUB(a8_veneer_b_cond) \
2806 DEF_STUB(a8_veneer_b) \
2807 DEF_STUB(a8_veneer_bl) \
2808 DEF_STUB(a8_veneer_blx) \
2809 DEF_STUB(long_branch_thumb2_only) \
2810 DEF_STUB(long_branch_thumb2_only_pure)
2812 #define DEF_STUB(x) arm_stub_##x,
2813 enum elf32_arm_stub_type
2821 /* Note the first a8_veneer type. */
2822 const unsigned arm_stub_a8_veneer_lwm
= arm_stub_a8_veneer_b_cond
;
2826 const insn_sequence
* template_sequence
;
2830 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2831 static const stub_def stub_definitions
[] =
2837 struct elf32_arm_stub_hash_entry
2839 /* Base hash table entry structure. */
2840 struct bfd_hash_entry root
;
2842 /* The stub section. */
2845 /* Offset within stub_sec of the beginning of this stub. */
2846 bfd_vma stub_offset
;
2848 /* Given the symbol's value and its section we can determine its final
2849 value when building the stubs (so the stub knows where to jump). */
2850 bfd_vma target_value
;
2851 asection
*target_section
;
2853 /* Same as above but for the source of the branch to the stub. Used for
2854 Cortex-A8 erratum workaround to patch it to branch to the stub. As
2855 such, source section does not need to be recorded since Cortex-A8 erratum
2856 workaround stubs are only generated when both source and target are in the
2858 bfd_vma source_value
;
2860 /* The instruction which caused this stub to be generated (only valid for
2861 Cortex-A8 erratum workaround stubs at present). */
2862 unsigned long orig_insn
;
2864 /* The stub type. */
2865 enum elf32_arm_stub_type stub_type
;
2866 /* Its encoding size in bytes. */
2869 const insn_sequence
*stub_template
;
2870 /* The size of the template (number of entries). */
2871 int stub_template_size
;
2873 /* The symbol table entry, if any, that this was derived from. */
2874 struct elf32_arm_link_hash_entry
*h
;
2876 /* Type of branch. */
2877 enum arm_st_branch_type branch_type
;
2879 /* Where this stub is being called from, or, in the case of combined
2880 stub sections, the first input section in the group. */
2883 /* The name for the local symbol at the start of this stub. The
2884 stub name in the hash table has to be unique; this does not, so
2885 it can be friendlier. */
2889 /* Used to build a map of a section. This is required for mixed-endian
2892 typedef struct elf32_elf_section_map
2897 elf32_arm_section_map
;
2899 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2903 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER
,
2904 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER
,
2905 VFP11_ERRATUM_ARM_VENEER
,
2906 VFP11_ERRATUM_THUMB_VENEER
2908 elf32_vfp11_erratum_type
;
2910 typedef struct elf32_vfp11_erratum_list
2912 struct elf32_vfp11_erratum_list
*next
;
2918 struct elf32_vfp11_erratum_list
*veneer
;
2919 unsigned int vfp_insn
;
2923 struct elf32_vfp11_erratum_list
*branch
;
2927 elf32_vfp11_erratum_type type
;
2929 elf32_vfp11_erratum_list
;
2931 /* Information about a STM32L4XX erratum veneer, or a branch to such a
2935 STM32L4XX_ERRATUM_BRANCH_TO_VENEER
,
2936 STM32L4XX_ERRATUM_VENEER
2938 elf32_stm32l4xx_erratum_type
;
2940 typedef struct elf32_stm32l4xx_erratum_list
2942 struct elf32_stm32l4xx_erratum_list
*next
;
2948 struct elf32_stm32l4xx_erratum_list
*veneer
;
2953 struct elf32_stm32l4xx_erratum_list
*branch
;
2957 elf32_stm32l4xx_erratum_type type
;
2959 elf32_stm32l4xx_erratum_list
;
2964 INSERT_EXIDX_CANTUNWIND_AT_END
2966 arm_unwind_edit_type
;
2968 /* A (sorted) list of edits to apply to an unwind table. */
2969 typedef struct arm_unwind_table_edit
2971 arm_unwind_edit_type type
;
2972 /* Note: we sometimes want to insert an unwind entry corresponding to a
2973 section different from the one we're currently writing out, so record the
2974 (text) section this edit relates to here. */
2975 asection
*linked_section
;
2977 struct arm_unwind_table_edit
*next
;
2979 arm_unwind_table_edit
;
2981 typedef struct _arm_elf_section_data
2983 /* Information about mapping symbols. */
2984 struct bfd_elf_section_data elf
;
2985 unsigned int mapcount
;
2986 unsigned int mapsize
;
2987 elf32_arm_section_map
*map
;
2988 /* Information about CPU errata. */
2989 unsigned int erratumcount
;
2990 elf32_vfp11_erratum_list
*erratumlist
;
2991 unsigned int stm32l4xx_erratumcount
;
2992 elf32_stm32l4xx_erratum_list
*stm32l4xx_erratumlist
;
2993 unsigned int additional_reloc_count
;
2994 /* Information about unwind tables. */
2997 /* Unwind info attached to a text section. */
3000 asection
*arm_exidx_sec
;
3003 /* Unwind info attached to an .ARM.exidx section. */
3006 arm_unwind_table_edit
*unwind_edit_list
;
3007 arm_unwind_table_edit
*unwind_edit_tail
;
3011 _arm_elf_section_data
;
3013 #define elf32_arm_section_data(sec) \
3014 ((_arm_elf_section_data *) elf_section_data (sec))
3016 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
3017 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
3018 so may be created multiple times: we use an array of these entries whilst
3019 relaxing which we can refresh easily, then create stubs for each potentially
3020 erratum-triggering instruction once we've settled on a solution. */
3022 struct a8_erratum_fix
3027 bfd_vma target_offset
;
3028 unsigned long orig_insn
;
3030 enum elf32_arm_stub_type stub_type
;
3031 enum arm_st_branch_type branch_type
;
3034 /* A table of relocs applied to branches which might trigger Cortex-A8
3037 struct a8_erratum_reloc
3040 bfd_vma destination
;
3041 struct elf32_arm_link_hash_entry
*hash
;
3042 const char *sym_name
;
3043 unsigned int r_type
;
3044 enum arm_st_branch_type branch_type
;
3045 bfd_boolean non_a8_stub
;
3048 /* The size of the thread control block. */
3051 /* ARM-specific information about a PLT entry, over and above the usual
3055 /* We reference count Thumb references to a PLT entry separately,
3056 so that we can emit the Thumb trampoline only if needed. */
3057 bfd_signed_vma thumb_refcount
;
3059 /* Some references from Thumb code may be eliminated by BL->BLX
3060 conversion, so record them separately. */
3061 bfd_signed_vma maybe_thumb_refcount
;
3063 /* How many of the recorded PLT accesses were from non-call relocations.
3064 This information is useful when deciding whether anything takes the
3065 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
3066 non-call references to the function should resolve directly to the
3067 real runtime target. */
3068 unsigned int noncall_refcount
;
3070 /* Since PLT entries have variable size if the Thumb prologue is
3071 used, we need to record the index into .got.plt instead of
3072 recomputing it from the PLT offset. */
3073 bfd_signed_vma got_offset
;
3076 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
3077 struct arm_local_iplt_info
3079 /* The information that is usually found in the generic ELF part of
3080 the hash table entry. */
3081 union gotplt_union root
;
3083 /* The information that is usually found in the ARM-specific part of
3084 the hash table entry. */
3085 struct arm_plt_info arm
;
3087 /* A list of all potential dynamic relocations against this symbol. */
3088 struct elf_dyn_relocs
*dyn_relocs
;
3091 /* Structure to handle FDPIC support for local functions. */
3092 struct fdpic_local
{
3093 unsigned int funcdesc_cnt
;
3094 unsigned int gotofffuncdesc_cnt
;
3095 int funcdesc_offset
;
3098 struct elf_arm_obj_tdata
3100 struct elf_obj_tdata root
;
3102 /* tls_type for each local got entry. */
3103 char *local_got_tls_type
;
3105 /* GOTPLT entries for TLS descriptors. */
3106 bfd_vma
*local_tlsdesc_gotent
;
3108 /* Information for local symbols that need entries in .iplt. */
3109 struct arm_local_iplt_info
**local_iplt
;
3111 /* Zero to warn when linking objects with incompatible enum sizes. */
3112 int no_enum_size_warning
;
3114 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
3115 int no_wchar_size_warning
;
3117 /* Maintains FDPIC counters and funcdesc info. */
3118 struct fdpic_local
*local_fdpic_cnts
;
3121 #define elf_arm_tdata(bfd) \
3122 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
3124 #define elf32_arm_local_got_tls_type(bfd) \
3125 (elf_arm_tdata (bfd)->local_got_tls_type)
3127 #define elf32_arm_local_tlsdesc_gotent(bfd) \
3128 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
3130 #define elf32_arm_local_iplt(bfd) \
3131 (elf_arm_tdata (bfd)->local_iplt)
3133 #define elf32_arm_local_fdpic_cnts(bfd) \
3134 (elf_arm_tdata (bfd)->local_fdpic_cnts)
3136 #define is_arm_elf(bfd) \
3137 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
3138 && elf_tdata (bfd) != NULL \
3139 && elf_object_id (bfd) == ARM_ELF_DATA)
3142 elf32_arm_mkobject (bfd
*abfd
)
3144 return bfd_elf_allocate_object (abfd
, sizeof (struct elf_arm_obj_tdata
),
3148 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
3150 /* Structure to handle FDPIC support for extern functions. */
3151 struct fdpic_global
{
3152 unsigned int gotofffuncdesc_cnt
;
3153 unsigned int gotfuncdesc_cnt
;
3154 unsigned int funcdesc_cnt
;
3155 int funcdesc_offset
;
3156 int gotfuncdesc_offset
;
3159 /* Arm ELF linker hash entry. */
3160 struct elf32_arm_link_hash_entry
3162 struct elf_link_hash_entry root
;
3164 /* Track dynamic relocs copied for this symbol. */
3165 struct elf_dyn_relocs
*dyn_relocs
;
3167 /* ARM-specific PLT information. */
3168 struct arm_plt_info plt
;
3170 #define GOT_UNKNOWN 0
3171 #define GOT_NORMAL 1
3172 #define GOT_TLS_GD 2
3173 #define GOT_TLS_IE 4
3174 #define GOT_TLS_GDESC 8
3175 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
3176 unsigned int tls_type
: 8;
3178 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
3179 unsigned int is_iplt
: 1;
3181 unsigned int unused
: 23;
3183 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
3184 starting at the end of the jump table. */
3185 bfd_vma tlsdesc_got
;
3187 /* The symbol marking the real symbol location for exported thumb
3188 symbols with Arm stubs. */
3189 struct elf_link_hash_entry
*export_glue
;
3191 /* A pointer to the most recently used stub hash entry against this
3193 struct elf32_arm_stub_hash_entry
*stub_cache
;
3195 /* Counter for FDPIC relocations against this symbol. */
3196 struct fdpic_global fdpic_cnts
;
3199 /* Traverse an arm ELF linker hash table. */
3200 #define elf32_arm_link_hash_traverse(table, func, info) \
3201 (elf_link_hash_traverse \
3203 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
3206 /* Get the ARM elf linker hash table from a link_info structure. */
3207 #define elf32_arm_hash_table(info) \
3208 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
3209 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
3211 #define arm_stub_hash_lookup(table, string, create, copy) \
3212 ((struct elf32_arm_stub_hash_entry *) \
3213 bfd_hash_lookup ((table), (string), (create), (copy)))
3215 /* Array to keep track of which stub sections have been created, and
3216 information on stub grouping. */
3219 /* This is the section to which stubs in the group will be
3222 /* The stub section. */
3226 #define elf32_arm_compute_jump_table_size(htab) \
3227 ((htab)->next_tls_desc_index * 4)
3229 /* ARM ELF linker hash table. */
3230 struct elf32_arm_link_hash_table
3232 /* The main hash table. */
3233 struct elf_link_hash_table root
;
3235 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
3236 bfd_size_type thumb_glue_size
;
3238 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
3239 bfd_size_type arm_glue_size
;
3241 /* The size in bytes of section containing the ARMv4 BX veneers. */
3242 bfd_size_type bx_glue_size
;
3244 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
3245 veneer has been populated. */
3246 bfd_vma bx_glue_offset
[15];
3248 /* The size in bytes of the section containing glue for VFP11 erratum
3250 bfd_size_type vfp11_erratum_glue_size
;
3252 /* The size in bytes of the section containing glue for STM32L4XX erratum
3254 bfd_size_type stm32l4xx_erratum_glue_size
;
3256 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
3257 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
3258 elf32_arm_write_section(). */
3259 struct a8_erratum_fix
*a8_erratum_fixes
;
3260 unsigned int num_a8_erratum_fixes
;
3262 /* An arbitrary input BFD chosen to hold the glue sections. */
3263 bfd
* bfd_of_glue_owner
;
3265 /* Nonzero to output a BE8 image. */
3268 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
3269 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
3272 /* The relocation to use for R_ARM_TARGET2 relocations. */
3275 /* 0 = Ignore R_ARM_V4BX.
3276 1 = Convert BX to MOV PC.
3277 2 = Generate v4 interworing stubs. */
3280 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
3283 /* Whether we should fix the ARM1176 BLX immediate issue. */
3286 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
3289 /* What sort of code sequences we should look for which may trigger the
3290 VFP11 denorm erratum. */
3291 bfd_arm_vfp11_fix vfp11_fix
;
3293 /* Global counter for the number of fixes we have emitted. */
3294 int num_vfp11_fixes
;
3296 /* What sort of code sequences we should look for which may trigger the
3297 STM32L4XX erratum. */
3298 bfd_arm_stm32l4xx_fix stm32l4xx_fix
;
3300 /* Global counter for the number of fixes we have emitted. */
3301 int num_stm32l4xx_fixes
;
3303 /* Nonzero to force PIC branch veneers. */
3306 /* The number of bytes in the initial entry in the PLT. */
3307 bfd_size_type plt_header_size
;
3309 /* The number of bytes in the subsequent PLT etries. */
3310 bfd_size_type plt_entry_size
;
3312 /* True if the target system is VxWorks. */
3315 /* True if the target system is Symbian OS. */
3318 /* True if the target system is Native Client. */
3321 /* True if the target uses REL relocations. */
3322 bfd_boolean use_rel
;
3324 /* Nonzero if import library must be a secure gateway import library
3325 as per ARMv8-M Security Extensions. */
3328 /* The import library whose symbols' address must remain stable in
3329 the import library generated. */
3332 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
3333 bfd_vma next_tls_desc_index
;
3335 /* How many R_ARM_TLS_DESC relocations were generated so far. */
3336 bfd_vma num_tls_desc
;
3338 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
3341 /* The offset into splt of the PLT entry for the TLS descriptor
3342 resolver. Special values are 0, if not necessary (or not found
3343 to be necessary yet), and -1 if needed but not determined
3345 bfd_vma dt_tlsdesc_plt
;
3347 /* The offset into sgot of the GOT entry used by the PLT entry
3349 bfd_vma dt_tlsdesc_got
;
3351 /* Offset in .plt section of tls_arm_trampoline. */
3352 bfd_vma tls_trampoline
;
3354 /* Data for R_ARM_TLS_LDM32/R_ARM_TLS_LDM32_FDPIC relocations. */
3357 bfd_signed_vma refcount
;
3361 /* Small local sym cache. */
3362 struct sym_cache sym_cache
;
3364 /* For convenience in allocate_dynrelocs. */
3367 /* The amount of space used by the reserved portion of the sgotplt
3368 section, plus whatever space is used by the jump slots. */
3369 bfd_vma sgotplt_jump_table_size
;
3371 /* The stub hash table. */
3372 struct bfd_hash_table stub_hash_table
;
3374 /* Linker stub bfd. */
3377 /* Linker call-backs. */
3378 asection
* (*add_stub_section
) (const char *, asection
*, asection
*,
3380 void (*layout_sections_again
) (void);
3382 /* Array to keep track of which stub sections have been created, and
3383 information on stub grouping. */
3384 struct map_stub
*stub_group
;
3386 /* Input stub section holding secure gateway veneers. */
3387 asection
*cmse_stub_sec
;
3389 /* Offset in cmse_stub_sec where new SG veneers (not in input import library)
3390 start to be allocated. */
3391 bfd_vma new_cmse_stub_offset
;
3393 /* Number of elements in stub_group. */
3394 unsigned int top_id
;
3396 /* Assorted information used by elf32_arm_size_stubs. */
3397 unsigned int bfd_count
;
3398 unsigned int top_index
;
3399 asection
**input_list
;
3401 /* True if the target system uses FDPIC. */
3404 /* Fixup section. Used for FDPIC. */
3408 /* Add an FDPIC read-only fixup. */
3410 arm_elf_add_rofixup (bfd
*output_bfd
, asection
*srofixup
, bfd_vma offset
)
3412 bfd_vma fixup_offset
;
3414 fixup_offset
= srofixup
->reloc_count
++ * 4;
3415 BFD_ASSERT (fixup_offset
< srofixup
->size
);
3416 bfd_put_32 (output_bfd
, offset
, srofixup
->contents
+ fixup_offset
);
3420 ctz (unsigned int mask
)
3422 #if GCC_VERSION >= 3004
3423 return __builtin_ctz (mask
);
3427 for (i
= 0; i
< 8 * sizeof (mask
); i
++)
3438 elf32_arm_popcount (unsigned int mask
)
3440 #if GCC_VERSION >= 3004
3441 return __builtin_popcount (mask
);
3446 for (i
= 0; i
< 8 * sizeof (mask
); i
++)
3456 static void elf32_arm_add_dynreloc (bfd
*output_bfd
, struct bfd_link_info
*info
,
3457 asection
*sreloc
, Elf_Internal_Rela
*rel
);
3460 arm_elf_fill_funcdesc(bfd
*output_bfd
,
3461 struct bfd_link_info
*info
,
3462 int *funcdesc_offset
,
3466 bfd_vma dynreloc_value
,
3469 if ((*funcdesc_offset
& 1) == 0)
3471 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (info
);
3472 asection
*sgot
= globals
->root
.sgot
;
3474 if (bfd_link_pic(info
))
3476 asection
*srelgot
= globals
->root
.srelgot
;
3477 Elf_Internal_Rela outrel
;
3479 outrel
.r_info
= ELF32_R_INFO (dynindx
, R_ARM_FUNCDESC_VALUE
);
3480 outrel
.r_offset
= sgot
->output_section
->vma
+ sgot
->output_offset
+ offset
;
3481 outrel
.r_addend
= 0;
3483 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
3484 bfd_put_32 (output_bfd
, addr
, sgot
->contents
+ offset
);
3485 bfd_put_32 (output_bfd
, seg
, sgot
->contents
+ offset
+ 4);
3489 struct elf_link_hash_entry
*hgot
= globals
->root
.hgot
;
3490 bfd_vma got_value
= hgot
->root
.u
.def
.value
3491 + hgot
->root
.u
.def
.section
->output_section
->vma
3492 + hgot
->root
.u
.def
.section
->output_offset
;
3494 arm_elf_add_rofixup(output_bfd
, globals
->srofixup
,
3495 sgot
->output_section
->vma
+ sgot
->output_offset
3497 arm_elf_add_rofixup(output_bfd
, globals
->srofixup
,
3498 sgot
->output_section
->vma
+ sgot
->output_offset
3500 bfd_put_32 (output_bfd
, dynreloc_value
, sgot
->contents
+ offset
);
3501 bfd_put_32 (output_bfd
, got_value
, sgot
->contents
+ offset
+ 4);
3503 *funcdesc_offset
|= 1;
3507 /* Create an entry in an ARM ELF linker hash table. */
3509 static struct bfd_hash_entry
*
3510 elf32_arm_link_hash_newfunc (struct bfd_hash_entry
* entry
,
3511 struct bfd_hash_table
* table
,
3512 const char * string
)
3514 struct elf32_arm_link_hash_entry
* ret
=
3515 (struct elf32_arm_link_hash_entry
*) entry
;
3517 /* Allocate the structure if it has not already been allocated by a
3520 ret
= (struct elf32_arm_link_hash_entry
*)
3521 bfd_hash_allocate (table
, sizeof (struct elf32_arm_link_hash_entry
));
3523 return (struct bfd_hash_entry
*) ret
;
3525 /* Call the allocation method of the superclass. */
3526 ret
= ((struct elf32_arm_link_hash_entry
*)
3527 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry
*) ret
,
3531 ret
->dyn_relocs
= NULL
;
3532 ret
->tls_type
= GOT_UNKNOWN
;
3533 ret
->tlsdesc_got
= (bfd_vma
) -1;
3534 ret
->plt
.thumb_refcount
= 0;
3535 ret
->plt
.maybe_thumb_refcount
= 0;
3536 ret
->plt
.noncall_refcount
= 0;
3537 ret
->plt
.got_offset
= -1;
3538 ret
->is_iplt
= FALSE
;
3539 ret
->export_glue
= NULL
;
3541 ret
->stub_cache
= NULL
;
3543 ret
->fdpic_cnts
.gotofffuncdesc_cnt
= 0;
3544 ret
->fdpic_cnts
.gotfuncdesc_cnt
= 0;
3545 ret
->fdpic_cnts
.funcdesc_cnt
= 0;
3546 ret
->fdpic_cnts
.funcdesc_offset
= -1;
3547 ret
->fdpic_cnts
.gotfuncdesc_offset
= -1;
3550 return (struct bfd_hash_entry
*) ret
;
3553 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3557 elf32_arm_allocate_local_sym_info (bfd
*abfd
)
3559 if (elf_local_got_refcounts (abfd
) == NULL
)
3561 bfd_size_type num_syms
;
3565 num_syms
= elf_tdata (abfd
)->symtab_hdr
.sh_info
;
3566 size
= num_syms
* (sizeof (bfd_signed_vma
)
3567 + sizeof (struct arm_local_iplt_info
*)
3570 + sizeof (struct fdpic_local
));
3571 data
= bfd_zalloc (abfd
, size
);
3575 elf32_arm_local_fdpic_cnts (abfd
) = (struct fdpic_local
*) data
;
3576 data
+= num_syms
* sizeof (struct fdpic_local
);
3578 elf_local_got_refcounts (abfd
) = (bfd_signed_vma
*) data
;
3579 data
+= num_syms
* sizeof (bfd_signed_vma
);
3581 elf32_arm_local_iplt (abfd
) = (struct arm_local_iplt_info
**) data
;
3582 data
+= num_syms
* sizeof (struct arm_local_iplt_info
*);
3584 elf32_arm_local_tlsdesc_gotent (abfd
) = (bfd_vma
*) data
;
3585 data
+= num_syms
* sizeof (bfd_vma
);
3587 elf32_arm_local_got_tls_type (abfd
) = data
;
3592 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3593 to input bfd ABFD. Create the information if it doesn't already exist.
3594 Return null if an allocation fails. */
3596 static struct arm_local_iplt_info
*
3597 elf32_arm_create_local_iplt (bfd
*abfd
, unsigned long r_symndx
)
3599 struct arm_local_iplt_info
**ptr
;
3601 if (!elf32_arm_allocate_local_sym_info (abfd
))
3604 BFD_ASSERT (r_symndx
< elf_tdata (abfd
)->symtab_hdr
.sh_info
);
3605 ptr
= &elf32_arm_local_iplt (abfd
)[r_symndx
];
3607 *ptr
= bfd_zalloc (abfd
, sizeof (**ptr
));
3611 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3612 in ABFD's symbol table. If the symbol is global, H points to its
3613 hash table entry, otherwise H is null.
3615 Return true if the symbol does have PLT information. When returning
3616 true, point *ROOT_PLT at the target-independent reference count/offset
3617 union and *ARM_PLT at the ARM-specific information. */
3620 elf32_arm_get_plt_info (bfd
*abfd
, struct elf32_arm_link_hash_table
*globals
,
3621 struct elf32_arm_link_hash_entry
*h
,
3622 unsigned long r_symndx
, union gotplt_union
**root_plt
,
3623 struct arm_plt_info
**arm_plt
)
3625 struct arm_local_iplt_info
*local_iplt
;
3627 if (globals
->root
.splt
== NULL
&& globals
->root
.iplt
== NULL
)
3632 *root_plt
= &h
->root
.plt
;
3637 if (elf32_arm_local_iplt (abfd
) == NULL
)
3640 local_iplt
= elf32_arm_local_iplt (abfd
)[r_symndx
];
3641 if (local_iplt
== NULL
)
3644 *root_plt
= &local_iplt
->root
;
3645 *arm_plt
= &local_iplt
->arm
;
3649 static bfd_boolean
using_thumb_only (struct elf32_arm_link_hash_table
*globals
);
3651 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3655 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info
*info
,
3656 struct arm_plt_info
*arm_plt
)
3658 struct elf32_arm_link_hash_table
*htab
;
3660 htab
= elf32_arm_hash_table (info
);
3662 return (!using_thumb_only(htab
) && (arm_plt
->thumb_refcount
!= 0
3663 || (!htab
->use_blx
&& arm_plt
->maybe_thumb_refcount
!= 0)));
3666 /* Return a pointer to the head of the dynamic reloc list that should
3667 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3668 ABFD's symbol table. Return null if an error occurs. */
3670 static struct elf_dyn_relocs
**
3671 elf32_arm_get_local_dynreloc_list (bfd
*abfd
, unsigned long r_symndx
,
3672 Elf_Internal_Sym
*isym
)
3674 if (ELF32_ST_TYPE (isym
->st_info
) == STT_GNU_IFUNC
)
3676 struct arm_local_iplt_info
*local_iplt
;
3678 local_iplt
= elf32_arm_create_local_iplt (abfd
, r_symndx
);
3679 if (local_iplt
== NULL
)
3681 return &local_iplt
->dyn_relocs
;
3685 /* Track dynamic relocs needed for local syms too.
3686 We really need local syms available to do this
3691 s
= bfd_section_from_elf_index (abfd
, isym
->st_shndx
);
3695 vpp
= &elf_section_data (s
)->local_dynrel
;
3696 return (struct elf_dyn_relocs
**) vpp
;
3700 /* Initialize an entry in the stub hash table. */
3702 static struct bfd_hash_entry
*
3703 stub_hash_newfunc (struct bfd_hash_entry
*entry
,
3704 struct bfd_hash_table
*table
,
3707 /* Allocate the structure if it has not already been allocated by a
3711 entry
= (struct bfd_hash_entry
*)
3712 bfd_hash_allocate (table
, sizeof (struct elf32_arm_stub_hash_entry
));
3717 /* Call the allocation method of the superclass. */
3718 entry
= bfd_hash_newfunc (entry
, table
, string
);
3721 struct elf32_arm_stub_hash_entry
*eh
;
3723 /* Initialize the local fields. */
3724 eh
= (struct elf32_arm_stub_hash_entry
*) entry
;
3725 eh
->stub_sec
= NULL
;
3726 eh
->stub_offset
= (bfd_vma
) -1;
3727 eh
->source_value
= 0;
3728 eh
->target_value
= 0;
3729 eh
->target_section
= NULL
;
3731 eh
->stub_type
= arm_stub_none
;
3733 eh
->stub_template
= NULL
;
3734 eh
->stub_template_size
= -1;
3737 eh
->output_name
= NULL
;
3743 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3744 shortcuts to them in our hash table. */
3747 create_got_section (bfd
*dynobj
, struct bfd_link_info
*info
)
3749 struct elf32_arm_link_hash_table
*htab
;
3751 htab
= elf32_arm_hash_table (info
);
3755 /* BPABI objects never have a GOT, or associated sections. */
3756 if (htab
->symbian_p
)
3759 if (! _bfd_elf_create_got_section (dynobj
, info
))
3762 /* Also create .rofixup. */
3765 htab
->srofixup
= bfd_make_section_with_flags (dynobj
, ".rofixup",
3766 (SEC_ALLOC
| SEC_LOAD
| SEC_HAS_CONTENTS
3767 | SEC_IN_MEMORY
| SEC_LINKER_CREATED
| SEC_READONLY
));
3768 if (htab
->srofixup
== NULL
|| ! bfd_set_section_alignment (dynobj
, htab
->srofixup
, 2))
3775 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3778 create_ifunc_sections (struct bfd_link_info
*info
)
3780 struct elf32_arm_link_hash_table
*htab
;
3781 const struct elf_backend_data
*bed
;
3786 htab
= elf32_arm_hash_table (info
);
3787 dynobj
= htab
->root
.dynobj
;
3788 bed
= get_elf_backend_data (dynobj
);
3789 flags
= bed
->dynamic_sec_flags
;
3791 if (htab
->root
.iplt
== NULL
)
3793 s
= bfd_make_section_anyway_with_flags (dynobj
, ".iplt",
3794 flags
| SEC_READONLY
| SEC_CODE
);
3796 || !bfd_set_section_alignment (dynobj
, s
, bed
->plt_alignment
))
3798 htab
->root
.iplt
= s
;
3801 if (htab
->root
.irelplt
== NULL
)
3803 s
= bfd_make_section_anyway_with_flags (dynobj
,
3804 RELOC_SECTION (htab
, ".iplt"),
3805 flags
| SEC_READONLY
);
3807 || !bfd_set_section_alignment (dynobj
, s
, bed
->s
->log_file_align
))
3809 htab
->root
.irelplt
= s
;
3812 if (htab
->root
.igotplt
== NULL
)
3814 s
= bfd_make_section_anyway_with_flags (dynobj
, ".igot.plt", flags
);
3816 || !bfd_set_section_alignment (dynobj
, s
, bed
->s
->log_file_align
))
3818 htab
->root
.igotplt
= s
;
3823 /* Determine if we're dealing with a Thumb only architecture. */
3826 using_thumb_only (struct elf32_arm_link_hash_table
*globals
)
3829 int profile
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
3830 Tag_CPU_arch_profile
);
3833 return profile
== 'M';
3835 arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
3837 /* Force return logic to be reviewed for each new architecture. */
3838 BFD_ASSERT (arch
<= TAG_CPU_ARCH_V8_1M_MAIN
);
3840 if (arch
== TAG_CPU_ARCH_V6_M
3841 || arch
== TAG_CPU_ARCH_V6S_M
3842 || arch
== TAG_CPU_ARCH_V7E_M
3843 || arch
== TAG_CPU_ARCH_V8M_BASE
3844 || arch
== TAG_CPU_ARCH_V8M_MAIN
3845 || arch
== TAG_CPU_ARCH_V8_1M_MAIN
)
3851 /* Determine if we're dealing with a Thumb-2 object. */
3854 using_thumb2 (struct elf32_arm_link_hash_table
*globals
)
3857 int thumb_isa
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
3861 return thumb_isa
== 2;
3863 arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
3865 /* Force return logic to be reviewed for each new architecture. */
3866 BFD_ASSERT (arch
<= TAG_CPU_ARCH_V8_1M_MAIN
);
3868 return (arch
== TAG_CPU_ARCH_V6T2
3869 || arch
== TAG_CPU_ARCH_V7
3870 || arch
== TAG_CPU_ARCH_V7E_M
3871 || arch
== TAG_CPU_ARCH_V8
3872 || arch
== TAG_CPU_ARCH_V8R
3873 || arch
== TAG_CPU_ARCH_V8M_MAIN
3874 || arch
== TAG_CPU_ARCH_V8_1M_MAIN
);
3877 /* Determine whether Thumb-2 BL instruction is available. */
3880 using_thumb2_bl (struct elf32_arm_link_hash_table
*globals
)
3883 bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
3885 /* Force return logic to be reviewed for each new architecture. */
3886 BFD_ASSERT (arch
<= TAG_CPU_ARCH_V8_1M_MAIN
);
3888 /* Architecture was introduced after ARMv6T2 (eg. ARMv6-M). */
3889 return (arch
== TAG_CPU_ARCH_V6T2
3890 || arch
>= TAG_CPU_ARCH_V7
);
3893 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3894 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3898 elf32_arm_create_dynamic_sections (bfd
*dynobj
, struct bfd_link_info
*info
)
3900 struct elf32_arm_link_hash_table
*htab
;
3902 htab
= elf32_arm_hash_table (info
);
3906 if (!htab
->root
.sgot
&& !create_got_section (dynobj
, info
))
3909 if (!_bfd_elf_create_dynamic_sections (dynobj
, info
))
3912 if (htab
->vxworks_p
)
3914 if (!elf_vxworks_create_dynamic_sections (dynobj
, info
, &htab
->srelplt2
))
3917 if (bfd_link_pic (info
))
3919 htab
->plt_header_size
= 0;
3920 htab
->plt_entry_size
3921 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry
);
3925 htab
->plt_header_size
3926 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry
);
3927 htab
->plt_entry_size
3928 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry
);
3931 if (elf_elfheader (dynobj
))
3932 elf_elfheader (dynobj
)->e_ident
[EI_CLASS
] = ELFCLASS32
;
3937 Test for thumb only architectures. Note - we cannot just call
3938 using_thumb_only() as the attributes in the output bfd have not been
3939 initialised at this point, so instead we use the input bfd. */
3940 bfd
* saved_obfd
= htab
->obfd
;
3942 htab
->obfd
= dynobj
;
3943 if (using_thumb_only (htab
))
3945 htab
->plt_header_size
= 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry
);
3946 htab
->plt_entry_size
= 4 * ARRAY_SIZE (elf32_thumb2_plt_entry
);
3948 htab
->obfd
= saved_obfd
;
3951 if (htab
->fdpic_p
) {
3952 htab
->plt_header_size
= 0;
3953 if (info
->flags
& DF_BIND_NOW
)
3954 htab
->plt_entry_size
= 4 * (ARRAY_SIZE(elf32_arm_fdpic_plt_entry
) - 5);
3956 htab
->plt_entry_size
= 4 * ARRAY_SIZE(elf32_arm_fdpic_plt_entry
);
3959 if (!htab
->root
.splt
3960 || !htab
->root
.srelplt
3961 || !htab
->root
.sdynbss
3962 || (!bfd_link_pic (info
) && !htab
->root
.srelbss
))
3968 /* Copy the extra info we tack onto an elf_link_hash_entry. */
3971 elf32_arm_copy_indirect_symbol (struct bfd_link_info
*info
,
3972 struct elf_link_hash_entry
*dir
,
3973 struct elf_link_hash_entry
*ind
)
3975 struct elf32_arm_link_hash_entry
*edir
, *eind
;
3977 edir
= (struct elf32_arm_link_hash_entry
*) dir
;
3978 eind
= (struct elf32_arm_link_hash_entry
*) ind
;
3980 if (eind
->dyn_relocs
!= NULL
)
3982 if (edir
->dyn_relocs
!= NULL
)
3984 struct elf_dyn_relocs
**pp
;
3985 struct elf_dyn_relocs
*p
;
3987 /* Add reloc counts against the indirect sym to the direct sym
3988 list. Merge any entries against the same section. */
3989 for (pp
= &eind
->dyn_relocs
; (p
= *pp
) != NULL
; )
3991 struct elf_dyn_relocs
*q
;
3993 for (q
= edir
->dyn_relocs
; q
!= NULL
; q
= q
->next
)
3994 if (q
->sec
== p
->sec
)
3996 q
->pc_count
+= p
->pc_count
;
3997 q
->count
+= p
->count
;
4004 *pp
= edir
->dyn_relocs
;
4007 edir
->dyn_relocs
= eind
->dyn_relocs
;
4008 eind
->dyn_relocs
= NULL
;
4011 if (ind
->root
.type
== bfd_link_hash_indirect
)
4013 /* Copy over PLT info. */
4014 edir
->plt
.thumb_refcount
+= eind
->plt
.thumb_refcount
;
4015 eind
->plt
.thumb_refcount
= 0;
4016 edir
->plt
.maybe_thumb_refcount
+= eind
->plt
.maybe_thumb_refcount
;
4017 eind
->plt
.maybe_thumb_refcount
= 0;
4018 edir
->plt
.noncall_refcount
+= eind
->plt
.noncall_refcount
;
4019 eind
->plt
.noncall_refcount
= 0;
4021 /* Copy FDPIC counters. */
4022 edir
->fdpic_cnts
.gotofffuncdesc_cnt
+= eind
->fdpic_cnts
.gotofffuncdesc_cnt
;
4023 edir
->fdpic_cnts
.gotfuncdesc_cnt
+= eind
->fdpic_cnts
.gotfuncdesc_cnt
;
4024 edir
->fdpic_cnts
.funcdesc_cnt
+= eind
->fdpic_cnts
.funcdesc_cnt
;
4026 /* We should only allocate a function to .iplt once the final
4027 symbol information is known. */
4028 BFD_ASSERT (!eind
->is_iplt
);
4030 if (dir
->got
.refcount
<= 0)
4032 edir
->tls_type
= eind
->tls_type
;
4033 eind
->tls_type
= GOT_UNKNOWN
;
4037 _bfd_elf_link_hash_copy_indirect (info
, dir
, ind
);
4040 /* Destroy an ARM elf linker hash table. */
4043 elf32_arm_link_hash_table_free (bfd
*obfd
)
4045 struct elf32_arm_link_hash_table
*ret
4046 = (struct elf32_arm_link_hash_table
*) obfd
->link
.hash
;
4048 bfd_hash_table_free (&ret
->stub_hash_table
);
4049 _bfd_elf_link_hash_table_free (obfd
);
4052 /* Create an ARM elf linker hash table. */
4054 static struct bfd_link_hash_table
*
4055 elf32_arm_link_hash_table_create (bfd
*abfd
)
4057 struct elf32_arm_link_hash_table
*ret
;
4058 bfd_size_type amt
= sizeof (struct elf32_arm_link_hash_table
);
4060 ret
= (struct elf32_arm_link_hash_table
*) bfd_zmalloc (amt
);
4064 if (!_bfd_elf_link_hash_table_init (& ret
->root
, abfd
,
4065 elf32_arm_link_hash_newfunc
,
4066 sizeof (struct elf32_arm_link_hash_entry
),
4073 ret
->vfp11_fix
= BFD_ARM_VFP11_FIX_NONE
;
4074 ret
->stm32l4xx_fix
= BFD_ARM_STM32L4XX_FIX_NONE
;
4075 #ifdef FOUR_WORD_PLT
4076 ret
->plt_header_size
= 16;
4077 ret
->plt_entry_size
= 16;
4079 ret
->plt_header_size
= 20;
4080 ret
->plt_entry_size
= elf32_arm_use_long_plt_entry
? 16 : 12;
4082 ret
->use_rel
= TRUE
;
4086 if (!bfd_hash_table_init (&ret
->stub_hash_table
, stub_hash_newfunc
,
4087 sizeof (struct elf32_arm_stub_hash_entry
)))
4089 _bfd_elf_link_hash_table_free (abfd
);
4092 ret
->root
.root
.hash_table_free
= elf32_arm_link_hash_table_free
;
4094 return &ret
->root
.root
;
4097 /* Determine what kind of NOPs are available. */
4100 arch_has_arm_nop (struct elf32_arm_link_hash_table
*globals
)
4102 const int arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
4105 /* Force return logic to be reviewed for each new architecture. */
4106 BFD_ASSERT (arch
<= TAG_CPU_ARCH_V8_1M_MAIN
);
4108 return (arch
== TAG_CPU_ARCH_V6T2
4109 || arch
== TAG_CPU_ARCH_V6K
4110 || arch
== TAG_CPU_ARCH_V7
4111 || arch
== TAG_CPU_ARCH_V8
4112 || arch
== TAG_CPU_ARCH_V8R
);
4116 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type
)
4120 case arm_stub_long_branch_thumb_only
:
4121 case arm_stub_long_branch_thumb2_only
:
4122 case arm_stub_long_branch_thumb2_only_pure
:
4123 case arm_stub_long_branch_v4t_thumb_arm
:
4124 case arm_stub_short_branch_v4t_thumb_arm
:
4125 case arm_stub_long_branch_v4t_thumb_arm_pic
:
4126 case arm_stub_long_branch_v4t_thumb_tls_pic
:
4127 case arm_stub_long_branch_thumb_only_pic
:
4128 case arm_stub_cmse_branch_thumb_only
:
4139 /* Determine the type of stub needed, if any, for a call. */
4141 static enum elf32_arm_stub_type
4142 arm_type_of_stub (struct bfd_link_info
*info
,
4143 asection
*input_sec
,
4144 const Elf_Internal_Rela
*rel
,
4145 unsigned char st_type
,
4146 enum arm_st_branch_type
*actual_branch_type
,
4147 struct elf32_arm_link_hash_entry
*hash
,
4148 bfd_vma destination
,
4154 bfd_signed_vma branch_offset
;
4155 unsigned int r_type
;
4156 struct elf32_arm_link_hash_table
* globals
;
4157 bfd_boolean thumb2
, thumb2_bl
, thumb_only
;
4158 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
4160 enum arm_st_branch_type branch_type
= *actual_branch_type
;
4161 union gotplt_union
*root_plt
;
4162 struct arm_plt_info
*arm_plt
;
4166 if (branch_type
== ST_BRANCH_LONG
)
4169 globals
= elf32_arm_hash_table (info
);
4170 if (globals
== NULL
)
4173 thumb_only
= using_thumb_only (globals
);
4174 thumb2
= using_thumb2 (globals
);
4175 thumb2_bl
= using_thumb2_bl (globals
);
4177 arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
4179 /* True for architectures that implement the thumb2 movw instruction. */
4180 thumb2_movw
= thumb2
|| (arch
== TAG_CPU_ARCH_V8M_BASE
);
4182 /* Determine where the call point is. */
4183 location
= (input_sec
->output_offset
4184 + input_sec
->output_section
->vma
4187 r_type
= ELF32_R_TYPE (rel
->r_info
);
4189 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
4190 are considering a function call relocation. */
4191 if (thumb_only
&& (r_type
== R_ARM_THM_CALL
|| r_type
== R_ARM_THM_JUMP24
4192 || r_type
== R_ARM_THM_JUMP19
)
4193 && branch_type
== ST_BRANCH_TO_ARM
)
4194 branch_type
= ST_BRANCH_TO_THUMB
;
4196 /* For TLS call relocs, it is the caller's responsibility to provide
4197 the address of the appropriate trampoline. */
4198 if (r_type
!= R_ARM_TLS_CALL
4199 && r_type
!= R_ARM_THM_TLS_CALL
4200 && elf32_arm_get_plt_info (input_bfd
, globals
, hash
,
4201 ELF32_R_SYM (rel
->r_info
), &root_plt
,
4203 && root_plt
->offset
!= (bfd_vma
) -1)
4207 if (hash
== NULL
|| hash
->is_iplt
)
4208 splt
= globals
->root
.iplt
;
4210 splt
= globals
->root
.splt
;
4215 /* Note when dealing with PLT entries: the main PLT stub is in
4216 ARM mode, so if the branch is in Thumb mode, another
4217 Thumb->ARM stub will be inserted later just before the ARM
4218 PLT stub. If a long branch stub is needed, we'll add a
4219 Thumb->Arm one and branch directly to the ARM PLT entry.
4220 Here, we have to check if a pre-PLT Thumb->ARM stub
4221 is needed and if it will be close enough. */
4223 destination
= (splt
->output_section
->vma
4224 + splt
->output_offset
4225 + root_plt
->offset
);
4228 /* Thumb branch/call to PLT: it can become a branch to ARM
4229 or to Thumb. We must perform the same checks and
4230 corrections as in elf32_arm_final_link_relocate. */
4231 if ((r_type
== R_ARM_THM_CALL
)
4232 || (r_type
== R_ARM_THM_JUMP24
))
4234 if (globals
->use_blx
4235 && r_type
== R_ARM_THM_CALL
4238 /* If the Thumb BLX instruction is available, convert
4239 the BL to a BLX instruction to call the ARM-mode
4241 branch_type
= ST_BRANCH_TO_ARM
;
4246 /* Target the Thumb stub before the ARM PLT entry. */
4247 destination
-= PLT_THUMB_STUB_SIZE
;
4248 branch_type
= ST_BRANCH_TO_THUMB
;
4253 branch_type
= ST_BRANCH_TO_ARM
;
4257 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
4258 BFD_ASSERT (st_type
!= STT_GNU_IFUNC
);
4260 branch_offset
= (bfd_signed_vma
)(destination
- location
);
4262 if (r_type
== R_ARM_THM_CALL
|| r_type
== R_ARM_THM_JUMP24
4263 || r_type
== R_ARM_THM_TLS_CALL
|| r_type
== R_ARM_THM_JUMP19
)
4265 /* Handle cases where:
4266 - this call goes too far (different Thumb/Thumb2 max
4268 - it's a Thumb->Arm call and blx is not available, or it's a
4269 Thumb->Arm branch (not bl). A stub is needed in this case,
4270 but only if this call is not through a PLT entry. Indeed,
4271 PLT stubs handle mode switching already. */
4273 && (branch_offset
> THM_MAX_FWD_BRANCH_OFFSET
4274 || (branch_offset
< THM_MAX_BWD_BRANCH_OFFSET
)))
4276 && (branch_offset
> THM2_MAX_FWD_BRANCH_OFFSET
4277 || (branch_offset
< THM2_MAX_BWD_BRANCH_OFFSET
)))
4279 && (branch_offset
> THM2_MAX_FWD_COND_BRANCH_OFFSET
4280 || (branch_offset
< THM2_MAX_BWD_COND_BRANCH_OFFSET
))
4281 && (r_type
== R_ARM_THM_JUMP19
))
4282 || (branch_type
== ST_BRANCH_TO_ARM
4283 && (((r_type
== R_ARM_THM_CALL
4284 || r_type
== R_ARM_THM_TLS_CALL
) && !globals
->use_blx
)
4285 || (r_type
== R_ARM_THM_JUMP24
)
4286 || (r_type
== R_ARM_THM_JUMP19
))
4289 /* If we need to insert a Thumb-Thumb long branch stub to a
4290 PLT, use one that branches directly to the ARM PLT
4291 stub. If we pretended we'd use the pre-PLT Thumb->ARM
4292 stub, undo this now. */
4293 if ((branch_type
== ST_BRANCH_TO_THUMB
) && use_plt
&& !thumb_only
)
4295 branch_type
= ST_BRANCH_TO_ARM
;
4296 branch_offset
+= PLT_THUMB_STUB_SIZE
;
4299 if (branch_type
== ST_BRANCH_TO_THUMB
)
4301 /* Thumb to thumb. */
4304 if (input_sec
->flags
& SEC_ELF_PURECODE
)
4306 (_("%pB(%pA): warning: long branch veneers used in"
4307 " section with SHF_ARM_PURECODE section"
4308 " attribute is only supported for M-profile"
4309 " targets that implement the movw instruction"),
4310 input_bfd
, input_sec
);
4312 stub_type
= (bfd_link_pic (info
) | globals
->pic_veneer
)
4314 ? ((globals
->use_blx
4315 && (r_type
== R_ARM_THM_CALL
))
4316 /* V5T and above. Stub starts with ARM code, so
4317 we must be able to switch mode before
4318 reaching it, which is only possible for 'bl'
4319 (ie R_ARM_THM_CALL relocation). */
4320 ? arm_stub_long_branch_any_thumb_pic
4321 /* On V4T, use Thumb code only. */
4322 : arm_stub_long_branch_v4t_thumb_thumb_pic
)
4324 /* non-PIC stubs. */
4325 : ((globals
->use_blx
4326 && (r_type
== R_ARM_THM_CALL
))
4327 /* V5T and above. */
4328 ? arm_stub_long_branch_any_any
4330 : arm_stub_long_branch_v4t_thumb_thumb
);
4334 if (thumb2_movw
&& (input_sec
->flags
& SEC_ELF_PURECODE
))
4335 stub_type
= arm_stub_long_branch_thumb2_only_pure
;
4338 if (input_sec
->flags
& SEC_ELF_PURECODE
)
4340 (_("%pB(%pA): warning: long branch veneers used in"
4341 " section with SHF_ARM_PURECODE section"
4342 " attribute is only supported for M-profile"
4343 " targets that implement the movw instruction"),
4344 input_bfd
, input_sec
);
4346 stub_type
= (bfd_link_pic (info
) | globals
->pic_veneer
)
4348 ? arm_stub_long_branch_thumb_only_pic
4350 : (thumb2
? arm_stub_long_branch_thumb2_only
4351 : arm_stub_long_branch_thumb_only
);
4357 if (input_sec
->flags
& SEC_ELF_PURECODE
)
4359 (_("%pB(%pA): warning: long branch veneers used in"
4360 " section with SHF_ARM_PURECODE section"
4361 " attribute is only supported" " for M-profile"
4362 " targets that implement the movw instruction"),
4363 input_bfd
, input_sec
);
4367 && sym_sec
->owner
!= NULL
4368 && !INTERWORK_FLAG (sym_sec
->owner
))
4371 (_("%pB(%s): warning: interworking not enabled;"
4372 " first occurrence: %pB: %s call to %s"),
4373 sym_sec
->owner
, name
, input_bfd
, "Thumb", "ARM");
4377 (bfd_link_pic (info
) | globals
->pic_veneer
)
4379 ? (r_type
== R_ARM_THM_TLS_CALL
4380 /* TLS PIC stubs. */
4381 ? (globals
->use_blx
? arm_stub_long_branch_any_tls_pic
4382 : arm_stub_long_branch_v4t_thumb_tls_pic
)
4383 : ((globals
->use_blx
&& r_type
== R_ARM_THM_CALL
)
4384 /* V5T PIC and above. */
4385 ? arm_stub_long_branch_any_arm_pic
4387 : arm_stub_long_branch_v4t_thumb_arm_pic
))
4389 /* non-PIC stubs. */
4390 : ((globals
->use_blx
&& r_type
== R_ARM_THM_CALL
)
4391 /* V5T and above. */
4392 ? arm_stub_long_branch_any_any
4394 : arm_stub_long_branch_v4t_thumb_arm
);
4396 /* Handle v4t short branches. */
4397 if ((stub_type
== arm_stub_long_branch_v4t_thumb_arm
)
4398 && (branch_offset
<= THM_MAX_FWD_BRANCH_OFFSET
)
4399 && (branch_offset
>= THM_MAX_BWD_BRANCH_OFFSET
))
4400 stub_type
= arm_stub_short_branch_v4t_thumb_arm
;
4404 else if (r_type
== R_ARM_CALL
4405 || r_type
== R_ARM_JUMP24
4406 || r_type
== R_ARM_PLT32
4407 || r_type
== R_ARM_TLS_CALL
)
4409 if (input_sec
->flags
& SEC_ELF_PURECODE
)
4411 (_("%pB(%pA): warning: long branch veneers used in"
4412 " section with SHF_ARM_PURECODE section"
4413 " attribute is only supported for M-profile"
4414 " targets that implement the movw instruction"),
4415 input_bfd
, input_sec
);
4416 if (branch_type
== ST_BRANCH_TO_THUMB
)
4421 && sym_sec
->owner
!= NULL
4422 && !INTERWORK_FLAG (sym_sec
->owner
))
4425 (_("%pB(%s): warning: interworking not enabled;"
4426 " first occurrence: %pB: %s call to %s"),
4427 sym_sec
->owner
, name
, input_bfd
, "ARM", "Thumb");
4430 /* We have an extra 2-bytes reach because of
4431 the mode change (bit 24 (H) of BLX encoding). */
4432 if (branch_offset
> (ARM_MAX_FWD_BRANCH_OFFSET
+ 2)
4433 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
)
4434 || (r_type
== R_ARM_CALL
&& !globals
->use_blx
)
4435 || (r_type
== R_ARM_JUMP24
)
4436 || (r_type
== R_ARM_PLT32
))
4438 stub_type
= (bfd_link_pic (info
) | globals
->pic_veneer
)
4440 ? ((globals
->use_blx
)
4441 /* V5T and above. */
4442 ? arm_stub_long_branch_any_thumb_pic
4444 : arm_stub_long_branch_v4t_arm_thumb_pic
)
4446 /* non-PIC stubs. */
4447 : ((globals
->use_blx
)
4448 /* V5T and above. */
4449 ? arm_stub_long_branch_any_any
4451 : arm_stub_long_branch_v4t_arm_thumb
);
4457 if (branch_offset
> ARM_MAX_FWD_BRANCH_OFFSET
4458 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
))
4461 (bfd_link_pic (info
) | globals
->pic_veneer
)
4463 ? (r_type
== R_ARM_TLS_CALL
4465 ? arm_stub_long_branch_any_tls_pic
4467 ? arm_stub_long_branch_arm_nacl_pic
4468 : arm_stub_long_branch_any_arm_pic
))
4469 /* non-PIC stubs. */
4471 ? arm_stub_long_branch_arm_nacl
4472 : arm_stub_long_branch_any_any
);
4477 /* If a stub is needed, record the actual destination type. */
4478 if (stub_type
!= arm_stub_none
)
4479 *actual_branch_type
= branch_type
;
4484 /* Build a name for an entry in the stub hash table. */
4487 elf32_arm_stub_name (const asection
*input_section
,
4488 const asection
*sym_sec
,
4489 const struct elf32_arm_link_hash_entry
*hash
,
4490 const Elf_Internal_Rela
*rel
,
4491 enum elf32_arm_stub_type stub_type
)
4498 len
= 8 + 1 + strlen (hash
->root
.root
.root
.string
) + 1 + 8 + 1 + 2 + 1;
4499 stub_name
= (char *) bfd_malloc (len
);
4500 if (stub_name
!= NULL
)
4501 sprintf (stub_name
, "%08x_%s+%x_%d",
4502 input_section
->id
& 0xffffffff,
4503 hash
->root
.root
.root
.string
,
4504 (int) rel
->r_addend
& 0xffffffff,
4509 len
= 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
4510 stub_name
= (char *) bfd_malloc (len
);
4511 if (stub_name
!= NULL
)
4512 sprintf (stub_name
, "%08x_%x:%x+%x_%d",
4513 input_section
->id
& 0xffffffff,
4514 sym_sec
->id
& 0xffffffff,
4515 ELF32_R_TYPE (rel
->r_info
) == R_ARM_TLS_CALL
4516 || ELF32_R_TYPE (rel
->r_info
) == R_ARM_THM_TLS_CALL
4517 ? 0 : (int) ELF32_R_SYM (rel
->r_info
) & 0xffffffff,
4518 (int) rel
->r_addend
& 0xffffffff,
4525 /* Look up an entry in the stub hash. Stub entries are cached because
4526 creating the stub name takes a bit of time. */
4528 static struct elf32_arm_stub_hash_entry
*
4529 elf32_arm_get_stub_entry (const asection
*input_section
,
4530 const asection
*sym_sec
,
4531 struct elf_link_hash_entry
*hash
,
4532 const Elf_Internal_Rela
*rel
,
4533 struct elf32_arm_link_hash_table
*htab
,
4534 enum elf32_arm_stub_type stub_type
)
4536 struct elf32_arm_stub_hash_entry
*stub_entry
;
4537 struct elf32_arm_link_hash_entry
*h
= (struct elf32_arm_link_hash_entry
*) hash
;
4538 const asection
*id_sec
;
4540 if ((input_section
->flags
& SEC_CODE
) == 0)
4543 /* If this input section is part of a group of sections sharing one
4544 stub section, then use the id of the first section in the group.
4545 Stub names need to include a section id, as there may well be
4546 more than one stub used to reach say, printf, and we need to
4547 distinguish between them. */
4548 BFD_ASSERT (input_section
->id
<= htab
->top_id
);
4549 id_sec
= htab
->stub_group
[input_section
->id
].link_sec
;
4551 if (h
!= NULL
&& h
->stub_cache
!= NULL
4552 && h
->stub_cache
->h
== h
4553 && h
->stub_cache
->id_sec
== id_sec
4554 && h
->stub_cache
->stub_type
== stub_type
)
4556 stub_entry
= h
->stub_cache
;
4562 stub_name
= elf32_arm_stub_name (id_sec
, sym_sec
, h
, rel
, stub_type
);
4563 if (stub_name
== NULL
)
4566 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
,
4567 stub_name
, FALSE
, FALSE
);
4569 h
->stub_cache
= stub_entry
;
4577 /* Whether veneers of type STUB_TYPE require to be in a dedicated output
4581 arm_dedicated_stub_output_section_required (enum elf32_arm_stub_type stub_type
)
4583 if (stub_type
>= max_stub_type
)
4584 abort (); /* Should be unreachable. */
4588 case arm_stub_cmse_branch_thumb_only
:
4595 abort (); /* Should be unreachable. */
4598 /* Required alignment (as a power of 2) for the dedicated section holding
4599 veneers of type STUB_TYPE, or 0 if veneers of this type are interspersed
4600 with input sections. */
4603 arm_dedicated_stub_output_section_required_alignment
4604 (enum elf32_arm_stub_type stub_type
)
4606 if (stub_type
>= max_stub_type
)
4607 abort (); /* Should be unreachable. */
4611 /* Vectors of Secure Gateway veneers must be aligned on 32byte
4613 case arm_stub_cmse_branch_thumb_only
:
4617 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type
));
4621 abort (); /* Should be unreachable. */
4624 /* Name of the dedicated output section to put veneers of type STUB_TYPE, or
4625 NULL if veneers of this type are interspersed with input sections. */
4628 arm_dedicated_stub_output_section_name (enum elf32_arm_stub_type stub_type
)
4630 if (stub_type
>= max_stub_type
)
4631 abort (); /* Should be unreachable. */
4635 case arm_stub_cmse_branch_thumb_only
:
4636 return ".gnu.sgstubs";
4639 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type
));
4643 abort (); /* Should be unreachable. */
4646 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4647 returns the address of the hash table field in HTAB holding a pointer to the
4648 corresponding input section. Otherwise, returns NULL. */
4651 arm_dedicated_stub_input_section_ptr (struct elf32_arm_link_hash_table
*htab
,
4652 enum elf32_arm_stub_type stub_type
)
4654 if (stub_type
>= max_stub_type
)
4655 abort (); /* Should be unreachable. */
4659 case arm_stub_cmse_branch_thumb_only
:
4660 return &htab
->cmse_stub_sec
;
4663 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type
));
4667 abort (); /* Should be unreachable. */
4670 /* Find or create a stub section to contain a stub of type STUB_TYPE. SECTION
4671 is the section that branch into veneer and can be NULL if stub should go in
4672 a dedicated output section. Returns a pointer to the stub section, and the
4673 section to which the stub section will be attached (in *LINK_SEC_P).
4674 LINK_SEC_P may be NULL. */
4677 elf32_arm_create_or_find_stub_sec (asection
**link_sec_p
, asection
*section
,
4678 struct elf32_arm_link_hash_table
*htab
,
4679 enum elf32_arm_stub_type stub_type
)
4681 asection
*link_sec
, *out_sec
, **stub_sec_p
;
4682 const char *stub_sec_prefix
;
4683 bfd_boolean dedicated_output_section
=
4684 arm_dedicated_stub_output_section_required (stub_type
);
4687 if (dedicated_output_section
)
4689 bfd
*output_bfd
= htab
->obfd
;
4690 const char *out_sec_name
=
4691 arm_dedicated_stub_output_section_name (stub_type
);
4693 stub_sec_p
= arm_dedicated_stub_input_section_ptr (htab
, stub_type
);
4694 stub_sec_prefix
= out_sec_name
;
4695 align
= arm_dedicated_stub_output_section_required_alignment (stub_type
);
4696 out_sec
= bfd_get_section_by_name (output_bfd
, out_sec_name
);
4697 if (out_sec
== NULL
)
4699 _bfd_error_handler (_("no address assigned to the veneers output "
4700 "section %s"), out_sec_name
);
4706 BFD_ASSERT (section
->id
<= htab
->top_id
);
4707 link_sec
= htab
->stub_group
[section
->id
].link_sec
;
4708 BFD_ASSERT (link_sec
!= NULL
);
4709 stub_sec_p
= &htab
->stub_group
[section
->id
].stub_sec
;
4710 if (*stub_sec_p
== NULL
)
4711 stub_sec_p
= &htab
->stub_group
[link_sec
->id
].stub_sec
;
4712 stub_sec_prefix
= link_sec
->name
;
4713 out_sec
= link_sec
->output_section
;
4714 align
= htab
->nacl_p
? 4 : 3;
4717 if (*stub_sec_p
== NULL
)
4723 namelen
= strlen (stub_sec_prefix
);
4724 len
= namelen
+ sizeof (STUB_SUFFIX
);
4725 s_name
= (char *) bfd_alloc (htab
->stub_bfd
, len
);
4729 memcpy (s_name
, stub_sec_prefix
, namelen
);
4730 memcpy (s_name
+ namelen
, STUB_SUFFIX
, sizeof (STUB_SUFFIX
));
4731 *stub_sec_p
= (*htab
->add_stub_section
) (s_name
, out_sec
, link_sec
,
4733 if (*stub_sec_p
== NULL
)
4736 out_sec
->flags
|= SEC_ALLOC
| SEC_LOAD
| SEC_READONLY
| SEC_CODE
4737 | SEC_HAS_CONTENTS
| SEC_RELOC
| SEC_IN_MEMORY
4741 if (!dedicated_output_section
)
4742 htab
->stub_group
[section
->id
].stub_sec
= *stub_sec_p
;
4745 *link_sec_p
= link_sec
;
4750 /* Add a new stub entry to the stub hash. Not all fields of the new
4751 stub entry are initialised. */
4753 static struct elf32_arm_stub_hash_entry
*
4754 elf32_arm_add_stub (const char *stub_name
, asection
*section
,
4755 struct elf32_arm_link_hash_table
*htab
,
4756 enum elf32_arm_stub_type stub_type
)
4760 struct elf32_arm_stub_hash_entry
*stub_entry
;
4762 stub_sec
= elf32_arm_create_or_find_stub_sec (&link_sec
, section
, htab
,
4764 if (stub_sec
== NULL
)
4767 /* Enter this entry into the linker stub hash table. */
4768 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
, stub_name
,
4770 if (stub_entry
== NULL
)
4772 if (section
== NULL
)
4774 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
4775 section
->owner
, stub_name
);
4779 stub_entry
->stub_sec
= stub_sec
;
4780 stub_entry
->stub_offset
= (bfd_vma
) -1;
4781 stub_entry
->id_sec
= link_sec
;
4786 /* Store an Arm insn into an output section not processed by
4787 elf32_arm_write_section. */
4790 put_arm_insn (struct elf32_arm_link_hash_table
* htab
,
4791 bfd
* output_bfd
, bfd_vma val
, void * ptr
)
4793 if (htab
->byteswap_code
!= bfd_little_endian (output_bfd
))
4794 bfd_putl32 (val
, ptr
);
4796 bfd_putb32 (val
, ptr
);
4799 /* Store a 16-bit Thumb insn into an output section not processed by
4800 elf32_arm_write_section. */
4803 put_thumb_insn (struct elf32_arm_link_hash_table
* htab
,
4804 bfd
* output_bfd
, bfd_vma val
, void * ptr
)
4806 if (htab
->byteswap_code
!= bfd_little_endian (output_bfd
))
4807 bfd_putl16 (val
, ptr
);
4809 bfd_putb16 (val
, ptr
);
4812 /* Store a Thumb2 insn into an output section not processed by
4813 elf32_arm_write_section. */
4816 put_thumb2_insn (struct elf32_arm_link_hash_table
* htab
,
4817 bfd
* output_bfd
, bfd_vma val
, bfd_byte
* ptr
)
4819 /* T2 instructions are 16-bit streamed. */
4820 if (htab
->byteswap_code
!= bfd_little_endian (output_bfd
))
4822 bfd_putl16 ((val
>> 16) & 0xffff, ptr
);
4823 bfd_putl16 ((val
& 0xffff), ptr
+ 2);
4827 bfd_putb16 ((val
>> 16) & 0xffff, ptr
);
4828 bfd_putb16 ((val
& 0xffff), ptr
+ 2);
4832 /* If it's possible to change R_TYPE to a more efficient access
4833 model, return the new reloc type. */
4836 elf32_arm_tls_transition (struct bfd_link_info
*info
, int r_type
,
4837 struct elf_link_hash_entry
*h
)
4839 int is_local
= (h
== NULL
);
4841 if (bfd_link_pic (info
)
4842 || (h
&& h
->root
.type
== bfd_link_hash_undefweak
))
4845 /* We do not support relaxations for Old TLS models. */
4848 case R_ARM_TLS_GOTDESC
:
4849 case R_ARM_TLS_CALL
:
4850 case R_ARM_THM_TLS_CALL
:
4851 case R_ARM_TLS_DESCSEQ
:
4852 case R_ARM_THM_TLS_DESCSEQ
:
4853 return is_local
? R_ARM_TLS_LE32
: R_ARM_TLS_IE32
;
4859 static bfd_reloc_status_type elf32_arm_final_link_relocate
4860 (reloc_howto_type
*, bfd
*, bfd
*, asection
*, bfd_byte
*,
4861 Elf_Internal_Rela
*, bfd_vma
, struct bfd_link_info
*, asection
*,
4862 const char *, unsigned char, enum arm_st_branch_type
,
4863 struct elf_link_hash_entry
*, bfd_boolean
*, char **);
4866 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type
)
4870 case arm_stub_a8_veneer_b_cond
:
4871 case arm_stub_a8_veneer_b
:
4872 case arm_stub_a8_veneer_bl
:
4875 case arm_stub_long_branch_any_any
:
4876 case arm_stub_long_branch_v4t_arm_thumb
:
4877 case arm_stub_long_branch_thumb_only
:
4878 case arm_stub_long_branch_thumb2_only
:
4879 case arm_stub_long_branch_thumb2_only_pure
:
4880 case arm_stub_long_branch_v4t_thumb_thumb
:
4881 case arm_stub_long_branch_v4t_thumb_arm
:
4882 case arm_stub_short_branch_v4t_thumb_arm
:
4883 case arm_stub_long_branch_any_arm_pic
:
4884 case arm_stub_long_branch_any_thumb_pic
:
4885 case arm_stub_long_branch_v4t_thumb_thumb_pic
:
4886 case arm_stub_long_branch_v4t_arm_thumb_pic
:
4887 case arm_stub_long_branch_v4t_thumb_arm_pic
:
4888 case arm_stub_long_branch_thumb_only_pic
:
4889 case arm_stub_long_branch_any_tls_pic
:
4890 case arm_stub_long_branch_v4t_thumb_tls_pic
:
4891 case arm_stub_cmse_branch_thumb_only
:
4892 case arm_stub_a8_veneer_blx
:
4895 case arm_stub_long_branch_arm_nacl
:
4896 case arm_stub_long_branch_arm_nacl_pic
:
4900 abort (); /* Should be unreachable. */
4904 /* Returns whether stubs of type STUB_TYPE take over the symbol they are
4905 veneering (TRUE) or have their own symbol (FALSE). */
4908 arm_stub_sym_claimed (enum elf32_arm_stub_type stub_type
)
4910 if (stub_type
>= max_stub_type
)
4911 abort (); /* Should be unreachable. */
4915 case arm_stub_cmse_branch_thumb_only
:
4922 abort (); /* Should be unreachable. */
4925 /* Returns the padding needed for the dedicated section used stubs of type
4929 arm_dedicated_stub_section_padding (enum elf32_arm_stub_type stub_type
)
4931 if (stub_type
>= max_stub_type
)
4932 abort (); /* Should be unreachable. */
4936 case arm_stub_cmse_branch_thumb_only
:
4943 abort (); /* Should be unreachable. */
4946 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4947 returns the address of the hash table field in HTAB holding the offset at
4948 which new veneers should be layed out in the stub section. */
4951 arm_new_stubs_start_offset_ptr (struct elf32_arm_link_hash_table
*htab
,
4952 enum elf32_arm_stub_type stub_type
)
4956 case arm_stub_cmse_branch_thumb_only
:
4957 return &htab
->new_cmse_stub_offset
;
4960 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type
));
4966 arm_build_one_stub (struct bfd_hash_entry
*gen_entry
,
4970 bfd_boolean removed_sg_veneer
;
4971 struct elf32_arm_stub_hash_entry
*stub_entry
;
4972 struct elf32_arm_link_hash_table
*globals
;
4973 struct bfd_link_info
*info
;
4980 const insn_sequence
*template_sequence
;
4982 int stub_reloc_idx
[MAXRELOCS
] = {-1, -1};
4983 int stub_reloc_offset
[MAXRELOCS
] = {0, 0};
4985 int just_allocated
= 0;
4987 /* Massage our args to the form they really have. */
4988 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
4989 info
= (struct bfd_link_info
*) in_arg
;
4991 globals
= elf32_arm_hash_table (info
);
4992 if (globals
== NULL
)
4995 stub_sec
= stub_entry
->stub_sec
;
4997 if ((globals
->fix_cortex_a8
< 0)
4998 != (arm_stub_required_alignment (stub_entry
->stub_type
) == 2))
4999 /* We have to do less-strictly-aligned fixes last. */
5002 /* Assign a slot at the end of section if none assigned yet. */
5003 if (stub_entry
->stub_offset
== (bfd_vma
) -1)
5005 stub_entry
->stub_offset
= stub_sec
->size
;
5008 loc
= stub_sec
->contents
+ stub_entry
->stub_offset
;
5010 stub_bfd
= stub_sec
->owner
;
5012 /* This is the address of the stub destination. */
5013 sym_value
= (stub_entry
->target_value
5014 + stub_entry
->target_section
->output_offset
5015 + stub_entry
->target_section
->output_section
->vma
);
5017 template_sequence
= stub_entry
->stub_template
;
5018 template_size
= stub_entry
->stub_template_size
;
5021 for (i
= 0; i
< template_size
; i
++)
5023 switch (template_sequence
[i
].type
)
5027 bfd_vma data
= (bfd_vma
) template_sequence
[i
].data
;
5028 if (template_sequence
[i
].reloc_addend
!= 0)
5030 /* We've borrowed the reloc_addend field to mean we should
5031 insert a condition code into this (Thumb-1 branch)
5032 instruction. See THUMB16_BCOND_INSN. */
5033 BFD_ASSERT ((data
& 0xff00) == 0xd000);
5034 data
|= ((stub_entry
->orig_insn
>> 22) & 0xf) << 8;
5036 bfd_put_16 (stub_bfd
, data
, loc
+ size
);
5042 bfd_put_16 (stub_bfd
,
5043 (template_sequence
[i
].data
>> 16) & 0xffff,
5045 bfd_put_16 (stub_bfd
, template_sequence
[i
].data
& 0xffff,
5047 if (template_sequence
[i
].r_type
!= R_ARM_NONE
)
5049 stub_reloc_idx
[nrelocs
] = i
;
5050 stub_reloc_offset
[nrelocs
++] = size
;
5056 bfd_put_32 (stub_bfd
, template_sequence
[i
].data
,
5058 /* Handle cases where the target is encoded within the
5060 if (template_sequence
[i
].r_type
== R_ARM_JUMP24
)
5062 stub_reloc_idx
[nrelocs
] = i
;
5063 stub_reloc_offset
[nrelocs
++] = size
;
5069 bfd_put_32 (stub_bfd
, template_sequence
[i
].data
, loc
+ size
);
5070 stub_reloc_idx
[nrelocs
] = i
;
5071 stub_reloc_offset
[nrelocs
++] = size
;
5082 stub_sec
->size
+= size
;
5084 /* Stub size has already been computed in arm_size_one_stub. Check
5086 BFD_ASSERT (size
== stub_entry
->stub_size
);
5088 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
5089 if (stub_entry
->branch_type
== ST_BRANCH_TO_THUMB
)
5092 /* Assume non empty slots have at least one and at most MAXRELOCS entries
5093 to relocate in each stub. */
5095 (size
== 0 && stub_entry
->stub_type
== arm_stub_cmse_branch_thumb_only
);
5096 BFD_ASSERT (removed_sg_veneer
|| (nrelocs
!= 0 && nrelocs
<= MAXRELOCS
));
5098 for (i
= 0; i
< nrelocs
; i
++)
5100 Elf_Internal_Rela rel
;
5101 bfd_boolean unresolved_reloc
;
5102 char *error_message
;
5104 sym_value
+ template_sequence
[stub_reloc_idx
[i
]].reloc_addend
;
5106 rel
.r_offset
= stub_entry
->stub_offset
+ stub_reloc_offset
[i
];
5107 rel
.r_info
= ELF32_R_INFO (0,
5108 template_sequence
[stub_reloc_idx
[i
]].r_type
);
5111 if (stub_entry
->stub_type
== arm_stub_a8_veneer_b_cond
&& i
== 0)
5112 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
5113 template should refer back to the instruction after the original
5114 branch. We use target_section as Cortex-A8 erratum workaround stubs
5115 are only generated when both source and target are in the same
5117 points_to
= stub_entry
->target_section
->output_section
->vma
5118 + stub_entry
->target_section
->output_offset
5119 + stub_entry
->source_value
;
5121 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
5122 (template_sequence
[stub_reloc_idx
[i
]].r_type
),
5123 stub_bfd
, info
->output_bfd
, stub_sec
, stub_sec
->contents
, &rel
,
5124 points_to
, info
, stub_entry
->target_section
, "", STT_FUNC
,
5125 stub_entry
->branch_type
,
5126 (struct elf_link_hash_entry
*) stub_entry
->h
, &unresolved_reloc
,
5134 /* Calculate the template, template size and instruction size for a stub.
5135 Return value is the instruction size. */
5138 find_stub_size_and_template (enum elf32_arm_stub_type stub_type
,
5139 const insn_sequence
**stub_template
,
5140 int *stub_template_size
)
5142 const insn_sequence
*template_sequence
= NULL
;
5143 int template_size
= 0, i
;
5146 template_sequence
= stub_definitions
[stub_type
].template_sequence
;
5148 *stub_template
= template_sequence
;
5150 template_size
= stub_definitions
[stub_type
].template_size
;
5151 if (stub_template_size
)
5152 *stub_template_size
= template_size
;
5155 for (i
= 0; i
< template_size
; i
++)
5157 switch (template_sequence
[i
].type
)
5178 /* As above, but don't actually build the stub. Just bump offset so
5179 we know stub section sizes. */
5182 arm_size_one_stub (struct bfd_hash_entry
*gen_entry
,
5183 void *in_arg ATTRIBUTE_UNUSED
)
5185 struct elf32_arm_stub_hash_entry
*stub_entry
;
5186 const insn_sequence
*template_sequence
;
5187 int template_size
, size
;
5189 /* Massage our args to the form they really have. */
5190 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
5192 BFD_ASSERT((stub_entry
->stub_type
> arm_stub_none
)
5193 && stub_entry
->stub_type
< ARRAY_SIZE(stub_definitions
));
5195 size
= find_stub_size_and_template (stub_entry
->stub_type
, &template_sequence
,
5198 /* Initialized to -1. Null size indicates an empty slot full of zeros. */
5199 if (stub_entry
->stub_template_size
)
5201 stub_entry
->stub_size
= size
;
5202 stub_entry
->stub_template
= template_sequence
;
5203 stub_entry
->stub_template_size
= template_size
;
5206 /* Already accounted for. */
5207 if (stub_entry
->stub_offset
!= (bfd_vma
) -1)
5210 size
= (size
+ 7) & ~7;
5211 stub_entry
->stub_sec
->size
+= size
;
5216 /* External entry points for sizing and building linker stubs. */
5218 /* Set up various things so that we can make a list of input sections
5219 for each output section included in the link. Returns -1 on error,
5220 0 when no stubs will be needed, and 1 on success. */
5223 elf32_arm_setup_section_lists (bfd
*output_bfd
,
5224 struct bfd_link_info
*info
)
5227 unsigned int bfd_count
;
5228 unsigned int top_id
, top_index
;
5230 asection
**input_list
, **list
;
5232 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
5236 if (! is_elf_hash_table (htab
))
5239 /* Count the number of input BFDs and find the top input section id. */
5240 for (input_bfd
= info
->input_bfds
, bfd_count
= 0, top_id
= 0;
5242 input_bfd
= input_bfd
->link
.next
)
5245 for (section
= input_bfd
->sections
;
5247 section
= section
->next
)
5249 if (top_id
< section
->id
)
5250 top_id
= section
->id
;
5253 htab
->bfd_count
= bfd_count
;
5255 amt
= sizeof (struct map_stub
) * (top_id
+ 1);
5256 htab
->stub_group
= (struct map_stub
*) bfd_zmalloc (amt
);
5257 if (htab
->stub_group
== NULL
)
5259 htab
->top_id
= top_id
;
5261 /* We can't use output_bfd->section_count here to find the top output
5262 section index as some sections may have been removed, and
5263 _bfd_strip_section_from_output doesn't renumber the indices. */
5264 for (section
= output_bfd
->sections
, top_index
= 0;
5266 section
= section
->next
)
5268 if (top_index
< section
->index
)
5269 top_index
= section
->index
;
5272 htab
->top_index
= top_index
;
5273 amt
= sizeof (asection
*) * (top_index
+ 1);
5274 input_list
= (asection
**) bfd_malloc (amt
);
5275 htab
->input_list
= input_list
;
5276 if (input_list
== NULL
)
5279 /* For sections we aren't interested in, mark their entries with a
5280 value we can check later. */
5281 list
= input_list
+ top_index
;
5283 *list
= bfd_abs_section_ptr
;
5284 while (list
-- != input_list
);
5286 for (section
= output_bfd
->sections
;
5288 section
= section
->next
)
5290 if ((section
->flags
& SEC_CODE
) != 0)
5291 input_list
[section
->index
] = NULL
;
5297 /* The linker repeatedly calls this function for each input section,
5298 in the order that input sections are linked into output sections.
5299 Build lists of input sections to determine groupings between which
5300 we may insert linker stubs. */
5303 elf32_arm_next_input_section (struct bfd_link_info
*info
,
5306 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
5311 if (isec
->output_section
->index
<= htab
->top_index
)
5313 asection
**list
= htab
->input_list
+ isec
->output_section
->index
;
5315 if (*list
!= bfd_abs_section_ptr
&& (isec
->flags
& SEC_CODE
) != 0)
5317 /* Steal the link_sec pointer for our list. */
5318 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
5319 /* This happens to make the list in reverse order,
5320 which we reverse later. */
5321 PREV_SEC (isec
) = *list
;
5327 /* See whether we can group stub sections together. Grouping stub
5328 sections may result in fewer stubs. More importantly, we need to
5329 put all .init* and .fini* stubs at the end of the .init or
5330 .fini output sections respectively, because glibc splits the
5331 _init and _fini functions into multiple parts. Putting a stub in
5332 the middle of a function is not a good idea. */
5335 group_sections (struct elf32_arm_link_hash_table
*htab
,
5336 bfd_size_type stub_group_size
,
5337 bfd_boolean stubs_always_after_branch
)
5339 asection
**list
= htab
->input_list
;
5343 asection
*tail
= *list
;
5346 if (tail
== bfd_abs_section_ptr
)
5349 /* Reverse the list: we must avoid placing stubs at the
5350 beginning of the section because the beginning of the text
5351 section may be required for an interrupt vector in bare metal
5353 #define NEXT_SEC PREV_SEC
5355 while (tail
!= NULL
)
5357 /* Pop from tail. */
5358 asection
*item
= tail
;
5359 tail
= PREV_SEC (item
);
5362 NEXT_SEC (item
) = head
;
5366 while (head
!= NULL
)
5370 bfd_vma stub_group_start
= head
->output_offset
;
5371 bfd_vma end_of_next
;
5374 while (NEXT_SEC (curr
) != NULL
)
5376 next
= NEXT_SEC (curr
);
5377 end_of_next
= next
->output_offset
+ next
->size
;
5378 if (end_of_next
- stub_group_start
>= stub_group_size
)
5379 /* End of NEXT is too far from start, so stop. */
5381 /* Add NEXT to the group. */
5385 /* OK, the size from the start to the start of CURR is less
5386 than stub_group_size and thus can be handled by one stub
5387 section. (Or the head section is itself larger than
5388 stub_group_size, in which case we may be toast.)
5389 We should really be keeping track of the total size of
5390 stubs added here, as stubs contribute to the final output
5394 next
= NEXT_SEC (head
);
5395 /* Set up this stub group. */
5396 htab
->stub_group
[head
->id
].link_sec
= curr
;
5398 while (head
!= curr
&& (head
= next
) != NULL
);
5400 /* But wait, there's more! Input sections up to stub_group_size
5401 bytes after the stub section can be handled by it too. */
5402 if (!stubs_always_after_branch
)
5404 stub_group_start
= curr
->output_offset
+ curr
->size
;
5406 while (next
!= NULL
)
5408 end_of_next
= next
->output_offset
+ next
->size
;
5409 if (end_of_next
- stub_group_start
>= stub_group_size
)
5410 /* End of NEXT is too far from stubs, so stop. */
5412 /* Add NEXT to the stub group. */
5414 next
= NEXT_SEC (head
);
5415 htab
->stub_group
[head
->id
].link_sec
= curr
;
5421 while (list
++ != htab
->input_list
+ htab
->top_index
);
5423 free (htab
->input_list
);
5428 /* Comparison function for sorting/searching relocations relating to Cortex-A8
5432 a8_reloc_compare (const void *a
, const void *b
)
5434 const struct a8_erratum_reloc
*ra
= (const struct a8_erratum_reloc
*) a
;
5435 const struct a8_erratum_reloc
*rb
= (const struct a8_erratum_reloc
*) b
;
5437 if (ra
->from
< rb
->from
)
5439 else if (ra
->from
> rb
->from
)
5445 static struct elf_link_hash_entry
*find_thumb_glue (struct bfd_link_info
*,
5446 const char *, char **);
5448 /* Helper function to scan code for sequences which might trigger the Cortex-A8
5449 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
5450 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
5454 cortex_a8_erratum_scan (bfd
*input_bfd
,
5455 struct bfd_link_info
*info
,
5456 struct a8_erratum_fix
**a8_fixes_p
,
5457 unsigned int *num_a8_fixes_p
,
5458 unsigned int *a8_fix_table_size_p
,
5459 struct a8_erratum_reloc
*a8_relocs
,
5460 unsigned int num_a8_relocs
,
5461 unsigned prev_num_a8_fixes
,
5462 bfd_boolean
*stub_changed_p
)
5465 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
5466 struct a8_erratum_fix
*a8_fixes
= *a8_fixes_p
;
5467 unsigned int num_a8_fixes
= *num_a8_fixes_p
;
5468 unsigned int a8_fix_table_size
= *a8_fix_table_size_p
;
5473 for (section
= input_bfd
->sections
;
5475 section
= section
->next
)
5477 bfd_byte
*contents
= NULL
;
5478 struct _arm_elf_section_data
*sec_data
;
5482 if (elf_section_type (section
) != SHT_PROGBITS
5483 || (elf_section_flags (section
) & SHF_EXECINSTR
) == 0
5484 || (section
->flags
& SEC_EXCLUDE
) != 0
5485 || (section
->sec_info_type
== SEC_INFO_TYPE_JUST_SYMS
)
5486 || (section
->output_section
== bfd_abs_section_ptr
))
5489 base_vma
= section
->output_section
->vma
+ section
->output_offset
;
5491 if (elf_section_data (section
)->this_hdr
.contents
!= NULL
)
5492 contents
= elf_section_data (section
)->this_hdr
.contents
;
5493 else if (! bfd_malloc_and_get_section (input_bfd
, section
, &contents
))
5496 sec_data
= elf32_arm_section_data (section
);
5498 for (span
= 0; span
< sec_data
->mapcount
; span
++)
5500 unsigned int span_start
= sec_data
->map
[span
].vma
;
5501 unsigned int span_end
= (span
== sec_data
->mapcount
- 1)
5502 ? section
->size
: sec_data
->map
[span
+ 1].vma
;
5504 char span_type
= sec_data
->map
[span
].type
;
5505 bfd_boolean last_was_32bit
= FALSE
, last_was_branch
= FALSE
;
5507 if (span_type
!= 't')
5510 /* Span is entirely within a single 4KB region: skip scanning. */
5511 if (((base_vma
+ span_start
) & ~0xfff)
5512 == ((base_vma
+ span_end
) & ~0xfff))
5515 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
5517 * The opcode is BLX.W, BL.W, B.W, Bcc.W
5518 * The branch target is in the same 4KB region as the
5519 first half of the branch.
5520 * The instruction before the branch is a 32-bit
5521 length non-branch instruction. */
5522 for (i
= span_start
; i
< span_end
;)
5524 unsigned int insn
= bfd_getl16 (&contents
[i
]);
5525 bfd_boolean insn_32bit
= FALSE
, is_blx
= FALSE
, is_b
= FALSE
;
5526 bfd_boolean is_bl
= FALSE
, is_bcc
= FALSE
, is_32bit_branch
;
5528 if ((insn
& 0xe000) == 0xe000 && (insn
& 0x1800) != 0x0000)
5533 /* Load the rest of the insn (in manual-friendly order). */
5534 insn
= (insn
<< 16) | bfd_getl16 (&contents
[i
+ 2]);
5536 /* Encoding T4: B<c>.W. */
5537 is_b
= (insn
& 0xf800d000) == 0xf0009000;
5538 /* Encoding T1: BL<c>.W. */
5539 is_bl
= (insn
& 0xf800d000) == 0xf000d000;
5540 /* Encoding T2: BLX<c>.W. */
5541 is_blx
= (insn
& 0xf800d000) == 0xf000c000;
5542 /* Encoding T3: B<c>.W (not permitted in IT block). */
5543 is_bcc
= (insn
& 0xf800d000) == 0xf0008000
5544 && (insn
& 0x07f00000) != 0x03800000;
5547 is_32bit_branch
= is_b
|| is_bl
|| is_blx
|| is_bcc
;
5549 if (((base_vma
+ i
) & 0xfff) == 0xffe
5553 && ! last_was_branch
)
5555 bfd_signed_vma offset
= 0;
5556 bfd_boolean force_target_arm
= FALSE
;
5557 bfd_boolean force_target_thumb
= FALSE
;
5559 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
5560 struct a8_erratum_reloc key
, *found
;
5561 bfd_boolean use_plt
= FALSE
;
5563 key
.from
= base_vma
+ i
;
5564 found
= (struct a8_erratum_reloc
*)
5565 bsearch (&key
, a8_relocs
, num_a8_relocs
,
5566 sizeof (struct a8_erratum_reloc
),
5571 char *error_message
= NULL
;
5572 struct elf_link_hash_entry
*entry
;
5574 /* We don't care about the error returned from this
5575 function, only if there is glue or not. */
5576 entry
= find_thumb_glue (info
, found
->sym_name
,
5580 found
->non_a8_stub
= TRUE
;
5582 /* Keep a simpler condition, for the sake of clarity. */
5583 if (htab
->root
.splt
!= NULL
&& found
->hash
!= NULL
5584 && found
->hash
->root
.plt
.offset
!= (bfd_vma
) -1)
5587 if (found
->r_type
== R_ARM_THM_CALL
)
5589 if (found
->branch_type
== ST_BRANCH_TO_ARM
5591 force_target_arm
= TRUE
;
5593 force_target_thumb
= TRUE
;
5597 /* Check if we have an offending branch instruction. */
5599 if (found
&& found
->non_a8_stub
)
5600 /* We've already made a stub for this instruction, e.g.
5601 it's a long branch or a Thumb->ARM stub. Assume that
5602 stub will suffice to work around the A8 erratum (see
5603 setting of always_after_branch above). */
5607 offset
= (insn
& 0x7ff) << 1;
5608 offset
|= (insn
& 0x3f0000) >> 4;
5609 offset
|= (insn
& 0x2000) ? 0x40000 : 0;
5610 offset
|= (insn
& 0x800) ? 0x80000 : 0;
5611 offset
|= (insn
& 0x4000000) ? 0x100000 : 0;
5612 if (offset
& 0x100000)
5613 offset
|= ~ ((bfd_signed_vma
) 0xfffff);
5614 stub_type
= arm_stub_a8_veneer_b_cond
;
5616 else if (is_b
|| is_bl
|| is_blx
)
5618 int s
= (insn
& 0x4000000) != 0;
5619 int j1
= (insn
& 0x2000) != 0;
5620 int j2
= (insn
& 0x800) != 0;
5624 offset
= (insn
& 0x7ff) << 1;
5625 offset
|= (insn
& 0x3ff0000) >> 4;
5629 if (offset
& 0x1000000)
5630 offset
|= ~ ((bfd_signed_vma
) 0xffffff);
5633 offset
&= ~ ((bfd_signed_vma
) 3);
5635 stub_type
= is_blx
? arm_stub_a8_veneer_blx
:
5636 is_bl
? arm_stub_a8_veneer_bl
: arm_stub_a8_veneer_b
;
5639 if (stub_type
!= arm_stub_none
)
5641 bfd_vma pc_for_insn
= base_vma
+ i
+ 4;
5643 /* The original instruction is a BL, but the target is
5644 an ARM instruction. If we were not making a stub,
5645 the BL would have been converted to a BLX. Use the
5646 BLX stub instead in that case. */
5647 if (htab
->use_blx
&& force_target_arm
5648 && stub_type
== arm_stub_a8_veneer_bl
)
5650 stub_type
= arm_stub_a8_veneer_blx
;
5654 /* Conversely, if the original instruction was
5655 BLX but the target is Thumb mode, use the BL
5657 else if (force_target_thumb
5658 && stub_type
== arm_stub_a8_veneer_blx
)
5660 stub_type
= arm_stub_a8_veneer_bl
;
5666 pc_for_insn
&= ~ ((bfd_vma
) 3);
5668 /* If we found a relocation, use the proper destination,
5669 not the offset in the (unrelocated) instruction.
5670 Note this is always done if we switched the stub type
5674 (bfd_signed_vma
) (found
->destination
- pc_for_insn
);
5676 /* If the stub will use a Thumb-mode branch to a
5677 PLT target, redirect it to the preceding Thumb
5679 if (stub_type
!= arm_stub_a8_veneer_blx
&& use_plt
)
5680 offset
-= PLT_THUMB_STUB_SIZE
;
5682 target
= pc_for_insn
+ offset
;
5684 /* The BLX stub is ARM-mode code. Adjust the offset to
5685 take the different PC value (+8 instead of +4) into
5687 if (stub_type
== arm_stub_a8_veneer_blx
)
5690 if (((base_vma
+ i
) & ~0xfff) == (target
& ~0xfff))
5692 char *stub_name
= NULL
;
5694 if (num_a8_fixes
== a8_fix_table_size
)
5696 a8_fix_table_size
*= 2;
5697 a8_fixes
= (struct a8_erratum_fix
*)
5698 bfd_realloc (a8_fixes
,
5699 sizeof (struct a8_erratum_fix
)
5700 * a8_fix_table_size
);
5703 if (num_a8_fixes
< prev_num_a8_fixes
)
5705 /* If we're doing a subsequent scan,
5706 check if we've found the same fix as
5707 before, and try and reuse the stub
5709 stub_name
= a8_fixes
[num_a8_fixes
].stub_name
;
5710 if ((a8_fixes
[num_a8_fixes
].section
!= section
)
5711 || (a8_fixes
[num_a8_fixes
].offset
!= i
))
5715 *stub_changed_p
= TRUE
;
5721 stub_name
= (char *) bfd_malloc (8 + 1 + 8 + 1);
5722 if (stub_name
!= NULL
)
5723 sprintf (stub_name
, "%x:%x", section
->id
, i
);
5726 a8_fixes
[num_a8_fixes
].input_bfd
= input_bfd
;
5727 a8_fixes
[num_a8_fixes
].section
= section
;
5728 a8_fixes
[num_a8_fixes
].offset
= i
;
5729 a8_fixes
[num_a8_fixes
].target_offset
=
5731 a8_fixes
[num_a8_fixes
].orig_insn
= insn
;
5732 a8_fixes
[num_a8_fixes
].stub_name
= stub_name
;
5733 a8_fixes
[num_a8_fixes
].stub_type
= stub_type
;
5734 a8_fixes
[num_a8_fixes
].branch_type
=
5735 is_blx
? ST_BRANCH_TO_ARM
: ST_BRANCH_TO_THUMB
;
5742 i
+= insn_32bit
? 4 : 2;
5743 last_was_32bit
= insn_32bit
;
5744 last_was_branch
= is_32bit_branch
;
5748 if (elf_section_data (section
)->this_hdr
.contents
== NULL
)
5752 *a8_fixes_p
= a8_fixes
;
5753 *num_a8_fixes_p
= num_a8_fixes
;
5754 *a8_fix_table_size_p
= a8_fix_table_size
;
5759 /* Create or update a stub entry depending on whether the stub can already be
5760 found in HTAB. The stub is identified by:
5761 - its type STUB_TYPE
5762 - its source branch (note that several can share the same stub) whose
5763 section and relocation (if any) are given by SECTION and IRELA
5765 - its target symbol whose input section, hash, name, value and branch type
5766 are given in SYM_SEC, HASH, SYM_NAME, SYM_VALUE and BRANCH_TYPE
5769 If found, the value of the stub's target symbol is updated from SYM_VALUE
5770 and *NEW_STUB is set to FALSE. Otherwise, *NEW_STUB is set to
5771 TRUE and the stub entry is initialized.
5773 Returns the stub that was created or updated, or NULL if an error
5776 static struct elf32_arm_stub_hash_entry
*
5777 elf32_arm_create_stub (struct elf32_arm_link_hash_table
*htab
,
5778 enum elf32_arm_stub_type stub_type
, asection
*section
,
5779 Elf_Internal_Rela
*irela
, asection
*sym_sec
,
5780 struct elf32_arm_link_hash_entry
*hash
, char *sym_name
,
5781 bfd_vma sym_value
, enum arm_st_branch_type branch_type
,
5782 bfd_boolean
*new_stub
)
5784 const asection
*id_sec
;
5786 struct elf32_arm_stub_hash_entry
*stub_entry
;
5787 unsigned int r_type
;
5788 bfd_boolean sym_claimed
= arm_stub_sym_claimed (stub_type
);
5790 BFD_ASSERT (stub_type
!= arm_stub_none
);
5794 stub_name
= sym_name
;
5798 BFD_ASSERT (section
);
5799 BFD_ASSERT (section
->id
<= htab
->top_id
);
5801 /* Support for grouping stub sections. */
5802 id_sec
= htab
->stub_group
[section
->id
].link_sec
;
5804 /* Get the name of this stub. */
5805 stub_name
= elf32_arm_stub_name (id_sec
, sym_sec
, hash
, irela
,
5811 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
, stub_name
, FALSE
,
5813 /* The proper stub has already been created, just update its value. */
5814 if (stub_entry
!= NULL
)
5818 stub_entry
->target_value
= sym_value
;
5822 stub_entry
= elf32_arm_add_stub (stub_name
, section
, htab
, stub_type
);
5823 if (stub_entry
== NULL
)
5830 stub_entry
->target_value
= sym_value
;
5831 stub_entry
->target_section
= sym_sec
;
5832 stub_entry
->stub_type
= stub_type
;
5833 stub_entry
->h
= hash
;
5834 stub_entry
->branch_type
= branch_type
;
5837 stub_entry
->output_name
= sym_name
;
5840 if (sym_name
== NULL
)
5841 sym_name
= "unnamed";
5842 stub_entry
->output_name
= (char *)
5843 bfd_alloc (htab
->stub_bfd
, sizeof (THUMB2ARM_GLUE_ENTRY_NAME
)
5844 + strlen (sym_name
));
5845 if (stub_entry
->output_name
== NULL
)
5851 /* For historical reasons, use the existing names for ARM-to-Thumb and
5852 Thumb-to-ARM stubs. */
5853 r_type
= ELF32_R_TYPE (irela
->r_info
);
5854 if ((r_type
== (unsigned int) R_ARM_THM_CALL
5855 || r_type
== (unsigned int) R_ARM_THM_JUMP24
5856 || r_type
== (unsigned int) R_ARM_THM_JUMP19
)
5857 && branch_type
== ST_BRANCH_TO_ARM
)
5858 sprintf (stub_entry
->output_name
, THUMB2ARM_GLUE_ENTRY_NAME
, sym_name
);
5859 else if ((r_type
== (unsigned int) R_ARM_CALL
5860 || r_type
== (unsigned int) R_ARM_JUMP24
)
5861 && branch_type
== ST_BRANCH_TO_THUMB
)
5862 sprintf (stub_entry
->output_name
, ARM2THUMB_GLUE_ENTRY_NAME
, sym_name
);
5864 sprintf (stub_entry
->output_name
, STUB_ENTRY_NAME
, sym_name
);
5871 /* Scan symbols in INPUT_BFD to identify secure entry functions needing a
5872 gateway veneer to transition from non secure to secure state and create them
5875 "ARMv8-M Security Extensions: Requirements on Development Tools" document
5876 defines the conditions that govern Secure Gateway veneer creation for a
5877 given symbol <SYM> as follows:
5878 - it has function type
5879 - it has non local binding
5880 - a symbol named __acle_se_<SYM> (called special symbol) exists with the
5881 same type, binding and value as <SYM> (called normal symbol).
5882 An entry function can handle secure state transition itself in which case
5883 its special symbol would have a different value from the normal symbol.
5885 OUT_ATTR gives the output attributes, SYM_HASHES the symbol index to hash
5886 entry mapping while HTAB gives the name to hash entry mapping.
5887 *CMSE_STUB_CREATED is increased by the number of secure gateway veneer
5890 The return value gives whether a stub failed to be allocated. */
5893 cmse_scan (bfd
*input_bfd
, struct elf32_arm_link_hash_table
*htab
,
5894 obj_attribute
*out_attr
, struct elf_link_hash_entry
**sym_hashes
,
5895 int *cmse_stub_created
)
5897 const struct elf_backend_data
*bed
;
5898 Elf_Internal_Shdr
*symtab_hdr
;
5899 unsigned i
, j
, sym_count
, ext_start
;
5900 Elf_Internal_Sym
*cmse_sym
, *local_syms
;
5901 struct elf32_arm_link_hash_entry
*hash
, *cmse_hash
= NULL
;
5902 enum arm_st_branch_type branch_type
;
5903 char *sym_name
, *lsym_name
;
5906 struct elf32_arm_stub_hash_entry
*stub_entry
;
5907 bfd_boolean is_v8m
, new_stub
, cmse_invalid
, ret
= TRUE
;
5909 bed
= get_elf_backend_data (input_bfd
);
5910 symtab_hdr
= &elf_tdata (input_bfd
)->symtab_hdr
;
5911 sym_count
= symtab_hdr
->sh_size
/ bed
->s
->sizeof_sym
;
5912 ext_start
= symtab_hdr
->sh_info
;
5913 is_v8m
= (out_attr
[Tag_CPU_arch
].i
>= TAG_CPU_ARCH_V8M_BASE
5914 && out_attr
[Tag_CPU_arch_profile
].i
== 'M');
5916 local_syms
= (Elf_Internal_Sym
*) symtab_hdr
->contents
;
5917 if (local_syms
== NULL
)
5918 local_syms
= bfd_elf_get_elf_syms (input_bfd
, symtab_hdr
,
5919 symtab_hdr
->sh_info
, 0, NULL
, NULL
,
5921 if (symtab_hdr
->sh_info
&& local_syms
== NULL
)
5925 for (i
= 0; i
< sym_count
; i
++)
5927 cmse_invalid
= FALSE
;
5931 cmse_sym
= &local_syms
[i
];
5932 /* Not a special symbol. */
5933 if (!ARM_GET_SYM_CMSE_SPCL (cmse_sym
->st_target_internal
))
5935 sym_name
= bfd_elf_string_from_elf_section (input_bfd
,
5936 symtab_hdr
->sh_link
,
5938 /* Special symbol with local binding. */
5939 cmse_invalid
= TRUE
;
5943 cmse_hash
= elf32_arm_hash_entry (sym_hashes
[i
- ext_start
]);
5944 sym_name
= (char *) cmse_hash
->root
.root
.root
.string
;
5946 /* Not a special symbol. */
5947 if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash
->root
.target_internal
))
5950 /* Special symbol has incorrect binding or type. */
5951 if ((cmse_hash
->root
.root
.type
!= bfd_link_hash_defined
5952 && cmse_hash
->root
.root
.type
!= bfd_link_hash_defweak
)
5953 || cmse_hash
->root
.type
!= STT_FUNC
)
5954 cmse_invalid
= TRUE
;
5959 _bfd_error_handler (_("%pB: special symbol `%s' only allowed for "
5960 "ARMv8-M architecture or later"),
5961 input_bfd
, sym_name
);
5962 is_v8m
= TRUE
; /* Avoid multiple warning. */
5968 _bfd_error_handler (_("%pB: invalid special symbol `%s'; it must be"
5969 " a global or weak function symbol"),
5970 input_bfd
, sym_name
);
5976 sym_name
+= strlen (CMSE_PREFIX
);
5977 hash
= (struct elf32_arm_link_hash_entry
*)
5978 elf_link_hash_lookup (&(htab
)->root
, sym_name
, FALSE
, FALSE
, TRUE
);
5980 /* No associated normal symbol or it is neither global nor weak. */
5982 || (hash
->root
.root
.type
!= bfd_link_hash_defined
5983 && hash
->root
.root
.type
!= bfd_link_hash_defweak
)
5984 || hash
->root
.type
!= STT_FUNC
)
5986 /* Initialize here to avoid warning about use of possibly
5987 uninitialized variable. */
5992 /* Searching for a normal symbol with local binding. */
5993 for (; j
< ext_start
; j
++)
5996 bfd_elf_string_from_elf_section (input_bfd
,
5997 symtab_hdr
->sh_link
,
5998 local_syms
[j
].st_name
);
5999 if (!strcmp (sym_name
, lsym_name
))
6004 if (hash
|| j
< ext_start
)
6007 (_("%pB: invalid standard symbol `%s'; it must be "
6008 "a global or weak function symbol"),
6009 input_bfd
, sym_name
);
6013 (_("%pB: absent standard symbol `%s'"), input_bfd
, sym_name
);
6019 sym_value
= hash
->root
.root
.u
.def
.value
;
6020 section
= hash
->root
.root
.u
.def
.section
;
6022 if (cmse_hash
->root
.root
.u
.def
.section
!= section
)
6025 (_("%pB: `%s' and its special symbol are in different sections"),
6026 input_bfd
, sym_name
);
6029 if (cmse_hash
->root
.root
.u
.def
.value
!= sym_value
)
6030 continue; /* Ignore: could be an entry function starting with SG. */
6032 /* If this section is a link-once section that will be discarded, then
6033 don't create any stubs. */
6034 if (section
->output_section
== NULL
)
6037 (_("%pB: entry function `%s' not output"), input_bfd
, sym_name
);
6041 if (hash
->root
.size
== 0)
6044 (_("%pB: entry function `%s' is empty"), input_bfd
, sym_name
);
6050 branch_type
= ARM_GET_SYM_BRANCH_TYPE (hash
->root
.target_internal
);
6052 = elf32_arm_create_stub (htab
, arm_stub_cmse_branch_thumb_only
,
6053 NULL
, NULL
, section
, hash
, sym_name
,
6054 sym_value
, branch_type
, &new_stub
);
6056 if (stub_entry
== NULL
)
6060 BFD_ASSERT (new_stub
);
6061 (*cmse_stub_created
)++;
6065 if (!symtab_hdr
->contents
)
6070 /* Return TRUE iff a symbol identified by its linker HASH entry is a secure
6071 code entry function, ie can be called from non secure code without using a
6075 cmse_entry_fct_p (struct elf32_arm_link_hash_entry
*hash
)
6077 bfd_byte contents
[4];
6078 uint32_t first_insn
;
6083 /* Defined symbol of function type. */
6084 if (hash
->root
.root
.type
!= bfd_link_hash_defined
6085 && hash
->root
.root
.type
!= bfd_link_hash_defweak
)
6087 if (hash
->root
.type
!= STT_FUNC
)
6090 /* Read first instruction. */
6091 section
= hash
->root
.root
.u
.def
.section
;
6092 abfd
= section
->owner
;
6093 offset
= hash
->root
.root
.u
.def
.value
- section
->vma
;
6094 if (!bfd_get_section_contents (abfd
, section
, contents
, offset
,
6098 first_insn
= bfd_get_32 (abfd
, contents
);
6100 /* Starts by SG instruction. */
6101 return first_insn
== 0xe97fe97f;
6104 /* Output the name (in symbol table) of the veneer GEN_ENTRY if it is a new
6105 secure gateway veneers (ie. the veneers was not in the input import library)
6106 and there is no output import library (GEN_INFO->out_implib_bfd is NULL. */
6109 arm_list_new_cmse_stub (struct bfd_hash_entry
*gen_entry
, void *gen_info
)
6111 struct elf32_arm_stub_hash_entry
*stub_entry
;
6112 struct bfd_link_info
*info
;
6114 /* Massage our args to the form they really have. */
6115 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
6116 info
= (struct bfd_link_info
*) gen_info
;
6118 if (info
->out_implib_bfd
)
6121 if (stub_entry
->stub_type
!= arm_stub_cmse_branch_thumb_only
)
6124 if (stub_entry
->stub_offset
== (bfd_vma
) -1)
6125 _bfd_error_handler (" %s", stub_entry
->output_name
);
6130 /* Set offset of each secure gateway veneers so that its address remain
6131 identical to the one in the input import library referred by
6132 HTAB->in_implib_bfd. A warning is issued for veneers that disappeared
6133 (present in input import library but absent from the executable being
6134 linked) or if new veneers appeared and there is no output import library
6135 (INFO->out_implib_bfd is NULL and *CMSE_STUB_CREATED is bigger than the
6136 number of secure gateway veneers found in the input import library.
6138 The function returns whether an error occurred. If no error occurred,
6139 *CMSE_STUB_CREATED gives the number of SG veneers created by both cmse_scan
6140 and this function and HTAB->new_cmse_stub_offset is set to the biggest
6141 veneer observed set for new veneers to be layed out after. */
6144 set_cmse_veneer_addr_from_implib (struct bfd_link_info
*info
,
6145 struct elf32_arm_link_hash_table
*htab
,
6146 int *cmse_stub_created
)
6153 asection
*stub_out_sec
;
6154 bfd_boolean ret
= TRUE
;
6155 Elf_Internal_Sym
*intsym
;
6156 const char *out_sec_name
;
6157 bfd_size_type cmse_stub_size
;
6158 asymbol
**sympp
= NULL
, *sym
;
6159 struct elf32_arm_link_hash_entry
*hash
;
6160 const insn_sequence
*cmse_stub_template
;
6161 struct elf32_arm_stub_hash_entry
*stub_entry
;
6162 int cmse_stub_template_size
, new_cmse_stubs_created
= *cmse_stub_created
;
6163 bfd_vma veneer_value
, stub_offset
, next_cmse_stub_offset
;
6164 bfd_vma cmse_stub_array_start
= (bfd_vma
) -1, cmse_stub_sec_vma
= 0;
6166 /* No input secure gateway import library. */
6167 if (!htab
->in_implib_bfd
)
6170 in_implib_bfd
= htab
->in_implib_bfd
;
6171 if (!htab
->cmse_implib
)
6173 _bfd_error_handler (_("%pB: --in-implib only supported for Secure "
6174 "Gateway import libraries"), in_implib_bfd
);
6178 /* Get symbol table size. */
6179 symsize
= bfd_get_symtab_upper_bound (in_implib_bfd
);
6183 /* Read in the input secure gateway import library's symbol table. */
6184 sympp
= (asymbol
**) xmalloc (symsize
);
6185 symcount
= bfd_canonicalize_symtab (in_implib_bfd
, sympp
);
6192 htab
->new_cmse_stub_offset
= 0;
6194 find_stub_size_and_template (arm_stub_cmse_branch_thumb_only
,
6195 &cmse_stub_template
,
6196 &cmse_stub_template_size
);
6198 arm_dedicated_stub_output_section_name (arm_stub_cmse_branch_thumb_only
);
6200 bfd_get_section_by_name (htab
->obfd
, out_sec_name
);
6201 if (stub_out_sec
!= NULL
)
6202 cmse_stub_sec_vma
= stub_out_sec
->vma
;
6204 /* Set addresses of veneers mentionned in input secure gateway import
6205 library's symbol table. */
6206 for (i
= 0; i
< symcount
; i
++)
6210 sym_name
= (char *) bfd_asymbol_name (sym
);
6211 intsym
= &((elf_symbol_type
*) sym
)->internal_elf_sym
;
6213 if (sym
->section
!= bfd_abs_section_ptr
6214 || !(flags
& (BSF_GLOBAL
| BSF_WEAK
))
6215 || (flags
& BSF_FUNCTION
) != BSF_FUNCTION
6216 || (ARM_GET_SYM_BRANCH_TYPE (intsym
->st_target_internal
)
6217 != ST_BRANCH_TO_THUMB
))
6219 _bfd_error_handler (_("%pB: invalid import library entry: `%s'; "
6220 "symbol should be absolute, global and "
6221 "refer to Thumb functions"),
6222 in_implib_bfd
, sym_name
);
6227 veneer_value
= bfd_asymbol_value (sym
);
6228 stub_offset
= veneer_value
- cmse_stub_sec_vma
;
6229 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
, sym_name
,
6231 hash
= (struct elf32_arm_link_hash_entry
*)
6232 elf_link_hash_lookup (&(htab
)->root
, sym_name
, FALSE
, FALSE
, TRUE
);
6234 /* Stub entry should have been created by cmse_scan or the symbol be of
6235 a secure function callable from non secure code. */
6236 if (!stub_entry
&& !hash
)
6238 bfd_boolean new_stub
;
6241 (_("entry function `%s' disappeared from secure code"), sym_name
);
6242 hash
= (struct elf32_arm_link_hash_entry
*)
6243 elf_link_hash_lookup (&(htab
)->root
, sym_name
, TRUE
, TRUE
, TRUE
);
6245 = elf32_arm_create_stub (htab
, arm_stub_cmse_branch_thumb_only
,
6246 NULL
, NULL
, bfd_abs_section_ptr
, hash
,
6247 sym_name
, veneer_value
,
6248 ST_BRANCH_TO_THUMB
, &new_stub
);
6249 if (stub_entry
== NULL
)
6253 BFD_ASSERT (new_stub
);
6254 new_cmse_stubs_created
++;
6255 (*cmse_stub_created
)++;
6257 stub_entry
->stub_template_size
= stub_entry
->stub_size
= 0;
6258 stub_entry
->stub_offset
= stub_offset
;
6260 /* Symbol found is not callable from non secure code. */
6261 else if (!stub_entry
)
6263 if (!cmse_entry_fct_p (hash
))
6265 _bfd_error_handler (_("`%s' refers to a non entry function"),
6273 /* Only stubs for SG veneers should have been created. */
6274 BFD_ASSERT (stub_entry
->stub_type
== arm_stub_cmse_branch_thumb_only
);
6276 /* Check visibility hasn't changed. */
6277 if (!!(flags
& BSF_GLOBAL
)
6278 != (hash
->root
.root
.type
== bfd_link_hash_defined
))
6280 (_("%pB: visibility of symbol `%s' has changed"), in_implib_bfd
,
6283 stub_entry
->stub_offset
= stub_offset
;
6286 /* Size should match that of a SG veneer. */
6287 if (intsym
->st_size
!= cmse_stub_size
)
6289 _bfd_error_handler (_("%pB: incorrect size for symbol `%s'"),
6290 in_implib_bfd
, sym_name
);
6294 /* Previous veneer address is before current SG veneer section. */
6295 if (veneer_value
< cmse_stub_sec_vma
)
6297 /* Avoid offset underflow. */
6299 stub_entry
->stub_offset
= 0;
6304 /* Complain if stub offset not a multiple of stub size. */
6305 if (stub_offset
% cmse_stub_size
)
6308 (_("offset of veneer for entry function `%s' not a multiple of "
6309 "its size"), sym_name
);
6316 new_cmse_stubs_created
--;
6317 if (veneer_value
< cmse_stub_array_start
)
6318 cmse_stub_array_start
= veneer_value
;
6319 next_cmse_stub_offset
= stub_offset
+ ((cmse_stub_size
+ 7) & ~7);
6320 if (next_cmse_stub_offset
> htab
->new_cmse_stub_offset
)
6321 htab
->new_cmse_stub_offset
= next_cmse_stub_offset
;
6324 if (!info
->out_implib_bfd
&& new_cmse_stubs_created
!= 0)
6326 BFD_ASSERT (new_cmse_stubs_created
> 0);
6328 (_("new entry function(s) introduced but no output import library "
6330 bfd_hash_traverse (&htab
->stub_hash_table
, arm_list_new_cmse_stub
, info
);
6333 if (cmse_stub_array_start
!= cmse_stub_sec_vma
)
6336 (_("start address of `%s' is different from previous link"),
6346 /* Determine and set the size of the stub section for a final link.
6348 The basic idea here is to examine all the relocations looking for
6349 PC-relative calls to a target that is unreachable with a "bl"
6353 elf32_arm_size_stubs (bfd
*output_bfd
,
6355 struct bfd_link_info
*info
,
6356 bfd_signed_vma group_size
,
6357 asection
* (*add_stub_section
) (const char *, asection
*,
6360 void (*layout_sections_again
) (void))
6362 bfd_boolean ret
= TRUE
;
6363 obj_attribute
*out_attr
;
6364 int cmse_stub_created
= 0;
6365 bfd_size_type stub_group_size
;
6366 bfd_boolean m_profile
, stubs_always_after_branch
, first_veneer_scan
= TRUE
;
6367 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
6368 struct a8_erratum_fix
*a8_fixes
= NULL
;
6369 unsigned int num_a8_fixes
= 0, a8_fix_table_size
= 10;
6370 struct a8_erratum_reloc
*a8_relocs
= NULL
;
6371 unsigned int num_a8_relocs
= 0, a8_reloc_table_size
= 10, i
;
6376 if (htab
->fix_cortex_a8
)
6378 a8_fixes
= (struct a8_erratum_fix
*)
6379 bfd_zmalloc (sizeof (struct a8_erratum_fix
) * a8_fix_table_size
);
6380 a8_relocs
= (struct a8_erratum_reloc
*)
6381 bfd_zmalloc (sizeof (struct a8_erratum_reloc
) * a8_reloc_table_size
);
6384 /* Propagate mach to stub bfd, because it may not have been
6385 finalized when we created stub_bfd. */
6386 bfd_set_arch_mach (stub_bfd
, bfd_get_arch (output_bfd
),
6387 bfd_get_mach (output_bfd
));
6389 /* Stash our params away. */
6390 htab
->stub_bfd
= stub_bfd
;
6391 htab
->add_stub_section
= add_stub_section
;
6392 htab
->layout_sections_again
= layout_sections_again
;
6393 stubs_always_after_branch
= group_size
< 0;
6395 out_attr
= elf_known_obj_attributes_proc (output_bfd
);
6396 m_profile
= out_attr
[Tag_CPU_arch_profile
].i
== 'M';
6398 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
6399 as the first half of a 32-bit branch straddling two 4K pages. This is a
6400 crude way of enforcing that. */
6401 if (htab
->fix_cortex_a8
)
6402 stubs_always_after_branch
= 1;
6405 stub_group_size
= -group_size
;
6407 stub_group_size
= group_size
;
6409 if (stub_group_size
== 1)
6411 /* Default values. */
6412 /* Thumb branch range is +-4MB has to be used as the default
6413 maximum size (a given section can contain both ARM and Thumb
6414 code, so the worst case has to be taken into account).
6416 This value is 24K less than that, which allows for 2025
6417 12-byte stubs. If we exceed that, then we will fail to link.
6418 The user will have to relink with an explicit group size
6420 stub_group_size
= 4170000;
6423 group_sections (htab
, stub_group_size
, stubs_always_after_branch
);
6425 /* If we're applying the cortex A8 fix, we need to determine the
6426 program header size now, because we cannot change it later --
6427 that could alter section placements. Notice the A8 erratum fix
6428 ends up requiring the section addresses to remain unchanged
6429 modulo the page size. That's something we cannot represent
6430 inside BFD, and we don't want to force the section alignment to
6431 be the page size. */
6432 if (htab
->fix_cortex_a8
)
6433 (*htab
->layout_sections_again
) ();
6438 unsigned int bfd_indx
;
6440 enum elf32_arm_stub_type stub_type
;
6441 bfd_boolean stub_changed
= FALSE
;
6442 unsigned prev_num_a8_fixes
= num_a8_fixes
;
6445 for (input_bfd
= info
->input_bfds
, bfd_indx
= 0;
6447 input_bfd
= input_bfd
->link
.next
, bfd_indx
++)
6449 Elf_Internal_Shdr
*symtab_hdr
;
6451 Elf_Internal_Sym
*local_syms
= NULL
;
6453 if (!is_arm_elf (input_bfd
)
6454 || (elf_dyn_lib_class (input_bfd
) & DYN_AS_NEEDED
) != 0)
6459 /* We'll need the symbol table in a second. */
6460 symtab_hdr
= &elf_tdata (input_bfd
)->symtab_hdr
;
6461 if (symtab_hdr
->sh_info
== 0)
6464 /* Limit scan of symbols to object file whose profile is
6465 Microcontroller to not hinder performance in the general case. */
6466 if (m_profile
&& first_veneer_scan
)
6468 struct elf_link_hash_entry
**sym_hashes
;
6470 sym_hashes
= elf_sym_hashes (input_bfd
);
6471 if (!cmse_scan (input_bfd
, htab
, out_attr
, sym_hashes
,
6472 &cmse_stub_created
))
6473 goto error_ret_free_local
;
6475 if (cmse_stub_created
!= 0)
6476 stub_changed
= TRUE
;
6479 /* Walk over each section attached to the input bfd. */
6480 for (section
= input_bfd
->sections
;
6482 section
= section
->next
)
6484 Elf_Internal_Rela
*internal_relocs
, *irelaend
, *irela
;
6486 /* If there aren't any relocs, then there's nothing more
6488 if ((section
->flags
& SEC_RELOC
) == 0
6489 || section
->reloc_count
== 0
6490 || (section
->flags
& SEC_CODE
) == 0)
6493 /* If this section is a link-once section that will be
6494 discarded, then don't create any stubs. */
6495 if (section
->output_section
== NULL
6496 || section
->output_section
->owner
!= output_bfd
)
6499 /* Get the relocs. */
6501 = _bfd_elf_link_read_relocs (input_bfd
, section
, NULL
,
6502 NULL
, info
->keep_memory
);
6503 if (internal_relocs
== NULL
)
6504 goto error_ret_free_local
;
6506 /* Now examine each relocation. */
6507 irela
= internal_relocs
;
6508 irelaend
= irela
+ section
->reloc_count
;
6509 for (; irela
< irelaend
; irela
++)
6511 unsigned int r_type
, r_indx
;
6514 bfd_vma destination
;
6515 struct elf32_arm_link_hash_entry
*hash
;
6516 const char *sym_name
;
6517 unsigned char st_type
;
6518 enum arm_st_branch_type branch_type
;
6519 bfd_boolean created_stub
= FALSE
;
6521 r_type
= ELF32_R_TYPE (irela
->r_info
);
6522 r_indx
= ELF32_R_SYM (irela
->r_info
);
6524 if (r_type
>= (unsigned int) R_ARM_max
)
6526 bfd_set_error (bfd_error_bad_value
);
6527 error_ret_free_internal
:
6528 if (elf_section_data (section
)->relocs
== NULL
)
6529 free (internal_relocs
);
6531 error_ret_free_local
:
6532 if (local_syms
!= NULL
6533 && (symtab_hdr
->contents
6534 != (unsigned char *) local_syms
))
6540 if (r_indx
>= symtab_hdr
->sh_info
)
6541 hash
= elf32_arm_hash_entry
6542 (elf_sym_hashes (input_bfd
)
6543 [r_indx
- symtab_hdr
->sh_info
]);
6545 /* Only look for stubs on branch instructions, or
6546 non-relaxed TLSCALL */
6547 if ((r_type
!= (unsigned int) R_ARM_CALL
)
6548 && (r_type
!= (unsigned int) R_ARM_THM_CALL
)
6549 && (r_type
!= (unsigned int) R_ARM_JUMP24
)
6550 && (r_type
!= (unsigned int) R_ARM_THM_JUMP19
)
6551 && (r_type
!= (unsigned int) R_ARM_THM_XPC22
)
6552 && (r_type
!= (unsigned int) R_ARM_THM_JUMP24
)
6553 && (r_type
!= (unsigned int) R_ARM_PLT32
)
6554 && !((r_type
== (unsigned int) R_ARM_TLS_CALL
6555 || r_type
== (unsigned int) R_ARM_THM_TLS_CALL
)
6556 && r_type
== elf32_arm_tls_transition
6557 (info
, r_type
, &hash
->root
)
6558 && ((hash
? hash
->tls_type
6559 : (elf32_arm_local_got_tls_type
6560 (input_bfd
)[r_indx
]))
6561 & GOT_TLS_GDESC
) != 0))
6564 /* Now determine the call target, its name, value,
6571 if (r_type
== (unsigned int) R_ARM_TLS_CALL
6572 || r_type
== (unsigned int) R_ARM_THM_TLS_CALL
)
6574 /* A non-relaxed TLS call. The target is the
6575 plt-resident trampoline and nothing to do
6577 BFD_ASSERT (htab
->tls_trampoline
> 0);
6578 sym_sec
= htab
->root
.splt
;
6579 sym_value
= htab
->tls_trampoline
;
6582 branch_type
= ST_BRANCH_TO_ARM
;
6586 /* It's a local symbol. */
6587 Elf_Internal_Sym
*sym
;
6589 if (local_syms
== NULL
)
6592 = (Elf_Internal_Sym
*) symtab_hdr
->contents
;
6593 if (local_syms
== NULL
)
6595 = bfd_elf_get_elf_syms (input_bfd
, symtab_hdr
,
6596 symtab_hdr
->sh_info
, 0,
6598 if (local_syms
== NULL
)
6599 goto error_ret_free_internal
;
6602 sym
= local_syms
+ r_indx
;
6603 if (sym
->st_shndx
== SHN_UNDEF
)
6604 sym_sec
= bfd_und_section_ptr
;
6605 else if (sym
->st_shndx
== SHN_ABS
)
6606 sym_sec
= bfd_abs_section_ptr
;
6607 else if (sym
->st_shndx
== SHN_COMMON
)
6608 sym_sec
= bfd_com_section_ptr
;
6611 bfd_section_from_elf_index (input_bfd
, sym
->st_shndx
);
6614 /* This is an undefined symbol. It can never
6618 if (ELF_ST_TYPE (sym
->st_info
) != STT_SECTION
)
6619 sym_value
= sym
->st_value
;
6620 destination
= (sym_value
+ irela
->r_addend
6621 + sym_sec
->output_offset
6622 + sym_sec
->output_section
->vma
);
6623 st_type
= ELF_ST_TYPE (sym
->st_info
);
6625 ARM_GET_SYM_BRANCH_TYPE (sym
->st_target_internal
);
6627 = bfd_elf_string_from_elf_section (input_bfd
,
6628 symtab_hdr
->sh_link
,
6633 /* It's an external symbol. */
6634 while (hash
->root
.root
.type
== bfd_link_hash_indirect
6635 || hash
->root
.root
.type
== bfd_link_hash_warning
)
6636 hash
= ((struct elf32_arm_link_hash_entry
*)
6637 hash
->root
.root
.u
.i
.link
);
6639 if (hash
->root
.root
.type
== bfd_link_hash_defined
6640 || hash
->root
.root
.type
== bfd_link_hash_defweak
)
6642 sym_sec
= hash
->root
.root
.u
.def
.section
;
6643 sym_value
= hash
->root
.root
.u
.def
.value
;
6645 struct elf32_arm_link_hash_table
*globals
=
6646 elf32_arm_hash_table (info
);
6648 /* For a destination in a shared library,
6649 use the PLT stub as target address to
6650 decide whether a branch stub is
6653 && globals
->root
.splt
!= NULL
6655 && hash
->root
.plt
.offset
!= (bfd_vma
) -1)
6657 sym_sec
= globals
->root
.splt
;
6658 sym_value
= hash
->root
.plt
.offset
;
6659 if (sym_sec
->output_section
!= NULL
)
6660 destination
= (sym_value
6661 + sym_sec
->output_offset
6662 + sym_sec
->output_section
->vma
);
6664 else if (sym_sec
->output_section
!= NULL
)
6665 destination
= (sym_value
+ irela
->r_addend
6666 + sym_sec
->output_offset
6667 + sym_sec
->output_section
->vma
);
6669 else if ((hash
->root
.root
.type
== bfd_link_hash_undefined
)
6670 || (hash
->root
.root
.type
== bfd_link_hash_undefweak
))
6672 /* For a shared library, use the PLT stub as
6673 target address to decide whether a long
6674 branch stub is needed.
6675 For absolute code, they cannot be handled. */
6676 struct elf32_arm_link_hash_table
*globals
=
6677 elf32_arm_hash_table (info
);
6680 && globals
->root
.splt
!= NULL
6682 && hash
->root
.plt
.offset
!= (bfd_vma
) -1)
6684 sym_sec
= globals
->root
.splt
;
6685 sym_value
= hash
->root
.plt
.offset
;
6686 if (sym_sec
->output_section
!= NULL
)
6687 destination
= (sym_value
6688 + sym_sec
->output_offset
6689 + sym_sec
->output_section
->vma
);
6696 bfd_set_error (bfd_error_bad_value
);
6697 goto error_ret_free_internal
;
6699 st_type
= hash
->root
.type
;
6701 ARM_GET_SYM_BRANCH_TYPE (hash
->root
.target_internal
);
6702 sym_name
= hash
->root
.root
.root
.string
;
6707 bfd_boolean new_stub
;
6708 struct elf32_arm_stub_hash_entry
*stub_entry
;
6710 /* Determine what (if any) linker stub is needed. */
6711 stub_type
= arm_type_of_stub (info
, section
, irela
,
6712 st_type
, &branch_type
,
6713 hash
, destination
, sym_sec
,
6714 input_bfd
, sym_name
);
6715 if (stub_type
== arm_stub_none
)
6718 /* We've either created a stub for this reloc already,
6719 or we are about to. */
6721 elf32_arm_create_stub (htab
, stub_type
, section
, irela
,
6723 (char *) sym_name
, sym_value
,
6724 branch_type
, &new_stub
);
6726 created_stub
= stub_entry
!= NULL
;
6728 goto error_ret_free_internal
;
6732 stub_changed
= TRUE
;
6736 /* Look for relocations which might trigger Cortex-A8
6738 if (htab
->fix_cortex_a8
6739 && (r_type
== (unsigned int) R_ARM_THM_JUMP24
6740 || r_type
== (unsigned int) R_ARM_THM_JUMP19
6741 || r_type
== (unsigned int) R_ARM_THM_CALL
6742 || r_type
== (unsigned int) R_ARM_THM_XPC22
))
6744 bfd_vma from
= section
->output_section
->vma
6745 + section
->output_offset
6748 if ((from
& 0xfff) == 0xffe)
6750 /* Found a candidate. Note we haven't checked the
6751 destination is within 4K here: if we do so (and
6752 don't create an entry in a8_relocs) we can't tell
6753 that a branch should have been relocated when
6755 if (num_a8_relocs
== a8_reloc_table_size
)
6757 a8_reloc_table_size
*= 2;
6758 a8_relocs
= (struct a8_erratum_reloc
*)
6759 bfd_realloc (a8_relocs
,
6760 sizeof (struct a8_erratum_reloc
)
6761 * a8_reloc_table_size
);
6764 a8_relocs
[num_a8_relocs
].from
= from
;
6765 a8_relocs
[num_a8_relocs
].destination
= destination
;
6766 a8_relocs
[num_a8_relocs
].r_type
= r_type
;
6767 a8_relocs
[num_a8_relocs
].branch_type
= branch_type
;
6768 a8_relocs
[num_a8_relocs
].sym_name
= sym_name
;
6769 a8_relocs
[num_a8_relocs
].non_a8_stub
= created_stub
;
6770 a8_relocs
[num_a8_relocs
].hash
= hash
;
6777 /* We're done with the internal relocs, free them. */
6778 if (elf_section_data (section
)->relocs
== NULL
)
6779 free (internal_relocs
);
6782 if (htab
->fix_cortex_a8
)
6784 /* Sort relocs which might apply to Cortex-A8 erratum. */
6785 qsort (a8_relocs
, num_a8_relocs
,
6786 sizeof (struct a8_erratum_reloc
),
6789 /* Scan for branches which might trigger Cortex-A8 erratum. */
6790 if (cortex_a8_erratum_scan (input_bfd
, info
, &a8_fixes
,
6791 &num_a8_fixes
, &a8_fix_table_size
,
6792 a8_relocs
, num_a8_relocs
,
6793 prev_num_a8_fixes
, &stub_changed
)
6795 goto error_ret_free_local
;
6798 if (local_syms
!= NULL
6799 && symtab_hdr
->contents
!= (unsigned char *) local_syms
)
6801 if (!info
->keep_memory
)
6804 symtab_hdr
->contents
= (unsigned char *) local_syms
;
6808 if (first_veneer_scan
6809 && !set_cmse_veneer_addr_from_implib (info
, htab
,
6810 &cmse_stub_created
))
6813 if (prev_num_a8_fixes
!= num_a8_fixes
)
6814 stub_changed
= TRUE
;
6819 /* OK, we've added some stubs. Find out the new size of the
6821 for (stub_sec
= htab
->stub_bfd
->sections
;
6823 stub_sec
= stub_sec
->next
)
6825 /* Ignore non-stub sections. */
6826 if (!strstr (stub_sec
->name
, STUB_SUFFIX
))
6832 /* Add new SG veneers after those already in the input import
6834 for (stub_type
= arm_stub_none
+ 1; stub_type
< max_stub_type
;
6837 bfd_vma
*start_offset_p
;
6838 asection
**stub_sec_p
;
6840 start_offset_p
= arm_new_stubs_start_offset_ptr (htab
, stub_type
);
6841 stub_sec_p
= arm_dedicated_stub_input_section_ptr (htab
, stub_type
);
6842 if (start_offset_p
== NULL
)
6845 BFD_ASSERT (stub_sec_p
!= NULL
);
6846 if (*stub_sec_p
!= NULL
)
6847 (*stub_sec_p
)->size
= *start_offset_p
;
6850 /* Compute stub section size, considering padding. */
6851 bfd_hash_traverse (&htab
->stub_hash_table
, arm_size_one_stub
, htab
);
6852 for (stub_type
= arm_stub_none
+ 1; stub_type
< max_stub_type
;
6856 asection
**stub_sec_p
;
6858 padding
= arm_dedicated_stub_section_padding (stub_type
);
6859 stub_sec_p
= arm_dedicated_stub_input_section_ptr (htab
, stub_type
);
6860 /* Skip if no stub input section or no stub section padding
6862 if ((stub_sec_p
!= NULL
&& *stub_sec_p
== NULL
) || padding
== 0)
6864 /* Stub section padding required but no dedicated section. */
6865 BFD_ASSERT (stub_sec_p
);
6867 size
= (*stub_sec_p
)->size
;
6868 size
= (size
+ padding
- 1) & ~(padding
- 1);
6869 (*stub_sec_p
)->size
= size
;
6872 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
6873 if (htab
->fix_cortex_a8
)
6874 for (i
= 0; i
< num_a8_fixes
; i
++)
6876 stub_sec
= elf32_arm_create_or_find_stub_sec (NULL
,
6877 a8_fixes
[i
].section
, htab
, a8_fixes
[i
].stub_type
);
6879 if (stub_sec
== NULL
)
6883 += find_stub_size_and_template (a8_fixes
[i
].stub_type
, NULL
,
6888 /* Ask the linker to do its stuff. */
6889 (*htab
->layout_sections_again
) ();
6890 first_veneer_scan
= FALSE
;
6893 /* Add stubs for Cortex-A8 erratum fixes now. */
6894 if (htab
->fix_cortex_a8
)
6896 for (i
= 0; i
< num_a8_fixes
; i
++)
6898 struct elf32_arm_stub_hash_entry
*stub_entry
;
6899 char *stub_name
= a8_fixes
[i
].stub_name
;
6900 asection
*section
= a8_fixes
[i
].section
;
6901 unsigned int section_id
= a8_fixes
[i
].section
->id
;
6902 asection
*link_sec
= htab
->stub_group
[section_id
].link_sec
;
6903 asection
*stub_sec
= htab
->stub_group
[section_id
].stub_sec
;
6904 const insn_sequence
*template_sequence
;
6905 int template_size
, size
= 0;
6907 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
, stub_name
,
6909 if (stub_entry
== NULL
)
6911 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
6912 section
->owner
, stub_name
);
6916 stub_entry
->stub_sec
= stub_sec
;
6917 stub_entry
->stub_offset
= (bfd_vma
) -1;
6918 stub_entry
->id_sec
= link_sec
;
6919 stub_entry
->stub_type
= a8_fixes
[i
].stub_type
;
6920 stub_entry
->source_value
= a8_fixes
[i
].offset
;
6921 stub_entry
->target_section
= a8_fixes
[i
].section
;
6922 stub_entry
->target_value
= a8_fixes
[i
].target_offset
;
6923 stub_entry
->orig_insn
= a8_fixes
[i
].orig_insn
;
6924 stub_entry
->branch_type
= a8_fixes
[i
].branch_type
;
6926 size
= find_stub_size_and_template (a8_fixes
[i
].stub_type
,
6930 stub_entry
->stub_size
= size
;
6931 stub_entry
->stub_template
= template_sequence
;
6932 stub_entry
->stub_template_size
= template_size
;
6935 /* Stash the Cortex-A8 erratum fix array for use later in
6936 elf32_arm_write_section(). */
6937 htab
->a8_erratum_fixes
= a8_fixes
;
6938 htab
->num_a8_erratum_fixes
= num_a8_fixes
;
6942 htab
->a8_erratum_fixes
= NULL
;
6943 htab
->num_a8_erratum_fixes
= 0;
6948 /* Build all the stubs associated with the current output file. The
6949 stubs are kept in a hash table attached to the main linker hash
6950 table. We also set up the .plt entries for statically linked PIC
6951 functions here. This function is called via arm_elf_finish in the
6955 elf32_arm_build_stubs (struct bfd_link_info
*info
)
6958 struct bfd_hash_table
*table
;
6959 enum elf32_arm_stub_type stub_type
;
6960 struct elf32_arm_link_hash_table
*htab
;
6962 htab
= elf32_arm_hash_table (info
);
6966 for (stub_sec
= htab
->stub_bfd
->sections
;
6968 stub_sec
= stub_sec
->next
)
6972 /* Ignore non-stub sections. */
6973 if (!strstr (stub_sec
->name
, STUB_SUFFIX
))
6976 /* Allocate memory to hold the linker stubs. Zeroing the stub sections
6977 must at least be done for stub section requiring padding and for SG
6978 veneers to ensure that a non secure code branching to a removed SG
6979 veneer causes an error. */
6980 size
= stub_sec
->size
;
6981 stub_sec
->contents
= (unsigned char *) bfd_zalloc (htab
->stub_bfd
, size
);
6982 if (stub_sec
->contents
== NULL
&& size
!= 0)
6988 /* Add new SG veneers after those already in the input import library. */
6989 for (stub_type
= arm_stub_none
+ 1; stub_type
< max_stub_type
; stub_type
++)
6991 bfd_vma
*start_offset_p
;
6992 asection
**stub_sec_p
;
6994 start_offset_p
= arm_new_stubs_start_offset_ptr (htab
, stub_type
);
6995 stub_sec_p
= arm_dedicated_stub_input_section_ptr (htab
, stub_type
);
6996 if (start_offset_p
== NULL
)
6999 BFD_ASSERT (stub_sec_p
!= NULL
);
7000 if (*stub_sec_p
!= NULL
)
7001 (*stub_sec_p
)->size
= *start_offset_p
;
7004 /* Build the stubs as directed by the stub hash table. */
7005 table
= &htab
->stub_hash_table
;
7006 bfd_hash_traverse (table
, arm_build_one_stub
, info
);
7007 if (htab
->fix_cortex_a8
)
7009 /* Place the cortex a8 stubs last. */
7010 htab
->fix_cortex_a8
= -1;
7011 bfd_hash_traverse (table
, arm_build_one_stub
, info
);
7017 /* Locate the Thumb encoded calling stub for NAME. */
7019 static struct elf_link_hash_entry
*
7020 find_thumb_glue (struct bfd_link_info
*link_info
,
7022 char **error_message
)
7025 struct elf_link_hash_entry
*hash
;
7026 struct elf32_arm_link_hash_table
*hash_table
;
7028 /* We need a pointer to the armelf specific hash table. */
7029 hash_table
= elf32_arm_hash_table (link_info
);
7030 if (hash_table
== NULL
)
7033 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen (name
)
7034 + strlen (THUMB2ARM_GLUE_ENTRY_NAME
) + 1);
7036 BFD_ASSERT (tmp_name
);
7038 sprintf (tmp_name
, THUMB2ARM_GLUE_ENTRY_NAME
, name
);
7040 hash
= elf_link_hash_lookup
7041 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
7044 && asprintf (error_message
, _("unable to find %s glue '%s' for '%s'"),
7045 "Thumb", tmp_name
, name
) == -1)
7046 *error_message
= (char *) bfd_errmsg (bfd_error_system_call
);
7053 /* Locate the ARM encoded calling stub for NAME. */
7055 static struct elf_link_hash_entry
*
7056 find_arm_glue (struct bfd_link_info
*link_info
,
7058 char **error_message
)
7061 struct elf_link_hash_entry
*myh
;
7062 struct elf32_arm_link_hash_table
*hash_table
;
7064 /* We need a pointer to the elfarm specific hash table. */
7065 hash_table
= elf32_arm_hash_table (link_info
);
7066 if (hash_table
== NULL
)
7069 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen (name
)
7070 + strlen (ARM2THUMB_GLUE_ENTRY_NAME
) + 1);
7072 BFD_ASSERT (tmp_name
);
7074 sprintf (tmp_name
, ARM2THUMB_GLUE_ENTRY_NAME
, name
);
7076 myh
= elf_link_hash_lookup
7077 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
7080 && asprintf (error_message
, _("unable to find %s glue '%s' for '%s'"),
7081 "ARM", tmp_name
, name
) == -1)
7082 *error_message
= (char *) bfd_errmsg (bfd_error_system_call
);
7089 /* ARM->Thumb glue (static images):
7093 ldr r12, __func_addr
7096 .word func @ behave as if you saw a ARM_32 reloc.
7103 .word func @ behave as if you saw a ARM_32 reloc.
7105 (relocatable images)
7108 ldr r12, __func_offset
7114 #define ARM2THUMB_STATIC_GLUE_SIZE 12
7115 static const insn32 a2t1_ldr_insn
= 0xe59fc000;
7116 static const insn32 a2t2_bx_r12_insn
= 0xe12fff1c;
7117 static const insn32 a2t3_func_addr_insn
= 0x00000001;
7119 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
7120 static const insn32 a2t1v5_ldr_insn
= 0xe51ff004;
7121 static const insn32 a2t2v5_func_addr_insn
= 0x00000001;
7123 #define ARM2THUMB_PIC_GLUE_SIZE 16
7124 static const insn32 a2t1p_ldr_insn
= 0xe59fc004;
7125 static const insn32 a2t2p_add_pc_insn
= 0xe08cc00f;
7126 static const insn32 a2t3p_bx_r12_insn
= 0xe12fff1c;
7128 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
7132 __func_from_thumb: __func_from_thumb:
7134 nop ldr r6, __func_addr
7144 #define THUMB2ARM_GLUE_SIZE 8
7145 static const insn16 t2a1_bx_pc_insn
= 0x4778;
7146 static const insn16 t2a2_noop_insn
= 0x46c0;
7147 static const insn32 t2a3_b_insn
= 0xea000000;
7149 #define VFP11_ERRATUM_VENEER_SIZE 8
7150 #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16
7151 #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24
7153 #define ARM_BX_VENEER_SIZE 12
7154 static const insn32 armbx1_tst_insn
= 0xe3100001;
7155 static const insn32 armbx2_moveq_insn
= 0x01a0f000;
7156 static const insn32 armbx3_bx_insn
= 0xe12fff10;
7158 #ifndef ELFARM_NABI_C_INCLUDED
7160 arm_allocate_glue_section_space (bfd
* abfd
, bfd_size_type size
, const char * name
)
7163 bfd_byte
* contents
;
7167 /* Do not include empty glue sections in the output. */
7170 s
= bfd_get_linker_section (abfd
, name
);
7172 s
->flags
|= SEC_EXCLUDE
;
7177 BFD_ASSERT (abfd
!= NULL
);
7179 s
= bfd_get_linker_section (abfd
, name
);
7180 BFD_ASSERT (s
!= NULL
);
7182 contents
= (bfd_byte
*) bfd_alloc (abfd
, size
);
7184 BFD_ASSERT (s
->size
== size
);
7185 s
->contents
= contents
;
7189 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info
* info
)
7191 struct elf32_arm_link_hash_table
* globals
;
7193 globals
= elf32_arm_hash_table (info
);
7194 BFD_ASSERT (globals
!= NULL
);
7196 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
7197 globals
->arm_glue_size
,
7198 ARM2THUMB_GLUE_SECTION_NAME
);
7200 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
7201 globals
->thumb_glue_size
,
7202 THUMB2ARM_GLUE_SECTION_NAME
);
7204 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
7205 globals
->vfp11_erratum_glue_size
,
7206 VFP11_ERRATUM_VENEER_SECTION_NAME
);
7208 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
7209 globals
->stm32l4xx_erratum_glue_size
,
7210 STM32L4XX_ERRATUM_VENEER_SECTION_NAME
);
7212 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
7213 globals
->bx_glue_size
,
7214 ARM_BX_GLUE_SECTION_NAME
);
7219 /* Allocate space and symbols for calling a Thumb function from Arm mode.
7220 returns the symbol identifying the stub. */
7222 static struct elf_link_hash_entry
*
7223 record_arm_to_thumb_glue (struct bfd_link_info
* link_info
,
7224 struct elf_link_hash_entry
* h
)
7226 const char * name
= h
->root
.root
.string
;
7229 struct elf_link_hash_entry
* myh
;
7230 struct bfd_link_hash_entry
* bh
;
7231 struct elf32_arm_link_hash_table
* globals
;
7235 globals
= elf32_arm_hash_table (link_info
);
7236 BFD_ASSERT (globals
!= NULL
);
7237 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
7239 s
= bfd_get_linker_section
7240 (globals
->bfd_of_glue_owner
, ARM2THUMB_GLUE_SECTION_NAME
);
7242 BFD_ASSERT (s
!= NULL
);
7244 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen (name
)
7245 + strlen (ARM2THUMB_GLUE_ENTRY_NAME
) + 1);
7247 BFD_ASSERT (tmp_name
);
7249 sprintf (tmp_name
, ARM2THUMB_GLUE_ENTRY_NAME
, name
);
7251 myh
= elf_link_hash_lookup
7252 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
7256 /* We've already seen this guy. */
7261 /* The only trick here is using hash_table->arm_glue_size as the value.
7262 Even though the section isn't allocated yet, this is where we will be
7263 putting it. The +1 on the value marks that the stub has not been
7264 output yet - not that it is a Thumb function. */
7266 val
= globals
->arm_glue_size
+ 1;
7267 _bfd_generic_link_add_one_symbol (link_info
, globals
->bfd_of_glue_owner
,
7268 tmp_name
, BSF_GLOBAL
, s
, val
,
7269 NULL
, TRUE
, FALSE
, &bh
);
7271 myh
= (struct elf_link_hash_entry
*) bh
;
7272 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
7273 myh
->forced_local
= 1;
7277 if (bfd_link_pic (link_info
)
7278 || globals
->root
.is_relocatable_executable
7279 || globals
->pic_veneer
)
7280 size
= ARM2THUMB_PIC_GLUE_SIZE
;
7281 else if (globals
->use_blx
)
7282 size
= ARM2THUMB_V5_STATIC_GLUE_SIZE
;
7284 size
= ARM2THUMB_STATIC_GLUE_SIZE
;
7287 globals
->arm_glue_size
+= size
;
7292 /* Allocate space for ARMv4 BX veneers. */
7295 record_arm_bx_glue (struct bfd_link_info
* link_info
, int reg
)
7298 struct elf32_arm_link_hash_table
*globals
;
7300 struct elf_link_hash_entry
*myh
;
7301 struct bfd_link_hash_entry
*bh
;
7304 /* BX PC does not need a veneer. */
7308 globals
= elf32_arm_hash_table (link_info
);
7309 BFD_ASSERT (globals
!= NULL
);
7310 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
7312 /* Check if this veneer has already been allocated. */
7313 if (globals
->bx_glue_offset
[reg
])
7316 s
= bfd_get_linker_section
7317 (globals
->bfd_of_glue_owner
, ARM_BX_GLUE_SECTION_NAME
);
7319 BFD_ASSERT (s
!= NULL
);
7321 /* Add symbol for veneer. */
7323 bfd_malloc ((bfd_size_type
) strlen (ARM_BX_GLUE_ENTRY_NAME
) + 1);
7325 BFD_ASSERT (tmp_name
);
7327 sprintf (tmp_name
, ARM_BX_GLUE_ENTRY_NAME
, reg
);
7329 myh
= elf_link_hash_lookup
7330 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
7332 BFD_ASSERT (myh
== NULL
);
7335 val
= globals
->bx_glue_size
;
7336 _bfd_generic_link_add_one_symbol (link_info
, globals
->bfd_of_glue_owner
,
7337 tmp_name
, BSF_FUNCTION
| BSF_LOCAL
, s
, val
,
7338 NULL
, TRUE
, FALSE
, &bh
);
7340 myh
= (struct elf_link_hash_entry
*) bh
;
7341 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
7342 myh
->forced_local
= 1;
7344 s
->size
+= ARM_BX_VENEER_SIZE
;
7345 globals
->bx_glue_offset
[reg
] = globals
->bx_glue_size
| 2;
7346 globals
->bx_glue_size
+= ARM_BX_VENEER_SIZE
;
7350 /* Add an entry to the code/data map for section SEC. */
7353 elf32_arm_section_map_add (asection
*sec
, char type
, bfd_vma vma
)
7355 struct _arm_elf_section_data
*sec_data
= elf32_arm_section_data (sec
);
7356 unsigned int newidx
;
7358 if (sec_data
->map
== NULL
)
7360 sec_data
->map
= (elf32_arm_section_map
*)
7361 bfd_malloc (sizeof (elf32_arm_section_map
));
7362 sec_data
->mapcount
= 0;
7363 sec_data
->mapsize
= 1;
7366 newidx
= sec_data
->mapcount
++;
7368 if (sec_data
->mapcount
> sec_data
->mapsize
)
7370 sec_data
->mapsize
*= 2;
7371 sec_data
->map
= (elf32_arm_section_map
*)
7372 bfd_realloc_or_free (sec_data
->map
, sec_data
->mapsize
7373 * sizeof (elf32_arm_section_map
));
7378 sec_data
->map
[newidx
].vma
= vma
;
7379 sec_data
->map
[newidx
].type
= type
;
7384 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
7385 veneers are handled for now. */
7388 record_vfp11_erratum_veneer (struct bfd_link_info
*link_info
,
7389 elf32_vfp11_erratum_list
*branch
,
7391 asection
*branch_sec
,
7392 unsigned int offset
)
7395 struct elf32_arm_link_hash_table
*hash_table
;
7397 struct elf_link_hash_entry
*myh
;
7398 struct bfd_link_hash_entry
*bh
;
7400 struct _arm_elf_section_data
*sec_data
;
7401 elf32_vfp11_erratum_list
*newerr
;
7403 hash_table
= elf32_arm_hash_table (link_info
);
7404 BFD_ASSERT (hash_table
!= NULL
);
7405 BFD_ASSERT (hash_table
->bfd_of_glue_owner
!= NULL
);
7407 s
= bfd_get_linker_section
7408 (hash_table
->bfd_of_glue_owner
, VFP11_ERRATUM_VENEER_SECTION_NAME
);
7410 sec_data
= elf32_arm_section_data (s
);
7412 BFD_ASSERT (s
!= NULL
);
7414 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen
7415 (VFP11_ERRATUM_VENEER_ENTRY_NAME
) + 10);
7417 BFD_ASSERT (tmp_name
);
7419 sprintf (tmp_name
, VFP11_ERRATUM_VENEER_ENTRY_NAME
,
7420 hash_table
->num_vfp11_fixes
);
7422 myh
= elf_link_hash_lookup
7423 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
7425 BFD_ASSERT (myh
== NULL
);
7428 val
= hash_table
->vfp11_erratum_glue_size
;
7429 _bfd_generic_link_add_one_symbol (link_info
, hash_table
->bfd_of_glue_owner
,
7430 tmp_name
, BSF_FUNCTION
| BSF_LOCAL
, s
, val
,
7431 NULL
, TRUE
, FALSE
, &bh
);
7433 myh
= (struct elf_link_hash_entry
*) bh
;
7434 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
7435 myh
->forced_local
= 1;
7437 /* Link veneer back to calling location. */
7438 sec_data
->erratumcount
+= 1;
7439 newerr
= (elf32_vfp11_erratum_list
*)
7440 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list
));
7442 newerr
->type
= VFP11_ERRATUM_ARM_VENEER
;
7444 newerr
->u
.v
.branch
= branch
;
7445 newerr
->u
.v
.id
= hash_table
->num_vfp11_fixes
;
7446 branch
->u
.b
.veneer
= newerr
;
7448 newerr
->next
= sec_data
->erratumlist
;
7449 sec_data
->erratumlist
= newerr
;
7451 /* A symbol for the return from the veneer. */
7452 sprintf (tmp_name
, VFP11_ERRATUM_VENEER_ENTRY_NAME
"_r",
7453 hash_table
->num_vfp11_fixes
);
7455 myh
= elf_link_hash_lookup
7456 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
7463 _bfd_generic_link_add_one_symbol (link_info
, branch_bfd
, tmp_name
, BSF_LOCAL
,
7464 branch_sec
, val
, NULL
, TRUE
, FALSE
, &bh
);
7466 myh
= (struct elf_link_hash_entry
*) bh
;
7467 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
7468 myh
->forced_local
= 1;
7472 /* Generate a mapping symbol for the veneer section, and explicitly add an
7473 entry for that symbol to the code/data map for the section. */
7474 if (hash_table
->vfp11_erratum_glue_size
== 0)
7477 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
7478 ever requires this erratum fix. */
7479 _bfd_generic_link_add_one_symbol (link_info
,
7480 hash_table
->bfd_of_glue_owner
, "$a",
7481 BSF_LOCAL
, s
, 0, NULL
,
7484 myh
= (struct elf_link_hash_entry
*) bh
;
7485 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_NOTYPE
);
7486 myh
->forced_local
= 1;
7488 /* The elf32_arm_init_maps function only cares about symbols from input
7489 BFDs. We must make a note of this generated mapping symbol
7490 ourselves so that code byteswapping works properly in
7491 elf32_arm_write_section. */
7492 elf32_arm_section_map_add (s
, 'a', 0);
7495 s
->size
+= VFP11_ERRATUM_VENEER_SIZE
;
7496 hash_table
->vfp11_erratum_glue_size
+= VFP11_ERRATUM_VENEER_SIZE
;
7497 hash_table
->num_vfp11_fixes
++;
7499 /* The offset of the veneer. */
7503 /* Record information about a STM32L4XX STM erratum veneer. Only THUMB-mode
7504 veneers need to be handled because used only in Cortex-M. */
7507 record_stm32l4xx_erratum_veneer (struct bfd_link_info
*link_info
,
7508 elf32_stm32l4xx_erratum_list
*branch
,
7510 asection
*branch_sec
,
7511 unsigned int offset
,
7512 bfd_size_type veneer_size
)
7515 struct elf32_arm_link_hash_table
*hash_table
;
7517 struct elf_link_hash_entry
*myh
;
7518 struct bfd_link_hash_entry
*bh
;
7520 struct _arm_elf_section_data
*sec_data
;
7521 elf32_stm32l4xx_erratum_list
*newerr
;
7523 hash_table
= elf32_arm_hash_table (link_info
);
7524 BFD_ASSERT (hash_table
!= NULL
);
7525 BFD_ASSERT (hash_table
->bfd_of_glue_owner
!= NULL
);
7527 s
= bfd_get_linker_section
7528 (hash_table
->bfd_of_glue_owner
, STM32L4XX_ERRATUM_VENEER_SECTION_NAME
);
7530 BFD_ASSERT (s
!= NULL
);
7532 sec_data
= elf32_arm_section_data (s
);
7534 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen
7535 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
) + 10);
7537 BFD_ASSERT (tmp_name
);
7539 sprintf (tmp_name
, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
,
7540 hash_table
->num_stm32l4xx_fixes
);
7542 myh
= elf_link_hash_lookup
7543 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
7545 BFD_ASSERT (myh
== NULL
);
7548 val
= hash_table
->stm32l4xx_erratum_glue_size
;
7549 _bfd_generic_link_add_one_symbol (link_info
, hash_table
->bfd_of_glue_owner
,
7550 tmp_name
, BSF_FUNCTION
| BSF_LOCAL
, s
, val
,
7551 NULL
, TRUE
, FALSE
, &bh
);
7553 myh
= (struct elf_link_hash_entry
*) bh
;
7554 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
7555 myh
->forced_local
= 1;
7557 /* Link veneer back to calling location. */
7558 sec_data
->stm32l4xx_erratumcount
+= 1;
7559 newerr
= (elf32_stm32l4xx_erratum_list
*)
7560 bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list
));
7562 newerr
->type
= STM32L4XX_ERRATUM_VENEER
;
7564 newerr
->u
.v
.branch
= branch
;
7565 newerr
->u
.v
.id
= hash_table
->num_stm32l4xx_fixes
;
7566 branch
->u
.b
.veneer
= newerr
;
7568 newerr
->next
= sec_data
->stm32l4xx_erratumlist
;
7569 sec_data
->stm32l4xx_erratumlist
= newerr
;
7571 /* A symbol for the return from the veneer. */
7572 sprintf (tmp_name
, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
"_r",
7573 hash_table
->num_stm32l4xx_fixes
);
7575 myh
= elf_link_hash_lookup
7576 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
7583 _bfd_generic_link_add_one_symbol (link_info
, branch_bfd
, tmp_name
, BSF_LOCAL
,
7584 branch_sec
, val
, NULL
, TRUE
, FALSE
, &bh
);
7586 myh
= (struct elf_link_hash_entry
*) bh
;
7587 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
7588 myh
->forced_local
= 1;
7592 /* Generate a mapping symbol for the veneer section, and explicitly add an
7593 entry for that symbol to the code/data map for the section. */
7594 if (hash_table
->stm32l4xx_erratum_glue_size
== 0)
7597 /* Creates a THUMB symbol since there is no other choice. */
7598 _bfd_generic_link_add_one_symbol (link_info
,
7599 hash_table
->bfd_of_glue_owner
, "$t",
7600 BSF_LOCAL
, s
, 0, NULL
,
7603 myh
= (struct elf_link_hash_entry
*) bh
;
7604 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_NOTYPE
);
7605 myh
->forced_local
= 1;
7607 /* The elf32_arm_init_maps function only cares about symbols from input
7608 BFDs. We must make a note of this generated mapping symbol
7609 ourselves so that code byteswapping works properly in
7610 elf32_arm_write_section. */
7611 elf32_arm_section_map_add (s
, 't', 0);
7614 s
->size
+= veneer_size
;
7615 hash_table
->stm32l4xx_erratum_glue_size
+= veneer_size
;
7616 hash_table
->num_stm32l4xx_fixes
++;
7618 /* The offset of the veneer. */
7622 #define ARM_GLUE_SECTION_FLAGS \
7623 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
7624 | SEC_READONLY | SEC_LINKER_CREATED)
7626 /* Create a fake section for use by the ARM backend of the linker. */
7629 arm_make_glue_section (bfd
* abfd
, const char * name
)
7633 sec
= bfd_get_linker_section (abfd
, name
);
7638 sec
= bfd_make_section_anyway_with_flags (abfd
, name
, ARM_GLUE_SECTION_FLAGS
);
7641 || !bfd_set_section_alignment (abfd
, sec
, 2))
7644 /* Set the gc mark to prevent the section from being removed by garbage
7645 collection, despite the fact that no relocs refer to this section. */
7651 /* Set size of .plt entries. This function is called from the
7652 linker scripts in ld/emultempl/{armelf}.em. */
7655 bfd_elf32_arm_use_long_plt (void)
7657 elf32_arm_use_long_plt_entry
= TRUE
;
7660 /* Add the glue sections to ABFD. This function is called from the
7661 linker scripts in ld/emultempl/{armelf}.em. */
7664 bfd_elf32_arm_add_glue_sections_to_bfd (bfd
*abfd
,
7665 struct bfd_link_info
*info
)
7667 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (info
);
7668 bfd_boolean dostm32l4xx
= globals
7669 && globals
->stm32l4xx_fix
!= BFD_ARM_STM32L4XX_FIX_NONE
;
7670 bfd_boolean addglue
;
7672 /* If we are only performing a partial
7673 link do not bother adding the glue. */
7674 if (bfd_link_relocatable (info
))
7677 addglue
= arm_make_glue_section (abfd
, ARM2THUMB_GLUE_SECTION_NAME
)
7678 && arm_make_glue_section (abfd
, THUMB2ARM_GLUE_SECTION_NAME
)
7679 && arm_make_glue_section (abfd
, VFP11_ERRATUM_VENEER_SECTION_NAME
)
7680 && arm_make_glue_section (abfd
, ARM_BX_GLUE_SECTION_NAME
);
7686 && arm_make_glue_section (abfd
, STM32L4XX_ERRATUM_VENEER_SECTION_NAME
);
7689 /* Mark output sections of veneers needing a dedicated one with SEC_KEEP. This
7690 ensures they are not marked for deletion by
7691 strip_excluded_output_sections () when veneers are going to be created
7692 later. Not doing so would trigger assert on empty section size in
7693 lang_size_sections_1 (). */
7696 bfd_elf32_arm_keep_private_stub_output_sections (struct bfd_link_info
*info
)
7698 enum elf32_arm_stub_type stub_type
;
7700 /* If we are only performing a partial
7701 link do not bother adding the glue. */
7702 if (bfd_link_relocatable (info
))
7705 for (stub_type
= arm_stub_none
+ 1; stub_type
< max_stub_type
; stub_type
++)
7708 const char *out_sec_name
;
7710 if (!arm_dedicated_stub_output_section_required (stub_type
))
7713 out_sec_name
= arm_dedicated_stub_output_section_name (stub_type
);
7714 out_sec
= bfd_get_section_by_name (info
->output_bfd
, out_sec_name
);
7715 if (out_sec
!= NULL
)
7716 out_sec
->flags
|= SEC_KEEP
;
7720 /* Select a BFD to be used to hold the sections used by the glue code.
7721 This function is called from the linker scripts in ld/emultempl/
7725 bfd_elf32_arm_get_bfd_for_interworking (bfd
*abfd
, struct bfd_link_info
*info
)
7727 struct elf32_arm_link_hash_table
*globals
;
7729 /* If we are only performing a partial link
7730 do not bother getting a bfd to hold the glue. */
7731 if (bfd_link_relocatable (info
))
7734 /* Make sure we don't attach the glue sections to a dynamic object. */
7735 BFD_ASSERT (!(abfd
->flags
& DYNAMIC
));
7737 globals
= elf32_arm_hash_table (info
);
7738 BFD_ASSERT (globals
!= NULL
);
7740 if (globals
->bfd_of_glue_owner
!= NULL
)
7743 /* Save the bfd for later use. */
7744 globals
->bfd_of_glue_owner
= abfd
;
7750 check_use_blx (struct elf32_arm_link_hash_table
*globals
)
7754 cpu_arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
7757 if (globals
->fix_arm1176
)
7759 if (cpu_arch
== TAG_CPU_ARCH_V6T2
|| cpu_arch
> TAG_CPU_ARCH_V6K
)
7760 globals
->use_blx
= 1;
7764 if (cpu_arch
> TAG_CPU_ARCH_V4T
)
7765 globals
->use_blx
= 1;
7770 bfd_elf32_arm_process_before_allocation (bfd
*abfd
,
7771 struct bfd_link_info
*link_info
)
7773 Elf_Internal_Shdr
*symtab_hdr
;
7774 Elf_Internal_Rela
*internal_relocs
= NULL
;
7775 Elf_Internal_Rela
*irel
, *irelend
;
7776 bfd_byte
*contents
= NULL
;
7779 struct elf32_arm_link_hash_table
*globals
;
7781 /* If we are only performing a partial link do not bother
7782 to construct any glue. */
7783 if (bfd_link_relocatable (link_info
))
7786 /* Here we have a bfd that is to be included on the link. We have a
7787 hook to do reloc rummaging, before section sizes are nailed down. */
7788 globals
= elf32_arm_hash_table (link_info
);
7789 BFD_ASSERT (globals
!= NULL
);
7791 check_use_blx (globals
);
7793 if (globals
->byteswap_code
&& !bfd_big_endian (abfd
))
7795 _bfd_error_handler (_("%pB: BE8 images only valid in big-endian mode"),
7800 /* PR 5398: If we have not decided to include any loadable sections in
7801 the output then we will not have a glue owner bfd. This is OK, it
7802 just means that there is nothing else for us to do here. */
7803 if (globals
->bfd_of_glue_owner
== NULL
)
7806 /* Rummage around all the relocs and map the glue vectors. */
7807 sec
= abfd
->sections
;
7812 for (; sec
!= NULL
; sec
= sec
->next
)
7814 if (sec
->reloc_count
== 0)
7817 if ((sec
->flags
& SEC_EXCLUDE
) != 0)
7820 symtab_hdr
= & elf_symtab_hdr (abfd
);
7822 /* Load the relocs. */
7824 = _bfd_elf_link_read_relocs (abfd
, sec
, NULL
, NULL
, FALSE
);
7826 if (internal_relocs
== NULL
)
7829 irelend
= internal_relocs
+ sec
->reloc_count
;
7830 for (irel
= internal_relocs
; irel
< irelend
; irel
++)
7833 unsigned long r_index
;
7835 struct elf_link_hash_entry
*h
;
7837 r_type
= ELF32_R_TYPE (irel
->r_info
);
7838 r_index
= ELF32_R_SYM (irel
->r_info
);
7840 /* These are the only relocation types we care about. */
7841 if ( r_type
!= R_ARM_PC24
7842 && (r_type
!= R_ARM_V4BX
|| globals
->fix_v4bx
< 2))
7845 /* Get the section contents if we haven't done so already. */
7846 if (contents
== NULL
)
7848 /* Get cached copy if it exists. */
7849 if (elf_section_data (sec
)->this_hdr
.contents
!= NULL
)
7850 contents
= elf_section_data (sec
)->this_hdr
.contents
;
7853 /* Go get them off disk. */
7854 if (! bfd_malloc_and_get_section (abfd
, sec
, &contents
))
7859 if (r_type
== R_ARM_V4BX
)
7863 reg
= bfd_get_32 (abfd
, contents
+ irel
->r_offset
) & 0xf;
7864 record_arm_bx_glue (link_info
, reg
);
7868 /* If the relocation is not against a symbol it cannot concern us. */
7871 /* We don't care about local symbols. */
7872 if (r_index
< symtab_hdr
->sh_info
)
7875 /* This is an external symbol. */
7876 r_index
-= symtab_hdr
->sh_info
;
7877 h
= (struct elf_link_hash_entry
*)
7878 elf_sym_hashes (abfd
)[r_index
];
7880 /* If the relocation is against a static symbol it must be within
7881 the current section and so cannot be a cross ARM/Thumb relocation. */
7885 /* If the call will go through a PLT entry then we do not need
7887 if (globals
->root
.splt
!= NULL
&& h
->plt
.offset
!= (bfd_vma
) -1)
7893 /* This one is a call from arm code. We need to look up
7894 the target of the call. If it is a thumb target, we
7896 if (ARM_GET_SYM_BRANCH_TYPE (h
->target_internal
)
7897 == ST_BRANCH_TO_THUMB
)
7898 record_arm_to_thumb_glue (link_info
, h
);
7906 if (contents
!= NULL
7907 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
7911 if (internal_relocs
!= NULL
7912 && elf_section_data (sec
)->relocs
!= internal_relocs
)
7913 free (internal_relocs
);
7914 internal_relocs
= NULL
;
7920 if (contents
!= NULL
7921 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
7923 if (internal_relocs
!= NULL
7924 && elf_section_data (sec
)->relocs
!= internal_relocs
)
7925 free (internal_relocs
);
7932 /* Initialise maps of ARM/Thumb/data for input BFDs. */
7935 bfd_elf32_arm_init_maps (bfd
*abfd
)
7937 Elf_Internal_Sym
*isymbuf
;
7938 Elf_Internal_Shdr
*hdr
;
7939 unsigned int i
, localsyms
;
7941 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
7942 if (! is_arm_elf (abfd
))
7945 if ((abfd
->flags
& DYNAMIC
) != 0)
7948 hdr
= & elf_symtab_hdr (abfd
);
7949 localsyms
= hdr
->sh_info
;
7951 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
7952 should contain the number of local symbols, which should come before any
7953 global symbols. Mapping symbols are always local. */
7954 isymbuf
= bfd_elf_get_elf_syms (abfd
, hdr
, localsyms
, 0, NULL
, NULL
,
7957 /* No internal symbols read? Skip this BFD. */
7958 if (isymbuf
== NULL
)
7961 for (i
= 0; i
< localsyms
; i
++)
7963 Elf_Internal_Sym
*isym
= &isymbuf
[i
];
7964 asection
*sec
= bfd_section_from_elf_index (abfd
, isym
->st_shndx
);
7968 && ELF_ST_BIND (isym
->st_info
) == STB_LOCAL
)
7970 name
= bfd_elf_string_from_elf_section (abfd
,
7971 hdr
->sh_link
, isym
->st_name
);
7973 if (bfd_is_arm_special_symbol_name (name
,
7974 BFD_ARM_SPECIAL_SYM_TYPE_MAP
))
7975 elf32_arm_section_map_add (sec
, name
[1], isym
->st_value
);
7981 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
7982 say what they wanted. */
7985 bfd_elf32_arm_set_cortex_a8_fix (bfd
*obfd
, struct bfd_link_info
*link_info
)
7987 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
7988 obj_attribute
*out_attr
= elf_known_obj_attributes_proc (obfd
);
7990 if (globals
== NULL
)
7993 if (globals
->fix_cortex_a8
== -1)
7995 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
7996 if (out_attr
[Tag_CPU_arch
].i
== TAG_CPU_ARCH_V7
7997 && (out_attr
[Tag_CPU_arch_profile
].i
== 'A'
7998 || out_attr
[Tag_CPU_arch_profile
].i
== 0))
7999 globals
->fix_cortex_a8
= 1;
8001 globals
->fix_cortex_a8
= 0;
8007 bfd_elf32_arm_set_vfp11_fix (bfd
*obfd
, struct bfd_link_info
*link_info
)
8009 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
8010 obj_attribute
*out_attr
= elf_known_obj_attributes_proc (obfd
);
8012 if (globals
== NULL
)
8014 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
8015 if (out_attr
[Tag_CPU_arch
].i
>= TAG_CPU_ARCH_V7
)
8017 switch (globals
->vfp11_fix
)
8019 case BFD_ARM_VFP11_FIX_DEFAULT
:
8020 case BFD_ARM_VFP11_FIX_NONE
:
8021 globals
->vfp11_fix
= BFD_ARM_VFP11_FIX_NONE
;
8025 /* Give a warning, but do as the user requests anyway. */
8026 _bfd_error_handler (_("%pB: warning: selected VFP11 erratum "
8027 "workaround is not necessary for target architecture"), obfd
);
8030 else if (globals
->vfp11_fix
== BFD_ARM_VFP11_FIX_DEFAULT
)
8031 /* For earlier architectures, we might need the workaround, but do not
8032 enable it by default. If users is running with broken hardware, they
8033 must enable the erratum fix explicitly. */
8034 globals
->vfp11_fix
= BFD_ARM_VFP11_FIX_NONE
;
8038 bfd_elf32_arm_set_stm32l4xx_fix (bfd
*obfd
, struct bfd_link_info
*link_info
)
8040 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
8041 obj_attribute
*out_attr
= elf_known_obj_attributes_proc (obfd
);
8043 if (globals
== NULL
)
8046 /* We assume only Cortex-M4 may require the fix. */
8047 if (out_attr
[Tag_CPU_arch
].i
!= TAG_CPU_ARCH_V7E_M
8048 || out_attr
[Tag_CPU_arch_profile
].i
!= 'M')
8050 if (globals
->stm32l4xx_fix
!= BFD_ARM_STM32L4XX_FIX_NONE
)
8051 /* Give a warning, but do as the user requests anyway. */
8053 (_("%pB: warning: selected STM32L4XX erratum "
8054 "workaround is not necessary for target architecture"), obfd
);
8058 enum bfd_arm_vfp11_pipe
8066 /* Return a VFP register number. This is encoded as RX:X for single-precision
8067 registers, or X:RX for double-precision registers, where RX is the group of
8068 four bits in the instruction encoding and X is the single extension bit.
8069 RX and X fields are specified using their lowest (starting) bit. The return
8072 0...31: single-precision registers s0...s31
8073 32...63: double-precision registers d0...d31.
8075 Although X should be zero for VFP11 (encoding d0...d15 only), we might
8076 encounter VFP3 instructions, so we allow the full range for DP registers. */
8079 bfd_arm_vfp11_regno (unsigned int insn
, bfd_boolean is_double
, unsigned int rx
,
8083 return (((insn
>> rx
) & 0xf) | (((insn
>> x
) & 1) << 4)) + 32;
8085 return (((insn
>> rx
) & 0xf) << 1) | ((insn
>> x
) & 1);
8088 /* Set bits in *WMASK according to a register number REG as encoded by
8089 bfd_arm_vfp11_regno(). Ignore d16-d31. */
8092 bfd_arm_vfp11_write_mask (unsigned int *wmask
, unsigned int reg
)
8097 *wmask
|= 3 << ((reg
- 32) * 2);
8100 /* Return TRUE if WMASK overwrites anything in REGS. */
8103 bfd_arm_vfp11_antidependency (unsigned int wmask
, int *regs
, int numregs
)
8107 for (i
= 0; i
< numregs
; i
++)
8109 unsigned int reg
= regs
[i
];
8111 if (reg
< 32 && (wmask
& (1 << reg
)) != 0)
8119 if ((wmask
& (3 << (reg
* 2))) != 0)
8126 /* In this function, we're interested in two things: finding input registers
8127 for VFP data-processing instructions, and finding the set of registers which
8128 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
8129 hold the written set, so FLDM etc. are easy to deal with (we're only
8130 interested in 32 SP registers or 16 dp registers, due to the VFP version
8131 implemented by the chip in question). DP registers are marked by setting
8132 both SP registers in the write mask). */
8134 static enum bfd_arm_vfp11_pipe
8135 bfd_arm_vfp11_insn_decode (unsigned int insn
, unsigned int *destmask
, int *regs
,
8138 enum bfd_arm_vfp11_pipe vpipe
= VFP11_BAD
;
8139 bfd_boolean is_double
= ((insn
& 0xf00) == 0xb00) ? 1 : 0;
8141 if ((insn
& 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
8144 unsigned int fd
= bfd_arm_vfp11_regno (insn
, is_double
, 12, 22);
8145 unsigned int fm
= bfd_arm_vfp11_regno (insn
, is_double
, 0, 5);
8147 pqrs
= ((insn
& 0x00800000) >> 20)
8148 | ((insn
& 0x00300000) >> 19)
8149 | ((insn
& 0x00000040) >> 6);
8153 case 0: /* fmac[sd]. */
8154 case 1: /* fnmac[sd]. */
8155 case 2: /* fmsc[sd]. */
8156 case 3: /* fnmsc[sd]. */
8158 bfd_arm_vfp11_write_mask (destmask
, fd
);
8160 regs
[1] = bfd_arm_vfp11_regno (insn
, is_double
, 16, 7); /* Fn. */
8165 case 4: /* fmul[sd]. */
8166 case 5: /* fnmul[sd]. */
8167 case 6: /* fadd[sd]. */
8168 case 7: /* fsub[sd]. */
8172 case 8: /* fdiv[sd]. */
8175 bfd_arm_vfp11_write_mask (destmask
, fd
);
8176 regs
[0] = bfd_arm_vfp11_regno (insn
, is_double
, 16, 7); /* Fn. */
8181 case 15: /* extended opcode. */
8183 unsigned int extn
= ((insn
>> 15) & 0x1e)
8184 | ((insn
>> 7) & 1);
8188 case 0: /* fcpy[sd]. */
8189 case 1: /* fabs[sd]. */
8190 case 2: /* fneg[sd]. */
8191 case 8: /* fcmp[sd]. */
8192 case 9: /* fcmpe[sd]. */
8193 case 10: /* fcmpz[sd]. */
8194 case 11: /* fcmpez[sd]. */
8195 case 16: /* fuito[sd]. */
8196 case 17: /* fsito[sd]. */
8197 case 24: /* ftoui[sd]. */
8198 case 25: /* ftouiz[sd]. */
8199 case 26: /* ftosi[sd]. */
8200 case 27: /* ftosiz[sd]. */
8201 /* These instructions will not bounce due to underflow. */
8206 case 3: /* fsqrt[sd]. */
8207 /* fsqrt cannot underflow, but it can (perhaps) overwrite
8208 registers to cause the erratum in previous instructions. */
8209 bfd_arm_vfp11_write_mask (destmask
, fd
);
8213 case 15: /* fcvt{ds,sd}. */
8217 bfd_arm_vfp11_write_mask (destmask
, fd
);
8219 /* Only FCVTSD can underflow. */
8220 if ((insn
& 0x100) != 0)
8239 /* Two-register transfer. */
8240 else if ((insn
& 0x0fe00ed0) == 0x0c400a10)
8242 unsigned int fm
= bfd_arm_vfp11_regno (insn
, is_double
, 0, 5);
8244 if ((insn
& 0x100000) == 0)
8247 bfd_arm_vfp11_write_mask (destmask
, fm
);
8250 bfd_arm_vfp11_write_mask (destmask
, fm
);
8251 bfd_arm_vfp11_write_mask (destmask
, fm
+ 1);
8257 else if ((insn
& 0x0e100e00) == 0x0c100a00) /* A load insn. */
8259 int fd
= bfd_arm_vfp11_regno (insn
, is_double
, 12, 22);
8260 unsigned int puw
= ((insn
>> 21) & 0x1) | (((insn
>> 23) & 3) << 1);
8264 case 0: /* Two-reg transfer. We should catch these above. */
8267 case 2: /* fldm[sdx]. */
8271 unsigned int i
, offset
= insn
& 0xff;
8276 for (i
= fd
; i
< fd
+ offset
; i
++)
8277 bfd_arm_vfp11_write_mask (destmask
, i
);
8281 case 4: /* fld[sd]. */
8283 bfd_arm_vfp11_write_mask (destmask
, fd
);
8292 /* Single-register transfer. Note L==0. */
8293 else if ((insn
& 0x0f100e10) == 0x0e000a10)
8295 unsigned int opcode
= (insn
>> 21) & 7;
8296 unsigned int fn
= bfd_arm_vfp11_regno (insn
, is_double
, 16, 7);
8300 case 0: /* fmsr/fmdlr. */
8301 case 1: /* fmdhr. */
8302 /* Mark fmdhr and fmdlr as writing to the whole of the DP
8303 destination register. I don't know if this is exactly right,
8304 but it is the conservative choice. */
8305 bfd_arm_vfp11_write_mask (destmask
, fn
);
8319 static int elf32_arm_compare_mapping (const void * a
, const void * b
);
8322 /* Look for potentially-troublesome code sequences which might trigger the
8323 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
8324 (available from ARM) for details of the erratum. A short version is
8325 described in ld.texinfo. */
8328 bfd_elf32_arm_vfp11_erratum_scan (bfd
*abfd
, struct bfd_link_info
*link_info
)
8331 bfd_byte
*contents
= NULL
;
8333 int regs
[3], numregs
= 0;
8334 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
8335 int use_vector
= (globals
->vfp11_fix
== BFD_ARM_VFP11_FIX_VECTOR
);
8337 if (globals
== NULL
)
8340 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
8341 The states transition as follows:
8343 0 -> 1 (vector) or 0 -> 2 (scalar)
8344 A VFP FMAC-pipeline instruction has been seen. Fill
8345 regs[0]..regs[numregs-1] with its input operands. Remember this
8346 instruction in 'first_fmac'.
8349 Any instruction, except for a VFP instruction which overwrites
8354 A VFP instruction has been seen which overwrites any of regs[*].
8355 We must make a veneer! Reset state to 0 before examining next
8359 If we fail to match anything in state 2, reset to state 0 and reset
8360 the instruction pointer to the instruction after 'first_fmac'.
8362 If the VFP11 vector mode is in use, there must be at least two unrelated
8363 instructions between anti-dependent VFP11 instructions to properly avoid
8364 triggering the erratum, hence the use of the extra state 1. */
8366 /* If we are only performing a partial link do not bother
8367 to construct any glue. */
8368 if (bfd_link_relocatable (link_info
))
8371 /* Skip if this bfd does not correspond to an ELF image. */
8372 if (! is_arm_elf (abfd
))
8375 /* We should have chosen a fix type by the time we get here. */
8376 BFD_ASSERT (globals
->vfp11_fix
!= BFD_ARM_VFP11_FIX_DEFAULT
);
8378 if (globals
->vfp11_fix
== BFD_ARM_VFP11_FIX_NONE
)
8381 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8382 if ((abfd
->flags
& (EXEC_P
| DYNAMIC
)) != 0)
8385 for (sec
= abfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
8387 unsigned int i
, span
, first_fmac
= 0, veneer_of_insn
= 0;
8388 struct _arm_elf_section_data
*sec_data
;
8390 /* If we don't have executable progbits, we're not interested in this
8391 section. Also skip if section is to be excluded. */
8392 if (elf_section_type (sec
) != SHT_PROGBITS
8393 || (elf_section_flags (sec
) & SHF_EXECINSTR
) == 0
8394 || (sec
->flags
& SEC_EXCLUDE
) != 0
8395 || sec
->sec_info_type
== SEC_INFO_TYPE_JUST_SYMS
8396 || sec
->output_section
== bfd_abs_section_ptr
8397 || strcmp (sec
->name
, VFP11_ERRATUM_VENEER_SECTION_NAME
) == 0)
8400 sec_data
= elf32_arm_section_data (sec
);
8402 if (sec_data
->mapcount
== 0)
8405 if (elf_section_data (sec
)->this_hdr
.contents
!= NULL
)
8406 contents
= elf_section_data (sec
)->this_hdr
.contents
;
8407 else if (! bfd_malloc_and_get_section (abfd
, sec
, &contents
))
8410 qsort (sec_data
->map
, sec_data
->mapcount
, sizeof (elf32_arm_section_map
),
8411 elf32_arm_compare_mapping
);
8413 for (span
= 0; span
< sec_data
->mapcount
; span
++)
8415 unsigned int span_start
= sec_data
->map
[span
].vma
;
8416 unsigned int span_end
= (span
== sec_data
->mapcount
- 1)
8417 ? sec
->size
: sec_data
->map
[span
+ 1].vma
;
8418 char span_type
= sec_data
->map
[span
].type
;
8420 /* FIXME: Only ARM mode is supported at present. We may need to
8421 support Thumb-2 mode also at some point. */
8422 if (span_type
!= 'a')
8425 for (i
= span_start
; i
< span_end
;)
8427 unsigned int next_i
= i
+ 4;
8428 unsigned int insn
= bfd_big_endian (abfd
)
8429 ? (contents
[i
] << 24)
8430 | (contents
[i
+ 1] << 16)
8431 | (contents
[i
+ 2] << 8)
8433 : (contents
[i
+ 3] << 24)
8434 | (contents
[i
+ 2] << 16)
8435 | (contents
[i
+ 1] << 8)
8437 unsigned int writemask
= 0;
8438 enum bfd_arm_vfp11_pipe vpipe
;
8443 vpipe
= bfd_arm_vfp11_insn_decode (insn
, &writemask
, regs
,
8445 /* I'm assuming the VFP11 erratum can trigger with denorm
8446 operands on either the FMAC or the DS pipeline. This might
8447 lead to slightly overenthusiastic veneer insertion. */
8448 if (vpipe
== VFP11_FMAC
|| vpipe
== VFP11_DS
)
8450 state
= use_vector
? 1 : 2;
8452 veneer_of_insn
= insn
;
8458 int other_regs
[3], other_numregs
;
8459 vpipe
= bfd_arm_vfp11_insn_decode (insn
, &writemask
,
8462 if (vpipe
!= VFP11_BAD
8463 && bfd_arm_vfp11_antidependency (writemask
, regs
,
8473 int other_regs
[3], other_numregs
;
8474 vpipe
= bfd_arm_vfp11_insn_decode (insn
, &writemask
,
8477 if (vpipe
!= VFP11_BAD
8478 && bfd_arm_vfp11_antidependency (writemask
, regs
,
8484 next_i
= first_fmac
+ 4;
8490 abort (); /* Should be unreachable. */
8495 elf32_vfp11_erratum_list
*newerr
=(elf32_vfp11_erratum_list
*)
8496 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list
));
8498 elf32_arm_section_data (sec
)->erratumcount
+= 1;
8500 newerr
->u
.b
.vfp_insn
= veneer_of_insn
;
8505 newerr
->type
= VFP11_ERRATUM_BRANCH_TO_ARM_VENEER
;
8512 record_vfp11_erratum_veneer (link_info
, newerr
, abfd
, sec
,
8517 newerr
->next
= sec_data
->erratumlist
;
8518 sec_data
->erratumlist
= newerr
;
8527 if (contents
!= NULL
8528 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
8536 if (contents
!= NULL
8537 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
8543 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
8544 after sections have been laid out, using specially-named symbols. */
8547 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd
*abfd
,
8548 struct bfd_link_info
*link_info
)
8551 struct elf32_arm_link_hash_table
*globals
;
8554 if (bfd_link_relocatable (link_info
))
8557 /* Skip if this bfd does not correspond to an ELF image. */
8558 if (! is_arm_elf (abfd
))
8561 globals
= elf32_arm_hash_table (link_info
);
8562 if (globals
== NULL
)
8565 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen
8566 (VFP11_ERRATUM_VENEER_ENTRY_NAME
) + 10);
8568 for (sec
= abfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
8570 struct _arm_elf_section_data
*sec_data
= elf32_arm_section_data (sec
);
8571 elf32_vfp11_erratum_list
*errnode
= sec_data
->erratumlist
;
8573 for (; errnode
!= NULL
; errnode
= errnode
->next
)
8575 struct elf_link_hash_entry
*myh
;
8578 switch (errnode
->type
)
8580 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER
:
8581 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER
:
8582 /* Find veneer symbol. */
8583 sprintf (tmp_name
, VFP11_ERRATUM_VENEER_ENTRY_NAME
,
8584 errnode
->u
.b
.veneer
->u
.v
.id
);
8586 myh
= elf_link_hash_lookup
8587 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
8590 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8591 abfd
, "VFP11", tmp_name
);
8593 vma
= myh
->root
.u
.def
.section
->output_section
->vma
8594 + myh
->root
.u
.def
.section
->output_offset
8595 + myh
->root
.u
.def
.value
;
8597 errnode
->u
.b
.veneer
->vma
= vma
;
8600 case VFP11_ERRATUM_ARM_VENEER
:
8601 case VFP11_ERRATUM_THUMB_VENEER
:
8602 /* Find return location. */
8603 sprintf (tmp_name
, VFP11_ERRATUM_VENEER_ENTRY_NAME
"_r",
8606 myh
= elf_link_hash_lookup
8607 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
8610 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8611 abfd
, "VFP11", tmp_name
);
8613 vma
= myh
->root
.u
.def
.section
->output_section
->vma
8614 + myh
->root
.u
.def
.section
->output_offset
8615 + myh
->root
.u
.def
.value
;
8617 errnode
->u
.v
.branch
->vma
= vma
;
8629 /* Find virtual-memory addresses for STM32L4XX erratum veneers and
8630 return locations after sections have been laid out, using
8631 specially-named symbols. */
8634 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd
*abfd
,
8635 struct bfd_link_info
*link_info
)
8638 struct elf32_arm_link_hash_table
*globals
;
8641 if (bfd_link_relocatable (link_info
))
8644 /* Skip if this bfd does not correspond to an ELF image. */
8645 if (! is_arm_elf (abfd
))
8648 globals
= elf32_arm_hash_table (link_info
);
8649 if (globals
== NULL
)
8652 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen
8653 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
) + 10);
8655 for (sec
= abfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
8657 struct _arm_elf_section_data
*sec_data
= elf32_arm_section_data (sec
);
8658 elf32_stm32l4xx_erratum_list
*errnode
= sec_data
->stm32l4xx_erratumlist
;
8660 for (; errnode
!= NULL
; errnode
= errnode
->next
)
8662 struct elf_link_hash_entry
*myh
;
8665 switch (errnode
->type
)
8667 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER
:
8668 /* Find veneer symbol. */
8669 sprintf (tmp_name
, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
,
8670 errnode
->u
.b
.veneer
->u
.v
.id
);
8672 myh
= elf_link_hash_lookup
8673 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
8676 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8677 abfd
, "STM32L4XX", tmp_name
);
8679 vma
= myh
->root
.u
.def
.section
->output_section
->vma
8680 + myh
->root
.u
.def
.section
->output_offset
8681 + myh
->root
.u
.def
.value
;
8683 errnode
->u
.b
.veneer
->vma
= vma
;
8686 case STM32L4XX_ERRATUM_VENEER
:
8687 /* Find return location. */
8688 sprintf (tmp_name
, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
"_r",
8691 myh
= elf_link_hash_lookup
8692 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
8695 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8696 abfd
, "STM32L4XX", tmp_name
);
8698 vma
= myh
->root
.u
.def
.section
->output_section
->vma
8699 + myh
->root
.u
.def
.section
->output_offset
8700 + myh
->root
.u
.def
.value
;
8702 errnode
->u
.v
.branch
->vma
= vma
;
8714 static inline bfd_boolean
8715 is_thumb2_ldmia (const insn32 insn
)
8717 /* Encoding T2: LDM<c>.W <Rn>{!},<registers>
8718 1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll. */
8719 return (insn
& 0xffd02000) == 0xe8900000;
8722 static inline bfd_boolean
8723 is_thumb2_ldmdb (const insn32 insn
)
8725 /* Encoding T1: LDMDB<c> <Rn>{!},<registers>
8726 1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll. */
8727 return (insn
& 0xffd02000) == 0xe9100000;
8730 static inline bfd_boolean
8731 is_thumb2_vldm (const insn32 insn
)
8733 /* A6.5 Extension register load or store instruction
8735 We look for SP 32-bit and DP 64-bit registers.
8736 Encoding T1 VLDM{mode}<c> <Rn>{!}, <list>
8737 <list> is consecutive 64-bit registers
8738 1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii
8739 Encoding T2 VLDM{mode}<c> <Rn>{!}, <list>
8740 <list> is consecutive 32-bit registers
8741 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii
8742 if P==0 && U==1 && W==1 && Rn=1101 VPOP
8743 if PUW=010 || PUW=011 || PUW=101 VLDM. */
8745 (((insn
& 0xfe100f00) == 0xec100b00) ||
8746 ((insn
& 0xfe100f00) == 0xec100a00))
8747 && /* (IA without !). */
8748 (((((insn
<< 7) >> 28) & 0xd) == 0x4)
8749 /* (IA with !), includes VPOP (when reg number is SP). */
8750 || ((((insn
<< 7) >> 28) & 0xd) == 0x5)
8752 || ((((insn
<< 7) >> 28) & 0xd) == 0x9));
8755 /* STM STM32L4XX erratum : This function assumes that it receives an LDM or
8757 - computes the number and the mode of memory accesses
8758 - decides if the replacement should be done:
8759 . replaces only if > 8-word accesses
8760 . or (testing purposes only) replaces all accesses. */
8763 stm32l4xx_need_create_replacing_stub (const insn32 insn
,
8764 bfd_arm_stm32l4xx_fix stm32l4xx_fix
)
8768 /* The field encoding the register list is the same for both LDMIA
8769 and LDMDB encodings. */
8770 if (is_thumb2_ldmia (insn
) || is_thumb2_ldmdb (insn
))
8771 nb_words
= elf32_arm_popcount (insn
& 0x0000ffff);
8772 else if (is_thumb2_vldm (insn
))
8773 nb_words
= (insn
& 0xff);
8775 /* DEFAULT mode accounts for the real bug condition situation,
8776 ALL mode inserts stubs for each LDM/VLDM instruction (testing). */
8778 (stm32l4xx_fix
== BFD_ARM_STM32L4XX_FIX_DEFAULT
) ? nb_words
> 8 :
8779 (stm32l4xx_fix
== BFD_ARM_STM32L4XX_FIX_ALL
) ? TRUE
: FALSE
;
8782 /* Look for potentially-troublesome code sequences which might trigger
8783 the STM STM32L4XX erratum. */
8786 bfd_elf32_arm_stm32l4xx_erratum_scan (bfd
*abfd
,
8787 struct bfd_link_info
*link_info
)
8790 bfd_byte
*contents
= NULL
;
8791 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
8793 if (globals
== NULL
)
8796 /* If we are only performing a partial link do not bother
8797 to construct any glue. */
8798 if (bfd_link_relocatable (link_info
))
8801 /* Skip if this bfd does not correspond to an ELF image. */
8802 if (! is_arm_elf (abfd
))
8805 if (globals
->stm32l4xx_fix
== BFD_ARM_STM32L4XX_FIX_NONE
)
8808 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8809 if ((abfd
->flags
& (EXEC_P
| DYNAMIC
)) != 0)
8812 for (sec
= abfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
8814 unsigned int i
, span
;
8815 struct _arm_elf_section_data
*sec_data
;
8817 /* If we don't have executable progbits, we're not interested in this
8818 section. Also skip if section is to be excluded. */
8819 if (elf_section_type (sec
) != SHT_PROGBITS
8820 || (elf_section_flags (sec
) & SHF_EXECINSTR
) == 0
8821 || (sec
->flags
& SEC_EXCLUDE
) != 0
8822 || sec
->sec_info_type
== SEC_INFO_TYPE_JUST_SYMS
8823 || sec
->output_section
== bfd_abs_section_ptr
8824 || strcmp (sec
->name
, STM32L4XX_ERRATUM_VENEER_SECTION_NAME
) == 0)
8827 sec_data
= elf32_arm_section_data (sec
);
8829 if (sec_data
->mapcount
== 0)
8832 if (elf_section_data (sec
)->this_hdr
.contents
!= NULL
)
8833 contents
= elf_section_data (sec
)->this_hdr
.contents
;
8834 else if (! bfd_malloc_and_get_section (abfd
, sec
, &contents
))
8837 qsort (sec_data
->map
, sec_data
->mapcount
, sizeof (elf32_arm_section_map
),
8838 elf32_arm_compare_mapping
);
8840 for (span
= 0; span
< sec_data
->mapcount
; span
++)
8842 unsigned int span_start
= sec_data
->map
[span
].vma
;
8843 unsigned int span_end
= (span
== sec_data
->mapcount
- 1)
8844 ? sec
->size
: sec_data
->map
[span
+ 1].vma
;
8845 char span_type
= sec_data
->map
[span
].type
;
8846 int itblock_current_pos
= 0;
8848 /* Only Thumb2 mode need be supported with this CM4 specific
8849 code, we should not encounter any arm mode eg span_type
8851 if (span_type
!= 't')
8854 for (i
= span_start
; i
< span_end
;)
8856 unsigned int insn
= bfd_get_16 (abfd
, &contents
[i
]);
8857 bfd_boolean insn_32bit
= FALSE
;
8858 bfd_boolean is_ldm
= FALSE
;
8859 bfd_boolean is_vldm
= FALSE
;
8860 bfd_boolean is_not_last_in_it_block
= FALSE
;
8862 /* The first 16-bits of all 32-bit thumb2 instructions start
8863 with opcode[15..13]=0b111 and the encoded op1 can be anything
8864 except opcode[12..11]!=0b00.
8865 See 32-bit Thumb instruction encoding. */
8866 if ((insn
& 0xe000) == 0xe000 && (insn
& 0x1800) != 0x0000)
8869 /* Compute the predicate that tells if the instruction
8870 is concerned by the IT block
8871 - Creates an error if there is a ldm that is not
8872 last in the IT block thus cannot be replaced
8873 - Otherwise we can create a branch at the end of the
8874 IT block, it will be controlled naturally by IT
8875 with the proper pseudo-predicate
8876 - So the only interesting predicate is the one that
8877 tells that we are not on the last item of an IT
8879 if (itblock_current_pos
!= 0)
8880 is_not_last_in_it_block
= !!--itblock_current_pos
;
8884 /* Load the rest of the insn (in manual-friendly order). */
8885 insn
= (insn
<< 16) | bfd_get_16 (abfd
, &contents
[i
+ 2]);
8886 is_ldm
= is_thumb2_ldmia (insn
) || is_thumb2_ldmdb (insn
);
8887 is_vldm
= is_thumb2_vldm (insn
);
8889 /* Veneers are created for (v)ldm depending on
8890 option flags and memory accesses conditions; but
8891 if the instruction is not the last instruction of
8892 an IT block, we cannot create a jump there, so we
8894 if ((is_ldm
|| is_vldm
)
8895 && stm32l4xx_need_create_replacing_stub
8896 (insn
, globals
->stm32l4xx_fix
))
8898 if (is_not_last_in_it_block
)
8901 /* xgettext:c-format */
8902 (_("%pB(%pA+%#x): error: multiple load detected"
8903 " in non-last IT block instruction:"
8904 " STM32L4XX veneer cannot be generated; "
8905 "use gcc option -mrestrict-it to generate"
8906 " only one instruction per IT block"),
8911 elf32_stm32l4xx_erratum_list
*newerr
=
8912 (elf32_stm32l4xx_erratum_list
*)
8914 (sizeof (elf32_stm32l4xx_erratum_list
));
8916 elf32_arm_section_data (sec
)
8917 ->stm32l4xx_erratumcount
+= 1;
8918 newerr
->u
.b
.insn
= insn
;
8919 /* We create only thumb branches. */
8921 STM32L4XX_ERRATUM_BRANCH_TO_VENEER
;
8922 record_stm32l4xx_erratum_veneer
8923 (link_info
, newerr
, abfd
, sec
,
8926 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
:
8927 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE
);
8929 newerr
->next
= sec_data
->stm32l4xx_erratumlist
;
8930 sec_data
->stm32l4xx_erratumlist
= newerr
;
8937 IT blocks are only encoded in T1
8938 Encoding T1: IT{x{y{z}}} <firstcond>
8939 1 0 1 1 - 1 1 1 1 - firstcond - mask
8940 if mask = '0000' then see 'related encodings'
8941 We don't deal with UNPREDICTABLE, just ignore these.
8942 There can be no nested IT blocks so an IT block
8943 is naturally a new one for which it is worth
8944 computing its size. */
8945 bfd_boolean is_newitblock
= ((insn
& 0xff00) == 0xbf00)
8946 && ((insn
& 0x000f) != 0x0000);
8947 /* If we have a new IT block we compute its size. */
8950 /* Compute the number of instructions controlled
8951 by the IT block, it will be used to decide
8952 whether we are inside an IT block or not. */
8953 unsigned int mask
= insn
& 0x000f;
8954 itblock_current_pos
= 4 - ctz (mask
);
8958 i
+= insn_32bit
? 4 : 2;
8962 if (contents
!= NULL
8963 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
8971 if (contents
!= NULL
8972 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
8978 /* Set target relocation values needed during linking. */
8981 bfd_elf32_arm_set_target_params (struct bfd
*output_bfd
,
8982 struct bfd_link_info
*link_info
,
8983 struct elf32_arm_params
*params
)
8985 struct elf32_arm_link_hash_table
*globals
;
8987 globals
= elf32_arm_hash_table (link_info
);
8988 if (globals
== NULL
)
8991 globals
->target1_is_rel
= params
->target1_is_rel
;
8992 if (globals
->fdpic_p
)
8993 globals
->target2_reloc
= R_ARM_GOT32
;
8994 else if (strcmp (params
->target2_type
, "rel") == 0)
8995 globals
->target2_reloc
= R_ARM_REL32
;
8996 else if (strcmp (params
->target2_type
, "abs") == 0)
8997 globals
->target2_reloc
= R_ARM_ABS32
;
8998 else if (strcmp (params
->target2_type
, "got-rel") == 0)
8999 globals
->target2_reloc
= R_ARM_GOT_PREL
;
9002 _bfd_error_handler (_("invalid TARGET2 relocation type '%s'"),
9003 params
->target2_type
);
9005 globals
->fix_v4bx
= params
->fix_v4bx
;
9006 globals
->use_blx
|= params
->use_blx
;
9007 globals
->vfp11_fix
= params
->vfp11_denorm_fix
;
9008 globals
->stm32l4xx_fix
= params
->stm32l4xx_fix
;
9009 if (globals
->fdpic_p
)
9010 globals
->pic_veneer
= 1;
9012 globals
->pic_veneer
= params
->pic_veneer
;
9013 globals
->fix_cortex_a8
= params
->fix_cortex_a8
;
9014 globals
->fix_arm1176
= params
->fix_arm1176
;
9015 globals
->cmse_implib
= params
->cmse_implib
;
9016 globals
->in_implib_bfd
= params
->in_implib_bfd
;
9018 BFD_ASSERT (is_arm_elf (output_bfd
));
9019 elf_arm_tdata (output_bfd
)->no_enum_size_warning
9020 = params
->no_enum_size_warning
;
9021 elf_arm_tdata (output_bfd
)->no_wchar_size_warning
9022 = params
->no_wchar_size_warning
;
9025 /* Replace the target offset of a Thumb bl or b.w instruction. */
9028 insert_thumb_branch (bfd
*abfd
, long int offset
, bfd_byte
*insn
)
9034 BFD_ASSERT ((offset
& 1) == 0);
9036 upper
= bfd_get_16 (abfd
, insn
);
9037 lower
= bfd_get_16 (abfd
, insn
+ 2);
9038 reloc_sign
= (offset
< 0) ? 1 : 0;
9039 upper
= (upper
& ~(bfd_vma
) 0x7ff)
9040 | ((offset
>> 12) & 0x3ff)
9041 | (reloc_sign
<< 10);
9042 lower
= (lower
& ~(bfd_vma
) 0x2fff)
9043 | (((!((offset
>> 23) & 1)) ^ reloc_sign
) << 13)
9044 | (((!((offset
>> 22) & 1)) ^ reloc_sign
) << 11)
9045 | ((offset
>> 1) & 0x7ff);
9046 bfd_put_16 (abfd
, upper
, insn
);
9047 bfd_put_16 (abfd
, lower
, insn
+ 2);
9050 /* Thumb code calling an ARM function. */
9053 elf32_thumb_to_arm_stub (struct bfd_link_info
* info
,
9057 asection
* input_section
,
9058 bfd_byte
* hit_data
,
9061 bfd_signed_vma addend
,
9063 char **error_message
)
9067 long int ret_offset
;
9068 struct elf_link_hash_entry
* myh
;
9069 struct elf32_arm_link_hash_table
* globals
;
9071 myh
= find_thumb_glue (info
, name
, error_message
);
9075 globals
= elf32_arm_hash_table (info
);
9076 BFD_ASSERT (globals
!= NULL
);
9077 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
9079 my_offset
= myh
->root
.u
.def
.value
;
9081 s
= bfd_get_linker_section (globals
->bfd_of_glue_owner
,
9082 THUMB2ARM_GLUE_SECTION_NAME
);
9084 BFD_ASSERT (s
!= NULL
);
9085 BFD_ASSERT (s
->contents
!= NULL
);
9086 BFD_ASSERT (s
->output_section
!= NULL
);
9088 if ((my_offset
& 0x01) == 0x01)
9091 && sym_sec
->owner
!= NULL
9092 && !INTERWORK_FLAG (sym_sec
->owner
))
9095 (_("%pB(%s): warning: interworking not enabled;"
9096 " first occurrence: %pB: %s call to %s"),
9097 sym_sec
->owner
, name
, input_bfd
, "Thumb", "ARM");
9103 myh
->root
.u
.def
.value
= my_offset
;
9105 put_thumb_insn (globals
, output_bfd
, (bfd_vma
) t2a1_bx_pc_insn
,
9106 s
->contents
+ my_offset
);
9108 put_thumb_insn (globals
, output_bfd
, (bfd_vma
) t2a2_noop_insn
,
9109 s
->contents
+ my_offset
+ 2);
9112 /* Address of destination of the stub. */
9113 ((bfd_signed_vma
) val
)
9115 /* Offset from the start of the current section
9116 to the start of the stubs. */
9118 /* Offset of the start of this stub from the start of the stubs. */
9120 /* Address of the start of the current section. */
9121 + s
->output_section
->vma
)
9122 /* The branch instruction is 4 bytes into the stub. */
9124 /* ARM branches work from the pc of the instruction + 8. */
9127 put_arm_insn (globals
, output_bfd
,
9128 (bfd_vma
) t2a3_b_insn
| ((ret_offset
>> 2) & 0x00FFFFFF),
9129 s
->contents
+ my_offset
+ 4);
9132 BFD_ASSERT (my_offset
<= globals
->thumb_glue_size
);
9134 /* Now go back and fix up the original BL insn to point to here. */
9136 /* Address of where the stub is located. */
9137 (s
->output_section
->vma
+ s
->output_offset
+ my_offset
)
9138 /* Address of where the BL is located. */
9139 - (input_section
->output_section
->vma
+ input_section
->output_offset
9141 /* Addend in the relocation. */
9143 /* Biassing for PC-relative addressing. */
9146 insert_thumb_branch (input_bfd
, ret_offset
, hit_data
- input_section
->vma
);
9151 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
9153 static struct elf_link_hash_entry
*
9154 elf32_arm_create_thumb_stub (struct bfd_link_info
* info
,
9161 char ** error_message
)
9164 long int ret_offset
;
9165 struct elf_link_hash_entry
* myh
;
9166 struct elf32_arm_link_hash_table
* globals
;
9168 myh
= find_arm_glue (info
, name
, error_message
);
9172 globals
= elf32_arm_hash_table (info
);
9173 BFD_ASSERT (globals
!= NULL
);
9174 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
9176 my_offset
= myh
->root
.u
.def
.value
;
9178 if ((my_offset
& 0x01) == 0x01)
9181 && sym_sec
->owner
!= NULL
9182 && !INTERWORK_FLAG (sym_sec
->owner
))
9185 (_("%pB(%s): warning: interworking not enabled;"
9186 " first occurrence: %pB: %s call to %s"),
9187 sym_sec
->owner
, name
, input_bfd
, "ARM", "Thumb");
9191 myh
->root
.u
.def
.value
= my_offset
;
9193 if (bfd_link_pic (info
)
9194 || globals
->root
.is_relocatable_executable
9195 || globals
->pic_veneer
)
9197 /* For relocatable objects we can't use absolute addresses,
9198 so construct the address from a relative offset. */
9199 /* TODO: If the offset is small it's probably worth
9200 constructing the address with adds. */
9201 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t1p_ldr_insn
,
9202 s
->contents
+ my_offset
);
9203 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t2p_add_pc_insn
,
9204 s
->contents
+ my_offset
+ 4);
9205 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t3p_bx_r12_insn
,
9206 s
->contents
+ my_offset
+ 8);
9207 /* Adjust the offset by 4 for the position of the add,
9208 and 8 for the pipeline offset. */
9209 ret_offset
= (val
- (s
->output_offset
9210 + s
->output_section
->vma
9213 bfd_put_32 (output_bfd
, ret_offset
,
9214 s
->contents
+ my_offset
+ 12);
9216 else if (globals
->use_blx
)
9218 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t1v5_ldr_insn
,
9219 s
->contents
+ my_offset
);
9221 /* It's a thumb address. Add the low order bit. */
9222 bfd_put_32 (output_bfd
, val
| a2t2v5_func_addr_insn
,
9223 s
->contents
+ my_offset
+ 4);
9227 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t1_ldr_insn
,
9228 s
->contents
+ my_offset
);
9230 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t2_bx_r12_insn
,
9231 s
->contents
+ my_offset
+ 4);
9233 /* It's a thumb address. Add the low order bit. */
9234 bfd_put_32 (output_bfd
, val
| a2t3_func_addr_insn
,
9235 s
->contents
+ my_offset
+ 8);
9241 BFD_ASSERT (my_offset
<= globals
->arm_glue_size
);
9246 /* Arm code calling a Thumb function. */
9249 elf32_arm_to_thumb_stub (struct bfd_link_info
* info
,
9253 asection
* input_section
,
9254 bfd_byte
* hit_data
,
9257 bfd_signed_vma addend
,
9259 char **error_message
)
9261 unsigned long int tmp
;
9264 long int ret_offset
;
9265 struct elf_link_hash_entry
* myh
;
9266 struct elf32_arm_link_hash_table
* globals
;
9268 globals
= elf32_arm_hash_table (info
);
9269 BFD_ASSERT (globals
!= NULL
);
9270 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
9272 s
= bfd_get_linker_section (globals
->bfd_of_glue_owner
,
9273 ARM2THUMB_GLUE_SECTION_NAME
);
9274 BFD_ASSERT (s
!= NULL
);
9275 BFD_ASSERT (s
->contents
!= NULL
);
9276 BFD_ASSERT (s
->output_section
!= NULL
);
9278 myh
= elf32_arm_create_thumb_stub (info
, name
, input_bfd
, output_bfd
,
9279 sym_sec
, val
, s
, error_message
);
9283 my_offset
= myh
->root
.u
.def
.value
;
9284 tmp
= bfd_get_32 (input_bfd
, hit_data
);
9285 tmp
= tmp
& 0xFF000000;
9287 /* Somehow these are both 4 too far, so subtract 8. */
9288 ret_offset
= (s
->output_offset
9290 + s
->output_section
->vma
9291 - (input_section
->output_offset
9292 + input_section
->output_section
->vma
9296 tmp
= tmp
| ((ret_offset
>> 2) & 0x00FFFFFF);
9298 bfd_put_32 (output_bfd
, (bfd_vma
) tmp
, hit_data
- input_section
->vma
);
9303 /* Populate Arm stub for an exported Thumb function. */
9306 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry
*h
, void * inf
)
9308 struct bfd_link_info
* info
= (struct bfd_link_info
*) inf
;
9310 struct elf_link_hash_entry
* myh
;
9311 struct elf32_arm_link_hash_entry
*eh
;
9312 struct elf32_arm_link_hash_table
* globals
;
9315 char *error_message
;
9317 eh
= elf32_arm_hash_entry (h
);
9318 /* Allocate stubs for exported Thumb functions on v4t. */
9319 if (eh
->export_glue
== NULL
)
9322 globals
= elf32_arm_hash_table (info
);
9323 BFD_ASSERT (globals
!= NULL
);
9324 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
9326 s
= bfd_get_linker_section (globals
->bfd_of_glue_owner
,
9327 ARM2THUMB_GLUE_SECTION_NAME
);
9328 BFD_ASSERT (s
!= NULL
);
9329 BFD_ASSERT (s
->contents
!= NULL
);
9330 BFD_ASSERT (s
->output_section
!= NULL
);
9332 sec
= eh
->export_glue
->root
.u
.def
.section
;
9334 BFD_ASSERT (sec
->output_section
!= NULL
);
9336 val
= eh
->export_glue
->root
.u
.def
.value
+ sec
->output_offset
9337 + sec
->output_section
->vma
;
9339 myh
= elf32_arm_create_thumb_stub (info
, h
->root
.root
.string
,
9340 h
->root
.u
.def
.section
->owner
,
9341 globals
->obfd
, sec
, val
, s
,
9347 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
9350 elf32_arm_bx_glue (struct bfd_link_info
* info
, int reg
)
9355 struct elf32_arm_link_hash_table
*globals
;
9357 globals
= elf32_arm_hash_table (info
);
9358 BFD_ASSERT (globals
!= NULL
);
9359 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
9361 s
= bfd_get_linker_section (globals
->bfd_of_glue_owner
,
9362 ARM_BX_GLUE_SECTION_NAME
);
9363 BFD_ASSERT (s
!= NULL
);
9364 BFD_ASSERT (s
->contents
!= NULL
);
9365 BFD_ASSERT (s
->output_section
!= NULL
);
9367 BFD_ASSERT (globals
->bx_glue_offset
[reg
] & 2);
9369 glue_addr
= globals
->bx_glue_offset
[reg
] & ~(bfd_vma
)3;
9371 if ((globals
->bx_glue_offset
[reg
] & 1) == 0)
9373 p
= s
->contents
+ glue_addr
;
9374 bfd_put_32 (globals
->obfd
, armbx1_tst_insn
+ (reg
<< 16), p
);
9375 bfd_put_32 (globals
->obfd
, armbx2_moveq_insn
+ reg
, p
+ 4);
9376 bfd_put_32 (globals
->obfd
, armbx3_bx_insn
+ reg
, p
+ 8);
9377 globals
->bx_glue_offset
[reg
] |= 1;
9380 return glue_addr
+ s
->output_section
->vma
+ s
->output_offset
;
9383 /* Generate Arm stubs for exported Thumb symbols. */
9385 elf32_arm_begin_write_processing (bfd
*abfd ATTRIBUTE_UNUSED
,
9386 struct bfd_link_info
*link_info
)
9388 struct elf32_arm_link_hash_table
* globals
;
9390 if (link_info
== NULL
)
9391 /* Ignore this if we are not called by the ELF backend linker. */
9394 globals
= elf32_arm_hash_table (link_info
);
9395 if (globals
== NULL
)
9398 /* If blx is available then exported Thumb symbols are OK and there is
9400 if (globals
->use_blx
)
9403 elf_link_hash_traverse (&globals
->root
, elf32_arm_to_thumb_export_stub
,
9407 /* Reserve space for COUNT dynamic relocations in relocation selection
9411 elf32_arm_allocate_dynrelocs (struct bfd_link_info
*info
, asection
*sreloc
,
9412 bfd_size_type count
)
9414 struct elf32_arm_link_hash_table
*htab
;
9416 htab
= elf32_arm_hash_table (info
);
9417 BFD_ASSERT (htab
->root
.dynamic_sections_created
);
9420 sreloc
->size
+= RELOC_SIZE (htab
) * count
;
9423 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
9424 dynamic, the relocations should go in SRELOC, otherwise they should
9425 go in the special .rel.iplt section. */
9428 elf32_arm_allocate_irelocs (struct bfd_link_info
*info
, asection
*sreloc
,
9429 bfd_size_type count
)
9431 struct elf32_arm_link_hash_table
*htab
;
9433 htab
= elf32_arm_hash_table (info
);
9434 if (!htab
->root
.dynamic_sections_created
)
9435 htab
->root
.irelplt
->size
+= RELOC_SIZE (htab
) * count
;
9438 BFD_ASSERT (sreloc
!= NULL
);
9439 sreloc
->size
+= RELOC_SIZE (htab
) * count
;
9443 /* Add relocation REL to the end of relocation section SRELOC. */
9446 elf32_arm_add_dynreloc (bfd
*output_bfd
, struct bfd_link_info
*info
,
9447 asection
*sreloc
, Elf_Internal_Rela
*rel
)
9450 struct elf32_arm_link_hash_table
*htab
;
9452 htab
= elf32_arm_hash_table (info
);
9453 if (!htab
->root
.dynamic_sections_created
9454 && ELF32_R_TYPE (rel
->r_info
) == R_ARM_IRELATIVE
)
9455 sreloc
= htab
->root
.irelplt
;
9458 loc
= sreloc
->contents
;
9459 loc
+= sreloc
->reloc_count
++ * RELOC_SIZE (htab
);
9460 if (sreloc
->reloc_count
* RELOC_SIZE (htab
) > sreloc
->size
)
9462 SWAP_RELOC_OUT (htab
) (output_bfd
, rel
, loc
);
9465 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
9466 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
9470 elf32_arm_allocate_plt_entry (struct bfd_link_info
*info
,
9471 bfd_boolean is_iplt_entry
,
9472 union gotplt_union
*root_plt
,
9473 struct arm_plt_info
*arm_plt
)
9475 struct elf32_arm_link_hash_table
*htab
;
9479 htab
= elf32_arm_hash_table (info
);
9483 splt
= htab
->root
.iplt
;
9484 sgotplt
= htab
->root
.igotplt
;
9486 /* NaCl uses a special first entry in .iplt too. */
9487 if (htab
->nacl_p
&& splt
->size
== 0)
9488 splt
->size
+= htab
->plt_header_size
;
9490 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
9491 elf32_arm_allocate_irelocs (info
, htab
->root
.irelplt
, 1);
9495 splt
= htab
->root
.splt
;
9496 sgotplt
= htab
->root
.sgotplt
;
9500 /* Allocate room for R_ARM_FUNCDESC_VALUE. */
9501 /* For lazy binding, relocations will be put into .rel.plt, in
9502 .rel.got otherwise. */
9503 /* FIXME: today we don't support lazy binding so put it in .rel.got */
9504 if (info
->flags
& DF_BIND_NOW
)
9505 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
9507 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelplt
, 1);
9511 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
9512 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelplt
, 1);
9515 /* If this is the first .plt entry, make room for the special
9517 if (splt
->size
== 0)
9518 splt
->size
+= htab
->plt_header_size
;
9520 htab
->next_tls_desc_index
++;
9523 /* Allocate the PLT entry itself, including any leading Thumb stub. */
9524 if (elf32_arm_plt_needs_thumb_stub_p (info
, arm_plt
))
9525 splt
->size
+= PLT_THUMB_STUB_SIZE
;
9526 root_plt
->offset
= splt
->size
;
9527 splt
->size
+= htab
->plt_entry_size
;
9529 if (!htab
->symbian_p
)
9531 /* We also need to make an entry in the .got.plt section, which
9532 will be placed in the .got section by the linker script. */
9534 arm_plt
->got_offset
= sgotplt
->size
;
9536 arm_plt
->got_offset
= sgotplt
->size
- 8 * htab
->num_tls_desc
;
9538 /* Function descriptor takes 64 bits in GOT. */
9546 arm_movw_immediate (bfd_vma value
)
9548 return (value
& 0x00000fff) | ((value
& 0x0000f000) << 4);
9552 arm_movt_immediate (bfd_vma value
)
9554 return ((value
& 0x0fff0000) >> 16) | ((value
& 0xf0000000) >> 12);
9557 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
9558 the entry lives in .iplt and resolves to (*SYM_VALUE)().
9559 Otherwise, DYNINDX is the index of the symbol in the dynamic
9560 symbol table and SYM_VALUE is undefined.
9562 ROOT_PLT points to the offset of the PLT entry from the start of its
9563 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
9564 bookkeeping information.
9566 Returns FALSE if there was a problem. */
9569 elf32_arm_populate_plt_entry (bfd
*output_bfd
, struct bfd_link_info
*info
,
9570 union gotplt_union
*root_plt
,
9571 struct arm_plt_info
*arm_plt
,
9572 int dynindx
, bfd_vma sym_value
)
9574 struct elf32_arm_link_hash_table
*htab
;
9580 Elf_Internal_Rela rel
;
9581 bfd_vma plt_header_size
;
9582 bfd_vma got_header_size
;
9584 htab
= elf32_arm_hash_table (info
);
9586 /* Pick the appropriate sections and sizes. */
9589 splt
= htab
->root
.iplt
;
9590 sgot
= htab
->root
.igotplt
;
9591 srel
= htab
->root
.irelplt
;
9593 /* There are no reserved entries in .igot.plt, and no special
9594 first entry in .iplt. */
9595 got_header_size
= 0;
9596 plt_header_size
= 0;
9600 splt
= htab
->root
.splt
;
9601 sgot
= htab
->root
.sgotplt
;
9602 srel
= htab
->root
.srelplt
;
9604 got_header_size
= get_elf_backend_data (output_bfd
)->got_header_size
;
9605 plt_header_size
= htab
->plt_header_size
;
9607 BFD_ASSERT (splt
!= NULL
&& srel
!= NULL
);
9609 /* Fill in the entry in the procedure linkage table. */
9610 if (htab
->symbian_p
)
9612 BFD_ASSERT (dynindx
>= 0);
9613 put_arm_insn (htab
, output_bfd
,
9614 elf32_arm_symbian_plt_entry
[0],
9615 splt
->contents
+ root_plt
->offset
);
9616 bfd_put_32 (output_bfd
,
9617 elf32_arm_symbian_plt_entry
[1],
9618 splt
->contents
+ root_plt
->offset
+ 4);
9620 /* Fill in the entry in the .rel.plt section. */
9621 rel
.r_offset
= (splt
->output_section
->vma
9622 + splt
->output_offset
9623 + root_plt
->offset
+ 4);
9624 rel
.r_info
= ELF32_R_INFO (dynindx
, R_ARM_GLOB_DAT
);
9626 /* Get the index in the procedure linkage table which
9627 corresponds to this symbol. This is the index of this symbol
9628 in all the symbols for which we are making plt entries. The
9629 first entry in the procedure linkage table is reserved. */
9630 plt_index
= ((root_plt
->offset
- plt_header_size
)
9631 / htab
->plt_entry_size
);
9635 bfd_vma got_offset
, got_address
, plt_address
;
9636 bfd_vma got_displacement
, initial_got_entry
;
9639 BFD_ASSERT (sgot
!= NULL
);
9641 /* Get the offset into the .(i)got.plt table of the entry that
9642 corresponds to this function. */
9643 got_offset
= (arm_plt
->got_offset
& -2);
9645 /* Get the index in the procedure linkage table which
9646 corresponds to this symbol. This is the index of this symbol
9647 in all the symbols for which we are making plt entries.
9648 After the reserved .got.plt entries, all symbols appear in
9649 the same order as in .plt. */
9651 /* Function descriptor takes 8 bytes. */
9652 plt_index
= (got_offset
- got_header_size
) / 8;
9654 plt_index
= (got_offset
- got_header_size
) / 4;
9656 /* Calculate the address of the GOT entry. */
9657 got_address
= (sgot
->output_section
->vma
9658 + sgot
->output_offset
9661 /* ...and the address of the PLT entry. */
9662 plt_address
= (splt
->output_section
->vma
9663 + splt
->output_offset
9664 + root_plt
->offset
);
9666 ptr
= splt
->contents
+ root_plt
->offset
;
9667 if (htab
->vxworks_p
&& bfd_link_pic (info
))
9672 for (i
= 0; i
!= htab
->plt_entry_size
/ 4; i
++, ptr
+= 4)
9674 val
= elf32_arm_vxworks_shared_plt_entry
[i
];
9676 val
|= got_address
- sgot
->output_section
->vma
;
9678 val
|= plt_index
* RELOC_SIZE (htab
);
9679 if (i
== 2 || i
== 5)
9680 bfd_put_32 (output_bfd
, val
, ptr
);
9682 put_arm_insn (htab
, output_bfd
, val
, ptr
);
9685 else if (htab
->vxworks_p
)
9690 for (i
= 0; i
!= htab
->plt_entry_size
/ 4; i
++, ptr
+= 4)
9692 val
= elf32_arm_vxworks_exec_plt_entry
[i
];
9696 val
|= 0xffffff & -((root_plt
->offset
+ i
* 4 + 8) >> 2);
9698 val
|= plt_index
* RELOC_SIZE (htab
);
9699 if (i
== 2 || i
== 5)
9700 bfd_put_32 (output_bfd
, val
, ptr
);
9702 put_arm_insn (htab
, output_bfd
, val
, ptr
);
9705 loc
= (htab
->srelplt2
->contents
9706 + (plt_index
* 2 + 1) * RELOC_SIZE (htab
));
9708 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
9709 referencing the GOT for this PLT entry. */
9710 rel
.r_offset
= plt_address
+ 8;
9711 rel
.r_info
= ELF32_R_INFO (htab
->root
.hgot
->indx
, R_ARM_ABS32
);
9712 rel
.r_addend
= got_offset
;
9713 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, loc
);
9714 loc
+= RELOC_SIZE (htab
);
9716 /* Create the R_ARM_ABS32 relocation referencing the
9717 beginning of the PLT for this GOT entry. */
9718 rel
.r_offset
= got_address
;
9719 rel
.r_info
= ELF32_R_INFO (htab
->root
.hplt
->indx
, R_ARM_ABS32
);
9721 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, loc
);
9723 else if (htab
->nacl_p
)
9725 /* Calculate the displacement between the PLT slot and the
9726 common tail that's part of the special initial PLT slot. */
9727 int32_t tail_displacement
9728 = ((splt
->output_section
->vma
+ splt
->output_offset
9729 + ARM_NACL_PLT_TAIL_OFFSET
)
9730 - (plt_address
+ htab
->plt_entry_size
+ 4));
9731 BFD_ASSERT ((tail_displacement
& 3) == 0);
9732 tail_displacement
>>= 2;
9734 BFD_ASSERT ((tail_displacement
& 0xff000000) == 0
9735 || (-tail_displacement
& 0xff000000) == 0);
9737 /* Calculate the displacement between the PLT slot and the entry
9738 in the GOT. The offset accounts for the value produced by
9739 adding to pc in the penultimate instruction of the PLT stub. */
9740 got_displacement
= (got_address
9741 - (plt_address
+ htab
->plt_entry_size
));
9743 /* NaCl does not support interworking at all. */
9744 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info
, arm_plt
));
9746 put_arm_insn (htab
, output_bfd
,
9747 elf32_arm_nacl_plt_entry
[0]
9748 | arm_movw_immediate (got_displacement
),
9750 put_arm_insn (htab
, output_bfd
,
9751 elf32_arm_nacl_plt_entry
[1]
9752 | arm_movt_immediate (got_displacement
),
9754 put_arm_insn (htab
, output_bfd
,
9755 elf32_arm_nacl_plt_entry
[2],
9757 put_arm_insn (htab
, output_bfd
,
9758 elf32_arm_nacl_plt_entry
[3]
9759 | (tail_displacement
& 0x00ffffff),
9762 else if (htab
->fdpic_p
)
9764 const bfd_vma
*plt_entry
= using_thumb_only(htab
)
9765 ? elf32_arm_fdpic_thumb_plt_entry
9766 : elf32_arm_fdpic_plt_entry
;
9768 /* Fill-up Thumb stub if needed. */
9769 if (elf32_arm_plt_needs_thumb_stub_p (info
, arm_plt
))
9771 put_thumb_insn (htab
, output_bfd
,
9772 elf32_arm_plt_thumb_stub
[0], ptr
- 4);
9773 put_thumb_insn (htab
, output_bfd
,
9774 elf32_arm_plt_thumb_stub
[1], ptr
- 2);
9776 /* As we are using 32 bit instructions even for the Thumb
9777 version, we have to use 'put_arm_insn' instead of
9778 'put_thumb_insn'. */
9779 put_arm_insn(htab
, output_bfd
, plt_entry
[0], ptr
+ 0);
9780 put_arm_insn(htab
, output_bfd
, plt_entry
[1], ptr
+ 4);
9781 put_arm_insn(htab
, output_bfd
, plt_entry
[2], ptr
+ 8);
9782 put_arm_insn(htab
, output_bfd
, plt_entry
[3], ptr
+ 12);
9783 bfd_put_32 (output_bfd
, got_offset
, ptr
+ 16);
9785 if (!(info
->flags
& DF_BIND_NOW
))
9787 /* funcdesc_value_reloc_offset. */
9788 bfd_put_32 (output_bfd
,
9789 htab
->root
.srelplt
->reloc_count
* RELOC_SIZE (htab
),
9791 put_arm_insn(htab
, output_bfd
, plt_entry
[6], ptr
+ 24);
9792 put_arm_insn(htab
, output_bfd
, plt_entry
[7], ptr
+ 28);
9793 put_arm_insn(htab
, output_bfd
, plt_entry
[8], ptr
+ 32);
9794 put_arm_insn(htab
, output_bfd
, plt_entry
[9], ptr
+ 36);
9797 else if (using_thumb_only (htab
))
9799 /* PR ld/16017: Generate thumb only PLT entries. */
9800 if (!using_thumb2 (htab
))
9802 /* FIXME: We ought to be able to generate thumb-1 PLT
9804 _bfd_error_handler (_("%pB: warning: thumb-1 mode PLT generation not currently supported"),
9809 /* Calculate the displacement between the PLT slot and the entry in
9810 the GOT. The 12-byte offset accounts for the value produced by
9811 adding to pc in the 3rd instruction of the PLT stub. */
9812 got_displacement
= got_address
- (plt_address
+ 12);
9814 /* As we are using 32 bit instructions we have to use 'put_arm_insn'
9815 instead of 'put_thumb_insn'. */
9816 put_arm_insn (htab
, output_bfd
,
9817 elf32_thumb2_plt_entry
[0]
9818 | ((got_displacement
& 0x000000ff) << 16)
9819 | ((got_displacement
& 0x00000700) << 20)
9820 | ((got_displacement
& 0x00000800) >> 1)
9821 | ((got_displacement
& 0x0000f000) >> 12),
9823 put_arm_insn (htab
, output_bfd
,
9824 elf32_thumb2_plt_entry
[1]
9825 | ((got_displacement
& 0x00ff0000) )
9826 | ((got_displacement
& 0x07000000) << 4)
9827 | ((got_displacement
& 0x08000000) >> 17)
9828 | ((got_displacement
& 0xf0000000) >> 28),
9830 put_arm_insn (htab
, output_bfd
,
9831 elf32_thumb2_plt_entry
[2],
9833 put_arm_insn (htab
, output_bfd
,
9834 elf32_thumb2_plt_entry
[3],
9839 /* Calculate the displacement between the PLT slot and the
9840 entry in the GOT. The eight-byte offset accounts for the
9841 value produced by adding to pc in the first instruction
9843 got_displacement
= got_address
- (plt_address
+ 8);
9845 if (elf32_arm_plt_needs_thumb_stub_p (info
, arm_plt
))
9847 put_thumb_insn (htab
, output_bfd
,
9848 elf32_arm_plt_thumb_stub
[0], ptr
- 4);
9849 put_thumb_insn (htab
, output_bfd
,
9850 elf32_arm_plt_thumb_stub
[1], ptr
- 2);
9853 if (!elf32_arm_use_long_plt_entry
)
9855 BFD_ASSERT ((got_displacement
& 0xf0000000) == 0);
9857 put_arm_insn (htab
, output_bfd
,
9858 elf32_arm_plt_entry_short
[0]
9859 | ((got_displacement
& 0x0ff00000) >> 20),
9861 put_arm_insn (htab
, output_bfd
,
9862 elf32_arm_plt_entry_short
[1]
9863 | ((got_displacement
& 0x000ff000) >> 12),
9865 put_arm_insn (htab
, output_bfd
,
9866 elf32_arm_plt_entry_short
[2]
9867 | (got_displacement
& 0x00000fff),
9869 #ifdef FOUR_WORD_PLT
9870 bfd_put_32 (output_bfd
, elf32_arm_plt_entry_short
[3], ptr
+ 12);
9875 put_arm_insn (htab
, output_bfd
,
9876 elf32_arm_plt_entry_long
[0]
9877 | ((got_displacement
& 0xf0000000) >> 28),
9879 put_arm_insn (htab
, output_bfd
,
9880 elf32_arm_plt_entry_long
[1]
9881 | ((got_displacement
& 0x0ff00000) >> 20),
9883 put_arm_insn (htab
, output_bfd
,
9884 elf32_arm_plt_entry_long
[2]
9885 | ((got_displacement
& 0x000ff000) >> 12),
9887 put_arm_insn (htab
, output_bfd
,
9888 elf32_arm_plt_entry_long
[3]
9889 | (got_displacement
& 0x00000fff),
9894 /* Fill in the entry in the .rel(a).(i)plt section. */
9895 rel
.r_offset
= got_address
;
9899 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
9900 The dynamic linker or static executable then calls SYM_VALUE
9901 to determine the correct run-time value of the .igot.plt entry. */
9902 rel
.r_info
= ELF32_R_INFO (0, R_ARM_IRELATIVE
);
9903 initial_got_entry
= sym_value
;
9907 /* For FDPIC we will have to resolve a R_ARM_FUNCDESC_VALUE
9908 used by PLT entry. */
9911 rel
.r_info
= ELF32_R_INFO (dynindx
, R_ARM_FUNCDESC_VALUE
);
9912 initial_got_entry
= 0;
9916 rel
.r_info
= ELF32_R_INFO (dynindx
, R_ARM_JUMP_SLOT
);
9917 initial_got_entry
= (splt
->output_section
->vma
9918 + splt
->output_offset
);
9922 /* Fill in the entry in the global offset table. */
9923 bfd_put_32 (output_bfd
, initial_got_entry
,
9924 sgot
->contents
+ got_offset
);
9926 if (htab
->fdpic_p
&& !(info
->flags
& DF_BIND_NOW
))
9928 /* Setup initial funcdesc value. */
9929 /* FIXME: we don't support lazy binding because there is a
9930 race condition between both words getting written and
9931 some other thread attempting to read them. The ARM
9932 architecture does not have an atomic 64 bit load/store
9933 instruction that could be used to prevent it; it is
9934 recommended that threaded FDPIC applications run with the
9935 LD_BIND_NOW environment variable set. */
9936 bfd_put_32(output_bfd
, plt_address
+ 0x18,
9937 sgot
->contents
+ got_offset
);
9938 bfd_put_32(output_bfd
, -1 /*TODO*/,
9939 sgot
->contents
+ got_offset
+ 4);
9944 elf32_arm_add_dynreloc (output_bfd
, info
, srel
, &rel
);
9949 /* For FDPIC we put PLT relocationss into .rel.got when not
9950 lazy binding otherwise we put them in .rel.plt. For now,
9951 we don't support lazy binding so put it in .rel.got. */
9952 if (info
->flags
& DF_BIND_NOW
)
9953 elf32_arm_add_dynreloc(output_bfd
, info
, htab
->root
.srelgot
, &rel
);
9955 elf32_arm_add_dynreloc(output_bfd
, info
, htab
->root
.srelplt
, &rel
);
9959 loc
= srel
->contents
+ plt_index
* RELOC_SIZE (htab
);
9960 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, loc
);
9967 /* Some relocations map to different relocations depending on the
9968 target. Return the real relocation. */
9971 arm_real_reloc_type (struct elf32_arm_link_hash_table
* globals
,
9977 if (globals
->target1_is_rel
)
9983 return globals
->target2_reloc
;
9990 /* Return the base VMA address which should be subtracted from real addresses
9991 when resolving @dtpoff relocation.
9992 This is PT_TLS segment p_vaddr. */
9995 dtpoff_base (struct bfd_link_info
*info
)
9997 /* If tls_sec is NULL, we should have signalled an error already. */
9998 if (elf_hash_table (info
)->tls_sec
== NULL
)
10000 return elf_hash_table (info
)->tls_sec
->vma
;
10003 /* Return the relocation value for @tpoff relocation
10004 if STT_TLS virtual address is ADDRESS. */
10007 tpoff (struct bfd_link_info
*info
, bfd_vma address
)
10009 struct elf_link_hash_table
*htab
= elf_hash_table (info
);
10012 /* If tls_sec is NULL, we should have signalled an error already. */
10013 if (htab
->tls_sec
== NULL
)
10015 base
= align_power ((bfd_vma
) TCB_SIZE
, htab
->tls_sec
->alignment_power
);
10016 return address
- htab
->tls_sec
->vma
+ base
;
10019 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
10020 VALUE is the relocation value. */
10022 static bfd_reloc_status_type
10023 elf32_arm_abs12_reloc (bfd
*abfd
, void *data
, bfd_vma value
)
10026 return bfd_reloc_overflow
;
10028 value
|= bfd_get_32 (abfd
, data
) & 0xfffff000;
10029 bfd_put_32 (abfd
, value
, data
);
10030 return bfd_reloc_ok
;
10033 /* Handle TLS relaxations. Relaxing is possible for symbols that use
10034 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
10035 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
10037 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
10038 is to then call final_link_relocate. Return other values in the
10041 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
10042 the pre-relaxed code. It would be nice if the relocs were updated
10043 to match the optimization. */
10045 static bfd_reloc_status_type
10046 elf32_arm_tls_relax (struct elf32_arm_link_hash_table
*globals
,
10047 bfd
*input_bfd
, asection
*input_sec
, bfd_byte
*contents
,
10048 Elf_Internal_Rela
*rel
, unsigned long is_local
)
10050 unsigned long insn
;
10052 switch (ELF32_R_TYPE (rel
->r_info
))
10055 return bfd_reloc_notsupported
;
10057 case R_ARM_TLS_GOTDESC
:
10062 insn
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
);
10064 insn
-= 5; /* THUMB */
10066 insn
-= 8; /* ARM */
10068 bfd_put_32 (input_bfd
, insn
, contents
+ rel
->r_offset
);
10069 return bfd_reloc_continue
;
10071 case R_ARM_THM_TLS_DESCSEQ
:
10073 insn
= bfd_get_16 (input_bfd
, contents
+ rel
->r_offset
);
10074 if ((insn
& 0xff78) == 0x4478) /* add rx, pc */
10078 bfd_put_16 (input_bfd
, 0x46c0, contents
+ rel
->r_offset
);
10080 else if ((insn
& 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
10084 bfd_put_16 (input_bfd
, 0x46c0, contents
+ rel
->r_offset
);
10087 bfd_put_16 (input_bfd
, insn
& 0xf83f, contents
+ rel
->r_offset
);
10089 else if ((insn
& 0xff87) == 0x4780) /* blx rx */
10093 bfd_put_16 (input_bfd
, 0x46c0, contents
+ rel
->r_offset
);
10096 bfd_put_16 (input_bfd
, 0x4600 | (insn
& 0x78),
10097 contents
+ rel
->r_offset
);
10101 if ((insn
& 0xf000) == 0xf000 || (insn
& 0xf800) == 0xe800)
10102 /* It's a 32 bit instruction, fetch the rest of it for
10103 error generation. */
10104 insn
= (insn
<< 16)
10105 | bfd_get_16 (input_bfd
, contents
+ rel
->r_offset
+ 2);
10107 /* xgettext:c-format */
10108 (_("%pB(%pA+%#" PRIx64
"): "
10109 "unexpected %s instruction '%#lx' in TLS trampoline"),
10110 input_bfd
, input_sec
, (uint64_t) rel
->r_offset
,
10112 return bfd_reloc_notsupported
;
10116 case R_ARM_TLS_DESCSEQ
:
10118 insn
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
);
10119 if ((insn
& 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
10123 bfd_put_32 (input_bfd
, 0xe1a00000 | (insn
& 0xffff),
10124 contents
+ rel
->r_offset
);
10126 else if ((insn
& 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
10130 bfd_put_32 (input_bfd
, 0xe1a00000, contents
+ rel
->r_offset
);
10133 bfd_put_32 (input_bfd
, insn
& 0xfffff000,
10134 contents
+ rel
->r_offset
);
10136 else if ((insn
& 0xfffffff0) == 0xe12fff30) /* blx rx */
10140 bfd_put_32 (input_bfd
, 0xe1a00000, contents
+ rel
->r_offset
);
10143 bfd_put_32 (input_bfd
, 0xe1a00000 | (insn
& 0xf),
10144 contents
+ rel
->r_offset
);
10149 /* xgettext:c-format */
10150 (_("%pB(%pA+%#" PRIx64
"): "
10151 "unexpected %s instruction '%#lx' in TLS trampoline"),
10152 input_bfd
, input_sec
, (uint64_t) rel
->r_offset
,
10154 return bfd_reloc_notsupported
;
10158 case R_ARM_TLS_CALL
:
10159 /* GD->IE relaxation, turn the instruction into 'nop' or
10160 'ldr r0, [pc,r0]' */
10161 insn
= is_local
? 0xe1a00000 : 0xe79f0000;
10162 bfd_put_32 (input_bfd
, insn
, contents
+ rel
->r_offset
);
10165 case R_ARM_THM_TLS_CALL
:
10166 /* GD->IE relaxation. */
10168 /* add r0,pc; ldr r0, [r0] */
10170 else if (using_thumb2 (globals
))
10177 bfd_put_16 (input_bfd
, insn
>> 16, contents
+ rel
->r_offset
);
10178 bfd_put_16 (input_bfd
, insn
& 0xffff, contents
+ rel
->r_offset
+ 2);
10181 return bfd_reloc_ok
;
10184 /* For a given value of n, calculate the value of G_n as required to
10185 deal with group relocations. We return it in the form of an
10186 encoded constant-and-rotation, together with the final residual. If n is
10187 specified as less than zero, then final_residual is filled with the
10188 input value and no further action is performed. */
10191 calculate_group_reloc_mask (bfd_vma value
, int n
, bfd_vma
*final_residual
)
10195 bfd_vma encoded_g_n
= 0;
10196 bfd_vma residual
= value
; /* Also known as Y_n. */
10198 for (current_n
= 0; current_n
<= n
; current_n
++)
10202 /* Calculate which part of the value to mask. */
10209 /* Determine the most significant bit in the residual and
10210 align the resulting value to a 2-bit boundary. */
10211 for (msb
= 30; msb
>= 0; msb
-= 2)
10212 if (residual
& (3 << msb
))
10215 /* The desired shift is now (msb - 6), or zero, whichever
10222 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
10223 g_n
= residual
& (0xff << shift
);
10224 encoded_g_n
= (g_n
>> shift
)
10225 | ((g_n
<= 0xff ? 0 : (32 - shift
) / 2) << 8);
10227 /* Calculate the residual for the next time around. */
10231 *final_residual
= residual
;
10233 return encoded_g_n
;
10236 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
10237 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
10240 identify_add_or_sub (bfd_vma insn
)
10242 int opcode
= insn
& 0x1e00000;
10244 if (opcode
== 1 << 23) /* ADD */
10247 if (opcode
== 1 << 22) /* SUB */
10253 /* Perform a relocation as part of a final link. */
10255 static bfd_reloc_status_type
10256 elf32_arm_final_link_relocate (reloc_howto_type
* howto
,
10259 asection
* input_section
,
10260 bfd_byte
* contents
,
10261 Elf_Internal_Rela
* rel
,
10263 struct bfd_link_info
* info
,
10264 asection
* sym_sec
,
10265 const char * sym_name
,
10266 unsigned char st_type
,
10267 enum arm_st_branch_type branch_type
,
10268 struct elf_link_hash_entry
* h
,
10269 bfd_boolean
* unresolved_reloc_p
,
10270 char ** error_message
)
10272 unsigned long r_type
= howto
->type
;
10273 unsigned long r_symndx
;
10274 bfd_byte
* hit_data
= contents
+ rel
->r_offset
;
10275 bfd_vma
* local_got_offsets
;
10276 bfd_vma
* local_tlsdesc_gotents
;
10279 asection
* sreloc
= NULL
;
10280 asection
* srelgot
;
10282 bfd_signed_vma signed_addend
;
10283 unsigned char dynreloc_st_type
;
10284 bfd_vma dynreloc_value
;
10285 struct elf32_arm_link_hash_table
* globals
;
10286 struct elf32_arm_link_hash_entry
*eh
;
10287 union gotplt_union
*root_plt
;
10288 struct arm_plt_info
*arm_plt
;
10289 bfd_vma plt_offset
;
10290 bfd_vma gotplt_offset
;
10291 bfd_boolean has_iplt_entry
;
10292 bfd_boolean resolved_to_zero
;
10294 globals
= elf32_arm_hash_table (info
);
10295 if (globals
== NULL
)
10296 return bfd_reloc_notsupported
;
10298 BFD_ASSERT (is_arm_elf (input_bfd
));
10299 BFD_ASSERT (howto
!= NULL
);
10301 /* Some relocation types map to different relocations depending on the
10302 target. We pick the right one here. */
10303 r_type
= arm_real_reloc_type (globals
, r_type
);
10305 /* It is possible to have linker relaxations on some TLS access
10306 models. Update our information here. */
10307 r_type
= elf32_arm_tls_transition (info
, r_type
, h
);
10309 if (r_type
!= howto
->type
)
10310 howto
= elf32_arm_howto_from_type (r_type
);
10312 eh
= (struct elf32_arm_link_hash_entry
*) h
;
10313 sgot
= globals
->root
.sgot
;
10314 local_got_offsets
= elf_local_got_offsets (input_bfd
);
10315 local_tlsdesc_gotents
= elf32_arm_local_tlsdesc_gotent (input_bfd
);
10317 if (globals
->root
.dynamic_sections_created
)
10318 srelgot
= globals
->root
.srelgot
;
10322 r_symndx
= ELF32_R_SYM (rel
->r_info
);
10324 if (globals
->use_rel
)
10326 addend
= bfd_get_32 (input_bfd
, hit_data
) & howto
->src_mask
;
10328 if (addend
& ((howto
->src_mask
+ 1) >> 1))
10330 signed_addend
= -1;
10331 signed_addend
&= ~ howto
->src_mask
;
10332 signed_addend
|= addend
;
10335 signed_addend
= addend
;
10338 addend
= signed_addend
= rel
->r_addend
;
10340 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
10341 are resolving a function call relocation. */
10342 if (using_thumb_only (globals
)
10343 && (r_type
== R_ARM_THM_CALL
10344 || r_type
== R_ARM_THM_JUMP24
)
10345 && branch_type
== ST_BRANCH_TO_ARM
)
10346 branch_type
= ST_BRANCH_TO_THUMB
;
10348 /* Record the symbol information that should be used in dynamic
10350 dynreloc_st_type
= st_type
;
10351 dynreloc_value
= value
;
10352 if (branch_type
== ST_BRANCH_TO_THUMB
)
10353 dynreloc_value
|= 1;
10355 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
10356 VALUE appropriately for relocations that we resolve at link time. */
10357 has_iplt_entry
= FALSE
;
10358 if (elf32_arm_get_plt_info (input_bfd
, globals
, eh
, r_symndx
, &root_plt
,
10360 && root_plt
->offset
!= (bfd_vma
) -1)
10362 plt_offset
= root_plt
->offset
;
10363 gotplt_offset
= arm_plt
->got_offset
;
10365 if (h
== NULL
|| eh
->is_iplt
)
10367 has_iplt_entry
= TRUE
;
10368 splt
= globals
->root
.iplt
;
10370 /* Populate .iplt entries here, because not all of them will
10371 be seen by finish_dynamic_symbol. The lower bit is set if
10372 we have already populated the entry. */
10373 if (plt_offset
& 1)
10377 if (elf32_arm_populate_plt_entry (output_bfd
, info
, root_plt
, arm_plt
,
10378 -1, dynreloc_value
))
10379 root_plt
->offset
|= 1;
10381 return bfd_reloc_notsupported
;
10384 /* Static relocations always resolve to the .iplt entry. */
10385 st_type
= STT_FUNC
;
10386 value
= (splt
->output_section
->vma
10387 + splt
->output_offset
10389 branch_type
= ST_BRANCH_TO_ARM
;
10391 /* If there are non-call relocations that resolve to the .iplt
10392 entry, then all dynamic ones must too. */
10393 if (arm_plt
->noncall_refcount
!= 0)
10395 dynreloc_st_type
= st_type
;
10396 dynreloc_value
= value
;
10400 /* We populate the .plt entry in finish_dynamic_symbol. */
10401 splt
= globals
->root
.splt
;
10406 plt_offset
= (bfd_vma
) -1;
10407 gotplt_offset
= (bfd_vma
) -1;
10410 resolved_to_zero
= (h
!= NULL
10411 && UNDEFWEAK_NO_DYNAMIC_RELOC (info
, h
));
10416 /* We don't need to find a value for this symbol. It's just a
10418 *unresolved_reloc_p
= FALSE
;
10419 return bfd_reloc_ok
;
10422 if (!globals
->vxworks_p
)
10423 return elf32_arm_abs12_reloc (input_bfd
, hit_data
, value
+ addend
);
10424 /* Fall through. */
10428 case R_ARM_ABS32_NOI
:
10430 case R_ARM_REL32_NOI
:
10436 /* Handle relocations which should use the PLT entry. ABS32/REL32
10437 will use the symbol's value, which may point to a PLT entry, but we
10438 don't need to handle that here. If we created a PLT entry, all
10439 branches in this object should go to it, except if the PLT is too
10440 far away, in which case a long branch stub should be inserted. */
10441 if ((r_type
!= R_ARM_ABS32
&& r_type
!= R_ARM_REL32
10442 && r_type
!= R_ARM_ABS32_NOI
&& r_type
!= R_ARM_REL32_NOI
10443 && r_type
!= R_ARM_CALL
10444 && r_type
!= R_ARM_JUMP24
10445 && r_type
!= R_ARM_PLT32
)
10446 && plt_offset
!= (bfd_vma
) -1)
10448 /* If we've created a .plt section, and assigned a PLT entry
10449 to this function, it must either be a STT_GNU_IFUNC reference
10450 or not be known to bind locally. In other cases, we should
10451 have cleared the PLT entry by now. */
10452 BFD_ASSERT (has_iplt_entry
|| !SYMBOL_CALLS_LOCAL (info
, h
));
10454 value
= (splt
->output_section
->vma
10455 + splt
->output_offset
10457 *unresolved_reloc_p
= FALSE
;
10458 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
10459 contents
, rel
->r_offset
, value
,
10463 /* When generating a shared object or relocatable executable, these
10464 relocations are copied into the output file to be resolved at
10466 if ((bfd_link_pic (info
)
10467 || globals
->root
.is_relocatable_executable
10468 || globals
->fdpic_p
)
10469 && (input_section
->flags
& SEC_ALLOC
)
10470 && !(globals
->vxworks_p
10471 && strcmp (input_section
->output_section
->name
,
10473 && ((r_type
!= R_ARM_REL32
&& r_type
!= R_ARM_REL32_NOI
)
10474 || !SYMBOL_CALLS_LOCAL (info
, h
))
10475 && !(input_bfd
== globals
->stub_bfd
10476 && strstr (input_section
->name
, STUB_SUFFIX
))
10478 || (ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
10479 && !resolved_to_zero
)
10480 || h
->root
.type
!= bfd_link_hash_undefweak
)
10481 && r_type
!= R_ARM_PC24
10482 && r_type
!= R_ARM_CALL
10483 && r_type
!= R_ARM_JUMP24
10484 && r_type
!= R_ARM_PREL31
10485 && r_type
!= R_ARM_PLT32
)
10487 Elf_Internal_Rela outrel
;
10488 bfd_boolean skip
, relocate
;
10491 if ((r_type
== R_ARM_REL32
|| r_type
== R_ARM_REL32_NOI
)
10492 && !h
->def_regular
)
10494 char *v
= _("shared object");
10496 if (bfd_link_executable (info
))
10497 v
= _("PIE executable");
10500 (_("%pB: relocation %s against external or undefined symbol `%s'"
10501 " can not be used when making a %s; recompile with -fPIC"), input_bfd
,
10502 elf32_arm_howto_table_1
[r_type
].name
, h
->root
.root
.string
, v
);
10503 return bfd_reloc_notsupported
;
10506 *unresolved_reloc_p
= FALSE
;
10508 if (sreloc
== NULL
&& globals
->root
.dynamic_sections_created
)
10510 sreloc
= _bfd_elf_get_dynamic_reloc_section (input_bfd
, input_section
,
10511 ! globals
->use_rel
);
10513 if (sreloc
== NULL
)
10514 return bfd_reloc_notsupported
;
10520 outrel
.r_addend
= addend
;
10522 _bfd_elf_section_offset (output_bfd
, info
, input_section
,
10524 if (outrel
.r_offset
== (bfd_vma
) -1)
10526 else if (outrel
.r_offset
== (bfd_vma
) -2)
10527 skip
= TRUE
, relocate
= TRUE
;
10528 outrel
.r_offset
+= (input_section
->output_section
->vma
10529 + input_section
->output_offset
);
10532 memset (&outrel
, 0, sizeof outrel
);
10534 && h
->dynindx
!= -1
10535 && (!bfd_link_pic (info
)
10536 || !(bfd_link_pie (info
)
10537 || SYMBOLIC_BIND (info
, h
))
10538 || !h
->def_regular
))
10539 outrel
.r_info
= ELF32_R_INFO (h
->dynindx
, r_type
);
10544 /* This symbol is local, or marked to become local. */
10545 BFD_ASSERT (r_type
== R_ARM_ABS32
|| r_type
== R_ARM_ABS32_NOI
10546 || (globals
->fdpic_p
&& !bfd_link_pic(info
)));
10547 if (globals
->symbian_p
)
10551 /* On Symbian OS, the data segment and text segement
10552 can be relocated independently. Therefore, we
10553 must indicate the segment to which this
10554 relocation is relative. The BPABI allows us to
10555 use any symbol in the right segment; we just use
10556 the section symbol as it is convenient. (We
10557 cannot use the symbol given by "h" directly as it
10558 will not appear in the dynamic symbol table.)
10560 Note that the dynamic linker ignores the section
10561 symbol value, so we don't subtract osec->vma
10562 from the emitted reloc addend. */
10564 osec
= sym_sec
->output_section
;
10566 osec
= input_section
->output_section
;
10567 symbol
= elf_section_data (osec
)->dynindx
;
10570 struct elf_link_hash_table
*htab
= elf_hash_table (info
);
10572 if ((osec
->flags
& SEC_READONLY
) == 0
10573 && htab
->data_index_section
!= NULL
)
10574 osec
= htab
->data_index_section
;
10576 osec
= htab
->text_index_section
;
10577 symbol
= elf_section_data (osec
)->dynindx
;
10579 BFD_ASSERT (symbol
!= 0);
10582 /* On SVR4-ish systems, the dynamic loader cannot
10583 relocate the text and data segments independently,
10584 so the symbol does not matter. */
10586 if (dynreloc_st_type
== STT_GNU_IFUNC
)
10587 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
10588 to the .iplt entry. Instead, every non-call reference
10589 must use an R_ARM_IRELATIVE relocation to obtain the
10590 correct run-time address. */
10591 outrel
.r_info
= ELF32_R_INFO (symbol
, R_ARM_IRELATIVE
);
10592 else if (globals
->fdpic_p
&& !bfd_link_pic(info
))
10595 outrel
.r_info
= ELF32_R_INFO (symbol
, R_ARM_RELATIVE
);
10596 if (globals
->use_rel
)
10599 outrel
.r_addend
+= dynreloc_value
;
10603 arm_elf_add_rofixup(output_bfd
, globals
->srofixup
, outrel
.r_offset
);
10605 elf32_arm_add_dynreloc (output_bfd
, info
, sreloc
, &outrel
);
10607 /* If this reloc is against an external symbol, we do not want to
10608 fiddle with the addend. Otherwise, we need to include the symbol
10609 value so that it becomes an addend for the dynamic reloc. */
10611 return bfd_reloc_ok
;
10613 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
10614 contents
, rel
->r_offset
,
10615 dynreloc_value
, (bfd_vma
) 0);
10617 else switch (r_type
)
10620 return elf32_arm_abs12_reloc (input_bfd
, hit_data
, value
+ addend
);
10622 case R_ARM_XPC25
: /* Arm BLX instruction. */
10625 case R_ARM_PC24
: /* Arm B/BL instruction. */
10628 struct elf32_arm_stub_hash_entry
*stub_entry
= NULL
;
10630 if (r_type
== R_ARM_XPC25
)
10632 /* Check for Arm calling Arm function. */
10633 /* FIXME: Should we translate the instruction into a BL
10634 instruction instead ? */
10635 if (branch_type
!= ST_BRANCH_TO_THUMB
)
10637 (_("\%pB: warning: %s BLX instruction targets"
10638 " %s function '%s'"),
10640 "ARM", h
? h
->root
.root
.string
: "(local)");
10642 else if (r_type
== R_ARM_PC24
)
10644 /* Check for Arm calling Thumb function. */
10645 if (branch_type
== ST_BRANCH_TO_THUMB
)
10647 if (elf32_arm_to_thumb_stub (info
, sym_name
, input_bfd
,
10648 output_bfd
, input_section
,
10649 hit_data
, sym_sec
, rel
->r_offset
,
10650 signed_addend
, value
,
10652 return bfd_reloc_ok
;
10654 return bfd_reloc_dangerous
;
10658 /* Check if a stub has to be inserted because the
10659 destination is too far or we are changing mode. */
10660 if ( r_type
== R_ARM_CALL
10661 || r_type
== R_ARM_JUMP24
10662 || r_type
== R_ARM_PLT32
)
10664 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
10665 struct elf32_arm_link_hash_entry
*hash
;
10667 hash
= (struct elf32_arm_link_hash_entry
*) h
;
10668 stub_type
= arm_type_of_stub (info
, input_section
, rel
,
10669 st_type
, &branch_type
,
10670 hash
, value
, sym_sec
,
10671 input_bfd
, sym_name
);
10673 if (stub_type
!= arm_stub_none
)
10675 /* The target is out of reach, so redirect the
10676 branch to the local stub for this function. */
10677 stub_entry
= elf32_arm_get_stub_entry (input_section
,
10682 if (stub_entry
!= NULL
)
10683 value
= (stub_entry
->stub_offset
10684 + stub_entry
->stub_sec
->output_offset
10685 + stub_entry
->stub_sec
->output_section
->vma
);
10687 if (plt_offset
!= (bfd_vma
) -1)
10688 *unresolved_reloc_p
= FALSE
;
10693 /* If the call goes through a PLT entry, make sure to
10694 check distance to the right destination address. */
10695 if (plt_offset
!= (bfd_vma
) -1)
10697 value
= (splt
->output_section
->vma
10698 + splt
->output_offset
10700 *unresolved_reloc_p
= FALSE
;
10701 /* The PLT entry is in ARM mode, regardless of the
10702 target function. */
10703 branch_type
= ST_BRANCH_TO_ARM
;
10708 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
10710 S is the address of the symbol in the relocation.
10711 P is address of the instruction being relocated.
10712 A is the addend (extracted from the instruction) in bytes.
10714 S is held in 'value'.
10715 P is the base address of the section containing the
10716 instruction plus the offset of the reloc into that
10718 (input_section->output_section->vma +
10719 input_section->output_offset +
10721 A is the addend, converted into bytes, ie:
10722 (signed_addend * 4)
10724 Note: None of these operations have knowledge of the pipeline
10725 size of the processor, thus it is up to the assembler to
10726 encode this information into the addend. */
10727 value
-= (input_section
->output_section
->vma
10728 + input_section
->output_offset
);
10729 value
-= rel
->r_offset
;
10730 if (globals
->use_rel
)
10731 value
+= (signed_addend
<< howto
->size
);
10733 /* RELA addends do not have to be adjusted by howto->size. */
10734 value
+= signed_addend
;
10736 signed_addend
= value
;
10737 signed_addend
>>= howto
->rightshift
;
10739 /* A branch to an undefined weak symbol is turned into a jump to
10740 the next instruction unless a PLT entry will be created.
10741 Do the same for local undefined symbols (but not for STN_UNDEF).
10742 The jump to the next instruction is optimized as a NOP depending
10743 on the architecture. */
10744 if (h
? (h
->root
.type
== bfd_link_hash_undefweak
10745 && plt_offset
== (bfd_vma
) -1)
10746 : r_symndx
!= STN_UNDEF
&& bfd_is_und_section (sym_sec
))
10748 value
= (bfd_get_32 (input_bfd
, hit_data
) & 0xf0000000);
10750 if (arch_has_arm_nop (globals
))
10751 value
|= 0x0320f000;
10753 value
|= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
10757 /* Perform a signed range check. */
10758 if ( signed_addend
> ((bfd_signed_vma
) (howto
->dst_mask
>> 1))
10759 || signed_addend
< - ((bfd_signed_vma
) ((howto
->dst_mask
+ 1) >> 1)))
10760 return bfd_reloc_overflow
;
10762 addend
= (value
& 2);
10764 value
= (signed_addend
& howto
->dst_mask
)
10765 | (bfd_get_32 (input_bfd
, hit_data
) & (~ howto
->dst_mask
));
10767 if (r_type
== R_ARM_CALL
)
10769 /* Set the H bit in the BLX instruction. */
10770 if (branch_type
== ST_BRANCH_TO_THUMB
)
10773 value
|= (1 << 24);
10775 value
&= ~(bfd_vma
)(1 << 24);
10778 /* Select the correct instruction (BL or BLX). */
10779 /* Only if we are not handling a BL to a stub. In this
10780 case, mode switching is performed by the stub. */
10781 if (branch_type
== ST_BRANCH_TO_THUMB
&& !stub_entry
)
10782 value
|= (1 << 28);
10783 else if (stub_entry
|| branch_type
!= ST_BRANCH_UNKNOWN
)
10785 value
&= ~(bfd_vma
)(1 << 28);
10786 value
|= (1 << 24);
10795 if (branch_type
== ST_BRANCH_TO_THUMB
)
10799 case R_ARM_ABS32_NOI
:
10805 if (branch_type
== ST_BRANCH_TO_THUMB
)
10807 value
-= (input_section
->output_section
->vma
10808 + input_section
->output_offset
+ rel
->r_offset
);
10811 case R_ARM_REL32_NOI
:
10813 value
-= (input_section
->output_section
->vma
10814 + input_section
->output_offset
+ rel
->r_offset
);
10818 value
-= (input_section
->output_section
->vma
10819 + input_section
->output_offset
+ rel
->r_offset
);
10820 value
+= signed_addend
;
10821 if (! h
|| h
->root
.type
!= bfd_link_hash_undefweak
)
10823 /* Check for overflow. */
10824 if ((value
^ (value
>> 1)) & (1 << 30))
10825 return bfd_reloc_overflow
;
10827 value
&= 0x7fffffff;
10828 value
|= (bfd_get_32 (input_bfd
, hit_data
) & 0x80000000);
10829 if (branch_type
== ST_BRANCH_TO_THUMB
)
10834 bfd_put_32 (input_bfd
, value
, hit_data
);
10835 return bfd_reloc_ok
;
10838 /* PR 16202: Refectch the addend using the correct size. */
10839 if (globals
->use_rel
)
10840 addend
= bfd_get_8 (input_bfd
, hit_data
);
10843 /* There is no way to tell whether the user intended to use a signed or
10844 unsigned addend. When checking for overflow we accept either,
10845 as specified by the AAELF. */
10846 if ((long) value
> 0xff || (long) value
< -0x80)
10847 return bfd_reloc_overflow
;
10849 bfd_put_8 (input_bfd
, value
, hit_data
);
10850 return bfd_reloc_ok
;
10853 /* PR 16202: Refectch the addend using the correct size. */
10854 if (globals
->use_rel
)
10855 addend
= bfd_get_16 (input_bfd
, hit_data
);
10858 /* See comment for R_ARM_ABS8. */
10859 if ((long) value
> 0xffff || (long) value
< -0x8000)
10860 return bfd_reloc_overflow
;
10862 bfd_put_16 (input_bfd
, value
, hit_data
);
10863 return bfd_reloc_ok
;
10865 case R_ARM_THM_ABS5
:
10866 /* Support ldr and str instructions for the thumb. */
10867 if (globals
->use_rel
)
10869 /* Need to refetch addend. */
10870 addend
= bfd_get_16 (input_bfd
, hit_data
) & howto
->src_mask
;
10871 /* ??? Need to determine shift amount from operand size. */
10872 addend
>>= howto
->rightshift
;
10876 /* ??? Isn't value unsigned? */
10877 if ((long) value
> 0x1f || (long) value
< -0x10)
10878 return bfd_reloc_overflow
;
10880 /* ??? Value needs to be properly shifted into place first. */
10881 value
|= bfd_get_16 (input_bfd
, hit_data
) & 0xf83f;
10882 bfd_put_16 (input_bfd
, value
, hit_data
);
10883 return bfd_reloc_ok
;
10885 case R_ARM_THM_ALU_PREL_11_0
:
10886 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
10889 bfd_signed_vma relocation
;
10891 insn
= (bfd_get_16 (input_bfd
, hit_data
) << 16)
10892 | bfd_get_16 (input_bfd
, hit_data
+ 2);
10894 if (globals
->use_rel
)
10896 signed_addend
= (insn
& 0xff) | ((insn
& 0x7000) >> 4)
10897 | ((insn
& (1 << 26)) >> 15);
10898 if (insn
& 0xf00000)
10899 signed_addend
= -signed_addend
;
10902 relocation
= value
+ signed_addend
;
10903 relocation
-= Pa (input_section
->output_section
->vma
10904 + input_section
->output_offset
10907 /* PR 21523: Use an absolute value. The user of this reloc will
10908 have already selected an ADD or SUB insn appropriately. */
10909 value
= llabs (relocation
);
10911 if (value
>= 0x1000)
10912 return bfd_reloc_overflow
;
10914 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
10915 if (branch_type
== ST_BRANCH_TO_THUMB
)
10918 insn
= (insn
& 0xfb0f8f00) | (value
& 0xff)
10919 | ((value
& 0x700) << 4)
10920 | ((value
& 0x800) << 15);
10921 if (relocation
< 0)
10924 bfd_put_16 (input_bfd
, insn
>> 16, hit_data
);
10925 bfd_put_16 (input_bfd
, insn
& 0xffff, hit_data
+ 2);
10927 return bfd_reloc_ok
;
10930 case R_ARM_THM_PC8
:
10931 /* PR 10073: This reloc is not generated by the GNU toolchain,
10932 but it is supported for compatibility with third party libraries
10933 generated by other compilers, specifically the ARM/IAR. */
10936 bfd_signed_vma relocation
;
10938 insn
= bfd_get_16 (input_bfd
, hit_data
);
10940 if (globals
->use_rel
)
10941 addend
= ((((insn
& 0x00ff) << 2) + 4) & 0x3ff) -4;
10943 relocation
= value
+ addend
;
10944 relocation
-= Pa (input_section
->output_section
->vma
10945 + input_section
->output_offset
10948 value
= relocation
;
10950 /* We do not check for overflow of this reloc. Although strictly
10951 speaking this is incorrect, it appears to be necessary in order
10952 to work with IAR generated relocs. Since GCC and GAS do not
10953 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
10954 a problem for them. */
10957 insn
= (insn
& 0xff00) | (value
>> 2);
10959 bfd_put_16 (input_bfd
, insn
, hit_data
);
10961 return bfd_reloc_ok
;
10964 case R_ARM_THM_PC12
:
10965 /* Corresponds to: ldr.w reg, [pc, #offset]. */
10968 bfd_signed_vma relocation
;
10970 insn
= (bfd_get_16 (input_bfd
, hit_data
) << 16)
10971 | bfd_get_16 (input_bfd
, hit_data
+ 2);
10973 if (globals
->use_rel
)
10975 signed_addend
= insn
& 0xfff;
10976 if (!(insn
& (1 << 23)))
10977 signed_addend
= -signed_addend
;
10980 relocation
= value
+ signed_addend
;
10981 relocation
-= Pa (input_section
->output_section
->vma
10982 + input_section
->output_offset
10985 value
= relocation
;
10987 if (value
>= 0x1000)
10988 return bfd_reloc_overflow
;
10990 insn
= (insn
& 0xff7ff000) | value
;
10991 if (relocation
>= 0)
10994 bfd_put_16 (input_bfd
, insn
>> 16, hit_data
);
10995 bfd_put_16 (input_bfd
, insn
& 0xffff, hit_data
+ 2);
10997 return bfd_reloc_ok
;
11000 case R_ARM_THM_XPC22
:
11001 case R_ARM_THM_CALL
:
11002 case R_ARM_THM_JUMP24
:
11003 /* Thumb BL (branch long instruction). */
11005 bfd_vma relocation
;
11006 bfd_vma reloc_sign
;
11007 bfd_boolean overflow
= FALSE
;
11008 bfd_vma upper_insn
= bfd_get_16 (input_bfd
, hit_data
);
11009 bfd_vma lower_insn
= bfd_get_16 (input_bfd
, hit_data
+ 2);
11010 bfd_signed_vma reloc_signed_max
;
11011 bfd_signed_vma reloc_signed_min
;
11013 bfd_signed_vma signed_check
;
11015 const int thumb2
= using_thumb2 (globals
);
11016 const int thumb2_bl
= using_thumb2_bl (globals
);
11018 /* A branch to an undefined weak symbol is turned into a jump to
11019 the next instruction unless a PLT entry will be created.
11020 The jump to the next instruction is optimized as a NOP.W for
11021 Thumb-2 enabled architectures. */
11022 if (h
&& h
->root
.type
== bfd_link_hash_undefweak
11023 && plt_offset
== (bfd_vma
) -1)
11027 bfd_put_16 (input_bfd
, 0xf3af, hit_data
);
11028 bfd_put_16 (input_bfd
, 0x8000, hit_data
+ 2);
11032 bfd_put_16 (input_bfd
, 0xe000, hit_data
);
11033 bfd_put_16 (input_bfd
, 0xbf00, hit_data
+ 2);
11035 return bfd_reloc_ok
;
11038 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
11039 with Thumb-1) involving the J1 and J2 bits. */
11040 if (globals
->use_rel
)
11042 bfd_vma s
= (upper_insn
& (1 << 10)) >> 10;
11043 bfd_vma upper
= upper_insn
& 0x3ff;
11044 bfd_vma lower
= lower_insn
& 0x7ff;
11045 bfd_vma j1
= (lower_insn
& (1 << 13)) >> 13;
11046 bfd_vma j2
= (lower_insn
& (1 << 11)) >> 11;
11047 bfd_vma i1
= j1
^ s
? 0 : 1;
11048 bfd_vma i2
= j2
^ s
? 0 : 1;
11050 addend
= (i1
<< 23) | (i2
<< 22) | (upper
<< 12) | (lower
<< 1);
11052 addend
= (addend
| ((s
? 0 : 1) << 24)) - (1 << 24);
11054 signed_addend
= addend
;
11057 if (r_type
== R_ARM_THM_XPC22
)
11059 /* Check for Thumb to Thumb call. */
11060 /* FIXME: Should we translate the instruction into a BL
11061 instruction instead ? */
11062 if (branch_type
== ST_BRANCH_TO_THUMB
)
11064 (_("%pB: warning: %s BLX instruction targets"
11065 " %s function '%s'"),
11066 input_bfd
, "Thumb",
11067 "Thumb", h
? h
->root
.root
.string
: "(local)");
11071 /* If it is not a call to Thumb, assume call to Arm.
11072 If it is a call relative to a section name, then it is not a
11073 function call at all, but rather a long jump. Calls through
11074 the PLT do not require stubs. */
11075 if (branch_type
== ST_BRANCH_TO_ARM
&& plt_offset
== (bfd_vma
) -1)
11077 if (globals
->use_blx
&& r_type
== R_ARM_THM_CALL
)
11079 /* Convert BL to BLX. */
11080 lower_insn
= (lower_insn
& ~0x1000) | 0x0800;
11082 else if (( r_type
!= R_ARM_THM_CALL
)
11083 && (r_type
!= R_ARM_THM_JUMP24
))
11085 if (elf32_thumb_to_arm_stub
11086 (info
, sym_name
, input_bfd
, output_bfd
, input_section
,
11087 hit_data
, sym_sec
, rel
->r_offset
, signed_addend
, value
,
11089 return bfd_reloc_ok
;
11091 return bfd_reloc_dangerous
;
11094 else if (branch_type
== ST_BRANCH_TO_THUMB
11095 && globals
->use_blx
11096 && r_type
== R_ARM_THM_CALL
)
11098 /* Make sure this is a BL. */
11099 lower_insn
|= 0x1800;
11103 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
11104 if (r_type
== R_ARM_THM_CALL
|| r_type
== R_ARM_THM_JUMP24
)
11106 /* Check if a stub has to be inserted because the destination
11108 struct elf32_arm_stub_hash_entry
*stub_entry
;
11109 struct elf32_arm_link_hash_entry
*hash
;
11111 hash
= (struct elf32_arm_link_hash_entry
*) h
;
11113 stub_type
= arm_type_of_stub (info
, input_section
, rel
,
11114 st_type
, &branch_type
,
11115 hash
, value
, sym_sec
,
11116 input_bfd
, sym_name
);
11118 if (stub_type
!= arm_stub_none
)
11120 /* The target is out of reach or we are changing modes, so
11121 redirect the branch to the local stub for this
11123 stub_entry
= elf32_arm_get_stub_entry (input_section
,
11127 if (stub_entry
!= NULL
)
11129 value
= (stub_entry
->stub_offset
11130 + stub_entry
->stub_sec
->output_offset
11131 + stub_entry
->stub_sec
->output_section
->vma
);
11133 if (plt_offset
!= (bfd_vma
) -1)
11134 *unresolved_reloc_p
= FALSE
;
11137 /* If this call becomes a call to Arm, force BLX. */
11138 if (globals
->use_blx
&& (r_type
== R_ARM_THM_CALL
))
11141 && !arm_stub_is_thumb (stub_entry
->stub_type
))
11142 || branch_type
!= ST_BRANCH_TO_THUMB
)
11143 lower_insn
= (lower_insn
& ~0x1000) | 0x0800;
11148 /* Handle calls via the PLT. */
11149 if (stub_type
== arm_stub_none
&& plt_offset
!= (bfd_vma
) -1)
11151 value
= (splt
->output_section
->vma
11152 + splt
->output_offset
11155 if (globals
->use_blx
11156 && r_type
== R_ARM_THM_CALL
11157 && ! using_thumb_only (globals
))
11159 /* If the Thumb BLX instruction is available, convert
11160 the BL to a BLX instruction to call the ARM-mode
11162 lower_insn
= (lower_insn
& ~0x1000) | 0x0800;
11163 branch_type
= ST_BRANCH_TO_ARM
;
11167 if (! using_thumb_only (globals
))
11168 /* Target the Thumb stub before the ARM PLT entry. */
11169 value
-= PLT_THUMB_STUB_SIZE
;
11170 branch_type
= ST_BRANCH_TO_THUMB
;
11172 *unresolved_reloc_p
= FALSE
;
11175 relocation
= value
+ signed_addend
;
11177 relocation
-= (input_section
->output_section
->vma
11178 + input_section
->output_offset
11181 check
= relocation
>> howto
->rightshift
;
11183 /* If this is a signed value, the rightshift just dropped
11184 leading 1 bits (assuming twos complement). */
11185 if ((bfd_signed_vma
) relocation
>= 0)
11186 signed_check
= check
;
11188 signed_check
= check
| ~((bfd_vma
) -1 >> howto
->rightshift
);
11190 /* Calculate the permissable maximum and minimum values for
11191 this relocation according to whether we're relocating for
11193 bitsize
= howto
->bitsize
;
11196 reloc_signed_max
= (1 << (bitsize
- 1)) - 1;
11197 reloc_signed_min
= ~reloc_signed_max
;
11199 /* Assumes two's complement. */
11200 if (signed_check
> reloc_signed_max
|| signed_check
< reloc_signed_min
)
11203 if ((lower_insn
& 0x5000) == 0x4000)
11204 /* For a BLX instruction, make sure that the relocation is rounded up
11205 to a word boundary. This follows the semantics of the instruction
11206 which specifies that bit 1 of the target address will come from bit
11207 1 of the base address. */
11208 relocation
= (relocation
+ 2) & ~ 3;
11210 /* Put RELOCATION back into the insn. Assumes two's complement.
11211 We use the Thumb-2 encoding, which is safe even if dealing with
11212 a Thumb-1 instruction by virtue of our overflow check above. */
11213 reloc_sign
= (signed_check
< 0) ? 1 : 0;
11214 upper_insn
= (upper_insn
& ~(bfd_vma
) 0x7ff)
11215 | ((relocation
>> 12) & 0x3ff)
11216 | (reloc_sign
<< 10);
11217 lower_insn
= (lower_insn
& ~(bfd_vma
) 0x2fff)
11218 | (((!((relocation
>> 23) & 1)) ^ reloc_sign
) << 13)
11219 | (((!((relocation
>> 22) & 1)) ^ reloc_sign
) << 11)
11220 | ((relocation
>> 1) & 0x7ff);
11222 /* Put the relocated value back in the object file: */
11223 bfd_put_16 (input_bfd
, upper_insn
, hit_data
);
11224 bfd_put_16 (input_bfd
, lower_insn
, hit_data
+ 2);
11226 return (overflow
? bfd_reloc_overflow
: bfd_reloc_ok
);
11230 case R_ARM_THM_JUMP19
:
11231 /* Thumb32 conditional branch instruction. */
11233 bfd_vma relocation
;
11234 bfd_boolean overflow
= FALSE
;
11235 bfd_vma upper_insn
= bfd_get_16 (input_bfd
, hit_data
);
11236 bfd_vma lower_insn
= bfd_get_16 (input_bfd
, hit_data
+ 2);
11237 bfd_signed_vma reloc_signed_max
= 0xffffe;
11238 bfd_signed_vma reloc_signed_min
= -0x100000;
11239 bfd_signed_vma signed_check
;
11240 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
11241 struct elf32_arm_stub_hash_entry
*stub_entry
;
11242 struct elf32_arm_link_hash_entry
*hash
;
11244 /* Need to refetch the addend, reconstruct the top three bits,
11245 and squish the two 11 bit pieces together. */
11246 if (globals
->use_rel
)
11248 bfd_vma S
= (upper_insn
& 0x0400) >> 10;
11249 bfd_vma upper
= (upper_insn
& 0x003f);
11250 bfd_vma J1
= (lower_insn
& 0x2000) >> 13;
11251 bfd_vma J2
= (lower_insn
& 0x0800) >> 11;
11252 bfd_vma lower
= (lower_insn
& 0x07ff);
11256 upper
|= (!S
) << 8;
11257 upper
-= 0x0100; /* Sign extend. */
11259 addend
= (upper
<< 12) | (lower
<< 1);
11260 signed_addend
= addend
;
11263 /* Handle calls via the PLT. */
11264 if (plt_offset
!= (bfd_vma
) -1)
11266 value
= (splt
->output_section
->vma
11267 + splt
->output_offset
11269 /* Target the Thumb stub before the ARM PLT entry. */
11270 value
-= PLT_THUMB_STUB_SIZE
;
11271 *unresolved_reloc_p
= FALSE
;
11274 hash
= (struct elf32_arm_link_hash_entry
*)h
;
11276 stub_type
= arm_type_of_stub (info
, input_section
, rel
,
11277 st_type
, &branch_type
,
11278 hash
, value
, sym_sec
,
11279 input_bfd
, sym_name
);
11280 if (stub_type
!= arm_stub_none
)
11282 stub_entry
= elf32_arm_get_stub_entry (input_section
,
11286 if (stub_entry
!= NULL
)
11288 value
= (stub_entry
->stub_offset
11289 + stub_entry
->stub_sec
->output_offset
11290 + stub_entry
->stub_sec
->output_section
->vma
);
11294 relocation
= value
+ signed_addend
;
11295 relocation
-= (input_section
->output_section
->vma
11296 + input_section
->output_offset
11298 signed_check
= (bfd_signed_vma
) relocation
;
11300 if (signed_check
> reloc_signed_max
|| signed_check
< reloc_signed_min
)
11303 /* Put RELOCATION back into the insn. */
11305 bfd_vma S
= (relocation
& 0x00100000) >> 20;
11306 bfd_vma J2
= (relocation
& 0x00080000) >> 19;
11307 bfd_vma J1
= (relocation
& 0x00040000) >> 18;
11308 bfd_vma hi
= (relocation
& 0x0003f000) >> 12;
11309 bfd_vma lo
= (relocation
& 0x00000ffe) >> 1;
11311 upper_insn
= (upper_insn
& 0xfbc0) | (S
<< 10) | hi
;
11312 lower_insn
= (lower_insn
& 0xd000) | (J1
<< 13) | (J2
<< 11) | lo
;
11315 /* Put the relocated value back in the object file: */
11316 bfd_put_16 (input_bfd
, upper_insn
, hit_data
);
11317 bfd_put_16 (input_bfd
, lower_insn
, hit_data
+ 2);
11319 return (overflow
? bfd_reloc_overflow
: bfd_reloc_ok
);
11322 case R_ARM_THM_JUMP11
:
11323 case R_ARM_THM_JUMP8
:
11324 case R_ARM_THM_JUMP6
:
11325 /* Thumb B (branch) instruction). */
11327 bfd_signed_vma relocation
;
11328 bfd_signed_vma reloc_signed_max
= (1 << (howto
->bitsize
- 1)) - 1;
11329 bfd_signed_vma reloc_signed_min
= ~ reloc_signed_max
;
11330 bfd_signed_vma signed_check
;
11332 /* CZB cannot jump backward. */
11333 if (r_type
== R_ARM_THM_JUMP6
)
11334 reloc_signed_min
= 0;
11336 if (globals
->use_rel
)
11338 /* Need to refetch addend. */
11339 addend
= bfd_get_16 (input_bfd
, hit_data
) & howto
->src_mask
;
11340 if (addend
& ((howto
->src_mask
+ 1) >> 1))
11342 signed_addend
= -1;
11343 signed_addend
&= ~ howto
->src_mask
;
11344 signed_addend
|= addend
;
11347 signed_addend
= addend
;
11348 /* The value in the insn has been right shifted. We need to
11349 undo this, so that we can perform the address calculation
11350 in terms of bytes. */
11351 signed_addend
<<= howto
->rightshift
;
11353 relocation
= value
+ signed_addend
;
11355 relocation
-= (input_section
->output_section
->vma
11356 + input_section
->output_offset
11359 relocation
>>= howto
->rightshift
;
11360 signed_check
= relocation
;
11362 if (r_type
== R_ARM_THM_JUMP6
)
11363 relocation
= ((relocation
& 0x0020) << 4) | ((relocation
& 0x001f) << 3);
11365 relocation
&= howto
->dst_mask
;
11366 relocation
|= (bfd_get_16 (input_bfd
, hit_data
) & (~ howto
->dst_mask
));
11368 bfd_put_16 (input_bfd
, relocation
, hit_data
);
11370 /* Assumes two's complement. */
11371 if (signed_check
> reloc_signed_max
|| signed_check
< reloc_signed_min
)
11372 return bfd_reloc_overflow
;
11374 return bfd_reloc_ok
;
11377 case R_ARM_ALU_PCREL7_0
:
11378 case R_ARM_ALU_PCREL15_8
:
11379 case R_ARM_ALU_PCREL23_15
:
11382 bfd_vma relocation
;
11384 insn
= bfd_get_32 (input_bfd
, hit_data
);
11385 if (globals
->use_rel
)
11387 /* Extract the addend. */
11388 addend
= (insn
& 0xff) << ((insn
& 0xf00) >> 7);
11389 signed_addend
= addend
;
11391 relocation
= value
+ signed_addend
;
11393 relocation
-= (input_section
->output_section
->vma
11394 + input_section
->output_offset
11396 insn
= (insn
& ~0xfff)
11397 | ((howto
->bitpos
<< 7) & 0xf00)
11398 | ((relocation
>> howto
->bitpos
) & 0xff);
11399 bfd_put_32 (input_bfd
, value
, hit_data
);
11401 return bfd_reloc_ok
;
11403 case R_ARM_GNU_VTINHERIT
:
11404 case R_ARM_GNU_VTENTRY
:
11405 return bfd_reloc_ok
;
11407 case R_ARM_GOTOFF32
:
11408 /* Relocation is relative to the start of the
11409 global offset table. */
11411 BFD_ASSERT (sgot
!= NULL
);
11413 return bfd_reloc_notsupported
;
11415 /* If we are addressing a Thumb function, we need to adjust the
11416 address by one, so that attempts to call the function pointer will
11417 correctly interpret it as Thumb code. */
11418 if (branch_type
== ST_BRANCH_TO_THUMB
)
11421 /* Note that sgot->output_offset is not involved in this
11422 calculation. We always want the start of .got. If we
11423 define _GLOBAL_OFFSET_TABLE in a different way, as is
11424 permitted by the ABI, we might have to change this
11426 value
-= sgot
->output_section
->vma
;
11427 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
11428 contents
, rel
->r_offset
, value
,
11432 /* Use global offset table as symbol value. */
11433 BFD_ASSERT (sgot
!= NULL
);
11436 return bfd_reloc_notsupported
;
11438 *unresolved_reloc_p
= FALSE
;
11439 value
= sgot
->output_section
->vma
;
11440 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
11441 contents
, rel
->r_offset
, value
,
11445 case R_ARM_GOT_PREL
:
11446 /* Relocation is to the entry for this symbol in the
11447 global offset table. */
11449 return bfd_reloc_notsupported
;
11451 if (dynreloc_st_type
== STT_GNU_IFUNC
11452 && plt_offset
!= (bfd_vma
) -1
11453 && (h
== NULL
|| SYMBOL_REFERENCES_LOCAL (info
, h
)))
11455 /* We have a relocation against a locally-binding STT_GNU_IFUNC
11456 symbol, and the relocation resolves directly to the runtime
11457 target rather than to the .iplt entry. This means that any
11458 .got entry would be the same value as the .igot.plt entry,
11459 so there's no point creating both. */
11460 sgot
= globals
->root
.igotplt
;
11461 value
= sgot
->output_offset
+ gotplt_offset
;
11463 else if (h
!= NULL
)
11467 off
= h
->got
.offset
;
11468 BFD_ASSERT (off
!= (bfd_vma
) -1);
11469 if ((off
& 1) != 0)
11471 /* We have already processsed one GOT relocation against
11474 if (globals
->root
.dynamic_sections_created
11475 && !SYMBOL_REFERENCES_LOCAL (info
, h
))
11476 *unresolved_reloc_p
= FALSE
;
11480 Elf_Internal_Rela outrel
;
11483 if (((h
->dynindx
!= -1) || globals
->fdpic_p
)
11484 && !SYMBOL_REFERENCES_LOCAL (info
, h
))
11486 /* If the symbol doesn't resolve locally in a static
11487 object, we have an undefined reference. If the
11488 symbol doesn't resolve locally in a dynamic object,
11489 it should be resolved by the dynamic linker. */
11490 if (globals
->root
.dynamic_sections_created
)
11492 outrel
.r_info
= ELF32_R_INFO (h
->dynindx
, R_ARM_GLOB_DAT
);
11493 *unresolved_reloc_p
= FALSE
;
11497 outrel
.r_addend
= 0;
11501 if (dynreloc_st_type
== STT_GNU_IFUNC
)
11502 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_IRELATIVE
);
11503 else if (bfd_link_pic (info
)
11504 && (ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
11505 || h
->root
.type
!= bfd_link_hash_undefweak
))
11506 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_RELATIVE
);
11510 if (globals
->fdpic_p
)
11513 outrel
.r_addend
= dynreloc_value
;
11516 /* The GOT entry is initialized to zero by default.
11517 See if we should install a different value. */
11518 if (outrel
.r_addend
!= 0
11519 && (globals
->use_rel
|| outrel
.r_info
== 0))
11521 bfd_put_32 (output_bfd
, outrel
.r_addend
,
11522 sgot
->contents
+ off
);
11523 outrel
.r_addend
= 0;
11527 arm_elf_add_rofixup (output_bfd
,
11528 elf32_arm_hash_table(info
)->srofixup
,
11529 sgot
->output_section
->vma
11530 + sgot
->output_offset
+ off
);
11532 else if (outrel
.r_info
!= 0)
11534 outrel
.r_offset
= (sgot
->output_section
->vma
11535 + sgot
->output_offset
11537 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
11540 h
->got
.offset
|= 1;
11542 value
= sgot
->output_offset
+ off
;
11548 BFD_ASSERT (local_got_offsets
!= NULL
11549 && local_got_offsets
[r_symndx
] != (bfd_vma
) -1);
11551 off
= local_got_offsets
[r_symndx
];
11553 /* The offset must always be a multiple of 4. We use the
11554 least significant bit to record whether we have already
11555 generated the necessary reloc. */
11556 if ((off
& 1) != 0)
11560 Elf_Internal_Rela outrel
;
11563 if (dynreloc_st_type
== STT_GNU_IFUNC
)
11564 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_IRELATIVE
);
11565 else if (bfd_link_pic (info
))
11566 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_RELATIVE
);
11570 if (globals
->fdpic_p
)
11574 /* The GOT entry is initialized to zero by default.
11575 See if we should install a different value. */
11576 if (globals
->use_rel
|| outrel
.r_info
== 0)
11577 bfd_put_32 (output_bfd
, dynreloc_value
, sgot
->contents
+ off
);
11580 arm_elf_add_rofixup (output_bfd
,
11582 sgot
->output_section
->vma
11583 + sgot
->output_offset
+ off
);
11585 else if (outrel
.r_info
!= 0)
11587 outrel
.r_addend
= addend
+ dynreloc_value
;
11588 outrel
.r_offset
= (sgot
->output_section
->vma
11589 + sgot
->output_offset
11591 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
11594 local_got_offsets
[r_symndx
] |= 1;
11597 value
= sgot
->output_offset
+ off
;
11599 if (r_type
!= R_ARM_GOT32
)
11600 value
+= sgot
->output_section
->vma
;
11602 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
11603 contents
, rel
->r_offset
, value
,
11606 case R_ARM_TLS_LDO32
:
11607 value
= value
- dtpoff_base (info
);
11609 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
11610 contents
, rel
->r_offset
, value
,
11613 case R_ARM_TLS_LDM32
:
11614 case R_ARM_TLS_LDM32_FDPIC
:
11621 off
= globals
->tls_ldm_got
.offset
;
11623 if ((off
& 1) != 0)
11627 /* If we don't know the module number, create a relocation
11629 if (bfd_link_pic (info
))
11631 Elf_Internal_Rela outrel
;
11633 if (srelgot
== NULL
)
11636 outrel
.r_addend
= 0;
11637 outrel
.r_offset
= (sgot
->output_section
->vma
11638 + sgot
->output_offset
+ off
);
11639 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32
);
11641 if (globals
->use_rel
)
11642 bfd_put_32 (output_bfd
, outrel
.r_addend
,
11643 sgot
->contents
+ off
);
11645 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
11648 bfd_put_32 (output_bfd
, 1, sgot
->contents
+ off
);
11650 globals
->tls_ldm_got
.offset
|= 1;
11653 if (r_type
== R_ARM_TLS_LDM32_FDPIC
)
11655 bfd_put_32(output_bfd
,
11656 globals
->root
.sgot
->output_offset
+ off
,
11657 contents
+ rel
->r_offset
);
11659 return bfd_reloc_ok
;
11663 value
= sgot
->output_section
->vma
+ sgot
->output_offset
+ off
11664 - (input_section
->output_section
->vma
11665 + input_section
->output_offset
+ rel
->r_offset
);
11667 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
11668 contents
, rel
->r_offset
, value
,
11673 case R_ARM_TLS_CALL
:
11674 case R_ARM_THM_TLS_CALL
:
11675 case R_ARM_TLS_GD32
:
11676 case R_ARM_TLS_GD32_FDPIC
:
11677 case R_ARM_TLS_IE32
:
11678 case R_ARM_TLS_IE32_FDPIC
:
11679 case R_ARM_TLS_GOTDESC
:
11680 case R_ARM_TLS_DESCSEQ
:
11681 case R_ARM_THM_TLS_DESCSEQ
:
11683 bfd_vma off
, offplt
;
11687 BFD_ASSERT (sgot
!= NULL
);
11692 dyn
= globals
->root
.dynamic_sections_created
;
11693 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn
,
11694 bfd_link_pic (info
),
11696 && (!bfd_link_pic (info
)
11697 || !SYMBOL_REFERENCES_LOCAL (info
, h
)))
11699 *unresolved_reloc_p
= FALSE
;
11702 off
= h
->got
.offset
;
11703 offplt
= elf32_arm_hash_entry (h
)->tlsdesc_got
;
11704 tls_type
= ((struct elf32_arm_link_hash_entry
*) h
)->tls_type
;
11708 BFD_ASSERT (local_got_offsets
!= NULL
);
11709 off
= local_got_offsets
[r_symndx
];
11710 offplt
= local_tlsdesc_gotents
[r_symndx
];
11711 tls_type
= elf32_arm_local_got_tls_type (input_bfd
)[r_symndx
];
11714 /* Linker relaxations happens from one of the
11715 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
11716 if (ELF32_R_TYPE(rel
->r_info
) != r_type
)
11717 tls_type
= GOT_TLS_IE
;
11719 BFD_ASSERT (tls_type
!= GOT_UNKNOWN
);
11721 if ((off
& 1) != 0)
11725 bfd_boolean need_relocs
= FALSE
;
11726 Elf_Internal_Rela outrel
;
11729 /* The GOT entries have not been initialized yet. Do it
11730 now, and emit any relocations. If both an IE GOT and a
11731 GD GOT are necessary, we emit the GD first. */
11733 if ((bfd_link_pic (info
) || indx
!= 0)
11735 || (ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
11736 && !resolved_to_zero
)
11737 || h
->root
.type
!= bfd_link_hash_undefweak
))
11739 need_relocs
= TRUE
;
11740 BFD_ASSERT (srelgot
!= NULL
);
11743 if (tls_type
& GOT_TLS_GDESC
)
11747 /* We should have relaxed, unless this is an undefined
11749 BFD_ASSERT ((h
&& (h
->root
.type
== bfd_link_hash_undefweak
))
11750 || bfd_link_pic (info
));
11751 BFD_ASSERT (globals
->sgotplt_jump_table_size
+ offplt
+ 8
11752 <= globals
->root
.sgotplt
->size
);
11754 outrel
.r_addend
= 0;
11755 outrel
.r_offset
= (globals
->root
.sgotplt
->output_section
->vma
11756 + globals
->root
.sgotplt
->output_offset
11758 + globals
->sgotplt_jump_table_size
);
11760 outrel
.r_info
= ELF32_R_INFO (indx
, R_ARM_TLS_DESC
);
11761 sreloc
= globals
->root
.srelplt
;
11762 loc
= sreloc
->contents
;
11763 loc
+= globals
->next_tls_desc_index
++ * RELOC_SIZE (globals
);
11764 BFD_ASSERT (loc
+ RELOC_SIZE (globals
)
11765 <= sreloc
->contents
+ sreloc
->size
);
11767 SWAP_RELOC_OUT (globals
) (output_bfd
, &outrel
, loc
);
11769 /* For globals, the first word in the relocation gets
11770 the relocation index and the top bit set, or zero,
11771 if we're binding now. For locals, it gets the
11772 symbol's offset in the tls section. */
11773 bfd_put_32 (output_bfd
,
11774 !h
? value
- elf_hash_table (info
)->tls_sec
->vma
11775 : info
->flags
& DF_BIND_NOW
? 0
11776 : 0x80000000 | ELF32_R_SYM (outrel
.r_info
),
11777 globals
->root
.sgotplt
->contents
+ offplt
11778 + globals
->sgotplt_jump_table_size
);
11780 /* Second word in the relocation is always zero. */
11781 bfd_put_32 (output_bfd
, 0,
11782 globals
->root
.sgotplt
->contents
+ offplt
11783 + globals
->sgotplt_jump_table_size
+ 4);
11785 if (tls_type
& GOT_TLS_GD
)
11789 outrel
.r_addend
= 0;
11790 outrel
.r_offset
= (sgot
->output_section
->vma
11791 + sgot
->output_offset
11793 outrel
.r_info
= ELF32_R_INFO (indx
, R_ARM_TLS_DTPMOD32
);
11795 if (globals
->use_rel
)
11796 bfd_put_32 (output_bfd
, outrel
.r_addend
,
11797 sgot
->contents
+ cur_off
);
11799 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
11802 bfd_put_32 (output_bfd
, value
- dtpoff_base (info
),
11803 sgot
->contents
+ cur_off
+ 4);
11806 outrel
.r_addend
= 0;
11807 outrel
.r_info
= ELF32_R_INFO (indx
,
11808 R_ARM_TLS_DTPOFF32
);
11809 outrel
.r_offset
+= 4;
11811 if (globals
->use_rel
)
11812 bfd_put_32 (output_bfd
, outrel
.r_addend
,
11813 sgot
->contents
+ cur_off
+ 4);
11815 elf32_arm_add_dynreloc (output_bfd
, info
,
11821 /* If we are not emitting relocations for a
11822 general dynamic reference, then we must be in a
11823 static link or an executable link with the
11824 symbol binding locally. Mark it as belonging
11825 to module 1, the executable. */
11826 bfd_put_32 (output_bfd
, 1,
11827 sgot
->contents
+ cur_off
);
11828 bfd_put_32 (output_bfd
, value
- dtpoff_base (info
),
11829 sgot
->contents
+ cur_off
+ 4);
11835 if (tls_type
& GOT_TLS_IE
)
11840 outrel
.r_addend
= value
- dtpoff_base (info
);
11842 outrel
.r_addend
= 0;
11843 outrel
.r_offset
= (sgot
->output_section
->vma
11844 + sgot
->output_offset
11846 outrel
.r_info
= ELF32_R_INFO (indx
, R_ARM_TLS_TPOFF32
);
11848 if (globals
->use_rel
)
11849 bfd_put_32 (output_bfd
, outrel
.r_addend
,
11850 sgot
->contents
+ cur_off
);
11852 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
11855 bfd_put_32 (output_bfd
, tpoff (info
, value
),
11856 sgot
->contents
+ cur_off
);
11861 h
->got
.offset
|= 1;
11863 local_got_offsets
[r_symndx
] |= 1;
11866 if ((tls_type
& GOT_TLS_GD
) && r_type
!= R_ARM_TLS_GD32
&& r_type
!= R_ARM_TLS_GD32_FDPIC
)
11868 else if (tls_type
& GOT_TLS_GDESC
)
11871 if (ELF32_R_TYPE(rel
->r_info
) == R_ARM_TLS_CALL
11872 || ELF32_R_TYPE(rel
->r_info
) == R_ARM_THM_TLS_CALL
)
11874 bfd_signed_vma offset
;
11875 /* TLS stubs are arm mode. The original symbol is a
11876 data object, so branch_type is bogus. */
11877 branch_type
= ST_BRANCH_TO_ARM
;
11878 enum elf32_arm_stub_type stub_type
11879 = arm_type_of_stub (info
, input_section
, rel
,
11880 st_type
, &branch_type
,
11881 (struct elf32_arm_link_hash_entry
*)h
,
11882 globals
->tls_trampoline
, globals
->root
.splt
,
11883 input_bfd
, sym_name
);
11885 if (stub_type
!= arm_stub_none
)
11887 struct elf32_arm_stub_hash_entry
*stub_entry
11888 = elf32_arm_get_stub_entry
11889 (input_section
, globals
->root
.splt
, 0, rel
,
11890 globals
, stub_type
);
11891 offset
= (stub_entry
->stub_offset
11892 + stub_entry
->stub_sec
->output_offset
11893 + stub_entry
->stub_sec
->output_section
->vma
);
11896 offset
= (globals
->root
.splt
->output_section
->vma
11897 + globals
->root
.splt
->output_offset
11898 + globals
->tls_trampoline
);
11900 if (ELF32_R_TYPE(rel
->r_info
) == R_ARM_TLS_CALL
)
11902 unsigned long inst
;
11904 offset
-= (input_section
->output_section
->vma
11905 + input_section
->output_offset
11906 + rel
->r_offset
+ 8);
11908 inst
= offset
>> 2;
11909 inst
&= 0x00ffffff;
11910 value
= inst
| (globals
->use_blx
? 0xfa000000 : 0xeb000000);
11914 /* Thumb blx encodes the offset in a complicated
11916 unsigned upper_insn
, lower_insn
;
11919 offset
-= (input_section
->output_section
->vma
11920 + input_section
->output_offset
11921 + rel
->r_offset
+ 4);
11923 if (stub_type
!= arm_stub_none
11924 && arm_stub_is_thumb (stub_type
))
11926 lower_insn
= 0xd000;
11930 lower_insn
= 0xc000;
11931 /* Round up the offset to a word boundary. */
11932 offset
= (offset
+ 2) & ~2;
11936 upper_insn
= (0xf000
11937 | ((offset
>> 12) & 0x3ff)
11939 lower_insn
|= (((!((offset
>> 23) & 1)) ^ neg
) << 13)
11940 | (((!((offset
>> 22) & 1)) ^ neg
) << 11)
11941 | ((offset
>> 1) & 0x7ff);
11942 bfd_put_16 (input_bfd
, upper_insn
, hit_data
);
11943 bfd_put_16 (input_bfd
, lower_insn
, hit_data
+ 2);
11944 return bfd_reloc_ok
;
11947 /* These relocations needs special care, as besides the fact
11948 they point somewhere in .gotplt, the addend must be
11949 adjusted accordingly depending on the type of instruction
11951 else if ((r_type
== R_ARM_TLS_GOTDESC
) && (tls_type
& GOT_TLS_GDESC
))
11953 unsigned long data
, insn
;
11956 data
= bfd_get_32 (input_bfd
, hit_data
);
11962 insn
= bfd_get_16 (input_bfd
, contents
+ rel
->r_offset
- data
);
11963 if ((insn
& 0xf000) == 0xf000 || (insn
& 0xf800) == 0xe800)
11964 insn
= (insn
<< 16)
11965 | bfd_get_16 (input_bfd
,
11966 contents
+ rel
->r_offset
- data
+ 2);
11967 if ((insn
& 0xf800c000) == 0xf000c000)
11970 else if ((insn
& 0xffffff00) == 0x4400)
11976 /* xgettext:c-format */
11977 (_("%pB(%pA+%#" PRIx64
"): "
11978 "unexpected %s instruction '%#lx' "
11979 "referenced by TLS_GOTDESC"),
11980 input_bfd
, input_section
, (uint64_t) rel
->r_offset
,
11982 return bfd_reloc_notsupported
;
11987 insn
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
- data
);
11989 switch (insn
>> 24)
11991 case 0xeb: /* bl */
11992 case 0xfa: /* blx */
11996 case 0xe0: /* add */
12002 /* xgettext:c-format */
12003 (_("%pB(%pA+%#" PRIx64
"): "
12004 "unexpected %s instruction '%#lx' "
12005 "referenced by TLS_GOTDESC"),
12006 input_bfd
, input_section
, (uint64_t) rel
->r_offset
,
12008 return bfd_reloc_notsupported
;
12012 value
+= ((globals
->root
.sgotplt
->output_section
->vma
12013 + globals
->root
.sgotplt
->output_offset
+ off
)
12014 - (input_section
->output_section
->vma
12015 + input_section
->output_offset
12017 + globals
->sgotplt_jump_table_size
);
12020 value
= ((globals
->root
.sgot
->output_section
->vma
12021 + globals
->root
.sgot
->output_offset
+ off
)
12022 - (input_section
->output_section
->vma
12023 + input_section
->output_offset
+ rel
->r_offset
));
12025 if (globals
->fdpic_p
&& (r_type
== R_ARM_TLS_GD32_FDPIC
||
12026 r_type
== R_ARM_TLS_IE32_FDPIC
))
12028 /* For FDPIC relocations, resolve to the offset of the GOT
12029 entry from the start of GOT. */
12030 bfd_put_32(output_bfd
,
12031 globals
->root
.sgot
->output_offset
+ off
,
12032 contents
+ rel
->r_offset
);
12034 return bfd_reloc_ok
;
12038 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
12039 contents
, rel
->r_offset
, value
,
12044 case R_ARM_TLS_LE32
:
12045 if (bfd_link_dll (info
))
12048 /* xgettext:c-format */
12049 (_("%pB(%pA+%#" PRIx64
"): %s relocation not permitted "
12050 "in shared object"),
12051 input_bfd
, input_section
, (uint64_t) rel
->r_offset
, howto
->name
);
12052 return bfd_reloc_notsupported
;
12055 value
= tpoff (info
, value
);
12057 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
12058 contents
, rel
->r_offset
, value
,
12062 if (globals
->fix_v4bx
)
12064 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
12066 /* Ensure that we have a BX instruction. */
12067 BFD_ASSERT ((insn
& 0x0ffffff0) == 0x012fff10);
12069 if (globals
->fix_v4bx
== 2 && (insn
& 0xf) != 0xf)
12071 /* Branch to veneer. */
12073 glue_addr
= elf32_arm_bx_glue (info
, insn
& 0xf);
12074 glue_addr
-= input_section
->output_section
->vma
12075 + input_section
->output_offset
12076 + rel
->r_offset
+ 8;
12077 insn
= (insn
& 0xf0000000) | 0x0a000000
12078 | ((glue_addr
>> 2) & 0x00ffffff);
12082 /* Preserve Rm (lowest four bits) and the condition code
12083 (highest four bits). Other bits encode MOV PC,Rm. */
12084 insn
= (insn
& 0xf000000f) | 0x01a0f000;
12087 bfd_put_32 (input_bfd
, insn
, hit_data
);
12089 return bfd_reloc_ok
;
12091 case R_ARM_MOVW_ABS_NC
:
12092 case R_ARM_MOVT_ABS
:
12093 case R_ARM_MOVW_PREL_NC
:
12094 case R_ARM_MOVT_PREL
:
12095 /* Until we properly support segment-base-relative addressing then
12096 we assume the segment base to be zero, as for the group relocations.
12097 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
12098 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
12099 case R_ARM_MOVW_BREL_NC
:
12100 case R_ARM_MOVW_BREL
:
12101 case R_ARM_MOVT_BREL
:
12103 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
12105 if (globals
->use_rel
)
12107 addend
= ((insn
>> 4) & 0xf000) | (insn
& 0xfff);
12108 signed_addend
= (addend
^ 0x8000) - 0x8000;
12111 value
+= signed_addend
;
12113 if (r_type
== R_ARM_MOVW_PREL_NC
|| r_type
== R_ARM_MOVT_PREL
)
12114 value
-= (input_section
->output_section
->vma
12115 + input_section
->output_offset
+ rel
->r_offset
);
12117 if (r_type
== R_ARM_MOVW_BREL
&& value
>= 0x10000)
12118 return bfd_reloc_overflow
;
12120 if (branch_type
== ST_BRANCH_TO_THUMB
)
12123 if (r_type
== R_ARM_MOVT_ABS
|| r_type
== R_ARM_MOVT_PREL
12124 || r_type
== R_ARM_MOVT_BREL
)
12127 insn
&= 0xfff0f000;
12128 insn
|= value
& 0xfff;
12129 insn
|= (value
& 0xf000) << 4;
12130 bfd_put_32 (input_bfd
, insn
, hit_data
);
12132 return bfd_reloc_ok
;
12134 case R_ARM_THM_MOVW_ABS_NC
:
12135 case R_ARM_THM_MOVT_ABS
:
12136 case R_ARM_THM_MOVW_PREL_NC
:
12137 case R_ARM_THM_MOVT_PREL
:
12138 /* Until we properly support segment-base-relative addressing then
12139 we assume the segment base to be zero, as for the above relocations.
12140 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
12141 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
12142 as R_ARM_THM_MOVT_ABS. */
12143 case R_ARM_THM_MOVW_BREL_NC
:
12144 case R_ARM_THM_MOVW_BREL
:
12145 case R_ARM_THM_MOVT_BREL
:
12149 insn
= bfd_get_16 (input_bfd
, hit_data
) << 16;
12150 insn
|= bfd_get_16 (input_bfd
, hit_data
+ 2);
12152 if (globals
->use_rel
)
12154 addend
= ((insn
>> 4) & 0xf000)
12155 | ((insn
>> 15) & 0x0800)
12156 | ((insn
>> 4) & 0x0700)
12158 signed_addend
= (addend
^ 0x8000) - 0x8000;
12161 value
+= signed_addend
;
12163 if (r_type
== R_ARM_THM_MOVW_PREL_NC
|| r_type
== R_ARM_THM_MOVT_PREL
)
12164 value
-= (input_section
->output_section
->vma
12165 + input_section
->output_offset
+ rel
->r_offset
);
12167 if (r_type
== R_ARM_THM_MOVW_BREL
&& value
>= 0x10000)
12168 return bfd_reloc_overflow
;
12170 if (branch_type
== ST_BRANCH_TO_THUMB
)
12173 if (r_type
== R_ARM_THM_MOVT_ABS
|| r_type
== R_ARM_THM_MOVT_PREL
12174 || r_type
== R_ARM_THM_MOVT_BREL
)
12177 insn
&= 0xfbf08f00;
12178 insn
|= (value
& 0xf000) << 4;
12179 insn
|= (value
& 0x0800) << 15;
12180 insn
|= (value
& 0x0700) << 4;
12181 insn
|= (value
& 0x00ff);
12183 bfd_put_16 (input_bfd
, insn
>> 16, hit_data
);
12184 bfd_put_16 (input_bfd
, insn
& 0xffff, hit_data
+ 2);
12186 return bfd_reloc_ok
;
12188 case R_ARM_ALU_PC_G0_NC
:
12189 case R_ARM_ALU_PC_G1_NC
:
12190 case R_ARM_ALU_PC_G0
:
12191 case R_ARM_ALU_PC_G1
:
12192 case R_ARM_ALU_PC_G2
:
12193 case R_ARM_ALU_SB_G0_NC
:
12194 case R_ARM_ALU_SB_G1_NC
:
12195 case R_ARM_ALU_SB_G0
:
12196 case R_ARM_ALU_SB_G1
:
12197 case R_ARM_ALU_SB_G2
:
12199 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
12200 bfd_vma pc
= input_section
->output_section
->vma
12201 + input_section
->output_offset
+ rel
->r_offset
;
12202 /* sb is the origin of the *segment* containing the symbol. */
12203 bfd_vma sb
= sym_sec
? sym_sec
->output_section
->vma
: 0;
12206 bfd_signed_vma signed_value
;
12209 /* Determine which group of bits to select. */
12212 case R_ARM_ALU_PC_G0_NC
:
12213 case R_ARM_ALU_PC_G0
:
12214 case R_ARM_ALU_SB_G0_NC
:
12215 case R_ARM_ALU_SB_G0
:
12219 case R_ARM_ALU_PC_G1_NC
:
12220 case R_ARM_ALU_PC_G1
:
12221 case R_ARM_ALU_SB_G1_NC
:
12222 case R_ARM_ALU_SB_G1
:
12226 case R_ARM_ALU_PC_G2
:
12227 case R_ARM_ALU_SB_G2
:
12235 /* If REL, extract the addend from the insn. If RELA, it will
12236 have already been fetched for us. */
12237 if (globals
->use_rel
)
12240 bfd_vma constant
= insn
& 0xff;
12241 bfd_vma rotation
= (insn
& 0xf00) >> 8;
12244 signed_addend
= constant
;
12247 /* Compensate for the fact that in the instruction, the
12248 rotation is stored in multiples of 2 bits. */
12251 /* Rotate "constant" right by "rotation" bits. */
12252 signed_addend
= (constant
>> rotation
) |
12253 (constant
<< (8 * sizeof (bfd_vma
) - rotation
));
12256 /* Determine if the instruction is an ADD or a SUB.
12257 (For REL, this determines the sign of the addend.) */
12258 negative
= identify_add_or_sub (insn
);
12262 /* xgettext:c-format */
12263 (_("%pB(%pA+%#" PRIx64
"): only ADD or SUB instructions "
12264 "are allowed for ALU group relocations"),
12265 input_bfd
, input_section
, (uint64_t) rel
->r_offset
);
12266 return bfd_reloc_overflow
;
12269 signed_addend
*= negative
;
12272 /* Compute the value (X) to go in the place. */
12273 if (r_type
== R_ARM_ALU_PC_G0_NC
12274 || r_type
== R_ARM_ALU_PC_G1_NC
12275 || r_type
== R_ARM_ALU_PC_G0
12276 || r_type
== R_ARM_ALU_PC_G1
12277 || r_type
== R_ARM_ALU_PC_G2
)
12279 signed_value
= value
- pc
+ signed_addend
;
12281 /* Section base relative. */
12282 signed_value
= value
- sb
+ signed_addend
;
12284 /* If the target symbol is a Thumb function, then set the
12285 Thumb bit in the address. */
12286 if (branch_type
== ST_BRANCH_TO_THUMB
)
12289 /* Calculate the value of the relevant G_n, in encoded
12290 constant-with-rotation format. */
12291 g_n
= calculate_group_reloc_mask (signed_value
< 0 ? - signed_value
: signed_value
,
12294 /* Check for overflow if required. */
12295 if ((r_type
== R_ARM_ALU_PC_G0
12296 || r_type
== R_ARM_ALU_PC_G1
12297 || r_type
== R_ARM_ALU_PC_G2
12298 || r_type
== R_ARM_ALU_SB_G0
12299 || r_type
== R_ARM_ALU_SB_G1
12300 || r_type
== R_ARM_ALU_SB_G2
) && residual
!= 0)
12303 /* xgettext:c-format */
12304 (_("%pB(%pA+%#" PRIx64
"): overflow whilst "
12305 "splitting %#" PRIx64
" for group relocation %s"),
12306 input_bfd
, input_section
, (uint64_t) rel
->r_offset
,
12307 (uint64_t) (signed_value
< 0 ? -signed_value
: signed_value
),
12309 return bfd_reloc_overflow
;
12312 /* Mask out the value and the ADD/SUB part of the opcode; take care
12313 not to destroy the S bit. */
12314 insn
&= 0xff1ff000;
12316 /* Set the opcode according to whether the value to go in the
12317 place is negative. */
12318 if (signed_value
< 0)
12323 /* Encode the offset. */
12326 bfd_put_32 (input_bfd
, insn
, hit_data
);
12328 return bfd_reloc_ok
;
12330 case R_ARM_LDR_PC_G0
:
12331 case R_ARM_LDR_PC_G1
:
12332 case R_ARM_LDR_PC_G2
:
12333 case R_ARM_LDR_SB_G0
:
12334 case R_ARM_LDR_SB_G1
:
12335 case R_ARM_LDR_SB_G2
:
12337 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
12338 bfd_vma pc
= input_section
->output_section
->vma
12339 + input_section
->output_offset
+ rel
->r_offset
;
12340 /* sb is the origin of the *segment* containing the symbol. */
12341 bfd_vma sb
= sym_sec
? sym_sec
->output_section
->vma
: 0;
12343 bfd_signed_vma signed_value
;
12346 /* Determine which groups of bits to calculate. */
12349 case R_ARM_LDR_PC_G0
:
12350 case R_ARM_LDR_SB_G0
:
12354 case R_ARM_LDR_PC_G1
:
12355 case R_ARM_LDR_SB_G1
:
12359 case R_ARM_LDR_PC_G2
:
12360 case R_ARM_LDR_SB_G2
:
12368 /* If REL, extract the addend from the insn. If RELA, it will
12369 have already been fetched for us. */
12370 if (globals
->use_rel
)
12372 int negative
= (insn
& (1 << 23)) ? 1 : -1;
12373 signed_addend
= negative
* (insn
& 0xfff);
12376 /* Compute the value (X) to go in the place. */
12377 if (r_type
== R_ARM_LDR_PC_G0
12378 || r_type
== R_ARM_LDR_PC_G1
12379 || r_type
== R_ARM_LDR_PC_G2
)
12381 signed_value
= value
- pc
+ signed_addend
;
12383 /* Section base relative. */
12384 signed_value
= value
- sb
+ signed_addend
;
12386 /* Calculate the value of the relevant G_{n-1} to obtain
12387 the residual at that stage. */
12388 calculate_group_reloc_mask (signed_value
< 0 ? - signed_value
: signed_value
,
12389 group
- 1, &residual
);
12391 /* Check for overflow. */
12392 if (residual
>= 0x1000)
12395 /* xgettext:c-format */
12396 (_("%pB(%pA+%#" PRIx64
"): overflow whilst "
12397 "splitting %#" PRIx64
" for group relocation %s"),
12398 input_bfd
, input_section
, (uint64_t) rel
->r_offset
,
12399 (uint64_t) (signed_value
< 0 ? -signed_value
: signed_value
),
12401 return bfd_reloc_overflow
;
12404 /* Mask out the value and U bit. */
12405 insn
&= 0xff7ff000;
12407 /* Set the U bit if the value to go in the place is non-negative. */
12408 if (signed_value
>= 0)
12411 /* Encode the offset. */
12414 bfd_put_32 (input_bfd
, insn
, hit_data
);
12416 return bfd_reloc_ok
;
12418 case R_ARM_LDRS_PC_G0
:
12419 case R_ARM_LDRS_PC_G1
:
12420 case R_ARM_LDRS_PC_G2
:
12421 case R_ARM_LDRS_SB_G0
:
12422 case R_ARM_LDRS_SB_G1
:
12423 case R_ARM_LDRS_SB_G2
:
12425 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
12426 bfd_vma pc
= input_section
->output_section
->vma
12427 + input_section
->output_offset
+ rel
->r_offset
;
12428 /* sb is the origin of the *segment* containing the symbol. */
12429 bfd_vma sb
= sym_sec
? sym_sec
->output_section
->vma
: 0;
12431 bfd_signed_vma signed_value
;
12434 /* Determine which groups of bits to calculate. */
12437 case R_ARM_LDRS_PC_G0
:
12438 case R_ARM_LDRS_SB_G0
:
12442 case R_ARM_LDRS_PC_G1
:
12443 case R_ARM_LDRS_SB_G1
:
12447 case R_ARM_LDRS_PC_G2
:
12448 case R_ARM_LDRS_SB_G2
:
12456 /* If REL, extract the addend from the insn. If RELA, it will
12457 have already been fetched for us. */
12458 if (globals
->use_rel
)
12460 int negative
= (insn
& (1 << 23)) ? 1 : -1;
12461 signed_addend
= negative
* (((insn
& 0xf00) >> 4) + (insn
& 0xf));
12464 /* Compute the value (X) to go in the place. */
12465 if (r_type
== R_ARM_LDRS_PC_G0
12466 || r_type
== R_ARM_LDRS_PC_G1
12467 || r_type
== R_ARM_LDRS_PC_G2
)
12469 signed_value
= value
- pc
+ signed_addend
;
12471 /* Section base relative. */
12472 signed_value
= value
- sb
+ signed_addend
;
12474 /* Calculate the value of the relevant G_{n-1} to obtain
12475 the residual at that stage. */
12476 calculate_group_reloc_mask (signed_value
< 0 ? - signed_value
: signed_value
,
12477 group
- 1, &residual
);
12479 /* Check for overflow. */
12480 if (residual
>= 0x100)
12483 /* xgettext:c-format */
12484 (_("%pB(%pA+%#" PRIx64
"): overflow whilst "
12485 "splitting %#" PRIx64
" for group relocation %s"),
12486 input_bfd
, input_section
, (uint64_t) rel
->r_offset
,
12487 (uint64_t) (signed_value
< 0 ? -signed_value
: signed_value
),
12489 return bfd_reloc_overflow
;
12492 /* Mask out the value and U bit. */
12493 insn
&= 0xff7ff0f0;
12495 /* Set the U bit if the value to go in the place is non-negative. */
12496 if (signed_value
>= 0)
12499 /* Encode the offset. */
12500 insn
|= ((residual
& 0xf0) << 4) | (residual
& 0xf);
12502 bfd_put_32 (input_bfd
, insn
, hit_data
);
12504 return bfd_reloc_ok
;
12506 case R_ARM_LDC_PC_G0
:
12507 case R_ARM_LDC_PC_G1
:
12508 case R_ARM_LDC_PC_G2
:
12509 case R_ARM_LDC_SB_G0
:
12510 case R_ARM_LDC_SB_G1
:
12511 case R_ARM_LDC_SB_G2
:
12513 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
12514 bfd_vma pc
= input_section
->output_section
->vma
12515 + input_section
->output_offset
+ rel
->r_offset
;
12516 /* sb is the origin of the *segment* containing the symbol. */
12517 bfd_vma sb
= sym_sec
? sym_sec
->output_section
->vma
: 0;
12519 bfd_signed_vma signed_value
;
12522 /* Determine which groups of bits to calculate. */
12525 case R_ARM_LDC_PC_G0
:
12526 case R_ARM_LDC_SB_G0
:
12530 case R_ARM_LDC_PC_G1
:
12531 case R_ARM_LDC_SB_G1
:
12535 case R_ARM_LDC_PC_G2
:
12536 case R_ARM_LDC_SB_G2
:
12544 /* If REL, extract the addend from the insn. If RELA, it will
12545 have already been fetched for us. */
12546 if (globals
->use_rel
)
12548 int negative
= (insn
& (1 << 23)) ? 1 : -1;
12549 signed_addend
= negative
* ((insn
& 0xff) << 2);
12552 /* Compute the value (X) to go in the place. */
12553 if (r_type
== R_ARM_LDC_PC_G0
12554 || r_type
== R_ARM_LDC_PC_G1
12555 || r_type
== R_ARM_LDC_PC_G2
)
12557 signed_value
= value
- pc
+ signed_addend
;
12559 /* Section base relative. */
12560 signed_value
= value
- sb
+ signed_addend
;
12562 /* Calculate the value of the relevant G_{n-1} to obtain
12563 the residual at that stage. */
12564 calculate_group_reloc_mask (signed_value
< 0 ? - signed_value
: signed_value
,
12565 group
- 1, &residual
);
12567 /* Check for overflow. (The absolute value to go in the place must be
12568 divisible by four and, after having been divided by four, must
12569 fit in eight bits.) */
12570 if ((residual
& 0x3) != 0 || residual
>= 0x400)
12573 /* xgettext:c-format */
12574 (_("%pB(%pA+%#" PRIx64
"): overflow whilst "
12575 "splitting %#" PRIx64
" for group relocation %s"),
12576 input_bfd
, input_section
, (uint64_t) rel
->r_offset
,
12577 (uint64_t) (signed_value
< 0 ? -signed_value
: signed_value
),
12579 return bfd_reloc_overflow
;
12582 /* Mask out the value and U bit. */
12583 insn
&= 0xff7fff00;
12585 /* Set the U bit if the value to go in the place is non-negative. */
12586 if (signed_value
>= 0)
12589 /* Encode the offset. */
12590 insn
|= residual
>> 2;
12592 bfd_put_32 (input_bfd
, insn
, hit_data
);
12594 return bfd_reloc_ok
;
12596 case R_ARM_THM_ALU_ABS_G0_NC
:
12597 case R_ARM_THM_ALU_ABS_G1_NC
:
12598 case R_ARM_THM_ALU_ABS_G2_NC
:
12599 case R_ARM_THM_ALU_ABS_G3_NC
:
12601 const int shift_array
[4] = {0, 8, 16, 24};
12602 bfd_vma insn
= bfd_get_16 (input_bfd
, hit_data
);
12603 bfd_vma addr
= value
;
12604 int shift
= shift_array
[r_type
- R_ARM_THM_ALU_ABS_G0_NC
];
12606 /* Compute address. */
12607 if (globals
->use_rel
)
12608 signed_addend
= insn
& 0xff;
12609 addr
+= signed_addend
;
12610 if (branch_type
== ST_BRANCH_TO_THUMB
)
12612 /* Clean imm8 insn. */
12614 /* And update with correct part of address. */
12615 insn
|= (addr
>> shift
) & 0xff;
12617 bfd_put_16 (input_bfd
, insn
, hit_data
);
12620 *unresolved_reloc_p
= FALSE
;
12621 return bfd_reloc_ok
;
12623 case R_ARM_GOTOFFFUNCDESC
:
12627 struct fdpic_local
*local_fdpic_cnts
= elf32_arm_local_fdpic_cnts(input_bfd
);
12628 int dynindx
= elf_section_data (sym_sec
->output_section
)->dynindx
;
12629 int offset
= local_fdpic_cnts
[r_symndx
].funcdesc_offset
& ~1;
12630 bfd_vma addr
= dynreloc_value
- sym_sec
->output_section
->vma
;
12633 if (bfd_link_pic(info
) && dynindx
== 0)
12636 /* Resolve relocation. */
12637 bfd_put_32(output_bfd
, (offset
+ sgot
->output_offset
)
12638 , contents
+ rel
->r_offset
);
12639 /* Emit R_ARM_FUNCDESC_VALUE or two fixups on funcdesc if
12641 arm_elf_fill_funcdesc(output_bfd
, info
,
12642 &local_fdpic_cnts
[r_symndx
].funcdesc_offset
,
12643 dynindx
, offset
, addr
, dynreloc_value
, seg
);
12648 int offset
= eh
->fdpic_cnts
.funcdesc_offset
& ~1;
12652 /* For static binaries, sym_sec can be null. */
12655 dynindx
= elf_section_data (sym_sec
->output_section
)->dynindx
;
12656 addr
= dynreloc_value
- sym_sec
->output_section
->vma
;
12664 if (bfd_link_pic(info
) && dynindx
== 0)
12667 /* This case cannot occur since funcdesc is allocated by
12668 the dynamic loader so we cannot resolve the relocation. */
12669 if (h
->dynindx
!= -1)
12672 /* Resolve relocation. */
12673 bfd_put_32(output_bfd
, (offset
+ sgot
->output_offset
),
12674 contents
+ rel
->r_offset
);
12675 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12676 arm_elf_fill_funcdesc(output_bfd
, info
,
12677 &eh
->fdpic_cnts
.funcdesc_offset
,
12678 dynindx
, offset
, addr
, dynreloc_value
, seg
);
12681 *unresolved_reloc_p
= FALSE
;
12682 return bfd_reloc_ok
;
12684 case R_ARM_GOTFUNCDESC
:
12688 Elf_Internal_Rela outrel
;
12690 /* Resolve relocation. */
12691 bfd_put_32(output_bfd
, ((eh
->fdpic_cnts
.gotfuncdesc_offset
& ~1)
12692 + sgot
->output_offset
),
12693 contents
+ rel
->r_offset
);
12694 /* Add funcdesc and associated R_ARM_FUNCDESC_VALUE. */
12695 if(h
->dynindx
== -1)
12698 int offset
= eh
->fdpic_cnts
.funcdesc_offset
& ~1;
12702 /* For static binaries sym_sec can be null. */
12705 dynindx
= elf_section_data (sym_sec
->output_section
)->dynindx
;
12706 addr
= dynreloc_value
- sym_sec
->output_section
->vma
;
12714 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12715 arm_elf_fill_funcdesc(output_bfd
, info
,
12716 &eh
->fdpic_cnts
.funcdesc_offset
,
12717 dynindx
, offset
, addr
, dynreloc_value
, seg
);
12720 /* Add a dynamic relocation on GOT entry if not already done. */
12721 if ((eh
->fdpic_cnts
.gotfuncdesc_offset
& 1) == 0)
12723 if (h
->dynindx
== -1)
12725 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_RELATIVE
);
12726 if (h
->root
.type
== bfd_link_hash_undefweak
)
12727 bfd_put_32(output_bfd
, 0, sgot
->contents
12728 + (eh
->fdpic_cnts
.gotfuncdesc_offset
& ~1));
12730 bfd_put_32(output_bfd
, sgot
->output_section
->vma
12731 + sgot
->output_offset
12732 + (eh
->fdpic_cnts
.funcdesc_offset
& ~1),
12734 + (eh
->fdpic_cnts
.gotfuncdesc_offset
& ~1));
12738 outrel
.r_info
= ELF32_R_INFO (h
->dynindx
, R_ARM_FUNCDESC
);
12740 outrel
.r_offset
= sgot
->output_section
->vma
12741 + sgot
->output_offset
12742 + (eh
->fdpic_cnts
.gotfuncdesc_offset
& ~1);
12743 outrel
.r_addend
= 0;
12744 if (h
->dynindx
== -1 && !bfd_link_pic(info
))
12745 if (h
->root
.type
== bfd_link_hash_undefweak
)
12746 arm_elf_add_rofixup(output_bfd
, globals
->srofixup
, -1);
12748 arm_elf_add_rofixup(output_bfd
, globals
->srofixup
,
12751 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
12752 eh
->fdpic_cnts
.gotfuncdesc_offset
|= 1;
12757 /* Such relocation on static function should not have been
12758 emitted by the compiler. */
12762 *unresolved_reloc_p
= FALSE
;
12763 return bfd_reloc_ok
;
12765 case R_ARM_FUNCDESC
:
12769 struct fdpic_local
*local_fdpic_cnts
= elf32_arm_local_fdpic_cnts(input_bfd
);
12770 Elf_Internal_Rela outrel
;
12771 int dynindx
= elf_section_data (sym_sec
->output_section
)->dynindx
;
12772 int offset
= local_fdpic_cnts
[r_symndx
].funcdesc_offset
& ~1;
12773 bfd_vma addr
= dynreloc_value
- sym_sec
->output_section
->vma
;
12776 if (bfd_link_pic(info
) && dynindx
== 0)
12779 /* Replace static FUNCDESC relocation with a
12780 R_ARM_RELATIVE dynamic relocation or with a rofixup for
12782 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_RELATIVE
);
12783 outrel
.r_offset
= input_section
->output_section
->vma
12784 + input_section
->output_offset
+ rel
->r_offset
;
12785 outrel
.r_addend
= 0;
12786 if (bfd_link_pic(info
))
12787 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
12789 arm_elf_add_rofixup(output_bfd
, globals
->srofixup
, outrel
.r_offset
);
12791 bfd_put_32 (input_bfd
, sgot
->output_section
->vma
12792 + sgot
->output_offset
+ offset
, hit_data
);
12794 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12795 arm_elf_fill_funcdesc(output_bfd
, info
,
12796 &local_fdpic_cnts
[r_symndx
].funcdesc_offset
,
12797 dynindx
, offset
, addr
, dynreloc_value
, seg
);
12801 if (h
->dynindx
== -1)
12804 int offset
= eh
->fdpic_cnts
.funcdesc_offset
& ~1;
12807 Elf_Internal_Rela outrel
;
12809 /* For static binaries sym_sec can be null. */
12812 dynindx
= elf_section_data (sym_sec
->output_section
)->dynindx
;
12813 addr
= dynreloc_value
- sym_sec
->output_section
->vma
;
12821 if (bfd_link_pic(info
) && dynindx
== 0)
12824 /* Replace static FUNCDESC relocation with a
12825 R_ARM_RELATIVE dynamic relocation. */
12826 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_RELATIVE
);
12827 outrel
.r_offset
= input_section
->output_section
->vma
12828 + input_section
->output_offset
+ rel
->r_offset
;
12829 outrel
.r_addend
= 0;
12830 if (bfd_link_pic(info
))
12831 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
12833 arm_elf_add_rofixup(output_bfd
, globals
->srofixup
, outrel
.r_offset
);
12835 bfd_put_32 (input_bfd
, sgot
->output_section
->vma
12836 + sgot
->output_offset
+ offset
, hit_data
);
12838 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12839 arm_elf_fill_funcdesc(output_bfd
, info
,
12840 &eh
->fdpic_cnts
.funcdesc_offset
,
12841 dynindx
, offset
, addr
, dynreloc_value
, seg
);
12845 Elf_Internal_Rela outrel
;
12847 /* Add a dynamic relocation. */
12848 outrel
.r_info
= ELF32_R_INFO (h
->dynindx
, R_ARM_FUNCDESC
);
12849 outrel
.r_offset
= input_section
->output_section
->vma
12850 + input_section
->output_offset
+ rel
->r_offset
;
12851 outrel
.r_addend
= 0;
12852 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
12856 *unresolved_reloc_p
= FALSE
;
12857 return bfd_reloc_ok
;
12860 return bfd_reloc_notsupported
;
12864 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
12866 arm_add_to_rel (bfd
* abfd
,
12867 bfd_byte
* address
,
12868 reloc_howto_type
* howto
,
12869 bfd_signed_vma increment
)
12871 bfd_signed_vma addend
;
12873 if (howto
->type
== R_ARM_THM_CALL
12874 || howto
->type
== R_ARM_THM_JUMP24
)
12876 int upper_insn
, lower_insn
;
12879 upper_insn
= bfd_get_16 (abfd
, address
);
12880 lower_insn
= bfd_get_16 (abfd
, address
+ 2);
12881 upper
= upper_insn
& 0x7ff;
12882 lower
= lower_insn
& 0x7ff;
12884 addend
= (upper
<< 12) | (lower
<< 1);
12885 addend
+= increment
;
12888 upper_insn
= (upper_insn
& 0xf800) | ((addend
>> 11) & 0x7ff);
12889 lower_insn
= (lower_insn
& 0xf800) | (addend
& 0x7ff);
12891 bfd_put_16 (abfd
, (bfd_vma
) upper_insn
, address
);
12892 bfd_put_16 (abfd
, (bfd_vma
) lower_insn
, address
+ 2);
12898 contents
= bfd_get_32 (abfd
, address
);
12900 /* Get the (signed) value from the instruction. */
12901 addend
= contents
& howto
->src_mask
;
12902 if (addend
& ((howto
->src_mask
+ 1) >> 1))
12904 bfd_signed_vma mask
;
12907 mask
&= ~ howto
->src_mask
;
12911 /* Add in the increment, (which is a byte value). */
12912 switch (howto
->type
)
12915 addend
+= increment
;
12922 addend
<<= howto
->size
;
12923 addend
+= increment
;
12925 /* Should we check for overflow here ? */
12927 /* Drop any undesired bits. */
12928 addend
>>= howto
->rightshift
;
12932 contents
= (contents
& ~ howto
->dst_mask
) | (addend
& howto
->dst_mask
);
12934 bfd_put_32 (abfd
, contents
, address
);
12938 #define IS_ARM_TLS_RELOC(R_TYPE) \
12939 ((R_TYPE) == R_ARM_TLS_GD32 \
12940 || (R_TYPE) == R_ARM_TLS_GD32_FDPIC \
12941 || (R_TYPE) == R_ARM_TLS_LDO32 \
12942 || (R_TYPE) == R_ARM_TLS_LDM32 \
12943 || (R_TYPE) == R_ARM_TLS_LDM32_FDPIC \
12944 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
12945 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
12946 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
12947 || (R_TYPE) == R_ARM_TLS_LE32 \
12948 || (R_TYPE) == R_ARM_TLS_IE32 \
12949 || (R_TYPE) == R_ARM_TLS_IE32_FDPIC \
12950 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
12952 /* Specific set of relocations for the gnu tls dialect. */
12953 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
12954 ((R_TYPE) == R_ARM_TLS_GOTDESC \
12955 || (R_TYPE) == R_ARM_TLS_CALL \
12956 || (R_TYPE) == R_ARM_THM_TLS_CALL \
12957 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
12958 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
12960 /* Relocate an ARM ELF section. */
12963 elf32_arm_relocate_section (bfd
* output_bfd
,
12964 struct bfd_link_info
* info
,
12966 asection
* input_section
,
12967 bfd_byte
* contents
,
12968 Elf_Internal_Rela
* relocs
,
12969 Elf_Internal_Sym
* local_syms
,
12970 asection
** local_sections
)
12972 Elf_Internal_Shdr
*symtab_hdr
;
12973 struct elf_link_hash_entry
**sym_hashes
;
12974 Elf_Internal_Rela
*rel
;
12975 Elf_Internal_Rela
*relend
;
12977 struct elf32_arm_link_hash_table
* globals
;
12979 globals
= elf32_arm_hash_table (info
);
12980 if (globals
== NULL
)
12983 symtab_hdr
= & elf_symtab_hdr (input_bfd
);
12984 sym_hashes
= elf_sym_hashes (input_bfd
);
12987 relend
= relocs
+ input_section
->reloc_count
;
12988 for (; rel
< relend
; rel
++)
12991 reloc_howto_type
* howto
;
12992 unsigned long r_symndx
;
12993 Elf_Internal_Sym
* sym
;
12995 struct elf_link_hash_entry
* h
;
12996 bfd_vma relocation
;
12997 bfd_reloc_status_type r
;
13000 bfd_boolean unresolved_reloc
= FALSE
;
13001 char *error_message
= NULL
;
13003 r_symndx
= ELF32_R_SYM (rel
->r_info
);
13004 r_type
= ELF32_R_TYPE (rel
->r_info
);
13005 r_type
= arm_real_reloc_type (globals
, r_type
);
13007 if ( r_type
== R_ARM_GNU_VTENTRY
13008 || r_type
== R_ARM_GNU_VTINHERIT
)
13011 howto
= bfd_reloc
.howto
= elf32_arm_howto_from_type (r_type
);
13014 return _bfd_unrecognized_reloc (input_bfd
, input_section
, r_type
);
13020 if (r_symndx
< symtab_hdr
->sh_info
)
13022 sym
= local_syms
+ r_symndx
;
13023 sym_type
= ELF32_ST_TYPE (sym
->st_info
);
13024 sec
= local_sections
[r_symndx
];
13026 /* An object file might have a reference to a local
13027 undefined symbol. This is a daft object file, but we
13028 should at least do something about it. V4BX & NONE
13029 relocations do not use the symbol and are explicitly
13030 allowed to use the undefined symbol, so allow those.
13031 Likewise for relocations against STN_UNDEF. */
13032 if (r_type
!= R_ARM_V4BX
13033 && r_type
!= R_ARM_NONE
13034 && r_symndx
!= STN_UNDEF
13035 && bfd_is_und_section (sec
)
13036 && ELF_ST_BIND (sym
->st_info
) != STB_WEAK
)
13037 (*info
->callbacks
->undefined_symbol
)
13038 (info
, bfd_elf_string_from_elf_section
13039 (input_bfd
, symtab_hdr
->sh_link
, sym
->st_name
),
13040 input_bfd
, input_section
,
13041 rel
->r_offset
, TRUE
);
13043 if (globals
->use_rel
)
13045 relocation
= (sec
->output_section
->vma
13046 + sec
->output_offset
13048 if (!bfd_link_relocatable (info
)
13049 && (sec
->flags
& SEC_MERGE
)
13050 && ELF_ST_TYPE (sym
->st_info
) == STT_SECTION
)
13053 bfd_vma addend
, value
;
13057 case R_ARM_MOVW_ABS_NC
:
13058 case R_ARM_MOVT_ABS
:
13059 value
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
);
13060 addend
= ((value
& 0xf0000) >> 4) | (value
& 0xfff);
13061 addend
= (addend
^ 0x8000) - 0x8000;
13064 case R_ARM_THM_MOVW_ABS_NC
:
13065 case R_ARM_THM_MOVT_ABS
:
13066 value
= bfd_get_16 (input_bfd
, contents
+ rel
->r_offset
)
13068 value
|= bfd_get_16 (input_bfd
,
13069 contents
+ rel
->r_offset
+ 2);
13070 addend
= ((value
& 0xf7000) >> 4) | (value
& 0xff)
13071 | ((value
& 0x04000000) >> 15);
13072 addend
= (addend
^ 0x8000) - 0x8000;
13076 if (howto
->rightshift
13077 || (howto
->src_mask
& (howto
->src_mask
+ 1)))
13080 /* xgettext:c-format */
13081 (_("%pB(%pA+%#" PRIx64
"): "
13082 "%s relocation against SEC_MERGE section"),
13083 input_bfd
, input_section
,
13084 (uint64_t) rel
->r_offset
, howto
->name
);
13088 value
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
);
13090 /* Get the (signed) value from the instruction. */
13091 addend
= value
& howto
->src_mask
;
13092 if (addend
& ((howto
->src_mask
+ 1) >> 1))
13094 bfd_signed_vma mask
;
13097 mask
&= ~ howto
->src_mask
;
13105 _bfd_elf_rel_local_sym (output_bfd
, sym
, &msec
, addend
)
13107 addend
+= msec
->output_section
->vma
+ msec
->output_offset
;
13109 /* Cases here must match those in the preceding
13110 switch statement. */
13113 case R_ARM_MOVW_ABS_NC
:
13114 case R_ARM_MOVT_ABS
:
13115 value
= (value
& 0xfff0f000) | ((addend
& 0xf000) << 4)
13116 | (addend
& 0xfff);
13117 bfd_put_32 (input_bfd
, value
, contents
+ rel
->r_offset
);
13120 case R_ARM_THM_MOVW_ABS_NC
:
13121 case R_ARM_THM_MOVT_ABS
:
13122 value
= (value
& 0xfbf08f00) | ((addend
& 0xf700) << 4)
13123 | (addend
& 0xff) | ((addend
& 0x0800) << 15);
13124 bfd_put_16 (input_bfd
, value
>> 16,
13125 contents
+ rel
->r_offset
);
13126 bfd_put_16 (input_bfd
, value
,
13127 contents
+ rel
->r_offset
+ 2);
13131 value
= (value
& ~ howto
->dst_mask
)
13132 | (addend
& howto
->dst_mask
);
13133 bfd_put_32 (input_bfd
, value
, contents
+ rel
->r_offset
);
13139 relocation
= _bfd_elf_rela_local_sym (output_bfd
, sym
, &sec
, rel
);
13143 bfd_boolean warned
, ignored
;
13145 RELOC_FOR_GLOBAL_SYMBOL (info
, input_bfd
, input_section
, rel
,
13146 r_symndx
, symtab_hdr
, sym_hashes
,
13147 h
, sec
, relocation
,
13148 unresolved_reloc
, warned
, ignored
);
13150 sym_type
= h
->type
;
13153 if (sec
!= NULL
&& discarded_section (sec
))
13154 RELOC_AGAINST_DISCARDED_SECTION (info
, input_bfd
, input_section
,
13155 rel
, 1, relend
, howto
, 0, contents
);
13157 if (bfd_link_relocatable (info
))
13159 /* This is a relocatable link. We don't have to change
13160 anything, unless the reloc is against a section symbol,
13161 in which case we have to adjust according to where the
13162 section symbol winds up in the output section. */
13163 if (sym
!= NULL
&& ELF_ST_TYPE (sym
->st_info
) == STT_SECTION
)
13165 if (globals
->use_rel
)
13166 arm_add_to_rel (input_bfd
, contents
+ rel
->r_offset
,
13167 howto
, (bfd_signed_vma
) sec
->output_offset
);
13169 rel
->r_addend
+= sec
->output_offset
;
13175 name
= h
->root
.root
.string
;
13178 name
= (bfd_elf_string_from_elf_section
13179 (input_bfd
, symtab_hdr
->sh_link
, sym
->st_name
));
13180 if (name
== NULL
|| *name
== '\0')
13181 name
= bfd_section_name (input_bfd
, sec
);
13184 if (r_symndx
!= STN_UNDEF
13185 && r_type
!= R_ARM_NONE
13187 || h
->root
.type
== bfd_link_hash_defined
13188 || h
->root
.type
== bfd_link_hash_defweak
)
13189 && IS_ARM_TLS_RELOC (r_type
) != (sym_type
== STT_TLS
))
13192 ((sym_type
== STT_TLS
13193 /* xgettext:c-format */
13194 ? _("%pB(%pA+%#" PRIx64
"): %s used with TLS symbol %s")
13195 /* xgettext:c-format */
13196 : _("%pB(%pA+%#" PRIx64
"): %s used with non-TLS symbol %s")),
13199 (uint64_t) rel
->r_offset
,
13204 /* We call elf32_arm_final_link_relocate unless we're completely
13205 done, i.e., the relaxation produced the final output we want,
13206 and we won't let anybody mess with it. Also, we have to do
13207 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
13208 both in relaxed and non-relaxed cases. */
13209 if ((elf32_arm_tls_transition (info
, r_type
, h
) != (unsigned)r_type
)
13210 || (IS_ARM_TLS_GNU_RELOC (r_type
)
13211 && !((h
? elf32_arm_hash_entry (h
)->tls_type
:
13212 elf32_arm_local_got_tls_type (input_bfd
)[r_symndx
])
13215 r
= elf32_arm_tls_relax (globals
, input_bfd
, input_section
,
13216 contents
, rel
, h
== NULL
);
13217 /* This may have been marked unresolved because it came from
13218 a shared library. But we've just dealt with that. */
13219 unresolved_reloc
= 0;
13222 r
= bfd_reloc_continue
;
13224 if (r
== bfd_reloc_continue
)
13226 unsigned char branch_type
=
13227 h
? ARM_GET_SYM_BRANCH_TYPE (h
->target_internal
)
13228 : ARM_GET_SYM_BRANCH_TYPE (sym
->st_target_internal
);
13230 r
= elf32_arm_final_link_relocate (howto
, input_bfd
, output_bfd
,
13231 input_section
, contents
, rel
,
13232 relocation
, info
, sec
, name
,
13233 sym_type
, branch_type
, h
,
13238 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
13239 because such sections are not SEC_ALLOC and thus ld.so will
13240 not process them. */
13241 if (unresolved_reloc
13242 && !((input_section
->flags
& SEC_DEBUGGING
) != 0
13244 && _bfd_elf_section_offset (output_bfd
, info
, input_section
,
13245 rel
->r_offset
) != (bfd_vma
) -1)
13248 /* xgettext:c-format */
13249 (_("%pB(%pA+%#" PRIx64
"): "
13250 "unresolvable %s relocation against symbol `%s'"),
13253 (uint64_t) rel
->r_offset
,
13255 h
->root
.root
.string
);
13259 if (r
!= bfd_reloc_ok
)
13263 case bfd_reloc_overflow
:
13264 /* If the overflowing reloc was to an undefined symbol,
13265 we have already printed one error message and there
13266 is no point complaining again. */
13267 if (!h
|| h
->root
.type
!= bfd_link_hash_undefined
)
13268 (*info
->callbacks
->reloc_overflow
)
13269 (info
, (h
? &h
->root
: NULL
), name
, howto
->name
,
13270 (bfd_vma
) 0, input_bfd
, input_section
, rel
->r_offset
);
13273 case bfd_reloc_undefined
:
13274 (*info
->callbacks
->undefined_symbol
)
13275 (info
, name
, input_bfd
, input_section
, rel
->r_offset
, TRUE
);
13278 case bfd_reloc_outofrange
:
13279 error_message
= _("out of range");
13282 case bfd_reloc_notsupported
:
13283 error_message
= _("unsupported relocation");
13286 case bfd_reloc_dangerous
:
13287 /* error_message should already be set. */
13291 error_message
= _("unknown error");
13292 /* Fall through. */
13295 BFD_ASSERT (error_message
!= NULL
);
13296 (*info
->callbacks
->reloc_dangerous
)
13297 (info
, error_message
, input_bfd
, input_section
, rel
->r_offset
);
13306 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
13307 adds the edit to the start of the list. (The list must be built in order of
13308 ascending TINDEX: the function's callers are primarily responsible for
13309 maintaining that condition). */
13312 add_unwind_table_edit (arm_unwind_table_edit
**head
,
13313 arm_unwind_table_edit
**tail
,
13314 arm_unwind_edit_type type
,
13315 asection
*linked_section
,
13316 unsigned int tindex
)
13318 arm_unwind_table_edit
*new_edit
= (arm_unwind_table_edit
*)
13319 xmalloc (sizeof (arm_unwind_table_edit
));
13321 new_edit
->type
= type
;
13322 new_edit
->linked_section
= linked_section
;
13323 new_edit
->index
= tindex
;
13327 new_edit
->next
= NULL
;
13330 (*tail
)->next
= new_edit
;
13332 (*tail
) = new_edit
;
13335 (*head
) = new_edit
;
13339 new_edit
->next
= *head
;
13348 static _arm_elf_section_data
*get_arm_elf_section_data (asection
*);
13350 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
13352 adjust_exidx_size(asection
*exidx_sec
, int adjust
)
13356 if (!exidx_sec
->rawsize
)
13357 exidx_sec
->rawsize
= exidx_sec
->size
;
13359 bfd_set_section_size (exidx_sec
->owner
, exidx_sec
, exidx_sec
->size
+ adjust
);
13360 out_sec
= exidx_sec
->output_section
;
13361 /* Adjust size of output section. */
13362 bfd_set_section_size (out_sec
->owner
, out_sec
, out_sec
->size
+adjust
);
13365 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
13367 insert_cantunwind_after(asection
*text_sec
, asection
*exidx_sec
)
13369 struct _arm_elf_section_data
*exidx_arm_data
;
13371 exidx_arm_data
= get_arm_elf_section_data (exidx_sec
);
13372 add_unwind_table_edit (
13373 &exidx_arm_data
->u
.exidx
.unwind_edit_list
,
13374 &exidx_arm_data
->u
.exidx
.unwind_edit_tail
,
13375 INSERT_EXIDX_CANTUNWIND_AT_END
, text_sec
, UINT_MAX
);
13377 exidx_arm_data
->additional_reloc_count
++;
13379 adjust_exidx_size(exidx_sec
, 8);
13382 /* Scan .ARM.exidx tables, and create a list describing edits which should be
13383 made to those tables, such that:
13385 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
13386 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
13387 codes which have been inlined into the index).
13389 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
13391 The edits are applied when the tables are written
13392 (in elf32_arm_write_section). */
13395 elf32_arm_fix_exidx_coverage (asection
**text_section_order
,
13396 unsigned int num_text_sections
,
13397 struct bfd_link_info
*info
,
13398 bfd_boolean merge_exidx_entries
)
13401 unsigned int last_second_word
= 0, i
;
13402 asection
*last_exidx_sec
= NULL
;
13403 asection
*last_text_sec
= NULL
;
13404 int last_unwind_type
= -1;
13406 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
13408 for (inp
= info
->input_bfds
; inp
!= NULL
; inp
= inp
->link
.next
)
13412 for (sec
= inp
->sections
; sec
!= NULL
; sec
= sec
->next
)
13414 struct bfd_elf_section_data
*elf_sec
= elf_section_data (sec
);
13415 Elf_Internal_Shdr
*hdr
= &elf_sec
->this_hdr
;
13417 if (!hdr
|| hdr
->sh_type
!= SHT_ARM_EXIDX
)
13420 if (elf_sec
->linked_to
)
13422 Elf_Internal_Shdr
*linked_hdr
13423 = &elf_section_data (elf_sec
->linked_to
)->this_hdr
;
13424 struct _arm_elf_section_data
*linked_sec_arm_data
13425 = get_arm_elf_section_data (linked_hdr
->bfd_section
);
13427 if (linked_sec_arm_data
== NULL
)
13430 /* Link this .ARM.exidx section back from the text section it
13432 linked_sec_arm_data
->u
.text
.arm_exidx_sec
= sec
;
13437 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
13438 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
13439 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
13441 for (i
= 0; i
< num_text_sections
; i
++)
13443 asection
*sec
= text_section_order
[i
];
13444 asection
*exidx_sec
;
13445 struct _arm_elf_section_data
*arm_data
= get_arm_elf_section_data (sec
);
13446 struct _arm_elf_section_data
*exidx_arm_data
;
13447 bfd_byte
*contents
= NULL
;
13448 int deleted_exidx_bytes
= 0;
13450 arm_unwind_table_edit
*unwind_edit_head
= NULL
;
13451 arm_unwind_table_edit
*unwind_edit_tail
= NULL
;
13452 Elf_Internal_Shdr
*hdr
;
13455 if (arm_data
== NULL
)
13458 exidx_sec
= arm_data
->u
.text
.arm_exidx_sec
;
13459 if (exidx_sec
== NULL
)
13461 /* Section has no unwind data. */
13462 if (last_unwind_type
== 0 || !last_exidx_sec
)
13465 /* Ignore zero sized sections. */
13466 if (sec
->size
== 0)
13469 insert_cantunwind_after(last_text_sec
, last_exidx_sec
);
13470 last_unwind_type
= 0;
13474 /* Skip /DISCARD/ sections. */
13475 if (bfd_is_abs_section (exidx_sec
->output_section
))
13478 hdr
= &elf_section_data (exidx_sec
)->this_hdr
;
13479 if (hdr
->sh_type
!= SHT_ARM_EXIDX
)
13482 exidx_arm_data
= get_arm_elf_section_data (exidx_sec
);
13483 if (exidx_arm_data
== NULL
)
13486 ibfd
= exidx_sec
->owner
;
13488 if (hdr
->contents
!= NULL
)
13489 contents
= hdr
->contents
;
13490 else if (! bfd_malloc_and_get_section (ibfd
, exidx_sec
, &contents
))
13494 if (last_unwind_type
> 0)
13496 unsigned int first_word
= bfd_get_32 (ibfd
, contents
);
13497 /* Add cantunwind if first unwind item does not match section
13499 if (first_word
!= sec
->vma
)
13501 insert_cantunwind_after (last_text_sec
, last_exidx_sec
);
13502 last_unwind_type
= 0;
13506 for (j
= 0; j
< hdr
->sh_size
; j
+= 8)
13508 unsigned int second_word
= bfd_get_32 (ibfd
, contents
+ j
+ 4);
13512 /* An EXIDX_CANTUNWIND entry. */
13513 if (second_word
== 1)
13515 if (last_unwind_type
== 0)
13519 /* Inlined unwinding data. Merge if equal to previous. */
13520 else if ((second_word
& 0x80000000) != 0)
13522 if (merge_exidx_entries
13523 && last_second_word
== second_word
&& last_unwind_type
== 1)
13526 last_second_word
= second_word
;
13528 /* Normal table entry. In theory we could merge these too,
13529 but duplicate entries are likely to be much less common. */
13533 if (elide
&& !bfd_link_relocatable (info
))
13535 add_unwind_table_edit (&unwind_edit_head
, &unwind_edit_tail
,
13536 DELETE_EXIDX_ENTRY
, NULL
, j
/ 8);
13538 deleted_exidx_bytes
+= 8;
13541 last_unwind_type
= unwind_type
;
13544 /* Free contents if we allocated it ourselves. */
13545 if (contents
!= hdr
->contents
)
13548 /* Record edits to be applied later (in elf32_arm_write_section). */
13549 exidx_arm_data
->u
.exidx
.unwind_edit_list
= unwind_edit_head
;
13550 exidx_arm_data
->u
.exidx
.unwind_edit_tail
= unwind_edit_tail
;
13552 if (deleted_exidx_bytes
> 0)
13553 adjust_exidx_size(exidx_sec
, -deleted_exidx_bytes
);
13555 last_exidx_sec
= exidx_sec
;
13556 last_text_sec
= sec
;
13559 /* Add terminating CANTUNWIND entry. */
13560 if (!bfd_link_relocatable (info
) && last_exidx_sec
13561 && last_unwind_type
!= 0)
13562 insert_cantunwind_after(last_text_sec
, last_exidx_sec
);
13568 elf32_arm_output_glue_section (struct bfd_link_info
*info
, bfd
*obfd
,
13569 bfd
*ibfd
, const char *name
)
13571 asection
*sec
, *osec
;
13573 sec
= bfd_get_linker_section (ibfd
, name
);
13574 if (sec
== NULL
|| (sec
->flags
& SEC_EXCLUDE
) != 0)
13577 osec
= sec
->output_section
;
13578 if (elf32_arm_write_section (obfd
, info
, sec
, sec
->contents
))
13581 if (! bfd_set_section_contents (obfd
, osec
, sec
->contents
,
13582 sec
->output_offset
, sec
->size
))
13589 elf32_arm_final_link (bfd
*abfd
, struct bfd_link_info
*info
)
13591 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (info
);
13592 asection
*sec
, *osec
;
13594 if (globals
== NULL
)
13597 /* Invoke the regular ELF backend linker to do all the work. */
13598 if (!bfd_elf_final_link (abfd
, info
))
13601 /* Process stub sections (eg BE8 encoding, ...). */
13602 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
13604 for (i
=0; i
<htab
->top_id
; i
++)
13606 sec
= htab
->stub_group
[i
].stub_sec
;
13607 /* Only process it once, in its link_sec slot. */
13608 if (sec
&& i
== htab
->stub_group
[i
].link_sec
->id
)
13610 osec
= sec
->output_section
;
13611 elf32_arm_write_section (abfd
, info
, sec
, sec
->contents
);
13612 if (! bfd_set_section_contents (abfd
, osec
, sec
->contents
,
13613 sec
->output_offset
, sec
->size
))
13618 /* Write out any glue sections now that we have created all the
13620 if (globals
->bfd_of_glue_owner
!= NULL
)
13622 if (! elf32_arm_output_glue_section (info
, abfd
,
13623 globals
->bfd_of_glue_owner
,
13624 ARM2THUMB_GLUE_SECTION_NAME
))
13627 if (! elf32_arm_output_glue_section (info
, abfd
,
13628 globals
->bfd_of_glue_owner
,
13629 THUMB2ARM_GLUE_SECTION_NAME
))
13632 if (! elf32_arm_output_glue_section (info
, abfd
,
13633 globals
->bfd_of_glue_owner
,
13634 VFP11_ERRATUM_VENEER_SECTION_NAME
))
13637 if (! elf32_arm_output_glue_section (info
, abfd
,
13638 globals
->bfd_of_glue_owner
,
13639 STM32L4XX_ERRATUM_VENEER_SECTION_NAME
))
13642 if (! elf32_arm_output_glue_section (info
, abfd
,
13643 globals
->bfd_of_glue_owner
,
13644 ARM_BX_GLUE_SECTION_NAME
))
13651 /* Return a best guess for the machine number based on the attributes. */
13653 static unsigned int
13654 bfd_arm_get_mach_from_attributes (bfd
* abfd
)
13656 int arch
= bfd_elf_get_obj_attr_int (abfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
13660 case TAG_CPU_ARCH_PRE_V4
: return bfd_mach_arm_3M
;
13661 case TAG_CPU_ARCH_V4
: return bfd_mach_arm_4
;
13662 case TAG_CPU_ARCH_V4T
: return bfd_mach_arm_4T
;
13663 case TAG_CPU_ARCH_V5T
: return bfd_mach_arm_5T
;
13665 case TAG_CPU_ARCH_V5TE
:
13669 BFD_ASSERT (Tag_CPU_name
< NUM_KNOWN_OBJ_ATTRIBUTES
);
13670 name
= elf_known_obj_attributes (abfd
) [OBJ_ATTR_PROC
][Tag_CPU_name
].s
;
13674 if (strcmp (name
, "IWMMXT2") == 0)
13675 return bfd_mach_arm_iWMMXt2
;
13677 if (strcmp (name
, "IWMMXT") == 0)
13678 return bfd_mach_arm_iWMMXt
;
13680 if (strcmp (name
, "XSCALE") == 0)
13684 BFD_ASSERT (Tag_WMMX_arch
< NUM_KNOWN_OBJ_ATTRIBUTES
);
13685 wmmx
= elf_known_obj_attributes (abfd
) [OBJ_ATTR_PROC
][Tag_WMMX_arch
].i
;
13688 case 1: return bfd_mach_arm_iWMMXt
;
13689 case 2: return bfd_mach_arm_iWMMXt2
;
13690 default: return bfd_mach_arm_XScale
;
13695 return bfd_mach_arm_5TE
;
13698 case TAG_CPU_ARCH_V5TEJ
:
13699 return bfd_mach_arm_5TEJ
;
13700 case TAG_CPU_ARCH_V6
:
13701 return bfd_mach_arm_6
;
13702 case TAG_CPU_ARCH_V6KZ
:
13703 return bfd_mach_arm_6KZ
;
13704 case TAG_CPU_ARCH_V6T2
:
13705 return bfd_mach_arm_6T2
;
13706 case TAG_CPU_ARCH_V6K
:
13707 return bfd_mach_arm_6K
;
13708 case TAG_CPU_ARCH_V7
:
13709 return bfd_mach_arm_7
;
13710 case TAG_CPU_ARCH_V6_M
:
13711 return bfd_mach_arm_6M
;
13712 case TAG_CPU_ARCH_V6S_M
:
13713 return bfd_mach_arm_6SM
;
13714 case TAG_CPU_ARCH_V7E_M
:
13715 return bfd_mach_arm_7EM
;
13716 case TAG_CPU_ARCH_V8
:
13717 return bfd_mach_arm_8
;
13718 case TAG_CPU_ARCH_V8R
:
13719 return bfd_mach_arm_8R
;
13720 case TAG_CPU_ARCH_V8M_BASE
:
13721 return bfd_mach_arm_8M_BASE
;
13722 case TAG_CPU_ARCH_V8M_MAIN
:
13723 return bfd_mach_arm_8M_MAIN
;
13724 case TAG_CPU_ARCH_V8_1M_MAIN
:
13725 return bfd_mach_arm_8_1M_MAIN
;
13728 /* Force entry to be added for any new known Tag_CPU_arch value. */
13729 BFD_ASSERT (arch
> MAX_TAG_CPU_ARCH
);
13731 /* Unknown Tag_CPU_arch value. */
13732 return bfd_mach_arm_unknown
;
13736 /* Set the right machine number. */
13739 elf32_arm_object_p (bfd
*abfd
)
13743 mach
= bfd_arm_get_mach_from_notes (abfd
, ARM_NOTE_SECTION
);
13745 if (mach
== bfd_mach_arm_unknown
)
13747 if (elf_elfheader (abfd
)->e_flags
& EF_ARM_MAVERICK_FLOAT
)
13748 mach
= bfd_mach_arm_ep9312
;
13750 mach
= bfd_arm_get_mach_from_attributes (abfd
);
13753 bfd_default_set_arch_mach (abfd
, bfd_arch_arm
, mach
);
13757 /* Function to keep ARM specific flags in the ELF header. */
13760 elf32_arm_set_private_flags (bfd
*abfd
, flagword flags
)
13762 if (elf_flags_init (abfd
)
13763 && elf_elfheader (abfd
)->e_flags
!= flags
)
13765 if (EF_ARM_EABI_VERSION (flags
) == EF_ARM_EABI_UNKNOWN
)
13767 if (flags
& EF_ARM_INTERWORK
)
13769 (_("warning: not setting interworking flag of %pB since it has already been specified as non-interworking"),
13773 (_("warning: clearing the interworking flag of %pB due to outside request"),
13779 elf_elfheader (abfd
)->e_flags
= flags
;
13780 elf_flags_init (abfd
) = TRUE
;
13786 /* Copy backend specific data from one object module to another. */
13789 elf32_arm_copy_private_bfd_data (bfd
*ibfd
, bfd
*obfd
)
13792 flagword out_flags
;
13794 if (! is_arm_elf (ibfd
) || ! is_arm_elf (obfd
))
13797 in_flags
= elf_elfheader (ibfd
)->e_flags
;
13798 out_flags
= elf_elfheader (obfd
)->e_flags
;
13800 if (elf_flags_init (obfd
)
13801 && EF_ARM_EABI_VERSION (out_flags
) == EF_ARM_EABI_UNKNOWN
13802 && in_flags
!= out_flags
)
13804 /* Cannot mix APCS26 and APCS32 code. */
13805 if ((in_flags
& EF_ARM_APCS_26
) != (out_flags
& EF_ARM_APCS_26
))
13808 /* Cannot mix float APCS and non-float APCS code. */
13809 if ((in_flags
& EF_ARM_APCS_FLOAT
) != (out_flags
& EF_ARM_APCS_FLOAT
))
13812 /* If the src and dest have different interworking flags
13813 then turn off the interworking bit. */
13814 if ((in_flags
& EF_ARM_INTERWORK
) != (out_flags
& EF_ARM_INTERWORK
))
13816 if (out_flags
& EF_ARM_INTERWORK
)
13818 (_("warning: clearing the interworking flag of %pB because non-interworking code in %pB has been linked with it"),
13821 in_flags
&= ~EF_ARM_INTERWORK
;
13824 /* Likewise for PIC, though don't warn for this case. */
13825 if ((in_flags
& EF_ARM_PIC
) != (out_flags
& EF_ARM_PIC
))
13826 in_flags
&= ~EF_ARM_PIC
;
13829 elf_elfheader (obfd
)->e_flags
= in_flags
;
13830 elf_flags_init (obfd
) = TRUE
;
13832 return _bfd_elf_copy_private_bfd_data (ibfd
, obfd
);
13835 /* Values for Tag_ABI_PCS_R9_use. */
13844 /* Values for Tag_ABI_PCS_RW_data. */
13847 AEABI_PCS_RW_data_absolute
,
13848 AEABI_PCS_RW_data_PCrel
,
13849 AEABI_PCS_RW_data_SBrel
,
13850 AEABI_PCS_RW_data_unused
13853 /* Values for Tag_ABI_enum_size. */
13859 AEABI_enum_forced_wide
13862 /* Determine whether an object attribute tag takes an integer, a
13866 elf32_arm_obj_attrs_arg_type (int tag
)
13868 if (tag
== Tag_compatibility
)
13869 return ATTR_TYPE_FLAG_INT_VAL
| ATTR_TYPE_FLAG_STR_VAL
;
13870 else if (tag
== Tag_nodefaults
)
13871 return ATTR_TYPE_FLAG_INT_VAL
| ATTR_TYPE_FLAG_NO_DEFAULT
;
13872 else if (tag
== Tag_CPU_raw_name
|| tag
== Tag_CPU_name
)
13873 return ATTR_TYPE_FLAG_STR_VAL
;
13875 return ATTR_TYPE_FLAG_INT_VAL
;
13877 return (tag
& 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL
: ATTR_TYPE_FLAG_INT_VAL
;
13880 /* The ABI defines that Tag_conformance should be emitted first, and that
13881 Tag_nodefaults should be second (if either is defined). This sets those
13882 two positions, and bumps up the position of all the remaining tags to
13885 elf32_arm_obj_attrs_order (int num
)
13887 if (num
== LEAST_KNOWN_OBJ_ATTRIBUTE
)
13888 return Tag_conformance
;
13889 if (num
== LEAST_KNOWN_OBJ_ATTRIBUTE
+ 1)
13890 return Tag_nodefaults
;
13891 if ((num
- 2) < Tag_nodefaults
)
13893 if ((num
- 1) < Tag_conformance
)
13898 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
13900 elf32_arm_obj_attrs_handle_unknown (bfd
*abfd
, int tag
)
13902 if ((tag
& 127) < 64)
13905 (_("%pB: unknown mandatory EABI object attribute %d"),
13907 bfd_set_error (bfd_error_bad_value
);
13913 (_("warning: %pB: unknown EABI object attribute %d"),
13919 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
13920 Returns -1 if no architecture could be read. */
13923 get_secondary_compatible_arch (bfd
*abfd
)
13925 obj_attribute
*attr
=
13926 &elf_known_obj_attributes_proc (abfd
)[Tag_also_compatible_with
];
13928 /* Note: the tag and its argument below are uleb128 values, though
13929 currently-defined values fit in one byte for each. */
13931 && attr
->s
[0] == Tag_CPU_arch
13932 && (attr
->s
[1] & 128) != 128
13933 && attr
->s
[2] == 0)
13936 /* This tag is "safely ignorable", so don't complain if it looks funny. */
13940 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
13941 The tag is removed if ARCH is -1. */
13944 set_secondary_compatible_arch (bfd
*abfd
, int arch
)
13946 obj_attribute
*attr
=
13947 &elf_known_obj_attributes_proc (abfd
)[Tag_also_compatible_with
];
13955 /* Note: the tag and its argument below are uleb128 values, though
13956 currently-defined values fit in one byte for each. */
13958 attr
->s
= (char *) bfd_alloc (abfd
, 3);
13959 attr
->s
[0] = Tag_CPU_arch
;
13964 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
13968 tag_cpu_arch_combine (bfd
*ibfd
, int oldtag
, int *secondary_compat_out
,
13969 int newtag
, int secondary_compat
)
13971 #define T(X) TAG_CPU_ARCH_##X
13972 int tagl
, tagh
, result
;
13975 T(V6T2
), /* PRE_V4. */
13977 T(V6T2
), /* V4T. */
13978 T(V6T2
), /* V5T. */
13979 T(V6T2
), /* V5TE. */
13980 T(V6T2
), /* V5TEJ. */
13983 T(V6T2
) /* V6T2. */
13987 T(V6K
), /* PRE_V4. */
13991 T(V6K
), /* V5TE. */
13992 T(V6K
), /* V5TEJ. */
13994 T(V6KZ
), /* V6KZ. */
14000 T(V7
), /* PRE_V4. */
14005 T(V7
), /* V5TEJ. */
14018 T(V6K
), /* V5TE. */
14019 T(V6K
), /* V5TEJ. */
14021 T(V6KZ
), /* V6KZ. */
14025 T(V6_M
) /* V6_M. */
14027 const int v6s_m
[] =
14033 T(V6K
), /* V5TE. */
14034 T(V6K
), /* V5TEJ. */
14036 T(V6KZ
), /* V6KZ. */
14040 T(V6S_M
), /* V6_M. */
14041 T(V6S_M
) /* V6S_M. */
14043 const int v7e_m
[] =
14047 T(V7E_M
), /* V4T. */
14048 T(V7E_M
), /* V5T. */
14049 T(V7E_M
), /* V5TE. */
14050 T(V7E_M
), /* V5TEJ. */
14051 T(V7E_M
), /* V6. */
14052 T(V7E_M
), /* V6KZ. */
14053 T(V7E_M
), /* V6T2. */
14054 T(V7E_M
), /* V6K. */
14055 T(V7E_M
), /* V7. */
14056 T(V7E_M
), /* V6_M. */
14057 T(V7E_M
), /* V6S_M. */
14058 T(V7E_M
) /* V7E_M. */
14062 T(V8
), /* PRE_V4. */
14067 T(V8
), /* V5TEJ. */
14074 T(V8
), /* V6S_M. */
14075 T(V8
), /* V7E_M. */
14080 T(V8R
), /* PRE_V4. */
14084 T(V8R
), /* V5TE. */
14085 T(V8R
), /* V5TEJ. */
14087 T(V8R
), /* V6KZ. */
14088 T(V8R
), /* V6T2. */
14091 T(V8R
), /* V6_M. */
14092 T(V8R
), /* V6S_M. */
14093 T(V8R
), /* V7E_M. */
14097 const int v8m_baseline
[] =
14110 T(V8M_BASE
), /* V6_M. */
14111 T(V8M_BASE
), /* V6S_M. */
14115 T(V8M_BASE
) /* V8-M BASELINE. */
14117 const int v8m_mainline
[] =
14129 T(V8M_MAIN
), /* V7. */
14130 T(V8M_MAIN
), /* V6_M. */
14131 T(V8M_MAIN
), /* V6S_M. */
14132 T(V8M_MAIN
), /* V7E_M. */
14135 T(V8M_MAIN
), /* V8-M BASELINE. */
14136 T(V8M_MAIN
) /* V8-M MAINLINE. */
14138 const int v8_1m_mainline
[] =
14150 T(V8_1M_MAIN
), /* V7. */
14151 T(V8_1M_MAIN
), /* V6_M. */
14152 T(V8_1M_MAIN
), /* V6S_M. */
14153 T(V8_1M_MAIN
), /* V7E_M. */
14156 T(V8_1M_MAIN
), /* V8-M BASELINE. */
14157 T(V8_1M_MAIN
), /* V8-M MAINLINE. */
14158 -1, /* Unused (18). */
14159 -1, /* Unused (19). */
14160 -1, /* Unused (20). */
14161 T(V8_1M_MAIN
) /* V8.1-M MAINLINE. */
14163 const int v4t_plus_v6_m
[] =
14169 T(V5TE
), /* V5TE. */
14170 T(V5TEJ
), /* V5TEJ. */
14172 T(V6KZ
), /* V6KZ. */
14173 T(V6T2
), /* V6T2. */
14176 T(V6_M
), /* V6_M. */
14177 T(V6S_M
), /* V6S_M. */
14178 T(V7E_M
), /* V7E_M. */
14181 T(V8M_BASE
), /* V8-M BASELINE. */
14182 T(V8M_MAIN
), /* V8-M MAINLINE. */
14183 -1, /* Unused (18). */
14184 -1, /* Unused (19). */
14185 -1, /* Unused (20). */
14186 T(V8_1M_MAIN
), /* V8.1-M MAINLINE. */
14187 T(V4T_PLUS_V6_M
) /* V4T plus V6_M. */
14189 const int *comb
[] =
14205 /* Pseudo-architecture. */
14209 /* Check we've not got a higher architecture than we know about. */
14211 if (oldtag
> MAX_TAG_CPU_ARCH
|| newtag
> MAX_TAG_CPU_ARCH
)
14213 _bfd_error_handler (_("error: %pB: unknown CPU architecture"), ibfd
);
14217 /* Override old tag if we have a Tag_also_compatible_with on the output. */
14219 if ((oldtag
== T(V6_M
) && *secondary_compat_out
== T(V4T
))
14220 || (oldtag
== T(V4T
) && *secondary_compat_out
== T(V6_M
)))
14221 oldtag
= T(V4T_PLUS_V6_M
);
14223 /* And override the new tag if we have a Tag_also_compatible_with on the
14226 if ((newtag
== T(V6_M
) && secondary_compat
== T(V4T
))
14227 || (newtag
== T(V4T
) && secondary_compat
== T(V6_M
)))
14228 newtag
= T(V4T_PLUS_V6_M
);
14230 tagl
= (oldtag
< newtag
) ? oldtag
: newtag
;
14231 result
= tagh
= (oldtag
> newtag
) ? oldtag
: newtag
;
14233 /* Architectures before V6KZ add features monotonically. */
14234 if (tagh
<= TAG_CPU_ARCH_V6KZ
)
14237 result
= comb
[tagh
- T(V6T2
)] ? comb
[tagh
- T(V6T2
)][tagl
] : -1;
14239 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
14240 as the canonical version. */
14241 if (result
== T(V4T_PLUS_V6_M
))
14244 *secondary_compat_out
= T(V6_M
);
14247 *secondary_compat_out
= -1;
14251 _bfd_error_handler (_("error: %pB: conflicting CPU architectures %d/%d"),
14252 ibfd
, oldtag
, newtag
);
14260 /* Query attributes object to see if integer divide instructions may be
14261 present in an object. */
14263 elf32_arm_attributes_accept_div (const obj_attribute
*attr
)
14265 int arch
= attr
[Tag_CPU_arch
].i
;
14266 int profile
= attr
[Tag_CPU_arch_profile
].i
;
14268 switch (attr
[Tag_DIV_use
].i
)
14271 /* Integer divide allowed if instruction contained in archetecture. */
14272 if (arch
== TAG_CPU_ARCH_V7
&& (profile
== 'R' || profile
== 'M'))
14274 else if (arch
>= TAG_CPU_ARCH_V7E_M
)
14280 /* Integer divide explicitly prohibited. */
14284 /* Unrecognised case - treat as allowing divide everywhere. */
14286 /* Integer divide allowed in ARM state. */
14291 /* Query attributes object to see if integer divide instructions are
14292 forbidden to be in the object. This is not the inverse of
14293 elf32_arm_attributes_accept_div. */
14295 elf32_arm_attributes_forbid_div (const obj_attribute
*attr
)
14297 return attr
[Tag_DIV_use
].i
== 1;
14300 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
14301 are conflicting attributes. */
14304 elf32_arm_merge_eabi_attributes (bfd
*ibfd
, struct bfd_link_info
*info
)
14306 bfd
*obfd
= info
->output_bfd
;
14307 obj_attribute
*in_attr
;
14308 obj_attribute
*out_attr
;
14309 /* Some tags have 0 = don't care, 1 = strong requirement,
14310 2 = weak requirement. */
14311 static const int order_021
[3] = {0, 2, 1};
14313 bfd_boolean result
= TRUE
;
14314 const char *sec_name
= get_elf_backend_data (ibfd
)->obj_attrs_section
;
14316 /* Skip the linker stubs file. This preserves previous behavior
14317 of accepting unknown attributes in the first input file - but
14319 if (ibfd
->flags
& BFD_LINKER_CREATED
)
14322 /* Skip any input that hasn't attribute section.
14323 This enables to link object files without attribute section with
14325 if (bfd_get_section_by_name (ibfd
, sec_name
) == NULL
)
14328 if (!elf_known_obj_attributes_proc (obfd
)[0].i
)
14330 /* This is the first object. Copy the attributes. */
14331 _bfd_elf_copy_obj_attributes (ibfd
, obfd
);
14333 out_attr
= elf_known_obj_attributes_proc (obfd
);
14335 /* Use the Tag_null value to indicate the attributes have been
14339 /* We do not output objects with Tag_MPextension_use_legacy - we move
14340 the attribute's value to Tag_MPextension_use. */
14341 if (out_attr
[Tag_MPextension_use_legacy
].i
!= 0)
14343 if (out_attr
[Tag_MPextension_use
].i
!= 0
14344 && out_attr
[Tag_MPextension_use_legacy
].i
14345 != out_attr
[Tag_MPextension_use
].i
)
14348 (_("Error: %pB has both the current and legacy "
14349 "Tag_MPextension_use attributes"), ibfd
);
14353 out_attr
[Tag_MPextension_use
] =
14354 out_attr
[Tag_MPextension_use_legacy
];
14355 out_attr
[Tag_MPextension_use_legacy
].type
= 0;
14356 out_attr
[Tag_MPextension_use_legacy
].i
= 0;
14362 in_attr
= elf_known_obj_attributes_proc (ibfd
);
14363 out_attr
= elf_known_obj_attributes_proc (obfd
);
14364 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
14365 if (in_attr
[Tag_ABI_VFP_args
].i
!= out_attr
[Tag_ABI_VFP_args
].i
)
14367 /* Ignore mismatches if the object doesn't use floating point or is
14368 floating point ABI independent. */
14369 if (out_attr
[Tag_ABI_FP_number_model
].i
== AEABI_FP_number_model_none
14370 || (in_attr
[Tag_ABI_FP_number_model
].i
!= AEABI_FP_number_model_none
14371 && out_attr
[Tag_ABI_VFP_args
].i
== AEABI_VFP_args_compatible
))
14372 out_attr
[Tag_ABI_VFP_args
].i
= in_attr
[Tag_ABI_VFP_args
].i
;
14373 else if (in_attr
[Tag_ABI_FP_number_model
].i
!= AEABI_FP_number_model_none
14374 && in_attr
[Tag_ABI_VFP_args
].i
!= AEABI_VFP_args_compatible
)
14377 (_("error: %pB uses VFP register arguments, %pB does not"),
14378 in_attr
[Tag_ABI_VFP_args
].i
? ibfd
: obfd
,
14379 in_attr
[Tag_ABI_VFP_args
].i
? obfd
: ibfd
);
14384 for (i
= LEAST_KNOWN_OBJ_ATTRIBUTE
; i
< NUM_KNOWN_OBJ_ATTRIBUTES
; i
++)
14386 /* Merge this attribute with existing attributes. */
14389 case Tag_CPU_raw_name
:
14391 /* These are merged after Tag_CPU_arch. */
14394 case Tag_ABI_optimization_goals
:
14395 case Tag_ABI_FP_optimization_goals
:
14396 /* Use the first value seen. */
14401 int secondary_compat
= -1, secondary_compat_out
= -1;
14402 unsigned int saved_out_attr
= out_attr
[i
].i
;
14404 static const char *name_table
[] =
14406 /* These aren't real CPU names, but we can't guess
14407 that from the architecture version alone. */
14423 "ARM v8-M.baseline",
14424 "ARM v8-M.mainline",
14427 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
14428 secondary_compat
= get_secondary_compatible_arch (ibfd
);
14429 secondary_compat_out
= get_secondary_compatible_arch (obfd
);
14430 arch_attr
= tag_cpu_arch_combine (ibfd
, out_attr
[i
].i
,
14431 &secondary_compat_out
,
14435 /* Return with error if failed to merge. */
14436 if (arch_attr
== -1)
14439 out_attr
[i
].i
= arch_attr
;
14441 set_secondary_compatible_arch (obfd
, secondary_compat_out
);
14443 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
14444 if (out_attr
[i
].i
== saved_out_attr
)
14445 ; /* Leave the names alone. */
14446 else if (out_attr
[i
].i
== in_attr
[i
].i
)
14448 /* The output architecture has been changed to match the
14449 input architecture. Use the input names. */
14450 out_attr
[Tag_CPU_name
].s
= in_attr
[Tag_CPU_name
].s
14451 ? _bfd_elf_attr_strdup (obfd
, in_attr
[Tag_CPU_name
].s
)
14453 out_attr
[Tag_CPU_raw_name
].s
= in_attr
[Tag_CPU_raw_name
].s
14454 ? _bfd_elf_attr_strdup (obfd
, in_attr
[Tag_CPU_raw_name
].s
)
14459 out_attr
[Tag_CPU_name
].s
= NULL
;
14460 out_attr
[Tag_CPU_raw_name
].s
= NULL
;
14463 /* If we still don't have a value for Tag_CPU_name,
14464 make one up now. Tag_CPU_raw_name remains blank. */
14465 if (out_attr
[Tag_CPU_name
].s
== NULL
14466 && out_attr
[i
].i
< ARRAY_SIZE (name_table
))
14467 out_attr
[Tag_CPU_name
].s
=
14468 _bfd_elf_attr_strdup (obfd
, name_table
[out_attr
[i
].i
]);
14472 case Tag_ARM_ISA_use
:
14473 case Tag_THUMB_ISA_use
:
14474 case Tag_WMMX_arch
:
14475 case Tag_Advanced_SIMD_arch
:
14476 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
14477 case Tag_ABI_FP_rounding
:
14478 case Tag_ABI_FP_exceptions
:
14479 case Tag_ABI_FP_user_exceptions
:
14480 case Tag_ABI_FP_number_model
:
14481 case Tag_FP_HP_extension
:
14482 case Tag_CPU_unaligned_access
:
14484 case Tag_MPextension_use
:
14485 /* Use the largest value specified. */
14486 if (in_attr
[i
].i
> out_attr
[i
].i
)
14487 out_attr
[i
].i
= in_attr
[i
].i
;
14490 case Tag_ABI_align_preserved
:
14491 case Tag_ABI_PCS_RO_data
:
14492 /* Use the smallest value specified. */
14493 if (in_attr
[i
].i
< out_attr
[i
].i
)
14494 out_attr
[i
].i
= in_attr
[i
].i
;
14497 case Tag_ABI_align_needed
:
14498 if ((in_attr
[i
].i
> 0 || out_attr
[i
].i
> 0)
14499 && (in_attr
[Tag_ABI_align_preserved
].i
== 0
14500 || out_attr
[Tag_ABI_align_preserved
].i
== 0))
14502 /* This error message should be enabled once all non-conformant
14503 binaries in the toolchain have had the attributes set
14506 (_("error: %pB: 8-byte data alignment conflicts with %pB"),
14510 /* Fall through. */
14511 case Tag_ABI_FP_denormal
:
14512 case Tag_ABI_PCS_GOT_use
:
14513 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
14514 value if greater than 2 (for future-proofing). */
14515 if ((in_attr
[i
].i
> 2 && in_attr
[i
].i
> out_attr
[i
].i
)
14516 || (in_attr
[i
].i
<= 2 && out_attr
[i
].i
<= 2
14517 && order_021
[in_attr
[i
].i
] > order_021
[out_attr
[i
].i
]))
14518 out_attr
[i
].i
= in_attr
[i
].i
;
14521 case Tag_Virtualization_use
:
14522 /* The virtualization tag effectively stores two bits of
14523 information: the intended use of TrustZone (in bit 0), and the
14524 intended use of Virtualization (in bit 1). */
14525 if (out_attr
[i
].i
== 0)
14526 out_attr
[i
].i
= in_attr
[i
].i
;
14527 else if (in_attr
[i
].i
!= 0
14528 && in_attr
[i
].i
!= out_attr
[i
].i
)
14530 if (in_attr
[i
].i
<= 3 && out_attr
[i
].i
<= 3)
14535 (_("error: %pB: unable to merge virtualization attributes "
14543 case Tag_CPU_arch_profile
:
14544 if (out_attr
[i
].i
!= in_attr
[i
].i
)
14546 /* 0 will merge with anything.
14547 'A' and 'S' merge to 'A'.
14548 'R' and 'S' merge to 'R'.
14549 'M' and 'A|R|S' is an error. */
14550 if (out_attr
[i
].i
== 0
14551 || (out_attr
[i
].i
== 'S'
14552 && (in_attr
[i
].i
== 'A' || in_attr
[i
].i
== 'R')))
14553 out_attr
[i
].i
= in_attr
[i
].i
;
14554 else if (in_attr
[i
].i
== 0
14555 || (in_attr
[i
].i
== 'S'
14556 && (out_attr
[i
].i
== 'A' || out_attr
[i
].i
== 'R')))
14557 ; /* Do nothing. */
14561 (_("error: %pB: conflicting architecture profiles %c/%c"),
14563 in_attr
[i
].i
? in_attr
[i
].i
: '0',
14564 out_attr
[i
].i
? out_attr
[i
].i
: '0');
14570 case Tag_DSP_extension
:
14571 /* No need to change output value if any of:
14572 - pre (<=) ARMv5T input architecture (do not have DSP)
14573 - M input profile not ARMv7E-M and do not have DSP. */
14574 if (in_attr
[Tag_CPU_arch
].i
<= 3
14575 || (in_attr
[Tag_CPU_arch_profile
].i
== 'M'
14576 && in_attr
[Tag_CPU_arch
].i
!= 13
14577 && in_attr
[i
].i
== 0))
14578 ; /* Do nothing. */
14579 /* Output value should be 0 if DSP part of architecture, ie.
14580 - post (>=) ARMv5te architecture output
14581 - A, R or S profile output or ARMv7E-M output architecture. */
14582 else if (out_attr
[Tag_CPU_arch
].i
>= 4
14583 && (out_attr
[Tag_CPU_arch_profile
].i
== 'A'
14584 || out_attr
[Tag_CPU_arch_profile
].i
== 'R'
14585 || out_attr
[Tag_CPU_arch_profile
].i
== 'S'
14586 || out_attr
[Tag_CPU_arch
].i
== 13))
14588 /* Otherwise, DSP instructions are added and not part of output
14596 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
14597 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
14598 when it's 0. It might mean absence of FP hardware if
14599 Tag_FP_arch is zero. */
14601 #define VFP_VERSION_COUNT 9
14602 static const struct
14606 } vfp_versions
[VFP_VERSION_COUNT
] =
14622 /* If the output has no requirement about FP hardware,
14623 follow the requirement of the input. */
14624 if (out_attr
[i
].i
== 0)
14626 /* This assert is still reasonable, we shouldn't
14627 produce the suspicious build attribute
14628 combination (See below for in_attr). */
14629 BFD_ASSERT (out_attr
[Tag_ABI_HardFP_use
].i
== 0);
14630 out_attr
[i
].i
= in_attr
[i
].i
;
14631 out_attr
[Tag_ABI_HardFP_use
].i
14632 = in_attr
[Tag_ABI_HardFP_use
].i
;
14635 /* If the input has no requirement about FP hardware, do
14637 else if (in_attr
[i
].i
== 0)
14639 /* We used to assert that Tag_ABI_HardFP_use was
14640 zero here, but we should never assert when
14641 consuming an object file that has suspicious
14642 build attributes. The single precision variant
14643 of 'no FP architecture' is still 'no FP
14644 architecture', so we just ignore the tag in this
14649 /* Both the input and the output have nonzero Tag_FP_arch.
14650 So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */
14652 /* If both the input and the output have zero Tag_ABI_HardFP_use,
14654 if (in_attr
[Tag_ABI_HardFP_use
].i
== 0
14655 && out_attr
[Tag_ABI_HardFP_use
].i
== 0)
14657 /* If the input and the output have different Tag_ABI_HardFP_use,
14658 the combination of them is 0 (implied by Tag_FP_arch). */
14659 else if (in_attr
[Tag_ABI_HardFP_use
].i
14660 != out_attr
[Tag_ABI_HardFP_use
].i
)
14661 out_attr
[Tag_ABI_HardFP_use
].i
= 0;
14663 /* Now we can handle Tag_FP_arch. */
14665 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
14666 pick the biggest. */
14667 if (in_attr
[i
].i
>= VFP_VERSION_COUNT
14668 && in_attr
[i
].i
> out_attr
[i
].i
)
14670 out_attr
[i
] = in_attr
[i
];
14673 /* The output uses the superset of input features
14674 (ISA version) and registers. */
14675 ver
= vfp_versions
[in_attr
[i
].i
].ver
;
14676 if (ver
< vfp_versions
[out_attr
[i
].i
].ver
)
14677 ver
= vfp_versions
[out_attr
[i
].i
].ver
;
14678 regs
= vfp_versions
[in_attr
[i
].i
].regs
;
14679 if (regs
< vfp_versions
[out_attr
[i
].i
].regs
)
14680 regs
= vfp_versions
[out_attr
[i
].i
].regs
;
14681 /* This assumes all possible supersets are also a valid
14683 for (newval
= VFP_VERSION_COUNT
- 1; newval
> 0; newval
--)
14685 if (regs
== vfp_versions
[newval
].regs
14686 && ver
== vfp_versions
[newval
].ver
)
14689 out_attr
[i
].i
= newval
;
14692 case Tag_PCS_config
:
14693 if (out_attr
[i
].i
== 0)
14694 out_attr
[i
].i
= in_attr
[i
].i
;
14695 else if (in_attr
[i
].i
!= 0 && out_attr
[i
].i
!= in_attr
[i
].i
)
14697 /* It's sometimes ok to mix different configs, so this is only
14700 (_("warning: %pB: conflicting platform configuration"), ibfd
);
14703 case Tag_ABI_PCS_R9_use
:
14704 if (in_attr
[i
].i
!= out_attr
[i
].i
14705 && out_attr
[i
].i
!= AEABI_R9_unused
14706 && in_attr
[i
].i
!= AEABI_R9_unused
)
14709 (_("error: %pB: conflicting use of R9"), ibfd
);
14712 if (out_attr
[i
].i
== AEABI_R9_unused
)
14713 out_attr
[i
].i
= in_attr
[i
].i
;
14715 case Tag_ABI_PCS_RW_data
:
14716 if (in_attr
[i
].i
== AEABI_PCS_RW_data_SBrel
14717 && out_attr
[Tag_ABI_PCS_R9_use
].i
!= AEABI_R9_SB
14718 && out_attr
[Tag_ABI_PCS_R9_use
].i
!= AEABI_R9_unused
)
14721 (_("error: %pB: SB relative addressing conflicts with use of R9"),
14725 /* Use the smallest value specified. */
14726 if (in_attr
[i
].i
< out_attr
[i
].i
)
14727 out_attr
[i
].i
= in_attr
[i
].i
;
14729 case Tag_ABI_PCS_wchar_t
:
14730 if (out_attr
[i
].i
&& in_attr
[i
].i
&& out_attr
[i
].i
!= in_attr
[i
].i
14731 && !elf_arm_tdata (obfd
)->no_wchar_size_warning
)
14734 (_("warning: %pB uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
14735 ibfd
, in_attr
[i
].i
, out_attr
[i
].i
);
14737 else if (in_attr
[i
].i
&& !out_attr
[i
].i
)
14738 out_attr
[i
].i
= in_attr
[i
].i
;
14740 case Tag_ABI_enum_size
:
14741 if (in_attr
[i
].i
!= AEABI_enum_unused
)
14743 if (out_attr
[i
].i
== AEABI_enum_unused
14744 || out_attr
[i
].i
== AEABI_enum_forced_wide
)
14746 /* The existing object is compatible with anything.
14747 Use whatever requirements the new object has. */
14748 out_attr
[i
].i
= in_attr
[i
].i
;
14750 else if (in_attr
[i
].i
!= AEABI_enum_forced_wide
14751 && out_attr
[i
].i
!= in_attr
[i
].i
14752 && !elf_arm_tdata (obfd
)->no_enum_size_warning
)
14754 static const char *aeabi_enum_names
[] =
14755 { "", "variable-size", "32-bit", "" };
14756 const char *in_name
=
14757 in_attr
[i
].i
< ARRAY_SIZE(aeabi_enum_names
)
14758 ? aeabi_enum_names
[in_attr
[i
].i
]
14760 const char *out_name
=
14761 out_attr
[i
].i
< ARRAY_SIZE(aeabi_enum_names
)
14762 ? aeabi_enum_names
[out_attr
[i
].i
]
14765 (_("warning: %pB uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
14766 ibfd
, in_name
, out_name
);
14770 case Tag_ABI_VFP_args
:
14773 case Tag_ABI_WMMX_args
:
14774 if (in_attr
[i
].i
!= out_attr
[i
].i
)
14777 (_("error: %pB uses iWMMXt register arguments, %pB does not"),
14782 case Tag_compatibility
:
14783 /* Merged in target-independent code. */
14785 case Tag_ABI_HardFP_use
:
14786 /* This is handled along with Tag_FP_arch. */
14788 case Tag_ABI_FP_16bit_format
:
14789 if (in_attr
[i
].i
!= 0 && out_attr
[i
].i
!= 0)
14791 if (in_attr
[i
].i
!= out_attr
[i
].i
)
14794 (_("error: fp16 format mismatch between %pB and %pB"),
14799 if (in_attr
[i
].i
!= 0)
14800 out_attr
[i
].i
= in_attr
[i
].i
;
14804 /* A value of zero on input means that the divide instruction may
14805 be used if available in the base architecture as specified via
14806 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
14807 the user did not want divide instructions. A value of 2
14808 explicitly means that divide instructions were allowed in ARM
14809 and Thumb state. */
14810 if (in_attr
[i
].i
== out_attr
[i
].i
)
14811 /* Do nothing. */ ;
14812 else if (elf32_arm_attributes_forbid_div (in_attr
)
14813 && !elf32_arm_attributes_accept_div (out_attr
))
14815 else if (elf32_arm_attributes_forbid_div (out_attr
)
14816 && elf32_arm_attributes_accept_div (in_attr
))
14817 out_attr
[i
].i
= in_attr
[i
].i
;
14818 else if (in_attr
[i
].i
== 2)
14819 out_attr
[i
].i
= in_attr
[i
].i
;
14822 case Tag_MPextension_use_legacy
:
14823 /* We don't output objects with Tag_MPextension_use_legacy - we
14824 move the value to Tag_MPextension_use. */
14825 if (in_attr
[i
].i
!= 0 && in_attr
[Tag_MPextension_use
].i
!= 0)
14827 if (in_attr
[Tag_MPextension_use
].i
!= in_attr
[i
].i
)
14830 (_("%pB has both the current and legacy "
14831 "Tag_MPextension_use attributes"),
14837 if (in_attr
[i
].i
> out_attr
[Tag_MPextension_use
].i
)
14838 out_attr
[Tag_MPextension_use
] = in_attr
[i
];
14842 case Tag_nodefaults
:
14843 /* This tag is set if it exists, but the value is unused (and is
14844 typically zero). We don't actually need to do anything here -
14845 the merge happens automatically when the type flags are merged
14848 case Tag_also_compatible_with
:
14849 /* Already done in Tag_CPU_arch. */
14851 case Tag_conformance
:
14852 /* Keep the attribute if it matches. Throw it away otherwise.
14853 No attribute means no claim to conform. */
14854 if (!in_attr
[i
].s
|| !out_attr
[i
].s
14855 || strcmp (in_attr
[i
].s
, out_attr
[i
].s
) != 0)
14856 out_attr
[i
].s
= NULL
;
14861 = result
&& _bfd_elf_merge_unknown_attribute_low (ibfd
, obfd
, i
);
14864 /* If out_attr was copied from in_attr then it won't have a type yet. */
14865 if (in_attr
[i
].type
&& !out_attr
[i
].type
)
14866 out_attr
[i
].type
= in_attr
[i
].type
;
14869 /* Merge Tag_compatibility attributes and any common GNU ones. */
14870 if (!_bfd_elf_merge_object_attributes (ibfd
, info
))
14873 /* Check for any attributes not known on ARM. */
14874 result
&= _bfd_elf_merge_unknown_attribute_list (ibfd
, obfd
);
14880 /* Return TRUE if the two EABI versions are incompatible. */
14883 elf32_arm_versions_compatible (unsigned iver
, unsigned over
)
14885 /* v4 and v5 are the same spec before and after it was released,
14886 so allow mixing them. */
14887 if ((iver
== EF_ARM_EABI_VER4
&& over
== EF_ARM_EABI_VER5
)
14888 || (iver
== EF_ARM_EABI_VER5
&& over
== EF_ARM_EABI_VER4
))
14891 return (iver
== over
);
14894 /* Merge backend specific data from an object file to the output
14895 object file when linking. */
14898 elf32_arm_merge_private_bfd_data (bfd
*, struct bfd_link_info
*);
14900 /* Display the flags field. */
14903 elf32_arm_print_private_bfd_data (bfd
*abfd
, void * ptr
)
14905 FILE * file
= (FILE *) ptr
;
14906 unsigned long flags
;
14908 BFD_ASSERT (abfd
!= NULL
&& ptr
!= NULL
);
14910 /* Print normal ELF private data. */
14911 _bfd_elf_print_private_bfd_data (abfd
, ptr
);
14913 flags
= elf_elfheader (abfd
)->e_flags
;
14914 /* Ignore init flag - it may not be set, despite the flags field
14915 containing valid data. */
14917 fprintf (file
, _("private flags = %lx:"), elf_elfheader (abfd
)->e_flags
);
14919 switch (EF_ARM_EABI_VERSION (flags
))
14921 case EF_ARM_EABI_UNKNOWN
:
14922 /* The following flag bits are GNU extensions and not part of the
14923 official ARM ELF extended ABI. Hence they are only decoded if
14924 the EABI version is not set. */
14925 if (flags
& EF_ARM_INTERWORK
)
14926 fprintf (file
, _(" [interworking enabled]"));
14928 if (flags
& EF_ARM_APCS_26
)
14929 fprintf (file
, " [APCS-26]");
14931 fprintf (file
, " [APCS-32]");
14933 if (flags
& EF_ARM_VFP_FLOAT
)
14934 fprintf (file
, _(" [VFP float format]"));
14935 else if (flags
& EF_ARM_MAVERICK_FLOAT
)
14936 fprintf (file
, _(" [Maverick float format]"));
14938 fprintf (file
, _(" [FPA float format]"));
14940 if (flags
& EF_ARM_APCS_FLOAT
)
14941 fprintf (file
, _(" [floats passed in float registers]"));
14943 if (flags
& EF_ARM_PIC
)
14944 fprintf (file
, _(" [position independent]"));
14946 if (flags
& EF_ARM_NEW_ABI
)
14947 fprintf (file
, _(" [new ABI]"));
14949 if (flags
& EF_ARM_OLD_ABI
)
14950 fprintf (file
, _(" [old ABI]"));
14952 if (flags
& EF_ARM_SOFT_FLOAT
)
14953 fprintf (file
, _(" [software FP]"));
14955 flags
&= ~(EF_ARM_INTERWORK
| EF_ARM_APCS_26
| EF_ARM_APCS_FLOAT
14956 | EF_ARM_PIC
| EF_ARM_NEW_ABI
| EF_ARM_OLD_ABI
14957 | EF_ARM_SOFT_FLOAT
| EF_ARM_VFP_FLOAT
14958 | EF_ARM_MAVERICK_FLOAT
);
14961 case EF_ARM_EABI_VER1
:
14962 fprintf (file
, _(" [Version1 EABI]"));
14964 if (flags
& EF_ARM_SYMSARESORTED
)
14965 fprintf (file
, _(" [sorted symbol table]"));
14967 fprintf (file
, _(" [unsorted symbol table]"));
14969 flags
&= ~ EF_ARM_SYMSARESORTED
;
14972 case EF_ARM_EABI_VER2
:
14973 fprintf (file
, _(" [Version2 EABI]"));
14975 if (flags
& EF_ARM_SYMSARESORTED
)
14976 fprintf (file
, _(" [sorted symbol table]"));
14978 fprintf (file
, _(" [unsorted symbol table]"));
14980 if (flags
& EF_ARM_DYNSYMSUSESEGIDX
)
14981 fprintf (file
, _(" [dynamic symbols use segment index]"));
14983 if (flags
& EF_ARM_MAPSYMSFIRST
)
14984 fprintf (file
, _(" [mapping symbols precede others]"));
14986 flags
&= ~(EF_ARM_SYMSARESORTED
| EF_ARM_DYNSYMSUSESEGIDX
14987 | EF_ARM_MAPSYMSFIRST
);
14990 case EF_ARM_EABI_VER3
:
14991 fprintf (file
, _(" [Version3 EABI]"));
14994 case EF_ARM_EABI_VER4
:
14995 fprintf (file
, _(" [Version4 EABI]"));
14998 case EF_ARM_EABI_VER5
:
14999 fprintf (file
, _(" [Version5 EABI]"));
15001 if (flags
& EF_ARM_ABI_FLOAT_SOFT
)
15002 fprintf (file
, _(" [soft-float ABI]"));
15004 if (flags
& EF_ARM_ABI_FLOAT_HARD
)
15005 fprintf (file
, _(" [hard-float ABI]"));
15007 flags
&= ~(EF_ARM_ABI_FLOAT_SOFT
| EF_ARM_ABI_FLOAT_HARD
);
15010 if (flags
& EF_ARM_BE8
)
15011 fprintf (file
, _(" [BE8]"));
15013 if (flags
& EF_ARM_LE8
)
15014 fprintf (file
, _(" [LE8]"));
15016 flags
&= ~(EF_ARM_LE8
| EF_ARM_BE8
);
15020 fprintf (file
, _(" <EABI version unrecognised>"));
15024 flags
&= ~ EF_ARM_EABIMASK
;
15026 if (flags
& EF_ARM_RELEXEC
)
15027 fprintf (file
, _(" [relocatable executable]"));
15029 if (flags
& EF_ARM_PIC
)
15030 fprintf (file
, _(" [position independent]"));
15032 if (elf_elfheader (abfd
)->e_ident
[EI_OSABI
] == ELFOSABI_ARM_FDPIC
)
15033 fprintf (file
, _(" [FDPIC ABI supplement]"));
15035 flags
&= ~ (EF_ARM_RELEXEC
| EF_ARM_PIC
);
15038 fprintf (file
, _("<Unrecognised flag bits set>"));
15040 fputc ('\n', file
);
15046 elf32_arm_get_symbol_type (Elf_Internal_Sym
* elf_sym
, int type
)
15048 switch (ELF_ST_TYPE (elf_sym
->st_info
))
15050 case STT_ARM_TFUNC
:
15051 return ELF_ST_TYPE (elf_sym
->st_info
);
15053 case STT_ARM_16BIT
:
15054 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
15055 This allows us to distinguish between data used by Thumb instructions
15056 and non-data (which is probably code) inside Thumb regions of an
15058 if (type
!= STT_OBJECT
&& type
!= STT_TLS
)
15059 return ELF_ST_TYPE (elf_sym
->st_info
);
15070 elf32_arm_gc_mark_hook (asection
*sec
,
15071 struct bfd_link_info
*info
,
15072 Elf_Internal_Rela
*rel
,
15073 struct elf_link_hash_entry
*h
,
15074 Elf_Internal_Sym
*sym
)
15077 switch (ELF32_R_TYPE (rel
->r_info
))
15079 case R_ARM_GNU_VTINHERIT
:
15080 case R_ARM_GNU_VTENTRY
:
15084 return _bfd_elf_gc_mark_hook (sec
, info
, rel
, h
, sym
);
15087 /* Look through the relocs for a section during the first phase. */
15090 elf32_arm_check_relocs (bfd
*abfd
, struct bfd_link_info
*info
,
15091 asection
*sec
, const Elf_Internal_Rela
*relocs
)
15093 Elf_Internal_Shdr
*symtab_hdr
;
15094 struct elf_link_hash_entry
**sym_hashes
;
15095 const Elf_Internal_Rela
*rel
;
15096 const Elf_Internal_Rela
*rel_end
;
15099 struct elf32_arm_link_hash_table
*htab
;
15100 bfd_boolean call_reloc_p
;
15101 bfd_boolean may_become_dynamic_p
;
15102 bfd_boolean may_need_local_target_p
;
15103 unsigned long nsyms
;
15105 if (bfd_link_relocatable (info
))
15108 BFD_ASSERT (is_arm_elf (abfd
));
15110 htab
= elf32_arm_hash_table (info
);
15116 /* Create dynamic sections for relocatable executables so that we can
15117 copy relocations. */
15118 if (htab
->root
.is_relocatable_executable
15119 && ! htab
->root
.dynamic_sections_created
)
15121 if (! _bfd_elf_link_create_dynamic_sections (abfd
, info
))
15125 if (htab
->root
.dynobj
== NULL
)
15126 htab
->root
.dynobj
= abfd
;
15127 if (!create_ifunc_sections (info
))
15130 dynobj
= htab
->root
.dynobj
;
15132 symtab_hdr
= & elf_symtab_hdr (abfd
);
15133 sym_hashes
= elf_sym_hashes (abfd
);
15134 nsyms
= NUM_SHDR_ENTRIES (symtab_hdr
);
15136 rel_end
= relocs
+ sec
->reloc_count
;
15137 for (rel
= relocs
; rel
< rel_end
; rel
++)
15139 Elf_Internal_Sym
*isym
;
15140 struct elf_link_hash_entry
*h
;
15141 struct elf32_arm_link_hash_entry
*eh
;
15142 unsigned int r_symndx
;
15145 r_symndx
= ELF32_R_SYM (rel
->r_info
);
15146 r_type
= ELF32_R_TYPE (rel
->r_info
);
15147 r_type
= arm_real_reloc_type (htab
, r_type
);
15149 if (r_symndx
>= nsyms
15150 /* PR 9934: It is possible to have relocations that do not
15151 refer to symbols, thus it is also possible to have an
15152 object file containing relocations but no symbol table. */
15153 && (r_symndx
> STN_UNDEF
|| nsyms
> 0))
15155 _bfd_error_handler (_("%pB: bad symbol index: %d"), abfd
,
15164 if (r_symndx
< symtab_hdr
->sh_info
)
15166 /* A local symbol. */
15167 isym
= bfd_sym_from_r_symndx (&htab
->sym_cache
,
15174 h
= sym_hashes
[r_symndx
- symtab_hdr
->sh_info
];
15175 while (h
->root
.type
== bfd_link_hash_indirect
15176 || h
->root
.type
== bfd_link_hash_warning
)
15177 h
= (struct elf_link_hash_entry
*) h
->root
.u
.i
.link
;
15181 eh
= (struct elf32_arm_link_hash_entry
*) h
;
15183 call_reloc_p
= FALSE
;
15184 may_become_dynamic_p
= FALSE
;
15185 may_need_local_target_p
= FALSE
;
15187 /* Could be done earlier, if h were already available. */
15188 r_type
= elf32_arm_tls_transition (info
, r_type
, h
);
15191 case R_ARM_GOTOFFFUNCDESC
:
15195 if (!elf32_arm_allocate_local_sym_info (abfd
))
15197 elf32_arm_local_fdpic_cnts(abfd
)[r_symndx
].gotofffuncdesc_cnt
+= 1;
15198 elf32_arm_local_fdpic_cnts(abfd
)[r_symndx
].funcdesc_offset
= -1;
15202 eh
->fdpic_cnts
.gotofffuncdesc_cnt
++;
15207 case R_ARM_GOTFUNCDESC
:
15211 /* Such a relocation is not supposed to be generated
15212 by gcc on a static function. */
15213 /* Anyway if needed it could be handled. */
15218 eh
->fdpic_cnts
.gotfuncdesc_cnt
++;
15223 case R_ARM_FUNCDESC
:
15227 if (!elf32_arm_allocate_local_sym_info (abfd
))
15229 elf32_arm_local_fdpic_cnts(abfd
)[r_symndx
].funcdesc_cnt
+= 1;
15230 elf32_arm_local_fdpic_cnts(abfd
)[r_symndx
].funcdesc_offset
= -1;
15234 eh
->fdpic_cnts
.funcdesc_cnt
++;
15240 case R_ARM_GOT_PREL
:
15241 case R_ARM_TLS_GD32
:
15242 case R_ARM_TLS_GD32_FDPIC
:
15243 case R_ARM_TLS_IE32
:
15244 case R_ARM_TLS_IE32_FDPIC
:
15245 case R_ARM_TLS_GOTDESC
:
15246 case R_ARM_TLS_DESCSEQ
:
15247 case R_ARM_THM_TLS_DESCSEQ
:
15248 case R_ARM_TLS_CALL
:
15249 case R_ARM_THM_TLS_CALL
:
15250 /* This symbol requires a global offset table entry. */
15252 int tls_type
, old_tls_type
;
15256 case R_ARM_TLS_GD32
: tls_type
= GOT_TLS_GD
; break;
15257 case R_ARM_TLS_GD32_FDPIC
: tls_type
= GOT_TLS_GD
; break;
15259 case R_ARM_TLS_IE32
: tls_type
= GOT_TLS_IE
; break;
15260 case R_ARM_TLS_IE32_FDPIC
: tls_type
= GOT_TLS_IE
; break;
15262 case R_ARM_TLS_GOTDESC
:
15263 case R_ARM_TLS_CALL
: case R_ARM_THM_TLS_CALL
:
15264 case R_ARM_TLS_DESCSEQ
: case R_ARM_THM_TLS_DESCSEQ
:
15265 tls_type
= GOT_TLS_GDESC
; break;
15267 default: tls_type
= GOT_NORMAL
; break;
15270 if (!bfd_link_executable (info
) && (tls_type
& GOT_TLS_IE
))
15271 info
->flags
|= DF_STATIC_TLS
;
15276 old_tls_type
= elf32_arm_hash_entry (h
)->tls_type
;
15280 /* This is a global offset table entry for a local symbol. */
15281 if (!elf32_arm_allocate_local_sym_info (abfd
))
15283 elf_local_got_refcounts (abfd
)[r_symndx
] += 1;
15284 old_tls_type
= elf32_arm_local_got_tls_type (abfd
) [r_symndx
];
15287 /* If a variable is accessed with both tls methods, two
15288 slots may be created. */
15289 if (GOT_TLS_GD_ANY_P (old_tls_type
)
15290 && GOT_TLS_GD_ANY_P (tls_type
))
15291 tls_type
|= old_tls_type
;
15293 /* We will already have issued an error message if there
15294 is a TLS/non-TLS mismatch, based on the symbol
15295 type. So just combine any TLS types needed. */
15296 if (old_tls_type
!= GOT_UNKNOWN
&& old_tls_type
!= GOT_NORMAL
15297 && tls_type
!= GOT_NORMAL
)
15298 tls_type
|= old_tls_type
;
15300 /* If the symbol is accessed in both IE and GDESC
15301 method, we're able to relax. Turn off the GDESC flag,
15302 without messing up with any other kind of tls types
15303 that may be involved. */
15304 if ((tls_type
& GOT_TLS_IE
) && (tls_type
& GOT_TLS_GDESC
))
15305 tls_type
&= ~GOT_TLS_GDESC
;
15307 if (old_tls_type
!= tls_type
)
15310 elf32_arm_hash_entry (h
)->tls_type
= tls_type
;
15312 elf32_arm_local_got_tls_type (abfd
) [r_symndx
] = tls_type
;
15315 /* Fall through. */
15317 case R_ARM_TLS_LDM32
:
15318 case R_ARM_TLS_LDM32_FDPIC
:
15319 if (r_type
== R_ARM_TLS_LDM32
|| r_type
== R_ARM_TLS_LDM32_FDPIC
)
15320 htab
->tls_ldm_got
.refcount
++;
15321 /* Fall through. */
15323 case R_ARM_GOTOFF32
:
15325 if (htab
->root
.sgot
== NULL
15326 && !create_got_section (htab
->root
.dynobj
, info
))
15335 case R_ARM_THM_CALL
:
15336 case R_ARM_THM_JUMP24
:
15337 case R_ARM_THM_JUMP19
:
15338 call_reloc_p
= TRUE
;
15339 may_need_local_target_p
= TRUE
;
15343 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
15344 ldr __GOTT_INDEX__ offsets. */
15345 if (!htab
->vxworks_p
)
15347 may_need_local_target_p
= TRUE
;
15350 else goto jump_over
;
15352 /* Fall through. */
15354 case R_ARM_MOVW_ABS_NC
:
15355 case R_ARM_MOVT_ABS
:
15356 case R_ARM_THM_MOVW_ABS_NC
:
15357 case R_ARM_THM_MOVT_ABS
:
15358 if (bfd_link_pic (info
))
15361 (_("%pB: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
15362 abfd
, elf32_arm_howto_table_1
[r_type
].name
,
15363 (h
) ? h
->root
.root
.string
: "a local symbol");
15364 bfd_set_error (bfd_error_bad_value
);
15368 /* Fall through. */
15370 case R_ARM_ABS32_NOI
:
15372 if (h
!= NULL
&& bfd_link_executable (info
))
15374 h
->pointer_equality_needed
= 1;
15376 /* Fall through. */
15378 case R_ARM_REL32_NOI
:
15379 case R_ARM_MOVW_PREL_NC
:
15380 case R_ARM_MOVT_PREL
:
15381 case R_ARM_THM_MOVW_PREL_NC
:
15382 case R_ARM_THM_MOVT_PREL
:
15384 /* Should the interworking branches be listed here? */
15385 if ((bfd_link_pic (info
) || htab
->root
.is_relocatable_executable
15387 && (sec
->flags
& SEC_ALLOC
) != 0)
15390 && elf32_arm_howto_from_type (r_type
)->pc_relative
)
15392 /* In shared libraries and relocatable executables,
15393 we treat local relative references as calls;
15394 see the related SYMBOL_CALLS_LOCAL code in
15395 allocate_dynrelocs. */
15396 call_reloc_p
= TRUE
;
15397 may_need_local_target_p
= TRUE
;
15400 /* We are creating a shared library or relocatable
15401 executable, and this is a reloc against a global symbol,
15402 or a non-PC-relative reloc against a local symbol.
15403 We may need to copy the reloc into the output. */
15404 may_become_dynamic_p
= TRUE
;
15407 may_need_local_target_p
= TRUE
;
15410 /* This relocation describes the C++ object vtable hierarchy.
15411 Reconstruct it for later use during GC. */
15412 case R_ARM_GNU_VTINHERIT
:
15413 if (!bfd_elf_gc_record_vtinherit (abfd
, sec
, h
, rel
->r_offset
))
15417 /* This relocation describes which C++ vtable entries are actually
15418 used. Record for later use during GC. */
15419 case R_ARM_GNU_VTENTRY
:
15420 if (!bfd_elf_gc_record_vtentry (abfd
, sec
, h
, rel
->r_offset
))
15428 /* We may need a .plt entry if the function this reloc
15429 refers to is in a different object, regardless of the
15430 symbol's type. We can't tell for sure yet, because
15431 something later might force the symbol local. */
15433 else if (may_need_local_target_p
)
15434 /* If this reloc is in a read-only section, we might
15435 need a copy reloc. We can't check reliably at this
15436 stage whether the section is read-only, as input
15437 sections have not yet been mapped to output sections.
15438 Tentatively set the flag for now, and correct in
15439 adjust_dynamic_symbol. */
15440 h
->non_got_ref
= 1;
15443 if (may_need_local_target_p
15444 && (h
!= NULL
|| ELF32_ST_TYPE (isym
->st_info
) == STT_GNU_IFUNC
))
15446 union gotplt_union
*root_plt
;
15447 struct arm_plt_info
*arm_plt
;
15448 struct arm_local_iplt_info
*local_iplt
;
15452 root_plt
= &h
->plt
;
15453 arm_plt
= &eh
->plt
;
15457 local_iplt
= elf32_arm_create_local_iplt (abfd
, r_symndx
);
15458 if (local_iplt
== NULL
)
15460 root_plt
= &local_iplt
->root
;
15461 arm_plt
= &local_iplt
->arm
;
15464 /* If the symbol is a function that doesn't bind locally,
15465 this relocation will need a PLT entry. */
15466 if (root_plt
->refcount
!= -1)
15467 root_plt
->refcount
+= 1;
15470 arm_plt
->noncall_refcount
++;
15472 /* It's too early to use htab->use_blx here, so we have to
15473 record possible blx references separately from
15474 relocs that definitely need a thumb stub. */
15476 if (r_type
== R_ARM_THM_CALL
)
15477 arm_plt
->maybe_thumb_refcount
+= 1;
15479 if (r_type
== R_ARM_THM_JUMP24
15480 || r_type
== R_ARM_THM_JUMP19
)
15481 arm_plt
->thumb_refcount
+= 1;
15484 if (may_become_dynamic_p
)
15486 struct elf_dyn_relocs
*p
, **head
;
15488 /* Create a reloc section in dynobj. */
15489 if (sreloc
== NULL
)
15491 sreloc
= _bfd_elf_make_dynamic_reloc_section
15492 (sec
, dynobj
, 2, abfd
, ! htab
->use_rel
);
15494 if (sreloc
== NULL
)
15497 /* BPABI objects never have dynamic relocations mapped. */
15498 if (htab
->symbian_p
)
15502 flags
= bfd_get_section_flags (dynobj
, sreloc
);
15503 flags
&= ~(SEC_LOAD
| SEC_ALLOC
);
15504 bfd_set_section_flags (dynobj
, sreloc
, flags
);
15508 /* If this is a global symbol, count the number of
15509 relocations we need for this symbol. */
15511 head
= &((struct elf32_arm_link_hash_entry
*) h
)->dyn_relocs
;
15514 head
= elf32_arm_get_local_dynreloc_list (abfd
, r_symndx
, isym
);
15520 if (p
== NULL
|| p
->sec
!= sec
)
15522 bfd_size_type amt
= sizeof *p
;
15524 p
= (struct elf_dyn_relocs
*) bfd_alloc (htab
->root
.dynobj
, amt
);
15534 if (elf32_arm_howto_from_type (r_type
)->pc_relative
)
15537 if (h
== NULL
&& htab
->fdpic_p
&& !bfd_link_pic(info
)
15538 && r_type
!= R_ARM_ABS32
&& r_type
!= R_ARM_ABS32_NOI
) {
15539 /* Here we only support R_ARM_ABS32 and R_ARM_ABS32_NOI
15540 that will become rofixup. */
15541 /* This is due to the fact that we suppose all will become rofixup. */
15542 fprintf(stderr
, "FDPIC does not yet support %d relocation to become dynamic for executable\n", r_type
);
15544 (_("FDPIC does not yet support %s relocation"
15545 " to become dynamic for executable"),
15546 elf32_arm_howto_table_1
[r_type
].name
);
15556 elf32_arm_update_relocs (asection
*o
,
15557 struct bfd_elf_section_reloc_data
*reldata
)
15559 void (*swap_in
) (bfd
*, const bfd_byte
*, Elf_Internal_Rela
*);
15560 void (*swap_out
) (bfd
*, const Elf_Internal_Rela
*, bfd_byte
*);
15561 const struct elf_backend_data
*bed
;
15562 _arm_elf_section_data
*eado
;
15563 struct bfd_link_order
*p
;
15564 bfd_byte
*erela_head
, *erela
;
15565 Elf_Internal_Rela
*irela_head
, *irela
;
15566 Elf_Internal_Shdr
*rel_hdr
;
15568 unsigned int count
;
15570 eado
= get_arm_elf_section_data (o
);
15572 if (!eado
|| eado
->elf
.this_hdr
.sh_type
!= SHT_ARM_EXIDX
)
15576 bed
= get_elf_backend_data (abfd
);
15577 rel_hdr
= reldata
->hdr
;
15579 if (rel_hdr
->sh_entsize
== bed
->s
->sizeof_rel
)
15581 swap_in
= bed
->s
->swap_reloc_in
;
15582 swap_out
= bed
->s
->swap_reloc_out
;
15584 else if (rel_hdr
->sh_entsize
== bed
->s
->sizeof_rela
)
15586 swap_in
= bed
->s
->swap_reloca_in
;
15587 swap_out
= bed
->s
->swap_reloca_out
;
15592 erela_head
= rel_hdr
->contents
;
15593 irela_head
= (Elf_Internal_Rela
*) bfd_zmalloc
15594 ((NUM_SHDR_ENTRIES (rel_hdr
) + 1) * sizeof (*irela_head
));
15596 erela
= erela_head
;
15597 irela
= irela_head
;
15600 for (p
= o
->map_head
.link_order
; p
; p
= p
->next
)
15602 if (p
->type
== bfd_section_reloc_link_order
15603 || p
->type
== bfd_symbol_reloc_link_order
)
15605 (*swap_in
) (abfd
, erela
, irela
);
15606 erela
+= rel_hdr
->sh_entsize
;
15610 else if (p
->type
== bfd_indirect_link_order
)
15612 struct bfd_elf_section_reloc_data
*input_reldata
;
15613 arm_unwind_table_edit
*edit_list
, *edit_tail
;
15614 _arm_elf_section_data
*eadi
;
15619 i
= p
->u
.indirect
.section
;
15621 eadi
= get_arm_elf_section_data (i
);
15622 edit_list
= eadi
->u
.exidx
.unwind_edit_list
;
15623 edit_tail
= eadi
->u
.exidx
.unwind_edit_tail
;
15624 offset
= o
->vma
+ i
->output_offset
;
15626 if (eadi
->elf
.rel
.hdr
&&
15627 eadi
->elf
.rel
.hdr
->sh_entsize
== rel_hdr
->sh_entsize
)
15628 input_reldata
= &eadi
->elf
.rel
;
15629 else if (eadi
->elf
.rela
.hdr
&&
15630 eadi
->elf
.rela
.hdr
->sh_entsize
== rel_hdr
->sh_entsize
)
15631 input_reldata
= &eadi
->elf
.rela
;
15637 for (j
= 0; j
< NUM_SHDR_ENTRIES (input_reldata
->hdr
); j
++)
15639 arm_unwind_table_edit
*edit_node
, *edit_next
;
15641 bfd_vma reloc_index
;
15643 (*swap_in
) (abfd
, erela
, irela
);
15644 reloc_index
= (irela
->r_offset
- offset
) / 8;
15647 edit_node
= edit_list
;
15648 for (edit_next
= edit_list
;
15649 edit_next
&& edit_next
->index
<= reloc_index
;
15650 edit_next
= edit_node
->next
)
15653 edit_node
= edit_next
;
15656 if (edit_node
->type
!= DELETE_EXIDX_ENTRY
15657 || edit_node
->index
!= reloc_index
)
15659 irela
->r_offset
-= bias
* 8;
15664 erela
+= rel_hdr
->sh_entsize
;
15667 if (edit_tail
->type
== INSERT_EXIDX_CANTUNWIND_AT_END
)
15669 /* New relocation entity. */
15670 asection
*text_sec
= edit_tail
->linked_section
;
15671 asection
*text_out
= text_sec
->output_section
;
15672 bfd_vma exidx_offset
= offset
+ i
->size
- 8;
15674 irela
->r_addend
= 0;
15675 irela
->r_offset
= exidx_offset
;
15676 irela
->r_info
= ELF32_R_INFO
15677 (text_out
->target_index
, R_ARM_PREL31
);
15684 for (j
= 0; j
< NUM_SHDR_ENTRIES (input_reldata
->hdr
); j
++)
15686 (*swap_in
) (abfd
, erela
, irela
);
15687 erela
+= rel_hdr
->sh_entsize
;
15691 count
+= NUM_SHDR_ENTRIES (input_reldata
->hdr
);
15696 reldata
->count
= count
;
15697 rel_hdr
->sh_size
= count
* rel_hdr
->sh_entsize
;
15699 erela
= erela_head
;
15700 irela
= irela_head
;
15703 (*swap_out
) (abfd
, irela
, erela
);
15704 erela
+= rel_hdr
->sh_entsize
;
15711 /* Hashes are no longer valid. */
15712 free (reldata
->hashes
);
15713 reldata
->hashes
= NULL
;
15716 /* Unwinding tables are not referenced directly. This pass marks them as
15717 required if the corresponding code section is marked. Similarly, ARMv8-M
15718 secure entry functions can only be referenced by SG veneers which are
15719 created after the GC process. They need to be marked in case they reside in
15720 their own section (as would be the case if code was compiled with
15721 -ffunction-sections). */
15724 elf32_arm_gc_mark_extra_sections (struct bfd_link_info
*info
,
15725 elf_gc_mark_hook_fn gc_mark_hook
)
15728 Elf_Internal_Shdr
**elf_shdrp
;
15729 asection
*cmse_sec
;
15730 obj_attribute
*out_attr
;
15731 Elf_Internal_Shdr
*symtab_hdr
;
15732 unsigned i
, sym_count
, ext_start
;
15733 const struct elf_backend_data
*bed
;
15734 struct elf_link_hash_entry
**sym_hashes
;
15735 struct elf32_arm_link_hash_entry
*cmse_hash
;
15736 bfd_boolean again
, is_v8m
, first_bfd_browse
= TRUE
;
15738 _bfd_elf_gc_mark_extra_sections (info
, gc_mark_hook
);
15740 out_attr
= elf_known_obj_attributes_proc (info
->output_bfd
);
15741 is_v8m
= out_attr
[Tag_CPU_arch
].i
>= TAG_CPU_ARCH_V8M_BASE
15742 && out_attr
[Tag_CPU_arch_profile
].i
== 'M';
15744 /* Marking EH data may cause additional code sections to be marked,
15745 requiring multiple passes. */
15750 for (sub
= info
->input_bfds
; sub
!= NULL
; sub
= sub
->link
.next
)
15754 if (! is_arm_elf (sub
))
15757 elf_shdrp
= elf_elfsections (sub
);
15758 for (o
= sub
->sections
; o
!= NULL
; o
= o
->next
)
15760 Elf_Internal_Shdr
*hdr
;
15762 hdr
= &elf_section_data (o
)->this_hdr
;
15763 if (hdr
->sh_type
== SHT_ARM_EXIDX
15765 && hdr
->sh_link
< elf_numsections (sub
)
15767 && elf_shdrp
[hdr
->sh_link
]->bfd_section
->gc_mark
)
15770 if (!_bfd_elf_gc_mark (info
, o
, gc_mark_hook
))
15775 /* Mark section holding ARMv8-M secure entry functions. We mark all
15776 of them so no need for a second browsing. */
15777 if (is_v8m
&& first_bfd_browse
)
15779 sym_hashes
= elf_sym_hashes (sub
);
15780 bed
= get_elf_backend_data (sub
);
15781 symtab_hdr
= &elf_tdata (sub
)->symtab_hdr
;
15782 sym_count
= symtab_hdr
->sh_size
/ bed
->s
->sizeof_sym
;
15783 ext_start
= symtab_hdr
->sh_info
;
15785 /* Scan symbols. */
15786 for (i
= ext_start
; i
< sym_count
; i
++)
15788 cmse_hash
= elf32_arm_hash_entry (sym_hashes
[i
- ext_start
]);
15790 /* Assume it is a special symbol. If not, cmse_scan will
15791 warn about it and user can do something about it. */
15792 if (ARM_GET_SYM_CMSE_SPCL (cmse_hash
->root
.target_internal
))
15794 cmse_sec
= cmse_hash
->root
.root
.u
.def
.section
;
15795 if (!cmse_sec
->gc_mark
15796 && !_bfd_elf_gc_mark (info
, cmse_sec
, gc_mark_hook
))
15802 first_bfd_browse
= FALSE
;
15808 /* Treat mapping symbols as special target symbols. */
15811 elf32_arm_is_target_special_symbol (bfd
* abfd ATTRIBUTE_UNUSED
, asymbol
* sym
)
15813 return bfd_is_arm_special_symbol_name (sym
->name
,
15814 BFD_ARM_SPECIAL_SYM_TYPE_ANY
);
15817 /* This is a copy of elf_find_function() from elf.c except that
15818 ARM mapping symbols are ignored when looking for function names
15819 and STT_ARM_TFUNC is considered to a function type. */
15822 arm_elf_find_function (bfd
* abfd ATTRIBUTE_UNUSED
,
15823 asymbol
** symbols
,
15824 asection
* section
,
15826 const char ** filename_ptr
,
15827 const char ** functionname_ptr
)
15829 const char * filename
= NULL
;
15830 asymbol
* func
= NULL
;
15831 bfd_vma low_func
= 0;
15834 for (p
= symbols
; *p
!= NULL
; p
++)
15836 elf_symbol_type
*q
;
15838 q
= (elf_symbol_type
*) *p
;
15840 switch (ELF_ST_TYPE (q
->internal_elf_sym
.st_info
))
15845 filename
= bfd_asymbol_name (&q
->symbol
);
15848 case STT_ARM_TFUNC
:
15850 /* Skip mapping symbols. */
15851 if ((q
->symbol
.flags
& BSF_LOCAL
)
15852 && bfd_is_arm_special_symbol_name (q
->symbol
.name
,
15853 BFD_ARM_SPECIAL_SYM_TYPE_ANY
))
15855 /* Fall through. */
15856 if (bfd_get_section (&q
->symbol
) == section
15857 && q
->symbol
.value
>= low_func
15858 && q
->symbol
.value
<= offset
)
15860 func
= (asymbol
*) q
;
15861 low_func
= q
->symbol
.value
;
15871 *filename_ptr
= filename
;
15872 if (functionname_ptr
)
15873 *functionname_ptr
= bfd_asymbol_name (func
);
15879 /* Find the nearest line to a particular section and offset, for error
15880 reporting. This code is a duplicate of the code in elf.c, except
15881 that it uses arm_elf_find_function. */
15884 elf32_arm_find_nearest_line (bfd
* abfd
,
15885 asymbol
** symbols
,
15886 asection
* section
,
15888 const char ** filename_ptr
,
15889 const char ** functionname_ptr
,
15890 unsigned int * line_ptr
,
15891 unsigned int * discriminator_ptr
)
15893 bfd_boolean found
= FALSE
;
15895 if (_bfd_dwarf2_find_nearest_line (abfd
, symbols
, NULL
, section
, offset
,
15896 filename_ptr
, functionname_ptr
,
15897 line_ptr
, discriminator_ptr
,
15898 dwarf_debug_sections
, 0,
15899 & elf_tdata (abfd
)->dwarf2_find_line_info
))
15901 if (!*functionname_ptr
)
15902 arm_elf_find_function (abfd
, symbols
, section
, offset
,
15903 *filename_ptr
? NULL
: filename_ptr
,
15909 /* Skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain
15912 if (! _bfd_stab_section_find_nearest_line (abfd
, symbols
, section
, offset
,
15913 & found
, filename_ptr
,
15914 functionname_ptr
, line_ptr
,
15915 & elf_tdata (abfd
)->line_info
))
15918 if (found
&& (*functionname_ptr
|| *line_ptr
))
15921 if (symbols
== NULL
)
15924 if (! arm_elf_find_function (abfd
, symbols
, section
, offset
,
15925 filename_ptr
, functionname_ptr
))
15933 elf32_arm_find_inliner_info (bfd
* abfd
,
15934 const char ** filename_ptr
,
15935 const char ** functionname_ptr
,
15936 unsigned int * line_ptr
)
15939 found
= _bfd_dwarf2_find_inliner_info (abfd
, filename_ptr
,
15940 functionname_ptr
, line_ptr
,
15941 & elf_tdata (abfd
)->dwarf2_find_line_info
);
15945 /* Find dynamic relocs for H that apply to read-only sections. */
15948 readonly_dynrelocs (struct elf_link_hash_entry
*h
)
15950 struct elf_dyn_relocs
*p
;
15952 for (p
= elf32_arm_hash_entry (h
)->dyn_relocs
; p
!= NULL
; p
= p
->next
)
15954 asection
*s
= p
->sec
->output_section
;
15956 if (s
!= NULL
&& (s
->flags
& SEC_READONLY
) != 0)
15962 /* Adjust a symbol defined by a dynamic object and referenced by a
15963 regular object. The current definition is in some section of the
15964 dynamic object, but we're not including those sections. We have to
15965 change the definition to something the rest of the link can
15969 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info
* info
,
15970 struct elf_link_hash_entry
* h
)
15973 asection
*s
, *srel
;
15974 struct elf32_arm_link_hash_entry
* eh
;
15975 struct elf32_arm_link_hash_table
*globals
;
15977 globals
= elf32_arm_hash_table (info
);
15978 if (globals
== NULL
)
15981 dynobj
= elf_hash_table (info
)->dynobj
;
15983 /* Make sure we know what is going on here. */
15984 BFD_ASSERT (dynobj
!= NULL
15986 || h
->type
== STT_GNU_IFUNC
15990 && !h
->def_regular
)));
15992 eh
= (struct elf32_arm_link_hash_entry
*) h
;
15994 /* If this is a function, put it in the procedure linkage table. We
15995 will fill in the contents of the procedure linkage table later,
15996 when we know the address of the .got section. */
15997 if (h
->type
== STT_FUNC
|| h
->type
== STT_GNU_IFUNC
|| h
->needs_plt
)
15999 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
16000 symbol binds locally. */
16001 if (h
->plt
.refcount
<= 0
16002 || (h
->type
!= STT_GNU_IFUNC
16003 && (SYMBOL_CALLS_LOCAL (info
, h
)
16004 || (ELF_ST_VISIBILITY (h
->other
) != STV_DEFAULT
16005 && h
->root
.type
== bfd_link_hash_undefweak
))))
16007 /* This case can occur if we saw a PLT32 reloc in an input
16008 file, but the symbol was never referred to by a dynamic
16009 object, or if all references were garbage collected. In
16010 such a case, we don't actually need to build a procedure
16011 linkage table, and we can just do a PC24 reloc instead. */
16012 h
->plt
.offset
= (bfd_vma
) -1;
16013 eh
->plt
.thumb_refcount
= 0;
16014 eh
->plt
.maybe_thumb_refcount
= 0;
16015 eh
->plt
.noncall_refcount
= 0;
16023 /* It's possible that we incorrectly decided a .plt reloc was
16024 needed for an R_ARM_PC24 or similar reloc to a non-function sym
16025 in check_relocs. We can't decide accurately between function
16026 and non-function syms in check-relocs; Objects loaded later in
16027 the link may change h->type. So fix it now. */
16028 h
->plt
.offset
= (bfd_vma
) -1;
16029 eh
->plt
.thumb_refcount
= 0;
16030 eh
->plt
.maybe_thumb_refcount
= 0;
16031 eh
->plt
.noncall_refcount
= 0;
16034 /* If this is a weak symbol, and there is a real definition, the
16035 processor independent code will have arranged for us to see the
16036 real definition first, and we can just use the same value. */
16037 if (h
->is_weakalias
)
16039 struct elf_link_hash_entry
*def
= weakdef (h
);
16040 BFD_ASSERT (def
->root
.type
== bfd_link_hash_defined
);
16041 h
->root
.u
.def
.section
= def
->root
.u
.def
.section
;
16042 h
->root
.u
.def
.value
= def
->root
.u
.def
.value
;
16046 /* If there are no non-GOT references, we do not need a copy
16048 if (!h
->non_got_ref
)
16051 /* This is a reference to a symbol defined by a dynamic object which
16052 is not a function. */
16054 /* If we are creating a shared library, we must presume that the
16055 only references to the symbol are via the global offset table.
16056 For such cases we need not do anything here; the relocations will
16057 be handled correctly by relocate_section. Relocatable executables
16058 can reference data in shared objects directly, so we don't need to
16059 do anything here. */
16060 if (bfd_link_pic (info
) || globals
->root
.is_relocatable_executable
)
16063 /* We must allocate the symbol in our .dynbss section, which will
16064 become part of the .bss section of the executable. There will be
16065 an entry for this symbol in the .dynsym section. The dynamic
16066 object will contain position independent code, so all references
16067 from the dynamic object to this symbol will go through the global
16068 offset table. The dynamic linker will use the .dynsym entry to
16069 determine the address it must put in the global offset table, so
16070 both the dynamic object and the regular object will refer to the
16071 same memory location for the variable. */
16072 /* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic
16073 linker to copy the initial value out of the dynamic object and into
16074 the runtime process image. We need to remember the offset into the
16075 .rel(a).bss section we are going to use. */
16076 if ((h
->root
.u
.def
.section
->flags
& SEC_READONLY
) != 0)
16078 s
= globals
->root
.sdynrelro
;
16079 srel
= globals
->root
.sreldynrelro
;
16083 s
= globals
->root
.sdynbss
;
16084 srel
= globals
->root
.srelbss
;
16086 if (info
->nocopyreloc
== 0
16087 && (h
->root
.u
.def
.section
->flags
& SEC_ALLOC
) != 0
16090 elf32_arm_allocate_dynrelocs (info
, srel
, 1);
16094 return _bfd_elf_adjust_dynamic_copy (info
, h
, s
);
16097 /* Allocate space in .plt, .got and associated reloc sections for
16101 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry
*h
, void * inf
)
16103 struct bfd_link_info
*info
;
16104 struct elf32_arm_link_hash_table
*htab
;
16105 struct elf32_arm_link_hash_entry
*eh
;
16106 struct elf_dyn_relocs
*p
;
16108 if (h
->root
.type
== bfd_link_hash_indirect
)
16111 eh
= (struct elf32_arm_link_hash_entry
*) h
;
16113 info
= (struct bfd_link_info
*) inf
;
16114 htab
= elf32_arm_hash_table (info
);
16118 if ((htab
->root
.dynamic_sections_created
|| h
->type
== STT_GNU_IFUNC
)
16119 && h
->plt
.refcount
> 0)
16121 /* Make sure this symbol is output as a dynamic symbol.
16122 Undefined weak syms won't yet be marked as dynamic. */
16123 if (h
->dynindx
== -1 && !h
->forced_local
16124 && h
->root
.type
== bfd_link_hash_undefweak
)
16126 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
16130 /* If the call in the PLT entry binds locally, the associated
16131 GOT entry should use an R_ARM_IRELATIVE relocation instead of
16132 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
16133 than the .plt section. */
16134 if (h
->type
== STT_GNU_IFUNC
&& SYMBOL_CALLS_LOCAL (info
, h
))
16137 if (eh
->plt
.noncall_refcount
== 0
16138 && SYMBOL_REFERENCES_LOCAL (info
, h
))
16139 /* All non-call references can be resolved directly.
16140 This means that they can (and in some cases, must)
16141 resolve directly to the run-time target, rather than
16142 to the PLT. That in turns means that any .got entry
16143 would be equal to the .igot.plt entry, so there's
16144 no point having both. */
16145 h
->got
.refcount
= 0;
16148 if (bfd_link_pic (info
)
16150 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h
))
16152 elf32_arm_allocate_plt_entry (info
, eh
->is_iplt
, &h
->plt
, &eh
->plt
);
16154 /* If this symbol is not defined in a regular file, and we are
16155 not generating a shared library, then set the symbol to this
16156 location in the .plt. This is required to make function
16157 pointers compare as equal between the normal executable and
16158 the shared library. */
16159 if (! bfd_link_pic (info
)
16160 && !h
->def_regular
)
16162 h
->root
.u
.def
.section
= htab
->root
.splt
;
16163 h
->root
.u
.def
.value
= h
->plt
.offset
;
16165 /* Make sure the function is not marked as Thumb, in case
16166 it is the target of an ABS32 relocation, which will
16167 point to the PLT entry. */
16168 ARM_SET_SYM_BRANCH_TYPE (h
->target_internal
, ST_BRANCH_TO_ARM
);
16171 /* VxWorks executables have a second set of relocations for
16172 each PLT entry. They go in a separate relocation section,
16173 which is processed by the kernel loader. */
16174 if (htab
->vxworks_p
&& !bfd_link_pic (info
))
16176 /* There is a relocation for the initial PLT entry:
16177 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
16178 if (h
->plt
.offset
== htab
->plt_header_size
)
16179 elf32_arm_allocate_dynrelocs (info
, htab
->srelplt2
, 1);
16181 /* There are two extra relocations for each subsequent
16182 PLT entry: an R_ARM_32 relocation for the GOT entry,
16183 and an R_ARM_32 relocation for the PLT entry. */
16184 elf32_arm_allocate_dynrelocs (info
, htab
->srelplt2
, 2);
16189 h
->plt
.offset
= (bfd_vma
) -1;
16195 h
->plt
.offset
= (bfd_vma
) -1;
16199 eh
= (struct elf32_arm_link_hash_entry
*) h
;
16200 eh
->tlsdesc_got
= (bfd_vma
) -1;
16202 if (h
->got
.refcount
> 0)
16206 int tls_type
= elf32_arm_hash_entry (h
)->tls_type
;
16209 /* Make sure this symbol is output as a dynamic symbol.
16210 Undefined weak syms won't yet be marked as dynamic. */
16211 if (htab
->root
.dynamic_sections_created
&& h
->dynindx
== -1 && !h
->forced_local
16212 && h
->root
.type
== bfd_link_hash_undefweak
)
16214 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
16218 if (!htab
->symbian_p
)
16220 s
= htab
->root
.sgot
;
16221 h
->got
.offset
= s
->size
;
16223 if (tls_type
== GOT_UNKNOWN
)
16226 if (tls_type
== GOT_NORMAL
)
16227 /* Non-TLS symbols need one GOT slot. */
16231 if (tls_type
& GOT_TLS_GDESC
)
16233 /* R_ARM_TLS_DESC needs 2 GOT slots. */
16235 = (htab
->root
.sgotplt
->size
16236 - elf32_arm_compute_jump_table_size (htab
));
16237 htab
->root
.sgotplt
->size
+= 8;
16238 h
->got
.offset
= (bfd_vma
) -2;
16239 /* plt.got_offset needs to know there's a TLS_DESC
16240 reloc in the middle of .got.plt. */
16241 htab
->num_tls_desc
++;
16244 if (tls_type
& GOT_TLS_GD
)
16246 /* R_ARM_TLS_GD32 and R_ARM_TLS_GD32_FDPIC need two
16247 consecutive GOT slots. If the symbol is both GD
16248 and GDESC, got.offset may have been
16250 h
->got
.offset
= s
->size
;
16254 if (tls_type
& GOT_TLS_IE
)
16255 /* R_ARM_TLS_IE32/R_ARM_TLS_IE32_FDPIC need one GOT
16260 dyn
= htab
->root
.dynamic_sections_created
;
16263 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn
,
16264 bfd_link_pic (info
),
16266 && (!bfd_link_pic (info
)
16267 || !SYMBOL_REFERENCES_LOCAL (info
, h
)))
16270 if (tls_type
!= GOT_NORMAL
16271 && (bfd_link_pic (info
) || indx
!= 0)
16272 && (ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
16273 || h
->root
.type
!= bfd_link_hash_undefweak
))
16275 if (tls_type
& GOT_TLS_IE
)
16276 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
16278 if (tls_type
& GOT_TLS_GD
)
16279 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
16281 if (tls_type
& GOT_TLS_GDESC
)
16283 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelplt
, 1);
16284 /* GDESC needs a trampoline to jump to. */
16285 htab
->tls_trampoline
= -1;
16288 /* Only GD needs it. GDESC just emits one relocation per
16290 if ((tls_type
& GOT_TLS_GD
) && indx
!= 0)
16291 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
16293 else if (((indx
!= -1) || htab
->fdpic_p
)
16294 && !SYMBOL_REFERENCES_LOCAL (info
, h
))
16296 if (htab
->root
.dynamic_sections_created
)
16297 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
16298 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
16300 else if (h
->type
== STT_GNU_IFUNC
16301 && eh
->plt
.noncall_refcount
== 0)
16302 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
16303 they all resolve dynamically instead. Reserve room for the
16304 GOT entry's R_ARM_IRELATIVE relocation. */
16305 elf32_arm_allocate_irelocs (info
, htab
->root
.srelgot
, 1);
16306 else if (bfd_link_pic (info
)
16307 && (ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
16308 || h
->root
.type
!= bfd_link_hash_undefweak
))
16309 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
16310 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
16311 else if (htab
->fdpic_p
&& tls_type
== GOT_NORMAL
)
16312 /* Reserve room for rofixup for FDPIC executable. */
16313 /* TLS relocs do not need space since they are completely
16315 htab
->srofixup
->size
+= 4;
16319 h
->got
.offset
= (bfd_vma
) -1;
16321 /* FDPIC support. */
16322 if (eh
->fdpic_cnts
.gotofffuncdesc_cnt
> 0)
16324 /* Symbol musn't be exported. */
16325 if (h
->dynindx
!= -1)
16328 /* We only allocate one function descriptor with its associated relocation. */
16329 if (eh
->fdpic_cnts
.funcdesc_offset
== -1)
16331 asection
*s
= htab
->root
.sgot
;
16333 eh
->fdpic_cnts
.funcdesc_offset
= s
->size
;
16335 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16336 if (bfd_link_pic(info
))
16337 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
16339 htab
->srofixup
->size
+= 8;
16343 if (eh
->fdpic_cnts
.gotfuncdesc_cnt
> 0)
16345 asection
*s
= htab
->root
.sgot
;
16347 if (htab
->root
.dynamic_sections_created
&& h
->dynindx
== -1
16348 && !h
->forced_local
)
16349 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
16352 if (h
->dynindx
== -1)
16354 /* We only allocate one function descriptor with its associated relocation. q */
16355 if (eh
->fdpic_cnts
.funcdesc_offset
== -1)
16358 eh
->fdpic_cnts
.funcdesc_offset
= s
->size
;
16360 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16361 if (bfd_link_pic(info
))
16362 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
16364 htab
->srofixup
->size
+= 8;
16368 /* Add one entry into the GOT and a R_ARM_FUNCDESC or
16369 R_ARM_RELATIVE/rofixup relocation on it. */
16370 eh
->fdpic_cnts
.gotfuncdesc_offset
= s
->size
;
16372 if (h
->dynindx
== -1 && !bfd_link_pic(info
))
16373 htab
->srofixup
->size
+= 4;
16375 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
16378 if (eh
->fdpic_cnts
.funcdesc_cnt
> 0)
16380 if (htab
->root
.dynamic_sections_created
&& h
->dynindx
== -1
16381 && !h
->forced_local
)
16382 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
16385 if (h
->dynindx
== -1)
16387 /* We only allocate one function descriptor with its associated relocation. */
16388 if (eh
->fdpic_cnts
.funcdesc_offset
== -1)
16390 asection
*s
= htab
->root
.sgot
;
16392 eh
->fdpic_cnts
.funcdesc_offset
= s
->size
;
16394 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16395 if (bfd_link_pic(info
))
16396 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
16398 htab
->srofixup
->size
+= 8;
16401 if (h
->dynindx
== -1 && !bfd_link_pic(info
))
16403 /* For FDPIC executable we replace R_ARM_RELATIVE with a rofixup. */
16404 htab
->srofixup
->size
+= 4 * eh
->fdpic_cnts
.funcdesc_cnt
;
16408 /* Will need one dynamic reloc per reference. will be either
16409 R_ARM_FUNCDESC or R_ARM_RELATIVE for hidden symbols. */
16410 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
,
16411 eh
->fdpic_cnts
.funcdesc_cnt
);
16415 /* Allocate stubs for exported Thumb functions on v4t. */
16416 if (!htab
->use_blx
&& h
->dynindx
!= -1
16418 && ARM_GET_SYM_BRANCH_TYPE (h
->target_internal
) == ST_BRANCH_TO_THUMB
16419 && ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
)
16421 struct elf_link_hash_entry
* th
;
16422 struct bfd_link_hash_entry
* bh
;
16423 struct elf_link_hash_entry
* myh
;
16427 /* Create a new symbol to regist the real location of the function. */
16428 s
= h
->root
.u
.def
.section
;
16429 sprintf (name
, "__real_%s", h
->root
.root
.string
);
16430 _bfd_generic_link_add_one_symbol (info
, s
->owner
,
16431 name
, BSF_GLOBAL
, s
,
16432 h
->root
.u
.def
.value
,
16433 NULL
, TRUE
, FALSE
, &bh
);
16435 myh
= (struct elf_link_hash_entry
*) bh
;
16436 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
16437 myh
->forced_local
= 1;
16438 ARM_SET_SYM_BRANCH_TYPE (myh
->target_internal
, ST_BRANCH_TO_THUMB
);
16439 eh
->export_glue
= myh
;
16440 th
= record_arm_to_thumb_glue (info
, h
);
16441 /* Point the symbol at the stub. */
16442 h
->type
= ELF_ST_INFO (ELF_ST_BIND (h
->type
), STT_FUNC
);
16443 ARM_SET_SYM_BRANCH_TYPE (h
->target_internal
, ST_BRANCH_TO_ARM
);
16444 h
->root
.u
.def
.section
= th
->root
.u
.def
.section
;
16445 h
->root
.u
.def
.value
= th
->root
.u
.def
.value
& ~1;
16448 if (eh
->dyn_relocs
== NULL
)
16451 /* In the shared -Bsymbolic case, discard space allocated for
16452 dynamic pc-relative relocs against symbols which turn out to be
16453 defined in regular objects. For the normal shared case, discard
16454 space for pc-relative relocs that have become local due to symbol
16455 visibility changes. */
16457 if (bfd_link_pic (info
) || htab
->root
.is_relocatable_executable
|| htab
->fdpic_p
)
16459 /* Relocs that use pc_count are PC-relative forms, which will appear
16460 on something like ".long foo - ." or "movw REG, foo - .". We want
16461 calls to protected symbols to resolve directly to the function
16462 rather than going via the plt. If people want function pointer
16463 comparisons to work as expected then they should avoid writing
16464 assembly like ".long foo - .". */
16465 if (SYMBOL_CALLS_LOCAL (info
, h
))
16467 struct elf_dyn_relocs
**pp
;
16469 for (pp
= &eh
->dyn_relocs
; (p
= *pp
) != NULL
; )
16471 p
->count
-= p
->pc_count
;
16480 if (htab
->vxworks_p
)
16482 struct elf_dyn_relocs
**pp
;
16484 for (pp
= &eh
->dyn_relocs
; (p
= *pp
) != NULL
; )
16486 if (strcmp (p
->sec
->output_section
->name
, ".tls_vars") == 0)
16493 /* Also discard relocs on undefined weak syms with non-default
16495 if (eh
->dyn_relocs
!= NULL
16496 && h
->root
.type
== bfd_link_hash_undefweak
)
16498 if (ELF_ST_VISIBILITY (h
->other
) != STV_DEFAULT
16499 || UNDEFWEAK_NO_DYNAMIC_RELOC (info
, h
))
16500 eh
->dyn_relocs
= NULL
;
16502 /* Make sure undefined weak symbols are output as a dynamic
16504 else if (htab
->root
.dynamic_sections_created
&& h
->dynindx
== -1
16505 && !h
->forced_local
)
16507 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
16512 else if (htab
->root
.is_relocatable_executable
&& h
->dynindx
== -1
16513 && h
->root
.type
== bfd_link_hash_new
)
16515 /* Output absolute symbols so that we can create relocations
16516 against them. For normal symbols we output a relocation
16517 against the section that contains them. */
16518 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
16525 /* For the non-shared case, discard space for relocs against
16526 symbols which turn out to need copy relocs or are not
16529 if (!h
->non_got_ref
16530 && ((h
->def_dynamic
16531 && !h
->def_regular
)
16532 || (htab
->root
.dynamic_sections_created
16533 && (h
->root
.type
== bfd_link_hash_undefweak
16534 || h
->root
.type
== bfd_link_hash_undefined
))))
16536 /* Make sure this symbol is output as a dynamic symbol.
16537 Undefined weak syms won't yet be marked as dynamic. */
16538 if (h
->dynindx
== -1 && !h
->forced_local
16539 && h
->root
.type
== bfd_link_hash_undefweak
)
16541 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
16545 /* If that succeeded, we know we'll be keeping all the
16547 if (h
->dynindx
!= -1)
16551 eh
->dyn_relocs
= NULL
;
16556 /* Finally, allocate space. */
16557 for (p
= eh
->dyn_relocs
; p
!= NULL
; p
= p
->next
)
16559 asection
*sreloc
= elf_section_data (p
->sec
)->sreloc
;
16561 if (h
->type
== STT_GNU_IFUNC
16562 && eh
->plt
.noncall_refcount
== 0
16563 && SYMBOL_REFERENCES_LOCAL (info
, h
))
16564 elf32_arm_allocate_irelocs (info
, sreloc
, p
->count
);
16565 else if (h
->dynindx
!= -1 && (!bfd_link_pic(info
) || !info
->symbolic
|| !h
->def_regular
))
16566 elf32_arm_allocate_dynrelocs (info
, sreloc
, p
->count
);
16567 else if (htab
->fdpic_p
&& !bfd_link_pic(info
))
16568 htab
->srofixup
->size
+= 4 * p
->count
;
16570 elf32_arm_allocate_dynrelocs (info
, sreloc
, p
->count
);
16576 /* Set DF_TEXTREL if we find any dynamic relocs that apply to
16577 read-only sections. */
16580 maybe_set_textrel (struct elf_link_hash_entry
*h
, void *info_p
)
16584 if (h
->root
.type
== bfd_link_hash_indirect
)
16587 sec
= readonly_dynrelocs (h
);
16590 struct bfd_link_info
*info
= (struct bfd_link_info
*) info_p
;
16592 info
->flags
|= DF_TEXTREL
;
16593 info
->callbacks
->minfo
16594 (_("%pB: dynamic relocation against `%pT' in read-only section `%pA'\n"),
16595 sec
->owner
, h
->root
.root
.string
, sec
);
16597 /* Not an error, just cut short the traversal. */
16605 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info
*info
,
16608 struct elf32_arm_link_hash_table
*globals
;
16610 globals
= elf32_arm_hash_table (info
);
16611 if (globals
== NULL
)
16614 globals
->byteswap_code
= byteswap_code
;
16617 /* Set the sizes of the dynamic sections. */
16620 elf32_arm_size_dynamic_sections (bfd
* output_bfd ATTRIBUTE_UNUSED
,
16621 struct bfd_link_info
* info
)
16626 bfd_boolean relocs
;
16628 struct elf32_arm_link_hash_table
*htab
;
16630 htab
= elf32_arm_hash_table (info
);
16634 dynobj
= elf_hash_table (info
)->dynobj
;
16635 BFD_ASSERT (dynobj
!= NULL
);
16636 check_use_blx (htab
);
16638 if (elf_hash_table (info
)->dynamic_sections_created
)
16640 /* Set the contents of the .interp section to the interpreter. */
16641 if (bfd_link_executable (info
) && !info
->nointerp
)
16643 s
= bfd_get_linker_section (dynobj
, ".interp");
16644 BFD_ASSERT (s
!= NULL
);
16645 s
->size
= sizeof ELF_DYNAMIC_INTERPRETER
;
16646 s
->contents
= (unsigned char *) ELF_DYNAMIC_INTERPRETER
;
16650 /* Set up .got offsets for local syms, and space for local dynamic
16652 for (ibfd
= info
->input_bfds
; ibfd
!= NULL
; ibfd
= ibfd
->link
.next
)
16654 bfd_signed_vma
*local_got
;
16655 bfd_signed_vma
*end_local_got
;
16656 struct arm_local_iplt_info
**local_iplt_ptr
, *local_iplt
;
16657 char *local_tls_type
;
16658 bfd_vma
*local_tlsdesc_gotent
;
16659 bfd_size_type locsymcount
;
16660 Elf_Internal_Shdr
*symtab_hdr
;
16662 bfd_boolean is_vxworks
= htab
->vxworks_p
;
16663 unsigned int symndx
;
16664 struct fdpic_local
*local_fdpic_cnts
;
16666 if (! is_arm_elf (ibfd
))
16669 for (s
= ibfd
->sections
; s
!= NULL
; s
= s
->next
)
16671 struct elf_dyn_relocs
*p
;
16673 for (p
= (struct elf_dyn_relocs
*)
16674 elf_section_data (s
)->local_dynrel
; p
!= NULL
; p
= p
->next
)
16676 if (!bfd_is_abs_section (p
->sec
)
16677 && bfd_is_abs_section (p
->sec
->output_section
))
16679 /* Input section has been discarded, either because
16680 it is a copy of a linkonce section or due to
16681 linker script /DISCARD/, so we'll be discarding
16684 else if (is_vxworks
16685 && strcmp (p
->sec
->output_section
->name
,
16688 /* Relocations in vxworks .tls_vars sections are
16689 handled specially by the loader. */
16691 else if (p
->count
!= 0)
16693 srel
= elf_section_data (p
->sec
)->sreloc
;
16694 if (htab
->fdpic_p
&& !bfd_link_pic(info
))
16695 htab
->srofixup
->size
+= 4 * p
->count
;
16697 elf32_arm_allocate_dynrelocs (info
, srel
, p
->count
);
16698 if ((p
->sec
->output_section
->flags
& SEC_READONLY
) != 0)
16699 info
->flags
|= DF_TEXTREL
;
16704 local_got
= elf_local_got_refcounts (ibfd
);
16708 symtab_hdr
= & elf_symtab_hdr (ibfd
);
16709 locsymcount
= symtab_hdr
->sh_info
;
16710 end_local_got
= local_got
+ locsymcount
;
16711 local_iplt_ptr
= elf32_arm_local_iplt (ibfd
);
16712 local_tls_type
= elf32_arm_local_got_tls_type (ibfd
);
16713 local_tlsdesc_gotent
= elf32_arm_local_tlsdesc_gotent (ibfd
);
16714 local_fdpic_cnts
= elf32_arm_local_fdpic_cnts (ibfd
);
16716 s
= htab
->root
.sgot
;
16717 srel
= htab
->root
.srelgot
;
16718 for (; local_got
< end_local_got
;
16719 ++local_got
, ++local_iplt_ptr
, ++local_tls_type
,
16720 ++local_tlsdesc_gotent
, ++symndx
, ++local_fdpic_cnts
)
16722 *local_tlsdesc_gotent
= (bfd_vma
) -1;
16723 local_iplt
= *local_iplt_ptr
;
16725 /* FDPIC support. */
16726 if (local_fdpic_cnts
->gotofffuncdesc_cnt
> 0)
16728 if (local_fdpic_cnts
->funcdesc_offset
== -1)
16730 local_fdpic_cnts
->funcdesc_offset
= s
->size
;
16733 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16734 if (bfd_link_pic(info
))
16735 elf32_arm_allocate_dynrelocs (info
, srel
, 1);
16737 htab
->srofixup
->size
+= 8;
16741 if (local_fdpic_cnts
->funcdesc_cnt
> 0)
16743 if (local_fdpic_cnts
->funcdesc_offset
== -1)
16745 local_fdpic_cnts
->funcdesc_offset
= s
->size
;
16748 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16749 if (bfd_link_pic(info
))
16750 elf32_arm_allocate_dynrelocs (info
, srel
, 1);
16752 htab
->srofixup
->size
+= 8;
16755 /* We will add n R_ARM_RELATIVE relocations or n rofixups. */
16756 if (bfd_link_pic(info
))
16757 elf32_arm_allocate_dynrelocs (info
, srel
, local_fdpic_cnts
->funcdesc_cnt
);
16759 htab
->srofixup
->size
+= 4 * local_fdpic_cnts
->funcdesc_cnt
;
16762 if (local_iplt
!= NULL
)
16764 struct elf_dyn_relocs
*p
;
16766 if (local_iplt
->root
.refcount
> 0)
16768 elf32_arm_allocate_plt_entry (info
, TRUE
,
16771 if (local_iplt
->arm
.noncall_refcount
== 0)
16772 /* All references to the PLT are calls, so all
16773 non-call references can resolve directly to the
16774 run-time target. This means that the .got entry
16775 would be the same as the .igot.plt entry, so there's
16776 no point creating both. */
16781 BFD_ASSERT (local_iplt
->arm
.noncall_refcount
== 0);
16782 local_iplt
->root
.offset
= (bfd_vma
) -1;
16785 for (p
= local_iplt
->dyn_relocs
; p
!= NULL
; p
= p
->next
)
16789 psrel
= elf_section_data (p
->sec
)->sreloc
;
16790 if (local_iplt
->arm
.noncall_refcount
== 0)
16791 elf32_arm_allocate_irelocs (info
, psrel
, p
->count
);
16793 elf32_arm_allocate_dynrelocs (info
, psrel
, p
->count
);
16796 if (*local_got
> 0)
16798 Elf_Internal_Sym
*isym
;
16800 *local_got
= s
->size
;
16801 if (*local_tls_type
& GOT_TLS_GD
)
16802 /* TLS_GD relocs need an 8-byte structure in the GOT. */
16804 if (*local_tls_type
& GOT_TLS_GDESC
)
16806 *local_tlsdesc_gotent
= htab
->root
.sgotplt
->size
16807 - elf32_arm_compute_jump_table_size (htab
);
16808 htab
->root
.sgotplt
->size
+= 8;
16809 *local_got
= (bfd_vma
) -2;
16810 /* plt.got_offset needs to know there's a TLS_DESC
16811 reloc in the middle of .got.plt. */
16812 htab
->num_tls_desc
++;
16814 if (*local_tls_type
& GOT_TLS_IE
)
16817 if (*local_tls_type
& GOT_NORMAL
)
16819 /* If the symbol is both GD and GDESC, *local_got
16820 may have been overwritten. */
16821 *local_got
= s
->size
;
16825 isym
= bfd_sym_from_r_symndx (&htab
->sym_cache
, ibfd
, symndx
);
16829 /* If all references to an STT_GNU_IFUNC PLT are calls,
16830 then all non-call references, including this GOT entry,
16831 resolve directly to the run-time target. */
16832 if (ELF32_ST_TYPE (isym
->st_info
) == STT_GNU_IFUNC
16833 && (local_iplt
== NULL
16834 || local_iplt
->arm
.noncall_refcount
== 0))
16835 elf32_arm_allocate_irelocs (info
, srel
, 1);
16836 else if (bfd_link_pic (info
) || output_bfd
->flags
& DYNAMIC
|| htab
->fdpic_p
)
16838 if ((bfd_link_pic (info
) && !(*local_tls_type
& GOT_TLS_GDESC
)))
16839 elf32_arm_allocate_dynrelocs (info
, srel
, 1);
16840 else if (htab
->fdpic_p
&& *local_tls_type
& GOT_NORMAL
)
16841 htab
->srofixup
->size
+= 4;
16843 if ((bfd_link_pic (info
) || htab
->fdpic_p
)
16844 && *local_tls_type
& GOT_TLS_GDESC
)
16846 elf32_arm_allocate_dynrelocs (info
,
16847 htab
->root
.srelplt
, 1);
16848 htab
->tls_trampoline
= -1;
16853 *local_got
= (bfd_vma
) -1;
16857 if (htab
->tls_ldm_got
.refcount
> 0)
16859 /* Allocate two GOT entries and one dynamic relocation (if necessary)
16860 for R_ARM_TLS_LDM32/R_ARM_TLS_LDM32_FDPIC relocations. */
16861 htab
->tls_ldm_got
.offset
= htab
->root
.sgot
->size
;
16862 htab
->root
.sgot
->size
+= 8;
16863 if (bfd_link_pic (info
))
16864 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
16867 htab
->tls_ldm_got
.offset
= -1;
16869 /* At the very end of the .rofixup section is a pointer to the GOT,
16870 reserve space for it. */
16871 if (htab
->fdpic_p
&& htab
->srofixup
!= NULL
)
16872 htab
->srofixup
->size
+= 4;
16874 /* Allocate global sym .plt and .got entries, and space for global
16875 sym dynamic relocs. */
16876 elf_link_hash_traverse (& htab
->root
, allocate_dynrelocs_for_symbol
, info
);
16878 /* Here we rummage through the found bfds to collect glue information. */
16879 for (ibfd
= info
->input_bfds
; ibfd
!= NULL
; ibfd
= ibfd
->link
.next
)
16881 if (! is_arm_elf (ibfd
))
16884 /* Initialise mapping tables for code/data. */
16885 bfd_elf32_arm_init_maps (ibfd
);
16887 if (!bfd_elf32_arm_process_before_allocation (ibfd
, info
)
16888 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd
, info
)
16889 || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd
, info
))
16890 _bfd_error_handler (_("errors encountered processing file %pB"), ibfd
);
16893 /* Allocate space for the glue sections now that we've sized them. */
16894 bfd_elf32_arm_allocate_interworking_sections (info
);
16896 /* For every jump slot reserved in the sgotplt, reloc_count is
16897 incremented. However, when we reserve space for TLS descriptors,
16898 it's not incremented, so in order to compute the space reserved
16899 for them, it suffices to multiply the reloc count by the jump
16901 if (htab
->root
.srelplt
)
16902 htab
->sgotplt_jump_table_size
= elf32_arm_compute_jump_table_size(htab
);
16904 if (htab
->tls_trampoline
)
16906 if (htab
->root
.splt
->size
== 0)
16907 htab
->root
.splt
->size
+= htab
->plt_header_size
;
16909 htab
->tls_trampoline
= htab
->root
.splt
->size
;
16910 htab
->root
.splt
->size
+= htab
->plt_entry_size
;
16912 /* If we're not using lazy TLS relocations, don't generate the
16913 PLT and GOT entries they require. */
16914 if (!(info
->flags
& DF_BIND_NOW
))
16916 htab
->dt_tlsdesc_got
= htab
->root
.sgot
->size
;
16917 htab
->root
.sgot
->size
+= 4;
16919 htab
->dt_tlsdesc_plt
= htab
->root
.splt
->size
;
16920 htab
->root
.splt
->size
+= 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline
);
16924 /* The check_relocs and adjust_dynamic_symbol entry points have
16925 determined the sizes of the various dynamic sections. Allocate
16926 memory for them. */
16929 for (s
= dynobj
->sections
; s
!= NULL
; s
= s
->next
)
16933 if ((s
->flags
& SEC_LINKER_CREATED
) == 0)
16936 /* It's OK to base decisions on the section name, because none
16937 of the dynobj section names depend upon the input files. */
16938 name
= bfd_get_section_name (dynobj
, s
);
16940 if (s
== htab
->root
.splt
)
16942 /* Remember whether there is a PLT. */
16943 plt
= s
->size
!= 0;
16945 else if (CONST_STRNEQ (name
, ".rel"))
16949 /* Remember whether there are any reloc sections other
16950 than .rel(a).plt and .rela.plt.unloaded. */
16951 if (s
!= htab
->root
.srelplt
&& s
!= htab
->srelplt2
)
16954 /* We use the reloc_count field as a counter if we need
16955 to copy relocs into the output file. */
16956 s
->reloc_count
= 0;
16959 else if (s
!= htab
->root
.sgot
16960 && s
!= htab
->root
.sgotplt
16961 && s
!= htab
->root
.iplt
16962 && s
!= htab
->root
.igotplt
16963 && s
!= htab
->root
.sdynbss
16964 && s
!= htab
->root
.sdynrelro
16965 && s
!= htab
->srofixup
)
16967 /* It's not one of our sections, so don't allocate space. */
16973 /* If we don't need this section, strip it from the
16974 output file. This is mostly to handle .rel(a).bss and
16975 .rel(a).plt. We must create both sections in
16976 create_dynamic_sections, because they must be created
16977 before the linker maps input sections to output
16978 sections. The linker does that before
16979 adjust_dynamic_symbol is called, and it is that
16980 function which decides whether anything needs to go
16981 into these sections. */
16982 s
->flags
|= SEC_EXCLUDE
;
16986 if ((s
->flags
& SEC_HAS_CONTENTS
) == 0)
16989 /* Allocate memory for the section contents. */
16990 s
->contents
= (unsigned char *) bfd_zalloc (dynobj
, s
->size
);
16991 if (s
->contents
== NULL
)
16995 if (elf_hash_table (info
)->dynamic_sections_created
)
16997 /* Add some entries to the .dynamic section. We fill in the
16998 values later, in elf32_arm_finish_dynamic_sections, but we
16999 must add the entries now so that we get the correct size for
17000 the .dynamic section. The DT_DEBUG entry is filled in by the
17001 dynamic linker and used by the debugger. */
17002 #define add_dynamic_entry(TAG, VAL) \
17003 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
17005 if (bfd_link_executable (info
))
17007 if (!add_dynamic_entry (DT_DEBUG
, 0))
17013 if ( !add_dynamic_entry (DT_PLTGOT
, 0)
17014 || !add_dynamic_entry (DT_PLTRELSZ
, 0)
17015 || !add_dynamic_entry (DT_PLTREL
,
17016 htab
->use_rel
? DT_REL
: DT_RELA
)
17017 || !add_dynamic_entry (DT_JMPREL
, 0))
17020 if (htab
->dt_tlsdesc_plt
17021 && (!add_dynamic_entry (DT_TLSDESC_PLT
,0)
17022 || !add_dynamic_entry (DT_TLSDESC_GOT
,0)))
17030 if (!add_dynamic_entry (DT_REL
, 0)
17031 || !add_dynamic_entry (DT_RELSZ
, 0)
17032 || !add_dynamic_entry (DT_RELENT
, RELOC_SIZE (htab
)))
17037 if (!add_dynamic_entry (DT_RELA
, 0)
17038 || !add_dynamic_entry (DT_RELASZ
, 0)
17039 || !add_dynamic_entry (DT_RELAENT
, RELOC_SIZE (htab
)))
17044 /* If any dynamic relocs apply to a read-only section,
17045 then we need a DT_TEXTREL entry. */
17046 if ((info
->flags
& DF_TEXTREL
) == 0)
17047 elf_link_hash_traverse (&htab
->root
, maybe_set_textrel
, info
);
17049 if ((info
->flags
& DF_TEXTREL
) != 0)
17051 if (!add_dynamic_entry (DT_TEXTREL
, 0))
17054 if (htab
->vxworks_p
17055 && !elf_vxworks_add_dynamic_entries (output_bfd
, info
))
17058 #undef add_dynamic_entry
17063 /* Size sections even though they're not dynamic. We use it to setup
17064 _TLS_MODULE_BASE_, if needed. */
17067 elf32_arm_always_size_sections (bfd
*output_bfd
,
17068 struct bfd_link_info
*info
)
17071 struct elf32_arm_link_hash_table
*htab
;
17073 htab
= elf32_arm_hash_table (info
);
17075 if (bfd_link_relocatable (info
))
17078 tls_sec
= elf_hash_table (info
)->tls_sec
;
17082 struct elf_link_hash_entry
*tlsbase
;
17084 tlsbase
= elf_link_hash_lookup
17085 (elf_hash_table (info
), "_TLS_MODULE_BASE_", TRUE
, TRUE
, FALSE
);
17089 struct bfd_link_hash_entry
*bh
= NULL
;
17090 const struct elf_backend_data
*bed
17091 = get_elf_backend_data (output_bfd
);
17093 if (!(_bfd_generic_link_add_one_symbol
17094 (info
, output_bfd
, "_TLS_MODULE_BASE_", BSF_LOCAL
,
17095 tls_sec
, 0, NULL
, FALSE
,
17096 bed
->collect
, &bh
)))
17099 tlsbase
->type
= STT_TLS
;
17100 tlsbase
= (struct elf_link_hash_entry
*)bh
;
17101 tlsbase
->def_regular
= 1;
17102 tlsbase
->other
= STV_HIDDEN
;
17103 (*bed
->elf_backend_hide_symbol
) (info
, tlsbase
, TRUE
);
17107 if (htab
->fdpic_p
&& !bfd_link_relocatable (info
)
17108 && !bfd_elf_stack_segment_size (output_bfd
, info
,
17109 "__stacksize", DEFAULT_STACK_SIZE
))
17115 /* Finish up dynamic symbol handling. We set the contents of various
17116 dynamic sections here. */
17119 elf32_arm_finish_dynamic_symbol (bfd
* output_bfd
,
17120 struct bfd_link_info
* info
,
17121 struct elf_link_hash_entry
* h
,
17122 Elf_Internal_Sym
* sym
)
17124 struct elf32_arm_link_hash_table
*htab
;
17125 struct elf32_arm_link_hash_entry
*eh
;
17127 htab
= elf32_arm_hash_table (info
);
17131 eh
= (struct elf32_arm_link_hash_entry
*) h
;
17133 if (h
->plt
.offset
!= (bfd_vma
) -1)
17137 BFD_ASSERT (h
->dynindx
!= -1);
17138 if (! elf32_arm_populate_plt_entry (output_bfd
, info
, &h
->plt
, &eh
->plt
,
17143 if (!h
->def_regular
)
17145 /* Mark the symbol as undefined, rather than as defined in
17146 the .plt section. */
17147 sym
->st_shndx
= SHN_UNDEF
;
17148 /* If the symbol is weak we need to clear the value.
17149 Otherwise, the PLT entry would provide a definition for
17150 the symbol even if the symbol wasn't defined anywhere,
17151 and so the symbol would never be NULL. Leave the value if
17152 there were any relocations where pointer equality matters
17153 (this is a clue for the dynamic linker, to make function
17154 pointer comparisons work between an application and shared
17156 if (!h
->ref_regular_nonweak
|| !h
->pointer_equality_needed
)
17159 else if (eh
->is_iplt
&& eh
->plt
.noncall_refcount
!= 0)
17161 /* At least one non-call relocation references this .iplt entry,
17162 so the .iplt entry is the function's canonical address. */
17163 sym
->st_info
= ELF_ST_INFO (ELF_ST_BIND (sym
->st_info
), STT_FUNC
);
17164 ARM_SET_SYM_BRANCH_TYPE (sym
->st_target_internal
, ST_BRANCH_TO_ARM
);
17165 sym
->st_shndx
= (_bfd_elf_section_from_bfd_section
17166 (output_bfd
, htab
->root
.iplt
->output_section
));
17167 sym
->st_value
= (h
->plt
.offset
17168 + htab
->root
.iplt
->output_section
->vma
17169 + htab
->root
.iplt
->output_offset
);
17176 Elf_Internal_Rela rel
;
17178 /* This symbol needs a copy reloc. Set it up. */
17179 BFD_ASSERT (h
->dynindx
!= -1
17180 && (h
->root
.type
== bfd_link_hash_defined
17181 || h
->root
.type
== bfd_link_hash_defweak
));
17184 rel
.r_offset
= (h
->root
.u
.def
.value
17185 + h
->root
.u
.def
.section
->output_section
->vma
17186 + h
->root
.u
.def
.section
->output_offset
);
17187 rel
.r_info
= ELF32_R_INFO (h
->dynindx
, R_ARM_COPY
);
17188 if (h
->root
.u
.def
.section
== htab
->root
.sdynrelro
)
17189 s
= htab
->root
.sreldynrelro
;
17191 s
= htab
->root
.srelbss
;
17192 elf32_arm_add_dynreloc (output_bfd
, info
, s
, &rel
);
17195 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
17196 and for FDPIC, the _GLOBAL_OFFSET_TABLE_ symbol is not absolute:
17197 it is relative to the ".got" section. */
17198 if (h
== htab
->root
.hdynamic
17199 || (!htab
->fdpic_p
&& !htab
->vxworks_p
&& h
== htab
->root
.hgot
))
17200 sym
->st_shndx
= SHN_ABS
;
17206 arm_put_trampoline (struct elf32_arm_link_hash_table
*htab
, bfd
*output_bfd
,
17208 const unsigned long *template, unsigned count
)
17212 for (ix
= 0; ix
!= count
; ix
++)
17214 unsigned long insn
= template[ix
];
17216 /* Emit mov pc,rx if bx is not permitted. */
17217 if (htab
->fix_v4bx
== 1 && (insn
& 0x0ffffff0) == 0x012fff10)
17218 insn
= (insn
& 0xf000000f) | 0x01a0f000;
17219 put_arm_insn (htab
, output_bfd
, insn
, (char *)contents
+ ix
*4);
17223 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
17224 other variants, NaCl needs this entry in a static executable's
17225 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
17226 zero. For .iplt really only the last bundle is useful, and .iplt
17227 could have a shorter first entry, with each individual PLT entry's
17228 relative branch calculated differently so it targets the last
17229 bundle instead of the instruction before it (labelled .Lplt_tail
17230 above). But it's simpler to keep the size and layout of PLT0
17231 consistent with the dynamic case, at the cost of some dead code at
17232 the start of .iplt and the one dead store to the stack at the start
17235 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table
*htab
, bfd
*output_bfd
,
17236 asection
*plt
, bfd_vma got_displacement
)
17240 put_arm_insn (htab
, output_bfd
,
17241 elf32_arm_nacl_plt0_entry
[0]
17242 | arm_movw_immediate (got_displacement
),
17243 plt
->contents
+ 0);
17244 put_arm_insn (htab
, output_bfd
,
17245 elf32_arm_nacl_plt0_entry
[1]
17246 | arm_movt_immediate (got_displacement
),
17247 plt
->contents
+ 4);
17249 for (i
= 2; i
< ARRAY_SIZE (elf32_arm_nacl_plt0_entry
); ++i
)
17250 put_arm_insn (htab
, output_bfd
,
17251 elf32_arm_nacl_plt0_entry
[i
],
17252 plt
->contents
+ (i
* 4));
17255 /* Finish up the dynamic sections. */
17258 elf32_arm_finish_dynamic_sections (bfd
* output_bfd
, struct bfd_link_info
* info
)
17263 struct elf32_arm_link_hash_table
*htab
;
17265 htab
= elf32_arm_hash_table (info
);
17269 dynobj
= elf_hash_table (info
)->dynobj
;
17271 sgot
= htab
->root
.sgotplt
;
17272 /* A broken linker script might have discarded the dynamic sections.
17273 Catch this here so that we do not seg-fault later on. */
17274 if (sgot
!= NULL
&& bfd_is_abs_section (sgot
->output_section
))
17276 sdyn
= bfd_get_linker_section (dynobj
, ".dynamic");
17278 if (elf_hash_table (info
)->dynamic_sections_created
)
17281 Elf32_External_Dyn
*dyncon
, *dynconend
;
17283 splt
= htab
->root
.splt
;
17284 BFD_ASSERT (splt
!= NULL
&& sdyn
!= NULL
);
17285 BFD_ASSERT (htab
->symbian_p
|| sgot
!= NULL
);
17287 dyncon
= (Elf32_External_Dyn
*) sdyn
->contents
;
17288 dynconend
= (Elf32_External_Dyn
*) (sdyn
->contents
+ sdyn
->size
);
17290 for (; dyncon
< dynconend
; dyncon
++)
17292 Elf_Internal_Dyn dyn
;
17296 bfd_elf32_swap_dyn_in (dynobj
, dyncon
, &dyn
);
17303 if (htab
->vxworks_p
17304 && elf_vxworks_finish_dynamic_entry (output_bfd
, &dyn
))
17305 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
17310 goto get_vma_if_bpabi
;
17313 goto get_vma_if_bpabi
;
17316 goto get_vma_if_bpabi
;
17318 name
= ".gnu.version";
17319 goto get_vma_if_bpabi
;
17321 name
= ".gnu.version_d";
17322 goto get_vma_if_bpabi
;
17324 name
= ".gnu.version_r";
17325 goto get_vma_if_bpabi
;
17328 name
= htab
->symbian_p
? ".got" : ".got.plt";
17331 name
= RELOC_SECTION (htab
, ".plt");
17333 s
= bfd_get_linker_section (dynobj
, name
);
17337 (_("could not find section %s"), name
);
17338 bfd_set_error (bfd_error_invalid_operation
);
17341 if (!htab
->symbian_p
)
17342 dyn
.d_un
.d_ptr
= s
->output_section
->vma
+ s
->output_offset
;
17344 /* In the BPABI, tags in the PT_DYNAMIC section point
17345 at the file offset, not the memory address, for the
17346 convenience of the post linker. */
17347 dyn
.d_un
.d_ptr
= s
->output_section
->filepos
+ s
->output_offset
;
17348 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
17352 if (htab
->symbian_p
)
17357 s
= htab
->root
.srelplt
;
17358 BFD_ASSERT (s
!= NULL
);
17359 dyn
.d_un
.d_val
= s
->size
;
17360 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
17367 /* In the BPABI, the DT_REL tag must point at the file
17368 offset, not the VMA, of the first relocation
17369 section. So, we use code similar to that in
17370 elflink.c, but do not check for SHF_ALLOC on the
17371 relocation section, since relocation sections are
17372 never allocated under the BPABI. PLT relocs are also
17374 if (htab
->symbian_p
)
17377 type
= ((dyn
.d_tag
== DT_REL
|| dyn
.d_tag
== DT_RELSZ
)
17378 ? SHT_REL
: SHT_RELA
);
17379 dyn
.d_un
.d_val
= 0;
17380 for (i
= 1; i
< elf_numsections (output_bfd
); i
++)
17382 Elf_Internal_Shdr
*hdr
17383 = elf_elfsections (output_bfd
)[i
];
17384 if (hdr
->sh_type
== type
)
17386 if (dyn
.d_tag
== DT_RELSZ
17387 || dyn
.d_tag
== DT_RELASZ
)
17388 dyn
.d_un
.d_val
+= hdr
->sh_size
;
17389 else if ((ufile_ptr
) hdr
->sh_offset
17390 <= dyn
.d_un
.d_val
- 1)
17391 dyn
.d_un
.d_val
= hdr
->sh_offset
;
17394 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
17398 case DT_TLSDESC_PLT
:
17399 s
= htab
->root
.splt
;
17400 dyn
.d_un
.d_ptr
= (s
->output_section
->vma
+ s
->output_offset
17401 + htab
->dt_tlsdesc_plt
);
17402 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
17405 case DT_TLSDESC_GOT
:
17406 s
= htab
->root
.sgot
;
17407 dyn
.d_un
.d_ptr
= (s
->output_section
->vma
+ s
->output_offset
17408 + htab
->dt_tlsdesc_got
);
17409 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
17412 /* Set the bottom bit of DT_INIT/FINI if the
17413 corresponding function is Thumb. */
17415 name
= info
->init_function
;
17418 name
= info
->fini_function
;
17420 /* If it wasn't set by elf_bfd_final_link
17421 then there is nothing to adjust. */
17422 if (dyn
.d_un
.d_val
!= 0)
17424 struct elf_link_hash_entry
* eh
;
17426 eh
= elf_link_hash_lookup (elf_hash_table (info
), name
,
17427 FALSE
, FALSE
, TRUE
);
17429 && ARM_GET_SYM_BRANCH_TYPE (eh
->target_internal
)
17430 == ST_BRANCH_TO_THUMB
)
17432 dyn
.d_un
.d_val
|= 1;
17433 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
17440 /* Fill in the first entry in the procedure linkage table. */
17441 if (splt
->size
> 0 && htab
->plt_header_size
)
17443 const bfd_vma
*plt0_entry
;
17444 bfd_vma got_address
, plt_address
, got_displacement
;
17446 /* Calculate the addresses of the GOT and PLT. */
17447 got_address
= sgot
->output_section
->vma
+ sgot
->output_offset
;
17448 plt_address
= splt
->output_section
->vma
+ splt
->output_offset
;
17450 if (htab
->vxworks_p
)
17452 /* The VxWorks GOT is relocated by the dynamic linker.
17453 Therefore, we must emit relocations rather than simply
17454 computing the values now. */
17455 Elf_Internal_Rela rel
;
17457 plt0_entry
= elf32_arm_vxworks_exec_plt0_entry
;
17458 put_arm_insn (htab
, output_bfd
, plt0_entry
[0],
17459 splt
->contents
+ 0);
17460 put_arm_insn (htab
, output_bfd
, plt0_entry
[1],
17461 splt
->contents
+ 4);
17462 put_arm_insn (htab
, output_bfd
, plt0_entry
[2],
17463 splt
->contents
+ 8);
17464 bfd_put_32 (output_bfd
, got_address
, splt
->contents
+ 12);
17466 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
17467 rel
.r_offset
= plt_address
+ 12;
17468 rel
.r_info
= ELF32_R_INFO (htab
->root
.hgot
->indx
, R_ARM_ABS32
);
17470 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
,
17471 htab
->srelplt2
->contents
);
17473 else if (htab
->nacl_p
)
17474 arm_nacl_put_plt0 (htab
, output_bfd
, splt
,
17475 got_address
+ 8 - (plt_address
+ 16));
17476 else if (using_thumb_only (htab
))
17478 got_displacement
= got_address
- (plt_address
+ 12);
17480 plt0_entry
= elf32_thumb2_plt0_entry
;
17481 put_arm_insn (htab
, output_bfd
, plt0_entry
[0],
17482 splt
->contents
+ 0);
17483 put_arm_insn (htab
, output_bfd
, plt0_entry
[1],
17484 splt
->contents
+ 4);
17485 put_arm_insn (htab
, output_bfd
, plt0_entry
[2],
17486 splt
->contents
+ 8);
17488 bfd_put_32 (output_bfd
, got_displacement
, splt
->contents
+ 12);
17492 got_displacement
= got_address
- (plt_address
+ 16);
17494 plt0_entry
= elf32_arm_plt0_entry
;
17495 put_arm_insn (htab
, output_bfd
, plt0_entry
[0],
17496 splt
->contents
+ 0);
17497 put_arm_insn (htab
, output_bfd
, plt0_entry
[1],
17498 splt
->contents
+ 4);
17499 put_arm_insn (htab
, output_bfd
, plt0_entry
[2],
17500 splt
->contents
+ 8);
17501 put_arm_insn (htab
, output_bfd
, plt0_entry
[3],
17502 splt
->contents
+ 12);
17504 #ifdef FOUR_WORD_PLT
17505 /* The displacement value goes in the otherwise-unused
17506 last word of the second entry. */
17507 bfd_put_32 (output_bfd
, got_displacement
, splt
->contents
+ 28);
17509 bfd_put_32 (output_bfd
, got_displacement
, splt
->contents
+ 16);
17514 /* UnixWare sets the entsize of .plt to 4, although that doesn't
17515 really seem like the right value. */
17516 if (splt
->output_section
->owner
== output_bfd
)
17517 elf_section_data (splt
->output_section
)->this_hdr
.sh_entsize
= 4;
17519 if (htab
->dt_tlsdesc_plt
)
17521 bfd_vma got_address
17522 = sgot
->output_section
->vma
+ sgot
->output_offset
;
17523 bfd_vma gotplt_address
= (htab
->root
.sgot
->output_section
->vma
17524 + htab
->root
.sgot
->output_offset
);
17525 bfd_vma plt_address
17526 = splt
->output_section
->vma
+ splt
->output_offset
;
17528 arm_put_trampoline (htab
, output_bfd
,
17529 splt
->contents
+ htab
->dt_tlsdesc_plt
,
17530 dl_tlsdesc_lazy_trampoline
, 6);
17532 bfd_put_32 (output_bfd
,
17533 gotplt_address
+ htab
->dt_tlsdesc_got
17534 - (plt_address
+ htab
->dt_tlsdesc_plt
)
17535 - dl_tlsdesc_lazy_trampoline
[6],
17536 splt
->contents
+ htab
->dt_tlsdesc_plt
+ 24);
17537 bfd_put_32 (output_bfd
,
17538 got_address
- (plt_address
+ htab
->dt_tlsdesc_plt
)
17539 - dl_tlsdesc_lazy_trampoline
[7],
17540 splt
->contents
+ htab
->dt_tlsdesc_plt
+ 24 + 4);
17543 if (htab
->tls_trampoline
)
17545 arm_put_trampoline (htab
, output_bfd
,
17546 splt
->contents
+ htab
->tls_trampoline
,
17547 tls_trampoline
, 3);
17548 #ifdef FOUR_WORD_PLT
17549 bfd_put_32 (output_bfd
, 0x00000000,
17550 splt
->contents
+ htab
->tls_trampoline
+ 12);
17554 if (htab
->vxworks_p
17555 && !bfd_link_pic (info
)
17556 && htab
->root
.splt
->size
> 0)
17558 /* Correct the .rel(a).plt.unloaded relocations. They will have
17559 incorrect symbol indexes. */
17563 num_plts
= ((htab
->root
.splt
->size
- htab
->plt_header_size
)
17564 / htab
->plt_entry_size
);
17565 p
= htab
->srelplt2
->contents
+ RELOC_SIZE (htab
);
17567 for (; num_plts
; num_plts
--)
17569 Elf_Internal_Rela rel
;
17571 SWAP_RELOC_IN (htab
) (output_bfd
, p
, &rel
);
17572 rel
.r_info
= ELF32_R_INFO (htab
->root
.hgot
->indx
, R_ARM_ABS32
);
17573 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, p
);
17574 p
+= RELOC_SIZE (htab
);
17576 SWAP_RELOC_IN (htab
) (output_bfd
, p
, &rel
);
17577 rel
.r_info
= ELF32_R_INFO (htab
->root
.hplt
->indx
, R_ARM_ABS32
);
17578 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, p
);
17579 p
+= RELOC_SIZE (htab
);
17584 if (htab
->nacl_p
&& htab
->root
.iplt
!= NULL
&& htab
->root
.iplt
->size
> 0)
17585 /* NaCl uses a special first entry in .iplt too. */
17586 arm_nacl_put_plt0 (htab
, output_bfd
, htab
->root
.iplt
, 0);
17588 /* Fill in the first three entries in the global offset table. */
17591 if (sgot
->size
> 0)
17594 bfd_put_32 (output_bfd
, (bfd_vma
) 0, sgot
->contents
);
17596 bfd_put_32 (output_bfd
,
17597 sdyn
->output_section
->vma
+ sdyn
->output_offset
,
17599 bfd_put_32 (output_bfd
, (bfd_vma
) 0, sgot
->contents
+ 4);
17600 bfd_put_32 (output_bfd
, (bfd_vma
) 0, sgot
->contents
+ 8);
17603 elf_section_data (sgot
->output_section
)->this_hdr
.sh_entsize
= 4;
17606 /* At the very end of the .rofixup section is a pointer to the GOT. */
17607 if (htab
->fdpic_p
&& htab
->srofixup
!= NULL
)
17609 struct elf_link_hash_entry
*hgot
= htab
->root
.hgot
;
17611 bfd_vma got_value
= hgot
->root
.u
.def
.value
17612 + hgot
->root
.u
.def
.section
->output_section
->vma
17613 + hgot
->root
.u
.def
.section
->output_offset
;
17615 arm_elf_add_rofixup(output_bfd
, htab
->srofixup
, got_value
);
17617 /* Make sure we allocated and generated the same number of fixups. */
17618 BFD_ASSERT (htab
->srofixup
->reloc_count
* 4 == htab
->srofixup
->size
);
17625 elf32_arm_post_process_headers (bfd
* abfd
, struct bfd_link_info
* link_info ATTRIBUTE_UNUSED
)
17627 Elf_Internal_Ehdr
* i_ehdrp
; /* ELF file header, internal form. */
17628 struct elf32_arm_link_hash_table
*globals
;
17629 struct elf_segment_map
*m
;
17631 i_ehdrp
= elf_elfheader (abfd
);
17633 if (EF_ARM_EABI_VERSION (i_ehdrp
->e_flags
) == EF_ARM_EABI_UNKNOWN
)
17634 i_ehdrp
->e_ident
[EI_OSABI
] = ELFOSABI_ARM
;
17636 _bfd_elf_post_process_headers (abfd
, link_info
);
17637 i_ehdrp
->e_ident
[EI_ABIVERSION
] = ARM_ELF_ABI_VERSION
;
17641 globals
= elf32_arm_hash_table (link_info
);
17642 if (globals
!= NULL
&& globals
->byteswap_code
)
17643 i_ehdrp
->e_flags
|= EF_ARM_BE8
;
17645 if (globals
->fdpic_p
)
17646 i_ehdrp
->e_ident
[EI_OSABI
] |= ELFOSABI_ARM_FDPIC
;
17649 if (EF_ARM_EABI_VERSION (i_ehdrp
->e_flags
) == EF_ARM_EABI_VER5
17650 && ((i_ehdrp
->e_type
== ET_DYN
) || (i_ehdrp
->e_type
== ET_EXEC
)))
17652 int abi
= bfd_elf_get_obj_attr_int (abfd
, OBJ_ATTR_PROC
, Tag_ABI_VFP_args
);
17653 if (abi
== AEABI_VFP_args_vfp
)
17654 i_ehdrp
->e_flags
|= EF_ARM_ABI_FLOAT_HARD
;
17656 i_ehdrp
->e_flags
|= EF_ARM_ABI_FLOAT_SOFT
;
17659 /* Scan segment to set p_flags attribute if it contains only sections with
17660 SHF_ARM_PURECODE flag. */
17661 for (m
= elf_seg_map (abfd
); m
!= NULL
; m
= m
->next
)
17667 for (j
= 0; j
< m
->count
; j
++)
17669 if (!(elf_section_flags (m
->sections
[j
]) & SHF_ARM_PURECODE
))
17675 m
->p_flags_valid
= 1;
17680 static enum elf_reloc_type_class
17681 elf32_arm_reloc_type_class (const struct bfd_link_info
*info ATTRIBUTE_UNUSED
,
17682 const asection
*rel_sec ATTRIBUTE_UNUSED
,
17683 const Elf_Internal_Rela
*rela
)
17685 switch ((int) ELF32_R_TYPE (rela
->r_info
))
17687 case R_ARM_RELATIVE
:
17688 return reloc_class_relative
;
17689 case R_ARM_JUMP_SLOT
:
17690 return reloc_class_plt
;
17692 return reloc_class_copy
;
17693 case R_ARM_IRELATIVE
:
17694 return reloc_class_ifunc
;
17696 return reloc_class_normal
;
17701 elf32_arm_final_write_processing (bfd
*abfd
, bfd_boolean linker ATTRIBUTE_UNUSED
)
17703 bfd_arm_update_notes (abfd
, ARM_NOTE_SECTION
);
17706 /* Return TRUE if this is an unwinding table entry. */
17709 is_arm_elf_unwind_section_name (bfd
* abfd ATTRIBUTE_UNUSED
, const char * name
)
17711 return (CONST_STRNEQ (name
, ELF_STRING_ARM_unwind
)
17712 || CONST_STRNEQ (name
, ELF_STRING_ARM_unwind_once
));
17716 /* Set the type and flags for an ARM section. We do this by
17717 the section name, which is a hack, but ought to work. */
17720 elf32_arm_fake_sections (bfd
* abfd
, Elf_Internal_Shdr
* hdr
, asection
* sec
)
17724 name
= bfd_get_section_name (abfd
, sec
);
17726 if (is_arm_elf_unwind_section_name (abfd
, name
))
17728 hdr
->sh_type
= SHT_ARM_EXIDX
;
17729 hdr
->sh_flags
|= SHF_LINK_ORDER
;
17732 if (sec
->flags
& SEC_ELF_PURECODE
)
17733 hdr
->sh_flags
|= SHF_ARM_PURECODE
;
17738 /* Handle an ARM specific section when reading an object file. This is
17739 called when bfd_section_from_shdr finds a section with an unknown
17743 elf32_arm_section_from_shdr (bfd
*abfd
,
17744 Elf_Internal_Shdr
* hdr
,
17748 /* There ought to be a place to keep ELF backend specific flags, but
17749 at the moment there isn't one. We just keep track of the
17750 sections by their name, instead. Fortunately, the ABI gives
17751 names for all the ARM specific sections, so we will probably get
17753 switch (hdr
->sh_type
)
17755 case SHT_ARM_EXIDX
:
17756 case SHT_ARM_PREEMPTMAP
:
17757 case SHT_ARM_ATTRIBUTES
:
17764 if (! _bfd_elf_make_section_from_shdr (abfd
, hdr
, name
, shindex
))
17770 static _arm_elf_section_data
*
17771 get_arm_elf_section_data (asection
* sec
)
17773 if (sec
&& sec
->owner
&& is_arm_elf (sec
->owner
))
17774 return elf32_arm_section_data (sec
);
17782 struct bfd_link_info
*info
;
17785 int (*func
) (void *, const char *, Elf_Internal_Sym
*,
17786 asection
*, struct elf_link_hash_entry
*);
17787 } output_arch_syminfo
;
17789 enum map_symbol_type
17797 /* Output a single mapping symbol. */
17800 elf32_arm_output_map_sym (output_arch_syminfo
*osi
,
17801 enum map_symbol_type type
,
17804 static const char *names
[3] = {"$a", "$t", "$d"};
17805 Elf_Internal_Sym sym
;
17807 sym
.st_value
= osi
->sec
->output_section
->vma
17808 + osi
->sec
->output_offset
17812 sym
.st_info
= ELF_ST_INFO (STB_LOCAL
, STT_NOTYPE
);
17813 sym
.st_shndx
= osi
->sec_shndx
;
17814 sym
.st_target_internal
= 0;
17815 elf32_arm_section_map_add (osi
->sec
, names
[type
][1], offset
);
17816 return osi
->func (osi
->flaginfo
, names
[type
], &sym
, osi
->sec
, NULL
) == 1;
17819 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
17820 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
17823 elf32_arm_output_plt_map_1 (output_arch_syminfo
*osi
,
17824 bfd_boolean is_iplt_entry_p
,
17825 union gotplt_union
*root_plt
,
17826 struct arm_plt_info
*arm_plt
)
17828 struct elf32_arm_link_hash_table
*htab
;
17829 bfd_vma addr
, plt_header_size
;
17831 if (root_plt
->offset
== (bfd_vma
) -1)
17834 htab
= elf32_arm_hash_table (osi
->info
);
17838 if (is_iplt_entry_p
)
17840 osi
->sec
= htab
->root
.iplt
;
17841 plt_header_size
= 0;
17845 osi
->sec
= htab
->root
.splt
;
17846 plt_header_size
= htab
->plt_header_size
;
17848 osi
->sec_shndx
= (_bfd_elf_section_from_bfd_section
17849 (osi
->info
->output_bfd
, osi
->sec
->output_section
));
17851 addr
= root_plt
->offset
& -2;
17852 if (htab
->symbian_p
)
17854 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
17856 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 4))
17859 else if (htab
->vxworks_p
)
17861 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
17863 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 8))
17865 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
+ 12))
17867 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 20))
17870 else if (htab
->nacl_p
)
17872 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
17875 else if (htab
->fdpic_p
)
17877 enum map_symbol_type type
= using_thumb_only(htab
)
17881 if (elf32_arm_plt_needs_thumb_stub_p (osi
->info
, arm_plt
))
17882 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_THUMB
, addr
- 4))
17884 if (!elf32_arm_output_map_sym (osi
, type
, addr
))
17886 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 16))
17888 if (htab
->plt_entry_size
== 4 * ARRAY_SIZE(elf32_arm_fdpic_plt_entry
))
17889 if (!elf32_arm_output_map_sym (osi
, type
, addr
+ 24))
17892 else if (using_thumb_only (htab
))
17894 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_THUMB
, addr
))
17899 bfd_boolean thumb_stub_p
;
17901 thumb_stub_p
= elf32_arm_plt_needs_thumb_stub_p (osi
->info
, arm_plt
);
17904 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_THUMB
, addr
- 4))
17907 #ifdef FOUR_WORD_PLT
17908 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
17910 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 12))
17913 /* A three-word PLT with no Thumb thunk contains only Arm code,
17914 so only need to output a mapping symbol for the first PLT entry and
17915 entries with thumb thunks. */
17916 if (thumb_stub_p
|| addr
== plt_header_size
)
17918 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
17927 /* Output mapping symbols for PLT entries associated with H. */
17930 elf32_arm_output_plt_map (struct elf_link_hash_entry
*h
, void *inf
)
17932 output_arch_syminfo
*osi
= (output_arch_syminfo
*) inf
;
17933 struct elf32_arm_link_hash_entry
*eh
;
17935 if (h
->root
.type
== bfd_link_hash_indirect
)
17938 if (h
->root
.type
== bfd_link_hash_warning
)
17939 /* When warning symbols are created, they **replace** the "real"
17940 entry in the hash table, thus we never get to see the real
17941 symbol in a hash traversal. So look at it now. */
17942 h
= (struct elf_link_hash_entry
*) h
->root
.u
.i
.link
;
17944 eh
= (struct elf32_arm_link_hash_entry
*) h
;
17945 return elf32_arm_output_plt_map_1 (osi
, SYMBOL_CALLS_LOCAL (osi
->info
, h
),
17946 &h
->plt
, &eh
->plt
);
17949 /* Bind a veneered symbol to its veneer identified by its hash entry
17950 STUB_ENTRY. The veneered location thus loose its symbol. */
17953 arm_stub_claim_sym (struct elf32_arm_stub_hash_entry
*stub_entry
)
17955 struct elf32_arm_link_hash_entry
*hash
= stub_entry
->h
;
17958 hash
->root
.root
.u
.def
.section
= stub_entry
->stub_sec
;
17959 hash
->root
.root
.u
.def
.value
= stub_entry
->stub_offset
;
17960 hash
->root
.size
= stub_entry
->stub_size
;
17963 /* Output a single local symbol for a generated stub. */
17966 elf32_arm_output_stub_sym (output_arch_syminfo
*osi
, const char *name
,
17967 bfd_vma offset
, bfd_vma size
)
17969 Elf_Internal_Sym sym
;
17971 sym
.st_value
= osi
->sec
->output_section
->vma
17972 + osi
->sec
->output_offset
17974 sym
.st_size
= size
;
17976 sym
.st_info
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
17977 sym
.st_shndx
= osi
->sec_shndx
;
17978 sym
.st_target_internal
= 0;
17979 return osi
->func (osi
->flaginfo
, name
, &sym
, osi
->sec
, NULL
) == 1;
17983 arm_map_one_stub (struct bfd_hash_entry
* gen_entry
,
17986 struct elf32_arm_stub_hash_entry
*stub_entry
;
17987 asection
*stub_sec
;
17990 output_arch_syminfo
*osi
;
17991 const insn_sequence
*template_sequence
;
17992 enum stub_insn_type prev_type
;
17995 enum map_symbol_type sym_type
;
17997 /* Massage our args to the form they really have. */
17998 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
17999 osi
= (output_arch_syminfo
*) in_arg
;
18001 stub_sec
= stub_entry
->stub_sec
;
18003 /* Ensure this stub is attached to the current section being
18005 if (stub_sec
!= osi
->sec
)
18008 addr
= (bfd_vma
) stub_entry
->stub_offset
;
18009 template_sequence
= stub_entry
->stub_template
;
18011 if (arm_stub_sym_claimed (stub_entry
->stub_type
))
18012 arm_stub_claim_sym (stub_entry
);
18015 stub_name
= stub_entry
->output_name
;
18016 switch (template_sequence
[0].type
)
18019 if (!elf32_arm_output_stub_sym (osi
, stub_name
, addr
,
18020 stub_entry
->stub_size
))
18025 if (!elf32_arm_output_stub_sym (osi
, stub_name
, addr
| 1,
18026 stub_entry
->stub_size
))
18035 prev_type
= DATA_TYPE
;
18037 for (i
= 0; i
< stub_entry
->stub_template_size
; i
++)
18039 switch (template_sequence
[i
].type
)
18042 sym_type
= ARM_MAP_ARM
;
18047 sym_type
= ARM_MAP_THUMB
;
18051 sym_type
= ARM_MAP_DATA
;
18059 if (template_sequence
[i
].type
!= prev_type
)
18061 prev_type
= template_sequence
[i
].type
;
18062 if (!elf32_arm_output_map_sym (osi
, sym_type
, addr
+ size
))
18066 switch (template_sequence
[i
].type
)
18090 /* Output mapping symbols for linker generated sections,
18091 and for those data-only sections that do not have a
18095 elf32_arm_output_arch_local_syms (bfd
*output_bfd
,
18096 struct bfd_link_info
*info
,
18098 int (*func
) (void *, const char *,
18099 Elf_Internal_Sym
*,
18101 struct elf_link_hash_entry
*))
18103 output_arch_syminfo osi
;
18104 struct elf32_arm_link_hash_table
*htab
;
18106 bfd_size_type size
;
18109 htab
= elf32_arm_hash_table (info
);
18113 check_use_blx (htab
);
18115 osi
.flaginfo
= flaginfo
;
18119 /* Add a $d mapping symbol to data-only sections that
18120 don't have any mapping symbol. This may result in (harmless) redundant
18121 mapping symbols. */
18122 for (input_bfd
= info
->input_bfds
;
18124 input_bfd
= input_bfd
->link
.next
)
18126 if ((input_bfd
->flags
& (BFD_LINKER_CREATED
| HAS_SYMS
)) == HAS_SYMS
)
18127 for (osi
.sec
= input_bfd
->sections
;
18129 osi
.sec
= osi
.sec
->next
)
18131 if (osi
.sec
->output_section
!= NULL
18132 && ((osi
.sec
->output_section
->flags
& (SEC_ALLOC
| SEC_CODE
))
18134 && (osi
.sec
->flags
& (SEC_HAS_CONTENTS
| SEC_LINKER_CREATED
))
18135 == SEC_HAS_CONTENTS
18136 && get_arm_elf_section_data (osi
.sec
) != NULL
18137 && get_arm_elf_section_data (osi
.sec
)->mapcount
== 0
18138 && osi
.sec
->size
> 0
18139 && (osi
.sec
->flags
& SEC_EXCLUDE
) == 0)
18141 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
18142 (output_bfd
, osi
.sec
->output_section
);
18143 if (osi
.sec_shndx
!= (int)SHN_BAD
)
18144 elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, 0);
18149 /* ARM->Thumb glue. */
18150 if (htab
->arm_glue_size
> 0)
18152 osi
.sec
= bfd_get_linker_section (htab
->bfd_of_glue_owner
,
18153 ARM2THUMB_GLUE_SECTION_NAME
);
18155 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
18156 (output_bfd
, osi
.sec
->output_section
);
18157 if (bfd_link_pic (info
) || htab
->root
.is_relocatable_executable
18158 || htab
->pic_veneer
)
18159 size
= ARM2THUMB_PIC_GLUE_SIZE
;
18160 else if (htab
->use_blx
)
18161 size
= ARM2THUMB_V5_STATIC_GLUE_SIZE
;
18163 size
= ARM2THUMB_STATIC_GLUE_SIZE
;
18165 for (offset
= 0; offset
< htab
->arm_glue_size
; offset
+= size
)
18167 elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, offset
);
18168 elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, offset
+ size
- 4);
18172 /* Thumb->ARM glue. */
18173 if (htab
->thumb_glue_size
> 0)
18175 osi
.sec
= bfd_get_linker_section (htab
->bfd_of_glue_owner
,
18176 THUMB2ARM_GLUE_SECTION_NAME
);
18178 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
18179 (output_bfd
, osi
.sec
->output_section
);
18180 size
= THUMB2ARM_GLUE_SIZE
;
18182 for (offset
= 0; offset
< htab
->thumb_glue_size
; offset
+= size
)
18184 elf32_arm_output_map_sym (&osi
, ARM_MAP_THUMB
, offset
);
18185 elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, offset
+ 4);
18189 /* ARMv4 BX veneers. */
18190 if (htab
->bx_glue_size
> 0)
18192 osi
.sec
= bfd_get_linker_section (htab
->bfd_of_glue_owner
,
18193 ARM_BX_GLUE_SECTION_NAME
);
18195 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
18196 (output_bfd
, osi
.sec
->output_section
);
18198 elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0);
18201 /* Long calls stubs. */
18202 if (htab
->stub_bfd
&& htab
->stub_bfd
->sections
)
18204 asection
* stub_sec
;
18206 for (stub_sec
= htab
->stub_bfd
->sections
;
18208 stub_sec
= stub_sec
->next
)
18210 /* Ignore non-stub sections. */
18211 if (!strstr (stub_sec
->name
, STUB_SUFFIX
))
18214 osi
.sec
= stub_sec
;
18216 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
18217 (output_bfd
, osi
.sec
->output_section
);
18219 bfd_hash_traverse (&htab
->stub_hash_table
, arm_map_one_stub
, &osi
);
18223 /* Finally, output mapping symbols for the PLT. */
18224 if (htab
->root
.splt
&& htab
->root
.splt
->size
> 0)
18226 osi
.sec
= htab
->root
.splt
;
18227 osi
.sec_shndx
= (_bfd_elf_section_from_bfd_section
18228 (output_bfd
, osi
.sec
->output_section
));
18230 /* Output mapping symbols for the plt header. SymbianOS does not have a
18232 if (htab
->vxworks_p
)
18234 /* VxWorks shared libraries have no PLT header. */
18235 if (!bfd_link_pic (info
))
18237 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0))
18239 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, 12))
18243 else if (htab
->nacl_p
)
18245 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0))
18248 else if (using_thumb_only (htab
) && !htab
->fdpic_p
)
18250 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_THUMB
, 0))
18252 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, 12))
18254 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_THUMB
, 16))
18257 else if (!htab
->symbian_p
&& !htab
->fdpic_p
)
18259 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0))
18261 #ifndef FOUR_WORD_PLT
18262 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, 16))
18267 if (htab
->nacl_p
&& htab
->root
.iplt
&& htab
->root
.iplt
->size
> 0)
18269 /* NaCl uses a special first entry in .iplt too. */
18270 osi
.sec
= htab
->root
.iplt
;
18271 osi
.sec_shndx
= (_bfd_elf_section_from_bfd_section
18272 (output_bfd
, osi
.sec
->output_section
));
18273 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0))
18276 if ((htab
->root
.splt
&& htab
->root
.splt
->size
> 0)
18277 || (htab
->root
.iplt
&& htab
->root
.iplt
->size
> 0))
18279 elf_link_hash_traverse (&htab
->root
, elf32_arm_output_plt_map
, &osi
);
18280 for (input_bfd
= info
->input_bfds
;
18282 input_bfd
= input_bfd
->link
.next
)
18284 struct arm_local_iplt_info
**local_iplt
;
18285 unsigned int i
, num_syms
;
18287 local_iplt
= elf32_arm_local_iplt (input_bfd
);
18288 if (local_iplt
!= NULL
)
18290 num_syms
= elf_symtab_hdr (input_bfd
).sh_info
;
18291 for (i
= 0; i
< num_syms
; i
++)
18292 if (local_iplt
[i
] != NULL
18293 && !elf32_arm_output_plt_map_1 (&osi
, TRUE
,
18294 &local_iplt
[i
]->root
,
18295 &local_iplt
[i
]->arm
))
18300 if (htab
->dt_tlsdesc_plt
!= 0)
18302 /* Mapping symbols for the lazy tls trampoline. */
18303 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, htab
->dt_tlsdesc_plt
))
18306 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
,
18307 htab
->dt_tlsdesc_plt
+ 24))
18310 if (htab
->tls_trampoline
!= 0)
18312 /* Mapping symbols for the tls trampoline. */
18313 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, htab
->tls_trampoline
))
18315 #ifdef FOUR_WORD_PLT
18316 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
,
18317 htab
->tls_trampoline
+ 12))
18325 /* Filter normal symbols of CMSE entry functions of ABFD to include in
18326 the import library. All SYMCOUNT symbols of ABFD can be examined
18327 from their pointers in SYMS. Pointers of symbols to keep should be
18328 stored continuously at the beginning of that array.
18330 Returns the number of symbols to keep. */
18332 static unsigned int
18333 elf32_arm_filter_cmse_symbols (bfd
*abfd ATTRIBUTE_UNUSED
,
18334 struct bfd_link_info
*info
,
18335 asymbol
**syms
, long symcount
)
18339 long src_count
, dst_count
= 0;
18340 struct elf32_arm_link_hash_table
*htab
;
18342 htab
= elf32_arm_hash_table (info
);
18343 if (!htab
->stub_bfd
|| !htab
->stub_bfd
->sections
)
18347 cmse_name
= (char *) bfd_malloc (maxnamelen
);
18348 for (src_count
= 0; src_count
< symcount
; src_count
++)
18350 struct elf32_arm_link_hash_entry
*cmse_hash
;
18356 sym
= syms
[src_count
];
18357 flags
= sym
->flags
;
18358 name
= (char *) bfd_asymbol_name (sym
);
18360 if ((flags
& BSF_FUNCTION
) != BSF_FUNCTION
)
18362 if (!(flags
& (BSF_GLOBAL
| BSF_WEAK
)))
18365 namelen
= strlen (name
) + sizeof (CMSE_PREFIX
) + 1;
18366 if (namelen
> maxnamelen
)
18368 cmse_name
= (char *)
18369 bfd_realloc (cmse_name
, namelen
);
18370 maxnamelen
= namelen
;
18372 snprintf (cmse_name
, maxnamelen
, "%s%s", CMSE_PREFIX
, name
);
18373 cmse_hash
= (struct elf32_arm_link_hash_entry
*)
18374 elf_link_hash_lookup (&(htab
)->root
, cmse_name
, FALSE
, FALSE
, TRUE
);
18377 || (cmse_hash
->root
.root
.type
!= bfd_link_hash_defined
18378 && cmse_hash
->root
.root
.type
!= bfd_link_hash_defweak
)
18379 || cmse_hash
->root
.type
!= STT_FUNC
)
18382 if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash
->root
.target_internal
))
18385 syms
[dst_count
++] = sym
;
18389 syms
[dst_count
] = NULL
;
18394 /* Filter symbols of ABFD to include in the import library. All
18395 SYMCOUNT symbols of ABFD can be examined from their pointers in
18396 SYMS. Pointers of symbols to keep should be stored continuously at
18397 the beginning of that array.
18399 Returns the number of symbols to keep. */
18401 static unsigned int
18402 elf32_arm_filter_implib_symbols (bfd
*abfd ATTRIBUTE_UNUSED
,
18403 struct bfd_link_info
*info
,
18404 asymbol
**syms
, long symcount
)
18406 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (info
);
18408 /* Requirement 8 of "ARM v8-M Security Extensions: Requirements on
18409 Development Tools" (ARM-ECM-0359818) mandates Secure Gateway import
18410 library to be a relocatable object file. */
18411 BFD_ASSERT (!(bfd_get_file_flags (info
->out_implib_bfd
) & EXEC_P
));
18412 if (globals
->cmse_implib
)
18413 return elf32_arm_filter_cmse_symbols (abfd
, info
, syms
, symcount
);
18415 return _bfd_elf_filter_global_symbols (abfd
, info
, syms
, symcount
);
18418 /* Allocate target specific section data. */
18421 elf32_arm_new_section_hook (bfd
*abfd
, asection
*sec
)
18423 if (!sec
->used_by_bfd
)
18425 _arm_elf_section_data
*sdata
;
18426 bfd_size_type amt
= sizeof (*sdata
);
18428 sdata
= (_arm_elf_section_data
*) bfd_zalloc (abfd
, amt
);
18431 sec
->used_by_bfd
= sdata
;
18434 return _bfd_elf_new_section_hook (abfd
, sec
);
18438 /* Used to order a list of mapping symbols by address. */
18441 elf32_arm_compare_mapping (const void * a
, const void * b
)
18443 const elf32_arm_section_map
*amap
= (const elf32_arm_section_map
*) a
;
18444 const elf32_arm_section_map
*bmap
= (const elf32_arm_section_map
*) b
;
18446 if (amap
->vma
> bmap
->vma
)
18448 else if (amap
->vma
< bmap
->vma
)
18450 else if (amap
->type
> bmap
->type
)
18451 /* Ensure results do not depend on the host qsort for objects with
18452 multiple mapping symbols at the same address by sorting on type
18455 else if (amap
->type
< bmap
->type
)
18461 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
18463 static unsigned long
18464 offset_prel31 (unsigned long addr
, bfd_vma offset
)
18466 return (addr
& ~0x7ffffffful
) | ((addr
+ offset
) & 0x7ffffffful
);
18469 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
18473 copy_exidx_entry (bfd
*output_bfd
, bfd_byte
*to
, bfd_byte
*from
, bfd_vma offset
)
18475 unsigned long first_word
= bfd_get_32 (output_bfd
, from
);
18476 unsigned long second_word
= bfd_get_32 (output_bfd
, from
+ 4);
18478 /* High bit of first word is supposed to be zero. */
18479 if ((first_word
& 0x80000000ul
) == 0)
18480 first_word
= offset_prel31 (first_word
, offset
);
18482 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
18483 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
18484 if ((second_word
!= 0x1) && ((second_word
& 0x80000000ul
) == 0))
18485 second_word
= offset_prel31 (second_word
, offset
);
18487 bfd_put_32 (output_bfd
, first_word
, to
);
18488 bfd_put_32 (output_bfd
, second_word
, to
+ 4);
18491 /* Data for make_branch_to_a8_stub(). */
18493 struct a8_branch_to_stub_data
18495 asection
*writing_section
;
18496 bfd_byte
*contents
;
18500 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
18501 places for a particular section. */
18504 make_branch_to_a8_stub (struct bfd_hash_entry
*gen_entry
,
18507 struct elf32_arm_stub_hash_entry
*stub_entry
;
18508 struct a8_branch_to_stub_data
*data
;
18509 bfd_byte
*contents
;
18510 unsigned long branch_insn
;
18511 bfd_vma veneered_insn_loc
, veneer_entry_loc
;
18512 bfd_signed_vma branch_offset
;
18516 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
18517 data
= (struct a8_branch_to_stub_data
*) in_arg
;
18519 if (stub_entry
->target_section
!= data
->writing_section
18520 || stub_entry
->stub_type
< arm_stub_a8_veneer_lwm
)
18523 contents
= data
->contents
;
18525 /* We use target_section as Cortex-A8 erratum workaround stubs are only
18526 generated when both source and target are in the same section. */
18527 veneered_insn_loc
= stub_entry
->target_section
->output_section
->vma
18528 + stub_entry
->target_section
->output_offset
18529 + stub_entry
->source_value
;
18531 veneer_entry_loc
= stub_entry
->stub_sec
->output_section
->vma
18532 + stub_entry
->stub_sec
->output_offset
18533 + stub_entry
->stub_offset
;
18535 if (stub_entry
->stub_type
== arm_stub_a8_veneer_blx
)
18536 veneered_insn_loc
&= ~3u;
18538 branch_offset
= veneer_entry_loc
- veneered_insn_loc
- 4;
18540 abfd
= stub_entry
->target_section
->owner
;
18541 loc
= stub_entry
->source_value
;
18543 /* We attempt to avoid this condition by setting stubs_always_after_branch
18544 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
18545 This check is just to be on the safe side... */
18546 if ((veneered_insn_loc
& ~0xfff) == (veneer_entry_loc
& ~0xfff))
18548 _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub is "
18549 "allocated in unsafe location"), abfd
);
18553 switch (stub_entry
->stub_type
)
18555 case arm_stub_a8_veneer_b
:
18556 case arm_stub_a8_veneer_b_cond
:
18557 branch_insn
= 0xf0009000;
18560 case arm_stub_a8_veneer_blx
:
18561 branch_insn
= 0xf000e800;
18564 case arm_stub_a8_veneer_bl
:
18566 unsigned int i1
, j1
, i2
, j2
, s
;
18568 branch_insn
= 0xf000d000;
18571 if (branch_offset
< -16777216 || branch_offset
> 16777214)
18573 /* There's not much we can do apart from complain if this
18575 _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub out "
18576 "of range (input file too large)"), abfd
);
18580 /* i1 = not(j1 eor s), so:
18582 j1 = (not i1) eor s. */
18584 branch_insn
|= (branch_offset
>> 1) & 0x7ff;
18585 branch_insn
|= ((branch_offset
>> 12) & 0x3ff) << 16;
18586 i2
= (branch_offset
>> 22) & 1;
18587 i1
= (branch_offset
>> 23) & 1;
18588 s
= (branch_offset
>> 24) & 1;
18591 branch_insn
|= j2
<< 11;
18592 branch_insn
|= j1
<< 13;
18593 branch_insn
|= s
<< 26;
18602 bfd_put_16 (abfd
, (branch_insn
>> 16) & 0xffff, &contents
[loc
]);
18603 bfd_put_16 (abfd
, branch_insn
& 0xffff, &contents
[loc
+ 2]);
18608 /* Beginning of stm32l4xx work-around. */
18610 /* Functions encoding instructions necessary for the emission of the
18611 fix-stm32l4xx-629360.
18612 Encoding is extracted from the
18613 ARM (C) Architecture Reference Manual
18614 ARMv7-A and ARMv7-R edition
18615 ARM DDI 0406C.b (ID072512). */
18617 static inline bfd_vma
18618 create_instruction_branch_absolute (int branch_offset
)
18620 /* A8.8.18 B (A8-334)
18621 B target_address (Encoding T4). */
18622 /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii. */
18623 /* jump offset is: S:I1:I2:imm10:imm11:0. */
18624 /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S). */
18626 int s
= ((branch_offset
& 0x1000000) >> 24);
18627 int j1
= s
^ !((branch_offset
& 0x800000) >> 23);
18628 int j2
= s
^ !((branch_offset
& 0x400000) >> 22);
18630 if (branch_offset
< -(1 << 24) || branch_offset
>= (1 << 24))
18631 BFD_ASSERT (0 && "Error: branch out of range. Cannot create branch.");
18633 bfd_vma patched_inst
= 0xf0009000
18635 | (((unsigned long) (branch_offset
) >> 12) & 0x3ff) << 16 /* imm10. */
18636 | j1
<< 13 /* J1. */
18637 | j2
<< 11 /* J2. */
18638 | (((unsigned long) (branch_offset
) >> 1) & 0x7ff); /* imm11. */
18640 return patched_inst
;
18643 static inline bfd_vma
18644 create_instruction_ldmia (int base_reg
, int wback
, int reg_mask
)
18646 /* A8.8.57 LDM/LDMIA/LDMFD (A8-396)
18647 LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2). */
18648 bfd_vma patched_inst
= 0xe8900000
18649 | (/*W=*/wback
<< 21)
18651 | (reg_mask
& 0x0000ffff);
18653 return patched_inst
;
18656 static inline bfd_vma
18657 create_instruction_ldmdb (int base_reg
, int wback
, int reg_mask
)
18659 /* A8.8.60 LDMDB/LDMEA (A8-402)
18660 LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1). */
18661 bfd_vma patched_inst
= 0xe9100000
18662 | (/*W=*/wback
<< 21)
18664 | (reg_mask
& 0x0000ffff);
18666 return patched_inst
;
18669 static inline bfd_vma
18670 create_instruction_mov (int target_reg
, int source_reg
)
18672 /* A8.8.103 MOV (register) (A8-486)
18673 MOV Rd, Rm (Encoding T1). */
18674 bfd_vma patched_inst
= 0x4600
18675 | (target_reg
& 0x7)
18676 | ((target_reg
& 0x8) >> 3) << 7
18677 | (source_reg
<< 3);
18679 return patched_inst
;
18682 static inline bfd_vma
18683 create_instruction_sub (int target_reg
, int source_reg
, int value
)
18685 /* A8.8.221 SUB (immediate) (A8-708)
18686 SUB Rd, Rn, #value (Encoding T3). */
18687 bfd_vma patched_inst
= 0xf1a00000
18688 | (target_reg
<< 8)
18689 | (source_reg
<< 16)
18691 | ((value
& 0x800) >> 11) << 26
18692 | ((value
& 0x700) >> 8) << 12
18695 return patched_inst
;
18698 static inline bfd_vma
18699 create_instruction_vldmia (int base_reg
, int is_dp
, int wback
, int num_words
,
18702 /* A8.8.332 VLDM (A8-922)
18703 VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */
18704 bfd_vma patched_inst
= (is_dp
? 0xec900b00 : 0xec900a00)
18705 | (/*W=*/wback
<< 21)
18707 | (num_words
& 0x000000ff)
18708 | (((unsigned)first_reg
>> 1) & 0x0000000f) << 12
18709 | (first_reg
& 0x00000001) << 22;
18711 return patched_inst
;
18714 static inline bfd_vma
18715 create_instruction_vldmdb (int base_reg
, int is_dp
, int num_words
,
18718 /* A8.8.332 VLDM (A8-922)
18719 VLMD{MODE} Rn!, {} (Encoding T1 or T2). */
18720 bfd_vma patched_inst
= (is_dp
? 0xed300b00 : 0xed300a00)
18722 | (num_words
& 0x000000ff)
18723 | (((unsigned)first_reg
>>1 ) & 0x0000000f) << 12
18724 | (first_reg
& 0x00000001) << 22;
18726 return patched_inst
;
18729 static inline bfd_vma
18730 create_instruction_udf_w (int value
)
18732 /* A8.8.247 UDF (A8-758)
18733 Undefined (Encoding T2). */
18734 bfd_vma patched_inst
= 0xf7f0a000
18735 | (value
& 0x00000fff)
18736 | (value
& 0x000f0000) << 16;
18738 return patched_inst
;
18741 static inline bfd_vma
18742 create_instruction_udf (int value
)
18744 /* A8.8.247 UDF (A8-758)
18745 Undefined (Encoding T1). */
18746 bfd_vma patched_inst
= 0xde00
18749 return patched_inst
;
18752 /* Functions writing an instruction in memory, returning the next
18753 memory position to write to. */
18755 static inline bfd_byte
*
18756 push_thumb2_insn32 (struct elf32_arm_link_hash_table
* htab
,
18757 bfd
* output_bfd
, bfd_byte
*pt
, insn32 insn
)
18759 put_thumb2_insn (htab
, output_bfd
, insn
, pt
);
18763 static inline bfd_byte
*
18764 push_thumb2_insn16 (struct elf32_arm_link_hash_table
* htab
,
18765 bfd
* output_bfd
, bfd_byte
*pt
, insn32 insn
)
18767 put_thumb_insn (htab
, output_bfd
, insn
, pt
);
18771 /* Function filling up a region in memory with T1 and T2 UDFs taking
18772 care of alignment. */
18775 stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table
* htab
,
18777 const bfd_byte
* const base_stub_contents
,
18778 bfd_byte
* const from_stub_contents
,
18779 const bfd_byte
* const end_stub_contents
)
18781 bfd_byte
*current_stub_contents
= from_stub_contents
;
18783 /* Fill the remaining of the stub with deterministic contents : UDF
18785 Check if realignment is needed on modulo 4 frontier using T1, to
18787 if ((current_stub_contents
< end_stub_contents
)
18788 && !((current_stub_contents
- base_stub_contents
) % 2)
18789 && ((current_stub_contents
- base_stub_contents
) % 4))
18790 current_stub_contents
=
18791 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
18792 create_instruction_udf (0));
18794 for (; current_stub_contents
< end_stub_contents
;)
18795 current_stub_contents
=
18796 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18797 create_instruction_udf_w (0));
18799 return current_stub_contents
;
18802 /* Functions writing the stream of instructions equivalent to the
18803 derived sequence for ldmia, ldmdb, vldm respectively. */
18806 stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table
* htab
,
18808 const insn32 initial_insn
,
18809 const bfd_byte
*const initial_insn_addr
,
18810 bfd_byte
*const base_stub_contents
)
18812 int wback
= (initial_insn
& 0x00200000) >> 21;
18813 int ri
, rn
= (initial_insn
& 0x000F0000) >> 16;
18814 int insn_all_registers
= initial_insn
& 0x0000ffff;
18815 int insn_low_registers
, insn_high_registers
;
18816 int usable_register_mask
;
18817 int nb_registers
= elf32_arm_popcount (insn_all_registers
);
18818 int restore_pc
= (insn_all_registers
& (1 << 15)) ? 1 : 0;
18819 int restore_rn
= (insn_all_registers
& (1 << rn
)) ? 1 : 0;
18820 bfd_byte
*current_stub_contents
= base_stub_contents
;
18822 BFD_ASSERT (is_thumb2_ldmia (initial_insn
));
18824 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18825 smaller than 8 registers load sequences that do not cause the
18827 if (nb_registers
<= 8)
18829 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
18830 current_stub_contents
=
18831 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18834 /* B initial_insn_addr+4. */
18836 current_stub_contents
=
18837 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18838 create_instruction_branch_absolute
18839 (initial_insn_addr
- current_stub_contents
));
18841 /* Fill the remaining of the stub with deterministic contents. */
18842 current_stub_contents
=
18843 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
18844 base_stub_contents
, current_stub_contents
,
18845 base_stub_contents
+
18846 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
);
18851 /* - reg_list[13] == 0. */
18852 BFD_ASSERT ((insn_all_registers
& (1 << 13))==0);
18854 /* - reg_list[14] & reg_list[15] != 1. */
18855 BFD_ASSERT ((insn_all_registers
& 0xC000) != 0xC000);
18857 /* - if (wback==1) reg_list[rn] == 0. */
18858 BFD_ASSERT (!wback
|| !restore_rn
);
18860 /* - nb_registers > 8. */
18861 BFD_ASSERT (elf32_arm_popcount (insn_all_registers
) > 8);
18863 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
18865 /* In the following algorithm, we split this wide LDM using 2 LDM insns:
18866 - One with the 7 lowest registers (register mask 0x007F)
18867 This LDM will finally contain between 2 and 7 registers
18868 - One with the 7 highest registers (register mask 0xDF80)
18869 This ldm will finally contain between 2 and 7 registers. */
18870 insn_low_registers
= insn_all_registers
& 0x007F;
18871 insn_high_registers
= insn_all_registers
& 0xDF80;
18873 /* A spare register may be needed during this veneer to temporarily
18874 handle the base register. This register will be restored with the
18875 last LDM operation.
18876 The usable register may be any general purpose register (that
18877 excludes PC, SP, LR : register mask is 0x1FFF). */
18878 usable_register_mask
= 0x1FFF;
18880 /* Generate the stub function. */
18883 /* LDMIA Rn!, {R-low-register-list} : (Encoding T2). */
18884 current_stub_contents
=
18885 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18886 create_instruction_ldmia
18887 (rn
, /*wback=*/1, insn_low_registers
));
18889 /* LDMIA Rn!, {R-high-register-list} : (Encoding T2). */
18890 current_stub_contents
=
18891 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18892 create_instruction_ldmia
18893 (rn
, /*wback=*/1, insn_high_registers
));
18896 /* B initial_insn_addr+4. */
18897 current_stub_contents
=
18898 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18899 create_instruction_branch_absolute
18900 (initial_insn_addr
- current_stub_contents
));
18903 else /* if (!wback). */
18907 /* If Rn is not part of the high-register-list, move it there. */
18908 if (!(insn_high_registers
& (1 << rn
)))
18910 /* Choose a Ri in the high-register-list that will be restored. */
18911 ri
= ctz (insn_high_registers
& usable_register_mask
& ~(1 << rn
));
18914 current_stub_contents
=
18915 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
18916 create_instruction_mov (ri
, rn
));
18919 /* LDMIA Ri!, {R-low-register-list} : (Encoding T2). */
18920 current_stub_contents
=
18921 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18922 create_instruction_ldmia
18923 (ri
, /*wback=*/1, insn_low_registers
));
18925 /* LDMIA Ri, {R-high-register-list} : (Encoding T2). */
18926 current_stub_contents
=
18927 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18928 create_instruction_ldmia
18929 (ri
, /*wback=*/0, insn_high_registers
));
18933 /* B initial_insn_addr+4. */
18934 current_stub_contents
=
18935 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18936 create_instruction_branch_absolute
18937 (initial_insn_addr
- current_stub_contents
));
18941 /* Fill the remaining of the stub with deterministic contents. */
18942 current_stub_contents
=
18943 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
18944 base_stub_contents
, current_stub_contents
,
18945 base_stub_contents
+
18946 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
);
18950 stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table
* htab
,
18952 const insn32 initial_insn
,
18953 const bfd_byte
*const initial_insn_addr
,
18954 bfd_byte
*const base_stub_contents
)
18956 int wback
= (initial_insn
& 0x00200000) >> 21;
18957 int ri
, rn
= (initial_insn
& 0x000f0000) >> 16;
18958 int insn_all_registers
= initial_insn
& 0x0000ffff;
18959 int insn_low_registers
, insn_high_registers
;
18960 int usable_register_mask
;
18961 int restore_pc
= (insn_all_registers
& (1 << 15)) ? 1 : 0;
18962 int restore_rn
= (insn_all_registers
& (1 << rn
)) ? 1 : 0;
18963 int nb_registers
= elf32_arm_popcount (insn_all_registers
);
18964 bfd_byte
*current_stub_contents
= base_stub_contents
;
18966 BFD_ASSERT (is_thumb2_ldmdb (initial_insn
));
18968 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18969 smaller than 8 registers load sequences that do not cause the
18971 if (nb_registers
<= 8)
18973 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
18974 current_stub_contents
=
18975 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18978 /* B initial_insn_addr+4. */
18979 current_stub_contents
=
18980 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18981 create_instruction_branch_absolute
18982 (initial_insn_addr
- current_stub_contents
));
18984 /* Fill the remaining of the stub with deterministic contents. */
18985 current_stub_contents
=
18986 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
18987 base_stub_contents
, current_stub_contents
,
18988 base_stub_contents
+
18989 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
);
18994 /* - reg_list[13] == 0. */
18995 BFD_ASSERT ((insn_all_registers
& (1 << 13)) == 0);
18997 /* - reg_list[14] & reg_list[15] != 1. */
18998 BFD_ASSERT ((insn_all_registers
& 0xC000) != 0xC000);
19000 /* - if (wback==1) reg_list[rn] == 0. */
19001 BFD_ASSERT (!wback
|| !restore_rn
);
19003 /* - nb_registers > 8. */
19004 BFD_ASSERT (elf32_arm_popcount (insn_all_registers
) > 8);
19006 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
19008 /* In the following algorithm, we split this wide LDM using 2 LDM insn:
19009 - One with the 7 lowest registers (register mask 0x007F)
19010 This LDM will finally contain between 2 and 7 registers
19011 - One with the 7 highest registers (register mask 0xDF80)
19012 This ldm will finally contain between 2 and 7 registers. */
19013 insn_low_registers
= insn_all_registers
& 0x007F;
19014 insn_high_registers
= insn_all_registers
& 0xDF80;
19016 /* A spare register may be needed during this veneer to temporarily
19017 handle the base register. This register will be restored with
19018 the last LDM operation.
19019 The usable register may be any general purpose register (that excludes
19020 PC, SP, LR : register mask is 0x1FFF). */
19021 usable_register_mask
= 0x1FFF;
19023 /* Generate the stub function. */
19024 if (!wback
&& !restore_pc
&& !restore_rn
)
19026 /* Choose a Ri in the low-register-list that will be restored. */
19027 ri
= ctz (insn_low_registers
& usable_register_mask
& ~(1 << rn
));
19030 current_stub_contents
=
19031 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
19032 create_instruction_mov (ri
, rn
));
19034 /* LDMDB Ri!, {R-high-register-list}. */
19035 current_stub_contents
=
19036 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19037 create_instruction_ldmdb
19038 (ri
, /*wback=*/1, insn_high_registers
));
19040 /* LDMDB Ri, {R-low-register-list}. */
19041 current_stub_contents
=
19042 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19043 create_instruction_ldmdb
19044 (ri
, /*wback=*/0, insn_low_registers
));
19046 /* B initial_insn_addr+4. */
19047 current_stub_contents
=
19048 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19049 create_instruction_branch_absolute
19050 (initial_insn_addr
- current_stub_contents
));
19052 else if (wback
&& !restore_pc
&& !restore_rn
)
19054 /* LDMDB Rn!, {R-high-register-list}. */
19055 current_stub_contents
=
19056 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19057 create_instruction_ldmdb
19058 (rn
, /*wback=*/1, insn_high_registers
));
19060 /* LDMDB Rn!, {R-low-register-list}. */
19061 current_stub_contents
=
19062 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19063 create_instruction_ldmdb
19064 (rn
, /*wback=*/1, insn_low_registers
));
19066 /* B initial_insn_addr+4. */
19067 current_stub_contents
=
19068 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19069 create_instruction_branch_absolute
19070 (initial_insn_addr
- current_stub_contents
));
19072 else if (!wback
&& restore_pc
&& !restore_rn
)
19074 /* Choose a Ri in the high-register-list that will be restored. */
19075 ri
= ctz (insn_high_registers
& usable_register_mask
& ~(1 << rn
));
19077 /* SUB Ri, Rn, #(4*nb_registers). */
19078 current_stub_contents
=
19079 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19080 create_instruction_sub (ri
, rn
, (4 * nb_registers
)));
19082 /* LDMIA Ri!, {R-low-register-list}. */
19083 current_stub_contents
=
19084 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19085 create_instruction_ldmia
19086 (ri
, /*wback=*/1, insn_low_registers
));
19088 /* LDMIA Ri, {R-high-register-list}. */
19089 current_stub_contents
=
19090 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19091 create_instruction_ldmia
19092 (ri
, /*wback=*/0, insn_high_registers
));
19094 else if (wback
&& restore_pc
&& !restore_rn
)
19096 /* Choose a Ri in the high-register-list that will be restored. */
19097 ri
= ctz (insn_high_registers
& usable_register_mask
& ~(1 << rn
));
19099 /* SUB Rn, Rn, #(4*nb_registers) */
19100 current_stub_contents
=
19101 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19102 create_instruction_sub (rn
, rn
, (4 * nb_registers
)));
19105 current_stub_contents
=
19106 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
19107 create_instruction_mov (ri
, rn
));
19109 /* LDMIA Ri!, {R-low-register-list}. */
19110 current_stub_contents
=
19111 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19112 create_instruction_ldmia
19113 (ri
, /*wback=*/1, insn_low_registers
));
19115 /* LDMIA Ri, {R-high-register-list}. */
19116 current_stub_contents
=
19117 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19118 create_instruction_ldmia
19119 (ri
, /*wback=*/0, insn_high_registers
));
19121 else if (!wback
&& !restore_pc
&& restore_rn
)
19124 if (!(insn_low_registers
& (1 << rn
)))
19126 /* Choose a Ri in the low-register-list that will be restored. */
19127 ri
= ctz (insn_low_registers
& usable_register_mask
& ~(1 << rn
));
19130 current_stub_contents
=
19131 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
19132 create_instruction_mov (ri
, rn
));
19135 /* LDMDB Ri!, {R-high-register-list}. */
19136 current_stub_contents
=
19137 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19138 create_instruction_ldmdb
19139 (ri
, /*wback=*/1, insn_high_registers
));
19141 /* LDMDB Ri, {R-low-register-list}. */
19142 current_stub_contents
=
19143 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19144 create_instruction_ldmdb
19145 (ri
, /*wback=*/0, insn_low_registers
));
19147 /* B initial_insn_addr+4. */
19148 current_stub_contents
=
19149 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19150 create_instruction_branch_absolute
19151 (initial_insn_addr
- current_stub_contents
));
19153 else if (!wback
&& restore_pc
&& restore_rn
)
19156 if (!(insn_high_registers
& (1 << rn
)))
19158 /* Choose a Ri in the high-register-list that will be restored. */
19159 ri
= ctz (insn_high_registers
& usable_register_mask
& ~(1 << rn
));
19162 /* SUB Ri, Rn, #(4*nb_registers). */
19163 current_stub_contents
=
19164 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19165 create_instruction_sub (ri
, rn
, (4 * nb_registers
)));
19167 /* LDMIA Ri!, {R-low-register-list}. */
19168 current_stub_contents
=
19169 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19170 create_instruction_ldmia
19171 (ri
, /*wback=*/1, insn_low_registers
));
19173 /* LDMIA Ri, {R-high-register-list}. */
19174 current_stub_contents
=
19175 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19176 create_instruction_ldmia
19177 (ri
, /*wback=*/0, insn_high_registers
));
19179 else if (wback
&& restore_rn
)
19181 /* The assembler should not have accepted to encode this. */
19182 BFD_ASSERT (0 && "Cannot patch an instruction that has an "
19183 "undefined behavior.\n");
19186 /* Fill the remaining of the stub with deterministic contents. */
19187 current_stub_contents
=
19188 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
19189 base_stub_contents
, current_stub_contents
,
19190 base_stub_contents
+
19191 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
);
19196 stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table
* htab
,
19198 const insn32 initial_insn
,
19199 const bfd_byte
*const initial_insn_addr
,
19200 bfd_byte
*const base_stub_contents
)
19202 int num_words
= ((unsigned int) initial_insn
<< 24) >> 24;
19203 bfd_byte
*current_stub_contents
= base_stub_contents
;
19205 BFD_ASSERT (is_thumb2_vldm (initial_insn
));
19207 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
19208 smaller than 8 words load sequences that do not cause the
19210 if (num_words
<= 8)
19212 /* Untouched instruction. */
19213 current_stub_contents
=
19214 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19217 /* B initial_insn_addr+4. */
19218 current_stub_contents
=
19219 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19220 create_instruction_branch_absolute
19221 (initial_insn_addr
- current_stub_contents
));
19225 bfd_boolean is_dp
= /* DP encoding. */
19226 (initial_insn
& 0xfe100f00) == 0xec100b00;
19227 bfd_boolean is_ia_nobang
= /* (IA without !). */
19228 (((initial_insn
<< 7) >> 28) & 0xd) == 0x4;
19229 bfd_boolean is_ia_bang
= /* (IA with !) - includes VPOP. */
19230 (((initial_insn
<< 7) >> 28) & 0xd) == 0x5;
19231 bfd_boolean is_db_bang
= /* (DB with !). */
19232 (((initial_insn
<< 7) >> 28) & 0xd) == 0x9;
19233 int base_reg
= ((unsigned int) initial_insn
<< 12) >> 28;
19234 /* d = UInt (Vd:D);. */
19235 int first_reg
= ((((unsigned int) initial_insn
<< 16) >> 28) << 1)
19236 | (((unsigned int)initial_insn
<< 9) >> 31);
19238 /* Compute the number of 8-words chunks needed to split. */
19239 int chunks
= (num_words
% 8) ? (num_words
/ 8 + 1) : (num_words
/ 8);
19242 /* The test coverage has been done assuming the following
19243 hypothesis that exactly one of the previous is_ predicates is
19245 BFD_ASSERT ( (is_ia_nobang
^ is_ia_bang
^ is_db_bang
)
19246 && !(is_ia_nobang
& is_ia_bang
& is_db_bang
));
19248 /* We treat the cutting of the words in one pass for all
19249 cases, then we emit the adjustments:
19252 -> vldm rx!, {8_words_or_less} for each needed 8_word
19253 -> sub rx, rx, #size (list)
19256 -> vldm rx!, {8_words_or_less} for each needed 8_word
19257 This also handles vpop instruction (when rx is sp)
19260 -> vldmb rx!, {8_words_or_less} for each needed 8_word. */
19261 for (chunk
= 0; chunk
< chunks
; ++chunk
)
19263 bfd_vma new_insn
= 0;
19265 if (is_ia_nobang
|| is_ia_bang
)
19267 new_insn
= create_instruction_vldmia
19271 chunks
- (chunk
+ 1) ?
19272 8 : num_words
- chunk
* 8,
19273 first_reg
+ chunk
* 8);
19275 else if (is_db_bang
)
19277 new_insn
= create_instruction_vldmdb
19280 chunks
- (chunk
+ 1) ?
19281 8 : num_words
- chunk
* 8,
19282 first_reg
+ chunk
* 8);
19286 current_stub_contents
=
19287 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19291 /* Only this case requires the base register compensation
19295 current_stub_contents
=
19296 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19297 create_instruction_sub
19298 (base_reg
, base_reg
, 4*num_words
));
19301 /* B initial_insn_addr+4. */
19302 current_stub_contents
=
19303 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
19304 create_instruction_branch_absolute
19305 (initial_insn_addr
- current_stub_contents
));
19308 /* Fill the remaining of the stub with deterministic contents. */
19309 current_stub_contents
=
19310 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
19311 base_stub_contents
, current_stub_contents
,
19312 base_stub_contents
+
19313 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE
);
19317 stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table
* htab
,
19319 const insn32 wrong_insn
,
19320 const bfd_byte
*const wrong_insn_addr
,
19321 bfd_byte
*const stub_contents
)
19323 if (is_thumb2_ldmia (wrong_insn
))
19324 stm32l4xx_create_replacing_stub_ldmia (htab
, output_bfd
,
19325 wrong_insn
, wrong_insn_addr
,
19327 else if (is_thumb2_ldmdb (wrong_insn
))
19328 stm32l4xx_create_replacing_stub_ldmdb (htab
, output_bfd
,
19329 wrong_insn
, wrong_insn_addr
,
19331 else if (is_thumb2_vldm (wrong_insn
))
19332 stm32l4xx_create_replacing_stub_vldm (htab
, output_bfd
,
19333 wrong_insn
, wrong_insn_addr
,
19337 /* End of stm32l4xx work-around. */
19340 /* Do code byteswapping. Return FALSE afterwards so that the section is
19341 written out as normal. */
19344 elf32_arm_write_section (bfd
*output_bfd
,
19345 struct bfd_link_info
*link_info
,
19347 bfd_byte
*contents
)
19349 unsigned int mapcount
, errcount
;
19350 _arm_elf_section_data
*arm_data
;
19351 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
19352 elf32_arm_section_map
*map
;
19353 elf32_vfp11_erratum_list
*errnode
;
19354 elf32_stm32l4xx_erratum_list
*stm32l4xx_errnode
;
19357 bfd_vma offset
= sec
->output_section
->vma
+ sec
->output_offset
;
19361 if (globals
== NULL
)
19364 /* If this section has not been allocated an _arm_elf_section_data
19365 structure then we cannot record anything. */
19366 arm_data
= get_arm_elf_section_data (sec
);
19367 if (arm_data
== NULL
)
19370 mapcount
= arm_data
->mapcount
;
19371 map
= arm_data
->map
;
19372 errcount
= arm_data
->erratumcount
;
19376 unsigned int endianflip
= bfd_big_endian (output_bfd
) ? 3 : 0;
19378 for (errnode
= arm_data
->erratumlist
; errnode
!= 0;
19379 errnode
= errnode
->next
)
19381 bfd_vma target
= errnode
->vma
- offset
;
19383 switch (errnode
->type
)
19385 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER
:
19387 bfd_vma branch_to_veneer
;
19388 /* Original condition code of instruction, plus bit mask for
19389 ARM B instruction. */
19390 unsigned int insn
= (errnode
->u
.b
.vfp_insn
& 0xf0000000)
19393 /* The instruction is before the label. */
19396 /* Above offset included in -4 below. */
19397 branch_to_veneer
= errnode
->u
.b
.veneer
->vma
19398 - errnode
->vma
- 4;
19400 if ((signed) branch_to_veneer
< -(1 << 25)
19401 || (signed) branch_to_veneer
>= (1 << 25))
19402 _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
19403 "range"), output_bfd
);
19405 insn
|= (branch_to_veneer
>> 2) & 0xffffff;
19406 contents
[endianflip
^ target
] = insn
& 0xff;
19407 contents
[endianflip
^ (target
+ 1)] = (insn
>> 8) & 0xff;
19408 contents
[endianflip
^ (target
+ 2)] = (insn
>> 16) & 0xff;
19409 contents
[endianflip
^ (target
+ 3)] = (insn
>> 24) & 0xff;
19413 case VFP11_ERRATUM_ARM_VENEER
:
19415 bfd_vma branch_from_veneer
;
19418 /* Take size of veneer into account. */
19419 branch_from_veneer
= errnode
->u
.v
.branch
->vma
19420 - errnode
->vma
- 12;
19422 if ((signed) branch_from_veneer
< -(1 << 25)
19423 || (signed) branch_from_veneer
>= (1 << 25))
19424 _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
19425 "range"), output_bfd
);
19427 /* Original instruction. */
19428 insn
= errnode
->u
.v
.branch
->u
.b
.vfp_insn
;
19429 contents
[endianflip
^ target
] = insn
& 0xff;
19430 contents
[endianflip
^ (target
+ 1)] = (insn
>> 8) & 0xff;
19431 contents
[endianflip
^ (target
+ 2)] = (insn
>> 16) & 0xff;
19432 contents
[endianflip
^ (target
+ 3)] = (insn
>> 24) & 0xff;
19434 /* Branch back to insn after original insn. */
19435 insn
= 0xea000000 | ((branch_from_veneer
>> 2) & 0xffffff);
19436 contents
[endianflip
^ (target
+ 4)] = insn
& 0xff;
19437 contents
[endianflip
^ (target
+ 5)] = (insn
>> 8) & 0xff;
19438 contents
[endianflip
^ (target
+ 6)] = (insn
>> 16) & 0xff;
19439 contents
[endianflip
^ (target
+ 7)] = (insn
>> 24) & 0xff;
19449 if (arm_data
->stm32l4xx_erratumcount
!= 0)
19451 for (stm32l4xx_errnode
= arm_data
->stm32l4xx_erratumlist
;
19452 stm32l4xx_errnode
!= 0;
19453 stm32l4xx_errnode
= stm32l4xx_errnode
->next
)
19455 bfd_vma target
= stm32l4xx_errnode
->vma
- offset
;
19457 switch (stm32l4xx_errnode
->type
)
19459 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER
:
19462 bfd_vma branch_to_veneer
=
19463 stm32l4xx_errnode
->u
.b
.veneer
->vma
- stm32l4xx_errnode
->vma
;
19465 if ((signed) branch_to_veneer
< -(1 << 24)
19466 || (signed) branch_to_veneer
>= (1 << 24))
19468 bfd_vma out_of_range
=
19469 ((signed) branch_to_veneer
< -(1 << 24)) ?
19470 - branch_to_veneer
- (1 << 24) :
19471 ((signed) branch_to_veneer
>= (1 << 24)) ?
19472 branch_to_veneer
- (1 << 24) : 0;
19475 (_("%pB(%#" PRIx64
"): error: "
19476 "cannot create STM32L4XX veneer; "
19477 "jump out of range by %" PRId64
" bytes; "
19478 "cannot encode branch instruction"),
19480 (uint64_t) (stm32l4xx_errnode
->vma
- 4),
19481 (int64_t) out_of_range
);
19485 insn
= create_instruction_branch_absolute
19486 (stm32l4xx_errnode
->u
.b
.veneer
->vma
- stm32l4xx_errnode
->vma
);
19488 /* The instruction is before the label. */
19491 put_thumb2_insn (globals
, output_bfd
,
19492 (bfd_vma
) insn
, contents
+ target
);
19496 case STM32L4XX_ERRATUM_VENEER
:
19499 bfd_byte
* veneer_r
;
19502 veneer
= contents
+ target
;
19504 + stm32l4xx_errnode
->u
.b
.veneer
->vma
19505 - stm32l4xx_errnode
->vma
- 4;
19507 if ((signed) (veneer_r
- veneer
-
19508 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE
>
19509 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
?
19510 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE
:
19511 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
) < -(1 << 24)
19512 || (signed) (veneer_r
- veneer
) >= (1 << 24))
19514 _bfd_error_handler (_("%pB: error: cannot create STM32L4XX "
19515 "veneer"), output_bfd
);
19519 /* Original instruction. */
19520 insn
= stm32l4xx_errnode
->u
.v
.branch
->u
.b
.insn
;
19522 stm32l4xx_create_replacing_stub
19523 (globals
, output_bfd
, insn
, (void*)veneer_r
, (void*)veneer
);
19533 if (arm_data
->elf
.this_hdr
.sh_type
== SHT_ARM_EXIDX
)
19535 arm_unwind_table_edit
*edit_node
19536 = arm_data
->u
.exidx
.unwind_edit_list
;
19537 /* Now, sec->size is the size of the section we will write. The original
19538 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
19539 markers) was sec->rawsize. (This isn't the case if we perform no
19540 edits, then rawsize will be zero and we should use size). */
19541 bfd_byte
*edited_contents
= (bfd_byte
*) bfd_malloc (sec
->size
);
19542 unsigned int input_size
= sec
->rawsize
? sec
->rawsize
: sec
->size
;
19543 unsigned int in_index
, out_index
;
19544 bfd_vma add_to_offsets
= 0;
19546 for (in_index
= 0, out_index
= 0; in_index
* 8 < input_size
|| edit_node
;)
19550 unsigned int edit_index
= edit_node
->index
;
19552 if (in_index
< edit_index
&& in_index
* 8 < input_size
)
19554 copy_exidx_entry (output_bfd
, edited_contents
+ out_index
* 8,
19555 contents
+ in_index
* 8, add_to_offsets
);
19559 else if (in_index
== edit_index
19560 || (in_index
* 8 >= input_size
19561 && edit_index
== UINT_MAX
))
19563 switch (edit_node
->type
)
19565 case DELETE_EXIDX_ENTRY
:
19567 add_to_offsets
+= 8;
19570 case INSERT_EXIDX_CANTUNWIND_AT_END
:
19572 asection
*text_sec
= edit_node
->linked_section
;
19573 bfd_vma text_offset
= text_sec
->output_section
->vma
19574 + text_sec
->output_offset
19576 bfd_vma exidx_offset
= offset
+ out_index
* 8;
19577 unsigned long prel31_offset
;
19579 /* Note: this is meant to be equivalent to an
19580 R_ARM_PREL31 relocation. These synthetic
19581 EXIDX_CANTUNWIND markers are not relocated by the
19582 usual BFD method. */
19583 prel31_offset
= (text_offset
- exidx_offset
)
19585 if (bfd_link_relocatable (link_info
))
19587 /* Here relocation for new EXIDX_CANTUNWIND is
19588 created, so there is no need to
19589 adjust offset by hand. */
19590 prel31_offset
= text_sec
->output_offset
19594 /* First address we can't unwind. */
19595 bfd_put_32 (output_bfd
, prel31_offset
,
19596 &edited_contents
[out_index
* 8]);
19598 /* Code for EXIDX_CANTUNWIND. */
19599 bfd_put_32 (output_bfd
, 0x1,
19600 &edited_contents
[out_index
* 8 + 4]);
19603 add_to_offsets
-= 8;
19608 edit_node
= edit_node
->next
;
19613 /* No more edits, copy remaining entries verbatim. */
19614 copy_exidx_entry (output_bfd
, edited_contents
+ out_index
* 8,
19615 contents
+ in_index
* 8, add_to_offsets
);
19621 if (!(sec
->flags
& SEC_EXCLUDE
) && !(sec
->flags
& SEC_NEVER_LOAD
))
19622 bfd_set_section_contents (output_bfd
, sec
->output_section
,
19624 (file_ptr
) sec
->output_offset
, sec
->size
);
19629 /* Fix code to point to Cortex-A8 erratum stubs. */
19630 if (globals
->fix_cortex_a8
)
19632 struct a8_branch_to_stub_data data
;
19634 data
.writing_section
= sec
;
19635 data
.contents
= contents
;
19637 bfd_hash_traverse (& globals
->stub_hash_table
, make_branch_to_a8_stub
,
19644 if (globals
->byteswap_code
)
19646 qsort (map
, mapcount
, sizeof (* map
), elf32_arm_compare_mapping
);
19649 for (i
= 0; i
< mapcount
; i
++)
19651 if (i
== mapcount
- 1)
19654 end
= map
[i
+ 1].vma
;
19656 switch (map
[i
].type
)
19659 /* Byte swap code words. */
19660 while (ptr
+ 3 < end
)
19662 tmp
= contents
[ptr
];
19663 contents
[ptr
] = contents
[ptr
+ 3];
19664 contents
[ptr
+ 3] = tmp
;
19665 tmp
= contents
[ptr
+ 1];
19666 contents
[ptr
+ 1] = contents
[ptr
+ 2];
19667 contents
[ptr
+ 2] = tmp
;
19673 /* Byte swap code halfwords. */
19674 while (ptr
+ 1 < end
)
19676 tmp
= contents
[ptr
];
19677 contents
[ptr
] = contents
[ptr
+ 1];
19678 contents
[ptr
+ 1] = tmp
;
19684 /* Leave data alone. */
19692 arm_data
->mapcount
= -1;
19693 arm_data
->mapsize
= 0;
19694 arm_data
->map
= NULL
;
19699 /* Mangle thumb function symbols as we read them in. */
19702 elf32_arm_swap_symbol_in (bfd
* abfd
,
19705 Elf_Internal_Sym
*dst
)
19707 Elf_Internal_Shdr
*symtab_hdr
;
19708 const char *name
= NULL
;
19710 if (!bfd_elf32_swap_symbol_in (abfd
, psrc
, pshn
, dst
))
19712 dst
->st_target_internal
= 0;
19714 /* New EABI objects mark thumb function symbols by setting the low bit of
19716 if (ELF_ST_TYPE (dst
->st_info
) == STT_FUNC
19717 || ELF_ST_TYPE (dst
->st_info
) == STT_GNU_IFUNC
)
19719 if (dst
->st_value
& 1)
19721 dst
->st_value
&= ~(bfd_vma
) 1;
19722 ARM_SET_SYM_BRANCH_TYPE (dst
->st_target_internal
,
19723 ST_BRANCH_TO_THUMB
);
19726 ARM_SET_SYM_BRANCH_TYPE (dst
->st_target_internal
, ST_BRANCH_TO_ARM
);
19728 else if (ELF_ST_TYPE (dst
->st_info
) == STT_ARM_TFUNC
)
19730 dst
->st_info
= ELF_ST_INFO (ELF_ST_BIND (dst
->st_info
), STT_FUNC
);
19731 ARM_SET_SYM_BRANCH_TYPE (dst
->st_target_internal
, ST_BRANCH_TO_THUMB
);
19733 else if (ELF_ST_TYPE (dst
->st_info
) == STT_SECTION
)
19734 ARM_SET_SYM_BRANCH_TYPE (dst
->st_target_internal
, ST_BRANCH_LONG
);
19736 ARM_SET_SYM_BRANCH_TYPE (dst
->st_target_internal
, ST_BRANCH_UNKNOWN
);
19738 /* Mark CMSE special symbols. */
19739 symtab_hdr
= & elf_symtab_hdr (abfd
);
19740 if (symtab_hdr
->sh_size
)
19741 name
= bfd_elf_sym_name (abfd
, symtab_hdr
, dst
, NULL
);
19742 if (name
&& CONST_STRNEQ (name
, CMSE_PREFIX
))
19743 ARM_SET_SYM_CMSE_SPCL (dst
->st_target_internal
);
19749 /* Mangle thumb function symbols as we write them out. */
19752 elf32_arm_swap_symbol_out (bfd
*abfd
,
19753 const Elf_Internal_Sym
*src
,
19757 Elf_Internal_Sym newsym
;
19759 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
19760 of the address set, as per the new EABI. We do this unconditionally
19761 because objcopy does not set the elf header flags until after
19762 it writes out the symbol table. */
19763 if (ARM_GET_SYM_BRANCH_TYPE (src
->st_target_internal
) == ST_BRANCH_TO_THUMB
)
19766 if (ELF_ST_TYPE (src
->st_info
) != STT_GNU_IFUNC
)
19767 newsym
.st_info
= ELF_ST_INFO (ELF_ST_BIND (src
->st_info
), STT_FUNC
);
19768 if (newsym
.st_shndx
!= SHN_UNDEF
)
19770 /* Do this only for defined symbols. At link type, the static
19771 linker will simulate the work of dynamic linker of resolving
19772 symbols and will carry over the thumbness of found symbols to
19773 the output symbol table. It's not clear how it happens, but
19774 the thumbness of undefined symbols can well be different at
19775 runtime, and writing '1' for them will be confusing for users
19776 and possibly for dynamic linker itself.
19778 newsym
.st_value
|= 1;
19783 bfd_elf32_swap_symbol_out (abfd
, src
, cdst
, shndx
);
19786 /* Add the PT_ARM_EXIDX program header. */
19789 elf32_arm_modify_segment_map (bfd
*abfd
,
19790 struct bfd_link_info
*info ATTRIBUTE_UNUSED
)
19792 struct elf_segment_map
*m
;
19795 sec
= bfd_get_section_by_name (abfd
, ".ARM.exidx");
19796 if (sec
!= NULL
&& (sec
->flags
& SEC_LOAD
) != 0)
19798 /* If there is already a PT_ARM_EXIDX header, then we do not
19799 want to add another one. This situation arises when running
19800 "strip"; the input binary already has the header. */
19801 m
= elf_seg_map (abfd
);
19802 while (m
&& m
->p_type
!= PT_ARM_EXIDX
)
19806 m
= (struct elf_segment_map
*)
19807 bfd_zalloc (abfd
, sizeof (struct elf_segment_map
));
19810 m
->p_type
= PT_ARM_EXIDX
;
19812 m
->sections
[0] = sec
;
19814 m
->next
= elf_seg_map (abfd
);
19815 elf_seg_map (abfd
) = m
;
19822 /* We may add a PT_ARM_EXIDX program header. */
19825 elf32_arm_additional_program_headers (bfd
*abfd
,
19826 struct bfd_link_info
*info ATTRIBUTE_UNUSED
)
19830 sec
= bfd_get_section_by_name (abfd
, ".ARM.exidx");
19831 if (sec
!= NULL
&& (sec
->flags
& SEC_LOAD
) != 0)
19837 /* Hook called by the linker routine which adds symbols from an object
19841 elf32_arm_add_symbol_hook (bfd
*abfd
, struct bfd_link_info
*info
,
19842 Elf_Internal_Sym
*sym
, const char **namep
,
19843 flagword
*flagsp
, asection
**secp
, bfd_vma
*valp
)
19845 if (elf32_arm_hash_table (info
) == NULL
)
19848 if (elf32_arm_hash_table (info
)->vxworks_p
19849 && !elf_vxworks_add_symbol_hook (abfd
, info
, sym
, namep
,
19850 flagsp
, secp
, valp
))
19856 /* We use this to override swap_symbol_in and swap_symbol_out. */
19857 const struct elf_size_info elf32_arm_size_info
=
19859 sizeof (Elf32_External_Ehdr
),
19860 sizeof (Elf32_External_Phdr
),
19861 sizeof (Elf32_External_Shdr
),
19862 sizeof (Elf32_External_Rel
),
19863 sizeof (Elf32_External_Rela
),
19864 sizeof (Elf32_External_Sym
),
19865 sizeof (Elf32_External_Dyn
),
19866 sizeof (Elf_External_Note
),
19870 ELFCLASS32
, EV_CURRENT
,
19871 bfd_elf32_write_out_phdrs
,
19872 bfd_elf32_write_shdrs_and_ehdr
,
19873 bfd_elf32_checksum_contents
,
19874 bfd_elf32_write_relocs
,
19875 elf32_arm_swap_symbol_in
,
19876 elf32_arm_swap_symbol_out
,
19877 bfd_elf32_slurp_reloc_table
,
19878 bfd_elf32_slurp_symbol_table
,
19879 bfd_elf32_swap_dyn_in
,
19880 bfd_elf32_swap_dyn_out
,
19881 bfd_elf32_swap_reloc_in
,
19882 bfd_elf32_swap_reloc_out
,
19883 bfd_elf32_swap_reloca_in
,
19884 bfd_elf32_swap_reloca_out
19888 read_code32 (const bfd
*abfd
, const bfd_byte
*addr
)
19890 /* V7 BE8 code is always little endian. */
19891 if ((elf_elfheader (abfd
)->e_flags
& EF_ARM_BE8
) != 0)
19892 return bfd_getl32 (addr
);
19894 return bfd_get_32 (abfd
, addr
);
19898 read_code16 (const bfd
*abfd
, const bfd_byte
*addr
)
19900 /* V7 BE8 code is always little endian. */
19901 if ((elf_elfheader (abfd
)->e_flags
& EF_ARM_BE8
) != 0)
19902 return bfd_getl16 (addr
);
19904 return bfd_get_16 (abfd
, addr
);
19907 /* Return size of plt0 entry starting at ADDR
19908 or (bfd_vma) -1 if size can not be determined. */
19911 elf32_arm_plt0_size (const bfd
*abfd
, const bfd_byte
*addr
)
19913 bfd_vma first_word
;
19916 first_word
= read_code32 (abfd
, addr
);
19918 if (first_word
== elf32_arm_plt0_entry
[0])
19919 plt0_size
= 4 * ARRAY_SIZE (elf32_arm_plt0_entry
);
19920 else if (first_word
== elf32_thumb2_plt0_entry
[0])
19921 plt0_size
= 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry
);
19923 /* We don't yet handle this PLT format. */
19924 return (bfd_vma
) -1;
19929 /* Return size of plt entry starting at offset OFFSET
19930 of plt section located at address START
19931 or (bfd_vma) -1 if size can not be determined. */
19934 elf32_arm_plt_size (const bfd
*abfd
, const bfd_byte
*start
, bfd_vma offset
)
19936 bfd_vma first_insn
;
19937 bfd_vma plt_size
= 0;
19938 const bfd_byte
*addr
= start
+ offset
;
19940 /* PLT entry size if fixed on Thumb-only platforms. */
19941 if (read_code32 (abfd
, start
) == elf32_thumb2_plt0_entry
[0])
19942 return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry
);
19944 /* Respect Thumb stub if necessary. */
19945 if (read_code16 (abfd
, addr
) == elf32_arm_plt_thumb_stub
[0])
19947 plt_size
+= 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub
);
19950 /* Strip immediate from first add. */
19951 first_insn
= read_code32 (abfd
, addr
+ plt_size
) & 0xffffff00;
19953 #ifdef FOUR_WORD_PLT
19954 if (first_insn
== elf32_arm_plt_entry
[0])
19955 plt_size
+= 4 * ARRAY_SIZE (elf32_arm_plt_entry
);
19957 if (first_insn
== elf32_arm_plt_entry_long
[0])
19958 plt_size
+= 4 * ARRAY_SIZE (elf32_arm_plt_entry_long
);
19959 else if (first_insn
== elf32_arm_plt_entry_short
[0])
19960 plt_size
+= 4 * ARRAY_SIZE (elf32_arm_plt_entry_short
);
19963 /* We don't yet handle this PLT format. */
19964 return (bfd_vma
) -1;
19969 /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */
19972 elf32_arm_get_synthetic_symtab (bfd
*abfd
,
19973 long symcount ATTRIBUTE_UNUSED
,
19974 asymbol
**syms ATTRIBUTE_UNUSED
,
19984 Elf_Internal_Shdr
*hdr
;
19992 if ((abfd
->flags
& (DYNAMIC
| EXEC_P
)) == 0)
19995 if (dynsymcount
<= 0)
19998 relplt
= bfd_get_section_by_name (abfd
, ".rel.plt");
19999 if (relplt
== NULL
)
20002 hdr
= &elf_section_data (relplt
)->this_hdr
;
20003 if (hdr
->sh_link
!= elf_dynsymtab (abfd
)
20004 || (hdr
->sh_type
!= SHT_REL
&& hdr
->sh_type
!= SHT_RELA
))
20007 plt
= bfd_get_section_by_name (abfd
, ".plt");
20011 if (!elf32_arm_size_info
.slurp_reloc_table (abfd
, relplt
, dynsyms
, TRUE
))
20014 data
= plt
->contents
;
20017 if (!bfd_get_full_section_contents(abfd
, (asection
*) plt
, &data
) || data
== NULL
)
20019 bfd_cache_section_contents((asection
*) plt
, data
);
20022 count
= relplt
->size
/ hdr
->sh_entsize
;
20023 size
= count
* sizeof (asymbol
);
20024 p
= relplt
->relocation
;
20025 for (i
= 0; i
< count
; i
++, p
+= elf32_arm_size_info
.int_rels_per_ext_rel
)
20027 size
+= strlen ((*p
->sym_ptr_ptr
)->name
) + sizeof ("@plt");
20028 if (p
->addend
!= 0)
20029 size
+= sizeof ("+0x") - 1 + 8;
20032 s
= *ret
= (asymbol
*) bfd_malloc (size
);
20036 offset
= elf32_arm_plt0_size (abfd
, data
);
20037 if (offset
== (bfd_vma
) -1)
20040 names
= (char *) (s
+ count
);
20041 p
= relplt
->relocation
;
20043 for (i
= 0; i
< count
; i
++, p
+= elf32_arm_size_info
.int_rels_per_ext_rel
)
20047 bfd_vma plt_size
= elf32_arm_plt_size (abfd
, data
, offset
);
20048 if (plt_size
== (bfd_vma
) -1)
20051 *s
= **p
->sym_ptr_ptr
;
20052 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
20053 we are defining a symbol, ensure one of them is set. */
20054 if ((s
->flags
& BSF_LOCAL
) == 0)
20055 s
->flags
|= BSF_GLOBAL
;
20056 s
->flags
|= BSF_SYNTHETIC
;
20061 len
= strlen ((*p
->sym_ptr_ptr
)->name
);
20062 memcpy (names
, (*p
->sym_ptr_ptr
)->name
, len
);
20064 if (p
->addend
!= 0)
20068 memcpy (names
, "+0x", sizeof ("+0x") - 1);
20069 names
+= sizeof ("+0x") - 1;
20070 bfd_sprintf_vma (abfd
, buf
, p
->addend
);
20071 for (a
= buf
; *a
== '0'; ++a
)
20074 memcpy (names
, a
, len
);
20077 memcpy (names
, "@plt", sizeof ("@plt"));
20078 names
+= sizeof ("@plt");
20080 offset
+= plt_size
;
20087 elf32_arm_section_flags (flagword
*flags
, const Elf_Internal_Shdr
* hdr
)
20089 if (hdr
->sh_flags
& SHF_ARM_PURECODE
)
20090 *flags
|= SEC_ELF_PURECODE
;
20095 elf32_arm_lookup_section_flags (char *flag_name
)
20097 if (!strcmp (flag_name
, "SHF_ARM_PURECODE"))
20098 return SHF_ARM_PURECODE
;
20100 return SEC_NO_FLAGS
;
20103 static unsigned int
20104 elf32_arm_count_additional_relocs (asection
*sec
)
20106 struct _arm_elf_section_data
*arm_data
;
20107 arm_data
= get_arm_elf_section_data (sec
);
20109 return arm_data
== NULL
? 0 : arm_data
->additional_reloc_count
;
20112 /* Called to set the sh_flags, sh_link and sh_info fields of OSECTION which
20113 has a type >= SHT_LOOS. Returns TRUE if these fields were initialised
20114 FALSE otherwise. ISECTION is the best guess matching section from the
20115 input bfd IBFD, but it might be NULL. */
20118 elf32_arm_copy_special_section_fields (const bfd
*ibfd ATTRIBUTE_UNUSED
,
20119 bfd
*obfd ATTRIBUTE_UNUSED
,
20120 const Elf_Internal_Shdr
*isection ATTRIBUTE_UNUSED
,
20121 Elf_Internal_Shdr
*osection
)
20123 switch (osection
->sh_type
)
20125 case SHT_ARM_EXIDX
:
20127 Elf_Internal_Shdr
**oheaders
= elf_elfsections (obfd
);
20128 Elf_Internal_Shdr
**iheaders
= elf_elfsections (ibfd
);
20131 osection
->sh_flags
= SHF_ALLOC
| SHF_LINK_ORDER
;
20132 osection
->sh_info
= 0;
20134 /* The sh_link field must be set to the text section associated with
20135 this index section. Unfortunately the ARM EHABI does not specify
20136 exactly how to determine this association. Our caller does try
20137 to match up OSECTION with its corresponding input section however
20138 so that is a good first guess. */
20139 if (isection
!= NULL
20140 && osection
->bfd_section
!= NULL
20141 && isection
->bfd_section
!= NULL
20142 && isection
->bfd_section
->output_section
!= NULL
20143 && isection
->bfd_section
->output_section
== osection
->bfd_section
20144 && iheaders
!= NULL
20145 && isection
->sh_link
> 0
20146 && isection
->sh_link
< elf_numsections (ibfd
)
20147 && iheaders
[isection
->sh_link
]->bfd_section
!= NULL
20148 && iheaders
[isection
->sh_link
]->bfd_section
->output_section
!= NULL
20151 for (i
= elf_numsections (obfd
); i
-- > 0;)
20152 if (oheaders
[i
]->bfd_section
20153 == iheaders
[isection
->sh_link
]->bfd_section
->output_section
)
20159 /* Failing that we have to find a matching section ourselves. If
20160 we had the output section name available we could compare that
20161 with input section names. Unfortunately we don't. So instead
20162 we use a simple heuristic and look for the nearest executable
20163 section before this one. */
20164 for (i
= elf_numsections (obfd
); i
-- > 0;)
20165 if (oheaders
[i
] == osection
)
20171 if (oheaders
[i
]->sh_type
== SHT_PROGBITS
20172 && (oheaders
[i
]->sh_flags
& (SHF_ALLOC
| SHF_EXECINSTR
))
20173 == (SHF_ALLOC
| SHF_EXECINSTR
))
20179 osection
->sh_link
= i
;
20180 /* If the text section was part of a group
20181 then the index section should be too. */
20182 if (oheaders
[i
]->sh_flags
& SHF_GROUP
)
20183 osection
->sh_flags
|= SHF_GROUP
;
20189 case SHT_ARM_PREEMPTMAP
:
20190 osection
->sh_flags
= SHF_ALLOC
;
20193 case SHT_ARM_ATTRIBUTES
:
20194 case SHT_ARM_DEBUGOVERLAY
:
20195 case SHT_ARM_OVERLAYSECTION
:
20203 /* Returns TRUE if NAME is an ARM mapping symbol.
20204 Traditionally the symbols $a, $d and $t have been used.
20205 The ARM ELF standard also defines $x (for A64 code). It also allows a
20206 period initiated suffix to be added to the symbol: "$[adtx]\.[:sym_char]+".
20207 Other tools might also produce $b (Thumb BL), $f, $p, $m and $v, but we do
20208 not support them here. $t.x indicates the start of ThumbEE instructions. */
20211 is_arm_mapping_symbol (const char * name
)
20213 return name
!= NULL
/* Paranoia. */
20214 && name
[0] == '$' /* Note: if objcopy --prefix-symbols has been used then
20215 the mapping symbols could have acquired a prefix.
20216 We do not support this here, since such symbols no
20217 longer conform to the ARM ELF ABI. */
20218 && (name
[1] == 'a' || name
[1] == 'd' || name
[1] == 't' || name
[1] == 'x')
20219 && (name
[2] == 0 || name
[2] == '.');
20220 /* FIXME: Strictly speaking the symbol is only a valid mapping symbol if
20221 any characters that follow the period are legal characters for the body
20222 of a symbol's name. For now we just assume that this is the case. */
20225 /* Make sure that mapping symbols in object files are not removed via the
20226 "strip --strip-unneeded" tool. These symbols are needed in order to
20227 correctly generate interworking veneers, and for byte swapping code
20228 regions. Once an object file has been linked, it is safe to remove the
20229 symbols as they will no longer be needed. */
20232 elf32_arm_backend_symbol_processing (bfd
*abfd
, asymbol
*sym
)
20234 if (((abfd
->flags
& (EXEC_P
| DYNAMIC
)) == 0)
20235 && sym
->section
!= bfd_abs_section_ptr
20236 && is_arm_mapping_symbol (sym
->name
))
20237 sym
->flags
|= BSF_KEEP
;
20240 #undef elf_backend_copy_special_section_fields
20241 #define elf_backend_copy_special_section_fields elf32_arm_copy_special_section_fields
20243 #define ELF_ARCH bfd_arch_arm
20244 #define ELF_TARGET_ID ARM_ELF_DATA
20245 #define ELF_MACHINE_CODE EM_ARM
20246 #ifdef __QNXTARGET__
20247 #define ELF_MAXPAGESIZE 0x1000
20249 #define ELF_MAXPAGESIZE 0x10000
20251 #define ELF_MINPAGESIZE 0x1000
20252 #define ELF_COMMONPAGESIZE 0x1000
20254 #define bfd_elf32_mkobject elf32_arm_mkobject
20256 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
20257 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
20258 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
20259 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
20260 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
20261 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
20262 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
20263 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
20264 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
20265 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
20266 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
20267 #define bfd_elf32_bfd_final_link elf32_arm_final_link
20268 #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab
20270 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
20271 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
20272 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
20273 #define elf_backend_check_relocs elf32_arm_check_relocs
20274 #define elf_backend_update_relocs elf32_arm_update_relocs
20275 #define elf_backend_relocate_section elf32_arm_relocate_section
20276 #define elf_backend_write_section elf32_arm_write_section
20277 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
20278 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
20279 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
20280 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
20281 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
20282 #define elf_backend_always_size_sections elf32_arm_always_size_sections
20283 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
20284 #define elf_backend_post_process_headers elf32_arm_post_process_headers
20285 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
20286 #define elf_backend_object_p elf32_arm_object_p
20287 #define elf_backend_fake_sections elf32_arm_fake_sections
20288 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
20289 #define elf_backend_final_write_processing elf32_arm_final_write_processing
20290 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
20291 #define elf_backend_size_info elf32_arm_size_info
20292 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
20293 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
20294 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
20295 #define elf_backend_filter_implib_symbols elf32_arm_filter_implib_symbols
20296 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
20297 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
20298 #define elf_backend_count_additional_relocs elf32_arm_count_additional_relocs
20299 #define elf_backend_symbol_processing elf32_arm_backend_symbol_processing
20301 #define elf_backend_can_refcount 1
20302 #define elf_backend_can_gc_sections 1
20303 #define elf_backend_plt_readonly 1
20304 #define elf_backend_want_got_plt 1
20305 #define elf_backend_want_plt_sym 0
20306 #define elf_backend_want_dynrelro 1
20307 #define elf_backend_may_use_rel_p 1
20308 #define elf_backend_may_use_rela_p 0
20309 #define elf_backend_default_use_rela_p 0
20310 #define elf_backend_dtrel_excludes_plt 1
20312 #define elf_backend_got_header_size 12
20313 #define elf_backend_extern_protected_data 1
20315 #undef elf_backend_obj_attrs_vendor
20316 #define elf_backend_obj_attrs_vendor "aeabi"
20317 #undef elf_backend_obj_attrs_section
20318 #define elf_backend_obj_attrs_section ".ARM.attributes"
20319 #undef elf_backend_obj_attrs_arg_type
20320 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
20321 #undef elf_backend_obj_attrs_section_type
20322 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
20323 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
20324 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
20326 #undef elf_backend_section_flags
20327 #define elf_backend_section_flags elf32_arm_section_flags
20328 #undef elf_backend_lookup_section_flags_hook
20329 #define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags
20331 #define elf_backend_linux_prpsinfo32_ugid16 TRUE
20333 #include "elf32-target.h"
20335 /* Native Client targets. */
20337 #undef TARGET_LITTLE_SYM
20338 #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec
20339 #undef TARGET_LITTLE_NAME
20340 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
20341 #undef TARGET_BIG_SYM
20342 #define TARGET_BIG_SYM arm_elf32_nacl_be_vec
20343 #undef TARGET_BIG_NAME
20344 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
20346 /* Like elf32_arm_link_hash_table_create -- but overrides
20347 appropriately for NaCl. */
20349 static struct bfd_link_hash_table
*
20350 elf32_arm_nacl_link_hash_table_create (bfd
*abfd
)
20352 struct bfd_link_hash_table
*ret
;
20354 ret
= elf32_arm_link_hash_table_create (abfd
);
20357 struct elf32_arm_link_hash_table
*htab
20358 = (struct elf32_arm_link_hash_table
*) ret
;
20362 htab
->plt_header_size
= 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry
);
20363 htab
->plt_entry_size
= 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry
);
20368 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
20369 really need to use elf32_arm_modify_segment_map. But we do it
20370 anyway just to reduce gratuitous differences with the stock ARM backend. */
20373 elf32_arm_nacl_modify_segment_map (bfd
*abfd
, struct bfd_link_info
*info
)
20375 return (elf32_arm_modify_segment_map (abfd
, info
)
20376 && nacl_modify_segment_map (abfd
, info
));
20380 elf32_arm_nacl_final_write_processing (bfd
*abfd
, bfd_boolean linker
)
20382 elf32_arm_final_write_processing (abfd
, linker
);
20383 nacl_final_write_processing (abfd
, linker
);
20387 elf32_arm_nacl_plt_sym_val (bfd_vma i
, const asection
*plt
,
20388 const arelent
*rel ATTRIBUTE_UNUSED
)
20391 + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry
) +
20392 i
* ARRAY_SIZE (elf32_arm_nacl_plt_entry
));
20396 #define elf32_bed elf32_arm_nacl_bed
20397 #undef bfd_elf32_bfd_link_hash_table_create
20398 #define bfd_elf32_bfd_link_hash_table_create \
20399 elf32_arm_nacl_link_hash_table_create
20400 #undef elf_backend_plt_alignment
20401 #define elf_backend_plt_alignment 4
20402 #undef elf_backend_modify_segment_map
20403 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
20404 #undef elf_backend_modify_program_headers
20405 #define elf_backend_modify_program_headers nacl_modify_program_headers
20406 #undef elf_backend_final_write_processing
20407 #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
20408 #undef bfd_elf32_get_synthetic_symtab
20409 #undef elf_backend_plt_sym_val
20410 #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
20411 #undef elf_backend_copy_special_section_fields
20413 #undef ELF_MINPAGESIZE
20414 #undef ELF_COMMONPAGESIZE
20417 #include "elf32-target.h"
20419 /* Reset to defaults. */
20420 #undef elf_backend_plt_alignment
20421 #undef elf_backend_modify_segment_map
20422 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
20423 #undef elf_backend_modify_program_headers
20424 #undef elf_backend_final_write_processing
20425 #define elf_backend_final_write_processing elf32_arm_final_write_processing
20426 #undef ELF_MINPAGESIZE
20427 #define ELF_MINPAGESIZE 0x1000
20428 #undef ELF_COMMONPAGESIZE
20429 #define ELF_COMMONPAGESIZE 0x1000
20432 /* FDPIC Targets. */
20434 #undef TARGET_LITTLE_SYM
20435 #define TARGET_LITTLE_SYM arm_elf32_fdpic_le_vec
20436 #undef TARGET_LITTLE_NAME
20437 #define TARGET_LITTLE_NAME "elf32-littlearm-fdpic"
20438 #undef TARGET_BIG_SYM
20439 #define TARGET_BIG_SYM arm_elf32_fdpic_be_vec
20440 #undef TARGET_BIG_NAME
20441 #define TARGET_BIG_NAME "elf32-bigarm-fdpic"
20442 #undef elf_match_priority
20443 #define elf_match_priority 128
20445 #define ELF_OSABI ELFOSABI_ARM_FDPIC
20447 /* Like elf32_arm_link_hash_table_create -- but overrides
20448 appropriately for FDPIC. */
20450 static struct bfd_link_hash_table
*
20451 elf32_arm_fdpic_link_hash_table_create (bfd
*abfd
)
20453 struct bfd_link_hash_table
*ret
;
20455 ret
= elf32_arm_link_hash_table_create (abfd
);
20458 struct elf32_arm_link_hash_table
*htab
= (struct elf32_arm_link_hash_table
*) ret
;
20465 /* We need dynamic symbols for every section, since segments can
20466 relocate independently. */
20468 elf32_arm_fdpic_omit_section_dynsym (bfd
*output_bfd ATTRIBUTE_UNUSED
,
20469 struct bfd_link_info
*info
20471 asection
*p ATTRIBUTE_UNUSED
)
20473 switch (elf_section_data (p
)->this_hdr
.sh_type
)
20477 /* If sh_type is yet undecided, assume it could be
20478 SHT_PROGBITS/SHT_NOBITS. */
20482 /* There shouldn't be section relative relocations
20483 against any other section. */
20490 #define elf32_bed elf32_arm_fdpic_bed
20492 #undef bfd_elf32_bfd_link_hash_table_create
20493 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_fdpic_link_hash_table_create
20495 #undef elf_backend_omit_section_dynsym
20496 #define elf_backend_omit_section_dynsym elf32_arm_fdpic_omit_section_dynsym
20498 #include "elf32-target.h"
20500 #undef elf_match_priority
20502 #undef elf_backend_omit_section_dynsym
20504 /* VxWorks Targets. */
20506 #undef TARGET_LITTLE_SYM
20507 #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec
20508 #undef TARGET_LITTLE_NAME
20509 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
20510 #undef TARGET_BIG_SYM
20511 #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec
20512 #undef TARGET_BIG_NAME
20513 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
20515 /* Like elf32_arm_link_hash_table_create -- but overrides
20516 appropriately for VxWorks. */
20518 static struct bfd_link_hash_table
*
20519 elf32_arm_vxworks_link_hash_table_create (bfd
*abfd
)
20521 struct bfd_link_hash_table
*ret
;
20523 ret
= elf32_arm_link_hash_table_create (abfd
);
20526 struct elf32_arm_link_hash_table
*htab
20527 = (struct elf32_arm_link_hash_table
*) ret
;
20529 htab
->vxworks_p
= 1;
20535 elf32_arm_vxworks_final_write_processing (bfd
*abfd
, bfd_boolean linker
)
20537 elf32_arm_final_write_processing (abfd
, linker
);
20538 elf_vxworks_final_write_processing (abfd
, linker
);
20542 #define elf32_bed elf32_arm_vxworks_bed
20544 #undef bfd_elf32_bfd_link_hash_table_create
20545 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
20546 #undef elf_backend_final_write_processing
20547 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
20548 #undef elf_backend_emit_relocs
20549 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
20551 #undef elf_backend_may_use_rel_p
20552 #define elf_backend_may_use_rel_p 0
20553 #undef elf_backend_may_use_rela_p
20554 #define elf_backend_may_use_rela_p 1
20555 #undef elf_backend_default_use_rela_p
20556 #define elf_backend_default_use_rela_p 1
20557 #undef elf_backend_want_plt_sym
20558 #define elf_backend_want_plt_sym 1
20559 #undef ELF_MAXPAGESIZE
20560 #define ELF_MAXPAGESIZE 0x1000
20562 #include "elf32-target.h"
20565 /* Merge backend specific data from an object file to the output
20566 object file when linking. */
20569 elf32_arm_merge_private_bfd_data (bfd
*ibfd
, struct bfd_link_info
*info
)
20571 bfd
*obfd
= info
->output_bfd
;
20572 flagword out_flags
;
20574 bfd_boolean flags_compatible
= TRUE
;
20577 /* Check if we have the same endianness. */
20578 if (! _bfd_generic_verify_endian_match (ibfd
, info
))
20581 if (! is_arm_elf (ibfd
) || ! is_arm_elf (obfd
))
20584 if (!elf32_arm_merge_eabi_attributes (ibfd
, info
))
20587 /* The input BFD must have had its flags initialised. */
20588 /* The following seems bogus to me -- The flags are initialized in
20589 the assembler but I don't think an elf_flags_init field is
20590 written into the object. */
20591 /* BFD_ASSERT (elf_flags_init (ibfd)); */
20593 in_flags
= elf_elfheader (ibfd
)->e_flags
;
20594 out_flags
= elf_elfheader (obfd
)->e_flags
;
20596 /* In theory there is no reason why we couldn't handle this. However
20597 in practice it isn't even close to working and there is no real
20598 reason to want it. */
20599 if (EF_ARM_EABI_VERSION (in_flags
) >= EF_ARM_EABI_VER4
20600 && !(ibfd
->flags
& DYNAMIC
)
20601 && (in_flags
& EF_ARM_BE8
))
20603 _bfd_error_handler (_("error: %pB is already in final BE8 format"),
20608 if (!elf_flags_init (obfd
))
20610 /* If the input is the default architecture and had the default
20611 flags then do not bother setting the flags for the output
20612 architecture, instead allow future merges to do this. If no
20613 future merges ever set these flags then they will retain their
20614 uninitialised values, which surprise surprise, correspond
20615 to the default values. */
20616 if (bfd_get_arch_info (ibfd
)->the_default
20617 && elf_elfheader (ibfd
)->e_flags
== 0)
20620 elf_flags_init (obfd
) = TRUE
;
20621 elf_elfheader (obfd
)->e_flags
= in_flags
;
20623 if (bfd_get_arch (obfd
) == bfd_get_arch (ibfd
)
20624 && bfd_get_arch_info (obfd
)->the_default
)
20625 return bfd_set_arch_mach (obfd
, bfd_get_arch (ibfd
), bfd_get_mach (ibfd
));
20630 /* Determine what should happen if the input ARM architecture
20631 does not match the output ARM architecture. */
20632 if (! bfd_arm_merge_machines (ibfd
, obfd
))
20635 /* Identical flags must be compatible. */
20636 if (in_flags
== out_flags
)
20639 /* Check to see if the input BFD actually contains any sections. If
20640 not, its flags may not have been initialised either, but it
20641 cannot actually cause any incompatiblity. Do not short-circuit
20642 dynamic objects; their section list may be emptied by
20643 elf_link_add_object_symbols.
20645 Also check to see if there are no code sections in the input.
20646 In this case there is no need to check for code specific flags.
20647 XXX - do we need to worry about floating-point format compatability
20648 in data sections ? */
20649 if (!(ibfd
->flags
& DYNAMIC
))
20651 bfd_boolean null_input_bfd
= TRUE
;
20652 bfd_boolean only_data_sections
= TRUE
;
20654 for (sec
= ibfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
20656 /* Ignore synthetic glue sections. */
20657 if (strcmp (sec
->name
, ".glue_7")
20658 && strcmp (sec
->name
, ".glue_7t"))
20660 if ((bfd_get_section_flags (ibfd
, sec
)
20661 & (SEC_LOAD
| SEC_CODE
| SEC_HAS_CONTENTS
))
20662 == (SEC_LOAD
| SEC_CODE
| SEC_HAS_CONTENTS
))
20663 only_data_sections
= FALSE
;
20665 null_input_bfd
= FALSE
;
20670 if (null_input_bfd
|| only_data_sections
)
20674 /* Complain about various flag mismatches. */
20675 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags
),
20676 EF_ARM_EABI_VERSION (out_flags
)))
20679 (_("error: source object %pB has EABI version %d, but target %pB has EABI version %d"),
20680 ibfd
, (in_flags
& EF_ARM_EABIMASK
) >> 24,
20681 obfd
, (out_flags
& EF_ARM_EABIMASK
) >> 24);
20685 /* Not sure what needs to be checked for EABI versions >= 1. */
20686 /* VxWorks libraries do not use these flags. */
20687 if (get_elf_backend_data (obfd
) != &elf32_arm_vxworks_bed
20688 && get_elf_backend_data (ibfd
) != &elf32_arm_vxworks_bed
20689 && EF_ARM_EABI_VERSION (in_flags
) == EF_ARM_EABI_UNKNOWN
)
20691 if ((in_flags
& EF_ARM_APCS_26
) != (out_flags
& EF_ARM_APCS_26
))
20694 (_("error: %pB is compiled for APCS-%d, whereas target %pB uses APCS-%d"),
20695 ibfd
, in_flags
& EF_ARM_APCS_26
? 26 : 32,
20696 obfd
, out_flags
& EF_ARM_APCS_26
? 26 : 32);
20697 flags_compatible
= FALSE
;
20700 if ((in_flags
& EF_ARM_APCS_FLOAT
) != (out_flags
& EF_ARM_APCS_FLOAT
))
20702 if (in_flags
& EF_ARM_APCS_FLOAT
)
20704 (_("error: %pB passes floats in float registers, whereas %pB passes them in integer registers"),
20708 (_("error: %pB passes floats in integer registers, whereas %pB passes them in float registers"),
20711 flags_compatible
= FALSE
;
20714 if ((in_flags
& EF_ARM_VFP_FLOAT
) != (out_flags
& EF_ARM_VFP_FLOAT
))
20716 if (in_flags
& EF_ARM_VFP_FLOAT
)
20718 (_("error: %pB uses %s instructions, whereas %pB does not"),
20719 ibfd
, "VFP", obfd
);
20722 (_("error: %pB uses %s instructions, whereas %pB does not"),
20723 ibfd
, "FPA", obfd
);
20725 flags_compatible
= FALSE
;
20728 if ((in_flags
& EF_ARM_MAVERICK_FLOAT
) != (out_flags
& EF_ARM_MAVERICK_FLOAT
))
20730 if (in_flags
& EF_ARM_MAVERICK_FLOAT
)
20732 (_("error: %pB uses %s instructions, whereas %pB does not"),
20733 ibfd
, "Maverick", obfd
);
20736 (_("error: %pB does not use %s instructions, whereas %pB does"),
20737 ibfd
, "Maverick", obfd
);
20739 flags_compatible
= FALSE
;
20742 #ifdef EF_ARM_SOFT_FLOAT
20743 if ((in_flags
& EF_ARM_SOFT_FLOAT
) != (out_flags
& EF_ARM_SOFT_FLOAT
))
20745 /* We can allow interworking between code that is VFP format
20746 layout, and uses either soft float or integer regs for
20747 passing floating point arguments and results. We already
20748 know that the APCS_FLOAT flags match; similarly for VFP
20750 if ((in_flags
& EF_ARM_APCS_FLOAT
) != 0
20751 || (in_flags
& EF_ARM_VFP_FLOAT
) == 0)
20753 if (in_flags
& EF_ARM_SOFT_FLOAT
)
20755 (_("error: %pB uses software FP, whereas %pB uses hardware FP"),
20759 (_("error: %pB uses hardware FP, whereas %pB uses software FP"),
20762 flags_compatible
= FALSE
;
20767 /* Interworking mismatch is only a warning. */
20768 if ((in_flags
& EF_ARM_INTERWORK
) != (out_flags
& EF_ARM_INTERWORK
))
20770 if (in_flags
& EF_ARM_INTERWORK
)
20773 (_("warning: %pB supports interworking, whereas %pB does not"),
20779 (_("warning: %pB does not support interworking, whereas %pB does"),
20785 return flags_compatible
;
20789 /* Symbian OS Targets. */
20791 #undef TARGET_LITTLE_SYM
20792 #define TARGET_LITTLE_SYM arm_elf32_symbian_le_vec
20793 #undef TARGET_LITTLE_NAME
20794 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
20795 #undef TARGET_BIG_SYM
20796 #define TARGET_BIG_SYM arm_elf32_symbian_be_vec
20797 #undef TARGET_BIG_NAME
20798 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
20800 /* Like elf32_arm_link_hash_table_create -- but overrides
20801 appropriately for Symbian OS. */
20803 static struct bfd_link_hash_table
*
20804 elf32_arm_symbian_link_hash_table_create (bfd
*abfd
)
20806 struct bfd_link_hash_table
*ret
;
20808 ret
= elf32_arm_link_hash_table_create (abfd
);
20811 struct elf32_arm_link_hash_table
*htab
20812 = (struct elf32_arm_link_hash_table
*)ret
;
20813 /* There is no PLT header for Symbian OS. */
20814 htab
->plt_header_size
= 0;
20815 /* The PLT entries are each one instruction and one word. */
20816 htab
->plt_entry_size
= 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry
);
20817 htab
->symbian_p
= 1;
20818 /* Symbian uses armv5t or above, so use_blx is always true. */
20820 htab
->root
.is_relocatable_executable
= 1;
20825 static const struct bfd_elf_special_section
20826 elf32_arm_symbian_special_sections
[] =
20828 /* In a BPABI executable, the dynamic linking sections do not go in
20829 the loadable read-only segment. The post-linker may wish to
20830 refer to these sections, but they are not part of the final
20832 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC
, 0 },
20833 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB
, 0 },
20834 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM
, 0 },
20835 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS
, 0 },
20836 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH
, 0 },
20837 /* These sections do not need to be writable as the SymbianOS
20838 postlinker will arrange things so that no dynamic relocation is
20840 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY
, SHF_ALLOC
},
20841 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY
, SHF_ALLOC
},
20842 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY
, SHF_ALLOC
},
20843 { NULL
, 0, 0, 0, 0 }
20847 elf32_arm_symbian_begin_write_processing (bfd
*abfd
,
20848 struct bfd_link_info
*link_info
)
20850 /* BPABI objects are never loaded directly by an OS kernel; they are
20851 processed by a postlinker first, into an OS-specific format. If
20852 the D_PAGED bit is set on the file, BFD will align segments on
20853 page boundaries, so that an OS can directly map the file. With
20854 BPABI objects, that just results in wasted space. In addition,
20855 because we clear the D_PAGED bit, map_sections_to_segments will
20856 recognize that the program headers should not be mapped into any
20857 loadable segment. */
20858 abfd
->flags
&= ~D_PAGED
;
20859 elf32_arm_begin_write_processing (abfd
, link_info
);
20863 elf32_arm_symbian_modify_segment_map (bfd
*abfd
,
20864 struct bfd_link_info
*info
)
20866 struct elf_segment_map
*m
;
20869 /* BPABI shared libraries and executables should have a PT_DYNAMIC
20870 segment. However, because the .dynamic section is not marked
20871 with SEC_LOAD, the generic ELF code will not create such a
20873 dynsec
= bfd_get_section_by_name (abfd
, ".dynamic");
20876 for (m
= elf_seg_map (abfd
); m
!= NULL
; m
= m
->next
)
20877 if (m
->p_type
== PT_DYNAMIC
)
20882 m
= _bfd_elf_make_dynamic_segment (abfd
, dynsec
);
20883 m
->next
= elf_seg_map (abfd
);
20884 elf_seg_map (abfd
) = m
;
20888 /* Also call the generic arm routine. */
20889 return elf32_arm_modify_segment_map (abfd
, info
);
20892 /* Return address for Ith PLT stub in section PLT, for relocation REL
20893 or (bfd_vma) -1 if it should not be included. */
20896 elf32_arm_symbian_plt_sym_val (bfd_vma i
, const asection
*plt
,
20897 const arelent
*rel ATTRIBUTE_UNUSED
)
20899 return plt
->vma
+ 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry
) * i
;
20903 #define elf32_bed elf32_arm_symbian_bed
20905 /* The dynamic sections are not allocated on SymbianOS; the postlinker
20906 will process them and then discard them. */
20907 #undef ELF_DYNAMIC_SEC_FLAGS
20908 #define ELF_DYNAMIC_SEC_FLAGS \
20909 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
20911 #undef elf_backend_emit_relocs
20913 #undef bfd_elf32_bfd_link_hash_table_create
20914 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
20915 #undef elf_backend_special_sections
20916 #define elf_backend_special_sections elf32_arm_symbian_special_sections
20917 #undef elf_backend_begin_write_processing
20918 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
20919 #undef elf_backend_final_write_processing
20920 #define elf_backend_final_write_processing elf32_arm_final_write_processing
20922 #undef elf_backend_modify_segment_map
20923 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
20925 /* There is no .got section for BPABI objects, and hence no header. */
20926 #undef elf_backend_got_header_size
20927 #define elf_backend_got_header_size 0
20929 /* Similarly, there is no .got.plt section. */
20930 #undef elf_backend_want_got_plt
20931 #define elf_backend_want_got_plt 0
20933 #undef elf_backend_plt_sym_val
20934 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
20936 #undef elf_backend_may_use_rel_p
20937 #define elf_backend_may_use_rel_p 1
20938 #undef elf_backend_may_use_rela_p
20939 #define elf_backend_may_use_rela_p 0
20940 #undef elf_backend_default_use_rela_p
20941 #define elf_backend_default_use_rela_p 0
20942 #undef elf_backend_want_plt_sym
20943 #define elf_backend_want_plt_sym 0
20944 #undef elf_backend_dtrel_excludes_plt
20945 #define elf_backend_dtrel_excludes_plt 0
20946 #undef ELF_MAXPAGESIZE
20947 #define ELF_MAXPAGESIZE 0x8000
20949 #include "elf32-target.h"